diff options
431 files changed, 4843 insertions, 10525 deletions
diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt index dbbdcbba75a3..4110cca96bd6 100644 --- a/Documentation/arm64/memory.txt +++ b/Documentation/arm64/memory.txt | |||
@@ -27,17 +27,17 @@ Start End Size Use | |||
27 | ----------------------------------------------------------------------- | 27 | ----------------------------------------------------------------------- |
28 | 0000000000000000 0000007fffffffff 512GB user | 28 | 0000000000000000 0000007fffffffff 512GB user |
29 | 29 | ||
30 | ffffff8000000000 ffffffbbfffcffff ~240GB vmalloc | 30 | ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc |
31 | 31 | ||
32 | ffffffbbfffd0000 ffffffbcfffdffff 64KB [guard page] | 32 | ffffffbbffff0000 ffffffbbffffffff 64KB [guard page] |
33 | 33 | ||
34 | ffffffbbfffe0000 ffffffbcfffeffff 64KB PCI I/O space | 34 | ffffffbc00000000 ffffffbdffffffff 8GB vmemmap |
35 | 35 | ||
36 | ffffffbbffff0000 ffffffbcffffffff 64KB [guard page] | 36 | ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap] |
37 | 37 | ||
38 | ffffffbc00000000 ffffffbdffffffff 8GB vmemmap | 38 | ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space |
39 | 39 | ||
40 | ffffffbe00000000 ffffffbffbffffff ~8GB [guard, future vmmemap] | 40 | ffffffbbffff0000 ffffffbcffffffff ~2MB [guard] |
41 | 41 | ||
42 | ffffffbffc000000 ffffffbfffffffff 64MB modules | 42 | ffffffbffc000000 ffffffbfffffffff 64MB modules |
43 | 43 | ||
diff --git a/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt b/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt new file mode 100644 index 000000000000..df70318a617f --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt | |||
@@ -0,0 +1,19 @@ | |||
1 | * EETI eGalax Multiple Touch Controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: must be "eeti,egalax_ts" | ||
5 | - reg: i2c slave address | ||
6 | - interrupt-parent: the phandle for the interrupt controller | ||
7 | - interrupts: touch controller interrupt | ||
8 | - wakeup-gpios: the gpio pin to be used for waking up the controller | ||
9 | as well as uased as irq pin | ||
10 | |||
11 | Example: | ||
12 | |||
13 | egalax_ts@04 { | ||
14 | compatible = "eeti,egalax_ts"; | ||
15 | reg = <0x04>; | ||
16 | interrupt-parent = <&gpio1>; | ||
17 | interrupts = <9 2>; | ||
18 | wakeup-gpios = <&gpio1 9 0>; | ||
19 | }; | ||
diff --git a/Documentation/hwmon/fam15h_power b/Documentation/hwmon/fam15h_power index a92918e0bd69..80654813d04a 100644 --- a/Documentation/hwmon/fam15h_power +++ b/Documentation/hwmon/fam15h_power | |||
@@ -10,7 +10,7 @@ Supported chips: | |||
10 | BIOS and Kernel Developer's Guide (BKDG) For AMD Family 15h Processors | 10 | BIOS and Kernel Developer's Guide (BKDG) For AMD Family 15h Processors |
11 | (not yet published) | 11 | (not yet published) |
12 | 12 | ||
13 | Author: Andreas Herrmann <andreas.herrmann3@amd.com> | 13 | Author: Andreas Herrmann <herrmann.der.user@googlemail.com> |
14 | 14 | ||
15 | Description | 15 | Description |
16 | ----------- | 16 | ----------- |
diff --git a/MAINTAINERS b/MAINTAINERS index 1fa907441f8f..59203e77ce9e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -503,7 +503,7 @@ F: include/linux/altera_uart.h | |||
503 | F: include/linux/altera_jtaguart.h | 503 | F: include/linux/altera_jtaguart.h |
504 | 504 | ||
505 | AMD FAM15H PROCESSOR POWER MONITORING DRIVER | 505 | AMD FAM15H PROCESSOR POWER MONITORING DRIVER |
506 | M: Andreas Herrmann <andreas.herrmann3@amd.com> | 506 | M: Andreas Herrmann <herrmann.der.user@googlemail.com> |
507 | L: lm-sensors@lm-sensors.org | 507 | L: lm-sensors@lm-sensors.org |
508 | S: Maintained | 508 | S: Maintained |
509 | F: Documentation/hwmon/fam15h_power | 509 | F: Documentation/hwmon/fam15h_power |
@@ -2507,6 +2507,7 @@ M: Joonyoung Shim <jy0922.shim@samsung.com> | |||
2507 | M: Seung-Woo Kim <sw0312.kim@samsung.com> | 2507 | M: Seung-Woo Kim <sw0312.kim@samsung.com> |
2508 | M: Kyungmin Park <kyungmin.park@samsung.com> | 2508 | M: Kyungmin Park <kyungmin.park@samsung.com> |
2509 | L: dri-devel@lists.freedesktop.org | 2509 | L: dri-devel@lists.freedesktop.org |
2510 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git | ||
2510 | S: Supported | 2511 | S: Supported |
2511 | F: drivers/gpu/drm/exynos | 2512 | F: drivers/gpu/drm/exynos |
2512 | F: include/drm/exynos* | 2513 | F: include/drm/exynos* |
@@ -5647,7 +5648,7 @@ S: Maintained | |||
5647 | F: drivers/pinctrl/spear/ | 5648 | F: drivers/pinctrl/spear/ |
5648 | 5649 | ||
5649 | PKTCDVD DRIVER | 5650 | PKTCDVD DRIVER |
5650 | M: Peter Osterlund <petero2@telia.com> | 5651 | M: Jiri Kosina <jkosina@suse.cz> |
5651 | S: Maintained | 5652 | S: Maintained |
5652 | F: drivers/block/pktcdvd.c | 5653 | F: drivers/block/pktcdvd.c |
5653 | F: include/linux/pktcdvd.h | 5654 | F: include/linux/pktcdvd.h |
@@ -1,7 +1,7 @@ | |||
1 | VERSION = 3 | 1 | VERSION = 3 |
2 | PATCHLEVEL = 7 | 2 | PATCHLEVEL = 7 |
3 | SUBLEVEL = 0 | 3 | SUBLEVEL = 0 |
4 | EXTRAVERSION = -rc3 | 4 | EXTRAVERSION = -rc5 |
5 | NAME = Terrified Chipmunk | 5 | NAME = Terrified Chipmunk |
6 | 6 | ||
7 | # *DOCUMENTATION* | 7 | # *DOCUMENTATION* |
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f37cf9fa5fa0..a9d8a10d1ac6 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -77,7 +77,8 @@ dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb | |||
77 | dtb-$(CONFIG_ARCH_U8500) += snowball.dtb | 77 | dtb-$(CONFIG_ARCH_U8500) += snowball.dtb |
78 | dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ | 78 | dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ |
79 | r8a7740-armadillo800eva.dtb \ | 79 | r8a7740-armadillo800eva.dtb \ |
80 | sh73a0-kzm9g.dtb | 80 | sh73a0-kzm9g.dtb \ |
81 | sh7372-mackerel.dtb | ||
81 | dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ | 82 | dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ |
82 | spear1340-evb.dtb | 83 | spear1340-evb.dtb |
83 | dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ | 84 | dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ |
diff --git a/arch/arm/boot/dts/sh7377.dtsi b/arch/arm/boot/dts/sh7372-mackerel.dts index 767ee0796daa..286f0caef013 100644 --- a/arch/arm/boot/dts/sh7377.dtsi +++ b/arch/arm/boot/dts/sh7372-mackerel.dts | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Device Tree Source for the sh7377 SoC | 2 | * Device Tree Source for the mackerel board |
3 | * | 3 | * |
4 | * Copyright (C) 2012 Renesas Solutions Corp. | 4 | * Copyright (C) 2012 Renesas Solutions Corp. |
5 | * | 5 | * |
@@ -8,14 +8,15 @@ | |||
8 | * kind, whether express or implied. | 8 | * kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | /dts-v1/; | ||
11 | /include/ "skeleton.dtsi" | 12 | /include/ "skeleton.dtsi" |
12 | 13 | ||
13 | / { | 14 | / { |
14 | compatible = "renesas,sh7377"; | 15 | model = "Mackerel (AP4 EVM 2nd)"; |
16 | compatible = "renesas,mackerel"; | ||
15 | 17 | ||
16 | cpus { | 18 | memory { |
17 | cpu@0 { | 19 | device_type = "memory"; |
18 | compatible = "arm,cortex-a8"; | 20 | reg = <0x40000000 0x10000000>; |
19 | }; | ||
20 | }; | 21 | }; |
21 | }; | 22 | }; |
diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig index f78d259f8d23..3d764072dd54 100644 --- a/arch/arm/configs/armadillo800eva_defconfig +++ b/arch/arm/configs/armadillo800eva_defconfig | |||
@@ -7,6 +7,7 @@ CONFIG_LOG_BUF_SHIFT=16 | |||
7 | # CONFIG_IPC_NS is not set | 7 | # CONFIG_IPC_NS is not set |
8 | # CONFIG_PID_NS is not set | 8 | # CONFIG_PID_NS is not set |
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
10 | CONFIG_PERF_EVENTS=y | ||
10 | CONFIG_SLAB=y | 11 | CONFIG_SLAB=y |
11 | CONFIG_MODULES=y | 12 | CONFIG_MODULES=y |
12 | CONFIG_MODULE_UNLOAD=y | 13 | CONFIG_MODULE_UNLOAD=y |
diff --git a/arch/arm/configs/g3evm_defconfig b/arch/arm/configs/g3evm_defconfig deleted file mode 100644 index 4a336ab5a0c0..000000000000 --- a/arch/arm/configs/g3evm_defconfig +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_IKCONFIG=y | ||
4 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=16 | ||
6 | CONFIG_BLK_DEV_INITRD=y | ||
7 | CONFIG_SLAB=y | ||
8 | # CONFIG_BLK_DEV_BSG is not set | ||
9 | # CONFIG_IOSCHED_DEADLINE is not set | ||
10 | # CONFIG_IOSCHED_CFQ is not set | ||
11 | CONFIG_ARCH_SHMOBILE=y | ||
12 | CONFIG_ARCH_SH7367=y | ||
13 | CONFIG_MACH_G3EVM=y | ||
14 | CONFIG_AEABI=y | ||
15 | # CONFIG_OABI_COMPAT is not set | ||
16 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
17 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
18 | CONFIG_CMDLINE="console=ttySC1,115200 earlyprintk=sh-sci.1,115200" | ||
19 | CONFIG_KEXEC=y | ||
20 | CONFIG_PM=y | ||
21 | # CONFIG_SUSPEND is not set | ||
22 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
23 | # CONFIG_FIRMWARE_IN_KERNEL is not set | ||
24 | CONFIG_MTD=y | ||
25 | CONFIG_MTD_CONCAT=y | ||
26 | CONFIG_MTD_PARTITIONS=y | ||
27 | CONFIG_MTD_CHAR=y | ||
28 | CONFIG_MTD_BLOCK=y | ||
29 | CONFIG_MTD_CFI=y | ||
30 | CONFIG_MTD_CFI_INTELEXT=y | ||
31 | CONFIG_MTD_PHYSMAP=y | ||
32 | CONFIG_MTD_NAND=y | ||
33 | # CONFIG_BLK_DEV is not set | ||
34 | # CONFIG_MISC_DEVICES is not set | ||
35 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
36 | # CONFIG_INPUT_KEYBOARD is not set | ||
37 | # CONFIG_INPUT_MOUSE is not set | ||
38 | # CONFIG_SERIO is not set | ||
39 | CONFIG_SERIAL_SH_SCI=y | ||
40 | CONFIG_SERIAL_SH_SCI_NR_UARTS=8 | ||
41 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | ||
42 | # CONFIG_LEGACY_PTYS is not set | ||
43 | # CONFIG_HW_RANDOM is not set | ||
44 | # CONFIG_HWMON is not set | ||
45 | # CONFIG_VGA_CONSOLE is not set | ||
46 | # CONFIG_HID_SUPPORT is not set | ||
47 | # CONFIG_USB_SUPPORT is not set | ||
48 | # CONFIG_DNOTIFY is not set | ||
49 | # CONFIG_INOTIFY_USER is not set | ||
50 | CONFIG_TMPFS=y | ||
51 | # CONFIG_MISC_FILESYSTEMS is not set | ||
52 | CONFIG_MAGIC_SYSRQ=y | ||
53 | CONFIG_DEBUG_KERNEL=y | ||
54 | # CONFIG_DETECT_SOFTLOCKUP is not set | ||
55 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
56 | # CONFIG_FTRACE is not set | ||
57 | # CONFIG_CRC32 is not set | ||
diff --git a/arch/arm/configs/g4evm_defconfig b/arch/arm/configs/g4evm_defconfig deleted file mode 100644 index 21c6d0307bc3..000000000000 --- a/arch/arm/configs/g4evm_defconfig +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_IKCONFIG=y | ||
4 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=16 | ||
6 | CONFIG_BLK_DEV_INITRD=y | ||
7 | CONFIG_SLAB=y | ||
8 | # CONFIG_BLK_DEV_BSG is not set | ||
9 | # CONFIG_IOSCHED_DEADLINE is not set | ||
10 | # CONFIG_IOSCHED_CFQ is not set | ||
11 | CONFIG_ARCH_SHMOBILE=y | ||
12 | CONFIG_ARCH_SH7377=y | ||
13 | CONFIG_MACH_G4EVM=y | ||
14 | CONFIG_AEABI=y | ||
15 | # CONFIG_OABI_COMPAT is not set | ||
16 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
17 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
18 | CONFIG_CMDLINE="console=ttySC4,115200 earlyprintk=sh-sci.4,115200" | ||
19 | CONFIG_KEXEC=y | ||
20 | CONFIG_PM=y | ||
21 | # CONFIG_SUSPEND is not set | ||
22 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
23 | # CONFIG_FIRMWARE_IN_KERNEL is not set | ||
24 | CONFIG_MTD=y | ||
25 | CONFIG_MTD_CONCAT=y | ||
26 | CONFIG_MTD_PARTITIONS=y | ||
27 | CONFIG_MTD_CHAR=y | ||
28 | CONFIG_MTD_BLOCK=y | ||
29 | CONFIG_MTD_CFI=y | ||
30 | CONFIG_MTD_CFI_INTELEXT=y | ||
31 | CONFIG_MTD_PHYSMAP=y | ||
32 | CONFIG_MTD_NAND=y | ||
33 | # CONFIG_BLK_DEV is not set | ||
34 | # CONFIG_MISC_DEVICES is not set | ||
35 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
36 | # CONFIG_INPUT_KEYBOARD is not set | ||
37 | # CONFIG_INPUT_MOUSE is not set | ||
38 | # CONFIG_SERIO is not set | ||
39 | CONFIG_SERIAL_SH_SCI=y | ||
40 | CONFIG_SERIAL_SH_SCI_NR_UARTS=8 | ||
41 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | ||
42 | # CONFIG_LEGACY_PTYS is not set | ||
43 | # CONFIG_HW_RANDOM is not set | ||
44 | # CONFIG_HWMON is not set | ||
45 | # CONFIG_VGA_CONSOLE is not set | ||
46 | # CONFIG_HID_SUPPORT is not set | ||
47 | # CONFIG_USB_SUPPORT is not set | ||
48 | # CONFIG_DNOTIFY is not set | ||
49 | # CONFIG_INOTIFY_USER is not set | ||
50 | CONFIG_TMPFS=y | ||
51 | # CONFIG_MISC_FILESYSTEMS is not set | ||
52 | CONFIG_MAGIC_SYSRQ=y | ||
53 | CONFIG_DEBUG_KERNEL=y | ||
54 | # CONFIG_DETECT_SOFTLOCKUP is not set | ||
55 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
56 | # CONFIG_FTRACE is not set | ||
57 | # CONFIG_CRC32 is not set | ||
diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig index c88b57886e79..ce99e3e00efa 100644 --- a/arch/arm/configs/kzm9g_defconfig +++ b/arch/arm/configs/kzm9g_defconfig | |||
@@ -74,6 +74,8 @@ CONFIG_KEYBOARD_GPIO=y | |||
74 | # CONFIG_INPUT_MOUSE is not set | 74 | # CONFIG_INPUT_MOUSE is not set |
75 | CONFIG_INPUT_TOUCHSCREEN=y | 75 | CONFIG_INPUT_TOUCHSCREEN=y |
76 | CONFIG_TOUCHSCREEN_ST1232=y | 76 | CONFIG_TOUCHSCREEN_ST1232=y |
77 | CONFIG_INPUT_MISC=y | ||
78 | CONFIG_INPUT_ADXL34X=y | ||
77 | # CONFIG_LEGACY_PTYS is not set | 79 | # CONFIG_LEGACY_PTYS is not set |
78 | CONFIG_SERIAL_SH_SCI=y | 80 | CONFIG_SERIAL_SH_SCI=y |
79 | CONFIG_SERIAL_SH_SCI_NR_UARTS=9 | 81 | CONFIG_SERIAL_SH_SCI_NR_UARTS=9 |
@@ -119,6 +121,8 @@ CONFIG_DMADEVICES=y | |||
119 | CONFIG_SH_DMAE=y | 121 | CONFIG_SH_DMAE=y |
120 | CONFIG_ASYNC_TX_DMA=y | 122 | CONFIG_ASYNC_TX_DMA=y |
121 | CONFIG_STAGING=y | 123 | CONFIG_STAGING=y |
124 | CONFIG_SENSORS_AK8975=y | ||
125 | CONFIG_IIO=y | ||
122 | # CONFIG_DNOTIFY is not set | 126 | # CONFIG_DNOTIFY is not set |
123 | CONFIG_INOTIFY_USER=y | 127 | CONFIG_INOTIFY_USER=y |
124 | CONFIG_VFAT_FS=y | 128 | CONFIG_VFAT_FS=y |
diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig index 53382b6c8bb4..728a43c446f8 100644 --- a/arch/arm/configs/marzen_defconfig +++ b/arch/arm/configs/marzen_defconfig | |||
@@ -47,6 +47,8 @@ CONFIG_DEVTMPFS_MOUNT=y | |||
47 | # CONFIG_STANDALONE is not set | 47 | # CONFIG_STANDALONE is not set |
48 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | 48 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set |
49 | # CONFIG_FW_LOADER is not set | 49 | # CONFIG_FW_LOADER is not set |
50 | CONFIG_SCSI=y | ||
51 | CONFIG_BLK_DEV_SD=y | ||
50 | CONFIG_NETDEVICES=y | 52 | CONFIG_NETDEVICES=y |
51 | # CONFIG_NET_VENDOR_BROADCOM is not set | 53 | # CONFIG_NET_VENDOR_BROADCOM is not set |
52 | # CONFIG_NET_VENDOR_FARADAY is not set | 54 | # CONFIG_NET_VENDOR_FARADAY is not set |
@@ -59,9 +61,8 @@ CONFIG_SMSC911X=y | |||
59 | # CONFIG_NET_VENDOR_STMICRO is not set | 61 | # CONFIG_NET_VENDOR_STMICRO is not set |
60 | # CONFIG_WLAN is not set | 62 | # CONFIG_WLAN is not set |
61 | # CONFIG_INPUT_MOUSEDEV is not set | 63 | # CONFIG_INPUT_MOUSEDEV is not set |
62 | # CONFIG_INPUT_KEYBOARD is not set | 64 | CONFIG_INPUT_EVDEV=y |
63 | # CONFIG_INPUT_MOUSE is not set | 65 | # CONFIG_INPUT_MOUSE is not set |
64 | # CONFIG_SERIO is not set | ||
65 | # CONFIG_VT is not set | 66 | # CONFIG_VT is not set |
66 | # CONFIG_LEGACY_PTYS is not set | 67 | # CONFIG_LEGACY_PTYS is not set |
67 | # CONFIG_DEVKMEM is not set | 68 | # CONFIG_DEVKMEM is not set |
@@ -69,14 +70,25 @@ CONFIG_SERIAL_SH_SCI=y | |||
69 | CONFIG_SERIAL_SH_SCI_NR_UARTS=6 | 70 | CONFIG_SERIAL_SH_SCI_NR_UARTS=6 |
70 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | 71 | CONFIG_SERIAL_SH_SCI_CONSOLE=y |
71 | # CONFIG_HW_RANDOM is not set | 72 | # CONFIG_HW_RANDOM is not set |
73 | CONFIG_I2C=y | ||
74 | CONFIG_I2C_RCAR=y | ||
75 | CONFIG_SPI=y | ||
76 | CONFIG_SPI_SH_HSPI=y | ||
72 | CONFIG_GPIO_SYSFS=y | 77 | CONFIG_GPIO_SYSFS=y |
73 | # CONFIG_HWMON is not set | 78 | # CONFIG_HWMON is not set |
74 | CONFIG_THERMAL=y | 79 | CONFIG_THERMAL=y |
75 | CONFIG_RCAR_THERMAL=y | 80 | CONFIG_RCAR_THERMAL=y |
76 | CONFIG_SSB=y | 81 | CONFIG_SSB=y |
77 | # CONFIG_USB_SUPPORT is not set | 82 | CONFIG_USB=y |
83 | CONFIG_USB_RCAR_PHY=y | ||
78 | CONFIG_MMC=y | 84 | CONFIG_MMC=y |
79 | CONFIG_MMC_SDHI=y | 85 | CONFIG_MMC_SDHI=y |
86 | CONFIG_USB=y | ||
87 | CONFIG_USB_EHCI_HCD=y | ||
88 | CONFIG_USB_OHCI_HCD=y | ||
89 | CONFIG_USB_OHCI_HCD_PLATFORM=y | ||
90 | CONFIG_USB_EHCI_HCD_PLATFORM=y | ||
91 | CONFIG_USB_STORAGE=y | ||
80 | CONFIG_UIO=y | 92 | CONFIG_UIO=y |
81 | CONFIG_UIO_PDRV_GENIRQ=y | 93 | CONFIG_UIO_PDRV_GENIRQ=y |
82 | # CONFIG_IOMMU_SUPPORT is not set | 94 | # CONFIG_IOMMU_SUPPORT is not set |
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 35c1ed89b936..42f042ee4ada 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h | |||
@@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); | |||
64 | static inline void __raw_writew(u16 val, volatile void __iomem *addr) | 64 | static inline void __raw_writew(u16 val, volatile void __iomem *addr) |
65 | { | 65 | { |
66 | asm volatile("strh %1, %0" | 66 | asm volatile("strh %1, %0" |
67 | : "+Qo" (*(volatile u16 __force *)addr) | 67 | : "+Q" (*(volatile u16 __force *)addr) |
68 | : "r" (val)); | 68 | : "r" (val)); |
69 | } | 69 | } |
70 | 70 | ||
@@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr) | |||
72 | { | 72 | { |
73 | u16 val; | 73 | u16 val; |
74 | asm volatile("ldrh %1, %0" | 74 | asm volatile("ldrh %1, %0" |
75 | : "+Qo" (*(volatile u16 __force *)addr), | 75 | : "+Q" (*(volatile u16 __force *)addr), |
76 | "=r" (val)); | 76 | "=r" (val)); |
77 | return val; | 77 | return val; |
78 | } | 78 | } |
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h index 05b8e82ec9f5..e3f757263438 100644 --- a/arch/arm/include/asm/sched_clock.h +++ b/arch/arm/include/asm/sched_clock.h | |||
@@ -10,7 +10,5 @@ | |||
10 | 10 | ||
11 | extern void sched_clock_postinit(void); | 11 | extern void sched_clock_postinit(void); |
12 | extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); | 12 | extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); |
13 | extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits, | ||
14 | unsigned long rate); | ||
15 | 13 | ||
16 | #endif | 14 | #endif |
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h index 6a6f1e485f41..301c1db3e99b 100644 --- a/arch/arm/include/asm/vfpmacros.h +++ b/arch/arm/include/asm/vfpmacros.h | |||
@@ -27,9 +27,9 @@ | |||
27 | #if __LINUX_ARM_ARCH__ <= 6 | 27 | #if __LINUX_ARM_ARCH__ <= 6 |
28 | ldr \tmp, =elf_hwcap @ may not have MVFR regs | 28 | ldr \tmp, =elf_hwcap @ may not have MVFR regs |
29 | ldr \tmp, [\tmp, #0] | 29 | ldr \tmp, [\tmp, #0] |
30 | tst \tmp, #HWCAP_VFPv3D16 | 30 | tst \tmp, #HWCAP_VFPD32 |
31 | ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} | 31 | ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} |
32 | addne \base, \base, #32*4 @ step over unused register space | 32 | addeq \base, \base, #32*4 @ step over unused register space |
33 | #else | 33 | #else |
34 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 | 34 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
35 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field | 35 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
@@ -51,9 +51,9 @@ | |||
51 | #if __LINUX_ARM_ARCH__ <= 6 | 51 | #if __LINUX_ARM_ARCH__ <= 6 |
52 | ldr \tmp, =elf_hwcap @ may not have MVFR regs | 52 | ldr \tmp, =elf_hwcap @ may not have MVFR regs |
53 | ldr \tmp, [\tmp, #0] | 53 | ldr \tmp, [\tmp, #0] |
54 | tst \tmp, #HWCAP_VFPv3D16 | 54 | tst \tmp, #HWCAP_VFPD32 |
55 | stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} | 55 | stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} |
56 | addne \base, \base, #32*4 @ step over unused register space | 56 | addeq \base, \base, #32*4 @ step over unused register space |
57 | #else | 57 | #else |
58 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 | 58 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
59 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field | 59 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h index f254f6503cce..3688fd15a32d 100644 --- a/arch/arm/include/uapi/asm/hwcap.h +++ b/arch/arm/include/uapi/asm/hwcap.h | |||
@@ -18,11 +18,12 @@ | |||
18 | #define HWCAP_THUMBEE (1 << 11) | 18 | #define HWCAP_THUMBEE (1 << 11) |
19 | #define HWCAP_NEON (1 << 12) | 19 | #define HWCAP_NEON (1 << 12) |
20 | #define HWCAP_VFPv3 (1 << 13) | 20 | #define HWCAP_VFPv3 (1 << 13) |
21 | #define HWCAP_VFPv3D16 (1 << 14) | 21 | #define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ |
22 | #define HWCAP_TLS (1 << 15) | 22 | #define HWCAP_TLS (1 << 15) |
23 | #define HWCAP_VFPv4 (1 << 16) | 23 | #define HWCAP_VFPv4 (1 << 16) |
24 | #define HWCAP_IDIVA (1 << 17) | 24 | #define HWCAP_IDIVA (1 << 17) |
25 | #define HWCAP_IDIVT (1 << 18) | 25 | #define HWCAP_IDIVT (1 << 18) |
26 | #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ | ||
26 | #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) | 27 | #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) |
27 | 28 | ||
28 | 29 | ||
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index e21bac20d90d..fc6692e2b603 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c | |||
@@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks) | |||
107 | update_sched_clock(); | 107 | update_sched_clock(); |
108 | } | 108 | } |
109 | 109 | ||
110 | void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits, | ||
111 | unsigned long rate) | ||
112 | { | ||
113 | setup_sched_clock(read, bits, rate); | ||
114 | cd.needs_suspend = true; | ||
115 | } | ||
116 | |||
117 | void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) | 110 | void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) |
118 | { | 111 | { |
119 | unsigned long r, w; | 112 | unsigned long r, w; |
@@ -189,18 +182,15 @@ void __init sched_clock_postinit(void) | |||
189 | static int sched_clock_suspend(void) | 182 | static int sched_clock_suspend(void) |
190 | { | 183 | { |
191 | sched_clock_poll(sched_clock_timer.data); | 184 | sched_clock_poll(sched_clock_timer.data); |
192 | if (cd.needs_suspend) | 185 | cd.suspended = true; |
193 | cd.suspended = true; | ||
194 | return 0; | 186 | return 0; |
195 | } | 187 | } |
196 | 188 | ||
197 | static void sched_clock_resume(void) | 189 | static void sched_clock_resume(void) |
198 | { | 190 | { |
199 | if (cd.needs_suspend) { | 191 | cd.epoch_cyc = read_sched_clock(); |
200 | cd.epoch_cyc = read_sched_clock(); | 192 | cd.epoch_cyc_copy = cd.epoch_cyc; |
201 | cd.epoch_cyc_copy = cd.epoch_cyc; | 193 | cd.suspended = false; |
202 | cd.suspended = false; | ||
203 | } | ||
204 | } | 194 | } |
205 | 195 | ||
206 | static struct syscore_ops sched_clock_ops = { | 196 | static struct syscore_ops sched_clock_ops = { |
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 8ae100cc655c..9255546e7bf6 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig | |||
@@ -2,18 +2,6 @@ if ARCH_SHMOBILE | |||
2 | 2 | ||
3 | comment "SH-Mobile System Type" | 3 | comment "SH-Mobile System Type" |
4 | 4 | ||
5 | config ARCH_SH7367 | ||
6 | bool "SH-Mobile G3 (SH7367)" | ||
7 | select ARCH_WANT_OPTIONAL_GPIOLIB | ||
8 | select CPU_V6 | ||
9 | select SH_CLK_CPG | ||
10 | |||
11 | config ARCH_SH7377 | ||
12 | bool "SH-Mobile G4 (SH7377)" | ||
13 | select ARCH_WANT_OPTIONAL_GPIOLIB | ||
14 | select CPU_V7 | ||
15 | select SH_CLK_CPG | ||
16 | |||
17 | config ARCH_SH7372 | 5 | config ARCH_SH7372 |
18 | bool "SH-Mobile AP4 (SH7372)" | 6 | bool "SH-Mobile AP4 (SH7372)" |
19 | select ARCH_WANT_OPTIONAL_GPIOLIB | 7 | select ARCH_WANT_OPTIONAL_GPIOLIB |
@@ -41,6 +29,8 @@ config ARCH_R8A7779 | |||
41 | select ARM_GIC | 29 | select ARM_GIC |
42 | select CPU_V7 | 30 | select CPU_V7 |
43 | select SH_CLK_CPG | 31 | select SH_CLK_CPG |
32 | select USB_ARCH_HAS_EHCI | ||
33 | select USB_ARCH_HAS_OHCI | ||
44 | 34 | ||
45 | config ARCH_EMEV2 | 35 | config ARCH_EMEV2 |
46 | bool "Emma Mobile EV2" | 36 | bool "Emma Mobile EV2" |
@@ -50,17 +40,6 @@ config ARCH_EMEV2 | |||
50 | 40 | ||
51 | comment "SH-Mobile Board Type" | 41 | comment "SH-Mobile Board Type" |
52 | 42 | ||
53 | config MACH_G3EVM | ||
54 | bool "G3EVM board" | ||
55 | depends on ARCH_SH7367 | ||
56 | select ARCH_REQUIRE_GPIOLIB | ||
57 | |||
58 | config MACH_G4EVM | ||
59 | bool "G4EVM board" | ||
60 | depends on ARCH_SH7377 | ||
61 | select ARCH_REQUIRE_GPIOLIB | ||
62 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
63 | |||
64 | config MACH_AP4EVB | 43 | config MACH_AP4EVB |
65 | bool "AP4EVB board" | 44 | bool "AP4EVB board" |
66 | depends on ARCH_SH7372 | 45 | depends on ARCH_SH7372 |
@@ -95,6 +74,7 @@ config MACH_MACKEREL | |||
95 | select ARCH_REQUIRE_GPIOLIB | 74 | select ARCH_REQUIRE_GPIOLIB |
96 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | 75 | select REGULATOR_FIXED_VOLTAGE if REGULATOR |
97 | select SND_SOC_AK4642 if SND_SIMPLE_CARD | 76 | select SND_SOC_AK4642 if SND_SIMPLE_CARD |
77 | select USE_OF | ||
98 | 78 | ||
99 | config MACH_KOTA2 | 79 | config MACH_KOTA2 |
100 | bool "KOTA2 board" | 80 | bool "KOTA2 board" |
@@ -146,8 +126,7 @@ menu "Memory configuration" | |||
146 | 126 | ||
147 | config MEMORY_START | 127 | config MEMORY_START |
148 | hex "Physical memory start address" | 128 | hex "Physical memory start address" |
149 | default "0x50000000" if MACH_G3EVM | 129 | default "0x40000000" if MACH_AP4EVB || MACH_AG5EVM || \ |
150 | default "0x40000000" if MACH_G4EVM || MACH_AP4EVB || MACH_AG5EVM || \ | ||
151 | MACH_MACKEREL || MACH_BONITO || \ | 130 | MACH_MACKEREL || MACH_BONITO || \ |
152 | MACH_ARMADILLO800EVA | 131 | MACH_ARMADILLO800EVA |
153 | default "0x41000000" if MACH_KOTA2 | 132 | default "0x41000000" if MACH_KOTA2 |
@@ -159,8 +138,6 @@ config MEMORY_START | |||
159 | 138 | ||
160 | config MEMORY_SIZE | 139 | config MEMORY_SIZE |
161 | hex "Physical memory size" | 140 | hex "Physical memory size" |
162 | default "0x08000000" if MACH_G3EVM | ||
163 | default "0x08000000" if MACH_G4EVM | ||
164 | default "0x20000000" if MACH_AG5EVM || MACH_BONITO || \ | 141 | default "0x20000000" if MACH_AG5EVM || MACH_BONITO || \ |
165 | MACH_ARMADILLO800EVA | 142 | MACH_ARMADILLO800EVA |
166 | default "0x1e000000" if MACH_KOTA2 | 143 | default "0x1e000000" if MACH_KOTA2 |
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index fe2c97c179d1..0b7147928aa3 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile | |||
@@ -6,8 +6,6 @@ | |||
6 | obj-y := timer.o console.o clock.o | 6 | obj-y := timer.o console.o clock.o |
7 | 7 | ||
8 | # CPU objects | 8 | # CPU objects |
9 | obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o | ||
10 | obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7377.o intc-sh7377.o | ||
11 | obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o | 9 | obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o |
12 | obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o | 10 | obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o |
13 | obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o | 11 | obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o |
@@ -23,16 +21,12 @@ smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o | |||
23 | 21 | ||
24 | # Pinmux setup | 22 | # Pinmux setup |
25 | pfc-y := | 23 | pfc-y := |
26 | pfc-$(CONFIG_ARCH_SH7367) += pfc-sh7367.o | ||
27 | pfc-$(CONFIG_ARCH_SH7377) += pfc-sh7377.o | ||
28 | pfc-$(CONFIG_ARCH_SH7372) += pfc-sh7372.o | 24 | pfc-$(CONFIG_ARCH_SH7372) += pfc-sh7372.o |
29 | pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o | 25 | pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o |
30 | pfc-$(CONFIG_ARCH_R8A7740) += pfc-r8a7740.o | 26 | pfc-$(CONFIG_ARCH_R8A7740) += pfc-r8a7740.o |
31 | pfc-$(CONFIG_ARCH_R8A7779) += pfc-r8a7779.o | 27 | pfc-$(CONFIG_ARCH_R8A7779) += pfc-r8a7779.o |
32 | 28 | ||
33 | # IRQ objects | 29 | # IRQ objects |
34 | obj-$(CONFIG_ARCH_SH7367) += entry-intc.o | ||
35 | obj-$(CONFIG_ARCH_SH7377) += entry-intc.o | ||
36 | obj-$(CONFIG_ARCH_SH7372) += entry-intc.o | 30 | obj-$(CONFIG_ARCH_SH7372) += entry-intc.o |
37 | obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o | 31 | obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o |
38 | 32 | ||
@@ -45,8 +39,6 @@ obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o | |||
45 | obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o | 39 | obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o |
46 | 40 | ||
47 | # Board objects | 41 | # Board objects |
48 | obj-$(CONFIG_MACH_G3EVM) += board-g3evm.o | ||
49 | obj-$(CONFIG_MACH_G4EVM) += board-g4evm.o | ||
50 | obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o | 42 | obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o |
51 | obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o | 43 | obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o |
52 | obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o | 44 | obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 790dc68c4312..40657854e3ad 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -658,133 +658,16 @@ static struct platform_device lcdc_device = { | |||
658 | 658 | ||
659 | /* FSI */ | 659 | /* FSI */ |
660 | #define IRQ_FSI evt2irq(0x1840) | 660 | #define IRQ_FSI evt2irq(0x1840) |
661 | static int __fsi_set_rate(struct clk *clk, long rate, int enable) | ||
662 | { | ||
663 | int ret = 0; | ||
664 | |||
665 | if (rate <= 0) | ||
666 | return ret; | ||
667 | |||
668 | if (enable) { | ||
669 | ret = clk_set_rate(clk, rate); | ||
670 | if (0 == ret) | ||
671 | ret = clk_enable(clk); | ||
672 | } else { | ||
673 | clk_disable(clk); | ||
674 | } | ||
675 | |||
676 | return ret; | ||
677 | } | ||
678 | |||
679 | static int __fsi_set_round_rate(struct clk *clk, long rate, int enable) | ||
680 | { | ||
681 | return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable); | ||
682 | } | ||
683 | |||
684 | static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable) | ||
685 | { | ||
686 | struct clk *fsia_ick; | ||
687 | struct clk *fsiack; | ||
688 | int ret = -EIO; | ||
689 | |||
690 | fsia_ick = clk_get(dev, "icka"); | ||
691 | if (IS_ERR(fsia_ick)) | ||
692 | return PTR_ERR(fsia_ick); | ||
693 | |||
694 | /* | ||
695 | * FSIACK is connected to AK4642, | ||
696 | * and use external clock pin from it. | ||
697 | * it is parent of fsia_ick now. | ||
698 | */ | ||
699 | fsiack = clk_get_parent(fsia_ick); | ||
700 | if (!fsiack) | ||
701 | goto fsia_ick_out; | ||
702 | |||
703 | /* | ||
704 | * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick | ||
705 | * | ||
706 | ** FIXME ** | ||
707 | * Because the freq_table of external clk (fsiack) are all 0, | ||
708 | * the return value of clk_round_rate became 0. | ||
709 | * So, it use __fsi_set_rate here. | ||
710 | */ | ||
711 | ret = __fsi_set_rate(fsiack, rate, enable); | ||
712 | if (ret < 0) | ||
713 | goto fsiack_out; | ||
714 | |||
715 | ret = __fsi_set_round_rate(fsia_ick, rate, enable); | ||
716 | if ((ret < 0) && enable) | ||
717 | __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */ | ||
718 | |||
719 | fsiack_out: | ||
720 | clk_put(fsiack); | ||
721 | |||
722 | fsia_ick_out: | ||
723 | clk_put(fsia_ick); | ||
724 | |||
725 | return 0; | ||
726 | } | ||
727 | |||
728 | static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable) | ||
729 | { | ||
730 | struct clk *fsib_clk; | ||
731 | struct clk *fdiv_clk = &sh7372_fsidivb_clk; | ||
732 | long fsib_rate = 0; | ||
733 | long fdiv_rate = 0; | ||
734 | int ackmd_bpfmd; | ||
735 | int ret; | ||
736 | |||
737 | switch (rate) { | ||
738 | case 44100: | ||
739 | fsib_rate = rate * 256; | ||
740 | ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | ||
741 | break; | ||
742 | case 48000: | ||
743 | fsib_rate = 85428000; /* around 48kHz x 256 x 7 */ | ||
744 | fdiv_rate = rate * 256; | ||
745 | ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | ||
746 | break; | ||
747 | default: | ||
748 | pr_err("unsupported rate in FSI2 port B\n"); | ||
749 | return -EINVAL; | ||
750 | } | ||
751 | |||
752 | /* FSI B setting */ | ||
753 | fsib_clk = clk_get(dev, "ickb"); | ||
754 | if (IS_ERR(fsib_clk)) | ||
755 | return -EIO; | ||
756 | |||
757 | ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable); | ||
758 | if (ret < 0) | ||
759 | goto fsi_set_rate_end; | ||
760 | |||
761 | /* FSI DIV setting */ | ||
762 | ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable); | ||
763 | if (ret < 0) { | ||
764 | /* disable FSI B */ | ||
765 | if (enable) | ||
766 | __fsi_set_round_rate(fsib_clk, fsib_rate, 0); | ||
767 | goto fsi_set_rate_end; | ||
768 | } | ||
769 | |||
770 | ret = ackmd_bpfmd; | ||
771 | |||
772 | fsi_set_rate_end: | ||
773 | clk_put(fsib_clk); | ||
774 | return ret; | ||
775 | } | ||
776 | |||
777 | static struct sh_fsi_platform_info fsi_info = { | 661 | static struct sh_fsi_platform_info fsi_info = { |
778 | .port_a = { | 662 | .port_a = { |
779 | .flags = SH_FSI_BRS_INV, | 663 | .flags = SH_FSI_BRS_INV, |
780 | .set_rate = fsi_ak4642_set_rate, | ||
781 | }, | 664 | }, |
782 | .port_b = { | 665 | .port_b = { |
783 | .flags = SH_FSI_BRS_INV | | 666 | .flags = SH_FSI_BRS_INV | |
784 | SH_FSI_BRM_INV | | 667 | SH_FSI_BRM_INV | |
785 | SH_FSI_LRS_INV | | 668 | SH_FSI_LRS_INV | |
669 | SH_FSI_CLK_CPG | | ||
786 | SH_FSI_FMT_SPDIF, | 670 | SH_FSI_FMT_SPDIF, |
787 | .set_rate = fsi_hdmi_set_rate, | ||
788 | }, | 671 | }, |
789 | }; | 672 | }; |
790 | 673 | ||
@@ -1144,25 +1027,6 @@ out: | |||
1144 | clk_put(hdmi_ick); | 1027 | clk_put(hdmi_ick); |
1145 | } | 1028 | } |
1146 | 1029 | ||
1147 | static void __init fsi_init_pm_clock(void) | ||
1148 | { | ||
1149 | struct clk *fsia_ick; | ||
1150 | int ret; | ||
1151 | |||
1152 | fsia_ick = clk_get(&fsi_device.dev, "icka"); | ||
1153 | if (IS_ERR(fsia_ick)) { | ||
1154 | ret = PTR_ERR(fsia_ick); | ||
1155 | pr_err("Cannot get FSI ICK: %d\n", ret); | ||
1156 | return; | ||
1157 | } | ||
1158 | |||
1159 | ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); | ||
1160 | if (ret < 0) | ||
1161 | pr_err("Cannot set FSI-A parent: %d\n", ret); | ||
1162 | |||
1163 | clk_put(fsia_ick); | ||
1164 | } | ||
1165 | |||
1166 | /* TouchScreen */ | 1030 | /* TouchScreen */ |
1167 | #ifdef CONFIG_AP4EVB_QHD | 1031 | #ifdef CONFIG_AP4EVB_QHD |
1168 | # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123 | 1032 | # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123 |
@@ -1476,7 +1340,6 @@ static void __init ap4evb_init(void) | |||
1476 | ARRAY_SIZE(domain_devices)); | 1340 | ARRAY_SIZE(domain_devices)); |
1477 | 1341 | ||
1478 | hdmi_init_pm_clock(); | 1342 | hdmi_init_pm_clock(); |
1479 | fsi_init_pm_clock(); | ||
1480 | sh7372_pm_init(); | 1343 | sh7372_pm_init(); |
1481 | pm_clk_add(&fsi_device.dev, "spu2"); | 1344 | pm_clk_add(&fsi_device.dev, "spu2"); |
1482 | pm_clk_add(&lcdc1_device.dev, "hdmi"); | 1345 | pm_clk_add(&lcdc1_device.dev, "hdmi"); |
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index 3cc8b1c21da9..5353adf6b828 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c | |||
@@ -768,32 +768,6 @@ static struct platform_device ceu0_device = { | |||
768 | }; | 768 | }; |
769 | 769 | ||
770 | /* FSI */ | 770 | /* FSI */ |
771 | static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable) | ||
772 | { | ||
773 | struct clk *fsib; | ||
774 | int ret; | ||
775 | |||
776 | /* it support 48KHz only */ | ||
777 | if (48000 != rate) | ||
778 | return -EINVAL; | ||
779 | |||
780 | fsib = clk_get(dev, "ickb"); | ||
781 | if (IS_ERR(fsib)) | ||
782 | return -EINVAL; | ||
783 | |||
784 | if (enable) { | ||
785 | ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | ||
786 | clk_enable(fsib); | ||
787 | } else { | ||
788 | ret = 0; | ||
789 | clk_disable(fsib); | ||
790 | } | ||
791 | |||
792 | clk_put(fsib); | ||
793 | |||
794 | return ret; | ||
795 | } | ||
796 | |||
797 | static struct sh_fsi_platform_info fsi_info = { | 771 | static struct sh_fsi_platform_info fsi_info = { |
798 | /* FSI-WM8978 */ | 772 | /* FSI-WM8978 */ |
799 | .port_a = { | 773 | .port_a = { |
@@ -802,8 +776,8 @@ static struct sh_fsi_platform_info fsi_info = { | |||
802 | /* FSI-HDMI */ | 776 | /* FSI-HDMI */ |
803 | .port_b = { | 777 | .port_b = { |
804 | .flags = SH_FSI_FMT_SPDIF | | 778 | .flags = SH_FSI_FMT_SPDIF | |
805 | SH_FSI_ENABLE_STREAM_MODE, | 779 | SH_FSI_ENABLE_STREAM_MODE | |
806 | .set_rate = fsi_hdmi_set_rate, | 780 | SH_FSI_CLK_CPG, |
807 | .tx_id = SHDMA_SLAVE_FSIB_TX, | 781 | .tx_id = SHDMA_SLAVE_FSIB_TX, |
808 | } | 782 | } |
809 | }; | 783 | }; |
@@ -938,13 +912,11 @@ static void __init eva_clock_init(void) | |||
938 | struct clk *xtal1 = clk_get(NULL, "extal1"); | 912 | struct clk *xtal1 = clk_get(NULL, "extal1"); |
939 | struct clk *usb24s = clk_get(NULL, "usb24s"); | 913 | struct clk *usb24s = clk_get(NULL, "usb24s"); |
940 | struct clk *fsibck = clk_get(NULL, "fsibck"); | 914 | struct clk *fsibck = clk_get(NULL, "fsibck"); |
941 | struct clk *fsib = clk_get(&fsi_device.dev, "ickb"); | ||
942 | 915 | ||
943 | if (IS_ERR(system) || | 916 | if (IS_ERR(system) || |
944 | IS_ERR(xtal1) || | 917 | IS_ERR(xtal1) || |
945 | IS_ERR(usb24s) || | 918 | IS_ERR(usb24s) || |
946 | IS_ERR(fsibck) || | 919 | IS_ERR(fsibck)) { |
947 | IS_ERR(fsib)) { | ||
948 | pr_err("armadillo800eva board clock init failed\n"); | 920 | pr_err("armadillo800eva board clock init failed\n"); |
949 | goto clock_error; | 921 | goto clock_error; |
950 | } | 922 | } |
@@ -956,9 +928,7 @@ static void __init eva_clock_init(void) | |||
956 | clk_set_parent(usb24s, system); | 928 | clk_set_parent(usb24s, system); |
957 | 929 | ||
958 | /* FSIBCK is 12.288MHz, and it is parent of FSI-B */ | 930 | /* FSIBCK is 12.288MHz, and it is parent of FSI-B */ |
959 | clk_set_parent(fsib, fsibck); | ||
960 | clk_set_rate(fsibck, 12288000); | 931 | clk_set_rate(fsibck, 12288000); |
961 | clk_set_rate(fsib, 12288000); | ||
962 | 932 | ||
963 | clock_error: | 933 | clock_error: |
964 | if (!IS_ERR(system)) | 934 | if (!IS_ERR(system)) |
@@ -969,8 +939,6 @@ clock_error: | |||
969 | clk_put(usb24s); | 939 | clk_put(usb24s); |
970 | if (!IS_ERR(fsibck)) | 940 | if (!IS_ERR(fsibck)) |
971 | clk_put(fsibck); | 941 | clk_put(fsibck); |
972 | if (!IS_ERR(fsib)) | ||
973 | clk_put(fsib); | ||
974 | } | 942 | } |
975 | 943 | ||
976 | /* | 944 | /* |
@@ -1229,6 +1197,13 @@ static void __init eva_add_early_devices(void) | |||
1229 | shmobile_timer.init = eva_earlytimer_init; | 1197 | shmobile_timer.init = eva_earlytimer_init; |
1230 | } | 1198 | } |
1231 | 1199 | ||
1200 | #define RESCNT2 IOMEM(0xe6188020) | ||
1201 | static void eva_restart(char mode, const char *cmd) | ||
1202 | { | ||
1203 | /* Do soft power on reset */ | ||
1204 | writel((1 << 31), RESCNT2); | ||
1205 | } | ||
1206 | |||
1232 | static const char *eva_boards_compat_dt[] __initdata = { | 1207 | static const char *eva_boards_compat_dt[] __initdata = { |
1233 | "renesas,armadillo800eva", | 1208 | "renesas,armadillo800eva", |
1234 | NULL, | 1209 | NULL, |
@@ -1243,4 +1218,5 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva") | |||
1243 | .init_late = shmobile_init_late, | 1218 | .init_late = shmobile_init_late, |
1244 | .timer = &shmobile_timer, | 1219 | .timer = &shmobile_timer, |
1245 | .dt_compat = eva_boards_compat_dt, | 1220 | .dt_compat = eva_boards_compat_dt, |
1221 | .restart = eva_restart, | ||
1246 | MACHINE_END | 1222 | MACHINE_END |
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c deleted file mode 100644 index b179d4c213bb..000000000000 --- a/arch/arm/mach-shmobile/board-g3evm.c +++ /dev/null | |||
@@ -1,343 +0,0 @@ | |||
1 | /* | ||
2 | * G3EVM board support | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * Copyright (C) 2008 Yoshihiro Shimoda | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/interrupt.h> | ||
23 | #include <linux/irq.h> | ||
24 | #include <linux/platform_device.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/mtd/mtd.h> | ||
27 | #include <linux/mtd/partitions.h> | ||
28 | #include <linux/mtd/physmap.h> | ||
29 | #include <linux/mtd/sh_flctl.h> | ||
30 | #include <linux/usb/r8a66597.h> | ||
31 | #include <linux/io.h> | ||
32 | #include <linux/gpio.h> | ||
33 | #include <linux/input.h> | ||
34 | #include <linux/input/sh_keysc.h> | ||
35 | #include <linux/dma-mapping.h> | ||
36 | #include <mach/irqs.h> | ||
37 | #include <mach/sh7367.h> | ||
38 | #include <mach/common.h> | ||
39 | #include <asm/mach-types.h> | ||
40 | #include <asm/mach/arch.h> | ||
41 | |||
42 | /* | ||
43 | * IrDA | ||
44 | * | ||
45 | * S67: 5bit : ON power | ||
46 | * : 6bit : ON remote control | ||
47 | * OFF IrDA | ||
48 | */ | ||
49 | |||
50 | static struct mtd_partition nor_flash_partitions[] = { | ||
51 | { | ||
52 | .name = "loader", | ||
53 | .offset = 0x00000000, | ||
54 | .size = 512 * 1024, | ||
55 | }, | ||
56 | { | ||
57 | .name = "bootenv", | ||
58 | .offset = MTDPART_OFS_APPEND, | ||
59 | .size = 512 * 1024, | ||
60 | }, | ||
61 | { | ||
62 | .name = "kernel_ro", | ||
63 | .offset = MTDPART_OFS_APPEND, | ||
64 | .size = 8 * 1024 * 1024, | ||
65 | .mask_flags = MTD_WRITEABLE, | ||
66 | }, | ||
67 | { | ||
68 | .name = "kernel", | ||
69 | .offset = MTDPART_OFS_APPEND, | ||
70 | .size = 8 * 1024 * 1024, | ||
71 | }, | ||
72 | { | ||
73 | .name = "data", | ||
74 | .offset = MTDPART_OFS_APPEND, | ||
75 | .size = MTDPART_SIZ_FULL, | ||
76 | }, | ||
77 | }; | ||
78 | |||
79 | static struct physmap_flash_data nor_flash_data = { | ||
80 | .width = 2, | ||
81 | .parts = nor_flash_partitions, | ||
82 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), | ||
83 | }; | ||
84 | |||
85 | static struct resource nor_flash_resources[] = { | ||
86 | [0] = { | ||
87 | .start = 0x00000000, | ||
88 | .end = 0x08000000 - 1, | ||
89 | .flags = IORESOURCE_MEM, | ||
90 | } | ||
91 | }; | ||
92 | |||
93 | static struct platform_device nor_flash_device = { | ||
94 | .name = "physmap-flash", | ||
95 | .dev = { | ||
96 | .platform_data = &nor_flash_data, | ||
97 | }, | ||
98 | .num_resources = ARRAY_SIZE(nor_flash_resources), | ||
99 | .resource = nor_flash_resources, | ||
100 | }; | ||
101 | |||
102 | /* USBHS */ | ||
103 | static void usb_host_port_power(int port, int power) | ||
104 | { | ||
105 | if (!power) /* only power-on supported for now */ | ||
106 | return; | ||
107 | |||
108 | /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */ | ||
109 | __raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008)); | ||
110 | } | ||
111 | |||
112 | static struct r8a66597_platdata usb_host_data = { | ||
113 | .on_chip = 1, | ||
114 | .port_power = usb_host_port_power, | ||
115 | }; | ||
116 | |||
117 | static struct resource usb_host_resources[] = { | ||
118 | [0] = { | ||
119 | .name = "USBHS", | ||
120 | .start = 0xe6890000, | ||
121 | .end = 0xe68900e5, | ||
122 | .flags = IORESOURCE_MEM, | ||
123 | }, | ||
124 | [1] = { | ||
125 | .start = evt2irq(0xa20), /* USBHS_USHI0 */ | ||
126 | .flags = IORESOURCE_IRQ, | ||
127 | }, | ||
128 | }; | ||
129 | |||
130 | static struct platform_device usb_host_device = { | ||
131 | .name = "r8a66597_hcd", | ||
132 | .id = 0, | ||
133 | .dev = { | ||
134 | .platform_data = &usb_host_data, | ||
135 | .dma_mask = NULL, | ||
136 | .coherent_dma_mask = 0xffffffff, | ||
137 | }, | ||
138 | .num_resources = ARRAY_SIZE(usb_host_resources), | ||
139 | .resource = usb_host_resources, | ||
140 | }; | ||
141 | |||
142 | /* KEYSC */ | ||
143 | static struct sh_keysc_info keysc_info = { | ||
144 | .mode = SH_KEYSC_MODE_5, | ||
145 | .scan_timing = 3, | ||
146 | .delay = 100, | ||
147 | .keycodes = { | ||
148 | KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G, | ||
149 | KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N, | ||
150 | KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U, | ||
151 | KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP, | ||
152 | KEY_WAKEUP, KEY_COFFEE, KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, | ||
153 | KEY_5, KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER, | ||
154 | }, | ||
155 | }; | ||
156 | |||
157 | static struct resource keysc_resources[] = { | ||
158 | [0] = { | ||
159 | .name = "KEYSC", | ||
160 | .start = 0xe61b0000, | ||
161 | .end = 0xe61b000f, | ||
162 | .flags = IORESOURCE_MEM, | ||
163 | }, | ||
164 | [1] = { | ||
165 | .start = evt2irq(0xbe0), /* KEYSC_KEY */ | ||
166 | .flags = IORESOURCE_IRQ, | ||
167 | }, | ||
168 | }; | ||
169 | |||
170 | static struct platform_device keysc_device = { | ||
171 | .name = "sh_keysc", | ||
172 | .num_resources = ARRAY_SIZE(keysc_resources), | ||
173 | .resource = keysc_resources, | ||
174 | .dev = { | ||
175 | .platform_data = &keysc_info, | ||
176 | }, | ||
177 | }; | ||
178 | |||
179 | static struct mtd_partition nand_partition_info[] = { | ||
180 | { | ||
181 | .name = "system", | ||
182 | .offset = 0, | ||
183 | .size = 64 * 1024 * 1024, | ||
184 | }, | ||
185 | { | ||
186 | .name = "userdata", | ||
187 | .offset = MTDPART_OFS_APPEND, | ||
188 | .size = 128 * 1024 * 1024, | ||
189 | }, | ||
190 | { | ||
191 | .name = "cache", | ||
192 | .offset = MTDPART_OFS_APPEND, | ||
193 | .size = 64 * 1024 * 1024, | ||
194 | }, | ||
195 | }; | ||
196 | |||
197 | static struct resource nand_flash_resources[] = { | ||
198 | [0] = { | ||
199 | .start = 0xe6a30000, | ||
200 | .end = 0xe6a3009b, | ||
201 | .flags = IORESOURCE_MEM, | ||
202 | } | ||
203 | }; | ||
204 | |||
205 | static struct sh_flctl_platform_data nand_flash_data = { | ||
206 | .parts = nand_partition_info, | ||
207 | .nr_parts = ARRAY_SIZE(nand_partition_info), | ||
208 | .flcmncr_val = QTSEL_E | FCKSEL_E | TYPESEL_SET | NANWF_E | ||
209 | | SHBUSSEL | SEL_16BIT, | ||
210 | }; | ||
211 | |||
212 | static struct platform_device nand_flash_device = { | ||
213 | .name = "sh_flctl", | ||
214 | .resource = nand_flash_resources, | ||
215 | .num_resources = ARRAY_SIZE(nand_flash_resources), | ||
216 | .dev = { | ||
217 | .platform_data = &nand_flash_data, | ||
218 | }, | ||
219 | }; | ||
220 | |||
221 | static struct resource irda_resources[] = { | ||
222 | [0] = { | ||
223 | .start = 0xE6D00000, | ||
224 | .end = 0xE6D01FD4 - 1, | ||
225 | .flags = IORESOURCE_MEM, | ||
226 | }, | ||
227 | [1] = { | ||
228 | .start = evt2irq(0x480), /* IRDA */ | ||
229 | .flags = IORESOURCE_IRQ, | ||
230 | }, | ||
231 | }; | ||
232 | |||
233 | static struct platform_device irda_device = { | ||
234 | .name = "sh_irda", | ||
235 | .id = -1, | ||
236 | .resource = irda_resources, | ||
237 | .num_resources = ARRAY_SIZE(irda_resources), | ||
238 | }; | ||
239 | |||
240 | static struct platform_device *g3evm_devices[] __initdata = { | ||
241 | &nor_flash_device, | ||
242 | &usb_host_device, | ||
243 | &keysc_device, | ||
244 | &nand_flash_device, | ||
245 | &irda_device, | ||
246 | }; | ||
247 | |||
248 | static void __init g3evm_init(void) | ||
249 | { | ||
250 | sh7367_pinmux_init(); | ||
251 | |||
252 | /* Lit DS4 LED */ | ||
253 | gpio_request(GPIO_PORT22, NULL); | ||
254 | gpio_direction_output(GPIO_PORT22, 1); | ||
255 | gpio_export(GPIO_PORT22, 0); | ||
256 | |||
257 | /* Lit DS8 LED */ | ||
258 | gpio_request(GPIO_PORT23, NULL); | ||
259 | gpio_direction_output(GPIO_PORT23, 1); | ||
260 | gpio_export(GPIO_PORT23, 0); | ||
261 | |||
262 | /* Lit DS3 LED */ | ||
263 | gpio_request(GPIO_PORT24, NULL); | ||
264 | gpio_direction_output(GPIO_PORT24, 1); | ||
265 | gpio_export(GPIO_PORT24, 0); | ||
266 | |||
267 | /* SCIFA1 */ | ||
268 | gpio_request(GPIO_FN_SCIFA1_TXD, NULL); | ||
269 | gpio_request(GPIO_FN_SCIFA1_RXD, NULL); | ||
270 | gpio_request(GPIO_FN_SCIFA1_CTS, NULL); | ||
271 | gpio_request(GPIO_FN_SCIFA1_RTS, NULL); | ||
272 | |||
273 | /* USBHS */ | ||
274 | gpio_request(GPIO_FN_VBUS0, NULL); | ||
275 | gpio_request(GPIO_FN_PWEN, NULL); | ||
276 | gpio_request(GPIO_FN_OVCN, NULL); | ||
277 | gpio_request(GPIO_FN_OVCN2, NULL); | ||
278 | gpio_request(GPIO_FN_EXTLP, NULL); | ||
279 | gpio_request(GPIO_FN_IDIN, NULL); | ||
280 | |||
281 | /* setup USB phy */ | ||
282 | __raw_writew(0x0300, IOMEM(0xe605810a)); /* USBCR1 */ | ||
283 | __raw_writew(0x00e0, IOMEM(0xe60581c0)); /* CPFCH */ | ||
284 | __raw_writew(0x6010, IOMEM(0xe60581c6)); /* CGPOSR */ | ||
285 | __raw_writew(0x8a0a, IOMEM(0xe605810c)); /* USBCR2 */ | ||
286 | |||
287 | /* KEYSC @ CN7 */ | ||
288 | gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL); | ||
289 | gpio_request(GPIO_FN_PORT43_KEYOUT1, NULL); | ||
290 | gpio_request(GPIO_FN_PORT44_KEYOUT2, NULL); | ||
291 | gpio_request(GPIO_FN_PORT45_KEYOUT3, NULL); | ||
292 | gpio_request(GPIO_FN_PORT46_KEYOUT4, NULL); | ||
293 | gpio_request(GPIO_FN_PORT47_KEYOUT5, NULL); | ||
294 | gpio_request(GPIO_FN_PORT48_KEYIN0_PU, NULL); | ||
295 | gpio_request(GPIO_FN_PORT49_KEYIN1_PU, NULL); | ||
296 | gpio_request(GPIO_FN_PORT50_KEYIN2_PU, NULL); | ||
297 | gpio_request(GPIO_FN_PORT55_KEYIN3_PU, NULL); | ||
298 | gpio_request(GPIO_FN_PORT56_KEYIN4_PU, NULL); | ||
299 | gpio_request(GPIO_FN_PORT57_KEYIN5_PU, NULL); | ||
300 | gpio_request(GPIO_FN_PORT58_KEYIN6_PU, NULL); | ||
301 | |||
302 | /* FLCTL */ | ||
303 | gpio_request(GPIO_FN_FCE0, NULL); | ||
304 | gpio_request(GPIO_FN_D0_ED0_NAF0, NULL); | ||
305 | gpio_request(GPIO_FN_D1_ED1_NAF1, NULL); | ||
306 | gpio_request(GPIO_FN_D2_ED2_NAF2, NULL); | ||
307 | gpio_request(GPIO_FN_D3_ED3_NAF3, NULL); | ||
308 | gpio_request(GPIO_FN_D4_ED4_NAF4, NULL); | ||
309 | gpio_request(GPIO_FN_D5_ED5_NAF5, NULL); | ||
310 | gpio_request(GPIO_FN_D6_ED6_NAF6, NULL); | ||
311 | gpio_request(GPIO_FN_D7_ED7_NAF7, NULL); | ||
312 | gpio_request(GPIO_FN_D8_ED8_NAF8, NULL); | ||
313 | gpio_request(GPIO_FN_D9_ED9_NAF9, NULL); | ||
314 | gpio_request(GPIO_FN_D10_ED10_NAF10, NULL); | ||
315 | gpio_request(GPIO_FN_D11_ED11_NAF11, NULL); | ||
316 | gpio_request(GPIO_FN_D12_ED12_NAF12, NULL); | ||
317 | gpio_request(GPIO_FN_D13_ED13_NAF13, NULL); | ||
318 | gpio_request(GPIO_FN_D14_ED14_NAF14, NULL); | ||
319 | gpio_request(GPIO_FN_D15_ED15_NAF15, NULL); | ||
320 | gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL); | ||
321 | gpio_request(GPIO_FN_FRB, NULL); | ||
322 | /* FOE, FCDE, FSC on dedicated pins */ | ||
323 | __raw_writel(__raw_readl(IOMEM(0xe6158048)) & ~(1 << 15), IOMEM(0xe6158048)); | ||
324 | |||
325 | /* IrDA */ | ||
326 | gpio_request(GPIO_FN_IRDA_OUT, NULL); | ||
327 | gpio_request(GPIO_FN_IRDA_IN, NULL); | ||
328 | gpio_request(GPIO_FN_IRDA_FIRSEL, NULL); | ||
329 | |||
330 | sh7367_add_standard_devices(); | ||
331 | |||
332 | platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices)); | ||
333 | } | ||
334 | |||
335 | MACHINE_START(G3EVM, "g3evm") | ||
336 | .map_io = sh7367_map_io, | ||
337 | .init_early = sh7367_add_early_devices, | ||
338 | .init_irq = sh7367_init_irq, | ||
339 | .handle_irq = shmobile_handle_irq_intc, | ||
340 | .init_machine = g3evm_init, | ||
341 | .init_late = shmobile_init_late, | ||
342 | .timer = &shmobile_timer, | ||
343 | MACHINE_END | ||
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c deleted file mode 100644 index 35c126caa4d8..000000000000 --- a/arch/arm/mach-shmobile/board-g4evm.c +++ /dev/null | |||
@@ -1,384 +0,0 @@ | |||
1 | /* | ||
2 | * G4EVM board support | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * Copyright (C) 2008 Yoshihiro Shimoda | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/interrupt.h> | ||
23 | #include <linux/irq.h> | ||
24 | #include <linux/platform_device.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/mtd/mtd.h> | ||
27 | #include <linux/mtd/partitions.h> | ||
28 | #include <linux/mtd/physmap.h> | ||
29 | #include <linux/regulator/fixed.h> | ||
30 | #include <linux/regulator/machine.h> | ||
31 | #include <linux/usb/r8a66597.h> | ||
32 | #include <linux/io.h> | ||
33 | #include <linux/input.h> | ||
34 | #include <linux/input/sh_keysc.h> | ||
35 | #include <linux/mmc/host.h> | ||
36 | #include <linux/mmc/sh_mobile_sdhi.h> | ||
37 | #include <linux/gpio.h> | ||
38 | #include <linux/dma-mapping.h> | ||
39 | #include <mach/irqs.h> | ||
40 | #include <mach/sh7377.h> | ||
41 | #include <mach/common.h> | ||
42 | #include <asm/mach-types.h> | ||
43 | #include <asm/mach/arch.h> | ||
44 | |||
45 | #include "sh-gpio.h" | ||
46 | |||
47 | /* | ||
48 | * SDHI | ||
49 | * | ||
50 | * SDHI0 : card detection is possible | ||
51 | * SDHI1 : card detection is impossible | ||
52 | * | ||
53 | * [G4-MAIN-BOARD] | ||
54 | * JP74 : short # DBG_2V8A for SDHI0 | ||
55 | * JP75 : NC # DBG_3V3A for SDHI0 | ||
56 | * JP76 : NC # DBG_3V3A_SD for SDHI0 | ||
57 | * JP77 : NC # 3V3A_SDIO for SDHI1 | ||
58 | * JP78 : short # DBG_2V8A for SDHI1 | ||
59 | * JP79 : NC # DBG_3V3A for SDHI1 | ||
60 | * JP80 : NC # DBG_3V3A_SD for SDHI1 | ||
61 | * | ||
62 | * [G4-CORE-BOARD] | ||
63 | * S32 : all off # to dissever from G3-CORE_DBG board | ||
64 | * S33 : all off # to dissever from G3-CORE_DBG board | ||
65 | * | ||
66 | * [G3-CORE_DBG-BOARD] | ||
67 | * S1 : all off # to dissever from G3-CORE_DBG board | ||
68 | * S3 : all off # to dissever from G3-CORE_DBG board | ||
69 | * S4 : all off # to dissever from G3-CORE_DBG board | ||
70 | */ | ||
71 | |||
72 | static struct mtd_partition nor_flash_partitions[] = { | ||
73 | { | ||
74 | .name = "loader", | ||
75 | .offset = 0x00000000, | ||
76 | .size = 512 * 1024, | ||
77 | }, | ||
78 | { | ||
79 | .name = "bootenv", | ||
80 | .offset = MTDPART_OFS_APPEND, | ||
81 | .size = 512 * 1024, | ||
82 | }, | ||
83 | { | ||
84 | .name = "kernel_ro", | ||
85 | .offset = MTDPART_OFS_APPEND, | ||
86 | .size = 8 * 1024 * 1024, | ||
87 | .mask_flags = MTD_WRITEABLE, | ||
88 | }, | ||
89 | { | ||
90 | .name = "kernel", | ||
91 | .offset = MTDPART_OFS_APPEND, | ||
92 | .size = 8 * 1024 * 1024, | ||
93 | }, | ||
94 | { | ||
95 | .name = "data", | ||
96 | .offset = MTDPART_OFS_APPEND, | ||
97 | .size = MTDPART_SIZ_FULL, | ||
98 | }, | ||
99 | }; | ||
100 | |||
101 | static struct physmap_flash_data nor_flash_data = { | ||
102 | .width = 2, | ||
103 | .parts = nor_flash_partitions, | ||
104 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), | ||
105 | }; | ||
106 | |||
107 | static struct resource nor_flash_resources[] = { | ||
108 | [0] = { | ||
109 | .start = 0x00000000, | ||
110 | .end = 0x08000000 - 1, | ||
111 | .flags = IORESOURCE_MEM, | ||
112 | } | ||
113 | }; | ||
114 | |||
115 | static struct platform_device nor_flash_device = { | ||
116 | .name = "physmap-flash", | ||
117 | .dev = { | ||
118 | .platform_data = &nor_flash_data, | ||
119 | }, | ||
120 | .num_resources = ARRAY_SIZE(nor_flash_resources), | ||
121 | .resource = nor_flash_resources, | ||
122 | }; | ||
123 | |||
124 | /* USBHS */ | ||
125 | static void usb_host_port_power(int port, int power) | ||
126 | { | ||
127 | if (!power) /* only power-on supported for now */ | ||
128 | return; | ||
129 | |||
130 | /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */ | ||
131 | __raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008)); | ||
132 | } | ||
133 | |||
134 | static struct r8a66597_platdata usb_host_data = { | ||
135 | .on_chip = 1, | ||
136 | .port_power = usb_host_port_power, | ||
137 | }; | ||
138 | |||
139 | static struct resource usb_host_resources[] = { | ||
140 | [0] = { | ||
141 | .name = "USBHS", | ||
142 | .start = 0xe6890000, | ||
143 | .end = 0xe68900e5, | ||
144 | .flags = IORESOURCE_MEM, | ||
145 | }, | ||
146 | [1] = { | ||
147 | .start = evt2irq(0x0a20), /* USBHS_USHI0 */ | ||
148 | .flags = IORESOURCE_IRQ, | ||
149 | }, | ||
150 | }; | ||
151 | |||
152 | static struct platform_device usb_host_device = { | ||
153 | .name = "r8a66597_hcd", | ||
154 | .id = 0, | ||
155 | .dev = { | ||
156 | .platform_data = &usb_host_data, | ||
157 | .dma_mask = NULL, | ||
158 | .coherent_dma_mask = 0xffffffff, | ||
159 | }, | ||
160 | .num_resources = ARRAY_SIZE(usb_host_resources), | ||
161 | .resource = usb_host_resources, | ||
162 | }; | ||
163 | |||
164 | /* KEYSC */ | ||
165 | static struct sh_keysc_info keysc_info = { | ||
166 | .mode = SH_KEYSC_MODE_5, | ||
167 | .scan_timing = 3, | ||
168 | .delay = 100, | ||
169 | .keycodes = { | ||
170 | KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, | ||
171 | KEY_G, KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, | ||
172 | KEY_M, KEY_N, KEY_U, KEY_P, KEY_Q, KEY_R, | ||
173 | KEY_S, KEY_T, KEY_U, KEY_V, KEY_W, KEY_X, | ||
174 | KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, | ||
175 | KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, | ||
176 | KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER, | ||
177 | }, | ||
178 | }; | ||
179 | |||
180 | static struct resource keysc_resources[] = { | ||
181 | [0] = { | ||
182 | .name = "KEYSC", | ||
183 | .start = 0xe61b0000, | ||
184 | .end = 0xe61b000f, | ||
185 | .flags = IORESOURCE_MEM, | ||
186 | }, | ||
187 | [1] = { | ||
188 | .start = evt2irq(0x0be0), /* KEYSC_KEY */ | ||
189 | .flags = IORESOURCE_IRQ, | ||
190 | }, | ||
191 | }; | ||
192 | |||
193 | static struct platform_device keysc_device = { | ||
194 | .name = "sh_keysc", | ||
195 | .id = 0, /* keysc0 clock */ | ||
196 | .num_resources = ARRAY_SIZE(keysc_resources), | ||
197 | .resource = keysc_resources, | ||
198 | .dev = { | ||
199 | .platform_data = &keysc_info, | ||
200 | }, | ||
201 | }; | ||
202 | |||
203 | /* Fixed 3.3V regulator to be used by SDHI0 and SDHI1 */ | ||
204 | static struct regulator_consumer_supply fixed3v3_power_consumers[] = | ||
205 | { | ||
206 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), | ||
207 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), | ||
208 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), | ||
209 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), | ||
210 | }; | ||
211 | |||
212 | /* SDHI */ | ||
213 | static struct sh_mobile_sdhi_info sdhi0_info = { | ||
214 | .tmio_caps = MMC_CAP_SDIO_IRQ, | ||
215 | }; | ||
216 | |||
217 | static struct resource sdhi0_resources[] = { | ||
218 | [0] = { | ||
219 | .name = "SDHI0", | ||
220 | .start = 0xe6d50000, | ||
221 | .end = 0xe6d500ff, | ||
222 | .flags = IORESOURCE_MEM, | ||
223 | }, | ||
224 | [1] = { | ||
225 | .start = evt2irq(0x0e00), /* SDHI0 */ | ||
226 | .flags = IORESOURCE_IRQ, | ||
227 | }, | ||
228 | }; | ||
229 | |||
230 | static struct platform_device sdhi0_device = { | ||
231 | .name = "sh_mobile_sdhi", | ||
232 | .num_resources = ARRAY_SIZE(sdhi0_resources), | ||
233 | .resource = sdhi0_resources, | ||
234 | .id = 0, | ||
235 | .dev = { | ||
236 | .platform_data = &sdhi0_info, | ||
237 | }, | ||
238 | }; | ||
239 | |||
240 | static struct sh_mobile_sdhi_info sdhi1_info = { | ||
241 | .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, | ||
242 | }; | ||
243 | |||
244 | static struct resource sdhi1_resources[] = { | ||
245 | [0] = { | ||
246 | .name = "SDHI1", | ||
247 | .start = 0xe6d60000, | ||
248 | .end = 0xe6d600ff, | ||
249 | .flags = IORESOURCE_MEM, | ||
250 | }, | ||
251 | [1] = { | ||
252 | .start = evt2irq(0x0e80), /* SDHI1 */ | ||
253 | .flags = IORESOURCE_IRQ, | ||
254 | }, | ||
255 | }; | ||
256 | |||
257 | static struct platform_device sdhi1_device = { | ||
258 | .name = "sh_mobile_sdhi", | ||
259 | .num_resources = ARRAY_SIZE(sdhi1_resources), | ||
260 | .resource = sdhi1_resources, | ||
261 | .id = 1, | ||
262 | .dev = { | ||
263 | .platform_data = &sdhi1_info, | ||
264 | }, | ||
265 | }; | ||
266 | |||
267 | static struct platform_device *g4evm_devices[] __initdata = { | ||
268 | &nor_flash_device, | ||
269 | &usb_host_device, | ||
270 | &keysc_device, | ||
271 | &sdhi0_device, | ||
272 | &sdhi1_device, | ||
273 | }; | ||
274 | |||
275 | #define GPIO_SDHID0_D0 IOMEM(0xe60520fc) | ||
276 | #define GPIO_SDHID0_D1 IOMEM(0xe60520fd) | ||
277 | #define GPIO_SDHID0_D2 IOMEM(0xe60520fe) | ||
278 | #define GPIO_SDHID0_D3 IOMEM(0xe60520ff) | ||
279 | #define GPIO_SDHICMD0 IOMEM(0xe6052100) | ||
280 | |||
281 | #define GPIO_SDHID1_D0 IOMEM(0xe6052103) | ||
282 | #define GPIO_SDHID1_D1 IOMEM(0xe6052104) | ||
283 | #define GPIO_SDHID1_D2 IOMEM(0xe6052105) | ||
284 | #define GPIO_SDHID1_D3 IOMEM(0xe6052106) | ||
285 | #define GPIO_SDHICMD1 IOMEM(0xe6052107) | ||
286 | |||
287 | static void __init g4evm_init(void) | ||
288 | { | ||
289 | regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, | ||
290 | ARRAY_SIZE(fixed3v3_power_consumers), 3300000); | ||
291 | |||
292 | sh7377_pinmux_init(); | ||
293 | |||
294 | /* Lit DS14 LED */ | ||
295 | gpio_request(GPIO_PORT109, NULL); | ||
296 | gpio_direction_output(GPIO_PORT109, 1); | ||
297 | gpio_export(GPIO_PORT109, 1); | ||
298 | |||
299 | /* Lit DS15 LED */ | ||
300 | gpio_request(GPIO_PORT110, NULL); | ||
301 | gpio_direction_output(GPIO_PORT110, 1); | ||
302 | gpio_export(GPIO_PORT110, 1); | ||
303 | |||
304 | /* Lit DS16 LED */ | ||
305 | gpio_request(GPIO_PORT112, NULL); | ||
306 | gpio_direction_output(GPIO_PORT112, 1); | ||
307 | gpio_export(GPIO_PORT112, 1); | ||
308 | |||
309 | /* Lit DS17 LED */ | ||
310 | gpio_request(GPIO_PORT113, NULL); | ||
311 | gpio_direction_output(GPIO_PORT113, 1); | ||
312 | gpio_export(GPIO_PORT113, 1); | ||
313 | |||
314 | /* USBHS */ | ||
315 | gpio_request(GPIO_FN_VBUS_0, NULL); | ||
316 | gpio_request(GPIO_FN_PWEN, NULL); | ||
317 | gpio_request(GPIO_FN_OVCN, NULL); | ||
318 | gpio_request(GPIO_FN_OVCN2, NULL); | ||
319 | gpio_request(GPIO_FN_EXTLP, NULL); | ||
320 | gpio_request(GPIO_FN_IDIN, NULL); | ||
321 | |||
322 | /* setup USB phy */ | ||
323 | __raw_writew(0x0200, IOMEM(0xe605810a)); /* USBCR1 */ | ||
324 | __raw_writew(0x00e0, IOMEM(0xe60581c0)); /* CPFCH */ | ||
325 | __raw_writew(0x6010, IOMEM(0xe60581c6)); /* CGPOSR */ | ||
326 | __raw_writew(0x8a0a, IOMEM(0xe605810c)); /* USBCR2 */ | ||
327 | |||
328 | /* KEYSC @ CN31 */ | ||
329 | gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL); | ||
330 | gpio_request(GPIO_FN_PORT61_KEYOUT4, NULL); | ||
331 | gpio_request(GPIO_FN_PORT62_KEYOUT3, NULL); | ||
332 | gpio_request(GPIO_FN_PORT63_KEYOUT2, NULL); | ||
333 | gpio_request(GPIO_FN_PORT64_KEYOUT1, NULL); | ||
334 | gpio_request(GPIO_FN_PORT65_KEYOUT0, NULL); | ||
335 | gpio_request(GPIO_FN_PORT66_KEYIN0_PU, NULL); | ||
336 | gpio_request(GPIO_FN_PORT67_KEYIN1_PU, NULL); | ||
337 | gpio_request(GPIO_FN_PORT68_KEYIN2_PU, NULL); | ||
338 | gpio_request(GPIO_FN_PORT69_KEYIN3_PU, NULL); | ||
339 | gpio_request(GPIO_FN_PORT70_KEYIN4_PU, NULL); | ||
340 | gpio_request(GPIO_FN_PORT71_KEYIN5_PU, NULL); | ||
341 | gpio_request(GPIO_FN_PORT72_KEYIN6_PU, NULL); | ||
342 | |||
343 | /* SDHI0 */ | ||
344 | gpio_request(GPIO_FN_SDHICLK0, NULL); | ||
345 | gpio_request(GPIO_FN_SDHICD0, NULL); | ||
346 | gpio_request(GPIO_FN_SDHID0_0, NULL); | ||
347 | gpio_request(GPIO_FN_SDHID0_1, NULL); | ||
348 | gpio_request(GPIO_FN_SDHID0_2, NULL); | ||
349 | gpio_request(GPIO_FN_SDHID0_3, NULL); | ||
350 | gpio_request(GPIO_FN_SDHICMD0, NULL); | ||
351 | gpio_request(GPIO_FN_SDHIWP0, NULL); | ||
352 | gpio_request_pullup(GPIO_SDHID0_D0); | ||
353 | gpio_request_pullup(GPIO_SDHID0_D1); | ||
354 | gpio_request_pullup(GPIO_SDHID0_D2); | ||
355 | gpio_request_pullup(GPIO_SDHID0_D3); | ||
356 | gpio_request_pullup(GPIO_SDHICMD0); | ||
357 | |||
358 | /* SDHI1 */ | ||
359 | gpio_request(GPIO_FN_SDHICLK1, NULL); | ||
360 | gpio_request(GPIO_FN_SDHID1_0, NULL); | ||
361 | gpio_request(GPIO_FN_SDHID1_1, NULL); | ||
362 | gpio_request(GPIO_FN_SDHID1_2, NULL); | ||
363 | gpio_request(GPIO_FN_SDHID1_3, NULL); | ||
364 | gpio_request(GPIO_FN_SDHICMD1, NULL); | ||
365 | gpio_request_pullup(GPIO_SDHID1_D0); | ||
366 | gpio_request_pullup(GPIO_SDHID1_D1); | ||
367 | gpio_request_pullup(GPIO_SDHID1_D2); | ||
368 | gpio_request_pullup(GPIO_SDHID1_D3); | ||
369 | gpio_request_pullup(GPIO_SDHICMD1); | ||
370 | |||
371 | sh7377_add_standard_devices(); | ||
372 | |||
373 | platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices)); | ||
374 | } | ||
375 | |||
376 | MACHINE_START(G4EVM, "g4evm") | ||
377 | .map_io = sh7377_map_io, | ||
378 | .init_early = sh7377_add_early_devices, | ||
379 | .init_irq = sh7377_init_irq, | ||
380 | .handle_irq = shmobile_handle_irq_intc, | ||
381 | .init_machine = g4evm_init, | ||
382 | .init_late = shmobile_init_late, | ||
383 | .timer = &shmobile_timer, | ||
384 | MACHINE_END | ||
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c index 0a43f3189c21..f63f2eeb0205 100644 --- a/arch/arm/mach-shmobile/board-kzm9g.c +++ b/arch/arm/mach-shmobile/board-kzm9g.c | |||
@@ -384,6 +384,8 @@ static struct regulator_consumer_supply fixed2v8_power_consumers[] = | |||
384 | 384 | ||
385 | /* SDHI */ | 385 | /* SDHI */ |
386 | static struct sh_mobile_sdhi_info sdhi0_info = { | 386 | static struct sh_mobile_sdhi_info sdhi0_info = { |
387 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, | ||
388 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | ||
387 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, | 389 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, |
388 | .tmio_caps = MMC_CAP_SD_HIGHSPEED, | 390 | .tmio_caps = MMC_CAP_SD_HIGHSPEED, |
389 | .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | 391 | .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, |
@@ -424,6 +426,8 @@ static struct platform_device sdhi0_device = { | |||
424 | 426 | ||
425 | /* Micro SD */ | 427 | /* Micro SD */ |
426 | static struct sh_mobile_sdhi_info sdhi2_info = { | 428 | static struct sh_mobile_sdhi_info sdhi2_info = { |
429 | .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX, | ||
430 | .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX, | ||
427 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | | 431 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | |
428 | TMIO_MMC_USE_GPIO_CD | | 432 | TMIO_MMC_USE_GPIO_CD | |
429 | TMIO_MMC_WRPROTECT_DISABLE, | 433 | TMIO_MMC_WRPROTECT_DISABLE, |
@@ -557,7 +561,15 @@ static struct i2c_board_info i2c0_devices[] = { | |||
557 | }, | 561 | }, |
558 | { | 562 | { |
559 | I2C_BOARD_INFO("r2025sd", 0x32), | 563 | I2C_BOARD_INFO("r2025sd", 0x32), |
560 | } | 564 | }, |
565 | { | ||
566 | I2C_BOARD_INFO("ak8975", 0x0c), | ||
567 | .irq = intcs_evt2irq(0x3380), /* IRQ28 */ | ||
568 | }, | ||
569 | { | ||
570 | I2C_BOARD_INFO("adxl34x", 0x1d), | ||
571 | .irq = intcs_evt2irq(0x3340), /* IRQ26 */ | ||
572 | }, | ||
561 | }; | 573 | }; |
562 | 574 | ||
563 | static struct i2c_board_info i2c1_devices[] = { | 575 | static struct i2c_board_info i2c1_devices[] = { |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 0c27c810cf99..bf2bcb92b426 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -816,6 +816,8 @@ static struct platform_device usbhs1_device = { | |||
816 | .id = 1, | 816 | .id = 1, |
817 | .dev = { | 817 | .dev = { |
818 | .platform_data = &usbhs1_private.info, | 818 | .platform_data = &usbhs1_private.info, |
819 | .dma_mask = &usbhs1_device.dev.coherent_dma_mask, | ||
820 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
819 | }, | 821 | }, |
820 | .num_resources = ARRAY_SIZE(usbhs1_resources), | 822 | .num_resources = ARRAY_SIZE(usbhs1_resources), |
821 | .resource = usbhs1_resources, | 823 | .resource = usbhs1_resources, |
@@ -860,76 +862,6 @@ static struct platform_device leds_device = { | |||
860 | 862 | ||
861 | /* FSI */ | 863 | /* FSI */ |
862 | #define IRQ_FSI evt2irq(0x1840) | 864 | #define IRQ_FSI evt2irq(0x1840) |
863 | static int __fsi_set_round_rate(struct clk *clk, long rate, int enable) | ||
864 | { | ||
865 | int ret; | ||
866 | |||
867 | if (rate <= 0) | ||
868 | return 0; | ||
869 | |||
870 | if (!enable) { | ||
871 | clk_disable(clk); | ||
872 | return 0; | ||
873 | } | ||
874 | |||
875 | ret = clk_set_rate(clk, clk_round_rate(clk, rate)); | ||
876 | if (ret < 0) | ||
877 | return ret; | ||
878 | |||
879 | return clk_enable(clk); | ||
880 | } | ||
881 | |||
882 | static int fsi_b_set_rate(struct device *dev, int rate, int enable) | ||
883 | { | ||
884 | struct clk *fsib_clk; | ||
885 | struct clk *fdiv_clk = &sh7372_fsidivb_clk; | ||
886 | long fsib_rate = 0; | ||
887 | long fdiv_rate = 0; | ||
888 | int ackmd_bpfmd; | ||
889 | int ret; | ||
890 | |||
891 | /* clock start */ | ||
892 | switch (rate) { | ||
893 | case 44100: | ||
894 | fsib_rate = rate * 256; | ||
895 | ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | ||
896 | break; | ||
897 | case 48000: | ||
898 | fsib_rate = 85428000; /* around 48kHz x 256 x 7 */ | ||
899 | fdiv_rate = rate * 256; | ||
900 | ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | ||
901 | break; | ||
902 | default: | ||
903 | pr_err("unsupported rate in FSI2 port B\n"); | ||
904 | return -EINVAL; | ||
905 | } | ||
906 | |||
907 | /* FSI B setting */ | ||
908 | fsib_clk = clk_get(dev, "ickb"); | ||
909 | if (IS_ERR(fsib_clk)) | ||
910 | return -EIO; | ||
911 | |||
912 | /* fsib */ | ||
913 | ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable); | ||
914 | if (ret < 0) | ||
915 | goto fsi_set_rate_end; | ||
916 | |||
917 | /* FSI DIV */ | ||
918 | ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable); | ||
919 | if (ret < 0) { | ||
920 | /* disable FSI B */ | ||
921 | if (enable) | ||
922 | __fsi_set_round_rate(fsib_clk, fsib_rate, 0); | ||
923 | goto fsi_set_rate_end; | ||
924 | } | ||
925 | |||
926 | ret = ackmd_bpfmd; | ||
927 | |||
928 | fsi_set_rate_end: | ||
929 | clk_put(fsib_clk); | ||
930 | return ret; | ||
931 | } | ||
932 | |||
933 | static struct sh_fsi_platform_info fsi_info = { | 865 | static struct sh_fsi_platform_info fsi_info = { |
934 | .port_a = { | 866 | .port_a = { |
935 | .flags = SH_FSI_BRS_INV, | 867 | .flags = SH_FSI_BRS_INV, |
@@ -940,8 +872,8 @@ static struct sh_fsi_platform_info fsi_info = { | |||
940 | .flags = SH_FSI_BRS_INV | | 872 | .flags = SH_FSI_BRS_INV | |
941 | SH_FSI_BRM_INV | | 873 | SH_FSI_BRM_INV | |
942 | SH_FSI_LRS_INV | | 874 | SH_FSI_LRS_INV | |
875 | SH_FSI_CLK_CPG | | ||
943 | SH_FSI_FMT_SPDIF, | 876 | SH_FSI_FMT_SPDIF, |
944 | .set_rate = fsi_b_set_rate, | ||
945 | } | 877 | } |
946 | }; | 878 | }; |
947 | 879 | ||
@@ -1651,7 +1583,12 @@ static void __init mackerel_init(void) | |||
1651 | pm_clk_add(&hdmi_lcdc_device.dev, "hdmi"); | 1583 | pm_clk_add(&hdmi_lcdc_device.dev, "hdmi"); |
1652 | } | 1584 | } |
1653 | 1585 | ||
1654 | MACHINE_START(MACKEREL, "mackerel") | 1586 | static const char *mackerel_boards_compat_dt[] __initdata = { |
1587 | "renesas,mackerel", | ||
1588 | NULL, | ||
1589 | }; | ||
1590 | |||
1591 | DT_MACHINE_START(MACKEREL_DT, "mackerel") | ||
1655 | .map_io = sh7372_map_io, | 1592 | .map_io = sh7372_map_io, |
1656 | .init_early = sh7372_add_early_devices, | 1593 | .init_early = sh7372_add_early_devices, |
1657 | .init_irq = sh7372_init_irq, | 1594 | .init_irq = sh7372_init_irq, |
@@ -1659,4 +1596,5 @@ MACHINE_START(MACKEREL, "mackerel") | |||
1659 | .init_machine = mackerel_init, | 1596 | .init_machine = mackerel_init, |
1660 | .init_late = sh7372_pm_init_late, | 1597 | .init_late = sh7372_pm_init_late, |
1661 | .timer = &shmobile_timer, | 1598 | .timer = &shmobile_timer, |
1599 | .dt_compat = mackerel_boards_compat_dt, | ||
1662 | MACHINE_END | 1600 | MACHINE_END |
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c index b8a7525a4e2f..449f9289567d 100644 --- a/arch/arm/mach-shmobile/board-marzen.c +++ b/arch/arm/mach-shmobile/board-marzen.c | |||
@@ -30,8 +30,14 @@ | |||
30 | #include <linux/regulator/fixed.h> | 30 | #include <linux/regulator/fixed.h> |
31 | #include <linux/regulator/machine.h> | 31 | #include <linux/regulator/machine.h> |
32 | #include <linux/smsc911x.h> | 32 | #include <linux/smsc911x.h> |
33 | #include <linux/spi/spi.h> | ||
34 | #include <linux/spi/sh_hspi.h> | ||
33 | #include <linux/mmc/sh_mobile_sdhi.h> | 35 | #include <linux/mmc/sh_mobile_sdhi.h> |
34 | #include <linux/mfd/tmio.h> | 36 | #include <linux/mfd/tmio.h> |
37 | #include <linux/usb/otg.h> | ||
38 | #include <linux/usb/ehci_pdriver.h> | ||
39 | #include <linux/usb/ohci_pdriver.h> | ||
40 | #include <linux/pm_runtime.h> | ||
35 | #include <mach/hardware.h> | 41 | #include <mach/hardware.h> |
36 | #include <mach/r8a7779.h> | 42 | #include <mach/r8a7779.h> |
37 | #include <mach/common.h> | 43 | #include <mach/common.h> |
@@ -126,12 +132,201 @@ static struct platform_device thermal_device = { | |||
126 | .num_resources = ARRAY_SIZE(thermal_resources), | 132 | .num_resources = ARRAY_SIZE(thermal_resources), |
127 | }; | 133 | }; |
128 | 134 | ||
135 | /* HSPI */ | ||
136 | static struct resource hspi_resources[] = { | ||
137 | [0] = { | ||
138 | .start = 0xFFFC7000, | ||
139 | .end = 0xFFFC7018 - 1, | ||
140 | .flags = IORESOURCE_MEM, | ||
141 | }, | ||
142 | }; | ||
143 | |||
144 | static struct platform_device hspi_device = { | ||
145 | .name = "sh-hspi", | ||
146 | .id = 0, | ||
147 | .resource = hspi_resources, | ||
148 | .num_resources = ARRAY_SIZE(hspi_resources), | ||
149 | }; | ||
150 | |||
151 | /* USB PHY */ | ||
152 | static struct resource usb_phy_resources[] = { | ||
153 | [0] = { | ||
154 | .start = 0xffe70000, | ||
155 | .end = 0xffe70900 - 1, | ||
156 | .flags = IORESOURCE_MEM, | ||
157 | }, | ||
158 | [1] = { | ||
159 | .start = 0xfff70000, | ||
160 | .end = 0xfff70900 - 1, | ||
161 | .flags = IORESOURCE_MEM, | ||
162 | }, | ||
163 | }; | ||
164 | |||
165 | static struct platform_device usb_phy_device = { | ||
166 | .name = "rcar_usb_phy", | ||
167 | .resource = usb_phy_resources, | ||
168 | .num_resources = ARRAY_SIZE(usb_phy_resources), | ||
169 | }; | ||
170 | |||
129 | static struct platform_device *marzen_devices[] __initdata = { | 171 | static struct platform_device *marzen_devices[] __initdata = { |
130 | ð_device, | 172 | ð_device, |
131 | &sdhi0_device, | 173 | &sdhi0_device, |
132 | &thermal_device, | 174 | &thermal_device, |
175 | &hspi_device, | ||
176 | &usb_phy_device, | ||
133 | }; | 177 | }; |
134 | 178 | ||
179 | /* USB */ | ||
180 | static struct usb_phy *phy; | ||
181 | static int usb_power_on(struct platform_device *pdev) | ||
182 | { | ||
183 | if (!phy) | ||
184 | return -EIO; | ||
185 | |||
186 | pm_runtime_enable(&pdev->dev); | ||
187 | pm_runtime_get_sync(&pdev->dev); | ||
188 | |||
189 | usb_phy_init(phy); | ||
190 | |||
191 | return 0; | ||
192 | } | ||
193 | |||
194 | static void usb_power_off(struct platform_device *pdev) | ||
195 | { | ||
196 | if (!phy) | ||
197 | return; | ||
198 | |||
199 | usb_phy_shutdown(phy); | ||
200 | |||
201 | pm_runtime_put_sync(&pdev->dev); | ||
202 | pm_runtime_disable(&pdev->dev); | ||
203 | } | ||
204 | |||
205 | static struct usb_ehci_pdata ehcix_pdata = { | ||
206 | .power_on = usb_power_on, | ||
207 | .power_off = usb_power_off, | ||
208 | .power_suspend = usb_power_off, | ||
209 | }; | ||
210 | |||
211 | static struct resource ehci0_resources[] = { | ||
212 | [0] = { | ||
213 | .start = 0xffe70000, | ||
214 | .end = 0xffe70400 - 1, | ||
215 | .flags = IORESOURCE_MEM, | ||
216 | }, | ||
217 | [1] = { | ||
218 | .start = gic_spi(44), | ||
219 | .flags = IORESOURCE_IRQ, | ||
220 | }, | ||
221 | }; | ||
222 | |||
223 | static struct platform_device ehci0_device = { | ||
224 | .name = "ehci-platform", | ||
225 | .id = 0, | ||
226 | .dev = { | ||
227 | .dma_mask = &ehci0_device.dev.coherent_dma_mask, | ||
228 | .coherent_dma_mask = 0xffffffff, | ||
229 | .platform_data = &ehcix_pdata, | ||
230 | }, | ||
231 | .num_resources = ARRAY_SIZE(ehci0_resources), | ||
232 | .resource = ehci0_resources, | ||
233 | }; | ||
234 | |||
235 | static struct resource ehci1_resources[] = { | ||
236 | [0] = { | ||
237 | .start = 0xfff70000, | ||
238 | .end = 0xfff70400 - 1, | ||
239 | .flags = IORESOURCE_MEM, | ||
240 | }, | ||
241 | [1] = { | ||
242 | .start = gic_spi(45), | ||
243 | .flags = IORESOURCE_IRQ, | ||
244 | }, | ||
245 | }; | ||
246 | |||
247 | static struct platform_device ehci1_device = { | ||
248 | .name = "ehci-platform", | ||
249 | .id = 1, | ||
250 | .dev = { | ||
251 | .dma_mask = &ehci1_device.dev.coherent_dma_mask, | ||
252 | .coherent_dma_mask = 0xffffffff, | ||
253 | .platform_data = &ehcix_pdata, | ||
254 | }, | ||
255 | .num_resources = ARRAY_SIZE(ehci1_resources), | ||
256 | .resource = ehci1_resources, | ||
257 | }; | ||
258 | |||
259 | static struct usb_ohci_pdata ohcix_pdata = { | ||
260 | .power_on = usb_power_on, | ||
261 | .power_off = usb_power_off, | ||
262 | .power_suspend = usb_power_off, | ||
263 | }; | ||
264 | |||
265 | static struct resource ohci0_resources[] = { | ||
266 | [0] = { | ||
267 | .start = 0xffe70400, | ||
268 | .end = 0xffe70800 - 1, | ||
269 | .flags = IORESOURCE_MEM, | ||
270 | }, | ||
271 | [1] = { | ||
272 | .start = gic_spi(44), | ||
273 | .flags = IORESOURCE_IRQ, | ||
274 | }, | ||
275 | }; | ||
276 | |||
277 | static struct platform_device ohci0_device = { | ||
278 | .name = "ohci-platform", | ||
279 | .id = 0, | ||
280 | .dev = { | ||
281 | .dma_mask = &ohci0_device.dev.coherent_dma_mask, | ||
282 | .coherent_dma_mask = 0xffffffff, | ||
283 | .platform_data = &ohcix_pdata, | ||
284 | }, | ||
285 | .num_resources = ARRAY_SIZE(ohci0_resources), | ||
286 | .resource = ohci0_resources, | ||
287 | }; | ||
288 | |||
289 | static struct resource ohci1_resources[] = { | ||
290 | [0] = { | ||
291 | .start = 0xfff70400, | ||
292 | .end = 0xfff70800 - 1, | ||
293 | .flags = IORESOURCE_MEM, | ||
294 | }, | ||
295 | [1] = { | ||
296 | .start = gic_spi(45), | ||
297 | .flags = IORESOURCE_IRQ, | ||
298 | }, | ||
299 | }; | ||
300 | |||
301 | static struct platform_device ohci1_device = { | ||
302 | .name = "ohci-platform", | ||
303 | .id = 1, | ||
304 | .dev = { | ||
305 | .dma_mask = &ohci1_device.dev.coherent_dma_mask, | ||
306 | .coherent_dma_mask = 0xffffffff, | ||
307 | .platform_data = &ohcix_pdata, | ||
308 | }, | ||
309 | .num_resources = ARRAY_SIZE(ohci1_resources), | ||
310 | .resource = ohci1_resources, | ||
311 | }; | ||
312 | |||
313 | static struct platform_device *marzen_late_devices[] __initdata = { | ||
314 | &ehci0_device, | ||
315 | &ehci1_device, | ||
316 | &ohci0_device, | ||
317 | &ohci1_device, | ||
318 | }; | ||
319 | |||
320 | void __init marzen_init_late(void) | ||
321 | { | ||
322 | /* get usb phy */ | ||
323 | phy = usb_get_phy(USB_PHY_TYPE_USB2); | ||
324 | |||
325 | shmobile_init_late(); | ||
326 | platform_add_devices(marzen_late_devices, | ||
327 | ARRAY_SIZE(marzen_late_devices)); | ||
328 | } | ||
329 | |||
135 | static void __init marzen_init(void) | 330 | static void __init marzen_init(void) |
136 | { | 331 | { |
137 | regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, | 332 | regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, |
@@ -163,6 +358,20 @@ static void __init marzen_init(void) | |||
163 | gpio_request(GPIO_FN_SD0_CD, NULL); | 358 | gpio_request(GPIO_FN_SD0_CD, NULL); |
164 | gpio_request(GPIO_FN_SD0_WP, NULL); | 359 | gpio_request(GPIO_FN_SD0_WP, NULL); |
165 | 360 | ||
361 | /* HSPI 0 */ | ||
362 | gpio_request(GPIO_FN_HSPI_CLK0, NULL); | ||
363 | gpio_request(GPIO_FN_HSPI_CS0, NULL); | ||
364 | gpio_request(GPIO_FN_HSPI_TX0, NULL); | ||
365 | gpio_request(GPIO_FN_HSPI_RX0, NULL); | ||
366 | |||
367 | /* USB (CN21) */ | ||
368 | gpio_request(GPIO_FN_USB_OVC0, NULL); | ||
369 | gpio_request(GPIO_FN_USB_OVC1, NULL); | ||
370 | gpio_request(GPIO_FN_USB_OVC2, NULL); | ||
371 | |||
372 | /* USB (CN22) */ | ||
373 | gpio_request(GPIO_FN_USB_PENC2, NULL); | ||
374 | |||
166 | r8a7779_add_standard_devices(); | 375 | r8a7779_add_standard_devices(); |
167 | platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); | 376 | platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); |
168 | } | 377 | } |
@@ -175,6 +384,6 @@ MACHINE_START(MARZEN, "marzen") | |||
175 | .init_irq = r8a7779_init_irq, | 384 | .init_irq = r8a7779_init_irq, |
176 | .handle_irq = gic_handle_irq, | 385 | .handle_irq = gic_handle_irq, |
177 | .init_machine = marzen_init, | 386 | .init_machine = marzen_init, |
178 | .init_late = shmobile_init_late, | 387 | .init_late = marzen_init_late, |
179 | .timer = &shmobile_timer, | 388 | .timer = &shmobile_timer, |
180 | MACHINE_END | 389 | MACHINE_END |
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index 6729e0032180..eac49d59782f 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c | |||
@@ -65,6 +65,9 @@ | |||
65 | #define SMSTPCR3 IOMEM(0xe615013c) | 65 | #define SMSTPCR3 IOMEM(0xe615013c) |
66 | #define SMSTPCR4 IOMEM(0xe6150140) | 66 | #define SMSTPCR4 IOMEM(0xe6150140) |
67 | 67 | ||
68 | #define FSIDIVA IOMEM(0xFE1F8000) | ||
69 | #define FSIDIVB IOMEM(0xFE1F8008) | ||
70 | |||
68 | /* Fixed 32 KHz root clock from EXTALR pin */ | 71 | /* Fixed 32 KHz root clock from EXTALR pin */ |
69 | static struct clk extalr_clk = { | 72 | static struct clk extalr_clk = { |
70 | .rate = 32768, | 73 | .rate = 32768, |
@@ -188,6 +191,22 @@ static struct clk pllc1_div2_clk = { | |||
188 | }; | 191 | }; |
189 | 192 | ||
190 | /* USB clock */ | 193 | /* USB clock */ |
194 | /* | ||
195 | * USBCKCR is controlling usb24 clock | ||
196 | * bit[7] : parent clock | ||
197 | * bit[6] : clock divide rate | ||
198 | * And this bit[7] is used as a "usb24s" from other devices. | ||
199 | * (Video clock / Sub clock / SPU clock) | ||
200 | * You can controll this clock as a below. | ||
201 | * | ||
202 | * struct clk *usb24 = clk_get(dev, "usb24"); | ||
203 | * struct clk *usb24s = clk_get(NULL, "usb24s"); | ||
204 | * struct clk *system = clk_get(NULL, "system_clk"); | ||
205 | * int rate = clk_get_rate(system); | ||
206 | * | ||
207 | * clk_set_parent(usb24s, system); // for bit[7] | ||
208 | * clk_set_rate(usb24, rate / 2); // for bit[6] | ||
209 | */ | ||
191 | static struct clk *usb24s_parents[] = { | 210 | static struct clk *usb24s_parents[] = { |
192 | [0] = &system_clk, | 211 | [0] = &system_clk, |
193 | [1] = &extal2_clk | 212 | [1] = &extal2_clk |
@@ -427,6 +446,14 @@ static struct clk *late_main_clks[] = { | |||
427 | &hdmi2_clk, | 446 | &hdmi2_clk, |
428 | }; | 447 | }; |
429 | 448 | ||
449 | /* FSI DIV */ | ||
450 | enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR }; | ||
451 | |||
452 | static struct clk fsidivs[] = { | ||
453 | [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]), | ||
454 | [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]), | ||
455 | }; | ||
456 | |||
430 | /* MSTP */ | 457 | /* MSTP */ |
431 | enum { | 458 | enum { |
432 | DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP, | 459 | DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP, |
@@ -596,6 +623,10 @@ static struct clk_lookup lookups[] = { | |||
596 | 623 | ||
597 | CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), | 624 | CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), |
598 | CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), | 625 | CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), |
626 | CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]), | ||
627 | CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]), | ||
628 | CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk), | ||
629 | CLKDEV_ICK_ID("xckb", "sh_fsi2", &fsibck_clk), | ||
599 | }; | 630 | }; |
600 | 631 | ||
601 | void __init r8a7740_clock_init(u8 md_ck) | 632 | void __init r8a7740_clock_init(u8 md_ck) |
@@ -641,6 +672,9 @@ void __init r8a7740_clock_init(u8 md_ck) | |||
641 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) | 672 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) |
642 | ret = clk_register(late_main_clks[k]); | 673 | ret = clk_register(late_main_clks[k]); |
643 | 674 | ||
675 | if (!ret) | ||
676 | ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR); | ||
677 | |||
644 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 678 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
645 | 679 | ||
646 | if (!ret) | 680 | if (!ret) |
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 37b2a3133b3b..c019609da660 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c | |||
@@ -87,8 +87,11 @@ static struct clk div4_clks[DIV4_NR] = { | |||
87 | }; | 87 | }; |
88 | 88 | ||
89 | enum { MSTP323, MSTP322, MSTP321, MSTP320, | 89 | enum { MSTP323, MSTP322, MSTP321, MSTP320, |
90 | MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, | 90 | MSTP101, MSTP100, |
91 | MSTP030, | ||
92 | MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, | ||
91 | MSTP016, MSTP015, MSTP014, | 93 | MSTP016, MSTP015, MSTP014, |
94 | MSTP007, | ||
92 | MSTP_NR }; | 95 | MSTP_NR }; |
93 | 96 | ||
94 | static struct clk mstp_clks[MSTP_NR] = { | 97 | static struct clk mstp_clks[MSTP_NR] = { |
@@ -96,6 +99,12 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
96 | [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), /* SDHI1 */ | 99 | [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), /* SDHI1 */ |
97 | [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */ | 100 | [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */ |
98 | [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */ | 101 | [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */ |
102 | [MSTP101] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 1, 0), /* USB2 */ | ||
103 | [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0), /* USB0/1 */ | ||
104 | [MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0), /* I2C0 */ | ||
105 | [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0), /* I2C1 */ | ||
106 | [MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0), /* I2C2 */ | ||
107 | [MSTP027] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 27, 0), /* I2C3 */ | ||
99 | [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */ | 108 | [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */ |
100 | [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */ | 109 | [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */ |
101 | [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */ | 110 | [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */ |
@@ -105,6 +114,7 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
105 | [MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0), /* TMU0 */ | 114 | [MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0), /* TMU0 */ |
106 | [MSTP015] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), /* TMU1 */ | 115 | [MSTP015] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), /* TMU1 */ |
107 | [MSTP014] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 14, 0), /* TMU2 */ | 116 | [MSTP014] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 14, 0), /* TMU2 */ |
117 | [MSTP007] = SH_CLK_MSTP32(&div4_clks[DIV4_S], MSTPCR0, 7, 0), /* HSPI */ | ||
108 | }; | 118 | }; |
109 | 119 | ||
110 | static unsigned long mul4_recalc(struct clk *clk) | 120 | static unsigned long mul4_recalc(struct clk *clk) |
@@ -146,14 +156,25 @@ static struct clk_lookup lookups[] = { | |||
146 | CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), | 156 | CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), |
147 | 157 | ||
148 | /* MSTP32 clocks */ | 158 | /* MSTP32 clocks */ |
159 | CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */ | ||
160 | CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */ | ||
161 | CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ | ||
162 | CLKDEV_DEV_ID("ohci-platform.0", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */ | ||
149 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ | 163 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ |
150 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */ | 164 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */ |
165 | CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */ | ||
166 | CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */ | ||
167 | CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */ | ||
168 | CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */ | ||
151 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ | 169 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ |
152 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ | 170 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ |
153 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ | 171 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ |
154 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */ | 172 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */ |
155 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */ | 173 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */ |
156 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ | 174 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ |
175 | CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */ | ||
176 | CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */ | ||
177 | CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */ | ||
157 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */ | 178 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */ |
158 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */ | 179 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */ |
159 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */ | 180 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */ |
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c deleted file mode 100644 index ef0a95e592c4..000000000000 --- a/arch/arm/mach-shmobile/clock-sh7367.c +++ /dev/null | |||
@@ -1,355 +0,0 @@ | |||
1 | /* | ||
2 | * SH7367 clock framework support | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; version 2 of the License. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/io.h> | ||
22 | #include <linux/sh_clk.h> | ||
23 | #include <linux/clkdev.h> | ||
24 | #include <mach/common.h> | ||
25 | |||
26 | /* SH7367 registers */ | ||
27 | #define RTFRQCR IOMEM(0xe6150000) | ||
28 | #define SYFRQCR IOMEM(0xe6150004) | ||
29 | #define CMFRQCR IOMEM(0xe61500E0) | ||
30 | #define VCLKCR1 IOMEM(0xe6150008) | ||
31 | #define VCLKCR2 IOMEM(0xe615000C) | ||
32 | #define VCLKCR3 IOMEM(0xe615001C) | ||
33 | #define SCLKACR IOMEM(0xe6150010) | ||
34 | #define SCLKBCR IOMEM(0xe6150014) | ||
35 | #define SUBUSBCKCR IOMEM(0xe6158080) | ||
36 | #define SPUCKCR IOMEM(0xe6150084) | ||
37 | #define MSUCKCR IOMEM(0xe6150088) | ||
38 | #define MVI3CKCR IOMEM(0xe6150090) | ||
39 | #define VOUCKCR IOMEM(0xe6150094) | ||
40 | #define MFCK1CR IOMEM(0xe6150098) | ||
41 | #define MFCK2CR IOMEM(0xe615009C) | ||
42 | #define PLLC1CR IOMEM(0xe6150028) | ||
43 | #define PLLC2CR IOMEM(0xe615002C) | ||
44 | #define RTMSTPCR0 IOMEM(0xe6158030) | ||
45 | #define RTMSTPCR2 IOMEM(0xe6158038) | ||
46 | #define SYMSTPCR0 IOMEM(0xe6158040) | ||
47 | #define SYMSTPCR2 IOMEM(0xe6158048) | ||
48 | #define CMMSTPCR0 IOMEM(0xe615804c) | ||
49 | |||
50 | /* Fixed 32 KHz root clock from EXTALR pin */ | ||
51 | static struct clk r_clk = { | ||
52 | .rate = 32768, | ||
53 | }; | ||
54 | |||
55 | /* | ||
56 | * 26MHz default rate for the EXTALB1 root input clock. | ||
57 | * If needed, reset this with clk_set_rate() from the platform code. | ||
58 | */ | ||
59 | struct clk sh7367_extalb1_clk = { | ||
60 | .rate = 26666666, | ||
61 | }; | ||
62 | |||
63 | /* | ||
64 | * 48MHz default rate for the EXTAL2 root input clock. | ||
65 | * If needed, reset this with clk_set_rate() from the platform code. | ||
66 | */ | ||
67 | struct clk sh7367_extal2_clk = { | ||
68 | .rate = 48000000, | ||
69 | }; | ||
70 | |||
71 | /* A fixed divide-by-2 block */ | ||
72 | static unsigned long div2_recalc(struct clk *clk) | ||
73 | { | ||
74 | return clk->parent->rate / 2; | ||
75 | } | ||
76 | |||
77 | static struct sh_clk_ops div2_clk_ops = { | ||
78 | .recalc = div2_recalc, | ||
79 | }; | ||
80 | |||
81 | /* Divide extalb1 by two */ | ||
82 | static struct clk extalb1_div2_clk = { | ||
83 | .ops = &div2_clk_ops, | ||
84 | .parent = &sh7367_extalb1_clk, | ||
85 | }; | ||
86 | |||
87 | /* Divide extal2 by two */ | ||
88 | static struct clk extal2_div2_clk = { | ||
89 | .ops = &div2_clk_ops, | ||
90 | .parent = &sh7367_extal2_clk, | ||
91 | }; | ||
92 | |||
93 | /* PLLC1 */ | ||
94 | static unsigned long pllc1_recalc(struct clk *clk) | ||
95 | { | ||
96 | unsigned long mult = 1; | ||
97 | |||
98 | if (__raw_readl(PLLC1CR) & (1 << 14)) | ||
99 | mult = (((__raw_readl(RTFRQCR) >> 24) & 0x3f) + 1) * 2; | ||
100 | |||
101 | return clk->parent->rate * mult; | ||
102 | } | ||
103 | |||
104 | static struct sh_clk_ops pllc1_clk_ops = { | ||
105 | .recalc = pllc1_recalc, | ||
106 | }; | ||
107 | |||
108 | static struct clk pllc1_clk = { | ||
109 | .ops = &pllc1_clk_ops, | ||
110 | .flags = CLK_ENABLE_ON_INIT, | ||
111 | .parent = &extalb1_div2_clk, | ||
112 | }; | ||
113 | |||
114 | /* Divide PLLC1 by two */ | ||
115 | static struct clk pllc1_div2_clk = { | ||
116 | .ops = &div2_clk_ops, | ||
117 | .parent = &pllc1_clk, | ||
118 | }; | ||
119 | |||
120 | /* PLLC2 */ | ||
121 | static unsigned long pllc2_recalc(struct clk *clk) | ||
122 | { | ||
123 | unsigned long mult = 1; | ||
124 | |||
125 | if (__raw_readl(PLLC2CR) & (1 << 31)) | ||
126 | mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2; | ||
127 | |||
128 | return clk->parent->rate * mult; | ||
129 | } | ||
130 | |||
131 | static struct sh_clk_ops pllc2_clk_ops = { | ||
132 | .recalc = pllc2_recalc, | ||
133 | }; | ||
134 | |||
135 | static struct clk pllc2_clk = { | ||
136 | .ops = &pllc2_clk_ops, | ||
137 | .flags = CLK_ENABLE_ON_INIT, | ||
138 | .parent = &extalb1_div2_clk, | ||
139 | }; | ||
140 | |||
141 | static struct clk *main_clks[] = { | ||
142 | &r_clk, | ||
143 | &sh7367_extalb1_clk, | ||
144 | &sh7367_extal2_clk, | ||
145 | &extalb1_div2_clk, | ||
146 | &extal2_div2_clk, | ||
147 | &pllc1_clk, | ||
148 | &pllc1_div2_clk, | ||
149 | &pllc2_clk, | ||
150 | }; | ||
151 | |||
152 | static void div4_kick(struct clk *clk) | ||
153 | { | ||
154 | unsigned long value; | ||
155 | |||
156 | /* set KICK bit in SYFRQCR to update hardware setting */ | ||
157 | value = __raw_readl(SYFRQCR); | ||
158 | value |= (1 << 31); | ||
159 | __raw_writel(value, SYFRQCR); | ||
160 | } | ||
161 | |||
162 | static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, | ||
163 | 24, 32, 36, 48, 0, 72, 0, 0 }; | ||
164 | |||
165 | static struct clk_div_mult_table div4_div_mult_table = { | ||
166 | .divisors = divisors, | ||
167 | .nr_divisors = ARRAY_SIZE(divisors), | ||
168 | }; | ||
169 | |||
170 | static struct clk_div4_table div4_table = { | ||
171 | .div_mult_table = &div4_div_mult_table, | ||
172 | .kick = div4_kick, | ||
173 | }; | ||
174 | |||
175 | enum { DIV4_I, DIV4_G, DIV4_S, DIV4_B, | ||
176 | DIV4_ZX, DIV4_ZT, DIV4_Z, DIV4_ZD, DIV4_HP, | ||
177 | DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR }; | ||
178 | |||
179 | #define DIV4(_reg, _bit, _mask, _flags) \ | ||
180 | SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags) | ||
181 | |||
182 | static struct clk div4_clks[DIV4_NR] = { | ||
183 | [DIV4_I] = DIV4(RTFRQCR, 20, 0x6fff, CLK_ENABLE_ON_INIT), | ||
184 | [DIV4_G] = DIV4(RTFRQCR, 16, 0x6fff, CLK_ENABLE_ON_INIT), | ||
185 | [DIV4_S] = DIV4(RTFRQCR, 12, 0x6fff, CLK_ENABLE_ON_INIT), | ||
186 | [DIV4_B] = DIV4(RTFRQCR, 8, 0x6fff, CLK_ENABLE_ON_INIT), | ||
187 | [DIV4_ZX] = DIV4(SYFRQCR, 20, 0x6fff, 0), | ||
188 | [DIV4_ZT] = DIV4(SYFRQCR, 16, 0x6fff, 0), | ||
189 | [DIV4_Z] = DIV4(SYFRQCR, 12, 0x6fff, 0), | ||
190 | [DIV4_ZD] = DIV4(SYFRQCR, 8, 0x6fff, 0), | ||
191 | [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0), | ||
192 | [DIV4_ZS] = DIV4(CMFRQCR, 12, 0x6fff, 0), | ||
193 | [DIV4_ZB] = DIV4(CMFRQCR, 8, 0x6fff, 0), | ||
194 | [DIV4_ZB3] = DIV4(CMFRQCR, 4, 0x6fff, 0), | ||
195 | [DIV4_CP] = DIV4(CMFRQCR, 0, 0x6fff, 0), | ||
196 | }; | ||
197 | |||
198 | enum { DIV6_SUB, DIV6_SIUA, DIV6_SIUB, DIV6_MSU, DIV6_SPU, | ||
199 | DIV6_MVI3, DIV6_MF1, DIV6_MF2, | ||
200 | DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_VOU, | ||
201 | DIV6_NR }; | ||
202 | |||
203 | static struct clk div6_clks[DIV6_NR] = { | ||
204 | [DIV6_SUB] = SH_CLK_DIV6(&sh7367_extal2_clk, SUBUSBCKCR, 0), | ||
205 | [DIV6_SIUA] = SH_CLK_DIV6(&pllc1_div2_clk, SCLKACR, 0), | ||
206 | [DIV6_SIUB] = SH_CLK_DIV6(&pllc1_div2_clk, SCLKBCR, 0), | ||
207 | [DIV6_MSU] = SH_CLK_DIV6(&pllc1_div2_clk, MSUCKCR, 0), | ||
208 | [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0), | ||
209 | [DIV6_MVI3] = SH_CLK_DIV6(&pllc1_div2_clk, MVI3CKCR, 0), | ||
210 | [DIV6_MF1] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK1CR, 0), | ||
211 | [DIV6_MF2] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK2CR, 0), | ||
212 | [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0), | ||
213 | [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0), | ||
214 | [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0), | ||
215 | [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0), | ||
216 | }; | ||
217 | |||
218 | enum { RTMSTP001, | ||
219 | RTMSTP231, RTMSTP230, RTMSTP229, RTMSTP228, RTMSTP226, | ||
220 | RTMSTP216, RTMSTP206, RTMSTP205, RTMSTP201, | ||
221 | SYMSTP023, SYMSTP007, SYMSTP006, SYMSTP004, | ||
222 | SYMSTP003, SYMSTP002, SYMSTP001, SYMSTP000, | ||
223 | SYMSTP231, SYMSTP229, SYMSTP225, SYMSTP223, SYMSTP222, | ||
224 | SYMSTP215, SYMSTP214, SYMSTP213, SYMSTP211, | ||
225 | CMMSTP003, | ||
226 | MSTP_NR }; | ||
227 | |||
228 | #define MSTP(_parent, _reg, _bit, _flags) \ | ||
229 | SH_CLK_MSTP32(_parent, _reg, _bit, _flags) | ||
230 | |||
231 | static struct clk mstp_clks[MSTP_NR] = { | ||
232 | [RTMSTP001] = MSTP(&div6_clks[DIV6_SUB], RTMSTPCR0, 1, 0), /* IIC2 */ | ||
233 | [RTMSTP231] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 31, 0), /* VEU3 */ | ||
234 | [RTMSTP230] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 30, 0), /* VEU2 */ | ||
235 | [RTMSTP229] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 29, 0), /* VEU1 */ | ||
236 | [RTMSTP228] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 28, 0), /* VEU0 */ | ||
237 | [RTMSTP226] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 26, 0), /* VEU2H */ | ||
238 | [RTMSTP216] = MSTP(&div6_clks[DIV6_SUB], RTMSTPCR2, 16, 0), /* IIC0 */ | ||
239 | [RTMSTP206] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 6, 0), /* JPU */ | ||
240 | [RTMSTP205] = MSTP(&div6_clks[DIV6_VOU], RTMSTPCR2, 5, 0), /* VOU */ | ||
241 | [RTMSTP201] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 1, 0), /* VPU */ | ||
242 | [SYMSTP023] = MSTP(&div6_clks[DIV6_SPU], SYMSTPCR0, 23, 0), /* SPU1 */ | ||
243 | [SYMSTP007] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 7, 0), /* SCIFA5 */ | ||
244 | [SYMSTP006] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 6, 0), /* SCIFB */ | ||
245 | [SYMSTP004] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 4, 0), /* SCIFA0 */ | ||
246 | [SYMSTP003] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 3, 0), /* SCIFA1 */ | ||
247 | [SYMSTP002] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 2, 0), /* SCIFA2 */ | ||
248 | [SYMSTP001] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 1, 0), /* SCIFA3 */ | ||
249 | [SYMSTP000] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 0, 0), /* SCIFA4 */ | ||
250 | [SYMSTP231] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 31, 0), /* SIU */ | ||
251 | [SYMSTP229] = MSTP(&r_clk, SYMSTPCR2, 29, 0), /* CMT10 */ | ||
252 | [SYMSTP225] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 25, 0), /* IRDA */ | ||
253 | [SYMSTP223] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 23, 0), /* IIC1 */ | ||
254 | [SYMSTP222] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 22, 0), /* USBHS */ | ||
255 | [SYMSTP215] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 15, 0), /* FLCTL */ | ||
256 | [SYMSTP214] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 14, 0), /* SDHI0 */ | ||
257 | [SYMSTP213] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 13, 0), /* SDHI1 */ | ||
258 | [SYMSTP211] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 11, 0), /* SDHI2 */ | ||
259 | [CMMSTP003] = MSTP(&r_clk, CMMSTPCR0, 3, 0), /* KEYSC */ | ||
260 | }; | ||
261 | |||
262 | static struct clk_lookup lookups[] = { | ||
263 | /* main clocks */ | ||
264 | CLKDEV_CON_ID("r_clk", &r_clk), | ||
265 | CLKDEV_CON_ID("extalb1", &sh7367_extalb1_clk), | ||
266 | CLKDEV_CON_ID("extal2", &sh7367_extal2_clk), | ||
267 | CLKDEV_CON_ID("extalb1_div2_clk", &extalb1_div2_clk), | ||
268 | CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk), | ||
269 | CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), | ||
270 | CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), | ||
271 | CLKDEV_CON_ID("pllc2_clk", &pllc2_clk), | ||
272 | |||
273 | /* DIV4 clocks */ | ||
274 | CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), | ||
275 | CLKDEV_CON_ID("g_clk", &div4_clks[DIV4_G]), | ||
276 | CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]), | ||
277 | CLKDEV_CON_ID("zx_clk", &div4_clks[DIV4_ZX]), | ||
278 | CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]), | ||
279 | CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]), | ||
280 | CLKDEV_CON_ID("zd_clk", &div4_clks[DIV4_ZD]), | ||
281 | CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]), | ||
282 | CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]), | ||
283 | CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]), | ||
284 | CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]), | ||
285 | CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]), | ||
286 | |||
287 | /* DIV6 clocks */ | ||
288 | CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), | ||
289 | CLKDEV_CON_ID("siua_clk", &div6_clks[DIV6_SIUA]), | ||
290 | CLKDEV_CON_ID("siub_clk", &div6_clks[DIV6_SIUB]), | ||
291 | CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]), | ||
292 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), | ||
293 | CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]), | ||
294 | CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]), | ||
295 | CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]), | ||
296 | CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), | ||
297 | CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), | ||
298 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), | ||
299 | CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), | ||
300 | |||
301 | /* MSTP32 clocks */ | ||
302 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[RTMSTP001]), /* IIC2 */ | ||
303 | CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[RTMSTP231]), /* VEU3 */ | ||
304 | CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[RTMSTP230]), /* VEU2 */ | ||
305 | CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[RTMSTP229]), /* VEU1 */ | ||
306 | CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[RTMSTP228]), /* VEU0 */ | ||
307 | CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[RTMSTP226]), /* VEU2H */ | ||
308 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[RTMSTP216]), /* IIC0 */ | ||
309 | CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[RTMSTP206]), /* JPU */ | ||
310 | CLKDEV_DEV_ID("sh-vou", &mstp_clks[RTMSTP205]), /* VOU */ | ||
311 | CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[RTMSTP201]), /* VPU */ | ||
312 | CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[SYMSTP023]), /* SPU1 */ | ||
313 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[SYMSTP007]), /* SCIFA5 */ | ||
314 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[SYMSTP006]), /* SCIFB */ | ||
315 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[SYMSTP004]), /* SCIFA0 */ | ||
316 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[SYMSTP003]), /* SCIFA1 */ | ||
317 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[SYMSTP002]), /* SCIFA2 */ | ||
318 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[SYMSTP001]), /* SCIFA3 */ | ||
319 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[SYMSTP000]), /* SCIFA4 */ | ||
320 | CLKDEV_DEV_ID("sh_siu", &mstp_clks[SYMSTP231]), /* SIU */ | ||
321 | CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[SYMSTP229]), /* CMT10 */ | ||
322 | CLKDEV_DEV_ID("sh_irda", &mstp_clks[SYMSTP225]), /* IRDA */ | ||
323 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[SYMSTP223]), /* IIC1 */ | ||
324 | CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[SYMSTP222]), /* USBHS */ | ||
325 | CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[SYMSTP222]), /* USBHS */ | ||
326 | CLKDEV_DEV_ID("sh_flctl", &mstp_clks[SYMSTP215]), /* FLCTL */ | ||
327 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[SYMSTP214]), /* SDHI0 */ | ||
328 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[SYMSTP213]), /* SDHI1 */ | ||
329 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[SYMSTP211]), /* SDHI2 */ | ||
330 | CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[CMMSTP003]), /* KEYSC */ | ||
331 | }; | ||
332 | |||
333 | void __init sh7367_clock_init(void) | ||
334 | { | ||
335 | int k, ret = 0; | ||
336 | |||
337 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) | ||
338 | ret = clk_register(main_clks[k]); | ||
339 | |||
340 | if (!ret) | ||
341 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); | ||
342 | |||
343 | if (!ret) | ||
344 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); | ||
345 | |||
346 | if (!ret) | ||
347 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); | ||
348 | |||
349 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | ||
350 | |||
351 | if (!ret) | ||
352 | shmobile_clk_init(); | ||
353 | else | ||
354 | panic("failed to setup sh7367 clocks\n"); | ||
355 | } | ||
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c index 430a90ffa120..4d57e342537b 100644 --- a/arch/arm/mach-shmobile/clock-sh7372.c +++ b/arch/arm/mach-shmobile/clock-sh7372.c | |||
@@ -420,87 +420,11 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { | |||
420 | }; | 420 | }; |
421 | 421 | ||
422 | /* FSI DIV */ | 422 | /* FSI DIV */ |
423 | static unsigned long fsidiv_recalc(struct clk *clk) | 423 | enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR }; |
424 | { | ||
425 | unsigned long value; | ||
426 | |||
427 | value = __raw_readl(clk->mapping->base); | ||
428 | |||
429 | value >>= 16; | ||
430 | if (value < 2) | ||
431 | return 0; | ||
432 | |||
433 | return clk->parent->rate / value; | ||
434 | } | ||
435 | |||
436 | static long fsidiv_round_rate(struct clk *clk, unsigned long rate) | ||
437 | { | ||
438 | return clk_rate_div_range_round(clk, 2, 0xffff, rate); | ||
439 | } | ||
440 | |||
441 | static void fsidiv_disable(struct clk *clk) | ||
442 | { | ||
443 | __raw_writel(0, clk->mapping->base); | ||
444 | } | ||
445 | |||
446 | static int fsidiv_enable(struct clk *clk) | ||
447 | { | ||
448 | unsigned long value; | ||
449 | |||
450 | value = __raw_readl(clk->mapping->base) >> 16; | ||
451 | if (value < 2) | ||
452 | return -EIO; | ||
453 | |||
454 | __raw_writel((value << 16) | 0x3, clk->mapping->base); | ||
455 | |||
456 | return 0; | ||
457 | } | ||
458 | 424 | ||
459 | static int fsidiv_set_rate(struct clk *clk, unsigned long rate) | 425 | static struct clk fsidivs[] = { |
460 | { | 426 | [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]), |
461 | int idx; | 427 | [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]), |
462 | |||
463 | idx = (clk->parent->rate / rate) & 0xffff; | ||
464 | if (idx < 2) | ||
465 | return -EINVAL; | ||
466 | |||
467 | __raw_writel(idx << 16, clk->mapping->base); | ||
468 | return 0; | ||
469 | } | ||
470 | |||
471 | static struct sh_clk_ops fsidiv_clk_ops = { | ||
472 | .recalc = fsidiv_recalc, | ||
473 | .round_rate = fsidiv_round_rate, | ||
474 | .set_rate = fsidiv_set_rate, | ||
475 | .enable = fsidiv_enable, | ||
476 | .disable = fsidiv_disable, | ||
477 | }; | ||
478 | |||
479 | static struct clk_mapping fsidiva_clk_mapping = { | ||
480 | .phys = FSIDIVA, | ||
481 | .len = 8, | ||
482 | }; | ||
483 | |||
484 | struct clk sh7372_fsidiva_clk = { | ||
485 | .ops = &fsidiv_clk_ops, | ||
486 | .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */ | ||
487 | .mapping = &fsidiva_clk_mapping, | ||
488 | }; | ||
489 | |||
490 | static struct clk_mapping fsidivb_clk_mapping = { | ||
491 | .phys = FSIDIVB, | ||
492 | .len = 8, | ||
493 | }; | ||
494 | |||
495 | struct clk sh7372_fsidivb_clk = { | ||
496 | .ops = &fsidiv_clk_ops, | ||
497 | .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */ | ||
498 | .mapping = &fsidivb_clk_mapping, | ||
499 | }; | ||
500 | |||
501 | static struct clk *late_main_clks[] = { | ||
502 | &sh7372_fsidiva_clk, | ||
503 | &sh7372_fsidivb_clk, | ||
504 | }; | 428 | }; |
505 | 429 | ||
506 | enum { MSTP001, MSTP000, | 430 | enum { MSTP001, MSTP000, |
@@ -583,6 +507,8 @@ static struct clk_lookup lookups[] = { | |||
583 | CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), | 507 | CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), |
584 | CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), | 508 | CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), |
585 | CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk), | 509 | CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk), |
510 | CLKDEV_CON_ID("fsidiva", &fsidivs[FSIDIV_A]), | ||
511 | CLKDEV_CON_ID("fsidivb", &fsidivs[FSIDIV_B]), | ||
586 | 512 | ||
587 | /* DIV4 clocks */ | 513 | /* DIV4 clocks */ |
588 | CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), | 514 | CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), |
@@ -678,6 +604,10 @@ static struct clk_lookup lookups[] = { | |||
678 | CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), | 604 | CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), |
679 | CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), | 605 | CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), |
680 | CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]), | 606 | CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]), |
607 | CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]), | ||
608 | CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]), | ||
609 | CLKDEV_ICK_ID("xcka", "sh_fsi2", &sh7372_fsiack_clk), | ||
610 | CLKDEV_ICK_ID("xckb", "sh_fsi2", &sh7372_fsibck_clk), | ||
681 | }; | 611 | }; |
682 | 612 | ||
683 | void __init sh7372_clock_init(void) | 613 | void __init sh7372_clock_init(void) |
@@ -706,8 +636,8 @@ void __init sh7372_clock_init(void) | |||
706 | if (!ret) | 636 | if (!ret) |
707 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); | 637 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); |
708 | 638 | ||
709 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) | 639 | if (!ret) |
710 | ret = clk_register(late_main_clks[k]); | 640 | ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR); |
711 | 641 | ||
712 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 642 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
713 | 643 | ||
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c deleted file mode 100644 index b8480d19e1c8..000000000000 --- a/arch/arm/mach-shmobile/clock-sh7377.c +++ /dev/null | |||
@@ -1,366 +0,0 @@ | |||
1 | /* | ||
2 | * SH7377 clock framework support | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/io.h> | ||
22 | #include <linux/sh_clk.h> | ||
23 | #include <linux/clkdev.h> | ||
24 | #include <mach/common.h> | ||
25 | |||
26 | /* SH7377 registers */ | ||
27 | #define RTFRQCR IOMEM(0xe6150000) | ||
28 | #define SYFRQCR IOMEM(0xe6150004) | ||
29 | #define CMFRQCR IOMEM(0xe61500E0) | ||
30 | #define VCLKCR1 IOMEM(0xe6150008) | ||
31 | #define VCLKCR2 IOMEM(0xe615000C) | ||
32 | #define VCLKCR3 IOMEM(0xe615001C) | ||
33 | #define FMSICKCR IOMEM(0xe6150010) | ||
34 | #define FMSOCKCR IOMEM(0xe6150014) | ||
35 | #define FSICKCR IOMEM(0xe6150018) | ||
36 | #define PLLC1CR IOMEM(0xe6150028) | ||
37 | #define PLLC2CR IOMEM(0xe615002C) | ||
38 | #define SUBUSBCKCR IOMEM(0xe6150080) | ||
39 | #define SPUCKCR IOMEM(0xe6150084) | ||
40 | #define MSUCKCR IOMEM(0xe6150088) | ||
41 | #define MVI3CKCR IOMEM(0xe6150090) | ||
42 | #define HDMICKCR IOMEM(0xe6150094) | ||
43 | #define MFCK1CR IOMEM(0xe6150098) | ||
44 | #define MFCK2CR IOMEM(0xe615009C) | ||
45 | #define DSITCKCR IOMEM(0xe6150060) | ||
46 | #define DSIPCKCR IOMEM(0xe6150064) | ||
47 | #define SMSTPCR0 IOMEM(0xe6150130) | ||
48 | #define SMSTPCR1 IOMEM(0xe6150134) | ||
49 | #define SMSTPCR2 IOMEM(0xe6150138) | ||
50 | #define SMSTPCR3 IOMEM(0xe615013C) | ||
51 | #define SMSTPCR4 IOMEM(0xe6150140) | ||
52 | |||
53 | /* Fixed 32 KHz root clock from EXTALR pin */ | ||
54 | static struct clk r_clk = { | ||
55 | .rate = 32768, | ||
56 | }; | ||
57 | |||
58 | /* | ||
59 | * 26MHz default rate for the EXTALC1 root input clock. | ||
60 | * If needed, reset this with clk_set_rate() from the platform code. | ||
61 | */ | ||
62 | struct clk sh7377_extalc1_clk = { | ||
63 | .rate = 26666666, | ||
64 | }; | ||
65 | |||
66 | /* | ||
67 | * 48MHz default rate for the EXTAL2 root input clock. | ||
68 | * If needed, reset this with clk_set_rate() from the platform code. | ||
69 | */ | ||
70 | struct clk sh7377_extal2_clk = { | ||
71 | .rate = 48000000, | ||
72 | }; | ||
73 | |||
74 | /* A fixed divide-by-2 block */ | ||
75 | static unsigned long div2_recalc(struct clk *clk) | ||
76 | { | ||
77 | return clk->parent->rate / 2; | ||
78 | } | ||
79 | |||
80 | static struct sh_clk_ops div2_clk_ops = { | ||
81 | .recalc = div2_recalc, | ||
82 | }; | ||
83 | |||
84 | /* Divide extalc1 by two */ | ||
85 | static struct clk extalc1_div2_clk = { | ||
86 | .ops = &div2_clk_ops, | ||
87 | .parent = &sh7377_extalc1_clk, | ||
88 | }; | ||
89 | |||
90 | /* Divide extal2 by two */ | ||
91 | static struct clk extal2_div2_clk = { | ||
92 | .ops = &div2_clk_ops, | ||
93 | .parent = &sh7377_extal2_clk, | ||
94 | }; | ||
95 | |||
96 | /* Divide extal2 by four */ | ||
97 | static struct clk extal2_div4_clk = { | ||
98 | .ops = &div2_clk_ops, | ||
99 | .parent = &extal2_div2_clk, | ||
100 | }; | ||
101 | |||
102 | /* PLLC1 */ | ||
103 | static unsigned long pllc1_recalc(struct clk *clk) | ||
104 | { | ||
105 | unsigned long mult = 1; | ||
106 | |||
107 | if (__raw_readl(PLLC1CR) & (1 << 14)) | ||
108 | mult = (((__raw_readl(RTFRQCR) >> 24) & 0x3f) + 1) * 2; | ||
109 | |||
110 | return clk->parent->rate * mult; | ||
111 | } | ||
112 | |||
113 | static struct sh_clk_ops pllc1_clk_ops = { | ||
114 | .recalc = pllc1_recalc, | ||
115 | }; | ||
116 | |||
117 | static struct clk pllc1_clk = { | ||
118 | .ops = &pllc1_clk_ops, | ||
119 | .flags = CLK_ENABLE_ON_INIT, | ||
120 | .parent = &extalc1_div2_clk, | ||
121 | }; | ||
122 | |||
123 | /* Divide PLLC1 by two */ | ||
124 | static struct clk pllc1_div2_clk = { | ||
125 | .ops = &div2_clk_ops, | ||
126 | .parent = &pllc1_clk, | ||
127 | }; | ||
128 | |||
129 | /* PLLC2 */ | ||
130 | static unsigned long pllc2_recalc(struct clk *clk) | ||
131 | { | ||
132 | unsigned long mult = 1; | ||
133 | |||
134 | if (__raw_readl(PLLC2CR) & (1 << 31)) | ||
135 | mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2; | ||
136 | |||
137 | return clk->parent->rate * mult; | ||
138 | } | ||
139 | |||
140 | static struct sh_clk_ops pllc2_clk_ops = { | ||
141 | .recalc = pllc2_recalc, | ||
142 | }; | ||
143 | |||
144 | static struct clk pllc2_clk = { | ||
145 | .ops = &pllc2_clk_ops, | ||
146 | .flags = CLK_ENABLE_ON_INIT, | ||
147 | .parent = &extalc1_div2_clk, | ||
148 | }; | ||
149 | |||
150 | static struct clk *main_clks[] = { | ||
151 | &r_clk, | ||
152 | &sh7377_extalc1_clk, | ||
153 | &sh7377_extal2_clk, | ||
154 | &extalc1_div2_clk, | ||
155 | &extal2_div2_clk, | ||
156 | &extal2_div4_clk, | ||
157 | &pllc1_clk, | ||
158 | &pllc1_div2_clk, | ||
159 | &pllc2_clk, | ||
160 | }; | ||
161 | |||
162 | static void div4_kick(struct clk *clk) | ||
163 | { | ||
164 | unsigned long value; | ||
165 | |||
166 | /* set KICK bit in SYFRQCR to update hardware setting */ | ||
167 | value = __raw_readl(SYFRQCR); | ||
168 | value |= (1 << 31); | ||
169 | __raw_writel(value, SYFRQCR); | ||
170 | } | ||
171 | |||
172 | static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, | ||
173 | 24, 32, 36, 48, 0, 72, 96, 0 }; | ||
174 | |||
175 | static struct clk_div_mult_table div4_div_mult_table = { | ||
176 | .divisors = divisors, | ||
177 | .nr_divisors = ARRAY_SIZE(divisors), | ||
178 | }; | ||
179 | |||
180 | static struct clk_div4_table div4_table = { | ||
181 | .div_mult_table = &div4_div_mult_table, | ||
182 | .kick = div4_kick, | ||
183 | }; | ||
184 | |||
185 | enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_CSIR, | ||
186 | DIV4_ZTR, DIV4_ZT, DIV4_Z, DIV4_HP, | ||
187 | DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR }; | ||
188 | |||
189 | #define DIV4(_reg, _bit, _mask, _flags) \ | ||
190 | SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags) | ||
191 | |||
192 | static struct clk div4_clks[DIV4_NR] = { | ||
193 | [DIV4_I] = DIV4(RTFRQCR, 20, 0x6fff, CLK_ENABLE_ON_INIT), | ||
194 | [DIV4_ZG] = DIV4(RTFRQCR, 16, 0x6fff, CLK_ENABLE_ON_INIT), | ||
195 | [DIV4_B] = DIV4(RTFRQCR, 8, 0x6fff, CLK_ENABLE_ON_INIT), | ||
196 | [DIV4_M1] = DIV4(RTFRQCR, 4, 0x6fff, CLK_ENABLE_ON_INIT), | ||
197 | [DIV4_CSIR] = DIV4(RTFRQCR, 0, 0x6fff, 0), | ||
198 | [DIV4_ZTR] = DIV4(SYFRQCR, 20, 0x6fff, 0), | ||
199 | [DIV4_ZT] = DIV4(SYFRQCR, 16, 0x6fff, 0), | ||
200 | [DIV4_Z] = DIV4(SYFRQCR, 12, 0x6fff, 0), | ||
201 | [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0), | ||
202 | [DIV4_ZS] = DIV4(CMFRQCR, 12, 0x6fff, 0), | ||
203 | [DIV4_ZB] = DIV4(CMFRQCR, 8, 0x6fff, 0), | ||
204 | [DIV4_ZB3] = DIV4(CMFRQCR, 4, 0x6fff, 0), | ||
205 | [DIV4_CP] = DIV4(CMFRQCR, 0, 0x6fff, 0), | ||
206 | }; | ||
207 | |||
208 | enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO, | ||
209 | DIV6_FSI, DIV6_SUB, DIV6_SPU, DIV6_MSU, DIV6_MVI3, DIV6_HDMI, | ||
210 | DIV6_MF1, DIV6_MF2, DIV6_DSIT, DIV6_DSIP, | ||
211 | DIV6_NR }; | ||
212 | |||
213 | static struct clk div6_clks[] = { | ||
214 | [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0), | ||
215 | [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0), | ||
216 | [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0), | ||
217 | [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0), | ||
218 | [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0), | ||
219 | [DIV6_FSI] = SH_CLK_DIV6(&pllc1_div2_clk, FSICKCR, 0), | ||
220 | [DIV6_SUB] = SH_CLK_DIV6(&sh7377_extal2_clk, SUBUSBCKCR, 0), | ||
221 | [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0), | ||
222 | [DIV6_MSU] = SH_CLK_DIV6(&pllc1_div2_clk, MSUCKCR, 0), | ||
223 | [DIV6_MVI3] = SH_CLK_DIV6(&pllc1_div2_clk, MVI3CKCR, 0), | ||
224 | [DIV6_HDMI] = SH_CLK_DIV6(&pllc1_div2_clk, HDMICKCR, 0), | ||
225 | [DIV6_MF1] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK1CR, 0), | ||
226 | [DIV6_MF2] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK2CR, 0), | ||
227 | [DIV6_DSIT] = SH_CLK_DIV6(&pllc1_div2_clk, DSITCKCR, 0), | ||
228 | [DIV6_DSIP] = SH_CLK_DIV6(&pllc1_div2_clk, DSIPCKCR, 0), | ||
229 | }; | ||
230 | |||
231 | enum { MSTP001, | ||
232 | MSTP131, MSTP130, MSTP129, MSTP128, MSTP116, MSTP106, MSTP101, | ||
233 | MSTP223, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, | ||
234 | MSTP331, MSTP329, MSTP325, MSTP323, MSTP322, | ||
235 | MSTP315, MSTP314, MSTP313, | ||
236 | MSTP403, | ||
237 | MSTP_NR }; | ||
238 | |||
239 | #define MSTP(_parent, _reg, _bit, _flags) \ | ||
240 | SH_CLK_MSTP32(_parent, _reg, _bit, _flags) | ||
241 | |||
242 | static struct clk mstp_clks[] = { | ||
243 | [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */ | ||
244 | [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */ | ||
245 | [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */ | ||
246 | [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */ | ||
247 | [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */ | ||
248 | [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ | ||
249 | [MSTP106] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 6, 0), /* JPU */ | ||
250 | [MSTP101] = MSTP(&div4_clks[DIV4_M1], SMSTPCR1, 1, 0), /* VPU */ | ||
251 | [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */ | ||
252 | [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ | ||
253 | [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ | ||
254 | [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ | ||
255 | [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */ | ||
256 | [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */ | ||
257 | [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */ | ||
258 | [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ | ||
259 | [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */ | ||
260 | [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ | ||
261 | [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IRDA */ | ||
262 | [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */ | ||
263 | [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */ | ||
264 | [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL */ | ||
265 | [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */ | ||
266 | [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */ | ||
267 | [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ | ||
268 | }; | ||
269 | |||
270 | static struct clk_lookup lookups[] = { | ||
271 | /* main clocks */ | ||
272 | CLKDEV_CON_ID("r_clk", &r_clk), | ||
273 | CLKDEV_CON_ID("extalc1", &sh7377_extalc1_clk), | ||
274 | CLKDEV_CON_ID("extal2", &sh7377_extal2_clk), | ||
275 | CLKDEV_CON_ID("extalc1_div2_clk", &extalc1_div2_clk), | ||
276 | CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk), | ||
277 | CLKDEV_CON_ID("extal2_div4_clk", &extal2_div4_clk), | ||
278 | CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), | ||
279 | CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), | ||
280 | CLKDEV_CON_ID("pllc2_clk", &pllc2_clk), | ||
281 | |||
282 | /* DIV4 clocks */ | ||
283 | CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), | ||
284 | CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]), | ||
285 | CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]), | ||
286 | CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]), | ||
287 | CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]), | ||
288 | CLKDEV_CON_ID("ztr_clk", &div4_clks[DIV4_ZTR]), | ||
289 | CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]), | ||
290 | CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]), | ||
291 | CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]), | ||
292 | CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]), | ||
293 | CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]), | ||
294 | CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]), | ||
295 | CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]), | ||
296 | |||
297 | /* DIV6 clocks */ | ||
298 | CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), | ||
299 | CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), | ||
300 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), | ||
301 | CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), | ||
302 | CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), | ||
303 | CLKDEV_CON_ID("fsi_clk", &div6_clks[DIV6_FSI]), | ||
304 | CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), | ||
305 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), | ||
306 | CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]), | ||
307 | CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]), | ||
308 | CLKDEV_CON_ID("hdmi_clk", &div6_clks[DIV6_HDMI]), | ||
309 | CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]), | ||
310 | CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]), | ||
311 | CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]), | ||
312 | CLKDEV_CON_ID("dsip_clk", &div6_clks[DIV6_DSIP]), | ||
313 | |||
314 | /* MSTP32 clocks */ | ||
315 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */ | ||
316 | CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */ | ||
317 | CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ | ||
318 | CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */ | ||
319 | CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */ | ||
320 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ | ||
321 | CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */ | ||
322 | CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */ | ||
323 | CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP223]), /* SPU2DSP0 */ | ||
324 | CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[MSTP223]), /* SPU2DSP1 */ | ||
325 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ | ||
326 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP206]), /* SCIFB */ | ||
327 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ | ||
328 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */ | ||
329 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */ | ||
330 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */ | ||
331 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ | ||
332 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */ | ||
333 | CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ | ||
334 | CLKDEV_DEV_ID("sh_irda", &mstp_clks[MSTP325]), /* IRDA */ | ||
335 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ | ||
336 | CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USBHS */ | ||
337 | CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USBHS */ | ||
338 | CLKDEV_DEV_ID("sh_flctl", &mstp_clks[MSTP315]), /* FLCTL */ | ||
339 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ | ||
340 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ | ||
341 | CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ | ||
342 | }; | ||
343 | |||
344 | void __init sh7377_clock_init(void) | ||
345 | { | ||
346 | int k, ret = 0; | ||
347 | |||
348 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) | ||
349 | ret = clk_register(main_clks[k]); | ||
350 | |||
351 | if (!ret) | ||
352 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); | ||
353 | |||
354 | if (!ret) | ||
355 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); | ||
356 | |||
357 | if (!ret) | ||
358 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); | ||
359 | |||
360 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | ||
361 | |||
362 | if (!ret) | ||
363 | shmobile_clk_init(); | ||
364 | else | ||
365 | panic("failed to setup sh7377 clocks\n"); | ||
366 | } | ||
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index d47e215aca87..dfeca79e9e96 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h | |||
@@ -18,24 +18,6 @@ extern int shmobile_enter_wfi(struct cpuidle_device *dev, | |||
18 | struct cpuidle_driver *drv, int index); | 18 | struct cpuidle_driver *drv, int index); |
19 | extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv); | 19 | extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv); |
20 | 20 | ||
21 | extern void sh7367_init_irq(void); | ||
22 | extern void sh7367_map_io(void); | ||
23 | extern void sh7367_add_early_devices(void); | ||
24 | extern void sh7367_add_standard_devices(void); | ||
25 | extern void sh7367_clock_init(void); | ||
26 | extern void sh7367_pinmux_init(void); | ||
27 | extern struct clk sh7367_extalb1_clk; | ||
28 | extern struct clk sh7367_extal2_clk; | ||
29 | |||
30 | extern void sh7377_init_irq(void); | ||
31 | extern void sh7377_map_io(void); | ||
32 | extern void sh7377_add_early_devices(void); | ||
33 | extern void sh7377_add_standard_devices(void); | ||
34 | extern void sh7377_clock_init(void); | ||
35 | extern void sh7377_pinmux_init(void); | ||
36 | extern struct clk sh7377_extalc1_clk; | ||
37 | extern struct clk sh7377_extal2_clk; | ||
38 | |||
39 | extern void sh7372_init_irq(void); | 21 | extern void sh7372_init_irq(void); |
40 | extern void sh7372_map_io(void); | 22 | extern void sh7372_map_io(void); |
41 | extern void sh7372_add_early_devices(void); | 23 | extern void sh7372_add_early_devices(void); |
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h index 499f52d2a4a1..8ab0cd6ad6b0 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7779.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h | |||
@@ -71,7 +71,7 @@ enum { | |||
71 | GPIO_FN_A19, | 71 | GPIO_FN_A19, |
72 | 72 | ||
73 | /* IPSR0 */ | 73 | /* IPSR0 */ |
74 | GPIO_FN_PENC2, GPIO_FN_SCK0, GPIO_FN_PWM1, GPIO_FN_PWMFSW0, | 74 | GPIO_FN_USB_PENC2, GPIO_FN_SCK0, GPIO_FN_PWM1, GPIO_FN_PWMFSW0, |
75 | GPIO_FN_SCIF_CLK, GPIO_FN_TCLK0_C, GPIO_FN_BS, GPIO_FN_SD1_DAT2, | 75 | GPIO_FN_SCIF_CLK, GPIO_FN_TCLK0_C, GPIO_FN_BS, GPIO_FN_SD1_DAT2, |
76 | GPIO_FN_MMC0_D2, GPIO_FN_FD2, GPIO_FN_ATADIR0, GPIO_FN_SDSELF, | 76 | GPIO_FN_MMC0_D2, GPIO_FN_FD2, GPIO_FN_ATADIR0, GPIO_FN_SDSELF, |
77 | GPIO_FN_HCTS1, GPIO_FN_TX4_C, GPIO_FN_A0, GPIO_FN_SD1_DAT3, | 77 | GPIO_FN_HCTS1, GPIO_FN_TX4_C, GPIO_FN_A0, GPIO_FN_SD1_DAT3, |
diff --git a/arch/arm/mach-shmobile/include/mach/sh7367.h b/arch/arm/mach-shmobile/include/mach/sh7367.h deleted file mode 100644 index 52d0de686f68..000000000000 --- a/arch/arm/mach-shmobile/include/mach/sh7367.h +++ /dev/null | |||
@@ -1,332 +0,0 @@ | |||
1 | #ifndef __ASM_SH7367_H__ | ||
2 | #define __ASM_SH7367_H__ | ||
3 | |||
4 | /* Pin Function Controller: | ||
5 | * GPIO_FN_xx - GPIO used to select pin function | ||
6 | * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU | ||
7 | */ | ||
8 | enum { | ||
9 | /* 49-1 -> 49-6 (GPIO) */ | ||
10 | GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4, | ||
11 | GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9, | ||
12 | |||
13 | GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14, | ||
14 | GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19, | ||
15 | |||
16 | GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24, | ||
17 | GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29, | ||
18 | |||
19 | GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34, | ||
20 | GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39, | ||
21 | |||
22 | GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44, | ||
23 | GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49, | ||
24 | |||
25 | GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54, | ||
26 | GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59, | ||
27 | |||
28 | GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64, | ||
29 | GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69, | ||
30 | |||
31 | GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74, | ||
32 | GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79, | ||
33 | |||
34 | GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84, | ||
35 | GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89, | ||
36 | |||
37 | GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94, | ||
38 | GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99, | ||
39 | |||
40 | GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104, | ||
41 | GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109, | ||
42 | |||
43 | GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114, | ||
44 | GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119, | ||
45 | |||
46 | GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124, | ||
47 | GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129, | ||
48 | |||
49 | GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134, | ||
50 | GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139, | ||
51 | |||
52 | GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144, | ||
53 | GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149, | ||
54 | |||
55 | GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154, | ||
56 | GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159, | ||
57 | |||
58 | GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164, | ||
59 | GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169, | ||
60 | |||
61 | GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174, | ||
62 | GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179, | ||
63 | |||
64 | GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184, | ||
65 | GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189, | ||
66 | |||
67 | GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194, | ||
68 | GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199, | ||
69 | |||
70 | GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204, | ||
71 | GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209, | ||
72 | |||
73 | GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214, | ||
74 | GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219, | ||
75 | |||
76 | GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224, | ||
77 | GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229, | ||
78 | |||
79 | GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234, | ||
80 | GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239, | ||
81 | |||
82 | GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244, | ||
83 | GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249, | ||
84 | |||
85 | GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254, | ||
86 | GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259, | ||
87 | |||
88 | GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264, | ||
89 | GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269, | ||
90 | |||
91 | GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, | ||
92 | |||
93 | /* Special Pull-up / Pull-down Functions */ | ||
94 | GPIO_FN_PORT48_KEYIN0_PU, GPIO_FN_PORT49_KEYIN1_PU, | ||
95 | GPIO_FN_PORT50_KEYIN2_PU, GPIO_FN_PORT55_KEYIN3_PU, | ||
96 | GPIO_FN_PORT56_KEYIN4_PU, GPIO_FN_PORT57_KEYIN5_PU, | ||
97 | GPIO_FN_PORT58_KEYIN6_PU, | ||
98 | |||
99 | /* 49-1 (FN) */ | ||
100 | GPIO_FN_VBUS0, GPIO_FN_CPORT0, GPIO_FN_CPORT1, GPIO_FN_CPORT2, | ||
101 | GPIO_FN_CPORT3, GPIO_FN_CPORT4, GPIO_FN_CPORT5, GPIO_FN_CPORT6, | ||
102 | GPIO_FN_CPORT7, GPIO_FN_CPORT8, GPIO_FN_CPORT9, GPIO_FN_CPORT10, | ||
103 | GPIO_FN_CPORT11, GPIO_FN_SIN2, GPIO_FN_CPORT12, GPIO_FN_XCTS2, | ||
104 | GPIO_FN_CPORT13, GPIO_FN_RFSPO4, GPIO_FN_CPORT14, GPIO_FN_RFSPO5, | ||
105 | GPIO_FN_CPORT15, GPIO_FN_CPORT16, GPIO_FN_CPORT17, GPIO_FN_SOUT2, | ||
106 | GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_CPORT19, GPIO_FN_CPORT20, | ||
107 | GPIO_FN_RFSPO6, GPIO_FN_CPORT21, GPIO_FN_STATUS0, GPIO_FN_CPORT22, | ||
108 | GPIO_FN_STATUS1, GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7, | ||
109 | GPIO_FN_MPORT0, GPIO_FN_MPORT1, GPIO_FN_B_SYNLD1, GPIO_FN_B_SYNLD2, | ||
110 | GPIO_FN_XMAINPS, GPIO_FN_XDIVPS, GPIO_FN_XIDRST, GPIO_FN_IDCLK, | ||
111 | GPIO_FN_IDIO, GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD, | ||
112 | GPIO_FN_M02_BERDAT, GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP, | ||
113 | GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK, | ||
114 | GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS, | ||
115 | |||
116 | /* 49-2 (FN) */ | ||
117 | GPIO_FN_HSU_IQ_AGC6, GPIO_FN_MFG2_IN2, GPIO_FN_MSIOF2_MCK0, | ||
118 | GPIO_FN_HSU_IQ_AGC5, GPIO_FN_MFG2_IN1, GPIO_FN_MSIOF2_MCK1, | ||
119 | GPIO_FN_HSU_IQ_AGC4, GPIO_FN_MSIOF2_RSYNC, | ||
120 | GPIO_FN_HSU_IQ_AGC3, GPIO_FN_MFG2_OUT1, GPIO_FN_MSIOF2_RSCK, | ||
121 | GPIO_FN_HSU_IQ_AGC2, GPIO_FN_PORT42_KEYOUT0, | ||
122 | GPIO_FN_HSU_IQ_AGC1, GPIO_FN_PORT43_KEYOUT1, | ||
123 | GPIO_FN_HSU_IQ_AGC0, GPIO_FN_PORT44_KEYOUT2, | ||
124 | GPIO_FN_HSU_IQ_AGC_ST, GPIO_FN_PORT45_KEYOUT3, | ||
125 | GPIO_FN_HSU_IQ_PDO, GPIO_FN_PORT46_KEYOUT4, | ||
126 | GPIO_FN_HSU_IQ_PYO, GPIO_FN_PORT47_KEYOUT5, | ||
127 | GPIO_FN_HSU_EN_TXMUX_G3MO, GPIO_FN_PORT48_KEYIN0, | ||
128 | GPIO_FN_HSU_I_TXMUX_G3MO, GPIO_FN_PORT49_KEYIN1, | ||
129 | GPIO_FN_HSU_Q_TXMUX_G3MO, GPIO_FN_PORT50_KEYIN2, | ||
130 | GPIO_FN_HSU_SYO, GPIO_FN_PORT51_MSIOF2_TSYNC, | ||
131 | GPIO_FN_HSU_SDO, GPIO_FN_PORT52_MSIOF2_TSCK, | ||
132 | GPIO_FN_HSU_TGTTI_G3MO, GPIO_FN_PORT53_MSIOF2_TXD, | ||
133 | GPIO_FN_B_TIME_STAMP, GPIO_FN_PORT54_MSIOF2_RXD, | ||
134 | GPIO_FN_HSU_SDI, GPIO_FN_PORT55_KEYIN3, | ||
135 | GPIO_FN_HSU_SCO, GPIO_FN_PORT56_KEYIN4, | ||
136 | GPIO_FN_HSU_DREQ, GPIO_FN_PORT57_KEYIN5, | ||
137 | GPIO_FN_HSU_DACK, GPIO_FN_PORT58_KEYIN6, | ||
138 | GPIO_FN_HSU_CLK61M, GPIO_FN_PORT59_MSIOF2_SS1, | ||
139 | GPIO_FN_HSU_XRST, GPIO_FN_PORT60_MSIOF2_SS2, | ||
140 | GPIO_FN_PCMCLKO, GPIO_FN_SYNC8KO, GPIO_FN_DNPCM_A, GPIO_FN_UPPCM_A, | ||
141 | GPIO_FN_XTALB1L, | ||
142 | GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS, | ||
143 | GPIO_FN_GPS_AGC2, GPIO_FN_SCIFA0_SCK, | ||
144 | GPIO_FN_GPS_AGC3, GPIO_FN_SCIFA0_TXD, | ||
145 | GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD, | ||
146 | GPIO_FN_GPS_PWRD, GPIO_FN_SCIFA0_CTS, | ||
147 | GPIO_FN_GPS_IM, GPIO_FN_GPS_IS, GPIO_FN_GPS_QM, GPIO_FN_GPS_QS, | ||
148 | GPIO_FN_SIUBOMC, GPIO_FN_TPU2TO0, | ||
149 | GPIO_FN_SIUCKB, GPIO_FN_TPU2TO1, | ||
150 | GPIO_FN_SIUBOLR, GPIO_FN_BBIF2_TSYNC, GPIO_FN_TPU2TO2, | ||
151 | GPIO_FN_SIUBOBT, GPIO_FN_BBIF2_TSCK, GPIO_FN_TPU2TO3, | ||
152 | GPIO_FN_SIUBOSLD, GPIO_FN_BBIF2_TXD, GPIO_FN_TPU3TO0, | ||
153 | GPIO_FN_SIUBILR, GPIO_FN_TPU3TO1, | ||
154 | GPIO_FN_SIUBIBT, GPIO_FN_TPU3TO2, | ||
155 | GPIO_FN_SIUBISLD, GPIO_FN_TPU3TO3, | ||
156 | GPIO_FN_NMI, GPIO_FN_TPU4TO0, | ||
157 | GPIO_FN_DNPCM_M, GPIO_FN_TPU4TO1, GPIO_FN_TPU4TO2, GPIO_FN_TPU4TO3, | ||
158 | GPIO_FN_IRQ_TMPB, | ||
159 | GPIO_FN_PWEN, GPIO_FN_MFG1_OUT1, | ||
160 | GPIO_FN_OVCN, GPIO_FN_MFG1_IN1, | ||
161 | GPIO_FN_OVCN2, GPIO_FN_MFG1_IN2, | ||
162 | |||
163 | /* 49-3 (FN) */ | ||
164 | GPIO_FN_RFSPO1, GPIO_FN_RFSPO2, GPIO_FN_RFSPO3, GPIO_FN_PORT93_VIO_CKO2, | ||
165 | GPIO_FN_USBTERM, GPIO_FN_EXTLP, GPIO_FN_IDIN, | ||
166 | GPIO_FN_SCIFA5_CTS, GPIO_FN_MFG0_IN1, | ||
167 | GPIO_FN_SCIFA5_RTS, GPIO_FN_MFG0_IN2, | ||
168 | GPIO_FN_SCIFA5_RXD, | ||
169 | GPIO_FN_SCIFA5_TXD, | ||
170 | GPIO_FN_SCIFA5_SCK, GPIO_FN_MFG0_OUT1, | ||
171 | GPIO_FN_A0_EA0, GPIO_FN_BS, | ||
172 | GPIO_FN_A14_EA14, GPIO_FN_PORT102_KEYOUT0, | ||
173 | GPIO_FN_A15_EA15, GPIO_FN_PORT103_KEYOUT1, GPIO_FN_DV_CLKOL, | ||
174 | GPIO_FN_A16_EA16, GPIO_FN_PORT104_KEYOUT2, | ||
175 | GPIO_FN_DV_VSYNCL, GPIO_FN_MSIOF0_SS1, | ||
176 | GPIO_FN_A17_EA17, GPIO_FN_PORT105_KEYOUT3, | ||
177 | GPIO_FN_DV_HSYNCL, GPIO_FN_MSIOF0_TSYNC, | ||
178 | GPIO_FN_A18_EA18, GPIO_FN_PORT106_KEYOUT4, | ||
179 | GPIO_FN_DV_DL0, GPIO_FN_MSIOF0_TSCK, | ||
180 | GPIO_FN_A19_EA19, GPIO_FN_PORT107_KEYOUT5, | ||
181 | GPIO_FN_DV_DL1, GPIO_FN_MSIOF0_TXD, | ||
182 | GPIO_FN_A20_EA20, GPIO_FN_PORT108_KEYIN0, | ||
183 | GPIO_FN_DV_DL2, GPIO_FN_MSIOF0_RSCK, | ||
184 | GPIO_FN_A21_EA21, GPIO_FN_PORT109_KEYIN1, | ||
185 | GPIO_FN_DV_DL3, GPIO_FN_MSIOF0_RSYNC, | ||
186 | GPIO_FN_A22_EA22, GPIO_FN_PORT110_KEYIN2, | ||
187 | GPIO_FN_DV_DL4, GPIO_FN_MSIOF0_MCK0, | ||
188 | GPIO_FN_A23_EA23, GPIO_FN_PORT111_KEYIN3, | ||
189 | GPIO_FN_DV_DL5, GPIO_FN_MSIOF0_MCK1, | ||
190 | GPIO_FN_A24_EA24, GPIO_FN_PORT112_KEYIN4, | ||
191 | GPIO_FN_DV_DL6, GPIO_FN_MSIOF0_RXD, | ||
192 | GPIO_FN_A25_EA25, GPIO_FN_PORT113_KEYIN5, | ||
193 | GPIO_FN_DV_DL7, GPIO_FN_MSIOF0_SS2, | ||
194 | GPIO_FN_A26, GPIO_FN_PORT113_KEYIN6, GPIO_FN_DV_CLKIL, | ||
195 | GPIO_FN_D0_ED0_NAF0, GPIO_FN_D1_ED1_NAF1, GPIO_FN_D2_ED2_NAF2, | ||
196 | GPIO_FN_D3_ED3_NAF3, GPIO_FN_D4_ED4_NAF4, GPIO_FN_D5_ED5_NAF5, | ||
197 | GPIO_FN_D6_ED6_NAF6, GPIO_FN_D7_ED7_NAF7, GPIO_FN_D8_ED8_NAF8, | ||
198 | GPIO_FN_D9_ED9_NAF9, GPIO_FN_D10_ED10_NAF10, GPIO_FN_D11_ED11_NAF11, | ||
199 | GPIO_FN_D12_ED12_NAF12, GPIO_FN_D13_ED13_NAF13, | ||
200 | GPIO_FN_D14_ED14_NAF14, GPIO_FN_D15_ED15_NAF15, | ||
201 | GPIO_FN_CS4, GPIO_FN_CS5A, GPIO_FN_CS5B, GPIO_FN_FCE1, | ||
202 | GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_FCE0, GPIO_FN_CS6A, | ||
203 | GPIO_FN_DACK0, GPIO_FN_WAIT, GPIO_FN_DREQ0, GPIO_FN_RD_XRD, | ||
204 | GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_WE0_XWR0_FWE, | ||
205 | GPIO_FN_WE1_XWR1, GPIO_FN_FRB, GPIO_FN_CKO, | ||
206 | GPIO_FN_NBRSTOUT, GPIO_FN_NBRST, | ||
207 | |||
208 | /* 49-4 (FN) */ | ||
209 | GPIO_FN_RFSPO0, GPIO_FN_PORT146_VIO_CKO2, GPIO_FN_TSTMD, | ||
210 | GPIO_FN_VIO_VD, GPIO_FN_VIO_HD, | ||
211 | GPIO_FN_VIO_D0, GPIO_FN_VIO_D1, GPIO_FN_VIO_D2, | ||
212 | GPIO_FN_VIO_D3, GPIO_FN_VIO_D4, GPIO_FN_VIO_D5, | ||
213 | GPIO_FN_VIO_D6, GPIO_FN_VIO_D7, GPIO_FN_VIO_D8, | ||
214 | GPIO_FN_VIO_D9, GPIO_FN_VIO_D10, GPIO_FN_VIO_D11, | ||
215 | GPIO_FN_VIO_D12, GPIO_FN_VIO_D13, GPIO_FN_VIO_D14, | ||
216 | GPIO_FN_VIO_D15, GPIO_FN_VIO_CLK, GPIO_FN_VIO_FIELD, | ||
217 | GPIO_FN_VIO_CKO, | ||
218 | GPIO_FN_MFG3_IN1, GPIO_FN_MFG3_IN2, | ||
219 | GPIO_FN_M9_SLCD_A01, GPIO_FN_MFG3_OUT1, GPIO_FN_TPU0TO0, | ||
220 | GPIO_FN_M10_SLCD_CK1, GPIO_FN_MFG4_IN1, GPIO_FN_TPU0TO1, | ||
221 | GPIO_FN_M11_SLCD_SO1, GPIO_FN_MFG4_IN2, GPIO_FN_TPU0TO2, | ||
222 | GPIO_FN_M12_SLCD_CE1, GPIO_FN_MFG4_OUT1, GPIO_FN_TPU0TO3, | ||
223 | GPIO_FN_LCDD0, GPIO_FN_PORT175_KEYOUT0, GPIO_FN_DV_D0, | ||
224 | GPIO_FN_SIUCKA, GPIO_FN_MFG0_OUT2, | ||
225 | GPIO_FN_LCDD1, GPIO_FN_PORT176_KEYOUT1, GPIO_FN_DV_D1, | ||
226 | GPIO_FN_SIUAOLR, GPIO_FN_BBIF2_TSYNC1, | ||
227 | GPIO_FN_LCDD2, GPIO_FN_PORT177_KEYOUT2, GPIO_FN_DV_D2, | ||
228 | GPIO_FN_SIUAOBT, GPIO_FN_BBIF2_TSCK1, | ||
229 | GPIO_FN_LCDD3, GPIO_FN_PORT178_KEYOUT3, GPIO_FN_DV_D3, | ||
230 | GPIO_FN_SIUAOSLD, GPIO_FN_BBIF2_TXD1, | ||
231 | GPIO_FN_LCDD4, GPIO_FN_PORT179_KEYOUT4, GPIO_FN_DV_D4, | ||
232 | GPIO_FN_SIUAISPD, GPIO_FN_MFG1_OUT2, | ||
233 | GPIO_FN_LCDD5, GPIO_FN_PORT180_KEYOUT5, GPIO_FN_DV_D5, | ||
234 | GPIO_FN_SIUAILR, GPIO_FN_MFG2_OUT2, | ||
235 | GPIO_FN_LCDD6, GPIO_FN_DV_D6, | ||
236 | GPIO_FN_SIUAIBT, GPIO_FN_MFG3_OUT2, GPIO_FN_XWR2, | ||
237 | GPIO_FN_LCDD7, GPIO_FN_DV_D7, | ||
238 | GPIO_FN_SIUAISLD, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3, | ||
239 | GPIO_FN_LCDD8, GPIO_FN_DV_D8, GPIO_FN_D16, GPIO_FN_ED16, | ||
240 | GPIO_FN_LCDD9, GPIO_FN_DV_D9, GPIO_FN_D17, GPIO_FN_ED17, | ||
241 | GPIO_FN_LCDD10, GPIO_FN_DV_D10, GPIO_FN_D18, GPIO_FN_ED18, | ||
242 | GPIO_FN_LCDD11, GPIO_FN_DV_D11, GPIO_FN_D19, GPIO_FN_ED19, | ||
243 | GPIO_FN_LCDD12, GPIO_FN_DV_D12, GPIO_FN_D20, GPIO_FN_ED20, | ||
244 | GPIO_FN_LCDD13, GPIO_FN_DV_D13, GPIO_FN_D21, GPIO_FN_ED21, | ||
245 | GPIO_FN_LCDD14, GPIO_FN_DV_D14, GPIO_FN_D22, GPIO_FN_ED22, | ||
246 | GPIO_FN_LCDD15, GPIO_FN_DV_D15, GPIO_FN_D23, GPIO_FN_ED23, | ||
247 | GPIO_FN_LCDD16, GPIO_FN_DV_HSYNC, GPIO_FN_D24, GPIO_FN_ED24, | ||
248 | GPIO_FN_LCDD17, GPIO_FN_DV_VSYNC, GPIO_FN_D25, GPIO_FN_ED25, | ||
249 | GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_MSIOF0L_TSCK, | ||
250 | GPIO_FN_D26, GPIO_FN_ED26, | ||
251 | GPIO_FN_LCDD19, GPIO_FN_MSIOF0L_TSYNC, | ||
252 | GPIO_FN_D27, GPIO_FN_ED27, | ||
253 | GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, | ||
254 | GPIO_FN_D28, GPIO_FN_ED28, | ||
255 | GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, | ||
256 | GPIO_FN_D29, GPIO_FN_ED29, | ||
257 | GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_SS1, | ||
258 | GPIO_FN_D30, GPIO_FN_ED30, | ||
259 | GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_SS2, | ||
260 | GPIO_FN_D31, GPIO_FN_ED31, | ||
261 | GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_DV_CKO, GPIO_FN_SIUAOSPD, | ||
262 | GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_RSYNC, | ||
263 | |||
264 | |||
265 | /* 49-5 (FN) */ | ||
266 | GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3, | ||
267 | GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_RSCK, | ||
268 | GPIO_FN_LCDCSYN, GPIO_FN_LCDCSYN2, GPIO_FN_DV_CKI, | ||
269 | GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_MSIOF0L_RXD, | ||
270 | GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_MSIOF0L_TXD, | ||
271 | GPIO_FN_VIO_DR0, GPIO_FN_VIO_DR1, GPIO_FN_VIO_DR2, GPIO_FN_VIO_DR3, | ||
272 | GPIO_FN_VIO_DR4, GPIO_FN_VIO_DR5, GPIO_FN_VIO_DR6, GPIO_FN_VIO_DR7, | ||
273 | GPIO_FN_VIO_VDR, GPIO_FN_VIO_HDR, | ||
274 | GPIO_FN_VIO_CLKR, GPIO_FN_VIO_CKOR, | ||
275 | GPIO_FN_SCIFA1_TXD, GPIO_FN_GPS_PGFA0, | ||
276 | GPIO_FN_SCIFA1_SCK, GPIO_FN_GPS_PGFA1, | ||
277 | GPIO_FN_SCIFA1_RTS, GPIO_FN_GPS_EPPSINMON, | ||
278 | GPIO_FN_SCIFA1_RXD, GPIO_FN_SCIFA1_CTS, | ||
279 | GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA1_TXD2, GPIO_FN_GPS_TXD, | ||
280 | GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA1_CTS2, GPIO_FN_I2C_SDA2, | ||
281 | GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA1_SCK2, | ||
282 | GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA1_RXD2, GPIO_FN_GPS_RXD, | ||
283 | GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA1_RTS2, | ||
284 | GPIO_FN_MSIOF1_RSYNC, GPIO_FN_I2C_SCL2, | ||
285 | GPIO_FN_MSIOF1_MCK0, GPIO_FN_MSIOF1_MCK1, | ||
286 | GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3, | ||
287 | GPIO_FN_MSIOF1_SS2, | ||
288 | GPIO_FN_PORT236_IROUT, GPIO_FN_IRDA_OUT, | ||
289 | GPIO_FN_IRDA_IN, GPIO_FN_IRDA_FIRSEL, | ||
290 | GPIO_FN_TPU1TO0, GPIO_FN_TS_SPSYNC3, | ||
291 | GPIO_FN_TPU1TO1, GPIO_FN_TS_SDAT3, | ||
292 | GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT241_MSIOF2_SS1, | ||
293 | GPIO_FN_TPU1TO3, GPIO_FN_PORT242_MSIOF2_TSCK, | ||
294 | GPIO_FN_M13_BSW, GPIO_FN_PORT243_MSIOF2_TSYNC, | ||
295 | GPIO_FN_M14_GSW, GPIO_FN_PORT244_MSIOF2_TXD, | ||
296 | GPIO_FN_PORT245_IROUT, GPIO_FN_M15_RSW, | ||
297 | GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1, | ||
298 | GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1, | ||
299 | GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT248_MSIOF2_SS2, | ||
300 | GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT249_MSIOF2_RXD, | ||
301 | GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3, | ||
302 | GPIO_FN_SDHICLK0, GPIO_FN_TCK2, | ||
303 | GPIO_FN_SDHICD0, | ||
304 | GPIO_FN_SDHID0_0, GPIO_FN_TMS2, | ||
305 | GPIO_FN_SDHID0_1, GPIO_FN_TDO2, | ||
306 | GPIO_FN_SDHID0_2, GPIO_FN_TDI2, | ||
307 | GPIO_FN_SDHID0_3, GPIO_FN_RTCK2, | ||
308 | |||
309 | /* 49-6 (FN) */ | ||
310 | GPIO_FN_SDHICMD0, GPIO_FN_TRST2, | ||
311 | GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2, | ||
312 | GPIO_FN_SDHICLK1, GPIO_FN_TCK3, | ||
313 | GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2, | ||
314 | GPIO_FN_TS_SPSYNC2, GPIO_FN_TMS3, | ||
315 | GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_AO2, | ||
316 | GPIO_FN_TS_SDAT2, GPIO_FN_TDO3, | ||
317 | GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2, | ||
318 | GPIO_FN_TS_SDEN2, GPIO_FN_TDI3, | ||
319 | GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2, | ||
320 | GPIO_FN_TS_SCK2, GPIO_FN_RTCK3, | ||
321 | GPIO_FN_SDHICMD1, GPIO_FN_TRST3, | ||
322 | GPIO_FN_SDHICLK2, GPIO_FN_SCIFB_SCK, | ||
323 | GPIO_FN_SDHID2_0, GPIO_FN_SCIFB_TXD, | ||
324 | GPIO_FN_SDHID2_1, GPIO_FN_SCIFB_CTS, | ||
325 | GPIO_FN_SDHID2_2, GPIO_FN_SCIFB_RXD, | ||
326 | GPIO_FN_SDHID2_3, GPIO_FN_SCIFB_RTS, | ||
327 | GPIO_FN_SDHICMD2, | ||
328 | GPIO_FN_RESETOUTS, | ||
329 | GPIO_FN_DIVLOCK, | ||
330 | }; | ||
331 | |||
332 | #endif /* __ASM_SH7367_H__ */ | ||
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h index eb98b45c5089..26cd1016fad8 100644 --- a/arch/arm/mach-shmobile/include/mach/sh7372.h +++ b/arch/arm/mach-shmobile/include/mach/sh7372.h | |||
@@ -452,6 +452,10 @@ enum { | |||
452 | SHDMA_SLAVE_SCIF5_RX, | 452 | SHDMA_SLAVE_SCIF5_RX, |
453 | SHDMA_SLAVE_SCIF6_TX, | 453 | SHDMA_SLAVE_SCIF6_TX, |
454 | SHDMA_SLAVE_SCIF6_RX, | 454 | SHDMA_SLAVE_SCIF6_RX, |
455 | SHDMA_SLAVE_FLCTL0_TX, | ||
456 | SHDMA_SLAVE_FLCTL0_RX, | ||
457 | SHDMA_SLAVE_FLCTL1_TX, | ||
458 | SHDMA_SLAVE_FLCTL1_RX, | ||
455 | SHDMA_SLAVE_SDHI0_RX, | 459 | SHDMA_SLAVE_SDHI0_RX, |
456 | SHDMA_SLAVE_SDHI0_TX, | 460 | SHDMA_SLAVE_SDHI0_TX, |
457 | SHDMA_SLAVE_SDHI1_RX, | 461 | SHDMA_SLAVE_SDHI1_RX, |
@@ -475,8 +479,6 @@ extern struct clk sh7372_dv_clki_div2_clk; | |||
475 | extern struct clk sh7372_pllc2_clk; | 479 | extern struct clk sh7372_pllc2_clk; |
476 | extern struct clk sh7372_fsiack_clk; | 480 | extern struct clk sh7372_fsiack_clk; |
477 | extern struct clk sh7372_fsibck_clk; | 481 | extern struct clk sh7372_fsibck_clk; |
478 | extern struct clk sh7372_fsidiva_clk; | ||
479 | extern struct clk sh7372_fsidivb_clk; | ||
480 | 482 | ||
481 | extern void sh7372_intcs_suspend(void); | 483 | extern void sh7372_intcs_suspend(void); |
482 | extern void sh7372_intcs_resume(void); | 484 | extern void sh7372_intcs_resume(void); |
diff --git a/arch/arm/mach-shmobile/include/mach/sh7377.h b/arch/arm/mach-shmobile/include/mach/sh7377.h deleted file mode 100644 index f580e227dd1c..000000000000 --- a/arch/arm/mach-shmobile/include/mach/sh7377.h +++ /dev/null | |||
@@ -1,360 +0,0 @@ | |||
1 | #ifndef __ASM_SH7377_H__ | ||
2 | #define __ASM_SH7377_H__ | ||
3 | |||
4 | /* Pin Function Controller: | ||
5 | * GPIO_FN_xx - GPIO used to select pin function | ||
6 | * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU | ||
7 | */ | ||
8 | enum { | ||
9 | /* 55-1 -> 55-5 (GPIO) */ | ||
10 | GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4, | ||
11 | GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9, | ||
12 | |||
13 | GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14, | ||
14 | GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19, | ||
15 | |||
16 | GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24, | ||
17 | GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29, | ||
18 | |||
19 | GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34, | ||
20 | GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39, | ||
21 | |||
22 | GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44, | ||
23 | GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49, | ||
24 | |||
25 | GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54, | ||
26 | GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59, | ||
27 | |||
28 | GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64, | ||
29 | GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69, | ||
30 | |||
31 | GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74, | ||
32 | GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79, | ||
33 | |||
34 | GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84, | ||
35 | GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89, | ||
36 | |||
37 | GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94, | ||
38 | GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99, | ||
39 | |||
40 | GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104, | ||
41 | GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109, | ||
42 | |||
43 | GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114, | ||
44 | GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, | ||
45 | |||
46 | GPIO_PORT128, GPIO_PORT129, | ||
47 | |||
48 | GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134, | ||
49 | GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139, | ||
50 | |||
51 | GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144, | ||
52 | GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149, | ||
53 | |||
54 | GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154, | ||
55 | GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159, | ||
56 | |||
57 | GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164, | ||
58 | |||
59 | GPIO_PORT192, GPIO_PORT193, GPIO_PORT194, | ||
60 | GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199, | ||
61 | |||
62 | GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204, | ||
63 | GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209, | ||
64 | |||
65 | GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214, | ||
66 | GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219, | ||
67 | |||
68 | GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224, | ||
69 | GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229, | ||
70 | |||
71 | GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234, | ||
72 | GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239, | ||
73 | |||
74 | GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244, | ||
75 | GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249, | ||
76 | |||
77 | GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254, | ||
78 | GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259, | ||
79 | |||
80 | GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264, | ||
81 | |||
82 | /* Special Pull-up / Pull-down Functions */ | ||
83 | GPIO_FN_PORT66_KEYIN0_PU, GPIO_FN_PORT67_KEYIN1_PU, | ||
84 | GPIO_FN_PORT68_KEYIN2_PU, GPIO_FN_PORT69_KEYIN3_PU, | ||
85 | GPIO_FN_PORT70_KEYIN4_PU, GPIO_FN_PORT71_KEYIN5_PU, | ||
86 | GPIO_FN_PORT72_KEYIN6_PU, | ||
87 | |||
88 | /* 55-1 (FN) */ | ||
89 | GPIO_FN_VBUS_0, | ||
90 | GPIO_FN_CPORT0, | ||
91 | GPIO_FN_CPORT1, | ||
92 | GPIO_FN_CPORT2, | ||
93 | GPIO_FN_CPORT3, | ||
94 | GPIO_FN_CPORT4, | ||
95 | GPIO_FN_CPORT5, | ||
96 | GPIO_FN_CPORT6, | ||
97 | GPIO_FN_CPORT7, | ||
98 | GPIO_FN_CPORT8, | ||
99 | GPIO_FN_CPORT9, | ||
100 | GPIO_FN_CPORT10, | ||
101 | GPIO_FN_CPORT11, GPIO_FN_SIN2, | ||
102 | GPIO_FN_CPORT12, GPIO_FN_XCTS2, | ||
103 | GPIO_FN_CPORT13, GPIO_FN_RFSPO4, | ||
104 | GPIO_FN_CPORT14, GPIO_FN_RFSPO5, | ||
105 | GPIO_FN_CPORT15, GPIO_FN_SCIFA0_SCK, GPIO_FN_GPS_AGC2, | ||
106 | GPIO_FN_CPORT16, GPIO_FN_SCIFA0_TXD, GPIO_FN_GPS_AGC3, | ||
107 | GPIO_FN_CPORT17_IC_OE, GPIO_FN_SOUT2, | ||
108 | GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_PORT19_VIO_CKO2, | ||
109 | GPIO_FN_CPORT19_MPORT1, | ||
110 | GPIO_FN_CPORT20, GPIO_FN_RFSPO6, | ||
111 | GPIO_FN_CPORT21, GPIO_FN_STATUS0, | ||
112 | GPIO_FN_CPORT22, GPIO_FN_STATUS1, | ||
113 | GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7, | ||
114 | GPIO_FN_B_SYNLD1, | ||
115 | GPIO_FN_B_SYNLD2, GPIO_FN_SYSENMSK, | ||
116 | GPIO_FN_XMAINPS, | ||
117 | GPIO_FN_XDIVPS, | ||
118 | GPIO_FN_XIDRST, | ||
119 | GPIO_FN_IDCLK, GPIO_FN_IC_DP, | ||
120 | GPIO_FN_IDIO, GPIO_FN_IC_DM, | ||
121 | GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD, GPIO_FN_M02_BERDAT, | ||
122 | GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP, | ||
123 | GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK, | ||
124 | GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS, | ||
125 | GPIO_FN_PCMCLKO, | ||
126 | GPIO_FN_SYNC8KO, | ||
127 | |||
128 | /* 55-2 (FN) */ | ||
129 | GPIO_FN_DNPCM_A, | ||
130 | GPIO_FN_UPPCM_A, | ||
131 | GPIO_FN_VACK, | ||
132 | GPIO_FN_XTALB1L, | ||
133 | GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS, | ||
134 | GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD, | ||
135 | GPIO_FN_GPS_PWRDOWN, GPIO_FN_SCIFA0_CTS, | ||
136 | GPIO_FN_GPS_IM, | ||
137 | GPIO_FN_GPS_IS, | ||
138 | GPIO_FN_GPS_QM, | ||
139 | GPIO_FN_GPS_QS, | ||
140 | GPIO_FN_FMSOCK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT, | ||
141 | GPIO_FN_FMSOOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_IPORT3, | ||
142 | GPIO_FN_FMSIOLR, | ||
143 | GPIO_FN_FMSOOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_OPORT1, | ||
144 | GPIO_FN_FMSIOBT, | ||
145 | GPIO_FN_FMSOSLD, GPIO_FN_BBIF2_TXD2, GPIO_FN_OPORT2, | ||
146 | GPIO_FN_FMSOILR, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3, | ||
147 | GPIO_FN_OPORT3, GPIO_FN_FMSIILR, | ||
148 | GPIO_FN_FMSOIBT, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2, | ||
149 | GPIO_FN_FMSIIBT, | ||
150 | GPIO_FN_FMSISLD, GPIO_FN_MFG0_OUT1, GPIO_FN_TPU0TO0, | ||
151 | GPIO_FN_A0_EA0, GPIO_FN_BS, | ||
152 | GPIO_FN_A12_EA12, GPIO_FN_PORT58_VIO_CKOR, GPIO_FN_TPU4TO2, | ||
153 | GPIO_FN_A13_EA13, GPIO_FN_PORT59_IROUT, GPIO_FN_MFG0_OUT2, | ||
154 | GPIO_FN_TPU0TO1, | ||
155 | GPIO_FN_A14_EA14, GPIO_FN_PORT60_KEYOUT5, | ||
156 | GPIO_FN_A15_EA15, GPIO_FN_PORT61_KEYOUT4, | ||
157 | GPIO_FN_A16_EA16, GPIO_FN_PORT62_KEYOUT3, GPIO_FN_MSIOF0_SS1, | ||
158 | GPIO_FN_A17_EA17, GPIO_FN_PORT63_KEYOUT2, GPIO_FN_MSIOF0_TSYNC, | ||
159 | GPIO_FN_A18_EA18, GPIO_FN_PORT64_KEYOUT1, GPIO_FN_MSIOF0_TSCK, | ||
160 | GPIO_FN_A19_EA19, GPIO_FN_PORT65_KEYOUT0, GPIO_FN_MSIOF0_TXD, | ||
161 | GPIO_FN_A20_EA20, GPIO_FN_PORT66_KEYIN0, GPIO_FN_MSIOF0_RSCK, | ||
162 | GPIO_FN_A21_EA21, GPIO_FN_PORT67_KEYIN1, GPIO_FN_MSIOF0_RSYNC, | ||
163 | GPIO_FN_A22_EA22, GPIO_FN_PORT68_KEYIN2, GPIO_FN_MSIOF0_MCK0, | ||
164 | GPIO_FN_A23_EA23, GPIO_FN_PORT69_KEYIN3, GPIO_FN_MSIOF0_MCK1, | ||
165 | GPIO_FN_A24_EA24, GPIO_FN_PORT70_KEYIN4, GPIO_FN_MSIOF0_RXD, | ||
166 | GPIO_FN_A25_EA25, GPIO_FN_PORT71_KEYIN5, GPIO_FN_MSIOF0_SS2, | ||
167 | GPIO_FN_A26, GPIO_FN_PORT72_KEYIN6, | ||
168 | GPIO_FN_D0_ED0_NAF0, | ||
169 | GPIO_FN_D1_ED1_NAF1, | ||
170 | GPIO_FN_D2_ED2_NAF2, | ||
171 | GPIO_FN_D3_ED3_NAF3, | ||
172 | GPIO_FN_D4_ED4_NAF4, | ||
173 | GPIO_FN_D5_ED5_NAF5, | ||
174 | GPIO_FN_D6_ED6_NAF6, | ||
175 | GPIO_FN_D7_ED7_NAF7, | ||
176 | GPIO_FN_D8_ED8_NAF8, | ||
177 | GPIO_FN_D9_ED9_NAF9, | ||
178 | GPIO_FN_D10_ED10_NAF10, | ||
179 | GPIO_FN_D11_ED11_NAF11, | ||
180 | GPIO_FN_D12_ED12_NAF12, | ||
181 | GPIO_FN_D13_ED13_NAF13, | ||
182 | GPIO_FN_D14_ED14_NAF14, | ||
183 | GPIO_FN_D15_ED15_NAF15, | ||
184 | GPIO_FN_CS4, | ||
185 | GPIO_FN_CS5A, GPIO_FN_FMSICK, | ||
186 | GPIO_FN_CS5B, GPIO_FN_FCE1, | ||
187 | |||
188 | /* 55-3 (FN) */ | ||
189 | GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_CS6A, GPIO_FN_DACK0, | ||
190 | GPIO_FN_FCE0, | ||
191 | GPIO_FN_WAIT, GPIO_FN_DREQ0, | ||
192 | GPIO_FN_RD_XRD, | ||
193 | GPIO_FN_WE0_XWR0_FWE, | ||
194 | GPIO_FN_WE1_XWR1, | ||
195 | GPIO_FN_FRB, | ||
196 | GPIO_FN_CKO, | ||
197 | GPIO_FN_NBRSTOUT, | ||
198 | GPIO_FN_NBRST, | ||
199 | GPIO_FN_GPS_EPPSIN, | ||
200 | GPIO_FN_LATCHPULSE, | ||
201 | GPIO_FN_LTESIGNAL, | ||
202 | GPIO_FN_LEGACYSTATE, | ||
203 | GPIO_FN_TCKON, | ||
204 | GPIO_FN_VIO_VD, GPIO_FN_PORT128_KEYOUT0, GPIO_FN_IPORT0, | ||
205 | GPIO_FN_VIO_HD, GPIO_FN_PORT129_KEYOUT1, GPIO_FN_IPORT1, | ||
206 | GPIO_FN_VIO_D0, GPIO_FN_PORT130_KEYOUT2, GPIO_FN_PORT130_MSIOF2_RXD, | ||
207 | GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT3, GPIO_FN_PORT131_MSIOF2_SS1, | ||
208 | GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT4, GPIO_FN_PORT132_MSIOF2_SS2, | ||
209 | GPIO_FN_VIO_D3, GPIO_FN_PORT133_KEYOUT5, GPIO_FN_PORT133_MSIOF2_TSYNC, | ||
210 | GPIO_FN_VIO_D4, GPIO_FN_PORT134_KEYIN0, GPIO_FN_PORT134_MSIOF2_TXD, | ||
211 | GPIO_FN_VIO_D5, GPIO_FN_PORT135_KEYIN1, GPIO_FN_PORT135_MSIOF2_TSCK, | ||
212 | GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYIN2, | ||
213 | GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYIN3, | ||
214 | GPIO_FN_VIO_D8, GPIO_FN_M9_SLCD_A01, GPIO_FN_PORT138_FSIAOMC, | ||
215 | GPIO_FN_VIO_D9, GPIO_FN_M10_SLCD_CK1, GPIO_FN_PORT139_FSIAOLR, | ||
216 | GPIO_FN_VIO_D10, GPIO_FN_M11_SLCD_SO1, GPIO_FN_TPU0TO2, | ||
217 | GPIO_FN_PORT140_FSIAOBT, | ||
218 | GPIO_FN_VIO_D11, GPIO_FN_M12_SLCD_CE1, GPIO_FN_TPU0TO3, | ||
219 | GPIO_FN_PORT141_FSIAOSLD, | ||
220 | GPIO_FN_VIO_D12, GPIO_FN_M13_BSW, GPIO_FN_PORT142_FSIACK, | ||
221 | GPIO_FN_VIO_D13, GPIO_FN_M14_GSW, GPIO_FN_PORT143_FSIAILR, | ||
222 | GPIO_FN_VIO_D14, GPIO_FN_M15_RSW, GPIO_FN_PORT144_FSIAIBT, | ||
223 | GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_FSIAISLD, | ||
224 | GPIO_FN_VIO_CLK, GPIO_FN_PORT146_KEYIN4, GPIO_FN_IPORT2, | ||
225 | GPIO_FN_VIO_FIELD, GPIO_FN_PORT147_KEYIN5, | ||
226 | GPIO_FN_VIO_CKO, GPIO_FN_PORT148_KEYIN6, | ||
227 | GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_MFG0_IN1, | ||
228 | GPIO_FN_MFG0_IN2, | ||
229 | GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK, | ||
230 | GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC, | ||
231 | GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1, | ||
232 | GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0, | ||
233 | GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1, | ||
234 | GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT156_MSIOF2_SS2, | ||
235 | GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT157_MSIOF2_RXD, | ||
236 | |||
237 | /* 55-4 (FN) */ | ||
238 | GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3, | ||
239 | GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI, | ||
240 | GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD, GPIO_FN_SOUT0, | ||
241 | GPIO_FN_PORT161_SCIFB_CTS, GPIO_FN_PORT161_SCIFA5_CTS, GPIO_FN_XCTS0, | ||
242 | GPIO_FN_MFG3_IN2, | ||
243 | GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD, GPIO_FN_SIN0, | ||
244 | GPIO_FN_MFG3_IN1, | ||
245 | GPIO_FN_PORT163_SCIFB_RTS, GPIO_FN_PORT163_SCIFA5_RTS, GPIO_FN_XRTS0, | ||
246 | GPIO_FN_MFG3_OUT1, | ||
247 | GPIO_FN_TPU3TO0, | ||
248 | GPIO_FN_LCDD0, GPIO_FN_PORT192_KEYOUT0, GPIO_FN_EXT_CKI, | ||
249 | GPIO_FN_LCDD1, GPIO_FN_PORT193_KEYOUT1, GPIO_FN_PORT193_SCIFA5_CTS, | ||
250 | GPIO_FN_BBIF2_TSYNC1, | ||
251 | GPIO_FN_LCDD2, GPIO_FN_PORT194_KEYOUT2, GPIO_FN_PORT194_SCIFA5_RTS, | ||
252 | GPIO_FN_BBIF2_TSCK1, | ||
253 | GPIO_FN_LCDD3, GPIO_FN_PORT195_KEYOUT3, GPIO_FN_PORT195_SCIFA5_RXD, | ||
254 | GPIO_FN_BBIF2_TXD1, | ||
255 | GPIO_FN_LCDD4, GPIO_FN_PORT196_KEYOUT4, GPIO_FN_PORT196_SCIFA5_TXD, | ||
256 | GPIO_FN_LCDD5, GPIO_FN_PORT197_KEYOUT5, GPIO_FN_PORT197_SCIFA5_SCK, | ||
257 | GPIO_FN_MFG2_OUT2, GPIO_FN_TPU2TO1, | ||
258 | GPIO_FN_LCDD6, GPIO_FN_XWR2, | ||
259 | GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3, | ||
260 | GPIO_FN_LCDD8, GPIO_FN_PORT200_KEYIN0, GPIO_FN_VIO_DR0, GPIO_FN_D16, | ||
261 | GPIO_FN_ED16, | ||
262 | GPIO_FN_LCDD9, GPIO_FN_PORT201_KEYIN1, GPIO_FN_VIO_DR1, GPIO_FN_D17, | ||
263 | GPIO_FN_ED17, | ||
264 | GPIO_FN_LCDD10, GPIO_FN_PORT202_KEYIN2, GPIO_FN_VIO_DR2, GPIO_FN_D18, | ||
265 | GPIO_FN_ED18, | ||
266 | GPIO_FN_LCDD11, GPIO_FN_PORT203_KEYIN3, GPIO_FN_VIO_DR3, GPIO_FN_D19, | ||
267 | GPIO_FN_ED19, | ||
268 | GPIO_FN_LCDD12, GPIO_FN_PORT204_KEYIN4, GPIO_FN_VIO_DR4, GPIO_FN_D20, | ||
269 | GPIO_FN_ED20, | ||
270 | GPIO_FN_LCDD13, GPIO_FN_PORT205_KEYIN5, GPIO_FN_VIO_DR5, GPIO_FN_D21, | ||
271 | GPIO_FN_ED21, | ||
272 | GPIO_FN_LCDD14, GPIO_FN_PORT206_KEYIN6, GPIO_FN_VIO_DR6, GPIO_FN_D22, | ||
273 | GPIO_FN_ED22, | ||
274 | GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_PORT207_KEYOUT0, | ||
275 | GPIO_FN_VIO_DR7, | ||
276 | GPIO_FN_D23, GPIO_FN_ED23, | ||
277 | GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_PORT208_KEYOUT1, | ||
278 | GPIO_FN_VIO_VDR, | ||
279 | GPIO_FN_D24, GPIO_FN_ED24, | ||
280 | GPIO_FN_LCDD17, GPIO_FN_PORT209_KEYOUT2, GPIO_FN_VIO_HDR, GPIO_FN_D25, | ||
281 | GPIO_FN_ED25, | ||
282 | GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26, | ||
283 | GPIO_FN_ED26, | ||
284 | GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27, GPIO_FN_ED27, | ||
285 | GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28, | ||
286 | GPIO_FN_ED28, | ||
287 | GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29, | ||
288 | GPIO_FN_ED29, | ||
289 | GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30, | ||
290 | GPIO_FN_ED30, | ||
291 | GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31, | ||
292 | GPIO_FN_ED31, | ||
293 | GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_PORT216_KEYOUT3, | ||
294 | GPIO_FN_VIO_CLKR, | ||
295 | GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_TSYNC, | ||
296 | GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3, | ||
297 | GPIO_FN_PORT218_VIO_CKOR, GPIO_FN_PORT218_KEYOUT4, | ||
298 | GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, | ||
299 | GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2, GPIO_FN_PORT220_KEYOUT5, | ||
300 | GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, | ||
301 | GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN, | ||
302 | GPIO_FN_MSIOF0L_TXD, | ||
303 | GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2, | ||
304 | GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_USBTERM, | ||
305 | GPIO_FN_PORT226_VIO_CKO2, | ||
306 | GPIO_FN_SCIFA1_RTS, GPIO_FN_IDIN, | ||
307 | GPIO_FN_SCIFA1_RXD, | ||
308 | GPIO_FN_SCIFA1_CTS, GPIO_FN_MFG1_IN1, | ||
309 | GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2, GPIO_FN_PORT230_FSIAOMC, | ||
310 | GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2, GPIO_FN_PORT231_FSIAOLR, | ||
311 | GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2, GPIO_FN_PORT232_FSIAOBT, | ||
312 | GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2, GPIO_FN_GPS_VCOTRIG, | ||
313 | GPIO_FN_PORT233_FSIACK, | ||
314 | GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2, GPIO_FN_PORT234_FSIAOSLD, | ||
315 | GPIO_FN_MSIOF1_RSYNC, GPIO_FN_OPORT0, GPIO_FN_MFG1_IN2, | ||
316 | GPIO_FN_PORT235_FSIAILR, | ||
317 | GPIO_FN_MSIOF1_MCK0, GPIO_FN_I2C_SDA2, GPIO_FN_PORT236_FSIAIBT, | ||
318 | GPIO_FN_MSIOF1_MCK1, GPIO_FN_I2C_SCL2, GPIO_FN_PORT237_FSIAISLD, | ||
319 | GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3, | ||
320 | |||
321 | /* 55-5 (FN) */ | ||
322 | GPIO_FN_MSIOF1_SS2, | ||
323 | GPIO_FN_SCIFA6_TXD, | ||
324 | GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, | ||
325 | GPIO_FN_TPU4TO0, | ||
326 | GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2, | ||
327 | GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2, | ||
328 | GPIO_FN_PORT244_SCIFA5_CTS, GPIO_FN_MFG2_IN1, GPIO_FN_PORT244_SCIFB_CTS, | ||
329 | GPIO_FN_PORT244_MSIOF2_RXD, | ||
330 | GPIO_FN_PORT245_SCIFA5_RTS, GPIO_FN_MFG2_IN2, GPIO_FN_PORT245_SCIFB_RTS, | ||
331 | GPIO_FN_PORT245_MSIOF2_TXD, | ||
332 | GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1, | ||
333 | GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0, | ||
334 | GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2, | ||
335 | GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1, | ||
336 | GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1, | ||
337 | GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0, | ||
338 | GPIO_FN_PORT248_MSIOF2_TSCK, | ||
339 | GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, GPIO_FN_PORT249_MSIOF2_TSYNC, | ||
340 | GPIO_FN_SDHICLK0, GPIO_FN_TCK2_SWCLK_MC0, | ||
341 | GPIO_FN_SDHICD0, | ||
342 | GPIO_FN_SDHID0_0, GPIO_FN_TMS2_SWDIO_MC0, | ||
343 | GPIO_FN_SDHID0_1, GPIO_FN_TDO2_SWO0_MC0, | ||
344 | GPIO_FN_SDHID0_2, GPIO_FN_TDI2, | ||
345 | GPIO_FN_SDHID0_3, GPIO_FN_RTCK2_SWO1_MC0, | ||
346 | GPIO_FN_SDHICMD0, GPIO_FN_TRST2, | ||
347 | GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2, | ||
348 | GPIO_FN_SDHICLK1, GPIO_FN_TCK3_SWCLK_MC1, | ||
349 | GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2, GPIO_FN_TS_SPSYNC2, | ||
350 | GPIO_FN_TMS3_SWDIO_MC1, | ||
351 | GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_A02, GPIO_FN_TS_SDAT2, | ||
352 | GPIO_FN_TDO3_SWO0_MC1, | ||
353 | GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2, GPIO_FN_TS_SDEN2, GPIO_FN_TDI3, | ||
354 | GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2, GPIO_FN_TS_SCK2, | ||
355 | GPIO_FN_RTCK3_SWO1_MC1, | ||
356 | GPIO_FN_SDHICMD1, GPIO_FN_TRST3, | ||
357 | GPIO_FN_RESETOUTS, | ||
358 | }; | ||
359 | |||
360 | #endif /* __ASM_SH7377_H__ */ | ||
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c deleted file mode 100644 index 5bf776495b75..000000000000 --- a/arch/arm/mach-shmobile/intc-sh7367.c +++ /dev/null | |||
@@ -1,413 +0,0 @@ | |||
1 | /* | ||
2 | * sh7367 processor support - INTC hardware block | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; version 2 of the License. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | */ | ||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/irq.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <linux/sh_intc.h> | ||
25 | #include <mach/intc.h> | ||
26 | #include <mach/irqs.h> | ||
27 | #include <asm/mach-types.h> | ||
28 | #include <asm/mach/arch.h> | ||
29 | |||
30 | enum { | ||
31 | UNUSED_INTCA = 0, | ||
32 | ENABLED, | ||
33 | DISABLED, | ||
34 | |||
35 | /* interrupt sources INTCA */ | ||
36 | DIRC, | ||
37 | CRYPT1_ERR, CRYPT2_STD, | ||
38 | IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1, | ||
39 | ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMRX, | ||
40 | ETM11_ACQCMP, ETM11_FULL, | ||
41 | MFI_MFIM, MFI_MFIS, | ||
42 | BBIF1, BBIF2, | ||
43 | USBDMAC_USHDMI, | ||
44 | USBHS_USHI0, USBHS_USHI1, | ||
45 | CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3, | ||
46 | KEYSC_KEY, | ||
47 | SCIFA0, SCIFA1, SCIFA2, SCIFA3, | ||
48 | MSIOF2, MSIOF1, | ||
49 | SCIFA4, SCIFA5, SCIFB, | ||
50 | FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, | ||
51 | SDHI0, | ||
52 | SDHI1, | ||
53 | MSU_MSU, MSU_MSU2, | ||
54 | IREM, | ||
55 | SIU, | ||
56 | SPU, | ||
57 | IRDA, | ||
58 | TPU0, TPU1, TPU2, TPU3, TPU4, | ||
59 | LCRC, | ||
60 | PINT1, PINT2, | ||
61 | TTI20, | ||
62 | MISTY, | ||
63 | DDM, | ||
64 | SDHI2, | ||
65 | RWDT0, RWDT1, | ||
66 | DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3, | ||
67 | DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR, | ||
68 | DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3, | ||
69 | DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR, | ||
70 | DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3, | ||
71 | DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR, | ||
72 | |||
73 | /* interrupt groups INTCA */ | ||
74 | DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, | ||
75 | ETM11, ARM11, USBHS, FLCTL, IIC1 | ||
76 | }; | ||
77 | |||
78 | static struct intc_vect intca_vectors[] __initdata = { | ||
79 | INTC_VECT(DIRC, 0x0560), | ||
80 | INTC_VECT(CRYPT1_ERR, 0x05e0), | ||
81 | INTC_VECT(CRYPT2_STD, 0x0700), | ||
82 | INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0), | ||
83 | INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0), | ||
84 | INTC_VECT(ARM11_IRQPMU, 0x0800), INTC_VECT(ARM11_COMMTX, 0x0840), | ||
85 | INTC_VECT(ARM11_COMMRX, 0x0860), | ||
86 | INTC_VECT(ETM11_ACQCMP, 0x0880), INTC_VECT(ETM11_FULL, 0x08a0), | ||
87 | INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920), | ||
88 | INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960), | ||
89 | INTC_VECT(USBDMAC_USHDMI, 0x0a00), | ||
90 | INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40), | ||
91 | INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20), | ||
92 | INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60), | ||
93 | INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0), | ||
94 | INTC_VECT(KEYSC_KEY, 0x0be0), | ||
95 | INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20), | ||
96 | INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60), | ||
97 | INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00), | ||
98 | INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40), | ||
99 | INTC_VECT(SCIFB, 0x0d60), | ||
100 | INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0), | ||
101 | INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0), | ||
102 | INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20), | ||
103 | INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60), | ||
104 | INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0), | ||
105 | INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0), | ||
106 | INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40), | ||
107 | INTC_VECT(IREM, 0x0f60), | ||
108 | INTC_VECT(SIU, 0x0fa0), | ||
109 | INTC_VECT(SPU, 0x0fc0), | ||
110 | INTC_VECT(IRDA, 0x0480), | ||
111 | INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0), | ||
112 | INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500), | ||
113 | INTC_VECT(TPU4, 0x0520), | ||
114 | INTC_VECT(LCRC, 0x0540), | ||
115 | INTC_VECT(PINT1, 0x1000), INTC_VECT(PINT2, 0x1020), | ||
116 | INTC_VECT(TTI20, 0x1100), | ||
117 | INTC_VECT(MISTY, 0x1120), | ||
118 | INTC_VECT(DDM, 0x1140), | ||
119 | INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220), | ||
120 | INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260), | ||
121 | INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0), | ||
122 | INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020), | ||
123 | INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060), | ||
124 | INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0), | ||
125 | INTC_VECT(DMAC_2_DADERR, 0x20c0), | ||
126 | INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120), | ||
127 | INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160), | ||
128 | INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0), | ||
129 | INTC_VECT(DMAC2_2_DADERR, 0x21c0), | ||
130 | INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220), | ||
131 | INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260), | ||
132 | INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0), | ||
133 | INTC_VECT(DMAC3_2_DADERR, 0x22c0), | ||
134 | }; | ||
135 | |||
136 | static struct intc_group intca_groups[] __initdata = { | ||
137 | INTC_GROUP(DMAC_1, DMAC_1_DEI0, | ||
138 | DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3), | ||
139 | INTC_GROUP(DMAC_2, DMAC_2_DEI4, | ||
140 | DMAC_2_DEI5, DMAC_2_DADERR), | ||
141 | INTC_GROUP(DMAC2_1, DMAC2_1_DEI0, | ||
142 | DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3), | ||
143 | INTC_GROUP(DMAC2_2, DMAC2_2_DEI4, | ||
144 | DMAC2_2_DEI5, DMAC2_2_DADERR), | ||
145 | INTC_GROUP(DMAC3_1, DMAC3_1_DEI0, | ||
146 | DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3), | ||
147 | INTC_GROUP(DMAC3_2, DMAC3_2_DEI4, | ||
148 | DMAC3_2_DEI5, DMAC3_2_DADERR), | ||
149 | INTC_GROUP(ETM11, ETM11_ACQCMP, ETM11_FULL), | ||
150 | INTC_GROUP(ARM11, ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMTX), | ||
151 | INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1), | ||
152 | INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, | ||
153 | FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), | ||
154 | INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), | ||
155 | }; | ||
156 | |||
157 | static struct intc_mask_reg intca_mask_registers[] __initdata = { | ||
158 | { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ | ||
159 | { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, | ||
160 | ARM11_IRQPMU, 0, ARM11_COMMTX, ARM11_COMMRX } }, | ||
161 | { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */ | ||
162 | { CRYPT1_ERR, CRYPT2_STD, DIRC, 0, | ||
163 | DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } }, | ||
164 | { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */ | ||
165 | { PINT1, PINT2, 0, 0, | ||
166 | BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } }, | ||
167 | { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */ | ||
168 | { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0, | ||
169 | DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } }, | ||
170 | { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */ | ||
171 | { DDM, 0, 0, 0, | ||
172 | 0, 0, ETM11_FULL, ETM11_ACQCMP } }, | ||
173 | { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */ | ||
174 | { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4, | ||
175 | SCIFA3, SCIFA2, SCIFA1, SCIFA0 } }, | ||
176 | { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */ | ||
177 | { SCIFB, SCIFA5, SCIFA4, MSIOF1, | ||
178 | 0, 0, MSIOF2, 0 } }, | ||
179 | { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ | ||
180 | { DISABLED, ENABLED, ENABLED, ENABLED, | ||
181 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, | ||
182 | { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ | ||
183 | { DISABLED, ENABLED, ENABLED, ENABLED, | ||
184 | TTI20, USBDMAC_USHDMI, SPU, SIU } }, | ||
185 | { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ | ||
186 | { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, | ||
187 | CMT2, USBHS_USHI1, USBHS_USHI0, 0 } }, | ||
188 | { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */ | ||
189 | { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4, | ||
190 | 0, 0, 0, 0 } }, | ||
191 | { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */ | ||
192 | { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1, | ||
193 | LCRC, MSU_MSU2, IREM, MSU_MSU } }, | ||
194 | { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */ | ||
195 | { 0, 0, TPU0, TPU1, | ||
196 | TPU2, TPU3, TPU4, 0 } }, | ||
197 | { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */ | ||
198 | { DISABLED, ENABLED, ENABLED, ENABLED, | ||
199 | MISTY, CMT3, RWDT1, RWDT0 } }, | ||
200 | }; | ||
201 | |||
202 | static struct intc_prio_reg intca_prio_registers[] __initdata = { | ||
203 | { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } }, | ||
204 | { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, ETM11, BBIF1, BBIF2 } }, | ||
205 | { 0xe6940008, 0, 16, 4, /* IPRCA */ { CRYPT1_ERR, CRYPT2_STD, | ||
206 | CMT1_CMT11, ARM11 } }, | ||
207 | { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINT1, PINT2, | ||
208 | CMT1_CMT12, TPU4 } }, | ||
209 | { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS, | ||
210 | MFI_MFIM, USBHS } }, | ||
211 | { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2, | ||
212 | 0, CMT1_CMT10 } }, | ||
213 | { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1, | ||
214 | SCIFA2, SCIFA3 } }, | ||
215 | { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI, | ||
216 | FLCTL, SDHI0 } }, | ||
217 | { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } }, | ||
218 | { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, SIU, TTI20 } }, | ||
219 | { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IREM, SDHI1 } }, | ||
220 | { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } }, | ||
221 | { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } }, | ||
222 | { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, SPU, DDM } }, | ||
223 | { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } }, | ||
224 | }; | ||
225 | |||
226 | static struct intc_desc intca_desc __initdata = { | ||
227 | .name = "sh7367-intca", | ||
228 | .force_enable = ENABLED, | ||
229 | .force_disable = DISABLED, | ||
230 | .hw = INTC_HW_DESC(intca_vectors, intca_groups, | ||
231 | intca_mask_registers, intca_prio_registers, | ||
232 | NULL, NULL), | ||
233 | }; | ||
234 | |||
235 | INTC_IRQ_PINS_16(intca_irq_pins, 0xe6900000, | ||
236 | INTC_VECT, "sh7367-intca-irq-pins"); | ||
237 | |||
238 | enum { | ||
239 | UNUSED_INTCS = 0, | ||
240 | |||
241 | INTCS, | ||
242 | |||
243 | /* interrupt sources INTCS */ | ||
244 | VIO2_VEU0, VIO2_VEU1, VIO2_VEU2, VIO2_VEU3, | ||
245 | VIO3_VOU, | ||
246 | RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3, | ||
247 | VIO1_CEU, VIO1_BEU0, VIO1_BEU1, VIO1_BEU2, | ||
248 | VPU, | ||
249 | SGX530, | ||
250 | _2DDMAC_2DDM0, _2DDMAC_2DDM1, _2DDMAC_2DDM2, _2DDMAC_2DDM3, | ||
251 | IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2, | ||
252 | IPMMU_IPMMUB, IPMMU_IPMMUS, | ||
253 | RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR, | ||
254 | MSIOF, | ||
255 | IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0, | ||
256 | TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, | ||
257 | CMT, | ||
258 | TSIF, | ||
259 | IPMMUI, | ||
260 | MVI3, | ||
261 | ICB, | ||
262 | PEP, | ||
263 | ASA, | ||
264 | BEM, | ||
265 | VE2HO, | ||
266 | HQE, | ||
267 | JPEG, | ||
268 | LCDC, | ||
269 | |||
270 | /* interrupt groups INTCS */ | ||
271 | _2DDMAC, RTDMAC_1, RTDMAC_2, VEU, BEU, IIC0, IPMMU, IIC2, | ||
272 | }; | ||
273 | |||
274 | static struct intc_vect intcs_vectors[] = { | ||
275 | INTCS_VECT(VIO2_VEU0, 0x700), INTCS_VECT(VIO2_VEU1, 0x720), | ||
276 | INTCS_VECT(VIO2_VEU2, 0x740), INTCS_VECT(VIO2_VEU3, 0x760), | ||
277 | INTCS_VECT(VIO3_VOU, 0x780), | ||
278 | INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820), | ||
279 | INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860), | ||
280 | INTCS_VECT(VIO1_CEU, 0x880), INTCS_VECT(VIO1_BEU0, 0x8a0), | ||
281 | INTCS_VECT(VIO1_BEU1, 0x8c0), INTCS_VECT(VIO1_BEU2, 0x8e0), | ||
282 | INTCS_VECT(VPU, 0x980), | ||
283 | INTCS_VECT(SGX530, 0x9e0), | ||
284 | INTCS_VECT(_2DDMAC_2DDM0, 0xa00), INTCS_VECT(_2DDMAC_2DDM1, 0xa20), | ||
285 | INTCS_VECT(_2DDMAC_2DDM2, 0xa40), INTCS_VECT(_2DDMAC_2DDM3, 0xa60), | ||
286 | INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0), | ||
287 | INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0), | ||
288 | INTCS_VECT(IPMMU_IPMMUB, 0xb20), INTCS_VECT(IPMMU_IPMMUS, 0xb60), | ||
289 | INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0), | ||
290 | INTCS_VECT(RTDMAC_2_DADERR, 0xbc0), | ||
291 | INTCS_VECT(MSIOF, 0xd20), | ||
292 | INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20), | ||
293 | INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60), | ||
294 | INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0), | ||
295 | INTCS_VECT(TMU_TUNI2, 0xec0), | ||
296 | INTCS_VECT(CMT, 0xf00), | ||
297 | INTCS_VECT(TSIF, 0xf20), | ||
298 | INTCS_VECT(IPMMUI, 0xf60), | ||
299 | INTCS_VECT(MVI3, 0x420), | ||
300 | INTCS_VECT(ICB, 0x480), | ||
301 | INTCS_VECT(PEP, 0x4a0), | ||
302 | INTCS_VECT(ASA, 0x4c0), | ||
303 | INTCS_VECT(BEM, 0x4e0), | ||
304 | INTCS_VECT(VE2HO, 0x520), | ||
305 | INTCS_VECT(HQE, 0x540), | ||
306 | INTCS_VECT(JPEG, 0x560), | ||
307 | INTCS_VECT(LCDC, 0x580), | ||
308 | |||
309 | INTC_VECT(INTCS, 0xf80), | ||
310 | }; | ||
311 | |||
312 | static struct intc_group intcs_groups[] __initdata = { | ||
313 | INTC_GROUP(_2DDMAC, _2DDMAC_2DDM0, _2DDMAC_2DDM1, | ||
314 | _2DDMAC_2DDM2, _2DDMAC_2DDM3), | ||
315 | INTC_GROUP(RTDMAC_1, RTDMAC_1_DEI0, RTDMAC_1_DEI1, | ||
316 | RTDMAC_1_DEI2, RTDMAC_1_DEI3), | ||
317 | INTC_GROUP(RTDMAC_2, RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR), | ||
318 | INTC_GROUP(VEU, VIO2_VEU0, VIO2_VEU1, VIO2_VEU2, VIO2_VEU3), | ||
319 | INTC_GROUP(BEU, VIO1_BEU0, VIO1_BEU1, VIO1_BEU2), | ||
320 | INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0), | ||
321 | INTC_GROUP(IPMMU, IPMMU_IPMMUS, IPMMU_IPMMUB), | ||
322 | INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2), | ||
323 | }; | ||
324 | |||
325 | static struct intc_mask_reg intcs_mask_registers[] = { | ||
326 | { 0xffd20184, 0xffd201c4, 8, /* IMR1SA / IMCR1SA */ | ||
327 | { VIO1_BEU2, VIO1_BEU1, VIO1_BEU0, VIO1_CEU, | ||
328 | VIO2_VEU3, VIO2_VEU2, VIO2_VEU1, VIO2_VEU0 } }, | ||
329 | { 0xffd20188, 0xffd201c8, 8, /* IMR2SA / IMCR2SA */ | ||
330 | { VIO3_VOU, 0, VE2HO, VPU, | ||
331 | 0, 0, 0, 0 } }, | ||
332 | { 0xffd2018c, 0xffd201cc, 8, /* IMR3SA / IMCR3SA */ | ||
333 | { _2DDMAC_2DDM3, _2DDMAC_2DDM2, _2DDMAC_2DDM1, _2DDMAC_2DDM0, | ||
334 | BEM, ASA, PEP, ICB } }, | ||
335 | { 0xffd20190, 0xffd201d0, 8, /* IMR4SA / IMCR4SA */ | ||
336 | { 0, 0, MVI3, 0, | ||
337 | JPEG, HQE, 0, LCDC } }, | ||
338 | { 0xffd20194, 0xffd201d4, 8, /* IMR5SA / IMCR5SA */ | ||
339 | { 0, RTDMAC_2_DADERR, RTDMAC_2_DEI5, RTDMAC_2_DEI4, | ||
340 | RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } }, | ||
341 | { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */ | ||
342 | { 0, 0, MSIOF, 0, | ||
343 | SGX530, 0, 0, 0 } }, | ||
344 | { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */ | ||
345 | { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0, | ||
346 | 0, 0, 0, 0 } }, | ||
347 | { 0xffd201a4, 0xffd201e4, 8, /* IMR9SA / IMCR9SA */ | ||
348 | { 0, 0, 0, CMT, | ||
349 | IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } }, | ||
350 | { 0xffd201a8, 0xffd201e8, 8, /* IMR10SA / IMCR10SA */ | ||
351 | { IPMMU_IPMMUS, 0, IPMMU_IPMMUB, 0, | ||
352 | 0, 0, 0, 0 } }, | ||
353 | { 0xffd201ac, 0xffd201ec, 8, /* IMR11SA / IMCR11SA */ | ||
354 | { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0, | ||
355 | 0, 0, IPMMUI, TSIF } }, | ||
356 | { 0xffd20104, 0, 16, /* INTAMASK */ | ||
357 | { 0, 0, 0, 0, 0, 0, 0, 0, | ||
358 | 0, 0, 0, 0, 0, 0, 0, INTCS } }, | ||
359 | }; | ||
360 | |||
361 | /* Priority is needed for INTCA to receive the INTCS interrupt */ | ||
362 | static struct intc_prio_reg intcs_prio_registers[] = { | ||
363 | { 0xffd20000, 0, 16, 4, /* IPRAS */ { 0, MVI3, _2DDMAC, ICB } }, | ||
364 | { 0xffd20004, 0, 16, 4, /* IPRBS */ { JPEG, LCDC, 0, 0 } }, | ||
365 | { 0xffd20008, 0, 16, 4, /* IPRCS */ { BBIF2, 0, 0, 0 } }, | ||
366 | { 0xffd20010, 0, 16, 4, /* IPRES */ { RTDMAC_1, VIO1_CEU, 0, VPU } }, | ||
367 | { 0xffd20014, 0, 16, 4, /* IPRFS */ { 0, RTDMAC_2, 0, CMT } }, | ||
368 | { 0xffd20018, 0, 16, 4, /* IPRGS */ { TMU_TUNI0, TMU_TUNI1, | ||
369 | TMU_TUNI2, 0 } }, | ||
370 | { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, VIO3_VOU, VEU, BEU } }, | ||
371 | { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF, IIC0 } }, | ||
372 | { 0xffd20024, 0, 16, 4, /* IPRJS */ { 0, SGX530, 0, 0 } }, | ||
373 | { 0xffd20028, 0, 16, 4, /* IPRKS */ { BEM, ASA, IPMMUI, PEP } }, | ||
374 | { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, VE2HO, HQE } }, | ||
375 | { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } }, | ||
376 | }; | ||
377 | |||
378 | static struct resource intcs_resources[] __initdata = { | ||
379 | [0] = { | ||
380 | .start = 0xffd20000, | ||
381 | .end = 0xffd2ffff, | ||
382 | .flags = IORESOURCE_MEM, | ||
383 | } | ||
384 | }; | ||
385 | |||
386 | static struct intc_desc intcs_desc __initdata = { | ||
387 | .name = "sh7367-intcs", | ||
388 | .resource = intcs_resources, | ||
389 | .num_resources = ARRAY_SIZE(intcs_resources), | ||
390 | .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers, | ||
391 | intcs_prio_registers, NULL, NULL), | ||
392 | }; | ||
393 | |||
394 | static void intcs_demux(unsigned int irq, struct irq_desc *desc) | ||
395 | { | ||
396 | void __iomem *reg = (void *)irq_get_handler_data(irq); | ||
397 | unsigned int evtcodeas = ioread32(reg); | ||
398 | |||
399 | generic_handle_irq(intcs_evt2irq(evtcodeas)); | ||
400 | } | ||
401 | |||
402 | void __init sh7367_init_irq(void) | ||
403 | { | ||
404 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); | ||
405 | |||
406 | register_intc_controller(&intca_desc); | ||
407 | register_intc_controller(&intca_irq_pins_desc); | ||
408 | register_intc_controller(&intcs_desc); | ||
409 | |||
410 | /* demux using INTEVTSA */ | ||
411 | irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa); | ||
412 | irq_set_chained_handler(evt2irq(0xf80), intcs_demux); | ||
413 | } | ||
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c deleted file mode 100644 index b84a460a3405..000000000000 --- a/arch/arm/mach-shmobile/intc-sh7377.c +++ /dev/null | |||
@@ -1,592 +0,0 @@ | |||
1 | /* | ||
2 | * sh7377 processor support - INTC hardware block | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; version 2 of the License. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | */ | ||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/irq.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <linux/sh_intc.h> | ||
25 | #include <mach/intc.h> | ||
26 | #include <mach/irqs.h> | ||
27 | #include <asm/mach-types.h> | ||
28 | #include <asm/mach/arch.h> | ||
29 | |||
30 | enum { | ||
31 | UNUSED_INTCA = 0, | ||
32 | ENABLED, | ||
33 | DISABLED, | ||
34 | |||
35 | /* interrupt sources INTCA */ | ||
36 | DIRC, | ||
37 | _2DG, | ||
38 | CRYPT_STD, | ||
39 | IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1, | ||
40 | AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX, | ||
41 | MFI_MFIM, MFI_MFIS, | ||
42 | BBIF1, BBIF2, | ||
43 | USBDMAC_USHDMI, | ||
44 | USBHS_USHI0, USBHS_USHI1, | ||
45 | _3DG_SGX540, | ||
46 | CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3, | ||
47 | KEYSC_KEY, | ||
48 | SCIFA0, SCIFA1, SCIFA2, SCIFA3, | ||
49 | MSIOF2, MSIOF1, | ||
50 | SCIFA4, SCIFA5, SCIFB, | ||
51 | FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, | ||
52 | SDHI0, | ||
53 | SDHI1, | ||
54 | MSU_MSU, MSU_MSU2, | ||
55 | IRREM, | ||
56 | MSUG, | ||
57 | IRDA, | ||
58 | TPU0, TPU1, TPU2, TPU3, TPU4, | ||
59 | LCRC, | ||
60 | PINTCA_PINT1, PINTCA_PINT2, | ||
61 | TTI20, | ||
62 | MISTY, | ||
63 | DDM, | ||
64 | RWDT0, RWDT1, | ||
65 | DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3, | ||
66 | DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR, | ||
67 | DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3, | ||
68 | DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR, | ||
69 | DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3, | ||
70 | DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR, | ||
71 | SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, | ||
72 | ICUSB_ICUSB0, ICUSB_ICUSB1, | ||
73 | ICUDMC_ICUDMC1, ICUDMC_ICUDMC2, | ||
74 | SPU2_SPU0, SPU2_SPU1, | ||
75 | FSI, | ||
76 | FMSI, | ||
77 | SCUV, | ||
78 | IPMMU_IPMMUB, | ||
79 | AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ, | ||
80 | MFIS2, | ||
81 | CPORTR2S, | ||
82 | CMT14, CMT15, | ||
83 | SCIFA6, | ||
84 | |||
85 | /* interrupt groups INTCA */ | ||
86 | DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT, | ||
87 | AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1, | ||
88 | ICUSB, ICUDMC | ||
89 | }; | ||
90 | |||
91 | static struct intc_vect intca_vectors[] __initdata = { | ||
92 | INTC_VECT(DIRC, 0x0560), | ||
93 | INTC_VECT(_2DG, 0x05e0), | ||
94 | INTC_VECT(CRYPT_STD, 0x0700), | ||
95 | INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0), | ||
96 | INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0), | ||
97 | INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840), | ||
98 | INTC_VECT(AP_ARM_COMMRX, 0x0860), | ||
99 | INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920), | ||
100 | INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960), | ||
101 | INTC_VECT(USBDMAC_USHDMI, 0x0a00), | ||
102 | INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40), | ||
103 | INTC_VECT(_3DG_SGX540, 0x0a60), | ||
104 | INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20), | ||
105 | INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60), | ||
106 | INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0), | ||
107 | INTC_VECT(KEYSC_KEY, 0x0be0), | ||
108 | INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20), | ||
109 | INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60), | ||
110 | INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00), | ||
111 | INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40), | ||
112 | INTC_VECT(SCIFB, 0x0d60), | ||
113 | INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0), | ||
114 | INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0), | ||
115 | INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20), | ||
116 | INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60), | ||
117 | INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0), | ||
118 | INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0), | ||
119 | INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40), | ||
120 | INTC_VECT(IRREM, 0x0f60), | ||
121 | INTC_VECT(MSUG, 0x0fa0), | ||
122 | INTC_VECT(IRDA, 0x0480), | ||
123 | INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0), | ||
124 | INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500), | ||
125 | INTC_VECT(TPU4, 0x0520), | ||
126 | INTC_VECT(LCRC, 0x0540), | ||
127 | INTC_VECT(PINTCA_PINT1, 0x1000), INTC_VECT(PINTCA_PINT2, 0x1020), | ||
128 | INTC_VECT(TTI20, 0x1100), | ||
129 | INTC_VECT(MISTY, 0x1120), | ||
130 | INTC_VECT(DDM, 0x1140), | ||
131 | INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0), | ||
132 | INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020), | ||
133 | INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060), | ||
134 | INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0), | ||
135 | INTC_VECT(DMAC_2_DADERR, 0x20c0), | ||
136 | INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120), | ||
137 | INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160), | ||
138 | INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0), | ||
139 | INTC_VECT(DMAC2_2_DADERR, 0x21c0), | ||
140 | INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220), | ||
141 | INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260), | ||
142 | INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0), | ||
143 | INTC_VECT(DMAC3_2_DADERR, 0x22c0), | ||
144 | INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1d20), | ||
145 | INTC_VECT(SHWYSTAT_COM, 0x1340), | ||
146 | INTC_VECT(ICUSB_ICUSB0, 0x1700), INTC_VECT(ICUSB_ICUSB1, 0x1720), | ||
147 | INTC_VECT(ICUDMC_ICUDMC1, 0x1780), INTC_VECT(ICUDMC_ICUDMC2, 0x17a0), | ||
148 | INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820), | ||
149 | INTC_VECT(FSI, 0x1840), | ||
150 | INTC_VECT(FMSI, 0x1860), | ||
151 | INTC_VECT(SCUV, 0x1880), | ||
152 | INTC_VECT(IPMMU_IPMMUB, 0x1900), | ||
153 | INTC_VECT(AP_ARM_CTIIRQ, 0x1980), | ||
154 | INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0), | ||
155 | INTC_VECT(AP_ARM_DMAIRQ, 0x19c0), | ||
156 | INTC_VECT(AP_ARM_DMASIRQ, 0x19e0), | ||
157 | INTC_VECT(MFIS2, 0x1a00), | ||
158 | INTC_VECT(CPORTR2S, 0x1a20), | ||
159 | INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60), | ||
160 | INTC_VECT(SCIFA6, 0x1a80), | ||
161 | }; | ||
162 | |||
163 | static struct intc_group intca_groups[] __initdata = { | ||
164 | INTC_GROUP(DMAC_1, DMAC_1_DEI0, | ||
165 | DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3), | ||
166 | INTC_GROUP(DMAC_2, DMAC_2_DEI4, | ||
167 | DMAC_2_DEI5, DMAC_2_DADERR), | ||
168 | INTC_GROUP(DMAC2_1, DMAC2_1_DEI0, | ||
169 | DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3), | ||
170 | INTC_GROUP(DMAC2_2, DMAC2_2_DEI4, | ||
171 | DMAC2_2_DEI5, DMAC2_2_DADERR), | ||
172 | INTC_GROUP(DMAC3_1, DMAC3_1_DEI0, | ||
173 | DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3), | ||
174 | INTC_GROUP(DMAC3_2, DMAC3_2_DEI4, | ||
175 | DMAC3_2_DEI5, DMAC3_2_DADERR), | ||
176 | INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMTX), | ||
177 | INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1), | ||
178 | INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1), | ||
179 | INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, | ||
180 | FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), | ||
181 | INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), | ||
182 | INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM), | ||
183 | INTC_GROUP(ICUSB, ICUSB_ICUSB0, ICUSB_ICUSB1), | ||
184 | INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2), | ||
185 | }; | ||
186 | |||
187 | static struct intc_mask_reg intca_mask_registers[] __initdata = { | ||
188 | { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ | ||
189 | { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, | ||
190 | AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } }, | ||
191 | { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */ | ||
192 | { _2DG, CRYPT_STD, DIRC, 0, | ||
193 | DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } }, | ||
194 | { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */ | ||
195 | { PINTCA_PINT1, PINTCA_PINT2, 0, 0, | ||
196 | BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } }, | ||
197 | { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */ | ||
198 | { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0, | ||
199 | DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } }, | ||
200 | { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */ | ||
201 | { DDM, 0, 0, 0, | ||
202 | 0, 0, 0, 0 } }, | ||
203 | { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */ | ||
204 | { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4, | ||
205 | SCIFA3, SCIFA2, SCIFA1, SCIFA0 } }, | ||
206 | { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */ | ||
207 | { SCIFB, SCIFA5, SCIFA4, MSIOF1, | ||
208 | 0, 0, MSIOF2, 0 } }, | ||
209 | { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ | ||
210 | { DISABLED, ENABLED, ENABLED, ENABLED, | ||
211 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, | ||
212 | { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ | ||
213 | { DISABLED, ENABLED, ENABLED, ENABLED, | ||
214 | TTI20, USBDMAC_USHDMI, 0, MSUG } }, | ||
215 | { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ | ||
216 | { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, | ||
217 | CMT2, USBHS_USHI1, USBHS_USHI0, _3DG_SGX540 } }, | ||
218 | { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */ | ||
219 | { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4, | ||
220 | 0, 0, 0, 0 } }, | ||
221 | { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */ | ||
222 | { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1, | ||
223 | LCRC, MSU_MSU2, IRREM, MSU_MSU } }, | ||
224 | { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */ | ||
225 | { 0, 0, TPU0, TPU1, | ||
226 | TPU2, TPU3, TPU4, 0 } }, | ||
227 | { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */ | ||
228 | { 0, 0, 0, 0, | ||
229 | MISTY, CMT3, RWDT1, RWDT0 } }, | ||
230 | { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */ | ||
231 | { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0, | ||
232 | 0, 0, 0, 0 } }, | ||
233 | { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */ | ||
234 | { ICUSB_ICUSB0, ICUSB_ICUSB1, 0, 0, | ||
235 | ICUDMC_ICUDMC1, ICUDMC_ICUDMC2, 0, 0 } }, | ||
236 | { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */ | ||
237 | { SPU2_SPU0, SPU2_SPU1, FSI, FMSI, | ||
238 | SCUV, 0, 0, 0 } }, | ||
239 | { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */ | ||
240 | { IPMMU_IPMMUB, 0, 0, 0, | ||
241 | AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, | ||
242 | AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } }, | ||
243 | { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */ | ||
244 | { MFIS2, CPORTR2S, CMT14, CMT15, | ||
245 | SCIFA6, 0, 0, 0 } }, | ||
246 | }; | ||
247 | |||
248 | static struct intc_prio_reg intca_prio_registers[] __initdata = { | ||
249 | { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } }, | ||
250 | { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } }, | ||
251 | { 0xe6940008, 0, 16, 4, /* IPRCA */ { _2DG, CRYPT_STD, | ||
252 | CMT1_CMT11, AP_ARM1 } }, | ||
253 | { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINTCA_PINT1, PINTCA_PINT2, | ||
254 | CMT1_CMT12, TPU4 } }, | ||
255 | { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS, | ||
256 | MFI_MFIM, USBHS } }, | ||
257 | { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2, | ||
258 | _3DG_SGX540, CMT1_CMT10 } }, | ||
259 | { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1, | ||
260 | SCIFA2, SCIFA3 } }, | ||
261 | { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI, | ||
262 | FLCTL, SDHI0 } }, | ||
263 | { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } }, | ||
264 | { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, MSUG, TTI20 } }, | ||
265 | { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } }, | ||
266 | { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } }, | ||
267 | { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } }, | ||
268 | { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } }, | ||
269 | { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, 0 } }, | ||
270 | { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } }, | ||
271 | { 0xe6950020, 0, 16, 4, /* IPRIA3 */ { ICUSB, 0, 0, 0 } }, | ||
272 | { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { ICUDMC, 0, 0, 0 } }, | ||
273 | { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } }, | ||
274 | { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { SCUV, 0, 0, 0 } }, | ||
275 | { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUB, 0, 0, 0 } }, | ||
276 | { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } }, | ||
277 | { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S, | ||
278 | CMT14, CMT15 } }, | ||
279 | { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { SCIFA6, 0, 0, 0 } }, | ||
280 | }; | ||
281 | |||
282 | static struct intc_desc intca_desc __initdata = { | ||
283 | .name = "sh7377-intca", | ||
284 | .force_enable = ENABLED, | ||
285 | .force_disable = DISABLED, | ||
286 | .hw = INTC_HW_DESC(intca_vectors, intca_groups, | ||
287 | intca_mask_registers, intca_prio_registers, | ||
288 | NULL, NULL), | ||
289 | }; | ||
290 | |||
291 | INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000, | ||
292 | INTC_VECT, "sh7377-intca-irq-pins"); | ||
293 | |||
294 | /* this macro ignore entry which is also in INTCA */ | ||
295 | #define __IGNORE(a...) | ||
296 | #define __IGNORE0(a...) 0 | ||
297 | |||
298 | enum { | ||
299 | UNUSED_INTCS = 0, | ||
300 | |||
301 | INTCS, | ||
302 | |||
303 | /* interrupt sources INTCS */ | ||
304 | VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3, | ||
305 | RTDMAC1_1_DEI0, RTDMAC1_1_DEI1, RTDMAC1_1_DEI2, RTDMAC1_1_DEI3, | ||
306 | CEU, | ||
307 | BEU_BEU0, BEU_BEU1, BEU_BEU2, | ||
308 | __IGNORE(MFI) | ||
309 | __IGNORE(BBIF2) | ||
310 | VPU, | ||
311 | TSIF1, | ||
312 | __IGNORE(SGX540) | ||
313 | _2DDMAC, | ||
314 | IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2, | ||
315 | IPMMU_IPMMUR, IPMMU_IPMMUR2, | ||
316 | RTDMAC1_2_DEI4, RTDMAC1_2_DEI5, RTDMAC1_2_DADERR, | ||
317 | __IGNORE(KEYSC) | ||
318 | __IGNORE(TTI20) | ||
319 | __IGNORE(MSIOF) | ||
320 | IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0, | ||
321 | TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, | ||
322 | CMT0, | ||
323 | TSIF0, | ||
324 | __IGNORE(CMT2) | ||
325 | LMB, | ||
326 | __IGNORE(MSUG) | ||
327 | __IGNORE(MSU_MSU, MSU_MSU2) | ||
328 | __IGNORE(CTI) | ||
329 | MVI3, | ||
330 | __IGNORE(RWDT0) | ||
331 | __IGNORE(RWDT1) | ||
332 | ICB, | ||
333 | PEP, | ||
334 | ASA, | ||
335 | __IGNORE(_2DG) | ||
336 | HQE, | ||
337 | JPU, | ||
338 | LCDC0, | ||
339 | __IGNORE(LCRC) | ||
340 | RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3, | ||
341 | RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR, | ||
342 | FRC, | ||
343 | LCDC1, | ||
344 | CSIRX, | ||
345 | DSITX_DSITX0, DSITX_DSITX1, | ||
346 | __IGNORE(SPU2_SPU0, SPU2_SPU1) | ||
347 | __IGNORE(FSI) | ||
348 | __IGNORE(FMSI) | ||
349 | __IGNORE(SCUV) | ||
350 | TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12, | ||
351 | TSIF2, | ||
352 | CMT4, | ||
353 | __IGNORE(MFIS2) | ||
354 | CPORTS2R, | ||
355 | |||
356 | /* interrupt groups INTCS */ | ||
357 | RTDMAC1_1, RTDMAC1_2, VEU, BEU, IIC0, __IGNORE(MSU) IPMMU, | ||
358 | IIC2, RTDMAC2_1, RTDMAC2_2, DSITX, __IGNORE(SPU2) TMU1, | ||
359 | }; | ||
360 | |||
361 | #define INTCS_INTVECT 0x0F80 | ||
362 | static struct intc_vect intcs_vectors[] __initdata = { | ||
363 | INTCS_VECT(VEU_VEU0, 0x0700), INTCS_VECT(VEU_VEU1, 0x0720), | ||
364 | INTCS_VECT(VEU_VEU2, 0x0740), INTCS_VECT(VEU_VEU3, 0x0760), | ||
365 | INTCS_VECT(RTDMAC1_1_DEI0, 0x0800), INTCS_VECT(RTDMAC1_1_DEI1, 0x0820), | ||
366 | INTCS_VECT(RTDMAC1_1_DEI2, 0x0840), INTCS_VECT(RTDMAC1_1_DEI3, 0x0860), | ||
367 | INTCS_VECT(CEU, 0x0880), | ||
368 | INTCS_VECT(BEU_BEU0, 0x08A0), | ||
369 | INTCS_VECT(BEU_BEU1, 0x08C0), | ||
370 | INTCS_VECT(BEU_BEU2, 0x08E0), | ||
371 | __IGNORE(INTCS_VECT(MFI, 0x0900)) | ||
372 | __IGNORE(INTCS_VECT(BBIF2, 0x0960)) | ||
373 | INTCS_VECT(VPU, 0x0980), | ||
374 | INTCS_VECT(TSIF1, 0x09A0), | ||
375 | __IGNORE(INTCS_VECT(SGX540, 0x09E0)) | ||
376 | INTCS_VECT(_2DDMAC, 0x0A00), | ||
377 | INTCS_VECT(IIC2_ALI2, 0x0A80), INTCS_VECT(IIC2_TACKI2, 0x0AA0), | ||
378 | INTCS_VECT(IIC2_WAITI2, 0x0AC0), INTCS_VECT(IIC2_DTEI2, 0x0AE0), | ||
379 | INTCS_VECT(IPMMU_IPMMUR, 0x0B00), INTCS_VECT(IPMMU_IPMMUR2, 0x0B20), | ||
380 | INTCS_VECT(RTDMAC1_2_DEI4, 0x0B80), | ||
381 | INTCS_VECT(RTDMAC1_2_DEI5, 0x0BA0), | ||
382 | INTCS_VECT(RTDMAC1_2_DADERR, 0x0BC0), | ||
383 | __IGNORE(INTCS_VECT(KEYSC 0x0BE0)) | ||
384 | __IGNORE(INTCS_VECT(TTI20, 0x0C80)) | ||
385 | __IGNORE(INTCS_VECT(MSIOF, 0x0D20)) | ||
386 | INTCS_VECT(IIC0_ALI0, 0x0E00), INTCS_VECT(IIC0_TACKI0, 0x0E20), | ||
387 | INTCS_VECT(IIC0_WAITI0, 0x0E40), INTCS_VECT(IIC0_DTEI0, 0x0E60), | ||
388 | INTCS_VECT(TMU_TUNI0, 0x0E80), | ||
389 | INTCS_VECT(TMU_TUNI1, 0x0EA0), | ||
390 | INTCS_VECT(TMU_TUNI2, 0x0EC0), | ||
391 | INTCS_VECT(CMT0, 0x0F00), | ||
392 | INTCS_VECT(TSIF0, 0x0F20), | ||
393 | __IGNORE(INTCS_VECT(CMT2, 0x0F40)) | ||
394 | INTCS_VECT(LMB, 0x0F60), | ||
395 | __IGNORE(INTCS_VECT(MSUG, 0x0F80)) | ||
396 | __IGNORE(INTCS_VECT(MSU_MSU, 0x0FA0)) | ||
397 | __IGNORE(INTCS_VECT(MSU_MSU2, 0x0FC0)) | ||
398 | __IGNORE(INTCS_VECT(CTI, 0x0400)) | ||
399 | INTCS_VECT(MVI3, 0x0420), | ||
400 | __IGNORE(INTCS_VECT(RWDT0, 0x0440)) | ||
401 | __IGNORE(INTCS_VECT(RWDT1, 0x0460)) | ||
402 | INTCS_VECT(ICB, 0x0480), | ||
403 | INTCS_VECT(PEP, 0x04A0), | ||
404 | INTCS_VECT(ASA, 0x04C0), | ||
405 | __IGNORE(INTCS_VECT(_2DG, 0x04E0)) | ||
406 | INTCS_VECT(HQE, 0x0540), | ||
407 | INTCS_VECT(JPU, 0x0560), | ||
408 | INTCS_VECT(LCDC0, 0x0580), | ||
409 | __IGNORE(INTCS_VECT(LCRC, 0x05A0)) | ||
410 | INTCS_VECT(RTDMAC2_1_DEI0, 0x1300), INTCS_VECT(RTDMAC2_1_DEI1, 0x1320), | ||
411 | INTCS_VECT(RTDMAC2_1_DEI2, 0x1340), INTCS_VECT(RTDMAC2_1_DEI3, 0x1360), | ||
412 | INTCS_VECT(RTDMAC2_2_DEI4, 0x1380), INTCS_VECT(RTDMAC2_2_DEI5, 0x13A0), | ||
413 | INTCS_VECT(RTDMAC2_2_DADERR, 0x13C0), | ||
414 | INTCS_VECT(FRC, 0x1700), | ||
415 | INTCS_VECT(LCDC1, 0x1780), | ||
416 | INTCS_VECT(CSIRX, 0x17A0), | ||
417 | INTCS_VECT(DSITX_DSITX0, 0x17C0), INTCS_VECT(DSITX_DSITX1, 0x17E0), | ||
418 | __IGNORE(INTCS_VECT(SPU2_SPU0, 0x1800)) | ||
419 | __IGNORE(INTCS_VECT(SPU2_SPU1, 0x1820)) | ||
420 | __IGNORE(INTCS_VECT(FSI, 0x1840)) | ||
421 | __IGNORE(INTCS_VECT(FMSI, 0x1860)) | ||
422 | __IGNORE(INTCS_VECT(SCUV, 0x1880)) | ||
423 | INTCS_VECT(TMU1_TUNI10, 0x1900), INTCS_VECT(TMU1_TUNI11, 0x1920), | ||
424 | INTCS_VECT(TMU1_TUNI12, 0x1940), | ||
425 | INTCS_VECT(TSIF2, 0x1960), | ||
426 | INTCS_VECT(CMT4, 0x1980), | ||
427 | __IGNORE(INTCS_VECT(MFIS2, 0x1A00)) | ||
428 | INTCS_VECT(CPORTS2R, 0x1A20), | ||
429 | |||
430 | INTC_VECT(INTCS, INTCS_INTVECT), | ||
431 | }; | ||
432 | |||
433 | static struct intc_group intcs_groups[] __initdata = { | ||
434 | INTC_GROUP(RTDMAC1_1, | ||
435 | RTDMAC1_1_DEI0, RTDMAC1_1_DEI1, | ||
436 | RTDMAC1_1_DEI2, RTDMAC1_1_DEI3), | ||
437 | INTC_GROUP(RTDMAC1_2, | ||
438 | RTDMAC1_2_DEI4, RTDMAC1_2_DEI5, RTDMAC1_2_DADERR), | ||
439 | INTC_GROUP(VEU, VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3), | ||
440 | INTC_GROUP(BEU, BEU_BEU0, BEU_BEU1, BEU_BEU2), | ||
441 | INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0), | ||
442 | __IGNORE(INTC_GROUP(MSU, MSU_MSU, MSU_MSU2)) | ||
443 | INTC_GROUP(IPMMU, IPMMU_IPMMUR, IPMMU_IPMMUR2), | ||
444 | INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2), | ||
445 | INTC_GROUP(RTDMAC2_1, | ||
446 | RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, | ||
447 | RTDMAC2_1_DEI2, RTDMAC2_1_DEI3), | ||
448 | INTC_GROUP(RTDMAC2_2, RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR), | ||
449 | INTC_GROUP(DSITX, DSITX_DSITX0, DSITX_DSITX1), | ||
450 | __IGNORE(INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1)) | ||
451 | INTC_GROUP(TMU1, TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12), | ||
452 | }; | ||
453 | |||
454 | static struct intc_mask_reg intcs_mask_registers[] __initdata = { | ||
455 | { 0xE6940184, 0xE69401C4, 8, /* IMR1AS / IMCR1AS */ | ||
456 | { BEU_BEU2, BEU_BEU1, BEU_BEU0, CEU, | ||
457 | VEU_VEU3, VEU_VEU2, VEU_VEU1, VEU_VEU0 } }, | ||
458 | { 0xE6940188, 0xE69401C8, 8, /* IMR2AS / IMCR2AS */ | ||
459 | { 0, 0, 0, VPU, | ||
460 | __IGNORE0(BBIF2), 0, 0, __IGNORE0(MFI) } }, | ||
461 | { 0xE694018C, 0xE69401CC, 8, /* IMR3AS / IMCR3AS */ | ||
462 | { 0, 0, 0, _2DDMAC, | ||
463 | __IGNORE0(_2DG), ASA, PEP, ICB } }, | ||
464 | { 0xE6940190, 0xE69401D0, 8, /* IMR4AS / IMCR4AS */ | ||
465 | { 0, 0, MVI3, __IGNORE0(CTI), | ||
466 | JPU, HQE, __IGNORE0(LCRC), LCDC0 } }, | ||
467 | { 0xE6940194, 0xE69401D4, 8, /* IMR5AS / IMCR5AS */ | ||
468 | { __IGNORE0(KEYSC), RTDMAC1_2_DADERR, RTDMAC1_2_DEI5, RTDMAC1_2_DEI4, | ||
469 | RTDMAC1_1_DEI3, RTDMAC1_1_DEI2, RTDMAC1_1_DEI1, RTDMAC1_1_DEI0 } }, | ||
470 | __IGNORE({ 0xE6940198, 0xE69401D8, 8, /* IMR6AS / IMCR6AS */ | ||
471 | { 0, 0, MSIOF, 0, | ||
472 | SGX540, 0, TTI20, 0 } }) | ||
473 | { 0xE694019C, 0xE69401DC, 8, /* IMR7AS / IMCR7AS */ | ||
474 | { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0, | ||
475 | 0, 0, 0, 0 } }, | ||
476 | __IGNORE({ 0xE69401A0, 0xE69401E0, 8, /* IMR8AS / IMCR8AS */ | ||
477 | { 0, 0, 0, 0, | ||
478 | 0, MSU_MSU, MSU_MSU2, MSUG } }) | ||
479 | { 0xE69401A4, 0xE69401E4, 8, /* IMR9AS / IMCR9AS */ | ||
480 | { __IGNORE0(RWDT1), __IGNORE0(RWDT0), __IGNORE0(CMT2), CMT0, | ||
481 | IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } }, | ||
482 | { 0xE69401A8, 0xE69401E8, 8, /* IMR10AS / IMCR10AS */ | ||
483 | { 0, 0, IPMMU_IPMMUR, IPMMU_IPMMUR2, | ||
484 | 0, 0, 0, 0 } }, | ||
485 | { 0xE69401AC, 0xE69401EC, 8, /* IMR11AS / IMCR11AS */ | ||
486 | { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0, | ||
487 | 0, TSIF1, LMB, TSIF0 } }, | ||
488 | { 0xE6950180, 0xE69501C0, 8, /* IMR0AS3 / IMCR0AS3 */ | ||
489 | { RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3, | ||
490 | RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR, 0 } }, | ||
491 | { 0xE6950190, 0xE69501D0, 8, /* IMR4AS3 / IMCR4AS3 */ | ||
492 | { FRC, 0, 0, 0, | ||
493 | LCDC1, CSIRX, DSITX_DSITX0, DSITX_DSITX1 } }, | ||
494 | __IGNORE({ 0xE6950194, 0xE69501D4, 8, /* IMR5AS3 / IMCR5AS3 */ | ||
495 | {SPU2_SPU0, SPU2_SPU1, FSI, FMSI, | ||
496 | SCUV, 0, 0, 0 } }) | ||
497 | { 0xE6950198, 0xE69501D8, 8, /* IMR6AS3 / IMCR6AS3 */ | ||
498 | { TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12, TSIF2, | ||
499 | CMT4, 0, 0, 0 } }, | ||
500 | { 0xE695019C, 0xE69501DC, 8, /* IMR7AS3 / IMCR7AS3 */ | ||
501 | { __IGNORE0(MFIS2), CPORTS2R, 0, 0, | ||
502 | 0, 0, 0, 0 } }, | ||
503 | { 0xFFD20104, 0, 16, /* INTAMASK */ | ||
504 | { 0, 0, 0, 0, 0, 0, 0, 0, | ||
505 | 0, 0, 0, 0, 0, 0, 0, INTCS } } | ||
506 | }; | ||
507 | |||
508 | static struct intc_prio_reg intcs_prio_registers[] __initdata = { | ||
509 | /* IPRAS */ | ||
510 | { 0xFFD20000, 0, 16, 4, { __IGNORE0(CTI), MVI3, _2DDMAC, ICB } }, | ||
511 | /* IPRBS */ | ||
512 | { 0xFFD20004, 0, 16, 4, { JPU, LCDC0, 0, __IGNORE0(LCRC) } }, | ||
513 | /* IPRCS */ | ||
514 | __IGNORE({ 0xFFD20008, 0, 16, 4, { BBIF2, 0, 0, 0 } }) | ||
515 | /* IPRES */ | ||
516 | { 0xFFD20010, 0, 16, 4, { RTDMAC1_1, CEU, __IGNORE0(MFI), VPU } }, | ||
517 | /* IPRFS */ | ||
518 | { 0xFFD20014, 0, 16, 4, | ||
519 | { __IGNORE0(KEYSC), RTDMAC1_2, __IGNORE0(CMT2), CMT0 } }, | ||
520 | /* IPRGS */ | ||
521 | { 0xFFD20018, 0, 16, 4, { TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, TSIF1 } }, | ||
522 | /* IPRHS */ | ||
523 | { 0xFFD2001C, 0, 16, 4, { __IGNORE0(TTI20), 0, VEU, BEU } }, | ||
524 | /* IPRIS */ | ||
525 | { 0xFFD20020, 0, 16, 4, { 0, __IGNORE0(MSIOF), TSIF0, IIC0 } }, | ||
526 | /* IPRJS */ | ||
527 | __IGNORE({ 0xFFD20024, 0, 16, 4, { 0, SGX540, MSUG, MSU } }) | ||
528 | /* IPRKS */ | ||
529 | { 0xFFD20028, 0, 16, 4, { __IGNORE0(_2DG), ASA, LMB, PEP } }, | ||
530 | /* IPRLS */ | ||
531 | { 0xFFD2002C, 0, 16, 4, { IPMMU, 0, 0, HQE } }, | ||
532 | /* IPRMS */ | ||
533 | { 0xFFD20030, 0, 16, 4, | ||
534 | { IIC2, 0, __IGNORE0(RWDT1), __IGNORE0(RWDT0) } }, | ||
535 | /* IPRAS3 */ | ||
536 | { 0xFFD50000, 0, 16, 4, { RTDMAC2_1, 0, 0, 0 } }, | ||
537 | /* IPRBS3 */ | ||
538 | { 0xFFD50004, 0, 16, 4, { RTDMAC2_2, 0, 0, 0 } }, | ||
539 | /* IPRIS3 */ | ||
540 | { 0xFFD50020, 0, 16, 4, { FRC, 0, 0, 0 } }, | ||
541 | /* IPRJS3 */ | ||
542 | { 0xFFD50024, 0, 16, 4, { LCDC1, CSIRX, DSITX, 0 } }, | ||
543 | /* IPRKS3 */ | ||
544 | __IGNORE({ 0xFFD50028, 0, 16, 4, { SPU2, 0, FSI, FMSI } }) | ||
545 | /* IPRLS3 */ | ||
546 | __IGNORE({ 0xFFD5002C, 0, 16, 4, { SCUV, 0, 0, 0 } }) | ||
547 | /* IPRMS3 */ | ||
548 | { 0xFFD50030, 0, 16, 4, { TMU1, 0, 0, TSIF2 } }, | ||
549 | /* IPRNS3 */ | ||
550 | { 0xFFD50034, 0, 16, 4, { CMT4, 0, 0, 0 } }, | ||
551 | /* IPROS3 */ | ||
552 | { 0xFFD50038, 0, 16, 4, { __IGNORE0(MFIS2), CPORTS2R, 0, 0 } }, | ||
553 | }; | ||
554 | |||
555 | static struct resource intcs_resources[] __initdata = { | ||
556 | [0] = { | ||
557 | .start = 0xffd20000, | ||
558 | .end = 0xffd500ff, | ||
559 | .flags = IORESOURCE_MEM, | ||
560 | } | ||
561 | }; | ||
562 | |||
563 | static struct intc_desc intcs_desc __initdata = { | ||
564 | .name = "sh7377-intcs", | ||
565 | .resource = intcs_resources, | ||
566 | .num_resources = ARRAY_SIZE(intcs_resources), | ||
567 | .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, | ||
568 | intcs_mask_registers, intcs_prio_registers, | ||
569 | NULL, NULL), | ||
570 | }; | ||
571 | |||
572 | static void intcs_demux(unsigned int irq, struct irq_desc *desc) | ||
573 | { | ||
574 | void __iomem *reg = (void *)irq_get_handler_data(irq); | ||
575 | unsigned int evtcodeas = ioread32(reg); | ||
576 | |||
577 | generic_handle_irq(intcs_evt2irq(evtcodeas)); | ||
578 | } | ||
579 | |||
580 | #define INTEVTSA 0xFFD20100 | ||
581 | void __init sh7377_init_irq(void) | ||
582 | { | ||
583 | void __iomem *intevtsa = ioremap_nocache(INTEVTSA, PAGE_SIZE); | ||
584 | |||
585 | register_intc_controller(&intca_desc); | ||
586 | register_intc_controller(&intca_irq_pins_desc); | ||
587 | register_intc_controller(&intcs_desc); | ||
588 | |||
589 | /* demux using INTEVTSA */ | ||
590 | irq_set_handler_data(evt2irq(INTCS_INTVECT), (void *)intevtsa); | ||
591 | irq_set_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux); | ||
592 | } | ||
diff --git a/arch/arm/mach-shmobile/pfc-r8a7779.c b/arch/arm/mach-shmobile/pfc-r8a7779.c index cbc26ba2a0a2..9513234d322b 100644 --- a/arch/arm/mach-shmobile/pfc-r8a7779.c +++ b/arch/arm/mach-shmobile/pfc-r8a7779.c | |||
@@ -140,7 +140,7 @@ enum { | |||
140 | FN_IP7_3_2, FN_IP7_6_4, FN_IP7_9_7, FN_IP7_12_10, | 140 | FN_IP7_3_2, FN_IP7_6_4, FN_IP7_9_7, FN_IP7_12_10, |
141 | FN_IP7_14_13, FN_IP2_7_4, FN_IP2_11_8, FN_IP2_15_12, | 141 | FN_IP7_14_13, FN_IP2_7_4, FN_IP2_11_8, FN_IP2_15_12, |
142 | FN_IP1_28_25, FN_IP2_3_0, FN_IP8_3_0, FN_IP8_7_4, | 142 | FN_IP1_28_25, FN_IP2_3_0, FN_IP8_3_0, FN_IP8_7_4, |
143 | FN_IP8_11_8, FN_IP8_15_12, FN_PENC0, FN_PENC1, | 143 | FN_IP8_11_8, FN_IP8_15_12, FN_USB_PENC0, FN_USB_PENC1, |
144 | FN_IP0_2_0, FN_IP8_17_16, FN_IP8_18, FN_IP8_19, | 144 | FN_IP0_2_0, FN_IP8_17_16, FN_IP8_18, FN_IP8_19, |
145 | 145 | ||
146 | /* GPSR5 */ | 146 | /* GPSR5 */ |
@@ -176,7 +176,7 @@ enum { | |||
176 | FN_A0, FN_SD1_DAT3, FN_MMC0_D3, FN_FD3, | 176 | FN_A0, FN_SD1_DAT3, FN_MMC0_D3, FN_FD3, |
177 | FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2, | 177 | FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2, |
178 | FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C, | 178 | FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C, |
179 | FN_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0, | 179 | FN_USB_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0, |
180 | FN_SCIF_CLK, FN_TCLK0_C, | 180 | FN_SCIF_CLK, FN_TCLK0_C, |
181 | 181 | ||
182 | /* IPSR1 */ | 182 | /* IPSR1 */ |
@@ -447,7 +447,7 @@ enum { | |||
447 | A0_MARK, SD1_DAT3_MARK, MMC0_D3_MARK, FD3_MARK, | 447 | A0_MARK, SD1_DAT3_MARK, MMC0_D3_MARK, FD3_MARK, |
448 | BS_MARK, SD1_DAT2_MARK, MMC0_D2_MARK, FD2_MARK, | 448 | BS_MARK, SD1_DAT2_MARK, MMC0_D2_MARK, FD2_MARK, |
449 | ATADIR0_MARK, SDSELF_MARK, HCTS1_MARK, TX4_C_MARK, | 449 | ATADIR0_MARK, SDSELF_MARK, HCTS1_MARK, TX4_C_MARK, |
450 | PENC2_MARK, SCK0_MARK, PWM1_MARK, PWMFSW0_MARK, | 450 | USB_PENC2_MARK, SCK0_MARK, PWM1_MARK, PWMFSW0_MARK, |
451 | SCIF_CLK_MARK, TCLK0_C_MARK, | 451 | SCIF_CLK_MARK, TCLK0_C_MARK, |
452 | 452 | ||
453 | EX_CS0_MARK, RX3_C_IRDA_RX_C_MARK, MMC0_D6_MARK, | 453 | EX_CS0_MARK, RX3_C_IRDA_RX_C_MARK, MMC0_D6_MARK, |
@@ -658,7 +658,7 @@ static pinmux_enum_t pinmux_data[] = { | |||
658 | PINMUX_DATA(A18_MARK, FN_A18), | 658 | PINMUX_DATA(A18_MARK, FN_A18), |
659 | PINMUX_DATA(A19_MARK, FN_A19), | 659 | PINMUX_DATA(A19_MARK, FN_A19), |
660 | 660 | ||
661 | PINMUX_IPSR_DATA(IP0_2_0, PENC2), | 661 | PINMUX_IPSR_DATA(IP0_2_0, USB_PENC2), |
662 | PINMUX_IPSR_MODSEL_DATA(IP0_2_0, SCK0, SEL_SCIF0_0), | 662 | PINMUX_IPSR_MODSEL_DATA(IP0_2_0, SCK0, SEL_SCIF0_0), |
663 | PINMUX_IPSR_DATA(IP0_2_0, PWM1), | 663 | PINMUX_IPSR_DATA(IP0_2_0, PWM1), |
664 | PINMUX_IPSR_MODSEL_DATA(IP0_2_0, PWMFSW0, SEL_PWMFSW_0), | 664 | PINMUX_IPSR_MODSEL_DATA(IP0_2_0, PWMFSW0, SEL_PWMFSW_0), |
@@ -1456,7 +1456,7 @@ static struct pinmux_gpio pinmux_gpios[] = { | |||
1456 | GPIO_FN(A19), | 1456 | GPIO_FN(A19), |
1457 | 1457 | ||
1458 | /* IPSR0 */ | 1458 | /* IPSR0 */ |
1459 | GPIO_FN(PENC2), GPIO_FN(SCK0), GPIO_FN(PWM1), GPIO_FN(PWMFSW0), | 1459 | GPIO_FN(USB_PENC2), GPIO_FN(SCK0), GPIO_FN(PWM1), GPIO_FN(PWMFSW0), |
1460 | GPIO_FN(SCIF_CLK), GPIO_FN(TCLK0_C), GPIO_FN(BS), GPIO_FN(SD1_DAT2), | 1460 | GPIO_FN(SCIF_CLK), GPIO_FN(TCLK0_C), GPIO_FN(BS), GPIO_FN(SD1_DAT2), |
1461 | GPIO_FN(MMC0_D2), GPIO_FN(FD2), GPIO_FN(ATADIR0), GPIO_FN(SDSELF), | 1461 | GPIO_FN(MMC0_D2), GPIO_FN(FD2), GPIO_FN(ATADIR0), GPIO_FN(SDSELF), |
1462 | GPIO_FN(HCTS1), GPIO_FN(TX4_C), GPIO_FN(A0), GPIO_FN(SD1_DAT3), | 1462 | GPIO_FN(HCTS1), GPIO_FN(TX4_C), GPIO_FN(A0), GPIO_FN(SD1_DAT3), |
@@ -1865,8 +1865,8 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { | |||
1865 | GP_4_30_FN, FN_IP8_18, | 1865 | GP_4_30_FN, FN_IP8_18, |
1866 | GP_4_29_FN, FN_IP8_17_16, | 1866 | GP_4_29_FN, FN_IP8_17_16, |
1867 | GP_4_28_FN, FN_IP0_2_0, | 1867 | GP_4_28_FN, FN_IP0_2_0, |
1868 | GP_4_27_FN, FN_PENC1, | 1868 | GP_4_27_FN, FN_USB_PENC1, |
1869 | GP_4_26_FN, FN_PENC0, | 1869 | GP_4_26_FN, FN_USB_PENC0, |
1870 | GP_4_25_FN, FN_IP8_15_12, | 1870 | GP_4_25_FN, FN_IP8_15_12, |
1871 | GP_4_24_FN, FN_IP8_11_8, | 1871 | GP_4_24_FN, FN_IP8_11_8, |
1872 | GP_4_23_FN, FN_IP8_7_4, | 1872 | GP_4_23_FN, FN_IP8_7_4, |
@@ -1981,7 +1981,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { | |||
1981 | FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2, | 1981 | FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2, |
1982 | FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C, | 1982 | FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C, |
1983 | /* IP0_2_0 [3] */ | 1983 | /* IP0_2_0 [3] */ |
1984 | FN_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0, | 1984 | FN_USB_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0, |
1985 | FN_SCIF_CLK, FN_TCLK0_C, 0, 0 } | 1985 | FN_SCIF_CLK, FN_TCLK0_C, 0, 0 } |
1986 | }, | 1986 | }, |
1987 | { PINMUX_CFG_REG_VAR("IPSR1", 0xfffc0024, 32, | 1987 | { PINMUX_CFG_REG_VAR("IPSR1", 0xfffc0024, 32, |
diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c deleted file mode 100644 index c0c137f39052..000000000000 --- a/arch/arm/mach-shmobile/pfc-sh7367.c +++ /dev/null | |||
@@ -1,1727 +0,0 @@ | |||
1 | /* | ||
2 | * sh7367 processor support - PFC hardware block | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; version 2 of the License. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/sh_pfc.h> | ||
22 | #include <mach/sh7367.h> | ||
23 | |||
24 | #define CPU_ALL_PORT(fn, pfx, sfx) \ | ||
25 | PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \ | ||
26 | PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \ | ||
27 | PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \ | ||
28 | PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \ | ||
29 | PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \ | ||
30 | PORT_10(fn, pfx##26, sfx), PORT_1(fn, pfx##270, sfx), \ | ||
31 | PORT_1(fn, pfx##271, sfx), PORT_1(fn, pfx##272, sfx) | ||
32 | |||
33 | enum { | ||
34 | PINMUX_RESERVED = 0, | ||
35 | |||
36 | PINMUX_DATA_BEGIN, | ||
37 | PORT_ALL(DATA), /* PORT0_DATA -> PORT272_DATA */ | ||
38 | PINMUX_DATA_END, | ||
39 | |||
40 | PINMUX_INPUT_BEGIN, | ||
41 | PORT_ALL(IN), /* PORT0_IN -> PORT272_IN */ | ||
42 | PINMUX_INPUT_END, | ||
43 | |||
44 | PINMUX_INPUT_PULLUP_BEGIN, | ||
45 | PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */ | ||
46 | PINMUX_INPUT_PULLUP_END, | ||
47 | |||
48 | PINMUX_INPUT_PULLDOWN_BEGIN, | ||
49 | PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */ | ||
50 | PINMUX_INPUT_PULLDOWN_END, | ||
51 | |||
52 | PINMUX_OUTPUT_BEGIN, | ||
53 | PORT_ALL(OUT), /* PORT0_OUT -> PORT272_OUT */ | ||
54 | PINMUX_OUTPUT_END, | ||
55 | |||
56 | PINMUX_FUNCTION_BEGIN, | ||
57 | PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */ | ||
58 | PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */ | ||
59 | PORT_ALL(FN0), /* PORT0_FN0 -> PORT272_FN0 */ | ||
60 | PORT_ALL(FN1), /* PORT0_FN1 -> PORT272_FN1 */ | ||
61 | PORT_ALL(FN2), /* PORT0_FN2 -> PORT272_FN2 */ | ||
62 | PORT_ALL(FN3), /* PORT0_FN3 -> PORT272_FN3 */ | ||
63 | PORT_ALL(FN4), /* PORT0_FN4 -> PORT272_FN4 */ | ||
64 | PORT_ALL(FN5), /* PORT0_FN5 -> PORT272_FN5 */ | ||
65 | PORT_ALL(FN6), /* PORT0_FN6 -> PORT272_FN6 */ | ||
66 | PORT_ALL(FN7), /* PORT0_FN7 -> PORT272_FN7 */ | ||
67 | |||
68 | MSELBCR_MSEL2_1, MSELBCR_MSEL2_0, | ||
69 | PINMUX_FUNCTION_END, | ||
70 | |||
71 | PINMUX_MARK_BEGIN, | ||
72 | /* Special Pull-up / Pull-down Functions */ | ||
73 | PORT48_KEYIN0_PU_MARK, PORT49_KEYIN1_PU_MARK, | ||
74 | PORT50_KEYIN2_PU_MARK, PORT55_KEYIN3_PU_MARK, | ||
75 | PORT56_KEYIN4_PU_MARK, PORT57_KEYIN5_PU_MARK, | ||
76 | PORT58_KEYIN6_PU_MARK, | ||
77 | |||
78 | /* 49-1 */ | ||
79 | VBUS0_MARK, CPORT0_MARK, CPORT1_MARK, CPORT2_MARK, | ||
80 | CPORT3_MARK, CPORT4_MARK, CPORT5_MARK, CPORT6_MARK, | ||
81 | CPORT7_MARK, CPORT8_MARK, CPORT9_MARK, CPORT10_MARK, | ||
82 | CPORT11_MARK, SIN2_MARK, CPORT12_MARK, XCTS2_MARK, | ||
83 | CPORT13_MARK, RFSPO4_MARK, CPORT14_MARK, RFSPO5_MARK, | ||
84 | CPORT15_MARK, CPORT16_MARK, CPORT17_MARK, SOUT2_MARK, | ||
85 | CPORT18_MARK, XRTS2_MARK, CPORT19_MARK, CPORT20_MARK, | ||
86 | RFSPO6_MARK, CPORT21_MARK, STATUS0_MARK, CPORT22_MARK, | ||
87 | STATUS1_MARK, CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK, | ||
88 | MPORT0_MARK, MPORT1_MARK, B_SYNLD1_MARK, B_SYNLD2_MARK, | ||
89 | XMAINPS_MARK, XDIVPS_MARK, XIDRST_MARK, IDCLK_MARK, | ||
90 | IDIO_MARK, SOUT1_MARK, SCIFA4_TXD_MARK, | ||
91 | M02_BERDAT_MARK, SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK, | ||
92 | XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK, | ||
93 | XCTS1_MARK, SCIFA4_CTS_MARK, | ||
94 | |||
95 | /* 49-2 */ | ||
96 | HSU_IQ_AGC6_MARK, MFG2_IN2_MARK, MSIOF2_MCK0_MARK, | ||
97 | HSU_IQ_AGC5_MARK, MFG2_IN1_MARK, MSIOF2_MCK1_MARK, | ||
98 | HSU_IQ_AGC4_MARK, MSIOF2_RSYNC_MARK, | ||
99 | HSU_IQ_AGC3_MARK, MFG2_OUT1_MARK, MSIOF2_RSCK_MARK, | ||
100 | HSU_IQ_AGC2_MARK, PORT42_KEYOUT0_MARK, | ||
101 | HSU_IQ_AGC1_MARK, PORT43_KEYOUT1_MARK, | ||
102 | HSU_IQ_AGC0_MARK, PORT44_KEYOUT2_MARK, | ||
103 | HSU_IQ_AGC_ST_MARK, PORT45_KEYOUT3_MARK, | ||
104 | HSU_IQ_PDO_MARK, PORT46_KEYOUT4_MARK, | ||
105 | HSU_IQ_PYO_MARK, PORT47_KEYOUT5_MARK, | ||
106 | HSU_EN_TXMUX_G3MO_MARK, PORT48_KEYIN0_MARK, | ||
107 | HSU_I_TXMUX_G3MO_MARK, PORT49_KEYIN1_MARK, | ||
108 | HSU_Q_TXMUX_G3MO_MARK, PORT50_KEYIN2_MARK, | ||
109 | HSU_SYO_MARK, PORT51_MSIOF2_TSYNC_MARK, | ||
110 | HSU_SDO_MARK, PORT52_MSIOF2_TSCK_MARK, | ||
111 | HSU_TGTTI_G3MO_MARK, PORT53_MSIOF2_TXD_MARK, | ||
112 | B_TIME_STAMP_MARK, PORT54_MSIOF2_RXD_MARK, | ||
113 | HSU_SDI_MARK, PORT55_KEYIN3_MARK, | ||
114 | HSU_SCO_MARK, PORT56_KEYIN4_MARK, | ||
115 | HSU_DREQ_MARK, PORT57_KEYIN5_MARK, | ||
116 | HSU_DACK_MARK, PORT58_KEYIN6_MARK, | ||
117 | HSU_CLK61M_MARK, PORT59_MSIOF2_SS1_MARK, | ||
118 | HSU_XRST_MARK, PORT60_MSIOF2_SS2_MARK, | ||
119 | PCMCLKO_MARK, SYNC8KO_MARK, DNPCM_A_MARK, UPPCM_A_MARK, | ||
120 | XTALB1L_MARK, | ||
121 | GPS_AGC1_MARK, SCIFA0_RTS_MARK, | ||
122 | GPS_AGC2_MARK, SCIFA0_SCK_MARK, | ||
123 | GPS_AGC3_MARK, SCIFA0_TXD_MARK, | ||
124 | GPS_AGC4_MARK, SCIFA0_RXD_MARK, | ||
125 | GPS_PWRD_MARK, SCIFA0_CTS_MARK, | ||
126 | GPS_IM_MARK, GPS_IS_MARK, GPS_QM_MARK, GPS_QS_MARK, | ||
127 | SIUBOMC_MARK, TPU2TO0_MARK, | ||
128 | SIUCKB_MARK, TPU2TO1_MARK, | ||
129 | SIUBOLR_MARK, BBIF2_TSYNC_MARK, TPU2TO2_MARK, | ||
130 | SIUBOBT_MARK, BBIF2_TSCK_MARK, TPU2TO3_MARK, | ||
131 | SIUBOSLD_MARK, BBIF2_TXD_MARK, TPU3TO0_MARK, | ||
132 | SIUBILR_MARK, TPU3TO1_MARK, | ||
133 | SIUBIBT_MARK, TPU3TO2_MARK, | ||
134 | SIUBISLD_MARK, TPU3TO3_MARK, | ||
135 | NMI_MARK, TPU4TO0_MARK, | ||
136 | DNPCM_M_MARK, TPU4TO1_MARK, TPU4TO2_MARK, TPU4TO3_MARK, | ||
137 | IRQ_TMPB_MARK, | ||
138 | PWEN_MARK, MFG1_OUT1_MARK, | ||
139 | OVCN_MARK, MFG1_IN1_MARK, | ||
140 | OVCN2_MARK, MFG1_IN2_MARK, | ||
141 | |||
142 | /* 49-3 */ | ||
143 | RFSPO1_MARK, RFSPO2_MARK, RFSPO3_MARK, PORT93_VIO_CKO2_MARK, | ||
144 | USBTERM_MARK, EXTLP_MARK, IDIN_MARK, | ||
145 | SCIFA5_CTS_MARK, MFG0_IN1_MARK, | ||
146 | SCIFA5_RTS_MARK, MFG0_IN2_MARK, | ||
147 | SCIFA5_RXD_MARK, | ||
148 | SCIFA5_TXD_MARK, | ||
149 | SCIFA5_SCK_MARK, MFG0_OUT1_MARK, | ||
150 | A0_EA0_MARK, BS_MARK, | ||
151 | A14_EA14_MARK, PORT102_KEYOUT0_MARK, | ||
152 | A15_EA15_MARK, PORT103_KEYOUT1_MARK, DV_CLKOL_MARK, | ||
153 | A16_EA16_MARK, PORT104_KEYOUT2_MARK, | ||
154 | DV_VSYNCL_MARK, MSIOF0_SS1_MARK, | ||
155 | A17_EA17_MARK, PORT105_KEYOUT3_MARK, | ||
156 | DV_HSYNCL_MARK, MSIOF0_TSYNC_MARK, | ||
157 | A18_EA18_MARK, PORT106_KEYOUT4_MARK, | ||
158 | DV_DL0_MARK, MSIOF0_TSCK_MARK, | ||
159 | A19_EA19_MARK, PORT107_KEYOUT5_MARK, | ||
160 | DV_DL1_MARK, MSIOF0_TXD_MARK, | ||
161 | A20_EA20_MARK, PORT108_KEYIN0_MARK, | ||
162 | DV_DL2_MARK, MSIOF0_RSCK_MARK, | ||
163 | A21_EA21_MARK, PORT109_KEYIN1_MARK, | ||
164 | DV_DL3_MARK, MSIOF0_RSYNC_MARK, | ||
165 | A22_EA22_MARK, PORT110_KEYIN2_MARK, | ||
166 | DV_DL4_MARK, MSIOF0_MCK0_MARK, | ||
167 | A23_EA23_MARK, PORT111_KEYIN3_MARK, | ||
168 | DV_DL5_MARK, MSIOF0_MCK1_MARK, | ||
169 | A24_EA24_MARK, PORT112_KEYIN4_MARK, | ||
170 | DV_DL6_MARK, MSIOF0_RXD_MARK, | ||
171 | A25_EA25_MARK, PORT113_KEYIN5_MARK, | ||
172 | DV_DL7_MARK, MSIOF0_SS2_MARK, | ||
173 | A26_MARK, PORT113_KEYIN6_MARK, DV_CLKIL_MARK, | ||
174 | D0_ED0_NAF0_MARK, D1_ED1_NAF1_MARK, D2_ED2_NAF2_MARK, | ||
175 | D3_ED3_NAF3_MARK, D4_ED4_NAF4_MARK, D5_ED5_NAF5_MARK, | ||
176 | D6_ED6_NAF6_MARK, D7_ED7_NAF7_MARK, D8_ED8_NAF8_MARK, | ||
177 | D9_ED9_NAF9_MARK, D10_ED10_NAF10_MARK, D11_ED11_NAF11_MARK, | ||
178 | D12_ED12_NAF12_MARK, D13_ED13_NAF13_MARK, | ||
179 | D14_ED14_NAF14_MARK, D15_ED15_NAF15_MARK, | ||
180 | CS4_MARK, CS5A_MARK, CS5B_MARK, FCE1_MARK, | ||
181 | CS6B_MARK, XCS2_MARK, FCE0_MARK, CS6A_MARK, | ||
182 | DACK0_MARK, WAIT_MARK, DREQ0_MARK, RD_XRD_MARK, | ||
183 | A27_MARK, RDWR_XWE_MARK, WE0_XWR0_FWE_MARK, | ||
184 | WE1_XWR1_MARK, FRB_MARK, CKO_MARK, | ||
185 | NBRSTOUT_MARK, NBRST_MARK, | ||
186 | |||
187 | /* 49-4 */ | ||
188 | RFSPO0_MARK, PORT146_VIO_CKO2_MARK, TSTMD_MARK, | ||
189 | VIO_VD_MARK, VIO_HD_MARK, | ||
190 | VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, | ||
191 | VIO_D3_MARK, VIO_D4_MARK, VIO_D5_MARK, | ||
192 | VIO_D6_MARK, VIO_D7_MARK, VIO_D8_MARK, | ||
193 | VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK, | ||
194 | VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, | ||
195 | VIO_D15_MARK, VIO_CLK_MARK, VIO_FIELD_MARK, | ||
196 | VIO_CKO_MARK, | ||
197 | MFG3_IN1_MARK, MFG3_IN2_MARK, | ||
198 | M9_SLCD_A01_MARK, MFG3_OUT1_MARK, TPU0TO0_MARK, | ||
199 | M10_SLCD_CK1_MARK, MFG4_IN1_MARK, TPU0TO1_MARK, | ||
200 | M11_SLCD_SO1_MARK, MFG4_IN2_MARK, TPU0TO2_MARK, | ||
201 | M12_SLCD_CE1_MARK, MFG4_OUT1_MARK, TPU0TO3_MARK, | ||
202 | LCDD0_MARK, PORT175_KEYOUT0_MARK, DV_D0_MARK, | ||
203 | SIUCKA_MARK, MFG0_OUT2_MARK, | ||
204 | LCDD1_MARK, PORT176_KEYOUT1_MARK, DV_D1_MARK, | ||
205 | SIUAOLR_MARK, BBIF2_TSYNC1_MARK, | ||
206 | LCDD2_MARK, PORT177_KEYOUT2_MARK, DV_D2_MARK, | ||
207 | SIUAOBT_MARK, BBIF2_TSCK1_MARK, | ||
208 | LCDD3_MARK, PORT178_KEYOUT3_MARK, DV_D3_MARK, | ||
209 | SIUAOSLD_MARK, BBIF2_TXD1_MARK, | ||
210 | LCDD4_MARK, PORT179_KEYOUT4_MARK, DV_D4_MARK, | ||
211 | SIUAISPD_MARK, MFG1_OUT2_MARK, | ||
212 | LCDD5_MARK, PORT180_KEYOUT5_MARK, DV_D5_MARK, | ||
213 | SIUAILR_MARK, MFG2_OUT2_MARK, | ||
214 | LCDD6_MARK, DV_D6_MARK, | ||
215 | SIUAIBT_MARK, MFG3_OUT2_MARK, XWR2_MARK, | ||
216 | LCDD7_MARK, DV_D7_MARK, | ||
217 | SIUAISLD_MARK, MFG4_OUT2_MARK, XWR3_MARK, | ||
218 | LCDD8_MARK, DV_D8_MARK, D16_MARK, ED16_MARK, | ||
219 | LCDD9_MARK, DV_D9_MARK, D17_MARK, ED17_MARK, | ||
220 | LCDD10_MARK, DV_D10_MARK, D18_MARK, ED18_MARK, | ||
221 | LCDD11_MARK, DV_D11_MARK, D19_MARK, ED19_MARK, | ||
222 | LCDD12_MARK, DV_D12_MARK, D20_MARK, ED20_MARK, | ||
223 | LCDD13_MARK, DV_D13_MARK, D21_MARK, ED21_MARK, | ||
224 | LCDD14_MARK, DV_D14_MARK, D22_MARK, ED22_MARK, | ||
225 | LCDD15_MARK, DV_D15_MARK, D23_MARK, ED23_MARK, | ||
226 | LCDD16_MARK, DV_HSYNC_MARK, D24_MARK, ED24_MARK, | ||
227 | LCDD17_MARK, DV_VSYNC_MARK, D25_MARK, ED25_MARK, | ||
228 | LCDD18_MARK, DREQ2_MARK, MSIOF0L_TSCK_MARK, | ||
229 | D26_MARK, ED26_MARK, | ||
230 | LCDD19_MARK, MSIOF0L_TSYNC_MARK, | ||
231 | D27_MARK, ED27_MARK, | ||
232 | LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, | ||
233 | D28_MARK, ED28_MARK, | ||
234 | LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, | ||
235 | D29_MARK, ED29_MARK, | ||
236 | LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_SS1_MARK, | ||
237 | D30_MARK, ED30_MARK, | ||
238 | LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_SS2_MARK, | ||
239 | D31_MARK, ED31_MARK, | ||
240 | LCDDCK_MARK, LCDWR_MARK, DV_CKO_MARK, SIUAOSPD_MARK, | ||
241 | LCDRD_MARK, DACK2_MARK, MSIOF0L_RSYNC_MARK, | ||
242 | |||
243 | /* 49-5 */ | ||
244 | LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK, | ||
245 | LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_RSCK_MARK, | ||
246 | LCDCSYN_MARK, LCDCSYN2_MARK, DV_CKI_MARK, | ||
247 | LCDLCLK_MARK, DREQ1_MARK, MSIOF0L_RXD_MARK, | ||
248 | LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, MSIOF0L_TXD_MARK, | ||
249 | VIO_DR0_MARK, VIO_DR1_MARK, VIO_DR2_MARK, VIO_DR3_MARK, | ||
250 | VIO_DR4_MARK, VIO_DR5_MARK, VIO_DR6_MARK, VIO_DR7_MARK, | ||
251 | VIO_VDR_MARK, VIO_HDR_MARK, | ||
252 | VIO_CLKR_MARK, VIO_CKOR_MARK, | ||
253 | SCIFA1_TXD_MARK, GPS_PGFA0_MARK, | ||
254 | SCIFA1_SCK_MARK, GPS_PGFA1_MARK, | ||
255 | SCIFA1_RTS_MARK, GPS_EPPSINMON_MARK, | ||
256 | SCIFA1_RXD_MARK, SCIFA1_CTS_MARK, | ||
257 | MSIOF1_TXD_MARK, SCIFA1_TXD2_MARK, GPS_TXD_MARK, | ||
258 | MSIOF1_TSYNC_MARK, SCIFA1_CTS2_MARK, I2C_SDA2_MARK, | ||
259 | MSIOF1_TSCK_MARK, SCIFA1_SCK2_MARK, | ||
260 | MSIOF1_RXD_MARK, SCIFA1_RXD2_MARK, GPS_RXD_MARK, | ||
261 | MSIOF1_RSCK_MARK, SCIFA1_RTS2_MARK, | ||
262 | MSIOF1_RSYNC_MARK, I2C_SCL2_MARK, | ||
263 | MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK, | ||
264 | MSIOF1_SS1_MARK, EDBGREQ3_MARK, | ||
265 | MSIOF1_SS2_MARK, | ||
266 | PORT236_IROUT_MARK, IRDA_OUT_MARK, | ||
267 | IRDA_IN_MARK, IRDA_FIRSEL_MARK, | ||
268 | TPU1TO0_MARK, TS_SPSYNC3_MARK, | ||
269 | TPU1TO1_MARK, TS_SDAT3_MARK, | ||
270 | TPU1TO2_MARK, TS_SDEN3_MARK, PORT241_MSIOF2_SS1_MARK, | ||
271 | TPU1TO3_MARK, PORT242_MSIOF2_TSCK_MARK, | ||
272 | M13_BSW_MARK, PORT243_MSIOF2_TSYNC_MARK, | ||
273 | M14_GSW_MARK, PORT244_MSIOF2_TXD_MARK, | ||
274 | PORT245_IROUT_MARK, M15_RSW_MARK, | ||
275 | SOUT3_MARK, SCIFA2_TXD1_MARK, | ||
276 | SIN3_MARK, SCIFA2_RXD1_MARK, | ||
277 | XRTS3_MARK, SCIFA2_RTS1_MARK, PORT248_MSIOF2_SS2_MARK, | ||
278 | XCTS3_MARK, SCIFA2_CTS1_MARK, PORT249_MSIOF2_RXD_MARK, | ||
279 | DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK, | ||
280 | SDHICLK0_MARK, TCK2_MARK, | ||
281 | SDHICD0_MARK, | ||
282 | SDHID0_0_MARK, TMS2_MARK, | ||
283 | SDHID0_1_MARK, TDO2_MARK, | ||
284 | SDHID0_2_MARK, TDI2_MARK, | ||
285 | SDHID0_3_MARK, RTCK2_MARK, | ||
286 | |||
287 | /* 49-6 */ | ||
288 | SDHICMD0_MARK, TRST2_MARK, | ||
289 | SDHIWP0_MARK, EDBGREQ2_MARK, | ||
290 | SDHICLK1_MARK, TCK3_MARK, | ||
291 | SDHID1_0_MARK, M11_SLCD_SO2_MARK, | ||
292 | TS_SPSYNC2_MARK, TMS3_MARK, | ||
293 | SDHID1_1_MARK, M9_SLCD_AO2_MARK, | ||
294 | TS_SDAT2_MARK, TDO3_MARK, | ||
295 | SDHID1_2_MARK, M10_SLCD_CK2_MARK, | ||
296 | TS_SDEN2_MARK, TDI3_MARK, | ||
297 | SDHID1_3_MARK, M12_SLCD_CE2_MARK, | ||
298 | TS_SCK2_MARK, RTCK3_MARK, | ||
299 | SDHICMD1_MARK, TRST3_MARK, | ||
300 | SDHICLK2_MARK, SCIFB_SCK_MARK, | ||
301 | SDHID2_0_MARK, SCIFB_TXD_MARK, | ||
302 | SDHID2_1_MARK, SCIFB_CTS_MARK, | ||
303 | SDHID2_2_MARK, SCIFB_RXD_MARK, | ||
304 | SDHID2_3_MARK, SCIFB_RTS_MARK, | ||
305 | SDHICMD2_MARK, | ||
306 | RESETOUTS_MARK, | ||
307 | DIVLOCK_MARK, | ||
308 | PINMUX_MARK_END, | ||
309 | }; | ||
310 | |||
311 | static pinmux_enum_t pinmux_data[] = { | ||
312 | |||
313 | /* specify valid pin states for each pin in GPIO mode */ | ||
314 | |||
315 | /* 49-1 (GPIO) */ | ||
316 | PORT_DATA_I_PD(0), | ||
317 | PORT_DATA_I_PU(1), PORT_DATA_I_PU(2), PORT_DATA_I_PU(3), | ||
318 | PORT_DATA_I_PU(4), PORT_DATA_I_PU(5), PORT_DATA_I_PU(6), | ||
319 | PORT_DATA_I_PU(7), PORT_DATA_I_PU(8), PORT_DATA_I_PU(9), | ||
320 | PORT_DATA_I_PU(10), PORT_DATA_I_PU(11), PORT_DATA_I_PU(12), | ||
321 | PORT_DATA_I_PU(13), | ||
322 | PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15), | ||
323 | PORT_DATA_O(16), PORT_DATA_O(17), PORT_DATA_O(18), PORT_DATA_O(19), | ||
324 | PORT_DATA_O(20), PORT_DATA_O(21), PORT_DATA_O(22), PORT_DATA_O(23), | ||
325 | PORT_DATA_O(24), PORT_DATA_O(25), PORT_DATA_O(26), | ||
326 | PORT_DATA_I_PD(27), PORT_DATA_I_PD(28), | ||
327 | PORT_DATA_O(29), PORT_DATA_O(30), PORT_DATA_O(31), PORT_DATA_O(32), | ||
328 | PORT_DATA_IO_PU(33), | ||
329 | PORT_DATA_O(34), | ||
330 | PORT_DATA_I_PU(35), | ||
331 | PORT_DATA_O(36), | ||
332 | PORT_DATA_I_PU_PD(37), | ||
333 | |||
334 | /* 49-2 (GPIO) */ | ||
335 | PORT_DATA_IO_PU_PD(38), | ||
336 | PORT_DATA_IO_PD(39), PORT_DATA_IO_PD(40), PORT_DATA_IO_PD(41), | ||
337 | PORT_DATA_O(42), PORT_DATA_O(43), PORT_DATA_O(44), PORT_DATA_O(45), | ||
338 | PORT_DATA_O(46), PORT_DATA_O(47), | ||
339 | PORT_DATA_I_PU_PD(48), PORT_DATA_I_PU_PD(49), PORT_DATA_I_PU_PD(50), | ||
340 | PORT_DATA_IO_PD(51), PORT_DATA_IO_PD(52), | ||
341 | PORT_DATA_O(53), | ||
342 | PORT_DATA_IO_PD(54), | ||
343 | PORT_DATA_I_PU_PD(55), | ||
344 | PORT_DATA_IO_PU_PD(56), | ||
345 | PORT_DATA_I_PU_PD(57), | ||
346 | PORT_DATA_IO_PU_PD(58), | ||
347 | PORT_DATA_O(59), PORT_DATA_O(60), PORT_DATA_O(61), PORT_DATA_O(62), | ||
348 | PORT_DATA_O(63), | ||
349 | PORT_DATA_I_PU(64), | ||
350 | PORT_DATA_O(65), PORT_DATA_O(66), PORT_DATA_O(67), PORT_DATA_O(68), | ||
351 | PORT_DATA_IO_PD(69), PORT_DATA_IO_PD(70), | ||
352 | PORT_DATA_I_PD(71), PORT_DATA_I_PD(72), PORT_DATA_I_PD(73), | ||
353 | PORT_DATA_I_PD(74), | ||
354 | PORT_DATA_IO_PU_PD(75), PORT_DATA_IO_PU_PD(76), | ||
355 | PORT_DATA_IO_PD(77), PORT_DATA_IO_PD(78), | ||
356 | PORT_DATA_O(79), | ||
357 | PORT_DATA_IO_PD(80), PORT_DATA_IO_PD(81), PORT_DATA_IO_PD(82), | ||
358 | PORT_DATA_IO_PU_PD(83), PORT_DATA_IO_PU_PD(84), | ||
359 | PORT_DATA_IO_PU_PD(85), PORT_DATA_IO_PU_PD(86), | ||
360 | PORT_DATA_I_PD(87), | ||
361 | PORT_DATA_IO_PU_PD(88), | ||
362 | PORT_DATA_I_PU_PD(89), PORT_DATA_I_PU_PD(90), | ||
363 | |||
364 | /* 49-3 (GPIO) */ | ||
365 | PORT_DATA_O(91), PORT_DATA_O(92), PORT_DATA_O(93), PORT_DATA_O(94), | ||
366 | PORT_DATA_I_PU_PD(95), | ||
367 | PORT_DATA_IO_PU_PD(96), PORT_DATA_IO_PU_PD(97), PORT_DATA_IO_PU_PD(98), | ||
368 | PORT_DATA_IO_PU_PD(99), PORT_DATA_IO_PU_PD(100), | ||
369 | PORT_DATA_IO(101), PORT_DATA_IO(102), PORT_DATA_IO(103), | ||
370 | PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105), PORT_DATA_IO_PD(106), | ||
371 | PORT_DATA_IO_PD(107), | ||
372 | PORT_DATA_IO_PU_PD(108), PORT_DATA_IO_PU_PD(109), | ||
373 | PORT_DATA_IO_PU_PD(110), PORT_DATA_IO_PU_PD(111), | ||
374 | PORT_DATA_IO_PU_PD(112), PORT_DATA_IO_PU_PD(113), | ||
375 | PORT_DATA_IO_PU_PD(114), | ||
376 | PORT_DATA_IO_PU(115), PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117), | ||
377 | PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119), PORT_DATA_IO_PU(120), | ||
378 | PORT_DATA_IO_PU(121), PORT_DATA_IO_PU(122), PORT_DATA_IO_PU(123), | ||
379 | PORT_DATA_IO_PU(124), PORT_DATA_IO_PU(125), PORT_DATA_IO_PU(126), | ||
380 | PORT_DATA_IO_PU(127), PORT_DATA_IO_PU(128), PORT_DATA_IO_PU(129), | ||
381 | PORT_DATA_IO_PU(130), | ||
382 | PORT_DATA_O(131), PORT_DATA_O(132), PORT_DATA_O(133), | ||
383 | PORT_DATA_IO_PU(134), | ||
384 | PORT_DATA_O(135), PORT_DATA_O(136), | ||
385 | PORT_DATA_I_PU_PD(137), | ||
386 | PORT_DATA_IO(138), | ||
387 | PORT_DATA_IO_PU_PD(139), | ||
388 | PORT_DATA_IO(140), PORT_DATA_IO(141), | ||
389 | PORT_DATA_I_PU(142), | ||
390 | PORT_DATA_O(143), PORT_DATA_O(144), | ||
391 | PORT_DATA_I_PU(145), | ||
392 | |||
393 | /* 49-4 (GPIO) */ | ||
394 | PORT_DATA_O(146), | ||
395 | PORT_DATA_I_PU_PD(147), | ||
396 | PORT_DATA_I_PD(148), PORT_DATA_I_PD(149), | ||
397 | PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151), PORT_DATA_IO_PD(152), | ||
398 | PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154), PORT_DATA_IO_PD(155), | ||
399 | PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157), PORT_DATA_IO_PD(158), | ||
400 | PORT_DATA_IO_PD(159), PORT_DATA_IO_PD(160), PORT_DATA_IO_PD(161), | ||
401 | PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163), PORT_DATA_IO_PD(164), | ||
402 | PORT_DATA_IO_PD(165), PORT_DATA_IO_PD(166), | ||
403 | PORT_DATA_IO_PU_PD(167), | ||
404 | PORT_DATA_O(168), | ||
405 | PORT_DATA_I_PD(169), PORT_DATA_I_PD(170), | ||
406 | PORT_DATA_O(171), | ||
407 | PORT_DATA_IO_PD(172), PORT_DATA_IO_PD(173), | ||
408 | PORT_DATA_O(174), | ||
409 | PORT_DATA_IO_PD(175), PORT_DATA_IO_PD(176), PORT_DATA_IO_PD(177), | ||
410 | PORT_DATA_IO_PD(178), PORT_DATA_IO_PD(179), PORT_DATA_IO_PD(180), | ||
411 | PORT_DATA_IO_PD(181), PORT_DATA_IO_PD(182), PORT_DATA_IO_PD(183), | ||
412 | PORT_DATA_IO_PD(184), PORT_DATA_IO_PD(185), PORT_DATA_IO_PD(186), | ||
413 | PORT_DATA_IO_PD(187), PORT_DATA_IO_PD(188), PORT_DATA_IO_PD(189), | ||
414 | PORT_DATA_IO_PD(190), PORT_DATA_IO_PD(191), PORT_DATA_IO_PD(192), | ||
415 | PORT_DATA_IO_PD(193), PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195), | ||
416 | PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197), PORT_DATA_IO_PD(198), | ||
417 | PORT_DATA_O(199), | ||
418 | PORT_DATA_IO_PD(200), | ||
419 | |||
420 | /* 49-5 (GPIO) */ | ||
421 | PORT_DATA_O(201), | ||
422 | PORT_DATA_IO_PD(202), PORT_DATA_IO_PD(203), | ||
423 | PORT_DATA_I(204), | ||
424 | PORT_DATA_O(205), | ||
425 | PORT_DATA_IO_PD(206), PORT_DATA_IO_PD(207), PORT_DATA_IO_PD(208), | ||
426 | PORT_DATA_IO_PD(209), PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211), | ||
427 | PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213), PORT_DATA_IO_PD(214), | ||
428 | PORT_DATA_IO_PD(215), PORT_DATA_IO_PD(216), | ||
429 | PORT_DATA_O(217), | ||
430 | PORT_DATA_I_PU_PD(218), PORT_DATA_I_PU_PD(219), | ||
431 | PORT_DATA_O(220), PORT_DATA_O(221), PORT_DATA_O(222), | ||
432 | PORT_DATA_I_PD(223), | ||
433 | PORT_DATA_I_PU_PD(224), | ||
434 | PORT_DATA_O(225), | ||
435 | PORT_DATA_IO_PD(226), | ||
436 | PORT_DATA_IO_PU_PD(227), | ||
437 | PORT_DATA_I_PD(228), | ||
438 | PORT_DATA_IO_PD(229), PORT_DATA_IO_PD(230), | ||
439 | PORT_DATA_I_PU_PD(231), PORT_DATA_I_PU_PD(232), | ||
440 | PORT_DATA_IO_PU_PD(233), PORT_DATA_IO_PU_PD(234), | ||
441 | PORT_DATA_I_PU_PD(235), | ||
442 | PORT_DATA_O(236), | ||
443 | PORT_DATA_I_PD(237), | ||
444 | PORT_DATA_IO_PU_PD(238), PORT_DATA_IO_PU_PD(239), | ||
445 | PORT_DATA_IO_PD(240), PORT_DATA_IO_PD(241), | ||
446 | PORT_DATA_IO_PD(242), PORT_DATA_IO_PD(243), | ||
447 | PORT_DATA_O(244), | ||
448 | PORT_DATA_IO_PU_PD(245), | ||
449 | PORT_DATA_O(246), | ||
450 | PORT_DATA_I_PD(247), | ||
451 | PORT_DATA_IO_PU_PD(248), | ||
452 | PORT_DATA_I_PU_PD(249), | ||
453 | PORT_DATA_IO_PD(250), PORT_DATA_IO_PD(251), | ||
454 | PORT_DATA_IO_PU_PD(252), PORT_DATA_IO_PU_PD(253), | ||
455 | PORT_DATA_IO_PU_PD(254), PORT_DATA_IO_PU_PD(255), | ||
456 | PORT_DATA_IO_PU_PD(256), | ||
457 | |||
458 | /* 49-6 (GPIO) */ | ||
459 | PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PU_PD(258), | ||
460 | PORT_DATA_IO_PD(259), | ||
461 | PORT_DATA_IO_PU(260), PORT_DATA_IO_PU(261), PORT_DATA_IO_PU(262), | ||
462 | PORT_DATA_IO_PU(263), PORT_DATA_IO_PU(264), | ||
463 | PORT_DATA_O(265), | ||
464 | PORT_DATA_IO_PU(266), PORT_DATA_IO_PU(267), PORT_DATA_IO_PU(268), | ||
465 | PORT_DATA_IO_PU(269), PORT_DATA_IO_PU(270), | ||
466 | PORT_DATA_O(271), | ||
467 | PORT_DATA_I_PD(272), | ||
468 | |||
469 | /* Special Pull-up / Pull-down Functions */ | ||
470 | PINMUX_DATA(PORT48_KEYIN0_PU_MARK, MSELBCR_MSEL2_1, | ||
471 | PORT48_FN2, PORT48_IN_PU), | ||
472 | PINMUX_DATA(PORT49_KEYIN1_PU_MARK, MSELBCR_MSEL2_1, | ||
473 | PORT49_FN2, PORT49_IN_PU), | ||
474 | PINMUX_DATA(PORT50_KEYIN2_PU_MARK, MSELBCR_MSEL2_1, | ||
475 | PORT50_FN2, PORT50_IN_PU), | ||
476 | PINMUX_DATA(PORT55_KEYIN3_PU_MARK, MSELBCR_MSEL2_1, | ||
477 | PORT55_FN2, PORT55_IN_PU), | ||
478 | PINMUX_DATA(PORT56_KEYIN4_PU_MARK, MSELBCR_MSEL2_1, | ||
479 | PORT56_FN2, PORT56_IN_PU), | ||
480 | PINMUX_DATA(PORT57_KEYIN5_PU_MARK, MSELBCR_MSEL2_1, | ||
481 | PORT57_FN2, PORT57_IN_PU), | ||
482 | PINMUX_DATA(PORT58_KEYIN6_PU_MARK, MSELBCR_MSEL2_1, | ||
483 | PORT58_FN2, PORT58_IN_PU), | ||
484 | |||
485 | /* 49-1 (FN) */ | ||
486 | PINMUX_DATA(VBUS0_MARK, PORT0_FN1), | ||
487 | PINMUX_DATA(CPORT0_MARK, PORT1_FN1), | ||
488 | PINMUX_DATA(CPORT1_MARK, PORT2_FN1), | ||
489 | PINMUX_DATA(CPORT2_MARK, PORT3_FN1), | ||
490 | PINMUX_DATA(CPORT3_MARK, PORT4_FN1), | ||
491 | PINMUX_DATA(CPORT4_MARK, PORT5_FN1), | ||
492 | PINMUX_DATA(CPORT5_MARK, PORT6_FN1), | ||
493 | PINMUX_DATA(CPORT6_MARK, PORT7_FN1), | ||
494 | PINMUX_DATA(CPORT7_MARK, PORT8_FN1), | ||
495 | PINMUX_DATA(CPORT8_MARK, PORT9_FN1), | ||
496 | PINMUX_DATA(CPORT9_MARK, PORT10_FN1), | ||
497 | PINMUX_DATA(CPORT10_MARK, PORT11_FN1), | ||
498 | PINMUX_DATA(CPORT11_MARK, PORT12_FN1), | ||
499 | PINMUX_DATA(SIN2_MARK, PORT12_FN2), | ||
500 | PINMUX_DATA(CPORT12_MARK, PORT13_FN1), | ||
501 | PINMUX_DATA(XCTS2_MARK, PORT13_FN2), | ||
502 | PINMUX_DATA(CPORT13_MARK, PORT14_FN1), | ||
503 | PINMUX_DATA(RFSPO4_MARK, PORT14_FN2), | ||
504 | PINMUX_DATA(CPORT14_MARK, PORT15_FN1), | ||
505 | PINMUX_DATA(RFSPO5_MARK, PORT15_FN2), | ||
506 | PINMUX_DATA(CPORT15_MARK, PORT16_FN1), | ||
507 | PINMUX_DATA(CPORT16_MARK, PORT17_FN1), | ||
508 | PINMUX_DATA(CPORT17_MARK, PORT18_FN1), | ||
509 | PINMUX_DATA(SOUT2_MARK, PORT18_FN2), | ||
510 | PINMUX_DATA(CPORT18_MARK, PORT19_FN1), | ||
511 | PINMUX_DATA(XRTS2_MARK, PORT19_FN1), | ||
512 | PINMUX_DATA(CPORT19_MARK, PORT20_FN1), | ||
513 | PINMUX_DATA(CPORT20_MARK, PORT21_FN1), | ||
514 | PINMUX_DATA(RFSPO6_MARK, PORT21_FN2), | ||
515 | PINMUX_DATA(CPORT21_MARK, PORT22_FN1), | ||
516 | PINMUX_DATA(STATUS0_MARK, PORT22_FN2), | ||
517 | PINMUX_DATA(CPORT22_MARK, PORT23_FN1), | ||
518 | PINMUX_DATA(STATUS1_MARK, PORT23_FN2), | ||
519 | PINMUX_DATA(CPORT23_MARK, PORT24_FN1), | ||
520 | PINMUX_DATA(STATUS2_MARK, PORT24_FN2), | ||
521 | PINMUX_DATA(RFSPO7_MARK, PORT24_FN3), | ||
522 | PINMUX_DATA(MPORT0_MARK, PORT25_FN1), | ||
523 | PINMUX_DATA(MPORT1_MARK, PORT26_FN1), | ||
524 | PINMUX_DATA(B_SYNLD1_MARK, PORT27_FN1), | ||
525 | PINMUX_DATA(B_SYNLD2_MARK, PORT28_FN1), | ||
526 | PINMUX_DATA(XMAINPS_MARK, PORT29_FN1), | ||
527 | PINMUX_DATA(XDIVPS_MARK, PORT30_FN1), | ||
528 | PINMUX_DATA(XIDRST_MARK, PORT31_FN1), | ||
529 | PINMUX_DATA(IDCLK_MARK, PORT32_FN1), | ||
530 | PINMUX_DATA(IDIO_MARK, PORT33_FN1), | ||
531 | PINMUX_DATA(SOUT1_MARK, PORT34_FN1), | ||
532 | PINMUX_DATA(SCIFA4_TXD_MARK, PORT34_FN2), | ||
533 | PINMUX_DATA(M02_BERDAT_MARK, PORT34_FN3), | ||
534 | PINMUX_DATA(SIN1_MARK, PORT35_FN1), | ||
535 | PINMUX_DATA(SCIFA4_RXD_MARK, PORT35_FN2), | ||
536 | PINMUX_DATA(XWUP_MARK, PORT35_FN3), | ||
537 | PINMUX_DATA(XRTS1_MARK, PORT36_FN1), | ||
538 | PINMUX_DATA(SCIFA4_RTS_MARK, PORT36_FN2), | ||
539 | PINMUX_DATA(M03_BERCLK_MARK, PORT36_FN3), | ||
540 | PINMUX_DATA(XCTS1_MARK, PORT37_FN1), | ||
541 | PINMUX_DATA(SCIFA4_CTS_MARK, PORT37_FN2), | ||
542 | |||
543 | /* 49-2 (FN) */ | ||
544 | PINMUX_DATA(HSU_IQ_AGC6_MARK, PORT38_FN1), | ||
545 | PINMUX_DATA(MFG2_IN2_MARK, PORT38_FN2), | ||
546 | PINMUX_DATA(MSIOF2_MCK0_MARK, PORT38_FN3), | ||
547 | PINMUX_DATA(HSU_IQ_AGC5_MARK, PORT39_FN1), | ||
548 | PINMUX_DATA(MFG2_IN1_MARK, PORT39_FN2), | ||
549 | PINMUX_DATA(MSIOF2_MCK1_MARK, PORT39_FN3), | ||
550 | PINMUX_DATA(HSU_IQ_AGC4_MARK, PORT40_FN1), | ||
551 | PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT40_FN3), | ||
552 | PINMUX_DATA(HSU_IQ_AGC3_MARK, PORT41_FN1), | ||
553 | PINMUX_DATA(MFG2_OUT1_MARK, PORT41_FN2), | ||
554 | PINMUX_DATA(MSIOF2_RSCK_MARK, PORT41_FN3), | ||
555 | PINMUX_DATA(HSU_IQ_AGC2_MARK, PORT42_FN1), | ||
556 | PINMUX_DATA(PORT42_KEYOUT0_MARK, MSELBCR_MSEL2_1, PORT42_FN2), | ||
557 | PINMUX_DATA(HSU_IQ_AGC1_MARK, PORT43_FN1), | ||
558 | PINMUX_DATA(PORT43_KEYOUT1_MARK, MSELBCR_MSEL2_1, PORT43_FN2), | ||
559 | PINMUX_DATA(HSU_IQ_AGC0_MARK, PORT44_FN1), | ||
560 | PINMUX_DATA(PORT44_KEYOUT2_MARK, MSELBCR_MSEL2_1, PORT44_FN2), | ||
561 | PINMUX_DATA(HSU_IQ_AGC_ST_MARK, PORT45_FN1), | ||
562 | PINMUX_DATA(PORT45_KEYOUT3_MARK, MSELBCR_MSEL2_1, PORT45_FN2), | ||
563 | PINMUX_DATA(HSU_IQ_PDO_MARK, PORT46_FN1), | ||
564 | PINMUX_DATA(PORT46_KEYOUT4_MARK, MSELBCR_MSEL2_1, PORT46_FN2), | ||
565 | PINMUX_DATA(HSU_IQ_PYO_MARK, PORT47_FN1), | ||
566 | PINMUX_DATA(PORT47_KEYOUT5_MARK, MSELBCR_MSEL2_1, PORT47_FN2), | ||
567 | PINMUX_DATA(HSU_EN_TXMUX_G3MO_MARK, PORT48_FN1), | ||
568 | PINMUX_DATA(PORT48_KEYIN0_MARK, MSELBCR_MSEL2_1, PORT48_FN2), | ||
569 | PINMUX_DATA(HSU_I_TXMUX_G3MO_MARK, PORT49_FN1), | ||
570 | PINMUX_DATA(PORT49_KEYIN1_MARK, MSELBCR_MSEL2_1, PORT49_FN2), | ||
571 | PINMUX_DATA(HSU_Q_TXMUX_G3MO_MARK, PORT50_FN1), | ||
572 | PINMUX_DATA(PORT50_KEYIN2_MARK, MSELBCR_MSEL2_1, PORT50_FN2), | ||
573 | PINMUX_DATA(HSU_SYO_MARK, PORT51_FN1), | ||
574 | PINMUX_DATA(PORT51_MSIOF2_TSYNC_MARK, PORT51_FN2), | ||
575 | PINMUX_DATA(HSU_SDO_MARK, PORT52_FN1), | ||
576 | PINMUX_DATA(PORT52_MSIOF2_TSCK_MARK, PORT52_FN2), | ||
577 | PINMUX_DATA(HSU_TGTTI_G3MO_MARK, PORT53_FN1), | ||
578 | PINMUX_DATA(PORT53_MSIOF2_TXD_MARK, PORT53_FN2), | ||
579 | PINMUX_DATA(B_TIME_STAMP_MARK, PORT54_FN1), | ||
580 | PINMUX_DATA(PORT54_MSIOF2_RXD_MARK, PORT54_FN2), | ||
581 | PINMUX_DATA(HSU_SDI_MARK, PORT55_FN1), | ||
582 | PINMUX_DATA(PORT55_KEYIN3_MARK, MSELBCR_MSEL2_1, PORT55_FN2), | ||
583 | PINMUX_DATA(HSU_SCO_MARK, PORT56_FN1), | ||
584 | PINMUX_DATA(PORT56_KEYIN4_MARK, MSELBCR_MSEL2_1, PORT56_FN2), | ||
585 | PINMUX_DATA(HSU_DREQ_MARK, PORT57_FN1), | ||
586 | PINMUX_DATA(PORT57_KEYIN5_MARK, MSELBCR_MSEL2_1, PORT57_FN2), | ||
587 | PINMUX_DATA(HSU_DACK_MARK, PORT58_FN1), | ||
588 | PINMUX_DATA(PORT58_KEYIN6_MARK, MSELBCR_MSEL2_1, PORT58_FN2), | ||
589 | PINMUX_DATA(HSU_CLK61M_MARK, PORT59_FN1), | ||
590 | PINMUX_DATA(PORT59_MSIOF2_SS1_MARK, PORT59_FN2), | ||
591 | PINMUX_DATA(HSU_XRST_MARK, PORT60_FN1), | ||
592 | PINMUX_DATA(PORT60_MSIOF2_SS2_MARK, PORT60_FN2), | ||
593 | PINMUX_DATA(PCMCLKO_MARK, PORT61_FN1), | ||
594 | PINMUX_DATA(SYNC8KO_MARK, PORT62_FN1), | ||
595 | PINMUX_DATA(DNPCM_A_MARK, PORT63_FN1), | ||
596 | PINMUX_DATA(UPPCM_A_MARK, PORT64_FN1), | ||
597 | PINMUX_DATA(XTALB1L_MARK, PORT65_FN1), | ||
598 | PINMUX_DATA(GPS_AGC1_MARK, PORT66_FN1), | ||
599 | PINMUX_DATA(SCIFA0_RTS_MARK, PORT66_FN2), | ||
600 | PINMUX_DATA(GPS_AGC2_MARK, PORT67_FN1), | ||
601 | PINMUX_DATA(SCIFA0_SCK_MARK, PORT67_FN2), | ||
602 | PINMUX_DATA(GPS_AGC3_MARK, PORT68_FN1), | ||
603 | PINMUX_DATA(SCIFA0_TXD_MARK, PORT68_FN2), | ||
604 | PINMUX_DATA(GPS_AGC4_MARK, PORT69_FN1), | ||
605 | PINMUX_DATA(SCIFA0_RXD_MARK, PORT69_FN2), | ||
606 | PINMUX_DATA(GPS_PWRD_MARK, PORT70_FN1), | ||
607 | PINMUX_DATA(SCIFA0_CTS_MARK, PORT70_FN2), | ||
608 | PINMUX_DATA(GPS_IM_MARK, PORT71_FN1), | ||
609 | PINMUX_DATA(GPS_IS_MARK, PORT72_FN1), | ||
610 | PINMUX_DATA(GPS_QM_MARK, PORT73_FN1), | ||
611 | PINMUX_DATA(GPS_QS_MARK, PORT74_FN1), | ||
612 | PINMUX_DATA(SIUBOMC_MARK, PORT75_FN1), | ||
613 | PINMUX_DATA(TPU2TO0_MARK, PORT75_FN3), | ||
614 | PINMUX_DATA(SIUCKB_MARK, PORT76_FN1), | ||
615 | PINMUX_DATA(TPU2TO1_MARK, PORT76_FN3), | ||
616 | PINMUX_DATA(SIUBOLR_MARK, PORT77_FN1), | ||
617 | PINMUX_DATA(BBIF2_TSYNC_MARK, PORT77_FN2), | ||
618 | PINMUX_DATA(TPU2TO2_MARK, PORT77_FN3), | ||
619 | PINMUX_DATA(SIUBOBT_MARK, PORT78_FN1), | ||
620 | PINMUX_DATA(BBIF2_TSCK_MARK, PORT78_FN2), | ||
621 | PINMUX_DATA(TPU2TO3_MARK, PORT78_FN3), | ||
622 | PINMUX_DATA(SIUBOSLD_MARK, PORT79_FN1), | ||
623 | PINMUX_DATA(BBIF2_TXD_MARK, PORT79_FN2), | ||
624 | PINMUX_DATA(TPU3TO0_MARK, PORT79_FN3), | ||
625 | PINMUX_DATA(SIUBILR_MARK, PORT80_FN1), | ||
626 | PINMUX_DATA(TPU3TO1_MARK, PORT80_FN3), | ||
627 | PINMUX_DATA(SIUBIBT_MARK, PORT81_FN1), | ||
628 | PINMUX_DATA(TPU3TO2_MARK, PORT81_FN3), | ||
629 | PINMUX_DATA(SIUBISLD_MARK, PORT82_FN1), | ||
630 | PINMUX_DATA(TPU3TO3_MARK, PORT82_FN3), | ||
631 | PINMUX_DATA(NMI_MARK, PORT83_FN1), | ||
632 | PINMUX_DATA(TPU4TO0_MARK, PORT83_FN3), | ||
633 | PINMUX_DATA(DNPCM_M_MARK, PORT84_FN1), | ||
634 | PINMUX_DATA(TPU4TO1_MARK, PORT84_FN3), | ||
635 | PINMUX_DATA(TPU4TO2_MARK, PORT85_FN3), | ||
636 | PINMUX_DATA(TPU4TO3_MARK, PORT86_FN3), | ||
637 | PINMUX_DATA(IRQ_TMPB_MARK, PORT87_FN1), | ||
638 | PINMUX_DATA(PWEN_MARK, PORT88_FN1), | ||
639 | PINMUX_DATA(MFG1_OUT1_MARK, PORT88_FN2), | ||
640 | PINMUX_DATA(OVCN_MARK, PORT89_FN1), | ||
641 | PINMUX_DATA(MFG1_IN1_MARK, PORT89_FN2), | ||
642 | PINMUX_DATA(OVCN2_MARK, PORT90_FN1), | ||
643 | PINMUX_DATA(MFG1_IN2_MARK, PORT90_FN2), | ||
644 | |||
645 | /* 49-3 (FN) */ | ||
646 | PINMUX_DATA(RFSPO1_MARK, PORT91_FN1), | ||
647 | PINMUX_DATA(RFSPO2_MARK, PORT92_FN1), | ||
648 | PINMUX_DATA(RFSPO3_MARK, PORT93_FN1), | ||
649 | PINMUX_DATA(PORT93_VIO_CKO2_MARK, PORT93_FN2), | ||
650 | PINMUX_DATA(USBTERM_MARK, PORT94_FN1), | ||
651 | PINMUX_DATA(EXTLP_MARK, PORT94_FN2), | ||
652 | PINMUX_DATA(IDIN_MARK, PORT95_FN1), | ||
653 | PINMUX_DATA(SCIFA5_CTS_MARK, PORT96_FN1), | ||
654 | PINMUX_DATA(MFG0_IN1_MARK, PORT96_FN2), | ||
655 | PINMUX_DATA(SCIFA5_RTS_MARK, PORT97_FN1), | ||
656 | PINMUX_DATA(MFG0_IN2_MARK, PORT97_FN2), | ||
657 | PINMUX_DATA(SCIFA5_RXD_MARK, PORT98_FN1), | ||
658 | PINMUX_DATA(SCIFA5_TXD_MARK, PORT99_FN1), | ||
659 | PINMUX_DATA(SCIFA5_SCK_MARK, PORT100_FN1), | ||
660 | PINMUX_DATA(MFG0_OUT1_MARK, PORT100_FN2), | ||
661 | PINMUX_DATA(A0_EA0_MARK, PORT101_FN1), | ||
662 | PINMUX_DATA(BS_MARK, PORT101_FN2), | ||
663 | PINMUX_DATA(A14_EA14_MARK, PORT102_FN1), | ||
664 | PINMUX_DATA(PORT102_KEYOUT0_MARK, MSELBCR_MSEL2_0, PORT102_FN2), | ||
665 | PINMUX_DATA(A15_EA15_MARK, PORT103_FN1), | ||
666 | PINMUX_DATA(PORT103_KEYOUT1_MARK, MSELBCR_MSEL2_0, PORT103_FN2), | ||
667 | PINMUX_DATA(DV_CLKOL_MARK, PORT103_FN3), | ||
668 | PINMUX_DATA(A16_EA16_MARK, PORT104_FN1), | ||
669 | PINMUX_DATA(PORT104_KEYOUT2_MARK, MSELBCR_MSEL2_0, PORT104_FN2), | ||
670 | PINMUX_DATA(DV_VSYNCL_MARK, PORT104_FN3), | ||
671 | PINMUX_DATA(MSIOF0_SS1_MARK, PORT104_FN4), | ||
672 | PINMUX_DATA(A17_EA17_MARK, PORT105_FN1), | ||
673 | PINMUX_DATA(PORT105_KEYOUT3_MARK, MSELBCR_MSEL2_0, PORT105_FN2), | ||
674 | PINMUX_DATA(DV_HSYNCL_MARK, PORT105_FN3), | ||
675 | PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT105_FN4), | ||
676 | PINMUX_DATA(A18_EA18_MARK, PORT106_FN1), | ||
677 | PINMUX_DATA(PORT106_KEYOUT4_MARK, MSELBCR_MSEL2_0, PORT106_FN2), | ||
678 | PINMUX_DATA(DV_DL0_MARK, PORT106_FN3), | ||
679 | PINMUX_DATA(MSIOF0_TSCK_MARK, PORT106_FN4), | ||
680 | PINMUX_DATA(A19_EA19_MARK, PORT107_FN1), | ||
681 | PINMUX_DATA(PORT107_KEYOUT5_MARK, MSELBCR_MSEL2_0, PORT107_FN2), | ||
682 | PINMUX_DATA(DV_DL1_MARK, PORT107_FN3), | ||
683 | PINMUX_DATA(MSIOF0_TXD_MARK, PORT107_FN4), | ||
684 | PINMUX_DATA(A20_EA20_MARK, PORT108_FN1), | ||
685 | PINMUX_DATA(PORT108_KEYIN0_MARK, MSELBCR_MSEL2_0, PORT108_FN2), | ||
686 | PINMUX_DATA(DV_DL2_MARK, PORT108_FN3), | ||
687 | PINMUX_DATA(MSIOF0_RSCK_MARK, PORT108_FN4), | ||
688 | PINMUX_DATA(A21_EA21_MARK, PORT109_FN1), | ||
689 | PINMUX_DATA(PORT109_KEYIN1_MARK, MSELBCR_MSEL2_0, PORT109_FN2), | ||
690 | PINMUX_DATA(DV_DL3_MARK, PORT109_FN3), | ||
691 | PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT109_FN4), | ||
692 | PINMUX_DATA(A22_EA22_MARK, PORT110_FN1), | ||
693 | PINMUX_DATA(PORT110_KEYIN2_MARK, MSELBCR_MSEL2_0, PORT110_FN2), | ||
694 | PINMUX_DATA(DV_DL4_MARK, PORT110_FN3), | ||
695 | PINMUX_DATA(MSIOF0_MCK0_MARK, PORT110_FN4), | ||
696 | PINMUX_DATA(A23_EA23_MARK, PORT111_FN1), | ||
697 | PINMUX_DATA(PORT111_KEYIN3_MARK, MSELBCR_MSEL2_0, PORT111_FN2), | ||
698 | PINMUX_DATA(DV_DL5_MARK, PORT111_FN3), | ||
699 | PINMUX_DATA(MSIOF0_MCK1_MARK, PORT111_FN4), | ||
700 | PINMUX_DATA(A24_EA24_MARK, PORT112_FN1), | ||
701 | PINMUX_DATA(PORT112_KEYIN4_MARK, MSELBCR_MSEL2_0, PORT112_FN2), | ||
702 | PINMUX_DATA(DV_DL6_MARK, PORT112_FN3), | ||
703 | PINMUX_DATA(MSIOF0_RXD_MARK, PORT112_FN4), | ||
704 | PINMUX_DATA(A25_EA25_MARK, PORT113_FN1), | ||
705 | PINMUX_DATA(PORT113_KEYIN5_MARK, MSELBCR_MSEL2_0, PORT113_FN2), | ||
706 | PINMUX_DATA(DV_DL7_MARK, PORT113_FN3), | ||
707 | PINMUX_DATA(MSIOF0_SS2_MARK, PORT113_FN4), | ||
708 | PINMUX_DATA(A26_MARK, PORT114_FN1), | ||
709 | PINMUX_DATA(PORT113_KEYIN6_MARK, MSELBCR_MSEL2_0, PORT114_FN2), | ||
710 | PINMUX_DATA(DV_CLKIL_MARK, PORT114_FN3), | ||
711 | PINMUX_DATA(D0_ED0_NAF0_MARK, PORT115_FN1), | ||
712 | PINMUX_DATA(D1_ED1_NAF1_MARK, PORT116_FN1), | ||
713 | PINMUX_DATA(D2_ED2_NAF2_MARK, PORT117_FN1), | ||
714 | PINMUX_DATA(D3_ED3_NAF3_MARK, PORT118_FN1), | ||
715 | PINMUX_DATA(D4_ED4_NAF4_MARK, PORT119_FN1), | ||
716 | PINMUX_DATA(D5_ED5_NAF5_MARK, PORT120_FN1), | ||
717 | PINMUX_DATA(D6_ED6_NAF6_MARK, PORT121_FN1), | ||
718 | PINMUX_DATA(D7_ED7_NAF7_MARK, PORT122_FN1), | ||
719 | PINMUX_DATA(D8_ED8_NAF8_MARK, PORT123_FN1), | ||
720 | PINMUX_DATA(D9_ED9_NAF9_MARK, PORT124_FN1), | ||
721 | PINMUX_DATA(D10_ED10_NAF10_MARK, PORT125_FN1), | ||
722 | PINMUX_DATA(D11_ED11_NAF11_MARK, PORT126_FN1), | ||
723 | PINMUX_DATA(D12_ED12_NAF12_MARK, PORT127_FN1), | ||
724 | PINMUX_DATA(D13_ED13_NAF13_MARK, PORT128_FN1), | ||
725 | PINMUX_DATA(D14_ED14_NAF14_MARK, PORT129_FN1), | ||
726 | PINMUX_DATA(D15_ED15_NAF15_MARK, PORT130_FN1), | ||
727 | PINMUX_DATA(CS4_MARK, PORT131_FN1), | ||
728 | PINMUX_DATA(CS5A_MARK, PORT132_FN1), | ||
729 | PINMUX_DATA(CS5B_MARK, PORT133_FN1), | ||
730 | PINMUX_DATA(FCE1_MARK, PORT133_FN2), | ||
731 | PINMUX_DATA(CS6B_MARK, PORT134_FN1), | ||
732 | PINMUX_DATA(XCS2_MARK, PORT134_FN2), | ||
733 | PINMUX_DATA(FCE0_MARK, PORT135_FN1), | ||
734 | PINMUX_DATA(CS6A_MARK, PORT136_FN1), | ||
735 | PINMUX_DATA(DACK0_MARK, PORT136_FN2), | ||
736 | PINMUX_DATA(WAIT_MARK, PORT137_FN1), | ||
737 | PINMUX_DATA(DREQ0_MARK, PORT137_FN2), | ||
738 | PINMUX_DATA(RD_XRD_MARK, PORT138_FN1), | ||
739 | PINMUX_DATA(A27_MARK, PORT139_FN1), | ||
740 | PINMUX_DATA(RDWR_XWE_MARK, PORT139_FN2), | ||
741 | PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT140_FN1), | ||
742 | PINMUX_DATA(WE1_XWR1_MARK, PORT141_FN1), | ||
743 | PINMUX_DATA(FRB_MARK, PORT142_FN1), | ||
744 | PINMUX_DATA(CKO_MARK, PORT143_FN1), | ||
745 | PINMUX_DATA(NBRSTOUT_MARK, PORT144_FN1), | ||
746 | PINMUX_DATA(NBRST_MARK, PORT145_FN1), | ||
747 | |||
748 | /* 49-4 (FN) */ | ||
749 | PINMUX_DATA(RFSPO0_MARK, PORT146_FN1), | ||
750 | PINMUX_DATA(PORT146_VIO_CKO2_MARK, PORT146_FN2), | ||
751 | PINMUX_DATA(TSTMD_MARK, PORT147_FN1), | ||
752 | PINMUX_DATA(VIO_VD_MARK, PORT148_FN1), | ||
753 | PINMUX_DATA(VIO_HD_MARK, PORT149_FN1), | ||
754 | PINMUX_DATA(VIO_D0_MARK, PORT150_FN1), | ||
755 | PINMUX_DATA(VIO_D1_MARK, PORT151_FN1), | ||
756 | PINMUX_DATA(VIO_D2_MARK, PORT152_FN1), | ||
757 | PINMUX_DATA(VIO_D3_MARK, PORT153_FN1), | ||
758 | PINMUX_DATA(VIO_D4_MARK, PORT154_FN1), | ||
759 | PINMUX_DATA(VIO_D5_MARK, PORT155_FN1), | ||
760 | PINMUX_DATA(VIO_D6_MARK, PORT156_FN1), | ||
761 | PINMUX_DATA(VIO_D7_MARK, PORT157_FN1), | ||
762 | PINMUX_DATA(VIO_D8_MARK, PORT158_FN1), | ||
763 | PINMUX_DATA(VIO_D9_MARK, PORT159_FN1), | ||
764 | PINMUX_DATA(VIO_D10_MARK, PORT160_FN1), | ||
765 | PINMUX_DATA(VIO_D11_MARK, PORT161_FN1), | ||
766 | PINMUX_DATA(VIO_D12_MARK, PORT162_FN1), | ||
767 | PINMUX_DATA(VIO_D13_MARK, PORT163_FN1), | ||
768 | PINMUX_DATA(VIO_D14_MARK, PORT164_FN1), | ||
769 | PINMUX_DATA(VIO_D15_MARK, PORT165_FN1), | ||
770 | PINMUX_DATA(VIO_CLK_MARK, PORT166_FN1), | ||
771 | PINMUX_DATA(VIO_FIELD_MARK, PORT167_FN1), | ||
772 | PINMUX_DATA(VIO_CKO_MARK, PORT168_FN1), | ||
773 | PINMUX_DATA(MFG3_IN1_MARK, PORT169_FN2), | ||
774 | PINMUX_DATA(MFG3_IN2_MARK, PORT170_FN2), | ||
775 | PINMUX_DATA(M9_SLCD_A01_MARK, PORT171_FN1), | ||
776 | PINMUX_DATA(MFG3_OUT1_MARK, PORT171_FN2), | ||
777 | PINMUX_DATA(TPU0TO0_MARK, PORT171_FN3), | ||
778 | PINMUX_DATA(M10_SLCD_CK1_MARK, PORT172_FN1), | ||
779 | PINMUX_DATA(MFG4_IN1_MARK, PORT172_FN2), | ||
780 | PINMUX_DATA(TPU0TO1_MARK, PORT172_FN3), | ||
781 | PINMUX_DATA(M11_SLCD_SO1_MARK, PORT173_FN1), | ||
782 | PINMUX_DATA(MFG4_IN2_MARK, PORT173_FN2), | ||
783 | PINMUX_DATA(TPU0TO2_MARK, PORT173_FN3), | ||
784 | PINMUX_DATA(M12_SLCD_CE1_MARK, PORT174_FN1), | ||
785 | PINMUX_DATA(MFG4_OUT1_MARK, PORT174_FN2), | ||
786 | PINMUX_DATA(TPU0TO3_MARK, PORT174_FN3), | ||
787 | PINMUX_DATA(LCDD0_MARK, PORT175_FN1), | ||
788 | PINMUX_DATA(PORT175_KEYOUT0_MARK, PORT175_FN2), | ||
789 | PINMUX_DATA(DV_D0_MARK, PORT175_FN3), | ||
790 | PINMUX_DATA(SIUCKA_MARK, PORT175_FN4), | ||
791 | PINMUX_DATA(MFG0_OUT2_MARK, PORT175_FN5), | ||
792 | PINMUX_DATA(LCDD1_MARK, PORT176_FN1), | ||
793 | PINMUX_DATA(PORT176_KEYOUT1_MARK, PORT176_FN2), | ||
794 | PINMUX_DATA(DV_D1_MARK, PORT176_FN3), | ||
795 | PINMUX_DATA(SIUAOLR_MARK, PORT176_FN4), | ||
796 | PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT176_FN5), | ||
797 | PINMUX_DATA(LCDD2_MARK, PORT177_FN1), | ||
798 | PINMUX_DATA(PORT177_KEYOUT2_MARK, PORT177_FN2), | ||
799 | PINMUX_DATA(DV_D2_MARK, PORT177_FN3), | ||
800 | PINMUX_DATA(SIUAOBT_MARK, PORT177_FN4), | ||
801 | PINMUX_DATA(BBIF2_TSCK1_MARK, PORT177_FN5), | ||
802 | PINMUX_DATA(LCDD3_MARK, PORT178_FN1), | ||
803 | PINMUX_DATA(PORT178_KEYOUT3_MARK, PORT178_FN2), | ||
804 | PINMUX_DATA(DV_D3_MARK, PORT178_FN3), | ||
805 | PINMUX_DATA(SIUAOSLD_MARK, PORT178_FN4), | ||
806 | PINMUX_DATA(BBIF2_TXD1_MARK, PORT178_FN5), | ||
807 | PINMUX_DATA(LCDD4_MARK, PORT179_FN1), | ||
808 | PINMUX_DATA(PORT179_KEYOUT4_MARK, PORT179_FN2), | ||
809 | PINMUX_DATA(DV_D4_MARK, PORT179_FN3), | ||
810 | PINMUX_DATA(SIUAISPD_MARK, PORT179_FN4), | ||
811 | PINMUX_DATA(MFG1_OUT2_MARK, PORT179_FN5), | ||
812 | PINMUX_DATA(LCDD5_MARK, PORT180_FN1), | ||
813 | PINMUX_DATA(PORT180_KEYOUT5_MARK, PORT180_FN2), | ||
814 | PINMUX_DATA(DV_D5_MARK, PORT180_FN3), | ||
815 | PINMUX_DATA(SIUAILR_MARK, PORT180_FN4), | ||
816 | PINMUX_DATA(MFG2_OUT2_MARK, PORT180_FN5), | ||
817 | PINMUX_DATA(LCDD6_MARK, PORT181_FN1), | ||
818 | PINMUX_DATA(DV_D6_MARK, PORT181_FN3), | ||
819 | PINMUX_DATA(SIUAIBT_MARK, PORT181_FN4), | ||
820 | PINMUX_DATA(MFG3_OUT2_MARK, PORT181_FN5), | ||
821 | PINMUX_DATA(XWR2_MARK, PORT181_FN7), | ||
822 | PINMUX_DATA(LCDD7_MARK, PORT182_FN1), | ||
823 | PINMUX_DATA(DV_D7_MARK, PORT182_FN3), | ||
824 | PINMUX_DATA(SIUAISLD_MARK, PORT182_FN4), | ||
825 | PINMUX_DATA(MFG4_OUT2_MARK, PORT182_FN5), | ||
826 | PINMUX_DATA(XWR3_MARK, PORT182_FN7), | ||
827 | PINMUX_DATA(LCDD8_MARK, PORT183_FN1), | ||
828 | PINMUX_DATA(DV_D8_MARK, PORT183_FN3), | ||
829 | PINMUX_DATA(D16_MARK, PORT183_FN6), | ||
830 | PINMUX_DATA(ED16_MARK, PORT183_FN7), | ||
831 | PINMUX_DATA(LCDD9_MARK, PORT184_FN1), | ||
832 | PINMUX_DATA(DV_D9_MARK, PORT184_FN3), | ||
833 | PINMUX_DATA(D17_MARK, PORT184_FN6), | ||
834 | PINMUX_DATA(ED17_MARK, PORT184_FN7), | ||
835 | PINMUX_DATA(LCDD10_MARK, PORT185_FN1), | ||
836 | PINMUX_DATA(DV_D10_MARK, PORT185_FN3), | ||
837 | PINMUX_DATA(D18_MARK, PORT185_FN6), | ||
838 | PINMUX_DATA(ED18_MARK, PORT185_FN7), | ||
839 | PINMUX_DATA(LCDD11_MARK, PORT186_FN1), | ||
840 | PINMUX_DATA(DV_D11_MARK, PORT186_FN3), | ||
841 | PINMUX_DATA(D19_MARK, PORT186_FN6), | ||
842 | PINMUX_DATA(ED19_MARK, PORT186_FN7), | ||
843 | PINMUX_DATA(LCDD12_MARK, PORT187_FN1), | ||
844 | PINMUX_DATA(DV_D12_MARK, PORT187_FN3), | ||
845 | PINMUX_DATA(D20_MARK, PORT187_FN6), | ||
846 | PINMUX_DATA(ED20_MARK, PORT187_FN7), | ||
847 | PINMUX_DATA(LCDD13_MARK, PORT188_FN1), | ||
848 | PINMUX_DATA(DV_D13_MARK, PORT188_FN3), | ||
849 | PINMUX_DATA(D21_MARK, PORT188_FN6), | ||
850 | PINMUX_DATA(ED21_MARK, PORT188_FN7), | ||
851 | PINMUX_DATA(LCDD14_MARK, PORT189_FN1), | ||
852 | PINMUX_DATA(DV_D14_MARK, PORT189_FN3), | ||
853 | PINMUX_DATA(D22_MARK, PORT189_FN6), | ||
854 | PINMUX_DATA(ED22_MARK, PORT189_FN7), | ||
855 | PINMUX_DATA(LCDD15_MARK, PORT190_FN1), | ||
856 | PINMUX_DATA(DV_D15_MARK, PORT190_FN3), | ||
857 | PINMUX_DATA(D23_MARK, PORT190_FN6), | ||
858 | PINMUX_DATA(ED23_MARK, PORT190_FN7), | ||
859 | PINMUX_DATA(LCDD16_MARK, PORT191_FN1), | ||
860 | PINMUX_DATA(DV_HSYNC_MARK, PORT191_FN3), | ||
861 | PINMUX_DATA(D24_MARK, PORT191_FN6), | ||
862 | PINMUX_DATA(ED24_MARK, PORT191_FN7), | ||
863 | PINMUX_DATA(LCDD17_MARK, PORT192_FN1), | ||
864 | PINMUX_DATA(DV_VSYNC_MARK, PORT192_FN3), | ||
865 | PINMUX_DATA(D25_MARK, PORT192_FN6), | ||
866 | PINMUX_DATA(ED25_MARK, PORT192_FN7), | ||
867 | PINMUX_DATA(LCDD18_MARK, PORT193_FN1), | ||
868 | PINMUX_DATA(DREQ2_MARK, PORT193_FN2), | ||
869 | PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT193_FN5), | ||
870 | PINMUX_DATA(D26_MARK, PORT193_FN6), | ||
871 | PINMUX_DATA(ED26_MARK, PORT193_FN7), | ||
872 | PINMUX_DATA(LCDD19_MARK, PORT194_FN1), | ||
873 | PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT194_FN5), | ||
874 | PINMUX_DATA(D27_MARK, PORT194_FN6), | ||
875 | PINMUX_DATA(ED27_MARK, PORT194_FN7), | ||
876 | PINMUX_DATA(LCDD20_MARK, PORT195_FN1), | ||
877 | PINMUX_DATA(TS_SPSYNC1_MARK, PORT195_FN2), | ||
878 | PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT195_FN5), | ||
879 | PINMUX_DATA(D28_MARK, PORT195_FN6), | ||
880 | PINMUX_DATA(ED28_MARK, PORT195_FN7), | ||
881 | PINMUX_DATA(LCDD21_MARK, PORT196_FN1), | ||
882 | PINMUX_DATA(TS_SDAT1_MARK, PORT196_FN2), | ||
883 | PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT196_FN5), | ||
884 | PINMUX_DATA(D29_MARK, PORT196_FN6), | ||
885 | PINMUX_DATA(ED29_MARK, PORT196_FN7), | ||
886 | PINMUX_DATA(LCDD22_MARK, PORT197_FN1), | ||
887 | PINMUX_DATA(TS_SDEN1_MARK, PORT197_FN2), | ||
888 | PINMUX_DATA(MSIOF0L_SS1_MARK, PORT197_FN5), | ||
889 | PINMUX_DATA(D30_MARK, PORT197_FN6), | ||
890 | PINMUX_DATA(ED30_MARK, PORT197_FN7), | ||
891 | PINMUX_DATA(LCDD23_MARK, PORT198_FN1), | ||
892 | PINMUX_DATA(TS_SCK1_MARK, PORT198_FN2), | ||
893 | PINMUX_DATA(MSIOF0L_SS2_MARK, PORT198_FN5), | ||
894 | PINMUX_DATA(D31_MARK, PORT198_FN6), | ||
895 | PINMUX_DATA(ED31_MARK, PORT198_FN7), | ||
896 | PINMUX_DATA(LCDDCK_MARK, PORT199_FN1), | ||
897 | PINMUX_DATA(LCDWR_MARK, PORT199_FN2), | ||
898 | PINMUX_DATA(DV_CKO_MARK, PORT199_FN3), | ||
899 | PINMUX_DATA(SIUAOSPD_MARK, PORT199_FN4), | ||
900 | PINMUX_DATA(LCDRD_MARK, PORT200_FN1), | ||
901 | PINMUX_DATA(DACK2_MARK, PORT200_FN2), | ||
902 | PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT200_FN5), | ||
903 | |||
904 | /* 49-5 (FN) */ | ||
905 | PINMUX_DATA(LCDHSYN_MARK, PORT201_FN1), | ||
906 | PINMUX_DATA(LCDCS_MARK, PORT201_FN2), | ||
907 | PINMUX_DATA(LCDCS2_MARK, PORT201_FN3), | ||
908 | PINMUX_DATA(DACK3_MARK, PORT201_FN4), | ||
909 | PINMUX_DATA(LCDDISP_MARK, PORT202_FN1), | ||
910 | PINMUX_DATA(LCDRS_MARK, PORT202_FN2), | ||
911 | PINMUX_DATA(DREQ3_MARK, PORT202_FN4), | ||
912 | PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT202_FN5), | ||
913 | PINMUX_DATA(LCDCSYN_MARK, PORT203_FN1), | ||
914 | PINMUX_DATA(LCDCSYN2_MARK, PORT203_FN2), | ||
915 | PINMUX_DATA(DV_CKI_MARK, PORT203_FN3), | ||
916 | PINMUX_DATA(LCDLCLK_MARK, PORT204_FN1), | ||
917 | PINMUX_DATA(DREQ1_MARK, PORT204_FN3), | ||
918 | PINMUX_DATA(MSIOF0L_RXD_MARK, PORT204_FN5), | ||
919 | PINMUX_DATA(LCDDON_MARK, PORT205_FN1), | ||
920 | PINMUX_DATA(LCDDON2_MARK, PORT205_FN2), | ||
921 | PINMUX_DATA(DACK1_MARK, PORT205_FN3), | ||
922 | PINMUX_DATA(MSIOF0L_TXD_MARK, PORT205_FN5), | ||
923 | PINMUX_DATA(VIO_DR0_MARK, PORT206_FN1), | ||
924 | PINMUX_DATA(VIO_DR1_MARK, PORT207_FN1), | ||
925 | PINMUX_DATA(VIO_DR2_MARK, PORT208_FN1), | ||
926 | PINMUX_DATA(VIO_DR3_MARK, PORT209_FN1), | ||
927 | PINMUX_DATA(VIO_DR4_MARK, PORT210_FN1), | ||
928 | PINMUX_DATA(VIO_DR5_MARK, PORT211_FN1), | ||
929 | PINMUX_DATA(VIO_DR6_MARK, PORT212_FN1), | ||
930 | PINMUX_DATA(VIO_DR7_MARK, PORT213_FN1), | ||
931 | PINMUX_DATA(VIO_VDR_MARK, PORT214_FN1), | ||
932 | PINMUX_DATA(VIO_HDR_MARK, PORT215_FN1), | ||
933 | PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN1), | ||
934 | PINMUX_DATA(VIO_CKOR_MARK, PORT217_FN1), | ||
935 | PINMUX_DATA(SCIFA1_TXD_MARK, PORT220_FN2), | ||
936 | PINMUX_DATA(GPS_PGFA0_MARK, PORT220_FN3), | ||
937 | PINMUX_DATA(SCIFA1_SCK_MARK, PORT221_FN2), | ||
938 | PINMUX_DATA(GPS_PGFA1_MARK, PORT221_FN3), | ||
939 | PINMUX_DATA(SCIFA1_RTS_MARK, PORT222_FN2), | ||
940 | PINMUX_DATA(GPS_EPPSINMON_MARK, PORT222_FN3), | ||
941 | PINMUX_DATA(SCIFA1_RXD_MARK, PORT223_FN2), | ||
942 | PINMUX_DATA(SCIFA1_CTS_MARK, PORT224_FN2), | ||
943 | PINMUX_DATA(MSIOF1_TXD_MARK, PORT225_FN1), | ||
944 | PINMUX_DATA(SCIFA1_TXD2_MARK, PORT225_FN2), | ||
945 | PINMUX_DATA(GPS_TXD_MARK, PORT225_FN3), | ||
946 | PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT226_FN1), | ||
947 | PINMUX_DATA(SCIFA1_CTS2_MARK, PORT226_FN2), | ||
948 | PINMUX_DATA(I2C_SDA2_MARK, PORT226_FN3), | ||
949 | PINMUX_DATA(MSIOF1_TSCK_MARK, PORT227_FN1), | ||
950 | PINMUX_DATA(SCIFA1_SCK2_MARK, PORT227_FN2), | ||
951 | PINMUX_DATA(MSIOF1_RXD_MARK, PORT228_FN1), | ||
952 | PINMUX_DATA(SCIFA1_RXD2_MARK, PORT228_FN2), | ||
953 | PINMUX_DATA(GPS_RXD_MARK, PORT228_FN3), | ||
954 | PINMUX_DATA(MSIOF1_RSCK_MARK, PORT229_FN1), | ||
955 | PINMUX_DATA(SCIFA1_RTS2_MARK, PORT229_FN2), | ||
956 | PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT230_FN1), | ||
957 | PINMUX_DATA(I2C_SCL2_MARK, PORT230_FN3), | ||
958 | PINMUX_DATA(MSIOF1_MCK0_MARK, PORT231_FN1), | ||
959 | PINMUX_DATA(MSIOF1_MCK1_MARK, PORT232_FN1), | ||
960 | PINMUX_DATA(MSIOF1_SS1_MARK, PORT233_FN1), | ||
961 | PINMUX_DATA(EDBGREQ3_MARK, PORT233_FN2), | ||
962 | PINMUX_DATA(MSIOF1_SS2_MARK, PORT234_FN1), | ||
963 | PINMUX_DATA(PORT236_IROUT_MARK, PORT236_FN1), | ||
964 | PINMUX_DATA(IRDA_OUT_MARK, PORT236_FN2), | ||
965 | PINMUX_DATA(IRDA_IN_MARK, PORT237_FN2), | ||
966 | PINMUX_DATA(IRDA_FIRSEL_MARK, PORT238_FN1), | ||
967 | PINMUX_DATA(TPU1TO0_MARK, PORT239_FN3), | ||
968 | PINMUX_DATA(TS_SPSYNC3_MARK, PORT239_FN4), | ||
969 | PINMUX_DATA(TPU1TO1_MARK, PORT240_FN3), | ||
970 | PINMUX_DATA(TS_SDAT3_MARK, PORT240_FN4), | ||
971 | PINMUX_DATA(TPU1TO2_MARK, PORT241_FN3), | ||
972 | PINMUX_DATA(TS_SDEN3_MARK, PORT241_FN4), | ||
973 | PINMUX_DATA(PORT241_MSIOF2_SS1_MARK, PORT241_FN5), | ||
974 | PINMUX_DATA(TPU1TO3_MARK, PORT242_FN3), | ||
975 | PINMUX_DATA(PORT242_MSIOF2_TSCK_MARK, PORT242_FN5), | ||
976 | PINMUX_DATA(M13_BSW_MARK, PORT243_FN2), | ||
977 | PINMUX_DATA(PORT243_MSIOF2_TSYNC_MARK, PORT243_FN5), | ||
978 | PINMUX_DATA(M14_GSW_MARK, PORT244_FN2), | ||
979 | PINMUX_DATA(PORT244_MSIOF2_TXD_MARK, PORT244_FN5), | ||
980 | PINMUX_DATA(PORT245_IROUT_MARK, PORT245_FN1), | ||
981 | PINMUX_DATA(M15_RSW_MARK, PORT245_FN2), | ||
982 | PINMUX_DATA(SOUT3_MARK, PORT246_FN1), | ||
983 | PINMUX_DATA(SCIFA2_TXD1_MARK, PORT246_FN2), | ||
984 | PINMUX_DATA(SIN3_MARK, PORT247_FN1), | ||
985 | PINMUX_DATA(SCIFA2_RXD1_MARK, PORT247_FN2), | ||
986 | PINMUX_DATA(XRTS3_MARK, PORT248_FN1), | ||
987 | PINMUX_DATA(SCIFA2_RTS1_MARK, PORT248_FN2), | ||
988 | PINMUX_DATA(PORT248_MSIOF2_SS2_MARK, PORT248_FN5), | ||
989 | PINMUX_DATA(XCTS3_MARK, PORT249_FN1), | ||
990 | PINMUX_DATA(SCIFA2_CTS1_MARK, PORT249_FN2), | ||
991 | PINMUX_DATA(PORT249_MSIOF2_RXD_MARK, PORT249_FN5), | ||
992 | PINMUX_DATA(DINT_MARK, PORT250_FN1), | ||
993 | PINMUX_DATA(SCIFA2_SCK1_MARK, PORT250_FN2), | ||
994 | PINMUX_DATA(TS_SCK3_MARK, PORT250_FN4), | ||
995 | PINMUX_DATA(SDHICLK0_MARK, PORT251_FN1), | ||
996 | PINMUX_DATA(TCK2_MARK, PORT251_FN2), | ||
997 | PINMUX_DATA(SDHICD0_MARK, PORT252_FN1), | ||
998 | PINMUX_DATA(SDHID0_0_MARK, PORT253_FN1), | ||
999 | PINMUX_DATA(TMS2_MARK, PORT253_FN2), | ||
1000 | PINMUX_DATA(SDHID0_1_MARK, PORT254_FN1), | ||
1001 | PINMUX_DATA(TDO2_MARK, PORT254_FN2), | ||
1002 | PINMUX_DATA(SDHID0_2_MARK, PORT255_FN1), | ||
1003 | PINMUX_DATA(TDI2_MARK, PORT255_FN2), | ||
1004 | PINMUX_DATA(SDHID0_3_MARK, PORT256_FN1), | ||
1005 | PINMUX_DATA(RTCK2_MARK, PORT256_FN2), | ||
1006 | |||
1007 | /* 49-6 (FN) */ | ||
1008 | PINMUX_DATA(SDHICMD0_MARK, PORT257_FN1), | ||
1009 | PINMUX_DATA(TRST2_MARK, PORT257_FN2), | ||
1010 | PINMUX_DATA(SDHIWP0_MARK, PORT258_FN1), | ||
1011 | PINMUX_DATA(EDBGREQ2_MARK, PORT258_FN2), | ||
1012 | PINMUX_DATA(SDHICLK1_MARK, PORT259_FN1), | ||
1013 | PINMUX_DATA(TCK3_MARK, PORT259_FN4), | ||
1014 | PINMUX_DATA(SDHID1_0_MARK, PORT260_FN1), | ||
1015 | PINMUX_DATA(M11_SLCD_SO2_MARK, PORT260_FN2), | ||
1016 | PINMUX_DATA(TS_SPSYNC2_MARK, PORT260_FN3), | ||
1017 | PINMUX_DATA(TMS3_MARK, PORT260_FN4), | ||
1018 | PINMUX_DATA(SDHID1_1_MARK, PORT261_FN1), | ||
1019 | PINMUX_DATA(M9_SLCD_AO2_MARK, PORT261_FN2), | ||
1020 | PINMUX_DATA(TS_SDAT2_MARK, PORT261_FN3), | ||
1021 | PINMUX_DATA(TDO3_MARK, PORT261_FN4), | ||
1022 | PINMUX_DATA(SDHID1_2_MARK, PORT262_FN1), | ||
1023 | PINMUX_DATA(M10_SLCD_CK2_MARK, PORT262_FN2), | ||
1024 | PINMUX_DATA(TS_SDEN2_MARK, PORT262_FN3), | ||
1025 | PINMUX_DATA(TDI3_MARK, PORT262_FN4), | ||
1026 | PINMUX_DATA(SDHID1_3_MARK, PORT263_FN1), | ||
1027 | PINMUX_DATA(M12_SLCD_CE2_MARK, PORT263_FN2), | ||
1028 | PINMUX_DATA(TS_SCK2_MARK, PORT263_FN3), | ||
1029 | PINMUX_DATA(RTCK3_MARK, PORT263_FN4), | ||
1030 | PINMUX_DATA(SDHICMD1_MARK, PORT264_FN1), | ||
1031 | PINMUX_DATA(TRST3_MARK, PORT264_FN4), | ||
1032 | PINMUX_DATA(SDHICLK2_MARK, PORT265_FN1), | ||
1033 | PINMUX_DATA(SCIFB_SCK_MARK, PORT265_FN2), | ||
1034 | PINMUX_DATA(SDHID2_0_MARK, PORT266_FN1), | ||
1035 | PINMUX_DATA(SCIFB_TXD_MARK, PORT266_FN2), | ||
1036 | PINMUX_DATA(SDHID2_1_MARK, PORT267_FN1), | ||
1037 | PINMUX_DATA(SCIFB_CTS_MARK, PORT267_FN2), | ||
1038 | PINMUX_DATA(SDHID2_2_MARK, PORT268_FN1), | ||
1039 | PINMUX_DATA(SCIFB_RXD_MARK, PORT268_FN2), | ||
1040 | PINMUX_DATA(SDHID2_3_MARK, PORT269_FN1), | ||
1041 | PINMUX_DATA(SCIFB_RTS_MARK, PORT269_FN2), | ||
1042 | PINMUX_DATA(SDHICMD2_MARK, PORT270_FN1), | ||
1043 | PINMUX_DATA(RESETOUTS_MARK, PORT271_FN1), | ||
1044 | PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1), | ||
1045 | }; | ||
1046 | |||
1047 | static struct pinmux_gpio pinmux_gpios[] = { | ||
1048 | /* 49-1 -> 49-6 (GPIO) */ | ||
1049 | GPIO_PORT_ALL(), | ||
1050 | |||
1051 | /* Special Pull-up / Pull-down Functions */ | ||
1052 | GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU), | ||
1053 | GPIO_FN(PORT50_KEYIN2_PU), GPIO_FN(PORT55_KEYIN3_PU), | ||
1054 | GPIO_FN(PORT56_KEYIN4_PU), GPIO_FN(PORT57_KEYIN5_PU), | ||
1055 | GPIO_FN(PORT58_KEYIN6_PU), | ||
1056 | |||
1057 | /* 49-1 (FN) */ | ||
1058 | GPIO_FN(VBUS0), GPIO_FN(CPORT0), GPIO_FN(CPORT1), GPIO_FN(CPORT2), | ||
1059 | GPIO_FN(CPORT3), GPIO_FN(CPORT4), GPIO_FN(CPORT5), GPIO_FN(CPORT6), | ||
1060 | GPIO_FN(CPORT7), GPIO_FN(CPORT8), GPIO_FN(CPORT9), GPIO_FN(CPORT10), | ||
1061 | GPIO_FN(CPORT11), GPIO_FN(SIN2), GPIO_FN(CPORT12), GPIO_FN(XCTS2), | ||
1062 | GPIO_FN(CPORT13), GPIO_FN(RFSPO4), GPIO_FN(CPORT14), GPIO_FN(RFSPO5), | ||
1063 | GPIO_FN(CPORT15), GPIO_FN(CPORT16), GPIO_FN(CPORT17), GPIO_FN(SOUT2), | ||
1064 | GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(CPORT19), GPIO_FN(CPORT20), | ||
1065 | GPIO_FN(RFSPO6), GPIO_FN(CPORT21), GPIO_FN(STATUS0), GPIO_FN(CPORT22), | ||
1066 | GPIO_FN(STATUS1), GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7), | ||
1067 | GPIO_FN(MPORT0), GPIO_FN(MPORT1), GPIO_FN(B_SYNLD1), GPIO_FN(B_SYNLD2), | ||
1068 | GPIO_FN(XMAINPS), GPIO_FN(XDIVPS), GPIO_FN(XIDRST), GPIO_FN(IDCLK), | ||
1069 | GPIO_FN(IDIO), GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD), | ||
1070 | GPIO_FN(M02_BERDAT), GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP), | ||
1071 | GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK), | ||
1072 | GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS), | ||
1073 | |||
1074 | /* 49-2 (FN) */ | ||
1075 | GPIO_FN(HSU_IQ_AGC6), GPIO_FN(MFG2_IN2), GPIO_FN(MSIOF2_MCK0), | ||
1076 | GPIO_FN(HSU_IQ_AGC5), GPIO_FN(MFG2_IN1), GPIO_FN(MSIOF2_MCK1), | ||
1077 | GPIO_FN(HSU_IQ_AGC4), GPIO_FN(MSIOF2_RSYNC), | ||
1078 | GPIO_FN(HSU_IQ_AGC3), GPIO_FN(MFG2_OUT1), GPIO_FN(MSIOF2_RSCK), | ||
1079 | GPIO_FN(HSU_IQ_AGC2), GPIO_FN(PORT42_KEYOUT0), | ||
1080 | GPIO_FN(HSU_IQ_AGC1), GPIO_FN(PORT43_KEYOUT1), | ||
1081 | GPIO_FN(HSU_IQ_AGC0), GPIO_FN(PORT44_KEYOUT2), | ||
1082 | GPIO_FN(HSU_IQ_AGC_ST), GPIO_FN(PORT45_KEYOUT3), | ||
1083 | GPIO_FN(HSU_IQ_PDO), GPIO_FN(PORT46_KEYOUT4), | ||
1084 | GPIO_FN(HSU_IQ_PYO), GPIO_FN(PORT47_KEYOUT5), | ||
1085 | GPIO_FN(HSU_EN_TXMUX_G3MO), GPIO_FN(PORT48_KEYIN0), | ||
1086 | GPIO_FN(HSU_I_TXMUX_G3MO), GPIO_FN(PORT49_KEYIN1), | ||
1087 | GPIO_FN(HSU_Q_TXMUX_G3MO), GPIO_FN(PORT50_KEYIN2), | ||
1088 | GPIO_FN(HSU_SYO), GPIO_FN(PORT51_MSIOF2_TSYNC), | ||
1089 | GPIO_FN(HSU_SDO), GPIO_FN(PORT52_MSIOF2_TSCK), | ||
1090 | GPIO_FN(HSU_TGTTI_G3MO), GPIO_FN(PORT53_MSIOF2_TXD), | ||
1091 | GPIO_FN(B_TIME_STAMP), GPIO_FN(PORT54_MSIOF2_RXD), | ||
1092 | GPIO_FN(HSU_SDI), GPIO_FN(PORT55_KEYIN3), | ||
1093 | GPIO_FN(HSU_SCO), GPIO_FN(PORT56_KEYIN4), | ||
1094 | GPIO_FN(HSU_DREQ), GPIO_FN(PORT57_KEYIN5), | ||
1095 | GPIO_FN(HSU_DACK), GPIO_FN(PORT58_KEYIN6), | ||
1096 | GPIO_FN(HSU_CLK61M), GPIO_FN(PORT59_MSIOF2_SS1), | ||
1097 | GPIO_FN(HSU_XRST), GPIO_FN(PORT60_MSIOF2_SS2), | ||
1098 | GPIO_FN(PCMCLKO), GPIO_FN(SYNC8KO), GPIO_FN(DNPCM_A), GPIO_FN(UPPCM_A), | ||
1099 | GPIO_FN(XTALB1L), | ||
1100 | GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS), | ||
1101 | GPIO_FN(GPS_AGC2), GPIO_FN(SCIFA0_SCK), | ||
1102 | GPIO_FN(GPS_AGC3), GPIO_FN(SCIFA0_TXD), | ||
1103 | GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD), | ||
1104 | GPIO_FN(GPS_PWRD), GPIO_FN(SCIFA0_CTS), | ||
1105 | GPIO_FN(GPS_IM), GPIO_FN(GPS_IS), GPIO_FN(GPS_QM), GPIO_FN(GPS_QS), | ||
1106 | GPIO_FN(SIUBOMC), GPIO_FN(TPU2TO0), | ||
1107 | GPIO_FN(SIUCKB), GPIO_FN(TPU2TO1), | ||
1108 | GPIO_FN(SIUBOLR), GPIO_FN(BBIF2_TSYNC), GPIO_FN(TPU2TO2), | ||
1109 | GPIO_FN(SIUBOBT), GPIO_FN(BBIF2_TSCK), GPIO_FN(TPU2TO3), | ||
1110 | GPIO_FN(SIUBOSLD), GPIO_FN(BBIF2_TXD), GPIO_FN(TPU3TO0), | ||
1111 | GPIO_FN(SIUBILR), GPIO_FN(TPU3TO1), | ||
1112 | GPIO_FN(SIUBIBT), GPIO_FN(TPU3TO2), | ||
1113 | GPIO_FN(SIUBISLD), GPIO_FN(TPU3TO3), | ||
1114 | GPIO_FN(NMI), GPIO_FN(TPU4TO0), | ||
1115 | GPIO_FN(DNPCM_M), GPIO_FN(TPU4TO1), GPIO_FN(TPU4TO2), GPIO_FN(TPU4TO3), | ||
1116 | GPIO_FN(IRQ_TMPB), | ||
1117 | GPIO_FN(PWEN), GPIO_FN(MFG1_OUT1), | ||
1118 | GPIO_FN(OVCN), GPIO_FN(MFG1_IN1), | ||
1119 | GPIO_FN(OVCN2), GPIO_FN(MFG1_IN2), | ||
1120 | |||
1121 | /* 49-3 (FN) */ | ||
1122 | GPIO_FN(RFSPO1), GPIO_FN(RFSPO2), GPIO_FN(RFSPO3), | ||
1123 | GPIO_FN(PORT93_VIO_CKO2), | ||
1124 | GPIO_FN(USBTERM), GPIO_FN(EXTLP), GPIO_FN(IDIN), | ||
1125 | GPIO_FN(SCIFA5_CTS), GPIO_FN(MFG0_IN1), | ||
1126 | GPIO_FN(SCIFA5_RTS), GPIO_FN(MFG0_IN2), | ||
1127 | GPIO_FN(SCIFA5_RXD), | ||
1128 | GPIO_FN(SCIFA5_TXD), | ||
1129 | GPIO_FN(SCIFA5_SCK), GPIO_FN(MFG0_OUT1), | ||
1130 | GPIO_FN(A0_EA0), GPIO_FN(BS), | ||
1131 | GPIO_FN(A14_EA14), GPIO_FN(PORT102_KEYOUT0), | ||
1132 | GPIO_FN(A15_EA15), GPIO_FN(PORT103_KEYOUT1), GPIO_FN(DV_CLKOL), | ||
1133 | GPIO_FN(A16_EA16), GPIO_FN(PORT104_KEYOUT2), | ||
1134 | GPIO_FN(DV_VSYNCL), GPIO_FN(MSIOF0_SS1), | ||
1135 | GPIO_FN(A17_EA17), GPIO_FN(PORT105_KEYOUT3), | ||
1136 | GPIO_FN(DV_HSYNCL), GPIO_FN(MSIOF0_TSYNC), | ||
1137 | GPIO_FN(A18_EA18), GPIO_FN(PORT106_KEYOUT4), | ||
1138 | GPIO_FN(DV_DL0), GPIO_FN(MSIOF0_TSCK), | ||
1139 | GPIO_FN(A19_EA19), GPIO_FN(PORT107_KEYOUT5), | ||
1140 | GPIO_FN(DV_DL1), GPIO_FN(MSIOF0_TXD), | ||
1141 | GPIO_FN(A20_EA20), GPIO_FN(PORT108_KEYIN0), | ||
1142 | GPIO_FN(DV_DL2), GPIO_FN(MSIOF0_RSCK), | ||
1143 | GPIO_FN(A21_EA21), GPIO_FN(PORT109_KEYIN1), | ||
1144 | GPIO_FN(DV_DL3), GPIO_FN(MSIOF0_RSYNC), | ||
1145 | GPIO_FN(A22_EA22), GPIO_FN(PORT110_KEYIN2), | ||
1146 | GPIO_FN(DV_DL4), GPIO_FN(MSIOF0_MCK0), | ||
1147 | GPIO_FN(A23_EA23), GPIO_FN(PORT111_KEYIN3), | ||
1148 | GPIO_FN(DV_DL5), GPIO_FN(MSIOF0_MCK1), | ||
1149 | GPIO_FN(A24_EA24), GPIO_FN(PORT112_KEYIN4), | ||
1150 | GPIO_FN(DV_DL6), GPIO_FN(MSIOF0_RXD), | ||
1151 | GPIO_FN(A25_EA25), GPIO_FN(PORT113_KEYIN5), | ||
1152 | GPIO_FN(DV_DL7), GPIO_FN(MSIOF0_SS2), | ||
1153 | GPIO_FN(A26), GPIO_FN(PORT113_KEYIN6), GPIO_FN(DV_CLKIL), | ||
1154 | GPIO_FN(D0_ED0_NAF0), GPIO_FN(D1_ED1_NAF1), GPIO_FN(D2_ED2_NAF2), | ||
1155 | GPIO_FN(D3_ED3_NAF3), GPIO_FN(D4_ED4_NAF4), GPIO_FN(D5_ED5_NAF5), | ||
1156 | GPIO_FN(D6_ED6_NAF6), GPIO_FN(D7_ED7_NAF7), GPIO_FN(D8_ED8_NAF8), | ||
1157 | GPIO_FN(D9_ED9_NAF9), GPIO_FN(D10_ED10_NAF10), GPIO_FN(D11_ED11_NAF11), | ||
1158 | GPIO_FN(D12_ED12_NAF12), GPIO_FN(D13_ED13_NAF13), | ||
1159 | GPIO_FN(D14_ED14_NAF14), GPIO_FN(D15_ED15_NAF15), | ||
1160 | GPIO_FN(CS4), GPIO_FN(CS5A), GPIO_FN(CS5B), GPIO_FN(FCE1), | ||
1161 | GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(FCE0), GPIO_FN(CS6A), | ||
1162 | GPIO_FN(DACK0), GPIO_FN(WAIT), GPIO_FN(DREQ0), GPIO_FN(RD_XRD), | ||
1163 | GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(WE0_XWR0_FWE), | ||
1164 | GPIO_FN(WE1_XWR1), GPIO_FN(FRB), GPIO_FN(CKO), | ||
1165 | GPIO_FN(NBRSTOUT), GPIO_FN(NBRST), | ||
1166 | |||
1167 | /* 49-4 (FN) */ | ||
1168 | GPIO_FN(RFSPO0), GPIO_FN(PORT146_VIO_CKO2), GPIO_FN(TSTMD), | ||
1169 | GPIO_FN(VIO_VD), GPIO_FN(VIO_HD), | ||
1170 | GPIO_FN(VIO_D0), GPIO_FN(VIO_D1), GPIO_FN(VIO_D2), | ||
1171 | GPIO_FN(VIO_D3), GPIO_FN(VIO_D4), GPIO_FN(VIO_D5), | ||
1172 | GPIO_FN(VIO_D6), GPIO_FN(VIO_D7), GPIO_FN(VIO_D8), | ||
1173 | GPIO_FN(VIO_D9), GPIO_FN(VIO_D10), GPIO_FN(VIO_D11), | ||
1174 | GPIO_FN(VIO_D12), GPIO_FN(VIO_D13), GPIO_FN(VIO_D14), | ||
1175 | GPIO_FN(VIO_D15), GPIO_FN(VIO_CLK), GPIO_FN(VIO_FIELD), | ||
1176 | GPIO_FN(VIO_CKO), | ||
1177 | GPIO_FN(MFG3_IN1), GPIO_FN(MFG3_IN2), | ||
1178 | GPIO_FN(M9_SLCD_A01), GPIO_FN(MFG3_OUT1), GPIO_FN(TPU0TO0), | ||
1179 | GPIO_FN(M10_SLCD_CK1), GPIO_FN(MFG4_IN1), GPIO_FN(TPU0TO1), | ||
1180 | GPIO_FN(M11_SLCD_SO1), GPIO_FN(MFG4_IN2), GPIO_FN(TPU0TO2), | ||
1181 | GPIO_FN(M12_SLCD_CE1), GPIO_FN(MFG4_OUT1), GPIO_FN(TPU0TO3), | ||
1182 | GPIO_FN(LCDD0), GPIO_FN(PORT175_KEYOUT0), GPIO_FN(DV_D0), | ||
1183 | GPIO_FN(SIUCKA), GPIO_FN(MFG0_OUT2), | ||
1184 | GPIO_FN(LCDD1), GPIO_FN(PORT176_KEYOUT1), GPIO_FN(DV_D1), | ||
1185 | GPIO_FN(SIUAOLR), GPIO_FN(BBIF2_TSYNC1), | ||
1186 | GPIO_FN(LCDD2), GPIO_FN(PORT177_KEYOUT2), GPIO_FN(DV_D2), | ||
1187 | GPIO_FN(SIUAOBT), GPIO_FN(BBIF2_TSCK1), | ||
1188 | GPIO_FN(LCDD3), GPIO_FN(PORT178_KEYOUT3), GPIO_FN(DV_D3), | ||
1189 | GPIO_FN(SIUAOSLD), GPIO_FN(BBIF2_TXD1), | ||
1190 | GPIO_FN(LCDD4), GPIO_FN(PORT179_KEYOUT4), GPIO_FN(DV_D4), | ||
1191 | GPIO_FN(SIUAISPD), GPIO_FN(MFG1_OUT2), | ||
1192 | GPIO_FN(LCDD5), GPIO_FN(PORT180_KEYOUT5), GPIO_FN(DV_D5), | ||
1193 | GPIO_FN(SIUAILR), GPIO_FN(MFG2_OUT2), | ||
1194 | GPIO_FN(LCDD6), GPIO_FN(DV_D6), | ||
1195 | GPIO_FN(SIUAIBT), GPIO_FN(MFG3_OUT2), GPIO_FN(XWR2), | ||
1196 | GPIO_FN(LCDD7), GPIO_FN(DV_D7), | ||
1197 | GPIO_FN(SIUAISLD), GPIO_FN(MFG4_OUT2), GPIO_FN(XWR3), | ||
1198 | GPIO_FN(LCDD8), GPIO_FN(DV_D8), GPIO_FN(D16), GPIO_FN(ED16), | ||
1199 | GPIO_FN(LCDD9), GPIO_FN(DV_D9), GPIO_FN(D17), GPIO_FN(ED17), | ||
1200 | GPIO_FN(LCDD10), GPIO_FN(DV_D10), GPIO_FN(D18), GPIO_FN(ED18), | ||
1201 | GPIO_FN(LCDD11), GPIO_FN(DV_D11), GPIO_FN(D19), GPIO_FN(ED19), | ||
1202 | GPIO_FN(LCDD12), GPIO_FN(DV_D12), GPIO_FN(D20), GPIO_FN(ED20), | ||
1203 | GPIO_FN(LCDD13), GPIO_FN(DV_D13), GPIO_FN(D21), GPIO_FN(ED21), | ||
1204 | GPIO_FN(LCDD14), GPIO_FN(DV_D14), GPIO_FN(D22), GPIO_FN(ED22), | ||
1205 | GPIO_FN(LCDD15), GPIO_FN(DV_D15), GPIO_FN(D23), GPIO_FN(ED23), | ||
1206 | GPIO_FN(LCDD16), GPIO_FN(DV_HSYNC), GPIO_FN(D24), GPIO_FN(ED24), | ||
1207 | GPIO_FN(LCDD17), GPIO_FN(DV_VSYNC), GPIO_FN(D25), GPIO_FN(ED25), | ||
1208 | GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(MSIOF0L_TSCK), | ||
1209 | GPIO_FN(D26), GPIO_FN(ED26), | ||
1210 | GPIO_FN(LCDD19), GPIO_FN(MSIOF0L_TSYNC), | ||
1211 | GPIO_FN(D27), GPIO_FN(ED27), | ||
1212 | GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0), | ||
1213 | GPIO_FN(D28), GPIO_FN(ED28), | ||
1214 | GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1), | ||
1215 | GPIO_FN(D29), GPIO_FN(ED29), | ||
1216 | GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_SS1), | ||
1217 | GPIO_FN(D30), GPIO_FN(ED30), | ||
1218 | GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_SS2), | ||
1219 | GPIO_FN(D31), GPIO_FN(ED31), | ||
1220 | GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(DV_CKO), GPIO_FN(SIUAOSPD), | ||
1221 | GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_RSYNC), | ||
1222 | |||
1223 | /* 49-5 (FN) */ | ||
1224 | GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3), | ||
1225 | GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_RSCK), | ||
1226 | GPIO_FN(LCDCSYN), GPIO_FN(LCDCSYN2), GPIO_FN(DV_CKI), | ||
1227 | GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(MSIOF0L_RXD), | ||
1228 | GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(MSIOF0L_TXD), | ||
1229 | GPIO_FN(VIO_DR0), GPIO_FN(VIO_DR1), GPIO_FN(VIO_DR2), GPIO_FN(VIO_DR3), | ||
1230 | GPIO_FN(VIO_DR4), GPIO_FN(VIO_DR5), GPIO_FN(VIO_DR6), GPIO_FN(VIO_DR7), | ||
1231 | GPIO_FN(VIO_VDR), GPIO_FN(VIO_HDR), | ||
1232 | GPIO_FN(VIO_CLKR), GPIO_FN(VIO_CKOR), | ||
1233 | GPIO_FN(SCIFA1_TXD), GPIO_FN(GPS_PGFA0), | ||
1234 | GPIO_FN(SCIFA1_SCK), GPIO_FN(GPS_PGFA1), | ||
1235 | GPIO_FN(SCIFA1_RTS), GPIO_FN(GPS_EPPSINMON), | ||
1236 | GPIO_FN(SCIFA1_RXD), GPIO_FN(SCIFA1_CTS), | ||
1237 | GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA1_TXD2), GPIO_FN(GPS_TXD), | ||
1238 | GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA1_CTS2), GPIO_FN(I2C_SDA2), | ||
1239 | GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA1_SCK2), | ||
1240 | GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA1_RXD2), GPIO_FN(GPS_RXD), | ||
1241 | GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA1_RTS2), | ||
1242 | GPIO_FN(MSIOF1_RSYNC), GPIO_FN(I2C_SCL2), | ||
1243 | GPIO_FN(MSIOF1_MCK0), GPIO_FN(MSIOF1_MCK1), | ||
1244 | GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3), | ||
1245 | GPIO_FN(MSIOF1_SS2), | ||
1246 | GPIO_FN(PORT236_IROUT), GPIO_FN(IRDA_OUT), | ||
1247 | GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL), | ||
1248 | GPIO_FN(TPU1TO0), GPIO_FN(TS_SPSYNC3), | ||
1249 | GPIO_FN(TPU1TO1), GPIO_FN(TS_SDAT3), | ||
1250 | GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT241_MSIOF2_SS1), | ||
1251 | GPIO_FN(TPU1TO3), GPIO_FN(PORT242_MSIOF2_TSCK), | ||
1252 | GPIO_FN(M13_BSW), GPIO_FN(PORT243_MSIOF2_TSYNC), | ||
1253 | GPIO_FN(M14_GSW), GPIO_FN(PORT244_MSIOF2_TXD), | ||
1254 | GPIO_FN(PORT245_IROUT), GPIO_FN(M15_RSW), | ||
1255 | GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1), | ||
1256 | GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1), | ||
1257 | GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT248_MSIOF2_SS2), | ||
1258 | GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT249_MSIOF2_RXD), | ||
1259 | GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3), | ||
1260 | GPIO_FN(SDHICLK0), GPIO_FN(TCK2), | ||
1261 | GPIO_FN(SDHICD0), | ||
1262 | GPIO_FN(SDHID0_0), GPIO_FN(TMS2), | ||
1263 | GPIO_FN(SDHID0_1), GPIO_FN(TDO2), | ||
1264 | GPIO_FN(SDHID0_2), GPIO_FN(TDI2), | ||
1265 | GPIO_FN(SDHID0_3), GPIO_FN(RTCK2), | ||
1266 | |||
1267 | /* 49-6 (FN) */ | ||
1268 | GPIO_FN(SDHICMD0), GPIO_FN(TRST2), | ||
1269 | GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2), | ||
1270 | GPIO_FN(SDHICLK1), GPIO_FN(TCK3), | ||
1271 | GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2), | ||
1272 | GPIO_FN(TS_SPSYNC2), GPIO_FN(TMS3), | ||
1273 | GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_AO2), | ||
1274 | GPIO_FN(TS_SDAT2), GPIO_FN(TDO3), | ||
1275 | GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2), | ||
1276 | GPIO_FN(TS_SDEN2), GPIO_FN(TDI3), | ||
1277 | GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2), | ||
1278 | GPIO_FN(TS_SCK2), GPIO_FN(RTCK3), | ||
1279 | GPIO_FN(SDHICMD1), GPIO_FN(TRST3), | ||
1280 | GPIO_FN(SDHICLK2), GPIO_FN(SCIFB_SCK), | ||
1281 | GPIO_FN(SDHID2_0), GPIO_FN(SCIFB_TXD), | ||
1282 | GPIO_FN(SDHID2_1), GPIO_FN(SCIFB_CTS), | ||
1283 | GPIO_FN(SDHID2_2), GPIO_FN(SCIFB_RXD), | ||
1284 | GPIO_FN(SDHID2_3), GPIO_FN(SCIFB_RTS), | ||
1285 | GPIO_FN(SDHICMD2), | ||
1286 | GPIO_FN(RESETOUTS), | ||
1287 | GPIO_FN(DIVLOCK), | ||
1288 | }; | ||
1289 | |||
1290 | static struct pinmux_cfg_reg pinmux_config_regs[] = { | ||
1291 | PORTCR(0, 0xe6050000), /* PORT0CR */ | ||
1292 | PORTCR(1, 0xe6050001), /* PORT1CR */ | ||
1293 | PORTCR(2, 0xe6050002), /* PORT2CR */ | ||
1294 | PORTCR(3, 0xe6050003), /* PORT3CR */ | ||
1295 | PORTCR(4, 0xe6050004), /* PORT4CR */ | ||
1296 | PORTCR(5, 0xe6050005), /* PORT5CR */ | ||
1297 | PORTCR(6, 0xe6050006), /* PORT6CR */ | ||
1298 | PORTCR(7, 0xe6050007), /* PORT7CR */ | ||
1299 | PORTCR(8, 0xe6050008), /* PORT8CR */ | ||
1300 | PORTCR(9, 0xe6050009), /* PORT9CR */ | ||
1301 | |||
1302 | PORTCR(10, 0xe605000a), /* PORT10CR */ | ||
1303 | PORTCR(11, 0xe605000b), /* PORT11CR */ | ||
1304 | PORTCR(12, 0xe605000c), /* PORT12CR */ | ||
1305 | PORTCR(13, 0xe605000d), /* PORT13CR */ | ||
1306 | PORTCR(14, 0xe605000e), /* PORT14CR */ | ||
1307 | PORTCR(15, 0xe605000f), /* PORT15CR */ | ||
1308 | PORTCR(16, 0xe6050010), /* PORT16CR */ | ||
1309 | PORTCR(17, 0xe6050011), /* PORT17CR */ | ||
1310 | PORTCR(18, 0xe6050012), /* PORT18CR */ | ||
1311 | PORTCR(19, 0xe6050013), /* PORT19CR */ | ||
1312 | |||
1313 | PORTCR(20, 0xe6050014), /* PORT20CR */ | ||
1314 | PORTCR(21, 0xe6050015), /* PORT21CR */ | ||
1315 | PORTCR(22, 0xe6050016), /* PORT22CR */ | ||
1316 | PORTCR(23, 0xe6050017), /* PORT23CR */ | ||
1317 | PORTCR(24, 0xe6050018), /* PORT24CR */ | ||
1318 | PORTCR(25, 0xe6050019), /* PORT25CR */ | ||
1319 | PORTCR(26, 0xe605001a), /* PORT26CR */ | ||
1320 | PORTCR(27, 0xe605001b), /* PORT27CR */ | ||
1321 | PORTCR(28, 0xe605001c), /* PORT28CR */ | ||
1322 | PORTCR(29, 0xe605001d), /* PORT29CR */ | ||
1323 | |||
1324 | PORTCR(30, 0xe605001e), /* PORT30CR */ | ||
1325 | PORTCR(31, 0xe605001f), /* PORT31CR */ | ||
1326 | PORTCR(32, 0xe6050020), /* PORT32CR */ | ||
1327 | PORTCR(33, 0xe6050021), /* PORT33CR */ | ||
1328 | PORTCR(34, 0xe6050022), /* PORT34CR */ | ||
1329 | PORTCR(35, 0xe6050023), /* PORT35CR */ | ||
1330 | PORTCR(36, 0xe6050024), /* PORT36CR */ | ||
1331 | PORTCR(37, 0xe6050025), /* PORT37CR */ | ||
1332 | PORTCR(38, 0xe6050026), /* PORT38CR */ | ||
1333 | PORTCR(39, 0xe6050027), /* PORT39CR */ | ||
1334 | |||
1335 | PORTCR(40, 0xe6050028), /* PORT40CR */ | ||
1336 | PORTCR(41, 0xe6050029), /* PORT41CR */ | ||
1337 | PORTCR(42, 0xe605002a), /* PORT42CR */ | ||
1338 | PORTCR(43, 0xe605002b), /* PORT43CR */ | ||
1339 | PORTCR(44, 0xe605002c), /* PORT44CR */ | ||
1340 | PORTCR(45, 0xe605002d), /* PORT45CR */ | ||
1341 | PORTCR(46, 0xe605002e), /* PORT46CR */ | ||
1342 | PORTCR(47, 0xe605002f), /* PORT47CR */ | ||
1343 | PORTCR(48, 0xe6050030), /* PORT48CR */ | ||
1344 | PORTCR(49, 0xe6050031), /* PORT49CR */ | ||
1345 | |||
1346 | PORTCR(50, 0xe6050032), /* PORT50CR */ | ||
1347 | PORTCR(51, 0xe6050033), /* PORT51CR */ | ||
1348 | PORTCR(52, 0xe6050034), /* PORT52CR */ | ||
1349 | PORTCR(53, 0xe6050035), /* PORT53CR */ | ||
1350 | PORTCR(54, 0xe6050036), /* PORT54CR */ | ||
1351 | PORTCR(55, 0xe6050037), /* PORT55CR */ | ||
1352 | PORTCR(56, 0xe6050038), /* PORT56CR */ | ||
1353 | PORTCR(57, 0xe6050039), /* PORT57CR */ | ||
1354 | PORTCR(58, 0xe605003a), /* PORT58CR */ | ||
1355 | PORTCR(59, 0xe605003b), /* PORT59CR */ | ||
1356 | |||
1357 | PORTCR(60, 0xe605003c), /* PORT60CR */ | ||
1358 | PORTCR(61, 0xe605003d), /* PORT61CR */ | ||
1359 | PORTCR(62, 0xe605003e), /* PORT62CR */ | ||
1360 | PORTCR(63, 0xe605003f), /* PORT63CR */ | ||
1361 | PORTCR(64, 0xe6050040), /* PORT64CR */ | ||
1362 | PORTCR(65, 0xe6050041), /* PORT65CR */ | ||
1363 | PORTCR(66, 0xe6050042), /* PORT66CR */ | ||
1364 | PORTCR(67, 0xe6050043), /* PORT67CR */ | ||
1365 | PORTCR(68, 0xe6050044), /* PORT68CR */ | ||
1366 | PORTCR(69, 0xe6050045), /* PORT69CR */ | ||
1367 | |||
1368 | PORTCR(70, 0xe6050046), /* PORT70CR */ | ||
1369 | PORTCR(71, 0xe6050047), /* PORT71CR */ | ||
1370 | PORTCR(72, 0xe6050048), /* PORT72CR */ | ||
1371 | PORTCR(73, 0xe6050049), /* PORT73CR */ | ||
1372 | PORTCR(74, 0xe605004a), /* PORT74CR */ | ||
1373 | PORTCR(75, 0xe605004b), /* PORT75CR */ | ||
1374 | PORTCR(76, 0xe605004c), /* PORT76CR */ | ||
1375 | PORTCR(77, 0xe605004d), /* PORT77CR */ | ||
1376 | PORTCR(78, 0xe605004e), /* PORT78CR */ | ||
1377 | PORTCR(79, 0xe605004f), /* PORT79CR */ | ||
1378 | |||
1379 | PORTCR(80, 0xe6050050), /* PORT80CR */ | ||
1380 | PORTCR(81, 0xe6050051), /* PORT81CR */ | ||
1381 | PORTCR(82, 0xe6050052), /* PORT82CR */ | ||
1382 | PORTCR(83, 0xe6050053), /* PORT83CR */ | ||
1383 | PORTCR(84, 0xe6050054), /* PORT84CR */ | ||
1384 | PORTCR(85, 0xe6050055), /* PORT85CR */ | ||
1385 | PORTCR(86, 0xe6050056), /* PORT86CR */ | ||
1386 | PORTCR(87, 0xe6050057), /* PORT87CR */ | ||
1387 | PORTCR(88, 0xe6051058), /* PORT88CR */ | ||
1388 | PORTCR(89, 0xe6051059), /* PORT89CR */ | ||
1389 | |||
1390 | PORTCR(90, 0xe605105a), /* PORT90CR */ | ||
1391 | PORTCR(91, 0xe605105b), /* PORT91CR */ | ||
1392 | PORTCR(92, 0xe605105c), /* PORT92CR */ | ||
1393 | PORTCR(93, 0xe605105d), /* PORT93CR */ | ||
1394 | PORTCR(94, 0xe605105e), /* PORT94CR */ | ||
1395 | PORTCR(95, 0xe605105f), /* PORT95CR */ | ||
1396 | PORTCR(96, 0xe6051060), /* PORT96CR */ | ||
1397 | PORTCR(97, 0xe6051061), /* PORT97CR */ | ||
1398 | PORTCR(98, 0xe6051062), /* PORT98CR */ | ||
1399 | PORTCR(99, 0xe6051063), /* PORT99CR */ | ||
1400 | |||
1401 | PORTCR(100, 0xe6051064), /* PORT100CR */ | ||
1402 | PORTCR(101, 0xe6051065), /* PORT101CR */ | ||
1403 | PORTCR(102, 0xe6051066), /* PORT102CR */ | ||
1404 | PORTCR(103, 0xe6051067), /* PORT103CR */ | ||
1405 | PORTCR(104, 0xe6051068), /* PORT104CR */ | ||
1406 | PORTCR(105, 0xe6051069), /* PORT105CR */ | ||
1407 | PORTCR(106, 0xe605106a), /* PORT106CR */ | ||
1408 | PORTCR(107, 0xe605106b), /* PORT107CR */ | ||
1409 | PORTCR(108, 0xe605106c), /* PORT108CR */ | ||
1410 | PORTCR(109, 0xe605106d), /* PORT109CR */ | ||
1411 | |||
1412 | PORTCR(110, 0xe605106e), /* PORT110CR */ | ||
1413 | PORTCR(111, 0xe605106f), /* PORT111CR */ | ||
1414 | PORTCR(112, 0xe6051070), /* PORT112CR */ | ||
1415 | PORTCR(113, 0xe6051071), /* PORT113CR */ | ||
1416 | PORTCR(114, 0xe6051072), /* PORT114CR */ | ||
1417 | PORTCR(115, 0xe6051073), /* PORT115CR */ | ||
1418 | PORTCR(116, 0xe6051074), /* PORT116CR */ | ||
1419 | PORTCR(117, 0xe6051075), /* PORT117CR */ | ||
1420 | PORTCR(118, 0xe6051076), /* PORT118CR */ | ||
1421 | PORTCR(119, 0xe6051077), /* PORT119CR */ | ||
1422 | |||
1423 | PORTCR(120, 0xe6051078), /* PORT120CR */ | ||
1424 | PORTCR(121, 0xe6051079), /* PORT121CR */ | ||
1425 | PORTCR(122, 0xe605107a), /* PORT122CR */ | ||
1426 | PORTCR(123, 0xe605107b), /* PORT123CR */ | ||
1427 | PORTCR(124, 0xe605107c), /* PORT124CR */ | ||
1428 | PORTCR(125, 0xe605107d), /* PORT125CR */ | ||
1429 | PORTCR(126, 0xe605107e), /* PORT126CR */ | ||
1430 | PORTCR(127, 0xe605107f), /* PORT127CR */ | ||
1431 | PORTCR(128, 0xe6051080), /* PORT128CR */ | ||
1432 | PORTCR(129, 0xe6051081), /* PORT129CR */ | ||
1433 | |||
1434 | PORTCR(130, 0xe6051082), /* PORT130CR */ | ||
1435 | PORTCR(131, 0xe6051083), /* PORT131CR */ | ||
1436 | PORTCR(132, 0xe6051084), /* PORT132CR */ | ||
1437 | PORTCR(133, 0xe6051085), /* PORT133CR */ | ||
1438 | PORTCR(134, 0xe6051086), /* PORT134CR */ | ||
1439 | PORTCR(135, 0xe6051087), /* PORT135CR */ | ||
1440 | PORTCR(136, 0xe6051088), /* PORT136CR */ | ||
1441 | PORTCR(137, 0xe6051089), /* PORT137CR */ | ||
1442 | PORTCR(138, 0xe605108a), /* PORT138CR */ | ||
1443 | PORTCR(139, 0xe605108b), /* PORT139CR */ | ||
1444 | |||
1445 | PORTCR(140, 0xe605108c), /* PORT140CR */ | ||
1446 | PORTCR(141, 0xe605108d), /* PORT141CR */ | ||
1447 | PORTCR(142, 0xe605108e), /* PORT142CR */ | ||
1448 | PORTCR(143, 0xe605108f), /* PORT143CR */ | ||
1449 | PORTCR(144, 0xe6051090), /* PORT144CR */ | ||
1450 | PORTCR(145, 0xe6051091), /* PORT145CR */ | ||
1451 | PORTCR(146, 0xe6051092), /* PORT146CR */ | ||
1452 | PORTCR(147, 0xe6051093), /* PORT147CR */ | ||
1453 | PORTCR(148, 0xe6051094), /* PORT148CR */ | ||
1454 | PORTCR(149, 0xe6051095), /* PORT149CR */ | ||
1455 | |||
1456 | PORTCR(150, 0xe6051096), /* PORT150CR */ | ||
1457 | PORTCR(151, 0xe6051097), /* PORT151CR */ | ||
1458 | PORTCR(152, 0xe6051098), /* PORT152CR */ | ||
1459 | PORTCR(153, 0xe6051099), /* PORT153CR */ | ||
1460 | PORTCR(154, 0xe605109a), /* PORT154CR */ | ||
1461 | PORTCR(155, 0xe605109b), /* PORT155CR */ | ||
1462 | PORTCR(156, 0xe605109c), /* PORT156CR */ | ||
1463 | PORTCR(157, 0xe605109d), /* PORT157CR */ | ||
1464 | PORTCR(158, 0xe605109e), /* PORT158CR */ | ||
1465 | PORTCR(159, 0xe605109f), /* PORT159CR */ | ||
1466 | |||
1467 | PORTCR(160, 0xe60510a0), /* PORT160CR */ | ||
1468 | PORTCR(161, 0xe60510a1), /* PORT161CR */ | ||
1469 | PORTCR(162, 0xe60510a2), /* PORT162CR */ | ||
1470 | PORTCR(163, 0xe60510a3), /* PORT163CR */ | ||
1471 | PORTCR(164, 0xe60510a4), /* PORT164CR */ | ||
1472 | PORTCR(165, 0xe60510a5), /* PORT165CR */ | ||
1473 | PORTCR(166, 0xe60510a6), /* PORT166CR */ | ||
1474 | PORTCR(167, 0xe60510a7), /* PORT167CR */ | ||
1475 | PORTCR(168, 0xe60510a8), /* PORT168CR */ | ||
1476 | PORTCR(169, 0xe60510a9), /* PORT169CR */ | ||
1477 | |||
1478 | PORTCR(170, 0xe60510aa), /* PORT170CR */ | ||
1479 | PORTCR(171, 0xe60510ab), /* PORT171CR */ | ||
1480 | PORTCR(172, 0xe60510ac), /* PORT172CR */ | ||
1481 | PORTCR(173, 0xe60510ad), /* PORT173CR */ | ||
1482 | PORTCR(174, 0xe60510ae), /* PORT174CR */ | ||
1483 | PORTCR(175, 0xe60520af), /* PORT175CR */ | ||
1484 | PORTCR(176, 0xe60520b0), /* PORT176CR */ | ||
1485 | PORTCR(177, 0xe60520b1), /* PORT177CR */ | ||
1486 | PORTCR(178, 0xe60520b2), /* PORT178CR */ | ||
1487 | PORTCR(179, 0xe60520b3), /* PORT179CR */ | ||
1488 | |||
1489 | PORTCR(180, 0xe60520b4), /* PORT180CR */ | ||
1490 | PORTCR(181, 0xe60520b5), /* PORT181CR */ | ||
1491 | PORTCR(182, 0xe60520b6), /* PORT182CR */ | ||
1492 | PORTCR(183, 0xe60520b7), /* PORT183CR */ | ||
1493 | PORTCR(184, 0xe60520b8), /* PORT184CR */ | ||
1494 | PORTCR(185, 0xe60520b9), /* PORT185CR */ | ||
1495 | PORTCR(186, 0xe60520ba), /* PORT186CR */ | ||
1496 | PORTCR(187, 0xe60520bb), /* PORT187CR */ | ||
1497 | PORTCR(188, 0xe60520bc), /* PORT188CR */ | ||
1498 | PORTCR(189, 0xe60520bd), /* PORT189CR */ | ||
1499 | |||
1500 | PORTCR(190, 0xe60520be), /* PORT190CR */ | ||
1501 | PORTCR(191, 0xe60520bf), /* PORT191CR */ | ||
1502 | PORTCR(192, 0xe60520c0), /* PORT192CR */ | ||
1503 | PORTCR(193, 0xe60520c1), /* PORT193CR */ | ||
1504 | PORTCR(194, 0xe60520c2), /* PORT194CR */ | ||
1505 | PORTCR(195, 0xe60520c3), /* PORT195CR */ | ||
1506 | PORTCR(196, 0xe60520c4), /* PORT196CR */ | ||
1507 | PORTCR(197, 0xe60520c5), /* PORT197CR */ | ||
1508 | PORTCR(198, 0xe60520c6), /* PORT198CR */ | ||
1509 | PORTCR(199, 0xe60520c7), /* PORT199CR */ | ||
1510 | |||
1511 | PORTCR(200, 0xe60520c8), /* PORT200CR */ | ||
1512 | PORTCR(201, 0xe60520c9), /* PORT201CR */ | ||
1513 | PORTCR(202, 0xe60520ca), /* PORT202CR */ | ||
1514 | PORTCR(203, 0xe60520cb), /* PORT203CR */ | ||
1515 | PORTCR(204, 0xe60520cc), /* PORT204CR */ | ||
1516 | PORTCR(205, 0xe60520cd), /* PORT205CR */ | ||
1517 | PORTCR(206, 0xe60520ce), /* PORT206CR */ | ||
1518 | PORTCR(207, 0xe60520cf), /* PORT207CR */ | ||
1519 | PORTCR(208, 0xe60520d0), /* PORT208CR */ | ||
1520 | PORTCR(209, 0xe60520d1), /* PORT209CR */ | ||
1521 | |||
1522 | PORTCR(210, 0xe60520d2), /* PORT210CR */ | ||
1523 | PORTCR(211, 0xe60520d3), /* PORT211CR */ | ||
1524 | PORTCR(212, 0xe60520d4), /* PORT212CR */ | ||
1525 | PORTCR(213, 0xe60520d5), /* PORT213CR */ | ||
1526 | PORTCR(214, 0xe60520d6), /* PORT214CR */ | ||
1527 | PORTCR(215, 0xe60520d7), /* PORT215CR */ | ||
1528 | PORTCR(216, 0xe60520d8), /* PORT216CR */ | ||
1529 | PORTCR(217, 0xe60520d9), /* PORT217CR */ | ||
1530 | PORTCR(218, 0xe60520da), /* PORT218CR */ | ||
1531 | PORTCR(219, 0xe60520db), /* PORT219CR */ | ||
1532 | |||
1533 | PORTCR(220, 0xe60520dc), /* PORT220CR */ | ||
1534 | PORTCR(221, 0xe60520dd), /* PORT221CR */ | ||
1535 | PORTCR(222, 0xe60520de), /* PORT222CR */ | ||
1536 | PORTCR(223, 0xe60520df), /* PORT223CR */ | ||
1537 | PORTCR(224, 0xe60520e0), /* PORT224CR */ | ||
1538 | PORTCR(225, 0xe60520e1), /* PORT225CR */ | ||
1539 | PORTCR(226, 0xe60520e2), /* PORT226CR */ | ||
1540 | PORTCR(227, 0xe60520e3), /* PORT227CR */ | ||
1541 | PORTCR(228, 0xe60520e4), /* PORT228CR */ | ||
1542 | PORTCR(229, 0xe60520e5), /* PORT229CR */ | ||
1543 | |||
1544 | PORTCR(230, 0xe60520e6), /* PORT230CR */ | ||
1545 | PORTCR(231, 0xe60520e7), /* PORT231CR */ | ||
1546 | PORTCR(232, 0xe60520e8), /* PORT232CR */ | ||
1547 | PORTCR(233, 0xe60520e9), /* PORT233CR */ | ||
1548 | PORTCR(234, 0xe60520ea), /* PORT234CR */ | ||
1549 | PORTCR(235, 0xe60520eb), /* PORT235CR */ | ||
1550 | PORTCR(236, 0xe60530ec), /* PORT236CR */ | ||
1551 | PORTCR(237, 0xe60530ed), /* PORT237CR */ | ||
1552 | PORTCR(238, 0xe60530ee), /* PORT238CR */ | ||
1553 | PORTCR(239, 0xe60530ef), /* PORT239CR */ | ||
1554 | |||
1555 | PORTCR(240, 0xe60530f0), /* PORT240CR */ | ||
1556 | PORTCR(241, 0xe60530f1), /* PORT241CR */ | ||
1557 | PORTCR(242, 0xe60530f2), /* PORT242CR */ | ||
1558 | PORTCR(243, 0xe60530f3), /* PORT243CR */ | ||
1559 | PORTCR(244, 0xe60530f4), /* PORT244CR */ | ||
1560 | PORTCR(245, 0xe60530f5), /* PORT245CR */ | ||
1561 | PORTCR(246, 0xe60530f6), /* PORT246CR */ | ||
1562 | PORTCR(247, 0xe60530f7), /* PORT247CR */ | ||
1563 | PORTCR(248, 0xe60530f8), /* PORT248CR */ | ||
1564 | PORTCR(249, 0xe60530f9), /* PORT249CR */ | ||
1565 | |||
1566 | PORTCR(250, 0xe60530fa), /* PORT250CR */ | ||
1567 | PORTCR(251, 0xe60530fb), /* PORT251CR */ | ||
1568 | PORTCR(252, 0xe60530fc), /* PORT252CR */ | ||
1569 | PORTCR(253, 0xe60530fd), /* PORT253CR */ | ||
1570 | PORTCR(254, 0xe60530fe), /* PORT254CR */ | ||
1571 | PORTCR(255, 0xe60530ff), /* PORT255CR */ | ||
1572 | PORTCR(256, 0xe6053100), /* PORT256CR */ | ||
1573 | PORTCR(257, 0xe6053101), /* PORT257CR */ | ||
1574 | PORTCR(258, 0xe6053102), /* PORT258CR */ | ||
1575 | PORTCR(259, 0xe6053103), /* PORT259CR */ | ||
1576 | |||
1577 | PORTCR(260, 0xe6053104), /* PORT260CR */ | ||
1578 | PORTCR(261, 0xe6053105), /* PORT261CR */ | ||
1579 | PORTCR(262, 0xe6053106), /* PORT262CR */ | ||
1580 | PORTCR(263, 0xe6053107), /* PORT263CR */ | ||
1581 | PORTCR(264, 0xe6053108), /* PORT264CR */ | ||
1582 | PORTCR(265, 0xe6053109), /* PORT265CR */ | ||
1583 | PORTCR(266, 0xe605310a), /* PORT266CR */ | ||
1584 | PORTCR(267, 0xe605310b), /* PORT267CR */ | ||
1585 | PORTCR(268, 0xe605310c), /* PORT268CR */ | ||
1586 | PORTCR(269, 0xe605310d), /* PORT269CR */ | ||
1587 | |||
1588 | PORTCR(270, 0xe605310e), /* PORT270CR */ | ||
1589 | PORTCR(271, 0xe605310f), /* PORT271CR */ | ||
1590 | PORTCR(272, 0xe6053110), /* PORT272CR */ | ||
1591 | |||
1592 | { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) { | ||
1593 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
1594 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
1595 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
1596 | 0, 0, | ||
1597 | 0, 0, | ||
1598 | 0, 0, | ||
1599 | 0, 0, | ||
1600 | 0, 0, | ||
1601 | MSELBCR_MSEL2_0, MSELBCR_MSEL2_1, | ||
1602 | 0, 0, | ||
1603 | 0, 0 } | ||
1604 | }, | ||
1605 | { }, | ||
1606 | }; | ||
1607 | |||
1608 | static struct pinmux_data_reg pinmux_data_regs[] = { | ||
1609 | { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) { | ||
1610 | PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA, | ||
1611 | PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA, | ||
1612 | PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA, | ||
1613 | PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA, | ||
1614 | PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA, | ||
1615 | PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA, | ||
1616 | PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA, | ||
1617 | PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA } | ||
1618 | }, | ||
1619 | { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) { | ||
1620 | PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA, | ||
1621 | PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA, | ||
1622 | PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA, | ||
1623 | PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA, | ||
1624 | PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA, | ||
1625 | PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA, | ||
1626 | PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA, | ||
1627 | PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA } | ||
1628 | }, | ||
1629 | { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) { | ||
1630 | PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA, | ||
1631 | PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA, | ||
1632 | PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA, | ||
1633 | PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA, | ||
1634 | PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA, | ||
1635 | PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA, | ||
1636 | PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA, | ||
1637 | PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA } | ||
1638 | }, | ||
1639 | { PINMUX_DATA_REG("PORTD127_096DR", 0xe6055004, 32) { | ||
1640 | PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA, | ||
1641 | PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA, | ||
1642 | PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA, | ||
1643 | PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA, | ||
1644 | PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA, | ||
1645 | PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA, | ||
1646 | PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA, | ||
1647 | PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA } | ||
1648 | }, | ||
1649 | { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055008, 32) { | ||
1650 | PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA, | ||
1651 | PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA, | ||
1652 | PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA, | ||
1653 | PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA, | ||
1654 | PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA, | ||
1655 | PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA, | ||
1656 | PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA, | ||
1657 | PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA } | ||
1658 | }, | ||
1659 | { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056000, 32) { | ||
1660 | PORT191_DATA, PORT190_DATA, PORT189_DATA, PORT188_DATA, | ||
1661 | PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA, | ||
1662 | PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA, | ||
1663 | PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA, | ||
1664 | PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA, | ||
1665 | PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA, | ||
1666 | PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA, | ||
1667 | PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA } | ||
1668 | }, | ||
1669 | { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056004, 32) { | ||
1670 | PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA, | ||
1671 | PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA, | ||
1672 | PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA, | ||
1673 | PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA, | ||
1674 | PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA, | ||
1675 | PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA, | ||
1676 | PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA, | ||
1677 | PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA } | ||
1678 | }, | ||
1679 | { PINMUX_DATA_REG("PORTU255_224DR", 0xe6057000, 32) { | ||
1680 | PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA, | ||
1681 | PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA, | ||
1682 | PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA, | ||
1683 | PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA, | ||
1684 | PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA, | ||
1685 | PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA, | ||
1686 | PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA, | ||
1687 | PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA } | ||
1688 | }, | ||
1689 | { PINMUX_DATA_REG("PORTU287_256DR", 0xe6057004, 32) { | ||
1690 | 0, 0, 0, 0, | ||
1691 | 0, 0, 0, 0, | ||
1692 | 0, 0, 0, 0, | ||
1693 | 0, 0, 0, PORT272_DATA, | ||
1694 | PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA, | ||
1695 | PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA, | ||
1696 | PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA, | ||
1697 | PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA } | ||
1698 | }, | ||
1699 | { }, | ||
1700 | }; | ||
1701 | |||
1702 | static struct pinmux_info sh7367_pinmux_info = { | ||
1703 | .name = "sh7367_pfc", | ||
1704 | .reserved_id = PINMUX_RESERVED, | ||
1705 | .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, | ||
1706 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, | ||
1707 | .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, | ||
1708 | .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END }, | ||
1709 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, | ||
1710 | .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, | ||
1711 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, | ||
1712 | |||
1713 | .first_gpio = GPIO_PORT0, | ||
1714 | .last_gpio = GPIO_FN_DIVLOCK, | ||
1715 | |||
1716 | .gpios = pinmux_gpios, | ||
1717 | .cfg_regs = pinmux_config_regs, | ||
1718 | .data_regs = pinmux_data_regs, | ||
1719 | |||
1720 | .gpio_data = pinmux_data, | ||
1721 | .gpio_data_size = ARRAY_SIZE(pinmux_data), | ||
1722 | }; | ||
1723 | |||
1724 | void sh7367_pinmux_init(void) | ||
1725 | { | ||
1726 | register_pinmux(&sh7367_pinmux_info); | ||
1727 | } | ||
diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c deleted file mode 100644 index f3117f67fa25..000000000000 --- a/arch/arm/mach-shmobile/pfc-sh7377.c +++ /dev/null | |||
@@ -1,1688 +0,0 @@ | |||
1 | /* | ||
2 | * sh7377 processor support - PFC hardware block | ||
3 | * | ||
4 | * Copyright (C) 2010 NISHIMOTO Hiroki | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License as | ||
8 | * published by the Free Software Foundation; version 2 of the | ||
9 | * License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/sh_pfc.h> | ||
23 | #include <mach/sh7377.h> | ||
24 | |||
25 | #define CPU_ALL_PORT(fn, pfx, sfx) \ | ||
26 | PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \ | ||
27 | PORT_10(fn, pfx##10, sfx), \ | ||
28 | PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \ | ||
29 | PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \ | ||
30 | PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \ | ||
31 | PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \ | ||
32 | PORT_1(fn, pfx##118, sfx), \ | ||
33 | PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \ | ||
34 | PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \ | ||
35 | PORT_10(fn, pfx##15, sfx), \ | ||
36 | PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \ | ||
37 | PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \ | ||
38 | PORT_1(fn, pfx##164, sfx), \ | ||
39 | PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \ | ||
40 | PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \ | ||
41 | PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \ | ||
42 | PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \ | ||
43 | PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \ | ||
44 | PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \ | ||
45 | PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \ | ||
46 | PORT_1(fn, pfx##260, sfx), PORT_1(fn, pfx##261, sfx), \ | ||
47 | PORT_1(fn, pfx##262, sfx), PORT_1(fn, pfx##263, sfx), \ | ||
48 | PORT_1(fn, pfx##264, sfx) | ||
49 | |||
50 | enum { | ||
51 | PINMUX_RESERVED = 0, | ||
52 | |||
53 | PINMUX_DATA_BEGIN, | ||
54 | PORT_ALL(DATA), /* PORT0_DATA -> PORT264_DATA */ | ||
55 | PINMUX_DATA_END, | ||
56 | |||
57 | PINMUX_INPUT_BEGIN, | ||
58 | PORT_ALL(IN), /* PORT0_IN -> PORT264_IN */ | ||
59 | PINMUX_INPUT_END, | ||
60 | |||
61 | PINMUX_INPUT_PULLUP_BEGIN, | ||
62 | PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */ | ||
63 | PINMUX_INPUT_PULLUP_END, | ||
64 | |||
65 | PINMUX_INPUT_PULLDOWN_BEGIN, | ||
66 | PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */ | ||
67 | PINMUX_INPUT_PULLDOWN_END, | ||
68 | |||
69 | PINMUX_OUTPUT_BEGIN, | ||
70 | PORT_ALL(OUT), /* PORT0_OUT -> PORT264_OUT */ | ||
71 | PINMUX_OUTPUT_END, | ||
72 | |||
73 | PINMUX_FUNCTION_BEGIN, | ||
74 | PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */ | ||
75 | PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */ | ||
76 | PORT_ALL(FN0), /* PORT0_FN0 -> PORT264_FN0 */ | ||
77 | PORT_ALL(FN1), /* PORT0_FN1 -> PORT264_FN1 */ | ||
78 | PORT_ALL(FN2), /* PORT0_FN2 -> PORT264_FN2 */ | ||
79 | PORT_ALL(FN3), /* PORT0_FN3 -> PORT264_FN3 */ | ||
80 | PORT_ALL(FN4), /* PORT0_FN4 -> PORT264_FN4 */ | ||
81 | PORT_ALL(FN5), /* PORT0_FN5 -> PORT264_FN5 */ | ||
82 | PORT_ALL(FN6), /* PORT0_FN6 -> PORT264_FN6 */ | ||
83 | PORT_ALL(FN7), /* PORT0_FN7 -> PORT264_FN7 */ | ||
84 | |||
85 | MSELBCR_MSEL17_1, MSELBCR_MSEL17_0, | ||
86 | MSELBCR_MSEL16_1, MSELBCR_MSEL16_0, | ||
87 | PINMUX_FUNCTION_END, | ||
88 | |||
89 | PINMUX_MARK_BEGIN, | ||
90 | /* Special Pull-up / Pull-down Functions */ | ||
91 | PORT66_KEYIN0_PU_MARK, PORT67_KEYIN1_PU_MARK, | ||
92 | PORT68_KEYIN2_PU_MARK, PORT69_KEYIN3_PU_MARK, | ||
93 | PORT70_KEYIN4_PU_MARK, PORT71_KEYIN5_PU_MARK, | ||
94 | PORT72_KEYIN6_PU_MARK, | ||
95 | |||
96 | /* 55-1 */ | ||
97 | VBUS_0_MARK, | ||
98 | CPORT0_MARK, | ||
99 | CPORT1_MARK, | ||
100 | CPORT2_MARK, | ||
101 | CPORT3_MARK, | ||
102 | CPORT4_MARK, | ||
103 | CPORT5_MARK, | ||
104 | CPORT6_MARK, | ||
105 | CPORT7_MARK, | ||
106 | CPORT8_MARK, | ||
107 | CPORT9_MARK, | ||
108 | CPORT10_MARK, | ||
109 | CPORT11_MARK, SIN2_MARK, | ||
110 | CPORT12_MARK, XCTS2_MARK, | ||
111 | CPORT13_MARK, RFSPO4_MARK, | ||
112 | CPORT14_MARK, RFSPO5_MARK, | ||
113 | CPORT15_MARK, SCIFA0_SCK_MARK, GPS_AGC2_MARK, | ||
114 | CPORT16_MARK, SCIFA0_TXD_MARK, GPS_AGC3_MARK, | ||
115 | CPORT17_IC_OE_MARK, SOUT2_MARK, | ||
116 | CPORT18_MARK, XRTS2_MARK, PORT19_VIO_CKO2_MARK, | ||
117 | CPORT19_MPORT1_MARK, | ||
118 | CPORT20_MARK, RFSPO6_MARK, | ||
119 | CPORT21_MARK, STATUS0_MARK, | ||
120 | CPORT22_MARK, STATUS1_MARK, | ||
121 | CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK, | ||
122 | B_SYNLD1_MARK, | ||
123 | B_SYNLD2_MARK, SYSENMSK_MARK, | ||
124 | XMAINPS_MARK, | ||
125 | XDIVPS_MARK, | ||
126 | XIDRST_MARK, | ||
127 | IDCLK_MARK, IC_DP_MARK, | ||
128 | IDIO_MARK, IC_DM_MARK, | ||
129 | SOUT1_MARK, SCIFA4_TXD_MARK, M02_BERDAT_MARK, | ||
130 | SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK, | ||
131 | XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK, | ||
132 | XCTS1_MARK, SCIFA4_CTS_MARK, | ||
133 | PCMCLKO_MARK, | ||
134 | SYNC8KO_MARK, | ||
135 | |||
136 | /* 55-2 */ | ||
137 | DNPCM_A_MARK, | ||
138 | UPPCM_A_MARK, | ||
139 | VACK_MARK, | ||
140 | XTALB1L_MARK, | ||
141 | GPS_AGC1_MARK, SCIFA0_RTS_MARK, | ||
142 | GPS_AGC4_MARK, SCIFA0_RXD_MARK, | ||
143 | GPS_PWRDOWN_MARK, SCIFA0_CTS_MARK, | ||
144 | GPS_IM_MARK, | ||
145 | GPS_IS_MARK, | ||
146 | GPS_QM_MARK, | ||
147 | GPS_QS_MARK, | ||
148 | FMSOCK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK, | ||
149 | FMSOOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, IPORT3_MARK, | ||
150 | FMSIOLR_MARK, | ||
151 | FMSOOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, OPORT1_MARK, | ||
152 | FMSIOBT_MARK, | ||
153 | FMSOSLD_MARK, BBIF2_TXD2_MARK, OPORT2_MARK, | ||
154 | FMSOILR_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, OPORT3_MARK, | ||
155 | FMSIILR_MARK, | ||
156 | FMSOIBT_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FMSIIBT_MARK, | ||
157 | FMSISLD_MARK, MFG0_OUT1_MARK, TPU0TO0_MARK, | ||
158 | A0_EA0_MARK, BS_MARK, | ||
159 | A12_EA12_MARK, PORT58_VIO_CKOR_MARK, TPU4TO2_MARK, | ||
160 | A13_EA13_MARK, PORT59_IROUT_MARK, MFG0_OUT2_MARK, TPU0TO1_MARK, | ||
161 | A14_EA14_MARK, PORT60_KEYOUT5_MARK, | ||
162 | A15_EA15_MARK, PORT61_KEYOUT4_MARK, | ||
163 | A16_EA16_MARK, PORT62_KEYOUT3_MARK, MSIOF0_SS1_MARK, | ||
164 | A17_EA17_MARK, PORT63_KEYOUT2_MARK, MSIOF0_TSYNC_MARK, | ||
165 | A18_EA18_MARK, PORT64_KEYOUT1_MARK, MSIOF0_TSCK_MARK, | ||
166 | A19_EA19_MARK, PORT65_KEYOUT0_MARK, MSIOF0_TXD_MARK, | ||
167 | A20_EA20_MARK, PORT66_KEYIN0_MARK, MSIOF0_RSCK_MARK, | ||
168 | A21_EA21_MARK, PORT67_KEYIN1_MARK, MSIOF0_RSYNC_MARK, | ||
169 | A22_EA22_MARK, PORT68_KEYIN2_MARK, MSIOF0_MCK0_MARK, | ||
170 | A23_EA23_MARK, PORT69_KEYIN3_MARK, MSIOF0_MCK1_MARK, | ||
171 | A24_EA24_MARK, PORT70_KEYIN4_MARK, MSIOF0_RXD_MARK, | ||
172 | A25_EA25_MARK, PORT71_KEYIN5_MARK, MSIOF0_SS2_MARK, | ||
173 | A26_MARK, PORT72_KEYIN6_MARK, | ||
174 | D0_ED0_NAF0_MARK, | ||
175 | D1_ED1_NAF1_MARK, | ||
176 | D2_ED2_NAF2_MARK, | ||
177 | D3_ED3_NAF3_MARK, | ||
178 | D4_ED4_NAF4_MARK, | ||
179 | D5_ED5_NAF5_MARK, | ||
180 | D6_ED6_NAF6_MARK, | ||
181 | D7_ED7_NAF7_MARK, | ||
182 | D8_ED8_NAF8_MARK, | ||
183 | D9_ED9_NAF9_MARK, | ||
184 | D10_ED10_NAF10_MARK, | ||
185 | D11_ED11_NAF11_MARK, | ||
186 | D12_ED12_NAF12_MARK, | ||
187 | D13_ED13_NAF13_MARK, | ||
188 | D14_ED14_NAF14_MARK, | ||
189 | D15_ED15_NAF15_MARK, | ||
190 | CS4_MARK, | ||
191 | CS5A_MARK, FMSICK_MARK, | ||
192 | CS5B_MARK, FCE1_MARK, | ||
193 | |||
194 | /* 55-3 */ | ||
195 | CS6B_MARK, XCS2_MARK, CS6A_MARK, DACK0_MARK, | ||
196 | FCE0_MARK, | ||
197 | WAIT_MARK, DREQ0_MARK, | ||
198 | RD_XRD_MARK, | ||
199 | WE0_XWR0_FWE_MARK, | ||
200 | WE1_XWR1_MARK, | ||
201 | FRB_MARK, | ||
202 | CKO_MARK, | ||
203 | NBRSTOUT_MARK, | ||
204 | NBRST_MARK, | ||
205 | GPS_EPPSIN_MARK, | ||
206 | LATCHPULSE_MARK, | ||
207 | LTESIGNAL_MARK, | ||
208 | LEGACYSTATE_MARK, | ||
209 | TCKON_MARK, | ||
210 | VIO_VD_MARK, PORT128_KEYOUT0_MARK, IPORT0_MARK, | ||
211 | VIO_HD_MARK, PORT129_KEYOUT1_MARK, IPORT1_MARK, | ||
212 | VIO_D0_MARK, PORT130_KEYOUT2_MARK, PORT130_MSIOF2_RXD_MARK, | ||
213 | VIO_D1_MARK, PORT131_KEYOUT3_MARK, PORT131_MSIOF2_SS1_MARK, | ||
214 | VIO_D2_MARK, PORT132_KEYOUT4_MARK, PORT132_MSIOF2_SS2_MARK, | ||
215 | VIO_D3_MARK, PORT133_KEYOUT5_MARK, PORT133_MSIOF2_TSYNC_MARK, | ||
216 | VIO_D4_MARK, PORT134_KEYIN0_MARK, PORT134_MSIOF2_TXD_MARK, | ||
217 | VIO_D5_MARK, PORT135_KEYIN1_MARK, PORT135_MSIOF2_TSCK_MARK, | ||
218 | VIO_D6_MARK, PORT136_KEYIN2_MARK, | ||
219 | VIO_D7_MARK, PORT137_KEYIN3_MARK, | ||
220 | VIO_D8_MARK, M9_SLCD_A01_MARK, PORT138_FSIAOMC_MARK, | ||
221 | VIO_D9_MARK, M10_SLCD_CK1_MARK, PORT139_FSIAOLR_MARK, | ||
222 | VIO_D10_MARK, M11_SLCD_SO1_MARK, TPU0TO2_MARK, PORT140_FSIAOBT_MARK, | ||
223 | VIO_D11_MARK, M12_SLCD_CE1_MARK, TPU0TO3_MARK, PORT141_FSIAOSLD_MARK, | ||
224 | VIO_D12_MARK, M13_BSW_MARK, PORT142_FSIACK_MARK, | ||
225 | VIO_D13_MARK, M14_GSW_MARK, PORT143_FSIAILR_MARK, | ||
226 | VIO_D14_MARK, M15_RSW_MARK, PORT144_FSIAIBT_MARK, | ||
227 | VIO_D15_MARK, TPU1TO3_MARK, PORT145_FSIAISLD_MARK, | ||
228 | VIO_CLK_MARK, PORT146_KEYIN4_MARK, IPORT2_MARK, | ||
229 | VIO_FIELD_MARK, PORT147_KEYIN5_MARK, | ||
230 | VIO_CKO_MARK, PORT148_KEYIN6_MARK, | ||
231 | A27_MARK, RDWR_XWE_MARK, MFG0_IN1_MARK, | ||
232 | MFG0_IN2_MARK, | ||
233 | TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK, | ||
234 | TS_SDAT3_MARK, MSIOF2_RSYNC_MARK, | ||
235 | TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK, | ||
236 | SOUT3_MARK, SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK, | ||
237 | SIN3_MARK, SCIFA2_RXD1_MARK, MSIOF2_MCK1_MARK, | ||
238 | XRTS3_MARK, SCIFA2_RTS1_MARK, PORT156_MSIOF2_SS2_MARK, | ||
239 | XCTS3_MARK, SCIFA2_CTS1_MARK, PORT157_MSIOF2_RXD_MARK, | ||
240 | |||
241 | /* 55-4 */ | ||
242 | DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK, | ||
243 | PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK, | ||
244 | PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK, SOUT0_MARK, | ||
245 | PORT161_SCIFB_CTS_MARK, PORT161_SCIFA5_CTS_MARK, XCTS0_MARK, | ||
246 | MFG3_IN2_MARK, | ||
247 | PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK, SIN0_MARK, | ||
248 | MFG3_IN1_MARK, | ||
249 | PORT163_SCIFB_RTS_MARK, PORT163_SCIFA5_RTS_MARK, XRTS0_MARK, | ||
250 | MFG3_OUT1_MARK, TPU3TO0_MARK, | ||
251 | LCDD0_MARK, PORT192_KEYOUT0_MARK, EXT_CKI_MARK, | ||
252 | LCDD1_MARK, PORT193_KEYOUT1_MARK, PORT193_SCIFA5_CTS_MARK, | ||
253 | BBIF2_TSYNC1_MARK, | ||
254 | LCDD2_MARK, PORT194_KEYOUT2_MARK, PORT194_SCIFA5_RTS_MARK, | ||
255 | BBIF2_TSCK1_MARK, | ||
256 | LCDD3_MARK, PORT195_KEYOUT3_MARK, PORT195_SCIFA5_RXD_MARK, | ||
257 | BBIF2_TXD1_MARK, | ||
258 | LCDD4_MARK, PORT196_KEYOUT4_MARK, PORT196_SCIFA5_TXD_MARK, | ||
259 | LCDD5_MARK, PORT197_KEYOUT5_MARK, PORT197_SCIFA5_SCK_MARK, | ||
260 | MFG2_OUT2_MARK, | ||
261 | TPU2TO1_MARK, | ||
262 | LCDD6_MARK, XWR2_MARK, | ||
263 | LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK, XWR3_MARK, | ||
264 | LCDD8_MARK, PORT200_KEYIN0_MARK, VIO_DR0_MARK, D16_MARK, ED16_MARK, | ||
265 | LCDD9_MARK, PORT201_KEYIN1_MARK, VIO_DR1_MARK, D17_MARK, ED17_MARK, | ||
266 | LCDD10_MARK, PORT202_KEYIN2_MARK, VIO_DR2_MARK, D18_MARK, ED18_MARK, | ||
267 | LCDD11_MARK, PORT203_KEYIN3_MARK, VIO_DR3_MARK, D19_MARK, ED19_MARK, | ||
268 | LCDD12_MARK, PORT204_KEYIN4_MARK, VIO_DR4_MARK, D20_MARK, ED20_MARK, | ||
269 | LCDD13_MARK, PORT205_KEYIN5_MARK, VIO_DR5_MARK, D21_MARK, ED21_MARK, | ||
270 | LCDD14_MARK, PORT206_KEYIN6_MARK, VIO_DR6_MARK, D22_MARK, ED22_MARK, | ||
271 | LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, PORT207_KEYOUT0_MARK, | ||
272 | VIO_DR7_MARK, D23_MARK, ED23_MARK, | ||
273 | LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, PORT208_KEYOUT1_MARK, | ||
274 | VIO_VDR_MARK, D24_MARK, ED24_MARK, | ||
275 | LCDD17_MARK, PORT209_KEYOUT2_MARK, VIO_HDR_MARK, D25_MARK, ED25_MARK, | ||
276 | LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK, ED26_MARK, | ||
277 | LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK, ED27_MARK, | ||
278 | LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK, ED28_MARK, | ||
279 | LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK, ED29_MARK, | ||
280 | LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK, ED30_MARK, | ||
281 | LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK, ED31_MARK, | ||
282 | LCDDCK_MARK, LCDWR_MARK, PORT216_KEYOUT3_MARK, VIO_CLKR_MARK, | ||
283 | LCDRD_MARK, DACK2_MARK, MSIOF0L_TSYNC_MARK, | ||
284 | LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK, | ||
285 | PORT218_VIO_CKOR_MARK, PORT218_KEYOUT4_MARK, | ||
286 | LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_TSCK_MARK, | ||
287 | LCDVSYN_MARK, LCDVSYN2_MARK, PORT220_KEYOUT5_MARK, | ||
288 | LCDLCLK_MARK, DREQ1_MARK, PWEN_MARK, MSIOF0L_RXD_MARK, | ||
289 | LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK, | ||
290 | SCIFA1_TXD_MARK, OVCN2_MARK, | ||
291 | EXTLP_MARK, SCIFA1_SCK_MARK, USBTERM_MARK, PORT226_VIO_CKO2_MARK, | ||
292 | SCIFA1_RTS_MARK, IDIN_MARK, | ||
293 | SCIFA1_RXD_MARK, | ||
294 | SCIFA1_CTS_MARK, MFG1_IN1_MARK, | ||
295 | MSIOF1_TXD_MARK, SCIFA2_TXD2_MARK, PORT230_FSIAOMC_MARK, | ||
296 | MSIOF1_TSYNC_MARK, SCIFA2_CTS2_MARK, PORT231_FSIAOLR_MARK, | ||
297 | MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK, PORT232_FSIAOBT_MARK, | ||
298 | MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK, GPS_VCOTRIG_MARK, | ||
299 | PORT233_FSIACK_MARK, | ||
300 | MSIOF1_RSCK_MARK, SCIFA2_RTS2_MARK, PORT234_FSIAOSLD_MARK, | ||
301 | MSIOF1_RSYNC_MARK, OPORT0_MARK, MFG1_IN2_MARK, PORT235_FSIAILR_MARK, | ||
302 | MSIOF1_MCK0_MARK, I2C_SDA2_MARK, PORT236_FSIAIBT_MARK, | ||
303 | MSIOF1_MCK1_MARK, I2C_SCL2_MARK, PORT237_FSIAISLD_MARK, | ||
304 | MSIOF1_SS1_MARK, EDBGREQ3_MARK, | ||
305 | |||
306 | /* 55-5 */ | ||
307 | MSIOF1_SS2_MARK, | ||
308 | SCIFA6_TXD_MARK, | ||
309 | PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK, | ||
310 | TPU4TO0_MARK, | ||
311 | PORT242_IRDA_IN_MARK, MFG4_IN2_MARK, | ||
312 | PORT243_IRDA_FIRSEL_MARK, PORT243_VIO_CKO2_MARK, | ||
313 | PORT244_SCIFA5_CTS_MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS_MARK, | ||
314 | PORT244_MSIOF2_RXD_MARK, | ||
315 | PORT245_SCIFA5_RTS_MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS_MARK, | ||
316 | PORT245_MSIOF2_TXD_MARK, | ||
317 | PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK, | ||
318 | TPU1TO0_MARK, | ||
319 | PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK, | ||
320 | TPU3TO1_MARK, | ||
321 | PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK, | ||
322 | TPU2TO0_MARK, | ||
323 | PORT248_MSIOF2_TSCK_MARK, | ||
324 | PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_MSIOF2_TSYNC_MARK, | ||
325 | SDHICLK0_MARK, TCK2_SWCLK_MC0_MARK, | ||
326 | SDHICD0_MARK, | ||
327 | SDHID0_0_MARK, TMS2_SWDIO_MC0_MARK, | ||
328 | SDHID0_1_MARK, TDO2_SWO0_MC0_MARK, | ||
329 | SDHID0_2_MARK, TDI2_MARK, | ||
330 | SDHID0_3_MARK, RTCK2_SWO1_MC0_MARK, | ||
331 | SDHICMD0_MARK, TRST2_MARK, | ||
332 | SDHIWP0_MARK, EDBGREQ2_MARK, | ||
333 | SDHICLK1_MARK, TCK3_SWCLK_MC1_MARK, | ||
334 | SDHID1_0_MARK, M11_SLCD_SO2_MARK, TS_SPSYNC2_MARK, | ||
335 | TMS3_SWDIO_MC1_MARK, | ||
336 | SDHID1_1_MARK, M9_SLCD_A02_MARK, TS_SDAT2_MARK, TDO3_SWO0_MC1_MARK, | ||
337 | SDHID1_2_MARK, M10_SLCD_CK2_MARK, TS_SDEN2_MARK, TDI3_MARK, | ||
338 | SDHID1_3_MARK, M12_SLCD_CE2_MARK, TS_SCK2_MARK, RTCK3_SWO1_MC1_MARK, | ||
339 | SDHICMD1_MARK, TRST3_MARK, | ||
340 | RESETOUTS_MARK, | ||
341 | PINMUX_MARK_END, | ||
342 | }; | ||
343 | |||
344 | static pinmux_enum_t pinmux_data[] = { | ||
345 | /* specify valid pin states for each pin in GPIO mode */ | ||
346 | /* 55-1 (GPIO) */ | ||
347 | PORT_DATA_I_PD(0), PORT_DATA_I_PU(1), | ||
348 | PORT_DATA_I_PU(2), PORT_DATA_I_PU(3), | ||
349 | PORT_DATA_I_PU(4), PORT_DATA_I_PU(5), | ||
350 | PORT_DATA_I_PU(6), PORT_DATA_I_PU(7), | ||
351 | PORT_DATA_I_PU(8), PORT_DATA_I_PU(9), | ||
352 | PORT_DATA_I_PU(10), PORT_DATA_I_PU(11), | ||
353 | PORT_DATA_IO_PU(12), PORT_DATA_IO_PU(13), | ||
354 | PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15), | ||
355 | PORT_DATA_O(16), PORT_DATA_IO(17), | ||
356 | PORT_DATA_O(18), PORT_DATA_O(19), | ||
357 | PORT_DATA_O(20), PORT_DATA_O(21), | ||
358 | PORT_DATA_O(22), PORT_DATA_O(23), | ||
359 | PORT_DATA_O(24), PORT_DATA_I_PD(25), | ||
360 | PORT_DATA_I_PD(26), PORT_DATA_O(27), | ||
361 | PORT_DATA_O(28), PORT_DATA_O(29), | ||
362 | PORT_DATA_IO(30), PORT_DATA_IO_PU(31), | ||
363 | PORT_DATA_IO_PD(32), PORT_DATA_I_PU(33), | ||
364 | PORT_DATA_IO_PD(34), PORT_DATA_I_PU_PD(35), | ||
365 | PORT_DATA_O(36), PORT_DATA_IO(37), | ||
366 | |||
367 | /* 55-2 (GPIO) */ | ||
368 | PORT_DATA_O(38), PORT_DATA_I_PU(39), | ||
369 | PORT_DATA_I_PU_PD(40), PORT_DATA_O(41), | ||
370 | PORT_DATA_IO_PD(42), PORT_DATA_IO_PD(43), | ||
371 | PORT_DATA_IO_PD(44), PORT_DATA_I_PD(45), | ||
372 | PORT_DATA_I_PD(46), PORT_DATA_I_PD(47), | ||
373 | PORT_DATA_I_PD(48), PORT_DATA_IO_PU_PD(49), | ||
374 | PORT_DATA_IO_PD(50), PORT_DATA_IO_PD(51), | ||
375 | PORT_DATA_O(52), PORT_DATA_IO_PU_PD(53), | ||
376 | PORT_DATA_IO_PU_PD(54), PORT_DATA_IO_PD(55), | ||
377 | PORT_DATA_I_PU_PD(56), PORT_DATA_IO(57), | ||
378 | PORT_DATA_IO(58), PORT_DATA_IO(59), | ||
379 | PORT_DATA_IO(60), PORT_DATA_IO(61), | ||
380 | PORT_DATA_IO_PD(62), PORT_DATA_IO_PD(63), | ||
381 | PORT_DATA_IO_PD(64), PORT_DATA_IO_PD(65), | ||
382 | PORT_DATA_IO_PU_PD(66), PORT_DATA_IO_PU_PD(67), | ||
383 | PORT_DATA_IO_PU_PD(68), PORT_DATA_IO_PU_PD(69), | ||
384 | PORT_DATA_IO_PU_PD(70), PORT_DATA_IO_PU_PD(71), | ||
385 | PORT_DATA_IO_PU_PD(72), PORT_DATA_I_PU_PD(73), | ||
386 | PORT_DATA_IO_PU(74), PORT_DATA_IO_PU(75), | ||
387 | PORT_DATA_IO_PU(76), PORT_DATA_IO_PU(77), | ||
388 | PORT_DATA_IO_PU(78), PORT_DATA_IO_PU(79), | ||
389 | PORT_DATA_IO_PU(80), PORT_DATA_IO_PU(81), | ||
390 | PORT_DATA_IO_PU(82), PORT_DATA_IO_PU(83), | ||
391 | PORT_DATA_IO_PU(84), PORT_DATA_IO_PU(85), | ||
392 | PORT_DATA_IO_PU(86), PORT_DATA_IO_PU(87), | ||
393 | PORT_DATA_IO_PU(88), PORT_DATA_IO_PU(89), | ||
394 | PORT_DATA_O(90), PORT_DATA_IO_PU(91), | ||
395 | PORT_DATA_O(92), | ||
396 | |||
397 | /* 55-3 (GPIO) */ | ||
398 | PORT_DATA_IO_PU(93), | ||
399 | PORT_DATA_O(94), | ||
400 | PORT_DATA_I_PU_PD(95), | ||
401 | PORT_DATA_IO(96), PORT_DATA_IO(97), | ||
402 | PORT_DATA_IO(98), PORT_DATA_I_PU(99), | ||
403 | PORT_DATA_O(100), PORT_DATA_O(101), | ||
404 | PORT_DATA_I_PU(102), PORT_DATA_IO_PD(103), | ||
405 | PORT_DATA_I_PD(104), PORT_DATA_I_PD(105), | ||
406 | PORT_DATA_I_PD(106), PORT_DATA_I_PD(107), | ||
407 | PORT_DATA_I_PD(108), PORT_DATA_IO_PD(109), | ||
408 | PORT_DATA_IO_PD(110), PORT_DATA_I_PD(111), | ||
409 | PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113), | ||
410 | PORT_DATA_IO_PD(114), PORT_DATA_I_PD(115), | ||
411 | PORT_DATA_I_PD(116), PORT_DATA_IO_PD(117), | ||
412 | PORT_DATA_I_PD(118), PORT_DATA_IO_PD(128), | ||
413 | PORT_DATA_IO_PD(129), PORT_DATA_IO_PD(130), | ||
414 | PORT_DATA_IO_PD(131), PORT_DATA_IO_PD(132), | ||
415 | PORT_DATA_IO_PD(133), PORT_DATA_IO_PU_PD(134), | ||
416 | PORT_DATA_IO_PU_PD(135), PORT_DATA_IO_PU_PD(136), | ||
417 | PORT_DATA_IO_PU_PD(137), PORT_DATA_IO_PD(138), | ||
418 | PORT_DATA_IO_PD(139), PORT_DATA_IO_PD(140), | ||
419 | PORT_DATA_IO_PD(141), PORT_DATA_IO_PD(142), | ||
420 | PORT_DATA_IO_PD(143), PORT_DATA_IO_PU_PD(144), | ||
421 | PORT_DATA_IO_PD(145), PORT_DATA_IO_PU_PD(146), | ||
422 | PORT_DATA_IO_PU_PD(147), PORT_DATA_IO_PU_PD(148), | ||
423 | PORT_DATA_IO_PU_PD(149), PORT_DATA_I_PD(150), | ||
424 | PORT_DATA_IO_PU_PD(151), PORT_DATA_IO_PD(152), | ||
425 | PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154), | ||
426 | PORT_DATA_I_PD(155), PORT_DATA_IO_PU_PD(156), | ||
427 | PORT_DATA_I_PD(157), PORT_DATA_IO_PD(158), | ||
428 | |||
429 | /* 55-4 (GPIO) */ | ||
430 | PORT_DATA_IO_PU_PD(159), PORT_DATA_IO_PU_PD(160), | ||
431 | PORT_DATA_I_PU_PD(161), PORT_DATA_I_PU_PD(162), | ||
432 | PORT_DATA_IO_PU_PD(163), PORT_DATA_I_PU_PD(164), | ||
433 | PORT_DATA_IO_PD(192), PORT_DATA_IO_PD(193), | ||
434 | PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195), | ||
435 | PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197), | ||
436 | PORT_DATA_IO_PD(198), PORT_DATA_IO_PD(199), | ||
437 | PORT_DATA_IO_PU_PD(200), PORT_DATA_IO_PU_PD(201), | ||
438 | PORT_DATA_IO_PU_PD(202), PORT_DATA_IO_PU_PD(203), | ||
439 | PORT_DATA_IO_PU_PD(204), PORT_DATA_IO_PU_PD(205), | ||
440 | PORT_DATA_IO_PU_PD(206), PORT_DATA_IO_PD(207), | ||
441 | PORT_DATA_IO_PD(208), PORT_DATA_IO_PD(209), | ||
442 | PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211), | ||
443 | PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213), | ||
444 | PORT_DATA_IO_PD(214), PORT_DATA_IO_PD(215), | ||
445 | PORT_DATA_IO_PD(216), PORT_DATA_IO_PD(217), | ||
446 | PORT_DATA_O(218), PORT_DATA_IO_PD(219), | ||
447 | PORT_DATA_IO_PD(220), PORT_DATA_IO_PD(221), | ||
448 | PORT_DATA_IO_PU_PD(222), | ||
449 | PORT_DATA_I_PU_PD(223), PORT_DATA_I_PU_PD(224), | ||
450 | PORT_DATA_IO_PU_PD(225), PORT_DATA_O(226), | ||
451 | PORT_DATA_IO_PU_PD(227), PORT_DATA_I_PD(228), | ||
452 | PORT_DATA_I_PD(229), PORT_DATA_IO(230), | ||
453 | PORT_DATA_IO_PD(231), PORT_DATA_IO_PU_PD(232), | ||
454 | PORT_DATA_I_PD(233), PORT_DATA_IO_PU_PD(234), | ||
455 | PORT_DATA_IO_PU_PD(235), PORT_DATA_IO_PU_PD(236), | ||
456 | PORT_DATA_IO_PD(237), PORT_DATA_IO_PU_PD(238), | ||
457 | |||
458 | /* 55-5 (GPIO) */ | ||
459 | PORT_DATA_IO_PU_PD(239), PORT_DATA_IO_PU_PD(240), | ||
460 | PORT_DATA_O(241), PORT_DATA_I_PD(242), | ||
461 | PORT_DATA_IO_PU_PD(243), PORT_DATA_IO_PU_PD(244), | ||
462 | PORT_DATA_IO_PU_PD(245), PORT_DATA_IO_PU_PD(246), | ||
463 | PORT_DATA_IO_PU_PD(247), PORT_DATA_IO_PU_PD(248), | ||
464 | PORT_DATA_IO_PU_PD(249), PORT_DATA_IO_PD(250), | ||
465 | PORT_DATA_IO_PU_PD(251), PORT_DATA_IO_PU_PD(252), | ||
466 | PORT_DATA_IO_PU_PD(253), PORT_DATA_IO_PU_PD(254), | ||
467 | PORT_DATA_IO_PU_PD(255), PORT_DATA_IO_PU_PD(256), | ||
468 | PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PD(258), | ||
469 | PORT_DATA_IO_PU_PD(259), PORT_DATA_IO_PU_PD(260), | ||
470 | PORT_DATA_IO_PU_PD(261), PORT_DATA_IO_PU_PD(262), | ||
471 | PORT_DATA_IO_PU_PD(263), | ||
472 | |||
473 | /* Special Pull-up / Pull-down Functions */ | ||
474 | PINMUX_DATA(PORT66_KEYIN0_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, | ||
475 | PORT66_FN2, PORT66_IN_PU), | ||
476 | PINMUX_DATA(PORT67_KEYIN1_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, | ||
477 | PORT67_FN2, PORT67_IN_PU), | ||
478 | PINMUX_DATA(PORT68_KEYIN2_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, | ||
479 | PORT68_FN2, PORT68_IN_PU), | ||
480 | PINMUX_DATA(PORT69_KEYIN3_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, | ||
481 | PORT69_FN2, PORT69_IN_PU), | ||
482 | PINMUX_DATA(PORT70_KEYIN4_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, | ||
483 | PORT70_FN2, PORT70_IN_PU), | ||
484 | PINMUX_DATA(PORT71_KEYIN5_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, | ||
485 | PORT71_FN2, PORT71_IN_PU), | ||
486 | PINMUX_DATA(PORT72_KEYIN6_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, | ||
487 | PORT72_FN2, PORT72_IN_PU), | ||
488 | |||
489 | |||
490 | /* 55-1 (FN) */ | ||
491 | PINMUX_DATA(VBUS_0_MARK, PORT0_FN1), | ||
492 | PINMUX_DATA(CPORT0_MARK, PORT1_FN1), | ||
493 | PINMUX_DATA(CPORT1_MARK, PORT2_FN1), | ||
494 | PINMUX_DATA(CPORT2_MARK, PORT3_FN1), | ||
495 | PINMUX_DATA(CPORT3_MARK, PORT4_FN1), | ||
496 | PINMUX_DATA(CPORT4_MARK, PORT5_FN1), | ||
497 | PINMUX_DATA(CPORT5_MARK, PORT6_FN1), | ||
498 | PINMUX_DATA(CPORT6_MARK, PORT7_FN1), | ||
499 | PINMUX_DATA(CPORT7_MARK, PORT8_FN1), | ||
500 | PINMUX_DATA(CPORT8_MARK, PORT9_FN1), | ||
501 | PINMUX_DATA(CPORT9_MARK, PORT10_FN1), | ||
502 | PINMUX_DATA(CPORT10_MARK, PORT11_FN1), | ||
503 | PINMUX_DATA(CPORT11_MARK, PORT12_FN1), | ||
504 | PINMUX_DATA(SIN2_MARK, PORT12_FN2), | ||
505 | PINMUX_DATA(CPORT12_MARK, PORT13_FN1), | ||
506 | PINMUX_DATA(XCTS2_MARK, PORT13_FN2), | ||
507 | PINMUX_DATA(CPORT13_MARK, PORT14_FN1), | ||
508 | PINMUX_DATA(RFSPO4_MARK, PORT14_FN2), | ||
509 | PINMUX_DATA(CPORT14_MARK, PORT15_FN1), | ||
510 | PINMUX_DATA(RFSPO5_MARK, PORT15_FN2), | ||
511 | PINMUX_DATA(CPORT15_MARK, PORT16_FN1), | ||
512 | PINMUX_DATA(SCIFA0_SCK_MARK, PORT16_FN2), | ||
513 | PINMUX_DATA(GPS_AGC2_MARK, PORT16_FN3), | ||
514 | PINMUX_DATA(CPORT16_MARK, PORT17_FN1), | ||
515 | PINMUX_DATA(SCIFA0_TXD_MARK, PORT17_FN2), | ||
516 | PINMUX_DATA(GPS_AGC3_MARK, PORT17_FN3), | ||
517 | PINMUX_DATA(CPORT17_IC_OE_MARK, PORT18_FN1), | ||
518 | PINMUX_DATA(SOUT2_MARK, PORT18_FN2), | ||
519 | PINMUX_DATA(CPORT18_MARK, PORT19_FN1), | ||
520 | PINMUX_DATA(XRTS2_MARK, PORT19_FN2), | ||
521 | PINMUX_DATA(PORT19_VIO_CKO2_MARK, PORT19_FN3), | ||
522 | PINMUX_DATA(CPORT19_MPORT1_MARK, PORT20_FN1), | ||
523 | PINMUX_DATA(CPORT20_MARK, PORT21_FN1), | ||
524 | PINMUX_DATA(RFSPO6_MARK, PORT21_FN2), | ||
525 | PINMUX_DATA(CPORT21_MARK, PORT22_FN1), | ||
526 | PINMUX_DATA(STATUS0_MARK, PORT22_FN2), | ||
527 | PINMUX_DATA(CPORT22_MARK, PORT23_FN1), | ||
528 | PINMUX_DATA(STATUS1_MARK, PORT23_FN2), | ||
529 | PINMUX_DATA(CPORT23_MARK, PORT24_FN1), | ||
530 | PINMUX_DATA(STATUS2_MARK, PORT24_FN2), | ||
531 | PINMUX_DATA(RFSPO7_MARK, PORT24_FN3), | ||
532 | PINMUX_DATA(B_SYNLD1_MARK, PORT25_FN1), | ||
533 | PINMUX_DATA(B_SYNLD2_MARK, PORT26_FN1), | ||
534 | PINMUX_DATA(SYSENMSK_MARK, PORT26_FN2), | ||
535 | PINMUX_DATA(XMAINPS_MARK, PORT27_FN1), | ||
536 | PINMUX_DATA(XDIVPS_MARK, PORT28_FN1), | ||
537 | PINMUX_DATA(XIDRST_MARK, PORT29_FN1), | ||
538 | PINMUX_DATA(IDCLK_MARK, PORT30_FN1), | ||
539 | PINMUX_DATA(IC_DP_MARK, PORT30_FN2), | ||
540 | PINMUX_DATA(IDIO_MARK, PORT31_FN1), | ||
541 | PINMUX_DATA(IC_DM_MARK, PORT31_FN2), | ||
542 | PINMUX_DATA(SOUT1_MARK, PORT32_FN1), | ||
543 | PINMUX_DATA(SCIFA4_TXD_MARK, PORT32_FN2), | ||
544 | PINMUX_DATA(M02_BERDAT_MARK, PORT32_FN3), | ||
545 | PINMUX_DATA(SIN1_MARK, PORT33_FN1), | ||
546 | PINMUX_DATA(SCIFA4_RXD_MARK, PORT33_FN2), | ||
547 | PINMUX_DATA(XWUP_MARK, PORT33_FN3), | ||
548 | PINMUX_DATA(XRTS1_MARK, PORT34_FN1), | ||
549 | PINMUX_DATA(SCIFA4_RTS_MARK, PORT34_FN2), | ||
550 | PINMUX_DATA(M03_BERCLK_MARK, PORT34_FN3), | ||
551 | PINMUX_DATA(XCTS1_MARK, PORT35_FN1), | ||
552 | PINMUX_DATA(SCIFA4_CTS_MARK, PORT35_FN2), | ||
553 | PINMUX_DATA(PCMCLKO_MARK, PORT36_FN1), | ||
554 | PINMUX_DATA(SYNC8KO_MARK, PORT37_FN1), | ||
555 | |||
556 | /* 55-2 (FN) */ | ||
557 | PINMUX_DATA(DNPCM_A_MARK, PORT38_FN1), | ||
558 | PINMUX_DATA(UPPCM_A_MARK, PORT39_FN1), | ||
559 | PINMUX_DATA(VACK_MARK, PORT40_FN1), | ||
560 | PINMUX_DATA(XTALB1L_MARK, PORT41_FN1), | ||
561 | PINMUX_DATA(GPS_AGC1_MARK, PORT42_FN1), | ||
562 | PINMUX_DATA(SCIFA0_RTS_MARK, PORT42_FN2), | ||
563 | PINMUX_DATA(GPS_AGC4_MARK, PORT43_FN1), | ||
564 | PINMUX_DATA(SCIFA0_RXD_MARK, PORT43_FN2), | ||
565 | PINMUX_DATA(GPS_PWRDOWN_MARK, PORT44_FN1), | ||
566 | PINMUX_DATA(SCIFA0_CTS_MARK, PORT44_FN2), | ||
567 | PINMUX_DATA(GPS_IM_MARK, PORT45_FN1), | ||
568 | PINMUX_DATA(GPS_IS_MARK, PORT46_FN1), | ||
569 | PINMUX_DATA(GPS_QM_MARK, PORT47_FN1), | ||
570 | PINMUX_DATA(GPS_QS_MARK, PORT48_FN1), | ||
571 | PINMUX_DATA(FMSOCK_MARK, PORT49_FN1), | ||
572 | PINMUX_DATA(PORT49_IRDA_OUT_MARK, PORT49_FN2), | ||
573 | PINMUX_DATA(PORT49_IROUT_MARK, PORT49_FN3), | ||
574 | PINMUX_DATA(FMSOOLR_MARK, PORT50_FN1), | ||
575 | PINMUX_DATA(BBIF2_TSYNC2_MARK, PORT50_FN2), | ||
576 | PINMUX_DATA(TPU2TO2_MARK, PORT50_FN3), | ||
577 | PINMUX_DATA(IPORT3_MARK, PORT50_FN4), | ||
578 | PINMUX_DATA(FMSIOLR_MARK, PORT50_FN5), | ||
579 | PINMUX_DATA(FMSOOBT_MARK, PORT51_FN1), | ||
580 | PINMUX_DATA(BBIF2_TSCK2_MARK, PORT51_FN2), | ||
581 | PINMUX_DATA(TPU2TO3_MARK, PORT51_FN3), | ||
582 | PINMUX_DATA(OPORT1_MARK, PORT51_FN4), | ||
583 | PINMUX_DATA(FMSIOBT_MARK, PORT51_FN5), | ||
584 | PINMUX_DATA(FMSOSLD_MARK, PORT52_FN1), | ||
585 | PINMUX_DATA(BBIF2_TXD2_MARK, PORT52_FN2), | ||
586 | PINMUX_DATA(OPORT2_MARK, PORT52_FN3), | ||
587 | PINMUX_DATA(FMSOILR_MARK, PORT53_FN1), | ||
588 | PINMUX_DATA(PORT53_IRDA_IN_MARK, PORT53_FN2), | ||
589 | PINMUX_DATA(TPU3TO3_MARK, PORT53_FN3), | ||
590 | PINMUX_DATA(OPORT3_MARK, PORT53_FN4), | ||
591 | PINMUX_DATA(FMSIILR_MARK, PORT53_FN5), | ||
592 | PINMUX_DATA(FMSOIBT_MARK, PORT54_FN1), | ||
593 | PINMUX_DATA(PORT54_IRDA_FIRSEL_MARK, PORT54_FN2), | ||
594 | PINMUX_DATA(TPU3TO2_MARK, PORT54_FN3), | ||
595 | PINMUX_DATA(FMSIIBT_MARK, PORT54_FN4), | ||
596 | PINMUX_DATA(FMSISLD_MARK, PORT55_FN1), | ||
597 | PINMUX_DATA(MFG0_OUT1_MARK, PORT55_FN2), | ||
598 | PINMUX_DATA(TPU0TO0_MARK, PORT55_FN3), | ||
599 | PINMUX_DATA(A0_EA0_MARK, PORT57_FN1), | ||
600 | PINMUX_DATA(BS_MARK, PORT57_FN2), | ||
601 | PINMUX_DATA(A12_EA12_MARK, PORT58_FN1), | ||
602 | PINMUX_DATA(PORT58_VIO_CKOR_MARK, PORT58_FN2), | ||
603 | PINMUX_DATA(TPU4TO2_MARK, PORT58_FN3), | ||
604 | PINMUX_DATA(A13_EA13_MARK, PORT59_FN1), | ||
605 | PINMUX_DATA(PORT59_IROUT_MARK, PORT59_FN2), | ||
606 | PINMUX_DATA(MFG0_OUT2_MARK, PORT59_FN3), | ||
607 | PINMUX_DATA(TPU0TO1_MARK, PORT59_FN4), | ||
608 | PINMUX_DATA(A14_EA14_MARK, PORT60_FN1), | ||
609 | PINMUX_DATA(PORT60_KEYOUT5_MARK, PORT60_FN2), | ||
610 | PINMUX_DATA(A15_EA15_MARK, PORT61_FN1), | ||
611 | PINMUX_DATA(PORT61_KEYOUT4_MARK, PORT61_FN2), | ||
612 | PINMUX_DATA(A16_EA16_MARK, PORT62_FN1), | ||
613 | PINMUX_DATA(PORT62_KEYOUT3_MARK, PORT62_FN2), | ||
614 | PINMUX_DATA(MSIOF0_SS1_MARK, PORT62_FN3), | ||
615 | PINMUX_DATA(A17_EA17_MARK, PORT63_FN1), | ||
616 | PINMUX_DATA(PORT63_KEYOUT2_MARK, PORT63_FN2), | ||
617 | PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT63_FN3), | ||
618 | PINMUX_DATA(A18_EA18_MARK, PORT64_FN1), | ||
619 | PINMUX_DATA(PORT64_KEYOUT1_MARK, PORT64_FN2), | ||
620 | PINMUX_DATA(MSIOF0_TSCK_MARK, PORT64_FN3), | ||
621 | PINMUX_DATA(A19_EA19_MARK, PORT65_FN1), | ||
622 | PINMUX_DATA(PORT65_KEYOUT0_MARK, PORT65_FN2), | ||
623 | PINMUX_DATA(MSIOF0_TXD_MARK, PORT65_FN3), | ||
624 | PINMUX_DATA(A20_EA20_MARK, PORT66_FN1), | ||
625 | PINMUX_DATA(PORT66_KEYIN0_MARK, PORT66_FN2), | ||
626 | PINMUX_DATA(MSIOF0_RSCK_MARK, PORT66_FN3), | ||
627 | PINMUX_DATA(A21_EA21_MARK, PORT67_FN1), | ||
628 | PINMUX_DATA(PORT67_KEYIN1_MARK, PORT67_FN2), | ||
629 | PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT67_FN3), | ||
630 | PINMUX_DATA(A22_EA22_MARK, PORT68_FN1), | ||
631 | PINMUX_DATA(PORT68_KEYIN2_MARK, PORT68_FN2), | ||
632 | PINMUX_DATA(MSIOF0_MCK0_MARK, PORT68_FN3), | ||
633 | PINMUX_DATA(A23_EA23_MARK, PORT69_FN1), | ||
634 | PINMUX_DATA(PORT69_KEYIN3_MARK, PORT69_FN2), | ||
635 | PINMUX_DATA(MSIOF0_MCK1_MARK, PORT69_FN3), | ||
636 | PINMUX_DATA(A24_EA24_MARK, PORT70_FN1), | ||
637 | PINMUX_DATA(PORT70_KEYIN4_MARK, PORT70_FN2), | ||
638 | PINMUX_DATA(MSIOF0_RXD_MARK, PORT70_FN3), | ||
639 | PINMUX_DATA(A25_EA25_MARK, PORT71_FN1), | ||
640 | PINMUX_DATA(PORT71_KEYIN5_MARK, PORT71_FN2), | ||
641 | PINMUX_DATA(MSIOF0_SS2_MARK, PORT71_FN3), | ||
642 | PINMUX_DATA(A26_MARK, PORT72_FN1), | ||
643 | PINMUX_DATA(PORT72_KEYIN6_MARK, PORT72_FN2), | ||
644 | PINMUX_DATA(D0_ED0_NAF0_MARK, PORT74_FN1), | ||
645 | PINMUX_DATA(D1_ED1_NAF1_MARK, PORT75_FN1), | ||
646 | PINMUX_DATA(D2_ED2_NAF2_MARK, PORT76_FN1), | ||
647 | PINMUX_DATA(D3_ED3_NAF3_MARK, PORT77_FN1), | ||
648 | PINMUX_DATA(D4_ED4_NAF4_MARK, PORT78_FN1), | ||
649 | PINMUX_DATA(D5_ED5_NAF5_MARK, PORT79_FN1), | ||
650 | PINMUX_DATA(D6_ED6_NAF6_MARK, PORT80_FN1), | ||
651 | PINMUX_DATA(D7_ED7_NAF7_MARK, PORT81_FN1), | ||
652 | PINMUX_DATA(D8_ED8_NAF8_MARK, PORT82_FN1), | ||
653 | PINMUX_DATA(D9_ED9_NAF9_MARK, PORT83_FN1), | ||
654 | PINMUX_DATA(D10_ED10_NAF10_MARK, PORT84_FN1), | ||
655 | PINMUX_DATA(D11_ED11_NAF11_MARK, PORT85_FN1), | ||
656 | PINMUX_DATA(D12_ED12_NAF12_MARK, PORT86_FN1), | ||
657 | PINMUX_DATA(D13_ED13_NAF13_MARK, PORT87_FN1), | ||
658 | PINMUX_DATA(D14_ED14_NAF14_MARK, PORT88_FN1), | ||
659 | PINMUX_DATA(D15_ED15_NAF15_MARK, PORT89_FN1), | ||
660 | PINMUX_DATA(CS4_MARK, PORT90_FN1), | ||
661 | PINMUX_DATA(CS5A_MARK, PORT91_FN1), | ||
662 | PINMUX_DATA(FMSICK_MARK, PORT91_FN2), | ||
663 | PINMUX_DATA(CS5B_MARK, PORT92_FN1), | ||
664 | PINMUX_DATA(FCE1_MARK, PORT92_FN2), | ||
665 | |||
666 | /* 55-3 (FN) */ | ||
667 | PINMUX_DATA(CS6B_MARK, PORT93_FN1), | ||
668 | PINMUX_DATA(XCS2_MARK, PORT93_FN2), | ||
669 | PINMUX_DATA(CS6A_MARK, PORT93_FN3), | ||
670 | PINMUX_DATA(DACK0_MARK, PORT93_FN4), | ||
671 | PINMUX_DATA(FCE0_MARK, PORT94_FN1), | ||
672 | PINMUX_DATA(WAIT_MARK, PORT95_FN1), | ||
673 | PINMUX_DATA(DREQ0_MARK, PORT95_FN2), | ||
674 | PINMUX_DATA(RD_XRD_MARK, PORT96_FN1), | ||
675 | PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT97_FN1), | ||
676 | PINMUX_DATA(WE1_XWR1_MARK, PORT98_FN1), | ||
677 | PINMUX_DATA(FRB_MARK, PORT99_FN1), | ||
678 | PINMUX_DATA(CKO_MARK, PORT100_FN1), | ||
679 | PINMUX_DATA(NBRSTOUT_MARK, PORT101_FN1), | ||
680 | PINMUX_DATA(NBRST_MARK, PORT102_FN1), | ||
681 | PINMUX_DATA(GPS_EPPSIN_MARK, PORT106_FN1), | ||
682 | PINMUX_DATA(LATCHPULSE_MARK, PORT110_FN1), | ||
683 | PINMUX_DATA(LTESIGNAL_MARK, PORT111_FN1), | ||
684 | PINMUX_DATA(LEGACYSTATE_MARK, PORT112_FN1), | ||
685 | PINMUX_DATA(TCKON_MARK, PORT118_FN1), | ||
686 | PINMUX_DATA(VIO_VD_MARK, PORT128_FN1), | ||
687 | PINMUX_DATA(PORT128_KEYOUT0_MARK, PORT128_FN2), | ||
688 | PINMUX_DATA(IPORT0_MARK, PORT128_FN3), | ||
689 | PINMUX_DATA(VIO_HD_MARK, PORT129_FN1), | ||
690 | PINMUX_DATA(PORT129_KEYOUT1_MARK, PORT129_FN2), | ||
691 | PINMUX_DATA(IPORT1_MARK, PORT129_FN3), | ||
692 | PINMUX_DATA(VIO_D0_MARK, PORT130_FN1), | ||
693 | PINMUX_DATA(PORT130_KEYOUT2_MARK, PORT130_FN2), | ||
694 | PINMUX_DATA(PORT130_MSIOF2_RXD_MARK, PORT130_FN3), | ||
695 | PINMUX_DATA(VIO_D1_MARK, PORT131_FN1), | ||
696 | PINMUX_DATA(PORT131_KEYOUT3_MARK, PORT131_FN2), | ||
697 | PINMUX_DATA(PORT131_MSIOF2_SS1_MARK, PORT131_FN3), | ||
698 | PINMUX_DATA(VIO_D2_MARK, PORT132_FN1), | ||
699 | PINMUX_DATA(PORT132_KEYOUT4_MARK, PORT132_FN2), | ||
700 | PINMUX_DATA(PORT132_MSIOF2_SS2_MARK, PORT132_FN3), | ||
701 | PINMUX_DATA(VIO_D3_MARK, PORT133_FN1), | ||
702 | PINMUX_DATA(PORT133_KEYOUT5_MARK, PORT133_FN2), | ||
703 | PINMUX_DATA(PORT133_MSIOF2_TSYNC_MARK, PORT133_FN3), | ||
704 | PINMUX_DATA(VIO_D4_MARK, PORT134_FN1), | ||
705 | PINMUX_DATA(PORT134_KEYIN0_MARK, PORT134_FN2), | ||
706 | PINMUX_DATA(PORT134_MSIOF2_TXD_MARK, PORT134_FN3), | ||
707 | PINMUX_DATA(VIO_D5_MARK, PORT135_FN1), | ||
708 | PINMUX_DATA(PORT135_KEYIN1_MARK, PORT135_FN2), | ||
709 | PINMUX_DATA(PORT135_MSIOF2_TSCK_MARK, PORT135_FN3), | ||
710 | PINMUX_DATA(VIO_D6_MARK, PORT136_FN1), | ||
711 | PINMUX_DATA(PORT136_KEYIN2_MARK, PORT136_FN2), | ||
712 | PINMUX_DATA(VIO_D7_MARK, PORT137_FN1), | ||
713 | PINMUX_DATA(PORT137_KEYIN3_MARK, PORT137_FN2), | ||
714 | PINMUX_DATA(VIO_D8_MARK, PORT138_FN1), | ||
715 | PINMUX_DATA(M9_SLCD_A01_MARK, PORT138_FN2), | ||
716 | PINMUX_DATA(PORT138_FSIAOMC_MARK, PORT138_FN3), | ||
717 | PINMUX_DATA(VIO_D9_MARK, PORT139_FN1), | ||
718 | PINMUX_DATA(M10_SLCD_CK1_MARK, PORT139_FN2), | ||
719 | PINMUX_DATA(PORT139_FSIAOLR_MARK, PORT139_FN3), | ||
720 | PINMUX_DATA(VIO_D10_MARK, PORT140_FN1), | ||
721 | PINMUX_DATA(M11_SLCD_SO1_MARK, PORT140_FN2), | ||
722 | PINMUX_DATA(TPU0TO2_MARK, PORT140_FN3), | ||
723 | PINMUX_DATA(PORT140_FSIAOBT_MARK, PORT140_FN4), | ||
724 | PINMUX_DATA(VIO_D11_MARK, PORT141_FN1), | ||
725 | PINMUX_DATA(M12_SLCD_CE1_MARK, PORT141_FN2), | ||
726 | PINMUX_DATA(TPU0TO3_MARK, PORT141_FN3), | ||
727 | PINMUX_DATA(PORT141_FSIAOSLD_MARK, PORT141_FN4), | ||
728 | PINMUX_DATA(VIO_D12_MARK, PORT142_FN1), | ||
729 | PINMUX_DATA(M13_BSW_MARK, PORT142_FN2), | ||
730 | PINMUX_DATA(PORT142_FSIACK_MARK, PORT142_FN3), | ||
731 | PINMUX_DATA(VIO_D13_MARK, PORT143_FN1), | ||
732 | PINMUX_DATA(M14_GSW_MARK, PORT143_FN2), | ||
733 | PINMUX_DATA(PORT143_FSIAILR_MARK, PORT143_FN3), | ||
734 | PINMUX_DATA(VIO_D14_MARK, PORT144_FN1), | ||
735 | PINMUX_DATA(M15_RSW_MARK, PORT144_FN2), | ||
736 | PINMUX_DATA(PORT144_FSIAIBT_MARK, PORT144_FN3), | ||
737 | PINMUX_DATA(VIO_D15_MARK, PORT145_FN1), | ||
738 | PINMUX_DATA(TPU1TO3_MARK, PORT145_FN2), | ||
739 | PINMUX_DATA(PORT145_FSIAISLD_MARK, PORT145_FN3), | ||
740 | PINMUX_DATA(VIO_CLK_MARK, PORT146_FN1), | ||
741 | PINMUX_DATA(PORT146_KEYIN4_MARK, PORT146_FN2), | ||
742 | PINMUX_DATA(IPORT2_MARK, PORT146_FN3), | ||
743 | PINMUX_DATA(VIO_FIELD_MARK, PORT147_FN1), | ||
744 | PINMUX_DATA(PORT147_KEYIN5_MARK, PORT147_FN2), | ||
745 | PINMUX_DATA(VIO_CKO_MARK, PORT148_FN1), | ||
746 | PINMUX_DATA(PORT148_KEYIN6_MARK, PORT148_FN2), | ||
747 | PINMUX_DATA(A27_MARK, PORT149_FN1), | ||
748 | PINMUX_DATA(RDWR_XWE_MARK, PORT149_FN2), | ||
749 | PINMUX_DATA(MFG0_IN1_MARK, PORT149_FN3), | ||
750 | PINMUX_DATA(MFG0_IN2_MARK, PORT150_FN1), | ||
751 | PINMUX_DATA(TS_SPSYNC3_MARK, PORT151_FN1), | ||
752 | PINMUX_DATA(MSIOF2_RSCK_MARK, PORT151_FN2), | ||
753 | PINMUX_DATA(TS_SDAT3_MARK, PORT152_FN1), | ||
754 | PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT152_FN2), | ||
755 | PINMUX_DATA(TPU1TO2_MARK, PORT153_FN1), | ||
756 | PINMUX_DATA(TS_SDEN3_MARK, PORT153_FN2), | ||
757 | PINMUX_DATA(PORT153_MSIOF2_SS1_MARK, PORT153_FN3), | ||
758 | PINMUX_DATA(SOUT3_MARK, PORT154_FN1), | ||
759 | PINMUX_DATA(SCIFA2_TXD1_MARK, PORT154_FN2), | ||
760 | PINMUX_DATA(MSIOF2_MCK0_MARK, PORT154_FN3), | ||
761 | PINMUX_DATA(SIN3_MARK, PORT155_FN1), | ||
762 | PINMUX_DATA(SCIFA2_RXD1_MARK, PORT155_FN2), | ||
763 | PINMUX_DATA(MSIOF2_MCK1_MARK, PORT155_FN3), | ||
764 | PINMUX_DATA(XRTS3_MARK, PORT156_FN1), | ||
765 | PINMUX_DATA(SCIFA2_RTS1_MARK, PORT156_FN2), | ||
766 | PINMUX_DATA(PORT156_MSIOF2_SS2_MARK, PORT156_FN3), | ||
767 | PINMUX_DATA(XCTS3_MARK, PORT157_FN1), | ||
768 | PINMUX_DATA(SCIFA2_CTS1_MARK, PORT157_FN2), | ||
769 | PINMUX_DATA(PORT157_MSIOF2_RXD_MARK, PORT157_FN3), | ||
770 | |||
771 | /* 55-4 (FN) */ | ||
772 | PINMUX_DATA(DINT_MARK, PORT158_FN1), | ||
773 | PINMUX_DATA(SCIFA2_SCK1_MARK, PORT158_FN2), | ||
774 | PINMUX_DATA(TS_SCK3_MARK, PORT158_FN3), | ||
775 | PINMUX_DATA(PORT159_SCIFB_SCK_MARK, PORT159_FN1), | ||
776 | PINMUX_DATA(PORT159_SCIFA5_SCK_MARK, PORT159_FN2), | ||
777 | PINMUX_DATA(NMI_MARK, PORT159_FN3), | ||
778 | PINMUX_DATA(PORT160_SCIFB_TXD_MARK, PORT160_FN1), | ||
779 | PINMUX_DATA(PORT160_SCIFA5_TXD_MARK, PORT160_FN2), | ||
780 | PINMUX_DATA(SOUT0_MARK, PORT160_FN3), | ||
781 | PINMUX_DATA(PORT161_SCIFB_CTS_MARK, PORT161_FN1), | ||
782 | PINMUX_DATA(PORT161_SCIFA5_CTS_MARK, PORT161_FN2), | ||
783 | PINMUX_DATA(XCTS0_MARK, PORT161_FN3), | ||
784 | PINMUX_DATA(MFG3_IN2_MARK, PORT161_FN4), | ||
785 | PINMUX_DATA(PORT162_SCIFB_RXD_MARK, PORT162_FN1), | ||
786 | PINMUX_DATA(PORT162_SCIFA5_RXD_MARK, PORT162_FN2), | ||
787 | PINMUX_DATA(SIN0_MARK, PORT162_FN3), | ||
788 | PINMUX_DATA(MFG3_IN1_MARK, PORT162_FN4), | ||
789 | PINMUX_DATA(PORT163_SCIFB_RTS_MARK, PORT163_FN1), | ||
790 | PINMUX_DATA(PORT163_SCIFA5_RTS_MARK, PORT163_FN2), | ||
791 | PINMUX_DATA(XRTS0_MARK, PORT163_FN3), | ||
792 | PINMUX_DATA(MFG3_OUT1_MARK, PORT163_FN4), | ||
793 | PINMUX_DATA(TPU3TO0_MARK, PORT163_FN5), | ||
794 | PINMUX_DATA(LCDD0_MARK, PORT192_FN1), | ||
795 | PINMUX_DATA(PORT192_KEYOUT0_MARK, PORT192_FN2), | ||
796 | PINMUX_DATA(EXT_CKI_MARK, PORT192_FN3), | ||
797 | PINMUX_DATA(LCDD1_MARK, PORT193_FN1), | ||
798 | PINMUX_DATA(PORT193_KEYOUT1_MARK, PORT193_FN2), | ||
799 | PINMUX_DATA(PORT193_SCIFA5_CTS_MARK, PORT193_FN3), | ||
800 | PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT193_FN4), | ||
801 | PINMUX_DATA(LCDD2_MARK, PORT194_FN1), | ||
802 | PINMUX_DATA(PORT194_KEYOUT2_MARK, PORT194_FN2), | ||
803 | PINMUX_DATA(PORT194_SCIFA5_RTS_MARK, PORT194_FN3), | ||
804 | PINMUX_DATA(BBIF2_TSCK1_MARK, PORT194_FN4), | ||
805 | PINMUX_DATA(LCDD3_MARK, PORT195_FN1), | ||
806 | PINMUX_DATA(PORT195_KEYOUT3_MARK, PORT195_FN2), | ||
807 | PINMUX_DATA(PORT195_SCIFA5_RXD_MARK, PORT195_FN3), | ||
808 | PINMUX_DATA(BBIF2_TXD1_MARK, PORT195_FN4), | ||
809 | PINMUX_DATA(LCDD4_MARK, PORT196_FN1), | ||
810 | PINMUX_DATA(PORT196_KEYOUT4_MARK, PORT196_FN2), | ||
811 | PINMUX_DATA(PORT196_SCIFA5_TXD_MARK, PORT196_FN3), | ||
812 | PINMUX_DATA(LCDD5_MARK, PORT197_FN1), | ||
813 | PINMUX_DATA(PORT197_KEYOUT5_MARK, PORT197_FN2), | ||
814 | PINMUX_DATA(PORT197_SCIFA5_SCK_MARK, PORT197_FN3), | ||
815 | PINMUX_DATA(MFG2_OUT2_MARK, PORT197_FN4), | ||
816 | PINMUX_DATA(LCDD6_MARK, PORT198_FN1), | ||
817 | PINMUX_DATA(LCDD7_MARK, PORT199_FN1), | ||
818 | PINMUX_DATA(TPU4TO1_MARK, PORT199_FN2), | ||
819 | PINMUX_DATA(MFG4_OUT2_MARK, PORT199_FN3), | ||
820 | PINMUX_DATA(LCDD8_MARK, PORT200_FN1), | ||
821 | PINMUX_DATA(PORT200_KEYIN0_MARK, PORT200_FN2), | ||
822 | PINMUX_DATA(VIO_DR0_MARK, PORT200_FN3), | ||
823 | PINMUX_DATA(D16_MARK, PORT200_FN4), | ||
824 | PINMUX_DATA(LCDD9_MARK, PORT201_FN1), | ||
825 | PINMUX_DATA(PORT201_KEYIN1_MARK, PORT201_FN2), | ||
826 | PINMUX_DATA(VIO_DR1_MARK, PORT201_FN3), | ||
827 | PINMUX_DATA(D17_MARK, PORT201_FN4), | ||
828 | PINMUX_DATA(LCDD10_MARK, PORT202_FN1), | ||
829 | PINMUX_DATA(PORT202_KEYIN2_MARK, PORT202_FN2), | ||
830 | PINMUX_DATA(VIO_DR2_MARK, PORT202_FN3), | ||
831 | PINMUX_DATA(D18_MARK, PORT202_FN4), | ||
832 | PINMUX_DATA(LCDD11_MARK, PORT203_FN1), | ||
833 | PINMUX_DATA(PORT203_KEYIN3_MARK, PORT203_FN2), | ||
834 | PINMUX_DATA(VIO_DR3_MARK, PORT203_FN3), | ||
835 | PINMUX_DATA(D19_MARK, PORT203_FN4), | ||
836 | PINMUX_DATA(LCDD12_MARK, PORT204_FN1), | ||
837 | PINMUX_DATA(PORT204_KEYIN4_MARK, PORT204_FN2), | ||
838 | PINMUX_DATA(VIO_DR4_MARK, PORT204_FN3), | ||
839 | PINMUX_DATA(D20_MARK, PORT204_FN4), | ||
840 | PINMUX_DATA(LCDD13_MARK, PORT205_FN1), | ||
841 | PINMUX_DATA(PORT205_KEYIN5_MARK, PORT205_FN2), | ||
842 | PINMUX_DATA(VIO_DR5_MARK, PORT205_FN3), | ||
843 | PINMUX_DATA(D21_MARK, PORT205_FN4), | ||
844 | PINMUX_DATA(LCDD14_MARK, PORT206_FN1), | ||
845 | PINMUX_DATA(PORT206_KEYIN6_MARK, PORT206_FN2), | ||
846 | PINMUX_DATA(VIO_DR6_MARK, PORT206_FN3), | ||
847 | PINMUX_DATA(D22_MARK, PORT206_FN4), | ||
848 | PINMUX_DATA(LCDD15_MARK, PORT207_FN1), | ||
849 | PINMUX_DATA(PORT207_MSIOF0L_SS1_MARK, PORT207_FN2), | ||
850 | PINMUX_DATA(PORT207_KEYOUT0_MARK, PORT207_FN3), | ||
851 | PINMUX_DATA(VIO_DR7_MARK, PORT207_FN4), | ||
852 | PINMUX_DATA(D23_MARK, PORT207_FN5), | ||
853 | PINMUX_DATA(LCDD16_MARK, PORT208_FN1), | ||
854 | PINMUX_DATA(PORT208_MSIOF0L_SS2_MARK, PORT208_FN2), | ||
855 | PINMUX_DATA(PORT208_KEYOUT1_MARK, PORT208_FN3), | ||
856 | PINMUX_DATA(VIO_VDR_MARK, PORT208_FN4), | ||
857 | PINMUX_DATA(D24_MARK, PORT208_FN5), | ||
858 | PINMUX_DATA(LCDD17_MARK, PORT209_FN1), | ||
859 | PINMUX_DATA(PORT209_KEYOUT2_MARK, PORT209_FN2), | ||
860 | PINMUX_DATA(VIO_HDR_MARK, PORT209_FN3), | ||
861 | PINMUX_DATA(D25_MARK, PORT209_FN4), | ||
862 | PINMUX_DATA(LCDD18_MARK, PORT210_FN1), | ||
863 | PINMUX_DATA(DREQ2_MARK, PORT210_FN2), | ||
864 | PINMUX_DATA(PORT210_MSIOF0L_SS1_MARK, PORT210_FN3), | ||
865 | PINMUX_DATA(D26_MARK, PORT210_FN4), | ||
866 | PINMUX_DATA(LCDD19_MARK, PORT211_FN1), | ||
867 | PINMUX_DATA(PORT211_MSIOF0L_SS2_MARK, PORT211_FN2), | ||
868 | PINMUX_DATA(D27_MARK, PORT211_FN3), | ||
869 | PINMUX_DATA(LCDD20_MARK, PORT212_FN1), | ||
870 | PINMUX_DATA(TS_SPSYNC1_MARK, PORT212_FN2), | ||
871 | PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT212_FN3), | ||
872 | PINMUX_DATA(D28_MARK, PORT212_FN4), | ||
873 | PINMUX_DATA(LCDD21_MARK, PORT213_FN1), | ||
874 | PINMUX_DATA(TS_SDAT1_MARK, PORT213_FN2), | ||
875 | PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT213_FN3), | ||
876 | PINMUX_DATA(D29_MARK, PORT213_FN4), | ||
877 | PINMUX_DATA(LCDD22_MARK, PORT214_FN1), | ||
878 | PINMUX_DATA(TS_SDEN1_MARK, PORT214_FN2), | ||
879 | PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT214_FN3), | ||
880 | PINMUX_DATA(D30_MARK, PORT214_FN4), | ||
881 | PINMUX_DATA(LCDD23_MARK, PORT215_FN1), | ||
882 | PINMUX_DATA(TS_SCK1_MARK, PORT215_FN2), | ||
883 | PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT215_FN3), | ||
884 | PINMUX_DATA(D31_MARK, PORT215_FN4), | ||
885 | PINMUX_DATA(LCDDCK_MARK, PORT216_FN1), | ||
886 | PINMUX_DATA(LCDWR_MARK, PORT216_FN2), | ||
887 | PINMUX_DATA(PORT216_KEYOUT3_MARK, PORT216_FN3), | ||
888 | PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN4), | ||
889 | PINMUX_DATA(LCDRD_MARK, PORT217_FN1), | ||
890 | PINMUX_DATA(DACK2_MARK, PORT217_FN2), | ||
891 | PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT217_FN3), | ||
892 | PINMUX_DATA(LCDHSYN_MARK, PORT218_FN1), | ||
893 | PINMUX_DATA(LCDCS_MARK, PORT218_FN2), | ||
894 | PINMUX_DATA(LCDCS2_MARK, PORT218_FN3), | ||
895 | PINMUX_DATA(DACK3_MARK, PORT218_FN4), | ||
896 | PINMUX_DATA(PORT218_VIO_CKOR_MARK, PORT218_FN5), | ||
897 | PINMUX_DATA(PORT218_KEYOUT4_MARK, PORT218_FN6), | ||
898 | PINMUX_DATA(LCDDISP_MARK, PORT219_FN1), | ||
899 | PINMUX_DATA(LCDRS_MARK, PORT219_FN2), | ||
900 | PINMUX_DATA(DREQ3_MARK, PORT219_FN3), | ||
901 | PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT219_FN4), | ||
902 | PINMUX_DATA(LCDVSYN_MARK, PORT220_FN1), | ||
903 | PINMUX_DATA(LCDVSYN2_MARK, PORT220_FN2), | ||
904 | PINMUX_DATA(PORT220_KEYOUT5_MARK, PORT220_FN3), | ||
905 | PINMUX_DATA(LCDLCLK_MARK, PORT221_FN1), | ||
906 | PINMUX_DATA(DREQ1_MARK, PORT221_FN2), | ||
907 | PINMUX_DATA(PWEN_MARK, PORT221_FN3), | ||
908 | PINMUX_DATA(MSIOF0L_RXD_MARK, PORT221_FN4), | ||
909 | PINMUX_DATA(LCDDON_MARK, PORT222_FN1), | ||
910 | PINMUX_DATA(LCDDON2_MARK, PORT222_FN2), | ||
911 | PINMUX_DATA(DACK1_MARK, PORT222_FN3), | ||
912 | PINMUX_DATA(OVCN_MARK, PORT222_FN4), | ||
913 | PINMUX_DATA(MSIOF0L_TXD_MARK, PORT222_FN5), | ||
914 | PINMUX_DATA(SCIFA1_TXD_MARK, PORT225_FN1), | ||
915 | PINMUX_DATA(OVCN2_MARK, PORT225_FN2), | ||
916 | PINMUX_DATA(EXTLP_MARK, PORT226_FN1), | ||
917 | PINMUX_DATA(SCIFA1_SCK_MARK, PORT226_FN2), | ||
918 | PINMUX_DATA(USBTERM_MARK, PORT226_FN3), | ||
919 | PINMUX_DATA(PORT226_VIO_CKO2_MARK, PORT226_FN4), | ||
920 | PINMUX_DATA(SCIFA1_RTS_MARK, PORT227_FN1), | ||
921 | PINMUX_DATA(IDIN_MARK, PORT227_FN2), | ||
922 | PINMUX_DATA(SCIFA1_RXD_MARK, PORT228_FN1), | ||
923 | PINMUX_DATA(SCIFA1_CTS_MARK, PORT229_FN1), | ||
924 | PINMUX_DATA(MFG1_IN1_MARK, PORT229_FN2), | ||
925 | PINMUX_DATA(MSIOF1_TXD_MARK, PORT230_FN1), | ||
926 | PINMUX_DATA(SCIFA2_TXD2_MARK, PORT230_FN2), | ||
927 | PINMUX_DATA(PORT230_FSIAOMC_MARK, PORT230_FN3), | ||
928 | PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT231_FN1), | ||
929 | PINMUX_DATA(SCIFA2_CTS2_MARK, PORT231_FN2), | ||
930 | PINMUX_DATA(PORT231_FSIAOLR_MARK, PORT231_FN3), | ||
931 | PINMUX_DATA(MSIOF1_TSCK_MARK, PORT232_FN1), | ||
932 | PINMUX_DATA(SCIFA2_SCK2_MARK, PORT232_FN2), | ||
933 | PINMUX_DATA(PORT232_FSIAOBT_MARK, PORT232_FN3), | ||
934 | PINMUX_DATA(MSIOF1_RXD_MARK, PORT233_FN1), | ||
935 | PINMUX_DATA(SCIFA2_RXD2_MARK, PORT233_FN2), | ||
936 | PINMUX_DATA(GPS_VCOTRIG_MARK, PORT233_FN3), | ||
937 | PINMUX_DATA(PORT233_FSIACK_MARK, PORT233_FN4), | ||
938 | PINMUX_DATA(MSIOF1_RSCK_MARK, PORT234_FN1), | ||
939 | PINMUX_DATA(SCIFA2_RTS2_MARK, PORT234_FN2), | ||
940 | PINMUX_DATA(PORT234_FSIAOSLD_MARK, PORT234_FN3), | ||
941 | PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT235_FN1), | ||
942 | PINMUX_DATA(OPORT0_MARK, PORT235_FN2), | ||
943 | PINMUX_DATA(MFG1_IN2_MARK, PORT235_FN3), | ||
944 | PINMUX_DATA(PORT235_FSIAILR_MARK, PORT235_FN4), | ||
945 | PINMUX_DATA(MSIOF1_MCK0_MARK, PORT236_FN1), | ||
946 | PINMUX_DATA(I2C_SDA2_MARK, PORT236_FN2), | ||
947 | PINMUX_DATA(PORT236_FSIAIBT_MARK, PORT236_FN3), | ||
948 | PINMUX_DATA(MSIOF1_MCK1_MARK, PORT237_FN1), | ||
949 | PINMUX_DATA(I2C_SCL2_MARK, PORT237_FN2), | ||
950 | PINMUX_DATA(PORT237_FSIAISLD_MARK, PORT237_FN3), | ||
951 | PINMUX_DATA(MSIOF1_SS1_MARK, PORT238_FN1), | ||
952 | PINMUX_DATA(EDBGREQ3_MARK, PORT238_FN2), | ||
953 | |||
954 | /* 55-5 (FN) */ | ||
955 | PINMUX_DATA(MSIOF1_SS2_MARK, PORT239_FN1), | ||
956 | PINMUX_DATA(SCIFA6_TXD_MARK, PORT240_FN1), | ||
957 | PINMUX_DATA(PORT241_IRDA_OUT_MARK, PORT241_FN1), | ||
958 | PINMUX_DATA(PORT241_IROUT_MARK, PORT241_FN2), | ||
959 | PINMUX_DATA(MFG4_OUT1_MARK, PORT241_FN3), | ||
960 | PINMUX_DATA(TPU4TO0_MARK, PORT241_FN4), | ||
961 | PINMUX_DATA(PORT242_IRDA_IN_MARK, PORT242_FN1), | ||
962 | PINMUX_DATA(MFG4_IN2_MARK, PORT242_FN2), | ||
963 | PINMUX_DATA(PORT243_IRDA_FIRSEL_MARK, PORT243_FN1), | ||
964 | PINMUX_DATA(PORT243_VIO_CKO2_MARK, PORT243_FN2), | ||
965 | PINMUX_DATA(PORT244_SCIFA5_CTS_MARK, PORT244_FN1), | ||
966 | PINMUX_DATA(MFG2_IN1_MARK, PORT244_FN2), | ||
967 | PINMUX_DATA(PORT244_SCIFB_CTS_MARK, PORT244_FN3), | ||
968 | PINMUX_DATA(PORT245_SCIFA5_RTS_MARK, PORT245_FN1), | ||
969 | PINMUX_DATA(MFG2_IN2_MARK, PORT245_FN2), | ||
970 | PINMUX_DATA(PORT245_SCIFB_RTS_MARK, PORT245_FN3), | ||
971 | PINMUX_DATA(PORT246_SCIFA5_RXD_MARK, PORT246_FN1), | ||
972 | PINMUX_DATA(MFG1_OUT1_MARK, PORT246_FN2), | ||
973 | PINMUX_DATA(PORT246_SCIFB_RXD_MARK, PORT246_FN3), | ||
974 | PINMUX_DATA(TPU1TO0_MARK, PORT246_FN4), | ||
975 | PINMUX_DATA(PORT247_SCIFA5_TXD_MARK, PORT247_FN1), | ||
976 | PINMUX_DATA(MFG3_OUT2_MARK, PORT247_FN2), | ||
977 | PINMUX_DATA(PORT247_SCIFB_TXD_MARK, PORT247_FN3), | ||
978 | PINMUX_DATA(TPU3TO1_MARK, PORT247_FN4), | ||
979 | PINMUX_DATA(PORT248_SCIFA5_SCK_MARK, PORT248_FN1), | ||
980 | PINMUX_DATA(MFG2_OUT1_MARK, PORT248_FN2), | ||
981 | PINMUX_DATA(PORT248_SCIFB_SCK_MARK, PORT248_FN3), | ||
982 | PINMUX_DATA(TPU2TO0_MARK, PORT248_FN4), | ||
983 | PINMUX_DATA(PORT249_IROUT_MARK, PORT249_FN1), | ||
984 | PINMUX_DATA(MFG4_IN1_MARK, PORT249_FN2), | ||
985 | PINMUX_DATA(SDHICLK0_MARK, PORT250_FN1), | ||
986 | PINMUX_DATA(TCK2_SWCLK_MC0_MARK, PORT250_FN2), | ||
987 | PINMUX_DATA(SDHICD0_MARK, PORT251_FN1), | ||
988 | PINMUX_DATA(SDHID0_0_MARK, PORT252_FN1), | ||
989 | PINMUX_DATA(TMS2_SWDIO_MC0_MARK, PORT252_FN2), | ||
990 | PINMUX_DATA(SDHID0_1_MARK, PORT253_FN1), | ||
991 | PINMUX_DATA(TDO2_SWO0_MC0_MARK, PORT253_FN2), | ||
992 | PINMUX_DATA(SDHID0_2_MARK, PORT254_FN1), | ||
993 | PINMUX_DATA(TDI2_MARK, PORT254_FN2), | ||
994 | PINMUX_DATA(SDHID0_3_MARK, PORT255_FN1), | ||
995 | PINMUX_DATA(RTCK2_SWO1_MC0_MARK, PORT255_FN2), | ||
996 | PINMUX_DATA(SDHICMD0_MARK, PORT256_FN1), | ||
997 | PINMUX_DATA(TRST2_MARK, PORT256_FN2), | ||
998 | PINMUX_DATA(SDHIWP0_MARK, PORT257_FN1), | ||
999 | PINMUX_DATA(EDBGREQ2_MARK, PORT257_FN2), | ||
1000 | PINMUX_DATA(SDHICLK1_MARK, PORT258_FN1), | ||
1001 | PINMUX_DATA(TCK3_SWCLK_MC1_MARK, PORT258_FN2), | ||
1002 | PINMUX_DATA(SDHID1_0_MARK, PORT259_FN1), | ||
1003 | PINMUX_DATA(M11_SLCD_SO2_MARK, PORT259_FN2), | ||
1004 | PINMUX_DATA(TS_SPSYNC2_MARK, PORT259_FN3), | ||
1005 | PINMUX_DATA(TMS3_SWDIO_MC1_MARK, PORT259_FN4), | ||
1006 | PINMUX_DATA(SDHID1_1_MARK, PORT260_FN1), | ||
1007 | PINMUX_DATA(M9_SLCD_A02_MARK, PORT260_FN2), | ||
1008 | PINMUX_DATA(TS_SDAT2_MARK, PORT260_FN3), | ||
1009 | PINMUX_DATA(TDO3_SWO0_MC1_MARK, PORT260_FN4), | ||
1010 | PINMUX_DATA(SDHID1_2_MARK, PORT261_FN1), | ||
1011 | PINMUX_DATA(M10_SLCD_CK2_MARK, PORT261_FN2), | ||
1012 | PINMUX_DATA(TS_SDEN2_MARK, PORT261_FN3), | ||
1013 | PINMUX_DATA(TDI3_MARK, PORT261_FN4), | ||
1014 | PINMUX_DATA(SDHID1_3_MARK, PORT262_FN1), | ||
1015 | PINMUX_DATA(M12_SLCD_CE2_MARK, PORT262_FN2), | ||
1016 | PINMUX_DATA(TS_SCK2_MARK, PORT262_FN3), | ||
1017 | PINMUX_DATA(RTCK3_SWO1_MC1_MARK, PORT262_FN4), | ||
1018 | PINMUX_DATA(SDHICMD1_MARK, PORT263_FN1), | ||
1019 | PINMUX_DATA(TRST3_MARK, PORT263_FN2), | ||
1020 | PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1), | ||
1021 | }; | ||
1022 | |||
1023 | static struct pinmux_gpio pinmux_gpios[] = { | ||
1024 | /* 55-1 -> 55-5 (GPIO) */ | ||
1025 | GPIO_PORT_ALL(), | ||
1026 | |||
1027 | /* Special Pull-up / Pull-down Functions */ | ||
1028 | GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU), | ||
1029 | GPIO_FN(PORT68_KEYIN2_PU), GPIO_FN(PORT69_KEYIN3_PU), | ||
1030 | GPIO_FN(PORT70_KEYIN4_PU), GPIO_FN(PORT71_KEYIN5_PU), | ||
1031 | GPIO_FN(PORT72_KEYIN6_PU), | ||
1032 | |||
1033 | /* 55-1 (FN) */ | ||
1034 | GPIO_FN(VBUS_0), | ||
1035 | GPIO_FN(CPORT0), | ||
1036 | GPIO_FN(CPORT1), | ||
1037 | GPIO_FN(CPORT2), | ||
1038 | GPIO_FN(CPORT3), | ||
1039 | GPIO_FN(CPORT4), | ||
1040 | GPIO_FN(CPORT5), | ||
1041 | GPIO_FN(CPORT6), | ||
1042 | GPIO_FN(CPORT7), | ||
1043 | GPIO_FN(CPORT8), | ||
1044 | GPIO_FN(CPORT9), | ||
1045 | GPIO_FN(CPORT10), | ||
1046 | GPIO_FN(CPORT11), GPIO_FN(SIN2), | ||
1047 | GPIO_FN(CPORT12), GPIO_FN(XCTS2), | ||
1048 | GPIO_FN(CPORT13), GPIO_FN(RFSPO4), | ||
1049 | GPIO_FN(CPORT14), GPIO_FN(RFSPO5), | ||
1050 | GPIO_FN(CPORT15), GPIO_FN(SCIFA0_SCK), GPIO_FN(GPS_AGC2), | ||
1051 | GPIO_FN(CPORT16), GPIO_FN(SCIFA0_TXD), GPIO_FN(GPS_AGC3), | ||
1052 | GPIO_FN(CPORT17_IC_OE), GPIO_FN(SOUT2), | ||
1053 | GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(PORT19_VIO_CKO2), | ||
1054 | GPIO_FN(CPORT19_MPORT1), | ||
1055 | GPIO_FN(CPORT20), GPIO_FN(RFSPO6), | ||
1056 | GPIO_FN(CPORT21), GPIO_FN(STATUS0), | ||
1057 | GPIO_FN(CPORT22), GPIO_FN(STATUS1), | ||
1058 | GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7), | ||
1059 | GPIO_FN(B_SYNLD1), | ||
1060 | GPIO_FN(B_SYNLD2), GPIO_FN(SYSENMSK), | ||
1061 | GPIO_FN(XMAINPS), | ||
1062 | GPIO_FN(XDIVPS), | ||
1063 | GPIO_FN(XIDRST), | ||
1064 | GPIO_FN(IDCLK), GPIO_FN(IC_DP), | ||
1065 | GPIO_FN(IDIO), GPIO_FN(IC_DM), | ||
1066 | GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD), GPIO_FN(M02_BERDAT), | ||
1067 | GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP), | ||
1068 | GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK), | ||
1069 | GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS), | ||
1070 | GPIO_FN(PCMCLKO), | ||
1071 | GPIO_FN(SYNC8KO), | ||
1072 | |||
1073 | /* 55-2 (FN) */ | ||
1074 | GPIO_FN(DNPCM_A), | ||
1075 | GPIO_FN(UPPCM_A), | ||
1076 | GPIO_FN(VACK), | ||
1077 | GPIO_FN(XTALB1L), | ||
1078 | GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS), | ||
1079 | GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD), | ||
1080 | GPIO_FN(GPS_PWRDOWN), GPIO_FN(SCIFA0_CTS), | ||
1081 | GPIO_FN(GPS_IM), | ||
1082 | GPIO_FN(GPS_IS), | ||
1083 | GPIO_FN(GPS_QM), | ||
1084 | GPIO_FN(GPS_QS), | ||
1085 | GPIO_FN(FMSOCK), GPIO_FN(PORT49_IRDA_OUT), GPIO_FN(PORT49_IROUT), | ||
1086 | GPIO_FN(FMSOOLR), GPIO_FN(BBIF2_TSYNC2), GPIO_FN(TPU2TO2), | ||
1087 | GPIO_FN(IPORT3), GPIO_FN(FMSIOLR), | ||
1088 | GPIO_FN(FMSOOBT), GPIO_FN(BBIF2_TSCK2), GPIO_FN(TPU2TO3), | ||
1089 | GPIO_FN(OPORT1), GPIO_FN(FMSIOBT), | ||
1090 | GPIO_FN(FMSOSLD), GPIO_FN(BBIF2_TXD2), GPIO_FN(OPORT2), | ||
1091 | GPIO_FN(FMSOILR), GPIO_FN(PORT53_IRDA_IN), GPIO_FN(TPU3TO3), | ||
1092 | GPIO_FN(OPORT3), GPIO_FN(FMSIILR), | ||
1093 | GPIO_FN(FMSOIBT), GPIO_FN(PORT54_IRDA_FIRSEL), GPIO_FN(TPU3TO2), | ||
1094 | GPIO_FN(FMSIIBT), | ||
1095 | GPIO_FN(FMSISLD), GPIO_FN(MFG0_OUT1), GPIO_FN(TPU0TO0), | ||
1096 | GPIO_FN(A0_EA0), GPIO_FN(BS), | ||
1097 | GPIO_FN(A12_EA12), GPIO_FN(PORT58_VIO_CKOR), GPIO_FN(TPU4TO2), | ||
1098 | GPIO_FN(A13_EA13), GPIO_FN(PORT59_IROUT), GPIO_FN(MFG0_OUT2), | ||
1099 | GPIO_FN(TPU0TO1), | ||
1100 | GPIO_FN(A14_EA14), GPIO_FN(PORT60_KEYOUT5), | ||
1101 | GPIO_FN(A15_EA15), GPIO_FN(PORT61_KEYOUT4), | ||
1102 | GPIO_FN(A16_EA16), GPIO_FN(PORT62_KEYOUT3), GPIO_FN(MSIOF0_SS1), | ||
1103 | GPIO_FN(A17_EA17), GPIO_FN(PORT63_KEYOUT2), GPIO_FN(MSIOF0_TSYNC), | ||
1104 | GPIO_FN(A18_EA18), GPIO_FN(PORT64_KEYOUT1), GPIO_FN(MSIOF0_TSCK), | ||
1105 | GPIO_FN(A19_EA19), GPIO_FN(PORT65_KEYOUT0), GPIO_FN(MSIOF0_TXD), | ||
1106 | GPIO_FN(A20_EA20), GPIO_FN(PORT66_KEYIN0), GPIO_FN(MSIOF0_RSCK), | ||
1107 | GPIO_FN(A21_EA21), GPIO_FN(PORT67_KEYIN1), GPIO_FN(MSIOF0_RSYNC), | ||
1108 | GPIO_FN(A22_EA22), GPIO_FN(PORT68_KEYIN2), GPIO_FN(MSIOF0_MCK0), | ||
1109 | GPIO_FN(A23_EA23), GPIO_FN(PORT69_KEYIN3), GPIO_FN(MSIOF0_MCK1), | ||
1110 | GPIO_FN(A24_EA24), GPIO_FN(PORT70_KEYIN4), GPIO_FN(MSIOF0_RXD), | ||
1111 | GPIO_FN(A25_EA25), GPIO_FN(PORT71_KEYIN5), GPIO_FN(MSIOF0_SS2), | ||
1112 | GPIO_FN(A26), GPIO_FN(PORT72_KEYIN6), | ||
1113 | GPIO_FN(D0_ED0_NAF0), | ||
1114 | GPIO_FN(D1_ED1_NAF1), | ||
1115 | GPIO_FN(D2_ED2_NAF2), | ||
1116 | GPIO_FN(D3_ED3_NAF3), | ||
1117 | GPIO_FN(D4_ED4_NAF4), | ||
1118 | GPIO_FN(D5_ED5_NAF5), | ||
1119 | GPIO_FN(D6_ED6_NAF6), | ||
1120 | GPIO_FN(D7_ED7_NAF7), | ||
1121 | GPIO_FN(D8_ED8_NAF8), | ||
1122 | GPIO_FN(D9_ED9_NAF9), | ||
1123 | GPIO_FN(D10_ED10_NAF10), | ||
1124 | GPIO_FN(D11_ED11_NAF11), | ||
1125 | GPIO_FN(D12_ED12_NAF12), | ||
1126 | GPIO_FN(D13_ED13_NAF13), | ||
1127 | GPIO_FN(D14_ED14_NAF14), | ||
1128 | GPIO_FN(D15_ED15_NAF15), | ||
1129 | GPIO_FN(CS4), | ||
1130 | GPIO_FN(CS5A), GPIO_FN(FMSICK), | ||
1131 | |||
1132 | /* 55-3 (FN) */ | ||
1133 | GPIO_FN(CS5B), GPIO_FN(FCE1), | ||
1134 | GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(CS6A), GPIO_FN(DACK0), | ||
1135 | GPIO_FN(FCE0), | ||
1136 | GPIO_FN(WAIT), GPIO_FN(DREQ0), | ||
1137 | GPIO_FN(RD_XRD), | ||
1138 | GPIO_FN(WE0_XWR0_FWE), | ||
1139 | GPIO_FN(WE1_XWR1), | ||
1140 | GPIO_FN(FRB), | ||
1141 | GPIO_FN(CKO), | ||
1142 | GPIO_FN(NBRSTOUT), | ||
1143 | GPIO_FN(NBRST), | ||
1144 | GPIO_FN(GPS_EPPSIN), | ||
1145 | GPIO_FN(LATCHPULSE), | ||
1146 | GPIO_FN(LTESIGNAL), | ||
1147 | GPIO_FN(LEGACYSTATE), | ||
1148 | GPIO_FN(TCKON), | ||
1149 | GPIO_FN(VIO_VD), GPIO_FN(PORT128_KEYOUT0), GPIO_FN(IPORT0), | ||
1150 | GPIO_FN(VIO_HD), GPIO_FN(PORT129_KEYOUT1), GPIO_FN(IPORT1), | ||
1151 | GPIO_FN(VIO_D0), GPIO_FN(PORT130_KEYOUT2), GPIO_FN(PORT130_MSIOF2_RXD), | ||
1152 | GPIO_FN(VIO_D1), GPIO_FN(PORT131_KEYOUT3), GPIO_FN(PORT131_MSIOF2_SS1), | ||
1153 | GPIO_FN(VIO_D2), GPIO_FN(PORT132_KEYOUT4), GPIO_FN(PORT132_MSIOF2_SS2), | ||
1154 | GPIO_FN(VIO_D3), GPIO_FN(PORT133_KEYOUT5), | ||
1155 | GPIO_FN(PORT133_MSIOF2_TSYNC), | ||
1156 | GPIO_FN(VIO_D4), GPIO_FN(PORT134_KEYIN0), GPIO_FN(PORT134_MSIOF2_TXD), | ||
1157 | GPIO_FN(VIO_D5), GPIO_FN(PORT135_KEYIN1), GPIO_FN(PORT135_MSIOF2_TSCK), | ||
1158 | GPIO_FN(VIO_D6), GPIO_FN(PORT136_KEYIN2), | ||
1159 | GPIO_FN(VIO_D7), GPIO_FN(PORT137_KEYIN3), | ||
1160 | GPIO_FN(VIO_D8), GPIO_FN(M9_SLCD_A01), GPIO_FN(PORT138_FSIAOMC), | ||
1161 | GPIO_FN(VIO_D9), GPIO_FN(M10_SLCD_CK1), GPIO_FN(PORT139_FSIAOLR), | ||
1162 | GPIO_FN(VIO_D10), GPIO_FN(M11_SLCD_SO1), GPIO_FN(TPU0TO2), | ||
1163 | GPIO_FN(PORT140_FSIAOBT), | ||
1164 | GPIO_FN(VIO_D11), GPIO_FN(M12_SLCD_CE1), GPIO_FN(TPU0TO3), | ||
1165 | GPIO_FN(PORT141_FSIAOSLD), | ||
1166 | GPIO_FN(VIO_D12), GPIO_FN(M13_BSW), GPIO_FN(PORT142_FSIACK), | ||
1167 | GPIO_FN(VIO_D13), GPIO_FN(M14_GSW), GPIO_FN(PORT143_FSIAILR), | ||
1168 | GPIO_FN(VIO_D14), GPIO_FN(M15_RSW), GPIO_FN(PORT144_FSIAIBT), | ||
1169 | GPIO_FN(VIO_D15), GPIO_FN(TPU1TO3), GPIO_FN(PORT145_FSIAISLD), | ||
1170 | GPIO_FN(VIO_CLK), GPIO_FN(PORT146_KEYIN4), GPIO_FN(IPORT2), | ||
1171 | GPIO_FN(VIO_FIELD), GPIO_FN(PORT147_KEYIN5), | ||
1172 | GPIO_FN(VIO_CKO), GPIO_FN(PORT148_KEYIN6), | ||
1173 | GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(MFG0_IN1), | ||
1174 | GPIO_FN(MFG0_IN2), | ||
1175 | GPIO_FN(TS_SPSYNC3), GPIO_FN(MSIOF2_RSCK), | ||
1176 | GPIO_FN(TS_SDAT3), GPIO_FN(MSIOF2_RSYNC), | ||
1177 | GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT153_MSIOF2_SS1), | ||
1178 | GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1), GPIO_FN(MSIOF2_MCK0), | ||
1179 | GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1), GPIO_FN(MSIOF2_MCK1), | ||
1180 | GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT156_MSIOF2_SS2), | ||
1181 | GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT157_MSIOF2_RXD), | ||
1182 | |||
1183 | /* 55-4 (FN) */ | ||
1184 | GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3), | ||
1185 | GPIO_FN(PORT159_SCIFB_SCK), GPIO_FN(PORT159_SCIFA5_SCK), GPIO_FN(NMI), | ||
1186 | GPIO_FN(PORT160_SCIFB_TXD), GPIO_FN(PORT160_SCIFA5_TXD), GPIO_FN(SOUT0), | ||
1187 | GPIO_FN(PORT161_SCIFB_CTS), GPIO_FN(PORT161_SCIFA5_CTS), GPIO_FN(XCTS0), | ||
1188 | GPIO_FN(MFG3_IN2), | ||
1189 | GPIO_FN(PORT162_SCIFB_RXD), GPIO_FN(PORT162_SCIFA5_RXD), GPIO_FN(SIN0), | ||
1190 | GPIO_FN(MFG3_IN1), | ||
1191 | GPIO_FN(PORT163_SCIFB_RTS), GPIO_FN(PORT163_SCIFA5_RTS), GPIO_FN(XRTS0), | ||
1192 | GPIO_FN(MFG3_OUT1), GPIO_FN(TPU3TO0), | ||
1193 | GPIO_FN(LCDD0), GPIO_FN(PORT192_KEYOUT0), GPIO_FN(EXT_CKI), | ||
1194 | GPIO_FN(LCDD1), GPIO_FN(PORT193_KEYOUT1), GPIO_FN(PORT193_SCIFA5_CTS), | ||
1195 | GPIO_FN(BBIF2_TSYNC1), | ||
1196 | GPIO_FN(LCDD2), GPIO_FN(PORT194_KEYOUT2), GPIO_FN(PORT194_SCIFA5_RTS), | ||
1197 | GPIO_FN(BBIF2_TSCK1), | ||
1198 | GPIO_FN(LCDD3), GPIO_FN(PORT195_KEYOUT3), GPIO_FN(PORT195_SCIFA5_RXD), | ||
1199 | GPIO_FN(BBIF2_TXD1), | ||
1200 | GPIO_FN(LCDD4), GPIO_FN(PORT196_KEYOUT4), GPIO_FN(PORT196_SCIFA5_TXD), | ||
1201 | GPIO_FN(LCDD5), GPIO_FN(PORT197_KEYOUT5), GPIO_FN(PORT197_SCIFA5_SCK), | ||
1202 | GPIO_FN(MFG2_OUT2), | ||
1203 | GPIO_FN(LCDD6), | ||
1204 | GPIO_FN(LCDD7), GPIO_FN(TPU4TO1), GPIO_FN(MFG4_OUT2), | ||
1205 | GPIO_FN(LCDD8), GPIO_FN(PORT200_KEYIN0), GPIO_FN(VIO_DR0), | ||
1206 | GPIO_FN(D16), | ||
1207 | GPIO_FN(LCDD9), GPIO_FN(PORT201_KEYIN1), GPIO_FN(VIO_DR1), | ||
1208 | GPIO_FN(D17), | ||
1209 | GPIO_FN(LCDD10), GPIO_FN(PORT202_KEYIN2), GPIO_FN(VIO_DR2), | ||
1210 | GPIO_FN(D18), | ||
1211 | GPIO_FN(LCDD11), GPIO_FN(PORT203_KEYIN3), GPIO_FN(VIO_DR3), | ||
1212 | GPIO_FN(D19), | ||
1213 | GPIO_FN(LCDD12), GPIO_FN(PORT204_KEYIN4), GPIO_FN(VIO_DR4), | ||
1214 | GPIO_FN(D20), | ||
1215 | GPIO_FN(LCDD13), GPIO_FN(PORT205_KEYIN5), GPIO_FN(VIO_DR5), | ||
1216 | GPIO_FN(D21), | ||
1217 | GPIO_FN(LCDD14), GPIO_FN(PORT206_KEYIN6), GPIO_FN(VIO_DR6), | ||
1218 | GPIO_FN(D22), | ||
1219 | GPIO_FN(LCDD15), GPIO_FN(PORT207_MSIOF0L_SS1), GPIO_FN(PORT207_KEYOUT0), | ||
1220 | GPIO_FN(VIO_DR7), GPIO_FN(D23), | ||
1221 | GPIO_FN(LCDD16), GPIO_FN(PORT208_MSIOF0L_SS2), GPIO_FN(PORT208_KEYOUT1), | ||
1222 | GPIO_FN(VIO_VDR), GPIO_FN(D24), | ||
1223 | GPIO_FN(LCDD17), GPIO_FN(PORT209_KEYOUT2), GPIO_FN(VIO_HDR), | ||
1224 | GPIO_FN(D25), | ||
1225 | GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(PORT210_MSIOF0L_SS1), | ||
1226 | GPIO_FN(D26), | ||
1227 | GPIO_FN(LCDD19), GPIO_FN(PORT211_MSIOF0L_SS2), GPIO_FN(D27), | ||
1228 | GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0), | ||
1229 | GPIO_FN(D28), | ||
1230 | GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1), | ||
1231 | GPIO_FN(D29), | ||
1232 | GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_RSCK), | ||
1233 | GPIO_FN(D30), | ||
1234 | GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_RSYNC), | ||
1235 | GPIO_FN(D31), | ||
1236 | GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(PORT216_KEYOUT3), | ||
1237 | GPIO_FN(VIO_CLKR), | ||
1238 | GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_TSYNC), | ||
1239 | GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3), | ||
1240 | GPIO_FN(PORT218_VIO_CKOR), GPIO_FN(PORT218_KEYOUT4), | ||
1241 | GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_TSCK), | ||
1242 | GPIO_FN(LCDVSYN), GPIO_FN(LCDVSYN2), GPIO_FN(PORT220_KEYOUT5), | ||
1243 | GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(PWEN), GPIO_FN(MSIOF0L_RXD), | ||
1244 | GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(OVCN), | ||
1245 | GPIO_FN(MSIOF0L_TXD), | ||
1246 | GPIO_FN(SCIFA1_TXD), GPIO_FN(OVCN2), | ||
1247 | GPIO_FN(EXTLP), GPIO_FN(SCIFA1_SCK), GPIO_FN(USBTERM), | ||
1248 | GPIO_FN(PORT226_VIO_CKO2), | ||
1249 | GPIO_FN(SCIFA1_RTS), GPIO_FN(IDIN), | ||
1250 | GPIO_FN(SCIFA1_RXD), | ||
1251 | GPIO_FN(SCIFA1_CTS), GPIO_FN(MFG1_IN1), | ||
1252 | GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA2_TXD2), GPIO_FN(PORT230_FSIAOMC), | ||
1253 | GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA2_CTS2), GPIO_FN(PORT231_FSIAOLR), | ||
1254 | GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA2_SCK2), GPIO_FN(PORT232_FSIAOBT), | ||
1255 | GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA2_RXD2), GPIO_FN(GPS_VCOTRIG), | ||
1256 | GPIO_FN(PORT233_FSIACK), | ||
1257 | GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA2_RTS2), GPIO_FN(PORT234_FSIAOSLD), | ||
1258 | GPIO_FN(MSIOF1_RSYNC), GPIO_FN(OPORT0), GPIO_FN(MFG1_IN2), | ||
1259 | GPIO_FN(PORT235_FSIAILR), | ||
1260 | GPIO_FN(MSIOF1_MCK0), GPIO_FN(I2C_SDA2), GPIO_FN(PORT236_FSIAIBT), | ||
1261 | GPIO_FN(MSIOF1_MCK1), GPIO_FN(I2C_SCL2), GPIO_FN(PORT237_FSIAISLD), | ||
1262 | GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3), | ||
1263 | |||
1264 | /* 55-5 (FN) */ | ||
1265 | GPIO_FN(MSIOF1_SS2), | ||
1266 | GPIO_FN(SCIFA6_TXD), | ||
1267 | GPIO_FN(PORT241_IRDA_OUT), GPIO_FN(PORT241_IROUT), GPIO_FN(MFG4_OUT1), | ||
1268 | GPIO_FN(TPU4TO0), | ||
1269 | GPIO_FN(PORT242_IRDA_IN), GPIO_FN(MFG4_IN2), | ||
1270 | GPIO_FN(PORT243_IRDA_FIRSEL), GPIO_FN(PORT243_VIO_CKO2), | ||
1271 | GPIO_FN(PORT244_SCIFA5_CTS), GPIO_FN(MFG2_IN1), | ||
1272 | GPIO_FN(PORT244_SCIFB_CTS), | ||
1273 | GPIO_FN(PORT245_SCIFA5_RTS), GPIO_FN(MFG2_IN2), | ||
1274 | GPIO_FN(PORT245_SCIFB_RTS), | ||
1275 | GPIO_FN(PORT246_SCIFA5_RXD), GPIO_FN(MFG1_OUT1), | ||
1276 | GPIO_FN(PORT246_SCIFB_RXD), GPIO_FN(TPU1TO0), | ||
1277 | GPIO_FN(PORT247_SCIFA5_TXD), GPIO_FN(MFG3_OUT2), | ||
1278 | GPIO_FN(PORT247_SCIFB_TXD), GPIO_FN(TPU3TO1), | ||
1279 | GPIO_FN(PORT248_SCIFA5_SCK), GPIO_FN(MFG2_OUT1), | ||
1280 | GPIO_FN(PORT248_SCIFB_SCK), GPIO_FN(TPU2TO0), | ||
1281 | GPIO_FN(PORT249_IROUT), GPIO_FN(MFG4_IN1), | ||
1282 | GPIO_FN(SDHICLK0), GPIO_FN(TCK2_SWCLK_MC0), | ||
1283 | GPIO_FN(SDHICD0), | ||
1284 | GPIO_FN(SDHID0_0), GPIO_FN(TMS2_SWDIO_MC0), | ||
1285 | GPIO_FN(SDHID0_1), GPIO_FN(TDO2_SWO0_MC0), | ||
1286 | GPIO_FN(SDHID0_2), GPIO_FN(TDI2), | ||
1287 | GPIO_FN(SDHID0_3), GPIO_FN(RTCK2_SWO1_MC0), | ||
1288 | GPIO_FN(SDHICMD0), GPIO_FN(TRST2), | ||
1289 | GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2), | ||
1290 | GPIO_FN(SDHICLK1), GPIO_FN(TCK3_SWCLK_MC1), | ||
1291 | GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2), GPIO_FN(TS_SPSYNC2), | ||
1292 | GPIO_FN(TMS3_SWDIO_MC1), | ||
1293 | GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_A02), GPIO_FN(TS_SDAT2), | ||
1294 | GPIO_FN(TDO3_SWO0_MC1), | ||
1295 | GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2), GPIO_FN(TS_SDEN2), | ||
1296 | GPIO_FN(TDI3), | ||
1297 | GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2), GPIO_FN(TS_SCK2), | ||
1298 | GPIO_FN(RTCK3_SWO1_MC1), | ||
1299 | GPIO_FN(SDHICMD1), GPIO_FN(TRST3), | ||
1300 | GPIO_FN(RESETOUTS), | ||
1301 | }; | ||
1302 | |||
1303 | static struct pinmux_cfg_reg pinmux_config_regs[] = { | ||
1304 | PORTCR(0, 0xe6050000), /* PORT0CR */ | ||
1305 | PORTCR(1, 0xe6050001), /* PORT1CR */ | ||
1306 | PORTCR(2, 0xe6050002), /* PORT2CR */ | ||
1307 | PORTCR(3, 0xe6050003), /* PORT3CR */ | ||
1308 | PORTCR(4, 0xe6050004), /* PORT4CR */ | ||
1309 | PORTCR(5, 0xe6050005), /* PORT5CR */ | ||
1310 | PORTCR(6, 0xe6050006), /* PORT6CR */ | ||
1311 | PORTCR(7, 0xe6050007), /* PORT7CR */ | ||
1312 | PORTCR(8, 0xe6050008), /* PORT8CR */ | ||
1313 | PORTCR(9, 0xe6050009), /* PORT9CR */ | ||
1314 | |||
1315 | PORTCR(10, 0xe605000a), /* PORT10CR */ | ||
1316 | PORTCR(11, 0xe605000b), /* PORT11CR */ | ||
1317 | PORTCR(12, 0xe605000c), /* PORT12CR */ | ||
1318 | PORTCR(13, 0xe605000d), /* PORT13CR */ | ||
1319 | PORTCR(14, 0xe605000e), /* PORT14CR */ | ||
1320 | PORTCR(15, 0xe605000f), /* PORT15CR */ | ||
1321 | PORTCR(16, 0xe6050010), /* PORT16CR */ | ||
1322 | PORTCR(17, 0xe6050011), /* PORT17CR */ | ||
1323 | PORTCR(18, 0xe6050012), /* PORT18CR */ | ||
1324 | PORTCR(19, 0xe6050013), /* PORT19CR */ | ||
1325 | |||
1326 | PORTCR(20, 0xe6050014), /* PORT20CR */ | ||
1327 | PORTCR(21, 0xe6050015), /* PORT21CR */ | ||
1328 | PORTCR(22, 0xe6050016), /* PORT22CR */ | ||
1329 | PORTCR(23, 0xe6050017), /* PORT23CR */ | ||
1330 | PORTCR(24, 0xe6050018), /* PORT24CR */ | ||
1331 | PORTCR(25, 0xe6050019), /* PORT25CR */ | ||
1332 | PORTCR(26, 0xe605001a), /* PORT26CR */ | ||
1333 | PORTCR(27, 0xe605001b), /* PORT27CR */ | ||
1334 | PORTCR(28, 0xe605001c), /* PORT28CR */ | ||
1335 | PORTCR(29, 0xe605001d), /* PORT29CR */ | ||
1336 | |||
1337 | PORTCR(30, 0xe605001e), /* PORT30CR */ | ||
1338 | PORTCR(31, 0xe605001f), /* PORT31CR */ | ||
1339 | PORTCR(32, 0xe6050020), /* PORT32CR */ | ||
1340 | PORTCR(33, 0xe6050021), /* PORT33CR */ | ||
1341 | PORTCR(34, 0xe6050022), /* PORT34CR */ | ||
1342 | PORTCR(35, 0xe6050023), /* PORT35CR */ | ||
1343 | PORTCR(36, 0xe6050024), /* PORT36CR */ | ||
1344 | PORTCR(37, 0xe6050025), /* PORT37CR */ | ||
1345 | PORTCR(38, 0xe6050026), /* PORT38CR */ | ||
1346 | PORTCR(39, 0xe6050027), /* PORT39CR */ | ||
1347 | |||
1348 | PORTCR(40, 0xe6050028), /* PORT40CR */ | ||
1349 | PORTCR(41, 0xe6050029), /* PORT41CR */ | ||
1350 | PORTCR(42, 0xe605002a), /* PORT42CR */ | ||
1351 | PORTCR(43, 0xe605002b), /* PORT43CR */ | ||
1352 | PORTCR(44, 0xe605002c), /* PORT44CR */ | ||
1353 | PORTCR(45, 0xe605002d), /* PORT45CR */ | ||
1354 | PORTCR(46, 0xe605002e), /* PORT46CR */ | ||
1355 | PORTCR(47, 0xe605002f), /* PORT47CR */ | ||
1356 | PORTCR(48, 0xe6050030), /* PORT48CR */ | ||
1357 | PORTCR(49, 0xe6050031), /* PORT49CR */ | ||
1358 | |||
1359 | PORTCR(50, 0xe6050032), /* PORT50CR */ | ||
1360 | PORTCR(51, 0xe6050033), /* PORT51CR */ | ||
1361 | PORTCR(52, 0xe6050034), /* PORT52CR */ | ||
1362 | PORTCR(53, 0xe6050035), /* PORT53CR */ | ||
1363 | PORTCR(54, 0xe6050036), /* PORT54CR */ | ||
1364 | PORTCR(55, 0xe6050037), /* PORT55CR */ | ||
1365 | PORTCR(56, 0xe6050038), /* PORT56CR */ | ||
1366 | PORTCR(57, 0xe6050039), /* PORT57CR */ | ||
1367 | PORTCR(58, 0xe605003a), /* PORT58CR */ | ||
1368 | PORTCR(59, 0xe605003b), /* PORT59CR */ | ||
1369 | |||
1370 | PORTCR(60, 0xe605003c), /* PORT60CR */ | ||
1371 | PORTCR(61, 0xe605003d), /* PORT61CR */ | ||
1372 | PORTCR(62, 0xe605003e), /* PORT62CR */ | ||
1373 | PORTCR(63, 0xe605003f), /* PORT63CR */ | ||
1374 | PORTCR(64, 0xe6050040), /* PORT64CR */ | ||
1375 | PORTCR(65, 0xe6050041), /* PORT65CR */ | ||
1376 | PORTCR(66, 0xe6050042), /* PORT66CR */ | ||
1377 | PORTCR(67, 0xe6050043), /* PORT67CR */ | ||
1378 | PORTCR(68, 0xe6050044), /* PORT68CR */ | ||
1379 | PORTCR(69, 0xe6050045), /* PORT69CR */ | ||
1380 | |||
1381 | PORTCR(70, 0xe6050046), /* PORT70CR */ | ||
1382 | PORTCR(71, 0xe6050047), /* PORT71CR */ | ||
1383 | PORTCR(72, 0xe6050048), /* PORT72CR */ | ||
1384 | PORTCR(73, 0xe6050049), /* PORT73CR */ | ||
1385 | PORTCR(74, 0xe605004a), /* PORT74CR */ | ||
1386 | PORTCR(75, 0xe605004b), /* PORT75CR */ | ||
1387 | PORTCR(76, 0xe605004c), /* PORT76CR */ | ||
1388 | PORTCR(77, 0xe605004d), /* PORT77CR */ | ||
1389 | PORTCR(78, 0xe605004e), /* PORT78CR */ | ||
1390 | PORTCR(79, 0xe605004f), /* PORT79CR */ | ||
1391 | |||
1392 | PORTCR(80, 0xe6050050), /* PORT80CR */ | ||
1393 | PORTCR(81, 0xe6050051), /* PORT81CR */ | ||
1394 | PORTCR(82, 0xe6050052), /* PORT82CR */ | ||
1395 | PORTCR(83, 0xe6050053), /* PORT83CR */ | ||
1396 | PORTCR(84, 0xe6050054), /* PORT84CR */ | ||
1397 | PORTCR(85, 0xe6050055), /* PORT85CR */ | ||
1398 | PORTCR(86, 0xe6050056), /* PORT86CR */ | ||
1399 | PORTCR(87, 0xe6050057), /* PORT87CR */ | ||
1400 | PORTCR(88, 0xe6050058), /* PORT88CR */ | ||
1401 | PORTCR(89, 0xe6050059), /* PORT89CR */ | ||
1402 | |||
1403 | PORTCR(90, 0xe605005a), /* PORT90CR */ | ||
1404 | PORTCR(91, 0xe605005b), /* PORT91CR */ | ||
1405 | PORTCR(92, 0xe605005c), /* PORT92CR */ | ||
1406 | PORTCR(93, 0xe605005d), /* PORT93CR */ | ||
1407 | PORTCR(94, 0xe605005e), /* PORT94CR */ | ||
1408 | PORTCR(95, 0xe605005f), /* PORT95CR */ | ||
1409 | PORTCR(96, 0xe6050060), /* PORT96CR */ | ||
1410 | PORTCR(97, 0xe6050061), /* PORT97CR */ | ||
1411 | PORTCR(98, 0xe6050062), /* PORT98CR */ | ||
1412 | PORTCR(99, 0xe6050063), /* PORT99CR */ | ||
1413 | |||
1414 | PORTCR(100, 0xe6050064), /* PORT100CR */ | ||
1415 | PORTCR(101, 0xe6050065), /* PORT101CR */ | ||
1416 | PORTCR(102, 0xe6050066), /* PORT102CR */ | ||
1417 | PORTCR(103, 0xe6050067), /* PORT103CR */ | ||
1418 | PORTCR(104, 0xe6050068), /* PORT104CR */ | ||
1419 | PORTCR(105, 0xe6050069), /* PORT105CR */ | ||
1420 | PORTCR(106, 0xe605006a), /* PORT106CR */ | ||
1421 | PORTCR(107, 0xe605006b), /* PORT107CR */ | ||
1422 | PORTCR(108, 0xe605006c), /* PORT108CR */ | ||
1423 | PORTCR(109, 0xe605006d), /* PORT109CR */ | ||
1424 | |||
1425 | PORTCR(110, 0xe605006e), /* PORT110CR */ | ||
1426 | PORTCR(111, 0xe605006f), /* PORT111CR */ | ||
1427 | PORTCR(112, 0xe6050070), /* PORT112CR */ | ||
1428 | PORTCR(113, 0xe6050071), /* PORT113CR */ | ||
1429 | PORTCR(114, 0xe6050072), /* PORT114CR */ | ||
1430 | PORTCR(115, 0xe6050073), /* PORT115CR */ | ||
1431 | PORTCR(116, 0xe6050074), /* PORT116CR */ | ||
1432 | PORTCR(117, 0xe6050075), /* PORT117CR */ | ||
1433 | PORTCR(118, 0xe6050076), /* PORT118CR */ | ||
1434 | |||
1435 | PORTCR(128, 0xe6051080), /* PORT128CR */ | ||
1436 | PORTCR(129, 0xe6051081), /* PORT129CR */ | ||
1437 | |||
1438 | PORTCR(130, 0xe6051082), /* PORT130CR */ | ||
1439 | PORTCR(131, 0xe6051083), /* PORT131CR */ | ||
1440 | PORTCR(132, 0xe6051084), /* PORT132CR */ | ||
1441 | PORTCR(133, 0xe6051085), /* PORT133CR */ | ||
1442 | PORTCR(134, 0xe6051086), /* PORT134CR */ | ||
1443 | PORTCR(135, 0xe6051087), /* PORT135CR */ | ||
1444 | PORTCR(136, 0xe6051088), /* PORT136CR */ | ||
1445 | PORTCR(137, 0xe6051089), /* PORT137CR */ | ||
1446 | PORTCR(138, 0xe605108a), /* PORT138CR */ | ||
1447 | PORTCR(139, 0xe605108b), /* PORT139CR */ | ||
1448 | |||
1449 | PORTCR(140, 0xe605108c), /* PORT140CR */ | ||
1450 | PORTCR(141, 0xe605108d), /* PORT141CR */ | ||
1451 | PORTCR(142, 0xe605108e), /* PORT142CR */ | ||
1452 | PORTCR(143, 0xe605108f), /* PORT143CR */ | ||
1453 | PORTCR(144, 0xe6051090), /* PORT144CR */ | ||
1454 | PORTCR(145, 0xe6051091), /* PORT145CR */ | ||
1455 | PORTCR(146, 0xe6051092), /* PORT146CR */ | ||
1456 | PORTCR(147, 0xe6051093), /* PORT147CR */ | ||
1457 | PORTCR(148, 0xe6051094), /* PORT148CR */ | ||
1458 | PORTCR(149, 0xe6051095), /* PORT149CR */ | ||
1459 | |||
1460 | PORTCR(150, 0xe6051096), /* PORT150CR */ | ||
1461 | PORTCR(151, 0xe6051097), /* PORT151CR */ | ||
1462 | PORTCR(152, 0xe6051098), /* PORT152CR */ | ||
1463 | PORTCR(153, 0xe6051099), /* PORT153CR */ | ||
1464 | PORTCR(154, 0xe605109a), /* PORT154CR */ | ||
1465 | PORTCR(155, 0xe605109b), /* PORT155CR */ | ||
1466 | PORTCR(156, 0xe605109c), /* PORT156CR */ | ||
1467 | PORTCR(157, 0xe605109d), /* PORT157CR */ | ||
1468 | PORTCR(158, 0xe605109e), /* PORT158CR */ | ||
1469 | PORTCR(159, 0xe605109f), /* PORT159CR */ | ||
1470 | |||
1471 | PORTCR(160, 0xe60510a0), /* PORT160CR */ | ||
1472 | PORTCR(161, 0xe60510a1), /* PORT161CR */ | ||
1473 | PORTCR(162, 0xe60510a2), /* PORT162CR */ | ||
1474 | PORTCR(163, 0xe60510a3), /* PORT163CR */ | ||
1475 | PORTCR(164, 0xe60510a4), /* PORT164CR */ | ||
1476 | |||
1477 | PORTCR(192, 0xe60520c0), /* PORT192CR */ | ||
1478 | PORTCR(193, 0xe60520c1), /* PORT193CR */ | ||
1479 | PORTCR(194, 0xe60520c2), /* PORT194CR */ | ||
1480 | PORTCR(195, 0xe60520c3), /* PORT195CR */ | ||
1481 | PORTCR(196, 0xe60520c4), /* PORT196CR */ | ||
1482 | PORTCR(197, 0xe60520c5), /* PORT197CR */ | ||
1483 | PORTCR(198, 0xe60520c6), /* PORT198CR */ | ||
1484 | PORTCR(199, 0xe60520c7), /* PORT199CR */ | ||
1485 | |||
1486 | PORTCR(200, 0xe60520c8), /* PORT200CR */ | ||
1487 | PORTCR(201, 0xe60520c9), /* PORT201CR */ | ||
1488 | PORTCR(202, 0xe60520ca), /* PORT202CR */ | ||
1489 | PORTCR(203, 0xe60520cb), /* PORT203CR */ | ||
1490 | PORTCR(204, 0xe60520cc), /* PORT204CR */ | ||
1491 | PORTCR(205, 0xe60520cd), /* PORT205CR */ | ||
1492 | PORTCR(206, 0xe60520ce), /* PORT206CR */ | ||
1493 | PORTCR(207, 0xe60520cf), /* PORT207CR */ | ||
1494 | PORTCR(208, 0xe60520d0), /* PORT208CR */ | ||
1495 | PORTCR(209, 0xe60520d1), /* PORT209CR */ | ||
1496 | |||
1497 | PORTCR(210, 0xe60520d2), /* PORT210CR */ | ||
1498 | PORTCR(211, 0xe60520d3), /* PORT211CR */ | ||
1499 | PORTCR(212, 0xe60520d4), /* PORT212CR */ | ||
1500 | PORTCR(213, 0xe60520d5), /* PORT213CR */ | ||
1501 | PORTCR(214, 0xe60520d6), /* PORT214CR */ | ||
1502 | PORTCR(215, 0xe60520d7), /* PORT215CR */ | ||
1503 | PORTCR(216, 0xe60520d8), /* PORT216CR */ | ||
1504 | PORTCR(217, 0xe60520d9), /* PORT217CR */ | ||
1505 | PORTCR(218, 0xe60520da), /* PORT218CR */ | ||
1506 | PORTCR(219, 0xe60520db), /* PORT219CR */ | ||
1507 | |||
1508 | PORTCR(220, 0xe60520dc), /* PORT220CR */ | ||
1509 | PORTCR(221, 0xe60520dd), /* PORT221CR */ | ||
1510 | PORTCR(222, 0xe60520de), /* PORT222CR */ | ||
1511 | PORTCR(223, 0xe60520df), /* PORT223CR */ | ||
1512 | PORTCR(224, 0xe60520e0), /* PORT224CR */ | ||
1513 | PORTCR(225, 0xe60520e1), /* PORT225CR */ | ||
1514 | PORTCR(226, 0xe60520e2), /* PORT226CR */ | ||
1515 | PORTCR(227, 0xe60520e3), /* PORT227CR */ | ||
1516 | PORTCR(228, 0xe60520e4), /* PORT228CR */ | ||
1517 | PORTCR(229, 0xe60520e5), /* PORT229CR */ | ||
1518 | |||
1519 | PORTCR(230, 0xe60520e6), /* PORT230CR */ | ||
1520 | PORTCR(231, 0xe60520e7), /* PORT231CR */ | ||
1521 | PORTCR(232, 0xe60520e8), /* PORT232CR */ | ||
1522 | PORTCR(233, 0xe60520e9), /* PORT233CR */ | ||
1523 | PORTCR(234, 0xe60520ea), /* PORT234CR */ | ||
1524 | PORTCR(235, 0xe60520eb), /* PORT235CR */ | ||
1525 | PORTCR(236, 0xe60520ec), /* PORT236CR */ | ||
1526 | PORTCR(237, 0xe60520ed), /* PORT237CR */ | ||
1527 | PORTCR(238, 0xe60520ee), /* PORT238CR */ | ||
1528 | PORTCR(239, 0xe60520ef), /* PORT239CR */ | ||
1529 | |||
1530 | PORTCR(240, 0xe60520f0), /* PORT240CR */ | ||
1531 | PORTCR(241, 0xe60520f1), /* PORT241CR */ | ||
1532 | PORTCR(242, 0xe60520f2), /* PORT242CR */ | ||
1533 | PORTCR(243, 0xe60520f3), /* PORT243CR */ | ||
1534 | PORTCR(244, 0xe60520f4), /* PORT244CR */ | ||
1535 | PORTCR(245, 0xe60520f5), /* PORT245CR */ | ||
1536 | PORTCR(246, 0xe60520f6), /* PORT246CR */ | ||
1537 | PORTCR(247, 0xe60520f7), /* PORT247CR */ | ||
1538 | PORTCR(248, 0xe60520f8), /* PORT248CR */ | ||
1539 | PORTCR(249, 0xe60520f9), /* PORT249CR */ | ||
1540 | |||
1541 | PORTCR(250, 0xe60520fa), /* PORT250CR */ | ||
1542 | PORTCR(251, 0xe60520fb), /* PORT251CR */ | ||
1543 | PORTCR(252, 0xe60520fc), /* PORT252CR */ | ||
1544 | PORTCR(253, 0xe60520fd), /* PORT253CR */ | ||
1545 | PORTCR(254, 0xe60520fe), /* PORT254CR */ | ||
1546 | PORTCR(255, 0xe60520ff), /* PORT255CR */ | ||
1547 | PORTCR(256, 0xe6052100), /* PORT256CR */ | ||
1548 | PORTCR(257, 0xe6052101), /* PORT257CR */ | ||
1549 | PORTCR(258, 0xe6052102), /* PORT258CR */ | ||
1550 | PORTCR(259, 0xe6052103), /* PORT259CR */ | ||
1551 | |||
1552 | PORTCR(260, 0xe6052104), /* PORT260CR */ | ||
1553 | PORTCR(261, 0xe6052105), /* PORT261CR */ | ||
1554 | PORTCR(262, 0xe6052106), /* PORT262CR */ | ||
1555 | PORTCR(263, 0xe6052107), /* PORT263CR */ | ||
1556 | PORTCR(264, 0xe6052108), /* PORT264CR */ | ||
1557 | |||
1558 | { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) { | ||
1559 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
1560 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
1561 | MSELBCR_MSEL17_0, MSELBCR_MSEL17_1, | ||
1562 | MSELBCR_MSEL16_0, MSELBCR_MSEL16_1, | ||
1563 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
1564 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } | ||
1565 | }, | ||
1566 | { }, | ||
1567 | }; | ||
1568 | |||
1569 | static struct pinmux_data_reg pinmux_data_regs[] = { | ||
1570 | { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) { | ||
1571 | PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA, | ||
1572 | PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA, | ||
1573 | PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA, | ||
1574 | PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA, | ||
1575 | PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA, | ||
1576 | PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA, | ||
1577 | PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA, | ||
1578 | PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA } | ||
1579 | }, | ||
1580 | { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) { | ||
1581 | PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA, | ||
1582 | PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA, | ||
1583 | PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA, | ||
1584 | PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA, | ||
1585 | PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA, | ||
1586 | PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA, | ||
1587 | PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA, | ||
1588 | PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA } | ||
1589 | }, | ||
1590 | { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) { | ||
1591 | PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA, | ||
1592 | PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA, | ||
1593 | PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA, | ||
1594 | PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA, | ||
1595 | PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA, | ||
1596 | PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA, | ||
1597 | PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA, | ||
1598 | PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA } | ||
1599 | }, | ||
1600 | { PINMUX_DATA_REG("PORTD127_096DR", 0xe605400C, 32) { | ||
1601 | 0, 0, 0, 0, | ||
1602 | 0, 0, 0, 0, | ||
1603 | 0, PORT118_DATA, PORT117_DATA, PORT116_DATA, | ||
1604 | PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA, | ||
1605 | PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA, | ||
1606 | PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA, | ||
1607 | PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA, | ||
1608 | PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA } | ||
1609 | }, | ||
1610 | { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055000, 32) { | ||
1611 | PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA, | ||
1612 | PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA, | ||
1613 | PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA, | ||
1614 | PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA, | ||
1615 | PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA, | ||
1616 | PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA, | ||
1617 | PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA, | ||
1618 | PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA } | ||
1619 | }, | ||
1620 | { PINMUX_DATA_REG("PORTR191_160DR", 0xe6055004, 32) { | ||
1621 | 0, 0, 0, 0, | ||
1622 | 0, 0, 0, 0, | ||
1623 | 0, 0, 0, 0, | ||
1624 | 0, 0, 0, 0, | ||
1625 | 0, 0, 0, 0, | ||
1626 | 0, 0, 0, 0, | ||
1627 | 0, 0, 0, PORT164_DATA, | ||
1628 | PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA } | ||
1629 | }, | ||
1630 | { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056000, 32) { | ||
1631 | PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA, | ||
1632 | PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA, | ||
1633 | PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA, | ||
1634 | PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA, | ||
1635 | PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA, | ||
1636 | PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA, | ||
1637 | PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA, | ||
1638 | PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA } | ||
1639 | }, | ||
1640 | { PINMUX_DATA_REG("PORTU255_224DR", 0xe6056004, 32) { | ||
1641 | PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA, | ||
1642 | PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA, | ||
1643 | PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA, | ||
1644 | PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA, | ||
1645 | PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA, | ||
1646 | PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA, | ||
1647 | PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA, | ||
1648 | PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA } | ||
1649 | }, | ||
1650 | { PINMUX_DATA_REG("PORTU287_256DR", 0xe6056008, 32) { | ||
1651 | 0, 0, 0, 0, | ||
1652 | 0, 0, 0, 0, | ||
1653 | 0, 0, 0, 0, | ||
1654 | 0, 0, 0, 0, | ||
1655 | 0, 0, 0, 0, | ||
1656 | 0, 0, 0, PORT264_DATA, | ||
1657 | PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA, | ||
1658 | PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA } | ||
1659 | }, | ||
1660 | { }, | ||
1661 | }; | ||
1662 | |||
1663 | static struct pinmux_info sh7377_pinmux_info = { | ||
1664 | .name = "sh7377_pfc", | ||
1665 | .reserved_id = PINMUX_RESERVED, | ||
1666 | .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, | ||
1667 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, | ||
1668 | .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, | ||
1669 | .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END }, | ||
1670 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, | ||
1671 | .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, | ||
1672 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, | ||
1673 | |||
1674 | .first_gpio = GPIO_PORT0, | ||
1675 | .last_gpio = GPIO_FN_RESETOUTS, | ||
1676 | |||
1677 | .gpios = pinmux_gpios, | ||
1678 | .cfg_regs = pinmux_config_regs, | ||
1679 | .data_regs = pinmux_data_regs, | ||
1680 | |||
1681 | .gpio_data = pinmux_data, | ||
1682 | .gpio_data_size = ARRAY_SIZE(pinmux_data), | ||
1683 | }; | ||
1684 | |||
1685 | void sh7377_pinmux_init(void) | ||
1686 | { | ||
1687 | register_pinmux(&sh7377_pinmux_info); | ||
1688 | } | ||
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 11bb1d984197..6ac242cdca7f 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c | |||
@@ -590,6 +590,21 @@ static struct platform_device i2c1_device = { | |||
590 | .num_resources = ARRAY_SIZE(i2c1_resources), | 590 | .num_resources = ARRAY_SIZE(i2c1_resources), |
591 | }; | 591 | }; |
592 | 592 | ||
593 | static struct resource pmu_resources[] = { | ||
594 | [0] = { | ||
595 | .start = evt2irq(0x19a0), | ||
596 | .end = evt2irq(0x19a0), | ||
597 | .flags = IORESOURCE_IRQ, | ||
598 | }, | ||
599 | }; | ||
600 | |||
601 | static struct platform_device pmu_device = { | ||
602 | .name = "arm-pmu", | ||
603 | .id = -1, | ||
604 | .num_resources = ARRAY_SIZE(pmu_resources), | ||
605 | .resource = pmu_resources, | ||
606 | }; | ||
607 | |||
593 | static struct platform_device *r8a7740_late_devices[] __initdata = { | 608 | static struct platform_device *r8a7740_late_devices[] __initdata = { |
594 | &i2c0_device, | 609 | &i2c0_device, |
595 | &i2c1_device, | 610 | &i2c1_device, |
@@ -597,6 +612,7 @@ static struct platform_device *r8a7740_late_devices[] __initdata = { | |||
597 | &dma1_device, | 612 | &dma1_device, |
598 | &dma2_device, | 613 | &dma2_device, |
599 | &usb_dma_device, | 614 | &usb_dma_device, |
615 | &pmu_device, | ||
600 | }; | 616 | }; |
601 | 617 | ||
602 | /* | 618 | /* |
@@ -747,7 +763,7 @@ static const char *r8a7740_boards_compat_dt[] __initdata = { | |||
747 | NULL, | 763 | NULL, |
748 | }; | 764 | }; |
749 | 765 | ||
750 | DT_MACHINE_START(SH7372_DT, "Generic R8A7740 (Flattened Device Tree)") | 766 | DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)") |
751 | .map_io = r8a7740_map_io, | 767 | .map_io = r8a7740_map_io, |
752 | .init_early = r8a7740_add_early_devices_dt, | 768 | .init_early = r8a7740_add_early_devices_dt, |
753 | .init_irq = r8a7740_init_irq, | 769 | .init_irq = r8a7740_init_irq, |
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index ebbffc25f24f..7a1ad4f38539 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c | |||
@@ -229,6 +229,79 @@ static struct platform_device tmu01_device = { | |||
229 | .num_resources = ARRAY_SIZE(tmu01_resources), | 229 | .num_resources = ARRAY_SIZE(tmu01_resources), |
230 | }; | 230 | }; |
231 | 231 | ||
232 | /* I2C */ | ||
233 | static struct resource rcar_i2c0_res[] = { | ||
234 | { | ||
235 | .start = 0xffc70000, | ||
236 | .end = 0xffc70fff, | ||
237 | .flags = IORESOURCE_MEM, | ||
238 | }, { | ||
239 | .start = gic_spi(79), | ||
240 | .flags = IORESOURCE_IRQ, | ||
241 | }, | ||
242 | }; | ||
243 | |||
244 | static struct platform_device i2c0_device = { | ||
245 | .name = "i2c-rcar", | ||
246 | .id = 0, | ||
247 | .resource = rcar_i2c0_res, | ||
248 | .num_resources = ARRAY_SIZE(rcar_i2c0_res), | ||
249 | }; | ||
250 | |||
251 | static struct resource rcar_i2c1_res[] = { | ||
252 | { | ||
253 | .start = 0xffc71000, | ||
254 | .end = 0xffc71fff, | ||
255 | .flags = IORESOURCE_MEM, | ||
256 | }, { | ||
257 | .start = gic_spi(82), | ||
258 | .flags = IORESOURCE_IRQ, | ||
259 | }, | ||
260 | }; | ||
261 | |||
262 | static struct platform_device i2c1_device = { | ||
263 | .name = "i2c-rcar", | ||
264 | .id = 1, | ||
265 | .resource = rcar_i2c1_res, | ||
266 | .num_resources = ARRAY_SIZE(rcar_i2c1_res), | ||
267 | }; | ||
268 | |||
269 | static struct resource rcar_i2c2_res[] = { | ||
270 | { | ||
271 | .start = 0xffc72000, | ||
272 | .end = 0xffc72fff, | ||
273 | .flags = IORESOURCE_MEM, | ||
274 | }, { | ||
275 | .start = gic_spi(80), | ||
276 | .flags = IORESOURCE_IRQ, | ||
277 | }, | ||
278 | }; | ||
279 | |||
280 | static struct platform_device i2c2_device = { | ||
281 | .name = "i2c-rcar", | ||
282 | .id = 2, | ||
283 | .resource = rcar_i2c2_res, | ||
284 | .num_resources = ARRAY_SIZE(rcar_i2c2_res), | ||
285 | }; | ||
286 | |||
287 | static struct resource rcar_i2c3_res[] = { | ||
288 | { | ||
289 | .start = 0xffc73000, | ||
290 | .end = 0xffc73fff, | ||
291 | .flags = IORESOURCE_MEM, | ||
292 | }, { | ||
293 | .start = gic_spi(81), | ||
294 | .flags = IORESOURCE_IRQ, | ||
295 | }, | ||
296 | }; | ||
297 | |||
298 | static struct platform_device i2c3_device = { | ||
299 | .name = "i2c-rcar", | ||
300 | .id = 3, | ||
301 | .resource = rcar_i2c3_res, | ||
302 | .num_resources = ARRAY_SIZE(rcar_i2c3_res), | ||
303 | }; | ||
304 | |||
232 | static struct platform_device *r8a7779_early_devices[] __initdata = { | 305 | static struct platform_device *r8a7779_early_devices[] __initdata = { |
233 | &scif0_device, | 306 | &scif0_device, |
234 | &scif1_device, | 307 | &scif1_device, |
@@ -238,6 +311,10 @@ static struct platform_device *r8a7779_early_devices[] __initdata = { | |||
238 | &scif5_device, | 311 | &scif5_device, |
239 | &tmu00_device, | 312 | &tmu00_device, |
240 | &tmu01_device, | 313 | &tmu01_device, |
314 | &i2c0_device, | ||
315 | &i2c1_device, | ||
316 | &i2c2_device, | ||
317 | &i2c3_device, | ||
241 | }; | 318 | }; |
242 | 319 | ||
243 | static struct platform_device *r8a7779_late_devices[] __initdata = { | 320 | static struct platform_device *r8a7779_late_devices[] __initdata = { |
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c deleted file mode 100644 index e647f5410879..000000000000 --- a/arch/arm/mach-shmobile/setup-sh7367.c +++ /dev/null | |||
@@ -1,481 +0,0 @@ | |||
1 | /* | ||
2 | * sh7367 processor support | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * Copyright (C) 2008 Yoshihiro Shimoda | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/interrupt.h> | ||
23 | #include <linux/irq.h> | ||
24 | #include <linux/platform_device.h> | ||
25 | #include <linux/uio_driver.h> | ||
26 | #include <linux/delay.h> | ||
27 | #include <linux/input.h> | ||
28 | #include <linux/io.h> | ||
29 | #include <linux/serial_sci.h> | ||
30 | #include <linux/sh_timer.h> | ||
31 | #include <mach/hardware.h> | ||
32 | #include <mach/common.h> | ||
33 | #include <mach/irqs.h> | ||
34 | #include <asm/mach-types.h> | ||
35 | #include <asm/mach/arch.h> | ||
36 | #include <asm/mach/map.h> | ||
37 | #include <asm/mach/time.h> | ||
38 | |||
39 | static struct map_desc sh7367_io_desc[] __initdata = { | ||
40 | /* create a 1:1 entity map for 0xe6xxxxxx | ||
41 | * used by CPGA, INTC and PFC. | ||
42 | */ | ||
43 | { | ||
44 | .virtual = 0xe6000000, | ||
45 | .pfn = __phys_to_pfn(0xe6000000), | ||
46 | .length = 256 << 20, | ||
47 | .type = MT_DEVICE_NONSHARED | ||
48 | }, | ||
49 | }; | ||
50 | |||
51 | void __init sh7367_map_io(void) | ||
52 | { | ||
53 | iotable_init(sh7367_io_desc, ARRAY_SIZE(sh7367_io_desc)); | ||
54 | } | ||
55 | |||
56 | /* SCIFA0 */ | ||
57 | static struct plat_sci_port scif0_platform_data = { | ||
58 | .mapbase = 0xe6c40000, | ||
59 | .flags = UPF_BOOT_AUTOCONF, | ||
60 | .scscr = SCSCR_RE | SCSCR_TE, | ||
61 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
62 | .type = PORT_SCIFA, | ||
63 | .irqs = { evt2irq(0xc00), evt2irq(0xc00), | ||
64 | evt2irq(0xc00), evt2irq(0xc00) }, | ||
65 | }; | ||
66 | |||
67 | static struct platform_device scif0_device = { | ||
68 | .name = "sh-sci", | ||
69 | .id = 0, | ||
70 | .dev = { | ||
71 | .platform_data = &scif0_platform_data, | ||
72 | }, | ||
73 | }; | ||
74 | |||
75 | /* SCIFA1 */ | ||
76 | static struct plat_sci_port scif1_platform_data = { | ||
77 | .mapbase = 0xe6c50000, | ||
78 | .flags = UPF_BOOT_AUTOCONF, | ||
79 | .scscr = SCSCR_RE | SCSCR_TE, | ||
80 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
81 | .type = PORT_SCIFA, | ||
82 | .irqs = { evt2irq(0xc20), evt2irq(0xc20), | ||
83 | evt2irq(0xc20), evt2irq(0xc20) }, | ||
84 | }; | ||
85 | |||
86 | static struct platform_device scif1_device = { | ||
87 | .name = "sh-sci", | ||
88 | .id = 1, | ||
89 | .dev = { | ||
90 | .platform_data = &scif1_platform_data, | ||
91 | }, | ||
92 | }; | ||
93 | |||
94 | /* SCIFA2 */ | ||
95 | static struct plat_sci_port scif2_platform_data = { | ||
96 | .mapbase = 0xe6c60000, | ||
97 | .flags = UPF_BOOT_AUTOCONF, | ||
98 | .scscr = SCSCR_RE | SCSCR_TE, | ||
99 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
100 | .type = PORT_SCIFA, | ||
101 | .irqs = { evt2irq(0xc40), evt2irq(0xc40), | ||
102 | evt2irq(0xc40), evt2irq(0xc40) }, | ||
103 | }; | ||
104 | |||
105 | static struct platform_device scif2_device = { | ||
106 | .name = "sh-sci", | ||
107 | .id = 2, | ||
108 | .dev = { | ||
109 | .platform_data = &scif2_platform_data, | ||
110 | }, | ||
111 | }; | ||
112 | |||
113 | /* SCIFA3 */ | ||
114 | static struct plat_sci_port scif3_platform_data = { | ||
115 | .mapbase = 0xe6c70000, | ||
116 | .flags = UPF_BOOT_AUTOCONF, | ||
117 | .scscr = SCSCR_RE | SCSCR_TE, | ||
118 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
119 | .type = PORT_SCIFA, | ||
120 | .irqs = { evt2irq(0xc60), evt2irq(0xc60), | ||
121 | evt2irq(0xc60), evt2irq(0xc60) }, | ||
122 | }; | ||
123 | |||
124 | static struct platform_device scif3_device = { | ||
125 | .name = "sh-sci", | ||
126 | .id = 3, | ||
127 | .dev = { | ||
128 | .platform_data = &scif3_platform_data, | ||
129 | }, | ||
130 | }; | ||
131 | |||
132 | /* SCIFA4 */ | ||
133 | static struct plat_sci_port scif4_platform_data = { | ||
134 | .mapbase = 0xe6c80000, | ||
135 | .flags = UPF_BOOT_AUTOCONF, | ||
136 | .scscr = SCSCR_RE | SCSCR_TE, | ||
137 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
138 | .type = PORT_SCIFA, | ||
139 | .irqs = { evt2irq(0xd20), evt2irq(0xd20), | ||
140 | evt2irq(0xd20), evt2irq(0xd20) }, | ||
141 | }; | ||
142 | |||
143 | static struct platform_device scif4_device = { | ||
144 | .name = "sh-sci", | ||
145 | .id = 4, | ||
146 | .dev = { | ||
147 | .platform_data = &scif4_platform_data, | ||
148 | }, | ||
149 | }; | ||
150 | |||
151 | /* SCIFA5 */ | ||
152 | static struct plat_sci_port scif5_platform_data = { | ||
153 | .mapbase = 0xe6cb0000, | ||
154 | .flags = UPF_BOOT_AUTOCONF, | ||
155 | .scscr = SCSCR_RE | SCSCR_TE, | ||
156 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
157 | .type = PORT_SCIFA, | ||
158 | .irqs = { evt2irq(0xd40), evt2irq(0xd40), | ||
159 | evt2irq(0xd40), evt2irq(0xd40) }, | ||
160 | }; | ||
161 | |||
162 | static struct platform_device scif5_device = { | ||
163 | .name = "sh-sci", | ||
164 | .id = 5, | ||
165 | .dev = { | ||
166 | .platform_data = &scif5_platform_data, | ||
167 | }, | ||
168 | }; | ||
169 | |||
170 | /* SCIFB */ | ||
171 | static struct plat_sci_port scif6_platform_data = { | ||
172 | .mapbase = 0xe6c30000, | ||
173 | .flags = UPF_BOOT_AUTOCONF, | ||
174 | .scscr = SCSCR_RE | SCSCR_TE, | ||
175 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
176 | .type = PORT_SCIFB, | ||
177 | .irqs = { evt2irq(0xd60), evt2irq(0xd60), | ||
178 | evt2irq(0xd60), evt2irq(0xd60) }, | ||
179 | }; | ||
180 | |||
181 | static struct platform_device scif6_device = { | ||
182 | .name = "sh-sci", | ||
183 | .id = 6, | ||
184 | .dev = { | ||
185 | .platform_data = &scif6_platform_data, | ||
186 | }, | ||
187 | }; | ||
188 | |||
189 | static struct sh_timer_config cmt10_platform_data = { | ||
190 | .name = "CMT10", | ||
191 | .channel_offset = 0x10, | ||
192 | .timer_bit = 0, | ||
193 | .clockevent_rating = 125, | ||
194 | .clocksource_rating = 125, | ||
195 | }; | ||
196 | |||
197 | static struct resource cmt10_resources[] = { | ||
198 | [0] = { | ||
199 | .name = "CMT10", | ||
200 | .start = 0xe6138010, | ||
201 | .end = 0xe613801b, | ||
202 | .flags = IORESOURCE_MEM, | ||
203 | }, | ||
204 | [1] = { | ||
205 | .start = evt2irq(0xb00), /* CMT1_CMT10 */ | ||
206 | .flags = IORESOURCE_IRQ, | ||
207 | }, | ||
208 | }; | ||
209 | |||
210 | static struct platform_device cmt10_device = { | ||
211 | .name = "sh_cmt", | ||
212 | .id = 10, | ||
213 | .dev = { | ||
214 | .platform_data = &cmt10_platform_data, | ||
215 | }, | ||
216 | .resource = cmt10_resources, | ||
217 | .num_resources = ARRAY_SIZE(cmt10_resources), | ||
218 | }; | ||
219 | |||
220 | /* VPU */ | ||
221 | static struct uio_info vpu_platform_data = { | ||
222 | .name = "VPU5", | ||
223 | .version = "0", | ||
224 | .irq = intcs_evt2irq(0x980), | ||
225 | }; | ||
226 | |||
227 | static struct resource vpu_resources[] = { | ||
228 | [0] = { | ||
229 | .name = "VPU", | ||
230 | .start = 0xfe900000, | ||
231 | .end = 0xfe902807, | ||
232 | .flags = IORESOURCE_MEM, | ||
233 | }, | ||
234 | }; | ||
235 | |||
236 | static struct platform_device vpu_device = { | ||
237 | .name = "uio_pdrv_genirq", | ||
238 | .id = 0, | ||
239 | .dev = { | ||
240 | .platform_data = &vpu_platform_data, | ||
241 | }, | ||
242 | .resource = vpu_resources, | ||
243 | .num_resources = ARRAY_SIZE(vpu_resources), | ||
244 | }; | ||
245 | |||
246 | /* VEU0 */ | ||
247 | static struct uio_info veu0_platform_data = { | ||
248 | .name = "VEU0", | ||
249 | .version = "0", | ||
250 | .irq = intcs_evt2irq(0x700), | ||
251 | }; | ||
252 | |||
253 | static struct resource veu0_resources[] = { | ||
254 | [0] = { | ||
255 | .name = "VEU0", | ||
256 | .start = 0xfe920000, | ||
257 | .end = 0xfe9200b7, | ||
258 | .flags = IORESOURCE_MEM, | ||
259 | }, | ||
260 | }; | ||
261 | |||
262 | static struct platform_device veu0_device = { | ||
263 | .name = "uio_pdrv_genirq", | ||
264 | .id = 1, | ||
265 | .dev = { | ||
266 | .platform_data = &veu0_platform_data, | ||
267 | }, | ||
268 | .resource = veu0_resources, | ||
269 | .num_resources = ARRAY_SIZE(veu0_resources), | ||
270 | }; | ||
271 | |||
272 | /* VEU1 */ | ||
273 | static struct uio_info veu1_platform_data = { | ||
274 | .name = "VEU1", | ||
275 | .version = "0", | ||
276 | .irq = intcs_evt2irq(0x720), | ||
277 | }; | ||
278 | |||
279 | static struct resource veu1_resources[] = { | ||
280 | [0] = { | ||
281 | .name = "VEU1", | ||
282 | .start = 0xfe924000, | ||
283 | .end = 0xfe9240b7, | ||
284 | .flags = IORESOURCE_MEM, | ||
285 | }, | ||
286 | }; | ||
287 | |||
288 | static struct platform_device veu1_device = { | ||
289 | .name = "uio_pdrv_genirq", | ||
290 | .id = 2, | ||
291 | .dev = { | ||
292 | .platform_data = &veu1_platform_data, | ||
293 | }, | ||
294 | .resource = veu1_resources, | ||
295 | .num_resources = ARRAY_SIZE(veu1_resources), | ||
296 | }; | ||
297 | |||
298 | /* VEU2 */ | ||
299 | static struct uio_info veu2_platform_data = { | ||
300 | .name = "VEU2", | ||
301 | .version = "0", | ||
302 | .irq = intcs_evt2irq(0x740), | ||
303 | }; | ||
304 | |||
305 | static struct resource veu2_resources[] = { | ||
306 | [0] = { | ||
307 | .name = "VEU2", | ||
308 | .start = 0xfe928000, | ||
309 | .end = 0xfe9280b7, | ||
310 | .flags = IORESOURCE_MEM, | ||
311 | }, | ||
312 | }; | ||
313 | |||
314 | static struct platform_device veu2_device = { | ||
315 | .name = "uio_pdrv_genirq", | ||
316 | .id = 3, | ||
317 | .dev = { | ||
318 | .platform_data = &veu2_platform_data, | ||
319 | }, | ||
320 | .resource = veu2_resources, | ||
321 | .num_resources = ARRAY_SIZE(veu2_resources), | ||
322 | }; | ||
323 | |||
324 | /* VEU3 */ | ||
325 | static struct uio_info veu3_platform_data = { | ||
326 | .name = "VEU3", | ||
327 | .version = "0", | ||
328 | .irq = intcs_evt2irq(0x760), | ||
329 | }; | ||
330 | |||
331 | static struct resource veu3_resources[] = { | ||
332 | [0] = { | ||
333 | .name = "VEU3", | ||
334 | .start = 0xfe92c000, | ||
335 | .end = 0xfe92c0b7, | ||
336 | .flags = IORESOURCE_MEM, | ||
337 | }, | ||
338 | }; | ||
339 | |||
340 | static struct platform_device veu3_device = { | ||
341 | .name = "uio_pdrv_genirq", | ||
342 | .id = 4, | ||
343 | .dev = { | ||
344 | .platform_data = &veu3_platform_data, | ||
345 | }, | ||
346 | .resource = veu3_resources, | ||
347 | .num_resources = ARRAY_SIZE(veu3_resources), | ||
348 | }; | ||
349 | |||
350 | /* VEU2H */ | ||
351 | static struct uio_info veu2h_platform_data = { | ||
352 | .name = "VEU2H", | ||
353 | .version = "0", | ||
354 | .irq = intcs_evt2irq(0x520), | ||
355 | }; | ||
356 | |||
357 | static struct resource veu2h_resources[] = { | ||
358 | [0] = { | ||
359 | .name = "VEU2H", | ||
360 | .start = 0xfe93c000, | ||
361 | .end = 0xfe93c27b, | ||
362 | .flags = IORESOURCE_MEM, | ||
363 | }, | ||
364 | }; | ||
365 | |||
366 | static struct platform_device veu2h_device = { | ||
367 | .name = "uio_pdrv_genirq", | ||
368 | .id = 5, | ||
369 | .dev = { | ||
370 | .platform_data = &veu2h_platform_data, | ||
371 | }, | ||
372 | .resource = veu2h_resources, | ||
373 | .num_resources = ARRAY_SIZE(veu2h_resources), | ||
374 | }; | ||
375 | |||
376 | /* JPU */ | ||
377 | static struct uio_info jpu_platform_data = { | ||
378 | .name = "JPU", | ||
379 | .version = "0", | ||
380 | .irq = intcs_evt2irq(0x560), | ||
381 | }; | ||
382 | |||
383 | static struct resource jpu_resources[] = { | ||
384 | [0] = { | ||
385 | .name = "JPU", | ||
386 | .start = 0xfe980000, | ||
387 | .end = 0xfe9902d3, | ||
388 | .flags = IORESOURCE_MEM, | ||
389 | }, | ||
390 | }; | ||
391 | |||
392 | static struct platform_device jpu_device = { | ||
393 | .name = "uio_pdrv_genirq", | ||
394 | .id = 6, | ||
395 | .dev = { | ||
396 | .platform_data = &jpu_platform_data, | ||
397 | }, | ||
398 | .resource = jpu_resources, | ||
399 | .num_resources = ARRAY_SIZE(jpu_resources), | ||
400 | }; | ||
401 | |||
402 | /* SPU1 */ | ||
403 | static struct uio_info spu1_platform_data = { | ||
404 | .name = "SPU1", | ||
405 | .version = "0", | ||
406 | .irq = evt2irq(0xfc0), | ||
407 | }; | ||
408 | |||
409 | static struct resource spu1_resources[] = { | ||
410 | [0] = { | ||
411 | .name = "SPU1", | ||
412 | .start = 0xfe300000, | ||
413 | .end = 0xfe3fffff, | ||
414 | .flags = IORESOURCE_MEM, | ||
415 | }, | ||
416 | }; | ||
417 | |||
418 | static struct platform_device spu1_device = { | ||
419 | .name = "uio_pdrv_genirq", | ||
420 | .id = 7, | ||
421 | .dev = { | ||
422 | .platform_data = &spu1_platform_data, | ||
423 | }, | ||
424 | .resource = spu1_resources, | ||
425 | .num_resources = ARRAY_SIZE(spu1_resources), | ||
426 | }; | ||
427 | |||
428 | static struct platform_device *sh7367_early_devices[] __initdata = { | ||
429 | &scif0_device, | ||
430 | &scif1_device, | ||
431 | &scif2_device, | ||
432 | &scif3_device, | ||
433 | &scif4_device, | ||
434 | &scif5_device, | ||
435 | &scif6_device, | ||
436 | &cmt10_device, | ||
437 | }; | ||
438 | |||
439 | static struct platform_device *sh7367_devices[] __initdata = { | ||
440 | &vpu_device, | ||
441 | &veu0_device, | ||
442 | &veu1_device, | ||
443 | &veu2_device, | ||
444 | &veu3_device, | ||
445 | &veu2h_device, | ||
446 | &jpu_device, | ||
447 | &spu1_device, | ||
448 | }; | ||
449 | |||
450 | void __init sh7367_add_standard_devices(void) | ||
451 | { | ||
452 | platform_add_devices(sh7367_early_devices, | ||
453 | ARRAY_SIZE(sh7367_early_devices)); | ||
454 | |||
455 | platform_add_devices(sh7367_devices, | ||
456 | ARRAY_SIZE(sh7367_devices)); | ||
457 | } | ||
458 | |||
459 | static void __init sh7367_earlytimer_init(void) | ||
460 | { | ||
461 | sh7367_clock_init(); | ||
462 | shmobile_earlytimer_init(); | ||
463 | } | ||
464 | |||
465 | #define SYMSTPCR2 IOMEM(0xe6158048) | ||
466 | #define SYMSTPCR2_CMT1 (1 << 29) | ||
467 | |||
468 | void __init sh7367_add_early_devices(void) | ||
469 | { | ||
470 | /* enable clock to CMT1 */ | ||
471 | __raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2); | ||
472 | |||
473 | early_platform_add_devices(sh7367_early_devices, | ||
474 | ARRAY_SIZE(sh7367_early_devices)); | ||
475 | |||
476 | /* setup early console here as well */ | ||
477 | shmobile_setup_console(); | ||
478 | |||
479 | /* override timer setup with soc-specific code */ | ||
480 | shmobile_timer.init = sh7367_earlytimer_init; | ||
481 | } | ||
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index a07954fbcd22..a36011184c16 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c | |||
@@ -408,6 +408,26 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = { | |||
408 | .chcr = CHCR_RX(XMIT_SZ_8BIT), | 408 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
409 | .mid_rid = 0x3e, | 409 | .mid_rid = 0x3e, |
410 | }, { | 410 | }, { |
411 | .slave_id = SHDMA_SLAVE_FLCTL0_TX, | ||
412 | .addr = 0xe6a30050, | ||
413 | .chcr = CHCR_TX(XMIT_SZ_32BIT), | ||
414 | .mid_rid = 0x83, | ||
415 | }, { | ||
416 | .slave_id = SHDMA_SLAVE_FLCTL0_RX, | ||
417 | .addr = 0xe6a30050, | ||
418 | .chcr = CHCR_RX(XMIT_SZ_32BIT), | ||
419 | .mid_rid = 0x83, | ||
420 | }, { | ||
421 | .slave_id = SHDMA_SLAVE_FLCTL1_TX, | ||
422 | .addr = 0xe6a30060, | ||
423 | .chcr = CHCR_TX(XMIT_SZ_32BIT), | ||
424 | .mid_rid = 0x87, | ||
425 | }, { | ||
426 | .slave_id = SHDMA_SLAVE_FLCTL1_RX, | ||
427 | .addr = 0xe6a30060, | ||
428 | .chcr = CHCR_RX(XMIT_SZ_32BIT), | ||
429 | .mid_rid = 0x87, | ||
430 | }, { | ||
411 | .slave_id = SHDMA_SLAVE_SDHI0_TX, | 431 | .slave_id = SHDMA_SLAVE_SDHI0_TX, |
412 | .addr = 0xe6850030, | 432 | .addr = 0xe6850030, |
413 | .chcr = CHCR_TX(XMIT_SZ_16BIT), | 433 | .chcr = CHCR_TX(XMIT_SZ_16BIT), |
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c deleted file mode 100644 index edcf98bb7012..000000000000 --- a/arch/arm/mach-shmobile/setup-sh7377.c +++ /dev/null | |||
@@ -1,549 +0,0 @@ | |||
1 | /* | ||
2 | * sh7377 processor support | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * Copyright (C) 2008 Yoshihiro Shimoda | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/interrupt.h> | ||
23 | #include <linux/irq.h> | ||
24 | #include <linux/platform_device.h> | ||
25 | #include <linux/of_platform.h> | ||
26 | #include <linux/uio_driver.h> | ||
27 | #include <linux/delay.h> | ||
28 | #include <linux/input.h> | ||
29 | #include <linux/io.h> | ||
30 | #include <linux/serial_sci.h> | ||
31 | #include <linux/sh_intc.h> | ||
32 | #include <linux/sh_timer.h> | ||
33 | #include <mach/hardware.h> | ||
34 | #include <mach/common.h> | ||
35 | #include <asm/mach/map.h> | ||
36 | #include <mach/irqs.h> | ||
37 | #include <asm/mach-types.h> | ||
38 | #include <asm/mach/arch.h> | ||
39 | #include <asm/mach/time.h> | ||
40 | |||
41 | static struct map_desc sh7377_io_desc[] __initdata = { | ||
42 | /* create a 1:1 entity map for 0xe6xxxxxx | ||
43 | * used by CPGA, INTC and PFC. | ||
44 | */ | ||
45 | { | ||
46 | .virtual = 0xe6000000, | ||
47 | .pfn = __phys_to_pfn(0xe6000000), | ||
48 | .length = 256 << 20, | ||
49 | .type = MT_DEVICE_NONSHARED | ||
50 | }, | ||
51 | }; | ||
52 | |||
53 | void __init sh7377_map_io(void) | ||
54 | { | ||
55 | iotable_init(sh7377_io_desc, ARRAY_SIZE(sh7377_io_desc)); | ||
56 | } | ||
57 | |||
58 | /* SCIFA0 */ | ||
59 | static struct plat_sci_port scif0_platform_data = { | ||
60 | .mapbase = 0xe6c40000, | ||
61 | .flags = UPF_BOOT_AUTOCONF, | ||
62 | .scscr = SCSCR_RE | SCSCR_TE, | ||
63 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
64 | .type = PORT_SCIFA, | ||
65 | .irqs = { evt2irq(0xc00), evt2irq(0xc00), | ||
66 | evt2irq(0xc00), evt2irq(0xc00) }, | ||
67 | }; | ||
68 | |||
69 | static struct platform_device scif0_device = { | ||
70 | .name = "sh-sci", | ||
71 | .id = 0, | ||
72 | .dev = { | ||
73 | .platform_data = &scif0_platform_data, | ||
74 | }, | ||
75 | }; | ||
76 | |||
77 | /* SCIFA1 */ | ||
78 | static struct plat_sci_port scif1_platform_data = { | ||
79 | .mapbase = 0xe6c50000, | ||
80 | .flags = UPF_BOOT_AUTOCONF, | ||
81 | .scscr = SCSCR_RE | SCSCR_TE, | ||
82 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
83 | .type = PORT_SCIFA, | ||
84 | .irqs = { evt2irq(0xc20), evt2irq(0xc20), | ||
85 | evt2irq(0xc20), evt2irq(0xc20) }, | ||
86 | }; | ||
87 | |||
88 | static struct platform_device scif1_device = { | ||
89 | .name = "sh-sci", | ||
90 | .id = 1, | ||
91 | .dev = { | ||
92 | .platform_data = &scif1_platform_data, | ||
93 | }, | ||
94 | }; | ||
95 | |||
96 | /* SCIFA2 */ | ||
97 | static struct plat_sci_port scif2_platform_data = { | ||
98 | .mapbase = 0xe6c60000, | ||
99 | .flags = UPF_BOOT_AUTOCONF, | ||
100 | .scscr = SCSCR_RE | SCSCR_TE, | ||
101 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
102 | .type = PORT_SCIFA, | ||
103 | .irqs = { evt2irq(0xc40), evt2irq(0xc40), | ||
104 | evt2irq(0xc40), evt2irq(0xc40) }, | ||
105 | }; | ||
106 | |||
107 | static struct platform_device scif2_device = { | ||
108 | .name = "sh-sci", | ||
109 | .id = 2, | ||
110 | .dev = { | ||
111 | .platform_data = &scif2_platform_data, | ||
112 | }, | ||
113 | }; | ||
114 | |||
115 | /* SCIFA3 */ | ||
116 | static struct plat_sci_port scif3_platform_data = { | ||
117 | .mapbase = 0xe6c70000, | ||
118 | .flags = UPF_BOOT_AUTOCONF, | ||
119 | .scscr = SCSCR_RE | SCSCR_TE, | ||
120 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
121 | .type = PORT_SCIFA, | ||
122 | .irqs = { evt2irq(0xc60), evt2irq(0xc60), | ||
123 | evt2irq(0xc60), evt2irq(0xc60) }, | ||
124 | }; | ||
125 | |||
126 | static struct platform_device scif3_device = { | ||
127 | .name = "sh-sci", | ||
128 | .id = 3, | ||
129 | .dev = { | ||
130 | .platform_data = &scif3_platform_data, | ||
131 | }, | ||
132 | }; | ||
133 | |||
134 | /* SCIFA4 */ | ||
135 | static struct plat_sci_port scif4_platform_data = { | ||
136 | .mapbase = 0xe6c80000, | ||
137 | .flags = UPF_BOOT_AUTOCONF, | ||
138 | .scscr = SCSCR_RE | SCSCR_TE, | ||
139 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
140 | .type = PORT_SCIFA, | ||
141 | .irqs = { evt2irq(0xd20), evt2irq(0xd20), | ||
142 | evt2irq(0xd20), evt2irq(0xd20) }, | ||
143 | }; | ||
144 | |||
145 | static struct platform_device scif4_device = { | ||
146 | .name = "sh-sci", | ||
147 | .id = 4, | ||
148 | .dev = { | ||
149 | .platform_data = &scif4_platform_data, | ||
150 | }, | ||
151 | }; | ||
152 | |||
153 | /* SCIFA5 */ | ||
154 | static struct plat_sci_port scif5_platform_data = { | ||
155 | .mapbase = 0xe6cb0000, | ||
156 | .flags = UPF_BOOT_AUTOCONF, | ||
157 | .scscr = SCSCR_RE | SCSCR_TE, | ||
158 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
159 | .type = PORT_SCIFA, | ||
160 | .irqs = { evt2irq(0xd40), evt2irq(0xd40), | ||
161 | evt2irq(0xd40), evt2irq(0xd40) }, | ||
162 | }; | ||
163 | |||
164 | static struct platform_device scif5_device = { | ||
165 | .name = "sh-sci", | ||
166 | .id = 5, | ||
167 | .dev = { | ||
168 | .platform_data = &scif5_platform_data, | ||
169 | }, | ||
170 | }; | ||
171 | |||
172 | /* SCIFA6 */ | ||
173 | static struct plat_sci_port scif6_platform_data = { | ||
174 | .mapbase = 0xe6cc0000, | ||
175 | .flags = UPF_BOOT_AUTOCONF, | ||
176 | .scscr = SCSCR_RE | SCSCR_TE, | ||
177 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
178 | .type = PORT_SCIFA, | ||
179 | .irqs = { intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80), | ||
180 | intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80) }, | ||
181 | }; | ||
182 | |||
183 | static struct platform_device scif6_device = { | ||
184 | .name = "sh-sci", | ||
185 | .id = 6, | ||
186 | .dev = { | ||
187 | .platform_data = &scif6_platform_data, | ||
188 | }, | ||
189 | }; | ||
190 | |||
191 | /* SCIFB */ | ||
192 | static struct plat_sci_port scif7_platform_data = { | ||
193 | .mapbase = 0xe6c30000, | ||
194 | .flags = UPF_BOOT_AUTOCONF, | ||
195 | .scscr = SCSCR_RE | SCSCR_TE, | ||
196 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
197 | .type = PORT_SCIFB, | ||
198 | .irqs = { evt2irq(0xd60), evt2irq(0xd60), | ||
199 | evt2irq(0xd60), evt2irq(0xd60) }, | ||
200 | }; | ||
201 | |||
202 | static struct platform_device scif7_device = { | ||
203 | .name = "sh-sci", | ||
204 | .id = 7, | ||
205 | .dev = { | ||
206 | .platform_data = &scif7_platform_data, | ||
207 | }, | ||
208 | }; | ||
209 | |||
210 | static struct sh_timer_config cmt10_platform_data = { | ||
211 | .name = "CMT10", | ||
212 | .channel_offset = 0x10, | ||
213 | .timer_bit = 0, | ||
214 | .clockevent_rating = 125, | ||
215 | .clocksource_rating = 125, | ||
216 | }; | ||
217 | |||
218 | static struct resource cmt10_resources[] = { | ||
219 | [0] = { | ||
220 | .name = "CMT10", | ||
221 | .start = 0xe6138010, | ||
222 | .end = 0xe613801b, | ||
223 | .flags = IORESOURCE_MEM, | ||
224 | }, | ||
225 | [1] = { | ||
226 | .start = evt2irq(0xb00), /* CMT1_CMT10 */ | ||
227 | .flags = IORESOURCE_IRQ, | ||
228 | }, | ||
229 | }; | ||
230 | |||
231 | static struct platform_device cmt10_device = { | ||
232 | .name = "sh_cmt", | ||
233 | .id = 10, | ||
234 | .dev = { | ||
235 | .platform_data = &cmt10_platform_data, | ||
236 | }, | ||
237 | .resource = cmt10_resources, | ||
238 | .num_resources = ARRAY_SIZE(cmt10_resources), | ||
239 | }; | ||
240 | |||
241 | /* VPU */ | ||
242 | static struct uio_info vpu_platform_data = { | ||
243 | .name = "VPU5HG", | ||
244 | .version = "0", | ||
245 | .irq = intcs_evt2irq(0x980), | ||
246 | }; | ||
247 | |||
248 | static struct resource vpu_resources[] = { | ||
249 | [0] = { | ||
250 | .name = "VPU", | ||
251 | .start = 0xfe900000, | ||
252 | .end = 0xfe900157, | ||
253 | .flags = IORESOURCE_MEM, | ||
254 | }, | ||
255 | }; | ||
256 | |||
257 | static struct platform_device vpu_device = { | ||
258 | .name = "uio_pdrv_genirq", | ||
259 | .id = 0, | ||
260 | .dev = { | ||
261 | .platform_data = &vpu_platform_data, | ||
262 | }, | ||
263 | .resource = vpu_resources, | ||
264 | .num_resources = ARRAY_SIZE(vpu_resources), | ||
265 | }; | ||
266 | |||
267 | /* VEU0 */ | ||
268 | static struct uio_info veu0_platform_data = { | ||
269 | .name = "VEU0", | ||
270 | .version = "0", | ||
271 | .irq = intcs_evt2irq(0x700), | ||
272 | }; | ||
273 | |||
274 | static struct resource veu0_resources[] = { | ||
275 | [0] = { | ||
276 | .name = "VEU0", | ||
277 | .start = 0xfe920000, | ||
278 | .end = 0xfe9200cb, | ||
279 | .flags = IORESOURCE_MEM, | ||
280 | }, | ||
281 | }; | ||
282 | |||
283 | static struct platform_device veu0_device = { | ||
284 | .name = "uio_pdrv_genirq", | ||
285 | .id = 1, | ||
286 | .dev = { | ||
287 | .platform_data = &veu0_platform_data, | ||
288 | }, | ||
289 | .resource = veu0_resources, | ||
290 | .num_resources = ARRAY_SIZE(veu0_resources), | ||
291 | }; | ||
292 | |||
293 | /* VEU1 */ | ||
294 | static struct uio_info veu1_platform_data = { | ||
295 | .name = "VEU1", | ||
296 | .version = "0", | ||
297 | .irq = intcs_evt2irq(0x720), | ||
298 | }; | ||
299 | |||
300 | static struct resource veu1_resources[] = { | ||
301 | [0] = { | ||
302 | .name = "VEU1", | ||
303 | .start = 0xfe924000, | ||
304 | .end = 0xfe9240cb, | ||
305 | .flags = IORESOURCE_MEM, | ||
306 | }, | ||
307 | }; | ||
308 | |||
309 | static struct platform_device veu1_device = { | ||
310 | .name = "uio_pdrv_genirq", | ||
311 | .id = 2, | ||
312 | .dev = { | ||
313 | .platform_data = &veu1_platform_data, | ||
314 | }, | ||
315 | .resource = veu1_resources, | ||
316 | .num_resources = ARRAY_SIZE(veu1_resources), | ||
317 | }; | ||
318 | |||
319 | /* VEU2 */ | ||
320 | static struct uio_info veu2_platform_data = { | ||
321 | .name = "VEU2", | ||
322 | .version = "0", | ||
323 | .irq = intcs_evt2irq(0x740), | ||
324 | }; | ||
325 | |||
326 | static struct resource veu2_resources[] = { | ||
327 | [0] = { | ||
328 | .name = "VEU2", | ||
329 | .start = 0xfe928000, | ||
330 | .end = 0xfe928307, | ||
331 | .flags = IORESOURCE_MEM, | ||
332 | }, | ||
333 | }; | ||
334 | |||
335 | static struct platform_device veu2_device = { | ||
336 | .name = "uio_pdrv_genirq", | ||
337 | .id = 3, | ||
338 | .dev = { | ||
339 | .platform_data = &veu2_platform_data, | ||
340 | }, | ||
341 | .resource = veu2_resources, | ||
342 | .num_resources = ARRAY_SIZE(veu2_resources), | ||
343 | }; | ||
344 | |||
345 | /* VEU3 */ | ||
346 | static struct uio_info veu3_platform_data = { | ||
347 | .name = "VEU3", | ||
348 | .version = "0", | ||
349 | .irq = intcs_evt2irq(0x760), | ||
350 | }; | ||
351 | |||
352 | static struct resource veu3_resources[] = { | ||
353 | [0] = { | ||
354 | .name = "VEU3", | ||
355 | .start = 0xfe92c000, | ||
356 | .end = 0xfe92c307, | ||
357 | .flags = IORESOURCE_MEM, | ||
358 | }, | ||
359 | }; | ||
360 | |||
361 | static struct platform_device veu3_device = { | ||
362 | .name = "uio_pdrv_genirq", | ||
363 | .id = 4, | ||
364 | .dev = { | ||
365 | .platform_data = &veu3_platform_data, | ||
366 | }, | ||
367 | .resource = veu3_resources, | ||
368 | .num_resources = ARRAY_SIZE(veu3_resources), | ||
369 | }; | ||
370 | |||
371 | /* JPU */ | ||
372 | static struct uio_info jpu_platform_data = { | ||
373 | .name = "JPU", | ||
374 | .version = "0", | ||
375 | .irq = intcs_evt2irq(0x560), | ||
376 | }; | ||
377 | |||
378 | static struct resource jpu_resources[] = { | ||
379 | [0] = { | ||
380 | .name = "JPU", | ||
381 | .start = 0xfe980000, | ||
382 | .end = 0xfe9902d3, | ||
383 | .flags = IORESOURCE_MEM, | ||
384 | }, | ||
385 | }; | ||
386 | |||
387 | static struct platform_device jpu_device = { | ||
388 | .name = "uio_pdrv_genirq", | ||
389 | .id = 5, | ||
390 | .dev = { | ||
391 | .platform_data = &jpu_platform_data, | ||
392 | }, | ||
393 | .resource = jpu_resources, | ||
394 | .num_resources = ARRAY_SIZE(jpu_resources), | ||
395 | }; | ||
396 | |||
397 | /* SPU2DSP0 */ | ||
398 | static struct uio_info spu0_platform_data = { | ||
399 | .name = "SPU2DSP0", | ||
400 | .version = "0", | ||
401 | .irq = evt2irq(0x1800), | ||
402 | }; | ||
403 | |||
404 | static struct resource spu0_resources[] = { | ||
405 | [0] = { | ||
406 | .name = "SPU2DSP0", | ||
407 | .start = 0xfe200000, | ||
408 | .end = 0xfe2fffff, | ||
409 | .flags = IORESOURCE_MEM, | ||
410 | }, | ||
411 | }; | ||
412 | |||
413 | static struct platform_device spu0_device = { | ||
414 | .name = "uio_pdrv_genirq", | ||
415 | .id = 6, | ||
416 | .dev = { | ||
417 | .platform_data = &spu0_platform_data, | ||
418 | }, | ||
419 | .resource = spu0_resources, | ||
420 | .num_resources = ARRAY_SIZE(spu0_resources), | ||
421 | }; | ||
422 | |||
423 | /* SPU2DSP1 */ | ||
424 | static struct uio_info spu1_platform_data = { | ||
425 | .name = "SPU2DSP1", | ||
426 | .version = "0", | ||
427 | .irq = evt2irq(0x1820), | ||
428 | }; | ||
429 | |||
430 | static struct resource spu1_resources[] = { | ||
431 | [0] = { | ||
432 | .name = "SPU2DSP1", | ||
433 | .start = 0xfe300000, | ||
434 | .end = 0xfe3fffff, | ||
435 | .flags = IORESOURCE_MEM, | ||
436 | }, | ||
437 | }; | ||
438 | |||
439 | static struct platform_device spu1_device = { | ||
440 | .name = "uio_pdrv_genirq", | ||
441 | .id = 7, | ||
442 | .dev = { | ||
443 | .platform_data = &spu1_platform_data, | ||
444 | }, | ||
445 | .resource = spu1_resources, | ||
446 | .num_resources = ARRAY_SIZE(spu1_resources), | ||
447 | }; | ||
448 | |||
449 | static struct platform_device *sh7377_early_devices[] __initdata = { | ||
450 | &scif0_device, | ||
451 | &scif1_device, | ||
452 | &scif2_device, | ||
453 | &scif3_device, | ||
454 | &scif4_device, | ||
455 | &scif5_device, | ||
456 | &scif6_device, | ||
457 | &scif7_device, | ||
458 | &cmt10_device, | ||
459 | }; | ||
460 | |||
461 | static struct platform_device *sh7377_devices[] __initdata = { | ||
462 | &vpu_device, | ||
463 | &veu0_device, | ||
464 | &veu1_device, | ||
465 | &veu2_device, | ||
466 | &veu3_device, | ||
467 | &jpu_device, | ||
468 | &spu0_device, | ||
469 | &spu1_device, | ||
470 | }; | ||
471 | |||
472 | void __init sh7377_add_standard_devices(void) | ||
473 | { | ||
474 | platform_add_devices(sh7377_early_devices, | ||
475 | ARRAY_SIZE(sh7377_early_devices)); | ||
476 | |||
477 | platform_add_devices(sh7377_devices, | ||
478 | ARRAY_SIZE(sh7377_devices)); | ||
479 | } | ||
480 | |||
481 | static void __init sh7377_earlytimer_init(void) | ||
482 | { | ||
483 | sh7377_clock_init(); | ||
484 | shmobile_earlytimer_init(); | ||
485 | } | ||
486 | |||
487 | #define SMSTPCR3 IOMEM(0xe615013c) | ||
488 | #define SMSTPCR3_CMT1 (1 << 29) | ||
489 | |||
490 | void __init sh7377_add_early_devices(void) | ||
491 | { | ||
492 | /* enable clock to CMT1 */ | ||
493 | __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3); | ||
494 | |||
495 | early_platform_add_devices(sh7377_early_devices, | ||
496 | ARRAY_SIZE(sh7377_early_devices)); | ||
497 | |||
498 | /* setup early console here as well */ | ||
499 | shmobile_setup_console(); | ||
500 | |||
501 | /* override timer setup with soc-specific code */ | ||
502 | shmobile_timer.init = sh7377_earlytimer_init; | ||
503 | } | ||
504 | |||
505 | #ifdef CONFIG_USE_OF | ||
506 | |||
507 | void __init sh7377_add_early_devices_dt(void) | ||
508 | { | ||
509 | shmobile_setup_delay(600, 1, 3); /* Cortex-A8 @ 600MHz */ | ||
510 | |||
511 | early_platform_add_devices(sh7377_early_devices, | ||
512 | ARRAY_SIZE(sh7377_early_devices)); | ||
513 | |||
514 | /* setup early console here as well */ | ||
515 | shmobile_setup_console(); | ||
516 | } | ||
517 | |||
518 | static const struct of_dev_auxdata sh7377_auxdata_lookup[] __initconst = { | ||
519 | { } | ||
520 | }; | ||
521 | |||
522 | void __init sh7377_add_standard_devices_dt(void) | ||
523 | { | ||
524 | /* clocks are setup late during boot in the case of DT */ | ||
525 | sh7377_clock_init(); | ||
526 | |||
527 | platform_add_devices(sh7377_early_devices, | ||
528 | ARRAY_SIZE(sh7377_early_devices)); | ||
529 | |||
530 | of_platform_populate(NULL, of_default_bus_match_table, | ||
531 | sh7377_auxdata_lookup, NULL); | ||
532 | } | ||
533 | |||
534 | static const char *sh7377_boards_compat_dt[] __initdata = { | ||
535 | "renesas,sh7377", | ||
536 | NULL, | ||
537 | }; | ||
538 | |||
539 | DT_MACHINE_START(SH7377_DT, "Generic SH7377 (Flattened Device Tree)") | ||
540 | .map_io = sh7377_map_io, | ||
541 | .init_early = sh7377_add_early_devices_dt, | ||
542 | .init_irq = sh7377_init_irq, | ||
543 | .handle_irq = shmobile_handle_irq_intc, | ||
544 | .init_machine = sh7377_add_standard_devices_dt, | ||
545 | .timer = &shmobile_timer, | ||
546 | .dt_compat = sh7377_boards_compat_dt, | ||
547 | MACHINE_END | ||
548 | |||
549 | #endif /* CONFIG_USE_OF */ | ||
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index f67456286280..535426c306bd 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c | |||
@@ -32,24 +32,8 @@ | |||
32 | 32 | ||
33 | #define EMEV2_SCU_BASE 0x1e000000 | 33 | #define EMEV2_SCU_BASE 0x1e000000 |
34 | 34 | ||
35 | static DEFINE_SPINLOCK(scu_lock); | ||
36 | static void __iomem *scu_base; | 35 | static void __iomem *scu_base; |
37 | 36 | ||
38 | static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) | ||
39 | { | ||
40 | unsigned long tmp; | ||
41 | |||
42 | /* we assume this code is running on a different cpu | ||
43 | * than the one that is changing coherency setting */ | ||
44 | spin_lock(&scu_lock); | ||
45 | tmp = readl(scu_base + 8); | ||
46 | tmp &= ~clr; | ||
47 | tmp |= set; | ||
48 | writel(tmp, scu_base + 8); | ||
49 | spin_unlock(&scu_lock); | ||
50 | |||
51 | } | ||
52 | |||
53 | static unsigned int __init emev2_get_core_count(void) | 37 | static unsigned int __init emev2_get_core_count(void) |
54 | { | 38 | { |
55 | if (!scu_base) { | 39 | if (!scu_base) { |
@@ -95,7 +79,7 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct * | |||
95 | cpu = cpu_logical_map(cpu); | 79 | cpu = cpu_logical_map(cpu); |
96 | 80 | ||
97 | /* enable cache coherency */ | 81 | /* enable cache coherency */ |
98 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | 82 | scu_power_mode(scu_base, 0); |
99 | 83 | ||
100 | /* Tell ROM loader about our vector (in headsmp.S) */ | 84 | /* Tell ROM loader about our vector (in headsmp.S) */ |
101 | emev2_set_boot_vector(__pa(shmobile_secondary_vector)); | 85 | emev2_set_boot_vector(__pa(shmobile_secondary_vector)); |
@@ -106,12 +90,10 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct * | |||
106 | 90 | ||
107 | static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) | 91 | static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) |
108 | { | 92 | { |
109 | int cpu = cpu_logical_map(0); | ||
110 | |||
111 | scu_enable(scu_base); | 93 | scu_enable(scu_base); |
112 | 94 | ||
113 | /* enable cache coherency on CPU0 */ | 95 | /* enable cache coherency on CPU0 */ |
114 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | 96 | scu_power_mode(scu_base, 0); |
115 | } | 97 | } |
116 | 98 | ||
117 | static void __init emev2_smp_init_cpus(void) | 99 | static void __init emev2_smp_init_cpus(void) |
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index 2ce6af9a6a37..9def0f22bf22 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c | |||
@@ -61,9 +61,6 @@ static void __iomem *scu_base_addr(void) | |||
61 | return (void __iomem *)0xf0000000; | 61 | return (void __iomem *)0xf0000000; |
62 | } | 62 | } |
63 | 63 | ||
64 | static DEFINE_SPINLOCK(scu_lock); | ||
65 | static unsigned long tmp; | ||
66 | |||
67 | #ifdef CONFIG_HAVE_ARM_TWD | 64 | #ifdef CONFIG_HAVE_ARM_TWD |
68 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); | 65 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); |
69 | 66 | ||
@@ -73,20 +70,6 @@ void __init r8a7779_register_twd(void) | |||
73 | } | 70 | } |
74 | #endif | 71 | #endif |
75 | 72 | ||
76 | static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) | ||
77 | { | ||
78 | void __iomem *scu_base = scu_base_addr(); | ||
79 | |||
80 | spin_lock(&scu_lock); | ||
81 | tmp = __raw_readl(scu_base + 8); | ||
82 | tmp &= ~clr; | ||
83 | tmp |= set; | ||
84 | spin_unlock(&scu_lock); | ||
85 | |||
86 | /* disable cache coherency after releasing the lock */ | ||
87 | __raw_writel(tmp, scu_base + 8); | ||
88 | } | ||
89 | |||
90 | static unsigned int __init r8a7779_get_core_count(void) | 73 | static unsigned int __init r8a7779_get_core_count(void) |
91 | { | 74 | { |
92 | void __iomem *scu_base = scu_base_addr(); | 75 | void __iomem *scu_base = scu_base_addr(); |
@@ -102,7 +85,7 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu) | |||
102 | cpu = cpu_logical_map(cpu); | 85 | cpu = cpu_logical_map(cpu); |
103 | 86 | ||
104 | /* disable cache coherency */ | 87 | /* disable cache coherency */ |
105 | modify_scu_cpu_psr(3 << (cpu * 8), 0); | 88 | scu_power_mode(scu_base_addr(), 3); |
106 | 89 | ||
107 | if (cpu < ARRAY_SIZE(r8a7779_ch_cpu)) | 90 | if (cpu < ARRAY_SIZE(r8a7779_ch_cpu)) |
108 | ch = r8a7779_ch_cpu[cpu]; | 91 | ch = r8a7779_ch_cpu[cpu]; |
@@ -145,7 +128,7 @@ static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct | |||
145 | cpu = cpu_logical_map(cpu); | 128 | cpu = cpu_logical_map(cpu); |
146 | 129 | ||
147 | /* enable cache coherency */ | 130 | /* enable cache coherency */ |
148 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | 131 | scu_power_mode(scu_base_addr(), 0); |
149 | 132 | ||
150 | if (cpu < ARRAY_SIZE(r8a7779_ch_cpu)) | 133 | if (cpu < ARRAY_SIZE(r8a7779_ch_cpu)) |
151 | ch = r8a7779_ch_cpu[cpu]; | 134 | ch = r8a7779_ch_cpu[cpu]; |
@@ -158,15 +141,13 @@ static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct | |||
158 | 141 | ||
159 | static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) | 142 | static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) |
160 | { | 143 | { |
161 | int cpu = cpu_logical_map(0); | ||
162 | |||
163 | scu_enable(scu_base_addr()); | 144 | scu_enable(scu_base_addr()); |
164 | 145 | ||
165 | /* Map the reset vector (in headsmp.S) */ | 146 | /* Map the reset vector (in headsmp.S) */ |
166 | __raw_writel(__pa(shmobile_secondary_vector), AVECR); | 147 | __raw_writel(__pa(shmobile_secondary_vector), AVECR); |
167 | 148 | ||
168 | /* enable cache coherency on CPU0 */ | 149 | /* enable cache coherency on CPU0 */ |
169 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | 150 | scu_power_mode(scu_base_addr(), 0); |
170 | 151 | ||
171 | r8a7779_pm_init(); | 152 | r8a7779_pm_init(); |
172 | 153 | ||
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 624f00f70abf..96ddb97babbe 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c | |||
@@ -41,9 +41,6 @@ static void __iomem *scu_base_addr(void) | |||
41 | return (void __iomem *)0xf0000000; | 41 | return (void __iomem *)0xf0000000; |
42 | } | 42 | } |
43 | 43 | ||
44 | static DEFINE_SPINLOCK(scu_lock); | ||
45 | static unsigned long tmp; | ||
46 | |||
47 | #ifdef CONFIG_HAVE_ARM_TWD | 44 | #ifdef CONFIG_HAVE_ARM_TWD |
48 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); | 45 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); |
49 | void __init sh73a0_register_twd(void) | 46 | void __init sh73a0_register_twd(void) |
@@ -52,20 +49,6 @@ void __init sh73a0_register_twd(void) | |||
52 | } | 49 | } |
53 | #endif | 50 | #endif |
54 | 51 | ||
55 | static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) | ||
56 | { | ||
57 | void __iomem *scu_base = scu_base_addr(); | ||
58 | |||
59 | spin_lock(&scu_lock); | ||
60 | tmp = __raw_readl(scu_base + 8); | ||
61 | tmp &= ~clr; | ||
62 | tmp |= set; | ||
63 | spin_unlock(&scu_lock); | ||
64 | |||
65 | /* disable cache coherency after releasing the lock */ | ||
66 | __raw_writel(tmp, scu_base + 8); | ||
67 | } | ||
68 | |||
69 | static unsigned int __init sh73a0_get_core_count(void) | 52 | static unsigned int __init sh73a0_get_core_count(void) |
70 | { | 53 | { |
71 | void __iomem *scu_base = scu_base_addr(); | 54 | void __iomem *scu_base = scu_base_addr(); |
@@ -83,7 +66,7 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct | |||
83 | cpu = cpu_logical_map(cpu); | 66 | cpu = cpu_logical_map(cpu); |
84 | 67 | ||
85 | /* enable cache coherency */ | 68 | /* enable cache coherency */ |
86 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | 69 | scu_power_mode(scu_base_addr(), 0); |
87 | 70 | ||
88 | if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3) | 71 | if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3) |
89 | __raw_writel(1 << cpu, WUPCR); /* wake up */ | 72 | __raw_writel(1 << cpu, WUPCR); /* wake up */ |
@@ -95,8 +78,6 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct | |||
95 | 78 | ||
96 | static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) | 79 | static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) |
97 | { | 80 | { |
98 | int cpu = cpu_logical_map(0); | ||
99 | |||
100 | scu_enable(scu_base_addr()); | 81 | scu_enable(scu_base_addr()); |
101 | 82 | ||
102 | /* Map the reset vector (in headsmp.S) */ | 83 | /* Map the reset vector (in headsmp.S) */ |
@@ -104,7 +85,7 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) | |||
104 | __raw_writel(__pa(shmobile_secondary_vector), SBAR); | 85 | __raw_writel(__pa(shmobile_secondary_vector), SBAR); |
105 | 86 | ||
106 | /* enable cache coherency on CPU0 */ | 87 | /* enable cache coherency on CPU0 */ |
107 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | 88 | scu_power_mode(scu_base_addr(), 0); |
108 | } | 89 | } |
109 | 90 | ||
110 | static void __init sh73a0_smp_init_cpus(void) | 91 | static void __init sh73a0_smp_init_cpus(void) |
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index 023f443784ec..b820edaf3184 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c | |||
@@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs, | |||
745 | static int | 745 | static int |
746 | do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | 746 | do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) |
747 | { | 747 | { |
748 | union offset_union offset; | 748 | union offset_union uninitialized_var(offset); |
749 | unsigned long instr = 0, instrptr; | 749 | unsigned long instr = 0, instrptr; |
750 | int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); | 750 | int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); |
751 | unsigned int type; | 751 | unsigned int type; |
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index c834b32af275..3b44e0dd0a93 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -701,11 +701,14 @@ static int __init vfp_init(void) | |||
701 | elf_hwcap |= HWCAP_VFPv3; | 701 | elf_hwcap |= HWCAP_VFPv3; |
702 | 702 | ||
703 | /* | 703 | /* |
704 | * Check for VFPv3 D16. CPUs in this configuration | 704 | * Check for VFPv3 D16 and VFPv4 D16. CPUs in |
705 | * only have 16 x 64bit registers. | 705 | * this configuration only have 16 x 64bit |
706 | * registers. | ||
706 | */ | 707 | */ |
707 | if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) | 708 | if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) |
708 | elf_hwcap |= HWCAP_VFPv3D16; | 709 | elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */ |
710 | else | ||
711 | elf_hwcap |= HWCAP_VFPD32; | ||
709 | } | 712 | } |
710 | #endif | 713 | #endif |
711 | /* | 714 | /* |
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c index 59bcb96ac369..f57609275449 100644 --- a/arch/arm/xen/enlighten.c +++ b/arch/arm/xen/enlighten.c | |||
@@ -166,3 +166,14 @@ void free_xenballooned_pages(int nr_pages, struct page **pages) | |||
166 | *pages = NULL; | 166 | *pages = NULL; |
167 | } | 167 | } |
168 | EXPORT_SYMBOL_GPL(free_xenballooned_pages); | 168 | EXPORT_SYMBOL_GPL(free_xenballooned_pages); |
169 | |||
170 | /* In the hypervisor.S file. */ | ||
171 | EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op); | ||
172 | EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op); | ||
173 | EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version); | ||
174 | EXPORT_SYMBOL_GPL(HYPERVISOR_console_io); | ||
175 | EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op); | ||
176 | EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op); | ||
177 | EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op); | ||
178 | EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op); | ||
179 | EXPORT_SYMBOL_GPL(privcmd_call); | ||
diff --git a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S index 074f5ed101b9..71f723984cbd 100644 --- a/arch/arm/xen/hypercall.S +++ b/arch/arm/xen/hypercall.S | |||
@@ -48,20 +48,16 @@ | |||
48 | 48 | ||
49 | #include <linux/linkage.h> | 49 | #include <linux/linkage.h> |
50 | #include <asm/assembler.h> | 50 | #include <asm/assembler.h> |
51 | #include <asm/opcodes-virt.h> | ||
51 | #include <xen/interface/xen.h> | 52 | #include <xen/interface/xen.h> |
52 | 53 | ||
53 | 54 | ||
54 | /* HVC 0xEA1 */ | 55 | #define XEN_IMM 0xEA1 |
55 | #ifdef CONFIG_THUMB2_KERNEL | ||
56 | #define xen_hvc .word 0xf7e08ea1 | ||
57 | #else | ||
58 | #define xen_hvc .word 0xe140ea71 | ||
59 | #endif | ||
60 | 56 | ||
61 | #define HYPERCALL_SIMPLE(hypercall) \ | 57 | #define HYPERCALL_SIMPLE(hypercall) \ |
62 | ENTRY(HYPERVISOR_##hypercall) \ | 58 | ENTRY(HYPERVISOR_##hypercall) \ |
63 | mov r12, #__HYPERVISOR_##hypercall; \ | 59 | mov r12, #__HYPERVISOR_##hypercall; \ |
64 | xen_hvc; \ | 60 | __HVC(XEN_IMM); \ |
65 | mov pc, lr; \ | 61 | mov pc, lr; \ |
66 | ENDPROC(HYPERVISOR_##hypercall) | 62 | ENDPROC(HYPERVISOR_##hypercall) |
67 | 63 | ||
@@ -76,7 +72,7 @@ ENTRY(HYPERVISOR_##hypercall) \ | |||
76 | stmdb sp!, {r4} \ | 72 | stmdb sp!, {r4} \ |
77 | ldr r4, [sp, #4] \ | 73 | ldr r4, [sp, #4] \ |
78 | mov r12, #__HYPERVISOR_##hypercall; \ | 74 | mov r12, #__HYPERVISOR_##hypercall; \ |
79 | xen_hvc \ | 75 | __HVC(XEN_IMM); \ |
80 | ldm sp!, {r4} \ | 76 | ldm sp!, {r4} \ |
81 | mov pc, lr \ | 77 | mov pc, lr \ |
82 | ENDPROC(HYPERVISOR_##hypercall) | 78 | ENDPROC(HYPERVISOR_##hypercall) |
@@ -100,7 +96,7 @@ ENTRY(privcmd_call) | |||
100 | mov r2, r3 | 96 | mov r2, r3 |
101 | ldr r3, [sp, #8] | 97 | ldr r3, [sp, #8] |
102 | ldr r4, [sp, #4] | 98 | ldr r4, [sp, #4] |
103 | xen_hvc | 99 | __HVC(XEN_IMM) |
104 | ldm sp!, {r4} | 100 | ldm sp!, {r4} |
105 | mov pc, lr | 101 | mov pc, lr |
106 | ENDPROC(privcmd_call); | 102 | ENDPROC(privcmd_call); |
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index ef54a59a9e89..15ac18a56c93 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig | |||
@@ -1,6 +1,7 @@ | |||
1 | config ARM64 | 1 | config ARM64 |
2 | def_bool y | 2 | def_bool y |
3 | select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE | 3 | select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE |
4 | select ARCH_WANT_COMPAT_IPC_PARSE_VERSION | ||
4 | select GENERIC_CLOCKEVENTS | 5 | select GENERIC_CLOCKEVENTS |
5 | select GENERIC_HARDIRQS_NO_DEPRECATED | 6 | select GENERIC_HARDIRQS_NO_DEPRECATED |
6 | select GENERIC_IOMAP | 7 | select GENERIC_IOMAP |
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index cf284649dfcb..07fea290d7c1 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h | |||
@@ -25,12 +25,10 @@ | |||
25 | #include <asm/user.h> | 25 | #include <asm/user.h> |
26 | 26 | ||
27 | typedef unsigned long elf_greg_t; | 27 | typedef unsigned long elf_greg_t; |
28 | typedef unsigned long elf_freg_t[3]; | ||
29 | 28 | ||
30 | #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) | 29 | #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) |
31 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | 30 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; |
32 | 31 | typedef struct user_fpsimd_state elf_fpregset_t; | |
33 | typedef struct user_fp elf_fpregset_t; | ||
34 | 32 | ||
35 | #define EM_AARCH64 183 | 33 | #define EM_AARCH64 183 |
36 | 34 | ||
@@ -87,7 +85,6 @@ typedef struct user_fp elf_fpregset_t; | |||
87 | #define R_AARCH64_MOVW_PREL_G2_NC 292 | 85 | #define R_AARCH64_MOVW_PREL_G2_NC 292 |
88 | #define R_AARCH64_MOVW_PREL_G3 293 | 86 | #define R_AARCH64_MOVW_PREL_G3 293 |
89 | 87 | ||
90 | |||
91 | /* | 88 | /* |
92 | * These are used to set parameters in the core dumps. | 89 | * These are used to set parameters in the core dumps. |
93 | */ | 90 | */ |
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index b42fab9f62a9..c43b4ac13008 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h | |||
@@ -25,9 +25,8 @@ | |||
25 | * - FPSR and FPCR | 25 | * - FPSR and FPCR |
26 | * - 32 128-bit data registers | 26 | * - 32 128-bit data registers |
27 | * | 27 | * |
28 | * Note that user_fp forms a prefix of this structure, which is relied | 28 | * Note that user_fpsimd forms a prefix of this structure, which is |
29 | * upon in the ptrace FP/SIMD accessors. struct user_fpsimd_state must | 29 | * relied upon in the ptrace FP/SIMD accessors. |
30 | * form a prefix of struct fpsimd_state. | ||
31 | */ | 30 | */ |
32 | struct fpsimd_state { | 31 | struct fpsimd_state { |
33 | union { | 32 | union { |
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 74a2a7d304a9..54f6116697f7 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h | |||
@@ -114,7 +114,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) | |||
114 | * I/O port access primitives. | 114 | * I/O port access primitives. |
115 | */ | 115 | */ |
116 | #define IO_SPACE_LIMIT 0xffff | 116 | #define IO_SPACE_LIMIT 0xffff |
117 | #define PCI_IOBASE ((void __iomem *)0xffffffbbfffe0000UL) | 117 | #define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_2M)) |
118 | 118 | ||
119 | static inline u8 inb(unsigned long addr) | 119 | static inline u8 inb(unsigned long addr) |
120 | { | 120 | { |
@@ -225,9 +225,9 @@ extern void __iounmap(volatile void __iomem *addr); | |||
225 | #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE)) | 225 | #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE)) |
226 | #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC)) | 226 | #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC)) |
227 | 227 | ||
228 | #define ioremap(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE) | 228 | #define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) |
229 | #define ioremap_nocache(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE) | 229 | #define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) |
230 | #define ioremap_wc(addr, size) __ioremap((addr), (size), PROT_NORMAL_NC) | 230 | #define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) |
231 | #define iounmap __iounmap | 231 | #define iounmap __iounmap |
232 | 232 | ||
233 | #define ARCH_HAS_IOREMAP_WC | 233 | #define ARCH_HAS_IOREMAP_WC |
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index 5d810044feda..77f696c14339 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h | |||
@@ -43,6 +43,8 @@ | |||
43 | #else | 43 | #else |
44 | #define STACK_TOP STACK_TOP_MAX | 44 | #define STACK_TOP STACK_TOP_MAX |
45 | #endif /* CONFIG_COMPAT */ | 45 | #endif /* CONFIG_COMPAT */ |
46 | |||
47 | #define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK | ||
46 | #endif /* __KERNEL__ */ | 48 | #endif /* __KERNEL__ */ |
47 | 49 | ||
48 | struct debug_info { | 50 | struct debug_info { |
diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h index 63f853f8b718..68aff2816e86 100644 --- a/arch/arm64/include/asm/unistd.h +++ b/arch/arm64/include/asm/unistd.h | |||
@@ -14,7 +14,6 @@ | |||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
15 | */ | 15 | */ |
16 | #ifdef CONFIG_COMPAT | 16 | #ifdef CONFIG_COMPAT |
17 | #define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION | ||
18 | #define __ARCH_WANT_COMPAT_STAT64 | 17 | #define __ARCH_WANT_COMPAT_STAT64 |
19 | #define __ARCH_WANT_SYS_GETHOSTNAME | 18 | #define __ARCH_WANT_SYS_GETHOSTNAME |
20 | #define __ARCH_WANT_SYS_PAUSE | 19 | #define __ARCH_WANT_SYS_PAUSE |
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index ecbf2d81ec5c..c76c7241125b 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c | |||
@@ -613,17 +613,11 @@ enum armv8_pmuv3_perf_types { | |||
613 | ARMV8_PMUV3_PERFCTR_BUS_ACCESS = 0x19, | 613 | ARMV8_PMUV3_PERFCTR_BUS_ACCESS = 0x19, |
614 | ARMV8_PMUV3_PERFCTR_MEM_ERROR = 0x1A, | 614 | ARMV8_PMUV3_PERFCTR_MEM_ERROR = 0x1A, |
615 | ARMV8_PMUV3_PERFCTR_BUS_CYCLES = 0x1D, | 615 | ARMV8_PMUV3_PERFCTR_BUS_CYCLES = 0x1D, |
616 | |||
617 | /* | ||
618 | * This isn't an architected event. | ||
619 | * We detect this event number and use the cycle counter instead. | ||
620 | */ | ||
621 | ARMV8_PMUV3_PERFCTR_CPU_CYCLES = 0xFF, | ||
622 | }; | 616 | }; |
623 | 617 | ||
624 | /* PMUv3 HW events mapping. */ | 618 | /* PMUv3 HW events mapping. */ |
625 | static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = { | 619 | static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = { |
626 | [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CPU_CYCLES, | 620 | [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES, |
627 | [PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED, | 621 | [PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED, |
628 | [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS, | 622 | [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS, |
629 | [PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL, | 623 | [PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL, |
@@ -1106,7 +1100,7 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc, | |||
1106 | unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT; | 1100 | unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT; |
1107 | 1101 | ||
1108 | /* Always place a cycle counter into the cycle counter. */ | 1102 | /* Always place a cycle counter into the cycle counter. */ |
1109 | if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) { | 1103 | if (evtype == ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES) { |
1110 | if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask)) | 1104 | if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask)) |
1111 | return -EAGAIN; | 1105 | return -EAGAIN; |
1112 | 1106 | ||
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index f22965ea1cfc..e04cebdbb47f 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c | |||
@@ -310,24 +310,6 @@ struct task_struct *__switch_to(struct task_struct *prev, | |||
310 | } | 310 | } |
311 | 311 | ||
312 | /* | 312 | /* |
313 | * Fill in the task's elfregs structure for a core dump. | ||
314 | */ | ||
315 | int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs) | ||
316 | { | ||
317 | elf_core_copy_regs(elfregs, task_pt_regs(t)); | ||
318 | return 1; | ||
319 | } | ||
320 | |||
321 | /* | ||
322 | * fill in the fpe structure for a core dump... | ||
323 | */ | ||
324 | int dump_fpu (struct pt_regs *regs, struct user_fp *fp) | ||
325 | { | ||
326 | return 0; | ||
327 | } | ||
328 | EXPORT_SYMBOL(dump_fpu); | ||
329 | |||
330 | /* | ||
331 | * Shuffle the argument into the correct register before calling the | 313 | * Shuffle the argument into the correct register before calling the |
332 | * thread function. x1 is the thread argument, x2 is the pointer to | 314 | * thread function. x1 is the thread argument, x2 is the pointer to |
333 | * the thread function, and x3 points to the exit function. | 315 | * the thread function, and x3 points to the exit function. |
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 226b6bf6e9c2..538300f2273d 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c | |||
@@ -211,8 +211,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) | |||
211 | * before we continue. | 211 | * before we continue. |
212 | */ | 212 | */ |
213 | set_cpu_online(cpu, true); | 213 | set_cpu_online(cpu, true); |
214 | while (!cpu_active(cpu)) | 214 | complete(&cpu_running); |
215 | cpu_relax(); | ||
216 | 215 | ||
217 | /* | 216 | /* |
218 | * OK, it's off to the idle thread for us | 217 | * OK, it's off to the idle thread for us |
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index efbf7df05d3f..4cd28931dba9 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c | |||
@@ -80,7 +80,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max) | |||
80 | #ifdef CONFIG_ZONE_DMA32 | 80 | #ifdef CONFIG_ZONE_DMA32 |
81 | /* 4GB maximum for 32-bit only capable devices */ | 81 | /* 4GB maximum for 32-bit only capable devices */ |
82 | max_dma32 = min(max, MAX_DMA32_PFN); | 82 | max_dma32 = min(max, MAX_DMA32_PFN); |
83 | zone_size[ZONE_DMA32] = max_dma32 - min; | 83 | zone_size[ZONE_DMA32] = max(min, max_dma32) - min; |
84 | #endif | 84 | #endif |
85 | zone_size[ZONE_NORMAL] = max - max_dma32; | 85 | zone_size[ZONE_NORMAL] = max - max_dma32; |
86 | 86 | ||
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig index b7412504f08a..df2eb4bd9fa2 100644 --- a/arch/frv/Kconfig +++ b/arch/frv/Kconfig | |||
@@ -13,6 +13,7 @@ config FRV | |||
13 | select GENERIC_CPU_DEVICES | 13 | select GENERIC_CPU_DEVICES |
14 | select ARCH_WANT_IPC_PARSE_VERSION | 14 | select ARCH_WANT_IPC_PARSE_VERSION |
15 | select GENERIC_KERNEL_THREAD | 15 | select GENERIC_KERNEL_THREAD |
16 | select GENERIC_KERNEL_EXECVE | ||
16 | 17 | ||
17 | config ZONE_DMA | 18 | config ZONE_DMA |
18 | bool | 19 | bool |
diff --git a/arch/frv/boot/Makefile b/arch/frv/boot/Makefile index 6ae3254da019..636d5bbcd53f 100644 --- a/arch/frv/boot/Makefile +++ b/arch/frv/boot/Makefile | |||
@@ -17,6 +17,8 @@ PARAMS_PHYS = 0x0207c000 | |||
17 | INITRD_PHYS = 0x02180000 | 17 | INITRD_PHYS = 0x02180000 |
18 | INITRD_VIRT = 0x02180000 | 18 | INITRD_VIRT = 0x02180000 |
19 | 19 | ||
20 | OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment | ||
21 | |||
20 | # | 22 | # |
21 | # If you don't define ZRELADDR above, | 23 | # If you don't define ZRELADDR above, |
22 | # then it defaults to ZTEXTADDR | 24 | # then it defaults to ZTEXTADDR |
@@ -32,18 +34,18 @@ Image: $(obj)/Image | |||
32 | targets: $(obj)/Image | 34 | targets: $(obj)/Image |
33 | 35 | ||
34 | $(obj)/Image: vmlinux FORCE | 36 | $(obj)/Image: vmlinux FORCE |
35 | $(OBJCOPY) -O binary -R .note -R .comment -S vmlinux $@ | 37 | $(OBJCOPY) $(OBJCOPYFLAGS) -S vmlinux $@ |
36 | 38 | ||
37 | #$(obj)/Image: $(CONFIGURE) $(SYSTEM) | 39 | #$(obj)/Image: $(CONFIGURE) $(SYSTEM) |
38 | # $(OBJCOPY) -O binary -R .note -R .comment -g -S $(SYSTEM) $@ | 40 | # $(OBJCOPY) $(OBJCOPYFLAGS) -g -S $(SYSTEM) $@ |
39 | 41 | ||
40 | bzImage: zImage | 42 | bzImage: zImage |
41 | 43 | ||
42 | zImage: $(CONFIGURE) compressed/$(LINUX) | 44 | zImage: $(CONFIGURE) compressed/$(LINUX) |
43 | $(OBJCOPY) -O binary -R .note -R .comment -S compressed/$(LINUX) $@ | 45 | $(OBJCOPY) $(OBJCOPYFLAGS) -S compressed/$(LINUX) $@ |
44 | 46 | ||
45 | bootpImage: bootp/bootp | 47 | bootpImage: bootp/bootp |
46 | $(OBJCOPY) -O binary -R .note -R .comment -S bootp/bootp $@ | 48 | $(OBJCOPY) $(OBJCOPYFLAGS) -S bootp/bootp $@ |
47 | 49 | ||
48 | compressed/$(LINUX): $(LINUX) dep | 50 | compressed/$(LINUX): $(LINUX) dep |
49 | @$(MAKE) -C compressed $(LINUX) | 51 | @$(MAKE) -C compressed $(LINUX) |
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h index 266a5b25a0c1..2358634cacca 100644 --- a/arch/frv/include/asm/unistd.h +++ b/arch/frv/include/asm/unistd.h | |||
@@ -30,7 +30,6 @@ | |||
30 | #define __ARCH_WANT_SYS_RT_SIGACTION | 30 | #define __ARCH_WANT_SYS_RT_SIGACTION |
31 | #define __ARCH_WANT_SYS_RT_SIGSUSPEND | 31 | #define __ARCH_WANT_SYS_RT_SIGSUSPEND |
32 | #define __ARCH_WANT_SYS_EXECVE | 32 | #define __ARCH_WANT_SYS_EXECVE |
33 | #define __ARCH_WANT_KERNEL_EXECVE | ||
34 | 33 | ||
35 | /* | 34 | /* |
36 | * "Conditional" syscalls | 35 | * "Conditional" syscalls |
diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S index ee0beb354e4d..dfcd263c0517 100644 --- a/arch/frv/kernel/entry.S +++ b/arch/frv/kernel/entry.S | |||
@@ -869,11 +869,6 @@ ret_from_kernel_thread: | |||
869 | call schedule_tail | 869 | call schedule_tail |
870 | calll.p @(gr21,gr0) | 870 | calll.p @(gr21,gr0) |
871 | or gr20,gr20,gr8 | 871 | or gr20,gr20,gr8 |
872 | bra sys_exit | ||
873 | |||
874 | .globl ret_from_kernel_execve | ||
875 | ret_from_kernel_execve: | ||
876 | ori gr28,0,sp | ||
877 | bra __syscall_exit | 872 | bra __syscall_exit |
878 | 873 | ||
879 | ################################################################################################### | 874 | ################################################################################################### |
@@ -1080,27 +1075,10 @@ __entry_return_from_kernel_interrupt: | |||
1080 | subicc gr5,#0,gr0,icc0 | 1075 | subicc gr5,#0,gr0,icc0 |
1081 | beq icc0,#0,__entry_return_direct | 1076 | beq icc0,#0,__entry_return_direct |
1082 | 1077 | ||
1083 | __entry_preempt_need_resched: | 1078 | subcc gr0,gr0,gr0,icc2 /* set Z and clear C */ |
1084 | ldi @(gr15,#TI_FLAGS),gr4 | 1079 | call preempt_schedule_irq |
1085 | andicc gr4,#_TIF_NEED_RESCHED,gr0,icc0 | ||
1086 | beq icc0,#1,__entry_return_direct | ||
1087 | |||
1088 | setlos #PREEMPT_ACTIVE,gr5 | ||
1089 | sti gr5,@(gr15,#TI_FLAGS) | ||
1090 | |||
1091 | andi gr23,#~PSR_PIL,gr23 | ||
1092 | movgs gr23,psr | ||
1093 | |||
1094 | call schedule | ||
1095 | sti gr0,@(gr15,#TI_PRE_COUNT) | ||
1096 | |||
1097 | movsg psr,gr23 | ||
1098 | ori gr23,#PSR_PIL_14,gr23 | ||
1099 | movgs gr23,psr | ||
1100 | bra __entry_preempt_need_resched | ||
1101 | #else | ||
1102 | bra __entry_return_direct | ||
1103 | #endif | 1080 | #endif |
1081 | bra __entry_return_direct | ||
1104 | 1082 | ||
1105 | 1083 | ||
1106 | ############################################################################### | 1084 | ############################################################################### |
diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c index e1e3aa196aa4..7e33215f1d8f 100644 --- a/arch/frv/kernel/process.c +++ b/arch/frv/kernel/process.c | |||
@@ -181,6 +181,9 @@ int copy_thread(unsigned long clone_flags, | |||
181 | childregs = (struct pt_regs *) | 181 | childregs = (struct pt_regs *) |
182 | (task_stack_page(p) + THREAD_SIZE - FRV_FRAME0_SIZE); | 182 | (task_stack_page(p) + THREAD_SIZE - FRV_FRAME0_SIZE); |
183 | 183 | ||
184 | /* set up the userspace frame (the only place that the USP is stored) */ | ||
185 | *childregs = *__kernel_frame0_ptr; | ||
186 | |||
184 | p->set_child_tid = p->clear_child_tid = NULL; | 187 | p->set_child_tid = p->clear_child_tid = NULL; |
185 | 188 | ||
186 | p->thread.frame = childregs; | 189 | p->thread.frame = childregs; |
@@ -191,10 +194,8 @@ int copy_thread(unsigned long clone_flags, | |||
191 | p->thread.frame0 = childregs; | 194 | p->thread.frame0 = childregs; |
192 | 195 | ||
193 | if (unlikely(!regs)) { | 196 | if (unlikely(!regs)) { |
194 | memset(childregs, 0, sizeof(struct pt_regs)); | ||
195 | childregs->gr9 = usp; /* function */ | 197 | childregs->gr9 = usp; /* function */ |
196 | childregs->gr8 = arg; | 198 | childregs->gr8 = arg; |
197 | childregs->psr = PSR_S; | ||
198 | p->thread.pc = (unsigned long) ret_from_kernel_thread; | 199 | p->thread.pc = (unsigned long) ret_from_kernel_thread; |
199 | save_user_regs(p->thread.user); | 200 | save_user_regs(p->thread.user); |
200 | return 0; | 201 | return 0; |
diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c index e47857f889b6..b99c2a7cc7a4 100644 --- a/arch/frv/mb93090-mb00/pci-dma-nommu.c +++ b/arch/frv/mb93090-mb00/pci-dma-nommu.c | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | #include <linux/types.h> | 12 | #include <linux/types.h> |
13 | #include <linux/slab.h> | 13 | #include <linux/slab.h> |
14 | #include <linux/export.h> | ||
14 | #include <linux/dma-mapping.h> | 15 | #include <linux/dma-mapping.h> |
15 | #include <linux/list.h> | 16 | #include <linux/list.h> |
16 | #include <linux/pci.h> | 17 | #include <linux/pci.h> |
diff --git a/arch/h8300/include/asm/cache.h b/arch/h8300/include/asm/cache.h index c6350283649d..05887a1d80e5 100644 --- a/arch/h8300/include/asm/cache.h +++ b/arch/h8300/include/asm/cache.h | |||
@@ -2,7 +2,8 @@ | |||
2 | #define __ARCH_H8300_CACHE_H | 2 | #define __ARCH_H8300_CACHE_H |
3 | 3 | ||
4 | /* bytes per L1 cache line */ | 4 | /* bytes per L1 cache line */ |
5 | #define L1_CACHE_BYTES 4 | 5 | #define L1_CACHE_SHIFT 2 |
6 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | ||
6 | 7 | ||
7 | /* m68k-elf-gcc 2.95.2 doesn't like these */ | 8 | /* m68k-elf-gcc 2.95.2 doesn't like these */ |
8 | 9 | ||
diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h index 55bde6035216..ad2b924167d7 100644 --- a/arch/s390/include/asm/cio.h +++ b/arch/s390/include/asm/cio.h | |||
@@ -9,6 +9,8 @@ | |||
9 | 9 | ||
10 | #define LPM_ANYPATH 0xff | 10 | #define LPM_ANYPATH 0xff |
11 | #define __MAX_CSSID 0 | 11 | #define __MAX_CSSID 0 |
12 | #define __MAX_SUBCHANNEL 65535 | ||
13 | #define __MAX_SSID 3 | ||
12 | 14 | ||
13 | #include <asm/scsw.h> | 15 | #include <asm/scsw.h> |
14 | 16 | ||
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h index dd647c919a66..2d3b7cb26005 100644 --- a/arch/s390/include/asm/pgtable.h +++ b/arch/s390/include/asm/pgtable.h | |||
@@ -506,12 +506,15 @@ static inline int pud_bad(pud_t pud) | |||
506 | 506 | ||
507 | static inline int pmd_present(pmd_t pmd) | 507 | static inline int pmd_present(pmd_t pmd) |
508 | { | 508 | { |
509 | return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL; | 509 | unsigned long mask = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO; |
510 | return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE || | ||
511 | !(pmd_val(pmd) & _SEGMENT_ENTRY_INV); | ||
510 | } | 512 | } |
511 | 513 | ||
512 | static inline int pmd_none(pmd_t pmd) | 514 | static inline int pmd_none(pmd_t pmd) |
513 | { | 515 | { |
514 | return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL; | 516 | return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) && |
517 | !(pmd_val(pmd) & _SEGMENT_ENTRY_RO); | ||
515 | } | 518 | } |
516 | 519 | ||
517 | static inline int pmd_large(pmd_t pmd) | 520 | static inline int pmd_large(pmd_t pmd) |
@@ -1223,6 +1226,11 @@ static inline void __pmd_idte(unsigned long address, pmd_t *pmdp) | |||
1223 | } | 1226 | } |
1224 | 1227 | ||
1225 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | 1228 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
1229 | |||
1230 | #define SEGMENT_NONE __pgprot(_HPAGE_TYPE_NONE) | ||
1231 | #define SEGMENT_RO __pgprot(_HPAGE_TYPE_RO) | ||
1232 | #define SEGMENT_RW __pgprot(_HPAGE_TYPE_RW) | ||
1233 | |||
1226 | #define __HAVE_ARCH_PGTABLE_DEPOSIT | 1234 | #define __HAVE_ARCH_PGTABLE_DEPOSIT |
1227 | extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable); | 1235 | extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable); |
1228 | 1236 | ||
@@ -1242,16 +1250,15 @@ static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, | |||
1242 | 1250 | ||
1243 | static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot) | 1251 | static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot) |
1244 | { | 1252 | { |
1245 | unsigned long pgprot_pmd = 0; | 1253 | /* |
1246 | 1254 | * pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx) | |
1247 | if (pgprot_val(pgprot) & _PAGE_INVALID) { | 1255 | * Convert to segment table entry format. |
1248 | if (pgprot_val(pgprot) & _PAGE_SWT) | 1256 | */ |
1249 | pgprot_pmd |= _HPAGE_TYPE_NONE; | 1257 | if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE)) |
1250 | pgprot_pmd |= _SEGMENT_ENTRY_INV; | 1258 | return pgprot_val(SEGMENT_NONE); |
1251 | } | 1259 | if (pgprot_val(pgprot) == pgprot_val(PAGE_RO)) |
1252 | if (pgprot_val(pgprot) & _PAGE_RO) | 1260 | return pgprot_val(SEGMENT_RO); |
1253 | pgprot_pmd |= _SEGMENT_ENTRY_RO; | 1261 | return pgprot_val(SEGMENT_RW); |
1254 | return pgprot_pmd; | ||
1255 | } | 1262 | } |
1256 | 1263 | ||
1257 | static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) | 1264 | static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) |
@@ -1269,7 +1276,9 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd) | |||
1269 | 1276 | ||
1270 | static inline pmd_t pmd_mkwrite(pmd_t pmd) | 1277 | static inline pmd_t pmd_mkwrite(pmd_t pmd) |
1271 | { | 1278 | { |
1272 | pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO; | 1279 | /* Do not clobber _HPAGE_TYPE_NONE pages! */ |
1280 | if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV)) | ||
1281 | pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO; | ||
1273 | return pmd; | 1282 | return pmd; |
1274 | } | 1283 | } |
1275 | 1284 | ||
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S index bf053898630d..b6506ee32a36 100644 --- a/arch/s390/kernel/sclp.S +++ b/arch/s390/kernel/sclp.S | |||
@@ -44,6 +44,12 @@ _sclp_wait_int: | |||
44 | #endif | 44 | #endif |
45 | mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8) | 45 | mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8) |
46 | mvc 0(16,%r8),0(%r9) | 46 | mvc 0(16,%r8),0(%r9) |
47 | #ifdef CONFIG_64BIT | ||
48 | epsw %r6,%r7 # set current addressing mode | ||
49 | nill %r6,0x1 # in new psw (31 or 64 bit mode) | ||
50 | nilh %r7,0x8000 | ||
51 | stm %r6,%r7,0(%r8) | ||
52 | #endif | ||
47 | lhi %r6,0x0200 # cr mask for ext int (cr0.54) | 53 | lhi %r6,0x0200 # cr mask for ext int (cr0.54) |
48 | ltr %r2,%r2 | 54 | ltr %r2,%r2 |
49 | jz .LsetctS1 | 55 | jz .LsetctS1 |
@@ -87,7 +93,7 @@ _sclp_wait_int: | |||
87 | .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int | 93 | .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int |
88 | #ifdef CONFIG_64BIT | 94 | #ifdef CONFIG_64BIT |
89 | .LextpswS1_64: | 95 | .LextpswS1_64: |
90 | .quad 0x0000000180000000, .LwaitS1 # PSW to handle ext int, 64 bit | 96 | .quad 0, .LwaitS1 # PSW to handle ext int, 64 bit |
91 | #endif | 97 | #endif |
92 | .LwaitpswS1: | 98 | .LwaitpswS1: |
93 | .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int | 99 | .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int |
diff --git a/arch/s390/lib/uaccess_pt.c b/arch/s390/lib/uaccess_pt.c index 2d37bb861faf..9017a63dda3d 100644 --- a/arch/s390/lib/uaccess_pt.c +++ b/arch/s390/lib/uaccess_pt.c | |||
@@ -39,7 +39,7 @@ static __always_inline unsigned long follow_table(struct mm_struct *mm, | |||
39 | pmd = pmd_offset(pud, addr); | 39 | pmd = pmd_offset(pud, addr); |
40 | if (pmd_none(*pmd)) | 40 | if (pmd_none(*pmd)) |
41 | return -0x10UL; | 41 | return -0x10UL; |
42 | if (pmd_huge(*pmd)) { | 42 | if (pmd_large(*pmd)) { |
43 | if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO)) | 43 | if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO)) |
44 | return -0x04UL; | 44 | return -0x04UL; |
45 | return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK); | 45 | return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK); |
diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c index 60acb93a4680..8b8285310b5a 100644 --- a/arch/s390/mm/gup.c +++ b/arch/s390/mm/gup.c | |||
@@ -126,7 +126,7 @@ static inline int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr, | |||
126 | */ | 126 | */ |
127 | if (pmd_none(pmd) || pmd_trans_splitting(pmd)) | 127 | if (pmd_none(pmd) || pmd_trans_splitting(pmd)) |
128 | return 0; | 128 | return 0; |
129 | if (unlikely(pmd_huge(pmd))) { | 129 | if (unlikely(pmd_large(pmd))) { |
130 | if (!gup_huge_pmd(pmdp, pmd, addr, next, | 130 | if (!gup_huge_pmd(pmdp, pmd, addr, next, |
131 | write, pages, nr)) | 131 | write, pages, nr)) |
132 | return 0; | 132 | return 0; |
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index b6b442b0d793..9f2edb5c5551 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig | |||
@@ -20,6 +20,7 @@ config SPARC | |||
20 | select HAVE_ARCH_TRACEHOOK | 20 | select HAVE_ARCH_TRACEHOOK |
21 | select SYSCTL_EXCEPTION_TRACE | 21 | select SYSCTL_EXCEPTION_TRACE |
22 | select ARCH_WANT_OPTIONAL_GPIOLIB | 22 | select ARCH_WANT_OPTIONAL_GPIOLIB |
23 | select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE | ||
23 | select RTC_CLASS | 24 | select RTC_CLASS |
24 | select RTC_DRV_M48T59 | 25 | select RTC_DRV_M48T59 |
25 | select HAVE_IRQ_WORK | 26 | select HAVE_IRQ_WORK |
diff --git a/arch/sparc/crypto/Makefile b/arch/sparc/crypto/Makefile index 6ae1ad5e502b..5d469d81761f 100644 --- a/arch/sparc/crypto/Makefile +++ b/arch/sparc/crypto/Makefile | |||
@@ -13,13 +13,13 @@ obj-$(CONFIG_CRYPTO_DES_SPARC64) += camellia-sparc64.o | |||
13 | 13 | ||
14 | obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o | 14 | obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o |
15 | 15 | ||
16 | sha1-sparc64-y := sha1_asm.o sha1_glue.o crop_devid.o | 16 | sha1-sparc64-y := sha1_asm.o sha1_glue.o |
17 | sha256-sparc64-y := sha256_asm.o sha256_glue.o crop_devid.o | 17 | sha256-sparc64-y := sha256_asm.o sha256_glue.o |
18 | sha512-sparc64-y := sha512_asm.o sha512_glue.o crop_devid.o | 18 | sha512-sparc64-y := sha512_asm.o sha512_glue.o |
19 | md5-sparc64-y := md5_asm.o md5_glue.o crop_devid.o | 19 | md5-sparc64-y := md5_asm.o md5_glue.o |
20 | 20 | ||
21 | aes-sparc64-y := aes_asm.o aes_glue.o crop_devid.o | 21 | aes-sparc64-y := aes_asm.o aes_glue.o |
22 | des-sparc64-y := des_asm.o des_glue.o crop_devid.o | 22 | des-sparc64-y := des_asm.o des_glue.o |
23 | camellia-sparc64-y := camellia_asm.o camellia_glue.o crop_devid.o | 23 | camellia-sparc64-y := camellia_asm.o camellia_glue.o |
24 | 24 | ||
25 | crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o crop_devid.o | 25 | crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o |
diff --git a/arch/sparc/crypto/aes_glue.c b/arch/sparc/crypto/aes_glue.c index 8f1c9980f637..3965d1d36dfa 100644 --- a/arch/sparc/crypto/aes_glue.c +++ b/arch/sparc/crypto/aes_glue.c | |||
@@ -475,3 +475,5 @@ MODULE_LICENSE("GPL"); | |||
475 | MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated"); | 475 | MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated"); |
476 | 476 | ||
477 | MODULE_ALIAS("aes"); | 477 | MODULE_ALIAS("aes"); |
478 | |||
479 | #include "crop_devid.c" | ||
diff --git a/arch/sparc/crypto/camellia_glue.c b/arch/sparc/crypto/camellia_glue.c index 42905c084299..62c89af3fd3f 100644 --- a/arch/sparc/crypto/camellia_glue.c +++ b/arch/sparc/crypto/camellia_glue.c | |||
@@ -320,3 +320,5 @@ MODULE_LICENSE("GPL"); | |||
320 | MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated"); | 320 | MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated"); |
321 | 321 | ||
322 | MODULE_ALIAS("aes"); | 322 | MODULE_ALIAS("aes"); |
323 | |||
324 | #include "crop_devid.c" | ||
diff --git a/arch/sparc/crypto/crc32c_glue.c b/arch/sparc/crypto/crc32c_glue.c index 0bd89cea8d8e..5162fad912ce 100644 --- a/arch/sparc/crypto/crc32c_glue.c +++ b/arch/sparc/crypto/crc32c_glue.c | |||
@@ -177,3 +177,5 @@ MODULE_LICENSE("GPL"); | |||
177 | MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated"); | 177 | MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated"); |
178 | 178 | ||
179 | MODULE_ALIAS("crc32c"); | 179 | MODULE_ALIAS("crc32c"); |
180 | |||
181 | #include "crop_devid.c" | ||
diff --git a/arch/sparc/crypto/des_glue.c b/arch/sparc/crypto/des_glue.c index c4940c2d3073..41524cebcc49 100644 --- a/arch/sparc/crypto/des_glue.c +++ b/arch/sparc/crypto/des_glue.c | |||
@@ -527,3 +527,5 @@ MODULE_LICENSE("GPL"); | |||
527 | MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated"); | 527 | MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated"); |
528 | 528 | ||
529 | MODULE_ALIAS("des"); | 529 | MODULE_ALIAS("des"); |
530 | |||
531 | #include "crop_devid.c" | ||
diff --git a/arch/sparc/crypto/md5_glue.c b/arch/sparc/crypto/md5_glue.c index 603d723038ce..09a9ea1dfb69 100644 --- a/arch/sparc/crypto/md5_glue.c +++ b/arch/sparc/crypto/md5_glue.c | |||
@@ -186,3 +186,5 @@ MODULE_LICENSE("GPL"); | |||
186 | MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated"); | 186 | MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated"); |
187 | 187 | ||
188 | MODULE_ALIAS("md5"); | 188 | MODULE_ALIAS("md5"); |
189 | |||
190 | #include "crop_devid.c" | ||
diff --git a/arch/sparc/crypto/sha1_glue.c b/arch/sparc/crypto/sha1_glue.c index 2bbb20bee9f1..6cd5f29e1e0d 100644 --- a/arch/sparc/crypto/sha1_glue.c +++ b/arch/sparc/crypto/sha1_glue.c | |||
@@ -181,3 +181,5 @@ MODULE_LICENSE("GPL"); | |||
181 | MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated"); | 181 | MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated"); |
182 | 182 | ||
183 | MODULE_ALIAS("sha1"); | 183 | MODULE_ALIAS("sha1"); |
184 | |||
185 | #include "crop_devid.c" | ||
diff --git a/arch/sparc/crypto/sha256_glue.c b/arch/sparc/crypto/sha256_glue.c index 591e656bd891..04f555ab2680 100644 --- a/arch/sparc/crypto/sha256_glue.c +++ b/arch/sparc/crypto/sha256_glue.c | |||
@@ -239,3 +239,5 @@ MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, sparc64 sha256 op | |||
239 | 239 | ||
240 | MODULE_ALIAS("sha224"); | 240 | MODULE_ALIAS("sha224"); |
241 | MODULE_ALIAS("sha256"); | 241 | MODULE_ALIAS("sha256"); |
242 | |||
243 | #include "crop_devid.c" | ||
diff --git a/arch/sparc/crypto/sha512_glue.c b/arch/sparc/crypto/sha512_glue.c index 486f0a2b7001..f04d1994d19a 100644 --- a/arch/sparc/crypto/sha512_glue.c +++ b/arch/sparc/crypto/sha512_glue.c | |||
@@ -224,3 +224,5 @@ MODULE_DESCRIPTION("SHA-384 and SHA-512 Secure Hash Algorithm, sparc64 sha512 op | |||
224 | 224 | ||
225 | MODULE_ALIAS("sha384"); | 225 | MODULE_ALIAS("sha384"); |
226 | MODULE_ALIAS("sha512"); | 226 | MODULE_ALIAS("sha512"); |
227 | |||
228 | #include "crop_devid.c" | ||
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h index ce35a1cf1a20..be56a244c9cf 100644 --- a/arch/sparc/include/asm/atomic_64.h +++ b/arch/sparc/include/asm/atomic_64.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* atomic.h: Thankfully the V9 is at least reasonable for this | 1 | /* atomic.h: Thankfully the V9 is at least reasonable for this |
2 | * stuff. | 2 | * stuff. |
3 | * | 3 | * |
4 | * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) | 4 | * Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com) |
5 | */ | 5 | */ |
6 | 6 | ||
7 | #ifndef __ARCH_SPARC64_ATOMIC__ | 7 | #ifndef __ARCH_SPARC64_ATOMIC__ |
@@ -106,6 +106,8 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u) | |||
106 | 106 | ||
107 | #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) | 107 | #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) |
108 | 108 | ||
109 | extern long atomic64_dec_if_positive(atomic64_t *v); | ||
110 | |||
109 | /* Atomic operations are already serializing */ | 111 | /* Atomic operations are already serializing */ |
110 | #define smp_mb__before_atomic_dec() barrier() | 112 | #define smp_mb__before_atomic_dec() barrier() |
111 | #define smp_mb__after_atomic_dec() barrier() | 113 | #define smp_mb__after_atomic_dec() barrier() |
diff --git a/arch/sparc/include/asm/backoff.h b/arch/sparc/include/asm/backoff.h index db3af0d30fb1..4e02086b839c 100644 --- a/arch/sparc/include/asm/backoff.h +++ b/arch/sparc/include/asm/backoff.h | |||
@@ -1,6 +1,46 @@ | |||
1 | #ifndef _SPARC64_BACKOFF_H | 1 | #ifndef _SPARC64_BACKOFF_H |
2 | #define _SPARC64_BACKOFF_H | 2 | #define _SPARC64_BACKOFF_H |
3 | 3 | ||
4 | /* The macros in this file implement an exponential backoff facility | ||
5 | * for atomic operations. | ||
6 | * | ||
7 | * When multiple threads compete on an atomic operation, it is | ||
8 | * possible for one thread to be continually denied a successful | ||
9 | * completion of the compare-and-swap instruction. Heavily | ||
10 | * threaded cpu implementations like Niagara can compound this | ||
11 | * problem even further. | ||
12 | * | ||
13 | * When an atomic operation fails and needs to be retried, we spin a | ||
14 | * certain number of times. At each subsequent failure of the same | ||
15 | * operation we double the spin count, realizing an exponential | ||
16 | * backoff. | ||
17 | * | ||
18 | * When we spin, we try to use an operation that will cause the | ||
19 | * current cpu strand to block, and therefore make the core fully | ||
20 | * available to any other other runnable strands. There are two | ||
21 | * options, based upon cpu capabilities. | ||
22 | * | ||
23 | * On all cpus prior to SPARC-T4 we do three dummy reads of the | ||
24 | * condition code register. Each read blocks the strand for something | ||
25 | * between 40 and 50 cpu cycles. | ||
26 | * | ||
27 | * For SPARC-T4 and later we have a special "pause" instruction | ||
28 | * available. This is implemented using writes to register %asr27. | ||
29 | * The cpu will block the number of cycles written into the register, | ||
30 | * unless a disrupting trap happens first. SPARC-T4 specifically | ||
31 | * implements pause with a granularity of 8 cycles. Each strand has | ||
32 | * an internal pause counter which decrements every 8 cycles. So the | ||
33 | * chip shifts the %asr27 value down by 3 bits, and writes the result | ||
34 | * into the pause counter. If a value smaller than 8 is written, the | ||
35 | * chip blocks for 1 cycle. | ||
36 | * | ||
37 | * To achieve the same amount of backoff as the three %ccr reads give | ||
38 | * on earlier chips, we shift the backoff value up by 7 bits. (Three | ||
39 | * %ccr reads block for about 128 cycles, 1 << 7 == 128) We write the | ||
40 | * whole amount we want to block into the pause register, rather than | ||
41 | * loop writing 128 each time. | ||
42 | */ | ||
43 | |||
4 | #define BACKOFF_LIMIT (4 * 1024) | 44 | #define BACKOFF_LIMIT (4 * 1024) |
5 | 45 | ||
6 | #ifdef CONFIG_SMP | 46 | #ifdef CONFIG_SMP |
@@ -11,16 +51,25 @@ | |||
11 | #define BACKOFF_LABEL(spin_label, continue_label) \ | 51 | #define BACKOFF_LABEL(spin_label, continue_label) \ |
12 | spin_label | 52 | spin_label |
13 | 53 | ||
14 | #define BACKOFF_SPIN(reg, tmp, label) \ | 54 | #define BACKOFF_SPIN(reg, tmp, label) \ |
15 | mov reg, tmp; \ | 55 | mov reg, tmp; \ |
16 | 88: brnz,pt tmp, 88b; \ | 56 | 88: rd %ccr, %g0; \ |
17 | sub tmp, 1, tmp; \ | 57 | rd %ccr, %g0; \ |
18 | set BACKOFF_LIMIT, tmp; \ | 58 | rd %ccr, %g0; \ |
19 | cmp reg, tmp; \ | 59 | .section .pause_3insn_patch,"ax";\ |
20 | bg,pn %xcc, label; \ | 60 | .word 88b; \ |
21 | nop; \ | 61 | sllx tmp, 7, tmp; \ |
22 | ba,pt %xcc, label; \ | 62 | wr tmp, 0, %asr27; \ |
23 | sllx reg, 1, reg; | 63 | clr tmp; \ |
64 | .previous; \ | ||
65 | brnz,pt tmp, 88b; \ | ||
66 | sub tmp, 1, tmp; \ | ||
67 | set BACKOFF_LIMIT, tmp; \ | ||
68 | cmp reg, tmp; \ | ||
69 | bg,pn %xcc, label; \ | ||
70 | nop; \ | ||
71 | ba,pt %xcc, label; \ | ||
72 | sllx reg, 1, reg; | ||
24 | 73 | ||
25 | #else | 74 | #else |
26 | 75 | ||
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h index cef99fbc0a21..830502fe62b4 100644 --- a/arch/sparc/include/asm/compat.h +++ b/arch/sparc/include/asm/compat.h | |||
@@ -232,9 +232,10 @@ static inline void __user *arch_compat_alloc_user_space(long len) | |||
232 | struct pt_regs *regs = current_thread_info()->kregs; | 232 | struct pt_regs *regs = current_thread_info()->kregs; |
233 | unsigned long usp = regs->u_regs[UREG_I6]; | 233 | unsigned long usp = regs->u_regs[UREG_I6]; |
234 | 234 | ||
235 | if (!(test_thread_flag(TIF_32BIT))) | 235 | if (test_thread_64bit_stack(usp)) |
236 | usp += STACK_BIAS; | 236 | usp += STACK_BIAS; |
237 | else | 237 | |
238 | if (test_thread_flag(TIF_32BIT)) | ||
238 | usp &= 0xffffffffUL; | 239 | usp &= 0xffffffffUL; |
239 | 240 | ||
240 | usp -= len; | 241 | usp -= len; |
diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h index 4e5a483122a0..721e25f0e2ea 100644 --- a/arch/sparc/include/asm/processor_64.h +++ b/arch/sparc/include/asm/processor_64.h | |||
@@ -196,7 +196,22 @@ extern unsigned long get_wchan(struct task_struct *task); | |||
196 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) | 196 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) |
197 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) | 197 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) |
198 | 198 | ||
199 | #define cpu_relax() barrier() | 199 | /* Please see the commentary in asm/backoff.h for a description of |
200 | * what these instructions are doing and how they have been choosen. | ||
201 | * To make a long story short, we are trying to yield the current cpu | ||
202 | * strand during busy loops. | ||
203 | */ | ||
204 | #define cpu_relax() asm volatile("\n99:\n\t" \ | ||
205 | "rd %%ccr, %%g0\n\t" \ | ||
206 | "rd %%ccr, %%g0\n\t" \ | ||
207 | "rd %%ccr, %%g0\n\t" \ | ||
208 | ".section .pause_3insn_patch,\"ax\"\n\t"\ | ||
209 | ".word 99b\n\t" \ | ||
210 | "wr %%g0, 128, %%asr27\n\t" \ | ||
211 | "nop\n\t" \ | ||
212 | "nop\n\t" \ | ||
213 | ".previous" \ | ||
214 | ::: "memory") | ||
200 | 215 | ||
201 | /* Prefetch support. This is tuned for UltraSPARC-III and later. | 216 | /* Prefetch support. This is tuned for UltraSPARC-III and later. |
202 | * UltraSPARC-I will treat these as nops, and UltraSPARC-II has | 217 | * UltraSPARC-I will treat these as nops, and UltraSPARC-II has |
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h index c28765110706..f93003123bce 100644 --- a/arch/sparc/include/asm/prom.h +++ b/arch/sparc/include/asm/prom.h | |||
@@ -63,5 +63,10 @@ extern char *of_console_options; | |||
63 | extern void irq_trans_init(struct device_node *dp); | 63 | extern void irq_trans_init(struct device_node *dp); |
64 | extern char *build_path_component(struct device_node *dp); | 64 | extern char *build_path_component(struct device_node *dp); |
65 | 65 | ||
66 | /* SPARC has a local implementation */ | ||
67 | extern int of_address_to_resource(struct device_node *dev, int index, | ||
68 | struct resource *r); | ||
69 | #define of_address_to_resource of_address_to_resource | ||
70 | |||
66 | #endif /* __KERNEL__ */ | 71 | #endif /* __KERNEL__ */ |
67 | #endif /* _SPARC_PROM_H */ | 72 | #endif /* _SPARC_PROM_H */ |
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h index 4e2276631081..a3fe4dcc0aa6 100644 --- a/arch/sparc/include/asm/thread_info_64.h +++ b/arch/sparc/include/asm/thread_info_64.h | |||
@@ -259,6 +259,11 @@ static inline bool test_and_clear_restore_sigmask(void) | |||
259 | 259 | ||
260 | #define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG) | 260 | #define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG) |
261 | 261 | ||
262 | #define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0) | ||
263 | #define test_thread_64bit_stack(__SP) \ | ||
264 | ((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \ | ||
265 | false : true) | ||
266 | |||
262 | #endif /* !__ASSEMBLY__ */ | 267 | #endif /* !__ASSEMBLY__ */ |
263 | 268 | ||
264 | #endif /* __KERNEL__ */ | 269 | #endif /* __KERNEL__ */ |
diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h index 48f2807d3265..71b5a67522ab 100644 --- a/arch/sparc/include/asm/ttable.h +++ b/arch/sparc/include/asm/ttable.h | |||
@@ -372,7 +372,9 @@ etrap_spill_fixup_64bit: \ | |||
372 | 372 | ||
373 | /* Normal 32bit spill */ | 373 | /* Normal 32bit spill */ |
374 | #define SPILL_2_GENERIC(ASI) \ | 374 | #define SPILL_2_GENERIC(ASI) \ |
375 | srl %sp, 0, %sp; \ | 375 | and %sp, 1, %g3; \ |
376 | brnz,pn %g3, (. - (128 + 4)); \ | ||
377 | srl %sp, 0, %sp; \ | ||
376 | stwa %l0, [%sp + %g0] ASI; \ | 378 | stwa %l0, [%sp + %g0] ASI; \ |
377 | mov 0x04, %g3; \ | 379 | mov 0x04, %g3; \ |
378 | stwa %l1, [%sp + %g3] ASI; \ | 380 | stwa %l1, [%sp + %g3] ASI; \ |
@@ -398,14 +400,16 @@ etrap_spill_fixup_64bit: \ | |||
398 | stwa %i6, [%g1 + %g0] ASI; \ | 400 | stwa %i6, [%g1 + %g0] ASI; \ |
399 | stwa %i7, [%g1 + %g3] ASI; \ | 401 | stwa %i7, [%g1 + %g3] ASI; \ |
400 | saved; \ | 402 | saved; \ |
401 | retry; nop; nop; \ | 403 | retry; \ |
402 | b,a,pt %xcc, spill_fixup_dax; \ | 404 | b,a,pt %xcc, spill_fixup_dax; \ |
403 | b,a,pt %xcc, spill_fixup_mna; \ | 405 | b,a,pt %xcc, spill_fixup_mna; \ |
404 | b,a,pt %xcc, spill_fixup; | 406 | b,a,pt %xcc, spill_fixup; |
405 | 407 | ||
406 | #define SPILL_2_GENERIC_ETRAP \ | 408 | #define SPILL_2_GENERIC_ETRAP \ |
407 | etrap_user_spill_32bit: \ | 409 | etrap_user_spill_32bit: \ |
408 | srl %sp, 0, %sp; \ | 410 | and %sp, 1, %g3; \ |
411 | brnz,pn %g3, etrap_user_spill_64bit; \ | ||
412 | srl %sp, 0, %sp; \ | ||
409 | stwa %l0, [%sp + 0x00] %asi; \ | 413 | stwa %l0, [%sp + 0x00] %asi; \ |
410 | stwa %l1, [%sp + 0x04] %asi; \ | 414 | stwa %l1, [%sp + 0x04] %asi; \ |
411 | stwa %l2, [%sp + 0x08] %asi; \ | 415 | stwa %l2, [%sp + 0x08] %asi; \ |
@@ -427,7 +431,7 @@ etrap_user_spill_32bit: \ | |||
427 | ba,pt %xcc, etrap_save; \ | 431 | ba,pt %xcc, etrap_save; \ |
428 | wrpr %g1, %cwp; \ | 432 | wrpr %g1, %cwp; \ |
429 | nop; nop; nop; nop; \ | 433 | nop; nop; nop; nop; \ |
430 | nop; nop; nop; nop; \ | 434 | nop; nop; \ |
431 | ba,a,pt %xcc, etrap_spill_fixup_32bit; \ | 435 | ba,a,pt %xcc, etrap_spill_fixup_32bit; \ |
432 | ba,a,pt %xcc, etrap_spill_fixup_32bit; \ | 436 | ba,a,pt %xcc, etrap_spill_fixup_32bit; \ |
433 | ba,a,pt %xcc, etrap_spill_fixup_32bit; | 437 | ba,a,pt %xcc, etrap_spill_fixup_32bit; |
@@ -592,7 +596,9 @@ user_rtt_fill_64bit: \ | |||
592 | 596 | ||
593 | /* Normal 32bit fill */ | 597 | /* Normal 32bit fill */ |
594 | #define FILL_2_GENERIC(ASI) \ | 598 | #define FILL_2_GENERIC(ASI) \ |
595 | srl %sp, 0, %sp; \ | 599 | and %sp, 1, %g3; \ |
600 | brnz,pn %g3, (. - (128 + 4)); \ | ||
601 | srl %sp, 0, %sp; \ | ||
596 | lduwa [%sp + %g0] ASI, %l0; \ | 602 | lduwa [%sp + %g0] ASI, %l0; \ |
597 | mov 0x04, %g2; \ | 603 | mov 0x04, %g2; \ |
598 | mov 0x08, %g3; \ | 604 | mov 0x08, %g3; \ |
@@ -616,14 +622,16 @@ user_rtt_fill_64bit: \ | |||
616 | lduwa [%g1 + %g3] ASI, %i6; \ | 622 | lduwa [%g1 + %g3] ASI, %i6; \ |
617 | lduwa [%g1 + %g5] ASI, %i7; \ | 623 | lduwa [%g1 + %g5] ASI, %i7; \ |
618 | restored; \ | 624 | restored; \ |
619 | retry; nop; nop; nop; nop; \ | 625 | retry; nop; nop; \ |
620 | b,a,pt %xcc, fill_fixup_dax; \ | 626 | b,a,pt %xcc, fill_fixup_dax; \ |
621 | b,a,pt %xcc, fill_fixup_mna; \ | 627 | b,a,pt %xcc, fill_fixup_mna; \ |
622 | b,a,pt %xcc, fill_fixup; | 628 | b,a,pt %xcc, fill_fixup; |
623 | 629 | ||
624 | #define FILL_2_GENERIC_RTRAP \ | 630 | #define FILL_2_GENERIC_RTRAP \ |
625 | user_rtt_fill_32bit: \ | 631 | user_rtt_fill_32bit: \ |
626 | srl %sp, 0, %sp; \ | 632 | and %sp, 1, %g3; \ |
633 | brnz,pn %g3, user_rtt_fill_64bit; \ | ||
634 | srl %sp, 0, %sp; \ | ||
627 | lduwa [%sp + 0x00] %asi, %l0; \ | 635 | lduwa [%sp + 0x00] %asi, %l0; \ |
628 | lduwa [%sp + 0x04] %asi, %l1; \ | 636 | lduwa [%sp + 0x04] %asi, %l1; \ |
629 | lduwa [%sp + 0x08] %asi, %l2; \ | 637 | lduwa [%sp + 0x08] %asi, %l2; \ |
@@ -643,7 +651,7 @@ user_rtt_fill_32bit: \ | |||
643 | ba,pt %xcc, user_rtt_pre_restore; \ | 651 | ba,pt %xcc, user_rtt_pre_restore; \ |
644 | restored; \ | 652 | restored; \ |
645 | nop; nop; nop; nop; nop; \ | 653 | nop; nop; nop; nop; nop; \ |
646 | nop; nop; nop; nop; nop; \ | 654 | nop; nop; nop; \ |
647 | ba,a,pt %xcc, user_rtt_fill_fixup; \ | 655 | ba,a,pt %xcc, user_rtt_fill_fixup; \ |
648 | ba,a,pt %xcc, user_rtt_fill_fixup; \ | 656 | ba,a,pt %xcc, user_rtt_fill_fixup; \ |
649 | ba,a,pt %xcc, user_rtt_fill_fixup; | 657 | ba,a,pt %xcc, user_rtt_fill_fixup; |
diff --git a/arch/sparc/include/uapi/asm/unistd.h b/arch/sparc/include/uapi/asm/unistd.h index 8974ef7ae920..cac719d1bc5c 100644 --- a/arch/sparc/include/uapi/asm/unistd.h +++ b/arch/sparc/include/uapi/asm/unistd.h | |||
@@ -405,8 +405,13 @@ | |||
405 | #define __NR_setns 337 | 405 | #define __NR_setns 337 |
406 | #define __NR_process_vm_readv 338 | 406 | #define __NR_process_vm_readv 338 |
407 | #define __NR_process_vm_writev 339 | 407 | #define __NR_process_vm_writev 339 |
408 | #define __NR_kern_features 340 | ||
409 | #define __NR_kcmp 341 | ||
408 | 410 | ||
409 | #define NR_syscalls 340 | 411 | #define NR_syscalls 342 |
412 | |||
413 | /* Bitmask values returned from kern_features system call. */ | ||
414 | #define KERN_FEATURE_MIXED_MODE_STACK 0x00000001 | ||
410 | 415 | ||
411 | #ifdef __32bit_syscall_numbers__ | 416 | #ifdef __32bit_syscall_numbers__ |
412 | /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, | 417 | /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, |
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h index 0c218e4c0881..cc3c5cb47cda 100644 --- a/arch/sparc/kernel/entry.h +++ b/arch/sparc/kernel/entry.h | |||
@@ -59,6 +59,13 @@ struct popc_6insn_patch_entry { | |||
59 | extern struct popc_6insn_patch_entry __popc_6insn_patch, | 59 | extern struct popc_6insn_patch_entry __popc_6insn_patch, |
60 | __popc_6insn_patch_end; | 60 | __popc_6insn_patch_end; |
61 | 61 | ||
62 | struct pause_patch_entry { | ||
63 | unsigned int addr; | ||
64 | unsigned int insns[3]; | ||
65 | }; | ||
66 | extern struct pause_patch_entry __pause_3insn_patch, | ||
67 | __pause_3insn_patch_end; | ||
68 | |||
62 | extern void __init per_cpu_patch(void); | 69 | extern void __init per_cpu_patch(void); |
63 | extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *, | 70 | extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *, |
64 | struct sun4v_1insn_patch_entry *); | 71 | struct sun4v_1insn_patch_entry *); |
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c index f8b6eee40bde..87f60ee65433 100644 --- a/arch/sparc/kernel/leon_kernel.c +++ b/arch/sparc/kernel/leon_kernel.c | |||
@@ -56,11 +56,13 @@ static inline unsigned int leon_eirq_get(int cpu) | |||
56 | static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc) | 56 | static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc) |
57 | { | 57 | { |
58 | unsigned int eirq; | 58 | unsigned int eirq; |
59 | struct irq_bucket *p; | ||
59 | int cpu = sparc_leon3_cpuid(); | 60 | int cpu = sparc_leon3_cpuid(); |
60 | 61 | ||
61 | eirq = leon_eirq_get(cpu); | 62 | eirq = leon_eirq_get(cpu); |
62 | if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */ | 63 | p = irq_map[eirq]; |
63 | generic_handle_irq(irq_map[eirq]->irq); | 64 | if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */ |
65 | generic_handle_irq(p->irq); | ||
64 | } | 66 | } |
65 | 67 | ||
66 | /* The extended IRQ controller has been found, this function registers it */ | 68 | /* The extended IRQ controller has been found, this function registers it */ |
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index 885a8af74064..b5c38faa4ead 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c | |||
@@ -1762,15 +1762,25 @@ static void perf_callchain_user_32(struct perf_callchain_entry *entry, | |||
1762 | 1762 | ||
1763 | ufp = regs->u_regs[UREG_I6] & 0xffffffffUL; | 1763 | ufp = regs->u_regs[UREG_I6] & 0xffffffffUL; |
1764 | do { | 1764 | do { |
1765 | struct sparc_stackf32 *usf, sf; | ||
1766 | unsigned long pc; | 1765 | unsigned long pc; |
1767 | 1766 | ||
1768 | usf = (struct sparc_stackf32 *) ufp; | 1767 | if (thread32_stack_is_64bit(ufp)) { |
1769 | if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) | 1768 | struct sparc_stackf *usf, sf; |
1770 | break; | ||
1771 | 1769 | ||
1772 | pc = sf.callers_pc; | 1770 | ufp += STACK_BIAS; |
1773 | ufp = (unsigned long)sf.fp; | 1771 | usf = (struct sparc_stackf *) ufp; |
1772 | if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) | ||
1773 | break; | ||
1774 | pc = sf.callers_pc & 0xffffffff; | ||
1775 | ufp = ((unsigned long) sf.fp) & 0xffffffff; | ||
1776 | } else { | ||
1777 | struct sparc_stackf32 *usf, sf; | ||
1778 | usf = (struct sparc_stackf32 *) ufp; | ||
1779 | if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) | ||
1780 | break; | ||
1781 | pc = sf.callers_pc; | ||
1782 | ufp = (unsigned long)sf.fp; | ||
1783 | } | ||
1774 | perf_callchain_store(entry, pc); | 1784 | perf_callchain_store(entry, pc); |
1775 | } while (entry->nr < PERF_MAX_STACK_DEPTH); | 1785 | } while (entry->nr < PERF_MAX_STACK_DEPTH); |
1776 | } | 1786 | } |
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c index d778248ef3f8..c6e0c2910043 100644 --- a/arch/sparc/kernel/process_64.c +++ b/arch/sparc/kernel/process_64.c | |||
@@ -452,13 +452,16 @@ void flush_thread(void) | |||
452 | /* It's a bit more tricky when 64-bit tasks are involved... */ | 452 | /* It's a bit more tricky when 64-bit tasks are involved... */ |
453 | static unsigned long clone_stackframe(unsigned long csp, unsigned long psp) | 453 | static unsigned long clone_stackframe(unsigned long csp, unsigned long psp) |
454 | { | 454 | { |
455 | bool stack_64bit = test_thread_64bit_stack(psp); | ||
455 | unsigned long fp, distance, rval; | 456 | unsigned long fp, distance, rval; |
456 | 457 | ||
457 | if (!(test_thread_flag(TIF_32BIT))) { | 458 | if (stack_64bit) { |
458 | csp += STACK_BIAS; | 459 | csp += STACK_BIAS; |
459 | psp += STACK_BIAS; | 460 | psp += STACK_BIAS; |
460 | __get_user(fp, &(((struct reg_window __user *)psp)->ins[6])); | 461 | __get_user(fp, &(((struct reg_window __user *)psp)->ins[6])); |
461 | fp += STACK_BIAS; | 462 | fp += STACK_BIAS; |
463 | if (test_thread_flag(TIF_32BIT)) | ||
464 | fp &= 0xffffffff; | ||
462 | } else | 465 | } else |
463 | __get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6])); | 466 | __get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6])); |
464 | 467 | ||
@@ -472,7 +475,7 @@ static unsigned long clone_stackframe(unsigned long csp, unsigned long psp) | |||
472 | rval = (csp - distance); | 475 | rval = (csp - distance); |
473 | if (copy_in_user((void __user *) rval, (void __user *) psp, distance)) | 476 | if (copy_in_user((void __user *) rval, (void __user *) psp, distance)) |
474 | rval = 0; | 477 | rval = 0; |
475 | else if (test_thread_flag(TIF_32BIT)) { | 478 | else if (!stack_64bit) { |
476 | if (put_user(((u32)csp), | 479 | if (put_user(((u32)csp), |
477 | &(((struct reg_window32 __user *)rval)->ins[6]))) | 480 | &(((struct reg_window32 __user *)rval)->ins[6]))) |
478 | rval = 0; | 481 | rval = 0; |
@@ -507,18 +510,18 @@ void synchronize_user_stack(void) | |||
507 | 510 | ||
508 | flush_user_windows(); | 511 | flush_user_windows(); |
509 | if ((window = get_thread_wsaved()) != 0) { | 512 | if ((window = get_thread_wsaved()) != 0) { |
510 | int winsize = sizeof(struct reg_window); | ||
511 | int bias = 0; | ||
512 | |||
513 | if (test_thread_flag(TIF_32BIT)) | ||
514 | winsize = sizeof(struct reg_window32); | ||
515 | else | ||
516 | bias = STACK_BIAS; | ||
517 | |||
518 | window -= 1; | 513 | window -= 1; |
519 | do { | 514 | do { |
520 | unsigned long sp = (t->rwbuf_stkptrs[window] + bias); | ||
521 | struct reg_window *rwin = &t->reg_window[window]; | 515 | struct reg_window *rwin = &t->reg_window[window]; |
516 | int winsize = sizeof(struct reg_window); | ||
517 | unsigned long sp; | ||
518 | |||
519 | sp = t->rwbuf_stkptrs[window]; | ||
520 | |||
521 | if (test_thread_64bit_stack(sp)) | ||
522 | sp += STACK_BIAS; | ||
523 | else | ||
524 | winsize = sizeof(struct reg_window32); | ||
522 | 525 | ||
523 | if (!copy_to_user((char __user *)sp, rwin, winsize)) { | 526 | if (!copy_to_user((char __user *)sp, rwin, winsize)) { |
524 | shift_window_buffer(window, get_thread_wsaved() - 1, t); | 527 | shift_window_buffer(window, get_thread_wsaved() - 1, t); |
@@ -544,13 +547,6 @@ void fault_in_user_windows(void) | |||
544 | { | 547 | { |
545 | struct thread_info *t = current_thread_info(); | 548 | struct thread_info *t = current_thread_info(); |
546 | unsigned long window; | 549 | unsigned long window; |
547 | int winsize = sizeof(struct reg_window); | ||
548 | int bias = 0; | ||
549 | |||
550 | if (test_thread_flag(TIF_32BIT)) | ||
551 | winsize = sizeof(struct reg_window32); | ||
552 | else | ||
553 | bias = STACK_BIAS; | ||
554 | 550 | ||
555 | flush_user_windows(); | 551 | flush_user_windows(); |
556 | window = get_thread_wsaved(); | 552 | window = get_thread_wsaved(); |
@@ -558,8 +554,16 @@ void fault_in_user_windows(void) | |||
558 | if (likely(window != 0)) { | 554 | if (likely(window != 0)) { |
559 | window -= 1; | 555 | window -= 1; |
560 | do { | 556 | do { |
561 | unsigned long sp = (t->rwbuf_stkptrs[window] + bias); | ||
562 | struct reg_window *rwin = &t->reg_window[window]; | 557 | struct reg_window *rwin = &t->reg_window[window]; |
558 | int winsize = sizeof(struct reg_window); | ||
559 | unsigned long sp; | ||
560 | |||
561 | sp = t->rwbuf_stkptrs[window]; | ||
562 | |||
563 | if (test_thread_64bit_stack(sp)) | ||
564 | sp += STACK_BIAS; | ||
565 | else | ||
566 | winsize = sizeof(struct reg_window32); | ||
563 | 567 | ||
564 | if (unlikely(sp & 0x7UL)) | 568 | if (unlikely(sp & 0x7UL)) |
565 | stack_unaligned(sp); | 569 | stack_unaligned(sp); |
diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c index 484dabac7045..7ff45e4ba681 100644 --- a/arch/sparc/kernel/ptrace_64.c +++ b/arch/sparc/kernel/ptrace_64.c | |||
@@ -151,7 +151,7 @@ static int regwindow64_get(struct task_struct *target, | |||
151 | { | 151 | { |
152 | unsigned long rw_addr = regs->u_regs[UREG_I6]; | 152 | unsigned long rw_addr = regs->u_regs[UREG_I6]; |
153 | 153 | ||
154 | if (test_tsk_thread_flag(current, TIF_32BIT)) { | 154 | if (!test_thread_64bit_stack(rw_addr)) { |
155 | struct reg_window32 win32; | 155 | struct reg_window32 win32; |
156 | int i; | 156 | int i; |
157 | 157 | ||
@@ -176,7 +176,7 @@ static int regwindow64_set(struct task_struct *target, | |||
176 | { | 176 | { |
177 | unsigned long rw_addr = regs->u_regs[UREG_I6]; | 177 | unsigned long rw_addr = regs->u_regs[UREG_I6]; |
178 | 178 | ||
179 | if (test_tsk_thread_flag(current, TIF_32BIT)) { | 179 | if (!test_thread_64bit_stack(rw_addr)) { |
180 | struct reg_window32 win32; | 180 | struct reg_window32 win32; |
181 | int i; | 181 | int i; |
182 | 182 | ||
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c index 0800e71d8a88..0eaf0059aaef 100644 --- a/arch/sparc/kernel/setup_64.c +++ b/arch/sparc/kernel/setup_64.c | |||
@@ -316,6 +316,25 @@ static void __init popc_patch(void) | |||
316 | } | 316 | } |
317 | } | 317 | } |
318 | 318 | ||
319 | static void __init pause_patch(void) | ||
320 | { | ||
321 | struct pause_patch_entry *p; | ||
322 | |||
323 | p = &__pause_3insn_patch; | ||
324 | while (p < &__pause_3insn_patch_end) { | ||
325 | unsigned long i, addr = p->addr; | ||
326 | |||
327 | for (i = 0; i < 3; i++) { | ||
328 | *(unsigned int *) (addr + (i * 4)) = p->insns[i]; | ||
329 | wmb(); | ||
330 | __asm__ __volatile__("flush %0" | ||
331 | : : "r" (addr + (i * 4))); | ||
332 | } | ||
333 | |||
334 | p++; | ||
335 | } | ||
336 | } | ||
337 | |||
319 | #ifdef CONFIG_SMP | 338 | #ifdef CONFIG_SMP |
320 | void __init boot_cpu_id_too_large(int cpu) | 339 | void __init boot_cpu_id_too_large(int cpu) |
321 | { | 340 | { |
@@ -528,6 +547,8 @@ static void __init init_sparc64_elf_hwcap(void) | |||
528 | 547 | ||
529 | if (sparc64_elf_hwcap & AV_SPARC_POPC) | 548 | if (sparc64_elf_hwcap & AV_SPARC_POPC) |
530 | popc_patch(); | 549 | popc_patch(); |
550 | if (sparc64_elf_hwcap & AV_SPARC_PAUSE) | ||
551 | pause_patch(); | ||
531 | } | 552 | } |
532 | 553 | ||
533 | void __init setup_arch(char **cmdline_p) | 554 | void __init setup_arch(char **cmdline_p) |
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c index 11c6c9603e71..878ef3d5fec5 100644 --- a/arch/sparc/kernel/sys_sparc_64.c +++ b/arch/sparc/kernel/sys_sparc_64.c | |||
@@ -751,3 +751,8 @@ int kernel_execve(const char *filename, | |||
751 | : "cc"); | 751 | : "cc"); |
752 | return __res; | 752 | return __res; |
753 | } | 753 | } |
754 | |||
755 | asmlinkage long sys_kern_features(void) | ||
756 | { | ||
757 | return KERN_FEATURE_MIXED_MODE_STACK; | ||
758 | } | ||
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S index 63402f9e9f51..5147f574f125 100644 --- a/arch/sparc/kernel/systbls_32.S +++ b/arch/sparc/kernel/systbls_32.S | |||
@@ -85,3 +85,4 @@ sys_call_table: | |||
85 | /*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init | 85 | /*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init |
86 | /*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime | 86 | /*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime |
87 | /*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev | 87 | /*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev |
88 | /*340*/ .long sys_ni_syscall, sys_kcmp | ||
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S index 3a58e0d66f51..1c9af9fa38e9 100644 --- a/arch/sparc/kernel/systbls_64.S +++ b/arch/sparc/kernel/systbls_64.S | |||
@@ -86,6 +86,7 @@ sys_call_table32: | |||
86 | .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init | 86 | .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init |
87 | /*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime | 87 | /*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime |
88 | .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev | 88 | .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev |
89 | /*340*/ .word sys_kern_features, sys_kcmp | ||
89 | 90 | ||
90 | #endif /* CONFIG_COMPAT */ | 91 | #endif /* CONFIG_COMPAT */ |
91 | 92 | ||
@@ -163,3 +164,4 @@ sys_call_table: | |||
163 | .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init | 164 | .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init |
164 | /*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime | 165 | /*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime |
165 | .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev | 166 | .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev |
167 | /*340*/ .word sys_kern_features, sys_kcmp | ||
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c index f81d038f7340..8201c25e7669 100644 --- a/arch/sparc/kernel/unaligned_64.c +++ b/arch/sparc/kernel/unaligned_64.c | |||
@@ -113,21 +113,24 @@ static inline long sign_extend_imm13(long imm) | |||
113 | 113 | ||
114 | static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) | 114 | static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) |
115 | { | 115 | { |
116 | unsigned long value; | 116 | unsigned long value, fp; |
117 | 117 | ||
118 | if (reg < 16) | 118 | if (reg < 16) |
119 | return (!reg ? 0 : regs->u_regs[reg]); | 119 | return (!reg ? 0 : regs->u_regs[reg]); |
120 | |||
121 | fp = regs->u_regs[UREG_FP]; | ||
122 | |||
120 | if (regs->tstate & TSTATE_PRIV) { | 123 | if (regs->tstate & TSTATE_PRIV) { |
121 | struct reg_window *win; | 124 | struct reg_window *win; |
122 | win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); | 125 | win = (struct reg_window *)(fp + STACK_BIAS); |
123 | value = win->locals[reg - 16]; | 126 | value = win->locals[reg - 16]; |
124 | } else if (test_thread_flag(TIF_32BIT)) { | 127 | } else if (!test_thread_64bit_stack(fp)) { |
125 | struct reg_window32 __user *win32; | 128 | struct reg_window32 __user *win32; |
126 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); | 129 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); |
127 | get_user(value, &win32->locals[reg - 16]); | 130 | get_user(value, &win32->locals[reg - 16]); |
128 | } else { | 131 | } else { |
129 | struct reg_window __user *win; | 132 | struct reg_window __user *win; |
130 | win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); | 133 | win = (struct reg_window __user *)(fp + STACK_BIAS); |
131 | get_user(value, &win->locals[reg - 16]); | 134 | get_user(value, &win->locals[reg - 16]); |
132 | } | 135 | } |
133 | return value; | 136 | return value; |
@@ -135,19 +138,24 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) | |||
135 | 138 | ||
136 | static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs) | 139 | static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs) |
137 | { | 140 | { |
141 | unsigned long fp; | ||
142 | |||
138 | if (reg < 16) | 143 | if (reg < 16) |
139 | return ®s->u_regs[reg]; | 144 | return ®s->u_regs[reg]; |
145 | |||
146 | fp = regs->u_regs[UREG_FP]; | ||
147 | |||
140 | if (regs->tstate & TSTATE_PRIV) { | 148 | if (regs->tstate & TSTATE_PRIV) { |
141 | struct reg_window *win; | 149 | struct reg_window *win; |
142 | win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); | 150 | win = (struct reg_window *)(fp + STACK_BIAS); |
143 | return &win->locals[reg - 16]; | 151 | return &win->locals[reg - 16]; |
144 | } else if (test_thread_flag(TIF_32BIT)) { | 152 | } else if (!test_thread_64bit_stack(fp)) { |
145 | struct reg_window32 *win32; | 153 | struct reg_window32 *win32; |
146 | win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP])); | 154 | win32 = (struct reg_window32 *)((unsigned long)((u32)fp)); |
147 | return (unsigned long *)&win32->locals[reg - 16]; | 155 | return (unsigned long *)&win32->locals[reg - 16]; |
148 | } else { | 156 | } else { |
149 | struct reg_window *win; | 157 | struct reg_window *win; |
150 | win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); | 158 | win = (struct reg_window *)(fp + STACK_BIAS); |
151 | return &win->locals[reg - 16]; | 159 | return &win->locals[reg - 16]; |
152 | } | 160 | } |
153 | } | 161 | } |
@@ -392,13 +400,15 @@ int handle_popc(u32 insn, struct pt_regs *regs) | |||
392 | if (rd) | 400 | if (rd) |
393 | regs->u_regs[rd] = ret; | 401 | regs->u_regs[rd] = ret; |
394 | } else { | 402 | } else { |
395 | if (test_thread_flag(TIF_32BIT)) { | 403 | unsigned long fp = regs->u_regs[UREG_FP]; |
404 | |||
405 | if (!test_thread_64bit_stack(fp)) { | ||
396 | struct reg_window32 __user *win32; | 406 | struct reg_window32 __user *win32; |
397 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); | 407 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); |
398 | put_user(ret, &win32->locals[rd - 16]); | 408 | put_user(ret, &win32->locals[rd - 16]); |
399 | } else { | 409 | } else { |
400 | struct reg_window __user *win; | 410 | struct reg_window __user *win; |
401 | win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); | 411 | win = (struct reg_window __user *)(fp + STACK_BIAS); |
402 | put_user(ret, &win->locals[rd - 16]); | 412 | put_user(ret, &win->locals[rd - 16]); |
403 | } | 413 | } |
404 | } | 414 | } |
@@ -554,7 +564,7 @@ void handle_ld_nf(u32 insn, struct pt_regs *regs) | |||
554 | reg[0] = 0; | 564 | reg[0] = 0; |
555 | if ((insn & 0x780000) == 0x180000) | 565 | if ((insn & 0x780000) == 0x180000) |
556 | reg[1] = 0; | 566 | reg[1] = 0; |
557 | } else if (test_thread_flag(TIF_32BIT)) { | 567 | } else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) { |
558 | put_user(0, (int __user *) reg); | 568 | put_user(0, (int __user *) reg); |
559 | if ((insn & 0x780000) == 0x180000) | 569 | if ((insn & 0x780000) == 0x180000) |
560 | put_user(0, ((int __user *) reg) + 1); | 570 | put_user(0, ((int __user *) reg) + 1); |
diff --git a/arch/sparc/kernel/visemul.c b/arch/sparc/kernel/visemul.c index 08e074b7eb6a..c096c624ac4d 100644 --- a/arch/sparc/kernel/visemul.c +++ b/arch/sparc/kernel/visemul.c | |||
@@ -149,21 +149,24 @@ static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2, | |||
149 | 149 | ||
150 | static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) | 150 | static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) |
151 | { | 151 | { |
152 | unsigned long value; | 152 | unsigned long value, fp; |
153 | 153 | ||
154 | if (reg < 16) | 154 | if (reg < 16) |
155 | return (!reg ? 0 : regs->u_regs[reg]); | 155 | return (!reg ? 0 : regs->u_regs[reg]); |
156 | |||
157 | fp = regs->u_regs[UREG_FP]; | ||
158 | |||
156 | if (regs->tstate & TSTATE_PRIV) { | 159 | if (regs->tstate & TSTATE_PRIV) { |
157 | struct reg_window *win; | 160 | struct reg_window *win; |
158 | win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); | 161 | win = (struct reg_window *)(fp + STACK_BIAS); |
159 | value = win->locals[reg - 16]; | 162 | value = win->locals[reg - 16]; |
160 | } else if (test_thread_flag(TIF_32BIT)) { | 163 | } else if (!test_thread_64bit_stack(fp)) { |
161 | struct reg_window32 __user *win32; | 164 | struct reg_window32 __user *win32; |
162 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); | 165 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); |
163 | get_user(value, &win32->locals[reg - 16]); | 166 | get_user(value, &win32->locals[reg - 16]); |
164 | } else { | 167 | } else { |
165 | struct reg_window __user *win; | 168 | struct reg_window __user *win; |
166 | win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); | 169 | win = (struct reg_window __user *)(fp + STACK_BIAS); |
167 | get_user(value, &win->locals[reg - 16]); | 170 | get_user(value, &win->locals[reg - 16]); |
168 | } | 171 | } |
169 | return value; | 172 | return value; |
@@ -172,16 +175,18 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) | |||
172 | static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg, | 175 | static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg, |
173 | struct pt_regs *regs) | 176 | struct pt_regs *regs) |
174 | { | 177 | { |
178 | unsigned long fp = regs->u_regs[UREG_FP]; | ||
179 | |||
175 | BUG_ON(reg < 16); | 180 | BUG_ON(reg < 16); |
176 | BUG_ON(regs->tstate & TSTATE_PRIV); | 181 | BUG_ON(regs->tstate & TSTATE_PRIV); |
177 | 182 | ||
178 | if (test_thread_flag(TIF_32BIT)) { | 183 | if (!test_thread_64bit_stack(fp)) { |
179 | struct reg_window32 __user *win32; | 184 | struct reg_window32 __user *win32; |
180 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); | 185 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); |
181 | return (unsigned long __user *)&win32->locals[reg - 16]; | 186 | return (unsigned long __user *)&win32->locals[reg - 16]; |
182 | } else { | 187 | } else { |
183 | struct reg_window __user *win; | 188 | struct reg_window __user *win; |
184 | win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); | 189 | win = (struct reg_window __user *)(fp + STACK_BIAS); |
185 | return &win->locals[reg - 16]; | 190 | return &win->locals[reg - 16]; |
186 | } | 191 | } |
187 | } | 192 | } |
@@ -204,7 +209,7 @@ static void store_reg(struct pt_regs *regs, unsigned long val, unsigned long rd) | |||
204 | } else { | 209 | } else { |
205 | unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs); | 210 | unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs); |
206 | 211 | ||
207 | if (test_thread_flag(TIF_32BIT)) | 212 | if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) |
208 | __put_user((u32)val, (u32 __user *)rd_user); | 213 | __put_user((u32)val, (u32 __user *)rd_user); |
209 | else | 214 | else |
210 | __put_user(val, rd_user); | 215 | __put_user(val, rd_user); |
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S index 89c2c29f154b..0bacceb19150 100644 --- a/arch/sparc/kernel/vmlinux.lds.S +++ b/arch/sparc/kernel/vmlinux.lds.S | |||
@@ -132,6 +132,11 @@ SECTIONS | |||
132 | *(.popc_6insn_patch) | 132 | *(.popc_6insn_patch) |
133 | __popc_6insn_patch_end = .; | 133 | __popc_6insn_patch_end = .; |
134 | } | 134 | } |
135 | .pause_3insn_patch : { | ||
136 | __pause_3insn_patch = .; | ||
137 | *(.pause_3insn_patch) | ||
138 | __pause_3insn_patch_end = .; | ||
139 | } | ||
135 | PERCPU_SECTION(SMP_CACHE_BYTES) | 140 | PERCPU_SECTION(SMP_CACHE_BYTES) |
136 | 141 | ||
137 | . = ALIGN(PAGE_SIZE); | 142 | . = ALIGN(PAGE_SIZE); |
diff --git a/arch/sparc/kernel/winfixup.S b/arch/sparc/kernel/winfixup.S index a6b0863c27df..1e67ce958369 100644 --- a/arch/sparc/kernel/winfixup.S +++ b/arch/sparc/kernel/winfixup.S | |||
@@ -43,6 +43,8 @@ spill_fixup_mna: | |||
43 | spill_fixup_dax: | 43 | spill_fixup_dax: |
44 | TRAP_LOAD_THREAD_REG(%g6, %g1) | 44 | TRAP_LOAD_THREAD_REG(%g6, %g1) |
45 | ldx [%g6 + TI_FLAGS], %g1 | 45 | ldx [%g6 + TI_FLAGS], %g1 |
46 | andcc %sp, 0x1, %g0 | ||
47 | movne %icc, 0, %g1 | ||
46 | andcc %g1, _TIF_32BIT, %g0 | 48 | andcc %g1, _TIF_32BIT, %g0 |
47 | ldub [%g6 + TI_WSAVED], %g1 | 49 | ldub [%g6 + TI_WSAVED], %g1 |
48 | sll %g1, 3, %g3 | 50 | sll %g1, 3, %g3 |
diff --git a/arch/sparc/lib/atomic_64.S b/arch/sparc/lib/atomic_64.S index 4d502da3de78..85c233d0a340 100644 --- a/arch/sparc/lib/atomic_64.S +++ b/arch/sparc/lib/atomic_64.S | |||
@@ -1,6 +1,6 @@ | |||
1 | /* atomic.S: These things are too big to do inline. | 1 | /* atomic.S: These things are too big to do inline. |
2 | * | 2 | * |
3 | * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net) | 3 | * Copyright (C) 1999, 2007 2012 David S. Miller (davem@davemloft.net) |
4 | */ | 4 | */ |
5 | 5 | ||
6 | #include <linux/linkage.h> | 6 | #include <linux/linkage.h> |
@@ -117,3 +117,17 @@ ENTRY(atomic64_sub_ret) /* %o0 = decrement, %o1 = atomic_ptr */ | |||
117 | sub %g1, %o0, %o0 | 117 | sub %g1, %o0, %o0 |
118 | 2: BACKOFF_SPIN(%o2, %o3, 1b) | 118 | 2: BACKOFF_SPIN(%o2, %o3, 1b) |
119 | ENDPROC(atomic64_sub_ret) | 119 | ENDPROC(atomic64_sub_ret) |
120 | |||
121 | ENTRY(atomic64_dec_if_positive) /* %o0 = atomic_ptr */ | ||
122 | BACKOFF_SETUP(%o2) | ||
123 | 1: ldx [%o0], %g1 | ||
124 | brlez,pn %g1, 3f | ||
125 | sub %g1, 1, %g7 | ||
126 | casx [%o0], %g1, %g7 | ||
127 | cmp %g1, %g7 | ||
128 | bne,pn %xcc, BACKOFF_LABEL(2f, 1b) | ||
129 | nop | ||
130 | 3: retl | ||
131 | sub %g1, 1, %o0 | ||
132 | 2: BACKOFF_SPIN(%o2, %o3, 1b) | ||
133 | ENDPROC(atomic64_dec_if_positive) | ||
diff --git a/arch/sparc/lib/ksyms.c b/arch/sparc/lib/ksyms.c index ee31b884c61b..0c4e35e522fa 100644 --- a/arch/sparc/lib/ksyms.c +++ b/arch/sparc/lib/ksyms.c | |||
@@ -116,6 +116,7 @@ EXPORT_SYMBOL(atomic64_add); | |||
116 | EXPORT_SYMBOL(atomic64_add_ret); | 116 | EXPORT_SYMBOL(atomic64_add_ret); |
117 | EXPORT_SYMBOL(atomic64_sub); | 117 | EXPORT_SYMBOL(atomic64_sub); |
118 | EXPORT_SYMBOL(atomic64_sub_ret); | 118 | EXPORT_SYMBOL(atomic64_sub_ret); |
119 | EXPORT_SYMBOL(atomic64_dec_if_positive); | ||
119 | 120 | ||
120 | /* Atomic bit operations. */ | 121 | /* Atomic bit operations. */ |
121 | EXPORT_SYMBOL(test_and_set_bit); | 122 | EXPORT_SYMBOL(test_and_set_bit); |
diff --git a/arch/sparc/math-emu/math_64.c b/arch/sparc/math-emu/math_64.c index 1704068da928..034aadbff036 100644 --- a/arch/sparc/math-emu/math_64.c +++ b/arch/sparc/math-emu/math_64.c | |||
@@ -320,7 +320,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap) | |||
320 | XR = 0; | 320 | XR = 0; |
321 | else if (freg < 16) | 321 | else if (freg < 16) |
322 | XR = regs->u_regs[freg]; | 322 | XR = regs->u_regs[freg]; |
323 | else if (test_thread_flag(TIF_32BIT)) { | 323 | else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) { |
324 | struct reg_window32 __user *win32; | 324 | struct reg_window32 __user *win32; |
325 | flushw_user (); | 325 | flushw_user (); |
326 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); | 326 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); |
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h index 59c226d120cd..c20d1ce62dc6 100644 --- a/arch/x86/include/asm/xen/hypercall.h +++ b/arch/x86/include/asm/xen/hypercall.h | |||
@@ -359,18 +359,14 @@ HYPERVISOR_update_va_mapping(unsigned long va, pte_t new_val, | |||
359 | return _hypercall4(int, update_va_mapping, va, | 359 | return _hypercall4(int, update_va_mapping, va, |
360 | new_val.pte, new_val.pte >> 32, flags); | 360 | new_val.pte, new_val.pte >> 32, flags); |
361 | } | 361 | } |
362 | extern int __must_check xen_event_channel_op_compat(int, void *); | ||
362 | 363 | ||
363 | static inline int | 364 | static inline int |
364 | HYPERVISOR_event_channel_op(int cmd, void *arg) | 365 | HYPERVISOR_event_channel_op(int cmd, void *arg) |
365 | { | 366 | { |
366 | int rc = _hypercall2(int, event_channel_op, cmd, arg); | 367 | int rc = _hypercall2(int, event_channel_op, cmd, arg); |
367 | if (unlikely(rc == -ENOSYS)) { | 368 | if (unlikely(rc == -ENOSYS)) |
368 | struct evtchn_op op; | 369 | rc = xen_event_channel_op_compat(cmd, arg); |
369 | op.cmd = cmd; | ||
370 | memcpy(&op.u, arg, sizeof(op.u)); | ||
371 | rc = _hypercall1(int, event_channel_op_compat, &op); | ||
372 | memcpy(arg, &op.u, sizeof(op.u)); | ||
373 | } | ||
374 | return rc; | 370 | return rc; |
375 | } | 371 | } |
376 | 372 | ||
@@ -386,17 +382,14 @@ HYPERVISOR_console_io(int cmd, int count, char *str) | |||
386 | return _hypercall3(int, console_io, cmd, count, str); | 382 | return _hypercall3(int, console_io, cmd, count, str); |
387 | } | 383 | } |
388 | 384 | ||
385 | extern int __must_check HYPERVISOR_physdev_op_compat(int, void *); | ||
386 | |||
389 | static inline int | 387 | static inline int |
390 | HYPERVISOR_physdev_op(int cmd, void *arg) | 388 | HYPERVISOR_physdev_op(int cmd, void *arg) |
391 | { | 389 | { |
392 | int rc = _hypercall2(int, physdev_op, cmd, arg); | 390 | int rc = _hypercall2(int, physdev_op, cmd, arg); |
393 | if (unlikely(rc == -ENOSYS)) { | 391 | if (unlikely(rc == -ENOSYS)) |
394 | struct physdev_op op; | 392 | rc = HYPERVISOR_physdev_op_compat(cmd, arg); |
395 | op.cmd = cmd; | ||
396 | memcpy(&op.u, arg, sizeof(op.u)); | ||
397 | rc = _hypercall1(int, physdev_op_compat, &op); | ||
398 | memcpy(arg, &op.u, sizeof(op.u)); | ||
399 | } | ||
400 | return rc; | 393 | return rc; |
401 | } | 394 | } |
402 | 395 | ||
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h index 66d0fff1ee84..125f344f06a9 100644 --- a/arch/x86/include/asm/xen/hypervisor.h +++ b/arch/x86/include/asm/xen/hypervisor.h | |||
@@ -33,7 +33,6 @@ | |||
33 | #ifndef _ASM_X86_XEN_HYPERVISOR_H | 33 | #ifndef _ASM_X86_XEN_HYPERVISOR_H |
34 | #define _ASM_X86_XEN_HYPERVISOR_H | 34 | #define _ASM_X86_XEN_HYPERVISOR_H |
35 | 35 | ||
36 | /* arch/i386/kernel/setup.c */ | ||
37 | extern struct shared_info *HYPERVISOR_shared_info; | 36 | extern struct shared_info *HYPERVISOR_shared_info; |
38 | extern struct start_info *xen_start_info; | 37 | extern struct start_info *xen_start_info; |
39 | 38 | ||
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 1eefebe5d727..224a7e78cb6c 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c | |||
@@ -3779,7 +3779,7 @@ static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, | |||
3779 | { | 3779 | { |
3780 | struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0]; | 3780 | struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0]; |
3781 | 3781 | ||
3782 | memcpy(vcpu->run->mmio.data, frag->data, frag->len); | 3782 | memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len)); |
3783 | return X86EMUL_CONTINUE; | 3783 | return X86EMUL_CONTINUE; |
3784 | } | 3784 | } |
3785 | 3785 | ||
@@ -3832,18 +3832,11 @@ mmio: | |||
3832 | bytes -= handled; | 3832 | bytes -= handled; |
3833 | val += handled; | 3833 | val += handled; |
3834 | 3834 | ||
3835 | while (bytes) { | 3835 | WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS); |
3836 | unsigned now = min(bytes, 8U); | 3836 | frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++]; |
3837 | 3837 | frag->gpa = gpa; | |
3838 | frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++]; | 3838 | frag->data = val; |
3839 | frag->gpa = gpa; | 3839 | frag->len = bytes; |
3840 | frag->data = val; | ||
3841 | frag->len = now; | ||
3842 | |||
3843 | gpa += now; | ||
3844 | val += now; | ||
3845 | bytes -= now; | ||
3846 | } | ||
3847 | return X86EMUL_CONTINUE; | 3840 | return X86EMUL_CONTINUE; |
3848 | } | 3841 | } |
3849 | 3842 | ||
@@ -3890,7 +3883,7 @@ int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr, | |||
3890 | vcpu->mmio_needed = 1; | 3883 | vcpu->mmio_needed = 1; |
3891 | vcpu->mmio_cur_fragment = 0; | 3884 | vcpu->mmio_cur_fragment = 0; |
3892 | 3885 | ||
3893 | vcpu->run->mmio.len = vcpu->mmio_fragments[0].len; | 3886 | vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len); |
3894 | vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write; | 3887 | vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write; |
3895 | vcpu->run->exit_reason = KVM_EXIT_MMIO; | 3888 | vcpu->run->exit_reason = KVM_EXIT_MMIO; |
3896 | vcpu->run->mmio.phys_addr = gpa; | 3889 | vcpu->run->mmio.phys_addr = gpa; |
@@ -5522,28 +5515,44 @@ static int complete_emulated_pio(struct kvm_vcpu *vcpu) | |||
5522 | * | 5515 | * |
5523 | * read: | 5516 | * read: |
5524 | * for each fragment | 5517 | * for each fragment |
5525 | * write gpa, len | 5518 | * for each mmio piece in the fragment |
5526 | * exit | 5519 | * write gpa, len |
5527 | * copy data | 5520 | * exit |
5521 | * copy data | ||
5528 | * execute insn | 5522 | * execute insn |
5529 | * | 5523 | * |
5530 | * write: | 5524 | * write: |
5531 | * for each fragment | 5525 | * for each fragment |
5532 | * write gpa, len | 5526 | * for each mmio piece in the fragment |
5533 | * copy data | 5527 | * write gpa, len |
5534 | * exit | 5528 | * copy data |
5529 | * exit | ||
5535 | */ | 5530 | */ |
5536 | static int complete_emulated_mmio(struct kvm_vcpu *vcpu) | 5531 | static int complete_emulated_mmio(struct kvm_vcpu *vcpu) |
5537 | { | 5532 | { |
5538 | struct kvm_run *run = vcpu->run; | 5533 | struct kvm_run *run = vcpu->run; |
5539 | struct kvm_mmio_fragment *frag; | 5534 | struct kvm_mmio_fragment *frag; |
5535 | unsigned len; | ||
5540 | 5536 | ||
5541 | BUG_ON(!vcpu->mmio_needed); | 5537 | BUG_ON(!vcpu->mmio_needed); |
5542 | 5538 | ||
5543 | /* Complete previous fragment */ | 5539 | /* Complete previous fragment */ |
5544 | frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment++]; | 5540 | frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment]; |
5541 | len = min(8u, frag->len); | ||
5545 | if (!vcpu->mmio_is_write) | 5542 | if (!vcpu->mmio_is_write) |
5546 | memcpy(frag->data, run->mmio.data, frag->len); | 5543 | memcpy(frag->data, run->mmio.data, len); |
5544 | |||
5545 | if (frag->len <= 8) { | ||
5546 | /* Switch to the next fragment. */ | ||
5547 | frag++; | ||
5548 | vcpu->mmio_cur_fragment++; | ||
5549 | } else { | ||
5550 | /* Go forward to the next mmio piece. */ | ||
5551 | frag->data += len; | ||
5552 | frag->gpa += len; | ||
5553 | frag->len -= len; | ||
5554 | } | ||
5555 | |||
5547 | if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) { | 5556 | if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) { |
5548 | vcpu->mmio_needed = 0; | 5557 | vcpu->mmio_needed = 0; |
5549 | if (vcpu->mmio_is_write) | 5558 | if (vcpu->mmio_is_write) |
@@ -5551,13 +5560,12 @@ static int complete_emulated_mmio(struct kvm_vcpu *vcpu) | |||
5551 | vcpu->mmio_read_completed = 1; | 5560 | vcpu->mmio_read_completed = 1; |
5552 | return complete_emulated_io(vcpu); | 5561 | return complete_emulated_io(vcpu); |
5553 | } | 5562 | } |
5554 | /* Initiate next fragment */ | 5563 | |
5555 | ++frag; | ||
5556 | run->exit_reason = KVM_EXIT_MMIO; | 5564 | run->exit_reason = KVM_EXIT_MMIO; |
5557 | run->mmio.phys_addr = frag->gpa; | 5565 | run->mmio.phys_addr = frag->gpa; |
5558 | if (vcpu->mmio_is_write) | 5566 | if (vcpu->mmio_is_write) |
5559 | memcpy(run->mmio.data, frag->data, frag->len); | 5567 | memcpy(run->mmio.data, frag->data, min(8u, frag->len)); |
5560 | run->mmio.len = frag->len; | 5568 | run->mmio.len = min(8u, frag->len); |
5561 | run->mmio.is_write = vcpu->mmio_is_write; | 5569 | run->mmio.is_write = vcpu->mmio_is_write; |
5562 | vcpu->arch.complete_userspace_io = complete_emulated_mmio; | 5570 | vcpu->arch.complete_userspace_io = complete_emulated_mmio; |
5563 | return 0; | 5571 | return 0; |
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index 6226c99729b9..dcf5f2dd91ec 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c | |||
@@ -1288,6 +1288,25 @@ unsigned long xen_read_cr2_direct(void) | |||
1288 | return this_cpu_read(xen_vcpu_info.arch.cr2); | 1288 | return this_cpu_read(xen_vcpu_info.arch.cr2); |
1289 | } | 1289 | } |
1290 | 1290 | ||
1291 | void xen_flush_tlb_all(void) | ||
1292 | { | ||
1293 | struct mmuext_op *op; | ||
1294 | struct multicall_space mcs; | ||
1295 | |||
1296 | trace_xen_mmu_flush_tlb_all(0); | ||
1297 | |||
1298 | preempt_disable(); | ||
1299 | |||
1300 | mcs = xen_mc_entry(sizeof(*op)); | ||
1301 | |||
1302 | op = mcs.args; | ||
1303 | op->cmd = MMUEXT_TLB_FLUSH_ALL; | ||
1304 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | ||
1305 | |||
1306 | xen_mc_issue(PARAVIRT_LAZY_MMU); | ||
1307 | |||
1308 | preempt_enable(); | ||
1309 | } | ||
1291 | static void xen_flush_tlb(void) | 1310 | static void xen_flush_tlb(void) |
1292 | { | 1311 | { |
1293 | struct mmuext_op *op; | 1312 | struct mmuext_op *op; |
@@ -2518,7 +2537,7 @@ int xen_remap_domain_mfn_range(struct vm_area_struct *vma, | |||
2518 | err = 0; | 2537 | err = 0; |
2519 | out: | 2538 | out: |
2520 | 2539 | ||
2521 | flush_tlb_all(); | 2540 | xen_flush_tlb_all(); |
2522 | 2541 | ||
2523 | return err; | 2542 | return err; |
2524 | } | 2543 | } |
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index cdcb48adee4c..0d1f36a22c98 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig | |||
@@ -13,6 +13,8 @@ config XTENSA | |||
13 | select GENERIC_CPU_DEVICES | 13 | select GENERIC_CPU_DEVICES |
14 | select MODULES_USE_ELF_RELA | 14 | select MODULES_USE_ELF_RELA |
15 | select GENERIC_PCI_IOMAP | 15 | select GENERIC_PCI_IOMAP |
16 | select GENERIC_KERNEL_THREAD | ||
17 | select GENERIC_KERNEL_EXECVE | ||
16 | select ARCH_WANT_OPTIONAL_GPIOLIB | 18 | select ARCH_WANT_OPTIONAL_GPIOLIB |
17 | help | 19 | help |
18 | Xtensa processors are 32-bit RISC machines designed by Tensilica | 20 | Xtensa processors are 32-bit RISC machines designed by Tensilica |
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h index e6be5b9091c2..700c2e6f2d25 100644 --- a/arch/xtensa/include/asm/io.h +++ b/arch/xtensa/include/asm/io.h | |||
@@ -62,6 +62,10 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size) | |||
62 | static inline void iounmap(volatile void __iomem *addr) | 62 | static inline void iounmap(volatile void __iomem *addr) |
63 | { | 63 | { |
64 | } | 64 | } |
65 | |||
66 | #define virt_to_bus virt_to_phys | ||
67 | #define bus_to_virt phys_to_virt | ||
68 | |||
65 | #endif /* CONFIG_MMU */ | 69 | #endif /* CONFIG_MMU */ |
66 | 70 | ||
67 | /* | 71 | /* |
diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h index 5c371d8d4528..2d630e7399ca 100644 --- a/arch/xtensa/include/asm/processor.h +++ b/arch/xtensa/include/asm/processor.h | |||
@@ -152,6 +152,7 @@ struct thread_struct { | |||
152 | 152 | ||
153 | /* Clearing a0 terminates the backtrace. */ | 153 | /* Clearing a0 terminates the backtrace. */ |
154 | #define start_thread(regs, new_pc, new_sp) \ | 154 | #define start_thread(regs, new_pc, new_sp) \ |
155 | memset(regs, 0, sizeof(*regs)); \ | ||
155 | regs->pc = new_pc; \ | 156 | regs->pc = new_pc; \ |
156 | regs->ps = USER_PS_VALUE; \ | 157 | regs->ps = USER_PS_VALUE; \ |
157 | regs->areg[1] = new_sp; \ | 158 | regs->areg[1] = new_sp; \ |
@@ -168,9 +169,6 @@ struct mm_struct; | |||
168 | /* Free all resources held by a thread. */ | 169 | /* Free all resources held by a thread. */ |
169 | #define release_thread(thread) do { } while(0) | 170 | #define release_thread(thread) do { } while(0) |
170 | 171 | ||
171 | /* Create a kernel thread without removing it from tasklists */ | ||
172 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | ||
173 | |||
174 | /* Copy and release all segment info associated with a VM */ | 172 | /* Copy and release all segment info associated with a VM */ |
175 | #define copy_segments(p, mm) do { } while(0) | 173 | #define copy_segments(p, mm) do { } while(0) |
176 | #define release_segments(mm) do { } while(0) | 174 | #define release_segments(mm) do { } while(0) |
diff --git a/arch/xtensa/include/asm/syscall.h b/arch/xtensa/include/asm/syscall.h index c1dacca312f3..124aeee0d381 100644 --- a/arch/xtensa/include/asm/syscall.h +++ b/arch/xtensa/include/asm/syscall.h | |||
@@ -10,7 +10,7 @@ | |||
10 | 10 | ||
11 | struct pt_regs; | 11 | struct pt_regs; |
12 | struct sigaction; | 12 | struct sigaction; |
13 | asmlinkage long xtensa_execve(char*, char**, char**, struct pt_regs*); | 13 | asmlinkage long sys_execve(char*, char**, char**, struct pt_regs*); |
14 | asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*); | 14 | asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*); |
15 | asmlinkage long xtensa_ptrace(long, long, long, long); | 15 | asmlinkage long xtensa_ptrace(long, long, long, long); |
16 | asmlinkage long xtensa_sigreturn(struct pt_regs*); | 16 | asmlinkage long xtensa_sigreturn(struct pt_regs*); |
diff --git a/arch/xtensa/include/asm/unistd.h b/arch/xtensa/include/asm/unistd.h index 9ef1c31d2c83..f4e6eaa40d1c 100644 --- a/arch/xtensa/include/asm/unistd.h +++ b/arch/xtensa/include/asm/unistd.h | |||
@@ -1,16 +1,9 @@ | |||
1 | /* | 1 | #ifndef _XTENSA_UNISTD_H |
2 | * include/asm-xtensa/unistd.h | 2 | #define _XTENSA_UNISTD_H |
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 2001 - 2005 Tensilica Inc. | ||
9 | */ | ||
10 | 3 | ||
4 | #define __ARCH_WANT_SYS_EXECVE | ||
11 | #include <uapi/asm/unistd.h> | 5 | #include <uapi/asm/unistd.h> |
12 | 6 | ||
13 | |||
14 | /* | 7 | /* |
15 | * "Conditional" syscalls | 8 | * "Conditional" syscalls |
16 | * | 9 | * |
@@ -37,3 +30,5 @@ | |||
37 | #define __IGNORE_mmap /* use mmap2 */ | 30 | #define __IGNORE_mmap /* use mmap2 */ |
38 | #define __IGNORE_vfork /* use clone */ | 31 | #define __IGNORE_vfork /* use clone */ |
39 | #define __IGNORE_fadvise64 /* use fadvise64_64 */ | 32 | #define __IGNORE_fadvise64 /* use fadvise64_64 */ |
33 | |||
34 | #endif /* _XTENSA_UNISTD_H */ | ||
diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h index 479abaea5aae..9f36d0e3e0ac 100644 --- a/arch/xtensa/include/uapi/asm/unistd.h +++ b/arch/xtensa/include/uapi/asm/unistd.h | |||
@@ -1,14 +1,4 @@ | |||
1 | /* | 1 | #if !defined(_UAPI_XTENSA_UNISTD_H) || defined(__SYSCALL) |
2 | * include/asm-xtensa/unistd.h | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 2001 - 2012 Tensilica Inc. | ||
9 | */ | ||
10 | |||
11 | #ifndef _UAPI_XTENSA_UNISTD_H | ||
12 | #define _UAPI_XTENSA_UNISTD_H | 2 | #define _UAPI_XTENSA_UNISTD_H |
13 | 3 | ||
14 | #ifndef __SYSCALL | 4 | #ifndef __SYSCALL |
@@ -272,7 +262,7 @@ __SYSCALL(115, sys_sendmmsg, 4) | |||
272 | #define __NR_clone 116 | 262 | #define __NR_clone 116 |
273 | __SYSCALL(116, xtensa_clone, 5) | 263 | __SYSCALL(116, xtensa_clone, 5) |
274 | #define __NR_execve 117 | 264 | #define __NR_execve 117 |
275 | __SYSCALL(117, xtensa_execve, 3) | 265 | __SYSCALL(117, sys_execve, 3) |
276 | #define __NR_exit 118 | 266 | #define __NR_exit 118 |
277 | __SYSCALL(118, sys_exit, 1) | 267 | __SYSCALL(118, sys_exit, 1) |
278 | #define __NR_exit_group 119 | 268 | #define __NR_exit_group 119 |
@@ -759,4 +749,6 @@ __SYSCALL(331, sys_kcmp, 5) | |||
759 | 749 | ||
760 | #define SYS_XTENSA_COUNT 5 /* count */ | 750 | #define SYS_XTENSA_COUNT 5 /* count */ |
761 | 751 | ||
752 | #undef __SYSCALL | ||
753 | |||
762 | #endif /* _UAPI_XTENSA_UNISTD_H */ | 754 | #endif /* _UAPI_XTENSA_UNISTD_H */ |
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index 18453067c258..90bfc1dbc13d 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S | |||
@@ -1833,50 +1833,6 @@ ENTRY(system_call) | |||
1833 | 1833 | ||
1834 | 1834 | ||
1835 | /* | 1835 | /* |
1836 | * Create a kernel thread | ||
1837 | * | ||
1838 | * int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags) | ||
1839 | * a2 a2 a3 a4 | ||
1840 | */ | ||
1841 | |||
1842 | ENTRY(kernel_thread) | ||
1843 | entry a1, 16 | ||
1844 | |||
1845 | mov a5, a2 # preserve fn over syscall | ||
1846 | mov a7, a3 # preserve args over syscall | ||
1847 | |||
1848 | movi a3, _CLONE_VM | _CLONE_UNTRACED | ||
1849 | movi a2, __NR_clone | ||
1850 | or a6, a4, a3 # arg0: flags | ||
1851 | mov a3, a1 # arg1: sp | ||
1852 | syscall | ||
1853 | |||
1854 | beq a3, a1, 1f # branch if parent | ||
1855 | mov a6, a7 # args | ||
1856 | callx4 a5 # fn(args) | ||
1857 | |||
1858 | movi a2, __NR_exit | ||
1859 | syscall # return value of fn(args) still in a6 | ||
1860 | |||
1861 | 1: retw | ||
1862 | |||
1863 | /* | ||
1864 | * Do a system call from kernel instead of calling sys_execve, so we end up | ||
1865 | * with proper pt_regs. | ||
1866 | * | ||
1867 | * int kernel_execve(const char *fname, char *const argv[], charg *const envp[]) | ||
1868 | * a2 a2 a3 a4 | ||
1869 | */ | ||
1870 | |||
1871 | ENTRY(kernel_execve) | ||
1872 | entry a1, 16 | ||
1873 | mov a6, a2 # arg0 is in a6 | ||
1874 | movi a2, __NR_execve | ||
1875 | syscall | ||
1876 | |||
1877 | retw | ||
1878 | |||
1879 | /* | ||
1880 | * Task switch. | 1836 | * Task switch. |
1881 | * | 1837 | * |
1882 | * struct task* _switch_to (struct task* prev, struct task* next) | 1838 | * struct task* _switch_to (struct task* prev, struct task* next) |
@@ -1958,3 +1914,16 @@ ENTRY(ret_from_fork) | |||
1958 | 1914 | ||
1959 | j common_exception_return | 1915 | j common_exception_return |
1960 | 1916 | ||
1917 | /* | ||
1918 | * Kernel thread creation helper | ||
1919 | * On entry, set up by copy_thread: a2 = thread_fn, a3 = thread_fn arg | ||
1920 | * left from _switch_to: a6 = prev | ||
1921 | */ | ||
1922 | ENTRY(ret_from_kernel_thread) | ||
1923 | |||
1924 | call4 schedule_tail | ||
1925 | mov a6, a3 | ||
1926 | callx4 a2 | ||
1927 | j common_exception_return | ||
1928 | |||
1929 | ENDPROC(ret_from_kernel_thread) | ||
diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c index 1908f6642d31..09ae7bfab9a7 100644 --- a/arch/xtensa/kernel/process.c +++ b/arch/xtensa/kernel/process.c | |||
@@ -45,6 +45,7 @@ | |||
45 | #include <asm/regs.h> | 45 | #include <asm/regs.h> |
46 | 46 | ||
47 | extern void ret_from_fork(void); | 47 | extern void ret_from_fork(void); |
48 | extern void ret_from_kernel_thread(void); | ||
48 | 49 | ||
49 | struct task_struct *current_set[NR_CPUS] = {&init_task, }; | 50 | struct task_struct *current_set[NR_CPUS] = {&init_task, }; |
50 | 51 | ||
@@ -158,18 +159,30 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) | |||
158 | /* | 159 | /* |
159 | * Copy thread. | 160 | * Copy thread. |
160 | * | 161 | * |
162 | * There are two modes in which this function is called: | ||
163 | * 1) Userspace thread creation, | ||
164 | * regs != NULL, usp_thread_fn is userspace stack pointer. | ||
165 | * It is expected to copy parent regs (in case CLONE_VM is not set | ||
166 | * in the clone_flags) and set up passed usp in the childregs. | ||
167 | * 2) Kernel thread creation, | ||
168 | * regs == NULL, usp_thread_fn is the function to run in the new thread | ||
169 | * and thread_fn_arg is its parameter. | ||
170 | * childregs are not used for the kernel threads. | ||
171 | * | ||
161 | * The stack layout for the new thread looks like this: | 172 | * The stack layout for the new thread looks like this: |
162 | * | 173 | * |
163 | * +------------------------+ <- sp in childregs (= tos) | 174 | * +------------------------+ |
164 | * | childregs | | 175 | * | childregs | |
165 | * +------------------------+ <- thread.sp = sp in dummy-frame | 176 | * +------------------------+ <- thread.sp = sp in dummy-frame |
166 | * | dummy-frame | (saved in dummy-frame spill-area) | 177 | * | dummy-frame | (saved in dummy-frame spill-area) |
167 | * +------------------------+ | 178 | * +------------------------+ |
168 | * | 179 | * |
169 | * We create a dummy frame to return to ret_from_fork: | 180 | * We create a dummy frame to return to either ret_from_fork or |
170 | * a0 points to ret_from_fork (simulating a call4) | 181 | * ret_from_kernel_thread: |
182 | * a0 points to ret_from_fork/ret_from_kernel_thread (simulating a call4) | ||
171 | * sp points to itself (thread.sp) | 183 | * sp points to itself (thread.sp) |
172 | * a2, a3 are unused. | 184 | * a2, a3 are unused for userspace threads, |
185 | * a2 points to thread_fn, a3 holds thread_fn arg for kernel threads. | ||
173 | * | 186 | * |
174 | * Note: This is a pristine frame, so we don't need any spill region on top of | 187 | * Note: This is a pristine frame, so we don't need any spill region on top of |
175 | * childregs. | 188 | * childregs. |
@@ -185,43 +198,63 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) | |||
185 | * involved. Much simpler to just not copy those live frames across. | 198 | * involved. Much simpler to just not copy those live frames across. |
186 | */ | 199 | */ |
187 | 200 | ||
188 | int copy_thread(unsigned long clone_flags, unsigned long usp, | 201 | int copy_thread(unsigned long clone_flags, unsigned long usp_thread_fn, |
189 | unsigned long unused, | 202 | unsigned long thread_fn_arg, |
190 | struct task_struct * p, struct pt_regs * regs) | 203 | struct task_struct *p, struct pt_regs *unused) |
191 | { | 204 | { |
192 | struct pt_regs *childregs; | 205 | struct pt_regs *childregs = task_pt_regs(p); |
193 | unsigned long tos; | ||
194 | int user_mode = user_mode(regs); | ||
195 | 206 | ||
196 | #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) | 207 | #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) |
197 | struct thread_info *ti; | 208 | struct thread_info *ti; |
198 | #endif | 209 | #endif |
199 | 210 | ||
200 | /* Set up new TSS. */ | ||
201 | tos = (unsigned long)task_stack_page(p) + THREAD_SIZE; | ||
202 | if (user_mode) | ||
203 | childregs = (struct pt_regs*)(tos - PT_USER_SIZE); | ||
204 | else | ||
205 | childregs = (struct pt_regs*)tos - 1; | ||
206 | |||
207 | /* This does not copy all the regs. In a bout of brilliance or madness, | ||
208 | ARs beyond a0-a15 exist past the end of the struct. */ | ||
209 | *childregs = *regs; | ||
210 | |||
211 | /* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */ | 211 | /* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */ |
212 | *((int*)childregs - 3) = (unsigned long)childregs; | 212 | *((int*)childregs - 3) = (unsigned long)childregs; |
213 | *((int*)childregs - 4) = 0; | 213 | *((int*)childregs - 4) = 0; |
214 | 214 | ||
215 | childregs->areg[2] = 0; | ||
216 | p->set_child_tid = p->clear_child_tid = NULL; | ||
217 | p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1); | ||
218 | p->thread.sp = (unsigned long)childregs; | 215 | p->thread.sp = (unsigned long)childregs; |
219 | 216 | ||
220 | if (user_mode(regs)) { | 217 | if (!(p->flags & PF_KTHREAD)) { |
218 | struct pt_regs *regs = current_pt_regs(); | ||
219 | unsigned long usp = usp_thread_fn ? | ||
220 | usp_thread_fn : regs->areg[1]; | ||
221 | 221 | ||
222 | p->thread.ra = MAKE_RA_FOR_CALL( | ||
223 | (unsigned long)ret_from_fork, 0x1); | ||
224 | |||
225 | /* This does not copy all the regs. | ||
226 | * In a bout of brilliance or madness, | ||
227 | * ARs beyond a0-a15 exist past the end of the struct. | ||
228 | */ | ||
229 | *childregs = *regs; | ||
222 | childregs->areg[1] = usp; | 230 | childregs->areg[1] = usp; |
231 | childregs->areg[2] = 0; | ||
232 | |||
233 | /* When sharing memory with the parent thread, the child | ||
234 | usually starts on a pristine stack, so we have to reset | ||
235 | windowbase, windowstart and wmask. | ||
236 | (Note that such a new thread is required to always create | ||
237 | an initial call4 frame) | ||
238 | The exception is vfork, where the new thread continues to | ||
239 | run on the parent's stack until it calls execve. This could | ||
240 | be a call8 or call12, which requires a legal stack frame | ||
241 | of the previous caller for the overflow handlers to work. | ||
242 | (Note that it's always legal to overflow live registers). | ||
243 | In this case, ensure to spill at least the stack pointer | ||
244 | of that frame. */ | ||
245 | |||
223 | if (clone_flags & CLONE_VM) { | 246 | if (clone_flags & CLONE_VM) { |
224 | childregs->wmask = 1; /* can't share live windows */ | 247 | /* check that caller window is live and same stack */ |
248 | int len = childregs->wmask & ~0xf; | ||
249 | if (regs->areg[1] == usp && len != 0) { | ||
250 | int callinc = (regs->areg[0] >> 30) & 3; | ||
251 | int caller_ars = XCHAL_NUM_AREGS - callinc * 4; | ||
252 | put_user(regs->areg[caller_ars+1], | ||
253 | (unsigned __user*)(usp - 12)); | ||
254 | } | ||
255 | childregs->wmask = 1; | ||
256 | childregs->windowstart = 1; | ||
257 | childregs->windowbase = 0; | ||
225 | } else { | 258 | } else { |
226 | int len = childregs->wmask & ~0xf; | 259 | int len = childregs->wmask & ~0xf; |
227 | memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4], | 260 | memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4], |
@@ -230,11 +263,19 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, | |||
230 | // FIXME: we need to set THREADPTR in thread_info... | 263 | // FIXME: we need to set THREADPTR in thread_info... |
231 | if (clone_flags & CLONE_SETTLS) | 264 | if (clone_flags & CLONE_SETTLS) |
232 | childregs->areg[2] = childregs->areg[6]; | 265 | childregs->areg[2] = childregs->areg[6]; |
233 | |||
234 | } else { | 266 | } else { |
235 | /* In kernel space, we start a new thread with a new stack. */ | 267 | p->thread.ra = MAKE_RA_FOR_CALL( |
236 | childregs->wmask = 1; | 268 | (unsigned long)ret_from_kernel_thread, 1); |
237 | childregs->areg[1] = tos; | 269 | |
270 | /* pass parameters to ret_from_kernel_thread: | ||
271 | * a2 = thread_fn, a3 = thread_fn arg | ||
272 | */ | ||
273 | *((int *)childregs - 1) = thread_fn_arg; | ||
274 | *((int *)childregs - 2) = usp_thread_fn; | ||
275 | |||
276 | /* Childregs are only used when we're going to userspace | ||
277 | * in which case start_thread will set them up. | ||
278 | */ | ||
238 | } | 279 | } |
239 | 280 | ||
240 | #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) | 281 | #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) |
@@ -330,32 +371,5 @@ long xtensa_clone(unsigned long clone_flags, unsigned long newsp, | |||
330 | void __user *child_tid, long a5, | 371 | void __user *child_tid, long a5, |
331 | struct pt_regs *regs) | 372 | struct pt_regs *regs) |
332 | { | 373 | { |
333 | if (!newsp) | ||
334 | newsp = regs->areg[1]; | ||
335 | return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid); | 374 | return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid); |
336 | } | 375 | } |
337 | |||
338 | /* | ||
339 | * xtensa_execve() executes a new program. | ||
340 | */ | ||
341 | |||
342 | asmlinkage | ||
343 | long xtensa_execve(const char __user *name, | ||
344 | const char __user *const __user *argv, | ||
345 | const char __user *const __user *envp, | ||
346 | long a3, long a4, long a5, | ||
347 | struct pt_regs *regs) | ||
348 | { | ||
349 | long error; | ||
350 | struct filename *filename; | ||
351 | |||
352 | filename = getname(name); | ||
353 | error = PTR_ERR(filename); | ||
354 | if (IS_ERR(filename)) | ||
355 | goto out; | ||
356 | error = do_execve(filename->name, argv, envp, regs); | ||
357 | putname(filename); | ||
358 | out: | ||
359 | return error; | ||
360 | } | ||
361 | |||
diff --git a/arch/xtensa/kernel/syscall.c b/arch/xtensa/kernel/syscall.c index a5c01e74d5d5..5702065f472a 100644 --- a/arch/xtensa/kernel/syscall.c +++ b/arch/xtensa/kernel/syscall.c | |||
@@ -32,10 +32,8 @@ typedef void (*syscall_t)(void); | |||
32 | syscall_t sys_call_table[__NR_syscall_count] /* FIXME __cacheline_aligned */= { | 32 | syscall_t sys_call_table[__NR_syscall_count] /* FIXME __cacheline_aligned */= { |
33 | [0 ... __NR_syscall_count - 1] = (syscall_t)&sys_ni_syscall, | 33 | [0 ... __NR_syscall_count - 1] = (syscall_t)&sys_ni_syscall, |
34 | 34 | ||
35 | #undef __SYSCALL | ||
36 | #define __SYSCALL(nr,symbol,nargs) [ nr ] = (syscall_t)symbol, | 35 | #define __SYSCALL(nr,symbol,nargs) [ nr ] = (syscall_t)symbol, |
37 | #undef __KERNEL_SYSCALLS__ | 36 | #include <uapi/asm/unistd.h> |
38 | #include <asm/unistd.h> | ||
39 | }; | 37 | }; |
40 | 38 | ||
41 | asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg) | 39 | asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg) |
@@ -49,7 +47,8 @@ asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg) | |||
49 | return (long)ret; | 47 | return (long)ret; |
50 | } | 48 | } |
51 | 49 | ||
52 | asmlinkage long xtensa_fadvise64_64(int fd, int advice, unsigned long long offset, unsigned long long len) | 50 | asmlinkage long xtensa_fadvise64_64(int fd, int advice, |
51 | unsigned long long offset, unsigned long long len) | ||
53 | { | 52 | { |
54 | return sys_fadvise64_64(fd, offset, len, advice); | 53 | return sys_fadvise64_64(fd, offset, len, advice); |
55 | } | 54 | } |
diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c index a8b9f1fd1e17..afe058b24e6e 100644 --- a/arch/xtensa/kernel/xtensa_ksyms.c +++ b/arch/xtensa/kernel/xtensa_ksyms.c | |||
@@ -43,7 +43,6 @@ EXPORT_SYMBOL(__strncpy_user); | |||
43 | EXPORT_SYMBOL(clear_page); | 43 | EXPORT_SYMBOL(clear_page); |
44 | EXPORT_SYMBOL(copy_page); | 44 | EXPORT_SYMBOL(copy_page); |
45 | 45 | ||
46 | EXPORT_SYMBOL(kernel_thread); | ||
47 | EXPORT_SYMBOL(empty_zero_page); | 46 | EXPORT_SYMBOL(empty_zero_page); |
48 | 47 | ||
49 | /* | 48 | /* |
diff --git a/block/Kconfig b/block/Kconfig index 09acf1b39905..a7e40a7c8214 100644 --- a/block/Kconfig +++ b/block/Kconfig | |||
@@ -89,7 +89,7 @@ config BLK_DEV_INTEGRITY | |||
89 | 89 | ||
90 | config BLK_DEV_THROTTLING | 90 | config BLK_DEV_THROTTLING |
91 | bool "Block layer bio throttling support" | 91 | bool "Block layer bio throttling support" |
92 | depends on BLK_CGROUP=y && EXPERIMENTAL | 92 | depends on BLK_CGROUP=y |
93 | default n | 93 | default n |
94 | ---help--- | 94 | ---help--- |
95 | Block layer bio throttling support. It can be used to limit | 95 | Block layer bio throttling support. It can be used to limit |
diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c index cafcd7431189..d0b770391ad4 100644 --- a/block/blk-cgroup.c +++ b/block/blk-cgroup.c | |||
@@ -285,6 +285,13 @@ static void blkg_destroy_all(struct request_queue *q) | |||
285 | blkg_destroy(blkg); | 285 | blkg_destroy(blkg); |
286 | spin_unlock(&blkcg->lock); | 286 | spin_unlock(&blkcg->lock); |
287 | } | 287 | } |
288 | |||
289 | /* | ||
290 | * root blkg is destroyed. Just clear the pointer since | ||
291 | * root_rl does not take reference on root blkg. | ||
292 | */ | ||
293 | q->root_blkg = NULL; | ||
294 | q->root_rl.blkg = NULL; | ||
288 | } | 295 | } |
289 | 296 | ||
290 | static void blkg_rcu_free(struct rcu_head *rcu_head) | 297 | static void blkg_rcu_free(struct rcu_head *rcu_head) |
@@ -326,6 +333,9 @@ struct request_list *__blk_queue_next_rl(struct request_list *rl, | |||
326 | */ | 333 | */ |
327 | if (rl == &q->root_rl) { | 334 | if (rl == &q->root_rl) { |
328 | ent = &q->blkg_list; | 335 | ent = &q->blkg_list; |
336 | /* There are no more block groups, hence no request lists */ | ||
337 | if (list_empty(ent)) | ||
338 | return NULL; | ||
329 | } else { | 339 | } else { |
330 | blkg = container_of(rl, struct blkcg_gq, rl); | 340 | blkg = container_of(rl, struct blkcg_gq, rl); |
331 | ent = &blkg->q_node; | 341 | ent = &blkg->q_node; |
diff --git a/block/blk-core.c b/block/blk-core.c index a33870b1847b..3c95c4d6e31a 100644 --- a/block/blk-core.c +++ b/block/blk-core.c | |||
@@ -2868,7 +2868,8 @@ static int plug_rq_cmp(void *priv, struct list_head *a, struct list_head *b) | |||
2868 | struct request *rqa = container_of(a, struct request, queuelist); | 2868 | struct request *rqa = container_of(a, struct request, queuelist); |
2869 | struct request *rqb = container_of(b, struct request, queuelist); | 2869 | struct request *rqb = container_of(b, struct request, queuelist); |
2870 | 2870 | ||
2871 | return !(rqa->q <= rqb->q); | 2871 | return !(rqa->q < rqb->q || |
2872 | (rqa->q == rqb->q && blk_rq_pos(rqa) < blk_rq_pos(rqb))); | ||
2872 | } | 2873 | } |
2873 | 2874 | ||
2874 | /* | 2875 | /* |
diff --git a/crypto/cryptd.c b/crypto/cryptd.c index 671d4d6d14df..7bdd61b867c8 100644 --- a/crypto/cryptd.c +++ b/crypto/cryptd.c | |||
@@ -137,13 +137,18 @@ static void cryptd_queue_worker(struct work_struct *work) | |||
137 | struct crypto_async_request *req, *backlog; | 137 | struct crypto_async_request *req, *backlog; |
138 | 138 | ||
139 | cpu_queue = container_of(work, struct cryptd_cpu_queue, work); | 139 | cpu_queue = container_of(work, struct cryptd_cpu_queue, work); |
140 | /* Only handle one request at a time to avoid hogging crypto | 140 | /* |
141 | * workqueue. preempt_disable/enable is used to prevent | 141 | * Only handle one request at a time to avoid hogging crypto workqueue. |
142 | * being preempted by cryptd_enqueue_request() */ | 142 | * preempt_disable/enable is used to prevent being preempted by |
143 | * cryptd_enqueue_request(). local_bh_disable/enable is used to prevent | ||
144 | * cryptd_enqueue_request() being accessed from software interrupts. | ||
145 | */ | ||
146 | local_bh_disable(); | ||
143 | preempt_disable(); | 147 | preempt_disable(); |
144 | backlog = crypto_get_backlog(&cpu_queue->queue); | 148 | backlog = crypto_get_backlog(&cpu_queue->queue); |
145 | req = crypto_dequeue_request(&cpu_queue->queue); | 149 | req = crypto_dequeue_request(&cpu_queue->queue); |
146 | preempt_enable(); | 150 | preempt_enable(); |
151 | local_bh_enable(); | ||
147 | 152 | ||
148 | if (!req) | 153 | if (!req) |
149 | return; | 154 | return; |
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c index f94d4c818fc7..0230cb6cbb3a 100644 --- a/drivers/acpi/video.c +++ b/drivers/acpi/video.c | |||
@@ -1345,12 +1345,15 @@ static int | |||
1345 | acpi_video_bus_get_devices(struct acpi_video_bus *video, | 1345 | acpi_video_bus_get_devices(struct acpi_video_bus *video, |
1346 | struct acpi_device *device) | 1346 | struct acpi_device *device) |
1347 | { | 1347 | { |
1348 | int status; | 1348 | int status = 0; |
1349 | struct acpi_device *dev; | 1349 | struct acpi_device *dev; |
1350 | 1350 | ||
1351 | status = acpi_video_device_enumerate(video); | 1351 | /* |
1352 | if (status) | 1352 | * There are systems where video module known to work fine regardless |
1353 | return status; | 1353 | * of broken _DOD and ignoring returned value here doesn't cause |
1354 | * any issues later. | ||
1355 | */ | ||
1356 | acpi_video_device_enumerate(video); | ||
1354 | 1357 | ||
1355 | list_for_each_entry(dev, &device->children, node) { | 1358 | list_for_each_entry(dev, &device->children, node) { |
1356 | 1359 | ||
diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 8727e9c5eea4..72c776f2a1f5 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c | |||
@@ -83,9 +83,16 @@ EXPORT_SYMBOL_GPL(platform_get_resource); | |||
83 | */ | 83 | */ |
84 | int platform_get_irq(struct platform_device *dev, unsigned int num) | 84 | int platform_get_irq(struct platform_device *dev, unsigned int num) |
85 | { | 85 | { |
86 | #ifdef CONFIG_SPARC | ||
87 | /* sparc does not have irqs represented as IORESOURCE_IRQ resources */ | ||
88 | if (!dev || num >= dev->archdata.num_irqs) | ||
89 | return -ENXIO; | ||
90 | return dev->archdata.irqs[num]; | ||
91 | #else | ||
86 | struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num); | 92 | struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num); |
87 | 93 | ||
88 | return r ? r->start : -ENXIO; | 94 | return r ? r->start : -ENXIO; |
95 | #endif | ||
89 | } | 96 | } |
90 | EXPORT_SYMBOL_GPL(platform_get_irq); | 97 | EXPORT_SYMBOL_GPL(platform_get_irq); |
91 | 98 | ||
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index f529407db93f..824e09c4d0d7 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig | |||
@@ -131,6 +131,7 @@ config BLK_CPQ_DA | |||
131 | config BLK_CPQ_CISS_DA | 131 | config BLK_CPQ_CISS_DA |
132 | tristate "Compaq Smart Array 5xxx support" | 132 | tristate "Compaq Smart Array 5xxx support" |
133 | depends on PCI | 133 | depends on PCI |
134 | select CHECK_SIGNATURE | ||
134 | help | 135 | help |
135 | This is the driver for Compaq Smart Array 5xxx controllers. | 136 | This is the driver for Compaq Smart Array 5xxx controllers. |
136 | Everyone using these boards should say Y here. | 137 | Everyone using these boards should say Y here. |
@@ -166,8 +167,8 @@ config BLK_DEV_DAC960 | |||
166 | module will be called DAC960. | 167 | module will be called DAC960. |
167 | 168 | ||
168 | config BLK_DEV_UMEM | 169 | config BLK_DEV_UMEM |
169 | tristate "Micro Memory MM5415 Battery Backed RAM support (EXPERIMENTAL)" | 170 | tristate "Micro Memory MM5415 Battery Backed RAM support" |
170 | depends on PCI && EXPERIMENTAL | 171 | depends on PCI |
171 | ---help--- | 172 | ---help--- |
172 | Saying Y here will include support for the MM5415 family of | 173 | Saying Y here will include support for the MM5415 family of |
173 | battery backed (Non-volatile) RAM cards. | 174 | battery backed (Non-volatile) RAM cards. |
@@ -430,8 +431,8 @@ config CDROM_PKTCDVD_BUFFERS | |||
430 | a disc is opened for writing. | 431 | a disc is opened for writing. |
431 | 432 | ||
432 | config CDROM_PKTCDVD_WCACHE | 433 | config CDROM_PKTCDVD_WCACHE |
433 | bool "Enable write caching (EXPERIMENTAL)" | 434 | bool "Enable write caching" |
434 | depends on CDROM_PKTCDVD && EXPERIMENTAL | 435 | depends on CDROM_PKTCDVD |
435 | help | 436 | help |
436 | If enabled, write caching will be set for the CD-R/W device. For now | 437 | If enabled, write caching will be set for the CD-R/W device. For now |
437 | this option is dangerous unless the CD-RW media is known good, as we | 438 | this option is dangerous unless the CD-RW media is known good, as we |
@@ -508,8 +509,8 @@ config XEN_BLKDEV_BACKEND | |||
508 | 509 | ||
509 | 510 | ||
510 | config VIRTIO_BLK | 511 | config VIRTIO_BLK |
511 | tristate "Virtio block driver (EXPERIMENTAL)" | 512 | tristate "Virtio block driver" |
512 | depends on EXPERIMENTAL && VIRTIO | 513 | depends on VIRTIO |
513 | ---help--- | 514 | ---help--- |
514 | This is the virtual block driver for virtio. It can be used with | 515 | This is the virtual block driver for virtio. It can be used with |
515 | lguest or QEMU based VMMs (like KVM or Xen). Say Y or M. | 516 | lguest or QEMU based VMMs (like KVM or Xen). Say Y or M. |
@@ -528,7 +529,7 @@ config BLK_DEV_HD | |||
528 | 529 | ||
529 | config BLK_DEV_RBD | 530 | config BLK_DEV_RBD |
530 | tristate "Rados block device (RBD)" | 531 | tristate "Rados block device (RBD)" |
531 | depends on INET && EXPERIMENTAL && BLOCK | 532 | depends on INET && BLOCK |
532 | select CEPH_LIB | 533 | select CEPH_LIB |
533 | select LIBCRC32C | 534 | select LIBCRC32C |
534 | select CRYPTO_AES | 535 | select CRYPTO_AES |
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c index b0f553b26d0f..ca83f96756ad 100644 --- a/drivers/block/cciss.c +++ b/drivers/block/cciss.c | |||
@@ -5205,7 +5205,6 @@ static void cciss_shutdown(struct pci_dev *pdev) | |||
5205 | return; | 5205 | return; |
5206 | } | 5206 | } |
5207 | /* write all data in the battery backed cache to disk */ | 5207 | /* write all data in the battery backed cache to disk */ |
5208 | memset(flush_buf, 0, 4); | ||
5209 | return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf, | 5208 | return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf, |
5210 | 4, 0, CTLR_LUNID, TYPE_CMD); | 5209 | 4, 0, CTLR_LUNID, TYPE_CMD); |
5211 | kfree(flush_buf); | 5210 | kfree(flush_buf); |
diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c index 17c675c52295..1c49d7173966 100644 --- a/drivers/block/floppy.c +++ b/drivers/block/floppy.c | |||
@@ -4109,12 +4109,19 @@ static struct platform_driver floppy_driver = { | |||
4109 | 4109 | ||
4110 | static struct platform_device floppy_device[N_DRIVE]; | 4110 | static struct platform_device floppy_device[N_DRIVE]; |
4111 | 4111 | ||
4112 | static bool floppy_available(int drive) | ||
4113 | { | ||
4114 | if (!(allowed_drive_mask & (1 << drive))) | ||
4115 | return false; | ||
4116 | if (fdc_state[FDC(drive)].version == FDC_NONE) | ||
4117 | return false; | ||
4118 | return true; | ||
4119 | } | ||
4120 | |||
4112 | static struct kobject *floppy_find(dev_t dev, int *part, void *data) | 4121 | static struct kobject *floppy_find(dev_t dev, int *part, void *data) |
4113 | { | 4122 | { |
4114 | int drive = (*part & 3) | ((*part & 0x80) >> 5); | 4123 | int drive = (*part & 3) | ((*part & 0x80) >> 5); |
4115 | if (drive >= N_DRIVE || | 4124 | if (drive >= N_DRIVE || !floppy_available(drive)) |
4116 | !(allowed_drive_mask & (1 << drive)) || | ||
4117 | fdc_state[FDC(drive)].version == FDC_NONE) | ||
4118 | return NULL; | 4125 | return NULL; |
4119 | if (((*part >> 2) & 0x1f) >= ARRAY_SIZE(floppy_type)) | 4126 | if (((*part >> 2) & 0x1f) >= ARRAY_SIZE(floppy_type)) |
4120 | return NULL; | 4127 | return NULL; |
@@ -4124,8 +4131,7 @@ static struct kobject *floppy_find(dev_t dev, int *part, void *data) | |||
4124 | 4131 | ||
4125 | static int __init do_floppy_init(void) | 4132 | static int __init do_floppy_init(void) |
4126 | { | 4133 | { |
4127 | int i, unit, drive; | 4134 | int i, unit, drive, err; |
4128 | int err, dr; | ||
4129 | 4135 | ||
4130 | set_debugt(); | 4136 | set_debugt(); |
4131 | interruptjiffies = resultjiffies = jiffies; | 4137 | interruptjiffies = resultjiffies = jiffies; |
@@ -4137,34 +4143,32 @@ static int __init do_floppy_init(void) | |||
4137 | 4143 | ||
4138 | raw_cmd = NULL; | 4144 | raw_cmd = NULL; |
4139 | 4145 | ||
4140 | for (dr = 0; dr < N_DRIVE; dr++) { | 4146 | floppy_wq = alloc_ordered_workqueue("floppy", 0); |
4141 | disks[dr] = alloc_disk(1); | 4147 | if (!floppy_wq) |
4142 | if (!disks[dr]) { | 4148 | return -ENOMEM; |
4143 | err = -ENOMEM; | ||
4144 | goto out_put_disk; | ||
4145 | } | ||
4146 | 4149 | ||
4147 | floppy_wq = alloc_ordered_workqueue("floppy", 0); | 4150 | for (drive = 0; drive < N_DRIVE; drive++) { |
4148 | if (!floppy_wq) { | 4151 | disks[drive] = alloc_disk(1); |
4152 | if (!disks[drive]) { | ||
4149 | err = -ENOMEM; | 4153 | err = -ENOMEM; |
4150 | goto out_put_disk; | 4154 | goto out_put_disk; |
4151 | } | 4155 | } |
4152 | 4156 | ||
4153 | disks[dr]->queue = blk_init_queue(do_fd_request, &floppy_lock); | 4157 | disks[drive]->queue = blk_init_queue(do_fd_request, &floppy_lock); |
4154 | if (!disks[dr]->queue) { | 4158 | if (!disks[drive]->queue) { |
4155 | err = -ENOMEM; | 4159 | err = -ENOMEM; |
4156 | goto out_destroy_workq; | 4160 | goto out_put_disk; |
4157 | } | 4161 | } |
4158 | 4162 | ||
4159 | blk_queue_max_hw_sectors(disks[dr]->queue, 64); | 4163 | blk_queue_max_hw_sectors(disks[drive]->queue, 64); |
4160 | disks[dr]->major = FLOPPY_MAJOR; | 4164 | disks[drive]->major = FLOPPY_MAJOR; |
4161 | disks[dr]->first_minor = TOMINOR(dr); | 4165 | disks[drive]->first_minor = TOMINOR(drive); |
4162 | disks[dr]->fops = &floppy_fops; | 4166 | disks[drive]->fops = &floppy_fops; |
4163 | sprintf(disks[dr]->disk_name, "fd%d", dr); | 4167 | sprintf(disks[drive]->disk_name, "fd%d", drive); |
4164 | 4168 | ||
4165 | init_timer(&motor_off_timer[dr]); | 4169 | init_timer(&motor_off_timer[drive]); |
4166 | motor_off_timer[dr].data = dr; | 4170 | motor_off_timer[drive].data = drive; |
4167 | motor_off_timer[dr].function = motor_off_callback; | 4171 | motor_off_timer[drive].function = motor_off_callback; |
4168 | } | 4172 | } |
4169 | 4173 | ||
4170 | err = register_blkdev(FLOPPY_MAJOR, "fd"); | 4174 | err = register_blkdev(FLOPPY_MAJOR, "fd"); |
@@ -4282,9 +4286,7 @@ static int __init do_floppy_init(void) | |||
4282 | } | 4286 | } |
4283 | 4287 | ||
4284 | for (drive = 0; drive < N_DRIVE; drive++) { | 4288 | for (drive = 0; drive < N_DRIVE; drive++) { |
4285 | if (!(allowed_drive_mask & (1 << drive))) | 4289 | if (!floppy_available(drive)) |
4286 | continue; | ||
4287 | if (fdc_state[FDC(drive)].version == FDC_NONE) | ||
4288 | continue; | 4290 | continue; |
4289 | 4291 | ||
4290 | floppy_device[drive].name = floppy_device_name; | 4292 | floppy_device[drive].name = floppy_device_name; |
@@ -4293,7 +4295,7 @@ static int __init do_floppy_init(void) | |||
4293 | 4295 | ||
4294 | err = platform_device_register(&floppy_device[drive]); | 4296 | err = platform_device_register(&floppy_device[drive]); |
4295 | if (err) | 4297 | if (err) |
4296 | goto out_release_dma; | 4298 | goto out_remove_drives; |
4297 | 4299 | ||
4298 | err = device_create_file(&floppy_device[drive].dev, | 4300 | err = device_create_file(&floppy_device[drive].dev, |
4299 | &dev_attr_cmos); | 4301 | &dev_attr_cmos); |
@@ -4311,29 +4313,34 @@ static int __init do_floppy_init(void) | |||
4311 | 4313 | ||
4312 | out_unreg_platform_dev: | 4314 | out_unreg_platform_dev: |
4313 | platform_device_unregister(&floppy_device[drive]); | 4315 | platform_device_unregister(&floppy_device[drive]); |
4316 | out_remove_drives: | ||
4317 | while (drive--) { | ||
4318 | if (floppy_available(drive)) { | ||
4319 | del_gendisk(disks[drive]); | ||
4320 | device_remove_file(&floppy_device[drive].dev, &dev_attr_cmos); | ||
4321 | platform_device_unregister(&floppy_device[drive]); | ||
4322 | } | ||
4323 | } | ||
4314 | out_release_dma: | 4324 | out_release_dma: |
4315 | if (atomic_read(&usage_count)) | 4325 | if (atomic_read(&usage_count)) |
4316 | floppy_release_irq_and_dma(); | 4326 | floppy_release_irq_and_dma(); |
4317 | out_unreg_region: | 4327 | out_unreg_region: |
4318 | blk_unregister_region(MKDEV(FLOPPY_MAJOR, 0), 256); | 4328 | blk_unregister_region(MKDEV(FLOPPY_MAJOR, 0), 256); |
4319 | platform_driver_unregister(&floppy_driver); | 4329 | platform_driver_unregister(&floppy_driver); |
4320 | out_destroy_workq: | ||
4321 | destroy_workqueue(floppy_wq); | ||
4322 | out_unreg_blkdev: | 4330 | out_unreg_blkdev: |
4323 | unregister_blkdev(FLOPPY_MAJOR, "fd"); | 4331 | unregister_blkdev(FLOPPY_MAJOR, "fd"); |
4324 | out_put_disk: | 4332 | out_put_disk: |
4325 | while (dr--) { | 4333 | for (drive = 0; drive < N_DRIVE; drive++) { |
4326 | del_timer_sync(&motor_off_timer[dr]); | 4334 | if (!disks[drive]) |
4327 | if (disks[dr]->queue) { | 4335 | break; |
4328 | blk_cleanup_queue(disks[dr]->queue); | 4336 | if (disks[drive]->queue) { |
4329 | /* | 4337 | del_timer_sync(&motor_off_timer[drive]); |
4330 | * put_disk() is not paired with add_disk() and | 4338 | blk_cleanup_queue(disks[drive]->queue); |
4331 | * will put queue reference one extra time. fix it. | 4339 | disks[drive]->queue = NULL; |
4332 | */ | ||
4333 | disks[dr]->queue = NULL; | ||
4334 | } | 4340 | } |
4335 | put_disk(disks[dr]); | 4341 | put_disk(disks[drive]); |
4336 | } | 4342 | } |
4343 | destroy_workqueue(floppy_wq); | ||
4337 | return err; | 4344 | return err; |
4338 | } | 4345 | } |
4339 | 4346 | ||
@@ -4551,8 +4558,7 @@ static void __exit floppy_module_exit(void) | |||
4551 | for (drive = 0; drive < N_DRIVE; drive++) { | 4558 | for (drive = 0; drive < N_DRIVE; drive++) { |
4552 | del_timer_sync(&motor_off_timer[drive]); | 4559 | del_timer_sync(&motor_off_timer[drive]); |
4553 | 4560 | ||
4554 | if ((allowed_drive_mask & (1 << drive)) && | 4561 | if (floppy_available(drive)) { |
4555 | fdc_state[FDC(drive)].version != FDC_NONE) { | ||
4556 | del_gendisk(disks[drive]); | 4562 | del_gendisk(disks[drive]); |
4557 | device_remove_file(&floppy_device[drive].dev, &dev_attr_cmos); | 4563 | device_remove_file(&floppy_device[drive].dev, &dev_attr_cmos); |
4558 | platform_device_unregister(&floppy_device[drive]); | 4564 | platform_device_unregister(&floppy_device[drive]); |
diff --git a/drivers/block/loop.c b/drivers/block/loop.c index e9d594fd12cb..54046e51160a 100644 --- a/drivers/block/loop.c +++ b/drivers/block/loop.c | |||
@@ -976,8 +976,21 @@ static int loop_clr_fd(struct loop_device *lo) | |||
976 | if (lo->lo_state != Lo_bound) | 976 | if (lo->lo_state != Lo_bound) |
977 | return -ENXIO; | 977 | return -ENXIO; |
978 | 978 | ||
979 | if (lo->lo_refcnt > 1) /* we needed one fd for the ioctl */ | 979 | /* |
980 | return -EBUSY; | 980 | * If we've explicitly asked to tear down the loop device, |
981 | * and it has an elevated reference count, set it for auto-teardown when | ||
982 | * the last reference goes away. This stops $!~#$@ udev from | ||
983 | * preventing teardown because it decided that it needs to run blkid on | ||
984 | * the loopback device whenever they appear. xfstests is notorious for | ||
985 | * failing tests because blkid via udev races with a losetup | ||
986 | * <dev>/do something like mkfs/losetup -d <dev> causing the losetup -d | ||
987 | * command to fail with EBUSY. | ||
988 | */ | ||
989 | if (lo->lo_refcnt > 1) { | ||
990 | lo->lo_flags |= LO_FLAGS_AUTOCLEAR; | ||
991 | mutex_unlock(&lo->lo_ctl_mutex); | ||
992 | return 0; | ||
993 | } | ||
981 | 994 | ||
982 | if (filp == NULL) | 995 | if (filp == NULL) |
983 | return -EINVAL; | 996 | return -EINVAL; |
diff --git a/drivers/block/mtip32xx/mtip32xx.c b/drivers/block/mtip32xx/mtip32xx.c index f946d31d6917..adc6f36564cf 100644 --- a/drivers/block/mtip32xx/mtip32xx.c +++ b/drivers/block/mtip32xx/mtip32xx.c | |||
@@ -2035,8 +2035,9 @@ static unsigned int implicit_sector(unsigned char command, | |||
2035 | } | 2035 | } |
2036 | return rv; | 2036 | return rv; |
2037 | } | 2037 | } |
2038 | 2038 | static void mtip_set_timeout(struct driver_data *dd, | |
2039 | static void mtip_set_timeout(struct host_to_dev_fis *fis, unsigned int *timeout) | 2039 | struct host_to_dev_fis *fis, |
2040 | unsigned int *timeout, u8 erasemode) | ||
2040 | { | 2041 | { |
2041 | switch (fis->command) { | 2042 | switch (fis->command) { |
2042 | case ATA_CMD_DOWNLOAD_MICRO: | 2043 | case ATA_CMD_DOWNLOAD_MICRO: |
@@ -2044,7 +2045,10 @@ static void mtip_set_timeout(struct host_to_dev_fis *fis, unsigned int *timeout) | |||
2044 | break; | 2045 | break; |
2045 | case ATA_CMD_SEC_ERASE_UNIT: | 2046 | case ATA_CMD_SEC_ERASE_UNIT: |
2046 | case 0xFC: | 2047 | case 0xFC: |
2047 | *timeout = 240000; /* 4 minutes */ | 2048 | if (erasemode) |
2049 | *timeout = ((*(dd->port->identify + 90) * 2) * 60000); | ||
2050 | else | ||
2051 | *timeout = ((*(dd->port->identify + 89) * 2) * 60000); | ||
2048 | break; | 2052 | break; |
2049 | case ATA_CMD_STANDBYNOW1: | 2053 | case ATA_CMD_STANDBYNOW1: |
2050 | *timeout = 120000; /* 2 minutes */ | 2054 | *timeout = 120000; /* 2 minutes */ |
@@ -2087,6 +2091,7 @@ static int exec_drive_taskfile(struct driver_data *dd, | |||
2087 | unsigned int transfer_size; | 2091 | unsigned int transfer_size; |
2088 | unsigned long task_file_data; | 2092 | unsigned long task_file_data; |
2089 | int intotal = outtotal + req_task->out_size; | 2093 | int intotal = outtotal + req_task->out_size; |
2094 | int erasemode = 0; | ||
2090 | 2095 | ||
2091 | taskout = req_task->out_size; | 2096 | taskout = req_task->out_size; |
2092 | taskin = req_task->in_size; | 2097 | taskin = req_task->in_size; |
@@ -2212,7 +2217,13 @@ static int exec_drive_taskfile(struct driver_data *dd, | |||
2212 | fis.lba_hi, | 2217 | fis.lba_hi, |
2213 | fis.device); | 2218 | fis.device); |
2214 | 2219 | ||
2215 | mtip_set_timeout(&fis, &timeout); | 2220 | /* check for erase mode support during secure erase.*/ |
2221 | if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) | ||
2222 | && (outbuf[0] & MTIP_SEC_ERASE_MODE)) { | ||
2223 | erasemode = 1; | ||
2224 | } | ||
2225 | |||
2226 | mtip_set_timeout(dd, &fis, &timeout, erasemode); | ||
2216 | 2227 | ||
2217 | /* Determine the correct transfer size.*/ | 2228 | /* Determine the correct transfer size.*/ |
2218 | if (force_single_sector) | 2229 | if (force_single_sector) |
diff --git a/drivers/block/mtip32xx/mtip32xx.h b/drivers/block/mtip32xx/mtip32xx.h index 18627a1d04c5..5f4a917bd8bb 100644 --- a/drivers/block/mtip32xx/mtip32xx.h +++ b/drivers/block/mtip32xx/mtip32xx.h | |||
@@ -33,6 +33,9 @@ | |||
33 | /* offset of Device Control register in PCIe extended capabilites space */ | 33 | /* offset of Device Control register in PCIe extended capabilites space */ |
34 | #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48 | 34 | #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48 |
35 | 35 | ||
36 | /* check for erase mode support during secure erase */ | ||
37 | #define MTIP_SEC_ERASE_MODE 0x3 | ||
38 | |||
36 | /* # of times to retry timed out/failed IOs */ | 39 | /* # of times to retry timed out/failed IOs */ |
37 | #define MTIP_MAX_RETRIES 2 | 40 | #define MTIP_MAX_RETRIES 2 |
38 | 41 | ||
diff --git a/drivers/block/xen-blkback/common.h b/drivers/block/xen-blkback/common.h index 9ad3b5ec1dc1..9a54623e52d7 100644 --- a/drivers/block/xen-blkback/common.h +++ b/drivers/block/xen-blkback/common.h | |||
@@ -158,8 +158,8 @@ struct xen_vbd { | |||
158 | struct block_device *bdev; | 158 | struct block_device *bdev; |
159 | /* Cached size parameter. */ | 159 | /* Cached size parameter. */ |
160 | sector_t size; | 160 | sector_t size; |
161 | bool flush_support; | 161 | unsigned int flush_support:1; |
162 | bool discard_secure; | 162 | unsigned int discard_secure:1; |
163 | }; | 163 | }; |
164 | 164 | ||
165 | struct backend_info; | 165 | struct backend_info; |
diff --git a/drivers/block/xen-blkback/xenbus.c b/drivers/block/xen-blkback/xenbus.c index 4f66171c6683..f58434c2617c 100644 --- a/drivers/block/xen-blkback/xenbus.c +++ b/drivers/block/xen-blkback/xenbus.c | |||
@@ -105,11 +105,10 @@ static struct xen_blkif *xen_blkif_alloc(domid_t domid) | |||
105 | { | 105 | { |
106 | struct xen_blkif *blkif; | 106 | struct xen_blkif *blkif; |
107 | 107 | ||
108 | blkif = kmem_cache_alloc(xen_blkif_cachep, GFP_KERNEL); | 108 | blkif = kmem_cache_zalloc(xen_blkif_cachep, GFP_KERNEL); |
109 | if (!blkif) | 109 | if (!blkif) |
110 | return ERR_PTR(-ENOMEM); | 110 | return ERR_PTR(-ENOMEM); |
111 | 111 | ||
112 | memset(blkif, 0, sizeof(*blkif)); | ||
113 | blkif->domid = domid; | 112 | blkif->domid = domid; |
114 | spin_lock_init(&blkif->blk_ring_lock); | 113 | spin_lock_init(&blkif->blk_ring_lock); |
115 | atomic_set(&blkif->refcnt, 1); | 114 | atomic_set(&blkif->refcnt, 1); |
@@ -196,7 +195,7 @@ static void xen_blkif_disconnect(struct xen_blkif *blkif) | |||
196 | } | 195 | } |
197 | } | 196 | } |
198 | 197 | ||
199 | void xen_blkif_free(struct xen_blkif *blkif) | 198 | static void xen_blkif_free(struct xen_blkif *blkif) |
200 | { | 199 | { |
201 | if (!atomic_dec_and_test(&blkif->refcnt)) | 200 | if (!atomic_dec_and_test(&blkif->refcnt)) |
202 | BUG(); | 201 | BUG(); |
@@ -257,7 +256,7 @@ static struct attribute_group xen_vbdstat_group = { | |||
257 | VBD_SHOW(physical_device, "%x:%x\n", be->major, be->minor); | 256 | VBD_SHOW(physical_device, "%x:%x\n", be->major, be->minor); |
258 | VBD_SHOW(mode, "%s\n", be->mode); | 257 | VBD_SHOW(mode, "%s\n", be->mode); |
259 | 258 | ||
260 | int xenvbd_sysfs_addif(struct xenbus_device *dev) | 259 | static int xenvbd_sysfs_addif(struct xenbus_device *dev) |
261 | { | 260 | { |
262 | int error; | 261 | int error; |
263 | 262 | ||
@@ -281,7 +280,7 @@ fail1: device_remove_file(&dev->dev, &dev_attr_physical_device); | |||
281 | return error; | 280 | return error; |
282 | } | 281 | } |
283 | 282 | ||
284 | void xenvbd_sysfs_delif(struct xenbus_device *dev) | 283 | static void xenvbd_sysfs_delif(struct xenbus_device *dev) |
285 | { | 284 | { |
286 | sysfs_remove_group(&dev->dev.kobj, &xen_vbdstat_group); | 285 | sysfs_remove_group(&dev->dev.kobj, &xen_vbdstat_group); |
287 | device_remove_file(&dev->dev, &dev_attr_mode); | 286 | device_remove_file(&dev->dev, &dev_attr_mode); |
diff --git a/drivers/cpufreq/powernow-k8.c b/drivers/cpufreq/powernow-k8.c index c16a3a593ba4..e3ebb4fa2c3e 100644 --- a/drivers/cpufreq/powernow-k8.c +++ b/drivers/cpufreq/powernow-k8.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * http://www.gnu.org/licenses/gpl.html | 5 | * http://www.gnu.org/licenses/gpl.html |
6 | * | 6 | * |
7 | * Maintainer: | 7 | * Maintainer: |
8 | * Andreas Herrmann <andreas.herrmann3@amd.com> | 8 | * Andreas Herrmann <herrmann.der.user@googlemail.com> |
9 | * | 9 | * |
10 | * Based on the powernow-k7.c module written by Dave Jones. | 10 | * Based on the powernow-k7.c module written by Dave Jones. |
11 | * (C) 2003 Dave Jones on behalf of SuSE Labs | 11 | * (C) 2003 Dave Jones on behalf of SuSE Labs |
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d055cee36942..f11d8e3b4041 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -47,7 +47,7 @@ if GPIOLIB | |||
47 | 47 | ||
48 | config OF_GPIO | 48 | config OF_GPIO |
49 | def_bool y | 49 | def_bool y |
50 | depends on OF && !SPARC | 50 | depends on OF |
51 | 51 | ||
52 | config DEBUG_GPIO | 52 | config DEBUG_GPIO |
53 | bool "Debug GPIO calls" | 53 | bool "Debug GPIO calls" |
diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c index ed3e55161bdc..f05e54258ffb 100644 --- a/drivers/gpio/gpio-74x164.c +++ b/drivers/gpio/gpio-74x164.c | |||
@@ -153,7 +153,7 @@ static int __devinit gen_74x164_probe(struct spi_device *spi) | |||
153 | } | 153 | } |
154 | 154 | ||
155 | chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; | 155 | chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; |
156 | chip->buffer = devm_kzalloc(&spi->dev, chip->gpio_chip.ngpio, GFP_KERNEL); | 156 | chip->buffer = devm_kzalloc(&spi->dev, chip->registers, GFP_KERNEL); |
157 | if (!chip->buffer) { | 157 | if (!chip->buffer) { |
158 | ret = -ENOMEM; | 158 | ret = -ENOMEM; |
159 | goto exit_destroy; | 159 | goto exit_destroy; |
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 7a874129e5d8..cf7afb9eb61a 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c | |||
@@ -244,6 +244,8 @@ static int mvebu_gpio_direction_output(struct gpio_chip *chip, unsigned pin, | |||
244 | if (ret) | 244 | if (ret) |
245 | return ret; | 245 | return ret; |
246 | 246 | ||
247 | mvebu_gpio_set(chip, pin, value); | ||
248 | |||
247 | spin_lock_irqsave(&mvchip->lock, flags); | 249 | spin_lock_irqsave(&mvchip->lock, flags); |
248 | u = readl_relaxed(mvebu_gpioreg_io_conf(mvchip)); | 250 | u = readl_relaxed(mvebu_gpioreg_io_conf(mvchip)); |
249 | u &= ~(1 << pin); | 251 | u &= ~(1 << pin); |
@@ -644,7 +646,7 @@ static int __devinit mvebu_gpio_probe(struct platform_device *pdev) | |||
644 | ct->handler = handle_edge_irq; | 646 | ct->handler = handle_edge_irq; |
645 | ct->chip.name = mvchip->chip.label; | 647 | ct->chip.name = mvchip->chip.label; |
646 | 648 | ||
647 | irq_setup_generic_chip(gc, IRQ_MSK(ngpios), IRQ_GC_INIT_MASK_CACHE, | 649 | irq_setup_generic_chip(gc, IRQ_MSK(ngpios), 0, |
648 | IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); | 650 | IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); |
649 | 651 | ||
650 | /* Setup irq domain on top of the generic chip. */ | 652 | /* Setup irq domain on top of the generic chip. */ |
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 94cbc842fbc3..d335af1d4d85 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c | |||
@@ -251,6 +251,40 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, | |||
251 | } | 251 | } |
252 | } | 252 | } |
253 | 253 | ||
254 | /** | ||
255 | * _clear_gpio_debounce - clear debounce settings for a gpio | ||
256 | * @bank: the gpio bank we're acting upon | ||
257 | * @gpio: the gpio number on this @gpio | ||
258 | * | ||
259 | * If a gpio is using debounce, then clear the debounce enable bit and if | ||
260 | * this is the only gpio in this bank using debounce, then clear the debounce | ||
261 | * time too. The debounce clock will also be disabled when calling this function | ||
262 | * if this is the only gpio in the bank using debounce. | ||
263 | */ | ||
264 | static void _clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio) | ||
265 | { | ||
266 | u32 gpio_bit = GPIO_BIT(bank, gpio); | ||
267 | |||
268 | if (!bank->dbck_flag) | ||
269 | return; | ||
270 | |||
271 | if (!(bank->dbck_enable_mask & gpio_bit)) | ||
272 | return; | ||
273 | |||
274 | bank->dbck_enable_mask &= ~gpio_bit; | ||
275 | bank->context.debounce_en &= ~gpio_bit; | ||
276 | __raw_writel(bank->context.debounce_en, | ||
277 | bank->base + bank->regs->debounce_en); | ||
278 | |||
279 | if (!bank->dbck_enable_mask) { | ||
280 | bank->context.debounce = 0; | ||
281 | __raw_writel(bank->context.debounce, bank->base + | ||
282 | bank->regs->debounce); | ||
283 | clk_disable(bank->dbck); | ||
284 | bank->dbck_enabled = false; | ||
285 | } | ||
286 | } | ||
287 | |||
254 | static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio, | 288 | static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio, |
255 | unsigned trigger) | 289 | unsigned trigger) |
256 | { | 290 | { |
@@ -539,6 +573,7 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio) | |||
539 | _set_gpio_irqenable(bank, gpio, 0); | 573 | _set_gpio_irqenable(bank, gpio, 0); |
540 | _clear_gpio_irqstatus(bank, gpio); | 574 | _clear_gpio_irqstatus(bank, gpio); |
541 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); | 575 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); |
576 | _clear_gpio_debounce(bank, gpio); | ||
542 | } | 577 | } |
543 | 578 | ||
544 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ | 579 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ |
diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c index 031c6adf5b65..1a3e2b9b4772 100644 --- a/drivers/gpio/gpio-timberdale.c +++ b/drivers/gpio/gpio-timberdale.c | |||
@@ -116,7 +116,7 @@ static void timbgpio_irq_disable(struct irq_data *d) | |||
116 | unsigned long flags; | 116 | unsigned long flags; |
117 | 117 | ||
118 | spin_lock_irqsave(&tgpio->lock, flags); | 118 | spin_lock_irqsave(&tgpio->lock, flags); |
119 | tgpio->last_ier &= ~(1 << offset); | 119 | tgpio->last_ier &= ~(1UL << offset); |
120 | iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER); | 120 | iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER); |
121 | spin_unlock_irqrestore(&tgpio->lock, flags); | 121 | spin_unlock_irqrestore(&tgpio->lock, flags); |
122 | } | 122 | } |
@@ -128,7 +128,7 @@ static void timbgpio_irq_enable(struct irq_data *d) | |||
128 | unsigned long flags; | 128 | unsigned long flags; |
129 | 129 | ||
130 | spin_lock_irqsave(&tgpio->lock, flags); | 130 | spin_lock_irqsave(&tgpio->lock, flags); |
131 | tgpio->last_ier |= 1 << offset; | 131 | tgpio->last_ier |= 1UL << offset; |
132 | iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER); | 132 | iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER); |
133 | spin_unlock_irqrestore(&tgpio->lock, flags); | 133 | spin_unlock_irqrestore(&tgpio->lock, flags); |
134 | } | 134 | } |
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 5d6c71edc739..1c8d9e3380e1 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c | |||
@@ -623,9 +623,11 @@ static ssize_t export_store(struct class *class, | |||
623 | */ | 623 | */ |
624 | 624 | ||
625 | status = gpio_request(gpio, "sysfs"); | 625 | status = gpio_request(gpio, "sysfs"); |
626 | if (status < 0) | 626 | if (status < 0) { |
627 | if (status == -EPROBE_DEFER) | ||
628 | status = -ENODEV; | ||
627 | goto done; | 629 | goto done; |
628 | 630 | } | |
629 | status = gpio_export(gpio, true); | 631 | status = gpio_export(gpio, true); |
630 | if (status < 0) | 632 | if (status < 0) |
631 | gpio_free(gpio); | 633 | gpio_free(gpio); |
@@ -1191,8 +1193,10 @@ int gpio_request(unsigned gpio, const char *label) | |||
1191 | 1193 | ||
1192 | spin_lock_irqsave(&gpio_lock, flags); | 1194 | spin_lock_irqsave(&gpio_lock, flags); |
1193 | 1195 | ||
1194 | if (!gpio_is_valid(gpio)) | 1196 | if (!gpio_is_valid(gpio)) { |
1197 | status = -EINVAL; | ||
1195 | goto done; | 1198 | goto done; |
1199 | } | ||
1196 | desc = &gpio_desc[gpio]; | 1200 | desc = &gpio_desc[gpio]; |
1197 | chip = desc->chip; | 1201 | chip = desc->chip; |
1198 | if (chip == NULL) | 1202 | if (chip == NULL) |
diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c index 7ef1b673e1be..133b4132983e 100644 --- a/drivers/gpu/drm/drm_fops.c +++ b/drivers/gpu/drm/drm_fops.c | |||
@@ -121,6 +121,8 @@ int drm_open(struct inode *inode, struct file *filp) | |||
121 | int minor_id = iminor(inode); | 121 | int minor_id = iminor(inode); |
122 | struct drm_minor *minor; | 122 | struct drm_minor *minor; |
123 | int retcode = 0; | 123 | int retcode = 0; |
124 | int need_setup = 0; | ||
125 | struct address_space *old_mapping; | ||
124 | 126 | ||
125 | minor = idr_find(&drm_minors_idr, minor_id); | 127 | minor = idr_find(&drm_minors_idr, minor_id); |
126 | if (!minor) | 128 | if (!minor) |
@@ -132,23 +134,37 @@ int drm_open(struct inode *inode, struct file *filp) | |||
132 | if (drm_device_is_unplugged(dev)) | 134 | if (drm_device_is_unplugged(dev)) |
133 | return -ENODEV; | 135 | return -ENODEV; |
134 | 136 | ||
137 | if (!dev->open_count++) | ||
138 | need_setup = 1; | ||
139 | mutex_lock(&dev->struct_mutex); | ||
140 | old_mapping = dev->dev_mapping; | ||
141 | if (old_mapping == NULL) | ||
142 | dev->dev_mapping = &inode->i_data; | ||
143 | /* ihold ensures nobody can remove inode with our i_data */ | ||
144 | ihold(container_of(dev->dev_mapping, struct inode, i_data)); | ||
145 | inode->i_mapping = dev->dev_mapping; | ||
146 | filp->f_mapping = dev->dev_mapping; | ||
147 | mutex_unlock(&dev->struct_mutex); | ||
148 | |||
135 | retcode = drm_open_helper(inode, filp, dev); | 149 | retcode = drm_open_helper(inode, filp, dev); |
136 | if (!retcode) { | 150 | if (retcode) |
137 | atomic_inc(&dev->counts[_DRM_STAT_OPENS]); | 151 | goto err_undo; |
138 | if (!dev->open_count++) | 152 | atomic_inc(&dev->counts[_DRM_STAT_OPENS]); |
139 | retcode = drm_setup(dev); | 153 | if (need_setup) { |
140 | } | 154 | retcode = drm_setup(dev); |
141 | if (!retcode) { | 155 | if (retcode) |
142 | mutex_lock(&dev->struct_mutex); | 156 | goto err_undo; |
143 | if (dev->dev_mapping == NULL) | ||
144 | dev->dev_mapping = &inode->i_data; | ||
145 | /* ihold ensures nobody can remove inode with our i_data */ | ||
146 | ihold(container_of(dev->dev_mapping, struct inode, i_data)); | ||
147 | inode->i_mapping = dev->dev_mapping; | ||
148 | filp->f_mapping = dev->dev_mapping; | ||
149 | mutex_unlock(&dev->struct_mutex); | ||
150 | } | 157 | } |
158 | return 0; | ||
151 | 159 | ||
160 | err_undo: | ||
161 | mutex_lock(&dev->struct_mutex); | ||
162 | filp->f_mapping = old_mapping; | ||
163 | inode->i_mapping = old_mapping; | ||
164 | iput(container_of(dev->dev_mapping, struct inode, i_data)); | ||
165 | dev->dev_mapping = old_mapping; | ||
166 | mutex_unlock(&dev->struct_mutex); | ||
167 | dev->open_count--; | ||
152 | return retcode; | 168 | return retcode; |
153 | } | 169 | } |
154 | EXPORT_SYMBOL(drm_open); | 170 | EXPORT_SYMBOL(drm_open); |
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig index 59a26e577b57..fc345d4ebb03 100644 --- a/drivers/gpu/drm/exynos/Kconfig +++ b/drivers/gpu/drm/exynos/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config DRM_EXYNOS | 1 | config DRM_EXYNOS |
2 | tristate "DRM Support for Samsung SoC EXYNOS Series" | 2 | tristate "DRM Support for Samsung SoC EXYNOS Series" |
3 | depends on DRM && PLAT_SAMSUNG | 3 | depends on DRM && (PLAT_SAMSUNG || ARCH_MULTIPLATFORM) |
4 | select DRM_KMS_HELPER | 4 | select DRM_KMS_HELPER |
5 | select FB_CFB_FILLRECT | 5 | select FB_CFB_FILLRECT |
6 | select FB_CFB_COPYAREA | 6 | select FB_CFB_COPYAREA |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c index 18c271862ca8..0f68a2872673 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_connector.c +++ b/drivers/gpu/drm/exynos/exynos_drm_connector.c | |||
@@ -374,6 +374,7 @@ struct drm_connector *exynos_drm_connector_create(struct drm_device *dev, | |||
374 | exynos_connector->encoder_id = encoder->base.id; | 374 | exynos_connector->encoder_id = encoder->base.id; |
375 | exynos_connector->manager = manager; | 375 | exynos_connector->manager = manager; |
376 | exynos_connector->dpms = DRM_MODE_DPMS_OFF; | 376 | exynos_connector->dpms = DRM_MODE_DPMS_OFF; |
377 | connector->dpms = DRM_MODE_DPMS_OFF; | ||
377 | connector->encoder = encoder; | 378 | connector->encoder = encoder; |
378 | 379 | ||
379 | err = drm_mode_connector_attach_encoder(connector, encoder); | 380 | err = drm_mode_connector_attach_encoder(connector, encoder); |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c b/drivers/gpu/drm/exynos/exynos_drm_encoder.c index e51503fbaf2b..241ad1eeec64 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_encoder.c +++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.c | |||
@@ -43,12 +43,14 @@ | |||
43 | * @manager: specific encoder has its own manager to control a hardware | 43 | * @manager: specific encoder has its own manager to control a hardware |
44 | * appropriately and we can access a hardware drawing on this manager. | 44 | * appropriately and we can access a hardware drawing on this manager. |
45 | * @dpms: store the encoder dpms value. | 45 | * @dpms: store the encoder dpms value. |
46 | * @updated: indicate whether overlay data updating is needed or not. | ||
46 | */ | 47 | */ |
47 | struct exynos_drm_encoder { | 48 | struct exynos_drm_encoder { |
48 | struct drm_crtc *old_crtc; | 49 | struct drm_crtc *old_crtc; |
49 | struct drm_encoder drm_encoder; | 50 | struct drm_encoder drm_encoder; |
50 | struct exynos_drm_manager *manager; | 51 | struct exynos_drm_manager *manager; |
51 | int dpms; | 52 | int dpms; |
53 | bool updated; | ||
52 | }; | 54 | }; |
53 | 55 | ||
54 | static void exynos_drm_connector_power(struct drm_encoder *encoder, int mode) | 56 | static void exynos_drm_connector_power(struct drm_encoder *encoder, int mode) |
@@ -85,7 +87,9 @@ static void exynos_drm_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
85 | switch (mode) { | 87 | switch (mode) { |
86 | case DRM_MODE_DPMS_ON: | 88 | case DRM_MODE_DPMS_ON: |
87 | if (manager_ops && manager_ops->apply) | 89 | if (manager_ops && manager_ops->apply) |
88 | manager_ops->apply(manager->dev); | 90 | if (!exynos_encoder->updated) |
91 | manager_ops->apply(manager->dev); | ||
92 | |||
89 | exynos_drm_connector_power(encoder, mode); | 93 | exynos_drm_connector_power(encoder, mode); |
90 | exynos_encoder->dpms = mode; | 94 | exynos_encoder->dpms = mode; |
91 | break; | 95 | break; |
@@ -94,6 +98,7 @@ static void exynos_drm_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
94 | case DRM_MODE_DPMS_OFF: | 98 | case DRM_MODE_DPMS_OFF: |
95 | exynos_drm_connector_power(encoder, mode); | 99 | exynos_drm_connector_power(encoder, mode); |
96 | exynos_encoder->dpms = mode; | 100 | exynos_encoder->dpms = mode; |
101 | exynos_encoder->updated = false; | ||
97 | break; | 102 | break; |
98 | default: | 103 | default: |
99 | DRM_ERROR("unspecified mode %d\n", mode); | 104 | DRM_ERROR("unspecified mode %d\n", mode); |
@@ -205,13 +210,22 @@ static void exynos_drm_encoder_prepare(struct drm_encoder *encoder) | |||
205 | 210 | ||
206 | static void exynos_drm_encoder_commit(struct drm_encoder *encoder) | 211 | static void exynos_drm_encoder_commit(struct drm_encoder *encoder) |
207 | { | 212 | { |
208 | struct exynos_drm_manager *manager = exynos_drm_get_manager(encoder); | 213 | struct exynos_drm_encoder *exynos_encoder = to_exynos_encoder(encoder); |
214 | struct exynos_drm_manager *manager = exynos_encoder->manager; | ||
209 | struct exynos_drm_manager_ops *manager_ops = manager->ops; | 215 | struct exynos_drm_manager_ops *manager_ops = manager->ops; |
210 | 216 | ||
211 | DRM_DEBUG_KMS("%s\n", __FILE__); | 217 | DRM_DEBUG_KMS("%s\n", __FILE__); |
212 | 218 | ||
213 | if (manager_ops && manager_ops->commit) | 219 | if (manager_ops && manager_ops->commit) |
214 | manager_ops->commit(manager->dev); | 220 | manager_ops->commit(manager->dev); |
221 | |||
222 | /* | ||
223 | * this will avoid one issue that overlay data is updated to | ||
224 | * real hardware two times. | ||
225 | * And this variable will be used to check if the data was | ||
226 | * already updated or not by exynos_drm_encoder_dpms function. | ||
227 | */ | ||
228 | exynos_encoder->updated = true; | ||
215 | } | 229 | } |
216 | 230 | ||
217 | static void exynos_drm_encoder_disable(struct drm_encoder *encoder) | 231 | static void exynos_drm_encoder_disable(struct drm_encoder *encoder) |
@@ -401,19 +415,6 @@ void exynos_drm_encoder_crtc_dpms(struct drm_encoder *encoder, void *data) | |||
401 | manager_ops->dpms(manager->dev, mode); | 415 | manager_ops->dpms(manager->dev, mode); |
402 | 416 | ||
403 | /* | 417 | /* |
404 | * set current mode to new one so that data aren't updated into | ||
405 | * registers by drm_helper_connector_dpms two times. | ||
406 | * | ||
407 | * in case that drm_crtc_helper_set_mode() is called, | ||
408 | * overlay_ops->commit() and manager_ops->commit() callbacks | ||
409 | * can be called two times, first at drm_crtc_helper_set_mode() | ||
410 | * and second at drm_helper_connector_dpms(). | ||
411 | * so with this setting, when drm_helper_connector_dpms() is called | ||
412 | * encoder->funcs->dpms() will be ignored. | ||
413 | */ | ||
414 | exynos_encoder->dpms = mode; | ||
415 | |||
416 | /* | ||
417 | * if this condition is ok then it means that the crtc is already | 418 | * if this condition is ok then it means that the crtc is already |
418 | * detached from encoder and last function for detaching is properly | 419 | * detached from encoder and last function for detaching is properly |
419 | * done, so clear pipe from manager to prevent repeated call. | 420 | * done, so clear pipe from manager to prevent repeated call. |
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 614b2e9ac462..e7fbb823fd8e 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
@@ -1142,7 +1142,7 @@ static int __devinit mixer_probe(struct platform_device *pdev) | |||
1142 | const struct of_device_id *match; | 1142 | const struct of_device_id *match; |
1143 | match = of_match_node(of_match_ptr(mixer_match_types), | 1143 | match = of_match_node(of_match_ptr(mixer_match_types), |
1144 | pdev->dev.of_node); | 1144 | pdev->dev.of_node); |
1145 | drv = match->data; | 1145 | drv = (struct mixer_drv_data *)match->data; |
1146 | } else { | 1146 | } else { |
1147 | drv = (struct mixer_drv_data *) | 1147 | drv = (struct mixer_drv_data *) |
1148 | platform_get_device_id(pdev)->driver_data; | 1148 | platform_get_device_id(pdev)->driver_data; |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index c9bfd83dde64..61ae104dca8c 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1505,7 +1505,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
1505 | goto put_gmch; | 1505 | goto put_gmch; |
1506 | } | 1506 | } |
1507 | 1507 | ||
1508 | i915_kick_out_firmware_fb(dev_priv); | 1508 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
1509 | i915_kick_out_firmware_fb(dev_priv); | ||
1509 | 1510 | ||
1510 | pci_set_master(dev->pdev); | 1511 | pci_set_master(dev->pdev); |
1511 | 1512 | ||
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index f78061af7045..b726b478a4f5 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
@@ -729,7 +729,7 @@ void intel_crt_init(struct drm_device *dev) | |||
729 | 729 | ||
730 | crt->base.type = INTEL_OUTPUT_ANALOG; | 730 | crt->base.type = INTEL_OUTPUT_ANALOG; |
731 | crt->base.cloneable = true; | 731 | crt->base.cloneable = true; |
732 | if (IS_HASWELL(dev)) | 732 | if (IS_HASWELL(dev) || IS_I830(dev)) |
733 | crt->base.crtc_mask = (1 << 0); | 733 | crt->base.crtc_mask = (1 << 0); |
734 | else | 734 | else |
735 | crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); | 735 | crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 495625914e4a..d7bc817f51a0 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c | |||
@@ -341,9 +341,17 @@ static int intel_overlay_off(struct intel_overlay *overlay) | |||
341 | intel_ring_emit(ring, flip_addr); | 341 | intel_ring_emit(ring, flip_addr); |
342 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); | 342 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); |
343 | /* turn overlay off */ | 343 | /* turn overlay off */ |
344 | intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF); | 344 | if (IS_I830(dev)) { |
345 | intel_ring_emit(ring, flip_addr); | 345 | /* Workaround: Don't disable the overlay fully, since otherwise |
346 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); | 346 | * it dies on the next OVERLAY_ON cmd. */ |
347 | intel_ring_emit(ring, MI_NOOP); | ||
348 | intel_ring_emit(ring, MI_NOOP); | ||
349 | intel_ring_emit(ring, MI_NOOP); | ||
350 | } else { | ||
351 | intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF); | ||
352 | intel_ring_emit(ring, flip_addr); | ||
353 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); | ||
354 | } | ||
347 | intel_ring_advance(ring); | 355 | intel_ring_advance(ring); |
348 | 356 | ||
349 | return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail); | 357 | return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail); |
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index e019b2369861..e2aacd329545 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c | |||
@@ -435,7 +435,7 @@ int intel_panel_setup_backlight(struct drm_device *dev) | |||
435 | props.type = BACKLIGHT_RAW; | 435 | props.type = BACKLIGHT_RAW; |
436 | props.max_brightness = _intel_panel_get_max_backlight(dev); | 436 | props.max_brightness = _intel_panel_get_max_backlight(dev); |
437 | if (props.max_brightness == 0) { | 437 | if (props.max_brightness == 0) { |
438 | DRM_ERROR("Failed to get maximum backlight value\n"); | 438 | DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n"); |
439 | return -ENODEV; | 439 | return -ENODEV; |
440 | } | 440 | } |
441 | dev_priv->backlight = | 441 | dev_priv->backlight = |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index c01d97db0061..79d308da29ff 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -894,6 +894,45 @@ static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) | |||
894 | } | 894 | } |
895 | #endif | 895 | #endif |
896 | 896 | ||
897 | static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, | ||
898 | unsigned if_index, uint8_t tx_rate, | ||
899 | uint8_t *data, unsigned length) | ||
900 | { | ||
901 | uint8_t set_buf_index[2] = { if_index, 0 }; | ||
902 | uint8_t hbuf_size, tmp[8]; | ||
903 | int i; | ||
904 | |||
905 | if (!intel_sdvo_set_value(intel_sdvo, | ||
906 | SDVO_CMD_SET_HBUF_INDEX, | ||
907 | set_buf_index, 2)) | ||
908 | return false; | ||
909 | |||
910 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, | ||
911 | &hbuf_size, 1)) | ||
912 | return false; | ||
913 | |||
914 | /* Buffer size is 0 based, hooray! */ | ||
915 | hbuf_size++; | ||
916 | |||
917 | DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", | ||
918 | if_index, length, hbuf_size); | ||
919 | |||
920 | for (i = 0; i < hbuf_size; i += 8) { | ||
921 | memset(tmp, 0, 8); | ||
922 | if (i < length) | ||
923 | memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); | ||
924 | |||
925 | if (!intel_sdvo_set_value(intel_sdvo, | ||
926 | SDVO_CMD_SET_HBUF_DATA, | ||
927 | tmp, 8)) | ||
928 | return false; | ||
929 | } | ||
930 | |||
931 | return intel_sdvo_set_value(intel_sdvo, | ||
932 | SDVO_CMD_SET_HBUF_TXRATE, | ||
933 | &tx_rate, 1); | ||
934 | } | ||
935 | |||
897 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) | 936 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) |
898 | { | 937 | { |
899 | struct dip_infoframe avi_if = { | 938 | struct dip_infoframe avi_if = { |
@@ -901,11 +940,7 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) | |||
901 | .ver = DIP_VERSION_AVI, | 940 | .ver = DIP_VERSION_AVI, |
902 | .len = DIP_LEN_AVI, | 941 | .len = DIP_LEN_AVI, |
903 | }; | 942 | }; |
904 | uint8_t tx_rate = SDVO_HBUF_TX_VSYNC; | ||
905 | uint8_t set_buf_index[2] = { 1, 0 }; | ||
906 | uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; | 943 | uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; |
907 | uint64_t *data = (uint64_t *)sdvo_data; | ||
908 | unsigned i; | ||
909 | 944 | ||
910 | intel_dip_infoframe_csum(&avi_if); | 945 | intel_dip_infoframe_csum(&avi_if); |
911 | 946 | ||
@@ -915,22 +950,9 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) | |||
915 | sdvo_data[3] = avi_if.checksum; | 950 | sdvo_data[3] = avi_if.checksum; |
916 | memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); | 951 | memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); |
917 | 952 | ||
918 | if (!intel_sdvo_set_value(intel_sdvo, | 953 | return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, |
919 | SDVO_CMD_SET_HBUF_INDEX, | 954 | SDVO_HBUF_TX_VSYNC, |
920 | set_buf_index, 2)) | 955 | sdvo_data, sizeof(sdvo_data)); |
921 | return false; | ||
922 | |||
923 | for (i = 0; i < sizeof(sdvo_data); i += 8) { | ||
924 | if (!intel_sdvo_set_value(intel_sdvo, | ||
925 | SDVO_CMD_SET_HBUF_DATA, | ||
926 | data, 8)) | ||
927 | return false; | ||
928 | data++; | ||
929 | } | ||
930 | |||
931 | return intel_sdvo_set_value(intel_sdvo, | ||
932 | SDVO_CMD_SET_HBUF_TXRATE, | ||
933 | &tx_rate, 1); | ||
934 | } | 956 | } |
935 | 957 | ||
936 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) | 958 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) |
diff --git a/drivers/gpu/drm/i915/intel_sdvo_regs.h b/drivers/gpu/drm/i915/intel_sdvo_regs.h index 9d030142ee43..770bdd6ecd9f 100644 --- a/drivers/gpu/drm/i915/intel_sdvo_regs.h +++ b/drivers/gpu/drm/i915/intel_sdvo_regs.h | |||
@@ -708,6 +708,8 @@ struct intel_sdvo_enhancements_arg { | |||
708 | #define SDVO_CMD_SET_AUDIO_STAT 0x91 | 708 | #define SDVO_CMD_SET_AUDIO_STAT 0x91 |
709 | #define SDVO_CMD_GET_AUDIO_STAT 0x92 | 709 | #define SDVO_CMD_GET_AUDIO_STAT 0x92 |
710 | #define SDVO_CMD_SET_HBUF_INDEX 0x93 | 710 | #define SDVO_CMD_SET_HBUF_INDEX 0x93 |
711 | #define SDVO_HBUF_INDEX_ELD 0 | ||
712 | #define SDVO_HBUF_INDEX_AVI_IF 1 | ||
711 | #define SDVO_CMD_GET_HBUF_INDEX 0x94 | 713 | #define SDVO_CMD_GET_HBUF_INDEX 0x94 |
712 | #define SDVO_CMD_GET_HBUF_INFO 0x95 | 714 | #define SDVO_CMD_GET_HBUF_INFO 0x95 |
713 | #define SDVO_CMD_SET_HBUF_AV_SPLIT 0x96 | 715 | #define SDVO_CMD_SET_HBUF_AV_SPLIT 0x96 |
diff --git a/drivers/gpu/drm/nouveau/core/core/mm.c b/drivers/gpu/drm/nouveau/core/core/mm.c index 4d6206448670..a6d3cd6490f7 100644 --- a/drivers/gpu/drm/nouveau/core/core/mm.c +++ b/drivers/gpu/drm/nouveau/core/core/mm.c | |||
@@ -218,13 +218,16 @@ nouveau_mm_init(struct nouveau_mm *mm, u32 offset, u32 length, u32 block) | |||
218 | node = kzalloc(sizeof(*node), GFP_KERNEL); | 218 | node = kzalloc(sizeof(*node), GFP_KERNEL); |
219 | if (!node) | 219 | if (!node) |
220 | return -ENOMEM; | 220 | return -ENOMEM; |
221 | node->offset = roundup(offset, mm->block_size); | 221 | |
222 | node->length = rounddown(offset + length, mm->block_size) - node->offset; | 222 | if (length) { |
223 | node->offset = roundup(offset, mm->block_size); | ||
224 | node->length = rounddown(offset + length, mm->block_size); | ||
225 | node->length -= node->offset; | ||
226 | } | ||
223 | 227 | ||
224 | list_add_tail(&node->nl_entry, &mm->nodes); | 228 | list_add_tail(&node->nl_entry, &mm->nodes); |
225 | list_add_tail(&node->fl_entry, &mm->free); | 229 | list_add_tail(&node->fl_entry, &mm->free); |
226 | mm->heap_nodes++; | 230 | mm->heap_nodes++; |
227 | mm->heap_size += length; | ||
228 | return 0; | 231 | return 0; |
229 | } | 232 | } |
230 | 233 | ||
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c index 16a9afb1060b..05a909a17cee 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c | |||
@@ -22,6 +22,8 @@ | |||
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include <subdev/bar.h> | ||
26 | |||
25 | #include <engine/software.h> | 27 | #include <engine/software.h> |
26 | #include <engine/disp.h> | 28 | #include <engine/disp.h> |
27 | 29 | ||
@@ -37,6 +39,7 @@ nv50_disp_sclass[] = { | |||
37 | static void | 39 | static void |
38 | nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) | 40 | nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) |
39 | { | 41 | { |
42 | struct nouveau_bar *bar = nouveau_bar(priv); | ||
40 | struct nouveau_disp *disp = &priv->base; | 43 | struct nouveau_disp *disp = &priv->base; |
41 | struct nouveau_software_chan *chan, *temp; | 44 | struct nouveau_software_chan *chan, *temp; |
42 | unsigned long flags; | 45 | unsigned long flags; |
@@ -46,18 +49,19 @@ nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) | |||
46 | if (chan->vblank.crtc != crtc) | 49 | if (chan->vblank.crtc != crtc) |
47 | continue; | 50 | continue; |
48 | 51 | ||
49 | nv_wr32(priv, 0x001704, chan->vblank.channel); | ||
50 | nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma); | ||
51 | |||
52 | if (nv_device(priv)->chipset == 0x50) { | 52 | if (nv_device(priv)->chipset == 0x50) { |
53 | nv_wr32(priv, 0x001704, chan->vblank.channel); | ||
54 | nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma); | ||
55 | bar->flush(bar); | ||
53 | nv_wr32(priv, 0x001570, chan->vblank.offset); | 56 | nv_wr32(priv, 0x001570, chan->vblank.offset); |
54 | nv_wr32(priv, 0x001574, chan->vblank.value); | 57 | nv_wr32(priv, 0x001574, chan->vblank.value); |
55 | } else { | 58 | } else { |
56 | if (nv_device(priv)->chipset >= 0xc0) { | 59 | nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel); |
57 | nv_wr32(priv, 0x06000c, | 60 | bar->flush(bar); |
58 | upper_32_bits(chan->vblank.offset)); | 61 | nv_wr32(priv, 0x06000c, |
59 | } | 62 | upper_32_bits(chan->vblank.offset)); |
60 | nv_wr32(priv, 0x060010, chan->vblank.offset); | 63 | nv_wr32(priv, 0x060010, |
64 | lower_32_bits(chan->vblank.offset)); | ||
61 | nv_wr32(priv, 0x060014, chan->vblank.value); | 65 | nv_wr32(priv, 0x060014, chan->vblank.value); |
62 | } | 66 | } |
63 | 67 | ||
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c index 8d0021049ec0..425001204a89 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c | |||
@@ -156,8 +156,8 @@ nv40_graph_context_ctor(struct nouveau_object *parent, | |||
156 | static int | 156 | static int |
157 | nv40_graph_context_fini(struct nouveau_object *object, bool suspend) | 157 | nv40_graph_context_fini(struct nouveau_object *object, bool suspend) |
158 | { | 158 | { |
159 | struct nv04_graph_priv *priv = (void *)object->engine; | 159 | struct nv40_graph_priv *priv = (void *)object->engine; |
160 | struct nv04_graph_chan *chan = (void *)object; | 160 | struct nv40_graph_chan *chan = (void *)object; |
161 | u32 inst = 0x01000000 | nv_gpuobj(chan)->addr >> 4; | 161 | u32 inst = 0x01000000 | nv_gpuobj(chan)->addr >> 4; |
162 | int ret = 0; | 162 | int ret = 0; |
163 | 163 | ||
diff --git a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c index 12418574efea..f7c581ad1991 100644 --- a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c +++ b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c | |||
@@ -38,7 +38,7 @@ struct nv40_mpeg_priv { | |||
38 | }; | 38 | }; |
39 | 39 | ||
40 | struct nv40_mpeg_chan { | 40 | struct nv40_mpeg_chan { |
41 | struct nouveau_mpeg base; | 41 | struct nouveau_mpeg_chan base; |
42 | }; | 42 | }; |
43 | 43 | ||
44 | /******************************************************************************* | 44 | /******************************************************************************* |
diff --git a/drivers/gpu/drm/nouveau/core/include/core/mm.h b/drivers/gpu/drm/nouveau/core/include/core/mm.h index 9ee9bf4028ca..975137ba34a6 100644 --- a/drivers/gpu/drm/nouveau/core/include/core/mm.h +++ b/drivers/gpu/drm/nouveau/core/include/core/mm.h | |||
@@ -19,7 +19,6 @@ struct nouveau_mm { | |||
19 | 19 | ||
20 | u32 block_size; | 20 | u32 block_size; |
21 | int heap_nodes; | 21 | int heap_nodes; |
22 | u32 heap_size; | ||
23 | }; | 22 | }; |
24 | 23 | ||
25 | int nouveau_mm_init(struct nouveau_mm *, u32 offset, u32 length, u32 block); | 24 | int nouveau_mm_init(struct nouveau_mm *, u32 offset, u32 length, u32 block); |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c index 27fb1af7a779..5f570806143a 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c | |||
@@ -219,13 +219,11 @@ nv50_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, | |||
219 | ((priv->base.ram.size & 0x000000ff) << 32); | 219 | ((priv->base.ram.size & 0x000000ff) << 32); |
220 | 220 | ||
221 | tags = nv_rd32(priv, 0x100320); | 221 | tags = nv_rd32(priv, 0x100320); |
222 | if (tags) { | 222 | ret = nouveau_mm_init(&priv->base.tags, 0, tags, 1); |
223 | ret = nouveau_mm_init(&priv->base.tags, 0, tags, 1); | 223 | if (ret) |
224 | if (ret) | 224 | return ret; |
225 | return ret; | ||
226 | 225 | ||
227 | nv_debug(priv, "%d compression tags\n", tags); | 226 | nv_debug(priv, "%d compression tags\n", tags); |
228 | } | ||
229 | 227 | ||
230 | size = (priv->base.ram.size >> 12) - rsvd_head - rsvd_tail; | 228 | size = (priv->base.ram.size >> 12) - rsvd_head - rsvd_tail; |
231 | switch (device->chipset) { | 229 | switch (device->chipset) { |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/i2c/base.c b/drivers/gpu/drm/nouveau/core/subdev/i2c/base.c index 3d2c88310f98..dbfc2abf0cfe 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/i2c/base.c +++ b/drivers/gpu/drm/nouveau/core/subdev/i2c/base.c | |||
@@ -292,7 +292,7 @@ nouveau_i2c_ctor(struct nouveau_object *parent, struct nouveau_object *engine, | |||
292 | case DCB_I2C_NVIO_BIT: | 292 | case DCB_I2C_NVIO_BIT: |
293 | port->drive = info.drive & 0x0f; | 293 | port->drive = info.drive & 0x0f; |
294 | if (device->card_type < NV_D0) { | 294 | if (device->card_type < NV_D0) { |
295 | if (info.drive >= ARRAY_SIZE(nv50_i2c_port)) | 295 | if (port->drive >= ARRAY_SIZE(nv50_i2c_port)) |
296 | break; | 296 | break; |
297 | port->drive = nv50_i2c_port[port->drive]; | 297 | port->drive = nv50_i2c_port[port->drive]; |
298 | port->sense = port->drive; | 298 | port->sense = port->drive; |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c index 49050d991e75..9474cfca6e4c 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c | |||
@@ -67,7 +67,7 @@ nv41_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt) | |||
67 | static void | 67 | static void |
68 | nv41_vm_flush(struct nouveau_vm *vm) | 68 | nv41_vm_flush(struct nouveau_vm *vm) |
69 | { | 69 | { |
70 | struct nv04_vm_priv *priv = (void *)vm->vmm; | 70 | struct nv04_vmmgr_priv *priv = (void *)vm->vmm; |
71 | 71 | ||
72 | mutex_lock(&nv_subdev(priv)->mutex); | 72 | mutex_lock(&nv_subdev(priv)->mutex); |
73 | nv_wr32(priv, 0x100810, 0x00000022); | 73 | nv_wr32(priv, 0x100810, 0x00000022); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 9a6e2cb282dc..d3595b23434a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c | |||
@@ -355,7 +355,7 @@ nouveau_connector_detect_lvds(struct drm_connector *connector, bool force) | |||
355 | * valid - it's not (rh#613284) | 355 | * valid - it's not (rh#613284) |
356 | */ | 356 | */ |
357 | if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) { | 357 | if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) { |
358 | if (!(nv_connector->edid = nouveau_acpi_edid(dev, connector))) { | 358 | if ((nv_connector->edid = nouveau_acpi_edid(dev, connector))) { |
359 | status = connector_status_connected; | 359 | status = connector_status_connected; |
360 | goto out; | 360 | goto out; |
361 | } | 361 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index d2f8ffeed742..86124b131f4f 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c | |||
@@ -290,6 +290,7 @@ nouveau_display_create(struct drm_device *dev) | |||
290 | struct nouveau_drm *drm = nouveau_drm(dev); | 290 | struct nouveau_drm *drm = nouveau_drm(dev); |
291 | struct nouveau_disp *pdisp = nouveau_disp(drm->device); | 291 | struct nouveau_disp *pdisp = nouveau_disp(drm->device); |
292 | struct nouveau_display *disp; | 292 | struct nouveau_display *disp; |
293 | u32 pclass = dev->pdev->class >> 8; | ||
293 | int ret, gen; | 294 | int ret, gen; |
294 | 295 | ||
295 | disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL); | 296 | disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL); |
@@ -360,23 +361,27 @@ nouveau_display_create(struct drm_device *dev) | |||
360 | drm_kms_helper_poll_init(dev); | 361 | drm_kms_helper_poll_init(dev); |
361 | drm_kms_helper_poll_disable(dev); | 362 | drm_kms_helper_poll_disable(dev); |
362 | 363 | ||
363 | if (nv_device(drm->device)->card_type < NV_50) | 364 | if (nouveau_modeset == 1 || |
364 | ret = nv04_display_create(dev); | 365 | (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) { |
365 | else | 366 | if (nv_device(drm->device)->card_type < NV_50) |
366 | if (nv_device(drm->device)->card_type < NV_D0) | 367 | ret = nv04_display_create(dev); |
367 | ret = nv50_display_create(dev); | 368 | else |
368 | else | 369 | if (nv_device(drm->device)->card_type < NV_D0) |
369 | ret = nvd0_display_create(dev); | 370 | ret = nv50_display_create(dev); |
370 | if (ret) | 371 | else |
371 | goto disp_create_err; | 372 | ret = nvd0_display_create(dev); |
372 | |||
373 | if (dev->mode_config.num_crtc) { | ||
374 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | ||
375 | if (ret) | 373 | if (ret) |
376 | goto vblank_err; | 374 | goto disp_create_err; |
375 | |||
376 | if (dev->mode_config.num_crtc) { | ||
377 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | ||
378 | if (ret) | ||
379 | goto vblank_err; | ||
380 | } | ||
381 | |||
382 | nouveau_backlight_init(dev); | ||
377 | } | 383 | } |
378 | 384 | ||
379 | nouveau_backlight_init(dev); | ||
380 | return 0; | 385 | return 0; |
381 | 386 | ||
382 | vblank_err: | 387 | vblank_err: |
@@ -395,7 +400,8 @@ nouveau_display_destroy(struct drm_device *dev) | |||
395 | nouveau_backlight_exit(dev); | 400 | nouveau_backlight_exit(dev); |
396 | drm_vblank_cleanup(dev); | 401 | drm_vblank_cleanup(dev); |
397 | 402 | ||
398 | disp->dtor(dev); | 403 | if (disp->dtor) |
404 | disp->dtor(dev); | ||
399 | 405 | ||
400 | drm_kms_helper_poll_fini(dev); | 406 | drm_kms_helper_poll_fini(dev); |
401 | drm_mode_config_cleanup(dev); | 407 | drm_mode_config_cleanup(dev); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index ccae8c26ae2b..0910125cbbc3 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c | |||
@@ -63,8 +63,9 @@ MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); | |||
63 | static int nouveau_noaccel = 0; | 63 | static int nouveau_noaccel = 0; |
64 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | 64 | module_param_named(noaccel, nouveau_noaccel, int, 0400); |
65 | 65 | ||
66 | MODULE_PARM_DESC(modeset, "enable driver"); | 66 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
67 | static int nouveau_modeset = -1; | 67 | "0 = disabled, 1 = enabled, 2 = headless)"); |
68 | int nouveau_modeset = -1; | ||
68 | module_param_named(modeset, nouveau_modeset, int, 0400); | 69 | module_param_named(modeset, nouveau_modeset, int, 0400); |
69 | 70 | ||
70 | static struct drm_driver driver; | 71 | static struct drm_driver driver; |
@@ -363,7 +364,8 @@ nouveau_drm_unload(struct drm_device *dev) | |||
363 | 364 | ||
364 | nouveau_pm_fini(dev); | 365 | nouveau_pm_fini(dev); |
365 | 366 | ||
366 | nouveau_display_fini(dev); | 367 | if (dev->mode_config.num_crtc) |
368 | nouveau_display_fini(dev); | ||
367 | nouveau_display_destroy(dev); | 369 | nouveau_display_destroy(dev); |
368 | 370 | ||
369 | nouveau_irq_fini(dev); | 371 | nouveau_irq_fini(dev); |
@@ -403,13 +405,15 @@ nouveau_drm_suspend(struct pci_dev *pdev, pm_message_t pm_state) | |||
403 | pm_state.event == PM_EVENT_PRETHAW) | 405 | pm_state.event == PM_EVENT_PRETHAW) |
404 | return 0; | 406 | return 0; |
405 | 407 | ||
406 | NV_INFO(drm, "suspending fbcon...\n"); | 408 | if (dev->mode_config.num_crtc) { |
407 | nouveau_fbcon_set_suspend(dev, 1); | 409 | NV_INFO(drm, "suspending fbcon...\n"); |
410 | nouveau_fbcon_set_suspend(dev, 1); | ||
408 | 411 | ||
409 | NV_INFO(drm, "suspending display...\n"); | 412 | NV_INFO(drm, "suspending display...\n"); |
410 | ret = nouveau_display_suspend(dev); | 413 | ret = nouveau_display_suspend(dev); |
411 | if (ret) | 414 | if (ret) |
412 | return ret; | 415 | return ret; |
416 | } | ||
413 | 417 | ||
414 | NV_INFO(drm, "evicting buffers...\n"); | 418 | NV_INFO(drm, "evicting buffers...\n"); |
415 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); | 419 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
@@ -445,8 +449,10 @@ fail_client: | |||
445 | nouveau_client_init(&cli->base); | 449 | nouveau_client_init(&cli->base); |
446 | } | 450 | } |
447 | 451 | ||
448 | NV_INFO(drm, "resuming display...\n"); | 452 | if (dev->mode_config.num_crtc) { |
449 | nouveau_display_resume(dev); | 453 | NV_INFO(drm, "resuming display...\n"); |
454 | nouveau_display_resume(dev); | ||
455 | } | ||
450 | return ret; | 456 | return ret; |
451 | } | 457 | } |
452 | 458 | ||
@@ -486,8 +492,10 @@ nouveau_drm_resume(struct pci_dev *pdev) | |||
486 | nouveau_irq_postinstall(dev); | 492 | nouveau_irq_postinstall(dev); |
487 | nouveau_pm_resume(dev); | 493 | nouveau_pm_resume(dev); |
488 | 494 | ||
489 | NV_INFO(drm, "resuming display...\n"); | 495 | if (dev->mode_config.num_crtc) { |
490 | nouveau_display_resume(dev); | 496 | NV_INFO(drm, "resuming display...\n"); |
497 | nouveau_display_resume(dev); | ||
498 | } | ||
491 | return 0; | 499 | return 0; |
492 | } | 500 | } |
493 | 501 | ||
@@ -662,9 +670,7 @@ nouveau_drm_init(void) | |||
662 | #ifdef CONFIG_VGA_CONSOLE | 670 | #ifdef CONFIG_VGA_CONSOLE |
663 | if (vgacon_text_force()) | 671 | if (vgacon_text_force()) |
664 | nouveau_modeset = 0; | 672 | nouveau_modeset = 0; |
665 | else | ||
666 | #endif | 673 | #endif |
667 | nouveau_modeset = 1; | ||
668 | } | 674 | } |
669 | 675 | ||
670 | if (!nouveau_modeset) | 676 | if (!nouveau_modeset) |
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.h b/drivers/gpu/drm/nouveau/nouveau_drm.h index 819471217546..a10169927086 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.h +++ b/drivers/gpu/drm/nouveau/nouveau_drm.h | |||
@@ -141,4 +141,6 @@ int nouveau_drm_resume(struct pci_dev *); | |||
141 | nv_info((cli), fmt, ##args); \ | 141 | nv_info((cli), fmt, ##args); \ |
142 | } while (0) | 142 | } while (0) |
143 | 143 | ||
144 | extern int nouveau_modeset; | ||
145 | |||
144 | #endif | 146 | #endif |
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c index 9ca8afdb5549..1d8cb506a28a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_irq.c +++ b/drivers/gpu/drm/nouveau/nouveau_irq.c | |||
@@ -61,13 +61,15 @@ nouveau_irq_handler(DRM_IRQ_ARGS) | |||
61 | 61 | ||
62 | nv_subdev(pmc)->intr(nv_subdev(pmc)); | 62 | nv_subdev(pmc)->intr(nv_subdev(pmc)); |
63 | 63 | ||
64 | if (device->card_type >= NV_D0) { | 64 | if (dev->mode_config.num_crtc) { |
65 | if (nv_rd32(device, 0x000100) & 0x04000000) | 65 | if (device->card_type >= NV_D0) { |
66 | nvd0_display_intr(dev); | 66 | if (nv_rd32(device, 0x000100) & 0x04000000) |
67 | } else | 67 | nvd0_display_intr(dev); |
68 | if (device->card_type >= NV_50) { | 68 | } else |
69 | if (nv_rd32(device, 0x000100) & 0x04000000) | 69 | if (device->card_type >= NV_50) { |
70 | nv50_display_intr(dev); | 70 | if (nv_rd32(device, 0x000100) & 0x04000000) |
71 | nv50_display_intr(dev); | ||
72 | } | ||
71 | } | 73 | } |
72 | 74 | ||
73 | return IRQ_HANDLED; | 75 | return IRQ_HANDLED; |
diff --git a/drivers/gpu/drm/nouveau/nv04_dac.c b/drivers/gpu/drm/nouveau/nv04_dac.c index 347a3bd78d04..64f7020fb605 100644 --- a/drivers/gpu/drm/nouveau/nv04_dac.c +++ b/drivers/gpu/drm/nouveau/nv04_dac.c | |||
@@ -220,7 +220,7 @@ out: | |||
220 | NVWriteVgaCrtc(dev, 0, NV_CIO_CR_MODE_INDEX, saved_cr_mode); | 220 | NVWriteVgaCrtc(dev, 0, NV_CIO_CR_MODE_INDEX, saved_cr_mode); |
221 | 221 | ||
222 | if (blue == 0x18) { | 222 | if (blue == 0x18) { |
223 | NV_INFO(drm, "Load detected on head A\n"); | 223 | NV_DEBUG(drm, "Load detected on head A\n"); |
224 | return connector_status_connected; | 224 | return connector_status_connected; |
225 | } | 225 | } |
226 | 226 | ||
@@ -338,8 +338,8 @@ nv17_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector) | |||
338 | 338 | ||
339 | if (nv17_dac_sample_load(encoder) & | 339 | if (nv17_dac_sample_load(encoder) & |
340 | NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI) { | 340 | NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI) { |
341 | NV_INFO(drm, "Load detected on output %c\n", | 341 | NV_DEBUG(drm, "Load detected on output %c\n", |
342 | '@' + ffs(dcb->or)); | 342 | '@' + ffs(dcb->or)); |
343 | return connector_status_connected; | 343 | return connector_status_connected; |
344 | } else { | 344 | } else { |
345 | return connector_status_disconnected; | 345 | return connector_status_disconnected; |
@@ -413,9 +413,9 @@ static void nv04_dac_commit(struct drm_encoder *encoder) | |||
413 | 413 | ||
414 | helper->dpms(encoder, DRM_MODE_DPMS_ON); | 414 | helper->dpms(encoder, DRM_MODE_DPMS_ON); |
415 | 415 | ||
416 | NV_INFO(drm, "Output %s is running on CRTC %d using output %c\n", | 416 | NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n", |
417 | drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), | 417 | drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), |
418 | nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); | 418 | nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); |
419 | } | 419 | } |
420 | 420 | ||
421 | void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable) | 421 | void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable) |
@@ -461,8 +461,8 @@ static void nv04_dac_dpms(struct drm_encoder *encoder, int mode) | |||
461 | return; | 461 | return; |
462 | nv_encoder->last_dpms = mode; | 462 | nv_encoder->last_dpms = mode; |
463 | 463 | ||
464 | NV_INFO(drm, "Setting dpms mode %d on vga encoder (output %d)\n", | 464 | NV_DEBUG(drm, "Setting dpms mode %d on vga encoder (output %d)\n", |
465 | mode, nv_encoder->dcb->index); | 465 | mode, nv_encoder->dcb->index); |
466 | 466 | ||
467 | nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON); | 467 | nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON); |
468 | } | 468 | } |
diff --git a/drivers/gpu/drm/nouveau/nv04_dfp.c b/drivers/gpu/drm/nouveau/nv04_dfp.c index da55d7642c8c..184cdf806761 100644 --- a/drivers/gpu/drm/nouveau/nv04_dfp.c +++ b/drivers/gpu/drm/nouveau/nv04_dfp.c | |||
@@ -476,9 +476,9 @@ static void nv04_dfp_commit(struct drm_encoder *encoder) | |||
476 | 476 | ||
477 | helper->dpms(encoder, DRM_MODE_DPMS_ON); | 477 | helper->dpms(encoder, DRM_MODE_DPMS_ON); |
478 | 478 | ||
479 | NV_INFO(drm, "Output %s is running on CRTC %d using output %c\n", | 479 | NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n", |
480 | drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), | 480 | drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), |
481 | nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); | 481 | nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); |
482 | } | 482 | } |
483 | 483 | ||
484 | static void nv04_dfp_update_backlight(struct drm_encoder *encoder, int mode) | 484 | static void nv04_dfp_update_backlight(struct drm_encoder *encoder, int mode) |
@@ -520,8 +520,8 @@ static void nv04_lvds_dpms(struct drm_encoder *encoder, int mode) | |||
520 | return; | 520 | return; |
521 | nv_encoder->last_dpms = mode; | 521 | nv_encoder->last_dpms = mode; |
522 | 522 | ||
523 | NV_INFO(drm, "Setting dpms mode %d on lvds encoder (output %d)\n", | 523 | NV_DEBUG(drm, "Setting dpms mode %d on lvds encoder (output %d)\n", |
524 | mode, nv_encoder->dcb->index); | 524 | mode, nv_encoder->dcb->index); |
525 | 525 | ||
526 | if (was_powersaving && is_powersaving_dpms(mode)) | 526 | if (was_powersaving && is_powersaving_dpms(mode)) |
527 | return; | 527 | return; |
@@ -565,8 +565,8 @@ static void nv04_tmds_dpms(struct drm_encoder *encoder, int mode) | |||
565 | return; | 565 | return; |
566 | nv_encoder->last_dpms = mode; | 566 | nv_encoder->last_dpms = mode; |
567 | 567 | ||
568 | NV_INFO(drm, "Setting dpms mode %d on tmds encoder (output %d)\n", | 568 | NV_DEBUG(drm, "Setting dpms mode %d on tmds encoder (output %d)\n", |
569 | mode, nv_encoder->dcb->index); | 569 | mode, nv_encoder->dcb->index); |
570 | 570 | ||
571 | nv04_dfp_update_backlight(encoder, mode); | 571 | nv04_dfp_update_backlight(encoder, mode); |
572 | nv04_dfp_update_fp_control(encoder, mode); | 572 | nv04_dfp_update_fp_control(encoder, mode); |
diff --git a/drivers/gpu/drm/nouveau/nv04_tv.c b/drivers/gpu/drm/nouveau/nv04_tv.c index 099fbeda6e2e..62e826a139b3 100644 --- a/drivers/gpu/drm/nouveau/nv04_tv.c +++ b/drivers/gpu/drm/nouveau/nv04_tv.c | |||
@@ -75,8 +75,8 @@ static void nv04_tv_dpms(struct drm_encoder *encoder, int mode) | |||
75 | struct nv04_mode_state *state = &nv04_display(dev)->mode_reg; | 75 | struct nv04_mode_state *state = &nv04_display(dev)->mode_reg; |
76 | uint8_t crtc1A; | 76 | uint8_t crtc1A; |
77 | 77 | ||
78 | NV_INFO(drm, "Setting dpms mode %d on TV encoder (output %d)\n", | 78 | NV_DEBUG(drm, "Setting dpms mode %d on TV encoder (output %d)\n", |
79 | mode, nv_encoder->dcb->index); | 79 | mode, nv_encoder->dcb->index); |
80 | 80 | ||
81 | state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK); | 81 | state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK); |
82 | 82 | ||
@@ -167,9 +167,8 @@ static void nv04_tv_commit(struct drm_encoder *encoder) | |||
167 | 167 | ||
168 | helper->dpms(encoder, DRM_MODE_DPMS_ON); | 168 | helper->dpms(encoder, DRM_MODE_DPMS_ON); |
169 | 169 | ||
170 | NV_INFO(drm, "Output %s is running on CRTC %d using output %c\n", | 170 | NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n", |
171 | drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), nv_crtc->index, | 171 | drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); |
172 | '@' + ffs(nv_encoder->dcb->or)); | ||
173 | } | 172 | } |
174 | 173 | ||
175 | static void nv04_tv_destroy(struct drm_encoder *encoder) | 174 | static void nv04_tv_destroy(struct drm_encoder *encoder) |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 2e566e123e9e..3bce0299f64a 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -1696,35 +1696,43 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) | |||
1696 | return ATOM_PPLL2; | 1696 | return ATOM_PPLL2; |
1697 | DRM_ERROR("unable to allocate a PPLL\n"); | 1697 | DRM_ERROR("unable to allocate a PPLL\n"); |
1698 | return ATOM_PPLL_INVALID; | 1698 | return ATOM_PPLL_INVALID; |
1699 | } else { | 1699 | } else if (ASIC_IS_AVIVO(rdev)) { |
1700 | if (ASIC_IS_AVIVO(rdev)) { | 1700 | /* in DP mode, the DP ref clock can come from either PPLL |
1701 | /* in DP mode, the DP ref clock can come from either PPLL | 1701 | * depending on the asic: |
1702 | * depending on the asic: | 1702 | * DCE3: PPLL1 or PPLL2 |
1703 | * DCE3: PPLL1 or PPLL2 | 1703 | */ |
1704 | */ | 1704 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) { |
1705 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) { | 1705 | /* use the same PPLL for all DP monitors */ |
1706 | /* use the same PPLL for all DP monitors */ | 1706 | pll = radeon_get_shared_dp_ppll(crtc); |
1707 | pll = radeon_get_shared_dp_ppll(crtc); | 1707 | if (pll != ATOM_PPLL_INVALID) |
1708 | if (pll != ATOM_PPLL_INVALID) | 1708 | return pll; |
1709 | return pll; | 1709 | } else { |
1710 | } else { | 1710 | /* use the same PPLL for all monitors with the same clock */ |
1711 | /* use the same PPLL for all monitors with the same clock */ | 1711 | pll = radeon_get_shared_nondp_ppll(crtc); |
1712 | pll = radeon_get_shared_nondp_ppll(crtc); | 1712 | if (pll != ATOM_PPLL_INVALID) |
1713 | if (pll != ATOM_PPLL_INVALID) | 1713 | return pll; |
1714 | return pll; | 1714 | } |
1715 | } | 1715 | /* all other cases */ |
1716 | /* all other cases */ | 1716 | pll_in_use = radeon_get_pll_use_mask(crtc); |
1717 | pll_in_use = radeon_get_pll_use_mask(crtc); | 1717 | /* the order shouldn't matter here, but we probably |
1718 | * need this until we have atomic modeset | ||
1719 | */ | ||
1720 | if (rdev->flags & RADEON_IS_IGP) { | ||
1718 | if (!(pll_in_use & (1 << ATOM_PPLL1))) | 1721 | if (!(pll_in_use & (1 << ATOM_PPLL1))) |
1719 | return ATOM_PPLL1; | 1722 | return ATOM_PPLL1; |
1720 | if (!(pll_in_use & (1 << ATOM_PPLL2))) | 1723 | if (!(pll_in_use & (1 << ATOM_PPLL2))) |
1721 | return ATOM_PPLL2; | 1724 | return ATOM_PPLL2; |
1722 | DRM_ERROR("unable to allocate a PPLL\n"); | ||
1723 | return ATOM_PPLL_INVALID; | ||
1724 | } else { | 1725 | } else { |
1725 | /* on pre-R5xx asics, the crtc to pll mapping is hardcoded */ | 1726 | if (!(pll_in_use & (1 << ATOM_PPLL2))) |
1726 | return radeon_crtc->crtc_id; | 1727 | return ATOM_PPLL2; |
1728 | if (!(pll_in_use & (1 << ATOM_PPLL1))) | ||
1729 | return ATOM_PPLL1; | ||
1727 | } | 1730 | } |
1731 | DRM_ERROR("unable to allocate a PPLL\n"); | ||
1732 | return ATOM_PPLL_INVALID; | ||
1733 | } else { | ||
1734 | /* on pre-R5xx asics, the crtc to pll mapping is hardcoded */ | ||
1735 | return radeon_crtc->crtc_id; | ||
1728 | } | 1736 | } |
1729 | } | 1737 | } |
1730 | 1738 | ||
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 14313ad43b76..af31f829f4a8 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -1372,7 +1372,7 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s | |||
1372 | WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN); | 1372 | WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN); |
1373 | 1373 | ||
1374 | for (i = 0; i < rdev->num_crtc; i++) { | 1374 | for (i = 0; i < rdev->num_crtc; i++) { |
1375 | if (save->crtc_enabled) { | 1375 | if (save->crtc_enabled[i]) { |
1376 | if (ASIC_IS_DCE6(rdev)) { | 1376 | if (ASIC_IS_DCE6(rdev)) { |
1377 | tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]); | 1377 | tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]); |
1378 | tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; | 1378 | tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; |
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index 30271b641913..c042e497e450 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c | |||
@@ -264,7 +264,7 @@ static int evergreen_surface_check_2d(struct radeon_cs_parser *p, | |||
264 | /* macro tile width & height */ | 264 | /* macro tile width & height */ |
265 | palign = (8 * surf->bankw * track->npipes) * surf->mtilea; | 265 | palign = (8 * surf->bankw * track->npipes) * surf->mtilea; |
266 | halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea; | 266 | halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea; |
267 | mtileb = (palign / 8) * (halign / 8) * tileb;; | 267 | mtileb = (palign / 8) * (halign / 8) * tileb; |
268 | mtile_pr = surf->nbx / palign; | 268 | mtile_pr = surf->nbx / palign; |
269 | mtile_ps = (mtile_pr * surf->nby) / halign; | 269 | mtile_ps = (mtile_pr * surf->nby) / halign; |
270 | surf->layer_size = mtile_ps * mtileb * slice_pt; | 270 | surf->layer_size = mtile_ps * mtileb * slice_pt; |
@@ -2725,6 +2725,9 @@ static bool evergreen_vm_reg_valid(u32 reg) | |||
2725 | /* check config regs */ | 2725 | /* check config regs */ |
2726 | switch (reg) { | 2726 | switch (reg) { |
2727 | case GRBM_GFX_INDEX: | 2727 | case GRBM_GFX_INDEX: |
2728 | case CP_STRMOUT_CNTL: | ||
2729 | case CP_COHER_CNTL: | ||
2730 | case CP_COHER_SIZE: | ||
2728 | case VGT_VTX_VECT_EJECT_REG: | 2731 | case VGT_VTX_VECT_EJECT_REG: |
2729 | case VGT_CACHE_INVALIDATION: | 2732 | case VGT_CACHE_INVALIDATION: |
2730 | case VGT_GS_VERTEX_REUSE: | 2733 | case VGT_GS_VERTEX_REUSE: |
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index df542f1a5dfb..2bc0f6a1b428 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
@@ -91,6 +91,10 @@ | |||
91 | #define FB_READ_EN (1 << 0) | 91 | #define FB_READ_EN (1 << 0) |
92 | #define FB_WRITE_EN (1 << 1) | 92 | #define FB_WRITE_EN (1 << 1) |
93 | 93 | ||
94 | #define CP_STRMOUT_CNTL 0x84FC | ||
95 | |||
96 | #define CP_COHER_CNTL 0x85F0 | ||
97 | #define CP_COHER_SIZE 0x85F4 | ||
94 | #define CP_COHER_BASE 0x85F8 | 98 | #define CP_COHER_BASE 0x85F8 |
95 | #define CP_STALLED_STAT1 0x8674 | 99 | #define CP_STALLED_STAT1 0x8674 |
96 | #define CP_STALLED_STAT2 0x8678 | 100 | #define CP_STALLED_STAT2 0x8678 |
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c index 37f6a907aea4..15f5ded65e0c 100644 --- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c +++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c | |||
@@ -352,9 +352,9 @@ static int radeon_atpx_switchto(enum vga_switcheroo_client_id id) | |||
352 | } | 352 | } |
353 | 353 | ||
354 | /** | 354 | /** |
355 | * radeon_atpx_switchto - switch to the requested GPU | 355 | * radeon_atpx_power_state - power down/up the requested GPU |
356 | * | 356 | * |
357 | * @id: GPU to switch to | 357 | * @id: GPU to power down/up |
358 | * @state: requested power state (0 = off, 1 = on) | 358 | * @state: requested power state (0 = off, 1 = on) |
359 | * | 359 | * |
360 | * Execute the necessary ATPX function to power down/up the discrete GPU | 360 | * Execute the necessary ATPX function to power down/up the discrete GPU |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 67cfc1795ecd..b884c362a8c2 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -941,7 +941,7 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) | |||
941 | struct drm_mode_object *obj; | 941 | struct drm_mode_object *obj; |
942 | int i; | 942 | int i; |
943 | enum drm_connector_status ret = connector_status_disconnected; | 943 | enum drm_connector_status ret = connector_status_disconnected; |
944 | bool dret = false; | 944 | bool dret = false, broken_edid = false; |
945 | 945 | ||
946 | if (!force && radeon_check_hpd_status_unchanged(connector)) | 946 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
947 | return connector->status; | 947 | return connector->status; |
@@ -965,6 +965,9 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) | |||
965 | ret = connector_status_disconnected; | 965 | ret = connector_status_disconnected; |
966 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | 966 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); |
967 | radeon_connector->ddc_bus = NULL; | 967 | radeon_connector->ddc_bus = NULL; |
968 | } else { | ||
969 | ret = connector_status_connected; | ||
970 | broken_edid = true; /* defer use_digital to later */ | ||
968 | } | 971 | } |
969 | } else { | 972 | } else { |
970 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | 973 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); |
@@ -1047,13 +1050,24 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) | |||
1047 | 1050 | ||
1048 | encoder_funcs = encoder->helper_private; | 1051 | encoder_funcs = encoder->helper_private; |
1049 | if (encoder_funcs->detect) { | 1052 | if (encoder_funcs->detect) { |
1050 | if (ret != connector_status_connected) { | 1053 | if (!broken_edid) { |
1051 | ret = encoder_funcs->detect(encoder, connector); | 1054 | if (ret != connector_status_connected) { |
1052 | if (ret == connector_status_connected) { | 1055 | /* deal with analog monitors without DDC */ |
1053 | radeon_connector->use_digital = false; | 1056 | ret = encoder_funcs->detect(encoder, connector); |
1057 | if (ret == connector_status_connected) { | ||
1058 | radeon_connector->use_digital = false; | ||
1059 | } | ||
1060 | if (ret != connector_status_disconnected) | ||
1061 | radeon_connector->detected_by_load = true; | ||
1054 | } | 1062 | } |
1055 | if (ret != connector_status_disconnected) | 1063 | } else { |
1056 | radeon_connector->detected_by_load = true; | 1064 | enum drm_connector_status lret; |
1065 | /* assume digital unless load detected otherwise */ | ||
1066 | radeon_connector->use_digital = true; | ||
1067 | lret = encoder_funcs->detect(encoder, connector); | ||
1068 | DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret); | ||
1069 | if (lret == connector_status_connected) | ||
1070 | radeon_connector->use_digital = false; | ||
1057 | } | 1071 | } |
1058 | break; | 1072 | break; |
1059 | } | 1073 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 5677a424b585..6857cb4efb76 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -295,6 +295,7 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
295 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 295 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
296 | struct drm_device *dev = crtc->dev; | 296 | struct drm_device *dev = crtc->dev; |
297 | struct radeon_device *rdev = dev->dev_private; | 297 | struct radeon_device *rdev = dev->dev_private; |
298 | uint32_t crtc_ext_cntl = 0; | ||
298 | uint32_t mask; | 299 | uint32_t mask; |
299 | 300 | ||
300 | if (radeon_crtc->crtc_id) | 301 | if (radeon_crtc->crtc_id) |
@@ -307,6 +308,16 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
307 | RADEON_CRTC_VSYNC_DIS | | 308 | RADEON_CRTC_VSYNC_DIS | |
308 | RADEON_CRTC_HSYNC_DIS); | 309 | RADEON_CRTC_HSYNC_DIS); |
309 | 310 | ||
311 | /* | ||
312 | * On all dual CRTC GPUs this bit controls the CRTC of the primary DAC. | ||
313 | * Therefore it is set in the DAC DMPS function. | ||
314 | * This is different for GPU's with a single CRTC but a primary and a | ||
315 | * TV DAC: here it controls the single CRTC no matter where it is | ||
316 | * routed. Therefore we set it here. | ||
317 | */ | ||
318 | if (rdev->flags & RADEON_SINGLE_CRTC) | ||
319 | crtc_ext_cntl = RADEON_CRTC_CRT_ON; | ||
320 | |||
310 | switch (mode) { | 321 | switch (mode) { |
311 | case DRM_MODE_DPMS_ON: | 322 | case DRM_MODE_DPMS_ON: |
312 | radeon_crtc->enabled = true; | 323 | radeon_crtc->enabled = true; |
@@ -317,7 +328,7 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
317 | else { | 328 | else { |
318 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | | 329 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | |
319 | RADEON_CRTC_DISP_REQ_EN_B)); | 330 | RADEON_CRTC_DISP_REQ_EN_B)); |
320 | WREG32_P(RADEON_CRTC_EXT_CNTL, 0, ~mask); | 331 | WREG32_P(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl, ~(mask | crtc_ext_cntl)); |
321 | } | 332 | } |
322 | drm_vblank_post_modeset(dev, radeon_crtc->crtc_id); | 333 | drm_vblank_post_modeset(dev, radeon_crtc->crtc_id); |
323 | radeon_crtc_load_lut(crtc); | 334 | radeon_crtc_load_lut(crtc); |
@@ -331,7 +342,7 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
331 | else { | 342 | else { |
332 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | | 343 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | |
333 | RADEON_CRTC_DISP_REQ_EN_B)); | 344 | RADEON_CRTC_DISP_REQ_EN_B)); |
334 | WREG32_P(RADEON_CRTC_EXT_CNTL, mask, ~mask); | 345 | WREG32_P(RADEON_CRTC_EXT_CNTL, mask, ~(mask | crtc_ext_cntl)); |
335 | } | 346 | } |
336 | radeon_crtc->enabled = false; | 347 | radeon_crtc->enabled = false; |
337 | /* adjust pm to dpms changes AFTER disabling crtcs */ | 348 | /* adjust pm to dpms changes AFTER disabling crtcs */ |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 0063df9d166d..f5ba2241dacc 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -537,7 +537,9 @@ static void radeon_legacy_primary_dac_dpms(struct drm_encoder *encoder, int mode | |||
537 | break; | 537 | break; |
538 | } | 538 | } |
539 | 539 | ||
540 | WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); | 540 | /* handled in radeon_crtc_dpms() */ |
541 | if (!(rdev->flags & RADEON_SINGLE_CRTC)) | ||
542 | WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); | ||
541 | WREG32(RADEON_DAC_CNTL, dac_cntl); | 543 | WREG32(RADEON_DAC_CNTL, dac_cntl); |
542 | WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl); | 544 | WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl); |
543 | 545 | ||
@@ -662,6 +664,8 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc | |||
662 | 664 | ||
663 | if (ASIC_IS_R300(rdev)) | 665 | if (ASIC_IS_R300(rdev)) |
664 | tmp |= (0x1b6 << RADEON_DAC_FORCE_DATA_SHIFT); | 666 | tmp |= (0x1b6 << RADEON_DAC_FORCE_DATA_SHIFT); |
667 | else if (ASIC_IS_RV100(rdev)) | ||
668 | tmp |= (0x1ac << RADEON_DAC_FORCE_DATA_SHIFT); | ||
665 | else | 669 | else |
666 | tmp |= (0x180 << RADEON_DAC_FORCE_DATA_SHIFT); | 670 | tmp |= (0x180 << RADEON_DAC_FORCE_DATA_SHIFT); |
667 | 671 | ||
@@ -671,6 +675,7 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc | |||
671 | tmp |= RADEON_DAC_RANGE_CNTL_PS2 | RADEON_DAC_CMP_EN; | 675 | tmp |= RADEON_DAC_RANGE_CNTL_PS2 | RADEON_DAC_CMP_EN; |
672 | WREG32(RADEON_DAC_CNTL, tmp); | 676 | WREG32(RADEON_DAC_CNTL, tmp); |
673 | 677 | ||
678 | tmp = dac_macro_cntl; | ||
674 | tmp &= ~(RADEON_DAC_PDWN_R | | 679 | tmp &= ~(RADEON_DAC_PDWN_R | |
675 | RADEON_DAC_PDWN_G | | 680 | RADEON_DAC_PDWN_G | |
676 | RADEON_DAC_PDWN_B); | 681 | RADEON_DAC_PDWN_B); |
@@ -1092,7 +1097,8 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode) | |||
1092 | } else { | 1097 | } else { |
1093 | if (is_tv) | 1098 | if (is_tv) |
1094 | WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl); | 1099 | WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl); |
1095 | else | 1100 | /* handled in radeon_crtc_dpms() */ |
1101 | else if (!(rdev->flags & RADEON_SINGLE_CRTC)) | ||
1096 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | 1102 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); |
1097 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); | 1103 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
1098 | } | 1104 | } |
@@ -1416,13 +1422,104 @@ static bool radeon_legacy_tv_detect(struct drm_encoder *encoder, | |||
1416 | return found; | 1422 | return found; |
1417 | } | 1423 | } |
1418 | 1424 | ||
1425 | static bool radeon_legacy_ext_dac_detect(struct drm_encoder *encoder, | ||
1426 | struct drm_connector *connector) | ||
1427 | { | ||
1428 | struct drm_device *dev = encoder->dev; | ||
1429 | struct radeon_device *rdev = dev->dev_private; | ||
1430 | uint32_t gpio_monid, fp2_gen_cntl, disp_output_cntl, crtc2_gen_cntl; | ||
1431 | uint32_t disp_lin_trans_grph_a, disp_lin_trans_grph_b, disp_lin_trans_grph_c; | ||
1432 | uint32_t disp_lin_trans_grph_d, disp_lin_trans_grph_e, disp_lin_trans_grph_f; | ||
1433 | uint32_t tmp, crtc2_h_total_disp, crtc2_v_total_disp; | ||
1434 | uint32_t crtc2_h_sync_strt_wid, crtc2_v_sync_strt_wid; | ||
1435 | bool found = false; | ||
1436 | int i; | ||
1437 | |||
1438 | /* save the regs we need */ | ||
1439 | gpio_monid = RREG32(RADEON_GPIO_MONID); | ||
1440 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); | ||
1441 | disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL); | ||
1442 | crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL); | ||
1443 | disp_lin_trans_grph_a = RREG32(RADEON_DISP_LIN_TRANS_GRPH_A); | ||
1444 | disp_lin_trans_grph_b = RREG32(RADEON_DISP_LIN_TRANS_GRPH_B); | ||
1445 | disp_lin_trans_grph_c = RREG32(RADEON_DISP_LIN_TRANS_GRPH_C); | ||
1446 | disp_lin_trans_grph_d = RREG32(RADEON_DISP_LIN_TRANS_GRPH_D); | ||
1447 | disp_lin_trans_grph_e = RREG32(RADEON_DISP_LIN_TRANS_GRPH_E); | ||
1448 | disp_lin_trans_grph_f = RREG32(RADEON_DISP_LIN_TRANS_GRPH_F); | ||
1449 | crtc2_h_total_disp = RREG32(RADEON_CRTC2_H_TOTAL_DISP); | ||
1450 | crtc2_v_total_disp = RREG32(RADEON_CRTC2_V_TOTAL_DISP); | ||
1451 | crtc2_h_sync_strt_wid = RREG32(RADEON_CRTC2_H_SYNC_STRT_WID); | ||
1452 | crtc2_v_sync_strt_wid = RREG32(RADEON_CRTC2_V_SYNC_STRT_WID); | ||
1453 | |||
1454 | tmp = RREG32(RADEON_GPIO_MONID); | ||
1455 | tmp &= ~RADEON_GPIO_A_0; | ||
1456 | WREG32(RADEON_GPIO_MONID, tmp); | ||
1457 | |||
1458 | WREG32(RADEON_FP2_GEN_CNTL, (RADEON_FP2_ON | | ||
1459 | RADEON_FP2_PANEL_FORMAT | | ||
1460 | R200_FP2_SOURCE_SEL_TRANS_UNIT | | ||
1461 | RADEON_FP2_DVO_EN | | ||
1462 | R200_FP2_DVO_RATE_SEL_SDR)); | ||
1463 | |||
1464 | WREG32(RADEON_DISP_OUTPUT_CNTL, (RADEON_DISP_DAC_SOURCE_RMX | | ||
1465 | RADEON_DISP_TRANS_MATRIX_GRAPHICS)); | ||
1466 | |||
1467 | WREG32(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_EN | | ||
1468 | RADEON_CRTC2_DISP_REQ_EN_B)); | ||
1469 | |||
1470 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, 0x00000000); | ||
1471 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, 0x000003f0); | ||
1472 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, 0x00000000); | ||
1473 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, 0x000003f0); | ||
1474 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, 0x00000000); | ||
1475 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, 0x000003f0); | ||
1476 | |||
1477 | WREG32(RADEON_CRTC2_H_TOTAL_DISP, 0x01000008); | ||
1478 | WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, 0x00000800); | ||
1479 | WREG32(RADEON_CRTC2_V_TOTAL_DISP, 0x00080001); | ||
1480 | WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, 0x00000080); | ||
1481 | |||
1482 | for (i = 0; i < 200; i++) { | ||
1483 | tmp = RREG32(RADEON_GPIO_MONID); | ||
1484 | if (tmp & RADEON_GPIO_Y_0) | ||
1485 | found = true; | ||
1486 | |||
1487 | if (found) | ||
1488 | break; | ||
1489 | |||
1490 | if (!drm_can_sleep()) | ||
1491 | mdelay(1); | ||
1492 | else | ||
1493 | msleep(1); | ||
1494 | } | ||
1495 | |||
1496 | /* restore the regs we used */ | ||
1497 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, disp_lin_trans_grph_a); | ||
1498 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, disp_lin_trans_grph_b); | ||
1499 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, disp_lin_trans_grph_c); | ||
1500 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, disp_lin_trans_grph_d); | ||
1501 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, disp_lin_trans_grph_e); | ||
1502 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, disp_lin_trans_grph_f); | ||
1503 | WREG32(RADEON_CRTC2_H_TOTAL_DISP, crtc2_h_total_disp); | ||
1504 | WREG32(RADEON_CRTC2_V_TOTAL_DISP, crtc2_v_total_disp); | ||
1505 | WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, crtc2_h_sync_strt_wid); | ||
1506 | WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, crtc2_v_sync_strt_wid); | ||
1507 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | ||
1508 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); | ||
1509 | WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl); | ||
1510 | WREG32(RADEON_GPIO_MONID, gpio_monid); | ||
1511 | |||
1512 | return found; | ||
1513 | } | ||
1514 | |||
1419 | static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder *encoder, | 1515 | static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder *encoder, |
1420 | struct drm_connector *connector) | 1516 | struct drm_connector *connector) |
1421 | { | 1517 | { |
1422 | struct drm_device *dev = encoder->dev; | 1518 | struct drm_device *dev = encoder->dev; |
1423 | struct radeon_device *rdev = dev->dev_private; | 1519 | struct radeon_device *rdev = dev->dev_private; |
1424 | uint32_t crtc2_gen_cntl, tv_dac_cntl, dac_cntl2, dac_ext_cntl; | 1520 | uint32_t crtc2_gen_cntl = 0, tv_dac_cntl, dac_cntl2, dac_ext_cntl; |
1425 | uint32_t disp_hw_debug, disp_output_cntl, gpiopad_a, pixclks_cntl, tmp; | 1521 | uint32_t gpiopad_a = 0, pixclks_cntl, tmp; |
1522 | uint32_t disp_output_cntl = 0, disp_hw_debug = 0, crtc_ext_cntl = 0; | ||
1426 | enum drm_connector_status found = connector_status_disconnected; | 1523 | enum drm_connector_status found = connector_status_disconnected; |
1427 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 1524 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1428 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; | 1525 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; |
@@ -1459,12 +1556,27 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder | |||
1459 | return connector_status_disconnected; | 1556 | return connector_status_disconnected; |
1460 | } | 1557 | } |
1461 | 1558 | ||
1559 | /* R200 uses an external DAC for secondary DAC */ | ||
1560 | if (rdev->family == CHIP_R200) { | ||
1561 | if (radeon_legacy_ext_dac_detect(encoder, connector)) | ||
1562 | found = connector_status_connected; | ||
1563 | return found; | ||
1564 | } | ||
1565 | |||
1462 | /* save the regs we need */ | 1566 | /* save the regs we need */ |
1463 | pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); | 1567 | pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); |
1464 | gpiopad_a = ASIC_IS_R300(rdev) ? RREG32(RADEON_GPIOPAD_A) : 0; | 1568 | |
1465 | disp_output_cntl = ASIC_IS_R300(rdev) ? RREG32(RADEON_DISP_OUTPUT_CNTL) : 0; | 1569 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1466 | disp_hw_debug = ASIC_IS_R300(rdev) ? 0 : RREG32(RADEON_DISP_HW_DEBUG); | 1570 | crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL); |
1467 | crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL); | 1571 | } else { |
1572 | if (ASIC_IS_R300(rdev)) { | ||
1573 | gpiopad_a = RREG32(RADEON_GPIOPAD_A); | ||
1574 | disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL); | ||
1575 | } else { | ||
1576 | disp_hw_debug = RREG32(RADEON_DISP_HW_DEBUG); | ||
1577 | } | ||
1578 | crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL); | ||
1579 | } | ||
1468 | tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL); | 1580 | tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL); |
1469 | dac_ext_cntl = RREG32(RADEON_DAC_EXT_CNTL); | 1581 | dac_ext_cntl = RREG32(RADEON_DAC_EXT_CNTL); |
1470 | dac_cntl2 = RREG32(RADEON_DAC_CNTL2); | 1582 | dac_cntl2 = RREG32(RADEON_DAC_CNTL2); |
@@ -1473,22 +1585,24 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder | |||
1473 | | RADEON_PIX2CLK_DAC_ALWAYS_ONb); | 1585 | | RADEON_PIX2CLK_DAC_ALWAYS_ONb); |
1474 | WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); | 1586 | WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); |
1475 | 1587 | ||
1476 | if (ASIC_IS_R300(rdev)) | 1588 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1477 | WREG32_P(RADEON_GPIOPAD_A, 1, ~1); | 1589 | tmp = crtc_ext_cntl | RADEON_CRTC_CRT_ON; |
1478 | 1590 | WREG32(RADEON_CRTC_EXT_CNTL, tmp); | |
1479 | tmp = crtc2_gen_cntl & ~RADEON_CRTC2_PIX_WIDTH_MASK; | ||
1480 | tmp |= RADEON_CRTC2_CRT2_ON | | ||
1481 | (2 << RADEON_CRTC2_PIX_WIDTH_SHIFT); | ||
1482 | |||
1483 | WREG32(RADEON_CRTC2_GEN_CNTL, tmp); | ||
1484 | |||
1485 | if (ASIC_IS_R300(rdev)) { | ||
1486 | tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK; | ||
1487 | tmp |= RADEON_DISP_TVDAC_SOURCE_CRTC2; | ||
1488 | WREG32(RADEON_DISP_OUTPUT_CNTL, tmp); | ||
1489 | } else { | 1591 | } else { |
1490 | tmp = disp_hw_debug & ~RADEON_CRT2_DISP1_SEL; | 1592 | tmp = crtc2_gen_cntl & ~RADEON_CRTC2_PIX_WIDTH_MASK; |
1491 | WREG32(RADEON_DISP_HW_DEBUG, tmp); | 1593 | tmp |= RADEON_CRTC2_CRT2_ON | |
1594 | (2 << RADEON_CRTC2_PIX_WIDTH_SHIFT); | ||
1595 | WREG32(RADEON_CRTC2_GEN_CNTL, tmp); | ||
1596 | |||
1597 | if (ASIC_IS_R300(rdev)) { | ||
1598 | WREG32_P(RADEON_GPIOPAD_A, 1, ~1); | ||
1599 | tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK; | ||
1600 | tmp |= RADEON_DISP_TVDAC_SOURCE_CRTC2; | ||
1601 | WREG32(RADEON_DISP_OUTPUT_CNTL, tmp); | ||
1602 | } else { | ||
1603 | tmp = disp_hw_debug & ~RADEON_CRT2_DISP1_SEL; | ||
1604 | WREG32(RADEON_DISP_HW_DEBUG, tmp); | ||
1605 | } | ||
1492 | } | 1606 | } |
1493 | 1607 | ||
1494 | tmp = RADEON_TV_DAC_NBLANK | | 1608 | tmp = RADEON_TV_DAC_NBLANK | |
@@ -1530,14 +1644,19 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder | |||
1530 | WREG32(RADEON_DAC_CNTL2, dac_cntl2); | 1644 | WREG32(RADEON_DAC_CNTL2, dac_cntl2); |
1531 | WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl); | 1645 | WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl); |
1532 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); | 1646 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
1533 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | ||
1534 | 1647 | ||
1535 | if (ASIC_IS_R300(rdev)) { | 1648 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1536 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); | 1649 | WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); |
1537 | WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1); | ||
1538 | } else { | 1650 | } else { |
1539 | WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug); | 1651 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); |
1652 | if (ASIC_IS_R300(rdev)) { | ||
1653 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); | ||
1654 | WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1); | ||
1655 | } else { | ||
1656 | WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug); | ||
1657 | } | ||
1540 | } | 1658 | } |
1659 | |||
1541 | WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); | 1660 | WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); |
1542 | 1661 | ||
1543 | return found; | 1662 | return found; |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index b0db712060fb..4422d630b33b 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -2474,6 +2474,7 @@ static bool si_vm_reg_valid(u32 reg) | |||
2474 | /* check config regs */ | 2474 | /* check config regs */ |
2475 | switch (reg) { | 2475 | switch (reg) { |
2476 | case GRBM_GFX_INDEX: | 2476 | case GRBM_GFX_INDEX: |
2477 | case CP_STRMOUT_CNTL: | ||
2477 | case VGT_VTX_VECT_EJECT_REG: | 2478 | case VGT_VTX_VECT_EJECT_REG: |
2478 | case VGT_CACHE_INVALIDATION: | 2479 | case VGT_CACHE_INVALIDATION: |
2479 | case VGT_ESGS_RING_SIZE: | 2480 | case VGT_ESGS_RING_SIZE: |
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 7d2a20e56577..a8871afc5b4e 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h | |||
@@ -424,6 +424,7 @@ | |||
424 | # define RDERR_INT_ENABLE (1 << 0) | 424 | # define RDERR_INT_ENABLE (1 << 0) |
425 | # define GUI_IDLE_INT_ENABLE (1 << 19) | 425 | # define GUI_IDLE_INT_ENABLE (1 << 19) |
426 | 426 | ||
427 | #define CP_STRMOUT_CNTL 0x84FC | ||
427 | #define SCRATCH_REG0 0x8500 | 428 | #define SCRATCH_REG0 0x8500 |
428 | #define SCRATCH_REG1 0x8504 | 429 | #define SCRATCH_REG1 0x8504 |
429 | #define SCRATCH_REG2 0x8508 | 430 | #define SCRATCH_REG2 0x8508 |
diff --git a/drivers/gpu/drm/udl/udl_drv.h b/drivers/gpu/drm/udl/udl_drv.h index fccd361f7b50..87aa5f5d3c88 100644 --- a/drivers/gpu/drm/udl/udl_drv.h +++ b/drivers/gpu/drm/udl/udl_drv.h | |||
@@ -104,7 +104,7 @@ udl_fb_user_fb_create(struct drm_device *dev, | |||
104 | 104 | ||
105 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, | 105 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, |
106 | const char *front, char **urb_buf_ptr, | 106 | const char *front, char **urb_buf_ptr, |
107 | u32 byte_offset, u32 byte_width, | 107 | u32 byte_offset, u32 device_byte_offset, u32 byte_width, |
108 | int *ident_ptr, int *sent_ptr); | 108 | int *ident_ptr, int *sent_ptr); |
109 | 109 | ||
110 | int udl_dumb_create(struct drm_file *file_priv, | 110 | int udl_dumb_create(struct drm_file *file_priv, |
diff --git a/drivers/gpu/drm/udl/udl_fb.c b/drivers/gpu/drm/udl/udl_fb.c index 69a2b16f42a6..d4ab3beaada0 100644 --- a/drivers/gpu/drm/udl/udl_fb.c +++ b/drivers/gpu/drm/udl/udl_fb.c | |||
@@ -114,9 +114,10 @@ static void udlfb_dpy_deferred_io(struct fb_info *info, | |||
114 | list_for_each_entry(cur, &fbdefio->pagelist, lru) { | 114 | list_for_each_entry(cur, &fbdefio->pagelist, lru) { |
115 | 115 | ||
116 | if (udl_render_hline(dev, (ufbdev->ufb.base.bits_per_pixel / 8), | 116 | if (udl_render_hline(dev, (ufbdev->ufb.base.bits_per_pixel / 8), |
117 | &urb, (char *) info->fix.smem_start, | 117 | &urb, (char *) info->fix.smem_start, |
118 | &cmd, cur->index << PAGE_SHIFT, | 118 | &cmd, cur->index << PAGE_SHIFT, |
119 | PAGE_SIZE, &bytes_identical, &bytes_sent)) | 119 | cur->index << PAGE_SHIFT, |
120 | PAGE_SIZE, &bytes_identical, &bytes_sent)) | ||
120 | goto error; | 121 | goto error; |
121 | bytes_rendered += PAGE_SIZE; | 122 | bytes_rendered += PAGE_SIZE; |
122 | } | 123 | } |
@@ -187,10 +188,11 @@ int udl_handle_damage(struct udl_framebuffer *fb, int x, int y, | |||
187 | for (i = y; i < y + height ; i++) { | 188 | for (i = y; i < y + height ; i++) { |
188 | const int line_offset = fb->base.pitches[0] * i; | 189 | const int line_offset = fb->base.pitches[0] * i; |
189 | const int byte_offset = line_offset + (x * bpp); | 190 | const int byte_offset = line_offset + (x * bpp); |
190 | 191 | const int dev_byte_offset = (fb->base.width * bpp * i) + (x * bpp); | |
191 | if (udl_render_hline(dev, bpp, &urb, | 192 | if (udl_render_hline(dev, bpp, &urb, |
192 | (char *) fb->obj->vmapping, | 193 | (char *) fb->obj->vmapping, |
193 | &cmd, byte_offset, width * bpp, | 194 | &cmd, byte_offset, dev_byte_offset, |
195 | width * bpp, | ||
194 | &bytes_identical, &bytes_sent)) | 196 | &bytes_identical, &bytes_sent)) |
195 | goto error; | 197 | goto error; |
196 | } | 198 | } |
diff --git a/drivers/gpu/drm/udl/udl_transfer.c b/drivers/gpu/drm/udl/udl_transfer.c index dc095526ffb7..142fee5f983f 100644 --- a/drivers/gpu/drm/udl/udl_transfer.c +++ b/drivers/gpu/drm/udl/udl_transfer.c | |||
@@ -213,11 +213,12 @@ static void udl_compress_hline16( | |||
213 | */ | 213 | */ |
214 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, | 214 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, |
215 | const char *front, char **urb_buf_ptr, | 215 | const char *front, char **urb_buf_ptr, |
216 | u32 byte_offset, u32 byte_width, | 216 | u32 byte_offset, u32 device_byte_offset, |
217 | u32 byte_width, | ||
217 | int *ident_ptr, int *sent_ptr) | 218 | int *ident_ptr, int *sent_ptr) |
218 | { | 219 | { |
219 | const u8 *line_start, *line_end, *next_pixel; | 220 | const u8 *line_start, *line_end, *next_pixel; |
220 | u32 base16 = 0 + (byte_offset / bpp) * 2; | 221 | u32 base16 = 0 + (device_byte_offset / bpp) * 2; |
221 | struct urb *urb = *urb_ptr; | 222 | struct urb *urb = *urb_ptr; |
222 | u8 *cmd = *urb_buf_ptr; | 223 | u8 *cmd = *urb_buf_ptr; |
223 | u8 *cmd_end = (u8 *) urb->transfer_buffer + urb->transfer_buffer_length; | 224 | u8 *cmd_end = (u8 *) urb->transfer_buffer + urb->transfer_buffer_length; |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c index 3ce68a2e312d..d1498bfd7873 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c | |||
@@ -306,7 +306,7 @@ void vmw_bo_pin(struct ttm_buffer_object *bo, bool pin) | |||
306 | 306 | ||
307 | BUG_ON(!atomic_read(&bo->reserved)); | 307 | BUG_ON(!atomic_read(&bo->reserved)); |
308 | BUG_ON(old_mem_type != TTM_PL_VRAM && | 308 | BUG_ON(old_mem_type != TTM_PL_VRAM && |
309 | old_mem_type != VMW_PL_FLAG_GMR); | 309 | old_mem_type != VMW_PL_GMR); |
310 | 310 | ||
311 | pl_flags = TTM_PL_FLAG_VRAM | VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED; | 311 | pl_flags = TTM_PL_FLAG_VRAM | VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED; |
312 | if (pin) | 312 | if (pin) |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index ed3c1e7ddde9..2dd185e42f21 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | |||
@@ -1098,6 +1098,11 @@ static void vmw_pm_complete(struct device *kdev) | |||
1098 | struct drm_device *dev = pci_get_drvdata(pdev); | 1098 | struct drm_device *dev = pci_get_drvdata(pdev); |
1099 | struct vmw_private *dev_priv = vmw_priv(dev); | 1099 | struct vmw_private *dev_priv = vmw_priv(dev); |
1100 | 1100 | ||
1101 | mutex_lock(&dev_priv->hw_mutex); | ||
1102 | vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2); | ||
1103 | (void) vmw_read(dev_priv, SVGA_REG_ID); | ||
1104 | mutex_unlock(&dev_priv->hw_mutex); | ||
1105 | |||
1101 | /** | 1106 | /** |
1102 | * Reclaim 3d reference held by fbdev and potentially | 1107 | * Reclaim 3d reference held by fbdev and potentially |
1103 | * start fifo. | 1108 | * start fifo. |
diff --git a/drivers/hid/hid-apple.c b/drivers/hid/hid-apple.c index 06ebdbb6ea02..fd7722aecf77 100644 --- a/drivers/hid/hid-apple.c +++ b/drivers/hid/hid-apple.c | |||
@@ -522,6 +522,12 @@ static const struct hid_device_id apple_devices[] = { | |||
522 | .driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD }, | 522 | .driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD }, |
523 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_JIS), | 523 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_JIS), |
524 | .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS }, | 524 | .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS }, |
525 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_ANSI), | ||
526 | .driver_data = APPLE_HAS_FN }, | ||
527 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_ISO), | ||
528 | .driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD }, | ||
529 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS), | ||
530 | .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS }, | ||
525 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI), | 531 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI), |
526 | .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN }, | 532 | .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN }, |
527 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO), | 533 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO), |
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c index bd3971bf31bf..f4109fd657ff 100644 --- a/drivers/hid/hid-core.c +++ b/drivers/hid/hid-core.c | |||
@@ -1532,6 +1532,9 @@ static const struct hid_device_id hid_have_special_driver[] = { | |||
1532 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ANSI) }, | 1532 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ANSI) }, |
1533 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ISO) }, | 1533 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ISO) }, |
1534 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_JIS) }, | 1534 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_JIS) }, |
1535 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_ANSI) }, | ||
1536 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_ISO) }, | ||
1537 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS) }, | ||
1535 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI) }, | 1538 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI) }, |
1536 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO) }, | 1539 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO) }, |
1537 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS) }, | 1540 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS) }, |
@@ -2139,6 +2142,9 @@ static const struct hid_device_id hid_mouse_ignore_list[] = { | |||
2139 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ANSI) }, | 2142 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ANSI) }, |
2140 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ISO) }, | 2143 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ISO) }, |
2141 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_JIS) }, | 2144 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_JIS) }, |
2145 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_ANSI) }, | ||
2146 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_ISO) }, | ||
2147 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS) }, | ||
2142 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) }, | 2148 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) }, |
2143 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) }, | 2149 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) }, |
2144 | { } | 2150 | { } |
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h index 269b50912a4a..9d7a42857ea1 100644 --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h | |||
@@ -118,6 +118,9 @@ | |||
118 | #define USB_DEVICE_ID_APPLE_WELLSPRING5A_ANSI 0x0252 | 118 | #define USB_DEVICE_ID_APPLE_WELLSPRING5A_ANSI 0x0252 |
119 | #define USB_DEVICE_ID_APPLE_WELLSPRING5A_ISO 0x0253 | 119 | #define USB_DEVICE_ID_APPLE_WELLSPRING5A_ISO 0x0253 |
120 | #define USB_DEVICE_ID_APPLE_WELLSPRING5A_JIS 0x0254 | 120 | #define USB_DEVICE_ID_APPLE_WELLSPRING5A_JIS 0x0254 |
121 | #define USB_DEVICE_ID_APPLE_WELLSPRING7A_ANSI 0x0259 | ||
122 | #define USB_DEVICE_ID_APPLE_WELLSPRING7A_ISO 0x025a | ||
123 | #define USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS 0x025b | ||
121 | #define USB_DEVICE_ID_APPLE_WELLSPRING6A_ANSI 0x0249 | 124 | #define USB_DEVICE_ID_APPLE_WELLSPRING6A_ANSI 0x0249 |
122 | #define USB_DEVICE_ID_APPLE_WELLSPRING6A_ISO 0x024a | 125 | #define USB_DEVICE_ID_APPLE_WELLSPRING6A_ISO 0x024a |
123 | #define USB_DEVICE_ID_APPLE_WELLSPRING6A_JIS 0x024b | 126 | #define USB_DEVICE_ID_APPLE_WELLSPRING6A_JIS 0x024b |
diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c index 3acdcfcc17df..f676c01bb471 100644 --- a/drivers/hid/hid-microsoft.c +++ b/drivers/hid/hid-microsoft.c | |||
@@ -28,22 +28,30 @@ | |||
28 | #define MS_RDESC 0x08 | 28 | #define MS_RDESC 0x08 |
29 | #define MS_NOGET 0x10 | 29 | #define MS_NOGET 0x10 |
30 | #define MS_DUPLICATE_USAGES 0x20 | 30 | #define MS_DUPLICATE_USAGES 0x20 |
31 | #define MS_RDESC_3K 0x40 | ||
31 | 32 | ||
32 | /* | ||
33 | * Microsoft Wireless Desktop Receiver (Model 1028) has | ||
34 | * 'Usage Min/Max' where it ought to have 'Physical Min/Max' | ||
35 | */ | ||
36 | static __u8 *ms_report_fixup(struct hid_device *hdev, __u8 *rdesc, | 33 | static __u8 *ms_report_fixup(struct hid_device *hdev, __u8 *rdesc, |
37 | unsigned int *rsize) | 34 | unsigned int *rsize) |
38 | { | 35 | { |
39 | unsigned long quirks = (unsigned long)hid_get_drvdata(hdev); | 36 | unsigned long quirks = (unsigned long)hid_get_drvdata(hdev); |
40 | 37 | ||
38 | /* | ||
39 | * Microsoft Wireless Desktop Receiver (Model 1028) has | ||
40 | * 'Usage Min/Max' where it ought to have 'Physical Min/Max' | ||
41 | */ | ||
41 | if ((quirks & MS_RDESC) && *rsize == 571 && rdesc[557] == 0x19 && | 42 | if ((quirks & MS_RDESC) && *rsize == 571 && rdesc[557] == 0x19 && |
42 | rdesc[559] == 0x29) { | 43 | rdesc[559] == 0x29) { |
43 | hid_info(hdev, "fixing up Microsoft Wireless Receiver Model 1028 report descriptor\n"); | 44 | hid_info(hdev, "fixing up Microsoft Wireless Receiver Model 1028 report descriptor\n"); |
44 | rdesc[557] = 0x35; | 45 | rdesc[557] = 0x35; |
45 | rdesc[559] = 0x45; | 46 | rdesc[559] = 0x45; |
46 | } | 47 | } |
48 | /* the same as above (s/usage/physical/) */ | ||
49 | if ((quirks & MS_RDESC_3K) && *rsize == 106 && | ||
50 | !memcmp((char []){ 0x19, 0x00, 0x29, 0xff }, | ||
51 | &rdesc[94], 4)) { | ||
52 | rdesc[94] = 0x35; | ||
53 | rdesc[96] = 0x45; | ||
54 | } | ||
47 | return rdesc; | 55 | return rdesc; |
48 | } | 56 | } |
49 | 57 | ||
@@ -192,7 +200,7 @@ static const struct hid_device_id ms_devices[] = { | |||
192 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB), | 200 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB), |
193 | .driver_data = MS_PRESENTER }, | 201 | .driver_data = MS_PRESENTER }, |
194 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K), | 202 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K), |
195 | .driver_data = MS_ERGONOMY }, | 203 | .driver_data = MS_ERGONOMY | MS_RDESC_3K }, |
196 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0), | 204 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0), |
197 | .driver_data = MS_NOGET }, | 205 | .driver_data = MS_NOGET }, |
198 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_MOUSE_4500), | 206 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_MOUSE_4500), |
diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c index 3eb02b94fc87..7867d69f0efe 100644 --- a/drivers/hid/hid-multitouch.c +++ b/drivers/hid/hid-multitouch.c | |||
@@ -210,8 +210,7 @@ static struct mt_class mt_classes[] = { | |||
210 | }, | 210 | }, |
211 | { .name = MT_CLS_GENERALTOUCH_PWT_TENFINGERS, | 211 | { .name = MT_CLS_GENERALTOUCH_PWT_TENFINGERS, |
212 | .quirks = MT_QUIRK_NOT_SEEN_MEANS_UP | | 212 | .quirks = MT_QUIRK_NOT_SEEN_MEANS_UP | |
213 | MT_QUIRK_SLOT_IS_CONTACTNUMBER, | 213 | MT_QUIRK_SLOT_IS_CONTACTNUMBER |
214 | .maxcontacts = 10 | ||
215 | }, | 214 | }, |
216 | 215 | ||
217 | { .name = MT_CLS_FLATFROG, | 216 | { .name = MT_CLS_FLATFROG, |
@@ -421,11 +420,11 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi, | |||
421 | * contact max are global to the report */ | 420 | * contact max are global to the report */ |
422 | td->last_field_index = field->index; | 421 | td->last_field_index = field->index; |
423 | return -1; | 422 | return -1; |
424 | } | ||
425 | case HID_DG_TOUCH: | 423 | case HID_DG_TOUCH: |
426 | /* Legacy devices use TIPSWITCH and not TOUCH. | 424 | /* Legacy devices use TIPSWITCH and not TOUCH. |
427 | * Let's just ignore this field. */ | 425 | * Let's just ignore this field. */ |
428 | return -1; | 426 | return -1; |
427 | } | ||
429 | /* let hid-input decide for the others */ | 428 | /* let hid-input decide for the others */ |
430 | return 0; | 429 | return 0; |
431 | 430 | ||
diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c index 17d15bb610d1..7c47fc3f7b2b 100644 --- a/drivers/hid/hidraw.c +++ b/drivers/hid/hidraw.c | |||
@@ -42,7 +42,6 @@ static struct cdev hidraw_cdev; | |||
42 | static struct class *hidraw_class; | 42 | static struct class *hidraw_class; |
43 | static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES]; | 43 | static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES]; |
44 | static DEFINE_MUTEX(minors_lock); | 44 | static DEFINE_MUTEX(minors_lock); |
45 | static void drop_ref(struct hidraw *hid, int exists_bit); | ||
46 | 45 | ||
47 | static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos) | 46 | static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos) |
48 | { | 47 | { |
@@ -114,7 +113,7 @@ static ssize_t hidraw_send_report(struct file *file, const char __user *buffer, | |||
114 | __u8 *buf; | 113 | __u8 *buf; |
115 | int ret = 0; | 114 | int ret = 0; |
116 | 115 | ||
117 | if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { | 116 | if (!hidraw_table[minor]) { |
118 | ret = -ENODEV; | 117 | ret = -ENODEV; |
119 | goto out; | 118 | goto out; |
120 | } | 119 | } |
@@ -262,7 +261,7 @@ static int hidraw_open(struct inode *inode, struct file *file) | |||
262 | } | 261 | } |
263 | 262 | ||
264 | mutex_lock(&minors_lock); | 263 | mutex_lock(&minors_lock); |
265 | if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { | 264 | if (!hidraw_table[minor]) { |
266 | err = -ENODEV; | 265 | err = -ENODEV; |
267 | goto out_unlock; | 266 | goto out_unlock; |
268 | } | 267 | } |
@@ -299,12 +298,36 @@ out: | |||
299 | static int hidraw_release(struct inode * inode, struct file * file) | 298 | static int hidraw_release(struct inode * inode, struct file * file) |
300 | { | 299 | { |
301 | unsigned int minor = iminor(inode); | 300 | unsigned int minor = iminor(inode); |
301 | struct hidraw *dev; | ||
302 | struct hidraw_list *list = file->private_data; | 302 | struct hidraw_list *list = file->private_data; |
303 | int ret; | ||
304 | int i; | ||
305 | |||
306 | mutex_lock(&minors_lock); | ||
307 | if (!hidraw_table[minor]) { | ||
308 | ret = -ENODEV; | ||
309 | goto unlock; | ||
310 | } | ||
303 | 311 | ||
304 | drop_ref(hidraw_table[minor], 0); | ||
305 | list_del(&list->node); | 312 | list_del(&list->node); |
313 | dev = hidraw_table[minor]; | ||
314 | if (!--dev->open) { | ||
315 | if (list->hidraw->exist) { | ||
316 | hid_hw_power(dev->hid, PM_HINT_NORMAL); | ||
317 | hid_hw_close(dev->hid); | ||
318 | } else { | ||
319 | kfree(list->hidraw); | ||
320 | } | ||
321 | } | ||
322 | |||
323 | for (i = 0; i < HIDRAW_BUFFER_SIZE; ++i) | ||
324 | kfree(list->buffer[i].value); | ||
306 | kfree(list); | 325 | kfree(list); |
307 | return 0; | 326 | ret = 0; |
327 | unlock: | ||
328 | mutex_unlock(&minors_lock); | ||
329 | |||
330 | return ret; | ||
308 | } | 331 | } |
309 | 332 | ||
310 | static long hidraw_ioctl(struct file *file, unsigned int cmd, | 333 | static long hidraw_ioctl(struct file *file, unsigned int cmd, |
@@ -506,7 +529,21 @@ EXPORT_SYMBOL_GPL(hidraw_connect); | |||
506 | void hidraw_disconnect(struct hid_device *hid) | 529 | void hidraw_disconnect(struct hid_device *hid) |
507 | { | 530 | { |
508 | struct hidraw *hidraw = hid->hidraw; | 531 | struct hidraw *hidraw = hid->hidraw; |
509 | drop_ref(hidraw, 1); | 532 | |
533 | mutex_lock(&minors_lock); | ||
534 | hidraw->exist = 0; | ||
535 | |||
536 | device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor)); | ||
537 | |||
538 | hidraw_table[hidraw->minor] = NULL; | ||
539 | |||
540 | if (hidraw->open) { | ||
541 | hid_hw_close(hid); | ||
542 | wake_up_interruptible(&hidraw->wait); | ||
543 | } else { | ||
544 | kfree(hidraw); | ||
545 | } | ||
546 | mutex_unlock(&minors_lock); | ||
510 | } | 547 | } |
511 | EXPORT_SYMBOL_GPL(hidraw_disconnect); | 548 | EXPORT_SYMBOL_GPL(hidraw_disconnect); |
512 | 549 | ||
@@ -555,23 +592,3 @@ void hidraw_exit(void) | |||
555 | unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES); | 592 | unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES); |
556 | 593 | ||
557 | } | 594 | } |
558 | |||
559 | static void drop_ref(struct hidraw *hidraw, int exists_bit) | ||
560 | { | ||
561 | mutex_lock(&minors_lock); | ||
562 | if (exists_bit) { | ||
563 | hid_hw_close(hidraw->hid); | ||
564 | hidraw->exist = 0; | ||
565 | if (hidraw->open) | ||
566 | wake_up_interruptible(&hidraw->wait); | ||
567 | } else { | ||
568 | --hidraw->open; | ||
569 | } | ||
570 | |||
571 | if (!hidraw->open && !hidraw->exist) { | ||
572 | device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor)); | ||
573 | hidraw_table[hidraw->minor] = NULL; | ||
574 | kfree(hidraw); | ||
575 | } | ||
576 | mutex_unlock(&minors_lock); | ||
577 | } | ||
diff --git a/drivers/hwmon/asb100.c b/drivers/hwmon/asb100.c index a227be47149f..520e5bf4f76d 100644 --- a/drivers/hwmon/asb100.c +++ b/drivers/hwmon/asb100.c | |||
@@ -32,7 +32,7 @@ | |||
32 | * ASB100-A supports pwm1, while plain ASB100 does not. There is no known | 32 | * ASB100-A supports pwm1, while plain ASB100 does not. There is no known |
33 | * way for the driver to tell which one is there. | 33 | * way for the driver to tell which one is there. |
34 | * | 34 | * |
35 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 35 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
36 | * asb100 7 3 1 4 0x31 0x0694 yes no | 36 | * asb100 7 3 1 4 0x31 0x0694 yes no |
37 | */ | 37 | */ |
38 | 38 | ||
diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c index 68ad7d255512..4f4110407387 100644 --- a/drivers/hwmon/fam15h_power.c +++ b/drivers/hwmon/fam15h_power.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * fam15h_power.c - AMD Family 15h processor power monitoring | 2 | * fam15h_power.c - AMD Family 15h processor power monitoring |
3 | * | 3 | * |
4 | * Copyright (c) 2011 Advanced Micro Devices, Inc. | 4 | * Copyright (c) 2011 Advanced Micro Devices, Inc. |
5 | * Author: Andreas Herrmann <andreas.herrmann3@amd.com> | 5 | * Author: Andreas Herrmann <herrmann.der.user@googlemail.com> |
6 | * | 6 | * |
7 | * | 7 | * |
8 | * This driver is free software; you can redistribute it and/or | 8 | * This driver is free software; you can redistribute it and/or |
@@ -28,7 +28,7 @@ | |||
28 | #include <asm/processor.h> | 28 | #include <asm/processor.h> |
29 | 29 | ||
30 | MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor"); | 30 | MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor"); |
31 | MODULE_AUTHOR("Andreas Herrmann <andreas.herrmann3@amd.com>"); | 31 | MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>"); |
32 | MODULE_LICENSE("GPL"); | 32 | MODULE_LICENSE("GPL"); |
33 | 33 | ||
34 | /* D18F3 */ | 34 | /* D18F3 */ |
diff --git a/drivers/hwmon/gpio-fan.c b/drivers/hwmon/gpio-fan.c index 36509ae32083..1381a2e3bbd4 100644 --- a/drivers/hwmon/gpio-fan.c +++ b/drivers/hwmon/gpio-fan.c | |||
@@ -630,7 +630,9 @@ static struct platform_driver gpio_fan_driver = { | |||
630 | .driver = { | 630 | .driver = { |
631 | .name = "gpio-fan", | 631 | .name = "gpio-fan", |
632 | .pm = GPIO_FAN_PM, | 632 | .pm = GPIO_FAN_PM, |
633 | #ifdef CONFIG_OF_GPIO | ||
633 | .of_match_table = of_match_ptr(of_gpio_fan_match), | 634 | .of_match_table = of_match_ptr(of_gpio_fan_match), |
635 | #endif | ||
634 | }, | 636 | }, |
635 | }; | 637 | }; |
636 | 638 | ||
diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c index 1821b7423d5b..de3c7e04c3b5 100644 --- a/drivers/hwmon/w83627ehf.c +++ b/drivers/hwmon/w83627ehf.c | |||
@@ -2083,6 +2083,7 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev) | |||
2083 | mutex_init(&data->lock); | 2083 | mutex_init(&data->lock); |
2084 | mutex_init(&data->update_lock); | 2084 | mutex_init(&data->update_lock); |
2085 | data->name = w83627ehf_device_names[sio_data->kind]; | 2085 | data->name = w83627ehf_device_names[sio_data->kind]; |
2086 | data->bank = 0xff; /* Force initial bank selection */ | ||
2086 | platform_set_drvdata(pdev, data); | 2087 | platform_set_drvdata(pdev, data); |
2087 | 2088 | ||
2088 | /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */ | 2089 | /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */ |
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c index 5b1a6a666441..af1589908709 100644 --- a/drivers/hwmon/w83627hf.c +++ b/drivers/hwmon/w83627hf.c | |||
@@ -25,7 +25,7 @@ | |||
25 | /* | 25 | /* |
26 | * Supports following chips: | 26 | * Supports following chips: |
27 | * | 27 | * |
28 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 28 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
29 | * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) | 29 | * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) |
30 | * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) | 30 | * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) |
31 | * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) | 31 | * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) |
diff --git a/drivers/hwmon/w83781d.c b/drivers/hwmon/w83781d.c index 5a5046d94c3e..20f11d31da40 100644 --- a/drivers/hwmon/w83781d.c +++ b/drivers/hwmon/w83781d.c | |||
@@ -24,7 +24,7 @@ | |||
24 | /* | 24 | /* |
25 | * Supports following chips: | 25 | * Supports following chips: |
26 | * | 26 | * |
27 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 27 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
28 | * as99127f 7 3 0 3 0x31 0x12c3 yes no | 28 | * as99127f 7 3 0 3 0x31 0x12c3 yes no |
29 | * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no | 29 | * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no |
30 | * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes | 30 | * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes |
diff --git a/drivers/hwmon/w83791d.c b/drivers/hwmon/w83791d.c index 39ab7bcc616e..ed397c645198 100644 --- a/drivers/hwmon/w83791d.c +++ b/drivers/hwmon/w83791d.c | |||
@@ -22,7 +22,7 @@ | |||
22 | /* | 22 | /* |
23 | * Supports following chips: | 23 | * Supports following chips: |
24 | * | 24 | * |
25 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 25 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
26 | * w83791d 10 5 5 3 0x71 0x5ca3 yes no | 26 | * w83791d 10 5 5 3 0x71 0x5ca3 yes no |
27 | * | 27 | * |
28 | * The w83791d chip appears to be part way between the 83781d and the | 28 | * The w83791d chip appears to be part way between the 83781d and the |
diff --git a/drivers/hwmon/w83792d.c b/drivers/hwmon/w83792d.c index 053645279f38..301942d08453 100644 --- a/drivers/hwmon/w83792d.c +++ b/drivers/hwmon/w83792d.c | |||
@@ -31,7 +31,7 @@ | |||
31 | /* | 31 | /* |
32 | * Supports following chips: | 32 | * Supports following chips: |
33 | * | 33 | * |
34 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 34 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
35 | * w83792d 9 7 7 3 0x7a 0x5ca3 yes no | 35 | * w83792d 9 7 7 3 0x7a 0x5ca3 yes no |
36 | */ | 36 | */ |
37 | 37 | ||
diff --git a/drivers/hwmon/w83l786ng.c b/drivers/hwmon/w83l786ng.c index f0e8286c3c70..79710bcac2f7 100644 --- a/drivers/hwmon/w83l786ng.c +++ b/drivers/hwmon/w83l786ng.c | |||
@@ -20,7 +20,7 @@ | |||
20 | /* | 20 | /* |
21 | * Supports following chips: | 21 | * Supports following chips: |
22 | * | 22 | * |
23 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 23 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
24 | * w83l786ng 3 2 2 2 0x7b 0x5ca3 yes no | 24 | * w83l786ng 3 2 2 2 0x7b 0x5ca3 yes no |
25 | */ | 25 | */ |
26 | 26 | ||
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index beee6b2d361d..1722f50f2473 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile | |||
@@ -8,6 +8,7 @@ obj-$(CONFIG_I2C_SMBUS) += i2c-smbus.o | |||
8 | obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o | 8 | obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o |
9 | obj-$(CONFIG_I2C_MUX) += i2c-mux.o | 9 | obj-$(CONFIG_I2C_MUX) += i2c-mux.o |
10 | obj-y += algos/ busses/ muxes/ | 10 | obj-y += algos/ busses/ muxes/ |
11 | obj-$(CONFIG_I2C_STUB) += i2c-stub.o | ||
11 | 12 | ||
12 | ccflags-$(CONFIG_I2C_DEBUG_CORE) := -DDEBUG | 13 | ccflags-$(CONFIG_I2C_DEBUG_CORE) := -DDEBUG |
13 | CFLAGS_i2c-core.o := -Wno-deprecated-declarations | 14 | CFLAGS_i2c-core.o := -Wno-deprecated-declarations |
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 65dd599a0262..e9df4612b7eb 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig | |||
@@ -81,7 +81,6 @@ config I2C_I801 | |||
81 | tristate "Intel 82801 (ICH/PCH)" | 81 | tristate "Intel 82801 (ICH/PCH)" |
82 | depends on PCI | 82 | depends on PCI |
83 | select CHECK_SIGNATURE if X86 && DMI | 83 | select CHECK_SIGNATURE if X86 && DMI |
84 | select GPIOLIB if I2C_MUX | ||
85 | help | 84 | help |
86 | If you say yes to this option, support will be included for the Intel | 85 | If you say yes to this option, support will be included for the Intel |
87 | 801 family of mainboard I2C interfaces. Specifically, the following | 86 | 801 family of mainboard I2C interfaces. Specifically, the following |
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 2d33d62952c1..395b516ffa08 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile | |||
@@ -85,7 +85,6 @@ obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o | |||
85 | obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o | 85 | obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o |
86 | obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o | 86 | obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o |
87 | obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o | 87 | obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o |
88 | obj-$(CONFIG_I2C_STUB) += i2c-stub.o | ||
89 | obj-$(CONFIG_SCx200_ACB) += scx200_acb.o | 88 | obj-$(CONFIG_SCx200_ACB) += scx200_acb.o |
90 | obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o | 89 | obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o |
91 | 90 | ||
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 37793156bd93..6abc00d59881 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c | |||
@@ -82,7 +82,8 @@ | |||
82 | #include <linux/wait.h> | 82 | #include <linux/wait.h> |
83 | #include <linux/err.h> | 83 | #include <linux/err.h> |
84 | 84 | ||
85 | #if defined CONFIG_I2C_MUX || defined CONFIG_I2C_MUX_MODULE | 85 | #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ |
86 | defined CONFIG_DMI | ||
86 | #include <linux/gpio.h> | 87 | #include <linux/gpio.h> |
87 | #include <linux/i2c-mux-gpio.h> | 88 | #include <linux/i2c-mux-gpio.h> |
88 | #include <linux/platform_device.h> | 89 | #include <linux/platform_device.h> |
@@ -192,7 +193,8 @@ struct i801_priv { | |||
192 | int len; | 193 | int len; |
193 | u8 *data; | 194 | u8 *data; |
194 | 195 | ||
195 | #if defined CONFIG_I2C_MUX || defined CONFIG_I2C_MUX_MODULE | 196 | #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ |
197 | defined CONFIG_DMI | ||
196 | const struct i801_mux_config *mux_drvdata; | 198 | const struct i801_mux_config *mux_drvdata; |
197 | struct platform_device *mux_pdev; | 199 | struct platform_device *mux_pdev; |
198 | #endif | 200 | #endif |
@@ -921,7 +923,8 @@ static void __init input_apanel_init(void) {} | |||
921 | static void __devinit i801_probe_optional_slaves(struct i801_priv *priv) {} | 923 | static void __devinit i801_probe_optional_slaves(struct i801_priv *priv) {} |
922 | #endif /* CONFIG_X86 && CONFIG_DMI */ | 924 | #endif /* CONFIG_X86 && CONFIG_DMI */ |
923 | 925 | ||
924 | #if defined CONFIG_I2C_MUX || defined CONFIG_I2C_MUX_MODULE | 926 | #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ |
927 | defined CONFIG_DMI | ||
925 | static struct i801_mux_config i801_mux_config_asus_z8_d12 = { | 928 | static struct i801_mux_config i801_mux_config_asus_z8_d12 = { |
926 | .gpio_chip = "gpio_ich", | 929 | .gpio_chip = "gpio_ich", |
927 | .values = { 0x02, 0x03 }, | 930 | .values = { 0x02, 0x03 }, |
@@ -1059,7 +1062,7 @@ static unsigned int __devinit i801_get_adapter_class(struct i801_priv *priv) | |||
1059 | 1062 | ||
1060 | id = dmi_first_match(mux_dmi_table); | 1063 | id = dmi_first_match(mux_dmi_table); |
1061 | if (id) { | 1064 | if (id) { |
1062 | /* Remove from branch classes from trunk */ | 1065 | /* Remove branch classes from trunk */ |
1063 | mux_config = id->driver_data; | 1066 | mux_config = id->driver_data; |
1064 | for (i = 0; i < mux_config->n_values; i++) | 1067 | for (i = 0; i < mux_config->n_values; i++) |
1065 | class &= ~mux_config->classes[i]; | 1068 | class &= ~mux_config->classes[i]; |
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c index 1f58197062cf..286ca1917820 100644 --- a/drivers/i2c/busses/i2c-mxs.c +++ b/drivers/i2c/busses/i2c-mxs.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Freescale MXS I2C bus driver | 2 | * Freescale MXS I2C bus driver |
3 | * | 3 | * |
4 | * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K. | 4 | * Copyright (C) 2011-2012 Wolfram Sang, Pengutronix e.K. |
5 | * | 5 | * |
6 | * based on a (non-working) driver which was: | 6 | * based on a (non-working) driver which was: |
7 | * | 7 | * |
@@ -35,10 +35,6 @@ | |||
35 | 35 | ||
36 | #define DRIVER_NAME "mxs-i2c" | 36 | #define DRIVER_NAME "mxs-i2c" |
37 | 37 | ||
38 | static bool use_pioqueue; | ||
39 | module_param(use_pioqueue, bool, 0); | ||
40 | MODULE_PARM_DESC(use_pioqueue, "Use PIOQUEUE mode for transfer instead of DMA"); | ||
41 | |||
42 | #define MXS_I2C_CTRL0 (0x00) | 38 | #define MXS_I2C_CTRL0 (0x00) |
43 | #define MXS_I2C_CTRL0_SET (0x04) | 39 | #define MXS_I2C_CTRL0_SET (0x04) |
44 | 40 | ||
@@ -75,23 +71,6 @@ MODULE_PARM_DESC(use_pioqueue, "Use PIOQUEUE mode for transfer instead of DMA"); | |||
75 | MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \ | 71 | MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \ |
76 | MXS_I2C_CTRL1_SLAVE_IRQ) | 72 | MXS_I2C_CTRL1_SLAVE_IRQ) |
77 | 73 | ||
78 | #define MXS_I2C_QUEUECTRL (0x60) | ||
79 | #define MXS_I2C_QUEUECTRL_SET (0x64) | ||
80 | #define MXS_I2C_QUEUECTRL_CLR (0x68) | ||
81 | |||
82 | #define MXS_I2C_QUEUECTRL_QUEUE_RUN 0x20 | ||
83 | #define MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE 0x04 | ||
84 | |||
85 | #define MXS_I2C_QUEUESTAT (0x70) | ||
86 | #define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000 | ||
87 | #define MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK 0x0000001F | ||
88 | |||
89 | #define MXS_I2C_QUEUECMD (0x80) | ||
90 | |||
91 | #define MXS_I2C_QUEUEDATA (0x90) | ||
92 | |||
93 | #define MXS_I2C_DATA (0xa0) | ||
94 | |||
95 | 74 | ||
96 | #define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \ | 75 | #define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \ |
97 | MXS_I2C_CTRL0_PRE_SEND_START | \ | 76 | MXS_I2C_CTRL0_PRE_SEND_START | \ |
@@ -153,7 +132,6 @@ struct mxs_i2c_dev { | |||
153 | const struct mxs_i2c_speed_config *speed; | 132 | const struct mxs_i2c_speed_config *speed; |
154 | 133 | ||
155 | /* DMA support components */ | 134 | /* DMA support components */ |
156 | bool dma_mode; | ||
157 | int dma_channel; | 135 | int dma_channel; |
158 | struct dma_chan *dmach; | 136 | struct dma_chan *dmach; |
159 | struct mxs_dma_data dma_data; | 137 | struct mxs_dma_data dma_data; |
@@ -172,99 +150,6 @@ static void mxs_i2c_reset(struct mxs_i2c_dev *i2c) | |||
172 | writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2); | 150 | writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2); |
173 | 151 | ||
174 | writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); | 152 | writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); |
175 | if (i2c->dma_mode) | ||
176 | writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE, | ||
177 | i2c->regs + MXS_I2C_QUEUECTRL_CLR); | ||
178 | else | ||
179 | writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE, | ||
180 | i2c->regs + MXS_I2C_QUEUECTRL_SET); | ||
181 | } | ||
182 | |||
183 | static void mxs_i2c_pioq_setup_read(struct mxs_i2c_dev *i2c, u8 addr, int len, | ||
184 | int flags) | ||
185 | { | ||
186 | u32 data; | ||
187 | |||
188 | writel(MXS_CMD_I2C_SELECT, i2c->regs + MXS_I2C_QUEUECMD); | ||
189 | |||
190 | data = (addr << 1) | I2C_SMBUS_READ; | ||
191 | writel(data, i2c->regs + MXS_I2C_DATA); | ||
192 | |||
193 | data = MXS_CMD_I2C_READ | MXS_I2C_CTRL0_XFER_COUNT(len) | flags; | ||
194 | writel(data, i2c->regs + MXS_I2C_QUEUECMD); | ||
195 | } | ||
196 | |||
197 | static void mxs_i2c_pioq_setup_write(struct mxs_i2c_dev *i2c, | ||
198 | u8 addr, u8 *buf, int len, int flags) | ||
199 | { | ||
200 | u32 data; | ||
201 | int i, shifts_left; | ||
202 | |||
203 | data = MXS_CMD_I2C_WRITE | MXS_I2C_CTRL0_XFER_COUNT(len + 1) | flags; | ||
204 | writel(data, i2c->regs + MXS_I2C_QUEUECMD); | ||
205 | |||
206 | /* | ||
207 | * We have to copy the slave address (u8) and buffer (arbitrary number | ||
208 | * of u8) into the data register (u32). To achieve that, the u8 are put | ||
209 | * into the MSBs of 'data' which is then shifted for the next u8. When | ||
210 | * appropriate, 'data' is written to MXS_I2C_DATA. So, the first u32 | ||
211 | * looks like this: | ||
212 | * | ||
213 | * 3 2 1 0 | ||
214 | * 10987654|32109876|54321098|76543210 | ||
215 | * --------+--------+--------+-------- | ||
216 | * buffer+2|buffer+1|buffer+0|slave_addr | ||
217 | */ | ||
218 | |||
219 | data = ((addr << 1) | I2C_SMBUS_WRITE) << 24; | ||
220 | |||
221 | for (i = 0; i < len; i++) { | ||
222 | data >>= 8; | ||
223 | data |= buf[i] << 24; | ||
224 | if ((i & 3) == 2) | ||
225 | writel(data, i2c->regs + MXS_I2C_DATA); | ||
226 | } | ||
227 | |||
228 | /* Write out the remaining bytes if any */ | ||
229 | shifts_left = 24 - (i & 3) * 8; | ||
230 | if (shifts_left) | ||
231 | writel(data >> shifts_left, i2c->regs + MXS_I2C_DATA); | ||
232 | } | ||
233 | |||
234 | /* | ||
235 | * TODO: should be replaceable with a waitqueue and RD_QUEUE_IRQ (setting the | ||
236 | * rd_threshold to 1). Couldn't get this to work, though. | ||
237 | */ | ||
238 | static int mxs_i2c_wait_for_data(struct mxs_i2c_dev *i2c) | ||
239 | { | ||
240 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); | ||
241 | |||
242 | while (readl(i2c->regs + MXS_I2C_QUEUESTAT) | ||
243 | & MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY) { | ||
244 | if (time_after(jiffies, timeout)) | ||
245 | return -ETIMEDOUT; | ||
246 | cond_resched(); | ||
247 | } | ||
248 | |||
249 | return 0; | ||
250 | } | ||
251 | |||
252 | static int mxs_i2c_finish_read(struct mxs_i2c_dev *i2c, u8 *buf, int len) | ||
253 | { | ||
254 | u32 uninitialized_var(data); | ||
255 | int i; | ||
256 | |||
257 | for (i = 0; i < len; i++) { | ||
258 | if ((i & 3) == 0) { | ||
259 | if (mxs_i2c_wait_for_data(i2c)) | ||
260 | return -ETIMEDOUT; | ||
261 | data = readl(i2c->regs + MXS_I2C_QUEUEDATA); | ||
262 | } | ||
263 | buf[i] = data & 0xff; | ||
264 | data >>= 8; | ||
265 | } | ||
266 | |||
267 | return 0; | ||
268 | } | 153 | } |
269 | 154 | ||
270 | static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c) | 155 | static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c) |
@@ -432,39 +317,17 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, | |||
432 | init_completion(&i2c->cmd_complete); | 317 | init_completion(&i2c->cmd_complete); |
433 | i2c->cmd_err = 0; | 318 | i2c->cmd_err = 0; |
434 | 319 | ||
435 | if (i2c->dma_mode) { | 320 | ret = mxs_i2c_dma_setup_xfer(adap, msg, flags); |
436 | ret = mxs_i2c_dma_setup_xfer(adap, msg, flags); | 321 | if (ret) |
437 | if (ret) | 322 | return ret; |
438 | return ret; | ||
439 | } else { | ||
440 | if (msg->flags & I2C_M_RD) { | ||
441 | mxs_i2c_pioq_setup_read(i2c, msg->addr, | ||
442 | msg->len, flags); | ||
443 | } else { | ||
444 | mxs_i2c_pioq_setup_write(i2c, msg->addr, msg->buf, | ||
445 | msg->len, flags); | ||
446 | } | ||
447 | |||
448 | writel(MXS_I2C_QUEUECTRL_QUEUE_RUN, | ||
449 | i2c->regs + MXS_I2C_QUEUECTRL_SET); | ||
450 | } | ||
451 | 323 | ||
452 | ret = wait_for_completion_timeout(&i2c->cmd_complete, | 324 | ret = wait_for_completion_timeout(&i2c->cmd_complete, |
453 | msecs_to_jiffies(1000)); | 325 | msecs_to_jiffies(1000)); |
454 | if (ret == 0) | 326 | if (ret == 0) |
455 | goto timeout; | 327 | goto timeout; |
456 | 328 | ||
457 | if (!i2c->dma_mode && !i2c->cmd_err && (msg->flags & I2C_M_RD)) { | ||
458 | ret = mxs_i2c_finish_read(i2c, msg->buf, msg->len); | ||
459 | if (ret) | ||
460 | goto timeout; | ||
461 | } | ||
462 | |||
463 | if (i2c->cmd_err == -ENXIO) | 329 | if (i2c->cmd_err == -ENXIO) |
464 | mxs_i2c_reset(i2c); | 330 | mxs_i2c_reset(i2c); |
465 | else | ||
466 | writel(MXS_I2C_QUEUECTRL_QUEUE_RUN, | ||
467 | i2c->regs + MXS_I2C_QUEUECTRL_CLR); | ||
468 | 331 | ||
469 | dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err); | 332 | dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err); |
470 | 333 | ||
@@ -472,8 +335,7 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, | |||
472 | 335 | ||
473 | timeout: | 336 | timeout: |
474 | dev_dbg(i2c->dev, "Timeout!\n"); | 337 | dev_dbg(i2c->dev, "Timeout!\n"); |
475 | if (i2c->dma_mode) | 338 | mxs_i2c_dma_finish(i2c); |
476 | mxs_i2c_dma_finish(i2c); | ||
477 | mxs_i2c_reset(i2c); | 339 | mxs_i2c_reset(i2c); |
478 | return -ETIMEDOUT; | 340 | return -ETIMEDOUT; |
479 | } | 341 | } |
@@ -502,7 +364,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) | |||
502 | { | 364 | { |
503 | struct mxs_i2c_dev *i2c = dev_id; | 365 | struct mxs_i2c_dev *i2c = dev_id; |
504 | u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK; | 366 | u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK; |
505 | bool is_last_cmd; | ||
506 | 367 | ||
507 | if (!stat) | 368 | if (!stat) |
508 | return IRQ_NONE; | 369 | return IRQ_NONE; |
@@ -515,14 +376,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) | |||
515 | /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */ | 376 | /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */ |
516 | i2c->cmd_err = -EIO; | 377 | i2c->cmd_err = -EIO; |
517 | 378 | ||
518 | if (!i2c->dma_mode) { | ||
519 | is_last_cmd = (readl(i2c->regs + MXS_I2C_QUEUESTAT) & | ||
520 | MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0; | ||
521 | |||
522 | if (is_last_cmd || i2c->cmd_err) | ||
523 | complete(&i2c->cmd_complete); | ||
524 | } | ||
525 | |||
526 | writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR); | 379 | writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR); |
527 | 380 | ||
528 | return IRQ_HANDLED; | 381 | return IRQ_HANDLED; |
@@ -556,23 +409,14 @@ static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c) | |||
556 | int ret; | 409 | int ret; |
557 | 410 | ||
558 | /* | 411 | /* |
559 | * The MXS I2C DMA mode is prefered and enabled by default. | ||
560 | * The PIO mode is still supported, but should be used only | ||
561 | * for debuging purposes etc. | ||
562 | */ | ||
563 | i2c->dma_mode = !use_pioqueue; | ||
564 | if (!i2c->dma_mode) | ||
565 | dev_info(dev, "Using PIOQUEUE mode for I2C transfers!\n"); | ||
566 | |||
567 | /* | ||
568 | * TODO: This is a temporary solution and should be changed | 412 | * TODO: This is a temporary solution and should be changed |
569 | * to use generic DMA binding later when the helpers get in. | 413 | * to use generic DMA binding later when the helpers get in. |
570 | */ | 414 | */ |
571 | ret = of_property_read_u32(node, "fsl,i2c-dma-channel", | 415 | ret = of_property_read_u32(node, "fsl,i2c-dma-channel", |
572 | &i2c->dma_channel); | 416 | &i2c->dma_channel); |
573 | if (ret) { | 417 | if (ret) { |
574 | dev_warn(dev, "Failed to get DMA channel, using PIOQUEUE!\n"); | 418 | dev_err(dev, "Failed to get DMA channel!\n"); |
575 | i2c->dma_mode = 0; | 419 | return -ENODEV; |
576 | } | 420 | } |
577 | 421 | ||
578 | ret = of_property_read_u32(node, "clock-frequency", &speed); | 422 | ret = of_property_read_u32(node, "clock-frequency", &speed); |
@@ -634,15 +478,13 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev) | |||
634 | } | 478 | } |
635 | 479 | ||
636 | /* Setup the DMA */ | 480 | /* Setup the DMA */ |
637 | if (i2c->dma_mode) { | 481 | dma_cap_zero(mask); |
638 | dma_cap_zero(mask); | 482 | dma_cap_set(DMA_SLAVE, mask); |
639 | dma_cap_set(DMA_SLAVE, mask); | 483 | i2c->dma_data.chan_irq = dmairq; |
640 | i2c->dma_data.chan_irq = dmairq; | 484 | i2c->dmach = dma_request_channel(mask, mxs_i2c_dma_filter, i2c); |
641 | i2c->dmach = dma_request_channel(mask, mxs_i2c_dma_filter, i2c); | 485 | if (!i2c->dmach) { |
642 | if (!i2c->dmach) { | 486 | dev_err(dev, "Failed to request dma\n"); |
643 | dev_err(dev, "Failed to request dma\n"); | 487 | return -ENODEV; |
644 | return -ENODEV; | ||
645 | } | ||
646 | } | 488 | } |
647 | 489 | ||
648 | platform_set_drvdata(pdev, i2c); | 490 | platform_set_drvdata(pdev, i2c); |
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index 698d7acb0f08..02c3115a2dfa 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c | |||
@@ -644,7 +644,11 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
644 | 644 | ||
645 | pm_runtime_get_sync(&dev->adev->dev); | 645 | pm_runtime_get_sync(&dev->adev->dev); |
646 | 646 | ||
647 | clk_enable(dev->clk); | 647 | status = clk_prepare_enable(dev->clk); |
648 | if (status) { | ||
649 | dev_err(&dev->adev->dev, "can't prepare_enable clock\n"); | ||
650 | goto out_clk; | ||
651 | } | ||
648 | 652 | ||
649 | status = init_hw(dev); | 653 | status = init_hw(dev); |
650 | if (status) | 654 | if (status) |
@@ -671,7 +675,8 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
671 | } | 675 | } |
672 | 676 | ||
673 | out: | 677 | out: |
674 | clk_disable(dev->clk); | 678 | clk_disable_unprepare(dev->clk); |
679 | out_clk: | ||
675 | pm_runtime_put_sync(&dev->adev->dev); | 680 | pm_runtime_put_sync(&dev->adev->dev); |
676 | 681 | ||
677 | dev->busy = false; | 682 | dev->busy = false; |
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index f981ac4e6783..dcea77bf6f50 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c | |||
@@ -742,7 +742,7 @@ static int __devinit tegra_i2c_probe(struct platform_device *pdev) | |||
742 | } | 742 | } |
743 | 743 | ||
744 | ret = devm_request_irq(&pdev->dev, i2c_dev->irq, | 744 | ret = devm_request_irq(&pdev->dev, i2c_dev->irq, |
745 | tegra_i2c_isr, 0, pdev->name, i2c_dev); | 745 | tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev); |
746 | if (ret) { | 746 | if (ret) { |
747 | dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq); | 747 | dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq); |
748 | return ret; | 748 | return ret; |
diff --git a/drivers/i2c/busses/i2c-stub.c b/drivers/i2c/i2c-stub.c index b1b3447942c9..d0a9c590c3cd 100644 --- a/drivers/i2c/busses/i2c-stub.c +++ b/drivers/i2c/i2c-stub.c | |||
@@ -2,7 +2,7 @@ | |||
2 | i2c-stub.c - I2C/SMBus chip emulator | 2 | i2c-stub.c - I2C/SMBus chip emulator |
3 | 3 | ||
4 | Copyright (c) 2004 Mark M. Hoffman <mhoffman@lightlink.com> | 4 | Copyright (c) 2004 Mark M. Hoffman <mhoffman@lightlink.com> |
5 | Copyright (C) 2007 Jean Delvare <khali@linux-fr.org> | 5 | Copyright (C) 2007, 2012 Jean Delvare <khali@linux-fr.org> |
6 | 6 | ||
7 | This program is free software; you can redistribute it and/or modify | 7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | 8 | it under the terms of the GNU General Public License as published by |
@@ -51,8 +51,8 @@ struct stub_chip { | |||
51 | static struct stub_chip *stub_chips; | 51 | static struct stub_chip *stub_chips; |
52 | 52 | ||
53 | /* Return negative errno on error. */ | 53 | /* Return negative errno on error. */ |
54 | static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, | 54 | static s32 stub_xfer(struct i2c_adapter *adap, u16 addr, unsigned short flags, |
55 | char read_write, u8 command, int size, union i2c_smbus_data * data) | 55 | char read_write, u8 command, int size, union i2c_smbus_data *data) |
56 | { | 56 | { |
57 | s32 ret; | 57 | s32 ret; |
58 | int i, len; | 58 | int i, len; |
@@ -78,14 +78,14 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, | |||
78 | case I2C_SMBUS_BYTE: | 78 | case I2C_SMBUS_BYTE: |
79 | if (read_write == I2C_SMBUS_WRITE) { | 79 | if (read_write == I2C_SMBUS_WRITE) { |
80 | chip->pointer = command; | 80 | chip->pointer = command; |
81 | dev_dbg(&adap->dev, "smbus byte - addr 0x%02x, " | 81 | dev_dbg(&adap->dev, |
82 | "wrote 0x%02x.\n", | 82 | "smbus byte - addr 0x%02x, wrote 0x%02x.\n", |
83 | addr, command); | 83 | addr, command); |
84 | } else { | 84 | } else { |
85 | data->byte = chip->words[chip->pointer++] & 0xff; | 85 | data->byte = chip->words[chip->pointer++] & 0xff; |
86 | dev_dbg(&adap->dev, "smbus byte - addr 0x%02x, " | 86 | dev_dbg(&adap->dev, |
87 | "read 0x%02x.\n", | 87 | "smbus byte - addr 0x%02x, read 0x%02x.\n", |
88 | addr, data->byte); | 88 | addr, data->byte); |
89 | } | 89 | } |
90 | 90 | ||
91 | ret = 0; | 91 | ret = 0; |
@@ -95,14 +95,14 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, | |||
95 | if (read_write == I2C_SMBUS_WRITE) { | 95 | if (read_write == I2C_SMBUS_WRITE) { |
96 | chip->words[command] &= 0xff00; | 96 | chip->words[command] &= 0xff00; |
97 | chip->words[command] |= data->byte; | 97 | chip->words[command] |= data->byte; |
98 | dev_dbg(&adap->dev, "smbus byte data - addr 0x%02x, " | 98 | dev_dbg(&adap->dev, |
99 | "wrote 0x%02x at 0x%02x.\n", | 99 | "smbus byte data - addr 0x%02x, wrote 0x%02x at 0x%02x.\n", |
100 | addr, data->byte, command); | 100 | addr, data->byte, command); |
101 | } else { | 101 | } else { |
102 | data->byte = chip->words[command] & 0xff; | 102 | data->byte = chip->words[command] & 0xff; |
103 | dev_dbg(&adap->dev, "smbus byte data - addr 0x%02x, " | 103 | dev_dbg(&adap->dev, |
104 | "read 0x%02x at 0x%02x.\n", | 104 | "smbus byte data - addr 0x%02x, read 0x%02x at 0x%02x.\n", |
105 | addr, data->byte, command); | 105 | addr, data->byte, command); |
106 | } | 106 | } |
107 | chip->pointer = command + 1; | 107 | chip->pointer = command + 1; |
108 | 108 | ||
@@ -112,14 +112,14 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, | |||
112 | case I2C_SMBUS_WORD_DATA: | 112 | case I2C_SMBUS_WORD_DATA: |
113 | if (read_write == I2C_SMBUS_WRITE) { | 113 | if (read_write == I2C_SMBUS_WRITE) { |
114 | chip->words[command] = data->word; | 114 | chip->words[command] = data->word; |
115 | dev_dbg(&adap->dev, "smbus word data - addr 0x%02x, " | 115 | dev_dbg(&adap->dev, |
116 | "wrote 0x%04x at 0x%02x.\n", | 116 | "smbus word data - addr 0x%02x, wrote 0x%04x at 0x%02x.\n", |
117 | addr, data->word, command); | 117 | addr, data->word, command); |
118 | } else { | 118 | } else { |
119 | data->word = chip->words[command]; | 119 | data->word = chip->words[command]; |
120 | dev_dbg(&adap->dev, "smbus word data - addr 0x%02x, " | 120 | dev_dbg(&adap->dev, |
121 | "read 0x%04x at 0x%02x.\n", | 121 | "smbus word data - addr 0x%02x, read 0x%04x at 0x%02x.\n", |
122 | addr, data->word, command); | 122 | addr, data->word, command); |
123 | } | 123 | } |
124 | 124 | ||
125 | ret = 0; | 125 | ret = 0; |
@@ -132,17 +132,17 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, | |||
132 | chip->words[command + i] &= 0xff00; | 132 | chip->words[command + i] &= 0xff00; |
133 | chip->words[command + i] |= data->block[1 + i]; | 133 | chip->words[command + i] |= data->block[1 + i]; |
134 | } | 134 | } |
135 | dev_dbg(&adap->dev, "i2c block data - addr 0x%02x, " | 135 | dev_dbg(&adap->dev, |
136 | "wrote %d bytes at 0x%02x.\n", | 136 | "i2c block data - addr 0x%02x, wrote %d bytes at 0x%02x.\n", |
137 | addr, len, command); | 137 | addr, len, command); |
138 | } else { | 138 | } else { |
139 | for (i = 0; i < len; i++) { | 139 | for (i = 0; i < len; i++) { |
140 | data->block[1 + i] = | 140 | data->block[1 + i] = |
141 | chip->words[command + i] & 0xff; | 141 | chip->words[command + i] & 0xff; |
142 | } | 142 | } |
143 | dev_dbg(&adap->dev, "i2c block data - addr 0x%02x, " | 143 | dev_dbg(&adap->dev, |
144 | "read %d bytes at 0x%02x.\n", | 144 | "i2c block data - addr 0x%02x, read %d bytes at 0x%02x.\n", |
145 | addr, len, command); | 145 | addr, len, command); |
146 | } | 146 | } |
147 | 147 | ||
148 | ret = 0; | 148 | ret = 0; |
@@ -179,25 +179,24 @@ static int __init i2c_stub_init(void) | |||
179 | int i, ret; | 179 | int i, ret; |
180 | 180 | ||
181 | if (!chip_addr[0]) { | 181 | if (!chip_addr[0]) { |
182 | printk(KERN_ERR "i2c-stub: Please specify a chip address\n"); | 182 | pr_err("i2c-stub: Please specify a chip address\n"); |
183 | return -ENODEV; | 183 | return -ENODEV; |
184 | } | 184 | } |
185 | 185 | ||
186 | for (i = 0; i < MAX_CHIPS && chip_addr[i]; i++) { | 186 | for (i = 0; i < MAX_CHIPS && chip_addr[i]; i++) { |
187 | if (chip_addr[i] < 0x03 || chip_addr[i] > 0x77) { | 187 | if (chip_addr[i] < 0x03 || chip_addr[i] > 0x77) { |
188 | printk(KERN_ERR "i2c-stub: Invalid chip address " | 188 | pr_err("i2c-stub: Invalid chip address 0x%02x\n", |
189 | "0x%02x\n", chip_addr[i]); | 189 | chip_addr[i]); |
190 | return -EINVAL; | 190 | return -EINVAL; |
191 | } | 191 | } |
192 | 192 | ||
193 | printk(KERN_INFO "i2c-stub: Virtual chip at 0x%02x\n", | 193 | pr_info("i2c-stub: Virtual chip at 0x%02x\n", chip_addr[i]); |
194 | chip_addr[i]); | ||
195 | } | 194 | } |
196 | 195 | ||
197 | /* Allocate memory for all chips at once */ | 196 | /* Allocate memory for all chips at once */ |
198 | stub_chips = kzalloc(i * sizeof(struct stub_chip), GFP_KERNEL); | 197 | stub_chips = kzalloc(i * sizeof(struct stub_chip), GFP_KERNEL); |
199 | if (!stub_chips) { | 198 | if (!stub_chips) { |
200 | printk(KERN_ERR "i2c-stub: Out of memory\n"); | 199 | pr_err("i2c-stub: Out of memory\n"); |
201 | return -ENOMEM; | 200 | return -ENOMEM; |
202 | } | 201 | } |
203 | 202 | ||
@@ -219,4 +218,3 @@ MODULE_LICENSE("GPL"); | |||
219 | 218 | ||
220 | module_init(i2c_stub_init); | 219 | module_init(i2c_stub_init); |
221 | module_exit(i2c_stub_exit); | 220 | module_exit(i2c_stub_exit); |
222 | |||
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig index b4b65af8612a..de0874054e9f 100644 --- a/drivers/input/keyboard/Kconfig +++ b/drivers/input/keyboard/Kconfig | |||
@@ -335,6 +335,7 @@ config KEYBOARD_LOCOMO | |||
335 | config KEYBOARD_LPC32XX | 335 | config KEYBOARD_LPC32XX |
336 | tristate "LPC32XX matrix key scanner support" | 336 | tristate "LPC32XX matrix key scanner support" |
337 | depends on ARCH_LPC32XX && OF | 337 | depends on ARCH_LPC32XX && OF |
338 | select INPUT_MATRIXKMAP | ||
338 | help | 339 | help |
339 | Say Y here if you want to use NXP LPC32XX SoC key scanner interface, | 340 | Say Y here if you want to use NXP LPC32XX SoC key scanner interface, |
340 | connected to a key matrix. | 341 | connected to a key matrix. |
diff --git a/drivers/input/keyboard/pxa27x_keypad.c b/drivers/input/keyboard/pxa27x_keypad.c index 803ff6fe021e..cad9d5dd5973 100644 --- a/drivers/input/keyboard/pxa27x_keypad.c +++ b/drivers/input/keyboard/pxa27x_keypad.c | |||
@@ -368,6 +368,9 @@ static void pxa27x_keypad_config(struct pxa27x_keypad *keypad) | |||
368 | unsigned int mask = 0, direct_key_num = 0; | 368 | unsigned int mask = 0, direct_key_num = 0; |
369 | unsigned long kpc = 0; | 369 | unsigned long kpc = 0; |
370 | 370 | ||
371 | /* clear pending interrupt bit */ | ||
372 | keypad_readl(KPC); | ||
373 | |||
371 | /* enable matrix keys with automatic scan */ | 374 | /* enable matrix keys with automatic scan */ |
372 | if (pdata->matrix_key_rows && pdata->matrix_key_cols) { | 375 | if (pdata->matrix_key_rows && pdata->matrix_key_cols) { |
373 | kpc |= KPC_ASACT | KPC_MIE | KPC_ME | KPC_MS_ALL; | 376 | kpc |= KPC_ASACT | KPC_MIE | KPC_ME | KPC_MS_ALL; |
diff --git a/drivers/input/misc/xen-kbdfront.c b/drivers/input/misc/xen-kbdfront.c index 02ca8680ea5b..6f7d99013031 100644 --- a/drivers/input/misc/xen-kbdfront.c +++ b/drivers/input/misc/xen-kbdfront.c | |||
@@ -311,7 +311,6 @@ static void xenkbd_backend_changed(struct xenbus_device *dev, | |||
311 | case XenbusStateReconfiguring: | 311 | case XenbusStateReconfiguring: |
312 | case XenbusStateReconfigured: | 312 | case XenbusStateReconfigured: |
313 | case XenbusStateUnknown: | 313 | case XenbusStateUnknown: |
314 | case XenbusStateClosed: | ||
315 | break; | 314 | break; |
316 | 315 | ||
317 | case XenbusStateInitWait: | 316 | case XenbusStateInitWait: |
@@ -350,6 +349,10 @@ InitWait: | |||
350 | 349 | ||
351 | break; | 350 | break; |
352 | 351 | ||
352 | case XenbusStateClosed: | ||
353 | if (dev->state == XenbusStateClosed) | ||
354 | break; | ||
355 | /* Missed the backend's CLOSING state -- fallthrough */ | ||
353 | case XenbusStateClosing: | 356 | case XenbusStateClosing: |
354 | xenbus_frontend_closed(dev); | 357 | xenbus_frontend_closed(dev); |
355 | break; | 358 | break; |
diff --git a/drivers/input/mouse/bcm5974.c b/drivers/input/mouse/bcm5974.c index 3a78f235fa3e..2baff1b79a55 100644 --- a/drivers/input/mouse/bcm5974.c +++ b/drivers/input/mouse/bcm5974.c | |||
@@ -84,6 +84,10 @@ | |||
84 | #define USB_DEVICE_ID_APPLE_WELLSPRING7_ANSI 0x0262 | 84 | #define USB_DEVICE_ID_APPLE_WELLSPRING7_ANSI 0x0262 |
85 | #define USB_DEVICE_ID_APPLE_WELLSPRING7_ISO 0x0263 | 85 | #define USB_DEVICE_ID_APPLE_WELLSPRING7_ISO 0x0263 |
86 | #define USB_DEVICE_ID_APPLE_WELLSPRING7_JIS 0x0264 | 86 | #define USB_DEVICE_ID_APPLE_WELLSPRING7_JIS 0x0264 |
87 | /* MacbookPro10,2 (unibody, October 2012) */ | ||
88 | #define USB_DEVICE_ID_APPLE_WELLSPRING7A_ANSI 0x0259 | ||
89 | #define USB_DEVICE_ID_APPLE_WELLSPRING7A_ISO 0x025a | ||
90 | #define USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS 0x025b | ||
87 | 91 | ||
88 | #define BCM5974_DEVICE(prod) { \ | 92 | #define BCM5974_DEVICE(prod) { \ |
89 | .match_flags = (USB_DEVICE_ID_MATCH_DEVICE | \ | 93 | .match_flags = (USB_DEVICE_ID_MATCH_DEVICE | \ |
@@ -137,6 +141,10 @@ static const struct usb_device_id bcm5974_table[] = { | |||
137 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING7_ANSI), | 141 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING7_ANSI), |
138 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING7_ISO), | 142 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING7_ISO), |
139 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING7_JIS), | 143 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING7_JIS), |
144 | /* MacbookPro10,2 */ | ||
145 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING7A_ANSI), | ||
146 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING7A_ISO), | ||
147 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS), | ||
140 | /* Terminating entry */ | 148 | /* Terminating entry */ |
141 | {} | 149 | {} |
142 | }; | 150 | }; |
@@ -379,6 +387,19 @@ static const struct bcm5974_config bcm5974_config_table[] = { | |||
379 | { SN_COORD, -150, 6730 }, | 387 | { SN_COORD, -150, 6730 }, |
380 | { SN_ORIENT, -MAX_FINGER_ORIENTATION, MAX_FINGER_ORIENTATION } | 388 | { SN_ORIENT, -MAX_FINGER_ORIENTATION, MAX_FINGER_ORIENTATION } |
381 | }, | 389 | }, |
390 | { | ||
391 | USB_DEVICE_ID_APPLE_WELLSPRING7A_ANSI, | ||
392 | USB_DEVICE_ID_APPLE_WELLSPRING7A_ISO, | ||
393 | USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS, | ||
394 | HAS_INTEGRATED_BUTTON, | ||
395 | 0x84, sizeof(struct bt_data), | ||
396 | 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | ||
397 | { SN_PRESSURE, 0, 300 }, | ||
398 | { SN_WIDTH, 0, 2048 }, | ||
399 | { SN_COORD, -4750, 5280 }, | ||
400 | { SN_COORD, -150, 6730 }, | ||
401 | { SN_ORIENT, -MAX_FINGER_ORIENTATION, MAX_FINGER_ORIENTATION } | ||
402 | }, | ||
382 | {} | 403 | {} |
383 | }; | 404 | }; |
384 | 405 | ||
diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c index 2c1e12bf2ab4..858ad446de91 100644 --- a/drivers/input/tablet/wacom_sys.c +++ b/drivers/input/tablet/wacom_sys.c | |||
@@ -391,7 +391,7 @@ static int wacom_parse_hid(struct usb_interface *intf, | |||
391 | features->pktlen = WACOM_PKGLEN_TPC2FG; | 391 | features->pktlen = WACOM_PKGLEN_TPC2FG; |
392 | } | 392 | } |
393 | 393 | ||
394 | if (features->type == MTSCREEN || WACOM_24HDT) | 394 | if (features->type == MTSCREEN || features->type == WACOM_24HDT) |
395 | features->pktlen = WACOM_PKGLEN_MTOUCH; | 395 | features->pktlen = WACOM_PKGLEN_MTOUCH; |
396 | 396 | ||
397 | if (features->type == BAMBOO_PT) { | 397 | if (features->type == BAMBOO_PT) { |
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c index aa6010131179..0a67031ffc13 100644 --- a/drivers/input/tablet/wacom_wac.c +++ b/drivers/input/tablet/wacom_wac.c | |||
@@ -1518,6 +1518,9 @@ int wacom_setup_input_capabilities(struct input_dev *input_dev, | |||
1518 | 1518 | ||
1519 | input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0); | 1519 | input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0); |
1520 | input_set_abs_params(input_dev, ABS_THROTTLE, 0, 71, 0, 0); | 1520 | input_set_abs_params(input_dev, ABS_THROTTLE, 0, 71, 0, 0); |
1521 | |||
1522 | __set_bit(INPUT_PROP_DIRECT, input_dev->propbit); | ||
1523 | |||
1521 | wacom_setup_cintiq(wacom_wac); | 1524 | wacom_setup_cintiq(wacom_wac); |
1522 | break; | 1525 | break; |
1523 | 1526 | ||
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig index 1ba232cbc09d..f7668b24c378 100644 --- a/drivers/input/touchscreen/Kconfig +++ b/drivers/input/touchscreen/Kconfig | |||
@@ -239,7 +239,7 @@ config TOUCHSCREEN_EETI | |||
239 | 239 | ||
240 | config TOUCHSCREEN_EGALAX | 240 | config TOUCHSCREEN_EGALAX |
241 | tristate "EETI eGalax multi-touch panel support" | 241 | tristate "EETI eGalax multi-touch panel support" |
242 | depends on I2C | 242 | depends on I2C && OF |
243 | help | 243 | help |
244 | Say Y here to enable support for I2C connected EETI | 244 | Say Y here to enable support for I2C connected EETI |
245 | eGalax multi-touch panels. | 245 | eGalax multi-touch panels. |
diff --git a/drivers/input/touchscreen/egalax_ts.c b/drivers/input/touchscreen/egalax_ts.c index c1e3460f1195..13fa62fdfb0b 100644 --- a/drivers/input/touchscreen/egalax_ts.c +++ b/drivers/input/touchscreen/egalax_ts.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/slab.h> | 28 | #include <linux/slab.h> |
29 | #include <linux/bitops.h> | 29 | #include <linux/bitops.h> |
30 | #include <linux/input/mt.h> | 30 | #include <linux/input/mt.h> |
31 | #include <linux/of_gpio.h> | ||
31 | 32 | ||
32 | /* | 33 | /* |
33 | * Mouse Mode: some panel may configure the controller to mouse mode, | 34 | * Mouse Mode: some panel may configure the controller to mouse mode, |
@@ -122,9 +123,17 @@ static irqreturn_t egalax_ts_interrupt(int irq, void *dev_id) | |||
122 | /* wake up controller by an falling edge of interrupt gpio. */ | 123 | /* wake up controller by an falling edge of interrupt gpio. */ |
123 | static int egalax_wake_up_device(struct i2c_client *client) | 124 | static int egalax_wake_up_device(struct i2c_client *client) |
124 | { | 125 | { |
125 | int gpio = irq_to_gpio(client->irq); | 126 | struct device_node *np = client->dev.of_node; |
127 | int gpio; | ||
126 | int ret; | 128 | int ret; |
127 | 129 | ||
130 | if (!np) | ||
131 | return -ENODEV; | ||
132 | |||
133 | gpio = of_get_named_gpio(np, "wakeup-gpios", 0); | ||
134 | if (!gpio_is_valid(gpio)) | ||
135 | return -ENODEV; | ||
136 | |||
128 | ret = gpio_request(gpio, "egalax_irq"); | 137 | ret = gpio_request(gpio, "egalax_irq"); |
129 | if (ret < 0) { | 138 | if (ret < 0) { |
130 | dev_err(&client->dev, | 139 | dev_err(&client->dev, |
@@ -181,7 +190,11 @@ static int __devinit egalax_ts_probe(struct i2c_client *client, | |||
181 | ts->input_dev = input_dev; | 190 | ts->input_dev = input_dev; |
182 | 191 | ||
183 | /* controller may be in sleep, wake it up. */ | 192 | /* controller may be in sleep, wake it up. */ |
184 | egalax_wake_up_device(client); | 193 | error = egalax_wake_up_device(client); |
194 | if (error) { | ||
195 | dev_err(&client->dev, "Failed to wake up the controller\n"); | ||
196 | goto err_free_dev; | ||
197 | } | ||
185 | 198 | ||
186 | ret = egalax_firmware_version(client); | 199 | ret = egalax_firmware_version(client); |
187 | if (ret < 0) { | 200 | if (ret < 0) { |
@@ -274,11 +287,17 @@ static int egalax_ts_resume(struct device *dev) | |||
274 | 287 | ||
275 | static SIMPLE_DEV_PM_OPS(egalax_ts_pm_ops, egalax_ts_suspend, egalax_ts_resume); | 288 | static SIMPLE_DEV_PM_OPS(egalax_ts_pm_ops, egalax_ts_suspend, egalax_ts_resume); |
276 | 289 | ||
290 | static struct of_device_id egalax_ts_dt_ids[] = { | ||
291 | { .compatible = "eeti,egalax_ts" }, | ||
292 | { /* sentinel */ } | ||
293 | }; | ||
294 | |||
277 | static struct i2c_driver egalax_ts_driver = { | 295 | static struct i2c_driver egalax_ts_driver = { |
278 | .driver = { | 296 | .driver = { |
279 | .name = "egalax_ts", | 297 | .name = "egalax_ts", |
280 | .owner = THIS_MODULE, | 298 | .owner = THIS_MODULE, |
281 | .pm = &egalax_ts_pm_ops, | 299 | .pm = &egalax_ts_pm_ops, |
300 | .of_match_table = of_match_ptr(egalax_ts_dt_ids), | ||
282 | }, | 301 | }, |
283 | .id_table = egalax_ts_id, | 302 | .id_table = egalax_ts_id, |
284 | .probe = egalax_ts_probe, | 303 | .probe = egalax_ts_probe, |
diff --git a/drivers/input/touchscreen/tsc40.c b/drivers/input/touchscreen/tsc40.c index 63209aaa55f0..eb96f168fb9d 100644 --- a/drivers/input/touchscreen/tsc40.c +++ b/drivers/input/touchscreen/tsc40.c | |||
@@ -107,7 +107,6 @@ static int tsc_connect(struct serio *serio, struct serio_driver *drv) | |||
107 | __set_bit(BTN_TOUCH, input_dev->keybit); | 107 | __set_bit(BTN_TOUCH, input_dev->keybit); |
108 | input_set_abs_params(ptsc->dev, ABS_X, 0, 0x3ff, 0, 0); | 108 | input_set_abs_params(ptsc->dev, ABS_X, 0, 0x3ff, 0, 0); |
109 | input_set_abs_params(ptsc->dev, ABS_Y, 0, 0x3ff, 0, 0); | 109 | input_set_abs_params(ptsc->dev, ABS_Y, 0, 0x3ff, 0, 0); |
110 | input_set_abs_params(ptsc->dev, ABS_PRESSURE, 0, 0, 0, 0); | ||
111 | 110 | ||
112 | serio_set_drvdata(serio, ptsc); | 111 | serio_set_drvdata(serio, ptsc); |
113 | 112 | ||
diff --git a/drivers/isdn/Kconfig b/drivers/isdn/Kconfig index a233ed53913a..86cd75a0e84d 100644 --- a/drivers/isdn/Kconfig +++ b/drivers/isdn/Kconfig | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | menuconfig ISDN | 5 | menuconfig ISDN |
6 | bool "ISDN support" | 6 | bool "ISDN support" |
7 | depends on NET | 7 | depends on NET && NETDEVICES |
8 | depends on !S390 && !UML | 8 | depends on !S390 && !UML |
9 | ---help--- | 9 | ---help--- |
10 | ISDN ("Integrated Services Digital Network", called RNIS in France) | 10 | ISDN ("Integrated Services Digital Network", called RNIS in France) |
diff --git a/drivers/isdn/i4l/Kconfig b/drivers/isdn/i4l/Kconfig index 2302fbe70ac6..9c6650ea848e 100644 --- a/drivers/isdn/i4l/Kconfig +++ b/drivers/isdn/i4l/Kconfig | |||
@@ -6,7 +6,7 @@ if ISDN_I4L | |||
6 | 6 | ||
7 | config ISDN_PPP | 7 | config ISDN_PPP |
8 | bool "Support synchronous PPP" | 8 | bool "Support synchronous PPP" |
9 | depends on INET && NETDEVICES | 9 | depends on INET |
10 | select SLHC | 10 | select SLHC |
11 | help | 11 | help |
12 | Over digital connections such as ISDN, there is no need to | 12 | Over digital connections such as ISDN, there is no need to |
diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c index 8c610fa6782b..e2a945ee9f05 100644 --- a/drivers/isdn/i4l/isdn_common.c +++ b/drivers/isdn/i4l/isdn_common.c | |||
@@ -1312,7 +1312,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) | |||
1312 | } else | 1312 | } else |
1313 | return -EINVAL; | 1313 | return -EINVAL; |
1314 | break; | 1314 | break; |
1315 | #ifdef CONFIG_NETDEVICES | ||
1316 | case IIOCNETGPN: | 1315 | case IIOCNETGPN: |
1317 | /* Get peer phone number of a connected | 1316 | /* Get peer phone number of a connected |
1318 | * isdn network interface */ | 1317 | * isdn network interface */ |
@@ -1322,7 +1321,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) | |||
1322 | return isdn_net_getpeer(&phone, argp); | 1321 | return isdn_net_getpeer(&phone, argp); |
1323 | } else | 1322 | } else |
1324 | return -EINVAL; | 1323 | return -EINVAL; |
1325 | #endif | ||
1326 | default: | 1324 | default: |
1327 | return -EINVAL; | 1325 | return -EINVAL; |
1328 | } | 1326 | } |
@@ -1352,7 +1350,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) | |||
1352 | case IIOCNETLCR: | 1350 | case IIOCNETLCR: |
1353 | printk(KERN_INFO "INFO: ISDN_ABC_LCR_SUPPORT not enabled\n"); | 1351 | printk(KERN_INFO "INFO: ISDN_ABC_LCR_SUPPORT not enabled\n"); |
1354 | return -ENODEV; | 1352 | return -ENODEV; |
1355 | #ifdef CONFIG_NETDEVICES | ||
1356 | case IIOCNETAIF: | 1353 | case IIOCNETAIF: |
1357 | /* Add a network-interface */ | 1354 | /* Add a network-interface */ |
1358 | if (arg) { | 1355 | if (arg) { |
@@ -1491,7 +1488,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) | |||
1491 | return -EFAULT; | 1488 | return -EFAULT; |
1492 | return isdn_net_force_hangup(name); | 1489 | return isdn_net_force_hangup(name); |
1493 | break; | 1490 | break; |
1494 | #endif /* CONFIG_NETDEVICES */ | ||
1495 | case IIOCSETVER: | 1491 | case IIOCSETVER: |
1496 | dev->net_verbose = arg; | 1492 | dev->net_verbose = arg; |
1497 | printk(KERN_INFO "isdn: Verbose-Level is %d\n", dev->net_verbose); | 1493 | printk(KERN_INFO "isdn: Verbose-Level is %d\n", dev->net_verbose); |
diff --git a/drivers/md/faulty.c b/drivers/md/faulty.c index 45135f69509c..5e7dc772f5de 100644 --- a/drivers/md/faulty.c +++ b/drivers/md/faulty.c | |||
@@ -315,8 +315,11 @@ static int run(struct mddev *mddev) | |||
315 | } | 315 | } |
316 | conf->nfaults = 0; | 316 | conf->nfaults = 0; |
317 | 317 | ||
318 | rdev_for_each(rdev, mddev) | 318 | rdev_for_each(rdev, mddev) { |
319 | conf->rdev = rdev; | 319 | conf->rdev = rdev; |
320 | disk_stack_limits(mddev->gendisk, rdev->bdev, | ||
321 | rdev->data_offset << 9); | ||
322 | } | ||
320 | 323 | ||
321 | md_set_array_sectors(mddev, faulty_size(mddev, 0, 0)); | 324 | md_set_array_sectors(mddev, faulty_size(mddev, 0, 0)); |
322 | mddev->private = conf; | 325 | mddev->private = conf; |
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c index 8034fbd6190c..636bae0405e8 100644 --- a/drivers/md/raid1.c +++ b/drivers/md/raid1.c | |||
@@ -2710,7 +2710,7 @@ static struct r1conf *setup_conf(struct mddev *mddev) | |||
2710 | || disk_idx < 0) | 2710 | || disk_idx < 0) |
2711 | continue; | 2711 | continue; |
2712 | if (test_bit(Replacement, &rdev->flags)) | 2712 | if (test_bit(Replacement, &rdev->flags)) |
2713 | disk = conf->mirrors + conf->raid_disks + disk_idx; | 2713 | disk = conf->mirrors + mddev->raid_disks + disk_idx; |
2714 | else | 2714 | else |
2715 | disk = conf->mirrors + disk_idx; | 2715 | disk = conf->mirrors + disk_idx; |
2716 | 2716 | ||
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c index 906ccbd0f7dc..d1295aff4173 100644 --- a/drivers/md/raid10.c +++ b/drivers/md/raid10.c | |||
@@ -1783,7 +1783,7 @@ static int raid10_add_disk(struct mddev *mddev, struct md_rdev *rdev) | |||
1783 | clear_bit(Unmerged, &rdev->flags); | 1783 | clear_bit(Unmerged, &rdev->flags); |
1784 | } | 1784 | } |
1785 | md_integrity_add_rdev(rdev, mddev); | 1785 | md_integrity_add_rdev(rdev, mddev); |
1786 | if (blk_queue_discard(bdev_get_queue(rdev->bdev))) | 1786 | if (mddev->queue && blk_queue_discard(bdev_get_queue(rdev->bdev))) |
1787 | queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, mddev->queue); | 1787 | queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, mddev->queue); |
1788 | 1788 | ||
1789 | print_conf(conf); | 1789 | print_conf(conf); |
@@ -3613,11 +3613,14 @@ static int run(struct mddev *mddev) | |||
3613 | discard_supported = true; | 3613 | discard_supported = true; |
3614 | } | 3614 | } |
3615 | 3615 | ||
3616 | if (discard_supported) | 3616 | if (mddev->queue) { |
3617 | queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, mddev->queue); | 3617 | if (discard_supported) |
3618 | else | 3618 | queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, |
3619 | queue_flag_clear_unlocked(QUEUE_FLAG_DISCARD, mddev->queue); | 3619 | mddev->queue); |
3620 | 3620 | else | |
3621 | queue_flag_clear_unlocked(QUEUE_FLAG_DISCARD, | ||
3622 | mddev->queue); | ||
3623 | } | ||
3621 | /* need to check that every block has at least one working mirror */ | 3624 | /* need to check that every block has at least one working mirror */ |
3622 | if (!enough(conf, -1)) { | 3625 | if (!enough(conf, -1)) { |
3623 | printk(KERN_ERR "md/raid10:%s: not enough operational mirrors.\n", | 3626 | printk(KERN_ERR "md/raid10:%s: not enough operational mirrors.\n", |
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 660bbc528862..4d50da618166 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c | |||
@@ -208,7 +208,7 @@ static unsigned long exynos5250_dwmmc_caps[4] = { | |||
208 | MMC_CAP_CMD23, | 208 | MMC_CAP_CMD23, |
209 | }; | 209 | }; |
210 | 210 | ||
211 | static struct dw_mci_drv_data exynos5250_drv_data = { | 211 | static const struct dw_mci_drv_data exynos5250_drv_data = { |
212 | .caps = exynos5250_dwmmc_caps, | 212 | .caps = exynos5250_dwmmc_caps, |
213 | .init = dw_mci_exynos_priv_init, | 213 | .init = dw_mci_exynos_priv_init, |
214 | .setup_clock = dw_mci_exynos_setup_clock, | 214 | .setup_clock = dw_mci_exynos_setup_clock, |
@@ -220,14 +220,14 @@ static struct dw_mci_drv_data exynos5250_drv_data = { | |||
220 | 220 | ||
221 | static const struct of_device_id dw_mci_exynos_match[] = { | 221 | static const struct of_device_id dw_mci_exynos_match[] = { |
222 | { .compatible = "samsung,exynos5250-dw-mshc", | 222 | { .compatible = "samsung,exynos5250-dw-mshc", |
223 | .data = (void *)&exynos5250_drv_data, }, | 223 | .data = &exynos5250_drv_data, }, |
224 | {}, | 224 | {}, |
225 | }; | 225 | }; |
226 | MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match); | 226 | MODULE_DEVICE_TABLE(of, dw_mci_exynos_match); |
227 | 227 | ||
228 | int dw_mci_exynos_probe(struct platform_device *pdev) | 228 | int dw_mci_exynos_probe(struct platform_device *pdev) |
229 | { | 229 | { |
230 | struct dw_mci_drv_data *drv_data; | 230 | const struct dw_mci_drv_data *drv_data; |
231 | const struct of_device_id *match; | 231 | const struct of_device_id *match; |
232 | 232 | ||
233 | match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node); | 233 | match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node); |
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c index c960ca7ffbe6..917936bee5d5 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.c +++ b/drivers/mmc/host/dw_mmc-pltfm.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include "dw_mmc.h" | 24 | #include "dw_mmc.h" |
25 | 25 | ||
26 | int dw_mci_pltfm_register(struct platform_device *pdev, | 26 | int dw_mci_pltfm_register(struct platform_device *pdev, |
27 | struct dw_mci_drv_data *drv_data) | 27 | const struct dw_mci_drv_data *drv_data) |
28 | { | 28 | { |
29 | struct dw_mci *host; | 29 | struct dw_mci *host; |
30 | struct resource *regs; | 30 | struct resource *regs; |
@@ -50,8 +50,8 @@ int dw_mci_pltfm_register(struct platform_device *pdev, | |||
50 | if (!host->regs) | 50 | if (!host->regs) |
51 | return -ENOMEM; | 51 | return -ENOMEM; |
52 | 52 | ||
53 | if (host->drv_data->init) { | 53 | if (drv_data && drv_data->init) { |
54 | ret = host->drv_data->init(host); | 54 | ret = drv_data->init(host); |
55 | if (ret) | 55 | if (ret) |
56 | return ret; | 56 | return ret; |
57 | } | 57 | } |
diff --git a/drivers/mmc/host/dw_mmc-pltfm.h b/drivers/mmc/host/dw_mmc-pltfm.h index 301f24541fc2..2ac37b81de4d 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.h +++ b/drivers/mmc/host/dw_mmc-pltfm.h | |||
@@ -13,7 +13,7 @@ | |||
13 | #define _DW_MMC_PLTFM_H_ | 13 | #define _DW_MMC_PLTFM_H_ |
14 | 14 | ||
15 | extern int dw_mci_pltfm_register(struct platform_device *pdev, | 15 | extern int dw_mci_pltfm_register(struct platform_device *pdev, |
16 | struct dw_mci_drv_data *drv_data); | 16 | const struct dw_mci_drv_data *drv_data); |
17 | extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev); | 17 | extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev); |
18 | extern const struct dev_pm_ops dw_mci_pltfm_pmops; | 18 | extern const struct dev_pm_ops dw_mci_pltfm_pmops; |
19 | 19 | ||
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index c2828f35c3b8..c0667c8af2bd 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c | |||
@@ -232,6 +232,7 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) | |||
232 | { | 232 | { |
233 | struct mmc_data *data; | 233 | struct mmc_data *data; |
234 | struct dw_mci_slot *slot = mmc_priv(mmc); | 234 | struct dw_mci_slot *slot = mmc_priv(mmc); |
235 | struct dw_mci_drv_data *drv_data = slot->host->drv_data; | ||
235 | u32 cmdr; | 236 | u32 cmdr; |
236 | cmd->error = -EINPROGRESS; | 237 | cmd->error = -EINPROGRESS; |
237 | 238 | ||
@@ -261,8 +262,8 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) | |||
261 | cmdr |= SDMMC_CMD_DAT_WR; | 262 | cmdr |= SDMMC_CMD_DAT_WR; |
262 | } | 263 | } |
263 | 264 | ||
264 | if (slot->host->drv_data->prepare_command) | 265 | if (drv_data && drv_data->prepare_command) |
265 | slot->host->drv_data->prepare_command(slot->host, &cmdr); | 266 | drv_data->prepare_command(slot->host, &cmdr); |
266 | 267 | ||
267 | return cmdr; | 268 | return cmdr; |
268 | } | 269 | } |
@@ -434,7 +435,7 @@ static int dw_mci_idmac_init(struct dw_mci *host) | |||
434 | return 0; | 435 | return 0; |
435 | } | 436 | } |
436 | 437 | ||
437 | static struct dw_mci_dma_ops dw_mci_idmac_ops = { | 438 | static const struct dw_mci_dma_ops dw_mci_idmac_ops = { |
438 | .init = dw_mci_idmac_init, | 439 | .init = dw_mci_idmac_init, |
439 | .start = dw_mci_idmac_start_dma, | 440 | .start = dw_mci_idmac_start_dma, |
440 | .stop = dw_mci_idmac_stop_dma, | 441 | .stop = dw_mci_idmac_stop_dma, |
@@ -772,6 +773,7 @@ static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) | |||
772 | static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | 773 | static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
773 | { | 774 | { |
774 | struct dw_mci_slot *slot = mmc_priv(mmc); | 775 | struct dw_mci_slot *slot = mmc_priv(mmc); |
776 | struct dw_mci_drv_data *drv_data = slot->host->drv_data; | ||
775 | u32 regs; | 777 | u32 regs; |
776 | 778 | ||
777 | /* set default 1 bit mode */ | 779 | /* set default 1 bit mode */ |
@@ -807,8 +809,8 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
807 | slot->clock = ios->clock; | 809 | slot->clock = ios->clock; |
808 | } | 810 | } |
809 | 811 | ||
810 | if (slot->host->drv_data->set_ios) | 812 | if (drv_data && drv_data->set_ios) |
811 | slot->host->drv_data->set_ios(slot->host, ios); | 813 | drv_data->set_ios(slot->host, ios); |
812 | 814 | ||
813 | switch (ios->power_mode) { | 815 | switch (ios->power_mode) { |
814 | case MMC_POWER_UP: | 816 | case MMC_POWER_UP: |
@@ -1815,6 +1817,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
1815 | { | 1817 | { |
1816 | struct mmc_host *mmc; | 1818 | struct mmc_host *mmc; |
1817 | struct dw_mci_slot *slot; | 1819 | struct dw_mci_slot *slot; |
1820 | struct dw_mci_drv_data *drv_data = host->drv_data; | ||
1818 | int ctrl_id, ret; | 1821 | int ctrl_id, ret; |
1819 | u8 bus_width; | 1822 | u8 bus_width; |
1820 | 1823 | ||
@@ -1854,8 +1857,8 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
1854 | } else { | 1857 | } else { |
1855 | ctrl_id = to_platform_device(host->dev)->id; | 1858 | ctrl_id = to_platform_device(host->dev)->id; |
1856 | } | 1859 | } |
1857 | if (host->drv_data && host->drv_data->caps) | 1860 | if (drv_data && drv_data->caps) |
1858 | mmc->caps |= host->drv_data->caps[ctrl_id]; | 1861 | mmc->caps |= drv_data->caps[ctrl_id]; |
1859 | 1862 | ||
1860 | if (host->pdata->caps2) | 1863 | if (host->pdata->caps2) |
1861 | mmc->caps2 = host->pdata->caps2; | 1864 | mmc->caps2 = host->pdata->caps2; |
@@ -1867,10 +1870,10 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
1867 | else | 1870 | else |
1868 | bus_width = 1; | 1871 | bus_width = 1; |
1869 | 1872 | ||
1870 | if (host->drv_data->setup_bus) { | 1873 | if (drv_data && drv_data->setup_bus) { |
1871 | struct device_node *slot_np; | 1874 | struct device_node *slot_np; |
1872 | slot_np = dw_mci_of_find_slot_node(host->dev, slot->id); | 1875 | slot_np = dw_mci_of_find_slot_node(host->dev, slot->id); |
1873 | ret = host->drv_data->setup_bus(host, slot_np, bus_width); | 1876 | ret = drv_data->setup_bus(host, slot_np, bus_width); |
1874 | if (ret) | 1877 | if (ret) |
1875 | goto err_setup_bus; | 1878 | goto err_setup_bus; |
1876 | } | 1879 | } |
@@ -1968,7 +1971,7 @@ static void dw_mci_init_dma(struct dw_mci *host) | |||
1968 | /* Determine which DMA interface to use */ | 1971 | /* Determine which DMA interface to use */ |
1969 | #ifdef CONFIG_MMC_DW_IDMAC | 1972 | #ifdef CONFIG_MMC_DW_IDMAC |
1970 | host->dma_ops = &dw_mci_idmac_ops; | 1973 | host->dma_ops = &dw_mci_idmac_ops; |
1971 | dev_info(&host->dev, "Using internal DMA controller.\n"); | 1974 | dev_info(host->dev, "Using internal DMA controller.\n"); |
1972 | #endif | 1975 | #endif |
1973 | 1976 | ||
1974 | if (!host->dma_ops) | 1977 | if (!host->dma_ops) |
@@ -2035,6 +2038,7 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) | |||
2035 | struct dw_mci_board *pdata; | 2038 | struct dw_mci_board *pdata; |
2036 | struct device *dev = host->dev; | 2039 | struct device *dev = host->dev; |
2037 | struct device_node *np = dev->of_node; | 2040 | struct device_node *np = dev->of_node; |
2041 | struct dw_mci_drv_data *drv_data = host->drv_data; | ||
2038 | int idx, ret; | 2042 | int idx, ret; |
2039 | 2043 | ||
2040 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | 2044 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); |
@@ -2062,8 +2066,8 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) | |||
2062 | 2066 | ||
2063 | of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); | 2067 | of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); |
2064 | 2068 | ||
2065 | if (host->drv_data->parse_dt) { | 2069 | if (drv_data && drv_data->parse_dt) { |
2066 | ret = host->drv_data->parse_dt(host); | 2070 | ret = drv_data->parse_dt(host); |
2067 | if (ret) | 2071 | if (ret) |
2068 | return ERR_PTR(ret); | 2072 | return ERR_PTR(ret); |
2069 | } | 2073 | } |
@@ -2080,6 +2084,7 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) | |||
2080 | 2084 | ||
2081 | int dw_mci_probe(struct dw_mci *host) | 2085 | int dw_mci_probe(struct dw_mci *host) |
2082 | { | 2086 | { |
2087 | struct dw_mci_drv_data *drv_data = host->drv_data; | ||
2083 | int width, i, ret = 0; | 2088 | int width, i, ret = 0; |
2084 | u32 fifo_size; | 2089 | u32 fifo_size; |
2085 | int init_slots = 0; | 2090 | int init_slots = 0; |
@@ -2127,8 +2132,8 @@ int dw_mci_probe(struct dw_mci *host) | |||
2127 | else | 2132 | else |
2128 | host->bus_hz = clk_get_rate(host->ciu_clk); | 2133 | host->bus_hz = clk_get_rate(host->ciu_clk); |
2129 | 2134 | ||
2130 | if (host->drv_data->setup_clock) { | 2135 | if (drv_data && drv_data->setup_clock) { |
2131 | ret = host->drv_data->setup_clock(host); | 2136 | ret = drv_data->setup_clock(host); |
2132 | if (ret) { | 2137 | if (ret) { |
2133 | dev_err(host->dev, | 2138 | dev_err(host->dev, |
2134 | "implementation specific clock setup failed\n"); | 2139 | "implementation specific clock setup failed\n"); |
@@ -2228,6 +2233,21 @@ int dw_mci_probe(struct dw_mci *host) | |||
2228 | else | 2233 | else |
2229 | host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; | 2234 | host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; |
2230 | 2235 | ||
2236 | /* | ||
2237 | * Enable interrupts for command done, data over, data empty, card det, | ||
2238 | * receive ready and error such as transmit, receive timeout, crc error | ||
2239 | */ | ||
2240 | mci_writel(host, RINTSTS, 0xFFFFFFFF); | ||
2241 | mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | | ||
2242 | SDMMC_INT_TXDR | SDMMC_INT_RXDR | | ||
2243 | DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); | ||
2244 | mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ | ||
2245 | |||
2246 | dev_info(host->dev, "DW MMC controller at irq %d, " | ||
2247 | "%d bit host data width, " | ||
2248 | "%u deep fifo\n", | ||
2249 | host->irq, width, fifo_size); | ||
2250 | |||
2231 | /* We need at least one slot to succeed */ | 2251 | /* We need at least one slot to succeed */ |
2232 | for (i = 0; i < host->num_slots; i++) { | 2252 | for (i = 0; i < host->num_slots; i++) { |
2233 | ret = dw_mci_init_slot(host, i); | 2253 | ret = dw_mci_init_slot(host, i); |
@@ -2257,20 +2277,6 @@ int dw_mci_probe(struct dw_mci *host) | |||
2257 | else | 2277 | else |
2258 | host->data_offset = DATA_240A_OFFSET; | 2278 | host->data_offset = DATA_240A_OFFSET; |
2259 | 2279 | ||
2260 | /* | ||
2261 | * Enable interrupts for command done, data over, data empty, card det, | ||
2262 | * receive ready and error such as transmit, receive timeout, crc error | ||
2263 | */ | ||
2264 | mci_writel(host, RINTSTS, 0xFFFFFFFF); | ||
2265 | mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | | ||
2266 | SDMMC_INT_TXDR | SDMMC_INT_RXDR | | ||
2267 | DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); | ||
2268 | mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ | ||
2269 | |||
2270 | dev_info(host->dev, "DW MMC controller at irq %d, " | ||
2271 | "%d bit host data width, " | ||
2272 | "%u deep fifo\n", | ||
2273 | host->irq, width, fifo_size); | ||
2274 | if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) | 2280 | if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) |
2275 | dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); | 2281 | dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); |
2276 | 2282 | ||
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index 565c2e4fac75..6290b7f1ccfe 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c | |||
@@ -1134,4 +1134,4 @@ module_platform_driver(mxcmci_driver); | |||
1134 | MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); | 1134 | MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); |
1135 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); | 1135 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); |
1136 | MODULE_LICENSE("GPL"); | 1136 | MODULE_LICENSE("GPL"); |
1137 | MODULE_ALIAS("platform:imx-mmc"); | 1137 | MODULE_ALIAS("platform:mxc-mmc"); |
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 54bfd0cc106b..fedd258cc4ea 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c | |||
@@ -178,7 +178,8 @@ struct omap_hsmmc_host { | |||
178 | 178 | ||
179 | static int omap_hsmmc_card_detect(struct device *dev, int slot) | 179 | static int omap_hsmmc_card_detect(struct device *dev, int slot) |
180 | { | 180 | { |
181 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 181 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
182 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
182 | 183 | ||
183 | /* NOTE: assumes card detect signal is active-low */ | 184 | /* NOTE: assumes card detect signal is active-low */ |
184 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); | 185 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); |
@@ -186,7 +187,8 @@ static int omap_hsmmc_card_detect(struct device *dev, int slot) | |||
186 | 187 | ||
187 | static int omap_hsmmc_get_wp(struct device *dev, int slot) | 188 | static int omap_hsmmc_get_wp(struct device *dev, int slot) |
188 | { | 189 | { |
189 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 190 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
191 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
190 | 192 | ||
191 | /* NOTE: assumes write protect signal is active-high */ | 193 | /* NOTE: assumes write protect signal is active-high */ |
192 | return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); | 194 | return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); |
@@ -194,7 +196,8 @@ static int omap_hsmmc_get_wp(struct device *dev, int slot) | |||
194 | 196 | ||
195 | static int omap_hsmmc_get_cover_state(struct device *dev, int slot) | 197 | static int omap_hsmmc_get_cover_state(struct device *dev, int slot) |
196 | { | 198 | { |
197 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 199 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
200 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
198 | 201 | ||
199 | /* NOTE: assumes card detect signal is active-low */ | 202 | /* NOTE: assumes card detect signal is active-low */ |
200 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); | 203 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); |
@@ -204,7 +207,8 @@ static int omap_hsmmc_get_cover_state(struct device *dev, int slot) | |||
204 | 207 | ||
205 | static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) | 208 | static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) |
206 | { | 209 | { |
207 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 210 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
211 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
208 | 212 | ||
209 | disable_irq(mmc->slots[0].card_detect_irq); | 213 | disable_irq(mmc->slots[0].card_detect_irq); |
210 | return 0; | 214 | return 0; |
@@ -212,7 +216,8 @@ static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) | |||
212 | 216 | ||
213 | static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) | 217 | static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) |
214 | { | 218 | { |
215 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 219 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
220 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
216 | 221 | ||
217 | enable_irq(mmc->slots[0].card_detect_irq); | 222 | enable_irq(mmc->slots[0].card_detect_irq); |
218 | return 0; | 223 | return 0; |
@@ -2009,9 +2014,9 @@ static int __devexit omap_hsmmc_remove(struct platform_device *pdev) | |||
2009 | clk_put(host->dbclk); | 2014 | clk_put(host->dbclk); |
2010 | } | 2015 | } |
2011 | 2016 | ||
2012 | mmc_free_host(host->mmc); | 2017 | omap_hsmmc_gpio_free(host->pdata); |
2013 | iounmap(host->base); | 2018 | iounmap(host->base); |
2014 | omap_hsmmc_gpio_free(pdev->dev.platform_data); | 2019 | mmc_free_host(host->mmc); |
2015 | 2020 | ||
2016 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 2021 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2017 | if (res) | 2022 | if (res) |
diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c index 90140eb03e36..8fd50a211037 100644 --- a/drivers/mmc/host/sdhci-dove.c +++ b/drivers/mmc/host/sdhci-dove.c | |||
@@ -19,6 +19,7 @@ | |||
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
20 | */ | 20 | */ |
21 | 21 | ||
22 | #include <linux/err.h> | ||
22 | #include <linux/io.h> | 23 | #include <linux/io.h> |
23 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
24 | #include <linux/err.h> | 25 | #include <linux/err.h> |
@@ -84,30 +85,32 @@ static int __devinit sdhci_dove_probe(struct platform_device *pdev) | |||
84 | struct sdhci_dove_priv *priv; | 85 | struct sdhci_dove_priv *priv; |
85 | int ret; | 86 | int ret; |
86 | 87 | ||
87 | ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata); | ||
88 | if (ret) | ||
89 | goto sdhci_dove_register_fail; | ||
90 | |||
91 | priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv), | 88 | priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv), |
92 | GFP_KERNEL); | 89 | GFP_KERNEL); |
93 | if (!priv) { | 90 | if (!priv) { |
94 | dev_err(&pdev->dev, "unable to allocate private data"); | 91 | dev_err(&pdev->dev, "unable to allocate private data"); |
95 | ret = -ENOMEM; | 92 | return -ENOMEM; |
96 | goto sdhci_dove_allocate_fail; | ||
97 | } | 93 | } |
98 | 94 | ||
95 | priv->clk = clk_get(&pdev->dev, NULL); | ||
96 | if (!IS_ERR(priv->clk)) | ||
97 | clk_prepare_enable(priv->clk); | ||
98 | |||
99 | ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata); | ||
100 | if (ret) | ||
101 | goto sdhci_dove_register_fail; | ||
102 | |||
99 | host = platform_get_drvdata(pdev); | 103 | host = platform_get_drvdata(pdev); |
100 | pltfm_host = sdhci_priv(host); | 104 | pltfm_host = sdhci_priv(host); |
101 | pltfm_host->priv = priv; | 105 | pltfm_host->priv = priv; |
102 | 106 | ||
103 | priv->clk = clk_get(&pdev->dev, NULL); | ||
104 | if (!IS_ERR(priv->clk)) | ||
105 | clk_prepare_enable(priv->clk); | ||
106 | return 0; | 107 | return 0; |
107 | 108 | ||
108 | sdhci_dove_allocate_fail: | ||
109 | sdhci_pltfm_unregister(pdev); | ||
110 | sdhci_dove_register_fail: | 109 | sdhci_dove_register_fail: |
110 | if (!IS_ERR(priv->clk)) { | ||
111 | clk_disable_unprepare(priv->clk); | ||
112 | clk_put(priv->clk); | ||
113 | } | ||
111 | return ret; | 114 | return ret; |
112 | } | 115 | } |
113 | 116 | ||
@@ -117,14 +120,13 @@ static int __devexit sdhci_dove_remove(struct platform_device *pdev) | |||
117 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); | 120 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
118 | struct sdhci_dove_priv *priv = pltfm_host->priv; | 121 | struct sdhci_dove_priv *priv = pltfm_host->priv; |
119 | 122 | ||
120 | if (priv->clk) { | 123 | sdhci_pltfm_unregister(pdev); |
121 | if (!IS_ERR(priv->clk)) { | 124 | |
122 | clk_disable_unprepare(priv->clk); | 125 | if (!IS_ERR(priv->clk)) { |
123 | clk_put(priv->clk); | 126 | clk_disable_unprepare(priv->clk); |
124 | } | 127 | clk_put(priv->clk); |
125 | devm_kfree(&pdev->dev, priv->clk); | ||
126 | } | 128 | } |
127 | return sdhci_pltfm_unregister(pdev); | 129 | return 0; |
128 | } | 130 | } |
129 | 131 | ||
130 | static const struct of_device_id sdhci_dove_of_match_table[] __devinitdata = { | 132 | static const struct of_device_id sdhci_dove_of_match_table[] __devinitdata = { |
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index ae5fcbfa1eef..63d219f57cae 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c | |||
@@ -169,6 +169,16 @@ static void esdhc_of_resume(struct sdhci_host *host) | |||
169 | } | 169 | } |
170 | #endif | 170 | #endif |
171 | 171 | ||
172 | static void esdhc_of_platform_init(struct sdhci_host *host) | ||
173 | { | ||
174 | u32 vvn; | ||
175 | |||
176 | vvn = in_be32(host->ioaddr + SDHCI_SLOT_INT_STATUS); | ||
177 | vvn = (vvn & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT; | ||
178 | if (vvn == VENDOR_V_22) | ||
179 | host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23; | ||
180 | } | ||
181 | |||
172 | static struct sdhci_ops sdhci_esdhc_ops = { | 182 | static struct sdhci_ops sdhci_esdhc_ops = { |
173 | .read_l = esdhc_readl, | 183 | .read_l = esdhc_readl, |
174 | .read_w = esdhc_readw, | 184 | .read_w = esdhc_readw, |
@@ -180,6 +190,7 @@ static struct sdhci_ops sdhci_esdhc_ops = { | |||
180 | .enable_dma = esdhc_of_enable_dma, | 190 | .enable_dma = esdhc_of_enable_dma, |
181 | .get_max_clock = esdhc_of_get_max_clock, | 191 | .get_max_clock = esdhc_of_get_max_clock, |
182 | .get_min_clock = esdhc_of_get_min_clock, | 192 | .get_min_clock = esdhc_of_get_min_clock, |
193 | .platform_init = esdhc_of_platform_init, | ||
183 | #ifdef CONFIG_PM | 194 | #ifdef CONFIG_PM |
184 | .platform_suspend = esdhc_of_suspend, | 195 | .platform_suspend = esdhc_of_suspend, |
185 | .platform_resume = esdhc_of_resume, | 196 | .platform_resume = esdhc_of_resume, |
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index 4bb74b042a06..04936f353ced 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c | |||
@@ -1196,7 +1196,7 @@ static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot( | |||
1196 | return ERR_PTR(-ENODEV); | 1196 | return ERR_PTR(-ENODEV); |
1197 | } | 1197 | } |
1198 | 1198 | ||
1199 | if (pci_resource_len(pdev, bar) != 0x100) { | 1199 | if (pci_resource_len(pdev, bar) < 0x100) { |
1200 | dev_err(&pdev->dev, "Invalid iomem size. You may " | 1200 | dev_err(&pdev->dev, "Invalid iomem size. You may " |
1201 | "experience problems.\n"); | 1201 | "experience problems.\n"); |
1202 | } | 1202 | } |
diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index 65551a9709cc..27164457f861 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c | |||
@@ -150,6 +150,13 @@ struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, | |||
150 | goto err_remap; | 150 | goto err_remap; |
151 | } | 151 | } |
152 | 152 | ||
153 | /* | ||
154 | * Some platforms need to probe the controller to be able to | ||
155 | * determine which caps should be used. | ||
156 | */ | ||
157 | if (host->ops && host->ops->platform_init) | ||
158 | host->ops->platform_init(host); | ||
159 | |||
153 | platform_set_drvdata(pdev, host); | 160 | platform_set_drvdata(pdev, host); |
154 | 161 | ||
155 | return host; | 162 | return host; |
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 2903949594c6..a54dd5d7a5f9 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c | |||
@@ -211,8 +211,8 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) | |||
211 | if (ourhost->cur_clk != best_src) { | 211 | if (ourhost->cur_clk != best_src) { |
212 | struct clk *clk = ourhost->clk_bus[best_src]; | 212 | struct clk *clk = ourhost->clk_bus[best_src]; |
213 | 213 | ||
214 | clk_enable(clk); | 214 | clk_prepare_enable(clk); |
215 | clk_disable(ourhost->clk_bus[ourhost->cur_clk]); | 215 | clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]); |
216 | 216 | ||
217 | /* turn clock off to card before changing clock source */ | 217 | /* turn clock off to card before changing clock source */ |
218 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); | 218 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); |
@@ -607,7 +607,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
607 | } | 607 | } |
608 | 608 | ||
609 | /* enable the local io clock and keep it running for the moment. */ | 609 | /* enable the local io clock and keep it running for the moment. */ |
610 | clk_enable(sc->clk_io); | 610 | clk_prepare_enable(sc->clk_io); |
611 | 611 | ||
612 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | 612 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
613 | struct clk *clk; | 613 | struct clk *clk; |
@@ -638,7 +638,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
638 | } | 638 | } |
639 | 639 | ||
640 | #ifndef CONFIG_PM_RUNTIME | 640 | #ifndef CONFIG_PM_RUNTIME |
641 | clk_enable(sc->clk_bus[sc->cur_clk]); | 641 | clk_prepare_enable(sc->clk_bus[sc->cur_clk]); |
642 | #endif | 642 | #endif |
643 | 643 | ||
644 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 644 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
@@ -747,13 +747,14 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
747 | sdhci_s3c_setup_card_detect_gpio(sc); | 747 | sdhci_s3c_setup_card_detect_gpio(sc); |
748 | 748 | ||
749 | #ifdef CONFIG_PM_RUNTIME | 749 | #ifdef CONFIG_PM_RUNTIME |
750 | clk_disable(sc->clk_io); | 750 | if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) |
751 | clk_disable_unprepare(sc->clk_io); | ||
751 | #endif | 752 | #endif |
752 | return 0; | 753 | return 0; |
753 | 754 | ||
754 | err_req_regs: | 755 | err_req_regs: |
755 | #ifndef CONFIG_PM_RUNTIME | 756 | #ifndef CONFIG_PM_RUNTIME |
756 | clk_disable(sc->clk_bus[sc->cur_clk]); | 757 | clk_disable_unprepare(sc->clk_bus[sc->cur_clk]); |
757 | #endif | 758 | #endif |
758 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | 759 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
759 | if (sc->clk_bus[ptr]) { | 760 | if (sc->clk_bus[ptr]) { |
@@ -762,7 +763,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
762 | } | 763 | } |
763 | 764 | ||
764 | err_no_busclks: | 765 | err_no_busclks: |
765 | clk_disable(sc->clk_io); | 766 | clk_disable_unprepare(sc->clk_io); |
766 | clk_put(sc->clk_io); | 767 | clk_put(sc->clk_io); |
767 | 768 | ||
768 | err_io_clk: | 769 | err_io_clk: |
@@ -794,7 +795,8 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) | |||
794 | gpio_free(sc->ext_cd_gpio); | 795 | gpio_free(sc->ext_cd_gpio); |
795 | 796 | ||
796 | #ifdef CONFIG_PM_RUNTIME | 797 | #ifdef CONFIG_PM_RUNTIME |
797 | clk_enable(sc->clk_io); | 798 | if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) |
799 | clk_prepare_enable(sc->clk_io); | ||
798 | #endif | 800 | #endif |
799 | sdhci_remove_host(host, 1); | 801 | sdhci_remove_host(host, 1); |
800 | 802 | ||
@@ -802,14 +804,14 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) | |||
802 | pm_runtime_disable(&pdev->dev); | 804 | pm_runtime_disable(&pdev->dev); |
803 | 805 | ||
804 | #ifndef CONFIG_PM_RUNTIME | 806 | #ifndef CONFIG_PM_RUNTIME |
805 | clk_disable(sc->clk_bus[sc->cur_clk]); | 807 | clk_disable_unprepare(sc->clk_bus[sc->cur_clk]); |
806 | #endif | 808 | #endif |
807 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | 809 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
808 | if (sc->clk_bus[ptr]) { | 810 | if (sc->clk_bus[ptr]) { |
809 | clk_put(sc->clk_bus[ptr]); | 811 | clk_put(sc->clk_bus[ptr]); |
810 | } | 812 | } |
811 | } | 813 | } |
812 | clk_disable(sc->clk_io); | 814 | clk_disable_unprepare(sc->clk_io); |
813 | clk_put(sc->clk_io); | 815 | clk_put(sc->clk_io); |
814 | 816 | ||
815 | if (pdev->dev.of_node) { | 817 | if (pdev->dev.of_node) { |
@@ -849,8 +851,8 @@ static int sdhci_s3c_runtime_suspend(struct device *dev) | |||
849 | 851 | ||
850 | ret = sdhci_runtime_suspend_host(host); | 852 | ret = sdhci_runtime_suspend_host(host); |
851 | 853 | ||
852 | clk_disable(ourhost->clk_bus[ourhost->cur_clk]); | 854 | clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]); |
853 | clk_disable(busclk); | 855 | clk_disable_unprepare(busclk); |
854 | return ret; | 856 | return ret; |
855 | } | 857 | } |
856 | 858 | ||
@@ -861,8 +863,8 @@ static int sdhci_s3c_runtime_resume(struct device *dev) | |||
861 | struct clk *busclk = ourhost->clk_io; | 863 | struct clk *busclk = ourhost->clk_io; |
862 | int ret; | 864 | int ret; |
863 | 865 | ||
864 | clk_enable(busclk); | 866 | clk_prepare_enable(busclk); |
865 | clk_enable(ourhost->clk_bus[ourhost->cur_clk]); | 867 | clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]); |
866 | ret = sdhci_runtime_resume_host(host); | 868 | ret = sdhci_runtime_resume_host(host); |
867 | return ret; | 869 | return ret; |
868 | } | 870 | } |
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 7922adb42386..c7851c0aabce 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c | |||
@@ -1315,16 +1315,19 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) | |||
1315 | */ | 1315 | */ |
1316 | if ((host->flags & SDHCI_NEEDS_RETUNING) && | 1316 | if ((host->flags & SDHCI_NEEDS_RETUNING) && |
1317 | !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { | 1317 | !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { |
1318 | /* eMMC uses cmd21 while sd and sdio use cmd19 */ | 1318 | if (mmc->card) { |
1319 | tuning_opcode = mmc->card->type == MMC_TYPE_MMC ? | 1319 | /* eMMC uses cmd21 but sd and sdio use cmd19 */ |
1320 | MMC_SEND_TUNING_BLOCK_HS200 : | 1320 | tuning_opcode = |
1321 | MMC_SEND_TUNING_BLOCK; | 1321 | mmc->card->type == MMC_TYPE_MMC ? |
1322 | spin_unlock_irqrestore(&host->lock, flags); | 1322 | MMC_SEND_TUNING_BLOCK_HS200 : |
1323 | sdhci_execute_tuning(mmc, tuning_opcode); | 1323 | MMC_SEND_TUNING_BLOCK; |
1324 | spin_lock_irqsave(&host->lock, flags); | 1324 | spin_unlock_irqrestore(&host->lock, flags); |
1325 | 1325 | sdhci_execute_tuning(mmc, tuning_opcode); | |
1326 | /* Restore original mmc_request structure */ | 1326 | spin_lock_irqsave(&host->lock, flags); |
1327 | host->mrq = mrq; | 1327 | |
1328 | /* Restore original mmc_request structure */ | ||
1329 | host->mrq = mrq; | ||
1330 | } | ||
1328 | } | 1331 | } |
1329 | 1332 | ||
1330 | if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) | 1333 | if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) |
@@ -2837,6 +2840,9 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2837 | if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) | 2840 | if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) |
2838 | mmc->caps |= MMC_CAP_4_BIT_DATA; | 2841 | mmc->caps |= MMC_CAP_4_BIT_DATA; |
2839 | 2842 | ||
2843 | if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23) | ||
2844 | mmc->caps &= ~MMC_CAP_CMD23; | ||
2845 | |||
2840 | if (caps[0] & SDHCI_CAN_DO_HISPD) | 2846 | if (caps[0] & SDHCI_CAN_DO_HISPD) |
2841 | mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; | 2847 | mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; |
2842 | 2848 | ||
@@ -2846,9 +2852,12 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2846 | 2852 | ||
2847 | /* If vqmmc regulator and no 1.8V signalling, then there's no UHS */ | 2853 | /* If vqmmc regulator and no 1.8V signalling, then there's no UHS */ |
2848 | host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc"); | 2854 | host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc"); |
2849 | if (IS_ERR(host->vqmmc)) { | 2855 | if (IS_ERR_OR_NULL(host->vqmmc)) { |
2850 | pr_info("%s: no vqmmc regulator found\n", mmc_hostname(mmc)); | 2856 | if (PTR_ERR(host->vqmmc) < 0) { |
2851 | host->vqmmc = NULL; | 2857 | pr_info("%s: no vqmmc regulator found\n", |
2858 | mmc_hostname(mmc)); | ||
2859 | host->vqmmc = NULL; | ||
2860 | } | ||
2852 | } | 2861 | } |
2853 | else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000)) | 2862 | else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000)) |
2854 | regulator_enable(host->vqmmc); | 2863 | regulator_enable(host->vqmmc); |
@@ -2904,9 +2913,12 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2904 | ocr_avail = 0; | 2913 | ocr_avail = 0; |
2905 | 2914 | ||
2906 | host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); | 2915 | host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); |
2907 | if (IS_ERR(host->vmmc)) { | 2916 | if (IS_ERR_OR_NULL(host->vmmc)) { |
2908 | pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); | 2917 | if (PTR_ERR(host->vmmc) < 0) { |
2909 | host->vmmc = NULL; | 2918 | pr_info("%s: no vmmc regulator found\n", |
2919 | mmc_hostname(mmc)); | ||
2920 | host->vmmc = NULL; | ||
2921 | } | ||
2910 | } else | 2922 | } else |
2911 | regulator_enable(host->vmmc); | 2923 | regulator_enable(host->vmmc); |
2912 | 2924 | ||
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 97653ea8942b..71a4a7ed46c5 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h | |||
@@ -278,6 +278,7 @@ struct sdhci_ops { | |||
278 | void (*hw_reset)(struct sdhci_host *host); | 278 | void (*hw_reset)(struct sdhci_host *host); |
279 | void (*platform_suspend)(struct sdhci_host *host); | 279 | void (*platform_suspend)(struct sdhci_host *host); |
280 | void (*platform_resume)(struct sdhci_host *host); | 280 | void (*platform_resume)(struct sdhci_host *host); |
281 | void (*platform_init)(struct sdhci_host *host); | ||
281 | }; | 282 | }; |
282 | 283 | ||
283 | #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS | 284 | #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS |
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index 11d2bc3b51d5..d25bc97dc5c6 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c | |||
@@ -1466,9 +1466,9 @@ static int __devexit sh_mmcif_remove(struct platform_device *pdev) | |||
1466 | 1466 | ||
1467 | platform_set_drvdata(pdev, NULL); | 1467 | platform_set_drvdata(pdev, NULL); |
1468 | 1468 | ||
1469 | clk_disable(host->hclk); | ||
1469 | mmc_free_host(host->mmc); | 1470 | mmc_free_host(host->mmc); |
1470 | pm_runtime_put_sync(&pdev->dev); | 1471 | pm_runtime_put_sync(&pdev->dev); |
1471 | clk_disable(host->hclk); | ||
1472 | pm_runtime_disable(&pdev->dev); | 1472 | pm_runtime_disable(&pdev->dev); |
1473 | 1473 | ||
1474 | return 0; | 1474 | return 0; |
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c index dc15d248443f..ef8d2a080d17 100644 --- a/drivers/net/bonding/bond_sysfs.c +++ b/drivers/net/bonding/bond_sysfs.c | |||
@@ -1060,7 +1060,7 @@ static ssize_t bonding_store_primary(struct device *d, | |||
1060 | goto out; | 1060 | goto out; |
1061 | } | 1061 | } |
1062 | 1062 | ||
1063 | sscanf(buf, "%16s", ifname); /* IFNAMSIZ */ | 1063 | sscanf(buf, "%15s", ifname); /* IFNAMSIZ */ |
1064 | 1064 | ||
1065 | /* check to see if we are clearing primary */ | 1065 | /* check to see if we are clearing primary */ |
1066 | if (!strlen(ifname) || buf[0] == '\n') { | 1066 | if (!strlen(ifname) || buf[0] == '\n') { |
@@ -1237,7 +1237,7 @@ static ssize_t bonding_store_active_slave(struct device *d, | |||
1237 | goto out; | 1237 | goto out; |
1238 | } | 1238 | } |
1239 | 1239 | ||
1240 | sscanf(buf, "%16s", ifname); /* IFNAMSIZ */ | 1240 | sscanf(buf, "%15s", ifname); /* IFNAMSIZ */ |
1241 | 1241 | ||
1242 | /* check to see if we are clearing active */ | 1242 | /* check to see if we are clearing active */ |
1243 | if (!strlen(ifname) || buf[0] == '\n') { | 1243 | if (!strlen(ifname) || buf[0] == '\n') { |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c index c65295dded39..6e5bdd1a31d9 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | |||
@@ -1702,7 +1702,7 @@ static int bnx2x_set_eee(struct net_device *dev, struct ethtool_eee *edata) | |||
1702 | SHMEM_EEE_ADV_STATUS_SHIFT); | 1702 | SHMEM_EEE_ADV_STATUS_SHIFT); |
1703 | if ((advertised != (eee_cfg & SHMEM_EEE_ADV_STATUS_MASK))) { | 1703 | if ((advertised != (eee_cfg & SHMEM_EEE_ADV_STATUS_MASK))) { |
1704 | DP(BNX2X_MSG_ETHTOOL, | 1704 | DP(BNX2X_MSG_ETHTOOL, |
1705 | "Direct manipulation of EEE advertisment is not supported\n"); | 1705 | "Direct manipulation of EEE advertisement is not supported\n"); |
1706 | return -EINVAL; | 1706 | return -EINVAL; |
1707 | } | 1707 | } |
1708 | 1708 | ||
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c index e2e45ee5df33..f6cfdc6cf20f 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | |||
@@ -137,7 +137,16 @@ | |||
137 | #define LINK_20GTFD LINK_STATUS_SPEED_AND_DUPLEX_20GTFD | 137 | #define LINK_20GTFD LINK_STATUS_SPEED_AND_DUPLEX_20GTFD |
138 | #define LINK_20GXFD LINK_STATUS_SPEED_AND_DUPLEX_20GXFD | 138 | #define LINK_20GXFD LINK_STATUS_SPEED_AND_DUPLEX_20GXFD |
139 | 139 | ||
140 | 140 | #define LINK_UPDATE_MASK \ | |
141 | (LINK_STATUS_SPEED_AND_DUPLEX_MASK | \ | ||
142 | LINK_STATUS_LINK_UP | \ | ||
143 | LINK_STATUS_PHYSICAL_LINK_FLAG | \ | ||
144 | LINK_STATUS_AUTO_NEGOTIATE_COMPLETE | \ | ||
145 | LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK | \ | ||
146 | LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK | \ | ||
147 | LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK | \ | ||
148 | LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE | \ | ||
149 | LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE) | ||
141 | 150 | ||
142 | #define SFP_EEPROM_CON_TYPE_ADDR 0x2 | 151 | #define SFP_EEPROM_CON_TYPE_ADDR 0x2 |
143 | #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 | 152 | #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 |
@@ -3295,6 +3304,21 @@ static void bnx2x_serdes_deassert(struct bnx2x *bp, u8 port) | |||
3295 | DEFAULT_PHY_DEV_ADDR); | 3304 | DEFAULT_PHY_DEV_ADDR); |
3296 | } | 3305 | } |
3297 | 3306 | ||
3307 | static void bnx2x_xgxs_specific_func(struct bnx2x_phy *phy, | ||
3308 | struct link_params *params, | ||
3309 | u32 action) | ||
3310 | { | ||
3311 | struct bnx2x *bp = params->bp; | ||
3312 | switch (action) { | ||
3313 | case PHY_INIT: | ||
3314 | /* Set correct devad */ | ||
3315 | REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + params->port*0x18, 0); | ||
3316 | REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + params->port*0x18, | ||
3317 | phy->def_md_devad); | ||
3318 | break; | ||
3319 | } | ||
3320 | } | ||
3321 | |||
3298 | static void bnx2x_xgxs_deassert(struct link_params *params) | 3322 | static void bnx2x_xgxs_deassert(struct link_params *params) |
3299 | { | 3323 | { |
3300 | struct bnx2x *bp = params->bp; | 3324 | struct bnx2x *bp = params->bp; |
@@ -3309,10 +3333,8 @@ static void bnx2x_xgxs_deassert(struct link_params *params) | |||
3309 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, val); | 3333 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, val); |
3310 | udelay(500); | 3334 | udelay(500); |
3311 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val); | 3335 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val); |
3312 | 3336 | bnx2x_xgxs_specific_func(¶ms->phy[INT_PHY], params, | |
3313 | REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + port*0x18, 0); | 3337 | PHY_INIT); |
3314 | REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, | ||
3315 | params->phy[INT_PHY].def_md_devad); | ||
3316 | } | 3338 | } |
3317 | 3339 | ||
3318 | static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy, | 3340 | static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy, |
@@ -3545,14 +3567,11 @@ static void bnx2x_warpcore_set_lpi_passthrough(struct bnx2x_phy *phy, | |||
3545 | static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | 3567 | static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, |
3546 | struct link_params *params, | 3568 | struct link_params *params, |
3547 | struct link_vars *vars) { | 3569 | struct link_vars *vars) { |
3548 | u16 val16 = 0, lane, i; | 3570 | u16 lane, i, cl72_ctrl, an_adv = 0; |
3571 | u16 ucode_ver; | ||
3549 | struct bnx2x *bp = params->bp; | 3572 | struct bnx2x *bp = params->bp; |
3550 | static struct bnx2x_reg_set reg_set[] = { | 3573 | static struct bnx2x_reg_set reg_set[] = { |
3551 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, | 3574 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, |
3552 | {MDIO_AN_DEVAD, MDIO_WC_REG_PAR_DET_10G_CTRL, 0}, | ||
3553 | {MDIO_WC_DEVAD, MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, 0}, | ||
3554 | {MDIO_WC_DEVAD, MDIO_WC_REG_XGXSBLK1_LANECTRL0, 0xff}, | ||
3555 | {MDIO_WC_DEVAD, MDIO_WC_REG_XGXSBLK1_LANECTRL1, 0x5555}, | ||
3556 | {MDIO_PMA_DEVAD, MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0x0}, | 3575 | {MDIO_PMA_DEVAD, MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0x0}, |
3557 | {MDIO_WC_DEVAD, MDIO_WC_REG_RX66_CONTROL, 0x7415}, | 3576 | {MDIO_WC_DEVAD, MDIO_WC_REG_RX66_CONTROL, 0x7415}, |
3558 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_MISC2, 0x6190}, | 3577 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_MISC2, 0x6190}, |
@@ -3565,12 +3584,19 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | |||
3565 | bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, | 3584 | bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, |
3566 | reg_set[i].val); | 3585 | reg_set[i].val); |
3567 | 3586 | ||
3587 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
3588 | MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, &cl72_ctrl); | ||
3589 | cl72_ctrl &= 0xf8ff; | ||
3590 | cl72_ctrl |= 0x3800; | ||
3591 | bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
3592 | MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, cl72_ctrl); | ||
3593 | |||
3568 | /* Check adding advertisement for 1G KX */ | 3594 | /* Check adding advertisement for 1G KX */ |
3569 | if (((vars->line_speed == SPEED_AUTO_NEG) && | 3595 | if (((vars->line_speed == SPEED_AUTO_NEG) && |
3570 | (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)) || | 3596 | (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)) || |
3571 | (vars->line_speed == SPEED_1000)) { | 3597 | (vars->line_speed == SPEED_1000)) { |
3572 | u32 addr = MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2; | 3598 | u32 addr = MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2; |
3573 | val16 |= (1<<5); | 3599 | an_adv |= (1<<5); |
3574 | 3600 | ||
3575 | /* Enable CL37 1G Parallel Detect */ | 3601 | /* Enable CL37 1G Parallel Detect */ |
3576 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, addr, 0x1); | 3602 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, addr, 0x1); |
@@ -3580,11 +3606,14 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | |||
3580 | (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) || | 3606 | (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) || |
3581 | (vars->line_speed == SPEED_10000)) { | 3607 | (vars->line_speed == SPEED_10000)) { |
3582 | /* Check adding advertisement for 10G KR */ | 3608 | /* Check adding advertisement for 10G KR */ |
3583 | val16 |= (1<<7); | 3609 | an_adv |= (1<<7); |
3584 | /* Enable 10G Parallel Detect */ | 3610 | /* Enable 10G Parallel Detect */ |
3611 | CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK, | ||
3612 | MDIO_AER_BLOCK_AER_REG, 0); | ||
3613 | |||
3585 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, | 3614 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, |
3586 | MDIO_WC_REG_PAR_DET_10G_CTRL, 1); | 3615 | MDIO_WC_REG_PAR_DET_10G_CTRL, 1); |
3587 | 3616 | bnx2x_set_aer_mmd(params, phy); | |
3588 | DP(NETIF_MSG_LINK, "Advertize 10G\n"); | 3617 | DP(NETIF_MSG_LINK, "Advertize 10G\n"); |
3589 | } | 3618 | } |
3590 | 3619 | ||
@@ -3604,7 +3633,7 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | |||
3604 | 3633 | ||
3605 | /* Advertised speeds */ | 3634 | /* Advertised speeds */ |
3606 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, | 3635 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, |
3607 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, val16); | 3636 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, an_adv); |
3608 | 3637 | ||
3609 | /* Advertised and set FEC (Forward Error Correction) */ | 3638 | /* Advertised and set FEC (Forward Error Correction) */ |
3610 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, | 3639 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, |
@@ -3628,9 +3657,10 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | |||
3628 | /* Set KR Autoneg Work-Around flag for Warpcore version older than D108 | 3657 | /* Set KR Autoneg Work-Around flag for Warpcore version older than D108 |
3629 | */ | 3658 | */ |
3630 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | 3659 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, |
3631 | MDIO_WC_REG_UC_INFO_B1_VERSION, &val16); | 3660 | MDIO_WC_REG_UC_INFO_B1_VERSION, &ucode_ver); |
3632 | if (val16 < 0xd108) { | 3661 | if (ucode_ver < 0xd108) { |
3633 | DP(NETIF_MSG_LINK, "Enable AN KR work-around\n"); | 3662 | DP(NETIF_MSG_LINK, "Enable AN KR work-around. WC ver:0x%x\n", |
3663 | ucode_ver); | ||
3634 | vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; | 3664 | vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; |
3635 | } | 3665 | } |
3636 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, | 3666 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, |
@@ -3651,21 +3681,16 @@ static void bnx2x_warpcore_set_10G_KR(struct bnx2x_phy *phy, | |||
3651 | struct link_vars *vars) | 3681 | struct link_vars *vars) |
3652 | { | 3682 | { |
3653 | struct bnx2x *bp = params->bp; | 3683 | struct bnx2x *bp = params->bp; |
3654 | u16 i; | 3684 | u16 val16, i, lane; |
3655 | static struct bnx2x_reg_set reg_set[] = { | 3685 | static struct bnx2x_reg_set reg_set[] = { |
3656 | /* Disable Autoneg */ | 3686 | /* Disable Autoneg */ |
3657 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, | 3687 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, |
3658 | {MDIO_AN_DEVAD, MDIO_WC_REG_PAR_DET_10G_CTRL, 0}, | ||
3659 | {MDIO_WC_DEVAD, MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, | 3688 | {MDIO_WC_DEVAD, MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, |
3660 | 0x3f00}, | 3689 | 0x3f00}, |
3661 | {MDIO_AN_DEVAD, MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, 0}, | 3690 | {MDIO_AN_DEVAD, MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, 0}, |
3662 | {MDIO_AN_DEVAD, MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x0}, | 3691 | {MDIO_AN_DEVAD, MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x0}, |
3663 | {MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL3_UP1, 0x1}, | 3692 | {MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL3_UP1, 0x1}, |
3664 | {MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL5_MISC7, 0xa}, | 3693 | {MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL5_MISC7, 0xa}, |
3665 | /* Disable CL36 PCS Tx */ | ||
3666 | {MDIO_WC_DEVAD, MDIO_WC_REG_XGXSBLK1_LANECTRL0, 0x0}, | ||
3667 | /* Double Wide Single Data Rate @ pll rate */ | ||
3668 | {MDIO_WC_DEVAD, MDIO_WC_REG_XGXSBLK1_LANECTRL1, 0xFFFF}, | ||
3669 | /* Leave cl72 training enable, needed for KR */ | 3694 | /* Leave cl72 training enable, needed for KR */ |
3670 | {MDIO_PMA_DEVAD, | 3695 | {MDIO_PMA_DEVAD, |
3671 | MDIO_WC_REG_PMD_IEEE9BLK_TENGBASE_KR_PMD_CONTROL_REGISTER_150, | 3696 | MDIO_WC_REG_PMD_IEEE9BLK_TENGBASE_KR_PMD_CONTROL_REGISTER_150, |
@@ -3676,11 +3701,24 @@ static void bnx2x_warpcore_set_10G_KR(struct bnx2x_phy *phy, | |||
3676 | bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, | 3701 | bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, |
3677 | reg_set[i].val); | 3702 | reg_set[i].val); |
3678 | 3703 | ||
3679 | /* Leave CL72 enabled */ | 3704 | lane = bnx2x_get_warpcore_lane(phy, params); |
3680 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, | 3705 | /* Global registers */ |
3681 | MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, | 3706 | CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK, |
3682 | 0x3800); | 3707 | MDIO_AER_BLOCK_AER_REG, 0); |
3708 | /* Disable CL36 PCS Tx */ | ||
3709 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
3710 | MDIO_WC_REG_XGXSBLK1_LANECTRL0, &val16); | ||
3711 | val16 &= ~(0x0011 << lane); | ||
3712 | bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
3713 | MDIO_WC_REG_XGXSBLK1_LANECTRL0, val16); | ||
3683 | 3714 | ||
3715 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
3716 | MDIO_WC_REG_XGXSBLK1_LANECTRL1, &val16); | ||
3717 | val16 |= (0x0303 << (lane << 1)); | ||
3718 | bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
3719 | MDIO_WC_REG_XGXSBLK1_LANECTRL1, val16); | ||
3720 | /* Restore AER */ | ||
3721 | bnx2x_set_aer_mmd(params, phy); | ||
3684 | /* Set speed via PMA/PMD register */ | 3722 | /* Set speed via PMA/PMD register */ |
3685 | bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, | 3723 | bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, |
3686 | MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x2040); | 3724 | MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x2040); |
@@ -4303,7 +4341,7 @@ static void bnx2x_warpcore_link_reset(struct bnx2x_phy *phy, | |||
4303 | struct link_params *params) | 4341 | struct link_params *params) |
4304 | { | 4342 | { |
4305 | struct bnx2x *bp = params->bp; | 4343 | struct bnx2x *bp = params->bp; |
4306 | u16 val16; | 4344 | u16 val16, lane; |
4307 | bnx2x_sfp_e3_set_transmitter(params, phy, 0); | 4345 | bnx2x_sfp_e3_set_transmitter(params, phy, 0); |
4308 | bnx2x_set_mdio_clk(bp, params->chip_id, params->port); | 4346 | bnx2x_set_mdio_clk(bp, params->chip_id, params->port); |
4309 | bnx2x_set_aer_mmd(params, phy); | 4347 | bnx2x_set_aer_mmd(params, phy); |
@@ -4340,6 +4378,30 @@ static void bnx2x_warpcore_link_reset(struct bnx2x_phy *phy, | |||
4340 | MDIO_WC_REG_XGXSBLK1_LANECTRL2, | 4378 | MDIO_WC_REG_XGXSBLK1_LANECTRL2, |
4341 | val16 & 0xff00); | 4379 | val16 & 0xff00); |
4342 | 4380 | ||
4381 | lane = bnx2x_get_warpcore_lane(phy, params); | ||
4382 | /* Disable CL36 PCS Tx */ | ||
4383 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
4384 | MDIO_WC_REG_XGXSBLK1_LANECTRL0, &val16); | ||
4385 | val16 |= (0x11 << lane); | ||
4386 | if (phy->flags & FLAGS_WC_DUAL_MODE) | ||
4387 | val16 |= (0x22 << lane); | ||
4388 | bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
4389 | MDIO_WC_REG_XGXSBLK1_LANECTRL0, val16); | ||
4390 | |||
4391 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
4392 | MDIO_WC_REG_XGXSBLK1_LANECTRL1, &val16); | ||
4393 | val16 &= ~(0x0303 << (lane << 1)); | ||
4394 | val16 |= (0x0101 << (lane << 1)); | ||
4395 | if (phy->flags & FLAGS_WC_DUAL_MODE) { | ||
4396 | val16 &= ~(0x0c0c << (lane << 1)); | ||
4397 | val16 |= (0x0404 << (lane << 1)); | ||
4398 | } | ||
4399 | |||
4400 | bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
4401 | MDIO_WC_REG_XGXSBLK1_LANECTRL1, val16); | ||
4402 | /* Restore AER */ | ||
4403 | bnx2x_set_aer_mmd(params, phy); | ||
4404 | |||
4343 | } | 4405 | } |
4344 | 4406 | ||
4345 | static void bnx2x_set_warpcore_loopback(struct bnx2x_phy *phy, | 4407 | static void bnx2x_set_warpcore_loopback(struct bnx2x_phy *phy, |
@@ -6296,15 +6358,7 @@ static int bnx2x_update_link_down(struct link_params *params, | |||
6296 | vars->mac_type = MAC_TYPE_NONE; | 6358 | vars->mac_type = MAC_TYPE_NONE; |
6297 | 6359 | ||
6298 | /* Update shared memory */ | 6360 | /* Update shared memory */ |
6299 | vars->link_status &= ~(LINK_STATUS_SPEED_AND_DUPLEX_MASK | | 6361 | vars->link_status &= ~LINK_UPDATE_MASK; |
6300 | LINK_STATUS_LINK_UP | | ||
6301 | LINK_STATUS_PHYSICAL_LINK_FLAG | | ||
6302 | LINK_STATUS_AUTO_NEGOTIATE_COMPLETE | | ||
6303 | LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK | | ||
6304 | LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK | | ||
6305 | LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK | | ||
6306 | LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE | | ||
6307 | LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE); | ||
6308 | vars->line_speed = 0; | 6362 | vars->line_speed = 0; |
6309 | bnx2x_update_mng(params, vars->link_status); | 6363 | bnx2x_update_mng(params, vars->link_status); |
6310 | 6364 | ||
@@ -6452,6 +6506,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars) | |||
6452 | u16 ext_phy_line_speed = 0, prev_line_speed = vars->line_speed; | 6506 | u16 ext_phy_line_speed = 0, prev_line_speed = vars->line_speed; |
6453 | u8 active_external_phy = INT_PHY; | 6507 | u8 active_external_phy = INT_PHY; |
6454 | vars->phy_flags &= ~PHY_HALF_OPEN_CONN_FLAG; | 6508 | vars->phy_flags &= ~PHY_HALF_OPEN_CONN_FLAG; |
6509 | vars->link_status &= ~LINK_UPDATE_MASK; | ||
6455 | for (phy_index = INT_PHY; phy_index < params->num_phys; | 6510 | for (phy_index = INT_PHY; phy_index < params->num_phys; |
6456 | phy_index++) { | 6511 | phy_index++) { |
6457 | phy_vars[phy_index].flow_ctrl = 0; | 6512 | phy_vars[phy_index].flow_ctrl = 0; |
@@ -7579,7 +7634,7 @@ static void bnx2x_warpcore_power_module(struct link_params *params, | |||
7579 | static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy, | 7634 | static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy, |
7580 | struct link_params *params, | 7635 | struct link_params *params, |
7581 | u16 addr, u8 byte_cnt, | 7636 | u16 addr, u8 byte_cnt, |
7582 | u8 *o_buf) | 7637 | u8 *o_buf, u8 is_init) |
7583 | { | 7638 | { |
7584 | int rc = 0; | 7639 | int rc = 0; |
7585 | u8 i, j = 0, cnt = 0; | 7640 | u8 i, j = 0, cnt = 0; |
@@ -7596,10 +7651,10 @@ static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy, | |||
7596 | /* 4 byte aligned address */ | 7651 | /* 4 byte aligned address */ |
7597 | addr32 = addr & (~0x3); | 7652 | addr32 = addr & (~0x3); |
7598 | do { | 7653 | do { |
7599 | if (cnt == I2C_WA_PWR_ITER) { | 7654 | if ((!is_init) && (cnt == I2C_WA_PWR_ITER)) { |
7600 | bnx2x_warpcore_power_module(params, phy, 0); | 7655 | bnx2x_warpcore_power_module(params, phy, 0); |
7601 | /* Note that 100us are not enough here */ | 7656 | /* Note that 100us are not enough here */ |
7602 | usleep_range(1000,1000); | 7657 | usleep_range(1000, 2000); |
7603 | bnx2x_warpcore_power_module(params, phy, 1); | 7658 | bnx2x_warpcore_power_module(params, phy, 1); |
7604 | } | 7659 | } |
7605 | rc = bnx2x_bsc_read(params, phy, 0xa0, addr32, 0, byte_cnt, | 7660 | rc = bnx2x_bsc_read(params, phy, 0xa0, addr32, 0, byte_cnt, |
@@ -7719,7 +7774,7 @@ int bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, | |||
7719 | break; | 7774 | break; |
7720 | case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT: | 7775 | case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT: |
7721 | rc = bnx2x_warpcore_read_sfp_module_eeprom(phy, params, addr, | 7776 | rc = bnx2x_warpcore_read_sfp_module_eeprom(phy, params, addr, |
7722 | byte_cnt, o_buf); | 7777 | byte_cnt, o_buf, 0); |
7723 | break; | 7778 | break; |
7724 | } | 7779 | } |
7725 | return rc; | 7780 | return rc; |
@@ -7923,6 +7978,7 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy, | |||
7923 | 7978 | ||
7924 | { | 7979 | { |
7925 | u8 val; | 7980 | u8 val; |
7981 | int rc; | ||
7926 | struct bnx2x *bp = params->bp; | 7982 | struct bnx2x *bp = params->bp; |
7927 | u16 timeout; | 7983 | u16 timeout; |
7928 | /* Initialization time after hot-plug may take up to 300ms for | 7984 | /* Initialization time after hot-plug may take up to 300ms for |
@@ -7930,8 +7986,14 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy, | |||
7930 | */ | 7986 | */ |
7931 | 7987 | ||
7932 | for (timeout = 0; timeout < 60; timeout++) { | 7988 | for (timeout = 0; timeout < 60; timeout++) { |
7933 | if (bnx2x_read_sfp_module_eeprom(phy, params, 1, 1, &val) | 7989 | if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) |
7934 | == 0) { | 7990 | rc = bnx2x_warpcore_read_sfp_module_eeprom(phy, |
7991 | params, 1, | ||
7992 | 1, &val, 1); | ||
7993 | else | ||
7994 | rc = bnx2x_read_sfp_module_eeprom(phy, params, 1, 1, | ||
7995 | &val); | ||
7996 | if (rc == 0) { | ||
7935 | DP(NETIF_MSG_LINK, | 7997 | DP(NETIF_MSG_LINK, |
7936 | "SFP+ module initialization took %d ms\n", | 7998 | "SFP+ module initialization took %d ms\n", |
7937 | timeout * 5); | 7999 | timeout * 5); |
@@ -7939,7 +8001,8 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy, | |||
7939 | } | 8001 | } |
7940 | usleep_range(5000, 10000); | 8002 | usleep_range(5000, 10000); |
7941 | } | 8003 | } |
7942 | return -EINVAL; | 8004 | rc = bnx2x_read_sfp_module_eeprom(phy, params, 1, 1, &val); |
8005 | return rc; | ||
7943 | } | 8006 | } |
7944 | 8007 | ||
7945 | static void bnx2x_8727_power_module(struct bnx2x *bp, | 8008 | static void bnx2x_8727_power_module(struct bnx2x *bp, |
@@ -9878,7 +9941,7 @@ static int bnx2x_848x3_config_init(struct bnx2x_phy *phy, | |||
9878 | else | 9941 | else |
9879 | rc = bnx2x_8483x_disable_eee(phy, params, vars); | 9942 | rc = bnx2x_8483x_disable_eee(phy, params, vars); |
9880 | if (rc) { | 9943 | if (rc) { |
9881 | DP(NETIF_MSG_LINK, "Failed to set EEE advertisment\n"); | 9944 | DP(NETIF_MSG_LINK, "Failed to set EEE advertisement\n"); |
9882 | return rc; | 9945 | return rc; |
9883 | } | 9946 | } |
9884 | } else { | 9947 | } else { |
@@ -10993,7 +11056,7 @@ static struct bnx2x_phy phy_xgxs = { | |||
10993 | .format_fw_ver = (format_fw_ver_t)NULL, | 11056 | .format_fw_ver = (format_fw_ver_t)NULL, |
10994 | .hw_reset = (hw_reset_t)NULL, | 11057 | .hw_reset = (hw_reset_t)NULL, |
10995 | .set_link_led = (set_link_led_t)NULL, | 11058 | .set_link_led = (set_link_led_t)NULL, |
10996 | .phy_specific_func = (phy_specific_func_t)NULL | 11059 | .phy_specific_func = (phy_specific_func_t)bnx2x_xgxs_specific_func |
10997 | }; | 11060 | }; |
10998 | static struct bnx2x_phy phy_warpcore = { | 11061 | static struct bnx2x_phy phy_warpcore = { |
10999 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, | 11062 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, |
@@ -11465,6 +11528,11 @@ static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port, | |||
11465 | phy->media_type = ETH_PHY_BASE_T; | 11528 | phy->media_type = ETH_PHY_BASE_T; |
11466 | break; | 11529 | break; |
11467 | case PORT_HW_CFG_NET_SERDES_IF_XFI: | 11530 | case PORT_HW_CFG_NET_SERDES_IF_XFI: |
11531 | phy->supported &= (SUPPORTED_1000baseT_Full | | ||
11532 | SUPPORTED_10000baseT_Full | | ||
11533 | SUPPORTED_FIBRE | | ||
11534 | SUPPORTED_Pause | | ||
11535 | SUPPORTED_Asym_Pause); | ||
11468 | phy->media_type = ETH_PHY_XFP_FIBER; | 11536 | phy->media_type = ETH_PHY_XFP_FIBER; |
11469 | break; | 11537 | break; |
11470 | case PORT_HW_CFG_NET_SERDES_IF_SFI: | 11538 | case PORT_HW_CFG_NET_SERDES_IF_SFI: |
@@ -12919,7 +12987,7 @@ static u8 bnx2x_analyze_link_error(struct link_params *params, | |||
12919 | DP(NETIF_MSG_LINK, "Analyze TX Fault\n"); | 12987 | DP(NETIF_MSG_LINK, "Analyze TX Fault\n"); |
12920 | break; | 12988 | break; |
12921 | default: | 12989 | default: |
12922 | DP(NETIF_MSG_LINK, "Analyze UNKOWN\n"); | 12990 | DP(NETIF_MSG_LINK, "Analyze UNKNOWN\n"); |
12923 | } | 12991 | } |
12924 | DP(NETIF_MSG_LINK, "Link changed:[%x %x]->%x\n", vars->link_up, | 12992 | DP(NETIF_MSG_LINK, "Link changed:[%x %x]->%x\n", vars->link_up, |
12925 | old_status, status); | 12993 | old_status, status); |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c index d5648fc666bd..bd1fd3d87c24 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | |||
@@ -6794,8 +6794,9 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) | |||
6794 | 6794 | ||
6795 | bnx2x_init_block(bp, BLOCK_DORQ, init_phase); | 6795 | bnx2x_init_block(bp, BLOCK_DORQ, init_phase); |
6796 | 6796 | ||
6797 | bnx2x_init_block(bp, BLOCK_BRB1, init_phase); | ||
6798 | |||
6797 | if (CHIP_IS_E1(bp) || CHIP_IS_E1H(bp)) { | 6799 | if (CHIP_IS_E1(bp) || CHIP_IS_E1H(bp)) { |
6798 | bnx2x_init_block(bp, BLOCK_BRB1, init_phase); | ||
6799 | 6800 | ||
6800 | if (IS_MF(bp)) | 6801 | if (IS_MF(bp)) |
6801 | low = ((bp->flags & ONE_PORT_FLAG) ? 160 : 246); | 6802 | low = ((bp->flags & ONE_PORT_FLAG) ? 160 : 246); |
@@ -11902,7 +11903,15 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, | |||
11902 | /* disable FCOE L2 queue for E1x */ | 11903 | /* disable FCOE L2 queue for E1x */ |
11903 | if (CHIP_IS_E1x(bp)) | 11904 | if (CHIP_IS_E1x(bp)) |
11904 | bp->flags |= NO_FCOE_FLAG; | 11905 | bp->flags |= NO_FCOE_FLAG; |
11905 | 11906 | /* disable FCOE for 57840 device, until FW supports it */ | |
11907 | switch (ent->driver_data) { | ||
11908 | case BCM57840_O: | ||
11909 | case BCM57840_4_10: | ||
11910 | case BCM57840_2_20: | ||
11911 | case BCM57840_MFO: | ||
11912 | case BCM57840_MF: | ||
11913 | bp->flags |= NO_FCOE_FLAG; | ||
11914 | } | ||
11906 | #endif | 11915 | #endif |
11907 | 11916 | ||
11908 | 11917 | ||
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index c1cde11b0c6d..0df1284df497 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | |||
@@ -3416,16 +3416,6 @@ static int adap_init0_config(struct adapter *adapter, int reset) | |||
3416 | finicsum, cfcsum); | 3416 | finicsum, cfcsum); |
3417 | 3417 | ||
3418 | /* | 3418 | /* |
3419 | * If we're a pure NIC driver then disable all offloading facilities. | ||
3420 | * This will allow the firmware to optimize aspects of the hardware | ||
3421 | * configuration which will result in improved performance. | ||
3422 | */ | ||
3423 | caps_cmd.ofldcaps = 0; | ||
3424 | caps_cmd.iscsicaps = 0; | ||
3425 | caps_cmd.rdmacaps = 0; | ||
3426 | caps_cmd.fcoecaps = 0; | ||
3427 | |||
3428 | /* | ||
3429 | * And now tell the firmware to use the configuration we just loaded. | 3419 | * And now tell the firmware to use the configuration we just loaded. |
3430 | */ | 3420 | */ |
3431 | caps_cmd.op_to_write = | 3421 | caps_cmd.op_to_write = |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index 32eec15fe4c2..730ae2cfa49e 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | |||
@@ -2519,6 +2519,7 @@ int t4_fw_bye(struct adapter *adap, unsigned int mbox) | |||
2519 | { | 2519 | { |
2520 | struct fw_bye_cmd c; | 2520 | struct fw_bye_cmd c; |
2521 | 2521 | ||
2522 | memset(&c, 0, sizeof(c)); | ||
2522 | INIT_CMD(c, BYE, WRITE); | 2523 | INIT_CMD(c, BYE, WRITE); |
2523 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); | 2524 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); |
2524 | } | 2525 | } |
@@ -2535,6 +2536,7 @@ int t4_early_init(struct adapter *adap, unsigned int mbox) | |||
2535 | { | 2536 | { |
2536 | struct fw_initialize_cmd c; | 2537 | struct fw_initialize_cmd c; |
2537 | 2538 | ||
2539 | memset(&c, 0, sizeof(c)); | ||
2538 | INIT_CMD(c, INITIALIZE, WRITE); | 2540 | INIT_CMD(c, INITIALIZE, WRITE); |
2539 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); | 2541 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); |
2540 | } | 2542 | } |
@@ -2551,6 +2553,7 @@ int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset) | |||
2551 | { | 2553 | { |
2552 | struct fw_reset_cmd c; | 2554 | struct fw_reset_cmd c; |
2553 | 2555 | ||
2556 | memset(&c, 0, sizeof(c)); | ||
2554 | INIT_CMD(c, RESET, WRITE); | 2557 | INIT_CMD(c, RESET, WRITE); |
2555 | c.val = htonl(reset); | 2558 | c.val = htonl(reset); |
2556 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); | 2559 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); |
@@ -2828,7 +2831,7 @@ int t4_fixup_host_params(struct adapter *adap, unsigned int page_size, | |||
2828 | HOSTPAGESIZEPF7(sge_hps)); | 2831 | HOSTPAGESIZEPF7(sge_hps)); |
2829 | 2832 | ||
2830 | t4_set_reg_field(adap, SGE_CONTROL, | 2833 | t4_set_reg_field(adap, SGE_CONTROL, |
2831 | INGPADBOUNDARY(INGPADBOUNDARY_MASK) | | 2834 | INGPADBOUNDARY_MASK | |
2832 | EGRSTATUSPAGESIZE_MASK, | 2835 | EGRSTATUSPAGESIZE_MASK, |
2833 | INGPADBOUNDARY(fl_align_log - 5) | | 2836 | INGPADBOUNDARY(fl_align_log - 5) | |
2834 | EGRSTATUSPAGESIZE(stat_len != 64)); | 2837 | EGRSTATUSPAGESIZE(stat_len != 64)); |
@@ -3278,6 +3281,7 @@ int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, | |||
3278 | { | 3281 | { |
3279 | struct fw_vi_enable_cmd c; | 3282 | struct fw_vi_enable_cmd c; |
3280 | 3283 | ||
3284 | memset(&c, 0, sizeof(c)); | ||
3281 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST | | 3285 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST | |
3282 | FW_CMD_EXEC | FW_VI_ENABLE_CMD_VIID(viid)); | 3286 | FW_CMD_EXEC | FW_VI_ENABLE_CMD_VIID(viid)); |
3283 | c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_LED | FW_LEN16(c)); | 3287 | c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_LED | FW_LEN16(c)); |
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index 1d03dcdd5e56..19ac096cb07b 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c | |||
@@ -1353,8 +1353,11 @@ static int gfar_restore(struct device *dev) | |||
1353 | struct gfar_private *priv = dev_get_drvdata(dev); | 1353 | struct gfar_private *priv = dev_get_drvdata(dev); |
1354 | struct net_device *ndev = priv->ndev; | 1354 | struct net_device *ndev = priv->ndev; |
1355 | 1355 | ||
1356 | if (!netif_running(ndev)) | 1356 | if (!netif_running(ndev)) { |
1357 | netif_device_attach(ndev); | ||
1358 | |||
1357 | return 0; | 1359 | return 0; |
1360 | } | ||
1358 | 1361 | ||
1359 | gfar_init_bds(ndev); | 1362 | gfar_init_bds(ndev); |
1360 | init_registers(ndev); | 1363 | init_registers(ndev); |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c index 56b20d17d0e4..116f0e901bee 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | |||
@@ -2673,6 +2673,9 @@ static int ixgbe_get_ts_info(struct net_device *dev, | |||
2673 | case ixgbe_mac_X540: | 2673 | case ixgbe_mac_X540: |
2674 | case ixgbe_mac_82599EB: | 2674 | case ixgbe_mac_82599EB: |
2675 | info->so_timestamping = | 2675 | info->so_timestamping = |
2676 | SOF_TIMESTAMPING_TX_SOFTWARE | | ||
2677 | SOF_TIMESTAMPING_RX_SOFTWARE | | ||
2678 | SOF_TIMESTAMPING_SOFTWARE | | ||
2676 | SOF_TIMESTAMPING_TX_HARDWARE | | 2679 | SOF_TIMESTAMPING_TX_HARDWARE | |
2677 | SOF_TIMESTAMPING_RX_HARDWARE | | 2680 | SOF_TIMESTAMPING_RX_HARDWARE | |
2678 | SOF_TIMESTAMPING_RAW_HARDWARE; | 2681 | SOF_TIMESTAMPING_RAW_HARDWARE; |
diff --git a/drivers/net/ethernet/jme.c b/drivers/net/ethernet/jme.c index f8064df10cc4..92317e9c0f73 100644 --- a/drivers/net/ethernet/jme.c +++ b/drivers/net/ethernet/jme.c | |||
@@ -1948,10 +1948,10 @@ jme_close(struct net_device *netdev) | |||
1948 | 1948 | ||
1949 | JME_NAPI_DISABLE(jme); | 1949 | JME_NAPI_DISABLE(jme); |
1950 | 1950 | ||
1951 | tasklet_disable(&jme->linkch_task); | 1951 | tasklet_kill(&jme->linkch_task); |
1952 | tasklet_disable(&jme->txclean_task); | 1952 | tasklet_kill(&jme->txclean_task); |
1953 | tasklet_disable(&jme->rxclean_task); | 1953 | tasklet_kill(&jme->rxclean_task); |
1954 | tasklet_disable(&jme->rxempty_task); | 1954 | tasklet_kill(&jme->rxempty_task); |
1955 | 1955 | ||
1956 | jme_disable_rx_engine(jme); | 1956 | jme_disable_rx_engine(jme); |
1957 | jme_disable_tx_engine(jme); | 1957 | jme_disable_tx_engine(jme); |
diff --git a/drivers/net/ethernet/marvell/skge.c b/drivers/net/ethernet/marvell/skge.c index 9b9c2ac5c4c2..d19a143aa5a8 100644 --- a/drivers/net/ethernet/marvell/skge.c +++ b/drivers/net/ethernet/marvell/skge.c | |||
@@ -4026,7 +4026,7 @@ static void __devexit skge_remove(struct pci_dev *pdev) | |||
4026 | dev0 = hw->dev[0]; | 4026 | dev0 = hw->dev[0]; |
4027 | unregister_netdev(dev0); | 4027 | unregister_netdev(dev0); |
4028 | 4028 | ||
4029 | tasklet_disable(&hw->phy_task); | 4029 | tasklet_kill(&hw->phy_task); |
4030 | 4030 | ||
4031 | spin_lock_irq(&hw->hw_lock); | 4031 | spin_lock_irq(&hw->hw_lock); |
4032 | hw->intr_mask = 0; | 4032 | hw->intr_mask = 0; |
diff --git a/drivers/net/ethernet/micrel/ksz884x.c b/drivers/net/ethernet/micrel/ksz884x.c index 318fee91c79d..e558edd1cb6c 100644 --- a/drivers/net/ethernet/micrel/ksz884x.c +++ b/drivers/net/ethernet/micrel/ksz884x.c | |||
@@ -5407,8 +5407,8 @@ static int netdev_close(struct net_device *dev) | |||
5407 | /* Delay for receive task to stop scheduling itself. */ | 5407 | /* Delay for receive task to stop scheduling itself. */ |
5408 | msleep(2000 / HZ); | 5408 | msleep(2000 / HZ); |
5409 | 5409 | ||
5410 | tasklet_disable(&hw_priv->rx_tasklet); | 5410 | tasklet_kill(&hw_priv->rx_tasklet); |
5411 | tasklet_disable(&hw_priv->tx_tasklet); | 5411 | tasklet_kill(&hw_priv->tx_tasklet); |
5412 | free_irq(dev->irq, hw_priv->dev); | 5412 | free_irq(dev->irq, hw_priv->dev); |
5413 | 5413 | ||
5414 | transmit_cleanup(hw_priv, 0); | 5414 | transmit_cleanup(hw_priv, 0); |
diff --git a/drivers/net/ethernet/nxp/lpc_eth.c b/drivers/net/ethernet/nxp/lpc_eth.c index 53743f7a2ca9..af8b4142088c 100644 --- a/drivers/net/ethernet/nxp/lpc_eth.c +++ b/drivers/net/ethernet/nxp/lpc_eth.c | |||
@@ -1524,6 +1524,7 @@ static int lpc_eth_drv_remove(struct platform_device *pdev) | |||
1524 | pldat->dma_buff_base_p); | 1524 | pldat->dma_buff_base_p); |
1525 | free_irq(ndev->irq, ndev); | 1525 | free_irq(ndev->irq, ndev); |
1526 | iounmap(pldat->net_base); | 1526 | iounmap(pldat->net_base); |
1527 | mdiobus_unregister(pldat->mii_bus); | ||
1527 | mdiobus_free(pldat->mii_bus); | 1528 | mdiobus_free(pldat->mii_bus); |
1528 | clk_disable(pldat->clk); | 1529 | clk_disable(pldat->clk); |
1529 | clk_put(pldat->clk); | 1530 | clk_put(pldat->clk); |
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index e7ff886e8047..927aa33d4349 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c | |||
@@ -3827,6 +3827,8 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp) | |||
3827 | void __iomem *ioaddr = tp->mmio_addr; | 3827 | void __iomem *ioaddr = tp->mmio_addr; |
3828 | 3828 | ||
3829 | switch (tp->mac_version) { | 3829 | switch (tp->mac_version) { |
3830 | case RTL_GIGA_MAC_VER_25: | ||
3831 | case RTL_GIGA_MAC_VER_26: | ||
3830 | case RTL_GIGA_MAC_VER_29: | 3832 | case RTL_GIGA_MAC_VER_29: |
3831 | case RTL_GIGA_MAC_VER_30: | 3833 | case RTL_GIGA_MAC_VER_30: |
3832 | case RTL_GIGA_MAC_VER_32: | 3834 | case RTL_GIGA_MAC_VER_32: |
@@ -4519,6 +4521,9 @@ static void rtl_set_rx_mode(struct net_device *dev) | |||
4519 | mc_filter[1] = swab32(data); | 4521 | mc_filter[1] = swab32(data); |
4520 | } | 4522 | } |
4521 | 4523 | ||
4524 | if (tp->mac_version == RTL_GIGA_MAC_VER_35) | ||
4525 | mc_filter[1] = mc_filter[0] = 0xffffffff; | ||
4526 | |||
4522 | RTL_W32(MAR0 + 4, mc_filter[1]); | 4527 | RTL_W32(MAR0 + 4, mc_filter[1]); |
4523 | RTL_W32(MAR0 + 0, mc_filter[0]); | 4528 | RTL_W32(MAR0 + 0, mc_filter[0]); |
4524 | 4529 | ||
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c index 0793299bd39e..1d04754a6637 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c | |||
@@ -990,7 +990,7 @@ static int axienet_stop(struct net_device *ndev) | |||
990 | axienet_setoptions(ndev, lp->options & | 990 | axienet_setoptions(ndev, lp->options & |
991 | ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN)); | 991 | ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN)); |
992 | 992 | ||
993 | tasklet_disable(&lp->dma_err_tasklet); | 993 | tasklet_kill(&lp->dma_err_tasklet); |
994 | 994 | ||
995 | free_irq(lp->tx_irq, ndev); | 995 | free_irq(lp->tx_irq, ndev); |
996 | free_irq(lp->rx_irq, ndev); | 996 | free_irq(lp->rx_irq, ndev); |
diff --git a/drivers/net/phy/mdio-bitbang.c b/drivers/net/phy/mdio-bitbang.c index daec9b05d168..6428fcbbdd4b 100644 --- a/drivers/net/phy/mdio-bitbang.c +++ b/drivers/net/phy/mdio-bitbang.c | |||
@@ -234,6 +234,7 @@ void free_mdio_bitbang(struct mii_bus *bus) | |||
234 | struct mdiobb_ctrl *ctrl = bus->priv; | 234 | struct mdiobb_ctrl *ctrl = bus->priv; |
235 | 235 | ||
236 | module_put(ctrl->ops->owner); | 236 | module_put(ctrl->ops->owner); |
237 | mdiobus_unregister(bus); | ||
237 | mdiobus_free(bus); | 238 | mdiobus_free(bus); |
238 | } | 239 | } |
239 | EXPORT_SYMBOL(free_mdio_bitbang); | 240 | EXPORT_SYMBOL(free_mdio_bitbang); |
diff --git a/drivers/net/usb/cdc_eem.c b/drivers/net/usb/cdc_eem.c index c81e278629ff..08d55b6bf272 100644 --- a/drivers/net/usb/cdc_eem.c +++ b/drivers/net/usb/cdc_eem.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <linux/usb/cdc.h> | 31 | #include <linux/usb/cdc.h> |
32 | #include <linux/usb/usbnet.h> | 32 | #include <linux/usb/usbnet.h> |
33 | #include <linux/gfp.h> | 33 | #include <linux/gfp.h> |
34 | #include <linux/if_vlan.h> | ||
34 | 35 | ||
35 | 36 | ||
36 | /* | 37 | /* |
@@ -92,7 +93,7 @@ static int eem_bind(struct usbnet *dev, struct usb_interface *intf) | |||
92 | 93 | ||
93 | /* no jumbogram (16K) support for now */ | 94 | /* no jumbogram (16K) support for now */ |
94 | 95 | ||
95 | dev->net->hard_header_len += EEM_HEAD + ETH_FCS_LEN; | 96 | dev->net->hard_header_len += EEM_HEAD + ETH_FCS_LEN + VLAN_HLEN; |
96 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; | 97 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; |
97 | 98 | ||
98 | return 0; | 99 | return 0; |
diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c index 7479a5761d0d..3286166415b4 100644 --- a/drivers/net/usb/smsc95xx.c +++ b/drivers/net/usb/smsc95xx.c | |||
@@ -1344,6 +1344,7 @@ static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, | |||
1344 | } else { | 1344 | } else { |
1345 | u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); | 1345 | u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); |
1346 | skb_push(skb, 4); | 1346 | skb_push(skb, 4); |
1347 | cpu_to_le32s(&csum_preamble); | ||
1347 | memcpy(skb->data, &csum_preamble, 4); | 1348 | memcpy(skb->data, &csum_preamble, 4); |
1348 | } | 1349 | } |
1349 | } | 1350 | } |
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c index cb04f900cc46..edb81ed06950 100644 --- a/drivers/net/usb/usbnet.c +++ b/drivers/net/usb/usbnet.c | |||
@@ -359,10 +359,12 @@ static enum skb_state defer_bh(struct usbnet *dev, struct sk_buff *skb, | |||
359 | void usbnet_defer_kevent (struct usbnet *dev, int work) | 359 | void usbnet_defer_kevent (struct usbnet *dev, int work) |
360 | { | 360 | { |
361 | set_bit (work, &dev->flags); | 361 | set_bit (work, &dev->flags); |
362 | if (!schedule_work (&dev->kevent)) | 362 | if (!schedule_work (&dev->kevent)) { |
363 | netdev_err(dev->net, "kevent %d may have been dropped\n", work); | 363 | if (net_ratelimit()) |
364 | else | 364 | netdev_err(dev->net, "kevent %d may have been dropped\n", work); |
365 | } else { | ||
365 | netdev_dbg(dev->net, "kevent %d scheduled\n", work); | 366 | netdev_dbg(dev->net, "kevent %d scheduled\n", work); |
367 | } | ||
366 | } | 368 | } |
367 | EXPORT_SYMBOL_GPL(usbnet_defer_kevent); | 369 | EXPORT_SYMBOL_GPL(usbnet_defer_kevent); |
368 | 370 | ||
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c index ce9d4f2c9776..0ae1bcc6da73 100644 --- a/drivers/net/vmxnet3/vmxnet3_drv.c +++ b/drivers/net/vmxnet3/vmxnet3_drv.c | |||
@@ -744,28 +744,43 @@ vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx, | |||
744 | 744 | ||
745 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | 745 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
746 | const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; | 746 | const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; |
747 | u32 buf_size; | ||
747 | 748 | ||
748 | tbi = tq->buf_info + tq->tx_ring.next2fill; | 749 | buf_offset = 0; |
749 | tbi->map_type = VMXNET3_MAP_PAGE; | 750 | len = skb_frag_size(frag); |
750 | tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag, | 751 | while (len) { |
751 | 0, skb_frag_size(frag), | 752 | tbi = tq->buf_info + tq->tx_ring.next2fill; |
752 | DMA_TO_DEVICE); | 753 | if (len < VMXNET3_MAX_TX_BUF_SIZE) { |
754 | buf_size = len; | ||
755 | dw2 |= len; | ||
756 | } else { | ||
757 | buf_size = VMXNET3_MAX_TX_BUF_SIZE; | ||
758 | /* spec says that for TxDesc.len, 0 == 2^14 */ | ||
759 | } | ||
760 | tbi->map_type = VMXNET3_MAP_PAGE; | ||
761 | tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag, | ||
762 | buf_offset, buf_size, | ||
763 | DMA_TO_DEVICE); | ||
753 | 764 | ||
754 | tbi->len = skb_frag_size(frag); | 765 | tbi->len = buf_size; |
755 | 766 | ||
756 | gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; | 767 | gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; |
757 | BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); | 768 | BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); |
758 | 769 | ||
759 | gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); | 770 | gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); |
760 | gdesc->dword[2] = cpu_to_le32(dw2 | skb_frag_size(frag)); | 771 | gdesc->dword[2] = cpu_to_le32(dw2); |
761 | gdesc->dword[3] = 0; | 772 | gdesc->dword[3] = 0; |
762 | 773 | ||
763 | dev_dbg(&adapter->netdev->dev, | 774 | dev_dbg(&adapter->netdev->dev, |
764 | "txd[%u]: 0x%llu %u %u\n", | 775 | "txd[%u]: 0x%llu %u %u\n", |
765 | tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), | 776 | tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), |
766 | le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); | 777 | le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); |
767 | vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); | 778 | vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); |
768 | dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; | 779 | dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; |
780 | |||
781 | len -= buf_size; | ||
782 | buf_offset += buf_size; | ||
783 | } | ||
769 | } | 784 | } |
770 | 785 | ||
771 | ctx->eop_txd = gdesc; | 786 | ctx->eop_txd = gdesc; |
@@ -886,6 +901,18 @@ vmxnet3_prepare_tso(struct sk_buff *skb, | |||
886 | } | 901 | } |
887 | } | 902 | } |
888 | 903 | ||
904 | static int txd_estimate(const struct sk_buff *skb) | ||
905 | { | ||
906 | int count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1; | ||
907 | int i; | ||
908 | |||
909 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | ||
910 | const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; | ||
911 | |||
912 | count += VMXNET3_TXD_NEEDED(skb_frag_size(frag)); | ||
913 | } | ||
914 | return count; | ||
915 | } | ||
889 | 916 | ||
890 | /* | 917 | /* |
891 | * Transmits a pkt thru a given tq | 918 | * Transmits a pkt thru a given tq |
@@ -914,9 +941,7 @@ vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, | |||
914 | union Vmxnet3_GenericDesc tempTxDesc; | 941 | union Vmxnet3_GenericDesc tempTxDesc; |
915 | #endif | 942 | #endif |
916 | 943 | ||
917 | /* conservatively estimate # of descriptors to use */ | 944 | count = txd_estimate(skb); |
918 | count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + | ||
919 | skb_shinfo(skb)->nr_frags + 1; | ||
920 | 945 | ||
921 | ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP)); | 946 | ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP)); |
922 | 947 | ||
diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c index 607976c00162..7b4adde93c01 100644 --- a/drivers/net/vxlan.c +++ b/drivers/net/vxlan.c | |||
@@ -816,7 +816,7 @@ static void vxlan_cleanup(unsigned long arg) | |||
816 | = container_of(p, struct vxlan_fdb, hlist); | 816 | = container_of(p, struct vxlan_fdb, hlist); |
817 | unsigned long timeout; | 817 | unsigned long timeout; |
818 | 818 | ||
819 | if (f->state == NUD_PERMANENT) | 819 | if (f->state & NUD_PERMANENT) |
820 | continue; | 820 | continue; |
821 | 821 | ||
822 | timeout = f->used + vxlan->age_interval * HZ; | 822 | timeout = f->used + vxlan->age_interval * HZ; |
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c index 378bd70256b2..741918a2027b 100644 --- a/drivers/net/wireless/ath/ath9k/xmit.c +++ b/drivers/net/wireless/ath/ath9k/xmit.c | |||
@@ -312,6 +312,7 @@ static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc) | |||
312 | } | 312 | } |
313 | 313 | ||
314 | bf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list); | 314 | bf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list); |
315 | bf->bf_next = NULL; | ||
315 | list_del(&bf->list); | 316 | list_del(&bf->list); |
316 | 317 | ||
317 | spin_unlock_bh(&sc->tx.txbuflock); | 318 | spin_unlock_bh(&sc->tx.txbuflock); |
@@ -393,7 +394,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
393 | u16 seq_st = 0, acked_cnt = 0, txfail_cnt = 0, seq_first; | 394 | u16 seq_st = 0, acked_cnt = 0, txfail_cnt = 0, seq_first; |
394 | u32 ba[WME_BA_BMP_SIZE >> 5]; | 395 | u32 ba[WME_BA_BMP_SIZE >> 5]; |
395 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; | 396 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; |
396 | bool rc_update = true; | 397 | bool rc_update = true, isba; |
397 | struct ieee80211_tx_rate rates[4]; | 398 | struct ieee80211_tx_rate rates[4]; |
398 | struct ath_frame_info *fi; | 399 | struct ath_frame_info *fi; |
399 | int nframes; | 400 | int nframes; |
@@ -437,13 +438,17 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
437 | tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK; | 438 | tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK; |
438 | tid = ATH_AN_2_TID(an, tidno); | 439 | tid = ATH_AN_2_TID(an, tidno); |
439 | seq_first = tid->seq_start; | 440 | seq_first = tid->seq_start; |
441 | isba = ts->ts_flags & ATH9K_TX_BA; | ||
440 | 442 | ||
441 | /* | 443 | /* |
442 | * The hardware occasionally sends a tx status for the wrong TID. | 444 | * The hardware occasionally sends a tx status for the wrong TID. |
443 | * In this case, the BA status cannot be considered valid and all | 445 | * In this case, the BA status cannot be considered valid and all |
444 | * subframes need to be retransmitted | 446 | * subframes need to be retransmitted |
447 | * | ||
448 | * Only BlockAcks have a TID and therefore normal Acks cannot be | ||
449 | * checked | ||
445 | */ | 450 | */ |
446 | if (tidno != ts->tid) | 451 | if (isba && tidno != ts->tid) |
447 | txok = false; | 452 | txok = false; |
448 | 453 | ||
449 | isaggr = bf_isaggr(bf); | 454 | isaggr = bf_isaggr(bf); |
@@ -1774,6 +1779,7 @@ static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq, | |||
1774 | list_add_tail(&bf->list, &bf_head); | 1779 | list_add_tail(&bf->list, &bf_head); |
1775 | bf->bf_state.bf_type = 0; | 1780 | bf->bf_state.bf_type = 0; |
1776 | 1781 | ||
1782 | bf->bf_next = NULL; | ||
1777 | bf->bf_lastbf = bf; | 1783 | bf->bf_lastbf = bf; |
1778 | ath_tx_fill_desc(sc, bf, txq, fi->framelen); | 1784 | ath_tx_fill_desc(sc, bf, txq, fi->framelen); |
1779 | ath_tx_txqaddbuf(sc, txq, &bf_head, false); | 1785 | ath_tx_txqaddbuf(sc, txq, &bf_head, false); |
diff --git a/drivers/net/wireless/b43legacy/pio.c b/drivers/net/wireless/b43legacy/pio.c index 192251adf986..282eedec675e 100644 --- a/drivers/net/wireless/b43legacy/pio.c +++ b/drivers/net/wireless/b43legacy/pio.c | |||
@@ -382,7 +382,7 @@ static void cancel_transfers(struct b43legacy_pioqueue *queue) | |||
382 | { | 382 | { |
383 | struct b43legacy_pio_txpacket *packet, *tmp_packet; | 383 | struct b43legacy_pio_txpacket *packet, *tmp_packet; |
384 | 384 | ||
385 | tasklet_disable(&queue->txtask); | 385 | tasklet_kill(&queue->txtask); |
386 | 386 | ||
387 | list_for_each_entry_safe(packet, tmp_packet, &queue->txrunning, list) | 387 | list_for_each_entry_safe(packet, tmp_packet, &queue->txrunning, list) |
388 | free_txpacket(packet, 0); | 388 | free_txpacket(packet, 0); |
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index 01dc8891070c..59474ae0aec0 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -2449,7 +2449,7 @@ static int rt2800_get_gain_calibration_delta(struct rt2x00_dev *rt2x00dev) | |||
2449 | /* | 2449 | /* |
2450 | * Check if temperature compensation is supported. | 2450 | * Check if temperature compensation is supported. |
2451 | */ | 2451 | */ |
2452 | if (tssi_bounds[4] == 0xff) | 2452 | if (tssi_bounds[4] == 0xff || step == 0xff) |
2453 | return 0; | 2453 | return 0; |
2454 | 2454 | ||
2455 | /* | 2455 | /* |
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 6241fd05bd41..a543746fb354 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c | |||
@@ -320,10 +320,7 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), | |||
320 | } else | 320 | } else |
321 | next = dev->bus_list.next; | 321 | next = dev->bus_list.next; |
322 | 322 | ||
323 | /* Run device routines with the device locked */ | ||
324 | device_lock(&dev->dev); | ||
325 | retval = cb(dev, userdata); | 323 | retval = cb(dev, userdata); |
326 | device_unlock(&dev->dev); | ||
327 | if (retval) | 324 | if (retval) |
328 | break; | 325 | break; |
329 | } | 326 | } |
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c index 94c6e2aa03d6..6c94fc9489e7 100644 --- a/drivers/pci/pci-driver.c +++ b/drivers/pci/pci-driver.c | |||
@@ -398,6 +398,8 @@ static void pci_device_shutdown(struct device *dev) | |||
398 | struct pci_dev *pci_dev = to_pci_dev(dev); | 398 | struct pci_dev *pci_dev = to_pci_dev(dev); |
399 | struct pci_driver *drv = pci_dev->driver; | 399 | struct pci_driver *drv = pci_dev->driver; |
400 | 400 | ||
401 | pm_runtime_resume(dev); | ||
402 | |||
401 | if (drv && drv->shutdown) | 403 | if (drv && drv->shutdown) |
402 | drv->shutdown(pci_dev); | 404 | drv->shutdown(pci_dev); |
403 | pci_msi_shutdown(pci_dev); | 405 | pci_msi_shutdown(pci_dev); |
@@ -408,16 +410,6 @@ static void pci_device_shutdown(struct device *dev) | |||
408 | * continue to do DMA | 410 | * continue to do DMA |
409 | */ | 411 | */ |
410 | pci_disable_device(pci_dev); | 412 | pci_disable_device(pci_dev); |
411 | |||
412 | /* | ||
413 | * Devices may be enabled to wake up by runtime PM, but they need not | ||
414 | * be supposed to wake up the system from its "power off" state (e.g. | ||
415 | * ACPI S5). Therefore disable wakeup for all devices that aren't | ||
416 | * supposed to wake up the system at this point. The state argument | ||
417 | * will be ignored by pci_enable_wake(). | ||
418 | */ | ||
419 | if (!device_may_wakeup(dev)) | ||
420 | pci_enable_wake(pci_dev, PCI_UNKNOWN, false); | ||
421 | } | 413 | } |
422 | 414 | ||
423 | #ifdef CONFIG_PM | 415 | #ifdef CONFIG_PM |
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 02d107b15281..f39378d9da15 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c | |||
@@ -458,40 +458,6 @@ boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) | |||
458 | } | 458 | } |
459 | struct device_attribute vga_attr = __ATTR_RO(boot_vga); | 459 | struct device_attribute vga_attr = __ATTR_RO(boot_vga); |
460 | 460 | ||
461 | static void | ||
462 | pci_config_pm_runtime_get(struct pci_dev *pdev) | ||
463 | { | ||
464 | struct device *dev = &pdev->dev; | ||
465 | struct device *parent = dev->parent; | ||
466 | |||
467 | if (parent) | ||
468 | pm_runtime_get_sync(parent); | ||
469 | pm_runtime_get_noresume(dev); | ||
470 | /* | ||
471 | * pdev->current_state is set to PCI_D3cold during suspending, | ||
472 | * so wait until suspending completes | ||
473 | */ | ||
474 | pm_runtime_barrier(dev); | ||
475 | /* | ||
476 | * Only need to resume devices in D3cold, because config | ||
477 | * registers are still accessible for devices suspended but | ||
478 | * not in D3cold. | ||
479 | */ | ||
480 | if (pdev->current_state == PCI_D3cold) | ||
481 | pm_runtime_resume(dev); | ||
482 | } | ||
483 | |||
484 | static void | ||
485 | pci_config_pm_runtime_put(struct pci_dev *pdev) | ||
486 | { | ||
487 | struct device *dev = &pdev->dev; | ||
488 | struct device *parent = dev->parent; | ||
489 | |||
490 | pm_runtime_put(dev); | ||
491 | if (parent) | ||
492 | pm_runtime_put_sync(parent); | ||
493 | } | ||
494 | |||
495 | static ssize_t | 461 | static ssize_t |
496 | pci_read_config(struct file *filp, struct kobject *kobj, | 462 | pci_read_config(struct file *filp, struct kobject *kobj, |
497 | struct bin_attribute *bin_attr, | 463 | struct bin_attribute *bin_attr, |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 54858838f098..aabf64798bda 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -1858,6 +1858,38 @@ bool pci_dev_run_wake(struct pci_dev *dev) | |||
1858 | } | 1858 | } |
1859 | EXPORT_SYMBOL_GPL(pci_dev_run_wake); | 1859 | EXPORT_SYMBOL_GPL(pci_dev_run_wake); |
1860 | 1860 | ||
1861 | void pci_config_pm_runtime_get(struct pci_dev *pdev) | ||
1862 | { | ||
1863 | struct device *dev = &pdev->dev; | ||
1864 | struct device *parent = dev->parent; | ||
1865 | |||
1866 | if (parent) | ||
1867 | pm_runtime_get_sync(parent); | ||
1868 | pm_runtime_get_noresume(dev); | ||
1869 | /* | ||
1870 | * pdev->current_state is set to PCI_D3cold during suspending, | ||
1871 | * so wait until suspending completes | ||
1872 | */ | ||
1873 | pm_runtime_barrier(dev); | ||
1874 | /* | ||
1875 | * Only need to resume devices in D3cold, because config | ||
1876 | * registers are still accessible for devices suspended but | ||
1877 | * not in D3cold. | ||
1878 | */ | ||
1879 | if (pdev->current_state == PCI_D3cold) | ||
1880 | pm_runtime_resume(dev); | ||
1881 | } | ||
1882 | |||
1883 | void pci_config_pm_runtime_put(struct pci_dev *pdev) | ||
1884 | { | ||
1885 | struct device *dev = &pdev->dev; | ||
1886 | struct device *parent = dev->parent; | ||
1887 | |||
1888 | pm_runtime_put(dev); | ||
1889 | if (parent) | ||
1890 | pm_runtime_put_sync(parent); | ||
1891 | } | ||
1892 | |||
1861 | /** | 1893 | /** |
1862 | * pci_pm_init - Initialize PM functions of given PCI device | 1894 | * pci_pm_init - Initialize PM functions of given PCI device |
1863 | * @dev: PCI device to handle. | 1895 | * @dev: PCI device to handle. |
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index bacbcba69cf3..fd92aab9904b 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h | |||
@@ -72,6 +72,8 @@ extern void pci_disable_enabled_device(struct pci_dev *dev); | |||
72 | extern int pci_finish_runtime_suspend(struct pci_dev *dev); | 72 | extern int pci_finish_runtime_suspend(struct pci_dev *dev); |
73 | extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); | 73 | extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); |
74 | extern void pci_wakeup_bus(struct pci_bus *bus); | 74 | extern void pci_wakeup_bus(struct pci_bus *bus); |
75 | extern void pci_config_pm_runtime_get(struct pci_dev *dev); | ||
76 | extern void pci_config_pm_runtime_put(struct pci_dev *dev); | ||
75 | extern void pci_pm_init(struct pci_dev *dev); | 77 | extern void pci_pm_init(struct pci_dev *dev); |
76 | extern void platform_pci_wakeup_init(struct pci_dev *dev); | 78 | extern void platform_pci_wakeup_init(struct pci_dev *dev); |
77 | extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); | 79 | extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); |
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index 06bad96af415..af4e31cd3a3b 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c | |||
@@ -213,6 +213,7 @@ static int report_error_detected(struct pci_dev *dev, void *data) | |||
213 | struct aer_broadcast_data *result_data; | 213 | struct aer_broadcast_data *result_data; |
214 | result_data = (struct aer_broadcast_data *) data; | 214 | result_data = (struct aer_broadcast_data *) data; |
215 | 215 | ||
216 | device_lock(&dev->dev); | ||
216 | dev->error_state = result_data->state; | 217 | dev->error_state = result_data->state; |
217 | 218 | ||
218 | if (!dev->driver || | 219 | if (!dev->driver || |
@@ -231,12 +232,14 @@ static int report_error_detected(struct pci_dev *dev, void *data) | |||
231 | dev->driver ? | 232 | dev->driver ? |
232 | "no AER-aware driver" : "no driver"); | 233 | "no AER-aware driver" : "no driver"); |
233 | } | 234 | } |
234 | return 0; | 235 | goto out; |
235 | } | 236 | } |
236 | 237 | ||
237 | err_handler = dev->driver->err_handler; | 238 | err_handler = dev->driver->err_handler; |
238 | vote = err_handler->error_detected(dev, result_data->state); | 239 | vote = err_handler->error_detected(dev, result_data->state); |
239 | result_data->result = merge_result(result_data->result, vote); | 240 | result_data->result = merge_result(result_data->result, vote); |
241 | out: | ||
242 | device_unlock(&dev->dev); | ||
240 | return 0; | 243 | return 0; |
241 | } | 244 | } |
242 | 245 | ||
@@ -247,14 +250,17 @@ static int report_mmio_enabled(struct pci_dev *dev, void *data) | |||
247 | struct aer_broadcast_data *result_data; | 250 | struct aer_broadcast_data *result_data; |
248 | result_data = (struct aer_broadcast_data *) data; | 251 | result_data = (struct aer_broadcast_data *) data; |
249 | 252 | ||
253 | device_lock(&dev->dev); | ||
250 | if (!dev->driver || | 254 | if (!dev->driver || |
251 | !dev->driver->err_handler || | 255 | !dev->driver->err_handler || |
252 | !dev->driver->err_handler->mmio_enabled) | 256 | !dev->driver->err_handler->mmio_enabled) |
253 | return 0; | 257 | goto out; |
254 | 258 | ||
255 | err_handler = dev->driver->err_handler; | 259 | err_handler = dev->driver->err_handler; |
256 | vote = err_handler->mmio_enabled(dev); | 260 | vote = err_handler->mmio_enabled(dev); |
257 | result_data->result = merge_result(result_data->result, vote); | 261 | result_data->result = merge_result(result_data->result, vote); |
262 | out: | ||
263 | device_unlock(&dev->dev); | ||
258 | return 0; | 264 | return 0; |
259 | } | 265 | } |
260 | 266 | ||
@@ -265,14 +271,17 @@ static int report_slot_reset(struct pci_dev *dev, void *data) | |||
265 | struct aer_broadcast_data *result_data; | 271 | struct aer_broadcast_data *result_data; |
266 | result_data = (struct aer_broadcast_data *) data; | 272 | result_data = (struct aer_broadcast_data *) data; |
267 | 273 | ||
274 | device_lock(&dev->dev); | ||
268 | if (!dev->driver || | 275 | if (!dev->driver || |
269 | !dev->driver->err_handler || | 276 | !dev->driver->err_handler || |
270 | !dev->driver->err_handler->slot_reset) | 277 | !dev->driver->err_handler->slot_reset) |
271 | return 0; | 278 | goto out; |
272 | 279 | ||
273 | err_handler = dev->driver->err_handler; | 280 | err_handler = dev->driver->err_handler; |
274 | vote = err_handler->slot_reset(dev); | 281 | vote = err_handler->slot_reset(dev); |
275 | result_data->result = merge_result(result_data->result, vote); | 282 | result_data->result = merge_result(result_data->result, vote); |
283 | out: | ||
284 | device_unlock(&dev->dev); | ||
276 | return 0; | 285 | return 0; |
277 | } | 286 | } |
278 | 287 | ||
@@ -280,15 +289,18 @@ static int report_resume(struct pci_dev *dev, void *data) | |||
280 | { | 289 | { |
281 | const struct pci_error_handlers *err_handler; | 290 | const struct pci_error_handlers *err_handler; |
282 | 291 | ||
292 | device_lock(&dev->dev); | ||
283 | dev->error_state = pci_channel_io_normal; | 293 | dev->error_state = pci_channel_io_normal; |
284 | 294 | ||
285 | if (!dev->driver || | 295 | if (!dev->driver || |
286 | !dev->driver->err_handler || | 296 | !dev->driver->err_handler || |
287 | !dev->driver->err_handler->resume) | 297 | !dev->driver->err_handler->resume) |
288 | return 0; | 298 | goto out; |
289 | 299 | ||
290 | err_handler = dev->driver->err_handler; | 300 | err_handler = dev->driver->err_handler; |
291 | err_handler->resume(dev); | 301 | err_handler->resume(dev); |
302 | out: | ||
303 | device_unlock(&dev->dev); | ||
292 | return 0; | 304 | return 0; |
293 | } | 305 | } |
294 | 306 | ||
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index d03a7a39b2d8..ed129b414624 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c | |||
@@ -272,7 +272,8 @@ static int get_port_device_capability(struct pci_dev *dev) | |||
272 | } | 272 | } |
273 | 273 | ||
274 | /* Hot-Plug Capable */ | 274 | /* Hot-Plug Capable */ |
275 | if (cap_mask & PCIE_PORT_SERVICE_HP) { | 275 | if ((cap_mask & PCIE_PORT_SERVICE_HP) && |
276 | dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT) { | ||
276 | pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); | 277 | pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); |
277 | if (reg32 & PCI_EXP_SLTCAP_HPC) { | 278 | if (reg32 & PCI_EXP_SLTCAP_HPC) { |
278 | services |= PCIE_PORT_SERVICE_HP; | 279 | services |= PCIE_PORT_SERVICE_HP; |
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index eb907a8faf2a..9b8505ccc56d 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c | |||
@@ -76,6 +76,8 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
76 | if (!access_ok(VERIFY_WRITE, buf, cnt)) | 76 | if (!access_ok(VERIFY_WRITE, buf, cnt)) |
77 | return -EINVAL; | 77 | return -EINVAL; |
78 | 78 | ||
79 | pci_config_pm_runtime_get(dev); | ||
80 | |||
79 | if ((pos & 1) && cnt) { | 81 | if ((pos & 1) && cnt) { |
80 | unsigned char val; | 82 | unsigned char val; |
81 | pci_user_read_config_byte(dev, pos, &val); | 83 | pci_user_read_config_byte(dev, pos, &val); |
@@ -121,6 +123,8 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
121 | cnt--; | 123 | cnt--; |
122 | } | 124 | } |
123 | 125 | ||
126 | pci_config_pm_runtime_put(dev); | ||
127 | |||
124 | *ppos = pos; | 128 | *ppos = pos; |
125 | return nbytes; | 129 | return nbytes; |
126 | } | 130 | } |
@@ -146,6 +150,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof | |||
146 | if (!access_ok(VERIFY_READ, buf, cnt)) | 150 | if (!access_ok(VERIFY_READ, buf, cnt)) |
147 | return -EINVAL; | 151 | return -EINVAL; |
148 | 152 | ||
153 | pci_config_pm_runtime_get(dev); | ||
154 | |||
149 | if ((pos & 1) && cnt) { | 155 | if ((pos & 1) && cnt) { |
150 | unsigned char val; | 156 | unsigned char val; |
151 | __get_user(val, buf); | 157 | __get_user(val, buf); |
@@ -191,6 +197,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof | |||
191 | cnt--; | 197 | cnt--; |
192 | } | 198 | } |
193 | 199 | ||
200 | pci_config_pm_runtime_put(dev); | ||
201 | |||
194 | *ppos = pos; | 202 | *ppos = pos; |
195 | i_size_write(ino, dp->size); | 203 | i_size_write(ino, dp->size); |
196 | return nbytes; | 204 | return nbytes; |
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 7bf914df6e91..d96caefd914a 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig | |||
@@ -179,11 +179,13 @@ config PINCTRL_COH901 | |||
179 | 179 | ||
180 | config PINCTRL_SAMSUNG | 180 | config PINCTRL_SAMSUNG |
181 | bool "Samsung pinctrl driver" | 181 | bool "Samsung pinctrl driver" |
182 | depends on OF && GPIOLIB | ||
182 | select PINMUX | 183 | select PINMUX |
183 | select PINCONF | 184 | select PINCONF |
184 | 185 | ||
185 | config PINCTRL_EXYNOS4 | 186 | config PINCTRL_EXYNOS4 |
186 | bool "Pinctrl driver data for Exynos4 SoC" | 187 | bool "Pinctrl driver data for Exynos4 SoC" |
188 | depends on OF && GPIOLIB | ||
187 | select PINCTRL_SAMSUNG | 189 | select PINCTRL_SAMSUNG |
188 | 190 | ||
189 | config PINCTRL_MVEBU | 191 | config PINCTRL_MVEBU |
diff --git a/drivers/pinctrl/spear/pinctrl-spear.c b/drivers/pinctrl/spear/pinctrl-spear.c index 5d4f44f462f0..b1fd6ee33c6c 100644 --- a/drivers/pinctrl/spear/pinctrl-spear.c +++ b/drivers/pinctrl/spear/pinctrl-spear.c | |||
@@ -244,7 +244,7 @@ static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev, | |||
244 | else | 244 | else |
245 | temp = ~muxreg->val; | 245 | temp = ~muxreg->val; |
246 | 246 | ||
247 | val |= temp; | 247 | val |= muxreg->mask & temp; |
248 | pmx_writel(pmx, val, muxreg->reg); | 248 | pmx_writel(pmx, val, muxreg->reg); |
249 | } | 249 | } |
250 | } | 250 | } |
diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c index d6cca8c81b92..0436fc7895d6 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1310.c +++ b/drivers/pinctrl/spear/pinctrl-spear1310.c | |||
@@ -25,8 +25,8 @@ static const struct pinctrl_pin_desc spear1310_pins[] = { | |||
25 | }; | 25 | }; |
26 | 26 | ||
27 | /* registers */ | 27 | /* registers */ |
28 | #define PERIP_CFG 0x32C | 28 | #define PERIP_CFG 0x3B0 |
29 | #define MCIF_SEL_SHIFT 3 | 29 | #define MCIF_SEL_SHIFT 5 |
30 | #define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT) | 30 | #define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT) |
31 | #define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT) | 31 | #define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT) |
32 | #define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT) | 32 | #define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT) |
@@ -164,6 +164,10 @@ static const struct pinctrl_pin_desc spear1310_pins[] = { | |||
164 | #define PMX_SSP0_CS0_MASK (1 << 29) | 164 | #define PMX_SSP0_CS0_MASK (1 << 29) |
165 | #define PMX_SSP0_CS1_2_MASK (1 << 30) | 165 | #define PMX_SSP0_CS1_2_MASK (1 << 30) |
166 | 166 | ||
167 | #define PAD_DIRECTION_SEL_0 0x65C | ||
168 | #define PAD_DIRECTION_SEL_1 0x660 | ||
169 | #define PAD_DIRECTION_SEL_2 0x664 | ||
170 | |||
167 | /* combined macros */ | 171 | /* combined macros */ |
168 | #define PMX_GMII_MASK (PMX_GMIICLK_MASK | \ | 172 | #define PMX_GMII_MASK (PMX_GMIICLK_MASK | \ |
169 | PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \ | 173 | PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \ |
@@ -237,6 +241,10 @@ static struct spear_muxreg i2c0_muxreg[] = { | |||
237 | .reg = PAD_FUNCTION_EN_0, | 241 | .reg = PAD_FUNCTION_EN_0, |
238 | .mask = PMX_I2C0_MASK, | 242 | .mask = PMX_I2C0_MASK, |
239 | .val = PMX_I2C0_MASK, | 243 | .val = PMX_I2C0_MASK, |
244 | }, { | ||
245 | .reg = PAD_DIRECTION_SEL_0, | ||
246 | .mask = PMX_I2C0_MASK, | ||
247 | .val = PMX_I2C0_MASK, | ||
240 | }, | 248 | }, |
241 | }; | 249 | }; |
242 | 250 | ||
@@ -269,6 +277,10 @@ static struct spear_muxreg ssp0_muxreg[] = { | |||
269 | .reg = PAD_FUNCTION_EN_0, | 277 | .reg = PAD_FUNCTION_EN_0, |
270 | .mask = PMX_SSP0_MASK, | 278 | .mask = PMX_SSP0_MASK, |
271 | .val = PMX_SSP0_MASK, | 279 | .val = PMX_SSP0_MASK, |
280 | }, { | ||
281 | .reg = PAD_DIRECTION_SEL_0, | ||
282 | .mask = PMX_SSP0_MASK, | ||
283 | .val = PMX_SSP0_MASK, | ||
272 | }, | 284 | }, |
273 | }; | 285 | }; |
274 | 286 | ||
@@ -294,6 +306,10 @@ static struct spear_muxreg ssp0_cs0_muxreg[] = { | |||
294 | .reg = PAD_FUNCTION_EN_2, | 306 | .reg = PAD_FUNCTION_EN_2, |
295 | .mask = PMX_SSP0_CS0_MASK, | 307 | .mask = PMX_SSP0_CS0_MASK, |
296 | .val = PMX_SSP0_CS0_MASK, | 308 | .val = PMX_SSP0_CS0_MASK, |
309 | }, { | ||
310 | .reg = PAD_DIRECTION_SEL_2, | ||
311 | .mask = PMX_SSP0_CS0_MASK, | ||
312 | .val = PMX_SSP0_CS0_MASK, | ||
297 | }, | 313 | }, |
298 | }; | 314 | }; |
299 | 315 | ||
@@ -319,6 +335,10 @@ static struct spear_muxreg ssp0_cs1_2_muxreg[] = { | |||
319 | .reg = PAD_FUNCTION_EN_2, | 335 | .reg = PAD_FUNCTION_EN_2, |
320 | .mask = PMX_SSP0_CS1_2_MASK, | 336 | .mask = PMX_SSP0_CS1_2_MASK, |
321 | .val = PMX_SSP0_CS1_2_MASK, | 337 | .val = PMX_SSP0_CS1_2_MASK, |
338 | }, { | ||
339 | .reg = PAD_DIRECTION_SEL_2, | ||
340 | .mask = PMX_SSP0_CS1_2_MASK, | ||
341 | .val = PMX_SSP0_CS1_2_MASK, | ||
322 | }, | 342 | }, |
323 | }; | 343 | }; |
324 | 344 | ||
@@ -352,6 +372,10 @@ static struct spear_muxreg i2s0_muxreg[] = { | |||
352 | .reg = PAD_FUNCTION_EN_0, | 372 | .reg = PAD_FUNCTION_EN_0, |
353 | .mask = PMX_I2S0_MASK, | 373 | .mask = PMX_I2S0_MASK, |
354 | .val = PMX_I2S0_MASK, | 374 | .val = PMX_I2S0_MASK, |
375 | }, { | ||
376 | .reg = PAD_DIRECTION_SEL_0, | ||
377 | .mask = PMX_I2S0_MASK, | ||
378 | .val = PMX_I2S0_MASK, | ||
355 | }, | 379 | }, |
356 | }; | 380 | }; |
357 | 381 | ||
@@ -384,6 +408,10 @@ static struct spear_muxreg i2s1_muxreg[] = { | |||
384 | .reg = PAD_FUNCTION_EN_1, | 408 | .reg = PAD_FUNCTION_EN_1, |
385 | .mask = PMX_I2S1_MASK, | 409 | .mask = PMX_I2S1_MASK, |
386 | .val = PMX_I2S1_MASK, | 410 | .val = PMX_I2S1_MASK, |
411 | }, { | ||
412 | .reg = PAD_DIRECTION_SEL_1, | ||
413 | .mask = PMX_I2S1_MASK, | ||
414 | .val = PMX_I2S1_MASK, | ||
387 | }, | 415 | }, |
388 | }; | 416 | }; |
389 | 417 | ||
@@ -418,6 +446,10 @@ static struct spear_muxreg clcd_muxreg[] = { | |||
418 | .reg = PAD_FUNCTION_EN_0, | 446 | .reg = PAD_FUNCTION_EN_0, |
419 | .mask = PMX_CLCD1_MASK, | 447 | .mask = PMX_CLCD1_MASK, |
420 | .val = PMX_CLCD1_MASK, | 448 | .val = PMX_CLCD1_MASK, |
449 | }, { | ||
450 | .reg = PAD_DIRECTION_SEL_0, | ||
451 | .mask = PMX_CLCD1_MASK, | ||
452 | .val = PMX_CLCD1_MASK, | ||
421 | }, | 453 | }, |
422 | }; | 454 | }; |
423 | 455 | ||
@@ -443,6 +475,10 @@ static struct spear_muxreg clcd_high_res_muxreg[] = { | |||
443 | .reg = PAD_FUNCTION_EN_1, | 475 | .reg = PAD_FUNCTION_EN_1, |
444 | .mask = PMX_CLCD2_MASK, | 476 | .mask = PMX_CLCD2_MASK, |
445 | .val = PMX_CLCD2_MASK, | 477 | .val = PMX_CLCD2_MASK, |
478 | }, { | ||
479 | .reg = PAD_DIRECTION_SEL_1, | ||
480 | .mask = PMX_CLCD2_MASK, | ||
481 | .val = PMX_CLCD2_MASK, | ||
446 | }, | 482 | }, |
447 | }; | 483 | }; |
448 | 484 | ||
@@ -461,7 +497,7 @@ static struct spear_pingroup clcd_high_res_pingroup = { | |||
461 | .nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux), | 497 | .nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux), |
462 | }; | 498 | }; |
463 | 499 | ||
464 | static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res" }; | 500 | static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res_grp" }; |
465 | static struct spear_function clcd_function = { | 501 | static struct spear_function clcd_function = { |
466 | .name = "clcd", | 502 | .name = "clcd", |
467 | .groups = clcd_grps, | 503 | .groups = clcd_grps, |
@@ -479,6 +515,14 @@ static struct spear_muxreg arm_gpio_muxreg[] = { | |||
479 | .reg = PAD_FUNCTION_EN_1, | 515 | .reg = PAD_FUNCTION_EN_1, |
480 | .mask = PMX_EGPIO_1_GRP_MASK, | 516 | .mask = PMX_EGPIO_1_GRP_MASK, |
481 | .val = PMX_EGPIO_1_GRP_MASK, | 517 | .val = PMX_EGPIO_1_GRP_MASK, |
518 | }, { | ||
519 | .reg = PAD_DIRECTION_SEL_0, | ||
520 | .mask = PMX_EGPIO_0_GRP_MASK, | ||
521 | .val = PMX_EGPIO_0_GRP_MASK, | ||
522 | }, { | ||
523 | .reg = PAD_DIRECTION_SEL_1, | ||
524 | .mask = PMX_EGPIO_1_GRP_MASK, | ||
525 | .val = PMX_EGPIO_1_GRP_MASK, | ||
482 | }, | 526 | }, |
483 | }; | 527 | }; |
484 | 528 | ||
@@ -511,6 +555,10 @@ static struct spear_muxreg smi_2_chips_muxreg[] = { | |||
511 | .reg = PAD_FUNCTION_EN_0, | 555 | .reg = PAD_FUNCTION_EN_0, |
512 | .mask = PMX_SMI_MASK, | 556 | .mask = PMX_SMI_MASK, |
513 | .val = PMX_SMI_MASK, | 557 | .val = PMX_SMI_MASK, |
558 | }, { | ||
559 | .reg = PAD_DIRECTION_SEL_0, | ||
560 | .mask = PMX_SMI_MASK, | ||
561 | .val = PMX_SMI_MASK, | ||
514 | }, | 562 | }, |
515 | }; | 563 | }; |
516 | 564 | ||
@@ -539,6 +587,14 @@ static struct spear_muxreg smi_4_chips_muxreg[] = { | |||
539 | .reg = PAD_FUNCTION_EN_1, | 587 | .reg = PAD_FUNCTION_EN_1, |
540 | .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | 588 | .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, |
541 | .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | 589 | .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, |
590 | }, { | ||
591 | .reg = PAD_DIRECTION_SEL_0, | ||
592 | .mask = PMX_SMI_MASK, | ||
593 | .val = PMX_SMI_MASK, | ||
594 | }, { | ||
595 | .reg = PAD_DIRECTION_SEL_1, | ||
596 | .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | ||
597 | .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | ||
542 | }, | 598 | }, |
543 | }; | 599 | }; |
544 | 600 | ||
@@ -573,6 +629,10 @@ static struct spear_muxreg gmii_muxreg[] = { | |||
573 | .reg = PAD_FUNCTION_EN_0, | 629 | .reg = PAD_FUNCTION_EN_0, |
574 | .mask = PMX_GMII_MASK, | 630 | .mask = PMX_GMII_MASK, |
575 | .val = PMX_GMII_MASK, | 631 | .val = PMX_GMII_MASK, |
632 | }, { | ||
633 | .reg = PAD_DIRECTION_SEL_0, | ||
634 | .mask = PMX_GMII_MASK, | ||
635 | .val = PMX_GMII_MASK, | ||
576 | }, | 636 | }, |
577 | }; | 637 | }; |
578 | 638 | ||
@@ -615,6 +675,18 @@ static struct spear_muxreg rgmii_muxreg[] = { | |||
615 | .reg = PAD_FUNCTION_EN_2, | 675 | .reg = PAD_FUNCTION_EN_2, |
616 | .mask = PMX_RGMII_REG2_MASK, | 676 | .mask = PMX_RGMII_REG2_MASK, |
617 | .val = 0, | 677 | .val = 0, |
678 | }, { | ||
679 | .reg = PAD_DIRECTION_SEL_0, | ||
680 | .mask = PMX_RGMII_REG0_MASK, | ||
681 | .val = PMX_RGMII_REG0_MASK, | ||
682 | }, { | ||
683 | .reg = PAD_DIRECTION_SEL_1, | ||
684 | .mask = PMX_RGMII_REG1_MASK, | ||
685 | .val = PMX_RGMII_REG1_MASK, | ||
686 | }, { | ||
687 | .reg = PAD_DIRECTION_SEL_2, | ||
688 | .mask = PMX_RGMII_REG2_MASK, | ||
689 | .val = PMX_RGMII_REG2_MASK, | ||
618 | }, | 690 | }, |
619 | }; | 691 | }; |
620 | 692 | ||
@@ -649,6 +721,10 @@ static struct spear_muxreg smii_0_1_2_muxreg[] = { | |||
649 | .reg = PAD_FUNCTION_EN_1, | 721 | .reg = PAD_FUNCTION_EN_1, |
650 | .mask = PMX_SMII_0_1_2_MASK, | 722 | .mask = PMX_SMII_0_1_2_MASK, |
651 | .val = 0, | 723 | .val = 0, |
724 | }, { | ||
725 | .reg = PAD_DIRECTION_SEL_1, | ||
726 | .mask = PMX_SMII_0_1_2_MASK, | ||
727 | .val = PMX_SMII_0_1_2_MASK, | ||
652 | }, | 728 | }, |
653 | }; | 729 | }; |
654 | 730 | ||
@@ -681,6 +757,10 @@ static struct spear_muxreg ras_mii_txclk_muxreg[] = { | |||
681 | .reg = PAD_FUNCTION_EN_1, | 757 | .reg = PAD_FUNCTION_EN_1, |
682 | .mask = PMX_NFCE2_MASK, | 758 | .mask = PMX_NFCE2_MASK, |
683 | .val = 0, | 759 | .val = 0, |
760 | }, { | ||
761 | .reg = PAD_DIRECTION_SEL_1, | ||
762 | .mask = PMX_NFCE2_MASK, | ||
763 | .val = PMX_NFCE2_MASK, | ||
684 | }, | 764 | }, |
685 | }; | 765 | }; |
686 | 766 | ||
@@ -721,6 +801,14 @@ static struct spear_muxreg nand_8bit_muxreg[] = { | |||
721 | .reg = PAD_FUNCTION_EN_1, | 801 | .reg = PAD_FUNCTION_EN_1, |
722 | .mask = PMX_NAND8BIT_1_MASK, | 802 | .mask = PMX_NAND8BIT_1_MASK, |
723 | .val = PMX_NAND8BIT_1_MASK, | 803 | .val = PMX_NAND8BIT_1_MASK, |
804 | }, { | ||
805 | .reg = PAD_DIRECTION_SEL_0, | ||
806 | .mask = PMX_NAND8BIT_0_MASK, | ||
807 | .val = PMX_NAND8BIT_0_MASK, | ||
808 | }, { | ||
809 | .reg = PAD_DIRECTION_SEL_1, | ||
810 | .mask = PMX_NAND8BIT_1_MASK, | ||
811 | .val = PMX_NAND8BIT_1_MASK, | ||
724 | }, | 812 | }, |
725 | }; | 813 | }; |
726 | 814 | ||
@@ -747,6 +835,10 @@ static struct spear_muxreg nand_16bit_muxreg[] = { | |||
747 | .reg = PAD_FUNCTION_EN_1, | 835 | .reg = PAD_FUNCTION_EN_1, |
748 | .mask = PMX_NAND16BIT_1_MASK, | 836 | .mask = PMX_NAND16BIT_1_MASK, |
749 | .val = PMX_NAND16BIT_1_MASK, | 837 | .val = PMX_NAND16BIT_1_MASK, |
838 | }, { | ||
839 | .reg = PAD_DIRECTION_SEL_1, | ||
840 | .mask = PMX_NAND16BIT_1_MASK, | ||
841 | .val = PMX_NAND16BIT_1_MASK, | ||
750 | }, | 842 | }, |
751 | }; | 843 | }; |
752 | 844 | ||
@@ -772,6 +864,10 @@ static struct spear_muxreg nand_4_chips_muxreg[] = { | |||
772 | .reg = PAD_FUNCTION_EN_1, | 864 | .reg = PAD_FUNCTION_EN_1, |
773 | .mask = PMX_NAND_4CHIPS_MASK, | 865 | .mask = PMX_NAND_4CHIPS_MASK, |
774 | .val = PMX_NAND_4CHIPS_MASK, | 866 | .val = PMX_NAND_4CHIPS_MASK, |
867 | }, { | ||
868 | .reg = PAD_DIRECTION_SEL_1, | ||
869 | .mask = PMX_NAND_4CHIPS_MASK, | ||
870 | .val = PMX_NAND_4CHIPS_MASK, | ||
775 | }, | 871 | }, |
776 | }; | 872 | }; |
777 | 873 | ||
@@ -833,6 +929,10 @@ static struct spear_muxreg keyboard_rowcol6_8_muxreg[] = { | |||
833 | .reg = PAD_FUNCTION_EN_1, | 929 | .reg = PAD_FUNCTION_EN_1, |
834 | .mask = PMX_KBD_ROWCOL68_MASK, | 930 | .mask = PMX_KBD_ROWCOL68_MASK, |
835 | .val = PMX_KBD_ROWCOL68_MASK, | 931 | .val = PMX_KBD_ROWCOL68_MASK, |
932 | }, { | ||
933 | .reg = PAD_DIRECTION_SEL_1, | ||
934 | .mask = PMX_KBD_ROWCOL68_MASK, | ||
935 | .val = PMX_KBD_ROWCOL68_MASK, | ||
836 | }, | 936 | }, |
837 | }; | 937 | }; |
838 | 938 | ||
@@ -866,6 +966,10 @@ static struct spear_muxreg uart0_muxreg[] = { | |||
866 | .reg = PAD_FUNCTION_EN_0, | 966 | .reg = PAD_FUNCTION_EN_0, |
867 | .mask = PMX_UART0_MASK, | 967 | .mask = PMX_UART0_MASK, |
868 | .val = PMX_UART0_MASK, | 968 | .val = PMX_UART0_MASK, |
969 | }, { | ||
970 | .reg = PAD_DIRECTION_SEL_0, | ||
971 | .mask = PMX_UART0_MASK, | ||
972 | .val = PMX_UART0_MASK, | ||
869 | }, | 973 | }, |
870 | }; | 974 | }; |
871 | 975 | ||
@@ -891,6 +995,10 @@ static struct spear_muxreg uart0_modem_muxreg[] = { | |||
891 | .reg = PAD_FUNCTION_EN_1, | 995 | .reg = PAD_FUNCTION_EN_1, |
892 | .mask = PMX_UART0_MODEM_MASK, | 996 | .mask = PMX_UART0_MODEM_MASK, |
893 | .val = PMX_UART0_MODEM_MASK, | 997 | .val = PMX_UART0_MODEM_MASK, |
998 | }, { | ||
999 | .reg = PAD_DIRECTION_SEL_1, | ||
1000 | .mask = PMX_UART0_MODEM_MASK, | ||
1001 | .val = PMX_UART0_MODEM_MASK, | ||
894 | }, | 1002 | }, |
895 | }; | 1003 | }; |
896 | 1004 | ||
@@ -923,6 +1031,10 @@ static struct spear_muxreg gpt0_tmr0_muxreg[] = { | |||
923 | .reg = PAD_FUNCTION_EN_1, | 1031 | .reg = PAD_FUNCTION_EN_1, |
924 | .mask = PMX_GPT0_TMR0_MASK, | 1032 | .mask = PMX_GPT0_TMR0_MASK, |
925 | .val = PMX_GPT0_TMR0_MASK, | 1033 | .val = PMX_GPT0_TMR0_MASK, |
1034 | }, { | ||
1035 | .reg = PAD_DIRECTION_SEL_1, | ||
1036 | .mask = PMX_GPT0_TMR0_MASK, | ||
1037 | .val = PMX_GPT0_TMR0_MASK, | ||
926 | }, | 1038 | }, |
927 | }; | 1039 | }; |
928 | 1040 | ||
@@ -948,6 +1060,10 @@ static struct spear_muxreg gpt0_tmr1_muxreg[] = { | |||
948 | .reg = PAD_FUNCTION_EN_1, | 1060 | .reg = PAD_FUNCTION_EN_1, |
949 | .mask = PMX_GPT0_TMR1_MASK, | 1061 | .mask = PMX_GPT0_TMR1_MASK, |
950 | .val = PMX_GPT0_TMR1_MASK, | 1062 | .val = PMX_GPT0_TMR1_MASK, |
1063 | }, { | ||
1064 | .reg = PAD_DIRECTION_SEL_1, | ||
1065 | .mask = PMX_GPT0_TMR1_MASK, | ||
1066 | .val = PMX_GPT0_TMR1_MASK, | ||
951 | }, | 1067 | }, |
952 | }; | 1068 | }; |
953 | 1069 | ||
@@ -980,6 +1096,10 @@ static struct spear_muxreg gpt1_tmr0_muxreg[] = { | |||
980 | .reg = PAD_FUNCTION_EN_1, | 1096 | .reg = PAD_FUNCTION_EN_1, |
981 | .mask = PMX_GPT1_TMR0_MASK, | 1097 | .mask = PMX_GPT1_TMR0_MASK, |
982 | .val = PMX_GPT1_TMR0_MASK, | 1098 | .val = PMX_GPT1_TMR0_MASK, |
1099 | }, { | ||
1100 | .reg = PAD_DIRECTION_SEL_1, | ||
1101 | .mask = PMX_GPT1_TMR0_MASK, | ||
1102 | .val = PMX_GPT1_TMR0_MASK, | ||
983 | }, | 1103 | }, |
984 | }; | 1104 | }; |
985 | 1105 | ||
@@ -1005,6 +1125,10 @@ static struct spear_muxreg gpt1_tmr1_muxreg[] = { | |||
1005 | .reg = PAD_FUNCTION_EN_1, | 1125 | .reg = PAD_FUNCTION_EN_1, |
1006 | .mask = PMX_GPT1_TMR1_MASK, | 1126 | .mask = PMX_GPT1_TMR1_MASK, |
1007 | .val = PMX_GPT1_TMR1_MASK, | 1127 | .val = PMX_GPT1_TMR1_MASK, |
1128 | }, { | ||
1129 | .reg = PAD_DIRECTION_SEL_1, | ||
1130 | .mask = PMX_GPT1_TMR1_MASK, | ||
1131 | .val = PMX_GPT1_TMR1_MASK, | ||
1008 | }, | 1132 | }, |
1009 | }; | 1133 | }; |
1010 | 1134 | ||
@@ -1049,6 +1173,20 @@ static const unsigned mcif_pins[] = { 86, 87, 88, 89, 90, 91, 92, 93, 213, 214, | |||
1049 | .reg = PAD_FUNCTION_EN_2, \ | 1173 | .reg = PAD_FUNCTION_EN_2, \ |
1050 | .mask = PMX_MCIFALL_2_MASK, \ | 1174 | .mask = PMX_MCIFALL_2_MASK, \ |
1051 | .val = PMX_MCIFALL_2_MASK, \ | 1175 | .val = PMX_MCIFALL_2_MASK, \ |
1176 | }, { \ | ||
1177 | .reg = PAD_DIRECTION_SEL_0, \ | ||
1178 | .mask = PMX_MCI_DATA8_15_MASK, \ | ||
1179 | .val = PMX_MCI_DATA8_15_MASK, \ | ||
1180 | }, { \ | ||
1181 | .reg = PAD_DIRECTION_SEL_1, \ | ||
1182 | .mask = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \ | ||
1183 | PMX_NFWPRT2_MASK, \ | ||
1184 | .val = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \ | ||
1185 | PMX_NFWPRT2_MASK, \ | ||
1186 | }, { \ | ||
1187 | .reg = PAD_DIRECTION_SEL_2, \ | ||
1188 | .mask = PMX_MCIFALL_2_MASK, \ | ||
1189 | .val = PMX_MCIFALL_2_MASK, \ | ||
1052 | } | 1190 | } |
1053 | 1191 | ||
1054 | /* sdhci device */ | 1192 | /* sdhci device */ |
@@ -1154,6 +1292,10 @@ static struct spear_muxreg touch_xy_muxreg[] = { | |||
1154 | .reg = PAD_FUNCTION_EN_2, | 1292 | .reg = PAD_FUNCTION_EN_2, |
1155 | .mask = PMX_TOUCH_XY_MASK, | 1293 | .mask = PMX_TOUCH_XY_MASK, |
1156 | .val = PMX_TOUCH_XY_MASK, | 1294 | .val = PMX_TOUCH_XY_MASK, |
1295 | }, { | ||
1296 | .reg = PAD_DIRECTION_SEL_2, | ||
1297 | .mask = PMX_TOUCH_XY_MASK, | ||
1298 | .val = PMX_TOUCH_XY_MASK, | ||
1157 | }, | 1299 | }, |
1158 | }; | 1300 | }; |
1159 | 1301 | ||
@@ -1187,6 +1329,10 @@ static struct spear_muxreg uart1_dis_i2c_muxreg[] = { | |||
1187 | .reg = PAD_FUNCTION_EN_0, | 1329 | .reg = PAD_FUNCTION_EN_0, |
1188 | .mask = PMX_I2C0_MASK, | 1330 | .mask = PMX_I2C0_MASK, |
1189 | .val = 0, | 1331 | .val = 0, |
1332 | }, { | ||
1333 | .reg = PAD_DIRECTION_SEL_0, | ||
1334 | .mask = PMX_I2C0_MASK, | ||
1335 | .val = PMX_I2C0_MASK, | ||
1190 | }, | 1336 | }, |
1191 | }; | 1337 | }; |
1192 | 1338 | ||
@@ -1213,6 +1359,12 @@ static struct spear_muxreg uart1_dis_sd_muxreg[] = { | |||
1213 | .mask = PMX_MCIDATA1_MASK | | 1359 | .mask = PMX_MCIDATA1_MASK | |
1214 | PMX_MCIDATA2_MASK, | 1360 | PMX_MCIDATA2_MASK, |
1215 | .val = 0, | 1361 | .val = 0, |
1362 | }, { | ||
1363 | .reg = PAD_DIRECTION_SEL_1, | ||
1364 | .mask = PMX_MCIDATA1_MASK | | ||
1365 | PMX_MCIDATA2_MASK, | ||
1366 | .val = PMX_MCIDATA1_MASK | | ||
1367 | PMX_MCIDATA2_MASK, | ||
1216 | }, | 1368 | }, |
1217 | }; | 1369 | }; |
1218 | 1370 | ||
@@ -1246,6 +1398,10 @@ static struct spear_muxreg uart2_3_muxreg[] = { | |||
1246 | .reg = PAD_FUNCTION_EN_0, | 1398 | .reg = PAD_FUNCTION_EN_0, |
1247 | .mask = PMX_I2S0_MASK, | 1399 | .mask = PMX_I2S0_MASK, |
1248 | .val = 0, | 1400 | .val = 0, |
1401 | }, { | ||
1402 | .reg = PAD_DIRECTION_SEL_0, | ||
1403 | .mask = PMX_I2S0_MASK, | ||
1404 | .val = PMX_I2S0_MASK, | ||
1249 | }, | 1405 | }, |
1250 | }; | 1406 | }; |
1251 | 1407 | ||
@@ -1278,6 +1434,10 @@ static struct spear_muxreg uart4_muxreg[] = { | |||
1278 | .reg = PAD_FUNCTION_EN_0, | 1434 | .reg = PAD_FUNCTION_EN_0, |
1279 | .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, | 1435 | .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, |
1280 | .val = 0, | 1436 | .val = 0, |
1437 | }, { | ||
1438 | .reg = PAD_DIRECTION_SEL_0, | ||
1439 | .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, | ||
1440 | .val = PMX_I2S0_MASK | PMX_CLCD1_MASK, | ||
1281 | }, | 1441 | }, |
1282 | }; | 1442 | }; |
1283 | 1443 | ||
@@ -1310,6 +1470,10 @@ static struct spear_muxreg uart5_muxreg[] = { | |||
1310 | .reg = PAD_FUNCTION_EN_0, | 1470 | .reg = PAD_FUNCTION_EN_0, |
1311 | .mask = PMX_CLCD1_MASK, | 1471 | .mask = PMX_CLCD1_MASK, |
1312 | .val = 0, | 1472 | .val = 0, |
1473 | }, { | ||
1474 | .reg = PAD_DIRECTION_SEL_0, | ||
1475 | .mask = PMX_CLCD1_MASK, | ||
1476 | .val = PMX_CLCD1_MASK, | ||
1313 | }, | 1477 | }, |
1314 | }; | 1478 | }; |
1315 | 1479 | ||
@@ -1344,6 +1508,10 @@ static struct spear_muxreg rs485_0_1_tdm_0_1_muxreg[] = { | |||
1344 | .reg = PAD_FUNCTION_EN_0, | 1508 | .reg = PAD_FUNCTION_EN_0, |
1345 | .mask = PMX_CLCD1_MASK, | 1509 | .mask = PMX_CLCD1_MASK, |
1346 | .val = 0, | 1510 | .val = 0, |
1511 | }, { | ||
1512 | .reg = PAD_DIRECTION_SEL_0, | ||
1513 | .mask = PMX_CLCD1_MASK, | ||
1514 | .val = PMX_CLCD1_MASK, | ||
1347 | }, | 1515 | }, |
1348 | }; | 1516 | }; |
1349 | 1517 | ||
@@ -1376,6 +1544,10 @@ static struct spear_muxreg i2c_1_2_muxreg[] = { | |||
1376 | .reg = PAD_FUNCTION_EN_0, | 1544 | .reg = PAD_FUNCTION_EN_0, |
1377 | .mask = PMX_CLCD1_MASK, | 1545 | .mask = PMX_CLCD1_MASK, |
1378 | .val = 0, | 1546 | .val = 0, |
1547 | }, { | ||
1548 | .reg = PAD_DIRECTION_SEL_0, | ||
1549 | .mask = PMX_CLCD1_MASK, | ||
1550 | .val = PMX_CLCD1_MASK, | ||
1379 | }, | 1551 | }, |
1380 | }; | 1552 | }; |
1381 | 1553 | ||
@@ -1409,6 +1581,10 @@ static struct spear_muxreg i2c3_dis_smi_clcd_muxreg[] = { | |||
1409 | .reg = PAD_FUNCTION_EN_0, | 1581 | .reg = PAD_FUNCTION_EN_0, |
1410 | .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, | 1582 | .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, |
1411 | .val = 0, | 1583 | .val = 0, |
1584 | }, { | ||
1585 | .reg = PAD_DIRECTION_SEL_0, | ||
1586 | .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, | ||
1587 | .val = PMX_CLCD1_MASK | PMX_SMI_MASK, | ||
1412 | }, | 1588 | }, |
1413 | }; | 1589 | }; |
1414 | 1590 | ||
@@ -1435,6 +1611,10 @@ static struct spear_muxreg i2c3_dis_sd_i2s0_muxreg[] = { | |||
1435 | .reg = PAD_FUNCTION_EN_1, | 1611 | .reg = PAD_FUNCTION_EN_1, |
1436 | .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, | 1612 | .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, |
1437 | .val = 0, | 1613 | .val = 0, |
1614 | }, { | ||
1615 | .reg = PAD_DIRECTION_SEL_1, | ||
1616 | .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, | ||
1617 | .val = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, | ||
1438 | }, | 1618 | }, |
1439 | }; | 1619 | }; |
1440 | 1620 | ||
@@ -1469,6 +1649,10 @@ static struct spear_muxreg i2c_4_5_dis_smi_muxreg[] = { | |||
1469 | .reg = PAD_FUNCTION_EN_0, | 1649 | .reg = PAD_FUNCTION_EN_0, |
1470 | .mask = PMX_SMI_MASK, | 1650 | .mask = PMX_SMI_MASK, |
1471 | .val = 0, | 1651 | .val = 0, |
1652 | }, { | ||
1653 | .reg = PAD_DIRECTION_SEL_0, | ||
1654 | .mask = PMX_SMI_MASK, | ||
1655 | .val = PMX_SMI_MASK, | ||
1472 | }, | 1656 | }, |
1473 | }; | 1657 | }; |
1474 | 1658 | ||
@@ -1499,6 +1683,14 @@ static struct spear_muxreg i2c4_dis_sd_muxreg[] = { | |||
1499 | .reg = PAD_FUNCTION_EN_2, | 1683 | .reg = PAD_FUNCTION_EN_2, |
1500 | .mask = PMX_MCIDATA5_MASK, | 1684 | .mask = PMX_MCIDATA5_MASK, |
1501 | .val = 0, | 1685 | .val = 0, |
1686 | }, { | ||
1687 | .reg = PAD_DIRECTION_SEL_1, | ||
1688 | .mask = PMX_MCIDATA4_MASK, | ||
1689 | .val = PMX_MCIDATA4_MASK, | ||
1690 | }, { | ||
1691 | .reg = PAD_DIRECTION_SEL_2, | ||
1692 | .mask = PMX_MCIDATA5_MASK, | ||
1693 | .val = PMX_MCIDATA5_MASK, | ||
1502 | }, | 1694 | }, |
1503 | }; | 1695 | }; |
1504 | 1696 | ||
@@ -1526,6 +1718,12 @@ static struct spear_muxreg i2c5_dis_sd_muxreg[] = { | |||
1526 | .mask = PMX_MCIDATA6_MASK | | 1718 | .mask = PMX_MCIDATA6_MASK | |
1527 | PMX_MCIDATA7_MASK, | 1719 | PMX_MCIDATA7_MASK, |
1528 | .val = 0, | 1720 | .val = 0, |
1721 | }, { | ||
1722 | .reg = PAD_DIRECTION_SEL_2, | ||
1723 | .mask = PMX_MCIDATA6_MASK | | ||
1724 | PMX_MCIDATA7_MASK, | ||
1725 | .val = PMX_MCIDATA6_MASK | | ||
1726 | PMX_MCIDATA7_MASK, | ||
1529 | }, | 1727 | }, |
1530 | }; | 1728 | }; |
1531 | 1729 | ||
@@ -1560,6 +1758,10 @@ static struct spear_muxreg i2c_6_7_dis_kbd_muxreg[] = { | |||
1560 | .reg = PAD_FUNCTION_EN_1, | 1758 | .reg = PAD_FUNCTION_EN_1, |
1561 | .mask = PMX_KBD_ROWCOL25_MASK, | 1759 | .mask = PMX_KBD_ROWCOL25_MASK, |
1562 | .val = 0, | 1760 | .val = 0, |
1761 | }, { | ||
1762 | .reg = PAD_DIRECTION_SEL_1, | ||
1763 | .mask = PMX_KBD_ROWCOL25_MASK, | ||
1764 | .val = PMX_KBD_ROWCOL25_MASK, | ||
1563 | }, | 1765 | }, |
1564 | }; | 1766 | }; |
1565 | 1767 | ||
@@ -1587,6 +1789,12 @@ static struct spear_muxreg i2c6_dis_sd_muxreg[] = { | |||
1587 | .mask = PMX_MCIIORDRE_MASK | | 1789 | .mask = PMX_MCIIORDRE_MASK | |
1588 | PMX_MCIIOWRWE_MASK, | 1790 | PMX_MCIIOWRWE_MASK, |
1589 | .val = 0, | 1791 | .val = 0, |
1792 | }, { | ||
1793 | .reg = PAD_DIRECTION_SEL_2, | ||
1794 | .mask = PMX_MCIIORDRE_MASK | | ||
1795 | PMX_MCIIOWRWE_MASK, | ||
1796 | .val = PMX_MCIIORDRE_MASK | | ||
1797 | PMX_MCIIOWRWE_MASK, | ||
1590 | }, | 1798 | }, |
1591 | }; | 1799 | }; |
1592 | 1800 | ||
@@ -1613,6 +1821,12 @@ static struct spear_muxreg i2c7_dis_sd_muxreg[] = { | |||
1613 | .mask = PMX_MCIRESETCF_MASK | | 1821 | .mask = PMX_MCIRESETCF_MASK | |
1614 | PMX_MCICS0CE_MASK, | 1822 | PMX_MCICS0CE_MASK, |
1615 | .val = 0, | 1823 | .val = 0, |
1824 | }, { | ||
1825 | .reg = PAD_DIRECTION_SEL_2, | ||
1826 | .mask = PMX_MCIRESETCF_MASK | | ||
1827 | PMX_MCICS0CE_MASK, | ||
1828 | .val = PMX_MCIRESETCF_MASK | | ||
1829 | PMX_MCICS0CE_MASK, | ||
1616 | }, | 1830 | }, |
1617 | }; | 1831 | }; |
1618 | 1832 | ||
@@ -1651,6 +1865,14 @@ static struct spear_muxreg can0_dis_nor_muxreg[] = { | |||
1651 | .reg = PAD_FUNCTION_EN_1, | 1865 | .reg = PAD_FUNCTION_EN_1, |
1652 | .mask = PMX_NFRSTPWDWN3_MASK, | 1866 | .mask = PMX_NFRSTPWDWN3_MASK, |
1653 | .val = 0, | 1867 | .val = 0, |
1868 | }, { | ||
1869 | .reg = PAD_DIRECTION_SEL_0, | ||
1870 | .mask = PMX_NFRSTPWDWN2_MASK, | ||
1871 | .val = PMX_NFRSTPWDWN2_MASK, | ||
1872 | }, { | ||
1873 | .reg = PAD_DIRECTION_SEL_1, | ||
1874 | .mask = PMX_NFRSTPWDWN3_MASK, | ||
1875 | .val = PMX_NFRSTPWDWN3_MASK, | ||
1654 | }, | 1876 | }, |
1655 | }; | 1877 | }; |
1656 | 1878 | ||
@@ -1677,6 +1899,10 @@ static struct spear_muxreg can0_dis_sd_muxreg[] = { | |||
1677 | .reg = PAD_FUNCTION_EN_2, | 1899 | .reg = PAD_FUNCTION_EN_2, |
1678 | .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, | 1900 | .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, |
1679 | .val = 0, | 1901 | .val = 0, |
1902 | }, { | ||
1903 | .reg = PAD_DIRECTION_SEL_2, | ||
1904 | .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, | ||
1905 | .val = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, | ||
1680 | }, | 1906 | }, |
1681 | }; | 1907 | }; |
1682 | 1908 | ||
@@ -1711,6 +1937,10 @@ static struct spear_muxreg can1_dis_sd_muxreg[] = { | |||
1711 | .reg = PAD_FUNCTION_EN_2, | 1937 | .reg = PAD_FUNCTION_EN_2, |
1712 | .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, | 1938 | .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, |
1713 | .val = 0, | 1939 | .val = 0, |
1940 | }, { | ||
1941 | .reg = PAD_DIRECTION_SEL_2, | ||
1942 | .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, | ||
1943 | .val = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, | ||
1714 | }, | 1944 | }, |
1715 | }; | 1945 | }; |
1716 | 1946 | ||
@@ -1737,6 +1967,10 @@ static struct spear_muxreg can1_dis_kbd_muxreg[] = { | |||
1737 | .reg = PAD_FUNCTION_EN_1, | 1967 | .reg = PAD_FUNCTION_EN_1, |
1738 | .mask = PMX_KBD_ROWCOL25_MASK, | 1968 | .mask = PMX_KBD_ROWCOL25_MASK, |
1739 | .val = 0, | 1969 | .val = 0, |
1970 | }, { | ||
1971 | .reg = PAD_DIRECTION_SEL_1, | ||
1972 | .mask = PMX_KBD_ROWCOL25_MASK, | ||
1973 | .val = PMX_KBD_ROWCOL25_MASK, | ||
1740 | }, | 1974 | }, |
1741 | }; | 1975 | }; |
1742 | 1976 | ||
@@ -1763,29 +1997,64 @@ static struct spear_function can1_function = { | |||
1763 | .ngroups = ARRAY_SIZE(can1_grps), | 1997 | .ngroups = ARRAY_SIZE(can1_grps), |
1764 | }; | 1998 | }; |
1765 | 1999 | ||
1766 | /* Pad multiplexing for pci device */ | 2000 | /* Pad multiplexing for (ras-ip) pci device */ |
1767 | static const unsigned pci_sata_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18, | 2001 | static const unsigned pci_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18, |
1768 | 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, | 2002 | 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, |
1769 | 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, | 2003 | 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, |
1770 | 55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 }; | 2004 | 55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 }; |
1771 | #define PCI_SATA_MUXREG \ | ||
1772 | { \ | ||
1773 | .reg = PAD_FUNCTION_EN_0, \ | ||
1774 | .mask = PMX_MCI_DATA8_15_MASK, \ | ||
1775 | .val = 0, \ | ||
1776 | }, { \ | ||
1777 | .reg = PAD_FUNCTION_EN_1, \ | ||
1778 | .mask = PMX_PCI_REG1_MASK, \ | ||
1779 | .val = 0, \ | ||
1780 | }, { \ | ||
1781 | .reg = PAD_FUNCTION_EN_2, \ | ||
1782 | .mask = PMX_PCI_REG2_MASK, \ | ||
1783 | .val = 0, \ | ||
1784 | } | ||
1785 | 2005 | ||
1786 | /* pad multiplexing for pcie0 device */ | 2006 | static struct spear_muxreg pci_muxreg[] = { |
2007 | { | ||
2008 | .reg = PAD_FUNCTION_EN_0, | ||
2009 | .mask = PMX_MCI_DATA8_15_MASK, | ||
2010 | .val = 0, | ||
2011 | }, { | ||
2012 | .reg = PAD_FUNCTION_EN_1, | ||
2013 | .mask = PMX_PCI_REG1_MASK, | ||
2014 | .val = 0, | ||
2015 | }, { | ||
2016 | .reg = PAD_FUNCTION_EN_2, | ||
2017 | .mask = PMX_PCI_REG2_MASK, | ||
2018 | .val = 0, | ||
2019 | }, { | ||
2020 | .reg = PAD_DIRECTION_SEL_0, | ||
2021 | .mask = PMX_MCI_DATA8_15_MASK, | ||
2022 | .val = PMX_MCI_DATA8_15_MASK, | ||
2023 | }, { | ||
2024 | .reg = PAD_DIRECTION_SEL_1, | ||
2025 | .mask = PMX_PCI_REG1_MASK, | ||
2026 | .val = PMX_PCI_REG1_MASK, | ||
2027 | }, { | ||
2028 | .reg = PAD_DIRECTION_SEL_2, | ||
2029 | .mask = PMX_PCI_REG2_MASK, | ||
2030 | .val = PMX_PCI_REG2_MASK, | ||
2031 | }, | ||
2032 | }; | ||
2033 | |||
2034 | static struct spear_modemux pci_modemux[] = { | ||
2035 | { | ||
2036 | .muxregs = pci_muxreg, | ||
2037 | .nmuxregs = ARRAY_SIZE(pci_muxreg), | ||
2038 | }, | ||
2039 | }; | ||
2040 | |||
2041 | static struct spear_pingroup pci_pingroup = { | ||
2042 | .name = "pci_grp", | ||
2043 | .pins = pci_pins, | ||
2044 | .npins = ARRAY_SIZE(pci_pins), | ||
2045 | .modemuxs = pci_modemux, | ||
2046 | .nmodemuxs = ARRAY_SIZE(pci_modemux), | ||
2047 | }; | ||
2048 | |||
2049 | static const char *const pci_grps[] = { "pci_grp" }; | ||
2050 | static struct spear_function pci_function = { | ||
2051 | .name = "pci", | ||
2052 | .groups = pci_grps, | ||
2053 | .ngroups = ARRAY_SIZE(pci_grps), | ||
2054 | }; | ||
2055 | |||
2056 | /* pad multiplexing for (fix-part) pcie0 device */ | ||
1787 | static struct spear_muxreg pcie0_muxreg[] = { | 2057 | static struct spear_muxreg pcie0_muxreg[] = { |
1788 | PCI_SATA_MUXREG, | ||
1789 | { | 2058 | { |
1790 | .reg = PCIE_SATA_CFG, | 2059 | .reg = PCIE_SATA_CFG, |
1791 | .mask = PCIE_CFG_VAL(0), | 2060 | .mask = PCIE_CFG_VAL(0), |
@@ -1802,15 +2071,12 @@ static struct spear_modemux pcie0_modemux[] = { | |||
1802 | 2071 | ||
1803 | static struct spear_pingroup pcie0_pingroup = { | 2072 | static struct spear_pingroup pcie0_pingroup = { |
1804 | .name = "pcie0_grp", | 2073 | .name = "pcie0_grp", |
1805 | .pins = pci_sata_pins, | ||
1806 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1807 | .modemuxs = pcie0_modemux, | 2074 | .modemuxs = pcie0_modemux, |
1808 | .nmodemuxs = ARRAY_SIZE(pcie0_modemux), | 2075 | .nmodemuxs = ARRAY_SIZE(pcie0_modemux), |
1809 | }; | 2076 | }; |
1810 | 2077 | ||
1811 | /* pad multiplexing for pcie1 device */ | 2078 | /* pad multiplexing for (fix-part) pcie1 device */ |
1812 | static struct spear_muxreg pcie1_muxreg[] = { | 2079 | static struct spear_muxreg pcie1_muxreg[] = { |
1813 | PCI_SATA_MUXREG, | ||
1814 | { | 2080 | { |
1815 | .reg = PCIE_SATA_CFG, | 2081 | .reg = PCIE_SATA_CFG, |
1816 | .mask = PCIE_CFG_VAL(1), | 2082 | .mask = PCIE_CFG_VAL(1), |
@@ -1827,15 +2093,12 @@ static struct spear_modemux pcie1_modemux[] = { | |||
1827 | 2093 | ||
1828 | static struct spear_pingroup pcie1_pingroup = { | 2094 | static struct spear_pingroup pcie1_pingroup = { |
1829 | .name = "pcie1_grp", | 2095 | .name = "pcie1_grp", |
1830 | .pins = pci_sata_pins, | ||
1831 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1832 | .modemuxs = pcie1_modemux, | 2096 | .modemuxs = pcie1_modemux, |
1833 | .nmodemuxs = ARRAY_SIZE(pcie1_modemux), | 2097 | .nmodemuxs = ARRAY_SIZE(pcie1_modemux), |
1834 | }; | 2098 | }; |
1835 | 2099 | ||
1836 | /* pad multiplexing for pcie2 device */ | 2100 | /* pad multiplexing for (fix-part) pcie2 device */ |
1837 | static struct spear_muxreg pcie2_muxreg[] = { | 2101 | static struct spear_muxreg pcie2_muxreg[] = { |
1838 | PCI_SATA_MUXREG, | ||
1839 | { | 2102 | { |
1840 | .reg = PCIE_SATA_CFG, | 2103 | .reg = PCIE_SATA_CFG, |
1841 | .mask = PCIE_CFG_VAL(2), | 2104 | .mask = PCIE_CFG_VAL(2), |
@@ -1852,22 +2115,20 @@ static struct spear_modemux pcie2_modemux[] = { | |||
1852 | 2115 | ||
1853 | static struct spear_pingroup pcie2_pingroup = { | 2116 | static struct spear_pingroup pcie2_pingroup = { |
1854 | .name = "pcie2_grp", | 2117 | .name = "pcie2_grp", |
1855 | .pins = pci_sata_pins, | ||
1856 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1857 | .modemuxs = pcie2_modemux, | 2118 | .modemuxs = pcie2_modemux, |
1858 | .nmodemuxs = ARRAY_SIZE(pcie2_modemux), | 2119 | .nmodemuxs = ARRAY_SIZE(pcie2_modemux), |
1859 | }; | 2120 | }; |
1860 | 2121 | ||
1861 | static const char *const pci_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" }; | 2122 | static const char *const pcie_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" |
1862 | static struct spear_function pci_function = { | 2123 | }; |
1863 | .name = "pci", | 2124 | static struct spear_function pcie_function = { |
1864 | .groups = pci_grps, | 2125 | .name = "pci_express", |
1865 | .ngroups = ARRAY_SIZE(pci_grps), | 2126 | .groups = pcie_grps, |
2127 | .ngroups = ARRAY_SIZE(pcie_grps), | ||
1866 | }; | 2128 | }; |
1867 | 2129 | ||
1868 | /* pad multiplexing for sata0 device */ | 2130 | /* pad multiplexing for sata0 device */ |
1869 | static struct spear_muxreg sata0_muxreg[] = { | 2131 | static struct spear_muxreg sata0_muxreg[] = { |
1870 | PCI_SATA_MUXREG, | ||
1871 | { | 2132 | { |
1872 | .reg = PCIE_SATA_CFG, | 2133 | .reg = PCIE_SATA_CFG, |
1873 | .mask = SATA_CFG_VAL(0), | 2134 | .mask = SATA_CFG_VAL(0), |
@@ -1884,15 +2145,12 @@ static struct spear_modemux sata0_modemux[] = { | |||
1884 | 2145 | ||
1885 | static struct spear_pingroup sata0_pingroup = { | 2146 | static struct spear_pingroup sata0_pingroup = { |
1886 | .name = "sata0_grp", | 2147 | .name = "sata0_grp", |
1887 | .pins = pci_sata_pins, | ||
1888 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1889 | .modemuxs = sata0_modemux, | 2148 | .modemuxs = sata0_modemux, |
1890 | .nmodemuxs = ARRAY_SIZE(sata0_modemux), | 2149 | .nmodemuxs = ARRAY_SIZE(sata0_modemux), |
1891 | }; | 2150 | }; |
1892 | 2151 | ||
1893 | /* pad multiplexing for sata1 device */ | 2152 | /* pad multiplexing for sata1 device */ |
1894 | static struct spear_muxreg sata1_muxreg[] = { | 2153 | static struct spear_muxreg sata1_muxreg[] = { |
1895 | PCI_SATA_MUXREG, | ||
1896 | { | 2154 | { |
1897 | .reg = PCIE_SATA_CFG, | 2155 | .reg = PCIE_SATA_CFG, |
1898 | .mask = SATA_CFG_VAL(1), | 2156 | .mask = SATA_CFG_VAL(1), |
@@ -1909,15 +2167,12 @@ static struct spear_modemux sata1_modemux[] = { | |||
1909 | 2167 | ||
1910 | static struct spear_pingroup sata1_pingroup = { | 2168 | static struct spear_pingroup sata1_pingroup = { |
1911 | .name = "sata1_grp", | 2169 | .name = "sata1_grp", |
1912 | .pins = pci_sata_pins, | ||
1913 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1914 | .modemuxs = sata1_modemux, | 2170 | .modemuxs = sata1_modemux, |
1915 | .nmodemuxs = ARRAY_SIZE(sata1_modemux), | 2171 | .nmodemuxs = ARRAY_SIZE(sata1_modemux), |
1916 | }; | 2172 | }; |
1917 | 2173 | ||
1918 | /* pad multiplexing for sata2 device */ | 2174 | /* pad multiplexing for sata2 device */ |
1919 | static struct spear_muxreg sata2_muxreg[] = { | 2175 | static struct spear_muxreg sata2_muxreg[] = { |
1920 | PCI_SATA_MUXREG, | ||
1921 | { | 2176 | { |
1922 | .reg = PCIE_SATA_CFG, | 2177 | .reg = PCIE_SATA_CFG, |
1923 | .mask = SATA_CFG_VAL(2), | 2178 | .mask = SATA_CFG_VAL(2), |
@@ -1934,8 +2189,6 @@ static struct spear_modemux sata2_modemux[] = { | |||
1934 | 2189 | ||
1935 | static struct spear_pingroup sata2_pingroup = { | 2190 | static struct spear_pingroup sata2_pingroup = { |
1936 | .name = "sata2_grp", | 2191 | .name = "sata2_grp", |
1937 | .pins = pci_sata_pins, | ||
1938 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1939 | .modemuxs = sata2_modemux, | 2192 | .modemuxs = sata2_modemux, |
1940 | .nmodemuxs = ARRAY_SIZE(sata2_modemux), | 2193 | .nmodemuxs = ARRAY_SIZE(sata2_modemux), |
1941 | }; | 2194 | }; |
@@ -1957,6 +2210,14 @@ static struct spear_muxreg ssp1_dis_kbd_muxreg[] = { | |||
1957 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | | 2210 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | |
1958 | PMX_NFCE2_MASK, | 2211 | PMX_NFCE2_MASK, |
1959 | .val = 0, | 2212 | .val = 0, |
2213 | }, { | ||
2214 | .reg = PAD_DIRECTION_SEL_1, | ||
2215 | .mask = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK | | ||
2216 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | | ||
2217 | PMX_NFCE2_MASK, | ||
2218 | .val = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK | | ||
2219 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | | ||
2220 | PMX_NFCE2_MASK, | ||
1960 | }, | 2221 | }, |
1961 | }; | 2222 | }; |
1962 | 2223 | ||
@@ -1983,6 +2244,12 @@ static struct spear_muxreg ssp1_dis_sd_muxreg[] = { | |||
1983 | .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | | 2244 | .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | |
1984 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, | 2245 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, |
1985 | .val = 0, | 2246 | .val = 0, |
2247 | }, { | ||
2248 | .reg = PAD_DIRECTION_SEL_2, | ||
2249 | .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | | ||
2250 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, | ||
2251 | .val = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | | ||
2252 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, | ||
1986 | }, | 2253 | }, |
1987 | }; | 2254 | }; |
1988 | 2255 | ||
@@ -2017,6 +2284,12 @@ static struct spear_muxreg gpt64_muxreg[] = { | |||
2017 | .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK | 2284 | .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK |
2018 | | PMX_MCILEDS_MASK, | 2285 | | PMX_MCILEDS_MASK, |
2019 | .val = 0, | 2286 | .val = 0, |
2287 | }, { | ||
2288 | .reg = PAD_DIRECTION_SEL_2, | ||
2289 | .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK | ||
2290 | | PMX_MCILEDS_MASK, | ||
2291 | .val = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK | ||
2292 | | PMX_MCILEDS_MASK, | ||
2020 | }, | 2293 | }, |
2021 | }; | 2294 | }; |
2022 | 2295 | ||
@@ -2093,6 +2366,7 @@ static struct spear_pingroup *spear1310_pingroups[] = { | |||
2093 | &can0_dis_sd_pingroup, | 2366 | &can0_dis_sd_pingroup, |
2094 | &can1_dis_sd_pingroup, | 2367 | &can1_dis_sd_pingroup, |
2095 | &can1_dis_kbd_pingroup, | 2368 | &can1_dis_kbd_pingroup, |
2369 | &pci_pingroup, | ||
2096 | &pcie0_pingroup, | 2370 | &pcie0_pingroup, |
2097 | &pcie1_pingroup, | 2371 | &pcie1_pingroup, |
2098 | &pcie2_pingroup, | 2372 | &pcie2_pingroup, |
@@ -2138,6 +2412,7 @@ static struct spear_function *spear1310_functions[] = { | |||
2138 | &can0_function, | 2412 | &can0_function, |
2139 | &can1_function, | 2413 | &can1_function, |
2140 | &pci_function, | 2414 | &pci_function, |
2415 | &pcie_function, | ||
2141 | &sata_function, | 2416 | &sata_function, |
2142 | &ssp1_function, | 2417 | &ssp1_function, |
2143 | &gpt64_function, | 2418 | &gpt64_function, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear1340.c b/drivers/pinctrl/spear/pinctrl-spear1340.c index a0eb057e55bd..0606b8cf3f2c 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1340.c +++ b/drivers/pinctrl/spear/pinctrl-spear1340.c | |||
@@ -213,7 +213,7 @@ static const struct pinctrl_pin_desc spear1340_pins[] = { | |||
213 | * Pad multiplexing for making all pads as gpio's. This is done to override the | 213 | * Pad multiplexing for making all pads as gpio's. This is done to override the |
214 | * values passed from bootloader and start from scratch. | 214 | * values passed from bootloader and start from scratch. |
215 | */ | 215 | */ |
216 | static const unsigned pads_as_gpio_pins[] = { 251 }; | 216 | static const unsigned pads_as_gpio_pins[] = { 12, 88, 89, 251 }; |
217 | static struct spear_muxreg pads_as_gpio_muxreg[] = { | 217 | static struct spear_muxreg pads_as_gpio_muxreg[] = { |
218 | { | 218 | { |
219 | .reg = PAD_FUNCTION_EN_1, | 219 | .reg = PAD_FUNCTION_EN_1, |
@@ -1692,7 +1692,43 @@ static struct spear_pingroup clcd_pingroup = { | |||
1692 | .nmodemuxs = ARRAY_SIZE(clcd_modemux), | 1692 | .nmodemuxs = ARRAY_SIZE(clcd_modemux), |
1693 | }; | 1693 | }; |
1694 | 1694 | ||
1695 | static const char *const clcd_grps[] = { "clcd_grp" }; | 1695 | /* Disable cld runtime to save panel damage */ |
1696 | static struct spear_muxreg clcd_sleep_muxreg[] = { | ||
1697 | { | ||
1698 | .reg = PAD_SHARED_IP_EN_1, | ||
1699 | .mask = ARM_TRACE_MASK | MIPHY_DBG_MASK, | ||
1700 | .val = 0, | ||
1701 | }, { | ||
1702 | .reg = PAD_FUNCTION_EN_5, | ||
1703 | .mask = CLCD_REG4_MASK | CLCD_AND_ARM_TRACE_REG4_MASK, | ||
1704 | .val = 0x0, | ||
1705 | }, { | ||
1706 | .reg = PAD_FUNCTION_EN_6, | ||
1707 | .mask = CLCD_AND_ARM_TRACE_REG5_MASK, | ||
1708 | .val = 0x0, | ||
1709 | }, { | ||
1710 | .reg = PAD_FUNCTION_EN_7, | ||
1711 | .mask = CLCD_AND_ARM_TRACE_REG6_MASK, | ||
1712 | .val = 0x0, | ||
1713 | }, | ||
1714 | }; | ||
1715 | |||
1716 | static struct spear_modemux clcd_sleep_modemux[] = { | ||
1717 | { | ||
1718 | .muxregs = clcd_sleep_muxreg, | ||
1719 | .nmuxregs = ARRAY_SIZE(clcd_sleep_muxreg), | ||
1720 | }, | ||
1721 | }; | ||
1722 | |||
1723 | static struct spear_pingroup clcd_sleep_pingroup = { | ||
1724 | .name = "clcd_sleep_grp", | ||
1725 | .pins = clcd_pins, | ||
1726 | .npins = ARRAY_SIZE(clcd_pins), | ||
1727 | .modemuxs = clcd_sleep_modemux, | ||
1728 | .nmodemuxs = ARRAY_SIZE(clcd_sleep_modemux), | ||
1729 | }; | ||
1730 | |||
1731 | static const char *const clcd_grps[] = { "clcd_grp", "clcd_sleep_grp" }; | ||
1696 | static struct spear_function clcd_function = { | 1732 | static struct spear_function clcd_function = { |
1697 | .name = "clcd", | 1733 | .name = "clcd", |
1698 | .groups = clcd_grps, | 1734 | .groups = clcd_grps, |
@@ -1893,6 +1929,7 @@ static struct spear_pingroup *spear1340_pingroups[] = { | |||
1893 | &sdhci_pingroup, | 1929 | &sdhci_pingroup, |
1894 | &cf_pingroup, | 1930 | &cf_pingroup, |
1895 | &xd_pingroup, | 1931 | &xd_pingroup, |
1932 | &clcd_sleep_pingroup, | ||
1896 | &clcd_pingroup, | 1933 | &clcd_pingroup, |
1897 | &arm_trace_pingroup, | 1934 | &arm_trace_pingroup, |
1898 | &miphy_dbg_pingroup, | 1935 | &miphy_dbg_pingroup, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear320.c b/drivers/pinctrl/spear/pinctrl-spear320.c index 020b1e0bdb3e..ca47b0e50780 100644 --- a/drivers/pinctrl/spear/pinctrl-spear320.c +++ b/drivers/pinctrl/spear/pinctrl-spear320.c | |||
@@ -2240,6 +2240,10 @@ static struct spear_muxreg pwm2_pin_34_muxreg[] = { | |||
2240 | .mask = PMX_SSP_CS_MASK, | 2240 | .mask = PMX_SSP_CS_MASK, |
2241 | .val = 0, | 2241 | .val = 0, |
2242 | }, { | 2242 | }, { |
2243 | .reg = MODE_CONFIG_REG, | ||
2244 | .mask = PMX_PWM_MASK, | ||
2245 | .val = PMX_PWM_MASK, | ||
2246 | }, { | ||
2243 | .reg = IP_SEL_PAD_30_39_REG, | 2247 | .reg = IP_SEL_PAD_30_39_REG, |
2244 | .mask = PMX_PL_34_MASK, | 2248 | .mask = PMX_PL_34_MASK, |
2245 | .val = PMX_PWM2_PL_34_VAL, | 2249 | .val = PMX_PWM2_PL_34_VAL, |
@@ -2956,9 +2960,9 @@ static struct spear_function mii2_function = { | |||
2956 | }; | 2960 | }; |
2957 | 2961 | ||
2958 | /* Pad multiplexing for cadence mii 1_2 as smii or rmii device */ | 2962 | /* Pad multiplexing for cadence mii 1_2 as smii or rmii device */ |
2959 | static const unsigned smii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20, | 2963 | static const unsigned rmii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20, |
2960 | 21, 22, 23, 24, 25, 26, 27 }; | 2964 | 21, 22, 23, 24, 25, 26, 27 }; |
2961 | static const unsigned rmii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 }; | 2965 | static const unsigned smii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 }; |
2962 | static struct spear_muxreg mii0_1_muxreg[] = { | 2966 | static struct spear_muxreg mii0_1_muxreg[] = { |
2963 | { | 2967 | { |
2964 | .reg = PMX_CONFIG_REG, | 2968 | .reg = PMX_CONFIG_REG, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear3xx.h b/drivers/pinctrl/spear/pinctrl-spear3xx.h index 31f44347f17c..7860b36053c4 100644 --- a/drivers/pinctrl/spear/pinctrl-spear3xx.h +++ b/drivers/pinctrl/spear/pinctrl-spear3xx.h | |||
@@ -15,6 +15,7 @@ | |||
15 | #include "pinctrl-spear.h" | 15 | #include "pinctrl-spear.h" |
16 | 16 | ||
17 | /* pad mux declarations */ | 17 | /* pad mux declarations */ |
18 | #define PMX_PWM_MASK (1 << 16) | ||
18 | #define PMX_FIRDA_MASK (1 << 14) | 19 | #define PMX_FIRDA_MASK (1 << 14) |
19 | #define PMX_I2C_MASK (1 << 13) | 20 | #define PMX_I2C_MASK (1 << 13) |
20 | #define PMX_SSP_CS_MASK (1 << 12) | 21 | #define PMX_SSP_CS_MASK (1 << 12) |
diff --git a/drivers/s390/cio/css.h b/drivers/s390/cio/css.h index 33bb4d891e16..4af3dfe70ef5 100644 --- a/drivers/s390/cio/css.h +++ b/drivers/s390/cio/css.h | |||
@@ -112,9 +112,6 @@ extern int for_each_subchannel(int(*fn)(struct subchannel_id, void *), void *); | |||
112 | extern void css_reiterate_subchannels(void); | 112 | extern void css_reiterate_subchannels(void); |
113 | void css_update_ssd_info(struct subchannel *sch); | 113 | void css_update_ssd_info(struct subchannel *sch); |
114 | 114 | ||
115 | #define __MAX_SUBCHANNEL 65535 | ||
116 | #define __MAX_SSID 3 | ||
117 | |||
118 | struct channel_subsystem { | 115 | struct channel_subsystem { |
119 | u8 cssid; | 116 | u8 cssid; |
120 | int valid; | 117 | int valid; |
diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c index fc916f5d7314..fd3143c291c6 100644 --- a/drivers/s390/cio/device.c +++ b/drivers/s390/cio/device.c | |||
@@ -1424,7 +1424,7 @@ static enum io_sch_action sch_get_action(struct subchannel *sch) | |||
1424 | } | 1424 | } |
1425 | if (device_is_disconnected(cdev)) | 1425 | if (device_is_disconnected(cdev)) |
1426 | return IO_SCH_REPROBE; | 1426 | return IO_SCH_REPROBE; |
1427 | if (cdev->online) | 1427 | if (cdev->online && !cdev->private->flags.resuming) |
1428 | return IO_SCH_VERIFY; | 1428 | return IO_SCH_VERIFY; |
1429 | if (cdev->private->state == DEV_STATE_NOT_OPER) | 1429 | if (cdev->private->state == DEV_STATE_NOT_OPER) |
1430 | return IO_SCH_UNREG_ATTACH; | 1430 | return IO_SCH_UNREG_ATTACH; |
@@ -1469,12 +1469,6 @@ static int io_subchannel_sch_event(struct subchannel *sch, int process) | |||
1469 | rc = 0; | 1469 | rc = 0; |
1470 | goto out_unlock; | 1470 | goto out_unlock; |
1471 | case IO_SCH_VERIFY: | 1471 | case IO_SCH_VERIFY: |
1472 | if (cdev->private->flags.resuming == 1) { | ||
1473 | if (cio_enable_subchannel(sch, (u32)(addr_t)sch)) { | ||
1474 | ccw_device_set_notoper(cdev); | ||
1475 | break; | ||
1476 | } | ||
1477 | } | ||
1478 | /* Trigger path verification. */ | 1472 | /* Trigger path verification. */ |
1479 | io_subchannel_verify(sch); | 1473 | io_subchannel_verify(sch); |
1480 | rc = 0; | 1474 | rc = 0; |
diff --git a/drivers/s390/cio/idset.c b/drivers/s390/cio/idset.c index 199bc6791177..65d13e38803f 100644 --- a/drivers/s390/cio/idset.c +++ b/drivers/s390/cio/idset.c | |||
@@ -125,8 +125,7 @@ int idset_is_empty(struct idset *set) | |||
125 | 125 | ||
126 | void idset_add_set(struct idset *to, struct idset *from) | 126 | void idset_add_set(struct idset *to, struct idset *from) |
127 | { | 127 | { |
128 | int len = min(__BITOPS_WORDS(to->num_ssid * to->num_id), | 128 | int len = min(to->num_ssid * to->num_id, from->num_ssid * from->num_id); |
129 | __BITOPS_WORDS(from->num_ssid * from->num_id)); | ||
130 | 129 | ||
131 | bitmap_or(to->bitmap, to->bitmap, from->bitmap, len); | 130 | bitmap_or(to->bitmap, to->bitmap, from->bitmap, len); |
132 | } | 131 | } |
diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c index bd4708a422cd..20fd974f903a 100644 --- a/drivers/scsi/qla2xxx/qla_mid.c +++ b/drivers/scsi/qla2xxx/qla_mid.c | |||
@@ -149,6 +149,7 @@ qla2x00_mark_vp_devices_dead(scsi_qla_host_t *vha) | |||
149 | int | 149 | int |
150 | qla24xx_disable_vp(scsi_qla_host_t *vha) | 150 | qla24xx_disable_vp(scsi_qla_host_t *vha) |
151 | { | 151 | { |
152 | unsigned long flags; | ||
152 | int ret; | 153 | int ret; |
153 | 154 | ||
154 | ret = qla24xx_control_vp(vha, VCE_COMMAND_DISABLE_VPS_LOGO_ALL); | 155 | ret = qla24xx_control_vp(vha, VCE_COMMAND_DISABLE_VPS_LOGO_ALL); |
@@ -156,7 +157,9 @@ qla24xx_disable_vp(scsi_qla_host_t *vha) | |||
156 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | 157 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
157 | 158 | ||
158 | /* Remove port id from vp target map */ | 159 | /* Remove port id from vp target map */ |
160 | spin_lock_irqsave(&vha->hw->vport_slock, flags); | ||
159 | qlt_update_vp_map(vha, RESET_AL_PA); | 161 | qlt_update_vp_map(vha, RESET_AL_PA); |
162 | spin_unlock_irqrestore(&vha->hw->vport_slock, flags); | ||
160 | 163 | ||
161 | qla2x00_mark_vp_devices_dead(vha); | 164 | qla2x00_mark_vp_devices_dead(vha); |
162 | atomic_set(&vha->vp_state, VP_FAILED); | 165 | atomic_set(&vha->vp_state, VP_FAILED); |
diff --git a/drivers/scsi/qla2xxx/qla_target.c b/drivers/scsi/qla2xxx/qla_target.c index 0e09d8f433d1..62aa5584f644 100644 --- a/drivers/scsi/qla2xxx/qla_target.c +++ b/drivers/scsi/qla2xxx/qla_target.c | |||
@@ -557,6 +557,7 @@ static bool qlt_check_fcport_exist(struct scsi_qla_host *vha, | |||
557 | int pmap_len; | 557 | int pmap_len; |
558 | fc_port_t *fcport; | 558 | fc_port_t *fcport; |
559 | int global_resets; | 559 | int global_resets; |
560 | unsigned long flags; | ||
560 | 561 | ||
561 | retry: | 562 | retry: |
562 | global_resets = atomic_read(&ha->tgt.qla_tgt->tgt_global_resets_count); | 563 | global_resets = atomic_read(&ha->tgt.qla_tgt->tgt_global_resets_count); |
@@ -625,10 +626,10 @@ retry: | |||
625 | sess->s_id.b.area, sess->loop_id, fcport->d_id.b.domain, | 626 | sess->s_id.b.area, sess->loop_id, fcport->d_id.b.domain, |
626 | fcport->d_id.b.al_pa, fcport->d_id.b.area, fcport->loop_id); | 627 | fcport->d_id.b.al_pa, fcport->d_id.b.area, fcport->loop_id); |
627 | 628 | ||
628 | sess->s_id = fcport->d_id; | 629 | spin_lock_irqsave(&ha->hardware_lock, flags); |
629 | sess->loop_id = fcport->loop_id; | 630 | ha->tgt.tgt_ops->update_sess(sess, fcport->d_id, fcport->loop_id, |
630 | sess->conf_compl_supported = !!(fcport->flags & | 631 | (fcport->flags & FCF_CONF_COMP_SUPPORTED)); |
631 | FCF_CONF_COMP_SUPPORTED); | 632 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
632 | 633 | ||
633 | res = true; | 634 | res = true; |
634 | 635 | ||
@@ -740,10 +741,9 @@ static struct qla_tgt_sess *qlt_create_sess( | |||
740 | qlt_undelete_sess(sess); | 741 | qlt_undelete_sess(sess); |
741 | 742 | ||
742 | kref_get(&sess->se_sess->sess_kref); | 743 | kref_get(&sess->se_sess->sess_kref); |
743 | sess->s_id = fcport->d_id; | 744 | ha->tgt.tgt_ops->update_sess(sess, fcport->d_id, fcport->loop_id, |
744 | sess->loop_id = fcport->loop_id; | 745 | (fcport->flags & FCF_CONF_COMP_SUPPORTED)); |
745 | sess->conf_compl_supported = !!(fcport->flags & | 746 | |
746 | FCF_CONF_COMP_SUPPORTED); | ||
747 | if (sess->local && !local) | 747 | if (sess->local && !local) |
748 | sess->local = 0; | 748 | sess->local = 0; |
749 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 749 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
@@ -796,8 +796,7 @@ static struct qla_tgt_sess *qlt_create_sess( | |||
796 | */ | 796 | */ |
797 | kref_get(&sess->se_sess->sess_kref); | 797 | kref_get(&sess->se_sess->sess_kref); |
798 | 798 | ||
799 | sess->conf_compl_supported = !!(fcport->flags & | 799 | sess->conf_compl_supported = (fcport->flags & FCF_CONF_COMP_SUPPORTED); |
800 | FCF_CONF_COMP_SUPPORTED); | ||
801 | BUILD_BUG_ON(sizeof(sess->port_name) != sizeof(fcport->port_name)); | 800 | BUILD_BUG_ON(sizeof(sess->port_name) != sizeof(fcport->port_name)); |
802 | memcpy(sess->port_name, fcport->port_name, sizeof(sess->port_name)); | 801 | memcpy(sess->port_name, fcport->port_name, sizeof(sess->port_name)); |
803 | 802 | ||
@@ -869,10 +868,8 @@ void qlt_fc_port_added(struct scsi_qla_host *vha, fc_port_t *fcport) | |||
869 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf007, | 868 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf007, |
870 | "Reappeared sess %p\n", sess); | 869 | "Reappeared sess %p\n", sess); |
871 | } | 870 | } |
872 | sess->s_id = fcport->d_id; | 871 | ha->tgt.tgt_ops->update_sess(sess, fcport->d_id, fcport->loop_id, |
873 | sess->loop_id = fcport->loop_id; | 872 | (fcport->flags & FCF_CONF_COMP_SUPPORTED)); |
874 | sess->conf_compl_supported = !!(fcport->flags & | ||
875 | FCF_CONF_COMP_SUPPORTED); | ||
876 | } | 873 | } |
877 | 874 | ||
878 | if (sess && sess->local) { | 875 | if (sess && sess->local) { |
diff --git a/drivers/scsi/qla2xxx/qla_target.h b/drivers/scsi/qla2xxx/qla_target.h index 170af1571214..bad749561ec2 100644 --- a/drivers/scsi/qla2xxx/qla_target.h +++ b/drivers/scsi/qla2xxx/qla_target.h | |||
@@ -648,6 +648,7 @@ struct qla_tgt_func_tmpl { | |||
648 | 648 | ||
649 | int (*check_initiator_node_acl)(struct scsi_qla_host *, unsigned char *, | 649 | int (*check_initiator_node_acl)(struct scsi_qla_host *, unsigned char *, |
650 | void *, uint8_t *, uint16_t); | 650 | void *, uint8_t *, uint16_t); |
651 | void (*update_sess)(struct qla_tgt_sess *, port_id_t, uint16_t, bool); | ||
651 | struct qla_tgt_sess *(*find_sess_by_loop_id)(struct scsi_qla_host *, | 652 | struct qla_tgt_sess *(*find_sess_by_loop_id)(struct scsi_qla_host *, |
652 | const uint16_t); | 653 | const uint16_t); |
653 | struct qla_tgt_sess *(*find_sess_by_s_id)(struct scsi_qla_host *, | 654 | struct qla_tgt_sess *(*find_sess_by_s_id)(struct scsi_qla_host *, |
diff --git a/drivers/scsi/qla2xxx/tcm_qla2xxx.c b/drivers/scsi/qla2xxx/tcm_qla2xxx.c index 2358c16c4c8e..3d74f2f39ae1 100644 --- a/drivers/scsi/qla2xxx/tcm_qla2xxx.c +++ b/drivers/scsi/qla2xxx/tcm_qla2xxx.c | |||
@@ -237,7 +237,7 @@ static char *tcm_qla2xxx_get_fabric_wwn(struct se_portal_group *se_tpg) | |||
237 | struct tcm_qla2xxx_tpg, se_tpg); | 237 | struct tcm_qla2xxx_tpg, se_tpg); |
238 | struct tcm_qla2xxx_lport *lport = tpg->lport; | 238 | struct tcm_qla2xxx_lport *lport = tpg->lport; |
239 | 239 | ||
240 | return &lport->lport_name[0]; | 240 | return lport->lport_naa_name; |
241 | } | 241 | } |
242 | 242 | ||
243 | static char *tcm_qla2xxx_npiv_get_fabric_wwn(struct se_portal_group *se_tpg) | 243 | static char *tcm_qla2xxx_npiv_get_fabric_wwn(struct se_portal_group *se_tpg) |
@@ -1457,6 +1457,78 @@ static int tcm_qla2xxx_check_initiator_node_acl( | |||
1457 | return 0; | 1457 | return 0; |
1458 | } | 1458 | } |
1459 | 1459 | ||
1460 | static void tcm_qla2xxx_update_sess(struct qla_tgt_sess *sess, port_id_t s_id, | ||
1461 | uint16_t loop_id, bool conf_compl_supported) | ||
1462 | { | ||
1463 | struct qla_tgt *tgt = sess->tgt; | ||
1464 | struct qla_hw_data *ha = tgt->ha; | ||
1465 | struct tcm_qla2xxx_lport *lport = ha->tgt.target_lport_ptr; | ||
1466 | struct se_node_acl *se_nacl = sess->se_sess->se_node_acl; | ||
1467 | struct tcm_qla2xxx_nacl *nacl = container_of(se_nacl, | ||
1468 | struct tcm_qla2xxx_nacl, se_node_acl); | ||
1469 | u32 key; | ||
1470 | |||
1471 | |||
1472 | if (sess->loop_id != loop_id || sess->s_id.b24 != s_id.b24) | ||
1473 | pr_info("Updating session %p from port %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x loop_id %d -> %d s_id %x:%x:%x -> %x:%x:%x\n", | ||
1474 | sess, | ||
1475 | sess->port_name[0], sess->port_name[1], | ||
1476 | sess->port_name[2], sess->port_name[3], | ||
1477 | sess->port_name[4], sess->port_name[5], | ||
1478 | sess->port_name[6], sess->port_name[7], | ||
1479 | sess->loop_id, loop_id, | ||
1480 | sess->s_id.b.domain, sess->s_id.b.area, sess->s_id.b.al_pa, | ||
1481 | s_id.b.domain, s_id.b.area, s_id.b.al_pa); | ||
1482 | |||
1483 | if (sess->loop_id != loop_id) { | ||
1484 | /* | ||
1485 | * Because we can shuffle loop IDs around and we | ||
1486 | * update different sessions non-atomically, we might | ||
1487 | * have overwritten this session's old loop ID | ||
1488 | * already, and we might end up overwriting some other | ||
1489 | * session that will be updated later. So we have to | ||
1490 | * be extra careful and we can't warn about those things... | ||
1491 | */ | ||
1492 | if (lport->lport_loopid_map[sess->loop_id].se_nacl == se_nacl) | ||
1493 | lport->lport_loopid_map[sess->loop_id].se_nacl = NULL; | ||
1494 | |||
1495 | lport->lport_loopid_map[loop_id].se_nacl = se_nacl; | ||
1496 | |||
1497 | sess->loop_id = loop_id; | ||
1498 | } | ||
1499 | |||
1500 | if (sess->s_id.b24 != s_id.b24) { | ||
1501 | key = (((u32) sess->s_id.b.domain << 16) | | ||
1502 | ((u32) sess->s_id.b.area << 8) | | ||
1503 | ((u32) sess->s_id.b.al_pa)); | ||
1504 | |||
1505 | if (btree_lookup32(&lport->lport_fcport_map, key)) | ||
1506 | WARN(btree_remove32(&lport->lport_fcport_map, key) != se_nacl, | ||
1507 | "Found wrong se_nacl when updating s_id %x:%x:%x\n", | ||
1508 | sess->s_id.b.domain, sess->s_id.b.area, sess->s_id.b.al_pa); | ||
1509 | else | ||
1510 | WARN(1, "No lport_fcport_map entry for s_id %x:%x:%x\n", | ||
1511 | sess->s_id.b.domain, sess->s_id.b.area, sess->s_id.b.al_pa); | ||
1512 | |||
1513 | key = (((u32) s_id.b.domain << 16) | | ||
1514 | ((u32) s_id.b.area << 8) | | ||
1515 | ((u32) s_id.b.al_pa)); | ||
1516 | |||
1517 | if (btree_lookup32(&lport->lport_fcport_map, key)) { | ||
1518 | WARN(1, "Already have lport_fcport_map entry for s_id %x:%x:%x\n", | ||
1519 | s_id.b.domain, s_id.b.area, s_id.b.al_pa); | ||
1520 | btree_update32(&lport->lport_fcport_map, key, se_nacl); | ||
1521 | } else { | ||
1522 | btree_insert32(&lport->lport_fcport_map, key, se_nacl, GFP_ATOMIC); | ||
1523 | } | ||
1524 | |||
1525 | sess->s_id = s_id; | ||
1526 | nacl->nport_id = key; | ||
1527 | } | ||
1528 | |||
1529 | sess->conf_compl_supported = conf_compl_supported; | ||
1530 | } | ||
1531 | |||
1460 | /* | 1532 | /* |
1461 | * Calls into tcm_qla2xxx used by qla2xxx LLD I/O path. | 1533 | * Calls into tcm_qla2xxx used by qla2xxx LLD I/O path. |
1462 | */ | 1534 | */ |
@@ -1467,6 +1539,7 @@ static struct qla_tgt_func_tmpl tcm_qla2xxx_template = { | |||
1467 | .free_cmd = tcm_qla2xxx_free_cmd, | 1539 | .free_cmd = tcm_qla2xxx_free_cmd, |
1468 | .free_mcmd = tcm_qla2xxx_free_mcmd, | 1540 | .free_mcmd = tcm_qla2xxx_free_mcmd, |
1469 | .free_session = tcm_qla2xxx_free_session, | 1541 | .free_session = tcm_qla2xxx_free_session, |
1542 | .update_sess = tcm_qla2xxx_update_sess, | ||
1470 | .check_initiator_node_acl = tcm_qla2xxx_check_initiator_node_acl, | 1543 | .check_initiator_node_acl = tcm_qla2xxx_check_initiator_node_acl, |
1471 | .find_sess_by_s_id = tcm_qla2xxx_find_sess_by_s_id, | 1544 | .find_sess_by_s_id = tcm_qla2xxx_find_sess_by_s_id, |
1472 | .find_sess_by_loop_id = tcm_qla2xxx_find_sess_by_loop_id, | 1545 | .find_sess_by_loop_id = tcm_qla2xxx_find_sess_by_loop_id, |
@@ -1534,6 +1607,7 @@ static struct se_wwn *tcm_qla2xxx_make_lport( | |||
1534 | lport->lport_wwpn = wwpn; | 1607 | lport->lport_wwpn = wwpn; |
1535 | tcm_qla2xxx_format_wwn(&lport->lport_name[0], TCM_QLA2XXX_NAMELEN, | 1608 | tcm_qla2xxx_format_wwn(&lport->lport_name[0], TCM_QLA2XXX_NAMELEN, |
1536 | wwpn); | 1609 | wwpn); |
1610 | sprintf(lport->lport_naa_name, "naa.%016llx", (unsigned long long) wwpn); | ||
1537 | 1611 | ||
1538 | ret = tcm_qla2xxx_init_lport(lport); | 1612 | ret = tcm_qla2xxx_init_lport(lport); |
1539 | if (ret != 0) | 1613 | if (ret != 0) |
@@ -1601,6 +1675,7 @@ static struct se_wwn *tcm_qla2xxx_npiv_make_lport( | |||
1601 | lport->lport_npiv_wwnn = npiv_wwnn; | 1675 | lport->lport_npiv_wwnn = npiv_wwnn; |
1602 | tcm_qla2xxx_npiv_format_wwn(&lport->lport_npiv_name[0], | 1676 | tcm_qla2xxx_npiv_format_wwn(&lport->lport_npiv_name[0], |
1603 | TCM_QLA2XXX_NAMELEN, npiv_wwpn, npiv_wwnn); | 1677 | TCM_QLA2XXX_NAMELEN, npiv_wwpn, npiv_wwnn); |
1678 | sprintf(lport->lport_naa_name, "naa.%016llx", (unsigned long long) npiv_wwpn); | ||
1604 | 1679 | ||
1605 | /* FIXME: tcm_qla2xxx_npiv_make_lport */ | 1680 | /* FIXME: tcm_qla2xxx_npiv_make_lport */ |
1606 | ret = -ENOSYS; | 1681 | ret = -ENOSYS; |
diff --git a/drivers/scsi/qla2xxx/tcm_qla2xxx.h b/drivers/scsi/qla2xxx/tcm_qla2xxx.h index 825498103352..9ba075fe9781 100644 --- a/drivers/scsi/qla2xxx/tcm_qla2xxx.h +++ b/drivers/scsi/qla2xxx/tcm_qla2xxx.h | |||
@@ -61,6 +61,8 @@ struct tcm_qla2xxx_lport { | |||
61 | u64 lport_npiv_wwnn; | 61 | u64 lport_npiv_wwnn; |
62 | /* ASCII formatted WWPN for FC Target Lport */ | 62 | /* ASCII formatted WWPN for FC Target Lport */ |
63 | char lport_name[TCM_QLA2XXX_NAMELEN]; | 63 | char lport_name[TCM_QLA2XXX_NAMELEN]; |
64 | /* ASCII formatted naa WWPN for VPD page 83 etc */ | ||
65 | char lport_naa_name[TCM_QLA2XXX_NAMELEN]; | ||
64 | /* ASCII formatted WWPN+WWNN for NPIV FC Target Lport */ | 66 | /* ASCII formatted WWPN+WWNN for NPIV FC Target Lport */ |
65 | char lport_npiv_name[TCM_QLA2XXX_NPIV_NAMELEN]; | 67 | char lport_npiv_name[TCM_QLA2XXX_NPIV_NAMELEN]; |
66 | /* map for fc_port pointers in 24-bit FC Port ID space */ | 68 | /* map for fc_port pointers in 24-bit FC Port ID space */ |
diff --git a/drivers/scsi/qlogicpti.c b/drivers/scsi/qlogicpti.c index b191dd549207..71fddbc60f18 100644 --- a/drivers/scsi/qlogicpti.c +++ b/drivers/scsi/qlogicpti.c | |||
@@ -1294,26 +1294,19 @@ static struct scsi_host_template qpti_template = { | |||
1294 | static const struct of_device_id qpti_match[]; | 1294 | static const struct of_device_id qpti_match[]; |
1295 | static int __devinit qpti_sbus_probe(struct platform_device *op) | 1295 | static int __devinit qpti_sbus_probe(struct platform_device *op) |
1296 | { | 1296 | { |
1297 | const struct of_device_id *match; | ||
1298 | struct scsi_host_template *tpnt; | ||
1299 | struct device_node *dp = op->dev.of_node; | 1297 | struct device_node *dp = op->dev.of_node; |
1300 | struct Scsi_Host *host; | 1298 | struct Scsi_Host *host; |
1301 | struct qlogicpti *qpti; | 1299 | struct qlogicpti *qpti; |
1302 | static int nqptis; | 1300 | static int nqptis; |
1303 | const char *fcode; | 1301 | const char *fcode; |
1304 | 1302 | ||
1305 | match = of_match_device(qpti_match, &op->dev); | ||
1306 | if (!match) | ||
1307 | return -EINVAL; | ||
1308 | tpnt = match->data; | ||
1309 | |||
1310 | /* Sometimes Antares cards come up not completely | 1303 | /* Sometimes Antares cards come up not completely |
1311 | * setup, and we get a report of a zero IRQ. | 1304 | * setup, and we get a report of a zero IRQ. |
1312 | */ | 1305 | */ |
1313 | if (op->archdata.irqs[0] == 0) | 1306 | if (op->archdata.irqs[0] == 0) |
1314 | return -ENODEV; | 1307 | return -ENODEV; |
1315 | 1308 | ||
1316 | host = scsi_host_alloc(tpnt, sizeof(struct qlogicpti)); | 1309 | host = scsi_host_alloc(&qpti_template, sizeof(struct qlogicpti)); |
1317 | if (!host) | 1310 | if (!host) |
1318 | return -ENOMEM; | 1311 | return -ENOMEM; |
1319 | 1312 | ||
@@ -1445,19 +1438,15 @@ static int __devexit qpti_sbus_remove(struct platform_device *op) | |||
1445 | static const struct of_device_id qpti_match[] = { | 1438 | static const struct of_device_id qpti_match[] = { |
1446 | { | 1439 | { |
1447 | .name = "ptisp", | 1440 | .name = "ptisp", |
1448 | .data = &qpti_template, | ||
1449 | }, | 1441 | }, |
1450 | { | 1442 | { |
1451 | .name = "PTI,ptisp", | 1443 | .name = "PTI,ptisp", |
1452 | .data = &qpti_template, | ||
1453 | }, | 1444 | }, |
1454 | { | 1445 | { |
1455 | .name = "QLGC,isp", | 1446 | .name = "QLGC,isp", |
1456 | .data = &qpti_template, | ||
1457 | }, | 1447 | }, |
1458 | { | 1448 | { |
1459 | .name = "SUNW,isp", | 1449 | .name = "SUNW,isp", |
1460 | .data = &qpti_template, | ||
1461 | }, | 1450 | }, |
1462 | {}, | 1451 | {}, |
1463 | }; | 1452 | }; |
diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c index 07e9fb4f8041..b3dc44146ca0 100644 --- a/drivers/sh/clk/cpg.c +++ b/drivers/sh/clk/cpg.c | |||
@@ -361,3 +361,89 @@ int __init sh_clk_div4_reparent_register(struct clk *clks, int nr, | |||
361 | return sh_clk_div_register_ops(clks, nr, table, | 361 | return sh_clk_div_register_ops(clks, nr, table, |
362 | &sh_clk_div4_reparent_clk_ops); | 362 | &sh_clk_div4_reparent_clk_ops); |
363 | } | 363 | } |
364 | |||
365 | /* FSI-DIV */ | ||
366 | static unsigned long fsidiv_recalc(struct clk *clk) | ||
367 | { | ||
368 | u32 value; | ||
369 | |||
370 | value = __raw_readl(clk->mapping->base); | ||
371 | |||
372 | value >>= 16; | ||
373 | if (value < 2) | ||
374 | return clk->parent->rate; | ||
375 | |||
376 | return clk->parent->rate / value; | ||
377 | } | ||
378 | |||
379 | static long fsidiv_round_rate(struct clk *clk, unsigned long rate) | ||
380 | { | ||
381 | return clk_rate_div_range_round(clk, 1, 0xffff, rate); | ||
382 | } | ||
383 | |||
384 | static void fsidiv_disable(struct clk *clk) | ||
385 | { | ||
386 | __raw_writel(0, clk->mapping->base); | ||
387 | } | ||
388 | |||
389 | static int fsidiv_enable(struct clk *clk) | ||
390 | { | ||
391 | u32 value; | ||
392 | |||
393 | value = __raw_readl(clk->mapping->base) >> 16; | ||
394 | if (value < 2) | ||
395 | return 0; | ||
396 | |||
397 | __raw_writel((value << 16) | 0x3, clk->mapping->base); | ||
398 | |||
399 | return 0; | ||
400 | } | ||
401 | |||
402 | static int fsidiv_set_rate(struct clk *clk, unsigned long rate) | ||
403 | { | ||
404 | u32 val; | ||
405 | int idx; | ||
406 | |||
407 | idx = (clk->parent->rate / rate) & 0xffff; | ||
408 | if (idx < 2) | ||
409 | __raw_writel(0, clk->mapping->base); | ||
410 | else | ||
411 | __raw_writel(idx << 16, clk->mapping->base); | ||
412 | |||
413 | return 0; | ||
414 | } | ||
415 | |||
416 | static struct sh_clk_ops fsidiv_clk_ops = { | ||
417 | .recalc = fsidiv_recalc, | ||
418 | .round_rate = fsidiv_round_rate, | ||
419 | .set_rate = fsidiv_set_rate, | ||
420 | .enable = fsidiv_enable, | ||
421 | .disable = fsidiv_disable, | ||
422 | }; | ||
423 | |||
424 | int __init sh_clk_fsidiv_register(struct clk *clks, int nr) | ||
425 | { | ||
426 | struct clk_mapping *map; | ||
427 | int i; | ||
428 | |||
429 | for (i = 0; i < nr; i++) { | ||
430 | |||
431 | map = kzalloc(sizeof(struct clk_mapping), GFP_KERNEL); | ||
432 | if (!map) { | ||
433 | pr_err("%s: unable to alloc memory\n", __func__); | ||
434 | return -ENOMEM; | ||
435 | } | ||
436 | |||
437 | /* clks[i].enable_reg came from SH_CLK_FSIDIV() */ | ||
438 | map->phys = (phys_addr_t)clks[i].enable_reg; | ||
439 | map->len = 8; | ||
440 | |||
441 | clks[i].enable_reg = 0; /* remove .enable_reg */ | ||
442 | clks[i].ops = &fsidiv_clk_ops; | ||
443 | clks[i].mapping = map; | ||
444 | |||
445 | clk_register(&clks[i]); | ||
446 | } | ||
447 | |||
448 | return 0; | ||
449 | } | ||
diff --git a/drivers/target/iscsi/iscsi_target.c b/drivers/target/iscsi/iscsi_target.c index d6ce2182e672..035c2c762537 100644 --- a/drivers/target/iscsi/iscsi_target.c +++ b/drivers/target/iscsi/iscsi_target.c | |||
@@ -3719,7 +3719,9 @@ restart: | |||
3719 | */ | 3719 | */ |
3720 | iscsit_thread_check_cpumask(conn, current, 1); | 3720 | iscsit_thread_check_cpumask(conn, current, 1); |
3721 | 3721 | ||
3722 | schedule_timeout_interruptible(MAX_SCHEDULE_TIMEOUT); | 3722 | wait_event_interruptible(conn->queues_wq, |
3723 | !iscsit_conn_all_queues_empty(conn) || | ||
3724 | ts->status == ISCSI_THREAD_SET_RESET); | ||
3723 | 3725 | ||
3724 | if ((ts->status == ISCSI_THREAD_SET_RESET) || | 3726 | if ((ts->status == ISCSI_THREAD_SET_RESET) || |
3725 | signal_pending(current)) | 3727 | signal_pending(current)) |
diff --git a/drivers/target/iscsi/iscsi_target_core.h b/drivers/target/iscsi/iscsi_target_core.h index 2ba9f9b9435c..21048dbf7d13 100644 --- a/drivers/target/iscsi/iscsi_target_core.h +++ b/drivers/target/iscsi/iscsi_target_core.h | |||
@@ -486,6 +486,7 @@ struct iscsi_tmr_req { | |||
486 | }; | 486 | }; |
487 | 487 | ||
488 | struct iscsi_conn { | 488 | struct iscsi_conn { |
489 | wait_queue_head_t queues_wq; | ||
489 | /* Authentication Successful for this connection */ | 490 | /* Authentication Successful for this connection */ |
490 | u8 auth_complete; | 491 | u8 auth_complete; |
491 | /* State connection is currently in */ | 492 | /* State connection is currently in */ |
diff --git a/drivers/target/iscsi/iscsi_target_login.c b/drivers/target/iscsi/iscsi_target_login.c index cdc8a10939c3..f8dbec05d5e5 100644 --- a/drivers/target/iscsi/iscsi_target_login.c +++ b/drivers/target/iscsi/iscsi_target_login.c | |||
@@ -41,6 +41,7 @@ | |||
41 | 41 | ||
42 | static int iscsi_login_init_conn(struct iscsi_conn *conn) | 42 | static int iscsi_login_init_conn(struct iscsi_conn *conn) |
43 | { | 43 | { |
44 | init_waitqueue_head(&conn->queues_wq); | ||
44 | INIT_LIST_HEAD(&conn->conn_list); | 45 | INIT_LIST_HEAD(&conn->conn_list); |
45 | INIT_LIST_HEAD(&conn->conn_cmd_list); | 46 | INIT_LIST_HEAD(&conn->conn_cmd_list); |
46 | INIT_LIST_HEAD(&conn->immed_queue_list); | 47 | INIT_LIST_HEAD(&conn->immed_queue_list); |
diff --git a/drivers/target/iscsi/iscsi_target_util.c b/drivers/target/iscsi/iscsi_target_util.c index afd98ccd40ae..1a91195ab619 100644 --- a/drivers/target/iscsi/iscsi_target_util.c +++ b/drivers/target/iscsi/iscsi_target_util.c | |||
@@ -488,7 +488,7 @@ void iscsit_add_cmd_to_immediate_queue( | |||
488 | atomic_set(&conn->check_immediate_queue, 1); | 488 | atomic_set(&conn->check_immediate_queue, 1); |
489 | spin_unlock_bh(&conn->immed_queue_lock); | 489 | spin_unlock_bh(&conn->immed_queue_lock); |
490 | 490 | ||
491 | wake_up_process(conn->thread_set->tx_thread); | 491 | wake_up(&conn->queues_wq); |
492 | } | 492 | } |
493 | 493 | ||
494 | struct iscsi_queue_req *iscsit_get_cmd_from_immediate_queue(struct iscsi_conn *conn) | 494 | struct iscsi_queue_req *iscsit_get_cmd_from_immediate_queue(struct iscsi_conn *conn) |
@@ -562,7 +562,7 @@ void iscsit_add_cmd_to_response_queue( | |||
562 | atomic_inc(&cmd->response_queue_count); | 562 | atomic_inc(&cmd->response_queue_count); |
563 | spin_unlock_bh(&conn->response_queue_lock); | 563 | spin_unlock_bh(&conn->response_queue_lock); |
564 | 564 | ||
565 | wake_up_process(conn->thread_set->tx_thread); | 565 | wake_up(&conn->queues_wq); |
566 | } | 566 | } |
567 | 567 | ||
568 | struct iscsi_queue_req *iscsit_get_cmd_from_response_queue(struct iscsi_conn *conn) | 568 | struct iscsi_queue_req *iscsit_get_cmd_from_response_queue(struct iscsi_conn *conn) |
@@ -616,6 +616,24 @@ static void iscsit_remove_cmd_from_response_queue( | |||
616 | } | 616 | } |
617 | } | 617 | } |
618 | 618 | ||
619 | bool iscsit_conn_all_queues_empty(struct iscsi_conn *conn) | ||
620 | { | ||
621 | bool empty; | ||
622 | |||
623 | spin_lock_bh(&conn->immed_queue_lock); | ||
624 | empty = list_empty(&conn->immed_queue_list); | ||
625 | spin_unlock_bh(&conn->immed_queue_lock); | ||
626 | |||
627 | if (!empty) | ||
628 | return empty; | ||
629 | |||
630 | spin_lock_bh(&conn->response_queue_lock); | ||
631 | empty = list_empty(&conn->response_queue_list); | ||
632 | spin_unlock_bh(&conn->response_queue_lock); | ||
633 | |||
634 | return empty; | ||
635 | } | ||
636 | |||
619 | void iscsit_free_queue_reqs_for_conn(struct iscsi_conn *conn) | 637 | void iscsit_free_queue_reqs_for_conn(struct iscsi_conn *conn) |
620 | { | 638 | { |
621 | struct iscsi_queue_req *qr, *qr_tmp; | 639 | struct iscsi_queue_req *qr, *qr_tmp; |
diff --git a/drivers/target/iscsi/iscsi_target_util.h b/drivers/target/iscsi/iscsi_target_util.h index 44054bd35437..894d0f837924 100644 --- a/drivers/target/iscsi/iscsi_target_util.h +++ b/drivers/target/iscsi/iscsi_target_util.h | |||
@@ -25,6 +25,7 @@ extern struct iscsi_queue_req *iscsit_get_cmd_from_immediate_queue(struct iscsi_ | |||
25 | extern void iscsit_add_cmd_to_response_queue(struct iscsi_cmd *, struct iscsi_conn *, u8); | 25 | extern void iscsit_add_cmd_to_response_queue(struct iscsi_cmd *, struct iscsi_conn *, u8); |
26 | extern struct iscsi_queue_req *iscsit_get_cmd_from_response_queue(struct iscsi_conn *); | 26 | extern struct iscsi_queue_req *iscsit_get_cmd_from_response_queue(struct iscsi_conn *); |
27 | extern void iscsit_remove_cmd_from_tx_queues(struct iscsi_cmd *, struct iscsi_conn *); | 27 | extern void iscsit_remove_cmd_from_tx_queues(struct iscsi_cmd *, struct iscsi_conn *); |
28 | extern bool iscsit_conn_all_queues_empty(struct iscsi_conn *); | ||
28 | extern void iscsit_free_queue_reqs_for_conn(struct iscsi_conn *); | 29 | extern void iscsit_free_queue_reqs_for_conn(struct iscsi_conn *); |
29 | extern void iscsit_release_cmd(struct iscsi_cmd *); | 30 | extern void iscsit_release_cmd(struct iscsi_cmd *); |
30 | extern void iscsit_free_cmd(struct iscsi_cmd *); | 31 | extern void iscsit_free_cmd(struct iscsi_cmd *); |
diff --git a/drivers/target/target_core_configfs.c b/drivers/target/target_core_configfs.c index 015f5be27bf6..c123327499a3 100644 --- a/drivers/target/target_core_configfs.c +++ b/drivers/target/target_core_configfs.c | |||
@@ -3206,7 +3206,8 @@ static int __init target_core_init_configfs(void) | |||
3206 | if (ret < 0) | 3206 | if (ret < 0) |
3207 | goto out; | 3207 | goto out; |
3208 | 3208 | ||
3209 | if (core_dev_setup_virtual_lun0() < 0) | 3209 | ret = core_dev_setup_virtual_lun0(); |
3210 | if (ret < 0) | ||
3210 | goto out; | 3211 | goto out; |
3211 | 3212 | ||
3212 | return 0; | 3213 | return 0; |
diff --git a/drivers/target/target_core_device.c b/drivers/target/target_core_device.c index 8d774da16320..9abef9f8eb76 100644 --- a/drivers/target/target_core_device.c +++ b/drivers/target/target_core_device.c | |||
@@ -850,20 +850,20 @@ int se_dev_check_shutdown(struct se_device *dev) | |||
850 | 850 | ||
851 | static u32 se_dev_align_max_sectors(u32 max_sectors, u32 block_size) | 851 | static u32 se_dev_align_max_sectors(u32 max_sectors, u32 block_size) |
852 | { | 852 | { |
853 | u32 tmp, aligned_max_sectors; | 853 | u32 aligned_max_sectors; |
854 | u32 alignment; | ||
854 | /* | 855 | /* |
855 | * Limit max_sectors to a PAGE_SIZE aligned value for modern | 856 | * Limit max_sectors to a PAGE_SIZE aligned value for modern |
856 | * transport_allocate_data_tasks() operation. | 857 | * transport_allocate_data_tasks() operation. |
857 | */ | 858 | */ |
858 | tmp = rounddown((max_sectors * block_size), PAGE_SIZE); | 859 | alignment = max(1ul, PAGE_SIZE / block_size); |
859 | aligned_max_sectors = (tmp / block_size); | 860 | aligned_max_sectors = rounddown(max_sectors, alignment); |
860 | if (max_sectors != aligned_max_sectors) { | 861 | |
861 | printk(KERN_INFO "Rounding down aligned max_sectors from %u" | 862 | if (max_sectors != aligned_max_sectors) |
862 | " to %u\n", max_sectors, aligned_max_sectors); | 863 | pr_info("Rounding down aligned max_sectors from %u to %u\n", |
863 | return aligned_max_sectors; | 864 | max_sectors, aligned_max_sectors); |
864 | } | ||
865 | 865 | ||
866 | return max_sectors; | 866 | return aligned_max_sectors; |
867 | } | 867 | } |
868 | 868 | ||
869 | void se_dev_set_default_attribs( | 869 | void se_dev_set_default_attribs( |
diff --git a/drivers/target/target_core_sbc.c b/drivers/target/target_core_sbc.c index 868f8aa04f13..a6e27d967c7b 100644 --- a/drivers/target/target_core_sbc.c +++ b/drivers/target/target_core_sbc.c | |||
@@ -135,6 +135,12 @@ static int sbc_emulate_verify(struct se_cmd *cmd) | |||
135 | return 0; | 135 | return 0; |
136 | } | 136 | } |
137 | 137 | ||
138 | static int sbc_emulate_noop(struct se_cmd *cmd) | ||
139 | { | ||
140 | target_complete_cmd(cmd, GOOD); | ||
141 | return 0; | ||
142 | } | ||
143 | |||
138 | static inline u32 sbc_get_size(struct se_cmd *cmd, u32 sectors) | 144 | static inline u32 sbc_get_size(struct se_cmd *cmd, u32 sectors) |
139 | { | 145 | { |
140 | return cmd->se_dev->se_sub_dev->se_dev_attrib.block_size * sectors; | 146 | return cmd->se_dev->se_sub_dev->se_dev_attrib.block_size * sectors; |
@@ -531,6 +537,18 @@ int sbc_parse_cdb(struct se_cmd *cmd, struct spc_ops *ops) | |||
531 | size = 0; | 537 | size = 0; |
532 | cmd->execute_cmd = sbc_emulate_verify; | 538 | cmd->execute_cmd = sbc_emulate_verify; |
533 | break; | 539 | break; |
540 | case REZERO_UNIT: | ||
541 | case SEEK_6: | ||
542 | case SEEK_10: | ||
543 | /* | ||
544 | * There are still clients out there which use these old SCSI-2 | ||
545 | * commands. This mainly happens when running VMs with legacy | ||
546 | * guest systems, connected via SCSI command pass-through to | ||
547 | * iSCSI targets. Make them happy and return status GOOD. | ||
548 | */ | ||
549 | size = 0; | ||
550 | cmd->execute_cmd = sbc_emulate_noop; | ||
551 | break; | ||
534 | default: | 552 | default: |
535 | ret = spc_parse_cdb(cmd, &size); | 553 | ret = spc_parse_cdb(cmd, &size); |
536 | if (ret) | 554 | if (ret) |
diff --git a/drivers/target/target_core_spc.c b/drivers/target/target_core_spc.c index 9229bd9ad61b..6fd434d3d7e4 100644 --- a/drivers/target/target_core_spc.c +++ b/drivers/target/target_core_spc.c | |||
@@ -605,6 +605,8 @@ static int spc_emulate_inquiry(struct se_cmd *cmd) | |||
605 | unsigned char buf[SE_INQUIRY_BUF]; | 605 | unsigned char buf[SE_INQUIRY_BUF]; |
606 | int p, ret; | 606 | int p, ret; |
607 | 607 | ||
608 | memset(buf, 0, SE_INQUIRY_BUF); | ||
609 | |||
608 | if (dev == tpg->tpg_virt_lun0.lun_se_dev) | 610 | if (dev == tpg->tpg_virt_lun0.lun_se_dev) |
609 | buf[0] = 0x3f; /* Not connected */ | 611 | buf[0] = 0x3f; /* Not connected */ |
610 | else | 612 | else |
diff --git a/drivers/target/target_core_tmr.c b/drivers/target/target_core_tmr.c index 1c59a3c23b2c..be75c4331a92 100644 --- a/drivers/target/target_core_tmr.c +++ b/drivers/target/target_core_tmr.c | |||
@@ -140,15 +140,15 @@ void core_tmr_abort_task( | |||
140 | printk("ABORT_TASK: Found referenced %s task_tag: %u\n", | 140 | printk("ABORT_TASK: Found referenced %s task_tag: %u\n", |
141 | se_cmd->se_tfo->get_fabric_name(), ref_tag); | 141 | se_cmd->se_tfo->get_fabric_name(), ref_tag); |
142 | 142 | ||
143 | spin_lock_irq(&se_cmd->t_state_lock); | 143 | spin_lock(&se_cmd->t_state_lock); |
144 | if (se_cmd->transport_state & CMD_T_COMPLETE) { | 144 | if (se_cmd->transport_state & CMD_T_COMPLETE) { |
145 | printk("ABORT_TASK: ref_tag: %u already complete, skipping\n", ref_tag); | 145 | printk("ABORT_TASK: ref_tag: %u already complete, skipping\n", ref_tag); |
146 | spin_unlock_irq(&se_cmd->t_state_lock); | 146 | spin_unlock(&se_cmd->t_state_lock); |
147 | spin_unlock_irqrestore(&se_sess->sess_cmd_lock, flags); | 147 | spin_unlock_irqrestore(&se_sess->sess_cmd_lock, flags); |
148 | goto out; | 148 | goto out; |
149 | } | 149 | } |
150 | se_cmd->transport_state |= CMD_T_ABORTED; | 150 | se_cmd->transport_state |= CMD_T_ABORTED; |
151 | spin_unlock_irq(&se_cmd->t_state_lock); | 151 | spin_unlock(&se_cmd->t_state_lock); |
152 | 152 | ||
153 | list_del_init(&se_cmd->se_cmd_list); | 153 | list_del_init(&se_cmd->se_cmd_list); |
154 | kref_get(&se_cmd->cmd_kref); | 154 | kref_get(&se_cmd->cmd_kref); |
diff --git a/drivers/target/target_core_transport.c b/drivers/target/target_core_transport.c index c33baff86aa6..9097155e9ebe 100644 --- a/drivers/target/target_core_transport.c +++ b/drivers/target/target_core_transport.c | |||
@@ -1616,7 +1616,6 @@ static void target_complete_tmr_failure(struct work_struct *work) | |||
1616 | 1616 | ||
1617 | se_cmd->se_tmr_req->response = TMR_LUN_DOES_NOT_EXIST; | 1617 | se_cmd->se_tmr_req->response = TMR_LUN_DOES_NOT_EXIST; |
1618 | se_cmd->se_tfo->queue_tm_rsp(se_cmd); | 1618 | se_cmd->se_tfo->queue_tm_rsp(se_cmd); |
1619 | transport_generic_free_cmd(se_cmd, 0); | ||
1620 | } | 1619 | } |
1621 | 1620 | ||
1622 | /** | 1621 | /** |
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c index fd03e8581afc..6dd29e4ce36b 100644 --- a/drivers/thermal/exynos_thermal.c +++ b/drivers/thermal/exynos_thermal.c | |||
@@ -815,7 +815,7 @@ static struct platform_device_id exynos_tmu_driver_ids[] = { | |||
815 | }, | 815 | }, |
816 | { }, | 816 | { }, |
817 | }; | 817 | }; |
818 | MODULE_DEVICE_TABLE(platform, exynos4_tmu_driver_ids); | 818 | MODULE_DEVICE_TABLE(platform, exynos_tmu_driver_ids); |
819 | 819 | ||
820 | static inline struct exynos_tmu_platform_data *exynos_get_driver_data( | 820 | static inline struct exynos_tmu_platform_data *exynos_get_driver_data( |
821 | struct platform_device *pdev) | 821 | struct platform_device *pdev) |
diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_thermal.c index d4452716aaab..f7a1b574a304 100644 --- a/drivers/thermal/rcar_thermal.c +++ b/drivers/thermal/rcar_thermal.c | |||
@@ -210,7 +210,7 @@ static int rcar_thermal_probe(struct platform_device *pdev) | |||
210 | goto error_free_priv; | 210 | goto error_free_priv; |
211 | } | 211 | } |
212 | 212 | ||
213 | zone = thermal_zone_device_register("rcar_thermal", 0, priv, | 213 | zone = thermal_zone_device_register("rcar_thermal", 0, 0, priv, |
214 | &rcar_thermal_zone_ops, 0, 0); | 214 | &rcar_thermal_zone_ops, 0, 0); |
215 | if (IS_ERR(zone)) { | 215 | if (IS_ERR(zone)) { |
216 | dev_err(&pdev->dev, "thermal zone device is NULL\n"); | 216 | dev_err(&pdev->dev, "thermal zone device is NULL\n"); |
diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c index 6458764994ef..4ec3c0d7a18b 100644 --- a/drivers/usb/gadget/u_ether.c +++ b/drivers/usb/gadget/u_ether.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/ctype.h> | 20 | #include <linux/ctype.h> |
21 | #include <linux/etherdevice.h> | 21 | #include <linux/etherdevice.h> |
22 | #include <linux/ethtool.h> | 22 | #include <linux/ethtool.h> |
23 | #include <linux/if_vlan.h> | ||
23 | 24 | ||
24 | #include "u_ether.h" | 25 | #include "u_ether.h" |
25 | 26 | ||
@@ -295,7 +296,7 @@ static void rx_complete(struct usb_ep *ep, struct usb_request *req) | |||
295 | while (skb2) { | 296 | while (skb2) { |
296 | if (status < 0 | 297 | if (status < 0 |
297 | || ETH_HLEN > skb2->len | 298 | || ETH_HLEN > skb2->len |
298 | || skb2->len > ETH_FRAME_LEN) { | 299 | || skb2->len > VLAN_ETH_FRAME_LEN) { |
299 | dev->net->stats.rx_errors++; | 300 | dev->net->stats.rx_errors++; |
300 | dev->net->stats.rx_length_errors++; | 301 | dev->net->stats.rx_length_errors++; |
301 | DBG(dev, "rx length %d\n", skb2->len); | 302 | DBG(dev, "rx length %d\n", skb2->len); |
diff --git a/drivers/video/xen-fbfront.c b/drivers/video/xen-fbfront.c index b7f5173ff9e9..917bb5681684 100644 --- a/drivers/video/xen-fbfront.c +++ b/drivers/video/xen-fbfront.c | |||
@@ -641,7 +641,6 @@ static void xenfb_backend_changed(struct xenbus_device *dev, | |||
641 | case XenbusStateReconfiguring: | 641 | case XenbusStateReconfiguring: |
642 | case XenbusStateReconfigured: | 642 | case XenbusStateReconfigured: |
643 | case XenbusStateUnknown: | 643 | case XenbusStateUnknown: |
644 | case XenbusStateClosed: | ||
645 | break; | 644 | break; |
646 | 645 | ||
647 | case XenbusStateInitWait: | 646 | case XenbusStateInitWait: |
@@ -670,6 +669,10 @@ InitWait: | |||
670 | info->feature_resize = val; | 669 | info->feature_resize = val; |
671 | break; | 670 | break; |
672 | 671 | ||
672 | case XenbusStateClosed: | ||
673 | if (dev->state == XenbusStateClosed) | ||
674 | break; | ||
675 | /* Missed the backend's CLOSING state -- fallthrough */ | ||
673 | case XenbusStateClosing: | 676 | case XenbusStateClosing: |
674 | xenbus_frontend_closed(dev); | 677 | xenbus_frontend_closed(dev); |
675 | break; | 678 | break; |
diff --git a/drivers/virtio/virtio.c b/drivers/virtio/virtio.c index 1e8659ca27ef..809b0de59c09 100644 --- a/drivers/virtio/virtio.c +++ b/drivers/virtio/virtio.c | |||
@@ -225,8 +225,10 @@ EXPORT_SYMBOL_GPL(register_virtio_device); | |||
225 | 225 | ||
226 | void unregister_virtio_device(struct virtio_device *dev) | 226 | void unregister_virtio_device(struct virtio_device *dev) |
227 | { | 227 | { |
228 | int index = dev->index; /* save for after device release */ | ||
229 | |||
228 | device_unregister(&dev->dev); | 230 | device_unregister(&dev->dev); |
229 | ida_simple_remove(&virtio_index_ida, dev->index); | 231 | ida_simple_remove(&virtio_index_ida, index); |
230 | } | 232 | } |
231 | EXPORT_SYMBOL_GPL(unregister_virtio_device); | 233 | EXPORT_SYMBOL_GPL(unregister_virtio_device); |
232 | 234 | ||
diff --git a/drivers/xen/Makefile b/drivers/xen/Makefile index 0e8637035457..74354708c6c4 100644 --- a/drivers/xen/Makefile +++ b/drivers/xen/Makefile | |||
@@ -2,6 +2,7 @@ ifneq ($(CONFIG_ARM),y) | |||
2 | obj-y += manage.o balloon.o | 2 | obj-y += manage.o balloon.o |
3 | obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o | 3 | obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o |
4 | endif | 4 | endif |
5 | obj-$(CONFIG_X86) += fallback.o | ||
5 | obj-y += grant-table.o features.o events.o | 6 | obj-y += grant-table.o features.o events.o |
6 | obj-y += xenbus/ | 7 | obj-y += xenbus/ |
7 | 8 | ||
diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 912ac81b6dbf..0be4df39e953 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c | |||
@@ -1395,10 +1395,10 @@ void xen_evtchn_do_upcall(struct pt_regs *regs) | |||
1395 | { | 1395 | { |
1396 | struct pt_regs *old_regs = set_irq_regs(regs); | 1396 | struct pt_regs *old_regs = set_irq_regs(regs); |
1397 | 1397 | ||
1398 | irq_enter(); | ||
1398 | #ifdef CONFIG_X86 | 1399 | #ifdef CONFIG_X86 |
1399 | exit_idle(); | 1400 | exit_idle(); |
1400 | #endif | 1401 | #endif |
1401 | irq_enter(); | ||
1402 | 1402 | ||
1403 | __xen_evtchn_do_upcall(); | 1403 | __xen_evtchn_do_upcall(); |
1404 | 1404 | ||
diff --git a/drivers/xen/fallback.c b/drivers/xen/fallback.c new file mode 100644 index 000000000000..0ef7c4d40f86 --- /dev/null +++ b/drivers/xen/fallback.c | |||
@@ -0,0 +1,80 @@ | |||
1 | #include <linux/kernel.h> | ||
2 | #include <linux/string.h> | ||
3 | #include <linux/bug.h> | ||
4 | #include <linux/export.h> | ||
5 | #include <asm/hypervisor.h> | ||
6 | #include <asm/xen/hypercall.h> | ||
7 | |||
8 | int xen_event_channel_op_compat(int cmd, void *arg) | ||
9 | { | ||
10 | struct evtchn_op op; | ||
11 | int rc; | ||
12 | |||
13 | op.cmd = cmd; | ||
14 | memcpy(&op.u, arg, sizeof(op.u)); | ||
15 | rc = _hypercall1(int, event_channel_op_compat, &op); | ||
16 | |||
17 | switch (cmd) { | ||
18 | case EVTCHNOP_close: | ||
19 | case EVTCHNOP_send: | ||
20 | case EVTCHNOP_bind_vcpu: | ||
21 | case EVTCHNOP_unmask: | ||
22 | /* no output */ | ||
23 | break; | ||
24 | |||
25 | #define COPY_BACK(eop) \ | ||
26 | case EVTCHNOP_##eop: \ | ||
27 | memcpy(arg, &op.u.eop, sizeof(op.u.eop)); \ | ||
28 | break | ||
29 | |||
30 | COPY_BACK(bind_interdomain); | ||
31 | COPY_BACK(bind_virq); | ||
32 | COPY_BACK(bind_pirq); | ||
33 | COPY_BACK(status); | ||
34 | COPY_BACK(alloc_unbound); | ||
35 | COPY_BACK(bind_ipi); | ||
36 | #undef COPY_BACK | ||
37 | |||
38 | default: | ||
39 | WARN_ON(rc != -ENOSYS); | ||
40 | break; | ||
41 | } | ||
42 | |||
43 | return rc; | ||
44 | } | ||
45 | EXPORT_SYMBOL_GPL(xen_event_channel_op_compat); | ||
46 | |||
47 | int HYPERVISOR_physdev_op_compat(int cmd, void *arg) | ||
48 | { | ||
49 | struct physdev_op op; | ||
50 | int rc; | ||
51 | |||
52 | op.cmd = cmd; | ||
53 | memcpy(&op.u, arg, sizeof(op.u)); | ||
54 | rc = _hypercall1(int, physdev_op_compat, &op); | ||
55 | |||
56 | switch (cmd) { | ||
57 | case PHYSDEVOP_IRQ_UNMASK_NOTIFY: | ||
58 | case PHYSDEVOP_set_iopl: | ||
59 | case PHYSDEVOP_set_iobitmap: | ||
60 | case PHYSDEVOP_apic_write: | ||
61 | /* no output */ | ||
62 | break; | ||
63 | |||
64 | #define COPY_BACK(pop, fld) \ | ||
65 | case PHYSDEVOP_##pop: \ | ||
66 | memcpy(arg, &op.u.fld, sizeof(op.u.fld)); \ | ||
67 | break | ||
68 | |||
69 | COPY_BACK(irq_status_query, irq_status_query); | ||
70 | COPY_BACK(apic_read, apic_op); | ||
71 | COPY_BACK(ASSIGN_VECTOR, irq_op); | ||
72 | #undef COPY_BACK | ||
73 | |||
74 | default: | ||
75 | WARN_ON(rc != -ENOSYS); | ||
76 | break; | ||
77 | } | ||
78 | |||
79 | return rc; | ||
80 | } | ||
diff --git a/drivers/xen/gntdev.c b/drivers/xen/gntdev.c index 610bfc6be177..2e22df2f7a3f 100644 --- a/drivers/xen/gntdev.c +++ b/drivers/xen/gntdev.c | |||
@@ -105,6 +105,21 @@ static void gntdev_print_maps(struct gntdev_priv *priv, | |||
105 | #endif | 105 | #endif |
106 | } | 106 | } |
107 | 107 | ||
108 | static void gntdev_free_map(struct grant_map *map) | ||
109 | { | ||
110 | if (map == NULL) | ||
111 | return; | ||
112 | |||
113 | if (map->pages) | ||
114 | free_xenballooned_pages(map->count, map->pages); | ||
115 | kfree(map->pages); | ||
116 | kfree(map->grants); | ||
117 | kfree(map->map_ops); | ||
118 | kfree(map->unmap_ops); | ||
119 | kfree(map->kmap_ops); | ||
120 | kfree(map); | ||
121 | } | ||
122 | |||
108 | static struct grant_map *gntdev_alloc_map(struct gntdev_priv *priv, int count) | 123 | static struct grant_map *gntdev_alloc_map(struct gntdev_priv *priv, int count) |
109 | { | 124 | { |
110 | struct grant_map *add; | 125 | struct grant_map *add; |
@@ -142,12 +157,7 @@ static struct grant_map *gntdev_alloc_map(struct gntdev_priv *priv, int count) | |||
142 | return add; | 157 | return add; |
143 | 158 | ||
144 | err: | 159 | err: |
145 | kfree(add->pages); | 160 | gntdev_free_map(add); |
146 | kfree(add->grants); | ||
147 | kfree(add->map_ops); | ||
148 | kfree(add->unmap_ops); | ||
149 | kfree(add->kmap_ops); | ||
150 | kfree(add); | ||
151 | return NULL; | 161 | return NULL; |
152 | } | 162 | } |
153 | 163 | ||
@@ -198,17 +208,9 @@ static void gntdev_put_map(struct grant_map *map) | |||
198 | evtchn_put(map->notify.event); | 208 | evtchn_put(map->notify.event); |
199 | } | 209 | } |
200 | 210 | ||
201 | if (map->pages) { | 211 | if (map->pages && !use_ptemod) |
202 | if (!use_ptemod) | 212 | unmap_grant_pages(map, 0, map->count); |
203 | unmap_grant_pages(map, 0, map->count); | 213 | gntdev_free_map(map); |
204 | |||
205 | free_xenballooned_pages(map->count, map->pages); | ||
206 | } | ||
207 | kfree(map->pages); | ||
208 | kfree(map->grants); | ||
209 | kfree(map->map_ops); | ||
210 | kfree(map->unmap_ops); | ||
211 | kfree(map); | ||
212 | } | 214 | } |
213 | 215 | ||
214 | /* ------------------------------------------------------------------ */ | 216 | /* ------------------------------------------------------------------ */ |
diff --git a/drivers/xen/xenbus/xenbus_dev_frontend.c b/drivers/xen/xenbus/xenbus_dev_frontend.c index 89f76252a16f..ac727028e658 100644 --- a/drivers/xen/xenbus/xenbus_dev_frontend.c +++ b/drivers/xen/xenbus/xenbus_dev_frontend.c | |||
@@ -458,7 +458,7 @@ static ssize_t xenbus_file_write(struct file *filp, | |||
458 | goto out; | 458 | goto out; |
459 | 459 | ||
460 | /* Can't write a xenbus message larger we can buffer */ | 460 | /* Can't write a xenbus message larger we can buffer */ |
461 | if ((len + u->len) > sizeof(u->u.buffer)) { | 461 | if (len > sizeof(u->u.buffer) - u->len) { |
462 | /* On error, dump existing buffer */ | 462 | /* On error, dump existing buffer */ |
463 | u->len = 0; | 463 | u->len = 0; |
464 | rc = -EINVAL; | 464 | rc = -EINVAL; |
@@ -75,6 +75,7 @@ static struct kmem_cache *bio_find_or_create_slab(unsigned int extra_size) | |||
75 | unsigned int sz = sizeof(struct bio) + extra_size; | 75 | unsigned int sz = sizeof(struct bio) + extra_size; |
76 | struct kmem_cache *slab = NULL; | 76 | struct kmem_cache *slab = NULL; |
77 | struct bio_slab *bslab, *new_bio_slabs; | 77 | struct bio_slab *bslab, *new_bio_slabs; |
78 | unsigned int new_bio_slab_max; | ||
78 | unsigned int i, entry = -1; | 79 | unsigned int i, entry = -1; |
79 | 80 | ||
80 | mutex_lock(&bio_slab_lock); | 81 | mutex_lock(&bio_slab_lock); |
@@ -97,12 +98,13 @@ static struct kmem_cache *bio_find_or_create_slab(unsigned int extra_size) | |||
97 | goto out_unlock; | 98 | goto out_unlock; |
98 | 99 | ||
99 | if (bio_slab_nr == bio_slab_max && entry == -1) { | 100 | if (bio_slab_nr == bio_slab_max && entry == -1) { |
100 | bio_slab_max <<= 1; | 101 | new_bio_slab_max = bio_slab_max << 1; |
101 | new_bio_slabs = krealloc(bio_slabs, | 102 | new_bio_slabs = krealloc(bio_slabs, |
102 | bio_slab_max * sizeof(struct bio_slab), | 103 | new_bio_slab_max * sizeof(struct bio_slab), |
103 | GFP_KERNEL); | 104 | GFP_KERNEL); |
104 | if (!new_bio_slabs) | 105 | if (!new_bio_slabs) |
105 | goto out_unlock; | 106 | goto out_unlock; |
107 | bio_slab_max = new_bio_slab_max; | ||
106 | bio_slabs = new_bio_slabs; | 108 | bio_slabs = new_bio_slabs; |
107 | } | 109 | } |
108 | if (entry == -1) | 110 | if (entry == -1) |
diff --git a/fs/ceph/export.c b/fs/ceph/export.c index 02ce90972d81..9349bb37a2fe 100644 --- a/fs/ceph/export.c +++ b/fs/ceph/export.c | |||
@@ -90,6 +90,8 @@ static int ceph_encode_fh(struct inode *inode, u32 *rawfh, int *max_len, | |||
90 | *max_len = handle_length; | 90 | *max_len = handle_length; |
91 | type = 255; | 91 | type = 255; |
92 | } | 92 | } |
93 | if (dentry) | ||
94 | dput(dentry); | ||
93 | return type; | 95 | return type; |
94 | } | 96 | } |
95 | 97 | ||
diff --git a/fs/cifs/cifsacl.c b/fs/cifs/cifsacl.c index fc783e264420..0fb15bbbe43c 100644 --- a/fs/cifs/cifsacl.c +++ b/fs/cifs/cifsacl.c | |||
@@ -225,6 +225,13 @@ sid_to_str(struct cifs_sid *sidptr, char *sidstr) | |||
225 | } | 225 | } |
226 | 226 | ||
227 | static void | 227 | static void |
228 | cifs_copy_sid(struct cifs_sid *dst, const struct cifs_sid *src) | ||
229 | { | ||
230 | memcpy(dst, src, sizeof(*dst)); | ||
231 | dst->num_subauth = min_t(u8, src->num_subauth, NUM_SUBAUTHS); | ||
232 | } | ||
233 | |||
234 | static void | ||
228 | id_rb_insert(struct rb_root *root, struct cifs_sid *sidptr, | 235 | id_rb_insert(struct rb_root *root, struct cifs_sid *sidptr, |
229 | struct cifs_sid_id **psidid, char *typestr) | 236 | struct cifs_sid_id **psidid, char *typestr) |
230 | { | 237 | { |
@@ -248,7 +255,7 @@ id_rb_insert(struct rb_root *root, struct cifs_sid *sidptr, | |||
248 | } | 255 | } |
249 | } | 256 | } |
250 | 257 | ||
251 | memcpy(&(*psidid)->sid, sidptr, sizeof(struct cifs_sid)); | 258 | cifs_copy_sid(&(*psidid)->sid, sidptr); |
252 | (*psidid)->time = jiffies - (SID_MAP_RETRY + 1); | 259 | (*psidid)->time = jiffies - (SID_MAP_RETRY + 1); |
253 | (*psidid)->refcount = 0; | 260 | (*psidid)->refcount = 0; |
254 | 261 | ||
@@ -354,7 +361,7 @@ id_to_sid(unsigned long cid, uint sidtype, struct cifs_sid *ssid) | |||
354 | * any fields of the node after a reference is put . | 361 | * any fields of the node after a reference is put . |
355 | */ | 362 | */ |
356 | if (test_bit(SID_ID_MAPPED, &psidid->state)) { | 363 | if (test_bit(SID_ID_MAPPED, &psidid->state)) { |
357 | memcpy(ssid, &psidid->sid, sizeof(struct cifs_sid)); | 364 | cifs_copy_sid(ssid, &psidid->sid); |
358 | psidid->time = jiffies; /* update ts for accessing */ | 365 | psidid->time = jiffies; /* update ts for accessing */ |
359 | goto id_sid_out; | 366 | goto id_sid_out; |
360 | } | 367 | } |
@@ -370,14 +377,14 @@ id_to_sid(unsigned long cid, uint sidtype, struct cifs_sid *ssid) | |||
370 | if (IS_ERR(sidkey)) { | 377 | if (IS_ERR(sidkey)) { |
371 | rc = -EINVAL; | 378 | rc = -EINVAL; |
372 | cFYI(1, "%s: Can't map and id to a SID", __func__); | 379 | cFYI(1, "%s: Can't map and id to a SID", __func__); |
380 | } else if (sidkey->datalen < sizeof(struct cifs_sid)) { | ||
381 | rc = -EIO; | ||
382 | cFYI(1, "%s: Downcall contained malformed key " | ||
383 | "(datalen=%hu)", __func__, sidkey->datalen); | ||
373 | } else { | 384 | } else { |
374 | lsid = (struct cifs_sid *)sidkey->payload.data; | 385 | lsid = (struct cifs_sid *)sidkey->payload.data; |
375 | memcpy(&psidid->sid, lsid, | 386 | cifs_copy_sid(&psidid->sid, lsid); |
376 | sidkey->datalen < sizeof(struct cifs_sid) ? | 387 | cifs_copy_sid(ssid, &psidid->sid); |
377 | sidkey->datalen : sizeof(struct cifs_sid)); | ||
378 | memcpy(ssid, &psidid->sid, | ||
379 | sidkey->datalen < sizeof(struct cifs_sid) ? | ||
380 | sidkey->datalen : sizeof(struct cifs_sid)); | ||
381 | set_bit(SID_ID_MAPPED, &psidid->state); | 388 | set_bit(SID_ID_MAPPED, &psidid->state); |
382 | key_put(sidkey); | 389 | key_put(sidkey); |
383 | kfree(psidid->sidstr); | 390 | kfree(psidid->sidstr); |
@@ -396,7 +403,7 @@ id_to_sid(unsigned long cid, uint sidtype, struct cifs_sid *ssid) | |||
396 | return rc; | 403 | return rc; |
397 | } | 404 | } |
398 | if (test_bit(SID_ID_MAPPED, &psidid->state)) | 405 | if (test_bit(SID_ID_MAPPED, &psidid->state)) |
399 | memcpy(ssid, &psidid->sid, sizeof(struct cifs_sid)); | 406 | cifs_copy_sid(ssid, &psidid->sid); |
400 | else | 407 | else |
401 | rc = -EINVAL; | 408 | rc = -EINVAL; |
402 | } | 409 | } |
@@ -675,8 +682,6 @@ int compare_sids(const struct cifs_sid *ctsid, const struct cifs_sid *cwsid) | |||
675 | static void copy_sec_desc(const struct cifs_ntsd *pntsd, | 682 | static void copy_sec_desc(const struct cifs_ntsd *pntsd, |
676 | struct cifs_ntsd *pnntsd, __u32 sidsoffset) | 683 | struct cifs_ntsd *pnntsd, __u32 sidsoffset) |
677 | { | 684 | { |
678 | int i; | ||
679 | |||
680 | struct cifs_sid *owner_sid_ptr, *group_sid_ptr; | 685 | struct cifs_sid *owner_sid_ptr, *group_sid_ptr; |
681 | struct cifs_sid *nowner_sid_ptr, *ngroup_sid_ptr; | 686 | struct cifs_sid *nowner_sid_ptr, *ngroup_sid_ptr; |
682 | 687 | ||
@@ -692,26 +697,14 @@ static void copy_sec_desc(const struct cifs_ntsd *pntsd, | |||
692 | owner_sid_ptr = (struct cifs_sid *)((char *)pntsd + | 697 | owner_sid_ptr = (struct cifs_sid *)((char *)pntsd + |
693 | le32_to_cpu(pntsd->osidoffset)); | 698 | le32_to_cpu(pntsd->osidoffset)); |
694 | nowner_sid_ptr = (struct cifs_sid *)((char *)pnntsd + sidsoffset); | 699 | nowner_sid_ptr = (struct cifs_sid *)((char *)pnntsd + sidsoffset); |
695 | 700 | cifs_copy_sid(nowner_sid_ptr, owner_sid_ptr); | |
696 | nowner_sid_ptr->revision = owner_sid_ptr->revision; | ||
697 | nowner_sid_ptr->num_subauth = owner_sid_ptr->num_subauth; | ||
698 | for (i = 0; i < 6; i++) | ||
699 | nowner_sid_ptr->authority[i] = owner_sid_ptr->authority[i]; | ||
700 | for (i = 0; i < 5; i++) | ||
701 | nowner_sid_ptr->sub_auth[i] = owner_sid_ptr->sub_auth[i]; | ||
702 | 701 | ||
703 | /* copy group sid */ | 702 | /* copy group sid */ |
704 | group_sid_ptr = (struct cifs_sid *)((char *)pntsd + | 703 | group_sid_ptr = (struct cifs_sid *)((char *)pntsd + |
705 | le32_to_cpu(pntsd->gsidoffset)); | 704 | le32_to_cpu(pntsd->gsidoffset)); |
706 | ngroup_sid_ptr = (struct cifs_sid *)((char *)pnntsd + sidsoffset + | 705 | ngroup_sid_ptr = (struct cifs_sid *)((char *)pnntsd + sidsoffset + |
707 | sizeof(struct cifs_sid)); | 706 | sizeof(struct cifs_sid)); |
708 | 707 | cifs_copy_sid(ngroup_sid_ptr, group_sid_ptr); | |
709 | ngroup_sid_ptr->revision = group_sid_ptr->revision; | ||
710 | ngroup_sid_ptr->num_subauth = group_sid_ptr->num_subauth; | ||
711 | for (i = 0; i < 6; i++) | ||
712 | ngroup_sid_ptr->authority[i] = group_sid_ptr->authority[i]; | ||
713 | for (i = 0; i < 5; i++) | ||
714 | ngroup_sid_ptr->sub_auth[i] = group_sid_ptr->sub_auth[i]; | ||
715 | 708 | ||
716 | return; | 709 | return; |
717 | } | 710 | } |
@@ -1120,8 +1113,7 @@ static int build_sec_desc(struct cifs_ntsd *pntsd, struct cifs_ntsd *pnntsd, | |||
1120 | kfree(nowner_sid_ptr); | 1113 | kfree(nowner_sid_ptr); |
1121 | return rc; | 1114 | return rc; |
1122 | } | 1115 | } |
1123 | memcpy(owner_sid_ptr, nowner_sid_ptr, | 1116 | cifs_copy_sid(owner_sid_ptr, nowner_sid_ptr); |
1124 | sizeof(struct cifs_sid)); | ||
1125 | kfree(nowner_sid_ptr); | 1117 | kfree(nowner_sid_ptr); |
1126 | *aclflag = CIFS_ACL_OWNER; | 1118 | *aclflag = CIFS_ACL_OWNER; |
1127 | } | 1119 | } |
@@ -1139,8 +1131,7 @@ static int build_sec_desc(struct cifs_ntsd *pntsd, struct cifs_ntsd *pnntsd, | |||
1139 | kfree(ngroup_sid_ptr); | 1131 | kfree(ngroup_sid_ptr); |
1140 | return rc; | 1132 | return rc; |
1141 | } | 1133 | } |
1142 | memcpy(group_sid_ptr, ngroup_sid_ptr, | 1134 | cifs_copy_sid(group_sid_ptr, ngroup_sid_ptr); |
1143 | sizeof(struct cifs_sid)); | ||
1144 | kfree(ngroup_sid_ptr); | 1135 | kfree(ngroup_sid_ptr); |
1145 | *aclflag = CIFS_ACL_GROUP; | 1136 | *aclflag = CIFS_ACL_GROUP; |
1146 | } | 1137 | } |
diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c index 7c0a81283645..d3671f2acb29 100644 --- a/fs/cifs/dir.c +++ b/fs/cifs/dir.c | |||
@@ -398,7 +398,16 @@ cifs_atomic_open(struct inode *inode, struct dentry *direntry, | |||
398 | * in network traffic in the other paths. | 398 | * in network traffic in the other paths. |
399 | */ | 399 | */ |
400 | if (!(oflags & O_CREAT)) { | 400 | if (!(oflags & O_CREAT)) { |
401 | struct dentry *res = cifs_lookup(inode, direntry, 0); | 401 | struct dentry *res; |
402 | |||
403 | /* | ||
404 | * Check for hashed negative dentry. We have already revalidated | ||
405 | * the dentry and it is fine. No need to perform another lookup. | ||
406 | */ | ||
407 | if (!d_unhashed(direntry)) | ||
408 | return -ENOENT; | ||
409 | |||
410 | res = cifs_lookup(inode, direntry, 0); | ||
402 | if (IS_ERR(res)) | 411 | if (IS_ERR(res)) |
403 | return PTR_ERR(res); | 412 | return PTR_ERR(res); |
404 | 413 | ||
diff --git a/fs/eventpoll.c b/fs/eventpoll.c index da72250ddc1c..cd96649bfe62 100644 --- a/fs/eventpoll.c +++ b/fs/eventpoll.c | |||
@@ -346,7 +346,7 @@ static inline struct epitem *ep_item_from_epqueue(poll_table *p) | |||
346 | /* Tells if the epoll_ctl(2) operation needs an event copy from userspace */ | 346 | /* Tells if the epoll_ctl(2) operation needs an event copy from userspace */ |
347 | static inline int ep_op_has_event(int op) | 347 | static inline int ep_op_has_event(int op) |
348 | { | 348 | { |
349 | return op == EPOLL_CTL_ADD || op == EPOLL_CTL_MOD; | 349 | return op != EPOLL_CTL_DEL; |
350 | } | 350 | } |
351 | 351 | ||
352 | /* Initialize the poll safe wake up structure */ | 352 | /* Initialize the poll safe wake up structure */ |
@@ -676,34 +676,6 @@ static int ep_remove(struct eventpoll *ep, struct epitem *epi) | |||
676 | return 0; | 676 | return 0; |
677 | } | 677 | } |
678 | 678 | ||
679 | /* | ||
680 | * Disables a "struct epitem" in the eventpoll set. Returns -EBUSY if the item | ||
681 | * had no event flags set, indicating that another thread may be currently | ||
682 | * handling that item's events (in the case that EPOLLONESHOT was being | ||
683 | * used). Otherwise a zero result indicates that the item has been disabled | ||
684 | * from receiving events. A disabled item may be re-enabled via | ||
685 | * EPOLL_CTL_MOD. Must be called with "mtx" held. | ||
686 | */ | ||
687 | static int ep_disable(struct eventpoll *ep, struct epitem *epi) | ||
688 | { | ||
689 | int result = 0; | ||
690 | unsigned long flags; | ||
691 | |||
692 | spin_lock_irqsave(&ep->lock, flags); | ||
693 | if (epi->event.events & ~EP_PRIVATE_BITS) { | ||
694 | if (ep_is_linked(&epi->rdllink)) | ||
695 | list_del_init(&epi->rdllink); | ||
696 | /* Ensure ep_poll_callback will not add epi back onto ready | ||
697 | list: */ | ||
698 | epi->event.events &= EP_PRIVATE_BITS; | ||
699 | } | ||
700 | else | ||
701 | result = -EBUSY; | ||
702 | spin_unlock_irqrestore(&ep->lock, flags); | ||
703 | |||
704 | return result; | ||
705 | } | ||
706 | |||
707 | static void ep_free(struct eventpoll *ep) | 679 | static void ep_free(struct eventpoll *ep) |
708 | { | 680 | { |
709 | struct rb_node *rbp; | 681 | struct rb_node *rbp; |
@@ -1048,6 +1020,8 @@ static void ep_rbtree_insert(struct eventpoll *ep, struct epitem *epi) | |||
1048 | rb_insert_color(&epi->rbn, &ep->rbr); | 1020 | rb_insert_color(&epi->rbn, &ep->rbr); |
1049 | } | 1021 | } |
1050 | 1022 | ||
1023 | |||
1024 | |||
1051 | #define PATH_ARR_SIZE 5 | 1025 | #define PATH_ARR_SIZE 5 |
1052 | /* | 1026 | /* |
1053 | * These are the number paths of length 1 to 5, that we are allowing to emanate | 1027 | * These are the number paths of length 1 to 5, that we are allowing to emanate |
@@ -1813,12 +1787,6 @@ SYSCALL_DEFINE4(epoll_ctl, int, epfd, int, op, int, fd, | |||
1813 | } else | 1787 | } else |
1814 | error = -ENOENT; | 1788 | error = -ENOENT; |
1815 | break; | 1789 | break; |
1816 | case EPOLL_CTL_DISABLE: | ||
1817 | if (epi) | ||
1818 | error = ep_disable(ep, epi); | ||
1819 | else | ||
1820 | error = -ENOENT; | ||
1821 | break; | ||
1822 | } | 1790 | } |
1823 | mutex_unlock(&ep->mtx); | 1791 | mutex_unlock(&ep->mtx); |
1824 | 1792 | ||
diff --git a/fs/ext4/ialloc.c b/fs/ext4/ialloc.c index 4facdd29a350..3a100e7a62a8 100644 --- a/fs/ext4/ialloc.c +++ b/fs/ext4/ialloc.c | |||
@@ -725,6 +725,10 @@ repeat_in_this_group: | |||
725 | "inode=%lu", ino + 1); | 725 | "inode=%lu", ino + 1); |
726 | continue; | 726 | continue; |
727 | } | 727 | } |
728 | BUFFER_TRACE(inode_bitmap_bh, "get_write_access"); | ||
729 | err = ext4_journal_get_write_access(handle, inode_bitmap_bh); | ||
730 | if (err) | ||
731 | goto fail; | ||
728 | ext4_lock_group(sb, group); | 732 | ext4_lock_group(sb, group); |
729 | ret2 = ext4_test_and_set_bit(ino, inode_bitmap_bh->b_data); | 733 | ret2 = ext4_test_and_set_bit(ino, inode_bitmap_bh->b_data); |
730 | ext4_unlock_group(sb, group); | 734 | ext4_unlock_group(sb, group); |
@@ -738,6 +742,11 @@ repeat_in_this_group: | |||
738 | goto out; | 742 | goto out; |
739 | 743 | ||
740 | got: | 744 | got: |
745 | BUFFER_TRACE(inode_bitmap_bh, "call ext4_handle_dirty_metadata"); | ||
746 | err = ext4_handle_dirty_metadata(handle, NULL, inode_bitmap_bh); | ||
747 | if (err) | ||
748 | goto fail; | ||
749 | |||
741 | /* We may have to initialize the block bitmap if it isn't already */ | 750 | /* We may have to initialize the block bitmap if it isn't already */ |
742 | if (ext4_has_group_desc_csum(sb) && | 751 | if (ext4_has_group_desc_csum(sb) && |
743 | gdp->bg_flags & cpu_to_le16(EXT4_BG_BLOCK_UNINIT)) { | 752 | gdp->bg_flags & cpu_to_le16(EXT4_BG_BLOCK_UNINIT)) { |
@@ -771,11 +780,6 @@ got: | |||
771 | goto fail; | 780 | goto fail; |
772 | } | 781 | } |
773 | 782 | ||
774 | BUFFER_TRACE(inode_bitmap_bh, "get_write_access"); | ||
775 | err = ext4_journal_get_write_access(handle, inode_bitmap_bh); | ||
776 | if (err) | ||
777 | goto fail; | ||
778 | |||
779 | BUFFER_TRACE(group_desc_bh, "get_write_access"); | 783 | BUFFER_TRACE(group_desc_bh, "get_write_access"); |
780 | err = ext4_journal_get_write_access(handle, group_desc_bh); | 784 | err = ext4_journal_get_write_access(handle, group_desc_bh); |
781 | if (err) | 785 | if (err) |
@@ -823,11 +827,6 @@ got: | |||
823 | } | 827 | } |
824 | ext4_unlock_group(sb, group); | 828 | ext4_unlock_group(sb, group); |
825 | 829 | ||
826 | BUFFER_TRACE(inode_bitmap_bh, "call ext4_handle_dirty_metadata"); | ||
827 | err = ext4_handle_dirty_metadata(handle, NULL, inode_bitmap_bh); | ||
828 | if (err) | ||
829 | goto fail; | ||
830 | |||
831 | BUFFER_TRACE(group_desc_bh, "call ext4_handle_dirty_metadata"); | 830 | BUFFER_TRACE(group_desc_bh, "call ext4_handle_dirty_metadata"); |
832 | err = ext4_handle_dirty_metadata(handle, NULL, group_desc_bh); | 831 | err = ext4_handle_dirty_metadata(handle, NULL, group_desc_bh); |
833 | if (err) | 832 | if (err) |
@@ -900,7 +900,7 @@ int replace_fd(unsigned fd, struct file *file, unsigned flags) | |||
900 | return __close_fd(files, fd); | 900 | return __close_fd(files, fd); |
901 | 901 | ||
902 | if (fd >= rlimit(RLIMIT_NOFILE)) | 902 | if (fd >= rlimit(RLIMIT_NOFILE)) |
903 | return -EMFILE; | 903 | return -EBADF; |
904 | 904 | ||
905 | spin_lock(&files->file_lock); | 905 | spin_lock(&files->file_lock); |
906 | err = expand_files(files, fd); | 906 | err = expand_files(files, fd); |
@@ -926,7 +926,7 @@ SYSCALL_DEFINE3(dup3, unsigned int, oldfd, unsigned int, newfd, int, flags) | |||
926 | return -EINVAL; | 926 | return -EINVAL; |
927 | 927 | ||
928 | if (newfd >= rlimit(RLIMIT_NOFILE)) | 928 | if (newfd >= rlimit(RLIMIT_NOFILE)) |
929 | return -EMFILE; | 929 | return -EBADF; |
930 | 930 | ||
931 | spin_lock(&files->file_lock); | 931 | spin_lock(&files->file_lock); |
932 | err = expand_files(files, newfd); | 932 | err = expand_files(files, newfd); |
diff --git a/fs/gfs2/file.c b/fs/gfs2/file.c index 0def0504afc1..e056b4ce4877 100644 --- a/fs/gfs2/file.c +++ b/fs/gfs2/file.c | |||
@@ -516,15 +516,13 @@ static int gfs2_mmap(struct file *file, struct vm_area_struct *vma) | |||
516 | struct gfs2_holder i_gh; | 516 | struct gfs2_holder i_gh; |
517 | int error; | 517 | int error; |
518 | 518 | ||
519 | gfs2_holder_init(ip->i_gl, LM_ST_SHARED, LM_FLAG_ANY, &i_gh); | 519 | error = gfs2_glock_nq_init(ip->i_gl, LM_ST_SHARED, LM_FLAG_ANY, |
520 | error = gfs2_glock_nq(&i_gh); | 520 | &i_gh); |
521 | if (error == 0) { | ||
522 | file_accessed(file); | ||
523 | gfs2_glock_dq(&i_gh); | ||
524 | } | ||
525 | gfs2_holder_uninit(&i_gh); | ||
526 | if (error) | 521 | if (error) |
527 | return error; | 522 | return error; |
523 | /* grab lock to update inode */ | ||
524 | gfs2_glock_dq_uninit(&i_gh); | ||
525 | file_accessed(file); | ||
528 | } | 526 | } |
529 | vma->vm_ops = &gfs2_vm_ops; | 527 | vma->vm_ops = &gfs2_vm_ops; |
530 | 528 | ||
@@ -677,10 +675,8 @@ static ssize_t gfs2_file_aio_write(struct kiocb *iocb, const struct iovec *iov, | |||
677 | size_t writesize = iov_length(iov, nr_segs); | 675 | size_t writesize = iov_length(iov, nr_segs); |
678 | struct dentry *dentry = file->f_dentry; | 676 | struct dentry *dentry = file->f_dentry; |
679 | struct gfs2_inode *ip = GFS2_I(dentry->d_inode); | 677 | struct gfs2_inode *ip = GFS2_I(dentry->d_inode); |
680 | struct gfs2_sbd *sdp; | ||
681 | int ret; | 678 | int ret; |
682 | 679 | ||
683 | sdp = GFS2_SB(file->f_mapping->host); | ||
684 | ret = gfs2_rs_alloc(ip); | 680 | ret = gfs2_rs_alloc(ip); |
685 | if (ret) | 681 | if (ret) |
686 | return ret; | 682 | return ret; |
diff --git a/fs/gfs2/lops.c b/fs/gfs2/lops.c index 8ff95a2d54ee..9ceccb1595a3 100644 --- a/fs/gfs2/lops.c +++ b/fs/gfs2/lops.c | |||
@@ -393,12 +393,10 @@ static void buf_lo_add(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) | |||
393 | struct gfs2_meta_header *mh; | 393 | struct gfs2_meta_header *mh; |
394 | struct gfs2_trans *tr; | 394 | struct gfs2_trans *tr; |
395 | 395 | ||
396 | lock_buffer(bd->bd_bh); | ||
397 | gfs2_log_lock(sdp); | ||
398 | tr = current->journal_info; | 396 | tr = current->journal_info; |
399 | tr->tr_touched = 1; | 397 | tr->tr_touched = 1; |
400 | if (!list_empty(&bd->bd_list)) | 398 | if (!list_empty(&bd->bd_list)) |
401 | goto out; | 399 | return; |
402 | set_bit(GLF_LFLUSH, &bd->bd_gl->gl_flags); | 400 | set_bit(GLF_LFLUSH, &bd->bd_gl->gl_flags); |
403 | set_bit(GLF_DIRTY, &bd->bd_gl->gl_flags); | 401 | set_bit(GLF_DIRTY, &bd->bd_gl->gl_flags); |
404 | mh = (struct gfs2_meta_header *)bd->bd_bh->b_data; | 402 | mh = (struct gfs2_meta_header *)bd->bd_bh->b_data; |
@@ -414,9 +412,6 @@ static void buf_lo_add(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) | |||
414 | sdp->sd_log_num_buf++; | 412 | sdp->sd_log_num_buf++; |
415 | list_add(&bd->bd_list, &sdp->sd_log_le_buf); | 413 | list_add(&bd->bd_list, &sdp->sd_log_le_buf); |
416 | tr->tr_num_buf_new++; | 414 | tr->tr_num_buf_new++; |
417 | out: | ||
418 | gfs2_log_unlock(sdp); | ||
419 | unlock_buffer(bd->bd_bh); | ||
420 | } | 415 | } |
421 | 416 | ||
422 | static void gfs2_check_magic(struct buffer_head *bh) | 417 | static void gfs2_check_magic(struct buffer_head *bh) |
@@ -621,7 +616,6 @@ static void revoke_lo_add(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) | |||
621 | 616 | ||
622 | static void revoke_lo_before_commit(struct gfs2_sbd *sdp) | 617 | static void revoke_lo_before_commit(struct gfs2_sbd *sdp) |
623 | { | 618 | { |
624 | struct gfs2_log_descriptor *ld; | ||
625 | struct gfs2_meta_header *mh; | 619 | struct gfs2_meta_header *mh; |
626 | unsigned int offset; | 620 | unsigned int offset; |
627 | struct list_head *head = &sdp->sd_log_le_revoke; | 621 | struct list_head *head = &sdp->sd_log_le_revoke; |
@@ -634,7 +628,6 @@ static void revoke_lo_before_commit(struct gfs2_sbd *sdp) | |||
634 | 628 | ||
635 | length = gfs2_struct2blk(sdp, sdp->sd_log_num_revoke, sizeof(u64)); | 629 | length = gfs2_struct2blk(sdp, sdp->sd_log_num_revoke, sizeof(u64)); |
636 | page = gfs2_get_log_desc(sdp, GFS2_LOG_DESC_REVOKE, length, sdp->sd_log_num_revoke); | 630 | page = gfs2_get_log_desc(sdp, GFS2_LOG_DESC_REVOKE, length, sdp->sd_log_num_revoke); |
637 | ld = page_address(page); | ||
638 | offset = sizeof(struct gfs2_log_descriptor); | 631 | offset = sizeof(struct gfs2_log_descriptor); |
639 | 632 | ||
640 | list_for_each_entry(bd, head, bd_list) { | 633 | list_for_each_entry(bd, head, bd_list) { |
@@ -777,12 +770,10 @@ static void databuf_lo_add(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) | |||
777 | struct address_space *mapping = bd->bd_bh->b_page->mapping; | 770 | struct address_space *mapping = bd->bd_bh->b_page->mapping; |
778 | struct gfs2_inode *ip = GFS2_I(mapping->host); | 771 | struct gfs2_inode *ip = GFS2_I(mapping->host); |
779 | 772 | ||
780 | lock_buffer(bd->bd_bh); | ||
781 | gfs2_log_lock(sdp); | ||
782 | if (tr) | 773 | if (tr) |
783 | tr->tr_touched = 1; | 774 | tr->tr_touched = 1; |
784 | if (!list_empty(&bd->bd_list)) | 775 | if (!list_empty(&bd->bd_list)) |
785 | goto out; | 776 | return; |
786 | set_bit(GLF_LFLUSH, &bd->bd_gl->gl_flags); | 777 | set_bit(GLF_LFLUSH, &bd->bd_gl->gl_flags); |
787 | set_bit(GLF_DIRTY, &bd->bd_gl->gl_flags); | 778 | set_bit(GLF_DIRTY, &bd->bd_gl->gl_flags); |
788 | if (gfs2_is_jdata(ip)) { | 779 | if (gfs2_is_jdata(ip)) { |
@@ -793,9 +784,6 @@ static void databuf_lo_add(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) | |||
793 | } else { | 784 | } else { |
794 | list_add_tail(&bd->bd_list, &sdp->sd_log_le_ordered); | 785 | list_add_tail(&bd->bd_list, &sdp->sd_log_le_ordered); |
795 | } | 786 | } |
796 | out: | ||
797 | gfs2_log_unlock(sdp); | ||
798 | unlock_buffer(bd->bd_bh); | ||
799 | } | 787 | } |
800 | 788 | ||
801 | /** | 789 | /** |
diff --git a/fs/gfs2/quota.c b/fs/gfs2/quota.c index 40c4b0d42fa8..c5af8e18f27a 100644 --- a/fs/gfs2/quota.c +++ b/fs/gfs2/quota.c | |||
@@ -497,8 +497,11 @@ int gfs2_quota_hold(struct gfs2_inode *ip, u32 uid, u32 gid) | |||
497 | struct gfs2_quota_data **qd; | 497 | struct gfs2_quota_data **qd; |
498 | int error; | 498 | int error; |
499 | 499 | ||
500 | if (ip->i_res == NULL) | 500 | if (ip->i_res == NULL) { |
501 | gfs2_rs_alloc(ip); | 501 | error = gfs2_rs_alloc(ip); |
502 | if (error) | ||
503 | return error; | ||
504 | } | ||
502 | 505 | ||
503 | qd = ip->i_res->rs_qa_qd; | 506 | qd = ip->i_res->rs_qa_qd; |
504 | 507 | ||
diff --git a/fs/gfs2/rgrp.c b/fs/gfs2/rgrp.c index 3cc402ce6fea..38fe18f2f055 100644 --- a/fs/gfs2/rgrp.c +++ b/fs/gfs2/rgrp.c | |||
@@ -553,7 +553,6 @@ void gfs2_free_clones(struct gfs2_rgrpd *rgd) | |||
553 | */ | 553 | */ |
554 | int gfs2_rs_alloc(struct gfs2_inode *ip) | 554 | int gfs2_rs_alloc(struct gfs2_inode *ip) |
555 | { | 555 | { |
556 | int error = 0; | ||
557 | struct gfs2_blkreserv *res; | 556 | struct gfs2_blkreserv *res; |
558 | 557 | ||
559 | if (ip->i_res) | 558 | if (ip->i_res) |
@@ -561,7 +560,7 @@ int gfs2_rs_alloc(struct gfs2_inode *ip) | |||
561 | 560 | ||
562 | res = kmem_cache_zalloc(gfs2_rsrv_cachep, GFP_NOFS); | 561 | res = kmem_cache_zalloc(gfs2_rsrv_cachep, GFP_NOFS); |
563 | if (!res) | 562 | if (!res) |
564 | error = -ENOMEM; | 563 | return -ENOMEM; |
565 | 564 | ||
566 | RB_CLEAR_NODE(&res->rs_node); | 565 | RB_CLEAR_NODE(&res->rs_node); |
567 | 566 | ||
@@ -571,7 +570,7 @@ int gfs2_rs_alloc(struct gfs2_inode *ip) | |||
571 | else | 570 | else |
572 | ip->i_res = res; | 571 | ip->i_res = res; |
573 | up_write(&ip->i_rw_mutex); | 572 | up_write(&ip->i_rw_mutex); |
574 | return error; | 573 | return 0; |
575 | } | 574 | } |
576 | 575 | ||
577 | static void dump_rs(struct seq_file *seq, const struct gfs2_blkreserv *rs) | 576 | static void dump_rs(struct seq_file *seq, const struct gfs2_blkreserv *rs) |
@@ -1263,7 +1262,9 @@ int gfs2_fitrim(struct file *filp, void __user *argp) | |||
1263 | int ret = 0; | 1262 | int ret = 0; |
1264 | u64 amt; | 1263 | u64 amt; |
1265 | u64 trimmed = 0; | 1264 | u64 trimmed = 0; |
1265 | u64 start, end, minlen; | ||
1266 | unsigned int x; | 1266 | unsigned int x; |
1267 | unsigned bs_shift = sdp->sd_sb.sb_bsize_shift; | ||
1267 | 1268 | ||
1268 | if (!capable(CAP_SYS_ADMIN)) | 1269 | if (!capable(CAP_SYS_ADMIN)) |
1269 | return -EPERM; | 1270 | return -EPERM; |
@@ -1271,19 +1272,25 @@ int gfs2_fitrim(struct file *filp, void __user *argp) | |||
1271 | if (!blk_queue_discard(q)) | 1272 | if (!blk_queue_discard(q)) |
1272 | return -EOPNOTSUPP; | 1273 | return -EOPNOTSUPP; |
1273 | 1274 | ||
1274 | if (argp == NULL) { | 1275 | if (copy_from_user(&r, argp, sizeof(r))) |
1275 | r.start = 0; | ||
1276 | r.len = ULLONG_MAX; | ||
1277 | r.minlen = 0; | ||
1278 | } else if (copy_from_user(&r, argp, sizeof(r))) | ||
1279 | return -EFAULT; | 1276 | return -EFAULT; |
1280 | 1277 | ||
1281 | ret = gfs2_rindex_update(sdp); | 1278 | ret = gfs2_rindex_update(sdp); |
1282 | if (ret) | 1279 | if (ret) |
1283 | return ret; | 1280 | return ret; |
1284 | 1281 | ||
1285 | rgd = gfs2_blk2rgrpd(sdp, r.start, 0); | 1282 | start = r.start >> bs_shift; |
1286 | rgd_end = gfs2_blk2rgrpd(sdp, r.start + r.len, 0); | 1283 | end = start + (r.len >> bs_shift); |
1284 | minlen = max_t(u64, r.minlen, | ||
1285 | q->limits.discard_granularity) >> bs_shift; | ||
1286 | |||
1287 | rgd = gfs2_blk2rgrpd(sdp, start, 0); | ||
1288 | rgd_end = gfs2_blk2rgrpd(sdp, end - 1, 0); | ||
1289 | |||
1290 | if (end <= start || | ||
1291 | minlen > sdp->sd_max_rg_data || | ||
1292 | start > rgd_end->rd_data0 + rgd_end->rd_data) | ||
1293 | return -EINVAL; | ||
1287 | 1294 | ||
1288 | while (1) { | 1295 | while (1) { |
1289 | 1296 | ||
@@ -1295,7 +1302,9 @@ int gfs2_fitrim(struct file *filp, void __user *argp) | |||
1295 | /* Trim each bitmap in the rgrp */ | 1302 | /* Trim each bitmap in the rgrp */ |
1296 | for (x = 0; x < rgd->rd_length; x++) { | 1303 | for (x = 0; x < rgd->rd_length; x++) { |
1297 | struct gfs2_bitmap *bi = rgd->rd_bits + x; | 1304 | struct gfs2_bitmap *bi = rgd->rd_bits + x; |
1298 | ret = gfs2_rgrp_send_discards(sdp, rgd->rd_data0, NULL, bi, r.minlen, &amt); | 1305 | ret = gfs2_rgrp_send_discards(sdp, |
1306 | rgd->rd_data0, NULL, bi, minlen, | ||
1307 | &amt); | ||
1299 | if (ret) { | 1308 | if (ret) { |
1300 | gfs2_glock_dq_uninit(&gh); | 1309 | gfs2_glock_dq_uninit(&gh); |
1301 | goto out; | 1310 | goto out; |
@@ -1324,7 +1333,7 @@ int gfs2_fitrim(struct file *filp, void __user *argp) | |||
1324 | 1333 | ||
1325 | out: | 1334 | out: |
1326 | r.len = trimmed << 9; | 1335 | r.len = trimmed << 9; |
1327 | if (argp && copy_to_user(argp, &r, sizeof(r))) | 1336 | if (copy_to_user(argp, &r, sizeof(r))) |
1328 | return -EFAULT; | 1337 | return -EFAULT; |
1329 | 1338 | ||
1330 | return ret; | 1339 | return ret; |
diff --git a/fs/gfs2/super.c b/fs/gfs2/super.c index bc737261f234..d6488674d916 100644 --- a/fs/gfs2/super.c +++ b/fs/gfs2/super.c | |||
@@ -810,7 +810,8 @@ static void gfs2_dirty_inode(struct inode *inode, int flags) | |||
810 | return; | 810 | return; |
811 | } | 811 | } |
812 | need_unlock = 1; | 812 | need_unlock = 1; |
813 | } | 813 | } else if (WARN_ON_ONCE(ip->i_gl->gl_state != LM_ST_EXCLUSIVE)) |
814 | return; | ||
814 | 815 | ||
815 | if (current->journal_info == NULL) { | 816 | if (current->journal_info == NULL) { |
816 | ret = gfs2_trans_begin(sdp, RES_DINODE, 0); | 817 | ret = gfs2_trans_begin(sdp, RES_DINODE, 0); |
diff --git a/fs/gfs2/trans.c b/fs/gfs2/trans.c index adbd27875ef9..413627072f36 100644 --- a/fs/gfs2/trans.c +++ b/fs/gfs2/trans.c | |||
@@ -155,14 +155,22 @@ void gfs2_trans_add_bh(struct gfs2_glock *gl, struct buffer_head *bh, int meta) | |||
155 | struct gfs2_sbd *sdp = gl->gl_sbd; | 155 | struct gfs2_sbd *sdp = gl->gl_sbd; |
156 | struct gfs2_bufdata *bd; | 156 | struct gfs2_bufdata *bd; |
157 | 157 | ||
158 | lock_buffer(bh); | ||
159 | gfs2_log_lock(sdp); | ||
158 | bd = bh->b_private; | 160 | bd = bh->b_private; |
159 | if (bd) | 161 | if (bd) |
160 | gfs2_assert(sdp, bd->bd_gl == gl); | 162 | gfs2_assert(sdp, bd->bd_gl == gl); |
161 | else { | 163 | else { |
164 | gfs2_log_unlock(sdp); | ||
165 | unlock_buffer(bh); | ||
162 | gfs2_attach_bufdata(gl, bh, meta); | 166 | gfs2_attach_bufdata(gl, bh, meta); |
163 | bd = bh->b_private; | 167 | bd = bh->b_private; |
168 | lock_buffer(bh); | ||
169 | gfs2_log_lock(sdp); | ||
164 | } | 170 | } |
165 | lops_add(sdp, bd); | 171 | lops_add(sdp, bd); |
172 | gfs2_log_unlock(sdp); | ||
173 | unlock_buffer(bh); | ||
166 | } | 174 | } |
167 | 175 | ||
168 | void gfs2_trans_add_revoke(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) | 176 | void gfs2_trans_add_revoke(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) |
diff --git a/fs/nfs/dns_resolve.c b/fs/nfs/dns_resolve.c index 31c26c4dcc23..ca4b11ec87a2 100644 --- a/fs/nfs/dns_resolve.c +++ b/fs/nfs/dns_resolve.c | |||
@@ -217,7 +217,7 @@ static int nfs_dns_parse(struct cache_detail *cd, char *buf, int buflen) | |||
217 | { | 217 | { |
218 | char buf1[NFS_DNS_HOSTNAME_MAXLEN+1]; | 218 | char buf1[NFS_DNS_HOSTNAME_MAXLEN+1]; |
219 | struct nfs_dns_ent key, *item; | 219 | struct nfs_dns_ent key, *item; |
220 | unsigned long ttl; | 220 | unsigned int ttl; |
221 | ssize_t len; | 221 | ssize_t len; |
222 | int ret = -EINVAL; | 222 | int ret = -EINVAL; |
223 | 223 | ||
@@ -240,7 +240,8 @@ static int nfs_dns_parse(struct cache_detail *cd, char *buf, int buflen) | |||
240 | key.namelen = len; | 240 | key.namelen = len; |
241 | memset(&key.h, 0, sizeof(key.h)); | 241 | memset(&key.h, 0, sizeof(key.h)); |
242 | 242 | ||
243 | ttl = get_expiry(&buf); | 243 | if (get_uint(&buf, &ttl) < 0) |
244 | goto out; | ||
244 | if (ttl == 0) | 245 | if (ttl == 0) |
245 | goto out; | 246 | goto out; |
246 | key.h.expiry_time = ttl + seconds_since_boot(); | 247 | key.h.expiry_time = ttl + seconds_since_boot(); |
diff --git a/fs/nfs/inode.c b/fs/nfs/inode.c index 5c7325c5c5e6..6fa01aea2488 100644 --- a/fs/nfs/inode.c +++ b/fs/nfs/inode.c | |||
@@ -685,7 +685,10 @@ static void __put_nfs_open_context(struct nfs_open_context *ctx, int is_sync) | |||
685 | if (ctx->cred != NULL) | 685 | if (ctx->cred != NULL) |
686 | put_rpccred(ctx->cred); | 686 | put_rpccred(ctx->cred); |
687 | dput(ctx->dentry); | 687 | dput(ctx->dentry); |
688 | nfs_sb_deactive(sb); | 688 | if (is_sync) |
689 | nfs_sb_deactive(sb); | ||
690 | else | ||
691 | nfs_sb_deactive_async(sb); | ||
689 | kfree(ctx->mdsthreshold); | 692 | kfree(ctx->mdsthreshold); |
690 | kfree(ctx); | 693 | kfree(ctx); |
691 | } | 694 | } |
diff --git a/fs/nfs/internal.h b/fs/nfs/internal.h index 59b133c5d652..05521cadac2e 100644 --- a/fs/nfs/internal.h +++ b/fs/nfs/internal.h | |||
@@ -351,10 +351,12 @@ extern int __init register_nfs_fs(void); | |||
351 | extern void __exit unregister_nfs_fs(void); | 351 | extern void __exit unregister_nfs_fs(void); |
352 | extern void nfs_sb_active(struct super_block *sb); | 352 | extern void nfs_sb_active(struct super_block *sb); |
353 | extern void nfs_sb_deactive(struct super_block *sb); | 353 | extern void nfs_sb_deactive(struct super_block *sb); |
354 | extern void nfs_sb_deactive_async(struct super_block *sb); | ||
354 | 355 | ||
355 | /* namespace.c */ | 356 | /* namespace.c */ |
357 | #define NFS_PATH_CANONICAL 1 | ||
356 | extern char *nfs_path(char **p, struct dentry *dentry, | 358 | extern char *nfs_path(char **p, struct dentry *dentry, |
357 | char *buffer, ssize_t buflen); | 359 | char *buffer, ssize_t buflen, unsigned flags); |
358 | extern struct vfsmount *nfs_d_automount(struct path *path); | 360 | extern struct vfsmount *nfs_d_automount(struct path *path); |
359 | struct vfsmount *nfs_submount(struct nfs_server *, struct dentry *, | 361 | struct vfsmount *nfs_submount(struct nfs_server *, struct dentry *, |
360 | struct nfs_fh *, struct nfs_fattr *); | 362 | struct nfs_fh *, struct nfs_fattr *); |
@@ -498,7 +500,7 @@ static inline char *nfs_devname(struct dentry *dentry, | |||
498 | char *buffer, ssize_t buflen) | 500 | char *buffer, ssize_t buflen) |
499 | { | 501 | { |
500 | char *dummy; | 502 | char *dummy; |
501 | return nfs_path(&dummy, dentry, buffer, buflen); | 503 | return nfs_path(&dummy, dentry, buffer, buflen, NFS_PATH_CANONICAL); |
502 | } | 504 | } |
503 | 505 | ||
504 | /* | 506 | /* |
diff --git a/fs/nfs/mount_clnt.c b/fs/nfs/mount_clnt.c index 8e65c7f1f87c..015f71f8f62c 100644 --- a/fs/nfs/mount_clnt.c +++ b/fs/nfs/mount_clnt.c | |||
@@ -181,7 +181,7 @@ int nfs_mount(struct nfs_mount_request *info) | |||
181 | else | 181 | else |
182 | msg.rpc_proc = &mnt_clnt->cl_procinfo[MOUNTPROC_MNT]; | 182 | msg.rpc_proc = &mnt_clnt->cl_procinfo[MOUNTPROC_MNT]; |
183 | 183 | ||
184 | status = rpc_call_sync(mnt_clnt, &msg, 0); | 184 | status = rpc_call_sync(mnt_clnt, &msg, RPC_TASK_SOFT|RPC_TASK_TIMEOUT); |
185 | rpc_shutdown_client(mnt_clnt); | 185 | rpc_shutdown_client(mnt_clnt); |
186 | 186 | ||
187 | if (status < 0) | 187 | if (status < 0) |
diff --git a/fs/nfs/namespace.c b/fs/nfs/namespace.c index 655925373b91..dd057bc6b65b 100644 --- a/fs/nfs/namespace.c +++ b/fs/nfs/namespace.c | |||
@@ -33,6 +33,7 @@ int nfs_mountpoint_expiry_timeout = 500 * HZ; | |||
33 | * @dentry - pointer to dentry | 33 | * @dentry - pointer to dentry |
34 | * @buffer - result buffer | 34 | * @buffer - result buffer |
35 | * @buflen - length of buffer | 35 | * @buflen - length of buffer |
36 | * @flags - options (see below) | ||
36 | * | 37 | * |
37 | * Helper function for constructing the server pathname | 38 | * Helper function for constructing the server pathname |
38 | * by arbitrary hashed dentry. | 39 | * by arbitrary hashed dentry. |
@@ -40,8 +41,14 @@ int nfs_mountpoint_expiry_timeout = 500 * HZ; | |||
40 | * This is mainly for use in figuring out the path on the | 41 | * This is mainly for use in figuring out the path on the |
41 | * server side when automounting on top of an existing partition | 42 | * server side when automounting on top of an existing partition |
42 | * and in generating /proc/mounts and friends. | 43 | * and in generating /proc/mounts and friends. |
44 | * | ||
45 | * Supported flags: | ||
46 | * NFS_PATH_CANONICAL: ensure there is exactly one slash after | ||
47 | * the original device (export) name | ||
48 | * (if unset, the original name is returned verbatim) | ||
43 | */ | 49 | */ |
44 | char *nfs_path(char **p, struct dentry *dentry, char *buffer, ssize_t buflen) | 50 | char *nfs_path(char **p, struct dentry *dentry, char *buffer, ssize_t buflen, |
51 | unsigned flags) | ||
45 | { | 52 | { |
46 | char *end; | 53 | char *end; |
47 | int namelen; | 54 | int namelen; |
@@ -74,7 +81,7 @@ rename_retry: | |||
74 | rcu_read_unlock(); | 81 | rcu_read_unlock(); |
75 | goto rename_retry; | 82 | goto rename_retry; |
76 | } | 83 | } |
77 | if (*end != '/') { | 84 | if ((flags & NFS_PATH_CANONICAL) && *end != '/') { |
78 | if (--buflen < 0) { | 85 | if (--buflen < 0) { |
79 | spin_unlock(&dentry->d_lock); | 86 | spin_unlock(&dentry->d_lock); |
80 | rcu_read_unlock(); | 87 | rcu_read_unlock(); |
@@ -91,9 +98,11 @@ rename_retry: | |||
91 | return end; | 98 | return end; |
92 | } | 99 | } |
93 | namelen = strlen(base); | 100 | namelen = strlen(base); |
94 | /* Strip off excess slashes in base string */ | 101 | if (flags & NFS_PATH_CANONICAL) { |
95 | while (namelen > 0 && base[namelen - 1] == '/') | 102 | /* Strip off excess slashes in base string */ |
96 | namelen--; | 103 | while (namelen > 0 && base[namelen - 1] == '/') |
104 | namelen--; | ||
105 | } | ||
97 | buflen -= namelen; | 106 | buflen -= namelen; |
98 | if (buflen < 0) { | 107 | if (buflen < 0) { |
99 | spin_unlock(&dentry->d_lock); | 108 | spin_unlock(&dentry->d_lock); |
diff --git a/fs/nfs/nfs4namespace.c b/fs/nfs/nfs4namespace.c index 79fbb61ce202..1e09eb78543b 100644 --- a/fs/nfs/nfs4namespace.c +++ b/fs/nfs/nfs4namespace.c | |||
@@ -81,7 +81,8 @@ static char *nfs_path_component(const char *nfspath, const char *end) | |||
81 | static char *nfs4_path(struct dentry *dentry, char *buffer, ssize_t buflen) | 81 | static char *nfs4_path(struct dentry *dentry, char *buffer, ssize_t buflen) |
82 | { | 82 | { |
83 | char *limit; | 83 | char *limit; |
84 | char *path = nfs_path(&limit, dentry, buffer, buflen); | 84 | char *path = nfs_path(&limit, dentry, buffer, buflen, |
85 | NFS_PATH_CANONICAL); | ||
85 | if (!IS_ERR(path)) { | 86 | if (!IS_ERR(path)) { |
86 | char *path_component = nfs_path_component(path, limit); | 87 | char *path_component = nfs_path_component(path, limit); |
87 | if (path_component) | 88 | if (path_component) |
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c index 68b21d81b7ac..5eec4429970c 100644 --- a/fs/nfs/nfs4proc.c +++ b/fs/nfs/nfs4proc.c | |||
@@ -339,8 +339,7 @@ static int nfs4_handle_exception(struct nfs_server *server, int errorcode, struc | |||
339 | dprintk("%s ERROR: %d Reset session\n", __func__, | 339 | dprintk("%s ERROR: %d Reset session\n", __func__, |
340 | errorcode); | 340 | errorcode); |
341 | nfs4_schedule_session_recovery(clp->cl_session, errorcode); | 341 | nfs4_schedule_session_recovery(clp->cl_session, errorcode); |
342 | exception->retry = 1; | 342 | goto wait_on_recovery; |
343 | break; | ||
344 | #endif /* defined(CONFIG_NFS_V4_1) */ | 343 | #endif /* defined(CONFIG_NFS_V4_1) */ |
345 | case -NFS4ERR_FILE_OPEN: | 344 | case -NFS4ERR_FILE_OPEN: |
346 | if (exception->timeout > HZ) { | 345 | if (exception->timeout > HZ) { |
@@ -1572,9 +1571,11 @@ static void nfs4_open_prepare(struct rpc_task *task, void *calldata) | |||
1572 | data->timestamp = jiffies; | 1571 | data->timestamp = jiffies; |
1573 | if (nfs4_setup_sequence(data->o_arg.server, | 1572 | if (nfs4_setup_sequence(data->o_arg.server, |
1574 | &data->o_arg.seq_args, | 1573 | &data->o_arg.seq_args, |
1575 | &data->o_res.seq_res, task)) | 1574 | &data->o_res.seq_res, |
1576 | return; | 1575 | task) != 0) |
1577 | rpc_call_start(task); | 1576 | nfs_release_seqid(data->o_arg.seqid); |
1577 | else | ||
1578 | rpc_call_start(task); | ||
1578 | return; | 1579 | return; |
1579 | unlock_no_action: | 1580 | unlock_no_action: |
1580 | rcu_read_unlock(); | 1581 | rcu_read_unlock(); |
@@ -1748,7 +1749,7 @@ static int nfs4_opendata_access(struct rpc_cred *cred, | |||
1748 | 1749 | ||
1749 | /* even though OPEN succeeded, access is denied. Close the file */ | 1750 | /* even though OPEN succeeded, access is denied. Close the file */ |
1750 | nfs4_close_state(state, fmode); | 1751 | nfs4_close_state(state, fmode); |
1751 | return -NFS4ERR_ACCESS; | 1752 | return -EACCES; |
1752 | } | 1753 | } |
1753 | 1754 | ||
1754 | /* | 1755 | /* |
@@ -2196,7 +2197,7 @@ static void nfs4_free_closedata(void *data) | |||
2196 | nfs4_put_open_state(calldata->state); | 2197 | nfs4_put_open_state(calldata->state); |
2197 | nfs_free_seqid(calldata->arg.seqid); | 2198 | nfs_free_seqid(calldata->arg.seqid); |
2198 | nfs4_put_state_owner(sp); | 2199 | nfs4_put_state_owner(sp); |
2199 | nfs_sb_deactive(sb); | 2200 | nfs_sb_deactive_async(sb); |
2200 | kfree(calldata); | 2201 | kfree(calldata); |
2201 | } | 2202 | } |
2202 | 2203 | ||
@@ -2296,9 +2297,10 @@ static void nfs4_close_prepare(struct rpc_task *task, void *data) | |||
2296 | if (nfs4_setup_sequence(NFS_SERVER(inode), | 2297 | if (nfs4_setup_sequence(NFS_SERVER(inode), |
2297 | &calldata->arg.seq_args, | 2298 | &calldata->arg.seq_args, |
2298 | &calldata->res.seq_res, | 2299 | &calldata->res.seq_res, |
2299 | task)) | 2300 | task) != 0) |
2300 | goto out; | 2301 | nfs_release_seqid(calldata->arg.seqid); |
2301 | rpc_call_start(task); | 2302 | else |
2303 | rpc_call_start(task); | ||
2302 | out: | 2304 | out: |
2303 | dprintk("%s: done!\n", __func__); | 2305 | dprintk("%s: done!\n", __func__); |
2304 | } | 2306 | } |
@@ -4529,6 +4531,7 @@ static void nfs4_locku_done(struct rpc_task *task, void *data) | |||
4529 | if (nfs4_async_handle_error(task, calldata->server, NULL) == -EAGAIN) | 4531 | if (nfs4_async_handle_error(task, calldata->server, NULL) == -EAGAIN) |
4530 | rpc_restart_call_prepare(task); | 4532 | rpc_restart_call_prepare(task); |
4531 | } | 4533 | } |
4534 | nfs_release_seqid(calldata->arg.seqid); | ||
4532 | } | 4535 | } |
4533 | 4536 | ||
4534 | static void nfs4_locku_prepare(struct rpc_task *task, void *data) | 4537 | static void nfs4_locku_prepare(struct rpc_task *task, void *data) |
@@ -4545,9 +4548,11 @@ static void nfs4_locku_prepare(struct rpc_task *task, void *data) | |||
4545 | calldata->timestamp = jiffies; | 4548 | calldata->timestamp = jiffies; |
4546 | if (nfs4_setup_sequence(calldata->server, | 4549 | if (nfs4_setup_sequence(calldata->server, |
4547 | &calldata->arg.seq_args, | 4550 | &calldata->arg.seq_args, |
4548 | &calldata->res.seq_res, task)) | 4551 | &calldata->res.seq_res, |
4549 | return; | 4552 | task) != 0) |
4550 | rpc_call_start(task); | 4553 | nfs_release_seqid(calldata->arg.seqid); |
4554 | else | ||
4555 | rpc_call_start(task); | ||
4551 | } | 4556 | } |
4552 | 4557 | ||
4553 | static const struct rpc_call_ops nfs4_locku_ops = { | 4558 | static const struct rpc_call_ops nfs4_locku_ops = { |
@@ -4692,7 +4697,7 @@ static void nfs4_lock_prepare(struct rpc_task *task, void *calldata) | |||
4692 | /* Do we need to do an open_to_lock_owner? */ | 4697 | /* Do we need to do an open_to_lock_owner? */ |
4693 | if (!(data->arg.lock_seqid->sequence->flags & NFS_SEQID_CONFIRMED)) { | 4698 | if (!(data->arg.lock_seqid->sequence->flags & NFS_SEQID_CONFIRMED)) { |
4694 | if (nfs_wait_on_sequence(data->arg.open_seqid, task) != 0) | 4699 | if (nfs_wait_on_sequence(data->arg.open_seqid, task) != 0) |
4695 | return; | 4700 | goto out_release_lock_seqid; |
4696 | data->arg.open_stateid = &state->stateid; | 4701 | data->arg.open_stateid = &state->stateid; |
4697 | data->arg.new_lock_owner = 1; | 4702 | data->arg.new_lock_owner = 1; |
4698 | data->res.open_seqid = data->arg.open_seqid; | 4703 | data->res.open_seqid = data->arg.open_seqid; |
@@ -4701,10 +4706,15 @@ static void nfs4_lock_prepare(struct rpc_task *task, void *calldata) | |||
4701 | data->timestamp = jiffies; | 4706 | data->timestamp = jiffies; |
4702 | if (nfs4_setup_sequence(data->server, | 4707 | if (nfs4_setup_sequence(data->server, |
4703 | &data->arg.seq_args, | 4708 | &data->arg.seq_args, |
4704 | &data->res.seq_res, task)) | 4709 | &data->res.seq_res, |
4710 | task) == 0) { | ||
4711 | rpc_call_start(task); | ||
4705 | return; | 4712 | return; |
4706 | rpc_call_start(task); | 4713 | } |
4707 | dprintk("%s: done!, ret = %d\n", __func__, data->rpc_status); | 4714 | nfs_release_seqid(data->arg.open_seqid); |
4715 | out_release_lock_seqid: | ||
4716 | nfs_release_seqid(data->arg.lock_seqid); | ||
4717 | dprintk("%s: done!, ret = %d\n", __func__, task->tk_status); | ||
4708 | } | 4718 | } |
4709 | 4719 | ||
4710 | static void nfs4_recover_lock_prepare(struct rpc_task *task, void *calldata) | 4720 | static void nfs4_recover_lock_prepare(struct rpc_task *task, void *calldata) |
@@ -5667,7 +5677,7 @@ static void nfs4_add_and_init_slots(struct nfs4_slot_table *tbl, | |||
5667 | tbl->slots = new; | 5677 | tbl->slots = new; |
5668 | tbl->max_slots = max_slots; | 5678 | tbl->max_slots = max_slots; |
5669 | } | 5679 | } |
5670 | tbl->highest_used_slotid = -1; /* no slot is currently used */ | 5680 | tbl->highest_used_slotid = NFS4_NO_SLOT; |
5671 | for (i = 0; i < tbl->max_slots; i++) | 5681 | for (i = 0; i < tbl->max_slots; i++) |
5672 | tbl->slots[i].seq_nr = ivalue; | 5682 | tbl->slots[i].seq_nr = ivalue; |
5673 | spin_unlock(&tbl->slot_tbl_lock); | 5683 | spin_unlock(&tbl->slot_tbl_lock); |
diff --git a/fs/nfs/pnfs.c b/fs/nfs/pnfs.c index fe624c91bd00..2878f97bd78d 100644 --- a/fs/nfs/pnfs.c +++ b/fs/nfs/pnfs.c | |||
@@ -925,8 +925,8 @@ pnfs_find_alloc_layout(struct inode *ino, | |||
925 | if (likely(nfsi->layout == NULL)) { /* Won the race? */ | 925 | if (likely(nfsi->layout == NULL)) { /* Won the race? */ |
926 | nfsi->layout = new; | 926 | nfsi->layout = new; |
927 | return new; | 927 | return new; |
928 | } | 928 | } else if (new != NULL) |
929 | pnfs_free_layout_hdr(new); | 929 | pnfs_free_layout_hdr(new); |
930 | out_existing: | 930 | out_existing: |
931 | pnfs_get_layout_hdr(nfsi->layout); | 931 | pnfs_get_layout_hdr(nfsi->layout); |
932 | return nfsi->layout; | 932 | return nfsi->layout; |
diff --git a/fs/nfs/super.c b/fs/nfs/super.c index e831bce49766..652d3f7176a9 100644 --- a/fs/nfs/super.c +++ b/fs/nfs/super.c | |||
@@ -54,6 +54,7 @@ | |||
54 | #include <linux/parser.h> | 54 | #include <linux/parser.h> |
55 | #include <linux/nsproxy.h> | 55 | #include <linux/nsproxy.h> |
56 | #include <linux/rcupdate.h> | 56 | #include <linux/rcupdate.h> |
57 | #include <linux/kthread.h> | ||
57 | 58 | ||
58 | #include <asm/uaccess.h> | 59 | #include <asm/uaccess.h> |
59 | 60 | ||
@@ -415,6 +416,54 @@ void nfs_sb_deactive(struct super_block *sb) | |||
415 | } | 416 | } |
416 | EXPORT_SYMBOL_GPL(nfs_sb_deactive); | 417 | EXPORT_SYMBOL_GPL(nfs_sb_deactive); |
417 | 418 | ||
419 | static int nfs_deactivate_super_async_work(void *ptr) | ||
420 | { | ||
421 | struct super_block *sb = ptr; | ||
422 | |||
423 | deactivate_super(sb); | ||
424 | module_put_and_exit(0); | ||
425 | return 0; | ||
426 | } | ||
427 | |||
428 | /* | ||
429 | * same effect as deactivate_super, but will do final unmount in kthread | ||
430 | * context | ||
431 | */ | ||
432 | static void nfs_deactivate_super_async(struct super_block *sb) | ||
433 | { | ||
434 | struct task_struct *task; | ||
435 | char buf[INET6_ADDRSTRLEN + 1]; | ||
436 | struct nfs_server *server = NFS_SB(sb); | ||
437 | struct nfs_client *clp = server->nfs_client; | ||
438 | |||
439 | if (!atomic_add_unless(&sb->s_active, -1, 1)) { | ||
440 | rcu_read_lock(); | ||
441 | snprintf(buf, sizeof(buf), | ||
442 | rpc_peeraddr2str(clp->cl_rpcclient, RPC_DISPLAY_ADDR)); | ||
443 | rcu_read_unlock(); | ||
444 | |||
445 | __module_get(THIS_MODULE); | ||
446 | task = kthread_run(nfs_deactivate_super_async_work, sb, | ||
447 | "%s-deactivate-super", buf); | ||
448 | if (IS_ERR(task)) { | ||
449 | pr_err("%s: kthread_run: %ld\n", | ||
450 | __func__, PTR_ERR(task)); | ||
451 | /* make synchronous call and hope for the best */ | ||
452 | deactivate_super(sb); | ||
453 | module_put(THIS_MODULE); | ||
454 | } | ||
455 | } | ||
456 | } | ||
457 | |||
458 | void nfs_sb_deactive_async(struct super_block *sb) | ||
459 | { | ||
460 | struct nfs_server *server = NFS_SB(sb); | ||
461 | |||
462 | if (atomic_dec_and_test(&server->active)) | ||
463 | nfs_deactivate_super_async(sb); | ||
464 | } | ||
465 | EXPORT_SYMBOL_GPL(nfs_sb_deactive_async); | ||
466 | |||
418 | /* | 467 | /* |
419 | * Deliver file system statistics to userspace | 468 | * Deliver file system statistics to userspace |
420 | */ | 469 | */ |
@@ -771,7 +820,7 @@ int nfs_show_devname(struct seq_file *m, struct dentry *root) | |||
771 | int err = 0; | 820 | int err = 0; |
772 | if (!page) | 821 | if (!page) |
773 | return -ENOMEM; | 822 | return -ENOMEM; |
774 | devname = nfs_path(&dummy, root, page, PAGE_SIZE); | 823 | devname = nfs_path(&dummy, root, page, PAGE_SIZE, 0); |
775 | if (IS_ERR(devname)) | 824 | if (IS_ERR(devname)) |
776 | err = PTR_ERR(devname); | 825 | err = PTR_ERR(devname); |
777 | else | 826 | else |
diff --git a/fs/nfs/unlink.c b/fs/nfs/unlink.c index 13cea637eff8..3f79c77153b8 100644 --- a/fs/nfs/unlink.c +++ b/fs/nfs/unlink.c | |||
@@ -95,7 +95,7 @@ static void nfs_async_unlink_release(void *calldata) | |||
95 | 95 | ||
96 | nfs_dec_sillycount(data->dir); | 96 | nfs_dec_sillycount(data->dir); |
97 | nfs_free_unlinkdata(data); | 97 | nfs_free_unlinkdata(data); |
98 | nfs_sb_deactive(sb); | 98 | nfs_sb_deactive_async(sb); |
99 | } | 99 | } |
100 | 100 | ||
101 | static void nfs_unlink_prepare(struct rpc_task *task, void *calldata) | 101 | static void nfs_unlink_prepare(struct rpc_task *task, void *calldata) |
diff --git a/fs/notify/fanotify/fanotify.c b/fs/notify/fanotify/fanotify.c index f35794b97e8e..a50636025364 100644 --- a/fs/notify/fanotify/fanotify.c +++ b/fs/notify/fanotify/fanotify.c | |||
@@ -21,6 +21,7 @@ static bool should_merge(struct fsnotify_event *old, struct fsnotify_event *new) | |||
21 | if ((old->path.mnt == new->path.mnt) && | 21 | if ((old->path.mnt == new->path.mnt) && |
22 | (old->path.dentry == new->path.dentry)) | 22 | (old->path.dentry == new->path.dentry)) |
23 | return true; | 23 | return true; |
24 | break; | ||
24 | case (FSNOTIFY_EVENT_NONE): | 25 | case (FSNOTIFY_EVENT_NONE): |
25 | return true; | 26 | return true; |
26 | default: | 27 | default: |
diff --git a/fs/xfs/xfs_alloc.c b/fs/xfs/xfs_alloc.c index 4f33c32affe3..335206a9c698 100644 --- a/fs/xfs/xfs_alloc.c +++ b/fs/xfs/xfs_alloc.c | |||
@@ -1866,6 +1866,7 @@ xfs_alloc_fix_freelist( | |||
1866 | /* | 1866 | /* |
1867 | * Initialize the args structure. | 1867 | * Initialize the args structure. |
1868 | */ | 1868 | */ |
1869 | memset(&targs, 0, sizeof(targs)); | ||
1869 | targs.tp = tp; | 1870 | targs.tp = tp; |
1870 | targs.mp = mp; | 1871 | targs.mp = mp; |
1871 | targs.agbp = agbp; | 1872 | targs.agbp = agbp; |
@@ -2207,7 +2208,7 @@ xfs_alloc_read_agf( | |||
2207 | * group or loop over the allocation groups to find the result. | 2208 | * group or loop over the allocation groups to find the result. |
2208 | */ | 2209 | */ |
2209 | int /* error */ | 2210 | int /* error */ |
2210 | __xfs_alloc_vextent( | 2211 | xfs_alloc_vextent( |
2211 | xfs_alloc_arg_t *args) /* allocation argument structure */ | 2212 | xfs_alloc_arg_t *args) /* allocation argument structure */ |
2212 | { | 2213 | { |
2213 | xfs_agblock_t agsize; /* allocation group size */ | 2214 | xfs_agblock_t agsize; /* allocation group size */ |
@@ -2417,46 +2418,6 @@ error0: | |||
2417 | return error; | 2418 | return error; |
2418 | } | 2419 | } |
2419 | 2420 | ||
2420 | static void | ||
2421 | xfs_alloc_vextent_worker( | ||
2422 | struct work_struct *work) | ||
2423 | { | ||
2424 | struct xfs_alloc_arg *args = container_of(work, | ||
2425 | struct xfs_alloc_arg, work); | ||
2426 | unsigned long pflags; | ||
2427 | |||
2428 | /* we are in a transaction context here */ | ||
2429 | current_set_flags_nested(&pflags, PF_FSTRANS); | ||
2430 | |||
2431 | args->result = __xfs_alloc_vextent(args); | ||
2432 | complete(args->done); | ||
2433 | |||
2434 | current_restore_flags_nested(&pflags, PF_FSTRANS); | ||
2435 | } | ||
2436 | |||
2437 | /* | ||
2438 | * Data allocation requests often come in with little stack to work on. Push | ||
2439 | * them off to a worker thread so there is lots of stack to use. Metadata | ||
2440 | * requests, OTOH, are generally from low stack usage paths, so avoid the | ||
2441 | * context switch overhead here. | ||
2442 | */ | ||
2443 | int | ||
2444 | xfs_alloc_vextent( | ||
2445 | struct xfs_alloc_arg *args) | ||
2446 | { | ||
2447 | DECLARE_COMPLETION_ONSTACK(done); | ||
2448 | |||
2449 | if (!args->userdata) | ||
2450 | return __xfs_alloc_vextent(args); | ||
2451 | |||
2452 | |||
2453 | args->done = &done; | ||
2454 | INIT_WORK_ONSTACK(&args->work, xfs_alloc_vextent_worker); | ||
2455 | queue_work(xfs_alloc_wq, &args->work); | ||
2456 | wait_for_completion(&done); | ||
2457 | return args->result; | ||
2458 | } | ||
2459 | |||
2460 | /* | 2421 | /* |
2461 | * Free an extent. | 2422 | * Free an extent. |
2462 | * Just break up the extent address and hand off to xfs_free_ag_extent | 2423 | * Just break up the extent address and hand off to xfs_free_ag_extent |
diff --git a/fs/xfs/xfs_alloc.h b/fs/xfs/xfs_alloc.h index 93be4a667ca1..feacb061bab7 100644 --- a/fs/xfs/xfs_alloc.h +++ b/fs/xfs/xfs_alloc.h | |||
@@ -120,9 +120,6 @@ typedef struct xfs_alloc_arg { | |||
120 | char isfl; /* set if is freelist blocks - !acctg */ | 120 | char isfl; /* set if is freelist blocks - !acctg */ |
121 | char userdata; /* set if this is user data */ | 121 | char userdata; /* set if this is user data */ |
122 | xfs_fsblock_t firstblock; /* io first block allocated */ | 122 | xfs_fsblock_t firstblock; /* io first block allocated */ |
123 | struct completion *done; | ||
124 | struct work_struct work; | ||
125 | int result; | ||
126 | } xfs_alloc_arg_t; | 123 | } xfs_alloc_arg_t; |
127 | 124 | ||
128 | /* | 125 | /* |
diff --git a/fs/xfs/xfs_alloc_btree.c b/fs/xfs/xfs_alloc_btree.c index f1647caace8f..f7876c6d6165 100644 --- a/fs/xfs/xfs_alloc_btree.c +++ b/fs/xfs/xfs_alloc_btree.c | |||
@@ -121,6 +121,8 @@ xfs_allocbt_free_block( | |||
121 | xfs_extent_busy_insert(cur->bc_tp, be32_to_cpu(agf->agf_seqno), bno, 1, | 121 | xfs_extent_busy_insert(cur->bc_tp, be32_to_cpu(agf->agf_seqno), bno, 1, |
122 | XFS_EXTENT_BUSY_SKIP_DISCARD); | 122 | XFS_EXTENT_BUSY_SKIP_DISCARD); |
123 | xfs_trans_agbtree_delta(cur->bc_tp, -1); | 123 | xfs_trans_agbtree_delta(cur->bc_tp, -1); |
124 | |||
125 | xfs_trans_binval(cur->bc_tp, bp); | ||
124 | return 0; | 126 | return 0; |
125 | } | 127 | } |
126 | 128 | ||
diff --git a/fs/xfs/xfs_bmap.c b/fs/xfs/xfs_bmap.c index 848ffa77707b..83d0cf3df930 100644 --- a/fs/xfs/xfs_bmap.c +++ b/fs/xfs/xfs_bmap.c | |||
@@ -2437,6 +2437,7 @@ xfs_bmap_btalloc( | |||
2437 | * Normal allocation, done through xfs_alloc_vextent. | 2437 | * Normal allocation, done through xfs_alloc_vextent. |
2438 | */ | 2438 | */ |
2439 | tryagain = isaligned = 0; | 2439 | tryagain = isaligned = 0; |
2440 | memset(&args, 0, sizeof(args)); | ||
2440 | args.tp = ap->tp; | 2441 | args.tp = ap->tp; |
2441 | args.mp = mp; | 2442 | args.mp = mp; |
2442 | args.fsbno = ap->blkno; | 2443 | args.fsbno = ap->blkno; |
@@ -3082,6 +3083,7 @@ xfs_bmap_extents_to_btree( | |||
3082 | * Convert to a btree with two levels, one record in root. | 3083 | * Convert to a btree with two levels, one record in root. |
3083 | */ | 3084 | */ |
3084 | XFS_IFORK_FMT_SET(ip, whichfork, XFS_DINODE_FMT_BTREE); | 3085 | XFS_IFORK_FMT_SET(ip, whichfork, XFS_DINODE_FMT_BTREE); |
3086 | memset(&args, 0, sizeof(args)); | ||
3085 | args.tp = tp; | 3087 | args.tp = tp; |
3086 | args.mp = mp; | 3088 | args.mp = mp; |
3087 | args.firstblock = *firstblock; | 3089 | args.firstblock = *firstblock; |
@@ -3237,6 +3239,7 @@ xfs_bmap_local_to_extents( | |||
3237 | xfs_buf_t *bp; /* buffer for extent block */ | 3239 | xfs_buf_t *bp; /* buffer for extent block */ |
3238 | xfs_bmbt_rec_host_t *ep;/* extent record pointer */ | 3240 | xfs_bmbt_rec_host_t *ep;/* extent record pointer */ |
3239 | 3241 | ||
3242 | memset(&args, 0, sizeof(args)); | ||
3240 | args.tp = tp; | 3243 | args.tp = tp; |
3241 | args.mp = ip->i_mount; | 3244 | args.mp = ip->i_mount; |
3242 | args.firstblock = *firstblock; | 3245 | args.firstblock = *firstblock; |
@@ -4616,12 +4619,11 @@ xfs_bmapi_delay( | |||
4616 | 4619 | ||
4617 | 4620 | ||
4618 | STATIC int | 4621 | STATIC int |
4619 | xfs_bmapi_allocate( | 4622 | __xfs_bmapi_allocate( |
4620 | struct xfs_bmalloca *bma, | 4623 | struct xfs_bmalloca *bma) |
4621 | int flags) | ||
4622 | { | 4624 | { |
4623 | struct xfs_mount *mp = bma->ip->i_mount; | 4625 | struct xfs_mount *mp = bma->ip->i_mount; |
4624 | int whichfork = (flags & XFS_BMAPI_ATTRFORK) ? | 4626 | int whichfork = (bma->flags & XFS_BMAPI_ATTRFORK) ? |
4625 | XFS_ATTR_FORK : XFS_DATA_FORK; | 4627 | XFS_ATTR_FORK : XFS_DATA_FORK; |
4626 | struct xfs_ifork *ifp = XFS_IFORK_PTR(bma->ip, whichfork); | 4628 | struct xfs_ifork *ifp = XFS_IFORK_PTR(bma->ip, whichfork); |
4627 | int tmp_logflags = 0; | 4629 | int tmp_logflags = 0; |
@@ -4654,24 +4656,27 @@ xfs_bmapi_allocate( | |||
4654 | * Indicate if this is the first user data in the file, or just any | 4656 | * Indicate if this is the first user data in the file, or just any |
4655 | * user data. | 4657 | * user data. |
4656 | */ | 4658 | */ |
4657 | if (!(flags & XFS_BMAPI_METADATA)) { | 4659 | if (!(bma->flags & XFS_BMAPI_METADATA)) { |
4658 | bma->userdata = (bma->offset == 0) ? | 4660 | bma->userdata = (bma->offset == 0) ? |
4659 | XFS_ALLOC_INITIAL_USER_DATA : XFS_ALLOC_USERDATA; | 4661 | XFS_ALLOC_INITIAL_USER_DATA : XFS_ALLOC_USERDATA; |
4660 | } | 4662 | } |
4661 | 4663 | ||
4662 | bma->minlen = (flags & XFS_BMAPI_CONTIG) ? bma->length : 1; | 4664 | bma->minlen = (bma->flags & XFS_BMAPI_CONTIG) ? bma->length : 1; |
4663 | 4665 | ||
4664 | /* | 4666 | /* |
4665 | * Only want to do the alignment at the eof if it is userdata and | 4667 | * Only want to do the alignment at the eof if it is userdata and |
4666 | * allocation length is larger than a stripe unit. | 4668 | * allocation length is larger than a stripe unit. |
4667 | */ | 4669 | */ |
4668 | if (mp->m_dalign && bma->length >= mp->m_dalign && | 4670 | if (mp->m_dalign && bma->length >= mp->m_dalign && |
4669 | !(flags & XFS_BMAPI_METADATA) && whichfork == XFS_DATA_FORK) { | 4671 | !(bma->flags & XFS_BMAPI_METADATA) && whichfork == XFS_DATA_FORK) { |
4670 | error = xfs_bmap_isaeof(bma, whichfork); | 4672 | error = xfs_bmap_isaeof(bma, whichfork); |
4671 | if (error) | 4673 | if (error) |
4672 | return error; | 4674 | return error; |
4673 | } | 4675 | } |
4674 | 4676 | ||
4677 | if (bma->flags & XFS_BMAPI_STACK_SWITCH) | ||
4678 | bma->stack_switch = 1; | ||
4679 | |||
4675 | error = xfs_bmap_alloc(bma); | 4680 | error = xfs_bmap_alloc(bma); |
4676 | if (error) | 4681 | if (error) |
4677 | return error; | 4682 | return error; |
@@ -4706,7 +4711,7 @@ xfs_bmapi_allocate( | |||
4706 | * A wasdelay extent has been initialized, so shouldn't be flagged | 4711 | * A wasdelay extent has been initialized, so shouldn't be flagged |
4707 | * as unwritten. | 4712 | * as unwritten. |
4708 | */ | 4713 | */ |
4709 | if (!bma->wasdel && (flags & XFS_BMAPI_PREALLOC) && | 4714 | if (!bma->wasdel && (bma->flags & XFS_BMAPI_PREALLOC) && |
4710 | xfs_sb_version_hasextflgbit(&mp->m_sb)) | 4715 | xfs_sb_version_hasextflgbit(&mp->m_sb)) |
4711 | bma->got.br_state = XFS_EXT_UNWRITTEN; | 4716 | bma->got.br_state = XFS_EXT_UNWRITTEN; |
4712 | 4717 | ||
@@ -4734,6 +4739,45 @@ xfs_bmapi_allocate( | |||
4734 | return 0; | 4739 | return 0; |
4735 | } | 4740 | } |
4736 | 4741 | ||
4742 | static void | ||
4743 | xfs_bmapi_allocate_worker( | ||
4744 | struct work_struct *work) | ||
4745 | { | ||
4746 | struct xfs_bmalloca *args = container_of(work, | ||
4747 | struct xfs_bmalloca, work); | ||
4748 | unsigned long pflags; | ||
4749 | |||
4750 | /* we are in a transaction context here */ | ||
4751 | current_set_flags_nested(&pflags, PF_FSTRANS); | ||
4752 | |||
4753 | args->result = __xfs_bmapi_allocate(args); | ||
4754 | complete(args->done); | ||
4755 | |||
4756 | current_restore_flags_nested(&pflags, PF_FSTRANS); | ||
4757 | } | ||
4758 | |||
4759 | /* | ||
4760 | * Some allocation requests often come in with little stack to work on. Push | ||
4761 | * them off to a worker thread so there is lots of stack to use. Otherwise just | ||
4762 | * call directly to avoid the context switch overhead here. | ||
4763 | */ | ||
4764 | int | ||
4765 | xfs_bmapi_allocate( | ||
4766 | struct xfs_bmalloca *args) | ||
4767 | { | ||
4768 | DECLARE_COMPLETION_ONSTACK(done); | ||
4769 | |||
4770 | if (!args->stack_switch) | ||
4771 | return __xfs_bmapi_allocate(args); | ||
4772 | |||
4773 | |||
4774 | args->done = &done; | ||
4775 | INIT_WORK_ONSTACK(&args->work, xfs_bmapi_allocate_worker); | ||
4776 | queue_work(xfs_alloc_wq, &args->work); | ||
4777 | wait_for_completion(&done); | ||
4778 | return args->result; | ||
4779 | } | ||
4780 | |||
4737 | STATIC int | 4781 | STATIC int |
4738 | xfs_bmapi_convert_unwritten( | 4782 | xfs_bmapi_convert_unwritten( |
4739 | struct xfs_bmalloca *bma, | 4783 | struct xfs_bmalloca *bma, |
@@ -4919,6 +4963,7 @@ xfs_bmapi_write( | |||
4919 | bma.conv = !!(flags & XFS_BMAPI_CONVERT); | 4963 | bma.conv = !!(flags & XFS_BMAPI_CONVERT); |
4920 | bma.wasdel = wasdelay; | 4964 | bma.wasdel = wasdelay; |
4921 | bma.offset = bno; | 4965 | bma.offset = bno; |
4966 | bma.flags = flags; | ||
4922 | 4967 | ||
4923 | /* | 4968 | /* |
4924 | * There's a 32/64 bit type mismatch between the | 4969 | * There's a 32/64 bit type mismatch between the |
@@ -4934,7 +4979,7 @@ xfs_bmapi_write( | |||
4934 | 4979 | ||
4935 | ASSERT(len > 0); | 4980 | ASSERT(len > 0); |
4936 | ASSERT(bma.length > 0); | 4981 | ASSERT(bma.length > 0); |
4937 | error = xfs_bmapi_allocate(&bma, flags); | 4982 | error = xfs_bmapi_allocate(&bma); |
4938 | if (error) | 4983 | if (error) |
4939 | goto error0; | 4984 | goto error0; |
4940 | if (bma.blkno == NULLFSBLOCK) | 4985 | if (bma.blkno == NULLFSBLOCK) |
diff --git a/fs/xfs/xfs_bmap.h b/fs/xfs/xfs_bmap.h index 803b56d7ce16..5f469c3516eb 100644 --- a/fs/xfs/xfs_bmap.h +++ b/fs/xfs/xfs_bmap.h | |||
@@ -77,6 +77,7 @@ typedef struct xfs_bmap_free | |||
77 | * from written to unwritten, otherwise convert from unwritten to written. | 77 | * from written to unwritten, otherwise convert from unwritten to written. |
78 | */ | 78 | */ |
79 | #define XFS_BMAPI_CONVERT 0x040 | 79 | #define XFS_BMAPI_CONVERT 0x040 |
80 | #define XFS_BMAPI_STACK_SWITCH 0x080 | ||
80 | 81 | ||
81 | #define XFS_BMAPI_FLAGS \ | 82 | #define XFS_BMAPI_FLAGS \ |
82 | { XFS_BMAPI_ENTIRE, "ENTIRE" }, \ | 83 | { XFS_BMAPI_ENTIRE, "ENTIRE" }, \ |
@@ -85,7 +86,8 @@ typedef struct xfs_bmap_free | |||
85 | { XFS_BMAPI_PREALLOC, "PREALLOC" }, \ | 86 | { XFS_BMAPI_PREALLOC, "PREALLOC" }, \ |
86 | { XFS_BMAPI_IGSTATE, "IGSTATE" }, \ | 87 | { XFS_BMAPI_IGSTATE, "IGSTATE" }, \ |
87 | { XFS_BMAPI_CONTIG, "CONTIG" }, \ | 88 | { XFS_BMAPI_CONTIG, "CONTIG" }, \ |
88 | { XFS_BMAPI_CONVERT, "CONVERT" } | 89 | { XFS_BMAPI_CONVERT, "CONVERT" }, \ |
90 | { XFS_BMAPI_STACK_SWITCH, "STACK_SWITCH" } | ||
89 | 91 | ||
90 | 92 | ||
91 | static inline int xfs_bmapi_aflag(int w) | 93 | static inline int xfs_bmapi_aflag(int w) |
@@ -133,6 +135,11 @@ typedef struct xfs_bmalloca { | |||
133 | char userdata;/* set if is user data */ | 135 | char userdata;/* set if is user data */ |
134 | char aeof; /* allocated space at eof */ | 136 | char aeof; /* allocated space at eof */ |
135 | char conv; /* overwriting unwritten extents */ | 137 | char conv; /* overwriting unwritten extents */ |
138 | char stack_switch; | ||
139 | int flags; | ||
140 | struct completion *done; | ||
141 | struct work_struct work; | ||
142 | int result; | ||
136 | } xfs_bmalloca_t; | 143 | } xfs_bmalloca_t; |
137 | 144 | ||
138 | /* | 145 | /* |
diff --git a/fs/xfs/xfs_buf_item.c b/fs/xfs/xfs_buf_item.c index a8d0ed911196..becf4a97efc6 100644 --- a/fs/xfs/xfs_buf_item.c +++ b/fs/xfs/xfs_buf_item.c | |||
@@ -526,7 +526,25 @@ xfs_buf_item_unpin( | |||
526 | } | 526 | } |
527 | xfs_buf_relse(bp); | 527 | xfs_buf_relse(bp); |
528 | } else if (freed && remove) { | 528 | } else if (freed && remove) { |
529 | /* | ||
530 | * There are currently two references to the buffer - the active | ||
531 | * LRU reference and the buf log item. What we are about to do | ||
532 | * here - simulate a failed IO completion - requires 3 | ||
533 | * references. | ||
534 | * | ||
535 | * The LRU reference is removed by the xfs_buf_stale() call. The | ||
536 | * buf item reference is removed by the xfs_buf_iodone() | ||
537 | * callback that is run by xfs_buf_do_callbacks() during ioend | ||
538 | * processing (via the bp->b_iodone callback), and then finally | ||
539 | * the ioend processing will drop the IO reference if the buffer | ||
540 | * is marked XBF_ASYNC. | ||
541 | * | ||
542 | * Hence we need to take an additional reference here so that IO | ||
543 | * completion processing doesn't free the buffer prematurely. | ||
544 | */ | ||
529 | xfs_buf_lock(bp); | 545 | xfs_buf_lock(bp); |
546 | xfs_buf_hold(bp); | ||
547 | bp->b_flags |= XBF_ASYNC; | ||
530 | xfs_buf_ioerror(bp, EIO); | 548 | xfs_buf_ioerror(bp, EIO); |
531 | XFS_BUF_UNDONE(bp); | 549 | XFS_BUF_UNDONE(bp); |
532 | xfs_buf_stale(bp); | 550 | xfs_buf_stale(bp); |
diff --git a/fs/xfs/xfs_fsops.c b/fs/xfs/xfs_fsops.c index c25b094efbf7..4beaede43277 100644 --- a/fs/xfs/xfs_fsops.c +++ b/fs/xfs/xfs_fsops.c | |||
@@ -399,9 +399,26 @@ xfs_growfs_data_private( | |||
399 | 399 | ||
400 | /* update secondary superblocks. */ | 400 | /* update secondary superblocks. */ |
401 | for (agno = 1; agno < nagcount; agno++) { | 401 | for (agno = 1; agno < nagcount; agno++) { |
402 | error = xfs_trans_read_buf(mp, NULL, mp->m_ddev_targp, | 402 | error = 0; |
403 | /* | ||
404 | * new secondary superblocks need to be zeroed, not read from | ||
405 | * disk as the contents of the new area we are growing into is | ||
406 | * completely unknown. | ||
407 | */ | ||
408 | if (agno < oagcount) { | ||
409 | error = xfs_trans_read_buf(mp, NULL, mp->m_ddev_targp, | ||
403 | XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)), | 410 | XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)), |
404 | XFS_FSS_TO_BB(mp, 1), 0, &bp); | 411 | XFS_FSS_TO_BB(mp, 1), 0, &bp); |
412 | } else { | ||
413 | bp = xfs_trans_get_buf(NULL, mp->m_ddev_targp, | ||
414 | XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)), | ||
415 | XFS_FSS_TO_BB(mp, 1), 0); | ||
416 | if (bp) | ||
417 | xfs_buf_zero(bp, 0, BBTOB(bp->b_length)); | ||
418 | else | ||
419 | error = ENOMEM; | ||
420 | } | ||
421 | |||
405 | if (error) { | 422 | if (error) { |
406 | xfs_warn(mp, | 423 | xfs_warn(mp, |
407 | "error %d reading secondary superblock for ag %d", | 424 | "error %d reading secondary superblock for ag %d", |
@@ -423,7 +440,7 @@ xfs_growfs_data_private( | |||
423 | break; /* no point in continuing */ | 440 | break; /* no point in continuing */ |
424 | } | 441 | } |
425 | } | 442 | } |
426 | return 0; | 443 | return error; |
427 | 444 | ||
428 | error0: | 445 | error0: |
429 | xfs_trans_cancel(tp, XFS_TRANS_ABORT); | 446 | xfs_trans_cancel(tp, XFS_TRANS_ABORT); |
diff --git a/fs/xfs/xfs_ialloc.c b/fs/xfs/xfs_ialloc.c index 445bf1aef31c..c5c4ef4f2bdb 100644 --- a/fs/xfs/xfs_ialloc.c +++ b/fs/xfs/xfs_ialloc.c | |||
@@ -250,6 +250,7 @@ xfs_ialloc_ag_alloc( | |||
250 | /* boundary */ | 250 | /* boundary */ |
251 | struct xfs_perag *pag; | 251 | struct xfs_perag *pag; |
252 | 252 | ||
253 | memset(&args, 0, sizeof(args)); | ||
253 | args.tp = tp; | 254 | args.tp = tp; |
254 | args.mp = tp->t_mountp; | 255 | args.mp = tp->t_mountp; |
255 | 256 | ||
diff --git a/fs/xfs/xfs_inode.c b/fs/xfs/xfs_inode.c index 2778258fcfa2..1938b41ee9f5 100644 --- a/fs/xfs/xfs_inode.c +++ b/fs/xfs/xfs_inode.c | |||
@@ -1509,7 +1509,8 @@ xfs_ifree_cluster( | |||
1509 | * to mark all the active inodes on the buffer stale. | 1509 | * to mark all the active inodes on the buffer stale. |
1510 | */ | 1510 | */ |
1511 | bp = xfs_trans_get_buf(tp, mp->m_ddev_targp, blkno, | 1511 | bp = xfs_trans_get_buf(tp, mp->m_ddev_targp, blkno, |
1512 | mp->m_bsize * blks_per_cluster, 0); | 1512 | mp->m_bsize * blks_per_cluster, |
1513 | XBF_UNMAPPED); | ||
1513 | 1514 | ||
1514 | if (!bp) | 1515 | if (!bp) |
1515 | return ENOMEM; | 1516 | return ENOMEM; |
diff --git a/fs/xfs/xfs_ioctl.c b/fs/xfs/xfs_ioctl.c index 8305f2ac6773..c1df3c623de2 100644 --- a/fs/xfs/xfs_ioctl.c +++ b/fs/xfs/xfs_ioctl.c | |||
@@ -70,7 +70,7 @@ xfs_find_handle( | |||
70 | int hsize; | 70 | int hsize; |
71 | xfs_handle_t handle; | 71 | xfs_handle_t handle; |
72 | struct inode *inode; | 72 | struct inode *inode; |
73 | struct fd f; | 73 | struct fd f = {0}; |
74 | struct path path; | 74 | struct path path; |
75 | int error; | 75 | int error; |
76 | struct xfs_inode *ip; | 76 | struct xfs_inode *ip; |
diff --git a/fs/xfs/xfs_iomap.c b/fs/xfs/xfs_iomap.c index 973dff6ad935..7f537663365b 100644 --- a/fs/xfs/xfs_iomap.c +++ b/fs/xfs/xfs_iomap.c | |||
@@ -584,7 +584,9 @@ xfs_iomap_write_allocate( | |||
584 | * pointer that the caller gave to us. | 584 | * pointer that the caller gave to us. |
585 | */ | 585 | */ |
586 | error = xfs_bmapi_write(tp, ip, map_start_fsb, | 586 | error = xfs_bmapi_write(tp, ip, map_start_fsb, |
587 | count_fsb, 0, &first_block, 1, | 587 | count_fsb, |
588 | XFS_BMAPI_STACK_SWITCH, | ||
589 | &first_block, 1, | ||
588 | imap, &nimaps, &free_list); | 590 | imap, &nimaps, &free_list); |
589 | if (error) | 591 | if (error) |
590 | goto trans_cancel; | 592 | goto trans_cancel; |
diff --git a/fs/xfs/xfs_log.c b/fs/xfs/xfs_log.c index 7f4f9370d0e7..4dad756962d0 100644 --- a/fs/xfs/xfs_log.c +++ b/fs/xfs/xfs_log.c | |||
@@ -2387,14 +2387,27 @@ xlog_state_do_callback( | |||
2387 | 2387 | ||
2388 | 2388 | ||
2389 | /* | 2389 | /* |
2390 | * update the last_sync_lsn before we drop the | 2390 | * Completion of a iclog IO does not imply that |
2391 | * a transaction has completed, as transactions | ||
2392 | * can be large enough to span many iclogs. We | ||
2393 | * cannot change the tail of the log half way | ||
2394 | * through a transaction as this may be the only | ||
2395 | * transaction in the log and moving th etail to | ||
2396 | * point to the middle of it will prevent | ||
2397 | * recovery from finding the start of the | ||
2398 | * transaction. Hence we should only update the | ||
2399 | * last_sync_lsn if this iclog contains | ||
2400 | * transaction completion callbacks on it. | ||
2401 | * | ||
2402 | * We have to do this before we drop the | ||
2391 | * icloglock to ensure we are the only one that | 2403 | * icloglock to ensure we are the only one that |
2392 | * can update it. | 2404 | * can update it. |
2393 | */ | 2405 | */ |
2394 | ASSERT(XFS_LSN_CMP(atomic64_read(&log->l_last_sync_lsn), | 2406 | ASSERT(XFS_LSN_CMP(atomic64_read(&log->l_last_sync_lsn), |
2395 | be64_to_cpu(iclog->ic_header.h_lsn)) <= 0); | 2407 | be64_to_cpu(iclog->ic_header.h_lsn)) <= 0); |
2396 | atomic64_set(&log->l_last_sync_lsn, | 2408 | if (iclog->ic_callback) |
2397 | be64_to_cpu(iclog->ic_header.h_lsn)); | 2409 | atomic64_set(&log->l_last_sync_lsn, |
2410 | be64_to_cpu(iclog->ic_header.h_lsn)); | ||
2398 | 2411 | ||
2399 | } else | 2412 | } else |
2400 | ioerrors++; | 2413 | ioerrors++; |
diff --git a/fs/xfs/xfs_log_recover.c b/fs/xfs/xfs_log_recover.c index 5da3ace352bf..d308749fabf1 100644 --- a/fs/xfs/xfs_log_recover.c +++ b/fs/xfs/xfs_log_recover.c | |||
@@ -3541,7 +3541,7 @@ xlog_do_recovery_pass( | |||
3541 | * - order is important. | 3541 | * - order is important. |
3542 | */ | 3542 | */ |
3543 | error = xlog_bread_offset(log, 0, | 3543 | error = xlog_bread_offset(log, 0, |
3544 | bblks - split_bblks, hbp, | 3544 | bblks - split_bblks, dbp, |
3545 | offset + BBTOB(split_bblks)); | 3545 | offset + BBTOB(split_bblks)); |
3546 | if (error) | 3546 | if (error) |
3547 | goto bread_err2; | 3547 | goto bread_err2; |
diff --git a/include/linux/hashtable.h b/include/linux/hashtable.h new file mode 100644 index 000000000000..227c62424f3c --- /dev/null +++ b/include/linux/hashtable.h | |||
@@ -0,0 +1,192 @@ | |||
1 | /* | ||
2 | * Statically sized hash table implementation | ||
3 | * (C) 2012 Sasha Levin <levinsasha928@gmail.com> | ||
4 | */ | ||
5 | |||
6 | #ifndef _LINUX_HASHTABLE_H | ||
7 | #define _LINUX_HASHTABLE_H | ||
8 | |||
9 | #include <linux/list.h> | ||
10 | #include <linux/types.h> | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/hash.h> | ||
13 | #include <linux/rculist.h> | ||
14 | |||
15 | #define DEFINE_HASHTABLE(name, bits) \ | ||
16 | struct hlist_head name[1 << (bits)] = \ | ||
17 | { [0 ... ((1 << (bits)) - 1)] = HLIST_HEAD_INIT } | ||
18 | |||
19 | #define DECLARE_HASHTABLE(name, bits) \ | ||
20 | struct hlist_head name[1 << (bits)] | ||
21 | |||
22 | #define HASH_SIZE(name) (ARRAY_SIZE(name)) | ||
23 | #define HASH_BITS(name) ilog2(HASH_SIZE(name)) | ||
24 | |||
25 | /* Use hash_32 when possible to allow for fast 32bit hashing in 64bit kernels. */ | ||
26 | #define hash_min(val, bits) \ | ||
27 | (sizeof(val) <= 4 ? hash_32(val, bits) : hash_long(val, bits)) | ||
28 | |||
29 | static inline void __hash_init(struct hlist_head *ht, unsigned int sz) | ||
30 | { | ||
31 | unsigned int i; | ||
32 | |||
33 | for (i = 0; i < sz; i++) | ||
34 | INIT_HLIST_HEAD(&ht[i]); | ||
35 | } | ||
36 | |||
37 | /** | ||
38 | * hash_init - initialize a hash table | ||
39 | * @hashtable: hashtable to be initialized | ||
40 | * | ||
41 | * Calculates the size of the hashtable from the given parameter, otherwise | ||
42 | * same as hash_init_size. | ||
43 | * | ||
44 | * This has to be a macro since HASH_BITS() will not work on pointers since | ||
45 | * it calculates the size during preprocessing. | ||
46 | */ | ||
47 | #define hash_init(hashtable) __hash_init(hashtable, HASH_SIZE(hashtable)) | ||
48 | |||
49 | /** | ||
50 | * hash_add - add an object to a hashtable | ||
51 | * @hashtable: hashtable to add to | ||
52 | * @node: the &struct hlist_node of the object to be added | ||
53 | * @key: the key of the object to be added | ||
54 | */ | ||
55 | #define hash_add(hashtable, node, key) \ | ||
56 | hlist_add_head(node, &hashtable[hash_min(key, HASH_BITS(hashtable))]) | ||
57 | |||
58 | /** | ||
59 | * hash_add_rcu - add an object to a rcu enabled hashtable | ||
60 | * @hashtable: hashtable to add to | ||
61 | * @node: the &struct hlist_node of the object to be added | ||
62 | * @key: the key of the object to be added | ||
63 | */ | ||
64 | #define hash_add_rcu(hashtable, node, key) \ | ||
65 | hlist_add_head_rcu(node, &hashtable[hash_min(key, HASH_BITS(hashtable))]) | ||
66 | |||
67 | /** | ||
68 | * hash_hashed - check whether an object is in any hashtable | ||
69 | * @node: the &struct hlist_node of the object to be checked | ||
70 | */ | ||
71 | static inline bool hash_hashed(struct hlist_node *node) | ||
72 | { | ||
73 | return !hlist_unhashed(node); | ||
74 | } | ||
75 | |||
76 | static inline bool __hash_empty(struct hlist_head *ht, unsigned int sz) | ||
77 | { | ||
78 | unsigned int i; | ||
79 | |||
80 | for (i = 0; i < sz; i++) | ||
81 | if (!hlist_empty(&ht[i])) | ||
82 | return false; | ||
83 | |||
84 | return true; | ||
85 | } | ||
86 | |||
87 | /** | ||
88 | * hash_empty - check whether a hashtable is empty | ||
89 | * @hashtable: hashtable to check | ||
90 | * | ||
91 | * This has to be a macro since HASH_BITS() will not work on pointers since | ||
92 | * it calculates the size during preprocessing. | ||
93 | */ | ||
94 | #define hash_empty(hashtable) __hash_empty(hashtable, HASH_SIZE(hashtable)) | ||
95 | |||
96 | /** | ||
97 | * hash_del - remove an object from a hashtable | ||
98 | * @node: &struct hlist_node of the object to remove | ||
99 | */ | ||
100 | static inline void hash_del(struct hlist_node *node) | ||
101 | { | ||
102 | hlist_del_init(node); | ||
103 | } | ||
104 | |||
105 | /** | ||
106 | * hash_del_rcu - remove an object from a rcu enabled hashtable | ||
107 | * @node: &struct hlist_node of the object to remove | ||
108 | */ | ||
109 | static inline void hash_del_rcu(struct hlist_node *node) | ||
110 | { | ||
111 | hlist_del_init_rcu(node); | ||
112 | } | ||
113 | |||
114 | /** | ||
115 | * hash_for_each - iterate over a hashtable | ||
116 | * @name: hashtable to iterate | ||
117 | * @bkt: integer to use as bucket loop cursor | ||
118 | * @node: the &struct list_head to use as a loop cursor for each entry | ||
119 | * @obj: the type * to use as a loop cursor for each entry | ||
120 | * @member: the name of the hlist_node within the struct | ||
121 | */ | ||
122 | #define hash_for_each(name, bkt, node, obj, member) \ | ||
123 | for ((bkt) = 0, node = NULL; node == NULL && (bkt) < HASH_SIZE(name); (bkt)++)\ | ||
124 | hlist_for_each_entry(obj, node, &name[bkt], member) | ||
125 | |||
126 | /** | ||
127 | * hash_for_each_rcu - iterate over a rcu enabled hashtable | ||
128 | * @name: hashtable to iterate | ||
129 | * @bkt: integer to use as bucket loop cursor | ||
130 | * @node: the &struct list_head to use as a loop cursor for each entry | ||
131 | * @obj: the type * to use as a loop cursor for each entry | ||
132 | * @member: the name of the hlist_node within the struct | ||
133 | */ | ||
134 | #define hash_for_each_rcu(name, bkt, node, obj, member) \ | ||
135 | for ((bkt) = 0, node = NULL; node == NULL && (bkt) < HASH_SIZE(name); (bkt)++)\ | ||
136 | hlist_for_each_entry_rcu(obj, node, &name[bkt], member) | ||
137 | |||
138 | /** | ||
139 | * hash_for_each_safe - iterate over a hashtable safe against removal of | ||
140 | * hash entry | ||
141 | * @name: hashtable to iterate | ||
142 | * @bkt: integer to use as bucket loop cursor | ||
143 | * @node: the &struct list_head to use as a loop cursor for each entry | ||
144 | * @tmp: a &struct used for temporary storage | ||
145 | * @obj: the type * to use as a loop cursor for each entry | ||
146 | * @member: the name of the hlist_node within the struct | ||
147 | */ | ||
148 | #define hash_for_each_safe(name, bkt, node, tmp, obj, member) \ | ||
149 | for ((bkt) = 0, node = NULL; node == NULL && (bkt) < HASH_SIZE(name); (bkt)++)\ | ||
150 | hlist_for_each_entry_safe(obj, node, tmp, &name[bkt], member) | ||
151 | |||
152 | /** | ||
153 | * hash_for_each_possible - iterate over all possible objects hashing to the | ||
154 | * same bucket | ||
155 | * @name: hashtable to iterate | ||
156 | * @obj: the type * to use as a loop cursor for each entry | ||
157 | * @node: the &struct list_head to use as a loop cursor for each entry | ||
158 | * @member: the name of the hlist_node within the struct | ||
159 | * @key: the key of the objects to iterate over | ||
160 | */ | ||
161 | #define hash_for_each_possible(name, obj, node, member, key) \ | ||
162 | hlist_for_each_entry(obj, node, &name[hash_min(key, HASH_BITS(name))], member) | ||
163 | |||
164 | /** | ||
165 | * hash_for_each_possible_rcu - iterate over all possible objects hashing to the | ||
166 | * same bucket in an rcu enabled hashtable | ||
167 | * in a rcu enabled hashtable | ||
168 | * @name: hashtable to iterate | ||
169 | * @obj: the type * to use as a loop cursor for each entry | ||
170 | * @node: the &struct list_head to use as a loop cursor for each entry | ||
171 | * @member: the name of the hlist_node within the struct | ||
172 | * @key: the key of the objects to iterate over | ||
173 | */ | ||
174 | #define hash_for_each_possible_rcu(name, obj, node, member, key) \ | ||
175 | hlist_for_each_entry_rcu(obj, node, &name[hash_min(key, HASH_BITS(name))], member) | ||
176 | |||
177 | /** | ||
178 | * hash_for_each_possible_safe - iterate over all possible objects hashing to the | ||
179 | * same bucket safe against removals | ||
180 | * @name: hashtable to iterate | ||
181 | * @obj: the type * to use as a loop cursor for each entry | ||
182 | * @node: the &struct list_head to use as a loop cursor for each entry | ||
183 | * @tmp: a &struct used for temporary storage | ||
184 | * @member: the name of the hlist_node within the struct | ||
185 | * @key: the key of the objects to iterate over | ||
186 | */ | ||
187 | #define hash_for_each_possible_safe(name, obj, node, tmp, member, key) \ | ||
188 | hlist_for_each_entry_safe(obj, node, tmp, \ | ||
189 | &name[hash_min(key, HASH_BITS(name))], member) | ||
190 | |||
191 | |||
192 | #endif | ||
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h index 93bfc9f9815c..ecc554374e44 100644 --- a/include/linux/kvm_host.h +++ b/include/linux/kvm_host.h | |||
@@ -42,19 +42,8 @@ | |||
42 | */ | 42 | */ |
43 | #define KVM_MEMSLOT_INVALID (1UL << 16) | 43 | #define KVM_MEMSLOT_INVALID (1UL << 16) |
44 | 44 | ||
45 | /* | 45 | /* Two fragments for cross MMIO pages. */ |
46 | * If we support unaligned MMIO, at most one fragment will be split into two: | 46 | #define KVM_MAX_MMIO_FRAGMENTS 2 |
47 | */ | ||
48 | #ifdef KVM_UNALIGNED_MMIO | ||
49 | # define KVM_EXTRA_MMIO_FRAGMENTS 1 | ||
50 | #else | ||
51 | # define KVM_EXTRA_MMIO_FRAGMENTS 0 | ||
52 | #endif | ||
53 | |||
54 | #define KVM_USER_MMIO_SIZE 8 | ||
55 | |||
56 | #define KVM_MAX_MMIO_FRAGMENTS \ | ||
57 | (KVM_MMIO_SIZE / KVM_USER_MMIO_SIZE + KVM_EXTRA_MMIO_FRAGMENTS) | ||
58 | 47 | ||
59 | /* | 48 | /* |
60 | * For the normal pfn, the highest 12 bits should be zero, | 49 | * For the normal pfn, the highest 12 bits should be zero, |
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h index 7c6a1139d8fa..96531664a061 100644 --- a/include/linux/mmc/dw_mmc.h +++ b/include/linux/mmc/dw_mmc.h | |||
@@ -137,7 +137,7 @@ struct dw_mci { | |||
137 | 137 | ||
138 | dma_addr_t sg_dma; | 138 | dma_addr_t sg_dma; |
139 | void *sg_cpu; | 139 | void *sg_cpu; |
140 | struct dw_mci_dma_ops *dma_ops; | 140 | const struct dw_mci_dma_ops *dma_ops; |
141 | #ifdef CONFIG_MMC_DW_IDMAC | 141 | #ifdef CONFIG_MMC_DW_IDMAC |
142 | unsigned int ring_size; | 142 | unsigned int ring_size; |
143 | #else | 143 | #else |
@@ -162,7 +162,7 @@ struct dw_mci { | |||
162 | u16 data_offset; | 162 | u16 data_offset; |
163 | struct device *dev; | 163 | struct device *dev; |
164 | struct dw_mci_board *pdata; | 164 | struct dw_mci_board *pdata; |
165 | struct dw_mci_drv_data *drv_data; | 165 | const struct dw_mci_drv_data *drv_data; |
166 | void *priv; | 166 | void *priv; |
167 | struct clk *biu_clk; | 167 | struct clk *biu_clk; |
168 | struct clk *ciu_clk; | 168 | struct clk *ciu_clk; |
@@ -186,7 +186,7 @@ struct dw_mci { | |||
186 | 186 | ||
187 | struct regulator *vmmc; /* Power regulator */ | 187 | struct regulator *vmmc; /* Power regulator */ |
188 | unsigned long irq_flags; /* IRQ flags */ | 188 | unsigned long irq_flags; /* IRQ flags */ |
189 | unsigned int irq; | 189 | int irq; |
190 | }; | 190 | }; |
191 | 191 | ||
192 | /* DMA ops for Internal/External DMAC interface */ | 192 | /* DMA ops for Internal/External DMAC interface */ |
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h index fa8529a859b8..1edcb4dad8c4 100644 --- a/include/linux/mmc/sdhci.h +++ b/include/linux/mmc/sdhci.h | |||
@@ -91,6 +91,7 @@ struct sdhci_host { | |||
91 | unsigned int quirks2; /* More deviations from spec. */ | 91 | unsigned int quirks2; /* More deviations from spec. */ |
92 | 92 | ||
93 | #define SDHCI_QUIRK2_HOST_OFF_CARD_ON (1<<0) | 93 | #define SDHCI_QUIRK2_HOST_OFF_CARD_ON (1<<0) |
94 | #define SDHCI_QUIRK2_HOST_NO_CMD23 (1<<1) | ||
94 | 95 | ||
95 | int irq; /* Device IRQ */ | 96 | int irq; /* Device IRQ */ |
96 | void __iomem *ioaddr; /* Mapped address */ | 97 | void __iomem *ioaddr; /* Mapped address */ |
diff --git a/include/linux/of_address.h b/include/linux/of_address.h index a1984dd037da..e20e3af68fb6 100644 --- a/include/linux/of_address.h +++ b/include/linux/of_address.h | |||
@@ -28,11 +28,13 @@ static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; } | |||
28 | #endif | 28 | #endif |
29 | 29 | ||
30 | #else /* CONFIG_OF_ADDRESS */ | 30 | #else /* CONFIG_OF_ADDRESS */ |
31 | #ifndef of_address_to_resource | ||
31 | static inline int of_address_to_resource(struct device_node *dev, int index, | 32 | static inline int of_address_to_resource(struct device_node *dev, int index, |
32 | struct resource *r) | 33 | struct resource *r) |
33 | { | 34 | { |
34 | return -EINVAL; | 35 | return -EINVAL; |
35 | } | 36 | } |
37 | #endif | ||
36 | static inline struct device_node *of_find_matching_node_by_address( | 38 | static inline struct device_node *of_find_matching_node_by_address( |
37 | struct device_node *from, | 39 | struct device_node *from, |
38 | const struct of_device_id *matches, | 40 | const struct of_device_id *matches, |
diff --git a/include/linux/ptp_clock_kernel.h b/include/linux/ptp_clock_kernel.h index f2dc6d8fc680..38a993508327 100644 --- a/include/linux/ptp_clock_kernel.h +++ b/include/linux/ptp_clock_kernel.h | |||
@@ -54,7 +54,8 @@ struct ptp_clock_request { | |||
54 | * clock operations | 54 | * clock operations |
55 | * | 55 | * |
56 | * @adjfreq: Adjusts the frequency of the hardware clock. | 56 | * @adjfreq: Adjusts the frequency of the hardware clock. |
57 | * parameter delta: Desired period change in parts per billion. | 57 | * parameter delta: Desired frequency offset from nominal frequency |
58 | * in parts per billion | ||
58 | * | 59 | * |
59 | * @adjtime: Shifts the time of the hardware clock. | 60 | * @adjtime: Shifts the time of the hardware clock. |
60 | * parameter delta: Desired change in nanoseconds. | 61 | * parameter delta: Desired change in nanoseconds. |
diff --git a/include/linux/raid/Kbuild b/include/linux/raid/Kbuild index 2415a64c5e51..e69de29bb2d1 100644 --- a/include/linux/raid/Kbuild +++ b/include/linux/raid/Kbuild | |||
@@ -1,2 +0,0 @@ | |||
1 | header-y += md_p.h | ||
2 | header-y += md_u.h | ||
diff --git a/include/linux/raid/md_u.h b/include/linux/raid/md_u.h index fb1abb3367e9..358c04bfbe2a 100644 --- a/include/linux/raid/md_u.h +++ b/include/linux/raid/md_u.h | |||
@@ -11,149 +11,10 @@ | |||
11 | (for example /usr/src/linux/COPYING); if not, write to the Free | 11 | (for example /usr/src/linux/COPYING); if not, write to the Free |
12 | Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 12 | Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
13 | */ | 13 | */ |
14 | |||
15 | #ifndef _MD_U_H | 14 | #ifndef _MD_U_H |
16 | #define _MD_U_H | 15 | #define _MD_U_H |
17 | 16 | ||
18 | /* | 17 | #include <uapi/linux/raid/md_u.h> |
19 | * Different major versions are not compatible. | ||
20 | * Different minor versions are only downward compatible. | ||
21 | * Different patchlevel versions are downward and upward compatible. | ||
22 | */ | ||
23 | #define MD_MAJOR_VERSION 0 | ||
24 | #define MD_MINOR_VERSION 90 | ||
25 | /* | ||
26 | * MD_PATCHLEVEL_VERSION indicates kernel functionality. | ||
27 | * >=1 means different superblock formats are selectable using SET_ARRAY_INFO | ||
28 | * and major_version/minor_version accordingly | ||
29 | * >=2 means that Internal bitmaps are supported by setting MD_SB_BITMAP_PRESENT | ||
30 | * in the super status byte | ||
31 | * >=3 means that bitmap superblock version 4 is supported, which uses | ||
32 | * little-ending representation rather than host-endian | ||
33 | */ | ||
34 | #define MD_PATCHLEVEL_VERSION 3 | ||
35 | |||
36 | /* ioctls */ | ||
37 | |||
38 | /* status */ | ||
39 | #define RAID_VERSION _IOR (MD_MAJOR, 0x10, mdu_version_t) | ||
40 | #define GET_ARRAY_INFO _IOR (MD_MAJOR, 0x11, mdu_array_info_t) | ||
41 | #define GET_DISK_INFO _IOR (MD_MAJOR, 0x12, mdu_disk_info_t) | ||
42 | #define PRINT_RAID_DEBUG _IO (MD_MAJOR, 0x13) | ||
43 | #define RAID_AUTORUN _IO (MD_MAJOR, 0x14) | ||
44 | #define GET_BITMAP_FILE _IOR (MD_MAJOR, 0x15, mdu_bitmap_file_t) | ||
45 | |||
46 | /* configuration */ | ||
47 | #define CLEAR_ARRAY _IO (MD_MAJOR, 0x20) | ||
48 | #define ADD_NEW_DISK _IOW (MD_MAJOR, 0x21, mdu_disk_info_t) | ||
49 | #define HOT_REMOVE_DISK _IO (MD_MAJOR, 0x22) | ||
50 | #define SET_ARRAY_INFO _IOW (MD_MAJOR, 0x23, mdu_array_info_t) | ||
51 | #define SET_DISK_INFO _IO (MD_MAJOR, 0x24) | ||
52 | #define WRITE_RAID_INFO _IO (MD_MAJOR, 0x25) | ||
53 | #define UNPROTECT_ARRAY _IO (MD_MAJOR, 0x26) | ||
54 | #define PROTECT_ARRAY _IO (MD_MAJOR, 0x27) | ||
55 | #define HOT_ADD_DISK _IO (MD_MAJOR, 0x28) | ||
56 | #define SET_DISK_FAULTY _IO (MD_MAJOR, 0x29) | ||
57 | #define HOT_GENERATE_ERROR _IO (MD_MAJOR, 0x2a) | ||
58 | #define SET_BITMAP_FILE _IOW (MD_MAJOR, 0x2b, int) | ||
59 | 18 | ||
60 | /* usage */ | ||
61 | #define RUN_ARRAY _IOW (MD_MAJOR, 0x30, mdu_param_t) | ||
62 | /* 0x31 was START_ARRAY */ | ||
63 | #define STOP_ARRAY _IO (MD_MAJOR, 0x32) | ||
64 | #define STOP_ARRAY_RO _IO (MD_MAJOR, 0x33) | ||
65 | #define RESTART_ARRAY_RW _IO (MD_MAJOR, 0x34) | ||
66 | |||
67 | /* 63 partitions with the alternate major number (mdp) */ | ||
68 | #define MdpMinorShift 6 | ||
69 | #ifdef __KERNEL__ | ||
70 | extern int mdp_major; | 19 | extern int mdp_major; |
71 | #endif | ||
72 | |||
73 | typedef struct mdu_version_s { | ||
74 | int major; | ||
75 | int minor; | ||
76 | int patchlevel; | ||
77 | } mdu_version_t; | ||
78 | |||
79 | typedef struct mdu_array_info_s { | ||
80 | /* | ||
81 | * Generic constant information | ||
82 | */ | ||
83 | int major_version; | ||
84 | int minor_version; | ||
85 | int patch_version; | ||
86 | int ctime; | ||
87 | int level; | ||
88 | int size; | ||
89 | int nr_disks; | ||
90 | int raid_disks; | ||
91 | int md_minor; | ||
92 | int not_persistent; | ||
93 | |||
94 | /* | ||
95 | * Generic state information | ||
96 | */ | ||
97 | int utime; /* 0 Superblock update time */ | ||
98 | int state; /* 1 State bits (clean, ...) */ | ||
99 | int active_disks; /* 2 Number of currently active disks */ | ||
100 | int working_disks; /* 3 Number of working disks */ | ||
101 | int failed_disks; /* 4 Number of failed disks */ | ||
102 | int spare_disks; /* 5 Number of spare disks */ | ||
103 | |||
104 | /* | ||
105 | * Personality information | ||
106 | */ | ||
107 | int layout; /* 0 the array's physical layout */ | ||
108 | int chunk_size; /* 1 chunk size in bytes */ | ||
109 | |||
110 | } mdu_array_info_t; | ||
111 | |||
112 | /* non-obvious values for 'level' */ | ||
113 | #define LEVEL_MULTIPATH (-4) | ||
114 | #define LEVEL_LINEAR (-1) | ||
115 | #define LEVEL_FAULTY (-5) | ||
116 | |||
117 | /* we need a value for 'no level specified' and 0 | ||
118 | * means 'raid0', so we need something else. This is | ||
119 | * for internal use only | ||
120 | */ | ||
121 | #define LEVEL_NONE (-1000000) | ||
122 | |||
123 | typedef struct mdu_disk_info_s { | ||
124 | /* | ||
125 | * configuration/status of one particular disk | ||
126 | */ | ||
127 | int number; | ||
128 | int major; | ||
129 | int minor; | ||
130 | int raid_disk; | ||
131 | int state; | ||
132 | |||
133 | } mdu_disk_info_t; | ||
134 | |||
135 | typedef struct mdu_start_info_s { | ||
136 | /* | ||
137 | * configuration/status of one particular disk | ||
138 | */ | ||
139 | int major; | ||
140 | int minor; | ||
141 | int raid_disk; | ||
142 | int state; | ||
143 | |||
144 | } mdu_start_info_t; | ||
145 | |||
146 | typedef struct mdu_bitmap_file_s | ||
147 | { | ||
148 | char pathname[4096]; | ||
149 | } mdu_bitmap_file_t; | ||
150 | |||
151 | typedef struct mdu_param_s | ||
152 | { | ||
153 | int personality; /* 1,2,3,4 */ | ||
154 | int chunk_size; /* in bytes */ | ||
155 | int max_fault; /* unused for now */ | ||
156 | } mdu_param_t; | ||
157 | |||
158 | #endif | 20 | #endif |
159 | |||
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h index 50910913b268..60c72395ec6b 100644 --- a/include/linux/sh_clk.h +++ b/include/linux/sh_clk.h | |||
@@ -199,4 +199,13 @@ int sh_clk_div6_reparent_register(struct clk *clks, int nr); | |||
199 | #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } | 199 | #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } |
200 | #define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk } | 200 | #define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk } |
201 | 201 | ||
202 | /* .enable_reg will be updated to .mapping on sh_clk_fsidiv_register() */ | ||
203 | #define SH_CLK_FSIDIV(_reg, _parent) \ | ||
204 | { \ | ||
205 | .enable_reg = (void __iomem *)_reg, \ | ||
206 | .parent = _parent, \ | ||
207 | } | ||
208 | |||
209 | int sh_clk_fsidiv_register(struct clk *clks, int nr); | ||
210 | |||
202 | #endif /* __SH_CLOCK_H */ | 211 | #endif /* __SH_CLOCK_H */ |
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h index f8cd4cf3fad8..7d5b6000378b 100644 --- a/include/net/cfg80211.h +++ b/include/net/cfg80211.h | |||
@@ -2652,6 +2652,15 @@ unsigned int ieee80211_get_hdrlen_from_skb(const struct sk_buff *skb); | |||
2652 | unsigned int __attribute_const__ ieee80211_hdrlen(__le16 fc); | 2652 | unsigned int __attribute_const__ ieee80211_hdrlen(__le16 fc); |
2653 | 2653 | ||
2654 | /** | 2654 | /** |
2655 | * ieee80211_get_mesh_hdrlen - get mesh extension header length | ||
2656 | * @meshhdr: the mesh extension header, only the flags field | ||
2657 | * (first byte) will be accessed | ||
2658 | * Returns the length of the extension header, which is always at | ||
2659 | * least 6 bytes and at most 18 if address 5 and 6 are present. | ||
2660 | */ | ||
2661 | unsigned int ieee80211_get_mesh_hdrlen(struct ieee80211s_hdr *meshhdr); | ||
2662 | |||
2663 | /** | ||
2655 | * DOC: Data path helpers | 2664 | * DOC: Data path helpers |
2656 | * | 2665 | * |
2657 | * In addition to generic utilities, cfg80211 also offers | 2666 | * In addition to generic utilities, cfg80211 also offers |
diff --git a/include/sound/core.h b/include/sound/core.h index bc056687f647..93896ad1fcdd 100644 --- a/include/sound/core.h +++ b/include/sound/core.h | |||
@@ -132,6 +132,7 @@ struct snd_card { | |||
132 | int shutdown; /* this card is going down */ | 132 | int shutdown; /* this card is going down */ |
133 | int free_on_last_close; /* free in context of file_release */ | 133 | int free_on_last_close; /* free in context of file_release */ |
134 | wait_queue_head_t shutdown_sleep; | 134 | wait_queue_head_t shutdown_sleep; |
135 | atomic_t refcount; /* refcount for disconnection */ | ||
135 | struct device *dev; /* device assigned to this card */ | 136 | struct device *dev; /* device assigned to this card */ |
136 | struct device *card_dev; /* cardX object for sysfs */ | 137 | struct device *card_dev; /* cardX object for sysfs */ |
137 | 138 | ||
@@ -189,6 +190,7 @@ struct snd_minor { | |||
189 | const struct file_operations *f_ops; /* file operations */ | 190 | const struct file_operations *f_ops; /* file operations */ |
190 | void *private_data; /* private data for f_ops->open */ | 191 | void *private_data; /* private data for f_ops->open */ |
191 | struct device *dev; /* device for sysfs */ | 192 | struct device *dev; /* device for sysfs */ |
193 | struct snd_card *card_ptr; /* assigned card instance */ | ||
192 | }; | 194 | }; |
193 | 195 | ||
194 | /* return a device pointer linked to each sound device as a parent */ | 196 | /* return a device pointer linked to each sound device as a parent */ |
@@ -295,6 +297,7 @@ int snd_card_info_done(void); | |||
295 | int snd_component_add(struct snd_card *card, const char *component); | 297 | int snd_component_add(struct snd_card *card, const char *component); |
296 | int snd_card_file_add(struct snd_card *card, struct file *file); | 298 | int snd_card_file_add(struct snd_card *card, struct file *file); |
297 | int snd_card_file_remove(struct snd_card *card, struct file *file); | 299 | int snd_card_file_remove(struct snd_card *card, struct file *file); |
300 | void snd_card_unref(struct snd_card *card); | ||
298 | 301 | ||
299 | #define snd_card_set_dev(card, devptr) ((card)->dev = (devptr)) | 302 | #define snd_card_set_dev(card, devptr) ((card)->dev = (devptr)) |
300 | 303 | ||
diff --git a/include/sound/sh_fsi.h b/include/sound/sh_fsi.h index 906010344dd7..27ee1dcc3e2e 100644 --- a/include/sound/sh_fsi.h +++ b/include/sound/sh_fsi.h | |||
@@ -26,6 +26,7 @@ | |||
26 | * A: inversion | 26 | * A: inversion |
27 | * B: format mode | 27 | * B: format mode |
28 | * C: chip specific | 28 | * C: chip specific |
29 | * D: clock selecter if master mode | ||
29 | */ | 30 | */ |
30 | 31 | ||
31 | /* A: clock inversion */ | 32 | /* A: clock inversion */ |
@@ -44,6 +45,11 @@ | |||
44 | #define SH_FSI_OPTION_MASK 0x00000F00 | 45 | #define SH_FSI_OPTION_MASK 0x00000F00 |
45 | #define SH_FSI_ENABLE_STREAM_MODE (1 << 8) /* for 16bit data */ | 46 | #define SH_FSI_ENABLE_STREAM_MODE (1 << 8) /* for 16bit data */ |
46 | 47 | ||
48 | /* D: clock selecter if master mode */ | ||
49 | #define SH_FSI_CLK_MASK 0x0000F000 | ||
50 | #define SH_FSI_CLK_EXTERNAL (1 << 12) | ||
51 | #define SH_FSI_CLK_CPG (2 << 12) /* FSIxCK + FSI-DIV */ | ||
52 | |||
47 | /* | 53 | /* |
48 | * set_rate return value | 54 | * set_rate return value |
49 | * | 55 | * |
diff --git a/include/trace/events/xen.h b/include/trace/events/xen.h index 15ba03bdd7c6..d06b6da5c1e3 100644 --- a/include/trace/events/xen.h +++ b/include/trace/events/xen.h | |||
@@ -377,6 +377,14 @@ DECLARE_EVENT_CLASS(xen_mmu_pgd, | |||
377 | DEFINE_XEN_MMU_PGD_EVENT(xen_mmu_pgd_pin); | 377 | DEFINE_XEN_MMU_PGD_EVENT(xen_mmu_pgd_pin); |
378 | DEFINE_XEN_MMU_PGD_EVENT(xen_mmu_pgd_unpin); | 378 | DEFINE_XEN_MMU_PGD_EVENT(xen_mmu_pgd_unpin); |
379 | 379 | ||
380 | TRACE_EVENT(xen_mmu_flush_tlb_all, | ||
381 | TP_PROTO(int x), | ||
382 | TP_ARGS(x), | ||
383 | TP_STRUCT__entry(__array(char, x, 0)), | ||
384 | TP_fast_assign((void)x), | ||
385 | TP_printk("%s", "") | ||
386 | ); | ||
387 | |||
380 | TRACE_EVENT(xen_mmu_flush_tlb, | 388 | TRACE_EVENT(xen_mmu_flush_tlb, |
381 | TP_PROTO(int x), | 389 | TP_PROTO(int x), |
382 | TP_ARGS(x), | 390 | TP_ARGS(x), |
diff --git a/include/uapi/linux/eventpoll.h b/include/uapi/linux/eventpoll.h index 8c99ce7202c5..2c267bcbb85c 100644 --- a/include/uapi/linux/eventpoll.h +++ b/include/uapi/linux/eventpoll.h | |||
@@ -25,7 +25,6 @@ | |||
25 | #define EPOLL_CTL_ADD 1 | 25 | #define EPOLL_CTL_ADD 1 |
26 | #define EPOLL_CTL_DEL 2 | 26 | #define EPOLL_CTL_DEL 2 |
27 | #define EPOLL_CTL_MOD 3 | 27 | #define EPOLL_CTL_MOD 3 |
28 | #define EPOLL_CTL_DISABLE 4 | ||
29 | 28 | ||
30 | /* | 29 | /* |
31 | * Request the handling of system wakeup events so as to prevent system suspends | 30 | * Request the handling of system wakeup events so as to prevent system suspends |
diff --git a/include/uapi/linux/raid/Kbuild b/include/uapi/linux/raid/Kbuild index aafaa5aa54d4..e2c3d25405d7 100644 --- a/include/uapi/linux/raid/Kbuild +++ b/include/uapi/linux/raid/Kbuild | |||
@@ -1 +1,3 @@ | |||
1 | # UAPI Header export list | 1 | # UAPI Header export list |
2 | header-y += md_p.h | ||
3 | header-y += md_u.h | ||
diff --git a/include/linux/raid/md_p.h b/include/uapi/linux/raid/md_p.h index ee753536ab70..ee753536ab70 100644 --- a/include/linux/raid/md_p.h +++ b/include/uapi/linux/raid/md_p.h | |||
diff --git a/include/uapi/linux/raid/md_u.h b/include/uapi/linux/raid/md_u.h new file mode 100644 index 000000000000..4133e744e4e6 --- /dev/null +++ b/include/uapi/linux/raid/md_u.h | |||
@@ -0,0 +1,155 @@ | |||
1 | /* | ||
2 | md_u.h : user <=> kernel API between Linux raidtools and RAID drivers | ||
3 | Copyright (C) 1998 Ingo Molnar | ||
4 | |||
5 | This program is free software; you can redistribute it and/or modify | ||
6 | it under the terms of the GNU General Public License as published by | ||
7 | the Free Software Foundation; either version 2, or (at your option) | ||
8 | any later version. | ||
9 | |||
10 | You should have received a copy of the GNU General Public License | ||
11 | (for example /usr/src/linux/COPYING); if not, write to the Free | ||
12 | Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
13 | */ | ||
14 | |||
15 | #ifndef _UAPI_MD_U_H | ||
16 | #define _UAPI_MD_U_H | ||
17 | |||
18 | /* | ||
19 | * Different major versions are not compatible. | ||
20 | * Different minor versions are only downward compatible. | ||
21 | * Different patchlevel versions are downward and upward compatible. | ||
22 | */ | ||
23 | #define MD_MAJOR_VERSION 0 | ||
24 | #define MD_MINOR_VERSION 90 | ||
25 | /* | ||
26 | * MD_PATCHLEVEL_VERSION indicates kernel functionality. | ||
27 | * >=1 means different superblock formats are selectable using SET_ARRAY_INFO | ||
28 | * and major_version/minor_version accordingly | ||
29 | * >=2 means that Internal bitmaps are supported by setting MD_SB_BITMAP_PRESENT | ||
30 | * in the super status byte | ||
31 | * >=3 means that bitmap superblock version 4 is supported, which uses | ||
32 | * little-ending representation rather than host-endian | ||
33 | */ | ||
34 | #define MD_PATCHLEVEL_VERSION 3 | ||
35 | |||
36 | /* ioctls */ | ||
37 | |||
38 | /* status */ | ||
39 | #define RAID_VERSION _IOR (MD_MAJOR, 0x10, mdu_version_t) | ||
40 | #define GET_ARRAY_INFO _IOR (MD_MAJOR, 0x11, mdu_array_info_t) | ||
41 | #define GET_DISK_INFO _IOR (MD_MAJOR, 0x12, mdu_disk_info_t) | ||
42 | #define PRINT_RAID_DEBUG _IO (MD_MAJOR, 0x13) | ||
43 | #define RAID_AUTORUN _IO (MD_MAJOR, 0x14) | ||
44 | #define GET_BITMAP_FILE _IOR (MD_MAJOR, 0x15, mdu_bitmap_file_t) | ||
45 | |||
46 | /* configuration */ | ||
47 | #define CLEAR_ARRAY _IO (MD_MAJOR, 0x20) | ||
48 | #define ADD_NEW_DISK _IOW (MD_MAJOR, 0x21, mdu_disk_info_t) | ||
49 | #define HOT_REMOVE_DISK _IO (MD_MAJOR, 0x22) | ||
50 | #define SET_ARRAY_INFO _IOW (MD_MAJOR, 0x23, mdu_array_info_t) | ||
51 | #define SET_DISK_INFO _IO (MD_MAJOR, 0x24) | ||
52 | #define WRITE_RAID_INFO _IO (MD_MAJOR, 0x25) | ||
53 | #define UNPROTECT_ARRAY _IO (MD_MAJOR, 0x26) | ||
54 | #define PROTECT_ARRAY _IO (MD_MAJOR, 0x27) | ||
55 | #define HOT_ADD_DISK _IO (MD_MAJOR, 0x28) | ||
56 | #define SET_DISK_FAULTY _IO (MD_MAJOR, 0x29) | ||
57 | #define HOT_GENERATE_ERROR _IO (MD_MAJOR, 0x2a) | ||
58 | #define SET_BITMAP_FILE _IOW (MD_MAJOR, 0x2b, int) | ||
59 | |||
60 | /* usage */ | ||
61 | #define RUN_ARRAY _IOW (MD_MAJOR, 0x30, mdu_param_t) | ||
62 | /* 0x31 was START_ARRAY */ | ||
63 | #define STOP_ARRAY _IO (MD_MAJOR, 0x32) | ||
64 | #define STOP_ARRAY_RO _IO (MD_MAJOR, 0x33) | ||
65 | #define RESTART_ARRAY_RW _IO (MD_MAJOR, 0x34) | ||
66 | |||
67 | /* 63 partitions with the alternate major number (mdp) */ | ||
68 | #define MdpMinorShift 6 | ||
69 | |||
70 | typedef struct mdu_version_s { | ||
71 | int major; | ||
72 | int minor; | ||
73 | int patchlevel; | ||
74 | } mdu_version_t; | ||
75 | |||
76 | typedef struct mdu_array_info_s { | ||
77 | /* | ||
78 | * Generic constant information | ||
79 | */ | ||
80 | int major_version; | ||
81 | int minor_version; | ||
82 | int patch_version; | ||
83 | int ctime; | ||
84 | int level; | ||
85 | int size; | ||
86 | int nr_disks; | ||
87 | int raid_disks; | ||
88 | int md_minor; | ||
89 | int not_persistent; | ||
90 | |||
91 | /* | ||
92 | * Generic state information | ||
93 | */ | ||
94 | int utime; /* 0 Superblock update time */ | ||
95 | int state; /* 1 State bits (clean, ...) */ | ||
96 | int active_disks; /* 2 Number of currently active disks */ | ||
97 | int working_disks; /* 3 Number of working disks */ | ||
98 | int failed_disks; /* 4 Number of failed disks */ | ||
99 | int spare_disks; /* 5 Number of spare disks */ | ||
100 | |||
101 | /* | ||
102 | * Personality information | ||
103 | */ | ||
104 | int layout; /* 0 the array's physical layout */ | ||
105 | int chunk_size; /* 1 chunk size in bytes */ | ||
106 | |||
107 | } mdu_array_info_t; | ||
108 | |||
109 | /* non-obvious values for 'level' */ | ||
110 | #define LEVEL_MULTIPATH (-4) | ||
111 | #define LEVEL_LINEAR (-1) | ||
112 | #define LEVEL_FAULTY (-5) | ||
113 | |||
114 | /* we need a value for 'no level specified' and 0 | ||
115 | * means 'raid0', so we need something else. This is | ||
116 | * for internal use only | ||
117 | */ | ||
118 | #define LEVEL_NONE (-1000000) | ||
119 | |||
120 | typedef struct mdu_disk_info_s { | ||
121 | /* | ||
122 | * configuration/status of one particular disk | ||
123 | */ | ||
124 | int number; | ||
125 | int major; | ||
126 | int minor; | ||
127 | int raid_disk; | ||
128 | int state; | ||
129 | |||
130 | } mdu_disk_info_t; | ||
131 | |||
132 | typedef struct mdu_start_info_s { | ||
133 | /* | ||
134 | * configuration/status of one particular disk | ||
135 | */ | ||
136 | int major; | ||
137 | int minor; | ||
138 | int raid_disk; | ||
139 | int state; | ||
140 | |||
141 | } mdu_start_info_t; | ||
142 | |||
143 | typedef struct mdu_bitmap_file_s | ||
144 | { | ||
145 | char pathname[4096]; | ||
146 | } mdu_bitmap_file_t; | ||
147 | |||
148 | typedef struct mdu_param_s | ||
149 | { | ||
150 | int personality; /* 1,2,3,4 */ | ||
151 | int chunk_size; /* in bytes */ | ||
152 | int max_fault; /* unused for now */ | ||
153 | } mdu_param_t; | ||
154 | |||
155 | #endif /* _UAPI_MD_U_H */ | ||
diff --git a/include/xen/hvm.h b/include/xen/hvm.h index b193fa2f9fdd..13e43e41637d 100644 --- a/include/xen/hvm.h +++ b/include/xen/hvm.h | |||
@@ -5,6 +5,36 @@ | |||
5 | #include <xen/interface/hvm/params.h> | 5 | #include <xen/interface/hvm/params.h> |
6 | #include <asm/xen/hypercall.h> | 6 | #include <asm/xen/hypercall.h> |
7 | 7 | ||
8 | static const char *param_name(int op) | ||
9 | { | ||
10 | #define PARAM(x) [HVM_PARAM_##x] = #x | ||
11 | static const char *const names[] = { | ||
12 | PARAM(CALLBACK_IRQ), | ||
13 | PARAM(STORE_PFN), | ||
14 | PARAM(STORE_EVTCHN), | ||
15 | PARAM(PAE_ENABLED), | ||
16 | PARAM(IOREQ_PFN), | ||
17 | PARAM(BUFIOREQ_PFN), | ||
18 | PARAM(TIMER_MODE), | ||
19 | PARAM(HPET_ENABLED), | ||
20 | PARAM(IDENT_PT), | ||
21 | PARAM(DM_DOMAIN), | ||
22 | PARAM(ACPI_S_STATE), | ||
23 | PARAM(VM86_TSS), | ||
24 | PARAM(VPT_ALIGN), | ||
25 | PARAM(CONSOLE_PFN), | ||
26 | PARAM(CONSOLE_EVTCHN), | ||
27 | }; | ||
28 | #undef PARAM | ||
29 | |||
30 | if (op >= ARRAY_SIZE(names)) | ||
31 | return "unknown"; | ||
32 | |||
33 | if (!names[op]) | ||
34 | return "reserved"; | ||
35 | |||
36 | return names[op]; | ||
37 | } | ||
8 | static inline int hvm_get_parameter(int idx, uint64_t *value) | 38 | static inline int hvm_get_parameter(int idx, uint64_t *value) |
9 | { | 39 | { |
10 | struct xen_hvm_param xhv; | 40 | struct xen_hvm_param xhv; |
@@ -14,8 +44,8 @@ static inline int hvm_get_parameter(int idx, uint64_t *value) | |||
14 | xhv.index = idx; | 44 | xhv.index = idx; |
15 | r = HYPERVISOR_hvm_op(HVMOP_get_param, &xhv); | 45 | r = HYPERVISOR_hvm_op(HVMOP_get_param, &xhv); |
16 | if (r < 0) { | 46 | if (r < 0) { |
17 | printk(KERN_ERR "Cannot get hvm parameter %d: %d!\n", | 47 | printk(KERN_ERR "Cannot get hvm parameter %s (%d): %d!\n", |
18 | idx, r); | 48 | param_name(idx), idx, r); |
19 | return r; | 49 | return r; |
20 | } | 50 | } |
21 | *value = xhv.value; | 51 | *value = xhv.value; |
diff --git a/init/main.c b/init/main.c index 9cf77ab138a6..e33e09df3cbc 100644 --- a/init/main.c +++ b/init/main.c | |||
@@ -442,9 +442,11 @@ void __init __weak smp_setup_processor_id(void) | |||
442 | { | 442 | { |
443 | } | 443 | } |
444 | 444 | ||
445 | # if THREAD_SIZE >= PAGE_SIZE | ||
445 | void __init __weak thread_info_cache_init(void) | 446 | void __init __weak thread_info_cache_init(void) |
446 | { | 447 | { |
447 | } | 448 | } |
449 | #endif | ||
448 | 450 | ||
449 | /* | 451 | /* |
450 | * Set up kernel memory allocators | 452 | * Set up kernel memory allocators |
diff --git a/kernel/module.c b/kernel/module.c index 6085f5ef88ea..6e48c3a43599 100644 --- a/kernel/module.c +++ b/kernel/module.c | |||
@@ -2293,12 +2293,17 @@ static void layout_symtab(struct module *mod, struct load_info *info) | |||
2293 | src = (void *)info->hdr + symsect->sh_offset; | 2293 | src = (void *)info->hdr + symsect->sh_offset; |
2294 | nsrc = symsect->sh_size / sizeof(*src); | 2294 | nsrc = symsect->sh_size / sizeof(*src); |
2295 | 2295 | ||
2296 | /* strtab always starts with a nul, so offset 0 is the empty string. */ | ||
2297 | strtab_size = 1; | ||
2298 | |||
2296 | /* Compute total space required for the core symbols' strtab. */ | 2299 | /* Compute total space required for the core symbols' strtab. */ |
2297 | for (ndst = i = strtab_size = 1; i < nsrc; ++i, ++src) | 2300 | for (ndst = i = 0; i < nsrc; i++) { |
2298 | if (is_core_symbol(src, info->sechdrs, info->hdr->e_shnum)) { | 2301 | if (i == 0 || |
2299 | strtab_size += strlen(&info->strtab[src->st_name]) + 1; | 2302 | is_core_symbol(src+i, info->sechdrs, info->hdr->e_shnum)) { |
2303 | strtab_size += strlen(&info->strtab[src[i].st_name])+1; | ||
2300 | ndst++; | 2304 | ndst++; |
2301 | } | 2305 | } |
2306 | } | ||
2302 | 2307 | ||
2303 | /* Append room for core symbols at end of core part. */ | 2308 | /* Append room for core symbols at end of core part. */ |
2304 | info->symoffs = ALIGN(mod->core_size, symsect->sh_addralign ?: 1); | 2309 | info->symoffs = ALIGN(mod->core_size, symsect->sh_addralign ?: 1); |
@@ -2332,15 +2337,15 @@ static void add_kallsyms(struct module *mod, const struct load_info *info) | |||
2332 | mod->core_symtab = dst = mod->module_core + info->symoffs; | 2337 | mod->core_symtab = dst = mod->module_core + info->symoffs; |
2333 | mod->core_strtab = s = mod->module_core + info->stroffs; | 2338 | mod->core_strtab = s = mod->module_core + info->stroffs; |
2334 | src = mod->symtab; | 2339 | src = mod->symtab; |
2335 | *dst = *src; | ||
2336 | *s++ = 0; | 2340 | *s++ = 0; |
2337 | for (ndst = i = 1; i < mod->num_symtab; ++i, ++src) { | 2341 | for (ndst = i = 0; i < mod->num_symtab; i++) { |
2338 | if (!is_core_symbol(src, info->sechdrs, info->hdr->e_shnum)) | 2342 | if (i == 0 || |
2339 | continue; | 2343 | is_core_symbol(src+i, info->sechdrs, info->hdr->e_shnum)) { |
2340 | 2344 | dst[ndst] = src[i]; | |
2341 | dst[ndst] = *src; | 2345 | dst[ndst++].st_name = s - mod->core_strtab; |
2342 | dst[ndst++].st_name = s - mod->core_strtab; | 2346 | s += strlcpy(s, &mod->strtab[src[i].st_name], |
2343 | s += strlcpy(s, &mod->strtab[src->st_name], KSYM_NAME_LEN) + 1; | 2347 | KSYM_NAME_LEN) + 1; |
2348 | } | ||
2344 | } | 2349 | } |
2345 | mod->core_num_syms = ndst; | 2350 | mod->core_num_syms = ndst; |
2346 | } | 2351 | } |
diff --git a/mm/vmscan.c b/mm/vmscan.c index 2624edcfb420..8b055e9379bc 100644 --- a/mm/vmscan.c +++ b/mm/vmscan.c | |||
@@ -3017,6 +3017,8 @@ static int kswapd(void *p) | |||
3017 | &balanced_classzone_idx); | 3017 | &balanced_classzone_idx); |
3018 | } | 3018 | } |
3019 | } | 3019 | } |
3020 | |||
3021 | current->reclaim_state = NULL; | ||
3020 | return 0; | 3022 | return 0; |
3021 | } | 3023 | } |
3022 | 3024 | ||
diff --git a/net/ceph/messenger.c b/net/ceph/messenger.c index 159aa8bef9e7..3ef1759403b4 100644 --- a/net/ceph/messenger.c +++ b/net/ceph/messenger.c | |||
@@ -2300,10 +2300,11 @@ restart: | |||
2300 | mutex_unlock(&con->mutex); | 2300 | mutex_unlock(&con->mutex); |
2301 | return; | 2301 | return; |
2302 | } else { | 2302 | } else { |
2303 | con->ops->put(con); | ||
2304 | dout("con_work %p FAILED to back off %lu\n", con, | 2303 | dout("con_work %p FAILED to back off %lu\n", con, |
2305 | con->delay); | 2304 | con->delay); |
2305 | set_bit(CON_FLAG_BACKOFF, &con->flags); | ||
2306 | } | 2306 | } |
2307 | goto done; | ||
2307 | } | 2308 | } |
2308 | 2309 | ||
2309 | if (con->state == CON_STATE_STANDBY) { | 2310 | if (con->state == CON_STATE_STANDBY) { |
@@ -2749,7 +2750,8 @@ static int ceph_con_in_msg_alloc(struct ceph_connection *con, int *skip) | |||
2749 | msg = con->ops->alloc_msg(con, hdr, skip); | 2750 | msg = con->ops->alloc_msg(con, hdr, skip); |
2750 | mutex_lock(&con->mutex); | 2751 | mutex_lock(&con->mutex); |
2751 | if (con->state != CON_STATE_OPEN) { | 2752 | if (con->state != CON_STATE_OPEN) { |
2752 | ceph_msg_put(msg); | 2753 | if (msg) |
2754 | ceph_msg_put(msg); | ||
2753 | return -EAGAIN; | 2755 | return -EAGAIN; |
2754 | } | 2756 | } |
2755 | con->in_msg = msg; | 2757 | con->in_msg = msg; |
diff --git a/net/core/dev.c b/net/core/dev.c index 09cb3f6dc40c..bda6d004f9f0 100644 --- a/net/core/dev.c +++ b/net/core/dev.c | |||
@@ -1666,7 +1666,7 @@ static inline int deliver_skb(struct sk_buff *skb, | |||
1666 | 1666 | ||
1667 | static inline bool skb_loop_sk(struct packet_type *ptype, struct sk_buff *skb) | 1667 | static inline bool skb_loop_sk(struct packet_type *ptype, struct sk_buff *skb) |
1668 | { | 1668 | { |
1669 | if (ptype->af_packet_priv == NULL) | 1669 | if (!ptype->af_packet_priv || !skb->sk) |
1670 | return false; | 1670 | return false; |
1671 | 1671 | ||
1672 | if (ptype->id_match) | 1672 | if (ptype->id_match) |
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c index 76d4c2c3c89b..fad649ae4dec 100644 --- a/net/core/rtnetlink.c +++ b/net/core/rtnetlink.c | |||
@@ -2192,7 +2192,8 @@ static int nlmsg_populate_fdb(struct sk_buff *skb, | |||
2192 | goto skip; | 2192 | goto skip; |
2193 | 2193 | ||
2194 | err = nlmsg_populate_fdb_fill(skb, dev, ha->addr, | 2194 | err = nlmsg_populate_fdb_fill(skb, dev, ha->addr, |
2195 | portid, seq, 0, NTF_SELF); | 2195 | portid, seq, |
2196 | RTM_NEWNEIGH, NTF_SELF); | ||
2196 | if (err < 0) | 2197 | if (err < 0) |
2197 | return err; | 2198 | return err; |
2198 | skip: | 2199 | skip: |
diff --git a/net/ipv4/inet_diag.c b/net/ipv4/inet_diag.c index 535584c00f91..0c34bfabc11f 100644 --- a/net/ipv4/inet_diag.c +++ b/net/ipv4/inet_diag.c | |||
@@ -892,13 +892,16 @@ static int __inet_diag_dump(struct sk_buff *skb, struct netlink_callback *cb, | |||
892 | struct inet_diag_req_v2 *r, struct nlattr *bc) | 892 | struct inet_diag_req_v2 *r, struct nlattr *bc) |
893 | { | 893 | { |
894 | const struct inet_diag_handler *handler; | 894 | const struct inet_diag_handler *handler; |
895 | int err = 0; | ||
895 | 896 | ||
896 | handler = inet_diag_lock_handler(r->sdiag_protocol); | 897 | handler = inet_diag_lock_handler(r->sdiag_protocol); |
897 | if (!IS_ERR(handler)) | 898 | if (!IS_ERR(handler)) |
898 | handler->dump(skb, cb, r, bc); | 899 | handler->dump(skb, cb, r, bc); |
900 | else | ||
901 | err = PTR_ERR(handler); | ||
899 | inet_diag_unlock_handler(handler); | 902 | inet_diag_unlock_handler(handler); |
900 | 903 | ||
901 | return skb->len; | 904 | return err ? : skb->len; |
902 | } | 905 | } |
903 | 906 | ||
904 | static int inet_diag_dump(struct sk_buff *skb, struct netlink_callback *cb) | 907 | static int inet_diag_dump(struct sk_buff *skb, struct netlink_callback *cb) |
diff --git a/net/ipv4/netfilter/iptable_nat.c b/net/ipv4/netfilter/iptable_nat.c index 9e0ffaf1d942..a82047282dbb 100644 --- a/net/ipv4/netfilter/iptable_nat.c +++ b/net/ipv4/netfilter/iptable_nat.c | |||
@@ -184,7 +184,8 @@ nf_nat_ipv4_out(unsigned int hooknum, | |||
184 | 184 | ||
185 | if ((ct->tuplehash[dir].tuple.src.u3.ip != | 185 | if ((ct->tuplehash[dir].tuple.src.u3.ip != |
186 | ct->tuplehash[!dir].tuple.dst.u3.ip) || | 186 | ct->tuplehash[!dir].tuple.dst.u3.ip) || |
187 | (ct->tuplehash[dir].tuple.src.u.all != | 187 | (ct->tuplehash[dir].tuple.dst.protonum != IPPROTO_ICMP && |
188 | ct->tuplehash[dir].tuple.src.u.all != | ||
188 | ct->tuplehash[!dir].tuple.dst.u.all)) | 189 | ct->tuplehash[!dir].tuple.dst.u.all)) |
189 | if (nf_xfrm_me_harder(skb, AF_INET) < 0) | 190 | if (nf_xfrm_me_harder(skb, AF_INET) < 0) |
190 | ret = NF_DROP; | 191 | ret = NF_DROP; |
@@ -221,6 +222,7 @@ nf_nat_ipv4_local_fn(unsigned int hooknum, | |||
221 | } | 222 | } |
222 | #ifdef CONFIG_XFRM | 223 | #ifdef CONFIG_XFRM |
223 | else if (!(IPCB(skb)->flags & IPSKB_XFRM_TRANSFORMED) && | 224 | else if (!(IPCB(skb)->flags & IPSKB_XFRM_TRANSFORMED) && |
225 | ct->tuplehash[dir].tuple.dst.protonum != IPPROTO_ICMP && | ||
224 | ct->tuplehash[dir].tuple.dst.u.all != | 226 | ct->tuplehash[dir].tuple.dst.u.all != |
225 | ct->tuplehash[!dir].tuple.src.u.all) | 227 | ct->tuplehash[!dir].tuple.src.u.all) |
226 | if (nf_xfrm_me_harder(skb, AF_INET) < 0) | 228 | if (nf_xfrm_me_harder(skb, AF_INET) < 0) |
diff --git a/net/ipv4/tcp_illinois.c b/net/ipv4/tcp_illinois.c index 813b43a76fec..834857f3c871 100644 --- a/net/ipv4/tcp_illinois.c +++ b/net/ipv4/tcp_illinois.c | |||
@@ -313,11 +313,13 @@ static void tcp_illinois_info(struct sock *sk, u32 ext, | |||
313 | .tcpv_rttcnt = ca->cnt_rtt, | 313 | .tcpv_rttcnt = ca->cnt_rtt, |
314 | .tcpv_minrtt = ca->base_rtt, | 314 | .tcpv_minrtt = ca->base_rtt, |
315 | }; | 315 | }; |
316 | u64 t = ca->sum_rtt; | ||
317 | 316 | ||
318 | do_div(t, ca->cnt_rtt); | 317 | if (info.tcpv_rttcnt > 0) { |
319 | info.tcpv_rtt = t; | 318 | u64 t = ca->sum_rtt; |
320 | 319 | ||
320 | do_div(t, info.tcpv_rttcnt); | ||
321 | info.tcpv_rtt = t; | ||
322 | } | ||
321 | nla_put(skb, INET_DIAG_VEGASINFO, sizeof(info), &info); | 323 | nla_put(skb, INET_DIAG_VEGASINFO, sizeof(info), &info); |
322 | } | 324 | } |
323 | } | 325 | } |
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c index 1db663983587..2c2b13a999ea 100644 --- a/net/ipv4/tcp_input.c +++ b/net/ipv4/tcp_input.c | |||
@@ -4529,6 +4529,9 @@ int tcp_send_rcvq(struct sock *sk, struct msghdr *msg, size_t size) | |||
4529 | struct tcphdr *th; | 4529 | struct tcphdr *th; |
4530 | bool fragstolen; | 4530 | bool fragstolen; |
4531 | 4531 | ||
4532 | if (size == 0) | ||
4533 | return 0; | ||
4534 | |||
4532 | skb = alloc_skb(size + sizeof(*th), sk->sk_allocation); | 4535 | skb = alloc_skb(size + sizeof(*th), sk->sk_allocation); |
4533 | if (!skb) | 4536 | if (!skb) |
4534 | goto err; | 4537 | goto err; |
diff --git a/net/ipv4/tcp_metrics.c b/net/ipv4/tcp_metrics.c index 4c752a6e0bcd..53bc5847bfa8 100644 --- a/net/ipv4/tcp_metrics.c +++ b/net/ipv4/tcp_metrics.c | |||
@@ -864,7 +864,7 @@ static int parse_nl_addr(struct genl_info *info, struct inetpeer_addr *addr, | |||
864 | } | 864 | } |
865 | a = info->attrs[TCP_METRICS_ATTR_ADDR_IPV6]; | 865 | a = info->attrs[TCP_METRICS_ATTR_ADDR_IPV6]; |
866 | if (a) { | 866 | if (a) { |
867 | if (nla_len(a) != sizeof(sizeof(struct in6_addr))) | 867 | if (nla_len(a) != sizeof(struct in6_addr)) |
868 | return -EINVAL; | 868 | return -EINVAL; |
869 | addr->family = AF_INET6; | 869 | addr->family = AF_INET6; |
870 | memcpy(addr->addr.a6, nla_data(a), sizeof(addr->addr.a6)); | 870 | memcpy(addr->addr.a6, nla_data(a), sizeof(addr->addr.a6)); |
diff --git a/net/ipv6/ip6_gre.c b/net/ipv6/ip6_gre.c index 0185679c5f53..d5cb3c4e66f8 100644 --- a/net/ipv6/ip6_gre.c +++ b/net/ipv6/ip6_gre.c | |||
@@ -1633,9 +1633,9 @@ static size_t ip6gre_get_size(const struct net_device *dev) | |||
1633 | /* IFLA_GRE_OKEY */ | 1633 | /* IFLA_GRE_OKEY */ |
1634 | nla_total_size(4) + | 1634 | nla_total_size(4) + |
1635 | /* IFLA_GRE_LOCAL */ | 1635 | /* IFLA_GRE_LOCAL */ |
1636 | nla_total_size(4) + | 1636 | nla_total_size(sizeof(struct in6_addr)) + |
1637 | /* IFLA_GRE_REMOTE */ | 1637 | /* IFLA_GRE_REMOTE */ |
1638 | nla_total_size(4) + | 1638 | nla_total_size(sizeof(struct in6_addr)) + |
1639 | /* IFLA_GRE_TTL */ | 1639 | /* IFLA_GRE_TTL */ |
1640 | nla_total_size(1) + | 1640 | nla_total_size(1) + |
1641 | /* IFLA_GRE_TOS */ | 1641 | /* IFLA_GRE_TOS */ |
@@ -1659,8 +1659,8 @@ static int ip6gre_fill_info(struct sk_buff *skb, const struct net_device *dev) | |||
1659 | nla_put_be16(skb, IFLA_GRE_OFLAGS, p->o_flags) || | 1659 | nla_put_be16(skb, IFLA_GRE_OFLAGS, p->o_flags) || |
1660 | nla_put_be32(skb, IFLA_GRE_IKEY, p->i_key) || | 1660 | nla_put_be32(skb, IFLA_GRE_IKEY, p->i_key) || |
1661 | nla_put_be32(skb, IFLA_GRE_OKEY, p->o_key) || | 1661 | nla_put_be32(skb, IFLA_GRE_OKEY, p->o_key) || |
1662 | nla_put(skb, IFLA_GRE_LOCAL, sizeof(struct in6_addr), &p->raddr) || | 1662 | nla_put(skb, IFLA_GRE_LOCAL, sizeof(struct in6_addr), &p->laddr) || |
1663 | nla_put(skb, IFLA_GRE_REMOTE, sizeof(struct in6_addr), &p->laddr) || | 1663 | nla_put(skb, IFLA_GRE_REMOTE, sizeof(struct in6_addr), &p->raddr) || |
1664 | nla_put_u8(skb, IFLA_GRE_TTL, p->hop_limit) || | 1664 | nla_put_u8(skb, IFLA_GRE_TTL, p->hop_limit) || |
1665 | /*nla_put_u8(skb, IFLA_GRE_TOS, t->priority) ||*/ | 1665 | /*nla_put_u8(skb, IFLA_GRE_TOS, t->priority) ||*/ |
1666 | nla_put_u8(skb, IFLA_GRE_ENCAP_LIMIT, p->encap_limit) || | 1666 | nla_put_u8(skb, IFLA_GRE_ENCAP_LIMIT, p->encap_limit) || |
diff --git a/net/ipv6/ndisc.c b/net/ipv6/ndisc.c index ff36194a71aa..2edce30ef733 100644 --- a/net/ipv6/ndisc.c +++ b/net/ipv6/ndisc.c | |||
@@ -535,7 +535,7 @@ static void ndisc_send_unsol_na(struct net_device *dev) | |||
535 | { | 535 | { |
536 | struct inet6_dev *idev; | 536 | struct inet6_dev *idev; |
537 | struct inet6_ifaddr *ifa; | 537 | struct inet6_ifaddr *ifa; |
538 | struct in6_addr mcaddr; | 538 | struct in6_addr mcaddr = IN6ADDR_LINKLOCAL_ALLNODES_INIT; |
539 | 539 | ||
540 | idev = in6_dev_get(dev); | 540 | idev = in6_dev_get(dev); |
541 | if (!idev) | 541 | if (!idev) |
@@ -543,7 +543,6 @@ static void ndisc_send_unsol_na(struct net_device *dev) | |||
543 | 543 | ||
544 | read_lock_bh(&idev->lock); | 544 | read_lock_bh(&idev->lock); |
545 | list_for_each_entry(ifa, &idev->addr_list, if_list) { | 545 | list_for_each_entry(ifa, &idev->addr_list, if_list) { |
546 | addrconf_addr_solict_mult(&ifa->addr, &mcaddr); | ||
547 | ndisc_send_na(dev, NULL, &mcaddr, &ifa->addr, | 546 | ndisc_send_na(dev, NULL, &mcaddr, &ifa->addr, |
548 | /*router=*/ !!idev->cnf.forwarding, | 547 | /*router=*/ !!idev->cnf.forwarding, |
549 | /*solicited=*/ false, /*override=*/ true, | 548 | /*solicited=*/ false, /*override=*/ true, |
diff --git a/net/ipv6/netfilter/ip6table_nat.c b/net/ipv6/netfilter/ip6table_nat.c index e418bd6350a4..d57dab17a182 100644 --- a/net/ipv6/netfilter/ip6table_nat.c +++ b/net/ipv6/netfilter/ip6table_nat.c | |||
@@ -186,7 +186,8 @@ nf_nat_ipv6_out(unsigned int hooknum, | |||
186 | 186 | ||
187 | if (!nf_inet_addr_cmp(&ct->tuplehash[dir].tuple.src.u3, | 187 | if (!nf_inet_addr_cmp(&ct->tuplehash[dir].tuple.src.u3, |
188 | &ct->tuplehash[!dir].tuple.dst.u3) || | 188 | &ct->tuplehash[!dir].tuple.dst.u3) || |
189 | (ct->tuplehash[dir].tuple.src.u.all != | 189 | (ct->tuplehash[dir].tuple.dst.protonum != IPPROTO_ICMPV6 && |
190 | ct->tuplehash[dir].tuple.src.u.all != | ||
190 | ct->tuplehash[!dir].tuple.dst.u.all)) | 191 | ct->tuplehash[!dir].tuple.dst.u.all)) |
191 | if (nf_xfrm_me_harder(skb, AF_INET6) < 0) | 192 | if (nf_xfrm_me_harder(skb, AF_INET6) < 0) |
192 | ret = NF_DROP; | 193 | ret = NF_DROP; |
@@ -222,6 +223,7 @@ nf_nat_ipv6_local_fn(unsigned int hooknum, | |||
222 | } | 223 | } |
223 | #ifdef CONFIG_XFRM | 224 | #ifdef CONFIG_XFRM |
224 | else if (!(IP6CB(skb)->flags & IP6SKB_XFRM_TRANSFORMED) && | 225 | else if (!(IP6CB(skb)->flags & IP6SKB_XFRM_TRANSFORMED) && |
226 | ct->tuplehash[dir].tuple.dst.protonum != IPPROTO_ICMPV6 && | ||
225 | ct->tuplehash[dir].tuple.dst.u.all != | 227 | ct->tuplehash[dir].tuple.dst.u.all != |
226 | ct->tuplehash[!dir].tuple.src.u.all) | 228 | ct->tuplehash[!dir].tuple.src.u.all) |
227 | if (nf_xfrm_me_harder(skb, AF_INET6)) | 229 | if (nf_xfrm_me_harder(skb, AF_INET6)) |
diff --git a/net/ipv6/netfilter/nf_conntrack_reasm.c b/net/ipv6/netfilter/nf_conntrack_reasm.c index 18bd9bbbd1c6..22c8ea951185 100644 --- a/net/ipv6/netfilter/nf_conntrack_reasm.c +++ b/net/ipv6/netfilter/nf_conntrack_reasm.c | |||
@@ -85,7 +85,7 @@ static struct ctl_table nf_ct_frag6_sysctl_table[] = { | |||
85 | { } | 85 | { } |
86 | }; | 86 | }; |
87 | 87 | ||
88 | static int __net_init nf_ct_frag6_sysctl_register(struct net *net) | 88 | static int nf_ct_frag6_sysctl_register(struct net *net) |
89 | { | 89 | { |
90 | struct ctl_table *table; | 90 | struct ctl_table *table; |
91 | struct ctl_table_header *hdr; | 91 | struct ctl_table_header *hdr; |
@@ -127,7 +127,7 @@ static void __net_exit nf_ct_frags6_sysctl_unregister(struct net *net) | |||
127 | } | 127 | } |
128 | 128 | ||
129 | #else | 129 | #else |
130 | static int __net_init nf_ct_frag6_sysctl_register(struct net *net) | 130 | static int nf_ct_frag6_sysctl_register(struct net *net) |
131 | { | 131 | { |
132 | return 0; | 132 | return 0; |
133 | } | 133 | } |
diff --git a/net/l2tp/l2tp_eth.c b/net/l2tp/l2tp_eth.c index 37b8b8ba31f7..76125c57ee6d 100644 --- a/net/l2tp/l2tp_eth.c +++ b/net/l2tp/l2tp_eth.c | |||
@@ -291,6 +291,7 @@ static int l2tp_eth_create(struct net *net, u32 tunnel_id, u32 session_id, u32 p | |||
291 | 291 | ||
292 | out_del_dev: | 292 | out_del_dev: |
293 | free_netdev(dev); | 293 | free_netdev(dev); |
294 | spriv->dev = NULL; | ||
294 | out_del_session: | 295 | out_del_session: |
295 | l2tp_session_delete(session); | 296 | l2tp_session_delete(session); |
296 | out: | 297 | out: |
diff --git a/net/mac80211/ibss.c b/net/mac80211/ibss.c index 5f3620f0bc0a..bf87c70ac6c5 100644 --- a/net/mac80211/ibss.c +++ b/net/mac80211/ibss.c | |||
@@ -1108,7 +1108,7 @@ int ieee80211_ibss_join(struct ieee80211_sub_if_data *sdata, | |||
1108 | sdata->u.ibss.state = IEEE80211_IBSS_MLME_SEARCH; | 1108 | sdata->u.ibss.state = IEEE80211_IBSS_MLME_SEARCH; |
1109 | sdata->u.ibss.ibss_join_req = jiffies; | 1109 | sdata->u.ibss.ibss_join_req = jiffies; |
1110 | 1110 | ||
1111 | memcpy(sdata->u.ibss.ssid, params->ssid, IEEE80211_MAX_SSID_LEN); | 1111 | memcpy(sdata->u.ibss.ssid, params->ssid, params->ssid_len); |
1112 | sdata->u.ibss.ssid_len = params->ssid_len; | 1112 | sdata->u.ibss.ssid_len = params->ssid_len; |
1113 | 1113 | ||
1114 | mutex_unlock(&sdata->u.ibss.mtx); | 1114 | mutex_unlock(&sdata->u.ibss.mtx); |
diff --git a/net/mac80211/rx.c b/net/mac80211/rx.c index 61c621e9273f..00ade7feb2e3 100644 --- a/net/mac80211/rx.c +++ b/net/mac80211/rx.c | |||
@@ -531,6 +531,11 @@ ieee80211_rx_mesh_check(struct ieee80211_rx_data *rx) | |||
531 | 531 | ||
532 | if (ieee80211_is_action(hdr->frame_control)) { | 532 | if (ieee80211_is_action(hdr->frame_control)) { |
533 | u8 category; | 533 | u8 category; |
534 | |||
535 | /* make sure category field is present */ | ||
536 | if (rx->skb->len < IEEE80211_MIN_ACTION_SIZE) | ||
537 | return RX_DROP_MONITOR; | ||
538 | |||
534 | mgmt = (struct ieee80211_mgmt *)hdr; | 539 | mgmt = (struct ieee80211_mgmt *)hdr; |
535 | category = mgmt->u.action.category; | 540 | category = mgmt->u.action.category; |
536 | if (category != WLAN_CATEGORY_MESH_ACTION && | 541 | if (category != WLAN_CATEGORY_MESH_ACTION && |
@@ -883,14 +888,16 @@ ieee80211_rx_h_check(struct ieee80211_rx_data *rx) | |||
883 | */ | 888 | */ |
884 | if (rx->sta && rx->sdata->vif.type == NL80211_IFTYPE_STATION && | 889 | if (rx->sta && rx->sdata->vif.type == NL80211_IFTYPE_STATION && |
885 | ieee80211_is_data_present(hdr->frame_control)) { | 890 | ieee80211_is_data_present(hdr->frame_control)) { |
886 | u16 ethertype; | 891 | unsigned int hdrlen; |
887 | u8 *payload; | 892 | __be16 ethertype; |
888 | 893 | ||
889 | payload = rx->skb->data + | 894 | hdrlen = ieee80211_hdrlen(hdr->frame_control); |
890 | ieee80211_hdrlen(hdr->frame_control); | 895 | |
891 | ethertype = (payload[6] << 8) | payload[7]; | 896 | if (rx->skb->len < hdrlen + 8) |
892 | if (cpu_to_be16(ethertype) == | 897 | return RX_DROP_MONITOR; |
893 | rx->sdata->control_port_protocol) | 898 | |
899 | skb_copy_bits(rx->skb, hdrlen + 6, ðertype, 2); | ||
900 | if (ethertype == rx->sdata->control_port_protocol) | ||
894 | return RX_CONTINUE; | 901 | return RX_CONTINUE; |
895 | } | 902 | } |
896 | 903 | ||
@@ -1462,11 +1469,14 @@ ieee80211_rx_h_defragment(struct ieee80211_rx_data *rx) | |||
1462 | 1469 | ||
1463 | hdr = (struct ieee80211_hdr *)rx->skb->data; | 1470 | hdr = (struct ieee80211_hdr *)rx->skb->data; |
1464 | fc = hdr->frame_control; | 1471 | fc = hdr->frame_control; |
1472 | |||
1473 | if (ieee80211_is_ctl(fc)) | ||
1474 | return RX_CONTINUE; | ||
1475 | |||
1465 | sc = le16_to_cpu(hdr->seq_ctrl); | 1476 | sc = le16_to_cpu(hdr->seq_ctrl); |
1466 | frag = sc & IEEE80211_SCTL_FRAG; | 1477 | frag = sc & IEEE80211_SCTL_FRAG; |
1467 | 1478 | ||
1468 | if (likely((!ieee80211_has_morefrags(fc) && frag == 0) || | 1479 | if (likely((!ieee80211_has_morefrags(fc) && frag == 0) || |
1469 | (rx->skb)->len < 24 || | ||
1470 | is_multicast_ether_addr(hdr->addr1))) { | 1480 | is_multicast_ether_addr(hdr->addr1))) { |
1471 | /* not fragmented */ | 1481 | /* not fragmented */ |
1472 | goto out; | 1482 | goto out; |
@@ -1889,6 +1899,20 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx) | |||
1889 | 1899 | ||
1890 | hdr = (struct ieee80211_hdr *) skb->data; | 1900 | hdr = (struct ieee80211_hdr *) skb->data; |
1891 | hdrlen = ieee80211_hdrlen(hdr->frame_control); | 1901 | hdrlen = ieee80211_hdrlen(hdr->frame_control); |
1902 | |||
1903 | /* make sure fixed part of mesh header is there, also checks skb len */ | ||
1904 | if (!pskb_may_pull(rx->skb, hdrlen + 6)) | ||
1905 | return RX_DROP_MONITOR; | ||
1906 | |||
1907 | mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen); | ||
1908 | |||
1909 | /* make sure full mesh header is there, also checks skb len */ | ||
1910 | if (!pskb_may_pull(rx->skb, | ||
1911 | hdrlen + ieee80211_get_mesh_hdrlen(mesh_hdr))) | ||
1912 | return RX_DROP_MONITOR; | ||
1913 | |||
1914 | /* reload pointers */ | ||
1915 | hdr = (struct ieee80211_hdr *) skb->data; | ||
1892 | mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen); | 1916 | mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen); |
1893 | 1917 | ||
1894 | /* frame is in RMC, don't forward */ | 1918 | /* frame is in RMC, don't forward */ |
@@ -1897,7 +1921,8 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx) | |||
1897 | mesh_rmc_check(hdr->addr3, mesh_hdr, rx->sdata)) | 1921 | mesh_rmc_check(hdr->addr3, mesh_hdr, rx->sdata)) |
1898 | return RX_DROP_MONITOR; | 1922 | return RX_DROP_MONITOR; |
1899 | 1923 | ||
1900 | if (!ieee80211_is_data(hdr->frame_control)) | 1924 | if (!ieee80211_is_data(hdr->frame_control) || |
1925 | !(status->rx_flags & IEEE80211_RX_RA_MATCH)) | ||
1901 | return RX_CONTINUE; | 1926 | return RX_CONTINUE; |
1902 | 1927 | ||
1903 | if (!mesh_hdr->ttl) | 1928 | if (!mesh_hdr->ttl) |
@@ -1911,9 +1936,12 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx) | |||
1911 | if (is_multicast_ether_addr(hdr->addr1)) { | 1936 | if (is_multicast_ether_addr(hdr->addr1)) { |
1912 | mpp_addr = hdr->addr3; | 1937 | mpp_addr = hdr->addr3; |
1913 | proxied_addr = mesh_hdr->eaddr1; | 1938 | proxied_addr = mesh_hdr->eaddr1; |
1914 | } else { | 1939 | } else if (mesh_hdr->flags & MESH_FLAGS_AE_A5_A6) { |
1940 | /* has_a4 already checked in ieee80211_rx_mesh_check */ | ||
1915 | mpp_addr = hdr->addr4; | 1941 | mpp_addr = hdr->addr4; |
1916 | proxied_addr = mesh_hdr->eaddr2; | 1942 | proxied_addr = mesh_hdr->eaddr2; |
1943 | } else { | ||
1944 | return RX_DROP_MONITOR; | ||
1917 | } | 1945 | } |
1918 | 1946 | ||
1919 | rcu_read_lock(); | 1947 | rcu_read_lock(); |
@@ -1941,12 +1969,9 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx) | |||
1941 | } | 1969 | } |
1942 | skb_set_queue_mapping(skb, q); | 1970 | skb_set_queue_mapping(skb, q); |
1943 | 1971 | ||
1944 | if (!(status->rx_flags & IEEE80211_RX_RA_MATCH)) | ||
1945 | goto out; | ||
1946 | |||
1947 | if (!--mesh_hdr->ttl) { | 1972 | if (!--mesh_hdr->ttl) { |
1948 | IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl); | 1973 | IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl); |
1949 | return RX_DROP_MONITOR; | 1974 | goto out; |
1950 | } | 1975 | } |
1951 | 1976 | ||
1952 | if (!ifmsh->mshcfg.dot11MeshForwarding) | 1977 | if (!ifmsh->mshcfg.dot11MeshForwarding) |
@@ -2353,6 +2378,10 @@ ieee80211_rx_h_action(struct ieee80211_rx_data *rx) | |||
2353 | } | 2378 | } |
2354 | break; | 2379 | break; |
2355 | case WLAN_CATEGORY_SELF_PROTECTED: | 2380 | case WLAN_CATEGORY_SELF_PROTECTED: |
2381 | if (len < (IEEE80211_MIN_ACTION_SIZE + | ||
2382 | sizeof(mgmt->u.action.u.self_prot.action_code))) | ||
2383 | break; | ||
2384 | |||
2356 | switch (mgmt->u.action.u.self_prot.action_code) { | 2385 | switch (mgmt->u.action.u.self_prot.action_code) { |
2357 | case WLAN_SP_MESH_PEERING_OPEN: | 2386 | case WLAN_SP_MESH_PEERING_OPEN: |
2358 | case WLAN_SP_MESH_PEERING_CLOSE: | 2387 | case WLAN_SP_MESH_PEERING_CLOSE: |
@@ -2371,6 +2400,10 @@ ieee80211_rx_h_action(struct ieee80211_rx_data *rx) | |||
2371 | } | 2400 | } |
2372 | break; | 2401 | break; |
2373 | case WLAN_CATEGORY_MESH_ACTION: | 2402 | case WLAN_CATEGORY_MESH_ACTION: |
2403 | if (len < (IEEE80211_MIN_ACTION_SIZE + | ||
2404 | sizeof(mgmt->u.action.u.mesh_action.action_code))) | ||
2405 | break; | ||
2406 | |||
2374 | if (!ieee80211_vif_is_mesh(&sdata->vif)) | 2407 | if (!ieee80211_vif_is_mesh(&sdata->vif)) |
2375 | break; | 2408 | break; |
2376 | if (mesh_action_is_path_sel(mgmt) && | 2409 | if (mesh_action_is_path_sel(mgmt) && |
@@ -2913,10 +2946,15 @@ static void __ieee80211_rx_handle_packet(struct ieee80211_hw *hw, | |||
2913 | if (ieee80211_is_data(fc) || ieee80211_is_mgmt(fc)) | 2946 | if (ieee80211_is_data(fc) || ieee80211_is_mgmt(fc)) |
2914 | local->dot11ReceivedFragmentCount++; | 2947 | local->dot11ReceivedFragmentCount++; |
2915 | 2948 | ||
2916 | if (ieee80211_is_mgmt(fc)) | 2949 | if (ieee80211_is_mgmt(fc)) { |
2917 | err = skb_linearize(skb); | 2950 | /* drop frame if too short for header */ |
2918 | else | 2951 | if (skb->len < ieee80211_hdrlen(fc)) |
2952 | err = -ENOBUFS; | ||
2953 | else | ||
2954 | err = skb_linearize(skb); | ||
2955 | } else { | ||
2919 | err = !pskb_may_pull(skb, ieee80211_hdrlen(fc)); | 2956 | err = !pskb_may_pull(skb, ieee80211_hdrlen(fc)); |
2957 | } | ||
2920 | 2958 | ||
2921 | if (err) { | 2959 | if (err) { |
2922 | dev_kfree_skb(skb); | 2960 | dev_kfree_skb(skb); |
diff --git a/net/mac80211/util.c b/net/mac80211/util.c index 94e586873979..239391807ca9 100644 --- a/net/mac80211/util.c +++ b/net/mac80211/util.c | |||
@@ -643,13 +643,41 @@ u32 ieee802_11_parse_elems_crc(u8 *start, size_t len, | |||
643 | break; | 643 | break; |
644 | } | 644 | } |
645 | 645 | ||
646 | if (id != WLAN_EID_VENDOR_SPECIFIC && | 646 | switch (id) { |
647 | id != WLAN_EID_QUIET && | 647 | case WLAN_EID_SSID: |
648 | test_bit(id, seen_elems)) { | 648 | case WLAN_EID_SUPP_RATES: |
649 | elems->parse_error = true; | 649 | case WLAN_EID_FH_PARAMS: |
650 | left -= elen; | 650 | case WLAN_EID_DS_PARAMS: |
651 | pos += elen; | 651 | case WLAN_EID_CF_PARAMS: |
652 | continue; | 652 | case WLAN_EID_TIM: |
653 | case WLAN_EID_IBSS_PARAMS: | ||
654 | case WLAN_EID_CHALLENGE: | ||
655 | case WLAN_EID_RSN: | ||
656 | case WLAN_EID_ERP_INFO: | ||
657 | case WLAN_EID_EXT_SUPP_RATES: | ||
658 | case WLAN_EID_HT_CAPABILITY: | ||
659 | case WLAN_EID_HT_OPERATION: | ||
660 | case WLAN_EID_VHT_CAPABILITY: | ||
661 | case WLAN_EID_VHT_OPERATION: | ||
662 | case WLAN_EID_MESH_ID: | ||
663 | case WLAN_EID_MESH_CONFIG: | ||
664 | case WLAN_EID_PEER_MGMT: | ||
665 | case WLAN_EID_PREQ: | ||
666 | case WLAN_EID_PREP: | ||
667 | case WLAN_EID_PERR: | ||
668 | case WLAN_EID_RANN: | ||
669 | case WLAN_EID_CHANNEL_SWITCH: | ||
670 | case WLAN_EID_EXT_CHANSWITCH_ANN: | ||
671 | case WLAN_EID_COUNTRY: | ||
672 | case WLAN_EID_PWR_CONSTRAINT: | ||
673 | case WLAN_EID_TIMEOUT_INTERVAL: | ||
674 | if (test_bit(id, seen_elems)) { | ||
675 | elems->parse_error = true; | ||
676 | left -= elen; | ||
677 | pos += elen; | ||
678 | continue; | ||
679 | } | ||
680 | break; | ||
653 | } | 681 | } |
654 | 682 | ||
655 | if (calc_crc && id < 64 && (filter & (1ULL << id))) | 683 | if (calc_crc && id < 64 && (filter & (1ULL << id))) |
diff --git a/net/netfilter/nf_conntrack_h323_main.c b/net/netfilter/nf_conntrack_h323_main.c index 1b30b0dee708..962795e839ab 100644 --- a/net/netfilter/nf_conntrack_h323_main.c +++ b/net/netfilter/nf_conntrack_h323_main.c | |||
@@ -753,7 +753,8 @@ static int callforward_do_filter(const union nf_inet_addr *src, | |||
753 | flowi4_to_flowi(&fl1), false)) { | 753 | flowi4_to_flowi(&fl1), false)) { |
754 | if (!afinfo->route(&init_net, (struct dst_entry **)&rt2, | 754 | if (!afinfo->route(&init_net, (struct dst_entry **)&rt2, |
755 | flowi4_to_flowi(&fl2), false)) { | 755 | flowi4_to_flowi(&fl2), false)) { |
756 | if (rt1->rt_gateway == rt2->rt_gateway && | 756 | if (rt_nexthop(rt1, fl1.daddr) == |
757 | rt_nexthop(rt2, fl2.daddr) && | ||
757 | rt1->dst.dev == rt2->dst.dev) | 758 | rt1->dst.dev == rt2->dst.dev) |
758 | ret = 1; | 759 | ret = 1; |
759 | dst_release(&rt2->dst); | 760 | dst_release(&rt2->dst); |
diff --git a/net/sched/sch_qfq.c b/net/sched/sch_qfq.c index f0dd83cff906..9687fa1c2275 100644 --- a/net/sched/sch_qfq.c +++ b/net/sched/sch_qfq.c | |||
@@ -84,18 +84,19 @@ | |||
84 | * grp->index is the index of the group; and grp->slot_shift | 84 | * grp->index is the index of the group; and grp->slot_shift |
85 | * is the shift for the corresponding (scaled) sigma_i. | 85 | * is the shift for the corresponding (scaled) sigma_i. |
86 | */ | 86 | */ |
87 | #define QFQ_MAX_INDEX 19 | 87 | #define QFQ_MAX_INDEX 24 |
88 | #define QFQ_MAX_WSHIFT 16 | 88 | #define QFQ_MAX_WSHIFT 12 |
89 | 89 | ||
90 | #define QFQ_MAX_WEIGHT (1<<QFQ_MAX_WSHIFT) | 90 | #define QFQ_MAX_WEIGHT (1<<QFQ_MAX_WSHIFT) |
91 | #define QFQ_MAX_WSUM (2*QFQ_MAX_WEIGHT) | 91 | #define QFQ_MAX_WSUM (16*QFQ_MAX_WEIGHT) |
92 | 92 | ||
93 | #define FRAC_BITS 30 /* fixed point arithmetic */ | 93 | #define FRAC_BITS 30 /* fixed point arithmetic */ |
94 | #define ONE_FP (1UL << FRAC_BITS) | 94 | #define ONE_FP (1UL << FRAC_BITS) |
95 | #define IWSUM (ONE_FP/QFQ_MAX_WSUM) | 95 | #define IWSUM (ONE_FP/QFQ_MAX_WSUM) |
96 | 96 | ||
97 | #define QFQ_MTU_SHIFT 11 | 97 | #define QFQ_MTU_SHIFT 16 /* to support TSO/GSO */ |
98 | #define QFQ_MIN_SLOT_SHIFT (FRAC_BITS + QFQ_MTU_SHIFT - QFQ_MAX_INDEX) | 98 | #define QFQ_MIN_SLOT_SHIFT (FRAC_BITS + QFQ_MTU_SHIFT - QFQ_MAX_INDEX) |
99 | #define QFQ_MIN_LMAX 256 /* min possible lmax for a class */ | ||
99 | 100 | ||
100 | /* | 101 | /* |
101 | * Possible group states. These values are used as indexes for the bitmaps | 102 | * Possible group states. These values are used as indexes for the bitmaps |
@@ -231,6 +232,32 @@ static void qfq_update_class_params(struct qfq_sched *q, struct qfq_class *cl, | |||
231 | q->wsum += delta_w; | 232 | q->wsum += delta_w; |
232 | } | 233 | } |
233 | 234 | ||
235 | static void qfq_update_reactivate_class(struct qfq_sched *q, | ||
236 | struct qfq_class *cl, | ||
237 | u32 inv_w, u32 lmax, int delta_w) | ||
238 | { | ||
239 | bool need_reactivation = false; | ||
240 | int i = qfq_calc_index(inv_w, lmax); | ||
241 | |||
242 | if (&q->groups[i] != cl->grp && cl->qdisc->q.qlen > 0) { | ||
243 | /* | ||
244 | * shift cl->F back, to not charge the | ||
245 | * class for the not-yet-served head | ||
246 | * packet | ||
247 | */ | ||
248 | cl->F = cl->S; | ||
249 | /* remove class from its slot in the old group */ | ||
250 | qfq_deactivate_class(q, cl); | ||
251 | need_reactivation = true; | ||
252 | } | ||
253 | |||
254 | qfq_update_class_params(q, cl, lmax, inv_w, delta_w); | ||
255 | |||
256 | if (need_reactivation) /* activate in new group */ | ||
257 | qfq_activate_class(q, cl, qdisc_peek_len(cl->qdisc)); | ||
258 | } | ||
259 | |||
260 | |||
234 | static int qfq_change_class(struct Qdisc *sch, u32 classid, u32 parentid, | 261 | static int qfq_change_class(struct Qdisc *sch, u32 classid, u32 parentid, |
235 | struct nlattr **tca, unsigned long *arg) | 262 | struct nlattr **tca, unsigned long *arg) |
236 | { | 263 | { |
@@ -238,7 +265,7 @@ static int qfq_change_class(struct Qdisc *sch, u32 classid, u32 parentid, | |||
238 | struct qfq_class *cl = (struct qfq_class *)*arg; | 265 | struct qfq_class *cl = (struct qfq_class *)*arg; |
239 | struct nlattr *tb[TCA_QFQ_MAX + 1]; | 266 | struct nlattr *tb[TCA_QFQ_MAX + 1]; |
240 | u32 weight, lmax, inv_w; | 267 | u32 weight, lmax, inv_w; |
241 | int i, err; | 268 | int err; |
242 | int delta_w; | 269 | int delta_w; |
243 | 270 | ||
244 | if (tca[TCA_OPTIONS] == NULL) { | 271 | if (tca[TCA_OPTIONS] == NULL) { |
@@ -270,16 +297,14 @@ static int qfq_change_class(struct Qdisc *sch, u32 classid, u32 parentid, | |||
270 | 297 | ||
271 | if (tb[TCA_QFQ_LMAX]) { | 298 | if (tb[TCA_QFQ_LMAX]) { |
272 | lmax = nla_get_u32(tb[TCA_QFQ_LMAX]); | 299 | lmax = nla_get_u32(tb[TCA_QFQ_LMAX]); |
273 | if (!lmax || lmax > (1UL << QFQ_MTU_SHIFT)) { | 300 | if (lmax < QFQ_MIN_LMAX || lmax > (1UL << QFQ_MTU_SHIFT)) { |
274 | pr_notice("qfq: invalid max length %u\n", lmax); | 301 | pr_notice("qfq: invalid max length %u\n", lmax); |
275 | return -EINVAL; | 302 | return -EINVAL; |
276 | } | 303 | } |
277 | } else | 304 | } else |
278 | lmax = 1UL << QFQ_MTU_SHIFT; | 305 | lmax = psched_mtu(qdisc_dev(sch)); |
279 | 306 | ||
280 | if (cl != NULL) { | 307 | if (cl != NULL) { |
281 | bool need_reactivation = false; | ||
282 | |||
283 | if (tca[TCA_RATE]) { | 308 | if (tca[TCA_RATE]) { |
284 | err = gen_replace_estimator(&cl->bstats, &cl->rate_est, | 309 | err = gen_replace_estimator(&cl->bstats, &cl->rate_est, |
285 | qdisc_root_sleeping_lock(sch), | 310 | qdisc_root_sleeping_lock(sch), |
@@ -291,24 +316,8 @@ static int qfq_change_class(struct Qdisc *sch, u32 classid, u32 parentid, | |||
291 | if (lmax == cl->lmax && inv_w == cl->inv_w) | 316 | if (lmax == cl->lmax && inv_w == cl->inv_w) |
292 | return 0; /* nothing to update */ | 317 | return 0; /* nothing to update */ |
293 | 318 | ||
294 | i = qfq_calc_index(inv_w, lmax); | ||
295 | sch_tree_lock(sch); | 319 | sch_tree_lock(sch); |
296 | if (&q->groups[i] != cl->grp && cl->qdisc->q.qlen > 0) { | 320 | qfq_update_reactivate_class(q, cl, inv_w, lmax, delta_w); |
297 | /* | ||
298 | * shift cl->F back, to not charge the | ||
299 | * class for the not-yet-served head | ||
300 | * packet | ||
301 | */ | ||
302 | cl->F = cl->S; | ||
303 | /* remove class from its slot in the old group */ | ||
304 | qfq_deactivate_class(q, cl); | ||
305 | need_reactivation = true; | ||
306 | } | ||
307 | |||
308 | qfq_update_class_params(q, cl, lmax, inv_w, delta_w); | ||
309 | |||
310 | if (need_reactivation) /* activate in new group */ | ||
311 | qfq_activate_class(q, cl, qdisc_peek_len(cl->qdisc)); | ||
312 | sch_tree_unlock(sch); | 321 | sch_tree_unlock(sch); |
313 | 322 | ||
314 | return 0; | 323 | return 0; |
@@ -663,15 +672,48 @@ static void qfq_make_eligible(struct qfq_sched *q, u64 old_V) | |||
663 | 672 | ||
664 | 673 | ||
665 | /* | 674 | /* |
666 | * XXX we should make sure that slot becomes less than 32. | 675 | * If the weight and lmax (max_pkt_size) of the classes do not change, |
667 | * This is guaranteed by the input values. | 676 | * then QFQ guarantees that the slot index is never higher than |
668 | * roundedS is always cl->S rounded on grp->slot_shift bits. | 677 | * 2 + ((1<<QFQ_MTU_SHIFT)/QFQ_MIN_LMAX) * (QFQ_MAX_WEIGHT/QFQ_MAX_WSUM). |
678 | * | ||
679 | * With the current values of the above constants, the index is | ||
680 | * then guaranteed to never be higher than 2 + 256 * (1 / 16) = 18. | ||
681 | * | ||
682 | * When the weight of a class is increased or the lmax of the class is | ||
683 | * decreased, a new class with smaller slot size may happen to be | ||
684 | * activated. The activation of this class should be properly delayed | ||
685 | * to when the service of the class has finished in the ideal system | ||
686 | * tracked by QFQ. If the activation of the class is not delayed to | ||
687 | * this reference time instant, then this class may be unjustly served | ||
688 | * before other classes waiting for service. This may cause | ||
689 | * (unfrequently) the above bound to the slot index to be violated for | ||
690 | * some of these unlucky classes. | ||
691 | * | ||
692 | * Instead of delaying the activation of the new class, which is quite | ||
693 | * complex, the following inaccurate but simple solution is used: if | ||
694 | * the slot index is higher than QFQ_MAX_SLOTS-2, then the timestamps | ||
695 | * of the class are shifted backward so as to let the slot index | ||
696 | * become equal to QFQ_MAX_SLOTS-2. This threshold is used because, if | ||
697 | * the slot index is above it, then the data structure implementing | ||
698 | * the bucket list either gets immediately corrupted or may get | ||
699 | * corrupted on a possible next packet arrival that causes the start | ||
700 | * time of the group to be shifted backward. | ||
669 | */ | 701 | */ |
670 | static void qfq_slot_insert(struct qfq_group *grp, struct qfq_class *cl, | 702 | static void qfq_slot_insert(struct qfq_group *grp, struct qfq_class *cl, |
671 | u64 roundedS) | 703 | u64 roundedS) |
672 | { | 704 | { |
673 | u64 slot = (roundedS - grp->S) >> grp->slot_shift; | 705 | u64 slot = (roundedS - grp->S) >> grp->slot_shift; |
674 | unsigned int i = (grp->front + slot) % QFQ_MAX_SLOTS; | 706 | unsigned int i; /* slot index in the bucket list */ |
707 | |||
708 | if (unlikely(slot > QFQ_MAX_SLOTS - 2)) { | ||
709 | u64 deltaS = roundedS - grp->S - | ||
710 | ((u64)(QFQ_MAX_SLOTS - 2)<<grp->slot_shift); | ||
711 | cl->S -= deltaS; | ||
712 | cl->F -= deltaS; | ||
713 | slot = QFQ_MAX_SLOTS - 2; | ||
714 | } | ||
715 | |||
716 | i = (grp->front + slot) % QFQ_MAX_SLOTS; | ||
675 | 717 | ||
676 | hlist_add_head(&cl->next, &grp->slots[i]); | 718 | hlist_add_head(&cl->next, &grp->slots[i]); |
677 | __set_bit(slot, &grp->full_slots); | 719 | __set_bit(slot, &grp->full_slots); |
@@ -892,6 +934,13 @@ static int qfq_enqueue(struct sk_buff *skb, struct Qdisc *sch) | |||
892 | } | 934 | } |
893 | pr_debug("qfq_enqueue: cl = %x\n", cl->common.classid); | 935 | pr_debug("qfq_enqueue: cl = %x\n", cl->common.classid); |
894 | 936 | ||
937 | if (unlikely(cl->lmax < qdisc_pkt_len(skb))) { | ||
938 | pr_debug("qfq: increasing maxpkt from %u to %u for class %u", | ||
939 | cl->lmax, qdisc_pkt_len(skb), cl->common.classid); | ||
940 | qfq_update_reactivate_class(q, cl, cl->inv_w, | ||
941 | qdisc_pkt_len(skb), 0); | ||
942 | } | ||
943 | |||
895 | err = qdisc_enqueue(skb, cl->qdisc); | 944 | err = qdisc_enqueue(skb, cl->qdisc); |
896 | if (unlikely(err != NET_XMIT_SUCCESS)) { | 945 | if (unlikely(err != NET_XMIT_SUCCESS)) { |
897 | pr_debug("qfq_enqueue: enqueue failed %d\n", err); | 946 | pr_debug("qfq_enqueue: enqueue failed %d\n", err); |
diff --git a/net/sctp/socket.c b/net/sctp/socket.c index 59d16ea927f0..a60d1f8b41c5 100644 --- a/net/sctp/socket.c +++ b/net/sctp/socket.c | |||
@@ -974,7 +974,7 @@ SCTP_STATIC int sctp_setsockopt_bindx(struct sock* sk, | |||
974 | void *addr_buf; | 974 | void *addr_buf; |
975 | struct sctp_af *af; | 975 | struct sctp_af *af; |
976 | 976 | ||
977 | SCTP_DEBUG_PRINTK("sctp_setsocktopt_bindx: sk %p addrs %p" | 977 | SCTP_DEBUG_PRINTK("sctp_setsockopt_bindx: sk %p addrs %p" |
978 | " addrs_size %d opt %d\n", sk, addrs, addrs_size, op); | 978 | " addrs_size %d opt %d\n", sk, addrs, addrs_size, op); |
979 | 979 | ||
980 | if (unlikely(addrs_size <= 0)) | 980 | if (unlikely(addrs_size <= 0)) |
diff --git a/net/sunrpc/backchannel_rqst.c b/net/sunrpc/backchannel_rqst.c index 5a3d675d2f2f..a9c0bbccad6b 100644 --- a/net/sunrpc/backchannel_rqst.c +++ b/net/sunrpc/backchannel_rqst.c | |||
@@ -172,7 +172,7 @@ out_free: | |||
172 | xprt_free_allocation(req); | 172 | xprt_free_allocation(req); |
173 | 173 | ||
174 | dprintk("RPC: setup backchannel transport failed\n"); | 174 | dprintk("RPC: setup backchannel transport failed\n"); |
175 | return -1; | 175 | return -ENOMEM; |
176 | } | 176 | } |
177 | EXPORT_SYMBOL_GPL(xprt_setup_backchannel); | 177 | EXPORT_SYMBOL_GPL(xprt_setup_backchannel); |
178 | 178 | ||
diff --git a/net/tipc/handler.c b/net/tipc/handler.c index 111ff8300ae5..b36f0fcd9bdf 100644 --- a/net/tipc/handler.c +++ b/net/tipc/handler.c | |||
@@ -116,7 +116,6 @@ void tipc_handler_stop(void) | |||
116 | return; | 116 | return; |
117 | 117 | ||
118 | handler_enabled = 0; | 118 | handler_enabled = 0; |
119 | tasklet_disable(&tipc_tasklet); | ||
120 | tasklet_kill(&tipc_tasklet); | 119 | tasklet_kill(&tipc_tasklet); |
121 | 120 | ||
122 | spin_lock_bh(&qitem_lock); | 121 | spin_lock_bh(&qitem_lock); |
diff --git a/net/wireless/core.c b/net/wireless/core.c index 443d4d7deea2..3f7253052088 100644 --- a/net/wireless/core.c +++ b/net/wireless/core.c | |||
@@ -526,8 +526,7 @@ int wiphy_register(struct wiphy *wiphy) | |||
526 | for (i = 0; i < sband->n_channels; i++) { | 526 | for (i = 0; i < sband->n_channels; i++) { |
527 | sband->channels[i].orig_flags = | 527 | sband->channels[i].orig_flags = |
528 | sband->channels[i].flags; | 528 | sband->channels[i].flags; |
529 | sband->channels[i].orig_mag = | 529 | sband->channels[i].orig_mag = INT_MAX; |
530 | sband->channels[i].max_antenna_gain; | ||
531 | sband->channels[i].orig_mpwr = | 530 | sband->channels[i].orig_mpwr = |
532 | sband->channels[i].max_power; | 531 | sband->channels[i].max_power; |
533 | sband->channels[i].band = band; | 532 | sband->channels[i].band = band; |
diff --git a/net/wireless/reg.c b/net/wireless/reg.c index 3b8cbbc214db..bcc7d7ee5a51 100644 --- a/net/wireless/reg.c +++ b/net/wireless/reg.c | |||
@@ -908,7 +908,7 @@ static void handle_channel(struct wiphy *wiphy, | |||
908 | map_regdom_flags(reg_rule->flags) | bw_flags; | 908 | map_regdom_flags(reg_rule->flags) | bw_flags; |
909 | chan->max_antenna_gain = chan->orig_mag = | 909 | chan->max_antenna_gain = chan->orig_mag = |
910 | (int) MBI_TO_DBI(power_rule->max_antenna_gain); | 910 | (int) MBI_TO_DBI(power_rule->max_antenna_gain); |
911 | chan->max_power = chan->orig_mpwr = | 911 | chan->max_reg_power = chan->max_power = chan->orig_mpwr = |
912 | (int) MBM_TO_DBM(power_rule->max_eirp); | 912 | (int) MBM_TO_DBM(power_rule->max_eirp); |
913 | return; | 913 | return; |
914 | } | 914 | } |
@@ -1331,7 +1331,8 @@ static void handle_channel_custom(struct wiphy *wiphy, | |||
1331 | 1331 | ||
1332 | chan->flags |= map_regdom_flags(reg_rule->flags) | bw_flags; | 1332 | chan->flags |= map_regdom_flags(reg_rule->flags) | bw_flags; |
1333 | chan->max_antenna_gain = (int) MBI_TO_DBI(power_rule->max_antenna_gain); | 1333 | chan->max_antenna_gain = (int) MBI_TO_DBI(power_rule->max_antenna_gain); |
1334 | chan->max_power = (int) MBM_TO_DBM(power_rule->max_eirp); | 1334 | chan->max_reg_power = chan->max_power = |
1335 | (int) MBM_TO_DBM(power_rule->max_eirp); | ||
1335 | } | 1336 | } |
1336 | 1337 | ||
1337 | static void handle_band_custom(struct wiphy *wiphy, enum ieee80211_band band, | 1338 | static void handle_band_custom(struct wiphy *wiphy, enum ieee80211_band band, |
diff --git a/net/wireless/util.c b/net/wireless/util.c index ef35f4ef2aa6..2762e8329986 100644 --- a/net/wireless/util.c +++ b/net/wireless/util.c | |||
@@ -309,23 +309,21 @@ unsigned int ieee80211_get_hdrlen_from_skb(const struct sk_buff *skb) | |||
309 | } | 309 | } |
310 | EXPORT_SYMBOL(ieee80211_get_hdrlen_from_skb); | 310 | EXPORT_SYMBOL(ieee80211_get_hdrlen_from_skb); |
311 | 311 | ||
312 | static int ieee80211_get_mesh_hdrlen(struct ieee80211s_hdr *meshhdr) | 312 | unsigned int ieee80211_get_mesh_hdrlen(struct ieee80211s_hdr *meshhdr) |
313 | { | 313 | { |
314 | int ae = meshhdr->flags & MESH_FLAGS_AE; | 314 | int ae = meshhdr->flags & MESH_FLAGS_AE; |
315 | /* 7.1.3.5a.2 */ | 315 | /* 802.11-2012, 8.2.4.7.3 */ |
316 | switch (ae) { | 316 | switch (ae) { |
317 | default: | ||
317 | case 0: | 318 | case 0: |
318 | return 6; | 319 | return 6; |
319 | case MESH_FLAGS_AE_A4: | 320 | case MESH_FLAGS_AE_A4: |
320 | return 12; | 321 | return 12; |
321 | case MESH_FLAGS_AE_A5_A6: | 322 | case MESH_FLAGS_AE_A5_A6: |
322 | return 18; | 323 | return 18; |
323 | case (MESH_FLAGS_AE_A4 | MESH_FLAGS_AE_A5_A6): | ||
324 | return 24; | ||
325 | default: | ||
326 | return 6; | ||
327 | } | 324 | } |
328 | } | 325 | } |
326 | EXPORT_SYMBOL(ieee80211_get_mesh_hdrlen); | ||
329 | 327 | ||
330 | int ieee80211_data_to_8023(struct sk_buff *skb, const u8 *addr, | 328 | int ieee80211_data_to_8023(struct sk_buff *skb, const u8 *addr, |
331 | enum nl80211_iftype iftype) | 329 | enum nl80211_iftype iftype) |
@@ -373,6 +371,8 @@ int ieee80211_data_to_8023(struct sk_buff *skb, const u8 *addr, | |||
373 | /* make sure meshdr->flags is on the linear part */ | 371 | /* make sure meshdr->flags is on the linear part */ |
374 | if (!pskb_may_pull(skb, hdrlen + 1)) | 372 | if (!pskb_may_pull(skb, hdrlen + 1)) |
375 | return -1; | 373 | return -1; |
374 | if (meshdr->flags & MESH_FLAGS_AE_A4) | ||
375 | return -1; | ||
376 | if (meshdr->flags & MESH_FLAGS_AE_A5_A6) { | 376 | if (meshdr->flags & MESH_FLAGS_AE_A5_A6) { |
377 | skb_copy_bits(skb, hdrlen + | 377 | skb_copy_bits(skb, hdrlen + |
378 | offsetof(struct ieee80211s_hdr, eaddr1), | 378 | offsetof(struct ieee80211s_hdr, eaddr1), |
@@ -397,6 +397,8 @@ int ieee80211_data_to_8023(struct sk_buff *skb, const u8 *addr, | |||
397 | /* make sure meshdr->flags is on the linear part */ | 397 | /* make sure meshdr->flags is on the linear part */ |
398 | if (!pskb_may_pull(skb, hdrlen + 1)) | 398 | if (!pskb_may_pull(skb, hdrlen + 1)) |
399 | return -1; | 399 | return -1; |
400 | if (meshdr->flags & MESH_FLAGS_AE_A5_A6) | ||
401 | return -1; | ||
400 | if (meshdr->flags & MESH_FLAGS_AE_A4) | 402 | if (meshdr->flags & MESH_FLAGS_AE_A4) |
401 | skb_copy_bits(skb, hdrlen + | 403 | skb_copy_bits(skb, hdrlen + |
402 | offsetof(struct ieee80211s_hdr, eaddr1), | 404 | offsetof(struct ieee80211s_hdr, eaddr1), |
diff --git a/scripts/Makefile.modinst b/scripts/Makefile.modinst index dda4b2b61927..ecbb44797e28 100644 --- a/scripts/Makefile.modinst +++ b/scripts/Makefile.modinst | |||
@@ -16,8 +16,9 @@ PHONY += $(modules) | |||
16 | __modinst: $(modules) | 16 | __modinst: $(modules) |
17 | @: | 17 | @: |
18 | 18 | ||
19 | # Don't stop modules_install if we can't sign external modules. | ||
19 | quiet_cmd_modules_install = INSTALL $@ | 20 | quiet_cmd_modules_install = INSTALL $@ |
20 | cmd_modules_install = mkdir -p $(2); cp $@ $(2) ; $(mod_strip_cmd) $(2)/$(notdir $@) ; $(mod_sign_cmd) $(2)/$(notdir $@) | 21 | cmd_modules_install = mkdir -p $(2); cp $@ $(2) ; $(mod_strip_cmd) $(2)/$(notdir $@) ; $(mod_sign_cmd) $(2)/$(notdir $@) $(patsubst %,|| true,$(KBUILD_EXTMOD)) |
21 | 22 | ||
22 | # Modules built outside the kernel source tree go into extra by default | 23 | # Modules built outside the kernel source tree go into extra by default |
23 | INSTALL_MOD_DIR ?= extra | 24 | INSTALL_MOD_DIR ?= extra |
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 21a9f5de0a21..f18750e3bd6c 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl | |||
@@ -1890,8 +1890,10 @@ sub process { | |||
1890 | } | 1890 | } |
1891 | 1891 | ||
1892 | if ($realfile =~ m@^(drivers/net/|net/)@ && | 1892 | if ($realfile =~ m@^(drivers/net/|net/)@ && |
1893 | $rawline !~ m@^\+[ \t]*(\/\*|\*\/)@ && | 1893 | $rawline !~ m@^\+[ \t]*\*/[ \t]*$@ && #trailing */ |
1894 | $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) { | 1894 | $rawline !~ m@^\+.*/\*.*\*/[ \t]*$@ && #inline /*...*/ |
1895 | $rawline !~ m@^\+.*\*{2,}/[ \t]*$@ && #trailing **/ | ||
1896 | $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) { #non blank */ | ||
1895 | WARN("NETWORKING_BLOCK_COMMENT_STYLE", | 1897 | WARN("NETWORKING_BLOCK_COMMENT_STYLE", |
1896 | "networking block comments put the trailing */ on a separate line\n" . $herecurr); | 1898 | "networking block comments put the trailing */ on a separate line\n" . $herecurr); |
1897 | } | 1899 | } |
diff --git a/sound/core/compress_offload.c b/sound/core/compress_offload.c index c40ae573346d..ad11dc994792 100644 --- a/sound/core/compress_offload.c +++ b/sound/core/compress_offload.c | |||
@@ -100,12 +100,15 @@ static int snd_compr_open(struct inode *inode, struct file *f) | |||
100 | 100 | ||
101 | if (dirn != compr->direction) { | 101 | if (dirn != compr->direction) { |
102 | pr_err("this device doesn't support this direction\n"); | 102 | pr_err("this device doesn't support this direction\n"); |
103 | snd_card_unref(compr->card); | ||
103 | return -EINVAL; | 104 | return -EINVAL; |
104 | } | 105 | } |
105 | 106 | ||
106 | data = kzalloc(sizeof(*data), GFP_KERNEL); | 107 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
107 | if (!data) | 108 | if (!data) { |
109 | snd_card_unref(compr->card); | ||
108 | return -ENOMEM; | 110 | return -ENOMEM; |
111 | } | ||
109 | data->stream.ops = compr->ops; | 112 | data->stream.ops = compr->ops; |
110 | data->stream.direction = dirn; | 113 | data->stream.direction = dirn; |
111 | data->stream.private_data = compr->private_data; | 114 | data->stream.private_data = compr->private_data; |
@@ -113,6 +116,7 @@ static int snd_compr_open(struct inode *inode, struct file *f) | |||
113 | runtime = kzalloc(sizeof(*runtime), GFP_KERNEL); | 116 | runtime = kzalloc(sizeof(*runtime), GFP_KERNEL); |
114 | if (!runtime) { | 117 | if (!runtime) { |
115 | kfree(data); | 118 | kfree(data); |
119 | snd_card_unref(compr->card); | ||
116 | return -ENOMEM; | 120 | return -ENOMEM; |
117 | } | 121 | } |
118 | runtime->state = SNDRV_PCM_STATE_OPEN; | 122 | runtime->state = SNDRV_PCM_STATE_OPEN; |
@@ -126,7 +130,8 @@ static int snd_compr_open(struct inode *inode, struct file *f) | |||
126 | kfree(runtime); | 130 | kfree(runtime); |
127 | kfree(data); | 131 | kfree(data); |
128 | } | 132 | } |
129 | return ret; | 133 | snd_card_unref(compr->card); |
134 | return 0; | ||
130 | } | 135 | } |
131 | 136 | ||
132 | static int snd_compr_free(struct inode *inode, struct file *f) | 137 | static int snd_compr_free(struct inode *inode, struct file *f) |
diff --git a/sound/core/control.c b/sound/core/control.c index 7e86a5b9f3b5..8c7c2c9bba61 100644 --- a/sound/core/control.c +++ b/sound/core/control.c | |||
@@ -86,6 +86,7 @@ static int snd_ctl_open(struct inode *inode, struct file *file) | |||
86 | write_lock_irqsave(&card->ctl_files_rwlock, flags); | 86 | write_lock_irqsave(&card->ctl_files_rwlock, flags); |
87 | list_add_tail(&ctl->list, &card->ctl_files); | 87 | list_add_tail(&ctl->list, &card->ctl_files); |
88 | write_unlock_irqrestore(&card->ctl_files_rwlock, flags); | 88 | write_unlock_irqrestore(&card->ctl_files_rwlock, flags); |
89 | snd_card_unref(card); | ||
89 | return 0; | 90 | return 0; |
90 | 91 | ||
91 | __error: | 92 | __error: |
@@ -93,6 +94,8 @@ static int snd_ctl_open(struct inode *inode, struct file *file) | |||
93 | __error2: | 94 | __error2: |
94 | snd_card_file_remove(card, file); | 95 | snd_card_file_remove(card, file); |
95 | __error1: | 96 | __error1: |
97 | if (card) | ||
98 | snd_card_unref(card); | ||
96 | return err; | 99 | return err; |
97 | } | 100 | } |
98 | 101 | ||
@@ -1434,6 +1437,8 @@ static ssize_t snd_ctl_read(struct file *file, char __user *buffer, | |||
1434 | spin_unlock_irq(&ctl->read_lock); | 1437 | spin_unlock_irq(&ctl->read_lock); |
1435 | schedule(); | 1438 | schedule(); |
1436 | remove_wait_queue(&ctl->change_sleep, &wait); | 1439 | remove_wait_queue(&ctl->change_sleep, &wait); |
1440 | if (ctl->card->shutdown) | ||
1441 | return -ENODEV; | ||
1437 | if (signal_pending(current)) | 1442 | if (signal_pending(current)) |
1438 | return -ERESTARTSYS; | 1443 | return -ERESTARTSYS; |
1439 | spin_lock_irq(&ctl->read_lock); | 1444 | spin_lock_irq(&ctl->read_lock); |
diff --git a/sound/core/hwdep.c b/sound/core/hwdep.c index 75ea16f35b1a..3f7f6628cf7b 100644 --- a/sound/core/hwdep.c +++ b/sound/core/hwdep.c | |||
@@ -100,8 +100,10 @@ static int snd_hwdep_open(struct inode *inode, struct file * file) | |||
100 | if (hw == NULL) | 100 | if (hw == NULL) |
101 | return -ENODEV; | 101 | return -ENODEV; |
102 | 102 | ||
103 | if (!try_module_get(hw->card->module)) | 103 | if (!try_module_get(hw->card->module)) { |
104 | snd_card_unref(hw->card); | ||
104 | return -EFAULT; | 105 | return -EFAULT; |
106 | } | ||
105 | 107 | ||
106 | init_waitqueue_entry(&wait, current); | 108 | init_waitqueue_entry(&wait, current); |
107 | add_wait_queue(&hw->open_wait, &wait); | 109 | add_wait_queue(&hw->open_wait, &wait); |
@@ -129,6 +131,10 @@ static int snd_hwdep_open(struct inode *inode, struct file * file) | |||
129 | mutex_unlock(&hw->open_mutex); | 131 | mutex_unlock(&hw->open_mutex); |
130 | schedule(); | 132 | schedule(); |
131 | mutex_lock(&hw->open_mutex); | 133 | mutex_lock(&hw->open_mutex); |
134 | if (hw->card->shutdown) { | ||
135 | err = -ENODEV; | ||
136 | break; | ||
137 | } | ||
132 | if (signal_pending(current)) { | 138 | if (signal_pending(current)) { |
133 | err = -ERESTARTSYS; | 139 | err = -ERESTARTSYS; |
134 | break; | 140 | break; |
@@ -148,6 +154,7 @@ static int snd_hwdep_open(struct inode *inode, struct file * file) | |||
148 | mutex_unlock(&hw->open_mutex); | 154 | mutex_unlock(&hw->open_mutex); |
149 | if (err < 0) | 155 | if (err < 0) |
150 | module_put(hw->card->module); | 156 | module_put(hw->card->module); |
157 | snd_card_unref(hw->card); | ||
151 | return err; | 158 | return err; |
152 | } | 159 | } |
153 | 160 | ||
@@ -459,12 +466,15 @@ static int snd_hwdep_dev_disconnect(struct snd_device *device) | |||
459 | mutex_unlock(®ister_mutex); | 466 | mutex_unlock(®ister_mutex); |
460 | return -EINVAL; | 467 | return -EINVAL; |
461 | } | 468 | } |
469 | mutex_lock(&hwdep->open_mutex); | ||
470 | wake_up(&hwdep->open_wait); | ||
462 | #ifdef CONFIG_SND_OSSEMUL | 471 | #ifdef CONFIG_SND_OSSEMUL |
463 | if (hwdep->ossreg) | 472 | if (hwdep->ossreg) |
464 | snd_unregister_oss_device(hwdep->oss_type, hwdep->card, hwdep->device); | 473 | snd_unregister_oss_device(hwdep->oss_type, hwdep->card, hwdep->device); |
465 | #endif | 474 | #endif |
466 | snd_unregister_device(SNDRV_DEVICE_TYPE_HWDEP, hwdep->card, hwdep->device); | 475 | snd_unregister_device(SNDRV_DEVICE_TYPE_HWDEP, hwdep->card, hwdep->device); |
467 | list_del_init(&hwdep->list); | 476 | list_del_init(&hwdep->list); |
477 | mutex_unlock(&hwdep->open_mutex); | ||
468 | mutex_unlock(®ister_mutex); | 478 | mutex_unlock(®ister_mutex); |
469 | return 0; | 479 | return 0; |
470 | } | 480 | } |
diff --git a/sound/core/init.c b/sound/core/init.c index d8ec849af128..7b012d15c2cf 100644 --- a/sound/core/init.c +++ b/sound/core/init.c | |||
@@ -213,6 +213,7 @@ int snd_card_create(int idx, const char *xid, | |||
213 | spin_lock_init(&card->files_lock); | 213 | spin_lock_init(&card->files_lock); |
214 | INIT_LIST_HEAD(&card->files_list); | 214 | INIT_LIST_HEAD(&card->files_list); |
215 | init_waitqueue_head(&card->shutdown_sleep); | 215 | init_waitqueue_head(&card->shutdown_sleep); |
216 | atomic_set(&card->refcount, 0); | ||
216 | #ifdef CONFIG_PM | 217 | #ifdef CONFIG_PM |
217 | mutex_init(&card->power_lock); | 218 | mutex_init(&card->power_lock); |
218 | init_waitqueue_head(&card->power_sleep); | 219 | init_waitqueue_head(&card->power_sleep); |
@@ -446,21 +447,36 @@ static int snd_card_do_free(struct snd_card *card) | |||
446 | return 0; | 447 | return 0; |
447 | } | 448 | } |
448 | 449 | ||
450 | /** | ||
451 | * snd_card_unref - release the reference counter | ||
452 | * @card: the card instance | ||
453 | * | ||
454 | * Decrements the reference counter. When it reaches to zero, wake up | ||
455 | * the sleeper and call the destructor if needed. | ||
456 | */ | ||
457 | void snd_card_unref(struct snd_card *card) | ||
458 | { | ||
459 | if (atomic_dec_and_test(&card->refcount)) { | ||
460 | wake_up(&card->shutdown_sleep); | ||
461 | if (card->free_on_last_close) | ||
462 | snd_card_do_free(card); | ||
463 | } | ||
464 | } | ||
465 | EXPORT_SYMBOL(snd_card_unref); | ||
466 | |||
449 | int snd_card_free_when_closed(struct snd_card *card) | 467 | int snd_card_free_when_closed(struct snd_card *card) |
450 | { | 468 | { |
451 | int free_now = 0; | 469 | int ret; |
452 | int ret = snd_card_disconnect(card); | ||
453 | if (ret) | ||
454 | return ret; | ||
455 | 470 | ||
456 | spin_lock(&card->files_lock); | 471 | atomic_inc(&card->refcount); |
457 | if (list_empty(&card->files_list)) | 472 | ret = snd_card_disconnect(card); |
458 | free_now = 1; | 473 | if (ret) { |
459 | else | 474 | atomic_dec(&card->refcount); |
460 | card->free_on_last_close = 1; | 475 | return ret; |
461 | spin_unlock(&card->files_lock); | 476 | } |
462 | 477 | ||
463 | if (free_now) | 478 | card->free_on_last_close = 1; |
479 | if (atomic_dec_and_test(&card->refcount)) | ||
464 | snd_card_do_free(card); | 480 | snd_card_do_free(card); |
465 | return 0; | 481 | return 0; |
466 | } | 482 | } |
@@ -474,7 +490,7 @@ int snd_card_free(struct snd_card *card) | |||
474 | return ret; | 490 | return ret; |
475 | 491 | ||
476 | /* wait, until all devices are ready for the free operation */ | 492 | /* wait, until all devices are ready for the free operation */ |
477 | wait_event(card->shutdown_sleep, list_empty(&card->files_list)); | 493 | wait_event(card->shutdown_sleep, !atomic_read(&card->refcount)); |
478 | snd_card_do_free(card); | 494 | snd_card_do_free(card); |
479 | return 0; | 495 | return 0; |
480 | } | 496 | } |
@@ -886,6 +902,7 @@ int snd_card_file_add(struct snd_card *card, struct file *file) | |||
886 | return -ENODEV; | 902 | return -ENODEV; |
887 | } | 903 | } |
888 | list_add(&mfile->list, &card->files_list); | 904 | list_add(&mfile->list, &card->files_list); |
905 | atomic_inc(&card->refcount); | ||
889 | spin_unlock(&card->files_lock); | 906 | spin_unlock(&card->files_lock); |
890 | return 0; | 907 | return 0; |
891 | } | 908 | } |
@@ -908,7 +925,6 @@ EXPORT_SYMBOL(snd_card_file_add); | |||
908 | int snd_card_file_remove(struct snd_card *card, struct file *file) | 925 | int snd_card_file_remove(struct snd_card *card, struct file *file) |
909 | { | 926 | { |
910 | struct snd_monitor_file *mfile, *found = NULL; | 927 | struct snd_monitor_file *mfile, *found = NULL; |
911 | int last_close = 0; | ||
912 | 928 | ||
913 | spin_lock(&card->files_lock); | 929 | spin_lock(&card->files_lock); |
914 | list_for_each_entry(mfile, &card->files_list, list) { | 930 | list_for_each_entry(mfile, &card->files_list, list) { |
@@ -923,19 +939,13 @@ int snd_card_file_remove(struct snd_card *card, struct file *file) | |||
923 | break; | 939 | break; |
924 | } | 940 | } |
925 | } | 941 | } |
926 | if (list_empty(&card->files_list)) | ||
927 | last_close = 1; | ||
928 | spin_unlock(&card->files_lock); | 942 | spin_unlock(&card->files_lock); |
929 | if (last_close) { | ||
930 | wake_up(&card->shutdown_sleep); | ||
931 | if (card->free_on_last_close) | ||
932 | snd_card_do_free(card); | ||
933 | } | ||
934 | if (!found) { | 943 | if (!found) { |
935 | snd_printk(KERN_ERR "ALSA card file remove problem (%p)\n", file); | 944 | snd_printk(KERN_ERR "ALSA card file remove problem (%p)\n", file); |
936 | return -ENOENT; | 945 | return -ENOENT; |
937 | } | 946 | } |
938 | kfree(found); | 947 | kfree(found); |
948 | snd_card_unref(card); | ||
939 | return 0; | 949 | return 0; |
940 | } | 950 | } |
941 | 951 | ||
diff --git a/sound/core/oss/mixer_oss.c b/sound/core/oss/mixer_oss.c index 29f6ded02555..e8a1d18774b2 100644 --- a/sound/core/oss/mixer_oss.c +++ b/sound/core/oss/mixer_oss.c | |||
@@ -52,14 +52,19 @@ static int snd_mixer_oss_open(struct inode *inode, struct file *file) | |||
52 | SNDRV_OSS_DEVICE_TYPE_MIXER); | 52 | SNDRV_OSS_DEVICE_TYPE_MIXER); |
53 | if (card == NULL) | 53 | if (card == NULL) |
54 | return -ENODEV; | 54 | return -ENODEV; |
55 | if (card->mixer_oss == NULL) | 55 | if (card->mixer_oss == NULL) { |
56 | snd_card_unref(card); | ||
56 | return -ENODEV; | 57 | return -ENODEV; |
58 | } | ||
57 | err = snd_card_file_add(card, file); | 59 | err = snd_card_file_add(card, file); |
58 | if (err < 0) | 60 | if (err < 0) { |
61 | snd_card_unref(card); | ||
59 | return err; | 62 | return err; |
63 | } | ||
60 | fmixer = kzalloc(sizeof(*fmixer), GFP_KERNEL); | 64 | fmixer = kzalloc(sizeof(*fmixer), GFP_KERNEL); |
61 | if (fmixer == NULL) { | 65 | if (fmixer == NULL) { |
62 | snd_card_file_remove(card, file); | 66 | snd_card_file_remove(card, file); |
67 | snd_card_unref(card); | ||
63 | return -ENOMEM; | 68 | return -ENOMEM; |
64 | } | 69 | } |
65 | fmixer->card = card; | 70 | fmixer->card = card; |
@@ -68,8 +73,10 @@ static int snd_mixer_oss_open(struct inode *inode, struct file *file) | |||
68 | if (!try_module_get(card->module)) { | 73 | if (!try_module_get(card->module)) { |
69 | kfree(fmixer); | 74 | kfree(fmixer); |
70 | snd_card_file_remove(card, file); | 75 | snd_card_file_remove(card, file); |
76 | snd_card_unref(card); | ||
71 | return -EFAULT; | 77 | return -EFAULT; |
72 | } | 78 | } |
79 | snd_card_unref(card); | ||
73 | return 0; | 80 | return 0; |
74 | } | 81 | } |
75 | 82 | ||
diff --git a/sound/core/oss/pcm_oss.c b/sound/core/oss/pcm_oss.c index 08fde0060fd9..4c1cc51772e6 100644 --- a/sound/core/oss/pcm_oss.c +++ b/sound/core/oss/pcm_oss.c | |||
@@ -2441,6 +2441,10 @@ static int snd_pcm_oss_open(struct inode *inode, struct file *file) | |||
2441 | mutex_unlock(&pcm->open_mutex); | 2441 | mutex_unlock(&pcm->open_mutex); |
2442 | schedule(); | 2442 | schedule(); |
2443 | mutex_lock(&pcm->open_mutex); | 2443 | mutex_lock(&pcm->open_mutex); |
2444 | if (pcm->card->shutdown) { | ||
2445 | err = -ENODEV; | ||
2446 | break; | ||
2447 | } | ||
2444 | if (signal_pending(current)) { | 2448 | if (signal_pending(current)) { |
2445 | err = -ERESTARTSYS; | 2449 | err = -ERESTARTSYS; |
2446 | break; | 2450 | break; |
@@ -2450,6 +2454,7 @@ static int snd_pcm_oss_open(struct inode *inode, struct file *file) | |||
2450 | mutex_unlock(&pcm->open_mutex); | 2454 | mutex_unlock(&pcm->open_mutex); |
2451 | if (err < 0) | 2455 | if (err < 0) |
2452 | goto __error; | 2456 | goto __error; |
2457 | snd_card_unref(pcm->card); | ||
2453 | return err; | 2458 | return err; |
2454 | 2459 | ||
2455 | __error: | 2460 | __error: |
@@ -2457,6 +2462,8 @@ static int snd_pcm_oss_open(struct inode *inode, struct file *file) | |||
2457 | __error2: | 2462 | __error2: |
2458 | snd_card_file_remove(pcm->card, file); | 2463 | snd_card_file_remove(pcm->card, file); |
2459 | __error1: | 2464 | __error1: |
2465 | if (pcm) | ||
2466 | snd_card_unref(pcm->card); | ||
2460 | return err; | 2467 | return err; |
2461 | } | 2468 | } |
2462 | 2469 | ||
diff --git a/sound/core/pcm.c b/sound/core/pcm.c index f2991940b271..030102caeee9 100644 --- a/sound/core/pcm.c +++ b/sound/core/pcm.c | |||
@@ -1086,11 +1086,19 @@ static int snd_pcm_dev_disconnect(struct snd_device *device) | |||
1086 | if (list_empty(&pcm->list)) | 1086 | if (list_empty(&pcm->list)) |
1087 | goto unlock; | 1087 | goto unlock; |
1088 | 1088 | ||
1089 | mutex_lock(&pcm->open_mutex); | ||
1090 | wake_up(&pcm->open_wait); | ||
1089 | list_del_init(&pcm->list); | 1091 | list_del_init(&pcm->list); |
1090 | for (cidx = 0; cidx < 2; cidx++) | 1092 | for (cidx = 0; cidx < 2; cidx++) |
1091 | for (substream = pcm->streams[cidx].substream; substream; substream = substream->next) | 1093 | for (substream = pcm->streams[cidx].substream; substream; substream = substream->next) { |
1092 | if (substream->runtime) | 1094 | snd_pcm_stream_lock_irq(substream); |
1095 | if (substream->runtime) { | ||
1093 | substream->runtime->status->state = SNDRV_PCM_STATE_DISCONNECTED; | 1096 | substream->runtime->status->state = SNDRV_PCM_STATE_DISCONNECTED; |
1097 | wake_up(&substream->runtime->sleep); | ||
1098 | wake_up(&substream->runtime->tsleep); | ||
1099 | } | ||
1100 | snd_pcm_stream_unlock_irq(substream); | ||
1101 | } | ||
1094 | list_for_each_entry(notify, &snd_pcm_notify_list, list) { | 1102 | list_for_each_entry(notify, &snd_pcm_notify_list, list) { |
1095 | notify->n_disconnect(pcm); | 1103 | notify->n_disconnect(pcm); |
1096 | } | 1104 | } |
@@ -1110,6 +1118,7 @@ static int snd_pcm_dev_disconnect(struct snd_device *device) | |||
1110 | pcm->streams[cidx].chmap_kctl = NULL; | 1118 | pcm->streams[cidx].chmap_kctl = NULL; |
1111 | } | 1119 | } |
1112 | } | 1120 | } |
1121 | mutex_unlock(&pcm->open_mutex); | ||
1113 | unlock: | 1122 | unlock: |
1114 | mutex_unlock(®ister_mutex); | 1123 | mutex_unlock(®ister_mutex); |
1115 | return 0; | 1124 | return 0; |
diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c index 5e12e5bacbba..f9ddecf2f4cd 100644 --- a/sound/core/pcm_native.c +++ b/sound/core/pcm_native.c | |||
@@ -369,6 +369,14 @@ static int period_to_usecs(struct snd_pcm_runtime *runtime) | |||
369 | return usecs; | 369 | return usecs; |
370 | } | 370 | } |
371 | 371 | ||
372 | static void snd_pcm_set_state(struct snd_pcm_substream *substream, int state) | ||
373 | { | ||
374 | snd_pcm_stream_lock_irq(substream); | ||
375 | if (substream->runtime->status->state != SNDRV_PCM_STATE_DISCONNECTED) | ||
376 | substream->runtime->status->state = state; | ||
377 | snd_pcm_stream_unlock_irq(substream); | ||
378 | } | ||
379 | |||
372 | static int snd_pcm_hw_params(struct snd_pcm_substream *substream, | 380 | static int snd_pcm_hw_params(struct snd_pcm_substream *substream, |
373 | struct snd_pcm_hw_params *params) | 381 | struct snd_pcm_hw_params *params) |
374 | { | 382 | { |
@@ -452,7 +460,7 @@ static int snd_pcm_hw_params(struct snd_pcm_substream *substream, | |||
452 | runtime->boundary *= 2; | 460 | runtime->boundary *= 2; |
453 | 461 | ||
454 | snd_pcm_timer_resolution_change(substream); | 462 | snd_pcm_timer_resolution_change(substream); |
455 | runtime->status->state = SNDRV_PCM_STATE_SETUP; | 463 | snd_pcm_set_state(substream, SNDRV_PCM_STATE_SETUP); |
456 | 464 | ||
457 | if (pm_qos_request_active(&substream->latency_pm_qos_req)) | 465 | if (pm_qos_request_active(&substream->latency_pm_qos_req)) |
458 | pm_qos_remove_request(&substream->latency_pm_qos_req); | 466 | pm_qos_remove_request(&substream->latency_pm_qos_req); |
@@ -464,7 +472,7 @@ static int snd_pcm_hw_params(struct snd_pcm_substream *substream, | |||
464 | /* hardware might be unusable from this time, | 472 | /* hardware might be unusable from this time, |
465 | so we force application to retry to set | 473 | so we force application to retry to set |
466 | the correct hardware parameter settings */ | 474 | the correct hardware parameter settings */ |
467 | runtime->status->state = SNDRV_PCM_STATE_OPEN; | 475 | snd_pcm_set_state(substream, SNDRV_PCM_STATE_OPEN); |
468 | if (substream->ops->hw_free != NULL) | 476 | if (substream->ops->hw_free != NULL) |
469 | substream->ops->hw_free(substream); | 477 | substream->ops->hw_free(substream); |
470 | return err; | 478 | return err; |
@@ -512,7 +520,7 @@ static int snd_pcm_hw_free(struct snd_pcm_substream *substream) | |||
512 | return -EBADFD; | 520 | return -EBADFD; |
513 | if (substream->ops->hw_free) | 521 | if (substream->ops->hw_free) |
514 | result = substream->ops->hw_free(substream); | 522 | result = substream->ops->hw_free(substream); |
515 | runtime->status->state = SNDRV_PCM_STATE_OPEN; | 523 | snd_pcm_set_state(substream, SNDRV_PCM_STATE_OPEN); |
516 | pm_qos_remove_request(&substream->latency_pm_qos_req); | 524 | pm_qos_remove_request(&substream->latency_pm_qos_req); |
517 | return result; | 525 | return result; |
518 | } | 526 | } |
@@ -1320,7 +1328,7 @@ static void snd_pcm_post_prepare(struct snd_pcm_substream *substream, int state) | |||
1320 | { | 1328 | { |
1321 | struct snd_pcm_runtime *runtime = substream->runtime; | 1329 | struct snd_pcm_runtime *runtime = substream->runtime; |
1322 | runtime->control->appl_ptr = runtime->status->hw_ptr; | 1330 | runtime->control->appl_ptr = runtime->status->hw_ptr; |
1323 | runtime->status->state = SNDRV_PCM_STATE_PREPARED; | 1331 | snd_pcm_set_state(substream, SNDRV_PCM_STATE_PREPARED); |
1324 | } | 1332 | } |
1325 | 1333 | ||
1326 | static struct action_ops snd_pcm_action_prepare = { | 1334 | static struct action_ops snd_pcm_action_prepare = { |
@@ -1510,6 +1518,10 @@ static int snd_pcm_drain(struct snd_pcm_substream *substream, | |||
1510 | down_read(&snd_pcm_link_rwsem); | 1518 | down_read(&snd_pcm_link_rwsem); |
1511 | snd_pcm_stream_lock_irq(substream); | 1519 | snd_pcm_stream_lock_irq(substream); |
1512 | remove_wait_queue(&to_check->sleep, &wait); | 1520 | remove_wait_queue(&to_check->sleep, &wait); |
1521 | if (card->shutdown) { | ||
1522 | result = -ENODEV; | ||
1523 | break; | ||
1524 | } | ||
1513 | if (tout == 0) { | 1525 | if (tout == 0) { |
1514 | if (substream->runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) | 1526 | if (substream->runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) |
1515 | result = -ESTRPIPE; | 1527 | result = -ESTRPIPE; |
@@ -1634,6 +1646,7 @@ static int snd_pcm_link(struct snd_pcm_substream *substream, int fd) | |||
1634 | write_unlock_irq(&snd_pcm_link_rwlock); | 1646 | write_unlock_irq(&snd_pcm_link_rwlock); |
1635 | up_write(&snd_pcm_link_rwsem); | 1647 | up_write(&snd_pcm_link_rwsem); |
1636 | _nolock: | 1648 | _nolock: |
1649 | snd_card_unref(substream1->pcm->card); | ||
1637 | fput_light(file, fput_needed); | 1650 | fput_light(file, fput_needed); |
1638 | if (res < 0) | 1651 | if (res < 0) |
1639 | kfree(group); | 1652 | kfree(group); |
@@ -2108,7 +2121,10 @@ static int snd_pcm_playback_open(struct inode *inode, struct file *file) | |||
2108 | return err; | 2121 | return err; |
2109 | pcm = snd_lookup_minor_data(iminor(inode), | 2122 | pcm = snd_lookup_minor_data(iminor(inode), |
2110 | SNDRV_DEVICE_TYPE_PCM_PLAYBACK); | 2123 | SNDRV_DEVICE_TYPE_PCM_PLAYBACK); |
2111 | return snd_pcm_open(file, pcm, SNDRV_PCM_STREAM_PLAYBACK); | 2124 | err = snd_pcm_open(file, pcm, SNDRV_PCM_STREAM_PLAYBACK); |
2125 | if (pcm) | ||
2126 | snd_card_unref(pcm->card); | ||
2127 | return err; | ||
2112 | } | 2128 | } |
2113 | 2129 | ||
2114 | static int snd_pcm_capture_open(struct inode *inode, struct file *file) | 2130 | static int snd_pcm_capture_open(struct inode *inode, struct file *file) |
@@ -2119,7 +2135,10 @@ static int snd_pcm_capture_open(struct inode *inode, struct file *file) | |||
2119 | return err; | 2135 | return err; |
2120 | pcm = snd_lookup_minor_data(iminor(inode), | 2136 | pcm = snd_lookup_minor_data(iminor(inode), |
2121 | SNDRV_DEVICE_TYPE_PCM_CAPTURE); | 2137 | SNDRV_DEVICE_TYPE_PCM_CAPTURE); |
2122 | return snd_pcm_open(file, pcm, SNDRV_PCM_STREAM_CAPTURE); | 2138 | err = snd_pcm_open(file, pcm, SNDRV_PCM_STREAM_CAPTURE); |
2139 | if (pcm) | ||
2140 | snd_card_unref(pcm->card); | ||
2141 | return err; | ||
2123 | } | 2142 | } |
2124 | 2143 | ||
2125 | static int snd_pcm_open(struct file *file, struct snd_pcm *pcm, int stream) | 2144 | static int snd_pcm_open(struct file *file, struct snd_pcm *pcm, int stream) |
@@ -2156,6 +2175,10 @@ static int snd_pcm_open(struct file *file, struct snd_pcm *pcm, int stream) | |||
2156 | mutex_unlock(&pcm->open_mutex); | 2175 | mutex_unlock(&pcm->open_mutex); |
2157 | schedule(); | 2176 | schedule(); |
2158 | mutex_lock(&pcm->open_mutex); | 2177 | mutex_lock(&pcm->open_mutex); |
2178 | if (pcm->card->shutdown) { | ||
2179 | err = -ENODEV; | ||
2180 | break; | ||
2181 | } | ||
2159 | if (signal_pending(current)) { | 2182 | if (signal_pending(current)) { |
2160 | err = -ERESTARTSYS; | 2183 | err = -ERESTARTSYS; |
2161 | break; | 2184 | break; |
diff --git a/sound/core/rawmidi.c b/sound/core/rawmidi.c index ebf6e49ad3d4..1bb95aeea084 100644 --- a/sound/core/rawmidi.c +++ b/sound/core/rawmidi.c | |||
@@ -379,8 +379,10 @@ static int snd_rawmidi_open(struct inode *inode, struct file *file) | |||
379 | if (rmidi == NULL) | 379 | if (rmidi == NULL) |
380 | return -ENODEV; | 380 | return -ENODEV; |
381 | 381 | ||
382 | if (!try_module_get(rmidi->card->module)) | 382 | if (!try_module_get(rmidi->card->module)) { |
383 | snd_card_unref(rmidi->card); | ||
383 | return -ENXIO; | 384 | return -ENXIO; |
385 | } | ||
384 | 386 | ||
385 | mutex_lock(&rmidi->open_mutex); | 387 | mutex_lock(&rmidi->open_mutex); |
386 | card = rmidi->card; | 388 | card = rmidi->card; |
@@ -422,6 +424,10 @@ static int snd_rawmidi_open(struct inode *inode, struct file *file) | |||
422 | mutex_unlock(&rmidi->open_mutex); | 424 | mutex_unlock(&rmidi->open_mutex); |
423 | schedule(); | 425 | schedule(); |
424 | mutex_lock(&rmidi->open_mutex); | 426 | mutex_lock(&rmidi->open_mutex); |
427 | if (rmidi->card->shutdown) { | ||
428 | err = -ENODEV; | ||
429 | break; | ||
430 | } | ||
425 | if (signal_pending(current)) { | 431 | if (signal_pending(current)) { |
426 | err = -ERESTARTSYS; | 432 | err = -ERESTARTSYS; |
427 | break; | 433 | break; |
@@ -440,6 +446,7 @@ static int snd_rawmidi_open(struct inode *inode, struct file *file) | |||
440 | #endif | 446 | #endif |
441 | file->private_data = rawmidi_file; | 447 | file->private_data = rawmidi_file; |
442 | mutex_unlock(&rmidi->open_mutex); | 448 | mutex_unlock(&rmidi->open_mutex); |
449 | snd_card_unref(rmidi->card); | ||
443 | return 0; | 450 | return 0; |
444 | 451 | ||
445 | __error: | 452 | __error: |
@@ -447,6 +454,7 @@ static int snd_rawmidi_open(struct inode *inode, struct file *file) | |||
447 | __error_card: | 454 | __error_card: |
448 | mutex_unlock(&rmidi->open_mutex); | 455 | mutex_unlock(&rmidi->open_mutex); |
449 | module_put(rmidi->card->module); | 456 | module_put(rmidi->card->module); |
457 | snd_card_unref(rmidi->card); | ||
450 | return err; | 458 | return err; |
451 | } | 459 | } |
452 | 460 | ||
@@ -991,6 +999,8 @@ static ssize_t snd_rawmidi_read(struct file *file, char __user *buf, size_t coun | |||
991 | spin_unlock_irq(&runtime->lock); | 999 | spin_unlock_irq(&runtime->lock); |
992 | schedule(); | 1000 | schedule(); |
993 | remove_wait_queue(&runtime->sleep, &wait); | 1001 | remove_wait_queue(&runtime->sleep, &wait); |
1002 | if (rfile->rmidi->card->shutdown) | ||
1003 | return -ENODEV; | ||
994 | if (signal_pending(current)) | 1004 | if (signal_pending(current)) |
995 | return result > 0 ? result : -ERESTARTSYS; | 1005 | return result > 0 ? result : -ERESTARTSYS; |
996 | if (!runtime->avail) | 1006 | if (!runtime->avail) |
@@ -1234,6 +1244,8 @@ static ssize_t snd_rawmidi_write(struct file *file, const char __user *buf, | |||
1234 | spin_unlock_irq(&runtime->lock); | 1244 | spin_unlock_irq(&runtime->lock); |
1235 | timeout = schedule_timeout(30 * HZ); | 1245 | timeout = schedule_timeout(30 * HZ); |
1236 | remove_wait_queue(&runtime->sleep, &wait); | 1246 | remove_wait_queue(&runtime->sleep, &wait); |
1247 | if (rfile->rmidi->card->shutdown) | ||
1248 | return -ENODEV; | ||
1237 | if (signal_pending(current)) | 1249 | if (signal_pending(current)) |
1238 | return result > 0 ? result : -ERESTARTSYS; | 1250 | return result > 0 ? result : -ERESTARTSYS; |
1239 | if (!runtime->avail && !timeout) | 1251 | if (!runtime->avail && !timeout) |
@@ -1609,9 +1621,20 @@ static int snd_rawmidi_dev_register(struct snd_device *device) | |||
1609 | static int snd_rawmidi_dev_disconnect(struct snd_device *device) | 1621 | static int snd_rawmidi_dev_disconnect(struct snd_device *device) |
1610 | { | 1622 | { |
1611 | struct snd_rawmidi *rmidi = device->device_data; | 1623 | struct snd_rawmidi *rmidi = device->device_data; |
1624 | int dir; | ||
1612 | 1625 | ||
1613 | mutex_lock(®ister_mutex); | 1626 | mutex_lock(®ister_mutex); |
1627 | mutex_lock(&rmidi->open_mutex); | ||
1628 | wake_up(&rmidi->open_wait); | ||
1614 | list_del_init(&rmidi->list); | 1629 | list_del_init(&rmidi->list); |
1630 | for (dir = 0; dir < 2; dir++) { | ||
1631 | struct snd_rawmidi_substream *s; | ||
1632 | list_for_each_entry(s, &rmidi->streams[dir].substreams, list) { | ||
1633 | if (s->runtime) | ||
1634 | wake_up(&s->runtime->sleep); | ||
1635 | } | ||
1636 | } | ||
1637 | |||
1615 | #ifdef CONFIG_SND_OSSEMUL | 1638 | #ifdef CONFIG_SND_OSSEMUL |
1616 | if (rmidi->ossreg) { | 1639 | if (rmidi->ossreg) { |
1617 | if ((int)rmidi->device == midi_map[rmidi->card->number]) { | 1640 | if ((int)rmidi->device == midi_map[rmidi->card->number]) { |
@@ -1626,6 +1649,7 @@ static int snd_rawmidi_dev_disconnect(struct snd_device *device) | |||
1626 | } | 1649 | } |
1627 | #endif /* CONFIG_SND_OSSEMUL */ | 1650 | #endif /* CONFIG_SND_OSSEMUL */ |
1628 | snd_unregister_device(SNDRV_DEVICE_TYPE_RAWMIDI, rmidi->card, rmidi->device); | 1651 | snd_unregister_device(SNDRV_DEVICE_TYPE_RAWMIDI, rmidi->card, rmidi->device); |
1652 | mutex_unlock(&rmidi->open_mutex); | ||
1629 | mutex_unlock(®ister_mutex); | 1653 | mutex_unlock(®ister_mutex); |
1630 | return 0; | 1654 | return 0; |
1631 | } | 1655 | } |
diff --git a/sound/core/sound.c b/sound/core/sound.c index 643976000ce8..70ccdab74153 100644 --- a/sound/core/sound.c +++ b/sound/core/sound.c | |||
@@ -98,6 +98,10 @@ static void snd_request_other(int minor) | |||
98 | * | 98 | * |
99 | * Checks that a minor device with the specified type is registered, and returns | 99 | * Checks that a minor device with the specified type is registered, and returns |
100 | * its user data pointer. | 100 | * its user data pointer. |
101 | * | ||
102 | * This function increments the reference counter of the card instance | ||
103 | * if an associated instance with the given minor number and type is found. | ||
104 | * The caller must call snd_card_unref() appropriately later. | ||
101 | */ | 105 | */ |
102 | void *snd_lookup_minor_data(unsigned int minor, int type) | 106 | void *snd_lookup_minor_data(unsigned int minor, int type) |
103 | { | 107 | { |
@@ -108,9 +112,11 @@ void *snd_lookup_minor_data(unsigned int minor, int type) | |||
108 | return NULL; | 112 | return NULL; |
109 | mutex_lock(&sound_mutex); | 113 | mutex_lock(&sound_mutex); |
110 | mreg = snd_minors[minor]; | 114 | mreg = snd_minors[minor]; |
111 | if (mreg && mreg->type == type) | 115 | if (mreg && mreg->type == type) { |
112 | private_data = mreg->private_data; | 116 | private_data = mreg->private_data; |
113 | else | 117 | if (private_data && mreg->card_ptr) |
118 | atomic_inc(&mreg->card_ptr->refcount); | ||
119 | } else | ||
114 | private_data = NULL; | 120 | private_data = NULL; |
115 | mutex_unlock(&sound_mutex); | 121 | mutex_unlock(&sound_mutex); |
116 | return private_data; | 122 | return private_data; |
@@ -275,6 +281,7 @@ int snd_register_device_for_dev(int type, struct snd_card *card, int dev, | |||
275 | preg->device = dev; | 281 | preg->device = dev; |
276 | preg->f_ops = f_ops; | 282 | preg->f_ops = f_ops; |
277 | preg->private_data = private_data; | 283 | preg->private_data = private_data; |
284 | preg->card_ptr = card; | ||
278 | mutex_lock(&sound_mutex); | 285 | mutex_lock(&sound_mutex); |
279 | #ifdef CONFIG_SND_DYNAMIC_MINORS | 286 | #ifdef CONFIG_SND_DYNAMIC_MINORS |
280 | minor = snd_find_free_minor(type); | 287 | minor = snd_find_free_minor(type); |
diff --git a/sound/core/sound_oss.c b/sound/core/sound_oss.c index e9528333e36d..726a49ac9725 100644 --- a/sound/core/sound_oss.c +++ b/sound/core/sound_oss.c | |||
@@ -40,6 +40,9 @@ | |||
40 | static struct snd_minor *snd_oss_minors[SNDRV_OSS_MINORS]; | 40 | static struct snd_minor *snd_oss_minors[SNDRV_OSS_MINORS]; |
41 | static DEFINE_MUTEX(sound_oss_mutex); | 41 | static DEFINE_MUTEX(sound_oss_mutex); |
42 | 42 | ||
43 | /* NOTE: This function increments the refcount of the associated card like | ||
44 | * snd_lookup_minor_data(); the caller must call snd_card_unref() appropriately | ||
45 | */ | ||
43 | void *snd_lookup_oss_minor_data(unsigned int minor, int type) | 46 | void *snd_lookup_oss_minor_data(unsigned int minor, int type) |
44 | { | 47 | { |
45 | struct snd_minor *mreg; | 48 | struct snd_minor *mreg; |
@@ -49,9 +52,11 @@ void *snd_lookup_oss_minor_data(unsigned int minor, int type) | |||
49 | return NULL; | 52 | return NULL; |
50 | mutex_lock(&sound_oss_mutex); | 53 | mutex_lock(&sound_oss_mutex); |
51 | mreg = snd_oss_minors[minor]; | 54 | mreg = snd_oss_minors[minor]; |
52 | if (mreg && mreg->type == type) | 55 | if (mreg && mreg->type == type) { |
53 | private_data = mreg->private_data; | 56 | private_data = mreg->private_data; |
54 | else | 57 | if (private_data && mreg->card_ptr) |
58 | atomic_inc(&mreg->card_ptr->refcount); | ||
59 | } else | ||
55 | private_data = NULL; | 60 | private_data = NULL; |
56 | mutex_unlock(&sound_oss_mutex); | 61 | mutex_unlock(&sound_oss_mutex); |
57 | return private_data; | 62 | return private_data; |
@@ -123,6 +128,7 @@ int snd_register_oss_device(int type, struct snd_card *card, int dev, | |||
123 | preg->device = dev; | 128 | preg->device = dev; |
124 | preg->f_ops = f_ops; | 129 | preg->f_ops = f_ops; |
125 | preg->private_data = private_data; | 130 | preg->private_data = private_data; |
131 | preg->card_ptr = card; | ||
126 | mutex_lock(&sound_oss_mutex); | 132 | mutex_lock(&sound_oss_mutex); |
127 | snd_oss_minors[minor] = preg; | 133 | snd_oss_minors[minor] = preg; |
128 | minor_unit = SNDRV_MINOR_OSS_DEVICE(minor); | 134 | minor_unit = SNDRV_MINOR_OSS_DEVICE(minor); |
diff --git a/sound/i2c/other/ak4113.c b/sound/i2c/other/ak4113.c index ef68d710d08c..e04e750a77ed 100644 --- a/sound/i2c/other/ak4113.c +++ b/sound/i2c/other/ak4113.c | |||
@@ -426,7 +426,7 @@ static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = { | |||
426 | }, | 426 | }, |
427 | { | 427 | { |
428 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | 428 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
429 | .name = "IEC958 Preample Capture Default", | 429 | .name = "IEC958 Preamble Capture Default", |
430 | .access = SNDRV_CTL_ELEM_ACCESS_READ | | 430 | .access = SNDRV_CTL_ELEM_ACCESS_READ | |
431 | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | 431 | SNDRV_CTL_ELEM_ACCESS_VOLATILE, |
432 | .info = snd_ak4113_spdif_pinfo, | 432 | .info = snd_ak4113_spdif_pinfo, |
diff --git a/sound/i2c/other/ak4114.c b/sound/i2c/other/ak4114.c index 816e7d225fb0..5bf4fca19e48 100644 --- a/sound/i2c/other/ak4114.c +++ b/sound/i2c/other/ak4114.c | |||
@@ -401,7 +401,7 @@ static struct snd_kcontrol_new snd_ak4114_iec958_controls[] = { | |||
401 | }, | 401 | }, |
402 | { | 402 | { |
403 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | 403 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
404 | .name = "IEC958 Preample Capture Default", | 404 | .name = "IEC958 Preamble Capture Default", |
405 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | 405 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, |
406 | .info = snd_ak4114_spdif_pinfo, | 406 | .info = snd_ak4114_spdif_pinfo, |
407 | .get = snd_ak4114_spdif_pget, | 407 | .get = snd_ak4114_spdif_pget, |
diff --git a/sound/i2c/other/ak4117.c b/sound/i2c/other/ak4117.c index b4b2a51fc117..40e33c9f2b09 100644 --- a/sound/i2c/other/ak4117.c +++ b/sound/i2c/other/ak4117.c | |||
@@ -380,7 +380,7 @@ static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = { | |||
380 | }, | 380 | }, |
381 | { | 381 | { |
382 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | 382 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
383 | .name = "IEC958 Preample Capture Default", | 383 | .name = "IEC958 Preamble Capture Default", |
384 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | 384 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, |
385 | .info = snd_ak4117_spdif_pinfo, | 385 | .info = snd_ak4117_spdif_pinfo, |
386 | .get = snd_ak4117_spdif_pget, | 386 | .get = snd_ak4117_spdif_pget, |
diff --git a/sound/pci/es1968.c b/sound/pci/es1968.c index 5d0e568fdea1..50169bcfd903 100644 --- a/sound/pci/es1968.c +++ b/sound/pci/es1968.c | |||
@@ -2655,6 +2655,8 @@ static struct ess_device_list pm_whitelist[] __devinitdata = { | |||
2655 | { TYPE_MAESTRO2E, 0x1179 }, | 2655 | { TYPE_MAESTRO2E, 0x1179 }, |
2656 | { TYPE_MAESTRO2E, 0x14c0 }, /* HP omnibook 4150 */ | 2656 | { TYPE_MAESTRO2E, 0x14c0 }, /* HP omnibook 4150 */ |
2657 | { TYPE_MAESTRO2E, 0x1558 }, | 2657 | { TYPE_MAESTRO2E, 0x1558 }, |
2658 | { TYPE_MAESTRO2E, 0x125d }, /* a PCI card, e.g. Terratec DMX */ | ||
2659 | { TYPE_MAESTRO2, 0x125d }, /* a PCI card, e.g. SF64-PCE2 */ | ||
2658 | }; | 2660 | }; |
2659 | 2661 | ||
2660 | static struct ess_device_list mpu_blacklist[] __devinitdata = { | 2662 | static struct ess_device_list mpu_blacklist[] __devinitdata = { |
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 72b085ae7d46..cd2dbaf1be78 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -3563,6 +3563,8 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { | |||
3563 | /* Teradici */ | 3563 | /* Teradici */ |
3564 | { PCI_DEVICE(0x6549, 0x1200), | 3564 | { PCI_DEVICE(0x6549, 0x1200), |
3565 | .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT }, | 3565 | .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT }, |
3566 | { PCI_DEVICE(0x6549, 0x2200), | ||
3567 | .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT }, | ||
3566 | /* Creative X-Fi (CA0110-IBG) */ | 3568 | /* Creative X-Fi (CA0110-IBG) */ |
3567 | /* CTHDA chips */ | 3569 | /* CTHDA chips */ |
3568 | { PCI_DEVICE(0x1102, 0x0010), | 3570 | { PCI_DEVICE(0x1102, 0x0010), |
diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c index cdd43eadbc67..1eeba7386666 100644 --- a/sound/pci/hda/patch_analog.c +++ b/sound/pci/hda/patch_analog.c | |||
@@ -545,6 +545,7 @@ static int ad198x_build_pcms(struct hda_codec *codec) | |||
545 | if (spec->multiout.dig_out_nid) { | 545 | if (spec->multiout.dig_out_nid) { |
546 | info++; | 546 | info++; |
547 | codec->num_pcms++; | 547 | codec->num_pcms++; |
548 | codec->spdif_status_reset = 1; | ||
548 | info->name = "AD198x Digital"; | 549 | info->name = "AD198x Digital"; |
549 | info->pcm_type = HDA_PCM_TYPE_SPDIF; | 550 | info->pcm_type = HDA_PCM_TYPE_SPDIF; |
550 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ad198x_pcm_digital_playback; | 551 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ad198x_pcm_digital_playback; |
diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c index 61a71131711c..d5f3a26d608d 100644 --- a/sound/pci/hda/patch_cirrus.c +++ b/sound/pci/hda/patch_cirrus.c | |||
@@ -101,8 +101,8 @@ enum { | |||
101 | #define CS420X_VENDOR_NID 0x11 | 101 | #define CS420X_VENDOR_NID 0x11 |
102 | #define CS_DIG_OUT1_PIN_NID 0x10 | 102 | #define CS_DIG_OUT1_PIN_NID 0x10 |
103 | #define CS_DIG_OUT2_PIN_NID 0x15 | 103 | #define CS_DIG_OUT2_PIN_NID 0x15 |
104 | #define CS_DMIC1_PIN_NID 0x12 | 104 | #define CS_DMIC1_PIN_NID 0x0e |
105 | #define CS_DMIC2_PIN_NID 0x0e | 105 | #define CS_DMIC2_PIN_NID 0x12 |
106 | 106 | ||
107 | /* coef indices */ | 107 | /* coef indices */ |
108 | #define IDX_SPDIF_STAT 0x0000 | 108 | #define IDX_SPDIF_STAT 0x0000 |
@@ -1079,14 +1079,18 @@ static void init_input(struct hda_codec *codec) | |||
1079 | cs_automic(codec, NULL); | 1079 | cs_automic(codec, NULL); |
1080 | 1080 | ||
1081 | coef = 0x000a; /* ADC1/2 - Digital and Analog Soft Ramp */ | 1081 | coef = 0x000a; /* ADC1/2 - Digital and Analog Soft Ramp */ |
1082 | cs_vendor_coef_set(codec, IDX_ADC_CFG, coef); | ||
1083 | |||
1084 | coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG); | ||
1082 | if (is_active_pin(codec, CS_DMIC2_PIN_NID)) | 1085 | if (is_active_pin(codec, CS_DMIC2_PIN_NID)) |
1083 | coef |= 0x0500; /* DMIC2 2 chan on, GPIO1 off */ | 1086 | coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */ |
1084 | if (is_active_pin(codec, CS_DMIC1_PIN_NID)) | 1087 | if (is_active_pin(codec, CS_DMIC1_PIN_NID)) |
1085 | coef |= 0x1800; /* DMIC1 2 chan on, GPIO0 off | 1088 | coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off |
1086 | * No effect if SPDIF_OUT2 is | 1089 | * No effect if SPDIF_OUT2 is |
1087 | * selected in IDX_SPDIF_CTL. | 1090 | * selected in IDX_SPDIF_CTL. |
1088 | */ | 1091 | */ |
1089 | cs_vendor_coef_set(codec, IDX_ADC_CFG, coef); | 1092 | |
1093 | cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef); | ||
1090 | } else { | 1094 | } else { |
1091 | if (spec->mic_detect) | 1095 | if (spec->mic_detect) |
1092 | cs_automic(codec, NULL); | 1096 | cs_automic(codec, NULL); |
@@ -1107,7 +1111,7 @@ static const struct hda_verb cs_coef_init_verbs[] = { | |||
1107 | | 0x0400 /* Disable Coefficient Auto increment */ | 1111 | | 0x0400 /* Disable Coefficient Auto increment */ |
1108 | )}, | 1112 | )}, |
1109 | /* Beep */ | 1113 | /* Beep */ |
1110 | {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG}, | 1114 | {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG}, |
1111 | {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */ | 1115 | {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */ |
1112 | 1116 | ||
1113 | {} /* terminator */ | 1117 | {} /* terminator */ |
@@ -1728,8 +1732,7 @@ static int cs421x_mux_enum_put(struct snd_kcontrol *kcontrol, | |||
1728 | 1732 | ||
1729 | } | 1733 | } |
1730 | 1734 | ||
1731 | static struct snd_kcontrol_new cs421x_capture_source = { | 1735 | static const struct snd_kcontrol_new cs421x_capture_source = { |
1732 | |||
1733 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | 1736 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1734 | .name = "Capture Source", | 1737 | .name = "Capture Source", |
1735 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, | 1738 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, |
@@ -1946,7 +1949,7 @@ static int cs421x_suspend(struct hda_codec *codec) | |||
1946 | } | 1949 | } |
1947 | #endif | 1950 | #endif |
1948 | 1951 | ||
1949 | static struct hda_codec_ops cs421x_patch_ops = { | 1952 | static const struct hda_codec_ops cs421x_patch_ops = { |
1950 | .build_controls = cs421x_build_controls, | 1953 | .build_controls = cs421x_build_controls, |
1951 | .build_pcms = cs_build_pcms, | 1954 | .build_pcms = cs_build_pcms, |
1952 | .init = cs421x_init, | 1955 | .init = cs421x_init, |
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index f7397ad02a0d..c0ce3b1f04b4 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c | |||
@@ -5840,7 +5840,7 @@ static int alc269_parse_auto_config(struct hda_codec *codec) | |||
5840 | return alc_parse_auto_config(codec, alc269_ignore, ssids); | 5840 | return alc_parse_auto_config(codec, alc269_ignore, ssids); |
5841 | } | 5841 | } |
5842 | 5842 | ||
5843 | static void alc269_toggle_power_output(struct hda_codec *codec, int power_up) | 5843 | static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up) |
5844 | { | 5844 | { |
5845 | int val = alc_read_coef_idx(codec, 0x04); | 5845 | int val = alc_read_coef_idx(codec, 0x04); |
5846 | if (power_up) | 5846 | if (power_up) |
@@ -5857,10 +5857,10 @@ static void alc269_shutup(struct hda_codec *codec) | |||
5857 | if (spec->codec_variant != ALC269_TYPE_ALC269VB) | 5857 | if (spec->codec_variant != ALC269_TYPE_ALC269VB) |
5858 | return; | 5858 | return; |
5859 | 5859 | ||
5860 | if ((alc_get_coef0(codec) & 0x00ff) == 0x017) | 5860 | if (spec->codec_variant == ALC269_TYPE_ALC269VB) |
5861 | alc269_toggle_power_output(codec, 0); | 5861 | alc269vb_toggle_power_output(codec, 0); |
5862 | if ((alc_get_coef0(codec) & 0x00ff) == 0x018) { | 5862 | if (spec->codec_variant == ALC269_TYPE_ALC269VB && |
5863 | alc269_toggle_power_output(codec, 0); | 5863 | (alc_get_coef0(codec) & 0x00ff) == 0x018) { |
5864 | msleep(150); | 5864 | msleep(150); |
5865 | } | 5865 | } |
5866 | } | 5866 | } |
@@ -5870,24 +5870,22 @@ static int alc269_resume(struct hda_codec *codec) | |||
5870 | { | 5870 | { |
5871 | struct alc_spec *spec = codec->spec; | 5871 | struct alc_spec *spec = codec->spec; |
5872 | 5872 | ||
5873 | if (spec->codec_variant == ALC269_TYPE_ALC269VB || | 5873 | if (spec->codec_variant == ALC269_TYPE_ALC269VB) |
5874 | alc269vb_toggle_power_output(codec, 0); | ||
5875 | if (spec->codec_variant == ALC269_TYPE_ALC269VB && | ||
5874 | (alc_get_coef0(codec) & 0x00ff) == 0x018) { | 5876 | (alc_get_coef0(codec) & 0x00ff) == 0x018) { |
5875 | alc269_toggle_power_output(codec, 0); | ||
5876 | msleep(150); | 5877 | msleep(150); |
5877 | } | 5878 | } |
5878 | 5879 | ||
5879 | codec->patch_ops.init(codec); | 5880 | codec->patch_ops.init(codec); |
5880 | 5881 | ||
5881 | if (spec->codec_variant == ALC269_TYPE_ALC269VB || | 5882 | if (spec->codec_variant == ALC269_TYPE_ALC269VB) |
5883 | alc269vb_toggle_power_output(codec, 1); | ||
5884 | if (spec->codec_variant == ALC269_TYPE_ALC269VB && | ||
5882 | (alc_get_coef0(codec) & 0x00ff) == 0x017) { | 5885 | (alc_get_coef0(codec) & 0x00ff) == 0x017) { |
5883 | alc269_toggle_power_output(codec, 1); | ||
5884 | msleep(200); | 5886 | msleep(200); |
5885 | } | 5887 | } |
5886 | 5888 | ||
5887 | if (spec->codec_variant == ALC269_TYPE_ALC269VB || | ||
5888 | (alc_get_coef0(codec) & 0x00ff) == 0x018) | ||
5889 | alc269_toggle_power_output(codec, 1); | ||
5890 | |||
5891 | snd_hda_codec_resume_amp(codec); | 5889 | snd_hda_codec_resume_amp(codec); |
5892 | snd_hda_codec_resume_cache(codec); | 5890 | snd_hda_codec_resume_cache(codec); |
5893 | hda_call_check_power_status(codec, 0x01); | 5891 | hda_call_check_power_status(codec, 0x01); |
@@ -7079,6 +7077,7 @@ static const struct hda_codec_preset snd_hda_preset_realtek[] = { | |||
7079 | .patch = patch_alc662 }, | 7077 | .patch = patch_alc662 }, |
7080 | { .id = 0x10ec0663, .name = "ALC663", .patch = patch_alc662 }, | 7078 | { .id = 0x10ec0663, .name = "ALC663", .patch = patch_alc662 }, |
7081 | { .id = 0x10ec0665, .name = "ALC665", .patch = patch_alc662 }, | 7079 | { .id = 0x10ec0665, .name = "ALC665", .patch = patch_alc662 }, |
7080 | { .id = 0x10ec0668, .name = "ALC668", .patch = patch_alc662 }, | ||
7082 | { .id = 0x10ec0670, .name = "ALC670", .patch = patch_alc662 }, | 7081 | { .id = 0x10ec0670, .name = "ALC670", .patch = patch_alc662 }, |
7083 | { .id = 0x10ec0680, .name = "ALC680", .patch = patch_alc680 }, | 7082 | { .id = 0x10ec0680, .name = "ALC680", .patch = patch_alc680 }, |
7084 | { .id = 0x10ec0880, .name = "ALC880", .patch = patch_alc880 }, | 7083 | { .id = 0x10ec0880, .name = "ALC880", .patch = patch_alc880 }, |
@@ -7096,6 +7095,7 @@ static const struct hda_codec_preset snd_hda_preset_realtek[] = { | |||
7096 | { .id = 0x10ec0889, .name = "ALC889", .patch = patch_alc882 }, | 7095 | { .id = 0x10ec0889, .name = "ALC889", .patch = patch_alc882 }, |
7097 | { .id = 0x10ec0892, .name = "ALC892", .patch = patch_alc662 }, | 7096 | { .id = 0x10ec0892, .name = "ALC892", .patch = patch_alc662 }, |
7098 | { .id = 0x10ec0899, .name = "ALC898", .patch = patch_alc882 }, | 7097 | { .id = 0x10ec0899, .name = "ALC898", .patch = patch_alc882 }, |
7098 | { .id = 0x10ec0900, .name = "ALC1150", .patch = patch_alc882 }, | ||
7099 | {} /* terminator */ | 7099 | {} /* terminator */ |
7100 | }; | 7100 | }; |
7101 | 7101 | ||
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 770013ff556f..9ba8af056170 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c | |||
@@ -1763,6 +1763,8 @@ static const struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = { | |||
1763 | "HP", STAC_HP_ZEPHYR), | 1763 | "HP", STAC_HP_ZEPHYR), |
1764 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660, | 1764 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660, |
1765 | "HP Mini", STAC_92HD83XXX_HP_LED), | 1765 | "HP Mini", STAC_92HD83XXX_HP_LED), |
1766 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E, | ||
1767 | "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED), | ||
1766 | {} /* terminator */ | 1768 | {} /* terminator */ |
1767 | }; | 1769 | }; |
1768 | 1770 | ||
diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c index 72a2f60b087c..019e1a00414a 100644 --- a/sound/pci/hda/patch_via.c +++ b/sound/pci/hda/patch_via.c | |||
@@ -1809,11 +1809,11 @@ static int via_auto_fill_dac_nids(struct hda_codec *codec) | |||
1809 | { | 1809 | { |
1810 | struct via_spec *spec = codec->spec; | 1810 | struct via_spec *spec = codec->spec; |
1811 | const struct auto_pin_cfg *cfg = &spec->autocfg; | 1811 | const struct auto_pin_cfg *cfg = &spec->autocfg; |
1812 | int i, dac_num; | 1812 | int i; |
1813 | hda_nid_t nid; | 1813 | hda_nid_t nid; |
1814 | 1814 | ||
1815 | spec->multiout.num_dacs = 0; | ||
1815 | spec->multiout.dac_nids = spec->private_dac_nids; | 1816 | spec->multiout.dac_nids = spec->private_dac_nids; |
1816 | dac_num = 0; | ||
1817 | for (i = 0; i < cfg->line_outs; i++) { | 1817 | for (i = 0; i < cfg->line_outs; i++) { |
1818 | hda_nid_t dac = 0; | 1818 | hda_nid_t dac = 0; |
1819 | nid = cfg->line_out_pins[i]; | 1819 | nid = cfg->line_out_pins[i]; |
@@ -1824,16 +1824,13 @@ static int via_auto_fill_dac_nids(struct hda_codec *codec) | |||
1824 | if (!i && parse_output_path(codec, nid, dac, 1, | 1824 | if (!i && parse_output_path(codec, nid, dac, 1, |
1825 | &spec->out_mix_path)) | 1825 | &spec->out_mix_path)) |
1826 | dac = spec->out_mix_path.path[0]; | 1826 | dac = spec->out_mix_path.path[0]; |
1827 | if (dac) { | 1827 | if (dac) |
1828 | spec->private_dac_nids[i] = dac; | 1828 | spec->private_dac_nids[spec->multiout.num_dacs++] = dac; |
1829 | dac_num++; | ||
1830 | } | ||
1831 | } | 1829 | } |
1832 | if (!spec->out_path[0].depth && spec->out_mix_path.depth) { | 1830 | if (!spec->out_path[0].depth && spec->out_mix_path.depth) { |
1833 | spec->out_path[0] = spec->out_mix_path; | 1831 | spec->out_path[0] = spec->out_mix_path; |
1834 | spec->out_mix_path.depth = 0; | 1832 | spec->out_mix_path.depth = 0; |
1835 | } | 1833 | } |
1836 | spec->multiout.num_dacs = dac_num; | ||
1837 | return 0; | 1834 | return 0; |
1838 | } | 1835 | } |
1839 | 1836 | ||
@@ -3628,6 +3625,7 @@ static void set_widgets_power_state_vt2002P(struct hda_codec *codec) | |||
3628 | */ | 3625 | */ |
3629 | enum { | 3626 | enum { |
3630 | VIA_FIXUP_INTMIC_BOOST, | 3627 | VIA_FIXUP_INTMIC_BOOST, |
3628 | VIA_FIXUP_ASUS_G75, | ||
3631 | }; | 3629 | }; |
3632 | 3630 | ||
3633 | static void via_fixup_intmic_boost(struct hda_codec *codec, | 3631 | static void via_fixup_intmic_boost(struct hda_codec *codec, |
@@ -3642,13 +3640,35 @@ static const struct hda_fixup via_fixups[] = { | |||
3642 | .type = HDA_FIXUP_FUNC, | 3640 | .type = HDA_FIXUP_FUNC, |
3643 | .v.func = via_fixup_intmic_boost, | 3641 | .v.func = via_fixup_intmic_boost, |
3644 | }, | 3642 | }, |
3643 | [VIA_FIXUP_ASUS_G75] = { | ||
3644 | .type = HDA_FIXUP_PINS, | ||
3645 | .v.pins = (const struct hda_pintbl[]) { | ||
3646 | /* set 0x24 and 0x33 as speakers */ | ||
3647 | { 0x24, 0x991301f0 }, | ||
3648 | { 0x33, 0x991301f1 }, /* subwoofer */ | ||
3649 | { } | ||
3650 | } | ||
3651 | }, | ||
3645 | }; | 3652 | }; |
3646 | 3653 | ||
3647 | static const struct snd_pci_quirk vt2002p_fixups[] = { | 3654 | static const struct snd_pci_quirk vt2002p_fixups[] = { |
3655 | SND_PCI_QUIRK(0x1043, 0x1487, "Asus G75", VIA_FIXUP_ASUS_G75), | ||
3648 | SND_PCI_QUIRK(0x1043, 0x8532, "Asus X202E", VIA_FIXUP_INTMIC_BOOST), | 3656 | SND_PCI_QUIRK(0x1043, 0x8532, "Asus X202E", VIA_FIXUP_INTMIC_BOOST), |
3649 | {} | 3657 | {} |
3650 | }; | 3658 | }; |
3651 | 3659 | ||
3660 | /* NIDs 0x24 and 0x33 on VT1802 have connections to non-existing NID 0x3e | ||
3661 | * Replace this with mixer NID 0x1c | ||
3662 | */ | ||
3663 | static void fix_vt1802_connections(struct hda_codec *codec) | ||
3664 | { | ||
3665 | static hda_nid_t conn_24[] = { 0x14, 0x1c }; | ||
3666 | static hda_nid_t conn_33[] = { 0x1c }; | ||
3667 | |||
3668 | snd_hda_override_conn_list(codec, 0x24, ARRAY_SIZE(conn_24), conn_24); | ||
3669 | snd_hda_override_conn_list(codec, 0x33, ARRAY_SIZE(conn_33), conn_33); | ||
3670 | } | ||
3671 | |||
3652 | /* patch for vt2002P */ | 3672 | /* patch for vt2002P */ |
3653 | static int patch_vt2002P(struct hda_codec *codec) | 3673 | static int patch_vt2002P(struct hda_codec *codec) |
3654 | { | 3674 | { |
@@ -3663,6 +3683,8 @@ static int patch_vt2002P(struct hda_codec *codec) | |||
3663 | spec->aa_mix_nid = 0x21; | 3683 | spec->aa_mix_nid = 0x21; |
3664 | override_mic_boost(codec, 0x2b, 0, 3, 40); | 3684 | override_mic_boost(codec, 0x2b, 0, 3, 40); |
3665 | override_mic_boost(codec, 0x29, 0, 3, 40); | 3685 | override_mic_boost(codec, 0x29, 0, 3, 40); |
3686 | if (spec->codec_type == VT1802) | ||
3687 | fix_vt1802_connections(codec); | ||
3666 | add_secret_dac_path(codec); | 3688 | add_secret_dac_path(codec); |
3667 | 3689 | ||
3668 | snd_hda_pick_fixup(codec, NULL, vt2002p_fixups, via_fixups); | 3690 | snd_hda_pick_fixup(codec, NULL, vt2002p_fixups, via_fixups); |
diff --git a/sound/pci/ice1712/ice1724.c b/sound/pci/ice1712/ice1724.c index 3050a5279253..245d874891ba 100644 --- a/sound/pci/ice1712/ice1724.c +++ b/sound/pci/ice1712/ice1724.c | |||
@@ -2859,7 +2859,12 @@ static int snd_vt1724_resume(struct device *dev) | |||
2859 | ice->set_spdif_clock(ice, 0); | 2859 | ice->set_spdif_clock(ice, 0); |
2860 | } else { | 2860 | } else { |
2861 | /* internal on-card clock */ | 2861 | /* internal on-card clock */ |
2862 | snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); | 2862 | int rate; |
2863 | if (ice->cur_rate) | ||
2864 | rate = ice->cur_rate; | ||
2865 | else | ||
2866 | rate = ice->pro_rate_default; | ||
2867 | snd_vt1724_set_pro_rate(ice, rate, 1); | ||
2863 | } | 2868 | } |
2864 | 2869 | ||
2865 | update_spdif_bits(ice, ice->pm_saved_spdif_ctrl); | 2870 | update_spdif_bits(ice, ice->pm_saved_spdif_ctrl); |
diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c index f1cd1e387801..748e36c66603 100644 --- a/sound/pci/rme9652/hdspm.c +++ b/sound/pci/rme9652/hdspm.c | |||
@@ -3979,7 +3979,8 @@ static int snd_hdspm_get_sync_check(struct snd_kcontrol *kcontrol, | |||
3979 | case 8: /* SYNC IN */ | 3979 | case 8: /* SYNC IN */ |
3980 | val = hdspm_sync_in_sync_check(hdspm); break; | 3980 | val = hdspm_sync_in_sync_check(hdspm); break; |
3981 | default: | 3981 | default: |
3982 | val = hdspm_s1_sync_check(hdspm, ucontrol->id.index-1); | 3982 | val = hdspm_s1_sync_check(hdspm, |
3983 | kcontrol->private_value-1); | ||
3983 | } | 3984 | } |
3984 | break; | 3985 | break; |
3985 | 3986 | ||
@@ -4899,7 +4900,7 @@ snd_hdspm_proc_read_madi(struct snd_info_entry * entry, | |||
4899 | insel = "Coaxial"; | 4900 | insel = "Coaxial"; |
4900 | break; | 4901 | break; |
4901 | default: | 4902 | default: |
4902 | insel = "Unkown"; | 4903 | insel = "Unknown"; |
4903 | } | 4904 | } |
4904 | 4905 | ||
4905 | snd_iprintf(buffer, | 4906 | snd_iprintf(buffer, |
diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 61599298fb26..4d8db3685e96 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c | |||
@@ -763,7 +763,7 @@ static int cs42l52_set_sysclk(struct snd_soc_dai *codec_dai, | |||
763 | if ((freq >= CS42L52_MIN_CLK) && (freq <= CS42L52_MAX_CLK)) { | 763 | if ((freq >= CS42L52_MIN_CLK) && (freq <= CS42L52_MAX_CLK)) { |
764 | cs42l52->sysclk = freq; | 764 | cs42l52->sysclk = freq; |
765 | } else { | 765 | } else { |
766 | dev_err(codec->dev, "Invalid freq paramter\n"); | 766 | dev_err(codec->dev, "Invalid freq parameter\n"); |
767 | return -EINVAL; | 767 | return -EINVAL; |
768 | } | 768 | } |
769 | return 0; | 769 | return 0; |
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 3fddc7ad1127..b2b2b37131bd 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c | |||
@@ -3722,7 +3722,7 @@ static irqreturn_t wm8958_mic_irq(int irq, void *data) | |||
3722 | } while (count--); | 3722 | } while (count--); |
3723 | 3723 | ||
3724 | if (count == 0) | 3724 | if (count == 0) |
3725 | dev_warn(codec->dev, "No impedence range reported for jack\n"); | 3725 | dev_warn(codec->dev, "No impedance range reported for jack\n"); |
3726 | 3726 | ||
3727 | #ifndef CONFIG_SND_SOC_WM8994_MODULE | 3727 | #ifndef CONFIG_SND_SOC_WM8994_MODULE |
3728 | trace_snd_soc_jack_irq(dev_name(codec->dev)); | 3728 | trace_snd_soc_jack_irq(dev_name(codec->dev)); |
diff --git a/sound/soc/omap/omap-dmic.c b/sound/soc/omap/omap-dmic.c index 68f2cd1a9206..5a6aeaf552a8 100644 --- a/sound/soc/omap/omap-dmic.c +++ b/sound/soc/omap/omap-dmic.c | |||
@@ -464,9 +464,9 @@ static __devinit int asoc_dmic_probe(struct platform_device *pdev) | |||
464 | 464 | ||
465 | mutex_init(&dmic->mutex); | 465 | mutex_init(&dmic->mutex); |
466 | 466 | ||
467 | dmic->fclk = clk_get(dmic->dev, "dmic_fck"); | 467 | dmic->fclk = clk_get(dmic->dev, "fck"); |
468 | if (IS_ERR(dmic->fclk)) { | 468 | if (IS_ERR(dmic->fclk)) { |
469 | dev_err(dmic->dev, "cant get dmic_fck\n"); | 469 | dev_err(dmic->dev, "cant get fck\n"); |
470 | return -ENODEV; | 470 | return -ENODEV; |
471 | } | 471 | } |
472 | 472 | ||
diff --git a/sound/soc/omap/zoom2.c b/sound/soc/omap/zoom2.c index 677b567935f8..1ff6bb9ade5c 100644 --- a/sound/soc/omap/zoom2.c +++ b/sound/soc/omap/zoom2.c | |||
@@ -21,15 +21,14 @@ | |||
21 | 21 | ||
22 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
24 | #include <linux/gpio.h> | ||
24 | #include <sound/core.h> | 25 | #include <sound/core.h> |
25 | #include <sound/pcm.h> | 26 | #include <sound/pcm.h> |
26 | #include <sound/soc.h> | 27 | #include <sound/soc.h> |
27 | 28 | ||
28 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
29 | #include <mach/hardware.h> | ||
30 | #include <mach/gpio.h> | ||
31 | #include <mach/board-zoom.h> | ||
32 | #include <linux/platform_data/asoc-ti-mcbsp.h> | 30 | #include <linux/platform_data/asoc-ti-mcbsp.h> |
31 | #include <linux/platform_data/gpio-omap.h> | ||
33 | 32 | ||
34 | /* Register descriptions for twl4030 codec part */ | 33 | /* Register descriptions for twl4030 codec part */ |
35 | #include <linux/mfd/twl4030-audio.h> | 34 | #include <linux/mfd/twl4030-audio.h> |
diff --git a/sound/soc/sh/fsi.c b/sound/soc/sh/fsi.c index 9d7f30774a44..4a10e4d1bd43 100644 --- a/sound/soc/sh/fsi.c +++ b/sound/soc/sh/fsi.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/module.h> | 22 | #include <linux/module.h> |
23 | #include <linux/workqueue.h> | 23 | #include <linux/workqueue.h> |
24 | #include <sound/soc.h> | 24 | #include <sound/soc.h> |
25 | #include <sound/pcm_params.h> | ||
25 | #include <sound/sh_fsi.h> | 26 | #include <sound/sh_fsi.h> |
26 | 27 | ||
27 | /* PortA/PortB register */ | 28 | /* PortA/PortB register */ |
@@ -189,6 +190,14 @@ typedef int (*set_rate_func)(struct device *dev, int rate, int enable); | |||
189 | */ | 190 | */ |
190 | 191 | ||
191 | /* | 192 | /* |
193 | * FSI clock | ||
194 | * | ||
195 | * FSIxCLK [CPG] (ick) -------> | | ||
196 | * |-> FSI_DIV (div)-> FSI2 | ||
197 | * FSIxCK [external] (xck) ---> | | ||
198 | */ | ||
199 | |||
200 | /* | ||
192 | * struct | 201 | * struct |
193 | */ | 202 | */ |
194 | 203 | ||
@@ -228,6 +237,20 @@ struct fsi_stream { | |||
228 | dma_addr_t dma; | 237 | dma_addr_t dma; |
229 | }; | 238 | }; |
230 | 239 | ||
240 | struct fsi_clk { | ||
241 | /* see [FSI clock] */ | ||
242 | struct clk *own; | ||
243 | struct clk *xck; | ||
244 | struct clk *ick; | ||
245 | struct clk *div; | ||
246 | int (*set_rate)(struct device *dev, | ||
247 | struct fsi_priv *fsi, | ||
248 | unsigned long rate); | ||
249 | |||
250 | unsigned long rate; | ||
251 | unsigned int count; | ||
252 | }; | ||
253 | |||
231 | struct fsi_priv { | 254 | struct fsi_priv { |
232 | void __iomem *base; | 255 | void __iomem *base; |
233 | struct fsi_master *master; | 256 | struct fsi_master *master; |
@@ -236,6 +259,8 @@ struct fsi_priv { | |||
236 | struct fsi_stream playback; | 259 | struct fsi_stream playback; |
237 | struct fsi_stream capture; | 260 | struct fsi_stream capture; |
238 | 261 | ||
262 | struct fsi_clk clock; | ||
263 | |||
239 | u32 fmt; | 264 | u32 fmt; |
240 | 265 | ||
241 | int chan_num:16; | 266 | int chan_num:16; |
@@ -717,14 +742,335 @@ static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable) | |||
717 | /* | 742 | /* |
718 | * clock function | 743 | * clock function |
719 | */ | 744 | */ |
745 | static int fsi_clk_init(struct device *dev, | ||
746 | struct fsi_priv *fsi, | ||
747 | int xck, | ||
748 | int ick, | ||
749 | int div, | ||
750 | int (*set_rate)(struct device *dev, | ||
751 | struct fsi_priv *fsi, | ||
752 | unsigned long rate)) | ||
753 | { | ||
754 | struct fsi_clk *clock = &fsi->clock; | ||
755 | int is_porta = fsi_is_port_a(fsi); | ||
756 | |||
757 | clock->xck = NULL; | ||
758 | clock->ick = NULL; | ||
759 | clock->div = NULL; | ||
760 | clock->rate = 0; | ||
761 | clock->count = 0; | ||
762 | clock->set_rate = set_rate; | ||
763 | |||
764 | clock->own = devm_clk_get(dev, NULL); | ||
765 | if (IS_ERR(clock->own)) | ||
766 | return -EINVAL; | ||
767 | |||
768 | /* external clock */ | ||
769 | if (xck) { | ||
770 | clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb"); | ||
771 | if (IS_ERR(clock->xck)) { | ||
772 | dev_err(dev, "can't get xck clock\n"); | ||
773 | return -EINVAL; | ||
774 | } | ||
775 | if (clock->xck == clock->own) { | ||
776 | dev_err(dev, "cpu doesn't support xck clock\n"); | ||
777 | return -EINVAL; | ||
778 | } | ||
779 | } | ||
780 | |||
781 | /* FSIACLK/FSIBCLK */ | ||
782 | if (ick) { | ||
783 | clock->ick = devm_clk_get(dev, is_porta ? "icka" : "ickb"); | ||
784 | if (IS_ERR(clock->ick)) { | ||
785 | dev_err(dev, "can't get ick clock\n"); | ||
786 | return -EINVAL; | ||
787 | } | ||
788 | if (clock->ick == clock->own) { | ||
789 | dev_err(dev, "cpu doesn't support ick clock\n"); | ||
790 | return -EINVAL; | ||
791 | } | ||
792 | } | ||
793 | |||
794 | /* FSI-DIV */ | ||
795 | if (div) { | ||
796 | clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb"); | ||
797 | if (IS_ERR(clock->div)) { | ||
798 | dev_err(dev, "can't get div clock\n"); | ||
799 | return -EINVAL; | ||
800 | } | ||
801 | if (clock->div == clock->own) { | ||
802 | dev_err(dev, "cpu doens't support div clock\n"); | ||
803 | return -EINVAL; | ||
804 | } | ||
805 | } | ||
806 | |||
807 | return 0; | ||
808 | } | ||
809 | |||
810 | #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0) | ||
811 | static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate) | ||
812 | { | ||
813 | fsi->clock.rate = rate; | ||
814 | } | ||
815 | |||
816 | static int fsi_clk_is_valid(struct fsi_priv *fsi) | ||
817 | { | ||
818 | return fsi->clock.set_rate && | ||
819 | fsi->clock.rate; | ||
820 | } | ||
821 | |||
822 | static int fsi_clk_enable(struct device *dev, | ||
823 | struct fsi_priv *fsi, | ||
824 | unsigned long rate) | ||
825 | { | ||
826 | struct fsi_clk *clock = &fsi->clock; | ||
827 | int ret = -EINVAL; | ||
828 | |||
829 | if (!fsi_clk_is_valid(fsi)) | ||
830 | return ret; | ||
831 | |||
832 | if (0 == clock->count) { | ||
833 | ret = clock->set_rate(dev, fsi, rate); | ||
834 | if (ret < 0) { | ||
835 | fsi_clk_invalid(fsi); | ||
836 | return ret; | ||
837 | } | ||
838 | |||
839 | if (clock->xck) | ||
840 | clk_enable(clock->xck); | ||
841 | if (clock->ick) | ||
842 | clk_enable(clock->ick); | ||
843 | if (clock->div) | ||
844 | clk_enable(clock->div); | ||
845 | |||
846 | clock->count++; | ||
847 | } | ||
848 | |||
849 | return ret; | ||
850 | } | ||
851 | |||
852 | static int fsi_clk_disable(struct device *dev, | ||
853 | struct fsi_priv *fsi) | ||
854 | { | ||
855 | struct fsi_clk *clock = &fsi->clock; | ||
856 | |||
857 | if (!fsi_clk_is_valid(fsi)) | ||
858 | return -EINVAL; | ||
859 | |||
860 | if (1 == clock->count--) { | ||
861 | if (clock->xck) | ||
862 | clk_disable(clock->xck); | ||
863 | if (clock->ick) | ||
864 | clk_disable(clock->ick); | ||
865 | if (clock->div) | ||
866 | clk_disable(clock->div); | ||
867 | } | ||
868 | |||
869 | return 0; | ||
870 | } | ||
871 | |||
872 | static int fsi_clk_set_ackbpf(struct device *dev, | ||
873 | struct fsi_priv *fsi, | ||
874 | int ackmd, int bpfmd) | ||
875 | { | ||
876 | u32 data = 0; | ||
877 | |||
878 | /* check ackmd/bpfmd relationship */ | ||
879 | if (bpfmd > ackmd) { | ||
880 | dev_err(dev, "unsupported rate (%d/%d)\n", ackmd, bpfmd); | ||
881 | return -EINVAL; | ||
882 | } | ||
883 | |||
884 | /* ACKMD */ | ||
885 | switch (ackmd) { | ||
886 | case 512: | ||
887 | data |= (0x0 << 12); | ||
888 | break; | ||
889 | case 256: | ||
890 | data |= (0x1 << 12); | ||
891 | break; | ||
892 | case 128: | ||
893 | data |= (0x2 << 12); | ||
894 | break; | ||
895 | case 64: | ||
896 | data |= (0x3 << 12); | ||
897 | break; | ||
898 | case 32: | ||
899 | data |= (0x4 << 12); | ||
900 | break; | ||
901 | default: | ||
902 | dev_err(dev, "unsupported ackmd (%d)\n", ackmd); | ||
903 | return -EINVAL; | ||
904 | } | ||
905 | |||
906 | /* BPFMD */ | ||
907 | switch (bpfmd) { | ||
908 | case 32: | ||
909 | data |= (0x0 << 8); | ||
910 | break; | ||
911 | case 64: | ||
912 | data |= (0x1 << 8); | ||
913 | break; | ||
914 | case 128: | ||
915 | data |= (0x2 << 8); | ||
916 | break; | ||
917 | case 256: | ||
918 | data |= (0x3 << 8); | ||
919 | break; | ||
920 | case 512: | ||
921 | data |= (0x4 << 8); | ||
922 | break; | ||
923 | case 16: | ||
924 | data |= (0x7 << 8); | ||
925 | break; | ||
926 | default: | ||
927 | dev_err(dev, "unsupported bpfmd (%d)\n", bpfmd); | ||
928 | return -EINVAL; | ||
929 | } | ||
930 | |||
931 | dev_dbg(dev, "ACKMD/BPFMD = %d/%d\n", ackmd, bpfmd); | ||
932 | |||
933 | fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data); | ||
934 | udelay(10); | ||
935 | |||
936 | return 0; | ||
937 | } | ||
938 | |||
939 | static int fsi_clk_set_rate_external(struct device *dev, | ||
940 | struct fsi_priv *fsi, | ||
941 | unsigned long rate) | ||
942 | { | ||
943 | struct clk *xck = fsi->clock.xck; | ||
944 | struct clk *ick = fsi->clock.ick; | ||
945 | unsigned long xrate; | ||
946 | int ackmd, bpfmd; | ||
947 | int ret = 0; | ||
948 | |||
949 | /* check clock rate */ | ||
950 | xrate = clk_get_rate(xck); | ||
951 | if (xrate % rate) { | ||
952 | dev_err(dev, "unsupported clock rate\n"); | ||
953 | return -EINVAL; | ||
954 | } | ||
955 | |||
956 | clk_set_parent(ick, xck); | ||
957 | clk_set_rate(ick, xrate); | ||
958 | |||
959 | bpfmd = fsi->chan_num * 32; | ||
960 | ackmd = xrate / rate; | ||
961 | |||
962 | dev_dbg(dev, "external/rate = %ld/%ld\n", xrate, rate); | ||
963 | |||
964 | ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd); | ||
965 | if (ret < 0) | ||
966 | dev_err(dev, "%s failed", __func__); | ||
967 | |||
968 | return ret; | ||
969 | } | ||
970 | |||
971 | static int fsi_clk_set_rate_cpg(struct device *dev, | ||
972 | struct fsi_priv *fsi, | ||
973 | unsigned long rate) | ||
974 | { | ||
975 | struct clk *ick = fsi->clock.ick; | ||
976 | struct clk *div = fsi->clock.div; | ||
977 | unsigned long target = 0; /* 12288000 or 11289600 */ | ||
978 | unsigned long actual, cout; | ||
979 | unsigned long diff, min; | ||
980 | unsigned long best_cout, best_act; | ||
981 | int adj; | ||
982 | int ackmd, bpfmd; | ||
983 | int ret = -EINVAL; | ||
984 | |||
985 | if (!(12288000 % rate)) | ||
986 | target = 12288000; | ||
987 | if (!(11289600 % rate)) | ||
988 | target = 11289600; | ||
989 | if (!target) { | ||
990 | dev_err(dev, "unsupported rate\n"); | ||
991 | return ret; | ||
992 | } | ||
993 | |||
994 | bpfmd = fsi->chan_num * 32; | ||
995 | ackmd = target / rate; | ||
996 | ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd); | ||
997 | if (ret < 0) { | ||
998 | dev_err(dev, "%s failed", __func__); | ||
999 | return ret; | ||
1000 | } | ||
1001 | |||
1002 | /* | ||
1003 | * The clock flow is | ||
1004 | * | ||
1005 | * [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec] | ||
1006 | * | ||
1007 | * But, it needs to find best match of CPG and FSI_DIV | ||
1008 | * combination, since it is difficult to generate correct | ||
1009 | * frequency of audio clock from ick clock only. | ||
1010 | * Because ick is created from its parent clock. | ||
1011 | * | ||
1012 | * target = rate x [512/256/128/64]fs | ||
1013 | * cout = round(target x adjustment) | ||
1014 | * actual = cout / adjustment (by FSI-DIV) ~= target | ||
1015 | * audio = actual | ||
1016 | */ | ||
1017 | min = ~0; | ||
1018 | best_cout = 0; | ||
1019 | best_act = 0; | ||
1020 | for (adj = 1; adj < 0xffff; adj++) { | ||
1021 | |||
1022 | cout = target * adj; | ||
1023 | if (cout > 100000000) /* max clock = 100MHz */ | ||
1024 | break; | ||
1025 | |||
1026 | /* cout/actual audio clock */ | ||
1027 | cout = clk_round_rate(ick, cout); | ||
1028 | actual = cout / adj; | ||
1029 | |||
1030 | /* find best frequency */ | ||
1031 | diff = abs(actual - target); | ||
1032 | if (diff < min) { | ||
1033 | min = diff; | ||
1034 | best_cout = cout; | ||
1035 | best_act = actual; | ||
1036 | } | ||
1037 | } | ||
1038 | |||
1039 | ret = clk_set_rate(ick, best_cout); | ||
1040 | if (ret < 0) { | ||
1041 | dev_err(dev, "ick clock failed\n"); | ||
1042 | return -EIO; | ||
1043 | } | ||
1044 | |||
1045 | ret = clk_set_rate(div, clk_round_rate(div, best_act)); | ||
1046 | if (ret < 0) { | ||
1047 | dev_err(dev, "div clock failed\n"); | ||
1048 | return -EIO; | ||
1049 | } | ||
1050 | |||
1051 | dev_dbg(dev, "ick/div = %ld/%ld\n", | ||
1052 | clk_get_rate(ick), clk_get_rate(div)); | ||
1053 | |||
1054 | return ret; | ||
1055 | } | ||
1056 | |||
720 | static int fsi_set_master_clk(struct device *dev, struct fsi_priv *fsi, | 1057 | static int fsi_set_master_clk(struct device *dev, struct fsi_priv *fsi, |
721 | long rate, int enable) | 1058 | long rate, int enable) |
722 | { | 1059 | { |
723 | set_rate_func set_rate = fsi_get_info_set_rate(fsi); | 1060 | set_rate_func set_rate = fsi_get_info_set_rate(fsi); |
724 | int ret; | 1061 | int ret; |
725 | 1062 | ||
726 | if (!set_rate) | 1063 | /* |
727 | return 0; | 1064 | * CAUTION |
1065 | * | ||
1066 | * set_rate will be deleted | ||
1067 | */ | ||
1068 | if (!set_rate) { | ||
1069 | if (enable) | ||
1070 | return fsi_clk_enable(dev, fsi, rate); | ||
1071 | else | ||
1072 | return fsi_clk_disable(dev, fsi); | ||
1073 | } | ||
728 | 1074 | ||
729 | ret = set_rate(dev, rate, enable); | 1075 | ret = set_rate(dev, rate, enable); |
730 | if (ret < 0) /* error */ | 1076 | if (ret < 0) /* error */ |
@@ -1334,14 +1680,21 @@ static int fsi_hw_startup(struct fsi_priv *fsi, | |||
1334 | /* fifo init */ | 1680 | /* fifo init */ |
1335 | fsi_fifo_init(fsi, io, dev); | 1681 | fsi_fifo_init(fsi, io, dev); |
1336 | 1682 | ||
1683 | /* start master clock */ | ||
1684 | if (fsi_is_clk_master(fsi)) | ||
1685 | return fsi_set_master_clk(dev, fsi, fsi->rate, 1); | ||
1686 | |||
1337 | return 0; | 1687 | return 0; |
1338 | } | 1688 | } |
1339 | 1689 | ||
1340 | static void fsi_hw_shutdown(struct fsi_priv *fsi, | 1690 | static int fsi_hw_shutdown(struct fsi_priv *fsi, |
1341 | struct device *dev) | 1691 | struct device *dev) |
1342 | { | 1692 | { |
1693 | /* stop master clock */ | ||
1343 | if (fsi_is_clk_master(fsi)) | 1694 | if (fsi_is_clk_master(fsi)) |
1344 | fsi_set_master_clk(dev, fsi, fsi->rate, 0); | 1695 | return fsi_set_master_clk(dev, fsi, fsi->rate, 0); |
1696 | |||
1697 | return 0; | ||
1345 | } | 1698 | } |
1346 | 1699 | ||
1347 | static int fsi_dai_startup(struct snd_pcm_substream *substream, | 1700 | static int fsi_dai_startup(struct snd_pcm_substream *substream, |
@@ -1349,6 +1702,7 @@ static int fsi_dai_startup(struct snd_pcm_substream *substream, | |||
1349 | { | 1702 | { |
1350 | struct fsi_priv *fsi = fsi_get_priv(substream); | 1703 | struct fsi_priv *fsi = fsi_get_priv(substream); |
1351 | 1704 | ||
1705 | fsi_clk_invalid(fsi); | ||
1352 | fsi->rate = 0; | 1706 | fsi->rate = 0; |
1353 | 1707 | ||
1354 | return 0; | 1708 | return 0; |
@@ -1359,6 +1713,7 @@ static void fsi_dai_shutdown(struct snd_pcm_substream *substream, | |||
1359 | { | 1713 | { |
1360 | struct fsi_priv *fsi = fsi_get_priv(substream); | 1714 | struct fsi_priv *fsi = fsi_get_priv(substream); |
1361 | 1715 | ||
1716 | fsi_clk_invalid(fsi); | ||
1362 | fsi->rate = 0; | 1717 | fsi->rate = 0; |
1363 | } | 1718 | } |
1364 | 1719 | ||
@@ -1372,13 +1727,16 @@ static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd, | |||
1372 | switch (cmd) { | 1727 | switch (cmd) { |
1373 | case SNDRV_PCM_TRIGGER_START: | 1728 | case SNDRV_PCM_TRIGGER_START: |
1374 | fsi_stream_init(fsi, io, substream); | 1729 | fsi_stream_init(fsi, io, substream); |
1375 | fsi_hw_startup(fsi, io, dai->dev); | 1730 | if (!ret) |
1376 | ret = fsi_stream_transfer(io); | 1731 | ret = fsi_hw_startup(fsi, io, dai->dev); |
1377 | if (0 == ret) | 1732 | if (!ret) |
1733 | ret = fsi_stream_transfer(io); | ||
1734 | if (!ret) | ||
1378 | fsi_stream_start(fsi, io); | 1735 | fsi_stream_start(fsi, io); |
1379 | break; | 1736 | break; |
1380 | case SNDRV_PCM_TRIGGER_STOP: | 1737 | case SNDRV_PCM_TRIGGER_STOP: |
1381 | fsi_hw_shutdown(fsi, dai->dev); | 1738 | if (!ret) |
1739 | ret = fsi_hw_shutdown(fsi, dai->dev); | ||
1382 | fsi_stream_stop(fsi, io); | 1740 | fsi_stream_stop(fsi, io); |
1383 | fsi_stream_quit(fsi, io); | 1741 | fsi_stream_quit(fsi, io); |
1384 | break; | 1742 | break; |
@@ -1437,9 +1795,25 @@ static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |||
1437 | return -EINVAL; | 1795 | return -EINVAL; |
1438 | } | 1796 | } |
1439 | 1797 | ||
1440 | if (fsi_is_clk_master(fsi) && !set_rate) { | 1798 | if (fsi_is_clk_master(fsi)) { |
1441 | dev_err(dai->dev, "platform doesn't have set_rate\n"); | 1799 | /* |
1442 | return -EINVAL; | 1800 | * CAUTION |
1801 | * | ||
1802 | * set_rate will be deleted | ||
1803 | */ | ||
1804 | if (set_rate) | ||
1805 | dev_warn(dai->dev, "set_rate will be removed soon\n"); | ||
1806 | |||
1807 | switch (flags & SH_FSI_CLK_MASK) { | ||
1808 | case SH_FSI_CLK_EXTERNAL: | ||
1809 | fsi_clk_init(dai->dev, fsi, 1, 1, 0, | ||
1810 | fsi_clk_set_rate_external); | ||
1811 | break; | ||
1812 | case SH_FSI_CLK_CPG: | ||
1813 | fsi_clk_init(dai->dev, fsi, 0, 1, 1, | ||
1814 | fsi_clk_set_rate_cpg); | ||
1815 | break; | ||
1816 | } | ||
1443 | } | 1817 | } |
1444 | 1818 | ||
1445 | /* set format */ | 1819 | /* set format */ |
@@ -1462,19 +1836,13 @@ static int fsi_dai_hw_params(struct snd_pcm_substream *substream, | |||
1462 | struct snd_soc_dai *dai) | 1836 | struct snd_soc_dai *dai) |
1463 | { | 1837 | { |
1464 | struct fsi_priv *fsi = fsi_get_priv(substream); | 1838 | struct fsi_priv *fsi = fsi_get_priv(substream); |
1465 | long rate = params_rate(params); | ||
1466 | int ret; | ||
1467 | |||
1468 | if (!fsi_is_clk_master(fsi)) | ||
1469 | return 0; | ||
1470 | 1839 | ||
1471 | ret = fsi_set_master_clk(dai->dev, fsi, rate, 1); | 1840 | if (fsi_is_clk_master(fsi)) { |
1472 | if (ret < 0) | 1841 | fsi->rate = params_rate(params); |
1473 | return ret; | 1842 | fsi_clk_valid(fsi, fsi->rate); |
1474 | 1843 | } | |
1475 | fsi->rate = rate; | ||
1476 | 1844 | ||
1477 | return ret; | 1845 | return 0; |
1478 | } | 1846 | } |
1479 | 1847 | ||
1480 | static const struct snd_soc_dai_ops fsi_dai_ops = { | 1848 | static const struct snd_soc_dai_ops fsi_dai_ops = { |
@@ -1498,7 +1866,7 @@ static struct snd_pcm_hardware fsi_pcm_hardware = { | |||
1498 | .rates = FSI_RATES, | 1866 | .rates = FSI_RATES, |
1499 | .rate_min = 8000, | 1867 | .rate_min = 8000, |
1500 | .rate_max = 192000, | 1868 | .rate_max = 192000, |
1501 | .channels_min = 1, | 1869 | .channels_min = 2, |
1502 | .channels_max = 2, | 1870 | .channels_max = 2, |
1503 | .buffer_bytes_max = 64 * 1024, | 1871 | .buffer_bytes_max = 64 * 1024, |
1504 | .period_bytes_min = 32, | 1872 | .period_bytes_min = 32, |
@@ -1586,14 +1954,14 @@ static struct snd_soc_dai_driver fsi_soc_dai[] = { | |||
1586 | .playback = { | 1954 | .playback = { |
1587 | .rates = FSI_RATES, | 1955 | .rates = FSI_RATES, |
1588 | .formats = FSI_FMTS, | 1956 | .formats = FSI_FMTS, |
1589 | .channels_min = 1, | 1957 | .channels_min = 2, |
1590 | .channels_max = 8, | 1958 | .channels_max = 2, |
1591 | }, | 1959 | }, |
1592 | .capture = { | 1960 | .capture = { |
1593 | .rates = FSI_RATES, | 1961 | .rates = FSI_RATES, |
1594 | .formats = FSI_FMTS, | 1962 | .formats = FSI_FMTS, |
1595 | .channels_min = 1, | 1963 | .channels_min = 2, |
1596 | .channels_max = 8, | 1964 | .channels_max = 2, |
1597 | }, | 1965 | }, |
1598 | .ops = &fsi_dai_ops, | 1966 | .ops = &fsi_dai_ops, |
1599 | }, | 1967 | }, |
@@ -1602,14 +1970,14 @@ static struct snd_soc_dai_driver fsi_soc_dai[] = { | |||
1602 | .playback = { | 1970 | .playback = { |
1603 | .rates = FSI_RATES, | 1971 | .rates = FSI_RATES, |
1604 | .formats = FSI_FMTS, | 1972 | .formats = FSI_FMTS, |
1605 | .channels_min = 1, | 1973 | .channels_min = 2, |
1606 | .channels_max = 8, | 1974 | .channels_max = 2, |
1607 | }, | 1975 | }, |
1608 | .capture = { | 1976 | .capture = { |
1609 | .rates = FSI_RATES, | 1977 | .rates = FSI_RATES, |
1610 | .formats = FSI_FMTS, | 1978 | .formats = FSI_FMTS, |
1611 | .channels_min = 1, | 1979 | .channels_min = 2, |
1612 | .channels_max = 8, | 1980 | .channels_max = 2, |
1613 | }, | 1981 | }, |
1614 | .ops = &fsi_dai_ops, | 1982 | .ops = &fsi_dai_ops, |
1615 | }, | 1983 | }, |
@@ -1702,7 +2070,7 @@ static int fsi_probe(struct platform_device *pdev) | |||
1702 | pm_runtime_enable(&pdev->dev); | 2070 | pm_runtime_enable(&pdev->dev); |
1703 | dev_set_drvdata(&pdev->dev, master); | 2071 | dev_set_drvdata(&pdev->dev, master); |
1704 | 2072 | ||
1705 | ret = request_irq(irq, &fsi_interrupt, 0, | 2073 | ret = devm_request_irq(&pdev->dev, irq, &fsi_interrupt, 0, |
1706 | id_entry->name, master); | 2074 | id_entry->name, master); |
1707 | if (ret) { | 2075 | if (ret) { |
1708 | dev_err(&pdev->dev, "irq request err\n"); | 2076 | dev_err(&pdev->dev, "irq request err\n"); |
@@ -1712,7 +2080,7 @@ static int fsi_probe(struct platform_device *pdev) | |||
1712 | ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform); | 2080 | ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform); |
1713 | if (ret < 0) { | 2081 | if (ret < 0) { |
1714 | dev_err(&pdev->dev, "cannot snd soc register\n"); | 2082 | dev_err(&pdev->dev, "cannot snd soc register\n"); |
1715 | goto exit_free_irq; | 2083 | goto exit_fsib; |
1716 | } | 2084 | } |
1717 | 2085 | ||
1718 | ret = snd_soc_register_dais(&pdev->dev, fsi_soc_dai, | 2086 | ret = snd_soc_register_dais(&pdev->dev, fsi_soc_dai, |
@@ -1726,8 +2094,6 @@ static int fsi_probe(struct platform_device *pdev) | |||
1726 | 2094 | ||
1727 | exit_snd_soc: | 2095 | exit_snd_soc: |
1728 | snd_soc_unregister_platform(&pdev->dev); | 2096 | snd_soc_unregister_platform(&pdev->dev); |
1729 | exit_free_irq: | ||
1730 | free_irq(irq, master); | ||
1731 | exit_fsib: | 2097 | exit_fsib: |
1732 | pm_runtime_disable(&pdev->dev); | 2098 | pm_runtime_disable(&pdev->dev); |
1733 | fsi_stream_remove(&master->fsib); | 2099 | fsi_stream_remove(&master->fsib); |
@@ -1743,7 +2109,6 @@ static int fsi_remove(struct platform_device *pdev) | |||
1743 | 2109 | ||
1744 | master = dev_get_drvdata(&pdev->dev); | 2110 | master = dev_get_drvdata(&pdev->dev); |
1745 | 2111 | ||
1746 | free_irq(master->irq, master); | ||
1747 | pm_runtime_disable(&pdev->dev); | 2112 | pm_runtime_disable(&pdev->dev); |
1748 | 2113 | ||
1749 | snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai)); | 2114 | snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai)); |
@@ -1774,10 +2139,6 @@ static void __fsi_resume(struct fsi_priv *fsi, | |||
1774 | return; | 2139 | return; |
1775 | 2140 | ||
1776 | fsi_hw_startup(fsi, io, dev); | 2141 | fsi_hw_startup(fsi, io, dev); |
1777 | |||
1778 | if (fsi_is_clk_master(fsi) && fsi->rate) | ||
1779 | fsi_set_master_clk(dev, fsi, fsi->rate, 1); | ||
1780 | |||
1781 | fsi_stream_start(fsi, io); | 2142 | fsi_stream_start(fsi, io); |
1782 | } | 2143 | } |
1783 | 2144 | ||
diff --git a/sound/usb/card.c b/sound/usb/card.c index 561bb74fd364..282f0fc9fed1 100644 --- a/sound/usb/card.c +++ b/sound/usb/card.c | |||
@@ -339,7 +339,7 @@ static int snd_usb_audio_create(struct usb_device *dev, int idx, | |||
339 | } | 339 | } |
340 | 340 | ||
341 | mutex_init(&chip->mutex); | 341 | mutex_init(&chip->mutex); |
342 | mutex_init(&chip->shutdown_mutex); | 342 | init_rwsem(&chip->shutdown_rwsem); |
343 | chip->index = idx; | 343 | chip->index = idx; |
344 | chip->dev = dev; | 344 | chip->dev = dev; |
345 | chip->card = card; | 345 | chip->card = card; |
@@ -560,7 +560,7 @@ static void snd_usb_audio_disconnect(struct usb_device *dev, | |||
560 | 560 | ||
561 | card = chip->card; | 561 | card = chip->card; |
562 | mutex_lock(®ister_mutex); | 562 | mutex_lock(®ister_mutex); |
563 | mutex_lock(&chip->shutdown_mutex); | 563 | down_write(&chip->shutdown_rwsem); |
564 | chip->shutdown = 1; | 564 | chip->shutdown = 1; |
565 | chip->num_interfaces--; | 565 | chip->num_interfaces--; |
566 | if (chip->num_interfaces <= 0) { | 566 | if (chip->num_interfaces <= 0) { |
@@ -582,11 +582,11 @@ static void snd_usb_audio_disconnect(struct usb_device *dev, | |||
582 | snd_usb_mixer_disconnect(p); | 582 | snd_usb_mixer_disconnect(p); |
583 | } | 583 | } |
584 | usb_chip[chip->index] = NULL; | 584 | usb_chip[chip->index] = NULL; |
585 | mutex_unlock(&chip->shutdown_mutex); | 585 | up_write(&chip->shutdown_rwsem); |
586 | mutex_unlock(®ister_mutex); | 586 | mutex_unlock(®ister_mutex); |
587 | snd_card_free_when_closed(card); | 587 | snd_card_free_when_closed(card); |
588 | } else { | 588 | } else { |
589 | mutex_unlock(&chip->shutdown_mutex); | 589 | up_write(&chip->shutdown_rwsem); |
590 | mutex_unlock(®ister_mutex); | 590 | mutex_unlock(®ister_mutex); |
591 | } | 591 | } |
592 | } | 592 | } |
@@ -618,16 +618,20 @@ int snd_usb_autoresume(struct snd_usb_audio *chip) | |||
618 | { | 618 | { |
619 | int err = -ENODEV; | 619 | int err = -ENODEV; |
620 | 620 | ||
621 | down_read(&chip->shutdown_rwsem); | ||
621 | if (!chip->shutdown && !chip->probing) | 622 | if (!chip->shutdown && !chip->probing) |
622 | err = usb_autopm_get_interface(chip->pm_intf); | 623 | err = usb_autopm_get_interface(chip->pm_intf); |
624 | up_read(&chip->shutdown_rwsem); | ||
623 | 625 | ||
624 | return err; | 626 | return err; |
625 | } | 627 | } |
626 | 628 | ||
627 | void snd_usb_autosuspend(struct snd_usb_audio *chip) | 629 | void snd_usb_autosuspend(struct snd_usb_audio *chip) |
628 | { | 630 | { |
631 | down_read(&chip->shutdown_rwsem); | ||
629 | if (!chip->shutdown && !chip->probing) | 632 | if (!chip->shutdown && !chip->probing) |
630 | usb_autopm_put_interface(chip->pm_intf); | 633 | usb_autopm_put_interface(chip->pm_intf); |
634 | up_read(&chip->shutdown_rwsem); | ||
631 | } | 635 | } |
632 | 636 | ||
633 | static int usb_audio_suspend(struct usb_interface *intf, pm_message_t message) | 637 | static int usb_audio_suspend(struct usb_interface *intf, pm_message_t message) |
diff --git a/sound/usb/card.h b/sound/usb/card.h index afa4f9e9b27a..814cb357ff88 100644 --- a/sound/usb/card.h +++ b/sound/usb/card.h | |||
@@ -126,6 +126,7 @@ struct snd_usb_substream { | |||
126 | struct snd_usb_endpoint *sync_endpoint; | 126 | struct snd_usb_endpoint *sync_endpoint; |
127 | unsigned long flags; | 127 | unsigned long flags; |
128 | bool need_setup_ep; /* (re)configure EP at prepare? */ | 128 | bool need_setup_ep; /* (re)configure EP at prepare? */ |
129 | unsigned int speed; /* USB_SPEED_XXX */ | ||
129 | 130 | ||
130 | u64 formats; /* format bitmasks (all or'ed) */ | 131 | u64 formats; /* format bitmasks (all or'ed) */ |
131 | unsigned int num_formats; /* number of supported audio formats (list) */ | 132 | unsigned int num_formats; /* number of supported audio formats (list) */ |
diff --git a/sound/usb/endpoint.c b/sound/usb/endpoint.c index 7f78c6d782b0..34de6f2faf61 100644 --- a/sound/usb/endpoint.c +++ b/sound/usb/endpoint.c | |||
@@ -35,6 +35,7 @@ | |||
35 | 35 | ||
36 | #define EP_FLAG_ACTIVATED 0 | 36 | #define EP_FLAG_ACTIVATED 0 |
37 | #define EP_FLAG_RUNNING 1 | 37 | #define EP_FLAG_RUNNING 1 |
38 | #define EP_FLAG_STOPPING 2 | ||
38 | 39 | ||
39 | /* | 40 | /* |
40 | * snd_usb_endpoint is a model that abstracts everything related to an | 41 | * snd_usb_endpoint is a model that abstracts everything related to an |
@@ -502,10 +503,20 @@ static int wait_clear_urbs(struct snd_usb_endpoint *ep) | |||
502 | if (alive) | 503 | if (alive) |
503 | snd_printk(KERN_ERR "timeout: still %d active urbs on EP #%x\n", | 504 | snd_printk(KERN_ERR "timeout: still %d active urbs on EP #%x\n", |
504 | alive, ep->ep_num); | 505 | alive, ep->ep_num); |
506 | clear_bit(EP_FLAG_STOPPING, &ep->flags); | ||
505 | 507 | ||
506 | return 0; | 508 | return 0; |
507 | } | 509 | } |
508 | 510 | ||
511 | /* sync the pending stop operation; | ||
512 | * this function itself doesn't trigger the stop operation | ||
513 | */ | ||
514 | void snd_usb_endpoint_sync_pending_stop(struct snd_usb_endpoint *ep) | ||
515 | { | ||
516 | if (ep && test_bit(EP_FLAG_STOPPING, &ep->flags)) | ||
517 | wait_clear_urbs(ep); | ||
518 | } | ||
519 | |||
509 | /* | 520 | /* |
510 | * unlink active urbs. | 521 | * unlink active urbs. |
511 | */ | 522 | */ |
@@ -918,6 +929,8 @@ void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep, | |||
918 | 929 | ||
919 | if (wait) | 930 | if (wait) |
920 | wait_clear_urbs(ep); | 931 | wait_clear_urbs(ep); |
932 | else | ||
933 | set_bit(EP_FLAG_STOPPING, &ep->flags); | ||
921 | } | 934 | } |
922 | } | 935 | } |
923 | 936 | ||
diff --git a/sound/usb/endpoint.h b/sound/usb/endpoint.h index 6376ccf10fd4..3d4c9705041f 100644 --- a/sound/usb/endpoint.h +++ b/sound/usb/endpoint.h | |||
@@ -19,6 +19,7 @@ int snd_usb_endpoint_set_params(struct snd_usb_endpoint *ep, | |||
19 | int snd_usb_endpoint_start(struct snd_usb_endpoint *ep, int can_sleep); | 19 | int snd_usb_endpoint_start(struct snd_usb_endpoint *ep, int can_sleep); |
20 | void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep, | 20 | void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep, |
21 | int force, int can_sleep, int wait); | 21 | int force, int can_sleep, int wait); |
22 | void snd_usb_endpoint_sync_pending_stop(struct snd_usb_endpoint *ep); | ||
22 | int snd_usb_endpoint_activate(struct snd_usb_endpoint *ep); | 23 | int snd_usb_endpoint_activate(struct snd_usb_endpoint *ep); |
23 | int snd_usb_endpoint_deactivate(struct snd_usb_endpoint *ep); | 24 | int snd_usb_endpoint_deactivate(struct snd_usb_endpoint *ep); |
24 | void snd_usb_endpoint_free(struct list_head *head); | 25 | void snd_usb_endpoint_free(struct list_head *head); |
diff --git a/sound/usb/mixer.c b/sound/usb/mixer.c index fe56c9da38e9..298070e8f2d4 100644 --- a/sound/usb/mixer.c +++ b/sound/usb/mixer.c | |||
@@ -287,25 +287,32 @@ static int get_ctl_value_v1(struct usb_mixer_elem_info *cval, int request, int v | |||
287 | unsigned char buf[2]; | 287 | unsigned char buf[2]; |
288 | int val_len = cval->val_type >= USB_MIXER_S16 ? 2 : 1; | 288 | int val_len = cval->val_type >= USB_MIXER_S16 ? 2 : 1; |
289 | int timeout = 10; | 289 | int timeout = 10; |
290 | int err; | 290 | int idx = 0, err; |
291 | 291 | ||
292 | err = snd_usb_autoresume(cval->mixer->chip); | 292 | err = snd_usb_autoresume(cval->mixer->chip); |
293 | if (err < 0) | 293 | if (err < 0) |
294 | return -EIO; | 294 | return -EIO; |
295 | down_read(&chip->shutdown_rwsem); | ||
295 | while (timeout-- > 0) { | 296 | while (timeout-- > 0) { |
297 | if (chip->shutdown) | ||
298 | break; | ||
299 | idx = snd_usb_ctrl_intf(chip) | (cval->id << 8); | ||
296 | if (snd_usb_ctl_msg(chip->dev, usb_rcvctrlpipe(chip->dev, 0), request, | 300 | if (snd_usb_ctl_msg(chip->dev, usb_rcvctrlpipe(chip->dev, 0), request, |
297 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_IN, | 301 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_IN, |
298 | validx, snd_usb_ctrl_intf(chip) | (cval->id << 8), | 302 | validx, idx, buf, val_len) >= val_len) { |
299 | buf, val_len) >= val_len) { | ||
300 | *value_ret = convert_signed_value(cval, snd_usb_combine_bytes(buf, val_len)); | 303 | *value_ret = convert_signed_value(cval, snd_usb_combine_bytes(buf, val_len)); |
301 | snd_usb_autosuspend(cval->mixer->chip); | 304 | err = 0; |
302 | return 0; | 305 | goto out; |
303 | } | 306 | } |
304 | } | 307 | } |
305 | snd_usb_autosuspend(cval->mixer->chip); | ||
306 | snd_printdd(KERN_ERR "cannot get ctl value: req = %#x, wValue = %#x, wIndex = %#x, type = %d\n", | 308 | snd_printdd(KERN_ERR "cannot get ctl value: req = %#x, wValue = %#x, wIndex = %#x, type = %d\n", |
307 | request, validx, snd_usb_ctrl_intf(chip) | (cval->id << 8), cval->val_type); | 309 | request, validx, idx, cval->val_type); |
308 | return -EINVAL; | 310 | err = -EINVAL; |
311 | |||
312 | out: | ||
313 | up_read(&chip->shutdown_rwsem); | ||
314 | snd_usb_autosuspend(cval->mixer->chip); | ||
315 | return err; | ||
309 | } | 316 | } |
310 | 317 | ||
311 | static int get_ctl_value_v2(struct usb_mixer_elem_info *cval, int request, int validx, int *value_ret) | 318 | static int get_ctl_value_v2(struct usb_mixer_elem_info *cval, int request, int validx, int *value_ret) |
@@ -313,7 +320,7 @@ static int get_ctl_value_v2(struct usb_mixer_elem_info *cval, int request, int v | |||
313 | struct snd_usb_audio *chip = cval->mixer->chip; | 320 | struct snd_usb_audio *chip = cval->mixer->chip; |
314 | unsigned char buf[2 + 3*sizeof(__u16)]; /* enough space for one range */ | 321 | unsigned char buf[2 + 3*sizeof(__u16)]; /* enough space for one range */ |
315 | unsigned char *val; | 322 | unsigned char *val; |
316 | int ret, size; | 323 | int idx = 0, ret, size; |
317 | __u8 bRequest; | 324 | __u8 bRequest; |
318 | 325 | ||
319 | if (request == UAC_GET_CUR) { | 326 | if (request == UAC_GET_CUR) { |
@@ -330,16 +337,22 @@ static int get_ctl_value_v2(struct usb_mixer_elem_info *cval, int request, int v | |||
330 | if (ret) | 337 | if (ret) |
331 | goto error; | 338 | goto error; |
332 | 339 | ||
333 | ret = snd_usb_ctl_msg(chip->dev, usb_rcvctrlpipe(chip->dev, 0), bRequest, | 340 | down_read(&chip->shutdown_rwsem); |
341 | if (chip->shutdown) | ||
342 | ret = -ENODEV; | ||
343 | else { | ||
344 | idx = snd_usb_ctrl_intf(chip) | (cval->id << 8); | ||
345 | ret = snd_usb_ctl_msg(chip->dev, usb_rcvctrlpipe(chip->dev, 0), bRequest, | ||
334 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_IN, | 346 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_IN, |
335 | validx, snd_usb_ctrl_intf(chip) | (cval->id << 8), | 347 | validx, idx, buf, size); |
336 | buf, size); | 348 | } |
349 | up_read(&chip->shutdown_rwsem); | ||
337 | snd_usb_autosuspend(chip); | 350 | snd_usb_autosuspend(chip); |
338 | 351 | ||
339 | if (ret < 0) { | 352 | if (ret < 0) { |
340 | error: | 353 | error: |
341 | snd_printk(KERN_ERR "cannot get ctl value: req = %#x, wValue = %#x, wIndex = %#x, type = %d\n", | 354 | snd_printk(KERN_ERR "cannot get ctl value: req = %#x, wValue = %#x, wIndex = %#x, type = %d\n", |
342 | request, validx, snd_usb_ctrl_intf(chip) | (cval->id << 8), cval->val_type); | 355 | request, validx, idx, cval->val_type); |
343 | return ret; | 356 | return ret; |
344 | } | 357 | } |
345 | 358 | ||
@@ -417,7 +430,7 @@ int snd_usb_mixer_set_ctl_value(struct usb_mixer_elem_info *cval, | |||
417 | { | 430 | { |
418 | struct snd_usb_audio *chip = cval->mixer->chip; | 431 | struct snd_usb_audio *chip = cval->mixer->chip; |
419 | unsigned char buf[2]; | 432 | unsigned char buf[2]; |
420 | int val_len, err, timeout = 10; | 433 | int idx = 0, val_len, err, timeout = 10; |
421 | 434 | ||
422 | if (cval->mixer->protocol == UAC_VERSION_1) { | 435 | if (cval->mixer->protocol == UAC_VERSION_1) { |
423 | val_len = cval->val_type >= USB_MIXER_S16 ? 2 : 1; | 436 | val_len = cval->val_type >= USB_MIXER_S16 ? 2 : 1; |
@@ -440,19 +453,27 @@ int snd_usb_mixer_set_ctl_value(struct usb_mixer_elem_info *cval, | |||
440 | err = snd_usb_autoresume(chip); | 453 | err = snd_usb_autoresume(chip); |
441 | if (err < 0) | 454 | if (err < 0) |
442 | return -EIO; | 455 | return -EIO; |
443 | while (timeout-- > 0) | 456 | down_read(&chip->shutdown_rwsem); |
457 | while (timeout-- > 0) { | ||
458 | if (chip->shutdown) | ||
459 | break; | ||
460 | idx = snd_usb_ctrl_intf(chip) | (cval->id << 8); | ||
444 | if (snd_usb_ctl_msg(chip->dev, | 461 | if (snd_usb_ctl_msg(chip->dev, |
445 | usb_sndctrlpipe(chip->dev, 0), request, | 462 | usb_sndctrlpipe(chip->dev, 0), request, |
446 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_OUT, | 463 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_OUT, |
447 | validx, snd_usb_ctrl_intf(chip) | (cval->id << 8), | 464 | validx, idx, buf, val_len) >= 0) { |
448 | buf, val_len) >= 0) { | 465 | err = 0; |
449 | snd_usb_autosuspend(chip); | 466 | goto out; |
450 | return 0; | ||
451 | } | 467 | } |
452 | snd_usb_autosuspend(chip); | 468 | } |
453 | snd_printdd(KERN_ERR "cannot set ctl value: req = %#x, wValue = %#x, wIndex = %#x, type = %d, data = %#x/%#x\n", | 469 | snd_printdd(KERN_ERR "cannot set ctl value: req = %#x, wValue = %#x, wIndex = %#x, type = %d, data = %#x/%#x\n", |
454 | request, validx, snd_usb_ctrl_intf(chip) | (cval->id << 8), cval->val_type, buf[0], buf[1]); | 470 | request, validx, idx, cval->val_type, buf[0], buf[1]); |
455 | return -EINVAL; | 471 | err = -EINVAL; |
472 | |||
473 | out: | ||
474 | up_read(&chip->shutdown_rwsem); | ||
475 | snd_usb_autosuspend(chip); | ||
476 | return err; | ||
456 | } | 477 | } |
457 | 478 | ||
458 | static int set_cur_ctl_value(struct usb_mixer_elem_info *cval, int validx, int value) | 479 | static int set_cur_ctl_value(struct usb_mixer_elem_info *cval, int validx, int value) |
diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 690000db0ec0..ae2b71435220 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c | |||
@@ -283,6 +283,11 @@ static int snd_audigy2nx_led_put(struct snd_kcontrol *kcontrol, struct snd_ctl_e | |||
283 | if (value > 1) | 283 | if (value > 1) |
284 | return -EINVAL; | 284 | return -EINVAL; |
285 | changed = value != mixer->audigy2nx_leds[index]; | 285 | changed = value != mixer->audigy2nx_leds[index]; |
286 | down_read(&mixer->chip->shutdown_rwsem); | ||
287 | if (mixer->chip->shutdown) { | ||
288 | err = -ENODEV; | ||
289 | goto out; | ||
290 | } | ||
286 | if (mixer->chip->usb_id == USB_ID(0x041e, 0x3042)) | 291 | if (mixer->chip->usb_id == USB_ID(0x041e, 0x3042)) |
287 | err = snd_usb_ctl_msg(mixer->chip->dev, | 292 | err = snd_usb_ctl_msg(mixer->chip->dev, |
288 | usb_sndctrlpipe(mixer->chip->dev, 0), 0x24, | 293 | usb_sndctrlpipe(mixer->chip->dev, 0), 0x24, |
@@ -299,6 +304,8 @@ static int snd_audigy2nx_led_put(struct snd_kcontrol *kcontrol, struct snd_ctl_e | |||
299 | usb_sndctrlpipe(mixer->chip->dev, 0), 0x24, | 304 | usb_sndctrlpipe(mixer->chip->dev, 0), 0x24, |
300 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_OTHER, | 305 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_OTHER, |
301 | value, index + 2, NULL, 0); | 306 | value, index + 2, NULL, 0); |
307 | out: | ||
308 | up_read(&mixer->chip->shutdown_rwsem); | ||
302 | if (err < 0) | 309 | if (err < 0) |
303 | return err; | 310 | return err; |
304 | mixer->audigy2nx_leds[index] = value; | 311 | mixer->audigy2nx_leds[index] = value; |
@@ -392,11 +399,16 @@ static void snd_audigy2nx_proc_read(struct snd_info_entry *entry, | |||
392 | 399 | ||
393 | for (i = 0; jacks[i].name; ++i) { | 400 | for (i = 0; jacks[i].name; ++i) { |
394 | snd_iprintf(buffer, "%s: ", jacks[i].name); | 401 | snd_iprintf(buffer, "%s: ", jacks[i].name); |
395 | err = snd_usb_ctl_msg(mixer->chip->dev, | 402 | down_read(&mixer->chip->shutdown_rwsem); |
403 | if (mixer->chip->shutdown) | ||
404 | err = 0; | ||
405 | else | ||
406 | err = snd_usb_ctl_msg(mixer->chip->dev, | ||
396 | usb_rcvctrlpipe(mixer->chip->dev, 0), | 407 | usb_rcvctrlpipe(mixer->chip->dev, 0), |
397 | UAC_GET_MEM, USB_DIR_IN | USB_TYPE_CLASS | | 408 | UAC_GET_MEM, USB_DIR_IN | USB_TYPE_CLASS | |
398 | USB_RECIP_INTERFACE, 0, | 409 | USB_RECIP_INTERFACE, 0, |
399 | jacks[i].unitid << 8, buf, 3); | 410 | jacks[i].unitid << 8, buf, 3); |
411 | up_read(&mixer->chip->shutdown_rwsem); | ||
400 | if (err == 3 && (buf[0] == 3 || buf[0] == 6)) | 412 | if (err == 3 && (buf[0] == 3 || buf[0] == 6)) |
401 | snd_iprintf(buffer, "%02x %02x\n", buf[1], buf[2]); | 413 | snd_iprintf(buffer, "%02x %02x\n", buf[1], buf[2]); |
402 | else | 414 | else |
@@ -426,10 +438,15 @@ static int snd_xonar_u1_switch_put(struct snd_kcontrol *kcontrol, | |||
426 | else | 438 | else |
427 | new_status = old_status & ~0x02; | 439 | new_status = old_status & ~0x02; |
428 | changed = new_status != old_status; | 440 | changed = new_status != old_status; |
429 | err = snd_usb_ctl_msg(mixer->chip->dev, | 441 | down_read(&mixer->chip->shutdown_rwsem); |
442 | if (mixer->chip->shutdown) | ||
443 | err = -ENODEV; | ||
444 | else | ||
445 | err = snd_usb_ctl_msg(mixer->chip->dev, | ||
430 | usb_sndctrlpipe(mixer->chip->dev, 0), 0x08, | 446 | usb_sndctrlpipe(mixer->chip->dev, 0), 0x08, |
431 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_OTHER, | 447 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_OTHER, |
432 | 50, 0, &new_status, 1); | 448 | 50, 0, &new_status, 1); |
449 | up_read(&mixer->chip->shutdown_rwsem); | ||
433 | if (err < 0) | 450 | if (err < 0) |
434 | return err; | 451 | return err; |
435 | mixer->xonar_u1_status = new_status; | 452 | mixer->xonar_u1_status = new_status; |
@@ -468,11 +485,17 @@ static int snd_nativeinstruments_control_get(struct snd_kcontrol *kcontrol, | |||
468 | u8 bRequest = (kcontrol->private_value >> 16) & 0xff; | 485 | u8 bRequest = (kcontrol->private_value >> 16) & 0xff; |
469 | u16 wIndex = kcontrol->private_value & 0xffff; | 486 | u16 wIndex = kcontrol->private_value & 0xffff; |
470 | u8 tmp; | 487 | u8 tmp; |
488 | int ret; | ||
471 | 489 | ||
472 | int ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), bRequest, | 490 | down_read(&mixer->chip->shutdown_rwsem); |
491 | if (mixer->chip->shutdown) | ||
492 | ret = -ENODEV; | ||
493 | else | ||
494 | ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), bRequest, | ||
473 | USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN, | 495 | USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN, |
474 | 0, cpu_to_le16(wIndex), | 496 | 0, cpu_to_le16(wIndex), |
475 | &tmp, sizeof(tmp), 1000); | 497 | &tmp, sizeof(tmp), 1000); |
498 | up_read(&mixer->chip->shutdown_rwsem); | ||
476 | 499 | ||
477 | if (ret < 0) { | 500 | if (ret < 0) { |
478 | snd_printk(KERN_ERR | 501 | snd_printk(KERN_ERR |
@@ -493,11 +516,17 @@ static int snd_nativeinstruments_control_put(struct snd_kcontrol *kcontrol, | |||
493 | u8 bRequest = (kcontrol->private_value >> 16) & 0xff; | 516 | u8 bRequest = (kcontrol->private_value >> 16) & 0xff; |
494 | u16 wIndex = kcontrol->private_value & 0xffff; | 517 | u16 wIndex = kcontrol->private_value & 0xffff; |
495 | u16 wValue = ucontrol->value.integer.value[0]; | 518 | u16 wValue = ucontrol->value.integer.value[0]; |
519 | int ret; | ||
496 | 520 | ||
497 | int ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), bRequest, | 521 | down_read(&mixer->chip->shutdown_rwsem); |
522 | if (mixer->chip->shutdown) | ||
523 | ret = -ENODEV; | ||
524 | else | ||
525 | ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), bRequest, | ||
498 | USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT, | 526 | USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT, |
499 | cpu_to_le16(wValue), cpu_to_le16(wIndex), | 527 | cpu_to_le16(wValue), cpu_to_le16(wIndex), |
500 | NULL, 0, 1000); | 528 | NULL, 0, 1000); |
529 | up_read(&mixer->chip->shutdown_rwsem); | ||
501 | 530 | ||
502 | if (ret < 0) { | 531 | if (ret < 0) { |
503 | snd_printk(KERN_ERR | 532 | snd_printk(KERN_ERR |
@@ -656,11 +685,16 @@ static int snd_ftu_eff_switch_get(struct snd_kcontrol *kctl, | |||
656 | return -EINVAL; | 685 | return -EINVAL; |
657 | 686 | ||
658 | 687 | ||
659 | err = snd_usb_ctl_msg(chip->dev, | 688 | down_read(&mixer->chip->shutdown_rwsem); |
689 | if (mixer->chip->shutdown) | ||
690 | err = -ENODEV; | ||
691 | else | ||
692 | err = snd_usb_ctl_msg(chip->dev, | ||
660 | usb_rcvctrlpipe(chip->dev, 0), UAC_GET_CUR, | 693 | usb_rcvctrlpipe(chip->dev, 0), UAC_GET_CUR, |
661 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_IN, | 694 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_IN, |
662 | validx << 8, snd_usb_ctrl_intf(chip) | (id << 8), | 695 | validx << 8, snd_usb_ctrl_intf(chip) | (id << 8), |
663 | value, val_len); | 696 | value, val_len); |
697 | up_read(&mixer->chip->shutdown_rwsem); | ||
664 | if (err < 0) | 698 | if (err < 0) |
665 | return err; | 699 | return err; |
666 | 700 | ||
@@ -703,11 +737,16 @@ static int snd_ftu_eff_switch_put(struct snd_kcontrol *kctl, | |||
703 | 737 | ||
704 | if (!pval->is_cached) { | 738 | if (!pval->is_cached) { |
705 | /* Read current value */ | 739 | /* Read current value */ |
706 | err = snd_usb_ctl_msg(chip->dev, | 740 | down_read(&mixer->chip->shutdown_rwsem); |
741 | if (mixer->chip->shutdown) | ||
742 | err = -ENODEV; | ||
743 | else | ||
744 | err = snd_usb_ctl_msg(chip->dev, | ||
707 | usb_rcvctrlpipe(chip->dev, 0), UAC_GET_CUR, | 745 | usb_rcvctrlpipe(chip->dev, 0), UAC_GET_CUR, |
708 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_IN, | 746 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_IN, |
709 | validx << 8, snd_usb_ctrl_intf(chip) | (id << 8), | 747 | validx << 8, snd_usb_ctrl_intf(chip) | (id << 8), |
710 | value, val_len); | 748 | value, val_len); |
749 | up_read(&mixer->chip->shutdown_rwsem); | ||
711 | if (err < 0) | 750 | if (err < 0) |
712 | return err; | 751 | return err; |
713 | 752 | ||
@@ -719,11 +758,16 @@ static int snd_ftu_eff_switch_put(struct snd_kcontrol *kctl, | |||
719 | if (cur_val != new_val) { | 758 | if (cur_val != new_val) { |
720 | value[0] = new_val; | 759 | value[0] = new_val; |
721 | value[1] = 0; | 760 | value[1] = 0; |
722 | err = snd_usb_ctl_msg(chip->dev, | 761 | down_read(&mixer->chip->shutdown_rwsem); |
762 | if (mixer->chip->shutdown) | ||
763 | err = -ENODEV; | ||
764 | else | ||
765 | err = snd_usb_ctl_msg(chip->dev, | ||
723 | usb_sndctrlpipe(chip->dev, 0), UAC_SET_CUR, | 766 | usb_sndctrlpipe(chip->dev, 0), UAC_SET_CUR, |
724 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_OUT, | 767 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_OUT, |
725 | validx << 8, snd_usb_ctrl_intf(chip) | (id << 8), | 768 | validx << 8, snd_usb_ctrl_intf(chip) | (id << 8), |
726 | value, val_len); | 769 | value, val_len); |
770 | up_read(&mixer->chip->shutdown_rwsem); | ||
727 | if (err < 0) | 771 | if (err < 0) |
728 | return err; | 772 | return err; |
729 | 773 | ||
diff --git a/sound/usb/pcm.c b/sound/usb/pcm.c index 55e19e1b80ec..5c12a3fe8c3e 100644 --- a/sound/usb/pcm.c +++ b/sound/usb/pcm.c | |||
@@ -71,6 +71,8 @@ static snd_pcm_uframes_t snd_usb_pcm_pointer(struct snd_pcm_substream *substream | |||
71 | unsigned int hwptr_done; | 71 | unsigned int hwptr_done; |
72 | 72 | ||
73 | subs = (struct snd_usb_substream *)substream->runtime->private_data; | 73 | subs = (struct snd_usb_substream *)substream->runtime->private_data; |
74 | if (subs->stream->chip->shutdown) | ||
75 | return SNDRV_PCM_POS_XRUN; | ||
74 | spin_lock(&subs->lock); | 76 | spin_lock(&subs->lock); |
75 | hwptr_done = subs->hwptr_done; | 77 | hwptr_done = subs->hwptr_done; |
76 | substream->runtime->delay = snd_usb_pcm_delay(subs, | 78 | substream->runtime->delay = snd_usb_pcm_delay(subs, |
@@ -444,7 +446,6 @@ static int configure_endpoint(struct snd_usb_substream *subs) | |||
444 | { | 446 | { |
445 | int ret; | 447 | int ret; |
446 | 448 | ||
447 | mutex_lock(&subs->stream->chip->shutdown_mutex); | ||
448 | /* format changed */ | 449 | /* format changed */ |
449 | stop_endpoints(subs, 0, 0, 0); | 450 | stop_endpoints(subs, 0, 0, 0); |
450 | ret = snd_usb_endpoint_set_params(subs->data_endpoint, | 451 | ret = snd_usb_endpoint_set_params(subs->data_endpoint, |
@@ -455,7 +456,7 @@ static int configure_endpoint(struct snd_usb_substream *subs) | |||
455 | subs->cur_audiofmt, | 456 | subs->cur_audiofmt, |
456 | subs->sync_endpoint); | 457 | subs->sync_endpoint); |
457 | if (ret < 0) | 458 | if (ret < 0) |
458 | goto unlock; | 459 | return ret; |
459 | 460 | ||
460 | if (subs->sync_endpoint) | 461 | if (subs->sync_endpoint) |
461 | ret = snd_usb_endpoint_set_params(subs->data_endpoint, | 462 | ret = snd_usb_endpoint_set_params(subs->data_endpoint, |
@@ -465,9 +466,6 @@ static int configure_endpoint(struct snd_usb_substream *subs) | |||
465 | subs->cur_rate, | 466 | subs->cur_rate, |
466 | subs->cur_audiofmt, | 467 | subs->cur_audiofmt, |
467 | NULL); | 468 | NULL); |
468 | |||
469 | unlock: | ||
470 | mutex_unlock(&subs->stream->chip->shutdown_mutex); | ||
471 | return ret; | 469 | return ret; |
472 | } | 470 | } |
473 | 471 | ||
@@ -505,7 +503,13 @@ static int snd_usb_hw_params(struct snd_pcm_substream *substream, | |||
505 | return -EINVAL; | 503 | return -EINVAL; |
506 | } | 504 | } |
507 | 505 | ||
508 | if ((ret = set_format(subs, fmt)) < 0) | 506 | down_read(&subs->stream->chip->shutdown_rwsem); |
507 | if (subs->stream->chip->shutdown) | ||
508 | ret = -ENODEV; | ||
509 | else | ||
510 | ret = set_format(subs, fmt); | ||
511 | up_read(&subs->stream->chip->shutdown_rwsem); | ||
512 | if (ret < 0) | ||
509 | return ret; | 513 | return ret; |
510 | 514 | ||
511 | subs->interface = fmt->iface; | 515 | subs->interface = fmt->iface; |
@@ -527,10 +531,12 @@ static int snd_usb_hw_free(struct snd_pcm_substream *substream) | |||
527 | subs->cur_audiofmt = NULL; | 531 | subs->cur_audiofmt = NULL; |
528 | subs->cur_rate = 0; | 532 | subs->cur_rate = 0; |
529 | subs->period_bytes = 0; | 533 | subs->period_bytes = 0; |
530 | mutex_lock(&subs->stream->chip->shutdown_mutex); | 534 | down_read(&subs->stream->chip->shutdown_rwsem); |
531 | stop_endpoints(subs, 0, 1, 1); | 535 | if (!subs->stream->chip->shutdown) { |
532 | deactivate_endpoints(subs); | 536 | stop_endpoints(subs, 0, 1, 1); |
533 | mutex_unlock(&subs->stream->chip->shutdown_mutex); | 537 | deactivate_endpoints(subs); |
538 | } | ||
539 | up_read(&subs->stream->chip->shutdown_rwsem); | ||
534 | return snd_pcm_lib_free_vmalloc_buffer(substream); | 540 | return snd_pcm_lib_free_vmalloc_buffer(substream); |
535 | } | 541 | } |
536 | 542 | ||
@@ -552,12 +558,22 @@ static int snd_usb_pcm_prepare(struct snd_pcm_substream *substream) | |||
552 | return -ENXIO; | 558 | return -ENXIO; |
553 | } | 559 | } |
554 | 560 | ||
555 | if (snd_BUG_ON(!subs->data_endpoint)) | 561 | down_read(&subs->stream->chip->shutdown_rwsem); |
556 | return -EIO; | 562 | if (subs->stream->chip->shutdown) { |
563 | ret = -ENODEV; | ||
564 | goto unlock; | ||
565 | } | ||
566 | if (snd_BUG_ON(!subs->data_endpoint)) { | ||
567 | ret = -EIO; | ||
568 | goto unlock; | ||
569 | } | ||
570 | |||
571 | snd_usb_endpoint_sync_pending_stop(subs->sync_endpoint); | ||
572 | snd_usb_endpoint_sync_pending_stop(subs->data_endpoint); | ||
557 | 573 | ||
558 | ret = set_format(subs, subs->cur_audiofmt); | 574 | ret = set_format(subs, subs->cur_audiofmt); |
559 | if (ret < 0) | 575 | if (ret < 0) |
560 | return ret; | 576 | goto unlock; |
561 | 577 | ||
562 | iface = usb_ifnum_to_if(subs->dev, subs->cur_audiofmt->iface); | 578 | iface = usb_ifnum_to_if(subs->dev, subs->cur_audiofmt->iface); |
563 | alts = &iface->altsetting[subs->cur_audiofmt->altset_idx]; | 579 | alts = &iface->altsetting[subs->cur_audiofmt->altset_idx]; |
@@ -567,12 +583,12 @@ static int snd_usb_pcm_prepare(struct snd_pcm_substream *substream) | |||
567 | subs->cur_audiofmt, | 583 | subs->cur_audiofmt, |
568 | subs->cur_rate); | 584 | subs->cur_rate); |
569 | if (ret < 0) | 585 | if (ret < 0) |
570 | return ret; | 586 | goto unlock; |
571 | 587 | ||
572 | if (subs->need_setup_ep) { | 588 | if (subs->need_setup_ep) { |
573 | ret = configure_endpoint(subs); | 589 | ret = configure_endpoint(subs); |
574 | if (ret < 0) | 590 | if (ret < 0) |
575 | return ret; | 591 | goto unlock; |
576 | subs->need_setup_ep = false; | 592 | subs->need_setup_ep = false; |
577 | } | 593 | } |
578 | 594 | ||
@@ -592,9 +608,11 @@ static int snd_usb_pcm_prepare(struct snd_pcm_substream *substream) | |||
592 | /* for playback, submit the URBs now; otherwise, the first hwptr_done | 608 | /* for playback, submit the URBs now; otherwise, the first hwptr_done |
593 | * updates for all URBs would happen at the same time when starting */ | 609 | * updates for all URBs would happen at the same time when starting */ |
594 | if (subs->direction == SNDRV_PCM_STREAM_PLAYBACK) | 610 | if (subs->direction == SNDRV_PCM_STREAM_PLAYBACK) |
595 | return start_endpoints(subs, 1); | 611 | ret = start_endpoints(subs, 1); |
596 | 612 | ||
597 | return 0; | 613 | unlock: |
614 | up_read(&subs->stream->chip->shutdown_rwsem); | ||
615 | return ret; | ||
598 | } | 616 | } |
599 | 617 | ||
600 | static struct snd_pcm_hardware snd_usb_hardware = | 618 | static struct snd_pcm_hardware snd_usb_hardware = |
@@ -647,7 +665,7 @@ static int hw_check_valid_format(struct snd_usb_substream *subs, | |||
647 | return 0; | 665 | return 0; |
648 | } | 666 | } |
649 | /* check whether the period time is >= the data packet interval */ | 667 | /* check whether the period time is >= the data packet interval */ |
650 | if (snd_usb_get_speed(subs->dev) != USB_SPEED_FULL) { | 668 | if (subs->speed != USB_SPEED_FULL) { |
651 | ptime = 125 * (1 << fp->datainterval); | 669 | ptime = 125 * (1 << fp->datainterval); |
652 | if (ptime > pt->max || (ptime == pt->max && pt->openmax)) { | 670 | if (ptime > pt->max || (ptime == pt->max && pt->openmax)) { |
653 | hwc_debug(" > check: ptime %u > max %u\n", ptime, pt->max); | 671 | hwc_debug(" > check: ptime %u > max %u\n", ptime, pt->max); |
@@ -925,7 +943,7 @@ static int setup_hw_info(struct snd_pcm_runtime *runtime, struct snd_usb_substre | |||
925 | return err; | 943 | return err; |
926 | 944 | ||
927 | param_period_time_if_needed = SNDRV_PCM_HW_PARAM_PERIOD_TIME; | 945 | param_period_time_if_needed = SNDRV_PCM_HW_PARAM_PERIOD_TIME; |
928 | if (snd_usb_get_speed(subs->dev) == USB_SPEED_FULL) | 946 | if (subs->speed == USB_SPEED_FULL) |
929 | /* full speed devices have fixed data packet interval */ | 947 | /* full speed devices have fixed data packet interval */ |
930 | ptmin = 1000; | 948 | ptmin = 1000; |
931 | if (ptmin == 1000) | 949 | if (ptmin == 1000) |
diff --git a/sound/usb/proc.c b/sound/usb/proc.c index ebc1a5b5b3f1..d218f763501f 100644 --- a/sound/usb/proc.c +++ b/sound/usb/proc.c | |||
@@ -108,7 +108,7 @@ static void proc_dump_substream_formats(struct snd_usb_substream *subs, struct s | |||
108 | } | 108 | } |
109 | snd_iprintf(buffer, "\n"); | 109 | snd_iprintf(buffer, "\n"); |
110 | } | 110 | } |
111 | if (snd_usb_get_speed(subs->dev) != USB_SPEED_FULL) | 111 | if (subs->speed != USB_SPEED_FULL) |
112 | snd_iprintf(buffer, " Data packet interval: %d us\n", | 112 | snd_iprintf(buffer, " Data packet interval: %d us\n", |
113 | 125 * (1 << fp->datainterval)); | 113 | 125 * (1 << fp->datainterval)); |
114 | // snd_iprintf(buffer, " Max Packet Size = %d\n", fp->maxpacksize); | 114 | // snd_iprintf(buffer, " Max Packet Size = %d\n", fp->maxpacksize); |
@@ -124,7 +124,7 @@ static void proc_dump_ep_status(struct snd_usb_substream *subs, | |||
124 | return; | 124 | return; |
125 | snd_iprintf(buffer, " Packet Size = %d\n", ep->curpacksize); | 125 | snd_iprintf(buffer, " Packet Size = %d\n", ep->curpacksize); |
126 | snd_iprintf(buffer, " Momentary freq = %u Hz (%#x.%04x)\n", | 126 | snd_iprintf(buffer, " Momentary freq = %u Hz (%#x.%04x)\n", |
127 | snd_usb_get_speed(subs->dev) == USB_SPEED_FULL | 127 | subs->speed == USB_SPEED_FULL |
128 | ? get_full_speed_hz(ep->freqm) | 128 | ? get_full_speed_hz(ep->freqm) |
129 | : get_high_speed_hz(ep->freqm), | 129 | : get_high_speed_hz(ep->freqm), |
130 | ep->freqm >> 16, ep->freqm & 0xffff); | 130 | ep->freqm >> 16, ep->freqm & 0xffff); |
diff --git a/sound/usb/stream.c b/sound/usb/stream.c index 083ed81160e5..1de0c8c002a8 100644 --- a/sound/usb/stream.c +++ b/sound/usb/stream.c | |||
@@ -90,6 +90,7 @@ static void snd_usb_init_substream(struct snd_usb_stream *as, | |||
90 | subs->direction = stream; | 90 | subs->direction = stream; |
91 | subs->dev = as->chip->dev; | 91 | subs->dev = as->chip->dev; |
92 | subs->txfr_quirk = as->chip->txfr_quirk; | 92 | subs->txfr_quirk = as->chip->txfr_quirk; |
93 | subs->speed = snd_usb_get_speed(subs->dev); | ||
93 | 94 | ||
94 | snd_usb_set_pcm_ops(as->pcm, stream); | 95 | snd_usb_set_pcm_ops(as->pcm, stream); |
95 | 96 | ||
diff --git a/sound/usb/usbaudio.h b/sound/usb/usbaudio.h index b8233ebe250f..ef42797f56fb 100644 --- a/sound/usb/usbaudio.h +++ b/sound/usb/usbaudio.h | |||
@@ -37,7 +37,7 @@ struct snd_usb_audio { | |||
37 | struct usb_interface *pm_intf; | 37 | struct usb_interface *pm_intf; |
38 | u32 usb_id; | 38 | u32 usb_id; |
39 | struct mutex mutex; | 39 | struct mutex mutex; |
40 | struct mutex shutdown_mutex; | 40 | struct rw_semaphore shutdown_rwsem; |
41 | unsigned int shutdown:1; | 41 | unsigned int shutdown:1; |
42 | unsigned int probing:1; | 42 | unsigned int probing:1; |
43 | unsigned int autosuspended:1; | 43 | unsigned int autosuspended:1; |
diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile index 43480149119e..85baf11e2acd 100644 --- a/tools/testing/selftests/Makefile +++ b/tools/testing/selftests/Makefile | |||
@@ -1,4 +1,4 @@ | |||
1 | TARGETS = breakpoints kcmp mqueue vm cpu-hotplug memory-hotplug epoll | 1 | TARGETS = breakpoints kcmp mqueue vm cpu-hotplug memory-hotplug |
2 | 2 | ||
3 | all: | 3 | all: |
4 | for TARGET in $(TARGETS); do \ | 4 | for TARGET in $(TARGETS); do \ |
diff --git a/tools/testing/selftests/epoll/Makefile b/tools/testing/selftests/epoll/Makefile deleted file mode 100644 index 19806ed62f50..000000000000 --- a/tools/testing/selftests/epoll/Makefile +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | # Makefile for epoll selftests | ||
2 | |||
3 | all: test_epoll | ||
4 | %: %.c | ||
5 | gcc -pthread -g -o $@ $^ | ||
6 | |||
7 | run_tests: all | ||
8 | ./test_epoll | ||
9 | |||
10 | clean: | ||
11 | $(RM) test_epoll | ||
diff --git a/tools/testing/selftests/epoll/test_epoll.c b/tools/testing/selftests/epoll/test_epoll.c deleted file mode 100644 index f7525392ce84..000000000000 --- a/tools/testing/selftests/epoll/test_epoll.c +++ /dev/null | |||
@@ -1,344 +0,0 @@ | |||
1 | /* | ||
2 | * tools/testing/selftests/epoll/test_epoll.c | ||
3 | * | ||
4 | * Copyright 2012 Adobe Systems Incorporated | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * Paton J. Lewis <palewis@adobe.com> | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #include <errno.h> | ||
16 | #include <fcntl.h> | ||
17 | #include <pthread.h> | ||
18 | #include <stdio.h> | ||
19 | #include <stdlib.h> | ||
20 | #include <unistd.h> | ||
21 | #include <sys/epoll.h> | ||
22 | #include <sys/socket.h> | ||
23 | |||
24 | /* | ||
25 | * A pointer to an epoll_item_private structure will be stored in the epoll | ||
26 | * item's event structure so that we can get access to the epoll_item_private | ||
27 | * data after calling epoll_wait: | ||
28 | */ | ||
29 | struct epoll_item_private { | ||
30 | int index; /* Position of this struct within the epoll_items array. */ | ||
31 | int fd; | ||
32 | uint32_t events; | ||
33 | pthread_mutex_t mutex; /* Guards the following variables... */ | ||
34 | int stop; | ||
35 | int status; /* Stores any error encountered while handling item. */ | ||
36 | /* The following variable allows us to test whether we have encountered | ||
37 | a problem while attempting to cancel and delete the associated | ||
38 | event. When the test program exits, 'deleted' should be exactly | ||
39 | one. If it is greater than one, then the failed test reflects a real | ||
40 | world situation where we would have tried to access the epoll item's | ||
41 | private data after deleting it: */ | ||
42 | int deleted; | ||
43 | }; | ||
44 | |||
45 | struct epoll_item_private *epoll_items; | ||
46 | |||
47 | /* | ||
48 | * Delete the specified item from the epoll set. In a real-world secneario this | ||
49 | * is where we would free the associated data structure, but in this testing | ||
50 | * environment we retain the structure so that we can test for double-deletion: | ||
51 | */ | ||
52 | void delete_item(int index) | ||
53 | { | ||
54 | __sync_fetch_and_add(&epoll_items[index].deleted, 1); | ||
55 | } | ||
56 | |||
57 | /* | ||
58 | * A pointer to a read_thread_data structure will be passed as the argument to | ||
59 | * each read thread: | ||
60 | */ | ||
61 | struct read_thread_data { | ||
62 | int stop; | ||
63 | int status; /* Indicates any error encountered by the read thread. */ | ||
64 | int epoll_set; | ||
65 | }; | ||
66 | |||
67 | /* | ||
68 | * The function executed by the read threads: | ||
69 | */ | ||
70 | void *read_thread_function(void *function_data) | ||
71 | { | ||
72 | struct read_thread_data *thread_data = | ||
73 | (struct read_thread_data *)function_data; | ||
74 | struct epoll_event event_data; | ||
75 | struct epoll_item_private *item_data; | ||
76 | char socket_data; | ||
77 | |||
78 | /* Handle events until we encounter an error or this thread's 'stop' | ||
79 | condition is set: */ | ||
80 | while (1) { | ||
81 | int result = epoll_wait(thread_data->epoll_set, | ||
82 | &event_data, | ||
83 | 1, /* Number of desired events */ | ||
84 | 1000); /* Timeout in ms */ | ||
85 | if (result < 0) { | ||
86 | /* Breakpoints signal all threads. Ignore that while | ||
87 | debugging: */ | ||
88 | if (errno == EINTR) | ||
89 | continue; | ||
90 | thread_data->status = errno; | ||
91 | return 0; | ||
92 | } else if (thread_data->stop) | ||
93 | return 0; | ||
94 | else if (result == 0) /* Timeout */ | ||
95 | continue; | ||
96 | |||
97 | /* We need the mutex here because checking for the stop | ||
98 | condition and re-enabling the epoll item need to be done | ||
99 | together as one atomic operation when EPOLL_CTL_DISABLE is | ||
100 | available: */ | ||
101 | item_data = (struct epoll_item_private *)event_data.data.ptr; | ||
102 | pthread_mutex_lock(&item_data->mutex); | ||
103 | |||
104 | /* Remove the item from the epoll set if we want to stop | ||
105 | handling that event: */ | ||
106 | if (item_data->stop) | ||
107 | delete_item(item_data->index); | ||
108 | else { | ||
109 | /* Clear the data that was written to the other end of | ||
110 | our non-blocking socket: */ | ||
111 | do { | ||
112 | if (read(item_data->fd, &socket_data, 1) < 1) { | ||
113 | if ((errno == EAGAIN) || | ||
114 | (errno == EWOULDBLOCK)) | ||
115 | break; | ||
116 | else | ||
117 | goto error_unlock; | ||
118 | } | ||
119 | } while (item_data->events & EPOLLET); | ||
120 | |||
121 | /* The item was one-shot, so re-enable it: */ | ||
122 | event_data.events = item_data->events; | ||
123 | if (epoll_ctl(thread_data->epoll_set, | ||
124 | EPOLL_CTL_MOD, | ||
125 | item_data->fd, | ||
126 | &event_data) < 0) | ||
127 | goto error_unlock; | ||
128 | } | ||
129 | |||
130 | pthread_mutex_unlock(&item_data->mutex); | ||
131 | } | ||
132 | |||
133 | error_unlock: | ||
134 | thread_data->status = item_data->status = errno; | ||
135 | pthread_mutex_unlock(&item_data->mutex); | ||
136 | return 0; | ||
137 | } | ||
138 | |||
139 | /* | ||
140 | * A pointer to a write_thread_data structure will be passed as the argument to | ||
141 | * the write thread: | ||
142 | */ | ||
143 | struct write_thread_data { | ||
144 | int stop; | ||
145 | int status; /* Indicates any error encountered by the write thread. */ | ||
146 | int n_fds; | ||
147 | int *fds; | ||
148 | }; | ||
149 | |||
150 | /* | ||
151 | * The function executed by the write thread. It writes a single byte to each | ||
152 | * socket in turn until the stop condition for this thread is set. If writing to | ||
153 | * a socket would block (i.e. errno was EAGAIN), we leave that socket alone for | ||
154 | * the moment and just move on to the next socket in the list. We don't care | ||
155 | * about the order in which we deliver events to the epoll set. In fact we don't | ||
156 | * care about the data we're writing to the pipes at all; we just want to | ||
157 | * trigger epoll events: | ||
158 | */ | ||
159 | void *write_thread_function(void *function_data) | ||
160 | { | ||
161 | const char data = 'X'; | ||
162 | int index; | ||
163 | struct write_thread_data *thread_data = | ||
164 | (struct write_thread_data *)function_data; | ||
165 | while (!thread_data->stop) | ||
166 | for (index = 0; | ||
167 | !thread_data->stop && (index < thread_data->n_fds); | ||
168 | ++index) | ||
169 | if ((write(thread_data->fds[index], &data, 1) < 1) && | ||
170 | (errno != EAGAIN) && | ||
171 | (errno != EWOULDBLOCK)) { | ||
172 | thread_data->status = errno; | ||
173 | return; | ||
174 | } | ||
175 | } | ||
176 | |||
177 | /* | ||
178 | * Arguments are currently ignored: | ||
179 | */ | ||
180 | int main(int argc, char **argv) | ||
181 | { | ||
182 | const int n_read_threads = 100; | ||
183 | const int n_epoll_items = 500; | ||
184 | int index; | ||
185 | int epoll_set = epoll_create1(0); | ||
186 | struct write_thread_data write_thread_data = { | ||
187 | 0, 0, n_epoll_items, malloc(n_epoll_items * sizeof(int)) | ||
188 | }; | ||
189 | struct read_thread_data *read_thread_data = | ||
190 | malloc(n_read_threads * sizeof(struct read_thread_data)); | ||
191 | pthread_t *read_threads = malloc(n_read_threads * sizeof(pthread_t)); | ||
192 | pthread_t write_thread; | ||
193 | |||
194 | printf("-----------------\n"); | ||
195 | printf("Runing test_epoll\n"); | ||
196 | printf("-----------------\n"); | ||
197 | |||
198 | epoll_items = malloc(n_epoll_items * sizeof(struct epoll_item_private)); | ||
199 | |||
200 | if (epoll_set < 0 || epoll_items == 0 || write_thread_data.fds == 0 || | ||
201 | read_thread_data == 0 || read_threads == 0) | ||
202 | goto error; | ||
203 | |||
204 | if (sysconf(_SC_NPROCESSORS_ONLN) < 2) { | ||
205 | printf("Error: please run this test on a multi-core system.\n"); | ||
206 | goto error; | ||
207 | } | ||
208 | |||
209 | /* Create the socket pairs and epoll items: */ | ||
210 | for (index = 0; index < n_epoll_items; ++index) { | ||
211 | int socket_pair[2]; | ||
212 | struct epoll_event event_data; | ||
213 | if (socketpair(AF_UNIX, | ||
214 | SOCK_STREAM | SOCK_NONBLOCK, | ||
215 | 0, | ||
216 | socket_pair) < 0) | ||
217 | goto error; | ||
218 | write_thread_data.fds[index] = socket_pair[0]; | ||
219 | epoll_items[index].index = index; | ||
220 | epoll_items[index].fd = socket_pair[1]; | ||
221 | if (pthread_mutex_init(&epoll_items[index].mutex, NULL) != 0) | ||
222 | goto error; | ||
223 | /* We always use EPOLLONESHOT because this test is currently | ||
224 | structured to demonstrate the need for EPOLL_CTL_DISABLE, | ||
225 | which only produces useful information in the EPOLLONESHOT | ||
226 | case (without EPOLLONESHOT, calling epoll_ctl with | ||
227 | EPOLL_CTL_DISABLE will never return EBUSY). If support for | ||
228 | testing events without EPOLLONESHOT is desired, it should | ||
229 | probably be implemented in a separate unit test. */ | ||
230 | epoll_items[index].events = EPOLLIN | EPOLLONESHOT; | ||
231 | if (index < n_epoll_items / 2) | ||
232 | epoll_items[index].events |= EPOLLET; | ||
233 | epoll_items[index].stop = 0; | ||
234 | epoll_items[index].status = 0; | ||
235 | epoll_items[index].deleted = 0; | ||
236 | event_data.events = epoll_items[index].events; | ||
237 | event_data.data.ptr = &epoll_items[index]; | ||
238 | if (epoll_ctl(epoll_set, | ||
239 | EPOLL_CTL_ADD, | ||
240 | epoll_items[index].fd, | ||
241 | &event_data) < 0) | ||
242 | goto error; | ||
243 | } | ||
244 | |||
245 | /* Create and start the read threads: */ | ||
246 | for (index = 0; index < n_read_threads; ++index) { | ||
247 | read_thread_data[index].stop = 0; | ||
248 | read_thread_data[index].status = 0; | ||
249 | read_thread_data[index].epoll_set = epoll_set; | ||
250 | if (pthread_create(&read_threads[index], | ||
251 | NULL, | ||
252 | read_thread_function, | ||
253 | &read_thread_data[index]) != 0) | ||
254 | goto error; | ||
255 | } | ||
256 | |||
257 | if (pthread_create(&write_thread, | ||
258 | NULL, | ||
259 | write_thread_function, | ||
260 | &write_thread_data) != 0) | ||
261 | goto error; | ||
262 | |||
263 | /* Cancel all event pollers: */ | ||
264 | #ifdef EPOLL_CTL_DISABLE | ||
265 | for (index = 0; index < n_epoll_items; ++index) { | ||
266 | pthread_mutex_lock(&epoll_items[index].mutex); | ||
267 | ++epoll_items[index].stop; | ||
268 | if (epoll_ctl(epoll_set, | ||
269 | EPOLL_CTL_DISABLE, | ||
270 | epoll_items[index].fd, | ||
271 | NULL) == 0) | ||
272 | delete_item(index); | ||
273 | else if (errno != EBUSY) { | ||
274 | pthread_mutex_unlock(&epoll_items[index].mutex); | ||
275 | goto error; | ||
276 | } | ||
277 | /* EBUSY means events were being handled; allow the other thread | ||
278 | to delete the item. */ | ||
279 | pthread_mutex_unlock(&epoll_items[index].mutex); | ||
280 | } | ||
281 | #else | ||
282 | for (index = 0; index < n_epoll_items; ++index) { | ||
283 | pthread_mutex_lock(&epoll_items[index].mutex); | ||
284 | ++epoll_items[index].stop; | ||
285 | pthread_mutex_unlock(&epoll_items[index].mutex); | ||
286 | /* Wait in case a thread running read_thread_function is | ||
287 | currently executing code between epoll_wait and | ||
288 | pthread_mutex_lock with this item. Note that a longer delay | ||
289 | would make double-deletion less likely (at the expense of | ||
290 | performance), but there is no guarantee that any delay would | ||
291 | ever be sufficient. Note also that we delete all event | ||
292 | pollers at once for testing purposes, but in a real-world | ||
293 | environment we are likely to want to be able to cancel event | ||
294 | pollers at arbitrary times. Therefore we can't improve this | ||
295 | situation by just splitting this loop into two loops | ||
296 | (i.e. signal 'stop' for all items, sleep, and then delete all | ||
297 | items). We also can't fix the problem via EPOLL_CTL_DEL | ||
298 | because that command can't prevent the case where some other | ||
299 | thread is executing read_thread_function within the region | ||
300 | mentioned above: */ | ||
301 | usleep(1); | ||
302 | pthread_mutex_lock(&epoll_items[index].mutex); | ||
303 | if (!epoll_items[index].deleted) | ||
304 | delete_item(index); | ||
305 | pthread_mutex_unlock(&epoll_items[index].mutex); | ||
306 | } | ||
307 | #endif | ||
308 | |||
309 | /* Shut down the read threads: */ | ||
310 | for (index = 0; index < n_read_threads; ++index) | ||
311 | __sync_fetch_and_add(&read_thread_data[index].stop, 1); | ||
312 | for (index = 0; index < n_read_threads; ++index) { | ||
313 | if (pthread_join(read_threads[index], NULL) != 0) | ||
314 | goto error; | ||
315 | if (read_thread_data[index].status) | ||
316 | goto error; | ||
317 | } | ||
318 | |||
319 | /* Shut down the write thread: */ | ||
320 | __sync_fetch_and_add(&write_thread_data.stop, 1); | ||
321 | if ((pthread_join(write_thread, NULL) != 0) || write_thread_data.status) | ||
322 | goto error; | ||
323 | |||
324 | /* Check for final error conditions: */ | ||
325 | for (index = 0; index < n_epoll_items; ++index) { | ||
326 | if (epoll_items[index].status != 0) | ||
327 | goto error; | ||
328 | if (pthread_mutex_destroy(&epoll_items[index].mutex) < 0) | ||
329 | goto error; | ||
330 | } | ||
331 | for (index = 0; index < n_epoll_items; ++index) | ||
332 | if (epoll_items[index].deleted != 1) { | ||
333 | printf("Error: item data deleted %1d times.\n", | ||
334 | epoll_items[index].deleted); | ||
335 | goto error; | ||
336 | } | ||
337 | |||
338 | printf("[PASS]\n"); | ||
339 | return 0; | ||
340 | |||
341 | error: | ||
342 | printf("[FAIL]\n"); | ||
343 | return errno; | ||
344 | } | ||