3 files changed, 88 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
new file mode 100644
index 000000000000..90fa7da525b8
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
@@ -0,0 +1,30 @@
+* NVIDIA Tegra APB DMA controller
+Required properties:
+- compatible: Should be "nvidia,<chip>-apbdma"
+- reg: Should contain DMA registers location and length. This shuld include
+  all of the per-channel registers.
+- interrupts: Should contain all of the per-channel DMA interrupts.
+Examples:
+apbdma: dma@6000a000 {
+        compatible = "nvidia,tegra20-apbdma";
+        reg = <0x6000a000 0x1200>;
+        interrupts = < 0 136 0x04
+                       0 137 0x04
+                       0 138 0x04
+                       0 139 0x04
+                       0 140 0x04
+                       0 141 0x04
+                       0 142 0x04
+                       0 143 0x04
+                       0 144 0x04
+                       0 145 0x04
+                       0 146 0x04
+                       0 147 0x04
+                       0 148 0x04
+                       0 149 0x04
+                       0 150 0x04
+                       0 151 0x04 >;
+};
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index c1622413490a..603dc2114ac6 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -12,6 +12,27 @@
                      < 0x50040100 0x0100 >;
        };
+        apbdma: dma@6000a000 {
+                compatible = "nvidia,tegra20-apbdma";
+                reg = <0x6000a000 0x1200>;
+                interrupts = < 0 104 0x04
+                               0 105 0x04
+                               0 106 0x04
+                               0 107 0x04
+                               0 108 0x04
+                               0 109 0x04
+                               0 110 0x04
+                               0 111 0x04
+                               0 112 0x04
+                               0 113 0x04
+                               0 114 0x04
+                               0 115 0x04
+                               0 116 0x04
+                               0 117 0x04
+                               0 118 0x04
+                               0 119 0x04 >;
+        };
        i2c@7000c000 {
                #address-cells = <1>;
                #size-cells = <0>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 2b3f6cd3c798..8a7e230832d7 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -12,6 +12,43 @@
                      < 0x50040100 0x0100 >;
        };
+        apbdma: dma@6000a000 {
+                compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
+                reg = <0x6000a000 0x1400>;
+                interrupts = < 0 104 0x04
+                               0 105 0x04
+                               0 106 0x04
+                               0 107 0x04
+                               0 108 0x04
+                               0 109 0x04
+                               0 110 0x04
+                               0 111 0x04
+                               0 112 0x04
+                               0 113 0x04
+                               0 114 0x04
+                               0 115 0x04
+                               0 116 0x04
+                               0 117 0x04
+                               0 118 0x04
+                               0 119 0x04
+                               0 128 0x04
+                               0 129 0x04
+                               0 130 0x04
+                               0 131 0x04
+                               0 132 0x04
+                               0 133 0x04
+                               0 134 0x04
+                               0 135 0x04
+                               0 136 0x04
+                               0 137 0x04
+                               0 138 0x04
+                               0 139 0x04
+                               0 140 0x04
+                               0 141 0x04
+                               0 142 0x04
+                               0 143 0x04 >;
+        };
        i2c@7000c000 {
                #address-cells = <1>;
                #size-cells = <0>;

diff --git a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt new file mode 100644 index 000000000000..90fa7da525b8 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
@@ -0,0 +1,30 @@
		1	* NVIDIA Tegra APB DMA controller
		2
		3	Required properties:
		4	- compatible: Should be "nvidia,<chip>-apbdma"
		5	- reg: Should contain DMA registers location and length. This shuld include
		6	all of the per-channel registers.
		7	- interrupts: Should contain all of the per-channel DMA interrupts.
		8
		9	Examples:
		10
		11	apbdma: dma@6000a000 {
		12	compatible = "nvidia,tegra20-apbdma";
		13	reg = <0x6000a000 0x1200>;
		14	interrupts = < 0 136 0x04
		15	0 137 0x04
		16	0 138 0x04
		17	0 139 0x04
		18	0 140 0x04
		19	0 141 0x04
		20	0 142 0x04
		21	0 143 0x04
		22	0 144 0x04
		23	0 145 0x04
		24	0 146 0x04
		25	0 147 0x04
		26	0 148 0x04
		27	0 149 0x04
		28	0 150 0x04
		29	0 151 0x04 >;
		30	};


diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index c1622413490a..603dc2114ac6 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -12,6 +12,27 @@
12	< 0x50040100 0x0100 >;	12	< 0x50040100 0x0100 >;
13	};	13	};
14		14
		15	apbdma: dma@6000a000 {
		16	compatible = "nvidia,tegra20-apbdma";
		17	reg = <0x6000a000 0x1200>;
		18	interrupts = < 0 104 0x04
		19	0 105 0x04
		20	0 106 0x04
		21	0 107 0x04
		22	0 108 0x04
		23	0 109 0x04
		24	0 110 0x04
		25	0 111 0x04
		26	0 112 0x04
		27	0 113 0x04
		28	0 114 0x04
		29	0 115 0x04
		30	0 116 0x04
		31	0 117 0x04
		32	0 118 0x04
		33	0 119 0x04 >;
		34	};
		35
15	i2c@7000c000 {	36	i2c@7000c000 {
16	#address-cells = <1>;	37	#address-cells = <1>;
17	#size-cells = <0>;	38	#size-cells = <0>;


diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 2b3f6cd3c798..8a7e230832d7 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -12,6 +12,43 @@
12	< 0x50040100 0x0100 >;	12	< 0x50040100 0x0100 >;
13	};	13	};
14		14
		15	apbdma: dma@6000a000 {
		16	compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
		17	reg = <0x6000a000 0x1400>;
		18	interrupts = < 0 104 0x04
		19	0 105 0x04
		20	0 106 0x04
		21	0 107 0x04
		22	0 108 0x04
		23	0 109 0x04
		24	0 110 0x04
		25	0 111 0x04
		26	0 112 0x04
		27	0 113 0x04
		28	0 114 0x04
		29	0 115 0x04
		30	0 116 0x04
		31	0 117 0x04
		32	0 118 0x04
		33	0 119 0x04
		34	0 128 0x04
		35	0 129 0x04
		36	0 130 0x04
		37	0 131 0x04
		38	0 132 0x04
		39	0 133 0x04
		40	0 134 0x04
		41	0 135 0x04
		42	0 136 0x04
		43	0 137 0x04
		44	0 138 0x04
		45	0 139 0x04
		46	0 140 0x04
		47	0 141 0x04
		48	0 142 0x04
		49	0 143 0x04 >;
		50	};
		51
15	i2c@7000c000 {	52	i2c@7000c000 {
16	#address-cells = <1>;	53	#address-cells = <1>;
17	#size-cells = <0>;	54	#size-cells = <0>;