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-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h10
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h21
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apbc.h10
-rw-r--r--arch/arm/mach-mmp/pxa168.c15
-rw-r--r--arch/arm/plat-pxa/include/plat/ssp.h1
-rw-r--r--arch/arm/plat-pxa/ssp.c1
6 files changed, 48 insertions, 10 deletions
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index 02701196ea03..b379cdec4d38 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -5,10 +5,10 @@
5 * Interrupt numbers for PXA168 5 * Interrupt numbers for PXA168
6 */ 6 */
7#define IRQ_PXA168_NONE (-1) 7#define IRQ_PXA168_NONE (-1)
8#define IRQ_PXA168_SSP3 0 8#define IRQ_PXA168_SSP4 0
9#define IRQ_PXA168_SSP2 1 9#define IRQ_PXA168_SSP3 1
10#define IRQ_PXA168_SSP1 2 10#define IRQ_PXA168_SSP2 2
11#define IRQ_PXA168_SSP0 3 11#define IRQ_PXA168_SSP1 3
12#define IRQ_PXA168_PMIC_INT 4 12#define IRQ_PXA168_PMIC_INT 4
13#define IRQ_PXA168_RTC_INT 5 13#define IRQ_PXA168_RTC_INT 5
14#define IRQ_PXA168_RTC_ALARM 6 14#define IRQ_PXA168_RTC_ALARM 6
@@ -20,7 +20,7 @@
20#define IRQ_PXA168_TIMER2 14 20#define IRQ_PXA168_TIMER2 14
21#define IRQ_PXA168_TIMER3 15 21#define IRQ_PXA168_TIMER3 15
22#define IRQ_PXA168_CMU 16 22#define IRQ_PXA168_CMU 16
23#define IRQ_PXA168_SSP4 17 23#define IRQ_PXA168_SSP5 17
24#define IRQ_PXA168_MSP_WAKEUP 19 24#define IRQ_PXA168_MSP_WAKEUP 19
25#define IRQ_PXA168_CF_WAKEUP 20 25#define IRQ_PXA168_CF_WAKEUP 20
26#define IRQ_PXA168_XD_WAKEUP 21 26#define IRQ_PXA168_XD_WAKEUP 21
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 3ad612cbdf09..3b2bd5d5eb05 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -14,6 +14,11 @@ extern struct pxa_device_desc pxa168_device_pwm1;
14extern struct pxa_device_desc pxa168_device_pwm2; 14extern struct pxa_device_desc pxa168_device_pwm2;
15extern struct pxa_device_desc pxa168_device_pwm3; 15extern struct pxa_device_desc pxa168_device_pwm3;
16extern struct pxa_device_desc pxa168_device_pwm4; 16extern struct pxa_device_desc pxa168_device_pwm4;
17extern struct pxa_device_desc pxa168_device_ssp1;
18extern struct pxa_device_desc pxa168_device_ssp2;
19extern struct pxa_device_desc pxa168_device_ssp3;
20extern struct pxa_device_desc pxa168_device_ssp4;
21extern struct pxa_device_desc pxa168_device_ssp5;
17extern struct pxa_device_desc pxa168_device_nand; 22extern struct pxa_device_desc pxa168_device_nand;
18 23
19static inline int pxa168_add_uart(int id) 24static inline int pxa168_add_uart(int id)
@@ -67,6 +72,22 @@ static inline int pxa168_add_pwm(int id)
67 return pxa_register_device(d, NULL, 0); 72 return pxa_register_device(d, NULL, 0);
68} 73}
69 74
75static inline int pxa168_add_ssp(int id)
76{
77 struct pxa_device_desc *d = NULL;
78
79 switch (id) {
80 case 1: d = &pxa168_device_ssp1; break;
81 case 2: d = &pxa168_device_ssp2; break;
82 case 3: d = &pxa168_device_ssp3; break;
83 case 4: d = &pxa168_device_ssp4; break;
84 case 5: d = &pxa168_device_ssp5; break;
85 default:
86 return -EINVAL;
87 }
88 return pxa_register_device(d, NULL, 0);
89}
90
70static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info) 91static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info)
71{ 92{
72 return pxa_register_device(&pxa168_device_nand, info, sizeof(*info)); 93 return pxa_register_device(&pxa168_device_nand, info, sizeof(*info));
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index 712af03fd1af..1a96585336ba 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -26,8 +26,6 @@
26#define APBC_PXA168_PWM2 APBC_REG(0x010) 26#define APBC_PXA168_PWM2 APBC_REG(0x010)
27#define APBC_PXA168_PWM3 APBC_REG(0x014) 27#define APBC_PXA168_PWM3 APBC_REG(0x014)
28#define APBC_PXA168_PWM4 APBC_REG(0x018) 28#define APBC_PXA168_PWM4 APBC_REG(0x018)
29#define APBC_PXA168_SSP1 APBC_REG(0x01c)
30#define APBC_PXA168_SSP2 APBC_REG(0x020)
31#define APBC_PXA168_RTC APBC_REG(0x028) 29#define APBC_PXA168_RTC APBC_REG(0x028)
32#define APBC_PXA168_TWSI0 APBC_REG(0x02c) 30#define APBC_PXA168_TWSI0 APBC_REG(0x02c)
33#define APBC_PXA168_KPC APBC_REG(0x030) 31#define APBC_PXA168_KPC APBC_REG(0x030)
@@ -35,14 +33,16 @@
35#define APBC_PXA168_AIB APBC_REG(0x03c) 33#define APBC_PXA168_AIB APBC_REG(0x03c)
36#define APBC_PXA168_SW_JTAG APBC_REG(0x040) 34#define APBC_PXA168_SW_JTAG APBC_REG(0x040)
37#define APBC_PXA168_ONEWIRE APBC_REG(0x048) 35#define APBC_PXA168_ONEWIRE APBC_REG(0x048)
38#define APBC_PXA168_SSP3 APBC_REG(0x04c)
39#define APBC_PXA168_ASFAR APBC_REG(0x050) 36#define APBC_PXA168_ASFAR APBC_REG(0x050)
40#define APBC_PXA168_ASSAR APBC_REG(0x054) 37#define APBC_PXA168_ASSAR APBC_REG(0x054)
41#define APBC_PXA168_SSP4 APBC_REG(0x058)
42#define APBC_PXA168_SSP5 APBC_REG(0x05c)
43#define APBC_PXA168_TWSI1 APBC_REG(0x06c) 38#define APBC_PXA168_TWSI1 APBC_REG(0x06c)
44#define APBC_PXA168_UART3 APBC_REG(0x070) 39#define APBC_PXA168_UART3 APBC_REG(0x070)
45#define APBC_PXA168_AC97 APBC_REG(0x084) 40#define APBC_PXA168_AC97 APBC_REG(0x084)
41#define APBC_PXA168_SSP1 APBC_REG(0x81c)
42#define APBC_PXA168_SSP2 APBC_REG(0x820)
43#define APBC_PXA168_SSP3 APBC_REG(0x84c)
44#define APBC_PXA168_SSP4 APBC_REG(0x858)
45#define APBC_PXA168_SSP5 APBC_REG(0x85c)
46 46
47/* 47/*
48 * APB Clock register offsets for PXA910 48 * APB Clock register offsets for PXA910
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 1873c821df90..652ae660634c 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -72,6 +72,11 @@ static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);
72static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000); 72static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
73static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000); 73static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
74static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000); 74static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
75static APBC_CLK(ssp1, PXA168_SSP1, 4, 0);
76static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
77static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
78static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
79static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
75 80
76static APMU_CLK(nand, NAND, 0x01db, 208000000); 81static APMU_CLK(nand, NAND, 0x01db, 208000000);
77 82
@@ -85,6 +90,11 @@ static struct clk_lookup pxa168_clkregs[] = {
85 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL), 90 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
86 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL), 91 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
87 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL), 92 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
93 INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
94 INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL),
95 INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL),
96 INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
97 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
88 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 98 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
89}; 99};
90 100
@@ -132,3 +142,8 @@ PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
132PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10); 142PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
133PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10); 143PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
134PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); 144PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
145PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
146PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
147PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
148PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
149PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
diff --git a/arch/arm/plat-pxa/include/plat/ssp.h b/arch/arm/plat-pxa/include/plat/ssp.h
index 74f70c7cc4f0..d16d79a3a48a 100644
--- a/arch/arm/plat-pxa/include/plat/ssp.h
+++ b/arch/arm/plat-pxa/include/plat/ssp.h
@@ -138,6 +138,7 @@ enum pxa_ssp_type {
138 PXA25x_SSP, /* pxa 210, 250, 255, 26x */ 138 PXA25x_SSP, /* pxa 210, 250, 255, 26x */
139 PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */ 139 PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
140 PXA27x_SSP, 140 PXA27x_SSP,
141 PXA168_SSP,
141}; 142};
142 143
143struct ssp_device { 144struct ssp_device {
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c
index 5fe230178f0a..cfebcd836f3e 100644
--- a/arch/arm/plat-pxa/ssp.c
+++ b/arch/arm/plat-pxa/ssp.c
@@ -192,6 +192,7 @@ static const struct platform_device_id ssp_id_table[] = {
192 { "pxa25x-ssp", PXA25x_SSP }, 192 { "pxa25x-ssp", PXA25x_SSP },
193 { "pxa25x-nssp", PXA25x_NSSP }, 193 { "pxa25x-nssp", PXA25x_NSSP },
194 { "pxa27x-ssp", PXA27x_SSP }, 194 { "pxa27x-ssp", PXA27x_SSP },
195 { "pxa168-ssp", PXA168_SSP },
195 { }, 196 { },
196}; 197};
197 198