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-rw-r--r--drivers/ata/pata_mpiix.c19
1 files changed, 10 insertions, 9 deletions
diff --git a/drivers/ata/pata_mpiix.c b/drivers/ata/pata_mpiix.c
index 976663d1fb22..4e97a7efccef 100644
--- a/drivers/ata/pata_mpiix.c
+++ b/drivers/ata/pata_mpiix.c
@@ -35,7 +35,7 @@
35#include <linux/libata.h> 35#include <linux/libata.h>
36 36
37#define DRV_NAME "pata_mpiix" 37#define DRV_NAME "pata_mpiix"
38#define DRV_VERSION "0.7.3" 38#define DRV_VERSION "0.7.4"
39 39
40enum { 40enum {
41 IDETIM = 0x6C, /* IDE control register */ 41 IDETIM = 0x6C, /* IDE control register */
@@ -80,8 +80,8 @@ static void mpiix_error_handler(struct ata_port *ap)
80 * @adev: ATA device 80 * @adev: ATA device
81 * 81 *
82 * Called to do the PIO mode setup. The MPIIX allows us to program the 82 * Called to do the PIO mode setup. The MPIIX allows us to program the
83 * IORDY sample point (2-5 clocks), recovery 1-4 clocks and whether 83 * IORDY sample point (2-5 clocks), recovery (1-4 clocks) and whether
84 * prefetching or iordy are used. 84 * prefetching or IORDY are used.
85 * 85 *
86 * This would get very ugly because we can only program timing for one 86 * This would get very ugly because we can only program timing for one
87 * device at a time, the other gets PIO0. Fortunately libata calls 87 * device at a time, the other gets PIO0. Fortunately libata calls
@@ -103,18 +103,19 @@ static void mpiix_set_piomode(struct ata_port *ap, struct ata_device *adev)
103 { 2, 3 }, }; 103 { 2, 3 }, };
104 104
105 pci_read_config_word(pdev, IDETIM, &idetim); 105 pci_read_config_word(pdev, IDETIM, &idetim);
106 /* Mask the IORDY/TIME/PPE0 bank for this device */ 106
107 /* Mask the IORDY/TIME/PPE for this device */
107 if (adev->class == ATA_DEV_ATA) 108 if (adev->class == ATA_DEV_ATA)
108 control |= PPE; /* PPE enable for disk */ 109 control |= PPE; /* Enable prefetch/posting for disk */
109 if (ata_pio_need_iordy(adev)) 110 if (ata_pio_need_iordy(adev))
110 control |= IORDY; /* IORDY */ 111 control |= IORDY;
111 if (pio > 0) 112 if (pio > 1)
112 control |= FTIM; /* This drive is on the fast timing bank */ 113 control |= FTIM; /* This drive is on the fast timing bank */
113 114
114 /* Mask out timing and clear both TIME bank selects */ 115 /* Mask out timing and clear both TIME bank selects */
115 idetim &= 0xCCEE; 116 idetim &= 0xCCEE;
116 idetim &= ~(0x07 << (2 * adev->devno)); 117 idetim &= ~(0x07 << (4 * adev->devno));
117 idetim |= (control << (2 * adev->devno)); 118 idetim |= control << (4 * adev->devno);
118 119
119 idetim |= (timings[pio][0] << 12) | (timings[pio][1] << 8); 120 idetim |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
120 pci_write_config_word(pdev, IDETIM, idetim); 121 pci_write_config_word(pdev, IDETIM, idetim);