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-rw-r--r--drivers/net/sb1250-mac.c1030
1 files changed, 515 insertions, 515 deletions
diff --git a/drivers/net/sb1250-mac.c b/drivers/net/sb1250-mac.c
index f7dda6fabe82..d4c8ecdfa4a7 100644
--- a/drivers/net/sb1250-mac.c
+++ b/drivers/net/sb1250-mac.c
@@ -10,7 +10,7 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 * 13 *
14 * You should have received a copy of the GNU General Public License 14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
@@ -127,7 +127,7 @@ typedef enum { sbmac_duplex_auto, sbmac_duplex_half,
127typedef enum { sbmac_fc_auto, sbmac_fc_disabled, sbmac_fc_frame, 127typedef enum { sbmac_fc_auto, sbmac_fc_disabled, sbmac_fc_frame,
128 sbmac_fc_collision, sbmac_fc_carrier } sbmac_fc_t; 128 sbmac_fc_collision, sbmac_fc_carrier } sbmac_fc_t;
129 129
130typedef enum { sbmac_state_uninit, sbmac_state_off, sbmac_state_on, 130typedef enum { sbmac_state_uninit, sbmac_state_off, sbmac_state_on,
131 sbmac_state_broken } sbmac_state_t; 131 sbmac_state_broken } sbmac_state_t;
132 132
133 133
@@ -147,8 +147,8 @@ typedef enum { sbmac_state_uninit, sbmac_state_off, sbmac_state_on,
147 147
148#define ETHER_ALIGN 2 148#define ETHER_ALIGN 2
149#define ETHER_ADDR_LEN 6 149#define ETHER_ADDR_LEN 6
150#define ENET_PACKET_SIZE 1518 150#define ENET_PACKET_SIZE 1518
151/*#define ENET_PACKET_SIZE 9216 */ 151/*#define ENET_PACKET_SIZE 9216 */
152 152
153/********************************************************************** 153/**********************************************************************
154 * DMA Descriptor structure 154 * DMA Descriptor structure
@@ -166,12 +166,12 @@ typedef unsigned long paddr_t;
166 ********************************************************************* */ 166 ********************************************************************* */
167 167
168typedef struct sbmacdma_s { 168typedef struct sbmacdma_s {
169 169
170 /* 170 /*
171 * This stuff is used to identify the channel and the registers 171 * This stuff is used to identify the channel and the registers
172 * associated with it. 172 * associated with it.
173 */ 173 */
174 174
175 struct sbmac_softc *sbdma_eth; /* back pointer to associated MAC */ 175 struct sbmac_softc *sbdma_eth; /* back pointer to associated MAC */
176 int sbdma_channel; /* channel number */ 176 int sbdma_channel; /* channel number */
177 int sbdma_txdir; /* direction (1=transmit) */ 177 int sbdma_txdir; /* direction (1=transmit) */
@@ -186,16 +186,16 @@ typedef struct sbmacdma_s {
186 volatile void __iomem *sbdma_dscrbase; /* Descriptor base address */ 186 volatile void __iomem *sbdma_dscrbase; /* Descriptor base address */
187 volatile void __iomem *sbdma_dscrcnt; /* Descriptor count register */ 187 volatile void __iomem *sbdma_dscrcnt; /* Descriptor count register */
188 volatile void __iomem *sbdma_curdscr; /* current descriptor address */ 188 volatile void __iomem *sbdma_curdscr; /* current descriptor address */
189 189
190 /* 190 /*
191 * This stuff is for maintenance of the ring 191 * This stuff is for maintenance of the ring
192 */ 192 */
193 193
194 sbdmadscr_t *sbdma_dscrtable; /* base of descriptor table */ 194 sbdmadscr_t *sbdma_dscrtable; /* base of descriptor table */
195 sbdmadscr_t *sbdma_dscrtable_end; /* end of descriptor table */ 195 sbdmadscr_t *sbdma_dscrtable_end; /* end of descriptor table */
196 196
197 struct sk_buff **sbdma_ctxtable; /* context table, one per descr */ 197 struct sk_buff **sbdma_ctxtable; /* context table, one per descr */
198 198
199 paddr_t sbdma_dscrtable_phys; /* and also the phys addr */ 199 paddr_t sbdma_dscrtable_phys; /* and also the phys addr */
200 sbdmadscr_t *sbdma_addptr; /* next dscr for sw to add */ 200 sbdmadscr_t *sbdma_addptr; /* next dscr for sw to add */
201 sbdmadscr_t *sbdma_remptr; /* next dscr for sw to remove */ 201 sbdmadscr_t *sbdma_remptr; /* next dscr for sw to remove */
@@ -207,15 +207,15 @@ typedef struct sbmacdma_s {
207 ********************************************************************* */ 207 ********************************************************************* */
208 208
209struct sbmac_softc { 209struct sbmac_softc {
210 210
211 /* 211 /*
212 * Linux-specific things 212 * Linux-specific things
213 */ 213 */
214 214
215 struct net_device *sbm_dev; /* pointer to linux device */ 215 struct net_device *sbm_dev; /* pointer to linux device */
216 spinlock_t sbm_lock; /* spin lock */ 216 spinlock_t sbm_lock; /* spin lock */
217 struct timer_list sbm_timer; /* for monitoring MII */ 217 struct timer_list sbm_timer; /* for monitoring MII */
218 struct net_device_stats sbm_stats; 218 struct net_device_stats sbm_stats;
219 int sbm_devflags; /* current device flags */ 219 int sbm_devflags; /* current device flags */
220 220
221 int sbm_phy_oldbmsr; 221 int sbm_phy_oldbmsr;
@@ -223,16 +223,16 @@ struct sbmac_softc {
223 int sbm_phy_oldk1stsr; 223 int sbm_phy_oldk1stsr;
224 int sbm_phy_oldlinkstat; 224 int sbm_phy_oldlinkstat;
225 int sbm_buffersize; 225 int sbm_buffersize;
226 226
227 unsigned char sbm_phys[2]; 227 unsigned char sbm_phys[2];
228 228
229 /* 229 /*
230 * Controller-specific things 230 * Controller-specific things
231 */ 231 */
232 232
233 volatile void __iomem *sbm_base; /* MAC's base address */ 233 volatile void __iomem *sbm_base; /* MAC's base address */
234 sbmac_state_t sbm_state; /* current state */ 234 sbmac_state_t sbm_state; /* current state */
235 235
236 volatile void __iomem *sbm_macenable; /* MAC Enable Register */ 236 volatile void __iomem *sbm_macenable; /* MAC Enable Register */
237 volatile void __iomem *sbm_maccfg; /* MAC Configuration Register */ 237 volatile void __iomem *sbm_maccfg; /* MAC Configuration Register */
238 volatile void __iomem *sbm_fifocfg; /* FIFO configuration register */ 238 volatile void __iomem *sbm_fifocfg; /* FIFO configuration register */
@@ -241,13 +241,13 @@ struct sbmac_softc {
241 volatile void __iomem *sbm_isr; /* Interrupt status register */ 241 volatile void __iomem *sbm_isr; /* Interrupt status register */
242 volatile void __iomem *sbm_imr; /* Interrupt mask register */ 242 volatile void __iomem *sbm_imr; /* Interrupt mask register */
243 volatile void __iomem *sbm_mdio; /* MDIO register */ 243 volatile void __iomem *sbm_mdio; /* MDIO register */
244 244
245 sbmac_speed_t sbm_speed; /* current speed */ 245 sbmac_speed_t sbm_speed; /* current speed */
246 sbmac_duplex_t sbm_duplex; /* current duplex */ 246 sbmac_duplex_t sbm_duplex; /* current duplex */
247 sbmac_fc_t sbm_fc; /* current flow control setting */ 247 sbmac_fc_t sbm_fc; /* current flow control setting */
248 248
249 unsigned char sbm_hwaddr[ETHER_ADDR_LEN]; 249 unsigned char sbm_hwaddr[ETHER_ADDR_LEN];
250 250
251 sbmacdma_t sbm_txdma; /* for now, only use channel 0 */ 251 sbmacdma_t sbm_txdma; /* for now, only use channel 0 */
252 sbmacdma_t sbm_rxdma; 252 sbmacdma_t sbm_rxdma;
253 int rx_hw_checksum; 253 int rx_hw_checksum;
@@ -444,13 +444,13 @@ static uint64_t sbmac_orig_hwaddr[MAX_UNITS];
444 444
445/********************************************************************** 445/**********************************************************************
446 * SBMAC_MII_SYNC(s) 446 * SBMAC_MII_SYNC(s)
447 * 447 *
448 * Synchronize with the MII - send a pattern of bits to the MII 448 * Synchronize with the MII - send a pattern of bits to the MII
449 * that will guarantee that it is ready to accept a command. 449 * that will guarantee that it is ready to accept a command.
450 * 450 *
451 * Input parameters: 451 * Input parameters:
452 * s - sbmac structure 452 * s - sbmac structure
453 * 453 *
454 * Return value: 454 * Return value:
455 * nothing 455 * nothing
456 ********************************************************************* */ 456 ********************************************************************* */
@@ -462,11 +462,11 @@ static void sbmac_mii_sync(struct sbmac_softc *s)
462 int mac_mdio_genc; 462 int mac_mdio_genc;
463 463
464 mac_mdio_genc = __raw_readq(s->sbm_mdio) & M_MAC_GENC; 464 mac_mdio_genc = __raw_readq(s->sbm_mdio) & M_MAC_GENC;
465 465
466 bits = M_MAC_MDIO_DIR_OUTPUT | M_MAC_MDIO_OUT; 466 bits = M_MAC_MDIO_DIR_OUTPUT | M_MAC_MDIO_OUT;
467 467
468 __raw_writeq(bits | mac_mdio_genc, s->sbm_mdio); 468 __raw_writeq(bits | mac_mdio_genc, s->sbm_mdio);
469 469
470 for (cnt = 0; cnt < 32; cnt++) { 470 for (cnt = 0; cnt < 32; cnt++) {
471 __raw_writeq(bits | M_MAC_MDC | mac_mdio_genc, s->sbm_mdio); 471 __raw_writeq(bits | M_MAC_MDC | mac_mdio_genc, s->sbm_mdio);
472 __raw_writeq(bits | mac_mdio_genc, s->sbm_mdio); 472 __raw_writeq(bits | mac_mdio_genc, s->sbm_mdio);
@@ -475,11 +475,11 @@ static void sbmac_mii_sync(struct sbmac_softc *s)
475 475
476/********************************************************************** 476/**********************************************************************
477 * SBMAC_MII_SENDDATA(s,data,bitcnt) 477 * SBMAC_MII_SENDDATA(s,data,bitcnt)
478 * 478 *
479 * Send some bits to the MII. The bits to be sent are right- 479 * Send some bits to the MII. The bits to be sent are right-
480 * justified in the 'data' parameter. 480 * justified in the 'data' parameter.
481 * 481 *
482 * Input parameters: 482 * Input parameters:
483 * s - sbmac structure 483 * s - sbmac structure
484 * data - data to send 484 * data - data to send
485 * bitcnt - number of bits to send 485 * bitcnt - number of bits to send
@@ -493,12 +493,12 @@ static void sbmac_mii_senddata(struct sbmac_softc *s,unsigned int data, int bitc
493 int mac_mdio_genc; 493 int mac_mdio_genc;
494 494
495 mac_mdio_genc = __raw_readq(s->sbm_mdio) & M_MAC_GENC; 495 mac_mdio_genc = __raw_readq(s->sbm_mdio) & M_MAC_GENC;
496 496
497 bits = M_MAC_MDIO_DIR_OUTPUT; 497 bits = M_MAC_MDIO_DIR_OUTPUT;
498 __raw_writeq(bits | mac_mdio_genc, s->sbm_mdio); 498 __raw_writeq(bits | mac_mdio_genc, s->sbm_mdio);
499 499
500 curmask = 1 << (bitcnt - 1); 500 curmask = 1 << (bitcnt - 1);
501 501
502 for (i = 0; i < bitcnt; i++) { 502 for (i = 0; i < bitcnt; i++) {
503 if (data & curmask) 503 if (data & curmask)
504 bits |= M_MAC_MDIO_OUT; 504 bits |= M_MAC_MDIO_OUT;
@@ -514,14 +514,14 @@ static void sbmac_mii_senddata(struct sbmac_softc *s,unsigned int data, int bitc
514 514
515/********************************************************************** 515/**********************************************************************
516 * SBMAC_MII_READ(s,phyaddr,regidx) 516 * SBMAC_MII_READ(s,phyaddr,regidx)
517 * 517 *
518 * Read a PHY register. 518 * Read a PHY register.
519 * 519 *
520 * Input parameters: 520 * Input parameters:
521 * s - sbmac structure 521 * s - sbmac structure
522 * phyaddr - PHY's address 522 * phyaddr - PHY's address
523 * regidx = index of register to read 523 * regidx = index of register to read
524 * 524 *
525 * Return value: 525 * Return value:
526 * value read, or 0 if an error occurred. 526 * value read, or 0 if an error occurred.
527 ********************************************************************* */ 527 ********************************************************************* */
@@ -537,9 +537,9 @@ static unsigned int sbmac_mii_read(struct sbmac_softc *s,int phyaddr,int regidx)
537 * Synchronize ourselves so that the PHY knows the next 537 * Synchronize ourselves so that the PHY knows the next
538 * thing coming down is a command 538 * thing coming down is a command
539 */ 539 */
540 540
541 sbmac_mii_sync(s); 541 sbmac_mii_sync(s);
542 542
543 /* 543 /*
544 * Send the data to the PHY. The sequence is 544 * Send the data to the PHY. The sequence is
545 * a "start" command (2 bits) 545 * a "start" command (2 bits)
@@ -547,55 +547,55 @@ static unsigned int sbmac_mii_read(struct sbmac_softc *s,int phyaddr,int regidx)
547 * the PHY addr (5 bits) 547 * the PHY addr (5 bits)
548 * the register index (5 bits) 548 * the register index (5 bits)
549 */ 549 */
550 550
551 sbmac_mii_senddata(s,MII_COMMAND_START, 2); 551 sbmac_mii_senddata(s,MII_COMMAND_START, 2);
552 sbmac_mii_senddata(s,MII_COMMAND_READ, 2); 552 sbmac_mii_senddata(s,MII_COMMAND_READ, 2);
553 sbmac_mii_senddata(s,phyaddr, 5); 553 sbmac_mii_senddata(s,phyaddr, 5);
554 sbmac_mii_senddata(s,regidx, 5); 554 sbmac_mii_senddata(s,regidx, 5);
555 555
556 mac_mdio_genc = __raw_readq(s->sbm_mdio) & M_MAC_GENC; 556 mac_mdio_genc = __raw_readq(s->sbm_mdio) & M_MAC_GENC;
557 557
558 /* 558 /*
559 * Switch the port around without a clock transition. 559 * Switch the port around without a clock transition.
560 */ 560 */
561 __raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio); 561 __raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio);
562 562
563 /* 563 /*
564 * Send out a clock pulse to signal we want the status 564 * Send out a clock pulse to signal we want the status
565 */ 565 */
566 566
567 __raw_writeq(M_MAC_MDIO_DIR_INPUT | M_MAC_MDC | mac_mdio_genc, s->sbm_mdio); 567 __raw_writeq(M_MAC_MDIO_DIR_INPUT | M_MAC_MDC | mac_mdio_genc, s->sbm_mdio);
568 __raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio); 568 __raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio);
569 569
570 /* 570 /*
571 * If an error occurred, the PHY will signal '1' back 571 * If an error occurred, the PHY will signal '1' back
572 */ 572 */
573 error = __raw_readq(s->sbm_mdio) & M_MAC_MDIO_IN; 573 error = __raw_readq(s->sbm_mdio) & M_MAC_MDIO_IN;
574 574
575 /* 575 /*
576 * Issue an 'idle' clock pulse, but keep the direction 576 * Issue an 'idle' clock pulse, but keep the direction
577 * the same. 577 * the same.
578 */ 578 */
579 __raw_writeq(M_MAC_MDIO_DIR_INPUT | M_MAC_MDC | mac_mdio_genc, s->sbm_mdio); 579 __raw_writeq(M_MAC_MDIO_DIR_INPUT | M_MAC_MDC | mac_mdio_genc, s->sbm_mdio);
580 __raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio); 580 __raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio);
581 581
582 regval = 0; 582 regval = 0;
583 583
584 for (idx = 0; idx < 16; idx++) { 584 for (idx = 0; idx < 16; idx++) {
585 regval <<= 1; 585 regval <<= 1;
586 586
587 if (error == 0) { 587 if (error == 0) {
588 if (__raw_readq(s->sbm_mdio) & M_MAC_MDIO_IN) 588 if (__raw_readq(s->sbm_mdio) & M_MAC_MDIO_IN)
589 regval |= 1; 589 regval |= 1;
590 } 590 }
591 591
592 __raw_writeq(M_MAC_MDIO_DIR_INPUT|M_MAC_MDC | mac_mdio_genc, s->sbm_mdio); 592 __raw_writeq(M_MAC_MDIO_DIR_INPUT|M_MAC_MDC | mac_mdio_genc, s->sbm_mdio);
593 __raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio); 593 __raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio);
594 } 594 }
595 595
596 /* Switch back to output */ 596 /* Switch back to output */
597 __raw_writeq(M_MAC_MDIO_DIR_OUTPUT | mac_mdio_genc, s->sbm_mdio); 597 __raw_writeq(M_MAC_MDIO_DIR_OUTPUT | mac_mdio_genc, s->sbm_mdio);
598 598
599 if (error == 0) 599 if (error == 0)
600 return regval; 600 return regval;
601 return 0; 601 return 0;
@@ -604,15 +604,15 @@ static unsigned int sbmac_mii_read(struct sbmac_softc *s,int phyaddr,int regidx)
604 604
605/********************************************************************** 605/**********************************************************************
606 * SBMAC_MII_WRITE(s,phyaddr,regidx,regval) 606 * SBMAC_MII_WRITE(s,phyaddr,regidx,regval)
607 * 607 *
608 * Write a value to a PHY register. 608 * Write a value to a PHY register.
609 * 609 *
610 * Input parameters: 610 * Input parameters:
611 * s - sbmac structure 611 * s - sbmac structure
612 * phyaddr - PHY to use 612 * phyaddr - PHY to use
613 * regidx - register within the PHY 613 * regidx - register within the PHY
614 * regval - data to write to register 614 * regval - data to write to register
615 * 615 *
616 * Return value: 616 * Return value:
617 * nothing 617 * nothing
618 ********************************************************************* */ 618 ********************************************************************* */
@@ -623,7 +623,7 @@ static void sbmac_mii_write(struct sbmac_softc *s,int phyaddr,int regidx,
623 int mac_mdio_genc; 623 int mac_mdio_genc;
624 624
625 sbmac_mii_sync(s); 625 sbmac_mii_sync(s);
626 626
627 sbmac_mii_senddata(s,MII_COMMAND_START,2); 627 sbmac_mii_senddata(s,MII_COMMAND_START,2);
628 sbmac_mii_senddata(s,MII_COMMAND_WRITE,2); 628 sbmac_mii_senddata(s,MII_COMMAND_WRITE,2);
629 sbmac_mii_senddata(s,phyaddr, 5); 629 sbmac_mii_senddata(s,phyaddr, 5);
@@ -640,18 +640,18 @@ static void sbmac_mii_write(struct sbmac_softc *s,int phyaddr,int regidx,
640 640
641/********************************************************************** 641/**********************************************************************
642 * SBDMA_INITCTX(d,s,chan,txrx,maxdescr) 642 * SBDMA_INITCTX(d,s,chan,txrx,maxdescr)
643 * 643 *
644 * Initialize a DMA channel context. Since there are potentially 644 * Initialize a DMA channel context. Since there are potentially
645 * eight DMA channels per MAC, it's nice to do this in a standard 645 * eight DMA channels per MAC, it's nice to do this in a standard
646 * way. 646 * way.
647 * 647 *
648 * Input parameters: 648 * Input parameters:
649 * d - sbmacdma_t structure (DMA channel context) 649 * d - sbmacdma_t structure (DMA channel context)
650 * s - sbmac_softc structure (pointer to a MAC) 650 * s - sbmac_softc structure (pointer to a MAC)
651 * chan - channel number (0..1 right now) 651 * chan - channel number (0..1 right now)
652 * txrx - Identifies DMA_TX or DMA_RX for channel direction 652 * txrx - Identifies DMA_TX or DMA_RX for channel direction
653 * maxdescr - number of descriptors 653 * maxdescr - number of descriptors
654 * 654 *
655 * Return value: 655 * Return value:
656 * nothing 656 * nothing
657 ********************************************************************* */ 657 ********************************************************************* */
@@ -662,14 +662,14 @@ static void sbdma_initctx(sbmacdma_t *d,
662 int txrx, 662 int txrx,
663 int maxdescr) 663 int maxdescr)
664{ 664{
665 /* 665 /*
666 * Save away interesting stuff in the structure 666 * Save away interesting stuff in the structure
667 */ 667 */
668 668
669 d->sbdma_eth = s; 669 d->sbdma_eth = s;
670 d->sbdma_channel = chan; 670 d->sbdma_channel = chan;
671 d->sbdma_txdir = txrx; 671 d->sbdma_txdir = txrx;
672 672
673#if 0 673#if 0
674 /* RMON clearing */ 674 /* RMON clearing */
675 s->sbe_idx =(s->sbm_base - A_MAC_BASE_0)/MAC_SPACING; 675 s->sbe_idx =(s->sbm_base - A_MAC_BASE_0)/MAC_SPACING;
@@ -697,28 +697,28 @@ static void sbdma_initctx(sbmacdma_t *d,
697 __raw_writeq(0, IOADDR(A_MAC_REGISTER(s->sbe_idx, R_MAC_RMON_RX_CODE_ERROR))); 697 __raw_writeq(0, IOADDR(A_MAC_REGISTER(s->sbe_idx, R_MAC_RMON_RX_CODE_ERROR)));
698 __raw_writeq(0, IOADDR(A_MAC_REGISTER(s->sbe_idx, R_MAC_RMON_RX_ALIGN_ERROR))); 698 __raw_writeq(0, IOADDR(A_MAC_REGISTER(s->sbe_idx, R_MAC_RMON_RX_ALIGN_ERROR)));
699 699
700 /* 700 /*
701 * initialize register pointers 701 * initialize register pointers
702 */ 702 */
703 703
704 d->sbdma_config0 = 704 d->sbdma_config0 =
705 s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_CONFIG0); 705 s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_CONFIG0);
706 d->sbdma_config1 = 706 d->sbdma_config1 =
707 s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_CONFIG1); 707 s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_CONFIG1);
708 d->sbdma_dscrbase = 708 d->sbdma_dscrbase =
709 s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_DSCR_BASE); 709 s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_DSCR_BASE);
710 d->sbdma_dscrcnt = 710 d->sbdma_dscrcnt =
711 s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_DSCR_CNT); 711 s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_DSCR_CNT);
712 d->sbdma_curdscr = 712 d->sbdma_curdscr =
713 s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_CUR_DSCRADDR); 713 s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_CUR_DSCRADDR);
714 714
715 /* 715 /*
716 * Allocate memory for the ring 716 * Allocate memory for the ring
717 */ 717 */
718 718
719 d->sbdma_maxdescr = maxdescr; 719 d->sbdma_maxdescr = maxdescr;
720 720
721 d->sbdma_dscrtable = (sbdmadscr_t *) 721 d->sbdma_dscrtable = (sbdmadscr_t *)
722 kmalloc((d->sbdma_maxdescr+1)*sizeof(sbdmadscr_t), GFP_KERNEL); 722 kmalloc((d->sbdma_maxdescr+1)*sizeof(sbdmadscr_t), GFP_KERNEL);
723 723
724 /* 724 /*
@@ -727,22 +727,22 @@ static void sbdma_initctx(sbmacdma_t *d,
727 */ 727 */
728 d->sbdma_dscrtable = (sbdmadscr_t *) 728 d->sbdma_dscrtable = (sbdmadscr_t *)
729 ALIGN((unsigned long)d->sbdma_dscrtable, sizeof(sbdmadscr_t)); 729 ALIGN((unsigned long)d->sbdma_dscrtable, sizeof(sbdmadscr_t));
730 730
731 memset(d->sbdma_dscrtable,0,d->sbdma_maxdescr*sizeof(sbdmadscr_t)); 731 memset(d->sbdma_dscrtable,0,d->sbdma_maxdescr*sizeof(sbdmadscr_t));
732 732
733 d->sbdma_dscrtable_end = d->sbdma_dscrtable + d->sbdma_maxdescr; 733 d->sbdma_dscrtable_end = d->sbdma_dscrtable + d->sbdma_maxdescr;
734 734
735 d->sbdma_dscrtable_phys = virt_to_phys(d->sbdma_dscrtable); 735 d->sbdma_dscrtable_phys = virt_to_phys(d->sbdma_dscrtable);
736 736
737 /* 737 /*
738 * And context table 738 * And context table
739 */ 739 */
740 740
741 d->sbdma_ctxtable = (struct sk_buff **) 741 d->sbdma_ctxtable = (struct sk_buff **)
742 kmalloc(d->sbdma_maxdescr*sizeof(struct sk_buff *), GFP_KERNEL); 742 kmalloc(d->sbdma_maxdescr*sizeof(struct sk_buff *), GFP_KERNEL);
743 743
744 memset(d->sbdma_ctxtable,0,d->sbdma_maxdescr*sizeof(struct sk_buff *)); 744 memset(d->sbdma_ctxtable,0,d->sbdma_maxdescr*sizeof(struct sk_buff *));
745 745
746#ifdef CONFIG_SBMAC_COALESCE 746#ifdef CONFIG_SBMAC_COALESCE
747 /* 747 /*
748 * Setup Rx/Tx DMA coalescing defaults 748 * Setup Rx/Tx DMA coalescing defaults
@@ -753,7 +753,7 @@ static void sbdma_initctx(sbmacdma_t *d,
753 } else { 753 } else {
754 d->sbdma_int_pktcnt = 1; 754 d->sbdma_int_pktcnt = 1;
755 } 755 }
756 756
757 if ( int_timeout ) { 757 if ( int_timeout ) {
758 d->sbdma_int_timeout = int_timeout; 758 d->sbdma_int_timeout = int_timeout;
759 } else { 759 } else {
@@ -765,13 +765,13 @@ static void sbdma_initctx(sbmacdma_t *d,
765 765
766/********************************************************************** 766/**********************************************************************
767 * SBDMA_CHANNEL_START(d) 767 * SBDMA_CHANNEL_START(d)
768 * 768 *
769 * Initialize the hardware registers for a DMA channel. 769 * Initialize the hardware registers for a DMA channel.
770 * 770 *
771 * Input parameters: 771 * Input parameters:
772 * d - DMA channel to init (context must be previously init'd 772 * d - DMA channel to init (context must be previously init'd
773 * rxtx - DMA_RX or DMA_TX depending on what type of channel 773 * rxtx - DMA_RX or DMA_TX depending on what type of channel
774 * 774 *
775 * Return value: 775 * Return value:
776 * nothing 776 * nothing
777 ********************************************************************* */ 777 ********************************************************************* */
@@ -781,7 +781,7 @@ static void sbdma_channel_start(sbmacdma_t *d, int rxtx )
781 /* 781 /*
782 * Turn on the DMA channel 782 * Turn on the DMA channel
783 */ 783 */
784 784
785#ifdef CONFIG_SBMAC_COALESCE 785#ifdef CONFIG_SBMAC_COALESCE
786 __raw_writeq(V_DMA_INT_TIMEOUT(d->sbdma_int_timeout) | 786 __raw_writeq(V_DMA_INT_TIMEOUT(d->sbdma_int_timeout) |
787 0, d->sbdma_config1); 787 0, d->sbdma_config1);
@@ -807,12 +807,12 @@ static void sbdma_channel_start(sbmacdma_t *d, int rxtx )
807 807
808/********************************************************************** 808/**********************************************************************
809 * SBDMA_CHANNEL_STOP(d) 809 * SBDMA_CHANNEL_STOP(d)
810 * 810 *
811 * Initialize the hardware registers for a DMA channel. 811 * Initialize the hardware registers for a DMA channel.
812 * 812 *
813 * Input parameters: 813 * Input parameters:
814 * d - DMA channel to init (context must be previously init'd 814 * d - DMA channel to init (context must be previously init'd
815 * 815 *
816 * Return value: 816 * Return value:
817 * nothing 817 * nothing
818 ********************************************************************* */ 818 ********************************************************************* */
@@ -822,17 +822,17 @@ static void sbdma_channel_stop(sbmacdma_t *d)
822 /* 822 /*
823 * Turn off the DMA channel 823 * Turn off the DMA channel
824 */ 824 */
825 825
826 __raw_writeq(0, d->sbdma_config1); 826 __raw_writeq(0, d->sbdma_config1);
827 827
828 __raw_writeq(0, d->sbdma_dscrbase); 828 __raw_writeq(0, d->sbdma_dscrbase);
829 829
830 __raw_writeq(0, d->sbdma_config0); 830 __raw_writeq(0, d->sbdma_config0);
831 831
832 /* 832 /*
833 * Zero ring pointers 833 * Zero ring pointers
834 */ 834 */
835 835
836 d->sbdma_addptr = NULL; 836 d->sbdma_addptr = NULL;
837 d->sbdma_remptr = NULL; 837 d->sbdma_remptr = NULL;
838} 838}
@@ -841,25 +841,25 @@ static void sbdma_align_skb(struct sk_buff *skb,int power2,int offset)
841{ 841{
842 unsigned long addr; 842 unsigned long addr;
843 unsigned long newaddr; 843 unsigned long newaddr;
844 844
845 addr = (unsigned long) skb->data; 845 addr = (unsigned long) skb->data;
846 846
847 newaddr = (addr + power2 - 1) & ~(power2 - 1); 847 newaddr = (addr + power2 - 1) & ~(power2 - 1);
848 848
849 skb_reserve(skb,newaddr-addr+offset); 849 skb_reserve(skb,newaddr-addr+offset);
850} 850}
851 851
852 852
853/********************************************************************** 853/**********************************************************************
854 * SBDMA_ADD_RCVBUFFER(d,sb) 854 * SBDMA_ADD_RCVBUFFER(d,sb)
855 * 855 *
856 * Add a buffer to the specified DMA channel. For receive channels, 856 * Add a buffer to the specified DMA channel. For receive channels,
857 * this queues a buffer for inbound packets. 857 * this queues a buffer for inbound packets.
858 * 858 *
859 * Input parameters: 859 * Input parameters:
860 * d - DMA channel descriptor 860 * d - DMA channel descriptor
861 * sb - sk_buff to add, or NULL if we should allocate one 861 * sb - sk_buff to add, or NULL if we should allocate one
862 * 862 *
863 * Return value: 863 * Return value:
864 * 0 if buffer could not be added (ring is full) 864 * 0 if buffer could not be added (ring is full)
865 * 1 if buffer added successfully 865 * 1 if buffer added successfully
@@ -872,24 +872,24 @@ static int sbdma_add_rcvbuffer(sbmacdma_t *d,struct sk_buff *sb)
872 sbdmadscr_t *nextdsc; 872 sbdmadscr_t *nextdsc;
873 struct sk_buff *sb_new = NULL; 873 struct sk_buff *sb_new = NULL;
874 int pktsize = ENET_PACKET_SIZE; 874 int pktsize = ENET_PACKET_SIZE;
875 875
876 /* get pointer to our current place in the ring */ 876 /* get pointer to our current place in the ring */
877 877
878 dsc = d->sbdma_addptr; 878 dsc = d->sbdma_addptr;
879 nextdsc = SBDMA_NEXTBUF(d,sbdma_addptr); 879 nextdsc = SBDMA_NEXTBUF(d,sbdma_addptr);
880 880
881 /* 881 /*
882 * figure out if the ring is full - if the next descriptor 882 * figure out if the ring is full - if the next descriptor
883 * is the same as the one that we're going to remove from 883 * is the same as the one that we're going to remove from
884 * the ring, the ring is full 884 * the ring, the ring is full
885 */ 885 */
886 886
887 if (nextdsc == d->sbdma_remptr) { 887 if (nextdsc == d->sbdma_remptr) {
888 return -ENOSPC; 888 return -ENOSPC;
889 } 889 }
890 890
891 /* 891 /*
892 * Allocate a sk_buff if we don't already have one. 892 * Allocate a sk_buff if we don't already have one.
893 * If we do have an sk_buff, reset it so that it's empty. 893 * If we do have an sk_buff, reset it so that it's empty.
894 * 894 *
895 * Note: sk_buffs don't seem to be guaranteed to have any sort 895 * Note: sk_buffs don't seem to be guaranteed to have any sort
@@ -898,7 +898,7 @@ static int sbdma_add_rcvbuffer(sbmacdma_t *d,struct sk_buff *sb)
898 * 898 *
899 * 1. the data does not start in the middle of a cache line. 899 * 1. the data does not start in the middle of a cache line.
900 * 2. The data does not end in the middle of a cache line 900 * 2. The data does not end in the middle of a cache line
901 * 3. The buffer can be aligned such that the IP addresses are 901 * 3. The buffer can be aligned such that the IP addresses are
902 * naturally aligned. 902 * naturally aligned.
903 * 903 *
904 * Remember, the SOCs MAC writes whole cache lines at a time, 904 * Remember, the SOCs MAC writes whole cache lines at a time,
@@ -906,7 +906,7 @@ static int sbdma_add_rcvbuffer(sbmacdma_t *d,struct sk_buff *sb)
906 * data portion starts in the middle of a cache line, the SOC 906 * data portion starts in the middle of a cache line, the SOC
907 * DMA will trash the beginning (and ending) portions. 907 * DMA will trash the beginning (and ending) portions.
908 */ 908 */
909 909
910 if (sb == NULL) { 910 if (sb == NULL) {
911 sb_new = dev_alloc_skb(ENET_PACKET_SIZE + SMP_CACHE_BYTES * 2 + ETHER_ALIGN); 911 sb_new = dev_alloc_skb(ENET_PACKET_SIZE + SMP_CACHE_BYTES * 2 + ETHER_ALIGN);
912 if (sb_new == NULL) { 912 if (sb_new == NULL) {
@@ -922,16 +922,16 @@ static int sbdma_add_rcvbuffer(sbmacdma_t *d,struct sk_buff *sb)
922 } 922 }
923 else { 923 else {
924 sb_new = sb; 924 sb_new = sb;
925 /* 925 /*
926 * nothing special to reinit buffer, it's already aligned 926 * nothing special to reinit buffer, it's already aligned
927 * and sb->data already points to a good place. 927 * and sb->data already points to a good place.
928 */ 928 */
929 } 929 }
930 930
931 /* 931 /*
932 * fill in the descriptor 932 * fill in the descriptor
933 */ 933 */
934 934
935#ifdef CONFIG_SBMAC_COALESCE 935#ifdef CONFIG_SBMAC_COALESCE
936 /* 936 /*
937 * Do not interrupt per DMA transfer. 937 * Do not interrupt per DMA transfer.
@@ -946,38 +946,38 @@ static int sbdma_add_rcvbuffer(sbmacdma_t *d,struct sk_buff *sb)
946 946
947 /* receiving: no options */ 947 /* receiving: no options */
948 dsc->dscr_b = 0; 948 dsc->dscr_b = 0;
949 949
950 /* 950 /*
951 * fill in the context 951 * fill in the context
952 */ 952 */
953 953
954 d->sbdma_ctxtable[dsc-d->sbdma_dscrtable] = sb_new; 954 d->sbdma_ctxtable[dsc-d->sbdma_dscrtable] = sb_new;
955 955
956 /* 956 /*
957 * point at next packet 957 * point at next packet
958 */ 958 */
959 959
960 d->sbdma_addptr = nextdsc; 960 d->sbdma_addptr = nextdsc;
961 961
962 /* 962 /*
963 * Give the buffer to the DMA engine. 963 * Give the buffer to the DMA engine.
964 */ 964 */
965 965
966 __raw_writeq(1, d->sbdma_dscrcnt); 966 __raw_writeq(1, d->sbdma_dscrcnt);
967 967
968 return 0; /* we did it */ 968 return 0; /* we did it */
969} 969}
970 970
971/********************************************************************** 971/**********************************************************************
972 * SBDMA_ADD_TXBUFFER(d,sb) 972 * SBDMA_ADD_TXBUFFER(d,sb)
973 * 973 *
974 * Add a transmit buffer to the specified DMA channel, causing a 974 * Add a transmit buffer to the specified DMA channel, causing a
975 * transmit to start. 975 * transmit to start.
976 * 976 *
977 * Input parameters: 977 * Input parameters:
978 * d - DMA channel descriptor 978 * d - DMA channel descriptor
979 * sb - sk_buff to add 979 * sb - sk_buff to add
980 * 980 *
981 * Return value: 981 * Return value:
982 * 0 transmit queued successfully 982 * 0 transmit queued successfully
983 * otherwise error code 983 * otherwise error code
@@ -991,70 +991,70 @@ static int sbdma_add_txbuffer(sbmacdma_t *d,struct sk_buff *sb)
991 uint64_t phys; 991 uint64_t phys;
992 uint64_t ncb; 992 uint64_t ncb;
993 int length; 993 int length;
994 994
995 /* get pointer to our current place in the ring */ 995 /* get pointer to our current place in the ring */
996 996
997 dsc = d->sbdma_addptr; 997 dsc = d->sbdma_addptr;
998 nextdsc = SBDMA_NEXTBUF(d,sbdma_addptr); 998 nextdsc = SBDMA_NEXTBUF(d,sbdma_addptr);
999 999
1000 /* 1000 /*
1001 * figure out if the ring is full - if the next descriptor 1001 * figure out if the ring is full - if the next descriptor
1002 * is the same as the one that we're going to remove from 1002 * is the same as the one that we're going to remove from
1003 * the ring, the ring is full 1003 * the ring, the ring is full
1004 */ 1004 */
1005 1005
1006 if (nextdsc == d->sbdma_remptr) { 1006 if (nextdsc == d->sbdma_remptr) {
1007 return -ENOSPC; 1007 return -ENOSPC;
1008 } 1008 }
1009 1009
1010 /* 1010 /*
1011 * Under Linux, it's not necessary to copy/coalesce buffers 1011 * Under Linux, it's not necessary to copy/coalesce buffers
1012 * like it is on NetBSD. We think they're all contiguous, 1012 * like it is on NetBSD. We think they're all contiguous,
1013 * but that may not be true for GBE. 1013 * but that may not be true for GBE.
1014 */ 1014 */
1015 1015
1016 length = sb->len; 1016 length = sb->len;
1017 1017
1018 /* 1018 /*
1019 * fill in the descriptor. Note that the number of cache 1019 * fill in the descriptor. Note that the number of cache
1020 * blocks in the descriptor is the number of blocks 1020 * blocks in the descriptor is the number of blocks
1021 * *spanned*, so we need to add in the offset (if any) 1021 * *spanned*, so we need to add in the offset (if any)
1022 * while doing the calculation. 1022 * while doing the calculation.
1023 */ 1023 */
1024 1024
1025 phys = virt_to_phys(sb->data); 1025 phys = virt_to_phys(sb->data);
1026 ncb = NUMCACHEBLKS(length+(phys & (SMP_CACHE_BYTES - 1))); 1026 ncb = NUMCACHEBLKS(length+(phys & (SMP_CACHE_BYTES - 1)));
1027 1027
1028 dsc->dscr_a = phys | 1028 dsc->dscr_a = phys |
1029 V_DMA_DSCRA_A_SIZE(ncb) | 1029 V_DMA_DSCRA_A_SIZE(ncb) |
1030#ifndef CONFIG_SBMAC_COALESCE 1030#ifndef CONFIG_SBMAC_COALESCE
1031 M_DMA_DSCRA_INTERRUPT | 1031 M_DMA_DSCRA_INTERRUPT |
1032#endif 1032#endif
1033 M_DMA_ETHTX_SOP; 1033 M_DMA_ETHTX_SOP;
1034 1034
1035 /* transmitting: set outbound options and length */ 1035 /* transmitting: set outbound options and length */
1036 1036
1037 dsc->dscr_b = V_DMA_DSCRB_OPTIONS(K_DMA_ETHTX_APPENDCRC_APPENDPAD) | 1037 dsc->dscr_b = V_DMA_DSCRB_OPTIONS(K_DMA_ETHTX_APPENDCRC_APPENDPAD) |
1038 V_DMA_DSCRB_PKT_SIZE(length); 1038 V_DMA_DSCRB_PKT_SIZE(length);
1039 1039
1040 /* 1040 /*
1041 * fill in the context 1041 * fill in the context
1042 */ 1042 */
1043 1043
1044 d->sbdma_ctxtable[dsc-d->sbdma_dscrtable] = sb; 1044 d->sbdma_ctxtable[dsc-d->sbdma_dscrtable] = sb;
1045 1045
1046 /* 1046 /*
1047 * point at next packet 1047 * point at next packet
1048 */ 1048 */
1049 1049
1050 d->sbdma_addptr = nextdsc; 1050 d->sbdma_addptr = nextdsc;
1051 1051
1052 /* 1052 /*
1053 * Give the buffer to the DMA engine. 1053 * Give the buffer to the DMA engine.
1054 */ 1054 */
1055 1055
1056 __raw_writeq(1, d->sbdma_dscrcnt); 1056 __raw_writeq(1, d->sbdma_dscrcnt);
1057 1057
1058 return 0; /* we did it */ 1058 return 0; /* we did it */
1059} 1059}
1060 1060
@@ -1063,12 +1063,12 @@ static int sbdma_add_txbuffer(sbmacdma_t *d,struct sk_buff *sb)
1063 1063
1064/********************************************************************** 1064/**********************************************************************
1065 * SBDMA_EMPTYRING(d) 1065 * SBDMA_EMPTYRING(d)
1066 * 1066 *
1067 * Free all allocated sk_buffs on the specified DMA channel; 1067 * Free all allocated sk_buffs on the specified DMA channel;
1068 * 1068 *
1069 * Input parameters: 1069 * Input parameters:
1070 * d - DMA channel 1070 * d - DMA channel
1071 * 1071 *
1072 * Return value: 1072 * Return value:
1073 * nothing 1073 * nothing
1074 ********************************************************************* */ 1074 ********************************************************************* */
@@ -1077,7 +1077,7 @@ static void sbdma_emptyring(sbmacdma_t *d)
1077{ 1077{
1078 int idx; 1078 int idx;
1079 struct sk_buff *sb; 1079 struct sk_buff *sb;
1080 1080
1081 for (idx = 0; idx < d->sbdma_maxdescr; idx++) { 1081 for (idx = 0; idx < d->sbdma_maxdescr; idx++) {
1082 sb = d->sbdma_ctxtable[idx]; 1082 sb = d->sbdma_ctxtable[idx];
1083 if (sb) { 1083 if (sb) {
@@ -1090,13 +1090,13 @@ static void sbdma_emptyring(sbmacdma_t *d)
1090 1090
1091/********************************************************************** 1091/**********************************************************************
1092 * SBDMA_FILLRING(d) 1092 * SBDMA_FILLRING(d)
1093 * 1093 *
1094 * Fill the specified DMA channel (must be receive channel) 1094 * Fill the specified DMA channel (must be receive channel)
1095 * with sk_buffs 1095 * with sk_buffs
1096 * 1096 *
1097 * Input parameters: 1097 * Input parameters:
1098 * d - DMA channel 1098 * d - DMA channel
1099 * 1099 *
1100 * Return value: 1100 * Return value:
1101 * nothing 1101 * nothing
1102 ********************************************************************* */ 1102 ********************************************************************* */
@@ -1104,7 +1104,7 @@ static void sbdma_emptyring(sbmacdma_t *d)
1104static void sbdma_fillring(sbmacdma_t *d) 1104static void sbdma_fillring(sbmacdma_t *d)
1105{ 1105{
1106 int idx; 1106 int idx;
1107 1107
1108 for (idx = 0; idx < SBMAC_MAX_RXDESCR-1; idx++) { 1108 for (idx = 0; idx < SBMAC_MAX_RXDESCR-1; idx++) {
1109 if (sbdma_add_rcvbuffer(d,NULL) != 0) 1109 if (sbdma_add_rcvbuffer(d,NULL) != 0)
1110 break; 1110 break;
@@ -1114,16 +1114,16 @@ static void sbdma_fillring(sbmacdma_t *d)
1114 1114
1115/********************************************************************** 1115/**********************************************************************
1116 * SBDMA_RX_PROCESS(sc,d) 1116 * SBDMA_RX_PROCESS(sc,d)
1117 * 1117 *
1118 * Process "completed" receive buffers on the specified DMA channel. 1118 * Process "completed" receive buffers on the specified DMA channel.
1119 * Note that this isn't really ideal for priority channels, since 1119 * Note that this isn't really ideal for priority channels, since
1120 * it processes all of the packets on a given channel before 1120 * it processes all of the packets on a given channel before
1121 * returning. 1121 * returning.
1122 * 1122 *
1123 * Input parameters: 1123 * Input parameters:
1124 * sc - softc structure 1124 * sc - softc structure
1125 * d - DMA channel context 1125 * d - DMA channel context
1126 * 1126 *
1127 * Return value: 1127 * Return value:
1128 * nothing 1128 * nothing
1129 ********************************************************************* */ 1129 ********************************************************************* */
@@ -1135,56 +1135,56 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
1135 sbdmadscr_t *dsc; 1135 sbdmadscr_t *dsc;
1136 struct sk_buff *sb; 1136 struct sk_buff *sb;
1137 int len; 1137 int len;
1138 1138
1139 for (;;) { 1139 for (;;) {
1140 /* 1140 /*
1141 * figure out where we are (as an index) and where 1141 * figure out where we are (as an index) and where
1142 * the hardware is (also as an index) 1142 * the hardware is (also as an index)
1143 * 1143 *
1144 * This could be done faster if (for example) the 1144 * This could be done faster if (for example) the
1145 * descriptor table was page-aligned and contiguous in 1145 * descriptor table was page-aligned and contiguous in
1146 * both virtual and physical memory -- you could then 1146 * both virtual and physical memory -- you could then
1147 * just compare the low-order bits of the virtual address 1147 * just compare the low-order bits of the virtual address
1148 * (sbdma_remptr) and the physical address (sbdma_curdscr CSR) 1148 * (sbdma_remptr) and the physical address (sbdma_curdscr CSR)
1149 */ 1149 */
1150 1150
1151 curidx = d->sbdma_remptr - d->sbdma_dscrtable; 1151 curidx = d->sbdma_remptr - d->sbdma_dscrtable;
1152 hwidx = (int) (((__raw_readq(d->sbdma_curdscr) & M_DMA_CURDSCR_ADDR) - 1152 hwidx = (int) (((__raw_readq(d->sbdma_curdscr) & M_DMA_CURDSCR_ADDR) -
1153 d->sbdma_dscrtable_phys) / sizeof(sbdmadscr_t)); 1153 d->sbdma_dscrtable_phys) / sizeof(sbdmadscr_t));
1154 1154
1155 /* 1155 /*
1156 * If they're the same, that means we've processed all 1156 * If they're the same, that means we've processed all
1157 * of the descriptors up to (but not including) the one that 1157 * of the descriptors up to (but not including) the one that
1158 * the hardware is working on right now. 1158 * the hardware is working on right now.
1159 */ 1159 */
1160 1160
1161 if (curidx == hwidx) 1161 if (curidx == hwidx)
1162 break; 1162 break;
1163 1163
1164 /* 1164 /*
1165 * Otherwise, get the packet's sk_buff ptr back 1165 * Otherwise, get the packet's sk_buff ptr back
1166 */ 1166 */
1167 1167
1168 dsc = &(d->sbdma_dscrtable[curidx]); 1168 dsc = &(d->sbdma_dscrtable[curidx]);
1169 sb = d->sbdma_ctxtable[curidx]; 1169 sb = d->sbdma_ctxtable[curidx];
1170 d->sbdma_ctxtable[curidx] = NULL; 1170 d->sbdma_ctxtable[curidx] = NULL;
1171 1171
1172 len = (int)G_DMA_DSCRB_PKT_SIZE(dsc->dscr_b) - 4; 1172 len = (int)G_DMA_DSCRB_PKT_SIZE(dsc->dscr_b) - 4;
1173 1173
1174 /* 1174 /*
1175 * Check packet status. If good, process it. 1175 * Check packet status. If good, process it.
1176 * If not, silently drop it and put it back on the 1176 * If not, silently drop it and put it back on the
1177 * receive ring. 1177 * receive ring.
1178 */ 1178 */
1179 1179
1180 if (!(dsc->dscr_a & M_DMA_ETHRX_BAD)) { 1180 if (!(dsc->dscr_a & M_DMA_ETHRX_BAD)) {
1181 1181
1182 /* 1182 /*
1183 * Add a new buffer to replace the old one. If we fail 1183 * Add a new buffer to replace the old one. If we fail
1184 * to allocate a buffer, we're going to drop this 1184 * to allocate a buffer, we're going to drop this
1185 * packet and put it right back on the receive ring. 1185 * packet and put it right back on the receive ring.
1186 */ 1186 */
1187 1187
1188 if (sbdma_add_rcvbuffer(d,NULL) == -ENOBUFS) { 1188 if (sbdma_add_rcvbuffer(d,NULL) == -ENOBUFS) {
1189 sc->sbm_stats.rx_dropped++; 1189 sc->sbm_stats.rx_dropped++;
1190 sbdma_add_rcvbuffer(d,sb); /* re-add old buffer */ 1190 sbdma_add_rcvbuffer(d,sb); /* re-add old buffer */
@@ -1193,7 +1193,7 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
1193 * Set length into the packet 1193 * Set length into the packet
1194 */ 1194 */
1195 skb_put(sb,len); 1195 skb_put(sb,len);
1196 1196
1197 /* 1197 /*
1198 * Buffer has been replaced on the 1198 * Buffer has been replaced on the
1199 * receive ring. Pass the buffer to 1199 * receive ring. Pass the buffer to
@@ -1212,7 +1212,7 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
1212 sb->ip_summed = CHECKSUM_NONE; 1212 sb->ip_summed = CHECKSUM_NONE;
1213 } 1213 }
1214 } 1214 }
1215 1215
1216 netif_rx(sb); 1216 netif_rx(sb);
1217 } 1217 }
1218 } else { 1218 } else {
@@ -1223,14 +1223,14 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
1223 sc->sbm_stats.rx_errors++; 1223 sc->sbm_stats.rx_errors++;
1224 sbdma_add_rcvbuffer(d,sb); 1224 sbdma_add_rcvbuffer(d,sb);
1225 } 1225 }
1226 1226
1227 1227
1228 /* 1228 /*
1229 * .. and advance to the next buffer. 1229 * .. and advance to the next buffer.
1230 */ 1230 */
1231 1231
1232 d->sbdma_remptr = SBDMA_NEXTBUF(d,sbdma_remptr); 1232 d->sbdma_remptr = SBDMA_NEXTBUF(d,sbdma_remptr);
1233 1233
1234 } 1234 }
1235} 1235}
1236 1236
@@ -1238,17 +1238,17 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
1238 1238
1239/********************************************************************** 1239/**********************************************************************
1240 * SBDMA_TX_PROCESS(sc,d) 1240 * SBDMA_TX_PROCESS(sc,d)
1241 * 1241 *
1242 * Process "completed" transmit buffers on the specified DMA channel. 1242 * Process "completed" transmit buffers on the specified DMA channel.
1243 * This is normally called within the interrupt service routine. 1243 * This is normally called within the interrupt service routine.
1244 * Note that this isn't really ideal for priority channels, since 1244 * Note that this isn't really ideal for priority channels, since
1245 * it processes all of the packets on a given channel before 1245 * it processes all of the packets on a given channel before
1246 * returning. 1246 * returning.
1247 * 1247 *
1248 * Input parameters: 1248 * Input parameters:
1249 * sc - softc structure 1249 * sc - softc structure
1250 * d - DMA channel context 1250 * d - DMA channel context
1251 * 1251 *
1252 * Return value: 1252 * Return value:
1253 * nothing 1253 * nothing
1254 ********************************************************************* */ 1254 ********************************************************************* */
@@ -1262,19 +1262,19 @@ static void sbdma_tx_process(struct sbmac_softc *sc,sbmacdma_t *d)
1262 unsigned long flags; 1262 unsigned long flags;
1263 1263
1264 spin_lock_irqsave(&(sc->sbm_lock), flags); 1264 spin_lock_irqsave(&(sc->sbm_lock), flags);
1265 1265
1266 for (;;) { 1266 for (;;) {
1267 /* 1267 /*
1268 * figure out where we are (as an index) and where 1268 * figure out where we are (as an index) and where
1269 * the hardware is (also as an index) 1269 * the hardware is (also as an index)
1270 * 1270 *
1271 * This could be done faster if (for example) the 1271 * This could be done faster if (for example) the
1272 * descriptor table was page-aligned and contiguous in 1272 * descriptor table was page-aligned and contiguous in
1273 * both virtual and physical memory -- you could then 1273 * both virtual and physical memory -- you could then
1274 * just compare the low-order bits of the virtual address 1274 * just compare the low-order bits of the virtual address
1275 * (sbdma_remptr) and the physical address (sbdma_curdscr CSR) 1275 * (sbdma_remptr) and the physical address (sbdma_curdscr CSR)
1276 */ 1276 */
1277 1277
1278 curidx = d->sbdma_remptr - d->sbdma_dscrtable; 1278 curidx = d->sbdma_remptr - d->sbdma_dscrtable;
1279 hwidx = (int) (((__raw_readq(d->sbdma_curdscr) & M_DMA_CURDSCR_ADDR) - 1279 hwidx = (int) (((__raw_readq(d->sbdma_curdscr) & M_DMA_CURDSCR_ADDR) -
1280 d->sbdma_dscrtable_phys) / sizeof(sbdmadscr_t)); 1280 d->sbdma_dscrtable_phys) / sizeof(sbdmadscr_t));
@@ -1284,75 +1284,75 @@ static void sbdma_tx_process(struct sbmac_softc *sc,sbmacdma_t *d)
1284 * of the descriptors up to (but not including) the one that 1284 * of the descriptors up to (but not including) the one that
1285 * the hardware is working on right now. 1285 * the hardware is working on right now.
1286 */ 1286 */
1287 1287
1288 if (curidx == hwidx) 1288 if (curidx == hwidx)
1289 break; 1289 break;
1290 1290
1291 /* 1291 /*
1292 * Otherwise, get the packet's sk_buff ptr back 1292 * Otherwise, get the packet's sk_buff ptr back
1293 */ 1293 */
1294 1294
1295 dsc = &(d->sbdma_dscrtable[curidx]); 1295 dsc = &(d->sbdma_dscrtable[curidx]);
1296 sb = d->sbdma_ctxtable[curidx]; 1296 sb = d->sbdma_ctxtable[curidx];
1297 d->sbdma_ctxtable[curidx] = NULL; 1297 d->sbdma_ctxtable[curidx] = NULL;
1298 1298
1299 /* 1299 /*
1300 * Stats 1300 * Stats
1301 */ 1301 */
1302 1302
1303 sc->sbm_stats.tx_bytes += sb->len; 1303 sc->sbm_stats.tx_bytes += sb->len;
1304 sc->sbm_stats.tx_packets++; 1304 sc->sbm_stats.tx_packets++;
1305 1305
1306 /* 1306 /*
1307 * for transmits, we just free buffers. 1307 * for transmits, we just free buffers.
1308 */ 1308 */
1309 1309
1310 dev_kfree_skb_irq(sb); 1310 dev_kfree_skb_irq(sb);
1311 1311
1312 /* 1312 /*
1313 * .. and advance to the next buffer. 1313 * .. and advance to the next buffer.
1314 */ 1314 */
1315 1315
1316 d->sbdma_remptr = SBDMA_NEXTBUF(d,sbdma_remptr); 1316 d->sbdma_remptr = SBDMA_NEXTBUF(d,sbdma_remptr);
1317 1317
1318 } 1318 }
1319 1319
1320 /* 1320 /*
1321 * Decide if we should wake up the protocol or not. 1321 * Decide if we should wake up the protocol or not.
1322 * Other drivers seem to do this when we reach a low 1322 * Other drivers seem to do this when we reach a low
1323 * watermark on the transmit queue. 1323 * watermark on the transmit queue.
1324 */ 1324 */
1325 1325
1326 netif_wake_queue(d->sbdma_eth->sbm_dev); 1326 netif_wake_queue(d->sbdma_eth->sbm_dev);
1327 1327
1328 spin_unlock_irqrestore(&(sc->sbm_lock), flags); 1328 spin_unlock_irqrestore(&(sc->sbm_lock), flags);
1329 1329
1330} 1330}
1331 1331
1332 1332
1333 1333
1334/********************************************************************** 1334/**********************************************************************
1335 * SBMAC_INITCTX(s) 1335 * SBMAC_INITCTX(s)
1336 * 1336 *
1337 * Initialize an Ethernet context structure - this is called 1337 * Initialize an Ethernet context structure - this is called
1338 * once per MAC on the 1250. Memory is allocated here, so don't 1338 * once per MAC on the 1250. Memory is allocated here, so don't
1339 * call it again from inside the ioctl routines that bring the 1339 * call it again from inside the ioctl routines that bring the
1340 * interface up/down 1340 * interface up/down
1341 * 1341 *
1342 * Input parameters: 1342 * Input parameters:
1343 * s - sbmac context structure 1343 * s - sbmac context structure
1344 * 1344 *
1345 * Return value: 1345 * Return value:
1346 * 0 1346 * 0
1347 ********************************************************************* */ 1347 ********************************************************************* */
1348 1348
1349static int sbmac_initctx(struct sbmac_softc *s) 1349static int sbmac_initctx(struct sbmac_softc *s)
1350{ 1350{
1351 1351
1352 /* 1352 /*
1353 * figure out the addresses of some ports 1353 * figure out the addresses of some ports
1354 */ 1354 */
1355 1355
1356 s->sbm_macenable = s->sbm_base + R_MAC_ENABLE; 1356 s->sbm_macenable = s->sbm_base + R_MAC_ENABLE;
1357 s->sbm_maccfg = s->sbm_base + R_MAC_CFG; 1357 s->sbm_maccfg = s->sbm_base + R_MAC_CFG;
1358 s->sbm_fifocfg = s->sbm_base + R_MAC_THRSH_CFG; 1358 s->sbm_fifocfg = s->sbm_base + R_MAC_THRSH_CFG;
@@ -1369,29 +1369,29 @@ static int sbmac_initctx(struct sbmac_softc *s)
1369 s->sbm_phy_oldanlpar = 0; 1369 s->sbm_phy_oldanlpar = 0;
1370 s->sbm_phy_oldk1stsr = 0; 1370 s->sbm_phy_oldk1stsr = 0;
1371 s->sbm_phy_oldlinkstat = 0; 1371 s->sbm_phy_oldlinkstat = 0;
1372 1372
1373 /* 1373 /*
1374 * Initialize the DMA channels. Right now, only one per MAC is used 1374 * Initialize the DMA channels. Right now, only one per MAC is used
1375 * Note: Only do this _once_, as it allocates memory from the kernel! 1375 * Note: Only do this _once_, as it allocates memory from the kernel!
1376 */ 1376 */
1377 1377
1378 sbdma_initctx(&(s->sbm_txdma),s,0,DMA_TX,SBMAC_MAX_TXDESCR); 1378 sbdma_initctx(&(s->sbm_txdma),s,0,DMA_TX,SBMAC_MAX_TXDESCR);
1379 sbdma_initctx(&(s->sbm_rxdma),s,0,DMA_RX,SBMAC_MAX_RXDESCR); 1379 sbdma_initctx(&(s->sbm_rxdma),s,0,DMA_RX,SBMAC_MAX_RXDESCR);
1380 1380
1381 /* 1381 /*
1382 * initial state is OFF 1382 * initial state is OFF
1383 */ 1383 */
1384 1384
1385 s->sbm_state = sbmac_state_off; 1385 s->sbm_state = sbmac_state_off;
1386 1386
1387 /* 1387 /*
1388 * Initial speed is (XXX TEMP) 10MBit/s HDX no FC 1388 * Initial speed is (XXX TEMP) 10MBit/s HDX no FC
1389 */ 1389 */
1390 1390
1391 s->sbm_speed = sbmac_speed_10; 1391 s->sbm_speed = sbmac_speed_10;
1392 s->sbm_duplex = sbmac_duplex_half; 1392 s->sbm_duplex = sbmac_duplex_half;
1393 s->sbm_fc = sbmac_fc_disabled; 1393 s->sbm_fc = sbmac_fc_disabled;
1394 1394
1395 return 0; 1395 return 0;
1396} 1396}
1397 1397
@@ -1402,7 +1402,7 @@ static void sbdma_uninitctx(struct sbmacdma_s *d)
1402 kfree(d->sbdma_dscrtable); 1402 kfree(d->sbdma_dscrtable);
1403 d->sbdma_dscrtable = NULL; 1403 d->sbdma_dscrtable = NULL;
1404 } 1404 }
1405 1405
1406 if (d->sbdma_ctxtable) { 1406 if (d->sbdma_ctxtable) {
1407 kfree(d->sbdma_ctxtable); 1407 kfree(d->sbdma_ctxtable);
1408 d->sbdma_ctxtable = NULL; 1408 d->sbdma_ctxtable = NULL;
@@ -1419,12 +1419,12 @@ static void sbmac_uninitctx(struct sbmac_softc *sc)
1419 1419
1420/********************************************************************** 1420/**********************************************************************
1421 * SBMAC_CHANNEL_START(s) 1421 * SBMAC_CHANNEL_START(s)
1422 * 1422 *
1423 * Start packet processing on this MAC. 1423 * Start packet processing on this MAC.
1424 * 1424 *
1425 * Input parameters: 1425 * Input parameters:
1426 * s - sbmac structure 1426 * s - sbmac structure
1427 * 1427 *
1428 * Return value: 1428 * Return value:
1429 * nothing 1429 * nothing
1430 ********************************************************************* */ 1430 ********************************************************************* */
@@ -1435,46 +1435,46 @@ static void sbmac_channel_start(struct sbmac_softc *s)
1435 volatile void __iomem *port; 1435 volatile void __iomem *port;
1436 uint64_t cfg,fifo,framecfg; 1436 uint64_t cfg,fifo,framecfg;
1437 int idx, th_value; 1437 int idx, th_value;
1438 1438
1439 /* 1439 /*
1440 * Don't do this if running 1440 * Don't do this if running
1441 */ 1441 */
1442 1442
1443 if (s->sbm_state == sbmac_state_on) 1443 if (s->sbm_state == sbmac_state_on)
1444 return; 1444 return;
1445 1445
1446 /* 1446 /*
1447 * Bring the controller out of reset, but leave it off. 1447 * Bring the controller out of reset, but leave it off.
1448 */ 1448 */
1449 1449
1450 __raw_writeq(0, s->sbm_macenable); 1450 __raw_writeq(0, s->sbm_macenable);
1451 1451
1452 /* 1452 /*
1453 * Ignore all received packets 1453 * Ignore all received packets
1454 */ 1454 */
1455 1455
1456 __raw_writeq(0, s->sbm_rxfilter); 1456 __raw_writeq(0, s->sbm_rxfilter);
1457 1457
1458 /* 1458 /*
1459 * Calculate values for various control registers. 1459 * Calculate values for various control registers.
1460 */ 1460 */
1461 1461
1462 cfg = M_MAC_RETRY_EN | 1462 cfg = M_MAC_RETRY_EN |
1463 M_MAC_TX_HOLD_SOP_EN | 1463 M_MAC_TX_HOLD_SOP_EN |
1464 V_MAC_TX_PAUSE_CNT_16K | 1464 V_MAC_TX_PAUSE_CNT_16K |
1465 M_MAC_AP_STAT_EN | 1465 M_MAC_AP_STAT_EN |
1466 M_MAC_FAST_SYNC | 1466 M_MAC_FAST_SYNC |
1467 M_MAC_SS_EN | 1467 M_MAC_SS_EN |
1468 0; 1468 0;
1469 1469
1470 /* 1470 /*
1471 * Be sure that RD_THRSH+WR_THRSH <= 32 for pass1 pars 1471 * Be sure that RD_THRSH+WR_THRSH <= 32 for pass1 pars
1472 * and make sure that RD_THRSH + WR_THRSH <=128 for pass2 and above 1472 * and make sure that RD_THRSH + WR_THRSH <=128 for pass2 and above
1473 * Use a larger RD_THRSH for gigabit 1473 * Use a larger RD_THRSH for gigabit
1474 */ 1474 */
1475 if (periph_rev >= 2) 1475 if (periph_rev >= 2)
1476 th_value = 64; 1476 th_value = 64;
1477 else 1477 else
1478 th_value = 28; 1478 th_value = 28;
1479 1479
1480 fifo = V_MAC_TX_WR_THRSH(4) | /* Must be '4' or '8' */ 1480 fifo = V_MAC_TX_WR_THRSH(4) | /* Must be '4' or '8' */
@@ -1492,29 +1492,29 @@ static void sbmac_channel_start(struct sbmac_softc *s)
1492 V_MAC_BACKOFF_SEL(1); 1492 V_MAC_BACKOFF_SEL(1);
1493 1493
1494 /* 1494 /*
1495 * Clear out the hash address map 1495 * Clear out the hash address map
1496 */ 1496 */
1497 1497
1498 port = s->sbm_base + R_MAC_HASH_BASE; 1498 port = s->sbm_base + R_MAC_HASH_BASE;
1499 for (idx = 0; idx < MAC_HASH_COUNT; idx++) { 1499 for (idx = 0; idx < MAC_HASH_COUNT; idx++) {
1500 __raw_writeq(0, port); 1500 __raw_writeq(0, port);
1501 port += sizeof(uint64_t); 1501 port += sizeof(uint64_t);
1502 } 1502 }
1503 1503
1504 /* 1504 /*
1505 * Clear out the exact-match table 1505 * Clear out the exact-match table
1506 */ 1506 */
1507 1507
1508 port = s->sbm_base + R_MAC_ADDR_BASE; 1508 port = s->sbm_base + R_MAC_ADDR_BASE;
1509 for (idx = 0; idx < MAC_ADDR_COUNT; idx++) { 1509 for (idx = 0; idx < MAC_ADDR_COUNT; idx++) {
1510 __raw_writeq(0, port); 1510 __raw_writeq(0, port);
1511 port += sizeof(uint64_t); 1511 port += sizeof(uint64_t);
1512 } 1512 }
1513 1513
1514 /* 1514 /*
1515 * Clear out the DMA Channel mapping table registers 1515 * Clear out the DMA Channel mapping table registers
1516 */ 1516 */
1517 1517
1518 port = s->sbm_base + R_MAC_CHUP0_BASE; 1518 port = s->sbm_base + R_MAC_CHUP0_BASE;
1519 for (idx = 0; idx < MAC_CHMAP_COUNT; idx++) { 1519 for (idx = 0; idx < MAC_CHMAP_COUNT; idx++) {
1520 __raw_writeq(0, port); 1520 __raw_writeq(0, port);
@@ -1527,14 +1527,14 @@ static void sbmac_channel_start(struct sbmac_softc *s)
1527 __raw_writeq(0, port); 1527 __raw_writeq(0, port);
1528 port += sizeof(uint64_t); 1528 port += sizeof(uint64_t);
1529 } 1529 }
1530 1530
1531 /* 1531 /*
1532 * Program the hardware address. It goes into the hardware-address 1532 * Program the hardware address. It goes into the hardware-address
1533 * register as well as the first filter register. 1533 * register as well as the first filter register.
1534 */ 1534 */
1535 1535
1536 reg = sbmac_addr2reg(s->sbm_hwaddr); 1536 reg = sbmac_addr2reg(s->sbm_hwaddr);
1537 1537
1538 port = s->sbm_base + R_MAC_ADDR_BASE; 1538 port = s->sbm_base + R_MAC_ADDR_BASE;
1539 __raw_writeq(reg, port); 1539 __raw_writeq(reg, port);
1540 port = s->sbm_base + R_MAC_ETHERNET_ADDR; 1540 port = s->sbm_base + R_MAC_ETHERNET_ADDR;
@@ -1549,48 +1549,48 @@ static void sbmac_channel_start(struct sbmac_softc *s)
1549#else 1549#else
1550 __raw_writeq(reg, port); 1550 __raw_writeq(reg, port);
1551#endif 1551#endif
1552 1552
1553 /* 1553 /*
1554 * Set the receive filter for no packets, and write values 1554 * Set the receive filter for no packets, and write values
1555 * to the various config registers 1555 * to the various config registers
1556 */ 1556 */
1557 1557
1558 __raw_writeq(0, s->sbm_rxfilter); 1558 __raw_writeq(0, s->sbm_rxfilter);
1559 __raw_writeq(0, s->sbm_imr); 1559 __raw_writeq(0, s->sbm_imr);
1560 __raw_writeq(framecfg, s->sbm_framecfg); 1560 __raw_writeq(framecfg, s->sbm_framecfg);
1561 __raw_writeq(fifo, s->sbm_fifocfg); 1561 __raw_writeq(fifo, s->sbm_fifocfg);
1562 __raw_writeq(cfg, s->sbm_maccfg); 1562 __raw_writeq(cfg, s->sbm_maccfg);
1563 1563
1564 /* 1564 /*
1565 * Initialize DMA channels (rings should be ok now) 1565 * Initialize DMA channels (rings should be ok now)
1566 */ 1566 */
1567 1567
1568 sbdma_channel_start(&(s->sbm_rxdma), DMA_RX); 1568 sbdma_channel_start(&(s->sbm_rxdma), DMA_RX);
1569 sbdma_channel_start(&(s->sbm_txdma), DMA_TX); 1569 sbdma_channel_start(&(s->sbm_txdma), DMA_TX);
1570 1570
1571 /* 1571 /*
1572 * Configure the speed, duplex, and flow control 1572 * Configure the speed, duplex, and flow control
1573 */ 1573 */
1574 1574
1575 sbmac_set_speed(s,s->sbm_speed); 1575 sbmac_set_speed(s,s->sbm_speed);
1576 sbmac_set_duplex(s,s->sbm_duplex,s->sbm_fc); 1576 sbmac_set_duplex(s,s->sbm_duplex,s->sbm_fc);
1577 1577
1578 /* 1578 /*
1579 * Fill the receive ring 1579 * Fill the receive ring
1580 */ 1580 */
1581 1581
1582 sbdma_fillring(&(s->sbm_rxdma)); 1582 sbdma_fillring(&(s->sbm_rxdma));
1583 1583
1584 /* 1584 /*
1585 * Turn on the rest of the bits in the enable register 1585 * Turn on the rest of the bits in the enable register
1586 */ 1586 */
1587 1587
1588 __raw_writeq(M_MAC_RXDMA_EN0 | 1588 __raw_writeq(M_MAC_RXDMA_EN0 |
1589 M_MAC_TXDMA_EN0 | 1589 M_MAC_TXDMA_EN0 |
1590 M_MAC_RX_ENABLE | 1590 M_MAC_RX_ENABLE |
1591 M_MAC_TX_ENABLE, s->sbm_macenable); 1591 M_MAC_TX_ENABLE, s->sbm_macenable);
1592 1592
1593 1593
1594 1594
1595 1595
1596#ifdef CONFIG_SBMAC_COALESCE 1596#ifdef CONFIG_SBMAC_COALESCE
@@ -1606,44 +1606,44 @@ static void sbmac_channel_start(struct sbmac_softc *s)
1606 __raw_writeq((M_MAC_INT_CHANNEL << S_MAC_TX_CH0) | 1606 __raw_writeq((M_MAC_INT_CHANNEL << S_MAC_TX_CH0) |
1607 (M_MAC_INT_CHANNEL << S_MAC_RX_CH0), s->sbm_imr); 1607 (M_MAC_INT_CHANNEL << S_MAC_RX_CH0), s->sbm_imr);
1608#endif 1608#endif
1609 1609
1610 /* 1610 /*
1611 * Enable receiving unicasts and broadcasts 1611 * Enable receiving unicasts and broadcasts
1612 */ 1612 */
1613 1613
1614 __raw_writeq(M_MAC_UCAST_EN | M_MAC_BCAST_EN, s->sbm_rxfilter); 1614 __raw_writeq(M_MAC_UCAST_EN | M_MAC_BCAST_EN, s->sbm_rxfilter);
1615 1615
1616 /* 1616 /*
1617 * we're running now. 1617 * we're running now.
1618 */ 1618 */
1619 1619
1620 s->sbm_state = sbmac_state_on; 1620 s->sbm_state = sbmac_state_on;
1621 1621
1622 /* 1622 /*
1623 * Program multicast addresses 1623 * Program multicast addresses
1624 */ 1624 */
1625 1625
1626 sbmac_setmulti(s); 1626 sbmac_setmulti(s);
1627 1627
1628 /* 1628 /*
1629 * If channel was in promiscuous mode before, turn that on 1629 * If channel was in promiscuous mode before, turn that on
1630 */ 1630 */
1631 1631
1632 if (s->sbm_devflags & IFF_PROMISC) { 1632 if (s->sbm_devflags & IFF_PROMISC) {
1633 sbmac_promiscuous_mode(s,1); 1633 sbmac_promiscuous_mode(s,1);
1634 } 1634 }
1635 1635
1636} 1636}
1637 1637
1638 1638
1639/********************************************************************** 1639/**********************************************************************
1640 * SBMAC_CHANNEL_STOP(s) 1640 * SBMAC_CHANNEL_STOP(s)
1641 * 1641 *
1642 * Stop packet processing on this MAC. 1642 * Stop packet processing on this MAC.
1643 * 1643 *
1644 * Input parameters: 1644 * Input parameters:
1645 * s - sbmac structure 1645 * s - sbmac structure
1646 * 1646 *
1647 * Return value: 1647 * Return value:
1648 * nothing 1648 * nothing
1649 ********************************************************************* */ 1649 ********************************************************************* */
@@ -1651,49 +1651,49 @@ static void sbmac_channel_start(struct sbmac_softc *s)
1651static void sbmac_channel_stop(struct sbmac_softc *s) 1651static void sbmac_channel_stop(struct sbmac_softc *s)
1652{ 1652{
1653 /* don't do this if already stopped */ 1653 /* don't do this if already stopped */
1654 1654
1655 if (s->sbm_state == sbmac_state_off) 1655 if (s->sbm_state == sbmac_state_off)
1656 return; 1656 return;
1657 1657
1658 /* don't accept any packets, disable all interrupts */ 1658 /* don't accept any packets, disable all interrupts */
1659 1659
1660 __raw_writeq(0, s->sbm_rxfilter); 1660 __raw_writeq(0, s->sbm_rxfilter);
1661 __raw_writeq(0, s->sbm_imr); 1661 __raw_writeq(0, s->sbm_imr);
1662 1662
1663 /* Turn off ticker */ 1663 /* Turn off ticker */
1664 1664
1665 /* XXX */ 1665 /* XXX */
1666 1666
1667 /* turn off receiver and transmitter */ 1667 /* turn off receiver and transmitter */
1668 1668
1669 __raw_writeq(0, s->sbm_macenable); 1669 __raw_writeq(0, s->sbm_macenable);
1670 1670
1671 /* We're stopped now. */ 1671 /* We're stopped now. */
1672 1672
1673 s->sbm_state = sbmac_state_off; 1673 s->sbm_state = sbmac_state_off;
1674 1674
1675 /* 1675 /*
1676 * Stop DMA channels (rings should be ok now) 1676 * Stop DMA channels (rings should be ok now)
1677 */ 1677 */
1678 1678
1679 sbdma_channel_stop(&(s->sbm_rxdma)); 1679 sbdma_channel_stop(&(s->sbm_rxdma));
1680 sbdma_channel_stop(&(s->sbm_txdma)); 1680 sbdma_channel_stop(&(s->sbm_txdma));
1681 1681
1682 /* Empty the receive and transmit rings */ 1682 /* Empty the receive and transmit rings */
1683 1683
1684 sbdma_emptyring(&(s->sbm_rxdma)); 1684 sbdma_emptyring(&(s->sbm_rxdma));
1685 sbdma_emptyring(&(s->sbm_txdma)); 1685 sbdma_emptyring(&(s->sbm_txdma));
1686 1686
1687} 1687}
1688 1688
1689/********************************************************************** 1689/**********************************************************************
1690 * SBMAC_SET_CHANNEL_STATE(state) 1690 * SBMAC_SET_CHANNEL_STATE(state)
1691 * 1691 *
1692 * Set the channel's state ON or OFF 1692 * Set the channel's state ON or OFF
1693 * 1693 *
1694 * Input parameters: 1694 * Input parameters:
1695 * state - new state 1695 * state - new state
1696 * 1696 *
1697 * Return value: 1697 * Return value:
1698 * old state 1698 * old state
1699 ********************************************************************* */ 1699 ********************************************************************* */
@@ -1701,43 +1701,43 @@ static sbmac_state_t sbmac_set_channel_state(struct sbmac_softc *sc,
1701 sbmac_state_t state) 1701 sbmac_state_t state)
1702{ 1702{
1703 sbmac_state_t oldstate = sc->sbm_state; 1703 sbmac_state_t oldstate = sc->sbm_state;
1704 1704
1705 /* 1705 /*
1706 * If same as previous state, return 1706 * If same as previous state, return
1707 */ 1707 */
1708 1708
1709 if (state == oldstate) { 1709 if (state == oldstate) {
1710 return oldstate; 1710 return oldstate;
1711 } 1711 }
1712 1712
1713 /* 1713 /*
1714 * If new state is ON, turn channel on 1714 * If new state is ON, turn channel on
1715 */ 1715 */
1716 1716
1717 if (state == sbmac_state_on) { 1717 if (state == sbmac_state_on) {
1718 sbmac_channel_start(sc); 1718 sbmac_channel_start(sc);
1719 } 1719 }
1720 else { 1720 else {
1721 sbmac_channel_stop(sc); 1721 sbmac_channel_stop(sc);
1722 } 1722 }
1723 1723
1724 /* 1724 /*
1725 * Return previous state 1725 * Return previous state
1726 */ 1726 */
1727 1727
1728 return oldstate; 1728 return oldstate;
1729} 1729}
1730 1730
1731 1731
1732/********************************************************************** 1732/**********************************************************************
1733 * SBMAC_PROMISCUOUS_MODE(sc,onoff) 1733 * SBMAC_PROMISCUOUS_MODE(sc,onoff)
1734 * 1734 *
1735 * Turn on or off promiscuous mode 1735 * Turn on or off promiscuous mode
1736 * 1736 *
1737 * Input parameters: 1737 * Input parameters:
1738 * sc - softc 1738 * sc - softc
1739 * onoff - 1 to turn on, 0 to turn off 1739 * onoff - 1 to turn on, 0 to turn off
1740 * 1740 *
1741 * Return value: 1741 * Return value:
1742 * nothing 1742 * nothing
1743 ********************************************************************* */ 1743 ********************************************************************* */
@@ -1745,15 +1745,15 @@ static sbmac_state_t sbmac_set_channel_state(struct sbmac_softc *sc,
1745static void sbmac_promiscuous_mode(struct sbmac_softc *sc,int onoff) 1745static void sbmac_promiscuous_mode(struct sbmac_softc *sc,int onoff)
1746{ 1746{
1747 uint64_t reg; 1747 uint64_t reg;
1748 1748
1749 if (sc->sbm_state != sbmac_state_on) 1749 if (sc->sbm_state != sbmac_state_on)
1750 return; 1750 return;
1751 1751
1752 if (onoff) { 1752 if (onoff) {
1753 reg = __raw_readq(sc->sbm_rxfilter); 1753 reg = __raw_readq(sc->sbm_rxfilter);
1754 reg |= M_MAC_ALLPKT_EN; 1754 reg |= M_MAC_ALLPKT_EN;
1755 __raw_writeq(reg, sc->sbm_rxfilter); 1755 __raw_writeq(reg, sc->sbm_rxfilter);
1756 } 1756 }
1757 else { 1757 else {
1758 reg = __raw_readq(sc->sbm_rxfilter); 1758 reg = __raw_readq(sc->sbm_rxfilter);
1759 reg &= ~M_MAC_ALLPKT_EN; 1759 reg &= ~M_MAC_ALLPKT_EN;
@@ -1763,12 +1763,12 @@ static void sbmac_promiscuous_mode(struct sbmac_softc *sc,int onoff)
1763 1763
1764/********************************************************************** 1764/**********************************************************************
1765 * SBMAC_SETIPHDR_OFFSET(sc,onoff) 1765 * SBMAC_SETIPHDR_OFFSET(sc,onoff)
1766 * 1766 *
1767 * Set the iphdr offset as 15 assuming ethernet encapsulation 1767 * Set the iphdr offset as 15 assuming ethernet encapsulation
1768 * 1768 *
1769 * Input parameters: 1769 * Input parameters:
1770 * sc - softc 1770 * sc - softc
1771 * 1771 *
1772 * Return value: 1772 * Return value:
1773 * nothing 1773 * nothing
1774 ********************************************************************* */ 1774 ********************************************************************* */
@@ -1776,12 +1776,12 @@ static void sbmac_promiscuous_mode(struct sbmac_softc *sc,int onoff)
1776static void sbmac_set_iphdr_offset(struct sbmac_softc *sc) 1776static void sbmac_set_iphdr_offset(struct sbmac_softc *sc)
1777{ 1777{
1778 uint64_t reg; 1778 uint64_t reg;
1779 1779
1780 /* Hard code the off set to 15 for now */ 1780 /* Hard code the off set to 15 for now */
1781 reg = __raw_readq(sc->sbm_rxfilter); 1781 reg = __raw_readq(sc->sbm_rxfilter);
1782 reg &= ~M_MAC_IPHDR_OFFSET | V_MAC_IPHDR_OFFSET(15); 1782 reg &= ~M_MAC_IPHDR_OFFSET | V_MAC_IPHDR_OFFSET(15);
1783 __raw_writeq(reg, sc->sbm_rxfilter); 1783 __raw_writeq(reg, sc->sbm_rxfilter);
1784 1784
1785 /* read system identification to determine revision */ 1785 /* read system identification to determine revision */
1786 if (periph_rev >= 2) { 1786 if (periph_rev >= 2) {
1787 sc->rx_hw_checksum = ENABLE; 1787 sc->rx_hw_checksum = ENABLE;
@@ -1793,13 +1793,13 @@ static void sbmac_set_iphdr_offset(struct sbmac_softc *sc)
1793 1793
1794/********************************************************************** 1794/**********************************************************************
1795 * SBMAC_ADDR2REG(ptr) 1795 * SBMAC_ADDR2REG(ptr)
1796 * 1796 *
1797 * Convert six bytes into the 64-bit register value that 1797 * Convert six bytes into the 64-bit register value that
1798 * we typically write into the SBMAC's address/mcast registers 1798 * we typically write into the SBMAC's address/mcast registers
1799 * 1799 *
1800 * Input parameters: 1800 * Input parameters:
1801 * ptr - pointer to 6 bytes 1801 * ptr - pointer to 6 bytes
1802 * 1802 *
1803 * Return value: 1803 * Return value:
1804 * register value 1804 * register value
1805 ********************************************************************* */ 1805 ********************************************************************* */
@@ -1807,35 +1807,35 @@ static void sbmac_set_iphdr_offset(struct sbmac_softc *sc)
1807static uint64_t sbmac_addr2reg(unsigned char *ptr) 1807static uint64_t sbmac_addr2reg(unsigned char *ptr)
1808{ 1808{
1809 uint64_t reg = 0; 1809 uint64_t reg = 0;
1810 1810
1811 ptr += 6; 1811 ptr += 6;
1812 1812
1813 reg |= (uint64_t) *(--ptr); 1813 reg |= (uint64_t) *(--ptr);
1814 reg <<= 8; 1814 reg <<= 8;
1815 reg |= (uint64_t) *(--ptr); 1815 reg |= (uint64_t) *(--ptr);
1816 reg <<= 8; 1816 reg <<= 8;
1817 reg |= (uint64_t) *(--ptr); 1817 reg |= (uint64_t) *(--ptr);
1818 reg <<= 8; 1818 reg <<= 8;
1819 reg |= (uint64_t) *(--ptr); 1819 reg |= (uint64_t) *(--ptr);
1820 reg <<= 8; 1820 reg <<= 8;
1821 reg |= (uint64_t) *(--ptr); 1821 reg |= (uint64_t) *(--ptr);
1822 reg <<= 8; 1822 reg <<= 8;
1823 reg |= (uint64_t) *(--ptr); 1823 reg |= (uint64_t) *(--ptr);
1824 1824
1825 return reg; 1825 return reg;
1826} 1826}
1827 1827
1828 1828
1829/********************************************************************** 1829/**********************************************************************
1830 * SBMAC_SET_SPEED(s,speed) 1830 * SBMAC_SET_SPEED(s,speed)
1831 * 1831 *
1832 * Configure LAN speed for the specified MAC. 1832 * Configure LAN speed for the specified MAC.
1833 * Warning: must be called when MAC is off! 1833 * Warning: must be called when MAC is off!
1834 * 1834 *
1835 * Input parameters: 1835 * Input parameters:
1836 * s - sbmac structure 1836 * s - sbmac structure
1837 * speed - speed to set MAC to (see sbmac_speed_t enum) 1837 * speed - speed to set MAC to (see sbmac_speed_t enum)
1838 * 1838 *
1839 * Return value: 1839 * Return value:
1840 * 1 if successful 1840 * 1 if successful
1841 * 0 indicates invalid parameters 1841 * 0 indicates invalid parameters
@@ -1849,31 +1849,31 @@ static int sbmac_set_speed(struct sbmac_softc *s,sbmac_speed_t speed)
1849 /* 1849 /*
1850 * Save new current values 1850 * Save new current values
1851 */ 1851 */
1852 1852
1853 s->sbm_speed = speed; 1853 s->sbm_speed = speed;
1854 1854
1855 if (s->sbm_state == sbmac_state_on) 1855 if (s->sbm_state == sbmac_state_on)
1856 return 0; /* save for next restart */ 1856 return 0; /* save for next restart */
1857 1857
1858 /* 1858 /*
1859 * Read current register values 1859 * Read current register values
1860 */ 1860 */
1861 1861
1862 cfg = __raw_readq(s->sbm_maccfg); 1862 cfg = __raw_readq(s->sbm_maccfg);
1863 framecfg = __raw_readq(s->sbm_framecfg); 1863 framecfg = __raw_readq(s->sbm_framecfg);
1864 1864
1865 /* 1865 /*
1866 * Mask out the stuff we want to change 1866 * Mask out the stuff we want to change
1867 */ 1867 */
1868 1868
1869 cfg &= ~(M_MAC_BURST_EN | M_MAC_SPEED_SEL); 1869 cfg &= ~(M_MAC_BURST_EN | M_MAC_SPEED_SEL);
1870 framecfg &= ~(M_MAC_IFG_RX | M_MAC_IFG_TX | M_MAC_IFG_THRSH | 1870 framecfg &= ~(M_MAC_IFG_RX | M_MAC_IFG_TX | M_MAC_IFG_THRSH |
1871 M_MAC_SLOT_SIZE); 1871 M_MAC_SLOT_SIZE);
1872 1872
1873 /* 1873 /*
1874 * Now add in the new bits 1874 * Now add in the new bits
1875 */ 1875 */
1876 1876
1877 switch (speed) { 1877 switch (speed) {
1878 case sbmac_speed_10: 1878 case sbmac_speed_10:
1879 framecfg |= V_MAC_IFG_RX_10 | 1879 framecfg |= V_MAC_IFG_RX_10 |
@@ -1882,7 +1882,7 @@ static int sbmac_set_speed(struct sbmac_softc *s,sbmac_speed_t speed)
1882 V_MAC_SLOT_SIZE_10; 1882 V_MAC_SLOT_SIZE_10;
1883 cfg |= V_MAC_SPEED_SEL_10MBPS; 1883 cfg |= V_MAC_SPEED_SEL_10MBPS;
1884 break; 1884 break;
1885 1885
1886 case sbmac_speed_100: 1886 case sbmac_speed_100:
1887 framecfg |= V_MAC_IFG_RX_100 | 1887 framecfg |= V_MAC_IFG_RX_100 |
1888 V_MAC_IFG_TX_100 | 1888 V_MAC_IFG_TX_100 |
@@ -1890,7 +1890,7 @@ static int sbmac_set_speed(struct sbmac_softc *s,sbmac_speed_t speed)
1890 V_MAC_SLOT_SIZE_100; 1890 V_MAC_SLOT_SIZE_100;
1891 cfg |= V_MAC_SPEED_SEL_100MBPS ; 1891 cfg |= V_MAC_SPEED_SEL_100MBPS ;
1892 break; 1892 break;
1893 1893
1894 case sbmac_speed_1000: 1894 case sbmac_speed_1000:
1895 framecfg |= V_MAC_IFG_RX_1000 | 1895 framecfg |= V_MAC_IFG_RX_1000 |
1896 V_MAC_IFG_TX_1000 | 1896 V_MAC_IFG_TX_1000 |
@@ -1898,34 +1898,34 @@ static int sbmac_set_speed(struct sbmac_softc *s,sbmac_speed_t speed)
1898 V_MAC_SLOT_SIZE_1000; 1898 V_MAC_SLOT_SIZE_1000;
1899 cfg |= V_MAC_SPEED_SEL_1000MBPS | M_MAC_BURST_EN; 1899 cfg |= V_MAC_SPEED_SEL_1000MBPS | M_MAC_BURST_EN;
1900 break; 1900 break;
1901 1901
1902 case sbmac_speed_auto: /* XXX not implemented */ 1902 case sbmac_speed_auto: /* XXX not implemented */
1903 /* fall through */ 1903 /* fall through */
1904 default: 1904 default:
1905 return 0; 1905 return 0;
1906 } 1906 }
1907 1907
1908 /* 1908 /*
1909 * Send the bits back to the hardware 1909 * Send the bits back to the hardware
1910 */ 1910 */
1911 1911
1912 __raw_writeq(framecfg, s->sbm_framecfg); 1912 __raw_writeq(framecfg, s->sbm_framecfg);
1913 __raw_writeq(cfg, s->sbm_maccfg); 1913 __raw_writeq(cfg, s->sbm_maccfg);
1914 1914
1915 return 1; 1915 return 1;
1916} 1916}
1917 1917
1918/********************************************************************** 1918/**********************************************************************
1919 * SBMAC_SET_DUPLEX(s,duplex,fc) 1919 * SBMAC_SET_DUPLEX(s,duplex,fc)
1920 * 1920 *
1921 * Set Ethernet duplex and flow control options for this MAC 1921 * Set Ethernet duplex and flow control options for this MAC
1922 * Warning: must be called when MAC is off! 1922 * Warning: must be called when MAC is off!
1923 * 1923 *
1924 * Input parameters: 1924 * Input parameters:
1925 * s - sbmac structure 1925 * s - sbmac structure
1926 * duplex - duplex setting (see sbmac_duplex_t) 1926 * duplex - duplex setting (see sbmac_duplex_t)
1927 * fc - flow control setting (see sbmac_fc_t) 1927 * fc - flow control setting (see sbmac_fc_t)
1928 * 1928 *
1929 * Return value: 1929 * Return value:
1930 * 1 if ok 1930 * 1 if ok
1931 * 0 if an invalid parameter combination was specified 1931 * 0 if an invalid parameter combination was specified
@@ -1934,67 +1934,67 @@ static int sbmac_set_speed(struct sbmac_softc *s,sbmac_speed_t speed)
1934static int sbmac_set_duplex(struct sbmac_softc *s,sbmac_duplex_t duplex,sbmac_fc_t fc) 1934static int sbmac_set_duplex(struct sbmac_softc *s,sbmac_duplex_t duplex,sbmac_fc_t fc)
1935{ 1935{
1936 uint64_t cfg; 1936 uint64_t cfg;
1937 1937
1938 /* 1938 /*
1939 * Save new current values 1939 * Save new current values
1940 */ 1940 */
1941 1941
1942 s->sbm_duplex = duplex; 1942 s->sbm_duplex = duplex;
1943 s->sbm_fc = fc; 1943 s->sbm_fc = fc;
1944 1944
1945 if (s->sbm_state == sbmac_state_on) 1945 if (s->sbm_state == sbmac_state_on)
1946 return 0; /* save for next restart */ 1946 return 0; /* save for next restart */
1947 1947
1948 /* 1948 /*
1949 * Read current register values 1949 * Read current register values
1950 */ 1950 */
1951 1951
1952 cfg = __raw_readq(s->sbm_maccfg); 1952 cfg = __raw_readq(s->sbm_maccfg);
1953 1953
1954 /* 1954 /*
1955 * Mask off the stuff we're about to change 1955 * Mask off the stuff we're about to change
1956 */ 1956 */
1957 1957
1958 cfg &= ~(M_MAC_FC_SEL | M_MAC_FC_CMD | M_MAC_HDX_EN); 1958 cfg &= ~(M_MAC_FC_SEL | M_MAC_FC_CMD | M_MAC_HDX_EN);
1959 1959
1960 1960
1961 switch (duplex) { 1961 switch (duplex) {
1962 case sbmac_duplex_half: 1962 case sbmac_duplex_half:
1963 switch (fc) { 1963 switch (fc) {
1964 case sbmac_fc_disabled: 1964 case sbmac_fc_disabled:
1965 cfg |= M_MAC_HDX_EN | V_MAC_FC_CMD_DISABLED; 1965 cfg |= M_MAC_HDX_EN | V_MAC_FC_CMD_DISABLED;
1966 break; 1966 break;
1967 1967
1968 case sbmac_fc_collision: 1968 case sbmac_fc_collision:
1969 cfg |= M_MAC_HDX_EN | V_MAC_FC_CMD_ENABLED; 1969 cfg |= M_MAC_HDX_EN | V_MAC_FC_CMD_ENABLED;
1970 break; 1970 break;
1971 1971
1972 case sbmac_fc_carrier: 1972 case sbmac_fc_carrier:
1973 cfg |= M_MAC_HDX_EN | V_MAC_FC_CMD_ENAB_FALSECARR; 1973 cfg |= M_MAC_HDX_EN | V_MAC_FC_CMD_ENAB_FALSECARR;
1974 break; 1974 break;
1975 1975
1976 case sbmac_fc_auto: /* XXX not implemented */ 1976 case sbmac_fc_auto: /* XXX not implemented */
1977 /* fall through */ 1977 /* fall through */
1978 case sbmac_fc_frame: /* not valid in half duplex */ 1978 case sbmac_fc_frame: /* not valid in half duplex */
1979 default: /* invalid selection */ 1979 default: /* invalid selection */
1980 return 0; 1980 return 0;
1981 } 1981 }
1982 break; 1982 break;
1983 1983
1984 case sbmac_duplex_full: 1984 case sbmac_duplex_full:
1985 switch (fc) { 1985 switch (fc) {
1986 case sbmac_fc_disabled: 1986 case sbmac_fc_disabled:
1987 cfg |= V_MAC_FC_CMD_DISABLED; 1987 cfg |= V_MAC_FC_CMD_DISABLED;
1988 break; 1988 break;
1989 1989
1990 case sbmac_fc_frame: 1990 case sbmac_fc_frame:
1991 cfg |= V_MAC_FC_CMD_ENABLED; 1991 cfg |= V_MAC_FC_CMD_ENABLED;
1992 break; 1992 break;
1993 1993
1994 case sbmac_fc_collision: /* not valid in full duplex */ 1994 case sbmac_fc_collision: /* not valid in full duplex */
1995 case sbmac_fc_carrier: /* not valid in full duplex */ 1995 case sbmac_fc_carrier: /* not valid in full duplex */
1996 case sbmac_fc_auto: /* XXX not implemented */ 1996 case sbmac_fc_auto: /* XXX not implemented */
1997 /* fall through */ 1997 /* fall through */
1998 default: 1998 default:
1999 return 0; 1999 return 0;
2000 } 2000 }
@@ -2003,13 +2003,13 @@ static int sbmac_set_duplex(struct sbmac_softc *s,sbmac_duplex_t duplex,sbmac_fc
2003 /* XXX not implemented */ 2003 /* XXX not implemented */
2004 break; 2004 break;
2005 } 2005 }
2006 2006
2007 /* 2007 /*
2008 * Send the bits back to the hardware 2008 * Send the bits back to the hardware
2009 */ 2009 */
2010 2010
2011 __raw_writeq(cfg, s->sbm_maccfg); 2011 __raw_writeq(cfg, s->sbm_maccfg);
2012 2012
2013 return 1; 2013 return 1;
2014} 2014}
2015 2015
@@ -2018,12 +2018,12 @@ static int sbmac_set_duplex(struct sbmac_softc *s,sbmac_duplex_t duplex,sbmac_fc
2018 2018
2019/********************************************************************** 2019/**********************************************************************
2020 * SBMAC_INTR() 2020 * SBMAC_INTR()
2021 * 2021 *
2022 * Interrupt handler for MAC interrupts 2022 * Interrupt handler for MAC interrupts
2023 * 2023 *
2024 * Input parameters: 2024 * Input parameters:
2025 * MAC structure 2025 * MAC structure
2026 * 2026 *
2027 * Return value: 2027 * Return value:
2028 * nothing 2028 * nothing
2029 ********************************************************************* */ 2029 ********************************************************************* */
@@ -2035,27 +2035,27 @@ static irqreturn_t sbmac_intr(int irq,void *dev_instance,struct pt_regs *rgs)
2035 int handled = 0; 2035 int handled = 0;
2036 2036
2037 for (;;) { 2037 for (;;) {
2038 2038
2039 /* 2039 /*
2040 * Read the ISR (this clears the bits in the real 2040 * Read the ISR (this clears the bits in the real
2041 * register, except for counter addr) 2041 * register, except for counter addr)
2042 */ 2042 */
2043 2043
2044 isr = __raw_readq(sc->sbm_isr) & ~M_MAC_COUNTER_ADDR; 2044 isr = __raw_readq(sc->sbm_isr) & ~M_MAC_COUNTER_ADDR;
2045 2045
2046 if (isr == 0) 2046 if (isr == 0)
2047 break; 2047 break;
2048 2048
2049 handled = 1; 2049 handled = 1;
2050 2050
2051 /* 2051 /*
2052 * Transmits on channel 0 2052 * Transmits on channel 0
2053 */ 2053 */
2054 2054
2055 if (isr & (M_MAC_INT_CHANNEL << S_MAC_TX_CH0)) { 2055 if (isr & (M_MAC_INT_CHANNEL << S_MAC_TX_CH0)) {
2056 sbdma_tx_process(sc,&(sc->sbm_txdma)); 2056 sbdma_tx_process(sc,&(sc->sbm_txdma));
2057 } 2057 }
2058 2058
2059 /* 2059 /*
2060 * Receives on channel 0 2060 * Receives on channel 0
2061 */ 2061 */
@@ -2075,8 +2075,8 @@ static irqreturn_t sbmac_intr(int irq,void *dev_instance,struct pt_regs *rgs)
2075 * EOP_SEEN here takes care of this case. 2075 * EOP_SEEN here takes care of this case.
2076 * (EOP_SEEN is part of M_MAC_INT_CHANNEL << S_MAC_RX_CH0) 2076 * (EOP_SEEN is part of M_MAC_INT_CHANNEL << S_MAC_RX_CH0)
2077 */ 2077 */
2078 2078
2079 2079
2080 if (isr & (M_MAC_INT_CHANNEL << S_MAC_RX_CH0)) { 2080 if (isr & (M_MAC_INT_CHANNEL << S_MAC_RX_CH0)) {
2081 sbdma_rx_process(sc,&(sc->sbm_rxdma)); 2081 sbdma_rx_process(sc,&(sc->sbm_rxdma));
2082 } 2082 }
@@ -2087,29 +2087,29 @@ static irqreturn_t sbmac_intr(int irq,void *dev_instance,struct pt_regs *rgs)
2087 2087
2088/********************************************************************** 2088/**********************************************************************
2089 * SBMAC_START_TX(skb,dev) 2089 * SBMAC_START_TX(skb,dev)
2090 * 2090 *
2091 * Start output on the specified interface. Basically, we 2091 * Start output on the specified interface. Basically, we
2092 * queue as many buffers as we can until the ring fills up, or 2092 * queue as many buffers as we can until the ring fills up, or
2093 * we run off the end of the queue, whichever comes first. 2093 * we run off the end of the queue, whichever comes first.
2094 * 2094 *
2095 * Input parameters: 2095 * Input parameters:
2096 * 2096 *
2097 * 2097 *
2098 * Return value: 2098 * Return value:
2099 * nothing 2099 * nothing
2100 ********************************************************************* */ 2100 ********************************************************************* */
2101static int sbmac_start_tx(struct sk_buff *skb, struct net_device *dev) 2101static int sbmac_start_tx(struct sk_buff *skb, struct net_device *dev)
2102{ 2102{
2103 struct sbmac_softc *sc = netdev_priv(dev); 2103 struct sbmac_softc *sc = netdev_priv(dev);
2104 2104
2105 /* lock eth irq */ 2105 /* lock eth irq */
2106 spin_lock_irq (&sc->sbm_lock); 2106 spin_lock_irq (&sc->sbm_lock);
2107 2107
2108 /* 2108 /*
2109 * Put the buffer on the transmit ring. If we 2109 * Put the buffer on the transmit ring. If we
2110 * don't have room, stop the queue. 2110 * don't have room, stop the queue.
2111 */ 2111 */
2112 2112
2113 if (sbdma_add_txbuffer(&(sc->sbm_txdma),skb)) { 2113 if (sbdma_add_txbuffer(&(sc->sbm_txdma),skb)) {
2114 /* XXX save skb that we could not send */ 2114 /* XXX save skb that we could not send */
2115 netif_stop_queue(dev); 2115 netif_stop_queue(dev);
@@ -2117,24 +2117,24 @@ static int sbmac_start_tx(struct sk_buff *skb, struct net_device *dev)
2117 2117
2118 return 1; 2118 return 1;
2119 } 2119 }
2120 2120
2121 dev->trans_start = jiffies; 2121 dev->trans_start = jiffies;
2122 2122
2123 spin_unlock_irq (&sc->sbm_lock); 2123 spin_unlock_irq (&sc->sbm_lock);
2124 2124
2125 return 0; 2125 return 0;
2126} 2126}
2127 2127
2128/********************************************************************** 2128/**********************************************************************
2129 * SBMAC_SETMULTI(sc) 2129 * SBMAC_SETMULTI(sc)
2130 * 2130 *
2131 * Reprogram the multicast table into the hardware, given 2131 * Reprogram the multicast table into the hardware, given
2132 * the list of multicasts associated with the interface 2132 * the list of multicasts associated with the interface
2133 * structure. 2133 * structure.
2134 * 2134 *
2135 * Input parameters: 2135 * Input parameters:
2136 * sc - softc 2136 * sc - softc
2137 * 2137 *
2138 * Return value: 2138 * Return value:
2139 * nothing 2139 * nothing
2140 ********************************************************************* */ 2140 ********************************************************************* */
@@ -2146,52 +2146,52 @@ static void sbmac_setmulti(struct sbmac_softc *sc)
2146 int idx; 2146 int idx;
2147 struct dev_mc_list *mclist; 2147 struct dev_mc_list *mclist;
2148 struct net_device *dev = sc->sbm_dev; 2148 struct net_device *dev = sc->sbm_dev;
2149 2149
2150 /* 2150 /*
2151 * Clear out entire multicast table. We do this by nuking 2151 * Clear out entire multicast table. We do this by nuking
2152 * the entire hash table and all the direct matches except 2152 * the entire hash table and all the direct matches except
2153 * the first one, which is used for our station address 2153 * the first one, which is used for our station address
2154 */ 2154 */
2155 2155
2156 for (idx = 1; idx < MAC_ADDR_COUNT; idx++) { 2156 for (idx = 1; idx < MAC_ADDR_COUNT; idx++) {
2157 port = sc->sbm_base + R_MAC_ADDR_BASE+(idx*sizeof(uint64_t)); 2157 port = sc->sbm_base + R_MAC_ADDR_BASE+(idx*sizeof(uint64_t));
2158 __raw_writeq(0, port); 2158 __raw_writeq(0, port);
2159 } 2159 }
2160 2160
2161 for (idx = 0; idx < MAC_HASH_COUNT; idx++) { 2161 for (idx = 0; idx < MAC_HASH_COUNT; idx++) {
2162 port = sc->sbm_base + R_MAC_HASH_BASE+(idx*sizeof(uint64_t)); 2162 port = sc->sbm_base + R_MAC_HASH_BASE+(idx*sizeof(uint64_t));
2163 __raw_writeq(0, port); 2163 __raw_writeq(0, port);
2164 } 2164 }
2165 2165
2166 /* 2166 /*
2167 * Clear the filter to say we don't want any multicasts. 2167 * Clear the filter to say we don't want any multicasts.
2168 */ 2168 */
2169 2169
2170 reg = __raw_readq(sc->sbm_rxfilter); 2170 reg = __raw_readq(sc->sbm_rxfilter);
2171 reg &= ~(M_MAC_MCAST_INV | M_MAC_MCAST_EN); 2171 reg &= ~(M_MAC_MCAST_INV | M_MAC_MCAST_EN);
2172 __raw_writeq(reg, sc->sbm_rxfilter); 2172 __raw_writeq(reg, sc->sbm_rxfilter);
2173 2173
2174 if (dev->flags & IFF_ALLMULTI) { 2174 if (dev->flags & IFF_ALLMULTI) {
2175 /* 2175 /*
2176 * Enable ALL multicasts. Do this by inverting the 2176 * Enable ALL multicasts. Do this by inverting the
2177 * multicast enable bit. 2177 * multicast enable bit.
2178 */ 2178 */
2179 reg = __raw_readq(sc->sbm_rxfilter); 2179 reg = __raw_readq(sc->sbm_rxfilter);
2180 reg |= (M_MAC_MCAST_INV | M_MAC_MCAST_EN); 2180 reg |= (M_MAC_MCAST_INV | M_MAC_MCAST_EN);
2181 __raw_writeq(reg, sc->sbm_rxfilter); 2181 __raw_writeq(reg, sc->sbm_rxfilter);
2182 return; 2182 return;
2183 } 2183 }
2184
2185 2184
2186 /* 2185
2186 /*
2187 * Progam new multicast entries. For now, only use the 2187 * Progam new multicast entries. For now, only use the
2188 * perfect filter. In the future we'll need to use the 2188 * perfect filter. In the future we'll need to use the
2189 * hash filter if the perfect filter overflows 2189 * hash filter if the perfect filter overflows
2190 */ 2190 */
2191 2191
2192 /* XXX only using perfect filter for now, need to use hash 2192 /* XXX only using perfect filter for now, need to use hash
2193 * XXX if the table overflows */ 2193 * XXX if the table overflows */
2194 2194
2195 idx = 1; /* skip station address */ 2195 idx = 1; /* skip station address */
2196 mclist = dev->mc_list; 2196 mclist = dev->mc_list;
2197 while (mclist && (idx < MAC_ADDR_COUNT)) { 2197 while (mclist && (idx < MAC_ADDR_COUNT)) {
@@ -2201,12 +2201,12 @@ static void sbmac_setmulti(struct sbmac_softc *sc)
2201 idx++; 2201 idx++;
2202 mclist = mclist->next; 2202 mclist = mclist->next;
2203 } 2203 }
2204 2204
2205 /* 2205 /*
2206 * Enable the "accept multicast bits" if we programmed at least one 2206 * Enable the "accept multicast bits" if we programmed at least one
2207 * multicast. 2207 * multicast.
2208 */ 2208 */
2209 2209
2210 if (idx > 1) { 2210 if (idx > 1) {
2211 reg = __raw_readq(sc->sbm_rxfilter); 2211 reg = __raw_readq(sc->sbm_rxfilter);
2212 reg |= M_MAC_MCAST_EN; 2212 reg |= M_MAC_MCAST_EN;
@@ -2219,12 +2219,12 @@ static void sbmac_setmulti(struct sbmac_softc *sc)
2219#if defined(SBMAC_ETH0_HWADDR) || defined(SBMAC_ETH1_HWADDR) || defined(SBMAC_ETH2_HWADDR) 2219#if defined(SBMAC_ETH0_HWADDR) || defined(SBMAC_ETH1_HWADDR) || defined(SBMAC_ETH2_HWADDR)
2220/********************************************************************** 2220/**********************************************************************
2221 * SBMAC_PARSE_XDIGIT(str) 2221 * SBMAC_PARSE_XDIGIT(str)
2222 * 2222 *
2223 * Parse a hex digit, returning its value 2223 * Parse a hex digit, returning its value
2224 * 2224 *
2225 * Input parameters: 2225 * Input parameters:
2226 * str - character 2226 * str - character
2227 * 2227 *
2228 * Return value: 2228 * Return value:
2229 * hex value, or -1 if invalid 2229 * hex value, or -1 if invalid
2230 ********************************************************************* */ 2230 ********************************************************************* */
@@ -2232,7 +2232,7 @@ static void sbmac_setmulti(struct sbmac_softc *sc)
2232static int sbmac_parse_xdigit(char str) 2232static int sbmac_parse_xdigit(char str)
2233{ 2233{
2234 int digit; 2234 int digit;
2235 2235
2236 if ((str >= '0') && (str <= '9')) 2236 if ((str >= '0') && (str <= '9'))
2237 digit = str - '0'; 2237 digit = str - '0';
2238 else if ((str >= 'a') && (str <= 'f')) 2238 else if ((str >= 'a') && (str <= 'f'))
@@ -2241,20 +2241,20 @@ static int sbmac_parse_xdigit(char str)
2241 digit = str - 'A' + 10; 2241 digit = str - 'A' + 10;
2242 else 2242 else
2243 return -1; 2243 return -1;
2244 2244
2245 return digit; 2245 return digit;
2246} 2246}
2247 2247
2248/********************************************************************** 2248/**********************************************************************
2249 * SBMAC_PARSE_HWADDR(str,hwaddr) 2249 * SBMAC_PARSE_HWADDR(str,hwaddr)
2250 * 2250 *
2251 * Convert a string in the form xx:xx:xx:xx:xx:xx into a 6-byte 2251 * Convert a string in the form xx:xx:xx:xx:xx:xx into a 6-byte
2252 * Ethernet address. 2252 * Ethernet address.
2253 * 2253 *
2254 * Input parameters: 2254 * Input parameters:
2255 * str - string 2255 * str - string
2256 * hwaddr - pointer to hardware address 2256 * hwaddr - pointer to hardware address
2257 * 2257 *
2258 * Return value: 2258 * Return value:
2259 * 0 if ok, else -1 2259 * 0 if ok, else -1
2260 ********************************************************************* */ 2260 ********************************************************************* */
@@ -2263,7 +2263,7 @@ static int sbmac_parse_hwaddr(char *str, unsigned char *hwaddr)
2263{ 2263{
2264 int digit1,digit2; 2264 int digit1,digit2;
2265 int idx = 6; 2265 int idx = 6;
2266 2266
2267 while (*str && (idx > 0)) { 2267 while (*str && (idx > 0)) {
2268 digit1 = sbmac_parse_xdigit(*str); 2268 digit1 = sbmac_parse_xdigit(*str);
2269 if (digit1 < 0) 2269 if (digit1 < 0)
@@ -2271,7 +2271,7 @@ static int sbmac_parse_hwaddr(char *str, unsigned char *hwaddr)
2271 str++; 2271 str++;
2272 if (!*str) 2272 if (!*str)
2273 return -1; 2273 return -1;
2274 2274
2275 if ((*str == ':') || (*str == '-')) { 2275 if ((*str == ':') || (*str == '-')) {
2276 digit2 = digit1; 2276 digit2 = digit1;
2277 digit1 = 0; 2277 digit1 = 0;
@@ -2282,10 +2282,10 @@ static int sbmac_parse_hwaddr(char *str, unsigned char *hwaddr)
2282 return -1; 2282 return -1;
2283 str++; 2283 str++;
2284 } 2284 }
2285 2285
2286 *hwaddr++ = (digit1 << 4) | digit2; 2286 *hwaddr++ = (digit1 << 4) | digit2;
2287 idx--; 2287 idx--;
2288 2288
2289 if (*str == '-') 2289 if (*str == '-')
2290 str++; 2290 str++;
2291 if (*str == ':') 2291 if (*str == ':')
@@ -2306,12 +2306,12 @@ static int sb1250_change_mtu(struct net_device *_dev, int new_mtu)
2306 2306
2307/********************************************************************** 2307/**********************************************************************
2308 * SBMAC_INIT(dev) 2308 * SBMAC_INIT(dev)
2309 * 2309 *
2310 * Attach routine - init hardware and hook ourselves into linux 2310 * Attach routine - init hardware and hook ourselves into linux
2311 * 2311 *
2312 * Input parameters: 2312 * Input parameters:
2313 * dev - net_device structure 2313 * dev - net_device structure
2314 * 2314 *
2315 * Return value: 2315 * Return value:
2316 * status 2316 * status
2317 ********************************************************************* */ 2317 ********************************************************************* */
@@ -2323,53 +2323,53 @@ static int sbmac_init(struct net_device *dev, int idx)
2323 uint64_t ea_reg; 2323 uint64_t ea_reg;
2324 int i; 2324 int i;
2325 int err; 2325 int err;
2326 2326
2327 sc = netdev_priv(dev); 2327 sc = netdev_priv(dev);
2328 2328
2329 /* Determine controller base address */ 2329 /* Determine controller base address */
2330 2330
2331 sc->sbm_base = IOADDR(dev->base_addr); 2331 sc->sbm_base = IOADDR(dev->base_addr);
2332 sc->sbm_dev = dev; 2332 sc->sbm_dev = dev;
2333 sc->sbe_idx = idx; 2333 sc->sbe_idx = idx;
2334 2334
2335 eaddr = sc->sbm_hwaddr; 2335 eaddr = sc->sbm_hwaddr;
2336 2336
2337 /* 2337 /*
2338 * Read the ethernet address. The firwmare left this programmed 2338 * Read the ethernet address. The firwmare left this programmed
2339 * for us in the ethernet address register for each mac. 2339 * for us in the ethernet address register for each mac.
2340 */ 2340 */
2341 2341
2342 ea_reg = __raw_readq(sc->sbm_base + R_MAC_ETHERNET_ADDR); 2342 ea_reg = __raw_readq(sc->sbm_base + R_MAC_ETHERNET_ADDR);
2343 __raw_writeq(0, sc->sbm_base + R_MAC_ETHERNET_ADDR); 2343 __raw_writeq(0, sc->sbm_base + R_MAC_ETHERNET_ADDR);
2344 for (i = 0; i < 6; i++) { 2344 for (i = 0; i < 6; i++) {
2345 eaddr[i] = (uint8_t) (ea_reg & 0xFF); 2345 eaddr[i] = (uint8_t) (ea_reg & 0xFF);
2346 ea_reg >>= 8; 2346 ea_reg >>= 8;
2347 } 2347 }
2348 2348
2349 for (i = 0; i < 6; i++) { 2349 for (i = 0; i < 6; i++) {
2350 dev->dev_addr[i] = eaddr[i]; 2350 dev->dev_addr[i] = eaddr[i];
2351 } 2351 }
2352 2352
2353 2353
2354 /* 2354 /*
2355 * Init packet size 2355 * Init packet size
2356 */ 2356 */
2357 2357
2358 sc->sbm_buffersize = ENET_PACKET_SIZE + SMP_CACHE_BYTES * 2 + ETHER_ALIGN; 2358 sc->sbm_buffersize = ENET_PACKET_SIZE + SMP_CACHE_BYTES * 2 + ETHER_ALIGN;
2359 2359
2360 /* 2360 /*
2361 * Initialize context (get pointers to registers and stuff), then 2361 * Initialize context (get pointers to registers and stuff), then
2362 * allocate the memory for the descriptor tables. 2362 * allocate the memory for the descriptor tables.
2363 */ 2363 */
2364 2364
2365 sbmac_initctx(sc); 2365 sbmac_initctx(sc);
2366 2366
2367 /* 2367 /*
2368 * Set up Linux device callins 2368 * Set up Linux device callins
2369 */ 2369 */
2370 2370
2371 spin_lock_init(&(sc->sbm_lock)); 2371 spin_lock_init(&(sc->sbm_lock));
2372 2372
2373 dev->open = sbmac_open; 2373 dev->open = sbmac_open;
2374 dev->hard_start_xmit = sbmac_start_tx; 2374 dev->hard_start_xmit = sbmac_start_tx;
2375 dev->stop = sbmac_close; 2375 dev->stop = sbmac_close;
@@ -2399,10 +2399,10 @@ static int sbmac_init(struct net_device *dev, int idx)
2399 * was being displayed) 2399 * was being displayed)
2400 */ 2400 */
2401 printk(KERN_INFO 2401 printk(KERN_INFO
2402 "%s: SiByte Ethernet at 0x%08lX, address: %02X:%02X:%02X:%02X:%02X:%02X\n", 2402 "%s: SiByte Ethernet at 0x%08lX, address: %02X:%02X:%02X:%02X:%02X:%02X\n",
2403 dev->name, dev->base_addr, 2403 dev->name, dev->base_addr,
2404 eaddr[0],eaddr[1],eaddr[2],eaddr[3],eaddr[4],eaddr[5]); 2404 eaddr[0],eaddr[1],eaddr[2],eaddr[3],eaddr[4],eaddr[5]);
2405 2405
2406 2406
2407 return 0; 2407 return 0;
2408 2408
@@ -2416,12 +2416,12 @@ out_uninit:
2416static int sbmac_open(struct net_device *dev) 2416static int sbmac_open(struct net_device *dev)
2417{ 2417{
2418 struct sbmac_softc *sc = netdev_priv(dev); 2418 struct sbmac_softc *sc = netdev_priv(dev);
2419 2419
2420 if (debug > 1) { 2420 if (debug > 1) {
2421 printk(KERN_DEBUG "%s: sbmac_open() irq %d.\n", dev->name, dev->irq); 2421 printk(KERN_DEBUG "%s: sbmac_open() irq %d.\n", dev->name, dev->irq);
2422 } 2422 }
2423 2423
2424 /* 2424 /*
2425 * map/route interrupt (clear status first, in case something 2425 * map/route interrupt (clear status first, in case something
2426 * weird is pending; we haven't initialized the mac registers 2426 * weird is pending; we haven't initialized the mac registers
2427 * yet) 2427 * yet)
@@ -2432,35 +2432,35 @@ static int sbmac_open(struct net_device *dev)
2432 return -EBUSY; 2432 return -EBUSY;
2433 2433
2434 /* 2434 /*
2435 * Configure default speed 2435 * Configure default speed
2436 */ 2436 */
2437 2437
2438 sbmac_mii_poll(sc,noisy_mii); 2438 sbmac_mii_poll(sc,noisy_mii);
2439 2439
2440 /* 2440 /*
2441 * Turn on the channel 2441 * Turn on the channel
2442 */ 2442 */
2443 2443
2444 sbmac_set_channel_state(sc,sbmac_state_on); 2444 sbmac_set_channel_state(sc,sbmac_state_on);
2445 2445
2446 /* 2446 /*
2447 * XXX Station address is in dev->dev_addr 2447 * XXX Station address is in dev->dev_addr
2448 */ 2448 */
2449 2449
2450 if (dev->if_port == 0) 2450 if (dev->if_port == 0)
2451 dev->if_port = 0; 2451 dev->if_port = 0;
2452 2452
2453 netif_start_queue(dev); 2453 netif_start_queue(dev);
2454 2454
2455 sbmac_set_rx_mode(dev); 2455 sbmac_set_rx_mode(dev);
2456 2456
2457 /* Set the timer to check for link beat. */ 2457 /* Set the timer to check for link beat. */
2458 init_timer(&sc->sbm_timer); 2458 init_timer(&sc->sbm_timer);
2459 sc->sbm_timer.expires = jiffies + 2 * HZ/100; 2459 sc->sbm_timer.expires = jiffies + 2 * HZ/100;
2460 sc->sbm_timer.data = (unsigned long)dev; 2460 sc->sbm_timer.data = (unsigned long)dev;
2461 sc->sbm_timer.function = &sbmac_timer; 2461 sc->sbm_timer.function = &sbmac_timer;
2462 add_timer(&sc->sbm_timer); 2462 add_timer(&sc->sbm_timer);
2463 2463
2464 return 0; 2464 return 0;
2465} 2465}
2466 2466
@@ -2578,20 +2578,20 @@ static void sbmac_timer(unsigned long data)
2578 int mii_status; 2578 int mii_status;
2579 2579
2580 spin_lock_irq (&sc->sbm_lock); 2580 spin_lock_irq (&sc->sbm_lock);
2581 2581
2582 /* make IFF_RUNNING follow the MII status bit "Link established" */ 2582 /* make IFF_RUNNING follow the MII status bit "Link established" */
2583 mii_status = sbmac_mii_read(sc, sc->sbm_phys[0], MII_BMSR); 2583 mii_status = sbmac_mii_read(sc, sc->sbm_phys[0], MII_BMSR);
2584 2584
2585 if ( (mii_status & BMSR_LINKSTAT) != (sc->sbm_phy_oldlinkstat) ) { 2585 if ( (mii_status & BMSR_LINKSTAT) != (sc->sbm_phy_oldlinkstat) ) {
2586 sc->sbm_phy_oldlinkstat = mii_status & BMSR_LINKSTAT; 2586 sc->sbm_phy_oldlinkstat = mii_status & BMSR_LINKSTAT;
2587 if (mii_status & BMSR_LINKSTAT) { 2587 if (mii_status & BMSR_LINKSTAT) {
2588 netif_carrier_on(dev); 2588 netif_carrier_on(dev);
2589 } 2589 }
2590 else { 2590 else {
2591 netif_carrier_off(dev); 2591 netif_carrier_off(dev);
2592 } 2592 }
2593 } 2593 }
2594 2594
2595 /* 2595 /*
2596 * Poll the PHY to see what speed we should be running at 2596 * Poll the PHY to see what speed we should be running at
2597 */ 2597 */
@@ -2609,9 +2609,9 @@ static void sbmac_timer(unsigned long data)
2609 sbmac_channel_start(sc); 2609 sbmac_channel_start(sc);
2610 } 2610 }
2611 } 2611 }
2612 2612
2613 spin_unlock_irq (&sc->sbm_lock); 2613 spin_unlock_irq (&sc->sbm_lock);
2614 2614
2615 sc->sbm_timer.expires = jiffies + next_tick; 2615 sc->sbm_timer.expires = jiffies + next_tick;
2616 add_timer(&sc->sbm_timer); 2616 add_timer(&sc->sbm_timer);
2617} 2617}
@@ -2620,13 +2620,13 @@ static void sbmac_timer(unsigned long data)
2620static void sbmac_tx_timeout (struct net_device *dev) 2620static void sbmac_tx_timeout (struct net_device *dev)
2621{ 2621{
2622 struct sbmac_softc *sc = netdev_priv(dev); 2622 struct sbmac_softc *sc = netdev_priv(dev);
2623 2623
2624 spin_lock_irq (&sc->sbm_lock); 2624 spin_lock_irq (&sc->sbm_lock);
2625 2625
2626 2626
2627 dev->trans_start = jiffies; 2627 dev->trans_start = jiffies;
2628 sc->sbm_stats.tx_errors++; 2628 sc->sbm_stats.tx_errors++;
2629 2629
2630 spin_unlock_irq (&sc->sbm_lock); 2630 spin_unlock_irq (&sc->sbm_lock);
2631 2631
2632 printk (KERN_WARNING "%s: Transmit timed out\n",dev->name); 2632 printk (KERN_WARNING "%s: Transmit timed out\n",dev->name);
@@ -2639,13 +2639,13 @@ static struct net_device_stats *sbmac_get_stats(struct net_device *dev)
2639{ 2639{
2640 struct sbmac_softc *sc = netdev_priv(dev); 2640 struct sbmac_softc *sc = netdev_priv(dev);
2641 unsigned long flags; 2641 unsigned long flags;
2642 2642
2643 spin_lock_irqsave(&sc->sbm_lock, flags); 2643 spin_lock_irqsave(&sc->sbm_lock, flags);
2644 2644
2645 /* XXX update other stats here */ 2645 /* XXX update other stats here */
2646 2646
2647 spin_unlock_irqrestore(&sc->sbm_lock, flags); 2647 spin_unlock_irqrestore(&sc->sbm_lock, flags);
2648 2648
2649 return &sc->sbm_stats; 2649 return &sc->sbm_stats;
2650} 2650}
2651 2651
@@ -2662,8 +2662,8 @@ static void sbmac_set_rx_mode(struct net_device *dev)
2662 /* 2662 /*
2663 * Promiscuous changed. 2663 * Promiscuous changed.
2664 */ 2664 */
2665 2665
2666 if (dev->flags & IFF_PROMISC) { 2666 if (dev->flags & IFF_PROMISC) {
2667 /* Unconditionally log net taps. */ 2667 /* Unconditionally log net taps. */
2668 msg_flag = 1; 2668 msg_flag = 1;
2669 sbmac_promiscuous_mode(sc,1); 2669 sbmac_promiscuous_mode(sc,1);
@@ -2674,18 +2674,18 @@ static void sbmac_set_rx_mode(struct net_device *dev)
2674 } 2674 }
2675 } 2675 }
2676 spin_unlock_irqrestore(&sc->sbm_lock, flags); 2676 spin_unlock_irqrestore(&sc->sbm_lock, flags);
2677 2677
2678 if (msg_flag) { 2678 if (msg_flag) {
2679 printk(KERN_NOTICE "%s: Promiscuous mode %sabled.\n", 2679 printk(KERN_NOTICE "%s: Promiscuous mode %sabled.\n",
2680 dev->name,(msg_flag==1)?"en":"dis"); 2680 dev->name,(msg_flag==1)?"en":"dis");
2681 } 2681 }
2682 2682
2683 /* 2683 /*
2684 * Program the multicasts. Do this every time. 2684 * Program the multicasts. Do this every time.
2685 */ 2685 */
2686 2686
2687 sbmac_setmulti(sc); 2687 sbmac_setmulti(sc);
2688 2688
2689} 2689}
2690 2690
2691static int sbmac_mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 2691static int sbmac_mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
@@ -2694,10 +2694,10 @@ static int sbmac_mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2694 u16 *data = (u16 *)&rq->ifr_ifru; 2694 u16 *data = (u16 *)&rq->ifr_ifru;
2695 unsigned long flags; 2695 unsigned long flags;
2696 int retval; 2696 int retval;
2697 2697
2698 spin_lock_irqsave(&sc->sbm_lock, flags); 2698 spin_lock_irqsave(&sc->sbm_lock, flags);
2699 retval = 0; 2699 retval = 0;
2700 2700
2701 switch(cmd) { 2701 switch(cmd) {
2702 case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */ 2702 case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */
2703 data[0] = sc->sbm_phys[0] & 0x1f; 2703 data[0] = sc->sbm_phys[0] & 0x1f;
@@ -2719,7 +2719,7 @@ static int sbmac_mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2719 default: 2719 default:
2720 retval = -EOPNOTSUPP; 2720 retval = -EOPNOTSUPP;
2721 } 2721 }
2722 2722
2723 spin_unlock_irqrestore(&sc->sbm_lock, flags); 2723 spin_unlock_irqrestore(&sc->sbm_lock, flags);
2724 return retval; 2724 return retval;
2725} 2725}
@@ -2750,7 +2750,7 @@ static int sbmac_close(struct net_device *dev)
2750 2750
2751 sbdma_emptyring(&(sc->sbm_txdma)); 2751 sbdma_emptyring(&(sc->sbm_txdma));
2752 sbdma_emptyring(&(sc->sbm_rxdma)); 2752 sbdma_emptyring(&(sc->sbm_rxdma));
2753 2753
2754 return 0; 2754 return 0;
2755} 2755}
2756 2756
@@ -2781,7 +2781,7 @@ sbmac_init_module(void)
2781 struct net_device *dev; 2781 struct net_device *dev;
2782 unsigned long port; 2782 unsigned long port;
2783 int chip_max_units; 2783 int chip_max_units;
2784 2784
2785 /* 2785 /*
2786 * For bringup when not using the firmware, we can pre-fill 2786 * For bringup when not using the firmware, we can pre-fill
2787 * the MAC addresses using the environment variables 2787 * the MAC addresses using the environment variables
@@ -2827,7 +2827,7 @@ sbmac_init_module(void)
2827 2827
2828 port = A_MAC_CHANNEL_BASE(idx); 2828 port = A_MAC_CHANNEL_BASE(idx);
2829 2829
2830 /* 2830 /*
2831 * The R_MAC_ETHERNET_ADDR register will be set to some nonzero 2831 * The R_MAC_ETHERNET_ADDR register will be set to some nonzero
2832 * value for us by the firmware if we're going to use this MAC. 2832 * value for us by the firmware if we're going to use this MAC.
2833 * If we find a zero, skip this MAC. 2833 * If we find a zero, skip this MAC.
@@ -2845,7 +2845,7 @@ sbmac_init_module(void)
2845 */ 2845 */
2846 2846
2847 dev = alloc_etherdev(sizeof(struct sbmac_softc)); 2847 dev = alloc_etherdev(sizeof(struct sbmac_softc));
2848 if (!dev) 2848 if (!dev)
2849 return -ENOMEM; /* return ENOMEM */ 2849 return -ENOMEM; /* return ENOMEM */
2850 2850
2851 printk(KERN_DEBUG "sbmac: configuring MAC at %lx\n", port); 2851 printk(KERN_DEBUG "sbmac: configuring MAC at %lx\n", port);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-15 23:45:53 -0500