diff options
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/therm_throt.c | 29 |
1 files changed, 7 insertions, 22 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c index 787e06c84ea6..ce04b5804085 100644 --- a/arch/x86/kernel/cpu/mcheck/therm_throt.c +++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c | |||
| @@ -323,17 +323,6 @@ device_initcall(thermal_throttle_init_device); | |||
| 323 | 323 | ||
| 324 | #endif /* CONFIG_SYSFS */ | 324 | #endif /* CONFIG_SYSFS */ |
| 325 | 325 | ||
| 326 | /* | ||
| 327 | * Set up the most two significant bit to notify mce log that this thermal | ||
| 328 | * event type. | ||
| 329 | * This is a temp solution. May be changed in the future with mce log | ||
| 330 | * infrasture. | ||
| 331 | */ | ||
| 332 | #define CORE_THROTTLED (0) | ||
| 333 | #define CORE_POWER_LIMIT ((__u64)1 << 62) | ||
| 334 | #define PACKAGE_THROTTLED ((__u64)2 << 62) | ||
| 335 | #define PACKAGE_POWER_LIMIT ((__u64)3 << 62) | ||
| 336 | |||
| 337 | static void notify_thresholds(__u64 msr_val) | 326 | static void notify_thresholds(__u64 msr_val) |
| 338 | { | 327 | { |
| 339 | /* check whether the interrupt handler is defined; | 328 | /* check whether the interrupt handler is defined; |
| @@ -363,27 +352,23 @@ static void intel_thermal_interrupt(void) | |||
| 363 | if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT, | 352 | if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT, |
| 364 | THERMAL_THROTTLING_EVENT, | 353 | THERMAL_THROTTLING_EVENT, |
| 365 | CORE_LEVEL) != 0) | 354 | CORE_LEVEL) != 0) |
| 366 | mce_log_therm_throt_event(CORE_THROTTLED | msr_val); | 355 | mce_log_therm_throt_event(msr_val); |
| 367 | 356 | ||
| 368 | if (this_cpu_has(X86_FEATURE_PLN)) | 357 | if (this_cpu_has(X86_FEATURE_PLN)) |
| 369 | if (therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT, | 358 | therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT, |
| 370 | POWER_LIMIT_EVENT, | 359 | POWER_LIMIT_EVENT, |
| 371 | CORE_LEVEL) != 0) | 360 | CORE_LEVEL); |
| 372 | mce_log_therm_throt_event(CORE_POWER_LIMIT | msr_val); | ||
| 373 | 361 | ||
| 374 | if (this_cpu_has(X86_FEATURE_PTS)) { | 362 | if (this_cpu_has(X86_FEATURE_PTS)) { |
| 375 | rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val); | 363 | rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val); |
| 376 | if (therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT, | 364 | therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT, |
| 377 | THERMAL_THROTTLING_EVENT, | 365 | THERMAL_THROTTLING_EVENT, |
| 378 | PACKAGE_LEVEL) != 0) | 366 | PACKAGE_LEVEL); |
| 379 | mce_log_therm_throt_event(PACKAGE_THROTTLED | msr_val); | ||
| 380 | if (this_cpu_has(X86_FEATURE_PLN)) | 367 | if (this_cpu_has(X86_FEATURE_PLN)) |
| 381 | if (therm_throt_process(msr_val & | 368 | therm_throt_process(msr_val & |
| 382 | PACKAGE_THERM_STATUS_POWER_LIMIT, | 369 | PACKAGE_THERM_STATUS_POWER_LIMIT, |
| 383 | POWER_LIMIT_EVENT, | 370 | POWER_LIMIT_EVENT, |
| 384 | PACKAGE_LEVEL) != 0) | 371 | PACKAGE_LEVEL); |
| 385 | mce_log_therm_throt_event(PACKAGE_POWER_LIMIT | ||
| 386 | | msr_val); | ||
| 387 | } | 372 | } |
| 388 | } | 373 | } |
| 389 | 374 | ||
