diff options
| -rw-r--r-- | drivers/iommu/intel-iommu.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index d9514c46177f..72d68c596703 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c | |||
| @@ -3950,7 +3950,11 @@ static void __devinit quirk_calpella_no_shadow_gtt(struct pci_dev *dev) | |||
| 3950 | if (!(ggc & GGC_MEMORY_VT_ENABLED)) { | 3950 | if (!(ggc & GGC_MEMORY_VT_ENABLED)) { |
| 3951 | printk(KERN_INFO "DMAR: BIOS has allocated no shadow GTT; disabling IOMMU for graphics\n"); | 3951 | printk(KERN_INFO "DMAR: BIOS has allocated no shadow GTT; disabling IOMMU for graphics\n"); |
| 3952 | dmar_map_gfx = 0; | 3952 | dmar_map_gfx = 0; |
| 3953 | } | 3953 | } else if (dmar_map_gfx) { |
| 3954 | /* we have to ensure the gfx device is idle before we flush */ | ||
| 3955 | printk(KERN_INFO "DMAR: Disabling batched IOTLB flush on Ironlake\n"); | ||
| 3956 | intel_iommu_strict = 1; | ||
| 3957 | } | ||
| 3954 | } | 3958 | } |
| 3955 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0040, quirk_calpella_no_shadow_gtt); | 3959 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0040, quirk_calpella_no_shadow_gtt); |
| 3956 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0044, quirk_calpella_no_shadow_gtt); | 3960 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0044, quirk_calpella_no_shadow_gtt); |
