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-rw-r--r--arch/arm/mach-mx5/Makefile1
-rw-r--r--arch/arm/mach-mx5/mm-mx50.c72
-rw-r--r--arch/arm/mach-mx5/mm.c76
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c23
-rw-r--r--arch/arm/plat-mxc/include/mach/hardware.h7
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h16
-rw-r--r--arch/arm/plat-mxc/include/mach/mx53.h1
7 files changed, 66 insertions, 130 deletions
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 7f452433a690..9565304b7282 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -4,7 +4,6 @@
4 4
5# Object file lists. 5# Object file lists.
6obj-y := cpu.o mm.o clock-mx51-mx53.o ehci.o system.o 6obj-y := cpu.o mm.o clock-mx51-mx53.o ehci.o system.o
7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
8 7
9obj-$(CONFIG_PM) += pm-imx5.o 8obj-$(CONFIG_PM) += pm-imx5.o
10obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o 9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c
deleted file mode 100644
index 77e374c726fa..000000000000
--- a/arch/arm/mach-mx5/mm-mx50.c
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 * Create static mapping between physical to virtual memory.
19 */
20
21#include <linux/mm.h>
22#include <linux/init.h>
23
24#include <asm/mach/map.h>
25
26#include <mach/hardware.h>
27#include <mach/common.h>
28#include <mach/iomux-v3.h>
29#include <mach/irqs.h>
30
31/*
32 * Define the MX50 memory map.
33 */
34static struct map_desc mx50_io_desc[] __initdata = {
35 imx_map_entry(MX50, TZIC, MT_DEVICE),
36 imx_map_entry(MX50, SPBA0, MT_DEVICE),
37 imx_map_entry(MX50, AIPS1, MT_DEVICE),
38 imx_map_entry(MX50, AIPS2, MT_DEVICE),
39};
40
41/*
42 * This function initializes the memory map. It is called during the
43 * system startup to create static physical to virtual memory mappings
44 * for the IO modules.
45 */
46void __init mx50_map_io(void)
47{
48 iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc));
49}
50
51void __init imx50_init_early(void)
52{
53 mxc_set_cpu_type(MXC_CPU_MX50);
54 mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR));
55 mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
56}
57
58void __init mx50_init_irq(void)
59{
60 tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
61}
62
63void __init imx50_soc_init(void)
64{
65 /* i.mx50 has the i.mx31 type gpio */
66 mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
67 mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
68 mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
69 mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
70 mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
71 mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
72}
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index fcc5c4ce53f1..fb653395624d 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -22,11 +22,21 @@
22#include <mach/iomux-v3.h> 22#include <mach/iomux-v3.h>
23 23
24/* 24/*
25 * Define the MX50 memory map.
26 */
27static struct map_desc mx50_io_desc[] __initdata = {
28 imx_map_entry(MX50, TZIC, MT_DEVICE),
29 imx_map_entry(MX50, SPBA0, MT_DEVICE),
30 imx_map_entry(MX50, AIPS1, MT_DEVICE),
31 imx_map_entry(MX50, AIPS2, MT_DEVICE),
32};
33
34/*
25 * Define the MX51 memory map. 35 * Define the MX51 memory map.
26 */ 36 */
27static struct map_desc mx51_io_desc[] __initdata = { 37static struct map_desc mx51_io_desc[] __initdata = {
38 imx_map_entry(MX51, TZIC, MT_DEVICE),
28 imx_map_entry(MX51, IRAM, MT_DEVICE), 39 imx_map_entry(MX51, IRAM, MT_DEVICE),
29 imx_map_entry(MX51, DEBUG, MT_DEVICE),
30 imx_map_entry(MX51, AIPS1, MT_DEVICE), 40 imx_map_entry(MX51, AIPS1, MT_DEVICE),
31 imx_map_entry(MX51, SPBA0, MT_DEVICE), 41 imx_map_entry(MX51, SPBA0, MT_DEVICE),
32 imx_map_entry(MX51, AIPS2, MT_DEVICE), 42 imx_map_entry(MX51, AIPS2, MT_DEVICE),
@@ -36,6 +46,7 @@ static struct map_desc mx51_io_desc[] __initdata = {
36 * Define the MX53 memory map. 46 * Define the MX53 memory map.
37 */ 47 */
38static struct map_desc mx53_io_desc[] __initdata = { 48static struct map_desc mx53_io_desc[] __initdata = {
49 imx_map_entry(MX53, TZIC, MT_DEVICE),
39 imx_map_entry(MX53, AIPS1, MT_DEVICE), 50 imx_map_entry(MX53, AIPS1, MT_DEVICE),
40 imx_map_entry(MX53, SPBA0, MT_DEVICE), 51 imx_map_entry(MX53, SPBA0, MT_DEVICE),
41 imx_map_entry(MX53, AIPS2, MT_DEVICE), 52 imx_map_entry(MX53, AIPS2, MT_DEVICE),
@@ -46,11 +57,28 @@ static struct map_desc mx53_io_desc[] __initdata = {
46 * system startup to create static physical to virtual memory mappings 57 * system startup to create static physical to virtual memory mappings
47 * for the IO modules. 58 * for the IO modules.
48 */ 59 */
60void __init mx50_map_io(void)
61{
62 iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc));
63}
64
49void __init mx51_map_io(void) 65void __init mx51_map_io(void)
50{ 66{
51 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc)); 67 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
52} 68}
53 69
70void __init mx53_map_io(void)
71{
72 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
73}
74
75void __init imx50_init_early(void)
76{
77 mxc_set_cpu_type(MXC_CPU_MX50);
78 mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR));
79 mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
80}
81
54void __init imx51_init_early(void) 82void __init imx51_init_early(void)
55{ 83{
56 mxc_set_cpu_type(MXC_CPU_MX51); 84 mxc_set_cpu_type(MXC_CPU_MX51);
@@ -58,11 +86,6 @@ void __init imx51_init_early(void)
58 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); 86 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
59} 87}
60 88
61void __init mx53_map_io(void)
62{
63 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
64}
65
66void __init imx53_init_early(void) 89void __init imx53_init_early(void)
67{ 90{
68 mxc_set_cpu_type(MXC_CPU_MX53); 91 mxc_set_cpu_type(MXC_CPU_MX53);
@@ -70,35 +93,19 @@ void __init imx53_init_early(void)
70 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); 93 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
71} 94}
72 95
73void __init mx51_init_irq(void) 96void __init mx50_init_irq(void)
74{ 97{
75 unsigned long tzic_addr; 98 tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
76 void __iomem *tzic_virt; 99}
77
78 if (mx51_revision() < IMX_CHIP_REVISION_2_0)
79 tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
80 else
81 tzic_addr = MX51_TZIC_BASE_ADDR;
82
83 tzic_virt = ioremap(tzic_addr, SZ_16K);
84 if (!tzic_virt)
85 panic("unable to map TZIC interrupt controller\n");
86 100
87 tzic_init_irq(tzic_virt); 101void __init mx51_init_irq(void)
102{
103 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
88} 104}
89 105
90void __init mx53_init_irq(void) 106void __init mx53_init_irq(void)
91{ 107{
92 unsigned long tzic_addr; 108 tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR));
93 void __iomem *tzic_virt;
94
95 tzic_addr = MX53_TZIC_BASE_ADDR;
96
97 tzic_virt = ioremap(tzic_addr, SZ_16K);
98 if (!tzic_virt)
99 panic("unable to map TZIC interrupt controller\n");
100
101 tzic_init_irq(tzic_virt);
102} 109}
103 110
104static struct sdma_script_start_addrs imx51_sdma_script __initdata = { 111static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
@@ -138,6 +145,17 @@ static struct sdma_platform_data imx53_sdma_pdata __initdata = {
138 .script_addrs = &imx53_sdma_script, 145 .script_addrs = &imx53_sdma_script,
139}; 146};
140 147
148void __init imx50_soc_init(void)
149{
150 /* i.mx50 has the i.mx31 type gpio */
151 mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
152 mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
153 mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
154 mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
155 mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
156 mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
157}
158
141void __init imx51_soc_init(void) 159void __init imx51_soc_init(void)
142{ 160{
143 /* i.mx51 has the i.mx31 type gpio */ 161 /* i.mx51 has the i.mx31 type gpio */
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index 3f86e7a4d2cc..8b3aa7afdae0 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -351,6 +351,11 @@ static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
351 }, 351 },
352}; 352};
353 353
354static struct gpio mx28evk_lcd_gpios[] = {
355 { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" },
356 { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" },
357};
358
354static void __init mx28evk_init(void) 359static void __init mx28evk_init(void)
355{ 360{
356 int ret; 361 int ret;
@@ -377,19 +382,12 @@ static void __init mx28evk_init(void)
377 mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]); 382 mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);
378 } 383 }
379 384
380 ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable"); 385 ret = gpio_request_array(mx28evk_lcd_gpios,
386 ARRAY_SIZE(mx28evk_lcd_gpios));
381 if (ret) 387 if (ret)
382 pr_warn("failed to request gpio lcd-enable: %d\n", ret); 388 pr_warn("failed to request gpio pins for lcd: %d\n", ret);
383 else 389 else
384 gpio_set_value(MX28EVK_LCD_ENABLE, 1); 390 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
385
386 ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable");
387 if (ret)
388 pr_warn("failed to request gpio bl-enable: %d\n", ret);
389 else
390 gpio_set_value(MX28EVK_BL_ENABLE, 1);
391
392 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
393 391
394 /* power on mmc slot by writing 0 to the gpio */ 392 /* power on mmc slot by writing 0 to the gpio */
395 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW, 393 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,
@@ -402,7 +400,8 @@ static void __init mx28evk_init(void)
402 "mmc1-slot-power"); 400 "mmc1-slot-power");
403 if (ret) 401 if (ret)
404 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); 402 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
405 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); 403 else
404 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
406 405
407 gpio_led_register_device(0, &mx28evk_led_data); 406 gpio_led_register_device(0, &mx28evk_led_data);
408} 407}
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index f57ec47d6fd5..eba3118adfbb 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -81,11 +81,16 @@
81 * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000 81 * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000
82 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000 82 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000
83 * mx51: 83 * mx51:
84 * TZIC 0xe0000000+0x004000 -> 0xf5000000+0x004000
84 * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000 85 * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000
85 * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000
86 * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000 86 * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000
87 * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000 87 * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000
88 * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000 88 * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000
89 * mx53:
90 * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000
91 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
92 * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000
93 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000
89 */ 94 */
90#define IMX_IO_P2V(x) ( \ 95#define IMX_IO_P2V(x) ( \
91 0xf4000000 + \ 96 0xf4000000 + \
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 9666e31956b7..cdf07c65ec1e 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -18,18 +18,6 @@
18#define MX51_GPU_CTRL_BASE_ADDR 0x30000000 18#define MX51_GPU_CTRL_BASE_ADDR 0x30000000
19#define MX51_IPU_CTRL_BASE_ADDR 0x40000000 19#define MX51_IPU_CTRL_BASE_ADDR 0x40000000
20 20
21#define MX51_DEBUG_BASE_ADDR 0x60000000
22#define MX51_DEBUG_SIZE SZ_1M
23
24#define MX51_ETB_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x01000)
25#define MX51_ETM_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x02000)
26#define MX51_TPIU_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x03000)
27#define MX51_CTI0_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x04000)
28#define MX51_CTI1_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x05000)
29#define MX51_CTI2_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x06000)
30#define MX51_CTI3_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x07000)
31#define MX51_CORTEX_DBG_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x08000)
32
33/* 21/*
34 * SPBA global module enabled #0 22 * SPBA global module enabled #0
35 */ 23 */
@@ -135,6 +123,7 @@
135 123
136#define MX51_GPU2D_BASE_ADDR 0xd0000000 124#define MX51_GPU2D_BASE_ADDR 0xd0000000
137#define MX51_TZIC_BASE_ADDR 0xe0000000 125#define MX51_TZIC_BASE_ADDR 0xe0000000
126#define MX51_TZIC_SIZE SZ_16K
138 127
139#define MX51_IO_P2V(x) IMX_IO_P2V(x) 128#define MX51_IO_P2V(x) IMX_IO_P2V(x)
140#define MX51_IO_ADDRESS(x) IOMEM(MX51_IO_P2V(x)) 129#define MX51_IO_ADDRESS(x) IOMEM(MX51_IO_P2V(x))
@@ -353,7 +342,4 @@ extern int mx51_revision(void);
353extern void mx51_display_revision(void); 342extern void mx51_display_revision(void);
354#endif 343#endif
355 344
356/* tape-out 1 defines */
357#define MX51_TZIC_BASE_ADDR_TO1 0x8fffc000
358
359#endif /* ifndef __MACH_MX51_H__ */ 345#endif /* ifndef __MACH_MX51_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h
index 5e3c3236ebf3..a37e8c353994 100644
--- a/arch/arm/plat-mxc/include/mach/mx53.h
+++ b/arch/arm/plat-mxc/include/mach/mx53.h
@@ -9,6 +9,7 @@
9 9
10/* TZIC */ 10/* TZIC */
11#define MX53_TZIC_BASE_ADDR 0x0FFFC000 11#define MX53_TZIC_BASE_ADDR 0x0FFFC000
12#define MX53_TZIC_SIZE SZ_16K
12 13
13/* 14/*
14 * AHCI SATA 15 * AHCI SATA
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-15 11:20:09 -0500