33 files changed, 981 insertions, 349 deletions
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index af74cc2de8b6..bcfade33bca9 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -1,15 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30-rc4
+# Linux kernel version: 2.6.32-rc6
-# Mon May  4 11:58:57 2009
+# Sat Nov  7 20:31:18 2009
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_MMU=y
-# CONFIG_NO_IOPORT is not set
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -18,13 +16,12 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 #
 # General setup
@@ -46,11 +43,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
+CONFIG_TREE_RCU=y
-# CONFIG_TREE_RCU is not set
+# CONFIG_TREE_PREEMPT_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=19
 # CONFIG_GROUP_SCHED is not set
@@ -73,7 +71,6 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -86,6 +83,10 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
 CONFIG_SLUB_DEBUG=y
@@ -95,13 +96,17 @@ CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-# CONFIG_MARKERS is not set
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 CONFIG_KPROBES=y
 CONFIG_KRETPROBES=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -114,7 +119,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
@@ -135,19 +140,22 @@ CONFIG_DEFAULT_IOSCHED="cfq"
 #
 # System Type
 #
+CONFIG_MMU=y
 # CONFIG_ARCH_AAEC2000 is not set
 # CONFIG_ARCH_INTEGRATOR is not set
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -156,25 +164,27 @@ CONFIG_DEFAULT_IOSCHED="cfq"
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
 CONFIG_ARCH_KIRKWOOD=y
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
-# CONFIG_ARCH_MXC is not set
 # CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
-# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_MSM is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_BCMRING is not set
-# CONFIG_ARCH_W90X900 is not set
 #
 # Marvell Kirkwood Implementations
@@ -185,6 +195,7 @@ CONFIG_MACH_RD88F6281=y
 CONFIG_MACH_MV88F6281GTW_GE=y
 CONFIG_MACH_SHEEVAPLUG=y
 CONFIG_MACH_TS219=y
+CONFIG_MACH_OPENRD_BASE=y
 CONFIG_PLAT_ORION=y
 #
@@ -195,7 +206,7 @@ CONFIG_CPU_FEROCEON=y
 # CONFIG_CPU_FEROCEON_OLD_ID is not set
 CONFIG_CPU_32v5=y
 CONFIG_CPU_ABRT_EV5T=y
-CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_PABRT_LEGACY=y
 CONFIG_CPU_CACHE_VIVT=y
 CONFIG_CPU_COPY_FEROCEON=y
 CONFIG_CPU_TLB_FEROCEON=y
@@ -211,6 +222,7 @@ CONFIG_ARM_THUMB=y
 CONFIG_OUTER_CACHE=y
 CONFIG_CACHE_FEROCEON_L2=y
 # CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
 #
 # Bus support
@@ -235,11 +247,12 @@ CONFIG_VMSPLIT_3G=y
 # CONFIG_VMSPLIT_2G is not set
 # CONFIG_VMSPLIT_1G is not set
 CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
 CONFIG_PREEMPT=y
 CONFIG_HZ=100
 CONFIG_AEABI=y
 # CONFIG_OABI_COMPAT is not set
-CONFIG_ARCH_FLATMEM_HAS_HOLES=y
 # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
 # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
 # CONFIG_HIGHMEM is not set
@@ -254,10 +267,12 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_UNEVICTABLE_LRU=y
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ALIGNMENT_TRAP=y
+CONFIG_UACCESS_WITH_MEMCPY=y
 #
 # Boot options
@@ -345,6 +360,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -367,6 +383,7 @@ CONFIG_NET_DSA_MV88E6123_61_65=y
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
 # CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
 # CONFIG_DCB is not set
@@ -383,17 +400,18 @@ CONFIG_NET_PKTGEN=m
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
 # CONFIG_CFG80211_REG_DEBUG is not set
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_DEFAULT_PS_VALUE=1
+# CONFIG_CFG80211_DEBUGFS is not set
 CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
 CONFIG_LIB80211=y
 # CONFIG_LIB80211_DEBUG is not set
 CONFIG_MAC80211=y
-#
-# Rate control algorithm selection
-#
 CONFIG_MAC80211_RC_MINSTREL=y
 # CONFIG_MAC80211_RC_DEFAULT_PID is not set
 CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
@@ -414,6 +432,7 @@ CONFIG_MAC80211_RC_DEFAULT="minstrel"
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -425,9 +444,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
@@ -494,6 +513,7 @@ CONFIG_MTD_PHYSMAP=y
 # CONFIG_MTD_DATAFLASH is not set
 CONFIG_MTD_M25P80=y
 CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -543,6 +563,7 @@ CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_RAM is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
 # CONFIG_MISC_DEVICES is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
@@ -567,10 +588,6 @@ CONFIG_BLK_DEV_SR=m
 # CONFIG_BLK_DEV_SR_VENDOR is not set
 CONFIG_CHR_DEV_SG=m
 # CONFIG_CHR_DEV_SCH is not set
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
 # CONFIG_SCSI_MULTI_LUN is not set
 # CONFIG_SCSI_CONSTANTS is not set
 # CONFIG_SCSI_LOGGING is not set
@@ -587,6 +604,8 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_BNX2_ISCSI is not set
+# CONFIG_BE2ISCSI is not set
 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
 # CONFIG_SCSI_3W_9XXX is not set
 # CONFIG_SCSI_ACARD is not set
@@ -595,6 +614,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_AIC7XXX_OLD is not set
 # CONFIG_SCSI_AIC79XX is not set
 # CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_MVSAS is not set
 # CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_ARCMSR is not set
@@ -611,7 +631,6 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_IPS is not set
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_MVSAS is not set
 # CONFIG_SCSI_STEX is not set
 # CONFIG_SCSI_SYM53C8XX_2 is not set
 # CONFIG_SCSI_IPR is not set
@@ -623,11 +642,14 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_BFA_FC is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 CONFIG_SATA_AHCI=y
 # CONFIG_SATA_SIL24 is not set
@@ -649,6 +671,7 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -676,6 +699,7 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_OPTIDMA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -693,13 +717,16 @@ CONFIG_SATA_MV=y
 #
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
 # CONFIG_I2O is not set
 CONFIG_NETDEVICES=y
-CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -768,6 +795,9 @@ CONFIG_NET_PCI=y
 # CONFIG_SMSC9420 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_SC92031 is not set
 # CONFIG_ATL2 is not set
@@ -789,6 +819,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 CONFIG_MV643XX_ETH=y
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
@@ -797,10 +828,7 @@ CONFIG_MV643XX_ETH=y
 # CONFIG_JME is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
+CONFIG_WLAN=y
-#
-# Wireless LAN
-#
 # CONFIG_WLAN_PRE80211 is not set
 CONFIG_WLAN_80211=y
 CONFIG_LIBERTAS=y
@@ -820,9 +848,7 @@ CONFIG_LIBERTAS_SDIO=y
 # CONFIG_MAC80211_HWSIM is not set
 # CONFIG_MWL8K is not set
 # CONFIG_P54_COMMON is not set
-# CONFIG_ATH5K is not set
+# CONFIG_ATH_COMMON is not set
-# CONFIG_ATH9K is not set
-# CONFIG_AR9170_USB is not set
 # CONFIG_IPW2100 is not set
 # CONFIG_IPW2200 is not set
 # CONFIG_IWLWIFI is not set
@@ -832,6 +858,8 @@ CONFIG_LIBERTAS_SDIO=y
 # CONFIG_ZD1211RW is not set
 # CONFIG_RT2X00 is not set
 # CONFIG_HERMES is not set
+# CONFIG_WL12XX is not set
+# CONFIG_IWM is not set
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -855,6 +883,7 @@ CONFIG_LIBERTAS_SDIO=y
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
 # CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
 #
 # Input device support
@@ -878,13 +907,19 @@ CONFIG_INPUT_EVDEV=y
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -943,6 +978,7 @@ CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_DEVPORT=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_COMPAT is not set
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
@@ -998,10 +1034,6 @@ CONFIG_I2C_MV64XXX=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -1023,11 +1055,47 @@ CONFIG_SPI_ORION=y
 #
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+#
+# Memory mapped GPIO expanders:
+#
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_BT8XX is not set
+# CONFIG_GPIO_LANGWELL is not set
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
@@ -1041,33 +1109,28 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_TC6393XB is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
-#
+# CONFIG_AB3100_CORE is not set
-# Multimedia devices
+# CONFIG_EZX_PCAP is not set
-#
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1087,7 +1150,6 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 #
@@ -1106,10 +1168,12 @@ CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
 # CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
 CONFIG_HID_KYE=y
 CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
 CONFIG_HID_KENSINGTON=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -1123,9 +1187,14 @@ CONFIG_HID_PETALYNX=y
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
 CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
 # CONFIG_GREENASIA_FF is not set
+CONFIG_HID_SMARTJOYPLUS=y
+# CONFIG_SMARTJOYPLUS_FF is not set
 CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
 # CONFIG_THRUSTMASTER_FF is not set
+CONFIG_HID_ZEROPLUS=y
 # CONFIG_ZEROPLUS_FF is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
@@ -1150,18 +1219,21 @@ CONFIG_USB_DEVICE_CLASS=y
 # USB Host Controller Drivers
 #
 # CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_XHCI_HCD is not set
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
 CONFIG_USB_EHCI_TT_NEWSCHED=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_OHCI_HCD is not set
 # CONFIG_USB_UHCI_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
 # CONFIG_USB_WHCI_HCD is not set
 # CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
 #
 # USB Device Class drivers
@@ -1252,11 +1324,14 @@ CONFIG_SDIO_UART=y
 # MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
 # CONFIG_MMC_TIFM_SD is not set
 CONFIG_MMC_MVSDIO=y
 # CONFIG_MMC_SPI is not set
+# CONFIG_MMC_CB710 is not set
+# CONFIG_MMC_VIA_SDMMC is not set
 # CONFIG_MEMSTICK is not set
-# CONFIG_ACCESSIBILITY is not set
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
@@ -1266,7 +1341,7 @@ CONFIG_LEDS_CLASS=y
 # CONFIG_LEDS_PCA9532 is not set
 CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_GPIO_PLATFORM=y
-# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP3944 is not set
 # CONFIG_LEDS_PCA955X is not set
 # CONFIG_LEDS_DAC124S085 is not set
 # CONFIG_LEDS_BD2802 is not set
@@ -1278,11 +1353,14 @@ CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+# CONFIG_LEDS_TRIGGER_GPIO is not set
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 #
 # iptables trigger is under Netfilter config (LED target)
 #
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
 CONFIG_RTC_LIB=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_HCTOSYS=y
@@ -1314,6 +1392,7 @@ CONFIG_RTC_INTF_DEV=y
 CONFIG_RTC_DRV_S35390A=y
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 #
 # SPI RTC drivers
@@ -1325,6 +1404,7 @@ CONFIG_RTC_DRV_S35390A=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 #
 # Platform RTC drivers
@@ -1360,8 +1440,11 @@ CONFIG_DMA_ENGINE=y
 # CONFIG_ASYNC_TX_DMA is not set
 # CONFIG_DMATEST is not set
 # CONFIG_AUXDISPLAY is not set
-# CONFIG_REGULATOR is not set
 # CONFIG_UIO is not set
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 #
@@ -1379,10 +1462,13 @@ CONFIG_JBD=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1455,7 +1541,6 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1530,6 +1615,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1547,6 +1633,7 @@ CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_SLUB_DEBUG_ON is not set
 # CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
 # CONFIG_DEBUG_PREEMPT is not set
 # CONFIG_DEBUG_RT_MUTEXES is not set
 # CONFIG_RT_MUTEX_TESTER is not set
@@ -1567,12 +1654,14 @@ CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_KPROBES_SANITY_TEST is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
@@ -1581,25 +1670,12 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_RING_BUFFER=y
+CONFIG_EVENT_TRACING=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
-#
-# Tracers
-#
-# CONFIG_FUNCTION_TRACER is not set
-# CONFIG_IRQSOFF_TRACER is not set
-# CONFIG_PREEMPT_TRACER is not set
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_EVENT_TRACER is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_TRACE_BRANCH_PROFILING is not set
-# CONFIG_STACK_TRACER is not set
-# CONFIG_KMEMTRACE is not set
-# CONFIG_WORKQUEUE_TRACER is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
@@ -1623,7 +1699,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -1665,11 +1740,13 @@ CONFIG_CRYPTO_PCBC=m
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 #
 # Digest
 #
 CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1714,6 +1791,7 @@ CONFIG_CRYPTO_ARC4=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_DEV_MV_CESA=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
 CONFIG_BINARY_PRINTF=y
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index 9e2385293ecb..5383cd0dff54 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -1,15 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30-rc4
+# Linux kernel version: 2.6.32-rc6
-# Mon May  4 14:07:25 2009
+# Sat Nov  7 20:52:21 2009
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_MMU=y
-# CONFIG_NO_IOPORT is not set
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -18,13 +16,12 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 #
 # General setup
@@ -46,11 +43,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
+CONFIG_TREE_RCU=y
-# CONFIG_TREE_RCU is not set
+# CONFIG_TREE_PREEMPT_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -69,7 +67,6 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -82,6 +79,10 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
 # CONFIG_SLUB_DEBUG is not set
@@ -91,13 +92,17 @@ CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-# CONFIG_MARKERS is not set
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 CONFIG_KPROBES=y
 CONFIG_KRETPROBES=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
@@ -109,7 +114,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
@@ -130,19 +135,22 @@ CONFIG_DEFAULT_IOSCHED="cfq"
 #
 # System Type
 #
+CONFIG_MMU=y
 # CONFIG_ARCH_AAEC2000 is not set
 # CONFIG_ARCH_INTEGRATOR is not set
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -151,25 +159,27 @@ CONFIG_DEFAULT_IOSCHED="cfq"
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
 # CONFIG_ARCH_KIRKWOOD is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
-# CONFIG_ARCH_MXC is not set
 CONFIG_ARCH_ORION5X=y
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
-# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_MSM is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_BCMRING is not set
-# CONFIG_ARCH_W90X900 is not set
 #
 # Orion Implementations
@@ -187,6 +197,9 @@ CONFIG_MACH_WRT350N_V2=y
 CONFIG_MACH_TS78XX=y
 CONFIG_MACH_MV2120=y
 CONFIG_MACH_EDMINI_V2=y
+CONFIG_MACH_D2NET=y
+CONFIG_MACH_BIGDISK=y
+CONFIG_MACH_NET2BIG=y
 CONFIG_MACH_MSS2=y
 CONFIG_MACH_WNR854T=y
 CONFIG_MACH_RD88F5181L_GE=y
@@ -202,7 +215,7 @@ CONFIG_CPU_FEROCEON=y
 CONFIG_CPU_FEROCEON_OLD_ID=y
 CONFIG_CPU_32v5=y
 CONFIG_CPU_ABRT_EV5T=y
-CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_PABRT_LEGACY=y
 CONFIG_CPU_CACHE_VIVT=y
 CONFIG_CPU_COPY_FEROCEON=y
 CONFIG_CPU_TLB_FEROCEON=y
@@ -215,7 +228,7 @@ CONFIG_CPU_CP15_MMU=y
 CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_OUTER_CACHE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
 #
 # Bus support
@@ -240,11 +253,12 @@ CONFIG_VMSPLIT_3G=y
 # CONFIG_VMSPLIT_2G is not set
 # CONFIG_VMSPLIT_1G is not set
 CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
 CONFIG_PREEMPT=y
 CONFIG_HZ=100
 CONFIG_AEABI=y
 CONFIG_OABI_COMPAT=y
-CONFIG_ARCH_FLATMEM_HAS_HOLES=y
 # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
 # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
 # CONFIG_HIGHMEM is not set
@@ -259,12 +273,14 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_UNEVICTABLE_LRU=y
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_LEDS=y
 CONFIG_LEDS_CPU=y
 CONFIG_ALIGNMENT_TRAP=y
+CONFIG_UACCESS_WITH_MEMCPY=y
 #
 # Boot options
@@ -308,6 +324,7 @@ CONFIG_PM=y
 # CONFIG_PM_DEBUG is not set
 # CONFIG_SUSPEND is not set
 # CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
@@ -356,6 +373,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -378,6 +396,7 @@ CONFIG_NET_DSA_MV88E6123_61_65=y
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
 # CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
 # CONFIG_DCB is not set
@@ -394,11 +413,15 @@ CONFIG_NET_PKTGEN=m
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
 # CONFIG_LIB80211 is not set
-# CONFIG_MAC80211 is not set
+#
+# CFG80211 needs to be enabled for MAC80211
+#
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -411,6 +434,7 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -422,9 +446,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
@@ -537,6 +561,7 @@ CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_RAM is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
 CONFIG_MISC_DEVICES=y
 # CONFIG_PHANTOM is not set
 # CONFIG_SGI_IOC4 is not set
@@ -552,7 +577,9 @@ CONFIG_MISC_DEVICES=y
 #
 # CONFIG_EEPROM_AT24 is not set
 # CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
 # CONFIG_EEPROM_93CX6 is not set
+# CONFIG_CB710_CORE is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
@@ -576,10 +603,6 @@ CONFIG_BLK_DEV_SR=m
 # CONFIG_BLK_DEV_SR_VENDOR is not set
 CONFIG_CHR_DEV_SG=m
 # CONFIG_CHR_DEV_SCH is not set
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
 # CONFIG_SCSI_MULTI_LUN is not set
 # CONFIG_SCSI_CONSTANTS is not set
 # CONFIG_SCSI_LOGGING is not set
@@ -596,6 +619,8 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_BNX2_ISCSI is not set
+# CONFIG_BE2ISCSI is not set
 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
 # CONFIG_SCSI_3W_9XXX is not set
 # CONFIG_SCSI_ACARD is not set
@@ -604,6 +629,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_AIC7XXX_OLD is not set
 # CONFIG_SCSI_AIC79XX is not set
 # CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_MVSAS is not set
 # CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_ARCMSR is not set
@@ -620,7 +646,6 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_IPS is not set
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_MVSAS is not set
 # CONFIG_SCSI_STEX is not set
 # CONFIG_SCSI_SYM53C8XX_2 is not set
 # CONFIG_SCSI_IPR is not set
@@ -632,11 +657,14 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_BFA_FC is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 # CONFIG_SATA_SIL24 is not set
@@ -658,6 +686,7 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -685,6 +714,7 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_OPTIDMA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -703,13 +733,16 @@ CONFIG_SATA_MV=y
 #
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
 # CONFIG_I2O is not set
 CONFIG_NETDEVICES=y
-CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -777,6 +810,8 @@ CONFIG_NET_PCI=y
 # CONFIG_SMSC9420 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_SC92031 is not set
 # CONFIG_ATL2 is not set
@@ -798,6 +833,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 CONFIG_MV643XX_ETH=y
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
@@ -806,10 +842,7 @@ CONFIG_MV643XX_ETH=y
 # CONFIG_JME is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
+CONFIG_WLAN=y
-#
-# Wireless LAN
-#
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
@@ -835,6 +868,7 @@ CONFIG_MV643XX_ETH=y
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
 # CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
 #
 # Input device support
@@ -855,13 +889,19 @@ CONFIG_INPUT_EVDEV=y
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 # CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -912,6 +952,7 @@ CONFIG_HW_RANDOM_TIMERIOMEM=m
 CONFIG_DEVPORT=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_COMPAT is not set
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
@@ -967,20 +1008,55 @@ CONFIG_I2C_MV64XXX=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+#
+# Memory mapped GPIO expanders:
+#
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_BT8XX is not set
+# CONFIG_GPIO_LANGWELL is not set
+#
+# SPI GPIO expanders:
+#
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+#
+# Native drivers
+#
 # CONFIG_SENSORS_AD7414 is not set
 # CONFIG_SENSORS_AD7418 is not set
 # CONFIG_SENSORS_ADM1021 is not set
@@ -1030,6 +1106,8 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
 # CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
 # CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_VT8231 is not set
@@ -1041,9 +1119,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
@@ -1057,33 +1133,26 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_TC6393XB is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
-#
+# CONFIG_REGULATOR is not set
-# Multimedia devices
+# CONFIG_MEDIA_SUPPORT is not set
-#
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
 #
 # Graphics support
 #
+# CONFIG_VGA_ARB is not set
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1097,7 +1166,6 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 #
@@ -1116,10 +1184,11 @@ CONFIG_USB_HID=y
 # CONFIG_HID_CHERRY is not set
 # CONFIG_HID_CHICONY is not set
 # CONFIG_HID_CYPRESS is not set
-# CONFIG_DRAGONRISE_FF is not set
+# CONFIG_HID_DRAGONRISE is not set
 # CONFIG_HID_EZKEY is not set
 # CONFIG_HID_KYE is not set
 # CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 # CONFIG_HID_LOGITECH is not set
 # CONFIG_HID_MICROSOFT is not set
@@ -1130,10 +1199,11 @@ CONFIG_USB_HID=y
 # CONFIG_HID_SAMSUNG is not set
 # CONFIG_HID_SONY is not set
 # CONFIG_HID_SUNPLUS is not set
-# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
 # CONFIG_HID_TOPSEED is not set
-# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_HID_THRUSTMASTER is not set
-# CONFIG_ZEROPLUS_FF is not set
+# CONFIG_HID_ZEROPLUS is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1160,18 +1230,21 @@ CONFIG_USB_DEVICE_CLASS=y
 # USB Host Controller Drivers
 #
 # CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_XHCI_HCD is not set
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
 CONFIG_USB_EHCI_TT_NEWSCHED=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_OHCI_HCD is not set
 # CONFIG_USB_UHCI_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
 # CONFIG_USB_WHCI_HCD is not set
 # CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
 #
 # USB Device Class drivers
@@ -1248,7 +1321,6 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
 # CONFIG_UWB is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
-# CONFIG_ACCESSIBILITY is not set
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
@@ -1258,7 +1330,7 @@ CONFIG_LEDS_CLASS=y
 # CONFIG_LEDS_PCA9532 is not set
 CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_GPIO_PLATFORM=y
-# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP3944 is not set
 # CONFIG_LEDS_PCA955X is not set
 # CONFIG_LEDS_BD2802 is not set
@@ -1269,11 +1341,14 @@ CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+# CONFIG_LEDS_TRIGGER_GPIO is not set
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 #
 # iptables trigger is under Netfilter config (LED target)
 #
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
 CONFIG_RTC_LIB=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_HCTOSYS=y
@@ -1306,6 +1381,7 @@ CONFIG_RTC_DRV_M41T80=y
 CONFIG_RTC_DRV_S35390A=y
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 #
 # SPI RTC drivers
@@ -1344,8 +1420,11 @@ CONFIG_DMA_ENGINE=y
 # CONFIG_ASYNC_TX_DMA is not set
 # CONFIG_DMATEST is not set
 # CONFIG_AUXDISPLAY is not set
-# CONFIG_REGULATOR is not set
 # CONFIG_UIO is not set
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 #
@@ -1358,10 +1437,10 @@ CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 # CONFIG_EXT3_FS_XATTR is not set
 CONFIG_EXT4_FS=m
-# CONFIG_EXT4DEV_COMPAT is not set
 CONFIG_EXT4_FS_XATTR=y
 # CONFIG_EXT4_FS_POSIX_ACL is not set
 # CONFIG_EXT4_FS_SECURITY is not set
+# CONFIG_EXT4_DEBUG is not set
 CONFIG_JBD=y
 # CONFIG_JBD_DEBUG is not set
 CONFIG_JBD2=m
@@ -1370,10 +1449,13 @@ CONFIG_FS_MBCACHE=m
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1446,7 +1528,6 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1537,6 +1618,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1552,6 +1634,7 @@ CONFIG_SCHED_DEBUG=y
 CONFIG_SCHEDSTATS=y
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
 CONFIG_DEBUG_PREEMPT=y
 # CONFIG_DEBUG_RT_MUTEXES is not set
 # CONFIG_RT_MUTEX_TESTER is not set
@@ -1572,6 +1655,7 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
@@ -1579,6 +1663,7 @@ CONFIG_FRAME_POINTER=y
 # CONFIG_KPROBES_SANITY_TEST is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 CONFIG_LATENCYTOP=y
@@ -1587,25 +1672,12 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_RING_BUFFER=y
+CONFIG_EVENT_TRACING=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
-#
-# Tracers
-#
-# CONFIG_FUNCTION_TRACER is not set
-# CONFIG_IRQSOFF_TRACER is not set
-# CONFIG_PREEMPT_TRACER is not set
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_EVENT_TRACER is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_TRACE_BRANCH_PROFILING is not set
-# CONFIG_STACK_TRACER is not set
-# CONFIG_KMEMTRACE is not set
-# CONFIG_WORKQUEUE_TRACER is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
@@ -1629,20 +1701,19 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
-CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_ALGAPI2=y
-CONFIG_CRYPTO_ALGAPI2=m
+CONFIG_CRYPTO_AEAD2=y
-CONFIG_CRYPTO_AEAD2=m
 CONFIG_CRYPTO_BLKCIPHER=m
-CONFIG_CRYPTO_BLKCIPHER2=m
+CONFIG_CRYPTO_BLKCIPHER2=y
-CONFIG_CRYPTO_HASH2=m
+CONFIG_CRYPTO_HASH2=y
-CONFIG_CRYPTO_RNG2=m
+CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_PCOMP=m
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=m
-CONFIG_CRYPTO_MANAGER2=m
+CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
-CONFIG_CRYPTO_WORKQUEUE=m
+CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 # CONFIG_CRYPTO_AUTHENC is not set
 # CONFIG_CRYPTO_TEST is not set
@@ -1670,11 +1741,13 @@ CONFIG_CRYPTO_PCBC=m
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1691,7 +1764,7 @@ CONFIG_CRYPTO_PCBC=m
 #
 # Ciphers
 #
-# CONFIG_CRYPTO_AES is not set
+CONFIG_CRYPTO_AES=y
 # CONFIG_CRYPTO_ANUBIS is not set
 # CONFIG_CRYPTO_ARC4 is not set
 # CONFIG_CRYPTO_BLOWFISH is not set
@@ -1719,6 +1792,7 @@ CONFIG_CRYPTO_PCBC=m
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_DEV_MV_CESA=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
 CONFIG_BINARY_PRINTF=y
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 7020217fc49f..4e506d09e5f9 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -403,6 +403,15 @@
 #define __ARM_NR_set_tls                (__ARM_NR_BASE+5)
 /*
+ * *NOTE*: This is a ghost syscall private to the kernel.  Only the
+ * __kuser_cmpxchg code in entry-armv.S should be aware of its
+ * existence.  Don't ever use this from user code.
+ */
+#ifdef __KERNEL__
+#define __ARM_NR_cmpxchg                (__ARM_NR_BASE+0x00fff0)
+#endif
+/*
 * The following syscalls are obsolete and no longer available for EABI.
 */
 #if defined(__ARM_EABI__) && !defined(__KERNEL__)
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 0022b4d57f8b..d2903e3bc861 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -21,6 +21,7 @@
 #include <mach/entry-macro.S>
 #include <asm/thread_notify.h>
 #include <asm/unwind.h>
+#include <asm/unistd.h>
 #include "entry-header.S"
@@ -908,10 +909,10 @@ __kuser_cmpxchg:				@ 0xffff0fc0
         * A special ghost syscall is used for that (see traps.c).
         */
        stmfd   sp!, {r7, lr}
-        mov     r7, #0xff00             @ 0xfff0 into r7 for EABI
+        ldr     r7, =1f                 @ it's 20 bits
-        orr     r7, r7, #0xf0
+        swi     __ARM_NR_cmpxchg
-        swi     #0x9ffff0
        ldmfd   sp!, {r7, pc}
+1:      .word   __ARM_NR_cmpxchg
 #elif __LINUX_ARM_ARCH__ < 6
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 885a7214418d..b9505aa267c0 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -97,7 +97,7 @@ __error_a:
        bl      printhex8
        adr     r0, str_a2
        bl      printascii
-        adr     r3, 3f
+        adr     r3, 4f
        ldmia   r3, {r4, r5, r6}                @ get machine desc list
        sub     r4, r3, r4                      @ get offset between virt&phys
        add     r5, r5, r4                      @ convert virt addresses to
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 95718a6b50a6..3f361a783f43 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -528,7 +528,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
         * __kuser_cmpxchg code in entry-armv.S should be aware of its
         * existence.  Don't ever use this from user code.
         */
-        case 0xfff0:
+        case NR(cmpxchg):
        for (;;) {
                extern void do_DataAbort(unsigned long addr, unsigned int fsr,
                                         struct pt_regs *regs);
@@ -573,7 +573,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
                   if not implemented, rather than raising SIGILL.  This
                   way the calling program can gracefully determine whether
                   a feature is supported.  */
-                if (no <= 0x7ff)
+                if ((no & 0xffff) <= 0x7ff)
                        return -ENOSYS;
                break;
        }
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index d83b80478b09..f3757a1c5a10 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/physmap.h>
+#include <linux/io.h>
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index 1da5d1c18ecb..2e69168fc699 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -105,7 +105,7 @@ void __init kirkwood_setup_cpu_mbus(void)
        setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
                      TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE);
        setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
-                      TARGET_PCIE, ATTR_PCIE_MEM, -1);
+                      TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE);
        /*
         * Setup window for NAND controller.
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 0acb61f3c10b..7177c4aa6342 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -845,7 +845,7 @@ int __init kirkwood_find_tclk(void)
        return 166666667;
 }
-static void kirkwood_timer_init(void)
+static void __init kirkwood_timer_init(void)
 {
        kirkwood_tclk = kirkwood_find_tclk();
        orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index a643a846d5fb..44e8be04f259 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -15,7 +15,7 @@
 static inline void __iomem *__io(unsigned long addr)
 {
-        return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_PHYS_BASE)
+        return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_BUS_BASE)
                                        + KIRKWOOD_PCIE_IO_VIRT_BASE);
 }
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 54c132731d2d..a15cf0ee22bd 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -43,6 +43,7 @@
 #define KIRKWOOD_REGS_SIZE              SZ_1M
 #define KIRKWOOD_PCIE_MEM_PHYS_BASE     0xe0000000
+#define KIRKWOOD_PCIE_MEM_BUS_BASE      0xe0000000
 #define KIRKWOOD_PCIE_MEM_SIZE          SZ_128M
 /*
diff --git a/arch/arm/mach-kirkwood/openrd_base-setup.c b/arch/arm/mach-kirkwood/openrd_base-setup.c
index 947dfb8cd5b2..77617c722299 100644
--- a/arch/arm/mach-kirkwood/openrd_base-setup.c
+++ b/arch/arm/mach-kirkwood/openrd_base-setup.c
@@ -70,8 +70,20 @@ static void __init openrd_base_init(void)
        kirkwood_ge00_init(&openrd_base_ge00_data);
        kirkwood_sata_init(&openrd_base_sata_data);
        kirkwood_sdio_init(&openrd_base_mvsdio_data);
+        kirkwood_i2c_init();
 }
+static int __init openrd_base_pci_init(void)
+{
+        if (machine_is_openrd_base())
+                kirkwood_pcie_init();
+        return 0;
+ }
+subsys_initcall(openrd_base_pci_init);
 MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
        /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index d90b9aae308d..a604b2a701aa 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -93,7 +93,7 @@ static struct pci_ops pcie_ops = {
 };
-static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
+static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
 {
        struct resource *res;
        extern unsigned int kirkwood_clk_ctrl;
@@ -115,7 +115,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
         */
        res[0].name = "PCIe I/O Space";
        res[0].flags = IORESOURCE_IO;
-        res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE;
+        res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
        res[0].end = res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
        if (request_resource(&ioport_resource, &res[0]))
                panic("Request PCIe IO resource failed\n");
@@ -126,7 +126,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
         */
        res[1].name = "PCIe Memory Space";
        res[1].flags = IORESOURCE_MEM;
-        res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE;
+        res[1].start = KIRKWOOD_PCIE_MEM_BUS_BASE;
        res[1].end = res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1;
        if (request_resource(&iomem_resource, &res[1]))
                panic("Request PCIe Memory resource failed\n");
diff --git a/arch/arm/mach-ks8695/include/mach/regs-switch.h b/arch/arm/mach-ks8695/include/mach/regs-switch.h
index 56d12e8de895..97e8acb1cf6c 100644
--- a/arch/arm/mach-ks8695/include/mach/regs-switch.h
+++ b/arch/arm/mach-ks8695/include/mach/regs-switch.h
@@ -25,7 +25,7 @@
 #define KS8695_SEC1             (0x04)          /* Switch Engine Control 1 */
 #define KS8695_SEC2             (0x08)          /* Switch Engine Control 2 */
-#define KS8695_P(x)_C(z)        (0xc0 + (((x)-1)*3 + ((z)-1))*4)        /* Port Configuration Registers */
+#define KS8695_SEPXCZ(x,z)      (0x0c + (((x)-1)*3 + ((z)-1))*4)        /* Port Configuration Registers */
 #define KS8695_SEP12AN          (0x48)          /* Port 1 & 2 Auto-Negotiation */
 #define KS8695_SEP34AN          (0x4c)          /* Port 3 & 4 Auto-Negotiation */
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 1b22e4af8791..08465eb6a2c2 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -845,6 +845,8 @@ static char * __init mv78xx0_id(void)
        } else if (dev == MV78100_DEV_ID) {
                if (rev == MV78100_REV_A0)
                        return "MV78100-A0";
+                else if (rev == MV78100_REV_A1)
+                        return "MV78100-A1";
                else
                        return "MV78100-Rev-Unsupported";
        } else if (dev == MV78200_DEV_ID) {
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index d715b92b0908..788bdace1304 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -112,6 +112,7 @@
 #define MV78100_DEV_ID          0x7810
 #define MV78100_REV_A0          1
+#define MV78100_REV_A1          2
 #define MV78200_DEV_ID          0x7820
 #define MV78200_REV_A0          1
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index d694ce289668..6112af431fa4 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -25,6 +25,8 @@
 #include "generic.h"
+#define MAX_INTERNAL_IRQS       128
 #define IRQ_BIT(n)      (((n) - PXA_IRQ(0)) & 0x1f)
 #define _ICMR(n)        (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR))
 #define _ICLR(n)        (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR))
@@ -122,6 +124,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 {
        int irq, i;
+        BUG_ON(irq_nr > MAX_INTERNAL_IRQS);
        pxa_internal_irq_nr = irq_nr;
        for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) {
@@ -149,7 +153,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 }
 #ifdef CONFIG_PM
-static unsigned long saved_icmr[2];
+static unsigned long saved_icmr[MAX_INTERNAL_IRQS/32];
+static unsigned long saved_ipr[MAX_INTERNAL_IRQS];
 static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
 {
@@ -159,6 +164,8 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
                saved_icmr[i] = _ICMR(irq);
                _ICMR(irq) = 0;
        }
+        for (i = 0; i < pxa_internal_irq_nr; i++)
+                saved_ipr[i] = IPR(i);
        return 0;
 }
@@ -171,6 +178,8 @@ static int pxa_irq_resume(struct sys_device *dev)
                _ICMR(irq) = saved_icmr[i];
                _ICLR(irq) = 0;
        }
+        for (i = 0; i < pxa_internal_irq_nr; i++)
+                IPR(i) = saved_ipr[i];
        ICCR = 1;
        return 0;
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index bb2cc0dd44ec..0b92291a58f6 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -292,10 +292,10 @@ const static unsigned int palmtc_keypad_col_gpios[] = {
 static struct matrix_keypad_platform_data palmtc_keypad_platform_data = {
        .keymap_data    = &palmtc_keymap_data,
-        .col_gpios      = palmtc_keypad_row_gpios,
+        .row_gpios      = palmtc_keypad_row_gpios,
-        .num_col_gpios  = 12,
+        .num_row_gpios  = ARRAY_SIZE(palmtc_keypad_row_gpios),
-        .row_gpios      = palmtc_keypad_col_gpios,
+        .col_gpios      = palmtc_keypad_col_gpios,
-        .num_row_gpios  = 4,
+        .num_col_gpios  = ARRAY_SIZE(palmtc_keypad_col_gpios),
        .active_low     = 1,
        .debounce_ms            = 20,
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 82ff5733e4dc..3da45d051743 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -779,11 +779,34 @@ static void __init common_init(void)
        pxa_set_i2c_info(NULL);
 }
+#if defined(CONFIG_MACH_AKITA) || defined(CONFIG_MACH_BORZOI)
+static struct nand_bbt_descr sharpsl_akita_bbt = {
+        .options = 0,
+        .offs = 4,
+        .len = 1,
+        .pattern = scan_ff_pattern
+};
+static struct nand_ecclayout akita_oobinfo = {
+        .eccbytes = 24,
+        .eccpos = {
+                   0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
+                   0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
+                   0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
+        .oobfree = {{0x08, 0x09}}
+};
+#endif
 #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI)
 static void __init spitz_init(void)
 {
        spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON;
+        if (machine_is_borzoi()) {
+                sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt;
+                sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo;
+        }
        platform_scoop_config = &spitz_pcmcia_config;
        common_init();
@@ -808,22 +831,6 @@ static struct i2c_board_info akita_i2c_board_info[] = {
        },
 };
-static struct nand_bbt_descr sharpsl_akita_bbt = {
-        .options = 0,
-        .offs = 4,
-        .len = 1,
-        .pattern = scan_ff_pattern
-};
-static struct nand_ecclayout akita_oobinfo = {
-        .eccbytes = 24,
-        .eccpos = {
-                   0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
-                   0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
-                   0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
-        .oobfree = {{0x08, 0x09}}
-};
 static void __init akita_init(void)
 {
        spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON;
diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c
index 069a61017c02..aa1e9535e358 100644
--- a/block/cfq-iosched.c
+++ b/block/cfq-iosched.c
@@ -196,6 +196,7 @@ enum cfqq_state_flags {
        CFQ_CFQQ_FLAG_slice_new,        /* no requests dispatched in slice */
        CFQ_CFQQ_FLAG_sync,             /* synchronous queue */
        CFQ_CFQQ_FLAG_coop,             /* has done a coop jump of the queue */
+        CFQ_CFQQ_FLAG_coop_preempt,     /* coop preempt */
 };
 #define CFQ_CFQQ_FNS(name)                                              \
@@ -222,6 +223,7 @@ CFQ_CFQQ_FNS(prio_changed);
 CFQ_CFQQ_FNS(slice_new);
 CFQ_CFQQ_FNS(sync);
 CFQ_CFQQ_FNS(coop);
+CFQ_CFQQ_FNS(coop_preempt);
 #undef CFQ_CFQQ_FNS
 #define cfq_log_cfqq(cfqd, cfqq, fmt, args...)  \
@@ -945,10 +947,13 @@ static struct cfq_queue *cfq_set_active_queue(struct cfq_data *cfqd,
 {
        if (!cfqq) {
                cfqq = cfq_get_next_queue(cfqd);
-                if (cfqq)
+                if (cfqq && !cfq_cfqq_coop_preempt(cfqq))
                        cfq_clear_cfqq_coop(cfqq);
        }
+        if (cfqq)
+                cfq_clear_cfqq_coop_preempt(cfqq);
        __cfq_set_active_queue(cfqd, cfqq);
        return cfqq;
 }
@@ -2051,7 +2056,7 @@ cfq_should_preempt(struct cfq_data *cfqd, struct cfq_queue *new_cfqq,
         * it's a metadata request and the current queue is doing regular IO.
         */
        if (rq_is_meta(rq) && !cfqq->meta_pending)
-                return false;
+                return true;
        /*
         * Allow an RT request to pre-empt an ongoing non-RT cfqq timeslice.
@@ -2066,8 +2071,16 @@ cfq_should_preempt(struct cfq_data *cfqd, struct cfq_queue *new_cfqq,
         * if this request is as-good as one we would expect from the
         * current cfqq, let it preempt
         */
-        if (cfq_rq_close(cfqd, rq))
+        if (cfq_rq_close(cfqd, rq) && (!cfq_cfqq_coop(new_cfqq) ||
+            cfqd->busy_queues == 1)) {
+                /*
+                 * Mark new queue coop_preempt, so its coop flag will not be
+                 * cleared when new queue gets scheduled at the very first time
+                 */
+                cfq_mark_cfqq_coop_preempt(new_cfqq);
+                cfq_mark_cfqq_coop(new_cfqq);
                return true;
+        }
        return false;
 }
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a06f5d6375a8..a3241a1a710b 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -2718,6 +2718,30 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
                        },
                        .driver_data = "20071026",      /* yyyymmdd */
                },
+                /*
+                 * All BIOS versions for the MSI K9A2 Platinum (MS-7376)
+                 * support 64bit DMA.
+                 *
+                 * BIOS versions earlier than 1.5 had the Manufacturer DMI
+                 * fields as "MICRO-STAR INTERANTIONAL CO.,LTD".
+                 * This spelling mistake was fixed in BIOS version 1.5, so
+                 * 1.5 and later have the Manufacturer as
+                 * "MICRO-STAR INTERNATIONAL CO.,LTD".
+                 * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER".
+                 *
+                 * BIOS versions earlier than 1.9 had a Board Product Name
+                 * DMI field of "MS-7376". This was changed to be
+                 * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still
+                 * match on DMI_BOARD_NAME of "MS-7376".
+                 */
+                {
+                        .ident = "MSI K9A2 Platinum",
+                        .matches = {
+                                DMI_MATCH(DMI_BOARD_VENDOR,
+                                          "MICRO-STAR INTER"),
+                                DMI_MATCH(DMI_BOARD_NAME, "MS-7376"),
+                        },
+                },
                { }
        };
        const struct dmi_system_id *match;
@@ -2729,18 +2753,24 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
            !match)
                return false;
+        if (!match->driver_data)
+                goto enable_64bit;
        dmi_get_date(DMI_BIOS_DATE, &year, &month, &date);
        snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date);
-        if (strcmp(buf, match->driver_data) >= 0) {
+        if (strcmp(buf, match->driver_data) >= 0)
-                dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n",
+                goto enable_64bit;
-                           match->ident);
+        else {
-                return true;
-        } else {
                dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, "
                           "forcing 32bit DMA, update BIOS\n", match->ident);
                return false;
        }
+enable_64bit:
+        dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n",
+                   match->ident);
+        return true;
 }
 static bool ahci_broken_system_poweroff(struct pci_dev *pdev)
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index d7f0f1b1ae3e..dc72690ed5db 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4919,10 +4919,11 @@ struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
 */
 void ata_qc_free(struct ata_queued_cmd *qc)
 {
-        struct ata_port *ap = qc->ap;
+        struct ata_port *ap;
        unsigned int tag;
        WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
+        ap = qc->ap;
        qc->flags = 0;
        tag = qc->tag;
@@ -4934,11 +4935,13 @@ void ata_qc_free(struct ata_queued_cmd *qc)
 void __ata_qc_complete(struct ata_queued_cmd *qc)
 {
-        struct ata_port *ap = qc->ap;
+        struct ata_port *ap;
-        struct ata_link *link = qc->dev->link;
+        struct ata_link *link;
        WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
        WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
+        ap = qc->ap;
+        link = qc->dev->link;
        if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
                ata_sg_clean(qc);
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index bdd43c7f432e..02efd9a83d26 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -93,7 +93,6 @@ static const struct pci_device_id svia_pci_tbl[] = {
        { PCI_VDEVICE(VIA, 0x7372), vt6420 },
        { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */
        { PCI_VDEVICE(VIA, 0x9000), vt8251 },
-        { PCI_VDEVICE(VIA, 0x9040), vt8251 },
        { }     /* terminate list */
 };
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 92aeb918e0c0..e5b138be45fa 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1227,8 +1227,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
                goto out;
        /* Try to set up FBC with a reasonable compressed buffer size */
-        if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) &&
+        if (I915_HAS_FBC(dev) && i915_powersave) {
-            i915_powersave) {
                int cfb_size;
                /* Try to get an 8M buffer... */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c5df2234418d..57204e298975 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -296,6 +296,12 @@ typedef struct drm_i915_private {
        u32 saveVBLANK_A;
        u32 saveVSYNC_A;
        u32 saveBCLRPAT_A;
+        u32 saveTRANS_HTOTAL_A;
+        u32 saveTRANS_HBLANK_A;
+        u32 saveTRANS_HSYNC_A;
+        u32 saveTRANS_VTOTAL_A;
+        u32 saveTRANS_VBLANK_A;
+        u32 saveTRANS_VSYNC_A;
        u32 savePIPEASTAT;
        u32 saveDSPASTRIDE;
        u32 saveDSPASIZE;
@@ -304,8 +310,11 @@ typedef struct drm_i915_private {
        u32 saveDSPASURF;
        u32 saveDSPATILEOFF;
        u32 savePFIT_PGM_RATIOS;
+        u32 saveBLC_HIST_CTL;
        u32 saveBLC_PWM_CTL;
        u32 saveBLC_PWM_CTL2;
+        u32 saveBLC_CPU_PWM_CTL;
+        u32 saveBLC_CPU_PWM_CTL2;
        u32 saveFPB0;
        u32 saveFPB1;
        u32 saveDPLL_B;
@@ -317,6 +326,12 @@ typedef struct drm_i915_private {
        u32 saveVBLANK_B;
        u32 saveVSYNC_B;
        u32 saveBCLRPAT_B;
+        u32 saveTRANS_HTOTAL_B;
+        u32 saveTRANS_HBLANK_B;
+        u32 saveTRANS_HSYNC_B;
+        u32 saveTRANS_VTOTAL_B;
+        u32 saveTRANS_VBLANK_B;
+        u32 saveTRANS_VSYNC_B;
        u32 savePIPEBSTAT;
        u32 saveDSPBSTRIDE;
        u32 saveDSPBSIZE;
@@ -342,6 +357,7 @@ typedef struct drm_i915_private {
        u32 savePFIT_CONTROL;
        u32 save_palette_a[256];
        u32 save_palette_b[256];
+        u32 saveDPFC_CB_BASE;
        u32 saveFBC_CFB_BASE;
        u32 saveFBC_LL_BASE;
        u32 saveFBC_CONTROL;
@@ -349,6 +365,12 @@ typedef struct drm_i915_private {
        u32 saveIER;
        u32 saveIIR;
        u32 saveIMR;
+        u32 saveDEIER;
+        u32 saveDEIMR;
+        u32 saveGTIER;
+        u32 saveGTIMR;
+        u32 saveFDI_RXA_IMR;
+        u32 saveFDI_RXB_IMR;
        u32 saveCACHE_MODE_0;
        u32 saveD_STATE;
        u32 saveDSPCLK_GATE_D;
@@ -382,6 +404,16 @@ typedef struct drm_i915_private {
        u32 savePIPEB_DP_LINK_M;
        u32 savePIPEA_DP_LINK_N;
        u32 savePIPEB_DP_LINK_N;
+        u32 saveFDI_RXA_CTL;
+        u32 saveFDI_TXA_CTL;
+        u32 saveFDI_RXB_CTL;
+        u32 saveFDI_TXB_CTL;
+        u32 savePFA_CTL_1;
+        u32 savePFB_CTL_1;
+        u32 savePFA_WIN_SZ;
+        u32 savePFB_WIN_SZ;
+        u32 savePFA_WIN_POS;
+        u32 savePFB_WIN_POS;
        struct {
                struct drm_mm gtt_space;
@@ -492,6 +524,8 @@ typedef struct drm_i915_private {
                struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
        } mm;
        struct sdvo_device_mapping sdvo_mappings[2];
+        /* indicate whether the LVDS_BORDER should be enabled or not */
+        unsigned int lvds_border_bits;
        /* Reclocking support */
        bool render_reclock_avail;
@@ -981,7 +1015,10 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev))
 #define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev))
-#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev)))
+#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \
+                           (IS_I9XX(dev) || IS_GM45(dev)) && \
+                           !IS_IGD(dev) && \
+                           !IS_IGDNG(dev))
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0466ddbeba32..1687edf68795 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -968,6 +968,8 @@
 #define   LVDS_PORT_EN                  (1 << 31)
 /* Selects pipe B for LVDS data.  Must be set on pre-965. */
 #define   LVDS_PIPEB_SELECT             (1 << 30)
+/* Enable border for unscaled (or aspect-scaled) display */
+#define   LVDS_BORDER_ENABLE            (1 << 15)
 /*
 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per
 * pixel.
@@ -1078,6 +1080,8 @@
 #define   BACKLIGHT_DUTY_CYCLE_SHIFT            (0)
 #define   BACKLIGHT_DUTY_CYCLE_MASK             (0xffff)
+#define BLC_HIST_CTL            0x61260
 /* TV port control */
 #define TV_CTL                  0x68000
 /** Enables the TV encoder */
@@ -1780,6 +1784,11 @@
 #define   PIPE_START_VBLANK_INTERRUPT_STATUS    (1UL<<2) /* 965 or later */
 #define   PIPE_VBLANK_INTERRUPT_STATUS          (1UL<<1)
 #define   PIPE_OVERLAY_UPDATED_STATUS           (1UL<<0)
+#define   PIPE_BPC_MASK                         (7 << 5) /* Ironlake */
+#define   PIPE_8BPC                             (0 << 5)
+#define   PIPE_10BPC                            (1 << 5)
+#define   PIPE_6BPC                             (2 << 5)
+#define   PIPE_12BPC                            (3 << 5)
 #define DSPARB                  0x70030
 #define   DSPARB_CSTART_MASK    (0x7f << 7)
@@ -1790,17 +1799,29 @@
 #define   DSPARB_AEND_SHIFT     0
 #define DSPFW1                  0x70034
+#define   DSPFW_SR_SHIFT        23
+#define   DSPFW_CURSORB_SHIFT   16
+#define   DSPFW_PLANEB_SHIFT    8
 #define DSPFW2                  0x70038
+#define   DSPFW_CURSORA_MASK    0x00003f00
+#define   DSPFW_CURSORA_SHIFT   16
 #define DSPFW3                  0x7003c
+#define   DSPFW_HPLL_SR_EN      (1<<31)
+#define   DSPFW_CURSOR_SR_SHIFT 24
 #define   IGD_SELF_REFRESH_EN   (1<<30)
 /* FIFO watermark sizes etc */
+#define G4X_FIFO_LINE_SIZE      64
 #define I915_FIFO_LINE_SIZE     64
 #define I830_FIFO_LINE_SIZE     32
+#define G4X_FIFO_SIZE           127
 #define I945_FIFO_SIZE          127 /* 945 & 965 */
 #define I915_FIFO_SIZE          95
 #define I855GM_FIFO_SIZE        127 /* In cachelines */
 #define I830_FIFO_SIZE          95
+#define G4X_MAX_WM              0x3f
 #define I915_MAX_WM             0x3f
 #define IGD_DISPLAY_FIFO        512 /* in 64byte unit */
@@ -2030,6 +2051,11 @@
 #define PFA_CTL_1               0x68080
 #define PFB_CTL_1               0x68880
 #define  PF_ENABLE              (1<<31)
+#define  PF_FILTER_MASK         (3<<23)
+#define  PF_FILTER_PROGRAMMED   (0<<23)
+#define  PF_FILTER_MED_3x3      (1<<23)
+#define  PF_FILTER_EDGE_ENHANCE (2<<23)
+#define  PF_FILTER_EDGE_SOFTEN  (3<<23)
 #define PFA_WIN_SZ              0x68074
 #define PFB_WIN_SZ              0x68874
 #define PFA_WIN_POS             0x68070
@@ -2149,11 +2175,11 @@
 #define  DREF_CPU_SOURCE_OUTPUT_MASK            (3<<13)
 #define  DREF_SSC_SOURCE_DISABLE                (0<<11)
 #define  DREF_SSC_SOURCE_ENABLE                 (2<<11)
-#define  DREF_SSC_SOURCE_MASK                   (2<<11)
+#define  DREF_SSC_SOURCE_MASK                   (3<<11)
 #define  DREF_NONSPREAD_SOURCE_DISABLE          (0<<9)
 #define  DREF_NONSPREAD_CK505_ENABLE            (1<<9)
 #define  DREF_NONSPREAD_SOURCE_ENABLE           (2<<9)
-#define  DREF_NONSPREAD_SOURCE_MASK             (2<<9)
+#define  DREF_NONSPREAD_SOURCE_MASK             (3<<9)
 #define  DREF_SUPERSPREAD_SOURCE_DISABLE        (0<<7)
 #define  DREF_SUPERSPREAD_SOURCE_ENABLE         (2<<7)
 #define  DREF_SSC4_DOWNSPREAD                   (0<<6)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index bd6d8d91ca9f..992d5617e798 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -32,11 +32,15 @@
 static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
+        u32     dpll_reg;
-        if (pipe == PIPE_A)
+        if (IS_IGDNG(dev)) {
-                return (I915_READ(DPLL_A) & DPLL_VCO_ENABLE);
+                dpll_reg = (pipe == PIPE_A) ? PCH_DPLL_A: PCH_DPLL_B;
-        else
+        } else {
-                return (I915_READ(DPLL_B) & DPLL_VCO_ENABLE);
+                dpll_reg = (pipe == PIPE_A) ? DPLL_A: DPLL_B;
+        }
+        return (I915_READ(dpll_reg) & DPLL_VCO_ENABLE);
 }
 static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
@@ -49,6 +53,9 @@ static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
        if (!i915_pipe_enabled(dev, pipe))
                return;
+        if (IS_IGDNG(dev))
+                reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
        if (pipe == PIPE_A)
                array = dev_priv->save_palette_a;
        else
@@ -68,6 +75,9 @@ static void i915_restore_palette(struct drm_device *dev, enum pipe pipe)
        if (!i915_pipe_enabled(dev, pipe))
                return;
+        if (IS_IGDNG(dev))
+                reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
        if (pipe == PIPE_A)
                array = dev_priv->save_palette_a;
        else
@@ -232,10 +242,16 @@ static void i915_save_modeset_reg(struct drm_device *dev)
        /* Pipe & plane A info */
        dev_priv->savePIPEACONF = I915_READ(PIPEACONF);
        dev_priv->savePIPEASRC = I915_READ(PIPEASRC);
-        dev_priv->saveFPA0 = I915_READ(FPA0);
+        if (IS_IGDNG(dev)) {
-        dev_priv->saveFPA1 = I915_READ(FPA1);
+                dev_priv->saveFPA0 = I915_READ(PCH_FPA0);
-        dev_priv->saveDPLL_A = I915_READ(DPLL_A);
+                dev_priv->saveFPA1 = I915_READ(PCH_FPA1);
-        if (IS_I965G(dev))
+                dev_priv->saveDPLL_A = I915_READ(PCH_DPLL_A);
+        } else {
+                dev_priv->saveFPA0 = I915_READ(FPA0);
+                dev_priv->saveFPA1 = I915_READ(FPA1);
+                dev_priv->saveDPLL_A = I915_READ(DPLL_A);
+        }
+        if (IS_I965G(dev) && !IS_IGDNG(dev))
                dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD);
        dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A);
        dev_priv->saveHBLANK_A = I915_READ(HBLANK_A);
@@ -243,7 +259,24 @@ static void i915_save_modeset_reg(struct drm_device *dev)
        dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A);
        dev_priv->saveVBLANK_A = I915_READ(VBLANK_A);
        dev_priv->saveVSYNC_A = I915_READ(VSYNC_A);
-        dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
+        if (!IS_IGDNG(dev))
+                dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
+        if (IS_IGDNG(dev)) {
+                dev_priv->saveFDI_TXA_CTL = I915_READ(FDI_TXA_CTL);
+                dev_priv->saveFDI_RXA_CTL = I915_READ(FDI_RXA_CTL);
+                dev_priv->savePFA_CTL_1 = I915_READ(PFA_CTL_1);
+                dev_priv->savePFA_WIN_SZ = I915_READ(PFA_WIN_SZ);
+                dev_priv->savePFA_WIN_POS = I915_READ(PFA_WIN_POS);
+                dev_priv->saveTRANS_HTOTAL_A = I915_READ(TRANS_HTOTAL_A);
+                dev_priv->saveTRANS_HBLANK_A = I915_READ(TRANS_HBLANK_A);
+                dev_priv->saveTRANS_HSYNC_A = I915_READ(TRANS_HSYNC_A);
+                dev_priv->saveTRANS_VTOTAL_A = I915_READ(TRANS_VTOTAL_A);
+                dev_priv->saveTRANS_VBLANK_A = I915_READ(TRANS_VBLANK_A);
+                dev_priv->saveTRANS_VSYNC_A = I915_READ(TRANS_VSYNC_A);
+        }
        dev_priv->saveDSPACNTR = I915_READ(DSPACNTR);
        dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE);
@@ -260,10 +293,16 @@ static void i915_save_modeset_reg(struct drm_device *dev)
        /* Pipe & plane B info */
        dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
        dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC);
-        dev_priv->saveFPB0 = I915_READ(FPB0);
+        if (IS_IGDNG(dev)) {
-        dev_priv->saveFPB1 = I915_READ(FPB1);
+                dev_priv->saveFPB0 = I915_READ(PCH_FPB0);
-        dev_priv->saveDPLL_B = I915_READ(DPLL_B);
+                dev_priv->saveFPB1 = I915_READ(PCH_FPB1);
-        if (IS_I965G(dev))
+                dev_priv->saveDPLL_B = I915_READ(PCH_DPLL_B);
+        } else {
+                dev_priv->saveFPB0 = I915_READ(FPB0);
+                dev_priv->saveFPB1 = I915_READ(FPB1);
+                dev_priv->saveDPLL_B = I915_READ(DPLL_B);
+        }
+        if (IS_I965G(dev) && !IS_IGDNG(dev))
                dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD);
        dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B);
        dev_priv->saveHBLANK_B = I915_READ(HBLANK_B);
@@ -271,7 +310,24 @@ static void i915_save_modeset_reg(struct drm_device *dev)
        dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B);
        dev_priv->saveVBLANK_B = I915_READ(VBLANK_B);
        dev_priv->saveVSYNC_B = I915_READ(VSYNC_B);
-        dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
+        if (!IS_IGDNG(dev))
+                dev_priv->saveBCLRPAT_B = I915_READ(BCLRPAT_B);
+        if (IS_IGDNG(dev)) {
+                dev_priv->saveFDI_TXB_CTL = I915_READ(FDI_TXB_CTL);
+                dev_priv->saveFDI_RXB_CTL = I915_READ(FDI_RXB_CTL);
+                dev_priv->savePFB_CTL_1 = I915_READ(PFB_CTL_1);
+                dev_priv->savePFB_WIN_SZ = I915_READ(PFB_WIN_SZ);
+                dev_priv->savePFB_WIN_POS = I915_READ(PFB_WIN_POS);
+                dev_priv->saveTRANS_HTOTAL_B = I915_READ(TRANS_HTOTAL_B);
+                dev_priv->saveTRANS_HBLANK_B = I915_READ(TRANS_HBLANK_B);
+                dev_priv->saveTRANS_HSYNC_B = I915_READ(TRANS_HSYNC_B);
+                dev_priv->saveTRANS_VTOTAL_B = I915_READ(TRANS_VTOTAL_B);
+                dev_priv->saveTRANS_VBLANK_B = I915_READ(TRANS_VBLANK_B);
+                dev_priv->saveTRANS_VSYNC_B = I915_READ(TRANS_VSYNC_B);
+        }
        dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR);
        dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE);
@@ -290,23 +346,41 @@ static void i915_save_modeset_reg(struct drm_device *dev)
 static void i915_restore_modeset_reg(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
+        int dpll_a_reg, fpa0_reg, fpa1_reg;
+        int dpll_b_reg, fpb0_reg, fpb1_reg;
        if (drm_core_check_feature(dev, DRIVER_MODESET))
                return;
+        if (IS_IGDNG(dev)) {
+                dpll_a_reg = PCH_DPLL_A;
+                dpll_b_reg = PCH_DPLL_B;
+                fpa0_reg = PCH_FPA0;
+                fpb0_reg = PCH_FPB0;
+                fpa1_reg = PCH_FPA1;
+                fpb1_reg = PCH_FPB1;
+        } else {
+                dpll_a_reg = DPLL_A;
+                dpll_b_reg = DPLL_B;
+                fpa0_reg = FPA0;
+                fpb0_reg = FPB0;
+                fpa1_reg = FPA1;
+                fpb1_reg = FPB1;
+        }
        /* Pipe & plane A info */
        /* Prime the clock */
        if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
-                I915_WRITE(DPLL_A, dev_priv->saveDPLL_A &
+                I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A &
                           ~DPLL_VCO_ENABLE);
                DRM_UDELAY(150);
        }
-        I915_WRITE(FPA0, dev_priv->saveFPA0);
+        I915_WRITE(fpa0_reg, dev_priv->saveFPA0);
-        I915_WRITE(FPA1, dev_priv->saveFPA1);
+        I915_WRITE(fpa1_reg, dev_priv->saveFPA1);
        /* Actually enable it */
-        I915_WRITE(DPLL_A, dev_priv->saveDPLL_A);
+        I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A);
        DRM_UDELAY(150);
-        if (IS_I965G(dev))
+        if (IS_I965G(dev) && !IS_IGDNG(dev))
                I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);
        DRM_UDELAY(150);
@@ -317,7 +391,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
        I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A);
        I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A);
        I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A);
-        I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A);
+        if (!IS_IGDNG(dev))
+                I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A);
+        if (IS_IGDNG(dev)) {
+                I915_WRITE(FDI_RXA_CTL, dev_priv->saveFDI_RXA_CTL);
+                I915_WRITE(FDI_TXA_CTL, dev_priv->saveFDI_TXA_CTL);
+                I915_WRITE(PFA_CTL_1, dev_priv->savePFA_CTL_1);
+                I915_WRITE(PFA_WIN_SZ, dev_priv->savePFA_WIN_SZ);
+                I915_WRITE(PFA_WIN_POS, dev_priv->savePFA_WIN_POS);
+                I915_WRITE(TRANS_HTOTAL_A, dev_priv->saveTRANS_HTOTAL_A);
+                I915_WRITE(TRANS_HBLANK_A, dev_priv->saveTRANS_HBLANK_A);
+                I915_WRITE(TRANS_HSYNC_A, dev_priv->saveTRANS_HSYNC_A);
+                I915_WRITE(TRANS_VTOTAL_A, dev_priv->saveTRANS_VTOTAL_A);
+                I915_WRITE(TRANS_VBLANK_A, dev_priv->saveTRANS_VBLANK_A);
+                I915_WRITE(TRANS_VSYNC_A, dev_priv->saveTRANS_VSYNC_A);
+        }
        /* Restore plane info */
        I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE);
@@ -339,14 +430,14 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
        /* Pipe & plane B info */
        if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) {
-                I915_WRITE(DPLL_B, dev_priv->saveDPLL_B &
+                I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B &
                           ~DPLL_VCO_ENABLE);
                DRM_UDELAY(150);
        }
-        I915_WRITE(FPB0, dev_priv->saveFPB0);
+        I915_WRITE(fpb0_reg, dev_priv->saveFPB0);
-        I915_WRITE(FPB1, dev_priv->saveFPB1);
+        I915_WRITE(fpb1_reg, dev_priv->saveFPB1);
        /* Actually enable it */
-        I915_WRITE(DPLL_B, dev_priv->saveDPLL_B);
+        I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B);
        DRM_UDELAY(150);
        if (IS_I965G(dev))
                I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);
@@ -359,7 +450,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
        I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B);
        I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B);
        I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B);
-        I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B);
+        if (!IS_IGDNG(dev))
+                I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B);
+        if (IS_IGDNG(dev)) {
+                I915_WRITE(FDI_RXB_CTL, dev_priv->saveFDI_RXB_CTL);
+                I915_WRITE(FDI_TXB_CTL, dev_priv->saveFDI_TXB_CTL);
+                I915_WRITE(PFB_CTL_1, dev_priv->savePFB_CTL_1);
+                I915_WRITE(PFB_WIN_SZ, dev_priv->savePFB_WIN_SZ);
+                I915_WRITE(PFB_WIN_POS, dev_priv->savePFB_WIN_POS);
+                I915_WRITE(TRANS_HTOTAL_B, dev_priv->saveTRANS_HTOTAL_B);
+                I915_WRITE(TRANS_HBLANK_B, dev_priv->saveTRANS_HBLANK_B);
+                I915_WRITE(TRANS_HSYNC_B, dev_priv->saveTRANS_HSYNC_B);
+                I915_WRITE(TRANS_VTOTAL_B, dev_priv->saveTRANS_VTOTAL_B);
+                I915_WRITE(TRANS_VBLANK_B, dev_priv->saveTRANS_VBLANK_B);
+                I915_WRITE(TRANS_VSYNC_B, dev_priv->saveTRANS_VSYNC_B);
+        }
        /* Restore plane info */
        I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE);
@@ -404,21 +512,43 @@ void i915_save_display(struct drm_device *dev)
                dev_priv->saveCURSIZE = I915_READ(CURSIZE);
        /* CRT state */
-        dev_priv->saveADPA = I915_READ(ADPA);
+        if (IS_IGDNG(dev)) {
+                dev_priv->saveADPA = I915_READ(PCH_ADPA);
+        } else {
+                dev_priv->saveADPA = I915_READ(ADPA);
+        }
        /* LVDS state */
-        dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL);
+        if (IS_IGDNG(dev)) {
-        dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS);
+                dev_priv->savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
-        dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL);
+                dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_PCH_CTL1);
-        if (IS_I965G(dev))
+                dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_PCH_CTL2);
-                dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
+                dev_priv->saveBLC_CPU_PWM_CTL = I915_READ(BLC_PWM_CPU_CTL);
-        if (IS_MOBILE(dev) && !IS_I830(dev))
+                dev_priv->saveBLC_CPU_PWM_CTL2 = I915_READ(BLC_PWM_CPU_CTL2);
-                dev_priv->saveLVDS = I915_READ(LVDS);
+                dev_priv->saveLVDS = I915_READ(PCH_LVDS);
-        if (!IS_I830(dev) && !IS_845G(dev))
+        } else {
+                dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL);
+                dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS);
+                dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL);
+                dev_priv->saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL);
+                if (IS_I965G(dev))
+                        dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
+                if (IS_MOBILE(dev) && !IS_I830(dev))
+                        dev_priv->saveLVDS = I915_READ(LVDS);
+        }
+        if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
                dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
-        dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);
-        dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
+        if (IS_IGDNG(dev)) {
-        dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR);
+                dev_priv->savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS);
+                dev_priv->savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS);
+                dev_priv->savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR);
+        } else {
+                dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);
+                dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
+                dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR);
+        }
        /* Display Port state */
        if (SUPPORTS_INTEGRATED_DP(dev)) {
@@ -437,16 +567,23 @@ void i915_save_display(struct drm_device *dev)
        /* FIXME: save TV & SDVO state */
        /* FBC state */
-        dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
+        if (IS_GM45(dev)) {
-        dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
+                dev_priv->saveDPFC_CB_BASE = I915_READ(DPFC_CB_BASE);
-        dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
+        } else {
-        dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
+                dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
+                dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
+                dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
+                dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
+        }
        /* VGA state */
        dev_priv->saveVGA0 = I915_READ(VGA0);
        dev_priv->saveVGA1 = I915_READ(VGA1);
        dev_priv->saveVGA_PD = I915_READ(VGA_PD);
-        dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
+        if (IS_IGDNG(dev))
+                dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL);
+        else
+                dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
        i915_save_vga(dev);
 }
@@ -485,22 +622,41 @@ void i915_restore_display(struct drm_device *dev)
                I915_WRITE(CURSIZE, dev_priv->saveCURSIZE);
        /* CRT state */
-        I915_WRITE(ADPA, dev_priv->saveADPA);
+        if (IS_IGDNG(dev))
+                I915_WRITE(PCH_ADPA, dev_priv->saveADPA);
+        else
+                I915_WRITE(ADPA, dev_priv->saveADPA);
        /* LVDS state */
-        if (IS_I965G(dev))
+        if (IS_I965G(dev) && !IS_IGDNG(dev))
                I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
-        if (IS_MOBILE(dev) && !IS_I830(dev))
+        if (IS_IGDNG(dev)) {
+                I915_WRITE(PCH_LVDS, dev_priv->saveLVDS);
+        } else if (IS_MOBILE(dev) && !IS_I830(dev))
                I915_WRITE(LVDS, dev_priv->saveLVDS);
-        if (!IS_I830(dev) && !IS_845G(dev))
+        if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
                I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
-        I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
+        if (IS_IGDNG(dev)) {
-        I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
+                I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL);
-        I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
+                I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2);
-        I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
+                I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL);
-        I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
+                I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->saveBLC_CPU_PWM_CTL2);
-        I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
+                I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
+                I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
+                I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR);
+                I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL);
+        } else {
+                I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
+                I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
+                I915_WRITE(BLC_HIST_CTL, dev_priv->saveBLC_HIST_CTL);
+                I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
+                I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
+                I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
+                I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
+        }
        /* Display Port state */
        if (SUPPORTS_INTEGRATED_DP(dev)) {
@@ -511,13 +667,22 @@ void i915_restore_display(struct drm_device *dev)
        /* FIXME: restore TV & SDVO state */
        /* FBC info */
-        I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
+        if (IS_GM45(dev)) {
-        I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
+                g4x_disable_fbc(dev);
-        I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
+                I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE);
-        I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
+        } else {
+                i8xx_disable_fbc(dev);
+                I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
+                I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
+                I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
+                I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
+        }
        /* VGA state */
-        I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
+        if (IS_IGDNG(dev))
+                I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL);
+        else
+                I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
        I915_WRITE(VGA0, dev_priv->saveVGA0);
        I915_WRITE(VGA1, dev_priv->saveVGA1);
        I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
@@ -543,8 +708,17 @@ int i915_save_state(struct drm_device *dev)
        i915_save_display(dev);
        /* Interrupt state */
-        dev_priv->saveIER = I915_READ(IER);
+        if (IS_IGDNG(dev)) {
-        dev_priv->saveIMR = I915_READ(IMR);
+                dev_priv->saveDEIER = I915_READ(DEIER);
+                dev_priv->saveDEIMR = I915_READ(DEIMR);
+                dev_priv->saveGTIER = I915_READ(GTIER);
+                dev_priv->saveGTIMR = I915_READ(GTIMR);
+                dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR);
+                dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR);
+        } else {
+                dev_priv->saveIER = I915_READ(IER);
+                dev_priv->saveIMR = I915_READ(IMR);
+        }
        /* Clock gating state */
        dev_priv->saveD_STATE = I915_READ(D_STATE);
@@ -609,8 +783,17 @@ int i915_restore_state(struct drm_device *dev)
        i915_restore_display(dev);
        /* Interrupt state */
-        I915_WRITE (IER, dev_priv->saveIER);
+        if (IS_IGDNG(dev)) {
-        I915_WRITE (IMR,  dev_priv->saveIMR);
+                I915_WRITE(DEIER, dev_priv->saveDEIER);
+                I915_WRITE(DEIMR, dev_priv->saveDEIMR);
+                I915_WRITE(GTIER, dev_priv->saveGTIER);
+                I915_WRITE(GTIMR, dev_priv->saveGTIMR);
+                I915_WRITE(FDI_RXA_IMR, dev_priv->saveFDI_RXA_IMR);
+                I915_WRITE(FDI_RXB_IMR, dev_priv->saveFDI_RXB_IMR);
+        } else {
+                I915_WRITE (IER, dev_priv->saveIER);
+                I915_WRITE (IMR,  dev_priv->saveIMR);
+        }
        /* Clock gating state */
        I915_WRITE (D_STATE, dev_priv->saveD_STATE);
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 4337414846b6..96cd256e60e6 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -351,20 +351,18 @@ parse_driver_features(struct drm_i915_private *dev_priv,
        struct drm_device *dev = dev_priv->dev;
        struct bdb_driver_features *driver;
-        /* set default for chips without eDP */
-        if (!SUPPORTS_EDP(dev)) {
-                dev_priv->edp_support = 0;
-                return;
-        }
        driver = find_section(bdb, BDB_DRIVER_FEATURES);
        if (!driver)
                return;
-        if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
+        if (driver && SUPPORTS_EDP(dev) &&
+            driver->lvds_config == BDB_DRIVER_FEATURE_EDP) {
                dev_priv->edp_support = 1;
+        } else {
+                dev_priv->edp_support = 0;
+        }
-        if (driver->dual_frequency)
+        if (driver && driver->dual_frequency)
                dev_priv->render_reclock_avail = true;
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3c14240cc002..3ba6546b7c7f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -943,6 +943,7 @@ intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
    clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2);
    clock.p = (clock.p1 * clock.p2);
    clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p;
+    clock.vco = 0;
    memcpy(best_clock, &clock, sizeof(intel_clock_t));
    return true;
 }
@@ -1260,9 +1261,11 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
                return ret;
        }
-        /* Pre-i965 needs to install a fence for tiled scan-out */
+        /* Install a fence for tiled scan-out. Pre-i965 always needs a fence,
-        if (!IS_I965G(dev) &&
+         * whereas 965+ only requires a fence if using framebuffer compression.
-            obj_priv->fence_reg == I915_FENCE_REG_NONE &&
+         * For simplicity, we always install a fence as the cost is not that onerous.
+         */
+        if (obj_priv->fence_reg == I915_FENCE_REG_NONE &&
            obj_priv->tiling_mode != I915_TILING_NONE) {
                ret = i915_gem_object_get_fence_reg(obj);
                if (ret != 0) {
@@ -1513,7 +1516,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
                /* Enable panel fitting for LVDS */
                if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
                        temp = I915_READ(pf_ctl_reg);
-                        I915_WRITE(pf_ctl_reg, temp | PF_ENABLE);
+                        I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
                        /* currently full aspect */
                        I915_WRITE(pf_win_pos, 0);
@@ -1801,6 +1804,8 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
        case DRM_MODE_DPMS_ON:
        case DRM_MODE_DPMS_STANDBY:
        case DRM_MODE_DPMS_SUSPEND:
+                intel_update_watermarks(dev);
                /* Enable the DPLL */
                temp = I915_READ(dpll_reg);
                if ((temp & DPLL_VCO_ENABLE) == 0) {
@@ -1838,7 +1843,6 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
                /* Give the overlay scaler a chance to enable if it's on this pipe */
                //intel_crtc_dpms_video(crtc, true); TODO
-                intel_update_watermarks(dev);
        break;
        case DRM_MODE_DPMS_OFF:
                intel_update_watermarks(dev);
@@ -2082,7 +2086,7 @@ fdi_reduce_ratio(u32 *num, u32 *den)
 #define LINK_N 0x80000
 static void
-igdng_compute_m_n(int bytes_per_pixel, int nlanes,
+igdng_compute_m_n(int bits_per_pixel, int nlanes,
                int pixel_clock, int link_clock,
                struct fdi_m_n *m_n)
 {
@@ -2092,7 +2096,8 @@ igdng_compute_m_n(int bytes_per_pixel, int nlanes,
        temp = (u64) DATA_N * pixel_clock;
        temp = div_u64(temp, link_clock);
-        m_n->gmch_m = div_u64(temp * bytes_per_pixel, nlanes);
+        m_n->gmch_m = div_u64(temp * bits_per_pixel, nlanes);
+        m_n->gmch_m >>= 3; /* convert to bytes_per_pixel */
        m_n->gmch_n = DATA_N;
        fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n);
@@ -2140,6 +2145,13 @@ static struct intel_watermark_params igd_cursor_hplloff_wm = {
        IGD_CURSOR_GUARD_WM,
        IGD_FIFO_LINE_SIZE
 };
+static struct intel_watermark_params g4x_wm_info = {
+        G4X_FIFO_SIZE,
+        G4X_MAX_WM,
+        G4X_MAX_WM,
+        2,
+        G4X_FIFO_LINE_SIZE,
+};
 static struct intel_watermark_params i945_wm_info = {
        I945_FIFO_SIZE,
        I915_MAX_WM,
@@ -2430,17 +2442,74 @@ static int i830_get_fifo_size(struct drm_device *dev, int plane)
        return size;
 }
-static void g4x_update_wm(struct drm_device *dev, int unused, int unused2,
+static void g4x_update_wm(struct drm_device *dev,  int planea_clock,
-                          int unused3, int unused4)
+                          int planeb_clock, int sr_hdisplay, int pixel_size)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
-        u32 fw_blc_self = I915_READ(FW_BLC_SELF);
+        int total_size, cacheline_size;
+        int planea_wm, planeb_wm, cursora_wm, cursorb_wm, cursor_sr;
+        struct intel_watermark_params planea_params, planeb_params;
+        unsigned long line_time_us;
+        int sr_clock, sr_entries = 0, entries_required;
-        if (i915_powersave)
+        /* Create copies of the base settings for each pipe */
-                fw_blc_self |= FW_BLC_SELF_EN;
+        planea_params = planeb_params = g4x_wm_info;
-        else
-                fw_blc_self &= ~FW_BLC_SELF_EN;
+        /* Grab a couple of global values before we overwrite them */
-        I915_WRITE(FW_BLC_SELF, fw_blc_self);
+        total_size = planea_params.fifo_size;
+        cacheline_size = planea_params.cacheline_size;
+        /*
+         * Note: we need to make sure we don't overflow for various clock &
+         * latency values.
+         * clocks go from a few thousand to several hundred thousand.
+         * latency is usually a few thousand
+         */
+        entries_required = ((planea_clock / 1000) * pixel_size * latency_ns) /
+                1000;
+        entries_required /= G4X_FIFO_LINE_SIZE;
+        planea_wm = entries_required + planea_params.guard_size;
+        entries_required = ((planeb_clock / 1000) * pixel_size * latency_ns) /
+                1000;
+        entries_required /= G4X_FIFO_LINE_SIZE;
+        planeb_wm = entries_required + planeb_params.guard_size;
+        cursora_wm = cursorb_wm = 16;
+        cursor_sr = 32;
+        DRM_DEBUG("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
+        /* Calc sr entries for one plane configs */
+        if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
+                /* self-refresh has much higher latency */
+                const static int sr_latency_ns = 12000;
+                sr_clock = planea_clock ? planea_clock : planeb_clock;
+                line_time_us = ((sr_hdisplay * 1000) / sr_clock);
+                /* Use ns/us then divide to preserve precision */
+                sr_entries = (((sr_latency_ns / line_time_us) + 1) *
+                              pixel_size * sr_hdisplay) / 1000;
+                sr_entries = roundup(sr_entries / cacheline_size, 1);
+                DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
+                I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
+        }
+        DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
+                  planea_wm, planeb_wm, sr_entries);
+        planea_wm &= 0x3f;
+        planeb_wm &= 0x3f;
+        I915_WRITE(DSPFW1, (sr_entries << DSPFW_SR_SHIFT) |
+                   (cursorb_wm << DSPFW_CURSORB_SHIFT) |
+                   (planeb_wm << DSPFW_PLANEB_SHIFT) | planea_wm);
+        I915_WRITE(DSPFW2, (I915_READ(DSPFW2) & DSPFW_CURSORA_MASK) |
+                   (cursora_wm << DSPFW_CURSORA_SHIFT));
+        /* HPLL off in SR has some issues on G4x... disable it */
+        I915_WRITE(DSPFW3, (I915_READ(DSPFW3) & ~DSPFW_HPLL_SR_EN) |
+                   (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
 }
 static void i965_update_wm(struct drm_device *dev, int unused, int unused2,
@@ -2586,6 +2655,9 @@ static void intel_update_watermarks(struct drm_device *dev)
        unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0;
        int enabled = 0, pixel_size = 0;
+        if (!dev_priv->display.update_wm)
+                return;
        /* Get the clock config from both planes */
        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
                intel_crtc = to_intel_crtc(crtc);
@@ -2763,7 +2835,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
        /* FDI link */
        if (IS_IGDNG(dev)) {
-                int lane, link_bw;
+                int lane, link_bw, bpp;
                /* eDP doesn't require FDI link, so just set DP M/N
                   according to current link config */
                if (is_edp) {
@@ -2782,10 +2854,72 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                        lane = 4;
                        link_bw = 270000;
                }
-                igdng_compute_m_n(3, lane, target_clock,
+                /* determine panel color depth */
+                temp = I915_READ(pipeconf_reg);
+                switch (temp & PIPE_BPC_MASK) {
+                case PIPE_8BPC:
+                        bpp = 24;
+                        break;
+                case PIPE_10BPC:
+                        bpp = 30;
+                        break;
+                case PIPE_6BPC:
+                        bpp = 18;
+                        break;
+                case PIPE_12BPC:
+                        bpp = 36;
+                        break;
+                default:
+                        DRM_ERROR("unknown pipe bpc value\n");
+                        bpp = 24;
+                }
+                igdng_compute_m_n(bpp, lane, target_clock,
                                  link_bw, &m_n);
        }
+        /* Ironlake: try to setup display ref clock before DPLL
+         * enabling. This is only under driver's control after
+         * PCH B stepping, previous chipset stepping should be
+         * ignoring this setting.
+         */
+        if (IS_IGDNG(dev)) {
+                temp = I915_READ(PCH_DREF_CONTROL);
+                /* Always enable nonspread source */
+                temp &= ~DREF_NONSPREAD_SOURCE_MASK;
+                temp |= DREF_NONSPREAD_SOURCE_ENABLE;
+                I915_WRITE(PCH_DREF_CONTROL, temp);
+                POSTING_READ(PCH_DREF_CONTROL);
+                temp &= ~DREF_SSC_SOURCE_MASK;
+                temp |= DREF_SSC_SOURCE_ENABLE;
+                I915_WRITE(PCH_DREF_CONTROL, temp);
+                POSTING_READ(PCH_DREF_CONTROL);
+                udelay(200);
+                if (is_edp) {
+                        if (dev_priv->lvds_use_ssc) {
+                                temp |= DREF_SSC1_ENABLE;
+                                I915_WRITE(PCH_DREF_CONTROL, temp);
+                                POSTING_READ(PCH_DREF_CONTROL);
+                                udelay(200);
+                                temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
+                                temp |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD;
+                                I915_WRITE(PCH_DREF_CONTROL, temp);
+                                POSTING_READ(PCH_DREF_CONTROL);
+                        } else {
+                                temp |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;
+                                I915_WRITE(PCH_DREF_CONTROL, temp);
+                                POSTING_READ(PCH_DREF_CONTROL);
+                        }
+                }
+        }
        if (IS_IGD(dev)) {
                fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
                if (has_reduced_clock)
@@ -2936,6 +3070,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                lvds = I915_READ(lvds_reg);
                lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT;
+                /* set the corresponsding LVDS_BORDER bit */
+                lvds |= dev_priv->lvds_border_bits;
                /* Set the B0-B3 data pairs corresponding to whether we're going to
                 * set the DPLLs for dual-channel mode or not.
                 */
@@ -4124,7 +4260,9 @@ void intel_init_clock_gating(struct drm_device *dev)
         * Disable clock gating reported to work incorrectly according to the
         * specs, but enable as much else as we can.
         */
-        if (IS_G4X(dev)) {
+        if (IS_IGDNG(dev)) {
+                return;
+        } else if (IS_G4X(dev)) {
                uint32_t dspclk_gate;
                I915_WRITE(RENCLK_GATE_D1, 0);
                I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |
@@ -4212,7 +4350,9 @@ static void intel_init_display(struct drm_device *dev)
                        i830_get_display_clock_speed;
        /* For FIFO watermark updates */
-        if (IS_G4X(dev))
+        if (IS_IGDNG(dev))
+                dev_priv->display.update_wm = NULL;
+        else if (IS_G4X(dev))
                dev_priv->display.update_wm = g4x_update_wm;
        else if (IS_I965G(dev))
                dev_priv->display.update_wm = i965_update_wm;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f4856a510476..d83447557f9b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -400,7 +400,7 @@ intel_dp_i2c_init(struct intel_output *intel_output, const char *name)
 {
        struct intel_dp_priv   *dp_priv = intel_output->dev_priv;
-        DRM_ERROR("i2c_init %s\n", name);
+        DRM_DEBUG_KMS("i2c_init %s\n", name);
        dp_priv->algo.running = false;
        dp_priv->algo.address = 0;
        dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 808bbe412ba8..05598ae10c4b 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -380,7 +380,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
                                adjusted_mode->crtc_vblank_start + vsync_pos;
                /* keep the vsync width constant */
                adjusted_mode->crtc_vsync_end =
-                                adjusted_mode->crtc_vblank_start + vsync_width;
+                                adjusted_mode->crtc_vsync_start + vsync_width;
                border = 1;
                break;
        case DRM_MODE_SCALE_ASPECT:
@@ -526,6 +526,14 @@ out:
        lvds_priv->pfit_control = pfit_control;
        lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
        /*
+         * When there exists the border, it means that the LVDS_BORDR
+         * should be enabled.
+         */
+        if (border)
+                dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
+        else
+                dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
+        /*
         * XXX: It would be nice to support lower refresh rates on the
         * panels to reduce power consumption, and perhaps match the
         * user's requested refresh rate.
diff --git a/fs/bio.c b/fs/bio.c
index 402cb84a92a1..12da5db8682c 100644
--- a/fs/bio.c
+++ b/fs/bio.c
@@ -325,8 +325,16 @@ static void bio_fs_destructor(struct bio *bio)
 *      @gfp_mask: allocation mask to use
 *      @nr_iovecs: number of iovecs
 *
- *      Allocate a new bio with @nr_iovecs bvecs.  If @gfp_mask
+ *      bio_alloc will allocate a bio and associated bio_vec array that can hold
- *      contains __GFP_WAIT, the allocation is guaranteed to succeed.
+ *      at least @nr_iovecs entries. Allocations will be done from the
+ *      fs_bio_set. Also see @bio_alloc_bioset and @bio_kmalloc.
+ *
+ *      If %__GFP_WAIT is set, then bio_alloc will always be able to allocate
+ *      a bio. This is due to the mempool guarantees. To make this work, callers
+ *      must never allocate more than 1 bio at a time from this pool. Callers
+ *      that need to allocate more than 1 bio must always submit the previously
+ *      allocated bio for IO before attempting to allocate a new one. Failure to
+ *      do so can cause livelocks under memory pressure.
 *
 *      RETURNS:
 *      Pointer to new bio on success, NULL on failure.
@@ -350,21 +358,13 @@ static void bio_kmalloc_destructor(struct bio *bio)
 }
 /**
- * bio_alloc - allocate a bio for I/O
+ * bio_kmalloc - allocate a bio for I/O using kmalloc()
 * @gfp_mask:   the GFP_ mask given to the slab allocator
 * @nr_iovecs:  number of iovecs to pre-allocate
 *
 * Description:
- *   bio_alloc will allocate a bio and associated bio_vec array that can hold
+ *   Allocate a new bio with @nr_iovecs bvecs.  If @gfp_mask contains
- *   at least @nr_iovecs entries. Allocations will be done from the
+ *   %__GFP_WAIT, the allocation is guaranteed to succeed.
- *   fs_bio_set. Also see @bio_alloc_bioset.
- *
- *   If %__GFP_WAIT is set, then bio_alloc will always be able to allocate
- *   a bio. This is due to the mempool guarantees. To make this work, callers
- *   must never allocate more than 1 bio at a time from this pool. Callers
- *   that need to allocate more than 1 bio must always submit the previously
- *   allocated bio for IO before attempting to allocate a new one. Failure to
- *   do so can cause livelocks under memory pressure.
 *
 **/
 struct bio *bio_kmalloc(gfp_t gfp_mask, int nr_iovecs)
@@ -407,7 +407,7 @@ EXPORT_SYMBOL(zero_fill_bio);
 *
 * Description:
 *   Put a reference to a &struct bio, either one you have gotten with
- *   bio_alloc or bio_get. The last put of a bio will free it.
+ *   bio_alloc, bio_get or bio_clone. The last put of a bio will free it.
 **/
 void bio_put(struct bio *bio)
 {
diff --git a/mm/backing-dev.c b/mm/backing-dev.c
index 1065b715ef64..11aee09dd2a6 100644
--- a/mm/backing-dev.c
+++ b/mm/backing-dev.c
@@ -628,6 +628,8 @@ static void bdi_prune_sb(struct backing_dev_info *bdi)
 void bdi_unregister(struct backing_dev_info *bdi)
 {
        if (bdi->dev) {
+                bdi_prune_sb(bdi);
                if (!bdi_cap_flush_forker(bdi))
                        bdi_wb_shutdown(bdi);
                bdi_debug_unregister(bdi);
@@ -697,7 +699,6 @@ void bdi_destroy(struct backing_dev_info *bdi)
                spin_unlock(&inode_lock);
        }
-        bdi_prune_sb(bdi);
        bdi_unregister(bdi);
        for (i = 0; i < NR_BDI_STAT_ITEMS; i++)