aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--Documentation/devicetree/bindings/pinctrl/ste,abx500.txt352
-rw-r--r--drivers/pinctrl/pinctrl-abx500.c184
2 files changed, 536 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/ste,abx500.txt b/Documentation/devicetree/bindings/pinctrl/ste,abx500.txt
new file mode 100644
index 000000000000..e3865e136067
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/ste,abx500.txt
@@ -0,0 +1,352 @@
1ST Ericsson abx500 pinmux controller
2
3Required properties:
4- compatible: "stericsson,ab8500-gpio", "stericsson,ab8540-gpio",
5 "stericsson,ab8505-gpio", "stericsson,ab9540-gpio",
6
7Please refer to pinctrl-bindings.txt in this directory for details of the
8common pinctrl bindings used by client devices, including the meaning of the
9phrase "pin configuration node".
10
11ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
12subnodes. Each of these subnodes represents some desired configuration for a
13pin, a group, or a list of pins or groups. This configuration can include the
14mux function to select on those pin(s)/group(s), and various pin configuration
15parameters, such as input, output, pull up, pull down...
16
17The name of each subnode is not important; all subnodes should be enumerated
18and processed purely based on their content.
19
20Required subnode-properties:
21- ste,pins : An array of strings. Each string contains the name of a pin or
22 group.
23
24Optional subnode-properties:
25- ste,function: A string containing the name of the function to mux to the
26 pin or group.
27
28- generic pin configuration option to use. Example :
29
30 default_cfg {
31 ste,pins = "GPIO1";
32 bias-disable;
33 };
34
35- ste,config: Handle of pin configuration node containing the generic
36 pinconfig options to use, as described in pinctrl-bindings.txt in
37 this directory. Example :
38
39 pcfg_bias_disable: pcfg_bias_disable {
40 bias-disable;
41 };
42
43 default_cfg {
44 ste,pins = "GPIO1";
45 ste.config = <&pcfg_bias_disable>;
46 };
47
48Example board file extract:
49
50&pinctrl_abx500 {
51 pinctrl-names = "default";
52 pinctrl-0 = <&sysclkreq2_default_mode>, <&sysclkreq3_default_mode>, <&gpio3_default_mode>, <&sysclkreq6_default_mode>, <&pwmout1_default_mode>, <&pwmout2_default_mode>, <&pwmout3_default_mode>, <&adi1_default_mode>, <&dmic12_default_mode>, <&dmic34_default_mode>, <&dmic56_default_mode>, <&sysclkreq5_default_mode>, <&batremn_default_mode>, <&service_default_mode>, <&pwrctrl0_default_mode>, <&pwrctrl1_default_mode>, <&pwmextvibra1_default_mode>, <&pwmextvibra2_default_mode>, <&gpio51_default_mode>, <&gpio52_default_mode>, <&gpio53_default_mode>, <&gpio54_default_mode>, <&pdmclkdat_default_mode>;
53
54 sysclkreq2 {
55 sysclkreq2_default_mode: sysclkreq2_default {
56 default_mux {
57 ste,function = "sysclkreq";
58 ste,pins = "sysclkreq2_d_1";
59 };
60 default_cfg {
61 ste,pins = "GPIO1";
62 bias-disable;
63 };
64 };
65 };
66 sysclkreq3 {
67 sysclkreq3_default_mode: sysclkreq3_default {
68 default_mux {
69 ste,function = "sysclkreq";
70 ste,pins = "sysclkreq3_d_1";
71 };
72 default_cfg {
73 ste,pins = "GPIO2";
74 output-low;
75 };
76 };
77 };
78 gpio3 {
79 gpio3_default_mode: gpio3_default {
80 default_mux {
81 ste,function = "gpio";
82 ste,pins = "gpio3_a_1";
83 };
84 default_cfg {
85 ste,pins = "GPIO3";
86 output-low;
87 };
88 };
89 };
90 sysclkreq6 {
91 sysclkreq6_default_mode: sysclkreq6_default {
92 default_mux {
93 ste,function = "sysclkreq";
94 ste,pins = "sysclkreq6_d_1";
95 };
96 default_cfg {
97 ste,pins = "GPIO4";
98 bias-disable;
99 };
100 };
101 };
102 pwmout1 {
103 pwmout1_default_mode: pwmout1_default {
104 default_mux {
105 ste,function = "pwmout";
106 ste,pins = "pwmout1_d_1";
107 };
108 default_cfg {
109 ste,pins = "GPIO14";
110 output-low;
111 };
112 };
113 };
114 pwmout2 {
115 pwmout2_default_mode: pwmout2_default {
116 pwmout2_default_mux {
117 ste,function = "pwmout";
118 ste,pins = "pwmout2_d_1";
119 };
120 pwmout2_default_cfg {
121 ste,pins = "GPIO15";
122 output-low;
123 };
124 };
125 };
126 pwmout3 {
127 pwmout3_default_mode: pwmout3_default {
128 pwmout3_default_mux {
129 ste,function = "pwmout";
130 ste,pins = "pwmout3_d_1";
131 };
132 pwmout3_default_cfg {
133 ste,pins = "GPIO16";
134 output-low;
135 };
136 };
137 };
138 adi1 {
139
140 adi1_default_mode: adi1_default {
141 adi1_default_mux {
142 ste,function = "adi1";
143 ste,pins = "adi1_d_1";
144 };
145 adi1_default_cfg1 {
146 ste,pins = "GPIO17","GPIO19","GPIO20";
147 bias-disable;
148 };
149 adi1_default_cfg2 {
150 ste,pins = "GPIO18";
151 output-low;
152 };
153 };
154 };
155 dmic12 {
156 dmic12_default_mode: dmic12_default {
157 dmic12_default_mux {
158 ste,function = "dmic";
159 ste,pins = "dmic12_d_1";
160 };
161 dmic12_default_cfg1 {
162 ste,pins = "GPIO27";
163 output-low;
164 };
165 dmic12_default_cfg2 {
166 ste,pins = "GPIO28";
167 bias-disable;
168 };
169 };
170 };
171 dmic34 {
172 dmic34_default_mode: dmic34_default {
173 dmic34_default_mux {
174 ste,function = "dmic";
175 ste,pins = "dmic34_d_1";
176 };
177 dmic34_default_cfg1 {
178 ste,pins = "GPIO29";
179 output-low;
180 };
181 dmic34_default_cfg2 {
182 ste,pins = "GPIO30";
183 bias-disable;{
184
185 };
186 };
187 };
188 dmic56 {
189 dmic56_default_mode: dmic56_default {
190 dmic56_default_mux {
191 ste,function = "dmic";
192 ste,pins = "dmic56_d_1";
193 };
194 dmic56_default_cfg1 {
195 ste,pins = "GPIO31";
196 output-low;
197 };
198 dmic56_default_cfg2 {
199 ste,pins = "GPIO32";
200 bias-disable;
201 };
202 };
203 };
204 sysclkreq5 {
205 sysclkreq5_default_mode: sysclkreq5_default {
206 sysclkreq5_default_mux {
207 ste,function = "sysclkreq";
208 ste,pins = "sysclkreq5_d_1";
209 };
210 sysclkreq5_default_cfg {
211 ste,pins = "GPIO42";
212 output-low;
213 };
214 };
215 };
216 batremn {
217 batremn_default_mode: batremn_default {
218 batremn_default_mux {
219 ste,function = "batremn";
220 ste,pins = "batremn_d_1";
221 };
222 batremn_default_cfg {
223 ste,pins = "GPIO43";
224 bias-disable;
225 };
226 };
227 };
228 service {
229 service_default_mode: service_default {
230 service_default_mux {
231 ste,function = "service";
232 ste,pins = "service_d_1";
233 };
234 service_default_cfg {
235 ste,pins = "GPIO44";
236 bias-disable;
237 };
238 };
239 };
240 pwrctrl0 {
241 pwrctrl0_default_mux: pwrctrl0_mux {
242 pwrctrl0_default_mux {
243 ste,function = "pwrctrl";
244 ste,pins = "pwrctrl0_d_1";
245 };
246 };
247 pwrctrl0_default_mode: pwrctrl0_default {
248 pwrctrl0_default_cfg {
249 ste,pins = "GPIO45";
250 bias-disable;
251 };
252 };
253 };
254 pwrctrl1 {
255 pwrctrl1_default_mux: pwrctrl1_mux {
256 pwrctrl1_default_mux {
257 ste,function = "pwrctrl";
258 ste,pins = "pwrctrl1_d_1";
259 };
260 };
261 pwrctrl1_default_mode: pwrctrl1_default {
262 pwrctrl1_default_cfg {
263 ste,pins = "GPIO46";
264 bias-disable;
265 };
266 };
267 };
268 pwmextvibra1 {
269 pwmextvibra1_default_mode: pwmextvibra1_default {
270 pwmextvibra1_default_mux {
271 ste,function = "pwmextvibra";
272 ste,pins = "pwmextvibra1_d_1";
273 };
274 pwmextvibra1_default_cfg {
275 ste,pins = "GPIO47";
276 bias-disable;
277 };
278 };
279 };
280 pwmextvibra2 {
281 pwmextvibra2_default_mode: pwmextvibra2_default {
282 pwmextvibra2_default_mux {
283 ste,function = "pwmextvibra";
284 ste,pins = "pwmextvibra2_d_1";
285 };
286 pwmextvibra1_default_cfg {
287 ste,pins = "GPIO48";
288 bias-disable;
289 };
290 };
291 };
292 gpio51 {
293 gpio51_default_mode: gpio51_default {
294 gpio51_default_mux {
295 ste,function = "gpio";
296 ste,pins = "gpio51_a_1";
297 };
298 gpio51_default_cfg {
299 ste,pins = "GPIO51";
300 output-low;
301 };
302 };
303 };
304 gpio52 {
305 gpio52_default_mode: gpio52_default {
306 gpio52_default_mux {
307 ste,function = "gpio";
308 ste,pins = "gpio52_a_1";
309 };
310 gpio52_default_cfg {
311 ste,pins = "GPIO52";
312 bias-pull-down;
313 };
314 };
315 };
316 gpio53 {
317 gpio53_default_mode: gpio53_default {
318 gpio53_default_mux {
319 ste,function = "gpio";
320 ste,pins = "gpio53_a_1";
321 };
322 gpio53_default_cfg {
323 ste,pins = "GPIO53";
324 bias-pull-down;
325 };
326 };
327 };
328 gpio54 {
329 gpio54_default_mode: gpio54_default {
330 gpio54_default_mux {
331 ste,function = "gpio";
332 ste,pins = "gpio54_a_1";
333 };
334 gpio54_default_cfg {
335 ste,pins = "GPIO54";
336 output-low;
337 };
338 };
339 };
340 pdmclkdat {
341 pdmclkdat_default_mode: pdmclkdat_default {
342 pdmclkdat_default_mux {
343 ste,function = "pdm";
344 ste,pins = "pdmclkdat_d_1";
345 };
346 pdmclkdat_default_cfg {
347 ste,pins = "GPIO55", "GPIO56";
348 bias-disable;
349 };
350 };
351 };
352};
diff --git a/drivers/pinctrl/pinctrl-abx500.c b/drivers/pinctrl/pinctrl-abx500.c
index 84b40f77b944..f13a57b13b05 100644
--- a/drivers/pinctrl/pinctrl-abx500.c
+++ b/drivers/pinctrl/pinctrl-abx500.c
@@ -30,8 +30,10 @@
30#include <linux/pinctrl/pinmux.h> 30#include <linux/pinctrl/pinmux.h>
31#include <linux/pinctrl/pinconf.h> 31#include <linux/pinctrl/pinconf.h>
32#include <linux/pinctrl/pinconf-generic.h> 32#include <linux/pinctrl/pinconf-generic.h>
33#include <linux/pinctrl/machine.h>
33 34
34#include "pinctrl-abx500.h" 35#include "pinctrl-abx500.h"
36#include "pinconf.h"
35 37
36/* 38/*
37 * The AB9540 and AB8540 GPIO support are extended versions 39 * The AB9540 and AB8540 GPIO support are extended versions
@@ -757,11 +759,193 @@ static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
757 chip->base + offset - 1); 759 chip->base + offset - 1);
758} 760}
759 761
762static void abx500_dt_free_map(struct pinctrl_dev *pctldev,
763 struct pinctrl_map *map, unsigned num_maps)
764{
765 int i;
766
767 for (i = 0; i < num_maps; i++)
768 if (map[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
769 kfree(map[i].data.configs.configs);
770 kfree(map);
771}
772
773static int abx500_dt_reserve_map(struct pinctrl_map **map,
774 unsigned *reserved_maps,
775 unsigned *num_maps,
776 unsigned reserve)
777{
778 unsigned old_num = *reserved_maps;
779 unsigned new_num = *num_maps + reserve;
780 struct pinctrl_map *new_map;
781
782 if (old_num >= new_num)
783 return 0;
784
785 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
786 if (!new_map)
787 return -ENOMEM;
788
789 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
790
791 *map = new_map;
792 *reserved_maps = new_num;
793
794 return 0;
795}
796
797static int abx500_dt_add_map_mux(struct pinctrl_map **map,
798 unsigned *reserved_maps,
799 unsigned *num_maps, const char *group,
800 const char *function)
801{
802 if (*num_maps == *reserved_maps)
803 return -ENOSPC;
804
805 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
806 (*map)[*num_maps].data.mux.group = group;
807 (*map)[*num_maps].data.mux.function = function;
808 (*num_maps)++;
809
810 return 0;
811}
812
813static int abx500_dt_add_map_configs(struct pinctrl_map **map,
814 unsigned *reserved_maps,
815 unsigned *num_maps, const char *group,
816 unsigned long *configs, unsigned num_configs)
817{
818 unsigned long *dup_configs;
819
820 if (*num_maps == *reserved_maps)
821 return -ENOSPC;
822
823 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
824 GFP_KERNEL);
825 if (!dup_configs)
826 return -ENOMEM;
827
828 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
829
830 (*map)[*num_maps].data.configs.group_or_pin = group;
831 (*map)[*num_maps].data.configs.configs = dup_configs;
832 (*map)[*num_maps].data.configs.num_configs = num_configs;
833 (*num_maps)++;
834
835 return 0;
836}
837
838static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
839 const char *pin_name)
840{
841 int i, pin_number;
842 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
843
844 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
845 for (i = 0; i < npct->soc->npins; i++)
846 if (npct->soc->pins[i].number == pin_number)
847 return npct->soc->pins[i].name;
848 return NULL;
849}
850
851static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
852 struct device_node *np,
853 struct pinctrl_map **map,
854 unsigned *reserved_maps,
855 unsigned *num_maps)
856{
857 int ret;
858 const char *function = NULL;
859 unsigned long *configs;
860 unsigned int nconfigs = 0;
861 bool has_config = 0;
862 unsigned reserve = 0;
863 struct property *prop;
864 const char *group, *gpio_name;
865 struct device_node *np_config;
866
867 ret = of_property_read_string(np, "ste,function", &function);
868 if (ret >= 0)
869 reserve = 1;
870
871 ret = pinconf_generic_parse_dt_config(np, &configs, &nconfigs);
872 if (nconfigs)
873 has_config = 1;
874
875 np_config = of_parse_phandle(np, "ste,config", 0);
876 if (np_config) {
877 ret = pinconf_generic_parse_dt_config(np_config, &configs,
878 &nconfigs);
879 if (ret)
880 goto exit;
881 has_config |= nconfigs;
882 }
883
884 ret = of_property_count_strings(np, "ste,pins");
885 if (ret < 0)
886 goto exit;
887
888 if (has_config)
889 reserve++;
890
891 reserve *= ret;
892
893 ret = abx500_dt_reserve_map(map, reserved_maps, num_maps, reserve);
894 if (ret < 0)
895 goto exit;
896
897 of_property_for_each_string(np, "ste,pins", prop, group) {
898 if (function) {
899 ret = abx500_dt_add_map_mux(map, reserved_maps,
900 num_maps, group, function);
901 if (ret < 0)
902 goto exit;
903 }
904 if (has_config) {
905 gpio_name = abx500_find_pin_name(pctldev, group);
906
907 ret = abx500_dt_add_map_configs(map, reserved_maps,
908 num_maps, gpio_name, configs, 1);
909 if (ret < 0)
910 goto exit;
911 }
912
913 }
914exit:
915 return ret;
916}
917
918static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
919 struct device_node *np_config,
920 struct pinctrl_map **map, unsigned *num_maps)
921{
922 unsigned reserved_maps;
923 struct device_node *np;
924 int ret;
925
926 reserved_maps = 0;
927 *map = NULL;
928 *num_maps = 0;
929
930 for_each_child_of_node(np_config, np) {
931 ret = abx500_dt_subnode_to_map(pctldev, np, map,
932 &reserved_maps, num_maps);
933 if (ret < 0) {
934 abx500_dt_free_map(pctldev, *map, *num_maps);
935 return ret;
936 }
937 }
938
939 return 0;
940}
941
760static const struct pinctrl_ops abx500_pinctrl_ops = { 942static const struct pinctrl_ops abx500_pinctrl_ops = {
761 .get_groups_count = abx500_get_groups_cnt, 943 .get_groups_count = abx500_get_groups_cnt,
762 .get_group_name = abx500_get_group_name, 944 .get_group_name = abx500_get_group_name,
763 .get_group_pins = abx500_get_group_pins, 945 .get_group_pins = abx500_get_group_pins,
764 .pin_dbg_show = abx500_pin_dbg_show, 946 .pin_dbg_show = abx500_pin_dbg_show,
947 .dt_node_to_map = abx500_dt_node_to_map,
948 .dt_free_map = abx500_dt_free_map,
765}; 949};
766 950
767static int abx500_pin_config_get(struct pinctrl_dev *pctldev, 951static int abx500_pin_config_get(struct pinctrl_dev *pctldev,