230 files changed, 4424 insertions, 6020 deletions

diff --git a/Documentation/IRQ-domain.txt b/Documentation/IRQ-domain.txt
new file mode 100644
index 000000000000..27dcaabfb4db
--- /dev/null
+++ b/Documentation/IRQ-domain.txt
@@ -0,0 +1,117 @@
+irq_domain interrupt number mapping library
+
+The current design of the Linux kernel uses a single large number
+space where each separate IRQ source is assigned a different number.
+This is simple when there is only one interrupt controller, but in
+systems with multiple interrupt controllers the kernel must ensure
+that each one gets assigned non-overlapping allocations of Linux
+IRQ numbers.
+
+The irq_alloc_desc*() and irq_free_desc*() APIs provide allocation of
+irq numbers, but they don't provide any support for reverse mapping of
+the controller-local IRQ (hwirq) number into the Linux IRQ number
+space.
+
+The irq_domain library adds mapping between hwirq and IRQ numbers on
+top of the irq_alloc_desc*() API.  An irq_domain to manage mapping is
+preferred over interrupt controller drivers open coding their own
+reverse mapping scheme.
+
+irq_domain also implements translation from Device Tree interrupt
+specifiers to hwirq numbers, and can be easily extended to support
+other IRQ topology data sources.
+
+=== irq_domain usage ===
+An interrupt controller driver creates and registers an irq_domain by
+calling one of the irq_domain_add_*() functions (each mapping method
+has a different allocator function, more on that later).  The function
+will return a pointer to the irq_domain on success.  The caller must
+provide the allocator function with an irq_domain_ops structure with
+the .map callback populated as a minimum.
+
+In most cases, the irq_domain will begin empty without any mappings
+between hwirq and IRQ numbers.  Mappings are added to the irq_domain
+by calling irq_create_mapping() which accepts the irq_domain and a
+hwirq number as arguments.  If a mapping for the hwirq doesn't already
+exist then it will allocate a new Linux irq_desc, associate it with
+the hwirq, and call the .map() callback so the driver can perform any
+required hardware setup.
+
+When an interrupt is received, irq_find_mapping() function should
+be used to find the Linux IRQ number from the hwirq number.
+
+If the driver has the Linux IRQ number or the irq_data pointer, and
+needs to know the associated hwirq number (such as in the irq_chip
+callbacks) then it can be directly obtained from irq_data->hwirq.
+
+=== Types of irq_domain mappings ===
+There are several mechanisms available for reverse mapping from hwirq
+to Linux irq, and each mechanism uses a different allocation function.
+Which reverse map type should be used depends on the use case.  Each
+of the reverse map types are described below:
+
+==== Linear ====
+irq_domain_add_linear()
+
+The linear reverse map maintains a fixed size table indexed by the
+hwirq number.  When a hwirq is mapped, an irq_desc is allocated for
+the hwirq, and the IRQ number is stored in the table.
+
+The Linear map is a good choice when the maximum number of hwirqs is
+fixed and a relatively small number (~ < 256).  The advantages of this
+map are fixed time lookup for IRQ numbers, and irq_descs are only
+allocated for in-use IRQs.  The disadvantage is that the table must be
+as large as the largest possible hwirq number.
+
+The majority of drivers should use the linear map.
+
+==== Tree ====
+irq_domain_add_tree()
+
+The irq_domain maintains a radix tree map from hwirq numbers to Linux
+IRQs.  When an hwirq is mapped, an irq_desc is allocated and the
+hwirq is used as the lookup key for the radix tree.
+
+The tree map is a good choice if the hwirq number can be very large
+since it doesn't need to allocate a table as large as the largest
+hwirq number.  The disadvantage is that hwirq to IRQ number lookup is
+dependent on how many entries are in the table.
+
+Very few drivers should need this mapping.  At the moment, powerpc
+iseries is the only user.
+
+==== No Map ===-
+irq_domain_add_nomap()
+
+The No Map mapping is to be used when the hwirq number is
+programmable in the hardware.  In this case it is best to program the
+Linux IRQ number into the hardware itself so that no mapping is
+required.  Calling irq_create_direct_mapping() will allocate a Linux
+IRQ number and call the .map() callback so that driver can program the
+Linux IRQ number into the hardware.
+
+Most drivers cannot use this mapping.
+
+==== Legacy ====
+irq_domain_add_legacy()
+irq_domain_add_legacy_isa()
+
+The Legacy mapping is a special case for drivers that already have a
+range of irq_descs allocated for the hwirqs.  It is used when the
+driver cannot be immediately converted to use the linear mapping.  For
+example, many embedded system board support files use a set of #defines
+for IRQ numbers that are passed to struct device registrations.  In that
+case the Linux IRQ numbers cannot be dynamically assigned and the legacy
+mapping should be used.
+
+The legacy map assumes a contiguous range of IRQ numbers has already
+been allocated for the controller and that the IRQ number can be
+calculated by adding a fixed offset to the hwirq number, and
+visa-versa.  The disadvantage is that it requires the interrupt
+controller to manage IRQ allocations and it requires an irq_desc to be
+allocated for every hwirq, even if it is unused.
+
+The legacy map should only be used if fixed IRQ mappings must be
+supported.  For example, ISA controllers would use the legacy map for
+mapping Linux IRQs 0-15 so that existing ISA drivers get the correct IRQ
+numbers.
diff --git a/Documentation/devicetree/bindings/arm/tegra/emc.txt b/Documentation/devicetree/bindings/arm/tegra/emc.txt
new file mode 100644
index 000000000000..09335f8eee00
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/emc.txt
@@ -0,0 +1,100 @@
+Embedded Memory Controller
+
+Properties:
+- name : Should be emc
+- #address-cells : Should be 1
+- #size-cells : Should be 0
+- compatible : Should contain "nvidia,tegra20-emc".
+- reg : Offset and length of the register set for the device
+- nvidia,use-ram-code : If present, the sub-nodes will be addressed
+  and chosen using the ramcode board selector. If omitted, only one
+  set of tables can be present and said tables will be used
+  irrespective of ram-code configuration.
+
+Child device nodes describe the memory settings for different configurations and clock rates.
+
+Example:
+
+        emc@7000f400 {
+                #address-cells = < 1 >;
+                #size-cells = < 0 >;
+                compatible = "nvidia,tegra20-emc";
+                reg = <0x7000f4000 0x200>;
+        }
+
+
+Embedded Memory Controller ram-code table
+
+If the emc node has the nvidia,use-ram-code property present, then the
+next level of nodes below the emc table are used to specify which settings
+apply for which ram-code settings.
+
+If the emc node lacks the nvidia,use-ram-code property, this level is omitted
+and the tables are stored directly under the emc node (see below).
+
+Properties:
+
+- name : Should be emc-tables
+- nvidia,ram-code : the binary representation of the ram-code board strappings
+  for which this node (and children) are valid.
+
+
+
+Embedded Memory Controller configuration table
+
+This is a table containing the EMC register settings for the various
+operating speeds of the memory controller. They are always located as
+subnodes of the emc controller node.
+
+There are two ways of specifying which tables to use:
+
+* The simplest is if there is just one set of tables in the device tree,
+  and they will always be used (based on which frequency is used).
+  This is the preferred method, especially when firmware can fill in
+  this information based on the specific system information and just
+  pass it on to the kernel.
+
+* The slightly more complex one is when more than one memory configuration
+  might exist on the system.  The Tegra20 platform handles this during
+  early boot by selecting one out of possible 4 memory settings based
+  on a 2-pin "ram code" bootstrap setting on the board. The values of
+  these strappings can be read through a register in the SoC, and thus
+  used to select which tables to use.
+
+Properties:
+- name : Should be emc-table
+- compatible : Should contain "nvidia,tegra20-emc-table".
+- reg : either an opaque enumerator to tell different tables apart, or
+  the valid frequency for which the table should be used (in kHz).
+- clock-frequency : the clock frequency for the EMC at which this
+  table should be used (in kHz).
+- nvidia,emc-registers : a 46 word array of EMC registers to be programmed
+  for operation at the 'clock-frequency' setting.
+  The order and contents of the registers are:
+    RC, RFC, RAS, RP, R2W, W2R, R2P, W2P, RD_RCD, WR_RCD, RRD, REXT,
+    WDV, QUSE, QRST, QSAFE, RDV, REFRESH, BURST_REFRESH_NUM, PDEX2WR,
+    PDEX2RD, PCHG2PDEN, ACT2PDEN, AR2PDEN, RW2PDEN, TXSR, TCKE, TFAW,
+    TRPAB, TCLKSTABLE, TCLKSTOP, TREFBW, QUSE_EXTRA, FBIO_CFG6, ODT_WRITE,
+    ODT_READ, FBIO_CFG5, CFG_DIG_DLL, DLL_XFORM_DQS, DLL_XFORM_QUSE,
+    ZCAL_REF_CNT, ZCAL_WAIT_CNT, AUTO_CAL_INTERVAL, CFG_CLKTRIM_0,
+    CFG_CLKTRIM_1, CFG_CLKTRIM_2
+
+                emc-table@166000 {
+                        reg = <166000>;
+                        compatible = "nvidia,tegra20-emc-table";
+                        clock-frequency = < 166000 >;
+                        nvidia,emc-registers = < 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 >;
+                };
+
+                emc-table@333000 {
+                        reg = <333000>;
+                        compatible = "nvidia,tegra20-emc-table";
+                        clock-frequency = < 333000 >;
+                        nvidia,emc-registers = < 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+                                                 0 0 0 0 >;
+                };
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
new file mode 100644
index 000000000000..b5846e21cc2e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -0,0 +1,19 @@
+NVIDIA Tegra Power Management Controller (PMC)
+
+Properties:
+- name : Should be pmc
+- compatible : Should contain "nvidia,tegra<chip>-pmc".
+- reg : Offset and length of the register set for the device
+- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal.
+  The PMU is an external Power Management Unit, whose interrupt output
+  signal is fed into the PMC. This signal is optionally inverted, and then
+  fed into the ARM GIC. The PMC is not involved in the detection or
+  handling of this interrupt signal, merely its inversion.
+
+Example:
+
+pmc@7000f400 {
+        compatible = "nvidia,tegra20-pmc";
+        reg = <0x7000e400 0x400>;
+        nvidia,invert-interrupt;
+};
diff --git a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
new file mode 100644
index 000000000000..90fa7da525b8
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
@@ -0,0 +1,30 @@
+* NVIDIA Tegra APB DMA controller
+
+Required properties:
+- compatible: Should be "nvidia,<chip>-apbdma"
+- reg: Should contain DMA registers location and length. This shuld include
+  all of the per-channel registers.
+- interrupts: Should contain all of the per-channel DMA interrupts.
+
+Examples:
+
+apbdma: dma@6000a000 {
+        compatible = "nvidia,tegra20-apbdma";
+        reg = <0x6000a000 0x1200>;
+        interrupts = < 0 136 0x04
+                       0 137 0x04
+                       0 138 0x04
+                       0 139 0x04
+                       0 140 0x04
+                       0 141 0x04
+                       0 142 0x04
+                       0 143 0x04
+                       0 144 0x04
+                       0 145 0x04
+                       0 146 0x04
+                       0 147 0x04
+                       0 148 0x04
+                       0 149 0x04
+                       0 150 0x04
+                       0 151 0x04 >;
+};
diff --git a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
index eb4b530d64e1..023c9526e5f8 100644
--- a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
@@ -1,8 +1,40 @@
-NVIDIA Tegra 2 GPIO controller
+NVIDIA Tegra GPIO controller
 
 Required properties:
-- compatible : "nvidia,tegra20-gpio"
+- compatible : "nvidia,tegra<chip>-gpio"
+- reg : Physical base address and length of the controller's registers.
+- interrupts : The interrupt outputs from the controller. For Tegra20,
+  there should be 7 interrupts specified, and for Tegra30, there should
+  be 8 interrupts specified.
 - #gpio-cells : Should be two. The first cell is the pin number and the
   second cell is used to specify optional parameters:
   - bit 0 specifies polarity (0 for normal, 1 for inverted)
 - gpio-controller : Marks the device node as a GPIO controller.
+- #interrupt-cells : Should be 2.
+  The first cell is the GPIO number.
+  The second cell is used to specify flags:
+    bits[3:0] trigger type and level flags:
+      1 = low-to-high edge triggered.
+      2 = high-to-low edge triggered.
+      4 = active high level-sensitive.
+      8 = active low level-sensitive.
+      Valid combinations are 1, 2, 3, 4, 8.
+- interrupt-controller : Marks the device node as an interrupt controller.
+
+Example:
+
+gpio: gpio@6000d000 {
+        compatible = "nvidia,tegra20-gpio";
+        reg = < 0x6000d000 0x1000 >;
+        interrupts = < 0 32 0x04
+                       0 33 0x04
+                       0 34 0x04
+                       0 35 0x04
+                       0 55 0x04
+                       0 87 0x04
+                       0 89 0x04 >;
+        #gpio-cells = <2>;
+        gpio-controller;
+        #interrupt-cells = <2>;
+        interrupt-controller;
+};
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index a0ffac029a0d..1bea46a54b1c 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -510,17 +510,3 @@ Why:	The pci_scan_bus_parented() interface creates a new root bus.  The
         convert to using pci_scan_root_bus() so they can supply a list of
         bus resources when the bus is created.
 Who:    Bjorn Helgaas <bhelgaas@google.com>
-
-----------------------------
-
-What:   The CAP9 SoC family will be removed
-When:   3.4
-Files:  arch/arm/mach-at91/at91cap9.c
-        arch/arm/mach-at91/at91cap9_devices.c
-        arch/arm/mach-at91/include/mach/at91cap9.h
-        arch/arm/mach-at91/include/mach/at91cap9_matrix.h
-        arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
-        arch/arm/mach-at91/board-cap9adk.c
-Why:    The code is not actively maintained and platforms are now hard to find.
-Who:    Nicolas Ferre <nicolas.ferre@atmel.com>
-        Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/MAINTAINERS b/MAINTAINERS
index 4e41d5255d72..f096b0d8e973 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3638,6 +3638,15 @@ S:	Maintained
 T:      git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
 F:      kernel/irq/
 
+IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
+M:      Benjamin Herrenschmidt <benh@kernel.crashing.org>
+M:      Grant Likely <grant.likely@secretlab.ca>
+T:      git git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
+S:      Maintained
+F:      Documentation/IRQ-domain.txt
+F:      include/linux/irqdomain.h
+F:      kernel/irq/irqdomain.c
+
 ISAPNP
 M:      Jaroslav Kysela <perex@perex.cz>
 S:      Maintained
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a48aecc17eac..baf6dc6e9a1b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -324,7 +324,7 @@ config ARCH_AT91
         select CLKDEV_LOOKUP
         help
           This enables support for systems based on the Atmel AT91RM9200,
-          AT91SAM9 and AT91CAP9 processors.
+          AT91SAM9 processors.
 
 config ARCH_BCMRING
         bool "Broadcom BCMRING"
@@ -754,7 +754,7 @@ config ARCH_SA1100
         select ARCH_HAS_CPUFREQ
         select CPU_FREQ
         select GENERIC_CLOCKEVENTS
-        select HAVE_CLK
+        select CLKDEV_LOOKUP
         select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 03646c4c13d1..66ca8014ff3e 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -86,7 +86,7 @@ choice
                 depends on HAVE_AT91_DBGU0
 
         config AT91_DEBUG_LL_DBGU1
-                bool "Kernel low-level debugging on 9263, 9g45 and cap9"
+                bool "Kernel low-level debugging on 9263 and 9g45"
                 depends on HAVE_AT91_DBGU1
 
         config DEBUG_CLPS711X_UART1
@@ -180,12 +180,12 @@ choice
                   Say Y here if you want kernel low-level debugging support
                   on i.MX50 or i.MX53.
 
-        config DEBUG_IMX6Q_UART
-                bool "i.MX6Q Debug UART"
+        config DEBUG_IMX6Q_UART4
+                bool "i.MX6Q Debug UART4"
                 depends on SOC_IMX6Q
                 help
                   Say Y here if you want kernel low-level debugging support
-                  on i.MX6Q.
+                  on i.MX6Q UART4.
 
         config DEBUG_MSM_UART1
                 bool "Kernel low-level debugging messages via MSM UART1"
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 80afa1b70b80..6e8447dc0202 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -10,19 +10,25 @@
                 reg = < 0x00000000 0x40000000 >;
         };
 
+        pmc@7000f400 {
+                nvidia,invert-interrupt;
+        };
+
         i2c@7000c000 {
                 clock-frequency = <400000>;
 
-                codec: wm8903@1a {
+                wm8903: wm8903@1a {
                         compatible = "wlf,wm8903";
                         reg = <0x1a>;
-                        interrupts = < 347 >;
+                        interrupt-parent = <&gpio>;
+                        interrupts = < 187 0x04 >;
 
                         gpio-controller;
                         #gpio-cells = <2>;
 
-                        /* 0x8000 = Not configured */
-                        gpio-cfg = < 0x8000 0x8000 0 0x8000 0x8000 >;
+                        micdet-cfg = <0>;
+                        micdet-delay = <100>;
+                        gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
                 };
         };
 
@@ -38,13 +44,32 @@
                 clock-frequency = <400000>;
         };
 
-        sound {
-                compatible = "nvidia,harmony-sound", "nvidia,tegra-wm8903";
+        i2s@70002a00 {
+                status = "disable";
+        };
 
-                spkr-en-gpios = <&codec 2 0>;
-                hp-det-gpios = <&gpio 178 0>;
-                int-mic-en-gpios = <&gpio 184 0>;
-                ext-mic-en-gpios = <&gpio 185 0>;
+        sound {
+                compatible = "nvidia,tegra-audio-wm8903-harmony",
+                             "nvidia,tegra-audio-wm8903";
+                nvidia,model = "NVIDIA Tegra Harmony";
+
+                nvidia,audio-routing =
+                        "Headphone Jack", "HPOUTR",
+                        "Headphone Jack", "HPOUTL",
+                        "Int Spk", "ROP",
+                        "Int Spk", "RON",
+                        "Int Spk", "LOP",
+                        "Int Spk", "LON",
+                        "Mic Jack", "MICBIAS",
+                        "IN1L", "Mic Jack";
+
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,audio-codec = <&wm8903>;
+
+                nvidia,spkr-en-gpios = <&wm8903 2 0>;
+                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+                nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
+                nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
         };
 
         serial@70006000 {
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
index 825d2957da0b..e4b552b46fe2 100644
--- a/arch/arm/boot/dts/tegra-paz00.dts
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -12,6 +12,13 @@
 
         i2c@7000c000 {
                 clock-frequency = <400000>;
+
+                alc5632: alc5632@1e {
+                        compatible = "realtek,alc5632";
+                        reg = <0x1e>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
         };
 
         i2c@7000c400 {
@@ -37,6 +44,29 @@
                 clock-frequency = <400000>;
         };
 
+        i2s@70002a00 {
+                status = "disable";
+        };
+
+        sound {
+                compatible = "nvidia,tegra-audio-alc5632-paz00",
+                        "nvidia,tegra-audio-alc5632";
+
+                nvidia,model = "Compal PAZ00";
+
+                nvidia,audio-routing =
+                        "Int Spk", "SPKOUT",
+                        "Int Spk", "SPKOUTN",
+                        "Headset Mic", "MICBIAS1",
+                        "MIC1", "Headset Mic",
+                        "Headset Stereophone", "HPR",
+                        "Headset Stereophone", "HPL";
+
+                nvidia,audio-codec = <&alc5632>;
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+        };
+
         serial@70006000 {
                 clock-frequency = <216000000>;
         };
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index b55a02e34ba7..876d5c92ce36 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -13,6 +13,20 @@
 
         i2c@7000c000 {
                 clock-frequency = <400000>;
+
+                wm8903: wm8903@1a {
+                        compatible = "wlf,wm8903";
+                        reg = <0x1a>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = < 187 0x04 >;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        micdet-cfg = <0>;
+                        micdet-delay = <100>;
+                        gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
+                };
         };
 
         i2c@7000c400 {
@@ -32,6 +46,32 @@
                 };
         };
 
+        i2s@70002a00 {
+                status = "disable";
+        };
+
+        sound {
+                compatible = "nvidia,tegra-audio-wm8903-seaboard",
+                             "nvidia,tegra-audio-wm8903";
+                nvidia,model = "NVIDIA Tegra Seaboard";
+
+                nvidia,audio-routing =
+                        "Headphone Jack", "HPOUTR",
+                        "Headphone Jack", "HPOUTL",
+                        "Int Spk", "ROP",
+                        "Int Spk", "RON",
+                        "Int Spk", "LOP",
+                        "Int Spk", "LON",
+                        "Mic Jack", "MICBIAS",
+                        "IN1R", "Mic Jack";
+
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,audio-codec = <&wm8903>;
+
+                nvidia,spkr-en-gpios = <&wm8903 2 0>;
+                nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
+        };
+
         serial@70006000 {
                 status = "disable";
         };
@@ -93,4 +133,42 @@
                         gpio-key,wakeup;
                 };
         };
+
+        emc@7000f400 {
+                emc-table@190000 {
+                        reg = < 190000 >;
+                        compatible = "nvidia,tegra20-emc-table";
+                        clock-frequency = < 190000 >;
+                        nvidia,emc-registers = < 0x0000000c 0x00000026
+                                0x00000009 0x00000003 0x00000004 0x00000004
+                                0x00000002 0x0000000c 0x00000003 0x00000003
+                                0x00000002 0x00000001 0x00000004 0x00000005
+                                0x00000004 0x00000009 0x0000000d 0x0000059f
+                                0x00000000 0x00000003 0x00000003 0x00000003
+                                0x00000003 0x00000001 0x0000000b 0x000000c8
+                                0x00000003 0x00000007 0x00000004 0x0000000f
+                                0x00000002 0x00000000 0x00000000 0x00000002
+                                0x00000000 0x00000000 0x00000083 0xa06204ae
+                                0x007dc010 0x00000000 0x00000000 0x00000000
+                                0x00000000 0x00000000 0x00000000 0x00000000 >;
+                };
+
+                emc-table@380000 {
+                        reg = < 380000 >;
+                        compatible = "nvidia,tegra20-emc-table";
+                        clock-frequency = < 380000 >;
+                        nvidia,emc-registers = < 0x00000017 0x0000004b
+                                0x00000012 0x00000006 0x00000004 0x00000005
+                                0x00000003 0x0000000c 0x00000006 0x00000006
+                                0x00000003 0x00000001 0x00000004 0x00000005
+                                0x00000004 0x00000009 0x0000000d 0x00000b5f
+                                0x00000000 0x00000003 0x00000003 0x00000006
+                                0x00000006 0x00000001 0x00000011 0x000000c8
+                                0x00000003 0x0000000e 0x00000007 0x0000000f
+                                0x00000002 0x00000000 0x00000000 0x00000002
+                                0x00000000 0x00000000 0x00000083 0xe044048b
+                                0x007d8010 0x00000000 0x00000000 0x00000000
+                                0x00000000 0x00000000 0x00000000 0x00000000 >;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts
index 3b3ee7db99f3..252476867b54 100644
--- a/arch/arm/boot/dts/tegra-trimslice.dts
+++ b/arch/arm/boot/dts/tegra-trimslice.dts
@@ -26,6 +26,18 @@
                 status = "disable";
         };
 
+        i2s@70002800 {
+                status = "disable";
+        };
+
+        i2s@70002a00 {
+                status = "disable";
+        };
+
+        das@70000c00 {
+                status = "disable";
+        };
+
         serial@70006000 {
                 clock-frequency = < 216000000 >;
         };
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index c7d3b87f29df..2dcff8728e90 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -12,6 +12,20 @@
 
         i2c@7000c000 {
                 clock-frequency = <400000>;
+
+                wm8903: wm8903@1a {
+                        compatible = "wlf,wm8903";
+                        reg = <0x1a>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = < 187 0x04 >;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        micdet-cfg = <0>;
+                        micdet-delay = <100>;
+                        gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
+                };
         };
 
         i2c@7000c400 {
@@ -26,6 +40,34 @@
                 clock-frequency = <400000>;
         };
 
+        i2s@70002a00 {
+                status = "disable";
+        };
+
+        sound {
+                compatible = "nvidia,tegra-audio-wm8903-ventana",
+                             "nvidia,tegra-audio-wm8903";
+                nvidia,model = "NVIDIA Tegra Ventana";
+
+                nvidia,audio-routing =
+                        "Headphone Jack", "HPOUTR",
+                        "Headphone Jack", "HPOUTL",
+                        "Int Spk", "ROP",
+                        "Int Spk", "RON",
+                        "Int Spk", "LOP",
+                        "Int Spk", "LON",
+                        "Mic Jack", "MICBIAS",
+                        "IN1L", "Mic Jack";
+
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,audio-codec = <&wm8903>;
+
+                nvidia,spkr-en-gpios = <&wm8903 2 0>;
+                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+                nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
+                nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
+        };
+
         serial@70006000 {
                 status = "disable";
         };
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 3da7afd45322..ec1f0101c79c 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -4,6 +4,11 @@
         compatible = "nvidia,tegra20";
         interrupt-parent = <&intc>;
 
+        pmc@7000f400 {
+                compatible = "nvidia,tegra20-pmc";
+                reg = <0x7000e400 0x400>;
+        };
+
         intc: interrupt-controller@50041000 {
                 compatible = "arm,cortex-a9-gic";
                 interrupt-controller;
@@ -12,6 +17,27 @@
                       < 0x50040100 0x0100 >;
         };
 
+        apbdma: dma@6000a000 {
+                compatible = "nvidia,tegra20-apbdma";
+                reg = <0x6000a000 0x1200>;
+                interrupts = < 0 104 0x04
+                               0 105 0x04
+                               0 106 0x04
+                               0 107 0x04
+                               0 108 0x04
+                               0 109 0x04
+                               0 110 0x04
+                               0 111 0x04
+                               0 112 0x04
+                               0 113 0x04
+                               0 114 0x04
+                               0 115 0x04
+                               0 116 0x04
+                               0 117 0x04
+                               0 118 0x04
+                               0 119 0x04 >;
+        };
+
         i2c@7000c000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -44,18 +70,18 @@
                 interrupts = < 0 53 0x04 >;
         };
 
-        i2s@70002800 {
+        tegra_i2s1: i2s@70002800 {
                 compatible = "nvidia,tegra20-i2s";
                 reg = <0x70002800 0x200>;
                 interrupts = < 0 13 0x04 >;
-                dma-channel = < 2 >;
+                nvidia,dma-request-selector = < &apbdma 2 >;
         };
 
-        i2s@70002a00 {
+        tegra_i2s2: i2s@70002a00 {
                 compatible = "nvidia,tegra20-i2s";
                 reg = <0x70002a00 0x200>;
                 interrupts = < 0 3 0x04 >;
-                dma-channel = < 1 >;
+                nvidia,dma-request-selector = < &apbdma 1 >;
         };
 
         das@70000c00 {
@@ -75,6 +101,8 @@
                                0 89 0x04 >;
                 #gpio-cells = <2>;
                 gpio-controller;
+                #interrupt-cells = <2>;
+                interrupt-controller;
         };
 
         pinmux: pinmux@70000000 {
@@ -120,6 +148,13 @@
                 interrupts = < 0 91 0x04 >;
         };
 
+        emc@7000f400 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "nvidia,tegra20-emc";
+                reg = <0x7000f400 0x200>;
+        };
+
         sdhci@c8000000 {
                 compatible = "nvidia,tegra20-sdhci";
                 reg = <0xc8000000 0x200>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index ee7db9892e02..ac4b75cb26c0 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -4,6 +4,11 @@
         compatible = "nvidia,tegra30";
         interrupt-parent = <&intc>;
 
+        pmc@7000f400 {
+                compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
+                reg = <0x7000e400 0x400>;
+        };
+
         intc: interrupt-controller@50041000 {
                 compatible = "arm,cortex-a9-gic";
                 interrupt-controller;
@@ -12,6 +17,43 @@
                       < 0x50040100 0x0100 >;
         };
 
+        apbdma: dma@6000a000 {
+                compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
+                reg = <0x6000a000 0x1400>;
+                interrupts = < 0 104 0x04
+                               0 105 0x04
+                               0 106 0x04
+                               0 107 0x04
+                               0 108 0x04
+                               0 109 0x04
+                               0 110 0x04
+                               0 111 0x04
+                               0 112 0x04
+                               0 113 0x04
+                               0 114 0x04
+                               0 115 0x04
+                               0 116 0x04
+                               0 117 0x04
+                               0 118 0x04
+                               0 119 0x04
+                               0 128 0x04
+                               0 129 0x04
+                               0 130 0x04
+                               0 131 0x04
+                               0 132 0x04
+                               0 133 0x04
+                               0 134 0x04
+                               0 135 0x04
+                               0 136 0x04
+                               0 137 0x04
+                               0 138 0x04
+                               0 139 0x04
+                               0 140 0x04
+                               0 141 0x04
+                               0 142 0x04
+                               0 143 0x04 >;
+        };
+
         i2c@7000c000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -55,9 +97,18 @@
         gpio: gpio@6000d000 {
                 compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
                 reg = < 0x6000d000 0x1000 >;
-                interrupts = < 0 32 0x04 0 33 0x04 0 34 0x04 0 35 0x04 0 55 0x04 0 87 0x04 0 89 0x04 >;
+                interrupts = < 0 32 0x04
+                               0 33 0x04
+                               0 34 0x04
+                               0 35 0x04
+                               0 55 0x04
+                               0 87 0x04
+                               0 89 0x04
+                               0 125 0x04 >;
                 #gpio-cells = <2>;
                 gpio-controller;
+                #interrupt-cells = <2>;
+                interrupt-controller;
         };
 
         serial@70006000 {
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index c47d6199b784..f0783be17352 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -51,7 +51,6 @@ union gic_base {
 };
 
 struct gic_chip_data {
-        unsigned int irq_offset;
         union gic_base dist_base;
         union gic_base cpu_base;
 #ifdef CONFIG_CPU_PM
@@ -61,9 +60,7 @@ struct gic_chip_data {
         u32 __percpu *saved_ppi_enable;
         u32 __percpu *saved_ppi_conf;
 #endif
-#ifdef CONFIG_IRQ_DOMAIN
-        struct irq_domain domain;
-#endif
+        struct irq_domain *domain;
         unsigned int gic_irqs;
 #ifdef CONFIG_GIC_NON_BANKED
         void __iomem *(*get_base)(union gic_base *);
@@ -282,7 +279,7 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
                 irqnr = irqstat & ~0x1c00;
 
                 if (likely(irqnr > 15 && irqnr < 1021)) {
-                        irqnr = irq_domain_to_irq(&gic->domain, irqnr);
+                        irqnr = irq_find_mapping(gic->domain, irqnr);
                         handle_IRQ(irqnr, regs);
                         continue;
                 }
@@ -314,8 +311,8 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
         if (gic_irq == 1023)
                 goto out;
 
-        cascade_irq = irq_domain_to_irq(&chip_data->domain, gic_irq);
-        if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS))
+        cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);
+        if (unlikely(gic_irq < 32 || gic_irq > 1020))
                 do_bad_IRQ(cascade_irq, desc);
         else
                 generic_handle_irq(cascade_irq);
@@ -348,10 +345,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
 
 static void __init gic_dist_init(struct gic_chip_data *gic)
 {
-        unsigned int i, irq;
+        unsigned int i;
         u32 cpumask;
         unsigned int gic_irqs = gic->gic_irqs;
-        struct irq_domain *domain = &gic->domain;
         void __iomem *base = gic_data_dist_base(gic);
         u32 cpu = cpu_logical_map(smp_processor_id());
 
@@ -386,23 +382,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
         for (i = 32; i < gic_irqs; i += 32)
                 writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
 
-        /*
-         * Setup the Linux IRQ subsystem.
-         */
-        irq_domain_for_each_irq(domain, i, irq) {
-                if (i < 32) {
-                        irq_set_percpu_devid(irq);
-                        irq_set_chip_and_handler(irq, &gic_chip,
-                                                 handle_percpu_devid_irq);
-                        set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
-                } else {
-                        irq_set_chip_and_handler(irq, &gic_chip,
-                                                 handle_fasteoi_irq);
-                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
-                }
-                irq_set_chip_data(irq, gic);
-        }
-
         writel_relaxed(1, base + GIC_DIST_CTRL);
 }
 
@@ -618,11 +597,27 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
 }
 #endif
 
-#ifdef CONFIG_OF
-static int gic_irq_domain_dt_translate(struct irq_domain *d,
-                                       struct device_node *controller,
-                                       const u32 *intspec, unsigned int intsize,
-                                       unsigned long *out_hwirq, unsigned int *out_type)
+static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
+                                irq_hw_number_t hw)
+{
+        if (hw < 32) {
+                irq_set_percpu_devid(irq);
+                irq_set_chip_and_handler(irq, &gic_chip,
+                                         handle_percpu_devid_irq);
+                set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
+        } else {
+                irq_set_chip_and_handler(irq, &gic_chip,
+                                         handle_fasteoi_irq);
+                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+        }
+        irq_set_chip_data(irq, d->host_data);
+        return 0;
+}
+
+static int gic_irq_domain_xlate(struct irq_domain *d,
+                                struct device_node *controller,
+                                const u32 *intspec, unsigned int intsize,
+                                unsigned long *out_hwirq, unsigned int *out_type)
 {
         if (d->of_node != controller)
                 return -EINVAL;
@@ -639,26 +634,23 @@ static int gic_irq_domain_dt_translate(struct irq_domain *d,
         *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK;
         return 0;
 }
-#endif
 
 const struct irq_domain_ops gic_irq_domain_ops = {
-#ifdef CONFIG_OF
-        .dt_translate = gic_irq_domain_dt_translate,
-#endif
+        .map = gic_irq_domain_map,
+        .xlate = gic_irq_domain_xlate,
 };
 
 void __init gic_init_bases(unsigned int gic_nr, int irq_start,
                            void __iomem *dist_base, void __iomem *cpu_base,
-                           u32 percpu_offset)
+                           u32 percpu_offset, struct device_node *node)
 {
+        irq_hw_number_t hwirq_base;
         struct gic_chip_data *gic;
-        struct irq_domain *domain;
-        int gic_irqs;
+        int gic_irqs, irq_base;
 
         BUG_ON(gic_nr >= MAX_GIC_NR);
 
         gic = &gic_data[gic_nr];
-        domain = &gic->domain;
 #ifdef CONFIG_GIC_NON_BANKED
         if (percpu_offset) { /* Frankein-GIC without banked registers... */
                 unsigned int cpu;
@@ -694,10 +686,10 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
          * For primary GICs, skip over SGIs.
          * For secondary GICs, skip over PPIs, too.
          */
-        domain->hwirq_base = 32;
+        hwirq_base = 32;
         if (gic_nr == 0) {
                 if ((irq_start & 31) > 0) {
-                        domain->hwirq_base = 16;
+                        hwirq_base = 16;
                         if (irq_start != -1)
                                 irq_start = (irq_start & ~31) + 16;
                 }
@@ -713,17 +705,17 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
                 gic_irqs = 1020;
         gic->gic_irqs = gic_irqs;
 
-        domain->nr_irq = gic_irqs - domain->hwirq_base;
-        domain->irq_base = irq_alloc_descs(irq_start, 16, domain->nr_irq,
-                                           numa_node_id());
-        if (IS_ERR_VALUE(domain->irq_base)) {
+        gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */
+        irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, numa_node_id());
+        if (IS_ERR_VALUE(irq_base)) {
                 WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n",
                      irq_start);
-                domain->irq_base = irq_start;
+                irq_base = irq_start;
         }
-        domain->priv = gic;
-        domain->ops = &gic_irq_domain_ops;
-        irq_domain_add(domain);
+        gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base,
+                                    hwirq_base, &gic_irq_domain_ops, gic);
+        if (WARN_ON(!gic->domain))
+                return;
 
         gic_chip.flags |= gic_arch_extn.flags;
         gic_dist_init(gic);
@@ -768,7 +760,6 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
         void __iomem *dist_base;
         u32 percpu_offset;
         int irq;
-        struct irq_domain *domain = &gic_data[gic_cnt].domain;
 
         if (WARN_ON(!node))
                 return -ENODEV;
@@ -782,9 +773,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
         if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
                 percpu_offset = 0;
 
-        domain->of_node = of_node_get(node);
-
-        gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset);
+        gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset, node);
 
         if (parent) {
                 irq = irq_of_parse_and_map(node, 0);
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index dcb004a804c7..7a66311f3066 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -56,7 +56,7 @@ struct vic_device {
         u32             int_enable;
         u32             soft_int;
         u32             protect;
-        struct irq_domain domain;
+        struct irq_domain *domain;
 };
 
 /* we cannot allocate memory when VICs are initially registered */
@@ -192,14 +192,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
         v->resume_sources = resume_sources;
         v->irq = irq;
         vic_id++;
-
-        v->domain.irq_base = irq;
-        v->domain.nr_irq = 32;
-#ifdef CONFIG_OF_IRQ
-        v->domain.of_node = of_node_get(node);
-#endif /* CONFIG_OF */
-        v->domain.ops = &irq_domain_simple_ops;
-        irq_domain_add(&v->domain);
+        v->domain = irq_domain_add_legacy(node, 32, irq, 0,
+                                          &irq_domain_simple_ops, v);
 }
 
 static void vic_ack_irq(struct irq_data *d)
@@ -348,7 +342,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
         vic_register(base, irq_start, 0, node);
 }
 
-static void __init __vic_init(void __iomem *base, unsigned int irq_start,
+void __init __vic_init(void __iomem *base, unsigned int irq_start,
                               u32 vic_sources, u32 resume_sources,
                               struct device_node *node)
 {
@@ -444,7 +438,7 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
         stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
         while (stat) {
                 irq = ffs(stat) - 1;
-                handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
+                handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
                 stat &= ~(1 << irq);
                 handled = 1;
         }
diff --git a/arch/arm/configs/at91cap9_defconfig b/arch/arm/configs/at91cap9_defconfig
deleted file mode 100644
index 8826eb218e73..000000000000
--- a/arch/arm/configs/at91cap9_defconfig
+++ /dev/null
@@ -1,108 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91CAP9=y
-CONFIG_MACH_AT91CAP9ADK=y
-CONFIG_MTD_AT91_DATAFLASH_CARD=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_FB=y
-CONFIG_FB_ATMEL=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_USB_FILE_STORAGE=m
-CONFIG_MMC=y
-CONFIG_MMC_AT91=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index a22e93079063..d9eddfd77428 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -45,6 +45,7 @@ CONFIG_FPE_NWFPE=y
 CONFIG_FPE_NWFPE_XP=y
 CONFIG_PM_DEBUG=y
 CONFIG_NET=y
+CONFIG_SMSC911X=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
@@ -78,6 +79,8 @@ CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
 CONFIG_EEPROM_AT25=y
 CONFIG_NETDEVICES=y
+CONFIG_CS89x0=y
+CONFIG_CS89x0_PLATFORM=y
 CONFIG_DM9000=y
 CONFIG_SMC91X=y
 CONFIG_SMC911X=y
@@ -115,6 +118,21 @@ CONFIG_FB_IMX=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_LCD_L4F00242T03=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_VIDEO_MEDIA=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_OV2640=y
+CONFIG_VIDEO_MX2_HOSTSUPPORT=y
+CONFIG_VIDEO_MX2=y
 CONFIG_BACKLIGHT_PWM=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FONTS=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 3a4fb2e5fc68..6ae457aeea49 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -26,7 +26,6 @@ CONFIG_MACH_ARMADILLO5X0=y
 CONFIG_MACH_KZM_ARM11_01=y
 CONFIG_MACH_PCM043=y
 CONFIG_MACH_MX35_3DS=y
-CONFIG_MACH_EUKREA_CPUIMX35=y
 CONFIG_MACH_VPR200=y
 CONFIG_MACH_IMX51_DT=y
 CONFIG_MACH_MX51_3DS=y
@@ -82,8 +81,9 @@ CONFIG_PATA_IMX=y
 CONFIG_NETDEVICES=y
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_CHELSIO is not set
+CONFIG_CS89x0=y
+CONFIG_CS89x0_PLATFORM=y
 # CONFIG_NET_VENDOR_FARADAY is not set
-CONFIG_FEC=y
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MICREL is not set
@@ -126,7 +126,39 @@ CONFIG_WATCHDOG=y
 CONFIG_IMX2_WDT=y
 CONFIG_MFD_MC13XXX=y
 CONFIG_REGULATOR=y
+CONFIG_REGULATOR_MC13783=y
 CONFIG_REGULATOR_MC13892=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEOBUF2_MEMOPS=y
+CONFIG_VIDEOBUF2_DMA_CONTIG=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_OV2640=y
+CONFIG_MX3_VIDEO=y
+CONFIG_VIDEO_MX3=y
+CONFIG_FB=y
+CONFIG_FB_MX3=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_LCD_L4F00242T03=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_MXC=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
index 443675d317e6..a691ef4c6008 100644
--- a/arch/arm/configs/magician_defconfig
+++ b/arch/arm/configs/magician_defconfig
@@ -101,7 +101,7 @@ CONFIG_MFD_ASIC3=y
 CONFIG_HTC_EGPIO=y
 CONFIG_HTC_PASIC3=y
 CONFIG_REGULATOR=y
-CONFIG_REGULATOR_BQ24022=y
+CONFIG_REGULATOR_GPIO=y
 CONFIG_FB=y
 CONFIG_FB_PXA=y
 CONFIG_FB_PXA_OVERLAY=y
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 4bdfe0018696..4b1ce6cd477f 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -39,7 +39,7 @@ struct device_node;
 extern struct irq_chip gic_arch_extn;
 
 void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
-                    u32 offset);
+                    u32 offset, struct device_node *);
 int gic_of_init(struct device_node *node, struct device_node *parent);
 void gic_secondary_init(unsigned int);
 void gic_handle_irq(struct pt_regs *regs);
@@ -49,7 +49,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
 static inline void gic_init(unsigned int nr, int start,
                             void __iomem *dist , void __iomem *cpu)
 {
-        gic_init_bases(nr, start, dist, cpu, 0);
+        gic_init_bases(nr, start, dist, cpu, 0, NULL);
 }
 
 #endif
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index f42ebd619590..e14af1a1a320 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -47,6 +47,8 @@
 struct device_node;
 struct pt_regs;
 
+void __vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources,
+                u32 resume_sources, struct device_node *node);
 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
 int vic_of_init(struct device_node *node, struct device_node *parent);
 void vic_handle_irq(struct pt_regs *regs);
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 71feb00a1e99..0284e66c47f9 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -102,15 +102,6 @@ config ARCH_AT91SAM9G45
         select HAVE_AT91_DBGU1
         select AT91_SAM9G45_RESET
 
-config ARCH_AT91CAP9
-        bool "AT91CAP9"
-        select CPU_ARM926T
-        select GENERIC_CLOCKEVENTS
-        select HAVE_FB_ATMEL
-        select HAVE_NET_MACB
-        select HAVE_AT91_DBGU1
-        select AT91_SAM9G45_RESET
-
 config ARCH_AT91X40
         bool "AT91x40"
         select ARCH_USES_GETTIMEOFFSET
@@ -447,21 +438,6 @@ endif
 
 # ----------------------------------------------------------
 
-if ARCH_AT91CAP9
-
-comment "AT91CAP9 Board Type"
-
-config MACH_AT91CAP9ADK
-        bool "Atmel AT91CAP9A-DK Evaluation Kit"
-        select HAVE_AT91_DATAFLASH_CARD
-        help
-          Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit.
-          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138>
-
-endif
-
-# ----------------------------------------------------------
-
 if ARCH_AT91X40
 
 comment "AT91X40 Board Type"
@@ -544,7 +520,7 @@ config AT91_EARLY_DBGU0
         depends on HAVE_AT91_DBGU0
 
 config AT91_EARLY_DBGU1
-        bool "DBGU on 9263, 9g45 and cap9"
+        bool "DBGU on 9263 and 9g45"
         depends on HAVE_AT91_DBGU1
 
 config AT91_EARLY_USART0
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 705e1fbded39..aeb76f1690d9 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -20,7 +20,6 @@ obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_d
 obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9G45)  += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91X40)      += at91x40.o at91x40_time.o
 
 # AT91RM9200 board-specific support
@@ -81,9 +80,6 @@ obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
 # AT91SAM board with device-tree
 obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o
 
-# AT91CAP9 board-specific support
-obj-$(CONFIG_MACH_AT91CAP9ADK)  += board-cap9adk.o
-
 # AT91X40 board-specific support
 obj-$(CONFIG_MACH_AT91EB01)     += board-eb01.o
 
diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot
index 8ddafadfdc7d..2fd051eb2449 100644
--- a/arch/arm/mach-at91/Makefile.boot
+++ b/arch/arm/mach-at91/Makefile.boot
@@ -3,11 +3,7 @@
 #   PARAMS_PHYS must be within 4MB of ZRELADDR
 #   INITRD_PHYS must be in RAM
 
-ifeq ($(CONFIG_ARCH_AT91CAP9),y)
-   zreladdr-y   += 0x70008000
-params_phys-y   := 0x70000100
-initrd_phys-y   := 0x70410000
-else ifeq ($(CONFIG_ARCH_AT91SAM9G45),y)
+ifeq ($(CONFIG_ARCH_AT91SAM9G45),y)
    zreladdr-y   += 0x70008000
 params_phys-y   := 0x70000100
 initrd_phys-y   := 0x70410000
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
deleted file mode 100644
index 8967d75c2ea3..000000000000
--- a/arch/arm/mach-at91/at91cap9.c
+++ /dev/null
@@ -1,404 +0,0 @@
-/*
- * arch/arm/mach-at91/at91cap9.c
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#include <linux/module.h>
-
-#include <asm/proc-fns.h>
-#include <asm/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <mach/cpu.h>
-#include <mach/at91cap9.h>
-#include <mach/at91_pmc.h>
-
-#include "soc.h"
-#include "generic.h"
-#include "clock.h"
-#include "sam9_smc.h"
-
-/* --------------------------------------------------------------------
- *  Clocks
- * -------------------------------------------------------------------- */
-
-/*
- * The peripheral clocks.
- */
-static struct clk pioABCD_clk = {
-        .name           = "pioABCD_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_PIOABCD,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb0_clk = {
-        .name           = "mpb0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb1_clk = {
-        .name           = "mpb1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb2_clk = {
-        .name           = "mpb2_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb3_clk = {
-        .name           = "mpb3_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB3,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb4_clk = {
-        .name           = "mpb4_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB4,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart0_clk = {
-        .name           = "usart0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_US0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart1_clk = {
-        .name           = "usart1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_US1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart2_clk = {
-        .name           = "usart2_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_US2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc0_clk = {
-        .name           = "mci0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MCI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc1_clk = {
-        .name           = "mci1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MCI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk can_clk = {
-        .name           = "can_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_CAN,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk twi_clk = {
-        .name           = "twi_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_TWI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi0_clk = {
-        .name           = "spi0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SPI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi1_clk = {
-        .name           = "spi1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SPI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc0_clk = {
-        .name           = "ssc0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SSC0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc1_clk = {
-        .name           = "ssc1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SSC1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ac97_clk = {
-        .name           = "ac97_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_AC97C,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tcb_clk = {
-        .name           = "tcb_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_TCB,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pwm_clk = {
-        .name           = "pwm_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_PWMC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk macb_clk = {
-        .name           = "pclk",
-        .pmc_mask       = 1 << AT91CAP9_ID_EMAC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk aestdes_clk = {
-        .name           = "aestdes_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_AESTDES,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk adc_clk = {
-        .name           = "adc_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_ADC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk isi_clk = {
-        .name           = "isi_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_ISI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk lcdc_clk = {
-        .name           = "lcdc_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_LCDC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk dma_clk = {
-        .name           = "dma_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_DMA,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk udphs_clk = {
-        .name           = "udphs_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_UDPHS,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ohci_clk = {
-        .name           = "ohci_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_UHP,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-
-static struct clk *periph_clocks[] __initdata = {
-        &pioABCD_clk,
-        &mpb0_clk,
-        &mpb1_clk,
-        &mpb2_clk,
-        &mpb3_clk,
-        &mpb4_clk,
-        &usart0_clk,
-        &usart1_clk,
-        &usart2_clk,
-        &mmc0_clk,
-        &mmc1_clk,
-        &can_clk,
-        &twi_clk,
-        &spi0_clk,
-        &spi1_clk,
-        &ssc0_clk,
-        &ssc1_clk,
-        &ac97_clk,
-        &tcb_clk,
-        &pwm_clk,
-        &macb_clk,
-        &aestdes_clk,
-        &adc_clk,
-        &isi_clk,
-        &lcdc_clk,
-        &dma_clk,
-        &udphs_clk,
-        &ohci_clk,
-        // irq0 .. irq1
-};
-
-static struct clk_lookup periph_clocks_lookups[] = {
-        /* One additional fake clock for macb_hclk */
-        CLKDEV_CON_ID("hclk", &macb_clk),
-        CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
-        CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
-        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
-        /* fake hclk clock */
-        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
-        CLKDEV_CON_ID("pioA", &pioABCD_clk),
-        CLKDEV_CON_ID("pioB", &pioABCD_clk),
-        CLKDEV_CON_ID("pioC", &pioABCD_clk),
-        CLKDEV_CON_ID("pioD", &pioABCD_clk),
-};
-
-static struct clk_lookup usart_clocks_lookups[] = {
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
-};
-
-/*
- * The four programmable clocks.
- * You must configure pin multiplexing to bring these signals out.
- */
-static struct clk pck0 = {
-        .name           = "pck0",
-        .pmc_mask       = AT91_PMC_PCK0,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 0,
-};
-static struct clk pck1 = {
-        .name           = "pck1",
-        .pmc_mask       = AT91_PMC_PCK1,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 1,
-};
-static struct clk pck2 = {
-        .name           = "pck2",
-        .pmc_mask       = AT91_PMC_PCK2,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 2,
-};
-static struct clk pck3 = {
-        .name           = "pck3",
-        .pmc_mask       = AT91_PMC_PCK3,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 3,
-};
-
-static void __init at91cap9_register_clocks(void)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
-                clk_register(periph_clocks[i]);
-
-        clkdev_add_table(periph_clocks_lookups,
-                         ARRAY_SIZE(periph_clocks_lookups));
-        clkdev_add_table(usart_clocks_lookups,
-                         ARRAY_SIZE(usart_clocks_lookups));
-
-        clk_register(&pck0);
-        clk_register(&pck1);
-        clk_register(&pck2);
-        clk_register(&pck3);
-}
-
-static struct clk_lookup console_clock_lookup;
-
-void __init at91cap9_set_console_clock(int id)
-{
-        if (id >= ARRAY_SIZE(usart_clocks_lookups))
-                return;
-
-        console_clock_lookup.con_id = "usart";
-        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
-        clkdev_add(&console_clock_lookup);
-}
-
-/* --------------------------------------------------------------------
- *  GPIO
- * -------------------------------------------------------------------- */
-
-static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
-        {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOA,
-        }, {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOB,
-        }, {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOC,
-        }, {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOD,
-        }
-};
-
-static void at91cap9_idle(void)
-{
-        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
-        cpu_do_idle();
-}
-
-/* --------------------------------------------------------------------
- *  AT91CAP9 processor initialization
- * -------------------------------------------------------------------- */
-
-static void __init at91cap9_map_io(void)
-{
-        at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
-}
-
-static void __init at91cap9_ioremap_registers(void)
-{
-        at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
-        at91_ioremap_rstc(AT91CAP9_BASE_RSTC);
-        at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
-        at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
-}
-
-static void __init at91cap9_initialize(void)
-{
-        arm_pm_idle = at91cap9_idle;
-        arm_pm_restart = at91sam9g45_restart;
-        at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
-
-        /* Register GPIO subsystem */
-        at91_gpio_init(at91cap9_gpio, 4);
-
-        /* Remember the silicon revision */
-        if (cpu_is_at91cap9_revB())
-                system_rev = 0xB;
-        else if (cpu_is_at91cap9_revC())
-                system_rev = 0xC;
-}
-
-/* --------------------------------------------------------------------
- *  Interrupt initialization
- * -------------------------------------------------------------------- */
-
-/*
- * The default interrupt priority levels (0 = lowest, 7 = highest).
- */
-static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
-        7,      /* Advanced Interrupt Controller (FIQ) */
-        7,      /* System Peripherals */
-        1,      /* Parallel IO Controller A, B, C and D */
-        0,      /* MP Block Peripheral 0 */
-        0,      /* MP Block Peripheral 1 */
-        0,      /* MP Block Peripheral 2 */
-        0,      /* MP Block Peripheral 3 */
-        0,      /* MP Block Peripheral 4 */
-        5,      /* USART 0 */
-        5,      /* USART 1 */
-        5,      /* USART 2 */
-        0,      /* Multimedia Card Interface 0 */
-        0,      /* Multimedia Card Interface 1 */
-        3,      /* CAN */
-        6,      /* Two-Wire Interface */
-        5,      /* Serial Peripheral Interface 0 */
-        5,      /* Serial Peripheral Interface 1 */
-        4,      /* Serial Synchronous Controller 0 */
-        4,      /* Serial Synchronous Controller 1 */
-        5,      /* AC97 Controller */
-        0,      /* Timer Counter 0, 1 and 2 */
-        0,      /* Pulse Width Modulation Controller */
-        3,      /* Ethernet */
-        0,      /* Advanced Encryption Standard, Triple DES*/
-        0,      /* Analog-to-Digital Converter */
-        0,      /* Image Sensor Interface */
-        3,      /* LCD Controller */
-        0,      /* DMA Controller */
-        2,      /* USB Device Port */
-        2,      /* USB Host port */
-        0,      /* Advanced Interrupt Controller (IRQ0) */
-        0,      /* Advanced Interrupt Controller (IRQ1) */
-};
-
-struct at91_init_soc __initdata at91cap9_soc = {
-        .map_io = at91cap9_map_io,
-        .default_irq_priority = at91cap9_default_irq_priority,
-        .ioremap_registers = at91cap9_ioremap_registers,
-        .register_clocks = at91cap9_register_clocks,
-        .init = at91cap9_initialize,
-};
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
deleted file mode 100644
index d298fb7cb210..000000000000
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ /dev/null
@@ -1,1273 +0,0 @@
-/*
- * arch/arm/mach-at91/at91cap9_devices.c
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-#include <linux/platform_device.h>
-#include <linux/i2c-gpio.h>
-
-#include <video/atmel_lcdc.h>
-
-#include <mach/board.h>
-#include <mach/cpu.h>
-#include <mach/at91cap9.h>
-#include <mach/at91cap9_matrix.h>
-#include <mach/at91sam9_smc.h>
-
-#include "generic.h"
-
-
-/* --------------------------------------------------------------------
- *  USB Host
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static u64 ohci_dmamask = DMA_BIT_MASK(32);
-static struct at91_usbh_data usbh_data;
-
-static struct resource usbh_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_UHP_BASE,
-                .end    = AT91CAP9_UHP_BASE + SZ_1M - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_UHP,
-                .end    = AT91CAP9_ID_UHP,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91_usbh_device = {
-        .name           = "at91_ohci",
-        .id             = -1,
-        .dev            = {
-                                .dma_mask               = &ohci_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &usbh_data,
-        },
-        .resource       = usbh_resources,
-        .num_resources  = ARRAY_SIZE(usbh_resources),
-};
-
-void __init at91_add_device_usbh(struct at91_usbh_data *data)
-{
-        int i;
-
-        if (!data)
-                return;
-
-        if (cpu_is_at91cap9_revB())
-                irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
-
-        /* Enable VBus control for UHP ports */
-        for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->vbus_pin[i]))
-                        at91_set_gpio_output(data->vbus_pin[i], 0);
-        }
-
-        /* Enable overcurrent notification */
-        for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
-                        at91_set_gpio_input(data->overcurrent_pin[i], 1);
-        }
-
-        usbh_data = *data;
-        platform_device_register(&at91_usbh_device);
-}
-#else
-void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  USB HS Device (Gadget)
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
-
-static struct resource usba_udc_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_UDPHS_FIFO,
-                .end    = AT91CAP9_UDPHS_FIFO + SZ_512K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_BASE_UDPHS,
-                .end    = AT91CAP9_BASE_UDPHS + SZ_1K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [2] = {
-                .start  = AT91CAP9_ID_UDPHS,
-                .end    = AT91CAP9_ID_UDPHS,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-#define EP(nam, idx, maxpkt, maxbk, dma, isoc)                  \
-        [idx] = {                                               \
-                .name           = nam,                          \
-                .index          = idx,                          \
-                .fifo_size      = maxpkt,                       \
-                .nr_banks       = maxbk,                        \
-                .can_dma        = dma,                          \
-                .can_isoc       = isoc,                         \
-        }
-
-static struct usba_ep_data usba_udc_ep[] = {
-        EP("ep0", 0,   64, 1, 0, 0),
-        EP("ep1", 1, 1024, 3, 1, 1),
-        EP("ep2", 2, 1024, 3, 1, 1),
-        EP("ep3", 3, 1024, 2, 1, 1),
-        EP("ep4", 4, 1024, 2, 1, 1),
-        EP("ep5", 5, 1024, 2, 1, 0),
-        EP("ep6", 6, 1024, 2, 1, 0),
-        EP("ep7", 7, 1024, 2, 0, 0),
-};
-
-#undef EP
-
-/*
- * pdata doesn't have room for any endpoints, so we need to
- * append room for the ones we need right after it.
- */
-static struct {
-        struct usba_platform_data pdata;
-        struct usba_ep_data ep[8];
-} usba_udc_data;
-
-static struct platform_device at91_usba_udc_device = {
-        .name           = "atmel_usba_udc",
-        .id             = -1,
-        .dev            = {
-                                .platform_data  = &usba_udc_data.pdata,
-        },
-        .resource       = usba_udc_resources,
-        .num_resources  = ARRAY_SIZE(usba_udc_resources),
-};
-
-void __init at91_add_device_usba(struct usba_platform_data *data)
-{
-        if (cpu_is_at91cap9_revB()) {
-                irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
-                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
-                                                  AT91_MATRIX_UDPHS_BYPASS_LOCK);
-        }
-        else
-                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
-
-        /*
-         * Invalid pins are 0 on AT91, but the usba driver is shared
-         * with AVR32, which use negative values instead. Once/if
-         * gpio_is_valid() is ported to AT91, revisit this code.
-         */
-        usba_udc_data.pdata.vbus_pin = -EINVAL;
-        usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
-        memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
-
-        if (data && gpio_is_valid(data->vbus_pin)) {
-                at91_set_gpio_input(data->vbus_pin, 0);
-                at91_set_deglitch(data->vbus_pin, 1);
-                usba_udc_data.pdata.vbus_pin = data->vbus_pin;
-        }
-
-        /* Pullup pin is handled internally by USB device peripheral */
-
-        platform_device_register(&at91_usba_udc_device);
-}
-#else
-void __init at91_add_device_usba(struct usba_platform_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  Ethernet
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
-static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct macb_platform_data eth_data;
-
-static struct resource eth_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_EMAC,
-                .end    = AT91CAP9_BASE_EMAC + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_EMAC,
-                .end    = AT91CAP9_ID_EMAC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_eth_device = {
-        .name           = "macb",
-        .id             = -1,
-        .dev            = {
-                                .dma_mask               = &eth_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &eth_data,
-        },
-        .resource       = eth_resources,
-        .num_resources  = ARRAY_SIZE(eth_resources),
-};
-
-void __init at91_add_device_eth(struct macb_platform_data *data)
-{
-        if (!data)
-                return;
-
-        if (gpio_is_valid(data->phy_irq_pin)) {
-                at91_set_gpio_input(data->phy_irq_pin, 0);
-                at91_set_deglitch(data->phy_irq_pin, 1);
-        }
-
-        /* Pins used for MII and RMII */
-        at91_set_A_periph(AT91_PIN_PB21, 0);    /* ETXCK_EREFCK */
-        at91_set_A_periph(AT91_PIN_PB22, 0);    /* ERXDV */
-        at91_set_A_periph(AT91_PIN_PB25, 0);    /* ERX0 */
-        at91_set_A_periph(AT91_PIN_PB26, 0);    /* ERX1 */
-        at91_set_A_periph(AT91_PIN_PB27, 0);    /* ERXER */
-        at91_set_A_periph(AT91_PIN_PB28, 0);    /* ETXEN */
-        at91_set_A_periph(AT91_PIN_PB23, 0);    /* ETX0 */
-        at91_set_A_periph(AT91_PIN_PB24, 0);    /* ETX1 */
-        at91_set_A_periph(AT91_PIN_PB30, 0);    /* EMDIO */
-        at91_set_A_periph(AT91_PIN_PB29, 0);    /* EMDC */
-
-        if (!data->is_rmii) {
-                at91_set_B_periph(AT91_PIN_PC25, 0);    /* ECRS */
-                at91_set_B_periph(AT91_PIN_PC26, 0);    /* ECOL */
-                at91_set_B_periph(AT91_PIN_PC22, 0);    /* ERX2 */
-                at91_set_B_periph(AT91_PIN_PC23, 0);    /* ERX3 */
-                at91_set_B_periph(AT91_PIN_PC27, 0);    /* ERXCK */
-                at91_set_B_periph(AT91_PIN_PC20, 0);    /* ETX2 */
-                at91_set_B_periph(AT91_PIN_PC21, 0);    /* ETX3 */
-                at91_set_B_periph(AT91_PIN_PC24, 0);    /* ETXER */
-        }
-
-        eth_data = *data;
-        platform_device_register(&at91cap9_eth_device);
-}
-#else
-void __init at91_add_device_eth(struct macb_platform_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  MMC / SD
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
-static u64 mmc_dmamask = DMA_BIT_MASK(32);
-static struct at91_mmc_data mmc0_data, mmc1_data;
-
-static struct resource mmc0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_MCI0,
-                .end    = AT91CAP9_BASE_MCI0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_MCI0,
-                .end    = AT91CAP9_ID_MCI0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_mmc0_device = {
-        .name           = "at91_mci",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &mmc0_data,
-        },
-        .resource       = mmc0_resources,
-        .num_resources  = ARRAY_SIZE(mmc0_resources),
-};
-
-static struct resource mmc1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_MCI1,
-                .end    = AT91CAP9_BASE_MCI1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_MCI1,
-                .end    = AT91CAP9_ID_MCI1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_mmc1_device = {
-        .name           = "at91_mci",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &mmc1_data,
-        },
-        .resource       = mmc1_resources,
-        .num_resources  = ARRAY_SIZE(mmc1_resources),
-};
-
-void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
-{
-        if (!data)
-                return;
-
-        /* input/irq */
-        if (gpio_is_valid(data->det_pin)) {
-                at91_set_gpio_input(data->det_pin, 1);
-                at91_set_deglitch(data->det_pin, 1);
-        }
-        if (gpio_is_valid(data->wp_pin))
-                at91_set_gpio_input(data->wp_pin, 1);
-        if (gpio_is_valid(data->vcc_pin))
-                at91_set_gpio_output(data->vcc_pin, 0);
-
-        if (mmc_id == 0) {              /* MCI0 */
-                /* CLK */
-                at91_set_A_periph(AT91_PIN_PA2, 0);
-
-                /* CMD */
-                at91_set_A_periph(AT91_PIN_PA1, 1);
-
-                /* DAT0, maybe DAT1..DAT3 */
-                at91_set_A_periph(AT91_PIN_PA0, 1);
-                if (data->wire4) {
-                        at91_set_A_periph(AT91_PIN_PA3, 1);
-                        at91_set_A_periph(AT91_PIN_PA4, 1);
-                        at91_set_A_periph(AT91_PIN_PA5, 1);
-                }
-
-                mmc0_data = *data;
-                platform_device_register(&at91cap9_mmc0_device);
-        } else {                        /* MCI1 */
-                /* CLK */
-                at91_set_A_periph(AT91_PIN_PA16, 0);
-
-                /* CMD */
-                at91_set_A_periph(AT91_PIN_PA17, 1);
-
-                /* DAT0, maybe DAT1..DAT3 */
-                at91_set_A_periph(AT91_PIN_PA18, 1);
-                if (data->wire4) {
-                        at91_set_A_periph(AT91_PIN_PA19, 1);
-                        at91_set_A_periph(AT91_PIN_PA20, 1);
-                        at91_set_A_periph(AT91_PIN_PA21, 1);
-                }
-
-                mmc1_data = *data;
-                platform_device_register(&at91cap9_mmc1_device);
-        }
-}
-#else
-void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  NAND / SmartMedia
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
-static struct atmel_nand_data nand_data;
-
-#define NAND_BASE       AT91_CHIPSELECT_3
-
-static struct resource nand_resources[] = {
-        [0] = {
-                .start  = NAND_BASE,
-                .end    = NAND_BASE + SZ_256M - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_BASE_ECC,
-                .end    = AT91CAP9_BASE_ECC + SZ_512 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device at91cap9_nand_device = {
-        .name           = "atmel_nand",
-        .id             = -1,
-        .dev            = {
-                                .platform_data  = &nand_data,
-        },
-        .resource       = nand_resources,
-        .num_resources  = ARRAY_SIZE(nand_resources),
-};
-
-void __init at91_add_device_nand(struct atmel_nand_data *data)
-{
-        unsigned long csa;
-
-        if (!data)
-                return;
-
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
-
-        /* enable pin */
-        if (gpio_is_valid(data->enable_pin))
-                at91_set_gpio_output(data->enable_pin, 1);
-
-        /* ready/busy pin */
-        if (gpio_is_valid(data->rdy_pin))
-                at91_set_gpio_input(data->rdy_pin, 1);
-
-        /* card detect pin */
-        if (gpio_is_valid(data->det_pin))
-                at91_set_gpio_input(data->det_pin, 1);
-
-        nand_data = *data;
-        platform_device_register(&at91cap9_nand_device);
-}
-#else
-void __init at91_add_device_nand(struct atmel_nand_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  TWI (i2c)
- * -------------------------------------------------------------------- */
-
-/*
- * Prefer the GPIO code since the TWI controller isn't robust
- * (gets overruns and underruns under load) and can only issue
- * repeated STARTs in one scenario (the driver doesn't yet handle them).
- */
-#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
-
-static struct i2c_gpio_platform_data pdata = {
-        .sda_pin                = AT91_PIN_PB4,
-        .sda_is_open_drain      = 1,
-        .scl_pin                = AT91_PIN_PB5,
-        .scl_is_open_drain      = 1,
-        .udelay                 = 2,            /* ~100 kHz */
-};
-
-static struct platform_device at91cap9_twi_device = {
-        .name                   = "i2c-gpio",
-        .id                     = -1,
-        .dev.platform_data      = &pdata,
-};
-
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
-{
-        at91_set_GPIO_periph(AT91_PIN_PB4, 1);          /* TWD (SDA) */
-        at91_set_multi_drive(AT91_PIN_PB4, 1);
-
-        at91_set_GPIO_periph(AT91_PIN_PB5, 1);          /* TWCK (SCL) */
-        at91_set_multi_drive(AT91_PIN_PB5, 1);
-
-        i2c_register_board_info(0, devices, nr_devices);
-        platform_device_register(&at91cap9_twi_device);
-}
-
-#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
-
-static struct resource twi_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_TWI,
-                .end    = AT91CAP9_BASE_TWI + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_TWI,
-                .end    = AT91CAP9_ID_TWI,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_twi_device = {
-        .name           = "at91_i2c",
-        .id             = -1,
-        .resource       = twi_resources,
-        .num_resources  = ARRAY_SIZE(twi_resources),
-};
-
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
-{
-        /* pins used for TWI interface */
-        at91_set_B_periph(AT91_PIN_PB4, 0);             /* TWD */
-        at91_set_multi_drive(AT91_PIN_PB4, 1);
-
-        at91_set_B_periph(AT91_PIN_PB5, 0);             /* TWCK */
-        at91_set_multi_drive(AT91_PIN_PB5, 1);
-
-        i2c_register_board_info(0, devices, nr_devices);
-        platform_device_register(&at91cap9_twi_device);
-}
-#else
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
-#endif
-
-/* --------------------------------------------------------------------
- *  SPI
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-
-static struct resource spi0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SPI0,
-                .end    = AT91CAP9_BASE_SPI0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SPI0,
-                .end    = AT91CAP9_ID_SPI0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_spi0_device = {
-        .name           = "atmel_spi",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = spi0_resources,
-        .num_resources  = ARRAY_SIZE(spi0_resources),
-};
-
-static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 };
-
-static struct resource spi1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SPI1,
-                .end    = AT91CAP9_BASE_SPI1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SPI1,
-                .end    = AT91CAP9_ID_SPI1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_spi1_device = {
-        .name           = "atmel_spi",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = spi1_resources,
-        .num_resources  = ARRAY_SIZE(spi1_resources),
-};
-
-static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
-
-void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
-{
-        int i;
-        unsigned long cs_pin;
-        short enable_spi0 = 0;
-        short enable_spi1 = 0;
-
-        /* Choose SPI chip-selects */
-        for (i = 0; i < nr_devices; i++) {
-                if (devices[i].controller_data)
-                        cs_pin = (unsigned long) devices[i].controller_data;
-                else if (devices[i].bus_num == 0)
-                        cs_pin = spi0_standard_cs[devices[i].chip_select];
-                else
-                        cs_pin = spi1_standard_cs[devices[i].chip_select];
-
-                if (devices[i].bus_num == 0)
-                        enable_spi0 = 1;
-                else
-                        enable_spi1 = 1;
-
-                /* enable chip-select pin */
-                at91_set_gpio_output(cs_pin, 1);
-
-                /* pass chip-select pin to driver */
-                devices[i].controller_data = (void *) cs_pin;
-        }
-
-        spi_register_board_info(devices, nr_devices);
-
-        /* Configure SPI bus(es) */
-        if (enable_spi0) {
-                at91_set_B_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
-                at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
-                at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
-
-                platform_device_register(&at91cap9_spi0_device);
-        }
-        if (enable_spi1) {
-                at91_set_A_periph(AT91_PIN_PB12, 0);    /* SPI1_MISO */
-                at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
-                at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
-
-                platform_device_register(&at91cap9_spi1_device);
-        }
-}
-#else
-void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  Timer/Counter block
- * -------------------------------------------------------------------- */
-
-#ifdef CONFIG_ATMEL_TCLIB
-
-static struct resource tcb_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_TCB0,
-                .end    = AT91CAP9_BASE_TCB0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_TCB,
-                .end    = AT91CAP9_ID_TCB,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_tcb_device = {
-        .name           = "atmel_tcb",
-        .id             = 0,
-        .resource       = tcb_resources,
-        .num_resources  = ARRAY_SIZE(tcb_resources),
-};
-
-static void __init at91_add_device_tc(void)
-{
-        platform_device_register(&at91cap9_tcb_device);
-}
-#else
-static void __init at91_add_device_tc(void) { }
-#endif
-
-
-/* --------------------------------------------------------------------
- *  RTT
- * -------------------------------------------------------------------- */
-
-static struct resource rtt_resources[] = {
-        {
-                .start  = AT91CAP9_BASE_RTT,
-                .end    = AT91CAP9_BASE_RTT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device at91cap9_rtt_device = {
-        .name           = "at91_rtt",
-        .id             = 0,
-        .resource       = rtt_resources,
-        .num_resources  = ARRAY_SIZE(rtt_resources),
-};
-
-static void __init at91_add_device_rtt(void)
-{
-        platform_device_register(&at91cap9_rtt_device);
-}
-
-
-/* --------------------------------------------------------------------
- *  Watchdog
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
-static struct resource wdt_resources[] = {
-        {
-                .start  = AT91CAP9_BASE_WDT,
-                .end    = AT91CAP9_BASE_WDT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device at91cap9_wdt_device = {
-        .name           = "at91_wdt",
-        .id             = -1,
-        .resource       = wdt_resources,
-        .num_resources  = ARRAY_SIZE(wdt_resources),
-};
-
-static void __init at91_add_device_watchdog(void)
-{
-        platform_device_register(&at91cap9_wdt_device);
-}
-#else
-static void __init at91_add_device_watchdog(void) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  PWM
- * --------------------------------------------------------------------*/
-
-#if defined(CONFIG_ATMEL_PWM)
-static u32 pwm_mask;
-
-static struct resource pwm_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_PWMC,
-                .end    = AT91CAP9_BASE_PWMC + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_PWMC,
-                .end    = AT91CAP9_ID_PWMC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_pwm0_device = {
-        .name   = "atmel_pwm",
-        .id     = -1,
-        .dev    = {
-                .platform_data          = &pwm_mask,
-        },
-        .resource       = pwm_resources,
-        .num_resources  = ARRAY_SIZE(pwm_resources),
-};
-
-void __init at91_add_device_pwm(u32 mask)
-{
-        if (mask & (1 << AT91_PWM0))
-                at91_set_A_periph(AT91_PIN_PB19, 1);    /* enable PWM0 */
-
-        if (mask & (1 << AT91_PWM1))
-                at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM1 */
-
-        if (mask & (1 << AT91_PWM2))
-                at91_set_B_periph(AT91_PIN_PC29, 1);    /* enable PWM2 */
-
-        if (mask & (1 << AT91_PWM3))
-                at91_set_B_periph(AT91_PIN_PA11, 1);    /* enable PWM3 */
-
-        pwm_mask = mask;
-
-        platform_device_register(&at91cap9_pwm0_device);
-}
-#else
-void __init at91_add_device_pwm(u32 mask) {}
-#endif
-
-
-
-/* --------------------------------------------------------------------
- *  AC97
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
-static u64 ac97_dmamask = DMA_BIT_MASK(32);
-static struct ac97c_platform_data ac97_data;
-
-static struct resource ac97_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_AC97C,
-                .end    = AT91CAP9_BASE_AC97C + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_AC97C,
-                .end    = AT91CAP9_ID_AC97C,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_ac97_device = {
-        .name           = "atmel_ac97c",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &ac97_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &ac97_data,
-        },
-        .resource       = ac97_resources,
-        .num_resources  = ARRAY_SIZE(ac97_resources),
-};
-
-void __init at91_add_device_ac97(struct ac97c_platform_data *data)
-{
-        if (!data)
-                return;
-
-        at91_set_A_periph(AT91_PIN_PA6, 0);     /* AC97FS */
-        at91_set_A_periph(AT91_PIN_PA7, 0);     /* AC97CK */
-        at91_set_A_periph(AT91_PIN_PA8, 0);     /* AC97TX */
-        at91_set_A_periph(AT91_PIN_PA9, 0);     /* AC97RX */
-
-        /* reset */
-        if (gpio_is_valid(data->reset_pin))
-                at91_set_gpio_output(data->reset_pin, 0);
-
-        ac97_data = *data;
-        platform_device_register(&at91cap9_ac97_device);
-}
-#else
-void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  LCD Controller
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-static u64 lcdc_dmamask = DMA_BIT_MASK(32);
-static struct atmel_lcdfb_info lcdc_data;
-
-static struct resource lcdc_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_LCDC_BASE,
-                .end    = AT91CAP9_LCDC_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_LCDC,
-                .end    = AT91CAP9_ID_LCDC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91_lcdc_device = {
-        .name           = "atmel_lcdfb",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &lcdc_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &lcdc_data,
-        },
-        .resource       = lcdc_resources,
-        .num_resources  = ARRAY_SIZE(lcdc_resources),
-};
-
-void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
-{
-        if (!data)
-                return;
-
-        if (cpu_is_at91cap9_revB())
-                irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
-
-        at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
-        at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
-        at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
-        at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
-        at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
-        at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
-        at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
-        at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
-        at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
-        at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
-        at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
-        at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
-        at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
-        at91_set_A_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
-        at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
-        at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
-        at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
-        at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
-        at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
-        at91_set_A_periph(AT91_PIN_PC25, 0);    /* LCDD21 */
-        at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
-        at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
-
-        lcdc_data = *data;
-        platform_device_register(&at91_lcdc_device);
-}
-#else
-void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  SSC -- Synchronous Serial Controller
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
-static u64 ssc0_dmamask = DMA_BIT_MASK(32);
-
-static struct resource ssc0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SSC0,
-                .end    = AT91CAP9_BASE_SSC0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SSC0,
-                .end    = AT91CAP9_ID_SSC0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_ssc0_device = {
-        .name   = "ssc",
-        .id     = 0,
-        .dev    = {
-                .dma_mask               = &ssc0_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = ssc0_resources,
-        .num_resources  = ARRAY_SIZE(ssc0_resources),
-};
-
-static inline void configure_ssc0_pins(unsigned pins)
-{
-        if (pins & ATMEL_SSC_TF)
-                at91_set_A_periph(AT91_PIN_PB0, 1);
-        if (pins & ATMEL_SSC_TK)
-                at91_set_A_periph(AT91_PIN_PB1, 1);
-        if (pins & ATMEL_SSC_TD)
-                at91_set_A_periph(AT91_PIN_PB2, 1);
-        if (pins & ATMEL_SSC_RD)
-                at91_set_A_periph(AT91_PIN_PB3, 1);
-        if (pins & ATMEL_SSC_RK)
-                at91_set_A_periph(AT91_PIN_PB4, 1);
-        if (pins & ATMEL_SSC_RF)
-                at91_set_A_periph(AT91_PIN_PB5, 1);
-}
-
-static u64 ssc1_dmamask = DMA_BIT_MASK(32);
-
-static struct resource ssc1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SSC1,
-                .end    = AT91CAP9_BASE_SSC1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SSC1,
-                .end    = AT91CAP9_ID_SSC1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_ssc1_device = {
-        .name   = "ssc",
-        .id     = 1,
-        .dev    = {
-                .dma_mask               = &ssc1_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = ssc1_resources,
-        .num_resources  = ARRAY_SIZE(ssc1_resources),
-};
-
-static inline void configure_ssc1_pins(unsigned pins)
-{
-        if (pins & ATMEL_SSC_TF)
-                at91_set_A_periph(AT91_PIN_PB6, 1);
-        if (pins & ATMEL_SSC_TK)
-                at91_set_A_periph(AT91_PIN_PB7, 1);
-        if (pins & ATMEL_SSC_TD)
-                at91_set_A_periph(AT91_PIN_PB8, 1);
-        if (pins & ATMEL_SSC_RD)
-                at91_set_A_periph(AT91_PIN_PB9, 1);
-        if (pins & ATMEL_SSC_RK)
-                at91_set_A_periph(AT91_PIN_PB10, 1);
-        if (pins & ATMEL_SSC_RF)
-                at91_set_A_periph(AT91_PIN_PB11, 1);
-}
-
-/*
- * SSC controllers are accessed through library code, instead of any
- * kind of all-singing/all-dancing driver.  For example one could be
- * used by a particular I2S audio codec's driver, while another one
- * on the same system might be used by a custom data capture driver.
- */
-void __init at91_add_device_ssc(unsigned id, unsigned pins)
-{
-        struct platform_device *pdev;
-
-        /*
-         * NOTE: caller is responsible for passing information matching
-         * "pins" to whatever will be using each particular controller.
-         */
-        switch (id) {
-        case AT91CAP9_ID_SSC0:
-                pdev = &at91cap9_ssc0_device;
-                configure_ssc0_pins(pins);
-                break;
-        case AT91CAP9_ID_SSC1:
-                pdev = &at91cap9_ssc1_device;
-                configure_ssc1_pins(pins);
-                break;
-        default:
-                return;
-        }
-
-        platform_device_register(pdev);
-}
-
-#else
-void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  UART
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_SERIAL_ATMEL)
-static struct resource dbgu_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_DBGU,
-                .end    = AT91CAP9_BASE_DBGU + SZ_512 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91_ID_SYS,
-                .end    = AT91_ID_SYS,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data dbgu_data = {
-        .use_dma_tx     = 0,
-        .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
-};
-
-static u64 dbgu_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_dbgu_device = {
-        .name           = "atmel_usart",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &dbgu_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &dbgu_data,
-        },
-        .resource       = dbgu_resources,
-        .num_resources  = ARRAY_SIZE(dbgu_resources),
-};
-
-static inline void configure_dbgu_pins(void)
-{
-        at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
-        at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
-}
-
-static struct resource uart0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_US0,
-                .end    = AT91CAP9_BASE_US0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_US0,
-                .end    = AT91CAP9_ID_US0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data uart0_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-
-static u64 uart0_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_uart0_device = {
-        .name           = "atmel_usart",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &uart0_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart0_data,
-        },
-        .resource       = uart0_resources,
-        .num_resources  = ARRAY_SIZE(uart0_resources),
-};
-
-static inline void configure_usart0_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PA22, 1);            /* TXD0 */
-        at91_set_A_periph(AT91_PIN_PA23, 0);            /* RXD0 */
-
-        if (pins & ATMEL_UART_RTS)
-                at91_set_A_periph(AT91_PIN_PA24, 0);    /* RTS0 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_A_periph(AT91_PIN_PA25, 0);    /* CTS0 */
-}
-
-static struct resource uart1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_US1,
-                .end    = AT91CAP9_BASE_US1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_US1,
-                .end    = AT91CAP9_ID_US1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data uart1_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-
-static u64 uart1_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_uart1_device = {
-        .name           = "atmel_usart",
-        .id             = 2,
-        .dev            = {
-                                .dma_mask               = &uart1_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart1_data,
-        },
-        .resource       = uart1_resources,
-        .num_resources  = ARRAY_SIZE(uart1_resources),
-};
-
-static inline void configure_usart1_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
-        at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
-
-        if (pins & ATMEL_UART_RTS)
-                at91_set_B_periph(AT91_PIN_PD7, 0);     /* RTS1 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_B_periph(AT91_PIN_PD8, 0);     /* CTS1 */
-}
-
-static struct resource uart2_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_US2,
-                .end    = AT91CAP9_BASE_US2 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_US2,
-                .end    = AT91CAP9_ID_US2,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data uart2_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-
-static u64 uart2_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_uart2_device = {
-        .name           = "atmel_usart",
-        .id             = 3,
-        .dev            = {
-                                .dma_mask               = &uart2_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart2_data,
-        },
-        .resource       = uart2_resources,
-        .num_resources  = ARRAY_SIZE(uart2_resources),
-};
-
-static inline void configure_usart2_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
-        at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
-
-        if (pins & ATMEL_UART_RTS)
-                at91_set_B_periph(AT91_PIN_PD5, 0);     /* RTS2 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_B_periph(AT91_PIN_PD6, 0);     /* CTS2 */
-}
-
-static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
-struct platform_device *atmel_default_console_device;   /* the serial console device */
-
-void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
-{
-        struct platform_device *pdev;
-        struct atmel_uart_data *pdata;
-
-        switch (id) {
-                case 0:         /* DBGU */
-                        pdev = &at91cap9_dbgu_device;
-                        configure_dbgu_pins();
-                        break;
-                case AT91CAP9_ID_US0:
-                        pdev = &at91cap9_uart0_device;
-                        configure_usart0_pins(pins);
-                        break;
-                case AT91CAP9_ID_US1:
-                        pdev = &at91cap9_uart1_device;
-                        configure_usart1_pins(pins);
-                        break;
-                case AT91CAP9_ID_US2:
-                        pdev = &at91cap9_uart2_device;
-                        configure_usart2_pins(pins);
-                        break;
-                default:
-                        return;
-        }
-        pdata = pdev->dev.platform_data;
-        pdata->num = portnr;            /* update to mapped ID */
-
-        if (portnr < ATMEL_MAX_UART)
-                at91_uarts[portnr] = pdev;
-}
-
-void __init at91_set_serial_console(unsigned portnr)
-{
-        if (portnr < ATMEL_MAX_UART) {
-                atmel_default_console_device = at91_uarts[portnr];
-                at91cap9_set_console_clock(at91_uarts[portnr]->id);
-        }
-}
-
-void __init at91_add_device_serial(void)
-{
-        int i;
-
-        for (i = 0; i < ATMEL_MAX_UART; i++) {
-                if (at91_uarts[i])
-                        platform_device_register(at91_uarts[i]);
-        }
-
-        if (!atmel_default_console_device)
-                printk(KERN_INFO "AT91: No default serial console defined.\n");
-}
-#else
-void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
-void __init at91_set_serial_console(unsigned portnr) {}
-void __init at91_add_device_serial(void) {}
-#endif
-
-
-/* -------------------------------------------------------------------- */
-/*
- * These devices are always present and don't need any board-specific
- * setup.
- */
-static int __init at91_add_standard_devices(void)
-{
-        at91_add_device_rtt();
-        at91_add_device_watchdog();
-        at91_add_device_tc();
-        return 0;
-}
-
-arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 366a7765635b..70709ab0102a 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -891,7 +891,8 @@ static struct platform_device at91sam9263_isi_device = {
         .num_resources  = ARRAY_SIZE(isi_resources),
 };
 
-void __init at91_add_device_isi(void)
+void __init at91_add_device_isi(struct isi_platform_data *data,
+                bool use_pck_as_mck)
 {
         at91_set_A_periph(AT91_PIN_PE0, 0);     /* ISI_D0 */
         at91_set_A_periph(AT91_PIN_PE1, 0);     /* ISI_D1 */
@@ -904,14 +905,20 @@ void __init at91_add_device_isi(void)
         at91_set_A_periph(AT91_PIN_PE8, 0);     /* ISI_PCK */
         at91_set_A_periph(AT91_PIN_PE9, 0);     /* ISI_HSYNC */
         at91_set_A_periph(AT91_PIN_PE10, 0);    /* ISI_VSYNC */
-        at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
         at91_set_B_periph(AT91_PIN_PE12, 0);    /* ISI_PD8 */
         at91_set_B_periph(AT91_PIN_PE13, 0);    /* ISI_PD9 */
         at91_set_B_periph(AT91_PIN_PE14, 0);    /* ISI_PD10 */
         at91_set_B_periph(AT91_PIN_PE15, 0);    /* ISI_PD11 */
+
+        if (use_pck_as_mck) {
+                at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
+
+                /* TODO: register the PCK for ISI_MCK and set its parent */
+        }
 }
 #else
-void __init at91_add_device_isi(void) {}
+void __init at91_add_device_isi(struct isi_platform_data *data,
+                bool use_pck_as_mck) {}
 #endif
 
 
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index b7582dd10dc3..bd4e68cd3e2f 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -14,6 +14,7 @@
 
 #include <linux/dma-mapping.h>
 #include <linux/gpio.h>
+#include <linux/clk.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 #include <linux/atmel-mci.h>
@@ -28,7 +29,10 @@
 #include <mach/at_hdmac.h>
 #include <mach/atmel-mci.h>
 
+#include <media/atmel-isi.h>
+
 #include "generic.h"
+#include "clock.h"
 
 
 /* --------------------------------------------------------------------
@@ -38,10 +42,6 @@
 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
 
-static struct at_dma_platform_data atdma_pdata = {
-        .nr_channels    = 8,
-};
-
 static struct resource hdmac_resources[] = {
         [0] = {
                 .start  = AT91SAM9G45_BASE_DMA,
@@ -56,12 +56,11 @@ static struct resource hdmac_resources[] = {
 };
 
 static struct platform_device at_hdmac_device = {
-        .name           = "at_hdmac",
+        .name           = "at91sam9g45_dma",
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &hdmac_dmamask,
                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &atdma_pdata,
         },
         .resource       = hdmac_resources,
         .num_resources  = ARRAY_SIZE(hdmac_resources),
@@ -69,9 +68,15 @@ static struct platform_device at_hdmac_device = {
 
 void __init at91_add_device_hdmac(void)
 {
-        dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
-        dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask);
-        platform_device_register(&at_hdmac_device);
+#if defined(CONFIG_OF)
+        struct device_node *of_node =
+                of_find_node_by_name(NULL, "dma-controller");
+
+        if (of_node)
+                of_node_put(of_node);
+        else
+#endif
+                platform_device_register(&at_hdmac_device);
 }
 #else
 void __init at91_add_device_hdmac(void) {}
@@ -869,6 +874,96 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
 #endif
 
+/* --------------------------------------------------------------------
+ *  Image Sensor Interface
+ * -------------------------------------------------------------------- */
+#if defined(CONFIG_VIDEO_ATMEL_ISI) || defined(CONFIG_VIDEO_ATMEL_ISI_MODULE)
+static u64 isi_dmamask = DMA_BIT_MASK(32);
+static struct isi_platform_data isi_data;
+
+struct resource isi_resources[] = {
+        [0] = {
+                .start  = AT91SAM9G45_BASE_ISI,
+                .end    = AT91SAM9G45_BASE_ISI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9G45_ID_ISI,
+                .end    = AT91SAM9G45_ID_ISI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9g45_isi_device = {
+        .name           = "atmel_isi",
+        .id             = 0,
+        .dev            = {
+                        .dma_mask               = &isi_dmamask,
+                        .coherent_dma_mask      = DMA_BIT_MASK(32),
+                        .platform_data          = &isi_data,
+        },
+        .resource       = isi_resources,
+        .num_resources  = ARRAY_SIZE(isi_resources),
+};
+
+static struct clk_lookup isi_mck_lookups[] = {
+        CLKDEV_CON_DEV_ID("isi_mck", "atmel_isi.0", NULL),
+};
+
+void __init at91_add_device_isi(struct isi_platform_data *data,
+                bool use_pck_as_mck)
+{
+        struct clk *pck;
+        struct clk *parent;
+
+        if (!data)
+                return;
+        isi_data = *data;
+
+        at91_set_A_periph(AT91_PIN_PB20, 0);    /* ISI_D0 */
+        at91_set_A_periph(AT91_PIN_PB21, 0);    /* ISI_D1 */
+        at91_set_A_periph(AT91_PIN_PB22, 0);    /* ISI_D2 */
+        at91_set_A_periph(AT91_PIN_PB23, 0);    /* ISI_D3 */
+        at91_set_A_periph(AT91_PIN_PB24, 0);    /* ISI_D4 */
+        at91_set_A_periph(AT91_PIN_PB25, 0);    /* ISI_D5 */
+        at91_set_A_periph(AT91_PIN_PB26, 0);    /* ISI_D6 */
+        at91_set_A_periph(AT91_PIN_PB27, 0);    /* ISI_D7 */
+        at91_set_A_periph(AT91_PIN_PB28, 0);    /* ISI_PCK */
+        at91_set_A_periph(AT91_PIN_PB30, 0);    /* ISI_HSYNC */
+        at91_set_A_periph(AT91_PIN_PB29, 0);    /* ISI_VSYNC */
+        at91_set_B_periph(AT91_PIN_PB8, 0);     /* ISI_PD8 */
+        at91_set_B_periph(AT91_PIN_PB9, 0);     /* ISI_PD9 */
+        at91_set_B_periph(AT91_PIN_PB10, 0);    /* ISI_PD10 */
+        at91_set_B_periph(AT91_PIN_PB11, 0);    /* ISI_PD11 */
+
+        platform_device_register(&at91sam9g45_isi_device);
+
+        if (use_pck_as_mck) {
+                at91_set_B_periph(AT91_PIN_PB31, 0);    /* ISI_MCK (PCK1) */
+
+                pck = clk_get(NULL, "pck1");
+                parent = clk_get(NULL, "plla");
+
+                BUG_ON(IS_ERR(pck) || IS_ERR(parent));
+
+                if (clk_set_parent(pck, parent)) {
+                        pr_err("Failed to set PCK's parent\n");
+                } else {
+                        /* Register PCK as ISI_MCK */
+                        isi_mck_lookups[0].clk = pck;
+                        clkdev_add_table(isi_mck_lookups,
+                                        ARRAY_SIZE(isi_mck_lookups));
+                }
+
+                clk_put(pck);
+                clk_put(parent);
+        }
+}
+#else
+void __init at91_add_device_isi(struct isi_platform_data *data,
+                bool use_pck_as_mck) {}
+#endif
+
 
 /* --------------------------------------------------------------------
  *  LCD Controller
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 61908dce9784..9be71c11d0f0 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -33,10 +33,6 @@
 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
 
-static struct at_dma_platform_data atdma_pdata = {
-        .nr_channels    = 2,
-};
-
 static struct resource hdmac_resources[] = {
         [0] = {
                 .start  = AT91SAM9RL_BASE_DMA,
@@ -51,12 +47,11 @@ static struct resource hdmac_resources[] = {
 };
 
 static struct platform_device at_hdmac_device = {
-        .name           = "at_hdmac",
+        .name           = "at91sam9rl_dma",
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &hdmac_dmamask,
                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &atdma_pdata,
         },
         .resource       = hdmac_resources,
         .num_resources  = ARRAY_SIZE(hdmac_resources),
@@ -64,7 +59,6 @@ static struct platform_device at_hdmac_device = {
 
 void __init at91_add_device_hdmac(void)
 {
-        dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
         platform_device_register(&at_hdmac_device);
 }
 #else
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
deleted file mode 100644
index ac3de4f7c31d..000000000000
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ /dev/null
@@ -1,396 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/board-cap9adk.c
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2005 SAN People
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#include <linux/types.h>
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/ads7846.h>
-#include <linux/fb.h>
-#include <linux/mtd/physmap.h>
-
-#include <video/atmel_lcdc.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <mach/board.h>
-#include <mach/at91cap9_matrix.h>
-#include <mach/at91sam9_smc.h>
-#include <mach/system_rev.h>
-
-#include "sam9_smc.h"
-#include "generic.h"
-
-
-static void __init cap9adk_init_early(void)
-{
-        /* Initialize processor: 12 MHz crystal */
-        at91_initialize(12000000);
-
-        /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */
-        at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11);
-        /* ... POWER LED always on */
-        at91_set_gpio_output(AT91_PIN_PC29, 1);
-
-        /* Setup the serial ports and console */
-        at91_register_uart(0, 0, 0);            /* DBGU = ttyS0 */
-        at91_set_serial_console(0);
-}
-
-/*
- * USB Host port
- */
-static struct at91_usbh_data __initdata cap9adk_usbh_data = {
-        .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
-};
-
-/*
- * USB HS Device port
- */
-static struct usba_platform_data __initdata cap9adk_usba_udc_data = {
-        .vbus_pin       = AT91_PIN_PB31,
-};
-
-/*
- * ADS7846 Touchscreen
- */
-#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-static int ads7843_pendown_state(void)
-{
-        return !at91_get_gpio_value(AT91_PIN_PC4);      /* Touchscreen PENIRQ */
-}
-
-static struct ads7846_platform_data ads_info = {
-        .model                  = 7843,
-        .x_min                  = 150,
-        .x_max                  = 3830,
-        .y_min                  = 190,
-        .y_max                  = 3830,
-        .vref_delay_usecs       = 100,
-        .x_plate_ohms           = 450,
-        .y_plate_ohms           = 250,
-        .pressure_max           = 15000,
-        .debounce_max           = 1,
-        .debounce_rep           = 0,
-        .debounce_tol           = (~0),
-        .get_pendown_state      = ads7843_pendown_state,
-};
-
-static void __init cap9adk_add_device_ts(void)
-{
-        at91_set_gpio_input(AT91_PIN_PC4, 1);   /* Touchscreen PENIRQ */
-        at91_set_gpio_input(AT91_PIN_PC5, 1);   /* Touchscreen BUSY */
-}
-#else
-static void __init cap9adk_add_device_ts(void) {}
-#endif
-
-
-/*
- * SPI devices.
- */
-static struct spi_board_info cap9adk_spi_devices[] = {
-#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
-        {       /* DataFlash card */
-                .modalias       = "mtd_dataflash",
-                .chip_select    = 0,
-                .max_speed_hz   = 15 * 1000 * 1000,
-                .bus_num        = 0,
-        },
-#endif
-#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-        {
-                .modalias       = "ads7846",
-                .chip_select    = 3,            /* can be 2 or 3, depending on J2 jumper */
-                .max_speed_hz   = 125000 * 26,  /* (max sample rate @ 3V) * (cmd + data + overhead) */
-                .bus_num        = 0,
-                .platform_data  = &ads_info,
-                .irq            = AT91_PIN_PC4,
-        },
-#endif
-};
-
-
-/*
- * MCI (SD/MMC)
- */
-static struct at91_mmc_data __initdata cap9adk_mmc_data = {
-        .wire4          = 1,
-        .det_pin        = -EINVAL,
-        .wp_pin         = -EINVAL,
-        .vcc_pin        = -EINVAL,
-};
-
-
-/*
- * MACB Ethernet device
- */
-static struct macb_platform_data __initdata cap9adk_macb_data = {
-        .phy_irq_pin    = -EINVAL,
-        .is_rmii        = 1,
-};
-
-
-/*
- * NAND flash
- */
-static struct mtd_partition __initdata cap9adk_nand_partitions[] = {
-        {
-                .name   = "NAND partition",
-                .offset = 0,
-                .size   = MTDPART_SIZ_FULL,
-        },
-};
-
-static struct atmel_nand_data __initdata cap9adk_nand_data = {
-        .ale            = 21,
-        .cle            = 22,
-        .det_pin        = -EINVAL,
-        .rdy_pin        = -EINVAL,
-        .enable_pin     = AT91_PIN_PD15,
-        .parts          = cap9adk_nand_partitions,
-        .num_parts      = ARRAY_SIZE(cap9adk_nand_partitions),
-};
-
-static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
-        .ncs_read_setup         = 1,
-        .nrd_setup              = 2,
-        .ncs_write_setup        = 1,
-        .nwe_setup              = 2,
-
-        .ncs_read_pulse         = 6,
-        .nrd_pulse              = 4,
-        .ncs_write_pulse        = 6,
-        .nwe_pulse              = 4,
-
-        .read_cycle             = 8,
-        .write_cycle            = 8,
-
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
-        .tdf_cycles             = 1,
-};
-
-static void __init cap9adk_add_device_nand(void)
-{
-        unsigned long csa;
-
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
-
-        cap9adk_nand_data.bus_width_16 = board_have_nand_16bit();
-        /* setup bus-width (8 or 16) */
-        if (cap9adk_nand_data.bus_width_16)
-                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
-        else
-                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
-
-        /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &cap9adk_nand_smc_config);
-
-        at91_add_device_nand(&cap9adk_nand_data);
-}
-
-
-/*
- * NOR flash
- */
-static struct mtd_partition cap9adk_nor_partitions[] = {
-        {
-                .name           = "NOR partition",
-                .offset         = 0,
-                .size           = MTDPART_SIZ_FULL,
-        },
-};
-
-static struct physmap_flash_data cap9adk_nor_data = {
-        .width          = 2,
-        .parts          = cap9adk_nor_partitions,
-        .nr_parts       = ARRAY_SIZE(cap9adk_nor_partitions),
-};
-
-#define NOR_BASE        AT91_CHIPSELECT_0
-#define NOR_SIZE        SZ_8M
-
-static struct resource nor_flash_resources[] = {
-        {
-                .start  = NOR_BASE,
-                .end    = NOR_BASE + NOR_SIZE - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device cap9adk_nor_flash = {
-        .name           = "physmap-flash",
-        .id             = 0,
-        .dev            = {
-                                .platform_data  = &cap9adk_nor_data,
-        },
-        .resource       = nor_flash_resources,
-        .num_resources  = ARRAY_SIZE(nor_flash_resources),
-};
-
-static struct sam9_smc_config __initdata cap9adk_nor_smc_config = {
-        .ncs_read_setup         = 2,
-        .nrd_setup              = 4,
-        .ncs_write_setup        = 2,
-        .nwe_setup              = 4,
-
-        .ncs_read_pulse         = 10,
-        .nrd_pulse              = 8,
-        .ncs_write_pulse        = 10,
-        .nwe_pulse              = 8,
-
-        .read_cycle             = 16,
-        .write_cycle            = 16,
-
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
-        .tdf_cycles             = 1,
-};
-
-static __init void cap9adk_add_device_nor(void)
-{
-        unsigned long csa;
-
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
-
-        /* configure chip-select 0 (NOR) */
-        sam9_smc_configure(0, 0, &cap9adk_nor_smc_config);
-
-        platform_device_register(&cap9adk_nor_flash);
-}
-
-
-/*
- * LCD Controller
- */
-#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-static struct fb_videomode at91_tft_vga_modes[] = {
-        {
-                .name           = "TX09D50VM1CCA @ 60",
-                .refresh        = 60,
-                .xres           = 240,          .yres           = 320,
-                .pixclock       = KHZ2PICOS(4965),
-
-                .left_margin    = 1,            .right_margin   = 33,
-                .upper_margin   = 1,            .lower_margin   = 0,
-                .hsync_len      = 5,            .vsync_len      = 1,
-
-                .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-                .vmode          = FB_VMODE_NONINTERLACED,
-        },
-};
-
-static struct fb_monspecs at91fb_default_monspecs = {
-        .manufacturer   = "HIT",
-        .monitor        = "TX09D70VM1CCA",
-
-        .modedb         = at91_tft_vga_modes,
-        .modedb_len     = ARRAY_SIZE(at91_tft_vga_modes),
-        .hfmin          = 15000,
-        .hfmax          = 64000,
-        .vfmin          = 50,
-        .vfmax          = 150,
-};
-
-#define AT91CAP9_DEFAULT_LCDCON2        (ATMEL_LCDC_MEMOR_LITTLE \
-                                        | ATMEL_LCDC_DISTYPE_TFT    \
-                                        | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
-
-static void at91_lcdc_power_control(int on)
-{
-        if (on)
-                at91_set_gpio_value(AT91_PIN_PC0, 0);   /* power up */
-        else
-                at91_set_gpio_value(AT91_PIN_PC0, 1);   /* power down */
-}
-
-/* Driver datas */
-static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data = {
-        .default_bpp                    = 16,
-        .default_dmacon                 = ATMEL_LCDC_DMAEN,
-        .default_lcdcon2                = AT91CAP9_DEFAULT_LCDCON2,
-        .default_monspecs               = &at91fb_default_monspecs,
-        .atmel_lcdfb_power_control      = at91_lcdc_power_control,
-        .guard_time                     = 1,
-};
-
-#else
-static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
-#endif
-
-
-/*
- * AC97
- */
-static struct ac97c_platform_data cap9adk_ac97_data = {
-        .reset_pin      = -EINVAL,
-};
-
-
-static void __init cap9adk_board_init(void)
-{
-        /* Serial */
-        at91_add_device_serial();
-        /* USB Host */
-        at91_add_device_usbh(&cap9adk_usbh_data);
-        /* USB HS */
-        at91_add_device_usba(&cap9adk_usba_udc_data);
-        /* SPI */
-        at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
-        /* Touchscreen */
-        cap9adk_add_device_ts();
-        /* MMC */
-        at91_add_device_mmc(1, &cap9adk_mmc_data);
-        /* Ethernet */
-        at91_add_device_eth(&cap9adk_macb_data);
-        /* NAND */
-        cap9adk_add_device_nand();
-        /* NOR Flash */
-        cap9adk_add_device_nor();
-        /* I2C */
-        at91_add_device_i2c(NULL, 0);
-        /* LCD Controller */
-        at91_add_device_lcdc(&cap9adk_lcdc_data);
-        /* AC97 */
-        at91_add_device_ac97(&cap9adk_ac97_data);
-}
-
-MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK")
-        /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */
-        .timer          = &at91sam926x_timer,
-        .map_io         = at91_map_io,
-        .init_early     = cap9adk_init_early,
-        .init_irq       = at91_init_irq_default,
-        .init_machine   = cap9adk_board_init,
-MACHINE_END
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index eec02cd57ced..1815152001f7 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -1,7 +1,7 @@
 /*
  * linux/arch/arm/mach-at91/board-flexibity.c
  *
- *  Copyright (C) 2010 Flexibity
+ *  Copyright (C) 2010-2011 Flexibity
  *  Copyright (C) 2005 SAN People
  *  Copyright (C) 2006 Atmel
  *
@@ -62,6 +62,13 @@ static struct at91_udc_data __initdata flexibity_udc_data = {
         .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
+/* I2C devices */
+static struct i2c_board_info __initdata flexibity_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("ds1307", 0x68),
+        },
+};
+
 /* SPI devices */
 static struct spi_board_info flexibity_spi_devices[] = {
         {       /* DataFlash chip */
@@ -141,6 +148,9 @@ static void __init flexibity_board_init(void)
         at91_add_device_usbh(&flexibity_usbh_data);
         /* USB Device */
         at91_add_device_udc(&flexibity_udc_data);
+        /* I2C */
+        at91_add_device_i2c(flexibity_i2c_devices,
+                ARRAY_SIZE(flexibity_i2c_devices));
         /* SPI */
         at91_add_device_spi(flexibity_spi_devices,
                 ARRAY_SIZE(flexibity_spi_devices));
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index ea0d1b9c2b7b..57497e2b8878 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -24,11 +24,13 @@
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/leds.h>
-#include <linux/clk.h>
 #include <linux/atmel-mci.h>
+#include <linux/delay.h>
 
 #include <mach/hardware.h>
 #include <video/atmel_lcdc.h>
+#include <media/soc_camera.h>
+#include <media/atmel-isi.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -185,6 +187,71 @@ static void __init ek_add_device_nand(void)
 
 
 /*
+ *  ISI
+ */
+static struct isi_platform_data __initdata isi_data = {
+        .frate                  = ISI_CFG1_FRATE_CAPTURE_ALL,
+        /* to use codec and preview path simultaneously */
+        .full_mode              = 1,
+        .data_width_flags       = ISI_DATAWIDTH_8 | ISI_DATAWIDTH_10,
+        /* ISI_MCK is provided by programmable clock or external clock */
+        .mck_hz                 = 25000000,
+};
+
+
+/*
+ * soc-camera OV2640
+ */
+#if defined(CONFIG_SOC_CAMERA_OV2640) || \
+        defined(CONFIG_SOC_CAMERA_OV2640_MODULE)
+static unsigned long isi_camera_query_bus_param(struct soc_camera_link *link)
+{
+        /* ISI board for ek using default 8-bits connection */
+        return SOCAM_DATAWIDTH_8;
+}
+
+static int i2c_camera_power(struct device *dev, int on)
+{
+        /* enable or disable the camera */
+        pr_debug("%s: %s the camera\n", __func__, on ? "ENABLE" : "DISABLE");
+        at91_set_gpio_output(AT91_PIN_PD13, !on);
+
+        if (!on)
+                goto out;
+
+        /* If enabled, give a reset impulse */
+        at91_set_gpio_output(AT91_PIN_PD12, 0);
+        msleep(20);
+        at91_set_gpio_output(AT91_PIN_PD12, 1);
+        msleep(100);
+
+out:
+        return 0;
+}
+
+static struct i2c_board_info i2c_camera = {
+        I2C_BOARD_INFO("ov2640", 0x30),
+};
+
+static struct soc_camera_link iclink_ov2640 = {
+        .bus_id                 = 0,
+        .board_info             = &i2c_camera,
+        .i2c_adapter_id         = 0,
+        .power                  = i2c_camera_power,
+        .query_bus_param        = isi_camera_query_bus_param,
+};
+
+static struct platform_device isi_ov2640 = {
+        .name   = "soc-camera-pdrv",
+        .id     = 0,
+        .dev    = {
+                .platform_data = &iclink_ov2640,
+        },
+};
+#endif
+
+
+/*
  * LCD Controller
  */
 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
@@ -377,7 +444,12 @@ static struct gpio_led ek_pwm_led[] = {
 #endif
 };
 
-
+static struct platform_device *devices[] __initdata = {
+#if defined(CONFIG_SOC_CAMERA_OV2640) || \
+        defined(CONFIG_SOC_CAMERA_OV2640_MODULE)
+        &isi_ov2640,
+#endif
+};
 
 static void __init ek_board_init(void)
 {
@@ -399,6 +471,8 @@ static void __init ek_board_init(void)
         ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(0, NULL, 0);
+        /* ISI, using programmable clock as ISI_MCK */
+        at91_add_device_isi(&isi_data, true);
         /* LCD Controller */
         at91_add_device_lcdc(&ek_lcdc_data);
         /* Touch Screen */
@@ -410,6 +484,8 @@ static void __init ek_board_init(void)
         /* LEDs */
         at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
         at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
+        /* Other platform devices */
+        platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
 MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 61873f3aa92d..aa04e22a9da6 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -47,8 +47,7 @@
 /*
  * Chips have some kind of clocks : group them by functionality
  */
-#define cpu_has_utmi()          (  cpu_is_at91cap9() \
-                                || cpu_is_at91sam9rl() \
+#define cpu_has_utmi()          (  cpu_is_at91sam9rl() \
                                 || cpu_is_at91sam9g45())
 
 #define cpu_has_800M_plla()     (  cpu_is_at91sam9g20() \
@@ -602,8 +601,6 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
                    cpu_is_at91sam9g10()) {
                 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
                 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
-        } else if (cpu_is_at91cap9()) {
-                uhpck.pmc_mask = AT91CAP9_PMC_UHP;
         }
         at91_sys_write(AT91_CKGR_PLLBR, 0);
 
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 594133451c0c..7e8280e798c1 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -45,7 +45,6 @@ extern void __init at91sam9261_set_console_clock(int id);
 extern void __init at91sam9263_set_console_clock(int id);
 extern void __init at91sam9rl_set_console_clock(int id);
 extern void __init at91sam9g45_set_console_clock(int id);
-extern void __init at91cap9_set_console_clock(int id);
 #ifdef CONFIG_AT91_PMC_UNIT
 extern int __init at91_clock_init(unsigned long main_clock);
 #else
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index e46f93e34aab..dbdd6ae473d5 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -23,10 +23,8 @@
 #define         AT91_PMC_PCK            (1 <<  0)               /* Processor Clock */
 #define         AT91RM9200_PMC_UDP      (1 <<  1)               /* USB Devcice Port Clock [AT91RM9200 only] */
 #define         AT91RM9200_PMC_MCKUDP   (1 <<  2)               /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
-#define         AT91CAP9_PMC_DDR        (1 <<  2)               /* DDR Clock [CAP9 revC & some SAM9 only] */
 #define         AT91RM9200_PMC_UHP      (1 <<  4)               /* USB Host Port Clock [AT91RM9200 only] */
 #define         AT91SAM926x_PMC_UHP     (1 <<  6)               /* USB Host Port Clock [AT91SAM926x only] */
-#define         AT91CAP9_PMC_UHP        (1 <<  6)               /* USB Host Port Clock [AT91CAP9 only] */
 #define         AT91SAM926x_PMC_UDP     (1 <<  7)               /* USB Devcice Port Clock [AT91SAM926x only] */
 #define         AT91_PMC_PCK0           (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1           (1 <<  9)               /* Programmable Clock 1 */
@@ -40,7 +38,7 @@
 #define AT91_PMC_PCDR           (AT91_PMC + 0x14)       /* Peripheral Clock Disable Register */
 #define AT91_PMC_PCSR           (AT91_PMC + 0x18)       /* Peripheral Clock Status Register */
 
-#define AT91_CKGR_UCKR          (AT91_PMC + 0x1C)       /* UTMI Clock Register [some SAM9, CAP9] */
+#define AT91_CKGR_UCKR          (AT91_PMC + 0x1C)       /* UTMI Clock Register [some SAM9] */
 #define         AT91_PMC_UPLLEN         (1   << 16)             /* UTMI PLL Enable */
 #define         AT91_PMC_UPLLCOUNT      (0xf << 20)             /* UTMI PLL Start-up Time */
 #define         AT91_PMC_BIASEN         (1   << 24)             /* UTMI BIAS Enable */
@@ -48,7 +46,7 @@
 
 #define AT91_CKGR_MOR           (AT91_PMC + 0x20)       /* Main Oscillator Register [not on SAM9RL] */
 #define         AT91_PMC_MOSCEN         (1    << 0)             /* Main Oscillator Enable */
-#define         AT91_PMC_OSCBYPASS      (1    << 1)             /* Oscillator Bypass [SAM9x, CAP9] */
+#define         AT91_PMC_OSCBYPASS      (1    << 1)             /* Oscillator Bypass [SAM9x] */
 #define         AT91_PMC_OSCOUNT        (0xff << 8)             /* Main Oscillator Start-up Time */
 
 #define AT91_CKGR_MCFR          (AT91_PMC + 0x24)       /* Main Clock Frequency Register */
@@ -87,7 +85,7 @@
 #define                 AT91RM9200_PMC_MDIV_2           (1 << 8)
 #define                 AT91RM9200_PMC_MDIV_3           (2 << 8)
 #define                 AT91RM9200_PMC_MDIV_4           (3 << 8)
-#define                 AT91SAM9_PMC_MDIV_1             (0 << 8)        /* [SAM9,CAP9 only] */
+#define                 AT91SAM9_PMC_MDIV_1             (0 << 8)        /* [SAM9 only] */
 #define                 AT91SAM9_PMC_MDIV_2             (1 << 8)
 #define                 AT91SAM9_PMC_MDIV_4             (2 << 8)
 #define                 AT91SAM9_PMC_MDIV_6             (3 << 8)        /* [some SAM9 only] */
@@ -117,17 +115,15 @@
 #define         AT91_PMC_LOCKA          (1 <<  1)               /* PLLA Lock */
 #define         AT91_PMC_LOCKB          (1 <<  2)               /* PLLB Lock */
 #define         AT91_PMC_MCKRDY         (1 <<  3)               /* Master Clock */
-#define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9, AT91CAP9 only] */
-#define         AT91_PMC_OSCSEL         (1 <<  7)               /* Slow Clock Oscillator [AT91CAP9 revC only] */
+#define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9] */
 #define         AT91_PMC_PCK0RDY        (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
 #define         AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
 #define         AT91_PMC_PCK3RDY        (1 << 11)               /* Programmable Clock 3 */
 #define AT91_PMC_IMR            (AT91_PMC + 0x6c)       /* Interrupt Mask Register */
 
-#define AT91_PMC_PROT           (AT91_PMC + 0xe4)       /* Protect Register [AT91CAP9 revC only] */
+#define AT91_PMC_PROT           (AT91_PMC + 0xe4)       /* Write Protect Mode Register [some SAM9] */
 #define         AT91_PMC_PROTKEY        0x504d4301      /* Activation Code */
 
-#define AT91_PMC_VER            (AT91_PMC + 0xfc)       /* PMC Module Version [AT91CAP9 only] */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
deleted file mode 100644
index 61d952902f2b..000000000000
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91cap9.h
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * Common definitions.
- * Based on AT91CAP9 datasheet revision B (Preliminary).
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91CAP9_H
-#define AT91CAP9_H
-
-/*
- * Peripheral identifiers/interrupts.
- */
-#define AT91CAP9_ID_PIOABCD     2       /* Parallel IO Controller A, B, C and D */
-#define AT91CAP9_ID_MPB0        3       /* MP Block Peripheral 0 */
-#define AT91CAP9_ID_MPB1        4       /* MP Block Peripheral 1 */
-#define AT91CAP9_ID_MPB2        5       /* MP Block Peripheral 2 */
-#define AT91CAP9_ID_MPB3        6       /* MP Block Peripheral 3 */
-#define AT91CAP9_ID_MPB4        7       /* MP Block Peripheral 4 */
-#define AT91CAP9_ID_US0         8       /* USART 0 */
-#define AT91CAP9_ID_US1         9       /* USART 1 */
-#define AT91CAP9_ID_US2         10      /* USART 2 */
-#define AT91CAP9_ID_MCI0        11      /* Multimedia Card Interface 0 */
-#define AT91CAP9_ID_MCI1        12      /* Multimedia Card Interface 1 */
-#define AT91CAP9_ID_CAN         13      /* CAN */
-#define AT91CAP9_ID_TWI         14      /* Two-Wire Interface */
-#define AT91CAP9_ID_SPI0        15      /* Serial Peripheral Interface 0 */
-#define AT91CAP9_ID_SPI1        16      /* Serial Peripheral Interface 0 */
-#define AT91CAP9_ID_SSC0        17      /* Serial Synchronous Controller 0 */
-#define AT91CAP9_ID_SSC1        18      /* Serial Synchronous Controller 1 */
-#define AT91CAP9_ID_AC97C       19      /* AC97 Controller */
-#define AT91CAP9_ID_TCB         20      /* Timer Counter 0, 1 and 2 */
-#define AT91CAP9_ID_PWMC        21      /* Pulse Width Modulation Controller */
-#define AT91CAP9_ID_EMAC        22      /* Ethernet */
-#define AT91CAP9_ID_AESTDES     23      /* Advanced Encryption Standard, Triple DES */
-#define AT91CAP9_ID_ADC         24      /* Analog-to-Digital Converter */
-#define AT91CAP9_ID_ISI         25      /* Image Sensor Interface */
-#define AT91CAP9_ID_LCDC        26      /* LCD Controller */
-#define AT91CAP9_ID_DMA         27      /* DMA Controller */
-#define AT91CAP9_ID_UDPHS       28      /* USB High Speed Device Port */
-#define AT91CAP9_ID_UHP         29      /* USB Host Port */
-#define AT91CAP9_ID_IRQ0        30      /* Advanced Interrupt Controller (IRQ0) */
-#define AT91CAP9_ID_IRQ1        31      /* Advanced Interrupt Controller (IRQ1) */
-
-/*
- * User Peripheral physical base addresses.
- */
-#define AT91CAP9_BASE_UDPHS             0xfff78000
-#define AT91CAP9_BASE_TCB0              0xfff7c000
-#define AT91CAP9_BASE_TC0               0xfff7c000
-#define AT91CAP9_BASE_TC1               0xfff7c040
-#define AT91CAP9_BASE_TC2               0xfff7c080
-#define AT91CAP9_BASE_MCI0              0xfff80000
-#define AT91CAP9_BASE_MCI1              0xfff84000
-#define AT91CAP9_BASE_TWI               0xfff88000
-#define AT91CAP9_BASE_US0               0xfff8c000
-#define AT91CAP9_BASE_US1               0xfff90000
-#define AT91CAP9_BASE_US2               0xfff94000
-#define AT91CAP9_BASE_SSC0              0xfff98000
-#define AT91CAP9_BASE_SSC1              0xfff9c000
-#define AT91CAP9_BASE_AC97C             0xfffa0000
-#define AT91CAP9_BASE_SPI0              0xfffa4000
-#define AT91CAP9_BASE_SPI1              0xfffa8000
-#define AT91CAP9_BASE_CAN               0xfffac000
-#define AT91CAP9_BASE_PWMC              0xfffb8000
-#define AT91CAP9_BASE_EMAC              0xfffbc000
-#define AT91CAP9_BASE_ADC               0xfffc0000
-#define AT91CAP9_BASE_ISI               0xfffc4000
-
-/*
- * System Peripherals (offset from AT91_BASE_SYS)
- */
-#define AT91_BCRAMC     (0xffffe400 - AT91_BASE_SYS)
-#define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
-#define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
-#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_GPBR       (cpu_is_at91cap9_revB() ?       \
-                        (0xfffffd50 - AT91_BASE_SYS) :  \
-                        (0xfffffd60 - AT91_BASE_SYS))
-
-#define AT91CAP9_BASE_ECC       0xffffe200
-#define AT91CAP9_BASE_DMA       0xffffec00
-#define AT91CAP9_BASE_SMC       0xffffe800
-#define AT91CAP9_BASE_DBGU      AT91_BASE_DBGU1
-#define AT91CAP9_BASE_PIOA      0xfffff200
-#define AT91CAP9_BASE_PIOB      0xfffff400
-#define AT91CAP9_BASE_PIOC      0xfffff600
-#define AT91CAP9_BASE_PIOD      0xfffff800
-#define AT91CAP9_BASE_RSTC      0xfffffd00
-#define AT91CAP9_BASE_SHDWC     0xfffffd10
-#define AT91CAP9_BASE_RTT       0xfffffd20
-#define AT91CAP9_BASE_PIT       0xfffffd30
-#define AT91CAP9_BASE_WDT       0xfffffd40
-
-#define AT91_USART0     AT91CAP9_BASE_US0
-#define AT91_USART1     AT91CAP9_BASE_US1
-#define AT91_USART2     AT91CAP9_BASE_US2
-
-
-/*
- * Internal Memory.
- */
-#define AT91CAP9_SRAM_BASE      0x00100000      /* Internal SRAM base address */
-#define AT91CAP9_SRAM_SIZE      (32 * SZ_1K)    /* Internal SRAM size (32Kb) */
-
-#define AT91CAP9_ROM_BASE       0x00400000      /* Internal ROM base address */
-#define AT91CAP9_ROM_SIZE       (32 * SZ_1K)    /* Internal ROM size (32Kb) */
-
-#define AT91CAP9_LCDC_BASE      0x00500000      /* LCD Controller */
-#define AT91CAP9_UDPHS_FIFO     0x00600000      /* USB High Speed Device Port */
-#define AT91CAP9_UHP_BASE       0x00700000      /* USB Host controller */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9_matrix.h b/arch/arm/mach-at91/include/mach/at91cap9_matrix.h
deleted file mode 100644
index 4b9d4aff4b4f..000000000000
--- a/arch/arm/mach-at91/include/mach/at91cap9_matrix.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91cap9_matrix.h
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2006 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91CAP9 datasheet revision B (Preliminary).
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91CAP9_MATRIX_H
-#define AT91CAP9_MATRIX_H
-
-#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6       (AT91_MATRIX + 0x18)    /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7       (AT91_MATRIX + 0x1C)    /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8       (AT91_MATRIX + 0x20)    /* Master Configuration Register 8 */
-#define AT91_MATRIX_MCFG9       (AT91_MATRIX + 0x24)    /* Master Configuration Register 9 */
-#define AT91_MATRIX_MCFG10      (AT91_MATRIX + 0x28)    /* Master Configuration Register 10 */
-#define AT91_MATRIX_MCFG11      (AT91_MATRIX + 0x2C)    /* Master Configuration Register 11 */
-#define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
-#define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
-#define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
-#define                 AT91_MATRIX_ULBT_FOUR           (2 << 0)
-#define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
-#define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
-
-#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5       (AT91_MATRIX + 0x54)    /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6       (AT91_MATRIX + 0x58)    /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7       (AT91_MATRIX + 0x5C)    /* Slave Configuration Register 7 */
-#define AT91_MATRIX_SCFG8       (AT91_MATRIX + 0x60)    /* Slave Configuration Register 8 */
-#define AT91_MATRIX_SCFG9       (AT91_MATRIX + 0x64)    /* Slave Configuration Register 9 */
-#define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
-#define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
-#define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
-#define                 AT91_MATRIX_DEFMSTR_TYPE_LAST   (1 << 16)
-#define                 AT91_MATRIX_DEFMSTR_TYPE_FIXED  (2 << 16)
-#define         AT91_MATRIX_FIXED_DEFMSTR       (0xf  << 18)    /* Fixed Index of Default Master */
-#define         AT91_MATRIX_ARBT                (3    << 24)    /* Arbitration Type */
-#define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
-#define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-
-#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0       (AT91_MATRIX + 0x84)    /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1       (AT91_MATRIX + 0x8C)    /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2       (AT91_MATRIX + 0x94)    /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3       (AT91_MATRIX + 0x9C)    /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4       (AT91_MATRIX + 0xA4)    /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5       (AT91_MATRIX + 0xA8)    /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5       (AT91_MATRIX + 0xAC)    /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6       (AT91_MATRIX + 0xB0)    /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6       (AT91_MATRIX + 0xB4)    /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7       (AT91_MATRIX + 0xB8)    /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7       (AT91_MATRIX + 0xBC)    /* Priority Register B for Slave 7 */
-#define AT91_MATRIX_PRAS8       (AT91_MATRIX + 0xC0)    /* Priority Register A for Slave 8 */
-#define AT91_MATRIX_PRBS8       (AT91_MATRIX + 0xC4)    /* Priority Register B for Slave 8 */
-#define AT91_MATRIX_PRAS9       (AT91_MATRIX + 0xC8)    /* Priority Register A for Slave 9 */
-#define AT91_MATRIX_PRBS9       (AT91_MATRIX + 0xCC)    /* Priority Register B for Slave 9 */
-#define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
-#define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
-#define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
-#define         AT91_MATRIX_M3PR                (3 << 12)       /* Master 3 Priority */
-#define         AT91_MATRIX_M4PR                (3 << 16)       /* Master 4 Priority */
-#define         AT91_MATRIX_M5PR                (3 << 20)       /* Master 5 Priority */
-#define         AT91_MATRIX_M6PR                (3 << 24)       /* Master 6 Priority */
-#define         AT91_MATRIX_M7PR                (3 << 28)       /* Master 7 Priority */
-#define         AT91_MATRIX_M8PR                (3 << 0)        /* Master 8 Priority (in Register B) */
-#define         AT91_MATRIX_M9PR                (3 << 4)        /* Master 9 Priority (in Register B) */
-#define         AT91_MATRIX_M10PR               (3 << 8)        /* Master 10 Priority (in Register B) */
-#define         AT91_MATRIX_M11PR               (3 << 12)       /* Master 11 Priority (in Register B) */
-
-#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
-#define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define         AT91_MATRIX_RCB2                (1 << 2)
-#define         AT91_MATRIX_RCB3                (1 << 3)
-#define         AT91_MATRIX_RCB4                (1 << 4)
-#define         AT91_MATRIX_RCB5                (1 << 5)
-#define         AT91_MATRIX_RCB6                (1 << 6)
-#define         AT91_MATRIX_RCB7                (1 << 7)
-#define         AT91_MATRIX_RCB8                (1 << 8)
-#define         AT91_MATRIX_RCB9                (1 << 9)
-#define         AT91_MATRIX_RCB10               (1 << 10)
-#define         AT91_MATRIX_RCB11               (1 << 11)
-
-#define AT91_MPBS0_SFR          (AT91_MATRIX + 0x114)   /* MPBlock Slave 0 Special Function Register */
-#define AT91_MPBS1_SFR          (AT91_MATRIX + 0x11C)   /* MPBlock Slave 1 Special Function Register */
-
-#define AT91_MATRIX_UDPHS       (AT91_MATRIX + 0x118)   /* USBHS Special Function Register [AT91CAP9 only] */
-#define         AT91_MATRIX_SELECT_UDPHS        (0 << 31)       /* select High Speed UDP */
-#define         AT91_MATRIX_SELECT_UDP          (1 << 31)       /* select standard UDP */
-#define         AT91_MATRIX_UDPHS_BYPASS_LOCK   (1 << 30)       /* bypass lock bit */
-
-#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x120)   /* EBI Chip Select Assignment Register */
-#define         AT91_MATRIX_EBI_CS1A            (1 << 1)        /* Chip Select 1 Assignment */
-#define                 AT91_MATRIX_EBI_CS1A_SMC                (0 << 1)
-#define                 AT91_MATRIX_EBI_CS1A_BCRAMC             (1 << 1)
-#define         AT91_MATRIX_EBI_CS3A            (1 << 3)        /* Chip Select 3 Assignment */
-#define                 AT91_MATRIX_EBI_CS3A_SMC                (0 << 3)
-#define                 AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA     (1 << 3)
-#define         AT91_MATRIX_EBI_CS4A            (1 << 4)        /* Chip Select 4 Assignment */
-#define                 AT91_MATRIX_EBI_CS4A_SMC                (0 << 4)
-#define                 AT91_MATRIX_EBI_CS4A_SMC_CF1            (1 << 4)
-#define         AT91_MATRIX_EBI_CS5A            (1 << 5)        /* Chip Select 5 Assignment */
-#define                 AT91_MATRIX_EBI_CS5A_SMC                (0 << 5)
-#define                 AT91_MATRIX_EBI_CS5A_SMC_CF2            (1 << 5)
-#define         AT91_MATRIX_EBI_DBPUC           (1 << 8)        /* Data Bus Pull-up Configuration */
-#define         AT91_MATRIX_EBI_DQSPDC          (1 << 9)        /* Data Qualifier Strobe Pull-Down Configuration */
-#define         AT91_MATRIX_EBI_VDDIOMSEL       (1 << 16)       /* Memory voltage selection */
-#define                 AT91_MATRIX_EBI_VDDIOMSEL_1_8V          (0 << 16)
-#define                 AT91_MATRIX_EBI_VDDIOMSEL_3_3V          (1 << 16)
-
-#define AT91_MPBS2_SFR          (AT91_MATRIX + 0x12C)   /* MPBlock Slave 2 Special Function Register */
-#define AT91_MPBS3_SFR          (AT91_MATRIX + 0x130)   /* MPBlock Slave 3 Special Function Register */
-#define AT91_APB_SFR            (AT91_MATRIX + 0x134)   /* APB Bridge Special Function Register */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
index e2f8da8ce5bc..5d4a9f846584 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
@@ -59,7 +59,6 @@
 #define         AT91_DDRSDRC_TRP        (0xf << 16)             /* Row precharge delay */
 #define         AT91_DDRSDRC_TRRD       (0xf << 20)             /* Active BankA to BankB */
 #define         AT91_DDRSDRC_TWTR       (0x7 << 24)             /* Internal Write to Read delay */
-#define         AT91CAP9_DDRSDRC_TWTR   (1   << 24)             /* Internal Write to Read delay */
 #define         AT91_DDRSDRC_RED_WRRD   (0x1 << 27)             /* Reduce Write to Read Delay [SAM9 Only] */
 #define         AT91_DDRSDRC_TMRD       (0xf << 28)             /* Load mode to active/refresh delay */
 
@@ -76,7 +75,6 @@
 #define         AT91_DDRSDRC_TRTP       (0x7  << 12)            /* Read to Precharge delay */
 
 #define AT91_DDRSDRC_LPR        0x1C    /* Low Power Register */
-#define AT91CAP9_DDRSDRC_LPR    0x18    /* Low Power Register */
 #define         AT91_DDRSDRC_LPCB       (3 << 0)                /* Low-power Configurations */
 #define                 AT91_DDRSDRC_LPCB_DISABLE               0
 #define                 AT91_DDRSDRC_LPCB_SELF_REFRESH          1
@@ -94,11 +92,9 @@
 #define         AT91_DDRSDRC_UPD_MR     (3 << 20)        /* Update load mode register and extended mode register */
 
 #define AT91_DDRSDRC_MDR        0x20    /* Memory Device Register */
-#define AT91CAP9_DDRSDRC_MDR    0x1C    /* Memory Device Register */
 #define         AT91_DDRSDRC_MD         (3 << 0)                /* Memory Device Type */
 #define                 AT91_DDRSDRC_MD_SDR             0
 #define                 AT91_DDRSDRC_MD_LOW_POWER_SDR   1
-#define                 AT91CAP9_DDRSDRC_MD_DDR         2
 #define                 AT91_DDRSDRC_MD_LOW_POWER_DDR   3
 #define                 AT91_DDRSDRC_MD_DDR2            6       /* [SAM9 Only] */
 #define         AT91_DDRSDRC_DBW        (1 << 4)                /* Data Bus Width */
@@ -106,16 +102,10 @@
 #define                 AT91_DDRSDRC_DBW_16BITS         (1 <<  4)
 
 #define AT91_DDRSDRC_DLL        0x24    /* DLL Information Register */
-#define AT91CAP9_DDRSDRC_DLL    0x20    /* DLL Information Register */
 #define         AT91_DDRSDRC_MDINC      (1 << 0)                /* Master Delay increment */
 #define         AT91_DDRSDRC_MDDEC      (1 << 1)                /* Master Delay decrement */
 #define         AT91_DDRSDRC_MDOVF      (1 << 2)                /* Master Delay Overflow */
-#define         AT91CAP9_DDRSDRC_SDCOVF (1 << 3)                /* Slave Delay Correction Overflow */
-#define         AT91CAP9_DDRSDRC_SDCUDF (1 << 4)                /* Slave Delay Correction Underflow */
-#define         AT91CAP9_DDRSDRC_SDERF  (1 << 5)                /* Slave Delay Correction error */
 #define         AT91_DDRSDRC_MDVAL      (0xff <<  8)            /* Master Delay value */
-#define         AT91CAP9_DDRSDRC_SDVAL  (0xff << 16)            /* Slave Delay value */
-#define         AT91CAP9_DDRSDRC_SDCVAL (0xff << 24)            /* Slave Delay Correction value */
 
 #define AT91_DDRSDRC_HS         0x2C    /* High Speed Register [SAM9 Only] */
 #define         AT91_DDRSDRC_DIS_ATCP_RD        (1 << 2)        /* Anticip read access is disabled */
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 3b33f07b1e11..dc8d6d4f17cf 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -107,6 +107,8 @@ struct atmel_nand_data {
         u8              ale;            /* address line number connected to ALE */
         u8              cle;            /* address line number connected to CLE */
         u8              bus_width_16;   /* buswidth is 16 bit */
+        u8              correction_cap; /* PMECC correction capability */
+        u16             sector_size;    /* Sector size for PMECC */
         struct mtd_partition *parts;
         unsigned int    num_parts;
 };
@@ -179,7 +181,9 @@ extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data);
 extern void __init at91_add_device_ac97(struct ac97c_platform_data *data);
 
  /* ISI */
-extern void __init at91_add_device_isi(void);
+struct isi_platform_data;
+extern void __init at91_add_device_isi(struct isi_platform_data *data,
+                bool use_pck_as_mck);
 
  /* Touchscreen Controller */
 struct at91_tsadcc_data {
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index f6ce936dba2b..0118c3338552 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -25,7 +25,6 @@
 #define ARCH_ID_AT91SAM9G45MRL  0x819b05a2      /* aka 9G45-ES2 & non ES lots */
 #define ARCH_ID_AT91SAM9G45ES   0x819b05a1      /* 9G45-ES (Engineering Sample) */
 #define ARCH_ID_AT91SAM9X5      0x819a05a0
-#define ARCH_ID_AT91CAP9        0x039A03A0
 
 #define ARCH_ID_AT91SAM9XE128   0x329973a0
 #define ARCH_ID_AT91SAM9XE256   0x329a93a0
@@ -51,10 +50,6 @@
 #define ARCH_FAMILY_AT91SAM9    0x01900000
 #define ARCH_FAMILY_AT91SAM9XE  0x02900000
 
-/* PMC revision */
-#define ARCH_REVISION_CAP9_B    0x399
-#define ARCH_REVISION_CAP9_C    0x601
-
 /* RM9200 type */
 #define ARCH_REVISON_9200_BGA   (0 << 0)
 #define ARCH_REVISON_9200_PQFP  (1 << 0)
@@ -63,9 +58,6 @@ enum at91_soc_type {
         /* 920T */
         AT91_SOC_RM9200,
 
-        /* CAP */
-        AT91_SOC_CAP9,
-
         /* SAM92xx */
         AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263,
 
@@ -86,9 +78,6 @@ enum at91_soc_subtype {
         /* RM9200 */
         AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP,
 
-        /* CAP9 */
-        AT91_SOC_CAP9_REV_B, AT91_SOC_CAP9_REV_C,
-
         /* SAM9260 */
         AT91_SOC_SAM9XE,
 
@@ -195,16 +184,6 @@ static inline int at91_soc_is_detected(void)
 #define cpu_is_at91sam9x25()    (0)
 #endif
 
-#ifdef CONFIG_ARCH_AT91CAP9
-#define cpu_is_at91cap9()       (at91_soc_initdata.type == AT91_SOC_CAP9)
-#define cpu_is_at91cap9_revB()  (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_B)
-#define cpu_is_at91cap9_revC()  (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_C)
-#else
-#define cpu_is_at91cap9()       (0)
-#define cpu_is_at91cap9_revB()  (0)
-#define cpu_is_at91cap9_revC()  (0)
-#endif
-
 /*
  * Since this is ARM, we will never run on any AVR32 CPU. But these
  * definitions may reduce clutter in common drivers.
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 2d0e4e998566..c213f28628c0 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -19,7 +19,7 @@
 /* DBGU base */
 /* rm9200, 9260/9g20, 9261/9g10, 9rl */
 #define AT91_BASE_DBGU0 0xfffff200
-/* 9263, 9g45, cap9 */
+/* 9263, 9g45 */
 #define AT91_BASE_DBGU1 0xffffee00
 
 #if defined(CONFIG_ARCH_AT91RM9200)
@@ -34,8 +34,6 @@
 #include <mach/at91sam9rl.h>
 #elif defined(CONFIG_ARCH_AT91SAM9G45)
 #include <mach/at91sam9g45.h>
-#elif defined(CONFIG_ARCH_AT91CAP9)
-#include <mach/at91cap9.h>
 #elif defined(CONFIG_ARCH_AT91X40)
 #include <mach/at91x40.h>
 #else
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 1606379ac284..87be5aa18753 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -150,11 +150,6 @@ static int at91_pm_verify_clocks(void)
                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
                         return 0;
                 }
-        } else if (cpu_is_at91cap9()) {
-                if ((scsr & AT91CAP9_PMC_UHP) != 0) {
-                        pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
-                        return 0;
-                }
         }
 
 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 7eb40d24242f..218d816427c0 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -24,24 +24,6 @@ static inline u32 sdram_selfrefresh_enable(void)
 #define wait_for_interrupt_enable()             asm volatile ("mcr p15, 0, %0, c7, c0, 4" \
                                                                 : : "r" (0))
 
-#elif defined(CONFIG_ARCH_AT91CAP9)
-#include <mach/at91sam9_ddrsdr.h>
-
-
-static inline u32 sdram_selfrefresh_enable(void)
-{
-        u32 saved_lpr, lpr;
-
-        saved_lpr = at91_ramc_read(0, AT91CAP9_DDRSDRC_LPR);
-
-        lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
-        at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
-        return saved_lpr;
-}
-
-#define sdram_selfrefresh_disable(saved_lpr)    at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, saved_lpr)
-#define wait_for_interrupt_enable()             cpu_do_idle()
-
 #elif defined(CONFIG_ARCH_AT91SAM9G45)
 #include <mach/at91sam9_ddrsdr.h>
 
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 92dfb8461392..f8539a8bcd6c 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -18,8 +18,7 @@
 
 #if defined(CONFIG_ARCH_AT91RM9200)
 #include <mach/at91rm9200_mc.h>
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
 #include <mach/at91sam9_ddrsdr.h>
 #else
 #include <mach/at91sam9_sdramc.h>
@@ -130,8 +129,7 @@ ENTRY(at91_slow_clock)
         /* Put SDRAM in self-refresh mode */
         mov     r3, #1
         str     r3, [r2, #AT91_SDRAMC_SRR]
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
 
         /* prepare for DDRAM self-refresh mode */
         ldr     r3, [r2, #AT91_DDRSDRC_LPR]
@@ -263,8 +261,7 @@ ENTRY(at91_slow_clock)
 
 #ifdef CONFIG_ARCH_AT91RM9200
         /* Do nothing - self-refresh is automatically disabled. */
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
         /* Restore LPR on AT91 with DDRAM */
         ldr     r3, .saved_sam9_lpr
         str     r3, [r2, #AT91_DDRSDRC_LPR]
@@ -305,8 +302,7 @@ ENTRY(at91_slow_clock)
 #ifdef CONFIG_ARCH_AT91RM9200
 .at91_va_base_sdramc:
         .word AT91_VA_BASE_SYS
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
 .at91_va_base_sdramc:
         .word AT91_VA_BASE_SYS + AT91_DDRSDRC0
 #else
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 69d3fc4c46f3..620c67e8f814 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -86,20 +86,6 @@ static void __init soc_detect(u32 dbgu_base)
         socid = cidr & ~AT91_CIDR_VERSION;
 
         switch (socid) {
-        case ARCH_ID_AT91CAP9: {
-#ifdef CONFIG_AT91_PMC_UNIT
-                u32 pmc_ver = at91_sys_read(AT91_PMC_VER);
-
-                if (pmc_ver == ARCH_REVISION_CAP9_B)
-                        at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_B;
-                else if (pmc_ver == ARCH_REVISION_CAP9_C)
-                        at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_C;
-#endif
-                at91_soc_initdata.type = AT91_SOC_CAP9;
-                at91_boot_soc = at91cap9_soc;
-                break;
-        }
-
         case ARCH_ID_AT91RM9200:
                 at91_soc_initdata.type = AT91_SOC_RM9200;
                 at91_boot_soc = at91rm9200_soc;
@@ -200,7 +186,6 @@ static void __init soc_detect(u32 dbgu_base)
 
 static const char *soc_name[] = {
         [AT91_SOC_RM9200]       = "at91rm9200",
-        [AT91_SOC_CAP9]         = "at91cap9",
         [AT91_SOC_SAM9260]      = "at91sam9260",
         [AT91_SOC_SAM9261]      = "at91sam9261",
         [AT91_SOC_SAM9263]      = "at91sam9263",
@@ -221,8 +206,6 @@ EXPORT_SYMBOL(at91_get_soc_type);
 static const char *soc_subtype_name[] = {
         [AT91_SOC_RM9200_BGA]   = "at91rm9200 BGA",
         [AT91_SOC_RM9200_PQFP]  = "at91rm9200 PQFP",
-        [AT91_SOC_CAP9_REV_B]   = "at91cap9 revB",
-        [AT91_SOC_CAP9_REV_C]   = "at91cap9 revC",
         [AT91_SOC_SAM9XE]       = "at91sam9xe",
         [AT91_SOC_SAM9G45ES]    = "at91sam9g45es",
         [AT91_SOC_SAM9M10]      = "at91sam9m10",
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 4588ae6f7acd..5db4aa45404a 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -13,7 +13,6 @@ struct at91_init_soc {
 };
 
 extern struct at91_init_soc at91_boot_soc;
-extern struct at91_init_soc at91cap9_soc;
 extern struct at91_init_soc at91rm9200_soc;
 extern struct at91_init_soc at91sam9260_soc;
 extern struct at91_init_soc at91sam9261_soc;
@@ -27,10 +26,6 @@ static inline int at91_soc_is_enabled(void)
         return at91_boot_soc.init != NULL;
 }
 
-#if !defined(CONFIG_ARCH_AT91CAP9)
-#define at91cap9_soc    at91_boot_soc
-#endif
-
 #if !defined(CONFIG_ARCH_AT91RM9200)
 #define at91rm9200_soc  at91_boot_soc
 #endif
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 34e819068fa4..f494db872c67 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -394,7 +394,7 @@ void __init exynos4_init_irq(void)
         gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
 
         if (!of_have_populated_dt())
-                gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
+                gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
 #ifdef CONFIG_OF
         else
                 of_irq_init(exynos4_dt_irq_match);
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 435261f83f46..685372f38bf1 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -115,7 +115,7 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
 };
 
 static struct regulator_consumer_supply emmc_supplies[] = {
-        REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
+        REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
         REGULATOR_SUPPLY("vmmc", "dw_mmc"),
 };
 
@@ -413,7 +413,7 @@ static struct regulator_consumer_supply __initdata max8997_ldo12_[] = {
         REGULATOR_SUPPLY("vddio", "6-003c"), /* HDC802 */
 };
 static struct regulator_consumer_supply __initdata max8997_ldo13_[] = {
-        REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"), /* TFLASH */
+        REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.2"), /* TFLASH */
 };
 static struct regulator_consumer_supply __initdata max8997_ldo14_[] = {
         REGULATOR_SUPPLY("inmotor", "max8997-haptic"),
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index e00d8e26d525..44553933b144 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -741,7 +741,7 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
 };
 
 static struct regulator_consumer_supply mmc0_supplies[] = {
-        REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
+        REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
 };
 
 static struct regulator_init_data mmc0_fixed_voltage_init_data = {
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 4defb97bbfc8..f7da8724965a 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -304,6 +304,7 @@ config MACH_MX27_3DS
         select IMX_HAVE_PLATFORM_IMX_I2C
         select IMX_HAVE_PLATFORM_IMX_KEYPAD
         select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_MX2_CAMERA
         select IMX_HAVE_PLATFORM_MXC_EHCI
         select IMX_HAVE_PLATFORM_MXC_MMC
         select IMX_HAVE_PLATFORM_SPI_IMX
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 2d88f8b9a454..111c328f5420 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -329,6 +329,12 @@
 #define BM_CLPCR_MASK_SCU_IDLE          (0x1 << 26)
 #define BM_CLPCR_MASK_L2CC_IDLE         (0x1 << 27)
 
+#define BP_CCOSR_CKO1_EN                7
+#define BP_CCOSR_CKO1_PODF              4
+#define BM_CCOSR_CKO1_PODF              (0x7 << 4)
+#define BP_CCOSR_CKO1_SEL               0
+#define BM_CCOSR_CKO1_SEL               (0xf << 0)
+
 #define FREQ_480M       480000000
 #define FREQ_528M       528000000
 #define FREQ_594M       594000000
@@ -393,6 +399,7 @@ static struct clk ipu1_di1_clk;
 static struct clk ipu2_di0_clk;
 static struct clk ipu2_di1_clk;
 static struct clk enfc_clk;
+static struct clk cko1_clk;
 static struct clk dummy_clk = {};
 
 static unsigned long external_high_reference;
@@ -938,6 +945,24 @@ static void _clk_disable(struct clk *clk)
         writel_relaxed(reg, clk->enable_reg);
 }
 
+static int _clk_enable_1b(struct clk *clk)
+{
+        u32 reg;
+        reg = readl_relaxed(clk->enable_reg);
+        reg |= 0x1 << clk->enable_shift;
+        writel_relaxed(reg, clk->enable_reg);
+
+        return 0;
+}
+
+static void _clk_disable_1b(struct clk *clk)
+{
+        u32 reg;
+        reg = readl_relaxed(clk->enable_reg);
+        reg &= ~(0x1 << clk->enable_shift);
+        writel_relaxed(reg, clk->enable_reg);
+}
+
 struct divider {
         struct clk *clk;
         void __iomem *reg;
@@ -983,6 +1008,7 @@ DEF_CLK_DIV1(ipu2_di0_pre_div,	&ipu2_di0_pre_clk,	CSCDR2,	IPU2_DI0_PRE);
 DEF_CLK_DIV1(ipu2_di1_pre_div,  &ipu2_di1_pre_clk,      CSCDR2, IPU2_DI1_PRE);
 DEF_CLK_DIV1(ipu1_div,          &ipu1_clk,              CSCDR3, IPU1_HSP);
 DEF_CLK_DIV1(ipu2_div,          &ipu2_clk,              CSCDR3, IPU2_HSP);
+DEF_CLK_DIV1(cko1_div,          &cko1_clk,              CCOSR, CKO1);
 
 #define DEF_CLK_DIV2(d, c, r, b)                                \
         static struct divider d = {                             \
@@ -1038,6 +1064,7 @@ static struct divider *dividers[] = {
         &enfc_div,
         &spdif_div,
         &asrc_serial_div,
+        &cko1_div,
 };
 
 static unsigned long ldb_di_clk_get_rate(struct clk *clk)
@@ -1625,6 +1652,32 @@ DEF_IPU_DI_MUX(CSCDR2, 2, 1);
 DEF_IPU_MUX(1);
 DEF_IPU_MUX(2);
 
+static struct multiplexer cko1_mux = {
+        .clk = &cko1_clk,
+        .reg = CCOSR,
+        .bp = BP_CCOSR_CKO1_SEL,
+        .bm = BM_CCOSR_CKO1_SEL,
+        .parents = {
+                &pll3_usb_otg,
+                &pll2_bus,
+                &pll1_sys,
+                &pll5_video,
+                &dummy_clk,
+                &axi_clk,
+                &enfc_clk,
+                &ipu1_di0_clk,
+                &ipu1_di1_clk,
+                &ipu2_di0_clk,
+                &ipu2_di1_clk,
+                &ahb_clk,
+                &ipg_clk,
+                &ipg_perclk,
+                &ckil_clk,
+                &pll4_audio,
+                NULL
+        },
+};
+
 static struct multiplexer *multiplexers[] = {
         &axi_mux,
         &periph_mux,
@@ -1667,6 +1720,7 @@ static struct multiplexer *multiplexers[] = {
         &ipu2_di1_mux,
         &ipu1_mux,
         &ipu2_mux,
+        &cko1_mux,
 };
 
 static int _clk_set_parent(struct clk *clk, struct clk *parent)
@@ -1690,7 +1744,7 @@ static int _clk_set_parent(struct clk *clk, struct clk *parent)
                         break;
                 i++;
         }
-        if (!m->parents[i])
+        if (!m->parents[i] || m->parents[i] == &dummy_clk)
                 return -EINVAL;
 
         val = readl_relaxed(m->reg);
@@ -1745,6 +1799,20 @@ DEF_NG_CLK(asrc_serial_clk,	&pll3_usb_otg);
                 .secondary      = s,                    \
         }
 
+#define DEF_CLK_1B(name, er, es, p, s)                  \
+        static struct clk name = {                      \
+                .enable_reg     = er,                   \
+                .enable_shift   = es,                   \
+                .enable         = _clk_enable_1b,       \
+                .disable        = _clk_disable_1b,      \
+                .get_rate       = _clk_get_rate,        \
+                .set_rate       = _clk_set_rate,        \
+                .round_rate     = _clk_round_rate,      \
+                .set_parent     = _clk_set_parent,      \
+                .parent         = p,                    \
+                .secondary      = s,                    \
+        }
+
 DEF_CLK(aips_tz1_clk,     CCGR0, CG0,  &ahb_clk,          NULL);
 DEF_CLK(aips_tz2_clk,     CCGR0, CG1,  &ahb_clk,          NULL);
 DEF_CLK(apbh_dma_clk,     CCGR0, CG2,  &ahb_clk,          NULL);
@@ -1811,6 +1879,7 @@ DEF_CLK(usdhc4_clk,	  CCGR6, CG4,  &pll2_pfd_400m,	  NULL);
 DEF_CLK(emi_slow_clk,     CCGR6, CG5,  &axi_clk,          NULL);
 DEF_CLK(vdo_axi_clk,      CCGR6, CG6,  &axi_clk,          NULL);
 DEF_CLK(vpu_clk,          CCGR6, CG7,  &axi_clk,          NULL);
+DEF_CLK_1B(cko1_clk,      CCOSR, BP_CCOSR_CKO1_EN, &pll2_bus, NULL);
 
 static int pcie_clk_enable(struct clk *clk)
 {
@@ -1922,6 +1991,7 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk),
         _REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk),
         _REGISTER_CLOCK(NULL, "sata_clk", sata_clk),
+        _REGISTER_CLOCK(NULL, "cko1_clk", cko1_clk),
 };
 
 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
@@ -2029,6 +2099,8 @@ int __init mx6q_clocks_init(void)
         clk_set_rate(&usdhc3_clk, 49500000);
         clk_set_rate(&usdhc4_clk, 49500000);
 
+        clk_set_parent(&cko1_clk, &ahb_clk);
+
         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
         base = of_iomap(np, 0);
         WARN_ON(!base);
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index e6bad17b908c..1e03ef42faa0 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -47,7 +47,7 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
 static int __init imx51_tzic_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
-        irq_domain_add_simple(np, 0);
+        irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
         return 0;
 }
 
@@ -57,7 +57,7 @@ static int __init imx51_gpio_add_irq_domain(struct device_node *np,
         static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 
         gpio_irq_base -= 32;
-        irq_domain_add_simple(np, gpio_irq_base);
+        irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
 
         return 0;
 }
diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
index 05ebb3e68679..fd5be0f20fbb 100644
--- a/arch/arm/mach-imx/imx53-dt.c
+++ b/arch/arm/mach-imx/imx53-dt.c
@@ -51,7 +51,7 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
 static int __init imx53_tzic_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
-        irq_domain_add_simple(np, 0);
+        irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
         return 0;
 }
 
@@ -61,7 +61,7 @@ static int __init imx53_gpio_add_irq_domain(struct device_node *np,
         static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 
         gpio_irq_base -= 32;
-        irq_domain_add_simple(np, gpio_irq_base);
+        irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
 
         return 0;
 }
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c
index d4ab6f29a766..0213f8dcee81 100644
--- a/arch/arm/mach-imx/lluart.c
+++ b/arch/arm/mach-imx/lluart.c
@@ -17,7 +17,7 @@
 #include <mach/hardware.h>
 
 static struct map_desc imx_lluart_desc = {
-#ifdef CONFIG_DEBUG_IMX6Q_UART
+#ifdef CONFIG_DEBUG_IMX6Q_UART4
         .virtual        = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR),
         .pfn            = __phys_to_pfn(MX6Q_UART4_BASE_ADDR),
         .length         = MX6Q_UART4_SIZE,
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index c25728106917..6075d4d62dd6 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -97,7 +97,8 @@ static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
         static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 
         gpio_irq_base -= 32;
-        irq_domain_add_simple(np, gpio_irq_base);
+        irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
+                              NULL);
 
         return 0;
 }
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index 8d9f95514b1f..e432d4acee1f 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -37,8 +37,8 @@
 #define MX21ADS_REG_ADDR(offset)    (void __force __iomem *) \
                 (MX21ADS_MMIO_BASE_ADDR + (offset))
 
+#define MX21ADS_CS8900A_MMIO_SIZE   0x200000
 #define MX21ADS_CS8900A_IRQ         IRQ_GPIOE(11)
-#define MX21ADS_CS8900A_IOBASE_REG  MX21ADS_REG_ADDR(0x000000)
 #define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000)
 #define MX21ADS_VERSION_REG         MX21ADS_REG_ADDR(0x400000)
 #define MX21ADS_IO_REG              MX21ADS_REG_ADDR(0x800000)
@@ -159,6 +159,18 @@ static struct platform_device mx21ads_nor_mtd_device = {
         .resource = &mx21ads_flash_resource,
 };
 
+static const struct resource mx21ads_cs8900_resources[] __initconst = {
+        DEFINE_RES_MEM(MX21_CS1_BASE_ADDR, MX21ADS_CS8900A_MMIO_SIZE),
+        DEFINE_RES_IRQ(MX21ADS_CS8900A_IRQ),
+};
+
+static const struct platform_device_info mx21ads_cs8900_devinfo __initconst = {
+        .name = "cs89x0",
+        .id = 0,
+        .res = mx21ads_cs8900_resources,
+        .num_res = ARRAY_SIZE(mx21ads_cs8900_resources),
+};
+
 static const struct imxuart_platform_data uart_pdata_rts __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
 };
@@ -292,6 +304,8 @@ static void __init mx21ads_board_init(void)
         imx21_add_mxc_nand(&mx21ads_nand_board_info);
 
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+        platform_device_register_full(
+                        (struct platform_device_info *)&mx21ads_cs8900_devinfo);
 }
 
 static void __init mx21ads_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 18f35816706a..c6d385c52257 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -31,6 +31,8 @@
 #include <linux/regulator/machine.h>
 #include <linux/spi/l4f00242t03.h>
 
+#include <media/soc_camera.h>
+
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
@@ -52,6 +54,8 @@
 #define SD1_CD                  IMX_GPIO_NR(2, 26)
 #define LCD_RESET               IMX_GPIO_NR(1, 3)
 #define LCD_ENABLE              IMX_GPIO_NR(1, 31)
+#define CSI_PWRDWN              IMX_GPIO_NR(4, 19)
+#define CSI_RESET               IMX_GPIO_NR(3, 6)
 
 static const int mx27pdk_pins[] __initconst = {
         /* UART1 */
@@ -141,6 +145,26 @@ static const int mx27pdk_pins[] __initconst = {
         PA30_PF_CONTRAST,
         LCD_ENABLE | GPIO_GPIO | GPIO_OUT,
         LCD_RESET | GPIO_GPIO | GPIO_OUT,
+        /* CSI */
+        PB10_PF_CSI_D0,
+        PB11_PF_CSI_D1,
+        PB12_PF_CSI_D2,
+        PB13_PF_CSI_D3,
+        PB14_PF_CSI_D4,
+        PB15_PF_CSI_MCLK,
+        PB16_PF_CSI_PIXCLK,
+        PB17_PF_CSI_D5,
+        PB18_PF_CSI_D6,
+        PB19_PF_CSI_D7,
+        PB20_PF_CSI_VSYNC,
+        PB21_PF_CSI_HSYNC,
+        CSI_PWRDWN | GPIO_GPIO | GPIO_OUT,
+        CSI_RESET | GPIO_GPIO | GPIO_OUT,
+};
+
+static struct gpio mx27_3ds_camera_gpios[] = {
+        { CSI_PWRDWN, GPIOF_OUT_INIT_HIGH, "camera-power" },
+        { CSI_RESET, GPIOF_OUT_INIT_HIGH, "camera-reset" },
 };
 
 static const struct imxuart_platform_data uart_pdata __initconst = {
@@ -242,6 +266,7 @@ static struct regulator_init_data gpo_init = {
 
 static struct regulator_consumer_supply vmmc1_consumers[] = {
         REGULATOR_SUPPLY("vcore", "spi0.0"),
+        REGULATOR_SUPPLY("cmos_2v8", "soc-camera-pdrv.0"),
 };
 
 static struct regulator_init_data vmmc1_init = {
@@ -270,6 +295,22 @@ static struct regulator_init_data vgen_init = {
         .consumer_supplies = vgen_consumers,
 };
 
+static struct regulator_consumer_supply vvib_consumers[] = {
+        REGULATOR_SUPPLY("cmos_vcore", "soc-camera-pdrv.0"),
+};
+
+static struct regulator_init_data vvib_init = {
+        .constraints = {
+                .min_uV = 1300000,
+                .max_uV = 1300000,
+                .apply_uV = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                  REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies = ARRAY_SIZE(vvib_consumers),
+        .consumer_supplies = vvib_consumers,
+};
+
 static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
         {
                 .id = MC13783_REG_VMMC1,
@@ -283,6 +324,9 @@ static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
         }, {
                 .id = MC13783_REG_GPO3, /* Turn on 3.3V */
                 .init_data = &gpo_init,
+        }, {
+                .id = MC13783_REG_VVIB,  /* Power OV2640 */
+                .init_data = &vvib_init,
         },
 };
 
@@ -311,6 +355,51 @@ static const struct spi_imx_master spi2_pdata __initconst = {
         .num_chipselect = ARRAY_SIZE(spi2_chipselect),
 };
 
+static int mx27_3ds_camera_power(struct device *dev, int on)
+{
+        /* enable or disable the camera */
+        pr_debug("%s: %s the camera\n", __func__, on ? "ENABLE" : "DISABLE");
+        gpio_set_value(CSI_PWRDWN, on ? 0 : 1);
+
+        if (!on)
+                goto out;
+
+        /* If enabled, give a reset impulse */
+        gpio_set_value(CSI_RESET, 0);
+        msleep(20);
+        gpio_set_value(CSI_RESET, 1);
+        msleep(100);
+
+out:
+        return 0;
+}
+
+static struct i2c_board_info mx27_3ds_i2c_camera = {
+        I2C_BOARD_INFO("ov2640", 0x30),
+};
+
+static struct regulator_bulk_data mx27_3ds_camera_regs[] = {
+        { .supply = "cmos_vcore" },
+        { .supply = "cmos_2v8" },
+};
+
+static struct soc_camera_link iclink_ov2640 = {
+        .bus_id         = 0,
+        .board_info     = &mx27_3ds_i2c_camera,
+        .i2c_adapter_id = 0,
+        .power          = mx27_3ds_camera_power,
+        .regulators     = mx27_3ds_camera_regs,
+        .num_regulators = ARRAY_SIZE(mx27_3ds_camera_regs),
+};
+
+static struct platform_device mx27_3ds_ov2640 = {
+        .name   = "soc-camera-pdrv",
+        .id     = 0,
+        .dev    = {
+                .platform_data = &iclink_ov2640,
+        },
+};
+
 static struct imx_fb_videomode mx27_3ds_modes[] = {
         {       /* 480x640 @ 60 Hz */
                 .mode = {
@@ -367,12 +456,21 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
         },
 };
 
+static struct platform_device *devices[] __initdata = {
+        &mx27_3ds_ov2640,
+};
+
+static const struct mx2_camera_platform_data mx27_3ds_cam_pdata __initconst = {
+        .clk = 26000000,
+};
+
 static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = {
         .bitrate = 100000,
 };
 
 static void __init mx27pdk_init(void)
 {
+        int ret;
         imx27_soc_init();
 
         mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
@@ -404,7 +502,17 @@ static void __init mx27pdk_init(void)
         if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT))
                 pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
         imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
+        platform_add_devices(devices, ARRAY_SIZE(devices));
         imx27_add_imx_fb(&mx27_3ds_fb_data);
+
+        ret = gpio_request_array(mx27_3ds_camera_gpios,
+                                 ARRAY_SIZE(mx27_3ds_camera_gpios));
+        if (ret) {
+                pr_err("Failed to request camera gpios");
+                iclink_ov2640.power = NULL;
+        }
+
+        imx27_add_mx2_camera(&mx27_3ds_cam_pdata);
 }
 
 static void __init mx27pdk_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index 4917aab0e253..4518e5448227 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -28,7 +28,6 @@
 #include <asm/memory.h>
 #include <asm/mach/map.h>
 #include <mach/common.h>
-#include <mach/board-mx31ads.h>
 #include <mach/iomux-mx3.h>
 
 #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
@@ -39,6 +38,9 @@
 
 #include "devices-imx31.h"
 
+/* Base address of PBC controller */
+#define PBC_BASE_ADDRESS        MX31_CS4_BASE_ADDR_VIRT
+
 /* PBC Board interrupt status register */
 #define PBC_INTSTATUS           0x000016
 
@@ -62,6 +64,7 @@
 #define PBC_INTMASK_CLEAR_REG   (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS)
 #define EXPIO_PARENT_INT        IOMUX_TO_IRQ(MX31_PIN_GPIO1_4)
 
+#define MXC_EXP_IO_BASE         MXC_BOARD_IRQ_START
 #define MXC_IRQ_TO_EXPIO(irq)   ((irq) - MXC_EXP_IO_BASE)
 
 #define EXPIO_INT_XUART_INTA    (MXC_EXP_IO_BASE + 10)
@@ -69,6 +72,10 @@
 
 #define MXC_MAX_EXP_IO_LINES    16
 
+/* CS8900 */
+#define EXPIO_INT_ENET_INT      (MXC_EXP_IO_BASE + 8)
+#define CS4_CS8900_MMIO_START   0x20000
+
 /*
  * The serial port definition structure.
  */
@@ -101,11 +108,29 @@ static struct platform_device serial_device = {
         },
 };
 
+static const struct resource mx31ads_cs8900_resources[] __initconst = {
+        DEFINE_RES_MEM(MX31_CS4_BASE_ADDR + CS4_CS8900_MMIO_START, SZ_64K),
+        DEFINE_RES_IRQ(EXPIO_INT_ENET_INT),
+};
+
+static const struct platform_device_info mx31ads_cs8900_devinfo __initconst = {
+        .name = "cs89x0",
+        .id = 0,
+        .res = mx31ads_cs8900_resources,
+        .num_res = ARRAY_SIZE(mx31ads_cs8900_resources),
+};
+
 static int __init mxc_init_extuart(void)
 {
         return platform_device_register(&serial_device);
 }
 
+static void __init mxc_init_ext_ethernet(void)
+{
+        platform_device_register_full(
+                (struct platform_device_info *)&mx31ads_cs8900_devinfo);
+}
+
 static const struct imxuart_platform_data uart_pdata __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
 };
@@ -492,12 +517,15 @@ static void __init mxc_init_audio(void)
         mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi");
 }
 
-/* static mappings */
+/*
+ * Static mappings, starting from the CS4 start address up to the start address
+ * of the CS8900.
+ */
 static struct map_desc mx31ads_io_desc[] __initdata = {
         {
                 .virtual        = MX31_CS4_BASE_ADDR_VIRT,
                 .pfn            = __phys_to_pfn(MX31_CS4_BASE_ADDR),
-                .length         = MX31_CS4_SIZE / 2,
+                .length         = CS4_CS8900_MMIO_START,
                 .type           = MT_DEVICE
         },
 };
@@ -522,6 +550,7 @@ static void __init mx31ads_init(void)
         mxc_init_imx_uart();
         mxc_init_i2c();
         mxc_init_audio();
+        mxc_init_ext_ethernet();
 }
 
 static void __init mx31ads_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index f225262b5c38..96e042d0c9a9 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -507,7 +507,7 @@ static void mx31moboard_poweroff(void)
         struct clk *clk = clk_get_sys("imx2-wdt.0", NULL);
 
         if (!IS_ERR(clk))
-                clk_enable(clk);
+                clk_prepare_enable(clk);
 
         mxc_iomux_mode(MX31_PIN_WATCHDOG_RST__WATCHDOG_RST);
 
diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c
index 6dc093448057..e26a9cb05ed8 100644
--- a/arch/arm/mach-imx/pm-imx5.c
+++ b/arch/arm/mach-imx/pm-imx5.c
@@ -89,7 +89,7 @@ void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
 
 static int mx5_suspend_prepare(void)
 {
-        return clk_enable(gpc_dvfs_clk);
+        return clk_prepare_enable(gpc_dvfs_clk);
 }
 
 static int mx5_suspend_enter(suspend_state_t state)
@@ -119,7 +119,7 @@ static int mx5_suspend_enter(suspend_state_t state)
 
 static void mx5_suspend_finish(void)
 {
-        clk_disable(gpc_dvfs_clk);
+        clk_disable_unprepare(gpc_dvfs_clk);
 }
 
 static int mx5_pm_valid(suspend_state_t state)
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index 1e027514096d..473015ac07bd 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -719,6 +719,41 @@ static struct clk clk_tsc = {
         .get_rate       = local_return_parent_rate,
 };
 
+static int adc_onoff_enable(struct clk *clk, int enable)
+{
+        u32 tmp;
+        u32 divider;
+
+        /* Use PERIPH_CLOCK */
+        tmp = __raw_readl(LPC32XX_CLKPWR_ADC_CLK_CTRL_1);
+        tmp |= LPC32XX_CLKPWR_ADCCTRL1_PCLK_SEL;
+        /*
+         * Set clock divider so that we have equal to or less than
+         * 4.5MHz clock at ADC
+         */
+        divider = clk->get_rate(clk) / 4500000 + 1;
+        tmp |= divider;
+        __raw_writel(tmp, LPC32XX_CLKPWR_ADC_CLK_CTRL_1);
+
+        /* synchronize rate of this clock w/ actual HW setting */
+        clk->rate = clk->get_rate(clk->parent) / divider;
+
+        if (enable == 0)
+                __raw_writel(0, clk->enable_reg);
+        else
+                __raw_writel(clk->enable_mask, clk->enable_reg);
+
+        return 0;
+}
+
+static struct clk clk_adc = {
+        .parent         = &clk_pclk,
+        .enable         = adc_onoff_enable,
+        .enable_reg     = LPC32XX_CLKPWR_ADC_CLK_CTRL,
+        .enable_mask    = LPC32XX_CLKPWR_ADC32CLKCTRL_CLK_EN,
+        .get_rate       = local_return_parent_rate,
+};
+
 static int mmc_onoff_enable(struct clk *clk, int enable)
 {
         u32 tmp;
@@ -1075,6 +1110,7 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)
         _REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)
         _REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)
+        _REGISTER_CLOCK("lpc32xx-adc", NULL, clk_adc)
         _REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0)
         _REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1)
         _REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index 369b152896cd..6c76bb36559b 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -138,6 +138,28 @@ struct platform_device lpc32xx_rtc_device = {
 };
 
 /*
+ * ADC support
+ */
+static struct resource adc_resources[] = {
+        {
+                .start = LPC32XX_ADC_BASE,
+                .end = LPC32XX_ADC_BASE + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_LPC32XX_TS_IRQ,
+                .end = IRQ_LPC32XX_TS_IRQ,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device lpc32xx_adc_device = {
+        .name =  "lpc32xx-adc",
+        .id = -1,
+        .num_resources = ARRAY_SIZE(adc_resources),
+        .resource = adc_resources,
+};
+
+/*
  * Returns the unique ID for the device
  */
 void lpc32xx_get_uid(u32 devid[4])
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index 4b4e700343c1..04b72739eb9c 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -29,6 +29,7 @@ extern struct platform_device lpc32xx_i2c0_device;
 extern struct platform_device lpc32xx_i2c1_device;
 extern struct platform_device lpc32xx_i2c2_device;
 extern struct platform_device lpc32xx_tsc_device;
+extern struct platform_device lpc32xx_adc_device;
 extern struct platform_device lpc32xx_rtc_device;
 
 /*
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 5d51c102c255..a539f4f72f28 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -252,6 +252,7 @@ static struct platform_device *phy3250_devs[] __initdata = {
         &lpc32xx_i2c2_device,
         &lpc32xx_watchdog_device,
         &lpc32xx_gpio_led_device,
+        &lpc32xx_adc_device,
 };
 
 static struct amba_device *amba_devs[] __initdata = {
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index 4de13abef7bb..e2e1f1e5e124 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -22,6 +22,7 @@ extern struct pxa_device_desc pxa910_device_pwm4;
 extern struct pxa_device_desc pxa910_device_nand;
 
 extern struct platform_device pxa910_device_gpio;
+extern struct platform_device pxa910_device_rtc;
 
 static inline int pxa910_add_uart(int id)
 {
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index 1a96585336ba..8a37fb003655 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -57,6 +57,7 @@
 #define APBC_PXA910_SSP1        APBC_REG(0x01c)
 #define APBC_PXA910_SSP2        APBC_REG(0x020)
 #define APBC_PXA910_IPC         APBC_REG(0x024)
+#define APBC_PXA910_RTC         APBC_REG(0x028)
 #define APBC_PXA910_TWSI0       APBC_REG(0x02c)
 #define APBC_PXA910_KPC         APBC_REG(0x030)
 #define APBC_PXA910_TIMERS      APBC_REG(0x034)
diff --git a/arch/arm/mach-mmp/include/mach/regs-rtc.h b/arch/arm/mach-mmp/include/mach/regs-rtc.h
new file mode 100644
index 000000000000..5bff886a3941
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-rtc.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_MACH_REGS_RTC_H
+#define __ASM_MACH_REGS_RTC_H
+
+#include <mach/addr-map.h>
+
+#define RTC_VIRT_BASE   (APB_VIRT_BASE + 0x10000)
+#define RTC_REG(x)      (*((volatile u32 __iomem *)(RTC_VIRT_BASE + (x))))
+
+/*
+ * Real Time Clock
+ */
+
+#define RCNR            RTC_REG(0x00)   /* RTC Count Register */
+#define RTAR            RTC_REG(0x04)   /* RTC Alarm Register */
+#define RTSR            RTC_REG(0x08)   /* RTC Status Register */
+#define RTTR            RTC_REG(0x0C)   /* RTC Timer Trim Register */
+
+#define RTSR_HZE        (1 << 3)        /* HZ interrupt enable */
+#define RTSR_ALE        (1 << 2)        /* RTC alarm interrupt enable */
+#define RTSR_HZ         (1 << 1)        /* HZ rising-edge detected */
+#define RTSR_AL         (1 << 0)        /* RTC alarm detected */
+
+#endif /* __ASM_MACH_REGS_RTC_H */
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 3241a25784d0..b6e152723974 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -92,6 +92,7 @@ static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
 static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
 static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
 static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
+static APBC_CLK(rtc, PXA910_RTC, 8, 32768);
 
 static APMU_CLK(nand, NAND, 0x19b, 156000000);
 static APMU_CLK(u2o, USB, 0x1b, 480000000);
@@ -109,6 +110,7 @@ static struct clk_lookup pxa910_clkregs[] = {
         INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
         INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
         INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
+        INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
 };
 
 static int __init pxa910_init(void)
@@ -183,3 +185,28 @@ struct platform_device pxa910_device_gpio = {
         .num_resources  = ARRAY_SIZE(pxa910_resource_gpio),
         .resource       = pxa910_resource_gpio,
 };
+
+static struct resource pxa910_resource_rtc[] = {
+        {
+                .start  = 0xd4010000,
+                .end    = 0xd401003f,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_PXA910_RTC_INT,
+                .end    = IRQ_PXA910_RTC_INT,
+                .name   = "rtc 1Hz",
+                .flags  = IORESOURCE_IRQ,
+        }, {
+                .start  = IRQ_PXA910_RTC_ALARM,
+                .end    = IRQ_PXA910_RTC_ALARM,
+                .name   = "rtc alarm",
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa910_device_rtc = {
+        .name           = "sa1100-rtc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(pxa910_resource_rtc),
+        .resource       = pxa910_resource_rtc,
+};
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 5ac5d5832e45..e72c709da44f 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -124,6 +124,7 @@ static struct platform_device ttc_dkb_device_onenand = {
 
 static struct platform_device *ttc_dkb_devices[] = {
         &pxa910_device_gpio,
+        &pxa910_device_rtc,
         &ttc_dkb_device_onenand,
 };
 
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 0a113424632c..962e71169750 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -80,12 +80,8 @@ static struct of_device_id msm_dt_gic_match[] __initdata = {
 
 static void __init msm8x60_dt_init(void)
 {
-        struct device_node *node;
-
-        node = of_find_matching_node_by_address(NULL, msm_dt_gic_match,
-                        MSM8X60_QGIC_DIST_PHYS);
-        if (node)
-                irq_domain_add_simple(node, GIC_SPI_START);
+        irq_domain_generate_simple(msm_dt_gic_match, MSM8X60_QGIC_DIST_PHYS,
+                                GIC_SPI_START);
 
         if (of_machine_is_compatible("qcom,msm8660-surf")) {
                 printk(KERN_INFO "Init surf UART registers\n");
diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
index e12e11231dc7..aec34712c321 100644
--- a/arch/arm/mach-mxs/clock-mx23.c
+++ b/arch/arm/mach-mxs/clock-mx23.c
@@ -456,6 +456,7 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK("mxs-pwm.3", NULL, pwm_clk)
         _REGISTER_CLOCK("mxs-pwm.4", NULL, pwm_clk)
         _REGISTER_CLOCK("imx23-fb", NULL, lcdif_clk)
+        _REGISTER_CLOCK("imx23-gpmi-nand", NULL, gpmi_clk)
 };
 
 static int clk_misc_init(void)
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 5d68e4152220..8dd7b02a4b96 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -643,6 +643,7 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK("duart", NULL, uart_clk)
         _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
         _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
+        _REGISTER_CLOCK("imx28-gpmi-nand", NULL, gpmi_clk)
         _REGISTER_CLOCK("mxs-auart.0", NULL, uart_clk)
         _REGISTER_CLOCK("mxs-auart.1", NULL, uart_clk)
         _REGISTER_CLOCK("mxs-auart.2", NULL, uart_clk)
diff --git a/arch/arm/mach-mxs/devices-mx23.h b/arch/arm/mach-mxs/devices-mx23.h
index 3fa651d2c994..4d1329d59287 100644
--- a/arch/arm/mach-mxs/devices-mx23.h
+++ b/arch/arm/mach-mxs/devices-mx23.h
@@ -21,6 +21,10 @@ extern const struct mxs_auart_data mx23_auart_data[] __initconst;
 #define mx23_add_auart0()               mx23_add_auart(0)
 #define mx23_add_auart1()               mx23_add_auart(1)
 
+extern const struct mxs_gpmi_nand_data mx23_gpmi_nand_data __initconst;
+#define mx23_add_gpmi_nand(pdata)       \
+        mxs_add_gpmi_nand(pdata, &mx23_gpmi_nand_data)
+
 extern const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst;
 #define mx23_add_mxs_mmc(id, pdata) \
         mxs_add_mxs_mmc(&mx23_mxs_mmc_data[id], pdata)
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h
index 4f50094e293d..9dbeae130842 100644
--- a/arch/arm/mach-mxs/devices-mx28.h
+++ b/arch/arm/mach-mxs/devices-mx28.h
@@ -34,6 +34,10 @@ extern const struct mxs_flexcan_data mx28_flexcan_data[] __initconst;
 #define mx28_add_flexcan0(pdata)        mx28_add_flexcan(0, pdata)
 #define mx28_add_flexcan1(pdata)        mx28_add_flexcan(1, pdata)
 
+extern const struct mxs_gpmi_nand_data mx28_gpmi_nand_data __initconst;
+#define mx28_add_gpmi_nand(pdata)       \
+        mxs_add_gpmi_nand(pdata, &mx28_gpmi_nand_data)
+
 extern const struct mxs_mxs_i2c_data mx28_mxs_i2c_data[] __initconst;
 #define mx28_add_mxs_i2c(id)            mxs_add_mxs_i2c(&mx28_mxs_i2c_data[id])
 
diff --git a/arch/arm/mach-mxs/devices/Kconfig b/arch/arm/mach-mxs/devices/Kconfig
index 18b6bf526a27..b8913df4cfa2 100644
--- a/arch/arm/mach-mxs/devices/Kconfig
+++ b/arch/arm/mach-mxs/devices/Kconfig
@@ -12,6 +12,9 @@ config MXS_HAVE_PLATFORM_FLEXCAN
         select HAVE_CAN_FLEXCAN if CAN
         bool
 
+config MXS_HAVE_PLATFORM_GPMI_NAND
+        bool
+
 config MXS_HAVE_PLATFORM_MXS_I2C
         bool
 
diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile
index f52e3e53baec..c8f5c9541a30 100644
--- a/arch/arm/mach-mxs/devices/Makefile
+++ b/arch/arm/mach-mxs/devices/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_MXS_HAVE_PLATFORM_AUART) += platform-auart.o
 obj-y += platform-dma.o
 obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o
 obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
+obj-$(CONFIG_MXS_HAVE_PLATFORM_GPMI_NAND) += platform-gpmi-nand.o
 obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o
 obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o
 obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o
diff --git a/arch/arm/mach-mxs/devices/platform-gpmi-nand.c b/arch/arm/mach-mxs/devices/platform-gpmi-nand.c
new file mode 100644
index 000000000000..3e22df5944a8
--- /dev/null
+++ b/arch/arm/mach-mxs/devices/platform-gpmi-nand.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#include <asm/sizes.h>
+#include <mach/mx23.h>
+#include <mach/mx28.h>
+#include <mach/devices-common.h>
+#include <linux/dma-mapping.h>
+
+#ifdef CONFIG_SOC_IMX23
+const struct mxs_gpmi_nand_data mx23_gpmi_nand_data __initconst = {
+        .devid = "imx23-gpmi-nand",
+        .res = {
+                /* GPMI */
+                DEFINE_RES_MEM_NAMED(MX23_GPMI_BASE_ADDR, SZ_8K,
+                                        GPMI_NAND_GPMI_REGS_ADDR_RES_NAME),
+                DEFINE_RES_IRQ_NAMED(MX23_INT_GPMI_ATTENTION,
+                                        GPMI_NAND_GPMI_INTERRUPT_RES_NAME),
+                /* BCH */
+                DEFINE_RES_MEM_NAMED(MX23_BCH_BASE_ADDR, SZ_8K,
+                                        GPMI_NAND_BCH_REGS_ADDR_RES_NAME),
+                DEFINE_RES_IRQ_NAMED(MX23_INT_BCH,
+                                        GPMI_NAND_BCH_INTERRUPT_RES_NAME),
+                /* DMA */
+                DEFINE_RES_NAMED(MX23_DMA_GPMI0,
+                                        MX23_DMA_GPMI3 - MX23_DMA_GPMI0 + 1,
+                                        GPMI_NAND_DMA_CHANNELS_RES_NAME,
+                                        IORESOURCE_DMA),
+                DEFINE_RES_IRQ_NAMED(MX23_INT_GPMI_DMA,
+                                        GPMI_NAND_DMA_INTERRUPT_RES_NAME),
+        },
+};
+#endif
+
+#ifdef CONFIG_SOC_IMX28
+const struct mxs_gpmi_nand_data mx28_gpmi_nand_data __initconst = {
+        .devid = "imx28-gpmi-nand",
+        .res = {
+                /* GPMI */
+                DEFINE_RES_MEM_NAMED(MX28_GPMI_BASE_ADDR, SZ_8K,
+                                        GPMI_NAND_GPMI_REGS_ADDR_RES_NAME),
+                DEFINE_RES_IRQ_NAMED(MX28_INT_GPMI,
+                                        GPMI_NAND_GPMI_INTERRUPT_RES_NAME),
+                /* BCH */
+                DEFINE_RES_MEM_NAMED(MX28_BCH_BASE_ADDR, SZ_8K,
+                                        GPMI_NAND_BCH_REGS_ADDR_RES_NAME),
+                DEFINE_RES_IRQ_NAMED(MX28_INT_BCH,
+                                        GPMI_NAND_BCH_INTERRUPT_RES_NAME),
+                /* DMA */
+                DEFINE_RES_NAMED(MX28_DMA_GPMI0,
+                                        MX28_DMA_GPMI7 - MX28_DMA_GPMI0 + 1,
+                                        GPMI_NAND_DMA_CHANNELS_RES_NAME,
+                                        IORESOURCE_DMA),
+                DEFINE_RES_IRQ_NAMED(MX28_INT_GPMI_DMA,
+                                        GPMI_NAND_DMA_INTERRUPT_RES_NAME),
+        },
+};
+#endif
+
+struct platform_device *__init
+mxs_add_gpmi_nand(const struct gpmi_nand_platform_data *pdata,
+                const struct mxs_gpmi_nand_data *data)
+{
+        return mxs_add_platform_device_dmamask(data->devid, -1,
+                                data->res, GPMI_NAND_RES_SIZE,
+                                pdata, sizeof(*pdata), DMA_BIT_MASK(32));
+}
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
index dc369c1239fc..f2e383955d88 100644
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -66,6 +66,16 @@ struct platform_device *__init mxs_add_flexcan(
                 const struct mxs_flexcan_data *data,
                 const struct flexcan_platform_data *pdata);
 
+/* gpmi-nand */
+#include <linux/mtd/gpmi-nand.h>
+struct mxs_gpmi_nand_data {
+        const char *devid;
+        const struct resource res[GPMI_NAND_RES_SIZE];
+};
+struct platform_device *__init
+mxs_add_gpmi_nand(const struct gpmi_nand_platform_data *pdata,
+                const struct mxs_gpmi_nand_data *data);
+
 /* i2c */
 struct mxs_mxs_i2c_data {
         int id;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index e20c8ab80b0e..21a4095a1000 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -32,7 +32,7 @@ config ARCH_OMAP3
         depends on ARCH_OMAP2PLUS
         default y
         select CPU_V7
-        select USB_ARCH_HAS_EHCI
+        select USB_ARCH_HAS_EHCI if USB_SUPPORT
         select ARCH_HAS_OPP
         select PM_OPP if PM
         select ARM_CPU_SUSPEND if PM
@@ -52,7 +52,7 @@ config ARCH_OMAP4
         select ARM_ERRATA_720789
         select ARCH_HAS_OPP
         select PM_OPP if PM
-        select USB_ARCH_HAS_EHCI
+        select USB_ARCH_HAS_EHCI if USB_SUPPORT
         select ARM_CPU_SUSPEND if PM
 
 comment "OMAP Core Type"
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index bd76394ccaf8..56a6e98652cc 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
-         common.o gpio.o dma.o wd_timer.o display.o
+         common.o gpio.o dma.o wd_timer.o display.o i2c.o
 
 omap-2-3-common                         = irq.o sdrc.o
 hwmod-common                            = omap_hwmod.o \
@@ -182,9 +182,6 @@ obj-$(CONFIG_OMAP_IOMMU)		+= iommu2.o
 iommu-$(CONFIG_OMAP_IOMMU)              := omap-iommu.o
 obj-y                                   += $(iommu-m) $(iommu-y)
 
-i2c-omap-$(CONFIG_I2C_OMAP)             := i2c.o
-obj-y                                   += $(i2c-omap-m) $(i2c-omap-y)
-
 ifneq ($(CONFIG_TIDSPBRIDGE),)
 obj-y                                   += dsp.o
 endif
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index ad497620539b..45fdfe2bd9d5 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -68,7 +68,7 @@ static void __init omap_generic_init(void)
 {
         struct device_node *node = of_find_matching_node(NULL, intc_match);
         if (node)
-                irq_domain_add_simple(node, 0);
+                irq_domain_add_legacy(node, 32, 0, 0, &irq_domain_simple_ops, NULL);
 
         omap_sdrc_init(NULL, NULL);
 
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c
index d4683ba5f721..2a13b9f6c61c 100644
--- a/arch/arm/mach-omap2/board-zoom-display.c
+++ b/arch/arm/mach-omap2/board-zoom-display.c
@@ -55,6 +55,7 @@ static void zoom_panel_disable_lcd(struct omap_dss_device *dssdev)
 
 static int zoom_set_bl_intensity(struct omap_dss_device *dssdev, int level)
 {
+#ifdef CONFIG_TWL4030_CORE
         unsigned char c;
         u8 mux_pwm, enb_pwm;
 
@@ -90,6 +91,9 @@ static int zoom_set_bl_intensity(struct omap_dss_device *dssdev, int level)
         c = ((50 * (100 - level)) / 100) + 1;
         twl_i2c_write_u8(TWL4030_MODULE_PWM1, 0x7F, TWL_LED_PWMOFF);
         twl_i2c_write_u8(TWL4030_MODULE_PWM1, c, TWL_LED_PWMON);
+#else
+        pr_warn("Backlight not enabled\n");
+#endif
 
         return 0;
 }
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 283d11eae693..3ffefe275ea0 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -654,9 +654,7 @@ void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
 /*-------------------------------------------------------------------------*/
 
 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
-#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
 #define OMAP_HDQ_BASE   0x480B2000
-#endif
 static struct resource omap_hdq_resources[] = {
         {
                 .start          = OMAP_HDQ_BASE,
@@ -679,7 +677,10 @@ static struct platform_device omap_hdq_dev = {
 };
 static inline void omap_hdq_init(void)
 {
-        (void) platform_device_register(&omap_hdq_dev);
+        if (cpu_is_omap2420())
+                return;
+
+        platform_device_register(&omap_hdq_dev);
 }
 #else
 static inline void omap_hdq_init(void) {}
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 2132308ad1e4..69fe060a0b75 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -246,7 +246,7 @@ static inline void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
 {
 }
 
-static struct omap_board_mux *board_mux __initdata __maybe_unused;
+static struct omap_board_mux *board_mux __maybe_unused;
 
 #endif
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 3c8dd928628e..34b9766d1d23 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -29,6 +29,7 @@
 
 #include "omap_hwmod_common_data.h"
 
+#include "smartreflex.h"
 #include "prm-regbits-34xx.h"
 #include "cm-regbits-34xx.h"
 #include "wd_timer.h"
@@ -376,6 +377,16 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = {
+        { .irq = 18},
+        { .irq = -1 }
+};
+
+static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = {
+        { .irq = 19},
+        { .irq = -1 }
+};
+
 /* L4 CORE -> SR1 interface */
 static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = {
         {
@@ -2664,6 +2675,10 @@ static struct omap_hwmod_class omap36xx_smartreflex_hwmod_class = {
 };
 
 /* SR1 */
+static struct omap_smartreflex_dev_attr sr1_dev_attr = {
+        .sensor_voltdm_name   = "mpu_iva",
+};
+
 static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = {
         &omap3_l4_core__sr1,
 };
@@ -2672,7 +2687,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
         .name           = "sr1_hwmod",
         .class          = &omap34xx_smartreflex_hwmod_class,
         .main_clk       = "sr1_fck",
-        .vdd_name       = "mpu_iva",
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
@@ -2684,6 +2698,8 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
         },
         .slaves         = omap3_sr1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3_sr1_slaves),
+        .dev_attr       = &sr1_dev_attr,
+        .mpu_irqs       = omap3_smartreflex_mpu_irqs,
         .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
@@ -2691,7 +2707,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
         .name           = "sr1_hwmod",
         .class          = &omap36xx_smartreflex_hwmod_class,
         .main_clk       = "sr1_fck",
-        .vdd_name       = "mpu_iva",
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
@@ -2703,9 +2718,15 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
         },
         .slaves         = omap3_sr1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3_sr1_slaves),
+        .dev_attr       = &sr1_dev_attr,
+        .mpu_irqs       = omap3_smartreflex_mpu_irqs,
 };
 
 /* SR2 */
+static struct omap_smartreflex_dev_attr sr2_dev_attr = {
+        .sensor_voltdm_name     = "core",
+};
+
 static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = {
         &omap3_l4_core__sr2,
 };
@@ -2714,7 +2735,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
         .name           = "sr2_hwmod",
         .class          = &omap34xx_smartreflex_hwmod_class,
         .main_clk       = "sr2_fck",
-        .vdd_name       = "core",
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
@@ -2726,6 +2746,8 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
         },
         .slaves         = omap3_sr2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3_sr2_slaves),
+        .dev_attr       = &sr2_dev_attr,
+        .mpu_irqs       = omap3_smartreflex_core_irqs,
         .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
@@ -2733,7 +2755,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
         .name           = "sr2_hwmod",
         .class          = &omap36xx_smartreflex_hwmod_class,
         .main_clk       = "sr2_fck",
-        .vdd_name       = "core",
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
@@ -2745,6 +2766,8 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
         },
         .slaves         = omap3_sr2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3_sr2_slaves),
+        .dev_attr       = &sr2_dev_attr,
+        .mpu_irqs       = omap3_smartreflex_core_irqs,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index ef0524c10a84..ee3624bd1996 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -34,6 +34,7 @@
 
 #include "omap_hwmod_common_data.h"
 
+#include "smartreflex.h"
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
 #include "prm44xx.h"
@@ -3963,6 +3964,10 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = {
 };
 
 /* smartreflex_core */
+static struct omap_smartreflex_dev_attr smartreflex_core_dev_attr = {
+        .sensor_voltdm_name   = "core",
+};
+
 static struct omap_hwmod omap44xx_smartreflex_core_hwmod;
 static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = {
         { .irq = 19 + OMAP44XX_IRQ_GIC_START },
@@ -3999,7 +4004,6 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
         .mpu_irqs       = omap44xx_smartreflex_core_irqs,
 
         .main_clk       = "smartreflex_core_fck",
-        .vdd_name       = "core",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET,
@@ -4009,9 +4013,14 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
         },
         .slaves         = omap44xx_smartreflex_core_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_smartreflex_core_slaves),
+        .dev_attr       = &smartreflex_core_dev_attr,
 };
 
 /* smartreflex_iva */
+static struct omap_smartreflex_dev_attr smartreflex_iva_dev_attr = {
+        .sensor_voltdm_name     = "iva",
+};
+
 static struct omap_hwmod omap44xx_smartreflex_iva_hwmod;
 static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = {
         { .irq = 102 + OMAP44XX_IRQ_GIC_START },
@@ -4047,7 +4056,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
         .clkdm_name     = "l4_ao_clkdm",
         .mpu_irqs       = omap44xx_smartreflex_iva_irqs,
         .main_clk       = "smartreflex_iva_fck",
-        .vdd_name       = "iva",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET,
@@ -4057,9 +4065,14 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
         },
         .slaves         = omap44xx_smartreflex_iva_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves),
+        .dev_attr       = &smartreflex_iva_dev_attr,
 };
 
 /* smartreflex_mpu */
+static struct omap_smartreflex_dev_attr smartreflex_mpu_dev_attr = {
+        .sensor_voltdm_name     = "mpu",
+};
+
 static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod;
 static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = {
         { .irq = 18 + OMAP44XX_IRQ_GIC_START },
@@ -4095,7 +4108,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
         .clkdm_name     = "l4_ao_clkdm",
         .mpu_irqs       = omap44xx_smartreflex_mpu_irqs,
         .main_clk       = "smartreflex_mpu_fck",
-        .vdd_name       = "mpu",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET,
@@ -4105,6 +4117,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
         },
         .slaves         = omap44xx_smartreflex_mpu_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves),
+        .dev_attr       = &smartreflex_mpu_dev_attr,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c
index 53d9d0a5b39d..955566eefac4 100644
--- a/arch/arm/mach-omap2/smartreflex-class3.c
+++ b/arch/arm/mach-omap2/smartreflex-class3.c
@@ -29,6 +29,7 @@ static int sr_class3_enable(struct voltagedomain *voltdm)
 
 static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset)
 {
+        sr_disable_errgen(voltdm);
         omap_vp_disable(voltdm);
         sr_disable(voltdm);
         if (is_volt_reset)
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 7e755bb0ffc4..008fbd7b9352 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -36,6 +36,12 @@
 #define SR_DISABLE_TIMEOUT      200
 
 struct omap_sr {
+        struct list_head                node;
+        struct platform_device          *pdev;
+        struct omap_sr_nvalue_table     *nvalue_table;
+        struct voltagedomain            *voltdm;
+        struct dentry                   *dbg_dir;
+        unsigned int                    irq;
         int                             srid;
         int                             ip_type;
         int                             nvalue_count;
@@ -49,13 +55,7 @@ struct omap_sr {
         u32                             senp_avgweight;
         u32                             senp_mod;
         u32                             senn_mod;
-        unsigned int                    irq;
         void __iomem                    *base;
-        struct platform_device          *pdev;
-        struct list_head                node;
-        struct omap_sr_nvalue_table     *nvalue_table;
-        struct voltagedomain            *voltdm;
-        struct dentry                   *dbg_dir;
 };
 
 /* sr_list contains all the instances of smartreflex module */
@@ -74,10 +74,6 @@ static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
                                         u32 value)
 {
         u32 reg_val;
-        u32 errconfig_offs = 0, errconfig_mask = 0;
-
-        reg_val = __raw_readl(sr->base + offset);
-        reg_val &= ~mask;
 
         /*
          * Smartreflex error config register is special as it contains
@@ -88,16 +84,15 @@ static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
          * if they are currently set, but does allow the caller to write
          * those bits.
          */
-        if (sr->ip_type == SR_TYPE_V1) {
-                errconfig_offs = ERRCONFIG_V1;
-                errconfig_mask = ERRCONFIG_STATUS_V1_MASK;
-        } else if (sr->ip_type == SR_TYPE_V2) {
-                errconfig_offs = ERRCONFIG_V2;
-                errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2;
-        }
+        if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
+                mask |= ERRCONFIG_STATUS_V1_MASK;
+        else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
+                mask |= ERRCONFIG_VPBOUNDINTST_V2;
+
+        reg_val = __raw_readl(sr->base + offset);
+        reg_val &= ~mask;
 
-        if (offset == errconfig_offs)
-                reg_val &= ~errconfig_mask;
+        value &= mask;
 
         reg_val |= value;
 
@@ -128,21 +123,28 @@ static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
 
 static irqreturn_t sr_interrupt(int irq, void *data)
 {
-        struct omap_sr *sr_info = (struct omap_sr *)data;
+        struct omap_sr *sr_info = data;
         u32 status = 0;
 
-        if (sr_info->ip_type == SR_TYPE_V1) {
+        switch (sr_info->ip_type) {
+        case SR_TYPE_V1:
                 /* Read the status bits */
                 status = sr_read_reg(sr_info, ERRCONFIG_V1);
 
                 /* Clear them by writing back */
                 sr_write_reg(sr_info, ERRCONFIG_V1, status);
-        } else if (sr_info->ip_type == SR_TYPE_V2) {
+                break;
+        case SR_TYPE_V2:
                 /* Read the status bits */
                 status = sr_read_reg(sr_info, IRQSTATUS);
 
                 /* Clear them by writing back */
                 sr_write_reg(sr_info, IRQSTATUS, status);
+                break;
+        default:
+                dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
+                        sr_info->ip_type);
+                return IRQ_NONE;
         }
 
         if (sr_class->notify)
@@ -166,6 +168,7 @@ static void sr_set_clk_length(struct omap_sr *sr)
                         __func__);
                 return;
         }
+
         sys_clk_speed = clk_get_rate(sys_ck);
         clk_put(sys_ck);
 
@@ -267,7 +270,7 @@ static int sr_late_init(struct omap_sr *sr_info)
                         goto error;
                 }
                 ret = request_irq(sr_info->irq, sr_interrupt,
-                                0, name, (void *)sr_info);
+                                0, name, sr_info);
                 if (ret)
                         goto error;
                 disable_irq(sr_info->irq);
@@ -288,12 +291,15 @@ error:
                 "not function as desired\n", __func__);
         kfree(name);
         kfree(sr_info);
+
         return ret;
 }
 
 static void sr_v1_disable(struct omap_sr *sr)
 {
         int timeout = 0;
+        int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
+                        ERRCONFIG_MCUBOUNDINTST;
 
         /* Enable MCUDisableAcknowledge interrupt */
         sr_modify_reg(sr, ERRCONFIG_V1,
@@ -302,13 +308,13 @@ static void sr_v1_disable(struct omap_sr *sr)
         /* SRCONFIG - disable SR */
         sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
 
-        /* Disable all other SR interrupts and clear the status */
+        /* Disable all other SR interrupts and clear the status as needed */
+        if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
+                errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
         sr_modify_reg(sr, ERRCONFIG_V1,
                         (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
                         ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
-                        (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
-                        ERRCONFIG_MCUBOUNDINTST |
-                        ERRCONFIG_VPBOUNDINTST_V1));
+                        errconf_val);
 
         /*
          * Wait for SR to be disabled.
@@ -337,9 +343,17 @@ static void sr_v2_disable(struct omap_sr *sr)
         /* SRCONFIG - disable SR */
         sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
 
-        /* Disable all other SR interrupts and clear the status */
-        sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
+        /*
+         * Disable all other SR interrupts and clear the status
+         * write to status register ONLY on need basis - only if status
+         * is set.
+         */
+        if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
+                sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
                         ERRCONFIG_VPBOUNDINTST_V2);
+        else
+                sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
+                                0x0);
         sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
                         IRQENABLE_MCUVALIDINT |
                         IRQENABLE_MCUBOUNDSINT));
@@ -398,15 +412,16 @@ static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs)
  */
 int sr_configure_errgen(struct voltagedomain *voltdm)
 {
-        u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en;
-        u32 vpboundint_st, senp_en = 0, senn_en = 0;
+        u32 sr_config, sr_errconfig, errconfig_offs;
+        u32 vpboundint_en, vpboundint_st;
+        u32 senp_en = 0, senn_en = 0;
         u8 senp_shift, senn_shift;
         struct omap_sr *sr = _sr_lookup(voltdm);
 
         if (IS_ERR(sr)) {
                 pr_warning("%s: omap_sr struct for sr_%s not found\n",
                         __func__, voltdm->name);
-                return -EINVAL;
+                return PTR_ERR(sr);
         }
 
         if (!sr->clk_length)
@@ -418,20 +433,23 @@ int sr_configure_errgen(struct voltagedomain *voltdm)
         sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
                 SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
 
-        if (sr->ip_type == SR_TYPE_V1) {
+        switch (sr->ip_type) {
+        case SR_TYPE_V1:
                 sr_config |= SRCONFIG_DELAYCTRL;
                 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
                 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
                 errconfig_offs = ERRCONFIG_V1;
                 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
                 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
-        } else if (sr->ip_type == SR_TYPE_V2) {
+                break;
+        case SR_TYPE_V2:
                 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
                 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
                 errconfig_offs = ERRCONFIG_V2;
                 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
                 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
-        } else {
+                break;
+        default:
                 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
                         "module without specifying the ip\n", __func__);
                 return -EINVAL;
@@ -447,8 +465,55 @@ int sr_configure_errgen(struct voltagedomain *voltdm)
                 sr_errconfig);
 
         /* Enabling the interrupts if the ERROR module is used */
-        sr_modify_reg(sr, errconfig_offs,
-                vpboundint_en, (vpboundint_en | vpboundint_st));
+        sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
+                      vpboundint_en);
+
+        return 0;
+}
+
+/**
+ * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
+ * @voltdm:     VDD pointer to which the SR module to be configured belongs to.
+ *
+ * This API is to be called from the smartreflex class driver to
+ * disable the error generator module inside the smartreflex module.
+ *
+ * Returns 0 on success and error value in case of failure.
+ */
+int sr_disable_errgen(struct voltagedomain *voltdm)
+{
+        u32 errconfig_offs;
+        u32 vpboundint_en, vpboundint_st;
+        struct omap_sr *sr = _sr_lookup(voltdm);
+
+        if (IS_ERR(sr)) {
+                pr_warning("%s: omap_sr struct for sr_%s not found\n",
+                        __func__, voltdm->name);
+                return PTR_ERR(sr);
+        }
+
+        switch (sr->ip_type) {
+        case SR_TYPE_V1:
+                errconfig_offs = ERRCONFIG_V1;
+                vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
+                vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
+                break;
+        case SR_TYPE_V2:
+                errconfig_offs = ERRCONFIG_V2;
+                vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
+                vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
+                break;
+        default:
+                dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
+                        "module without specifying the ip\n", __func__);
+                return -EINVAL;
+        }
+
+        /* Disable the interrupts of ERROR module */
+        sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
+
+        /* Disable the Sensor and errorgen */
+        sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
 
         return 0;
 }
@@ -475,7 +540,7 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
         if (IS_ERR(sr)) {
                 pr_warning("%s: omap_sr struct for sr_%s not found\n",
                         __func__, voltdm->name);
-                return -EINVAL;
+                return PTR_ERR(sr);
         }
 
         if (!sr->clk_length)
@@ -488,14 +553,17 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
                 SRCONFIG_SENENABLE |
                 (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
 
-        if (sr->ip_type == SR_TYPE_V1) {
+        switch (sr->ip_type) {
+        case SR_TYPE_V1:
                 sr_config |= SRCONFIG_DELAYCTRL;
                 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
                 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
-        } else if (sr->ip_type == SR_TYPE_V2) {
+                break;
+        case SR_TYPE_V2:
                 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
                 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
-        } else {
+                break;
+        default:
                 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
                         "module without specifying the ip\n", __func__);
                 return -EINVAL;
@@ -511,20 +579,27 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
          * Enabling the interrupts if MINMAXAVG module is used.
          * TODO: check if all the interrupts are mandatory
          */
-        if (sr->ip_type == SR_TYPE_V1) {
+        switch (sr->ip_type) {
+        case SR_TYPE_V1:
                 sr_modify_reg(sr, ERRCONFIG_V1,
                         (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
                         ERRCONFIG_MCUBOUNDINTEN),
                         (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
                          ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
                          ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
-        } else if (sr->ip_type == SR_TYPE_V2) {
+                break;
+        case SR_TYPE_V2:
                 sr_write_reg(sr, IRQSTATUS,
                         IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
                         IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
                 sr_write_reg(sr, IRQENABLE_SET,
                         IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
                         IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
+                break;
+        default:
+                dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
+                        "module without specifying the ip\n", __func__);
+                return -EINVAL;
         }
 
         return 0;
@@ -543,15 +618,15 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
  */
 int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
 {
-        u32 nvalue_reciprocal;
         struct omap_volt_data *volt_data;
         struct omap_sr *sr = _sr_lookup(voltdm);
+        u32 nvalue_reciprocal;
         int ret;
 
         if (IS_ERR(sr)) {
                 pr_warning("%s: omap_sr struct for sr_%s not found\n",
                         __func__, voltdm->name);
-                return -EINVAL;
+                return PTR_ERR(sr);
         }
 
         volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
@@ -559,7 +634,7 @@ int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
         if (IS_ERR(volt_data)) {
                 dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
                         "for nominal voltage %ld\n", __func__, volt);
-                return -ENODATA;
+                return PTR_ERR(volt_data);
         }
 
         nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs);
@@ -617,10 +692,17 @@ void sr_disable(struct voltagedomain *voltdm)
          * disable the clocks.
          */
         if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
-                if (sr->ip_type == SR_TYPE_V1)
+                switch (sr->ip_type) {
+                case SR_TYPE_V1:
                         sr_v1_disable(sr);
-                else if (sr->ip_type == SR_TYPE_V2)
+                        break;
+                case SR_TYPE_V2:
                         sr_v2_disable(sr);
+                        break;
+                default:
+                        dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
+                                sr->ip_type);
+                }
         }
 
         pm_runtime_put_sync_suspend(&sr->pdev->dev);
@@ -779,10 +861,10 @@ void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
         sr_pmic_data = pmic_data;
 }
 
-/* PM Debug Fs enteries to enable disable smartreflex. */
+/* PM Debug FS entries to enable and disable smartreflex. */
 static int omap_sr_autocomp_show(void *data, u64 *val)
 {
-        struct omap_sr *sr_info = (struct omap_sr *) data;
+        struct omap_sr *sr_info = data;
 
         if (!sr_info) {
                 pr_warning("%s: omap_sr struct not found\n", __func__);
@@ -796,7 +878,7 @@ static int omap_sr_autocomp_show(void *data, u64 *val)
 
 static int omap_sr_autocomp_store(void *data, u64 val)
 {
-        struct omap_sr *sr_info = (struct omap_sr *) data;
+        struct omap_sr *sr_info = data;
 
         if (!sr_info) {
                 pr_warning("%s: omap_sr struct not found\n", __func__);
@@ -804,7 +886,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
         }
 
         /* Sanity check */
-        if (val && (val != 1)) {
+        if (val > 1) {
                 pr_warning("%s: Invalid argument %lld\n", __func__, val);
                 return -EINVAL;
         }
@@ -821,11 +903,11 @@ static int omap_sr_autocomp_store(void *data, u64 val)
 }
 
 DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
-                omap_sr_autocomp_store, "%llu\n");
+                        omap_sr_autocomp_store, "%llu\n");
 
 static int __init omap_sr_probe(struct platform_device *pdev)
 {
-        struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
+        struct omap_sr *sr_info;
         struct omap_sr_data *pdata = pdev->dev.platform_data;
         struct resource *mem, *irq;
         struct dentry *nvalue_dir;
@@ -833,12 +915,15 @@ static int __init omap_sr_probe(struct platform_device *pdev)
         int i, ret = 0;
         char *name;
 
+        sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
         if (!sr_info) {
                 dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
                         __func__);
                 return -ENOMEM;
         }
 
+        platform_set_drvdata(pdev, sr_info);
+
         if (!pdata) {
                 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
                 ret = -EINVAL;
@@ -904,7 +989,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
         dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
         if (!sr_dbg_dir) {
                 sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
-                if (!sr_dbg_dir) {
+                if (IS_ERR_OR_NULL(sr_dbg_dir)) {
                         ret = PTR_ERR(sr_dbg_dir);
                         pr_err("%s:sr debugfs dir creation failed(%d)\n",
                                 __func__, ret);
@@ -921,7 +1006,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
         }
         sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir);
         kfree(name);
-        if (IS_ERR(sr_info->dbg_dir)) {
+        if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
                 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
                         __func__);
                 ret = PTR_ERR(sr_info->dbg_dir);
@@ -938,7 +1023,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
                         &sr_info->err_minlimit);
 
         nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
-        if (IS_ERR(nvalue_dir)) {
+        if (IS_ERR_OR_NULL(nvalue_dir)) {
                 dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
                         "for n-values\n", __func__);
                 ret = PTR_ERR(nvalue_dir);
@@ -994,7 +1079,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
         if (IS_ERR(sr_info)) {
                 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
                         __func__);
-                return -EINVAL;
+                return PTR_ERR(sr_info);
         }
 
         if (sr_info->autocomp_active)
@@ -1011,8 +1096,32 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
         return 0;
 }
 
+static void __devexit omap_sr_shutdown(struct platform_device *pdev)
+{
+        struct omap_sr_data *pdata = pdev->dev.platform_data;
+        struct omap_sr *sr_info;
+
+        if (!pdata) {
+                dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
+                return;
+        }
+
+        sr_info = _sr_lookup(pdata->voltdm);
+        if (IS_ERR(sr_info)) {
+                dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
+                        __func__);
+                return;
+        }
+
+        if (sr_info->autocomp_active)
+                sr_stop_vddautocomp(sr_info);
+
+        return;
+}
+
 static struct platform_driver smartreflex_driver = {
-        .remove         = omap_sr_remove,
+        .remove         = __devexit_p(omap_sr_remove),
+        .shutdown       = __devexit_p(omap_sr_shutdown),
         .driver         = {
                 .name   = "smartreflex",
         },
@@ -1042,12 +1151,12 @@ static int __init sr_init(void)
 
         return 0;
 }
+late_initcall(sr_init);
 
 static void __exit sr_exit(void)
 {
         platform_driver_unregister(&smartreflex_driver);
 }
-late_initcall(sr_init);
 module_exit(sr_exit);
 
 MODULE_DESCRIPTION("OMAP Smartreflex Driver");
diff --git a/arch/arm/mach-omap2/smartreflex.h b/arch/arm/mach-omap2/smartreflex.h
index 5f35b9e25556..5809141171f8 100644
--- a/arch/arm/mach-omap2/smartreflex.h
+++ b/arch/arm/mach-omap2/smartreflex.h
@@ -152,6 +152,15 @@ struct omap_sr_pmic_data {
         void (*sr_pmic_init) (void);
 };
 
+/**
+ * struct omap_smartreflex_dev_attr - Smartreflex Device attribute.
+ *
+ * @sensor_voltdm_name:       Name of voltdomain of SR instance
+ */
+struct omap_smartreflex_dev_attr {
+        const char      *sensor_voltdm_name;
+};
+
 #ifdef CONFIG_OMAP_SMARTREFLEX
 /*
  * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR.
@@ -231,6 +240,7 @@ void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data);
 int sr_enable(struct voltagedomain *voltdm, unsigned long volt);
 void sr_disable(struct voltagedomain *voltdm);
 int sr_configure_errgen(struct voltagedomain *voltdm);
+int sr_disable_errgen(struct voltagedomain *voltdm);
 int sr_configure_minmax(struct voltagedomain *voltdm);
 
 /* API to register the smartreflex class driver with the smartreflex driver */
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index 9f43fcc05d3e..60293370a2a7 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -74,6 +74,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)
         struct omap_sr_data *sr_data;
         struct platform_device *pdev;
         struct omap_volt_data *volt_data;
+        struct omap_smartreflex_dev_attr *sr_dev_attr;
         char *name = "smartreflex";
         static int i;
 
@@ -84,9 +85,11 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)
                 return -ENOMEM;
         }
 
-        if (!oh->vdd_name) {
+        sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
+        if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
                 pr_err("%s: No voltage domain specified for %s."
-                        "Cannot initialize\n", __func__, oh->name);
+                                "Cannot initialize\n", __func__,
+                                        oh->name);
                 goto exit;
         }
 
@@ -94,10 +97,10 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)
         sr_data->senn_mod = 0x1;
         sr_data->senp_mod = 0x1;
 
-        sr_data->voltdm = voltdm_lookup(oh->vdd_name);
+        sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
         if (IS_ERR(sr_data->voltdm)) {
                 pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
-                        __func__, oh->vdd_name);
+                        __func__, sr_dev_attr->sensor_voltdm_name);
                 goto exit;
         }
 
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c
index d93ceef4a50a..37c2de9b6f26 100644
--- a/arch/arm/mach-prima2/irq.c
+++ b/arch/arm/mach-prima2/irq.c
@@ -68,7 +68,7 @@ void __init sirfsoc_of_irq_init(void)
         if (!sirfsoc_intc_base)
                 panic("unable to map intc cpu registers\n");
 
-        irq_domain_add_simple(np, 0);
+        irq_domain_add_legacy(np, 32, 0, 0, &irq_domain_simple_ops, NULL);
 
         of_node_put(np);
 
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 5bc13121eac5..84f2d7015cfe 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -406,20 +406,17 @@ static struct resource pxa_rtc_resources[] = {
         [1] = {
                 .start  = IRQ_RTC1Hz,
                 .end    = IRQ_RTC1Hz,
+                .name   = "rtc 1Hz",
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
                 .start  = IRQ_RTCAlrm,
                 .end    = IRQ_RTCAlrm,
+                .name   = "rtc alarm",
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
-struct platform_device sa1100_device_rtc = {
-        .name           = "sa1100-rtc",
-        .id             = -1,
-};
-
 struct platform_device pxa_device_rtc = {
         .name           = "pxa-rtc",
         .id             = -1,
@@ -427,6 +424,27 @@ struct platform_device pxa_device_rtc = {
         .resource       = pxa_rtc_resources,
 };
 
+static struct resource sa1100_rtc_resources[] = {
+        {
+                .start  = IRQ_RTC1Hz,
+                .end    = IRQ_RTC1Hz,
+                .name   = "rtc 1Hz",
+                .flags  = IORESOURCE_IRQ,
+        }, {
+                .start  = IRQ_RTCAlrm,
+                .end    = IRQ_RTCAlrm,
+                .name   = "rtc alarm",
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device sa1100_device_rtc = {
+        .name           = "sa1100-rtc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(sa1100_rtc_resources),
+        .resource       = sa1100_rtc_resources,
+};
+
 static struct resource pxa_ac97_resources[] = {
         [0] = {
                 .start  = 0x40500000,
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 208eef1c0485..8a1ef2734d58 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -28,7 +28,8 @@
 #include <linux/mtd/physmap.h>
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
-#include <linux/regulator/bq24022.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/gpio-regulator.h>
 #include <linux/regulator/machine.h>
 #include <linux/regulator/max1586.h>
 #include <linux/spi/ads7846.h>
@@ -682,14 +683,34 @@ static struct regulator_init_data bq24022_init_data = {
         .consumer_supplies      = bq24022_consumers,
 };
 
-static struct bq24022_mach_info bq24022_info = {
-        .gpio_nce   = GPIO72_HX4700_BQ24022_nCHARGE_EN,
-        .gpio_iset2 = GPIO96_HX4700_BQ24022_ISET2,
-        .init_data  = &bq24022_init_data,
+static struct gpio bq24022_gpios[] = {
+        { GPIO96_HX4700_BQ24022_ISET2, GPIOF_OUT_INIT_LOW, "bq24022_iset2" },
+};
+
+static struct gpio_regulator_state bq24022_states[] = {
+        { .value = 100000, .gpios = (0 << 0) },
+        { .value = 500000, .gpios = (1 << 0) },
+};
+
+static struct gpio_regulator_config bq24022_info = {
+        .supply_name = "bq24022",
+
+        .enable_gpio = GPIO72_HX4700_BQ24022_nCHARGE_EN,
+        .enable_high = 0,
+        .enabled_at_boot = 0,
+
+        .gpios = bq24022_gpios,
+        .nr_gpios = ARRAY_SIZE(bq24022_gpios),
+
+        .states = bq24022_states,
+        .nr_states = ARRAY_SIZE(bq24022_states),
+
+        .type = REGULATOR_CURRENT,
+        .init_data = &bq24022_init_data,
 };
 
 static struct platform_device bq24022 = {
-        .name = "bq24022",
+        .name = "gpio-regulator",
         .id   = -1,
         .dev  = {
                 .platform_data = &bq24022_info,
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 3d6baf91396c..5e26f3e93fdd 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -25,7 +25,8 @@
 #include <linux/mtd/physmap.h>
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
-#include <linux/regulator/bq24022.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/gpio-regulator.h>
 #include <linux/regulator/machine.h>
 #include <linux/usb/gpio_vbus.h>
 #include <linux/i2c/pxa-i2c.h>
@@ -596,14 +597,34 @@ static struct regulator_init_data bq24022_init_data = {
         .consumer_supplies      = bq24022_consumers,
 };
 
-static struct bq24022_mach_info bq24022_info = {
-        .gpio_nce   = GPIO30_MAGICIAN_BQ24022_nCHARGE_EN,
-        .gpio_iset2 = EGPIO_MAGICIAN_BQ24022_ISET2,
-        .init_data  = &bq24022_init_data,
+static struct gpio bq24022_gpios[] = {
+        { EGPIO_MAGICIAN_BQ24022_ISET2, GPIOF_OUT_INIT_LOW, "bq24022_iset2" },
+};
+
+static struct gpio_regulator_state bq24022_states[] = {
+        { .value = 100000, .gpios = (0 << 0) },
+        { .value = 500000, .gpios = (1 << 0) },
+};
+
+static struct gpio_regulator_config bq24022_info = {
+        .supply_name = "bq24022",
+
+        .enable_gpio = GPIO30_MAGICIAN_BQ24022_nCHARGE_EN,
+        .enable_high = 0,
+        .enabled_at_boot = 0,
+
+        .gpios = bq24022_gpios,
+        .nr_gpios = ARRAY_SIZE(bq24022_gpios),
+
+        .states = bq24022_states,
+        .nr_states = ARRAY_SIZE(bq24022_states),
+
+        .type = REGULATOR_CURRENT,
+        .init_data = &bq24022_init_data,
 };
 
 static struct platform_device bq24022 = {
-        .name = "bq24022",
+        .name = "gpio-regulator",
         .id   = -1,
         .dev  = {
                 .platform_data = &bq24022_info,
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 00d6eacab8e4..e48033eb2be8 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -208,6 +208,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
         INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
         INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
         INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 static struct clk_lookup pxa25x_hwuart_clkreg =
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index c1673b3441d4..a70b7e23fa44 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -229,6 +229,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
         INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
         INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
         INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 4f402afa6609..881934899bda 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -89,6 +89,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
         INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
         INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
         INIT_CLKREG(&clk_pxa3xx_gpio, "pxa-gpio", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index d082a583df78..35023d7d3cd4 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -231,6 +231,7 @@ static struct clk_lookup pxa95x_clkregs[] = {
         INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
         INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
         INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 void __init pxa95x_init_irq(void)
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index 08bb0355159d..0e9a71c90ed7 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -59,6 +59,7 @@
 #include <plat/fb-core.h>
 #include <plat/nand-core.h>
 #include <plat/adc-core.h>
+#include <plat/rtc-core.h>
 
 static struct map_desc s3c2416_iodesc[] __initdata = {
         IODESC_ENT(WATCHDOG),
@@ -98,6 +99,7 @@ int __init s3c2416_init(void)
         s3c_fb_setname("s3c2443-fb");
 
         s3c_adc_setname("s3c2416-adc");
+        s3c_rtc_setname("s3c2416-rtc");
 
 #ifdef CONFIG_PM
         register_syscore_ops(&s3c2416_pm_syscore_ops);
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index b9deaeb0dfff..b7778a9dafaf 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -41,6 +41,7 @@
 #include <plat/fb-core.h>
 #include <plat/nand-core.h>
 #include <plat/adc-core.h>
+#include <plat/rtc-core.h>
 
 static struct map_desc s3c2443_iodesc[] __initdata = {
         IODESC_ENT(WATCHDOG),
@@ -73,6 +74,7 @@ int __init s3c2443_init(void)
         s3c_fb_setname("s3c2443-fb");
 
         s3c_adc_setname("s3c2443-adc");
+        s3c_rtc_setname("s3c2443-rtc");
 
         /* change WDT IRQ number */
         s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index dab3c6347a8f..172ebd0ee0a2 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -11,17 +11,29 @@
 #include <linux/clk.h>
 #include <linux/spinlock.h>
 #include <linux/mutex.h>
+#include <linux/io.h>
+#include <linux/clkdev.h>
 
 #include <mach/hardware.h>
 
-/*
- * Very simple clock implementation - we only have one clock to deal with.
- */
+struct clkops {
+        void                    (*enable)(struct clk *);
+        void                    (*disable)(struct clk *);
+};
+
 struct clk {
+        const struct clkops     *ops;
         unsigned int            enabled;
 };
 
-static void clk_gpio27_enable(void)
+#define DEFINE_CLK(_name, _ops)                         \
+struct clk clk_##_name = {                              \
+                .ops    = _ops,                         \
+        }
+
+static DEFINE_SPINLOCK(clocks_lock);
+
+static void clk_gpio27_enable(struct clk *clk)
 {
         /*
          * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
@@ -32,38 +44,24 @@ static void clk_gpio27_enable(void)
         TUCR = TUCR_3_6864MHz;
 }
 
-static void clk_gpio27_disable(void)
+static void clk_gpio27_disable(struct clk *clk)
 {
         TUCR = 0;
         GPDR &= ~GPIO_32_768kHz;
         GAFR &= ~GPIO_32_768kHz;
 }
 
-static struct clk clk_gpio27;
-
-static DEFINE_SPINLOCK(clocks_lock);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        const char *devname = dev_name(dev);
-
-        return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
 int clk_enable(struct clk *clk)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&clocks_lock, flags);
-        if (clk->enabled++ == 0)
-                clk_gpio27_enable();
-        spin_unlock_irqrestore(&clocks_lock, flags);
+        if (clk) {
+                spin_lock_irqsave(&clocks_lock, flags);
+                if (clk->enabled++ == 0)
+                        clk->ops->enable(clk);
+                spin_unlock_irqrestore(&clocks_lock, flags);
+        }
+
         return 0;
 }
 EXPORT_SYMBOL(clk_enable);
@@ -72,17 +70,31 @@ void clk_disable(struct clk *clk)
 {
         unsigned long flags;
 
-        WARN_ON(clk->enabled == 0);
-
-        spin_lock_irqsave(&clocks_lock, flags);
-        if (--clk->enabled == 0)
-                clk_gpio27_disable();
-        spin_unlock_irqrestore(&clocks_lock, flags);
+        if (clk) {
+                WARN_ON(clk->enabled == 0);
+                spin_lock_irqsave(&clocks_lock, flags);
+                if (--clk->enabled == 0)
+                        clk->ops->disable(clk);
+                spin_unlock_irqrestore(&clocks_lock, flags);
+        }
 }
 EXPORT_SYMBOL(clk_disable);
 
-unsigned long clk_get_rate(struct clk *clk)
+const struct clkops clk_gpio27_ops = {
+        .enable         = clk_gpio27_enable,
+        .disable        = clk_gpio27_disable,
+};
+
+static DEFINE_CLK(gpio27, &clk_gpio27_ops);
+
+static struct clk_lookup sa11xx_clkregs[] = {
+        CLKDEV_INIT("sa1111.0", NULL, &clk_gpio27),
+        CLKDEV_INIT("sa1100-rtc", NULL, NULL),
+};
+
+static int __init sa11xx_clk_init(void)
 {
-        return 3686400;
+        clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
+        return 0;
 }
-EXPORT_SYMBOL(clk_get_rate);
+core_initcall(sa11xx_clk_init);
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index bb10ee2cb89f..7c1ebf4a7920 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -345,9 +345,17 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
         sa11x0_register_device(&sa11x0ir_device, irda);
 }
 
+static struct resource sa1100_rtc_resources[] = {
+        DEFINE_RES_MEM(0x90010000, 0x9001003f),
+        DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
+        DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
+};
+
 static struct platform_device sa11x0rtc_device = {
         .name           = "sa1100-rtc",
         .id             = -1,
+        .num_resources  = ARRAY_SIZE(sa1100_rtc_resources),
+        .resource       = sa1100_rtc_resources,
 };
 
 static struct platform_device *sa11x0_devices[] __initdata = {
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index e120ff54f663..e0b7a4d32599 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -7,6 +7,7 @@ obj-y                                   += clock.o
 obj-y                                   += timer.o
 obj-y                                   += pinmux.o
 obj-y                                   += fuse.o
+obj-y                                   += pmc.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += powergate.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra2_clocks.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra2_emc.o
@@ -15,7 +16,7 @@ obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= pinmux-tegra30-tables.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += board-dt-tegra30.o
 obj-$(CONFIG_SMP)                       += platsmp.o localtimer.o headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
-obj-$(CONFIG_TEGRA_SYSTEM_DMA)          += dma.o
+obj-$(CONFIG_TEGRA_SYSTEM_DMA)          += dma.o apbio.o
 obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o
 obj-$(CONFIG_TEGRA_PCI)                 += pcie.o
 obj-$(CONFIG_USB_SUPPORT)               += usb_phy.o
diff --git a/arch/arm/mach-tegra/apbio.c b/arch/arm/mach-tegra/apbio.c
new file mode 100644
index 000000000000..e75451e517bd
--- /dev/null
+++ b/arch/arm/mach-tegra/apbio.c
@@ -0,0 +1,145 @@
+/*
+ * Copyright (C) 2010 NVIDIA Corporation.
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/dma-mapping.h>
+#include <linux/spinlock.h>
+#include <linux/completion.h>
+#include <linux/sched.h>
+#include <linux/mutex.h>
+
+#include <mach/dma.h>
+#include <mach/iomap.h>
+
+#include "apbio.h"
+
+static DEFINE_MUTEX(tegra_apb_dma_lock);
+
+static struct tegra_dma_channel *tegra_apb_dma;
+static u32 *tegra_apb_bb;
+static dma_addr_t tegra_apb_bb_phys;
+static DECLARE_COMPLETION(tegra_apb_wait);
+
+bool tegra_apb_init(void)
+{
+        struct tegra_dma_channel *ch;
+
+        mutex_lock(&tegra_apb_dma_lock);
+
+        /* Check to see if we raced to setup */
+        if (tegra_apb_dma)
+                goto out;
+
+        ch = tegra_dma_allocate_channel(TEGRA_DMA_MODE_ONESHOT |
+                TEGRA_DMA_SHARED);
+
+        if (!ch)
+                goto out_fail;
+
+        tegra_apb_bb = dma_alloc_coherent(NULL, sizeof(u32),
+                &tegra_apb_bb_phys, GFP_KERNEL);
+        if (!tegra_apb_bb) {
+                pr_err("%s: can not allocate bounce buffer\n", __func__);
+                tegra_dma_free_channel(ch);
+                goto out_fail;
+        }
+
+        tegra_apb_dma = ch;
+out:
+        mutex_unlock(&tegra_apb_dma_lock);
+        return true;
+
+out_fail:
+        mutex_unlock(&tegra_apb_dma_lock);
+        return false;
+}
+
+static void apb_dma_complete(struct tegra_dma_req *req)
+{
+        complete(&tegra_apb_wait);
+}
+
+u32 tegra_apb_readl(unsigned long offset)
+{
+        struct tegra_dma_req req;
+        int ret;
+
+        if (!tegra_apb_dma && !tegra_apb_init())
+                return readl(IO_TO_VIRT(offset));
+
+        mutex_lock(&tegra_apb_dma_lock);
+        req.complete = apb_dma_complete;
+        req.to_memory = 1;
+        req.dest_addr = tegra_apb_bb_phys;
+        req.dest_bus_width = 32;
+        req.dest_wrap = 1;
+        req.source_addr = offset;
+        req.source_bus_width = 32;
+        req.source_wrap = 4;
+        req.req_sel = TEGRA_DMA_REQ_SEL_CNTR;
+        req.size = 4;
+
+        INIT_COMPLETION(tegra_apb_wait);
+
+        tegra_dma_enqueue_req(tegra_apb_dma, &req);
+
+        ret = wait_for_completion_timeout(&tegra_apb_wait,
+                msecs_to_jiffies(50));
+
+        if (WARN(ret == 0, "apb read dma timed out")) {
+                tegra_dma_dequeue_req(tegra_apb_dma, &req);
+                *(u32 *)tegra_apb_bb = 0;
+        }
+
+        mutex_unlock(&tegra_apb_dma_lock);
+        return *((u32 *)tegra_apb_bb);
+}
+
+void tegra_apb_writel(u32 value, unsigned long offset)
+{
+        struct tegra_dma_req req;
+        int ret;
+
+        if (!tegra_apb_dma && !tegra_apb_init()) {
+                writel(value, IO_TO_VIRT(offset));
+                return;
+        }
+
+        mutex_lock(&tegra_apb_dma_lock);
+        *((u32 *)tegra_apb_bb) = value;
+        req.complete = apb_dma_complete;
+        req.to_memory = 0;
+        req.dest_addr = offset;
+        req.dest_wrap = 4;
+        req.dest_bus_width = 32;
+        req.source_addr = tegra_apb_bb_phys;
+        req.source_bus_width = 32;
+        req.source_wrap = 1;
+        req.req_sel = TEGRA_DMA_REQ_SEL_CNTR;
+        req.size = 4;
+
+        INIT_COMPLETION(tegra_apb_wait);
+
+        tegra_dma_enqueue_req(tegra_apb_dma, &req);
+
+        ret = wait_for_completion_timeout(&tegra_apb_wait,
+                msecs_to_jiffies(50));
+
+        if (WARN(ret == 0, "apb write dma timed out"))
+                tegra_dma_dequeue_req(tegra_apb_dma, &req);
+
+        mutex_unlock(&tegra_apb_dma_lock);
+}
diff --git a/arch/arm/mach-tegra/apbio.h b/arch/arm/mach-tegra/apbio.h
new file mode 100644
index 000000000000..8b49e8c89a64
--- /dev/null
+++ b/arch/arm/mach-tegra/apbio.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2010 NVIDIA Corporation.
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_TEGRA_APBIO_H
+#define __MACH_TEGRA_APBIO_H
+
+#ifdef CONFIG_TEGRA_SYSTEM_DMA
+
+u32 tegra_apb_readl(unsigned long offset);
+void tegra_apb_writel(u32 value, unsigned long offset);
+
+#else
+#include <asm/io.h>
+#include <mach/io.h>
+
+static inline u32 tegra_apb_readl(unsigned long offset)
+{
+        return readl(IO_TO_VIRT(offset));
+}
+
+static inline void tegra_apb_writel(u32 value, unsigned long offset)
+{
+        writel(value, IO_TO_VIRT(offset));
+}
+#endif
+
+#endif
diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c
index 21d1285731b3..976edfb05912 100644
--- a/arch/arm/mach-tegra/board-harmony-power.c
+++ b/arch/arm/mach-tegra/board-harmony-power.c
@@ -18,18 +18,13 @@
 #include <linux/i2c.h>
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
-#include <linux/io.h>
 #include <linux/regulator/machine.h>
 #include <linux/mfd/tps6586x.h>
 
-#include <mach/iomap.h>
 #include <mach/irqs.h>
 
 #include "board-harmony.h"
 
-#define PMC_CTRL                0x0
-#define PMC_CTRL_INTR_LOW       (1 << 17)
-
 static struct regulator_consumer_supply tps658621_ldo0_supply[] = {
         REGULATOR_SUPPLY("pex_clk", NULL),
 };
@@ -114,16 +109,6 @@ static struct i2c_board_info __initdata harmony_regulators[] = {
 
 int __init harmony_regulator_init(void)
 {
-        void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
-        u32 pmc_ctrl;
-
-        /*
-         * Configure the power management controller to trigger PMU
-         * interrupts when low
-         */
-        pmc_ctrl = readl(pmc + PMC_CTRL);
-        writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
-
         i2c_register_board_info(3, harmony_regulators, 1);
 
         return 0;
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 789bdc9e8f91..c00aadb01e09 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -101,7 +101,6 @@ static struct wm8903_platform_data harmony_wm8903_pdata = {
 static struct i2c_board_info __initdata wm8903_board_info = {
         I2C_BOARD_INFO("wm8903", 0x1a),
         .platform_data = &harmony_wm8903_pdata,
-        .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
 };
 
 static void __init harmony_i2c_init(void)
@@ -111,6 +110,7 @@ static void __init harmony_i2c_init(void)
         platform_device_register(&tegra_i2c_device3);
         platform_device_register(&tegra_i2c_device4);
 
+        wm8903_board_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
         i2c_register_board_info(0, &wm8903_board_info, 1);
 }
 
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index ebac65f52510..d669847f0485 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -159,7 +159,6 @@ static struct platform_device *seaboard_devices[] __initdata = {
 
 static struct i2c_board_info __initdata isl29018_device = {
         I2C_BOARD_INFO("isl29018", 0x44),
-        .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_ISL29018_IRQ),
 };
 
 static struct i2c_board_info __initdata adt7461_device = {
@@ -183,7 +182,6 @@ static struct wm8903_platform_data wm8903_pdata = {
 static struct i2c_board_info __initdata wm8903_device = {
         I2C_BOARD_INFO("wm8903", 0x1a),
         .platform_data = &wm8903_pdata,
-        .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
 };
 
 static int seaboard_ehci_init(void)
@@ -214,7 +212,10 @@ static void __init seaboard_i2c_init(void)
         gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018");
         gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ);
 
+        isl29018_device.irq = gpio_to_irq(TEGRA_GPIO_ISL29018_IRQ);
         i2c_register_board_info(0, &isl29018_device, 1);
+
+        wm8903_device.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
         i2c_register_board_info(0, &wm8903_device, 1);
 
         i2c_register_board_info(3, &adt7461_device, 1);
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 2db20da1d585..47ad750209ae 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -31,6 +31,24 @@
 #include "board.h"
 #include "clock.h"
 #include "fuse.h"
+#include "pmc.h"
+
+/*
+ * Storage for debug-macro.S's state.
+ *
+ * This must be in .data not .bss so that it gets initialized each time the
+ * kernel is loaded. The data is declared here rather than debug-macro.S so
+ * that multiple inclusions of debug-macro.S point at the same data.
+ */
+#define TEGRA_DEBUG_UART_OFFSET (TEGRA_DEBUG_UART_BASE & 0xFFFF)
+u32 tegra_uart_config[3] = {
+        /* Debug UART initialization required */
+        1,
+        /* Debug UART physical address */
+        (u32)(IO_APB_PHYS + TEGRA_DEBUG_UART_OFFSET),
+        /* Debug UART virtual address */
+        (u32)(IO_APB_VIRT + TEGRA_DEBUG_UART_OFFSET),
+};
 
 #ifdef CONFIG_OF
 static const struct of_device_id tegra_dt_irq_match[] __initconst = {
@@ -101,11 +119,13 @@ void __init tegra20_init_early(void)
         tegra2_init_clocks();
         tegra_clk_init_from_table(tegra20_clk_init_table);
         tegra_init_cache(0x331, 0x441);
+        tegra_pmc_init();
 }
 #endif
 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
 void __init tegra30_init_early(void)
 {
         tegra_init_cache(0x441, 0x551);
+        tegra_pmc_init();
 }
 #endif
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c
index c0cf967e47d3..abea4f6e2dd5 100644
--- a/arch/arm/mach-tegra/dma.c
+++ b/arch/arm/mach-tegra/dma.c
@@ -33,6 +33,8 @@
 #include <mach/iomap.h>
 #include <mach/suspend.h>
 
+#include "apbio.h"
+
 #define APB_DMA_GEN                             0x000
 #define GEN_ENABLE                              (1<<31)
 
@@ -50,8 +52,6 @@
 #define CSR_ONCE                                (1<<27)
 #define CSR_FLOW                                (1<<21)
 #define CSR_REQ_SEL_SHIFT                       16
-#define CSR_REQ_SEL_MASK                        (0x1F<<CSR_REQ_SEL_SHIFT)
-#define CSR_REQ_SEL_INVALID                     (31<<CSR_REQ_SEL_SHIFT)
 #define CSR_WCOUNT_SHIFT                        2
 #define CSR_WCOUNT_MASK                         0xFFFC
 
@@ -133,6 +133,7 @@ struct tegra_dma_channel {
 
 static bool tegra_dma_initialized;
 static DEFINE_MUTEX(tegra_dma_lock);
+static DEFINE_SPINLOCK(enable_lock);
 
 static DECLARE_BITMAP(channel_usage, NV_DMA_MAX_CHANNELS);
 static struct tegra_dma_channel dma_channels[NV_DMA_MAX_CHANNELS];
@@ -180,36 +181,94 @@ static void tegra_dma_stop(struct tegra_dma_channel *ch)
 
 static int tegra_dma_cancel(struct tegra_dma_channel *ch)
 {
-        u32 csr;
         unsigned long irq_flags;
 
         spin_lock_irqsave(&ch->lock, irq_flags);
         while (!list_empty(&ch->list))
                 list_del(ch->list.next);
 
-        csr = readl(ch->addr + APB_DMA_CHAN_CSR);
-        csr &= ~CSR_REQ_SEL_MASK;
-        csr |= CSR_REQ_SEL_INVALID;
-        writel(csr, ch->addr + APB_DMA_CHAN_CSR);
-
         tegra_dma_stop(ch);
 
         spin_unlock_irqrestore(&ch->lock, irq_flags);
         return 0;
 }
 
+static unsigned int get_channel_status(struct tegra_dma_channel *ch,
+                        struct tegra_dma_req *req, bool is_stop_dma)
+{
+        void __iomem *addr = IO_ADDRESS(TEGRA_APB_DMA_BASE);
+        unsigned int status;
+
+        if (is_stop_dma) {
+                /*
+                 * STOP the DMA and get the transfer count.
+                 * Getting the transfer count is tricky.
+                 *  - Globally disable DMA on all channels
+                 *  - Read the channel's status register to know the number
+                 *    of pending bytes to be transfered.
+                 *  - Stop the dma channel
+                 *  - Globally re-enable DMA to resume other transfers
+                 */
+                spin_lock(&enable_lock);
+                writel(0, addr + APB_DMA_GEN);
+                udelay(20);
+                status = readl(ch->addr + APB_DMA_CHAN_STA);
+                tegra_dma_stop(ch);
+                writel(GEN_ENABLE, addr + APB_DMA_GEN);
+                spin_unlock(&enable_lock);
+                if (status & STA_ISE_EOC) {
+                        pr_err("Got Dma Int here clearing");
+                        writel(status, ch->addr + APB_DMA_CHAN_STA);
+                }
+                req->status = TEGRA_DMA_REQ_ERROR_ABORTED;
+        } else {
+                status = readl(ch->addr + APB_DMA_CHAN_STA);
+        }
+        return status;
+}
+
+/* should be called with the channel lock held */
+static unsigned int dma_active_count(struct tegra_dma_channel *ch,
+        struct tegra_dma_req *req, unsigned int status)
+{
+        unsigned int to_transfer;
+        unsigned int req_transfer_count;
+        unsigned int bytes_transferred;
+
+        to_transfer = ((status & STA_COUNT_MASK) >> STA_COUNT_SHIFT) + 1;
+        req_transfer_count = ch->req_transfer_count + 1;
+        bytes_transferred = req_transfer_count;
+        if (status & STA_BUSY)
+                bytes_transferred -= to_transfer;
+        /*
+         * In continuous transfer mode, DMA only tracks the count of the
+         * half DMA buffer. So, if the DMA already finished half the DMA
+         * then add the half buffer to the completed count.
+         */
+        if (ch->mode & TEGRA_DMA_MODE_CONTINOUS) {
+                if (req->buffer_status == TEGRA_DMA_REQ_BUF_STATUS_HALF_FULL)
+                        bytes_transferred += req_transfer_count;
+                if (status & STA_ISE_EOC)
+                        bytes_transferred += req_transfer_count;
+        }
+        bytes_transferred *= 4;
+        return bytes_transferred;
+}
+
 int tegra_dma_dequeue_req(struct tegra_dma_channel *ch,
         struct tegra_dma_req *_req)
 {
-        unsigned int csr;
         unsigned int status;
         struct tegra_dma_req *req = NULL;
         int found = 0;
         unsigned long irq_flags;
-        int to_transfer;
-        int req_transfer_count;
+        int stop = 0;
 
         spin_lock_irqsave(&ch->lock, irq_flags);
+
+        if (list_entry(ch->list.next, struct tegra_dma_req, node) == _req)
+                stop = 1;
+
         list_for_each_entry(req, &ch->list, node) {
                 if (req == _req) {
                         list_del(&req->node);
@@ -222,47 +281,12 @@ int tegra_dma_dequeue_req(struct tegra_dma_channel *ch,
                 return 0;
         }
 
-        /* STOP the DMA and get the transfer count.
-         * Getting the transfer count is tricky.
-         *  - Change the source selector to invalid to stop the DMA from
-         *    FIFO to memory.
-         *  - Read the status register to know the number of pending
-         *    bytes to be transferred.
-         *  - Finally stop or program the DMA to the next buffer in the
-         *    list.
-         */
-        csr = readl(ch->addr + APB_DMA_CHAN_CSR);
-        csr &= ~CSR_REQ_SEL_MASK;
-        csr |= CSR_REQ_SEL_INVALID;
-        writel(csr, ch->addr + APB_DMA_CHAN_CSR);
-
-        /* Get the transfer count */
-        status = readl(ch->addr + APB_DMA_CHAN_STA);
-        to_transfer = (status & STA_COUNT_MASK) >> STA_COUNT_SHIFT;
-        req_transfer_count = ch->req_transfer_count;
-        req_transfer_count += 1;
-        to_transfer += 1;
-
-        req->bytes_transferred = req_transfer_count;
-
-        if (status & STA_BUSY)
-                req->bytes_transferred -= to_transfer;
-
-        /* In continuous transfer mode, DMA only tracks the count of the
-         * half DMA buffer. So, if the DMA already finished half the DMA
-         * then add the half buffer to the completed count.
-         *
-         *      FIXME: There can be a race here. What if the req to
-         *      dequue happens at the same time as the DMA just moved to
-         *      the new buffer and SW didn't yet received the interrupt?
-         */
-        if (ch->mode & TEGRA_DMA_MODE_CONTINOUS)
-                if (req->buffer_status == TEGRA_DMA_REQ_BUF_STATUS_HALF_FULL)
-                        req->bytes_transferred += req_transfer_count;
+        if (!stop)
+                goto skip_stop_dma;
 
-        req->bytes_transferred *= 4;
+        status = get_channel_status(ch, req, true);
+        req->bytes_transferred = dma_active_count(ch, req, status);
 
-        tegra_dma_stop(ch);
         if (!list_empty(&ch->list)) {
                 /* if the list is not empty, queue the next request */
                 struct tegra_dma_req *next_req;
@@ -270,6 +294,8 @@ int tegra_dma_dequeue_req(struct tegra_dma_channel *ch,
                         typeof(*next_req), node);
                 tegra_dma_update_hw(ch, next_req);
         }
+
+skip_stop_dma:
         req->status = -TEGRA_DMA_REQ_ERROR_ABORTED;
 
         spin_unlock_irqrestore(&ch->lock, irq_flags);
@@ -357,7 +383,7 @@ struct tegra_dma_channel *tegra_dma_allocate_channel(int mode)
         int channel;
         struct tegra_dma_channel *ch = NULL;
 
-        if (WARN_ON(!tegra_dma_initialized))
+        if (!tegra_dma_initialized)
                 return NULL;
 
         mutex_lock(&tegra_dma_lock);
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index 1fa26d9a1a68..17fdd4086e6f 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -23,20 +23,70 @@
 #include <mach/iomap.h>
 
 #include "fuse.h"
+#include "apbio.h"
 
 #define FUSE_UID_LOW            0x108
 #define FUSE_UID_HIGH           0x10c
 #define FUSE_SKU_INFO           0x110
 #define FUSE_SPARE_BIT          0x200
 
-static inline u32 fuse_readl(unsigned long offset)
+int tegra_sku_id;
+int tegra_cpu_process_id;
+int tegra_core_process_id;
+enum tegra_revision tegra_revision;
+
+/* The BCT to use at boot is specified by board straps that can be read
+ * through a APB misc register and decoded. 2 bits, i.e. 4 possible BCTs.
+ */
+int tegra_bct_strapping;
+
+#define STRAP_OPT 0x008
+#define GMI_AD0 (1 << 4)
+#define GMI_AD1 (1 << 5)
+#define RAM_ID_MASK (GMI_AD0 | GMI_AD1)
+#define RAM_CODE_SHIFT 4
+
+static const char *tegra_revision_name[TEGRA_REVISION_MAX] = {
+        [TEGRA_REVISION_UNKNOWN] = "unknown",
+        [TEGRA_REVISION_A01]     = "A01",
+        [TEGRA_REVISION_A02]     = "A02",
+        [TEGRA_REVISION_A03]     = "A03",
+        [TEGRA_REVISION_A03p]    = "A03 prime",
+        [TEGRA_REVISION_A04]     = "A04",
+};
+
+static inline u32 tegra_fuse_readl(unsigned long offset)
+{
+        return tegra_apb_readl(TEGRA_FUSE_BASE + offset);
+}
+
+static inline bool get_spare_fuse(int bit)
 {
-        return readl(IO_TO_VIRT(TEGRA_FUSE_BASE + offset));
+        return tegra_fuse_readl(FUSE_SPARE_BIT + bit * 4);
 }
 
-static inline void fuse_writel(u32 value, unsigned long offset)
+static enum tegra_revision tegra_get_revision(void)
 {
-        writel(value, IO_TO_VIRT(TEGRA_FUSE_BASE + offset));
+        void __iomem *chip_id = IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804;
+        u32 id = readl(chip_id);
+        u32 minor_rev = (id >> 16) & 0xf;
+        u32 chipid = (id >> 8) & 0xff;
+
+        switch (minor_rev) {
+        case 1:
+                return TEGRA_REVISION_A01;
+        case 2:
+                return TEGRA_REVISION_A02;
+        case 3:
+                if (chipid == 0x20 && (get_spare_fuse(18) || get_spare_fuse(19)))
+                        return TEGRA_REVISION_A03p;
+                else
+                        return TEGRA_REVISION_A03;
+        case 4:
+                return TEGRA_REVISION_A04;
+        default:
+                return TEGRA_REVISION_UNKNOWN;
+        }
 }
 
 void tegra_init_fuse(void)
@@ -45,40 +95,31 @@ void tegra_init_fuse(void)
         reg |= 1 << 28;
         writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
 
-        pr_info("Tegra SKU: %d CPU Process: %d Core Process: %d\n",
-                tegra_sku_id(), tegra_cpu_process_id(),
-                tegra_core_process_id());
-}
+        reg = tegra_fuse_readl(FUSE_SKU_INFO);
+        tegra_sku_id = reg & 0xFF;
 
-unsigned long long tegra_chip_uid(void)
-{
-        unsigned long long lo, hi;
+        reg = tegra_fuse_readl(FUSE_SPARE_BIT);
+        tegra_cpu_process_id = (reg >> 6) & 3;
 
-        lo = fuse_readl(FUSE_UID_LOW);
-        hi = fuse_readl(FUSE_UID_HIGH);
-        return (hi << 32ull) | lo;
-}
+        reg = tegra_fuse_readl(FUSE_SPARE_BIT);
+        tegra_core_process_id = (reg >> 12) & 3;
 
-int tegra_sku_id(void)
-{
-        int sku_id;
-        u32 reg = fuse_readl(FUSE_SKU_INFO);
-        sku_id = reg & 0xFF;
-        return sku_id;
-}
+        reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT);
+        tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT;
 
-int tegra_cpu_process_id(void)
-{
-        int cpu_process_id;
-        u32 reg = fuse_readl(FUSE_SPARE_BIT);
-        cpu_process_id = (reg >> 6) & 3;
-        return cpu_process_id;
+        tegra_revision = tegra_get_revision();
+
+        pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
+                tegra_revision_name[tegra_get_revision()],
+                tegra_sku_id, tegra_cpu_process_id,
+                tegra_core_process_id);
 }
 
-int tegra_core_process_id(void)
+unsigned long long tegra_chip_uid(void)
 {
-        int core_process_id;
-        u32 reg = fuse_readl(FUSE_SPARE_BIT);
-        core_process_id = (reg >> 12) & 3;
-        return core_process_id;
+        unsigned long long lo, hi;
+
+        lo = tegra_fuse_readl(FUSE_UID_LOW);
+        hi = tegra_fuse_readl(FUSE_UID_HIGH);
+        return (hi << 32ull) | lo;
 }
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h
index 584b2e27dbda..d65d2abf803b 100644
--- a/arch/arm/mach-tegra/fuse.h
+++ b/arch/arm/mach-tegra/fuse.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/mach-tegra/fuse.c
- *
  * Copyright (C) 2010 Google, Inc.
  *
  * Author:
@@ -17,8 +15,34 @@
  *
  */
 
+#ifndef __MACH_TEGRA_FUSE_H
+#define __MACH_TEGRA_FUSE_H
+
+enum tegra_revision {
+        TEGRA_REVISION_UNKNOWN = 0,
+        TEGRA_REVISION_A01,
+        TEGRA_REVISION_A02,
+        TEGRA_REVISION_A03,
+        TEGRA_REVISION_A03p,
+        TEGRA_REVISION_A04,
+        TEGRA_REVISION_MAX,
+};
+
+#define SKU_ID_T20      8
+#define SKU_ID_T25SE    20
+#define SKU_ID_AP25     23
+#define SKU_ID_T25      24
+#define SKU_ID_AP25E    27
+#define SKU_ID_T25E     28
+
+extern int tegra_sku_id;
+extern int tegra_cpu_process_id;
+extern int tegra_core_process_id;
+extern enum tegra_revision tegra_revision;
+
+extern int tegra_bct_strapping;
+
 unsigned long long tegra_chip_uid(void);
-int tegra_sku_id(void);
-int tegra_cpu_process_id(void);
-int tegra_core_process_id(void);
 void tegra_init_fuse(void);
+
+#endif
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 619abc63aee8..90069abd37bd 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -1,11 +1,17 @@
 /*
  * arch/arm/mach-tegra/include/mach/debug-macro.S
  *
- * Copyright (C) 2010 Google, Inc.
+ * Copyright (C) 2010,2011 Google, Inc.
+ * Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved.
  *
  * Author:
  *      Colin Cross <ccross@google.com>
  *      Erik Gilling <konkers@google.com>
+ *      Doug Anderson <dianders@chromium.org>
+ *      Stephen Warren <swarren@nvidia.com>
+ *
+ * Portions based on mach-omap2's debug-macro.S
+ * Copyright (C) 1994-1999 Russell King
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -18,18 +24,78 @@
  *
  */
 
+#include <linux/serial_reg.h>
+
 #include <mach/io.h>
 #include <mach/iomap.h>
+#include <mach/irammap.h>
+
+                .macro  addruart, rp, rv, tmp
+                adr     \rp, 99f                @ actual addr of 99f
+                ldr     \rv, [\rp]              @ linked addr is stored there
+                sub     \rv, \rv, \rp           @ offset between the two
+                ldr     \rp, [\rp, #4]          @ linked tegra_uart_config
+                sub     \tmp, \rp, \rv          @ actual tegra_uart_config
+                ldr     \rp, [\tmp]             @ Load tegra_uart_config
+                cmp     \rp, #1                 @ needs intitialization?
+                bne     100f                    @ no; go load the addresses
+                mov     \rv, #0                 @ yes; record init is done
+                str     \rv, [\tmp]
+                mov     \rp, #TEGRA_IRAM_BASE   @ See if cookie is in IRAM
+                ldr     \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET]
+                movw    \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE & 0xffff
+                movt    \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE >> 16
+                cmp     \rv, \rp                @ Cookie present?
+                bne     100f                    @ No, use default UART
+                mov     \rp, #TEGRA_IRAM_BASE   @ Load UART address from IRAM
+                ldr     \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET + 4]
+                str     \rv, [\tmp, #4]         @ Store in tegra_uart_phys
+                sub     \rv, \rv, #IO_APB_PHYS  @ Calculate virt address
+                add     \rv, \rv, #IO_APB_VIRT
+                str     \rv, [\tmp, #8]         @ Store in tegra_uart_virt
+                b       100f
+
+                .align
+99:             .word   .
+                .word   tegra_uart_config
+                .ltorg
+
+100:            ldr     \rp, [\tmp, #4]         @ Load tegra_uart_phys
+                ldr     \rv, [\tmp, #8]         @ Load tegra_uart_virt
+                .endm
+
+#define UART_SHIFT 2
+
+/*
+ * Code below is swiped from <asm/hardware/debug-8250.S>, but add an extra
+ * check to make sure that we aren't in the CONFIG_TEGRA_DEBUG_UART_NONE case.
+ * We use the fact that all 5 valid UART addresses all have something in the
+ * 2nd-to-lowest byte.
+ */
 
-        .macro  addruart, rp, rv, tmp
-        ldr     \rp, =IO_APB_PHYS       @ physical
-        ldr     \rv, =IO_APB_VIRT        @ virtual
-        orr     \rp, \rp, #(TEGRA_DEBUG_UART_BASE & 0xFF)
-        orr     \rp, \rp, #(TEGRA_DEBUG_UART_BASE & 0xFF00)
-        orr     \rv, \rv, #(TEGRA_DEBUG_UART_BASE & 0xFF)
-        orr     \rv, \rv, #(TEGRA_DEBUG_UART_BASE & 0xFF00)
-        .endm
+                .macro  senduart, rd, rx
+                tst     \rx, #0x0000ff00
+                strneb  \rd, [\rx, #UART_TX << UART_SHIFT]
+1001:
+                .endm
 
-#define UART_SHIFT      2
-#include <asm/hardware/debug-8250.S>
+                .macro  busyuart, rd, rx
+                tst     \rx, #0x0000ff00
+                beq     1002f
+1001:           ldrb    \rd, [\rx, #UART_LSR << UART_SHIFT]
+                and     \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
+                teq     \rd, #UART_LSR_TEMT | UART_LSR_THRE
+                bne     1001b
+1002:
+                .endm
 
+                .macro  waituart, rd, rx
+#ifdef FLOW_CONTROL
+                tst     \rx, #0x0000ff00
+                beq     1002f
+1001:           ldrb    \rd, [\rx, #UART_MSR << UART_SHIFT]
+                tst     \rd, #UART_MSR_CTS
+                beq     1001b
+1002:
+#endif
+                .endm
diff --git a/arch/arm/mach-tegra/include/mach/gpio-tegra.h b/arch/arm/mach-tegra/include/mach/gpio-tegra.h
index 87d37fdf5084..6140820555e1 100644
--- a/arch/arm/mach-tegra/include/mach/gpio-tegra.h
+++ b/arch/arm/mach-tegra/include/mach/gpio-tegra.h
@@ -25,8 +25,6 @@
 
 #define TEGRA_NR_GPIOS          INT_GPIO_NR
 
-#define TEGRA_GPIO_TO_IRQ(gpio) (INT_GPIO_BASE + (gpio))
-
 struct tegra_gpio_table {
         int     gpio;   /* GPIO number */
         bool    enable; /* Enable for GPIO at init? */
diff --git a/arch/arm/mach-tegra/include/mach/irammap.h b/arch/arm/mach-tegra/include/mach/irammap.h
new file mode 100644
index 000000000000..0cbe63261854
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/irammap.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __MACH_TEGRA_IRAMMAP_H
+#define __MACH_TEGRA_IRAMMAP_H
+
+#include <asm/sizes.h>
+
+/* The first 1K of IRAM is permanently reserved for the CPU reset handler */
+#define TEGRA_IRAM_RESET_HANDLER_OFFSET 0
+#define TEGRA_IRAM_RESET_HANDLER_SIZE   SZ_1K
+
+/*
+ * These locations are written to by uncompress.h, and read by debug-macro.S.
+ * The first word holds the cookie value if the data is valid. The second
+ * word holds the UART physical address.
+ */
+#define TEGRA_IRAM_DEBUG_UART_OFFSET    SZ_1K
+#define TEGRA_IRAM_DEBUG_UART_SIZE      8
+#define TEGRA_IRAM_DEBUG_UART_COOKIE    0x55415254
+
+#endif
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 4e8323770c79..5a440f315e57 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -2,10 +2,14 @@
  * arch/arm/mach-tegra/include/mach/uncompress.h
  *
  * Copyright (C) 2010 Google, Inc.
+ * Copyright (C) 2011 Google, Inc.
+ * Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved.
  *
  * Author:
  *      Colin Cross <ccross@google.com>
  *      Erik Gilling <konkers@google.com>
+ *      Doug Anderson <dianders@chromium.org>
+ *      Stephen Warren <swarren@nvidia.com>
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -25,36 +29,130 @@
 #include <linux/serial_reg.h>
 
 #include <mach/iomap.h>
+#include <mach/irammap.h>
+
+#define BIT(x) (1 << (x))
+#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
+
+#define DEBUG_UART_SHIFT 2
+
+volatile u8 *uart;
 
 static void putc(int c)
 {
-        volatile u8 *uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE;
-        int shift = 2;
-
         if (uart == NULL)
                 return;
 
-        while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
+        while (!(uart[UART_LSR << DEBUG_UART_SHIFT] & UART_LSR_THRE))
                 barrier();
-        uart[UART_TX << shift] = c;
+        uart[UART_TX << DEBUG_UART_SHIFT] = c;
 }
 
 static inline void flush(void)
 {
 }
 
+static inline void save_uart_address(void)
+{
+        u32 *buf = (u32 *)(TEGRA_IRAM_BASE + TEGRA_IRAM_DEBUG_UART_OFFSET);
+
+        if (uart) {
+                buf[0] = TEGRA_IRAM_DEBUG_UART_COOKIE;
+                buf[1] = (u32)uart;
+        } else
+                buf[0] = 0;
+}
+
+/*
+ * Setup before decompression.  This is where we do UART selection for
+ * earlyprintk and init the uart_base register.
+ */
 static inline void arch_decomp_setup(void)
 {
-        volatile u8 *uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE;
-        int shift = 2;
+        static const struct {
+                u32 base;
+                u32 reset_reg;
+                u32 clock_reg;
+                u32 bit;
+        } uarts[] = {
+                {
+                        TEGRA_UARTA_BASE,
+                        TEGRA_CLK_RESET_BASE + 0x04,
+                        TEGRA_CLK_RESET_BASE + 0x10,
+                        6,
+                },
+                {
+                        TEGRA_UARTB_BASE,
+                        TEGRA_CLK_RESET_BASE + 0x04,
+                        TEGRA_CLK_RESET_BASE + 0x10,
+                        7,
+                },
+                {
+                        TEGRA_UARTC_BASE,
+                        TEGRA_CLK_RESET_BASE + 0x08,
+                        TEGRA_CLK_RESET_BASE + 0x14,
+                        23,
+                },
+                {
+                        TEGRA_UARTD_BASE,
+                        TEGRA_CLK_RESET_BASE + 0x0c,
+                        TEGRA_CLK_RESET_BASE + 0x18,
+                        1,
+                },
+                {
+                        TEGRA_UARTE_BASE,
+                        TEGRA_CLK_RESET_BASE + 0x0c,
+                        TEGRA_CLK_RESET_BASE + 0x18,
+                        2,
+                },
+        };
+        int i;
+        volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE;
+        u32 chip, div;
+
+        /*
+         * Look for the first UART that:
+         * a) Is not in reset.
+         * b) Is clocked.
+         * c) Has a 'D' in the scratchpad register.
+         *
+         * Note that on Tegra30, the first two conditions are required, since
+         * if not true, accesses to the UART scratch register will hang.
+         * Tegra20 doesn't have this issue.
+         *
+         * The intent is that the bootloader will tell the kernel which UART
+         * to use by setting up those conditions. If nothing found, we'll fall
+         * back to what's specified in TEGRA_DEBUG_UART_BASE.
+         */
+        for (i = 0; i < ARRAY_SIZE(uarts); i++) {
+                if (*(u8 *)uarts[i].reset_reg & BIT(uarts[i].bit))
+                        continue;
 
+                if (!(*(u8 *)uarts[i].clock_reg & BIT(uarts[i].bit)))
+                        continue;
+
+                uart = (volatile u8 *)uarts[i].base;
+                if (uart[UART_SCR << DEBUG_UART_SHIFT] != 'D')
+                        continue;
+
+                break;
+        }
+        if (i == ARRAY_SIZE(uarts))
+                uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE;
+        save_uart_address();
         if (uart == NULL)
                 return;
 
-        uart[UART_LCR << shift] |= UART_LCR_DLAB;
-        uart[UART_DLL << shift] = 0x75;
-        uart[UART_DLM << shift] = 0x0;
-        uart[UART_LCR << shift] = 3;
+        chip = (apb_misc[0x804 / 4] >> 8) & 0xff;
+        if (chip == 0x20)
+                div = 0x0075;
+        else
+                div = 0x00dd;
+
+        uart[UART_LCR << DEBUG_UART_SHIFT] |= UART_LCR_DLAB;
+        uart[UART_DLL << DEBUG_UART_SHIFT] = div & 0xff;
+        uart[UART_DLM << DEBUG_UART_SHIFT] = div >> 8;
+        uart[UART_LCR << DEBUG_UART_SHIFT] = 3;
 }
 
 static inline void arch_decomp_wdog(void)
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
new file mode 100644
index 000000000000..7af6a54404be
--- /dev/null
+++ b/arch/arm/mach-tegra/pmc.c
@@ -0,0 +1,76 @@
+/*
+ * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/of.h>
+
+#include <mach/iomap.h>
+
+#define PMC_CTRL                0x0
+#define PMC_CTRL_INTR_LOW       (1 << 17)
+
+static inline u32 tegra_pmc_readl(u32 reg)
+{
+        return readl(IO_ADDRESS(TEGRA_PMC_BASE + reg));
+}
+
+static inline void tegra_pmc_writel(u32 val, u32 reg)
+{
+        writel(val, IO_ADDRESS(TEGRA_PMC_BASE + reg));
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id matches[] __initconst = {
+        { .compatible = "nvidia,tegra20-pmc" },
+        { }
+};
+#endif
+
+void __init tegra_pmc_init(void)
+{
+        /*
+         * For now, Harmony is the only board that uses the PMC, and it wants
+         * the signal inverted. Seaboard would too if it used the PMC.
+         * Hopefully by the time other boards want to use the PMC, everything
+         * will be device-tree, or they also want it inverted.
+         */
+        bool invert_interrupt = true;
+        u32 val;
+
+#ifdef CONFIG_OF
+        if (of_have_populated_dt()) {
+                struct device_node *np;
+
+                invert_interrupt = false;
+
+                np = of_find_matching_node(NULL, matches);
+                if (np) {
+                        if (of_find_property(np, "nvidia,invert-interrupt",
+                                                NULL))
+                                invert_interrupt = true;
+                }
+        }
+#endif
+
+        val = tegra_pmc_readl(PMC_CTRL);
+        if (invert_interrupt)
+                val |= PMC_CTRL_INTR_LOW;
+        else
+                val &= ~PMC_CTRL_INTR_LOW;
+        tegra_pmc_writel(val, PMC_CTRL);
+}
diff --git a/arch/arm/mach-tegra/pmc.h b/arch/arm/mach-tegra/pmc.h
new file mode 100644
index 000000000000..8995ee4a8768
--- /dev/null
+++ b/arch/arm/mach-tegra/pmc.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
+#ifndef __MACH_TEGRA_PMC_H
+#define __MACH_TEGRA_PMC_H
+
+void tegra_pmc_init(void);
+
+#endif
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index ff9e6b6c0460..74d314fdf2f9 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -720,7 +720,7 @@ static void tegra2_pllx_clk_init(struct clk *c)
 {
         tegra2_pll_clk_init(c);
 
-        if (tegra_sku_id() == 7)
+        if (tegra_sku_id == 7)
                 c->max_rate = 750000000;
 }
 
diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c
index 0f7ae6e90b55..5070d833bdd1 100644
--- a/arch/arm/mach-tegra/tegra2_emc.c
+++ b/arch/arm/mach-tegra/tegra2_emc.c
@@ -16,14 +16,19 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/device.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/tegra_emc.h>
 
 #include <mach/iomap.h>
 
 #include "tegra2_emc.h"
+#include "fuse.h"
 
 #ifdef CONFIG_TEGRA_EMC_SCALING_ENABLE
 static bool emc_enable = true;
@@ -32,18 +37,17 @@ static bool emc_enable;
 #endif
 module_param(emc_enable, bool, 0644);
 
-static void __iomem *emc = IO_ADDRESS(TEGRA_EMC_BASE);
-static const struct tegra_emc_table *tegra_emc_table;
-static int tegra_emc_table_size;
+static struct platform_device *emc_pdev;
+static void __iomem *emc_regbase;
 
 static inline void emc_writel(u32 val, unsigned long addr)
 {
-        writel(val, emc + addr);
+        writel(val, emc_regbase + addr);
 }
 
 static inline u32 emc_readl(unsigned long addr)
 {
-        return readl(emc + addr);
+        return readl(emc_regbase + addr);
 }
 
 static const unsigned long emc_reg_addr[TEGRA_EMC_NUM_REGS] = {
@@ -98,15 +102,15 @@ static const unsigned long emc_reg_addr[TEGRA_EMC_NUM_REGS] = {
 /* Select the closest EMC rate that is higher than the requested rate */
 long tegra_emc_round_rate(unsigned long rate)
 {
+        struct tegra_emc_pdata *pdata;
         int i;
         int best = -1;
         unsigned long distance = ULONG_MAX;
 
-        if (!tegra_emc_table)
+        if (!emc_pdev)
                 return -EINVAL;
 
-        if (!emc_enable)
-                return -EINVAL;
+        pdata = emc_pdev->dev.platform_data;
 
         pr_debug("%s: %lu\n", __func__, rate);
 
@@ -116,10 +120,10 @@ long tegra_emc_round_rate(unsigned long rate)
          */
         rate = rate / 2 / 1000;
 
-        for (i = 0; i < tegra_emc_table_size; i++) {
-                if (tegra_emc_table[i].rate >= rate &&
-                    (tegra_emc_table[i].rate - rate) < distance) {
-                        distance = tegra_emc_table[i].rate - rate;
+        for (i = 0; i < pdata->num_tables; i++) {
+                if (pdata->tables[i].rate >= rate &&
+                    (pdata->tables[i].rate - rate) < distance) {
+                        distance = pdata->tables[i].rate - rate;
                         best = i;
                 }
         }
@@ -127,9 +131,9 @@ long tegra_emc_round_rate(unsigned long rate)
         if (best < 0)
                 return -EINVAL;
 
-        pr_debug("%s: using %lu\n", __func__, tegra_emc_table[best].rate);
+        pr_debug("%s: using %lu\n", __func__, pdata->tables[best].rate);
 
-        return tegra_emc_table[best].rate * 2 * 1000;
+        return pdata->tables[best].rate * 2 * 1000;
 }
 
 /*
@@ -142,37 +146,211 @@ long tegra_emc_round_rate(unsigned long rate)
  */
 int tegra_emc_set_rate(unsigned long rate)
 {
+        struct tegra_emc_pdata *pdata;
         int i;
         int j;
 
-        if (!tegra_emc_table)
+        if (!emc_pdev)
                 return -EINVAL;
 
+        pdata = emc_pdev->dev.platform_data;
+
         /*
          * The EMC clock rate is twice the bus rate, and the bus rate is
          * measured in kHz
          */
         rate = rate / 2 / 1000;
 
-        for (i = 0; i < tegra_emc_table_size; i++)
-                if (tegra_emc_table[i].rate == rate)
+        for (i = 0; i < pdata->num_tables; i++)
+                if (pdata->tables[i].rate == rate)
                         break;
 
-        if (i >= tegra_emc_table_size)
+        if (i >= pdata->num_tables)
                 return -EINVAL;
 
         pr_debug("%s: setting to %lu\n", __func__, rate);
 
         for (j = 0; j < TEGRA_EMC_NUM_REGS; j++)
-                emc_writel(tegra_emc_table[i].regs[j], emc_reg_addr[j]);
+                emc_writel(pdata->tables[i].regs[j], emc_reg_addr[j]);
 
-        emc_readl(tegra_emc_table[i].regs[TEGRA_EMC_NUM_REGS - 1]);
+        emc_readl(pdata->tables[i].regs[TEGRA_EMC_NUM_REGS - 1]);
 
         return 0;
 }
 
-void tegra_init_emc(const struct tegra_emc_table *table, int table_size)
+#ifdef CONFIG_OF
+static struct device_node *tegra_emc_ramcode_devnode(struct device_node *np)
+{
+        struct device_node *iter;
+        u32 reg;
+
+        for_each_child_of_node(np, iter) {
+                if (of_property_read_u32(np, "nvidia,ram-code", &reg))
+                        continue;
+                if (reg == tegra_bct_strapping)
+                        return of_node_get(iter);
+        }
+
+        return NULL;
+}
+
+static struct tegra_emc_pdata *tegra_emc_dt_parse_pdata(
+                struct platform_device *pdev)
+{
+        struct device_node *np = pdev->dev.of_node;
+        struct device_node *tnp, *iter;
+        struct tegra_emc_pdata *pdata;
+        int ret, i, num_tables;
+
+        if (!np)
+                return NULL;
+
+        if (of_find_property(np, "nvidia,use-ram-code", NULL)) {
+                tnp = tegra_emc_ramcode_devnode(np);
+                if (!tnp)
+                        dev_warn(&pdev->dev,
+                                 "can't find emc table for ram-code 0x%02x\n",
+                                 tegra_bct_strapping);
+        } else
+                tnp = of_node_get(np);
+
+        if (!tnp)
+                return NULL;
+
+        num_tables = 0;
+        for_each_child_of_node(tnp, iter)
+                if (of_device_is_compatible(iter, "nvidia,tegra20-emc-table"))
+                        num_tables++;
+
+        if (!num_tables) {
+                pdata = NULL;
+                goto out;
+        }
+
+        pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+        pdata->tables = devm_kzalloc(&pdev->dev,
+                                     sizeof(*pdata->tables) * num_tables,
+                                     GFP_KERNEL);
+
+        i = 0;
+        for_each_child_of_node(tnp, iter) {
+                u32 prop;
+
+                ret = of_property_read_u32(iter, "clock-frequency", &prop);
+                if (ret) {
+                        dev_err(&pdev->dev, "no clock-frequency in %s\n",
+                                iter->full_name);
+                        continue;
+                }
+                pdata->tables[i].rate = prop;
+
+                ret = of_property_read_u32_array(iter, "nvidia,emc-registers",
+                                                 pdata->tables[i].regs,
+                                                 TEGRA_EMC_NUM_REGS);
+                if (ret) {
+                        dev_err(&pdev->dev,
+                                "malformed emc-registers property in %s\n",
+                                iter->full_name);
+                        continue;
+                }
+
+                i++;
+        }
+        pdata->num_tables = i;
+
+out:
+        of_node_put(tnp);
+        return pdata;
+}
+#else
+static struct tegra_emc_pdata *tegra_emc_dt_parse_pdata(
+                struct platform_device *pdev)
+{
+        return NULL;
+}
+#endif
+
+static struct tegra_emc_pdata __devinit *tegra_emc_fill_pdata(struct platform_device *pdev)
+{
+        struct clk *c = clk_get_sys(NULL, "emc");
+        struct tegra_emc_pdata *pdata;
+        unsigned long khz;
+        int i;
+
+        WARN_ON(pdev->dev.platform_data);
+        BUG_ON(IS_ERR_OR_NULL(c));
+
+        pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+        pdata->tables = devm_kzalloc(&pdev->dev, sizeof(*pdata->tables),
+                                     GFP_KERNEL);
+
+        pdata->tables[0].rate = clk_get_rate(c) / 2 / 1000;
+
+        for (i = 0; i < TEGRA_EMC_NUM_REGS; i++)
+                pdata->tables[0].regs[i] = emc_readl(emc_reg_addr[i]);
+
+        pdata->num_tables = 1;
+
+        khz = pdata->tables[0].rate;
+        dev_info(&pdev->dev, "no tables provided, using %ld kHz emc, "
+                 "%ld kHz mem\n", khz * 2, khz);
+
+        return pdata;
+}
+
+static int __devinit tegra_emc_probe(struct platform_device *pdev)
+{
+        struct tegra_emc_pdata *pdata;
+        struct resource *res;
+
+        if (!emc_enable) {
+                dev_err(&pdev->dev, "disabled per module parameter\n");
+                return -ENODEV;
+        }
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                dev_err(&pdev->dev, "missing register base\n");
+                return -ENOMEM;
+        }
+
+        emc_regbase = devm_request_and_ioremap(&pdev->dev, res);
+        if (!emc_regbase) {
+                dev_err(&pdev->dev, "failed to remap registers\n");
+                return -ENOMEM;
+        }
+
+        pdata = pdev->dev.platform_data;
+
+        if (!pdata)
+                pdata = tegra_emc_dt_parse_pdata(pdev);
+
+        if (!pdata)
+                pdata = tegra_emc_fill_pdata(pdev);
+
+        pdev->dev.platform_data = pdata;
+
+        emc_pdev = pdev;
+
+        return 0;
+}
+
+static struct of_device_id tegra_emc_of_match[] __devinitdata = {
+        { .compatible = "nvidia,tegra20-emc", },
+        { },
+};
+
+static struct platform_driver tegra_emc_driver = {
+        .driver         = {
+                .name   = "tegra-emc",
+                .owner  = THIS_MODULE,
+                .of_match_table = tegra_emc_of_match,
+        },
+        .probe          = tegra_emc_probe,
+};
+
+static int __init tegra_emc_init(void)
 {
-        tegra_emc_table = table;
-        tegra_emc_table_size = table_size;
+        return platform_driver_register(&tegra_emc_driver);
 }
+device_initcall(tegra_emc_init);
diff --git a/arch/arm/mach-tegra/tegra2_emc.h b/arch/arm/mach-tegra/tegra2_emc.h
index 19f08cb31603..f61409b54cb7 100644
--- a/arch/arm/mach-tegra/tegra2_emc.h
+++ b/arch/arm/mach-tegra/tegra2_emc.h
@@ -15,13 +15,10 @@
  *
  */
 
-#define TEGRA_EMC_NUM_REGS 46
-
-struct tegra_emc_table {
-        unsigned long rate;
-        u32 regs[TEGRA_EMC_NUM_REGS];
-};
+#ifndef __MACH_TEGRA_TEGRA2_EMC_H_
+#define __MACH_TEGRA_TEGRA2_EMC_H
 
 int tegra_emc_set_rate(unsigned long rate);
 long tegra_emc_round_rate(unsigned long rate);
-void tegra_init_emc(const struct tegra_emc_table *table, int table_size);
+
+#endif
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 4f352e45be0a..0968772aedbe 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -98,8 +98,11 @@ static const struct of_device_id sic_of_match[] __initconst = {
 
 void __init versatile_init_irq(void)
 {
-        vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0);
-        irq_domain_generate_simple(vic_of_match, VERSATILE_VIC_BASE, IRQ_VIC_START);
+        struct device_node *np;
+
+        np = of_find_matching_node_by_address(NULL, vic_of_match,
+                                              VERSATILE_VIC_BASE);
+        __vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0, np);
 
         writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
 
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c
index 8cced35009bd..0e51fc36b5be 100644
--- a/arch/arm/plat-mxc/audmux-v2.c
+++ b/arch/arm/plat-mxc/audmux-v2.c
@@ -73,13 +73,13 @@ static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
                 return -ENOMEM;
 
         if (audmux_clk)
-                clk_enable(audmux_clk);
+                clk_prepare_enable(audmux_clk);
 
         ptcr = readl(audmux_base + MXC_AUDMUX_V2_PTCR(port));
         pdcr = readl(audmux_base + MXC_AUDMUX_V2_PDCR(port));
 
         if (audmux_clk)
-                clk_disable(audmux_clk);
+                clk_disable_unprepare(audmux_clk);
 
         ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n",
                        pdcr, ptcr);
@@ -172,13 +172,13 @@ int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
                 return -ENOSYS;
 
         if (audmux_clk)
-                clk_enable(audmux_clk);
+                clk_prepare_enable(audmux_clk);
 
         writel(ptcr, audmux_base + MXC_AUDMUX_V2_PTCR(port));
         writel(pdcr, audmux_base + MXC_AUDMUX_V2_PDCR(port));
 
         if (audmux_clk)
-                clk_disable(audmux_clk);
+                clk_disable_unprepare(audmux_clk);
 
         return 0;
 }
diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/plat-mxc/devices/platform-ahci-imx.c
index d8a56aee521b..ade4a1c4e2a3 100644
--- a/arch/arm/plat-mxc/devices/platform-ahci-imx.c
+++ b/arch/arm/plat-mxc/devices/platform-ahci-imx.c
@@ -60,9 +60,9 @@ static int imx_sata_init(struct device *dev, void __iomem *addr)
                 dev_err(dev, "no sata clock.\n");
                 return PTR_ERR(sata_clk);
         }
-        ret = clk_enable(sata_clk);
+        ret = clk_prepare_enable(sata_clk);
         if (ret) {
-                dev_err(dev, "can't enable sata clock.\n");
+                dev_err(dev, "can't prepare/enable sata clock.\n");
                 goto put_sata_clk;
         }
 
@@ -73,9 +73,9 @@ static int imx_sata_init(struct device *dev, void __iomem *addr)
                 ret = PTR_ERR(sata_ref_clk);
                 goto release_sata_clk;
         }
-        ret = clk_enable(sata_ref_clk);
+        ret = clk_prepare_enable(sata_ref_clk);
         if (ret) {
-                dev_err(dev, "can't enable sata ref clock.\n");
+                dev_err(dev, "can't prepare/enable sata ref clock.\n");
                 goto put_sata_ref_clk;
         }
 
@@ -104,11 +104,11 @@ static int imx_sata_init(struct device *dev, void __iomem *addr)
         return 0;
 
 release_sata_ref_clk:
-        clk_disable(sata_ref_clk);
+        clk_disable_unprepare(sata_ref_clk);
 put_sata_ref_clk:
         clk_put(sata_ref_clk);
 release_sata_clk:
-        clk_disable(sata_clk);
+        clk_disable_unprepare(sata_clk);
 put_sata_clk:
         clk_put(sata_clk);
 
@@ -117,10 +117,10 @@ put_sata_clk:
 
 static void imx_sata_exit(struct device *dev)
 {
-        clk_disable(sata_ref_clk);
+        clk_disable_unprepare(sata_ref_clk);
         clk_put(sata_ref_clk);
 
-        clk_disable(sata_clk);
+        clk_disable_unprepare(sata_clk);
         clk_put(sata_clk);
 
 }
diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/plat-mxc/epit.c
index d3467f818c33..9129c9e7d532 100644
--- a/arch/arm/plat-mxc/epit.c
+++ b/arch/arm/plat-mxc/epit.c
@@ -203,7 +203,7 @@ static int __init epit_clockevent_init(struct clk *timer_clk)
 
 void __init epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
 {
-        clk_enable(timer_clk);
+        clk_prepare_enable(timer_clk);
 
         timer_base = base;
 
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
deleted file mode 100644
index 94b60dd47137..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_MXC_BOARD_MX31ADS_H__
-#define __ASM_ARCH_MXC_BOARD_MX31ADS_H__
-
-#include <mach/hardware.h>
-
-/*
- * These symbols are used by drivers/net/cs89x0.c.
- * This is ugly as hell, but we have to provide them until
- * someone fixed the driver.
- */
-
-/* Base address of PBC controller */
-#define PBC_BASE_ADDRESS        MX31_CS4_BASE_ADDR_VIRT
-/* Offsets for the PBC Controller register */
-
-/* Ethernet Controller IO base address */
-#define PBC_CS8900A_IOBASE      0x020000
-
-#define MXC_EXP_IO_BASE         (MXC_BOARD_IRQ_START)
-
-#define EXPIO_INT_ENET_INT      (MXC_EXP_IO_BASE + 8)
-
-#endif /* __ASM_ARCH_MXC_BOARD_MX31ADS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 6e192c4a391a..8ddda365f1a0 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -24,7 +24,7 @@
 #define UART_PADDR      MX51_UART1_BASE_ADDR
 #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
 #define UART_PADDR      MX53_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX6Q_UART)
+#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
 #define UART_PADDR      MX6Q_UART4_BASE_ADDR
 #endif
 
diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h
index 233d0a5e2d68..1b9080385b46 100644
--- a/arch/arm/plat-mxc/include/mach/dma.h
+++ b/arch/arm/plat-mxc/include/mach/dma.h
@@ -60,8 +60,7 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan)
 
 static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
 {
-        return !strcmp(dev_name(chan->device->dev), "imx31-sdma") ||
-                !strcmp(dev_name(chan->device->dev), "imx35-sdma") ||
+        return strstr(dev_name(chan->device->dev), "sdma") ||
                 !strcmp(dev_name(chan->device->dev), "imx-dma");
 }
 
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index e032717f7d02..c0cab2270dd1 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -132,7 +132,7 @@ int pwm_enable(struct pwm_device *pwm)
         int rc = 0;
 
         if (!pwm->clk_enabled) {
-                rc = clk_enable(pwm->clk);
+                rc = clk_prepare_enable(pwm->clk);
                 if (!rc)
                         pwm->clk_enabled = 1;
         }
@@ -145,7 +145,7 @@ void pwm_disable(struct pwm_device *pwm)
         writel(0, pwm->mmio_base + MX3_PWMCR);
 
         if (pwm->clk_enabled) {
-                clk_disable(pwm->clk);
+                clk_disable_unprepare(pwm->clk);
                 pwm->clk_enabled = 0;
         }
 }
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 3599bf2cfd4f..f30dcacbbd0a 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -48,7 +48,7 @@ void mxc_restart(char mode, const char *cmd)
 
                 clk = clk_get_sys("imx2-wdt.0", NULL);
                 if (!IS_ERR(clk))
-                        clk_enable(clk);
+                        clk_prepare_enable(clk);
                 wcr_enable = (1 << 2);
         }
 
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 1c96cdb4c35e..7daf7c9a413b 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -283,7 +283,7 @@ void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
 {
         uint32_t tctl_val;
 
-        clk_enable(timer_clk);
+        clk_prepare_enable(timer_clk);
 
         timer_base = base;
 
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 647010109afa..9e8e63d52aab 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -484,7 +484,6 @@ struct omap_hwmod_class {
  * @main_clk: main clock: OMAP clock name
  * @_clk: pointer to the main struct clk (filled in at runtime)
  * @opt_clks: other device clocks that drivers can request (0..*)
- * @vdd_name: voltage domain name
  * @voltdm: pointer to voltage domain (filled in at runtime)
  * @masters: ptr to array of OCP ifs that this hwmod can initiate on
  * @slaves: ptr to array of OCP ifs that this hwmod can respond on
@@ -528,7 +527,6 @@ struct omap_hwmod {
         struct omap_hwmod_opt_clk       *opt_clks;
         char                            *clkdm_name;
         struct clockdomain              *clkdm;
-        char                            *vdd_name;
         struct omap_hwmod_ocp_if        **masters; /* connect to *_IA */
         struct omap_hwmod_ocp_if        **slaves;  /* connect to *_TA */
         void                            *dev_attr;
diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index 30b7cc14cef5..0f8263e93eea 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -18,51 +18,54 @@
 #define S3C2410_INTP_ALM        (1 << 1)
 #define S3C2410_INTP_TIC        (1 << 0)
 
-#define S3C2410_RTCCON        S3C2410_RTCREG(0x40)
-#define S3C2410_RTCCON_RTCEN  (1<<0)
-#define S3C2410_RTCCON_CLKSEL (1<<1)
-#define S3C2410_RTCCON_CNTSEL (1<<2)
-#define S3C2410_RTCCON_CLKRST (1<<3)
-#define S3C64XX_RTCCON_TICEN  (1<<8)
+#define S3C2410_RTCCON          S3C2410_RTCREG(0x40)
+#define S3C2410_RTCCON_RTCEN    (1 << 0)
+#define S3C2410_RTCCON_CNTSEL   (1 << 2)
+#define S3C2410_RTCCON_CLKRST   (1 << 3)
+#define S3C2443_RTCCON_TICSEL   (1 << 4)
+#define S3C64XX_RTCCON_TICEN    (1 << 8)
 
-#define S3C64XX_RTCCON_TICMSK (0xF<<7)
-#define S3C64XX_RTCCON_TICSHT (7)
+#define S3C2410_TICNT           S3C2410_RTCREG(0x44)
+#define S3C2410_TICNT_ENABLE    (1 << 7)
 
-#define S3C2410_TICNT         S3C2410_RTCREG(0x44)
-#define S3C2410_TICNT_ENABLE  (1<<7)
+/* S3C2443: tick count is 15 bit wide
+ * TICNT[6:0] contains upper 7 bits
+ * TICNT1[7:0] contains lower 8 bits
+ */
+#define S3C2443_TICNT_PART(x)   ((x & 0x7f00) >> 8)
+#define S3C2443_TICNT1          S3C2410_RTCREG(0x4C)
+#define S3C2443_TICNT1_PART(x)  (x & 0xff)
 
-#define S3C2410_RTCALM        S3C2410_RTCREG(0x50)
-#define S3C2410_RTCALM_ALMEN  (1<<6)
-#define S3C2410_RTCALM_YEAREN (1<<5)
-#define S3C2410_RTCALM_MONEN  (1<<4)
-#define S3C2410_RTCALM_DAYEN  (1<<3)
-#define S3C2410_RTCALM_HOUREN (1<<2)
-#define S3C2410_RTCALM_MINEN  (1<<1)
-#define S3C2410_RTCALM_SECEN  (1<<0)
+/* S3C2416: tick count is 32 bit wide
+ * TICNT[6:0] contains bits [14:8]
+ * TICNT1[7:0] contains lower 8 bits
+ * TICNT2[16:0] contains upper 17 bits
+ */
+#define S3C2416_TICNT2          S3C2410_RTCREG(0x48)
+#define S3C2416_TICNT2_PART(x)  ((x & 0xffff8000) >> 15)
 
-#define S3C2410_RTCALM_ALL \
-  S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\
-  S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\
-  S3C2410_RTCALM_SECEN
+#define S3C2410_RTCALM          S3C2410_RTCREG(0x50)
+#define S3C2410_RTCALM_ALMEN    (1 << 6)
+#define S3C2410_RTCALM_YEAREN   (1 << 5)
+#define S3C2410_RTCALM_MONEN    (1 << 4)
+#define S3C2410_RTCALM_DAYEN    (1 << 3)
+#define S3C2410_RTCALM_HOUREN   (1 << 2)
+#define S3C2410_RTCALM_MINEN    (1 << 1)
+#define S3C2410_RTCALM_SECEN    (1 << 0)
 
+#define S3C2410_ALMSEC          S3C2410_RTCREG(0x54)
+#define S3C2410_ALMMIN          S3C2410_RTCREG(0x58)
+#define S3C2410_ALMHOUR         S3C2410_RTCREG(0x5c)
 
-#define S3C2410_ALMSEC        S3C2410_RTCREG(0x54)
-#define S3C2410_ALMMIN        S3C2410_RTCREG(0x58)
-#define S3C2410_ALMHOUR       S3C2410_RTCREG(0x5c)
-
-#define S3C2410_ALMDATE       S3C2410_RTCREG(0x60)
-#define S3C2410_ALMMON        S3C2410_RTCREG(0x64)
-#define S3C2410_ALMYEAR       S3C2410_RTCREG(0x68)
-
-#define S3C2410_RTCRST        S3C2410_RTCREG(0x6c)
-
-#define S3C2410_RTCSEC        S3C2410_RTCREG(0x70)
-#define S3C2410_RTCMIN        S3C2410_RTCREG(0x74)
-#define S3C2410_RTCHOUR       S3C2410_RTCREG(0x78)
-#define S3C2410_RTCDATE       S3C2410_RTCREG(0x7c)
-#define S3C2410_RTCDAY        S3C2410_RTCREG(0x80)
-#define S3C2410_RTCMON        S3C2410_RTCREG(0x84)
-#define S3C2410_RTCYEAR       S3C2410_RTCREG(0x88)
+#define S3C2410_ALMDATE         S3C2410_RTCREG(0x60)
+#define S3C2410_ALMMON          S3C2410_RTCREG(0x64)
+#define S3C2410_ALMYEAR         S3C2410_RTCREG(0x68)
 
+#define S3C2410_RTCSEC          S3C2410_RTCREG(0x70)
+#define S3C2410_RTCMIN          S3C2410_RTCREG(0x74)
+#define S3C2410_RTCHOUR         S3C2410_RTCREG(0x78)
+#define S3C2410_RTCDATE         S3C2410_RTCREG(0x7c)
+#define S3C2410_RTCMON          S3C2410_RTCREG(0x84)
+#define S3C2410_RTCYEAR         S3C2410_RTCREG(0x88)
 
 #endif /* __ASM_ARCH_REGS_RTC_H */
diff --git a/arch/arm/plat-samsung/include/plat/rtc-core.h b/arch/arm/plat-samsung/include/plat/rtc-core.h
new file mode 100644
index 000000000000..21d8594d37ca
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/rtc-core.h
@@ -0,0 +1,27 @@
+/* linux/arch/arm/plat-samsung/include/plat/rtc-core.h
+ *
+ * Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de>
+ *
+ * Samsung RTC Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_RTC_CORE_H
+#define __ASM_PLAT_RTC_CORE_H __FILE__
+
+/* These functions are only for use with the core support code, such as
+ * the cpu specific initialisation code
+ */
+
+/* re-define device name depending on support. */
+static inline void s3c_rtc_setname(char *name)
+{
+#if defined(CONFIG_SAMSUNG_DEV_RTC) || defined(CONFIG_PLAT_S3C24XX)
+        s3c_device_rtc.name = name;
+#endif
+}
+
+#endif /* __ASM_PLAT_RTC_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index f82f888b91a9..317e246ffc56 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -40,6 +40,7 @@ enum clk_types {
  * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI
  * @max_width: The maximum number of data bits supported.
  * @host_caps: Standard MMC host capabilities bit field.
+ * @host_caps2: The second standard MMC host capabilities bit field.
  * @cd_type: Type of Card Detection method (see cd_types enum above)
  * @clk_type: Type of clock divider method (see clk_types enum above)
  * @ext_cd_init: Initialize external card detect subsystem. Called on
@@ -63,6 +64,7 @@ enum clk_types {
 struct s3c_sdhci_platdata {
         unsigned int    max_width;
         unsigned int    host_caps;
+        unsigned int    host_caps2;
         unsigned int    pm_caps;
         enum cd_types   cd_type;
         enum clk_types  clk_type;
diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c
index 0f707184eae0..fa78aa710ed1 100644
--- a/arch/arm/plat-samsung/platformdata.c
+++ b/arch/arm/plat-samsung/platformdata.c
@@ -53,6 +53,8 @@ void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,
                 set->cfg_gpio = pd->cfg_gpio;
         if (pd->host_caps)
                 set->host_caps |= pd->host_caps;
+        if (pd->host_caps2)
+                set->host_caps2 |= pd->host_caps2;
         if (pd->pm_caps)
                 set->pm_caps |= pd->pm_caps;
         if (pd->clk_type)
diff --git a/arch/avr32/mach-at32ap/include/mach/cpu.h b/arch/avr32/mach-at32ap/include/mach/cpu.h
index 8181293115e4..16a24b14146c 100644
--- a/arch/avr32/mach-at32ap/include/mach/cpu.h
+++ b/arch/avr32/mach-at32ap/include/mach/cpu.h
@@ -30,9 +30,6 @@
 #define cpu_is_at91sam9261()    (0)
 #define cpu_is_at91sam9263()    (0)
 #define cpu_is_at91sam9rl()     (0)
-#define cpu_is_at91cap9()       (0)
-#define cpu_is_at91cap9_revB()  (0)
-#define cpu_is_at91cap9_revC()  (0)
 #define cpu_is_at91sam9g10()    (0)
 #define cpu_is_at91sam9g20()    (0)
 #define cpu_is_at91sam9g45()    (0)
diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig
index 26e67f0f0051..3c64b2894c13 100644
--- a/arch/c6x/Kconfig
+++ b/arch/c6x/Kconfig
@@ -12,6 +12,7 @@ config TMS320C6X
         select HAVE_GENERIC_HARDIRQS
         select HAVE_MEMBLOCK
         select HAVE_SPARSE_IRQ
+        select IRQ_DOMAIN
         select OF
         select OF_EARLY_FLATTREE
 
diff --git a/arch/c6x/include/asm/irq.h b/arch/c6x/include/asm/irq.h
index a6ae3c9d9c40..f13b78d5e1ca 100644
--- a/arch/c6x/include/asm/irq.h
+++ b/arch/c6x/include/asm/irq.h
@@ -13,6 +13,7 @@
 #ifndef _ASM_C6X_IRQ_H
 #define _ASM_C6X_IRQ_H
 
+#include <linux/irqdomain.h>
 #include <linux/threads.h>
 #include <linux/list.h>
 #include <linux/radix-tree.h>
@@ -41,253 +42,9 @@
 /* This number is used when no interrupt has been assigned */
 #define NO_IRQ          0
 
-/* This type is the placeholder for a hardware interrupt number. It has to
- * be big enough to enclose whatever representation is used by a given
- * platform.
- */
-typedef unsigned long irq_hw_number_t;
-
-/* Interrupt controller "host" data structure. This could be defined as a
- * irq domain controller. That is, it handles the mapping between hardware
- * and virtual interrupt numbers for a given interrupt domain. The host
- * structure is generally created by the PIC code for a given PIC instance
- * (though a host can cover more than one PIC if they have a flat number
- * model). It's the host callbacks that are responsible for setting the
- * irq_chip on a given irq_desc after it's been mapped.
- *
- * The host code and data structures are fairly agnostic to the fact that
- * we use an open firmware device-tree. We do have references to struct
- * device_node in two places: in irq_find_host() to find the host matching
- * a given interrupt controller node, and of course as an argument to its
- * counterpart host->ops->match() callback. However, those are treated as
- * generic pointers by the core and the fact that it's actually a device-node
- * pointer is purely a convention between callers and implementation. This
- * code could thus be used on other architectures by replacing those two
- * by some sort of arch-specific void * "token" used to identify interrupt
- * controllers.
- */
-struct irq_host;
-struct radix_tree_root;
-struct device_node;
-
-/* Functions below are provided by the host and called whenever a new mapping
- * is created or an old mapping is disposed. The host can then proceed to
- * whatever internal data structures management is required. It also needs
- * to setup the irq_desc when returning from map().
- */
-struct irq_host_ops {
-        /* Match an interrupt controller device node to a host, returns
-         * 1 on a match
-         */
-        int (*match)(struct irq_host *h, struct device_node *node);
-
-        /* Create or update a mapping between a virtual irq number and a hw
-         * irq number. This is called only once for a given mapping.
-         */
-        int (*map)(struct irq_host *h, unsigned int virq, irq_hw_number_t hw);
-
-        /* Dispose of such a mapping */
-        void (*unmap)(struct irq_host *h, unsigned int virq);
-
-        /* Translate device-tree interrupt specifier from raw format coming
-         * from the firmware to a irq_hw_number_t (interrupt line number) and
-         * type (sense) that can be passed to set_irq_type(). In the absence
-         * of this callback, irq_create_of_mapping() and irq_of_parse_and_map()
-         * will return the hw number in the first cell and IRQ_TYPE_NONE for
-         * the type (which amount to keeping whatever default value the
-         * interrupt controller has for that line)
-         */
-        int (*xlate)(struct irq_host *h, struct device_node *ctrler,
-                     const u32 *intspec, unsigned int intsize,
-                     irq_hw_number_t *out_hwirq, unsigned int *out_type);
-};
-
-struct irq_host {
-        struct list_head        link;
-
-        /* type of reverse mapping technique */
-        unsigned int            revmap_type;
-#define IRQ_HOST_MAP_PRIORITY   0 /* core priority irqs, get irqs 1..15 */
-#define IRQ_HOST_MAP_NOMAP      1 /* no fast reverse mapping */
-#define IRQ_HOST_MAP_LINEAR     2 /* linear map of interrupts */
-#define IRQ_HOST_MAP_TREE       3 /* radix tree */
-        union {
-                struct {
-                        unsigned int size;
-                        unsigned int *revmap;
-                } linear;
-                struct radix_tree_root tree;
-        } revmap_data;
-        struct irq_host_ops     *ops;
-        void                    *host_data;
-        irq_hw_number_t         inval_irq;
-
-        /* Optional device node pointer */
-        struct device_node      *of_node;
-};
-
 struct irq_data;
 extern irq_hw_number_t irqd_to_hwirq(struct irq_data *d);
 extern irq_hw_number_t virq_to_hw(unsigned int virq);
-extern bool virq_is_host(unsigned int virq, struct irq_host *host);
-
-/**
- * irq_alloc_host - Allocate a new irq_host data structure
- * @of_node: optional device-tree node of the interrupt controller
- * @revmap_type: type of reverse mapping to use
- * @revmap_arg: for IRQ_HOST_MAP_LINEAR linear only: size of the map
- * @ops: map/unmap host callbacks
- * @inval_irq: provide a hw number in that host space that is always invalid
- *
- * Allocates and initialize and irq_host structure. Note that in the case of
- * IRQ_HOST_MAP_LEGACY, the map() callback will be called before this returns
- * for all legacy interrupts except 0 (which is always the invalid irq for
- * a legacy controller). For a IRQ_HOST_MAP_LINEAR, the map is allocated by
- * this call as well. For a IRQ_HOST_MAP_TREE, the radix tree will be allocated
- * later during boot automatically (the reverse mapping will use the slow path
- * until that happens).
- */
-extern struct irq_host *irq_alloc_host(struct device_node *of_node,
-                                       unsigned int revmap_type,
-                                       unsigned int revmap_arg,
-                                       struct irq_host_ops *ops,
-                                       irq_hw_number_t inval_irq);
-
-
-/**
- * irq_find_host - Locates a host for a given device node
- * @node: device-tree node of the interrupt controller
- */
-extern struct irq_host *irq_find_host(struct device_node *node);
-
-
-/**
- * irq_set_default_host - Set a "default" host
- * @host: default host pointer
- *
- * For convenience, it's possible to set a "default" host that will be used
- * whenever NULL is passed to irq_create_mapping(). It makes life easier for
- * platforms that want to manipulate a few hard coded interrupt numbers that
- * aren't properly represented in the device-tree.
- */
-extern void irq_set_default_host(struct irq_host *host);
-
-
-/**
- * irq_set_virq_count - Set the maximum number of virt irqs
- * @count: number of linux virtual irqs, capped with NR_IRQS
- *
- * This is mainly for use by platforms like iSeries who want to program
- * the virtual irq number in the controller to avoid the reverse mapping
- */
-extern void irq_set_virq_count(unsigned int count);
-
-
-/**
- * irq_create_mapping - Map a hardware interrupt into linux virq space
- * @host: host owning this hardware interrupt or NULL for default host
- * @hwirq: hardware irq number in that host space
- *
- * Only one mapping per hardware interrupt is permitted. Returns a linux
- * virq number.
- * If the sense/trigger is to be specified, set_irq_type() should be called
- * on the number returned from that call.
- */
-extern unsigned int irq_create_mapping(struct irq_host *host,
-                                       irq_hw_number_t hwirq);
-
-
-/**
- * irq_dispose_mapping - Unmap an interrupt
- * @virq: linux virq number of the interrupt to unmap
- */
-extern void irq_dispose_mapping(unsigned int virq);
-
-/**
- * irq_find_mapping - Find a linux virq from an hw irq number.
- * @host: host owning this hardware interrupt
- * @hwirq: hardware irq number in that host space
- *
- * This is a slow path, for use by generic code. It's expected that an
- * irq controller implementation directly calls the appropriate low level
- * mapping function.
- */
-extern unsigned int irq_find_mapping(struct irq_host *host,
-                                     irq_hw_number_t hwirq);
-
-/**
- * irq_create_direct_mapping - Allocate a virq for direct mapping
- * @host: host to allocate the virq for or NULL for default host
- *
- * This routine is used for irq controllers which can choose the hardware
- * interrupt numbers they generate. In such a case it's simplest to use
- * the linux virq as the hardware interrupt number.
- */
-extern unsigned int irq_create_direct_mapping(struct irq_host *host);
-
-/**
- * irq_radix_revmap_insert - Insert a hw irq to linux virq number mapping.
- * @host: host owning this hardware interrupt
- * @virq: linux irq number
- * @hwirq: hardware irq number in that host space
- *
- * This is for use by irq controllers that use a radix tree reverse
- * mapping for fast lookup.
- */
-extern void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
-                                    irq_hw_number_t hwirq);
-
-/**
- * irq_radix_revmap_lookup - Find a linux virq from a hw irq number.
- * @host: host owning this hardware interrupt
- * @hwirq: hardware irq number in that host space
- *
- * This is a fast path, for use by irq controller code that uses radix tree
- * revmaps
- */
-extern unsigned int irq_radix_revmap_lookup(struct irq_host *host,
-                                            irq_hw_number_t hwirq);
-
-/**
- * irq_linear_revmap - Find a linux virq from a hw irq number.
- * @host: host owning this hardware interrupt
- * @hwirq: hardware irq number in that host space
- *
- * This is a fast path, for use by irq controller code that uses linear
- * revmaps. It does fallback to the slow path if the revmap doesn't exist
- * yet and will create the revmap entry with appropriate locking
- */
-
-extern unsigned int irq_linear_revmap(struct irq_host *host,
-                                      irq_hw_number_t hwirq);
-
-
-
-/**
- * irq_alloc_virt - Allocate virtual irq numbers
- * @host: host owning these new virtual irqs
- * @count: number of consecutive numbers to allocate
- * @hint: pass a hint number, the allocator will try to use a 1:1 mapping
- *
- * This is a low level function that is used internally by irq_create_mapping()
- * and that can be used by some irq controllers implementations for things
- * like allocating ranges of numbers for MSIs. The revmaps are left untouched.
- */
-extern unsigned int irq_alloc_virt(struct irq_host *host,
-                                   unsigned int count,
-                                   unsigned int hint);
-
-/**
- * irq_free_virt - Free virtual irq numbers
- * @virq: virtual irq number of the first interrupt to free
- * @count: number of interrupts to free
- *
- * This function is the opposite of irq_alloc_virt. It will not clear reverse
- * maps, this should be done previously by unmap'ing the interrupt. In fact,
- * all interrupts covered by the range being freed should have been unmapped
- * prior to calling this.
- */
-extern void irq_free_virt(unsigned int virq, unsigned int count);
 
 extern void __init init_pic_c64xplus(void);
 
diff --git a/arch/c6x/kernel/irq.c b/arch/c6x/kernel/irq.c
index 0929e4b2b244..d77bcfdf0d8e 100644
--- a/arch/c6x/kernel/irq.c
+++ b/arch/c6x/kernel/irq.c
@@ -73,10 +73,10 @@ asmlinkage void c6x_do_IRQ(unsigned int prio, struct pt_regs *regs)
         set_irq_regs(old_regs);
 }
 
-static struct irq_host *core_host;
+static struct irq_domain *core_domain;
 
-static int core_host_map(struct irq_host *h, unsigned int virq,
-                         irq_hw_number_t hw)
+static int core_domain_map(struct irq_domain *h, unsigned int virq,
+                           irq_hw_number_t hw)
 {
         if (hw < 4 || hw >= NR_PRIORITY_IRQS)
                 return -EINVAL;
@@ -86,8 +86,9 @@ static int core_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static struct irq_host_ops core_host_ops = {
-        .map = core_host_map,
+static const struct irq_domain_ops core_domain_ops = {
+        .map = core_domain_map,
+        .xlate = irq_domain_xlate_onecell,
 };
 
 void __init init_IRQ(void)
@@ -100,10 +101,11 @@ void __init init_IRQ(void)
         np = of_find_compatible_node(NULL, NULL, "ti,c64x+core-pic");
         if (np != NULL) {
                 /* create the core host */
-                core_host = irq_alloc_host(np, IRQ_HOST_MAP_PRIORITY, 0,
-                                           &core_host_ops, 0);
-                if (core_host)
-                        irq_set_default_host(core_host);
+                core_domain = irq_domain_add_legacy(np, NR_PRIORITY_IRQS,
+                                                    0, 0, &core_domain_ops,
+                                                    NULL);
+                if (core_domain)
+                        irq_set_default_host(core_domain);
                 of_node_put(np);
         }
 
@@ -128,601 +130,15 @@ int arch_show_interrupts(struct seq_file *p, int prec)
         return 0;
 }
 
-/*
- * IRQ controller and virtual interrupts
- */
-
-/* The main irq map itself is an array of NR_IRQ entries containing the
- * associate host and irq number. An entry with a host of NULL is free.
- * An entry can be allocated if it's free, the allocator always then sets
- * hwirq first to the host's invalid irq number and then fills ops.
- */
-struct irq_map_entry {
-        irq_hw_number_t hwirq;
-        struct irq_host *host;
-};
-
-static LIST_HEAD(irq_hosts);
-static DEFINE_RAW_SPINLOCK(irq_big_lock);
-static DEFINE_MUTEX(revmap_trees_mutex);
-static struct irq_map_entry irq_map[NR_IRQS];
-static unsigned int irq_virq_count = NR_IRQS;
-static struct irq_host *irq_default_host;
-
 irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
 {
-        return irq_map[d->irq].hwirq;
+        return d->hwirq;
 }
 EXPORT_SYMBOL_GPL(irqd_to_hwirq);
 
 irq_hw_number_t virq_to_hw(unsigned int virq)
 {
-        return irq_map[virq].hwirq;
+        struct irq_data *irq_data = irq_get_irq_data(virq);
+        return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
 }
 EXPORT_SYMBOL_GPL(virq_to_hw);
-
-bool virq_is_host(unsigned int virq, struct irq_host *host)
-{
-        return irq_map[virq].host == host;
-}
-EXPORT_SYMBOL_GPL(virq_is_host);
-
-static int default_irq_host_match(struct irq_host *h, struct device_node *np)
-{
-        return h->of_node != NULL && h->of_node == np;
-}
-
-struct irq_host *irq_alloc_host(struct device_node *of_node,
-                                unsigned int revmap_type,
-                                unsigned int revmap_arg,
-                                struct irq_host_ops *ops,
-                                irq_hw_number_t inval_irq)
-{
-        struct irq_host *host;
-        unsigned int size = sizeof(struct irq_host);
-        unsigned int i;
-        unsigned int *rmap;
-        unsigned long flags;
-
-        /* Allocate structure and revmap table if using linear mapping */
-        if (revmap_type == IRQ_HOST_MAP_LINEAR)
-                size += revmap_arg * sizeof(unsigned int);
-        host = kzalloc(size, GFP_KERNEL);
-        if (host == NULL)
-                return NULL;
-
-        /* Fill structure */
-        host->revmap_type = revmap_type;
-        host->inval_irq = inval_irq;
-        host->ops = ops;
-        host->of_node = of_node_get(of_node);
-
-        if (host->ops->match == NULL)
-                host->ops->match = default_irq_host_match;
-
-        raw_spin_lock_irqsave(&irq_big_lock, flags);
-
-        /* Check for the priority controller. */
-        if (revmap_type == IRQ_HOST_MAP_PRIORITY) {
-                if (irq_map[0].host != NULL) {
-                        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-                        of_node_put(host->of_node);
-                        kfree(host);
-                        return NULL;
-                }
-                irq_map[0].host = host;
-        }
-
-        list_add(&host->link, &irq_hosts);
-        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-
-        /* Additional setups per revmap type */
-        switch (revmap_type) {
-        case IRQ_HOST_MAP_PRIORITY:
-                /* 0 is always the invalid number for priority */
-                host->inval_irq = 0;
-                /* setup us as the host for all priority interrupts */
-                for (i = 1; i < NR_PRIORITY_IRQS; i++) {
-                        irq_map[i].hwirq = i;
-                        smp_wmb();
-                        irq_map[i].host = host;
-                        smp_wmb();
-
-                        ops->map(host, i, i);
-                }
-                break;
-        case IRQ_HOST_MAP_LINEAR:
-                rmap = (unsigned int *)(host + 1);
-                for (i = 0; i < revmap_arg; i++)
-                        rmap[i] = NO_IRQ;
-                host->revmap_data.linear.size = revmap_arg;
-                smp_wmb();
-                host->revmap_data.linear.revmap = rmap;
-                break;
-        case IRQ_HOST_MAP_TREE:
-                INIT_RADIX_TREE(&host->revmap_data.tree, GFP_KERNEL);
-                break;
-        default:
-                break;
-        }
-
-        pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
-
-        return host;
-}
-
-struct irq_host *irq_find_host(struct device_node *node)
-{
-        struct irq_host *h, *found = NULL;
-        unsigned long flags;
-
-        /* We might want to match the legacy controller last since
-         * it might potentially be set to match all interrupts in
-         * the absence of a device node. This isn't a problem so far
-         * yet though...
-         */
-        raw_spin_lock_irqsave(&irq_big_lock, flags);
-        list_for_each_entry(h, &irq_hosts, link)
-                if (h->ops->match(h, node)) {
-                        found = h;
-                        break;
-                }
-        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-        return found;
-}
-EXPORT_SYMBOL_GPL(irq_find_host);
-
-void irq_set_default_host(struct irq_host *host)
-{
-        pr_debug("irq: Default host set to @0x%p\n", host);
-
-        irq_default_host = host;
-}
-
-void irq_set_virq_count(unsigned int count)
-{
-        pr_debug("irq: Trying to set virq count to %d\n", count);
-
-        BUG_ON(count < NR_PRIORITY_IRQS);
-        if (count < NR_IRQS)
-                irq_virq_count = count;
-}
-
-static int irq_setup_virq(struct irq_host *host, unsigned int virq,
-                            irq_hw_number_t hwirq)
-{
-        int res;
-
-        res = irq_alloc_desc_at(virq, 0);
-        if (res != virq) {
-                pr_debug("irq: -> allocating desc failed\n");
-                goto error;
-        }
-
-        /* map it */
-        smp_wmb();
-        irq_map[virq].hwirq = hwirq;
-        smp_mb();
-
-        if (host->ops->map(host, virq, hwirq)) {
-                pr_debug("irq: -> mapping failed, freeing\n");
-                goto errdesc;
-        }
-
-        irq_clear_status_flags(virq, IRQ_NOREQUEST);
-
-        return 0;
-
-errdesc:
-        irq_free_descs(virq, 1);
-error:
-        irq_free_virt(virq, 1);
-        return -1;
-}
-
-unsigned int irq_create_direct_mapping(struct irq_host *host)
-{
-        unsigned int virq;
-
-        if (host == NULL)
-                host = irq_default_host;
-
-        BUG_ON(host == NULL);
-        WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP);
-
-        virq = irq_alloc_virt(host, 1, 0);
-        if (virq == NO_IRQ) {
-                pr_debug("irq: create_direct virq allocation failed\n");
-                return NO_IRQ;
-        }
-
-        pr_debug("irq: create_direct obtained virq %d\n", virq);
-
-        if (irq_setup_virq(host, virq, virq))
-                return NO_IRQ;
-
-        return virq;
-}
-
-unsigned int irq_create_mapping(struct irq_host *host,
-                                irq_hw_number_t hwirq)
-{
-        unsigned int virq, hint;
-
-        pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
-
-        /* Look for default host if nececssary */
-        if (host == NULL)
-                host = irq_default_host;
-        if (host == NULL) {
-                printk(KERN_WARNING "irq_create_mapping called for"
-                       " NULL host, hwirq=%lx\n", hwirq);
-                WARN_ON(1);
-                return NO_IRQ;
-        }
-        pr_debug("irq: -> using host @%p\n", host);
-
-        /* Check if mapping already exists */
-        virq = irq_find_mapping(host, hwirq);
-        if (virq != NO_IRQ) {
-                pr_debug("irq: -> existing mapping on virq %d\n", virq);
-                return virq;
-        }
-
-        /* Allocate a virtual interrupt number */
-        hint = hwirq % irq_virq_count;
-        virq = irq_alloc_virt(host, 1, hint);
-        if (virq == NO_IRQ) {
-                pr_debug("irq: -> virq allocation failed\n");
-                return NO_IRQ;
-        }
-
-        if (irq_setup_virq(host, virq, hwirq))
-                return NO_IRQ;
-
-        pr_debug("irq: irq %lu on host %s mapped to virtual irq %u\n",
-                hwirq, host->of_node ? host->of_node->full_name : "null", virq);
-
-        return virq;
-}
-EXPORT_SYMBOL_GPL(irq_create_mapping);
-
-unsigned int irq_create_of_mapping(struct device_node *controller,
-                                   const u32 *intspec, unsigned int intsize)
-{
-        struct irq_host *host;
-        irq_hw_number_t hwirq;
-        unsigned int type = IRQ_TYPE_NONE;
-        unsigned int virq;
-
-        if (controller == NULL)
-                host = irq_default_host;
-        else
-                host = irq_find_host(controller);
-        if (host == NULL) {
-                printk(KERN_WARNING "irq: no irq host found for %s !\n",
-                       controller->full_name);
-                return NO_IRQ;
-        }
-
-        /* If host has no translation, then we assume interrupt line */
-        if (host->ops->xlate == NULL)
-                hwirq = intspec[0];
-        else {
-                if (host->ops->xlate(host, controller, intspec, intsize,
-                                     &hwirq, &type))
-                        return NO_IRQ;
-        }
-
-        /* Create mapping */
-        virq = irq_create_mapping(host, hwirq);
-        if (virq == NO_IRQ)
-                return virq;
-
-        /* Set type if specified and different than the current one */
-        if (type != IRQ_TYPE_NONE &&
-            type != (irqd_get_trigger_type(irq_get_irq_data(virq))))
-                irq_set_irq_type(virq, type);
-        return virq;
-}
-EXPORT_SYMBOL_GPL(irq_create_of_mapping);
-
-void irq_dispose_mapping(unsigned int virq)
-{
-        struct irq_host *host;
-        irq_hw_number_t hwirq;
-
-        if (virq == NO_IRQ)
-                return;
-
-        /* Never unmap priority interrupts */
-        if (virq < NR_PRIORITY_IRQS)
-                return;
-
-        host = irq_map[virq].host;
-        if (WARN_ON(host == NULL))
-                return;
-
-        irq_set_status_flags(virq, IRQ_NOREQUEST);
-
-        /* remove chip and handler */
-        irq_set_chip_and_handler(virq, NULL, NULL);
-
-        /* Make sure it's completed */
-        synchronize_irq(virq);
-
-        /* Tell the PIC about it */
-        if (host->ops->unmap)
-                host->ops->unmap(host, virq);
-        smp_mb();
-
-        /* Clear reverse map */
-        hwirq = irq_map[virq].hwirq;
-        switch (host->revmap_type) {
-        case IRQ_HOST_MAP_LINEAR:
-                if (hwirq < host->revmap_data.linear.size)
-                        host->revmap_data.linear.revmap[hwirq] = NO_IRQ;
-                break;
-        case IRQ_HOST_MAP_TREE:
-                mutex_lock(&revmap_trees_mutex);
-                radix_tree_delete(&host->revmap_data.tree, hwirq);
-                mutex_unlock(&revmap_trees_mutex);
-                break;
-        }
-
-        /* Destroy map */
-        smp_mb();
-        irq_map[virq].hwirq = host->inval_irq;
-
-        irq_free_descs(virq, 1);
-        /* Free it */
-        irq_free_virt(virq, 1);
-}
-EXPORT_SYMBOL_GPL(irq_dispose_mapping);
-
-unsigned int irq_find_mapping(struct irq_host *host,
-                              irq_hw_number_t hwirq)
-{
-        unsigned int i;
-        unsigned int hint = hwirq % irq_virq_count;
-
-        /* Look for default host if nececssary */
-        if (host == NULL)
-                host = irq_default_host;
-        if (host == NULL)
-                return NO_IRQ;
-
-        /* Slow path does a linear search of the map */
-        i = hint;
-        do  {
-                if (irq_map[i].host == host &&
-                    irq_map[i].hwirq == hwirq)
-                        return i;
-                i++;
-                if (i >= irq_virq_count)
-                        i = 4;
-        } while (i != hint);
-        return NO_IRQ;
-}
-EXPORT_SYMBOL_GPL(irq_find_mapping);
-
-unsigned int irq_radix_revmap_lookup(struct irq_host *host,
-                                     irq_hw_number_t hwirq)
-{
-        struct irq_map_entry *ptr;
-        unsigned int virq;
-
-        if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_TREE))
-                return irq_find_mapping(host, hwirq);
-
-        /*
-         * The ptr returned references the static global irq_map.
-         * but freeing an irq can delete nodes along the path to
-         * do the lookup via call_rcu.
-         */
-        rcu_read_lock();
-        ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq);
-        rcu_read_unlock();
-
-        /*
-         * If found in radix tree, then fine.
-         * Else fallback to linear lookup - this should not happen in practice
-         * as it means that we failed to insert the node in the radix tree.
-         */
-        if (ptr)
-                virq = ptr - irq_map;
-        else
-                virq = irq_find_mapping(host, hwirq);
-
-        return virq;
-}
-
-void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
-                             irq_hw_number_t hwirq)
-{
-        if (WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE))
-                return;
-
-        if (virq != NO_IRQ) {
-                mutex_lock(&revmap_trees_mutex);
-                radix_tree_insert(&host->revmap_data.tree, hwirq,
-                                  &irq_map[virq]);
-                mutex_unlock(&revmap_trees_mutex);
-        }
-}
-
-unsigned int irq_linear_revmap(struct irq_host *host,
-                               irq_hw_number_t hwirq)
-{
-        unsigned int *revmap;
-
-        if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_LINEAR))
-                return irq_find_mapping(host, hwirq);
-
-        /* Check revmap bounds */
-        if (unlikely(hwirq >= host->revmap_data.linear.size))
-                return irq_find_mapping(host, hwirq);
-
-        /* Check if revmap was allocated */
-        revmap = host->revmap_data.linear.revmap;
-        if (unlikely(revmap == NULL))
-                return irq_find_mapping(host, hwirq);
-
-        /* Fill up revmap with slow path if no mapping found */
-        if (unlikely(revmap[hwirq] == NO_IRQ))
-                revmap[hwirq] = irq_find_mapping(host, hwirq);
-
-        return revmap[hwirq];
-}
-
-unsigned int irq_alloc_virt(struct irq_host *host,
-                            unsigned int count,
-                            unsigned int hint)
-{
-        unsigned long flags;
-        unsigned int i, j, found = NO_IRQ;
-
-        if (count == 0 || count > (irq_virq_count - NR_PRIORITY_IRQS))
-                return NO_IRQ;
-
-        raw_spin_lock_irqsave(&irq_big_lock, flags);
-
-        /* Use hint for 1 interrupt if any */
-        if (count == 1 && hint >= NR_PRIORITY_IRQS &&
-            hint < irq_virq_count && irq_map[hint].host == NULL) {
-                found = hint;
-                goto hint_found;
-        }
-
-        /* Look for count consecutive numbers in the allocatable
-         * (non-legacy) space
-         */
-        for (i = NR_PRIORITY_IRQS, j = 0; i < irq_virq_count; i++) {
-                if (irq_map[i].host != NULL)
-                        j = 0;
-                else
-                        j++;
-
-                if (j == count) {
-                        found = i - count + 1;
-                        break;
-                }
-        }
-        if (found == NO_IRQ) {
-                raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-                return NO_IRQ;
-        }
- hint_found:
-        for (i = found; i < (found + count); i++) {
-                irq_map[i].hwirq = host->inval_irq;
-                smp_wmb();
-                irq_map[i].host = host;
-        }
-        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-        return found;
-}
-
-void irq_free_virt(unsigned int virq, unsigned int count)
-{
-        unsigned long flags;
-        unsigned int i;
-
-        WARN_ON(virq < NR_PRIORITY_IRQS);
-        WARN_ON(count == 0 || (virq + count) > irq_virq_count);
-
-        if (virq < NR_PRIORITY_IRQS) {
-                if (virq + count < NR_PRIORITY_IRQS)
-                        return;
-                count  -= NR_PRIORITY_IRQS - virq;
-                virq = NR_PRIORITY_IRQS;
-        }
-
-        if (count > irq_virq_count || virq > irq_virq_count - count) {
-                if (virq > irq_virq_count)
-                        return;
-                count = irq_virq_count - virq;
-        }
-
-        raw_spin_lock_irqsave(&irq_big_lock, flags);
-        for (i = virq; i < (virq + count); i++) {
-                struct irq_host *host;
-
-                host = irq_map[i].host;
-                irq_map[i].hwirq = host->inval_irq;
-                smp_wmb();
-                irq_map[i].host = NULL;
-        }
-        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-}
-
-#ifdef CONFIG_VIRQ_DEBUG
-static int virq_debug_show(struct seq_file *m, void *private)
-{
-        unsigned long flags;
-        struct irq_desc *desc;
-        const char *p;
-        static const char none[] = "none";
-        void *data;
-        int i;
-
-        seq_printf(m, "%-5s  %-7s  %-15s  %-18s  %s\n", "virq", "hwirq",
-                      "chip name", "chip data", "host name");
-
-        for (i = 1; i < nr_irqs; i++) {
-                desc = irq_to_desc(i);
-                if (!desc)
-                        continue;
-
-                raw_spin_lock_irqsave(&desc->lock, flags);
-
-                if (desc->action && desc->action->handler) {
-                        struct irq_chip *chip;
-
-                        seq_printf(m, "%5d  ", i);
-                        seq_printf(m, "0x%05lx  ", irq_map[i].hwirq);
-
-                        chip = irq_desc_get_chip(desc);
-                        if (chip && chip->name)
-                                p = chip->name;
-                        else
-                                p = none;
-                        seq_printf(m, "%-15s  ", p);
-
-                        data = irq_desc_get_chip_data(desc);
-                        seq_printf(m, "0x%16p  ", data);
-
-                        if (irq_map[i].host && irq_map[i].host->of_node)
-                                p = irq_map[i].host->of_node->full_name;
-                        else
-                                p = none;
-                        seq_printf(m, "%s\n", p);
-                }
-
-                raw_spin_unlock_irqrestore(&desc->lock, flags);
-        }
-
-        return 0;
-}
-
-static int virq_debug_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, virq_debug_show, inode->i_private);
-}
-
-static const struct file_operations virq_debug_fops = {
-        .open = virq_debug_open,
-        .read = seq_read,
-        .llseek = seq_lseek,
-        .release = single_release,
-};
-
-static int __init irq_debugfs_init(void)
-{
-        if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root,
-                                 NULL, &virq_debug_fops) == NULL)
-                return -ENOMEM;
-
-        return 0;
-}
-device_initcall(irq_debugfs_init);
-#endif /* CONFIG_VIRQ_DEBUG */
diff --git a/arch/c6x/platforms/megamod-pic.c b/arch/c6x/platforms/megamod-pic.c
index 7c37a947fb1c..c1c4e2ae3f85 100644
--- a/arch/c6x/platforms/megamod-pic.c
+++ b/arch/c6x/platforms/megamod-pic.c
@@ -48,7 +48,7 @@ struct megamod_regs {
 };
 
 struct megamod_pic {
-        struct irq_host *irqhost;
+        struct irq_domain *irqhost;
         struct megamod_regs __iomem *regs;
         raw_spinlock_t lock;
 
@@ -116,7 +116,7 @@ static void megamod_irq_cascade(unsigned int irq, struct irq_desc *desc)
         }
 }
 
-static int megamod_map(struct irq_host *h, unsigned int virq,
+static int megamod_map(struct irq_domain *h, unsigned int virq,
                        irq_hw_number_t hw)
 {
         struct megamod_pic *pic = h->host_data;
@@ -136,21 +136,9 @@ static int megamod_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int megamod_xlate(struct irq_host *h, struct device_node *ct,
-                         const u32 *intspec, unsigned int intsize,
-                         irq_hw_number_t *out_hwirq, unsigned int *out_type)
-
-{
-        /* megamod intspecs must have 1 cell */
-        BUG_ON(intsize != 1);
-        *out_hwirq = intspec[0];
-        *out_type = IRQ_TYPE_NONE;
-        return 0;
-}
-
-static struct irq_host_ops megamod_host_ops = {
+static const struct irq_domain_ops megamod_domain_ops = {
         .map    = megamod_map,
-        .xlate  = megamod_xlate,
+        .xlate  = irq_domain_xlate_onecell,
 };
 
 static void __init set_megamod_mux(struct megamod_pic *pic, int src, int output)
@@ -223,9 +211,8 @@ static struct megamod_pic * __init init_megamod_pic(struct device_node *np)
                 return NULL;
         }
 
-        pic->irqhost = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
-                                      NR_COMBINERS * 32, &megamod_host_ops,
-                                      IRQ_UNMAPPED);
+        pic->irqhost = irq_domain_add_linear(np, NR_COMBINERS * 32,
+                                             &megamod_domain_ops, pic);
         if (!pic->irqhost) {
                 pr_err("%s: Could not alloc host.\n", np->full_name);
                 goto error_free;
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index c8d6efb99dbf..11060fa87da3 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -14,6 +14,7 @@ config MICROBLAZE
         select TRACING_SUPPORT
         select OF
         select OF_EARLY_FLATTREE
+        select IRQ_DOMAIN
         select HAVE_GENERIC_HARDIRQS
         select GENERIC_IRQ_PROBE
         select GENERIC_IRQ_SHOW
diff --git a/arch/microblaze/include/asm/hardirq.h b/arch/microblaze/include/asm/hardirq.h
index cd1ac9aad56c..fb3c05a0cbbf 100644
--- a/arch/microblaze/include/asm/hardirq.h
+++ b/arch/microblaze/include/asm/hardirq.h
@@ -1,17 +1 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef _ASM_MICROBLAZE_HARDIRQ_H
-#define _ASM_MICROBLAZE_HARDIRQ_H
-
-/* should be defined in each interrupt controller driver */
-extern unsigned int get_irq(struct pt_regs *regs);
-
 #include <asm-generic/hardirq.h>
-
-#endif /* _ASM_MICROBLAZE_HARDIRQ_H */
diff --git a/arch/microblaze/include/asm/irq.h b/arch/microblaze/include/asm/irq.h
index a175132e4496..bab3b1393ad4 100644
--- a/arch/microblaze/include/asm/irq.h
+++ b/arch/microblaze/include/asm/irq.h
@@ -9,49 +9,13 @@
 #ifndef _ASM_MICROBLAZE_IRQ_H
 #define _ASM_MICROBLAZE_IRQ_H
 
-
-/*
- * Linux IRQ# is currently offset by one to map to the hardware
- * irq number. So hardware IRQ0 maps to Linux irq 1.
- */
-#define NO_IRQ_OFFSET   1
-#define IRQ_OFFSET      NO_IRQ_OFFSET
-#define NR_IRQS         (32 + IRQ_OFFSET)
+#define NR_IRQS         (32 + 1)
 #include <asm-generic/irq.h>
 
-/* This type is the placeholder for a hardware interrupt number. It has to
- * be big enough to enclose whatever representation is used by a given
- * platform.
- */
-typedef unsigned long irq_hw_number_t;
-
-extern unsigned int nr_irq;
-
 struct pt_regs;
 extern void do_IRQ(struct pt_regs *regs);
 
-/** FIXME - not implement
- * irq_dispose_mapping - Unmap an interrupt
- * @virq: linux virq number of the interrupt to unmap
- */
-static inline void irq_dispose_mapping(unsigned int virq)
-{
-        return;
-}
-
-struct irq_host;
-
-/**
- * irq_create_mapping - Map a hardware interrupt into linux virq space
- * @host: host owning this hardware interrupt or NULL for default host
- * @hwirq: hardware irq number in that host space
- *
- * Only one mapping per hardware interrupt is permitted. Returns a linux
- * virq number.
- * If the sense/trigger is to be specified, set_irq_type() should be called
- * on the number returned from that call.
- */
-extern unsigned int irq_create_mapping(struct irq_host *host,
-                                        irq_hw_number_t hwirq);
+/* should be defined in each interrupt controller driver */
+extern unsigned int get_irq(void);
 
 #endif /* _ASM_MICROBLAZE_IRQ_H */
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
index 44b177e2ab12..ad120672cee5 100644
--- a/arch/microblaze/kernel/intc.c
+++ b/arch/microblaze/kernel/intc.c
@@ -9,6 +9,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/irqdomain.h>
 #include <linux/irq.h>
 #include <asm/page.h>
 #include <linux/io.h>
@@ -25,8 +26,6 @@ static unsigned int intc_baseaddr;
 #define INTC_BASE       intc_baseaddr
 #endif
 
-unsigned int nr_irq;
-
 /* No one else should require these constants, so define them locally here. */
 #define ISR 0x00                        /* Interrupt Status Register */
 #define IPR 0x04                        /* Interrupt Pending Register */
@@ -84,24 +83,45 @@ static struct irq_chip intc_dev = {
         .irq_mask_ack = intc_mask_ack,
 };
 
-unsigned int get_irq(struct pt_regs *regs)
+static struct irq_domain *root_domain;
+
+unsigned int get_irq(void)
 {
-        int irq;
+        unsigned int hwirq, irq = -1;
 
-        /*
-         * NOTE: This function is the one that needs to be improved in
-         * order to handle multiple interrupt controllers. It currently
-         * is hardcoded to check for interrupts only on the first INTC.
-         */
-        irq = in_be32(INTC_BASE + IVR) + NO_IRQ_OFFSET;
-        pr_debug("get_irq: %d\n", irq);
+        hwirq = in_be32(INTC_BASE + IVR);
+        if (hwirq != -1U)
+                irq = irq_find_mapping(root_domain, hwirq);
+
+        pr_debug("get_irq: hwirq=%d, irq=%d\n", hwirq, irq);
 
         return irq;
 }
 
+int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
+{
+        u32 intr_mask = (u32)d->host_data;
+
+        if (intr_mask & (1 << hw)) {
+                irq_set_chip_and_handler_name(irq, &intc_dev,
+                                                handle_edge_irq, "edge");
+                irq_clear_status_flags(irq, IRQ_LEVEL);
+        } else {
+                irq_set_chip_and_handler_name(irq, &intc_dev,
+                                                handle_level_irq, "level");
+                irq_set_status_flags(irq, IRQ_LEVEL);
+        }
+        return 0;
+}
+
+static const struct irq_domain_ops xintc_irq_domain_ops = {
+        .xlate = irq_domain_xlate_onetwocell,
+        .map = xintc_map,
+};
+
 void __init init_IRQ(void)
 {
-        u32 i, intr_mask;
+        u32 nr_irq, intr_mask;
         struct device_node *intc = NULL;
 #ifdef CONFIG_SELFMOD_INTC
         unsigned int intc_baseaddr = 0;
@@ -146,16 +166,9 @@ void __init init_IRQ(void)
         /* Turn on the Master Enable. */
         out_be32(intc_baseaddr + MER, MER_HIE | MER_ME);
 
-        for (i = IRQ_OFFSET; i < (nr_irq + IRQ_OFFSET); ++i) {
-                if (intr_mask & (0x00000001 << (i - IRQ_OFFSET))) {
-                        irq_set_chip_and_handler_name(i, &intc_dev,
-                                handle_edge_irq, "edge");
-                        irq_clear_status_flags(i, IRQ_LEVEL);
-                } else {
-                        irq_set_chip_and_handler_name(i, &intc_dev,
-                                handle_level_irq, "level");
-                        irq_set_status_flags(i, IRQ_LEVEL);
-                }
-                irq_get_irq_data(i)->hwirq = i - IRQ_OFFSET;
-        }
+        /* Yeah, okay, casting the intr_mask to a void* is butt-ugly, but I'm
+         * lazy and Michal can clean it up to something nicer when he tests
+         * and commits this patch.  ~~gcl */
+        root_domain = irq_domain_add_linear(intc, nr_irq, &xintc_irq_domain_ops,
+                                                        (void *)intr_mask);
 }
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c
index bbebcae72c02..ace700afbfdf 100644
--- a/arch/microblaze/kernel/irq.c
+++ b/arch/microblaze/kernel/irq.c
@@ -31,14 +31,13 @@ void __irq_entry do_IRQ(struct pt_regs *regs)
         trace_hardirqs_off();
 
         irq_enter();
-        irq = get_irq(regs);
+        irq = get_irq();
 next_irq:
         BUG_ON(!irq);
-        /* Substract 1 because of get_irq */
-        generic_handle_irq(irq + IRQ_OFFSET - NO_IRQ_OFFSET);
+        generic_handle_irq(irq);
 
-        irq = get_irq(regs);
-        if (irq) {
+        irq = get_irq();
+        if (irq != -1U) {
                 pr_debug("next irq: %d\n", irq);
                 ++concurrent_irq;
                 goto next_irq;
@@ -48,18 +47,3 @@ next_irq:
         set_irq_regs(old_regs);
         trace_hardirqs_on();
 }
-
-/* MS: There is no any advance mapping mechanism. We are using simple 32bit
-  intc without any cascades or any connection that's why mapping is 1:1 */
-unsigned int irq_create_mapping(struct irq_host *host, irq_hw_number_t hwirq)
-{
-        return hwirq + IRQ_OFFSET;
-}
-EXPORT_SYMBOL_GPL(irq_create_mapping);
-
-unsigned int irq_create_of_mapping(struct device_node *controller,
-                                   const u32 *intspec, unsigned int intsize)
-{
-        return intspec[0] + IRQ_OFFSET;
-}
-EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index 604cd9dd1333..70e6d0b41ab4 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -51,8 +51,6 @@ void __init setup_arch(char **cmdline_p)
 
         unflatten_device_tree();
 
-        /* NOTE I think that this function is not necessary to call */
-        /* irq_early_init(); */
         setup_cpuinfo();
 
         microblaze_cache_init();
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 5ab6e89603c5..edbbae17e820 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2327,6 +2327,7 @@ config USE_OF
         bool "Flattened Device Tree support"
         select OF
         select OF_EARLY_FLATTREE
+        select IRQ_DOMAIN
         help
           Include support for flattened device tree machine descriptions.
 
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index 2354c870a63a..fb698dc09bc9 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -11,15 +11,12 @@
 
 #include <linux/linkage.h>
 #include <linux/smp.h>
+#include <linux/irqdomain.h>
 
 #include <asm/mipsmtregs.h>
 
 #include <irq.h>
 
-static inline void irq_dispose_mapping(unsigned int virq)
-{
-}
-
 #ifdef CONFIG_I8259
 static inline int irq_canonicalize(int irq)
 {
diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c
index 6b8b4208481e..558b5395795d 100644
--- a/arch/mips/kernel/prom.c
+++ b/arch/mips/kernel/prom.c
@@ -60,20 +60,6 @@ void __init early_init_dt_setup_initrd_arch(unsigned long start,
 }
 #endif
 
-/*
- * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq#
- *
- * Currently the mapping mechanism is trivial; simple flat hwirq numbers are
- * mapped 1:1 onto Linux irq numbers.  Cascaded irq controllers are not
- * supported.
- */
-unsigned int irq_create_of_mapping(struct device_node *controller,
-                                   const u32 *intspec, unsigned int intsize)
-{
-        return intspec[0];
-}
-EXPORT_SYMBOL_GPL(irq_create_of_mapping);
-
 void __init early_init_devtree(void *params)
 {
         /* Setup flat device-tree pointer */
diff --git a/arch/openrisc/include/asm/prom.h b/arch/openrisc/include/asm/prom.h
index e1f3fe26606c..bbb34e5343a2 100644
--- a/arch/openrisc/include/asm/prom.h
+++ b/arch/openrisc/include/asm/prom.h
@@ -24,6 +24,7 @@
 
 #include <linux/types.h>
 #include <asm/irq.h>
+#include <linux/irqdomain.h>
 #include <linux/atomic.h>
 #include <linux/of_irq.h>
 #include <linux/of_fdt.h>
@@ -63,15 +64,6 @@ extern const void *of_get_mac_address(struct device_node *np);
 struct pci_dev;
 extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
 
-/* This routine is here to provide compatibility with how powerpc
- * handles IRQ mapping for OF device nodes.  We precompute and permanently
- * register them in the platform_device objects, whereas powerpc computes them
- * on request.
- */
-static inline void irq_dispose_mapping(unsigned int virq)
-{
-}
-
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* _ASM_OPENRISC_PROM_H */
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 1919634a9b32..303703d716fe 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -135,6 +135,7 @@ config PPC
         select HAVE_GENERIC_HARDIRQS
         select HAVE_SPARSE_IRQ
         select IRQ_PER_CPU
+        select IRQ_DOMAIN
         select GENERIC_IRQ_SHOW
         select GENERIC_IRQ_SHOW_LEVEL
         select IRQ_FORCED_THREADING
diff --git a/arch/powerpc/include/asm/ehv_pic.h b/arch/powerpc/include/asm/ehv_pic.h
index a9e1f4f796f6..dc7d48e3ea90 100644
--- a/arch/powerpc/include/asm/ehv_pic.h
+++ b/arch/powerpc/include/asm/ehv_pic.h
@@ -25,7 +25,7 @@
 
 struct ehv_pic {
         /* The remapper for this EHV_PIC */
-        struct irq_host *irqhost;
+        struct irq_domain       *irqhost;
 
         /* The "linux" controller struct */
         struct irq_chip hc_irq;
diff --git a/arch/powerpc/include/asm/i8259.h b/arch/powerpc/include/asm/i8259.h
index 105ade297aad..c3fdfbd5a673 100644
--- a/arch/powerpc/include/asm/i8259.h
+++ b/arch/powerpc/include/asm/i8259.h
@@ -6,7 +6,7 @@
 
 extern void i8259_init(struct device_node *node, unsigned long intack_addr);
 extern unsigned int i8259_irq(void);
-extern struct irq_host *i8259_get_host(void);
+extern struct irq_domain *i8259_get_host(void);
 
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_I8259_H */
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index c0e1bc319e35..fe0b09dceb7d 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -9,6 +9,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 
+#include <linux/irqdomain.h>
 #include <linux/threads.h>
 #include <linux/list.h>
 #include <linux/radix-tree.h>
@@ -35,258 +36,12 @@ extern atomic_t ppc_n_lost_interrupts;
 /* Total number of virq in the platform */
 #define NR_IRQS         CONFIG_NR_IRQS
 
-/* Number of irqs reserved for the legacy controller */
-#define NUM_ISA_INTERRUPTS      16
-
 /* Same thing, used by the generic IRQ code */
 #define NR_IRQS_LEGACY          NUM_ISA_INTERRUPTS
 
-/* This type is the placeholder for a hardware interrupt number. It has to
- * be big enough to enclose whatever representation is used by a given
- * platform.
- */
-typedef unsigned long irq_hw_number_t;
-
-/* Interrupt controller "host" data structure. This could be defined as a
- * irq domain controller. That is, it handles the mapping between hardware
- * and virtual interrupt numbers for a given interrupt domain. The host
- * structure is generally created by the PIC code for a given PIC instance
- * (though a host can cover more than one PIC if they have a flat number
- * model). It's the host callbacks that are responsible for setting the
- * irq_chip on a given irq_desc after it's been mapped.
- *
- * The host code and data structures are fairly agnostic to the fact that
- * we use an open firmware device-tree. We do have references to struct
- * device_node in two places: in irq_find_host() to find the host matching
- * a given interrupt controller node, and of course as an argument to its
- * counterpart host->ops->match() callback. However, those are treated as
- * generic pointers by the core and the fact that it's actually a device-node
- * pointer is purely a convention between callers and implementation. This
- * code could thus be used on other architectures by replacing those two
- * by some sort of arch-specific void * "token" used to identify interrupt
- * controllers.
- */
-struct irq_host;
-struct radix_tree_root;
-
-/* Functions below are provided by the host and called whenever a new mapping
- * is created or an old mapping is disposed. The host can then proceed to
- * whatever internal data structures management is required. It also needs
- * to setup the irq_desc when returning from map().
- */
-struct irq_host_ops {
-        /* Match an interrupt controller device node to a host, returns
-         * 1 on a match
-         */
-        int (*match)(struct irq_host *h, struct device_node *node);
-
-        /* Create or update a mapping between a virtual irq number and a hw
-         * irq number. This is called only once for a given mapping.
-         */
-        int (*map)(struct irq_host *h, unsigned int virq, irq_hw_number_t hw);
-
-        /* Dispose of such a mapping */
-        void (*unmap)(struct irq_host *h, unsigned int virq);
-
-        /* Translate device-tree interrupt specifier from raw format coming
-         * from the firmware to a irq_hw_number_t (interrupt line number) and
-         * type (sense) that can be passed to set_irq_type(). In the absence
-         * of this callback, irq_create_of_mapping() and irq_of_parse_and_map()
-         * will return the hw number in the first cell and IRQ_TYPE_NONE for
-         * the type (which amount to keeping whatever default value the
-         * interrupt controller has for that line)
-         */
-        int (*xlate)(struct irq_host *h, struct device_node *ctrler,
-                     const u32 *intspec, unsigned int intsize,
-                     irq_hw_number_t *out_hwirq, unsigned int *out_type);
-};
-
-struct irq_host {
-        struct list_head        link;
-
-        /* type of reverse mapping technique */
-        unsigned int            revmap_type;
-#define IRQ_HOST_MAP_LEGACY     0 /* legacy 8259, gets irqs 1..15 */
-#define IRQ_HOST_MAP_NOMAP      1 /* no fast reverse mapping */
-#define IRQ_HOST_MAP_LINEAR     2 /* linear map of interrupts */
-#define IRQ_HOST_MAP_TREE       3 /* radix tree */
-        union {
-                struct {
-                        unsigned int size;
-                        unsigned int *revmap;
-                } linear;
-                struct radix_tree_root tree;
-        } revmap_data;
-        struct irq_host_ops     *ops;
-        void                    *host_data;
-        irq_hw_number_t         inval_irq;
-
-        /* Optional device node pointer */
-        struct device_node      *of_node;
-};
-
 struct irq_data;
 extern irq_hw_number_t irqd_to_hwirq(struct irq_data *d);
 extern irq_hw_number_t virq_to_hw(unsigned int virq);
-extern bool virq_is_host(unsigned int virq, struct irq_host *host);
-
-/**
- * irq_alloc_host - Allocate a new irq_host data structure
- * @of_node: optional device-tree node of the interrupt controller
- * @revmap_type: type of reverse mapping to use
- * @revmap_arg: for IRQ_HOST_MAP_LINEAR linear only: size of the map
- * @ops: map/unmap host callbacks
- * @inval_irq: provide a hw number in that host space that is always invalid
- *
- * Allocates and initialize and irq_host structure. Note that in the case of
- * IRQ_HOST_MAP_LEGACY, the map() callback will be called before this returns
- * for all legacy interrupts except 0 (which is always the invalid irq for
- * a legacy controller). For a IRQ_HOST_MAP_LINEAR, the map is allocated by
- * this call as well. For a IRQ_HOST_MAP_TREE, the radix tree will be allocated
- * later during boot automatically (the reverse mapping will use the slow path
- * until that happens).
- */
-extern struct irq_host *irq_alloc_host(struct device_node *of_node,
-                                       unsigned int revmap_type,
-                                       unsigned int revmap_arg,
-                                       struct irq_host_ops *ops,
-                                       irq_hw_number_t inval_irq);
-
-
-/**
- * irq_find_host - Locates a host for a given device node
- * @node: device-tree node of the interrupt controller
- */
-extern struct irq_host *irq_find_host(struct device_node *node);
-
-
-/**
- * irq_set_default_host - Set a "default" host
- * @host: default host pointer
- *
- * For convenience, it's possible to set a "default" host that will be used
- * whenever NULL is passed to irq_create_mapping(). It makes life easier for
- * platforms that want to manipulate a few hard coded interrupt numbers that
- * aren't properly represented in the device-tree.
- */
-extern void irq_set_default_host(struct irq_host *host);
-
-
-/**
- * irq_set_virq_count - Set the maximum number of virt irqs
- * @count: number of linux virtual irqs, capped with NR_IRQS
- *
- * This is mainly for use by platforms like iSeries who want to program
- * the virtual irq number in the controller to avoid the reverse mapping
- */
-extern void irq_set_virq_count(unsigned int count);
-
-
-/**
- * irq_create_mapping - Map a hardware interrupt into linux virq space
- * @host: host owning this hardware interrupt or NULL for default host
- * @hwirq: hardware irq number in that host space
- *
- * Only one mapping per hardware interrupt is permitted. Returns a linux
- * virq number.
- * If the sense/trigger is to be specified, set_irq_type() should be called
- * on the number returned from that call.
- */
-extern unsigned int irq_create_mapping(struct irq_host *host,
-                                       irq_hw_number_t hwirq);
-
-
-/**
- * irq_dispose_mapping - Unmap an interrupt
- * @virq: linux virq number of the interrupt to unmap
- */
-extern void irq_dispose_mapping(unsigned int virq);
-
-/**
- * irq_find_mapping - Find a linux virq from an hw irq number.
- * @host: host owning this hardware interrupt
- * @hwirq: hardware irq number in that host space
- *
- * This is a slow path, for use by generic code. It's expected that an
- * irq controller implementation directly calls the appropriate low level
- * mapping function.
- */
-extern unsigned int irq_find_mapping(struct irq_host *host,
-                                     irq_hw_number_t hwirq);
-
-/**
- * irq_create_direct_mapping - Allocate a virq for direct mapping
- * @host: host to allocate the virq for or NULL for default host
- *
- * This routine is used for irq controllers which can choose the hardware
- * interrupt numbers they generate. In such a case it's simplest to use
- * the linux virq as the hardware interrupt number.
- */
-extern unsigned int irq_create_direct_mapping(struct irq_host *host);
-
-/**
- * irq_radix_revmap_insert - Insert a hw irq to linux virq number mapping.
- * @host: host owning this hardware interrupt
- * @virq: linux irq number
- * @hwirq: hardware irq number in that host space
- *
- * This is for use by irq controllers that use a radix tree reverse
- * mapping for fast lookup.
- */
-extern void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
-                                    irq_hw_number_t hwirq);
-
-/**
- * irq_radix_revmap_lookup - Find a linux virq from a hw irq number.
- * @host: host owning this hardware interrupt
- * @hwirq: hardware irq number in that host space
- *
- * This is a fast path, for use by irq controller code that uses radix tree
- * revmaps
- */
-extern unsigned int irq_radix_revmap_lookup(struct irq_host *host,
-                                            irq_hw_number_t hwirq);
-
-/**
- * irq_linear_revmap - Find a linux virq from a hw irq number.
- * @host: host owning this hardware interrupt
- * @hwirq: hardware irq number in that host space
- *
- * This is a fast path, for use by irq controller code that uses linear
- * revmaps. It does fallback to the slow path if the revmap doesn't exist
- * yet and will create the revmap entry with appropriate locking
- */
-
-extern unsigned int irq_linear_revmap(struct irq_host *host,
-                                      irq_hw_number_t hwirq);
-
-
-
-/**
- * irq_alloc_virt - Allocate virtual irq numbers
- * @host: host owning these new virtual irqs
- * @count: number of consecutive numbers to allocate
- * @hint: pass a hint number, the allocator will try to use a 1:1 mapping
- *
- * This is a low level function that is used internally by irq_create_mapping()
- * and that can be used by some irq controllers implementations for things
- * like allocating ranges of numbers for MSIs. The revmaps are left untouched.
- */
-extern unsigned int irq_alloc_virt(struct irq_host *host,
-                                   unsigned int count,
-                                   unsigned int hint);
-
-/**
- * irq_free_virt - Free virtual irq numbers
- * @virq: virtual irq number of the first interrupt to free
- * @count: number of interrupts to free
- *
- * This function is the opposite of irq_alloc_virt. It will not clear reverse
- * maps, this should be done previously by unmap'ing the interrupt. In fact,
- * all interrupts covered by the range being freed should have been unmapped
- * prior to calling this.
- */
-extern void irq_free_virt(unsigned int virq, unsigned int count);
 
 /**
  * irq_early_init - Init irq remapping subsystem
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 67b4d9837236..a5b7c56237f9 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -255,7 +255,7 @@ struct mpic
         struct device_node *node;
 
         /* The remapper for this MPIC */
-        struct irq_host         *irqhost;
+        struct irq_domain       *irqhost;
 
         /* The "linux" controller struct */
         struct irq_chip         hc_irq;
diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index c48de98ba94e..4ae9a09c3b89 100644
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -86,7 +86,7 @@ struct ics {
 extern unsigned int xics_default_server;
 extern unsigned int xics_default_distrib_server;
 extern unsigned int xics_interrupt_server_size;
-extern struct irq_host *xics_host;
+extern struct irq_domain *xics_host;
 
 struct xics_cppr {
         unsigned char stack[MAX_NUM_PRIORITIES];
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 01e2877e8e04..bdfb3eee3e6f 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -490,409 +490,19 @@ void do_softirq(void)
         local_irq_restore(flags);
 }
 
-
-/*
- * IRQ controller and virtual interrupts
- */
-
-/* The main irq map itself is an array of NR_IRQ entries containing the
- * associate host and irq number. An entry with a host of NULL is free.
- * An entry can be allocated if it's free, the allocator always then sets
- * hwirq first to the host's invalid irq number and then fills ops.
- */
-struct irq_map_entry {
-        irq_hw_number_t hwirq;
-        struct irq_host *host;
-};
-
-static LIST_HEAD(irq_hosts);
-static DEFINE_RAW_SPINLOCK(irq_big_lock);
-static DEFINE_MUTEX(revmap_trees_mutex);
-static struct irq_map_entry irq_map[NR_IRQS];
-static unsigned int irq_virq_count = NR_IRQS;
-static struct irq_host *irq_default_host;
-
 irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
 {
-        return irq_map[d->irq].hwirq;
+        return d->hwirq;
 }
 EXPORT_SYMBOL_GPL(irqd_to_hwirq);
 
 irq_hw_number_t virq_to_hw(unsigned int virq)
 {
-        return irq_map[virq].hwirq;
+        struct irq_data *irq_data = irq_get_irq_data(virq);
+        return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
 }
 EXPORT_SYMBOL_GPL(virq_to_hw);
 
-bool virq_is_host(unsigned int virq, struct irq_host *host)
-{
-        return irq_map[virq].host == host;
-}
-EXPORT_SYMBOL_GPL(virq_is_host);
-
-static int default_irq_host_match(struct irq_host *h, struct device_node *np)
-{
-        return h->of_node != NULL && h->of_node == np;
-}
-
-struct irq_host *irq_alloc_host(struct device_node *of_node,
-                                unsigned int revmap_type,
-                                unsigned int revmap_arg,
-                                struct irq_host_ops *ops,
-                                irq_hw_number_t inval_irq)
-{
-        struct irq_host *host;
-        unsigned int size = sizeof(struct irq_host);
-        unsigned int i;
-        unsigned int *rmap;
-        unsigned long flags;
-
-        /* Allocate structure and revmap table if using linear mapping */
-        if (revmap_type == IRQ_HOST_MAP_LINEAR)
-                size += revmap_arg * sizeof(unsigned int);
-        host = kzalloc(size, GFP_KERNEL);
-        if (host == NULL)
-                return NULL;
-
-        /* Fill structure */
-        host->revmap_type = revmap_type;
-        host->inval_irq = inval_irq;
-        host->ops = ops;
-        host->of_node = of_node_get(of_node);
-
-        if (host->ops->match == NULL)
-                host->ops->match = default_irq_host_match;
-
-        raw_spin_lock_irqsave(&irq_big_lock, flags);
-
-        /* If it's a legacy controller, check for duplicates and
-         * mark it as allocated (we use irq 0 host pointer for that
-         */
-        if (revmap_type == IRQ_HOST_MAP_LEGACY) {
-                if (irq_map[0].host != NULL) {
-                        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-                        of_node_put(host->of_node);
-                        kfree(host);
-                        return NULL;
-                }
-                irq_map[0].host = host;
-        }
-
-        list_add(&host->link, &irq_hosts);
-        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-
-        /* Additional setups per revmap type */
-        switch(revmap_type) {
-        case IRQ_HOST_MAP_LEGACY:
-                /* 0 is always the invalid number for legacy */
-                host->inval_irq = 0;
-                /* setup us as the host for all legacy interrupts */
-                for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
-                        irq_map[i].hwirq = i;
-                        smp_wmb();
-                        irq_map[i].host = host;
-                        smp_wmb();
-
-                        /* Legacy flags are left to default at this point,
-                         * one can then use irq_create_mapping() to
-                         * explicitly change them
-                         */
-                        ops->map(host, i, i);
-
-                        /* Clear norequest flags */
-                        irq_clear_status_flags(i, IRQ_NOREQUEST);
-                }
-                break;
-        case IRQ_HOST_MAP_LINEAR:
-                rmap = (unsigned int *)(host + 1);
-                for (i = 0; i < revmap_arg; i++)
-                        rmap[i] = NO_IRQ;
-                host->revmap_data.linear.size = revmap_arg;
-                smp_wmb();
-                host->revmap_data.linear.revmap = rmap;
-                break;
-        case IRQ_HOST_MAP_TREE:
-                INIT_RADIX_TREE(&host->revmap_data.tree, GFP_KERNEL);
-                break;
-        default:
-                break;
-        }
-
-        pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
-
-        return host;
-}
-
-struct irq_host *irq_find_host(struct device_node *node)
-{
-        struct irq_host *h, *found = NULL;
-        unsigned long flags;
-
-        /* We might want to match the legacy controller last since
-         * it might potentially be set to match all interrupts in
-         * the absence of a device node. This isn't a problem so far
-         * yet though...
-         */
-        raw_spin_lock_irqsave(&irq_big_lock, flags);
-        list_for_each_entry(h, &irq_hosts, link)
-                if (h->ops->match(h, node)) {
-                        found = h;
-                        break;
-                }
-        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-        return found;
-}
-EXPORT_SYMBOL_GPL(irq_find_host);
-
-void irq_set_default_host(struct irq_host *host)
-{
-        pr_debug("irq: Default host set to @0x%p\n", host);
-
-        irq_default_host = host;
-}
-
-void irq_set_virq_count(unsigned int count)
-{
-        pr_debug("irq: Trying to set virq count to %d\n", count);
-
-        BUG_ON(count < NUM_ISA_INTERRUPTS);
-        if (count < NR_IRQS)
-                irq_virq_count = count;
-}
-
-static int irq_setup_virq(struct irq_host *host, unsigned int virq,
-                            irq_hw_number_t hwirq)
-{
-        int res;
-
-        res = irq_alloc_desc_at(virq, 0);
-        if (res != virq) {
-                pr_debug("irq: -> allocating desc failed\n");
-                goto error;
-        }
-
-        /* map it */
-        smp_wmb();
-        irq_map[virq].hwirq = hwirq;
-        smp_mb();
-
-        if (host->ops->map(host, virq, hwirq)) {
-                pr_debug("irq: -> mapping failed, freeing\n");
-                goto errdesc;
-        }
-
-        irq_clear_status_flags(virq, IRQ_NOREQUEST);
-
-        return 0;
-
-errdesc:
-        irq_free_descs(virq, 1);
-error:
-        irq_free_virt(virq, 1);
-        return -1;
-}
-
-unsigned int irq_create_direct_mapping(struct irq_host *host)
-{
-        unsigned int virq;
-
-        if (host == NULL)
-                host = irq_default_host;
-
-        BUG_ON(host == NULL);
-        WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP);
-
-        virq = irq_alloc_virt(host, 1, 0);
-        if (virq == NO_IRQ) {
-                pr_debug("irq: create_direct virq allocation failed\n");
-                return NO_IRQ;
-        }
-
-        pr_debug("irq: create_direct obtained virq %d\n", virq);
-
-        if (irq_setup_virq(host, virq, virq))
-                return NO_IRQ;
-
-        return virq;
-}
-
-unsigned int irq_create_mapping(struct irq_host *host,
-                                irq_hw_number_t hwirq)
-{
-        unsigned int virq, hint;
-
-        pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
-
-        /* Look for default host if nececssary */
-        if (host == NULL)
-                host = irq_default_host;
-        if (host == NULL) {
-                printk(KERN_WARNING "irq_create_mapping called for"
-                       " NULL host, hwirq=%lx\n", hwirq);
-                WARN_ON(1);
-                return NO_IRQ;
-        }
-        pr_debug("irq: -> using host @%p\n", host);
-
-        /* Check if mapping already exists */
-        virq = irq_find_mapping(host, hwirq);
-        if (virq != NO_IRQ) {
-                pr_debug("irq: -> existing mapping on virq %d\n", virq);
-                return virq;
-        }
-
-        /* Get a virtual interrupt number */
-        if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
-                /* Handle legacy */
-                virq = (unsigned int)hwirq;
-                if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
-                        return NO_IRQ;
-                return virq;
-        } else {
-                /* Allocate a virtual interrupt number */
-                hint = hwirq % irq_virq_count;
-                virq = irq_alloc_virt(host, 1, hint);
-                if (virq == NO_IRQ) {
-                        pr_debug("irq: -> virq allocation failed\n");
-                        return NO_IRQ;
-                }
-        }
-
-        if (irq_setup_virq(host, virq, hwirq))
-                return NO_IRQ;
-
-        pr_debug("irq: irq %lu on host %s mapped to virtual irq %u\n",
-                hwirq, host->of_node ? host->of_node->full_name : "null", virq);
-
-        return virq;
-}
-EXPORT_SYMBOL_GPL(irq_create_mapping);
-
-unsigned int irq_create_of_mapping(struct device_node *controller,
-                                   const u32 *intspec, unsigned int intsize)
-{
-        struct irq_host *host;
-        irq_hw_number_t hwirq;
-        unsigned int type = IRQ_TYPE_NONE;
-        unsigned int virq;
-
-        if (controller == NULL)
-                host = irq_default_host;
-        else
-                host = irq_find_host(controller);
-        if (host == NULL) {
-                printk(KERN_WARNING "irq: no irq host found for %s !\n",
-                       controller->full_name);
-                return NO_IRQ;
-        }
-
-        /* If host has no translation, then we assume interrupt line */
-        if (host->ops->xlate == NULL)
-                hwirq = intspec[0];
-        else {
-                if (host->ops->xlate(host, controller, intspec, intsize,
-                                     &hwirq, &type))
-                        return NO_IRQ;
-        }
-
-        /* Create mapping */
-        virq = irq_create_mapping(host, hwirq);
-        if (virq == NO_IRQ)
-                return virq;
-
-        /* Set type if specified and different than the current one */
-        if (type != IRQ_TYPE_NONE &&
-            type != (irqd_get_trigger_type(irq_get_irq_data(virq))))
-                irq_set_irq_type(virq, type);
-        return virq;
-}
-EXPORT_SYMBOL_GPL(irq_create_of_mapping);
-
-void irq_dispose_mapping(unsigned int virq)
-{
-        struct irq_host *host;
-        irq_hw_number_t hwirq;
-
-        if (virq == NO_IRQ)
-                return;
-
-        host = irq_map[virq].host;
-        if (WARN_ON(host == NULL))
-                return;
-
-        /* Never unmap legacy interrupts */
-        if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
-                return;
-
-        irq_set_status_flags(virq, IRQ_NOREQUEST);
-
-        /* remove chip and handler */
-        irq_set_chip_and_handler(virq, NULL, NULL);
-
-        /* Make sure it's completed */
-        synchronize_irq(virq);
-
-        /* Tell the PIC about it */
-        if (host->ops->unmap)
-                host->ops->unmap(host, virq);
-        smp_mb();
-
-        /* Clear reverse map */
-        hwirq = irq_map[virq].hwirq;
-        switch(host->revmap_type) {
-        case IRQ_HOST_MAP_LINEAR:
-                if (hwirq < host->revmap_data.linear.size)
-                        host->revmap_data.linear.revmap[hwirq] = NO_IRQ;
-                break;
-        case IRQ_HOST_MAP_TREE:
-                mutex_lock(&revmap_trees_mutex);
-                radix_tree_delete(&host->revmap_data.tree, hwirq);
-                mutex_unlock(&revmap_trees_mutex);
-                break;
-        }
-
-        /* Destroy map */
-        smp_mb();
-        irq_map[virq].hwirq = host->inval_irq;
-
-        irq_free_descs(virq, 1);
-        /* Free it */
-        irq_free_virt(virq, 1);
-}
-EXPORT_SYMBOL_GPL(irq_dispose_mapping);
-
-unsigned int irq_find_mapping(struct irq_host *host,
-                              irq_hw_number_t hwirq)
-{
-        unsigned int i;
-        unsigned int hint = hwirq % irq_virq_count;
-
-        /* Look for default host if nececssary */
-        if (host == NULL)
-                host = irq_default_host;
-        if (host == NULL)
-                return NO_IRQ;
-
-        /* legacy -> bail early */
-        if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
-                return hwirq;
-
-        /* Slow path does a linear search of the map */
-        if (hint < NUM_ISA_INTERRUPTS)
-                hint = NUM_ISA_INTERRUPTS;
-        i = hint;
-        do  {
-                if (irq_map[i].host == host &&
-                    irq_map[i].hwirq == hwirq)
-                        return i;
-                i++;
-                if (i >= irq_virq_count)
-                        i = NUM_ISA_INTERRUPTS;
-        } while(i != hint);
-        return NO_IRQ;
-}
-EXPORT_SYMBOL_GPL(irq_find_mapping);
-
 #ifdef CONFIG_SMP
 int irq_choose_cpu(const struct cpumask *mask)
 {
@@ -929,232 +539,11 @@ int irq_choose_cpu(const struct cpumask *mask)
 }
 #endif
 
-unsigned int irq_radix_revmap_lookup(struct irq_host *host,
-                                     irq_hw_number_t hwirq)
-{
-        struct irq_map_entry *ptr;
-        unsigned int virq;
-
-        if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_TREE))
-                return irq_find_mapping(host, hwirq);
-
-        /*
-         * The ptr returned references the static global irq_map.
-         * but freeing an irq can delete nodes along the path to
-         * do the lookup via call_rcu.
-         */
-        rcu_read_lock();
-        ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq);
-        rcu_read_unlock();
-
-        /*
-         * If found in radix tree, then fine.
-         * Else fallback to linear lookup - this should not happen in practice
-         * as it means that we failed to insert the node in the radix tree.
-         */
-        if (ptr)
-                virq = ptr - irq_map;
-        else
-                virq = irq_find_mapping(host, hwirq);
-
-        return virq;
-}
-
-void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
-                             irq_hw_number_t hwirq)
-{
-        if (WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE))
-                return;
-
-        if (virq != NO_IRQ) {
-                mutex_lock(&revmap_trees_mutex);
-                radix_tree_insert(&host->revmap_data.tree, hwirq,
-                                  &irq_map[virq]);
-                mutex_unlock(&revmap_trees_mutex);
-        }
-}
-
-unsigned int irq_linear_revmap(struct irq_host *host,
-                               irq_hw_number_t hwirq)
-{
-        unsigned int *revmap;
-
-        if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_LINEAR))
-                return irq_find_mapping(host, hwirq);
-
-        /* Check revmap bounds */
-        if (unlikely(hwirq >= host->revmap_data.linear.size))
-                return irq_find_mapping(host, hwirq);
-
-        /* Check if revmap was allocated */
-        revmap = host->revmap_data.linear.revmap;
-        if (unlikely(revmap == NULL))
-                return irq_find_mapping(host, hwirq);
-
-        /* Fill up revmap with slow path if no mapping found */
-        if (unlikely(revmap[hwirq] == NO_IRQ))
-                revmap[hwirq] = irq_find_mapping(host, hwirq);
-
-        return revmap[hwirq];
-}
-
-unsigned int irq_alloc_virt(struct irq_host *host,
-                            unsigned int count,
-                            unsigned int hint)
-{
-        unsigned long flags;
-        unsigned int i, j, found = NO_IRQ;
-
-        if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
-                return NO_IRQ;
-
-        raw_spin_lock_irqsave(&irq_big_lock, flags);
-
-        /* Use hint for 1 interrupt if any */
-        if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
-            hint < irq_virq_count && irq_map[hint].host == NULL) {
-                found = hint;
-                goto hint_found;
-        }
-
-        /* Look for count consecutive numbers in the allocatable
-         * (non-legacy) space
-         */
-        for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) {
-                if (irq_map[i].host != NULL)
-                        j = 0;
-                else
-                        j++;
-
-                if (j == count) {
-                        found = i - count + 1;
-                        break;
-                }
-        }
-        if (found == NO_IRQ) {
-                raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-                return NO_IRQ;
-        }
- hint_found:
-        for (i = found; i < (found + count); i++) {
-                irq_map[i].hwirq = host->inval_irq;
-                smp_wmb();
-                irq_map[i].host = host;
-        }
-        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-        return found;
-}
-
-void irq_free_virt(unsigned int virq, unsigned int count)
-{
-        unsigned long flags;
-        unsigned int i;
-
-        WARN_ON (virq < NUM_ISA_INTERRUPTS);
-        WARN_ON (count == 0 || (virq + count) > irq_virq_count);
-
-        if (virq < NUM_ISA_INTERRUPTS) {
-                if (virq + count < NUM_ISA_INTERRUPTS)
-                        return;
-                count  =- NUM_ISA_INTERRUPTS - virq;
-                virq = NUM_ISA_INTERRUPTS;
-        }
-
-        if (count > irq_virq_count || virq > irq_virq_count - count) {
-                if (virq > irq_virq_count)
-                        return;
-                count = irq_virq_count - virq;
-        }
-
-        raw_spin_lock_irqsave(&irq_big_lock, flags);
-        for (i = virq; i < (virq + count); i++) {
-                struct irq_host *host;
-
-                host = irq_map[i].host;
-                irq_map[i].hwirq = host->inval_irq;
-                smp_wmb();
-                irq_map[i].host = NULL;
-        }
-        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-}
-
 int arch_early_irq_init(void)
 {
         return 0;
 }
 
-#ifdef CONFIG_VIRQ_DEBUG
-static int virq_debug_show(struct seq_file *m, void *private)
-{
-        unsigned long flags;
-        struct irq_desc *desc;
-        const char *p;
-        static const char none[] = "none";
-        void *data;
-        int i;
-
-        seq_printf(m, "%-5s  %-7s  %-15s  %-18s  %s\n", "virq", "hwirq",
-                      "chip name", "chip data", "host name");
-
-        for (i = 1; i < nr_irqs; i++) {
-                desc = irq_to_desc(i);
-                if (!desc)
-                        continue;
-
-                raw_spin_lock_irqsave(&desc->lock, flags);
-
-                if (desc->action && desc->action->handler) {
-                        struct irq_chip *chip;
-
-                        seq_printf(m, "%5d  ", i);
-                        seq_printf(m, "0x%05lx  ", irq_map[i].hwirq);
-
-                        chip = irq_desc_get_chip(desc);
-                        if (chip && chip->name)
-                                p = chip->name;
-                        else
-                                p = none;
-                        seq_printf(m, "%-15s  ", p);
-
-                        data = irq_desc_get_chip_data(desc);
-                        seq_printf(m, "0x%16p  ", data);
-
-                        if (irq_map[i].host && irq_map[i].host->of_node)
-                                p = irq_map[i].host->of_node->full_name;
-                        else
-                                p = none;
-                        seq_printf(m, "%s\n", p);
-                }
-
-                raw_spin_unlock_irqrestore(&desc->lock, flags);
-        }
-
-        return 0;
-}
-
-static int virq_debug_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, virq_debug_show, inode->i_private);
-}
-
-static const struct file_operations virq_debug_fops = {
-        .open = virq_debug_open,
-        .read = seq_read,
-        .llseek = seq_lseek,
-        .release = single_release,
-};
-
-static int __init irq_debugfs_init(void)
-{
-        if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root,
-                                 NULL, &virq_debug_fops) == NULL)
-                return -ENOMEM;
-
-        return 0;
-}
-__initcall(irq_debugfs_init);
-#endif /* CONFIG_VIRQ_DEBUG */
-
 #ifdef CONFIG_PPC64
 static int __init setup_noirqdistrib(char *str)
 {
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
index 9f09319352c0..ca3a062ed1b9 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
@@ -21,7 +21,7 @@
 #include <asm/prom.h>
 
 static struct device_node *cpld_pic_node;
-static struct irq_host *cpld_pic_host;
+static struct irq_domain *cpld_pic_host;
 
 /*
  * Bits to ignore in the misc_status register
@@ -123,13 +123,13 @@ cpld_pic_cascade(unsigned int irq, struct irq_desc *desc)
 }
 
 static int
-cpld_pic_host_match(struct irq_host *h, struct device_node *node)
+cpld_pic_host_match(struct irq_domain *h, struct device_node *node)
 {
         return cpld_pic_node == node;
 }
 
 static int
-cpld_pic_host_map(struct irq_host *h, unsigned int virq,
+cpld_pic_host_map(struct irq_domain *h, unsigned int virq,
                              irq_hw_number_t hw)
 {
         irq_set_status_flags(virq, IRQ_LEVEL);
@@ -137,8 +137,7 @@ cpld_pic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static struct
-irq_host_ops cpld_pic_host_ops = {
+static const struct irq_domain_ops cpld_pic_host_ops = {
         .match = cpld_pic_host_match,
         .map = cpld_pic_host_map,
 };
@@ -191,8 +190,7 @@ mpc5121_ads_cpld_pic_init(void)
 
         cpld_pic_node = of_node_get(np);
 
-        cpld_pic_host =
-            irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, 16, &cpld_pic_host_ops, 16);
+        cpld_pic_host = irq_domain_add_linear(np, 16, &cpld_pic_host_ops, NULL);
         if (!cpld_pic_host) {
                 printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");
                 goto end;
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c
index 96f85e5e0cd3..17d91b7da315 100644
--- a/arch/powerpc/platforms/52xx/media5200.c
+++ b/arch/powerpc/platforms/52xx/media5200.c
@@ -45,7 +45,7 @@ static struct of_device_id mpc5200_gpio_ids[] __initdata = {
 struct media5200_irq {
         void __iomem *regs;
         spinlock_t lock;
-        struct irq_host *irqhost;
+        struct irq_domain *irqhost;
 };
 struct media5200_irq media5200_irq;
 
@@ -112,7 +112,7 @@ void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
         raw_spin_unlock(&desc->lock);
 }
 
-static int media5200_irq_map(struct irq_host *h, unsigned int virq,
+static int media5200_irq_map(struct irq_domain *h, unsigned int virq,
                              irq_hw_number_t hw)
 {
         pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw);
@@ -122,7 +122,7 @@ static int media5200_irq_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int media5200_irq_xlate(struct irq_host *h, struct device_node *ct,
+static int media5200_irq_xlate(struct irq_domain *h, struct device_node *ct,
                                  const u32 *intspec, unsigned int intsize,
                                  irq_hw_number_t *out_hwirq,
                                  unsigned int *out_flags)
@@ -136,7 +136,7 @@ static int media5200_irq_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-static struct irq_host_ops media5200_irq_ops = {
+static const struct irq_domain_ops media5200_irq_ops = {
         .map = media5200_irq_map,
         .xlate = media5200_irq_xlate,
 };
@@ -173,15 +173,12 @@ static void __init media5200_init_irq(void)
 
         spin_lock_init(&media5200_irq.lock);
 
-        media5200_irq.irqhost = irq_alloc_host(fpga_np, IRQ_HOST_MAP_LINEAR,
-                                               MEDIA5200_NUM_IRQS,
-                                               &media5200_irq_ops, -1);
+        media5200_irq.irqhost = irq_domain_add_linear(fpga_np,
+                        MEDIA5200_NUM_IRQS, &media5200_irq_ops, &media5200_irq);
         if (!media5200_irq.irqhost)
                 goto out;
         pr_debug("%s: allocated irqhost\n", __func__);
 
-        media5200_irq.irqhost->host_data = &media5200_irq;
-
         irq_set_handler_data(cascade_virq, &media5200_irq);
         irq_set_chained_handler(cascade_virq, media5200_irq_cascade);
 
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index f94f06e52762..028470b95886 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -81,7 +81,7 @@ MODULE_LICENSE("GPL");
  * @regs: virtual address of GPT registers
  * @lock: spinlock to coordinate between different functions.
  * @gc: gpio_chip instance structure; used when GPIO is enabled
- * @irqhost: Pointer to irq_host instance; used when IRQ mode is supported
+ * @irqhost: Pointer to irq_domain instance; used when IRQ mode is supported
  * @wdt_mode: only relevant for gpt0: bit 0 (MPC52xx_GPT_CAN_WDT) indicates
  *   if the gpt may be used as wdt, bit 1 (MPC52xx_GPT_IS_WDT) indicates
  *   if the timer is actively used as wdt which blocks gpt functions
@@ -91,7 +91,7 @@ struct mpc52xx_gpt_priv {
         struct device *dev;
         struct mpc52xx_gpt __iomem *regs;
         spinlock_t lock;
-        struct irq_host *irqhost;
+        struct irq_domain *irqhost;
         u32 ipb_freq;
         u8 wdt_mode;
 
@@ -204,7 +204,7 @@ void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc)
         }
 }
 
-static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq,
+static int mpc52xx_gpt_irq_map(struct irq_domain *h, unsigned int virq,
                                irq_hw_number_t hw)
 {
         struct mpc52xx_gpt_priv *gpt = h->host_data;
@@ -216,7 +216,7 @@ static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int mpc52xx_gpt_irq_xlate(struct irq_host *h, struct device_node *ct,
+static int mpc52xx_gpt_irq_xlate(struct irq_domain *h, struct device_node *ct,
                                  const u32 *intspec, unsigned int intsize,
                                  irq_hw_number_t *out_hwirq,
                                  unsigned int *out_flags)
@@ -236,7 +236,7 @@ static int mpc52xx_gpt_irq_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-static struct irq_host_ops mpc52xx_gpt_irq_ops = {
+static const struct irq_domain_ops mpc52xx_gpt_irq_ops = {
         .map = mpc52xx_gpt_irq_map,
         .xlate = mpc52xx_gpt_irq_xlate,
 };
@@ -252,14 +252,12 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
         if (!cascade_virq)
                 return;
 
-        gpt->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, 1,
-                                      &mpc52xx_gpt_irq_ops, -1);
+        gpt->irqhost = irq_domain_add_linear(node, 1, &mpc52xx_gpt_irq_ops, gpt);
         if (!gpt->irqhost) {
-                dev_err(gpt->dev, "irq_alloc_host() failed\n");
+                dev_err(gpt->dev, "irq_domain_add_linear() failed\n");
                 return;
         }
 
-        gpt->irqhost->host_data = gpt;
         irq_set_handler_data(cascade_virq, gpt);
         irq_set_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade);
 
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 1a9a49570579..8520b58a5e9a 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -132,7 +132,7 @@ static struct of_device_id mpc52xx_sdma_ids[] __initdata = {
 
 static struct mpc52xx_intr __iomem *intr;
 static struct mpc52xx_sdma __iomem *sdma;
-static struct irq_host *mpc52xx_irqhost = NULL;
+static struct irq_domain *mpc52xx_irqhost = NULL;
 
 static unsigned char mpc52xx_map_senses[4] = {
         IRQ_TYPE_LEVEL_HIGH,
@@ -301,7 +301,7 @@ static int mpc52xx_is_extirq(int l1, int l2)
 /**
  * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property
  */
-static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
+static int mpc52xx_irqhost_xlate(struct irq_domain *h, struct device_node *ct,
                                  const u32 *intspec, unsigned int intsize,
                                  irq_hw_number_t *out_hwirq,
                                  unsigned int *out_flags)
@@ -335,7 +335,7 @@ static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
 /**
  * mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure
  */
-static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
+static int mpc52xx_irqhost_map(struct irq_domain *h, unsigned int virq,
                                irq_hw_number_t irq)
 {
         int l1irq;
@@ -384,7 +384,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static struct irq_host_ops mpc52xx_irqhost_ops = {
+static const struct irq_domain_ops mpc52xx_irqhost_ops = {
         .xlate = mpc52xx_irqhost_xlate,
         .map = mpc52xx_irqhost_map,
 };
@@ -444,9 +444,9 @@ void __init mpc52xx_init_irq(void)
          * As last step, add an irq host to translate the real
          * hw irq information provided by the ofw to linux virq
          */
-        mpc52xx_irqhost = irq_alloc_host(picnode, IRQ_HOST_MAP_LINEAR,
+        mpc52xx_irqhost = irq_domain_add_linear(picnode,
                                          MPC52xx_IRQ_HIGHTESTHWIRQ,
-                                         &mpc52xx_irqhost_ops, -1);
+                                         &mpc52xx_irqhost_ops, NULL);
 
         if (!mpc52xx_irqhost)
                 panic(__FILE__ ": Cannot allocate the IRQ host\n");
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index 8ccf9ed62fe2..328d221fd1c0 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -29,7 +29,7 @@ static DEFINE_RAW_SPINLOCK(pci_pic_lock);
 
 struct pq2ads_pci_pic {
         struct device_node *node;
-        struct irq_host *host;
+        struct irq_domain *host;
 
         struct {
                 u32 stat;
@@ -103,7 +103,7 @@ static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
         }
 }
 
-static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
+static int pci_pic_host_map(struct irq_domain *h, unsigned int virq,
                             irq_hw_number_t hw)
 {
         irq_set_status_flags(virq, IRQ_LEVEL);
@@ -112,14 +112,14 @@ static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static struct irq_host_ops pci_pic_host_ops = {
+static const struct irq_domain_ops pci_pic_host_ops = {
         .map = pci_pic_host_map,
 };
 
 int __init pq2ads_pci_init_irq(void)
 {
         struct pq2ads_pci_pic *priv;
-        struct irq_host *host;
+        struct irq_domain *host;
         struct device_node *np;
         int ret = -ENODEV;
         int irq;
@@ -156,17 +156,13 @@ int __init pq2ads_pci_init_irq(void)
         out_be32(&priv->regs->mask, ~0);
         mb();
 
-        host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, NUM_IRQS,
-                              &pci_pic_host_ops, NUM_IRQS);
+        host = irq_domain_add_linear(np, NUM_IRQS, &pci_pic_host_ops, priv);
         if (!host) {
                 ret = -ENOMEM;
                 goto out_unmap_regs;
         }
 
-        host->host_data = priv;
-
         priv->host = host;
-        host->host_data = priv;
         irq_set_handler_data(irq, priv);
         irq_set_chained_handler(irq, pq2ads_pci_irq_demux);
 
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index 12cb9bb2cc68..3bbbf7489487 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -51,7 +51,7 @@ static struct socrates_fpga_irq_info fpga_irqs[SOCRATES_FPGA_NUM_IRQS] = {
 static DEFINE_RAW_SPINLOCK(socrates_fpga_pic_lock);
 
 static void __iomem *socrates_fpga_pic_iobase;
-static struct irq_host *socrates_fpga_pic_irq_host;
+static struct irq_domain *socrates_fpga_pic_irq_host;
 static unsigned int socrates_fpga_irqs[3];
 
 static inline uint32_t socrates_fpga_pic_read(int reg)
@@ -227,7 +227,7 @@ static struct irq_chip socrates_fpga_pic_chip = {
         .irq_set_type   = socrates_fpga_pic_set_type,
 };
 
-static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq,
+static int socrates_fpga_pic_host_map(struct irq_domain *h, unsigned int virq,
                 irq_hw_number_t hwirq)
 {
         /* All interrupts are LEVEL sensitive */
@@ -238,7 +238,7 @@ static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int socrates_fpga_pic_host_xlate(struct irq_host *h,
+static int socrates_fpga_pic_host_xlate(struct irq_domain *h,
                 struct device_node *ct, const u32 *intspec, unsigned int intsize,
                 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 {
@@ -269,7 +269,7 @@ static int socrates_fpga_pic_host_xlate(struct irq_host *h,
         return 0;
 }
 
-static struct irq_host_ops socrates_fpga_pic_host_ops = {
+static const struct irq_domain_ops socrates_fpga_pic_host_ops = {
         .map    = socrates_fpga_pic_host_map,
         .xlate  = socrates_fpga_pic_host_xlate,
 };
@@ -279,10 +279,9 @@ void socrates_fpga_pic_init(struct device_node *pic)
         unsigned long flags;
         int i;
 
-        /* Setup an irq_host structure */
-        socrates_fpga_pic_irq_host = irq_alloc_host(pic, IRQ_HOST_MAP_LINEAR,
-                        SOCRATES_FPGA_NUM_IRQS, &socrates_fpga_pic_host_ops,
-                        SOCRATES_FPGA_NUM_IRQS);
+        /* Setup an irq_domain structure */
+        socrates_fpga_pic_irq_host = irq_domain_add_linear(pic,
+                    SOCRATES_FPGA_NUM_IRQS, &socrates_fpga_pic_host_ops, NULL);
         if (socrates_fpga_pic_irq_host == NULL) {
                 pr_err("FPGA PIC: Unable to allocate host\n");
                 return;
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c
index 94594e58594c..af3fd697de82 100644
--- a/arch/powerpc/platforms/86xx/gef_pic.c
+++ b/arch/powerpc/platforms/86xx/gef_pic.c
@@ -50,7 +50,7 @@
 static DEFINE_RAW_SPINLOCK(gef_pic_lock);
 
 static void __iomem *gef_pic_irq_reg_base;
-static struct irq_host *gef_pic_irq_host;
+static struct irq_domain *gef_pic_irq_host;
 static int gef_pic_cascade_irq;
 
 /*
@@ -153,7 +153,7 @@ static struct irq_chip gef_pic_chip = {
 /* When an interrupt is being configured, this call allows some flexibilty
  * in deciding which irq_chip structure is used
  */
-static int gef_pic_host_map(struct irq_host *h, unsigned int virq,
+static int gef_pic_host_map(struct irq_domain *h, unsigned int virq,
                           irq_hw_number_t hwirq)
 {
         /* All interrupts are LEVEL sensitive */
@@ -163,7 +163,7 @@ static int gef_pic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int gef_pic_host_xlate(struct irq_host *h, struct device_node *ct,
+static int gef_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
                             const u32 *intspec, unsigned int intsize,
                             irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 {
@@ -177,7 +177,7 @@ static int gef_pic_host_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-static struct irq_host_ops gef_pic_host_ops = {
+static const struct irq_domain_ops gef_pic_host_ops = {
         .map    = gef_pic_host_map,
         .xlate  = gef_pic_host_xlate,
 };
@@ -211,10 +211,9 @@ void __init gef_pic_init(struct device_node *np)
                 return;
         }
 
-        /* Setup an irq_host structure */
-        gef_pic_irq_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
-                                          GEF_PIC_NUM_IRQS,
-                                          &gef_pic_host_ops, NO_IRQ);
+        /* Setup an irq_domain structure */
+        gef_pic_irq_host = irq_domain_add_linear(np, GEF_PIC_NUM_IRQS,
+                                          &gef_pic_host_ops, NULL);
         if (gef_pic_irq_host == NULL)
                 return;
 
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index 40a6e34793b4..db360fc4cf0e 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -67,7 +67,7 @@
 
 
 struct axon_msic {
-        struct irq_host *irq_host;
+        struct irq_domain *irq_domain;
         __le32 *fifo_virt;
         dma_addr_t fifo_phys;
         dcr_host_t dcr_host;
@@ -152,7 +152,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
 
 static struct axon_msic *find_msi_translator(struct pci_dev *dev)
 {
-        struct irq_host *irq_host;
+        struct irq_domain *irq_domain;
         struct device_node *dn, *tmp;
         const phandle *ph;
         struct axon_msic *msic = NULL;
@@ -184,14 +184,14 @@ static struct axon_msic *find_msi_translator(struct pci_dev *dev)
                 goto out_error;
         }
 
-        irq_host = irq_find_host(dn);
-        if (!irq_host) {
-                dev_dbg(&dev->dev, "axon_msi: no irq_host found for node %s\n",
+        irq_domain = irq_find_host(dn);
+        if (!irq_domain) {
+                dev_dbg(&dev->dev, "axon_msi: no irq_domain found for node %s\n",
                         dn->full_name);
                 goto out_error;
         }
 
-        msic = irq_host->host_data;
+        msic = irq_domain->host_data;
 
 out_error:
         of_node_put(dn);
@@ -280,7 +280,7 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
         BUILD_BUG_ON(NR_IRQS > 65536);
 
         list_for_each_entry(entry, &dev->msi_list, list) {
-                virq = irq_create_direct_mapping(msic->irq_host);
+                virq = irq_create_direct_mapping(msic->irq_domain);
                 if (virq == NO_IRQ) {
                         dev_warn(&dev->dev,
                                  "axon_msi: virq allocation failed!\n");
@@ -318,7 +318,7 @@ static struct irq_chip msic_irq_chip = {
         .name           = "AXON-MSI",
 };
 
-static int msic_host_map(struct irq_host *h, unsigned int virq,
+static int msic_host_map(struct irq_domain *h, unsigned int virq,
                          irq_hw_number_t hw)
 {
         irq_set_chip_data(virq, h->host_data);
@@ -327,7 +327,7 @@ static int msic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static struct irq_host_ops msic_host_ops = {
+static const struct irq_domain_ops msic_host_ops = {
         .map    = msic_host_map,
 };
 
@@ -337,7 +337,7 @@ static void axon_msi_shutdown(struct platform_device *device)
         u32 tmp;
 
         pr_devel("axon_msi: disabling %s\n",
-                  msic->irq_host->of_node->full_name);
+                  msic->irq_domain->of_node->full_name);
         tmp  = dcr_read(msic->dcr_host, MSIC_CTRL_REG);
         tmp &= ~MSIC_CTRL_ENABLE & ~MSIC_CTRL_IRQ_ENABLE;
         msic_dcr_write(msic, MSIC_CTRL_REG, tmp);
@@ -392,16 +392,13 @@ static int axon_msi_probe(struct platform_device *device)
         }
         memset(msic->fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES);
 
-        msic->irq_host = irq_alloc_host(dn, IRQ_HOST_MAP_NOMAP,
-                                        NR_IRQS, &msic_host_ops, 0);
-        if (!msic->irq_host) {
-                printk(KERN_ERR "axon_msi: couldn't allocate irq_host for %s\n",
+        msic->irq_domain = irq_domain_add_nomap(dn, &msic_host_ops, msic);
+        if (!msic->irq_domain) {
+                printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %s\n",
                        dn->full_name);
                 goto out_free_fifo;
         }
 
-        msic->irq_host->host_data = msic;
-
         irq_set_handler_data(virq, msic);
         irq_set_chained_handler(virq, axon_msi_cascade);
         pr_devel("axon_msi: irq 0x%x setup for axon_msi\n", virq);
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
index 55015e1f6939..e5c3a2c6090d 100644
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ b/arch/powerpc/platforms/cell/beat_interrupt.c
@@ -34,7 +34,7 @@ static DEFINE_RAW_SPINLOCK(beatic_irq_mask_lock);
 static uint64_t beatic_irq_mask_enable[(MAX_IRQS+255)/64];
 static uint64_t beatic_irq_mask_ack[(MAX_IRQS+255)/64];
 
-static struct irq_host *beatic_host;
+static struct irq_domain *beatic_host;
 
 /*
  * In this implementation, "virq" == "IRQ plug number",
@@ -122,7 +122,7 @@ static struct irq_chip beatic_pic = {
  *
  * Note that the number (virq) is already assigned at upper layer.
  */
-static void beatic_pic_host_unmap(struct irq_host *h, unsigned int virq)
+static void beatic_pic_host_unmap(struct irq_domain *h, unsigned int virq)
 {
         beat_destruct_irq_plug(virq);
 }
@@ -133,7 +133,7 @@ static void beatic_pic_host_unmap(struct irq_host *h, unsigned int virq)
  *
  * Note that the number (virq) is already assigned at upper layer.
  */
-static int beatic_pic_host_map(struct irq_host *h, unsigned int virq,
+static int beatic_pic_host_map(struct irq_domain *h, unsigned int virq,
                                irq_hw_number_t hw)
 {
         int64_t err;
@@ -154,7 +154,7 @@ static int beatic_pic_host_map(struct irq_host *h, unsigned int virq,
  * Called from irq_create_of_mapping() only.
  * Note: We have only 1 entry to translate.
  */
-static int beatic_pic_host_xlate(struct irq_host *h, struct device_node *ct,
+static int beatic_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
                                  const u32 *intspec, unsigned int intsize,
                                  irq_hw_number_t *out_hwirq,
                                  unsigned int *out_flags)
@@ -166,13 +166,13 @@ static int beatic_pic_host_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-static int beatic_pic_host_match(struct irq_host *h, struct device_node *np)
+static int beatic_pic_host_match(struct irq_domain *h, struct device_node *np)
 {
         /* Match all */
         return 1;
 }
 
-static struct irq_host_ops beatic_pic_host_ops = {
+static const struct irq_domain_ops beatic_pic_host_ops = {
         .map = beatic_pic_host_map,
         .unmap = beatic_pic_host_unmap,
         .xlate = beatic_pic_host_xlate,
@@ -239,9 +239,7 @@ void __init beatic_init_IRQ(void)
         ppc_md.get_irq = beatic_get_irq;
 
         /* Allocate an irq host */
-        beatic_host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0,
-                                     &beatic_pic_host_ops,
-                                         0);
+        beatic_host = irq_domain_add_nomap(NULL, &beatic_pic_host_ops, NULL);
         BUG_ON(beatic_host == NULL);
         irq_set_default_host(beatic_host);
 }
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 96a433dd2d64..2d42f3bb66d6 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -56,7 +56,7 @@ struct iic {
 
 static DEFINE_PER_CPU(struct iic, cpu_iic);
 #define IIC_NODE_COUNT  2
-static struct irq_host *iic_host;
+static struct irq_domain *iic_host;
 
 /* Convert between "pending" bits and hw irq number */
 static irq_hw_number_t iic_pending_to_hwnum(struct cbe_iic_pending_bits bits)
@@ -186,7 +186,7 @@ void iic_message_pass(int cpu, int msg)
         out_be64(&per_cpu(cpu_iic, cpu).regs->generate, (0xf - msg) << 4);
 }
 
-struct irq_host *iic_get_irq_host(int node)
+struct irq_domain *iic_get_irq_host(int node)
 {
         return iic_host;
 }
@@ -222,13 +222,13 @@ void iic_request_IPIs(void)
 #endif /* CONFIG_SMP */
 
 
-static int iic_host_match(struct irq_host *h, struct device_node *node)
+static int iic_host_match(struct irq_domain *h, struct device_node *node)
 {
         return of_device_is_compatible(node,
                                     "IBM,CBEA-Internal-Interrupt-Controller");
 }
 
-static int iic_host_map(struct irq_host *h, unsigned int virq,
+static int iic_host_map(struct irq_domain *h, unsigned int virq,
                         irq_hw_number_t hw)
 {
         switch (hw & IIC_IRQ_TYPE_MASK) {
@@ -245,7 +245,7 @@ static int iic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int iic_host_xlate(struct irq_host *h, struct device_node *ct,
+static int iic_host_xlate(struct irq_domain *h, struct device_node *ct,
                            const u32 *intspec, unsigned int intsize,
                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 
@@ -285,7 +285,7 @@ static int iic_host_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-static struct irq_host_ops iic_host_ops = {
+static const struct irq_domain_ops iic_host_ops = {
         .match = iic_host_match,
         .map = iic_host_map,
         .xlate = iic_host_xlate,
@@ -378,8 +378,8 @@ static int __init setup_iic(void)
 void __init iic_init_IRQ(void)
 {
         /* Setup an irq host data structure */
-        iic_host = irq_alloc_host(NULL, IRQ_HOST_MAP_LINEAR, IIC_SOURCE_COUNT,
-                                  &iic_host_ops, IIC_IRQ_INVALID);
+        iic_host = irq_domain_add_linear(NULL, IIC_SOURCE_COUNT, &iic_host_ops,
+                                         NULL);
         BUG_ON(iic_host == NULL);
         irq_set_default_host(iic_host);
 
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 442c28c00f88..d8b7cc8a66ca 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -62,7 +62,7 @@ enum {
 #define SPIDER_IRQ_INVALID      63
 
 struct spider_pic {
-        struct irq_host         *host;
+        struct irq_domain               *host;
         void __iomem            *regs;
         unsigned int            node_id;
 };
@@ -168,7 +168,7 @@ static struct irq_chip spider_pic = {
         .irq_set_type = spider_set_irq_type,
 };
 
-static int spider_host_map(struct irq_host *h, unsigned int virq,
+static int spider_host_map(struct irq_domain *h, unsigned int virq,
                         irq_hw_number_t hw)
 {
         irq_set_chip_data(virq, h->host_data);
@@ -180,7 +180,7 @@ static int spider_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int spider_host_xlate(struct irq_host *h, struct device_node *ct,
+static int spider_host_xlate(struct irq_domain *h, struct device_node *ct,
                            const u32 *intspec, unsigned int intsize,
                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 
@@ -194,7 +194,7 @@ static int spider_host_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-static struct irq_host_ops spider_host_ops = {
+static const struct irq_domain_ops spider_host_ops = {
         .map = spider_host_map,
         .xlate = spider_host_xlate,
 };
@@ -299,12 +299,10 @@ static void __init spider_init_one(struct device_node *of_node, int chip,
                 panic("spider_pic: can't map registers !");
 
         /* Allocate a host */
-        pic->host = irq_alloc_host(of_node, IRQ_HOST_MAP_LINEAR,
-                                   SPIDER_SRC_COUNT, &spider_host_ops,
-                                   SPIDER_IRQ_INVALID);
+        pic->host = irq_domain_add_linear(of_node, SPIDER_SRC_COUNT,
+                                          &spider_host_ops, pic);
         if (pic->host == NULL)
                 panic("spider_pic: can't allocate irq host !");
-        pic->host->host_data = pic;
 
         /* Go through all sources and disable them */
         for (i = 0; i < SPIDER_SRC_COUNT; i++) {
diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c
index f61a2dd96b99..53d6eee01963 100644
--- a/arch/powerpc/platforms/embedded6xx/flipper-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/flipper-pic.c
@@ -96,9 +96,9 @@ static struct irq_chip flipper_pic = {
  *
  */
 
-static struct irq_host *flipper_irq_host;
+static struct irq_domain *flipper_irq_host;
 
-static int flipper_pic_map(struct irq_host *h, unsigned int virq,
+static int flipper_pic_map(struct irq_domain *h, unsigned int virq,
                            irq_hw_number_t hwirq)
 {
         irq_set_chip_data(virq, h->host_data);
@@ -107,13 +107,13 @@ static int flipper_pic_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int flipper_pic_match(struct irq_host *h, struct device_node *np)
+static int flipper_pic_match(struct irq_domain *h, struct device_node *np)
 {
         return 1;
 }
 
 
-static struct irq_host_ops flipper_irq_host_ops = {
+static const struct irq_domain_ops flipper_irq_domain_ops = {
         .map = flipper_pic_map,
         .match = flipper_pic_match,
 };
@@ -130,10 +130,10 @@ static void __flipper_quiesce(void __iomem *io_base)
         out_be32(io_base + FLIPPER_ICR, 0xffffffff);
 }
 
-struct irq_host * __init flipper_pic_init(struct device_node *np)
+struct irq_domain * __init flipper_pic_init(struct device_node *np)
 {
         struct device_node *pi;
-        struct irq_host *irq_host = NULL;
+        struct irq_domain *irq_domain = NULL;
         struct resource res;
         void __iomem *io_base;
         int retval;
@@ -159,17 +159,15 @@ struct irq_host * __init flipper_pic_init(struct device_node *np)
 
         __flipper_quiesce(io_base);
 
-        irq_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, FLIPPER_NR_IRQS,
-                                  &flipper_irq_host_ops, -1);
-        if (!irq_host) {
-                pr_err("failed to allocate irq_host\n");
+        irq_domain = irq_domain_add_linear(np, FLIPPER_NR_IRQS,
+                                  &flipper_irq_domain_ops, io_base);
+        if (!irq_domain) {
+                pr_err("failed to allocate irq_domain\n");
                 return NULL;
         }
 
-        irq_host->host_data = io_base;
-
 out:
-        return irq_host;
+        return irq_domain;
 }
 
 unsigned int flipper_pic_get_irq(void)
diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
index e4919170c6bc..3006b5117ec6 100644
--- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
@@ -89,9 +89,9 @@ static struct irq_chip hlwd_pic = {
  *
  */
 
-static struct irq_host *hlwd_irq_host;
+static struct irq_domain *hlwd_irq_host;
 
-static int hlwd_pic_map(struct irq_host *h, unsigned int virq,
+static int hlwd_pic_map(struct irq_domain *h, unsigned int virq,
                            irq_hw_number_t hwirq)
 {
         irq_set_chip_data(virq, h->host_data);
@@ -100,11 +100,11 @@ static int hlwd_pic_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static struct irq_host_ops hlwd_irq_host_ops = {
+static const struct irq_domain_ops hlwd_irq_domain_ops = {
         .map = hlwd_pic_map,
 };
 
-static unsigned int __hlwd_pic_get_irq(struct irq_host *h)
+static unsigned int __hlwd_pic_get_irq(struct irq_domain *h)
 {
         void __iomem *io_base = h->host_data;
         int irq;
@@ -123,14 +123,14 @@ static void hlwd_pic_irq_cascade(unsigned int cascade_virq,
                                       struct irq_desc *desc)
 {
         struct irq_chip *chip = irq_desc_get_chip(desc);
-        struct irq_host *irq_host = irq_get_handler_data(cascade_virq);
+        struct irq_domain *irq_domain = irq_get_handler_data(cascade_virq);
         unsigned int virq;
 
         raw_spin_lock(&desc->lock);
         chip->irq_mask(&desc->irq_data); /* IRQ_LEVEL */
         raw_spin_unlock(&desc->lock);
 
-        virq = __hlwd_pic_get_irq(irq_host);
+        virq = __hlwd_pic_get_irq(irq_domain);
         if (virq != NO_IRQ)
                 generic_handle_irq(virq);
         else
@@ -155,9 +155,9 @@ static void __hlwd_quiesce(void __iomem *io_base)
         out_be32(io_base + HW_BROADWAY_ICR, 0xffffffff);
 }
 
-struct irq_host *hlwd_pic_init(struct device_node *np)
+struct irq_domain *hlwd_pic_init(struct device_node *np)
 {
-        struct irq_host *irq_host;
+        struct irq_domain *irq_domain;
         struct resource res;
         void __iomem *io_base;
         int retval;
@@ -177,15 +177,14 @@ struct irq_host *hlwd_pic_init(struct device_node *np)
 
         __hlwd_quiesce(io_base);
 
-        irq_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, HLWD_NR_IRQS,
-                                  &hlwd_irq_host_ops, -1);
-        if (!irq_host) {
-                pr_err("failed to allocate irq_host\n");
+        irq_domain = irq_domain_add_linear(np, HLWD_NR_IRQS,
+                                           &hlwd_irq_domain_ops, io_base);
+        if (!irq_domain) {
+                pr_err("failed to allocate irq_domain\n");
                 return NULL;
         }
-        irq_host->host_data = io_base;
 
-        return irq_host;
+        return irq_domain;
 }
 
 unsigned int hlwd_pic_get_irq(void)
@@ -200,7 +199,7 @@ unsigned int hlwd_pic_get_irq(void)
 
 void hlwd_pic_probe(void)
 {
-        struct irq_host *host;
+        struct irq_domain *host;
         struct device_node *np;
         const u32 *interrupts;
         int cascade_virq;
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index b2103453eb01..05ce5164cafc 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -342,7 +342,7 @@ unsigned int iSeries_get_irq(void)
 
 #ifdef CONFIG_PCI
 
-static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
+static int iseries_irq_host_map(struct irq_domain *h, unsigned int virq,
                                 irq_hw_number_t hw)
 {
         irq_set_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq);
@@ -350,13 +350,13 @@ static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int iseries_irq_host_match(struct irq_host *h, struct device_node *np)
+static int iseries_irq_host_match(struct irq_domain *h, struct device_node *np)
 {
         /* Match all */
         return 1;
 }
 
-static struct irq_host_ops iseries_irq_host_ops = {
+static const struct irq_domain_ops iseries_irq_domain_ops = {
         .map = iseries_irq_host_map,
         .match = iseries_irq_host_match,
 };
@@ -368,7 +368,7 @@ static struct irq_host_ops iseries_irq_host_ops = {
 void __init iSeries_init_IRQ(void)
 {
         /* Register PCI event handler and open an event path */
-        struct irq_host *host;
+        struct irq_domain *host;
         int ret;
 
         /*
@@ -380,8 +380,7 @@ void __init iSeries_init_IRQ(void)
         /* Create irq host. No need for a revmap since HV will give us
          * back our virtual irq number
          */
-        host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0,
-                              &iseries_irq_host_ops, 0);
+        host = irq_domain_add_nomap(NULL, &iseries_irq_domain_ops, NULL);
         BUG_ON(host == NULL);
         irq_set_default_host(host);
 
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 7761aabfc293..92afc382a49e 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -61,7 +61,7 @@ static DEFINE_RAW_SPINLOCK(pmac_pic_lock);
 static unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
 static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
 static int pmac_irq_cascade = -1;
-static struct irq_host *pmac_pic_host;
+static struct irq_domain *pmac_pic_host;
 
 static void __pmac_retrigger(unsigned int irq_nr)
 {
@@ -268,13 +268,13 @@ static struct irqaction gatwick_cascade_action = {
         .name           = "cascade",
 };
 
-static int pmac_pic_host_match(struct irq_host *h, struct device_node *node)
+static int pmac_pic_host_match(struct irq_domain *h, struct device_node *node)
 {
         /* We match all, we don't always have a node anyway */
         return 1;
 }
 
-static int pmac_pic_host_map(struct irq_host *h, unsigned int virq,
+static int pmac_pic_host_map(struct irq_domain *h, unsigned int virq,
                              irq_hw_number_t hw)
 {
         if (hw >= max_irqs)
@@ -288,21 +288,10 @@ static int pmac_pic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int pmac_pic_host_xlate(struct irq_host *h, struct device_node *ct,
-                               const u32 *intspec, unsigned int intsize,
-                               irq_hw_number_t *out_hwirq,
-                               unsigned int *out_flags)
-
-{
-        *out_flags = IRQ_TYPE_NONE;
-        *out_hwirq = *intspec;
-        return 0;
-}
-
-static struct irq_host_ops pmac_pic_host_ops = {
+static const struct irq_domain_ops pmac_pic_host_ops = {
         .match = pmac_pic_host_match,
         .map = pmac_pic_host_map,
-        .xlate = pmac_pic_host_xlate,
+        .xlate = irq_domain_xlate_onecell,
 };
 
 static void __init pmac_pic_probe_oldstyle(void)
@@ -352,9 +341,8 @@ static void __init pmac_pic_probe_oldstyle(void)
         /*
          * Allocate an irq host
          */
-        pmac_pic_host = irq_alloc_host(master, IRQ_HOST_MAP_LINEAR, max_irqs,
-                                       &pmac_pic_host_ops,
-                                       max_irqs);
+        pmac_pic_host = irq_domain_add_linear(master, max_irqs,
+                                              &pmac_pic_host_ops, NULL);
         BUG_ON(pmac_pic_host == NULL);
         irq_set_default_host(pmac_pic_host);
 
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 44d769258ebf..a81e5a88fbdf 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -125,7 +125,7 @@ static volatile u32 __iomem *psurge_start;
 static int psurge_type = PSURGE_NONE;
 
 /* irq for secondary cpus to report */
-static struct irq_host *psurge_host;
+static struct irq_domain *psurge_host;
 int psurge_secondary_virq;
 
 /*
@@ -176,7 +176,7 @@ static void smp_psurge_cause_ipi(int cpu, unsigned long data)
         psurge_set_ipi(cpu);
 }
 
-static int psurge_host_map(struct irq_host *h, unsigned int virq,
+static int psurge_host_map(struct irq_domain *h, unsigned int virq,
                          irq_hw_number_t hw)
 {
         irq_set_chip_and_handler(virq, &dummy_irq_chip, handle_percpu_irq);
@@ -184,7 +184,7 @@ static int psurge_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-struct irq_host_ops psurge_host_ops = {
+static const struct irq_domain_ops psurge_host_ops = {
         .map    = psurge_host_map,
 };
 
@@ -192,8 +192,7 @@ static int psurge_secondary_ipi_init(void)
 {
         int rc = -ENOMEM;
 
-        psurge_host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0,
-                &psurge_host_ops, 0);
+        psurge_host = irq_domain_add_nomap(NULL, &psurge_host_ops, NULL);
 
         if (psurge_host)
                 psurge_secondary_virq = irq_create_direct_mapping(psurge_host);
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 617efa12a3a5..2a4ff86cc21f 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -667,7 +667,7 @@ static void __maybe_unused _dump_mask(struct ps3_private *pd,
 static void dump_bmp(struct ps3_private* pd) {};
 #endif /* defined(DEBUG) */
 
-static int ps3_host_map(struct irq_host *h, unsigned int virq,
+static int ps3_host_map(struct irq_domain *h, unsigned int virq,
         irq_hw_number_t hwirq)
 {
         DBG("%s:%d: hwirq %lu, virq %u\n", __func__, __LINE__, hwirq,
@@ -678,13 +678,13 @@ static int ps3_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int ps3_host_match(struct irq_host *h, struct device_node *np)
+static int ps3_host_match(struct irq_domain *h, struct device_node *np)
 {
         /* Match all */
         return 1;
 }
 
-static struct irq_host_ops ps3_host_ops = {
+static const struct irq_domain_ops ps3_host_ops = {
         .map = ps3_host_map,
         .match = ps3_host_match,
 };
@@ -751,10 +751,9 @@ void __init ps3_init_IRQ(void)
 {
         int result;
         unsigned cpu;
-        struct irq_host *host;
+        struct irq_domain *host;
 
-        host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0, &ps3_host_ops,
-                PS3_INVALID_OUTLET);
+        host = irq_domain_add_nomap(NULL, &ps3_host_ops, NULL);
         irq_set_default_host(host);
         irq_set_virq_count(PS3_PLUG_MAX + 1);
 
diff --git a/arch/powerpc/platforms/wsp/opb_pic.c b/arch/powerpc/platforms/wsp/opb_pic.c
index 19f353dfcd03..cb565bf93650 100644
--- a/arch/powerpc/platforms/wsp/opb_pic.c
+++ b/arch/powerpc/platforms/wsp/opb_pic.c
@@ -30,7 +30,7 @@
 static int opb_index = 0;
 
 struct opb_pic {
-        struct irq_host *host;
+        struct irq_domain *host;
         void *regs;
         int index;
         spinlock_t lock;
@@ -179,7 +179,7 @@ static struct irq_chip opb_irq_chip = {
         .irq_set_type   = opb_set_irq_type
 };
 
-static int opb_host_map(struct irq_host *host, unsigned int virq,
+static int opb_host_map(struct irq_domain *host, unsigned int virq,
                 irq_hw_number_t hwirq)
 {
         struct opb_pic *opb;
@@ -196,20 +196,9 @@ static int opb_host_map(struct irq_host *host, unsigned int virq,
         return 0;
 }
 
-static int opb_host_xlate(struct irq_host *host, struct device_node *dn,
-                const u32 *intspec, unsigned int intsize,
-                irq_hw_number_t *out_hwirq, unsigned int *out_type)
-{
-        /* Interrupt size must == 2 */
-        BUG_ON(intsize != 2);
-        *out_hwirq = intspec[0];
-        *out_type = intspec[1];
-        return 0;
-}
-
-static struct irq_host_ops opb_host_ops = {
+static const struct irq_domain_ops opb_host_ops = {
         .map = opb_host_map,
-        .xlate = opb_host_xlate,
+        .xlate = irq_domain_xlate_twocell,
 };
 
 irqreturn_t opb_irq_handler(int irq, void *private)
@@ -263,13 +252,11 @@ struct opb_pic *opb_pic_init_one(struct device_node *dn)
                 goto free_opb;
         }
 
-        /* Allocate an irq host so that Linux knows that despite only
+        /* Allocate an irq domain so that Linux knows that despite only
          * having one interrupt to issue, we're the controller for multiple
          * hardware IRQs, so later we can lookup their virtual IRQs. */
 
-        opb->host = irq_alloc_host(dn, IRQ_HOST_MAP_LINEAR,
-                        OPB_NR_IRQS, &opb_host_ops, -1);
-
+        opb->host = irq_domain_add_linear(dn, OPB_NR_IRQS, &opb_host_ops, opb);
         if (!opb->host) {
                 printk(KERN_ERR "opb: Failed to allocate IRQ host!\n");
                 goto free_regs;
@@ -277,7 +264,6 @@ struct opb_pic *opb_pic_init_one(struct device_node *dn)
 
         opb->index = opb_index++;
         spin_lock_init(&opb->lock);
-        opb->host->host_data = opb;
 
         /* Disable all interrupts by default */
         opb_out(opb, OPB_MLSASIER, 0);
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 5d7d59a43c4c..d4fa03f2b6ac 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -54,7 +54,7 @@ cpm8xx_t __iomem *cpmp;  /* Pointer to comm processor space */
 immap_t __iomem *mpc8xx_immr;
 static cpic8xx_t __iomem *cpic_reg;
 
-static struct irq_host *cpm_pic_host;
+static struct irq_domain *cpm_pic_host;
 
 static void cpm_mask_irq(struct irq_data *d)
 {
@@ -98,7 +98,7 @@ int cpm_get_irq(void)
         return irq_linear_revmap(cpm_pic_host, cpm_vec);
 }
 
-static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
+static int cpm_pic_host_map(struct irq_domain *h, unsigned int virq,
                           irq_hw_number_t hw)
 {
         pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw);
@@ -123,7 +123,7 @@ static struct irqaction cpm_error_irqaction = {
         .name = "error",
 };
 
-static struct irq_host_ops cpm_pic_host_ops = {
+static const struct irq_domain_ops cpm_pic_host_ops = {
         .map = cpm_pic_host_map,
 };
 
@@ -164,8 +164,7 @@ unsigned int cpm_pic_init(void)
 
         out_be32(&cpic_reg->cpic_cimr, 0);
 
-        cpm_pic_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
-                                      64, &cpm_pic_host_ops, 64);
+        cpm_pic_host = irq_domain_add_linear(np, 64, &cpm_pic_host_ops, NULL);
         if (cpm_pic_host == NULL) {
                 printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
                 sirq = NO_IRQ;
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index bcab50e2a9eb..d3be961e2ae7 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -50,7 +50,7 @@
 
 static intctl_cpm2_t __iomem *cpm2_intctl;
 
-static struct irq_host *cpm2_pic_host;
+static struct irq_domain *cpm2_pic_host;
 #define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
 static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
 
@@ -214,7 +214,7 @@ unsigned int cpm2_get_irq(void)
         return irq_linear_revmap(cpm2_pic_host, irq);
 }
 
-static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq,
+static int cpm2_pic_host_map(struct irq_domain *h, unsigned int virq,
                           irq_hw_number_t hw)
 {
         pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw);
@@ -224,21 +224,9 @@ static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int cpm2_pic_host_xlate(struct irq_host *h, struct device_node *ct,
-                            const u32 *intspec, unsigned int intsize,
-                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
-{
-        *out_hwirq = intspec[0];
-        if (intsize > 1)
-                *out_flags = intspec[1];
-        else
-                *out_flags = IRQ_TYPE_NONE;
-        return 0;
-}
-
-static struct irq_host_ops cpm2_pic_host_ops = {
+static const struct irq_domain_ops cpm2_pic_host_ops = {
         .map = cpm2_pic_host_map,
-        .xlate = cpm2_pic_host_xlate,
+        .xlate = irq_domain_xlate_onetwocell,
 };
 
 void cpm2_pic_init(struct device_node *node)
@@ -275,8 +263,7 @@ void cpm2_pic_init(struct device_node *node)
         out_be32(&cpm2_intctl->ic_scprrl, 0x05309770);
 
         /* create a legacy host */
-        cpm2_pic_host = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
-                                       64, &cpm2_pic_host_ops, 64);
+        cpm2_pic_host = irq_domain_add_linear(node, 64, &cpm2_pic_host_ops, NULL);
         if (cpm2_pic_host == NULL) {
                 printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
                 return;
diff --git a/arch/powerpc/sysdev/ehv_pic.c b/arch/powerpc/sysdev/ehv_pic.c
index b6731e4a6646..6e0e1005227f 100644
--- a/arch/powerpc/sysdev/ehv_pic.c
+++ b/arch/powerpc/sysdev/ehv_pic.c
@@ -182,13 +182,13 @@ unsigned int ehv_pic_get_irq(void)
         return irq_linear_revmap(global_ehv_pic->irqhost, irq);
 }
 
-static int ehv_pic_host_match(struct irq_host *h, struct device_node *node)
+static int ehv_pic_host_match(struct irq_domain *h, struct device_node *node)
 {
         /* Exact match, unless ehv_pic node is NULL */
         return h->of_node == NULL || h->of_node == node;
 }
 
-static int ehv_pic_host_map(struct irq_host *h, unsigned int virq,
+static int ehv_pic_host_map(struct irq_domain *h, unsigned int virq,
                          irq_hw_number_t hw)
 {
         struct ehv_pic *ehv_pic = h->host_data;
@@ -217,7 +217,7 @@ static int ehv_pic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int ehv_pic_host_xlate(struct irq_host *h, struct device_node *ct,
+static int ehv_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
                            const u32 *intspec, unsigned int intsize,
                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 
@@ -248,7 +248,7 @@ static int ehv_pic_host_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-static struct irq_host_ops ehv_pic_host_ops = {
+static const struct irq_domain_ops ehv_pic_host_ops = {
         .match = ehv_pic_host_match,
         .map = ehv_pic_host_map,
         .xlate = ehv_pic_host_xlate,
@@ -275,9 +275,8 @@ void __init ehv_pic_init(void)
                 return;
         }
 
-        ehv_pic->irqhost = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
-                NR_EHV_PIC_INTS, &ehv_pic_host_ops, 0);
-
+        ehv_pic->irqhost = irq_domain_add_linear(np, NR_EHV_PIC_INTS,
+                                                 &ehv_pic_host_ops, ehv_pic);
         if (!ehv_pic->irqhost) {
                 of_node_put(np);
                 kfree(ehv_pic);
@@ -293,7 +292,6 @@ void __init ehv_pic_init(void)
                 of_node_put(np2);
         }
 
-        ehv_pic->irqhost->host_data = ehv_pic;
         ehv_pic->hc_irq = ehv_pic_irq_chip;
         ehv_pic->hc_irq.irq_set_affinity = ehv_pic_set_affinity;
         ehv_pic->coreint_flag = coreint_flag;
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index ecb5c1946d22..0c01debe963b 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -60,7 +60,7 @@ static struct irq_chip fsl_msi_chip = {
         .name           = "FSL-MSI",
 };
 
-static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
+static int fsl_msi_host_map(struct irq_domain *h, unsigned int virq,
                                 irq_hw_number_t hw)
 {
         struct fsl_msi *msi_data = h->host_data;
@@ -74,7 +74,7 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static struct irq_host_ops fsl_msi_host_ops = {
+static const struct irq_domain_ops fsl_msi_host_ops = {
         .map = fsl_msi_host_map,
 };
 
@@ -387,8 +387,8 @@ static int __devinit fsl_of_msi_probe(struct platform_device *dev)
         }
         platform_set_drvdata(dev, msi);
 
-        msi->irqhost = irq_alloc_host(dev->dev.of_node, IRQ_HOST_MAP_LINEAR,
-                                      NR_MSI_IRQS, &fsl_msi_host_ops, 0);
+        msi->irqhost = irq_domain_add_linear(dev->dev.of_node,
+                                      NR_MSI_IRQS, &fsl_msi_host_ops, msi);
 
         if (msi->irqhost == NULL) {
                 dev_err(&dev->dev, "No memory for MSI irqhost\n");
@@ -420,8 +420,6 @@ static int __devinit fsl_of_msi_probe(struct platform_device *dev)
 
         msi->feature = features->fsl_pic_ip;
 
-        msi->irqhost->host_data = msi;
-
         /*
          * Remember the phandle, so that we can match with any PCI nodes
          * that have an "fsl,msi" property.
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
index f6c646a52541..8225f8653f78 100644
--- a/arch/powerpc/sysdev/fsl_msi.h
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -26,7 +26,7 @@
 #define FSL_PIC_IP_VMPIC  0x00000003
 
 struct fsl_msi {
-        struct irq_host *irqhost;
+        struct irq_domain *irqhost;
 
         unsigned long cascade_irq;
 
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
index d18bb27e4df9..997df6a7ab5d 100644
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -25,7 +25,7 @@ static unsigned char cached_8259[2] = { 0xff, 0xff };
 
 static DEFINE_RAW_SPINLOCK(i8259_lock);
 
-static struct irq_host *i8259_host;
+static struct irq_domain *i8259_host;
 
 /*
  * Acknowledge the IRQ using either the PCI host bridge's interrupt
@@ -163,12 +163,12 @@ static struct resource pic_edgectrl_iores = {
         .flags = IORESOURCE_BUSY,
 };
 
-static int i8259_host_match(struct irq_host *h, struct device_node *node)
+static int i8259_host_match(struct irq_domain *h, struct device_node *node)
 {
         return h->of_node == NULL || h->of_node == node;
 }
 
-static int i8259_host_map(struct irq_host *h, unsigned int virq,
+static int i8259_host_map(struct irq_domain *h, unsigned int virq,
                           irq_hw_number_t hw)
 {
         pr_debug("i8259_host_map(%d, 0x%lx)\n", virq, hw);
@@ -185,7 +185,7 @@ static int i8259_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int i8259_host_xlate(struct irq_host *h, struct device_node *ct,
+static int i8259_host_xlate(struct irq_domain *h, struct device_node *ct,
                             const u32 *intspec, unsigned int intsize,
                             irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 {
@@ -205,13 +205,13 @@ static int i8259_host_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-static struct irq_host_ops i8259_host_ops = {
+static struct irq_domain_ops i8259_host_ops = {
         .match = i8259_host_match,
         .map = i8259_host_map,
         .xlate = i8259_host_xlate,
 };
 
-struct irq_host *i8259_get_host(void)
+struct irq_domain *i8259_get_host(void)
 {
         return i8259_host;
 }
@@ -263,8 +263,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr)
         raw_spin_unlock_irqrestore(&i8259_lock, flags);
 
         /* create a legacy host */
-        i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY,
-                                    0, &i8259_host_ops, 0);
+        i8259_host = irq_domain_add_legacy_isa(node, &i8259_host_ops, NULL);
         if (i8259_host == NULL) {
                 printk(KERN_ERR "i8259: failed to allocate irq host !\n");
                 return;
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 95da897f05a7..b50f97811c25 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -672,13 +672,13 @@ static struct irq_chip ipic_edge_irq_chip = {
         .irq_set_type   = ipic_set_irq_type,
 };
 
-static int ipic_host_match(struct irq_host *h, struct device_node *node)
+static int ipic_host_match(struct irq_domain *h, struct device_node *node)
 {
         /* Exact match, unless ipic node is NULL */
         return h->of_node == NULL || h->of_node == node;
 }
 
-static int ipic_host_map(struct irq_host *h, unsigned int virq,
+static int ipic_host_map(struct irq_domain *h, unsigned int virq,
                          irq_hw_number_t hw)
 {
         struct ipic *ipic = h->host_data;
@@ -692,26 +692,10 @@ static int ipic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int ipic_host_xlate(struct irq_host *h, struct device_node *ct,
-                           const u32 *intspec, unsigned int intsize,
-                           irq_hw_number_t *out_hwirq, unsigned int *out_flags)
-
-{
-        /* interrupt sense values coming from the device tree equal either
-         * LEVEL_LOW (low assertion) or EDGE_FALLING (high-to-low change)
-         */
-        *out_hwirq = intspec[0];
-        if (intsize > 1)
-                *out_flags = intspec[1];
-        else
-                *out_flags = IRQ_TYPE_NONE;
-        return 0;
-}
-
-static struct irq_host_ops ipic_host_ops = {
+static struct irq_domain_ops ipic_host_ops = {
         .match  = ipic_host_match,
         .map    = ipic_host_map,
-        .xlate  = ipic_host_xlate,
+        .xlate  = irq_domain_xlate_onetwocell,
 };
 
 struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
@@ -728,9 +712,8 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
         if (ipic == NULL)
                 return NULL;
 
-        ipic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
-                                       NR_IPIC_INTS,
-                                       &ipic_host_ops, 0);
+        ipic->irqhost = irq_domain_add_linear(node, NR_IPIC_INTS,
+                                              &ipic_host_ops, ipic);
         if (ipic->irqhost == NULL) {
                 kfree(ipic);
                 return NULL;
@@ -738,8 +721,6 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
 
         ipic->regs = ioremap(res.start, resource_size(&res));
 
-        ipic->irqhost->host_data = ipic;
-
         /* init hw */
         ipic_write(ipic->regs, IPIC_SICNR, 0x0);
 
diff --git a/arch/powerpc/sysdev/ipic.h b/arch/powerpc/sysdev/ipic.h
index 9391c57b0c51..90031d1282e1 100644
--- a/arch/powerpc/sysdev/ipic.h
+++ b/arch/powerpc/sysdev/ipic.h
@@ -43,7 +43,7 @@ struct ipic {
         volatile u32 __iomem    *regs;
 
         /* The remapper for this IPIC */
-        struct irq_host         *irqhost;
+        struct irq_domain               *irqhost;
 };
 
 struct ipic_info {
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index 2ca0a85fcce9..d5f5416be310 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -17,7 +17,7 @@
 
 extern int cpm_get_irq(struct pt_regs *regs);
 
-static struct irq_host *mpc8xx_pic_host;
+static struct irq_domain *mpc8xx_pic_host;
 #define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
 static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
 static sysconf8xx_t __iomem *siu_reg;
@@ -110,7 +110,7 @@ unsigned int mpc8xx_get_irq(void)
 
 }
 
-static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq,
+static int mpc8xx_pic_host_map(struct irq_domain *h, unsigned int virq,
                           irq_hw_number_t hw)
 {
         pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw);
@@ -121,7 +121,7 @@ static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq,
 }
 
 
-static int mpc8xx_pic_host_xlate(struct irq_host *h, struct device_node *ct,
+static int mpc8xx_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
                             const u32 *intspec, unsigned int intsize,
                             irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 {
@@ -142,7 +142,7 @@ static int mpc8xx_pic_host_xlate(struct irq_host *h, struct device_node *ct,
 }
 
 
-static struct irq_host_ops mpc8xx_pic_host_ops = {
+static struct irq_domain_ops mpc8xx_pic_host_ops = {
         .map = mpc8xx_pic_host_map,
         .xlate = mpc8xx_pic_host_xlate,
 };
@@ -171,8 +171,7 @@ int mpc8xx_pic_init(void)
                 goto out;
         }
 
-        mpc8xx_pic_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
-                                         64, &mpc8xx_pic_host_ops, 64);
+        mpc8xx_pic_host = irq_domain_add_linear(np, 64, &mpc8xx_pic_host_ops, NULL);
         if (mpc8xx_pic_host == NULL) {
                 printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");
                 ret = -ENOMEM;
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 4e9ccb1015de..c83a512fa175 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -965,13 +965,13 @@ static struct irq_chip mpic_irq_ht_chip = {
 #endif /* CONFIG_MPIC_U3_HT_IRQS */
 
 
-static int mpic_host_match(struct irq_host *h, struct device_node *node)
+static int mpic_host_match(struct irq_domain *h, struct device_node *node)
 {
         /* Exact match, unless mpic node is NULL */
         return h->of_node == NULL || h->of_node == node;
 }
 
-static int mpic_host_map(struct irq_host *h, unsigned int virq,
+static int mpic_host_map(struct irq_domain *h, unsigned int virq,
                          irq_hw_number_t hw)
 {
         struct mpic *mpic = h->host_data;
@@ -1041,7 +1041,7 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int mpic_host_xlate(struct irq_host *h, struct device_node *ct,
+static int mpic_host_xlate(struct irq_domain *h, struct device_node *ct,
                            const u32 *intspec, unsigned int intsize,
                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 
@@ -1121,13 +1121,13 @@ static void mpic_cascade(unsigned int irq, struct irq_desc *desc)
         BUG_ON(!(mpic->flags & MPIC_SECONDARY));
 
         virq = mpic_get_one_irq(mpic);
-        if (virq != NO_IRQ)
+        if (virq)
                 generic_handle_irq(virq);
 
         chip->irq_eoi(&desc->irq_data);
 }
 
-static struct irq_host_ops mpic_host_ops = {
+static struct irq_domain_ops mpic_host_ops = {
         .match = mpic_host_match,
         .map = mpic_host_map,
         .xlate = mpic_host_xlate,
@@ -1345,10 +1345,9 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
         mpic->isu_mask = (1 << mpic->isu_shift) - 1;
 
-        mpic->irqhost = irq_alloc_host(mpic->node, IRQ_HOST_MAP_LINEAR,
+        mpic->irqhost = irq_domain_add_linear(mpic->node,
                                        isu_size ? isu_size : mpic->num_sources,
-                                       &mpic_host_ops,
-                                       flags & MPIC_LARGE_VECTORS ? 2048 : 256);
+                                       &mpic_host_ops, mpic);
 
         /*
          * FIXME: The code leaks the MPIC object and mappings here; this
@@ -1357,8 +1356,6 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         if (mpic->irqhost == NULL)
                 return NULL;
 
-        mpic->irqhost->host_data = mpic;
-
         /* Display version */
         switch (greg_feature & MPIC_GREG_FEATURE_VERSION_MASK) {
         case 1:
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c
index 0f67cd79d481..0622aa91b18a 100644
--- a/arch/powerpc/sysdev/mpic_msi.c
+++ b/arch/powerpc/sysdev/mpic_msi.c
@@ -32,7 +32,7 @@ void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
 static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
 {
         irq_hw_number_t hwirq;
-        struct irq_host_ops *ops = mpic->irqhost->ops;
+        const struct irq_domain_ops *ops = mpic->irqhost->ops;
         struct device_node *np;
         int flags, index, i;
         struct of_irq oirq;
diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c
index 14d130268e7a..8848e99a83f2 100644
--- a/arch/powerpc/sysdev/mv64x60_pic.c
+++ b/arch/powerpc/sysdev/mv64x60_pic.c
@@ -70,7 +70,7 @@ static u32 mv64x60_cached_low_mask;
 static u32 mv64x60_cached_high_mask = MV64X60_HIGH_GPP_GROUPS;
 static u32 mv64x60_cached_gpp_mask;
 
-static struct irq_host *mv64x60_irq_host;
+static struct irq_domain *mv64x60_irq_host;
 
 /*
  * mv64x60_chip_low functions
@@ -208,7 +208,7 @@ static struct irq_chip *mv64x60_chips[] = {
         [MV64x60_LEVEL1_GPP]  = &mv64x60_chip_gpp,
 };
 
-static int mv64x60_host_map(struct irq_host *h, unsigned int virq,
+static int mv64x60_host_map(struct irq_domain *h, unsigned int virq,
                           irq_hw_number_t hwirq)
 {
         int level1;
@@ -223,7 +223,7 @@ static int mv64x60_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static struct irq_host_ops mv64x60_host_ops = {
+static struct irq_domain_ops mv64x60_host_ops = {
         .map   = mv64x60_host_map,
 };
 
@@ -250,9 +250,8 @@ void __init mv64x60_init_irq(void)
         paddr = of_translate_address(np, reg);
         mv64x60_irq_reg_base = ioremap(paddr, reg[1]);
 
-        mv64x60_irq_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
-                                          MV64x60_NUM_IRQS,
-                                          &mv64x60_host_ops, MV64x60_NUM_IRQS);
+        mv64x60_irq_host = irq_domain_add_linear(np, MV64x60_NUM_IRQS,
+                                          &mv64x60_host_ops, NULL);
 
         spin_lock_irqsave(&mv64x60_lock, flags);
         out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK,
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 73034bd203c4..2fba6ef2f95e 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -245,13 +245,13 @@ static struct irq_chip qe_ic_irq_chip = {
         .irq_mask_ack = qe_ic_mask_irq,
 };
 
-static int qe_ic_host_match(struct irq_host *h, struct device_node *node)
+static int qe_ic_host_match(struct irq_domain *h, struct device_node *node)
 {
         /* Exact match, unless qe_ic node is NULL */
         return h->of_node == NULL || h->of_node == node;
 }
 
-static int qe_ic_host_map(struct irq_host *h, unsigned int virq,
+static int qe_ic_host_map(struct irq_domain *h, unsigned int virq,
                           irq_hw_number_t hw)
 {
         struct qe_ic *qe_ic = h->host_data;
@@ -272,23 +272,10 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int qe_ic_host_xlate(struct irq_host *h, struct device_node *ct,
-                            const u32 * intspec, unsigned int intsize,
-                            irq_hw_number_t * out_hwirq,
-                            unsigned int *out_flags)
-{
-        *out_hwirq = intspec[0];
-        if (intsize > 1)
-                *out_flags = intspec[1];
-        else
-                *out_flags = IRQ_TYPE_NONE;
-        return 0;
-}
-
-static struct irq_host_ops qe_ic_host_ops = {
+static struct irq_domain_ops qe_ic_host_ops = {
         .match = qe_ic_host_match,
         .map = qe_ic_host_map,
-        .xlate = qe_ic_host_xlate,
+        .xlate = irq_domain_xlate_onetwocell,
 };
 
 /* Return an interrupt vector or NO_IRQ if no interrupt is pending. */
@@ -339,8 +326,8 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,
         if (qe_ic == NULL)
                 return;
 
-        qe_ic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
-                                        NR_QE_IC_INTS, &qe_ic_host_ops, 0);
+        qe_ic->irqhost = irq_domain_add_linear(node, NR_QE_IC_INTS,
+                                               &qe_ic_host_ops, qe_ic);
         if (qe_ic->irqhost == NULL) {
                 kfree(qe_ic);
                 return;
@@ -348,7 +335,6 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,
 
         qe_ic->regs = ioremap(res.start, resource_size(&res));
 
-        qe_ic->irqhost->host_data = qe_ic;
         qe_ic->hc_irq = qe_ic_irq_chip;
 
         qe_ic->virq_high = irq_of_parse_and_map(node, 0);
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.h b/arch/powerpc/sysdev/qe_lib/qe_ic.h
index c1361d005a8a..c327872ed35c 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.h
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.h
@@ -79,7 +79,7 @@ struct qe_ic {
         volatile u32 __iomem *regs;
 
         /* The remapper for this QEIC */
-        struct irq_host *irqhost;
+        struct irq_domain *irqhost;
 
         /* The "linux" controller struct */
         struct irq_chip hc_irq;
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index 4d18658116e5..188012c58f7f 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -51,7 +51,7 @@
 u32 tsi108_pci_cfg_base;
 static u32 tsi108_pci_cfg_phys;
 u32 tsi108_csr_vir_base;
-static struct irq_host *pci_irq_host;
+static struct irq_domain *pci_irq_host;
 
 extern u32 get_vir_csrbase(void);
 extern u32 tsi108_read_reg(u32 reg_offset);
@@ -376,7 +376,7 @@ static struct irq_chip tsi108_pci_irq = {
         .irq_unmask = tsi108_pci_irq_unmask,
 };
 
-static int pci_irq_host_xlate(struct irq_host *h, struct device_node *ct,
+static int pci_irq_host_xlate(struct irq_domain *h, struct device_node *ct,
                             const u32 *intspec, unsigned int intsize,
                             irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 {
@@ -385,7 +385,7 @@ static int pci_irq_host_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-static int pci_irq_host_map(struct irq_host *h, unsigned int virq,
+static int pci_irq_host_map(struct irq_domain *h, unsigned int virq,
                           irq_hw_number_t hw)
 {       unsigned int irq;
         DBG("%s(%d, 0x%lx)\n", __func__, virq, hw);
@@ -397,7 +397,7 @@ static int pci_irq_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static struct irq_host_ops pci_irq_host_ops = {
+static struct irq_domain_ops pci_irq_domain_ops = {
         .map = pci_irq_host_map,
         .xlate = pci_irq_host_xlate,
 };
@@ -419,10 +419,9 @@ void __init tsi108_pci_int_init(struct device_node *node)
 {
         DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");
 
-        pci_irq_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY,
-                                      0, &pci_irq_host_ops, 0);
+        pci_irq_host = irq_domain_add_legacy_isa(node, &pci_irq_domain_ops, NULL);
         if (pci_irq_host == NULL) {
-                printk(KERN_ERR "pci_irq_host: failed to allocate irq host !\n");
+                printk(KERN_ERR "pci_irq_host: failed to allocate irq domain!\n");
                 return;
         }
 
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 063c901b1265..92033936a8f7 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -49,7 +49,7 @@ struct uic {
         raw_spinlock_t lock;
 
         /* The remapper for this UIC */
-        struct irq_host *irqhost;
+        struct irq_domain       *irqhost;
 };
 
 static void uic_unmask_irq(struct irq_data *d)
@@ -174,7 +174,7 @@ static struct irq_chip uic_irq_chip = {
         .irq_set_type   = uic_set_irq_type,
 };
 
-static int uic_host_map(struct irq_host *h, unsigned int virq,
+static int uic_host_map(struct irq_domain *h, unsigned int virq,
                         irq_hw_number_t hw)
 {
         struct uic *uic = h->host_data;
@@ -190,21 +190,9 @@ static int uic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int uic_host_xlate(struct irq_host *h, struct device_node *ct,
-                          const u32 *intspec, unsigned int intsize,
-                          irq_hw_number_t *out_hwirq, unsigned int *out_type)
-
-{
-        /* UIC intspecs must have 2 cells */
-        BUG_ON(intsize != 2);
-        *out_hwirq = intspec[0];
-        *out_type = intspec[1];
-        return 0;
-}
-
-static struct irq_host_ops uic_host_ops = {
+static struct irq_domain_ops uic_host_ops = {
         .map    = uic_host_map,
-        .xlate  = uic_host_xlate,
+        .xlate  = irq_domain_xlate_twocell,
 };
 
 void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
@@ -270,13 +258,11 @@ static struct uic * __init uic_init_one(struct device_node *node)
         }
         uic->dcrbase = *dcrreg;
 
-        uic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
-                                      NR_UIC_INTS, &uic_host_ops, -1);
+        uic->irqhost = irq_domain_add_linear(node, NR_UIC_INTS, &uic_host_ops,
+                                             uic);
         if (! uic->irqhost)
                 return NULL; /* FIXME: panic? */
 
-        uic->irqhost->host_data = uic;
-
         /* Start with all interrupts disabled, level and non-critical */
         mtdcr(uic->dcrbase + UIC_ER, 0);
         mtdcr(uic->dcrbase + UIC_CR, 0);
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index d72eda6a4c05..ea5e204e3450 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -40,7 +40,7 @@ unsigned int xics_interrupt_server_size		= 8;
 
 DEFINE_PER_CPU(struct xics_cppr, xics_cppr);
 
-struct irq_host *xics_host;
+struct irq_domain *xics_host;
 
 static LIST_HEAD(ics_list);
 
@@ -212,16 +212,16 @@ void xics_migrate_irqs_away(void)
                 /* We can't set affinity on ISA interrupts */
                 if (virq < NUM_ISA_INTERRUPTS)
                         continue;
-                if (!virq_is_host(virq, xics_host))
-                        continue;
-                irq = (unsigned int)virq_to_hw(virq);
-                /* We need to get IPIs still. */
-                if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
-                        continue;
                 desc = irq_to_desc(virq);
                 /* We only need to migrate enabled IRQS */
                 if (!desc || !desc->action)
                         continue;
+                if (desc->irq_data.domain != xics_host)
+                        continue;
+                irq = desc->irq_data.hwirq;
+                /* We need to get IPIs still. */
+                if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
+                        continue;
                 chip = irq_desc_get_chip(desc);
                 if (!chip || !chip->irq_set_affinity)
                         continue;
@@ -301,7 +301,7 @@ int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
 }
 #endif /* CONFIG_SMP */
 
-static int xics_host_match(struct irq_host *h, struct device_node *node)
+static int xics_host_match(struct irq_domain *h, struct device_node *node)
 {
         struct ics *ics;
 
@@ -323,7 +323,7 @@ static struct irq_chip xics_ipi_chip = {
         .irq_unmask = xics_ipi_unmask,
 };
 
-static int xics_host_map(struct irq_host *h, unsigned int virq,
+static int xics_host_map(struct irq_domain *h, unsigned int virq,
                          irq_hw_number_t hw)
 {
         struct ics *ics;
@@ -351,7 +351,7 @@ static int xics_host_map(struct irq_host *h, unsigned int virq,
         return -EINVAL;
 }
 
-static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
+static int xics_host_xlate(struct irq_domain *h, struct device_node *ct,
                            const u32 *intspec, unsigned int intsize,
                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 
@@ -366,7 +366,7 @@ static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-static struct irq_host_ops xics_host_ops = {
+static struct irq_domain_ops xics_host_ops = {
         .match = xics_host_match,
         .map = xics_host_map,
         .xlate = xics_host_xlate,
@@ -374,8 +374,7 @@ static struct irq_host_ops xics_host_ops = {
 
 static void __init xics_init_host(void)
 {
-        xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, &xics_host_ops,
-                                   XICS_IRQ_SPURIOUS);
+        xics_host = irq_domain_add_tree(NULL, &xics_host_ops, NULL);
         BUG_ON(xics_host == NULL);
         irq_set_default_host(xics_host);
 }
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c
index 6183799754af..8d73c3c0bee6 100644
--- a/arch/powerpc/sysdev/xilinx_intc.c
+++ b/arch/powerpc/sysdev/xilinx_intc.c
@@ -40,7 +40,7 @@
 #define XINTC_IVR       24      /* Interrupt Vector */
 #define XINTC_MER       28      /* Master Enable */
 
-static struct irq_host *master_irqhost;
+static struct irq_domain *master_irqhost;
 
 #define XILINX_INTC_MAXIRQS     (32)
 
@@ -141,7 +141,7 @@ static struct irq_chip xilinx_intc_edge_irqchip = {
 /**
  * xilinx_intc_xlate - translate virq# from device tree interrupts property
  */
-static int xilinx_intc_xlate(struct irq_host *h, struct device_node *ct,
+static int xilinx_intc_xlate(struct irq_domain *h, struct device_node *ct,
                                 const u32 *intspec, unsigned int intsize,
                                 irq_hw_number_t *out_hwirq,
                                 unsigned int *out_flags)
@@ -161,7 +161,7 @@ static int xilinx_intc_xlate(struct irq_host *h, struct device_node *ct,
 
         return 0;
 }
-static int xilinx_intc_map(struct irq_host *h, unsigned int virq,
+static int xilinx_intc_map(struct irq_domain *h, unsigned int virq,
                                   irq_hw_number_t irq)
 {
         irq_set_chip_data(virq, h->host_data);
@@ -177,15 +177,15 @@ static int xilinx_intc_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static struct irq_host_ops xilinx_intc_ops = {
+static struct irq_domain_ops xilinx_intc_ops = {
         .map = xilinx_intc_map,
         .xlate = xilinx_intc_xlate,
 };
 
-struct irq_host * __init
+struct irq_domain * __init
 xilinx_intc_init(struct device_node *np)
 {
-        struct irq_host * irq;
+        struct irq_domain * irq;
         void * regs;
 
         /* Find and map the intc registers */
@@ -200,12 +200,11 @@ xilinx_intc_init(struct device_node *np)
         out_be32(regs + XINTC_IAR, ~(u32) 0); /* Acknowledge pending irqs */
         out_be32(regs + XINTC_MER, 0x3UL); /* Turn on the Master Enable. */
 
-        /* Allocate and initialize an irq_host structure. */
-        irq = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, XILINX_INTC_MAXIRQS,
-                             &xilinx_intc_ops, -1);
+        /* Allocate and initialize an irq_domain structure. */
+        irq = irq_domain_add_linear(np, XILINX_INTC_MAXIRQS, &xilinx_intc_ops,
+                                    regs);
         if (!irq)
                 panic(__FILE__ ": Cannot allocate IRQ host\n");
-        irq->host_data = regs;
 
         return irq;
 }
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
index edd3d3cde460..c28765110706 100644
--- a/arch/sparc/include/asm/prom.h
+++ b/arch/sparc/include/asm/prom.h
@@ -22,6 +22,7 @@
 #include <linux/proc_fs.h>
 #include <linux/mutex.h>
 #include <linux/atomic.h>
+#include <linux/irqdomain.h>
 
 #define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 2
 #define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1
@@ -55,15 +56,6 @@ struct resource;
 extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name);
 extern void of_iounmap(struct resource *res, void __iomem *base, unsigned long size);
 
-/* These routines are here to provide compatibility with how powerpc
- * handles IRQ mapping for OF device nodes.  We precompute and permanently
- * register them in the platform_device objects, whereas powerpc computes them
- * on request.
- */
-static inline void irq_dispose_mapping(unsigned int virq)
-{
-}
-
 extern struct device_node *of_console_device;
 extern char *of_console_path;
 extern char *of_console_options;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5bed94e189fa..e0829a6a4660 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -398,6 +398,7 @@ config X86_INTEL_CE
         select X86_REBOOTFIXUPS
         select OF
         select OF_EARLY_FLATTREE
+        select IRQ_DOMAIN
         ---help---
           Select for the Intel CE media processor (CE4100) SOC.
           This option compiles in support for the CE4100 SOC for settop
@@ -2076,6 +2077,7 @@ config OLPC
         select GPIOLIB
         select OF
         select OF_PROMTREE
+        select IRQ_DOMAIN
         ---help---
           Add support for detecting the unique features of the OLPC
           XO hardware.
diff --git a/arch/x86/include/asm/irq_controller.h b/arch/x86/include/asm/irq_controller.h
deleted file mode 100644
index 423bbbddf36d..000000000000
--- a/arch/x86/include/asm/irq_controller.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef __IRQ_CONTROLLER__
-#define __IRQ_CONTROLLER__
-
-struct irq_domain {
-        int (*xlate)(struct irq_domain *h, const u32 *intspec, u32 intsize,
-                        u32 *out_hwirq, u32 *out_type);
-        void *priv;
-        struct device_node *controller;
-        struct list_head l;
-};
-
-#endif
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index 644dd885f05a..60bef663609a 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -21,7 +21,6 @@
 #include <asm/irq.h>
 #include <linux/atomic.h>
 #include <asm/setup.h>
-#include <asm/irq_controller.h>
 
 #ifdef CONFIG_OF
 extern int of_ioapic;
@@ -43,15 +42,6 @@ extern char cmd_line[COMMAND_LINE_SIZE];
 #define pci_address_to_pio pci_address_to_pio
 unsigned long pci_address_to_pio(phys_addr_t addr);
 
-/**
- * irq_dispose_mapping - Unmap an interrupt
- * @virq: linux virq number of the interrupt to unmap
- *
- * FIXME: We really should implement proper virq handling like power,
- * but that's going to be major surgery.
- */
-static inline void irq_dispose_mapping(unsigned int virq) { }
-
 #define HAVE_ARCH_DEVTREE_FIXUPS
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
index 52821799a702..3ae2ced4a874 100644
--- a/arch/x86/kernel/devicetree.c
+++ b/arch/x86/kernel/devicetree.c
@@ -4,6 +4,7 @@
 #include <linux/bootmem.h>
 #include <linux/export.h>
 #include <linux/io.h>
+#include <linux/irqdomain.h>
 #include <linux/interrupt.h>
 #include <linux/list.h>
 #include <linux/of.h>
@@ -17,64 +18,14 @@
 #include <linux/initrd.h>
 
 #include <asm/hpet.h>
-#include <asm/irq_controller.h>
 #include <asm/apic.h>
 #include <asm/pci_x86.h>
 
 __initdata u64 initial_dtb;
 char __initdata cmd_line[COMMAND_LINE_SIZE];
-static LIST_HEAD(irq_domains);
-static DEFINE_RAW_SPINLOCK(big_irq_lock);
 
 int __initdata of_ioapic;
 
-#ifdef CONFIG_X86_IO_APIC
-static void add_interrupt_host(struct irq_domain *ih)
-{
-        unsigned long flags;
-
-        raw_spin_lock_irqsave(&big_irq_lock, flags);
-        list_add(&ih->l, &irq_domains);
-        raw_spin_unlock_irqrestore(&big_irq_lock, flags);
-}
-#endif
-
-static struct irq_domain *get_ih_from_node(struct device_node *controller)
-{
-        struct irq_domain *ih, *found = NULL;
-        unsigned long flags;
-
-        raw_spin_lock_irqsave(&big_irq_lock, flags);
-        list_for_each_entry(ih, &irq_domains, l) {
-                if (ih->controller ==  controller) {
-                        found = ih;
-                        break;
-                }
-        }
-        raw_spin_unlock_irqrestore(&big_irq_lock, flags);
-        return found;
-}
-
-unsigned int irq_create_of_mapping(struct device_node *controller,
-                                   const u32 *intspec, unsigned int intsize)
-{
-        struct irq_domain *ih;
-        u32 virq, type;
-        int ret;
-
-        ih = get_ih_from_node(controller);
-        if (!ih)
-                return 0;
-        ret = ih->xlate(ih, intspec, intsize, &virq, &type);
-        if (ret)
-                return 0;
-        if (type == IRQ_TYPE_NONE)
-                return virq;
-        irq_set_irq_type(virq, type);
-        return virq;
-}
-EXPORT_SYMBOL_GPL(irq_create_of_mapping);
-
 unsigned long pci_address_to_pio(phys_addr_t address)
 {
         /*
@@ -354,36 +305,43 @@ static struct of_ioapic_type of_ioapic_type[] =
         },
 };
 
-static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
-                        u32 *out_hwirq, u32 *out_type)
+static int ioapic_xlate(struct irq_domain *domain,
+                        struct device_node *controller,
+                        const u32 *intspec, u32 intsize,
+                        irq_hw_number_t *out_hwirq, u32 *out_type)
 {
-        struct mp_ioapic_gsi *gsi_cfg;
         struct io_apic_irq_attr attr;
         struct of_ioapic_type *it;
-        u32 line, idx, type;
+        u32 line, idx;
+        int rc;
 
-        if (intsize < 2)
+        if (WARN_ON(intsize < 2))
                 return -EINVAL;
 
-        line = *intspec;
-        idx = (u32) id->priv;
-        gsi_cfg = mp_ioapic_gsi_routing(idx);
-        *out_hwirq = line + gsi_cfg->gsi_base;
-
-        intspec++;
-        type = *intspec;
+        line = intspec[0];
 
-        if (type >= ARRAY_SIZE(of_ioapic_type))
+        if (intspec[1] >= ARRAY_SIZE(of_ioapic_type))
                 return -EINVAL;
 
-        it = of_ioapic_type + type;
-        *out_type = it->out_type;
+        it = &of_ioapic_type[intspec[1]];
 
+        idx = (u32) domain->host_data;
         set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
 
-        return io_apic_setup_irq_pin_once(*out_hwirq, cpu_to_node(0), &attr);
+        rc = io_apic_setup_irq_pin_once(irq_find_mapping(domain, line),
+                                        cpu_to_node(0), &attr);
+        if (rc)
+                return rc;
+
+        *out_hwirq = line;
+        *out_type = it->out_type;
+        return 0;
 }
 
+const struct irq_domain_ops ioapic_irq_domain_ops = {
+        .xlate = ioapic_xlate,
+};
+
 static void __init ioapic_add_ofnode(struct device_node *np)
 {
         struct resource r;
@@ -399,13 +357,14 @@ static void __init ioapic_add_ofnode(struct device_node *np)
         for (i = 0; i < nr_ioapics; i++) {
                 if (r.start == mpc_ioapic_addr(i)) {
                         struct irq_domain *id;
+                        struct mp_ioapic_gsi *gsi_cfg;
+
+                        gsi_cfg = mp_ioapic_gsi_routing(i);
 
-                        id = kzalloc(sizeof(*id), GFP_KERNEL);
+                        id = irq_domain_add_legacy(np, 32, gsi_cfg->gsi_base, 0,
+                                                   &ioapic_irq_domain_ops,
+                                                   (void*)i);
                         BUG_ON(!id);
-                        id->controller = np;
-                        id->xlate = ioapic_xlate;
-                        id->priv = (void *)i;
-                        add_interrupt_host(id);
                         return;
                 }
         }
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 5cd04b65c556..e6568c19c939 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -37,7 +37,7 @@ struct mpc8xxx_gpio_chip {
          * open drain mode safely
          */
         u32 data;
-        struct irq_host *irq;
+        struct irq_domain *irq;
         void *of_dev_id_data;
 };
 
@@ -281,7 +281,7 @@ static struct irq_chip mpc8xxx_irq_chip = {
         .irq_set_type   = mpc8xxx_irq_set_type,
 };
 
-static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq,
+static int mpc8xxx_gpio_irq_map(struct irq_domain *h, unsigned int virq,
                                 irq_hw_number_t hw)
 {
         struct mpc8xxx_gpio_chip *mpc8xxx_gc = h->host_data;
@@ -296,24 +296,9 @@ static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int mpc8xxx_gpio_irq_xlate(struct irq_host *h, struct device_node *ct,
-                                  const u32 *intspec, unsigned int intsize,
-                                  irq_hw_number_t *out_hwirq,
-                                  unsigned int *out_flags)
-
-{
-        /* interrupt sense values coming from the device tree equal either
-         * EDGE_FALLING or EDGE_BOTH
-         */
-        *out_hwirq = intspec[0];
-        *out_flags = intspec[1];
-
-        return 0;
-}
-
-static struct irq_host_ops mpc8xxx_gpio_irq_ops = {
+static struct irq_domain_ops mpc8xxx_gpio_irq_ops = {
         .map    = mpc8xxx_gpio_irq_map,
-        .xlate  = mpc8xxx_gpio_irq_xlate,
+        .xlate  = irq_domain_xlate_twocell,
 };
 
 static struct of_device_id mpc8xxx_gpio_ids[] __initdata = {
@@ -364,9 +349,8 @@ static void __init mpc8xxx_add_controller(struct device_node *np)
         if (hwirq == NO_IRQ)
                 goto skip_irq;
 
-        mpc8xxx_gc->irq =
-                irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, MPC8XXX_GPIO_PINS,
-                               &mpc8xxx_gpio_irq_ops, MPC8XXX_GPIO_PINS);
+        mpc8xxx_gc->irq = irq_domain_add_linear(np, MPC8XXX_GPIO_PINS,
+                                        &mpc8xxx_gpio_irq_ops, mpc8xxx_gc);
         if (!mpc8xxx_gc->irq)
                 goto skip_irq;
 
@@ -374,8 +358,6 @@ static void __init mpc8xxx_add_controller(struct device_node *np)
         if (id)
                 mpc8xxx_gc->of_dev_id_data = id->data;
 
-        mpc8xxx_gc->irq->host_data = mpc8xxx_gc;
-
         /* ack and mask all irqs */
         out_be32(mm_gc->regs + GPIO_IER, 0xffffffff);
         out_be32(mm_gc->regs + GPIO_IMR, 0);
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index bdc293791590..6f17671260e1 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -25,6 +25,7 @@
 #include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/module.h>
+#include <linux/irqdomain.h>
 
 #include <asm/mach/irq.h>
 
@@ -74,9 +75,10 @@ struct tegra_gpio_bank {
 #endif
 };
 
-
+static struct irq_domain *irq_domain;
 static void __iomem *regs;
-static struct tegra_gpio_bank tegra_gpio_banks[7];
+static u32 tegra_gpio_bank_count;
+static struct tegra_gpio_bank *tegra_gpio_banks;
 
 static inline void tegra_gpio_writel(u32 val, u32 reg)
 {
@@ -139,7 +141,7 @@ static int tegra_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
 
 static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
 {
-        return TEGRA_GPIO_TO_IRQ(offset);
+        return irq_find_mapping(irq_domain, offset);
 }
 
 static struct gpio_chip tegra_gpio_chip = {
@@ -155,28 +157,28 @@ static struct gpio_chip tegra_gpio_chip = {
 
 static void tegra_gpio_irq_ack(struct irq_data *d)
 {
-        int gpio = d->irq - INT_GPIO_BASE;
+        int gpio = d->hwirq;
 
         tegra_gpio_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio));
 }
 
 static void tegra_gpio_irq_mask(struct irq_data *d)
 {
-        int gpio = d->irq - INT_GPIO_BASE;
+        int gpio = d->hwirq;
 
         tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 0);
 }
 
 static void tegra_gpio_irq_unmask(struct irq_data *d)
 {
-        int gpio = d->irq - INT_GPIO_BASE;
+        int gpio = d->hwirq;
 
         tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 1);
 }
 
 static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 {
-        int gpio = d->irq - INT_GPIO_BASE;
+        int gpio = d->hwirq;
         struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
         int port = GPIO_PORT(gpio);
         int lvl_type;
@@ -273,7 +275,7 @@ void tegra_gpio_resume(void)
 
         local_irq_save(flags);
 
-        for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) {
+        for (b = 0; b < tegra_gpio_bank_count; b++) {
                 struct tegra_gpio_bank *bank = &tegra_gpio_banks[b];
 
                 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) {
@@ -296,7 +298,7 @@ void tegra_gpio_suspend(void)
         int p;
 
         local_irq_save(flags);
-        for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) {
+        for (b = 0; b < tegra_gpio_bank_count; b++) {
                 struct tegra_gpio_bank *bank = &tegra_gpio_banks[b];
 
                 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) {
@@ -337,13 +339,44 @@ static struct lock_class_key gpio_lock_class;
 
 static int __devinit tegra_gpio_probe(struct platform_device *pdev)
 {
+        int irq_base;
         struct resource *res;
         struct tegra_gpio_bank *bank;
         int gpio;
         int i;
         int j;
 
-        for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) {
+        for (;;) {
+                res = platform_get_resource(pdev, IORESOURCE_IRQ, tegra_gpio_bank_count);
+                if (!res)
+                        break;
+                tegra_gpio_bank_count++;
+        }
+        if (!tegra_gpio_bank_count) {
+                dev_err(&pdev->dev, "Missing IRQ resource\n");
+                return -ENODEV;
+        }
+
+        tegra_gpio_chip.ngpio = tegra_gpio_bank_count * 32;
+
+        tegra_gpio_banks = devm_kzalloc(&pdev->dev,
+                        tegra_gpio_bank_count * sizeof(*tegra_gpio_banks),
+                        GFP_KERNEL);
+        if (!tegra_gpio_banks) {
+                dev_err(&pdev->dev, "Couldn't allocate bank structure\n");
+                return -ENODEV;
+        }
+
+        irq_base = irq_alloc_descs(-1, 0, tegra_gpio_chip.ngpio, 0);
+        if (irq_base < 0) {
+                dev_err(&pdev->dev, "Couldn't allocate IRQ numbers\n");
+                return -ENODEV;
+        }
+        irq_domain = irq_domain_add_legacy(pdev->dev.of_node,
+                                           tegra_gpio_chip.ngpio, irq_base, 0,
+                                           &irq_domain_simple_ops, NULL);
+
+        for (i = 0; i < tegra_gpio_bank_count; i++) {
                 res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
                 if (!res) {
                         dev_err(&pdev->dev, "Missing IRQ resource\n");
@@ -380,8 +413,8 @@ static int __devinit tegra_gpio_probe(struct platform_device *pdev)
 
         gpiochip_add(&tegra_gpio_chip);
 
-        for (gpio = 0; gpio < TEGRA_NR_GPIOS; gpio++) {
-                int irq = TEGRA_GPIO_TO_IRQ(gpio);
+        for (gpio = 0; gpio < tegra_gpio_chip.ngpio; gpio++) {
+                int irq = irq_find_mapping(irq_domain, gpio);
                 /* No validity check; all Tegra GPIOs are valid IRQs */
 
                 bank = &tegra_gpio_banks[GPIO_BANK(gpio)];
@@ -393,7 +426,7 @@ static int __devinit tegra_gpio_probe(struct platform_device *pdev)
                 set_irq_flags(irq, IRQF_VALID);
         }
 
-        for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) {
+        for (i = 0; i < tegra_gpio_bank_count; i++) {
                 bank = &tegra_gpio_banks[i];
 
                 irq_set_chained_handler(bank->irq, tegra_gpio_irq_handler);
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 58832e578fff..8d1ab6fa88e1 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -196,7 +196,7 @@ static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
 
         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 
-        clk_enable(i2c_imx->clk);
+        clk_prepare_enable(i2c_imx->clk);
         writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR);
         /* Enable I2C controller */
         writeb(0, i2c_imx->base + IMX_I2C_I2SR);
@@ -245,7 +245,7 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
 
         /* Disable I2C controller */
         writeb(0, i2c_imx->base + IMX_I2C_I2CR);
-        clk_disable(i2c_imx->clk);
+        clk_disable_unprepare(i2c_imx->clk);
 }
 
 static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index f147395bac9a..1489c3540f96 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -201,6 +201,7 @@ config MENELAUS
 config TWL4030_CORE
         bool "Texas Instruments TWL4030/TWL5030/TWL6030/TPS659x0 Support"
         depends on I2C=y && GENERIC_HARDIRQS
+        select IRQ_DOMAIN
         help
           Say yes here if you have TWL4030 / TWL6030 family chip on your board.
           This core driver provides register access and IRQ handling
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index 8ce3959c6919..4970d43952db 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -149,7 +149,7 @@
 
 #define TWL_MODULE_LAST TWL4030_MODULE_LAST
 
-#define TWL4030_NR_IRQS    8
+#define TWL4030_NR_IRQS    34 /* core:8, power:8, gpio: 18 */
 #define TWL6030_NR_IRQS    20
 
 /* Base Address defns for twl4030_map[] */
@@ -263,10 +263,6 @@ struct twl_client {
 
 static struct twl_client twl_modules[TWL_NUM_SLAVES];
 
-#ifdef CONFIG_IRQ_DOMAIN
-static struct irq_domain domain;
-#endif
-
 /* mapping the module id to slave id and base address */
 struct twl_mapping {
         unsigned char sid;      /* Slave ID */
@@ -1227,14 +1223,8 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
 
         pdata->irq_base = status;
         pdata->irq_end = pdata->irq_base + nr_irqs;
-
-#ifdef CONFIG_IRQ_DOMAIN
-        domain.irq_base = pdata->irq_base;
-        domain.nr_irq = nr_irqs;
-        domain.of_node = of_node_get(node);
-        domain.ops = &irq_domain_simple_ops;
-        irq_domain_add(&domain);
-#endif
+        irq_domain_add_legacy(node, nr_irqs, pdata->irq_base, 0,
+                              &irq_domain_simple_ops, NULL);
 
         if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
                 dev_dbg(&client->dev, "can't talk I2C?\n");
@@ -1315,11 +1305,10 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
                 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
         }
 
-#ifdef CONFIG_OF_DEVICE
+        status = -ENODEV;
         if (node)
                 status = of_platform_populate(node, NULL, NULL, &client->dev);
-        else
-#endif
+        if (status)
                 status = add_children(pdata, id->driver_data);
 
 fail:
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
index 947faa5d2ce4..efdb81d21c44 100644
--- a/drivers/mmc/host/at91_mci.c
+++ b/drivers/mmc/host/at91_mci.c
@@ -86,7 +86,6 @@ static inline int at91mci_is_mci1rev2xx(void)
 {
         return (   cpu_is_at91sam9260()
                 || cpu_is_at91sam9263()
-                || cpu_is_at91cap9()
                 || cpu_is_at91sam9rl()
                 || cpu_is_at91sam9g10()
                 || cpu_is_at91sam9g20()
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index d601e41af282..f4e82d45cafa 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -463,7 +463,7 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
                 err = PTR_ERR(clk);
                 goto err_clk_get;
         }
-        clk_enable(clk);
+        clk_prepare_enable(clk);
         pltfm_host->clk = clk;
 
         if (!is_imx25_esdhc(imx_data))
@@ -558,7 +558,7 @@ no_card_detect_irq:
                 gpio_free(boarddata->wp_gpio);
 no_card_detect_pin:
 no_board_data:
-        clk_disable(pltfm_host->clk);
+        clk_disable_unprepare(pltfm_host->clk);
         clk_put(pltfm_host->clk);
 err_clk_get:
         kfree(imx_data);
@@ -585,7 +585,7 @@ static int __devexit sdhci_esdhc_imx_remove(struct platform_device *pdev)
                 gpio_free(boarddata->cd_gpio);
         }
 
-        clk_disable(pltfm_host->clk);
+        clk_disable_unprepare(pltfm_host->clk);
         clk_put(pltfm_host->clk);
         kfree(imx_data);
 
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 1af756ee0f9a..b19e7d435f8d 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -518,9 +518,6 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
         if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
                 host->mmc->caps = MMC_CAP_NONREMOVABLE;
 
-        if (pdata->host_caps)
-                host->mmc->caps |= pdata->host_caps;
-
         if (pdata->pm_caps)
                 host->mmc->pm_caps |= pdata->pm_caps;
 
@@ -544,6 +541,9 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
         if (pdata->host_caps)
                 host->mmc->caps |= pdata->host_caps;
 
+        if (pdata->host_caps2)
+                host->mmc->caps2 |= pdata->host_caps2;
+
         ret = sdhci_add_host(host);
         if (ret) {
                 dev_err(dev, "sdhci_add_host() failed\n");
diff --git a/drivers/net/Space.c b/drivers/net/Space.c
index 068c3563e00f..88bbd8ffa7fe 100644
--- a/drivers/net/Space.c
+++ b/drivers/net/Space.c
@@ -190,8 +190,10 @@ static struct devprobe2 isa_probes[] __initdata = {
         {seeq8005_probe, 0},
 #endif
 #ifdef CONFIG_CS89x0
+#ifndef CONFIG_CS89x0_PLATFORM
         {cs89x0_probe, 0},
 #endif
+#endif
 #ifdef CONFIG_AT1700
         {at1700_probe, 0},
 #endif
diff --git a/drivers/net/ethernet/cirrus/Kconfig b/drivers/net/ethernet/cirrus/Kconfig
index 1f8648f099c7..8388e36cf08f 100644
--- a/drivers/net/ethernet/cirrus/Kconfig
+++ b/drivers/net/ethernet/cirrus/Kconfig
@@ -5,8 +5,7 @@
 config NET_VENDOR_CIRRUS
         bool "Cirrus devices"
         default y
-        depends on ISA || EISA || MACH_IXDP2351 || ARCH_IXDP2X01 \
-                || MACH_MX31ADS || MACH_QQ2440 || (ARM && ARCH_EP93XX) || MAC
+        depends on ISA || EISA || ARM || MAC
         ---help---
           If you have a network (Ethernet) card belonging to this class, say Y
           and read the Ethernet-HOWTO, available from
@@ -21,8 +20,7 @@ if NET_VENDOR_CIRRUS
 
 config CS89x0
         tristate "CS89x0 support"
-        depends on (ISA || EISA || MACH_IXDP2351 \
-                || ARCH_IXDP2X01 || MACH_MX31ADS || MACH_QQ2440)
+        depends on ISA || EISA || ARM
         ---help---
           Support for CS89x0 chipset based Ethernet cards. If you have a
           network (Ethernet) card of this type, say Y and read the
@@ -33,10 +31,15 @@ config CS89x0
           To compile this driver as a module, choose M here. The module
           will be called cs89x0.
 
-config CS89x0_NONISA_IRQ
-        def_bool y
-        depends on CS89x0 != n
-        depends on MACH_IXDP2351 || ARCH_IXDP2X01 || MACH_MX31ADS || MACH_QQ2440
+config CS89x0_PLATFORM
+        bool "CS89x0 platform driver support"
+        depends on CS89x0
+        help
+          Say Y to compile the cs89x0 driver as a platform driver. This
+          makes this driver suitable for use on certain evaluation boards
+          such as the iMX21ADS.
+
+          If you are unsure, say N.
 
 config EP93XX_ETH
         tristate "EP93xx Ethernet support"
diff --git a/drivers/net/ethernet/cirrus/cs89x0.c b/drivers/net/ethernet/cirrus/cs89x0.c
index f328da24c8fa..7202ca951bf3 100644
--- a/drivers/net/ethernet/cirrus/cs89x0.c
+++ b/drivers/net/ethernet/cirrus/cs89x0.c
@@ -100,9 +100,6 @@
 
 */
 
-/* Always include 'config.h' first in case the user wants to turn on
-   or override something. */
-#include <linux/module.h>
 
 /*
  * Set this to zero to disable DMA code
@@ -131,9 +128,12 @@
 
 */
 
+#include <linux/module.h>
+#include <linux/printk.h>
 #include <linux/errno.h>
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
+#include <linux/platform_device.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/fcntl.h>
@@ -151,6 +151,7 @@
 #include <asm/system.h>
 #include <asm/io.h>
 #include <asm/irq.h>
+#include <linux/atomic.h>
 #if ALLOW_DMA
 #include <asm/dma.h>
 #endif
@@ -174,26 +175,20 @@ static char version[] __initdata =
    them to system IRQ numbers. This mapping is card specific and is set to
    the configuration of the Cirrus Eval board for this chip. */
 #if defined(CONFIG_MACH_IXDP2351)
+#define CS89x0_NONISA_IRQ
 static unsigned int netcard_portlist[] __used __initdata = {IXDP2351_VIRT_CS8900_BASE, 0};
 static unsigned int cs8900_irq_map[] = {IRQ_IXDP2351_CS8900, 0, 0, 0};
 #elif defined(CONFIG_ARCH_IXDP2X01)
+#define CS89x0_NONISA_IRQ
 static unsigned int netcard_portlist[] __used __initdata = {IXDP2X01_CS8900_VIRT_BASE, 0};
 static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0};
-#elif defined(CONFIG_MACH_QQ2440)
-#include <mach/qq2440.h>
-static unsigned int netcard_portlist[] __used __initdata = { QQ2440_CS8900_VIRT_BASE + 0x300, 0 };
-static unsigned int cs8900_irq_map[] = { QQ2440_CS8900_IRQ, 0, 0, 0 };
-#elif defined(CONFIG_MACH_MX31ADS)
-#include <mach/board-mx31ads.h>
-static unsigned int netcard_portlist[] __used __initdata = {
-        PBC_BASE_ADDRESS + PBC_CS8900A_IOBASE + 0x300, 0
-};
-static unsigned cs8900_irq_map[] = {EXPIO_INT_ENET_INT, 0, 0, 0};
 #else
+#ifndef CONFIG_CS89x0_PLATFORM
 static unsigned int netcard_portlist[] __used __initdata =
    { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};
 static unsigned int cs8900_irq_map[] = {10,11,12,5};
 #endif
+#endif
 
 #if DEBUGGING
 static unsigned int net_debug = DEBUGGING;
@@ -236,11 +231,16 @@ struct net_local {
         unsigned char *end_dma_buff;    /* points to the end of the buffer */
         unsigned char *rx_dma_ptr;      /* points to the next packet  */
 #endif
+#ifdef CONFIG_CS89x0_PLATFORM
+        void __iomem *virt_addr;/* Virtual address for accessing the CS89x0. */
+        unsigned long phys_addr;/* Physical address for accessing the CS89x0. */
+        unsigned long size;     /* Length of CS89x0 memory region. */
+#endif
 };
 
 /* Index to functions, as function prototypes. */
 
-static int cs89x0_probe1(struct net_device *dev, int ioaddr, int modular);
+static int cs89x0_probe1(struct net_device *dev, unsigned long ioaddr, int modular);
 static int net_open(struct net_device *dev);
 static netdev_tx_t net_send_packet(struct sk_buff *skb, struct net_device *dev);
 static irqreturn_t net_interrupt(int irq, void *dev_id);
@@ -294,6 +294,7 @@ static int __init media_fn(char *str)
 __setup("cs89x0_media=", media_fn);
 
 
+#ifndef CONFIG_CS89x0_PLATFORM
 /* Check for a network adaptor of this type, and return '0' iff one exists.
    If dev->base_addr == 0, probe all likely locations.
    If dev->base_addr == 1, always return failure.
@@ -343,6 +344,7 @@ out:
         return ERR_PTR(err);
 }
 #endif
+#endif
 
 #if defined(CONFIG_MACH_IXDP2351)
 static u16
@@ -504,7 +506,7 @@ static const struct net_device_ops net_ops = {
  */
 
 static int __init
-cs89x0_probe1(struct net_device *dev, int ioaddr, int modular)
+cs89x0_probe1(struct net_device *dev, unsigned long ioaddr, int modular)
 {
         struct net_local *lp = netdev_priv(dev);
         static unsigned version_printed;
@@ -529,15 +531,12 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular)
                 lp->force = g_cs89x0_media__force;
 #endif
 
-#if defined(CONFIG_MACH_QQ2440)
-                lp->force |= FORCE_RJ45 | FORCE_FULL;
-#endif
         }
 
         /* Grab the region so we can find another board if autoIRQ fails. */
         /* WTF is going on here? */
         if (!request_region(ioaddr & ~3, NETCARD_IO_EXTENT, DRV_NAME)) {
-                printk(KERN_ERR "%s: request_region(0x%x, 0x%x) failed\n",
+                printk(KERN_ERR "%s: request_region(0x%lx, 0x%x) failed\n",
                                 DRV_NAME, ioaddr, NETCARD_IO_EXTENT);
                 retval = -EBUSY;
                 goto out1;
@@ -549,7 +548,7 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular)
            will skip the test for the ADD_PORT. */
         if (ioaddr & 1) {
                 if (net_debug > 1)
-                        printk(KERN_INFO "%s: odd ioaddr 0x%x\n", dev->name, ioaddr);
+                        printk(KERN_INFO "%s: odd ioaddr 0x%lx\n", dev->name, ioaddr);
                 if ((ioaddr & 2) != 2)
                         if ((readword(ioaddr & ~3, ADD_PORT) & ADD_MASK) != ADD_SIG) {
                                 printk(KERN_ERR "%s: bad signature 0x%x\n",
@@ -560,13 +559,13 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular)
         }
 
         ioaddr &= ~3;
-        printk(KERN_DEBUG "PP_addr at %x[%x]: 0x%x\n",
+        printk(KERN_DEBUG "PP_addr at %lx[%x]: 0x%x\n",
                         ioaddr, ADD_PORT, readword(ioaddr, ADD_PORT));
         writeword(ioaddr, ADD_PORT, PP_ChipID);
 
         tmp = readword(ioaddr, DATA_PORT);
         if (tmp != CHIP_EISA_ID_SIG) {
-                printk(KERN_DEBUG "%s: incorrect signature at %x[%x]: 0x%x!="
+                printk(KERN_DEBUG "%s: incorrect signature at %lx[%x]: 0x%x!="
                         CHIP_EISA_ID_SIG_STR "\n",
                         dev->name, ioaddr, DATA_PORT, tmp);
                 retval = -ENODEV;
@@ -736,8 +735,9 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular)
                         dev->irq = i;
         } else {
                 i = lp->isa_config & INT_NO_MASK;
+#ifndef CONFIG_CS89x0_PLATFORM
                 if (lp->chip_type == CS8900) {
-#ifdef CONFIG_CS89x0_NONISA_IRQ
+#ifdef CS89x0_NONISA_IRQ
                         i = cs8900_irq_map[0];
 #else
                         /* Translate the IRQ using the IRQ mapping table. */
@@ -758,6 +758,7 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular)
                         }
 #endif
                 }
+#endif
                 if (!dev->irq)
                         dev->irq = i;
         }
@@ -1168,6 +1169,7 @@ write_irq(struct net_device *dev, int chip_type, int irq)
         int i;
 
         if (chip_type == CS8900) {
+#ifndef CONFIG_CS89x0_PLATFORM
                 /* Search the mapping table for the corresponding IRQ pin. */
                 for (i = 0; i != ARRAY_SIZE(cs8900_irq_map); i++)
                         if (cs8900_irq_map[i] == irq)
@@ -1175,6 +1177,10 @@ write_irq(struct net_device *dev, int chip_type, int irq)
                 /* Not found */
                 if (i == ARRAY_SIZE(cs8900_irq_map))
                         i = 3;
+#else
+                /* INTRQ0 pin is used for interrupt generation. */
+                i = 0;
+#endif
                 writereg(dev, PP_CS8900_ISAINT, i);
         } else {
                 writereg(dev, PP_CS8920_ISAINT, irq);
@@ -1228,7 +1234,7 @@ net_open(struct net_device *dev)
         }
         else
         {
-#ifndef CONFIG_CS89x0_NONISA_IRQ
+#if !defined(CS89x0_NONISA_IRQ) && !defined(CONFIG_CS89x0_PLATFORM)
                 if (((1 << dev->irq) & lp->irq_map) == 0) {
                         printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n",
                                dev->name, dev->irq, lp->irq_map);
@@ -1746,7 +1752,7 @@ static int set_mac_address(struct net_device *dev, void *p)
         return 0;
 }
 
-#ifdef MODULE
+#if defined(MODULE) && !defined(CONFIG_CS89x0_PLATFORM)
 
 static struct net_device *dev_cs89x0;
 
@@ -1900,7 +1906,97 @@ cleanup_module(void)
         release_region(dev_cs89x0->base_addr, NETCARD_IO_EXTENT);
         free_netdev(dev_cs89x0);
 }
-#endif /* MODULE */
+#endif /* MODULE && !CONFIG_CS89x0_PLATFORM */
+
+#ifdef CONFIG_CS89x0_PLATFORM
+static int __init cs89x0_platform_probe(struct platform_device *pdev)
+{
+        struct net_device *dev = alloc_etherdev(sizeof(struct net_local));
+        struct net_local *lp;
+        struct resource *mem_res;
+        int err;
+
+        if (!dev)
+                return -ENOMEM;
+
+        lp = netdev_priv(dev);
+
+        mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        dev->irq = platform_get_irq(pdev, 0);
+        if (mem_res == NULL || dev->irq <= 0) {
+                dev_warn(&dev->dev, "memory/interrupt resource missing.\n");
+                err = -ENXIO;
+                goto free;
+        }
+
+        lp->phys_addr = mem_res->start;
+        lp->size = resource_size(mem_res);
+        if (!request_mem_region(lp->phys_addr, lp->size, DRV_NAME)) {
+                dev_warn(&dev->dev, "request_mem_region() failed.\n");
+                err = -EBUSY;
+                goto free;
+        }
+
+        lp->virt_addr = ioremap(lp->phys_addr, lp->size);
+        if (!lp->virt_addr) {
+                dev_warn(&dev->dev, "ioremap() failed.\n");
+                err = -ENOMEM;
+                goto release;
+        }
+
+        err = cs89x0_probe1(dev, (unsigned long)lp->virt_addr, 0);
+        if (err) {
+                dev_warn(&dev->dev, "no cs8900 or cs8920 detected.\n");
+                goto unmap;
+        }
+
+        platform_set_drvdata(pdev, dev);
+        return 0;
+
+unmap:
+        iounmap(lp->virt_addr);
+release:
+        release_mem_region(lp->phys_addr, lp->size);
+free:
+        free_netdev(dev);
+        return err;
+}
+
+static int cs89x0_platform_remove(struct platform_device *pdev)
+{
+        struct net_device *dev = platform_get_drvdata(pdev);
+        struct net_local *lp = netdev_priv(dev);
+
+        unregister_netdev(dev);
+        iounmap(lp->virt_addr);
+        release_mem_region(lp->phys_addr, lp->size);
+        free_netdev(dev);
+        return 0;
+}
+
+static struct platform_driver cs89x0_driver = {
+        .driver = {
+                .name   = DRV_NAME,
+                .owner  = THIS_MODULE,
+        },
+        .remove = cs89x0_platform_remove,
+};
+
+static int __init cs89x0_init(void)
+{
+        return platform_driver_probe(&cs89x0_driver, cs89x0_platform_probe);
+}
+
+module_init(cs89x0_init);
+
+static void __exit cs89x0_cleanup(void)
+{
+        platform_driver_unregister(&cs89x0_driver);
+}
+
+module_exit(cs89x0_cleanup);
+
+#endif /* CONFIG_CS89x0_PLATFORM */
 
 /*
  * Local variables:
diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c
index 50e8e5e74465..7189adf54bd1 100644
--- a/drivers/net/phy/mdio-gpio.c
+++ b/drivers/net/phy/mdio-gpio.c
@@ -255,13 +255,13 @@ static inline int __init mdio_ofgpio_init(void)
         return platform_driver_register(&mdio_ofgpio_driver);
 }
 
-static inline void __exit mdio_ofgpio_exit(void)
+static inline void mdio_ofgpio_exit(void)
 {
         platform_driver_unregister(&mdio_ofgpio_driver);
 }
 #else
 static inline int __init mdio_ofgpio_init(void) { return 0; }
-static inline void __exit mdio_ofgpio_exit(void) { }
+static inline void mdio_ofgpio_exit(void) { }
 #endif /* CONFIG_OF_GPIO */
 
 static struct platform_driver mdio_gpio_driver = {
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index cae9477a6ed3..343ad29e211c 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -55,7 +55,7 @@ EXPORT_SYMBOL(of_find_device_by_node);
 #include <asm/dcr.h>
 #endif
 
-#if !defined(CONFIG_SPARC)
+#ifdef CONFIG_OF_ADDRESS
 /*
  * The following routines scan a subtree and registers a device for
  * each applicable node.
@@ -462,4 +462,4 @@ int of_platform_populate(struct device_node *root,
         of_node_put(root);
         return rc;
 }
-#endif /* !CONFIG_SPARC */
+#endif /* CONFIG_OF_ADDRESS */
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 7a61b17ddd04..740f468ba65f 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -74,14 +74,6 @@ config REGULATOR_GPIO
           and the platform has to provide a mapping of GPIO-states
           to target volts/amps.
 
-config REGULATOR_BQ24022
-        tristate "TI bq24022 Dual Input 1-Cell Li-Ion Charger IC"
-        help
-          This driver controls a TI bq24022 Charger attached via
-          GPIOs. The provided current regulator can enable/disable
-          charging select between 100 mA and 500 mA charging current
-          limit.
-
 config REGULATOR_MAX1586
         tristate "Maxim 1586/1587 voltage regulator"
         depends on I2C
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 503bac87715e..f53cf8082c62 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o
 
 obj-$(CONFIG_REGULATOR_GPIO) += gpio-regulator.o
 obj-$(CONFIG_REGULATOR_AD5398) += ad5398.o
-obj-$(CONFIG_REGULATOR_BQ24022) += bq24022.o
 obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o
 obj-$(CONFIG_REGULATOR_LP3972) += lp3972.o
 obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o
diff --git a/drivers/regulator/bq24022.c b/drivers/regulator/bq24022.c
deleted file mode 100644
index 9fab6d1bbe80..000000000000
--- a/drivers/regulator/bq24022.c
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * Support for TI bq24022 (bqTINY-II) Dual Input (USB/AC Adpater)
- * 1-Cell Li-Ion Charger connected via GPIOs.
- *
- * Copyright (c) 2008 Philipp Zabel
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/err.h>
-#include <linux/module.h>
-#include <linux/gpio.h>
-#include <linux/regulator/bq24022.h>
-#include <linux/regulator/driver.h>
-
-
-static int bq24022_set_current_limit(struct regulator_dev *rdev,
-                                        int min_uA, int max_uA)
-{
-        struct bq24022_mach_info *pdata = rdev_get_drvdata(rdev);
-
-        dev_dbg(rdev_get_dev(rdev), "setting current limit to %s mA\n",
-                max_uA >= 500000 ? "500" : "100");
-
-        /* REVISIT: maybe return error if min_uA != 0 ? */
-        gpio_set_value(pdata->gpio_iset2, max_uA >= 500000);
-        return 0;
-}
-
-static int bq24022_get_current_limit(struct regulator_dev *rdev)
-{
-        struct bq24022_mach_info *pdata = rdev_get_drvdata(rdev);
-
-        return gpio_get_value(pdata->gpio_iset2) ? 500000 : 100000;
-}
-
-static int bq24022_enable(struct regulator_dev *rdev)
-{
-        struct bq24022_mach_info *pdata = rdev_get_drvdata(rdev);
-
-        dev_dbg(rdev_get_dev(rdev), "enabling charger\n");
-
-        gpio_set_value(pdata->gpio_nce, 0);
-        return 0;
-}
-
-static int bq24022_disable(struct regulator_dev *rdev)
-{
-        struct bq24022_mach_info *pdata = rdev_get_drvdata(rdev);
-
-        dev_dbg(rdev_get_dev(rdev), "disabling charger\n");
-
-        gpio_set_value(pdata->gpio_nce, 1);
-        return 0;
-}
-
-static int bq24022_is_enabled(struct regulator_dev *rdev)
-{
-        struct bq24022_mach_info *pdata = rdev_get_drvdata(rdev);
-
-        return !gpio_get_value(pdata->gpio_nce);
-}
-
-static struct regulator_ops bq24022_ops = {
-        .set_current_limit = bq24022_set_current_limit,
-        .get_current_limit = bq24022_get_current_limit,
-        .enable            = bq24022_enable,
-        .disable           = bq24022_disable,
-        .is_enabled        = bq24022_is_enabled,
-};
-
-static struct regulator_desc bq24022_desc = {
-        .name  = "bq24022",
-        .ops   = &bq24022_ops,
-        .type  = REGULATOR_CURRENT,
-        .owner = THIS_MODULE,
-};
-
-static int __init bq24022_probe(struct platform_device *pdev)
-{
-        struct bq24022_mach_info *pdata = pdev->dev.platform_data;
-        struct regulator_dev *bq24022;
-        int ret;
-
-        if (!pdata || !pdata->gpio_nce || !pdata->gpio_iset2)
-                return -EINVAL;
-
-        ret = gpio_request(pdata->gpio_nce, "ncharge_en");
-        if (ret) {
-                dev_dbg(&pdev->dev, "couldn't request nCE GPIO: %d\n",
-                        pdata->gpio_nce);
-                goto err_ce;
-        }
-        ret = gpio_request(pdata->gpio_iset2, "charge_mode");
-        if (ret) {
-                dev_dbg(&pdev->dev, "couldn't request ISET2 GPIO: %d\n",
-                        pdata->gpio_iset2);
-                goto err_iset2;
-        }
-        ret = gpio_direction_output(pdata->gpio_iset2, 0);
-        ret = gpio_direction_output(pdata->gpio_nce, 1);
-
-        bq24022 = regulator_register(&bq24022_desc, &pdev->dev,
-                                     pdata->init_data, pdata, NULL);
-        if (IS_ERR(bq24022)) {
-                dev_dbg(&pdev->dev, "couldn't register regulator\n");
-                ret = PTR_ERR(bq24022);
-                goto err_reg;
-        }
-        platform_set_drvdata(pdev, bq24022);
-        dev_dbg(&pdev->dev, "registered regulator\n");
-
-        return 0;
-err_reg:
-        gpio_free(pdata->gpio_iset2);
-err_iset2:
-        gpio_free(pdata->gpio_nce);
-err_ce:
-        return ret;
-}
-
-static int __devexit bq24022_remove(struct platform_device *pdev)
-{
-        struct bq24022_mach_info *pdata = pdev->dev.platform_data;
-        struct regulator_dev *bq24022 = platform_get_drvdata(pdev);
-
-        regulator_unregister(bq24022);
-        gpio_free(pdata->gpio_iset2);
-        gpio_free(pdata->gpio_nce);
-
-        return 0;
-}
-
-static struct platform_driver bq24022_driver = {
-        .driver = {
-                .name = "bq24022",
-        },
-        .remove = __devexit_p(bq24022_remove),
-};
-
-static int __init bq24022_init(void)
-{
-        return platform_driver_probe(&bq24022_driver, bq24022_probe);
-}
-
-static void __exit bq24022_exit(void)
-{
-        platform_driver_unregister(&bq24022_driver);
-}
-
-module_init(bq24022_init);
-module_exit(bq24022_exit);
-
-MODULE_AUTHOR("Philipp Zabel");
-MODULE_DESCRIPTION("TI bq24022 Li-Ion Charger driver");
-MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 3a125b835546..59efc63c4e48 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -773,8 +773,8 @@ config RTC_DRV_EP93XX
           will be called rtc-ep93xx.
 
 config RTC_DRV_SA1100
-        tristate "SA11x0/PXA2xx"
-        depends on ARCH_SA1100 || ARCH_PXA
+        tristate "SA11x0/PXA2xx/PXA910"
+        depends on ARCH_SA1100 || ARCH_PXA || ARCH_MMP
         help
           If you say Y here you will get access to the real time clock
           built into your SA11x0 or PXA2xx CPU.
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index aef40bd2957b..78951866f8ab 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -35,6 +35,8 @@
 
 enum s3c_cpu_type {
         TYPE_S3C2410,
+        TYPE_S3C2416,
+        TYPE_S3C2443,
         TYPE_S3C64XX,
 };
 
@@ -132,6 +134,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
         struct platform_device *pdev = to_platform_device(dev);
         struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
         unsigned int tmp = 0;
+        int val;
 
         if (!is_power_of_2(freq))
                 return -EINVAL;
@@ -139,12 +142,22 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
         clk_enable(rtc_clk);
         spin_lock_irq(&s3c_rtc_pie_lock);
 
-        if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+        if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
                 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
                 tmp &= S3C2410_TICNT_ENABLE;
         }
 
-        tmp |= (rtc_dev->max_user_freq / freq)-1;
+        val = (rtc_dev->max_user_freq / freq) - 1;
+
+        if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
+                tmp |= S3C2443_TICNT_PART(val);
+                writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
+
+                if (s3c_rtc_cpu_type == TYPE_S3C2416)
+                        writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
+        } else {
+                tmp |= val;
+        }
 
         writel(tmp, s3c_rtc_base + S3C2410_TICNT);
         spin_unlock_irq(&s3c_rtc_pie_lock);
@@ -371,7 +384,7 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
                 tmp &= ~S3C2410_RTCCON_RTCEN;
                 writew(tmp, base + S3C2410_RTCCON);
 
-                if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+                if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
                         tmp = readb(base + S3C2410_TICNT);
                         tmp &= ~S3C2410_TICNT_ENABLE;
                         writeb(tmp, base + S3C2410_TICNT);
@@ -428,12 +441,27 @@ static int __devexit s3c_rtc_remove(struct platform_device *dev)
         return 0;
 }
 
+static const struct of_device_id s3c_rtc_dt_match[];
+
+static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
+{
+#ifdef CONFIG_OF
+        if (pdev->dev.of_node) {
+                const struct of_device_id *match;
+                match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
+                return match->data;
+        }
+#endif
+        return platform_get_device_id(pdev)->driver_data;
+}
+
 static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 {
         struct rtc_device *rtc;
         struct rtc_time rtc_tm;
         struct resource *res;
         int ret;
+        int tmp;
 
         pr_debug("%s: probe=%p\n", __func__, pdev);
 
@@ -508,13 +536,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
                 goto err_nortc;
         }
 
-#ifdef CONFIG_OF
-        if (pdev->dev.of_node)
-                s3c_rtc_cpu_type = of_device_is_compatible(pdev->dev.of_node,
-                        "samsung,s3c6410-rtc") ? TYPE_S3C64XX : TYPE_S3C2410;
-        else
-#endif
-                s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
+        s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
 
         /* Check RTC Time */
 
@@ -533,11 +555,17 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
                 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
         }
 
-        if (s3c_rtc_cpu_type == TYPE_S3C64XX)
+        if (s3c_rtc_cpu_type != TYPE_S3C2410)
                 rtc->max_user_freq = 32768;
         else
                 rtc->max_user_freq = 128;
 
+        if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
+                tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
+                tmp |= S3C2443_RTCCON_TICSEL;
+                writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
+        }
+
         platform_set_drvdata(pdev, rtc);
 
         s3c_rtc_setfreq(&pdev->dev, 1);
@@ -638,8 +666,19 @@ static int s3c_rtc_resume(struct platform_device *pdev)
 
 #ifdef CONFIG_OF
 static const struct of_device_id s3c_rtc_dt_match[] = {
-        { .compatible = "samsung,s3c2410-rtc" },
-        { .compatible = "samsung,s3c6410-rtc" },
+        {
+                .compatible = "samsung,s3c2410-rtc"
+                .data = TYPE_S3C2410,
+        }, {
+                .compatible = "samsung,s3c2416-rtc"
+                .data = TYPE_S3C2416,
+        }, {
+                .compatible = "samsung,s3c2443-rtc"
+                .data = TYPE_S3C2443,
+        }, {
+                .compatible = "samsung,s3c6410-rtc"
+                .data = TYPE_S3C64XX,
+        },
         {},
 };
 MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
@@ -652,6 +691,12 @@ static struct platform_device_id s3c_rtc_driver_ids[] = {
                 .name           = "s3c2410-rtc",
                 .driver_data    = TYPE_S3C2410,
         }, {
+                .name           = "s3c2416-rtc",
+                .driver_data    = TYPE_S3C2416,
+        }, {
+                .name           = "s3c2443-rtc",
+                .driver_data    = TYPE_S3C2443,
+        }, {
                 .name           = "s3c64xx-rtc",
                 .driver_data    = TYPE_S3C64XX,
         },
diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c
index cb9a585312cc..e443b7850ede 100644
--- a/drivers/rtc/rtc-sa1100.c
+++ b/drivers/rtc/rtc-sa1100.c
@@ -23,94 +23,44 @@
 
 #include <linux/platform_device.h>
 #include <linux/module.h>
+#include <linux/clk.h>
 #include <linux/rtc.h>
 #include <linux/init.h>
 #include <linux/fs.h>
 #include <linux/interrupt.h>
+#include <linux/slab.h>
 #include <linux/string.h>
+#include <linux/of.h>
 #include <linux/pm.h>
 #include <linux/bitops.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
 
-#ifdef CONFIG_ARCH_PXA
+#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
 #include <mach/regs-rtc.h>
 #endif
 
 #define RTC_DEF_DIVIDER         (32768 - 1)
 #define RTC_DEF_TRIM            0
-
-static const unsigned long RTC_FREQ = 1024;
-static struct rtc_time rtc_alarm;
-static DEFINE_SPINLOCK(sa1100_rtc_lock);
-
-static inline int rtc_periodic_alarm(struct rtc_time *tm)
-{
-        return  (tm->tm_year == -1) ||
-                ((unsigned)tm->tm_mon >= 12) ||
-                ((unsigned)(tm->tm_mday - 1) >= 31) ||
-                ((unsigned)tm->tm_hour > 23) ||
-                ((unsigned)tm->tm_min > 59) ||
-                ((unsigned)tm->tm_sec > 59);
-}
-
-/*
- * Calculate the next alarm time given the requested alarm time mask
- * and the current time.
- */
-static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
-        struct rtc_time *alrm)
-{
-        unsigned long next_time;
-        unsigned long now_time;
-
-        next->tm_year = now->tm_year;
-        next->tm_mon = now->tm_mon;
-        next->tm_mday = now->tm_mday;
-        next->tm_hour = alrm->tm_hour;
-        next->tm_min = alrm->tm_min;
-        next->tm_sec = alrm->tm_sec;
-
-        rtc_tm_to_time(now, &now_time);
-        rtc_tm_to_time(next, &next_time);
-
-        if (next_time < now_time) {
-                /* Advance one day */
-                next_time += 60 * 60 * 24;
-                rtc_time_to_tm(next_time, next);
-        }
-}
-
-static int rtc_update_alarm(struct rtc_time *alrm)
-{
-        struct rtc_time alarm_tm, now_tm;
-        unsigned long now, time;
-        int ret;
-
-        do {
-                now = RCNR;
-                rtc_time_to_tm(now, &now_tm);
-                rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
-                ret = rtc_tm_to_time(&alarm_tm, &time);
-                if (ret != 0)
-                        break;
-
-                RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
-                RTAR = time;
-        } while (now != RCNR);
-
-        return ret;
-}
+#define RTC_FREQ                1024
+
+struct sa1100_rtc {
+        spinlock_t              lock;
+        int                     irq_1hz;
+        int                     irq_alarm;
+        struct rtc_device       *rtc;
+        struct clk              *clk;
+};
 
 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
 {
-        struct platform_device *pdev = to_platform_device(dev_id);
-        struct rtc_device *rtc = platform_get_drvdata(pdev);
+        struct sa1100_rtc *info = dev_get_drvdata(dev_id);
+        struct rtc_device *rtc = info->rtc;
         unsigned int rtsr;
         unsigned long events = 0;
 
-        spin_lock(&sa1100_rtc_lock);
+        spin_lock(&info->lock);
 
         rtsr = RTSR;
         /* clear interrupt sources */
@@ -146,30 +96,30 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
 
         rtc_update_irq(rtc, 1, events);
 
-        if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
-                rtc_update_alarm(&rtc_alarm);
-
-        spin_unlock(&sa1100_rtc_lock);
+        spin_unlock(&info->lock);
 
         return IRQ_HANDLED;
 }
 
 static int sa1100_rtc_open(struct device *dev)
 {
+        struct sa1100_rtc *info = dev_get_drvdata(dev);
+        struct rtc_device *rtc = info->rtc;
         int ret;
-        struct platform_device *plat_dev = to_platform_device(dev);
-        struct rtc_device *rtc = platform_get_drvdata(plat_dev);
 
-        ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
+        ret = clk_prepare_enable(info->clk);
+        if (ret)
+                goto fail_clk;
+        ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, IRQF_DISABLED,
                 "rtc 1Hz", dev);
         if (ret) {
-                dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
+                dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz);
                 goto fail_ui;
         }
-        ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
+        ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, IRQF_DISABLED,
                 "rtc Alrm", dev);
         if (ret) {
-                dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
+                dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm);
                 goto fail_ai;
         }
         rtc->max_user_freq = RTC_FREQ;
@@ -178,29 +128,36 @@ static int sa1100_rtc_open(struct device *dev)
         return 0;
 
  fail_ai:
-        free_irq(IRQ_RTC1Hz, dev);
+        free_irq(info->irq_1hz, dev);
  fail_ui:
+        clk_disable_unprepare(info->clk);
+ fail_clk:
         return ret;
 }
 
 static void sa1100_rtc_release(struct device *dev)
 {
-        spin_lock_irq(&sa1100_rtc_lock);
+        struct sa1100_rtc *info = dev_get_drvdata(dev);
+
+        spin_lock_irq(&info->lock);
         RTSR = 0;
-        spin_unlock_irq(&sa1100_rtc_lock);
+        spin_unlock_irq(&info->lock);
 
-        free_irq(IRQ_RTCAlrm, dev);
-        free_irq(IRQ_RTC1Hz, dev);
+        free_irq(info->irq_alarm, dev);
+        free_irq(info->irq_1hz, dev);
+        clk_disable_unprepare(info->clk);
 }
 
 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 {
-        spin_lock_irq(&sa1100_rtc_lock);
+        struct sa1100_rtc *info = dev_get_drvdata(dev);
+
+        spin_lock_irq(&info->lock);
         if (enabled)
                 RTSR |= RTSR_ALE;
         else
                 RTSR &= ~RTSR_ALE;
-        spin_unlock_irq(&sa1100_rtc_lock);
+        spin_unlock_irq(&info->lock);
         return 0;
 }
 
@@ -225,7 +182,6 @@ static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 {
         u32     rtsr;
 
-        memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
         rtsr = RTSR;
         alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
         alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
@@ -234,17 +190,22 @@ static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 
 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 {
+        struct sa1100_rtc *info = dev_get_drvdata(dev);
+        unsigned long time;
         int ret;
 
-        spin_lock_irq(&sa1100_rtc_lock);
-        ret = rtc_update_alarm(&alrm->time);
-        if (ret == 0) {
-                if (alrm->enabled)
-                        RTSR |= RTSR_ALE;
-                else
-                        RTSR &= ~RTSR_ALE;
-        }
-        spin_unlock_irq(&sa1100_rtc_lock);
+        spin_lock_irq(&info->lock);
+        ret = rtc_tm_to_time(&alrm->time, &time);
+        if (ret != 0)
+                goto out;
+        RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
+        RTAR = time;
+        if (alrm->enabled)
+                RTSR |= RTSR_ALE;
+        else
+                RTSR &= ~RTSR_ALE;
+out:
+        spin_unlock_irq(&info->lock);
 
         return ret;
 }
@@ -271,6 +232,27 @@ static const struct rtc_class_ops sa1100_rtc_ops = {
 static int sa1100_rtc_probe(struct platform_device *pdev)
 {
         struct rtc_device *rtc;
+        struct sa1100_rtc *info;
+        int irq_1hz, irq_alarm, ret = 0;
+
+        irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
+        irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
+        if (irq_1hz < 0 || irq_alarm < 0)
+                return -ENODEV;
+
+        info = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
+        if (!info)
+                return -ENOMEM;
+        info->clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(info->clk)) {
+                dev_err(&pdev->dev, "failed to find rtc clock source\n");
+                ret = PTR_ERR(info->clk);
+                goto err_clk;
+        }
+        info->irq_1hz = irq_1hz;
+        info->irq_alarm = irq_alarm;
+        spin_lock_init(&info->lock);
+        platform_set_drvdata(pdev, info);
 
         /*
          * According to the manual we should be able to let RTTR be zero
@@ -292,10 +274,11 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
         rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
                 THIS_MODULE);
 
-        if (IS_ERR(rtc))
-                return PTR_ERR(rtc);
-
-        platform_set_drvdata(pdev, rtc);
+        if (IS_ERR(rtc)) {
+                ret = PTR_ERR(rtc);
+                goto err_dev;
+        }
+        info->rtc = rtc;
 
         /* Fix for a nasty initialization problem the in SA11xx RTSR register.
          * See also the comments in sa1100_rtc_interrupt().
@@ -322,14 +305,24 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
         RTSR = RTSR_AL | RTSR_HZ;
 
         return 0;
+err_dev:
+        platform_set_drvdata(pdev, NULL);
+        clk_put(info->clk);
+err_clk:
+        kfree(info);
+        return ret;
 }
 
 static int sa1100_rtc_remove(struct platform_device *pdev)
 {
-        struct rtc_device *rtc = platform_get_drvdata(pdev);
+        struct sa1100_rtc *info = platform_get_drvdata(pdev);
 
-        if (rtc)
-                rtc_device_unregister(rtc);
+        if (info) {
+                rtc_device_unregister(info->rtc);
+                clk_put(info->clk);
+                platform_set_drvdata(pdev, NULL);
+                kfree(info);
+        }
 
         return 0;
 }
@@ -337,15 +330,17 @@ static int sa1100_rtc_remove(struct platform_device *pdev)
 #ifdef CONFIG_PM
 static int sa1100_rtc_suspend(struct device *dev)
 {
+        struct sa1100_rtc *info = dev_get_drvdata(dev);
         if (device_may_wakeup(dev))
-                enable_irq_wake(IRQ_RTCAlrm);
+                enable_irq_wake(info->irq_alarm);
         return 0;
 }
 
 static int sa1100_rtc_resume(struct device *dev)
 {
+        struct sa1100_rtc *info = dev_get_drvdata(dev);
         if (device_may_wakeup(dev))
-                disable_irq_wake(IRQ_RTCAlrm);
+                disable_irq_wake(info->irq_alarm);
         return 0;
 }
 
@@ -355,6 +350,13 @@ static const struct dev_pm_ops sa1100_rtc_pm_ops = {
 };
 #endif
 
+static struct of_device_id sa1100_rtc_dt_ids[] = {
+        { .compatible = "mrvl,sa1100-rtc", },
+        { .compatible = "mrvl,mmp-rtc", },
+        {}
+};
+MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids);
+
 static struct platform_driver sa1100_rtc_driver = {
         .probe          = sa1100_rtc_probe,
         .remove         = sa1100_rtc_remove,
@@ -363,6 +365,7 @@ static struct platform_driver sa1100_rtc_driver = {
 #ifdef CONFIG_PM
                 .pm     = &sa1100_rtc_pm_ops,
 #endif
+                .of_match_table = sa1100_rtc_dt_ids,
         },
 };
 
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 0b7fed746b27..e7feceeebc2f 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -1508,7 +1508,7 @@ static int serial_imx_probe(struct platform_device *pdev)
                 ret = PTR_ERR(sport->clk);
                 goto unmap;
         }
-        clk_enable(sport->clk);
+        clk_prepare_enable(sport->clk);
 
         sport->port.uartclk = clk_get_rate(sport->clk);
 
@@ -1531,8 +1531,8 @@ deinit:
         if (pdata && pdata->exit)
                 pdata->exit(pdev);
 clkput:
+        clk_disable_unprepare(sport->clk);
         clk_put(sport->clk);
-        clk_disable(sport->clk);
 unmap:
         iounmap(sport->port.membase);
 free:
@@ -1552,11 +1552,10 @@ static int serial_imx_remove(struct platform_device *pdev)
 
         if (sport) {
                 uart_remove_one_port(&imx_reg, &sport->port);
+                clk_disable_unprepare(sport->clk);
                 clk_put(sport->clk);
         }
 
-        clk_disable(sport->clk);
-
         if (pdata && pdata->exit)
                 pdata->exit(pdev);
 
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 7ecb68a67411..85ae4b46bb68 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -137,7 +137,7 @@ choice
 
 config USB_AT91
         tristate "Atmel AT91 USB Device Port"
-        depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91CAP9 && !ARCH_AT91SAM9G45
+        depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91SAM9G45
         help
            Many Atmel AT91 processors (such as the AT91RM2000) have a
            full speed USB Device Port with support for five configurable
@@ -150,7 +150,7 @@ config USB_AT91
 config USB_ATMEL_USBA
         tristate "Atmel USBA"
         select USB_GADGET_DUALSPEED
-        depends on AVR32 || ARCH_AT91CAP9 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
+        depends on AVR32 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
         help
           USBA is the integrated high-speed USB Device controller on
           the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel.
diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index bd4272b61a14..ead4a4215797 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -9,99 +9,182 @@
  * representation into a hardware irq number that can be mapped back to a
  * Linux irq number without any extra platform support code.
  *
- * irq_domain is expected to be embedded in an interrupt controller's private
- * data structure.
+ * Interrupt controller "domain" data structure. This could be defined as a
+ * irq domain controller. That is, it handles the mapping between hardware
+ * and virtual interrupt numbers for a given interrupt domain. The domain
+ * structure is generally created by the PIC code for a given PIC instance
+ * (though a domain can cover more than one PIC if they have a flat number
+ * model). It's the domain callbacks that are responsible for setting the
+ * irq_chip on a given irq_desc after it's been mapped.
+ *
+ * The host code and data structures are agnostic to whether or not
+ * we use an open firmware device-tree. We do have references to struct
+ * device_node in two places: in irq_find_host() to find the host matching
+ * a given interrupt controller node, and of course as an argument to its
+ * counterpart domain->ops->match() callback. However, those are treated as
+ * generic pointers by the core and the fact that it's actually a device-node
+ * pointer is purely a convention between callers and implementation. This
+ * code could thus be used on other architectures by replacing those two
+ * by some sort of arch-specific void * "token" used to identify interrupt
+ * controllers.
  */
+
 #ifndef _LINUX_IRQDOMAIN_H
 #define _LINUX_IRQDOMAIN_H
 
-#include <linux/irq.h>
-#include <linux/mod_devicetable.h>
+#include <linux/types.h>
+#include <linux/radix-tree.h>
 
-#ifdef CONFIG_IRQ_DOMAIN
 struct device_node;
 struct irq_domain;
+struct of_device_id;
+
+/* Number of irqs reserved for a legacy isa controller */
+#define NUM_ISA_INTERRUPTS      16
+
+/* This type is the placeholder for a hardware interrupt number. It has to
+ * be big enough to enclose whatever representation is used by a given
+ * platform.
+ */
+typedef unsigned long irq_hw_number_t;
 
 /**
  * struct irq_domain_ops - Methods for irq_domain objects
- * @to_irq: (optional) given a local hardware irq number, return the linux
- *          irq number.  If to_irq is not implemented, then the irq_domain
- *          will use this translation: irq = (domain->irq_base + hwirq)
- * @dt_translate: Given a device tree node and interrupt specifier, decode
- *                the hardware irq number and linux irq type value.
+ * @match: Match an interrupt controller device node to a host, returns
+ *         1 on a match
+ * @map: Create or update a mapping between a virtual irq number and a hw
+ *       irq number. This is called only once for a given mapping.
+ * @unmap: Dispose of such a mapping
+ * @xlate: Given a device tree node and interrupt specifier, decode
+ *         the hardware irq number and linux irq type value.
+ *
+ * Functions below are provided by the driver and called whenever a new mapping
+ * is created or an old mapping is disposed. The driver can then proceed to
+ * whatever internal data structures management is required. It also needs
+ * to setup the irq_desc when returning from map().
  */
 struct irq_domain_ops {
-        unsigned int (*to_irq)(struct irq_domain *d, unsigned long hwirq);
-
-#ifdef CONFIG_OF
-        int (*dt_translate)(struct irq_domain *d, struct device_node *node,
-                            const u32 *intspec, unsigned int intsize,
-                            unsigned long *out_hwirq, unsigned int *out_type);
-#endif /* CONFIG_OF */
+        int (*match)(struct irq_domain *d, struct device_node *node);
+        int (*map)(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw);
+        void (*unmap)(struct irq_domain *d, unsigned int virq);
+        int (*xlate)(struct irq_domain *d, struct device_node *node,
+                     const u32 *intspec, unsigned int intsize,
+                     unsigned long *out_hwirq, unsigned int *out_type);
 };
 
 /**
  * struct irq_domain - Hardware interrupt number translation object
- * @list: Element in global irq_domain list.
+ * @link: Element in global irq_domain list.
+ * @revmap_type: Method used for reverse mapping hwirq numbers to linux irq. This
+ *               will be one of the IRQ_DOMAIN_MAP_* values.
+ * @revmap_data: Revmap method specific data.
+ * @ops: pointer to irq_domain methods
+ * @host_data: private data pointer for use by owner.  Not touched by irq_domain
+ *             core code.
  * @irq_base: Start of irq_desc range assigned to the irq_domain.  The creator
  *            of the irq_domain is responsible for allocating the array of
  *            irq_desc structures.
  * @nr_irq: Number of irqs managed by the irq domain
  * @hwirq_base: Starting number for hwirqs managed by the irq domain
- * @ops: pointer to irq_domain methods
- * @priv: private data pointer for use by owner.  Not touched by irq_domain
- *        core code.
  * @of_node: (optional) Pointer to device tree nodes associated with the
  *           irq_domain.  Used when decoding device tree interrupt specifiers.
  */
 struct irq_domain {
-        struct list_head list;
-        unsigned int irq_base;
-        unsigned int nr_irq;
-        unsigned int hwirq_base;
+        struct list_head link;
+
+        /* type of reverse mapping_technique */
+        unsigned int revmap_type;
+        union {
+                struct {
+                        unsigned int size;
+                        unsigned int first_irq;
+                        irq_hw_number_t first_hwirq;
+                } legacy;
+                struct {
+                        unsigned int size;
+                        unsigned int *revmap;
+                } linear;
+                struct radix_tree_root tree;
+        } revmap_data;
         const struct irq_domain_ops *ops;
-        void *priv;
+        void *host_data;
+        irq_hw_number_t inval_irq;
+
+        /* Optional device node pointer */
         struct device_node *of_node;
 };
 
-/**
- * irq_domain_to_irq() - Translate from a hardware irq to a linux irq number
- *
- * Returns the linux irq number associated with a hardware irq.  By default,
- * the mapping is irq == domain->irq_base + hwirq, but this mapping can
- * be overridden if the irq_domain implements a .to_irq() hook.
- */
-static inline unsigned int irq_domain_to_irq(struct irq_domain *d,
-                                             unsigned long hwirq)
+#ifdef CONFIG_IRQ_DOMAIN
+struct irq_domain *irq_domain_add_legacy(struct device_node *of_node,
+                                         unsigned int size,
+                                         unsigned int first_irq,
+                                         irq_hw_number_t first_hwirq,
+                                         const struct irq_domain_ops *ops,
+                                         void *host_data);
+struct irq_domain *irq_domain_add_linear(struct device_node *of_node,
+                                         unsigned int size,
+                                         const struct irq_domain_ops *ops,
+                                         void *host_data);
+struct irq_domain *irq_domain_add_nomap(struct device_node *of_node,
+                                         const struct irq_domain_ops *ops,
+                                         void *host_data);
+struct irq_domain *irq_domain_add_tree(struct device_node *of_node,
+                                         const struct irq_domain_ops *ops,
+                                         void *host_data);
+
+extern struct irq_domain *irq_find_host(struct device_node *node);
+extern void irq_set_default_host(struct irq_domain *host);
+extern void irq_set_virq_count(unsigned int count);
+
+static inline struct irq_domain *irq_domain_add_legacy_isa(
+                                struct device_node *of_node,
+                                const struct irq_domain_ops *ops,
+                                void *host_data)
 {
-        if (d->ops->to_irq)
-                return d->ops->to_irq(d, hwirq);
-        if (WARN_ON(hwirq < d->hwirq_base))
-                return 0;
-        return d->irq_base + hwirq - d->hwirq_base;
+        return irq_domain_add_legacy(of_node, NUM_ISA_INTERRUPTS, 0, 0, ops,
+                                     host_data);
 }
+extern struct irq_domain *irq_find_host(struct device_node *node);
+extern void irq_set_default_host(struct irq_domain *host);
+extern void irq_set_virq_count(unsigned int count);
 
-#define irq_domain_for_each_hwirq(d, hw) \
-        for (hw = d->hwirq_base; hw < d->hwirq_base + d->nr_irq; hw++)
 
-#define irq_domain_for_each_irq(d, hw, irq) \
-        for (hw = d->hwirq_base, irq = irq_domain_to_irq(d, hw); \
-             hw < d->hwirq_base + d->nr_irq; \
-             hw++, irq = irq_domain_to_irq(d, hw))
+extern unsigned int irq_create_mapping(struct irq_domain *host,
+                                       irq_hw_number_t hwirq);
+extern void irq_dispose_mapping(unsigned int virq);
+extern unsigned int irq_find_mapping(struct irq_domain *host,
+                                     irq_hw_number_t hwirq);
+extern unsigned int irq_create_direct_mapping(struct irq_domain *host);
+extern void irq_radix_revmap_insert(struct irq_domain *host, unsigned int virq,
+                                    irq_hw_number_t hwirq);
+extern unsigned int irq_radix_revmap_lookup(struct irq_domain *host,
+                                            irq_hw_number_t hwirq);
+extern unsigned int irq_linear_revmap(struct irq_domain *host,
+                                      irq_hw_number_t hwirq);
 
-extern void irq_domain_add(struct irq_domain *domain);
-extern void irq_domain_del(struct irq_domain *domain);
+extern const struct irq_domain_ops irq_domain_simple_ops;
 
-extern struct irq_domain_ops irq_domain_simple_ops;
-#endif /* CONFIG_IRQ_DOMAIN */
+/* stock xlate functions */
+int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr,
+                        const u32 *intspec, unsigned int intsize,
+                        irq_hw_number_t *out_hwirq, unsigned int *out_type);
+int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr,
+                        const u32 *intspec, unsigned int intsize,
+                        irq_hw_number_t *out_hwirq, unsigned int *out_type);
+int irq_domain_xlate_onetwocell(struct irq_domain *d, struct device_node *ctrlr,
+                        const u32 *intspec, unsigned int intsize,
+                        irq_hw_number_t *out_hwirq, unsigned int *out_type);
 
-#if defined(CONFIG_IRQ_DOMAIN) && defined(CONFIG_OF_IRQ)
-extern void irq_domain_add_simple(struct device_node *controller, int irq_base);
+#if defined(CONFIG_OF_IRQ)
 extern void irq_domain_generate_simple(const struct of_device_id *match,
                                         u64 phys_base, unsigned int irq_start);
-#else /* CONFIG_IRQ_DOMAIN && CONFIG_OF_IRQ */
+#else /* CONFIG_OF_IRQ */
 static inline void irq_domain_generate_simple(const struct of_device_id *match,
                                         u64 phys_base, unsigned int irq_start) { }
-#endif /* CONFIG_IRQ_DOMAIN && CONFIG_OF_IRQ */
+#endif /* !CONFIG_OF_IRQ */
+
+#else /* CONFIG_IRQ_DOMAIN */
+static inline void irq_dispose_mapping(unsigned int virq) { }
+#endif /* !CONFIG_IRQ_DOMAIN */
 
 #endif /* _LINUX_IRQDOMAIN_H */
diff --git a/include/linux/of_address.h b/include/linux/of_address.h
index 3118623c2c1f..01b925ad8d78 100644
--- a/include/linux/of_address.h
+++ b/include/linux/of_address.h
@@ -4,6 +4,7 @@
 #include <linux/errno.h>
 #include <linux/of.h>
 
+#ifdef CONFIG_OF_ADDRESS
 extern u64 of_translate_address(struct device_node *np, const __be32 *addr);
 extern int of_address_to_resource(struct device_node *dev, int index,
                                   struct resource *r);
@@ -25,12 +26,37 @@ static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; }
 #define pci_address_to_pio pci_address_to_pio
 #endif
 
-#ifdef CONFIG_PCI
+#else /* CONFIG_OF_ADDRESS */
+static inline int of_address_to_resource(struct device_node *dev, int index,
+                                         struct resource *r)
+{
+        return -EINVAL;
+}
+static inline struct device_node *of_find_matching_node_by_address(
+                                        struct device_node *from,
+                                        const struct of_device_id *matches,
+                                        u64 base_address)
+{
+        return NULL;
+}
+static inline void __iomem *of_iomap(struct device_node *device, int index)
+{
+        return NULL;
+}
+static inline const u32 *of_get_address(struct device_node *dev, int index,
+                                        u64 *size, unsigned int *flags)
+{
+        return NULL;
+}
+#endif /* CONFIG_OF_ADDRESS */
+
+
+#if defined(CONFIG_OF_ADDRESS) && defined(CONFIG_PCI)
 extern const __be32 *of_get_pci_address(struct device_node *dev, int bar_no,
                                u64 *size, unsigned int *flags);
 extern int of_pci_address_to_resource(struct device_node *dev, int bar,
                                       struct resource *r);
-#else /* CONFIG_PCI */
+#else /* CONFIG_OF_ADDRESS && CONFIG_PCI */
 static inline int of_pci_address_to_resource(struct device_node *dev, int bar,
                                              struct resource *r)
 {
@@ -42,8 +68,7 @@ static inline const __be32 *of_get_pci_address(struct device_node *dev,
 {
         return NULL;
 }
-#endif /* CONFIG_PCI */
-
+#endif /* CONFIG_OF_ADDRESS && CONFIG_PCI */
 
 #endif /* __OF_ADDRESS_H */
 
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index d0307eed20c9..d229ad3edee0 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -6,6 +6,7 @@ struct of_irq;
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/irq.h>
+#include <linux/irqdomain.h>
 #include <linux/ioport.h>
 #include <linux/of.h>
 
@@ -65,9 +66,6 @@ extern int of_irq_map_one(struct device_node *device, int index,
 extern unsigned int irq_create_of_mapping(struct device_node *controller,
                                           const u32 *intspec,
                                           unsigned int intsize);
-#ifdef CONFIG_IRQ_DOMAIN
-extern void irq_dispose_mapping(unsigned int irq);
-#endif
 extern int of_irq_to_resource(struct device_node *dev, int index,
                               struct resource *r);
 extern int of_irq_count(struct device_node *dev);
diff --git a/include/linux/of_platform.h b/include/linux/of_platform.h
index 040ce2f6e8de..242fa3563e2e 100644
--- a/include/linux/of_platform.h
+++ b/include/linux/of_platform.h
@@ -81,7 +81,7 @@ extern struct platform_device *of_device_alloc(struct device_node *np,
                                          struct device *parent);
 extern struct platform_device *of_find_device_by_node(struct device_node *np);
 
-#if !defined(CONFIG_SPARC) /* SPARC has its own device registration method */
+#ifdef CONFIG_OF_ADDRESS /* device reg helpers depend on OF_ADDRESS */
 /* Platform devices and busses creation */
 extern struct platform_device *of_platform_device_create(struct device_node *np,
                                                    const char *bus_id,
@@ -94,7 +94,15 @@ extern int of_platform_populate(struct device_node *root,
                                 const struct of_device_id *matches,
                                 const struct of_dev_auxdata *lookup,
                                 struct device *parent);
-#endif /* !CONFIG_SPARC */
+#else
+static inline int of_platform_populate(struct device_node *root,
+                                        const struct of_device_id *matches,
+                                        const struct of_dev_auxdata *lookup,
+                                        struct device *parent)
+{
+        return -ENODEV;
+}
+#endif /* !CONFIG_OF_ADDRESS */
 
 #endif /* CONFIG_OF_DEVICE */
 
diff --git a/include/linux/platform_data/tegra_emc.h b/include/linux/platform_data/tegra_emc.h
new file mode 100644
index 000000000000..df67505e98f8
--- /dev/null
+++ b/include/linux/platform_data/tegra_emc.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2011 Google, Inc.
+ *
+ * Author:
+ *      Colin Cross <ccross@android.com>
+ *      Olof Johansson <olof@lixom.net>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __TEGRA_EMC_H_
+#define __TEGRA_EMC_H_
+
+#define TEGRA_EMC_NUM_REGS 46
+
+struct tegra_emc_table {
+        unsigned long rate;
+        u32 regs[TEGRA_EMC_NUM_REGS];
+};
+
+struct tegra_emc_pdata {
+        int num_tables;
+        struct tegra_emc_table *tables;
+};
+
+#endif
diff --git a/include/linux/regulator/bq24022.h b/include/linux/regulator/bq24022.h
deleted file mode 100644
index a6d014005d49..000000000000
--- a/include/linux/regulator/bq24022.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Support for TI bq24022 (bqTINY-II) Dual Input (USB/AC Adpater)
- * 1-Cell Li-Ion Charger connected via GPIOs.
- *
- * Copyright (c) 2008 Philipp Zabel
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-struct regulator_init_data;
-
-/**
- * bq24022_mach_info - platform data for bq24022
- * @gpio_nce: GPIO line connected to the nCE pin, used to enable / disable charging
- * @gpio_iset2: GPIO line connected to the ISET2 pin, used to limit charging current to 100 mA / 500 mA
- */
-struct bq24022_mach_info {
-        int gpio_nce;
-        int gpio_iset2;
-        struct regulator_init_data *init_data;
-};
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
index 1f9e26526b69..af48e59bc2ff 100644
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -1,189 +1,793 @@
+#include <linux/debugfs.h>
+#include <linux/hardirq.h>
+#include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/irqdesc.h>
 #include <linux/irqdomain.h>
 #include <linux/module.h>
 #include <linux/mutex.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/seq_file.h>
 #include <linux/slab.h>
+#include <linux/smp.h>
+#include <linux/fs.h>
+
+#define IRQ_DOMAIN_MAP_LEGACY 0 /* driver allocated fixed range of irqs.
+                                 * ie. legacy 8259, gets irqs 1..15 */
+#define IRQ_DOMAIN_MAP_NOMAP 1 /* no fast reverse mapping */
+#define IRQ_DOMAIN_MAP_LINEAR 2 /* linear map of interrupts */
+#define IRQ_DOMAIN_MAP_TREE 3 /* radix tree */
 
 static LIST_HEAD(irq_domain_list);
 static DEFINE_MUTEX(irq_domain_mutex);
 
+static DEFINE_MUTEX(revmap_trees_mutex);
+static unsigned int irq_virq_count = NR_IRQS;
+static struct irq_domain *irq_default_domain;
+
 /**
- * irq_domain_add() - Register an irq_domain
- * @domain: ptr to initialized irq_domain structure
+ * irq_domain_alloc() - Allocate a new irq_domain data structure
+ * @of_node: optional device-tree node of the interrupt controller
+ * @revmap_type: type of reverse mapping to use
+ * @ops: map/unmap domain callbacks
+ * @host_data: Controller private data pointer
  *
- * Registers an irq_domain structure.  The irq_domain must at a minimum be
- * initialized with an ops structure pointer, and either a ->to_irq hook or
- * a valid irq_base value.  Everything else is optional.
+ * Allocates and initialize and irq_domain structure.  Caller is expected to
+ * register allocated irq_domain with irq_domain_register().  Returns pointer
+ * to IRQ domain, or NULL on failure.
  */
-void irq_domain_add(struct irq_domain *domain)
+static struct irq_domain *irq_domain_alloc(struct device_node *of_node,
+                                           unsigned int revmap_type,
+                                           const struct irq_domain_ops *ops,
+                                           void *host_data)
 {
-        struct irq_data *d;
-        int hwirq, irq;
+        struct irq_domain *domain;
 
-        /*
-         * This assumes that the irq_domain owner has already allocated
-         * the irq_descs.  This block will be removed when support for dynamic
-         * allocation of irq_descs is added to irq_domain.
-         */
-        irq_domain_for_each_irq(domain, hwirq, irq) {
-                d = irq_get_irq_data(irq);
-                if (!d) {
-                        WARN(1, "error: assigning domain to non existant irq_desc");
-                        return;
-                }
-                if (d->domain) {
-                        /* things are broken; just report, don't clean up */
-                        WARN(1, "error: irq_desc already assigned to a domain");
-                        return;
+        domain = kzalloc(sizeof(*domain), GFP_KERNEL);
+        if (WARN_ON(!domain))
+                return NULL;
+
+        /* Fill structure */
+        domain->revmap_type = revmap_type;
+        domain->ops = ops;
+        domain->host_data = host_data;
+        domain->of_node = of_node_get(of_node);
+
+        return domain;
+}
+
+static void irq_domain_add(struct irq_domain *domain)
+{
+        mutex_lock(&irq_domain_mutex);
+        list_add(&domain->link, &irq_domain_list);
+        mutex_unlock(&irq_domain_mutex);
+        pr_debug("irq: Allocated domain of type %d @0x%p\n",
+                 domain->revmap_type, domain);
+}
+
+static unsigned int irq_domain_legacy_revmap(struct irq_domain *domain,
+                                             irq_hw_number_t hwirq)
+{
+        irq_hw_number_t first_hwirq = domain->revmap_data.legacy.first_hwirq;
+        int size = domain->revmap_data.legacy.size;
+
+        if (WARN_ON(hwirq < first_hwirq || hwirq >= first_hwirq + size))
+                return 0;
+        return hwirq - first_hwirq + domain->revmap_data.legacy.first_irq;
+}
+
+/**
+ * irq_domain_add_legacy() - Allocate and register a legacy revmap irq_domain.
+ * @of_node: pointer to interrupt controller's device tree node.
+ * @size: total number of irqs in legacy mapping
+ * @first_irq: first number of irq block assigned to the domain
+ * @first_hwirq: first hwirq number to use for the translation. Should normally
+ *               be '0', but a positive integer can be used if the effective
+ *               hwirqs numbering does not begin at zero.
+ * @ops: map/unmap domain callbacks
+ * @host_data: Controller private data pointer
+ *
+ * Note: the map() callback will be called before this function returns
+ * for all legacy interrupts except 0 (which is always the invalid irq for
+ * a legacy controller).
+ */
+struct irq_domain *irq_domain_add_legacy(struct device_node *of_node,
+                                         unsigned int size,
+                                         unsigned int first_irq,
+                                         irq_hw_number_t first_hwirq,
+                                         const struct irq_domain_ops *ops,
+                                         void *host_data)
+{
+        struct irq_domain *domain;
+        unsigned int i;
+
+        domain = irq_domain_alloc(of_node, IRQ_DOMAIN_MAP_LEGACY, ops, host_data);
+        if (!domain)
+                return NULL;
+
+        domain->revmap_data.legacy.first_irq = first_irq;
+        domain->revmap_data.legacy.first_hwirq = first_hwirq;
+        domain->revmap_data.legacy.size = size;
+
+        mutex_lock(&irq_domain_mutex);
+        /* Verify that all the irqs are available */
+        for (i = 0; i < size; i++) {
+                int irq = first_irq + i;
+                struct irq_data *irq_data = irq_get_irq_data(irq);
+
+                if (WARN_ON(!irq_data || irq_data->domain)) {
+                        mutex_unlock(&irq_domain_mutex);
+                        of_node_put(domain->of_node);
+                        kfree(domain);
+                        return NULL;
                 }
-                d->domain = domain;
-                d->hwirq = hwirq;
         }
 
-        mutex_lock(&irq_domain_mutex);
-        list_add(&domain->list, &irq_domain_list);
+        /* Claim all of the irqs before registering a legacy domain */
+        for (i = 0; i < size; i++) {
+                struct irq_data *irq_data = irq_get_irq_data(first_irq + i);
+                irq_data->hwirq = first_hwirq + i;
+                irq_data->domain = domain;
+        }
         mutex_unlock(&irq_domain_mutex);
+
+        for (i = 0; i < size; i++) {
+                int irq = first_irq + i;
+                int hwirq = first_hwirq + i;
+
+                /* IRQ0 gets ignored */
+                if (!irq)
+                        continue;
+
+                /* Legacy flags are left to default at this point,
+                 * one can then use irq_create_mapping() to
+                 * explicitly change them
+                 */
+                ops->map(domain, irq, hwirq);
+
+                /* Clear norequest flags */
+                irq_clear_status_flags(irq, IRQ_NOREQUEST);
+        }
+
+        irq_domain_add(domain);
+        return domain;
+}
+
+/**
+ * irq_domain_add_linear() - Allocate and register a legacy revmap irq_domain.
+ * @of_node: pointer to interrupt controller's device tree node.
+ * @ops: map/unmap domain callbacks
+ * @host_data: Controller private data pointer
+ */
+struct irq_domain *irq_domain_add_linear(struct device_node *of_node,
+                                         unsigned int size,
+                                         const struct irq_domain_ops *ops,
+                                         void *host_data)
+{
+        struct irq_domain *domain;
+        unsigned int *revmap;
+
+        revmap = kzalloc(sizeof(*revmap) * size, GFP_KERNEL);
+        if (WARN_ON(!revmap))
+                return NULL;
+
+        domain = irq_domain_alloc(of_node, IRQ_DOMAIN_MAP_LINEAR, ops, host_data);
+        if (!domain) {
+                kfree(revmap);
+                return NULL;
+        }
+        domain->revmap_data.linear.size = size;
+        domain->revmap_data.linear.revmap = revmap;
+        irq_domain_add(domain);
+        return domain;
+}
+
+struct irq_domain *irq_domain_add_nomap(struct device_node *of_node,
+                                         const struct irq_domain_ops *ops,
+                                         void *host_data)
+{
+        struct irq_domain *domain = irq_domain_alloc(of_node,
+                                        IRQ_DOMAIN_MAP_NOMAP, ops, host_data);
+        if (domain)
+                irq_domain_add(domain);
+        return domain;
+}
+
+/**
+ * irq_domain_add_tree()
+ * @of_node: pointer to interrupt controller's device tree node.
+ * @ops: map/unmap domain callbacks
+ *
+ * Note: The radix tree will be allocated later during boot automatically
+ * (the reverse mapping will use the slow path until that happens).
+ */
+struct irq_domain *irq_domain_add_tree(struct device_node *of_node,
+                                         const struct irq_domain_ops *ops,
+                                         void *host_data)
+{
+        struct irq_domain *domain = irq_domain_alloc(of_node,
+                                        IRQ_DOMAIN_MAP_TREE, ops, host_data);
+        if (domain) {
+                INIT_RADIX_TREE(&domain->revmap_data.tree, GFP_KERNEL);
+                irq_domain_add(domain);
+        }
+        return domain;
 }
 
 /**
- * irq_domain_del() - Unregister an irq_domain
- * @domain: ptr to registered irq_domain.
+ * irq_find_host() - Locates a domain for a given device node
+ * @node: device-tree node of the interrupt controller
  */
-void irq_domain_del(struct irq_domain *domain)
+struct irq_domain *irq_find_host(struct device_node *node)
 {
-        struct irq_data *d;
-        int hwirq, irq;
+        struct irq_domain *h, *found = NULL;
+        int rc;
 
+        /* We might want to match the legacy controller last since
+         * it might potentially be set to match all interrupts in
+         * the absence of a device node. This isn't a problem so far
+         * yet though...
+         */
         mutex_lock(&irq_domain_mutex);
-        list_del(&domain->list);
+        list_for_each_entry(h, &irq_domain_list, link) {
+                if (h->ops->match)
+                        rc = h->ops->match(h, node);
+                else
+                        rc = (h->of_node != NULL) && (h->of_node == node);
+
+                if (rc) {
+                        found = h;
+                        break;
+                }
+        }
         mutex_unlock(&irq_domain_mutex);
+        return found;
+}
+EXPORT_SYMBOL_GPL(irq_find_host);
+
+/**
+ * irq_set_default_host() - Set a "default" irq domain
+ * @domain: default domain pointer
+ *
+ * For convenience, it's possible to set a "default" domain that will be used
+ * whenever NULL is passed to irq_create_mapping(). It makes life easier for
+ * platforms that want to manipulate a few hard coded interrupt numbers that
+ * aren't properly represented in the device-tree.
+ */
+void irq_set_default_host(struct irq_domain *domain)
+{
+        pr_debug("irq: Default domain set to @0x%p\n", domain);
+
+        irq_default_domain = domain;
+}
+
+/**
+ * irq_set_virq_count() - Set the maximum number of linux irqs
+ * @count: number of linux irqs, capped with NR_IRQS
+ *
+ * This is mainly for use by platforms like iSeries who want to program
+ * the virtual irq number in the controller to avoid the reverse mapping
+ */
+void irq_set_virq_count(unsigned int count)
+{
+        pr_debug("irq: Trying to set virq count to %d\n", count);
 
-        /* Clear the irq_domain assignments */
-        irq_domain_for_each_irq(domain, hwirq, irq) {
-                d = irq_get_irq_data(irq);
-                d->domain = NULL;
+        BUG_ON(count < NUM_ISA_INTERRUPTS);
+        if (count < NR_IRQS)
+                irq_virq_count = count;
+}
+
+static int irq_setup_virq(struct irq_domain *domain, unsigned int virq,
+                            irq_hw_number_t hwirq)
+{
+        struct irq_data *irq_data = irq_get_irq_data(virq);
+
+        irq_data->hwirq = hwirq;
+        irq_data->domain = domain;
+        if (domain->ops->map(domain, virq, hwirq)) {
+                pr_debug("irq: -> mapping failed, freeing\n");
+                irq_data->domain = NULL;
+                irq_data->hwirq = 0;
+                return -1;
         }
+
+        irq_clear_status_flags(virq, IRQ_NOREQUEST);
+
+        return 0;
 }
 
-#if defined(CONFIG_OF_IRQ)
 /**
- * irq_create_of_mapping() - Map a linux irq number from a DT interrupt spec
+ * irq_create_direct_mapping() - Allocate an irq for direct mapping
+ * @domain: domain to allocate the irq for or NULL for default domain
  *
- * Used by the device tree interrupt mapping code to translate a device tree
- * interrupt specifier to a valid linux irq number.  Returns either a valid
- * linux IRQ number or 0.
+ * This routine is used for irq controllers which can choose the hardware
+ * interrupt numbers they generate. In such a case it's simplest to use
+ * the linux irq as the hardware interrupt number.
+ */
+unsigned int irq_create_direct_mapping(struct irq_domain *domain)
+{
+        unsigned int virq;
+
+        if (domain == NULL)
+                domain = irq_default_domain;
+
+        BUG_ON(domain == NULL);
+        WARN_ON(domain->revmap_type != IRQ_DOMAIN_MAP_NOMAP);
+
+        virq = irq_alloc_desc_from(1, 0);
+        if (!virq) {
+                pr_debug("irq: create_direct virq allocation failed\n");
+                return 0;
+        }
+        if (virq >= irq_virq_count) {
+                pr_err("ERROR: no free irqs available below %i maximum\n",
+                        irq_virq_count);
+                irq_free_desc(virq);
+                return 0;
+        }
+
+        pr_debug("irq: create_direct obtained virq %d\n", virq);
+
+        if (irq_setup_virq(domain, virq, virq)) {
+                irq_free_desc(virq);
+                return 0;
+        }
+
+        return virq;
+}
+
+/**
+ * irq_create_mapping() - Map a hardware interrupt into linux irq space
+ * @domain: domain owning this hardware interrupt or NULL for default domain
+ * @hwirq: hardware irq number in that domain space
  *
- * When the caller no longer need the irq number returned by this function it
- * should arrange to call irq_dispose_mapping().
+ * Only one mapping per hardware interrupt is permitted. Returns a linux
+ * irq number.
+ * If the sense/trigger is to be specified, set_irq_type() should be called
+ * on the number returned from that call.
  */
+unsigned int irq_create_mapping(struct irq_domain *domain,
+                                irq_hw_number_t hwirq)
+{
+        unsigned int virq, hint;
+
+        pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", domain, hwirq);
+
+        /* Look for default domain if nececssary */
+        if (domain == NULL)
+                domain = irq_default_domain;
+        if (domain == NULL) {
+                printk(KERN_WARNING "irq_create_mapping called for"
+                       " NULL domain, hwirq=%lx\n", hwirq);
+                WARN_ON(1);
+                return 0;
+        }
+        pr_debug("irq: -> using domain @%p\n", domain);
+
+        /* Check if mapping already exists */
+        virq = irq_find_mapping(domain, hwirq);
+        if (virq) {
+                pr_debug("irq: -> existing mapping on virq %d\n", virq);
+                return virq;
+        }
+
+        /* Get a virtual interrupt number */
+        if (domain->revmap_type == IRQ_DOMAIN_MAP_LEGACY)
+                return irq_domain_legacy_revmap(domain, hwirq);
+
+        /* Allocate a virtual interrupt number */
+        hint = hwirq % irq_virq_count;
+        if (hint == 0)
+                hint++;
+        virq = irq_alloc_desc_from(hint, 0);
+        if (!virq)
+                virq = irq_alloc_desc_from(1, 0);
+        if (!virq) {
+                pr_debug("irq: -> virq allocation failed\n");
+                return 0;
+        }
+
+        if (irq_setup_virq(domain, virq, hwirq)) {
+                if (domain->revmap_type != IRQ_DOMAIN_MAP_LEGACY)
+                        irq_free_desc(virq);
+                return 0;
+        }
+
+        pr_debug("irq: irq %lu on domain %s mapped to virtual irq %u\n",
+                hwirq, domain->of_node ? domain->of_node->full_name : "null", virq);
+
+        return virq;
+}
+EXPORT_SYMBOL_GPL(irq_create_mapping);
+
 unsigned int irq_create_of_mapping(struct device_node *controller,
                                    const u32 *intspec, unsigned int intsize)
 {
         struct irq_domain *domain;
-        unsigned long hwirq;
-        unsigned int irq, type;
-        int rc = -EINVAL;
+        irq_hw_number_t hwirq;
+        unsigned int type = IRQ_TYPE_NONE;
+        unsigned int virq;
 
-        /* Find a domain which can translate the irq spec */
-        mutex_lock(&irq_domain_mutex);
-        list_for_each_entry(domain, &irq_domain_list, list) {
-                if (!domain->ops->dt_translate)
-                        continue;
-                rc = domain->ops->dt_translate(domain, controller,
-                                        intspec, intsize, &hwirq, &type);
-                if (rc == 0)
-                        break;
+        domain = controller ? irq_find_host(controller) : irq_default_domain;
+        if (!domain) {
+#ifdef CONFIG_MIPS
+                /*
+                 * Workaround to avoid breaking interrupt controller drivers
+                 * that don't yet register an irq_domain.  This is temporary
+                 * code. ~~~gcl, Feb 24, 2012
+                 *
+                 * Scheduled for removal in Linux v3.6.  That should be enough
+                 * time.
+                 */
+                if (intsize > 0)
+                        return intspec[0];
+#endif
+                printk(KERN_WARNING "irq: no irq domain found for %s !\n",
+                       controller->full_name);
+                return 0;
         }
-        mutex_unlock(&irq_domain_mutex);
 
-        if (rc != 0)
-                return 0;
+        /* If domain has no translation, then we assume interrupt line */
+        if (domain->ops->xlate == NULL)
+                hwirq = intspec[0];
+        else {
+                if (domain->ops->xlate(domain, controller, intspec, intsize,
+                                     &hwirq, &type))
+                        return 0;
+        }
+
+        /* Create mapping */
+        virq = irq_create_mapping(domain, hwirq);
+        if (!virq)
+                return virq;
 
-        irq = irq_domain_to_irq(domain, hwirq);
-        if (type != IRQ_TYPE_NONE)
-                irq_set_irq_type(irq, type);
-        pr_debug("%s: mapped hwirq=%i to irq=%i, flags=%x\n",
-                 controller->full_name, (int)hwirq, irq, type);
-        return irq;
+        /* Set type if specified and different than the current one */
+        if (type != IRQ_TYPE_NONE &&
+            type != (irqd_get_trigger_type(irq_get_irq_data(virq))))
+                irq_set_irq_type(virq, type);
+        return virq;
 }
 EXPORT_SYMBOL_GPL(irq_create_of_mapping);
 
 /**
- * irq_dispose_mapping() - Discard a mapping created by irq_create_of_mapping()
- * @irq: linux irq number to be discarded
+ * irq_dispose_mapping() - Unmap an interrupt
+ * @virq: linux irq number of the interrupt to unmap
+ */
+void irq_dispose_mapping(unsigned int virq)
+{
+        struct irq_data *irq_data = irq_get_irq_data(virq);
+        struct irq_domain *domain;
+        irq_hw_number_t hwirq;
+
+        if (!virq || !irq_data)
+                return;
+
+        domain = irq_data->domain;
+        if (WARN_ON(domain == NULL))
+                return;
+
+        /* Never unmap legacy interrupts */
+        if (domain->revmap_type == IRQ_DOMAIN_MAP_LEGACY)
+                return;
+
+        irq_set_status_flags(virq, IRQ_NOREQUEST);
+
+        /* remove chip and handler */
+        irq_set_chip_and_handler(virq, NULL, NULL);
+
+        /* Make sure it's completed */
+        synchronize_irq(virq);
+
+        /* Tell the PIC about it */
+        if (domain->ops->unmap)
+                domain->ops->unmap(domain, virq);
+        smp_mb();
+
+        /* Clear reverse map */
+        hwirq = irq_data->hwirq;
+        switch(domain->revmap_type) {
+        case IRQ_DOMAIN_MAP_LINEAR:
+                if (hwirq < domain->revmap_data.linear.size)
+                        domain->revmap_data.linear.revmap[hwirq] = 0;
+                break;
+        case IRQ_DOMAIN_MAP_TREE:
+                mutex_lock(&revmap_trees_mutex);
+                radix_tree_delete(&domain->revmap_data.tree, hwirq);
+                mutex_unlock(&revmap_trees_mutex);
+                break;
+        }
+
+        irq_free_desc(virq);
+}
+EXPORT_SYMBOL_GPL(irq_dispose_mapping);
+
+/**
+ * irq_find_mapping() - Find a linux irq from an hw irq number.
+ * @domain: domain owning this hardware interrupt
+ * @hwirq: hardware irq number in that domain space
+ *
+ * This is a slow path, for use by generic code. It's expected that an
+ * irq controller implementation directly calls the appropriate low level
+ * mapping function.
+ */
+unsigned int irq_find_mapping(struct irq_domain *domain,
+                              irq_hw_number_t hwirq)
+{
+        unsigned int i;
+        unsigned int hint = hwirq % irq_virq_count;
+
+        /* Look for default domain if nececssary */
+        if (domain == NULL)
+                domain = irq_default_domain;
+        if (domain == NULL)
+                return 0;
+
+        /* legacy -> bail early */
+        if (domain->revmap_type == IRQ_DOMAIN_MAP_LEGACY)
+                return irq_domain_legacy_revmap(domain, hwirq);
+
+        /* Slow path does a linear search of the map */
+        if (hint == 0)
+                hint = 1;
+        i = hint;
+        do {
+                struct irq_data *data = irq_get_irq_data(i);
+                if (data && (data->domain == domain) && (data->hwirq == hwirq))
+                        return i;
+                i++;
+                if (i >= irq_virq_count)
+                        i = 1;
+        } while(i != hint);
+        return 0;
+}
+EXPORT_SYMBOL_GPL(irq_find_mapping);
+
+/**
+ * irq_radix_revmap_lookup() - Find a linux irq from a hw irq number.
+ * @domain: domain owning this hardware interrupt
+ * @hwirq: hardware irq number in that domain space
  *
- * Calling this function indicates the caller no longer needs a reference to
- * the linux irq number returned by a prior call to irq_create_of_mapping().
+ * This is a fast path, for use by irq controller code that uses radix tree
+ * revmaps
  */
-void irq_dispose_mapping(unsigned int irq)
+unsigned int irq_radix_revmap_lookup(struct irq_domain *domain,
+                                     irq_hw_number_t hwirq)
 {
+        struct irq_data *irq_data;
+
+        if (WARN_ON_ONCE(domain->revmap_type != IRQ_DOMAIN_MAP_TREE))
+                return irq_find_mapping(domain, hwirq);
+
+        /*
+         * Freeing an irq can delete nodes along the path to
+         * do the lookup via call_rcu.
+         */
+        rcu_read_lock();
+        irq_data = radix_tree_lookup(&domain->revmap_data.tree, hwirq);
+        rcu_read_unlock();
+
         /*
-         * nothing yet; will be filled when support for dynamic allocation of
-         * irq_descs is added to irq_domain
+         * If found in radix tree, then fine.
+         * Else fallback to linear lookup - this should not happen in practice
+         * as it means that we failed to insert the node in the radix tree.
          */
+        return irq_data ? irq_data->irq : irq_find_mapping(domain, hwirq);
 }
-EXPORT_SYMBOL_GPL(irq_dispose_mapping);
 
-int irq_domain_simple_dt_translate(struct irq_domain *d,
-                            struct device_node *controller,
-                            const u32 *intspec, unsigned int intsize,
-                            unsigned long *out_hwirq, unsigned int *out_type)
+/**
+ * irq_radix_revmap_insert() - Insert a hw irq to linux irq number mapping.
+ * @domain: domain owning this hardware interrupt
+ * @virq: linux irq number
+ * @hwirq: hardware irq number in that domain space
+ *
+ * This is for use by irq controllers that use a radix tree reverse
+ * mapping for fast lookup.
+ */
+void irq_radix_revmap_insert(struct irq_domain *domain, unsigned int virq,
+                             irq_hw_number_t hwirq)
 {
-        if (d->of_node != controller)
-                return -EINVAL;
-        if (intsize < 1)
-                return -EINVAL;
-        if (d->nr_irq && ((intspec[0] < d->hwirq_base) ||
-            (intspec[0] >= d->hwirq_base + d->nr_irq)))
-                return -EINVAL;
+        struct irq_data *irq_data = irq_get_irq_data(virq);
+
+        if (WARN_ON(domain->revmap_type != IRQ_DOMAIN_MAP_TREE))
+                return;
+
+        if (virq) {
+                mutex_lock(&revmap_trees_mutex);
+                radix_tree_insert(&domain->revmap_data.tree, hwirq, irq_data);
+                mutex_unlock(&revmap_trees_mutex);
+        }
+}
+
+/**
+ * irq_linear_revmap() - Find a linux irq from a hw irq number.
+ * @domain: domain owning this hardware interrupt
+ * @hwirq: hardware irq number in that domain space
+ *
+ * This is a fast path, for use by irq controller code that uses linear
+ * revmaps. It does fallback to the slow path if the revmap doesn't exist
+ * yet and will create the revmap entry with appropriate locking
+ */
+unsigned int irq_linear_revmap(struct irq_domain *domain,
+                               irq_hw_number_t hwirq)
+{
+        unsigned int *revmap;
+
+        if (WARN_ON_ONCE(domain->revmap_type != IRQ_DOMAIN_MAP_LINEAR))
+                return irq_find_mapping(domain, hwirq);
+
+        /* Check revmap bounds */
+        if (unlikely(hwirq >= domain->revmap_data.linear.size))
+                return irq_find_mapping(domain, hwirq);
+
+        /* Check if revmap was allocated */
+        revmap = domain->revmap_data.linear.revmap;
+        if (unlikely(revmap == NULL))
+                return irq_find_mapping(domain, hwirq);
+
+        /* Fill up revmap with slow path if no mapping found */
+        if (unlikely(!revmap[hwirq]))
+                revmap[hwirq] = irq_find_mapping(domain, hwirq);
+
+        return revmap[hwirq];
+}
+
+#ifdef CONFIG_VIRQ_DEBUG
+static int virq_debug_show(struct seq_file *m, void *private)
+{
+        unsigned long flags;
+        struct irq_desc *desc;
+        const char *p;
+        static const char none[] = "none";
+        void *data;
+        int i;
+
+        seq_printf(m, "%-5s  %-7s  %-15s  %-18s  %s\n", "virq", "hwirq",
+                      "chip name", "chip data", "domain name");
+
+        for (i = 1; i < nr_irqs; i++) {
+                desc = irq_to_desc(i);
+                if (!desc)
+                        continue;
+
+                raw_spin_lock_irqsave(&desc->lock, flags);
+
+                if (desc->action && desc->action->handler) {
+                        struct irq_chip *chip;
+
+                        seq_printf(m, "%5d  ", i);
+                        seq_printf(m, "0x%05lx  ", desc->irq_data.hwirq);
+
+                        chip = irq_desc_get_chip(desc);
+                        if (chip && chip->name)
+                                p = chip->name;
+                        else
+                                p = none;
+                        seq_printf(m, "%-15s  ", p);
+
+                        data = irq_desc_get_chip_data(desc);
+                        seq_printf(m, "0x%16p  ", data);
+
+                        if (desc->irq_data.domain->of_node)
+                                p = desc->irq_data.domain->of_node->full_name;
+                        else
+                                p = none;
+                        seq_printf(m, "%s\n", p);
+                }
+
+                raw_spin_unlock_irqrestore(&desc->lock, flags);
+        }
+
+        return 0;
+}
 
+static int virq_debug_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, virq_debug_show, inode->i_private);
+}
+
+static const struct file_operations virq_debug_fops = {
+        .open = virq_debug_open,
+        .read = seq_read,
+        .llseek = seq_lseek,
+        .release = single_release,
+};
+
+static int __init irq_debugfs_init(void)
+{
+        if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root,
+                                 NULL, &virq_debug_fops) == NULL)
+                return -ENOMEM;
+
+        return 0;
+}
+__initcall(irq_debugfs_init);
+#endif /* CONFIG_VIRQ_DEBUG */
+
+int irq_domain_simple_map(struct irq_domain *d, unsigned int irq,
+                          irq_hw_number_t hwirq)
+{
+        return 0;
+}
+
+/**
+ * irq_domain_xlate_onecell() - Generic xlate for direct one cell bindings
+ *
+ * Device Tree IRQ specifier translation function which works with one cell
+ * bindings where the cell value maps directly to the hwirq number.
+ */
+int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr,
+                             const u32 *intspec, unsigned int intsize,
+                             unsigned long *out_hwirq, unsigned int *out_type)
+{
+        if (WARN_ON(intsize < 1))
+                return -EINVAL;
         *out_hwirq = intspec[0];
         *out_type = IRQ_TYPE_NONE;
-        if (intsize > 1)
-                *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
         return 0;
 }
+EXPORT_SYMBOL_GPL(irq_domain_xlate_onecell);
 
 /**
- * irq_domain_create_simple() - Set up a 'simple' translation range
+ * irq_domain_xlate_twocell() - Generic xlate for direct two cell bindings
+ *
+ * Device Tree IRQ specifier translation function which works with two cell
+ * bindings where the cell values map directly to the hwirq number
+ * and linux irq flags.
  */
-void irq_domain_add_simple(struct device_node *controller, int irq_base)
+int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr,
+                        const u32 *intspec, unsigned int intsize,
+                        irq_hw_number_t *out_hwirq, unsigned int *out_type)
 {
-        struct irq_domain *domain;
-
-        domain = kzalloc(sizeof(*domain), GFP_KERNEL);
-        if (!domain) {
-                WARN_ON(1);
-                return;
-        }
+        if (WARN_ON(intsize < 2))
+                return -EINVAL;
+        *out_hwirq = intspec[0];
+        *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
+        return 0;
+}
+EXPORT_SYMBOL_GPL(irq_domain_xlate_twocell);
 
-        domain->irq_base = irq_base;
-        domain->of_node = of_node_get(controller);
-        domain->ops = &irq_domain_simple_ops;
-        irq_domain_add(domain);
+/**
+ * irq_domain_xlate_onetwocell() - Generic xlate for one or two cell bindings
+ *
+ * Device Tree IRQ specifier translation function which works with either one
+ * or two cell bindings where the cell values map directly to the hwirq number
+ * and linux irq flags.
+ *
+ * Note: don't use this function unless your interrupt controller explicitly
+ * supports both one and two cell bindings.  For the majority of controllers
+ * the _onecell() or _twocell() variants above should be used.
+ */
+int irq_domain_xlate_onetwocell(struct irq_domain *d,
+                                struct device_node *ctrlr,
+                                const u32 *intspec, unsigned int intsize,
+                                unsigned long *out_hwirq, unsigned int *out_type)
+{
+        if (WARN_ON(intsize < 1))
+                return -EINVAL;
+        *out_hwirq = intspec[0];
+        *out_type = (intsize > 1) ? intspec[1] : IRQ_TYPE_NONE;
+        return 0;
 }
-EXPORT_SYMBOL_GPL(irq_domain_add_simple);
+EXPORT_SYMBOL_GPL(irq_domain_xlate_onetwocell);
 
+const struct irq_domain_ops irq_domain_simple_ops = {
+        .map = irq_domain_simple_map,
+        .xlate = irq_domain_xlate_onetwocell,
+};
+EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
+
+#ifdef CONFIG_OF_IRQ
 void irq_domain_generate_simple(const struct of_device_id *match,
                                 u64 phys_base, unsigned int irq_start)
 {
         struct device_node *node;
-        pr_info("looking for phys_base=%llx, irq_start=%i\n",
+        pr_debug("looking for phys_base=%llx, irq_start=%i\n",
                 (unsigned long long) phys_base, (int) irq_start);
         node = of_find_matching_node_by_address(NULL, match, phys_base);
         if (node)
-                irq_domain_add_simple(node, irq_start);
-        else
-                pr_info("no node found\n");
+                irq_domain_add_legacy(node, 32, irq_start, 0,
+                                      &irq_domain_simple_ops, NULL);
 }
 EXPORT_SYMBOL_GPL(irq_domain_generate_simple);
-#endif /* CONFIG_OF_IRQ */
-
-struct irq_domain_ops irq_domain_simple_ops = {
-#ifdef CONFIG_OF_IRQ
-        .dt_translate = irq_domain_simple_dt_translate,
-#endif /* CONFIG_OF_IRQ */
-};
-EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
+#endif