diff options
-rw-r--r-- | arch/arm/mach-shmobile/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/board-lager-reference.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/board-lager.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7790.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/r8a7790.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/rcar-gen2.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/setup-r8a7790.c | 68 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/setup-rcar-gen2.c | 91 |
8 files changed, 106 insertions, 74 deletions
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index d30ec1a427ec..6b7a02ee8b93 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile | |||
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o | |||
15 | obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o | 15 | obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o |
16 | obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o | 16 | obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o |
17 | obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o | 17 | obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o |
18 | obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o setup-rcar-gen2.o | ||
18 | obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o | 19 | obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o |
19 | obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o | 20 | obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o |
20 | 21 | ||
diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c index d39a91b3ba48..1a1a4a888632 100644 --- a/arch/arm/mach-shmobile/board-lager-reference.c +++ b/arch/arm/mach-shmobile/board-lager-reference.c | |||
@@ -40,7 +40,7 @@ static const char *lager_boards_compat_dt[] __initdata = { | |||
40 | DT_MACHINE_START(LAGER_DT, "lager") | 40 | DT_MACHINE_START(LAGER_DT, "lager") |
41 | .smp = smp_ops(r8a7790_smp_ops), | 41 | .smp = smp_ops(r8a7790_smp_ops), |
42 | .init_early = r8a7790_init_early, | 42 | .init_early = r8a7790_init_early, |
43 | .init_time = rcar_gen2_timer_init, | ||
43 | .init_machine = lager_add_standard_devices, | 44 | .init_machine = lager_add_standard_devices, |
44 | .init_time = r8a7790_timer_init, | ||
45 | .dt_compat = lager_boards_compat_dt, | 45 | .dt_compat = lager_boards_compat_dt, |
46 | MACHINE_END | 46 | MACHINE_END |
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c index ef3baaa79e6d..230bc9d67852 100644 --- a/arch/arm/mach-shmobile/board-lager.c +++ b/arch/arm/mach-shmobile/board-lager.c | |||
@@ -163,7 +163,7 @@ static const char *lager_boards_compat_dt[] __initdata = { | |||
163 | DT_MACHINE_START(LAGER_DT, "lager") | 163 | DT_MACHINE_START(LAGER_DT, "lager") |
164 | .smp = smp_ops(r8a7790_smp_ops), | 164 | .smp = smp_ops(r8a7790_smp_ops), |
165 | .init_early = r8a7790_init_early, | 165 | .init_early = r8a7790_init_early, |
166 | .init_time = r8a7790_timer_init, | 166 | .init_time = rcar_gen2_timer_init, |
167 | .init_machine = lager_add_standard_devices, | 167 | .init_machine = lager_add_standard_devices, |
168 | .dt_compat = lager_boards_compat_dt, | 168 | .dt_compat = lager_boards_compat_dt, |
169 | MACHINE_END | 169 | MACHINE_END |
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index 7661e898f376..a64f965c7da1 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c | |||
@@ -310,7 +310,7 @@ static struct clk_lookup lookups[] = { | |||
310 | 310 | ||
311 | void __init r8a7790_clock_init(void) | 311 | void __init r8a7790_clock_init(void) |
312 | { | 312 | { |
313 | u32 mode = r8a7790_read_mode_pins(); | 313 | u32 mode = rcar_gen2_read_mode_pins(); |
314 | int k, ret = 0; | 314 | int k, ret = 0; |
315 | 315 | ||
316 | switch (mode & (MD(14) | MD(13))) { | 316 | switch (mode & (MD(14) | MD(13))) { |
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h index 79e731c83e50..5fbfa28b40b6 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h | |||
@@ -1,15 +1,13 @@ | |||
1 | #ifndef __ASM_R8A7790_H__ | 1 | #ifndef __ASM_R8A7790_H__ |
2 | #define __ASM_R8A7790_H__ | 2 | #define __ASM_R8A7790_H__ |
3 | 3 | ||
4 | #include <mach/rcar-gen2.h> | ||
5 | |||
4 | void r8a7790_add_standard_devices(void); | 6 | void r8a7790_add_standard_devices(void); |
5 | void r8a7790_add_dt_devices(void); | 7 | void r8a7790_add_dt_devices(void); |
6 | void r8a7790_clock_init(void); | 8 | void r8a7790_clock_init(void); |
7 | void r8a7790_pinmux_init(void); | 9 | void r8a7790_pinmux_init(void); |
8 | void r8a7790_init_early(void); | 10 | void r8a7790_init_early(void); |
9 | void r8a7790_timer_init(void); | ||
10 | extern struct smp_operations r8a7790_smp_ops; | 11 | extern struct smp_operations r8a7790_smp_ops; |
11 | 12 | ||
12 | #define MD(nr) BIT(nr) | ||
13 | u32 r8a7790_read_mode_pins(void); | ||
14 | |||
15 | #endif /* __ASM_R8A7790_H__ */ | 13 | #endif /* __ASM_R8A7790_H__ */ |
diff --git a/arch/arm/mach-shmobile/include/mach/rcar-gen2.h b/arch/arm/mach-shmobile/include/mach/rcar-gen2.h new file mode 100644 index 000000000000..43f606eb2d82 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/rcar-gen2.h | |||
@@ -0,0 +1,8 @@ | |||
1 | #ifndef __ASM_RCAR_GEN2_H__ | ||
2 | #define __ASM_RCAR_GEN2_H__ | ||
3 | |||
4 | void rcar_gen2_timer_init(void); | ||
5 | #define MD(nr) BIT(nr) | ||
6 | u32 rcar_gen2_read_mode_pins(void); | ||
7 | |||
8 | #endif /* __ASM_RCAR_GEN2_H__ */ | ||
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index c7e24eff9ba2..c47bcebbcb00 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c | |||
@@ -18,7 +18,6 @@ | |||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <linux/clocksource.h> | ||
22 | #include <linux/irq.h> | 21 | #include <linux/irq.h> |
23 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
24 | #include <linux/of_platform.h> | 23 | #include <linux/of_platform.h> |
@@ -203,71 +202,6 @@ void __init r8a7790_add_standard_devices(void) | |||
203 | r8a7790_register_thermal(); | 202 | r8a7790_register_thermal(); |
204 | } | 203 | } |
205 | 204 | ||
206 | #define MODEMR 0xe6160060 | ||
207 | |||
208 | u32 __init r8a7790_read_mode_pins(void) | ||
209 | { | ||
210 | void __iomem *modemr = ioremap_nocache(MODEMR, 4); | ||
211 | u32 mode; | ||
212 | |||
213 | BUG_ON(!modemr); | ||
214 | mode = ioread32(modemr); | ||
215 | iounmap(modemr); | ||
216 | |||
217 | return mode; | ||
218 | } | ||
219 | |||
220 | #define CNTCR 0 | ||
221 | #define CNTFID0 0x20 | ||
222 | |||
223 | void __init r8a7790_timer_init(void) | ||
224 | { | ||
225 | #ifdef CONFIG_ARM_ARCH_TIMER | ||
226 | u32 mode = r8a7790_read_mode_pins(); | ||
227 | void __iomem *base; | ||
228 | int extal_mhz = 0; | ||
229 | u32 freq; | ||
230 | |||
231 | /* At Linux boot time the r8a7790 arch timer comes up | ||
232 | * with the counter disabled. Moreover, it may also report | ||
233 | * a potentially incorrect fixed 13 MHz frequency. To be | ||
234 | * correct these registers need to be updated to use the | ||
235 | * frequency EXTAL / 2 which can be determined by the MD pins. | ||
236 | */ | ||
237 | |||
238 | switch (mode & (MD(14) | MD(13))) { | ||
239 | case 0: | ||
240 | extal_mhz = 15; | ||
241 | break; | ||
242 | case MD(13): | ||
243 | extal_mhz = 20; | ||
244 | break; | ||
245 | case MD(14): | ||
246 | extal_mhz = 26; | ||
247 | break; | ||
248 | case MD(13) | MD(14): | ||
249 | extal_mhz = 30; | ||
250 | break; | ||
251 | } | ||
252 | |||
253 | /* The arch timer frequency equals EXTAL / 2 */ | ||
254 | freq = extal_mhz * (1000000 / 2); | ||
255 | |||
256 | /* Remap "armgcnt address map" space */ | ||
257 | base = ioremap(0xe6080000, PAGE_SIZE); | ||
258 | |||
259 | /* Update registers with correct frequency */ | ||
260 | iowrite32(freq, base + CNTFID0); | ||
261 | asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); | ||
262 | |||
263 | /* make sure arch timer is started by setting bit 0 of CNTCR */ | ||
264 | iowrite32(1, base + CNTCR); | ||
265 | iounmap(base); | ||
266 | #endif /* CONFIG_ARM_ARCH_TIMER */ | ||
267 | |||
268 | clocksource_of_init(); | ||
269 | } | ||
270 | |||
271 | void __init r8a7790_init_early(void) | 205 | void __init r8a7790_init_early(void) |
272 | { | 206 | { |
273 | #ifndef CONFIG_ARM_ARCH_TIMER | 207 | #ifndef CONFIG_ARM_ARCH_TIMER |
@@ -285,7 +219,7 @@ static const char * const r8a7790_boards_compat_dt[] __initconst = { | |||
285 | DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") | 219 | DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") |
286 | .smp = smp_ops(r8a7790_smp_ops), | 220 | .smp = smp_ops(r8a7790_smp_ops), |
287 | .init_early = r8a7790_init_early, | 221 | .init_early = r8a7790_init_early, |
288 | .init_time = r8a7790_timer_init, | 222 | .init_time = rcar_gen2_timer_init, |
289 | .dt_compat = r8a7790_boards_compat_dt, | 223 | .dt_compat = r8a7790_boards_compat_dt, |
290 | MACHINE_END | 224 | MACHINE_END |
291 | #endif /* CONFIG_USE_OF */ | 225 | #endif /* CONFIG_USE_OF */ |
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c new file mode 100644 index 000000000000..5734c24bf6c7 --- /dev/null +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c | |||
@@ -0,0 +1,91 @@ | |||
1 | /* | ||
2 | * R-Car Generation 2 support | ||
3 | * | ||
4 | * Copyright (C) 2013 Renesas Solutions Corp. | ||
5 | * Copyright (C) 2013 Magnus Damm | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/clocksource.h> | ||
22 | #include <linux/io.h> | ||
23 | #include <linux/kernel.h> | ||
24 | #include <mach/common.h> | ||
25 | #include <mach/rcar-gen2.h> | ||
26 | #include <asm/mach/arch.h> | ||
27 | |||
28 | #define MODEMR 0xe6160060 | ||
29 | |||
30 | u32 __init rcar_gen2_read_mode_pins(void) | ||
31 | { | ||
32 | void __iomem *modemr = ioremap_nocache(MODEMR, 4); | ||
33 | u32 mode; | ||
34 | |||
35 | BUG_ON(!modemr); | ||
36 | mode = ioread32(modemr); | ||
37 | iounmap(modemr); | ||
38 | |||
39 | return mode; | ||
40 | } | ||
41 | |||
42 | #define CNTCR 0 | ||
43 | #define CNTFID0 0x20 | ||
44 | |||
45 | void __init rcar_gen2_timer_init(void) | ||
46 | { | ||
47 | #ifdef CONFIG_ARM_ARCH_TIMER | ||
48 | u32 mode = rcar_gen2_read_mode_pins(); | ||
49 | void __iomem *base; | ||
50 | int extal_mhz = 0; | ||
51 | u32 freq; | ||
52 | |||
53 | /* At Linux boot time the r8a7790 arch timer comes up | ||
54 | * with the counter disabled. Moreover, it may also report | ||
55 | * a potentially incorrect fixed 13 MHz frequency. To be | ||
56 | * correct these registers need to be updated to use the | ||
57 | * frequency EXTAL / 2 which can be determined by the MD pins. | ||
58 | */ | ||
59 | |||
60 | switch (mode & (MD(14) | MD(13))) { | ||
61 | case 0: | ||
62 | extal_mhz = 15; | ||
63 | break; | ||
64 | case MD(13): | ||
65 | extal_mhz = 20; | ||
66 | break; | ||
67 | case MD(14): | ||
68 | extal_mhz = 26; | ||
69 | break; | ||
70 | case MD(13) | MD(14): | ||
71 | extal_mhz = 30; | ||
72 | break; | ||
73 | } | ||
74 | |||
75 | /* The arch timer frequency equals EXTAL / 2 */ | ||
76 | freq = extal_mhz * (1000000 / 2); | ||
77 | |||
78 | /* Remap "armgcnt address map" space */ | ||
79 | base = ioremap(0xe6080000, PAGE_SIZE); | ||
80 | |||
81 | /* Update registers with correct frequency */ | ||
82 | iowrite32(freq, base + CNTFID0); | ||
83 | asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); | ||
84 | |||
85 | /* make sure arch timer is started by setting bit 0 of CNTCR */ | ||
86 | iowrite32(1, base + CNTCR); | ||
87 | iounmap(base); | ||
88 | #endif /* CONFIG_ARM_ARCH_TIMER */ | ||
89 | |||
90 | clocksource_of_init(); | ||
91 | } | ||