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-rw-r--r--arch/arm/mach-omap1/mcbsp.c37
-rw-r--r--arch/arm/mach-omap2/mcbsp.c147
-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h39
-rw-r--r--arch/arm/plat-omap/mcbsp.c403
4 files changed, 403 insertions, 223 deletions
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index afb5789f94f9..7de7c6915584 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -103,30 +103,6 @@ static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
103{ } 103{ }
104#endif 104#endif
105 105
106static int omap1_mcbsp_check(unsigned int id)
107{
108 /* REVISIT: Check correctly for number of registered McBSPs */
109 if (cpu_is_omap730()) {
110 if (id > OMAP_MAX_MCBSP_COUNT - 2) {
111 printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n",
112 id + 1);
113 return -ENODEV;
114 }
115 return 0;
116 }
117
118 if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
119 if (id > OMAP_MAX_MCBSP_COUNT - 1) {
120 printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n",
121 id + 1);
122 return -ENODEV;
123 }
124 return 0;
125 }
126
127 return -ENODEV;
128}
129
130static void omap1_mcbsp_request(unsigned int id) 106static void omap1_mcbsp_request(unsigned int id)
131{ 107{
132 /* 108 /*
@@ -151,7 +127,6 @@ static void omap1_mcbsp_free(unsigned int id)
151} 127}
152 128
153static struct omap_mcbsp_ops omap1_mcbsp_ops = { 129static struct omap_mcbsp_ops omap1_mcbsp_ops = {
154 .check = omap1_mcbsp_check,
155 .request = omap1_mcbsp_request, 130 .request = omap1_mcbsp_request,
156 .free = omap1_mcbsp_free, 131 .free = omap1_mcbsp_free,
157}; 132};
@@ -263,6 +238,18 @@ int __init omap1_mcbsp_init(void)
263 } 238 }
264 239
265 if (cpu_is_omap730()) 240 if (cpu_is_omap730())
241 omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
242 if (cpu_is_omap15xx())
243 omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ;
244 if (cpu_is_omap16xx())
245 omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ;
246
247 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
248 GFP_KERNEL);
249 if (!mcbsp_ptr)
250 return -ENOMEM;
251
252 if (cpu_is_omap730())
266 omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata, 253 omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata,
267 OMAP730_MCBSP_PDATA_SZ); 254 OMAP730_MCBSP_PDATA_SZ);
268 255
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 709db03b9999..cae3ebe249b3 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -89,6 +89,30 @@ static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
89 .disable = omap_mcbsp_clk_disable, 89 .disable = omap_mcbsp_clk_disable,
90 }, 90 },
91 }, 91 },
92 {
93 .clk = {
94 .name = "mcbsp_clk",
95 .id = 3,
96 .enable = omap_mcbsp_clk_enable,
97 .disable = omap_mcbsp_clk_disable,
98 },
99 },
100 {
101 .clk = {
102 .name = "mcbsp_clk",
103 .id = 4,
104 .enable = omap_mcbsp_clk_enable,
105 .disable = omap_mcbsp_clk_disable,
106 },
107 },
108 {
109 .clk = {
110 .name = "mcbsp_clk",
111 .id = 5,
112 .enable = omap_mcbsp_clk_enable,
113 .disable = omap_mcbsp_clk_disable,
114 },
115 },
92}; 116};
93 117
94#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) 118#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
@@ -117,22 +141,12 @@ static void omap2_mcbsp_request(unsigned int id)
117 omap2_mcbsp2_mux_setup(); 141 omap2_mcbsp2_mux_setup();
118} 142}
119 143
120static int omap2_mcbsp_check(unsigned int id)
121{
122 if (id > OMAP_MAX_MCBSP_COUNT - 1) {
123 printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1);
124 return -ENODEV;
125 }
126 return 0;
127}
128
129static struct omap_mcbsp_ops omap2_mcbsp_ops = { 144static struct omap_mcbsp_ops omap2_mcbsp_ops = {
130 .request = omap2_mcbsp_request, 145 .request = omap2_mcbsp_request,
131 .check = omap2_mcbsp_check,
132}; 146};
133 147
134#ifdef CONFIG_ARCH_OMAP24XX 148#ifdef CONFIG_ARCH_OMAP2420
135static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { 149static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
136 { 150 {
137 .phys_base = OMAP24XX_MCBSP1_BASE, 151 .phys_base = OMAP24XX_MCBSP1_BASE,
138 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, 152 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
@@ -152,10 +166,64 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
152 .clk_name = "mcbsp_clk", 166 .clk_name = "mcbsp_clk",
153 }, 167 },
154}; 168};
155#define OMAP24XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap24xx_mcbsp_pdata) 169#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
156#else 170#else
157#define omap24xx_mcbsp_pdata NULL 171#define omap2420_mcbsp_pdata NULL
158#define OMAP24XX_MCBSP_PDATA_SZ 0 172#define OMAP2420_MCBSP_PDATA_SZ 0
173#endif
174
175#ifdef CONFIG_ARCH_OMAP2430
176static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
177 {
178 .phys_base = OMAP24XX_MCBSP1_BASE,
179 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
180 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
181 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
182 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
183 .ops = &omap2_mcbsp_ops,
184 .clk_name = "mcbsp_clk",
185 },
186 {
187 .phys_base = OMAP24XX_MCBSP2_BASE,
188 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
189 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
190 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
191 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
192 .ops = &omap2_mcbsp_ops,
193 .clk_name = "mcbsp_clk",
194 },
195 {
196 .phys_base = OMAP2430_MCBSP3_BASE,
197 .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
198 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
199 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
200 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
201 .ops = &omap2_mcbsp_ops,
202 .clk_name = "mcbsp_clk",
203 },
204 {
205 .phys_base = OMAP2430_MCBSP4_BASE,
206 .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
207 .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
208 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
209 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
210 .ops = &omap2_mcbsp_ops,
211 .clk_name = "mcbsp_clk",
212 },
213 {
214 .phys_base = OMAP2430_MCBSP5_BASE,
215 .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
216 .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
217 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
218 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
219 .ops = &omap2_mcbsp_ops,
220 .clk_name = "mcbsp_clk",
221 },
222};
223#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
224#else
225#define omap2430_mcbsp_pdata NULL
226#define OMAP2430_MCBSP_PDATA_SZ 0
159#endif 227#endif
160 228
161#ifdef CONFIG_ARCH_OMAP34XX 229#ifdef CONFIG_ARCH_OMAP34XX
@@ -178,6 +246,33 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
178 .ops = &omap2_mcbsp_ops, 246 .ops = &omap2_mcbsp_ops,
179 .clk_name = "mcbsp_clk", 247 .clk_name = "mcbsp_clk",
180 }, 248 },
249 {
250 .phys_base = OMAP34XX_MCBSP3_BASE,
251 .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
252 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
253 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
254 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
255 .ops = &omap2_mcbsp_ops,
256 .clk_name = "mcbsp_clk",
257 },
258 {
259 .phys_base = OMAP34XX_MCBSP4_BASE,
260 .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
261 .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
262 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
263 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
264 .ops = &omap2_mcbsp_ops,
265 .clk_name = "mcbsp_clk",
266 },
267 {
268 .phys_base = OMAP34XX_MCBSP5_BASE,
269 .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
270 .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
271 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
272 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
273 .ops = &omap2_mcbsp_ops,
274 .clk_name = "mcbsp_clk",
275 },
181}; 276};
182#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) 277#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
183#else 278#else
@@ -185,7 +280,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
185#define OMAP34XX_MCBSP_PDATA_SZ 0 280#define OMAP34XX_MCBSP_PDATA_SZ 0
186#endif 281#endif
187 282
188int __init omap2_mcbsp_init(void) 283static int __init omap2_mcbsp_init(void)
189{ 284{
190 int i; 285 int i;
191 286
@@ -195,10 +290,24 @@ int __init omap2_mcbsp_init(void)
195 clk_register(&omap_mcbsp_clks[i].clk); 290 clk_register(&omap_mcbsp_clks[i].clk);
196 } 291 }
197 292
198 if (cpu_is_omap24xx()) 293 if (cpu_is_omap2420())
199 omap_mcbsp_register_board_cfg(omap24xx_mcbsp_pdata, 294 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
200 OMAP24XX_MCBSP_PDATA_SZ); 295 if (cpu_is_omap2430())
296 omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
297 if (cpu_is_omap34xx())
298 omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
299
300 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
301 GFP_KERNEL);
302 if (!mcbsp_ptr)
303 return -ENOMEM;
201 304
305 if (cpu_is_omap2420())
306 omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
307 OMAP2420_MCBSP_PDATA_SZ);
308 if (cpu_is_omap2430())
309 omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
310 OMAP2430_MCBSP_PDATA_SZ);
202 if (cpu_is_omap34xx()) 311 if (cpu_is_omap34xx())
203 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, 312 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
204 OMAP34XX_MCBSP_PDATA_SZ); 313 OMAP34XX_MCBSP_PDATA_SZ);
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index c8d0aa118be7..6a0d1a0a24a7 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -43,9 +43,15 @@
43 43
44#define OMAP24XX_MCBSP1_BASE 0x48074000 44#define OMAP24XX_MCBSP1_BASE 0x48074000
45#define OMAP24XX_MCBSP2_BASE 0x48076000 45#define OMAP24XX_MCBSP2_BASE 0x48076000
46#define OMAP2430_MCBSP3_BASE 0x4808c000
47#define OMAP2430_MCBSP4_BASE 0x4808e000
48#define OMAP2430_MCBSP5_BASE 0x48096000
46 49
47#define OMAP34XX_MCBSP1_BASE 0x48074000 50#define OMAP34XX_MCBSP1_BASE 0x48074000
48#define OMAP34XX_MCBSP2_BASE 0x49022000 51#define OMAP34XX_MCBSP2_BASE 0x49022000
52#define OMAP34XX_MCBSP3_BASE 0x49024000
53#define OMAP34XX_MCBSP4_BASE 0x49026000
54#define OMAP34XX_MCBSP5_BASE 0x48096000
49 55
50#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) 56#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730)
51 57
@@ -81,9 +87,6 @@
81#define OMAP_MCBSP_REG_XCERG 0x3A 87#define OMAP_MCBSP_REG_XCERG 0x3A
82#define OMAP_MCBSP_REG_XCERH 0x3C 88#define OMAP_MCBSP_REG_XCERH 0x3C
83 89
84#define OMAP_MAX_MCBSP_COUNT 3
85#define MAX_MCBSP_CLOCKS 3
86
87#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) 90#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1)
88#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) 91#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1)
89 92
@@ -97,6 +100,8 @@
97#define OMAP_MCBSP_REG_DRR1 0x04 100#define OMAP_MCBSP_REG_DRR1 0x04
98#define OMAP_MCBSP_REG_DXR2 0x08 101#define OMAP_MCBSP_REG_DXR2 0x08
99#define OMAP_MCBSP_REG_DXR1 0x0C 102#define OMAP_MCBSP_REG_DXR1 0x0C
103#define OMAP_MCBSP_REG_DRR 0x00
104#define OMAP_MCBSP_REG_DXR 0x08
100#define OMAP_MCBSP_REG_SPCR2 0x10 105#define OMAP_MCBSP_REG_SPCR2 0x10
101#define OMAP_MCBSP_REG_SPCR1 0x14 106#define OMAP_MCBSP_REG_SPCR1 0x14
102#define OMAP_MCBSP_REG_RCR2 0x18 107#define OMAP_MCBSP_REG_RCR2 0x18
@@ -124,9 +129,9 @@
124#define OMAP_MCBSP_REG_RCERH 0x70 129#define OMAP_MCBSP_REG_RCERH 0x70
125#define OMAP_MCBSP_REG_XCERG 0x74 130#define OMAP_MCBSP_REG_XCERG 0x74
126#define OMAP_MCBSP_REG_XCERH 0x78 131#define OMAP_MCBSP_REG_XCERH 0x78
127 132#define OMAP_MCBSP_REG_SYSCON 0x8C
128#define OMAP_MAX_MCBSP_COUNT 2 133#define OMAP_MCBSP_REG_XCCR 0xAC
129#define MAX_MCBSP_CLOCKS 2 134#define OMAP_MCBSP_REG_RCCR 0xB0
130 135
131#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) 136#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1)
132#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) 137#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1)
@@ -137,10 +142,6 @@
137 142
138#endif 143#endif
139 144
140#define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg)
141#define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg)
142
143
144/************************** McBSP SPCR1 bit definitions ***********************/ 145/************************** McBSP SPCR1 bit definitions ***********************/
145#define RRST 0x0001 146#define RRST 0x0001
146#define RRDY 0x0002 147#define RRDY 0x0002
@@ -151,6 +152,7 @@
151#define DXENA 0x0080 152#define DXENA 0x0080
152#define CLKSTP(value) ((value)<<11) /* bits 11:12 */ 153#define CLKSTP(value) ((value)<<11) /* bits 11:12 */
153#define RJUST(value) ((value)<<13) /* bits 13:14 */ 154#define RJUST(value) ((value)<<13) /* bits 13:14 */
155#define ALB 0x8000
154#define DLB 0x8000 156#define DLB 0x8000
155 157
156/************************** McBSP SPCR2 bit definitions ***********************/ 158/************************** McBSP SPCR2 bit definitions ***********************/
@@ -228,6 +230,17 @@
228#define XPABLK(value) ((value)<<5) /* Bits 5:6 */ 230#define XPABLK(value) ((value)<<5) /* Bits 5:6 */
229#define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ 231#define XPBBLK(value) ((value)<<7) /* Bits 7:8 */
230 232
233/*********************** McBSP XCCR bit definitions *************************/
234#define DILB 0x0020
235#define XDMAEN 0x0008
236#define XDISABLE 0x0001
237
238/********************** McBSP RCCR bit definitions *************************/
239#define RDMAEN 0x0008
240#define RDISABLE 0x0001
241
242/********************** McBSP SYSCONFIG bit definitions ********************/
243#define SOFTRST 0x0002
231 244
232/* we don't do multichannel for now */ 245/* we don't do multichannel for now */
233struct omap_mcbsp_reg_cfg { 246struct omap_mcbsp_reg_cfg {
@@ -260,6 +273,8 @@ typedef enum {
260 OMAP_MCBSP1 = 0, 273 OMAP_MCBSP1 = 0,
261 OMAP_MCBSP2, 274 OMAP_MCBSP2,
262 OMAP_MCBSP3, 275 OMAP_MCBSP3,
276 OMAP_MCBSP4,
277 OMAP_MCBSP5
263} omap_mcbsp_id; 278} omap_mcbsp_id;
264 279
265typedef int __bitwise omap_mcbsp_io_type_t; 280typedef int __bitwise omap_mcbsp_io_type_t;
@@ -311,7 +326,6 @@ struct omap_mcbsp_spi_cfg {
311struct omap_mcbsp_ops { 326struct omap_mcbsp_ops {
312 void (*request)(unsigned int); 327 void (*request)(unsigned int);
313 void (*free)(unsigned int); 328 void (*free)(unsigned int);
314 int (*check)(unsigned int);
315}; 329};
316 330
317struct omap_mcbsp_platform_data { 331struct omap_mcbsp_platform_data {
@@ -353,6 +367,8 @@ struct omap_mcbsp {
353 struct omap_mcbsp_platform_data *pdata; 367 struct omap_mcbsp_platform_data *pdata;
354 struct clk *clk; 368 struct clk *clk;
355}; 369};
370extern struct omap_mcbsp **mcbsp_ptr;
371extern int omap_mcbsp_count;
356 372
357int omap_mcbsp_init(void); 373int omap_mcbsp_init(void);
358void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, 374void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
@@ -377,5 +393,6 @@ void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg *
377/* Polled read/write functions */ 393/* Polled read/write functions */
378int omap_mcbsp_pollread(unsigned int id, u16 * buf); 394int omap_mcbsp_pollread(unsigned int id, u16 * buf);
379int omap_mcbsp_pollwrite(unsigned int id, u16 buf); 395int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
396int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
380 397
381#endif 398#endif
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index e63990fd923f..af33fc713e1a 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -27,43 +27,65 @@
27#include <mach/dma.h> 27#include <mach/dma.h>
28#include <mach/mcbsp.h> 28#include <mach/mcbsp.h>
29 29
30static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT]; 30struct omap_mcbsp **mcbsp_ptr;
31int omap_mcbsp_count;
31 32
32#define omap_mcbsp_check_valid_id(id) (mcbsp[id].pdata && \ 33void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
33 mcbsp[id].pdata->ops && \ 34{
34 mcbsp[id].pdata->ops->check && \ 35 if (cpu_class_is_omap1() || cpu_is_omap2420())
35 (mcbsp[id].pdata->ops->check(id) == 0)) 36 __raw_writew((u16)val, io_base + reg);
37 else
38 __raw_writel(val, io_base + reg);
39}
40
41int omap_mcbsp_read(void __iomem *io_base, u16 reg)
42{
43 if (cpu_class_is_omap1() || cpu_is_omap2420())
44 return __raw_readw(io_base + reg);
45 else
46 return __raw_readl(io_base + reg);
47}
48
49#define OMAP_MCBSP_READ(base, reg) \
50 omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
51#define OMAP_MCBSP_WRITE(base, reg, val) \
52 omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
53
54#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
55#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
36 56
37static void omap_mcbsp_dump_reg(u8 id) 57static void omap_mcbsp_dump_reg(u8 id)
38{ 58{
39 dev_dbg(mcbsp[id].dev, "**** McBSP%d regs ****\n", mcbsp[id].id); 59 struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
40 dev_dbg(mcbsp[id].dev, "DRR2: 0x%04x\n", 60
41 OMAP_MCBSP_READ(mcbsp[id].io_base, DRR2)); 61 dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
42 dev_dbg(mcbsp[id].dev, "DRR1: 0x%04x\n", 62 dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n",
43 OMAP_MCBSP_READ(mcbsp[id].io_base, DRR1)); 63 OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
44 dev_dbg(mcbsp[id].dev, "DXR2: 0x%04x\n", 64 dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n",
45 OMAP_MCBSP_READ(mcbsp[id].io_base, DXR2)); 65 OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
46 dev_dbg(mcbsp[id].dev, "DXR1: 0x%04x\n", 66 dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n",
47 OMAP_MCBSP_READ(mcbsp[id].io_base, DXR1)); 67 OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
48 dev_dbg(mcbsp[id].dev, "SPCR2: 0x%04x\n", 68 dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n",
49 OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR2)); 69 OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
50 dev_dbg(mcbsp[id].dev, "SPCR1: 0x%04x\n", 70 dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
51 OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR1)); 71 OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
52 dev_dbg(mcbsp[id].dev, "RCR2: 0x%04x\n", 72 dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
53 OMAP_MCBSP_READ(mcbsp[id].io_base, RCR2)); 73 OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
54 dev_dbg(mcbsp[id].dev, "RCR1: 0x%04x\n", 74 dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n",
55 OMAP_MCBSP_READ(mcbsp[id].io_base, RCR1)); 75 OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
56 dev_dbg(mcbsp[id].dev, "XCR2: 0x%04x\n", 76 dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n",
57 OMAP_MCBSP_READ(mcbsp[id].io_base, XCR2)); 77 OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
58 dev_dbg(mcbsp[id].dev, "XCR1: 0x%04x\n", 78 dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n",
59 OMAP_MCBSP_READ(mcbsp[id].io_base, XCR1)); 79 OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
60 dev_dbg(mcbsp[id].dev, "SRGR2: 0x%04x\n", 80 dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n",
61 OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR2)); 81 OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
62 dev_dbg(mcbsp[id].dev, "SRGR1: 0x%04x\n", 82 dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
63 OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR1)); 83 OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
64 dev_dbg(mcbsp[id].dev, "PCR0: 0x%04x\n", 84 dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
65 OMAP_MCBSP_READ(mcbsp[id].io_base, PCR0)); 85 OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
66 dev_dbg(mcbsp[id].dev, "***********************\n"); 86 dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n",
87 OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
88 dev_dbg(mcbsp->dev, "***********************\n");
67} 89}
68 90
69static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) 91static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
@@ -126,16 +148,18 @@ static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
126 */ 148 */
127void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) 149void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
128{ 150{
151 struct omap_mcbsp *mcbsp;
129 void __iomem *io_base; 152 void __iomem *io_base;
130 153
131 if (!omap_mcbsp_check_valid_id(id)) { 154 if (!omap_mcbsp_check_valid_id(id)) {
132 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 155 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
133 return; 156 return;
134 } 157 }
158 mcbsp = id_to_mcbsp_ptr(id);
135 159
136 io_base = mcbsp[id].io_base; 160 io_base = mcbsp->io_base;
137 dev_dbg(mcbsp[id].dev, "Configuring McBSP%d phys_base: 0x%08lx\n", 161 dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n",
138 mcbsp[id].id, mcbsp[id].phys_base); 162 mcbsp->id, mcbsp->phys_base);
139 163
140 /* We write the given config */ 164 /* We write the given config */
141 OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2); 165 OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
@@ -158,23 +182,26 @@ EXPORT_SYMBOL(omap_mcbsp_config);
158 */ 182 */
159int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type) 183int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
160{ 184{
185 struct omap_mcbsp *mcbsp;
186
161 if (!omap_mcbsp_check_valid_id(id)) { 187 if (!omap_mcbsp_check_valid_id(id)) {
162 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 188 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
163 return -ENODEV; 189 return -ENODEV;
164 } 190 }
191 mcbsp = id_to_mcbsp_ptr(id);
165 192
166 spin_lock(&mcbsp[id].lock); 193 spin_lock(&mcbsp->lock);
167 194
168 if (!mcbsp[id].free) { 195 if (!mcbsp->free) {
169 dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n", 196 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
170 mcbsp[id].id); 197 mcbsp->id);
171 spin_unlock(&mcbsp[id].lock); 198 spin_unlock(&mcbsp->lock);
172 return -EINVAL; 199 return -EINVAL;
173 } 200 }
174 201
175 mcbsp[id].io_type = io_type; 202 mcbsp->io_type = io_type;
176 203
177 spin_unlock(&mcbsp[id].lock); 204 spin_unlock(&mcbsp->lock);
178 205
179 return 0; 206 return 0;
180} 207}
@@ -182,53 +209,60 @@ EXPORT_SYMBOL(omap_mcbsp_set_io_type);
182 209
183int omap_mcbsp_request(unsigned int id) 210int omap_mcbsp_request(unsigned int id)
184{ 211{
212 struct omap_mcbsp *mcbsp;
185 int err; 213 int err;
186 214
187 if (!omap_mcbsp_check_valid_id(id)) { 215 if (!omap_mcbsp_check_valid_id(id)) {
188 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 216 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
189 return -ENODEV; 217 return -ENODEV;
190 } 218 }
219 mcbsp = id_to_mcbsp_ptr(id);
191 220
192 if (mcbsp[id].pdata->ops->request) 221 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
193 mcbsp[id].pdata->ops->request(id); 222 mcbsp->pdata->ops->request(id);
194 223
195 clk_enable(mcbsp[id].clk); 224 clk_enable(mcbsp->clk);
196 225
197 spin_lock(&mcbsp[id].lock); 226 spin_lock(&mcbsp->lock);
198 if (!mcbsp[id].free) { 227 if (!mcbsp->free) {
199 dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n", 228 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
200 mcbsp[id].id); 229 mcbsp->id);
201 spin_unlock(&mcbsp[id].lock); 230 spin_unlock(&mcbsp->lock);
202 return -1; 231 return -1;
203 } 232 }
204 233
205 mcbsp[id].free = 0; 234 mcbsp->free = 0;
206 spin_unlock(&mcbsp[id].lock); 235 spin_unlock(&mcbsp->lock);
236
237 /*
238 * Make sure that transmitter, receiver and sample-rate generator are
239 * not running before activating IRQs.
240 */
241 OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0);
242 OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0);
207 243
208 if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) { 244 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
209 /* We need to get IRQs here */ 245 /* We need to get IRQs here */
210 err = request_irq(mcbsp[id].tx_irq, omap_mcbsp_tx_irq_handler, 246 init_completion(&mcbsp->tx_irq_completion);
211 0, "McBSP", (void *) (&mcbsp[id])); 247 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
248 0, "McBSP", (void *)mcbsp);
212 if (err != 0) { 249 if (err != 0) {
213 dev_err(mcbsp[id].dev, "Unable to request TX IRQ %d " 250 dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
214 "for McBSP%d\n", mcbsp[id].tx_irq, 251 "for McBSP%d\n", mcbsp->tx_irq,
215 mcbsp[id].id); 252 mcbsp->id);
216 return err; 253 return err;
217 } 254 }
218 255
219 init_completion(&(mcbsp[id].tx_irq_completion)); 256 init_completion(&mcbsp->rx_irq_completion);
220 257 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
221 err = request_irq(mcbsp[id].rx_irq, omap_mcbsp_rx_irq_handler, 258 0, "McBSP", (void *)mcbsp);
222 0, "McBSP", (void *) (&mcbsp[id]));
223 if (err != 0) { 259 if (err != 0) {
224 dev_err(mcbsp[id].dev, "Unable to request RX IRQ %d " 260 dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
225 "for McBSP%d\n", mcbsp[id].rx_irq, 261 "for McBSP%d\n", mcbsp->rx_irq,
226 mcbsp[id].id); 262 mcbsp->id);
227 free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); 263 free_irq(mcbsp->tx_irq, (void *)mcbsp);
228 return err; 264 return err;
229 } 265 }
230
231 init_completion(&(mcbsp[id].rx_irq_completion));
232 } 266 }
233 267
234 return 0; 268 return 0;
@@ -237,31 +271,34 @@ EXPORT_SYMBOL(omap_mcbsp_request);
237 271
238void omap_mcbsp_free(unsigned int id) 272void omap_mcbsp_free(unsigned int id)
239{ 273{
274 struct omap_mcbsp *mcbsp;
275
240 if (!omap_mcbsp_check_valid_id(id)) { 276 if (!omap_mcbsp_check_valid_id(id)) {
241 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 277 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
242 return; 278 return;
243 } 279 }
280 mcbsp = id_to_mcbsp_ptr(id);
244 281
245 if (mcbsp[id].pdata->ops->free) 282 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
246 mcbsp[id].pdata->ops->free(id); 283 mcbsp->pdata->ops->free(id);
247 284
248 clk_disable(mcbsp[id].clk); 285 clk_disable(mcbsp->clk);
249 286
250 spin_lock(&mcbsp[id].lock); 287 spin_lock(&mcbsp->lock);
251 if (mcbsp[id].free) { 288 if (mcbsp->free) {
252 dev_err(mcbsp[id].dev, "McBSP%d was not reserved\n", 289 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
253 mcbsp[id].id); 290 mcbsp->id);
254 spin_unlock(&mcbsp[id].lock); 291 spin_unlock(&mcbsp->lock);
255 return; 292 return;
256 } 293 }
257 294
258 mcbsp[id].free = 1; 295 mcbsp->free = 1;
259 spin_unlock(&mcbsp[id].lock); 296 spin_unlock(&mcbsp->lock);
260 297
261 if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) { 298 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
262 /* Free IRQs */ 299 /* Free IRQs */
263 free_irq(mcbsp[id].rx_irq, (void *) (&mcbsp[id])); 300 free_irq(mcbsp->rx_irq, (void *)mcbsp);
264 free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); 301 free_irq(mcbsp->tx_irq, (void *)mcbsp);
265 } 302 }
266} 303}
267EXPORT_SYMBOL(omap_mcbsp_free); 304EXPORT_SYMBOL(omap_mcbsp_free);
@@ -273,6 +310,7 @@ EXPORT_SYMBOL(omap_mcbsp_free);
273 */ 310 */
274void omap_mcbsp_start(unsigned int id) 311void omap_mcbsp_start(unsigned int id)
275{ 312{
313 struct omap_mcbsp *mcbsp;
276 void __iomem *io_base; 314 void __iomem *io_base;
277 u16 w; 315 u16 w;
278 316
@@ -280,11 +318,11 @@ void omap_mcbsp_start(unsigned int id)
280 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 318 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
281 return; 319 return;
282 } 320 }
321 mcbsp = id_to_mcbsp_ptr(id);
322 io_base = mcbsp->io_base;
283 323
284 io_base = mcbsp[id].io_base; 324 mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
285 325 mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
286 mcbsp[id].rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
287 mcbsp[id].tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
288 326
289 /* Start the sample generator */ 327 /* Start the sample generator */
290 w = OMAP_MCBSP_READ(io_base, SPCR2); 328 w = OMAP_MCBSP_READ(io_base, SPCR2);
@@ -310,6 +348,7 @@ EXPORT_SYMBOL(omap_mcbsp_start);
310 348
311void omap_mcbsp_stop(unsigned int id) 349void omap_mcbsp_stop(unsigned int id)
312{ 350{
351 struct omap_mcbsp *mcbsp;
313 void __iomem *io_base; 352 void __iomem *io_base;
314 u16 w; 353 u16 w;
315 354
@@ -318,7 +357,8 @@ void omap_mcbsp_stop(unsigned int id)
318 return; 357 return;
319 } 358 }
320 359
321 io_base = mcbsp[id].io_base; 360 mcbsp = id_to_mcbsp_ptr(id);
361 io_base = mcbsp->io_base;
322 362
323 /* Reset transmitter */ 363 /* Reset transmitter */
324 w = OMAP_MCBSP_READ(io_base, SPCR2); 364 w = OMAP_MCBSP_READ(io_base, SPCR2);
@@ -337,6 +377,7 @@ EXPORT_SYMBOL(omap_mcbsp_stop);
337/* polled mcbsp i/o operations */ 377/* polled mcbsp i/o operations */
338int omap_mcbsp_pollwrite(unsigned int id, u16 buf) 378int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
339{ 379{
380 struct omap_mcbsp *mcbsp;
340 void __iomem *base; 381 void __iomem *base;
341 382
342 if (!omap_mcbsp_check_valid_id(id)) { 383 if (!omap_mcbsp_check_valid_id(id)) {
@@ -344,7 +385,9 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
344 return -ENODEV; 385 return -ENODEV;
345 } 386 }
346 387
347 base = mcbsp[id].io_base; 388 mcbsp = id_to_mcbsp_ptr(id);
389 base = mcbsp->io_base;
390
348 writew(buf, base + OMAP_MCBSP_REG_DXR1); 391 writew(buf, base + OMAP_MCBSP_REG_DXR1);
349 /* if frame sync error - clear the error */ 392 /* if frame sync error - clear the error */
350 if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) { 393 if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
@@ -366,8 +409,8 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
366 (XRST), 409 (XRST),
367 base + OMAP_MCBSP_REG_SPCR2); 410 base + OMAP_MCBSP_REG_SPCR2);
368 udelay(10); 411 udelay(10);
369 dev_err(mcbsp[id].dev, "Could not write to" 412 dev_err(mcbsp->dev, "Could not write to"
370 " McBSP%d Register\n", mcbsp[id].id); 413 " McBSP%d Register\n", mcbsp->id);
371 return -2; 414 return -2;
372 } 415 }
373 } 416 }
@@ -379,14 +422,16 @@ EXPORT_SYMBOL(omap_mcbsp_pollwrite);
379 422
380int omap_mcbsp_pollread(unsigned int id, u16 *buf) 423int omap_mcbsp_pollread(unsigned int id, u16 *buf)
381{ 424{
425 struct omap_mcbsp *mcbsp;
382 void __iomem *base; 426 void __iomem *base;
383 427
384 if (!omap_mcbsp_check_valid_id(id)) { 428 if (!omap_mcbsp_check_valid_id(id)) {
385 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 429 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
386 return -ENODEV; 430 return -ENODEV;
387 } 431 }
432 mcbsp = id_to_mcbsp_ptr(id);
388 433
389 base = mcbsp[id].io_base; 434 base = mcbsp->io_base;
390 /* if frame sync error - clear the error */ 435 /* if frame sync error - clear the error */
391 if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) { 436 if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
392 /* clear error */ 437 /* clear error */
@@ -407,8 +452,8 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
407 (RRST), 452 (RRST),
408 base + OMAP_MCBSP_REG_SPCR1); 453 base + OMAP_MCBSP_REG_SPCR1);
409 udelay(10); 454 udelay(10);
410 dev_err(mcbsp[id].dev, "Could not read from" 455 dev_err(mcbsp->dev, "Could not read from"
411 " McBSP%d Register\n", mcbsp[id].id); 456 " McBSP%d Register\n", mcbsp->id);
412 return -2; 457 return -2;
413 } 458 }
414 } 459 }
@@ -424,6 +469,7 @@ EXPORT_SYMBOL(omap_mcbsp_pollread);
424 */ 469 */
425void omap_mcbsp_xmit_word(unsigned int id, u32 word) 470void omap_mcbsp_xmit_word(unsigned int id, u32 word)
426{ 471{
472 struct omap_mcbsp *mcbsp;
427 void __iomem *io_base; 473 void __iomem *io_base;
428 omap_mcbsp_word_length word_length; 474 omap_mcbsp_word_length word_length;
429 475
@@ -432,10 +478,11 @@ void omap_mcbsp_xmit_word(unsigned int id, u32 word)
432 return; 478 return;
433 } 479 }
434 480
435 io_base = mcbsp[id].io_base; 481 mcbsp = id_to_mcbsp_ptr(id);
436 word_length = mcbsp[id].tx_word_length; 482 io_base = mcbsp->io_base;
483 word_length = mcbsp->tx_word_length;
437 484
438 wait_for_completion(&(mcbsp[id].tx_irq_completion)); 485 wait_for_completion(&mcbsp->tx_irq_completion);
439 486
440 if (word_length > OMAP_MCBSP_WORD_16) 487 if (word_length > OMAP_MCBSP_WORD_16)
441 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16); 488 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
@@ -445,6 +492,7 @@ EXPORT_SYMBOL(omap_mcbsp_xmit_word);
445 492
446u32 omap_mcbsp_recv_word(unsigned int id) 493u32 omap_mcbsp_recv_word(unsigned int id)
447{ 494{
495 struct omap_mcbsp *mcbsp;
448 void __iomem *io_base; 496 void __iomem *io_base;
449 u16 word_lsb, word_msb = 0; 497 u16 word_lsb, word_msb = 0;
450 omap_mcbsp_word_length word_length; 498 omap_mcbsp_word_length word_length;
@@ -453,11 +501,12 @@ u32 omap_mcbsp_recv_word(unsigned int id)
453 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 501 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
454 return -ENODEV; 502 return -ENODEV;
455 } 503 }
504 mcbsp = id_to_mcbsp_ptr(id);
456 505
457 word_length = mcbsp[id].rx_word_length; 506 word_length = mcbsp->rx_word_length;
458 io_base = mcbsp[id].io_base; 507 io_base = mcbsp->io_base;
459 508
460 wait_for_completion(&(mcbsp[id].rx_irq_completion)); 509 wait_for_completion(&mcbsp->rx_irq_completion);
461 510
462 if (word_length > OMAP_MCBSP_WORD_16) 511 if (word_length > OMAP_MCBSP_WORD_16)
463 word_msb = OMAP_MCBSP_READ(io_base, DRR2); 512 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
@@ -469,6 +518,7 @@ EXPORT_SYMBOL(omap_mcbsp_recv_word);
469 518
470int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) 519int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
471{ 520{
521 struct omap_mcbsp *mcbsp;
472 void __iomem *io_base; 522 void __iomem *io_base;
473 omap_mcbsp_word_length tx_word_length; 523 omap_mcbsp_word_length tx_word_length;
474 omap_mcbsp_word_length rx_word_length; 524 omap_mcbsp_word_length rx_word_length;
@@ -478,10 +528,10 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
478 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 528 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
479 return -ENODEV; 529 return -ENODEV;
480 } 530 }
481 531 mcbsp = id_to_mcbsp_ptr(id);
482 io_base = mcbsp[id].io_base; 532 io_base = mcbsp->io_base;
483 tx_word_length = mcbsp[id].tx_word_length; 533 tx_word_length = mcbsp->tx_word_length;
484 rx_word_length = mcbsp[id].rx_word_length; 534 rx_word_length = mcbsp->rx_word_length;
485 535
486 if (tx_word_length != rx_word_length) 536 if (tx_word_length != rx_word_length)
487 return -EINVAL; 537 return -EINVAL;
@@ -496,8 +546,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
496 udelay(10); 546 udelay(10);
497 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST); 547 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
498 udelay(10); 548 udelay(10);
499 dev_err(mcbsp[id].dev, "McBSP%d transmitter not " 549 dev_err(mcbsp->dev, "McBSP%d transmitter not "
500 "ready\n", mcbsp[id].id); 550 "ready\n", mcbsp->id);
501 return -EAGAIN; 551 return -EAGAIN;
502 } 552 }
503 } 553 }
@@ -517,8 +567,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
517 udelay(10); 567 udelay(10);
518 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST); 568 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
519 udelay(10); 569 udelay(10);
520 dev_err(mcbsp[id].dev, "McBSP%d receiver not " 570 dev_err(mcbsp->dev, "McBSP%d receiver not "
521 "ready\n", mcbsp[id].id); 571 "ready\n", mcbsp->id);
522 return -EAGAIN; 572 return -EAGAIN;
523 } 573 }
524 } 574 }
@@ -534,6 +584,7 @@ EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
534 584
535int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) 585int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
536{ 586{
587 struct omap_mcbsp *mcbsp;
537 u32 clock_word = 0; 588 u32 clock_word = 0;
538 void __iomem *io_base; 589 void __iomem *io_base;
539 omap_mcbsp_word_length tx_word_length; 590 omap_mcbsp_word_length tx_word_length;
@@ -545,9 +596,11 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
545 return -ENODEV; 596 return -ENODEV;
546 } 597 }
547 598
548 io_base = mcbsp[id].io_base; 599 mcbsp = id_to_mcbsp_ptr(id);
549 tx_word_length = mcbsp[id].tx_word_length; 600 io_base = mcbsp->io_base;
550 rx_word_length = mcbsp[id].rx_word_length; 601
602 tx_word_length = mcbsp->tx_word_length;
603 rx_word_length = mcbsp->rx_word_length;
551 604
552 if (tx_word_length != rx_word_length) 605 if (tx_word_length != rx_word_length)
553 return -EINVAL; 606 return -EINVAL;
@@ -562,8 +615,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
562 udelay(10); 615 udelay(10);
563 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST); 616 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
564 udelay(10); 617 udelay(10);
565 dev_err(mcbsp[id].dev, "McBSP%d transmitter not " 618 dev_err(mcbsp->dev, "McBSP%d transmitter not "
566 "ready\n", mcbsp[id].id); 619 "ready\n", mcbsp->id);
567 return -EAGAIN; 620 return -EAGAIN;
568 } 621 }
569 } 622 }
@@ -583,8 +636,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
583 udelay(10); 636 udelay(10);
584 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST); 637 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
585 udelay(10); 638 udelay(10);
586 dev_err(mcbsp[id].dev, "McBSP%d receiver not " 639 dev_err(mcbsp->dev, "McBSP%d receiver not "
587 "ready\n", mcbsp[id].id); 640 "ready\n", mcbsp->id);
588 return -EAGAIN; 641 return -EAGAIN;
589 } 642 }
590 } 643 }
@@ -610,6 +663,7 @@ EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
610int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, 663int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
611 unsigned int length) 664 unsigned int length)
612{ 665{
666 struct omap_mcbsp *mcbsp;
613 int dma_tx_ch; 667 int dma_tx_ch;
614 int src_port = 0; 668 int src_port = 0;
615 int dest_port = 0; 669 int dest_port = 0;
@@ -619,50 +673,51 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
619 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 673 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
620 return -ENODEV; 674 return -ENODEV;
621 } 675 }
676 mcbsp = id_to_mcbsp_ptr(id);
622 677
623 if (omap_request_dma(mcbsp[id].dma_tx_sync, "McBSP TX", 678 if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
624 omap_mcbsp_tx_dma_callback, 679 omap_mcbsp_tx_dma_callback,
625 &mcbsp[id], 680 mcbsp,
626 &dma_tx_ch)) { 681 &dma_tx_ch)) {
627 dev_err(mcbsp[id].dev, " Unable to request DMA channel for " 682 dev_err(mcbsp->dev, " Unable to request DMA channel for "
628 "McBSP%d TX. Trying IRQ based TX\n", 683 "McBSP%d TX. Trying IRQ based TX\n",
629 mcbsp[id].id); 684 mcbsp->id);
630 return -EAGAIN; 685 return -EAGAIN;
631 } 686 }
632 mcbsp[id].dma_tx_lch = dma_tx_ch; 687 mcbsp->dma_tx_lch = dma_tx_ch;
633 688
634 dev_err(mcbsp[id].dev, "McBSP%d TX DMA on channel %d\n", mcbsp[id].id, 689 dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
635 dma_tx_ch); 690 dma_tx_ch);
636 691
637 init_completion(&(mcbsp[id].tx_dma_completion)); 692 init_completion(&mcbsp->tx_dma_completion);
638 693
639 if (cpu_class_is_omap1()) { 694 if (cpu_class_is_omap1()) {
640 src_port = OMAP_DMA_PORT_TIPB; 695 src_port = OMAP_DMA_PORT_TIPB;
641 dest_port = OMAP_DMA_PORT_EMIFF; 696 dest_port = OMAP_DMA_PORT_EMIFF;
642 } 697 }
643 if (cpu_class_is_omap2()) 698 if (cpu_class_is_omap2())
644 sync_dev = mcbsp[id].dma_tx_sync; 699 sync_dev = mcbsp->dma_tx_sync;
645 700
646 omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch, 701 omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
647 OMAP_DMA_DATA_TYPE_S16, 702 OMAP_DMA_DATA_TYPE_S16,
648 length >> 1, 1, 703 length >> 1, 1,
649 OMAP_DMA_SYNC_ELEMENT, 704 OMAP_DMA_SYNC_ELEMENT,
650 sync_dev, 0); 705 sync_dev, 0);
651 706
652 omap_set_dma_dest_params(mcbsp[id].dma_tx_lch, 707 omap_set_dma_dest_params(mcbsp->dma_tx_lch,
653 src_port, 708 src_port,
654 OMAP_DMA_AMODE_CONSTANT, 709 OMAP_DMA_AMODE_CONSTANT,
655 mcbsp[id].phys_base + OMAP_MCBSP_REG_DXR1, 710 mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
656 0, 0); 711 0, 0);
657 712
658 omap_set_dma_src_params(mcbsp[id].dma_tx_lch, 713 omap_set_dma_src_params(mcbsp->dma_tx_lch,
659 dest_port, 714 dest_port,
660 OMAP_DMA_AMODE_POST_INC, 715 OMAP_DMA_AMODE_POST_INC,
661 buffer, 716 buffer,
662 0, 0); 717 0, 0);
663 718
664 omap_start_dma(mcbsp[id].dma_tx_lch); 719 omap_start_dma(mcbsp->dma_tx_lch);
665 wait_for_completion(&(mcbsp[id].tx_dma_completion)); 720 wait_for_completion(&mcbsp->tx_dma_completion);
666 721
667 return 0; 722 return 0;
668} 723}
@@ -671,6 +726,7 @@ EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
671int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, 726int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
672 unsigned int length) 727 unsigned int length)
673{ 728{
729 struct omap_mcbsp *mcbsp;
674 int dma_rx_ch; 730 int dma_rx_ch;
675 int src_port = 0; 731 int src_port = 0;
676 int dest_port = 0; 732 int dest_port = 0;
@@ -680,50 +736,51 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
680 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 736 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
681 return -ENODEV; 737 return -ENODEV;
682 } 738 }
739 mcbsp = id_to_mcbsp_ptr(id);
683 740
684 if (omap_request_dma(mcbsp[id].dma_rx_sync, "McBSP RX", 741 if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
685 omap_mcbsp_rx_dma_callback, 742 omap_mcbsp_rx_dma_callback,
686 &mcbsp[id], 743 mcbsp,
687 &dma_rx_ch)) { 744 &dma_rx_ch)) {
688 dev_err(mcbsp[id].dev, "Unable to request DMA channel for " 745 dev_err(mcbsp->dev, "Unable to request DMA channel for "
689 "McBSP%d RX. Trying IRQ based RX\n", 746 "McBSP%d RX. Trying IRQ based RX\n",
690 mcbsp[id].id); 747 mcbsp->id);
691 return -EAGAIN; 748 return -EAGAIN;
692 } 749 }
693 mcbsp[id].dma_rx_lch = dma_rx_ch; 750 mcbsp->dma_rx_lch = dma_rx_ch;
694 751
695 dev_err(mcbsp[id].dev, "McBSP%d RX DMA on channel %d\n", mcbsp[id].id, 752 dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
696 dma_rx_ch); 753 dma_rx_ch);
697 754
698 init_completion(&(mcbsp[id].rx_dma_completion)); 755 init_completion(&mcbsp->rx_dma_completion);
699 756
700 if (cpu_class_is_omap1()) { 757 if (cpu_class_is_omap1()) {
701 src_port = OMAP_DMA_PORT_TIPB; 758 src_port = OMAP_DMA_PORT_TIPB;
702 dest_port = OMAP_DMA_PORT_EMIFF; 759 dest_port = OMAP_DMA_PORT_EMIFF;
703 } 760 }
704 if (cpu_class_is_omap2()) 761 if (cpu_class_is_omap2())
705 sync_dev = mcbsp[id].dma_rx_sync; 762 sync_dev = mcbsp->dma_rx_sync;
706 763
707 omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch, 764 omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
708 OMAP_DMA_DATA_TYPE_S16, 765 OMAP_DMA_DATA_TYPE_S16,
709 length >> 1, 1, 766 length >> 1, 1,
710 OMAP_DMA_SYNC_ELEMENT, 767 OMAP_DMA_SYNC_ELEMENT,
711 sync_dev, 0); 768 sync_dev, 0);
712 769
713 omap_set_dma_src_params(mcbsp[id].dma_rx_lch, 770 omap_set_dma_src_params(mcbsp->dma_rx_lch,
714 src_port, 771 src_port,
715 OMAP_DMA_AMODE_CONSTANT, 772 OMAP_DMA_AMODE_CONSTANT,
716 mcbsp[id].phys_base + OMAP_MCBSP_REG_DRR1, 773 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
717 0, 0); 774 0, 0);
718 775
719 omap_set_dma_dest_params(mcbsp[id].dma_rx_lch, 776 omap_set_dma_dest_params(mcbsp->dma_rx_lch,
720 dest_port, 777 dest_port,
721 OMAP_DMA_AMODE_POST_INC, 778 OMAP_DMA_AMODE_POST_INC,
722 buffer, 779 buffer,
723 0, 0); 780 0, 0);
724 781
725 omap_start_dma(mcbsp[id].dma_rx_lch); 782 omap_start_dma(mcbsp->dma_rx_lch);
726 wait_for_completion(&(mcbsp[id].rx_dma_completion)); 783 wait_for_completion(&mcbsp->rx_dma_completion);
727 784
728 return 0; 785 return 0;
729} 786}
@@ -738,12 +795,14 @@ EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
738void omap_mcbsp_set_spi_mode(unsigned int id, 795void omap_mcbsp_set_spi_mode(unsigned int id,
739 const struct omap_mcbsp_spi_cfg *spi_cfg) 796 const struct omap_mcbsp_spi_cfg *spi_cfg)
740{ 797{
798 struct omap_mcbsp *mcbsp;
741 struct omap_mcbsp_reg_cfg mcbsp_cfg; 799 struct omap_mcbsp_reg_cfg mcbsp_cfg;
742 800
743 if (!omap_mcbsp_check_valid_id(id)) { 801 if (!omap_mcbsp_check_valid_id(id)) {
744 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 802 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
745 return; 803 return;
746 } 804 }
805 mcbsp = id_to_mcbsp_ptr(id);
747 806
748 memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg)); 807 memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
749 808
@@ -804,9 +863,10 @@ EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
804 * McBSP1 and McBSP3 are directly mapped on 1610 and 1510. 863 * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
805 * 730 has only 2 McBSP, and both of them are MPU peripherals. 864 * 730 has only 2 McBSP, and both of them are MPU peripherals.
806 */ 865 */
807static int __init omap_mcbsp_probe(struct platform_device *pdev) 866static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
808{ 867{
809 struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; 868 struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
869 struct omap_mcbsp *mcbsp;
810 int id = pdev->id - 1; 870 int id = pdev->id - 1;
811 int ret = 0; 871 int ret = 0;
812 872
@@ -819,56 +879,63 @@ static int __init omap_mcbsp_probe(struct platform_device *pdev)
819 879
820 dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id); 880 dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
821 881
822 if (id >= OMAP_MAX_MCBSP_COUNT) { 882 if (id >= omap_mcbsp_count) {
823 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id); 883 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
824 ret = -EINVAL; 884 ret = -EINVAL;
825 goto exit; 885 goto exit;
826 } 886 }
827 887
828 spin_lock_init(&mcbsp[id].lock); 888 mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
829 mcbsp[id].id = id + 1; 889 if (!mcbsp) {
830 mcbsp[id].free = 1; 890 ret = -ENOMEM;
831 mcbsp[id].dma_tx_lch = -1; 891 goto exit;
832 mcbsp[id].dma_rx_lch = -1; 892 }
893 mcbsp_ptr[id] = mcbsp;
894
895 spin_lock_init(&mcbsp->lock);
896 mcbsp->id = id + 1;
897 mcbsp->free = 1;
898 mcbsp->dma_tx_lch = -1;
899 mcbsp->dma_rx_lch = -1;
833 900
834 mcbsp[id].phys_base = pdata->phys_base; 901 mcbsp->phys_base = pdata->phys_base;
835 mcbsp[id].io_base = ioremap(pdata->phys_base, SZ_4K); 902 mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
836 if (!mcbsp[id].io_base) { 903 if (!mcbsp->io_base) {
837 ret = -ENOMEM; 904 ret = -ENOMEM;
838 goto err_ioremap; 905 goto err_ioremap;
839 } 906 }
840 907
841 /* Default I/O is IRQ based */ 908 /* Default I/O is IRQ based */
842 mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO; 909 mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
843 mcbsp[id].tx_irq = pdata->tx_irq; 910 mcbsp->tx_irq = pdata->tx_irq;
844 mcbsp[id].rx_irq = pdata->rx_irq; 911 mcbsp->rx_irq = pdata->rx_irq;
845 mcbsp[id].dma_rx_sync = pdata->dma_rx_sync; 912 mcbsp->dma_rx_sync = pdata->dma_rx_sync;
846 mcbsp[id].dma_tx_sync = pdata->dma_tx_sync; 913 mcbsp->dma_tx_sync = pdata->dma_tx_sync;
847 914
848 if (pdata->clk_name) 915 if (pdata->clk_name)
849 mcbsp[id].clk = clk_get(&pdev->dev, pdata->clk_name); 916 mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
850 if (IS_ERR(mcbsp[id].clk)) { 917 if (IS_ERR(mcbsp->clk)) {
851 dev_err(&pdev->dev, 918 dev_err(&pdev->dev,
852 "Invalid clock configuration for McBSP%d.\n", 919 "Invalid clock configuration for McBSP%d.\n",
853 mcbsp[id].id); 920 mcbsp->id);
854 ret = PTR_ERR(mcbsp[id].clk); 921 ret = PTR_ERR(mcbsp->clk);
855 goto err_clk; 922 goto err_clk;
856 } 923 }
857 924
858 mcbsp[id].pdata = pdata; 925 mcbsp->pdata = pdata;
859 mcbsp[id].dev = &pdev->dev; 926 mcbsp->dev = &pdev->dev;
860 platform_set_drvdata(pdev, &mcbsp[id]); 927 platform_set_drvdata(pdev, mcbsp);
861 return 0; 928 return 0;
862 929
863err_clk: 930err_clk:
864 iounmap(mcbsp[id].io_base); 931 iounmap(mcbsp->io_base);
865err_ioremap: 932err_ioremap:
866 mcbsp[id].free = 0; 933 mcbsp->free = 0;
867exit: 934exit:
868 return ret; 935 return ret;
869} 936}
870 937
871static int omap_mcbsp_remove(struct platform_device *pdev) 938static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
872{ 939{
873 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); 940 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
874 941
@@ -894,7 +961,7 @@ static int omap_mcbsp_remove(struct platform_device *pdev)
894 961
895static struct platform_driver omap_mcbsp_driver = { 962static struct platform_driver omap_mcbsp_driver = {
896 .probe = omap_mcbsp_probe, 963 .probe = omap_mcbsp_probe,
897 .remove = omap_mcbsp_remove, 964 .remove = __devexit_p(omap_mcbsp_remove),
898 .driver = { 965 .driver = {
899 .name = "omap-mcbsp", 966 .name = "omap-mcbsp",
900 }, 967 },
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-17 05:52:59 -0500