diff options
-rw-r--r-- | drivers/net/ixgbe/ixgbe.h | 6 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_ethtool.c | 21 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 64 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_type.h | 11 |
4 files changed, 71 insertions, 31 deletions
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h index 0b54717f707d..c26433d14605 100644 --- a/drivers/net/ixgbe/ixgbe.h +++ b/drivers/net/ixgbe/ixgbe.h | |||
@@ -189,10 +189,11 @@ struct ixgbe_q_vector { | |||
189 | }; | 189 | }; |
190 | 190 | ||
191 | /* Helper macros to switch between ints/sec and what the register uses. | 191 | /* Helper macros to switch between ints/sec and what the register uses. |
192 | * And yes, it's the same math going both ways. | 192 | * And yes, it's the same math going both ways. The lowest value |
193 | * supported by all of the ixgbe hardware is 8. | ||
193 | */ | 194 | */ |
194 | #define EITR_INTS_PER_SEC_TO_REG(_eitr) \ | 195 | #define EITR_INTS_PER_SEC_TO_REG(_eitr) \ |
195 | ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 0) | 196 | ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8) |
196 | #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG | 197 | #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG |
197 | 198 | ||
198 | #define IXGBE_DESC_UNUSED(R) \ | 199 | #define IXGBE_DESC_UNUSED(R) \ |
@@ -366,5 +367,6 @@ extern void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter); | |||
366 | extern int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter); | 367 | extern int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter); |
367 | void ixgbe_napi_add_all(struct ixgbe_adapter *adapter); | 368 | void ixgbe_napi_add_all(struct ixgbe_adapter *adapter); |
368 | void ixgbe_napi_del_all(struct ixgbe_adapter *adapter); | 369 | void ixgbe_napi_del_all(struct ixgbe_adapter *adapter); |
370 | extern void ixgbe_write_eitr(struct ixgbe_adapter *, int, u32); | ||
369 | 371 | ||
370 | #endif /* _IXGBE_H_ */ | 372 | #endif /* _IXGBE_H_ */ |
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c index ae38bcaa7ca1..3a99781794d1 100644 --- a/drivers/net/ixgbe/ixgbe_ethtool.c +++ b/drivers/net/ixgbe/ixgbe_ethtool.c | |||
@@ -977,40 +977,47 @@ static int ixgbe_set_coalesce(struct net_device *netdev, | |||
977 | struct ethtool_coalesce *ec) | 977 | struct ethtool_coalesce *ec) |
978 | { | 978 | { |
979 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | 979 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
980 | struct ixgbe_hw *hw = &adapter->hw; | ||
981 | int i; | 980 | int i; |
982 | 981 | ||
983 | if (ec->tx_max_coalesced_frames_irq) | 982 | if (ec->tx_max_coalesced_frames_irq) |
984 | adapter->tx_ring[0].work_limit = ec->tx_max_coalesced_frames_irq; | 983 | adapter->tx_ring[0].work_limit = ec->tx_max_coalesced_frames_irq; |
985 | 984 | ||
986 | if (ec->rx_coalesce_usecs > 1) { | 985 | if (ec->rx_coalesce_usecs > 1) { |
986 | /* check the limits */ | ||
987 | if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) || | ||
988 | (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE)) | ||
989 | return -EINVAL; | ||
990 | |||
987 | /* store the value in ints/second */ | 991 | /* store the value in ints/second */ |
988 | adapter->eitr_param = 1000000/ec->rx_coalesce_usecs; | 992 | adapter->eitr_param = 1000000/ec->rx_coalesce_usecs; |
989 | 993 | ||
990 | /* static value of interrupt rate */ | 994 | /* static value of interrupt rate */ |
991 | adapter->itr_setting = adapter->eitr_param; | 995 | adapter->itr_setting = adapter->eitr_param; |
992 | /* clear the lower bit */ | 996 | /* clear the lower bit as its used for dynamic state */ |
993 | adapter->itr_setting &= ~1; | 997 | adapter->itr_setting &= ~1; |
994 | } else if (ec->rx_coalesce_usecs == 1) { | 998 | } else if (ec->rx_coalesce_usecs == 1) { |
995 | /* 1 means dynamic mode */ | 999 | /* 1 means dynamic mode */ |
996 | adapter->eitr_param = 20000; | 1000 | adapter->eitr_param = 20000; |
997 | adapter->itr_setting = 1; | 1001 | adapter->itr_setting = 1; |
998 | } else { | 1002 | } else { |
999 | /* any other value means disable eitr, which is best | 1003 | /* |
1000 | * served by setting the interrupt rate very high */ | 1004 | * any other value means disable eitr, which is best |
1001 | adapter->eitr_param = 3000000; | 1005 | * served by setting the interrupt rate very high |
1006 | */ | ||
1007 | adapter->eitr_param = IXGBE_MAX_INT_RATE; | ||
1002 | adapter->itr_setting = 0; | 1008 | adapter->itr_setting = 0; |
1003 | } | 1009 | } |
1004 | 1010 | ||
1005 | for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) { | 1011 | for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) { |
1006 | struct ixgbe_q_vector *q_vector = &adapter->q_vector[i]; | 1012 | struct ixgbe_q_vector *q_vector = &adapter->q_vector[i]; |
1007 | if (q_vector->txr_count && !q_vector->rxr_count) | 1013 | if (q_vector->txr_count && !q_vector->rxr_count) |
1014 | /* tx vector gets half the rate */ | ||
1008 | q_vector->eitr = (adapter->eitr_param >> 1); | 1015 | q_vector->eitr = (adapter->eitr_param >> 1); |
1009 | else | 1016 | else |
1010 | /* rx only or mixed */ | 1017 | /* rx only or mixed */ |
1011 | q_vector->eitr = adapter->eitr_param; | 1018 | q_vector->eitr = adapter->eitr_param; |
1012 | IXGBE_WRITE_REG(hw, IXGBE_EITR(i), | 1019 | ixgbe_write_eitr(adapter, i, |
1013 | EITR_INTS_PER_SEC_TO_REG(q_vector->eitr)); | 1020 | EITR_INTS_PER_SEC_TO_REG(q_vector->eitr)); |
1014 | } | 1021 | } |
1015 | 1022 | ||
1016 | return 0; | 1023 | return 0; |
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 881bbf97ff0c..76fd5c6db02b 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -808,10 +808,14 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter) | |||
808 | /* if this is a tx only vector halve the interrupt rate */ | 808 | /* if this is a tx only vector halve the interrupt rate */ |
809 | if (q_vector->txr_count && !q_vector->rxr_count) | 809 | if (q_vector->txr_count && !q_vector->rxr_count) |
810 | q_vector->eitr = (adapter->eitr_param >> 1); | 810 | q_vector->eitr = (adapter->eitr_param >> 1); |
811 | else | 811 | else if (q_vector->rxr_count) |
812 | /* rx only */ | 812 | /* rx only */ |
813 | q_vector->eitr = adapter->eitr_param; | 813 | q_vector->eitr = adapter->eitr_param; |
814 | 814 | ||
815 | /* | ||
816 | * since ths is initial set up don't need to call | ||
817 | * ixgbe_write_eitr helper | ||
818 | */ | ||
815 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), | 819 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), |
816 | EITR_INTS_PER_SEC_TO_REG(q_vector->eitr)); | 820 | EITR_INTS_PER_SEC_TO_REG(q_vector->eitr)); |
817 | } | 821 | } |
@@ -896,10 +900,35 @@ update_itr_done: | |||
896 | return retval; | 900 | return retval; |
897 | } | 901 | } |
898 | 902 | ||
903 | /** | ||
904 | * ixgbe_write_eitr - write EITR register in hardware specific way | ||
905 | * @adapter: pointer to adapter struct | ||
906 | * @v_idx: vector index into q_vector array | ||
907 | * @itr_reg: new value to be written in *register* format, not ints/s | ||
908 | * | ||
909 | * This function is made to be called by ethtool and by the driver | ||
910 | * when it needs to update EITR registers at runtime. Hardware | ||
911 | * specific quirks/differences are taken care of here. | ||
912 | */ | ||
913 | void ixgbe_write_eitr(struct ixgbe_adapter *adapter, int v_idx, u32 itr_reg) | ||
914 | { | ||
915 | struct ixgbe_hw *hw = &adapter->hw; | ||
916 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) { | ||
917 | /* must write high and low 16 bits to reset counter */ | ||
918 | itr_reg |= (itr_reg << 16); | ||
919 | } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | ||
920 | /* | ||
921 | * set the WDIS bit to not clear the timer bits and cause an | ||
922 | * immediate assertion of the interrupt | ||
923 | */ | ||
924 | itr_reg |= IXGBE_EITR_CNT_WDIS; | ||
925 | } | ||
926 | IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg); | ||
927 | } | ||
928 | |||
899 | static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector) | 929 | static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector) |
900 | { | 930 | { |
901 | struct ixgbe_adapter *adapter = q_vector->adapter; | 931 | struct ixgbe_adapter *adapter = q_vector->adapter; |
902 | struct ixgbe_hw *hw = &adapter->hw; | ||
903 | u32 new_itr; | 932 | u32 new_itr; |
904 | u8 current_itr, ret_itr; | 933 | u8 current_itr, ret_itr; |
905 | int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) / | 934 | int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) / |
@@ -954,17 +983,13 @@ static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector) | |||
954 | 983 | ||
955 | if (new_itr != q_vector->eitr) { | 984 | if (new_itr != q_vector->eitr) { |
956 | u32 itr_reg; | 985 | u32 itr_reg; |
986 | |||
987 | /* save the algorithm value here, not the smoothed one */ | ||
988 | q_vector->eitr = new_itr; | ||
957 | /* do an exponential smoothing */ | 989 | /* do an exponential smoothing */ |
958 | new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100); | 990 | new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100); |
959 | q_vector->eitr = new_itr; | ||
960 | itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr); | 991 | itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr); |
961 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) | 992 | ixgbe_write_eitr(adapter, v_idx, itr_reg); |
962 | /* Resolution is 2 usec on 82599, so halve the rate */ | ||
963 | itr_reg >>= 1; | ||
964 | /* must write high and low 16 bits to reset counter */ | ||
965 | DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx, | ||
966 | itr_reg); | ||
967 | IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16); | ||
968 | } | 993 | } |
969 | 994 | ||
970 | return; | 995 | return; |
@@ -1141,7 +1166,7 @@ static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget) | |||
1141 | /* If all Rx work done, exit the polling mode */ | 1166 | /* If all Rx work done, exit the polling mode */ |
1142 | if (work_done < budget) { | 1167 | if (work_done < budget) { |
1143 | napi_complete(napi); | 1168 | napi_complete(napi); |
1144 | if (adapter->itr_setting & 3) | 1169 | if (adapter->itr_setting & 1) |
1145 | ixgbe_set_itr_msix(q_vector); | 1170 | ixgbe_set_itr_msix(q_vector); |
1146 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) | 1171 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) |
1147 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx); | 1172 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx); |
@@ -1190,7 +1215,7 @@ static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget) | |||
1190 | /* If all Rx work done, exit the polling mode */ | 1215 | /* If all Rx work done, exit the polling mode */ |
1191 | if (work_done < budget) { | 1216 | if (work_done < budget) { |
1192 | napi_complete(napi); | 1217 | napi_complete(napi); |
1193 | if (adapter->itr_setting & 3) | 1218 | if (adapter->itr_setting & 1) |
1194 | ixgbe_set_itr_msix(q_vector); | 1219 | ixgbe_set_itr_msix(q_vector); |
1195 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) | 1220 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) |
1196 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask); | 1221 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask); |
@@ -1360,7 +1385,6 @@ out: | |||
1360 | 1385 | ||
1361 | static void ixgbe_set_itr(struct ixgbe_adapter *adapter) | 1386 | static void ixgbe_set_itr(struct ixgbe_adapter *adapter) |
1362 | { | 1387 | { |
1363 | struct ixgbe_hw *hw = &adapter->hw; | ||
1364 | struct ixgbe_q_vector *q_vector = adapter->q_vector; | 1388 | struct ixgbe_q_vector *q_vector = adapter->q_vector; |
1365 | u8 current_itr; | 1389 | u8 current_itr; |
1366 | u32 new_itr = q_vector->eitr; | 1390 | u32 new_itr = q_vector->eitr; |
@@ -1395,15 +1419,13 @@ static void ixgbe_set_itr(struct ixgbe_adapter *adapter) | |||
1395 | 1419 | ||
1396 | if (new_itr != q_vector->eitr) { | 1420 | if (new_itr != q_vector->eitr) { |
1397 | u32 itr_reg; | 1421 | u32 itr_reg; |
1422 | |||
1423 | /* save the algorithm value here, not the smoothed one */ | ||
1424 | q_vector->eitr = new_itr; | ||
1398 | /* do an exponential smoothing */ | 1425 | /* do an exponential smoothing */ |
1399 | new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100); | 1426 | new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100); |
1400 | q_vector->eitr = new_itr; | ||
1401 | itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr); | 1427 | itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr); |
1402 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) | 1428 | ixgbe_write_eitr(adapter, 0, itr_reg); |
1403 | /* Resolution is 2 usec on 82599, so halve the rate */ | ||
1404 | itr_reg >>= 1; | ||
1405 | /* must write high and low 16 bits to reset counter */ | ||
1406 | IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16); | ||
1407 | } | 1429 | } |
1408 | 1430 | ||
1409 | return; | 1431 | return; |
@@ -1701,7 +1723,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) | |||
1701 | 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE, | 1723 | 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE, |
1702 | 0x6A3E67EA, 0x14364D17, 0x3BED200D}; | 1724 | 0x6A3E67EA, 0x14364D17, 0x3BED200D}; |
1703 | u32 fctrl, hlreg0; | 1725 | u32 fctrl, hlreg0; |
1704 | u32 reta = 0, mrqc; | 1726 | u32 reta = 0, mrqc = 0; |
1705 | u32 rdrxctl; | 1727 | u32 rdrxctl; |
1706 | int rx_buf_len; | 1728 | int rx_buf_len; |
1707 | 1729 | ||
@@ -2589,7 +2611,7 @@ static int ixgbe_poll(struct napi_struct *napi, int budget) | |||
2589 | /* If budget not fully consumed, exit the polling mode */ | 2611 | /* If budget not fully consumed, exit the polling mode */ |
2590 | if (work_done < budget) { | 2612 | if (work_done < budget) { |
2591 | napi_complete(napi); | 2613 | napi_complete(napi); |
2592 | if (adapter->itr_setting & 3) | 2614 | if (adapter->itr_setting & 1) |
2593 | ixgbe_set_itr(adapter); | 2615 | ixgbe_set_itr(adapter); |
2594 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) | 2616 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) |
2595 | ixgbe_irq_enable(adapter); | 2617 | ixgbe_irq_enable(adapter); |
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h index 60905936d927..95fc36cff261 100644 --- a/drivers/net/ixgbe/ixgbe_type.h +++ b/drivers/net/ixgbe/ixgbe_type.h | |||
@@ -98,9 +98,18 @@ | |||
98 | #define IXGBE_EIMS_EX(_i) (0x00AA0 + (_i) * 4) | 98 | #define IXGBE_EIMS_EX(_i) (0x00AA0 + (_i) * 4) |
99 | #define IXGBE_EIMC_EX(_i) (0x00AB0 + (_i) * 4) | 99 | #define IXGBE_EIMC_EX(_i) (0x00AB0 + (_i) * 4) |
100 | #define IXGBE_EIAM_EX(_i) (0x00AD0 + (_i) * 4) | 100 | #define IXGBE_EIAM_EX(_i) (0x00AD0 + (_i) * 4) |
101 | /* | ||
102 | * 82598 EITR is 16 bits but set the limits based on the max | ||
103 | * supported by all ixgbe hardware. 82599 EITR is only 12 bits, | ||
104 | * with the lower 3 always zero. | ||
105 | */ | ||
106 | #define IXGBE_MAX_INT_RATE 488281 | ||
107 | #define IXGBE_MIN_INT_RATE 956 | ||
108 | #define IXGBE_MAX_EITR 0x00000FF8 | ||
109 | #define IXGBE_MIN_EITR 8 | ||
101 | #define IXGBE_EITR(_i) (((_i) <= 23) ? (0x00820 + ((_i) * 4)) : \ | 110 | #define IXGBE_EITR(_i) (((_i) <= 23) ? (0x00820 + ((_i) * 4)) : \ |
102 | (0x012300 + (((_i) - 24) * 4))) | 111 | (0x012300 + (((_i) - 24) * 4))) |
103 | #define IXGBE_EITR_ITR_INT_MASK 0x00000FFF | 112 | #define IXGBE_EITR_ITR_INT_MASK 0x00000FF8 |
104 | #define IXGBE_EITR_LLI_MOD 0x00008000 | 113 | #define IXGBE_EITR_LLI_MOD 0x00008000 |
105 | #define IXGBE_EITR_CNT_WDIS 0x80000000 | 114 | #define IXGBE_EITR_CNT_WDIS 0x80000000 |
106 | #define IXGBE_IVAR(_i) (0x00900 + ((_i) * 4)) /* 24 at 0x900-0x960 */ | 115 | #define IXGBE_IVAR(_i) (0x00900 + ((_i) * 4)) /* 24 at 0x900-0x960 */ |