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-rw-r--r--arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h1
-rw-r--r--arch/mips/kernel/traps.c4
2 files changed, 1 insertions, 4 deletions
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
index bb291f41b6a3..3d830756b13a 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
@@ -53,6 +53,7 @@
53#define cpu_has_userlocal 0 53#define cpu_has_userlocal 0
54#define cpu_has_vint 0 54#define cpu_has_vint 0
55#define cpu_has_veic 0 55#define cpu_has_veic 0
56#define cpu_hwrena_impl_bits 0xc0000000
56#define ARCH_HAS_READ_CURRENT_TIMER 1 57#define ARCH_HAS_READ_CURRENT_TIMER 1
57#define ARCH_HAS_IRQ_PER_CPU 1 58#define ARCH_HAS_IRQ_PER_CPU 1
58#define ARCH_HAS_SPINLOCK_PREFETCH 1 59#define ARCH_HAS_SPINLOCK_PREFETCH 1
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index f54871797ab9..08f1edf355e8 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1510,10 +1510,6 @@ void __cpuinit per_cpu_trap_init(void)
1510 write_c0_hwrena(enable); 1510 write_c0_hwrena(enable);
1511 } 1511 }
1512 1512
1513#ifdef CONFIG_CPU_CAVIUM_OCTEON
1514 write_c0_hwrena(0xc000000f); /* Octeon has register 30 and 31 */
1515#endif
1516
1517#ifdef CONFIG_MIPS_MT_SMTC 1513#ifdef CONFIG_MIPS_MT_SMTC
1518 if (!secondaryTC) { 1514 if (!secondaryTC) {
1519#endif /* CONFIG_MIPS_MT_SMTC */ 1515#endif /* CONFIG_MIPS_MT_SMTC */