diff options
32 files changed, 251 insertions, 65 deletions
diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S index fedd8076a689..072cc6b61ba3 100644 --- a/arch/arm/mach-clps711x/include/mach/debug-macro.S +++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S | |||
| @@ -11,6 +11,7 @@ | |||
| 11 | * | 11 | * |
| 12 | */ | 12 | */ |
| 13 | 13 | ||
| 14 | #include <mach/hardware.h> | ||
| 14 | #include <asm/hardware/clps7111.h> | 15 | #include <asm/hardware/clps7111.h> |
| 15 | 16 | ||
| 16 | .macro addruart, rx, tmp | 17 | .macro addruart, rx, tmp |
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index e3bc3f6f6b10..88b3dd89be89 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c | |||
| @@ -232,7 +232,7 @@ EXPORT_SYMBOL(__bus_to_virt); | |||
| 232 | 232 | ||
| 233 | unsigned long __pfn_to_bus(unsigned long pfn) | 233 | unsigned long __pfn_to_bus(unsigned long pfn) |
| 234 | { | 234 | { |
| 235 | return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET)); | 235 | return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET); |
| 236 | } | 236 | } |
| 237 | EXPORT_SYMBOL(__pfn_to_bus); | 237 | EXPORT_SYMBOL(__pfn_to_bus); |
| 238 | 238 | ||
diff --git a/arch/arm/mach-h720x/include/mach/debug-macro.S b/arch/arm/mach-h720x/include/mach/debug-macro.S index a9ee8f0d48b7..27cafd12f033 100644 --- a/arch/arm/mach-h720x/include/mach/debug-macro.S +++ b/arch/arm/mach-h720x/include/mach/debug-macro.S | |||
| @@ -11,8 +11,10 @@ | |||
| 11 | * | 11 | * |
| 12 | */ | 12 | */ |
| 13 | 13 | ||
| 14 | .equ io_virt, IO_BASE | 14 | #include <mach/hardware.h> |
| 15 | .equ io_phys, IO_START | 15 | |
| 16 | .equ io_virt, IO_VIRT | ||
| 17 | .equ io_phys, IO_PHYS | ||
| 16 | 18 | ||
| 17 | .macro addruart, rx, tmp | 19 | .macro addruart, rx, tmp |
| 18 | mrc p15, 0, \rx, c1, c0 | 20 | mrc p15, 0, \rx, c1, c0 |
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c index 7221c20b2afa..f781164e623f 100644 --- a/arch/arm/mach-kirkwood/tsx1x-common.c +++ b/arch/arm/mach-kirkwood/tsx1x-common.c | |||
| @@ -77,7 +77,7 @@ struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = { | |||
| 77 | }, | 77 | }, |
| 78 | }; | 78 | }; |
| 79 | 79 | ||
| 80 | void qnap_tsx1x_register_flash(void) | 80 | void __init qnap_tsx1x_register_flash(void) |
| 81 | { | 81 | { |
| 82 | spi_register_board_info(qnap_tsx1x_spi_slave_info, | 82 | spi_register_board_info(qnap_tsx1x_spi_slave_info, |
| 83 | ARRAY_SIZE(qnap_tsx1x_spi_slave_info)); | 83 | ARRAY_SIZE(qnap_tsx1x_spi_slave_info)); |
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.h b/arch/arm/mach-kirkwood/tsx1x-common.h index 9a592962a6ea..7fa037361b55 100644 --- a/arch/arm/mach-kirkwood/tsx1x-common.h +++ b/arch/arm/mach-kirkwood/tsx1x-common.h | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | #ifndef __ARCH_KIRKWOOD_TSX1X_COMMON_H | 1 | #ifndef __ARCH_KIRKWOOD_TSX1X_COMMON_H |
| 2 | #define __ARCH_KIRKWOOD_TSX1X_COMMON_H | 2 | #define __ARCH_KIRKWOOD_TSX1X_COMMON_H |
| 3 | 3 | ||
| 4 | extern void qnap_tsx1x_register_flash(void); | 4 | extern void __init qnap_tsx1x_register_flash(void); |
| 5 | extern void qnap_tsx1x_power_off(void); | 5 | extern void qnap_tsx1x_power_off(void); |
| 6 | 6 | ||
| 7 | #endif | 7 | #endif |
diff --git a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S index 0859336a8e6d..5c934bdb7158 100644 --- a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S +++ b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S | |||
| @@ -8,6 +8,7 @@ | |||
| 8 | * the Free Software Foundation. | 8 | * the Free Software Foundation. |
| 9 | */ | 9 | */ |
| 10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
| 11 | #include <asm/memory.h> | ||
| 11 | 12 | ||
| 12 | #include <mach/regs-board-a9m9750dev.h> | 13 | #include <mach/regs-board-a9m9750dev.h> |
| 13 | 14 | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/uncompress.h b/arch/arm/mach-ns9xxx/include/mach/uncompress.h index 1b12d324b087..770a68c46e81 100644 --- a/arch/arm/mach-ns9xxx/include/mach/uncompress.h +++ b/arch/arm/mach-ns9xxx/include/mach/uncompress.h | |||
| @@ -20,50 +20,49 @@ static void putc_dummy(char c, void __iomem *base) | |||
| 20 | /* nothing */ | 20 | /* nothing */ |
| 21 | } | 21 | } |
| 22 | 22 | ||
| 23 | static int timeout; | ||
| 24 | |||
| 23 | static void putc_ns9360(char c, void __iomem *base) | 25 | static void putc_ns9360(char c, void __iomem *base) |
| 24 | { | 26 | { |
| 25 | static int t = 0x10000; | ||
| 26 | do { | 27 | do { |
| 27 | if (t) | 28 | if (timeout) |
| 28 | --t; | 29 | --timeout; |
| 29 | 30 | ||
| 30 | if (__raw_readl(base + 8) & (1 << 3)) { | 31 | if (__raw_readl(base + 8) & (1 << 3)) { |
| 31 | __raw_writeb(c, base + 16); | 32 | __raw_writeb(c, base + 16); |
| 32 | t = 0x10000; | 33 | timeout = 0x10000; |
| 33 | break; | 34 | break; |
| 34 | } | 35 | } |
| 35 | } while (t); | 36 | } while (timeout); |
| 36 | } | 37 | } |
| 37 | 38 | ||
| 38 | static void putc_a9m9750dev(char c, void __iomem *base) | 39 | static void putc_a9m9750dev(char c, void __iomem *base) |
| 39 | { | 40 | { |
| 40 | static int t = 0x10000; | ||
| 41 | do { | 41 | do { |
| 42 | if (t) | 42 | if (timeout) |
| 43 | --t; | 43 | --timeout; |
| 44 | 44 | ||
| 45 | if (__raw_readb(base + 5) & (1 << 5)) { | 45 | if (__raw_readb(base + 5) & (1 << 5)) { |
| 46 | __raw_writeb(c, base); | 46 | __raw_writeb(c, base); |
| 47 | t = 0x10000; | 47 | timeout = 0x10000; |
| 48 | break; | 48 | break; |
| 49 | } | 49 | } |
| 50 | } while (t); | 50 | } while (timeout); |
| 51 | 51 | ||
| 52 | } | 52 | } |
| 53 | 53 | ||
| 54 | static void putc_ns921x(char c, void __iomem *base) | 54 | static void putc_ns921x(char c, void __iomem *base) |
| 55 | { | 55 | { |
| 56 | static int t = 0x10000; | ||
| 57 | do { | 56 | do { |
| 58 | if (t) | 57 | if (timeout) |
| 59 | --t; | 58 | --timeout; |
| 60 | 59 | ||
| 61 | if (!(__raw_readl(base) & (1 << 11))) { | 60 | if (!(__raw_readl(base) & (1 << 11))) { |
| 62 | __raw_writeb(c, base + 0x0028); | 61 | __raw_writeb(c, base + 0x0028); |
| 63 | t = 0x10000; | 62 | timeout = 0x10000; |
| 64 | break; | 63 | break; |
| 65 | } | 64 | } |
| 66 | } while (t); | 65 | } while (timeout); |
| 67 | } | 66 | } |
| 68 | 67 | ||
| 69 | #define MSCS __REG(0xA0900184) | 68 | #define MSCS __REG(0xA0900184) |
| @@ -89,6 +88,7 @@ static void putc_ns921x(char c, void __iomem *base) | |||
| 89 | 88 | ||
| 90 | static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base) | 89 | static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base) |
| 91 | { | 90 | { |
| 91 | timeout = 0x10000; | ||
| 92 | if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) { | 92 | if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) { |
| 93 | /* ns9360 or ns9750 */ | 93 | /* ns9360 or ns9750 */ |
| 94 | if (NS9360_UART_ENABLED(NS9360_UARTA)) { | 94 | if (NS9360_UART_ENABLED(NS9360_UARTA)) { |
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index 45c23fd6df31..40b6ac2de876 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c | |||
| @@ -26,6 +26,7 @@ | |||
| 26 | #include <mach/colibri.h> | 26 | #include <mach/colibri.h> |
| 27 | #include <mach/ohci.h> | 27 | #include <mach/ohci.h> |
| 28 | #include <mach/pxafb.h> | 28 | #include <mach/pxafb.h> |
| 29 | #include <mach/audio.h> | ||
| 29 | 30 | ||
| 30 | #include "generic.h" | 31 | #include "generic.h" |
| 31 | #include "devices.h" | 32 | #include "devices.h" |
| @@ -145,7 +146,7 @@ static void __init colibri_pxa300_init_lcd(void) | |||
| 145 | static inline void colibri_pxa300_init_lcd(void) {} | 146 | static inline void colibri_pxa300_init_lcd(void) {} |
| 146 | #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ | 147 | #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ |
| 147 | 148 | ||
| 148 | #if defined(SND_AC97_CODEC) || defined(SND_AC97_CODEC_MODULE) | 149 | #if defined(CONFIG_SND_AC97_CODEC) || defined(CONFIG_SND_AC97_CODEC_MODULE) |
| 149 | static mfp_cfg_t colibri_pxa310_ac97_pin_config[] __initdata = { | 150 | static mfp_cfg_t colibri_pxa310_ac97_pin_config[] __initdata = { |
| 150 | GPIO24_AC97_SYSCLK, | 151 | GPIO24_AC97_SYSCLK, |
| 151 | GPIO23_AC97_nACRESET, | 152 | GPIO23_AC97_nACRESET, |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 3d1dcb9ac08f..51ffa6afb675 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
| @@ -446,7 +446,7 @@ static struct platform_device corgiled_device = { | |||
| 446 | static struct pxamci_platform_data corgi_mci_platform_data = { | 446 | static struct pxamci_platform_data corgi_mci_platform_data = { |
| 447 | .detect_delay_ms = 250, | 447 | .detect_delay_ms = 250, |
| 448 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 448 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
| 449 | .gpio_card_detect = -1, | 449 | .gpio_card_detect = CORGI_GPIO_nSD_DETECT, |
| 450 | .gpio_card_ro = CORGI_GPIO_nSD_WP, | 450 | .gpio_card_ro = CORGI_GPIO_nSD_WP, |
| 451 | .gpio_power = CORGI_GPIO_SD_PWR, | 451 | .gpio_power = CORGI_GPIO_SD_PWR, |
| 452 | }; | 452 | }; |
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c index 9e4d9816726a..268a9bc6be8a 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c | |||
| @@ -256,13 +256,9 @@ static void init_sdram_rows(void) | |||
| 256 | 256 | ||
| 257 | static u32 mdrefr_dri(unsigned int freq) | 257 | static u32 mdrefr_dri(unsigned int freq) |
| 258 | { | 258 | { |
| 259 | u32 dri = 0; | 259 | u32 interval = freq * SDRAM_TREF / sdram_rows; |
| 260 | 260 | ||
| 261 | if (cpu_is_pxa25x()) | 261 | return (interval - (cpu_is_pxa27x() ? 31 : 0)) / 32; |
| 262 | dri = ((freq * SDRAM_TREF) / (sdram_rows * 32)); | ||
| 263 | if (cpu_is_pxa27x()) | ||
| 264 | dri = ((freq * SDRAM_TREF) / (sdram_rows - 31)) / 32; | ||
| 265 | return dri; | ||
| 266 | } | 262 | } |
| 267 | 263 | ||
| 268 | /* find a valid frequency point */ | 264 | /* find a valid frequency point */ |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 0af36177ff08..c059dac02b61 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
| @@ -41,10 +41,10 @@ void pxa27x_clear_otgph(void) | |||
| 41 | EXPORT_SYMBOL(pxa27x_clear_otgph); | 41 | EXPORT_SYMBOL(pxa27x_clear_otgph); |
| 42 | 42 | ||
| 43 | static unsigned long ac97_reset_config[] = { | 43 | static unsigned long ac97_reset_config[] = { |
| 44 | GPIO95_AC97_nRESET, | ||
| 45 | GPIO95_GPIO, | ||
| 46 | GPIO113_AC97_nRESET, | ||
| 47 | GPIO113_GPIO, | 44 | GPIO113_GPIO, |
| 45 | GPIO113_AC97_nRESET, | ||
| 46 | GPIO95_GPIO, | ||
| 47 | GPIO95_AC97_nRESET, | ||
| 48 | }; | 48 | }; |
| 49 | 49 | ||
| 50 | void pxa27x_assert_ac97reset(int reset_gpio, int on) | 50 | void pxa27x_assert_ac97reset(int reset_gpio, int on) |
diff --git a/arch/arm/mach-shark/include/mach/debug-macro.S b/arch/arm/mach-shark/include/mach/debug-macro.S index 50f071c5bf4d..5ea24d4d1ba6 100644 --- a/arch/arm/mach-shark/include/mach/debug-macro.S +++ b/arch/arm/mach-shark/include/mach/debug-macro.S | |||
| @@ -20,6 +20,9 @@ | |||
| 20 | strb \rd, [\rx] | 20 | strb \rd, [\rx] |
| 21 | .endm | 21 | .endm |
| 22 | 22 | ||
| 23 | .macro waituart,rd,rx | ||
| 24 | .endm | ||
| 25 | |||
| 23 | .macro busyuart,rd,rx | 26 | .macro busyuart,rd,rx |
| 24 | mov \rd, #0 | 27 | mov \rd, #0 |
| 25 | 1001: add \rd, \rd, #1 | 28 | 1001: add \rd, \rd, #1 |
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c index 642207e18198..83c56324a472 100644 --- a/arch/arm/mach-w90x900/cpu.c +++ b/arch/arm/mach-w90x900/cpu.c | |||
| @@ -93,7 +93,7 @@ static struct clk_lookup nuc900_clkregs[] = { | |||
| 93 | DEF_CLKLOOK(&clk_kpi, "nuc900-kpi", NULL), | 93 | DEF_CLKLOOK(&clk_kpi, "nuc900-kpi", NULL), |
| 94 | DEF_CLKLOOK(&clk_wdt, "nuc900-wdt", NULL), | 94 | DEF_CLKLOOK(&clk_wdt, "nuc900-wdt", NULL), |
| 95 | DEF_CLKLOOK(&clk_gdma, "nuc900-gdma", NULL), | 95 | DEF_CLKLOOK(&clk_gdma, "nuc900-gdma", NULL), |
| 96 | DEF_CLKLOOK(&clk_adc, "nuc900-adc", NULL), | 96 | DEF_CLKLOOK(&clk_adc, "nuc900-ts", NULL), |
| 97 | DEF_CLKLOOK(&clk_usi, "nuc900-spi", NULL), | 97 | DEF_CLKLOOK(&clk_usi, "nuc900-spi", NULL), |
| 98 | DEF_CLKLOOK(&clk_ext, NULL, "ext"), | 98 | DEF_CLKLOOK(&clk_ext, NULL, "ext"), |
| 99 | DEF_CLKLOOK(&clk_timer0, NULL, "timer0"), | 99 | DEF_CLKLOOK(&clk_timer0, NULL, "timer0"), |
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S index 1670734b7e51..37fa593884ee 100644 --- a/arch/arm/plat-spear/include/plat/debug-macro.S +++ b/arch/arm/plat-spear/include/plat/debug-macro.S | |||
| @@ -17,8 +17,8 @@ | |||
| 17 | .macro addruart, rx | 17 | .macro addruart, rx |
| 18 | mrc p15, 0, \rx, c1, c0 | 18 | mrc p15, 0, \rx, c1, c0 |
| 19 | tst \rx, #1 @ MMU enabled? | 19 | tst \rx, #1 @ MMU enabled? |
| 20 | moveq \rx, =SPEAR_DBG_UART_BASE @ Physical base | 20 | moveq \rx, #SPEAR_DBG_UART_BASE @ Physical base |
| 21 | movne \rx, =VA_SPEAR_DBG_UART_BASE @ Virtual base | 21 | movne \rx, #VA_SPEAR_DBG_UART_BASE @ Virtual base |
| 22 | .endm | 22 | .endm |
| 23 | 23 | ||
| 24 | .macro senduart, rd, rx | 24 | .macro senduart, rd, rx |
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h index 89d66ca4d87c..2331bdc2b549 100644 --- a/arch/x86/kvm/paging_tmpl.h +++ b/arch/x86/kvm/paging_tmpl.h | |||
| @@ -342,6 +342,7 @@ static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr, | |||
| 342 | /* advance table_gfn when emulating 1gb pages with 4k */ | 342 | /* advance table_gfn when emulating 1gb pages with 4k */ |
| 343 | if (delta == 0) | 343 | if (delta == 0) |
| 344 | table_gfn += PT_INDEX(addr, level); | 344 | table_gfn += PT_INDEX(addr, level); |
| 345 | access &= gw->pte_access; | ||
| 345 | } else { | 346 | } else { |
| 346 | direct = 0; | 347 | direct = 0; |
| 347 | table_gfn = gw->table_gfn[level - 2]; | 348 | table_gfn = gw->table_gfn[level - 2]; |
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 05d571f6f196..7fa89c39c64f 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c | |||
| @@ -1562,7 +1562,7 @@ static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs, | |||
| 1562 | 1562 | ||
| 1563 | r = -ENOMEM; | 1563 | r = -ENOMEM; |
| 1564 | size = sizeof(struct kvm_msr_entry) * msrs.nmsrs; | 1564 | size = sizeof(struct kvm_msr_entry) * msrs.nmsrs; |
| 1565 | entries = vmalloc(size); | 1565 | entries = kmalloc(size, GFP_KERNEL); |
| 1566 | if (!entries) | 1566 | if (!entries) |
| 1567 | goto out; | 1567 | goto out; |
| 1568 | 1568 | ||
| @@ -1581,7 +1581,7 @@ static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs, | |||
| 1581 | r = n; | 1581 | r = n; |
| 1582 | 1582 | ||
| 1583 | out_free: | 1583 | out_free: |
| 1584 | vfree(entries); | 1584 | kfree(entries); |
| 1585 | out: | 1585 | out: |
| 1586 | return r; | 1586 | return r; |
| 1587 | } | 1587 | } |
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 9344216183a4..a7547150a705 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c | |||
| @@ -1216,17 +1216,20 @@ static int intel_i915_get_gtt_size(void) | |||
| 1216 | 1216 | ||
| 1217 | /* G33's GTT size defined in gmch_ctrl */ | 1217 | /* G33's GTT size defined in gmch_ctrl */ |
| 1218 | pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl); | 1218 | pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl); |
| 1219 | switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) { | 1219 | switch (gmch_ctrl & I830_GMCH_GMS_MASK) { |
| 1220 | case G33_PGETBL_SIZE_1M: | 1220 | case I830_GMCH_GMS_STOLEN_512: |
| 1221 | size = 512; | ||
| 1222 | break; | ||
| 1223 | case I830_GMCH_GMS_STOLEN_1024: | ||
| 1221 | size = 1024; | 1224 | size = 1024; |
| 1222 | break; | 1225 | break; |
| 1223 | case G33_PGETBL_SIZE_2M: | 1226 | case I830_GMCH_GMS_STOLEN_8192: |
| 1224 | size = 2048; | 1227 | size = 8*1024; |
| 1225 | break; | 1228 | break; |
| 1226 | default: | 1229 | default: |
| 1227 | dev_info(&agp_bridge->dev->dev, | 1230 | dev_info(&agp_bridge->dev->dev, |
| 1228 | "unknown page table size 0x%x, assuming 512KB\n", | 1231 | "unknown page table size 0x%x, assuming 512KB\n", |
| 1229 | (gmch_ctrl & G33_PGETBL_SIZE_MASK)); | 1232 | (gmch_ctrl & I830_GMCH_GMS_MASK)); |
| 1230 | size = 512; | 1233 | size = 512; |
| 1231 | } | 1234 | } |
| 1232 | } else { | 1235 | } else { |
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c index 24314a9cffe8..1030f8420137 100644 --- a/drivers/char/tpm/tpm_tis.c +++ b/drivers/char/tpm/tpm_tis.c | |||
| @@ -623,7 +623,14 @@ static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg) | |||
| 623 | 623 | ||
| 624 | static int tpm_tis_pnp_resume(struct pnp_dev *dev) | 624 | static int tpm_tis_pnp_resume(struct pnp_dev *dev) |
| 625 | { | 625 | { |
| 626 | return tpm_pm_resume(&dev->dev); | 626 | struct tpm_chip *chip = pnp_get_drvdata(dev); |
| 627 | int ret; | ||
| 628 | |||
| 629 | ret = tpm_pm_resume(&dev->dev); | ||
| 630 | if (!ret) | ||
| 631 | tpm_continue_selftest(chip); | ||
| 632 | |||
| 633 | return ret; | ||
| 627 | } | 634 | } |
| 628 | 635 | ||
| 629 | static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = { | 636 | static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = { |
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index cc9357da0e34..e0187d16dd7c 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c | |||
| @@ -1300,7 +1300,7 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno, | |||
| 1300 | if (devno == 0) | 1300 | if (devno == 0) |
| 1301 | return -ENODEV; | 1301 | return -ENODEV; |
| 1302 | 1302 | ||
| 1303 | i7core_printk(KERN_ERR, | 1303 | i7core_printk(KERN_INFO, |
| 1304 | "Device not found: dev %02x.%d PCI ID %04x:%04x\n", | 1304 | "Device not found: dev %02x.%d PCI ID %04x:%04x\n", |
| 1305 | dev_descr->dev, dev_descr->func, | 1305 | dev_descr->dev, dev_descr->func, |
| 1306 | PCI_VENDOR_ID_INTEL, dev_descr->dev_id); | 1306 | PCI_VENDOR_ID_INTEL, dev_descr->dev_id); |
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index aee83fa178f6..9214119c0154 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
| @@ -605,6 +605,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused) | |||
| 605 | case FBC_NOT_TILED: | 605 | case FBC_NOT_TILED: |
| 606 | seq_printf(m, "scanout buffer not tiled"); | 606 | seq_printf(m, "scanout buffer not tiled"); |
| 607 | break; | 607 | break; |
| 608 | case FBC_MULTIPLE_PIPES: | ||
| 609 | seq_printf(m, "multiple pipes are enabled"); | ||
| 610 | break; | ||
| 608 | default: | 611 | default: |
| 609 | seq_printf(m, "unknown reason"); | 612 | seq_printf(m, "unknown reason"); |
| 610 | } | 613 | } |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index f00c5ae9556c..2305a1234f1e 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
| @@ -1300,7 +1300,7 @@ static void i915_cleanup_compression(struct drm_device *dev) | |||
| 1300 | struct drm_i915_private *dev_priv = dev->dev_private; | 1300 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1301 | 1301 | ||
| 1302 | drm_mm_put_block(dev_priv->compressed_fb); | 1302 | drm_mm_put_block(dev_priv->compressed_fb); |
| 1303 | if (!IS_GM45(dev)) | 1303 | if (dev_priv->compressed_llb) |
| 1304 | drm_mm_put_block(dev_priv->compressed_llb); | 1304 | drm_mm_put_block(dev_priv->compressed_llb); |
| 1305 | } | 1305 | } |
| 1306 | 1306 | ||
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index d147ab2f5bfc..2e1744d37ad5 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
| @@ -215,6 +215,7 @@ enum no_fbc_reason { | |||
| 215 | FBC_MODE_TOO_LARGE, /* mode too large for compression */ | 215 | FBC_MODE_TOO_LARGE, /* mode too large for compression */ |
| 216 | FBC_BAD_PLANE, /* fbc not supported on plane */ | 216 | FBC_BAD_PLANE, /* fbc not supported on plane */ |
| 217 | FBC_NOT_TILED, /* buffer not tiled */ | 217 | FBC_NOT_TILED, /* buffer not tiled */ |
| 218 | FBC_MULTIPLE_PIPES, /* more than one pipe active */ | ||
| 218 | }; | 219 | }; |
| 219 | 220 | ||
| 220 | enum intel_pch { | 221 | enum intel_pch { |
| @@ -222,6 +223,8 @@ enum intel_pch { | |||
| 222 | PCH_CPT, /* Cougarpoint PCH */ | 223 | PCH_CPT, /* Cougarpoint PCH */ |
| 223 | }; | 224 | }; |
| 224 | 225 | ||
| 226 | #define QUIRK_PIPEA_FORCE (1<<0) | ||
| 227 | |||
| 225 | struct intel_fbdev; | 228 | struct intel_fbdev; |
| 226 | 229 | ||
| 227 | typedef struct drm_i915_private { | 230 | typedef struct drm_i915_private { |
| @@ -337,6 +340,8 @@ typedef struct drm_i915_private { | |||
| 337 | /* PCH chipset type */ | 340 | /* PCH chipset type */ |
| 338 | enum intel_pch pch_type; | 341 | enum intel_pch pch_type; |
| 339 | 342 | ||
| 343 | unsigned long quirks; | ||
| 344 | |||
| 340 | /* Register state */ | 345 | /* Register state */ |
| 341 | bool modeset_on_lid; | 346 | bool modeset_on_lid; |
| 342 | u8 saveLBB; | 347 | u8 saveLBB; |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 51bd301cf10d..5aa747fc25a9 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
| @@ -3647,6 +3647,7 @@ i915_gem_wait_for_pending_flip(struct drm_device *dev, | |||
| 3647 | return ret; | 3647 | return ret; |
| 3648 | } | 3648 | } |
| 3649 | 3649 | ||
| 3650 | |||
| 3650 | int | 3651 | int |
| 3651 | i915_gem_do_execbuffer(struct drm_device *dev, void *data, | 3652 | i915_gem_do_execbuffer(struct drm_device *dev, void *data, |
| 3652 | struct drm_file *file_priv, | 3653 | struct drm_file *file_priv, |
| @@ -3794,7 +3795,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, | |||
| 3794 | unsigned long long total_size = 0; | 3795 | unsigned long long total_size = 0; |
| 3795 | int num_fences = 0; | 3796 | int num_fences = 0; |
| 3796 | for (i = 0; i < args->buffer_count; i++) { | 3797 | for (i = 0; i < args->buffer_count; i++) { |
| 3797 | obj_priv = object_list[i]->driver_private; | 3798 | obj_priv = to_intel_bo(object_list[i]); |
| 3798 | 3799 | ||
| 3799 | total_size += object_list[i]->size; | 3800 | total_size += object_list[i]->size; |
| 3800 | num_fences += | 3801 | num_fences += |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 6d9b0288272a..cf41c672defe 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
| @@ -2869,6 +2869,7 @@ | |||
| 2869 | 2869 | ||
| 2870 | #define PCH_PP_STATUS 0xc7200 | 2870 | #define PCH_PP_STATUS 0xc7200 |
| 2871 | #define PCH_PP_CONTROL 0xc7204 | 2871 | #define PCH_PP_CONTROL 0xc7204 |
| 2872 | #define PANEL_UNLOCK_REGS (0xabcd << 16) | ||
| 2872 | #define EDP_FORCE_VDD (1 << 3) | 2873 | #define EDP_FORCE_VDD (1 << 3) |
| 2873 | #define EDP_BLC_ENABLE (1 << 2) | 2874 | #define EDP_BLC_ENABLE (1 << 2) |
| 2874 | #define PANEL_POWER_RESET (1 << 1) | 2875 | #define PANEL_POWER_RESET (1 << 1) |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 68dcf36e2793..5e21b3119824 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
| @@ -862,8 +862,8 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, | |||
| 862 | intel_clock_t clock; | 862 | intel_clock_t clock; |
| 863 | int max_n; | 863 | int max_n; |
| 864 | bool found; | 864 | bool found; |
| 865 | /* approximately equals target * 0.00488 */ | 865 | /* approximately equals target * 0.00585 */ |
| 866 | int err_most = (target >> 8) + (target >> 10); | 866 | int err_most = (target >> 8) + (target >> 9); |
| 867 | found = false; | 867 | found = false; |
| 868 | 868 | ||
| 869 | if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { | 869 | if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { |
| @@ -1180,8 +1180,12 @@ static void intel_update_fbc(struct drm_crtc *crtc, | |||
| 1180 | struct drm_framebuffer *fb = crtc->fb; | 1180 | struct drm_framebuffer *fb = crtc->fb; |
| 1181 | struct intel_framebuffer *intel_fb; | 1181 | struct intel_framebuffer *intel_fb; |
| 1182 | struct drm_i915_gem_object *obj_priv; | 1182 | struct drm_i915_gem_object *obj_priv; |
| 1183 | struct drm_crtc *tmp_crtc; | ||
| 1183 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 1184 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
| 1184 | int plane = intel_crtc->plane; | 1185 | int plane = intel_crtc->plane; |
| 1186 | int crtcs_enabled = 0; | ||
| 1187 | |||
| 1188 | DRM_DEBUG_KMS("\n"); | ||
| 1185 | 1189 | ||
| 1186 | if (!i915_powersave) | 1190 | if (!i915_powersave) |
| 1187 | return; | 1191 | return; |
| @@ -1199,10 +1203,21 @@ static void intel_update_fbc(struct drm_crtc *crtc, | |||
| 1199 | * If FBC is already on, we just have to verify that we can | 1203 | * If FBC is already on, we just have to verify that we can |
| 1200 | * keep it that way... | 1204 | * keep it that way... |
| 1201 | * Need to disable if: | 1205 | * Need to disable if: |
| 1206 | * - more than one pipe is active | ||
| 1202 | * - changing FBC params (stride, fence, mode) | 1207 | * - changing FBC params (stride, fence, mode) |
| 1203 | * - new fb is too large to fit in compressed buffer | 1208 | * - new fb is too large to fit in compressed buffer |
| 1204 | * - going to an unsupported config (interlace, pixel multiply, etc.) | 1209 | * - going to an unsupported config (interlace, pixel multiply, etc.) |
| 1205 | */ | 1210 | */ |
| 1211 | list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) { | ||
| 1212 | if (tmp_crtc->enabled) | ||
| 1213 | crtcs_enabled++; | ||
| 1214 | } | ||
| 1215 | DRM_DEBUG_KMS("%d pipes active\n", crtcs_enabled); | ||
| 1216 | if (crtcs_enabled > 1) { | ||
| 1217 | DRM_DEBUG_KMS("more than one pipe active, disabling compression\n"); | ||
| 1218 | dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES; | ||
| 1219 | goto out_disable; | ||
| 1220 | } | ||
| 1206 | if (intel_fb->obj->size > dev_priv->cfb_size) { | 1221 | if (intel_fb->obj->size > dev_priv->cfb_size) { |
| 1207 | DRM_DEBUG_KMS("framebuffer too large, disabling " | 1222 | DRM_DEBUG_KMS("framebuffer too large, disabling " |
| 1208 | "compression\n"); | 1223 | "compression\n"); |
| @@ -1255,7 +1270,7 @@ out_disable: | |||
| 1255 | } | 1270 | } |
| 1256 | } | 1271 | } |
| 1257 | 1272 | ||
| 1258 | static int | 1273 | int |
| 1259 | intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj) | 1274 | intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj) |
| 1260 | { | 1275 | { |
| 1261 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); | 1276 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
| @@ -2255,6 +2270,11 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
| 2255 | intel_wait_for_vblank(dev); | 2270 | intel_wait_for_vblank(dev); |
| 2256 | } | 2271 | } |
| 2257 | 2272 | ||
| 2273 | /* Don't disable pipe A or pipe A PLLs if needed */ | ||
| 2274 | if (pipeconf_reg == PIPEACONF && | ||
| 2275 | (dev_priv->quirks & QUIRK_PIPEA_FORCE)) | ||
| 2276 | goto skip_pipe_off; | ||
| 2277 | |||
| 2258 | /* Next, disable display pipes */ | 2278 | /* Next, disable display pipes */ |
| 2259 | temp = I915_READ(pipeconf_reg); | 2279 | temp = I915_READ(pipeconf_reg); |
| 2260 | if ((temp & PIPEACONF_ENABLE) != 0) { | 2280 | if ((temp & PIPEACONF_ENABLE) != 0) { |
| @@ -2270,7 +2290,7 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
| 2270 | I915_WRITE(dpll_reg, temp & ~DPLL_VCO_ENABLE); | 2290 | I915_WRITE(dpll_reg, temp & ~DPLL_VCO_ENABLE); |
| 2271 | I915_READ(dpll_reg); | 2291 | I915_READ(dpll_reg); |
| 2272 | } | 2292 | } |
| 2273 | 2293 | skip_pipe_off: | |
| 2274 | /* Wait for the clocks to turn off. */ | 2294 | /* Wait for the clocks to turn off. */ |
| 2275 | udelay(150); | 2295 | udelay(150); |
| 2276 | break; | 2296 | break; |
| @@ -2356,8 +2376,6 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc, | |||
| 2356 | if (mode->clock * 3 > 27000 * 4) | 2376 | if (mode->clock * 3 > 27000 * 4) |
| 2357 | return MODE_CLOCK_HIGH; | 2377 | return MODE_CLOCK_HIGH; |
| 2358 | } | 2378 | } |
| 2359 | |||
| 2360 | drm_mode_set_crtcinfo(adjusted_mode, 0); | ||
| 2361 | return true; | 2379 | return true; |
| 2362 | } | 2380 | } |
| 2363 | 2381 | ||
| @@ -3736,6 +3754,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
| 3736 | if (dev_priv->lvds_dither) { | 3754 | if (dev_priv->lvds_dither) { |
| 3737 | if (HAS_PCH_SPLIT(dev)) { | 3755 | if (HAS_PCH_SPLIT(dev)) { |
| 3738 | pipeconf |= PIPE_ENABLE_DITHER; | 3756 | pipeconf |= PIPE_ENABLE_DITHER; |
| 3757 | pipeconf &= ~PIPE_DITHER_TYPE_MASK; | ||
| 3739 | pipeconf |= PIPE_DITHER_TYPE_ST01; | 3758 | pipeconf |= PIPE_DITHER_TYPE_ST01; |
| 3740 | } else | 3759 | } else |
| 3741 | lvds |= LVDS_ENABLE_DITHER; | 3760 | lvds |= LVDS_ENABLE_DITHER; |
| @@ -4412,7 +4431,8 @@ static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule) | |||
| 4412 | DRM_DEBUG_DRIVER("upclocking LVDS\n"); | 4431 | DRM_DEBUG_DRIVER("upclocking LVDS\n"); |
| 4413 | 4432 | ||
| 4414 | /* Unlock panel regs */ | 4433 | /* Unlock panel regs */ |
| 4415 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16)); | 4434 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | |
| 4435 | PANEL_UNLOCK_REGS); | ||
| 4416 | 4436 | ||
| 4417 | dpll &= ~DISPLAY_RATE_SELECT_FPA1; | 4437 | dpll &= ~DISPLAY_RATE_SELECT_FPA1; |
| 4418 | I915_WRITE(dpll_reg, dpll); | 4438 | I915_WRITE(dpll_reg, dpll); |
| @@ -4455,7 +4475,8 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
| 4455 | DRM_DEBUG_DRIVER("downclocking LVDS\n"); | 4475 | DRM_DEBUG_DRIVER("downclocking LVDS\n"); |
| 4456 | 4476 | ||
| 4457 | /* Unlock panel regs */ | 4477 | /* Unlock panel regs */ |
| 4458 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16)); | 4478 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | |
| 4479 | PANEL_UNLOCK_REGS); | ||
| 4459 | 4480 | ||
| 4460 | dpll |= DISPLAY_RATE_SELECT_FPA1; | 4481 | dpll |= DISPLAY_RATE_SELECT_FPA1; |
| 4461 | I915_WRITE(dpll_reg, dpll); | 4482 | I915_WRITE(dpll_reg, dpll); |
| @@ -4695,7 +4716,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, | |||
| 4695 | struct drm_gem_object *obj; | 4716 | struct drm_gem_object *obj; |
| 4696 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 4717 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
| 4697 | struct intel_unpin_work *work; | 4718 | struct intel_unpin_work *work; |
| 4698 | unsigned long flags; | 4719 | unsigned long flags, offset; |
| 4699 | int pipesrc_reg = (intel_crtc->pipe == 0) ? PIPEASRC : PIPEBSRC; | 4720 | int pipesrc_reg = (intel_crtc->pipe == 0) ? PIPEASRC : PIPEBSRC; |
| 4700 | int ret, pipesrc; | 4721 | int ret, pipesrc; |
| 4701 | u32 flip_mask; | 4722 | u32 flip_mask; |
| @@ -4762,19 +4783,23 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, | |||
| 4762 | while (I915_READ(ISR) & flip_mask) | 4783 | while (I915_READ(ISR) & flip_mask) |
| 4763 | ; | 4784 | ; |
| 4764 | 4785 | ||
| 4786 | /* Offset into the new buffer for cases of shared fbs between CRTCs */ | ||
| 4787 | offset = obj_priv->gtt_offset; | ||
| 4788 | offset += (crtc->y * fb->pitch) + (crtc->x * (fb->bits_per_pixel) / 8); | ||
| 4789 | |||
| 4765 | BEGIN_LP_RING(4); | 4790 | BEGIN_LP_RING(4); |
| 4766 | if (IS_I965G(dev)) { | 4791 | if (IS_I965G(dev)) { |
| 4767 | OUT_RING(MI_DISPLAY_FLIP | | 4792 | OUT_RING(MI_DISPLAY_FLIP | |
| 4768 | MI_DISPLAY_FLIP_PLANE(intel_crtc->plane)); | 4793 | MI_DISPLAY_FLIP_PLANE(intel_crtc->plane)); |
| 4769 | OUT_RING(fb->pitch); | 4794 | OUT_RING(fb->pitch); |
| 4770 | OUT_RING(obj_priv->gtt_offset | obj_priv->tiling_mode); | 4795 | OUT_RING(offset | obj_priv->tiling_mode); |
| 4771 | pipesrc = I915_READ(pipesrc_reg); | 4796 | pipesrc = I915_READ(pipesrc_reg); |
| 4772 | OUT_RING(pipesrc & 0x0fff0fff); | 4797 | OUT_RING(pipesrc & 0x0fff0fff); |
| 4773 | } else { | 4798 | } else { |
| 4774 | OUT_RING(MI_DISPLAY_FLIP_I915 | | 4799 | OUT_RING(MI_DISPLAY_FLIP_I915 | |
| 4775 | MI_DISPLAY_FLIP_PLANE(intel_crtc->plane)); | 4800 | MI_DISPLAY_FLIP_PLANE(intel_crtc->plane)); |
| 4776 | OUT_RING(fb->pitch); | 4801 | OUT_RING(fb->pitch); |
| 4777 | OUT_RING(obj_priv->gtt_offset); | 4802 | OUT_RING(offset); |
| 4778 | OUT_RING(MI_NOOP); | 4803 | OUT_RING(MI_NOOP); |
| 4779 | } | 4804 | } |
| 4780 | ADVANCE_LP_RING(); | 4805 | ADVANCE_LP_RING(); |
| @@ -5506,6 +5531,66 @@ static void intel_init_display(struct drm_device *dev) | |||
| 5506 | } | 5531 | } |
| 5507 | } | 5532 | } |
| 5508 | 5533 | ||
| 5534 | /* | ||
| 5535 | * Some BIOSes insist on assuming the GPU's pipe A is enabled at suspend, | ||
| 5536 | * resume, or other times. This quirk makes sure that's the case for | ||
| 5537 | * affected systems. | ||
| 5538 | */ | ||
| 5539 | static void quirk_pipea_force (struct drm_device *dev) | ||
| 5540 | { | ||
| 5541 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
| 5542 | |||
| 5543 | dev_priv->quirks |= QUIRK_PIPEA_FORCE; | ||
| 5544 | DRM_DEBUG_DRIVER("applying pipe a force quirk\n"); | ||
| 5545 | } | ||
| 5546 | |||
| 5547 | struct intel_quirk { | ||
| 5548 | int device; | ||
| 5549 | int subsystem_vendor; | ||
| 5550 | int subsystem_device; | ||
| 5551 | void (*hook)(struct drm_device *dev); | ||
| 5552 | }; | ||
| 5553 | |||
| 5554 | struct intel_quirk intel_quirks[] = { | ||
| 5555 | /* HP Compaq 2730p needs pipe A force quirk (LP: #291555) */ | ||
| 5556 | { 0x2a42, 0x103c, 0x30eb, quirk_pipea_force }, | ||
| 5557 | /* HP Mini needs pipe A force quirk (LP: #322104) */ | ||
| 5558 | { 0x27ae,0x103c, 0x361a, quirk_pipea_force }, | ||
| 5559 | |||
| 5560 | /* Thinkpad R31 needs pipe A force quirk */ | ||
| 5561 | { 0x3577, 0x1014, 0x0505, quirk_pipea_force }, | ||
| 5562 | /* Toshiba Protege R-205, S-209 needs pipe A force quirk */ | ||
| 5563 | { 0x2592, 0x1179, 0x0001, quirk_pipea_force }, | ||
| 5564 | |||
| 5565 | /* ThinkPad X30 needs pipe A force quirk (LP: #304614) */ | ||
| 5566 | { 0x3577, 0x1014, 0x0513, quirk_pipea_force }, | ||
| 5567 | /* ThinkPad X40 needs pipe A force quirk */ | ||
| 5568 | |||
| 5569 | /* ThinkPad T60 needs pipe A force quirk (bug #16494) */ | ||
| 5570 | { 0x2782, 0x17aa, 0x201a, quirk_pipea_force }, | ||
| 5571 | |||
| 5572 | /* 855 & before need to leave pipe A & dpll A up */ | ||
| 5573 | { 0x3582, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force }, | ||
| 5574 | { 0x2562, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force }, | ||
| 5575 | }; | ||
| 5576 | |||
| 5577 | static void intel_init_quirks(struct drm_device *dev) | ||
| 5578 | { | ||
| 5579 | struct pci_dev *d = dev->pdev; | ||
| 5580 | int i; | ||
| 5581 | |||
| 5582 | for (i = 0; i < ARRAY_SIZE(intel_quirks); i++) { | ||
| 5583 | struct intel_quirk *q = &intel_quirks[i]; | ||
| 5584 | |||
| 5585 | if (d->device == q->device && | ||
| 5586 | (d->subsystem_vendor == q->subsystem_vendor || | ||
| 5587 | q->subsystem_vendor == PCI_ANY_ID) && | ||
| 5588 | (d->subsystem_device == q->subsystem_device || | ||
| 5589 | q->subsystem_device == PCI_ANY_ID)) | ||
| 5590 | q->hook(dev); | ||
| 5591 | } | ||
| 5592 | } | ||
| 5593 | |||
| 5509 | void intel_modeset_init(struct drm_device *dev) | 5594 | void intel_modeset_init(struct drm_device *dev) |
| 5510 | { | 5595 | { |
| 5511 | struct drm_i915_private *dev_priv = dev->dev_private; | 5596 | struct drm_i915_private *dev_priv = dev->dev_private; |
| @@ -5518,6 +5603,8 @@ void intel_modeset_init(struct drm_device *dev) | |||
| 5518 | 5603 | ||
| 5519 | dev->mode_config.funcs = (void *)&intel_mode_funcs; | 5604 | dev->mode_config.funcs = (void *)&intel_mode_funcs; |
| 5520 | 5605 | ||
| 5606 | intel_init_quirks(dev); | ||
| 5607 | |||
| 5521 | intel_init_display(dev); | 5608 | intel_init_display(dev); |
| 5522 | 5609 | ||
| 5523 | if (IS_I965G(dev)) { | 5610 | if (IS_I965G(dev)) { |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 1aac59e83bff..5d4266115311 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
| @@ -717,6 +717,51 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
| 717 | } | 717 | } |
| 718 | } | 718 | } |
| 719 | 719 | ||
| 720 | static void ironlake_edp_panel_on (struct drm_device *dev) | ||
| 721 | { | ||
| 722 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
| 723 | unsigned long timeout = jiffies + msecs_to_jiffies(5000); | ||
| 724 | u32 pp, pp_status; | ||
| 725 | |||
| 726 | pp_status = I915_READ(PCH_PP_STATUS); | ||
| 727 | if (pp_status & PP_ON) | ||
| 728 | return; | ||
| 729 | |||
| 730 | pp = I915_READ(PCH_PP_CONTROL); | ||
| 731 | pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON; | ||
| 732 | I915_WRITE(PCH_PP_CONTROL, pp); | ||
| 733 | do { | ||
| 734 | pp_status = I915_READ(PCH_PP_STATUS); | ||
| 735 | } while (((pp_status & PP_ON) == 0) && !time_after(jiffies, timeout)); | ||
| 736 | |||
| 737 | if (time_after(jiffies, timeout)) | ||
| 738 | DRM_DEBUG_KMS("panel on wait timed out: 0x%08x\n", pp_status); | ||
| 739 | |||
| 740 | pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD); | ||
| 741 | I915_WRITE(PCH_PP_CONTROL, pp); | ||
| 742 | } | ||
| 743 | |||
| 744 | static void ironlake_edp_panel_off (struct drm_device *dev) | ||
| 745 | { | ||
| 746 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
| 747 | unsigned long timeout = jiffies + msecs_to_jiffies(5000); | ||
| 748 | u32 pp, pp_status; | ||
| 749 | |||
| 750 | pp = I915_READ(PCH_PP_CONTROL); | ||
| 751 | pp &= ~POWER_TARGET_ON; | ||
| 752 | I915_WRITE(PCH_PP_CONTROL, pp); | ||
| 753 | do { | ||
| 754 | pp_status = I915_READ(PCH_PP_STATUS); | ||
| 755 | } while ((pp_status & PP_ON) && !time_after(jiffies, timeout)); | ||
| 756 | |||
| 757 | if (time_after(jiffies, timeout)) | ||
| 758 | DRM_DEBUG_KMS("panel off wait timed out\n"); | ||
| 759 | |||
| 760 | /* Make sure VDD is enabled so DP AUX will work */ | ||
| 761 | pp |= EDP_FORCE_VDD; | ||
| 762 | I915_WRITE(PCH_PP_CONTROL, pp); | ||
| 763 | } | ||
| 764 | |||
| 720 | static void ironlake_edp_backlight_on (struct drm_device *dev) | 765 | static void ironlake_edp_backlight_on (struct drm_device *dev) |
| 721 | { | 766 | { |
| 722 | struct drm_i915_private *dev_priv = dev->dev_private; | 767 | struct drm_i915_private *dev_priv = dev->dev_private; |
| @@ -751,14 +796,18 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) | |||
| 751 | if (mode != DRM_MODE_DPMS_ON) { | 796 | if (mode != DRM_MODE_DPMS_ON) { |
| 752 | if (dp_reg & DP_PORT_EN) { | 797 | if (dp_reg & DP_PORT_EN) { |
| 753 | intel_dp_link_down(intel_encoder, dp_priv->DP); | 798 | intel_dp_link_down(intel_encoder, dp_priv->DP); |
| 754 | if (IS_eDP(intel_encoder)) | 799 | if (IS_eDP(intel_encoder)) { |
| 755 | ironlake_edp_backlight_off(dev); | 800 | ironlake_edp_backlight_off(dev); |
| 801 | ironlake_edp_backlight_off(dev); | ||
| 802 | } | ||
| 756 | } | 803 | } |
| 757 | } else { | 804 | } else { |
| 758 | if (!(dp_reg & DP_PORT_EN)) { | 805 | if (!(dp_reg & DP_PORT_EN)) { |
| 759 | intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration); | 806 | intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration); |
| 760 | if (IS_eDP(intel_encoder)) | 807 | if (IS_eDP(intel_encoder)) { |
| 808 | ironlake_edp_panel_on(dev); | ||
| 761 | ironlake_edp_backlight_on(dev); | 809 | ironlake_edp_backlight_on(dev); |
| 810 | } | ||
| 762 | } | 811 | } |
| 763 | } | 812 | } |
| 764 | dp_priv->dpms_mode = mode; | 813 | dp_priv->dpms_mode = mode; |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 72206f37c4fb..2f7970be9051 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
| @@ -215,6 +215,9 @@ extern void intel_init_clock_gating(struct drm_device *dev); | |||
| 215 | extern void ironlake_enable_drps(struct drm_device *dev); | 215 | extern void ironlake_enable_drps(struct drm_device *dev); |
| 216 | extern void ironlake_disable_drps(struct drm_device *dev); | 216 | extern void ironlake_disable_drps(struct drm_device *dev); |
| 217 | 217 | ||
| 218 | extern int intel_pin_and_fence_fb_obj(struct drm_device *dev, | ||
| 219 | struct drm_gem_object *obj); | ||
| 220 | |||
| 218 | extern int intel_framebuffer_init(struct drm_device *dev, | 221 | extern int intel_framebuffer_init(struct drm_device *dev, |
| 219 | struct intel_framebuffer *ifb, | 222 | struct intel_framebuffer *ifb, |
| 220 | struct drm_mode_fb_cmd *mode_cmd, | 223 | struct drm_mode_fb_cmd *mode_cmd, |
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c index c3c505244e07..3e18c9e7729b 100644 --- a/drivers/gpu/drm/i915/intel_fb.c +++ b/drivers/gpu/drm/i915/intel_fb.c | |||
| @@ -98,7 +98,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev, | |||
| 98 | 98 | ||
| 99 | mutex_lock(&dev->struct_mutex); | 99 | mutex_lock(&dev->struct_mutex); |
| 100 | 100 | ||
| 101 | ret = i915_gem_object_pin(fbo, 64*1024); | 101 | ret = intel_pin_and_fence_fb_obj(dev, fbo); |
| 102 | if (ret) { | 102 | if (ret) { |
| 103 | DRM_ERROR("failed to pin fb: %d\n", ret); | 103 | DRM_ERROR("failed to pin fb: %d\n", ret); |
| 104 | goto out_unref; | 104 | goto out_unref; |
| @@ -236,7 +236,7 @@ int intel_fbdev_destroy(struct drm_device *dev, | |||
| 236 | 236 | ||
| 237 | drm_framebuffer_cleanup(&ifb->base); | 237 | drm_framebuffer_cleanup(&ifb->base); |
| 238 | if (ifb->obj) | 238 | if (ifb->obj) |
| 239 | drm_gem_object_unreference_unlocked(ifb->obj); | 239 | drm_gem_object_unreference(ifb->obj); |
| 240 | 240 | ||
| 241 | return 0; | 241 | return 0; |
| 242 | } | 242 | } |
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 31df55f0a0a7..0eab8df5bf7e 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
| @@ -599,6 +599,26 @@ static int intel_lvds_get_modes(struct drm_connector *connector) | |||
| 599 | return 0; | 599 | return 0; |
| 600 | } | 600 | } |
| 601 | 601 | ||
| 602 | static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) | ||
| 603 | { | ||
| 604 | DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident); | ||
| 605 | return 1; | ||
| 606 | } | ||
| 607 | |||
| 608 | /* The GPU hangs up on these systems if modeset is performed on LID open */ | ||
| 609 | static const struct dmi_system_id intel_no_modeset_on_lid[] = { | ||
| 610 | { | ||
| 611 | .callback = intel_no_modeset_on_lid_dmi_callback, | ||
| 612 | .ident = "Toshiba Tecra A11", | ||
| 613 | .matches = { | ||
| 614 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | ||
| 615 | DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), | ||
| 616 | }, | ||
| 617 | }, | ||
| 618 | |||
| 619 | { } /* terminating entry */ | ||
| 620 | }; | ||
| 621 | |||
| 602 | /* | 622 | /* |
| 603 | * Lid events. Note the use of 'modeset_on_lid': | 623 | * Lid events. Note the use of 'modeset_on_lid': |
| 604 | * - we set it on lid close, and reset it on open | 624 | * - we set it on lid close, and reset it on open |
| @@ -622,6 +642,9 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val, | |||
| 622 | */ | 642 | */ |
| 623 | if (connector) | 643 | if (connector) |
| 624 | connector->status = connector->funcs->detect(connector); | 644 | connector->status = connector->funcs->detect(connector); |
| 645 | /* Don't force modeset on machines where it causes a GPU lockup */ | ||
| 646 | if (dmi_check_system(intel_no_modeset_on_lid)) | ||
| 647 | return NOTIFY_OK; | ||
| 625 | if (!acpi_lid_open()) { | 648 | if (!acpi_lid_open()) { |
| 626 | dev_priv->modeset_on_lid = 1; | 649 | dev_priv->modeset_on_lid = 1; |
| 627 | return NOTIFY_OK; | 650 | return NOTIFY_OK; |
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c index df4532e91b1a..f370476d5417 100644 --- a/drivers/pcmcia/pxa2xx_base.c +++ b/drivers/pcmcia/pxa2xx_base.c | |||
| @@ -178,7 +178,6 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, | |||
| 178 | unsigned long val, | 178 | unsigned long val, |
| 179 | struct cpufreq_freqs *freqs) | 179 | struct cpufreq_freqs *freqs) |
| 180 | { | 180 | { |
| 181 | #warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock" | ||
| 182 | switch (val) { | 181 | switch (val) { |
| 183 | case CPUFREQ_PRECHANGE: | 182 | case CPUFREQ_PRECHANGE: |
| 184 | if (freqs->new > freqs->old) { | 183 | if (freqs->new > freqs->old) { |
| @@ -186,7 +185,7 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, | |||
| 186 | "pre-updating\n", | 185 | "pre-updating\n", |
| 187 | freqs->new / 1000, (freqs->new / 100) % 10, | 186 | freqs->new / 1000, (freqs->new / 100) % 10, |
| 188 | freqs->old / 1000, (freqs->old / 100) % 10); | 187 | freqs->old / 1000, (freqs->old / 100) % 10); |
| 189 | pxa2xx_pcmcia_set_mcxx(skt, freqs->new); | 188 | pxa2xx_pcmcia_set_timing(skt); |
| 190 | } | 189 | } |
| 191 | break; | 190 | break; |
| 192 | 191 | ||
| @@ -196,7 +195,7 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, | |||
| 196 | "post-updating\n", | 195 | "post-updating\n", |
| 197 | freqs->new / 1000, (freqs->new / 100) % 10, | 196 | freqs->new / 1000, (freqs->new / 100) % 10, |
| 198 | freqs->old / 1000, (freqs->old / 100) % 10); | 197 | freqs->old / 1000, (freqs->old / 100) % 10); |
| 199 | pxa2xx_pcmcia_set_mcxx(skt, freqs->new); | 198 | pxa2xx_pcmcia_set_timing(skt); |
| 200 | } | 199 | } |
| 201 | break; | 200 | break; |
| 202 | } | 201 | } |
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c index 85b0d8921eae..980762453a9c 100644 --- a/drivers/usb/gadget/pxa27x_udc.c +++ b/drivers/usb/gadget/pxa27x_udc.c | |||
| @@ -2561,7 +2561,7 @@ static void pxa_udc_shutdown(struct platform_device *_dev) | |||
| 2561 | udc_disable(udc); | 2561 | udc_disable(udc); |
| 2562 | } | 2562 | } |
| 2563 | 2563 | ||
| 2564 | #ifdef CONFIG_CPU_PXA27x | 2564 | #ifdef CONFIG_PXA27x |
| 2565 | extern void pxa27x_clear_otgph(void); | 2565 | extern void pxa27x_clear_otgph(void); |
| 2566 | #else | 2566 | #else |
| 2567 | #define pxa27x_clear_otgph() do {} while (0) | 2567 | #define pxa27x_clear_otgph() do {} while (0) |
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c index a18debdd79b8..418163894775 100644 --- a/drivers/usb/host/ohci-pxa27x.c +++ b/drivers/usb/host/ohci-pxa27x.c | |||
| @@ -203,7 +203,7 @@ static inline void pxa27x_reset_hc(struct pxa27x_ohci *ohci) | |||
| 203 | __raw_writel(uhchr & ~UHCHR_FHR, ohci->mmio_base + UHCHR); | 203 | __raw_writel(uhchr & ~UHCHR_FHR, ohci->mmio_base + UHCHR); |
| 204 | } | 204 | } |
| 205 | 205 | ||
| 206 | #ifdef CONFIG_CPU_PXA27x | 206 | #ifdef CONFIG_PXA27x |
| 207 | extern void pxa27x_clear_otgph(void); | 207 | extern void pxa27x_clear_otgph(void); |
| 208 | #else | 208 | #else |
| 209 | #define pxa27x_clear_otgph() do {} while (0) | 209 | #define pxa27x_clear_otgph() do {} while (0) |
