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-rw-r--r--CREDITS2
-rw-r--r--Documentation/Changes43
-rw-r--r--Documentation/CodingStyle4
-rw-r--r--Documentation/cgroups/blkio-controller.txt12
-rw-r--r--Documentation/feature-removal-schedule.txt22
-rw-r--r--Documentation/filesystems/caching/netfs-api.txt16
-rw-r--r--Documentation/hwmon/f71882fg4
-rw-r--r--Documentation/hwmon/k10temp8
-rw-r--r--Documentation/kernel-parameters.txt2
-rw-r--r--Documentation/laptops/thinkpad-acpi.txt5
-rw-r--r--Documentation/power/runtime_pm.txt26
-rw-r--r--Documentation/spinlocks.txt45
-rw-r--r--Documentation/usb/error-codes.txt9
-rw-r--r--MAINTAINERS44
-rw-r--r--Makefile2
-rw-r--r--README42
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/common/dmabounce.c2
-rw-r--r--arch/arm/include/asm/kprobes.h28
-rw-r--r--arch/arm/include/asm/ptrace.h11
-rw-r--r--arch/arm/kernel/Makefile7
-rw-r--r--arch/arm/kernel/entry-header.S12
-rw-r--r--arch/arm/kernel/kprobes-arm.c999
-rw-r--r--arch/arm/kernel/kprobes-common.c577
-rw-r--r--arch/arm/kernel/kprobes-decode.c1670
-rw-r--r--arch/arm/kernel/kprobes-thumb.c1462
-rw-r--r--arch/arm/kernel/kprobes.c222
-rw-r--r--arch/arm/kernel/kprobes.h420
-rw-r--r--arch/arm/kernel/perf_event.c6
-rw-r--r--arch/arm/kernel/ptrace.c28
-rw-r--r--arch/arm/kernel/setup.c2
-rw-r--r--arch/arm/kernel/smp_twd.c2
-rw-r--r--arch/arm/kernel/traps.c17
-rw-r--r--arch/arm/mach-at91/at91cap9.c8
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c2
-rw-r--r--arch/arm/mach-at91/at91rm9200.c6
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c10
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c4
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c2
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c2
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c2
-rw-r--r--arch/arm/mach-at91/include/mach/system_rev.h10
-rw-r--r--arch/arm/mach-ep93xx/core.c4
-rw-r--r--arch/arm/mach-exynos4/cpu.c6
-rw-r--r--arch/arm/mach-exynos4/dev-audio.c2
-rw-r--r--arch/arm/mach-exynos4/headsmp.S2
-rw-r--r--arch/arm/mach-exynos4/init.c1
-rw-r--r--arch/arm/mach-exynos4/mach-smdkv310.c8
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c8
-rw-r--r--arch/arm/mach-omap1/gpio15xx.c4
-rw-r--r--arch/arm/mach-omap1/gpio16xx.c10
-rw-r--r--arch/arm/mach-omap1/gpio7xx.c14
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c2
-rw-r--r--arch/arm/mach-s3c64xx/dev-spi.c2
-rw-r--r--arch/arm/mach-s5p64x0/dev-spi.c4
-rw-r--r--arch/arm/mach-s5pc100/dev-spi.c4
-rw-r--r--arch/arm/mach-s5pv210/dev-spi.c2
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c4
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c2
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c2
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c16
-rw-r--r--arch/arm/mach-ux500/board-mop500.c54
-rw-r--r--arch/arm/mach-vt8500/irq.c21
-rw-r--r--arch/arm/mm/cache-l2x0.c19
-rw-r--r--arch/arm/mm/mmu.c5
-rw-r--r--arch/arm/mm/nommu.c4
-rw-r--r--arch/arm/plat-s3c24xx/dma.c12
-rw-r--r--arch/arm/plat-s5p/s5p-time.c4
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h6
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-serial.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/s3c64xx-spi.h2
-rw-r--r--arch/powerpc/boot/dts/p1022ds.dts9
-rw-r--r--arch/powerpc/configs/pseries_defconfig1
-rw-r--r--arch/powerpc/kernel/rtas-rtc.c29
-rw-r--r--arch/powerpc/kernel/signal_32.c57
-rw-r--r--arch/powerpc/kernel/signal_64.c17
-rw-r--r--arch/powerpc/kernel/traps.c24
-rw-r--r--arch/powerpc/mm/fault.c10
-rw-r--r--arch/powerpc/sysdev/fsl_rio.c35
-rw-r--r--arch/powerpc/sysdev/mpic.c11
-rw-r--r--arch/sh/Kconfig5
-rw-r--r--arch/sh/configs/sh7757lcr_defconfig8
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c106
-rw-r--r--arch/sh/kernel/irq.c6
-rw-r--r--arch/sh/mm/alignment.c9
-rw-r--r--arch/x86/include/asm/apb_timer.h2
-rw-r--r--arch/x86/include/asm/mmzone_32.h2
-rw-r--r--arch/x86/kernel/acpi/realmode/wakeup.S14
-rw-r--r--arch/x86/kernel/acpi/realmode/wakeup.h6
-rw-r--r--arch/x86/kernel/acpi/sleep.c6
-rw-r--r--arch/x86/kernel/reboot.c8
-rw-r--r--arch/x86/kvm/emulate.c12
-rw-r--r--arch/x86/oprofile/nmi_int.c14
-rw-r--r--arch/x86/pci/xen.c40
-rw-r--r--arch/x86/platform/efi/efi.c3
-rw-r--r--arch/x86/xen/mmu.c4
-rw-r--r--block/cfq-iosched.c8
-rw-r--r--crypto/deflate.c7
-rw-r--r--crypto/zlib.c7
-rw-r--r--drivers/ata/libahci.c2
-rw-r--r--drivers/base/platform.c2
-rw-r--r--drivers/base/syscore.c8
-rw-r--r--drivers/block/drbd/drbd_actlog.c2
-rw-r--r--drivers/block/drbd/drbd_bitmap.c37
-rw-r--r--drivers/block/drbd/drbd_receiver.c6
-rw-r--r--drivers/block/drbd/drbd_worker.c7
-rw-r--r--drivers/connector/connector.c1
-rw-r--r--drivers/cpufreq/acpi-cpufreq.c2
-rw-r--r--drivers/crypto/caam/caamalg.c6
-rw-r--r--drivers/firewire/ohci.c6
-rw-r--r--drivers/firmware/google/Kconfig1
-rw-r--r--drivers/gpio/langwell_gpio.c2
-rw-r--r--drivers/gpio/tps65910-gpio.c2
-rw-r--r--drivers/gpu/drm/drm_crtc.c3
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c16
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c31
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c11
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h35
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c4
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c80
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c19
-rw-r--r--drivers/gpu/drm/i915/intel_display.c305
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c17
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c2
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c165
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h4
-rw-r--r--drivers/gpu/drm/radeon/ni.c1
-rw-r--r--drivers/gpu/drm/radeon/nid.h2
-rw-r--r--drivers/gpu/drm/radeon/r600.c1
-rw-r--r--drivers/gpu/drm/radeon/r600d.h2
-rw-r--r--drivers/gpu/drm/radeon/radeon_bios.c2
-rw-r--r--drivers/gpu/drm/radeon/rv770.c7
-rw-r--r--drivers/hwmon/Kconfig2
-rw-r--r--drivers/hwmon/adm1275.c16
-rw-r--r--drivers/hwmon/emc6w201.c58
-rw-r--r--drivers/hwmon/f71882fg.c19
-rw-r--r--drivers/hwmon/hwmon-vid.c2
-rw-r--r--drivers/hwmon/lm95241.c22
-rw-r--r--drivers/hwmon/pmbus.c19
-rw-r--r--drivers/hwmon/pmbus_core.c11
-rw-r--r--drivers/hwmon/sch5627.c2
-rw-r--r--drivers/i2c/busses/i2c-bfin-twi.c8
-rw-r--r--drivers/i2c/busses/i2c-s3c2410.c7
-rw-r--r--drivers/i2c/busses/i2c-taos-evm.c8
-rw-r--r--drivers/i2c/busses/i2c-tegra.c8
-rw-r--r--drivers/i2c/muxes/pca954x.c7
-rw-r--r--drivers/infiniband/core/cm.c3
-rw-r--r--drivers/infiniband/core/uverbs_main.c3
-rw-r--r--drivers/input/keyboard/pmic8xxx-keypad.c3
-rw-r--r--drivers/input/misc/pmic8xxx-pwrkey.c3
-rw-r--r--drivers/leds/leds-pca9532.c2
-rw-r--r--drivers/md/md.c1
-rw-r--r--drivers/media/rc/fintek-cir.c5
-rw-r--r--drivers/media/rc/imon.c19
-rw-r--r--drivers/media/rc/ir-raw.c4
-rw-r--r--drivers/media/rc/ite-cir.c12
-rw-r--r--drivers/media/rc/ite-cir.h3
-rw-r--r--drivers/media/rc/keymaps/rc-pinnacle-pctv-hd.c58
-rw-r--r--drivers/media/rc/lirc_dev.c37
-rw-r--r--drivers/media/rc/mceusb.c80
-rw-r--r--drivers/media/rc/nuvoton-cir.c2
-rw-r--r--drivers/media/rc/nuvoton-cir.h1
-rw-r--r--drivers/media/rc/rc-main.c48
-rw-r--r--drivers/media/video/bt8xx/bttv-driver.c2
-rw-r--r--drivers/media/video/cx18/cx18-ioctl.c8
-rw-r--r--drivers/media/video/ivtv/ivtv-ioctl.c8
-rw-r--r--drivers/media/video/m5mols/m5mols.h57
-rw-r--r--drivers/media/video/m5mols/m5mols_capture.c22
-rw-r--r--drivers/media/video/m5mols/m5mols_controls.c6
-rw-r--r--drivers/media/video/m5mols/m5mols_core.c144
-rw-r--r--drivers/media/video/m5mols/m5mols_reg.h21
-rw-r--r--drivers/media/video/msp3400-driver.c12
-rw-r--r--drivers/media/video/mx1_camera.c10
-rw-r--r--drivers/media/video/omap/omap_vout.c18
-rw-r--r--drivers/media/video/omap/omap_voutlib.c6
-rw-r--r--drivers/media/video/omap3isp/isp.c2
-rw-r--r--drivers/media/video/pvrusb2/pvrusb2-hdw.c4
-rw-r--r--drivers/media/video/pwc/pwc-ctrl.c2
-rw-r--r--drivers/media/video/pwc/pwc-if.c152
-rw-r--r--drivers/media/video/pwc/pwc.h4
-rw-r--r--drivers/media/video/s5p-fimc/fimc-capture.c21
-rw-r--r--drivers/media/video/s5p-fimc/fimc-core.c28
-rw-r--r--drivers/media/video/s5p-fimc/fimc-core.h29
-rw-r--r--drivers/media/video/saa7134/saa7134-input.c2
-rw-r--r--drivers/media/video/tuner-core.c229
-rw-r--r--drivers/media/video/uvc/uvc_entity.c34
-rw-r--r--drivers/media/video/uvc/uvc_queue.c2
-rw-r--r--drivers/media/video/uvc/uvc_video.c4
-rw-r--r--drivers/media/video/v4l2-dev.c39
-rw-r--r--drivers/media/video/v4l2-ioctl.c18
-rw-r--r--drivers/media/video/videobuf2-core.c14
-rw-r--r--drivers/media/video/videobuf2-dma-sg.c2
-rw-r--r--drivers/mfd/Kconfig3
-rw-r--r--drivers/mfd/Makefile1
-rw-r--r--drivers/mfd/asic3.c1
-rw-r--r--drivers/mfd/htc-pasic3.c1
-rw-r--r--drivers/mfd/omap-usb-host.c131
-rw-r--r--drivers/mfd/tps65911-comparator.c2
-rw-r--r--drivers/misc/pti.c11
-rw-r--r--drivers/misc/ti-st/st_core.c2
-rw-r--r--drivers/misc/ti-st/st_kim.c8
-rw-r--r--drivers/mmc/host/mmci.c2
-rw-r--r--drivers/mmc/host/mmci.h5
-rw-r--r--drivers/mtd/nand/fsl_elbc_nand.c6
-rw-r--r--drivers/net/8139too.c1
-rw-r--r--drivers/net/Kconfig3
-rw-r--r--drivers/net/bna/bnad.c7
-rw-r--r--drivers/net/bnx2x/bnx2x_main.c6
-rw-r--r--drivers/net/can/Kconfig4
-rw-r--r--drivers/net/cxgb3/sge.c4
-rw-r--r--drivers/net/greth.c7
-rw-r--r--drivers/net/hamradio/6pack.c4
-rw-r--r--drivers/net/hamradio/mkiss.c4
-rw-r--r--drivers/net/natsemi.c3
-rw-r--r--drivers/net/ppp_deflate.c5
-rw-r--r--drivers/net/qlge/qlge.h3
-rw-r--r--drivers/net/qlge/qlge_main.c40
-rw-r--r--drivers/net/r8169.c2
-rw-r--r--drivers/net/rionet.c28
-rw-r--r--drivers/net/sh_eth.c6
-rw-r--r--drivers/net/usb/kalmia.c42
-rw-r--r--drivers/net/usb/zaurus.c10
-rw-r--r--drivers/net/vmxnet3/vmxnet3_drv.c138
-rw-r--r--drivers/net/vmxnet3/vmxnet3_int.h5
-rw-r--r--drivers/net/wireless/ath/ath5k/desc.c3
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c8
-rw-r--r--drivers/net/wireless/ath/ath9k/pci.c6
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-1000.c5
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-2000.c7
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000.c5
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-6000.c9
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.c3
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-tx.c25
-rw-r--r--drivers/net/wireless/rtlwifi/pci.c13
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192cu/sw.c20
-rw-r--r--drivers/pci/pci.c2
-rw-r--r--drivers/pci/pci.h2
-rw-r--r--drivers/pci/setup-bus.c15
-rw-r--r--drivers/platform/x86/acer-wmi.c47
-rw-r--r--drivers/platform/x86/asus-wmi.c1
-rw-r--r--drivers/platform/x86/compal-laptop.c4
-rw-r--r--drivers/platform/x86/dell-laptop.c30
-rw-r--r--drivers/platform/x86/hp-wmi.c11
-rw-r--r--drivers/platform/x86/intel_oaktrail.c1
-rw-r--r--drivers/platform/x86/thinkpad_acpi.c72
-rw-r--r--drivers/regulator/db8500-prcmu.c14
-rw-r--r--drivers/regulator/max8952.c2
-rw-r--r--drivers/regulator/max8997.c55
-rw-r--r--drivers/scsi/Kconfig13
-rw-r--r--drivers/scsi/Makefile1
-rw-r--r--drivers/scsi/hpsa.c16
-rw-r--r--drivers/scsi/ibmvscsi/ibmvfc.c4
-rw-r--r--drivers/scsi/isci/Makefile8
-rw-r--r--drivers/scsi/isci/firmware/Makefile19
-rw-r--r--drivers/scsi/isci/firmware/README36
-rw-r--r--drivers/scsi/isci/firmware/create_fw.c99
-rw-r--r--drivers/scsi/isci/firmware/create_fw.h77
-rw-r--r--drivers/scsi/isci/host.c2751
-rw-r--r--drivers/scsi/isci/host.h542
-rw-r--r--drivers/scsi/isci/init.c565
-rw-r--r--drivers/scsi/isci/isci.h538
-rw-r--r--drivers/scsi/isci/phy.c1312
-rw-r--r--drivers/scsi/isci/phy.h504
-rw-r--r--drivers/scsi/isci/port.c1757
-rw-r--r--drivers/scsi/isci/port.h306
-rw-r--r--drivers/scsi/isci/port_config.c754
-rw-r--r--drivers/scsi/isci/probe_roms.c243
-rw-r--r--drivers/scsi/isci/probe_roms.h249
-rw-r--r--drivers/scsi/isci/registers.h1934
-rw-r--r--drivers/scsi/isci/remote_device.c1501
-rw-r--r--drivers/scsi/isci/remote_device.h352
-rw-r--r--drivers/scsi/isci/remote_node_context.c627
-rw-r--r--drivers/scsi/isci/remote_node_context.h224
-rw-r--r--drivers/scsi/isci/remote_node_table.c598
-rw-r--r--drivers/scsi/isci/remote_node_table.h188
-rw-r--r--drivers/scsi/isci/request.c3391
-rw-r--r--drivers/scsi/isci/request.h448
-rw-r--r--drivers/scsi/isci/sas.h219
-rw-r--r--drivers/scsi/isci/scu_completion_codes.h283
-rw-r--r--drivers/scsi/isci/scu_event_codes.h336
-rw-r--r--drivers/scsi/isci/scu_remote_node_context.h229
-rw-r--r--drivers/scsi/isci/scu_task_context.h942
-rw-r--r--drivers/scsi/isci/task.c1676
-rw-r--r--drivers/scsi/isci/task.h367
-rw-r--r--drivers/scsi/isci/unsolicited_frame_control.c225
-rw-r--r--drivers/scsi/isci/unsolicited_frame_control.h278
-rw-r--r--drivers/spi/spi_s3c64xx.c4
-rw-r--r--drivers/staging/brcm80211/Kconfig2
-rw-r--r--drivers/staging/comedi/Kconfig22
-rw-r--r--drivers/staging/iio/Kconfig2
-rw-r--r--drivers/staging/iio/accel/adis16204.h2
-rw-r--r--drivers/staging/iio/accel/adis16209.h4
-rw-r--r--drivers/staging/iio/gyro/adis16260.h2
-rw-r--r--drivers/staging/iio/imu/adis16400.h2
-rw-r--r--drivers/staging/lirc/lirc_imon.c10
-rw-r--r--drivers/staging/lirc/lirc_serial.c44
-rw-r--r--drivers/staging/lirc/lirc_sir.c11
-rw-r--r--drivers/staging/lirc/lirc_zilog.c4
-rw-r--r--drivers/staging/mei/init.c2
-rw-r--r--drivers/staging/mei/wd.c13
-rw-r--r--drivers/tty/n_gsm.c26
-rw-r--r--drivers/tty/n_tty.c1
-rw-r--r--drivers/tty/serial/8250.c1
-rw-r--r--drivers/tty/serial/8250_pci.c59
-rw-r--r--drivers/tty/serial/amba-pl011.c123
-rw-r--r--drivers/tty/serial/atmel_serial.c3
-rw-r--r--drivers/tty/serial/bcm63xx_uart.c18
-rw-r--r--drivers/tty/serial/jsm/jsm_driver.c2
-rw-r--r--drivers/tty/serial/s5pv210.c4
-rw-r--r--drivers/tty/tty_ldisc.c4
-rw-r--r--drivers/usb/core/driver.c11
-rw-r--r--drivers/usb/core/hub.c16
-rw-r--r--drivers/usb/core/message.c26
-rw-r--r--drivers/usb/gadget/fsl_udc_core.c36
-rw-r--r--drivers/usb/host/ehci-ath79.c10
-rw-r--r--drivers/usb/host/ehci-hcd.c4
-rw-r--r--drivers/usb/host/isp1760-hcd.c2
-rw-r--r--drivers/usb/host/ohci-hcd.c4
-rw-r--r--drivers/usb/host/r8a66597-hcd.c1
-rw-r--r--drivers/usb/host/xhci-mem.c2
-rw-r--r--drivers/usb/host/xhci-pci.c8
-rw-r--r--drivers/usb/host/xhci-ring.c30
-rw-r--r--drivers/usb/host/xhci.c39
-rw-r--r--drivers/usb/host/xhci.h3
-rw-r--r--drivers/usb/musb/musb_gadget.c6
-rw-r--r--drivers/usb/musb/musb_host.c2
-rw-r--r--drivers/usb/serial/ftdi_sio.c19
-rw-r--r--drivers/usb/serial/ftdi_sio.h3
-rw-r--r--drivers/usb/serial/ftdi_sio_ids.h1
-rw-r--r--drivers/usb/serial/ti_usb_3410_5052.c1
-rw-r--r--drivers/video/amba-clcd.c2
-rw-r--r--drivers/video/fsl-diu-fb.c16
-rw-r--r--drivers/video/geode/gx1fb_core.c14
-rw-r--r--drivers/video/hecubafb.c3
-rw-r--r--drivers/video/sh_mobile_meram.c2
-rw-r--r--drivers/video/sm501fb.c2
-rw-r--r--drivers/video/udlfb.c8
-rw-r--r--drivers/video/vesafb.c1
-rw-r--r--drivers/w1/masters/ds1wm.c5
-rw-r--r--drivers/watchdog/Kconfig3
-rw-r--r--drivers/watchdog/at32ap700x_wdt.c2
-rw-r--r--drivers/watchdog/gef_wdt.c2
-rw-r--r--drivers/watchdog/intel_scu_watchdog.c1
-rw-r--r--drivers/watchdog/mtx-1_wdt.c29
-rw-r--r--drivers/watchdog/wm831x_wdt.c5
-rw-r--r--firmware/Makefile1
-rw-r--r--firmware/isci/isci_firmware.bin.ihex16
-rw-r--r--fs/binfmt_elf_fdpic.c1
-rw-r--r--fs/btrfs/ctree.h5
-rw-r--r--fs/btrfs/inode.c12
-rw-r--r--fs/btrfs/super.c6
-rw-r--r--fs/btrfs/volumes.c3
-rw-r--r--fs/ceph/file.c14
-rw-r--r--fs/cifs/cifsfs.c8
-rw-r--r--fs/cifs/cifsproto.h6
-rw-r--r--fs/cifs/connect.c132
-rw-r--r--fs/cifs/fscache.c1
-rw-r--r--fs/fscache/page.c44
-rw-r--r--fs/hfsplus/super.c2
-rw-r--r--fs/hfsplus/wrapper.c7
-rw-r--r--fs/locks.c30
-rw-r--r--fs/nfs/fscache.c8
-rw-r--r--fs/proc/base.c7
-rw-r--r--fs/xfs/xfs_inode_item.c14
-rw-r--r--fs/xfs/xfs_trans.c4
-rw-r--r--include/linux/amba/serial.h3
-rw-r--r--include/linux/connector.h2
-rw-r--r--include/linux/drbd_limits.h4
-rw-r--r--include/linux/fscache.h21
-rw-r--r--include/linux/fsl-diu-fb.h6
-rw-r--r--include/linux/mfd/ds1wm.h7
-rw-r--r--include/linux/sched.h2
-rw-r--r--include/media/lirc_dev.h2
-rw-r--r--include/media/m5mols.h4
-rw-r--r--include/media/v4l2-subdev.h10
-rw-r--r--include/net/cfg80211.h2
-rw-r--r--include/net/dst.h1
-rw-r--r--include/sound/sb16_csp.h9
-rw-r--r--kernel/jump_label.c14
-rw-r--r--kernel/power/snapshot.c6
-rw-r--r--kernel/resource.c116
-rw-r--r--kernel/sched.c9
-rw-r--r--lib/debugobjects.c2
-rw-r--r--mm/memcontrol.c140
-rw-r--r--mm/memory.c1
-rw-r--r--mm/nommu.c9
-rw-r--r--mm/vmscan.c59
-rw-r--r--net/8021q/vlan_dev.c5
-rw-r--r--net/bluetooth/hci_conn.c6
-rw-r--r--net/bluetooth/l2cap_core.c21
-rw-r--r--net/bridge/br_device.c4
-rw-r--r--net/bridge/br_input.c6
-rw-r--r--net/bridge/br_multicast.c5
-rw-r--r--net/ceph/osd_client.c10
-rw-r--r--net/core/dst.c6
-rw-r--r--net/ipv4/af_inet.c4
-rw-r--r--net/ipv4/ip_output.c19
-rw-r--r--net/ipv4/netfilter.c60
-rw-r--r--net/ipv4/netfilter/ipt_REJECT.c14
-rw-r--r--net/ipv4/tcp.c10
-rw-r--r--net/ipv4/udp.c13
-rw-r--r--net/ipv4/xfrm4_output.c7
-rw-r--r--net/ipv6/af_inet6.c2
-rw-r--r--net/ipv6/route.c25
-rw-r--r--net/ipv6/udp.c5
-rw-r--r--net/mac80211/wpa.c8
-rw-r--r--net/sctp/protocol.c11
-rw-r--r--net/sctp/socket.c23
-rw-r--r--net/wireless/nl80211.c3
-rw-r--r--net/xfrm/xfrm_policy.c6
-rw-r--r--sound/atmel/abdac.c2
-rw-r--r--sound/atmel/ac97c.c2
-rw-r--r--sound/pci/cs5535audio/cs5535audio_pcm.c4
-rw-r--r--sound/pci/hda/hda_eld.c2
-rw-r--r--sound/pci/hda/patch_conexant.c4
-rw-r--r--sound/pci/hda/patch_realtek.c33
-rw-r--r--sound/pci/rme9652/hdspm.c8
-rw-r--r--sound/soc/blackfin/bf5xx-i2s-pcm.c13
-rw-r--r--sound/soc/codecs/ak4642.c2
-rw-r--r--sound/soc/codecs/tlv320aic26.c14
-rw-r--r--sound/soc/codecs/tlv320aic3x.c9
-rw-r--r--sound/soc/codecs/wm8731.c29
-rw-r--r--sound/soc/codecs/wm8994.c2
-rw-r--r--sound/soc/soc-core.c5
-rw-r--r--sound/soc/tegra/tegra_i2s.c6
-rw-r--r--sound/spi/at73c213.c2
436 files changed, 31057 insertions, 3923 deletions
diff --git a/CREDITS b/CREDITS
index d78359f5f64d..1deb331d96ed 100644
--- a/CREDITS
+++ b/CREDITS
@@ -518,7 +518,7 @@ N: Zach Brown
518E: zab@zabbo.net 518E: zab@zabbo.net
519D: maestro pci sound 519D: maestro pci sound
520 520
521M: David Brownell 521N: David Brownell
522D: Kernel engineer, mentor, and friend. Maintained USB EHCI and 522D: Kernel engineer, mentor, and friend. Maintained USB EHCI and
523D: gadget layers, SPI subsystem, GPIO subsystem, and more than a few 523D: gadget layers, SPI subsystem, GPIO subsystem, and more than a few
524D: device drivers. His encouragement also helped many engineers get 524D: device drivers. His encouragement also helped many engineers get
diff --git a/Documentation/Changes b/Documentation/Changes
index 5f4828a034e3..b17580885273 100644
--- a/Documentation/Changes
+++ b/Documentation/Changes
@@ -2,13 +2,7 @@ Intro
2===== 2=====
3 3
4This document is designed to provide a list of the minimum levels of 4This document is designed to provide a list of the minimum levels of
5software necessary to run the 2.6 kernels, as well as provide brief 5software necessary to run the 3.0 kernels.
6instructions regarding any other "Gotchas" users may encounter when
7trying life on the Bleeding Edge. If upgrading from a pre-2.4.x
8kernel, please consult the Changes file included with 2.4.x kernels for
9additional information; most of that information will not be repeated
10here. Basically, this document assumes that your system is already
11functional and running at least 2.4.x kernels.
12 6
13This document is originally based on my "Changes" file for 2.0.x kernels 7This document is originally based on my "Changes" file for 2.0.x kernels
14and therefore owes credit to the same people as that file (Jared Mauch, 8and therefore owes credit to the same people as that file (Jared Mauch,
@@ -22,11 +16,10 @@ Upgrade to at *least* these software revisions before thinking you've
22encountered a bug! If you're unsure what version you're currently 16encountered a bug! If you're unsure what version you're currently
23running, the suggested command should tell you. 17running, the suggested command should tell you.
24 18
25Again, keep in mind that this list assumes you are already 19Again, keep in mind that this list assumes you are already functionally
26functionally running a Linux 2.4 kernel. Also, not all tools are 20running a Linux kernel. Also, not all tools are necessary on all
27necessary on all systems; obviously, if you don't have any ISDN 21systems; obviously, if you don't have any ISDN hardware, for example,
28hardware, for example, you probably needn't concern yourself with 22you probably needn't concern yourself with isdn4k-utils.
29isdn4k-utils.
30 23
31o Gnu C 3.2 # gcc --version 24o Gnu C 3.2 # gcc --version
32o Gnu make 3.80 # make --version 25o Gnu make 3.80 # make --version
@@ -114,12 +107,12 @@ Ksymoops
114 107
115If the unthinkable happens and your kernel oopses, you may need the 108If the unthinkable happens and your kernel oopses, you may need the
116ksymoops tool to decode it, but in most cases you don't. 109ksymoops tool to decode it, but in most cases you don't.
117In the 2.6 kernel it is generally preferred to build the kernel with 110It is generally preferred to build the kernel with CONFIG_KALLSYMS so
118CONFIG_KALLSYMS so that it produces readable dumps that can be used as-is 111that it produces readable dumps that can be used as-is (this also
119(this also produces better output than ksymoops). 112produces better output than ksymoops). If for some reason your kernel
120If for some reason your kernel is not build with CONFIG_KALLSYMS and 113is not build with CONFIG_KALLSYMS and you have no way to rebuild and
121you have no way to rebuild and reproduce the Oops with that option, then 114reproduce the Oops with that option, then you can still decode that Oops
122you can still decode that Oops with ksymoops. 115with ksymoops.
123 116
124Module-Init-Tools 117Module-Init-Tools
125----------------- 118-----------------
@@ -261,8 +254,8 @@ needs to be recompiled or (preferably) upgraded.
261NFS-utils 254NFS-utils
262--------- 255---------
263 256
264In 2.4 and earlier kernels, the nfs server needed to know about any 257In ancient (2.4 and earlier) kernels, the nfs server needed to know
265client that expected to be able to access files via NFS. This 258about any client that expected to be able to access files via NFS. This
266information would be given to the kernel by "mountd" when the client 259information would be given to the kernel by "mountd" when the client
267mounted the filesystem, or by "exportfs" at system startup. exportfs 260mounted the filesystem, or by "exportfs" at system startup. exportfs
268would take information about active clients from /var/lib/nfs/rmtab. 261would take information about active clients from /var/lib/nfs/rmtab.
@@ -272,11 +265,11 @@ which is not always easy, particularly when trying to implement
272fail-over. Even when the system is working well, rmtab suffers from 265fail-over. Even when the system is working well, rmtab suffers from
273getting lots of old entries that never get removed. 266getting lots of old entries that never get removed.
274 267
275With 2.6 we have the option of having the kernel tell mountd when it 268With modern kernels we have the option of having the kernel tell mountd
276gets a request from an unknown host, and mountd can give appropriate 269when it gets a request from an unknown host, and mountd can give
277export information to the kernel. This removes the dependency on 270appropriate export information to the kernel. This removes the
278rmtab and means that the kernel only needs to know about currently 271dependency on rmtab and means that the kernel only needs to know about
279active clients. 272currently active clients.
280 273
281To enable this new functionality, you need to: 274To enable this new functionality, you need to:
282 275
diff --git a/Documentation/CodingStyle b/Documentation/CodingStyle
index 58b0bf917834..fa6e25b94a54 100644
--- a/Documentation/CodingStyle
+++ b/Documentation/CodingStyle
@@ -680,8 +680,8 @@ ones already enabled by DEBUG.
680 Chapter 14: Allocating memory 680 Chapter 14: Allocating memory
681 681
682The kernel provides the following general purpose memory allocators: 682The kernel provides the following general purpose memory allocators:
683kmalloc(), kzalloc(), kcalloc(), and vmalloc(). Please refer to the API 683kmalloc(), kzalloc(), kcalloc(), vmalloc(), and vzalloc(). Please refer to
684documentation for further information about them. 684the API documentation for further information about them.
685 685
686The preferred form for passing a size of a struct is the following: 686The preferred form for passing a size of a struct is the following:
687 687
diff --git a/Documentation/cgroups/blkio-controller.txt b/Documentation/cgroups/blkio-controller.txt
index cd45c8ea7463..84f0a15fc210 100644
--- a/Documentation/cgroups/blkio-controller.txt
+++ b/Documentation/cgroups/blkio-controller.txt
@@ -77,7 +77,7 @@ Throttling/Upper Limit policy
77- Specify a bandwidth rate on particular device for root group. The format 77- Specify a bandwidth rate on particular device for root group. The format
78 for policy is "<major>:<minor> <byes_per_second>". 78 for policy is "<major>:<minor> <byes_per_second>".
79 79
80 echo "8:16 1048576" > /sys/fs/cgroup/blkio/blkio.read_bps_device 80 echo "8:16 1048576" > /sys/fs/cgroup/blkio/blkio.throttle.read_bps_device
81 81
82 Above will put a limit of 1MB/second on reads happening for root group 82 Above will put a limit of 1MB/second on reads happening for root group
83 on device having major/minor number 8:16. 83 on device having major/minor number 8:16.
@@ -90,7 +90,7 @@ Throttling/Upper Limit policy
90 1024+0 records out 90 1024+0 records out
91 4194304 bytes (4.2 MB) copied, 4.0001 s, 1.0 MB/s 91 4194304 bytes (4.2 MB) copied, 4.0001 s, 1.0 MB/s
92 92
93 Limits for writes can be put using blkio.write_bps_device file. 93 Limits for writes can be put using blkio.throttle.write_bps_device file.
94 94
95Hierarchical Cgroups 95Hierarchical Cgroups
96==================== 96====================
@@ -286,28 +286,28 @@ Throttling/Upper limit policy files
286 specified in bytes per second. Rules are per deivce. Following is 286 specified in bytes per second. Rules are per deivce. Following is
287 the format. 287 the format.
288 288
289 echo "<major>:<minor> <rate_bytes_per_second>" > /cgrp/blkio.read_bps_device 289 echo "<major>:<minor> <rate_bytes_per_second>" > /cgrp/blkio.throttle.read_bps_device
290 290
291- blkio.throttle.write_bps_device 291- blkio.throttle.write_bps_device
292 - Specifies upper limit on WRITE rate to the device. IO rate is 292 - Specifies upper limit on WRITE rate to the device. IO rate is
293 specified in bytes per second. Rules are per deivce. Following is 293 specified in bytes per second. Rules are per deivce. Following is
294 the format. 294 the format.
295 295
296 echo "<major>:<minor> <rate_bytes_per_second>" > /cgrp/blkio.write_bps_device 296 echo "<major>:<minor> <rate_bytes_per_second>" > /cgrp/blkio.throttle.write_bps_device
297 297
298- blkio.throttle.read_iops_device 298- blkio.throttle.read_iops_device
299 - Specifies upper limit on READ rate from the device. IO rate is 299 - Specifies upper limit on READ rate from the device. IO rate is
300 specified in IO per second. Rules are per deivce. Following is 300 specified in IO per second. Rules are per deivce. Following is
301 the format. 301 the format.
302 302
303 echo "<major>:<minor> <rate_io_per_second>" > /cgrp/blkio.read_iops_device 303 echo "<major>:<minor> <rate_io_per_second>" > /cgrp/blkio.throttle.read_iops_device
304 304
305- blkio.throttle.write_iops_device 305- blkio.throttle.write_iops_device
306 - Specifies upper limit on WRITE rate to the device. IO rate is 306 - Specifies upper limit on WRITE rate to the device. IO rate is
307 specified in io per second. Rules are per deivce. Following is 307 specified in io per second. Rules are per deivce. Following is
308 the format. 308 the format.
309 309
310 echo "<major>:<minor> <rate_io_per_second>" > /cgrp/blkio.write_iops_device 310 echo "<major>:<minor> <rate_io_per_second>" > /cgrp/blkio.throttle.write_iops_device
311 311
312Note: If both BW and IOPS rules are specified for a device, then IO is 312Note: If both BW and IOPS rules are specified for a device, then IO is
313 subjectd to both the constraints. 313 subjectd to both the constraints.
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index 72e238465b0b..b1c921c27519 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -583,3 +583,25 @@ Why: Superseded by the UVCIOC_CTRL_QUERY ioctl.
583Who: Laurent Pinchart <laurent.pinchart@ideasonboard.com> 583Who: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
584 584
585---------------------------- 585----------------------------
586
587What: For VIDIOC_S_FREQUENCY the type field must match the device node's type.
588 If not, return -EINVAL.
589When: 3.2
590Why: It makes no sense to switch the tuner to radio mode by calling
591 VIDIOC_S_FREQUENCY on a video node, or to switch the tuner to tv mode by
592 calling VIDIOC_S_FREQUENCY on a radio node. This is the first step of a
593 move to more consistent handling of tv and radio tuners.
594Who: Hans Verkuil <hans.verkuil@cisco.com>
595
596----------------------------
597
598What: Opening a radio device node will no longer automatically switch the
599 tuner mode from tv to radio.
600When: 3.3
601Why: Just opening a V4L device should not change the state of the hardware
602 like that. It's very unexpected and against the V4L spec. Instead, you
603 switch to radio mode by calling VIDIOC_S_FREQUENCY. This is the second
604 and last step of the move to consistent handling of tv and radio tuners.
605Who: Hans Verkuil <hans.verkuil@cisco.com>
606
607----------------------------
diff --git a/Documentation/filesystems/caching/netfs-api.txt b/Documentation/filesystems/caching/netfs-api.txt
index a167ab876c35..7cc6bf2871eb 100644
--- a/Documentation/filesystems/caching/netfs-api.txt
+++ b/Documentation/filesystems/caching/netfs-api.txt
@@ -673,6 +673,22 @@ storage request to complete, or it may attempt to cancel the storage request -
673in which case the page will not be stored in the cache this time. 673in which case the page will not be stored in the cache this time.
674 674
675 675
676BULK INODE PAGE UNCACHE
677-----------------------
678
679A convenience routine is provided to perform an uncache on all the pages
680attached to an inode. This assumes that the pages on the inode correspond on a
6811:1 basis with the pages in the cache.
682
683 void fscache_uncache_all_inode_pages(struct fscache_cookie *cookie,
684 struct inode *inode);
685
686This takes the netfs cookie that the pages were cached with and the inode that
687the pages are attached to. This function will wait for pages to finish being
688written to the cache and for the cache to finish with the page generally. No
689error is returned.
690
691
676========================== 692==========================
677INDEX AND DATA FILE UPDATE 693INDEX AND DATA FILE UPDATE
678========================== 694==========================
diff --git a/Documentation/hwmon/f71882fg b/Documentation/hwmon/f71882fg
index 84d2623810f3..de91c0db5846 100644
--- a/Documentation/hwmon/f71882fg
+++ b/Documentation/hwmon/f71882fg
@@ -22,6 +22,10 @@ Supported chips:
22 Prefix: 'f71869' 22 Prefix: 'f71869'
23 Addresses scanned: none, address read from Super I/O config space 23 Addresses scanned: none, address read from Super I/O config space
24 Datasheet: Available from the Fintek website 24 Datasheet: Available from the Fintek website
25 * Fintek F71869A
26 Prefix: 'f71869a'
27 Addresses scanned: none, address read from Super I/O config space
28 Datasheet: Not public
25 * Fintek F71882FG and F71883FG 29 * Fintek F71882FG and F71883FG
26 Prefix: 'f71882fg' 30 Prefix: 'f71882fg'
27 Addresses scanned: none, address read from Super I/O config space 31 Addresses scanned: none, address read from Super I/O config space
diff --git a/Documentation/hwmon/k10temp b/Documentation/hwmon/k10temp
index 0393c89277c0..a10f73624ad3 100644
--- a/Documentation/hwmon/k10temp
+++ b/Documentation/hwmon/k10temp
@@ -9,8 +9,8 @@ Supported chips:
9 Socket S1G3: Athlon II, Sempron, Turion II 9 Socket S1G3: Athlon II, Sempron, Turion II
10* AMD Family 11h processors: 10* AMD Family 11h processors:
11 Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra) 11 Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra)
12* AMD Family 12h processors: "Llano" 12* AMD Family 12h processors: "Llano" (E2/A4/A6/A8-Series)
13* AMD Family 14h processors: "Brazos" (C/E/G-Series) 13* AMD Family 14h processors: "Brazos" (C/E/G/Z-Series)
14* AMD Family 15h processors: "Bulldozer" 14* AMD Family 15h processors: "Bulldozer"
15 15
16 Prefix: 'k10temp' 16 Prefix: 'k10temp'
@@ -20,12 +20,16 @@ Supported chips:
20 http://support.amd.com/us/Processor_TechDocs/31116.pdf 20 http://support.amd.com/us/Processor_TechDocs/31116.pdf
21 BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors: 21 BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors:
22 http://support.amd.com/us/Processor_TechDocs/41256.pdf 22 http://support.amd.com/us/Processor_TechDocs/41256.pdf
23 BIOS and Kernel Developer's Guide (BKDG) for AMD Family 12h Processors:
24 http://support.amd.com/us/Processor_TechDocs/41131.pdf
23 BIOS and Kernel Developer's Guide (BKDG) for AMD Family 14h Models 00h-0Fh Processors: 25 BIOS and Kernel Developer's Guide (BKDG) for AMD Family 14h Models 00h-0Fh Processors:
24 http://support.amd.com/us/Processor_TechDocs/43170.pdf 26 http://support.amd.com/us/Processor_TechDocs/43170.pdf
25 Revision Guide for AMD Family 10h Processors: 27 Revision Guide for AMD Family 10h Processors:
26 http://support.amd.com/us/Processor_TechDocs/41322.pdf 28 http://support.amd.com/us/Processor_TechDocs/41322.pdf
27 Revision Guide for AMD Family 11h Processors: 29 Revision Guide for AMD Family 11h Processors:
28 http://support.amd.com/us/Processor_TechDocs/41788.pdf 30 http://support.amd.com/us/Processor_TechDocs/41788.pdf
31 Revision Guide for AMD Family 12h Processors:
32 http://support.amd.com/us/Processor_TechDocs/44739.pdf
29 Revision Guide for AMD Family 14h Models 00h-0Fh Processors: 33 Revision Guide for AMD Family 14h Models 00h-0Fh Processors:
30 http://support.amd.com/us/Processor_TechDocs/47534.pdf 34 http://support.amd.com/us/Processor_TechDocs/47534.pdf
31 AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks: 35 AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks:
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index fd248a318211..aa47be71df4c 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -2015,6 +2015,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
2015 the default. 2015 the default.
2016 off: Turn ECRC off 2016 off: Turn ECRC off
2017 on: Turn ECRC on. 2017 on: Turn ECRC on.
2018 realloc reallocate PCI resources if allocations done by BIOS
2019 are erroneous.
2018 2020
2019 pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power 2021 pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power
2020 Management. 2022 Management.
diff --git a/Documentation/laptops/thinkpad-acpi.txt b/Documentation/laptops/thinkpad-acpi.txt
index 1565eefd6fd5..61815483efa3 100644
--- a/Documentation/laptops/thinkpad-acpi.txt
+++ b/Documentation/laptops/thinkpad-acpi.txt
@@ -534,6 +534,8 @@ Events that are never propagated by the driver:
5340x2404 System is waking up from hibernation to undock 5340x2404 System is waking up from hibernation to undock
5350x2405 System is waking up from hibernation to eject bay 5350x2405 System is waking up from hibernation to eject bay
5360x5010 Brightness level changed/control event 5360x5010 Brightness level changed/control event
5370x6000 KEYBOARD: Numlock key pressed
5380x6005 KEYBOARD: Fn key pressed (TO BE VERIFIED)
537 539
538Events that are propagated by the driver to userspace: 540Events that are propagated by the driver to userspace:
539 541
@@ -545,6 +547,8 @@ Events that are propagated by the driver to userspace:
5450x3006 Bay hotplug request (hint to power up SATA link when 5470x3006 Bay hotplug request (hint to power up SATA link when
546 the optical drive tray is ejected) 548 the optical drive tray is ejected)
5470x4003 Undocked (see 0x2x04), can sleep again 5490x4003 Undocked (see 0x2x04), can sleep again
5500x4010 Docked into hotplug port replicator (non-ACPI dock)
5510x4011 Undocked from hotplug port replicator (non-ACPI dock)
5480x500B Tablet pen inserted into its storage bay 5520x500B Tablet pen inserted into its storage bay
5490x500C Tablet pen removed from its storage bay 5530x500C Tablet pen removed from its storage bay
5500x6011 ALARM: battery is too hot 5540x6011 ALARM: battery is too hot
@@ -552,6 +556,7 @@ Events that are propagated by the driver to userspace:
5520x6021 ALARM: a sensor is too hot 5560x6021 ALARM: a sensor is too hot
5530x6022 ALARM: a sensor is extremely hot 5570x6022 ALARM: a sensor is extremely hot
5540x6030 System thermal table changed 5580x6030 System thermal table changed
5590x6040 Nvidia Optimus/AC adapter related (TO BE VERIFIED)
555 560
556Battery nearly empty alarms are a last resort attempt to get the 561Battery nearly empty alarms are a last resort attempt to get the
557operating system to hibernate or shutdown cleanly (0x2313), or shutdown 562operating system to hibernate or shutdown cleanly (0x2313), or shutdown
diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt
index 22accb3eb40e..b24875b1ced5 100644
--- a/Documentation/power/runtime_pm.txt
+++ b/Documentation/power/runtime_pm.txt
@@ -501,13 +501,29 @@ helper functions described in Section 4. In that case, pm_runtime_resume()
501should be used. Of course, for this purpose the device's run-time PM has to be 501should be used. Of course, for this purpose the device's run-time PM has to be
502enabled earlier by calling pm_runtime_enable(). 502enabled earlier by calling pm_runtime_enable().
503 503
504If the device bus type's or driver's ->probe() or ->remove() callback runs 504If the device bus type's or driver's ->probe() callback runs
505pm_runtime_suspend() or pm_runtime_idle() or their asynchronous counterparts, 505pm_runtime_suspend() or pm_runtime_idle() or their asynchronous counterparts,
506they will fail returning -EAGAIN, because the device's usage counter is 506they will fail returning -EAGAIN, because the device's usage counter is
507incremented by the core before executing ->probe() and ->remove(). Still, it 507incremented by the driver core before executing ->probe(). Still, it may be
508may be desirable to suspend the device as soon as ->probe() or ->remove() has 508desirable to suspend the device as soon as ->probe() has finished, so the driver
509finished, so the PM core uses pm_runtime_idle_sync() to invoke the 509core uses pm_runtime_put_sync() to invoke the subsystem-level idle callback for
510subsystem-level idle callback for the device at that time. 510the device at that time.
511
512Moreover, the driver core prevents runtime PM callbacks from racing with the bus
513notifier callback in __device_release_driver(), which is necessary, because the
514notifier is used by some subsystems to carry out operations affecting the
515runtime PM functionality. It does so by calling pm_runtime_get_sync() before
516driver_sysfs_remove() and the BUS_NOTIFY_UNBIND_DRIVER notifications. This
517resumes the device if it's in the suspended state and prevents it from
518being suspended again while those routines are being executed.
519
520To allow bus types and drivers to put devices into the suspended state by
521calling pm_runtime_suspend() from their ->remove() routines, the driver core
522executes pm_runtime_put_sync() after running the BUS_NOTIFY_UNBIND_DRIVER
523notifications in __device_release_driver(). This requires bus types and
524drivers to make their ->remove() callbacks avoid races with runtime PM directly,
525but also it allows of more flexibility in the handling of devices during the
526removal of their drivers.
511 527
512The user space can effectively disallow the driver of the device to power manage 528The user space can effectively disallow the driver of the device to power manage
513it at run time by changing the value of its /sys/devices/.../power/control 529it at run time by changing the value of its /sys/devices/.../power/control
diff --git a/Documentation/spinlocks.txt b/Documentation/spinlocks.txt
index 2e3c64b1a6a5..9dbe885ecd8d 100644
--- a/Documentation/spinlocks.txt
+++ b/Documentation/spinlocks.txt
@@ -13,18 +13,8 @@ static DEFINE_SPINLOCK(xxx_lock);
13The above is always safe. It will disable interrupts _locally_, but the 13The above is always safe. It will disable interrupts _locally_, but the
14spinlock itself will guarantee the global lock, so it will guarantee that 14spinlock itself will guarantee the global lock, so it will guarantee that
15there is only one thread-of-control within the region(s) protected by that 15there is only one thread-of-control within the region(s) protected by that
16lock. This works well even under UP. The above sequence under UP 16lock. This works well even under UP also, so the code does _not_ need to
17essentially is just the same as doing 17worry about UP vs SMP issues: the spinlocks work correctly under both.
18
19 unsigned long flags;
20
21 save_flags(flags); cli();
22 ... critical section ...
23 restore_flags(flags);
24
25so the code does _not_ need to worry about UP vs SMP issues: the spinlocks
26work correctly under both (and spinlocks are actually more efficient on
27architectures that allow doing the "save_flags + cli" in one operation).
28 18
29 NOTE! Implications of spin_locks for memory are further described in: 19 NOTE! Implications of spin_locks for memory are further described in:
30 20
@@ -36,27 +26,7 @@ The above is usually pretty simple (you usually need and want only one
36spinlock for most things - using more than one spinlock can make things a 26spinlock for most things - using more than one spinlock can make things a
37lot more complex and even slower and is usually worth it only for 27lot more complex and even slower and is usually worth it only for
38sequences that you _know_ need to be split up: avoid it at all cost if you 28sequences that you _know_ need to be split up: avoid it at all cost if you
39aren't sure). HOWEVER, it _does_ mean that if you have some code that does 29aren't sure).
40
41 cli();
42 .. critical section ..
43 sti();
44
45and another sequence that does
46
47 spin_lock_irqsave(flags);
48 .. critical section ..
49 spin_unlock_irqrestore(flags);
50
51then they are NOT mutually exclusive, and the critical regions can happen
52at the same time on two different CPU's. That's fine per se, but the
53critical regions had better be critical for different things (ie they
54can't stomp on each other).
55
56The above is a problem mainly if you end up mixing code - for example the
57routines in ll_rw_block() tend to use cli/sti to protect the atomicity of
58their actions, and if a driver uses spinlocks instead then you should
59think about issues like the above.
60 30
61This is really the only really hard part about spinlocks: once you start 31This is really the only really hard part about spinlocks: once you start
62using spinlocks they tend to expand to areas you might not have noticed 32using spinlocks they tend to expand to areas you might not have noticed
@@ -120,11 +90,10 @@ Lesson 3: spinlocks revisited.
120 90
121The single spin-lock primitives above are by no means the only ones. They 91The single spin-lock primitives above are by no means the only ones. They
122are the most safe ones, and the ones that work under all circumstances, 92are the most safe ones, and the ones that work under all circumstances,
123but partly _because_ they are safe they are also fairly slow. They are 93but partly _because_ they are safe they are also fairly slow. They are slower
124much faster than a generic global cli/sti pair, but slower than they'd 94than they'd need to be, because they do have to disable interrupts
125need to be, because they do have to disable interrupts (which is just a 95(which is just a single instruction on a x86, but it's an expensive one -
126single instruction on a x86, but it's an expensive one - and on other 96and on other architectures it can be worse).
127architectures it can be worse).
128 97
129If you have a case where you have to protect a data structure across 98If you have a case where you have to protect a data structure across
130several CPU's and you want to use spinlocks you can potentially use 99several CPU's and you want to use spinlocks you can potentially use
diff --git a/Documentation/usb/error-codes.txt b/Documentation/usb/error-codes.txt
index d83703ea74b2..b3f606b81a03 100644
--- a/Documentation/usb/error-codes.txt
+++ b/Documentation/usb/error-codes.txt
@@ -76,6 +76,13 @@ A transfer's actual_length may be positive even when an error has been
76reported. That's because transfers often involve several packets, so that 76reported. That's because transfers often involve several packets, so that
77one or more packets could finish before an error stops further endpoint I/O. 77one or more packets could finish before an error stops further endpoint I/O.
78 78
79For isochronous URBs, the urb status value is non-zero only if the URB is
80unlinked, the device is removed, the host controller is disabled, or the total
81transferred length is less than the requested length and the URB_SHORT_NOT_OK
82flag is set. Completion handlers for isochronous URBs should only see
83urb->status set to zero, -ENOENT, -ECONNRESET, -ESHUTDOWN, or -EREMOTEIO.
84Individual frame descriptor status fields may report more status codes.
85
79 86
800 Transfer completed successfully 870 Transfer completed successfully
81 88
@@ -132,7 +139,7 @@ one or more packets could finish before an error stops further endpoint I/O.
132 device removal events immediately. 139 device removal events immediately.
133 140
134-EXDEV ISO transfer only partially completed 141-EXDEV ISO transfer only partially completed
135 look at individual frame status for details 142 (only set in iso_frame_desc[n].status, not urb->status)
136 143
137-EINVAL ISO madness, if this happens: Log off and go home 144-EINVAL ISO madness, if this happens: Log off and go home
138 145
diff --git a/MAINTAINERS b/MAINTAINERS
index f0358cd91de3..187282da9213 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -594,6 +594,16 @@ S: Maintained
594F: arch/arm/lib/floppydma.S 594F: arch/arm/lib/floppydma.S
595F: arch/arm/include/asm/floppy.h 595F: arch/arm/include/asm/floppy.h
596 596
597ARM PMU PROFILING AND DEBUGGING
598M: Will Deacon <will.deacon@arm.com>
599S: Maintained
600F: arch/arm/kernel/perf_event*
601F: arch/arm/oprofile/common.c
602F: arch/arm/kernel/pmu.c
603F: arch/arm/include/asm/pmu.h
604F: arch/arm/kernel/hw_breakpoint.c
605F: arch/arm/include/asm/hw_breakpoint.h
606
597ARM PORT 607ARM PORT
598M: Russell King <linux@arm.linux.org.uk> 608M: Russell King <linux@arm.linux.org.uk>
599L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 609L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -1345,16 +1355,18 @@ F: drivers/auxdisplay/
1345F: include/linux/cfag12864b.h 1355F: include/linux/cfag12864b.h
1346 1356
1347AVR32 ARCHITECTURE 1357AVR32 ARCHITECTURE
1348M: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> 1358M: Haavard Skinnemoen <hskinnemoen@gmail.com>
1359M: Hans-Christian Egtvedt <egtvedt@samfundet.no>
1349W: http://www.atmel.com/products/AVR32/ 1360W: http://www.atmel.com/products/AVR32/
1350W: http://avr32linux.org/ 1361W: http://avr32linux.org/
1351W: http://avrfreaks.net/ 1362W: http://avrfreaks.net/
1352S: Supported 1363S: Maintained
1353F: arch/avr32/ 1364F: arch/avr32/
1354 1365
1355AVR32/AT32AP MACHINE SUPPORT 1366AVR32/AT32AP MACHINE SUPPORT
1356M: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> 1367M: Haavard Skinnemoen <hskinnemoen@gmail.com>
1357S: Supported 1368M: Hans-Christian Egtvedt <egtvedt@samfundet.no>
1369S: Maintained
1358F: arch/avr32/mach-at32ap/ 1370F: arch/avr32/mach-at32ap/
1359 1371
1360AX.25 NETWORK LAYER 1372AX.25 NETWORK LAYER
@@ -1390,7 +1402,6 @@ F: include/linux/backlight.h
1390BATMAN ADVANCED 1402BATMAN ADVANCED
1391M: Marek Lindner <lindner_marek@yahoo.de> 1403M: Marek Lindner <lindner_marek@yahoo.de>
1392M: Simon Wunderlich <siwu@hrz.tu-chemnitz.de> 1404M: Simon Wunderlich <siwu@hrz.tu-chemnitz.de>
1393M: Sven Eckelmann <sven@narfation.org>
1394L: b.a.t.m.a.n@lists.open-mesh.org 1405L: b.a.t.m.a.n@lists.open-mesh.org
1395W: http://www.open-mesh.org/ 1406W: http://www.open-mesh.org/
1396S: Maintained 1407S: Maintained
@@ -1423,7 +1434,6 @@ S: Supported
1423F: arch/blackfin/ 1434F: arch/blackfin/
1424 1435
1425BLACKFIN EMAC DRIVER 1436BLACKFIN EMAC DRIVER
1426M: Michael Hennerich <michael.hennerich@analog.com>
1427L: uclinux-dist-devel@blackfin.uclinux.org 1437L: uclinux-dist-devel@blackfin.uclinux.org
1428W: http://blackfin.uclinux.org 1438W: http://blackfin.uclinux.org
1429S: Supported 1439S: Supported
@@ -1639,7 +1649,7 @@ CAN NETWORK LAYER
1639M: Oliver Hartkopp <socketcan@hartkopp.net> 1649M: Oliver Hartkopp <socketcan@hartkopp.net>
1640M: Oliver Hartkopp <oliver.hartkopp@volkswagen.de> 1650M: Oliver Hartkopp <oliver.hartkopp@volkswagen.de>
1641M: Urs Thuermann <urs.thuermann@volkswagen.de> 1651M: Urs Thuermann <urs.thuermann@volkswagen.de>
1642L: socketcan-core@lists.berlios.de 1652L: socketcan-core@lists.berlios.de (subscribers-only)
1643L: netdev@vger.kernel.org 1653L: netdev@vger.kernel.org
1644W: http://developer.berlios.de/projects/socketcan/ 1654W: http://developer.berlios.de/projects/socketcan/
1645S: Maintained 1655S: Maintained
@@ -1651,7 +1661,7 @@ F: include/linux/can/raw.h
1651 1661
1652CAN NETWORK DRIVERS 1662CAN NETWORK DRIVERS
1653M: Wolfgang Grandegger <wg@grandegger.com> 1663M: Wolfgang Grandegger <wg@grandegger.com>
1654L: socketcan-core@lists.berlios.de 1664L: socketcan-core@lists.berlios.de (subscribers-only)
1655L: netdev@vger.kernel.org 1665L: netdev@vger.kernel.org
1656W: http://developer.berlios.de/projects/socketcan/ 1666W: http://developer.berlios.de/projects/socketcan/
1657S: Maintained 1667S: Maintained
@@ -2197,7 +2207,7 @@ F: drivers/acpi/dock.c
2197DOCUMENTATION 2207DOCUMENTATION
2198M: Randy Dunlap <rdunlap@xenotime.net> 2208M: Randy Dunlap <rdunlap@xenotime.net>
2199L: linux-doc@vger.kernel.org 2209L: linux-doc@vger.kernel.org
2200T: quilt oss.oracle.com/~rdunlap/kernel-doc-patches/current/ 2210T: quilt http://userweb.kernel.org/~rdunlap/kernel-doc-patches/current/
2201S: Maintained 2211S: Maintained
2202F: Documentation/ 2212F: Documentation/
2203 2213
@@ -4982,7 +4992,7 @@ F: drivers/power/power_supply*
4982 4992
4983PNP SUPPORT 4993PNP SUPPORT
4984M: Adam Belay <abelay@mit.edu> 4994M: Adam Belay <abelay@mit.edu>
4985M: Bjorn Helgaas <bjorn.helgaas@hp.com> 4995M: Bjorn Helgaas <bhelgaas@google.com>
4986S: Maintained 4996S: Maintained
4987F: drivers/pnp/ 4997F: drivers/pnp/
4988 4998
@@ -5181,6 +5191,7 @@ S: Supported
5181F: drivers/net/qlcnic/ 5191F: drivers/net/qlcnic/
5182 5192
5183QLOGIC QLGE 10Gb ETHERNET DRIVER 5193QLOGIC QLGE 10Gb ETHERNET DRIVER
5194M: Jitendra Kalsaria <jitendra.kalsaria@qlogic.com>
5184M: Ron Mercer <ron.mercer@qlogic.com> 5195M: Ron Mercer <ron.mercer@qlogic.com>
5185M: linux-driver@qlogic.com 5196M: linux-driver@qlogic.com
5186L: netdev@vger.kernel.org 5197L: netdev@vger.kernel.org
@@ -6434,8 +6445,9 @@ S: Maintained
6434F: drivers/usb/misc/rio500* 6445F: drivers/usb/misc/rio500*
6435 6446
6436USB EHCI DRIVER 6447USB EHCI DRIVER
6448M: Alan Stern <stern@rowland.harvard.edu>
6437L: linux-usb@vger.kernel.org 6449L: linux-usb@vger.kernel.org
6438S: Orphan 6450S: Maintained
6439F: Documentation/usb/ehci.txt 6451F: Documentation/usb/ehci.txt
6440F: drivers/usb/host/ehci* 6452F: drivers/usb/host/ehci*
6441 6453
@@ -6465,6 +6477,12 @@ S: Maintained
6465F: Documentation/hid/hiddev.txt 6477F: Documentation/hid/hiddev.txt
6466F: drivers/hid/usbhid/ 6478F: drivers/hid/usbhid/
6467 6479
6480USB/IP DRIVERS
6481M: Matt Mooney <mfm@muteddisk.com>
6482L: linux-usb@vger.kernel.org
6483S: Maintained
6484F: drivers/staging/usbip/
6485
6468USB ISP116X DRIVER 6486USB ISP116X DRIVER
6469M: Olav Kongas <ok@artecdesign.ee> 6487M: Olav Kongas <ok@artecdesign.ee>
6470L: linux-usb@vger.kernel.org 6488L: linux-usb@vger.kernel.org
@@ -6494,8 +6512,9 @@ S: Maintained
6494F: sound/usb/midi.* 6512F: sound/usb/midi.*
6495 6513
6496USB OHCI DRIVER 6514USB OHCI DRIVER
6515M: Alan Stern <stern@rowland.harvard.edu>
6497L: linux-usb@vger.kernel.org 6516L: linux-usb@vger.kernel.org
6498S: Orphan 6517S: Maintained
6499F: Documentation/usb/ohci.txt 6518F: Documentation/usb/ohci.txt
6500F: drivers/usb/host/ohci* 6519F: drivers/usb/host/ohci*
6501 6520
@@ -6724,6 +6743,7 @@ F: fs/fat/
6724VIDEOBUF2 FRAMEWORK 6743VIDEOBUF2 FRAMEWORK
6725M: Pawel Osciak <pawel@osciak.com> 6744M: Pawel Osciak <pawel@osciak.com>
6726M: Marek Szyprowski <m.szyprowski@samsung.com> 6745M: Marek Szyprowski <m.szyprowski@samsung.com>
6746M: Kyungmin Park <kyungmin.park@samsung.com>
6727L: linux-media@vger.kernel.org 6747L: linux-media@vger.kernel.org
6728S: Maintained 6748S: Maintained
6729F: drivers/media/video/videobuf2-* 6749F: drivers/media/video/videobuf2-*
diff --git a/Makefile b/Makefile
index dc670467fb8c..60d91f76c2fd 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
1VERSION = 3 1VERSION = 3
2PATCHLEVEL = 0 2PATCHLEVEL = 0
3SUBLEVEL = 0 3SUBLEVEL = 0
4EXTRAVERSION = -rc5 4EXTRAVERSION = -rc7
5NAME = Sneaky Weasel 5NAME = Sneaky Weasel
6 6
7# *DOCUMENTATION* 7# *DOCUMENTATION*
diff --git a/README b/README
index 8510017a3576..0d5a7ddbe3ee 100644
--- a/README
+++ b/README
@@ -1,6 +1,6 @@
1 Linux kernel release 2.6.xx <http://kernel.org/> 1 Linux kernel release 3.x <http://kernel.org/>
2 2
3These are the release notes for Linux version 2.6. Read them carefully, 3These are the release notes for Linux version 3. Read them carefully,
4as they tell you what this is all about, explain how to install the 4as they tell you what this is all about, explain how to install the
5kernel, and what to do if something goes wrong. 5kernel, and what to do if something goes wrong.
6 6
@@ -62,10 +62,10 @@ INSTALLING the kernel source:
62 directory where you have permissions (eg. your home directory) and 62 directory where you have permissions (eg. your home directory) and
63 unpack it: 63 unpack it:
64 64
65 gzip -cd linux-2.6.XX.tar.gz | tar xvf - 65 gzip -cd linux-3.X.tar.gz | tar xvf -
66 66
67 or 67 or
68 bzip2 -dc linux-2.6.XX.tar.bz2 | tar xvf - 68 bzip2 -dc linux-3.X.tar.bz2 | tar xvf -
69 69
70 70
71 Replace "XX" with the version number of the latest kernel. 71 Replace "XX" with the version number of the latest kernel.
@@ -75,15 +75,15 @@ INSTALLING the kernel source:
75 files. They should match the library, and not get messed up by 75 files. They should match the library, and not get messed up by
76 whatever the kernel-du-jour happens to be. 76 whatever the kernel-du-jour happens to be.
77 77
78 - You can also upgrade between 2.6.xx releases by patching. Patches are 78 - You can also upgrade between 3.x releases by patching. Patches are
79 distributed in the traditional gzip and the newer bzip2 format. To 79 distributed in the traditional gzip and the newer bzip2 format. To
80 install by patching, get all the newer patch files, enter the 80 install by patching, get all the newer patch files, enter the
81 top level directory of the kernel source (linux-2.6.xx) and execute: 81 top level directory of the kernel source (linux-3.x) and execute:
82 82
83 gzip -cd ../patch-2.6.xx.gz | patch -p1 83 gzip -cd ../patch-3.x.gz | patch -p1
84 84
85 or 85 or
86 bzip2 -dc ../patch-2.6.xx.bz2 | patch -p1 86 bzip2 -dc ../patch-3.x.bz2 | patch -p1
87 87
88 (repeat xx for all versions bigger than the version of your current 88 (repeat xx for all versions bigger than the version of your current
89 source tree, _in_order_) and you should be ok. You may want to remove 89 source tree, _in_order_) and you should be ok. You may want to remove
@@ -91,9 +91,9 @@ INSTALLING the kernel source:
91 failed patches (xxx# or xxx.rej). If there are, either you or me has 91 failed patches (xxx# or xxx.rej). If there are, either you or me has
92 made a mistake. 92 made a mistake.
93 93
94 Unlike patches for the 2.6.x kernels, patches for the 2.6.x.y kernels 94 Unlike patches for the 3.x kernels, patches for the 3.x.y kernels
95 (also known as the -stable kernels) are not incremental but instead apply 95 (also known as the -stable kernels) are not incremental but instead apply
96 directly to the base 2.6.x kernel. Please read 96 directly to the base 3.x kernel. Please read
97 Documentation/applying-patches.txt for more information. 97 Documentation/applying-patches.txt for more information.
98 98
99 Alternatively, the script patch-kernel can be used to automate this 99 Alternatively, the script patch-kernel can be used to automate this
@@ -107,14 +107,14 @@ INSTALLING the kernel source:
107 an alternative directory can be specified as the second argument. 107 an alternative directory can be specified as the second argument.
108 108
109 - If you are upgrading between releases using the stable series patches 109 - If you are upgrading between releases using the stable series patches
110 (for example, patch-2.6.xx.y), note that these "dot-releases" are 110 (for example, patch-3.x.y), note that these "dot-releases" are
111 not incremental and must be applied to the 2.6.xx base tree. For 111 not incremental and must be applied to the 3.x base tree. For
112 example, if your base kernel is 2.6.12 and you want to apply the 112 example, if your base kernel is 3.0 and you want to apply the
113 2.6.12.3 patch, you do not and indeed must not first apply the 113 3.0.3 patch, you do not and indeed must not first apply the
114 2.6.12.1 and 2.6.12.2 patches. Similarly, if you are running kernel 114 3.0.1 and 3.0.2 patches. Similarly, if you are running kernel
115 version 2.6.12.2 and want to jump to 2.6.12.3, you must first 115 version 3.0.2 and want to jump to 3.0.3, you must first
116 reverse the 2.6.12.2 patch (that is, patch -R) _before_ applying 116 reverse the 3.0.2 patch (that is, patch -R) _before_ applying
117 the 2.6.12.3 patch. 117 the 3.0.3 patch.
118 You can read more on this in Documentation/applying-patches.txt 118 You can read more on this in Documentation/applying-patches.txt
119 119
120 - Make sure you have no stale .o files and dependencies lying around: 120 - Make sure you have no stale .o files and dependencies lying around:
@@ -126,7 +126,7 @@ INSTALLING the kernel source:
126 126
127SOFTWARE REQUIREMENTS 127SOFTWARE REQUIREMENTS
128 128
129 Compiling and running the 2.6.xx kernels requires up-to-date 129 Compiling and running the 3.x kernels requires up-to-date
130 versions of various software packages. Consult 130 versions of various software packages. Consult
131 Documentation/Changes for the minimum version numbers required 131 Documentation/Changes for the minimum version numbers required
132 and how to get updates for these packages. Beware that using 132 and how to get updates for these packages. Beware that using
@@ -142,11 +142,11 @@ BUILD directory for the kernel:
142 Using the option "make O=output/dir" allow you to specify an alternate 142 Using the option "make O=output/dir" allow you to specify an alternate
143 place for the output files (including .config). 143 place for the output files (including .config).
144 Example: 144 Example:
145 kernel source code: /usr/src/linux-2.6.N 145 kernel source code: /usr/src/linux-3.N
146 build directory: /home/name/build/kernel 146 build directory: /home/name/build/kernel
147 147
148 To configure and build the kernel use: 148 To configure and build the kernel use:
149 cd /usr/src/linux-2.6.N 149 cd /usr/src/linux-3.N
150 make O=/home/name/build/kernel menuconfig 150 make O=/home/name/build/kernel menuconfig
151 make O=/home/name/build/kernel 151 make O=/home/name/build/kernel
152 sudo make O=/home/name/build/kernel modules_install install 152 sudo make O=/home/name/build/kernel modules_install install
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9adc278a22ab..68b456129bef 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -10,7 +10,7 @@ config ARM
10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) 10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_ARCH_KGDB 12 select HAVE_ARCH_KGDB
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) 13 select HAVE_KPROBES if !XIP_KERNEL
14 select HAVE_KRETPROBES if (HAVE_KPROBES) 14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) 16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index e5681636626f..841df7d21c2f 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -255,7 +255,7 @@ static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size,
255 if (buf == 0) { 255 if (buf == 0) {
256 dev_err(dev, "%s: unable to map unsafe buffer %p!\n", 256 dev_err(dev, "%s: unable to map unsafe buffer %p!\n",
257 __func__, ptr); 257 __func__, ptr);
258 return 0; 258 return ~0;
259 } 259 }
260 260
261 dev_dbg(dev, 261 dev_dbg(dev,
diff --git a/arch/arm/include/asm/kprobes.h b/arch/arm/include/asm/kprobes.h
index e46bdd0097eb..feec86768f9c 100644
--- a/arch/arm/include/asm/kprobes.h
+++ b/arch/arm/include/asm/kprobes.h
@@ -24,12 +24,6 @@
24#define MAX_INSN_SIZE 2 24#define MAX_INSN_SIZE 2
25#define MAX_STACK_SIZE 64 /* 32 would probably be OK */ 25#define MAX_STACK_SIZE 64 /* 32 would probably be OK */
26 26
27/*
28 * This undefined instruction must be unique and
29 * reserved solely for kprobes' use.
30 */
31#define KPROBE_BREAKPOINT_INSTRUCTION 0xe7f001f8
32
33#define regs_return_value(regs) ((regs)->ARM_r0) 27#define regs_return_value(regs) ((regs)->ARM_r0)
34#define flush_insn_slot(p) do { } while (0) 28#define flush_insn_slot(p) do { } while (0)
35#define kretprobe_blacklist_size 0 29#define kretprobe_blacklist_size 0
@@ -38,14 +32,17 @@ typedef u32 kprobe_opcode_t;
38 32
39struct kprobe; 33struct kprobe;
40typedef void (kprobe_insn_handler_t)(struct kprobe *, struct pt_regs *); 34typedef void (kprobe_insn_handler_t)(struct kprobe *, struct pt_regs *);
41
42typedef unsigned long (kprobe_check_cc)(unsigned long); 35typedef unsigned long (kprobe_check_cc)(unsigned long);
36typedef void (kprobe_insn_singlestep_t)(struct kprobe *, struct pt_regs *);
37typedef void (kprobe_insn_fn_t)(void);
43 38
44/* Architecture specific copy of original instruction. */ 39/* Architecture specific copy of original instruction. */
45struct arch_specific_insn { 40struct arch_specific_insn {
46 kprobe_opcode_t *insn; 41 kprobe_opcode_t *insn;
47 kprobe_insn_handler_t *insn_handler; 42 kprobe_insn_handler_t *insn_handler;
48 kprobe_check_cc *insn_check_cc; 43 kprobe_check_cc *insn_check_cc;
44 kprobe_insn_singlestep_t *insn_singlestep;
45 kprobe_insn_fn_t *insn_fn;
49}; 46};
50 47
51struct prev_kprobe { 48struct prev_kprobe {
@@ -62,20 +59,9 @@ struct kprobe_ctlblk {
62}; 59};
63 60
64void arch_remove_kprobe(struct kprobe *); 61void arch_remove_kprobe(struct kprobe *);
65void kretprobe_trampoline(void);
66
67int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr); 62int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
68int kprobe_exceptions_notify(struct notifier_block *self, 63int kprobe_exceptions_notify(struct notifier_block *self,
69 unsigned long val, void *data); 64 unsigned long val, void *data);
70 65
71enum kprobe_insn {
72 INSN_REJECTED,
73 INSN_GOOD,
74 INSN_GOOD_NO_SLOT
75};
76
77enum kprobe_insn arm_kprobe_decode_insn(kprobe_opcode_t,
78 struct arch_specific_insn *);
79void __init arm_kprobe_decode_init(void);
80 66
81#endif /* _ARM_KPROBES_H */ 67#endif /* _ARM_KPROBES_H */
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index 312d10877bd7..96187ff58c24 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -69,8 +69,9 @@
69#define PSR_c 0x000000ff /* Control */ 69#define PSR_c 0x000000ff /* Control */
70 70
71/* 71/*
72 * ARMv7 groups of APSR bits 72 * ARMv7 groups of PSR bits
73 */ 73 */
74#define APSR_MASK 0xf80f0000 /* N, Z, C, V, Q and GE flags */
74#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */ 75#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
75#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */ 76#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
76#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */ 77#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
@@ -200,6 +201,14 @@ extern unsigned long profile_pc(struct pt_regs *regs);
200#define PREDICATE_ALWAYS 0xe0000000 201#define PREDICATE_ALWAYS 0xe0000000
201 202
202/* 203/*
204 * True if instr is a 32-bit thumb instruction. This works if instr
205 * is the first or only half-word of a thumb instruction. It also works
206 * when instr holds all 32-bits of a wide thumb instruction if stored
207 * in the form (first_half<<16)|(second_half)
208 */
209#define is_wide_instruction(instr) ((unsigned)(instr) >= 0xe800)
210
211/*
203 * kprobe-based event tracer support 212 * kprobe-based event tracer support
204 */ 213 */
205#include <linux/stddef.h> 214#include <linux/stddef.h>
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index a5b31af5c2b8..f7887dc53c1f 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -37,7 +37,12 @@ obj-$(CONFIG_HAVE_ARM_TWD) += smp_twd.o
37obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 37obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
38obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o 38obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
39obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o 39obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
40obj-$(CONFIG_KPROBES) += kprobes.o kprobes-decode.o 40obj-$(CONFIG_KPROBES) += kprobes.o kprobes-common.o
41ifdef CONFIG_THUMB2_KERNEL
42obj-$(CONFIG_KPROBES) += kprobes-thumb.o
43else
44obj-$(CONFIG_KPROBES) += kprobes-arm.o
45endif
41obj-$(CONFIG_ATAGS_PROC) += atags.o 46obj-$(CONFIG_ATAGS_PROC) += atags.o
42obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o 47obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
43obj-$(CONFIG_ARM_THUMBEE) += thumbee.o 48obj-$(CONFIG_ARM_THUMBEE) += thumbee.o
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 051166c2a932..83e29adced6c 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -121,15 +121,13 @@
121 .endm 121 .endm
122#else /* CONFIG_THUMB2_KERNEL */ 122#else /* CONFIG_THUMB2_KERNEL */
123 .macro svc_exit, rpsr 123 .macro svc_exit, rpsr
124 ldr lr, [sp, #S_SP] @ top of the stack
125 ldrd r0, r1, [sp, #S_LR] @ calling lr and pc
124 clrex @ clear the exclusive monitor 126 clrex @ clear the exclusive monitor
125 ldr r0, [sp, #S_SP] @ top of the stack 127 stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context
126 ldr r1, [sp, #S_PC] @ return address
127 tst r0, #4 @ orig stack 8-byte aligned?
128 stmdb r0, {r1, \rpsr} @ rfe context
129 ldmia sp, {r0 - r12} 128 ldmia sp, {r0 - r12}
130 ldr lr, [sp, #S_LR] 129 mov sp, lr
131 addeq sp, sp, #S_FRAME_SIZE - 8 @ aligned 130 ldr lr, [sp], #4
132 addne sp, sp, #S_FRAME_SIZE - 4 @ not aligned
133 rfeia sp! 131 rfeia sp!
134 .endm 132 .endm
135 133
diff --git a/arch/arm/kernel/kprobes-arm.c b/arch/arm/kernel/kprobes-arm.c
new file mode 100644
index 000000000000..79203ee1d039
--- /dev/null
+++ b/arch/arm/kernel/kprobes-arm.c
@@ -0,0 +1,999 @@
1/*
2 * arch/arm/kernel/kprobes-decode.c
3 *
4 * Copyright (C) 2006, 2007 Motorola Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 */
15
16/*
17 * We do not have hardware single-stepping on ARM, This
18 * effort is further complicated by the ARM not having a
19 * "next PC" register. Instructions that change the PC
20 * can't be safely single-stepped in a MP environment, so
21 * we have a lot of work to do:
22 *
23 * In the prepare phase:
24 * *) If it is an instruction that does anything
25 * with the CPU mode, we reject it for a kprobe.
26 * (This is out of laziness rather than need. The
27 * instructions could be simulated.)
28 *
29 * *) Otherwise, decode the instruction rewriting its
30 * registers to take fixed, ordered registers and
31 * setting a handler for it to run the instruction.
32 *
33 * In the execution phase by an instruction's handler:
34 *
35 * *) If the PC is written to by the instruction, the
36 * instruction must be fully simulated in software.
37 *
38 * *) Otherwise, a modified form of the instruction is
39 * directly executed. Its handler calls the
40 * instruction in insn[0]. In insn[1] is a
41 * "mov pc, lr" to return.
42 *
43 * Before calling, load up the reordered registers
44 * from the original instruction's registers. If one
45 * of the original input registers is the PC, compute
46 * and adjust the appropriate input register.
47 *
48 * After call completes, copy the output registers to
49 * the original instruction's original registers.
50 *
51 * We don't use a real breakpoint instruction since that
52 * would have us in the kernel go from SVC mode to SVC
53 * mode losing the link register. Instead we use an
54 * undefined instruction. To simplify processing, the
55 * undefined instruction used for kprobes must be reserved
56 * exclusively for kprobes use.
57 *
58 * TODO: ifdef out some instruction decoding based on architecture.
59 */
60
61#include <linux/kernel.h>
62#include <linux/kprobes.h>
63
64#include "kprobes.h"
65
66#define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
67
68#define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
69
70#if __LINUX_ARM_ARCH__ >= 6
71#define BLX(reg) "blx "reg" \n\t"
72#else
73#define BLX(reg) "mov lr, pc \n\t" \
74 "mov pc, "reg" \n\t"
75#endif
76
77/*
78 * To avoid the complications of mimicing single-stepping on a
79 * processor without a Next-PC or a single-step mode, and to
80 * avoid having to deal with the side-effects of boosting, we
81 * simulate or emulate (almost) all ARM instructions.
82 *
83 * "Simulation" is where the instruction's behavior is duplicated in
84 * C code. "Emulation" is where the original instruction is rewritten
85 * and executed, often by altering its registers.
86 *
87 * By having all behavior of the kprobe'd instruction completed before
88 * returning from the kprobe_handler(), all locks (scheduler and
89 * interrupt) can safely be released. There is no need for secondary
90 * breakpoints, no race with MP or preemptable kernels, nor having to
91 * clean up resources counts at a later time impacting overall system
92 * performance. By rewriting the instruction, only the minimum registers
93 * need to be loaded and saved back optimizing performance.
94 *
95 * Calling the insnslot_*_rwflags version of a function doesn't hurt
96 * anything even when the CPSR flags aren't updated by the
97 * instruction. It's just a little slower in return for saving
98 * a little space by not having a duplicate function that doesn't
99 * update the flags. (The same optimization can be said for
100 * instructions that do or don't perform register writeback)
101 * Also, instructions can either read the flags, only write the
102 * flags, or read and write the flags. To save combinations
103 * rather than for sheer performance, flag functions just assume
104 * read and write of flags.
105 */
106
107static void __kprobes simulate_bbl(struct kprobe *p, struct pt_regs *regs)
108{
109 kprobe_opcode_t insn = p->opcode;
110 long iaddr = (long)p->addr;
111 int disp = branch_displacement(insn);
112
113 if (insn & (1 << 24))
114 regs->ARM_lr = iaddr + 4;
115
116 regs->ARM_pc = iaddr + 8 + disp;
117}
118
119static void __kprobes simulate_blx1(struct kprobe *p, struct pt_regs *regs)
120{
121 kprobe_opcode_t insn = p->opcode;
122 long iaddr = (long)p->addr;
123 int disp = branch_displacement(insn);
124
125 regs->ARM_lr = iaddr + 4;
126 regs->ARM_pc = iaddr + 8 + disp + ((insn >> 23) & 0x2);
127 regs->ARM_cpsr |= PSR_T_BIT;
128}
129
130static void __kprobes simulate_blx2bx(struct kprobe *p, struct pt_regs *regs)
131{
132 kprobe_opcode_t insn = p->opcode;
133 int rm = insn & 0xf;
134 long rmv = regs->uregs[rm];
135
136 if (insn & (1 << 5))
137 regs->ARM_lr = (long)p->addr + 4;
138
139 regs->ARM_pc = rmv & ~0x1;
140 regs->ARM_cpsr &= ~PSR_T_BIT;
141 if (rmv & 0x1)
142 regs->ARM_cpsr |= PSR_T_BIT;
143}
144
145static void __kprobes simulate_mrs(struct kprobe *p, struct pt_regs *regs)
146{
147 kprobe_opcode_t insn = p->opcode;
148 int rd = (insn >> 12) & 0xf;
149 unsigned long mask = 0xf8ff03df; /* Mask out execution state */
150 regs->uregs[rd] = regs->ARM_cpsr & mask;
151}
152
153static void __kprobes simulate_mov_ipsp(struct kprobe *p, struct pt_regs *regs)
154{
155 regs->uregs[12] = regs->uregs[13];
156}
157
158static void __kprobes
159emulate_ldrdstrd(struct kprobe *p, struct pt_regs *regs)
160{
161 kprobe_opcode_t insn = p->opcode;
162 unsigned long pc = (unsigned long)p->addr + 8;
163 int rt = (insn >> 12) & 0xf;
164 int rn = (insn >> 16) & 0xf;
165 int rm = insn & 0xf;
166
167 register unsigned long rtv asm("r0") = regs->uregs[rt];
168 register unsigned long rt2v asm("r1") = regs->uregs[rt+1];
169 register unsigned long rnv asm("r2") = (rn == 15) ? pc
170 : regs->uregs[rn];
171 register unsigned long rmv asm("r3") = regs->uregs[rm];
172
173 __asm__ __volatile__ (
174 BLX("%[fn]")
175 : "=r" (rtv), "=r" (rt2v), "=r" (rnv)
176 : "0" (rtv), "1" (rt2v), "2" (rnv), "r" (rmv),
177 [fn] "r" (p->ainsn.insn_fn)
178 : "lr", "memory", "cc"
179 );
180
181 regs->uregs[rt] = rtv;
182 regs->uregs[rt+1] = rt2v;
183 if (is_writeback(insn))
184 regs->uregs[rn] = rnv;
185}
186
187static void __kprobes
188emulate_ldr(struct kprobe *p, struct pt_regs *regs)
189{
190 kprobe_opcode_t insn = p->opcode;
191 unsigned long pc = (unsigned long)p->addr + 8;
192 int rt = (insn >> 12) & 0xf;
193 int rn = (insn >> 16) & 0xf;
194 int rm = insn & 0xf;
195
196 register unsigned long rtv asm("r0");
197 register unsigned long rnv asm("r2") = (rn == 15) ? pc
198 : regs->uregs[rn];
199 register unsigned long rmv asm("r3") = regs->uregs[rm];
200
201 __asm__ __volatile__ (
202 BLX("%[fn]")
203 : "=r" (rtv), "=r" (rnv)
204 : "1" (rnv), "r" (rmv), [fn] "r" (p->ainsn.insn_fn)
205 : "lr", "memory", "cc"
206 );
207
208 if (rt == 15)
209 load_write_pc(rtv, regs);
210 else
211 regs->uregs[rt] = rtv;
212
213 if (is_writeback(insn))
214 regs->uregs[rn] = rnv;
215}
216
217static void __kprobes
218emulate_str(struct kprobe *p, struct pt_regs *regs)
219{
220 kprobe_opcode_t insn = p->opcode;
221 unsigned long rtpc = (unsigned long)p->addr + str_pc_offset;
222 unsigned long rnpc = (unsigned long)p->addr + 8;
223 int rt = (insn >> 12) & 0xf;
224 int rn = (insn >> 16) & 0xf;
225 int rm = insn & 0xf;
226
227 register unsigned long rtv asm("r0") = (rt == 15) ? rtpc
228 : regs->uregs[rt];
229 register unsigned long rnv asm("r2") = (rn == 15) ? rnpc
230 : regs->uregs[rn];
231 register unsigned long rmv asm("r3") = regs->uregs[rm];
232
233 __asm__ __volatile__ (
234 BLX("%[fn]")
235 : "=r" (rnv)
236 : "r" (rtv), "0" (rnv), "r" (rmv), [fn] "r" (p->ainsn.insn_fn)
237 : "lr", "memory", "cc"
238 );
239
240 if (is_writeback(insn))
241 regs->uregs[rn] = rnv;
242}
243
244static void __kprobes
245emulate_rd12rn16rm0rs8_rwflags(struct kprobe *p, struct pt_regs *regs)
246{
247 kprobe_opcode_t insn = p->opcode;
248 unsigned long pc = (unsigned long)p->addr + 8;
249 int rd = (insn >> 12) & 0xf;
250 int rn = (insn >> 16) & 0xf;
251 int rm = insn & 0xf;
252 int rs = (insn >> 8) & 0xf;
253
254 register unsigned long rdv asm("r0") = regs->uregs[rd];
255 register unsigned long rnv asm("r2") = (rn == 15) ? pc
256 : regs->uregs[rn];
257 register unsigned long rmv asm("r3") = (rm == 15) ? pc
258 : regs->uregs[rm];
259 register unsigned long rsv asm("r1") = regs->uregs[rs];
260 unsigned long cpsr = regs->ARM_cpsr;
261
262 __asm__ __volatile__ (
263 "msr cpsr_fs, %[cpsr] \n\t"
264 BLX("%[fn]")
265 "mrs %[cpsr], cpsr \n\t"
266 : "=r" (rdv), [cpsr] "=r" (cpsr)
267 : "0" (rdv), "r" (rnv), "r" (rmv), "r" (rsv),
268 "1" (cpsr), [fn] "r" (p->ainsn.insn_fn)
269 : "lr", "memory", "cc"
270 );
271
272 if (rd == 15)
273 alu_write_pc(rdv, regs);
274 else
275 regs->uregs[rd] = rdv;
276 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
277}
278
279static void __kprobes
280emulate_rd12rn16rm0_rwflags_nopc(struct kprobe *p, struct pt_regs *regs)
281{
282 kprobe_opcode_t insn = p->opcode;
283 int rd = (insn >> 12) & 0xf;
284 int rn = (insn >> 16) & 0xf;
285 int rm = insn & 0xf;
286
287 register unsigned long rdv asm("r0") = regs->uregs[rd];
288 register unsigned long rnv asm("r2") = regs->uregs[rn];
289 register unsigned long rmv asm("r3") = regs->uregs[rm];
290 unsigned long cpsr = regs->ARM_cpsr;
291
292 __asm__ __volatile__ (
293 "msr cpsr_fs, %[cpsr] \n\t"
294 BLX("%[fn]")
295 "mrs %[cpsr], cpsr \n\t"
296 : "=r" (rdv), [cpsr] "=r" (cpsr)
297 : "0" (rdv), "r" (rnv), "r" (rmv),
298 "1" (cpsr), [fn] "r" (p->ainsn.insn_fn)
299 : "lr", "memory", "cc"
300 );
301
302 regs->uregs[rd] = rdv;
303 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
304}
305
306static void __kprobes
307emulate_rd16rn12rm0rs8_rwflags_nopc(struct kprobe *p, struct pt_regs *regs)
308{
309 kprobe_opcode_t insn = p->opcode;
310 int rd = (insn >> 16) & 0xf;
311 int rn = (insn >> 12) & 0xf;
312 int rm = insn & 0xf;
313 int rs = (insn >> 8) & 0xf;
314
315 register unsigned long rdv asm("r2") = regs->uregs[rd];
316 register unsigned long rnv asm("r0") = regs->uregs[rn];
317 register unsigned long rmv asm("r3") = regs->uregs[rm];
318 register unsigned long rsv asm("r1") = regs->uregs[rs];
319 unsigned long cpsr = regs->ARM_cpsr;
320
321 __asm__ __volatile__ (
322 "msr cpsr_fs, %[cpsr] \n\t"
323 BLX("%[fn]")
324 "mrs %[cpsr], cpsr \n\t"
325 : "=r" (rdv), [cpsr] "=r" (cpsr)
326 : "0" (rdv), "r" (rnv), "r" (rmv), "r" (rsv),
327 "1" (cpsr), [fn] "r" (p->ainsn.insn_fn)
328 : "lr", "memory", "cc"
329 );
330
331 regs->uregs[rd] = rdv;
332 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
333}
334
335static void __kprobes
336emulate_rd12rm0_noflags_nopc(struct kprobe *p, struct pt_regs *regs)
337{
338 kprobe_opcode_t insn = p->opcode;
339 int rd = (insn >> 12) & 0xf;
340 int rm = insn & 0xf;
341
342 register unsigned long rdv asm("r0") = regs->uregs[rd];
343 register unsigned long rmv asm("r3") = regs->uregs[rm];
344
345 __asm__ __volatile__ (
346 BLX("%[fn]")
347 : "=r" (rdv)
348 : "0" (rdv), "r" (rmv), [fn] "r" (p->ainsn.insn_fn)
349 : "lr", "memory", "cc"
350 );
351
352 regs->uregs[rd] = rdv;
353}
354
355static void __kprobes
356emulate_rdlo12rdhi16rn0rm8_rwflags_nopc(struct kprobe *p, struct pt_regs *regs)
357{
358 kprobe_opcode_t insn = p->opcode;
359 int rdlo = (insn >> 12) & 0xf;
360 int rdhi = (insn >> 16) & 0xf;
361 int rn = insn & 0xf;
362 int rm = (insn >> 8) & 0xf;
363
364 register unsigned long rdlov asm("r0") = regs->uregs[rdlo];
365 register unsigned long rdhiv asm("r2") = regs->uregs[rdhi];
366 register unsigned long rnv asm("r3") = regs->uregs[rn];
367 register unsigned long rmv asm("r1") = regs->uregs[rm];
368 unsigned long cpsr = regs->ARM_cpsr;
369
370 __asm__ __volatile__ (
371 "msr cpsr_fs, %[cpsr] \n\t"
372 BLX("%[fn]")
373 "mrs %[cpsr], cpsr \n\t"
374 : "=r" (rdlov), "=r" (rdhiv), [cpsr] "=r" (cpsr)
375 : "0" (rdlov), "1" (rdhiv), "r" (rnv), "r" (rmv),
376 "2" (cpsr), [fn] "r" (p->ainsn.insn_fn)
377 : "lr", "memory", "cc"
378 );
379
380 regs->uregs[rdlo] = rdlov;
381 regs->uregs[rdhi] = rdhiv;
382 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
383}
384
385/*
386 * For the instruction masking and comparisons in all the "space_*"
387 * functions below, Do _not_ rearrange the order of tests unless
388 * you're very, very sure of what you are doing. For the sake of
389 * efficiency, the masks for some tests sometimes assume other test
390 * have been done prior to them so the number of patterns to test
391 * for an instruction set can be as broad as possible to reduce the
392 * number of tests needed.
393 */
394
395static const union decode_item arm_1111_table[] = {
396 /* Unconditional instructions */
397
398 /* memory hint 1111 0100 x001 xxxx xxxx xxxx xxxx xxxx */
399 /* PLDI (immediate) 1111 0100 x101 xxxx xxxx xxxx xxxx xxxx */
400 /* PLDW (immediate) 1111 0101 x001 xxxx xxxx xxxx xxxx xxxx */
401 /* PLD (immediate) 1111 0101 x101 xxxx xxxx xxxx xxxx xxxx */
402 DECODE_SIMULATE (0xfe300000, 0xf4100000, kprobe_simulate_nop),
403
404 /* memory hint 1111 0110 x001 xxxx xxxx xxxx xxx0 xxxx */
405 /* PLDI (register) 1111 0110 x101 xxxx xxxx xxxx xxx0 xxxx */
406 /* PLDW (register) 1111 0111 x001 xxxx xxxx xxxx xxx0 xxxx */
407 /* PLD (register) 1111 0111 x101 xxxx xxxx xxxx xxx0 xxxx */
408 DECODE_SIMULATE (0xfe300010, 0xf6100000, kprobe_simulate_nop),
409
410 /* BLX (immediate) 1111 101x xxxx xxxx xxxx xxxx xxxx xxxx */
411 DECODE_SIMULATE (0xfe000000, 0xfa000000, simulate_blx1),
412
413 /* CPS 1111 0001 0000 xxx0 xxxx xxxx xx0x xxxx */
414 /* SETEND 1111 0001 0000 0001 xxxx xxxx 0000 xxxx */
415 /* SRS 1111 100x x1x0 xxxx xxxx xxxx xxxx xxxx */
416 /* RFE 1111 100x x0x1 xxxx xxxx xxxx xxxx xxxx */
417
418 /* Coprocessor instructions... */
419 /* MCRR2 1111 1100 0100 xxxx xxxx xxxx xxxx xxxx */
420 /* MRRC2 1111 1100 0101 xxxx xxxx xxxx xxxx xxxx */
421 /* LDC2 1111 110x xxx1 xxxx xxxx xxxx xxxx xxxx */
422 /* STC2 1111 110x xxx0 xxxx xxxx xxxx xxxx xxxx */
423 /* CDP2 1111 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */
424 /* MCR2 1111 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */
425 /* MRC2 1111 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */
426
427 /* Other unallocated instructions... */
428 DECODE_END
429};
430
431static const union decode_item arm_cccc_0001_0xx0____0xxx_table[] = {
432 /* Miscellaneous instructions */
433
434 /* MRS cpsr cccc 0001 0000 xxxx xxxx xxxx 0000 xxxx */
435 DECODE_SIMULATEX(0x0ff000f0, 0x01000000, simulate_mrs,
436 REGS(0, NOPC, 0, 0, 0)),
437
438 /* BX cccc 0001 0010 xxxx xxxx xxxx 0001 xxxx */
439 DECODE_SIMULATE (0x0ff000f0, 0x01200010, simulate_blx2bx),
440
441 /* BLX (register) cccc 0001 0010 xxxx xxxx xxxx 0011 xxxx */
442 DECODE_SIMULATEX(0x0ff000f0, 0x01200030, simulate_blx2bx,
443 REGS(0, 0, 0, 0, NOPC)),
444
445 /* CLZ cccc 0001 0110 xxxx xxxx xxxx 0001 xxxx */
446 DECODE_EMULATEX (0x0ff000f0, 0x01600010, emulate_rd12rm0_noflags_nopc,
447 REGS(0, NOPC, 0, 0, NOPC)),
448
449 /* QADD cccc 0001 0000 xxxx xxxx xxxx 0101 xxxx */
450 /* QSUB cccc 0001 0010 xxxx xxxx xxxx 0101 xxxx */
451 /* QDADD cccc 0001 0100 xxxx xxxx xxxx 0101 xxxx */
452 /* QDSUB cccc 0001 0110 xxxx xxxx xxxx 0101 xxxx */
453 DECODE_EMULATEX (0x0f9000f0, 0x01000050, emulate_rd12rn16rm0_rwflags_nopc,
454 REGS(NOPC, NOPC, 0, 0, NOPC)),
455
456 /* BXJ cccc 0001 0010 xxxx xxxx xxxx 0010 xxxx */
457 /* MSR cccc 0001 0x10 xxxx xxxx xxxx 0000 xxxx */
458 /* MRS spsr cccc 0001 0100 xxxx xxxx xxxx 0000 xxxx */
459 /* BKPT 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */
460 /* SMC cccc 0001 0110 xxxx xxxx xxxx 0111 xxxx */
461 /* And unallocated instructions... */
462 DECODE_END
463};
464
465static const union decode_item arm_cccc_0001_0xx0____1xx0_table[] = {
466 /* Halfword multiply and multiply-accumulate */
467
468 /* SMLALxy cccc 0001 0100 xxxx xxxx xxxx 1xx0 xxxx */
469 DECODE_EMULATEX (0x0ff00090, 0x01400080, emulate_rdlo12rdhi16rn0rm8_rwflags_nopc,
470 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
471
472 /* SMULWy cccc 0001 0010 xxxx xxxx xxxx 1x10 xxxx */
473 DECODE_OR (0x0ff000b0, 0x012000a0),
474 /* SMULxy cccc 0001 0110 xxxx xxxx xxxx 1xx0 xxxx */
475 DECODE_EMULATEX (0x0ff00090, 0x01600080, emulate_rd16rn12rm0rs8_rwflags_nopc,
476 REGS(NOPC, 0, NOPC, 0, NOPC)),
477
478 /* SMLAxy cccc 0001 0000 xxxx xxxx xxxx 1xx0 xxxx */
479 DECODE_OR (0x0ff00090, 0x01000080),
480 /* SMLAWy cccc 0001 0010 xxxx xxxx xxxx 1x00 xxxx */
481 DECODE_EMULATEX (0x0ff000b0, 0x01200080, emulate_rd16rn12rm0rs8_rwflags_nopc,
482 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
483
484 DECODE_END
485};
486
487static const union decode_item arm_cccc_0000_____1001_table[] = {
488 /* Multiply and multiply-accumulate */
489
490 /* MUL cccc 0000 0000 xxxx xxxx xxxx 1001 xxxx */
491 /* MULS cccc 0000 0001 xxxx xxxx xxxx 1001 xxxx */
492 DECODE_EMULATEX (0x0fe000f0, 0x00000090, emulate_rd16rn12rm0rs8_rwflags_nopc,
493 REGS(NOPC, 0, NOPC, 0, NOPC)),
494
495 /* MLA cccc 0000 0010 xxxx xxxx xxxx 1001 xxxx */
496 /* MLAS cccc 0000 0011 xxxx xxxx xxxx 1001 xxxx */
497 DECODE_OR (0x0fe000f0, 0x00200090),
498 /* MLS cccc 0000 0110 xxxx xxxx xxxx 1001 xxxx */
499 DECODE_EMULATEX (0x0ff000f0, 0x00600090, emulate_rd16rn12rm0rs8_rwflags_nopc,
500 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
501
502 /* UMAAL cccc 0000 0100 xxxx xxxx xxxx 1001 xxxx */
503 DECODE_OR (0x0ff000f0, 0x00400090),
504 /* UMULL cccc 0000 1000 xxxx xxxx xxxx 1001 xxxx */
505 /* UMULLS cccc 0000 1001 xxxx xxxx xxxx 1001 xxxx */
506 /* UMLAL cccc 0000 1010 xxxx xxxx xxxx 1001 xxxx */
507 /* UMLALS cccc 0000 1011 xxxx xxxx xxxx 1001 xxxx */
508 /* SMULL cccc 0000 1100 xxxx xxxx xxxx 1001 xxxx */
509 /* SMULLS cccc 0000 1101 xxxx xxxx xxxx 1001 xxxx */
510 /* SMLAL cccc 0000 1110 xxxx xxxx xxxx 1001 xxxx */
511 /* SMLALS cccc 0000 1111 xxxx xxxx xxxx 1001 xxxx */
512 DECODE_EMULATEX (0x0f8000f0, 0x00800090, emulate_rdlo12rdhi16rn0rm8_rwflags_nopc,
513 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
514
515 DECODE_END
516};
517
518static const union decode_item arm_cccc_0001_____1001_table[] = {
519 /* Synchronization primitives */
520
521 /* SMP/SWPB cccc 0001 0x00 xxxx xxxx xxxx 1001 xxxx */
522 DECODE_EMULATEX (0x0fb000f0, 0x01000090, emulate_rd12rn16rm0_rwflags_nopc,
523 REGS(NOPC, NOPC, 0, 0, NOPC)),
524
525 /* LDREX/STREX{,D,B,H} cccc 0001 1xxx xxxx xxxx xxxx 1001 xxxx */
526 /* And unallocated instructions... */
527 DECODE_END
528};
529
530static const union decode_item arm_cccc_000x_____1xx1_table[] = {
531 /* Extra load/store instructions */
532
533 /* STRHT cccc 0000 xx10 xxxx xxxx xxxx 1011 xxxx */
534 /* ??? cccc 0000 xx10 xxxx xxxx xxxx 11x1 xxxx */
535 /* LDRHT cccc 0000 xx11 xxxx xxxx xxxx 1011 xxxx */
536 /* LDRSBT cccc 0000 xx11 xxxx xxxx xxxx 1101 xxxx */
537 /* LDRSHT cccc 0000 xx11 xxxx xxxx xxxx 1111 xxxx */
538 DECODE_REJECT (0x0f200090, 0x00200090),
539
540 /* LDRD/STRD lr,pc,{... cccc 000x x0x0 xxxx 111x xxxx 1101 xxxx */
541 DECODE_REJECT (0x0e10e0d0, 0x0000e0d0),
542
543 /* LDRD (register) cccc 000x x0x0 xxxx xxxx xxxx 1101 xxxx */
544 /* STRD (register) cccc 000x x0x0 xxxx xxxx xxxx 1111 xxxx */
545 DECODE_EMULATEX (0x0e5000d0, 0x000000d0, emulate_ldrdstrd,
546 REGS(NOPCWB, NOPCX, 0, 0, NOPC)),
547
548 /* LDRD (immediate) cccc 000x x1x0 xxxx xxxx xxxx 1101 xxxx */
549 /* STRD (immediate) cccc 000x x1x0 xxxx xxxx xxxx 1111 xxxx */
550 DECODE_EMULATEX (0x0e5000d0, 0x004000d0, emulate_ldrdstrd,
551 REGS(NOPCWB, NOPCX, 0, 0, 0)),
552
553 /* STRH (register) cccc 000x x0x0 xxxx xxxx xxxx 1011 xxxx */
554 DECODE_EMULATEX (0x0e5000f0, 0x000000b0, emulate_str,
555 REGS(NOPCWB, NOPC, 0, 0, NOPC)),
556
557 /* LDRH (register) cccc 000x x0x1 xxxx xxxx xxxx 1011 xxxx */
558 /* LDRSB (register) cccc 000x x0x1 xxxx xxxx xxxx 1101 xxxx */
559 /* LDRSH (register) cccc 000x x0x1 xxxx xxxx xxxx 1111 xxxx */
560 DECODE_EMULATEX (0x0e500090, 0x00100090, emulate_ldr,
561 REGS(NOPCWB, NOPC, 0, 0, NOPC)),
562
563 /* STRH (immediate) cccc 000x x1x0 xxxx xxxx xxxx 1011 xxxx */
564 DECODE_EMULATEX (0x0e5000f0, 0x004000b0, emulate_str,
565 REGS(NOPCWB, NOPC, 0, 0, 0)),
566
567 /* LDRH (immediate) cccc 000x x1x1 xxxx xxxx xxxx 1011 xxxx */
568 /* LDRSB (immediate) cccc 000x x1x1 xxxx xxxx xxxx 1101 xxxx */
569 /* LDRSH (immediate) cccc 000x x1x1 xxxx xxxx xxxx 1111 xxxx */
570 DECODE_EMULATEX (0x0e500090, 0x00500090, emulate_ldr,
571 REGS(NOPCWB, NOPC, 0, 0, 0)),
572
573 DECODE_END
574};
575
576static const union decode_item arm_cccc_000x_table[] = {
577 /* Data-processing (register) */
578
579 /* <op>S PC, ... cccc 000x xxx1 xxxx 1111 xxxx xxxx xxxx */
580 DECODE_REJECT (0x0e10f000, 0x0010f000),
581
582 /* MOV IP, SP 1110 0001 1010 0000 1100 0000 0000 1101 */
583 DECODE_SIMULATE (0xffffffff, 0xe1a0c00d, simulate_mov_ipsp),
584
585 /* TST (register) cccc 0001 0001 xxxx xxxx xxxx xxx0 xxxx */
586 /* TEQ (register) cccc 0001 0011 xxxx xxxx xxxx xxx0 xxxx */
587 /* CMP (register) cccc 0001 0101 xxxx xxxx xxxx xxx0 xxxx */
588 /* CMN (register) cccc 0001 0111 xxxx xxxx xxxx xxx0 xxxx */
589 DECODE_EMULATEX (0x0f900010, 0x01100000, emulate_rd12rn16rm0rs8_rwflags,
590 REGS(ANY, 0, 0, 0, ANY)),
591
592 /* MOV (register) cccc 0001 101x xxxx xxxx xxxx xxx0 xxxx */
593 /* MVN (register) cccc 0001 111x xxxx xxxx xxxx xxx0 xxxx */
594 DECODE_EMULATEX (0x0fa00010, 0x01a00000, emulate_rd12rn16rm0rs8_rwflags,
595 REGS(0, ANY, 0, 0, ANY)),
596
597 /* AND (register) cccc 0000 000x xxxx xxxx xxxx xxx0 xxxx */
598 /* EOR (register) cccc 0000 001x xxxx xxxx xxxx xxx0 xxxx */
599 /* SUB (register) cccc 0000 010x xxxx xxxx xxxx xxx0 xxxx */
600 /* RSB (register) cccc 0000 011x xxxx xxxx xxxx xxx0 xxxx */
601 /* ADD (register) cccc 0000 100x xxxx xxxx xxxx xxx0 xxxx */
602 /* ADC (register) cccc 0000 101x xxxx xxxx xxxx xxx0 xxxx */
603 /* SBC (register) cccc 0000 110x xxxx xxxx xxxx xxx0 xxxx */
604 /* RSC (register) cccc 0000 111x xxxx xxxx xxxx xxx0 xxxx */
605 /* ORR (register) cccc 0001 100x xxxx xxxx xxxx xxx0 xxxx */
606 /* BIC (register) cccc 0001 110x xxxx xxxx xxxx xxx0 xxxx */
607 DECODE_EMULATEX (0x0e000010, 0x00000000, emulate_rd12rn16rm0rs8_rwflags,
608 REGS(ANY, ANY, 0, 0, ANY)),
609
610 /* TST (reg-shift reg) cccc 0001 0001 xxxx xxxx xxxx 0xx1 xxxx */
611 /* TEQ (reg-shift reg) cccc 0001 0011 xxxx xxxx xxxx 0xx1 xxxx */
612 /* CMP (reg-shift reg) cccc 0001 0101 xxxx xxxx xxxx 0xx1 xxxx */
613 /* CMN (reg-shift reg) cccc 0001 0111 xxxx xxxx xxxx 0xx1 xxxx */
614 DECODE_EMULATEX (0x0f900090, 0x01100010, emulate_rd12rn16rm0rs8_rwflags,
615 REGS(ANY, 0, NOPC, 0, ANY)),
616
617 /* MOV (reg-shift reg) cccc 0001 101x xxxx xxxx xxxx 0xx1 xxxx */
618 /* MVN (reg-shift reg) cccc 0001 111x xxxx xxxx xxxx 0xx1 xxxx */
619 DECODE_EMULATEX (0x0fa00090, 0x01a00010, emulate_rd12rn16rm0rs8_rwflags,
620 REGS(0, ANY, NOPC, 0, ANY)),
621
622 /* AND (reg-shift reg) cccc 0000 000x xxxx xxxx xxxx 0xx1 xxxx */
623 /* EOR (reg-shift reg) cccc 0000 001x xxxx xxxx xxxx 0xx1 xxxx */
624 /* SUB (reg-shift reg) cccc 0000 010x xxxx xxxx xxxx 0xx1 xxxx */
625 /* RSB (reg-shift reg) cccc 0000 011x xxxx xxxx xxxx 0xx1 xxxx */
626 /* ADD (reg-shift reg) cccc 0000 100x xxxx xxxx xxxx 0xx1 xxxx */
627 /* ADC (reg-shift reg) cccc 0000 101x xxxx xxxx xxxx 0xx1 xxxx */
628 /* SBC (reg-shift reg) cccc 0000 110x xxxx xxxx xxxx 0xx1 xxxx */
629 /* RSC (reg-shift reg) cccc 0000 111x xxxx xxxx xxxx 0xx1 xxxx */
630 /* ORR (reg-shift reg) cccc 0001 100x xxxx xxxx xxxx 0xx1 xxxx */
631 /* BIC (reg-shift reg) cccc 0001 110x xxxx xxxx xxxx 0xx1 xxxx */
632 DECODE_EMULATEX (0x0e000090, 0x00000010, emulate_rd12rn16rm0rs8_rwflags,
633 REGS(ANY, ANY, NOPC, 0, ANY)),
634
635 DECODE_END
636};
637
638static const union decode_item arm_cccc_001x_table[] = {
639 /* Data-processing (immediate) */
640
641 /* MOVW cccc 0011 0000 xxxx xxxx xxxx xxxx xxxx */
642 /* MOVT cccc 0011 0100 xxxx xxxx xxxx xxxx xxxx */
643 DECODE_EMULATEX (0x0fb00000, 0x03000000, emulate_rd12rm0_noflags_nopc,
644 REGS(0, NOPC, 0, 0, 0)),
645
646 /* YIELD cccc 0011 0010 0000 xxxx xxxx 0000 0001 */
647 DECODE_OR (0x0fff00ff, 0x03200001),
648 /* SEV cccc 0011 0010 0000 xxxx xxxx 0000 0100 */
649 DECODE_EMULATE (0x0fff00ff, 0x03200004, kprobe_emulate_none),
650 /* NOP cccc 0011 0010 0000 xxxx xxxx 0000 0000 */
651 /* WFE cccc 0011 0010 0000 xxxx xxxx 0000 0010 */
652 /* WFI cccc 0011 0010 0000 xxxx xxxx 0000 0011 */
653 DECODE_SIMULATE (0x0fff00fc, 0x03200000, kprobe_simulate_nop),
654 /* DBG cccc 0011 0010 0000 xxxx xxxx ffff xxxx */
655 /* unallocated hints cccc 0011 0010 0000 xxxx xxxx xxxx xxxx */
656 /* MSR (immediate) cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx */
657 DECODE_REJECT (0x0fb00000, 0x03200000),
658
659 /* <op>S PC, ... cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx */
660 DECODE_REJECT (0x0e10f000, 0x0210f000),
661
662 /* TST (immediate) cccc 0011 0001 xxxx xxxx xxxx xxxx xxxx */
663 /* TEQ (immediate) cccc 0011 0011 xxxx xxxx xxxx xxxx xxxx */
664 /* CMP (immediate) cccc 0011 0101 xxxx xxxx xxxx xxxx xxxx */
665 /* CMN (immediate) cccc 0011 0111 xxxx xxxx xxxx xxxx xxxx */
666 DECODE_EMULATEX (0x0f900000, 0x03100000, emulate_rd12rn16rm0rs8_rwflags,
667 REGS(ANY, 0, 0, 0, 0)),
668
669 /* MOV (immediate) cccc 0011 101x xxxx xxxx xxxx xxxx xxxx */
670 /* MVN (immediate) cccc 0011 111x xxxx xxxx xxxx xxxx xxxx */
671 DECODE_EMULATEX (0x0fa00000, 0x03a00000, emulate_rd12rn16rm0rs8_rwflags,
672 REGS(0, ANY, 0, 0, 0)),
673
674 /* AND (immediate) cccc 0010 000x xxxx xxxx xxxx xxxx xxxx */
675 /* EOR (immediate) cccc 0010 001x xxxx xxxx xxxx xxxx xxxx */
676 /* SUB (immediate) cccc 0010 010x xxxx xxxx xxxx xxxx xxxx */
677 /* RSB (immediate) cccc 0010 011x xxxx xxxx xxxx xxxx xxxx */
678 /* ADD (immediate) cccc 0010 100x xxxx xxxx xxxx xxxx xxxx */
679 /* ADC (immediate) cccc 0010 101x xxxx xxxx xxxx xxxx xxxx */
680 /* SBC (immediate) cccc 0010 110x xxxx xxxx xxxx xxxx xxxx */
681 /* RSC (immediate) cccc 0010 111x xxxx xxxx xxxx xxxx xxxx */
682 /* ORR (immediate) cccc 0011 100x xxxx xxxx xxxx xxxx xxxx */
683 /* BIC (immediate) cccc 0011 110x xxxx xxxx xxxx xxxx xxxx */
684 DECODE_EMULATEX (0x0e000000, 0x02000000, emulate_rd12rn16rm0rs8_rwflags,
685 REGS(ANY, ANY, 0, 0, 0)),
686
687 DECODE_END
688};
689
690static const union decode_item arm_cccc_0110_____xxx1_table[] = {
691 /* Media instructions */
692
693 /* SEL cccc 0110 1000 xxxx xxxx xxxx 1011 xxxx */
694 DECODE_EMULATEX (0x0ff000f0, 0x068000b0, emulate_rd12rn16rm0_rwflags_nopc,
695 REGS(NOPC, NOPC, 0, 0, NOPC)),
696
697 /* SSAT cccc 0110 101x xxxx xxxx xxxx xx01 xxxx */
698 /* USAT cccc 0110 111x xxxx xxxx xxxx xx01 xxxx */
699 DECODE_OR(0x0fa00030, 0x06a00010),
700 /* SSAT16 cccc 0110 1010 xxxx xxxx xxxx 0011 xxxx */
701 /* USAT16 cccc 0110 1110 xxxx xxxx xxxx 0011 xxxx */
702 DECODE_EMULATEX (0x0fb000f0, 0x06a00030, emulate_rd12rn16rm0_rwflags_nopc,
703 REGS(0, NOPC, 0, 0, NOPC)),
704
705 /* REV cccc 0110 1011 xxxx xxxx xxxx 0011 xxxx */
706 /* REV16 cccc 0110 1011 xxxx xxxx xxxx 1011 xxxx */
707 /* RBIT cccc 0110 1111 xxxx xxxx xxxx 0011 xxxx */
708 /* REVSH cccc 0110 1111 xxxx xxxx xxxx 1011 xxxx */
709 DECODE_EMULATEX (0x0fb00070, 0x06b00030, emulate_rd12rm0_noflags_nopc,
710 REGS(0, NOPC, 0, 0, NOPC)),
711
712 /* ??? cccc 0110 0x00 xxxx xxxx xxxx xxx1 xxxx */
713 DECODE_REJECT (0x0fb00010, 0x06000010),
714 /* ??? cccc 0110 0xxx xxxx xxxx xxxx 1011 xxxx */
715 DECODE_REJECT (0x0f8000f0, 0x060000b0),
716 /* ??? cccc 0110 0xxx xxxx xxxx xxxx 1101 xxxx */
717 DECODE_REJECT (0x0f8000f0, 0x060000d0),
718 /* SADD16 cccc 0110 0001 xxxx xxxx xxxx 0001 xxxx */
719 /* SADDSUBX cccc 0110 0001 xxxx xxxx xxxx 0011 xxxx */
720 /* SSUBADDX cccc 0110 0001 xxxx xxxx xxxx 0101 xxxx */
721 /* SSUB16 cccc 0110 0001 xxxx xxxx xxxx 0111 xxxx */
722 /* SADD8 cccc 0110 0001 xxxx xxxx xxxx 1001 xxxx */
723 /* SSUB8 cccc 0110 0001 xxxx xxxx xxxx 1111 xxxx */
724 /* QADD16 cccc 0110 0010 xxxx xxxx xxxx 0001 xxxx */
725 /* QADDSUBX cccc 0110 0010 xxxx xxxx xxxx 0011 xxxx */
726 /* QSUBADDX cccc 0110 0010 xxxx xxxx xxxx 0101 xxxx */
727 /* QSUB16 cccc 0110 0010 xxxx xxxx xxxx 0111 xxxx */
728 /* QADD8 cccc 0110 0010 xxxx xxxx xxxx 1001 xxxx */
729 /* QSUB8 cccc 0110 0010 xxxx xxxx xxxx 1111 xxxx */
730 /* SHADD16 cccc 0110 0011 xxxx xxxx xxxx 0001 xxxx */
731 /* SHADDSUBX cccc 0110 0011 xxxx xxxx xxxx 0011 xxxx */
732 /* SHSUBADDX cccc 0110 0011 xxxx xxxx xxxx 0101 xxxx */
733 /* SHSUB16 cccc 0110 0011 xxxx xxxx xxxx 0111 xxxx */
734 /* SHADD8 cccc 0110 0011 xxxx xxxx xxxx 1001 xxxx */
735 /* SHSUB8 cccc 0110 0011 xxxx xxxx xxxx 1111 xxxx */
736 /* UADD16 cccc 0110 0101 xxxx xxxx xxxx 0001 xxxx */
737 /* UADDSUBX cccc 0110 0101 xxxx xxxx xxxx 0011 xxxx */
738 /* USUBADDX cccc 0110 0101 xxxx xxxx xxxx 0101 xxxx */
739 /* USUB16 cccc 0110 0101 xxxx xxxx xxxx 0111 xxxx */
740 /* UADD8 cccc 0110 0101 xxxx xxxx xxxx 1001 xxxx */
741 /* USUB8 cccc 0110 0101 xxxx xxxx xxxx 1111 xxxx */
742 /* UQADD16 cccc 0110 0110 xxxx xxxx xxxx 0001 xxxx */
743 /* UQADDSUBX cccc 0110 0110 xxxx xxxx xxxx 0011 xxxx */
744 /* UQSUBADDX cccc 0110 0110 xxxx xxxx xxxx 0101 xxxx */
745 /* UQSUB16 cccc 0110 0110 xxxx xxxx xxxx 0111 xxxx */
746 /* UQADD8 cccc 0110 0110 xxxx xxxx xxxx 1001 xxxx */
747 /* UQSUB8 cccc 0110 0110 xxxx xxxx xxxx 1111 xxxx */
748 /* UHADD16 cccc 0110 0111 xxxx xxxx xxxx 0001 xxxx */
749 /* UHADDSUBX cccc 0110 0111 xxxx xxxx xxxx 0011 xxxx */
750 /* UHSUBADDX cccc 0110 0111 xxxx xxxx xxxx 0101 xxxx */
751 /* UHSUB16 cccc 0110 0111 xxxx xxxx xxxx 0111 xxxx */
752 /* UHADD8 cccc 0110 0111 xxxx xxxx xxxx 1001 xxxx */
753 /* UHSUB8 cccc 0110 0111 xxxx xxxx xxxx 1111 xxxx */
754 DECODE_EMULATEX (0x0f800010, 0x06000010, emulate_rd12rn16rm0_rwflags_nopc,
755 REGS(NOPC, NOPC, 0, 0, NOPC)),
756
757 /* PKHBT cccc 0110 1000 xxxx xxxx xxxx x001 xxxx */
758 /* PKHTB cccc 0110 1000 xxxx xxxx xxxx x101 xxxx */
759 DECODE_EMULATEX (0x0ff00030, 0x06800010, emulate_rd12rn16rm0_rwflags_nopc,
760 REGS(NOPC, NOPC, 0, 0, NOPC)),
761
762 /* ??? cccc 0110 1001 xxxx xxxx xxxx 0111 xxxx */
763 /* ??? cccc 0110 1101 xxxx xxxx xxxx 0111 xxxx */
764 DECODE_REJECT (0x0fb000f0, 0x06900070),
765
766 /* SXTB16 cccc 0110 1000 1111 xxxx xxxx 0111 xxxx */
767 /* SXTB cccc 0110 1010 1111 xxxx xxxx 0111 xxxx */
768 /* SXTH cccc 0110 1011 1111 xxxx xxxx 0111 xxxx */
769 /* UXTB16 cccc 0110 1100 1111 xxxx xxxx 0111 xxxx */
770 /* UXTB cccc 0110 1110 1111 xxxx xxxx 0111 xxxx */
771 /* UXTH cccc 0110 1111 1111 xxxx xxxx 0111 xxxx */
772 DECODE_EMULATEX (0x0f8f00f0, 0x068f0070, emulate_rd12rm0_noflags_nopc,
773 REGS(0, NOPC, 0, 0, NOPC)),
774
775 /* SXTAB16 cccc 0110 1000 xxxx xxxx xxxx 0111 xxxx */
776 /* SXTAB cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx */
777 /* SXTAH cccc 0110 1011 xxxx xxxx xxxx 0111 xxxx */
778 /* UXTAB16 cccc 0110 1100 xxxx xxxx xxxx 0111 xxxx */
779 /* UXTAB cccc 0110 1110 xxxx xxxx xxxx 0111 xxxx */
780 /* UXTAH cccc 0110 1111 xxxx xxxx xxxx 0111 xxxx */
781 DECODE_EMULATEX (0x0f8000f0, 0x06800070, emulate_rd12rn16rm0_rwflags_nopc,
782 REGS(NOPCX, NOPC, 0, 0, NOPC)),
783
784 DECODE_END
785};
786
787static const union decode_item arm_cccc_0111_____xxx1_table[] = {
788 /* Media instructions */
789
790 /* UNDEFINED cccc 0111 1111 xxxx xxxx xxxx 1111 xxxx */
791 DECODE_REJECT (0x0ff000f0, 0x07f000f0),
792
793 /* SMLALD cccc 0111 0100 xxxx xxxx xxxx 00x1 xxxx */
794 /* SMLSLD cccc 0111 0100 xxxx xxxx xxxx 01x1 xxxx */
795 DECODE_EMULATEX (0x0ff00090, 0x07400010, emulate_rdlo12rdhi16rn0rm8_rwflags_nopc,
796 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
797
798 /* SMUAD cccc 0111 0000 xxxx 1111 xxxx 00x1 xxxx */
799 /* SMUSD cccc 0111 0000 xxxx 1111 xxxx 01x1 xxxx */
800 DECODE_OR (0x0ff0f090, 0x0700f010),
801 /* SMMUL cccc 0111 0101 xxxx 1111 xxxx 00x1 xxxx */
802 DECODE_OR (0x0ff0f0d0, 0x0750f010),
803 /* USAD8 cccc 0111 1000 xxxx 1111 xxxx 0001 xxxx */
804 DECODE_EMULATEX (0x0ff0f0f0, 0x0780f010, emulate_rd16rn12rm0rs8_rwflags_nopc,
805 REGS(NOPC, 0, NOPC, 0, NOPC)),
806
807 /* SMLAD cccc 0111 0000 xxxx xxxx xxxx 00x1 xxxx */
808 /* SMLSD cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx */
809 DECODE_OR (0x0ff00090, 0x07000010),
810 /* SMMLA cccc 0111 0101 xxxx xxxx xxxx 00x1 xxxx */
811 DECODE_OR (0x0ff000d0, 0x07500010),
812 /* USADA8 cccc 0111 1000 xxxx xxxx xxxx 0001 xxxx */
813 DECODE_EMULATEX (0x0ff000f0, 0x07800010, emulate_rd16rn12rm0rs8_rwflags_nopc,
814 REGS(NOPC, NOPCX, NOPC, 0, NOPC)),
815
816 /* SMMLS cccc 0111 0101 xxxx xxxx xxxx 11x1 xxxx */
817 DECODE_EMULATEX (0x0ff000d0, 0x075000d0, emulate_rd16rn12rm0rs8_rwflags_nopc,
818 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
819
820 /* SBFX cccc 0111 101x xxxx xxxx xxxx x101 xxxx */
821 /* UBFX cccc 0111 111x xxxx xxxx xxxx x101 xxxx */
822 DECODE_EMULATEX (0x0fa00070, 0x07a00050, emulate_rd12rm0_noflags_nopc,
823 REGS(0, NOPC, 0, 0, NOPC)),
824
825 /* BFC cccc 0111 110x xxxx xxxx xxxx x001 1111 */
826 DECODE_EMULATEX (0x0fe0007f, 0x07c0001f, emulate_rd12rm0_noflags_nopc,
827 REGS(0, NOPC, 0, 0, 0)),
828
829 /* BFI cccc 0111 110x xxxx xxxx xxxx x001 xxxx */
830 DECODE_EMULATEX (0x0fe00070, 0x07c00010, emulate_rd12rm0_noflags_nopc,
831 REGS(0, NOPC, 0, 0, NOPCX)),
832
833 DECODE_END
834};
835
836static const union decode_item arm_cccc_01xx_table[] = {
837 /* Load/store word and unsigned byte */
838
839 /* LDRB/STRB pc,[...] cccc 01xx x0xx xxxx xxxx xxxx xxxx xxxx */
840 DECODE_REJECT (0x0c40f000, 0x0440f000),
841
842 /* STRT cccc 01x0 x010 xxxx xxxx xxxx xxxx xxxx */
843 /* LDRT cccc 01x0 x011 xxxx xxxx xxxx xxxx xxxx */
844 /* STRBT cccc 01x0 x110 xxxx xxxx xxxx xxxx xxxx */
845 /* LDRBT cccc 01x0 x111 xxxx xxxx xxxx xxxx xxxx */
846 DECODE_REJECT (0x0d200000, 0x04200000),
847
848 /* STR (immediate) cccc 010x x0x0 xxxx xxxx xxxx xxxx xxxx */
849 /* STRB (immediate) cccc 010x x1x0 xxxx xxxx xxxx xxxx xxxx */
850 DECODE_EMULATEX (0x0e100000, 0x04000000, emulate_str,
851 REGS(NOPCWB, ANY, 0, 0, 0)),
852
853 /* LDR (immediate) cccc 010x x0x1 xxxx xxxx xxxx xxxx xxxx */
854 /* LDRB (immediate) cccc 010x x1x1 xxxx xxxx xxxx xxxx xxxx */
855 DECODE_EMULATEX (0x0e100000, 0x04100000, emulate_ldr,
856 REGS(NOPCWB, ANY, 0, 0, 0)),
857
858 /* STR (register) cccc 011x x0x0 xxxx xxxx xxxx xxxx xxxx */
859 /* STRB (register) cccc 011x x1x0 xxxx xxxx xxxx xxxx xxxx */
860 DECODE_EMULATEX (0x0e100000, 0x06000000, emulate_str,
861 REGS(NOPCWB, ANY, 0, 0, NOPC)),
862
863 /* LDR (register) cccc 011x x0x1 xxxx xxxx xxxx xxxx xxxx */
864 /* LDRB (register) cccc 011x x1x1 xxxx xxxx xxxx xxxx xxxx */
865 DECODE_EMULATEX (0x0e100000, 0x06100000, emulate_ldr,
866 REGS(NOPCWB, ANY, 0, 0, NOPC)),
867
868 DECODE_END
869};
870
871static const union decode_item arm_cccc_100x_table[] = {
872 /* Block data transfer instructions */
873
874 /* LDM cccc 100x x0x1 xxxx xxxx xxxx xxxx xxxx */
875 /* STM cccc 100x x0x0 xxxx xxxx xxxx xxxx xxxx */
876 DECODE_CUSTOM (0x0e400000, 0x08000000, kprobe_decode_ldmstm),
877
878 /* STM (user registers) cccc 100x x1x0 xxxx xxxx xxxx xxxx xxxx */
879 /* LDM (user registers) cccc 100x x1x1 xxxx 0xxx xxxx xxxx xxxx */
880 /* LDM (exception ret) cccc 100x x1x1 xxxx 1xxx xxxx xxxx xxxx */
881 DECODE_END
882};
883
884const union decode_item kprobe_decode_arm_table[] = {
885 /*
886 * Unconditional instructions
887 * 1111 xxxx xxxx xxxx xxxx xxxx xxxx xxxx
888 */
889 DECODE_TABLE (0xf0000000, 0xf0000000, arm_1111_table),
890
891 /*
892 * Miscellaneous instructions
893 * cccc 0001 0xx0 xxxx xxxx xxxx 0xxx xxxx
894 */
895 DECODE_TABLE (0x0f900080, 0x01000000, arm_cccc_0001_0xx0____0xxx_table),
896
897 /*
898 * Halfword multiply and multiply-accumulate
899 * cccc 0001 0xx0 xxxx xxxx xxxx 1xx0 xxxx
900 */
901 DECODE_TABLE (0x0f900090, 0x01000080, arm_cccc_0001_0xx0____1xx0_table),
902
903 /*
904 * Multiply and multiply-accumulate
905 * cccc 0000 xxxx xxxx xxxx xxxx 1001 xxxx
906 */
907 DECODE_TABLE (0x0f0000f0, 0x00000090, arm_cccc_0000_____1001_table),
908
909 /*
910 * Synchronization primitives
911 * cccc 0001 xxxx xxxx xxxx xxxx 1001 xxxx
912 */
913 DECODE_TABLE (0x0f0000f0, 0x01000090, arm_cccc_0001_____1001_table),
914
915 /*
916 * Extra load/store instructions
917 * cccc 000x xxxx xxxx xxxx xxxx 1xx1 xxxx
918 */
919 DECODE_TABLE (0x0e000090, 0x00000090, arm_cccc_000x_____1xx1_table),
920
921 /*
922 * Data-processing (register)
923 * cccc 000x xxxx xxxx xxxx xxxx xxx0 xxxx
924 * Data-processing (register-shifted register)
925 * cccc 000x xxxx xxxx xxxx xxxx 0xx1 xxxx
926 */
927 DECODE_TABLE (0x0e000000, 0x00000000, arm_cccc_000x_table),
928
929 /*
930 * Data-processing (immediate)
931 * cccc 001x xxxx xxxx xxxx xxxx xxxx xxxx
932 */
933 DECODE_TABLE (0x0e000000, 0x02000000, arm_cccc_001x_table),
934
935 /*
936 * Media instructions
937 * cccc 011x xxxx xxxx xxxx xxxx xxx1 xxxx
938 */
939 DECODE_TABLE (0x0f000010, 0x06000010, arm_cccc_0110_____xxx1_table),
940 DECODE_TABLE (0x0f000010, 0x07000010, arm_cccc_0111_____xxx1_table),
941
942 /*
943 * Load/store word and unsigned byte
944 * cccc 01xx xxxx xxxx xxxx xxxx xxxx xxxx
945 */
946 DECODE_TABLE (0x0c000000, 0x04000000, arm_cccc_01xx_table),
947
948 /*
949 * Block data transfer instructions
950 * cccc 100x xxxx xxxx xxxx xxxx xxxx xxxx
951 */
952 DECODE_TABLE (0x0e000000, 0x08000000, arm_cccc_100x_table),
953
954 /* B cccc 1010 xxxx xxxx xxxx xxxx xxxx xxxx */
955 /* BL cccc 1011 xxxx xxxx xxxx xxxx xxxx xxxx */
956 DECODE_SIMULATE (0x0e000000, 0x0a000000, simulate_bbl),
957
958 /*
959 * Supervisor Call, and coprocessor instructions
960 */
961
962 /* MCRR cccc 1100 0100 xxxx xxxx xxxx xxxx xxxx */
963 /* MRRC cccc 1100 0101 xxxx xxxx xxxx xxxx xxxx */
964 /* LDC cccc 110x xxx1 xxxx xxxx xxxx xxxx xxxx */
965 /* STC cccc 110x xxx0 xxxx xxxx xxxx xxxx xxxx */
966 /* CDP cccc 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */
967 /* MCR cccc 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */
968 /* MRC cccc 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */
969 /* SVC cccc 1111 xxxx xxxx xxxx xxxx xxxx xxxx */
970 DECODE_REJECT (0x0c000000, 0x0c000000),
971
972 DECODE_END
973};
974
975static void __kprobes arm_singlestep(struct kprobe *p, struct pt_regs *regs)
976{
977 regs->ARM_pc += 4;
978 p->ainsn.insn_handler(p, regs);
979}
980
981/* Return:
982 * INSN_REJECTED If instruction is one not allowed to kprobe,
983 * INSN_GOOD If instruction is supported and uses instruction slot,
984 * INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
985 *
986 * For instructions we don't want to kprobe (INSN_REJECTED return result):
987 * These are generally ones that modify the processor state making
988 * them "hard" to simulate such as switches processor modes or
989 * make accesses in alternate modes. Any of these could be simulated
990 * if the work was put into it, but low return considering they
991 * should also be very rare.
992 */
993enum kprobe_insn __kprobes
994arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
995{
996 asi->insn_singlestep = arm_singlestep;
997 asi->insn_check_cc = kprobe_condition_checks[insn>>28];
998 return kprobe_decode_insn(insn, asi, kprobe_decode_arm_table, false);
999}
diff --git a/arch/arm/kernel/kprobes-common.c b/arch/arm/kernel/kprobes-common.c
new file mode 100644
index 000000000000..a5394fb4e4e0
--- /dev/null
+++ b/arch/arm/kernel/kprobes-common.c
@@ -0,0 +1,577 @@
1/*
2 * arch/arm/kernel/kprobes-common.c
3 *
4 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
5 *
6 * Some contents moved here from arch/arm/include/asm/kprobes-arm.c which is
7 * Copyright (C) 2006, 2007 Motorola Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/kprobes.h>
16
17#include "kprobes.h"
18
19
20#ifndef find_str_pc_offset
21
22/*
23 * For STR and STM instructions, an ARM core may choose to use either
24 * a +8 or a +12 displacement from the current instruction's address.
25 * Whichever value is chosen for a given core, it must be the same for
26 * both instructions and may not change. This function measures it.
27 */
28
29int str_pc_offset;
30
31void __init find_str_pc_offset(void)
32{
33 int addr, scratch, ret;
34
35 __asm__ (
36 "sub %[ret], pc, #4 \n\t"
37 "str pc, %[addr] \n\t"
38 "ldr %[scr], %[addr] \n\t"
39 "sub %[ret], %[scr], %[ret] \n\t"
40 : [ret] "=r" (ret), [scr] "=r" (scratch), [addr] "+m" (addr));
41
42 str_pc_offset = ret;
43}
44
45#endif /* !find_str_pc_offset */
46
47
48#ifndef test_load_write_pc_interworking
49
50bool load_write_pc_interworks;
51
52void __init test_load_write_pc_interworking(void)
53{
54 int arch = cpu_architecture();
55 BUG_ON(arch == CPU_ARCH_UNKNOWN);
56 load_write_pc_interworks = arch >= CPU_ARCH_ARMv5T;
57}
58
59#endif /* !test_load_write_pc_interworking */
60
61
62#ifndef test_alu_write_pc_interworking
63
64bool alu_write_pc_interworks;
65
66void __init test_alu_write_pc_interworking(void)
67{
68 int arch = cpu_architecture();
69 BUG_ON(arch == CPU_ARCH_UNKNOWN);
70 alu_write_pc_interworks = arch >= CPU_ARCH_ARMv7;
71}
72
73#endif /* !test_alu_write_pc_interworking */
74
75
76void __init arm_kprobe_decode_init(void)
77{
78 find_str_pc_offset();
79 test_load_write_pc_interworking();
80 test_alu_write_pc_interworking();
81}
82
83
84static unsigned long __kprobes __check_eq(unsigned long cpsr)
85{
86 return cpsr & PSR_Z_BIT;
87}
88
89static unsigned long __kprobes __check_ne(unsigned long cpsr)
90{
91 return (~cpsr) & PSR_Z_BIT;
92}
93
94static unsigned long __kprobes __check_cs(unsigned long cpsr)
95{
96 return cpsr & PSR_C_BIT;
97}
98
99static unsigned long __kprobes __check_cc(unsigned long cpsr)
100{
101 return (~cpsr) & PSR_C_BIT;
102}
103
104static unsigned long __kprobes __check_mi(unsigned long cpsr)
105{
106 return cpsr & PSR_N_BIT;
107}
108
109static unsigned long __kprobes __check_pl(unsigned long cpsr)
110{
111 return (~cpsr) & PSR_N_BIT;
112}
113
114static unsigned long __kprobes __check_vs(unsigned long cpsr)
115{
116 return cpsr & PSR_V_BIT;
117}
118
119static unsigned long __kprobes __check_vc(unsigned long cpsr)
120{
121 return (~cpsr) & PSR_V_BIT;
122}
123
124static unsigned long __kprobes __check_hi(unsigned long cpsr)
125{
126 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
127 return cpsr & PSR_C_BIT;
128}
129
130static unsigned long __kprobes __check_ls(unsigned long cpsr)
131{
132 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
133 return (~cpsr) & PSR_C_BIT;
134}
135
136static unsigned long __kprobes __check_ge(unsigned long cpsr)
137{
138 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
139 return (~cpsr) & PSR_N_BIT;
140}
141
142static unsigned long __kprobes __check_lt(unsigned long cpsr)
143{
144 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
145 return cpsr & PSR_N_BIT;
146}
147
148static unsigned long __kprobes __check_gt(unsigned long cpsr)
149{
150 unsigned long temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
151 temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */
152 return (~temp) & PSR_N_BIT;
153}
154
155static unsigned long __kprobes __check_le(unsigned long cpsr)
156{
157 unsigned long temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
158 temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */
159 return temp & PSR_N_BIT;
160}
161
162static unsigned long __kprobes __check_al(unsigned long cpsr)
163{
164 return true;
165}
166
167kprobe_check_cc * const kprobe_condition_checks[16] = {
168 &__check_eq, &__check_ne, &__check_cs, &__check_cc,
169 &__check_mi, &__check_pl, &__check_vs, &__check_vc,
170 &__check_hi, &__check_ls, &__check_ge, &__check_lt,
171 &__check_gt, &__check_le, &__check_al, &__check_al
172};
173
174
175void __kprobes kprobe_simulate_nop(struct kprobe *p, struct pt_regs *regs)
176{
177}
178
179void __kprobes kprobe_emulate_none(struct kprobe *p, struct pt_regs *regs)
180{
181 p->ainsn.insn_fn();
182}
183
184static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs)
185{
186 kprobe_opcode_t insn = p->opcode;
187 int rn = (insn >> 16) & 0xf;
188 int lbit = insn & (1 << 20);
189 int wbit = insn & (1 << 21);
190 int ubit = insn & (1 << 23);
191 int pbit = insn & (1 << 24);
192 long *addr = (long *)regs->uregs[rn];
193 int reg_bit_vector;
194 int reg_count;
195
196 reg_count = 0;
197 reg_bit_vector = insn & 0xffff;
198 while (reg_bit_vector) {
199 reg_bit_vector &= (reg_bit_vector - 1);
200 ++reg_count;
201 }
202
203 if (!ubit)
204 addr -= reg_count;
205 addr += (!pbit == !ubit);
206
207 reg_bit_vector = insn & 0xffff;
208 while (reg_bit_vector) {
209 int reg = __ffs(reg_bit_vector);
210 reg_bit_vector &= (reg_bit_vector - 1);
211 if (lbit)
212 regs->uregs[reg] = *addr++;
213 else
214 *addr++ = regs->uregs[reg];
215 }
216
217 if (wbit) {
218 if (!ubit)
219 addr -= reg_count;
220 addr -= (!pbit == !ubit);
221 regs->uregs[rn] = (long)addr;
222 }
223}
224
225static void __kprobes simulate_stm1_pc(struct kprobe *p, struct pt_regs *regs)
226{
227 regs->ARM_pc = (long)p->addr + str_pc_offset;
228 simulate_ldm1stm1(p, regs);
229 regs->ARM_pc = (long)p->addr + 4;
230}
231
232static void __kprobes simulate_ldm1_pc(struct kprobe *p, struct pt_regs *regs)
233{
234 simulate_ldm1stm1(p, regs);
235 load_write_pc(regs->ARM_pc, regs);
236}
237
238static void __kprobes
239emulate_generic_r0_12_noflags(struct kprobe *p, struct pt_regs *regs)
240{
241 register void *rregs asm("r1") = regs;
242 register void *rfn asm("lr") = p->ainsn.insn_fn;
243
244 __asm__ __volatile__ (
245 "stmdb sp!, {%[regs], r11} \n\t"
246 "ldmia %[regs], {r0-r12} \n\t"
247#if __LINUX_ARM_ARCH__ >= 6
248 "blx %[fn] \n\t"
249#else
250 "str %[fn], [sp, #-4]! \n\t"
251 "adr lr, 1f \n\t"
252 "ldr pc, [sp], #4 \n\t"
253 "1: \n\t"
254#endif
255 "ldr lr, [sp], #4 \n\t" /* lr = regs */
256 "stmia lr, {r0-r12} \n\t"
257 "ldr r11, [sp], #4 \n\t"
258 : [regs] "=r" (rregs), [fn] "=r" (rfn)
259 : "0" (rregs), "1" (rfn)
260 : "r0", "r2", "r3", "r4", "r5", "r6", "r7",
261 "r8", "r9", "r10", "r12", "memory", "cc"
262 );
263}
264
265static void __kprobes
266emulate_generic_r2_14_noflags(struct kprobe *p, struct pt_regs *regs)
267{
268 emulate_generic_r0_12_noflags(p, (struct pt_regs *)(regs->uregs+2));
269}
270
271static void __kprobes
272emulate_ldm_r3_15(struct kprobe *p, struct pt_regs *regs)
273{
274 emulate_generic_r0_12_noflags(p, (struct pt_regs *)(regs->uregs+3));
275 load_write_pc(regs->ARM_pc, regs);
276}
277
278enum kprobe_insn __kprobes
279kprobe_decode_ldmstm(kprobe_opcode_t insn, struct arch_specific_insn *asi)
280{
281 kprobe_insn_handler_t *handler = 0;
282 unsigned reglist = insn & 0xffff;
283 int is_ldm = insn & 0x100000;
284 int rn = (insn >> 16) & 0xf;
285
286 if (rn <= 12 && (reglist & 0xe000) == 0) {
287 /* Instruction only uses registers in the range R0..R12 */
288 handler = emulate_generic_r0_12_noflags;
289
290 } else if (rn >= 2 && (reglist & 0x8003) == 0) {
291 /* Instruction only uses registers in the range R2..R14 */
292 rn -= 2;
293 reglist >>= 2;
294 handler = emulate_generic_r2_14_noflags;
295
296 } else if (rn >= 3 && (reglist & 0x0007) == 0) {
297 /* Instruction only uses registers in the range R3..R15 */
298 if (is_ldm && (reglist & 0x8000)) {
299 rn -= 3;
300 reglist >>= 3;
301 handler = emulate_ldm_r3_15;
302 }
303 }
304
305 if (handler) {
306 /* We can emulate the instruction in (possibly) modified form */
307 asi->insn[0] = (insn & 0xfff00000) | (rn << 16) | reglist;
308 asi->insn_handler = handler;
309 return INSN_GOOD;
310 }
311
312 /* Fallback to slower simulation... */
313 if (reglist & 0x8000)
314 handler = is_ldm ? simulate_ldm1_pc : simulate_stm1_pc;
315 else
316 handler = simulate_ldm1stm1;
317 asi->insn_handler = handler;
318 return INSN_GOOD_NO_SLOT;
319}
320
321
322/*
323 * Prepare an instruction slot to receive an instruction for emulating.
324 * This is done by placing a subroutine return after the location where the
325 * instruction will be placed. We also modify ARM instructions to be
326 * unconditional as the condition code will already be checked before any
327 * emulation handler is called.
328 */
329static kprobe_opcode_t __kprobes
330prepare_emulated_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi,
331 bool thumb)
332{
333#ifdef CONFIG_THUMB2_KERNEL
334 if (thumb) {
335 u16 *thumb_insn = (u16 *)asi->insn;
336 thumb_insn[1] = 0x4770; /* Thumb bx lr */
337 thumb_insn[2] = 0x4770; /* Thumb bx lr */
338 return insn;
339 }
340 asi->insn[1] = 0xe12fff1e; /* ARM bx lr */
341#else
342 asi->insn[1] = 0xe1a0f00e; /* mov pc, lr */
343#endif
344 /* Make an ARM instruction unconditional */
345 if (insn < 0xe0000000)
346 insn = (insn | 0xe0000000) & ~0x10000000;
347 return insn;
348}
349
350/*
351 * Write a (probably modified) instruction into the slot previously prepared by
352 * prepare_emulated_insn
353 */
354static void __kprobes
355set_emulated_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi,
356 bool thumb)
357{
358#ifdef CONFIG_THUMB2_KERNEL
359 if (thumb) {
360 u16 *ip = (u16 *)asi->insn;
361 if (is_wide_instruction(insn))
362 *ip++ = insn >> 16;
363 *ip++ = insn;
364 return;
365 }
366#endif
367 asi->insn[0] = insn;
368}
369
370/*
371 * When we modify the register numbers encoded in an instruction to be emulated,
372 * the new values come from this define. For ARM and 32-bit Thumb instructions
373 * this gives...
374 *
375 * bit position 16 12 8 4 0
376 * ---------------+---+---+---+---+---+
377 * register r2 r0 r1 -- r3
378 */
379#define INSN_NEW_BITS 0x00020103
380
381/* Each nibble has same value as that at INSN_NEW_BITS bit 16 */
382#define INSN_SAMEAS16_BITS 0x22222222
383
384/*
385 * Validate and modify each of the registers encoded in an instruction.
386 *
387 * Each nibble in regs contains a value from enum decode_reg_type. For each
388 * non-zero value, the corresponding nibble in pinsn is validated and modified
389 * according to the type.
390 */
391static bool __kprobes decode_regs(kprobe_opcode_t* pinsn, u32 regs)
392{
393 kprobe_opcode_t insn = *pinsn;
394 kprobe_opcode_t mask = 0xf; /* Start at least significant nibble */
395
396 for (; regs != 0; regs >>= 4, mask <<= 4) {
397
398 kprobe_opcode_t new_bits = INSN_NEW_BITS;
399
400 switch (regs & 0xf) {
401
402 case REG_TYPE_NONE:
403 /* Nibble not a register, skip to next */
404 continue;
405
406 case REG_TYPE_ANY:
407 /* Any register is allowed */
408 break;
409
410 case REG_TYPE_SAMEAS16:
411 /* Replace register with same as at bit position 16 */
412 new_bits = INSN_SAMEAS16_BITS;
413 break;
414
415 case REG_TYPE_SP:
416 /* Only allow SP (R13) */
417 if ((insn ^ 0xdddddddd) & mask)
418 goto reject;
419 break;
420
421 case REG_TYPE_PC:
422 /* Only allow PC (R15) */
423 if ((insn ^ 0xffffffff) & mask)
424 goto reject;
425 break;
426
427 case REG_TYPE_NOSP:
428 /* Reject SP (R13) */
429 if (((insn ^ 0xdddddddd) & mask) == 0)
430 goto reject;
431 break;
432
433 case REG_TYPE_NOSPPC:
434 case REG_TYPE_NOSPPCX:
435 /* Reject SP and PC (R13 and R15) */
436 if (((insn ^ 0xdddddddd) & 0xdddddddd & mask) == 0)
437 goto reject;
438 break;
439
440 case REG_TYPE_NOPCWB:
441 if (!is_writeback(insn))
442 break; /* No writeback, so any register is OK */
443 /* fall through... */
444 case REG_TYPE_NOPC:
445 case REG_TYPE_NOPCX:
446 /* Reject PC (R15) */
447 if (((insn ^ 0xffffffff) & mask) == 0)
448 goto reject;
449 break;
450 }
451
452 /* Replace value of nibble with new register number... */
453 insn &= ~mask;
454 insn |= new_bits & mask;
455 }
456
457 *pinsn = insn;
458 return true;
459
460reject:
461 return false;
462}
463
464static const int decode_struct_sizes[NUM_DECODE_TYPES] = {
465 [DECODE_TYPE_TABLE] = sizeof(struct decode_table),
466 [DECODE_TYPE_CUSTOM] = sizeof(struct decode_custom),
467 [DECODE_TYPE_SIMULATE] = sizeof(struct decode_simulate),
468 [DECODE_TYPE_EMULATE] = sizeof(struct decode_emulate),
469 [DECODE_TYPE_OR] = sizeof(struct decode_or),
470 [DECODE_TYPE_REJECT] = sizeof(struct decode_reject)
471};
472
473/*
474 * kprobe_decode_insn operates on data tables in order to decode an ARM
475 * architecture instruction onto which a kprobe has been placed.
476 *
477 * These instruction decoding tables are a concatenation of entries each
478 * of which consist of one of the following structs:
479 *
480 * decode_table
481 * decode_custom
482 * decode_simulate
483 * decode_emulate
484 * decode_or
485 * decode_reject
486 *
487 * Each of these starts with a struct decode_header which has the following
488 * fields:
489 *
490 * type_regs
491 * mask
492 * value
493 *
494 * The least significant DECODE_TYPE_BITS of type_regs contains a value
495 * from enum decode_type, this indicates which of the decode_* structs
496 * the entry contains. The value DECODE_TYPE_END indicates the end of the
497 * table.
498 *
499 * When the table is parsed, each entry is checked in turn to see if it
500 * matches the instruction to be decoded using the test:
501 *
502 * (insn & mask) == value
503 *
504 * If no match is found before the end of the table is reached then decoding
505 * fails with INSN_REJECTED.
506 *
507 * When a match is found, decode_regs() is called to validate and modify each
508 * of the registers encoded in the instruction; the data it uses to do this
509 * is (type_regs >> DECODE_TYPE_BITS). A validation failure will cause decoding
510 * to fail with INSN_REJECTED.
511 *
512 * Once the instruction has passed the above tests, further processing
513 * depends on the type of the table entry's decode struct.
514 *
515 */
516int __kprobes
517kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi,
518 const union decode_item *table, bool thumb)
519{
520 const struct decode_header *h = (struct decode_header *)table;
521 const struct decode_header *next;
522 bool matched = false;
523
524 insn = prepare_emulated_insn(insn, asi, thumb);
525
526 for (;; h = next) {
527 enum decode_type type = h->type_regs.bits & DECODE_TYPE_MASK;
528 u32 regs = h->type_regs.bits >> DECODE_TYPE_BITS;
529
530 if (type == DECODE_TYPE_END)
531 return INSN_REJECTED;
532
533 next = (struct decode_header *)
534 ((uintptr_t)h + decode_struct_sizes[type]);
535
536 if (!matched && (insn & h->mask.bits) != h->value.bits)
537 continue;
538
539 if (!decode_regs(&insn, regs))
540 return INSN_REJECTED;
541
542 switch (type) {
543
544 case DECODE_TYPE_TABLE: {
545 struct decode_table *d = (struct decode_table *)h;
546 next = (struct decode_header *)d->table.table;
547 break;
548 }
549
550 case DECODE_TYPE_CUSTOM: {
551 struct decode_custom *d = (struct decode_custom *)h;
552 return (*d->decoder.decoder)(insn, asi);
553 }
554
555 case DECODE_TYPE_SIMULATE: {
556 struct decode_simulate *d = (struct decode_simulate *)h;
557 asi->insn_handler = d->handler.handler;
558 return INSN_GOOD_NO_SLOT;
559 }
560
561 case DECODE_TYPE_EMULATE: {
562 struct decode_emulate *d = (struct decode_emulate *)h;
563 asi->insn_handler = d->handler.handler;
564 set_emulated_insn(insn, asi, thumb);
565 return INSN_GOOD;
566 }
567
568 case DECODE_TYPE_OR:
569 matched = true;
570 break;
571
572 case DECODE_TYPE_REJECT:
573 default:
574 return INSN_REJECTED;
575 }
576 }
577 }
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c
deleted file mode 100644
index 15eeff6aea0e..000000000000
--- a/arch/arm/kernel/kprobes-decode.c
+++ /dev/null
@@ -1,1670 +0,0 @@
1/*
2 * arch/arm/kernel/kprobes-decode.c
3 *
4 * Copyright (C) 2006, 2007 Motorola Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 */
15
16/*
17 * We do not have hardware single-stepping on ARM, This
18 * effort is further complicated by the ARM not having a
19 * "next PC" register. Instructions that change the PC
20 * can't be safely single-stepped in a MP environment, so
21 * we have a lot of work to do:
22 *
23 * In the prepare phase:
24 * *) If it is an instruction that does anything
25 * with the CPU mode, we reject it for a kprobe.
26 * (This is out of laziness rather than need. The
27 * instructions could be simulated.)
28 *
29 * *) Otherwise, decode the instruction rewriting its
30 * registers to take fixed, ordered registers and
31 * setting a handler for it to run the instruction.
32 *
33 * In the execution phase by an instruction's handler:
34 *
35 * *) If the PC is written to by the instruction, the
36 * instruction must be fully simulated in software.
37 *
38 * *) Otherwise, a modified form of the instruction is
39 * directly executed. Its handler calls the
40 * instruction in insn[0]. In insn[1] is a
41 * "mov pc, lr" to return.
42 *
43 * Before calling, load up the reordered registers
44 * from the original instruction's registers. If one
45 * of the original input registers is the PC, compute
46 * and adjust the appropriate input register.
47 *
48 * After call completes, copy the output registers to
49 * the original instruction's original registers.
50 *
51 * We don't use a real breakpoint instruction since that
52 * would have us in the kernel go from SVC mode to SVC
53 * mode losing the link register. Instead we use an
54 * undefined instruction. To simplify processing, the
55 * undefined instruction used for kprobes must be reserved
56 * exclusively for kprobes use.
57 *
58 * TODO: ifdef out some instruction decoding based on architecture.
59 */
60
61#include <linux/kernel.h>
62#include <linux/kprobes.h>
63
64#define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
65
66#define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
67
68#define is_r15(insn, bitpos) (((insn) & (0xf << bitpos)) == (0xf << bitpos))
69
70/*
71 * Test if load/store instructions writeback the address register.
72 * if P (bit 24) == 0 or W (bit 21) == 1
73 */
74#define is_writeback(insn) ((insn ^ 0x01000000) & 0x01200000)
75
76#define PSR_fs (PSR_f|PSR_s)
77
78#define KPROBE_RETURN_INSTRUCTION 0xe1a0f00e /* mov pc, lr */
79
80typedef long (insn_0arg_fn_t)(void);
81typedef long (insn_1arg_fn_t)(long);
82typedef long (insn_2arg_fn_t)(long, long);
83typedef long (insn_3arg_fn_t)(long, long, long);
84typedef long (insn_4arg_fn_t)(long, long, long, long);
85typedef long long (insn_llret_0arg_fn_t)(void);
86typedef long long (insn_llret_3arg_fn_t)(long, long, long);
87typedef long long (insn_llret_4arg_fn_t)(long, long, long, long);
88
89union reg_pair {
90 long long dr;
91#ifdef __LITTLE_ENDIAN
92 struct { long r0, r1; };
93#else
94 struct { long r1, r0; };
95#endif
96};
97
98/*
99 * For STR and STM instructions, an ARM core may choose to use either
100 * a +8 or a +12 displacement from the current instruction's address.
101 * Whichever value is chosen for a given core, it must be the same for
102 * both instructions and may not change. This function measures it.
103 */
104
105static int str_pc_offset;
106
107static void __init find_str_pc_offset(void)
108{
109 int addr, scratch, ret;
110
111 __asm__ (
112 "sub %[ret], pc, #4 \n\t"
113 "str pc, %[addr] \n\t"
114 "ldr %[scr], %[addr] \n\t"
115 "sub %[ret], %[scr], %[ret] \n\t"
116 : [ret] "=r" (ret), [scr] "=r" (scratch), [addr] "+m" (addr));
117
118 str_pc_offset = ret;
119}
120
121/*
122 * The insnslot_?arg_r[w]flags() functions below are to keep the
123 * msr -> *fn -> mrs instruction sequences indivisible so that
124 * the state of the CPSR flags aren't inadvertently modified
125 * just before or just after the call.
126 */
127
128static inline long __kprobes
129insnslot_0arg_rflags(long cpsr, insn_0arg_fn_t *fn)
130{
131 register long ret asm("r0");
132
133 __asm__ __volatile__ (
134 "msr cpsr_fs, %[cpsr] \n\t"
135 "mov lr, pc \n\t"
136 "mov pc, %[fn] \n\t"
137 : "=r" (ret)
138 : [cpsr] "r" (cpsr), [fn] "r" (fn)
139 : "lr", "cc"
140 );
141 return ret;
142}
143
144static inline long long __kprobes
145insnslot_llret_0arg_rflags(long cpsr, insn_llret_0arg_fn_t *fn)
146{
147 register long ret0 asm("r0");
148 register long ret1 asm("r1");
149 union reg_pair fnr;
150
151 __asm__ __volatile__ (
152 "msr cpsr_fs, %[cpsr] \n\t"
153 "mov lr, pc \n\t"
154 "mov pc, %[fn] \n\t"
155 : "=r" (ret0), "=r" (ret1)
156 : [cpsr] "r" (cpsr), [fn] "r" (fn)
157 : "lr", "cc"
158 );
159 fnr.r0 = ret0;
160 fnr.r1 = ret1;
161 return fnr.dr;
162}
163
164static inline long __kprobes
165insnslot_1arg_rflags(long r0, long cpsr, insn_1arg_fn_t *fn)
166{
167 register long rr0 asm("r0") = r0;
168 register long ret asm("r0");
169
170 __asm__ __volatile__ (
171 "msr cpsr_fs, %[cpsr] \n\t"
172 "mov lr, pc \n\t"
173 "mov pc, %[fn] \n\t"
174 : "=r" (ret)
175 : "0" (rr0), [cpsr] "r" (cpsr), [fn] "r" (fn)
176 : "lr", "cc"
177 );
178 return ret;
179}
180
181static inline long __kprobes
182insnslot_2arg_rflags(long r0, long r1, long cpsr, insn_2arg_fn_t *fn)
183{
184 register long rr0 asm("r0") = r0;
185 register long rr1 asm("r1") = r1;
186 register long ret asm("r0");
187
188 __asm__ __volatile__ (
189 "msr cpsr_fs, %[cpsr] \n\t"
190 "mov lr, pc \n\t"
191 "mov pc, %[fn] \n\t"
192 : "=r" (ret)
193 : "0" (rr0), "r" (rr1),
194 [cpsr] "r" (cpsr), [fn] "r" (fn)
195 : "lr", "cc"
196 );
197 return ret;
198}
199
200static inline long __kprobes
201insnslot_3arg_rflags(long r0, long r1, long r2, long cpsr, insn_3arg_fn_t *fn)
202{
203 register long rr0 asm("r0") = r0;
204 register long rr1 asm("r1") = r1;
205 register long rr2 asm("r2") = r2;
206 register long ret asm("r0");
207
208 __asm__ __volatile__ (
209 "msr cpsr_fs, %[cpsr] \n\t"
210 "mov lr, pc \n\t"
211 "mov pc, %[fn] \n\t"
212 : "=r" (ret)
213 : "0" (rr0), "r" (rr1), "r" (rr2),
214 [cpsr] "r" (cpsr), [fn] "r" (fn)
215 : "lr", "cc"
216 );
217 return ret;
218}
219
220static inline long long __kprobes
221insnslot_llret_3arg_rflags(long r0, long r1, long r2, long cpsr,
222 insn_llret_3arg_fn_t *fn)
223{
224 register long rr0 asm("r0") = r0;
225 register long rr1 asm("r1") = r1;
226 register long rr2 asm("r2") = r2;
227 register long ret0 asm("r0");
228 register long ret1 asm("r1");
229 union reg_pair fnr;
230
231 __asm__ __volatile__ (
232 "msr cpsr_fs, %[cpsr] \n\t"
233 "mov lr, pc \n\t"
234 "mov pc, %[fn] \n\t"
235 : "=r" (ret0), "=r" (ret1)
236 : "0" (rr0), "r" (rr1), "r" (rr2),
237 [cpsr] "r" (cpsr), [fn] "r" (fn)
238 : "lr", "cc"
239 );
240 fnr.r0 = ret0;
241 fnr.r1 = ret1;
242 return fnr.dr;
243}
244
245static inline long __kprobes
246insnslot_4arg_rflags(long r0, long r1, long r2, long r3, long cpsr,
247 insn_4arg_fn_t *fn)
248{
249 register long rr0 asm("r0") = r0;
250 register long rr1 asm("r1") = r1;
251 register long rr2 asm("r2") = r2;
252 register long rr3 asm("r3") = r3;
253 register long ret asm("r0");
254
255 __asm__ __volatile__ (
256 "msr cpsr_fs, %[cpsr] \n\t"
257 "mov lr, pc \n\t"
258 "mov pc, %[fn] \n\t"
259 : "=r" (ret)
260 : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3),
261 [cpsr] "r" (cpsr), [fn] "r" (fn)
262 : "lr", "cc"
263 );
264 return ret;
265}
266
267static inline long __kprobes
268insnslot_1arg_rwflags(long r0, long *cpsr, insn_1arg_fn_t *fn)
269{
270 register long rr0 asm("r0") = r0;
271 register long ret asm("r0");
272 long oldcpsr = *cpsr;
273 long newcpsr;
274
275 __asm__ __volatile__ (
276 "msr cpsr_fs, %[oldcpsr] \n\t"
277 "mov lr, pc \n\t"
278 "mov pc, %[fn] \n\t"
279 "mrs %[newcpsr], cpsr \n\t"
280 : "=r" (ret), [newcpsr] "=r" (newcpsr)
281 : "0" (rr0), [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
282 : "lr", "cc"
283 );
284 *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
285 return ret;
286}
287
288static inline long __kprobes
289insnslot_2arg_rwflags(long r0, long r1, long *cpsr, insn_2arg_fn_t *fn)
290{
291 register long rr0 asm("r0") = r0;
292 register long rr1 asm("r1") = r1;
293 register long ret asm("r0");
294 long oldcpsr = *cpsr;
295 long newcpsr;
296
297 __asm__ __volatile__ (
298 "msr cpsr_fs, %[oldcpsr] \n\t"
299 "mov lr, pc \n\t"
300 "mov pc, %[fn] \n\t"
301 "mrs %[newcpsr], cpsr \n\t"
302 : "=r" (ret), [newcpsr] "=r" (newcpsr)
303 : "0" (rr0), "r" (rr1), [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
304 : "lr", "cc"
305 );
306 *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
307 return ret;
308}
309
310static inline long __kprobes
311insnslot_3arg_rwflags(long r0, long r1, long r2, long *cpsr,
312 insn_3arg_fn_t *fn)
313{
314 register long rr0 asm("r0") = r0;
315 register long rr1 asm("r1") = r1;
316 register long rr2 asm("r2") = r2;
317 register long ret asm("r0");
318 long oldcpsr = *cpsr;
319 long newcpsr;
320
321 __asm__ __volatile__ (
322 "msr cpsr_fs, %[oldcpsr] \n\t"
323 "mov lr, pc \n\t"
324 "mov pc, %[fn] \n\t"
325 "mrs %[newcpsr], cpsr \n\t"
326 : "=r" (ret), [newcpsr] "=r" (newcpsr)
327 : "0" (rr0), "r" (rr1), "r" (rr2),
328 [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
329 : "lr", "cc"
330 );
331 *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
332 return ret;
333}
334
335static inline long __kprobes
336insnslot_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr,
337 insn_4arg_fn_t *fn)
338{
339 register long rr0 asm("r0") = r0;
340 register long rr1 asm("r1") = r1;
341 register long rr2 asm("r2") = r2;
342 register long rr3 asm("r3") = r3;
343 register long ret asm("r0");
344 long oldcpsr = *cpsr;
345 long newcpsr;
346
347 __asm__ __volatile__ (
348 "msr cpsr_fs, %[oldcpsr] \n\t"
349 "mov lr, pc \n\t"
350 "mov pc, %[fn] \n\t"
351 "mrs %[newcpsr], cpsr \n\t"
352 : "=r" (ret), [newcpsr] "=r" (newcpsr)
353 : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3),
354 [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
355 : "lr", "cc"
356 );
357 *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
358 return ret;
359}
360
361static inline long long __kprobes
362insnslot_llret_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr,
363 insn_llret_4arg_fn_t *fn)
364{
365 register long rr0 asm("r0") = r0;
366 register long rr1 asm("r1") = r1;
367 register long rr2 asm("r2") = r2;
368 register long rr3 asm("r3") = r3;
369 register long ret0 asm("r0");
370 register long ret1 asm("r1");
371 long oldcpsr = *cpsr;
372 long newcpsr;
373 union reg_pair fnr;
374
375 __asm__ __volatile__ (
376 "msr cpsr_fs, %[oldcpsr] \n\t"
377 "mov lr, pc \n\t"
378 "mov pc, %[fn] \n\t"
379 "mrs %[newcpsr], cpsr \n\t"
380 : "=r" (ret0), "=r" (ret1), [newcpsr] "=r" (newcpsr)
381 : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3),
382 [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
383 : "lr", "cc"
384 );
385 *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
386 fnr.r0 = ret0;
387 fnr.r1 = ret1;
388 return fnr.dr;
389}
390
391/*
392 * To avoid the complications of mimicing single-stepping on a
393 * processor without a Next-PC or a single-step mode, and to
394 * avoid having to deal with the side-effects of boosting, we
395 * simulate or emulate (almost) all ARM instructions.
396 *
397 * "Simulation" is where the instruction's behavior is duplicated in
398 * C code. "Emulation" is where the original instruction is rewritten
399 * and executed, often by altering its registers.
400 *
401 * By having all behavior of the kprobe'd instruction completed before
402 * returning from the kprobe_handler(), all locks (scheduler and
403 * interrupt) can safely be released. There is no need for secondary
404 * breakpoints, no race with MP or preemptable kernels, nor having to
405 * clean up resources counts at a later time impacting overall system
406 * performance. By rewriting the instruction, only the minimum registers
407 * need to be loaded and saved back optimizing performance.
408 *
409 * Calling the insnslot_*_rwflags version of a function doesn't hurt
410 * anything even when the CPSR flags aren't updated by the
411 * instruction. It's just a little slower in return for saving
412 * a little space by not having a duplicate function that doesn't
413 * update the flags. (The same optimization can be said for
414 * instructions that do or don't perform register writeback)
415 * Also, instructions can either read the flags, only write the
416 * flags, or read and write the flags. To save combinations
417 * rather than for sheer performance, flag functions just assume
418 * read and write of flags.
419 */
420
421static void __kprobes simulate_bbl(struct kprobe *p, struct pt_regs *regs)
422{
423 kprobe_opcode_t insn = p->opcode;
424 long iaddr = (long)p->addr;
425 int disp = branch_displacement(insn);
426
427 if (insn & (1 << 24))
428 regs->ARM_lr = iaddr + 4;
429
430 regs->ARM_pc = iaddr + 8 + disp;
431}
432
433static void __kprobes simulate_blx1(struct kprobe *p, struct pt_regs *regs)
434{
435 kprobe_opcode_t insn = p->opcode;
436 long iaddr = (long)p->addr;
437 int disp = branch_displacement(insn);
438
439 regs->ARM_lr = iaddr + 4;
440 regs->ARM_pc = iaddr + 8 + disp + ((insn >> 23) & 0x2);
441 regs->ARM_cpsr |= PSR_T_BIT;
442}
443
444static void __kprobes simulate_blx2bx(struct kprobe *p, struct pt_regs *regs)
445{
446 kprobe_opcode_t insn = p->opcode;
447 int rm = insn & 0xf;
448 long rmv = regs->uregs[rm];
449
450 if (insn & (1 << 5))
451 regs->ARM_lr = (long)p->addr + 4;
452
453 regs->ARM_pc = rmv & ~0x1;
454 regs->ARM_cpsr &= ~PSR_T_BIT;
455 if (rmv & 0x1)
456 regs->ARM_cpsr |= PSR_T_BIT;
457}
458
459static void __kprobes simulate_mrs(struct kprobe *p, struct pt_regs *regs)
460{
461 kprobe_opcode_t insn = p->opcode;
462 int rd = (insn >> 12) & 0xf;
463 unsigned long mask = 0xf8ff03df; /* Mask out execution state */
464 regs->uregs[rd] = regs->ARM_cpsr & mask;
465}
466
467static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs)
468{
469 kprobe_opcode_t insn = p->opcode;
470 int rn = (insn >> 16) & 0xf;
471 int lbit = insn & (1 << 20);
472 int wbit = insn & (1 << 21);
473 int ubit = insn & (1 << 23);
474 int pbit = insn & (1 << 24);
475 long *addr = (long *)regs->uregs[rn];
476 int reg_bit_vector;
477 int reg_count;
478
479 reg_count = 0;
480 reg_bit_vector = insn & 0xffff;
481 while (reg_bit_vector) {
482 reg_bit_vector &= (reg_bit_vector - 1);
483 ++reg_count;
484 }
485
486 if (!ubit)
487 addr -= reg_count;
488 addr += (!pbit == !ubit);
489
490 reg_bit_vector = insn & 0xffff;
491 while (reg_bit_vector) {
492 int reg = __ffs(reg_bit_vector);
493 reg_bit_vector &= (reg_bit_vector - 1);
494 if (lbit)
495 regs->uregs[reg] = *addr++;
496 else
497 *addr++ = regs->uregs[reg];
498 }
499
500 if (wbit) {
501 if (!ubit)
502 addr -= reg_count;
503 addr -= (!pbit == !ubit);
504 regs->uregs[rn] = (long)addr;
505 }
506}
507
508static void __kprobes simulate_stm1_pc(struct kprobe *p, struct pt_regs *regs)
509{
510 regs->ARM_pc = (long)p->addr + str_pc_offset;
511 simulate_ldm1stm1(p, regs);
512 regs->ARM_pc = (long)p->addr + 4;
513}
514
515static void __kprobes simulate_mov_ipsp(struct kprobe *p, struct pt_regs *regs)
516{
517 regs->uregs[12] = regs->uregs[13];
518}
519
520static void __kprobes emulate_ldrd(struct kprobe *p, struct pt_regs *regs)
521{
522 insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
523 kprobe_opcode_t insn = p->opcode;
524 long ppc = (long)p->addr + 8;
525 int rd = (insn >> 12) & 0xf;
526 int rn = (insn >> 16) & 0xf;
527 int rm = insn & 0xf; /* rm may be invalid, don't care. */
528 long rmv = (rm == 15) ? ppc : regs->uregs[rm];
529 long rnv = (rn == 15) ? ppc : regs->uregs[rn];
530
531 /* Not following the C calling convention here, so need asm(). */
532 __asm__ __volatile__ (
533 "ldr r0, %[rn] \n\t"
534 "ldr r1, %[rm] \n\t"
535 "msr cpsr_fs, %[cpsr]\n\t"
536 "mov lr, pc \n\t"
537 "mov pc, %[i_fn] \n\t"
538 "str r0, %[rn] \n\t" /* in case of writeback */
539 "str r2, %[rd0] \n\t"
540 "str r3, %[rd1] \n\t"
541 : [rn] "+m" (rnv),
542 [rd0] "=m" (regs->uregs[rd]),
543 [rd1] "=m" (regs->uregs[rd+1])
544 : [rm] "m" (rmv),
545 [cpsr] "r" (regs->ARM_cpsr),
546 [i_fn] "r" (i_fn)
547 : "r0", "r1", "r2", "r3", "lr", "cc"
548 );
549 if (is_writeback(insn))
550 regs->uregs[rn] = rnv;
551}
552
553static void __kprobes emulate_strd(struct kprobe *p, struct pt_regs *regs)
554{
555 insn_4arg_fn_t *i_fn = (insn_4arg_fn_t *)&p->ainsn.insn[0];
556 kprobe_opcode_t insn = p->opcode;
557 long ppc = (long)p->addr + 8;
558 int rd = (insn >> 12) & 0xf;
559 int rn = (insn >> 16) & 0xf;
560 int rm = insn & 0xf;
561 long rnv = (rn == 15) ? ppc : regs->uregs[rn];
562 /* rm/rmv may be invalid, don't care. */
563 long rmv = (rm == 15) ? ppc : regs->uregs[rm];
564 long rnv_wb;
565
566 rnv_wb = insnslot_4arg_rflags(rnv, rmv, regs->uregs[rd],
567 regs->uregs[rd+1],
568 regs->ARM_cpsr, i_fn);
569 if (is_writeback(insn))
570 regs->uregs[rn] = rnv_wb;
571}
572
573static void __kprobes emulate_ldr(struct kprobe *p, struct pt_regs *regs)
574{
575 insn_llret_3arg_fn_t *i_fn = (insn_llret_3arg_fn_t *)&p->ainsn.insn[0];
576 kprobe_opcode_t insn = p->opcode;
577 long ppc = (long)p->addr + 8;
578 union reg_pair fnr;
579 int rd = (insn >> 12) & 0xf;
580 int rn = (insn >> 16) & 0xf;
581 int rm = insn & 0xf;
582 long rdv;
583 long rnv = (rn == 15) ? ppc : regs->uregs[rn];
584 long rmv = (rm == 15) ? ppc : regs->uregs[rm];
585 long cpsr = regs->ARM_cpsr;
586
587 fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn);
588 if (rn != 15)
589 regs->uregs[rn] = fnr.r0; /* Save Rn in case of writeback. */
590 rdv = fnr.r1;
591
592 if (rd == 15) {
593#if __LINUX_ARM_ARCH__ >= 5
594 cpsr &= ~PSR_T_BIT;
595 if (rdv & 0x1)
596 cpsr |= PSR_T_BIT;
597 regs->ARM_cpsr = cpsr;
598 rdv &= ~0x1;
599#else
600 rdv &= ~0x2;
601#endif
602 }
603 regs->uregs[rd] = rdv;
604}
605
606static void __kprobes emulate_str(struct kprobe *p, struct pt_regs *regs)
607{
608 insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
609 kprobe_opcode_t insn = p->opcode;
610 long iaddr = (long)p->addr;
611 int rd = (insn >> 12) & 0xf;
612 int rn = (insn >> 16) & 0xf;
613 int rm = insn & 0xf;
614 long rdv = (rd == 15) ? iaddr + str_pc_offset : regs->uregs[rd];
615 long rnv = (rn == 15) ? iaddr + 8 : regs->uregs[rn];
616 long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */
617 long rnv_wb;
618
619 rnv_wb = insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn);
620 if (rn != 15)
621 regs->uregs[rn] = rnv_wb; /* Save Rn in case of writeback. */
622}
623
624static void __kprobes emulate_sat(struct kprobe *p, struct pt_regs *regs)
625{
626 insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
627 kprobe_opcode_t insn = p->opcode;
628 int rd = (insn >> 12) & 0xf;
629 int rm = insn & 0xf;
630 long rmv = regs->uregs[rm];
631
632 /* Writes Q flag */
633 regs->uregs[rd] = insnslot_1arg_rwflags(rmv, &regs->ARM_cpsr, i_fn);
634}
635
636static void __kprobes emulate_sel(struct kprobe *p, struct pt_regs *regs)
637{
638 insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
639 kprobe_opcode_t insn = p->opcode;
640 int rd = (insn >> 12) & 0xf;
641 int rn = (insn >> 16) & 0xf;
642 int rm = insn & 0xf;
643 long rnv = regs->uregs[rn];
644 long rmv = regs->uregs[rm];
645
646 /* Reads GE bits */
647 regs->uregs[rd] = insnslot_2arg_rflags(rnv, rmv, regs->ARM_cpsr, i_fn);
648}
649
650static void __kprobes emulate_none(struct kprobe *p, struct pt_regs *regs)
651{
652 insn_0arg_fn_t *i_fn = (insn_0arg_fn_t *)&p->ainsn.insn[0];
653
654 insnslot_0arg_rflags(regs->ARM_cpsr, i_fn);
655}
656
657static void __kprobes emulate_nop(struct kprobe *p, struct pt_regs *regs)
658{
659}
660
661static void __kprobes
662emulate_rd12_modify(struct kprobe *p, struct pt_regs *regs)
663{
664 insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
665 kprobe_opcode_t insn = p->opcode;
666 int rd = (insn >> 12) & 0xf;
667 long rdv = regs->uregs[rd];
668
669 regs->uregs[rd] = insnslot_1arg_rflags(rdv, regs->ARM_cpsr, i_fn);
670}
671
672static void __kprobes
673emulate_rd12rn0_modify(struct kprobe *p, struct pt_regs *regs)
674{
675 insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
676 kprobe_opcode_t insn = p->opcode;
677 int rd = (insn >> 12) & 0xf;
678 int rn = insn & 0xf;
679 long rdv = regs->uregs[rd];
680 long rnv = regs->uregs[rn];
681
682 regs->uregs[rd] = insnslot_2arg_rflags(rdv, rnv, regs->ARM_cpsr, i_fn);
683}
684
685static void __kprobes emulate_rd12rm0(struct kprobe *p, struct pt_regs *regs)
686{
687 insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
688 kprobe_opcode_t insn = p->opcode;
689 int rd = (insn >> 12) & 0xf;
690 int rm = insn & 0xf;
691 long rmv = regs->uregs[rm];
692
693 regs->uregs[rd] = insnslot_1arg_rflags(rmv, regs->ARM_cpsr, i_fn);
694}
695
696static void __kprobes
697emulate_rd12rn16rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
698{
699 insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
700 kprobe_opcode_t insn = p->opcode;
701 int rd = (insn >> 12) & 0xf;
702 int rn = (insn >> 16) & 0xf;
703 int rm = insn & 0xf;
704 long rnv = regs->uregs[rn];
705 long rmv = regs->uregs[rm];
706
707 regs->uregs[rd] =
708 insnslot_2arg_rwflags(rnv, rmv, &regs->ARM_cpsr, i_fn);
709}
710
711static void __kprobes
712emulate_rd16rn12rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
713{
714 insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
715 kprobe_opcode_t insn = p->opcode;
716 int rd = (insn >> 16) & 0xf;
717 int rn = (insn >> 12) & 0xf;
718 int rs = (insn >> 8) & 0xf;
719 int rm = insn & 0xf;
720 long rnv = regs->uregs[rn];
721 long rsv = regs->uregs[rs];
722 long rmv = regs->uregs[rm];
723
724 regs->uregs[rd] =
725 insnslot_3arg_rwflags(rnv, rsv, rmv, &regs->ARM_cpsr, i_fn);
726}
727
728static void __kprobes
729emulate_rd16rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
730{
731 insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
732 kprobe_opcode_t insn = p->opcode;
733 int rd = (insn >> 16) & 0xf;
734 int rs = (insn >> 8) & 0xf;
735 int rm = insn & 0xf;
736 long rsv = regs->uregs[rs];
737 long rmv = regs->uregs[rm];
738
739 regs->uregs[rd] =
740 insnslot_2arg_rwflags(rsv, rmv, &regs->ARM_cpsr, i_fn);
741}
742
743static void __kprobes
744emulate_rdhi16rdlo12rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
745{
746 insn_llret_4arg_fn_t *i_fn = (insn_llret_4arg_fn_t *)&p->ainsn.insn[0];
747 kprobe_opcode_t insn = p->opcode;
748 union reg_pair fnr;
749 int rdhi = (insn >> 16) & 0xf;
750 int rdlo = (insn >> 12) & 0xf;
751 int rs = (insn >> 8) & 0xf;
752 int rm = insn & 0xf;
753 long rsv = regs->uregs[rs];
754 long rmv = regs->uregs[rm];
755
756 fnr.dr = insnslot_llret_4arg_rwflags(regs->uregs[rdhi],
757 regs->uregs[rdlo], rsv, rmv,
758 &regs->ARM_cpsr, i_fn);
759 regs->uregs[rdhi] = fnr.r0;
760 regs->uregs[rdlo] = fnr.r1;
761}
762
763static void __kprobes
764emulate_alu_imm_rflags(struct kprobe *p, struct pt_regs *regs)
765{
766 insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
767 kprobe_opcode_t insn = p->opcode;
768 int rd = (insn >> 12) & 0xf;
769 int rn = (insn >> 16) & 0xf;
770 long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn];
771
772 regs->uregs[rd] = insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn);
773}
774
775static void __kprobes
776emulate_alu_imm_rwflags(struct kprobe *p, struct pt_regs *regs)
777{
778 insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
779 kprobe_opcode_t insn = p->opcode;
780 int rd = (insn >> 12) & 0xf;
781 int rn = (insn >> 16) & 0xf;
782 long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn];
783
784 regs->uregs[rd] = insnslot_1arg_rwflags(rnv, &regs->ARM_cpsr, i_fn);
785}
786
787static void __kprobes
788emulate_alu_tests_imm(struct kprobe *p, struct pt_regs *regs)
789{
790 insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
791 kprobe_opcode_t insn = p->opcode;
792 int rn = (insn >> 16) & 0xf;
793 long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn];
794
795 insnslot_1arg_rwflags(rnv, &regs->ARM_cpsr, i_fn);
796}
797
798static void __kprobes
799emulate_alu_rflags(struct kprobe *p, struct pt_regs *regs)
800{
801 insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
802 kprobe_opcode_t insn = p->opcode;
803 long ppc = (long)p->addr + 8;
804 int rd = (insn >> 12) & 0xf;
805 int rn = (insn >> 16) & 0xf; /* rn/rnv/rs/rsv may be */
806 int rs = (insn >> 8) & 0xf; /* invalid, don't care. */
807 int rm = insn & 0xf;
808 long rnv = (rn == 15) ? ppc : regs->uregs[rn];
809 long rmv = (rm == 15) ? ppc : regs->uregs[rm];
810 long rsv = regs->uregs[rs];
811
812 regs->uregs[rd] =
813 insnslot_3arg_rflags(rnv, rmv, rsv, regs->ARM_cpsr, i_fn);
814}
815
816static void __kprobes
817emulate_alu_rwflags(struct kprobe *p, struct pt_regs *regs)
818{
819 insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
820 kprobe_opcode_t insn = p->opcode;
821 long ppc = (long)p->addr + 8;
822 int rd = (insn >> 12) & 0xf;
823 int rn = (insn >> 16) & 0xf; /* rn/rnv/rs/rsv may be */
824 int rs = (insn >> 8) & 0xf; /* invalid, don't care. */
825 int rm = insn & 0xf;
826 long rnv = (rn == 15) ? ppc : regs->uregs[rn];
827 long rmv = (rm == 15) ? ppc : regs->uregs[rm];
828 long rsv = regs->uregs[rs];
829
830 regs->uregs[rd] =
831 insnslot_3arg_rwflags(rnv, rmv, rsv, &regs->ARM_cpsr, i_fn);
832}
833
834static void __kprobes
835emulate_alu_tests(struct kprobe *p, struct pt_regs *regs)
836{
837 insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
838 kprobe_opcode_t insn = p->opcode;
839 long ppc = (long)p->addr + 8;
840 int rn = (insn >> 16) & 0xf;
841 int rs = (insn >> 8) & 0xf; /* rs/rsv may be invalid, don't care. */
842 int rm = insn & 0xf;
843 long rnv = (rn == 15) ? ppc : regs->uregs[rn];
844 long rmv = (rm == 15) ? ppc : regs->uregs[rm];
845 long rsv = regs->uregs[rs];
846
847 insnslot_3arg_rwflags(rnv, rmv, rsv, &regs->ARM_cpsr, i_fn);
848}
849
850static enum kprobe_insn __kprobes
851prep_emulate_ldr_str(kprobe_opcode_t insn, struct arch_specific_insn *asi)
852{
853 int not_imm = (insn & (1 << 26)) ? (insn & (1 << 25))
854 : (~insn & (1 << 22));
855
856 if (is_writeback(insn) && is_r15(insn, 16))
857 return INSN_REJECTED; /* Writeback to PC */
858
859 insn &= 0xfff00fff;
860 insn |= 0x00001000; /* Rn = r0, Rd = r1 */
861 if (not_imm) {
862 insn &= ~0xf;
863 insn |= 2; /* Rm = r2 */
864 }
865 asi->insn[0] = insn;
866 asi->insn_handler = (insn & (1 << 20)) ? emulate_ldr : emulate_str;
867 return INSN_GOOD;
868}
869
870static enum kprobe_insn __kprobes
871prep_emulate_rd12_modify(kprobe_opcode_t insn, struct arch_specific_insn *asi)
872{
873 if (is_r15(insn, 12))
874 return INSN_REJECTED; /* Rd is PC */
875
876 insn &= 0xffff0fff; /* Rd = r0 */
877 asi->insn[0] = insn;
878 asi->insn_handler = emulate_rd12_modify;
879 return INSN_GOOD;
880}
881
882static enum kprobe_insn __kprobes
883prep_emulate_rd12rn0_modify(kprobe_opcode_t insn,
884 struct arch_specific_insn *asi)
885{
886 if (is_r15(insn, 12))
887 return INSN_REJECTED; /* Rd is PC */
888
889 insn &= 0xffff0ff0; /* Rd = r0 */
890 insn |= 0x00000001; /* Rn = r1 */
891 asi->insn[0] = insn;
892 asi->insn_handler = emulate_rd12rn0_modify;
893 return INSN_GOOD;
894}
895
896static enum kprobe_insn __kprobes
897prep_emulate_rd12rm0(kprobe_opcode_t insn, struct arch_specific_insn *asi)
898{
899 if (is_r15(insn, 12))
900 return INSN_REJECTED; /* Rd is PC */
901
902 insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */
903 asi->insn[0] = insn;
904 asi->insn_handler = emulate_rd12rm0;
905 return INSN_GOOD;
906}
907
908static enum kprobe_insn __kprobes
909prep_emulate_rd12rn16rm0_wflags(kprobe_opcode_t insn,
910 struct arch_specific_insn *asi)
911{
912 if (is_r15(insn, 12))
913 return INSN_REJECTED; /* Rd is PC */
914
915 insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */
916 insn |= 0x00000001; /* Rm = r1 */
917 asi->insn[0] = insn;
918 asi->insn_handler = emulate_rd12rn16rm0_rwflags;
919 return INSN_GOOD;
920}
921
922static enum kprobe_insn __kprobes
923prep_emulate_rd16rs8rm0_wflags(kprobe_opcode_t insn,
924 struct arch_specific_insn *asi)
925{
926 if (is_r15(insn, 16))
927 return INSN_REJECTED; /* Rd is PC */
928
929 insn &= 0xfff0f0f0; /* Rd = r0, Rs = r0 */
930 insn |= 0x00000001; /* Rm = r1 */
931 asi->insn[0] = insn;
932 asi->insn_handler = emulate_rd16rs8rm0_rwflags;
933 return INSN_GOOD;
934}
935
936static enum kprobe_insn __kprobes
937prep_emulate_rd16rn12rs8rm0_wflags(kprobe_opcode_t insn,
938 struct arch_specific_insn *asi)
939{
940 if (is_r15(insn, 16))
941 return INSN_REJECTED; /* Rd is PC */
942
943 insn &= 0xfff000f0; /* Rd = r0, Rn = r0 */
944 insn |= 0x00000102; /* Rs = r1, Rm = r2 */
945 asi->insn[0] = insn;
946 asi->insn_handler = emulate_rd16rn12rs8rm0_rwflags;
947 return INSN_GOOD;
948}
949
950static enum kprobe_insn __kprobes
951prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn,
952 struct arch_specific_insn *asi)
953{
954 if (is_r15(insn, 16) || is_r15(insn, 12))
955 return INSN_REJECTED; /* RdHi or RdLo is PC */
956
957 insn &= 0xfff000f0; /* RdHi = r0, RdLo = r1 */
958 insn |= 0x00001203; /* Rs = r2, Rm = r3 */
959 asi->insn[0] = insn;
960 asi->insn_handler = emulate_rdhi16rdlo12rs8rm0_rwflags;
961 return INSN_GOOD;
962}
963
964/*
965 * For the instruction masking and comparisons in all the "space_*"
966 * functions below, Do _not_ rearrange the order of tests unless
967 * you're very, very sure of what you are doing. For the sake of
968 * efficiency, the masks for some tests sometimes assume other test
969 * have been done prior to them so the number of patterns to test
970 * for an instruction set can be as broad as possible to reduce the
971 * number of tests needed.
972 */
973
974static enum kprobe_insn __kprobes
975space_1111(kprobe_opcode_t insn, struct arch_specific_insn *asi)
976{
977 /* memory hint : 1111 0100 x001 xxxx xxxx xxxx xxxx xxxx : */
978 /* PLDI : 1111 0100 x101 xxxx xxxx xxxx xxxx xxxx : */
979 /* PLDW : 1111 0101 x001 xxxx xxxx xxxx xxxx xxxx : */
980 /* PLD : 1111 0101 x101 xxxx xxxx xxxx xxxx xxxx : */
981 if ((insn & 0xfe300000) == 0xf4100000) {
982 asi->insn_handler = emulate_nop;
983 return INSN_GOOD_NO_SLOT;
984 }
985
986 /* BLX(1) : 1111 101x xxxx xxxx xxxx xxxx xxxx xxxx : */
987 if ((insn & 0xfe000000) == 0xfa000000) {
988 asi->insn_handler = simulate_blx1;
989 return INSN_GOOD_NO_SLOT;
990 }
991
992 /* CPS : 1111 0001 0000 xxx0 xxxx xxxx xx0x xxxx */
993 /* SETEND: 1111 0001 0000 0001 xxxx xxxx 0000 xxxx */
994
995 /* SRS : 1111 100x x1x0 xxxx xxxx xxxx xxxx xxxx */
996 /* RFE : 1111 100x x0x1 xxxx xxxx xxxx xxxx xxxx */
997
998 /* Coprocessor instructions... */
999 /* MCRR2 : 1111 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */
1000 /* MRRC2 : 1111 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */
1001 /* LDC2 : 1111 110x xxx1 xxxx xxxx xxxx xxxx xxxx */
1002 /* STC2 : 1111 110x xxx0 xxxx xxxx xxxx xxxx xxxx */
1003 /* CDP2 : 1111 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */
1004 /* MCR2 : 1111 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */
1005 /* MRC2 : 1111 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */
1006
1007 return INSN_REJECTED;
1008}
1009
1010static enum kprobe_insn __kprobes
1011space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1012{
1013 /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx xxx0 xxxx */
1014 if ((insn & 0x0f900010) == 0x01000000) {
1015
1016 /* MRS cpsr : cccc 0001 0000 xxxx xxxx xxxx 0000 xxxx */
1017 if ((insn & 0x0ff000f0) == 0x01000000) {
1018 if (is_r15(insn, 12))
1019 return INSN_REJECTED; /* Rd is PC */
1020 asi->insn_handler = simulate_mrs;
1021 return INSN_GOOD_NO_SLOT;
1022 }
1023
1024 /* SMLALxy : cccc 0001 0100 xxxx xxxx xxxx 1xx0 xxxx */
1025 if ((insn & 0x0ff00090) == 0x01400080)
1026 return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn,
1027 asi);
1028
1029 /* SMULWy : cccc 0001 0010 xxxx xxxx xxxx 1x10 xxxx */
1030 /* SMULxy : cccc 0001 0110 xxxx xxxx xxxx 1xx0 xxxx */
1031 if ((insn & 0x0ff000b0) == 0x012000a0 ||
1032 (insn & 0x0ff00090) == 0x01600080)
1033 return prep_emulate_rd16rs8rm0_wflags(insn, asi);
1034
1035 /* SMLAxy : cccc 0001 0000 xxxx xxxx xxxx 1xx0 xxxx : Q */
1036 /* SMLAWy : cccc 0001 0010 xxxx xxxx xxxx 1x00 xxxx : Q */
1037 if ((insn & 0x0ff00090) == 0x01000080 ||
1038 (insn & 0x0ff000b0) == 0x01200080)
1039 return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi);
1040
1041 /* BXJ : cccc 0001 0010 xxxx xxxx xxxx 0010 xxxx */
1042 /* MSR : cccc 0001 0x10 xxxx xxxx xxxx 0000 xxxx */
1043 /* MRS spsr : cccc 0001 0100 xxxx xxxx xxxx 0000 xxxx */
1044
1045 /* Other instruction encodings aren't yet defined */
1046 return INSN_REJECTED;
1047 }
1048
1049 /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx 0xx1 xxxx */
1050 else if ((insn & 0x0f900090) == 0x01000010) {
1051
1052 /* BLX(2) : cccc 0001 0010 xxxx xxxx xxxx 0011 xxxx */
1053 /* BX : cccc 0001 0010 xxxx xxxx xxxx 0001 xxxx */
1054 if ((insn & 0x0ff000d0) == 0x01200010) {
1055 if ((insn & 0x0ff000ff) == 0x0120003f)
1056 return INSN_REJECTED; /* BLX pc */
1057 asi->insn_handler = simulate_blx2bx;
1058 return INSN_GOOD_NO_SLOT;
1059 }
1060
1061 /* CLZ : cccc 0001 0110 xxxx xxxx xxxx 0001 xxxx */
1062 if ((insn & 0x0ff000f0) == 0x01600010)
1063 return prep_emulate_rd12rm0(insn, asi);
1064
1065 /* QADD : cccc 0001 0000 xxxx xxxx xxxx 0101 xxxx :Q */
1066 /* QSUB : cccc 0001 0010 xxxx xxxx xxxx 0101 xxxx :Q */
1067 /* QDADD : cccc 0001 0100 xxxx xxxx xxxx 0101 xxxx :Q */
1068 /* QDSUB : cccc 0001 0110 xxxx xxxx xxxx 0101 xxxx :Q */
1069 if ((insn & 0x0f9000f0) == 0x01000050)
1070 return prep_emulate_rd12rn16rm0_wflags(insn, asi);
1071
1072 /* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */
1073 /* SMC : cccc 0001 0110 xxxx xxxx xxxx 0111 xxxx */
1074
1075 /* Other instruction encodings aren't yet defined */
1076 return INSN_REJECTED;
1077 }
1078
1079 /* cccc 0000 xxxx xxxx xxxx xxxx xxxx 1001 xxxx */
1080 else if ((insn & 0x0f0000f0) == 0x00000090) {
1081
1082 /* MUL : cccc 0000 0000 xxxx xxxx xxxx 1001 xxxx : */
1083 /* MULS : cccc 0000 0001 xxxx xxxx xxxx 1001 xxxx :cc */
1084 /* MLA : cccc 0000 0010 xxxx xxxx xxxx 1001 xxxx : */
1085 /* MLAS : cccc 0000 0011 xxxx xxxx xxxx 1001 xxxx :cc */
1086 /* UMAAL : cccc 0000 0100 xxxx xxxx xxxx 1001 xxxx : */
1087 /* undef : cccc 0000 0101 xxxx xxxx xxxx 1001 xxxx : */
1088 /* MLS : cccc 0000 0110 xxxx xxxx xxxx 1001 xxxx : */
1089 /* undef : cccc 0000 0111 xxxx xxxx xxxx 1001 xxxx : */
1090 /* UMULL : cccc 0000 1000 xxxx xxxx xxxx 1001 xxxx : */
1091 /* UMULLS : cccc 0000 1001 xxxx xxxx xxxx 1001 xxxx :cc */
1092 /* UMLAL : cccc 0000 1010 xxxx xxxx xxxx 1001 xxxx : */
1093 /* UMLALS : cccc 0000 1011 xxxx xxxx xxxx 1001 xxxx :cc */
1094 /* SMULL : cccc 0000 1100 xxxx xxxx xxxx 1001 xxxx : */
1095 /* SMULLS : cccc 0000 1101 xxxx xxxx xxxx 1001 xxxx :cc */
1096 /* SMLAL : cccc 0000 1110 xxxx xxxx xxxx 1001 xxxx : */
1097 /* SMLALS : cccc 0000 1111 xxxx xxxx xxxx 1001 xxxx :cc */
1098 if ((insn & 0x00d00000) == 0x00500000)
1099 return INSN_REJECTED;
1100 else if ((insn & 0x00e00000) == 0x00000000)
1101 return prep_emulate_rd16rs8rm0_wflags(insn, asi);
1102 else if ((insn & 0x00a00000) == 0x00200000)
1103 return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi);
1104 else
1105 return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn,
1106 asi);
1107 }
1108
1109 /* cccc 000x xxxx xxxx xxxx xxxx xxxx 1xx1 xxxx */
1110 else if ((insn & 0x0e000090) == 0x00000090) {
1111
1112 /* SWP : cccc 0001 0000 xxxx xxxx xxxx 1001 xxxx */
1113 /* SWPB : cccc 0001 0100 xxxx xxxx xxxx 1001 xxxx */
1114 /* ??? : cccc 0001 0x01 xxxx xxxx xxxx 1001 xxxx */
1115 /* ??? : cccc 0001 0x10 xxxx xxxx xxxx 1001 xxxx */
1116 /* ??? : cccc 0001 0x11 xxxx xxxx xxxx 1001 xxxx */
1117 /* STREX : cccc 0001 1000 xxxx xxxx xxxx 1001 xxxx */
1118 /* LDREX : cccc 0001 1001 xxxx xxxx xxxx 1001 xxxx */
1119 /* STREXD: cccc 0001 1010 xxxx xxxx xxxx 1001 xxxx */
1120 /* LDREXD: cccc 0001 1011 xxxx xxxx xxxx 1001 xxxx */
1121 /* STREXB: cccc 0001 1100 xxxx xxxx xxxx 1001 xxxx */
1122 /* LDREXB: cccc 0001 1101 xxxx xxxx xxxx 1001 xxxx */
1123 /* STREXH: cccc 0001 1110 xxxx xxxx xxxx 1001 xxxx */
1124 /* LDREXH: cccc 0001 1111 xxxx xxxx xxxx 1001 xxxx */
1125
1126 /* LDRD : cccc 000x xxx0 xxxx xxxx xxxx 1101 xxxx */
1127 /* STRD : cccc 000x xxx0 xxxx xxxx xxxx 1111 xxxx */
1128 /* LDRH : cccc 000x xxx1 xxxx xxxx xxxx 1011 xxxx */
1129 /* STRH : cccc 000x xxx0 xxxx xxxx xxxx 1011 xxxx */
1130 /* LDRSB : cccc 000x xxx1 xxxx xxxx xxxx 1101 xxxx */
1131 /* LDRSH : cccc 000x xxx1 xxxx xxxx xxxx 1111 xxxx */
1132 if ((insn & 0x0f0000f0) == 0x01000090) {
1133 if ((insn & 0x0fb000f0) == 0x01000090) {
1134 /* SWP/SWPB */
1135 return prep_emulate_rd12rn16rm0_wflags(insn,
1136 asi);
1137 } else {
1138 /* STREX/LDREX variants and unallocaed space */
1139 return INSN_REJECTED;
1140 }
1141
1142 } else if ((insn & 0x0e1000d0) == 0x00000d0) {
1143 /* STRD/LDRD */
1144 if ((insn & 0x0000e000) == 0x0000e000)
1145 return INSN_REJECTED; /* Rd is LR or PC */
1146 if (is_writeback(insn) && is_r15(insn, 16))
1147 return INSN_REJECTED; /* Writeback to PC */
1148
1149 insn &= 0xfff00fff;
1150 insn |= 0x00002000; /* Rn = r0, Rd = r2 */
1151 if (!(insn & (1 << 22))) {
1152 /* Register index */
1153 insn &= ~0xf;
1154 insn |= 1; /* Rm = r1 */
1155 }
1156 asi->insn[0] = insn;
1157 asi->insn_handler =
1158 (insn & (1 << 5)) ? emulate_strd : emulate_ldrd;
1159 return INSN_GOOD;
1160 }
1161
1162 /* LDRH/STRH/LDRSB/LDRSH */
1163 if (is_r15(insn, 12))
1164 return INSN_REJECTED; /* Rd is PC */
1165 return prep_emulate_ldr_str(insn, asi);
1166 }
1167
1168 /* cccc 000x xxxx xxxx xxxx xxxx xxxx xxxx xxxx */
1169
1170 /*
1171 * ALU op with S bit and Rd == 15 :
1172 * cccc 000x xxx1 xxxx 1111 xxxx xxxx xxxx
1173 */
1174 if ((insn & 0x0e10f000) == 0x0010f000)
1175 return INSN_REJECTED;
1176
1177 /*
1178 * "mov ip, sp" is the most common kprobe'd instruction by far.
1179 * Check and optimize for it explicitly.
1180 */
1181 if (insn == 0xe1a0c00d) {
1182 asi->insn_handler = simulate_mov_ipsp;
1183 return INSN_GOOD_NO_SLOT;
1184 }
1185
1186 /*
1187 * Data processing: Immediate-shift / Register-shift
1188 * ALU op : cccc 000x xxxx xxxx xxxx xxxx xxxx xxxx
1189 * CPY : cccc 0001 1010 xxxx xxxx 0000 0000 xxxx
1190 * MOV : cccc 0001 101x xxxx xxxx xxxx xxxx xxxx
1191 * *S (bit 20) updates condition codes
1192 * ADC/SBC/RSC reads the C flag
1193 */
1194 insn &= 0xfff00ff0; /* Rn = r0, Rd = r0 */
1195 insn |= 0x00000001; /* Rm = r1 */
1196 if (insn & 0x010) {
1197 insn &= 0xfffff0ff; /* register shift */
1198 insn |= 0x00000200; /* Rs = r2 */
1199 }
1200 asi->insn[0] = insn;
1201
1202 if ((insn & 0x0f900000) == 0x01100000) {
1203 /*
1204 * TST : cccc 0001 0001 xxxx xxxx xxxx xxxx xxxx
1205 * TEQ : cccc 0001 0011 xxxx xxxx xxxx xxxx xxxx
1206 * CMP : cccc 0001 0101 xxxx xxxx xxxx xxxx xxxx
1207 * CMN : cccc 0001 0111 xxxx xxxx xxxx xxxx xxxx
1208 */
1209 asi->insn_handler = emulate_alu_tests;
1210 } else {
1211 /* ALU ops which write to Rd */
1212 asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */
1213 emulate_alu_rwflags : emulate_alu_rflags;
1214 }
1215 return INSN_GOOD;
1216}
1217
1218static enum kprobe_insn __kprobes
1219space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1220{
1221 /* MOVW : cccc 0011 0000 xxxx xxxx xxxx xxxx xxxx */
1222 /* MOVT : cccc 0011 0100 xxxx xxxx xxxx xxxx xxxx */
1223 if ((insn & 0x0fb00000) == 0x03000000)
1224 return prep_emulate_rd12_modify(insn, asi);
1225
1226 /* hints : cccc 0011 0010 0000 xxxx xxxx xxxx xxxx */
1227 if ((insn & 0x0fff0000) == 0x03200000) {
1228 unsigned op2 = insn & 0x000000ff;
1229 if (op2 == 0x01 || op2 == 0x04) {
1230 /* YIELD : cccc 0011 0010 0000 xxxx xxxx 0000 0001 */
1231 /* SEV : cccc 0011 0010 0000 xxxx xxxx 0000 0100 */
1232 asi->insn[0] = insn;
1233 asi->insn_handler = emulate_none;
1234 return INSN_GOOD;
1235 } else if (op2 <= 0x03) {
1236 /* NOP : cccc 0011 0010 0000 xxxx xxxx 0000 0000 */
1237 /* WFE : cccc 0011 0010 0000 xxxx xxxx 0000 0010 */
1238 /* WFI : cccc 0011 0010 0000 xxxx xxxx 0000 0011 */
1239 /*
1240 * We make WFE and WFI true NOPs to avoid stalls due
1241 * to missing events whilst processing the probe.
1242 */
1243 asi->insn_handler = emulate_nop;
1244 return INSN_GOOD_NO_SLOT;
1245 }
1246 /* For DBG and unallocated hints it's safest to reject them */
1247 return INSN_REJECTED;
1248 }
1249
1250 /*
1251 * MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx
1252 * ALU op with S bit and Rd == 15 :
1253 * cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx
1254 */
1255 if ((insn & 0x0fb00000) == 0x03200000 || /* MSR */
1256 (insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */
1257 return INSN_REJECTED;
1258
1259 /*
1260 * Data processing: 32-bit Immediate
1261 * ALU op : cccc 001x xxxx xxxx xxxx xxxx xxxx xxxx
1262 * MOV : cccc 0011 101x xxxx xxxx xxxx xxxx xxxx
1263 * *S (bit 20) updates condition codes
1264 * ADC/SBC/RSC reads the C flag
1265 */
1266 insn &= 0xfff00fff; /* Rn = r0 and Rd = r0 */
1267 asi->insn[0] = insn;
1268
1269 if ((insn & 0x0f900000) == 0x03100000) {
1270 /*
1271 * TST : cccc 0011 0001 xxxx xxxx xxxx xxxx xxxx
1272 * TEQ : cccc 0011 0011 xxxx xxxx xxxx xxxx xxxx
1273 * CMP : cccc 0011 0101 xxxx xxxx xxxx xxxx xxxx
1274 * CMN : cccc 0011 0111 xxxx xxxx xxxx xxxx xxxx
1275 */
1276 asi->insn_handler = emulate_alu_tests_imm;
1277 } else {
1278 /* ALU ops which write to Rd */
1279 asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */
1280 emulate_alu_imm_rwflags : emulate_alu_imm_rflags;
1281 }
1282 return INSN_GOOD;
1283}
1284
1285static enum kprobe_insn __kprobes
1286space_cccc_0110__1(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1287{
1288 /* SEL : cccc 0110 1000 xxxx xxxx xxxx 1011 xxxx GE: !!! */
1289 if ((insn & 0x0ff000f0) == 0x068000b0) {
1290 if (is_r15(insn, 12))
1291 return INSN_REJECTED; /* Rd is PC */
1292 insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */
1293 insn |= 0x00000001; /* Rm = r1 */
1294 asi->insn[0] = insn;
1295 asi->insn_handler = emulate_sel;
1296 return INSN_GOOD;
1297 }
1298
1299 /* SSAT : cccc 0110 101x xxxx xxxx xxxx xx01 xxxx :Q */
1300 /* USAT : cccc 0110 111x xxxx xxxx xxxx xx01 xxxx :Q */
1301 /* SSAT16 : cccc 0110 1010 xxxx xxxx xxxx 0011 xxxx :Q */
1302 /* USAT16 : cccc 0110 1110 xxxx xxxx xxxx 0011 xxxx :Q */
1303 if ((insn & 0x0fa00030) == 0x06a00010 ||
1304 (insn & 0x0fb000f0) == 0x06a00030) {
1305 if (is_r15(insn, 12))
1306 return INSN_REJECTED; /* Rd is PC */
1307 insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */
1308 asi->insn[0] = insn;
1309 asi->insn_handler = emulate_sat;
1310 return INSN_GOOD;
1311 }
1312
1313 /* REV : cccc 0110 1011 xxxx xxxx xxxx 0011 xxxx */
1314 /* REV16 : cccc 0110 1011 xxxx xxxx xxxx 1011 xxxx */
1315 /* RBIT : cccc 0110 1111 xxxx xxxx xxxx 0011 xxxx */
1316 /* REVSH : cccc 0110 1111 xxxx xxxx xxxx 1011 xxxx */
1317 if ((insn & 0x0ff00070) == 0x06b00030 ||
1318 (insn & 0x0ff00070) == 0x06f00030)
1319 return prep_emulate_rd12rm0(insn, asi);
1320
1321 /* ??? : cccc 0110 0000 xxxx xxxx xxxx xxx1 xxxx : */
1322 /* SADD16 : cccc 0110 0001 xxxx xxxx xxxx 0001 xxxx :GE */
1323 /* SADDSUBX : cccc 0110 0001 xxxx xxxx xxxx 0011 xxxx :GE */
1324 /* SSUBADDX : cccc 0110 0001 xxxx xxxx xxxx 0101 xxxx :GE */
1325 /* SSUB16 : cccc 0110 0001 xxxx xxxx xxxx 0111 xxxx :GE */
1326 /* SADD8 : cccc 0110 0001 xxxx xxxx xxxx 1001 xxxx :GE */
1327 /* ??? : cccc 0110 0001 xxxx xxxx xxxx 1011 xxxx : */
1328 /* ??? : cccc 0110 0001 xxxx xxxx xxxx 1101 xxxx : */
1329 /* SSUB8 : cccc 0110 0001 xxxx xxxx xxxx 1111 xxxx :GE */
1330 /* QADD16 : cccc 0110 0010 xxxx xxxx xxxx 0001 xxxx : */
1331 /* QADDSUBX : cccc 0110 0010 xxxx xxxx xxxx 0011 xxxx : */
1332 /* QSUBADDX : cccc 0110 0010 xxxx xxxx xxxx 0101 xxxx : */
1333 /* QSUB16 : cccc 0110 0010 xxxx xxxx xxxx 0111 xxxx : */
1334 /* QADD8 : cccc 0110 0010 xxxx xxxx xxxx 1001 xxxx : */
1335 /* ??? : cccc 0110 0010 xxxx xxxx xxxx 1011 xxxx : */
1336 /* ??? : cccc 0110 0010 xxxx xxxx xxxx 1101 xxxx : */
1337 /* QSUB8 : cccc 0110 0010 xxxx xxxx xxxx 1111 xxxx : */
1338 /* SHADD16 : cccc 0110 0011 xxxx xxxx xxxx 0001 xxxx : */
1339 /* SHADDSUBX : cccc 0110 0011 xxxx xxxx xxxx 0011 xxxx : */
1340 /* SHSUBADDX : cccc 0110 0011 xxxx xxxx xxxx 0101 xxxx : */
1341 /* SHSUB16 : cccc 0110 0011 xxxx xxxx xxxx 0111 xxxx : */
1342 /* SHADD8 : cccc 0110 0011 xxxx xxxx xxxx 1001 xxxx : */
1343 /* ??? : cccc 0110 0011 xxxx xxxx xxxx 1011 xxxx : */
1344 /* ??? : cccc 0110 0011 xxxx xxxx xxxx 1101 xxxx : */
1345 /* SHSUB8 : cccc 0110 0011 xxxx xxxx xxxx 1111 xxxx : */
1346 /* ??? : cccc 0110 0100 xxxx xxxx xxxx xxx1 xxxx : */
1347 /* UADD16 : cccc 0110 0101 xxxx xxxx xxxx 0001 xxxx :GE */
1348 /* UADDSUBX : cccc 0110 0101 xxxx xxxx xxxx 0011 xxxx :GE */
1349 /* USUBADDX : cccc 0110 0101 xxxx xxxx xxxx 0101 xxxx :GE */
1350 /* USUB16 : cccc 0110 0101 xxxx xxxx xxxx 0111 xxxx :GE */
1351 /* UADD8 : cccc 0110 0101 xxxx xxxx xxxx 1001 xxxx :GE */
1352 /* ??? : cccc 0110 0101 xxxx xxxx xxxx 1011 xxxx : */
1353 /* ??? : cccc 0110 0101 xxxx xxxx xxxx 1101 xxxx : */
1354 /* USUB8 : cccc 0110 0101 xxxx xxxx xxxx 1111 xxxx :GE */
1355 /* UQADD16 : cccc 0110 0110 xxxx xxxx xxxx 0001 xxxx : */
1356 /* UQADDSUBX : cccc 0110 0110 xxxx xxxx xxxx 0011 xxxx : */
1357 /* UQSUBADDX : cccc 0110 0110 xxxx xxxx xxxx 0101 xxxx : */
1358 /* UQSUB16 : cccc 0110 0110 xxxx xxxx xxxx 0111 xxxx : */
1359 /* UQADD8 : cccc 0110 0110 xxxx xxxx xxxx 1001 xxxx : */
1360 /* ??? : cccc 0110 0110 xxxx xxxx xxxx 1011 xxxx : */
1361 /* ??? : cccc 0110 0110 xxxx xxxx xxxx 1101 xxxx : */
1362 /* UQSUB8 : cccc 0110 0110 xxxx xxxx xxxx 1111 xxxx : */
1363 /* UHADD16 : cccc 0110 0111 xxxx xxxx xxxx 0001 xxxx : */
1364 /* UHADDSUBX : cccc 0110 0111 xxxx xxxx xxxx 0011 xxxx : */
1365 /* UHSUBADDX : cccc 0110 0111 xxxx xxxx xxxx 0101 xxxx : */
1366 /* UHSUB16 : cccc 0110 0111 xxxx xxxx xxxx 0111 xxxx : */
1367 /* UHADD8 : cccc 0110 0111 xxxx xxxx xxxx 1001 xxxx : */
1368 /* ??? : cccc 0110 0111 xxxx xxxx xxxx 1011 xxxx : */
1369 /* ??? : cccc 0110 0111 xxxx xxxx xxxx 1101 xxxx : */
1370 /* UHSUB8 : cccc 0110 0111 xxxx xxxx xxxx 1111 xxxx : */
1371 if ((insn & 0x0f800010) == 0x06000010) {
1372 if ((insn & 0x00300000) == 0x00000000 ||
1373 (insn & 0x000000e0) == 0x000000a0 ||
1374 (insn & 0x000000e0) == 0x000000c0)
1375 return INSN_REJECTED; /* Unallocated space */
1376 return prep_emulate_rd12rn16rm0_wflags(insn, asi);
1377 }
1378
1379 /* PKHBT : cccc 0110 1000 xxxx xxxx xxxx x001 xxxx : */
1380 /* PKHTB : cccc 0110 1000 xxxx xxxx xxxx x101 xxxx : */
1381 if ((insn & 0x0ff00030) == 0x06800010)
1382 return prep_emulate_rd12rn16rm0_wflags(insn, asi);
1383
1384 /* SXTAB16 : cccc 0110 1000 xxxx xxxx xxxx 0111 xxxx : */
1385 /* SXTB16 : cccc 0110 1000 1111 xxxx xxxx 0111 xxxx : */
1386 /* ??? : cccc 0110 1001 xxxx xxxx xxxx 0111 xxxx : */
1387 /* SXTAB : cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx : */
1388 /* SXTB : cccc 0110 1010 1111 xxxx xxxx 0111 xxxx : */
1389 /* SXTAH : cccc 0110 1011 xxxx xxxx xxxx 0111 xxxx : */
1390 /* SXTH : cccc 0110 1011 1111 xxxx xxxx 0111 xxxx : */
1391 /* UXTAB16 : cccc 0110 1100 xxxx xxxx xxxx 0111 xxxx : */
1392 /* UXTB16 : cccc 0110 1100 1111 xxxx xxxx 0111 xxxx : */
1393 /* ??? : cccc 0110 1101 xxxx xxxx xxxx 0111 xxxx : */
1394 /* UXTAB : cccc 0110 1110 xxxx xxxx xxxx 0111 xxxx : */
1395 /* UXTB : cccc 0110 1110 1111 xxxx xxxx 0111 xxxx : */
1396 /* UXTAH : cccc 0110 1111 xxxx xxxx xxxx 0111 xxxx : */
1397 /* UXTH : cccc 0110 1111 1111 xxxx xxxx 0111 xxxx : */
1398 if ((insn & 0x0f8000f0) == 0x06800070) {
1399 if ((insn & 0x00300000) == 0x00100000)
1400 return INSN_REJECTED; /* Unallocated space */
1401
1402 if ((insn & 0x000f0000) == 0x000f0000)
1403 return prep_emulate_rd12rm0(insn, asi);
1404 else
1405 return prep_emulate_rd12rn16rm0_wflags(insn, asi);
1406 }
1407
1408 /* Other instruction encodings aren't yet defined */
1409 return INSN_REJECTED;
1410}
1411
1412static enum kprobe_insn __kprobes
1413space_cccc_0111__1(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1414{
1415 /* Undef : cccc 0111 1111 xxxx xxxx xxxx 1111 xxxx */
1416 if ((insn & 0x0ff000f0) == 0x03f000f0)
1417 return INSN_REJECTED;
1418
1419 /* SMLALD : cccc 0111 0100 xxxx xxxx xxxx 00x1 xxxx */
1420 /* SMLSLD : cccc 0111 0100 xxxx xxxx xxxx 01x1 xxxx */
1421 if ((insn & 0x0ff00090) == 0x07400010)
1422 return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi);
1423
1424 /* SMLAD : cccc 0111 0000 xxxx xxxx xxxx 00x1 xxxx :Q */
1425 /* SMUAD : cccc 0111 0000 xxxx 1111 xxxx 00x1 xxxx :Q */
1426 /* SMLSD : cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx :Q */
1427 /* SMUSD : cccc 0111 0000 xxxx 1111 xxxx 01x1 xxxx : */
1428 /* SMMLA : cccc 0111 0101 xxxx xxxx xxxx 00x1 xxxx : */
1429 /* SMMUL : cccc 0111 0101 xxxx 1111 xxxx 00x1 xxxx : */
1430 /* USADA8 : cccc 0111 1000 xxxx xxxx xxxx 0001 xxxx : */
1431 /* USAD8 : cccc 0111 1000 xxxx 1111 xxxx 0001 xxxx : */
1432 if ((insn & 0x0ff00090) == 0x07000010 ||
1433 (insn & 0x0ff000d0) == 0x07500010 ||
1434 (insn & 0x0ff000f0) == 0x07800010) {
1435
1436 if ((insn & 0x0000f000) == 0x0000f000)
1437 return prep_emulate_rd16rs8rm0_wflags(insn, asi);
1438 else
1439 return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi);
1440 }
1441
1442 /* SMMLS : cccc 0111 0101 xxxx xxxx xxxx 11x1 xxxx : */
1443 if ((insn & 0x0ff000d0) == 0x075000d0)
1444 return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi);
1445
1446 /* SBFX : cccc 0111 101x xxxx xxxx xxxx x101 xxxx : */
1447 /* UBFX : cccc 0111 111x xxxx xxxx xxxx x101 xxxx : */
1448 if ((insn & 0x0fa00070) == 0x07a00050)
1449 return prep_emulate_rd12rm0(insn, asi);
1450
1451 /* BFI : cccc 0111 110x xxxx xxxx xxxx x001 xxxx : */
1452 /* BFC : cccc 0111 110x xxxx xxxx xxxx x001 1111 : */
1453 if ((insn & 0x0fe00070) == 0x07c00010) {
1454
1455 if ((insn & 0x0000000f) == 0x0000000f)
1456 return prep_emulate_rd12_modify(insn, asi);
1457 else
1458 return prep_emulate_rd12rn0_modify(insn, asi);
1459 }
1460
1461 return INSN_REJECTED;
1462}
1463
1464static enum kprobe_insn __kprobes
1465space_cccc_01xx(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1466{
1467 /* LDR : cccc 01xx x0x1 xxxx xxxx xxxx xxxx xxxx */
1468 /* LDRB : cccc 01xx x1x1 xxxx xxxx xxxx xxxx xxxx */
1469 /* LDRBT : cccc 01x0 x111 xxxx xxxx xxxx xxxx xxxx */
1470 /* LDRT : cccc 01x0 x011 xxxx xxxx xxxx xxxx xxxx */
1471 /* STR : cccc 01xx x0x0 xxxx xxxx xxxx xxxx xxxx */
1472 /* STRB : cccc 01xx x1x0 xxxx xxxx xxxx xxxx xxxx */
1473 /* STRBT : cccc 01x0 x110 xxxx xxxx xxxx xxxx xxxx */
1474 /* STRT : cccc 01x0 x010 xxxx xxxx xxxx xxxx xxxx */
1475
1476 if ((insn & 0x00500000) == 0x00500000 && is_r15(insn, 12))
1477 return INSN_REJECTED; /* LDRB into PC */
1478
1479 return prep_emulate_ldr_str(insn, asi);
1480}
1481
1482static enum kprobe_insn __kprobes
1483space_cccc_100x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1484{
1485 /* LDM(2) : cccc 100x x101 xxxx 0xxx xxxx xxxx xxxx */
1486 /* LDM(3) : cccc 100x x1x1 xxxx 1xxx xxxx xxxx xxxx */
1487 if ((insn & 0x0e708000) == 0x85000000 ||
1488 (insn & 0x0e508000) == 0x85010000)
1489 return INSN_REJECTED;
1490
1491 /* LDM(1) : cccc 100x x0x1 xxxx xxxx xxxx xxxx xxxx */
1492 /* STM(1) : cccc 100x x0x0 xxxx xxxx xxxx xxxx xxxx */
1493 asi->insn_handler = ((insn & 0x108000) == 0x008000) ? /* STM & R15 */
1494 simulate_stm1_pc : simulate_ldm1stm1;
1495 return INSN_GOOD_NO_SLOT;
1496}
1497
1498static enum kprobe_insn __kprobes
1499space_cccc_101x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1500{
1501 /* B : cccc 1010 xxxx xxxx xxxx xxxx xxxx xxxx */
1502 /* BL : cccc 1011 xxxx xxxx xxxx xxxx xxxx xxxx */
1503 asi->insn_handler = simulate_bbl;
1504 return INSN_GOOD_NO_SLOT;
1505}
1506
1507static enum kprobe_insn __kprobes
1508space_cccc_11xx(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1509{
1510 /* Coprocessor instructions... */
1511 /* MCRR : cccc 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */
1512 /* MRRC : cccc 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */
1513 /* LDC : cccc 110x xxx1 xxxx xxxx xxxx xxxx xxxx */
1514 /* STC : cccc 110x xxx0 xxxx xxxx xxxx xxxx xxxx */
1515 /* CDP : cccc 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */
1516 /* MCR : cccc 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */
1517 /* MRC : cccc 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */
1518
1519 /* SVC : cccc 1111 xxxx xxxx xxxx xxxx xxxx xxxx */
1520
1521 return INSN_REJECTED;
1522}
1523
1524static unsigned long __kprobes __check_eq(unsigned long cpsr)
1525{
1526 return cpsr & PSR_Z_BIT;
1527}
1528
1529static unsigned long __kprobes __check_ne(unsigned long cpsr)
1530{
1531 return (~cpsr) & PSR_Z_BIT;
1532}
1533
1534static unsigned long __kprobes __check_cs(unsigned long cpsr)
1535{
1536 return cpsr & PSR_C_BIT;
1537}
1538
1539static unsigned long __kprobes __check_cc(unsigned long cpsr)
1540{
1541 return (~cpsr) & PSR_C_BIT;
1542}
1543
1544static unsigned long __kprobes __check_mi(unsigned long cpsr)
1545{
1546 return cpsr & PSR_N_BIT;
1547}
1548
1549static unsigned long __kprobes __check_pl(unsigned long cpsr)
1550{
1551 return (~cpsr) & PSR_N_BIT;
1552}
1553
1554static unsigned long __kprobes __check_vs(unsigned long cpsr)
1555{
1556 return cpsr & PSR_V_BIT;
1557}
1558
1559static unsigned long __kprobes __check_vc(unsigned long cpsr)
1560{
1561 return (~cpsr) & PSR_V_BIT;
1562}
1563
1564static unsigned long __kprobes __check_hi(unsigned long cpsr)
1565{
1566 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
1567 return cpsr & PSR_C_BIT;
1568}
1569
1570static unsigned long __kprobes __check_ls(unsigned long cpsr)
1571{
1572 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
1573 return (~cpsr) & PSR_C_BIT;
1574}
1575
1576static unsigned long __kprobes __check_ge(unsigned long cpsr)
1577{
1578 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
1579 return (~cpsr) & PSR_N_BIT;
1580}
1581
1582static unsigned long __kprobes __check_lt(unsigned long cpsr)
1583{
1584 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
1585 return cpsr & PSR_N_BIT;
1586}
1587
1588static unsigned long __kprobes __check_gt(unsigned long cpsr)
1589{
1590 unsigned long temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
1591 temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */
1592 return (~temp) & PSR_N_BIT;
1593}
1594
1595static unsigned long __kprobes __check_le(unsigned long cpsr)
1596{
1597 unsigned long temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
1598 temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */
1599 return temp & PSR_N_BIT;
1600}
1601
1602static unsigned long __kprobes __check_al(unsigned long cpsr)
1603{
1604 return true;
1605}
1606
1607static kprobe_check_cc * const condition_checks[16] = {
1608 &__check_eq, &__check_ne, &__check_cs, &__check_cc,
1609 &__check_mi, &__check_pl, &__check_vs, &__check_vc,
1610 &__check_hi, &__check_ls, &__check_ge, &__check_lt,
1611 &__check_gt, &__check_le, &__check_al, &__check_al
1612};
1613
1614/* Return:
1615 * INSN_REJECTED If instruction is one not allowed to kprobe,
1616 * INSN_GOOD If instruction is supported and uses instruction slot,
1617 * INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
1618 *
1619 * For instructions we don't want to kprobe (INSN_REJECTED return result):
1620 * These are generally ones that modify the processor state making
1621 * them "hard" to simulate such as switches processor modes or
1622 * make accesses in alternate modes. Any of these could be simulated
1623 * if the work was put into it, but low return considering they
1624 * should also be very rare.
1625 */
1626enum kprobe_insn __kprobes
1627arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1628{
1629 asi->insn_check_cc = condition_checks[insn>>28];
1630 asi->insn[1] = KPROBE_RETURN_INSTRUCTION;
1631
1632 if ((insn & 0xf0000000) == 0xf0000000)
1633
1634 return space_1111(insn, asi);
1635
1636 else if ((insn & 0x0e000000) == 0x00000000)
1637
1638 return space_cccc_000x(insn, asi);
1639
1640 else if ((insn & 0x0e000000) == 0x02000000)
1641
1642 return space_cccc_001x(insn, asi);
1643
1644 else if ((insn & 0x0f000010) == 0x06000010)
1645
1646 return space_cccc_0110__1(insn, asi);
1647
1648 else if ((insn & 0x0f000010) == 0x07000010)
1649
1650 return space_cccc_0111__1(insn, asi);
1651
1652 else if ((insn & 0x0c000000) == 0x04000000)
1653
1654 return space_cccc_01xx(insn, asi);
1655
1656 else if ((insn & 0x0e000000) == 0x08000000)
1657
1658 return space_cccc_100x(insn, asi);
1659
1660 else if ((insn & 0x0e000000) == 0x0a000000)
1661
1662 return space_cccc_101x(insn, asi);
1663
1664 return space_cccc_11xx(insn, asi);
1665}
1666
1667void __init arm_kprobe_decode_init(void)
1668{
1669 find_str_pc_offset();
1670}
diff --git a/arch/arm/kernel/kprobes-thumb.c b/arch/arm/kernel/kprobes-thumb.c
new file mode 100644
index 000000000000..902ca59e8b11
--- /dev/null
+++ b/arch/arm/kernel/kprobes-thumb.c
@@ -0,0 +1,1462 @@
1/*
2 * arch/arm/kernel/kprobes-thumb.c
3 *
4 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/kprobes.h>
13
14#include "kprobes.h"
15
16
17/*
18 * True if current instruction is in an IT block.
19 */
20#define in_it_block(cpsr) ((cpsr & 0x06000c00) != 0x00000000)
21
22/*
23 * Return the condition code to check for the currently executing instruction.
24 * This is in ITSTATE<7:4> which is in CPSR<15:12> but is only valid if
25 * in_it_block returns true.
26 */
27#define current_cond(cpsr) ((cpsr >> 12) & 0xf)
28
29/*
30 * Return the PC value for a probe in thumb code.
31 * This is the address of the probed instruction plus 4.
32 * We subtract one because the address will have bit zero set to indicate
33 * a pointer to thumb code.
34 */
35static inline unsigned long __kprobes thumb_probe_pc(struct kprobe *p)
36{
37 return (unsigned long)p->addr - 1 + 4;
38}
39
40static void __kprobes
41t32_simulate_table_branch(struct kprobe *p, struct pt_regs *regs)
42{
43 kprobe_opcode_t insn = p->opcode;
44 unsigned long pc = thumb_probe_pc(p);
45 int rn = (insn >> 16) & 0xf;
46 int rm = insn & 0xf;
47
48 unsigned long rnv = (rn == 15) ? pc : regs->uregs[rn];
49 unsigned long rmv = regs->uregs[rm];
50 unsigned int halfwords;
51
52 if (insn & 0x10) /* TBH */
53 halfwords = ((u16 *)rnv)[rmv];
54 else /* TBB */
55 halfwords = ((u8 *)rnv)[rmv];
56
57 regs->ARM_pc = pc + 2 * halfwords;
58}
59
60static void __kprobes
61t32_simulate_mrs(struct kprobe *p, struct pt_regs *regs)
62{
63 kprobe_opcode_t insn = p->opcode;
64 int rd = (insn >> 8) & 0xf;
65 unsigned long mask = 0xf8ff03df; /* Mask out execution state */
66 regs->uregs[rd] = regs->ARM_cpsr & mask;
67}
68
69static void __kprobes
70t32_simulate_cond_branch(struct kprobe *p, struct pt_regs *regs)
71{
72 kprobe_opcode_t insn = p->opcode;
73 unsigned long pc = thumb_probe_pc(p);
74
75 long offset = insn & 0x7ff; /* imm11 */
76 offset += (insn & 0x003f0000) >> 5; /* imm6 */
77 offset += (insn & 0x00002000) << 4; /* J1 */
78 offset += (insn & 0x00000800) << 7; /* J2 */
79 offset -= (insn & 0x04000000) >> 7; /* Apply sign bit */
80
81 regs->ARM_pc = pc + (offset * 2);
82}
83
84static enum kprobe_insn __kprobes
85t32_decode_cond_branch(kprobe_opcode_t insn, struct arch_specific_insn *asi)
86{
87 int cc = (insn >> 22) & 0xf;
88 asi->insn_check_cc = kprobe_condition_checks[cc];
89 asi->insn_handler = t32_simulate_cond_branch;
90 return INSN_GOOD_NO_SLOT;
91}
92
93static void __kprobes
94t32_simulate_branch(struct kprobe *p, struct pt_regs *regs)
95{
96 kprobe_opcode_t insn = p->opcode;
97 unsigned long pc = thumb_probe_pc(p);
98
99 long offset = insn & 0x7ff; /* imm11 */
100 offset += (insn & 0x03ff0000) >> 5; /* imm10 */
101 offset += (insn & 0x00002000) << 9; /* J1 */
102 offset += (insn & 0x00000800) << 10; /* J2 */
103 if (insn & 0x04000000)
104 offset -= 0x00800000; /* Apply sign bit */
105 else
106 offset ^= 0x00600000; /* Invert J1 and J2 */
107
108 if (insn & (1 << 14)) {
109 /* BL or BLX */
110 regs->ARM_lr = (unsigned long)p->addr + 4;
111 if (!(insn & (1 << 12))) {
112 /* BLX so switch to ARM mode */
113 regs->ARM_cpsr &= ~PSR_T_BIT;
114 pc &= ~3;
115 }
116 }
117
118 regs->ARM_pc = pc + (offset * 2);
119}
120
121static void __kprobes
122t32_simulate_ldr_literal(struct kprobe *p, struct pt_regs *regs)
123{
124 kprobe_opcode_t insn = p->opcode;
125 unsigned long addr = thumb_probe_pc(p) & ~3;
126 int rt = (insn >> 12) & 0xf;
127 unsigned long rtv;
128
129 long offset = insn & 0xfff;
130 if (insn & 0x00800000)
131 addr += offset;
132 else
133 addr -= offset;
134
135 if (insn & 0x00400000) {
136 /* LDR */
137 rtv = *(unsigned long *)addr;
138 if (rt == 15) {
139 bx_write_pc(rtv, regs);
140 return;
141 }
142 } else if (insn & 0x00200000) {
143 /* LDRH */
144 if (insn & 0x01000000)
145 rtv = *(s16 *)addr;
146 else
147 rtv = *(u16 *)addr;
148 } else {
149 /* LDRB */
150 if (insn & 0x01000000)
151 rtv = *(s8 *)addr;
152 else
153 rtv = *(u8 *)addr;
154 }
155
156 regs->uregs[rt] = rtv;
157}
158
159static enum kprobe_insn __kprobes
160t32_decode_ldmstm(kprobe_opcode_t insn, struct arch_specific_insn *asi)
161{
162 enum kprobe_insn ret = kprobe_decode_ldmstm(insn, asi);
163
164 /* Fixup modified instruction to have halfwords in correct order...*/
165 insn = asi->insn[0];
166 ((u16 *)asi->insn)[0] = insn >> 16;
167 ((u16 *)asi->insn)[1] = insn & 0xffff;
168
169 return ret;
170}
171
172static void __kprobes
173t32_emulate_ldrdstrd(struct kprobe *p, struct pt_regs *regs)
174{
175 kprobe_opcode_t insn = p->opcode;
176 unsigned long pc = thumb_probe_pc(p) & ~3;
177 int rt1 = (insn >> 12) & 0xf;
178 int rt2 = (insn >> 8) & 0xf;
179 int rn = (insn >> 16) & 0xf;
180
181 register unsigned long rt1v asm("r0") = regs->uregs[rt1];
182 register unsigned long rt2v asm("r1") = regs->uregs[rt2];
183 register unsigned long rnv asm("r2") = (rn == 15) ? pc
184 : regs->uregs[rn];
185
186 __asm__ __volatile__ (
187 "blx %[fn]"
188 : "=r" (rt1v), "=r" (rt2v), "=r" (rnv)
189 : "0" (rt1v), "1" (rt2v), "2" (rnv), [fn] "r" (p->ainsn.insn_fn)
190 : "lr", "memory", "cc"
191 );
192
193 if (rn != 15)
194 regs->uregs[rn] = rnv; /* Writeback base register */
195 regs->uregs[rt1] = rt1v;
196 regs->uregs[rt2] = rt2v;
197}
198
199static void __kprobes
200t32_emulate_ldrstr(struct kprobe *p, struct pt_regs *regs)
201{
202 kprobe_opcode_t insn = p->opcode;
203 int rt = (insn >> 12) & 0xf;
204 int rn = (insn >> 16) & 0xf;
205 int rm = insn & 0xf;
206
207 register unsigned long rtv asm("r0") = regs->uregs[rt];
208 register unsigned long rnv asm("r2") = regs->uregs[rn];
209 register unsigned long rmv asm("r3") = regs->uregs[rm];
210
211 __asm__ __volatile__ (
212 "blx %[fn]"
213 : "=r" (rtv), "=r" (rnv)
214 : "0" (rtv), "1" (rnv), "r" (rmv), [fn] "r" (p->ainsn.insn_fn)
215 : "lr", "memory", "cc"
216 );
217
218 regs->uregs[rn] = rnv; /* Writeback base register */
219 if (rt == 15) /* Can't be true for a STR as they aren't allowed */
220 bx_write_pc(rtv, regs);
221 else
222 regs->uregs[rt] = rtv;
223}
224
225static void __kprobes
226t32_emulate_rd8rn16rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
227{
228 kprobe_opcode_t insn = p->opcode;
229 int rd = (insn >> 8) & 0xf;
230 int rn = (insn >> 16) & 0xf;
231 int rm = insn & 0xf;
232
233 register unsigned long rdv asm("r1") = regs->uregs[rd];
234 register unsigned long rnv asm("r2") = regs->uregs[rn];
235 register unsigned long rmv asm("r3") = regs->uregs[rm];
236 unsigned long cpsr = regs->ARM_cpsr;
237
238 __asm__ __volatile__ (
239 "msr cpsr_fs, %[cpsr] \n\t"
240 "blx %[fn] \n\t"
241 "mrs %[cpsr], cpsr \n\t"
242 : "=r" (rdv), [cpsr] "=r" (cpsr)
243 : "0" (rdv), "r" (rnv), "r" (rmv),
244 "1" (cpsr), [fn] "r" (p->ainsn.insn_fn)
245 : "lr", "memory", "cc"
246 );
247
248 regs->uregs[rd] = rdv;
249 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
250}
251
252static void __kprobes
253t32_emulate_rd8pc16_noflags(struct kprobe *p, struct pt_regs *regs)
254{
255 kprobe_opcode_t insn = p->opcode;
256 unsigned long pc = thumb_probe_pc(p);
257 int rd = (insn >> 8) & 0xf;
258
259 register unsigned long rdv asm("r1") = regs->uregs[rd];
260 register unsigned long rnv asm("r2") = pc & ~3;
261
262 __asm__ __volatile__ (
263 "blx %[fn]"
264 : "=r" (rdv)
265 : "0" (rdv), "r" (rnv), [fn] "r" (p->ainsn.insn_fn)
266 : "lr", "memory", "cc"
267 );
268
269 regs->uregs[rd] = rdv;
270}
271
272static void __kprobes
273t32_emulate_rd8rn16_noflags(struct kprobe *p, struct pt_regs *regs)
274{
275 kprobe_opcode_t insn = p->opcode;
276 int rd = (insn >> 8) & 0xf;
277 int rn = (insn >> 16) & 0xf;
278
279 register unsigned long rdv asm("r1") = regs->uregs[rd];
280 register unsigned long rnv asm("r2") = regs->uregs[rn];
281
282 __asm__ __volatile__ (
283 "blx %[fn]"
284 : "=r" (rdv)
285 : "0" (rdv), "r" (rnv), [fn] "r" (p->ainsn.insn_fn)
286 : "lr", "memory", "cc"
287 );
288
289 regs->uregs[rd] = rdv;
290}
291
292static void __kprobes
293t32_emulate_rdlo12rdhi8rn16rm0_noflags(struct kprobe *p, struct pt_regs *regs)
294{
295 kprobe_opcode_t insn = p->opcode;
296 int rdlo = (insn >> 12) & 0xf;
297 int rdhi = (insn >> 8) & 0xf;
298 int rn = (insn >> 16) & 0xf;
299 int rm = insn & 0xf;
300
301 register unsigned long rdlov asm("r0") = regs->uregs[rdlo];
302 register unsigned long rdhiv asm("r1") = regs->uregs[rdhi];
303 register unsigned long rnv asm("r2") = regs->uregs[rn];
304 register unsigned long rmv asm("r3") = regs->uregs[rm];
305
306 __asm__ __volatile__ (
307 "blx %[fn]"
308 : "=r" (rdlov), "=r" (rdhiv)
309 : "0" (rdlov), "1" (rdhiv), "r" (rnv), "r" (rmv),
310 [fn] "r" (p->ainsn.insn_fn)
311 : "lr", "memory", "cc"
312 );
313
314 regs->uregs[rdlo] = rdlov;
315 regs->uregs[rdhi] = rdhiv;
316}
317
318/* These emulation encodings are functionally equivalent... */
319#define t32_emulate_rd8rn16rm0ra12_noflags \
320 t32_emulate_rdlo12rdhi8rn16rm0_noflags
321
322static const union decode_item t32_table_1110_100x_x0xx[] = {
323 /* Load/store multiple instructions */
324
325 /* Rn is PC 1110 100x x0xx 1111 xxxx xxxx xxxx xxxx */
326 DECODE_REJECT (0xfe4f0000, 0xe80f0000),
327
328 /* SRS 1110 1000 00x0 xxxx xxxx xxxx xxxx xxxx */
329 /* RFE 1110 1000 00x1 xxxx xxxx xxxx xxxx xxxx */
330 DECODE_REJECT (0xffc00000, 0xe8000000),
331 /* SRS 1110 1001 10x0 xxxx xxxx xxxx xxxx xxxx */
332 /* RFE 1110 1001 10x1 xxxx xxxx xxxx xxxx xxxx */
333 DECODE_REJECT (0xffc00000, 0xe9800000),
334
335 /* STM Rn, {...pc} 1110 100x x0x0 xxxx 1xxx xxxx xxxx xxxx */
336 DECODE_REJECT (0xfe508000, 0xe8008000),
337 /* LDM Rn, {...lr,pc} 1110 100x x0x1 xxxx 11xx xxxx xxxx xxxx */
338 DECODE_REJECT (0xfe50c000, 0xe810c000),
339 /* LDM/STM Rn, {...sp} 1110 100x x0xx xxxx xx1x xxxx xxxx xxxx */
340 DECODE_REJECT (0xfe402000, 0xe8002000),
341
342 /* STMIA 1110 1000 10x0 xxxx xxxx xxxx xxxx xxxx */
343 /* LDMIA 1110 1000 10x1 xxxx xxxx xxxx xxxx xxxx */
344 /* STMDB 1110 1001 00x0 xxxx xxxx xxxx xxxx xxxx */
345 /* LDMDB 1110 1001 00x1 xxxx xxxx xxxx xxxx xxxx */
346 DECODE_CUSTOM (0xfe400000, 0xe8000000, t32_decode_ldmstm),
347
348 DECODE_END
349};
350
351static const union decode_item t32_table_1110_100x_x1xx[] = {
352 /* Load/store dual, load/store exclusive, table branch */
353
354 /* STRD (immediate) 1110 1000 x110 xxxx xxxx xxxx xxxx xxxx */
355 /* LDRD (immediate) 1110 1000 x111 xxxx xxxx xxxx xxxx xxxx */
356 DECODE_OR (0xff600000, 0xe8600000),
357 /* STRD (immediate) 1110 1001 x1x0 xxxx xxxx xxxx xxxx xxxx */
358 /* LDRD (immediate) 1110 1001 x1x1 xxxx xxxx xxxx xxxx xxxx */
359 DECODE_EMULATEX (0xff400000, 0xe9400000, t32_emulate_ldrdstrd,
360 REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)),
361
362 /* TBB 1110 1000 1101 xxxx xxxx xxxx 0000 xxxx */
363 /* TBH 1110 1000 1101 xxxx xxxx xxxx 0001 xxxx */
364 DECODE_SIMULATEX(0xfff000e0, 0xe8d00000, t32_simulate_table_branch,
365 REGS(NOSP, 0, 0, 0, NOSPPC)),
366
367 /* STREX 1110 1000 0100 xxxx xxxx xxxx xxxx xxxx */
368 /* LDREX 1110 1000 0101 xxxx xxxx xxxx xxxx xxxx */
369 /* STREXB 1110 1000 1100 xxxx xxxx xxxx 0100 xxxx */
370 /* STREXH 1110 1000 1100 xxxx xxxx xxxx 0101 xxxx */
371 /* STREXD 1110 1000 1100 xxxx xxxx xxxx 0111 xxxx */
372 /* LDREXB 1110 1000 1101 xxxx xxxx xxxx 0100 xxxx */
373 /* LDREXH 1110 1000 1101 xxxx xxxx xxxx 0101 xxxx */
374 /* LDREXD 1110 1000 1101 xxxx xxxx xxxx 0111 xxxx */
375 /* And unallocated instructions... */
376 DECODE_END
377};
378
379static const union decode_item t32_table_1110_101x[] = {
380 /* Data-processing (shifted register) */
381
382 /* TST 1110 1010 0001 xxxx xxxx 1111 xxxx xxxx */
383 /* TEQ 1110 1010 1001 xxxx xxxx 1111 xxxx xxxx */
384 DECODE_EMULATEX (0xff700f00, 0xea100f00, t32_emulate_rd8rn16rm0_rwflags,
385 REGS(NOSPPC, 0, 0, 0, NOSPPC)),
386
387 /* CMN 1110 1011 0001 xxxx xxxx 1111 xxxx xxxx */
388 DECODE_OR (0xfff00f00, 0xeb100f00),
389 /* CMP 1110 1011 1011 xxxx xxxx 1111 xxxx xxxx */
390 DECODE_EMULATEX (0xfff00f00, 0xebb00f00, t32_emulate_rd8rn16rm0_rwflags,
391 REGS(NOPC, 0, 0, 0, NOSPPC)),
392
393 /* MOV 1110 1010 010x 1111 xxxx xxxx xxxx xxxx */
394 /* MVN 1110 1010 011x 1111 xxxx xxxx xxxx xxxx */
395 DECODE_EMULATEX (0xffcf0000, 0xea4f0000, t32_emulate_rd8rn16rm0_rwflags,
396 REGS(0, 0, NOSPPC, 0, NOSPPC)),
397
398 /* ??? 1110 1010 101x xxxx xxxx xxxx xxxx xxxx */
399 /* ??? 1110 1010 111x xxxx xxxx xxxx xxxx xxxx */
400 DECODE_REJECT (0xffa00000, 0xeaa00000),
401 /* ??? 1110 1011 001x xxxx xxxx xxxx xxxx xxxx */
402 DECODE_REJECT (0xffe00000, 0xeb200000),
403 /* ??? 1110 1011 100x xxxx xxxx xxxx xxxx xxxx */
404 DECODE_REJECT (0xffe00000, 0xeb800000),
405 /* ??? 1110 1011 111x xxxx xxxx xxxx xxxx xxxx */
406 DECODE_REJECT (0xffe00000, 0xebe00000),
407
408 /* ADD/SUB SP, SP, Rm, LSL #0..3 */
409 /* 1110 1011 x0xx 1101 x000 1101 xx00 xxxx */
410 DECODE_EMULATEX (0xff4f7f30, 0xeb0d0d00, t32_emulate_rd8rn16rm0_rwflags,
411 REGS(SP, 0, SP, 0, NOSPPC)),
412
413 /* ADD/SUB SP, SP, Rm, shift */
414 /* 1110 1011 x0xx 1101 xxxx 1101 xxxx xxxx */
415 DECODE_REJECT (0xff4f0f00, 0xeb0d0d00),
416
417 /* ADD/SUB Rd, SP, Rm, shift */
418 /* 1110 1011 x0xx 1101 xxxx xxxx xxxx xxxx */
419 DECODE_EMULATEX (0xff4f0000, 0xeb0d0000, t32_emulate_rd8rn16rm0_rwflags,
420 REGS(SP, 0, NOPC, 0, NOSPPC)),
421
422 /* AND 1110 1010 000x xxxx xxxx xxxx xxxx xxxx */
423 /* BIC 1110 1010 001x xxxx xxxx xxxx xxxx xxxx */
424 /* ORR 1110 1010 010x xxxx xxxx xxxx xxxx xxxx */
425 /* ORN 1110 1010 011x xxxx xxxx xxxx xxxx xxxx */
426 /* EOR 1110 1010 100x xxxx xxxx xxxx xxxx xxxx */
427 /* PKH 1110 1010 110x xxxx xxxx xxxx xxxx xxxx */
428 /* ADD 1110 1011 000x xxxx xxxx xxxx xxxx xxxx */
429 /* ADC 1110 1011 010x xxxx xxxx xxxx xxxx xxxx */
430 /* SBC 1110 1011 011x xxxx xxxx xxxx xxxx xxxx */
431 /* SUB 1110 1011 101x xxxx xxxx xxxx xxxx xxxx */
432 /* RSB 1110 1011 110x xxxx xxxx xxxx xxxx xxxx */
433 DECODE_EMULATEX (0xfe000000, 0xea000000, t32_emulate_rd8rn16rm0_rwflags,
434 REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
435
436 DECODE_END
437};
438
439static const union decode_item t32_table_1111_0x0x___0[] = {
440 /* Data-processing (modified immediate) */
441
442 /* TST 1111 0x00 0001 xxxx 0xxx 1111 xxxx xxxx */
443 /* TEQ 1111 0x00 1001 xxxx 0xxx 1111 xxxx xxxx */
444 DECODE_EMULATEX (0xfb708f00, 0xf0100f00, t32_emulate_rd8rn16rm0_rwflags,
445 REGS(NOSPPC, 0, 0, 0, 0)),
446
447 /* CMN 1111 0x01 0001 xxxx 0xxx 1111 xxxx xxxx */
448 DECODE_OR (0xfbf08f00, 0xf1100f00),
449 /* CMP 1111 0x01 1011 xxxx 0xxx 1111 xxxx xxxx */
450 DECODE_EMULATEX (0xfbf08f00, 0xf1b00f00, t32_emulate_rd8rn16rm0_rwflags,
451 REGS(NOPC, 0, 0, 0, 0)),
452
453 /* MOV 1111 0x00 010x 1111 0xxx xxxx xxxx xxxx */
454 /* MVN 1111 0x00 011x 1111 0xxx xxxx xxxx xxxx */
455 DECODE_EMULATEX (0xfbcf8000, 0xf04f0000, t32_emulate_rd8rn16rm0_rwflags,
456 REGS(0, 0, NOSPPC, 0, 0)),
457
458 /* ??? 1111 0x00 101x xxxx 0xxx xxxx xxxx xxxx */
459 DECODE_REJECT (0xfbe08000, 0xf0a00000),
460 /* ??? 1111 0x00 110x xxxx 0xxx xxxx xxxx xxxx */
461 /* ??? 1111 0x00 111x xxxx 0xxx xxxx xxxx xxxx */
462 DECODE_REJECT (0xfbc08000, 0xf0c00000),
463 /* ??? 1111 0x01 001x xxxx 0xxx xxxx xxxx xxxx */
464 DECODE_REJECT (0xfbe08000, 0xf1200000),
465 /* ??? 1111 0x01 100x xxxx 0xxx xxxx xxxx xxxx */
466 DECODE_REJECT (0xfbe08000, 0xf1800000),
467 /* ??? 1111 0x01 111x xxxx 0xxx xxxx xxxx xxxx */
468 DECODE_REJECT (0xfbe08000, 0xf1e00000),
469
470 /* ADD Rd, SP, #imm 1111 0x01 000x 1101 0xxx xxxx xxxx xxxx */
471 /* SUB Rd, SP, #imm 1111 0x01 101x 1101 0xxx xxxx xxxx xxxx */
472 DECODE_EMULATEX (0xfb4f8000, 0xf10d0000, t32_emulate_rd8rn16rm0_rwflags,
473 REGS(SP, 0, NOPC, 0, 0)),
474
475 /* AND 1111 0x00 000x xxxx 0xxx xxxx xxxx xxxx */
476 /* BIC 1111 0x00 001x xxxx 0xxx xxxx xxxx xxxx */
477 /* ORR 1111 0x00 010x xxxx 0xxx xxxx xxxx xxxx */
478 /* ORN 1111 0x00 011x xxxx 0xxx xxxx xxxx xxxx */
479 /* EOR 1111 0x00 100x xxxx 0xxx xxxx xxxx xxxx */
480 /* ADD 1111 0x01 000x xxxx 0xxx xxxx xxxx xxxx */
481 /* ADC 1111 0x01 010x xxxx 0xxx xxxx xxxx xxxx */
482 /* SBC 1111 0x01 011x xxxx 0xxx xxxx xxxx xxxx */
483 /* SUB 1111 0x01 101x xxxx 0xxx xxxx xxxx xxxx */
484 /* RSB 1111 0x01 110x xxxx 0xxx xxxx xxxx xxxx */
485 DECODE_EMULATEX (0xfa008000, 0xf0000000, t32_emulate_rd8rn16rm0_rwflags,
486 REGS(NOSPPC, 0, NOSPPC, 0, 0)),
487
488 DECODE_END
489};
490
491static const union decode_item t32_table_1111_0x1x___0[] = {
492 /* Data-processing (plain binary immediate) */
493
494 /* ADDW Rd, PC, #imm 1111 0x10 0000 1111 0xxx xxxx xxxx xxxx */
495 DECODE_OR (0xfbff8000, 0xf20f0000),
496 /* SUBW Rd, PC, #imm 1111 0x10 1010 1111 0xxx xxxx xxxx xxxx */
497 DECODE_EMULATEX (0xfbff8000, 0xf2af0000, t32_emulate_rd8pc16_noflags,
498 REGS(PC, 0, NOSPPC, 0, 0)),
499
500 /* ADDW SP, SP, #imm 1111 0x10 0000 1101 0xxx 1101 xxxx xxxx */
501 DECODE_OR (0xfbff8f00, 0xf20d0d00),
502 /* SUBW SP, SP, #imm 1111 0x10 1010 1101 0xxx 1101 xxxx xxxx */
503 DECODE_EMULATEX (0xfbff8f00, 0xf2ad0d00, t32_emulate_rd8rn16_noflags,
504 REGS(SP, 0, SP, 0, 0)),
505
506 /* ADDW 1111 0x10 0000 xxxx 0xxx xxxx xxxx xxxx */
507 DECODE_OR (0xfbf08000, 0xf2000000),
508 /* SUBW 1111 0x10 1010 xxxx 0xxx xxxx xxxx xxxx */
509 DECODE_EMULATEX (0xfbf08000, 0xf2a00000, t32_emulate_rd8rn16_noflags,
510 REGS(NOPCX, 0, NOSPPC, 0, 0)),
511
512 /* MOVW 1111 0x10 0100 xxxx 0xxx xxxx xxxx xxxx */
513 /* MOVT 1111 0x10 1100 xxxx 0xxx xxxx xxxx xxxx */
514 DECODE_EMULATEX (0xfb708000, 0xf2400000, t32_emulate_rd8rn16_noflags,
515 REGS(0, 0, NOSPPC, 0, 0)),
516
517 /* SSAT16 1111 0x11 0010 xxxx 0000 xxxx 00xx xxxx */
518 /* SSAT 1111 0x11 00x0 xxxx 0xxx xxxx xxxx xxxx */
519 /* USAT16 1111 0x11 1010 xxxx 0000 xxxx 00xx xxxx */
520 /* USAT 1111 0x11 10x0 xxxx 0xxx xxxx xxxx xxxx */
521 DECODE_EMULATEX (0xfb508000, 0xf3000000, t32_emulate_rd8rn16rm0_rwflags,
522 REGS(NOSPPC, 0, NOSPPC, 0, 0)),
523
524 /* SFBX 1111 0x11 0100 xxxx 0xxx xxxx xxxx xxxx */
525 /* UFBX 1111 0x11 1100 xxxx 0xxx xxxx xxxx xxxx */
526 DECODE_EMULATEX (0xfb708000, 0xf3400000, t32_emulate_rd8rn16_noflags,
527 REGS(NOSPPC, 0, NOSPPC, 0, 0)),
528
529 /* BFC 1111 0x11 0110 1111 0xxx xxxx xxxx xxxx */
530 DECODE_EMULATEX (0xfbff8000, 0xf36f0000, t32_emulate_rd8rn16_noflags,
531 REGS(0, 0, NOSPPC, 0, 0)),
532
533 /* BFI 1111 0x11 0110 xxxx 0xxx xxxx xxxx xxxx */
534 DECODE_EMULATEX (0xfbf08000, 0xf3600000, t32_emulate_rd8rn16_noflags,
535 REGS(NOSPPCX, 0, NOSPPC, 0, 0)),
536
537 DECODE_END
538};
539
540static const union decode_item t32_table_1111_0xxx___1[] = {
541 /* Branches and miscellaneous control */
542
543 /* YIELD 1111 0011 1010 xxxx 10x0 x000 0000 0001 */
544 DECODE_OR (0xfff0d7ff, 0xf3a08001),
545 /* SEV 1111 0011 1010 xxxx 10x0 x000 0000 0100 */
546 DECODE_EMULATE (0xfff0d7ff, 0xf3a08004, kprobe_emulate_none),
547 /* NOP 1111 0011 1010 xxxx 10x0 x000 0000 0000 */
548 /* WFE 1111 0011 1010 xxxx 10x0 x000 0000 0010 */
549 /* WFI 1111 0011 1010 xxxx 10x0 x000 0000 0011 */
550 DECODE_SIMULATE (0xfff0d7fc, 0xf3a08000, kprobe_simulate_nop),
551
552 /* MRS Rd, CPSR 1111 0011 1110 xxxx 10x0 xxxx xxxx xxxx */
553 DECODE_SIMULATEX(0xfff0d000, 0xf3e08000, t32_simulate_mrs,
554 REGS(0, 0, NOSPPC, 0, 0)),
555
556 /*
557 * Unsupported instructions
558 * 1111 0x11 1xxx xxxx 10x0 xxxx xxxx xxxx
559 *
560 * MSR 1111 0011 100x xxxx 10x0 xxxx xxxx xxxx
561 * DBG hint 1111 0011 1010 xxxx 10x0 x000 1111 xxxx
562 * Unallocated hints 1111 0011 1010 xxxx 10x0 x000 xxxx xxxx
563 * CPS 1111 0011 1010 xxxx 10x0 xxxx xxxx xxxx
564 * CLREX/DSB/DMB/ISB 1111 0011 1011 xxxx 10x0 xxxx xxxx xxxx
565 * BXJ 1111 0011 1100 xxxx 10x0 xxxx xxxx xxxx
566 * SUBS PC,LR,#<imm8> 1111 0011 1101 xxxx 10x0 xxxx xxxx xxxx
567 * MRS Rd, SPSR 1111 0011 1111 xxxx 10x0 xxxx xxxx xxxx
568 * SMC 1111 0111 1111 xxxx 1000 xxxx xxxx xxxx
569 * UNDEFINED 1111 0111 1111 xxxx 1010 xxxx xxxx xxxx
570 * ??? 1111 0111 1xxx xxxx 1010 xxxx xxxx xxxx
571 */
572 DECODE_REJECT (0xfb80d000, 0xf3808000),
573
574 /* Bcc 1111 0xxx xxxx xxxx 10x0 xxxx xxxx xxxx */
575 DECODE_CUSTOM (0xf800d000, 0xf0008000, t32_decode_cond_branch),
576
577 /* BLX 1111 0xxx xxxx xxxx 11x0 xxxx xxxx xxx0 */
578 DECODE_OR (0xf800d001, 0xf000c000),
579 /* B 1111 0xxx xxxx xxxx 10x1 xxxx xxxx xxxx */
580 /* BL 1111 0xxx xxxx xxxx 11x1 xxxx xxxx xxxx */
581 DECODE_SIMULATE (0xf8009000, 0xf0009000, t32_simulate_branch),
582
583 DECODE_END
584};
585
586static const union decode_item t32_table_1111_100x_x0x1__1111[] = {
587 /* Memory hints */
588
589 /* PLD (literal) 1111 1000 x001 1111 1111 xxxx xxxx xxxx */
590 /* PLI (literal) 1111 1001 x001 1111 1111 xxxx xxxx xxxx */
591 DECODE_SIMULATE (0xfe7ff000, 0xf81ff000, kprobe_simulate_nop),
592
593 /* PLD{W} (immediate) 1111 1000 10x1 xxxx 1111 xxxx xxxx xxxx */
594 DECODE_OR (0xffd0f000, 0xf890f000),
595 /* PLD{W} (immediate) 1111 1000 00x1 xxxx 1111 1100 xxxx xxxx */
596 DECODE_OR (0xffd0ff00, 0xf810fc00),
597 /* PLI (immediate) 1111 1001 1001 xxxx 1111 xxxx xxxx xxxx */
598 DECODE_OR (0xfff0f000, 0xf990f000),
599 /* PLI (immediate) 1111 1001 0001 xxxx 1111 1100 xxxx xxxx */
600 DECODE_SIMULATEX(0xfff0ff00, 0xf910fc00, kprobe_simulate_nop,
601 REGS(NOPCX, 0, 0, 0, 0)),
602
603 /* PLD{W} (register) 1111 1000 00x1 xxxx 1111 0000 00xx xxxx */
604 DECODE_OR (0xffd0ffc0, 0xf810f000),
605 /* PLI (register) 1111 1001 0001 xxxx 1111 0000 00xx xxxx */
606 DECODE_SIMULATEX(0xfff0ffc0, 0xf910f000, kprobe_simulate_nop,
607 REGS(NOPCX, 0, 0, 0, NOSPPC)),
608
609 /* Other unallocated instructions... */
610 DECODE_END
611};
612
613static const union decode_item t32_table_1111_100x[] = {
614 /* Store/Load single data item */
615
616 /* ??? 1111 100x x11x xxxx xxxx xxxx xxxx xxxx */
617 DECODE_REJECT (0xfe600000, 0xf8600000),
618
619 /* ??? 1111 1001 0101 xxxx xxxx xxxx xxxx xxxx */
620 DECODE_REJECT (0xfff00000, 0xf9500000),
621
622 /* ??? 1111 100x 0xxx xxxx xxxx 10x0 xxxx xxxx */
623 DECODE_REJECT (0xfe800d00, 0xf8000800),
624
625 /* STRBT 1111 1000 0000 xxxx xxxx 1110 xxxx xxxx */
626 /* STRHT 1111 1000 0010 xxxx xxxx 1110 xxxx xxxx */
627 /* STRT 1111 1000 0100 xxxx xxxx 1110 xxxx xxxx */
628 /* LDRBT 1111 1000 0001 xxxx xxxx 1110 xxxx xxxx */
629 /* LDRSBT 1111 1001 0001 xxxx xxxx 1110 xxxx xxxx */
630 /* LDRHT 1111 1000 0011 xxxx xxxx 1110 xxxx xxxx */
631 /* LDRSHT 1111 1001 0011 xxxx xxxx 1110 xxxx xxxx */
632 /* LDRT 1111 1000 0101 xxxx xxxx 1110 xxxx xxxx */
633 DECODE_REJECT (0xfe800f00, 0xf8000e00),
634
635 /* STR{,B,H} Rn,[PC...] 1111 1000 xxx0 1111 xxxx xxxx xxxx xxxx */
636 DECODE_REJECT (0xff1f0000, 0xf80f0000),
637
638 /* STR{,B,H} PC,[Rn...] 1111 1000 xxx0 xxxx 1111 xxxx xxxx xxxx */
639 DECODE_REJECT (0xff10f000, 0xf800f000),
640
641 /* LDR (literal) 1111 1000 x101 1111 xxxx xxxx xxxx xxxx */
642 DECODE_SIMULATEX(0xff7f0000, 0xf85f0000, t32_simulate_ldr_literal,
643 REGS(PC, ANY, 0, 0, 0)),
644
645 /* STR (immediate) 1111 1000 0100 xxxx xxxx 1xxx xxxx xxxx */
646 /* LDR (immediate) 1111 1000 0101 xxxx xxxx 1xxx xxxx xxxx */
647 DECODE_OR (0xffe00800, 0xf8400800),
648 /* STR (immediate) 1111 1000 1100 xxxx xxxx xxxx xxxx xxxx */
649 /* LDR (immediate) 1111 1000 1101 xxxx xxxx xxxx xxxx xxxx */
650 DECODE_EMULATEX (0xffe00000, 0xf8c00000, t32_emulate_ldrstr,
651 REGS(NOPCX, ANY, 0, 0, 0)),
652
653 /* STR (register) 1111 1000 0100 xxxx xxxx 0000 00xx xxxx */
654 /* LDR (register) 1111 1000 0101 xxxx xxxx 0000 00xx xxxx */
655 DECODE_EMULATEX (0xffe00fc0, 0xf8400000, t32_emulate_ldrstr,
656 REGS(NOPCX, ANY, 0, 0, NOSPPC)),
657
658 /* LDRB (literal) 1111 1000 x001 1111 xxxx xxxx xxxx xxxx */
659 /* LDRSB (literal) 1111 1001 x001 1111 xxxx xxxx xxxx xxxx */
660 /* LDRH (literal) 1111 1000 x011 1111 xxxx xxxx xxxx xxxx */
661 /* LDRSH (literal) 1111 1001 x011 1111 xxxx xxxx xxxx xxxx */
662 DECODE_EMULATEX (0xfe5f0000, 0xf81f0000, t32_simulate_ldr_literal,
663 REGS(PC, NOSPPCX, 0, 0, 0)),
664
665 /* STRB (immediate) 1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */
666 /* STRH (immediate) 1111 1000 0010 xxxx xxxx 1xxx xxxx xxxx */
667 /* LDRB (immediate) 1111 1000 0001 xxxx xxxx 1xxx xxxx xxxx */
668 /* LDRSB (immediate) 1111 1001 0001 xxxx xxxx 1xxx xxxx xxxx */
669 /* LDRH (immediate) 1111 1000 0011 xxxx xxxx 1xxx xxxx xxxx */
670 /* LDRSH (immediate) 1111 1001 0011 xxxx xxxx 1xxx xxxx xxxx */
671 DECODE_OR (0xfec00800, 0xf8000800),
672 /* STRB (immediate) 1111 1000 1000 xxxx xxxx xxxx xxxx xxxx */
673 /* STRH (immediate) 1111 1000 1010 xxxx xxxx xxxx xxxx xxxx */
674 /* LDRB (immediate) 1111 1000 1001 xxxx xxxx xxxx xxxx xxxx */
675 /* LDRSB (immediate) 1111 1001 1001 xxxx xxxx xxxx xxxx xxxx */
676 /* LDRH (immediate) 1111 1000 1011 xxxx xxxx xxxx xxxx xxxx */
677 /* LDRSH (immediate) 1111 1001 1011 xxxx xxxx xxxx xxxx xxxx */
678 DECODE_EMULATEX (0xfec00000, 0xf8800000, t32_emulate_ldrstr,
679 REGS(NOPCX, NOSPPCX, 0, 0, 0)),
680
681 /* STRB (register) 1111 1000 0000 xxxx xxxx 0000 00xx xxxx */
682 /* STRH (register) 1111 1000 0010 xxxx xxxx 0000 00xx xxxx */
683 /* LDRB (register) 1111 1000 0001 xxxx xxxx 0000 00xx xxxx */
684 /* LDRSB (register) 1111 1001 0001 xxxx xxxx 0000 00xx xxxx */
685 /* LDRH (register) 1111 1000 0011 xxxx xxxx 0000 00xx xxxx */
686 /* LDRSH (register) 1111 1001 0011 xxxx xxxx 0000 00xx xxxx */
687 DECODE_EMULATEX (0xfe800fc0, 0xf8000000, t32_emulate_ldrstr,
688 REGS(NOPCX, NOSPPCX, 0, 0, NOSPPC)),
689
690 /* Other unallocated instructions... */
691 DECODE_END
692};
693
694static const union decode_item t32_table_1111_1010___1111[] = {
695 /* Data-processing (register) */
696
697 /* ??? 1111 1010 011x xxxx 1111 xxxx 1xxx xxxx */
698 DECODE_REJECT (0xffe0f080, 0xfa60f080),
699
700 /* SXTH 1111 1010 0000 1111 1111 xxxx 1xxx xxxx */
701 /* UXTH 1111 1010 0001 1111 1111 xxxx 1xxx xxxx */
702 /* SXTB16 1111 1010 0010 1111 1111 xxxx 1xxx xxxx */
703 /* UXTB16 1111 1010 0011 1111 1111 xxxx 1xxx xxxx */
704 /* SXTB 1111 1010 0100 1111 1111 xxxx 1xxx xxxx */
705 /* UXTB 1111 1010 0101 1111 1111 xxxx 1xxx xxxx */
706 DECODE_EMULATEX (0xff8ff080, 0xfa0ff080, t32_emulate_rd8rn16rm0_rwflags,
707 REGS(0, 0, NOSPPC, 0, NOSPPC)),
708
709
710 /* ??? 1111 1010 1xxx xxxx 1111 xxxx 0x11 xxxx */
711 DECODE_REJECT (0xff80f0b0, 0xfa80f030),
712 /* ??? 1111 1010 1x11 xxxx 1111 xxxx 0xxx xxxx */
713 DECODE_REJECT (0xffb0f080, 0xfab0f000),
714
715 /* SADD16 1111 1010 1001 xxxx 1111 xxxx 0000 xxxx */
716 /* SASX 1111 1010 1010 xxxx 1111 xxxx 0000 xxxx */
717 /* SSAX 1111 1010 1110 xxxx 1111 xxxx 0000 xxxx */
718 /* SSUB16 1111 1010 1101 xxxx 1111 xxxx 0000 xxxx */
719 /* SADD8 1111 1010 1000 xxxx 1111 xxxx 0000 xxxx */
720 /* SSUB8 1111 1010 1100 xxxx 1111 xxxx 0000 xxxx */
721
722 /* QADD16 1111 1010 1001 xxxx 1111 xxxx 0001 xxxx */
723 /* QASX 1111 1010 1010 xxxx 1111 xxxx 0001 xxxx */
724 /* QSAX 1111 1010 1110 xxxx 1111 xxxx 0001 xxxx */
725 /* QSUB16 1111 1010 1101 xxxx 1111 xxxx 0001 xxxx */
726 /* QADD8 1111 1010 1000 xxxx 1111 xxxx 0001 xxxx */
727 /* QSUB8 1111 1010 1100 xxxx 1111 xxxx 0001 xxxx */
728
729 /* SHADD16 1111 1010 1001 xxxx 1111 xxxx 0010 xxxx */
730 /* SHASX 1111 1010 1010 xxxx 1111 xxxx 0010 xxxx */
731 /* SHSAX 1111 1010 1110 xxxx 1111 xxxx 0010 xxxx */
732 /* SHSUB16 1111 1010 1101 xxxx 1111 xxxx 0010 xxxx */
733 /* SHADD8 1111 1010 1000 xxxx 1111 xxxx 0010 xxxx */
734 /* SHSUB8 1111 1010 1100 xxxx 1111 xxxx 0010 xxxx */
735
736 /* UADD16 1111 1010 1001 xxxx 1111 xxxx 0100 xxxx */
737 /* UASX 1111 1010 1010 xxxx 1111 xxxx 0100 xxxx */
738 /* USAX 1111 1010 1110 xxxx 1111 xxxx 0100 xxxx */
739 /* USUB16 1111 1010 1101 xxxx 1111 xxxx 0100 xxxx */
740 /* UADD8 1111 1010 1000 xxxx 1111 xxxx 0100 xxxx */
741 /* USUB8 1111 1010 1100 xxxx 1111 xxxx 0100 xxxx */
742
743 /* UQADD16 1111 1010 1001 xxxx 1111 xxxx 0101 xxxx */
744 /* UQASX 1111 1010 1010 xxxx 1111 xxxx 0101 xxxx */
745 /* UQSAX 1111 1010 1110 xxxx 1111 xxxx 0101 xxxx */
746 /* UQSUB16 1111 1010 1101 xxxx 1111 xxxx 0101 xxxx */
747 /* UQADD8 1111 1010 1000 xxxx 1111 xxxx 0101 xxxx */
748 /* UQSUB8 1111 1010 1100 xxxx 1111 xxxx 0101 xxxx */
749
750 /* UHADD16 1111 1010 1001 xxxx 1111 xxxx 0110 xxxx */
751 /* UHASX 1111 1010 1010 xxxx 1111 xxxx 0110 xxxx */
752 /* UHSAX 1111 1010 1110 xxxx 1111 xxxx 0110 xxxx */
753 /* UHSUB16 1111 1010 1101 xxxx 1111 xxxx 0110 xxxx */
754 /* UHADD8 1111 1010 1000 xxxx 1111 xxxx 0110 xxxx */
755 /* UHSUB8 1111 1010 1100 xxxx 1111 xxxx 0110 xxxx */
756 DECODE_OR (0xff80f080, 0xfa80f000),
757
758 /* SXTAH 1111 1010 0000 xxxx 1111 xxxx 1xxx xxxx */
759 /* UXTAH 1111 1010 0001 xxxx 1111 xxxx 1xxx xxxx */
760 /* SXTAB16 1111 1010 0010 xxxx 1111 xxxx 1xxx xxxx */
761 /* UXTAB16 1111 1010 0011 xxxx 1111 xxxx 1xxx xxxx */
762 /* SXTAB 1111 1010 0100 xxxx 1111 xxxx 1xxx xxxx */
763 /* UXTAB 1111 1010 0101 xxxx 1111 xxxx 1xxx xxxx */
764 DECODE_OR (0xff80f080, 0xfa00f080),
765
766 /* QADD 1111 1010 1000 xxxx 1111 xxxx 1000 xxxx */
767 /* QDADD 1111 1010 1000 xxxx 1111 xxxx 1001 xxxx */
768 /* QSUB 1111 1010 1000 xxxx 1111 xxxx 1010 xxxx */
769 /* QDSUB 1111 1010 1000 xxxx 1111 xxxx 1011 xxxx */
770 DECODE_OR (0xfff0f0c0, 0xfa80f080),
771
772 /* SEL 1111 1010 1010 xxxx 1111 xxxx 1000 xxxx */
773 DECODE_OR (0xfff0f0f0, 0xfaa0f080),
774
775 /* LSL 1111 1010 000x xxxx 1111 xxxx 0000 xxxx */
776 /* LSR 1111 1010 001x xxxx 1111 xxxx 0000 xxxx */
777 /* ASR 1111 1010 010x xxxx 1111 xxxx 0000 xxxx */
778 /* ROR 1111 1010 011x xxxx 1111 xxxx 0000 xxxx */
779 DECODE_EMULATEX (0xff80f0f0, 0xfa00f000, t32_emulate_rd8rn16rm0_rwflags,
780 REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
781
782 /* CLZ 1111 1010 1010 xxxx 1111 xxxx 1000 xxxx */
783 DECODE_OR (0xfff0f0f0, 0xfab0f080),
784
785 /* REV 1111 1010 1001 xxxx 1111 xxxx 1000 xxxx */
786 /* REV16 1111 1010 1001 xxxx 1111 xxxx 1001 xxxx */
787 /* RBIT 1111 1010 1001 xxxx 1111 xxxx 1010 xxxx */
788 /* REVSH 1111 1010 1001 xxxx 1111 xxxx 1011 xxxx */
789 DECODE_EMULATEX (0xfff0f0c0, 0xfa90f080, t32_emulate_rd8rn16_noflags,
790 REGS(NOSPPC, 0, NOSPPC, 0, SAMEAS16)),
791
792 /* Other unallocated instructions... */
793 DECODE_END
794};
795
796static const union decode_item t32_table_1111_1011_0[] = {
797 /* Multiply, multiply accumulate, and absolute difference */
798
799 /* ??? 1111 1011 0000 xxxx 1111 xxxx 0001 xxxx */
800 DECODE_REJECT (0xfff0f0f0, 0xfb00f010),
801 /* ??? 1111 1011 0111 xxxx 1111 xxxx 0001 xxxx */
802 DECODE_REJECT (0xfff0f0f0, 0xfb70f010),
803
804 /* SMULxy 1111 1011 0001 xxxx 1111 xxxx 00xx xxxx */
805 DECODE_OR (0xfff0f0c0, 0xfb10f000),
806 /* MUL 1111 1011 0000 xxxx 1111 xxxx 0000 xxxx */
807 /* SMUAD{X} 1111 1011 0010 xxxx 1111 xxxx 000x xxxx */
808 /* SMULWy 1111 1011 0011 xxxx 1111 xxxx 000x xxxx */
809 /* SMUSD{X} 1111 1011 0100 xxxx 1111 xxxx 000x xxxx */
810 /* SMMUL{R} 1111 1011 0101 xxxx 1111 xxxx 000x xxxx */
811 /* USAD8 1111 1011 0111 xxxx 1111 xxxx 0000 xxxx */
812 DECODE_EMULATEX (0xff80f0e0, 0xfb00f000, t32_emulate_rd8rn16rm0_rwflags,
813 REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
814
815 /* ??? 1111 1011 0111 xxxx xxxx xxxx 0001 xxxx */
816 DECODE_REJECT (0xfff000f0, 0xfb700010),
817
818 /* SMLAxy 1111 1011 0001 xxxx xxxx xxxx 00xx xxxx */
819 DECODE_OR (0xfff000c0, 0xfb100000),
820 /* MLA 1111 1011 0000 xxxx xxxx xxxx 0000 xxxx */
821 /* MLS 1111 1011 0000 xxxx xxxx xxxx 0001 xxxx */
822 /* SMLAD{X} 1111 1011 0010 xxxx xxxx xxxx 000x xxxx */
823 /* SMLAWy 1111 1011 0011 xxxx xxxx xxxx 000x xxxx */
824 /* SMLSD{X} 1111 1011 0100 xxxx xxxx xxxx 000x xxxx */
825 /* SMMLA{R} 1111 1011 0101 xxxx xxxx xxxx 000x xxxx */
826 /* SMMLS{R} 1111 1011 0110 xxxx xxxx xxxx 000x xxxx */
827 /* USADA8 1111 1011 0111 xxxx xxxx xxxx 0000 xxxx */
828 DECODE_EMULATEX (0xff8000c0, 0xfb000000, t32_emulate_rd8rn16rm0ra12_noflags,
829 REGS(NOSPPC, NOSPPCX, NOSPPC, 0, NOSPPC)),
830
831 /* Other unallocated instructions... */
832 DECODE_END
833};
834
835static const union decode_item t32_table_1111_1011_1[] = {
836 /* Long multiply, long multiply accumulate, and divide */
837
838 /* UMAAL 1111 1011 1110 xxxx xxxx xxxx 0110 xxxx */
839 DECODE_OR (0xfff000f0, 0xfbe00060),
840 /* SMLALxy 1111 1011 1100 xxxx xxxx xxxx 10xx xxxx */
841 DECODE_OR (0xfff000c0, 0xfbc00080),
842 /* SMLALD{X} 1111 1011 1100 xxxx xxxx xxxx 110x xxxx */
843 /* SMLSLD{X} 1111 1011 1101 xxxx xxxx xxxx 110x xxxx */
844 DECODE_OR (0xffe000e0, 0xfbc000c0),
845 /* SMULL 1111 1011 1000 xxxx xxxx xxxx 0000 xxxx */
846 /* UMULL 1111 1011 1010 xxxx xxxx xxxx 0000 xxxx */
847 /* SMLAL 1111 1011 1100 xxxx xxxx xxxx 0000 xxxx */
848 /* UMLAL 1111 1011 1110 xxxx xxxx xxxx 0000 xxxx */
849 DECODE_EMULATEX (0xff9000f0, 0xfb800000, t32_emulate_rdlo12rdhi8rn16rm0_noflags,
850 REGS(NOSPPC, NOSPPC, NOSPPC, 0, NOSPPC)),
851
852 /* SDIV 1111 1011 1001 xxxx xxxx xxxx 1111 xxxx */
853 /* UDIV 1111 1011 1011 xxxx xxxx xxxx 1111 xxxx */
854 /* Other unallocated instructions... */
855 DECODE_END
856};
857
858const union decode_item kprobe_decode_thumb32_table[] = {
859
860 /*
861 * Load/store multiple instructions
862 * 1110 100x x0xx xxxx xxxx xxxx xxxx xxxx
863 */
864 DECODE_TABLE (0xfe400000, 0xe8000000, t32_table_1110_100x_x0xx),
865
866 /*
867 * Load/store dual, load/store exclusive, table branch
868 * 1110 100x x1xx xxxx xxxx xxxx xxxx xxxx
869 */
870 DECODE_TABLE (0xfe400000, 0xe8400000, t32_table_1110_100x_x1xx),
871
872 /*
873 * Data-processing (shifted register)
874 * 1110 101x xxxx xxxx xxxx xxxx xxxx xxxx
875 */
876 DECODE_TABLE (0xfe000000, 0xea000000, t32_table_1110_101x),
877
878 /*
879 * Coprocessor instructions
880 * 1110 11xx xxxx xxxx xxxx xxxx xxxx xxxx
881 */
882 DECODE_REJECT (0xfc000000, 0xec000000),
883
884 /*
885 * Data-processing (modified immediate)
886 * 1111 0x0x xxxx xxxx 0xxx xxxx xxxx xxxx
887 */
888 DECODE_TABLE (0xfa008000, 0xf0000000, t32_table_1111_0x0x___0),
889
890 /*
891 * Data-processing (plain binary immediate)
892 * 1111 0x1x xxxx xxxx 0xxx xxxx xxxx xxxx
893 */
894 DECODE_TABLE (0xfa008000, 0xf2000000, t32_table_1111_0x1x___0),
895
896 /*
897 * Branches and miscellaneous control
898 * 1111 0xxx xxxx xxxx 1xxx xxxx xxxx xxxx
899 */
900 DECODE_TABLE (0xf8008000, 0xf0008000, t32_table_1111_0xxx___1),
901
902 /*
903 * Advanced SIMD element or structure load/store instructions
904 * 1111 1001 xxx0 xxxx xxxx xxxx xxxx xxxx
905 */
906 DECODE_REJECT (0xff100000, 0xf9000000),
907
908 /*
909 * Memory hints
910 * 1111 100x x0x1 xxxx 1111 xxxx xxxx xxxx
911 */
912 DECODE_TABLE (0xfe50f000, 0xf810f000, t32_table_1111_100x_x0x1__1111),
913
914 /*
915 * Store single data item
916 * 1111 1000 xxx0 xxxx xxxx xxxx xxxx xxxx
917 * Load single data items
918 * 1111 100x xxx1 xxxx xxxx xxxx xxxx xxxx
919 */
920 DECODE_TABLE (0xfe000000, 0xf8000000, t32_table_1111_100x),
921
922 /*
923 * Data-processing (register)
924 * 1111 1010 xxxx xxxx 1111 xxxx xxxx xxxx
925 */
926 DECODE_TABLE (0xff00f000, 0xfa00f000, t32_table_1111_1010___1111),
927
928 /*
929 * Multiply, multiply accumulate, and absolute difference
930 * 1111 1011 0xxx xxxx xxxx xxxx xxxx xxxx
931 */
932 DECODE_TABLE (0xff800000, 0xfb000000, t32_table_1111_1011_0),
933
934 /*
935 * Long multiply, long multiply accumulate, and divide
936 * 1111 1011 1xxx xxxx xxxx xxxx xxxx xxxx
937 */
938 DECODE_TABLE (0xff800000, 0xfb800000, t32_table_1111_1011_1),
939
940 /*
941 * Coprocessor instructions
942 * 1111 11xx xxxx xxxx xxxx xxxx xxxx xxxx
943 */
944 DECODE_END
945};
946
947static void __kprobes
948t16_simulate_bxblx(struct kprobe *p, struct pt_regs *regs)
949{
950 kprobe_opcode_t insn = p->opcode;
951 unsigned long pc = thumb_probe_pc(p);
952 int rm = (insn >> 3) & 0xf;
953 unsigned long rmv = (rm == 15) ? pc : regs->uregs[rm];
954
955 if (insn & (1 << 7)) /* BLX ? */
956 regs->ARM_lr = (unsigned long)p->addr + 2;
957
958 bx_write_pc(rmv, regs);
959}
960
961static void __kprobes
962t16_simulate_ldr_literal(struct kprobe *p, struct pt_regs *regs)
963{
964 kprobe_opcode_t insn = p->opcode;
965 unsigned long* base = (unsigned long *)(thumb_probe_pc(p) & ~3);
966 long index = insn & 0xff;
967 int rt = (insn >> 8) & 0x7;
968 regs->uregs[rt] = base[index];
969}
970
971static void __kprobes
972t16_simulate_ldrstr_sp_relative(struct kprobe *p, struct pt_regs *regs)
973{
974 kprobe_opcode_t insn = p->opcode;
975 unsigned long* base = (unsigned long *)regs->ARM_sp;
976 long index = insn & 0xff;
977 int rt = (insn >> 8) & 0x7;
978 if (insn & 0x800) /* LDR */
979 regs->uregs[rt] = base[index];
980 else /* STR */
981 base[index] = regs->uregs[rt];
982}
983
984static void __kprobes
985t16_simulate_reladr(struct kprobe *p, struct pt_regs *regs)
986{
987 kprobe_opcode_t insn = p->opcode;
988 unsigned long base = (insn & 0x800) ? regs->ARM_sp
989 : (thumb_probe_pc(p) & ~3);
990 long offset = insn & 0xff;
991 int rt = (insn >> 8) & 0x7;
992 regs->uregs[rt] = base + offset * 4;
993}
994
995static void __kprobes
996t16_simulate_add_sp_imm(struct kprobe *p, struct pt_regs *regs)
997{
998 kprobe_opcode_t insn = p->opcode;
999 long imm = insn & 0x7f;
1000 if (insn & 0x80) /* SUB */
1001 regs->ARM_sp -= imm * 4;
1002 else /* ADD */
1003 regs->ARM_sp += imm * 4;
1004}
1005
1006static void __kprobes
1007t16_simulate_cbz(struct kprobe *p, struct pt_regs *regs)
1008{
1009 kprobe_opcode_t insn = p->opcode;
1010 int rn = insn & 0x7;
1011 kprobe_opcode_t nonzero = regs->uregs[rn] ? insn : ~insn;
1012 if (nonzero & 0x800) {
1013 long i = insn & 0x200;
1014 long imm5 = insn & 0xf8;
1015 unsigned long pc = thumb_probe_pc(p);
1016 regs->ARM_pc = pc + (i >> 3) + (imm5 >> 2);
1017 }
1018}
1019
1020static void __kprobes
1021t16_simulate_it(struct kprobe *p, struct pt_regs *regs)
1022{
1023 /*
1024 * The 8 IT state bits are split into two parts in CPSR:
1025 * ITSTATE<1:0> are in CPSR<26:25>
1026 * ITSTATE<7:2> are in CPSR<15:10>
1027 * The new IT state is in the lower byte of insn.
1028 */
1029 kprobe_opcode_t insn = p->opcode;
1030 unsigned long cpsr = regs->ARM_cpsr;
1031 cpsr &= ~PSR_IT_MASK;
1032 cpsr |= (insn & 0xfc) << 8;
1033 cpsr |= (insn & 0x03) << 25;
1034 regs->ARM_cpsr = cpsr;
1035}
1036
1037static void __kprobes
1038t16_singlestep_it(struct kprobe *p, struct pt_regs *regs)
1039{
1040 regs->ARM_pc += 2;
1041 t16_simulate_it(p, regs);
1042}
1043
1044static enum kprobe_insn __kprobes
1045t16_decode_it(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1046{
1047 asi->insn_singlestep = t16_singlestep_it;
1048 return INSN_GOOD_NO_SLOT;
1049}
1050
1051static void __kprobes
1052t16_simulate_cond_branch(struct kprobe *p, struct pt_regs *regs)
1053{
1054 kprobe_opcode_t insn = p->opcode;
1055 unsigned long pc = thumb_probe_pc(p);
1056 long offset = insn & 0x7f;
1057 offset -= insn & 0x80; /* Apply sign bit */
1058 regs->ARM_pc = pc + (offset * 2);
1059}
1060
1061static enum kprobe_insn __kprobes
1062t16_decode_cond_branch(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1063{
1064 int cc = (insn >> 8) & 0xf;
1065 asi->insn_check_cc = kprobe_condition_checks[cc];
1066 asi->insn_handler = t16_simulate_cond_branch;
1067 return INSN_GOOD_NO_SLOT;
1068}
1069
1070static void __kprobes
1071t16_simulate_branch(struct kprobe *p, struct pt_regs *regs)
1072{
1073 kprobe_opcode_t insn = p->opcode;
1074 unsigned long pc = thumb_probe_pc(p);
1075 long offset = insn & 0x3ff;
1076 offset -= insn & 0x400; /* Apply sign bit */
1077 regs->ARM_pc = pc + (offset * 2);
1078}
1079
1080static unsigned long __kprobes
1081t16_emulate_loregs(struct kprobe *p, struct pt_regs *regs)
1082{
1083 unsigned long oldcpsr = regs->ARM_cpsr;
1084 unsigned long newcpsr;
1085
1086 __asm__ __volatile__ (
1087 "msr cpsr_fs, %[oldcpsr] \n\t"
1088 "ldmia %[regs], {r0-r7} \n\t"
1089 "blx %[fn] \n\t"
1090 "stmia %[regs], {r0-r7} \n\t"
1091 "mrs %[newcpsr], cpsr \n\t"
1092 : [newcpsr] "=r" (newcpsr)
1093 : [oldcpsr] "r" (oldcpsr), [regs] "r" (regs),
1094 [fn] "r" (p->ainsn.insn_fn)
1095 : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1096 "lr", "memory", "cc"
1097 );
1098
1099 return (oldcpsr & ~APSR_MASK) | (newcpsr & APSR_MASK);
1100}
1101
1102static void __kprobes
1103t16_emulate_loregs_rwflags(struct kprobe *p, struct pt_regs *regs)
1104{
1105 regs->ARM_cpsr = t16_emulate_loregs(p, regs);
1106}
1107
1108static void __kprobes
1109t16_emulate_loregs_noitrwflags(struct kprobe *p, struct pt_regs *regs)
1110{
1111 unsigned long cpsr = t16_emulate_loregs(p, regs);
1112 if (!in_it_block(cpsr))
1113 regs->ARM_cpsr = cpsr;
1114}
1115
1116static void __kprobes
1117t16_emulate_hiregs(struct kprobe *p, struct pt_regs *regs)
1118{
1119 kprobe_opcode_t insn = p->opcode;
1120 unsigned long pc = thumb_probe_pc(p);
1121 int rdn = (insn & 0x7) | ((insn & 0x80) >> 4);
1122 int rm = (insn >> 3) & 0xf;
1123
1124 register unsigned long rdnv asm("r1");
1125 register unsigned long rmv asm("r0");
1126 unsigned long cpsr = regs->ARM_cpsr;
1127
1128 rdnv = (rdn == 15) ? pc : regs->uregs[rdn];
1129 rmv = (rm == 15) ? pc : regs->uregs[rm];
1130
1131 __asm__ __volatile__ (
1132 "msr cpsr_fs, %[cpsr] \n\t"
1133 "blx %[fn] \n\t"
1134 "mrs %[cpsr], cpsr \n\t"
1135 : "=r" (rdnv), [cpsr] "=r" (cpsr)
1136 : "0" (rdnv), "r" (rmv), "1" (cpsr), [fn] "r" (p->ainsn.insn_fn)
1137 : "lr", "memory", "cc"
1138 );
1139
1140 if (rdn == 15)
1141 rdnv &= ~1;
1142
1143 regs->uregs[rdn] = rdnv;
1144 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
1145}
1146
1147static enum kprobe_insn __kprobes
1148t16_decode_hiregs(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1149{
1150 insn &= ~0x00ff;
1151 insn |= 0x001; /* Set Rdn = R1 and Rm = R0 */
1152 ((u16 *)asi->insn)[0] = insn;
1153 asi->insn_handler = t16_emulate_hiregs;
1154 return INSN_GOOD;
1155}
1156
1157static void __kprobes
1158t16_emulate_push(struct kprobe *p, struct pt_regs *regs)
1159{
1160 __asm__ __volatile__ (
1161 "ldr r9, [%[regs], #13*4] \n\t"
1162 "ldr r8, [%[regs], #14*4] \n\t"
1163 "ldmia %[regs], {r0-r7} \n\t"
1164 "blx %[fn] \n\t"
1165 "str r9, [%[regs], #13*4] \n\t"
1166 :
1167 : [regs] "r" (regs), [fn] "r" (p->ainsn.insn_fn)
1168 : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
1169 "lr", "memory", "cc"
1170 );
1171}
1172
1173static enum kprobe_insn __kprobes
1174t16_decode_push(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1175{
1176 /*
1177 * To simulate a PUSH we use a Thumb-2 "STMDB R9!, {registers}"
1178 * and call it with R9=SP and LR in the register list represented
1179 * by R8.
1180 */
1181 ((u16 *)asi->insn)[0] = 0xe929; /* 1st half STMDB R9!,{} */
1182 ((u16 *)asi->insn)[1] = insn & 0x1ff; /* 2nd half (register list) */
1183 asi->insn_handler = t16_emulate_push;
1184 return INSN_GOOD;
1185}
1186
1187static void __kprobes
1188t16_emulate_pop_nopc(struct kprobe *p, struct pt_regs *regs)
1189{
1190 __asm__ __volatile__ (
1191 "ldr r9, [%[regs], #13*4] \n\t"
1192 "ldmia %[regs], {r0-r7} \n\t"
1193 "blx %[fn] \n\t"
1194 "stmia %[regs], {r0-r7} \n\t"
1195 "str r9, [%[regs], #13*4] \n\t"
1196 :
1197 : [regs] "r" (regs), [fn] "r" (p->ainsn.insn_fn)
1198 : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r9",
1199 "lr", "memory", "cc"
1200 );
1201}
1202
1203static void __kprobes
1204t16_emulate_pop_pc(struct kprobe *p, struct pt_regs *regs)
1205{
1206 register unsigned long pc asm("r8");
1207
1208 __asm__ __volatile__ (
1209 "ldr r9, [%[regs], #13*4] \n\t"
1210 "ldmia %[regs], {r0-r7} \n\t"
1211 "blx %[fn] \n\t"
1212 "stmia %[regs], {r0-r7} \n\t"
1213 "str r9, [%[regs], #13*4] \n\t"
1214 : "=r" (pc)
1215 : [regs] "r" (regs), [fn] "r" (p->ainsn.insn_fn)
1216 : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r9",
1217 "lr", "memory", "cc"
1218 );
1219
1220 bx_write_pc(pc, regs);
1221}
1222
1223static enum kprobe_insn __kprobes
1224t16_decode_pop(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1225{
1226 /*
1227 * To simulate a POP we use a Thumb-2 "LDMDB R9!, {registers}"
1228 * and call it with R9=SP and PC in the register list represented
1229 * by R8.
1230 */
1231 ((u16 *)asi->insn)[0] = 0xe8b9; /* 1st half LDMIA R9!,{} */
1232 ((u16 *)asi->insn)[1] = insn & 0x1ff; /* 2nd half (register list) */
1233 asi->insn_handler = insn & 0x100 ? t16_emulate_pop_pc
1234 : t16_emulate_pop_nopc;
1235 return INSN_GOOD;
1236}
1237
1238static const union decode_item t16_table_1011[] = {
1239 /* Miscellaneous 16-bit instructions */
1240
1241 /* ADD (SP plus immediate) 1011 0000 0xxx xxxx */
1242 /* SUB (SP minus immediate) 1011 0000 1xxx xxxx */
1243 DECODE_SIMULATE (0xff00, 0xb000, t16_simulate_add_sp_imm),
1244
1245 /* CBZ 1011 00x1 xxxx xxxx */
1246 /* CBNZ 1011 10x1 xxxx xxxx */
1247 DECODE_SIMULATE (0xf500, 0xb100, t16_simulate_cbz),
1248
1249 /* SXTH 1011 0010 00xx xxxx */
1250 /* SXTB 1011 0010 01xx xxxx */
1251 /* UXTH 1011 0010 10xx xxxx */
1252 /* UXTB 1011 0010 11xx xxxx */
1253 /* REV 1011 1010 00xx xxxx */
1254 /* REV16 1011 1010 01xx xxxx */
1255 /* ??? 1011 1010 10xx xxxx */
1256 /* REVSH 1011 1010 11xx xxxx */
1257 DECODE_REJECT (0xffc0, 0xba80),
1258 DECODE_EMULATE (0xf500, 0xb000, t16_emulate_loregs_rwflags),
1259
1260 /* PUSH 1011 010x xxxx xxxx */
1261 DECODE_CUSTOM (0xfe00, 0xb400, t16_decode_push),
1262 /* POP 1011 110x xxxx xxxx */
1263 DECODE_CUSTOM (0xfe00, 0xbc00, t16_decode_pop),
1264
1265 /*
1266 * If-Then, and hints
1267 * 1011 1111 xxxx xxxx
1268 */
1269
1270 /* YIELD 1011 1111 0001 0000 */
1271 DECODE_OR (0xffff, 0xbf10),
1272 /* SEV 1011 1111 0100 0000 */
1273 DECODE_EMULATE (0xffff, 0xbf40, kprobe_emulate_none),
1274 /* NOP 1011 1111 0000 0000 */
1275 /* WFE 1011 1111 0010 0000 */
1276 /* WFI 1011 1111 0011 0000 */
1277 DECODE_SIMULATE (0xffcf, 0xbf00, kprobe_simulate_nop),
1278 /* Unassigned hints 1011 1111 xxxx 0000 */
1279 DECODE_REJECT (0xff0f, 0xbf00),
1280 /* IT 1011 1111 xxxx xxxx */
1281 DECODE_CUSTOM (0xff00, 0xbf00, t16_decode_it),
1282
1283 /* SETEND 1011 0110 010x xxxx */
1284 /* CPS 1011 0110 011x xxxx */
1285 /* BKPT 1011 1110 xxxx xxxx */
1286 /* And unallocated instructions... */
1287 DECODE_END
1288};
1289
1290const union decode_item kprobe_decode_thumb16_table[] = {
1291
1292 /*
1293 * Shift (immediate), add, subtract, move, and compare
1294 * 00xx xxxx xxxx xxxx
1295 */
1296
1297 /* CMP (immediate) 0010 1xxx xxxx xxxx */
1298 DECODE_EMULATE (0xf800, 0x2800, t16_emulate_loregs_rwflags),
1299
1300 /* ADD (register) 0001 100x xxxx xxxx */
1301 /* SUB (register) 0001 101x xxxx xxxx */
1302 /* LSL (immediate) 0000 0xxx xxxx xxxx */
1303 /* LSR (immediate) 0000 1xxx xxxx xxxx */
1304 /* ASR (immediate) 0001 0xxx xxxx xxxx */
1305 /* ADD (immediate, Thumb) 0001 110x xxxx xxxx */
1306 /* SUB (immediate, Thumb) 0001 111x xxxx xxxx */
1307 /* MOV (immediate) 0010 0xxx xxxx xxxx */
1308 /* ADD (immediate, Thumb) 0011 0xxx xxxx xxxx */
1309 /* SUB (immediate, Thumb) 0011 1xxx xxxx xxxx */
1310 DECODE_EMULATE (0xc000, 0x0000, t16_emulate_loregs_noitrwflags),
1311
1312 /*
1313 * 16-bit Thumb data-processing instructions
1314 * 0100 00xx xxxx xxxx
1315 */
1316
1317 /* TST (register) 0100 0010 00xx xxxx */
1318 DECODE_EMULATE (0xffc0, 0x4200, t16_emulate_loregs_rwflags),
1319 /* CMP (register) 0100 0010 10xx xxxx */
1320 /* CMN (register) 0100 0010 11xx xxxx */
1321 DECODE_EMULATE (0xff80, 0x4280, t16_emulate_loregs_rwflags),
1322 /* AND (register) 0100 0000 00xx xxxx */
1323 /* EOR (register) 0100 0000 01xx xxxx */
1324 /* LSL (register) 0100 0000 10xx xxxx */
1325 /* LSR (register) 0100 0000 11xx xxxx */
1326 /* ASR (register) 0100 0001 00xx xxxx */
1327 /* ADC (register) 0100 0001 01xx xxxx */
1328 /* SBC (register) 0100 0001 10xx xxxx */
1329 /* ROR (register) 0100 0001 11xx xxxx */
1330 /* RSB (immediate) 0100 0010 01xx xxxx */
1331 /* ORR (register) 0100 0011 00xx xxxx */
1332 /* MUL 0100 0011 00xx xxxx */
1333 /* BIC (register) 0100 0011 10xx xxxx */
1334 /* MVN (register) 0100 0011 10xx xxxx */
1335 DECODE_EMULATE (0xfc00, 0x4000, t16_emulate_loregs_noitrwflags),
1336
1337 /*
1338 * Special data instructions and branch and exchange
1339 * 0100 01xx xxxx xxxx
1340 */
1341
1342 /* BLX pc 0100 0111 1111 1xxx */
1343 DECODE_REJECT (0xfff8, 0x47f8),
1344
1345 /* BX (register) 0100 0111 0xxx xxxx */
1346 /* BLX (register) 0100 0111 1xxx xxxx */
1347 DECODE_SIMULATE (0xff00, 0x4700, t16_simulate_bxblx),
1348
1349 /* ADD pc, pc 0100 0100 1111 1111 */
1350 DECODE_REJECT (0xffff, 0x44ff),
1351
1352 /* ADD (register) 0100 0100 xxxx xxxx */
1353 /* CMP (register) 0100 0101 xxxx xxxx */
1354 /* MOV (register) 0100 0110 xxxx xxxx */
1355 DECODE_CUSTOM (0xfc00, 0x4400, t16_decode_hiregs),
1356
1357 /*
1358 * Load from Literal Pool
1359 * LDR (literal) 0100 1xxx xxxx xxxx
1360 */
1361 DECODE_SIMULATE (0xf800, 0x4800, t16_simulate_ldr_literal),
1362
1363 /*
1364 * 16-bit Thumb Load/store instructions
1365 * 0101 xxxx xxxx xxxx
1366 * 011x xxxx xxxx xxxx
1367 * 100x xxxx xxxx xxxx
1368 */
1369
1370 /* STR (register) 0101 000x xxxx xxxx */
1371 /* STRH (register) 0101 001x xxxx xxxx */
1372 /* STRB (register) 0101 010x xxxx xxxx */
1373 /* LDRSB (register) 0101 011x xxxx xxxx */
1374 /* LDR (register) 0101 100x xxxx xxxx */
1375 /* LDRH (register) 0101 101x xxxx xxxx */
1376 /* LDRB (register) 0101 110x xxxx xxxx */
1377 /* LDRSH (register) 0101 111x xxxx xxxx */
1378 /* STR (immediate, Thumb) 0110 0xxx xxxx xxxx */
1379 /* LDR (immediate, Thumb) 0110 1xxx xxxx xxxx */
1380 /* STRB (immediate, Thumb) 0111 0xxx xxxx xxxx */
1381 /* LDRB (immediate, Thumb) 0111 1xxx xxxx xxxx */
1382 DECODE_EMULATE (0xc000, 0x4000, t16_emulate_loregs_rwflags),
1383 /* STRH (immediate, Thumb) 1000 0xxx xxxx xxxx */
1384 /* LDRH (immediate, Thumb) 1000 1xxx xxxx xxxx */
1385 DECODE_EMULATE (0xf000, 0x8000, t16_emulate_loregs_rwflags),
1386 /* STR (immediate, Thumb) 1001 0xxx xxxx xxxx */
1387 /* LDR (immediate, Thumb) 1001 1xxx xxxx xxxx */
1388 DECODE_SIMULATE (0xf000, 0x9000, t16_simulate_ldrstr_sp_relative),
1389
1390 /*
1391 * Generate PC-/SP-relative address
1392 * ADR (literal) 1010 0xxx xxxx xxxx
1393 * ADD (SP plus immediate) 1010 1xxx xxxx xxxx
1394 */
1395 DECODE_SIMULATE (0xf000, 0xa000, t16_simulate_reladr),
1396
1397 /*
1398 * Miscellaneous 16-bit instructions
1399 * 1011 xxxx xxxx xxxx
1400 */
1401 DECODE_TABLE (0xf000, 0xb000, t16_table_1011),
1402
1403 /* STM 1100 0xxx xxxx xxxx */
1404 /* LDM 1100 1xxx xxxx xxxx */
1405 DECODE_EMULATE (0xf000, 0xc000, t16_emulate_loregs_rwflags),
1406
1407 /*
1408 * Conditional branch, and Supervisor Call
1409 */
1410
1411 /* Permanently UNDEFINED 1101 1110 xxxx xxxx */
1412 /* SVC 1101 1111 xxxx xxxx */
1413 DECODE_REJECT (0xfe00, 0xde00),
1414
1415 /* Conditional branch 1101 xxxx xxxx xxxx */
1416 DECODE_CUSTOM (0xf000, 0xd000, t16_decode_cond_branch),
1417
1418 /*
1419 * Unconditional branch
1420 * B 1110 0xxx xxxx xxxx
1421 */
1422 DECODE_SIMULATE (0xf800, 0xe000, t16_simulate_branch),
1423
1424 DECODE_END
1425};
1426
1427static unsigned long __kprobes thumb_check_cc(unsigned long cpsr)
1428{
1429 if (unlikely(in_it_block(cpsr)))
1430 return kprobe_condition_checks[current_cond(cpsr)](cpsr);
1431 return true;
1432}
1433
1434static void __kprobes thumb16_singlestep(struct kprobe *p, struct pt_regs *regs)
1435{
1436 regs->ARM_pc += 2;
1437 p->ainsn.insn_handler(p, regs);
1438 regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
1439}
1440
1441static void __kprobes thumb32_singlestep(struct kprobe *p, struct pt_regs *regs)
1442{
1443 regs->ARM_pc += 4;
1444 p->ainsn.insn_handler(p, regs);
1445 regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
1446}
1447
1448enum kprobe_insn __kprobes
1449thumb16_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1450{
1451 asi->insn_singlestep = thumb16_singlestep;
1452 asi->insn_check_cc = thumb_check_cc;
1453 return kprobe_decode_insn(insn, asi, kprobe_decode_thumb16_table, true);
1454}
1455
1456enum kprobe_insn __kprobes
1457thumb32_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1458{
1459 asi->insn_singlestep = thumb32_singlestep;
1460 asi->insn_check_cc = thumb_check_cc;
1461 return kprobe_decode_insn(insn, asi, kprobe_decode_thumb32_table, true);
1462}
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
index 1656c87501c0..129c1163248b 100644
--- a/arch/arm/kernel/kprobes.c
+++ b/arch/arm/kernel/kprobes.c
@@ -28,14 +28,16 @@
28#include <asm/traps.h> 28#include <asm/traps.h>
29#include <asm/cacheflush.h> 29#include <asm/cacheflush.h>
30 30
31#include "kprobes.h"
32
31#define MIN_STACK_SIZE(addr) \ 33#define MIN_STACK_SIZE(addr) \
32 min((unsigned long)MAX_STACK_SIZE, \ 34 min((unsigned long)MAX_STACK_SIZE, \
33 (unsigned long)current_thread_info() + THREAD_START_SP - (addr)) 35 (unsigned long)current_thread_info() + THREAD_START_SP - (addr))
34 36
35#define flush_insns(addr, cnt) \ 37#define flush_insns(addr, size) \
36 flush_icache_range((unsigned long)(addr), \ 38 flush_icache_range((unsigned long)(addr), \
37 (unsigned long)(addr) + \ 39 (unsigned long)(addr) + \
38 sizeof(kprobe_opcode_t) * (cnt)) 40 (size))
39 41
40/* Used as a marker in ARM_pc to note when we're in a jprobe. */ 42/* Used as a marker in ARM_pc to note when we're in a jprobe. */
41#define JPROBE_MAGIC_ADDR 0xffffffff 43#define JPROBE_MAGIC_ADDR 0xffffffff
@@ -49,16 +51,35 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
49 kprobe_opcode_t insn; 51 kprobe_opcode_t insn;
50 kprobe_opcode_t tmp_insn[MAX_INSN_SIZE]; 52 kprobe_opcode_t tmp_insn[MAX_INSN_SIZE];
51 unsigned long addr = (unsigned long)p->addr; 53 unsigned long addr = (unsigned long)p->addr;
54 bool thumb;
55 kprobe_decode_insn_t *decode_insn;
52 int is; 56 int is;
53 57
54 if (addr & 0x3 || in_exception_text(addr)) 58 if (in_exception_text(addr))
55 return -EINVAL; 59 return -EINVAL;
56 60
61#ifdef CONFIG_THUMB2_KERNEL
62 thumb = true;
63 addr &= ~1; /* Bit 0 would normally be set to indicate Thumb code */
64 insn = ((u16 *)addr)[0];
65 if (is_wide_instruction(insn)) {
66 insn <<= 16;
67 insn |= ((u16 *)addr)[1];
68 decode_insn = thumb32_kprobe_decode_insn;
69 } else
70 decode_insn = thumb16_kprobe_decode_insn;
71#else /* !CONFIG_THUMB2_KERNEL */
72 thumb = false;
73 if (addr & 0x3)
74 return -EINVAL;
57 insn = *p->addr; 75 insn = *p->addr;
76 decode_insn = arm_kprobe_decode_insn;
77#endif
78
58 p->opcode = insn; 79 p->opcode = insn;
59 p->ainsn.insn = tmp_insn; 80 p->ainsn.insn = tmp_insn;
60 81
61 switch (arm_kprobe_decode_insn(insn, &p->ainsn)) { 82 switch ((*decode_insn)(insn, &p->ainsn)) {
62 case INSN_REJECTED: /* not supported */ 83 case INSN_REJECTED: /* not supported */
63 return -EINVAL; 84 return -EINVAL;
64 85
@@ -68,7 +89,10 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
68 return -ENOMEM; 89 return -ENOMEM;
69 for (is = 0; is < MAX_INSN_SIZE; ++is) 90 for (is = 0; is < MAX_INSN_SIZE; ++is)
70 p->ainsn.insn[is] = tmp_insn[is]; 91 p->ainsn.insn[is] = tmp_insn[is];
71 flush_insns(p->ainsn.insn, MAX_INSN_SIZE); 92 flush_insns(p->ainsn.insn,
93 sizeof(p->ainsn.insn[0]) * MAX_INSN_SIZE);
94 p->ainsn.insn_fn = (kprobe_insn_fn_t *)
95 ((uintptr_t)p->ainsn.insn | thumb);
72 break; 96 break;
73 97
74 case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */ 98 case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */
@@ -79,24 +103,88 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
79 return 0; 103 return 0;
80} 104}
81 105
106#ifdef CONFIG_THUMB2_KERNEL
107
108/*
109 * For a 32-bit Thumb breakpoint spanning two memory words we need to take
110 * special precautions to insert the breakpoint atomically, especially on SMP
111 * systems. This is achieved by calling this arming function using stop_machine.
112 */
113static int __kprobes set_t32_breakpoint(void *addr)
114{
115 ((u16 *)addr)[0] = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION >> 16;
116 ((u16 *)addr)[1] = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION & 0xffff;
117 flush_insns(addr, 2*sizeof(u16));
118 return 0;
119}
120
121void __kprobes arch_arm_kprobe(struct kprobe *p)
122{
123 uintptr_t addr = (uintptr_t)p->addr & ~1; /* Remove any Thumb flag */
124
125 if (!is_wide_instruction(p->opcode)) {
126 *(u16 *)addr = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION;
127 flush_insns(addr, sizeof(u16));
128 } else if (addr & 2) {
129 /* A 32-bit instruction spanning two words needs special care */
130 stop_machine(set_t32_breakpoint, (void *)addr, &cpu_online_map);
131 } else {
132 /* Word aligned 32-bit instruction can be written atomically */
133 u32 bkp = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION;
134#ifndef __ARMEB__ /* Swap halfwords for little-endian */
135 bkp = (bkp >> 16) | (bkp << 16);
136#endif
137 *(u32 *)addr = bkp;
138 flush_insns(addr, sizeof(u32));
139 }
140}
141
142#else /* !CONFIG_THUMB2_KERNEL */
143
82void __kprobes arch_arm_kprobe(struct kprobe *p) 144void __kprobes arch_arm_kprobe(struct kprobe *p)
83{ 145{
84 *p->addr = KPROBE_BREAKPOINT_INSTRUCTION; 146 kprobe_opcode_t insn = p->opcode;
85 flush_insns(p->addr, 1); 147 kprobe_opcode_t brkp = KPROBE_ARM_BREAKPOINT_INSTRUCTION;
148 if (insn >= 0xe0000000)
149 brkp |= 0xe0000000; /* Unconditional instruction */
150 else
151 brkp |= insn & 0xf0000000; /* Copy condition from insn */
152 *p->addr = brkp;
153 flush_insns(p->addr, sizeof(p->addr[0]));
86} 154}
87 155
156#endif /* !CONFIG_THUMB2_KERNEL */
157
88/* 158/*
89 * The actual disarming is done here on each CPU and synchronized using 159 * The actual disarming is done here on each CPU and synchronized using
90 * stop_machine. This synchronization is necessary on SMP to avoid removing 160 * stop_machine. This synchronization is necessary on SMP to avoid removing
91 * a probe between the moment the 'Undefined Instruction' exception is raised 161 * a probe between the moment the 'Undefined Instruction' exception is raised
92 * and the moment the exception handler reads the faulting instruction from 162 * and the moment the exception handler reads the faulting instruction from
93 * memory. 163 * memory. It is also needed to atomically set the two half-words of a 32-bit
164 * Thumb breakpoint.
94 */ 165 */
95int __kprobes __arch_disarm_kprobe(void *p) 166int __kprobes __arch_disarm_kprobe(void *p)
96{ 167{
97 struct kprobe *kp = p; 168 struct kprobe *kp = p;
169#ifdef CONFIG_THUMB2_KERNEL
170 u16 *addr = (u16 *)((uintptr_t)kp->addr & ~1);
171 kprobe_opcode_t insn = kp->opcode;
172 unsigned int len;
173
174 if (is_wide_instruction(insn)) {
175 ((u16 *)addr)[0] = insn>>16;
176 ((u16 *)addr)[1] = insn;
177 len = 2*sizeof(u16);
178 } else {
179 ((u16 *)addr)[0] = insn;
180 len = sizeof(u16);
181 }
182 flush_insns(addr, len);
183
184#else /* !CONFIG_THUMB2_KERNEL */
98 *kp->addr = kp->opcode; 185 *kp->addr = kp->opcode;
99 flush_insns(kp->addr, 1); 186 flush_insns(kp->addr, sizeof(kp->addr[0]));
187#endif
100 return 0; 188 return 0;
101} 189}
102 190
@@ -130,12 +218,24 @@ static void __kprobes set_current_kprobe(struct kprobe *p)
130 __get_cpu_var(current_kprobe) = p; 218 __get_cpu_var(current_kprobe) = p;
131} 219}
132 220
133static void __kprobes singlestep(struct kprobe *p, struct pt_regs *regs, 221static void __kprobes
134 struct kprobe_ctlblk *kcb) 222singlestep_skip(struct kprobe *p, struct pt_regs *regs)
135{ 223{
224#ifdef CONFIG_THUMB2_KERNEL
225 regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
226 if (is_wide_instruction(p->opcode))
227 regs->ARM_pc += 4;
228 else
229 regs->ARM_pc += 2;
230#else
136 regs->ARM_pc += 4; 231 regs->ARM_pc += 4;
137 if (p->ainsn.insn_check_cc(regs->ARM_cpsr)) 232#endif
138 p->ainsn.insn_handler(p, regs); 233}
234
235static inline void __kprobes
236singlestep(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
237{
238 p->ainsn.insn_singlestep(p, regs);
139} 239}
140 240
141/* 241/*
@@ -149,11 +249,23 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
149{ 249{
150 struct kprobe *p, *cur; 250 struct kprobe *p, *cur;
151 struct kprobe_ctlblk *kcb; 251 struct kprobe_ctlblk *kcb;
152 kprobe_opcode_t *addr = (kprobe_opcode_t *)regs->ARM_pc;
153 252
154 kcb = get_kprobe_ctlblk(); 253 kcb = get_kprobe_ctlblk();
155 cur = kprobe_running(); 254 cur = kprobe_running();
156 p = get_kprobe(addr); 255
256#ifdef CONFIG_THUMB2_KERNEL
257 /*
258 * First look for a probe which was registered using an address with
259 * bit 0 set, this is the usual situation for pointers to Thumb code.
260 * If not found, fallback to looking for one with bit 0 clear.
261 */
262 p = get_kprobe((kprobe_opcode_t *)(regs->ARM_pc | 1));
263 if (!p)
264 p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc);
265
266#else /* ! CONFIG_THUMB2_KERNEL */
267 p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc);
268#endif
157 269
158 if (p) { 270 if (p) {
159 if (cur) { 271 if (cur) {
@@ -173,7 +285,8 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
173 /* impossible cases */ 285 /* impossible cases */
174 BUG(); 286 BUG();
175 } 287 }
176 } else { 288 } else if (p->ainsn.insn_check_cc(regs->ARM_cpsr)) {
289 /* Probe hit and conditional execution check ok. */
177 set_current_kprobe(p); 290 set_current_kprobe(p);
178 kcb->kprobe_status = KPROBE_HIT_ACTIVE; 291 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
179 292
@@ -193,6 +306,13 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
193 } 306 }
194 reset_current_kprobe(); 307 reset_current_kprobe();
195 } 308 }
309 } else {
310 /*
311 * Probe hit but conditional execution check failed,
312 * so just skip the instruction and continue as if
313 * nothing had happened.
314 */
315 singlestep_skip(p, regs);
196 } 316 }
197 } else if (cur) { 317 } else if (cur) {
198 /* We probably hit a jprobe. Call its break handler. */ 318 /* We probably hit a jprobe. Call its break handler. */
@@ -300,7 +420,11 @@ void __naked __kprobes kretprobe_trampoline(void)
300 "bl trampoline_handler \n\t" 420 "bl trampoline_handler \n\t"
301 "mov lr, r0 \n\t" 421 "mov lr, r0 \n\t"
302 "ldmia sp!, {r0 - r11} \n\t" 422 "ldmia sp!, {r0 - r11} \n\t"
423#ifdef CONFIG_THUMB2_KERNEL
424 "bx lr \n\t"
425#else
303 "mov pc, lr \n\t" 426 "mov pc, lr \n\t"
427#endif
304 : : : "memory"); 428 : : : "memory");
305} 429}
306 430
@@ -378,11 +502,22 @@ int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
378 struct jprobe *jp = container_of(p, struct jprobe, kp); 502 struct jprobe *jp = container_of(p, struct jprobe, kp);
379 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); 503 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
380 long sp_addr = regs->ARM_sp; 504 long sp_addr = regs->ARM_sp;
505 long cpsr;
381 506
382 kcb->jprobe_saved_regs = *regs; 507 kcb->jprobe_saved_regs = *regs;
383 memcpy(kcb->jprobes_stack, (void *)sp_addr, MIN_STACK_SIZE(sp_addr)); 508 memcpy(kcb->jprobes_stack, (void *)sp_addr, MIN_STACK_SIZE(sp_addr));
384 regs->ARM_pc = (long)jp->entry; 509 regs->ARM_pc = (long)jp->entry;
385 regs->ARM_cpsr |= PSR_I_BIT; 510
511 cpsr = regs->ARM_cpsr | PSR_I_BIT;
512#ifdef CONFIG_THUMB2_KERNEL
513 /* Set correct Thumb state in cpsr */
514 if (regs->ARM_pc & 1)
515 cpsr |= PSR_T_BIT;
516 else
517 cpsr &= ~PSR_T_BIT;
518#endif
519 regs->ARM_cpsr = cpsr;
520
386 preempt_disable(); 521 preempt_disable();
387 return 1; 522 return 1;
388} 523}
@@ -404,7 +539,12 @@ void __kprobes jprobe_return(void)
404 * This is to prevent any simulated instruction from writing 539 * This is to prevent any simulated instruction from writing
405 * over the regs when they are accessing the stack. 540 * over the regs when they are accessing the stack.
406 */ 541 */
542#ifdef CONFIG_THUMB2_KERNEL
543 "sub r0, %0, %1 \n\t"
544 "mov sp, r0 \n\t"
545#else
407 "sub sp, %0, %1 \n\t" 546 "sub sp, %0, %1 \n\t"
547#endif
408 "ldr r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t" 548 "ldr r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t"
409 "str %0, [sp, %2] \n\t" 549 "str %0, [sp, %2] \n\t"
410 "str r0, [sp, %3] \n\t" 550 "str r0, [sp, %3] \n\t"
@@ -415,15 +555,28 @@ void __kprobes jprobe_return(void)
415 * Return to the context saved by setjmp_pre_handler 555 * Return to the context saved by setjmp_pre_handler
416 * and restored by longjmp_break_handler. 556 * and restored by longjmp_break_handler.
417 */ 557 */
558#ifdef CONFIG_THUMB2_KERNEL
559 "ldr lr, [sp, %2] \n\t" /* lr = saved sp */
560 "ldrd r0, r1, [sp, %5] \n\t" /* r0,r1 = saved lr,pc */
561 "ldr r2, [sp, %4] \n\t" /* r2 = saved psr */
562 "stmdb lr!, {r0, r1, r2} \n\t" /* push saved lr and */
563 /* rfe context */
564 "ldmia sp, {r0 - r12} \n\t"
565 "mov sp, lr \n\t"
566 "ldr lr, [sp], #4 \n\t"
567 "rfeia sp! \n\t"
568#else
418 "ldr r0, [sp, %4] \n\t" 569 "ldr r0, [sp, %4] \n\t"
419 "msr cpsr_cxsf, r0 \n\t" 570 "msr cpsr_cxsf, r0 \n\t"
420 "ldmia sp, {r0 - pc} \n\t" 571 "ldmia sp, {r0 - pc} \n\t"
572#endif
421 : 573 :
422 : "r" (kcb->jprobe_saved_regs.ARM_sp), 574 : "r" (kcb->jprobe_saved_regs.ARM_sp),
423 "I" (sizeof(struct pt_regs) * 2), 575 "I" (sizeof(struct pt_regs) * 2),
424 "J" (offsetof(struct pt_regs, ARM_sp)), 576 "J" (offsetof(struct pt_regs, ARM_sp)),
425 "J" (offsetof(struct pt_regs, ARM_pc)), 577 "J" (offsetof(struct pt_regs, ARM_pc)),
426 "J" (offsetof(struct pt_regs, ARM_cpsr)) 578 "J" (offsetof(struct pt_regs, ARM_cpsr)),
579 "J" (offsetof(struct pt_regs, ARM_lr))
427 : "memory", "cc"); 580 : "memory", "cc");
428} 581}
429 582
@@ -460,17 +613,44 @@ int __kprobes arch_trampoline_kprobe(struct kprobe *p)
460 return 0; 613 return 0;
461} 614}
462 615
463static struct undef_hook kprobes_break_hook = { 616#ifdef CONFIG_THUMB2_KERNEL
617
618static struct undef_hook kprobes_thumb16_break_hook = {
619 .instr_mask = 0xffff,
620 .instr_val = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION,
621 .cpsr_mask = MODE_MASK,
622 .cpsr_val = SVC_MODE,
623 .fn = kprobe_trap_handler,
624};
625
626static struct undef_hook kprobes_thumb32_break_hook = {
464 .instr_mask = 0xffffffff, 627 .instr_mask = 0xffffffff,
465 .instr_val = KPROBE_BREAKPOINT_INSTRUCTION, 628 .instr_val = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION,
466 .cpsr_mask = MODE_MASK, 629 .cpsr_mask = MODE_MASK,
467 .cpsr_val = SVC_MODE, 630 .cpsr_val = SVC_MODE,
468 .fn = kprobe_trap_handler, 631 .fn = kprobe_trap_handler,
469}; 632};
470 633
634#else /* !CONFIG_THUMB2_KERNEL */
635
636static struct undef_hook kprobes_arm_break_hook = {
637 .instr_mask = 0x0fffffff,
638 .instr_val = KPROBE_ARM_BREAKPOINT_INSTRUCTION,
639 .cpsr_mask = MODE_MASK,
640 .cpsr_val = SVC_MODE,
641 .fn = kprobe_trap_handler,
642};
643
644#endif /* !CONFIG_THUMB2_KERNEL */
645
471int __init arch_init_kprobes() 646int __init arch_init_kprobes()
472{ 647{
473 arm_kprobe_decode_init(); 648 arm_kprobe_decode_init();
474 register_undef_hook(&kprobes_break_hook); 649#ifdef CONFIG_THUMB2_KERNEL
650 register_undef_hook(&kprobes_thumb16_break_hook);
651 register_undef_hook(&kprobes_thumb32_break_hook);
652#else
653 register_undef_hook(&kprobes_arm_break_hook);
654#endif
475 return 0; 655 return 0;
476} 656}
diff --git a/arch/arm/kernel/kprobes.h b/arch/arm/kernel/kprobes.h
new file mode 100644
index 000000000000..a6aeda0a6c7f
--- /dev/null
+++ b/arch/arm/kernel/kprobes.h
@@ -0,0 +1,420 @@
1/*
2 * arch/arm/kernel/kprobes.h
3 *
4 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
5 *
6 * Some contents moved here from arch/arm/include/asm/kprobes.h which is
7 * Copyright (C) 2006, 2007 Motorola Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#ifndef _ARM_KERNEL_KPROBES_H
20#define _ARM_KERNEL_KPROBES_H
21
22/*
23 * These undefined instructions must be unique and
24 * reserved solely for kprobes' use.
25 */
26#define KPROBE_ARM_BREAKPOINT_INSTRUCTION 0x07f001f8
27#define KPROBE_THUMB16_BREAKPOINT_INSTRUCTION 0xde18
28#define KPROBE_THUMB32_BREAKPOINT_INSTRUCTION 0xf7f0a018
29
30
31enum kprobe_insn {
32 INSN_REJECTED,
33 INSN_GOOD,
34 INSN_GOOD_NO_SLOT
35};
36
37typedef enum kprobe_insn (kprobe_decode_insn_t)(kprobe_opcode_t,
38 struct arch_specific_insn *);
39
40#ifdef CONFIG_THUMB2_KERNEL
41
42enum kprobe_insn thumb16_kprobe_decode_insn(kprobe_opcode_t,
43 struct arch_specific_insn *);
44enum kprobe_insn thumb32_kprobe_decode_insn(kprobe_opcode_t,
45 struct arch_specific_insn *);
46
47#else /* !CONFIG_THUMB2_KERNEL */
48
49enum kprobe_insn arm_kprobe_decode_insn(kprobe_opcode_t,
50 struct arch_specific_insn *);
51#endif
52
53void __init arm_kprobe_decode_init(void);
54
55extern kprobe_check_cc * const kprobe_condition_checks[16];
56
57
58#if __LINUX_ARM_ARCH__ >= 7
59
60/* str_pc_offset is architecturally defined from ARMv7 onwards */
61#define str_pc_offset 8
62#define find_str_pc_offset()
63
64#else /* __LINUX_ARM_ARCH__ < 7 */
65
66/* We need a run-time check to determine str_pc_offset */
67extern int str_pc_offset;
68void __init find_str_pc_offset(void);
69
70#endif
71
72
73/*
74 * Update ITSTATE after normal execution of an IT block instruction.
75 *
76 * The 8 IT state bits are split into two parts in CPSR:
77 * ITSTATE<1:0> are in CPSR<26:25>
78 * ITSTATE<7:2> are in CPSR<15:10>
79 */
80static inline unsigned long it_advance(unsigned long cpsr)
81 {
82 if ((cpsr & 0x06000400) == 0) {
83 /* ITSTATE<2:0> == 0 means end of IT block, so clear IT state */
84 cpsr &= ~PSR_IT_MASK;
85 } else {
86 /* We need to shift left ITSTATE<4:0> */
87 const unsigned long mask = 0x06001c00; /* Mask ITSTATE<4:0> */
88 unsigned long it = cpsr & mask;
89 it <<= 1;
90 it |= it >> (27 - 10); /* Carry ITSTATE<2> to correct place */
91 it &= mask;
92 cpsr &= ~mask;
93 cpsr |= it;
94 }
95 return cpsr;
96}
97
98static inline void __kprobes bx_write_pc(long pcv, struct pt_regs *regs)
99{
100 long cpsr = regs->ARM_cpsr;
101 if (pcv & 0x1) {
102 cpsr |= PSR_T_BIT;
103 pcv &= ~0x1;
104 } else {
105 cpsr &= ~PSR_T_BIT;
106 pcv &= ~0x2; /* Avoid UNPREDICTABLE address allignment */
107 }
108 regs->ARM_cpsr = cpsr;
109 regs->ARM_pc = pcv;
110}
111
112
113#if __LINUX_ARM_ARCH__ >= 6
114
115/* Kernels built for >= ARMv6 should never run on <= ARMv5 hardware, so... */
116#define load_write_pc_interworks true
117#define test_load_write_pc_interworking()
118
119#else /* __LINUX_ARM_ARCH__ < 6 */
120
121/* We need run-time testing to determine if load_write_pc() should interwork. */
122extern bool load_write_pc_interworks;
123void __init test_load_write_pc_interworking(void);
124
125#endif
126
127static inline void __kprobes load_write_pc(long pcv, struct pt_regs *regs)
128{
129 if (load_write_pc_interworks)
130 bx_write_pc(pcv, regs);
131 else
132 regs->ARM_pc = pcv;
133}
134
135
136#if __LINUX_ARM_ARCH__ >= 7
137
138#define alu_write_pc_interworks true
139#define test_alu_write_pc_interworking()
140
141#elif __LINUX_ARM_ARCH__ <= 5
142
143/* Kernels built for <= ARMv5 should never run on >= ARMv6 hardware, so... */
144#define alu_write_pc_interworks false
145#define test_alu_write_pc_interworking()
146
147#else /* __LINUX_ARM_ARCH__ == 6 */
148
149/* We could be an ARMv6 binary on ARMv7 hardware so we need a run-time check. */
150extern bool alu_write_pc_interworks;
151void __init test_alu_write_pc_interworking(void);
152
153#endif /* __LINUX_ARM_ARCH__ == 6 */
154
155static inline void __kprobes alu_write_pc(long pcv, struct pt_regs *regs)
156{
157 if (alu_write_pc_interworks)
158 bx_write_pc(pcv, regs);
159 else
160 regs->ARM_pc = pcv;
161}
162
163
164void __kprobes kprobe_simulate_nop(struct kprobe *p, struct pt_regs *regs);
165void __kprobes kprobe_emulate_none(struct kprobe *p, struct pt_regs *regs);
166
167enum kprobe_insn __kprobes
168kprobe_decode_ldmstm(kprobe_opcode_t insn, struct arch_specific_insn *asi);
169
170/*
171 * Test if load/store instructions writeback the address register.
172 * if P (bit 24) == 0 or W (bit 21) == 1
173 */
174#define is_writeback(insn) ((insn ^ 0x01000000) & 0x01200000)
175
176/*
177 * The following definitions and macros are used to build instruction
178 * decoding tables for use by kprobe_decode_insn.
179 *
180 * These tables are a concatenation of entries each of which consist of one of
181 * the decode_* structs. All of the fields in every type of decode structure
182 * are of the union type decode_item, therefore the entire decode table can be
183 * viewed as an array of these and declared like:
184 *
185 * static const union decode_item table_name[] = {};
186 *
187 * In order to construct each entry in the table, macros are used to
188 * initialise a number of sequential decode_item values in a layout which
189 * matches the relevant struct. E.g. DECODE_SIMULATE initialise a struct
190 * decode_simulate by initialising four decode_item objects like this...
191 *
192 * {.bits = _type},
193 * {.bits = _mask},
194 * {.bits = _value},
195 * {.handler = _handler},
196 *
197 * Initialising a specified member of the union means that the compiler
198 * will produce a warning if the argument is of an incorrect type.
199 *
200 * Below is a list of each of the macros used to initialise entries and a
201 * description of the action performed when that entry is matched to an
202 * instruction. A match is found when (instruction & mask) == value.
203 *
204 * DECODE_TABLE(mask, value, table)
205 * Instruction decoding jumps to parsing the new sub-table 'table'.
206 *
207 * DECODE_CUSTOM(mask, value, decoder)
208 * The custom function 'decoder' is called to the complete decoding
209 * of an instruction.
210 *
211 * DECODE_SIMULATE(mask, value, handler)
212 * Set the probes instruction handler to 'handler', this will be used
213 * to simulate the instruction when the probe is hit. Decoding returns
214 * with INSN_GOOD_NO_SLOT.
215 *
216 * DECODE_EMULATE(mask, value, handler)
217 * Set the probes instruction handler to 'handler', this will be used
218 * to emulate the instruction when the probe is hit. The modified
219 * instruction (see below) is placed in the probes instruction slot so it
220 * may be called by the emulation code. Decoding returns with INSN_GOOD.
221 *
222 * DECODE_REJECT(mask, value)
223 * Instruction decoding fails with INSN_REJECTED
224 *
225 * DECODE_OR(mask, value)
226 * This allows the mask/value test of multiple table entries to be
227 * logically ORed. Once an 'or' entry is matched the decoding action to
228 * be performed is that of the next entry which isn't an 'or'. E.g.
229 *
230 * DECODE_OR (mask1, value1)
231 * DECODE_OR (mask2, value2)
232 * DECODE_SIMULATE (mask3, value3, simulation_handler)
233 *
234 * This means that if any of the three mask/value pairs match the
235 * instruction being decoded, then 'simulation_handler' will be used
236 * for it.
237 *
238 * Both the SIMULATE and EMULATE macros have a second form which take an
239 * additional 'regs' argument.
240 *
241 * DECODE_SIMULATEX(mask, value, handler, regs)
242 * DECODE_EMULATEX (mask, value, handler, regs)
243 *
244 * These are used to specify what kind of CPU register is encoded in each of the
245 * least significant 5 nibbles of the instruction being decoded. The regs value
246 * is specified using the REGS macro, this takes any of the REG_TYPE_* values
247 * from enum decode_reg_type as arguments; only the '*' part of the name is
248 * given. E.g.
249 *
250 * REGS(0, ANY, NOPC, 0, ANY)
251 *
252 * This indicates an instruction is encoded like:
253 *
254 * bits 19..16 ignore
255 * bits 15..12 any register allowed here
256 * bits 11.. 8 any register except PC allowed here
257 * bits 7.. 4 ignore
258 * bits 3.. 0 any register allowed here
259 *
260 * This register specification is checked after a decode table entry is found to
261 * match an instruction (through the mask/value test). Any invalid register then
262 * found in the instruction will cause decoding to fail with INSN_REJECTED. In
263 * the above example this would happen if bits 11..8 of the instruction were
264 * 1111, indicating R15 or PC.
265 *
266 * As well as checking for legal combinations of registers, this data is also
267 * used to modify the registers encoded in the instructions so that an
268 * emulation routines can use it. (See decode_regs() and INSN_NEW_BITS.)
269 *
270 * Here is a real example which matches ARM instructions of the form
271 * "AND <Rd>,<Rn>,<Rm>,<shift> <Rs>"
272 *
273 * DECODE_EMULATEX (0x0e000090, 0x00000010, emulate_rd12rn16rm0rs8_rwflags,
274 * REGS(ANY, ANY, NOPC, 0, ANY)),
275 * ^ ^ ^ ^
276 * Rn Rd Rs Rm
277 *
278 * Decoding the instruction "AND R4, R5, R6, ASL R15" will be rejected because
279 * Rs == R15
280 *
281 * Decoding the instruction "AND R4, R5, R6, ASL R7" will be accepted and the
282 * instruction will be modified to "AND R0, R2, R3, ASL R1" and then placed into
283 * the kprobes instruction slot. This can then be called later by the handler
284 * function emulate_rd12rn16rm0rs8_rwflags in order to simulate the instruction.
285 */
286
287enum decode_type {
288 DECODE_TYPE_END,
289 DECODE_TYPE_TABLE,
290 DECODE_TYPE_CUSTOM,
291 DECODE_TYPE_SIMULATE,
292 DECODE_TYPE_EMULATE,
293 DECODE_TYPE_OR,
294 DECODE_TYPE_REJECT,
295 NUM_DECODE_TYPES /* Must be last enum */
296};
297
298#define DECODE_TYPE_BITS 4
299#define DECODE_TYPE_MASK ((1 << DECODE_TYPE_BITS) - 1)
300
301enum decode_reg_type {
302 REG_TYPE_NONE = 0, /* Not a register, ignore */
303 REG_TYPE_ANY, /* Any register allowed */
304 REG_TYPE_SAMEAS16, /* Register should be same as that at bits 19..16 */
305 REG_TYPE_SP, /* Register must be SP */
306 REG_TYPE_PC, /* Register must be PC */
307 REG_TYPE_NOSP, /* Register must not be SP */
308 REG_TYPE_NOSPPC, /* Register must not be SP or PC */
309 REG_TYPE_NOPC, /* Register must not be PC */
310 REG_TYPE_NOPCWB, /* No PC if load/store write-back flag also set */
311
312 /* The following types are used when the encoding for PC indicates
313 * another instruction form. This distiction only matters for test
314 * case coverage checks.
315 */
316 REG_TYPE_NOPCX, /* Register must not be PC */
317 REG_TYPE_NOSPPCX, /* Register must not be SP or PC */
318
319 /* Alias to allow '0' arg to be used in REGS macro. */
320 REG_TYPE_0 = REG_TYPE_NONE
321};
322
323#define REGS(r16, r12, r8, r4, r0) \
324 ((REG_TYPE_##r16) << 16) + \
325 ((REG_TYPE_##r12) << 12) + \
326 ((REG_TYPE_##r8) << 8) + \
327 ((REG_TYPE_##r4) << 4) + \
328 (REG_TYPE_##r0)
329
330union decode_item {
331 u32 bits;
332 const union decode_item *table;
333 kprobe_insn_handler_t *handler;
334 kprobe_decode_insn_t *decoder;
335};
336
337
338#define DECODE_END \
339 {.bits = DECODE_TYPE_END}
340
341
342struct decode_header {
343 union decode_item type_regs;
344 union decode_item mask;
345 union decode_item value;
346};
347
348#define DECODE_HEADER(_type, _mask, _value, _regs) \
349 {.bits = (_type) | ((_regs) << DECODE_TYPE_BITS)}, \
350 {.bits = (_mask)}, \
351 {.bits = (_value)}
352
353
354struct decode_table {
355 struct decode_header header;
356 union decode_item table;
357};
358
359#define DECODE_TABLE(_mask, _value, _table) \
360 DECODE_HEADER(DECODE_TYPE_TABLE, _mask, _value, 0), \
361 {.table = (_table)}
362
363
364struct decode_custom {
365 struct decode_header header;
366 union decode_item decoder;
367};
368
369#define DECODE_CUSTOM(_mask, _value, _decoder) \
370 DECODE_HEADER(DECODE_TYPE_CUSTOM, _mask, _value, 0), \
371 {.decoder = (_decoder)}
372
373
374struct decode_simulate {
375 struct decode_header header;
376 union decode_item handler;
377};
378
379#define DECODE_SIMULATEX(_mask, _value, _handler, _regs) \
380 DECODE_HEADER(DECODE_TYPE_SIMULATE, _mask, _value, _regs), \
381 {.handler = (_handler)}
382
383#define DECODE_SIMULATE(_mask, _value, _handler) \
384 DECODE_SIMULATEX(_mask, _value, _handler, 0)
385
386
387struct decode_emulate {
388 struct decode_header header;
389 union decode_item handler;
390};
391
392#define DECODE_EMULATEX(_mask, _value, _handler, _regs) \
393 DECODE_HEADER(DECODE_TYPE_EMULATE, _mask, _value, _regs), \
394 {.handler = (_handler)}
395
396#define DECODE_EMULATE(_mask, _value, _handler) \
397 DECODE_EMULATEX(_mask, _value, _handler, 0)
398
399
400struct decode_or {
401 struct decode_header header;
402};
403
404#define DECODE_OR(_mask, _value) \
405 DECODE_HEADER(DECODE_TYPE_OR, _mask, _value, 0)
406
407
408struct decode_reject {
409 struct decode_header header;
410};
411
412#define DECODE_REJECT(_mask, _value) \
413 DECODE_HEADER(DECODE_TYPE_REJECT, _mask, _value, 0)
414
415
416int kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi,
417 const union decode_item *table, bool thumb16);
418
419
420#endif /* _ARM_KERNEL_KPROBES_H */
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 262ea67f60ae..31326996dfeb 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -583,7 +583,7 @@ static int armpmu_event_init(struct perf_event *event)
583static void armpmu_enable(struct pmu *pmu) 583static void armpmu_enable(struct pmu *pmu)
584{ 584{
585 /* Enable all of the perf events on hardware. */ 585 /* Enable all of the perf events on hardware. */
586 int idx; 586 int idx, enabled = 0;
587 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 587 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
588 588
589 if (!armpmu) 589 if (!armpmu)
@@ -596,9 +596,11 @@ static void armpmu_enable(struct pmu *pmu)
596 continue; 596 continue;
597 597
598 armpmu->enable(&event->hw, idx); 598 armpmu->enable(&event->hw, idx);
599 enabled = 1;
599 } 600 }
600 601
601 armpmu->start(); 602 if (enabled)
603 armpmu->start();
602} 604}
603 605
604static void armpmu_disable(struct pmu *pmu) 606static void armpmu_disable(struct pmu *pmu)
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 97260060bf26..897ade059f58 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -228,34 +228,12 @@ static struct undef_hook thumb_break_hook = {
228 .fn = break_trap, 228 .fn = break_trap,
229}; 229};
230 230
231static int thumb2_break_trap(struct pt_regs *regs, unsigned int instr)
232{
233 unsigned int instr2;
234 void __user *pc;
235
236 /* Check the second half of the instruction. */
237 pc = (void __user *)(instruction_pointer(regs) + 2);
238
239 if (processor_mode(regs) == SVC_MODE) {
240 instr2 = *(u16 *) pc;
241 } else {
242 get_user(instr2, (u16 __user *)pc);
243 }
244
245 if (instr2 == 0xa000) {
246 ptrace_break(current, regs);
247 return 0;
248 } else {
249 return 1;
250 }
251}
252
253static struct undef_hook thumb2_break_hook = { 231static struct undef_hook thumb2_break_hook = {
254 .instr_mask = 0xffff, 232 .instr_mask = 0xffffffff,
255 .instr_val = 0xf7f0, 233 .instr_val = 0xf7f0a000,
256 .cpsr_mask = PSR_T_BIT, 234 .cpsr_mask = PSR_T_BIT,
257 .cpsr_val = PSR_T_BIT, 235 .cpsr_val = PSR_T_BIT,
258 .fn = thumb2_break_trap, 236 .fn = break_trap,
259}; 237};
260 238
261static int __init ptrace_break_init(void) 239static int __init ptrace_break_init(void)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 699df68fc840..7cc11c07adda 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -73,6 +73,7 @@ __setup("fpe=", fpe_setup);
73#endif 73#endif
74 74
75extern void paging_init(struct machine_desc *desc); 75extern void paging_init(struct machine_desc *desc);
76extern void sanity_check_meminfo(void);
76extern void reboot_setup(char *str); 77extern void reboot_setup(char *str);
77 78
78unsigned int processor_id; 79unsigned int processor_id;
@@ -900,6 +901,7 @@ void __init setup_arch(char **cmdline_p)
900 901
901 parse_early_param(); 902 parse_early_param();
902 903
904 sanity_check_meminfo();
903 arm_memblock_init(&meminfo, mdesc); 905 arm_memblock_init(&meminfo, mdesc);
904 906
905 paging_init(mdesc); 907 paging_init(mdesc);
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 60636f499cb3..2c277d40cee6 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -115,7 +115,7 @@ static void __cpuinit twd_calibrate_rate(void)
115 twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); 115 twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
116 116
117 printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, 117 printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
118 (twd_timer_rate / 1000000) % 100); 118 (twd_timer_rate / 10000) % 100);
119 } 119 }
120} 120}
121 121
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 6807cb1e76dd..2d3436e9f71f 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -355,9 +355,24 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
355 pc = (void __user *)instruction_pointer(regs); 355 pc = (void __user *)instruction_pointer(regs);
356 356
357 if (processor_mode(regs) == SVC_MODE) { 357 if (processor_mode(regs) == SVC_MODE) {
358 instr = *(u32 *) pc; 358#ifdef CONFIG_THUMB2_KERNEL
359 if (thumb_mode(regs)) {
360 instr = ((u16 *)pc)[0];
361 if (is_wide_instruction(instr)) {
362 instr <<= 16;
363 instr |= ((u16 *)pc)[1];
364 }
365 } else
366#endif
367 instr = *(u32 *) pc;
359 } else if (thumb_mode(regs)) { 368 } else if (thumb_mode(regs)) {
360 get_user(instr, (u16 __user *)pc); 369 get_user(instr, (u16 __user *)pc);
370 if (is_wide_instruction(instr)) {
371 unsigned int instr2;
372 get_user(instr2, (u16 __user *)pc+1);
373 instr <<= 16;
374 instr |= instr2;
375 }
361 } else { 376 } else {
362 get_user(instr, (u32 __user *)pc); 377 get_user(instr, (u32 __user *)pc);
363 } 378 }
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 17fae4a42ab5..f1013d08bb57 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -223,15 +223,15 @@ static struct clk *periph_clocks[] __initdata = {
223}; 223};
224 224
225static struct clk_lookup periph_clocks_lookups[] = { 225static struct clk_lookup periph_clocks_lookups[] = {
226 CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk), 226 CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
227 CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk), 227 CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
228 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), 228 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
229 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk), 229 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
230 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), 230 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
231 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), 231 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
232 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), 232 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
233 CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk), 233 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
234 CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk), 234 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
235}; 235};
236 236
237static struct clk_lookup usart_clocks_lookups[] = { 237static struct clk_lookup usart_clocks_lookups[] = {
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index cd850ed6f335..dba0d8d8a4bd 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -1220,7 +1220,7 @@ void __init at91_set_serial_console(unsigned portnr)
1220{ 1220{
1221 if (portnr < ATMEL_MAX_UART) { 1221 if (portnr < ATMEL_MAX_UART) {
1222 atmel_default_console_device = at91_uarts[portnr]; 1222 atmel_default_console_device = at91_uarts[portnr];
1223 at91cap9_set_console_clock(portnr); 1223 at91cap9_set_console_clock(at91_uarts[portnr]->id);
1224 } 1224 }
1225} 1225}
1226 1226
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index b228ce9e21a1..83a1a3fee554 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -199,9 +199,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
199 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk), 199 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
200 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk), 200 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
201 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk), 201 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
202 CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk), 202 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
203 CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk), 203 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
204 CLKDEV_CON_DEV_ID("ssc", "ssc.2", &ssc2_clk), 204 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
205}; 205};
206 206
207static struct clk_lookup usart_clocks_lookups[] = { 207static struct clk_lookup usart_clocks_lookups[] = {
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index a0ba475be04c..7227755ffec6 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -1135,7 +1135,7 @@ void __init at91_set_serial_console(unsigned portnr)
1135{ 1135{
1136 if (portnr < ATMEL_MAX_UART) { 1136 if (portnr < ATMEL_MAX_UART) {
1137 atmel_default_console_device = at91_uarts[portnr]; 1137 atmel_default_console_device = at91_uarts[portnr];
1138 at91rm9200_set_console_clock(portnr); 1138 at91rm9200_set_console_clock(at91_uarts[portnr]->id);
1139 } 1139 }
1140} 1140}
1141 1141
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 1fdeb9058a76..39f81f47b4ba 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -1173,7 +1173,7 @@ void __init at91_set_serial_console(unsigned portnr)
1173{ 1173{
1174 if (portnr < ATMEL_MAX_UART) { 1174 if (portnr < ATMEL_MAX_UART) {
1175 atmel_default_console_device = at91_uarts[portnr]; 1175 atmel_default_console_device = at91_uarts[portnr];
1176 at91sam9260_set_console_clock(portnr); 1176 at91sam9260_set_console_clock(at91_uarts[portnr]->id);
1177 } 1177 }
1178} 1178}
1179 1179
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 3eb4538fceeb..5004bf0a05f2 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -1013,7 +1013,7 @@ void __init at91_set_serial_console(unsigned portnr)
1013{ 1013{
1014 if (portnr < ATMEL_MAX_UART) { 1014 if (portnr < ATMEL_MAX_UART) {
1015 atmel_default_console_device = at91_uarts[portnr]; 1015 atmel_default_console_device = at91_uarts[portnr];
1016 at91sam9261_set_console_clock(portnr); 1016 at91sam9261_set_console_clock(at91_uarts[portnr]->id);
1017 } 1017 }
1018} 1018}
1019 1019
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index ffe081b77ed0..a050f41fc860 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -1395,7 +1395,7 @@ void __init at91_set_serial_console(unsigned portnr)
1395{ 1395{
1396 if (portnr < ATMEL_MAX_UART) { 1396 if (portnr < ATMEL_MAX_UART) {
1397 atmel_default_console_device = at91_uarts[portnr]; 1397 atmel_default_console_device = at91_uarts[portnr];
1398 at91sam9263_set_console_clock(portnr); 1398 at91sam9263_set_console_clock(at91_uarts[portnr]->id);
1399 } 1399 }
1400} 1400}
1401 1401
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 2bb6ff9af1c7..11e214121b23 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -217,11 +217,11 @@ static struct clk *periph_clocks[] __initdata = {
217static struct clk_lookup periph_clocks_lookups[] = { 217static struct clk_lookup periph_clocks_lookups[] = {
218 /* One additional fake clock for ohci */ 218 /* One additional fake clock for ohci */
219 CLKDEV_CON_ID("ohci_clk", &uhphs_clk), 219 CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
220 CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci.0", &uhphs_clk), 220 CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk),
221 CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk), 221 CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
222 CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk), 222 CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
223 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), 223 CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
224 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk), 224 CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
225 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), 225 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
226 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), 226 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
227 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk), 227 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk),
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 05674865bc21..600bffb01edb 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1550,7 +1550,7 @@ void __init at91_set_serial_console(unsigned portnr)
1550{ 1550{
1551 if (portnr < ATMEL_MAX_UART) { 1551 if (portnr < ATMEL_MAX_UART) {
1552 atmel_default_console_device = at91_uarts[portnr]; 1552 atmel_default_console_device = at91_uarts[portnr];
1553 at91sam9g45_set_console_clock(portnr); 1553 at91sam9g45_set_console_clock(at91_uarts[portnr]->id);
1554 } 1554 }
1555} 1555}
1556 1556
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 1a40f16b66c8..29dff18ed130 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -191,8 +191,8 @@ static struct clk *periph_clocks[] __initdata = {
191}; 191};
192 192
193static struct clk_lookup periph_clocks_lookups[] = { 193static struct clk_lookup periph_clocks_lookups[] = {
194 CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk), 194 CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
195 CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk), 195 CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
196 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), 196 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
197 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), 197 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
198 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), 198 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index c296045f2b6a..aacb19dc9225 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -1168,7 +1168,7 @@ void __init at91_set_serial_console(unsigned portnr)
1168{ 1168{
1169 if (portnr < ATMEL_MAX_UART) { 1169 if (portnr < ATMEL_MAX_UART) {
1170 atmel_default_console_device = at91_uarts[portnr]; 1170 atmel_default_console_device = at91_uarts[portnr];
1171 at91sam9rl_set_console_clock(portnr); 1171 at91sam9rl_set_console_clock(at91_uarts[portnr]->id);
1172 } 1172 }
1173} 1173}
1174 1174
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 1904fdf87613..cdb65d483250 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -215,7 +215,7 @@ static void __init cap9adk_add_device_nand(void)
215 csa = at91_sys_read(AT91_MATRIX_EBICSA); 215 csa = at91_sys_read(AT91_MATRIX_EBICSA);
216 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); 216 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
217 217
218 cap9adk_nand_data.bus_width_16 = !board_have_nand_8bit(); 218 cap9adk_nand_data.bus_width_16 = board_have_nand_16bit();
219 /* setup bus-width (8 or 16) */ 219 /* setup bus-width (8 or 16) */
220 if (cap9adk_nand_data.bus_width_16) 220 if (cap9adk_nand_data.bus_width_16)
221 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16; 221 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index d600dc123227..5c240743c5b7 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -214,7 +214,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
214 214
215static void __init ek_add_device_nand(void) 215static void __init ek_add_device_nand(void)
216{ 216{
217 ek_nand_data.bus_width_16 = !board_have_nand_8bit(); 217 ek_nand_data.bus_width_16 = board_have_nand_16bit();
218 /* setup bus-width (8 or 16) */ 218 /* setup bus-width (8 or 16) */
219 if (ek_nand_data.bus_width_16) 219 if (ek_nand_data.bus_width_16)
220 ek_nand_smc_config.mode |= AT91_SMC_DBW_16; 220 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index f897f84d43dc..b60c22b6e241 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -220,7 +220,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
220 220
221static void __init ek_add_device_nand(void) 221static void __init ek_add_device_nand(void)
222{ 222{
223 ek_nand_data.bus_width_16 = !board_have_nand_8bit(); 223 ek_nand_data.bus_width_16 = board_have_nand_16bit();
224 /* setup bus-width (8 or 16) */ 224 /* setup bus-width (8 or 16) */
225 if (ek_nand_data.bus_width_16) 225 if (ek_nand_data.bus_width_16)
226 ek_nand_smc_config.mode |= AT91_SMC_DBW_16; 226 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 605b26f40a4c..9bbdc92ea194 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -221,7 +221,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
221 221
222static void __init ek_add_device_nand(void) 222static void __init ek_add_device_nand(void)
223{ 223{
224 ek_nand_data.bus_width_16 = !board_have_nand_8bit(); 224 ek_nand_data.bus_width_16 = board_have_nand_16bit();
225 /* setup bus-width (8 or 16) */ 225 /* setup bus-width (8 or 16) */
226 if (ek_nand_data.bus_width_16) 226 if (ek_nand_data.bus_width_16)
227 ek_nand_smc_config.mode |= AT91_SMC_DBW_16; 227 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 7624cf0d006b..1325a50101a8 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -198,7 +198,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
198 198
199static void __init ek_add_device_nand(void) 199static void __init ek_add_device_nand(void)
200{ 200{
201 ek_nand_data.bus_width_16 = !board_have_nand_8bit(); 201 ek_nand_data.bus_width_16 = board_have_nand_16bit();
202 /* setup bus-width (8 or 16) */ 202 /* setup bus-width (8 or 16) */
203 if (ek_nand_data.bus_width_16) 203 if (ek_nand_data.bus_width_16)
204 ek_nand_smc_config.mode |= AT91_SMC_DBW_16; 204 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 063c95d0e8f0..33eaa135f248 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -178,7 +178,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
178 178
179static void __init ek_add_device_nand(void) 179static void __init ek_add_device_nand(void)
180{ 180{
181 ek_nand_data.bus_width_16 = !board_have_nand_8bit(); 181 ek_nand_data.bus_width_16 = board_have_nand_16bit();
182 /* setup bus-width (8 or 16) */ 182 /* setup bus-width (8 or 16) */
183 if (ek_nand_data.bus_width_16) 183 if (ek_nand_data.bus_width_16)
184 ek_nand_smc_config.mode |= AT91_SMC_DBW_16; 184 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h
index b855ee75f72c..8f4866045b41 100644
--- a/arch/arm/mach-at91/include/mach/system_rev.h
+++ b/arch/arm/mach-at91/include/mach/system_rev.h
@@ -13,13 +13,13 @@
13 * the 16-31 bit are reserved for at91 generic information 13 * the 16-31 bit are reserved for at91 generic information
14 * 14 *
15 * bit 31: 15 * bit 31:
16 * 0 => nand 16 bit 16 * 0 => nand 8 bit
17 * 1 => nand 8 bit 17 * 1 => nand 16 bit
18 */ 18 */
19#define BOARD_HAVE_NAND_8BIT (1 << 31) 19#define BOARD_HAVE_NAND_16BIT (1 << 31)
20static int inline board_have_nand_8bit(void) 20static inline int board_have_nand_16bit(void)
21{ 21{
22 return system_rev & BOARD_HAVE_NAND_8BIT; 22 return system_rev & BOARD_HAVE_NAND_16BIT;
23} 23}
24 24
25#endif /* __ARCH_SYSTEM_REV_H__ */ 25#endif /* __ARCH_SYSTEM_REV_H__ */
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 1d4b65fd673e..6659a0d137a3 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -251,9 +251,9 @@ static void ep93xx_uart_set_mctrl(struct amba_device *dev,
251 unsigned int mcr; 251 unsigned int mcr;
252 252
253 mcr = 0; 253 mcr = 0;
254 if (!(mctrl & TIOCM_RTS)) 254 if (mctrl & TIOCM_RTS)
255 mcr |= 2; 255 mcr |= 2;
256 if (!(mctrl & TIOCM_DTR)) 256 if (mctrl & TIOCM_DTR)
257 mcr |= 1; 257 mcr |= 1;
258 258
259 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); 259 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 9babe4473e88..bfd621460abf 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -23,6 +23,7 @@
23#include <plat/sdhci.h> 23#include <plat/sdhci.h>
24#include <plat/devs.h> 24#include <plat/devs.h>
25#include <plat/fimc-core.h> 25#include <plat/fimc-core.h>
26#include <plat/iic-core.h>
26 27
27#include <mach/regs-irq.h> 28#include <mach/regs-irq.h>
28 29
@@ -132,6 +133,11 @@ void __init exynos4_map_io(void)
132 s3c_fimc_setname(1, "exynos4-fimc"); 133 s3c_fimc_setname(1, "exynos4-fimc");
133 s3c_fimc_setname(2, "exynos4-fimc"); 134 s3c_fimc_setname(2, "exynos4-fimc");
134 s3c_fimc_setname(3, "exynos4-fimc"); 135 s3c_fimc_setname(3, "exynos4-fimc");
136
137 /* The I2C bus controllers are directly compatible with s3c2440 */
138 s3c_i2c0_setname("s3c2440-i2c");
139 s3c_i2c1_setname("s3c2440-i2c");
140 s3c_i2c2_setname("s3c2440-i2c");
135} 141}
136 142
137void __init exynos4_init_clocks(int xtal) 143void __init exynos4_init_clocks(int xtal)
diff --git a/arch/arm/mach-exynos4/dev-audio.c b/arch/arm/mach-exynos4/dev-audio.c
index 1eed5f9f7bd3..983069a53239 100644
--- a/arch/arm/mach-exynos4/dev-audio.c
+++ b/arch/arm/mach-exynos4/dev-audio.c
@@ -330,7 +330,7 @@ struct platform_device exynos4_device_ac97 = {
330 330
331static int exynos4_spdif_cfg_gpio(struct platform_device *pdev) 331static int exynos4_spdif_cfg_gpio(struct platform_device *pdev)
332{ 332{
333 s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(3)); 333 s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(4));
334 334
335 return 0; 335 return 0;
336} 336}
diff --git a/arch/arm/mach-exynos4/headsmp.S b/arch/arm/mach-exynos4/headsmp.S
index 6c6cfc50c46b..3cdeb3647542 100644
--- a/arch/arm/mach-exynos4/headsmp.S
+++ b/arch/arm/mach-exynos4/headsmp.S
@@ -13,7 +13,7 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <linux/init.h> 14#include <linux/init.h>
15 15
16 __INIT 16 __CPUINIT
17 17
18/* 18/*
19 * exynos4 specific entry point for secondary CPUs. This provides 19 * exynos4 specific entry point for secondary CPUs. This provides
diff --git a/arch/arm/mach-exynos4/init.c b/arch/arm/mach-exynos4/init.c
index cf91f50e43ab..a8a83e3881a4 100644
--- a/arch/arm/mach-exynos4/init.c
+++ b/arch/arm/mach-exynos4/init.c
@@ -35,6 +35,7 @@ void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
35 tcfg->clocks = exynos4_serial_clocks; 35 tcfg->clocks = exynos4_serial_clocks;
36 tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks); 36 tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
37 } 37 }
38 tcfg->flags |= NO_NEED_CHECK_CLKSRC;
38 } 39 }
39 40
40 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); 41 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c
index 152676471b67..edd814110da8 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -78,9 +78,7 @@ static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
78}; 78};
79 79
80static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = { 80static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
81 .cd_type = S3C_SDHCI_CD_GPIO, 81 .cd_type = S3C_SDHCI_CD_INTERNAL,
82 .ext_cd_gpio = EXYNOS4_GPK0(2),
83 .ext_cd_gpio_invert = 1,
84 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 82 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
85#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT 83#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
86 .max_width = 8, 84 .max_width = 8,
@@ -96,9 +94,7 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
96}; 94};
97 95
98static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = { 96static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
99 .cd_type = S3C_SDHCI_CD_GPIO, 97 .cd_type = S3C_SDHCI_CD_INTERNAL,
100 .ext_cd_gpio = EXYNOS4_GPK2(2),
101 .ext_cd_gpio_invert = 1,
102 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 98 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
103#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT 99#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
104 .max_width = 8, 100 .max_width = 8,
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index de88c9297b68..f49ce85d2448 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -215,7 +215,7 @@ static struct omap_kp_platform_data ams_delta_kp_data __initdata = {
215 .delay = 9, 215 .delay = 9,
216}; 216};
217 217
218static struct platform_device ams_delta_kp_device __initdata = { 218static struct platform_device ams_delta_kp_device = {
219 .name = "omap-keypad", 219 .name = "omap-keypad",
220 .id = -1, 220 .id = -1,
221 .dev = { 221 .dev = {
@@ -225,12 +225,12 @@ static struct platform_device ams_delta_kp_device __initdata = {
225 .resource = ams_delta_kp_resources, 225 .resource = ams_delta_kp_resources,
226}; 226};
227 227
228static struct platform_device ams_delta_lcd_device __initdata = { 228static struct platform_device ams_delta_lcd_device = {
229 .name = "lcd_ams_delta", 229 .name = "lcd_ams_delta",
230 .id = -1, 230 .id = -1,
231}; 231};
232 232
233static struct platform_device ams_delta_led_device __initdata = { 233static struct platform_device ams_delta_led_device = {
234 .name = "ams-delta-led", 234 .name = "ams-delta-led",
235 .id = -1 235 .id = -1
236}; 236};
@@ -267,7 +267,7 @@ static struct soc_camera_link ams_delta_iclink = {
267 .power = ams_delta_camera_power, 267 .power = ams_delta_camera_power,
268}; 268};
269 269
270static struct platform_device ams_delta_camera_device __initdata = { 270static struct platform_device ams_delta_camera_device = {
271 .name = "soc-camera-pdrv", 271 .name = "soc-camera-pdrv",
272 .id = 0, 272 .id = 0,
273 .dev = { 273 .dev = {
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 04c4b04cf54e..364137c2042c 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -41,7 +41,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
41 .bank_stride = 1, 41 .bank_stride = 1,
42}; 42};
43 43
44static struct __initdata platform_device omap15xx_mpu_gpio = { 44static struct platform_device omap15xx_mpu_gpio = {
45 .name = "omap_gpio", 45 .name = "omap_gpio",
46 .id = 0, 46 .id = 0,
47 .dev = { 47 .dev = {
@@ -70,7 +70,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
70 .bank_width = 16, 70 .bank_width = 16,
71}; 71};
72 72
73static struct __initdata platform_device omap15xx_gpio = { 73static struct platform_device omap15xx_gpio = {
74 .name = "omap_gpio", 74 .name = "omap_gpio",
75 .id = 1, 75 .id = 1,
76 .dev = { 76 .dev = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 5dd0d4c82b24..293a246e2824 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -44,7 +44,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
44 .bank_stride = 1, 44 .bank_stride = 1,
45}; 45};
46 46
47static struct __initdata platform_device omap16xx_mpu_gpio = { 47static struct platform_device omap16xx_mpu_gpio = {
48 .name = "omap_gpio", 48 .name = "omap_gpio",
49 .id = 0, 49 .id = 0,
50 .dev = { 50 .dev = {
@@ -73,7 +73,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
73 .bank_width = 16, 73 .bank_width = 16,
74}; 74};
75 75
76static struct __initdata platform_device omap16xx_gpio1 = { 76static struct platform_device omap16xx_gpio1 = {
77 .name = "omap_gpio", 77 .name = "omap_gpio",
78 .id = 1, 78 .id = 1,
79 .dev = { 79 .dev = {
@@ -102,7 +102,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
102 .bank_width = 16, 102 .bank_width = 16,
103}; 103};
104 104
105static struct __initdata platform_device omap16xx_gpio2 = { 105static struct platform_device omap16xx_gpio2 = {
106 .name = "omap_gpio", 106 .name = "omap_gpio",
107 .id = 2, 107 .id = 2,
108 .dev = { 108 .dev = {
@@ -131,7 +131,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
131 .bank_width = 16, 131 .bank_width = 16,
132}; 132};
133 133
134static struct __initdata platform_device omap16xx_gpio3 = { 134static struct platform_device omap16xx_gpio3 = {
135 .name = "omap_gpio", 135 .name = "omap_gpio",
136 .id = 3, 136 .id = 3,
137 .dev = { 137 .dev = {
@@ -160,7 +160,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
160 .bank_width = 16, 160 .bank_width = 16,
161}; 161};
162 162
163static struct __initdata platform_device omap16xx_gpio4 = { 163static struct platform_device omap16xx_gpio4 = {
164 .name = "omap_gpio", 164 .name = "omap_gpio",
165 .id = 4, 165 .id = 4,
166 .dev = { 166 .dev = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 1204c8b871af..c6ad248d63a6 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -46,7 +46,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
46 .bank_stride = 2, 46 .bank_stride = 2,
47}; 47};
48 48
49static struct __initdata platform_device omap7xx_mpu_gpio = { 49static struct platform_device omap7xx_mpu_gpio = {
50 .name = "omap_gpio", 50 .name = "omap_gpio",
51 .id = 0, 51 .id = 0,
52 .dev = { 52 .dev = {
@@ -75,7 +75,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
75 .bank_width = 32, 75 .bank_width = 32,
76}; 76};
77 77
78static struct __initdata platform_device omap7xx_gpio1 = { 78static struct platform_device omap7xx_gpio1 = {
79 .name = "omap_gpio", 79 .name = "omap_gpio",
80 .id = 1, 80 .id = 1,
81 .dev = { 81 .dev = {
@@ -104,7 +104,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = {
104 .bank_width = 32, 104 .bank_width = 32,
105}; 105};
106 106
107static struct __initdata platform_device omap7xx_gpio2 = { 107static struct platform_device omap7xx_gpio2 = {
108 .name = "omap_gpio", 108 .name = "omap_gpio",
109 .id = 2, 109 .id = 2,
110 .dev = { 110 .dev = {
@@ -133,7 +133,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = {
133 .bank_width = 32, 133 .bank_width = 32,
134}; 134};
135 135
136static struct __initdata platform_device omap7xx_gpio3 = { 136static struct platform_device omap7xx_gpio3 = {
137 .name = "omap_gpio", 137 .name = "omap_gpio",
138 .id = 3, 138 .id = 3,
139 .dev = { 139 .dev = {
@@ -162,7 +162,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = {
162 .bank_width = 32, 162 .bank_width = 32,
163}; 163};
164 164
165static struct __initdata platform_device omap7xx_gpio4 = { 165static struct platform_device omap7xx_gpio4 = {
166 .name = "omap_gpio", 166 .name = "omap_gpio",
167 .id = 4, 167 .id = 4,
168 .dev = { 168 .dev = {
@@ -191,7 +191,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = {
191 .bank_width = 32, 191 .bank_width = 32,
192}; 192};
193 193
194static struct __initdata platform_device omap7xx_gpio5 = { 194static struct platform_device omap7xx_gpio5 = {
195 .name = "omap_gpio", 195 .name = "omap_gpio",
196 .id = 5, 196 .id = 5,
197 .dev = { 197 .dev = {
@@ -220,7 +220,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = {
220 .bank_width = 32, 220 .bank_width = 32,
221}; 221};
222 222
223static struct __initdata platform_device omap7xx_gpio6 = { 223static struct platform_device omap7xx_gpio6 = {
224 .name = "omap_gpio", 224 .name = "omap_gpio",
225 .id = 6, 225 .id = 6,
226 .dev = { 226 .dev = {
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 990366726c58..88bd6f7705f0 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -558,7 +558,7 @@ static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module =
558 .subdev_board_info = &rx51_si4713_board_info, 558 .subdev_board_info = &rx51_si4713_board_info,
559}; 559};
560 560
561static struct platform_device rx51_si4713_dev __initdata_or_module = { 561static struct platform_device rx51_si4713_dev = {
562 .name = "radio-si4713", 562 .name = "radio-si4713",
563 .id = -1, 563 .id = -1,
564 .dev = { 564 .dev = {
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index dd3120df09fe..fc2dc0b3d4fe 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -552,7 +552,7 @@ struct mini2440_features_t {
552 struct platform_device *optional[8]; 552 struct platform_device *optional[8];
553}; 553};
554 554
555static void mini2440_parse_features( 555static void __init mini2440_parse_features(
556 struct mini2440_features_t * features, 556 struct mini2440_features_t * features,
557 const char * features_str ) 557 const char * features_str )
558{ 558{
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 82db072cb836..5e6b42089eb4 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -88,6 +88,7 @@ static struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
88 .cfg_gpio = s3c64xx_spi_cfg_gpio, 88 .cfg_gpio = s3c64xx_spi_cfg_gpio,
89 .fifo_lvl_mask = 0x7f, 89 .fifo_lvl_mask = 0x7f,
90 .rx_lvl_offset = 13, 90 .rx_lvl_offset = 13,
91 .tx_st_done = 21,
91}; 92};
92 93
93static u64 spi_dmamask = DMA_BIT_MASK(32); 94static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -132,6 +133,7 @@ static struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
132 .cfg_gpio = s3c64xx_spi_cfg_gpio, 133 .cfg_gpio = s3c64xx_spi_cfg_gpio,
133 .fifo_lvl_mask = 0x7f, 134 .fifo_lvl_mask = 0x7f,
134 .rx_lvl_offset = 13, 135 .rx_lvl_offset = 13,
136 .tx_st_done = 21,
135}; 137};
136 138
137struct platform_device s3c64xx_device_spi1 = { 139struct platform_device s3c64xx_device_spi1 = {
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
index e78ee18c76e3..ac825e826326 100644
--- a/arch/arm/mach-s5p64x0/dev-spi.c
+++ b/arch/arm/mach-s5p64x0/dev-spi.c
@@ -112,12 +112,14 @@ static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
112 .cfg_gpio = s5p6440_spi_cfg_gpio, 112 .cfg_gpio = s5p6440_spi_cfg_gpio,
113 .fifo_lvl_mask = 0x1ff, 113 .fifo_lvl_mask = 0x1ff,
114 .rx_lvl_offset = 15, 114 .rx_lvl_offset = 15,
115 .tx_st_done = 25,
115}; 116};
116 117
117static struct s3c64xx_spi_info s5p6450_spi0_pdata = { 118static struct s3c64xx_spi_info s5p6450_spi0_pdata = {
118 .cfg_gpio = s5p6450_spi_cfg_gpio, 119 .cfg_gpio = s5p6450_spi_cfg_gpio,
119 .fifo_lvl_mask = 0x1ff, 120 .fifo_lvl_mask = 0x1ff,
120 .rx_lvl_offset = 15, 121 .rx_lvl_offset = 15,
122 .tx_st_done = 25,
121}; 123};
122 124
123static u64 spi_dmamask = DMA_BIT_MASK(32); 125static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -160,12 +162,14 @@ static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
160 .cfg_gpio = s5p6440_spi_cfg_gpio, 162 .cfg_gpio = s5p6440_spi_cfg_gpio,
161 .fifo_lvl_mask = 0x7f, 163 .fifo_lvl_mask = 0x7f,
162 .rx_lvl_offset = 15, 164 .rx_lvl_offset = 15,
165 .tx_st_done = 25,
163}; 166};
164 167
165static struct s3c64xx_spi_info s5p6450_spi1_pdata = { 168static struct s3c64xx_spi_info s5p6450_spi1_pdata = {
166 .cfg_gpio = s5p6450_spi_cfg_gpio, 169 .cfg_gpio = s5p6450_spi_cfg_gpio,
167 .fifo_lvl_mask = 0x7f, 170 .fifo_lvl_mask = 0x7f,
168 .rx_lvl_offset = 15, 171 .rx_lvl_offset = 15,
172 .tx_st_done = 25,
169}; 173};
170 174
171struct platform_device s5p64x0_device_spi1 = { 175struct platform_device s5p64x0_device_spi1 = {
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
index 57b19794d9bb..e5d6c4dceb56 100644
--- a/arch/arm/mach-s5pc100/dev-spi.c
+++ b/arch/arm/mach-s5pc100/dev-spi.c
@@ -15,6 +15,7 @@
15#include <mach/dma.h> 15#include <mach/dma.h>
16#include <mach/map.h> 16#include <mach/map.h>
17#include <mach/spi-clocks.h> 17#include <mach/spi-clocks.h>
18#include <mach/irqs.h>
18 19
19#include <plat/s3c64xx-spi.h> 20#include <plat/s3c64xx-spi.h>
20#include <plat/gpio-cfg.h> 21#include <plat/gpio-cfg.h>
@@ -90,6 +91,7 @@ static struct s3c64xx_spi_info s5pc100_spi0_pdata = {
90 .fifo_lvl_mask = 0x7f, 91 .fifo_lvl_mask = 0x7f,
91 .rx_lvl_offset = 13, 92 .rx_lvl_offset = 13,
92 .high_speed = 1, 93 .high_speed = 1,
94 .tx_st_done = 21,
93}; 95};
94 96
95static u64 spi_dmamask = DMA_BIT_MASK(32); 97static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -134,6 +136,7 @@ static struct s3c64xx_spi_info s5pc100_spi1_pdata = {
134 .fifo_lvl_mask = 0x7f, 136 .fifo_lvl_mask = 0x7f,
135 .rx_lvl_offset = 13, 137 .rx_lvl_offset = 13,
136 .high_speed = 1, 138 .high_speed = 1,
139 .tx_st_done = 21,
137}; 140};
138 141
139struct platform_device s5pc100_device_spi1 = { 142struct platform_device s5pc100_device_spi1 = {
@@ -176,6 +179,7 @@ static struct s3c64xx_spi_info s5pc100_spi2_pdata = {
176 .fifo_lvl_mask = 0x7f, 179 .fifo_lvl_mask = 0x7f,
177 .rx_lvl_offset = 13, 180 .rx_lvl_offset = 13,
178 .high_speed = 1, 181 .high_speed = 1,
182 .tx_st_done = 21,
179}; 183};
180 184
181struct platform_device s5pc100_device_spi2 = { 185struct platform_device s5pc100_device_spi2 = {
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
index e3249a47e3b1..eaf9a7bff7a0 100644
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ b/arch/arm/mach-s5pv210/dev-spi.c
@@ -85,6 +85,7 @@ static struct s3c64xx_spi_info s5pv210_spi0_pdata = {
85 .fifo_lvl_mask = 0x1ff, 85 .fifo_lvl_mask = 0x1ff,
86 .rx_lvl_offset = 15, 86 .rx_lvl_offset = 15,
87 .high_speed = 1, 87 .high_speed = 1,
88 .tx_st_done = 25,
88}; 89};
89 90
90static u64 spi_dmamask = DMA_BIT_MASK(32); 91static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -129,6 +130,7 @@ static struct s3c64xx_spi_info s5pv210_spi1_pdata = {
129 .fifo_lvl_mask = 0x7f, 130 .fifo_lvl_mask = 0x7f,
130 .rx_lvl_offset = 15, 131 .rx_lvl_offset = 15,
131 .high_speed = 1, 132 .high_speed = 1,
133 .tx_st_done = 25,
132}; 134};
133 135
134struct platform_device s5pv210_device_spi1 = { 136struct platform_device s5pv210_device_spi1 = {
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 1e2aba23e0d6..ce5c2513c6ce 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -381,7 +381,7 @@ void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
381 gpio_set_value(GPIO_PORT114, state); 381 gpio_set_value(GPIO_PORT114, state);
382} 382}
383 383
384static struct sh_mobile_sdhi_info sh_sdhi1_platdata = { 384static struct sh_mobile_sdhi_info sh_sdhi1_info = {
385 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, 385 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
386 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, 386 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
387 .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 387 .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
@@ -413,7 +413,7 @@ static struct platform_device sdhi1_device = {
413 .name = "sh_mobile_sdhi", 413 .name = "sh_mobile_sdhi",
414 .id = 1, 414 .id = 1,
415 .dev = { 415 .dev = {
416 .platform_data = &sh_sdhi1_platdata, 416 .platform_data = &sh_sdhi1_info,
417 }, 417 },
418 .num_resources = ARRAY_SIZE(sdhi1_resources), 418 .num_resources = ARRAY_SIZE(sdhi1_resources),
419 .resource = sdhi1_resources, 419 .resource = sdhi1_resources,
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index f6b687f61c28..803bc6edfca4 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -913,7 +913,7 @@ static struct i2c_board_info imx074_info = {
913 I2C_BOARD_INFO("imx074", 0x1a), 913 I2C_BOARD_INFO("imx074", 0x1a),
914}; 914};
915 915
916struct soc_camera_link imx074_link = { 916static struct soc_camera_link imx074_link = {
917 .bus_id = 0, 917 .bus_id = 0,
918 .board_info = &imx074_info, 918 .board_info = &imx074_info,
919 .i2c_adapter_id = 0, 919 .i2c_adapter_id = 0,
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 7e1d37584321..3802f2afabef 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1287,9 +1287,9 @@ static struct platform_device *mackerel_devices[] __initdata = {
1287 &nor_flash_device, 1287 &nor_flash_device,
1288 &smc911x_device, 1288 &smc911x_device,
1289 &lcdc_device, 1289 &lcdc_device,
1290 &usbhs0_device,
1291 &usb1_host_device, 1290 &usb1_host_device,
1292 &usbhs1_device, 1291 &usbhs1_device,
1292 &usbhs0_device,
1293 &leds_device, 1293 &leds_device,
1294 &fsi_device, 1294 &fsi_device,
1295 &fsi_ak4643_device, 1295 &fsi_ak4643_device,
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index fd4cf1ca5efd..70cdbd60596a 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -110,10 +110,18 @@ static pin_cfg_t mop500_pins_common[] = {
110 GPIO168_KP_O0, 110 GPIO168_KP_O0,
111 111
112 /* UART */ 112 /* UART */
113 GPIO0_U0_CTSn | PIN_INPUT_PULLUP, 113 /* uart-0 pins gpio configuration should be
114 GPIO1_U0_RTSn | PIN_OUTPUT_HIGH, 114 * kept intact to prevent glitch in tx line
115 GPIO2_U0_RXD | PIN_INPUT_PULLUP, 115 * when tty dev is opened. Later these pins
116 GPIO3_U0_TXD | PIN_OUTPUT_HIGH, 116 * are configured to uart mop500_pins_uart0
117 *
118 * It will be replaced with uart configuration
119 * once the issue is solved.
120 */
121 GPIO0_GPIO | PIN_INPUT_PULLUP,
122 GPIO1_GPIO | PIN_OUTPUT_HIGH,
123 GPIO2_GPIO | PIN_INPUT_PULLUP,
124 GPIO3_GPIO | PIN_OUTPUT_HIGH,
117 125
118 GPIO29_U2_RXD | PIN_INPUT_PULLUP, 126 GPIO29_U2_RXD | PIN_INPUT_PULLUP,
119 GPIO30_U2_TXD | PIN_OUTPUT_HIGH, 127 GPIO30_U2_TXD | PIN_OUTPUT_HIGH,
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index bb26f40493e6..2a08c07dec6d 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -27,18 +27,21 @@
27#include <linux/leds-lp5521.h> 27#include <linux/leds-lp5521.h>
28#include <linux/input.h> 28#include <linux/input.h>
29#include <linux/gpio_keys.h> 29#include <linux/gpio_keys.h>
30#include <linux/delay.h>
30 31
31#include <asm/mach-types.h> 32#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
33 34
34#include <plat/i2c.h> 35#include <plat/i2c.h>
35#include <plat/ste_dma40.h> 36#include <plat/ste_dma40.h>
37#include <plat/pincfg.h>
36 38
37#include <mach/hardware.h> 39#include <mach/hardware.h>
38#include <mach/setup.h> 40#include <mach/setup.h>
39#include <mach/devices.h> 41#include <mach/devices.h>
40#include <mach/irqs.h> 42#include <mach/irqs.h>
41 43
44#include "pins-db8500.h"
42#include "ste-dma40-db8500.h" 45#include "ste-dma40-db8500.h"
43#include "devices-db8500.h" 46#include "devices-db8500.h"
44#include "board-mop500.h" 47#include "board-mop500.h"
@@ -393,12 +396,63 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
393}; 396};
394#endif 397#endif
395 398
399
400static pin_cfg_t mop500_pins_uart0[] = {
401 GPIO0_U0_CTSn | PIN_INPUT_PULLUP,
402 GPIO1_U0_RTSn | PIN_OUTPUT_HIGH,
403 GPIO2_U0_RXD | PIN_INPUT_PULLUP,
404 GPIO3_U0_TXD | PIN_OUTPUT_HIGH,
405};
406
407#define PRCC_K_SOFTRST_SET 0x18
408#define PRCC_K_SOFTRST_CLEAR 0x1C
409static void ux500_uart0_reset(void)
410{
411 void __iomem *prcc_rst_set, *prcc_rst_clr;
412
413 prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
414 PRCC_K_SOFTRST_SET);
415 prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
416 PRCC_K_SOFTRST_CLEAR);
417
418 /* Activate soft reset PRCC_K_SOFTRST_CLEAR */
419 writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
420 udelay(1);
421
422 /* Release soft reset PRCC_K_SOFTRST_SET */
423 writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
424 udelay(1);
425}
426
427static void ux500_uart0_init(void)
428{
429 int ret;
430
431 ret = nmk_config_pins(mop500_pins_uart0,
432 ARRAY_SIZE(mop500_pins_uart0));
433 if (ret < 0)
434 pr_err("pl011: uart pins_enable failed\n");
435}
436
437static void ux500_uart0_exit(void)
438{
439 int ret;
440
441 ret = nmk_config_pins_sleep(mop500_pins_uart0,
442 ARRAY_SIZE(mop500_pins_uart0));
443 if (ret < 0)
444 pr_err("pl011: uart pins_disable failed\n");
445}
446
396static struct amba_pl011_data uart0_plat = { 447static struct amba_pl011_data uart0_plat = {
397#ifdef CONFIG_STE_DMA40 448#ifdef CONFIG_STE_DMA40
398 .dma_filter = stedma40_filter, 449 .dma_filter = stedma40_filter,
399 .dma_rx_param = &uart0_dma_cfg_rx, 450 .dma_rx_param = &uart0_dma_cfg_rx,
400 .dma_tx_param = &uart0_dma_cfg_tx, 451 .dma_tx_param = &uart0_dma_cfg_tx,
401#endif 452#endif
453 .init = ux500_uart0_init,
454 .exit = ux500_uart0_exit,
455 .reset = ux500_uart0_reset,
402}; 456};
403 457
404static struct amba_pl011_data uart1_plat = { 458static struct amba_pl011_data uart1_plat = {
diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c
index 245140c0df10..642de0408f25 100644
--- a/arch/arm/mach-vt8500/irq.c
+++ b/arch/arm/mach-vt8500/irq.c
@@ -39,9 +39,10 @@
39static void __iomem *ic_regbase; 39static void __iomem *ic_regbase;
40static void __iomem *sic_regbase; 40static void __iomem *sic_regbase;
41 41
42static void vt8500_irq_mask(unsigned int irq) 42static void vt8500_irq_mask(struct irq_data *d)
43{ 43{
44 void __iomem *base = ic_regbase; 44 void __iomem *base = ic_regbase;
45 unsigned irq = d->irq;
45 u8 edge; 46 u8 edge;
46 47
47 if (irq >= 64) { 48 if (irq >= 64) {
@@ -64,9 +65,10 @@ static void vt8500_irq_mask(unsigned int irq)
64 } 65 }
65} 66}
66 67
67static void vt8500_irq_unmask(unsigned int irq) 68static void vt8500_irq_unmask(struct irq_data *d)
68{ 69{
69 void __iomem *base = ic_regbase; 70 void __iomem *base = ic_regbase;
71 unsigned irq = d->irq;
70 u8 dctr; 72 u8 dctr;
71 73
72 if (irq >= 64) { 74 if (irq >= 64) {
@@ -78,10 +80,11 @@ static void vt8500_irq_unmask(unsigned int irq)
78 writeb(dctr, base + VT8500_IC_DCTR + irq); 80 writeb(dctr, base + VT8500_IC_DCTR + irq);
79} 81}
80 82
81static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type) 83static int vt8500_irq_set_type(struct irq_data *d, unsigned int flow_type)
82{ 84{
83 void __iomem *base = ic_regbase; 85 void __iomem *base = ic_regbase;
84 unsigned int orig_irq = irq; 86 unsigned irq = d->irq;
87 unsigned orig_irq = irq;
85 u8 dctr; 88 u8 dctr;
86 89
87 if (irq >= 64) { 90 if (irq >= 64) {
@@ -114,11 +117,11 @@ static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type)
114} 117}
115 118
116static struct irq_chip vt8500_irq_chip = { 119static struct irq_chip vt8500_irq_chip = {
117 .name = "vt8500", 120 .name = "vt8500",
118 .ack = vt8500_irq_mask, 121 .irq_ack = vt8500_irq_mask,
119 .mask = vt8500_irq_mask, 122 .irq_mask = vt8500_irq_mask,
120 .unmask = vt8500_irq_unmask, 123 .irq_unmask = vt8500_irq_unmask,
121 .set_type = vt8500_irq_set_type, 124 .irq_set_type = vt8500_irq_set_type,
122}; 125};
123 126
124void __init vt8500_init_irq(void) 127void __init vt8500_init_irq(void)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index ef59099a5463..44c086710d2b 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -120,17 +120,22 @@ static void l2x0_cache_sync(void)
120 spin_unlock_irqrestore(&l2x0_lock, flags); 120 spin_unlock_irqrestore(&l2x0_lock, flags);
121} 121}
122 122
123static void l2x0_flush_all(void) 123static void __l2x0_flush_all(void)
124{ 124{
125 unsigned long flags;
126
127 /* clean all ways */
128 spin_lock_irqsave(&l2x0_lock, flags);
129 debug_writel(0x03); 125 debug_writel(0x03);
130 writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY); 126 writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY);
131 cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask); 127 cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask);
132 cache_sync(); 128 cache_sync();
133 debug_writel(0x00); 129 debug_writel(0x00);
130}
131
132static void l2x0_flush_all(void)
133{
134 unsigned long flags;
135
136 /* clean all ways */
137 spin_lock_irqsave(&l2x0_lock, flags);
138 __l2x0_flush_all();
134 spin_unlock_irqrestore(&l2x0_lock, flags); 139 spin_unlock_irqrestore(&l2x0_lock, flags);
135} 140}
136 141
@@ -266,7 +271,9 @@ static void l2x0_disable(void)
266 unsigned long flags; 271 unsigned long flags;
267 272
268 spin_lock_irqsave(&l2x0_lock, flags); 273 spin_lock_irqsave(&l2x0_lock, flags);
269 writel(0, l2x0_base + L2X0_CTRL); 274 __l2x0_flush_all();
275 writel_relaxed(0, l2x0_base + L2X0_CTRL);
276 dsb();
270 spin_unlock_irqrestore(&l2x0_lock, flags); 277 spin_unlock_irqrestore(&l2x0_lock, flags);
271} 278}
272 279
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 9d9e736c2b4f..594d677b92c8 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -759,7 +759,7 @@ early_param("vmalloc", early_vmalloc);
759 759
760static phys_addr_t lowmem_limit __initdata = 0; 760static phys_addr_t lowmem_limit __initdata = 0;
761 761
762static void __init sanity_check_meminfo(void) 762void __init sanity_check_meminfo(void)
763{ 763{
764 int i, j, highmem = 0; 764 int i, j, highmem = 0;
765 765
@@ -1032,8 +1032,9 @@ void __init paging_init(struct machine_desc *mdesc)
1032{ 1032{
1033 void *zero_page; 1033 void *zero_page;
1034 1034
1035 memblock_set_current_limit(lowmem_limit);
1036
1035 build_mem_type_table(); 1037 build_mem_type_table();
1036 sanity_check_meminfo();
1037 prepare_page_table(); 1038 prepare_page_table();
1038 map_lowmem(); 1039 map_lowmem();
1039 devicemaps_init(mdesc); 1040 devicemaps_init(mdesc);
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 687d02319a41..941a98c9e8aa 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -27,6 +27,10 @@ void __init arm_mm_memblock_reserve(void)
27 memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE); 27 memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE);
28} 28}
29 29
30void __init sanity_check_meminfo(void)
31{
32}
33
30/* 34/*
31 * paging_init() sets up the page tables, initialises the zone memory 35 * paging_init() sets up the page tables, initialises the zone memory
32 * maps, and sets up the zero page, bad page and bad page tables. 36 * maps, and sets up the zero page, bad page and bad page tables.
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 2abf9660bc6c..a79a8ccd25f6 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1027,17 +1027,13 @@ int s3c2410_dma_config(unsigned int channel,
1027 struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); 1027 struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
1028 unsigned int dcon; 1028 unsigned int dcon;
1029 1029
1030 pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", 1030 pr_debug("%s: chan=%d, xfer_unit=%d\n", __func__, channel, xferunit);
1031 __func__, channel, xferunit, dcon);
1032 1031
1033 if (chan == NULL) 1032 if (chan == NULL)
1034 return -EINVAL; 1033 return -EINVAL;
1035 1034
1036 pr_debug("%s: Initial dcon is %08x\n", __func__, dcon);
1037
1038 dcon = chan->dcon & dma_sel.dcon_mask; 1035 dcon = chan->dcon & dma_sel.dcon_mask;
1039 1036 pr_debug("%s: dcon is %08x\n", __func__, dcon);
1040 pr_debug("%s: New dcon is %08x\n", __func__, dcon);
1041 1037
1042 switch (chan->req_ch) { 1038 switch (chan->req_ch) {
1043 case DMACH_I2S_IN: 1039 case DMACH_I2S_IN:
@@ -1235,7 +1231,7 @@ static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp)
1235 /* restore channel's hardware configuration */ 1231 /* restore channel's hardware configuration */
1236 1232
1237 if (!cp->in_use) 1233 if (!cp->in_use)
1238 return 0; 1234 return;
1239 1235
1240 printk(KERN_INFO "dma%d: restoring configuration\n", cp->number); 1236 printk(KERN_INFO "dma%d: restoring configuration\n", cp->number);
1241 1237
@@ -1246,8 +1242,6 @@ static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp)
1246 1242
1247 if (cp->map != NULL) 1243 if (cp->map != NULL)
1248 dma_sel.select(cp, cp->map); 1244 dma_sel.select(cp, cp->map);
1249
1250 return 0;
1251} 1245}
1252 1246
1253static void s3c2410_dma_resume(void) 1247static void s3c2410_dma_resume(void)
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c
index 899a8cc011ff..612934c48b0d 100644
--- a/arch/arm/plat-s5p/s5p-time.c
+++ b/arch/arm/plat-s5p/s5p-time.c
@@ -370,11 +370,11 @@ static void __init s5p_clocksource_init(void)
370 370
371 clock_rate = clk_get_rate(tin_source); 371 clock_rate = clk_get_rate(tin_source);
372 372
373 init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
374
375 s5p_time_setup(timer_source.source_id, TCNT_MAX); 373 s5p_time_setup(timer_source.source_id, TCNT_MAX);
376 s5p_time_start(timer_source.source_id, PERIODIC); 374 s5p_time_start(timer_source.source_id, PERIODIC);
377 375
376 init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
377
378 if (clocksource_register_hz(&time_clocksource, clock_rate)) 378 if (clocksource_register_hz(&time_clocksource, clock_rate))
379 panic("%s: can't register clocksource\n", time_clocksource.name); 379 panic("%s: can't register clocksource\n", time_clocksource.name);
380} 380}
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 4af108ff4112..e3b31c26ac3e 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -12,6 +12,10 @@
12 * it under the terms of the GNU General Public License version 2 as 12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14*/ 14*/
15
16#ifndef __PLAT_DEVS_H
17#define __PLAT_DEVS_H __FILE__
18
15#include <linux/platform_device.h> 19#include <linux/platform_device.h>
16 20
17struct s3c24xx_uart_resources { 21struct s3c24xx_uart_resources {
@@ -159,3 +163,5 @@ extern struct platform_device s3c_device_ac97;
159 */ 163 */
160extern void *s3c_set_platdata(void *pd, size_t pdsize, 164extern void *s3c_set_platdata(void *pd, size_t pdsize,
161 struct platform_device *pdev); 165 struct platform_device *pdev);
166
167#endif /* __PLAT_DEVS_H */
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index c151c5f94a87..116edfe120b9 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -224,6 +224,8 @@
224#define S5PV210_UFSTAT_RXMASK (255<<0) 224#define S5PV210_UFSTAT_RXMASK (255<<0)
225#define S5PV210_UFSTAT_RXSHIFT (0) 225#define S5PV210_UFSTAT_RXSHIFT (0)
226 226
227#define NO_NEED_CHECK_CLKSRC 1
228
227#ifndef __ASSEMBLY__ 229#ifndef __ASSEMBLY__
228 230
229/* struct s3c24xx_uart_clksrc 231/* struct s3c24xx_uart_clksrc
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index 0ffe34a21554..4c16fa3621bb 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -39,6 +39,7 @@ struct s3c64xx_spi_csinfo {
39 * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6 39 * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6
40 * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number 40 * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number
41 * @high_speed: If the controller supports HIGH_SPEED_EN bit 41 * @high_speed: If the controller supports HIGH_SPEED_EN bit
42 * @tx_st_done: Depends on tx fifo_lvl field
42 */ 43 */
43struct s3c64xx_spi_info { 44struct s3c64xx_spi_info {
44 int src_clk_nr; 45 int src_clk_nr;
@@ -53,6 +54,7 @@ struct s3c64xx_spi_info {
53 int fifo_lvl_mask; 54 int fifo_lvl_mask;
54 int rx_lvl_offset; 55 int rx_lvl_offset;
55 int high_speed; 56 int high_speed;
57 int tx_st_done;
56}; 58};
57 59
58/** 60/**
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index 4f685a779f4c..98d9426d4b85 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -209,8 +209,10 @@
209 wm8776:codec@1a { 209 wm8776:codec@1a {
210 compatible = "wlf,wm8776"; 210 compatible = "wlf,wm8776";
211 reg = <0x1a>; 211 reg = <0x1a>;
212 /* MCLK source is a stand-alone oscillator */ 212 /*
213 clock-frequency = <12288000>; 213 * clock-frequency will be set by U-Boot if
214 * the clock is enabled.
215 */
214 }; 216 };
215 }; 217 };
216 218
@@ -280,7 +282,8 @@
280 codec-handle = <&wm8776>; 282 codec-handle = <&wm8776>;
281 fsl,playback-dma = <&dma00>; 283 fsl,playback-dma = <&dma00>;
282 fsl,capture-dma = <&dma01>; 284 fsl,capture-dma = <&dma01>;
283 fsl,fifo-depth = <16>; 285 fsl,fifo-depth = <15>;
286 fsl,ssi-asynchronous;
284 }; 287 };
285 288
286 dma@c300 { 289 dma@c300 {
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index c9f212b5f3de..80bc5de7ee1d 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -148,7 +148,6 @@ CONFIG_SCSI_SAS_ATTRS=m
148CONFIG_SCSI_CXGB3_ISCSI=m 148CONFIG_SCSI_CXGB3_ISCSI=m
149CONFIG_SCSI_CXGB4_ISCSI=m 149CONFIG_SCSI_CXGB4_ISCSI=m
150CONFIG_SCSI_BNX2_ISCSI=m 150CONFIG_SCSI_BNX2_ISCSI=m
151CONFIG_SCSI_BNX2_ISCSI=m
152CONFIG_BE2ISCSI=m 151CONFIG_BE2ISCSI=m
153CONFIG_SCSI_IBMVSCSI=y 152CONFIG_SCSI_IBMVSCSI=y
154CONFIG_SCSI_IBMVFC=m 153CONFIG_SCSI_IBMVFC=m
diff --git a/arch/powerpc/kernel/rtas-rtc.c b/arch/powerpc/kernel/rtas-rtc.c
index 77578c093dda..c57c19358a26 100644
--- a/arch/powerpc/kernel/rtas-rtc.c
+++ b/arch/powerpc/kernel/rtas-rtc.c
@@ -4,6 +4,7 @@
4#include <linux/init.h> 4#include <linux/init.h>
5#include <linux/rtc.h> 5#include <linux/rtc.h>
6#include <linux/delay.h> 6#include <linux/delay.h>
7#include <linux/ratelimit.h>
7#include <asm/prom.h> 8#include <asm/prom.h>
8#include <asm/rtas.h> 9#include <asm/rtas.h>
9#include <asm/time.h> 10#include <asm/time.h>
@@ -29,9 +30,10 @@ unsigned long __init rtas_get_boot_time(void)
29 } 30 }
30 } while (wait_time && (get_tb() < max_wait_tb)); 31 } while (wait_time && (get_tb() < max_wait_tb));
31 32
32 if (error != 0 && printk_ratelimit()) { 33 if (error != 0) {
33 printk(KERN_WARNING "error: reading the clock failed (%d)\n", 34 printk_ratelimited(KERN_WARNING
34 error); 35 "error: reading the clock failed (%d)\n",
36 error);
35 return 0; 37 return 0;
36 } 38 }
37 39
@@ -55,19 +57,21 @@ void rtas_get_rtc_time(struct rtc_time *rtc_tm)
55 57
56 wait_time = rtas_busy_delay_time(error); 58 wait_time = rtas_busy_delay_time(error);
57 if (wait_time) { 59 if (wait_time) {
58 if (in_interrupt() && printk_ratelimit()) { 60 if (in_interrupt()) {
59 memset(rtc_tm, 0, sizeof(struct rtc_time)); 61 memset(rtc_tm, 0, sizeof(struct rtc_time));
60 printk(KERN_WARNING "error: reading clock" 62 printk_ratelimited(KERN_WARNING
61 " would delay interrupt\n"); 63 "error: reading clock "
64 "would delay interrupt\n");
62 return; /* delay not allowed */ 65 return; /* delay not allowed */
63 } 66 }
64 msleep(wait_time); 67 msleep(wait_time);
65 } 68 }
66 } while (wait_time && (get_tb() < max_wait_tb)); 69 } while (wait_time && (get_tb() < max_wait_tb));
67 70
68 if (error != 0 && printk_ratelimit()) { 71 if (error != 0) {
69 printk(KERN_WARNING "error: reading the clock failed (%d)\n", 72 printk_ratelimited(KERN_WARNING
70 error); 73 "error: reading the clock failed (%d)\n",
74 error);
71 return; 75 return;
72 } 76 }
73 77
@@ -99,9 +103,10 @@ int rtas_set_rtc_time(struct rtc_time *tm)
99 } 103 }
100 } while (wait_time && (get_tb() < max_wait_tb)); 104 } while (wait_time && (get_tb() < max_wait_tb));
101 105
102 if (error != 0 && printk_ratelimit()) 106 if (error != 0)
103 printk(KERN_WARNING "error: setting the clock failed (%d)\n", 107 printk_ratelimited(KERN_WARNING
104 error); 108 "error: setting the clock failed (%d)\n",
109 error);
105 110
106 return 0; 111 return 0;
107} 112}
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index b96a3a010c26..78b76dc54dfb 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -25,6 +25,7 @@
25#include <linux/errno.h> 25#include <linux/errno.h>
26#include <linux/elf.h> 26#include <linux/elf.h>
27#include <linux/ptrace.h> 27#include <linux/ptrace.h>
28#include <linux/ratelimit.h>
28#ifdef CONFIG_PPC64 29#ifdef CONFIG_PPC64
29#include <linux/syscalls.h> 30#include <linux/syscalls.h>
30#include <linux/compat.h> 31#include <linux/compat.h>
@@ -892,11 +893,12 @@ badframe:
892 printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n", 893 printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
893 regs, frame, newsp); 894 regs, frame, newsp);
894#endif 895#endif
895 if (show_unhandled_signals && printk_ratelimit()) 896 if (show_unhandled_signals)
896 printk(KERN_INFO "%s[%d]: bad frame in handle_rt_signal32: " 897 printk_ratelimited(KERN_INFO
897 "%p nip %08lx lr %08lx\n", 898 "%s[%d]: bad frame in handle_rt_signal32: "
898 current->comm, current->pid, 899 "%p nip %08lx lr %08lx\n",
899 addr, regs->nip, regs->link); 900 current->comm, current->pid,
901 addr, regs->nip, regs->link);
900 902
901 force_sigsegv(sig, current); 903 force_sigsegv(sig, current);
902 return 0; 904 return 0;
@@ -1058,11 +1060,12 @@ long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1058 return 0; 1060 return 0;
1059 1061
1060 bad: 1062 bad:
1061 if (show_unhandled_signals && printk_ratelimit()) 1063 if (show_unhandled_signals)
1062 printk(KERN_INFO "%s[%d]: bad frame in sys_rt_sigreturn: " 1064 printk_ratelimited(KERN_INFO
1063 "%p nip %08lx lr %08lx\n", 1065 "%s[%d]: bad frame in sys_rt_sigreturn: "
1064 current->comm, current->pid, 1066 "%p nip %08lx lr %08lx\n",
1065 rt_sf, regs->nip, regs->link); 1067 current->comm, current->pid,
1068 rt_sf, regs->nip, regs->link);
1066 1069
1067 force_sig(SIGSEGV, current); 1070 force_sig(SIGSEGV, current);
1068 return 0; 1071 return 0;
@@ -1149,12 +1152,12 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
1149 * We kill the task with a SIGSEGV in this situation. 1152 * We kill the task with a SIGSEGV in this situation.
1150 */ 1153 */
1151 if (do_setcontext(ctx, regs, 1)) { 1154 if (do_setcontext(ctx, regs, 1)) {
1152 if (show_unhandled_signals && printk_ratelimit()) 1155 if (show_unhandled_signals)
1153 printk(KERN_INFO "%s[%d]: bad frame in " 1156 printk_ratelimited(KERN_INFO "%s[%d]: bad frame in "
1154 "sys_debug_setcontext: %p nip %08lx " 1157 "sys_debug_setcontext: %p nip %08lx "
1155 "lr %08lx\n", 1158 "lr %08lx\n",
1156 current->comm, current->pid, 1159 current->comm, current->pid,
1157 ctx, regs->nip, regs->link); 1160 ctx, regs->nip, regs->link);
1158 1161
1159 force_sig(SIGSEGV, current); 1162 force_sig(SIGSEGV, current);
1160 goto out; 1163 goto out;
@@ -1236,11 +1239,12 @@ badframe:
1236 printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n", 1239 printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n",
1237 regs, frame, newsp); 1240 regs, frame, newsp);
1238#endif 1241#endif
1239 if (show_unhandled_signals && printk_ratelimit()) 1242 if (show_unhandled_signals)
1240 printk(KERN_INFO "%s[%d]: bad frame in handle_signal32: " 1243 printk_ratelimited(KERN_INFO
1241 "%p nip %08lx lr %08lx\n", 1244 "%s[%d]: bad frame in handle_signal32: "
1242 current->comm, current->pid, 1245 "%p nip %08lx lr %08lx\n",
1243 frame, regs->nip, regs->link); 1246 current->comm, current->pid,
1247 frame, regs->nip, regs->link);
1244 1248
1245 force_sigsegv(sig, current); 1249 force_sigsegv(sig, current);
1246 return 0; 1250 return 0;
@@ -1288,11 +1292,12 @@ long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1288 return 0; 1292 return 0;
1289 1293
1290badframe: 1294badframe:
1291 if (show_unhandled_signals && printk_ratelimit()) 1295 if (show_unhandled_signals)
1292 printk(KERN_INFO "%s[%d]: bad frame in sys_sigreturn: " 1296 printk_ratelimited(KERN_INFO
1293 "%p nip %08lx lr %08lx\n", 1297 "%s[%d]: bad frame in sys_sigreturn: "
1294 current->comm, current->pid, 1298 "%p nip %08lx lr %08lx\n",
1295 addr, regs->nip, regs->link); 1299 current->comm, current->pid,
1300 addr, regs->nip, regs->link);
1296 1301
1297 force_sig(SIGSEGV, current); 1302 force_sig(SIGSEGV, current);
1298 return 0; 1303 return 0;
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index da989fff19cc..e91c736cc842 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -24,6 +24,7 @@
24#include <linux/elf.h> 24#include <linux/elf.h>
25#include <linux/ptrace.h> 25#include <linux/ptrace.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/ratelimit.h>
27 28
28#include <asm/sigcontext.h> 29#include <asm/sigcontext.h>
29#include <asm/ucontext.h> 30#include <asm/ucontext.h>
@@ -380,10 +381,10 @@ badframe:
380 printk("badframe in sys_rt_sigreturn, regs=%p uc=%p &uc->uc_mcontext=%p\n", 381 printk("badframe in sys_rt_sigreturn, regs=%p uc=%p &uc->uc_mcontext=%p\n",
381 regs, uc, &uc->uc_mcontext); 382 regs, uc, &uc->uc_mcontext);
382#endif 383#endif
383 if (show_unhandled_signals && printk_ratelimit()) 384 if (show_unhandled_signals)
384 printk(regs->msr & MSR_64BIT ? fmt64 : fmt32, 385 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
385 current->comm, current->pid, "rt_sigreturn", 386 current->comm, current->pid, "rt_sigreturn",
386 (long)uc, regs->nip, regs->link); 387 (long)uc, regs->nip, regs->link);
387 388
388 force_sig(SIGSEGV, current); 389 force_sig(SIGSEGV, current);
389 return 0; 390 return 0;
@@ -468,10 +469,10 @@ badframe:
468 printk("badframe in setup_rt_frame, regs=%p frame=%p newsp=%lx\n", 469 printk("badframe in setup_rt_frame, regs=%p frame=%p newsp=%lx\n",
469 regs, frame, newsp); 470 regs, frame, newsp);
470#endif 471#endif
471 if (show_unhandled_signals && printk_ratelimit()) 472 if (show_unhandled_signals)
472 printk(regs->msr & MSR_64BIT ? fmt64 : fmt32, 473 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
473 current->comm, current->pid, "setup_rt_frame", 474 current->comm, current->pid, "setup_rt_frame",
474 (long)frame, regs->nip, regs->link); 475 (long)frame, regs->nip, regs->link);
475 476
476 force_sigsegv(signr, current); 477 force_sigsegv(signr, current);
477 return 0; 478 return 0;
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 0ff4ab98d50c..1a0141426cda 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -34,6 +34,7 @@
34#include <linux/bug.h> 34#include <linux/bug.h>
35#include <linux/kdebug.h> 35#include <linux/kdebug.h>
36#include <linux/debugfs.h> 36#include <linux/debugfs.h>
37#include <linux/ratelimit.h>
37 38
38#include <asm/emulated_ops.h> 39#include <asm/emulated_ops.h>
39#include <asm/pgtable.h> 40#include <asm/pgtable.h>
@@ -197,12 +198,11 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
197 if (die("Exception in kernel mode", regs, signr)) 198 if (die("Exception in kernel mode", regs, signr))
198 return; 199 return;
199 } else if (show_unhandled_signals && 200 } else if (show_unhandled_signals &&
200 unhandled_signal(current, signr) && 201 unhandled_signal(current, signr)) {
201 printk_ratelimit()) { 202 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
202 printk(regs->msr & MSR_64BIT ? fmt64 : fmt32, 203 current->comm, current->pid, signr,
203 current->comm, current->pid, signr, 204 addr, regs->nip, regs->link, code);
204 addr, regs->nip, regs->link, code); 205 }
205 }
206 206
207 memset(&info, 0, sizeof(info)); 207 memset(&info, 0, sizeof(info));
208 info.si_signo = signr; 208 info.si_signo = signr;
@@ -425,7 +425,7 @@ int machine_check_e500mc(struct pt_regs *regs)
425 unsigned long reason = mcsr; 425 unsigned long reason = mcsr;
426 int recoverable = 1; 426 int recoverable = 1;
427 427
428 if (reason & MCSR_BUS_RBERR) { 428 if (reason & MCSR_LD) {
429 recoverable = fsl_rio_mcheck_exception(regs); 429 recoverable = fsl_rio_mcheck_exception(regs);
430 if (recoverable == 1) 430 if (recoverable == 1)
431 goto silent_out; 431 goto silent_out;
@@ -1342,9 +1342,8 @@ void altivec_assist_exception(struct pt_regs *regs)
1342 } else { 1342 } else {
1343 /* didn't recognize the instruction */ 1343 /* didn't recognize the instruction */
1344 /* XXX quick hack for now: set the non-Java bit in the VSCR */ 1344 /* XXX quick hack for now: set the non-Java bit in the VSCR */
1345 if (printk_ratelimit()) 1345 printk_ratelimited(KERN_ERR "Unrecognized altivec instruction "
1346 printk(KERN_ERR "Unrecognized altivec instruction " 1346 "in %s at %lx\n", current->comm, regs->nip);
1347 "in %s at %lx\n", current->comm, regs->nip);
1348 current->thread.vscr.u[3] |= 0x10000; 1347 current->thread.vscr.u[3] |= 0x10000;
1349 } 1348 }
1350} 1349}
@@ -1548,9 +1547,8 @@ u32 ppc_warn_emulated;
1548 1547
1549void ppc_warn_emulated_print(const char *type) 1548void ppc_warn_emulated_print(const char *type)
1550{ 1549{
1551 if (printk_ratelimit()) 1550 pr_warn_ratelimited("%s used emulated %s instruction\n", current->comm,
1552 pr_warning("%s used emulated %s instruction\n", current->comm, 1551 type);
1553 type);
1554} 1552}
1555 1553
1556static int __init ppc_warn_emulated_init(void) 1554static int __init ppc_warn_emulated_init(void)
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 54f4fb994e99..ad35f66c69e8 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -31,6 +31,7 @@
31#include <linux/kdebug.h> 31#include <linux/kdebug.h>
32#include <linux/perf_event.h> 32#include <linux/perf_event.h>
33#include <linux/magic.h> 33#include <linux/magic.h>
34#include <linux/ratelimit.h>
34 35
35#include <asm/firmware.h> 36#include <asm/firmware.h>
36#include <asm/page.h> 37#include <asm/page.h>
@@ -346,11 +347,10 @@ bad_area_nosemaphore:
346 return 0; 347 return 0;
347 } 348 }
348 349
349 if (is_exec && (error_code & DSISR_PROTFAULT) 350 if (is_exec && (error_code & DSISR_PROTFAULT))
350 && printk_ratelimit()) 351 printk_ratelimited(KERN_CRIT "kernel tried to execute NX-protected"
351 printk(KERN_CRIT "kernel tried to execute NX-protected" 352 " page (%lx) - exploit attempt? (uid: %d)\n",
352 " page (%lx) - exploit attempt? (uid: %d)\n", 353 address, current_uid());
353 address, current_uid());
354 354
355 return SIGSEGV; 355 return SIGSEGV;
356 356
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 5b206a2fe17c..b3fd081d56f5 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -283,23 +283,24 @@ static void __iomem *rio_regs_win;
283#ifdef CONFIG_E500 283#ifdef CONFIG_E500
284int fsl_rio_mcheck_exception(struct pt_regs *regs) 284int fsl_rio_mcheck_exception(struct pt_regs *regs)
285{ 285{
286 const struct exception_table_entry *entry = NULL; 286 const struct exception_table_entry *entry;
287 unsigned long reason = mfspr(SPRN_MCSR); 287 unsigned long reason;
288 288
289 if (reason & MCSR_BUS_RBERR) { 289 if (!rio_regs_win)
290 reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR)); 290 return 0;
291 if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) { 291
292 /* Check if we are prepared to handle this fault */ 292 reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR));
293 entry = search_exception_tables(regs->nip); 293 if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) {
294 if (entry) { 294 /* Check if we are prepared to handle this fault */
295 pr_debug("RIO: %s - MC Exception handled\n", 295 entry = search_exception_tables(regs->nip);
296 __func__); 296 if (entry) {
297 out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 297 pr_debug("RIO: %s - MC Exception handled\n",
298 0); 298 __func__);
299 regs->msr |= MSR_RI; 299 out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR),
300 regs->nip = entry->fixup; 300 0);
301 return 1; 301 regs->msr |= MSR_RI;
302 } 302 regs->nip = entry->fixup;
303 return 1;
303 } 304 }
304 } 305 }
305 306
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 3a8de5bb628a..58d7a534f877 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -29,6 +29,7 @@
29#include <linux/pci.h> 29#include <linux/pci.h>
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/syscore_ops.h> 31#include <linux/syscore_ops.h>
32#include <linux/ratelimit.h>
32 33
33#include <asm/ptrace.h> 34#include <asm/ptrace.h>
34#include <asm/signal.h> 35#include <asm/signal.h>
@@ -1648,9 +1649,8 @@ static unsigned int _mpic_get_one_irq(struct mpic *mpic, int reg)
1648 return NO_IRQ; 1649 return NO_IRQ;
1649 } 1650 }
1650 if (unlikely(mpic->protected && test_bit(src, mpic->protected))) { 1651 if (unlikely(mpic->protected && test_bit(src, mpic->protected))) {
1651 if (printk_ratelimit()) 1652 printk_ratelimited(KERN_WARNING "%s: Got protected source %d !\n",
1652 printk(KERN_WARNING "%s: Got protected source %d !\n", 1653 mpic->name, (int)src);
1653 mpic->name, (int)src);
1654 mpic_eoi(mpic); 1654 mpic_eoi(mpic);
1655 return NO_IRQ; 1655 return NO_IRQ;
1656 } 1656 }
@@ -1688,9 +1688,8 @@ unsigned int mpic_get_coreint_irq(void)
1688 return NO_IRQ; 1688 return NO_IRQ;
1689 } 1689 }
1690 if (unlikely(mpic->protected && test_bit(src, mpic->protected))) { 1690 if (unlikely(mpic->protected && test_bit(src, mpic->protected))) {
1691 if (printk_ratelimit()) 1691 printk_ratelimited(KERN_WARNING "%s: Got protected source %d !\n",
1692 printk(KERN_WARNING "%s: Got protected source %d !\n", 1692 mpic->name, (int)src);
1693 mpic->name, (int)src);
1694 return NO_IRQ; 1693 return NO_IRQ;
1695 } 1694 }
1696 1695
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index f03338c2f088..bbdeb48bbf8e 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -348,6 +348,7 @@ config CPU_SUBTYPE_SH7720
348 select SYS_SUPPORTS_CMT 348 select SYS_SUPPORTS_CMT
349 select ARCH_WANT_OPTIONAL_GPIOLIB 349 select ARCH_WANT_OPTIONAL_GPIOLIB
350 select USB_ARCH_HAS_OHCI 350 select USB_ARCH_HAS_OHCI
351 select USB_OHCI_SH if USB_OHCI_HCD
351 help 352 help
352 Select SH7720 if you have a SH3-DSP SH7720 CPU. 353 Select SH7720 if you have a SH3-DSP SH7720 CPU.
353 354
@@ -357,6 +358,7 @@ config CPU_SUBTYPE_SH7721
357 select CPU_HAS_DSP 358 select CPU_HAS_DSP
358 select SYS_SUPPORTS_CMT 359 select SYS_SUPPORTS_CMT
359 select USB_ARCH_HAS_OHCI 360 select USB_ARCH_HAS_OHCI
361 select USB_OHCI_SH if USB_OHCI_HCD
360 help 362 help
361 Select SH7721 if you have a SH3-DSP SH7721 CPU. 363 Select SH7721 if you have a SH3-DSP SH7721 CPU.
362 364
@@ -440,6 +442,7 @@ config CPU_SUBTYPE_SH7763
440 bool "Support SH7763 processor" 442 bool "Support SH7763 processor"
441 select CPU_SH4A 443 select CPU_SH4A
442 select USB_ARCH_HAS_OHCI 444 select USB_ARCH_HAS_OHCI
445 select USB_OHCI_SH if USB_OHCI_HCD
443 help 446 help
444 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 447 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
445 448
@@ -467,7 +470,9 @@ config CPU_SUBTYPE_SH7786
467 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 470 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
468 select ARCH_WANT_OPTIONAL_GPIOLIB 471 select ARCH_WANT_OPTIONAL_GPIOLIB
469 select USB_ARCH_HAS_OHCI 472 select USB_ARCH_HAS_OHCI
473 select USB_OHCI_SH if USB_OHCI_HCD
470 select USB_ARCH_HAS_EHCI 474 select USB_ARCH_HAS_EHCI
475 select USB_EHCI_SH if USB_EHCI_HCD
471 476
472config CPU_SUBTYPE_SHX3 477config CPU_SUBTYPE_SHX3
473 bool "Support SH-X3 processor" 478 bool "Support SH-X3 processor"
diff --git a/arch/sh/configs/sh7757lcr_defconfig b/arch/sh/configs/sh7757lcr_defconfig
index 33ddb130a7c8..cfde98ddb29d 100644
--- a/arch/sh/configs/sh7757lcr_defconfig
+++ b/arch/sh/configs/sh7757lcr_defconfig
@@ -9,7 +9,6 @@ CONFIG_TASK_XACCT=y
9CONFIG_TASK_IO_ACCOUNTING=y 9CONFIG_TASK_IO_ACCOUNTING=y
10CONFIG_LOG_BUF_SHIFT=14 10CONFIG_LOG_BUF_SHIFT=14
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
13# CONFIG_SYSCTL_SYSCALL is not set 12# CONFIG_SYSCTL_SYSCALL is not set
14CONFIG_KALLSYMS_ALL=y 13CONFIG_KALLSYMS_ALL=y
15CONFIG_SLAB=y 14CONFIG_SLAB=y
@@ -39,8 +38,6 @@ CONFIG_IPV6=y
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 38CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40# CONFIG_FW_LOADER is not set 39# CONFIG_FW_LOADER is not set
41CONFIG_MTD=y 40CONFIG_MTD=y
42CONFIG_MTD_CONCAT=y
43CONFIG_MTD_PARTITIONS=y
44CONFIG_MTD_CHAR=y 41CONFIG_MTD_CHAR=y
45CONFIG_MTD_BLOCK=y 42CONFIG_MTD_BLOCK=y
46CONFIG_MTD_M25P80=y 43CONFIG_MTD_M25P80=y
@@ -56,18 +53,19 @@ CONFIG_SH_ETH=y
56# CONFIG_KEYBOARD_ATKBD is not set 53# CONFIG_KEYBOARD_ATKBD is not set
57# CONFIG_MOUSE_PS2 is not set 54# CONFIG_MOUSE_PS2 is not set
58# CONFIG_SERIO is not set 55# CONFIG_SERIO is not set
56# CONFIG_LEGACY_PTYS is not set
59CONFIG_SERIAL_SH_SCI=y 57CONFIG_SERIAL_SH_SCI=y
60CONFIG_SERIAL_SH_SCI_NR_UARTS=3 58CONFIG_SERIAL_SH_SCI_NR_UARTS=3
61CONFIG_SERIAL_SH_SCI_CONSOLE=y 59CONFIG_SERIAL_SH_SCI_CONSOLE=y
62# CONFIG_LEGACY_PTYS is not set
63# CONFIG_HW_RANDOM is not set 60# CONFIG_HW_RANDOM is not set
64CONFIG_SPI=y 61CONFIG_SPI=y
65CONFIG_SPI_SH=y 62CONFIG_SPI_SH=y
66# CONFIG_HWMON is not set 63# CONFIG_HWMON is not set
67CONFIG_MFD_SH_MOBILE_SDHI=y
68CONFIG_USB=y 64CONFIG_USB=y
69CONFIG_USB_EHCI_HCD=y 65CONFIG_USB_EHCI_HCD=y
66CONFIG_USB_EHCI_SH=y
70CONFIG_USB_OHCI_HCD=y 67CONFIG_USB_OHCI_HCD=y
68CONFIG_USB_OHCI_SH=y
71CONFIG_USB_STORAGE=y 69CONFIG_USB_STORAGE=y
72CONFIG_MMC=y 70CONFIG_MMC=y
73CONFIG_MMC_SDHI=y 71CONFIG_MMC_SDHI=y
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 423dabf542d3..e915deafac89 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -183,7 +183,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
183 { 183 {
184 .slave_id = SHDMA_SLAVE_SCIF2_RX, 184 .slave_id = SHDMA_SLAVE_SCIF2_RX,
185 .addr = 0x1f4b0014, 185 .addr = 0x1f4b0014,
186 .chcr = SM_INC | 0x800 | 0x40000000 | 186 .chcr = DM_INC | 0x800 | 0x40000000 |
187 TS_INDEX2VAL(XMIT_SZ_8BIT), 187 TS_INDEX2VAL(XMIT_SZ_8BIT),
188 .mid_rid = 0x22, 188 .mid_rid = 0x22,
189 }, 189 },
@@ -197,7 +197,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
197 { 197 {
198 .slave_id = SHDMA_SLAVE_SCIF3_RX, 198 .slave_id = SHDMA_SLAVE_SCIF3_RX,
199 .addr = 0x1f4c0014, 199 .addr = 0x1f4c0014,
200 .chcr = SM_INC | 0x800 | 0x40000000 | 200 .chcr = DM_INC | 0x800 | 0x40000000 |
201 TS_INDEX2VAL(XMIT_SZ_8BIT), 201 TS_INDEX2VAL(XMIT_SZ_8BIT),
202 .mid_rid = 0x2a, 202 .mid_rid = 0x2a,
203 }, 203 },
@@ -211,7 +211,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
211 { 211 {
212 .slave_id = SHDMA_SLAVE_SCIF4_RX, 212 .slave_id = SHDMA_SLAVE_SCIF4_RX,
213 .addr = 0x1f4d0014, 213 .addr = 0x1f4d0014,
214 .chcr = SM_INC | 0x800 | 0x40000000 | 214 .chcr = DM_INC | 0x800 | 0x40000000 |
215 TS_INDEX2VAL(XMIT_SZ_8BIT), 215 TS_INDEX2VAL(XMIT_SZ_8BIT),
216 .mid_rid = 0x42, 216 .mid_rid = 0x42,
217 }, 217 },
@@ -228,7 +228,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
228 { 228 {
229 .slave_id = SHDMA_SLAVE_RIIC0_RX, 229 .slave_id = SHDMA_SLAVE_RIIC0_RX,
230 .addr = 0x1e500013, 230 .addr = 0x1e500013,
231 .chcr = SM_INC | 0x800 | 0x40000000 | 231 .chcr = DM_INC | 0x800 | 0x40000000 |
232 TS_INDEX2VAL(XMIT_SZ_8BIT), 232 TS_INDEX2VAL(XMIT_SZ_8BIT),
233 .mid_rid = 0x22, 233 .mid_rid = 0x22,
234 }, 234 },
@@ -242,7 +242,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
242 { 242 {
243 .slave_id = SHDMA_SLAVE_RIIC1_RX, 243 .slave_id = SHDMA_SLAVE_RIIC1_RX,
244 .addr = 0x1e510013, 244 .addr = 0x1e510013,
245 .chcr = SM_INC | 0x800 | 0x40000000 | 245 .chcr = DM_INC | 0x800 | 0x40000000 |
246 TS_INDEX2VAL(XMIT_SZ_8BIT), 246 TS_INDEX2VAL(XMIT_SZ_8BIT),
247 .mid_rid = 0x2a, 247 .mid_rid = 0x2a,
248 }, 248 },
@@ -256,7 +256,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
256 { 256 {
257 .slave_id = SHDMA_SLAVE_RIIC2_RX, 257 .slave_id = SHDMA_SLAVE_RIIC2_RX,
258 .addr = 0x1e520013, 258 .addr = 0x1e520013,
259 .chcr = SM_INC | 0x800 | 0x40000000 | 259 .chcr = DM_INC | 0x800 | 0x40000000 |
260 TS_INDEX2VAL(XMIT_SZ_8BIT), 260 TS_INDEX2VAL(XMIT_SZ_8BIT),
261 .mid_rid = 0xa2, 261 .mid_rid = 0xa2,
262 }, 262 },
@@ -265,12 +265,12 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
265 .addr = 0x1e530012, 265 .addr = 0x1e530012,
266 .chcr = SM_INC | 0x800 | 0x40000000 | 266 .chcr = SM_INC | 0x800 | 0x40000000 |
267 TS_INDEX2VAL(XMIT_SZ_8BIT), 267 TS_INDEX2VAL(XMIT_SZ_8BIT),
268 .mid_rid = 0xab, 268 .mid_rid = 0xa9,
269 }, 269 },
270 { 270 {
271 .slave_id = SHDMA_SLAVE_RIIC3_RX, 271 .slave_id = SHDMA_SLAVE_RIIC3_RX,
272 .addr = 0x1e530013, 272 .addr = 0x1e530013,
273 .chcr = SM_INC | 0x800 | 0x40000000 | 273 .chcr = DM_INC | 0x800 | 0x40000000 |
274 TS_INDEX2VAL(XMIT_SZ_8BIT), 274 TS_INDEX2VAL(XMIT_SZ_8BIT),
275 .mid_rid = 0xaf, 275 .mid_rid = 0xaf,
276 }, 276 },
@@ -279,14 +279,14 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
279 .addr = 0x1e540012, 279 .addr = 0x1e540012,
280 .chcr = SM_INC | 0x800 | 0x40000000 | 280 .chcr = SM_INC | 0x800 | 0x40000000 |
281 TS_INDEX2VAL(XMIT_SZ_8BIT), 281 TS_INDEX2VAL(XMIT_SZ_8BIT),
282 .mid_rid = 0xc1, 282 .mid_rid = 0xc5,
283 }, 283 },
284 { 284 {
285 .slave_id = SHDMA_SLAVE_RIIC4_RX, 285 .slave_id = SHDMA_SLAVE_RIIC4_RX,
286 .addr = 0x1e540013, 286 .addr = 0x1e540013,
287 .chcr = SM_INC | 0x800 | 0x40000000 | 287 .chcr = DM_INC | 0x800 | 0x40000000 |
288 TS_INDEX2VAL(XMIT_SZ_8BIT), 288 TS_INDEX2VAL(XMIT_SZ_8BIT),
289 .mid_rid = 0xc2, 289 .mid_rid = 0xc6,
290 }, 290 },
291}; 291};
292 292
@@ -301,7 +301,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
301 { 301 {
302 .slave_id = SHDMA_SLAVE_RIIC5_RX, 302 .slave_id = SHDMA_SLAVE_RIIC5_RX,
303 .addr = 0x1e550013, 303 .addr = 0x1e550013,
304 .chcr = SM_INC | 0x800 | 0x40000000 | 304 .chcr = DM_INC | 0x800 | 0x40000000 |
305 TS_INDEX2VAL(XMIT_SZ_8BIT), 305 TS_INDEX2VAL(XMIT_SZ_8BIT),
306 .mid_rid = 0x22, 306 .mid_rid = 0x22,
307 }, 307 },
@@ -315,7 +315,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
315 { 315 {
316 .slave_id = SHDMA_SLAVE_RIIC6_RX, 316 .slave_id = SHDMA_SLAVE_RIIC6_RX,
317 .addr = 0x1e560013, 317 .addr = 0x1e560013,
318 .chcr = SM_INC | 0x800 | 0x40000000 | 318 .chcr = DM_INC | 0x800 | 0x40000000 |
319 TS_INDEX2VAL(XMIT_SZ_8BIT), 319 TS_INDEX2VAL(XMIT_SZ_8BIT),
320 .mid_rid = 0x2a, 320 .mid_rid = 0x2a,
321 }, 321 },
@@ -329,7 +329,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
329 { 329 {
330 .slave_id = SHDMA_SLAVE_RIIC7_RX, 330 .slave_id = SHDMA_SLAVE_RIIC7_RX,
331 .addr = 0x1e570013, 331 .addr = 0x1e570013,
332 .chcr = SM_INC | 0x800 | 0x40000000 | 332 .chcr = DM_INC | 0x800 | 0x40000000 |
333 TS_INDEX2VAL(XMIT_SZ_8BIT), 333 TS_INDEX2VAL(XMIT_SZ_8BIT),
334 .mid_rid = 0x42, 334 .mid_rid = 0x42,
335 }, 335 },
@@ -343,7 +343,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
343 { 343 {
344 .slave_id = SHDMA_SLAVE_RIIC8_RX, 344 .slave_id = SHDMA_SLAVE_RIIC8_RX,
345 .addr = 0x1e580013, 345 .addr = 0x1e580013,
346 .chcr = SM_INC | 0x800 | 0x40000000 | 346 .chcr = DM_INC | 0x800 | 0x40000000 |
347 TS_INDEX2VAL(XMIT_SZ_8BIT), 347 TS_INDEX2VAL(XMIT_SZ_8BIT),
348 .mid_rid = 0x46, 348 .mid_rid = 0x46,
349 }, 349 },
@@ -357,7 +357,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
357 { 357 {
358 .slave_id = SHDMA_SLAVE_RIIC9_RX, 358 .slave_id = SHDMA_SLAVE_RIIC9_RX,
359 .addr = 0x1e590013, 359 .addr = 0x1e590013,
360 .chcr = SM_INC | 0x800 | 0x40000000 | 360 .chcr = DM_INC | 0x800 | 0x40000000 |
361 TS_INDEX2VAL(XMIT_SZ_8BIT), 361 TS_INDEX2VAL(XMIT_SZ_8BIT),
362 .mid_rid = 0x52, 362 .mid_rid = 0x52,
363 }, 363 },
@@ -659,6 +659,54 @@ static struct platform_device spi0_device = {
659 .resource = spi0_resources, 659 .resource = spi0_resources,
660}; 660};
661 661
662static struct resource usb_ehci_resources[] = {
663 [0] = {
664 .start = 0xfe4f1000,
665 .end = 0xfe4f10ff,
666 .flags = IORESOURCE_MEM,
667 },
668 [1] = {
669 .start = 57,
670 .end = 57,
671 .flags = IORESOURCE_IRQ,
672 },
673};
674
675static struct platform_device usb_ehci_device = {
676 .name = "sh_ehci",
677 .id = -1,
678 .dev = {
679 .dma_mask = &usb_ehci_device.dev.coherent_dma_mask,
680 .coherent_dma_mask = DMA_BIT_MASK(32),
681 },
682 .num_resources = ARRAY_SIZE(usb_ehci_resources),
683 .resource = usb_ehci_resources,
684};
685
686static struct resource usb_ohci_resources[] = {
687 [0] = {
688 .start = 0xfe4f1800,
689 .end = 0xfe4f18ff,
690 .flags = IORESOURCE_MEM,
691 },
692 [1] = {
693 .start = 57,
694 .end = 57,
695 .flags = IORESOURCE_IRQ,
696 },
697};
698
699static struct platform_device usb_ohci_device = {
700 .name = "sh_ohci",
701 .id = -1,
702 .dev = {
703 .dma_mask = &usb_ohci_device.dev.coherent_dma_mask,
704 .coherent_dma_mask = DMA_BIT_MASK(32),
705 },
706 .num_resources = ARRAY_SIZE(usb_ohci_resources),
707 .resource = usb_ohci_resources,
708};
709
662static struct platform_device *sh7757_devices[] __initdata = { 710static struct platform_device *sh7757_devices[] __initdata = {
663 &scif2_device, 711 &scif2_device,
664 &scif3_device, 712 &scif3_device,
@@ -670,6 +718,8 @@ static struct platform_device *sh7757_devices[] __initdata = {
670 &dma2_device, 718 &dma2_device,
671 &dma3_device, 719 &dma3_device,
672 &spi0_device, 720 &spi0_device,
721 &usb_ehci_device,
722 &usb_ohci_device,
673}; 723};
674 724
675static int __init sh7757_devices_setup(void) 725static int __init sh7757_devices_setup(void)
@@ -1039,13 +1089,13 @@ static DECLARE_INTC_DESC(intc_desc, "sh7757", vectors, groups,
1039 1089
1040/* Support for external interrupt pins in IRQ mode */ 1090/* Support for external interrupt pins in IRQ mode */
1041static struct intc_vect vectors_irq0123[] __initdata = { 1091static struct intc_vect vectors_irq0123[] __initdata = {
1042 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), 1092 INTC_VECT(IRQ0, 0x200), INTC_VECT(IRQ1, 0x240),
1043 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300), 1093 INTC_VECT(IRQ2, 0x280), INTC_VECT(IRQ3, 0x2c0),
1044}; 1094};
1045 1095
1046static struct intc_vect vectors_irq4567[] __initdata = { 1096static struct intc_vect vectors_irq4567[] __initdata = {
1047 INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380), 1097 INTC_VECT(IRQ4, 0x300), INTC_VECT(IRQ5, 0x340),
1048 INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200), 1098 INTC_VECT(IRQ6, 0x380), INTC_VECT(IRQ7, 0x3c0),
1049}; 1099};
1050 1100
1051static struct intc_sense_reg sense_registers[] __initdata = { 1101static struct intc_sense_reg sense_registers[] __initdata = {
@@ -1079,14 +1129,14 @@ static struct intc_vect vectors_irl0123[] __initdata = {
1079}; 1129};
1080 1130
1081static struct intc_vect vectors_irl4567[] __initdata = { 1131static struct intc_vect vectors_irl4567[] __initdata = {
1082 INTC_VECT(IRL4_LLLL, 0xb00), INTC_VECT(IRL4_LLLH, 0xb20), 1132 INTC_VECT(IRL4_LLLL, 0x200), INTC_VECT(IRL4_LLLH, 0x220),
1083 INTC_VECT(IRL4_LLHL, 0xb40), INTC_VECT(IRL4_LLHH, 0xb60), 1133 INTC_VECT(IRL4_LLHL, 0x240), INTC_VECT(IRL4_LLHH, 0x260),
1084 INTC_VECT(IRL4_LHLL, 0xb80), INTC_VECT(IRL4_LHLH, 0xba0), 1134 INTC_VECT(IRL4_LHLL, 0x280), INTC_VECT(IRL4_LHLH, 0x2a0),
1085 INTC_VECT(IRL4_LHHL, 0xbc0), INTC_VECT(IRL4_LHHH, 0xbe0), 1135 INTC_VECT(IRL4_LHHL, 0x2c0), INTC_VECT(IRL4_LHHH, 0x2e0),
1086 INTC_VECT(IRL4_HLLL, 0xc00), INTC_VECT(IRL4_HLLH, 0xc20), 1136 INTC_VECT(IRL4_HLLL, 0x300), INTC_VECT(IRL4_HLLH, 0x320),
1087 INTC_VECT(IRL4_HLHL, 0xc40), INTC_VECT(IRL4_HLHH, 0xc60), 1137 INTC_VECT(IRL4_HLHL, 0x340), INTC_VECT(IRL4_HLHH, 0x360),
1088 INTC_VECT(IRL4_HHLL, 0xc80), INTC_VECT(IRL4_HHLH, 0xca0), 1138 INTC_VECT(IRL4_HHLL, 0x380), INTC_VECT(IRL4_HHLH, 0x3a0),
1089 INTC_VECT(IRL4_HHHL, 0xcc0), 1139 INTC_VECT(IRL4_HHHL, 0x3c0),
1090}; 1140};
1091 1141
1092static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7757-irl0123", vectors_irl0123, 1142static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7757-irl0123", vectors_irl0123,
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 91971103b62b..a3ee91971129 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -13,6 +13,7 @@
13#include <linux/seq_file.h> 13#include <linux/seq_file.h>
14#include <linux/ftrace.h> 14#include <linux/ftrace.h>
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/ratelimit.h>
16#include <asm/processor.h> 17#include <asm/processor.h>
17#include <asm/machvec.h> 18#include <asm/machvec.h>
18#include <asm/uaccess.h> 19#include <asm/uaccess.h>
@@ -268,9 +269,8 @@ void migrate_irqs(void)
268 unsigned int newcpu = cpumask_any_and(data->affinity, 269 unsigned int newcpu = cpumask_any_and(data->affinity,
269 cpu_online_mask); 270 cpu_online_mask);
270 if (newcpu >= nr_cpu_ids) { 271 if (newcpu >= nr_cpu_ids) {
271 if (printk_ratelimit()) 272 pr_info_ratelimited("IRQ%u no longer affine to CPU%u\n",
272 printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n", 273 irq, cpu);
273 irq, cpu);
274 274
275 cpumask_setall(data->affinity); 275 cpumask_setall(data->affinity);
276 newcpu = cpumask_any_and(data->affinity, 276 newcpu = cpumask_any_and(data->affinity,
diff --git a/arch/sh/mm/alignment.c b/arch/sh/mm/alignment.c
index b2595b8548ee..620fa7ff9eec 100644
--- a/arch/sh/mm/alignment.c
+++ b/arch/sh/mm/alignment.c
@@ -13,6 +13,7 @@
13#include <linux/seq_file.h> 13#include <linux/seq_file.h>
14#include <linux/proc_fs.h> 14#include <linux/proc_fs.h>
15#include <linux/uaccess.h> 15#include <linux/uaccess.h>
16#include <linux/ratelimit.h>
16#include <asm/alignment.h> 17#include <asm/alignment.h>
17#include <asm/processor.h> 18#include <asm/processor.h>
18 19
@@ -95,13 +96,13 @@ int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
95void unaligned_fixups_notify(struct task_struct *tsk, insn_size_t insn, 96void unaligned_fixups_notify(struct task_struct *tsk, insn_size_t insn,
96 struct pt_regs *regs) 97 struct pt_regs *regs)
97{ 98{
98 if (user_mode(regs) && (se_usermode & UM_WARN) && printk_ratelimit()) 99 if (user_mode(regs) && (se_usermode & UM_WARN))
99 pr_notice("Fixing up unaligned userspace access " 100 pr_notice_ratelimited("Fixing up unaligned userspace access "
100 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 101 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
101 tsk->comm, task_pid_nr(tsk), 102 tsk->comm, task_pid_nr(tsk),
102 (void *)instruction_pointer(regs), insn); 103 (void *)instruction_pointer(regs), insn);
103 else if (se_kernmode_warn && printk_ratelimit()) 104 else if (se_kernmode_warn)
104 pr_notice("Fixing up unaligned kernel access " 105 pr_notice_ratelimited("Fixing up unaligned kernel access "
105 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 106 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
106 tsk->comm, task_pid_nr(tsk), 107 tsk->comm, task_pid_nr(tsk),
107 (void *)instruction_pointer(regs), insn); 108 (void *)instruction_pointer(regs), insn);
diff --git a/arch/x86/include/asm/apb_timer.h b/arch/x86/include/asm/apb_timer.h
index 2fefa501d3ba..af60d8a2e288 100644
--- a/arch/x86/include/asm/apb_timer.h
+++ b/arch/x86/include/asm/apb_timer.h
@@ -62,7 +62,7 @@ extern int sfi_mtimer_num;
62#else /* CONFIG_APB_TIMER */ 62#else /* CONFIG_APB_TIMER */
63 63
64static inline unsigned long apbt_quick_calibrate(void) {return 0; } 64static inline unsigned long apbt_quick_calibrate(void) {return 0; }
65static inline void apbt_time_init(void) {return 0; } 65static inline void apbt_time_init(void) { }
66 66
67#endif 67#endif
68#endif /* ASM_X86_APBT_H */ 68#endif /* ASM_X86_APBT_H */
diff --git a/arch/x86/include/asm/mmzone_32.h b/arch/x86/include/asm/mmzone_32.h
index 224e8c5eb307..ffa037f28d39 100644
--- a/arch/x86/include/asm/mmzone_32.h
+++ b/arch/x86/include/asm/mmzone_32.h
@@ -57,6 +57,8 @@ static inline int pfn_valid(int pfn)
57 return 0; 57 return 0;
58} 58}
59 59
60#define early_pfn_valid(pfn) pfn_valid((pfn))
61
60#endif /* CONFIG_DISCONTIGMEM */ 62#endif /* CONFIG_DISCONTIGMEM */
61 63
62#ifdef CONFIG_NEED_MULTIPLE_NODES 64#ifdef CONFIG_NEED_MULTIPLE_NODES
diff --git a/arch/x86/kernel/acpi/realmode/wakeup.S b/arch/x86/kernel/acpi/realmode/wakeup.S
index ead21b663117..b4fd836e4053 100644
--- a/arch/x86/kernel/acpi/realmode/wakeup.S
+++ b/arch/x86/kernel/acpi/realmode/wakeup.S
@@ -28,6 +28,8 @@ pmode_cr3: .long 0 /* Saved %cr3 */
28pmode_cr4: .long 0 /* Saved %cr4 */ 28pmode_cr4: .long 0 /* Saved %cr4 */
29pmode_efer: .quad 0 /* Saved EFER */ 29pmode_efer: .quad 0 /* Saved EFER */
30pmode_gdt: .quad 0 30pmode_gdt: .quad 0
31pmode_misc_en: .quad 0 /* Saved MISC_ENABLE MSR */
32pmode_behavior: .long 0 /* Wakeup behavior flags */
31realmode_flags: .long 0 33realmode_flags: .long 0
32real_magic: .long 0 34real_magic: .long 0
33trampoline_segment: .word 0 35trampoline_segment: .word 0
@@ -91,6 +93,18 @@ wakeup_code:
91 /* Call the C code */ 93 /* Call the C code */
92 calll main 94 calll main
93 95
96 /* Restore MISC_ENABLE before entering protected mode, in case
97 BIOS decided to clear XD_DISABLE during S3. */
98 movl pmode_behavior, %eax
99 btl $WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE, %eax
100 jnc 1f
101
102 movl pmode_misc_en, %eax
103 movl pmode_misc_en + 4, %edx
104 movl $MSR_IA32_MISC_ENABLE, %ecx
105 wrmsr
1061:
107
94 /* Do any other stuff... */ 108 /* Do any other stuff... */
95 109
96#ifndef CONFIG_64BIT 110#ifndef CONFIG_64BIT
diff --git a/arch/x86/kernel/acpi/realmode/wakeup.h b/arch/x86/kernel/acpi/realmode/wakeup.h
index e1828c07e79c..97a29e1430e3 100644
--- a/arch/x86/kernel/acpi/realmode/wakeup.h
+++ b/arch/x86/kernel/acpi/realmode/wakeup.h
@@ -21,6 +21,9 @@ struct wakeup_header {
21 u32 pmode_efer_low; /* Protected mode EFER */ 21 u32 pmode_efer_low; /* Protected mode EFER */
22 u32 pmode_efer_high; 22 u32 pmode_efer_high;
23 u64 pmode_gdt; 23 u64 pmode_gdt;
24 u32 pmode_misc_en_low; /* Protected mode MISC_ENABLE */
25 u32 pmode_misc_en_high;
26 u32 pmode_behavior; /* Wakeup routine behavior flags */
24 u32 realmode_flags; 27 u32 realmode_flags;
25 u32 real_magic; 28 u32 real_magic;
26 u16 trampoline_segment; /* segment with trampoline code, 64-bit only */ 29 u16 trampoline_segment; /* segment with trampoline code, 64-bit only */
@@ -39,4 +42,7 @@ extern struct wakeup_header wakeup_header;
39#define WAKEUP_HEADER_SIGNATURE 0x51ee1111 42#define WAKEUP_HEADER_SIGNATURE 0x51ee1111
40#define WAKEUP_END_SIGNATURE 0x65a22c82 43#define WAKEUP_END_SIGNATURE 0x65a22c82
41 44
45/* Wakeup behavior bits */
46#define WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE 0
47
42#endif /* ARCH_X86_KERNEL_ACPI_RM_WAKEUP_H */ 48#endif /* ARCH_X86_KERNEL_ACPI_RM_WAKEUP_H */
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 18a857ba7a25..103b6ab368d3 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -77,6 +77,12 @@ int acpi_suspend_lowlevel(void)
77 77
78 header->pmode_cr0 = read_cr0(); 78 header->pmode_cr0 = read_cr0();
79 header->pmode_cr4 = read_cr4_safe(); 79 header->pmode_cr4 = read_cr4_safe();
80 header->pmode_behavior = 0;
81 if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,
82 &header->pmode_misc_en_low,
83 &header->pmode_misc_en_high))
84 header->pmode_behavior |=
85 (1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE);
80 header->realmode_flags = acpi_realmode_flags; 86 header->realmode_flags = acpi_realmode_flags;
81 header->real_magic = 0x12345678; 87 header->real_magic = 0x12345678;
82 88
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 0c016f727695..4f0d46fefa7f 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -294,6 +294,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
294 DMI_MATCH(DMI_BOARD_NAME, "VersaLogic Menlow board"), 294 DMI_MATCH(DMI_BOARD_NAME, "VersaLogic Menlow board"),
295 }, 295 },
296 }, 296 },
297 { /* Handle reboot issue on Acer Aspire one */
298 .callback = set_bios_reboot,
299 .ident = "Acer Aspire One A110",
300 .matches = {
301 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
302 DMI_MATCH(DMI_PRODUCT_NAME, "AOA110"),
303 },
304 },
297 { } 305 { }
298}; 306};
299 307
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 6df88c7885c0..adc98675cda0 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -3372,7 +3372,7 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len)
3372 int def_op_bytes, def_ad_bytes, goffset, simd_prefix; 3372 int def_op_bytes, def_ad_bytes, goffset, simd_prefix;
3373 bool op_prefix = false; 3373 bool op_prefix = false;
3374 struct opcode opcode; 3374 struct opcode opcode;
3375 struct operand memop = { .type = OP_NONE }; 3375 struct operand memop = { .type = OP_NONE }, *memopp = NULL;
3376 3376
3377 c->eip = ctxt->eip; 3377 c->eip = ctxt->eip;
3378 c->fetch.start = c->eip; 3378 c->fetch.start = c->eip;
@@ -3547,9 +3547,6 @@ done_prefixes:
3547 if (memop.type == OP_MEM && c->ad_bytes != 8) 3547 if (memop.type == OP_MEM && c->ad_bytes != 8)
3548 memop.addr.mem.ea = (u32)memop.addr.mem.ea; 3548 memop.addr.mem.ea = (u32)memop.addr.mem.ea;
3549 3549
3550 if (memop.type == OP_MEM && c->rip_relative)
3551 memop.addr.mem.ea += c->eip;
3552
3553 /* 3550 /*
3554 * Decode and fetch the source operand: register, memory 3551 * Decode and fetch the source operand: register, memory
3555 * or immediate. 3552 * or immediate.
@@ -3571,6 +3568,7 @@ done_prefixes:
3571 c->op_bytes; 3568 c->op_bytes;
3572 srcmem_common: 3569 srcmem_common:
3573 c->src = memop; 3570 c->src = memop;
3571 memopp = &c->src;
3574 break; 3572 break;
3575 case SrcImmU16: 3573 case SrcImmU16:
3576 rc = decode_imm(ctxt, &c->src, 2, false); 3574 rc = decode_imm(ctxt, &c->src, 2, false);
@@ -3667,6 +3665,7 @@ done_prefixes:
3667 case DstMem: 3665 case DstMem:
3668 case DstMem64: 3666 case DstMem64:
3669 c->dst = memop; 3667 c->dst = memop;
3668 memopp = &c->dst;
3670 if ((c->d & DstMask) == DstMem64) 3669 if ((c->d & DstMask) == DstMem64)
3671 c->dst.bytes = 8; 3670 c->dst.bytes = 8;
3672 else 3671 else
@@ -3700,10 +3699,13 @@ done_prefixes:
3700 /* Special instructions do their own operand decoding. */ 3699 /* Special instructions do their own operand decoding. */
3701 default: 3700 default:
3702 c->dst.type = OP_NONE; /* Disable writeback. */ 3701 c->dst.type = OP_NONE; /* Disable writeback. */
3703 return 0; 3702 break;
3704 } 3703 }
3705 3704
3706done: 3705done:
3706 if (memopp && memopp->type == OP_MEM && c->rip_relative)
3707 memopp->addr.mem.ea += c->eip;
3708
3707 return (rc == X86EMUL_UNHANDLEABLE) ? EMULATION_FAILED : EMULATION_OK; 3709 return (rc == X86EMUL_UNHANDLEABLE) ? EMULATION_FAILED : EMULATION_OK;
3708} 3710}
3709 3711
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index cf9750004a08..68894fdc034b 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -112,8 +112,10 @@ static void nmi_cpu_start(void *dummy)
112static int nmi_start(void) 112static int nmi_start(void)
113{ 113{
114 get_online_cpus(); 114 get_online_cpus();
115 on_each_cpu(nmi_cpu_start, NULL, 1);
116 ctr_running = 1; 115 ctr_running = 1;
116 /* make ctr_running visible to the nmi handler: */
117 smp_mb();
118 on_each_cpu(nmi_cpu_start, NULL, 1);
117 put_online_cpus(); 119 put_online_cpus();
118 return 0; 120 return 0;
119} 121}
@@ -504,15 +506,18 @@ static int nmi_setup(void)
504 506
505 nmi_enabled = 0; 507 nmi_enabled = 0;
506 ctr_running = 0; 508 ctr_running = 0;
507 barrier(); 509 /* make variables visible to the nmi handler: */
510 smp_mb();
508 err = register_die_notifier(&profile_exceptions_nb); 511 err = register_die_notifier(&profile_exceptions_nb);
509 if (err) 512 if (err)
510 goto fail; 513 goto fail;
511 514
512 get_online_cpus(); 515 get_online_cpus();
513 register_cpu_notifier(&oprofile_cpu_nb); 516 register_cpu_notifier(&oprofile_cpu_nb);
514 on_each_cpu(nmi_cpu_setup, NULL, 1);
515 nmi_enabled = 1; 517 nmi_enabled = 1;
518 /* make nmi_enabled visible to the nmi handler: */
519 smp_mb();
520 on_each_cpu(nmi_cpu_setup, NULL, 1);
516 put_online_cpus(); 521 put_online_cpus();
517 522
518 return 0; 523 return 0;
@@ -531,7 +536,8 @@ static void nmi_shutdown(void)
531 nmi_enabled = 0; 536 nmi_enabled = 0;
532 ctr_running = 0; 537 ctr_running = 0;
533 put_online_cpus(); 538 put_online_cpus();
534 barrier(); 539 /* make variables visible to the nmi handler: */
540 smp_mb();
535 unregister_die_notifier(&profile_exceptions_nb); 541 unregister_die_notifier(&profile_exceptions_nb);
536 msrs = &get_cpu_var(cpu_msrs); 542 msrs = &get_cpu_var(cpu_msrs);
537 model->shutdown(msrs); 543 model->shutdown(msrs);
diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c
index 8214724ce54d..f567965c0620 100644
--- a/arch/x86/pci/xen.c
+++ b/arch/x86/pci/xen.c
@@ -327,7 +327,7 @@ int __init pci_xen_hvm_init(void)
327} 327}
328 328
329#ifdef CONFIG_XEN_DOM0 329#ifdef CONFIG_XEN_DOM0
330static int xen_register_pirq(u32 gsi, int triggering) 330static int xen_register_pirq(u32 gsi, int gsi_override, int triggering)
331{ 331{
332 int rc, pirq, irq = -1; 332 int rc, pirq, irq = -1;
333 struct physdev_map_pirq map_irq; 333 struct physdev_map_pirq map_irq;
@@ -344,16 +344,18 @@ static int xen_register_pirq(u32 gsi, int triggering)
344 shareable = 1; 344 shareable = 1;
345 name = "ioapic-level"; 345 name = "ioapic-level";
346 } 346 }
347
348 pirq = xen_allocate_pirq_gsi(gsi); 347 pirq = xen_allocate_pirq_gsi(gsi);
349 if (pirq < 0) 348 if (pirq < 0)
350 goto out; 349 goto out;
351 350
352 irq = xen_bind_pirq_gsi_to_irq(gsi, pirq, shareable, name); 351 if (gsi_override >= 0)
352 irq = xen_bind_pirq_gsi_to_irq(gsi_override, pirq, shareable, name);
353 else
354 irq = xen_bind_pirq_gsi_to_irq(gsi, pirq, shareable, name);
353 if (irq < 0) 355 if (irq < 0)
354 goto out; 356 goto out;
355 357
356 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d\n", pirq, irq); 358 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", pirq, irq, gsi);
357 359
358 map_irq.domid = DOMID_SELF; 360 map_irq.domid = DOMID_SELF;
359 map_irq.type = MAP_PIRQ_TYPE_GSI; 361 map_irq.type = MAP_PIRQ_TYPE_GSI;
@@ -370,7 +372,7 @@ out:
370 return irq; 372 return irq;
371} 373}
372 374
373static int xen_register_gsi(u32 gsi, int triggering, int polarity) 375static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
374{ 376{
375 int rc, irq; 377 int rc, irq;
376 struct physdev_setup_gsi setup_gsi; 378 struct physdev_setup_gsi setup_gsi;
@@ -381,7 +383,7 @@ static int xen_register_gsi(u32 gsi, int triggering, int polarity)
381 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n", 383 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
382 gsi, triggering, polarity); 384 gsi, triggering, polarity);
383 385
384 irq = xen_register_pirq(gsi, triggering); 386 irq = xen_register_pirq(gsi, gsi_override, triggering);
385 387
386 setup_gsi.gsi = gsi; 388 setup_gsi.gsi = gsi;
387 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1); 389 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
@@ -403,6 +405,8 @@ static __init void xen_setup_acpi_sci(void)
403 int rc; 405 int rc;
404 int trigger, polarity; 406 int trigger, polarity;
405 int gsi = acpi_sci_override_gsi; 407 int gsi = acpi_sci_override_gsi;
408 int irq = -1;
409 int gsi_override = -1;
406 410
407 if (!gsi) 411 if (!gsi)
408 return; 412 return;
@@ -419,7 +423,25 @@ static __init void xen_setup_acpi_sci(void)
419 printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d " 423 printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
420 "polarity=%d\n", gsi, trigger, polarity); 424 "polarity=%d\n", gsi, trigger, polarity);
421 425
422 gsi = xen_register_gsi(gsi, trigger, polarity); 426 /* Before we bind the GSI to a Linux IRQ, check whether
427 * we need to override it with bus_irq (IRQ) value. Usually for
428 * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
429 * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
430 * but there are oddballs where the IRQ != GSI:
431 * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
432 * which ends up being: gsi_to_irq[9] == 20
433 * (which is what acpi_gsi_to_irq ends up calling when starting the
434 * the ACPI interpreter and keels over since IRQ 9 has not been
435 * setup as we had setup IRQ 20 for it).
436 */
437 /* Check whether the GSI != IRQ */
438 if (acpi_gsi_to_irq(gsi, &irq) == 0) {
439 if (irq >= 0 && irq != gsi)
440 /* Bugger, we MUST have that IRQ. */
441 gsi_override = irq;
442 }
443
444 gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
423 printk(KERN_INFO "xen: acpi sci %d\n", gsi); 445 printk(KERN_INFO "xen: acpi sci %d\n", gsi);
424 446
425 return; 447 return;
@@ -428,7 +450,7 @@ static __init void xen_setup_acpi_sci(void)
428static int acpi_register_gsi_xen(struct device *dev, u32 gsi, 450static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
429 int trigger, int polarity) 451 int trigger, int polarity)
430{ 452{
431 return xen_register_gsi(gsi, trigger, polarity); 453 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
432} 454}
433 455
434static int __init pci_xen_initial_domain(void) 456static int __init pci_xen_initial_domain(void)
@@ -467,7 +489,7 @@ void __init xen_setup_pirqs(void)
467 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1) 489 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
468 continue; 490 continue;
469 491
470 xen_register_pirq(irq, 492 xen_register_pirq(irq, -1 /* no GSI override */,
471 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE); 493 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE);
472 } 494 }
473} 495}
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index 474356b98ede..899e393d8e73 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -504,9 +504,6 @@ void __init efi_init(void)
504 x86_platform.set_wallclock = efi_set_rtc_mmss; 504 x86_platform.set_wallclock = efi_set_rtc_mmss;
505#endif 505#endif
506 506
507 /* Setup for EFI runtime service */
508 reboot_type = BOOT_EFI;
509
510#if EFI_DEBUG 507#if EFI_DEBUG
511 print_efi_memmap(); 508 print_efi_memmap();
512#endif 509#endif
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 673e968df3cf..0ccccb67a993 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1232,7 +1232,11 @@ static void xen_flush_tlb_others(const struct cpumask *cpus,
1232{ 1232{
1233 struct { 1233 struct {
1234 struct mmuext_op op; 1234 struct mmuext_op op;
1235#ifdef CONFIG_SMP
1235 DECLARE_BITMAP(mask, num_processors); 1236 DECLARE_BITMAP(mask, num_processors);
1237#else
1238 DECLARE_BITMAP(mask, NR_CPUS);
1239#endif
1236 } *args; 1240 } *args;
1237 struct multicall_space mcs; 1241 struct multicall_space mcs;
1238 1242
diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c
index f3799432676d..ae21919f15e1 100644
--- a/block/cfq-iosched.c
+++ b/block/cfq-iosched.c
@@ -2773,11 +2773,14 @@ static void __cfq_exit_single_io_context(struct cfq_data *cfqd,
2773 smp_wmb(); 2773 smp_wmb();
2774 cic->key = cfqd_dead_key(cfqd); 2774 cic->key = cfqd_dead_key(cfqd);
2775 2775
2776 rcu_read_lock();
2776 if (rcu_dereference(ioc->ioc_data) == cic) { 2777 if (rcu_dereference(ioc->ioc_data) == cic) {
2778 rcu_read_unlock();
2777 spin_lock(&ioc->lock); 2779 spin_lock(&ioc->lock);
2778 rcu_assign_pointer(ioc->ioc_data, NULL); 2780 rcu_assign_pointer(ioc->ioc_data, NULL);
2779 spin_unlock(&ioc->lock); 2781 spin_unlock(&ioc->lock);
2780 } 2782 } else
2783 rcu_read_unlock();
2781 2784
2782 if (cic->cfqq[BLK_RW_ASYNC]) { 2785 if (cic->cfqq[BLK_RW_ASYNC]) {
2783 cfq_exit_cfqq(cfqd, cic->cfqq[BLK_RW_ASYNC]); 2786 cfq_exit_cfqq(cfqd, cic->cfqq[BLK_RW_ASYNC]);
@@ -3084,7 +3087,8 @@ cfq_drop_dead_cic(struct cfq_data *cfqd, struct io_context *ioc,
3084 3087
3085 spin_lock_irqsave(&ioc->lock, flags); 3088 spin_lock_irqsave(&ioc->lock, flags);
3086 3089
3087 BUG_ON(ioc->ioc_data == cic); 3090 BUG_ON(rcu_dereference_check(ioc->ioc_data,
3091 lockdep_is_held(&ioc->lock)) == cic);
3088 3092
3089 radix_tree_delete(&ioc->radix_root, cfqd->cic_index); 3093 radix_tree_delete(&ioc->radix_root, cfqd->cic_index);
3090 hlist_del_rcu(&cic->cic_list); 3094 hlist_del_rcu(&cic->cic_list);
diff --git a/crypto/deflate.c b/crypto/deflate.c
index b5ccae29be74..b0165ecad0c5 100644
--- a/crypto/deflate.c
+++ b/crypto/deflate.c
@@ -32,7 +32,6 @@
32#include <linux/interrupt.h> 32#include <linux/interrupt.h>
33#include <linux/mm.h> 33#include <linux/mm.h>
34#include <linux/net.h> 34#include <linux/net.h>
35#include <linux/slab.h>
36 35
37#define DEFLATE_DEF_LEVEL Z_DEFAULT_COMPRESSION 36#define DEFLATE_DEF_LEVEL Z_DEFAULT_COMPRESSION
38#define DEFLATE_DEF_WINBITS 11 37#define DEFLATE_DEF_WINBITS 11
@@ -73,7 +72,7 @@ static int deflate_decomp_init(struct deflate_ctx *ctx)
73 int ret = 0; 72 int ret = 0;
74 struct z_stream_s *stream = &ctx->decomp_stream; 73 struct z_stream_s *stream = &ctx->decomp_stream;
75 74
76 stream->workspace = kzalloc(zlib_inflate_workspacesize(), GFP_KERNEL); 75 stream->workspace = vzalloc(zlib_inflate_workspacesize());
77 if (!stream->workspace) { 76 if (!stream->workspace) {
78 ret = -ENOMEM; 77 ret = -ENOMEM;
79 goto out; 78 goto out;
@@ -86,7 +85,7 @@ static int deflate_decomp_init(struct deflate_ctx *ctx)
86out: 85out:
87 return ret; 86 return ret;
88out_free: 87out_free:
89 kfree(stream->workspace); 88 vfree(stream->workspace);
90 goto out; 89 goto out;
91} 90}
92 91
@@ -99,7 +98,7 @@ static void deflate_comp_exit(struct deflate_ctx *ctx)
99static void deflate_decomp_exit(struct deflate_ctx *ctx) 98static void deflate_decomp_exit(struct deflate_ctx *ctx)
100{ 99{
101 zlib_inflateEnd(&ctx->decomp_stream); 100 zlib_inflateEnd(&ctx->decomp_stream);
102 kfree(ctx->decomp_stream.workspace); 101 vfree(ctx->decomp_stream.workspace);
103} 102}
104 103
105static int deflate_init(struct crypto_tfm *tfm) 104static int deflate_init(struct crypto_tfm *tfm)
diff --git a/crypto/zlib.c b/crypto/zlib.c
index d11d761a5e41..06b62e5cdcc7 100644
--- a/crypto/zlib.c
+++ b/crypto/zlib.c
@@ -29,7 +29,6 @@
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/mm.h> 30#include <linux/mm.h>
31#include <linux/net.h> 31#include <linux/net.h>
32#include <linux/slab.h>
33 32
34#include <crypto/internal/compress.h> 33#include <crypto/internal/compress.h>
35 34
@@ -60,7 +59,7 @@ static void zlib_decomp_exit(struct zlib_ctx *ctx)
60 59
61 if (stream->workspace) { 60 if (stream->workspace) {
62 zlib_inflateEnd(stream); 61 zlib_inflateEnd(stream);
63 kfree(stream->workspace); 62 vfree(stream->workspace);
64 stream->workspace = NULL; 63 stream->workspace = NULL;
65 } 64 }
66} 65}
@@ -228,13 +227,13 @@ static int zlib_decompress_setup(struct crypto_pcomp *tfm, void *params,
228 ? nla_get_u32(tb[ZLIB_DECOMP_WINDOWBITS]) 227 ? nla_get_u32(tb[ZLIB_DECOMP_WINDOWBITS])
229 : DEF_WBITS; 228 : DEF_WBITS;
230 229
231 stream->workspace = kzalloc(zlib_inflate_workspacesize(), GFP_KERNEL); 230 stream->workspace = vzalloc(zlib_inflate_workspacesize());
232 if (!stream->workspace) 231 if (!stream->workspace)
233 return -ENOMEM; 232 return -ENOMEM;
234 233
235 ret = zlib_inflateInit2(stream, ctx->decomp_windowBits); 234 ret = zlib_inflateInit2(stream, ctx->decomp_windowBits);
236 if (ret != Z_OK) { 235 if (ret != Z_OK) {
237 kfree(stream->workspace); 236 vfree(stream->workspace);
238 stream->workspace = NULL; 237 stream->workspace = NULL;
239 return -EINVAL; 238 return -EINVAL;
240 } 239 }
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index d38c40fe4ddb..41223c7f0206 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -452,7 +452,7 @@ void ahci_save_initial_config(struct device *dev,
452 } 452 }
453 453
454 if (mask_port_map) { 454 if (mask_port_map) {
455 dev_printk(KERN_ERR, dev, "masking port_map 0x%x -> 0x%x\n", 455 dev_printk(KERN_WARNING, dev, "masking port_map 0x%x -> 0x%x\n",
456 port_map, 456 port_map,
457 port_map & mask_port_map); 457 port_map & mask_port_map);
458 port_map &= mask_port_map; 458 port_map &= mask_port_map;
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index 1c291af637b3..6040717b62bb 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -367,7 +367,7 @@ EXPORT_SYMBOL_GPL(platform_device_unregister);
367 * 367 *
368 * Returns &struct platform_device pointer on success, or ERR_PTR() on error. 368 * Returns &struct platform_device pointer on success, or ERR_PTR() on error.
369 */ 369 */
370struct platform_device *__init_or_module platform_device_register_resndata( 370struct platform_device *platform_device_register_resndata(
371 struct device *parent, 371 struct device *parent,
372 const char *name, int id, 372 const char *name, int id,
373 const struct resource *res, unsigned int num, 373 const struct resource *res, unsigned int num,
diff --git a/drivers/base/syscore.c b/drivers/base/syscore.c
index c126db3cb7d1..e8d11b6630ee 100644
--- a/drivers/base/syscore.c
+++ b/drivers/base/syscore.c
@@ -9,6 +9,7 @@
9#include <linux/syscore_ops.h> 9#include <linux/syscore_ops.h>
10#include <linux/mutex.h> 10#include <linux/mutex.h>
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/interrupt.h>
12 13
13static LIST_HEAD(syscore_ops_list); 14static LIST_HEAD(syscore_ops_list);
14static DEFINE_MUTEX(syscore_ops_lock); 15static DEFINE_MUTEX(syscore_ops_lock);
@@ -48,6 +49,13 @@ int syscore_suspend(void)
48 struct syscore_ops *ops; 49 struct syscore_ops *ops;
49 int ret = 0; 50 int ret = 0;
50 51
52 pr_debug("Checking wakeup interrupts\n");
53
54 /* Return error code if there are any wakeup interrupts pending. */
55 ret = check_wakeup_irqs();
56 if (ret)
57 return ret;
58
51 WARN_ONCE(!irqs_disabled(), 59 WARN_ONCE(!irqs_disabled(),
52 "Interrupts enabled before system core suspend.\n"); 60 "Interrupts enabled before system core suspend.\n");
53 61
diff --git a/drivers/block/drbd/drbd_actlog.c b/drivers/block/drbd/drbd_actlog.c
index 09ef9a878ef0..cf0e63dd97da 100644
--- a/drivers/block/drbd/drbd_actlog.c
+++ b/drivers/block/drbd/drbd_actlog.c
@@ -79,7 +79,7 @@ static int _drbd_md_sync_page_io(struct drbd_conf *mdev,
79 md_io.error = 0; 79 md_io.error = 0;
80 80
81 if ((rw & WRITE) && !test_bit(MD_NO_FUA, &mdev->flags)) 81 if ((rw & WRITE) && !test_bit(MD_NO_FUA, &mdev->flags))
82 rw |= REQ_FUA; 82 rw |= REQ_FUA | REQ_FLUSH;
83 rw |= REQ_SYNC; 83 rw |= REQ_SYNC;
84 84
85 bio = bio_alloc(GFP_NOIO, 1); 85 bio = bio_alloc(GFP_NOIO, 1);
diff --git a/drivers/block/drbd/drbd_bitmap.c b/drivers/block/drbd/drbd_bitmap.c
index f440a02dfdb1..7b976296b564 100644
--- a/drivers/block/drbd/drbd_bitmap.c
+++ b/drivers/block/drbd/drbd_bitmap.c
@@ -112,9 +112,6 @@ struct drbd_bitmap {
112 struct task_struct *bm_task; 112 struct task_struct *bm_task;
113}; 113};
114 114
115static int __bm_change_bits_to(struct drbd_conf *mdev, const unsigned long s,
116 unsigned long e, int val, const enum km_type km);
117
118#define bm_print_lock_info(m) __bm_print_lock_info(m, __func__) 115#define bm_print_lock_info(m) __bm_print_lock_info(m, __func__)
119static void __bm_print_lock_info(struct drbd_conf *mdev, const char *func) 116static void __bm_print_lock_info(struct drbd_conf *mdev, const char *func)
120{ 117{
@@ -994,6 +991,9 @@ static void bm_page_io_async(struct bm_aio_ctx *ctx, int page_nr, int rw) __must
994 bio_endio(bio, -EIO); 991 bio_endio(bio, -EIO);
995 } else { 992 } else {
996 submit_bio(rw, bio); 993 submit_bio(rw, bio);
994 /* this should not count as user activity and cause the
995 * resync to throttle -- see drbd_rs_should_slow_down(). */
996 atomic_add(len >> 9, &mdev->rs_sect_ev);
997 } 997 }
998} 998}
999 999
@@ -1256,7 +1256,7 @@ unsigned long _drbd_bm_find_next_zero(struct drbd_conf *mdev, unsigned long bm_f
1256 * expected to be called for only a few bits (e - s about BITS_PER_LONG). 1256 * expected to be called for only a few bits (e - s about BITS_PER_LONG).
1257 * Must hold bitmap lock already. */ 1257 * Must hold bitmap lock already. */
1258static int __bm_change_bits_to(struct drbd_conf *mdev, const unsigned long s, 1258static int __bm_change_bits_to(struct drbd_conf *mdev, const unsigned long s,
1259 unsigned long e, int val, const enum km_type km) 1259 unsigned long e, int val)
1260{ 1260{
1261 struct drbd_bitmap *b = mdev->bitmap; 1261 struct drbd_bitmap *b = mdev->bitmap;
1262 unsigned long *p_addr = NULL; 1262 unsigned long *p_addr = NULL;
@@ -1274,14 +1274,14 @@ static int __bm_change_bits_to(struct drbd_conf *mdev, const unsigned long s,
1274 unsigned int page_nr = bm_bit_to_page_idx(b, bitnr); 1274 unsigned int page_nr = bm_bit_to_page_idx(b, bitnr);
1275 if (page_nr != last_page_nr) { 1275 if (page_nr != last_page_nr) {
1276 if (p_addr) 1276 if (p_addr)
1277 __bm_unmap(p_addr, km); 1277 __bm_unmap(p_addr, KM_IRQ1);
1278 if (c < 0) 1278 if (c < 0)
1279 bm_set_page_lazy_writeout(b->bm_pages[last_page_nr]); 1279 bm_set_page_lazy_writeout(b->bm_pages[last_page_nr]);
1280 else if (c > 0) 1280 else if (c > 0)
1281 bm_set_page_need_writeout(b->bm_pages[last_page_nr]); 1281 bm_set_page_need_writeout(b->bm_pages[last_page_nr]);
1282 changed_total += c; 1282 changed_total += c;
1283 c = 0; 1283 c = 0;
1284 p_addr = __bm_map_pidx(b, page_nr, km); 1284 p_addr = __bm_map_pidx(b, page_nr, KM_IRQ1);
1285 last_page_nr = page_nr; 1285 last_page_nr = page_nr;
1286 } 1286 }
1287 if (val) 1287 if (val)
@@ -1290,7 +1290,7 @@ static int __bm_change_bits_to(struct drbd_conf *mdev, const unsigned long s,
1290 c -= (0 != __test_and_clear_bit_le(bitnr & BITS_PER_PAGE_MASK, p_addr)); 1290 c -= (0 != __test_and_clear_bit_le(bitnr & BITS_PER_PAGE_MASK, p_addr));
1291 } 1291 }
1292 if (p_addr) 1292 if (p_addr)
1293 __bm_unmap(p_addr, km); 1293 __bm_unmap(p_addr, KM_IRQ1);
1294 if (c < 0) 1294 if (c < 0)
1295 bm_set_page_lazy_writeout(b->bm_pages[last_page_nr]); 1295 bm_set_page_lazy_writeout(b->bm_pages[last_page_nr]);
1296 else if (c > 0) 1296 else if (c > 0)
@@ -1318,7 +1318,7 @@ static int bm_change_bits_to(struct drbd_conf *mdev, const unsigned long s,
1318 if ((val ? BM_DONT_SET : BM_DONT_CLEAR) & b->bm_flags) 1318 if ((val ? BM_DONT_SET : BM_DONT_CLEAR) & b->bm_flags)
1319 bm_print_lock_info(mdev); 1319 bm_print_lock_info(mdev);
1320 1320
1321 c = __bm_change_bits_to(mdev, s, e, val, KM_IRQ1); 1321 c = __bm_change_bits_to(mdev, s, e, val);
1322 1322
1323 spin_unlock_irqrestore(&b->bm_lock, flags); 1323 spin_unlock_irqrestore(&b->bm_lock, flags);
1324 return c; 1324 return c;
@@ -1343,16 +1343,17 @@ static inline void bm_set_full_words_within_one_page(struct drbd_bitmap *b,
1343{ 1343{
1344 int i; 1344 int i;
1345 int bits; 1345 int bits;
1346 unsigned long *paddr = kmap_atomic(b->bm_pages[page_nr], KM_USER0); 1346 unsigned long *paddr = kmap_atomic(b->bm_pages[page_nr], KM_IRQ1);
1347 for (i = first_word; i < last_word; i++) { 1347 for (i = first_word; i < last_word; i++) {
1348 bits = hweight_long(paddr[i]); 1348 bits = hweight_long(paddr[i]);
1349 paddr[i] = ~0UL; 1349 paddr[i] = ~0UL;
1350 b->bm_set += BITS_PER_LONG - bits; 1350 b->bm_set += BITS_PER_LONG - bits;
1351 } 1351 }
1352 kunmap_atomic(paddr, KM_USER0); 1352 kunmap_atomic(paddr, KM_IRQ1);
1353} 1353}
1354 1354
1355/* Same thing as drbd_bm_set_bits, but without taking the spin_lock_irqsave. 1355/* Same thing as drbd_bm_set_bits,
1356 * but more efficient for a large bit range.
1356 * You must first drbd_bm_lock(). 1357 * You must first drbd_bm_lock().
1357 * Can be called to set the whole bitmap in one go. 1358 * Can be called to set the whole bitmap in one go.
1358 * Sets bits from s to e _inclusive_. */ 1359 * Sets bits from s to e _inclusive_. */
@@ -1366,6 +1367,7 @@ void _drbd_bm_set_bits(struct drbd_conf *mdev, const unsigned long s, const unsi
1366 * Do not use memset, because we must account for changes, 1367 * Do not use memset, because we must account for changes,
1367 * so we need to loop over the words with hweight() anyways. 1368 * so we need to loop over the words with hweight() anyways.
1368 */ 1369 */
1370 struct drbd_bitmap *b = mdev->bitmap;
1369 unsigned long sl = ALIGN(s,BITS_PER_LONG); 1371 unsigned long sl = ALIGN(s,BITS_PER_LONG);
1370 unsigned long el = (e+1) & ~((unsigned long)BITS_PER_LONG-1); 1372 unsigned long el = (e+1) & ~((unsigned long)BITS_PER_LONG-1);
1371 int first_page; 1373 int first_page;
@@ -1376,15 +1378,19 @@ void _drbd_bm_set_bits(struct drbd_conf *mdev, const unsigned long s, const unsi
1376 1378
1377 if (e - s <= 3*BITS_PER_LONG) { 1379 if (e - s <= 3*BITS_PER_LONG) {
1378 /* don't bother; el and sl may even be wrong. */ 1380 /* don't bother; el and sl may even be wrong. */
1379 __bm_change_bits_to(mdev, s, e, 1, KM_USER0); 1381 spin_lock_irq(&b->bm_lock);
1382 __bm_change_bits_to(mdev, s, e, 1);
1383 spin_unlock_irq(&b->bm_lock);
1380 return; 1384 return;
1381 } 1385 }
1382 1386
1383 /* difference is large enough that we can trust sl and el */ 1387 /* difference is large enough that we can trust sl and el */
1384 1388
1389 spin_lock_irq(&b->bm_lock);
1390
1385 /* bits filling the current long */ 1391 /* bits filling the current long */
1386 if (sl) 1392 if (sl)
1387 __bm_change_bits_to(mdev, s, sl-1, 1, KM_USER0); 1393 __bm_change_bits_to(mdev, s, sl-1, 1);
1388 1394
1389 first_page = sl >> (3 + PAGE_SHIFT); 1395 first_page = sl >> (3 + PAGE_SHIFT);
1390 last_page = el >> (3 + PAGE_SHIFT); 1396 last_page = el >> (3 + PAGE_SHIFT);
@@ -1397,8 +1403,10 @@ void _drbd_bm_set_bits(struct drbd_conf *mdev, const unsigned long s, const unsi
1397 /* first and full pages, unless first page == last page */ 1403 /* first and full pages, unless first page == last page */
1398 for (page_nr = first_page; page_nr < last_page; page_nr++) { 1404 for (page_nr = first_page; page_nr < last_page; page_nr++) {
1399 bm_set_full_words_within_one_page(mdev->bitmap, page_nr, first_word, last_word); 1405 bm_set_full_words_within_one_page(mdev->bitmap, page_nr, first_word, last_word);
1406 spin_unlock_irq(&b->bm_lock);
1400 cond_resched(); 1407 cond_resched();
1401 first_word = 0; 1408 first_word = 0;
1409 spin_lock_irq(&b->bm_lock);
1402 } 1410 }
1403 1411
1404 /* last page (respectively only page, for first page == last page) */ 1412 /* last page (respectively only page, for first page == last page) */
@@ -1411,7 +1419,8 @@ void _drbd_bm_set_bits(struct drbd_conf *mdev, const unsigned long s, const unsi
1411 * it would trigger an assert in __bm_change_bits_to() 1419 * it would trigger an assert in __bm_change_bits_to()
1412 */ 1420 */
1413 if (el <= e) 1421 if (el <= e)
1414 __bm_change_bits_to(mdev, el, e, 1, KM_USER0); 1422 __bm_change_bits_to(mdev, el, e, 1);
1423 spin_unlock_irq(&b->bm_lock);
1415} 1424}
1416 1425
1417/* returns bit state 1426/* returns bit state
diff --git a/drivers/block/drbd/drbd_receiver.c b/drivers/block/drbd/drbd_receiver.c
index 25d32c5aa50a..43beaca53179 100644
--- a/drivers/block/drbd/drbd_receiver.c
+++ b/drivers/block/drbd/drbd_receiver.c
@@ -4602,6 +4602,11 @@ int drbd_asender(struct drbd_thread *thi)
4602 dev_err(DEV, "meta connection shut down by peer.\n"); 4602 dev_err(DEV, "meta connection shut down by peer.\n");
4603 goto reconnect; 4603 goto reconnect;
4604 } else if (rv == -EAGAIN) { 4604 } else if (rv == -EAGAIN) {
4605 /* If the data socket received something meanwhile,
4606 * that is good enough: peer is still alive. */
4607 if (time_after(mdev->last_received,
4608 jiffies - mdev->meta.socket->sk->sk_rcvtimeo))
4609 continue;
4605 if (ping_timeout_active) { 4610 if (ping_timeout_active) {
4606 dev_err(DEV, "PingAck did not arrive in time.\n"); 4611 dev_err(DEV, "PingAck did not arrive in time.\n");
4607 goto reconnect; 4612 goto reconnect;
@@ -4637,6 +4642,7 @@ int drbd_asender(struct drbd_thread *thi)
4637 goto reconnect; 4642 goto reconnect;
4638 } 4643 }
4639 if (received == expect) { 4644 if (received == expect) {
4645 mdev->last_received = jiffies;
4640 D_ASSERT(cmd != NULL); 4646 D_ASSERT(cmd != NULL);
4641 if (!cmd->process(mdev, h)) 4647 if (!cmd->process(mdev, h))
4642 goto reconnect; 4648 goto reconnect;
diff --git a/drivers/block/drbd/drbd_worker.c b/drivers/block/drbd/drbd_worker.c
index 4d76b06b6b20..4d3e6f6213ba 100644
--- a/drivers/block/drbd/drbd_worker.c
+++ b/drivers/block/drbd/drbd_worker.c
@@ -536,12 +536,7 @@ static int w_make_resync_request(struct drbd_conf *mdev,
536 return 1; 536 return 1;
537 } 537 }
538 538
539 /* starting with drbd 8.3.8, we can handle multi-bio EEs, 539 max_bio_size = queue_max_hw_sectors(mdev->rq_queue) << 9;
540 * if it should be necessary */
541 max_bio_size =
542 mdev->agreed_pro_version < 94 ? queue_max_hw_sectors(mdev->rq_queue) << 9 :
543 mdev->agreed_pro_version < 95 ? DRBD_MAX_SIZE_H80_PACKET : DRBD_MAX_BIO_SIZE;
544
545 number = drbd_rs_number_requests(mdev); 540 number = drbd_rs_number_requests(mdev);
546 if (number == 0) 541 if (number == 0)
547 goto requeue; 542 goto requeue;
diff --git a/drivers/connector/connector.c b/drivers/connector/connector.c
index 219d88a0eeae..dde6a0fad408 100644
--- a/drivers/connector/connector.c
+++ b/drivers/connector/connector.c
@@ -139,6 +139,7 @@ static int cn_call_callback(struct sk_buff *skb)
139 spin_unlock_bh(&dev->cbdev->queue_lock); 139 spin_unlock_bh(&dev->cbdev->queue_lock);
140 140
141 if (cbq != NULL) { 141 if (cbq != NULL) {
142 err = 0;
142 cbq->callback(msg, nsp); 143 cbq->callback(msg, nsp);
143 kfree_skb(skb); 144 kfree_skb(skb);
144 cn_queue_release_callback(cbq); 145 cn_queue_release_callback(cbq);
diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
index 4e04e1274388..596d5dd32f41 100644
--- a/drivers/cpufreq/acpi-cpufreq.c
+++ b/drivers/cpufreq/acpi-cpufreq.c
@@ -759,7 +759,7 @@ static void __exit acpi_cpufreq_exit(void)
759 759
760 cpufreq_unregister_driver(&acpi_cpufreq_driver); 760 cpufreq_unregister_driver(&acpi_cpufreq_driver);
761 761
762 free_percpu(acpi_perf_data); 762 free_acpi_perf_data();
763} 763}
764 764
765module_param(acpi_pstate_strict, uint, 0644); 765module_param(acpi_pstate_strict, uint, 0644);
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index d0e65d6ddc77..676d957c22b0 100644
--- a/drivers/crypto/caam/caamalg.c
+++ b/drivers/crypto/caam/caamalg.c
@@ -238,9 +238,9 @@ static int build_sh_desc_ipsec(struct caam_ctx *ctx)
238 238
239 /* build shared descriptor for this session */ 239 /* build shared descriptor for this session */
240 sh_desc = kmalloc(CAAM_CMD_SZ * DESC_AEAD_SHARED_TEXT_LEN + 240 sh_desc = kmalloc(CAAM_CMD_SZ * DESC_AEAD_SHARED_TEXT_LEN +
241 keys_fit_inline ? 241 (keys_fit_inline ?
242 ctx->split_key_pad_len + ctx->enckeylen : 242 ctx->split_key_pad_len + ctx->enckeylen :
243 CAAM_PTR_SZ * 2, GFP_DMA | GFP_KERNEL); 243 CAAM_PTR_SZ * 2), GFP_DMA | GFP_KERNEL);
244 if (!sh_desc) { 244 if (!sh_desc) {
245 dev_err(jrdev, "could not allocate shared descriptor\n"); 245 dev_err(jrdev, "could not allocate shared descriptor\n");
246 return -ENOMEM; 246 return -ENOMEM;
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 438e6c831170..ebb897329c1e 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -264,6 +264,7 @@ static char ohci_driver_name[] = KBUILD_MODNAME;
264#define PCI_DEVICE_ID_AGERE_FW643 0x5901 264#define PCI_DEVICE_ID_AGERE_FW643 0x5901
265#define PCI_DEVICE_ID_JMICRON_JMB38X_FW 0x2380 265#define PCI_DEVICE_ID_JMICRON_JMB38X_FW 0x2380
266#define PCI_DEVICE_ID_TI_TSB12LV22 0x8009 266#define PCI_DEVICE_ID_TI_TSB12LV22 0x8009
267#define PCI_VENDOR_ID_PINNACLE_SYSTEMS 0x11bd
267 268
268#define QUIRK_CYCLE_TIMER 1 269#define QUIRK_CYCLE_TIMER 1
269#define QUIRK_RESET_PACKET 2 270#define QUIRK_RESET_PACKET 2
@@ -3190,6 +3191,11 @@ static int __devinit pci_probe(struct pci_dev *dev,
3190 int i, err; 3191 int i, err;
3191 size_t size; 3192 size_t size;
3192 3193
3194 if (dev->vendor == PCI_VENDOR_ID_PINNACLE_SYSTEMS) {
3195 dev_err(&dev->dev, "Pinnacle MovieBoard is not yet supported\n");
3196 return -ENOSYS;
3197 }
3198
3193 ohci = kzalloc(sizeof(*ohci), GFP_KERNEL); 3199 ohci = kzalloc(sizeof(*ohci), GFP_KERNEL);
3194 if (ohci == NULL) { 3200 if (ohci == NULL) {
3195 err = -ENOMEM; 3201 err = -ENOMEM;
diff --git a/drivers/firmware/google/Kconfig b/drivers/firmware/google/Kconfig
index 87096b6ca5c9..2f21b0bfe653 100644
--- a/drivers/firmware/google/Kconfig
+++ b/drivers/firmware/google/Kconfig
@@ -13,6 +13,7 @@ menu "Google Firmware Drivers"
13config GOOGLE_SMI 13config GOOGLE_SMI
14 tristate "SMI interface for Google platforms" 14 tristate "SMI interface for Google platforms"
15 depends on ACPI && DMI 15 depends on ACPI && DMI
16 select EFI
16 select EFI_VARS 17 select EFI_VARS
17 help 18 help
18 Say Y here if you want to enable SMI callbacks for Google 19 Say Y here if you want to enable SMI callbacks for Google
diff --git a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c
index bd6571e0097a..644ba1255d3c 100644
--- a/drivers/gpio/langwell_gpio.c
+++ b/drivers/gpio/langwell_gpio.c
@@ -223,7 +223,7 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc)
223 gedr = gpio_reg(&lnw->chip, base, GEDR); 223 gedr = gpio_reg(&lnw->chip, base, GEDR);
224 pending = readl(gedr); 224 pending = readl(gedr);
225 while (pending) { 225 while (pending) {
226 gpio = __ffs(pending) - 1; 226 gpio = __ffs(pending);
227 mask = BIT(gpio); 227 mask = BIT(gpio);
228 pending &= ~mask; 228 pending &= ~mask;
229 /* Clear before handling so we can't lose an edge */ 229 /* Clear before handling so we can't lose an edge */
diff --git a/drivers/gpio/tps65910-gpio.c b/drivers/gpio/tps65910-gpio.c
index 8d1ddfdd63eb..15097ca616d6 100644
--- a/drivers/gpio/tps65910-gpio.c
+++ b/drivers/gpio/tps65910-gpio.c
@@ -81,8 +81,10 @@ void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base)
81 switch(tps65910_chip_id(tps65910)) { 81 switch(tps65910_chip_id(tps65910)) {
82 case TPS65910: 82 case TPS65910:
83 tps65910->gpio.ngpio = 6; 83 tps65910->gpio.ngpio = 6;
84 break;
84 case TPS65911: 85 case TPS65911:
85 tps65910->gpio.ngpio = 9; 86 tps65910->gpio.ngpio = 9;
87 break;
86 default: 88 default:
87 return; 89 return;
88 } 90 }
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 21058e6ad2b8..82db18506662 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -886,9 +886,6 @@ int drm_mode_group_init(struct drm_device *dev, struct drm_mode_group *group)
886 total_objects += dev->mode_config.num_connector; 886 total_objects += dev->mode_config.num_connector;
887 total_objects += dev->mode_config.num_encoder; 887 total_objects += dev->mode_config.num_encoder;
888 888
889 if (total_objects == 0)
890 return -EINVAL;
891
892 group->id_list = kzalloc(total_objects * sizeof(uint32_t), GFP_KERNEL); 889 group->id_list = kzalloc(total_objects * sizeof(uint32_t), GFP_KERNEL);
893 if (!group->id_list) 890 if (!group->id_list)
894 return -ENOMEM; 891 return -ENOMEM;
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 4d46441cbe2d..0a893f7400fa 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1207,13 +1207,17 @@ static int i915_context_status(struct seq_file *m, void *unused)
1207 if (ret) 1207 if (ret)
1208 return ret; 1208 return ret;
1209 1209
1210 seq_printf(m, "power context "); 1210 if (dev_priv->pwrctx) {
1211 describe_obj(m, dev_priv->pwrctx); 1211 seq_printf(m, "power context ");
1212 seq_printf(m, "\n"); 1212 describe_obj(m, dev_priv->pwrctx);
1213 seq_printf(m, "\n");
1214 }
1213 1215
1214 seq_printf(m, "render context "); 1216 if (dev_priv->renderctx) {
1215 describe_obj(m, dev_priv->renderctx); 1217 seq_printf(m, "render context ");
1216 seq_printf(m, "\n"); 1218 describe_obj(m, dev_priv->renderctx);
1219 seq_printf(m, "\n");
1220 }
1217 1221
1218 mutex_unlock(&dev->mode_config.mutex); 1222 mutex_unlock(&dev->mode_config.mutex);
1219 1223
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 2b79588541e7..e1787022d6c8 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1266,30 +1266,6 @@ static int i915_load_modeset_init(struct drm_device *dev)
1266 1266
1267 intel_modeset_gem_init(dev); 1267 intel_modeset_gem_init(dev);
1268 1268
1269 if (IS_IVYBRIDGE(dev)) {
1270 /* Share pre & uninstall handlers with ILK/SNB */
1271 dev->driver->irq_handler = ivybridge_irq_handler;
1272 dev->driver->irq_preinstall = ironlake_irq_preinstall;
1273 dev->driver->irq_postinstall = ivybridge_irq_postinstall;
1274 dev->driver->irq_uninstall = ironlake_irq_uninstall;
1275 dev->driver->enable_vblank = ivybridge_enable_vblank;
1276 dev->driver->disable_vblank = ivybridge_disable_vblank;
1277 } else if (HAS_PCH_SPLIT(dev)) {
1278 dev->driver->irq_handler = ironlake_irq_handler;
1279 dev->driver->irq_preinstall = ironlake_irq_preinstall;
1280 dev->driver->irq_postinstall = ironlake_irq_postinstall;
1281 dev->driver->irq_uninstall = ironlake_irq_uninstall;
1282 dev->driver->enable_vblank = ironlake_enable_vblank;
1283 dev->driver->disable_vblank = ironlake_disable_vblank;
1284 } else {
1285 dev->driver->irq_preinstall = i915_driver_irq_preinstall;
1286 dev->driver->irq_postinstall = i915_driver_irq_postinstall;
1287 dev->driver->irq_uninstall = i915_driver_irq_uninstall;
1288 dev->driver->irq_handler = i915_driver_irq_handler;
1289 dev->driver->enable_vblank = i915_enable_vblank;
1290 dev->driver->disable_vblank = i915_disable_vblank;
1291 }
1292
1293 ret = drm_irq_install(dev); 1269 ret = drm_irq_install(dev);
1294 if (ret) 1270 if (ret)
1295 goto cleanup_gem; 1271 goto cleanup_gem;
@@ -2017,12 +1993,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
2017 /* enable GEM by default */ 1993 /* enable GEM by default */
2018 dev_priv->has_gem = 1; 1994 dev_priv->has_gem = 1;
2019 1995
2020 dev->driver->get_vblank_counter = i915_get_vblank_counter; 1996 intel_irq_init(dev);
2021 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
2022 if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev)) {
2023 dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
2024 dev->driver->get_vblank_counter = gm45_get_vblank_counter;
2025 }
2026 1997
2027 /* Try to make sure MCHBAR is enabled before poking at it */ 1998 /* Try to make sure MCHBAR is enabled before poking at it */
2028 intel_setup_mchbar(dev); 1999 intel_setup_mchbar(dev);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 0defd4270594..013d304455b9 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -579,6 +579,9 @@ int i915_reset(struct drm_device *dev, u8 flags)
579 } else switch (INTEL_INFO(dev)->gen) { 579 } else switch (INTEL_INFO(dev)->gen) {
580 case 6: 580 case 6:
581 ret = gen6_do_reset(dev, flags); 581 ret = gen6_do_reset(dev, flags);
582 /* If reset with a user forcewake, try to restore */
583 if (atomic_read(&dev_priv->forcewake_count))
584 __gen6_gt_force_wake_get(dev_priv);
582 break; 585 break;
583 case 5: 586 case 5:
584 ret = ironlake_do_reset(dev, flags); 587 ret = ironlake_do_reset(dev, flags);
@@ -762,14 +765,6 @@ static struct drm_driver driver = {
762 .resume = i915_resume, 765 .resume = i915_resume,
763 766
764 .device_is_agp = i915_driver_device_is_agp, 767 .device_is_agp = i915_driver_device_is_agp,
765 .enable_vblank = i915_enable_vblank,
766 .disable_vblank = i915_disable_vblank,
767 .get_vblank_timestamp = i915_get_vblank_timestamp,
768 .get_scanout_position = i915_get_crtc_scanoutpos,
769 .irq_preinstall = i915_driver_irq_preinstall,
770 .irq_postinstall = i915_driver_irq_postinstall,
771 .irq_uninstall = i915_driver_irq_uninstall,
772 .irq_handler = i915_driver_irq_handler,
773 .reclaim_buffers = drm_core_reclaim_buffers, 768 .reclaim_buffers = drm_core_reclaim_buffers,
774 .master_create = i915_master_create, 769 .master_create = i915_master_create,
775 .master_destroy = i915_master_destroy, 770 .master_destroy = i915_master_destroy,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f63ee162f124..f245c588ae95 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -211,6 +211,9 @@ struct drm_i915_display_funcs {
211 void (*fdi_link_train)(struct drm_crtc *crtc); 211 void (*fdi_link_train)(struct drm_crtc *crtc);
212 void (*init_clock_gating)(struct drm_device *dev); 212 void (*init_clock_gating)(struct drm_device *dev);
213 void (*init_pch_clock_gating)(struct drm_device *dev); 213 void (*init_pch_clock_gating)(struct drm_device *dev);
214 int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
215 struct drm_framebuffer *fb,
216 struct drm_i915_gem_object *obj);
214 /* clock updates for mode set */ 217 /* clock updates for mode set */
215 /* cursor updates */ 218 /* cursor updates */
216 /* render clock increase/decrease */ 219 /* render clock increase/decrease */
@@ -994,8 +997,6 @@ extern unsigned int i915_enable_fbc;
994 997
995extern int i915_suspend(struct drm_device *dev, pm_message_t state); 998extern int i915_suspend(struct drm_device *dev, pm_message_t state);
996extern int i915_resume(struct drm_device *dev); 999extern int i915_resume(struct drm_device *dev);
997extern void i915_save_display(struct drm_device *dev);
998extern void i915_restore_display(struct drm_device *dev);
999extern int i915_master_create(struct drm_device *dev, struct drm_master *master); 1000extern int i915_master_create(struct drm_device *dev, struct drm_master *master);
1000extern void i915_master_destroy(struct drm_device *dev, struct drm_master *master); 1001extern void i915_master_destroy(struct drm_device *dev, struct drm_master *master);
1001 1002
@@ -1030,33 +1031,12 @@ extern int i915_irq_emit(struct drm_device *dev, void *data,
1030extern int i915_irq_wait(struct drm_device *dev, void *data, 1031extern int i915_irq_wait(struct drm_device *dev, void *data,
1031 struct drm_file *file_priv); 1032 struct drm_file *file_priv);
1032 1033
1033extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS); 1034extern void intel_irq_init(struct drm_device *dev);
1034extern void i915_driver_irq_preinstall(struct drm_device * dev);
1035extern int i915_driver_irq_postinstall(struct drm_device *dev);
1036extern void i915_driver_irq_uninstall(struct drm_device * dev);
1037
1038extern irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS);
1039extern void ironlake_irq_preinstall(struct drm_device *dev);
1040extern int ironlake_irq_postinstall(struct drm_device *dev);
1041extern void ironlake_irq_uninstall(struct drm_device *dev);
1042
1043extern irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS);
1044extern void ivybridge_irq_preinstall(struct drm_device *dev);
1045extern int ivybridge_irq_postinstall(struct drm_device *dev);
1046extern void ivybridge_irq_uninstall(struct drm_device *dev);
1047 1035
1048extern int i915_vblank_pipe_set(struct drm_device *dev, void *data, 1036extern int i915_vblank_pipe_set(struct drm_device *dev, void *data,
1049 struct drm_file *file_priv); 1037 struct drm_file *file_priv);
1050extern int i915_vblank_pipe_get(struct drm_device *dev, void *data, 1038extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
1051 struct drm_file *file_priv); 1039 struct drm_file *file_priv);
1052extern int i915_enable_vblank(struct drm_device *dev, int crtc);
1053extern void i915_disable_vblank(struct drm_device *dev, int crtc);
1054extern int ironlake_enable_vblank(struct drm_device *dev, int crtc);
1055extern void ironlake_disable_vblank(struct drm_device *dev, int crtc);
1056extern int ivybridge_enable_vblank(struct drm_device *dev, int crtc);
1057extern void ivybridge_disable_vblank(struct drm_device *dev, int crtc);
1058extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc);
1059extern u32 gm45_get_vblank_counter(struct drm_device *dev, int crtc);
1060extern int i915_vblank_swap(struct drm_device *dev, void *data, 1040extern int i915_vblank_swap(struct drm_device *dev, void *data,
1061 struct drm_file *file_priv); 1041 struct drm_file *file_priv);
1062 1042
@@ -1067,13 +1047,6 @@ void
1067i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask); 1047i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
1068 1048
1069void intel_enable_asle (struct drm_device *dev); 1049void intel_enable_asle (struct drm_device *dev);
1070int i915_get_vblank_timestamp(struct drm_device *dev, int crtc,
1071 int *max_error,
1072 struct timeval *vblank_time,
1073 unsigned flags);
1074
1075int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
1076 int *vpos, int *hpos);
1077 1050
1078#ifdef CONFIG_DEBUG_FS 1051#ifdef CONFIG_DEBUG_FS
1079extern void i915_destroy_error_state(struct drm_device *dev); 1052extern void i915_destroy_error_state(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 85f713746a1f..5c0d1247f453 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2072,8 +2072,8 @@ i915_wait_request(struct intel_ring_buffer *ring,
2072 if (!ier) { 2072 if (!ier) {
2073 DRM_ERROR("something (likely vbetool) disabled " 2073 DRM_ERROR("something (likely vbetool) disabled "
2074 "interrupts, re-enabling\n"); 2074 "interrupts, re-enabling\n");
2075 i915_driver_irq_preinstall(ring->dev); 2075 ring->dev->driver->irq_preinstall(ring->dev);
2076 i915_driver_irq_postinstall(ring->dev); 2076 ring->dev->driver->irq_postinstall(ring->dev);
2077 } 2077 }
2078 2078
2079 trace_i915_gem_request_wait_begin(ring, seqno); 2079 trace_i915_gem_request_wait_begin(ring, seqno);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index ae2b49969b99..3b03f85ea627 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -152,7 +152,7 @@ i915_pipe_enabled(struct drm_device *dev, int pipe)
152/* Called from drm generic code, passed a 'crtc', which 152/* Called from drm generic code, passed a 'crtc', which
153 * we use as a pipe index 153 * we use as a pipe index
154 */ 154 */
155u32 i915_get_vblank_counter(struct drm_device *dev, int pipe) 155static u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
156{ 156{
157 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 157 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
158 unsigned long high_frame; 158 unsigned long high_frame;
@@ -184,7 +184,7 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
184 return (high1 << 8) | low; 184 return (high1 << 8) | low;
185} 185}
186 186
187u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe) 187static u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
188{ 188{
189 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 189 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
190 int reg = PIPE_FRMCOUNT_GM45(pipe); 190 int reg = PIPE_FRMCOUNT_GM45(pipe);
@@ -198,7 +198,7 @@ u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
198 return I915_READ(reg); 198 return I915_READ(reg);
199} 199}
200 200
201int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe, 201static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
202 int *vpos, int *hpos) 202 int *vpos, int *hpos)
203{ 203{
204 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 204 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
@@ -264,7 +264,7 @@ int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
264 return ret; 264 return ret;
265} 265}
266 266
267int i915_get_vblank_timestamp(struct drm_device *dev, int pipe, 267static int i915_get_vblank_timestamp(struct drm_device *dev, int pipe,
268 int *max_error, 268 int *max_error,
269 struct timeval *vblank_time, 269 struct timeval *vblank_time,
270 unsigned flags) 270 unsigned flags)
@@ -462,7 +462,7 @@ static void pch_irq_handler(struct drm_device *dev)
462 DRM_DEBUG_DRIVER("PCH transcoder A underrun interrupt\n"); 462 DRM_DEBUG_DRIVER("PCH transcoder A underrun interrupt\n");
463} 463}
464 464
465irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS) 465static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
466{ 466{
467 struct drm_device *dev = (struct drm_device *) arg; 467 struct drm_device *dev = (struct drm_device *) arg;
468 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 468 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
@@ -550,7 +550,7 @@ done:
550 return ret; 550 return ret;
551} 551}
552 552
553irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) 553static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)
554{ 554{
555 struct drm_device *dev = (struct drm_device *) arg; 555 struct drm_device *dev = (struct drm_device *) arg;
556 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 556 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
@@ -1209,7 +1209,7 @@ static void i915_pageflip_stall_check(struct drm_device *dev, int pipe)
1209 } 1209 }
1210} 1210}
1211 1211
1212irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) 1212static irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
1213{ 1213{
1214 struct drm_device *dev = (struct drm_device *) arg; 1214 struct drm_device *dev = (struct drm_device *) arg;
1215 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1215 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
@@ -1454,7 +1454,7 @@ int i915_irq_wait(struct drm_device *dev, void *data,
1454/* Called from drm generic code, passed 'crtc' which 1454/* Called from drm generic code, passed 'crtc' which
1455 * we use as a pipe index 1455 * we use as a pipe index
1456 */ 1456 */
1457int i915_enable_vblank(struct drm_device *dev, int pipe) 1457static int i915_enable_vblank(struct drm_device *dev, int pipe)
1458{ 1458{
1459 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1459 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1460 unsigned long irqflags; 1460 unsigned long irqflags;
@@ -1478,7 +1478,7 @@ int i915_enable_vblank(struct drm_device *dev, int pipe)
1478 return 0; 1478 return 0;
1479} 1479}
1480 1480
1481int ironlake_enable_vblank(struct drm_device *dev, int pipe) 1481static int ironlake_enable_vblank(struct drm_device *dev, int pipe)
1482{ 1482{
1483 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1483 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1484 unsigned long irqflags; 1484 unsigned long irqflags;
@@ -1494,7 +1494,7 @@ int ironlake_enable_vblank(struct drm_device *dev, int pipe)
1494 return 0; 1494 return 0;
1495} 1495}
1496 1496
1497int ivybridge_enable_vblank(struct drm_device *dev, int pipe) 1497static int ivybridge_enable_vblank(struct drm_device *dev, int pipe)
1498{ 1498{
1499 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1499 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1500 unsigned long irqflags; 1500 unsigned long irqflags;
@@ -1513,7 +1513,7 @@ int ivybridge_enable_vblank(struct drm_device *dev, int pipe)
1513/* Called from drm generic code, passed 'crtc' which 1513/* Called from drm generic code, passed 'crtc' which
1514 * we use as a pipe index 1514 * we use as a pipe index
1515 */ 1515 */
1516void i915_disable_vblank(struct drm_device *dev, int pipe) 1516static void i915_disable_vblank(struct drm_device *dev, int pipe)
1517{ 1517{
1518 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1518 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1519 unsigned long irqflags; 1519 unsigned long irqflags;
@@ -1529,7 +1529,7 @@ void i915_disable_vblank(struct drm_device *dev, int pipe)
1529 spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); 1529 spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
1530} 1530}
1531 1531
1532void ironlake_disable_vblank(struct drm_device *dev, int pipe) 1532static void ironlake_disable_vblank(struct drm_device *dev, int pipe)
1533{ 1533{
1534 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1534 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1535 unsigned long irqflags; 1535 unsigned long irqflags;
@@ -1540,7 +1540,7 @@ void ironlake_disable_vblank(struct drm_device *dev, int pipe)
1540 spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); 1540 spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
1541} 1541}
1542 1542
1543void ivybridge_disable_vblank(struct drm_device *dev, int pipe) 1543static void ivybridge_disable_vblank(struct drm_device *dev, int pipe)
1544{ 1544{
1545 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1545 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1546 unsigned long irqflags; 1546 unsigned long irqflags;
@@ -1728,7 +1728,7 @@ repeat:
1728 1728
1729/* drm_dma.h hooks 1729/* drm_dma.h hooks
1730*/ 1730*/
1731void ironlake_irq_preinstall(struct drm_device *dev) 1731static void ironlake_irq_preinstall(struct drm_device *dev)
1732{ 1732{
1733 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1733 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1734 1734
@@ -1740,7 +1740,7 @@ void ironlake_irq_preinstall(struct drm_device *dev)
1740 INIT_WORK(&dev_priv->rps_work, gen6_pm_rps_work); 1740 INIT_WORK(&dev_priv->rps_work, gen6_pm_rps_work);
1741 1741
1742 I915_WRITE(HWSTAM, 0xeffe); 1742 I915_WRITE(HWSTAM, 0xeffe);
1743 if (IS_GEN6(dev)) { 1743 if (IS_GEN6(dev) || IS_GEN7(dev)) {
1744 /* Workaround stalls observed on Sandy Bridge GPUs by 1744 /* Workaround stalls observed on Sandy Bridge GPUs by
1745 * making the blitter command streamer generate a 1745 * making the blitter command streamer generate a
1746 * write to the Hardware Status Page for 1746 * write to the Hardware Status Page for
@@ -1769,7 +1769,7 @@ void ironlake_irq_preinstall(struct drm_device *dev)
1769 POSTING_READ(SDEIER); 1769 POSTING_READ(SDEIER);
1770} 1770}
1771 1771
1772int ironlake_irq_postinstall(struct drm_device *dev) 1772static int ironlake_irq_postinstall(struct drm_device *dev)
1773{ 1773{
1774 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1774 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1775 /* enable kind of interrupts always enabled */ 1775 /* enable kind of interrupts always enabled */
@@ -1841,7 +1841,7 @@ int ironlake_irq_postinstall(struct drm_device *dev)
1841 return 0; 1841 return 0;
1842} 1842}
1843 1843
1844int ivybridge_irq_postinstall(struct drm_device *dev) 1844static int ivybridge_irq_postinstall(struct drm_device *dev)
1845{ 1845{
1846 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1846 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1847 /* enable kind of interrupts always enabled */ 1847 /* enable kind of interrupts always enabled */
@@ -1891,7 +1891,7 @@ int ivybridge_irq_postinstall(struct drm_device *dev)
1891 return 0; 1891 return 0;
1892} 1892}
1893 1893
1894void i915_driver_irq_preinstall(struct drm_device * dev) 1894static void i915_driver_irq_preinstall(struct drm_device * dev)
1895{ 1895{
1896 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1896 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1897 int pipe; 1897 int pipe;
@@ -1918,7 +1918,7 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
1918 * Must be called after intel_modeset_init or hotplug interrupts won't be 1918 * Must be called after intel_modeset_init or hotplug interrupts won't be
1919 * enabled correctly. 1919 * enabled correctly.
1920 */ 1920 */
1921int i915_driver_irq_postinstall(struct drm_device *dev) 1921static int i915_driver_irq_postinstall(struct drm_device *dev)
1922{ 1922{
1923 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1923 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1924 u32 enable_mask = I915_INTERRUPT_ENABLE_FIX | I915_INTERRUPT_ENABLE_VAR; 1924 u32 enable_mask = I915_INTERRUPT_ENABLE_FIX | I915_INTERRUPT_ENABLE_VAR;
@@ -1994,7 +1994,7 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
1994 return 0; 1994 return 0;
1995} 1995}
1996 1996
1997void ironlake_irq_uninstall(struct drm_device *dev) 1997static void ironlake_irq_uninstall(struct drm_device *dev)
1998{ 1998{
1999 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1999 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
2000 2000
@@ -2014,7 +2014,7 @@ void ironlake_irq_uninstall(struct drm_device *dev)
2014 I915_WRITE(GTIIR, I915_READ(GTIIR)); 2014 I915_WRITE(GTIIR, I915_READ(GTIIR));
2015} 2015}
2016 2016
2017void i915_driver_irq_uninstall(struct drm_device * dev) 2017static void i915_driver_irq_uninstall(struct drm_device * dev)
2018{ 2018{
2019 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 2019 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
2020 int pipe; 2020 int pipe;
@@ -2040,3 +2040,41 @@ void i915_driver_irq_uninstall(struct drm_device * dev)
2040 I915_READ(PIPESTAT(pipe)) & 0x8000ffff); 2040 I915_READ(PIPESTAT(pipe)) & 0x8000ffff);
2041 I915_WRITE(IIR, I915_READ(IIR)); 2041 I915_WRITE(IIR, I915_READ(IIR));
2042} 2042}
2043
2044void intel_irq_init(struct drm_device *dev)
2045{
2046 dev->driver->get_vblank_counter = i915_get_vblank_counter;
2047 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
2048 if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev)) {
2049 dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
2050 dev->driver->get_vblank_counter = gm45_get_vblank_counter;
2051 }
2052
2053
2054 dev->driver->get_vblank_timestamp = i915_get_vblank_timestamp;
2055 dev->driver->get_scanout_position = i915_get_crtc_scanoutpos;
2056
2057 if (IS_IVYBRIDGE(dev)) {
2058 /* Share pre & uninstall handlers with ILK/SNB */
2059 dev->driver->irq_handler = ivybridge_irq_handler;
2060 dev->driver->irq_preinstall = ironlake_irq_preinstall;
2061 dev->driver->irq_postinstall = ivybridge_irq_postinstall;
2062 dev->driver->irq_uninstall = ironlake_irq_uninstall;
2063 dev->driver->enable_vblank = ivybridge_enable_vblank;
2064 dev->driver->disable_vblank = ivybridge_disable_vblank;
2065 } else if (HAS_PCH_SPLIT(dev)) {
2066 dev->driver->irq_handler = ironlake_irq_handler;
2067 dev->driver->irq_preinstall = ironlake_irq_preinstall;
2068 dev->driver->irq_postinstall = ironlake_irq_postinstall;
2069 dev->driver->irq_uninstall = ironlake_irq_uninstall;
2070 dev->driver->enable_vblank = ironlake_enable_vblank;
2071 dev->driver->disable_vblank = ironlake_disable_vblank;
2072 } else {
2073 dev->driver->irq_preinstall = i915_driver_irq_preinstall;
2074 dev->driver->irq_postinstall = i915_driver_irq_postinstall;
2075 dev->driver->irq_uninstall = i915_driver_irq_uninstall;
2076 dev->driver->irq_handler = i915_driver_irq_handler;
2077 dev->driver->enable_vblank = i915_enable_vblank;
2078 dev->driver->disable_vblank = i915_disable_vblank;
2079 }
2080}
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index e8152d23d5b6..5257cfc34c35 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -597,7 +597,7 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
597 return; 597 return;
598} 598}
599 599
600void i915_save_display(struct drm_device *dev) 600static void i915_save_display(struct drm_device *dev)
601{ 601{
602 struct drm_i915_private *dev_priv = dev->dev_private; 602 struct drm_i915_private *dev_priv = dev->dev_private;
603 603
@@ -678,7 +678,6 @@ void i915_save_display(struct drm_device *dev)
678 } 678 }
679 679
680 /* VGA state */ 680 /* VGA state */
681 mutex_lock(&dev->struct_mutex);
682 dev_priv->saveVGA0 = I915_READ(VGA0); 681 dev_priv->saveVGA0 = I915_READ(VGA0);
683 dev_priv->saveVGA1 = I915_READ(VGA1); 682 dev_priv->saveVGA1 = I915_READ(VGA1);
684 dev_priv->saveVGA_PD = I915_READ(VGA_PD); 683 dev_priv->saveVGA_PD = I915_READ(VGA_PD);
@@ -688,10 +687,9 @@ void i915_save_display(struct drm_device *dev)
688 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); 687 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
689 688
690 i915_save_vga(dev); 689 i915_save_vga(dev);
691 mutex_unlock(&dev->struct_mutex);
692} 690}
693 691
694void i915_restore_display(struct drm_device *dev) 692static void i915_restore_display(struct drm_device *dev)
695{ 693{
696 struct drm_i915_private *dev_priv = dev->dev_private; 694 struct drm_i915_private *dev_priv = dev->dev_private;
697 695
@@ -783,7 +781,6 @@ void i915_restore_display(struct drm_device *dev)
783 else 781 else
784 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); 782 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
785 783
786 mutex_lock(&dev->struct_mutex);
787 I915_WRITE(VGA0, dev_priv->saveVGA0); 784 I915_WRITE(VGA0, dev_priv->saveVGA0);
788 I915_WRITE(VGA1, dev_priv->saveVGA1); 785 I915_WRITE(VGA1, dev_priv->saveVGA1);
789 I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); 786 I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
@@ -791,7 +788,6 @@ void i915_restore_display(struct drm_device *dev)
791 udelay(150); 788 udelay(150);
792 789
793 i915_restore_vga(dev); 790 i915_restore_vga(dev);
794 mutex_unlock(&dev->struct_mutex);
795} 791}
796 792
797int i915_save_state(struct drm_device *dev) 793int i915_save_state(struct drm_device *dev)
@@ -801,6 +797,8 @@ int i915_save_state(struct drm_device *dev)
801 797
802 pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB); 798 pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
803 799
800 mutex_lock(&dev->struct_mutex);
801
804 /* Hardware status page */ 802 /* Hardware status page */
805 dev_priv->saveHWS = I915_READ(HWS_PGA); 803 dev_priv->saveHWS = I915_READ(HWS_PGA);
806 804
@@ -840,6 +838,8 @@ int i915_save_state(struct drm_device *dev)
840 for (i = 0; i < 3; i++) 838 for (i = 0; i < 3; i++)
841 dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2)); 839 dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2));
842 840
841 mutex_unlock(&dev->struct_mutex);
842
843 return 0; 843 return 0;
844} 844}
845 845
@@ -850,6 +850,8 @@ int i915_restore_state(struct drm_device *dev)
850 850
851 pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB); 851 pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
852 852
853 mutex_lock(&dev->struct_mutex);
854
853 /* Hardware status page */ 855 /* Hardware status page */
854 I915_WRITE(HWS_PGA, dev_priv->saveHWS); 856 I915_WRITE(HWS_PGA, dev_priv->saveHWS);
855 857
@@ -867,6 +869,7 @@ int i915_restore_state(struct drm_device *dev)
867 I915_WRITE(IER, dev_priv->saveIER); 869 I915_WRITE(IER, dev_priv->saveIER);
868 I915_WRITE(IMR, dev_priv->saveIMR); 870 I915_WRITE(IMR, dev_priv->saveIMR);
869 } 871 }
872 mutex_unlock(&dev->struct_mutex);
870 873
871 intel_init_clock_gating(dev); 874 intel_init_clock_gating(dev);
872 875
@@ -878,6 +881,8 @@ int i915_restore_state(struct drm_device *dev)
878 if (IS_GEN6(dev)) 881 if (IS_GEN6(dev))
879 gen6_enable_rps(dev_priv); 882 gen6_enable_rps(dev_priv);
880 883
884 mutex_lock(&dev->struct_mutex);
885
881 /* Cache mode state */ 886 /* Cache mode state */
882 I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000); 887 I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
883 888
@@ -891,6 +896,8 @@ int i915_restore_state(struct drm_device *dev)
891 for (i = 0; i < 3; i++) 896 for (i = 0; i < 3; i++)
892 I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]); 897 I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]);
893 898
899 mutex_unlock(&dev->struct_mutex);
900
894 intel_i2c_reset(dev); 901 intel_i2c_reset(dev);
895 902
896 return 0; 903 return 0;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index aa43e7be6053..21b6f93fe919 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6261,6 +6261,197 @@ void intel_prepare_page_flip(struct drm_device *dev, int plane)
6261 spin_unlock_irqrestore(&dev->event_lock, flags); 6261 spin_unlock_irqrestore(&dev->event_lock, flags);
6262} 6262}
6263 6263
6264static int intel_gen2_queue_flip(struct drm_device *dev,
6265 struct drm_crtc *crtc,
6266 struct drm_framebuffer *fb,
6267 struct drm_i915_gem_object *obj)
6268{
6269 struct drm_i915_private *dev_priv = dev->dev_private;
6270 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
6271 unsigned long offset;
6272 u32 flip_mask;
6273 int ret;
6274
6275 ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));
6276 if (ret)
6277 goto out;
6278
6279 /* Offset into the new buffer for cases of shared fbs between CRTCs */
6280 offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
6281
6282 ret = BEGIN_LP_RING(6);
6283 if (ret)
6284 goto out;
6285
6286 /* Can't queue multiple flips, so wait for the previous
6287 * one to finish before executing the next.
6288 */
6289 if (intel_crtc->plane)
6290 flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
6291 else
6292 flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
6293 OUT_RING(MI_WAIT_FOR_EVENT | flip_mask);
6294 OUT_RING(MI_NOOP);
6295 OUT_RING(MI_DISPLAY_FLIP |
6296 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
6297 OUT_RING(fb->pitch);
6298 OUT_RING(obj->gtt_offset + offset);
6299 OUT_RING(MI_NOOP);
6300 ADVANCE_LP_RING();
6301out:
6302 return ret;
6303}
6304
6305static int intel_gen3_queue_flip(struct drm_device *dev,
6306 struct drm_crtc *crtc,
6307 struct drm_framebuffer *fb,
6308 struct drm_i915_gem_object *obj)
6309{
6310 struct drm_i915_private *dev_priv = dev->dev_private;
6311 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
6312 unsigned long offset;
6313 u32 flip_mask;
6314 int ret;
6315
6316 ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));
6317 if (ret)
6318 goto out;
6319
6320 /* Offset into the new buffer for cases of shared fbs between CRTCs */
6321 offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
6322
6323 ret = BEGIN_LP_RING(6);
6324 if (ret)
6325 goto out;
6326
6327 if (intel_crtc->plane)
6328 flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
6329 else
6330 flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
6331 OUT_RING(MI_WAIT_FOR_EVENT | flip_mask);
6332 OUT_RING(MI_NOOP);
6333 OUT_RING(MI_DISPLAY_FLIP_I915 |
6334 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
6335 OUT_RING(fb->pitch);
6336 OUT_RING(obj->gtt_offset + offset);
6337 OUT_RING(MI_NOOP);
6338
6339 ADVANCE_LP_RING();
6340out:
6341 return ret;
6342}
6343
6344static int intel_gen4_queue_flip(struct drm_device *dev,
6345 struct drm_crtc *crtc,
6346 struct drm_framebuffer *fb,
6347 struct drm_i915_gem_object *obj)
6348{
6349 struct drm_i915_private *dev_priv = dev->dev_private;
6350 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
6351 uint32_t pf, pipesrc;
6352 int ret;
6353
6354 ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));
6355 if (ret)
6356 goto out;
6357
6358 ret = BEGIN_LP_RING(4);
6359 if (ret)
6360 goto out;
6361
6362 /* i965+ uses the linear or tiled offsets from the
6363 * Display Registers (which do not change across a page-flip)
6364 * so we need only reprogram the base address.
6365 */
6366 OUT_RING(MI_DISPLAY_FLIP |
6367 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
6368 OUT_RING(fb->pitch);
6369 OUT_RING(obj->gtt_offset | obj->tiling_mode);
6370
6371 /* XXX Enabling the panel-fitter across page-flip is so far
6372 * untested on non-native modes, so ignore it for now.
6373 * pf = I915_READ(pipe == 0 ? PFA_CTL_1 : PFB_CTL_1) & PF_ENABLE;
6374 */
6375 pf = 0;
6376 pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
6377 OUT_RING(pf | pipesrc);
6378 ADVANCE_LP_RING();
6379out:
6380 return ret;
6381}
6382
6383static int intel_gen6_queue_flip(struct drm_device *dev,
6384 struct drm_crtc *crtc,
6385 struct drm_framebuffer *fb,
6386 struct drm_i915_gem_object *obj)
6387{
6388 struct drm_i915_private *dev_priv = dev->dev_private;
6389 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
6390 uint32_t pf, pipesrc;
6391 int ret;
6392
6393 ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));
6394 if (ret)
6395 goto out;
6396
6397 ret = BEGIN_LP_RING(4);
6398 if (ret)
6399 goto out;
6400
6401 OUT_RING(MI_DISPLAY_FLIP |
6402 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
6403 OUT_RING(fb->pitch | obj->tiling_mode);
6404 OUT_RING(obj->gtt_offset);
6405
6406 pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE;
6407 pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
6408 OUT_RING(pf | pipesrc);
6409 ADVANCE_LP_RING();
6410out:
6411 return ret;
6412}
6413
6414/*
6415 * On gen7 we currently use the blit ring because (in early silicon at least)
6416 * the render ring doesn't give us interrpts for page flip completion, which
6417 * means clients will hang after the first flip is queued. Fortunately the
6418 * blit ring generates interrupts properly, so use it instead.
6419 */
6420static int intel_gen7_queue_flip(struct drm_device *dev,
6421 struct drm_crtc *crtc,
6422 struct drm_framebuffer *fb,
6423 struct drm_i915_gem_object *obj)
6424{
6425 struct drm_i915_private *dev_priv = dev->dev_private;
6426 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
6427 struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
6428 int ret;
6429
6430 ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
6431 if (ret)
6432 goto out;
6433
6434 ret = intel_ring_begin(ring, 4);
6435 if (ret)
6436 goto out;
6437
6438 intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
6439 intel_ring_emit(ring, (fb->pitch | obj->tiling_mode));
6440 intel_ring_emit(ring, (obj->gtt_offset));
6441 intel_ring_emit(ring, (MI_NOOP));
6442 intel_ring_advance(ring);
6443out:
6444 return ret;
6445}
6446
6447static int intel_default_queue_flip(struct drm_device *dev,
6448 struct drm_crtc *crtc,
6449 struct drm_framebuffer *fb,
6450 struct drm_i915_gem_object *obj)
6451{
6452 return -ENODEV;
6453}
6454
6264static int intel_crtc_page_flip(struct drm_crtc *crtc, 6455static int intel_crtc_page_flip(struct drm_crtc *crtc,
6265 struct drm_framebuffer *fb, 6456 struct drm_framebuffer *fb,
6266 struct drm_pending_vblank_event *event) 6457 struct drm_pending_vblank_event *event)
@@ -6271,9 +6462,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
6271 struct drm_i915_gem_object *obj; 6462 struct drm_i915_gem_object *obj;
6272 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 6463 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
6273 struct intel_unpin_work *work; 6464 struct intel_unpin_work *work;
6274 unsigned long flags, offset; 6465 unsigned long flags;
6275 int pipe = intel_crtc->pipe;
6276 u32 pf, pipesrc;
6277 int ret; 6466 int ret;
6278 6467
6279 work = kzalloc(sizeof *work, GFP_KERNEL); 6468 work = kzalloc(sizeof *work, GFP_KERNEL);
@@ -6302,9 +6491,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
6302 obj = intel_fb->obj; 6491 obj = intel_fb->obj;
6303 6492
6304 mutex_lock(&dev->struct_mutex); 6493 mutex_lock(&dev->struct_mutex);
6305 ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));
6306 if (ret)
6307 goto cleanup_work;
6308 6494
6309 /* Reference the objects for the scheduled work. */ 6495 /* Reference the objects for the scheduled work. */
6310 drm_gem_object_reference(&work->old_fb_obj->base); 6496 drm_gem_object_reference(&work->old_fb_obj->base);
@@ -6316,91 +6502,18 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
6316 if (ret) 6502 if (ret)
6317 goto cleanup_objs; 6503 goto cleanup_objs;
6318 6504
6319 if (IS_GEN3(dev) || IS_GEN2(dev)) {
6320 u32 flip_mask;
6321
6322 /* Can't queue multiple flips, so wait for the previous
6323 * one to finish before executing the next.
6324 */
6325 ret = BEGIN_LP_RING(2);
6326 if (ret)
6327 goto cleanup_objs;
6328
6329 if (intel_crtc->plane)
6330 flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
6331 else
6332 flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
6333 OUT_RING(MI_WAIT_FOR_EVENT | flip_mask);
6334 OUT_RING(MI_NOOP);
6335 ADVANCE_LP_RING();
6336 }
6337
6338 work->pending_flip_obj = obj; 6505 work->pending_flip_obj = obj;
6339 6506
6340 work->enable_stall_check = true; 6507 work->enable_stall_check = true;
6341 6508
6342 /* Offset into the new buffer for cases of shared fbs between CRTCs */
6343 offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
6344
6345 ret = BEGIN_LP_RING(4);
6346 if (ret)
6347 goto cleanup_objs;
6348
6349 /* Block clients from rendering to the new back buffer until 6509 /* Block clients from rendering to the new back buffer until
6350 * the flip occurs and the object is no longer visible. 6510 * the flip occurs and the object is no longer visible.
6351 */ 6511 */
6352 atomic_add(1 << intel_crtc->plane, &work->old_fb_obj->pending_flip); 6512 atomic_add(1 << intel_crtc->plane, &work->old_fb_obj->pending_flip);
6353 6513
6354 switch (INTEL_INFO(dev)->gen) { 6514 ret = dev_priv->display.queue_flip(dev, crtc, fb, obj);
6355 case 2: 6515 if (ret)
6356 OUT_RING(MI_DISPLAY_FLIP | 6516 goto cleanup_pending;
6357 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
6358 OUT_RING(fb->pitch);
6359 OUT_RING(obj->gtt_offset + offset);
6360 OUT_RING(MI_NOOP);
6361 break;
6362
6363 case 3:
6364 OUT_RING(MI_DISPLAY_FLIP_I915 |
6365 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
6366 OUT_RING(fb->pitch);
6367 OUT_RING(obj->gtt_offset + offset);
6368 OUT_RING(MI_NOOP);
6369 break;
6370
6371 case 4:
6372 case 5:
6373 /* i965+ uses the linear or tiled offsets from the
6374 * Display Registers (which do not change across a page-flip)
6375 * so we need only reprogram the base address.
6376 */
6377 OUT_RING(MI_DISPLAY_FLIP |
6378 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
6379 OUT_RING(fb->pitch);
6380 OUT_RING(obj->gtt_offset | obj->tiling_mode);
6381
6382 /* XXX Enabling the panel-fitter across page-flip is so far
6383 * untested on non-native modes, so ignore it for now.
6384 * pf = I915_READ(pipe == 0 ? PFA_CTL_1 : PFB_CTL_1) & PF_ENABLE;
6385 */
6386 pf = 0;
6387 pipesrc = I915_READ(PIPESRC(pipe)) & 0x0fff0fff;
6388 OUT_RING(pf | pipesrc);
6389 break;
6390
6391 case 6:
6392 case 7:
6393 OUT_RING(MI_DISPLAY_FLIP |
6394 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
6395 OUT_RING(fb->pitch | obj->tiling_mode);
6396 OUT_RING(obj->gtt_offset);
6397
6398 pf = I915_READ(PF_CTL(pipe)) & PF_ENABLE;
6399 pipesrc = I915_READ(PIPESRC(pipe)) & 0x0fff0fff;
6400 OUT_RING(pf | pipesrc);
6401 break;
6402 }
6403 ADVANCE_LP_RING();
6404 6517
6405 mutex_unlock(&dev->struct_mutex); 6518 mutex_unlock(&dev->struct_mutex);
6406 6519
@@ -6408,10 +6521,11 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
6408 6521
6409 return 0; 6522 return 0;
6410 6523
6524cleanup_pending:
6525 atomic_sub(1 << intel_crtc->plane, &work->old_fb_obj->pending_flip);
6411cleanup_objs: 6526cleanup_objs:
6412 drm_gem_object_unreference(&work->old_fb_obj->base); 6527 drm_gem_object_unreference(&work->old_fb_obj->base);
6413 drm_gem_object_unreference(&obj->base); 6528 drm_gem_object_unreference(&obj->base);
6414cleanup_work:
6415 mutex_unlock(&dev->struct_mutex); 6529 mutex_unlock(&dev->struct_mutex);
6416 6530
6417 spin_lock_irqsave(&dev->event_lock, flags); 6531 spin_lock_irqsave(&dev->event_lock, flags);
@@ -7656,6 +7770,31 @@ static void intel_init_display(struct drm_device *dev)
7656 else 7770 else
7657 dev_priv->display.get_fifo_size = i830_get_fifo_size; 7771 dev_priv->display.get_fifo_size = i830_get_fifo_size;
7658 } 7772 }
7773
7774 /* Default just returns -ENODEV to indicate unsupported */
7775 dev_priv->display.queue_flip = intel_default_queue_flip;
7776
7777 switch (INTEL_INFO(dev)->gen) {
7778 case 2:
7779 dev_priv->display.queue_flip = intel_gen2_queue_flip;
7780 break;
7781
7782 case 3:
7783 dev_priv->display.queue_flip = intel_gen3_queue_flip;
7784 break;
7785
7786 case 4:
7787 case 5:
7788 dev_priv->display.queue_flip = intel_gen4_queue_flip;
7789 break;
7790
7791 case 6:
7792 dev_priv->display.queue_flip = intel_gen6_queue_flip;
7793 break;
7794 case 7:
7795 dev_priv->display.queue_flip = intel_gen7_queue_flip;
7796 break;
7797 }
7659} 7798}
7660 7799
7661/* 7800/*
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 56a8e2aea19c..9e2959bc91cd 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -1409,6 +1409,11 @@ void intel_setup_overlay(struct drm_device *dev)
1409 overlay = kzalloc(sizeof(struct intel_overlay), GFP_KERNEL); 1409 overlay = kzalloc(sizeof(struct intel_overlay), GFP_KERNEL);
1410 if (!overlay) 1410 if (!overlay)
1411 return; 1411 return;
1412
1413 mutex_lock(&dev->struct_mutex);
1414 if (WARN_ON(dev_priv->overlay))
1415 goto out_free;
1416
1412 overlay->dev = dev; 1417 overlay->dev = dev;
1413 1418
1414 reg_bo = i915_gem_alloc_object(dev, PAGE_SIZE); 1419 reg_bo = i915_gem_alloc_object(dev, PAGE_SIZE);
@@ -1416,8 +1421,6 @@ void intel_setup_overlay(struct drm_device *dev)
1416 goto out_free; 1421 goto out_free;
1417 overlay->reg_bo = reg_bo; 1422 overlay->reg_bo = reg_bo;
1418 1423
1419 mutex_lock(&dev->struct_mutex);
1420
1421 if (OVERLAY_NEEDS_PHYSICAL(dev)) { 1424 if (OVERLAY_NEEDS_PHYSICAL(dev)) {
1422 ret = i915_gem_attach_phys_object(dev, reg_bo, 1425 ret = i915_gem_attach_phys_object(dev, reg_bo,
1423 I915_GEM_PHYS_OVERLAY_REGS, 1426 I915_GEM_PHYS_OVERLAY_REGS,
@@ -1442,8 +1445,6 @@ void intel_setup_overlay(struct drm_device *dev)
1442 } 1445 }
1443 } 1446 }
1444 1447
1445 mutex_unlock(&dev->struct_mutex);
1446
1447 /* init all values */ 1448 /* init all values */
1448 overlay->color_key = 0x0101fe; 1449 overlay->color_key = 0x0101fe;
1449 overlay->brightness = -19; 1450 overlay->brightness = -19;
@@ -1452,7 +1453,7 @@ void intel_setup_overlay(struct drm_device *dev)
1452 1453
1453 regs = intel_overlay_map_regs(overlay); 1454 regs = intel_overlay_map_regs(overlay);
1454 if (!regs) 1455 if (!regs)
1455 goto out_free_bo; 1456 goto out_unpin_bo;
1456 1457
1457 memset(regs, 0, sizeof(struct overlay_registers)); 1458 memset(regs, 0, sizeof(struct overlay_registers));
1458 update_polyphase_filter(regs); 1459 update_polyphase_filter(regs);
@@ -1461,15 +1462,17 @@ void intel_setup_overlay(struct drm_device *dev)
1461 intel_overlay_unmap_regs(overlay, regs); 1462 intel_overlay_unmap_regs(overlay, regs);
1462 1463
1463 dev_priv->overlay = overlay; 1464 dev_priv->overlay = overlay;
1465 mutex_unlock(&dev->struct_mutex);
1464 DRM_INFO("initialized overlay support\n"); 1466 DRM_INFO("initialized overlay support\n");
1465 return; 1467 return;
1466 1468
1467out_unpin_bo: 1469out_unpin_bo:
1468 i915_gem_object_unpin(reg_bo); 1470 if (!OVERLAY_NEEDS_PHYSICAL(dev))
1471 i915_gem_object_unpin(reg_bo);
1469out_free_bo: 1472out_free_bo:
1470 drm_gem_object_unreference(&reg_bo->base); 1473 drm_gem_object_unreference(&reg_bo->base);
1471 mutex_unlock(&dev->struct_mutex);
1472out_free: 1474out_free:
1475 mutex_unlock(&dev->struct_mutex);
1473 kfree(overlay); 1476 kfree(overlay);
1474 return; 1477 return;
1475} 1478}
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 144f79a350ae..731acea865b5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -371,7 +371,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
371 engine->vram.flags_valid = nv50_vram_flags_valid; 371 engine->vram.flags_valid = nv50_vram_flags_valid;
372 break; 372 break;
373 case 0xC0: 373 case 0xC0:
374 case 0xD0:
375 engine->instmem.init = nvc0_instmem_init; 374 engine->instmem.init = nvc0_instmem_init;
376 engine->instmem.takedown = nvc0_instmem_takedown; 375 engine->instmem.takedown = nvc0_instmem_takedown;
377 engine->instmem.suspend = nvc0_instmem_suspend; 376 engine->instmem.suspend = nvc0_instmem_suspend;
@@ -923,7 +922,6 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
923 dev_priv->card_type = NV_50; 922 dev_priv->card_type = NV_50;
924 break; 923 break;
925 case 0xc0: 924 case 0xc0:
926 case 0xd0:
927 dev_priv->card_type = NV_C0; 925 dev_priv->card_type = NV_C0;
928 break; 926 break;
929 default: 927 default:
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 12d2fdc52414..660f96401a05 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -985,17 +985,19 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav
985{ 985{
986 save->vga_control[0] = RREG32(D1VGA_CONTROL); 986 save->vga_control[0] = RREG32(D1VGA_CONTROL);
987 save->vga_control[1] = RREG32(D2VGA_CONTROL); 987 save->vga_control[1] = RREG32(D2VGA_CONTROL);
988 save->vga_control[2] = RREG32(EVERGREEN_D3VGA_CONTROL);
989 save->vga_control[3] = RREG32(EVERGREEN_D4VGA_CONTROL);
990 save->vga_control[4] = RREG32(EVERGREEN_D5VGA_CONTROL);
991 save->vga_control[5] = RREG32(EVERGREEN_D6VGA_CONTROL);
992 save->vga_render_control = RREG32(VGA_RENDER_CONTROL); 988 save->vga_render_control = RREG32(VGA_RENDER_CONTROL);
993 save->vga_hdp_control = RREG32(VGA_HDP_CONTROL); 989 save->vga_hdp_control = RREG32(VGA_HDP_CONTROL);
994 save->crtc_control[0] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET); 990 save->crtc_control[0] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET);
995 save->crtc_control[1] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET); 991 save->crtc_control[1] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET);
996 if (!(rdev->flags & RADEON_IS_IGP)) { 992 if (rdev->num_crtc >= 4) {
993 save->vga_control[2] = RREG32(EVERGREEN_D3VGA_CONTROL);
994 save->vga_control[3] = RREG32(EVERGREEN_D4VGA_CONTROL);
997 save->crtc_control[2] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET); 995 save->crtc_control[2] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET);
998 save->crtc_control[3] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET); 996 save->crtc_control[3] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET);
997 }
998 if (rdev->num_crtc >= 6) {
999 save->vga_control[4] = RREG32(EVERGREEN_D5VGA_CONTROL);
1000 save->vga_control[5] = RREG32(EVERGREEN_D6VGA_CONTROL);
999 save->crtc_control[4] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET); 1001 save->crtc_control[4] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET);
1000 save->crtc_control[5] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET); 1002 save->crtc_control[5] = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET);
1001 } 1003 }
@@ -1004,35 +1006,45 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav
1004 WREG32(VGA_RENDER_CONTROL, 0); 1006 WREG32(VGA_RENDER_CONTROL, 0);
1005 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 1); 1007 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 1);
1006 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 1); 1008 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 1);
1007 if (!(rdev->flags & RADEON_IS_IGP)) { 1009 if (rdev->num_crtc >= 4) {
1008 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 1); 1010 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 1);
1009 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 1); 1011 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 1);
1012 }
1013 if (rdev->num_crtc >= 6) {
1010 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 1); 1014 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 1);
1011 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 1); 1015 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 1);
1012 } 1016 }
1013 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 1017 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
1014 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 1018 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
1015 if (!(rdev->flags & RADEON_IS_IGP)) { 1019 if (rdev->num_crtc >= 4) {
1016 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); 1020 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, 0);
1017 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); 1021 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, 0);
1022 }
1023 if (rdev->num_crtc >= 6) {
1018 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); 1024 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
1019 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); 1025 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);
1020 } 1026 }
1021 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 1027 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
1022 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 1028 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
1023 if (!(rdev->flags & RADEON_IS_IGP)) { 1029 if (rdev->num_crtc >= 4) {
1024 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); 1030 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0);
1025 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); 1031 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0);
1032 }
1033 if (rdev->num_crtc >= 6) {
1026 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); 1034 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
1027 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); 1035 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);
1028 } 1036 }
1029 1037
1030 WREG32(D1VGA_CONTROL, 0); 1038 WREG32(D1VGA_CONTROL, 0);
1031 WREG32(D2VGA_CONTROL, 0); 1039 WREG32(D2VGA_CONTROL, 0);
1032 WREG32(EVERGREEN_D3VGA_CONTROL, 0); 1040 if (rdev->num_crtc >= 4) {
1033 WREG32(EVERGREEN_D4VGA_CONTROL, 0); 1041 WREG32(EVERGREEN_D3VGA_CONTROL, 0);
1034 WREG32(EVERGREEN_D5VGA_CONTROL, 0); 1042 WREG32(EVERGREEN_D4VGA_CONTROL, 0);
1035 WREG32(EVERGREEN_D6VGA_CONTROL, 0); 1043 }
1044 if (rdev->num_crtc >= 6) {
1045 WREG32(EVERGREEN_D5VGA_CONTROL, 0);
1046 WREG32(EVERGREEN_D6VGA_CONTROL, 0);
1047 }
1036} 1048}
1037 1049
1038void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save) 1050void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save)
@@ -1055,7 +1067,7 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s
1055 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + EVERGREEN_CRTC1_REGISTER_OFFSET, 1067 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + EVERGREEN_CRTC1_REGISTER_OFFSET,
1056 (u32)rdev->mc.vram_start); 1068 (u32)rdev->mc.vram_start);
1057 1069
1058 if (!(rdev->flags & RADEON_IS_IGP)) { 1070 if (rdev->num_crtc >= 4) {
1059 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC2_REGISTER_OFFSET, 1071 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC2_REGISTER_OFFSET,
1060 upper_32_bits(rdev->mc.vram_start)); 1072 upper_32_bits(rdev->mc.vram_start));
1061 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC2_REGISTER_OFFSET, 1073 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC2_REGISTER_OFFSET,
@@ -1073,7 +1085,8 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s
1073 (u32)rdev->mc.vram_start); 1085 (u32)rdev->mc.vram_start);
1074 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + EVERGREEN_CRTC3_REGISTER_OFFSET, 1086 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + EVERGREEN_CRTC3_REGISTER_OFFSET,
1075 (u32)rdev->mc.vram_start); 1087 (u32)rdev->mc.vram_start);
1076 1088 }
1089 if (rdev->num_crtc >= 6) {
1077 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC4_REGISTER_OFFSET, 1090 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC4_REGISTER_OFFSET,
1078 upper_32_bits(rdev->mc.vram_start)); 1091 upper_32_bits(rdev->mc.vram_start));
1079 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC4_REGISTER_OFFSET, 1092 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + EVERGREEN_CRTC4_REGISTER_OFFSET,
@@ -1101,31 +1114,41 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s
1101 /* Restore video state */ 1114 /* Restore video state */
1102 WREG32(D1VGA_CONTROL, save->vga_control[0]); 1115 WREG32(D1VGA_CONTROL, save->vga_control[0]);
1103 WREG32(D2VGA_CONTROL, save->vga_control[1]); 1116 WREG32(D2VGA_CONTROL, save->vga_control[1]);
1104 WREG32(EVERGREEN_D3VGA_CONTROL, save->vga_control[2]); 1117 if (rdev->num_crtc >= 4) {
1105 WREG32(EVERGREEN_D4VGA_CONTROL, save->vga_control[3]); 1118 WREG32(EVERGREEN_D3VGA_CONTROL, save->vga_control[2]);
1106 WREG32(EVERGREEN_D5VGA_CONTROL, save->vga_control[4]); 1119 WREG32(EVERGREEN_D4VGA_CONTROL, save->vga_control[3]);
1107 WREG32(EVERGREEN_D6VGA_CONTROL, save->vga_control[5]); 1120 }
1121 if (rdev->num_crtc >= 6) {
1122 WREG32(EVERGREEN_D5VGA_CONTROL, save->vga_control[4]);
1123 WREG32(EVERGREEN_D6VGA_CONTROL, save->vga_control[5]);
1124 }
1108 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 1); 1125 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 1);
1109 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 1); 1126 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 1);
1110 if (!(rdev->flags & RADEON_IS_IGP)) { 1127 if (rdev->num_crtc >= 4) {
1111 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 1); 1128 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 1);
1112 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 1); 1129 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 1);
1130 }
1131 if (rdev->num_crtc >= 6) {
1113 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 1); 1132 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 1);
1114 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 1); 1133 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 1);
1115 } 1134 }
1116 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, save->crtc_control[0]); 1135 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, save->crtc_control[0]);
1117 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, save->crtc_control[1]); 1136 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, save->crtc_control[1]);
1118 if (!(rdev->flags & RADEON_IS_IGP)) { 1137 if (rdev->num_crtc >= 4) {
1119 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, save->crtc_control[2]); 1138 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, save->crtc_control[2]);
1120 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, save->crtc_control[3]); 1139 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, save->crtc_control[3]);
1140 }
1141 if (rdev->num_crtc >= 6) {
1121 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, save->crtc_control[4]); 1142 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, save->crtc_control[4]);
1122 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, save->crtc_control[5]); 1143 WREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, save->crtc_control[5]);
1123 } 1144 }
1124 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 1145 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
1125 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 1146 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
1126 if (!(rdev->flags & RADEON_IS_IGP)) { 1147 if (rdev->num_crtc >= 4) {
1127 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); 1148 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0);
1128 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); 1149 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0);
1150 }
1151 if (rdev->num_crtc >= 6) {
1129 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); 1152 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
1130 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); 1153 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);
1131 } 1154 }
@@ -2248,7 +2271,10 @@ int evergreen_mc_init(struct radeon_device *rdev)
2248 2271
2249 /* Get VRAM informations */ 2272 /* Get VRAM informations */
2250 rdev->mc.vram_is_ddr = true; 2273 rdev->mc.vram_is_ddr = true;
2251 tmp = RREG32(MC_ARB_RAMCFG); 2274 if (rdev->flags & RADEON_IS_IGP)
2275 tmp = RREG32(FUS_MC_ARB_RAMCFG);
2276 else
2277 tmp = RREG32(MC_ARB_RAMCFG);
2252 if (tmp & CHANSIZE_OVERRIDE) { 2278 if (tmp & CHANSIZE_OVERRIDE) {
2253 chansize = 16; 2279 chansize = 16;
2254 } else if (tmp & CHANSIZE_MASK) { 2280 } else if (tmp & CHANSIZE_MASK) {
@@ -2414,18 +2440,22 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev)
2414 WREG32(GRBM_INT_CNTL, 0); 2440 WREG32(GRBM_INT_CNTL, 0);
2415 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 2441 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
2416 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 2442 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
2417 if (!(rdev->flags & RADEON_IS_IGP)) { 2443 if (rdev->num_crtc >= 4) {
2418 WREG32(INT_MASK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); 2444 WREG32(INT_MASK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0);
2419 WREG32(INT_MASK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); 2445 WREG32(INT_MASK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0);
2446 }
2447 if (rdev->num_crtc >= 6) {
2420 WREG32(INT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); 2448 WREG32(INT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
2421 WREG32(INT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); 2449 WREG32(INT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);
2422 } 2450 }
2423 2451
2424 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 2452 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
2425 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 2453 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
2426 if (!(rdev->flags & RADEON_IS_IGP)) { 2454 if (rdev->num_crtc >= 4) {
2427 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); 2455 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, 0);
2428 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); 2456 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, 0);
2457 }
2458 if (rdev->num_crtc >= 6) {
2429 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); 2459 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
2430 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); 2460 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);
2431 } 2461 }
@@ -2544,19 +2574,25 @@ int evergreen_irq_set(struct radeon_device *rdev)
2544 2574
2545 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, crtc1); 2575 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, crtc1);
2546 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, crtc2); 2576 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, crtc2);
2547 if (!(rdev->flags & RADEON_IS_IGP)) { 2577 if (rdev->num_crtc >= 4) {
2548 WREG32(INT_MASK + EVERGREEN_CRTC2_REGISTER_OFFSET, crtc3); 2578 WREG32(INT_MASK + EVERGREEN_CRTC2_REGISTER_OFFSET, crtc3);
2549 WREG32(INT_MASK + EVERGREEN_CRTC3_REGISTER_OFFSET, crtc4); 2579 WREG32(INT_MASK + EVERGREEN_CRTC3_REGISTER_OFFSET, crtc4);
2580 }
2581 if (rdev->num_crtc >= 6) {
2550 WREG32(INT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, crtc5); 2582 WREG32(INT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, crtc5);
2551 WREG32(INT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, crtc6); 2583 WREG32(INT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, crtc6);
2552 } 2584 }
2553 2585
2554 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, grph1); 2586 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, grph1);
2555 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, grph2); 2587 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, grph2);
2556 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, grph3); 2588 if (rdev->num_crtc >= 4) {
2557 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, grph4); 2589 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, grph3);
2558 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, grph5); 2590 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, grph4);
2559 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, grph6); 2591 }
2592 if (rdev->num_crtc >= 6) {
2593 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, grph5);
2594 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, grph6);
2595 }
2560 2596
2561 WREG32(DC_HPD1_INT_CONTROL, hpd1); 2597 WREG32(DC_HPD1_INT_CONTROL, hpd1);
2562 WREG32(DC_HPD2_INT_CONTROL, hpd2); 2598 WREG32(DC_HPD2_INT_CONTROL, hpd2);
@@ -2580,53 +2616,57 @@ static inline void evergreen_irq_ack(struct radeon_device *rdev)
2580 rdev->irq.stat_regs.evergreen.disp_int_cont5 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE5); 2616 rdev->irq.stat_regs.evergreen.disp_int_cont5 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE5);
2581 rdev->irq.stat_regs.evergreen.d1grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET); 2617 rdev->irq.stat_regs.evergreen.d1grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET);
2582 rdev->irq.stat_regs.evergreen.d2grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET); 2618 rdev->irq.stat_regs.evergreen.d2grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET);
2583 rdev->irq.stat_regs.evergreen.d3grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET); 2619 if (rdev->num_crtc >= 4) {
2584 rdev->irq.stat_regs.evergreen.d4grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET); 2620 rdev->irq.stat_regs.evergreen.d3grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET);
2585 rdev->irq.stat_regs.evergreen.d5grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET); 2621 rdev->irq.stat_regs.evergreen.d4grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET);
2586 rdev->irq.stat_regs.evergreen.d6grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET); 2622 }
2623 if (rdev->num_crtc >= 6) {
2624 rdev->irq.stat_regs.evergreen.d5grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET);
2625 rdev->irq.stat_regs.evergreen.d6grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET);
2626 }
2587 2627
2588 if (rdev->irq.stat_regs.evergreen.d1grph_int & GRPH_PFLIP_INT_OCCURRED) 2628 if (rdev->irq.stat_regs.evergreen.d1grph_int & GRPH_PFLIP_INT_OCCURRED)
2589 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); 2629 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
2590 if (rdev->irq.stat_regs.evergreen.d2grph_int & GRPH_PFLIP_INT_OCCURRED) 2630 if (rdev->irq.stat_regs.evergreen.d2grph_int & GRPH_PFLIP_INT_OCCURRED)
2591 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); 2631 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
2592 if (rdev->irq.stat_regs.evergreen.d3grph_int & GRPH_PFLIP_INT_OCCURRED)
2593 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
2594 if (rdev->irq.stat_regs.evergreen.d4grph_int & GRPH_PFLIP_INT_OCCURRED)
2595 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
2596 if (rdev->irq.stat_regs.evergreen.d5grph_int & GRPH_PFLIP_INT_OCCURRED)
2597 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
2598 if (rdev->irq.stat_regs.evergreen.d6grph_int & GRPH_PFLIP_INT_OCCURRED)
2599 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
2600
2601 if (rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VBLANK_INTERRUPT) 2632 if (rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VBLANK_INTERRUPT)
2602 WREG32(VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK); 2633 WREG32(VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK);
2603 if (rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VLINE_INTERRUPT) 2634 if (rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VLINE_INTERRUPT)
2604 WREG32(VLINE_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VLINE_ACK); 2635 WREG32(VLINE_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VLINE_ACK);
2605
2606 if (rdev->irq.stat_regs.evergreen.disp_int_cont & LB_D2_VBLANK_INTERRUPT) 2636 if (rdev->irq.stat_regs.evergreen.disp_int_cont & LB_D2_VBLANK_INTERRUPT)
2607 WREG32(VBLANK_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VBLANK_ACK); 2637 WREG32(VBLANK_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VBLANK_ACK);
2608 if (rdev->irq.stat_regs.evergreen.disp_int_cont & LB_D2_VLINE_INTERRUPT) 2638 if (rdev->irq.stat_regs.evergreen.disp_int_cont & LB_D2_VLINE_INTERRUPT)
2609 WREG32(VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK); 2639 WREG32(VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK);
2610 2640
2611 if (rdev->irq.stat_regs.evergreen.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT) 2641 if (rdev->num_crtc >= 4) {
2612 WREG32(VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK); 2642 if (rdev->irq.stat_regs.evergreen.d3grph_int & GRPH_PFLIP_INT_OCCURRED)
2613 if (rdev->irq.stat_regs.evergreen.disp_int_cont2 & LB_D3_VLINE_INTERRUPT) 2643 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
2614 WREG32(VLINE_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VLINE_ACK); 2644 if (rdev->irq.stat_regs.evergreen.d4grph_int & GRPH_PFLIP_INT_OCCURRED)
2615 2645 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
2616 if (rdev->irq.stat_regs.evergreen.disp_int_cont3 & LB_D4_VBLANK_INTERRUPT) 2646 if (rdev->irq.stat_regs.evergreen.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT)
2617 WREG32(VBLANK_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VBLANK_ACK); 2647 WREG32(VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK);
2618 if (rdev->irq.stat_regs.evergreen.disp_int_cont3 & LB_D4_VLINE_INTERRUPT) 2648 if (rdev->irq.stat_regs.evergreen.disp_int_cont2 & LB_D3_VLINE_INTERRUPT)
2619 WREG32(VLINE_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VLINE_ACK); 2649 WREG32(VLINE_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VLINE_ACK);
2620 2650 if (rdev->irq.stat_regs.evergreen.disp_int_cont3 & LB_D4_VBLANK_INTERRUPT)
2621 if (rdev->irq.stat_regs.evergreen.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT) 2651 WREG32(VBLANK_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VBLANK_ACK);
2622 WREG32(VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK); 2652 if (rdev->irq.stat_regs.evergreen.disp_int_cont3 & LB_D4_VLINE_INTERRUPT)
2623 if (rdev->irq.stat_regs.evergreen.disp_int_cont4 & LB_D5_VLINE_INTERRUPT) 2653 WREG32(VLINE_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VLINE_ACK);
2624 WREG32(VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VLINE_ACK); 2654 }
2625 2655
2626 if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & LB_D6_VBLANK_INTERRUPT) 2656 if (rdev->num_crtc >= 6) {
2627 WREG32(VBLANK_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VBLANK_ACK); 2657 if (rdev->irq.stat_regs.evergreen.d5grph_int & GRPH_PFLIP_INT_OCCURRED)
2628 if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & LB_D6_VLINE_INTERRUPT) 2658 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
2629 WREG32(VLINE_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VLINE_ACK); 2659 if (rdev->irq.stat_regs.evergreen.d6grph_int & GRPH_PFLIP_INT_OCCURRED)
2660 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
2661 if (rdev->irq.stat_regs.evergreen.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT)
2662 WREG32(VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK);
2663 if (rdev->irq.stat_regs.evergreen.disp_int_cont4 & LB_D5_VLINE_INTERRUPT)
2664 WREG32(VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VLINE_ACK);
2665 if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & LB_D6_VBLANK_INTERRUPT)
2666 WREG32(VBLANK_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VBLANK_ACK);
2667 if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & LB_D6_VLINE_INTERRUPT)
2668 WREG32(VLINE_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VLINE_ACK);
2669 }
2630 2670
2631 if (rdev->irq.stat_regs.evergreen.disp_int & DC_HPD1_INTERRUPT) { 2671 if (rdev->irq.stat_regs.evergreen.disp_int & DC_HPD1_INTERRUPT) {
2632 tmp = RREG32(DC_HPD1_INT_CONTROL); 2672 tmp = RREG32(DC_HPD1_INT_CONTROL);
@@ -3234,6 +3274,7 @@ void evergreen_fini(struct radeon_device *rdev)
3234 r700_cp_fini(rdev); 3274 r700_cp_fini(rdev);
3235 r600_irq_fini(rdev); 3275 r600_irq_fini(rdev);
3236 radeon_wb_fini(rdev); 3276 radeon_wb_fini(rdev);
3277 radeon_ib_pool_fini(rdev);
3237 radeon_irq_kms_fini(rdev); 3278 radeon_irq_kms_fini(rdev);
3238 evergreen_pcie_gart_fini(rdev); 3279 evergreen_pcie_gart_fini(rdev);
3239 radeon_gem_fini(rdev); 3280 radeon_gem_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index 1636e3449825..b7b2714f0b32 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -466,7 +466,7 @@
466#define IH_RB_WPTR_ADDR_LO 0x3e14 466#define IH_RB_WPTR_ADDR_LO 0x3e14
467#define IH_CNTL 0x3e18 467#define IH_CNTL 0x3e18
468# define ENABLE_INTR (1 << 0) 468# define ENABLE_INTR (1 << 0)
469# define IH_MC_SWAP(x) ((x) << 2) 469# define IH_MC_SWAP(x) ((x) << 1)
470# define IH_MC_SWAP_NONE 0 470# define IH_MC_SWAP_NONE 0
471# define IH_MC_SWAP_16BIT 1 471# define IH_MC_SWAP_16BIT 1
472# define IH_MC_SWAP_32BIT 2 472# define IH_MC_SWAP_32BIT 2
@@ -547,7 +547,7 @@
547# define LB_D5_VBLANK_INTERRUPT (1 << 3) 547# define LB_D5_VBLANK_INTERRUPT (1 << 3)
548# define DC_HPD5_INTERRUPT (1 << 17) 548# define DC_HPD5_INTERRUPT (1 << 17)
549# define DC_HPD5_RX_INTERRUPT (1 << 18) 549# define DC_HPD5_RX_INTERRUPT (1 << 18)
550#define DISP_INTERRUPT_STATUS_CONTINUE5 0x6050 550#define DISP_INTERRUPT_STATUS_CONTINUE5 0x6150
551# define LB_D6_VLINE_INTERRUPT (1 << 2) 551# define LB_D6_VLINE_INTERRUPT (1 << 2)
552# define LB_D6_VBLANK_INTERRUPT (1 << 3) 552# define LB_D6_VBLANK_INTERRUPT (1 << 3)
553# define DC_HPD6_INTERRUPT (1 << 17) 553# define DC_HPD6_INTERRUPT (1 << 17)
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 16caafeadf5e..559dbd412906 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1581,6 +1581,7 @@ void cayman_fini(struct radeon_device *rdev)
1581 cayman_cp_fini(rdev); 1581 cayman_cp_fini(rdev);
1582 r600_irq_fini(rdev); 1582 r600_irq_fini(rdev);
1583 radeon_wb_fini(rdev); 1583 radeon_wb_fini(rdev);
1584 radeon_ib_pool_fini(rdev);
1584 radeon_irq_kms_fini(rdev); 1585 radeon_irq_kms_fini(rdev);
1585 cayman_pcie_gart_fini(rdev); 1586 cayman_pcie_gart_fini(rdev);
1586 radeon_gem_fini(rdev); 1587 radeon_gem_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index 9736746da2d6..4672869cdb26 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -320,7 +320,7 @@
320#define CGTS_USER_TCC_DISABLE 0x914C 320#define CGTS_USER_TCC_DISABLE 0x914C
321#define TCC_DISABLE_MASK 0xFFFF0000 321#define TCC_DISABLE_MASK 0xFFFF0000
322#define TCC_DISABLE_SHIFT 16 322#define TCC_DISABLE_SHIFT 16
323#define CGTS_SM_CTRL_REG 0x915C 323#define CGTS_SM_CTRL_REG 0x9150
324#define OVERRIDE (1 << 21) 324#define OVERRIDE (1 << 21)
325 325
326#define TA_CNTL_AUX 0x9508 326#define TA_CNTL_AUX 0x9508
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index f79d2ccb6755..bc54b26cb32f 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2628,6 +2628,7 @@ void r600_fini(struct radeon_device *rdev)
2628 r600_cp_fini(rdev); 2628 r600_cp_fini(rdev);
2629 r600_irq_fini(rdev); 2629 r600_irq_fini(rdev);
2630 radeon_wb_fini(rdev); 2630 radeon_wb_fini(rdev);
2631 radeon_ib_pool_fini(rdev);
2631 radeon_irq_kms_fini(rdev); 2632 radeon_irq_kms_fini(rdev);
2632 r600_pcie_gart_fini(rdev); 2633 r600_pcie_gart_fini(rdev);
2633 radeon_agp_fini(rdev); 2634 radeon_agp_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index f140a0d5cb54..0245ae6c204e 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -536,7 +536,7 @@
536#define IH_RB_WPTR_ADDR_LO 0x3e14 536#define IH_RB_WPTR_ADDR_LO 0x3e14
537#define IH_CNTL 0x3e18 537#define IH_CNTL 0x3e18
538# define ENABLE_INTR (1 << 0) 538# define ENABLE_INTR (1 << 0)
539# define IH_MC_SWAP(x) ((x) << 2) 539# define IH_MC_SWAP(x) ((x) << 1)
540# define IH_MC_SWAP_NONE 0 540# define IH_MC_SWAP_NONE 0
541# define IH_MC_SWAP_16BIT 1 541# define IH_MC_SWAP_16BIT 1
542# define IH_MC_SWAP_32BIT 2 542# define IH_MC_SWAP_32BIT 2
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c
index 1aba85cad1a8..3fc5fa1aefd0 100644
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/radeon/radeon_bios.c
@@ -104,7 +104,7 @@ static bool radeon_read_bios(struct radeon_device *rdev)
104static bool radeon_atrm_get_bios(struct radeon_device *rdev) 104static bool radeon_atrm_get_bios(struct radeon_device *rdev)
105{ 105{
106 int ret; 106 int ret;
107 int size = 64 * 1024; 107 int size = 256 * 1024;
108 int i; 108 int i;
109 109
110 if (!radeon_atrm_supported(rdev->pdev)) 110 if (!radeon_atrm_supported(rdev->pdev))
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 6f508ffd1035..4de51891aa6d 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -575,6 +575,12 @@ static void rv770_program_channel_remap(struct radeon_device *rdev)
575 else 575 else
576 tcp_chan_steer = 0x00fac688; 576 tcp_chan_steer = 0x00fac688;
577 577
578 /* RV770 CE has special chremap setup */
579 if (rdev->pdev->device == 0x944e) {
580 tcp_chan_steer = 0x00b08b08;
581 mc_shared_chremap = 0x00b08b08;
582 }
583
578 WREG32(TCP_CHAN_STEER, tcp_chan_steer); 584 WREG32(TCP_CHAN_STEER, tcp_chan_steer);
579 WREG32(MC_SHARED_CHREMAP, mc_shared_chremap); 585 WREG32(MC_SHARED_CHREMAP, mc_shared_chremap);
580} 586}
@@ -1362,6 +1368,7 @@ void rv770_fini(struct radeon_device *rdev)
1362 r700_cp_fini(rdev); 1368 r700_cp_fini(rdev);
1363 r600_irq_fini(rdev); 1369 r600_irq_fini(rdev);
1364 radeon_wb_fini(rdev); 1370 radeon_wb_fini(rdev);
1371 radeon_ib_pool_fini(rdev);
1365 radeon_irq_kms_fini(rdev); 1372 radeon_irq_kms_fini(rdev);
1366 rv770_pcie_gart_fini(rdev); 1373 rv770_pcie_gart_fini(rdev);
1367 rv770_vram_scratch_fini(rdev); 1374 rv770_vram_scratch_fini(rdev);
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 16db83c83c8b..5f888f7e7dcb 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -333,7 +333,7 @@ config SENSORS_F71882FG
333 F71858FG 333 F71858FG
334 F71862FG 334 F71862FG
335 F71863FG 335 F71863FG
336 F71869F/E 336 F71869F/E/A
337 F71882FG 337 F71882FG
338 F71883FG 338 F71883FG
339 F71889FG/ED/A 339 F71889FG/ED/A
diff --git a/drivers/hwmon/adm1275.c b/drivers/hwmon/adm1275.c
index c2ee2048ab91..b9b7caf4a1d2 100644
--- a/drivers/hwmon/adm1275.c
+++ b/drivers/hwmon/adm1275.c
@@ -32,6 +32,7 @@ static int adm1275_probe(struct i2c_client *client,
32 const struct i2c_device_id *id) 32 const struct i2c_device_id *id)
33{ 33{
34 int config; 34 int config;
35 int ret;
35 struct pmbus_driver_info *info; 36 struct pmbus_driver_info *info;
36 37
37 if (!i2c_check_functionality(client->adapter, 38 if (!i2c_check_functionality(client->adapter,
@@ -43,8 +44,10 @@ static int adm1275_probe(struct i2c_client *client,
43 return -ENOMEM; 44 return -ENOMEM;
44 45
45 config = i2c_smbus_read_byte_data(client, ADM1275_PMON_CONFIG); 46 config = i2c_smbus_read_byte_data(client, ADM1275_PMON_CONFIG);
46 if (config < 0) 47 if (config < 0) {
47 return config; 48 ret = config;
49 goto err_mem;
50 }
48 51
49 info->pages = 1; 52 info->pages = 1;
50 info->direct[PSC_VOLTAGE_IN] = true; 53 info->direct[PSC_VOLTAGE_IN] = true;
@@ -76,7 +79,14 @@ static int adm1275_probe(struct i2c_client *client,
76 else 79 else
77 info->func[0] |= PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT; 80 info->func[0] |= PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT;
78 81
79 return pmbus_do_probe(client, id, info); 82 ret = pmbus_do_probe(client, id, info);
83 if (ret)
84 goto err_mem;
85 return 0;
86
87err_mem:
88 kfree(info);
89 return ret;
80} 90}
81 91
82static int adm1275_remove(struct i2c_client *client) 92static int adm1275_remove(struct i2c_client *client)
diff --git a/drivers/hwmon/emc6w201.c b/drivers/hwmon/emc6w201.c
index e0ef32378ac6..0064432f361f 100644
--- a/drivers/hwmon/emc6w201.c
+++ b/drivers/hwmon/emc6w201.c
@@ -78,8 +78,9 @@ static u16 emc6w201_read16(struct i2c_client *client, u8 reg)
78 78
79 lsb = i2c_smbus_read_byte_data(client, reg); 79 lsb = i2c_smbus_read_byte_data(client, reg);
80 msb = i2c_smbus_read_byte_data(client, reg + 1); 80 msb = i2c_smbus_read_byte_data(client, reg + 1);
81 if (lsb < 0 || msb < 0) { 81 if (unlikely(lsb < 0 || msb < 0)) {
82 dev_err(&client->dev, "16-bit read failed at 0x%02x\n", reg); 82 dev_err(&client->dev, "%d-bit %s failed at 0x%02x\n",
83 16, "read", reg);
83 return 0xFFFF; /* Arbitrary value */ 84 return 0xFFFF; /* Arbitrary value */
84 } 85 }
85 86
@@ -95,10 +96,39 @@ static int emc6w201_write16(struct i2c_client *client, u8 reg, u16 val)
95 int err; 96 int err;
96 97
97 err = i2c_smbus_write_byte_data(client, reg, val & 0xff); 98 err = i2c_smbus_write_byte_data(client, reg, val & 0xff);
98 if (!err) 99 if (likely(!err))
99 err = i2c_smbus_write_byte_data(client, reg + 1, val >> 8); 100 err = i2c_smbus_write_byte_data(client, reg + 1, val >> 8);
100 if (err < 0) 101 if (unlikely(err < 0))
101 dev_err(&client->dev, "16-bit write failed at 0x%02x\n", reg); 102 dev_err(&client->dev, "%d-bit %s failed at 0x%02x\n",
103 16, "write", reg);
104
105 return err;
106}
107
108/* Read 8-bit value from register */
109static u8 emc6w201_read8(struct i2c_client *client, u8 reg)
110{
111 int val;
112
113 val = i2c_smbus_read_byte_data(client, reg);
114 if (unlikely(val < 0)) {
115 dev_err(&client->dev, "%d-bit %s failed at 0x%02x\n",
116 8, "read", reg);
117 return 0x00; /* Arbitrary value */
118 }
119
120 return val;
121}
122
123/* Write 8-bit value to register */
124static int emc6w201_write8(struct i2c_client *client, u8 reg, u8 val)
125{
126 int err;
127
128 err = i2c_smbus_write_byte_data(client, reg, val);
129 if (unlikely(err < 0))
130 dev_err(&client->dev, "%d-bit %s failed at 0x%02x\n",
131 8, "write", reg);
102 132
103 return err; 133 return err;
104} 134}
@@ -114,25 +144,25 @@ static struct emc6w201_data *emc6w201_update_device(struct device *dev)
114 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { 144 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
115 for (nr = 0; nr < 6; nr++) { 145 for (nr = 0; nr < 6; nr++) {
116 data->in[input][nr] = 146 data->in[input][nr] =
117 i2c_smbus_read_byte_data(client, 147 emc6w201_read8(client,
118 EMC6W201_REG_IN(nr)); 148 EMC6W201_REG_IN(nr));
119 data->in[min][nr] = 149 data->in[min][nr] =
120 i2c_smbus_read_byte_data(client, 150 emc6w201_read8(client,
121 EMC6W201_REG_IN_LOW(nr)); 151 EMC6W201_REG_IN_LOW(nr));
122 data->in[max][nr] = 152 data->in[max][nr] =
123 i2c_smbus_read_byte_data(client, 153 emc6w201_read8(client,
124 EMC6W201_REG_IN_HIGH(nr)); 154 EMC6W201_REG_IN_HIGH(nr));
125 } 155 }
126 156
127 for (nr = 0; nr < 6; nr++) { 157 for (nr = 0; nr < 6; nr++) {
128 data->temp[input][nr] = 158 data->temp[input][nr] =
129 i2c_smbus_read_byte_data(client, 159 emc6w201_read8(client,
130 EMC6W201_REG_TEMP(nr)); 160 EMC6W201_REG_TEMP(nr));
131 data->temp[min][nr] = 161 data->temp[min][nr] =
132 i2c_smbus_read_byte_data(client, 162 emc6w201_read8(client,
133 EMC6W201_REG_TEMP_LOW(nr)); 163 EMC6W201_REG_TEMP_LOW(nr));
134 data->temp[max][nr] = 164 data->temp[max][nr] =
135 i2c_smbus_read_byte_data(client, 165 emc6w201_read8(client,
136 EMC6W201_REG_TEMP_HIGH(nr)); 166 EMC6W201_REG_TEMP_HIGH(nr));
137 } 167 }
138 168
@@ -192,7 +222,7 @@ static ssize_t set_in(struct device *dev, struct device_attribute *devattr,
192 222
193 mutex_lock(&data->update_lock); 223 mutex_lock(&data->update_lock);
194 data->in[sf][nr] = SENSORS_LIMIT(val, 0, 255); 224 data->in[sf][nr] = SENSORS_LIMIT(val, 0, 255);
195 err = i2c_smbus_write_byte_data(client, reg, data->in[sf][nr]); 225 err = emc6w201_write8(client, reg, data->in[sf][nr]);
196 mutex_unlock(&data->update_lock); 226 mutex_unlock(&data->update_lock);
197 227
198 return err < 0 ? err : count; 228 return err < 0 ? err : count;
@@ -229,7 +259,7 @@ static ssize_t set_temp(struct device *dev, struct device_attribute *devattr,
229 259
230 mutex_lock(&data->update_lock); 260 mutex_lock(&data->update_lock);
231 data->temp[sf][nr] = SENSORS_LIMIT(val, -127, 128); 261 data->temp[sf][nr] = SENSORS_LIMIT(val, -127, 128);
232 err = i2c_smbus_write_byte_data(client, reg, data->temp[sf][nr]); 262 err = emc6w201_write8(client, reg, data->temp[sf][nr]);
233 mutex_unlock(&data->update_lock); 263 mutex_unlock(&data->update_lock);
234 264
235 return err < 0 ? err : count; 265 return err < 0 ? err : count;
@@ -444,7 +474,7 @@ static int emc6w201_detect(struct i2c_client *client,
444 474
445 /* Check configuration */ 475 /* Check configuration */
446 config = i2c_smbus_read_byte_data(client, EMC6W201_REG_CONFIG); 476 config = i2c_smbus_read_byte_data(client, EMC6W201_REG_CONFIG);
447 if ((config & 0xF4) != 0x04) 477 if (config < 0 || (config & 0xF4) != 0x04)
448 return -ENODEV; 478 return -ENODEV;
449 if (!(config & 0x01)) { 479 if (!(config & 0x01)) {
450 dev_err(&client->dev, "Monitoring not enabled\n"); 480 dev_err(&client->dev, "Monitoring not enabled\n");
diff --git a/drivers/hwmon/f71882fg.c b/drivers/hwmon/f71882fg.c
index a4a94a096c90..2d96ed2bf8ed 100644
--- a/drivers/hwmon/f71882fg.c
+++ b/drivers/hwmon/f71882fg.c
@@ -52,6 +52,7 @@
52#define SIO_F71858_ID 0x0507 /* Chipset ID */ 52#define SIO_F71858_ID 0x0507 /* Chipset ID */
53#define SIO_F71862_ID 0x0601 /* Chipset ID */ 53#define SIO_F71862_ID 0x0601 /* Chipset ID */
54#define SIO_F71869_ID 0x0814 /* Chipset ID */ 54#define SIO_F71869_ID 0x0814 /* Chipset ID */
55#define SIO_F71869A_ID 0x1007 /* Chipset ID */
55#define SIO_F71882_ID 0x0541 /* Chipset ID */ 56#define SIO_F71882_ID 0x0541 /* Chipset ID */
56#define SIO_F71889_ID 0x0723 /* Chipset ID */ 57#define SIO_F71889_ID 0x0723 /* Chipset ID */
57#define SIO_F71889E_ID 0x0909 /* Chipset ID */ 58#define SIO_F71889E_ID 0x0909 /* Chipset ID */
@@ -108,8 +109,8 @@ static unsigned short force_id;
108module_param(force_id, ushort, 0); 109module_param(force_id, ushort, 0);
109MODULE_PARM_DESC(force_id, "Override the detected device ID"); 110MODULE_PARM_DESC(force_id, "Override the detected device ID");
110 111
111enum chips { f71808e, f71808a, f71858fg, f71862fg, f71869, f71882fg, f71889fg, 112enum chips { f71808e, f71808a, f71858fg, f71862fg, f71869, f71869a, f71882fg,
112 f71889ed, f71889a, f8000, f81865f }; 113 f71889fg, f71889ed, f71889a, f8000, f81865f };
113 114
114static const char *f71882fg_names[] = { 115static const char *f71882fg_names[] = {
115 "f71808e", 116 "f71808e",
@@ -117,6 +118,7 @@ static const char *f71882fg_names[] = {
117 "f71858fg", 118 "f71858fg",
118 "f71862fg", 119 "f71862fg",
119 "f71869", /* Both f71869f and f71869e, reg. compatible and same id */ 120 "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
121 "f71869a",
120 "f71882fg", 122 "f71882fg",
121 "f71889fg", /* f81801u too, same id */ 123 "f71889fg", /* f81801u too, same id */
122 "f71889ed", 124 "f71889ed",
@@ -131,6 +133,7 @@ static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
131 [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 }, 133 [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
132 [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 134 [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
133 [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 135 [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
136 [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
134 [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 137 [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
135 [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 138 [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
136 [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 139 [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
@@ -145,6 +148,7 @@ static const char f71882fg_has_in1_alarm[] = {
145 [f71858fg] = 0, 148 [f71858fg] = 0,
146 [f71862fg] = 0, 149 [f71862fg] = 0,
147 [f71869] = 0, 150 [f71869] = 0,
151 [f71869a] = 0,
148 [f71882fg] = 1, 152 [f71882fg] = 1,
149 [f71889fg] = 1, 153 [f71889fg] = 1,
150 [f71889ed] = 1, 154 [f71889ed] = 1,
@@ -159,6 +163,7 @@ static const char f71882fg_fan_has_beep[] = {
159 [f71858fg] = 0, 163 [f71858fg] = 0,
160 [f71862fg] = 1, 164 [f71862fg] = 1,
161 [f71869] = 1, 165 [f71869] = 1,
166 [f71869a] = 1,
162 [f71882fg] = 1, 167 [f71882fg] = 1,
163 [f71889fg] = 1, 168 [f71889fg] = 1,
164 [f71889ed] = 1, 169 [f71889ed] = 1,
@@ -173,6 +178,7 @@ static const char f71882fg_nr_fans[] = {
173 [f71858fg] = 3, 178 [f71858fg] = 3,
174 [f71862fg] = 3, 179 [f71862fg] = 3,
175 [f71869] = 3, 180 [f71869] = 3,
181 [f71869a] = 3,
176 [f71882fg] = 4, 182 [f71882fg] = 4,
177 [f71889fg] = 3, 183 [f71889fg] = 3,
178 [f71889ed] = 3, 184 [f71889ed] = 3,
@@ -187,6 +193,7 @@ static const char f71882fg_temp_has_beep[] = {
187 [f71858fg] = 0, 193 [f71858fg] = 0,
188 [f71862fg] = 1, 194 [f71862fg] = 1,
189 [f71869] = 1, 195 [f71869] = 1,
196 [f71869a] = 1,
190 [f71882fg] = 1, 197 [f71882fg] = 1,
191 [f71889fg] = 1, 198 [f71889fg] = 1,
192 [f71889ed] = 1, 199 [f71889ed] = 1,
@@ -201,6 +208,7 @@ static const char f71882fg_nr_temps[] = {
201 [f71858fg] = 3, 208 [f71858fg] = 3,
202 [f71862fg] = 3, 209 [f71862fg] = 3,
203 [f71869] = 3, 210 [f71869] = 3,
211 [f71869a] = 3,
204 [f71882fg] = 3, 212 [f71882fg] = 3,
205 [f71889fg] = 3, 213 [f71889fg] = 3,
206 [f71889ed] = 3, 214 [f71889ed] = 3,
@@ -2243,6 +2251,7 @@ static int __devinit f71882fg_probe(struct platform_device *pdev)
2243 case f71808e: 2251 case f71808e:
2244 case f71808a: 2252 case f71808a:
2245 case f71869: 2253 case f71869:
2254 case f71869a:
2246 /* These always have signed auto point temps */ 2255 /* These always have signed auto point temps */
2247 data->auto_point_temp_signed = 1; 2256 data->auto_point_temp_signed = 1;
2248 /* Fall through to select correct fan/pwm reg bank! */ 2257 /* Fall through to select correct fan/pwm reg bank! */
@@ -2305,6 +2314,7 @@ static int __devinit f71882fg_probe(struct platform_device *pdev)
2305 case f71808e: 2314 case f71808e:
2306 case f71808a: 2315 case f71808a:
2307 case f71869: 2316 case f71869:
2317 case f71869a:
2308 case f71889fg: 2318 case f71889fg:
2309 case f71889ed: 2319 case f71889ed:
2310 case f71889a: 2320 case f71889a:
@@ -2528,6 +2538,9 @@ static int __init f71882fg_find(int sioaddr, unsigned short *address,
2528 case SIO_F71869_ID: 2538 case SIO_F71869_ID:
2529 sio_data->type = f71869; 2539 sio_data->type = f71869;
2530 break; 2540 break;
2541 case SIO_F71869A_ID:
2542 sio_data->type = f71869a;
2543 break;
2531 case SIO_F71882_ID: 2544 case SIO_F71882_ID:
2532 sio_data->type = f71882fg; 2545 sio_data->type = f71882fg;
2533 break; 2546 break;
@@ -2662,7 +2675,7 @@ static void __exit f71882fg_exit(void)
2662} 2675}
2663 2676
2664MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver"); 2677MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
2665MODULE_AUTHOR("Hans Edgington, Hans de Goede (hdegoede@redhat.com)"); 2678MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>");
2666MODULE_LICENSE("GPL"); 2679MODULE_LICENSE("GPL");
2667 2680
2668module_init(f71882fg_init); 2681module_init(f71882fg_init);
diff --git a/drivers/hwmon/hwmon-vid.c b/drivers/hwmon/hwmon-vid.c
index 2582bfef6ccb..c8195a077da3 100644
--- a/drivers/hwmon/hwmon-vid.c
+++ b/drivers/hwmon/hwmon-vid.c
@@ -202,7 +202,7 @@ static struct vrm_model vrm_models[] = {
202 202
203 {X86_VENDOR_CENTAUR, 0x6, 0x7, ANY, 85}, /* Eden ESP/Ezra */ 203 {X86_VENDOR_CENTAUR, 0x6, 0x7, ANY, 85}, /* Eden ESP/Ezra */
204 {X86_VENDOR_CENTAUR, 0x6, 0x8, 0x7, 85}, /* Ezra T */ 204 {X86_VENDOR_CENTAUR, 0x6, 0x8, 0x7, 85}, /* Ezra T */
205 {X86_VENDOR_CENTAUR, 0x6, 0x9, 0x7, 85}, /* Nemiah */ 205 {X86_VENDOR_CENTAUR, 0x6, 0x9, 0x7, 85}, /* Nehemiah */
206 {X86_VENDOR_CENTAUR, 0x6, 0x9, ANY, 17}, /* C3-M, Eden-N */ 206 {X86_VENDOR_CENTAUR, 0x6, 0x9, ANY, 17}, /* C3-M, Eden-N */
207 {X86_VENDOR_CENTAUR, 0x6, 0xA, 0x7, 0}, /* No information */ 207 {X86_VENDOR_CENTAUR, 0x6, 0xA, 0x7, 0}, /* No information */
208 {X86_VENDOR_CENTAUR, 0x6, 0xA, ANY, 13}, /* C7, Esther */ 208 {X86_VENDOR_CENTAUR, 0x6, 0xA, ANY, 13}, /* C7, Esther */
diff --git a/drivers/hwmon/lm95241.c b/drivers/hwmon/lm95241.c
index 1a6dfb6df1e7..d3b464b74ced 100644
--- a/drivers/hwmon/lm95241.c
+++ b/drivers/hwmon/lm95241.c
@@ -98,11 +98,16 @@ struct lm95241_data {
98}; 98};
99 99
100/* Conversions */ 100/* Conversions */
101static int TempFromReg(u8 val_h, u8 val_l) 101static int temp_from_reg_signed(u8 val_h, u8 val_l)
102{ 102{
103 if (val_h & 0x80) 103 s16 val_hl = (val_h << 8) | val_l;
104 return val_h - 0x100; 104 return val_hl * 1000 / 256;
105 return val_h * 1000 + val_l * 1000 / 256; 105}
106
107static int temp_from_reg_unsigned(u8 val_h, u8 val_l)
108{
109 u16 val_hl = (val_h << 8) | val_l;
110 return val_hl * 1000 / 256;
106} 111}
107 112
108static struct lm95241_data *lm95241_update_device(struct device *dev) 113static struct lm95241_data *lm95241_update_device(struct device *dev)
@@ -135,10 +140,13 @@ static ssize_t show_input(struct device *dev, struct device_attribute *attr,
135 char *buf) 140 char *buf)
136{ 141{
137 struct lm95241_data *data = lm95241_update_device(dev); 142 struct lm95241_data *data = lm95241_update_device(dev);
143 int index = to_sensor_dev_attr(attr)->index;
138 144
139 return snprintf(buf, PAGE_SIZE - 1, "%d\n", 145 return snprintf(buf, PAGE_SIZE - 1, "%d\n",
140 TempFromReg(data->temp[to_sensor_dev_attr(attr)->index], 146 index == 0 || (data->config & (1 << (index / 2))) ?
141 data->temp[to_sensor_dev_attr(attr)->index + 1])); 147 temp_from_reg_signed(data->temp[index], data->temp[index + 1]) :
148 temp_from_reg_unsigned(data->temp[index],
149 data->temp[index + 1]));
142} 150}
143 151
144static ssize_t show_type(struct device *dev, struct device_attribute *attr, 152static ssize_t show_type(struct device *dev, struct device_attribute *attr,
@@ -339,7 +347,7 @@ static int lm95241_detect(struct i2c_client *new_client,
339 if ((i2c_smbus_read_byte_data(new_client, LM95241_REG_R_MAN_ID) 347 if ((i2c_smbus_read_byte_data(new_client, LM95241_REG_R_MAN_ID)
340 == MANUFACTURER_ID) 348 == MANUFACTURER_ID)
341 && (i2c_smbus_read_byte_data(new_client, LM95241_REG_R_CHIP_ID) 349 && (i2c_smbus_read_byte_data(new_client, LM95241_REG_R_CHIP_ID)
342 >= DEFAULT_REVISION)) { 350 == DEFAULT_REVISION)) {
343 name = DEVNAME; 351 name = DEVNAME;
344 } else { 352 } else {
345 dev_dbg(&adapter->dev, "LM95241 detection failed at 0x%02x\n", 353 dev_dbg(&adapter->dev, "LM95241 detection failed at 0x%02x\n",
diff --git a/drivers/hwmon/pmbus.c b/drivers/hwmon/pmbus.c
index 98e2e28899e2..9b1f0c37ef77 100644
--- a/drivers/hwmon/pmbus.c
+++ b/drivers/hwmon/pmbus.c
@@ -47,22 +47,29 @@ static void pmbus_find_sensor_groups(struct i2c_client *client,
47 if (info->func[0] 47 if (info->func[0]
48 && pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT)) 48 && pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT))
49 info->func[0] |= PMBUS_HAVE_STATUS_INPUT; 49 info->func[0] |= PMBUS_HAVE_STATUS_INPUT;
50 if (pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) { 50 if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) &&
51 pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) {
51 info->func[0] |= PMBUS_HAVE_FAN12; 52 info->func[0] |= PMBUS_HAVE_FAN12;
52 if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12)) 53 if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12))
53 info->func[0] |= PMBUS_HAVE_STATUS_FAN12; 54 info->func[0] |= PMBUS_HAVE_STATUS_FAN12;
54 } 55 }
55 if (pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) { 56 if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) &&
57 pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) {
56 info->func[0] |= PMBUS_HAVE_FAN34; 58 info->func[0] |= PMBUS_HAVE_FAN34;
57 if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34)) 59 if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34))
58 info->func[0] |= PMBUS_HAVE_STATUS_FAN34; 60 info->func[0] |= PMBUS_HAVE_STATUS_FAN34;
59 } 61 }
60 if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1)) { 62 if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1))
61 info->func[0] |= PMBUS_HAVE_TEMP; 63 info->func[0] |= PMBUS_HAVE_TEMP;
62 if (pmbus_check_byte_register(client, 0, 64 if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2))
63 PMBUS_STATUS_TEMPERATURE)) 65 info->func[0] |= PMBUS_HAVE_TEMP2;
66 if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3))
67 info->func[0] |= PMBUS_HAVE_TEMP3;
68 if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
69 | PMBUS_HAVE_TEMP3)
70 && pmbus_check_byte_register(client, 0,
71 PMBUS_STATUS_TEMPERATURE))
64 info->func[0] |= PMBUS_HAVE_STATUS_TEMP; 72 info->func[0] |= PMBUS_HAVE_STATUS_TEMP;
65 }
66 73
67 /* Sensors detected on all pages */ 74 /* Sensors detected on all pages */
68 for (page = 0; page < info->pages; page++) { 75 for (page = 0; page < info->pages; page++) {
diff --git a/drivers/hwmon/pmbus_core.c b/drivers/hwmon/pmbus_core.c
index 354770ed3186..744672c1f26d 100644
--- a/drivers/hwmon/pmbus_core.c
+++ b/drivers/hwmon/pmbus_core.c
@@ -1430,14 +1430,9 @@ int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id,
1430 i2c_set_clientdata(client, data); 1430 i2c_set_clientdata(client, data);
1431 mutex_init(&data->update_lock); 1431 mutex_init(&data->update_lock);
1432 1432
1433 /* 1433 /* Bail out if PMBus status register does not exist. */
1434 * Bail out if status register or PMBus revision register 1434 if (i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE) < 0) {
1435 * does not exist. 1435 dev_err(&client->dev, "PMBus status register not found\n");
1436 */
1437 if (i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE) < 0
1438 || i2c_smbus_read_byte_data(client, PMBUS_REVISION) < 0) {
1439 dev_err(&client->dev,
1440 "Status or revision register not found\n");
1441 ret = -ENODEV; 1436 ret = -ENODEV;
1442 goto out_data; 1437 goto out_data;
1443 } 1438 }
diff --git a/drivers/hwmon/sch5627.c b/drivers/hwmon/sch5627.c
index 020c87273ea1..3494a4cce414 100644
--- a/drivers/hwmon/sch5627.c
+++ b/drivers/hwmon/sch5627.c
@@ -887,7 +887,7 @@ static void __exit sch5627_exit(void)
887} 887}
888 888
889MODULE_DESCRIPTION("SMSC SCH5627 Hardware Monitoring Driver"); 889MODULE_DESCRIPTION("SMSC SCH5627 Hardware Monitoring Driver");
890MODULE_AUTHOR("Hans de Goede (hdegoede@redhat.com)"); 890MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
891MODULE_LICENSE("GPL"); 891MODULE_LICENSE("GPL");
892 892
893module_init(sch5627_init); 893module_init(sch5627_init);
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index 52b545a795f2..cbc98aea5b09 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -193,7 +193,13 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface,
193 return; 193 return;
194 } 194 }
195 if (twi_int_status & MCOMP) { 195 if (twi_int_status & MCOMP) {
196 if (iface->cur_mode == TWI_I2C_MODE_COMBINED) { 196 if ((read_MASTER_CTL(iface) & MEN) == 0 &&
197 (iface->cur_mode == TWI_I2C_MODE_REPEAT ||
198 iface->cur_mode == TWI_I2C_MODE_COMBINED)) {
199 iface->result = -1;
200 write_INT_MASK(iface, 0);
201 write_MASTER_CTL(iface, 0);
202 } else if (iface->cur_mode == TWI_I2C_MODE_COMBINED) {
197 if (iface->readNum == 0) { 203 if (iface->readNum == 0) {
198 /* set the read number to 1 and ask for manual 204 /* set the read number to 1 and ask for manual
199 * stop in block combine mode 205 * stop in block combine mode
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 6c00c107ebf3..f84a63c6dd97 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -248,12 +248,12 @@ static inline int is_msgend(struct s3c24xx_i2c *i2c)
248 return i2c->msg_ptr >= i2c->msg->len; 248 return i2c->msg_ptr >= i2c->msg->len;
249} 249}
250 250
251/* i2s_s3c_irq_nextbyte 251/* i2c_s3c_irq_nextbyte
252 * 252 *
253 * process an interrupt and work out what to do 253 * process an interrupt and work out what to do
254 */ 254 */
255 255
256static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) 256static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
257{ 257{
258 unsigned long tmp; 258 unsigned long tmp;
259 unsigned char byte; 259 unsigned char byte;
@@ -264,7 +264,6 @@ static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
264 case STATE_IDLE: 264 case STATE_IDLE:
265 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__); 265 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
266 goto out; 266 goto out;
267 break;
268 267
269 case STATE_STOP: 268 case STATE_STOP:
270 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__); 269 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
@@ -444,7 +443,7 @@ static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id)
444 /* pretty much this leaves us with the fact that we've 443 /* pretty much this leaves us with the fact that we've
445 * transmitted or received whatever byte we last sent */ 444 * transmitted or received whatever byte we last sent */
446 445
447 i2s_s3c_irq_nextbyte(i2c, status); 446 i2c_s3c_irq_nextbyte(i2c, status);
448 447
449 out: 448 out:
450 return IRQ_HANDLED; 449 return IRQ_HANDLED;
diff --git a/drivers/i2c/busses/i2c-taos-evm.c b/drivers/i2c/busses/i2c-taos-evm.c
index dd39c1eb03ed..26c352a09298 100644
--- a/drivers/i2c/busses/i2c-taos-evm.c
+++ b/drivers/i2c/busses/i2c-taos-evm.c
@@ -234,7 +234,7 @@ static int taos_connect(struct serio *serio, struct serio_driver *drv)
234 234
235 if (taos->state != TAOS_STATE_IDLE) { 235 if (taos->state != TAOS_STATE_IDLE) {
236 err = -ENODEV; 236 err = -ENODEV;
237 dev_dbg(&serio->dev, "TAOS EVM reset failed (state=%d, " 237 dev_err(&serio->dev, "TAOS EVM reset failed (state=%d, "
238 "pos=%d)\n", taos->state, taos->pos); 238 "pos=%d)\n", taos->state, taos->pos);
239 goto exit_close; 239 goto exit_close;
240 } 240 }
@@ -255,7 +255,7 @@ static int taos_connect(struct serio *serio, struct serio_driver *drv)
255 msecs_to_jiffies(250)); 255 msecs_to_jiffies(250));
256 if (taos->state != TAOS_STATE_IDLE) { 256 if (taos->state != TAOS_STATE_IDLE) {
257 err = -ENODEV; 257 err = -ENODEV;
258 dev_err(&adapter->dev, "Echo off failed " 258 dev_err(&serio->dev, "TAOS EVM echo off failed "
259 "(state=%d)\n", taos->state); 259 "(state=%d)\n", taos->state);
260 goto exit_close; 260 goto exit_close;
261 } 261 }
@@ -263,7 +263,7 @@ static int taos_connect(struct serio *serio, struct serio_driver *drv)
263 err = i2c_add_adapter(adapter); 263 err = i2c_add_adapter(adapter);
264 if (err) 264 if (err)
265 goto exit_close; 265 goto exit_close;
266 dev_dbg(&serio->dev, "Connected to TAOS EVM\n"); 266 dev_info(&serio->dev, "Connected to TAOS EVM\n");
267 267
268 taos->client = taos_instantiate_device(adapter); 268 taos->client = taos_instantiate_device(adapter);
269 return 0; 269 return 0;
@@ -288,7 +288,7 @@ static void taos_disconnect(struct serio *serio)
288 serio_set_drvdata(serio, NULL); 288 serio_set_drvdata(serio, NULL);
289 kfree(taos); 289 kfree(taos);
290 290
291 dev_dbg(&serio->dev, "Disconnected from TAOS EVM\n"); 291 dev_info(&serio->dev, "Disconnected from TAOS EVM\n");
292} 292}
293 293
294static struct serio_device_id taos_serio_ids[] = { 294static struct serio_device_id taos_serio_ids[] = {
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 4d9319665e32..fb3b4f8f8152 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -40,8 +40,10 @@
40#define I2C_CNFG_NEW_MASTER_FSM (1<<11) 40#define I2C_CNFG_NEW_MASTER_FSM (1<<11)
41#define I2C_STATUS 0x01C 41#define I2C_STATUS 0x01C
42#define I2C_SL_CNFG 0x020 42#define I2C_SL_CNFG 0x020
43#define I2C_SL_CNFG_NACK (1<<1)
43#define I2C_SL_CNFG_NEWSL (1<<2) 44#define I2C_SL_CNFG_NEWSL (1<<2)
44#define I2C_SL_ADDR1 0x02c 45#define I2C_SL_ADDR1 0x02c
46#define I2C_SL_ADDR2 0x030
45#define I2C_TX_FIFO 0x050 47#define I2C_TX_FIFO 0x050
46#define I2C_RX_FIFO 0x054 48#define I2C_RX_FIFO 0x054
47#define I2C_PACKET_TRANSFER_STATUS 0x058 49#define I2C_PACKET_TRANSFER_STATUS 0x058
@@ -337,7 +339,11 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
337 339
338 if (!i2c_dev->is_dvc) { 340 if (!i2c_dev->is_dvc) {
339 u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG); 341 u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG);
340 i2c_writel(i2c_dev, sl_cfg | I2C_SL_CNFG_NEWSL, I2C_SL_CNFG); 342 sl_cfg |= I2C_SL_CNFG_NACK | I2C_SL_CNFG_NEWSL;
343 i2c_writel(i2c_dev, sl_cfg, I2C_SL_CNFG);
344 i2c_writel(i2c_dev, 0xfc, I2C_SL_ADDR1);
345 i2c_writel(i2c_dev, 0x00, I2C_SL_ADDR2);
346
341 } 347 }
342 348
343 val = 7 << I2C_FIFO_CONTROL_TX_TRIG_SHIFT | 349 val = 7 << I2C_FIFO_CONTROL_TX_TRIG_SHIFT |
diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c
index 54e1ce73534b..6f8953664636 100644
--- a/drivers/i2c/muxes/pca954x.c
+++ b/drivers/i2c/muxes/pca954x.c
@@ -201,10 +201,11 @@ static int pca954x_probe(struct i2c_client *client,
201 201
202 i2c_set_clientdata(client, data); 202 i2c_set_clientdata(client, data);
203 203
204 /* Read the mux register at addr to verify 204 /* Write the mux register at addr to verify
205 * that the mux is in fact present. 205 * that the mux is in fact present. This also
206 * initializes the mux to disconnected state.
206 */ 207 */
207 if (i2c_smbus_read_byte(client) < 0) { 208 if (i2c_smbus_write_byte(client, 0) < 0) {
208 dev_warn(&client->dev, "probe failed\n"); 209 dev_warn(&client->dev, "probe failed\n");
209 goto exit_free; 210 goto exit_free;
210 } 211 }
diff --git a/drivers/infiniband/core/cm.c b/drivers/infiniband/core/cm.c
index f62f52fb9ece..fc0f2bd9ca82 100644
--- a/drivers/infiniband/core/cm.c
+++ b/drivers/infiniband/core/cm.c
@@ -3641,7 +3641,8 @@ static struct kobj_type cm_port_obj_type = {
3641 3641
3642static char *cm_devnode(struct device *dev, mode_t *mode) 3642static char *cm_devnode(struct device *dev, mode_t *mode)
3643{ 3643{
3644 *mode = 0666; 3644 if (mode)
3645 *mode = 0666;
3645 return kasprintf(GFP_KERNEL, "infiniband/%s", dev_name(dev)); 3646 return kasprintf(GFP_KERNEL, "infiniband/%s", dev_name(dev));
3646} 3647}
3647 3648
diff --git a/drivers/infiniband/core/uverbs_main.c b/drivers/infiniband/core/uverbs_main.c
index e49a85f8a44d..56898b6578a4 100644
--- a/drivers/infiniband/core/uverbs_main.c
+++ b/drivers/infiniband/core/uverbs_main.c
@@ -826,7 +826,8 @@ static void ib_uverbs_remove_one(struct ib_device *device)
826 826
827static char *uverbs_devnode(struct device *dev, mode_t *mode) 827static char *uverbs_devnode(struct device *dev, mode_t *mode)
828{ 828{
829 *mode = 0666; 829 if (mode)
830 *mode = 0666;
830 return kasprintf(GFP_KERNEL, "infiniband/%s", dev_name(dev)); 831 return kasprintf(GFP_KERNEL, "infiniband/%s", dev_name(dev));
831} 832}
832 833
diff --git a/drivers/input/keyboard/pmic8xxx-keypad.c b/drivers/input/keyboard/pmic8xxx-keypad.c
index 40b02ae96f86..6229c3e8e78b 100644
--- a/drivers/input/keyboard/pmic8xxx-keypad.c
+++ b/drivers/input/keyboard/pmic8xxx-keypad.c
@@ -520,7 +520,8 @@ static void pmic8xxx_kp_close(struct input_dev *dev)
520 */ 520 */
521static int __devinit pmic8xxx_kp_probe(struct platform_device *pdev) 521static int __devinit pmic8xxx_kp_probe(struct platform_device *pdev)
522{ 522{
523 const struct pm8xxx_keypad_platform_data *pdata = mfd_get_data(pdev); 523 const struct pm8xxx_keypad_platform_data *pdata =
524 dev_get_platdata(&pdev->dev);
524 const struct matrix_keymap_data *keymap_data; 525 const struct matrix_keymap_data *keymap_data;
525 struct pmic8xxx_kp *kp; 526 struct pmic8xxx_kp *kp;
526 int rc; 527 int rc;
diff --git a/drivers/input/misc/pmic8xxx-pwrkey.c b/drivers/input/misc/pmic8xxx-pwrkey.c
index 97e07e786e41..b3cfb9c71e66 100644
--- a/drivers/input/misc/pmic8xxx-pwrkey.c
+++ b/drivers/input/misc/pmic8xxx-pwrkey.c
@@ -90,7 +90,8 @@ static int __devinit pmic8xxx_pwrkey_probe(struct platform_device *pdev)
90 unsigned int delay; 90 unsigned int delay;
91 u8 pon_cntl; 91 u8 pon_cntl;
92 struct pmic8xxx_pwrkey *pwrkey; 92 struct pmic8xxx_pwrkey *pwrkey;
93 const struct pm8xxx_pwrkey_platform_data *pdata = mfd_get_data(pdev); 93 const struct pm8xxx_pwrkey_platform_data *pdata =
94 dev_get_platdata(&pdev->dev);
94 95
95 if (!pdata) { 96 if (!pdata) {
96 dev_err(&pdev->dev, "power key platform data not supplied\n"); 97 dev_err(&pdev->dev, "power key platform data not supplied\n");
diff --git a/drivers/leds/leds-pca9532.c b/drivers/leds/leds-pca9532.c
index d8d3a1e910a1..a2c874623e35 100644
--- a/drivers/leds/leds-pca9532.c
+++ b/drivers/leds/leds-pca9532.c
@@ -88,7 +88,7 @@ static const struct pca9532_chip_info pca9532_chip_info_tbl[] = {
88 88
89static struct i2c_driver pca9532_driver = { 89static struct i2c_driver pca9532_driver = {
90 .driver = { 90 .driver = {
91 .name = "pca953x", 91 .name = "leds-pca953x",
92 }, 92 },
93 .probe = pca9532_probe, 93 .probe = pca9532_probe,
94 .remove = pca9532_remove, 94 .remove = pca9532_remove,
diff --git a/drivers/md/md.c b/drivers/md/md.c
index 4332fc2f25d4..91e31e260b4a 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -7088,6 +7088,7 @@ static int remove_and_add_spares(mddev_t *mddev)
7088 list_for_each_entry(rdev, &mddev->disks, same_set) { 7088 list_for_each_entry(rdev, &mddev->disks, same_set) {
7089 if (rdev->raid_disk >= 0 && 7089 if (rdev->raid_disk >= 0 &&
7090 !test_bit(In_sync, &rdev->flags) && 7090 !test_bit(In_sync, &rdev->flags) &&
7091 !test_bit(Faulty, &rdev->flags) &&
7091 !test_bit(Blocked, &rdev->flags)) 7092 !test_bit(Blocked, &rdev->flags))
7092 spares++; 7093 spares++;
7093 if (rdev->raid_disk < 0 7094 if (rdev->raid_disk < 0
diff --git a/drivers/media/rc/fintek-cir.c b/drivers/media/rc/fintek-cir.c
index 8fa539dde1b4..7f7079b12f23 100644
--- a/drivers/media/rc/fintek-cir.c
+++ b/drivers/media/rc/fintek-cir.c
@@ -597,12 +597,17 @@ static void __devexit fintek_remove(struct pnp_dev *pdev)
597static int fintek_suspend(struct pnp_dev *pdev, pm_message_t state) 597static int fintek_suspend(struct pnp_dev *pdev, pm_message_t state)
598{ 598{
599 struct fintek_dev *fintek = pnp_get_drvdata(pdev); 599 struct fintek_dev *fintek = pnp_get_drvdata(pdev);
600 unsigned long flags;
600 601
601 fit_dbg("%s called", __func__); 602 fit_dbg("%s called", __func__);
602 603
604 spin_lock_irqsave(&fintek->fintek_lock, flags);
605
603 /* disable all CIR interrupts */ 606 /* disable all CIR interrupts */
604 fintek_cir_reg_write(fintek, CIR_STATUS_IRQ_MASK, CIR_STATUS); 607 fintek_cir_reg_write(fintek, CIR_STATUS_IRQ_MASK, CIR_STATUS);
605 608
609 spin_unlock_irqrestore(&fintek->fintek_lock, flags);
610
606 fintek_config_mode_enable(fintek); 611 fintek_config_mode_enable(fintek);
607 612
608 /* disable cir logical dev */ 613 /* disable cir logical dev */
diff --git a/drivers/media/rc/imon.c b/drivers/media/rc/imon.c
index 3f3c70716268..6bc35eeb653b 100644
--- a/drivers/media/rc/imon.c
+++ b/drivers/media/rc/imon.c
@@ -307,6 +307,14 @@ static const struct {
307 /* 0xffdc iMON MCE VFD */ 307 /* 0xffdc iMON MCE VFD */
308 { 0x00010000ffffffeell, KEY_VOLUMEUP }, 308 { 0x00010000ffffffeell, KEY_VOLUMEUP },
309 { 0x01000000ffffffeell, KEY_VOLUMEDOWN }, 309 { 0x01000000ffffffeell, KEY_VOLUMEDOWN },
310 { 0x00000001ffffffeell, KEY_MUTE },
311 { 0x0000000fffffffeell, KEY_MEDIA },
312 { 0x00000012ffffffeell, KEY_UP },
313 { 0x00000013ffffffeell, KEY_DOWN },
314 { 0x00000014ffffffeell, KEY_LEFT },
315 { 0x00000015ffffffeell, KEY_RIGHT },
316 { 0x00000016ffffffeell, KEY_ENTER },
317 { 0x00000017ffffffeell, KEY_ESC },
310 /* iMON Knob values */ 318 /* iMON Knob values */
311 { 0x000100ffffffffeell, KEY_VOLUMEUP }, 319 { 0x000100ffffffffeell, KEY_VOLUMEUP },
312 { 0x010000ffffffffeell, KEY_VOLUMEDOWN }, 320 { 0x010000ffffffffeell, KEY_VOLUMEDOWN },
@@ -1582,16 +1590,16 @@ static void imon_incoming_packet(struct imon_context *ictx,
1582 /* Only panel type events left to process now */ 1590 /* Only panel type events left to process now */
1583 spin_lock_irqsave(&ictx->kc_lock, flags); 1591 spin_lock_irqsave(&ictx->kc_lock, flags);
1584 1592
1593 do_gettimeofday(&t);
1585 /* KEY_MUTE repeats from knob need to be suppressed */ 1594 /* KEY_MUTE repeats from knob need to be suppressed */
1586 if (ictx->kc == KEY_MUTE && ictx->kc == ictx->last_keycode) { 1595 if (ictx->kc == KEY_MUTE && ictx->kc == ictx->last_keycode) {
1587 do_gettimeofday(&t);
1588 msec = tv2int(&t, &prev_time); 1596 msec = tv2int(&t, &prev_time);
1589 prev_time = t;
1590 if (msec < ictx->idev->rep[REP_DELAY]) { 1597 if (msec < ictx->idev->rep[REP_DELAY]) {
1591 spin_unlock_irqrestore(&ictx->kc_lock, flags); 1598 spin_unlock_irqrestore(&ictx->kc_lock, flags);
1592 return; 1599 return;
1593 } 1600 }
1594 } 1601 }
1602 prev_time = t;
1595 kc = ictx->kc; 1603 kc = ictx->kc;
1596 1604
1597 spin_unlock_irqrestore(&ictx->kc_lock, flags); 1605 spin_unlock_irqrestore(&ictx->kc_lock, flags);
@@ -1603,7 +1611,9 @@ static void imon_incoming_packet(struct imon_context *ictx,
1603 input_report_key(ictx->idev, kc, 0); 1611 input_report_key(ictx->idev, kc, 0);
1604 input_sync(ictx->idev); 1612 input_sync(ictx->idev);
1605 1613
1614 spin_lock_irqsave(&ictx->kc_lock, flags);
1606 ictx->last_keycode = kc; 1615 ictx->last_keycode = kc;
1616 spin_unlock_irqrestore(&ictx->kc_lock, flags);
1607 1617
1608 return; 1618 return;
1609 1619
@@ -1740,6 +1750,8 @@ static void imon_get_ffdc_type(struct imon_context *ictx)
1740 detected_display_type = IMON_DISPLAY_TYPE_VFD; 1750 detected_display_type = IMON_DISPLAY_TYPE_VFD;
1741 break; 1751 break;
1742 /* iMON VFD, MCE IR */ 1752 /* iMON VFD, MCE IR */
1753 case 0x46:
1754 case 0x7e:
1743 case 0x9e: 1755 case 0x9e:
1744 dev_info(ictx->dev, "0xffdc iMON VFD, MCE IR"); 1756 dev_info(ictx->dev, "0xffdc iMON VFD, MCE IR");
1745 detected_display_type = IMON_DISPLAY_TYPE_VFD; 1757 detected_display_type = IMON_DISPLAY_TYPE_VFD;
@@ -1755,6 +1767,9 @@ static void imon_get_ffdc_type(struct imon_context *ictx)
1755 dev_info(ictx->dev, "Unknown 0xffdc device, " 1767 dev_info(ictx->dev, "Unknown 0xffdc device, "
1756 "defaulting to VFD and iMON IR"); 1768 "defaulting to VFD and iMON IR");
1757 detected_display_type = IMON_DISPLAY_TYPE_VFD; 1769 detected_display_type = IMON_DISPLAY_TYPE_VFD;
1770 /* We don't know which one it is, allow user to set the
1771 * RC6 one from userspace if OTHER wasn't correct. */
1772 allowed_protos |= RC_TYPE_RC6;
1758 break; 1773 break;
1759 } 1774 }
1760 1775
diff --git a/drivers/media/rc/ir-raw.c b/drivers/media/rc/ir-raw.c
index 11c19d8d0ee0..423ed45d6c55 100644
--- a/drivers/media/rc/ir-raw.c
+++ b/drivers/media/rc/ir-raw.c
@@ -114,18 +114,20 @@ int ir_raw_event_store_edge(struct rc_dev *dev, enum raw_event_type type)
114 s64 delta; /* ns */ 114 s64 delta; /* ns */
115 DEFINE_IR_RAW_EVENT(ev); 115 DEFINE_IR_RAW_EVENT(ev);
116 int rc = 0; 116 int rc = 0;
117 int delay;
117 118
118 if (!dev->raw) 119 if (!dev->raw)
119 return -EINVAL; 120 return -EINVAL;
120 121
121 now = ktime_get(); 122 now = ktime_get();
122 delta = ktime_to_ns(ktime_sub(now, dev->raw->last_event)); 123 delta = ktime_to_ns(ktime_sub(now, dev->raw->last_event));
124 delay = MS_TO_NS(dev->input_dev->rep[REP_DELAY]);
123 125
124 /* Check for a long duration since last event or if we're 126 /* Check for a long duration since last event or if we're
125 * being called for the first time, note that delta can't 127 * being called for the first time, note that delta can't
126 * possibly be negative. 128 * possibly be negative.
127 */ 129 */
128 if (delta > IR_MAX_DURATION || !dev->raw->last_type) 130 if (delta > delay || !dev->raw->last_type)
129 type |= IR_START_EVENT; 131 type |= IR_START_EVENT;
130 else 132 else
131 ev.duration = delta; 133 ev.duration = delta;
diff --git a/drivers/media/rc/ite-cir.c b/drivers/media/rc/ite-cir.c
index e716b931cf7e..ecd3d0280768 100644
--- a/drivers/media/rc/ite-cir.c
+++ b/drivers/media/rc/ite-cir.c
@@ -1347,6 +1347,7 @@ static const struct ite_dev_params ite_dev_descs[] = {
1347 { /* 0: ITE8704 */ 1347 { /* 0: ITE8704 */
1348 .model = "ITE8704 CIR transceiver", 1348 .model = "ITE8704 CIR transceiver",
1349 .io_region_size = IT87_IOREG_LENGTH, 1349 .io_region_size = IT87_IOREG_LENGTH,
1350 .io_rsrc_no = 0,
1350 .hw_tx_capable = true, 1351 .hw_tx_capable = true,
1351 .sample_period = (u32) (1000000000ULL / 115200), 1352 .sample_period = (u32) (1000000000ULL / 115200),
1352 .tx_carrier_freq = 38000, 1353 .tx_carrier_freq = 38000,
@@ -1371,6 +1372,7 @@ static const struct ite_dev_params ite_dev_descs[] = {
1371 { /* 1: ITE8713 */ 1372 { /* 1: ITE8713 */
1372 .model = "ITE8713 CIR transceiver", 1373 .model = "ITE8713 CIR transceiver",
1373 .io_region_size = IT87_IOREG_LENGTH, 1374 .io_region_size = IT87_IOREG_LENGTH,
1375 .io_rsrc_no = 0,
1374 .hw_tx_capable = true, 1376 .hw_tx_capable = true,
1375 .sample_period = (u32) (1000000000ULL / 115200), 1377 .sample_period = (u32) (1000000000ULL / 115200),
1376 .tx_carrier_freq = 38000, 1378 .tx_carrier_freq = 38000,
@@ -1395,6 +1397,7 @@ static const struct ite_dev_params ite_dev_descs[] = {
1395 { /* 2: ITE8708 */ 1397 { /* 2: ITE8708 */
1396 .model = "ITE8708 CIR transceiver", 1398 .model = "ITE8708 CIR transceiver",
1397 .io_region_size = IT8708_IOREG_LENGTH, 1399 .io_region_size = IT8708_IOREG_LENGTH,
1400 .io_rsrc_no = 0,
1398 .hw_tx_capable = true, 1401 .hw_tx_capable = true,
1399 .sample_period = (u32) (1000000000ULL / 115200), 1402 .sample_period = (u32) (1000000000ULL / 115200),
1400 .tx_carrier_freq = 38000, 1403 .tx_carrier_freq = 38000,
@@ -1420,6 +1423,7 @@ static const struct ite_dev_params ite_dev_descs[] = {
1420 { /* 3: ITE8709 */ 1423 { /* 3: ITE8709 */
1421 .model = "ITE8709 CIR transceiver", 1424 .model = "ITE8709 CIR transceiver",
1422 .io_region_size = IT8709_IOREG_LENGTH, 1425 .io_region_size = IT8709_IOREG_LENGTH,
1426 .io_rsrc_no = 2,
1423 .hw_tx_capable = true, 1427 .hw_tx_capable = true,
1424 .sample_period = (u32) (1000000000ULL / 115200), 1428 .sample_period = (u32) (1000000000ULL / 115200),
1425 .tx_carrier_freq = 38000, 1429 .tx_carrier_freq = 38000,
@@ -1461,6 +1465,7 @@ static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
1461 struct rc_dev *rdev = NULL; 1465 struct rc_dev *rdev = NULL;
1462 int ret = -ENOMEM; 1466 int ret = -ENOMEM;
1463 int model_no; 1467 int model_no;
1468 int io_rsrc_no;
1464 1469
1465 ite_dbg("%s called", __func__); 1470 ite_dbg("%s called", __func__);
1466 1471
@@ -1490,10 +1495,11 @@ static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
1490 1495
1491 /* get the description for the device */ 1496 /* get the description for the device */
1492 dev_desc = &ite_dev_descs[model_no]; 1497 dev_desc = &ite_dev_descs[model_no];
1498 io_rsrc_no = dev_desc->io_rsrc_no;
1493 1499
1494 /* validate pnp resources */ 1500 /* validate pnp resources */
1495 if (!pnp_port_valid(pdev, 0) || 1501 if (!pnp_port_valid(pdev, io_rsrc_no) ||
1496 pnp_port_len(pdev, 0) != dev_desc->io_region_size) { 1502 pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) {
1497 dev_err(&pdev->dev, "IR PNP Port not valid!\n"); 1503 dev_err(&pdev->dev, "IR PNP Port not valid!\n");
1498 goto failure; 1504 goto failure;
1499 } 1505 }
@@ -1504,7 +1510,7 @@ static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
1504 } 1510 }
1505 1511
1506 /* store resource values */ 1512 /* store resource values */
1507 itdev->cir_addr = pnp_port_start(pdev, 0); 1513 itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no);
1508 itdev->cir_irq = pnp_irq(pdev, 0); 1514 itdev->cir_irq = pnp_irq(pdev, 0);
1509 1515
1510 /* initialize spinlocks */ 1516 /* initialize spinlocks */
diff --git a/drivers/media/rc/ite-cir.h b/drivers/media/rc/ite-cir.h
index 16a19f5fd718..aa899a0b9750 100644
--- a/drivers/media/rc/ite-cir.h
+++ b/drivers/media/rc/ite-cir.h
@@ -57,6 +57,9 @@ struct ite_dev_params {
57 /* size of the I/O region */ 57 /* size of the I/O region */
58 int io_region_size; 58 int io_region_size;
59 59
60 /* IR pnp I/O resource number */
61 int io_rsrc_no;
62
60 /* true if the hardware supports transmission */ 63 /* true if the hardware supports transmission */
61 bool hw_tx_capable; 64 bool hw_tx_capable;
62 65
diff --git a/drivers/media/rc/keymaps/rc-pinnacle-pctv-hd.c b/drivers/media/rc/keymaps/rc-pinnacle-pctv-hd.c
index bb10ffe086b4..8d558ae63456 100644
--- a/drivers/media/rc/keymaps/rc-pinnacle-pctv-hd.c
+++ b/drivers/media/rc/keymaps/rc-pinnacle-pctv-hd.c
@@ -15,43 +15,39 @@
15/* Pinnacle PCTV HD 800i mini remote */ 15/* Pinnacle PCTV HD 800i mini remote */
16 16
17static struct rc_map_table pinnacle_pctv_hd[] = { 17static struct rc_map_table pinnacle_pctv_hd[] = {
18 18 /* Key codes for the tiny Pinnacle remote*/
19 { 0x0f, KEY_1 }, 19 { 0x0700, KEY_MUTE },
20 { 0x15, KEY_2 }, 20 { 0x0701, KEY_MENU }, /* Pinnacle logo */
21 { 0x10, KEY_3 }, 21 { 0x0739, KEY_POWER },
22 { 0x18, KEY_4 }, 22 { 0x0703, KEY_VOLUMEUP },
23 { 0x1b, KEY_5 }, 23 { 0x0709, KEY_VOLUMEDOWN },
24 { 0x1e, KEY_6 }, 24 { 0x0706, KEY_CHANNELUP },
25 { 0x11, KEY_7 }, 25 { 0x070c, KEY_CHANNELDOWN },
26 { 0x21, KEY_8 }, 26 { 0x070f, KEY_1 },
27 { 0x12, KEY_9 }, 27 { 0x0715, KEY_2 },
28 { 0x27, KEY_0 }, 28 { 0x0710, KEY_3 },
29 29 { 0x0718, KEY_4 },
30 { 0x24, KEY_ZOOM }, 30 { 0x071b, KEY_5 },
31 { 0x2a, KEY_SUBTITLE }, 31 { 0x071e, KEY_6 },
32 32 { 0x0711, KEY_7 },
33 { 0x00, KEY_MUTE }, 33 { 0x0721, KEY_8 },
34 { 0x01, KEY_ENTER }, /* Pinnacle Logo */ 34 { 0x0712, KEY_9 },
35 { 0x39, KEY_POWER }, 35 { 0x0727, KEY_0 },
36 36 { 0x0724, KEY_ZOOM }, /* 'Square' key */
37 { 0x03, KEY_VOLUMEUP }, 37 { 0x072a, KEY_SUBTITLE }, /* 'T' key */
38 { 0x09, KEY_VOLUMEDOWN }, 38 { 0x072d, KEY_REWIND },
39 { 0x06, KEY_CHANNELUP }, 39 { 0x0730, KEY_PLAYPAUSE },
40 { 0x0c, KEY_CHANNELDOWN }, 40 { 0x0733, KEY_FASTFORWARD },
41 41 { 0x0736, KEY_RECORD },
42 { 0x2d, KEY_REWIND }, 42 { 0x073c, KEY_STOP },
43 { 0x30, KEY_PLAYPAUSE }, 43 { 0x073f, KEY_HELP }, /* '?' key */
44 { 0x33, KEY_FASTFORWARD },
45 { 0x3c, KEY_STOP },
46 { 0x36, KEY_RECORD },
47 { 0x3f, KEY_EPG }, /* Labeled "?" */
48}; 44};
49 45
50static struct rc_map_list pinnacle_pctv_hd_map = { 46static struct rc_map_list pinnacle_pctv_hd_map = {
51 .map = { 47 .map = {
52 .scan = pinnacle_pctv_hd, 48 .scan = pinnacle_pctv_hd,
53 .size = ARRAY_SIZE(pinnacle_pctv_hd), 49 .size = ARRAY_SIZE(pinnacle_pctv_hd),
54 .rc_type = RC_TYPE_UNKNOWN, /* Legacy IR type */ 50 .rc_type = RC_TYPE_RC5,
55 .name = RC_MAP_PINNACLE_PCTV_HD, 51 .name = RC_MAP_PINNACLE_PCTV_HD,
56 } 52 }
57}; 53};
diff --git a/drivers/media/rc/lirc_dev.c b/drivers/media/rc/lirc_dev.c
index fd237ab120bb..27997a9ceb0d 100644
--- a/drivers/media/rc/lirc_dev.c
+++ b/drivers/media/rc/lirc_dev.c
@@ -55,6 +55,8 @@ struct irctl {
55 struct lirc_buffer *buf; 55 struct lirc_buffer *buf;
56 unsigned int chunk_size; 56 unsigned int chunk_size;
57 57
58 struct cdev *cdev;
59
58 struct task_struct *task; 60 struct task_struct *task;
59 long jiffies_to_wait; 61 long jiffies_to_wait;
60}; 62};
@@ -62,7 +64,6 @@ struct irctl {
62static DEFINE_MUTEX(lirc_dev_lock); 64static DEFINE_MUTEX(lirc_dev_lock);
63 65
64static struct irctl *irctls[MAX_IRCTL_DEVICES]; 66static struct irctl *irctls[MAX_IRCTL_DEVICES];
65static struct cdev cdevs[MAX_IRCTL_DEVICES];
66 67
67/* Only used for sysfs but defined to void otherwise */ 68/* Only used for sysfs but defined to void otherwise */
68static struct class *lirc_class; 69static struct class *lirc_class;
@@ -167,9 +168,13 @@ static struct file_operations lirc_dev_fops = {
167 168
168static int lirc_cdev_add(struct irctl *ir) 169static int lirc_cdev_add(struct irctl *ir)
169{ 170{
170 int retval; 171 int retval = -ENOMEM;
171 struct lirc_driver *d = &ir->d; 172 struct lirc_driver *d = &ir->d;
172 struct cdev *cdev = &cdevs[d->minor]; 173 struct cdev *cdev;
174
175 cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
176 if (!cdev)
177 goto err_out;
173 178
174 if (d->fops) { 179 if (d->fops) {
175 cdev_init(cdev, d->fops); 180 cdev_init(cdev, d->fops);
@@ -180,12 +185,20 @@ static int lirc_cdev_add(struct irctl *ir)
180 } 185 }
181 retval = kobject_set_name(&cdev->kobj, "lirc%d", d->minor); 186 retval = kobject_set_name(&cdev->kobj, "lirc%d", d->minor);
182 if (retval) 187 if (retval)
183 return retval; 188 goto err_out;
184 189
185 retval = cdev_add(cdev, MKDEV(MAJOR(lirc_base_dev), d->minor), 1); 190 retval = cdev_add(cdev, MKDEV(MAJOR(lirc_base_dev), d->minor), 1);
186 if (retval) 191 if (retval) {
187 kobject_put(&cdev->kobj); 192 kobject_put(&cdev->kobj);
193 goto err_out;
194 }
195
196 ir->cdev = cdev;
197
198 return 0;
188 199
200err_out:
201 kfree(cdev);
189 return retval; 202 return retval;
190} 203}
191 204
@@ -214,7 +227,7 @@ int lirc_register_driver(struct lirc_driver *d)
214 if (MAX_IRCTL_DEVICES <= d->minor) { 227 if (MAX_IRCTL_DEVICES <= d->minor) {
215 dev_err(d->dev, "lirc_dev: lirc_register_driver: " 228 dev_err(d->dev, "lirc_dev: lirc_register_driver: "
216 "\"minor\" must be between 0 and %d (%d)!\n", 229 "\"minor\" must be between 0 and %d (%d)!\n",
217 MAX_IRCTL_DEVICES-1, d->minor); 230 MAX_IRCTL_DEVICES - 1, d->minor);
218 err = -EBADRQC; 231 err = -EBADRQC;
219 goto out; 232 goto out;
220 } 233 }
@@ -369,7 +382,7 @@ int lirc_unregister_driver(int minor)
369 382
370 if (minor < 0 || minor >= MAX_IRCTL_DEVICES) { 383 if (minor < 0 || minor >= MAX_IRCTL_DEVICES) {
371 printk(KERN_ERR "lirc_dev: %s: minor (%d) must be between " 384 printk(KERN_ERR "lirc_dev: %s: minor (%d) must be between "
372 "0 and %d!\n", __func__, minor, MAX_IRCTL_DEVICES-1); 385 "0 and %d!\n", __func__, minor, MAX_IRCTL_DEVICES - 1);
373 return -EBADRQC; 386 return -EBADRQC;
374 } 387 }
375 388
@@ -380,7 +393,7 @@ int lirc_unregister_driver(int minor)
380 return -ENOENT; 393 return -ENOENT;
381 } 394 }
382 395
383 cdev = &cdevs[minor]; 396 cdev = ir->cdev;
384 397
385 mutex_lock(&lirc_dev_lock); 398 mutex_lock(&lirc_dev_lock);
386 399
@@ -410,6 +423,7 @@ int lirc_unregister_driver(int minor)
410 } else { 423 } else {
411 lirc_irctl_cleanup(ir); 424 lirc_irctl_cleanup(ir);
412 cdev_del(cdev); 425 cdev_del(cdev);
426 kfree(cdev);
413 kfree(ir); 427 kfree(ir);
414 irctls[minor] = NULL; 428 irctls[minor] = NULL;
415 } 429 }
@@ -453,7 +467,7 @@ int lirc_dev_fop_open(struct inode *inode, struct file *file)
453 goto error; 467 goto error;
454 } 468 }
455 469
456 cdev = &cdevs[iminor(inode)]; 470 cdev = ir->cdev;
457 if (try_module_get(cdev->owner)) { 471 if (try_module_get(cdev->owner)) {
458 ir->open++; 472 ir->open++;
459 retval = ir->d.set_use_inc(ir->d.data); 473 retval = ir->d.set_use_inc(ir->d.data);
@@ -484,13 +498,15 @@ EXPORT_SYMBOL(lirc_dev_fop_open);
484int lirc_dev_fop_close(struct inode *inode, struct file *file) 498int lirc_dev_fop_close(struct inode *inode, struct file *file)
485{ 499{
486 struct irctl *ir = irctls[iminor(inode)]; 500 struct irctl *ir = irctls[iminor(inode)];
487 struct cdev *cdev = &cdevs[iminor(inode)]; 501 struct cdev *cdev;
488 502
489 if (!ir) { 503 if (!ir) {
490 printk(KERN_ERR "%s: called with invalid irctl\n", __func__); 504 printk(KERN_ERR "%s: called with invalid irctl\n", __func__);
491 return -EINVAL; 505 return -EINVAL;
492 } 506 }
493 507
508 cdev = ir->cdev;
509
494 dev_dbg(ir->d.dev, LOGHEAD "close called\n", ir->d.name, ir->d.minor); 510 dev_dbg(ir->d.dev, LOGHEAD "close called\n", ir->d.name, ir->d.minor);
495 511
496 WARN_ON(mutex_lock_killable(&lirc_dev_lock)); 512 WARN_ON(mutex_lock_killable(&lirc_dev_lock));
@@ -503,6 +519,7 @@ int lirc_dev_fop_close(struct inode *inode, struct file *file)
503 lirc_irctl_cleanup(ir); 519 lirc_irctl_cleanup(ir);
504 cdev_del(cdev); 520 cdev_del(cdev);
505 irctls[ir->d.minor] = NULL; 521 irctls[ir->d.minor] = NULL;
522 kfree(cdev);
506 kfree(ir); 523 kfree(ir);
507 } 524 }
508 525
diff --git a/drivers/media/rc/mceusb.c b/drivers/media/rc/mceusb.c
index ad927fcaa020..06dfe0957b5e 100644
--- a/drivers/media/rc/mceusb.c
+++ b/drivers/media/rc/mceusb.c
@@ -108,6 +108,12 @@ static int debug = 1;
108static int debug; 108static int debug;
109#endif 109#endif
110 110
111#define mce_dbg(dev, fmt, ...) \
112 do { \
113 if (debug) \
114 dev_info(dev, fmt, ## __VA_ARGS__); \
115 } while (0)
116
111/* general constants */ 117/* general constants */
112#define SEND_FLAG_IN_PROGRESS 1 118#define SEND_FLAG_IN_PROGRESS 1
113#define SEND_FLAG_COMPLETE 2 119#define SEND_FLAG_COMPLETE 2
@@ -246,6 +252,9 @@ static struct usb_device_id mceusb_dev_table[] = {
246 .driver_info = MCE_GEN2_TX_INV }, 252 .driver_info = MCE_GEN2_TX_INV },
247 /* SMK eHome Infrared Transceiver */ 253 /* SMK eHome Infrared Transceiver */
248 { USB_DEVICE(VENDOR_SMK, 0x0338) }, 254 { USB_DEVICE(VENDOR_SMK, 0x0338) },
255 /* SMK/I-O Data GV-MC7/RCKIT Receiver */
256 { USB_DEVICE(VENDOR_SMK, 0x0353),
257 .driver_info = MCE_GEN2_NO_TX },
249 /* Tatung eHome Infrared Transceiver */ 258 /* Tatung eHome Infrared Transceiver */
250 { USB_DEVICE(VENDOR_TATUNG, 0x9150) }, 259 { USB_DEVICE(VENDOR_TATUNG, 0x9150) },
251 /* Shuttle eHome Infrared Transceiver */ 260 /* Shuttle eHome Infrared Transceiver */
@@ -606,12 +615,15 @@ static void mce_async_callback(struct urb *urb, struct pt_regs *regs)
606 if (ir) { 615 if (ir) {
607 len = urb->actual_length; 616 len = urb->actual_length;
608 617
609 dev_dbg(ir->dev, "callback called (status=%d len=%d)\n", 618 mce_dbg(ir->dev, "callback called (status=%d len=%d)\n",
610 urb->status, len); 619 urb->status, len);
611 620
612 mceusb_dev_printdata(ir, urb->transfer_buffer, 0, len, true); 621 mceusb_dev_printdata(ir, urb->transfer_buffer, 0, len, true);
613 } 622 }
614 623
624 /* the transfer buffer and urb were allocated in mce_request_packet */
625 kfree(urb->transfer_buffer);
626 usb_free_urb(urb);
615} 627}
616 628
617/* request incoming or send outgoing usb packet - used to initialize remote */ 629/* request incoming or send outgoing usb packet - used to initialize remote */
@@ -655,17 +667,17 @@ static void mce_request_packet(struct mceusb_dev *ir, unsigned char *data,
655 return; 667 return;
656 } 668 }
657 669
658 dev_dbg(dev, "receive request called (size=%#x)\n", size); 670 mce_dbg(dev, "receive request called (size=%#x)\n", size);
659 671
660 async_urb->transfer_buffer_length = size; 672 async_urb->transfer_buffer_length = size;
661 async_urb->dev = ir->usbdev; 673 async_urb->dev = ir->usbdev;
662 674
663 res = usb_submit_urb(async_urb, GFP_ATOMIC); 675 res = usb_submit_urb(async_urb, GFP_ATOMIC);
664 if (res) { 676 if (res) {
665 dev_dbg(dev, "receive request FAILED! (res=%d)\n", res); 677 mce_dbg(dev, "receive request FAILED! (res=%d)\n", res);
666 return; 678 return;
667 } 679 }
668 dev_dbg(dev, "receive request complete (res=%d)\n", res); 680 mce_dbg(dev, "receive request complete (res=%d)\n", res);
669} 681}
670 682
671static void mce_async_out(struct mceusb_dev *ir, unsigned char *data, int size) 683static void mce_async_out(struct mceusb_dev *ir, unsigned char *data, int size)
@@ -673,9 +685,9 @@ static void mce_async_out(struct mceusb_dev *ir, unsigned char *data, int size)
673 mce_request_packet(ir, data, size, MCEUSB_TX); 685 mce_request_packet(ir, data, size, MCEUSB_TX);
674} 686}
675 687
676static void mce_sync_in(struct mceusb_dev *ir, unsigned char *data, int size) 688static void mce_flush_rx_buffer(struct mceusb_dev *ir, int size)
677{ 689{
678 mce_request_packet(ir, data, size, MCEUSB_RX); 690 mce_request_packet(ir, NULL, size, MCEUSB_RX);
679} 691}
680 692
681/* Send data out the IR blaster port(s) */ 693/* Send data out the IR blaster port(s) */
@@ -794,7 +806,7 @@ static int mceusb_set_tx_carrier(struct rc_dev *dev, u32 carrier)
794 ir->carrier = carrier; 806 ir->carrier = carrier;
795 cmdbuf[2] = MCE_CMD_SIG_END; 807 cmdbuf[2] = MCE_CMD_SIG_END;
796 cmdbuf[3] = MCE_IRDATA_TRAILER; 808 cmdbuf[3] = MCE_IRDATA_TRAILER;
797 dev_dbg(ir->dev, "%s: disabling carrier " 809 mce_dbg(ir->dev, "%s: disabling carrier "
798 "modulation\n", __func__); 810 "modulation\n", __func__);
799 mce_async_out(ir, cmdbuf, sizeof(cmdbuf)); 811 mce_async_out(ir, cmdbuf, sizeof(cmdbuf));
800 return carrier; 812 return carrier;
@@ -806,7 +818,7 @@ static int mceusb_set_tx_carrier(struct rc_dev *dev, u32 carrier)
806 ir->carrier = carrier; 818 ir->carrier = carrier;
807 cmdbuf[2] = prescaler; 819 cmdbuf[2] = prescaler;
808 cmdbuf[3] = divisor; 820 cmdbuf[3] = divisor;
809 dev_dbg(ir->dev, "%s: requesting %u HZ " 821 mce_dbg(ir->dev, "%s: requesting %u HZ "
810 "carrier\n", __func__, carrier); 822 "carrier\n", __func__, carrier);
811 823
812 /* Transmit new carrier to mce device */ 824 /* Transmit new carrier to mce device */
@@ -879,7 +891,7 @@ static void mceusb_process_ir_data(struct mceusb_dev *ir, int buf_len)
879 rawir.duration = (ir->buf_in[i] & MCE_PULSE_MASK) 891 rawir.duration = (ir->buf_in[i] & MCE_PULSE_MASK)
880 * US_TO_NS(MCE_TIME_UNIT); 892 * US_TO_NS(MCE_TIME_UNIT);
881 893
882 dev_dbg(ir->dev, "Storing %s with duration %d\n", 894 mce_dbg(ir->dev, "Storing %s with duration %d\n",
883 rawir.pulse ? "pulse" : "space", 895 rawir.pulse ? "pulse" : "space",
884 rawir.duration); 896 rawir.duration);
885 897
@@ -911,7 +923,7 @@ static void mceusb_process_ir_data(struct mceusb_dev *ir, int buf_len)
911 if (ir->parser_state != CMD_HEADER && !ir->rem) 923 if (ir->parser_state != CMD_HEADER && !ir->rem)
912 ir->parser_state = CMD_HEADER; 924 ir->parser_state = CMD_HEADER;
913 } 925 }
914 dev_dbg(ir->dev, "processed IR data, calling ir_raw_event_handle\n"); 926 mce_dbg(ir->dev, "processed IR data, calling ir_raw_event_handle\n");
915 ir_raw_event_handle(ir->rc); 927 ir_raw_event_handle(ir->rc);
916} 928}
917 929
@@ -933,7 +945,7 @@ static void mceusb_dev_recv(struct urb *urb, struct pt_regs *regs)
933 945
934 if (ir->send_flags == RECV_FLAG_IN_PROGRESS) { 946 if (ir->send_flags == RECV_FLAG_IN_PROGRESS) {
935 ir->send_flags = SEND_FLAG_COMPLETE; 947 ir->send_flags = SEND_FLAG_COMPLETE;
936 dev_dbg(ir->dev, "setup answer received %d bytes\n", 948 mce_dbg(ir->dev, "setup answer received %d bytes\n",
937 buf_len); 949 buf_len);
938 } 950 }
939 951
@@ -951,7 +963,7 @@ static void mceusb_dev_recv(struct urb *urb, struct pt_regs *regs)
951 963
952 case -EPIPE: 964 case -EPIPE:
953 default: 965 default:
954 dev_dbg(ir->dev, "Error: urb status = %d\n", urb->status); 966 mce_dbg(ir->dev, "Error: urb status = %d\n", urb->status);
955 break; 967 break;
956 } 968 }
957 969
@@ -961,7 +973,6 @@ static void mceusb_dev_recv(struct urb *urb, struct pt_regs *regs)
961static void mceusb_gen1_init(struct mceusb_dev *ir) 973static void mceusb_gen1_init(struct mceusb_dev *ir)
962{ 974{
963 int ret; 975 int ret;
964 int maxp = ir->len_in;
965 struct device *dev = ir->dev; 976 struct device *dev = ir->dev;
966 char *data; 977 char *data;
967 978
@@ -978,8 +989,8 @@ static void mceusb_gen1_init(struct mceusb_dev *ir)
978 ret = usb_control_msg(ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0), 989 ret = usb_control_msg(ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0),
979 USB_REQ_SET_ADDRESS, USB_TYPE_VENDOR, 0, 0, 990 USB_REQ_SET_ADDRESS, USB_TYPE_VENDOR, 0, 0,
980 data, USB_CTRL_MSG_SZ, HZ * 3); 991 data, USB_CTRL_MSG_SZ, HZ * 3);
981 dev_dbg(dev, "%s - ret = %d\n", __func__, ret); 992 mce_dbg(dev, "%s - ret = %d\n", __func__, ret);
982 dev_dbg(dev, "%s - data[0] = %d, data[1] = %d\n", 993 mce_dbg(dev, "%s - data[0] = %d, data[1] = %d\n",
983 __func__, data[0], data[1]); 994 __func__, data[0], data[1]);
984 995
985 /* set feature: bit rate 38400 bps */ 996 /* set feature: bit rate 38400 bps */
@@ -987,71 +998,56 @@ static void mceusb_gen1_init(struct mceusb_dev *ir)
987 USB_REQ_SET_FEATURE, USB_TYPE_VENDOR, 998 USB_REQ_SET_FEATURE, USB_TYPE_VENDOR,
988 0xc04e, 0x0000, NULL, 0, HZ * 3); 999 0xc04e, 0x0000, NULL, 0, HZ * 3);
989 1000
990 dev_dbg(dev, "%s - ret = %d\n", __func__, ret); 1001 mce_dbg(dev, "%s - ret = %d\n", __func__, ret);
991 1002
992 /* bRequest 4: set char length to 8 bits */ 1003 /* bRequest 4: set char length to 8 bits */
993 ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0), 1004 ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0),
994 4, USB_TYPE_VENDOR, 1005 4, USB_TYPE_VENDOR,
995 0x0808, 0x0000, NULL, 0, HZ * 3); 1006 0x0808, 0x0000, NULL, 0, HZ * 3);
996 dev_dbg(dev, "%s - retB = %d\n", __func__, ret); 1007 mce_dbg(dev, "%s - retB = %d\n", __func__, ret);
997 1008
998 /* bRequest 2: set handshaking to use DTR/DSR */ 1009 /* bRequest 2: set handshaking to use DTR/DSR */
999 ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0), 1010 ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0),
1000 2, USB_TYPE_VENDOR, 1011 2, USB_TYPE_VENDOR,
1001 0x0000, 0x0100, NULL, 0, HZ * 3); 1012 0x0000, 0x0100, NULL, 0, HZ * 3);
1002 dev_dbg(dev, "%s - retC = %d\n", __func__, ret); 1013 mce_dbg(dev, "%s - retC = %d\n", __func__, ret);
1003 1014
1004 /* device reset */ 1015 /* device reset */
1005 mce_async_out(ir, DEVICE_RESET, sizeof(DEVICE_RESET)); 1016 mce_async_out(ir, DEVICE_RESET, sizeof(DEVICE_RESET));
1006 mce_sync_in(ir, NULL, maxp);
1007 1017
1008 /* get hw/sw revision? */ 1018 /* get hw/sw revision? */
1009 mce_async_out(ir, GET_REVISION, sizeof(GET_REVISION)); 1019 mce_async_out(ir, GET_REVISION, sizeof(GET_REVISION));
1010 mce_sync_in(ir, NULL, maxp);
1011 1020
1012 kfree(data); 1021 kfree(data);
1013}; 1022};
1014 1023
1015static void mceusb_gen2_init(struct mceusb_dev *ir) 1024static void mceusb_gen2_init(struct mceusb_dev *ir)
1016{ 1025{
1017 int maxp = ir->len_in;
1018
1019 /* device reset */ 1026 /* device reset */
1020 mce_async_out(ir, DEVICE_RESET, sizeof(DEVICE_RESET)); 1027 mce_async_out(ir, DEVICE_RESET, sizeof(DEVICE_RESET));
1021 mce_sync_in(ir, NULL, maxp);
1022 1028
1023 /* get hw/sw revision? */ 1029 /* get hw/sw revision? */
1024 mce_async_out(ir, GET_REVISION, sizeof(GET_REVISION)); 1030 mce_async_out(ir, GET_REVISION, sizeof(GET_REVISION));
1025 mce_sync_in(ir, NULL, maxp);
1026 1031
1027 /* unknown what the next two actually return... */ 1032 /* unknown what the next two actually return... */
1028 mce_async_out(ir, GET_UNKNOWN, sizeof(GET_UNKNOWN)); 1033 mce_async_out(ir, GET_UNKNOWN, sizeof(GET_UNKNOWN));
1029 mce_sync_in(ir, NULL, maxp);
1030 mce_async_out(ir, GET_UNKNOWN2, sizeof(GET_UNKNOWN2)); 1034 mce_async_out(ir, GET_UNKNOWN2, sizeof(GET_UNKNOWN2));
1031 mce_sync_in(ir, NULL, maxp);
1032} 1035}
1033 1036
1034static void mceusb_get_parameters(struct mceusb_dev *ir) 1037static void mceusb_get_parameters(struct mceusb_dev *ir)
1035{ 1038{
1036 int maxp = ir->len_in;
1037
1038 /* get the carrier and frequency */ 1039 /* get the carrier and frequency */
1039 mce_async_out(ir, GET_CARRIER_FREQ, sizeof(GET_CARRIER_FREQ)); 1040 mce_async_out(ir, GET_CARRIER_FREQ, sizeof(GET_CARRIER_FREQ));
1040 mce_sync_in(ir, NULL, maxp);
1041 1041
1042 if (!ir->flags.no_tx) { 1042 if (!ir->flags.no_tx)
1043 /* get the transmitter bitmask */ 1043 /* get the transmitter bitmask */
1044 mce_async_out(ir, GET_TX_BITMASK, sizeof(GET_TX_BITMASK)); 1044 mce_async_out(ir, GET_TX_BITMASK, sizeof(GET_TX_BITMASK));
1045 mce_sync_in(ir, NULL, maxp);
1046 }
1047 1045
1048 /* get receiver timeout value */ 1046 /* get receiver timeout value */
1049 mce_async_out(ir, GET_RX_TIMEOUT, sizeof(GET_RX_TIMEOUT)); 1047 mce_async_out(ir, GET_RX_TIMEOUT, sizeof(GET_RX_TIMEOUT));
1050 mce_sync_in(ir, NULL, maxp);
1051 1048
1052 /* get receiver sensor setting */ 1049 /* get receiver sensor setting */
1053 mce_async_out(ir, GET_RX_SENSOR, sizeof(GET_RX_SENSOR)); 1050 mce_async_out(ir, GET_RX_SENSOR, sizeof(GET_RX_SENSOR));
1054 mce_sync_in(ir, NULL, maxp);
1055} 1051}
1056 1052
1057static struct rc_dev *mceusb_init_rc_dev(struct mceusb_dev *ir) 1053static struct rc_dev *mceusb_init_rc_dev(struct mceusb_dev *ir)
@@ -1122,7 +1118,7 @@ static int __devinit mceusb_dev_probe(struct usb_interface *intf,
1122 bool tx_mask_normal; 1118 bool tx_mask_normal;
1123 int ir_intfnum; 1119 int ir_intfnum;
1124 1120
1125 dev_dbg(&intf->dev, "%s called\n", __func__); 1121 mce_dbg(&intf->dev, "%s called\n", __func__);
1126 1122
1127 idesc = intf->cur_altsetting; 1123 idesc = intf->cur_altsetting;
1128 1124
@@ -1150,7 +1146,7 @@ static int __devinit mceusb_dev_probe(struct usb_interface *intf,
1150 ep_in = ep; 1146 ep_in = ep;
1151 ep_in->bmAttributes = USB_ENDPOINT_XFER_INT; 1147 ep_in->bmAttributes = USB_ENDPOINT_XFER_INT;
1152 ep_in->bInterval = 1; 1148 ep_in->bInterval = 1;
1153 dev_dbg(&intf->dev, "acceptable inbound endpoint " 1149 mce_dbg(&intf->dev, "acceptable inbound endpoint "
1154 "found\n"); 1150 "found\n");
1155 } 1151 }
1156 1152
@@ -1165,12 +1161,12 @@ static int __devinit mceusb_dev_probe(struct usb_interface *intf,
1165 ep_out = ep; 1161 ep_out = ep;
1166 ep_out->bmAttributes = USB_ENDPOINT_XFER_INT; 1162 ep_out->bmAttributes = USB_ENDPOINT_XFER_INT;
1167 ep_out->bInterval = 1; 1163 ep_out->bInterval = 1;
1168 dev_dbg(&intf->dev, "acceptable outbound endpoint " 1164 mce_dbg(&intf->dev, "acceptable outbound endpoint "
1169 "found\n"); 1165 "found\n");
1170 } 1166 }
1171 } 1167 }
1172 if (ep_in == NULL) { 1168 if (ep_in == NULL) {
1173 dev_dbg(&intf->dev, "inbound and/or endpoint not found\n"); 1169 mce_dbg(&intf->dev, "inbound and/or endpoint not found\n");
1174 return -ENODEV; 1170 return -ENODEV;
1175 } 1171 }
1176 1172
@@ -1215,16 +1211,16 @@ static int __devinit mceusb_dev_probe(struct usb_interface *intf,
1215 if (!ir->rc) 1211 if (!ir->rc)
1216 goto rc_dev_fail; 1212 goto rc_dev_fail;
1217 1213
1218 /* flush buffers on the device */
1219 mce_sync_in(ir, NULL, maxp);
1220 mce_sync_in(ir, NULL, maxp);
1221
1222 /* wire up inbound data handler */ 1214 /* wire up inbound data handler */
1223 usb_fill_int_urb(ir->urb_in, dev, pipe, ir->buf_in, 1215 usb_fill_int_urb(ir->urb_in, dev, pipe, ir->buf_in,
1224 maxp, (usb_complete_t) mceusb_dev_recv, ir, ep_in->bInterval); 1216 maxp, (usb_complete_t) mceusb_dev_recv, ir, ep_in->bInterval);
1225 ir->urb_in->transfer_dma = ir->dma_in; 1217 ir->urb_in->transfer_dma = ir->dma_in;
1226 ir->urb_in->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; 1218 ir->urb_in->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
1227 1219
1220 /* flush buffers on the device */
1221 mce_dbg(&intf->dev, "Flushing receive buffers\n");
1222 mce_flush_rx_buffer(ir, maxp);
1223
1228 /* initialize device */ 1224 /* initialize device */
1229 if (ir->flags.microsoft_gen1) 1225 if (ir->flags.microsoft_gen1)
1230 mceusb_gen1_init(ir); 1226 mceusb_gen1_init(ir);
diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c
index bf3060ea6107..565f24c20d77 100644
--- a/drivers/media/rc/nuvoton-cir.c
+++ b/drivers/media/rc/nuvoton-cir.c
@@ -991,7 +991,6 @@ static int nvt_open(struct rc_dev *dev)
991 unsigned long flags; 991 unsigned long flags;
992 992
993 spin_lock_irqsave(&nvt->nvt_lock, flags); 993 spin_lock_irqsave(&nvt->nvt_lock, flags);
994 nvt->in_use = true;
995 nvt_enable_cir(nvt); 994 nvt_enable_cir(nvt);
996 spin_unlock_irqrestore(&nvt->nvt_lock, flags); 995 spin_unlock_irqrestore(&nvt->nvt_lock, flags);
997 996
@@ -1004,7 +1003,6 @@ static void nvt_close(struct rc_dev *dev)
1004 unsigned long flags; 1003 unsigned long flags;
1005 1004
1006 spin_lock_irqsave(&nvt->nvt_lock, flags); 1005 spin_lock_irqsave(&nvt->nvt_lock, flags);
1007 nvt->in_use = false;
1008 nvt_disable_cir(nvt); 1006 nvt_disable_cir(nvt);
1009 spin_unlock_irqrestore(&nvt->nvt_lock, flags); 1007 spin_unlock_irqrestore(&nvt->nvt_lock, flags);
1010} 1008}
diff --git a/drivers/media/rc/nuvoton-cir.h b/drivers/media/rc/nuvoton-cir.h
index 379795d61ea7..1241fc89a36c 100644
--- a/drivers/media/rc/nuvoton-cir.h
+++ b/drivers/media/rc/nuvoton-cir.h
@@ -70,7 +70,6 @@ struct nvt_dev {
70 struct ir_raw_event rawir; 70 struct ir_raw_event rawir;
71 71
72 spinlock_t nvt_lock; 72 spinlock_t nvt_lock;
73 bool in_use;
74 73
75 /* for rx */ 74 /* for rx */
76 u8 buf[RX_BUF_LEN]; 75 u8 buf[RX_BUF_LEN];
diff --git a/drivers/media/rc/rc-main.c b/drivers/media/rc/rc-main.c
index f57cd5677ac2..3186ac7c2c10 100644
--- a/drivers/media/rc/rc-main.c
+++ b/drivers/media/rc/rc-main.c
@@ -522,18 +522,20 @@ EXPORT_SYMBOL_GPL(rc_g_keycode_from_table);
522/** 522/**
523 * ir_do_keyup() - internal function to signal the release of a keypress 523 * ir_do_keyup() - internal function to signal the release of a keypress
524 * @dev: the struct rc_dev descriptor of the device 524 * @dev: the struct rc_dev descriptor of the device
525 * @sync: whether or not to call input_sync
525 * 526 *
526 * This function is used internally to release a keypress, it must be 527 * This function is used internally to release a keypress, it must be
527 * called with keylock held. 528 * called with keylock held.
528 */ 529 */
529static void ir_do_keyup(struct rc_dev *dev) 530static void ir_do_keyup(struct rc_dev *dev, bool sync)
530{ 531{
531 if (!dev->keypressed) 532 if (!dev->keypressed)
532 return; 533 return;
533 534
534 IR_dprintk(1, "keyup key 0x%04x\n", dev->last_keycode); 535 IR_dprintk(1, "keyup key 0x%04x\n", dev->last_keycode);
535 input_report_key(dev->input_dev, dev->last_keycode, 0); 536 input_report_key(dev->input_dev, dev->last_keycode, 0);
536 input_sync(dev->input_dev); 537 if (sync)
538 input_sync(dev->input_dev);
537 dev->keypressed = false; 539 dev->keypressed = false;
538} 540}
539 541
@@ -549,7 +551,7 @@ void rc_keyup(struct rc_dev *dev)
549 unsigned long flags; 551 unsigned long flags;
550 552
551 spin_lock_irqsave(&dev->keylock, flags); 553 spin_lock_irqsave(&dev->keylock, flags);
552 ir_do_keyup(dev); 554 ir_do_keyup(dev, true);
553 spin_unlock_irqrestore(&dev->keylock, flags); 555 spin_unlock_irqrestore(&dev->keylock, flags);
554} 556}
555EXPORT_SYMBOL_GPL(rc_keyup); 557EXPORT_SYMBOL_GPL(rc_keyup);
@@ -578,7 +580,7 @@ static void ir_timer_keyup(unsigned long cookie)
578 */ 580 */
579 spin_lock_irqsave(&dev->keylock, flags); 581 spin_lock_irqsave(&dev->keylock, flags);
580 if (time_is_before_eq_jiffies(dev->keyup_jiffies)) 582 if (time_is_before_eq_jiffies(dev->keyup_jiffies))
581 ir_do_keyup(dev); 583 ir_do_keyup(dev, true);
582 spin_unlock_irqrestore(&dev->keylock, flags); 584 spin_unlock_irqrestore(&dev->keylock, flags);
583} 585}
584 586
@@ -597,6 +599,7 @@ void rc_repeat(struct rc_dev *dev)
597 spin_lock_irqsave(&dev->keylock, flags); 599 spin_lock_irqsave(&dev->keylock, flags);
598 600
599 input_event(dev->input_dev, EV_MSC, MSC_SCAN, dev->last_scancode); 601 input_event(dev->input_dev, EV_MSC, MSC_SCAN, dev->last_scancode);
602 input_sync(dev->input_dev);
600 603
601 if (!dev->keypressed) 604 if (!dev->keypressed)
602 goto out; 605 goto out;
@@ -622,29 +625,28 @@ EXPORT_SYMBOL_GPL(rc_repeat);
622static void ir_do_keydown(struct rc_dev *dev, int scancode, 625static void ir_do_keydown(struct rc_dev *dev, int scancode,
623 u32 keycode, u8 toggle) 626 u32 keycode, u8 toggle)
624{ 627{
625 input_event(dev->input_dev, EV_MSC, MSC_SCAN, scancode); 628 bool new_event = !dev->keypressed ||
626 629 dev->last_scancode != scancode ||
627 /* Repeat event? */ 630 dev->last_toggle != toggle;
628 if (dev->keypressed &&
629 dev->last_scancode == scancode &&
630 dev->last_toggle == toggle)
631 return;
632 631
633 /* Release old keypress */ 632 if (new_event && dev->keypressed)
634 ir_do_keyup(dev); 633 ir_do_keyup(dev, false);
635 634
636 dev->last_scancode = scancode; 635 input_event(dev->input_dev, EV_MSC, MSC_SCAN, scancode);
637 dev->last_toggle = toggle;
638 dev->last_keycode = keycode;
639 636
640 if (keycode == KEY_RESERVED) 637 if (new_event && keycode != KEY_RESERVED) {
641 return; 638 /* Register a keypress */
639 dev->keypressed = true;
640 dev->last_scancode = scancode;
641 dev->last_toggle = toggle;
642 dev->last_keycode = keycode;
643
644 IR_dprintk(1, "%s: key down event, "
645 "key 0x%04x, scancode 0x%04x\n",
646 dev->input_name, keycode, scancode);
647 input_report_key(dev->input_dev, keycode, 1);
648 }
642 649
643 /* Register a keypress */
644 dev->keypressed = true;
645 IR_dprintk(1, "%s: key down event, key 0x%04x, scancode 0x%04x\n",
646 dev->input_name, keycode, scancode);
647 input_report_key(dev->input_dev, dev->last_keycode, 1);
648 input_sync(dev->input_dev); 650 input_sync(dev->input_dev);
649} 651}
650 652
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c
index a97cf2750bd9..834a48394bce 100644
--- a/drivers/media/video/bt8xx/bttv-driver.c
+++ b/drivers/media/video/bt8xx/bttv-driver.c
@@ -3474,7 +3474,7 @@ static int radio_s_tuner(struct file *file, void *priv,
3474 if (0 != t->index) 3474 if (0 != t->index)
3475 return -EINVAL; 3475 return -EINVAL;
3476 3476
3477 bttv_call_all(btv, tuner, g_tuner, t); 3477 bttv_call_all(btv, tuner, s_tuner, t);
3478 return 0; 3478 return 0;
3479} 3479}
3480 3480
diff --git a/drivers/media/video/cx18/cx18-ioctl.c b/drivers/media/video/cx18/cx18-ioctl.c
index 1933d4d11bf2..e80134f52ef5 100644
--- a/drivers/media/video/cx18/cx18-ioctl.c
+++ b/drivers/media/video/cx18/cx18-ioctl.c
@@ -695,14 +695,10 @@ static int cx18_g_tuner(struct file *file, void *fh, struct v4l2_tuner *vt)
695 695
696 cx18_call_all(cx, tuner, g_tuner, vt); 696 cx18_call_all(cx, tuner, g_tuner, vt);
697 697
698 if (test_bit(CX18_F_I_RADIO_USER, &cx->i_flags)) { 698 if (vt->type == V4L2_TUNER_RADIO)
699 strlcpy(vt->name, "cx18 Radio Tuner", sizeof(vt->name)); 699 strlcpy(vt->name, "cx18 Radio Tuner", sizeof(vt->name));
700 vt->type = V4L2_TUNER_RADIO; 700 else
701 } else {
702 strlcpy(vt->name, "cx18 TV Tuner", sizeof(vt->name)); 701 strlcpy(vt->name, "cx18 TV Tuner", sizeof(vt->name));
703 vt->type = V4L2_TUNER_ANALOG_TV;
704 }
705
706 return 0; 702 return 0;
707} 703}
708 704
diff --git a/drivers/media/video/ivtv/ivtv-ioctl.c b/drivers/media/video/ivtv/ivtv-ioctl.c
index f9e347dae739..120c7d8e0895 100644
--- a/drivers/media/video/ivtv/ivtv-ioctl.c
+++ b/drivers/media/video/ivtv/ivtv-ioctl.c
@@ -1184,14 +1184,10 @@ static int ivtv_g_tuner(struct file *file, void *fh, struct v4l2_tuner *vt)
1184 1184
1185 ivtv_call_all(itv, tuner, g_tuner, vt); 1185 ivtv_call_all(itv, tuner, g_tuner, vt);
1186 1186
1187 if (test_bit(IVTV_F_I_RADIO_USER, &itv->i_flags)) { 1187 if (vt->type == V4L2_TUNER_RADIO)
1188 strlcpy(vt->name, "ivtv Radio Tuner", sizeof(vt->name)); 1188 strlcpy(vt->name, "ivtv Radio Tuner", sizeof(vt->name));
1189 vt->type = V4L2_TUNER_RADIO; 1189 else
1190 } else {
1191 strlcpy(vt->name, "ivtv TV Tuner", sizeof(vt->name)); 1190 strlcpy(vt->name, "ivtv TV Tuner", sizeof(vt->name));
1192 vt->type = V4L2_TUNER_ANALOG_TV;
1193 }
1194
1195 return 0; 1191 return 0;
1196} 1192}
1197 1193
diff --git a/drivers/media/video/m5mols/m5mols.h b/drivers/media/video/m5mols/m5mols.h
index 10b55c854487..89d09a8914f8 100644
--- a/drivers/media/video/m5mols/m5mols.h
+++ b/drivers/media/video/m5mols/m5mols.h
@@ -2,10 +2,10 @@
2 * Header for M-5MOLS 8M Pixel camera sensor with ISP 2 * Header for M-5MOLS 8M Pixel camera sensor with ISP
3 * 3 *
4 * Copyright (C) 2011 Samsung Electronics Co., Ltd. 4 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
5 * Author: HeungJun Kim, riverful.kim@samsung.com 5 * Author: HeungJun Kim <riverful.kim@samsung.com>
6 * 6 *
7 * Copyright (C) 2009 Samsung Electronics Co., Ltd. 7 * Copyright (C) 2009 Samsung Electronics Co., Ltd.
8 * Author: Dongsoo Nathaniel Kim, dongsoo45.kim@samsung.com 8 * Author: Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
@@ -106,23 +106,23 @@ struct m5mols_capture {
106 * The each value according to each scenemode is recommended in the documents. 106 * The each value according to each scenemode is recommended in the documents.
107 */ 107 */
108struct m5mols_scenemode { 108struct m5mols_scenemode {
109 u32 metering; 109 u8 metering;
110 u32 ev_bias; 110 u8 ev_bias;
111 u32 wb_mode; 111 u8 wb_mode;
112 u32 wb_preset; 112 u8 wb_preset;
113 u32 chroma_en; 113 u8 chroma_en;
114 u32 chroma_lvl; 114 u8 chroma_lvl;
115 u32 edge_en; 115 u8 edge_en;
116 u32 edge_lvl; 116 u8 edge_lvl;
117 u32 af_range; 117 u8 af_range;
118 u32 fd_mode; 118 u8 fd_mode;
119 u32 mcc; 119 u8 mcc;
120 u32 light; 120 u8 light;
121 u32 flash; 121 u8 flash;
122 u32 tone; 122 u8 tone;
123 u32 iso; 123 u8 iso;
124 u32 capt_mode; 124 u8 capt_mode;
125 u32 wdr; 125 u8 wdr;
126}; 126};
127 127
128/** 128/**
@@ -154,7 +154,6 @@ struct m5mols_version {
154 u8 str[VERSION_STRING_SIZE]; 154 u8 str[VERSION_STRING_SIZE];
155 u8 af; 155 u8 af;
156}; 156};
157#define VERSION_SIZE sizeof(struct m5mols_version)
158 157
159/** 158/**
160 * struct m5mols_info - M-5MOLS driver data structure 159 * struct m5mols_info - M-5MOLS driver data structure
@@ -216,9 +215,9 @@ struct m5mols_info {
216 bool lock_ae; 215 bool lock_ae;
217 bool lock_awb; 216 bool lock_awb;
218 u8 resolution; 217 u8 resolution;
219 u32 interrupt; 218 u8 interrupt;
220 u32 mode; 219 u8 mode;
221 u32 mode_save; 220 u8 mode_save;
222 int (*set_power)(struct device *dev, int on); 221 int (*set_power)(struct device *dev, int on);
223}; 222};
224 223
@@ -256,9 +255,11 @@ struct m5mols_info {
256 * +-------+---+----------+-----+------+------+------+------+ 255 * +-------+---+----------+-----+------+------+------+------+
257 * - d[0..3]: according to size1 256 * - d[0..3]: according to size1
258 */ 257 */
259int m5mols_read(struct v4l2_subdev *sd, u32 reg_comb, u32 *val); 258int m5mols_read_u8(struct v4l2_subdev *sd, u32 reg_comb, u8 *val);
259int m5mols_read_u16(struct v4l2_subdev *sd, u32 reg_comb, u16 *val);
260int m5mols_read_u32(struct v4l2_subdev *sd, u32 reg_comb, u32 *val);
260int m5mols_write(struct v4l2_subdev *sd, u32 reg_comb, u32 val); 261int m5mols_write(struct v4l2_subdev *sd, u32 reg_comb, u32 val);
261int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u32 value); 262int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u8 value);
262 263
263/* 264/*
264 * Mode operation of the M-5MOLS 265 * Mode operation of the M-5MOLS
@@ -280,12 +281,12 @@ int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u32 value);
280 * The available executing order between each modes are as follows: 281 * The available executing order between each modes are as follows:
281 * PARAMETER <---> MONITOR <---> CAPTURE 282 * PARAMETER <---> MONITOR <---> CAPTURE
282 */ 283 */
283int m5mols_mode(struct m5mols_info *info, u32 mode); 284int m5mols_mode(struct m5mols_info *info, u8 mode);
284 285
285int m5mols_enable_interrupt(struct v4l2_subdev *sd, u32 reg); 286int m5mols_enable_interrupt(struct v4l2_subdev *sd, u8 reg);
286int m5mols_sync_controls(struct m5mols_info *info); 287int m5mols_sync_controls(struct m5mols_info *info);
287int m5mols_start_capture(struct m5mols_info *info); 288int m5mols_start_capture(struct m5mols_info *info);
288int m5mols_do_scenemode(struct m5mols_info *info, u32 mode); 289int m5mols_do_scenemode(struct m5mols_info *info, u8 mode);
289int m5mols_lock_3a(struct m5mols_info *info, bool lock); 290int m5mols_lock_3a(struct m5mols_info *info, bool lock);
290int m5mols_set_ctrl(struct v4l2_ctrl *ctrl); 291int m5mols_set_ctrl(struct v4l2_ctrl *ctrl);
291 292
diff --git a/drivers/media/video/m5mols/m5mols_capture.c b/drivers/media/video/m5mols/m5mols_capture.c
index d71a3903b60f..d9471928369d 100644
--- a/drivers/media/video/m5mols/m5mols_capture.c
+++ b/drivers/media/video/m5mols/m5mols_capture.c
@@ -2,10 +2,10 @@
2 * The Capture code for Fujitsu M-5MOLS ISP 2 * The Capture code for Fujitsu M-5MOLS ISP
3 * 3 *
4 * Copyright (C) 2011 Samsung Electronics Co., Ltd. 4 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
5 * Author: HeungJun Kim, riverful.kim@samsung.com 5 * Author: HeungJun Kim <riverful.kim@samsung.com>
6 * 6 *
7 * Copyright (C) 2009 Samsung Electronics Co., Ltd. 7 * Copyright (C) 2009 Samsung Electronics Co., Ltd.
8 * Author: Dongsoo Nathaniel Kim, dongsoo45.kim@samsung.com 8 * Author: Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
@@ -58,9 +58,9 @@ static int m5mols_read_rational(struct v4l2_subdev *sd, u32 addr_num,
58{ 58{
59 u32 num, den; 59 u32 num, den;
60 60
61 int ret = m5mols_read(sd, addr_num, &num); 61 int ret = m5mols_read_u32(sd, addr_num, &num);
62 if (!ret) 62 if (!ret)
63 ret = m5mols_read(sd, addr_den, &den); 63 ret = m5mols_read_u32(sd, addr_den, &den);
64 if (ret) 64 if (ret)
65 return ret; 65 return ret;
66 *val = den == 0 ? 0 : num / den; 66 *val = den == 0 ? 0 : num / den;
@@ -99,20 +99,20 @@ static int m5mols_capture_info(struct m5mols_info *info)
99 if (ret) 99 if (ret)
100 return ret; 100 return ret;
101 101
102 ret = m5mols_read(sd, EXIF_INFO_ISO, (u32 *)&exif->iso_speed); 102 ret = m5mols_read_u16(sd, EXIF_INFO_ISO, &exif->iso_speed);
103 if (!ret) 103 if (!ret)
104 ret = m5mols_read(sd, EXIF_INFO_FLASH, (u32 *)&exif->flash); 104 ret = m5mols_read_u16(sd, EXIF_INFO_FLASH, &exif->flash);
105 if (!ret) 105 if (!ret)
106 ret = m5mols_read(sd, EXIF_INFO_SDR, (u32 *)&exif->sdr); 106 ret = m5mols_read_u16(sd, EXIF_INFO_SDR, &exif->sdr);
107 if (!ret) 107 if (!ret)
108 ret = m5mols_read(sd, EXIF_INFO_QVAL, (u32 *)&exif->qval); 108 ret = m5mols_read_u16(sd, EXIF_INFO_QVAL, &exif->qval);
109 if (ret) 109 if (ret)
110 return ret; 110 return ret;
111 111
112 if (!ret) 112 if (!ret)
113 ret = m5mols_read(sd, CAPC_IMAGE_SIZE, &info->cap.main); 113 ret = m5mols_read_u32(sd, CAPC_IMAGE_SIZE, &info->cap.main);
114 if (!ret) 114 if (!ret)
115 ret = m5mols_read(sd, CAPC_THUMB_SIZE, &info->cap.thumb); 115 ret = m5mols_read_u32(sd, CAPC_THUMB_SIZE, &info->cap.thumb);
116 if (!ret) 116 if (!ret)
117 info->cap.total = info->cap.main + info->cap.thumb; 117 info->cap.total = info->cap.main + info->cap.thumb;
118 118
@@ -122,7 +122,7 @@ static int m5mols_capture_info(struct m5mols_info *info)
122int m5mols_start_capture(struct m5mols_info *info) 122int m5mols_start_capture(struct m5mols_info *info)
123{ 123{
124 struct v4l2_subdev *sd = &info->sd; 124 struct v4l2_subdev *sd = &info->sd;
125 u32 resolution = info->resolution; 125 u8 resolution = info->resolution;
126 int timeout; 126 int timeout;
127 int ret; 127 int ret;
128 128
diff --git a/drivers/media/video/m5mols/m5mols_controls.c b/drivers/media/video/m5mols/m5mols_controls.c
index 817c16fec368..d135d20d09cf 100644
--- a/drivers/media/video/m5mols/m5mols_controls.c
+++ b/drivers/media/video/m5mols/m5mols_controls.c
@@ -2,10 +2,10 @@
2 * Controls for M-5MOLS 8M Pixel camera sensor with ISP 2 * Controls for M-5MOLS 8M Pixel camera sensor with ISP
3 * 3 *
4 * Copyright (C) 2011 Samsung Electronics Co., Ltd. 4 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
5 * Author: HeungJun Kim, riverful.kim@samsung.com 5 * Author: HeungJun Kim <riverful.kim@samsung.com>
6 * 6 *
7 * Copyright (C) 2009 Samsung Electronics Co., Ltd. 7 * Copyright (C) 2009 Samsung Electronics Co., Ltd.
8 * Author: Dongsoo Nathaniel Kim, dongsoo45.kim@samsung.com 8 * Author: Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
@@ -130,7 +130,7 @@ static struct m5mols_scenemode m5mols_default_scenemode[] = {
130 * 130 *
131 * WARNING: The execution order is important. Do not change the order. 131 * WARNING: The execution order is important. Do not change the order.
132 */ 132 */
133int m5mols_do_scenemode(struct m5mols_info *info, u32 mode) 133int m5mols_do_scenemode(struct m5mols_info *info, u8 mode)
134{ 134{
135 struct v4l2_subdev *sd = &info->sd; 135 struct v4l2_subdev *sd = &info->sd;
136 struct m5mols_scenemode scenemode = m5mols_default_scenemode[mode]; 136 struct m5mols_scenemode scenemode = m5mols_default_scenemode[mode];
diff --git a/drivers/media/video/m5mols/m5mols_core.c b/drivers/media/video/m5mols/m5mols_core.c
index 76eac26e84ae..43c68f51c5ce 100644
--- a/drivers/media/video/m5mols/m5mols_core.c
+++ b/drivers/media/video/m5mols/m5mols_core.c
@@ -2,10 +2,10 @@
2 * Driver for M-5MOLS 8M Pixel camera sensor with ISP 2 * Driver for M-5MOLS 8M Pixel camera sensor with ISP
3 * 3 *
4 * Copyright (C) 2011 Samsung Electronics Co., Ltd. 4 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
5 * Author: HeungJun Kim, riverful.kim@samsung.com 5 * Author: HeungJun Kim <riverful.kim@samsung.com>
6 * 6 *
7 * Copyright (C) 2009 Samsung Electronics Co., Ltd. 7 * Copyright (C) 2009 Samsung Electronics Co., Ltd.
8 * Author: Dongsoo Nathaniel Kim, dongsoo45.kim@samsung.com 8 * Author: Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
@@ -133,13 +133,13 @@ static u32 m5mols_swap_byte(u8 *data, u8 length)
133/** 133/**
134 * m5mols_read - I2C read function 134 * m5mols_read - I2C read function
135 * @reg: combination of size, category and command for the I2C packet 135 * @reg: combination of size, category and command for the I2C packet
136 * @size: desired size of I2C packet
136 * @val: read value 137 * @val: read value
137 */ 138 */
138int m5mols_read(struct v4l2_subdev *sd, u32 reg, u32 *val) 139static int m5mols_read(struct v4l2_subdev *sd, u32 size, u32 reg, u32 *val)
139{ 140{
140 struct i2c_client *client = v4l2_get_subdevdata(sd); 141 struct i2c_client *client = v4l2_get_subdevdata(sd);
141 u8 rbuf[M5MOLS_I2C_MAX_SIZE + 1]; 142 u8 rbuf[M5MOLS_I2C_MAX_SIZE + 1];
142 u8 size = I2C_SIZE(reg);
143 u8 category = I2C_CATEGORY(reg); 143 u8 category = I2C_CATEGORY(reg);
144 u8 cmd = I2C_COMMAND(reg); 144 u8 cmd = I2C_COMMAND(reg);
145 struct i2c_msg msg[2]; 145 struct i2c_msg msg[2];
@@ -149,11 +149,6 @@ int m5mols_read(struct v4l2_subdev *sd, u32 reg, u32 *val)
149 if (!client->adapter) 149 if (!client->adapter)
150 return -ENODEV; 150 return -ENODEV;
151 151
152 if (size != 1 && size != 2 && size != 4) {
153 v4l2_err(sd, "Wrong data size\n");
154 return -EINVAL;
155 }
156
157 msg[0].addr = client->addr; 152 msg[0].addr = client->addr;
158 msg[0].flags = 0; 153 msg[0].flags = 0;
159 msg[0].len = 5; 154 msg[0].len = 5;
@@ -184,6 +179,52 @@ int m5mols_read(struct v4l2_subdev *sd, u32 reg, u32 *val)
184 return 0; 179 return 0;
185} 180}
186 181
182int m5mols_read_u8(struct v4l2_subdev *sd, u32 reg, u8 *val)
183{
184 u32 val_32;
185 int ret;
186
187 if (I2C_SIZE(reg) != 1) {
188 v4l2_err(sd, "Wrong data size\n");
189 return -EINVAL;
190 }
191
192 ret = m5mols_read(sd, I2C_SIZE(reg), reg, &val_32);
193 if (ret)
194 return ret;
195
196 *val = (u8)val_32;
197 return ret;
198}
199
200int m5mols_read_u16(struct v4l2_subdev *sd, u32 reg, u16 *val)
201{
202 u32 val_32;
203 int ret;
204
205 if (I2C_SIZE(reg) != 2) {
206 v4l2_err(sd, "Wrong data size\n");
207 return -EINVAL;
208 }
209
210 ret = m5mols_read(sd, I2C_SIZE(reg), reg, &val_32);
211 if (ret)
212 return ret;
213
214 *val = (u16)val_32;
215 return ret;
216}
217
218int m5mols_read_u32(struct v4l2_subdev *sd, u32 reg, u32 *val)
219{
220 if (I2C_SIZE(reg) != 4) {
221 v4l2_err(sd, "Wrong data size\n");
222 return -EINVAL;
223 }
224
225 return m5mols_read(sd, I2C_SIZE(reg), reg, val);
226}
227
187/** 228/**
188 * m5mols_write - I2C command write function 229 * m5mols_write - I2C command write function
189 * @reg: combination of size, category and command for the I2C packet 230 * @reg: combination of size, category and command for the I2C packet
@@ -231,13 +272,14 @@ int m5mols_write(struct v4l2_subdev *sd, u32 reg, u32 val)
231 return 0; 272 return 0;
232} 273}
233 274
234int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u32 mask) 275int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u8 mask)
235{ 276{
236 u32 busy, i; 277 u8 busy;
278 int i;
237 int ret; 279 int ret;
238 280
239 for (i = 0; i < M5MOLS_I2C_CHECK_RETRY; i++) { 281 for (i = 0; i < M5MOLS_I2C_CHECK_RETRY; i++) {
240 ret = m5mols_read(sd, I2C_REG(category, cmd, 1), &busy); 282 ret = m5mols_read_u8(sd, I2C_REG(category, cmd, 1), &busy);
241 if (ret < 0) 283 if (ret < 0)
242 return ret; 284 return ret;
243 if ((busy & mask) == mask) 285 if ((busy & mask) == mask)
@@ -252,14 +294,14 @@ int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u32 mask)
252 * Before writing desired interrupt value the INT_FACTOR register should 294 * Before writing desired interrupt value the INT_FACTOR register should
253 * be read to clear pending interrupts. 295 * be read to clear pending interrupts.
254 */ 296 */
255int m5mols_enable_interrupt(struct v4l2_subdev *sd, u32 reg) 297int m5mols_enable_interrupt(struct v4l2_subdev *sd, u8 reg)
256{ 298{
257 struct m5mols_info *info = to_m5mols(sd); 299 struct m5mols_info *info = to_m5mols(sd);
258 u32 mask = is_available_af(info) ? REG_INT_AF : 0; 300 u8 mask = is_available_af(info) ? REG_INT_AF : 0;
259 u32 dummy; 301 u8 dummy;
260 int ret; 302 int ret;
261 303
262 ret = m5mols_read(sd, SYSTEM_INT_FACTOR, &dummy); 304 ret = m5mols_read_u8(sd, SYSTEM_INT_FACTOR, &dummy);
263 if (!ret) 305 if (!ret)
264 ret = m5mols_write(sd, SYSTEM_INT_ENABLE, reg & ~mask); 306 ret = m5mols_write(sd, SYSTEM_INT_ENABLE, reg & ~mask);
265 return ret; 307 return ret;
@@ -271,7 +313,7 @@ int m5mols_enable_interrupt(struct v4l2_subdev *sd, u32 reg)
271 * It always accompanies a little delay changing the M-5MOLS mode, so it is 313 * It always accompanies a little delay changing the M-5MOLS mode, so it is
272 * needed checking current busy status to guarantee right mode. 314 * needed checking current busy status to guarantee right mode.
273 */ 315 */
274static int m5mols_reg_mode(struct v4l2_subdev *sd, u32 mode) 316static int m5mols_reg_mode(struct v4l2_subdev *sd, u8 mode)
275{ 317{
276 int ret = m5mols_write(sd, SYSTEM_SYSMODE, mode); 318 int ret = m5mols_write(sd, SYSTEM_SYSMODE, mode);
277 319
@@ -286,16 +328,16 @@ static int m5mols_reg_mode(struct v4l2_subdev *sd, u32 mode)
286 * can be guaranteed only when the sensor is operating in mode which which 328 * can be guaranteed only when the sensor is operating in mode which which
287 * a command belongs to. 329 * a command belongs to.
288 */ 330 */
289int m5mols_mode(struct m5mols_info *info, u32 mode) 331int m5mols_mode(struct m5mols_info *info, u8 mode)
290{ 332{
291 struct v4l2_subdev *sd = &info->sd; 333 struct v4l2_subdev *sd = &info->sd;
292 int ret = -EINVAL; 334 int ret = -EINVAL;
293 u32 reg; 335 u8 reg;
294 336
295 if (mode < REG_PARAMETER && mode > REG_CAPTURE) 337 if (mode < REG_PARAMETER && mode > REG_CAPTURE)
296 return ret; 338 return ret;
297 339
298 ret = m5mols_read(sd, SYSTEM_SYSMODE, &reg); 340 ret = m5mols_read_u8(sd, SYSTEM_SYSMODE, &reg);
299 if ((!ret && reg == mode) || ret) 341 if ((!ret && reg == mode) || ret)
300 return ret; 342 return ret;
301 343
@@ -344,41 +386,37 @@ int m5mols_mode(struct m5mols_info *info, u32 mode)
344static int m5mols_get_version(struct v4l2_subdev *sd) 386static int m5mols_get_version(struct v4l2_subdev *sd)
345{ 387{
346 struct m5mols_info *info = to_m5mols(sd); 388 struct m5mols_info *info = to_m5mols(sd);
347 union { 389 struct m5mols_version *ver = &info->ver;
348 struct m5mols_version ver; 390 u8 *str = ver->str;
349 u8 bytes[VERSION_SIZE]; 391 int i;
350 } version;
351 u32 *value;
352 u8 cmd = CAT0_VER_CUSTOMER;
353 int ret; 392 int ret;
354 393
355 do { 394 ret = m5mols_read_u8(sd, SYSTEM_VER_CUSTOMER, &ver->customer);
356 value = (u32 *)&version.bytes[cmd]; 395 if (!ret)
357 ret = m5mols_read(sd, SYSTEM_CMD(cmd), value); 396 ret = m5mols_read_u8(sd, SYSTEM_VER_PROJECT, &ver->project);
358 if (ret) 397 if (!ret)
359 return ret; 398 ret = m5mols_read_u16(sd, SYSTEM_VER_FIRMWARE, &ver->fw);
360 } while (cmd++ != CAT0_VER_AWB); 399 if (!ret)
400 ret = m5mols_read_u16(sd, SYSTEM_VER_HARDWARE, &ver->hw);
401 if (!ret)
402 ret = m5mols_read_u16(sd, SYSTEM_VER_PARAMETER, &ver->param);
403 if (!ret)
404 ret = m5mols_read_u16(sd, SYSTEM_VER_AWB, &ver->awb);
405 if (!ret)
406 ret = m5mols_read_u8(sd, AF_VERSION, &ver->af);
407 if (ret)
408 return ret;
361 409
362 do { 410 for (i = 0; i < VERSION_STRING_SIZE; i++) {
363 value = (u32 *)&version.bytes[cmd]; 411 ret = m5mols_read_u8(sd, SYSTEM_VER_STRING, &str[i]);
364 ret = m5mols_read(sd, SYSTEM_VER_STRING, value);
365 if (ret) 412 if (ret)
366 return ret; 413 return ret;
367 if (cmd >= VERSION_SIZE - 1) 414 }
368 return -EINVAL;
369 } while (version.bytes[cmd++]);
370
371 value = (u32 *)&version.bytes[cmd];
372 ret = m5mols_read(sd, AF_VERSION, value);
373 if (ret)
374 return ret;
375 415
376 /* store version information swapped for being readable */ 416 ver->fw = be16_to_cpu(ver->fw);
377 info->ver = version.ver; 417 ver->hw = be16_to_cpu(ver->hw);
378 info->ver.fw = be16_to_cpu(info->ver.fw); 418 ver->param = be16_to_cpu(ver->param);
379 info->ver.hw = be16_to_cpu(info->ver.hw); 419 ver->awb = be16_to_cpu(ver->awb);
380 info->ver.param = be16_to_cpu(info->ver.param);
381 info->ver.awb = be16_to_cpu(info->ver.awb);
382 420
383 v4l2_info(sd, "Manufacturer\t[%s]\n", 421 v4l2_info(sd, "Manufacturer\t[%s]\n",
384 is_manufacturer(info, REG_SAMSUNG_ELECTRO) ? 422 is_manufacturer(info, REG_SAMSUNG_ELECTRO) ?
@@ -722,7 +760,7 @@ static int m5mols_init_controls(struct m5mols_info *info)
722 int ret; 760 int ret;
723 761
724 /* Determine value's range & step of controls for various FW version */ 762 /* Determine value's range & step of controls for various FW version */
725 ret = m5mols_read(sd, AE_MAX_GAIN_MON, (u32 *)&max_exposure); 763 ret = m5mols_read_u16(sd, AE_MAX_GAIN_MON, &max_exposure);
726 if (!ret) 764 if (!ret)
727 step_zoom = is_manufacturer(info, REG_SAMSUNG_OPTICS) ? 31 : 1; 765 step_zoom = is_manufacturer(info, REG_SAMSUNG_OPTICS) ? 31 : 1;
728 if (ret) 766 if (ret)
@@ -842,18 +880,18 @@ static void m5mols_irq_work(struct work_struct *work)
842 struct m5mols_info *info = 880 struct m5mols_info *info =
843 container_of(work, struct m5mols_info, work_irq); 881 container_of(work, struct m5mols_info, work_irq);
844 struct v4l2_subdev *sd = &info->sd; 882 struct v4l2_subdev *sd = &info->sd;
845 u32 reg; 883 u8 reg;
846 int ret; 884 int ret;
847 885
848 if (!is_powered(info) || 886 if (!is_powered(info) ||
849 m5mols_read(sd, SYSTEM_INT_FACTOR, &info->interrupt)) 887 m5mols_read_u8(sd, SYSTEM_INT_FACTOR, &info->interrupt))
850 return; 888 return;
851 889
852 switch (info->interrupt & REG_INT_MASK) { 890 switch (info->interrupt & REG_INT_MASK) {
853 case REG_INT_AF: 891 case REG_INT_AF:
854 if (!is_available_af(info)) 892 if (!is_available_af(info))
855 break; 893 break;
856 ret = m5mols_read(sd, AF_STATUS, &reg); 894 ret = m5mols_read_u8(sd, AF_STATUS, &reg);
857 v4l2_dbg(2, m5mols_debug, sd, "AF %s\n", 895 v4l2_dbg(2, m5mols_debug, sd, "AF %s\n",
858 reg == REG_AF_FAIL ? "Failed" : 896 reg == REG_AF_FAIL ? "Failed" :
859 reg == REG_AF_SUCCESS ? "Success" : 897 reg == REG_AF_SUCCESS ? "Success" :
diff --git a/drivers/media/video/m5mols/m5mols_reg.h b/drivers/media/video/m5mols/m5mols_reg.h
index b83e36fc6ac6..c755bd6edfe9 100644
--- a/drivers/media/video/m5mols/m5mols_reg.h
+++ b/drivers/media/video/m5mols/m5mols_reg.h
@@ -2,10 +2,10 @@
2 * Register map for M-5MOLS 8M Pixel camera sensor with ISP 2 * Register map for M-5MOLS 8M Pixel camera sensor with ISP
3 * 3 *
4 * Copyright (C) 2011 Samsung Electronics Co., Ltd. 4 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
5 * Author: HeungJun Kim, riverful.kim@samsung.com 5 * Author: HeungJun Kim <riverful.kim@samsung.com>
6 * 6 *
7 * Copyright (C) 2009 Samsung Electronics Co., Ltd. 7 * Copyright (C) 2009 Samsung Electronics Co., Ltd.
8 * Author: Dongsoo Nathaniel Kim, dongsoo45.kim@samsung.com 8 * Author: Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
@@ -56,13 +56,24 @@
56 * more specific contents, see definition if file m5mols.h. 56 * more specific contents, see definition if file m5mols.h.
57 */ 57 */
58#define CAT0_VER_CUSTOMER 0x00 /* customer version */ 58#define CAT0_VER_CUSTOMER 0x00 /* customer version */
59#define CAT0_VER_AWB 0x09 /* Auto WB version */ 59#define CAT0_VER_PROJECT 0x01 /* project version */
60#define CAT0_VER_FIRMWARE 0x02 /* Firmware version */
61#define CAT0_VER_HARDWARE 0x04 /* Hardware version */
62#define CAT0_VER_PARAMETER 0x06 /* Parameter version */
63#define CAT0_VER_AWB 0x08 /* Auto WB version */
60#define CAT0_VER_STRING 0x0a /* string including M-5MOLS */ 64#define CAT0_VER_STRING 0x0a /* string including M-5MOLS */
61#define CAT0_SYSMODE 0x0b /* SYSTEM mode register */ 65#define CAT0_SYSMODE 0x0b /* SYSTEM mode register */
62#define CAT0_STATUS 0x0c /* SYSTEM mode status register */ 66#define CAT0_STATUS 0x0c /* SYSTEM mode status register */
63#define CAT0_INT_FACTOR 0x10 /* interrupt pending register */ 67#define CAT0_INT_FACTOR 0x10 /* interrupt pending register */
64#define CAT0_INT_ENABLE 0x11 /* interrupt enable register */ 68#define CAT0_INT_ENABLE 0x11 /* interrupt enable register */
65 69
70#define SYSTEM_VER_CUSTOMER I2C_REG(CAT_SYSTEM, CAT0_VER_CUSTOMER, 1)
71#define SYSTEM_VER_PROJECT I2C_REG(CAT_SYSTEM, CAT0_VER_PROJECT, 1)
72#define SYSTEM_VER_FIRMWARE I2C_REG(CAT_SYSTEM, CAT0_VER_FIRMWARE, 2)
73#define SYSTEM_VER_HARDWARE I2C_REG(CAT_SYSTEM, CAT0_VER_HARDWARE, 2)
74#define SYSTEM_VER_PARAMETER I2C_REG(CAT_SYSTEM, CAT0_VER_PARAMETER, 2)
75#define SYSTEM_VER_AWB I2C_REG(CAT_SYSTEM, CAT0_VER_AWB, 2)
76
66#define SYSTEM_SYSMODE I2C_REG(CAT_SYSTEM, CAT0_SYSMODE, 1) 77#define SYSTEM_SYSMODE I2C_REG(CAT_SYSTEM, CAT0_SYSMODE, 1)
67#define REG_SYSINIT 0x00 /* SYSTEM mode */ 78#define REG_SYSINIT 0x00 /* SYSTEM mode */
68#define REG_PARAMETER 0x01 /* PARAMETER mode */ 79#define REG_PARAMETER 0x01 /* PARAMETER mode */
@@ -382,8 +393,8 @@
382#define REG_CAP_START_MAIN 0x01 393#define REG_CAP_START_MAIN 0x01
383#define REG_CAP_START_THUMB 0x03 394#define REG_CAP_START_THUMB 0x03
384 395
385#define CAPC_IMAGE_SIZE I2C_REG(CAT_CAPT_CTRL, CATC_CAP_IMAGE_SIZE, 1) 396#define CAPC_IMAGE_SIZE I2C_REG(CAT_CAPT_CTRL, CATC_CAP_IMAGE_SIZE, 4)
386#define CAPC_THUMB_SIZE I2C_REG(CAT_CAPT_CTRL, CATC_CAP_THUMB_SIZE, 1) 397#define CAPC_THUMB_SIZE I2C_REG(CAT_CAPT_CTRL, CATC_CAP_THUMB_SIZE, 4)
387 398
388/* 399/*
389 * Category F - Flash 400 * Category F - Flash
diff --git a/drivers/media/video/msp3400-driver.c b/drivers/media/video/msp3400-driver.c
index de5d481b0328..c43c81f5f978 100644
--- a/drivers/media/video/msp3400-driver.c
+++ b/drivers/media/video/msp3400-driver.c
@@ -480,12 +480,14 @@ static int msp_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
480 struct msp_state *state = to_state(sd); 480 struct msp_state *state = to_state(sd);
481 struct i2c_client *client = v4l2_get_subdevdata(sd); 481 struct i2c_client *client = v4l2_get_subdevdata(sd);
482 482
483 if (state->radio) 483 if (vt->type != V4L2_TUNER_ANALOG_TV)
484 return 0; 484 return 0;
485 if (state->opmode == OPMODE_AUTOSELECT) 485 if (!state->radio) {
486 msp_detect_stereo(client); 486 if (state->opmode == OPMODE_AUTOSELECT)
487 vt->audmode = state->audmode; 487 msp_detect_stereo(client);
488 vt->rxsubchans = state->rxsubchans; 488 vt->rxsubchans = state->rxsubchans;
489 }
490 vt->audmode = state->audmode;
489 vt->capability |= V4L2_TUNER_CAP_STEREO | 491 vt->capability |= V4L2_TUNER_CAP_STEREO |
490 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2; 492 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
491 return 0; 493 return 0;
diff --git a/drivers/media/video/mx1_camera.c b/drivers/media/video/mx1_camera.c
index bc0c23a1009c..63f8a0cc33d8 100644
--- a/drivers/media/video/mx1_camera.c
+++ b/drivers/media/video/mx1_camera.c
@@ -444,12 +444,9 @@ static int mx1_camera_add_device(struct soc_camera_device *icd)
444{ 444{
445 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 445 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
446 struct mx1_camera_dev *pcdev = ici->priv; 446 struct mx1_camera_dev *pcdev = ici->priv;
447 int ret;
448 447
449 if (pcdev->icd) { 448 if (pcdev->icd)
450 ret = -EBUSY; 449 return -EBUSY;
451 goto ebusy;
452 }
453 450
454 dev_info(icd->dev.parent, "MX1 Camera driver attached to camera %d\n", 451 dev_info(icd->dev.parent, "MX1 Camera driver attached to camera %d\n",
455 icd->devnum); 452 icd->devnum);
@@ -458,8 +455,7 @@ static int mx1_camera_add_device(struct soc_camera_device *icd)
458 455
459 pcdev->icd = icd; 456 pcdev->icd = icd;
460 457
461ebusy: 458 return 0;
462 return ret;
463} 459}
464 460
465static void mx1_camera_remove_device(struct soc_camera_device *icd) 461static void mx1_camera_remove_device(struct soc_camera_device *icd)
diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c
index 4ada9be1d430..4d07c5844402 100644
--- a/drivers/media/video/omap/omap_vout.c
+++ b/drivers/media/video/omap/omap_vout.c
@@ -982,6 +982,14 @@ static int omap_vout_buffer_setup(struct videobuf_queue *q, unsigned int *count,
982 startindex = (vout->vid == OMAP_VIDEO1) ? 982 startindex = (vout->vid == OMAP_VIDEO1) ?
983 video1_numbuffers : video2_numbuffers; 983 video1_numbuffers : video2_numbuffers;
984 984
985 /* Check the size of the buffer */
986 if (*size > vout->buffer_size) {
987 v4l2_err(&vout->vid_dev->v4l2_dev,
988 "buffer allocation mismatch [%u] [%u]\n",
989 *size, vout->buffer_size);
990 return -ENOMEM;
991 }
992
985 for (i = startindex; i < *count; i++) { 993 for (i = startindex; i < *count; i++) {
986 vout->buffer_size = *size; 994 vout->buffer_size = *size;
987 995
@@ -1228,6 +1236,14 @@ static int omap_vout_mmap(struct file *file, struct vm_area_struct *vma)
1228 (vma->vm_pgoff << PAGE_SHIFT)); 1236 (vma->vm_pgoff << PAGE_SHIFT));
1229 return -EINVAL; 1237 return -EINVAL;
1230 } 1238 }
1239 /* Check the size of the buffer */
1240 if (size > vout->buffer_size) {
1241 v4l2_err(&vout->vid_dev->v4l2_dev,
1242 "insufficient memory [%lu] [%u]\n",
1243 size, vout->buffer_size);
1244 return -ENOMEM;
1245 }
1246
1231 q->bufs[i]->baddr = vma->vm_start; 1247 q->bufs[i]->baddr = vma->vm_start;
1232 1248
1233 vma->vm_flags |= VM_RESERVED; 1249 vma->vm_flags |= VM_RESERVED;
@@ -2391,7 +2407,7 @@ static int __init omap_vout_create_video_devices(struct platform_device *pdev)
2391 /* Register the Video device with V4L2 2407 /* Register the Video device with V4L2
2392 */ 2408 */
2393 vfd = vout->vfd; 2409 vfd = vout->vfd;
2394 if (video_register_device(vfd, VFL_TYPE_GRABBER, k + 1) < 0) { 2410 if (video_register_device(vfd, VFL_TYPE_GRABBER, -1) < 0) {
2395 dev_err(&pdev->dev, ": Could not register " 2411 dev_err(&pdev->dev, ": Could not register "
2396 "Video for Linux device\n"); 2412 "Video for Linux device\n");
2397 vfd->minor = -1; 2413 vfd->minor = -1;
diff --git a/drivers/media/video/omap/omap_voutlib.c b/drivers/media/video/omap/omap_voutlib.c
index 2aa6a76c5e59..8ae74817a110 100644
--- a/drivers/media/video/omap/omap_voutlib.c
+++ b/drivers/media/video/omap/omap_voutlib.c
@@ -193,7 +193,7 @@ int omap_vout_new_crop(struct v4l2_pix_format *pix,
193 return -EINVAL; 193 return -EINVAL;
194 194
195 if (cpu_is_omap24xx()) { 195 if (cpu_is_omap24xx()) {
196 if (crop->height != win->w.height) { 196 if (try_crop.height != win->w.height) {
197 /* If we're resizing vertically, we can't support a 197 /* If we're resizing vertically, we can't support a
198 * crop width wider than 768 pixels. 198 * crop width wider than 768 pixels.
199 */ 199 */
@@ -202,7 +202,7 @@ int omap_vout_new_crop(struct v4l2_pix_format *pix,
202 } 202 }
203 } 203 }
204 /* vertical resizing */ 204 /* vertical resizing */
205 vresize = (1024 * crop->height) / win->w.height; 205 vresize = (1024 * try_crop.height) / win->w.height;
206 if (cpu_is_omap24xx() && (vresize > 2048)) 206 if (cpu_is_omap24xx() && (vresize > 2048))
207 vresize = 2048; 207 vresize = 2048;
208 else if (cpu_is_omap34xx() && (vresize > 4096)) 208 else if (cpu_is_omap34xx() && (vresize > 4096))
@@ -221,7 +221,7 @@ int omap_vout_new_crop(struct v4l2_pix_format *pix,
221 try_crop.height = 2; 221 try_crop.height = 2;
222 } 222 }
223 /* horizontal resizing */ 223 /* horizontal resizing */
224 hresize = (1024 * crop->width) / win->w.width; 224 hresize = (1024 * try_crop.width) / win->w.width;
225 if (cpu_is_omap24xx() && (hresize > 2048)) 225 if (cpu_is_omap24xx() && (hresize > 2048))
226 hresize = 2048; 226 hresize = 2048;
227 else if (cpu_is_omap34xx() && (hresize > 4096)) 227 else if (cpu_is_omap34xx() && (hresize > 4096))
diff --git a/drivers/media/video/omap3isp/isp.c b/drivers/media/video/omap3isp/isp.c
index c9fd04ee70a8..94b6ed89e195 100644
--- a/drivers/media/video/omap3isp/isp.c
+++ b/drivers/media/video/omap3isp/isp.c
@@ -1748,7 +1748,7 @@ static int isp_register_entities(struct isp_device *isp)
1748 goto done; 1748 goto done;
1749 1749
1750 /* Register external entities */ 1750 /* Register external entities */
1751 for (subdevs = pdata->subdevs; subdevs->subdevs; ++subdevs) { 1751 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1752 struct v4l2_subdev *sensor; 1752 struct v4l2_subdev *sensor;
1753 struct media_entity *input; 1753 struct media_entity *input;
1754 unsigned int flags; 1754 unsigned int flags;
diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw.c b/drivers/media/video/pvrusb2/pvrusb2-hdw.c
index 9d0dd08f57f8..e98d38212791 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-hdw.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-hdw.c
@@ -3046,6 +3046,8 @@ static void pvr2_subdev_update(struct pvr2_hdw *hdw)
3046 if (hdw->input_dirty || hdw->audiomode_dirty || hdw->force_dirty) { 3046 if (hdw->input_dirty || hdw->audiomode_dirty || hdw->force_dirty) {
3047 struct v4l2_tuner vt; 3047 struct v4l2_tuner vt;
3048 memset(&vt, 0, sizeof(vt)); 3048 memset(&vt, 0, sizeof(vt));
3049 vt.type = (hdw->input_val == PVR2_CVAL_INPUT_RADIO) ?
3050 V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
3049 vt.audmode = hdw->audiomode_val; 3051 vt.audmode = hdw->audiomode_val;
3050 v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, s_tuner, &vt); 3052 v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, s_tuner, &vt);
3051 } 3053 }
@@ -5171,6 +5173,8 @@ void pvr2_hdw_status_poll(struct pvr2_hdw *hdw)
5171{ 5173{
5172 struct v4l2_tuner *vtp = &hdw->tuner_signal_info; 5174 struct v4l2_tuner *vtp = &hdw->tuner_signal_info;
5173 memset(vtp, 0, sizeof(*vtp)); 5175 memset(vtp, 0, sizeof(*vtp));
5176 vtp->type = (hdw->input_val == PVR2_CVAL_INPUT_RADIO) ?
5177 V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
5174 hdw->tuner_signal_stale = 0; 5178 hdw->tuner_signal_stale = 0;
5175 /* Note: There apparently is no replacement for VIDIOC_CROPCAP 5179 /* Note: There apparently is no replacement for VIDIOC_CROPCAP
5176 using v4l2-subdev - therefore we can't support that AT ALL right 5180 using v4l2-subdev - therefore we can't support that AT ALL right
diff --git a/drivers/media/video/pwc/pwc-ctrl.c b/drivers/media/video/pwc/pwc-ctrl.c
index 1593f8deb810..760b4de13adf 100644
--- a/drivers/media/video/pwc/pwc-ctrl.c
+++ b/drivers/media/video/pwc/pwc-ctrl.c
@@ -1414,7 +1414,7 @@ long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg)
1414 { 1414 {
1415 ARG_DEF(struct pwc_probe, probe) 1415 ARG_DEF(struct pwc_probe, probe)
1416 1416
1417 strcpy(ARGR(probe).name, pdev->vdev->name); 1417 strcpy(ARGR(probe).name, pdev->vdev.name);
1418 ARGR(probe).type = pdev->type; 1418 ARGR(probe).type = pdev->type;
1419 ARG_OUT(probe) 1419 ARG_OUT(probe)
1420 break; 1420 break;
diff --git a/drivers/media/video/pwc/pwc-if.c b/drivers/media/video/pwc/pwc-if.c
index 356cd42b593b..b0bde5a87c8a 100644
--- a/drivers/media/video/pwc/pwc-if.c
+++ b/drivers/media/video/pwc/pwc-if.c
@@ -40,7 +40,7 @@
40 Oh yes, convention: to disctinguish between all the various pointers to 40 Oh yes, convention: to disctinguish between all the various pointers to
41 device-structures, I use these names for the pointer variables: 41 device-structures, I use these names for the pointer variables:
42 udev: struct usb_device * 42 udev: struct usb_device *
43 vdev: struct video_device * 43 vdev: struct video_device (member of pwc_dev)
44 pdev: struct pwc_devive * 44 pdev: struct pwc_devive *
45*/ 45*/
46 46
@@ -152,6 +152,7 @@ static ssize_t pwc_video_read(struct file *file, char __user *buf,
152 size_t count, loff_t *ppos); 152 size_t count, loff_t *ppos);
153static unsigned int pwc_video_poll(struct file *file, poll_table *wait); 153static unsigned int pwc_video_poll(struct file *file, poll_table *wait);
154static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma); 154static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma);
155static void pwc_video_release(struct video_device *vfd);
155 156
156static const struct v4l2_file_operations pwc_fops = { 157static const struct v4l2_file_operations pwc_fops = {
157 .owner = THIS_MODULE, 158 .owner = THIS_MODULE,
@@ -164,42 +165,12 @@ static const struct v4l2_file_operations pwc_fops = {
164}; 165};
165static struct video_device pwc_template = { 166static struct video_device pwc_template = {
166 .name = "Philips Webcam", /* Filled in later */ 167 .name = "Philips Webcam", /* Filled in later */
167 .release = video_device_release, 168 .release = pwc_video_release,
168 .fops = &pwc_fops, 169 .fops = &pwc_fops,
170 .ioctl_ops = &pwc_ioctl_ops,
169}; 171};
170 172
171/***************************************************************************/ 173/***************************************************************************/
172
173/* Okay, this is some magic that I worked out and the reasoning behind it...
174
175 The biggest problem with any USB device is of course: "what to do
176 when the user unplugs the device while it is in use by an application?"
177 We have several options:
178 1) Curse them with the 7 plagues when they do (requires divine intervention)
179 2) Tell them not to (won't work: they'll do it anyway)
180 3) Oops the kernel (this will have a negative effect on a user's uptime)
181 4) Do something sensible.
182
183 Of course, we go for option 4.
184
185 It happens that this device will be linked to two times, once from
186 usb_device and once from the video_device in their respective 'private'
187 pointers. This is done when the device is probed() and all initialization
188 succeeded. The pwc_device struct links back to both structures.
189
190 When a device is unplugged while in use it will be removed from the
191 list of known USB devices; I also de-register it as a V4L device, but
192 unfortunately I can't free the memory since the struct is still in use
193 by the file descriptor. This free-ing is then deferend until the first
194 opportunity. Crude, but it works.
195
196 A small 'advantage' is that if a user unplugs the cam and plugs it back
197 in, it should get assigned the same video device minor, but unfortunately
198 it's non-trivial to re-link the cam back to the video device... (that
199 would surely be magic! :))
200*/
201
202/***************************************************************************/
203/* Private functions */ 174/* Private functions */
204 175
205/* Here we want the physical address of the memory. 176/* Here we want the physical address of the memory.
@@ -1016,16 +987,15 @@ static ssize_t show_snapshot_button_status(struct device *class_dev,
1016static DEVICE_ATTR(button, S_IRUGO | S_IWUSR, show_snapshot_button_status, 987static DEVICE_ATTR(button, S_IRUGO | S_IWUSR, show_snapshot_button_status,
1017 NULL); 988 NULL);
1018 989
1019static int pwc_create_sysfs_files(struct video_device *vdev) 990static int pwc_create_sysfs_files(struct pwc_device *pdev)
1020{ 991{
1021 struct pwc_device *pdev = video_get_drvdata(vdev);
1022 int rc; 992 int rc;
1023 993
1024 rc = device_create_file(&vdev->dev, &dev_attr_button); 994 rc = device_create_file(&pdev->vdev.dev, &dev_attr_button);
1025 if (rc) 995 if (rc)
1026 goto err; 996 goto err;
1027 if (pdev->features & FEATURE_MOTOR_PANTILT) { 997 if (pdev->features & FEATURE_MOTOR_PANTILT) {
1028 rc = device_create_file(&vdev->dev, &dev_attr_pan_tilt); 998 rc = device_create_file(&pdev->vdev.dev, &dev_attr_pan_tilt);
1029 if (rc) 999 if (rc)
1030 goto err_button; 1000 goto err_button;
1031 } 1001 }
@@ -1033,19 +1003,17 @@ static int pwc_create_sysfs_files(struct video_device *vdev)
1033 return 0; 1003 return 0;
1034 1004
1035err_button: 1005err_button:
1036 device_remove_file(&vdev->dev, &dev_attr_button); 1006 device_remove_file(&pdev->vdev.dev, &dev_attr_button);
1037err: 1007err:
1038 PWC_ERROR("Could not create sysfs files.\n"); 1008 PWC_ERROR("Could not create sysfs files.\n");
1039 return rc; 1009 return rc;
1040} 1010}
1041 1011
1042static void pwc_remove_sysfs_files(struct video_device *vdev) 1012static void pwc_remove_sysfs_files(struct pwc_device *pdev)
1043{ 1013{
1044 struct pwc_device *pdev = video_get_drvdata(vdev);
1045
1046 if (pdev->features & FEATURE_MOTOR_PANTILT) 1014 if (pdev->features & FEATURE_MOTOR_PANTILT)
1047 device_remove_file(&vdev->dev, &dev_attr_pan_tilt); 1015 device_remove_file(&pdev->vdev.dev, &dev_attr_pan_tilt);
1048 device_remove_file(&vdev->dev, &dev_attr_button); 1016 device_remove_file(&pdev->vdev.dev, &dev_attr_button);
1049} 1017}
1050 1018
1051#ifdef CONFIG_USB_PWC_DEBUG 1019#ifdef CONFIG_USB_PWC_DEBUG
@@ -1106,7 +1074,7 @@ static int pwc_video_open(struct file *file)
1106 if (ret >= 0) 1074 if (ret >= 0)
1107 { 1075 {
1108 PWC_DEBUG_OPEN("This %s camera is equipped with a %s (%d).\n", 1076 PWC_DEBUG_OPEN("This %s camera is equipped with a %s (%d).\n",
1109 pdev->vdev->name, 1077 pdev->vdev.name,
1110 pwc_sensor_type_to_string(i), i); 1078 pwc_sensor_type_to_string(i), i);
1111 } 1079 }
1112 } 1080 }
@@ -1180,16 +1148,15 @@ static int pwc_video_open(struct file *file)
1180 return 0; 1148 return 0;
1181} 1149}
1182 1150
1183 1151static void pwc_video_release(struct video_device *vfd)
1184static void pwc_cleanup(struct pwc_device *pdev)
1185{ 1152{
1186 pwc_remove_sysfs_files(pdev->vdev); 1153 struct pwc_device *pdev = container_of(vfd, struct pwc_device, vdev);
1187 video_unregister_device(pdev->vdev); 1154 int hint;
1188 1155
1189#ifdef CONFIG_USB_PWC_INPUT_EVDEV 1156 /* search device_hint[] table if we occupy a slot, by any chance */
1190 if (pdev->button_dev) 1157 for (hint = 0; hint < MAX_DEV_HINTS; hint++)
1191 input_unregister_device(pdev->button_dev); 1158 if (device_hint[hint].pdev == pdev)
1192#endif 1159 device_hint[hint].pdev = NULL;
1193 1160
1194 kfree(pdev); 1161 kfree(pdev);
1195} 1162}
@@ -1199,7 +1166,7 @@ static int pwc_video_close(struct file *file)
1199{ 1166{
1200 struct video_device *vdev = file->private_data; 1167 struct video_device *vdev = file->private_data;
1201 struct pwc_device *pdev; 1168 struct pwc_device *pdev;
1202 int i, hint; 1169 int i;
1203 1170
1204 PWC_DEBUG_OPEN(">> video_close called(vdev = 0x%p).\n", vdev); 1171 PWC_DEBUG_OPEN(">> video_close called(vdev = 0x%p).\n", vdev);
1205 1172
@@ -1234,12 +1201,6 @@ static int pwc_video_close(struct file *file)
1234 } 1201 }
1235 pdev->vopen--; 1202 pdev->vopen--;
1236 PWC_DEBUG_OPEN("<< video_close() vopen=%d\n", pdev->vopen); 1203 PWC_DEBUG_OPEN("<< video_close() vopen=%d\n", pdev->vopen);
1237 } else {
1238 pwc_cleanup(pdev);
1239 /* search device_hint[] table if we occupy a slot, by any chance */
1240 for (hint = 0; hint < MAX_DEV_HINTS; hint++)
1241 if (device_hint[hint].pdev == pdev)
1242 device_hint[hint].pdev = NULL;
1243 } 1204 }
1244 1205
1245 return 0; 1206 return 0;
@@ -1715,19 +1676,12 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1715 init_waitqueue_head(&pdev->frameq); 1676 init_waitqueue_head(&pdev->frameq);
1716 pdev->vcompression = pwc_preferred_compression; 1677 pdev->vcompression = pwc_preferred_compression;
1717 1678
1718 /* Allocate video_device structure */ 1679 /* Init video_device structure */
1719 pdev->vdev = video_device_alloc(); 1680 memcpy(&pdev->vdev, &pwc_template, sizeof(pwc_template));
1720 if (!pdev->vdev) { 1681 pdev->vdev.parent = &intf->dev;
1721 PWC_ERROR("Err, cannot allocate video_device struture. Failing probe."); 1682 pdev->vdev.lock = &pdev->modlock;
1722 rc = -ENOMEM; 1683 strcpy(pdev->vdev.name, name);
1723 goto err_free_mem; 1684 video_set_drvdata(&pdev->vdev, pdev);
1724 }
1725 memcpy(pdev->vdev, &pwc_template, sizeof(pwc_template));
1726 pdev->vdev->parent = &intf->dev;
1727 pdev->vdev->lock = &pdev->modlock;
1728 pdev->vdev->ioctl_ops = &pwc_ioctl_ops;
1729 strcpy(pdev->vdev->name, name);
1730 video_set_drvdata(pdev->vdev, pdev);
1731 1685
1732 pdev->release = le16_to_cpu(udev->descriptor.bcdDevice); 1686 pdev->release = le16_to_cpu(udev->descriptor.bcdDevice);
1733 PWC_DEBUG_PROBE("Release: %04x\n", pdev->release); 1687 PWC_DEBUG_PROBE("Release: %04x\n", pdev->release);
@@ -1746,8 +1700,6 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1746 } 1700 }
1747 } 1701 }
1748 1702
1749 pdev->vdev->release = video_device_release;
1750
1751 /* occupy slot */ 1703 /* occupy slot */
1752 if (hint < MAX_DEV_HINTS) 1704 if (hint < MAX_DEV_HINTS)
1753 device_hint[hint].pdev = pdev; 1705 device_hint[hint].pdev = pdev;
@@ -1759,16 +1711,16 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1759 pwc_set_leds(pdev, 0, 0); 1711 pwc_set_leds(pdev, 0, 0);
1760 pwc_camera_power(pdev, 0); 1712 pwc_camera_power(pdev, 0);
1761 1713
1762 rc = video_register_device(pdev->vdev, VFL_TYPE_GRABBER, video_nr); 1714 rc = video_register_device(&pdev->vdev, VFL_TYPE_GRABBER, video_nr);
1763 if (rc < 0) { 1715 if (rc < 0) {
1764 PWC_ERROR("Failed to register as video device (%d).\n", rc); 1716 PWC_ERROR("Failed to register as video device (%d).\n", rc);
1765 goto err_video_release; 1717 goto err_free_mem;
1766 } 1718 }
1767 rc = pwc_create_sysfs_files(pdev->vdev); 1719 rc = pwc_create_sysfs_files(pdev);
1768 if (rc) 1720 if (rc)
1769 goto err_video_unreg; 1721 goto err_video_unreg;
1770 1722
1771 PWC_INFO("Registered as %s.\n", video_device_node_name(pdev->vdev)); 1723 PWC_INFO("Registered as %s.\n", video_device_node_name(&pdev->vdev));
1772 1724
1773#ifdef CONFIG_USB_PWC_INPUT_EVDEV 1725#ifdef CONFIG_USB_PWC_INPUT_EVDEV
1774 /* register webcam snapshot button input device */ 1726 /* register webcam snapshot button input device */
@@ -1776,7 +1728,7 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1776 if (!pdev->button_dev) { 1728 if (!pdev->button_dev) {
1777 PWC_ERROR("Err, insufficient memory for webcam snapshot button device."); 1729 PWC_ERROR("Err, insufficient memory for webcam snapshot button device.");
1778 rc = -ENOMEM; 1730 rc = -ENOMEM;
1779 pwc_remove_sysfs_files(pdev->vdev); 1731 pwc_remove_sysfs_files(pdev);
1780 goto err_video_unreg; 1732 goto err_video_unreg;
1781 } 1733 }
1782 1734
@@ -1794,7 +1746,7 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1794 if (rc) { 1746 if (rc) {
1795 input_free_device(pdev->button_dev); 1747 input_free_device(pdev->button_dev);
1796 pdev->button_dev = NULL; 1748 pdev->button_dev = NULL;
1797 pwc_remove_sysfs_files(pdev->vdev); 1749 pwc_remove_sysfs_files(pdev);
1798 goto err_video_unreg; 1750 goto err_video_unreg;
1799 } 1751 }
1800#endif 1752#endif
@@ -1804,10 +1756,7 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1804err_video_unreg: 1756err_video_unreg:
1805 if (hint < MAX_DEV_HINTS) 1757 if (hint < MAX_DEV_HINTS)
1806 device_hint[hint].pdev = NULL; 1758 device_hint[hint].pdev = NULL;
1807 video_unregister_device(pdev->vdev); 1759 video_unregister_device(&pdev->vdev);
1808 pdev->vdev = NULL; /* So we don't try to release it below */
1809err_video_release:
1810 video_device_release(pdev->vdev);
1811err_free_mem: 1760err_free_mem:
1812 kfree(pdev); 1761 kfree(pdev);
1813 return rc; 1762 return rc;
@@ -1816,10 +1765,8 @@ err_free_mem:
1816/* The user yanked out the cable... */ 1765/* The user yanked out the cable... */
1817static void usb_pwc_disconnect(struct usb_interface *intf) 1766static void usb_pwc_disconnect(struct usb_interface *intf)
1818{ 1767{
1819 struct pwc_device *pdev; 1768 struct pwc_device *pdev = usb_get_intfdata(intf);
1820 int hint;
1821 1769
1822 pdev = usb_get_intfdata (intf);
1823 mutex_lock(&pdev->modlock); 1770 mutex_lock(&pdev->modlock);
1824 usb_set_intfdata (intf, NULL); 1771 usb_set_intfdata (intf, NULL);
1825 if (pdev == NULL) { 1772 if (pdev == NULL) {
@@ -1836,30 +1783,25 @@ static void usb_pwc_disconnect(struct usb_interface *intf)
1836 } 1783 }
1837 1784
1838 /* We got unplugged; this is signalled by an EPIPE error code */ 1785 /* We got unplugged; this is signalled by an EPIPE error code */
1839 if (pdev->vopen) { 1786 pdev->error_status = EPIPE;
1840 PWC_INFO("Disconnected while webcam is in use!\n"); 1787 pdev->unplugged = 1;
1841 pdev->error_status = EPIPE;
1842 }
1843 1788
1844 /* Alert waiting processes */ 1789 /* Alert waiting processes */
1845 wake_up_interruptible(&pdev->frameq); 1790 wake_up_interruptible(&pdev->frameq);
1846 /* Wait until device is closed */
1847 if (pdev->vopen) {
1848 pdev->unplugged = 1;
1849 pwc_iso_stop(pdev);
1850 } else {
1851 /* Device is closed, so we can safely unregister it */
1852 PWC_DEBUG_PROBE("Unregistering video device in disconnect().\n");
1853 1791
1854disconnect_out: 1792 /* No need to keep the urbs around after disconnection */
1855 /* search device_hint[] table if we occupy a slot, by any chance */ 1793 pwc_isoc_cleanup(pdev);
1856 for (hint = 0; hint < MAX_DEV_HINTS; hint++)
1857 if (device_hint[hint].pdev == pdev)
1858 device_hint[hint].pdev = NULL;
1859 }
1860 1794
1795disconnect_out:
1861 mutex_unlock(&pdev->modlock); 1796 mutex_unlock(&pdev->modlock);
1862 pwc_cleanup(pdev); 1797
1798 pwc_remove_sysfs_files(pdev);
1799 video_unregister_device(&pdev->vdev);
1800
1801#ifdef CONFIG_USB_PWC_INPUT_EVDEV
1802 if (pdev->button_dev)
1803 input_unregister_device(pdev->button_dev);
1804#endif
1863} 1805}
1864 1806
1865 1807
diff --git a/drivers/media/video/pwc/pwc.h b/drivers/media/video/pwc/pwc.h
index e947766337d6..083f8b15df73 100644
--- a/drivers/media/video/pwc/pwc.h
+++ b/drivers/media/video/pwc/pwc.h
@@ -162,9 +162,9 @@ struct pwc_imgbuf
162 162
163struct pwc_device 163struct pwc_device
164{ 164{
165 struct video_device *vdev; 165 struct video_device vdev;
166 166
167 /* Pointer to our usb_device */ 167 /* Pointer to our usb_device, may be NULL after unplug */
168 struct usb_device *udev; 168 struct usb_device *udev;
169 169
170 int type; /* type of cam (645, 646, 675, 680, 690, 720, 730, 740, 750) */ 170 int type; /* type of cam (645, 646, 675, 680, 690, 720, 730, 740, 750) */
diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c
index d142b40ea64e..81b4a826ee5e 100644
--- a/drivers/media/video/s5p-fimc/fimc-capture.c
+++ b/drivers/media/video/s5p-fimc/fimc-capture.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Samsung S5P SoC series camera interface (camera capture) driver 2 * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
3 * 3 *
4 * Copyright (c) 2010 Samsung Electronics Co., Ltd 4 * Copyright (C) 2010 - 2011 Samsung Electronics Co., Ltd.
5 * Author: Sylwester Nawrocki, <s.nawrocki@samsung.com> 5 * Author: Sylwester Nawrocki, <s.nawrocki@samsung.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
@@ -262,12 +262,7 @@ static unsigned int get_plane_size(struct fimc_frame *fr, unsigned int plane)
262{ 262{
263 if (!fr || plane >= fr->fmt->memplanes) 263 if (!fr || plane >= fr->fmt->memplanes)
264 return 0; 264 return 0;
265
266 dbg("%s: w: %d. h: %d. depth[%d]: %d",
267 __func__, fr->width, fr->height, plane, fr->fmt->depth[plane]);
268
269 return fr->f_width * fr->f_height * fr->fmt->depth[plane] / 8; 265 return fr->f_width * fr->f_height * fr->fmt->depth[plane] / 8;
270
271} 266}
272 267
273static int queue_setup(struct vb2_queue *vq, unsigned int *num_buffers, 268static int queue_setup(struct vb2_queue *vq, unsigned int *num_buffers,
@@ -283,24 +278,14 @@ static int queue_setup(struct vb2_queue *vq, unsigned int *num_buffers,
283 278
284 *num_planes = fmt->memplanes; 279 *num_planes = fmt->memplanes;
285 280
286 dbg("%s, buffer count=%d, plane count=%d",
287 __func__, *num_buffers, *num_planes);
288
289 for (i = 0; i < fmt->memplanes; i++) { 281 for (i = 0; i < fmt->memplanes; i++) {
290 sizes[i] = get_plane_size(&ctx->d_frame, i); 282 sizes[i] = get_plane_size(&ctx->d_frame, i);
291 dbg("plane: %u, plane_size: %lu", i, sizes[i]);
292 allocators[i] = ctx->fimc_dev->alloc_ctx; 283 allocators[i] = ctx->fimc_dev->alloc_ctx;
293 } 284 }
294 285
295 return 0; 286 return 0;
296} 287}
297 288
298static int buffer_init(struct vb2_buffer *vb)
299{
300 /* TODO: */
301 return 0;
302}
303
304static int buffer_prepare(struct vb2_buffer *vb) 289static int buffer_prepare(struct vb2_buffer *vb)
305{ 290{
306 struct vb2_queue *vq = vb->vb2_queue; 291 struct vb2_queue *vq = vb->vb2_queue;
@@ -380,7 +365,6 @@ static struct vb2_ops fimc_capture_qops = {
380 .queue_setup = queue_setup, 365 .queue_setup = queue_setup,
381 .buf_prepare = buffer_prepare, 366 .buf_prepare = buffer_prepare,
382 .buf_queue = buffer_queue, 367 .buf_queue = buffer_queue,
383 .buf_init = buffer_init,
384 .wait_prepare = fimc_unlock, 368 .wait_prepare = fimc_unlock,
385 .wait_finish = fimc_lock, 369 .wait_finish = fimc_lock,
386 .start_streaming = start_streaming, 370 .start_streaming = start_streaming,
@@ -903,6 +887,7 @@ err_vd_reg:
903err_v4l2_reg: 887err_v4l2_reg:
904 v4l2_device_unregister(v4l2_dev); 888 v4l2_device_unregister(v4l2_dev);
905err_info: 889err_info:
890 kfree(ctx);
906 dev_err(&fimc->pdev->dev, "failed to install\n"); 891 dev_err(&fimc->pdev->dev, "failed to install\n");
907 return ret; 892 return ret;
908} 893}
diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c
index dc91a8511af6..bdf19ada9172 100644
--- a/drivers/media/video/s5p-fimc/fimc-core.c
+++ b/drivers/media/video/s5p-fimc/fimc-core.c
@@ -1,9 +1,8 @@
1/* 1/*
2 * S5P camera interface (video postprocessor) driver 2 * Samsung S5P/EXYNOS4 SoC series camera interface (video postprocessor) driver
3 * 3 *
4 * Copyright (c) 2010 Samsung Electronics Co., Ltd 4 * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd.
5 * 5 * Contact: Sylwester Nawrocki, <s.nawrocki@samsung.com>
6 * Sylwester Nawrocki, <s.nawrocki@samsung.com>
7 * 6 *
8 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published 8 * it under the terms of the GNU General Public License as published
@@ -42,7 +41,6 @@ static struct fimc_fmt fimc_formats[] = {
42 .color = S5P_FIMC_RGB565, 41 .color = S5P_FIMC_RGB565,
43 .memplanes = 1, 42 .memplanes = 1,
44 .colplanes = 1, 43 .colplanes = 1,
45 .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_BE,
46 .flags = FMT_FLAGS_M2M, 44 .flags = FMT_FLAGS_M2M,
47 }, { 45 }, {
48 .name = "BGR666", 46 .name = "BGR666",
@@ -232,11 +230,7 @@ static int fimc_get_scaler_factor(u32 src, u32 tar, u32 *ratio, u32 *shift)
232 return 0; 230 return 0;
233 } 231 }
234 } 232 }
235
236 *shift = 0, *ratio = 1; 233 *shift = 0, *ratio = 1;
237
238 dbg("s: %d, t: %d, shift: %d, ratio: %d",
239 src, tar, *shift, *ratio);
240 return 0; 234 return 0;
241} 235}
242 236
@@ -268,10 +262,8 @@ int fimc_set_scaler_info(struct fimc_ctx *ctx)
268 err("invalid source size: %d x %d", sx, sy); 262 err("invalid source size: %d x %d", sx, sy);
269 return -EINVAL; 263 return -EINVAL;
270 } 264 }
271
272 sc->real_width = sx; 265 sc->real_width = sx;
273 sc->real_height = sy; 266 sc->real_height = sy;
274 dbg("sx= %d, sy= %d, tx= %d, ty= %d", sx, sy, tx, ty);
275 267
276 ret = fimc_get_scaler_factor(sx, tx, &sc->pre_hratio, &sc->hfactor); 268 ret = fimc_get_scaler_factor(sx, tx, &sc->pre_hratio, &sc->hfactor);
277 if (ret) 269 if (ret)
@@ -711,22 +703,18 @@ static int fimc_queue_setup(struct vb2_queue *vq, unsigned int *num_buffers,
711 f = ctx_get_frame(ctx, vq->type); 703 f = ctx_get_frame(ctx, vq->type);
712 if (IS_ERR(f)) 704 if (IS_ERR(f))
713 return PTR_ERR(f); 705 return PTR_ERR(f);
714
715 /* 706 /*
716 * Return number of non-contigous planes (plane buffers) 707 * Return number of non-contigous planes (plane buffers)
717 * depending on the configured color format. 708 * depending on the configured color format.
718 */ 709 */
719 if (f->fmt) 710 if (!f->fmt)
720 *num_planes = f->fmt->memplanes; 711 return -EINVAL;
721 712
713 *num_planes = f->fmt->memplanes;
722 for (i = 0; i < f->fmt->memplanes; i++) { 714 for (i = 0; i < f->fmt->memplanes; i++) {
723 sizes[i] = (f->width * f->height * f->fmt->depth[i]) >> 3; 715 sizes[i] = (f->f_width * f->f_height * f->fmt->depth[i]) / 8;
724 allocators[i] = ctx->fimc_dev->alloc_ctx; 716 allocators[i] = ctx->fimc_dev->alloc_ctx;
725 } 717 }
726
727 if (*num_buffers == 0)
728 *num_buffers = 1;
729
730 return 0; 718 return 0;
731} 719}
732 720
@@ -852,7 +840,7 @@ struct fimc_fmt *find_format(struct v4l2_format *f, unsigned int mask)
852 840
853 for (i = 0; i < ARRAY_SIZE(fimc_formats); ++i) { 841 for (i = 0; i < ARRAY_SIZE(fimc_formats); ++i) {
854 fmt = &fimc_formats[i]; 842 fmt = &fimc_formats[i];
855 if (fmt->fourcc == f->fmt.pix.pixelformat && 843 if (fmt->fourcc == f->fmt.pix_mp.pixelformat &&
856 (fmt->flags & mask)) 844 (fmt->flags & mask))
857 break; 845 break;
858 } 846 }
diff --git a/drivers/media/video/s5p-fimc/fimc-core.h b/drivers/media/video/s5p-fimc/fimc-core.h
index 3beb1e5320ce..1f70772daaf0 100644
--- a/drivers/media/video/s5p-fimc/fimc-core.h
+++ b/drivers/media/video/s5p-fimc/fimc-core.h
@@ -1,7 +1,5 @@
1/* 1/*
2 * Copyright (c) 2010 Samsung Electronics 2 * Copyright (C) 2010 - 2011 Samsung Electronics Co., Ltd.
3 *
4 * Sylwester Nawrocki, <s.nawrocki@samsung.com>
5 * 3 *
6 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
@@ -135,9 +133,10 @@ enum fimc_color_fmt {
135 * @name: format description 133 * @name: format description
136 * @fourcc: the fourcc code for this format, 0 if not applicable 134 * @fourcc: the fourcc code for this format, 0 if not applicable
137 * @color: the corresponding fimc_color_fmt 135 * @color: the corresponding fimc_color_fmt
138 * @depth: per plane driver's private 'number of bits per pixel'
139 * @memplanes: number of physically non-contiguous data planes 136 * @memplanes: number of physically non-contiguous data planes
140 * @colplanes: number of physically contiguous data planes 137 * @colplanes: number of physically contiguous data planes
138 * @depth: per plane driver's private 'number of bits per pixel'
139 * @flags: flags indicating which operation mode format applies to
141 */ 140 */
142struct fimc_fmt { 141struct fimc_fmt {
143 enum v4l2_mbus_pixelcode mbus_code; 142 enum v4l2_mbus_pixelcode mbus_code;
@@ -171,7 +170,7 @@ struct fimc_dma_offset {
171}; 170};
172 171
173/** 172/**
174 * struct fimc_effect - the configuration data for the "Arbitrary" image effect 173 * struct fimc_effect - color effect information
175 * @type: effect type 174 * @type: effect type
176 * @pat_cb: cr value when type is "arbitrary" 175 * @pat_cb: cr value when type is "arbitrary"
177 * @pat_cr: cr value when type is "arbitrary" 176 * @pat_cr: cr value when type is "arbitrary"
@@ -184,7 +183,6 @@ struct fimc_effect {
184 183
185/** 184/**
186 * struct fimc_scaler - the configuration data for FIMC inetrnal scaler 185 * struct fimc_scaler - the configuration data for FIMC inetrnal scaler
187 *
188 * @scaleup_h: flag indicating scaling up horizontally 186 * @scaleup_h: flag indicating scaling up horizontally
189 * @scaleup_v: flag indicating scaling up vertically 187 * @scaleup_v: flag indicating scaling up vertically
190 * @copy_mode: flag indicating transparent DMA transfer (no scaling 188 * @copy_mode: flag indicating transparent DMA transfer (no scaling
@@ -220,7 +218,6 @@ struct fimc_scaler {
220 218
221/** 219/**
222 * struct fimc_addr - the FIMC physical address set for DMA 220 * struct fimc_addr - the FIMC physical address set for DMA
223 *
224 * @y: luminance plane physical address 221 * @y: luminance plane physical address
225 * @cb: Cb plane physical address 222 * @cb: Cb plane physical address
226 * @cr: Cr plane physical address 223 * @cr: Cr plane physical address
@@ -234,6 +231,7 @@ struct fimc_addr {
234/** 231/**
235 * struct fimc_vid_buffer - the driver's video buffer 232 * struct fimc_vid_buffer - the driver's video buffer
236 * @vb: v4l videobuf buffer 233 * @vb: v4l videobuf buffer
234 * @list: linked list structure for buffer queue
237 * @paddr: precalculated physical address set 235 * @paddr: precalculated physical address set
238 * @index: buffer index for the output DMA engine 236 * @index: buffer index for the output DMA engine
239 */ 237 */
@@ -254,11 +252,10 @@ struct fimc_vid_buffer {
254 * @offs_v: image vertical pixel offset 252 * @offs_v: image vertical pixel offset
255 * @width: image pixel width 253 * @width: image pixel width
256 * @height: image pixel weight 254 * @height: image pixel weight
257 * @paddr: image frame buffer physical addresses
258 * @buf_cnt: number of buffers depending on a color format
259 * @payload: image size in bytes (w x h x bpp) 255 * @payload: image size in bytes (w x h x bpp)
260 * @color: color format 256 * @paddr: image frame buffer physical addresses
261 * @dma_offset: DMA offset in bytes 257 * @dma_offset: DMA offset in bytes
258 * @fmt: fimc color format pointer
262 */ 259 */
263struct fimc_frame { 260struct fimc_frame {
264 u32 f_width; 261 u32 f_width;
@@ -390,21 +387,22 @@ struct fimc_ctx;
390 387
391/** 388/**
392 * struct fimc_dev - abstraction for FIMC entity 389 * struct fimc_dev - abstraction for FIMC entity
393 *
394 * @slock: the spinlock protecting this data structure 390 * @slock: the spinlock protecting this data structure
395 * @lock: the mutex protecting this data structure 391 * @lock: the mutex protecting this data structure
396 * @pdev: pointer to the FIMC platform device 392 * @pdev: pointer to the FIMC platform device
397 * @pdata: pointer to the device platform data 393 * @pdata: pointer to the device platform data
394 * @variant: the IP variant information
398 * @id: FIMC device index (0..FIMC_MAX_DEVS) 395 * @id: FIMC device index (0..FIMC_MAX_DEVS)
399 * @num_clocks: the number of clocks managed by this device instance 396 * @num_clocks: the number of clocks managed by this device instance
400 * @clock[]: the clocks required for FIMC operation 397 * @clock: clocks required for FIMC operation
401 * @regs: the mapped hardware registers 398 * @regs: the mapped hardware registers
402 * @regs_res: the resource claimed for IO registers 399 * @regs_res: the resource claimed for IO registers
403 * @irq: interrupt number of the FIMC subdevice 400 * @irq: FIMC interrupt number
404 * @irq_queue: 401 * @irq_queue: interrupt handler waitqueue
405 * @m2m: memory-to-memory V4L2 device information 402 * @m2m: memory-to-memory V4L2 device information
406 * @vid_cap: camera capture device information 403 * @vid_cap: camera capture device information
407 * @state: flags used to synchronize m2m and capture mode operation 404 * @state: flags used to synchronize m2m and capture mode operation
405 * @alloc_ctx: videobuf2 memory allocator context
408 */ 406 */
409struct fimc_dev { 407struct fimc_dev {
410 spinlock_t slock; 408 spinlock_t slock;
@@ -427,8 +425,7 @@ struct fimc_dev {
427 425
428/** 426/**
429 * fimc_ctx - the device context data 427 * fimc_ctx - the device context data
430 * 428 * @slock: spinlock protecting this data structure
431 * @lock: mutex protecting this data structure
432 * @s_frame: source frame properties 429 * @s_frame: source frame properties
433 * @d_frame: destination frame properties 430 * @d_frame: destination frame properties
434 * @out_order_1p: output 1-plane YCBCR order 431 * @out_order_1p: output 1-plane YCBCR order
diff --git a/drivers/media/video/saa7134/saa7134-input.c b/drivers/media/video/saa7134/saa7134-input.c
index ff6c0e97563e..d4ee24bf6928 100644
--- a/drivers/media/video/saa7134/saa7134-input.c
+++ b/drivers/media/video/saa7134/saa7134-input.c
@@ -963,7 +963,7 @@ static int saa7134_raw_decode_irq(struct saa7134_dev *dev)
963 * to work with other protocols. 963 * to work with other protocols.
964 */ 964 */
965 if (!ir->active) { 965 if (!ir->active) {
966 timeout = jiffies + jiffies_to_msecs(15); 966 timeout = jiffies + msecs_to_jiffies(15);
967 mod_timer(&ir->timer, timeout); 967 mod_timer(&ir->timer, timeout);
968 ir->active = true; 968 ir->active = true;
969 } 969 }
diff --git a/drivers/media/video/tuner-core.c b/drivers/media/video/tuner-core.c
index 9363ed91a4cb..cfa9f7efe93d 100644
--- a/drivers/media/video/tuner-core.c
+++ b/drivers/media/video/tuner-core.c
@@ -724,19 +724,15 @@ static inline int check_mode(struct tuner *t, enum v4l2_tuner_type mode)
724} 724}
725 725
726/** 726/**
727 * set_mode_freq - Switch tuner to other mode. 727 * set_mode - Switch tuner to other mode.
728 * @client: struct i2c_client pointer
729 * @t: a pointer to the module's internal struct_tuner 728 * @t: a pointer to the module's internal struct_tuner
730 * @mode: enum v4l2_type (radio or TV) 729 * @mode: enum v4l2_type (radio or TV)
731 * @freq: frequency to set (0 means to use the previous one)
732 * 730 *
733 * If tuner doesn't support the needed mode (radio or TV), prints a 731 * If tuner doesn't support the needed mode (radio or TV), prints a
734 * debug message and returns -EINVAL, changing its state to standby. 732 * debug message and returns -EINVAL, changing its state to standby.
735 * Otherwise, changes the state and sets frequency to the last value, if 733 * Otherwise, changes the mode and returns 0.
736 * the tuner can sleep or if it supports both Radio and TV.
737 */ 734 */
738static int set_mode_freq(struct i2c_client *client, struct tuner *t, 735static int set_mode(struct tuner *t, enum v4l2_tuner_type mode)
739 enum v4l2_tuner_type mode, unsigned int freq)
740{ 736{
741 struct analog_demod_ops *analog_ops = &t->fe.ops.analog_ops; 737 struct analog_demod_ops *analog_ops = &t->fe.ops.analog_ops;
742 738
@@ -752,17 +748,27 @@ static int set_mode_freq(struct i2c_client *client, struct tuner *t,
752 t->mode = mode; 748 t->mode = mode;
753 tuner_dbg("Changing to mode %d\n", mode); 749 tuner_dbg("Changing to mode %d\n", mode);
754 } 750 }
751 return 0;
752}
753
754/**
755 * set_freq - Set the tuner to the desired frequency.
756 * @t: a pointer to the module's internal struct_tuner
757 * @freq: frequency to set (0 means to use the current frequency)
758 */
759static void set_freq(struct tuner *t, unsigned int freq)
760{
761 struct i2c_client *client = v4l2_get_subdevdata(&t->sd);
762
755 if (t->mode == V4L2_TUNER_RADIO) { 763 if (t->mode == V4L2_TUNER_RADIO) {
756 if (freq) 764 if (!freq)
757 t->radio_freq = freq; 765 freq = t->radio_freq;
758 set_radio_freq(client, t->radio_freq); 766 set_radio_freq(client, freq);
759 } else { 767 } else {
760 if (freq) 768 if (!freq)
761 t->tv_freq = freq; 769 freq = t->tv_freq;
762 set_tv_freq(client, t->tv_freq); 770 set_tv_freq(client, freq);
763 } 771 }
764
765 return 0;
766} 772}
767 773
768/* 774/*
@@ -817,7 +823,8 @@ static void set_tv_freq(struct i2c_client *c, unsigned int freq)
817/** 823/**
818 * tuner_fixup_std - force a given video standard variant 824 * tuner_fixup_std - force a given video standard variant
819 * 825 *
820 * @t: tuner internal struct 826 * @t: tuner internal struct
827 * @std: TV standard
821 * 828 *
822 * A few devices or drivers have problem to detect some standard variations. 829 * A few devices or drivers have problem to detect some standard variations.
823 * On other operational systems, the drivers generally have a per-country 830 * On other operational systems, the drivers generally have a per-country
@@ -827,57 +834,39 @@ static void set_tv_freq(struct i2c_client *c, unsigned int freq)
827 * to distinguish all video standard variations, a modprobe parameter can 834 * to distinguish all video standard variations, a modprobe parameter can
828 * be used to force a video standard match. 835 * be used to force a video standard match.
829 */ 836 */
830static int tuner_fixup_std(struct tuner *t) 837static v4l2_std_id tuner_fixup_std(struct tuner *t, v4l2_std_id std)
831{ 838{
832 if ((t->std & V4L2_STD_PAL) == V4L2_STD_PAL) { 839 if (pal[0] != '-' && (std & V4L2_STD_PAL) == V4L2_STD_PAL) {
833 switch (pal[0]) { 840 switch (pal[0]) {
834 case '6': 841 case '6':
835 tuner_dbg("insmod fixup: PAL => PAL-60\n"); 842 return V4L2_STD_PAL_60;
836 t->std = V4L2_STD_PAL_60;
837 break;
838 case 'b': 843 case 'b':
839 case 'B': 844 case 'B':
840 case 'g': 845 case 'g':
841 case 'G': 846 case 'G':
842 tuner_dbg("insmod fixup: PAL => PAL-BG\n"); 847 return V4L2_STD_PAL_BG;
843 t->std = V4L2_STD_PAL_BG;
844 break;
845 case 'i': 848 case 'i':
846 case 'I': 849 case 'I':
847 tuner_dbg("insmod fixup: PAL => PAL-I\n"); 850 return V4L2_STD_PAL_I;
848 t->std = V4L2_STD_PAL_I;
849 break;
850 case 'd': 851 case 'd':
851 case 'D': 852 case 'D':
852 case 'k': 853 case 'k':
853 case 'K': 854 case 'K':
854 tuner_dbg("insmod fixup: PAL => PAL-DK\n"); 855 return V4L2_STD_PAL_DK;
855 t->std = V4L2_STD_PAL_DK;
856 break;
857 case 'M': 856 case 'M':
858 case 'm': 857 case 'm':
859 tuner_dbg("insmod fixup: PAL => PAL-M\n"); 858 return V4L2_STD_PAL_M;
860 t->std = V4L2_STD_PAL_M;
861 break;
862 case 'N': 859 case 'N':
863 case 'n': 860 case 'n':
864 if (pal[1] == 'c' || pal[1] == 'C') { 861 if (pal[1] == 'c' || pal[1] == 'C')
865 tuner_dbg("insmod fixup: PAL => PAL-Nc\n"); 862 return V4L2_STD_PAL_Nc;
866 t->std = V4L2_STD_PAL_Nc; 863 return V4L2_STD_PAL_N;
867 } else {
868 tuner_dbg("insmod fixup: PAL => PAL-N\n");
869 t->std = V4L2_STD_PAL_N;
870 }
871 break;
872 case '-':
873 /* default parameter, do nothing */
874 break;
875 default: 864 default:
876 tuner_warn("pal= argument not recognised\n"); 865 tuner_warn("pal= argument not recognised\n");
877 break; 866 break;
878 } 867 }
879 } 868 }
880 if ((t->std & V4L2_STD_SECAM) == V4L2_STD_SECAM) { 869 if (secam[0] != '-' && (std & V4L2_STD_SECAM) == V4L2_STD_SECAM) {
881 switch (secam[0]) { 870 switch (secam[0]) {
882 case 'b': 871 case 'b':
883 case 'B': 872 case 'B':
@@ -885,63 +874,42 @@ static int tuner_fixup_std(struct tuner *t)
885 case 'G': 874 case 'G':
886 case 'h': 875 case 'h':
887 case 'H': 876 case 'H':
888 tuner_dbg("insmod fixup: SECAM => SECAM-BGH\n"); 877 return V4L2_STD_SECAM_B |
889 t->std = V4L2_STD_SECAM_B | 878 V4L2_STD_SECAM_G |
890 V4L2_STD_SECAM_G | 879 V4L2_STD_SECAM_H;
891 V4L2_STD_SECAM_H;
892 break;
893 case 'd': 880 case 'd':
894 case 'D': 881 case 'D':
895 case 'k': 882 case 'k':
896 case 'K': 883 case 'K':
897 tuner_dbg("insmod fixup: SECAM => SECAM-DK\n"); 884 return V4L2_STD_SECAM_DK;
898 t->std = V4L2_STD_SECAM_DK;
899 break;
900 case 'l': 885 case 'l':
901 case 'L': 886 case 'L':
902 if ((secam[1] == 'C') || (secam[1] == 'c')) { 887 if ((secam[1] == 'C') || (secam[1] == 'c'))
903 tuner_dbg("insmod fixup: SECAM => SECAM-L'\n"); 888 return V4L2_STD_SECAM_LC;
904 t->std = V4L2_STD_SECAM_LC; 889 return V4L2_STD_SECAM_L;
905 } else {
906 tuner_dbg("insmod fixup: SECAM => SECAM-L\n");
907 t->std = V4L2_STD_SECAM_L;
908 }
909 break;
910 case '-':
911 /* default parameter, do nothing */
912 break;
913 default: 890 default:
914 tuner_warn("secam= argument not recognised\n"); 891 tuner_warn("secam= argument not recognised\n");
915 break; 892 break;
916 } 893 }
917 } 894 }
918 895
919 if ((t->std & V4L2_STD_NTSC) == V4L2_STD_NTSC) { 896 if (ntsc[0] != '-' && (std & V4L2_STD_NTSC) == V4L2_STD_NTSC) {
920 switch (ntsc[0]) { 897 switch (ntsc[0]) {
921 case 'm': 898 case 'm':
922 case 'M': 899 case 'M':
923 tuner_dbg("insmod fixup: NTSC => NTSC-M\n"); 900 return V4L2_STD_NTSC_M;
924 t->std = V4L2_STD_NTSC_M;
925 break;
926 case 'j': 901 case 'j':
927 case 'J': 902 case 'J':
928 tuner_dbg("insmod fixup: NTSC => NTSC_M_JP\n"); 903 return V4L2_STD_NTSC_M_JP;
929 t->std = V4L2_STD_NTSC_M_JP;
930 break;
931 case 'k': 904 case 'k':
932 case 'K': 905 case 'K':
933 tuner_dbg("insmod fixup: NTSC => NTSC_M_KR\n"); 906 return V4L2_STD_NTSC_M_KR;
934 t->std = V4L2_STD_NTSC_M_KR;
935 break;
936 case '-':
937 /* default parameter, do nothing */
938 break;
939 default: 907 default:
940 tuner_info("ntsc= argument not recognised\n"); 908 tuner_info("ntsc= argument not recognised\n");
941 break; 909 break;
942 } 910 }
943 } 911 }
944 return 0; 912 return std;
945} 913}
946 914
947/* 915/*
@@ -1058,10 +1026,9 @@ static void tuner_status(struct dvb_frontend *fe)
1058static int tuner_s_radio(struct v4l2_subdev *sd) 1026static int tuner_s_radio(struct v4l2_subdev *sd)
1059{ 1027{
1060 struct tuner *t = to_tuner(sd); 1028 struct tuner *t = to_tuner(sd);
1061 struct i2c_client *client = v4l2_get_subdevdata(sd);
1062 1029
1063 if (set_mode_freq(client, t, V4L2_TUNER_RADIO, 0) == -EINVAL) 1030 if (set_mode(t, V4L2_TUNER_RADIO) == 0)
1064 return 0; 1031 set_freq(t, 0);
1065 return 0; 1032 return 0;
1066} 1033}
1067 1034
@@ -1072,16 +1039,20 @@ static int tuner_s_radio(struct v4l2_subdev *sd)
1072/** 1039/**
1073 * tuner_s_power - controls the power state of the tuner 1040 * tuner_s_power - controls the power state of the tuner
1074 * @sd: pointer to struct v4l2_subdev 1041 * @sd: pointer to struct v4l2_subdev
1075 * @on: a zero value puts the tuner to sleep 1042 * @on: a zero value puts the tuner to sleep, non-zero wakes it up
1076 */ 1043 */
1077static int tuner_s_power(struct v4l2_subdev *sd, int on) 1044static int tuner_s_power(struct v4l2_subdev *sd, int on)
1078{ 1045{
1079 struct tuner *t = to_tuner(sd); 1046 struct tuner *t = to_tuner(sd);
1080 struct analog_demod_ops *analog_ops = &t->fe.ops.analog_ops; 1047 struct analog_demod_ops *analog_ops = &t->fe.ops.analog_ops;
1081 1048
1082 /* FIXME: Why this function don't wake the tuner if on != 0 ? */ 1049 if (on) {
1083 if (on) 1050 if (t->standby && set_mode(t, t->mode) == 0) {
1051 tuner_dbg("Waking up tuner\n");
1052 set_freq(t, 0);
1053 }
1084 return 0; 1054 return 0;
1055 }
1085 1056
1086 tuner_dbg("Putting tuner to sleep\n"); 1057 tuner_dbg("Putting tuner to sleep\n");
1087 t->standby = true; 1058 t->standby = true;
@@ -1093,28 +1064,36 @@ static int tuner_s_power(struct v4l2_subdev *sd, int on)
1093static int tuner_s_std(struct v4l2_subdev *sd, v4l2_std_id std) 1064static int tuner_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1094{ 1065{
1095 struct tuner *t = to_tuner(sd); 1066 struct tuner *t = to_tuner(sd);
1096 struct i2c_client *client = v4l2_get_subdevdata(sd);
1097 1067
1098 if (set_mode_freq(client, t, V4L2_TUNER_ANALOG_TV, 0) == -EINVAL) 1068 if (set_mode(t, V4L2_TUNER_ANALOG_TV))
1099 return 0; 1069 return 0;
1100 1070
1101 t->std = std; 1071 t->std = tuner_fixup_std(t, std);
1102 tuner_fixup_std(t); 1072 if (t->std != std)
1103 1073 tuner_dbg("Fixup standard %llx to %llx\n", std, t->std);
1074 set_freq(t, 0);
1104 return 0; 1075 return 0;
1105} 1076}
1106 1077
1107static int tuner_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f) 1078static int tuner_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
1108{ 1079{
1109 struct tuner *t = to_tuner(sd); 1080 struct tuner *t = to_tuner(sd);
1110 struct i2c_client *client = v4l2_get_subdevdata(sd);
1111
1112 if (set_mode_freq(client, t, f->type, f->frequency) == -EINVAL)
1113 return 0;
1114 1081
1082 if (set_mode(t, f->type) == 0)
1083 set_freq(t, f->frequency);
1115 return 0; 1084 return 0;
1116} 1085}
1117 1086
1087/**
1088 * tuner_g_frequency - Get the tuned frequency for the tuner
1089 * @sd: pointer to struct v4l2_subdev
1090 * @f: pointer to struct v4l2_frequency
1091 *
1092 * At return, the structure f will be filled with tuner frequency
1093 * if the tuner matches the f->type.
1094 * Note: f->type should be initialized before calling it.
1095 * This is done by either video_ioctl2 or by the bridge driver.
1096 */
1118static int tuner_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f) 1097static int tuner_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
1119{ 1098{
1120 struct tuner *t = to_tuner(sd); 1099 struct tuner *t = to_tuner(sd);
@@ -1122,8 +1101,7 @@ static int tuner_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
1122 1101
1123 if (check_mode(t, f->type) == -EINVAL) 1102 if (check_mode(t, f->type) == -EINVAL)
1124 return 0; 1103 return 0;
1125 f->type = t->mode; 1104 if (f->type == t->mode && fe_tuner_ops->get_frequency && !t->standby) {
1126 if (fe_tuner_ops->get_frequency && !t->standby) {
1127 u32 abs_freq; 1105 u32 abs_freq;
1128 1106
1129 fe_tuner_ops->get_frequency(&t->fe, &abs_freq); 1107 fe_tuner_ops->get_frequency(&t->fe, &abs_freq);
@@ -1131,12 +1109,22 @@ static int tuner_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
1131 DIV_ROUND_CLOSEST(abs_freq * 2, 125) : 1109 DIV_ROUND_CLOSEST(abs_freq * 2, 125) :
1132 DIV_ROUND_CLOSEST(abs_freq, 62500); 1110 DIV_ROUND_CLOSEST(abs_freq, 62500);
1133 } else { 1111 } else {
1134 f->frequency = (V4L2_TUNER_RADIO == t->mode) ? 1112 f->frequency = (V4L2_TUNER_RADIO == f->type) ?
1135 t->radio_freq : t->tv_freq; 1113 t->radio_freq : t->tv_freq;
1136 } 1114 }
1137 return 0; 1115 return 0;
1138} 1116}
1139 1117
1118/**
1119 * tuner_g_tuner - Fill in tuner information
1120 * @sd: pointer to struct v4l2_subdev
1121 * @vt: pointer to struct v4l2_tuner
1122 *
1123 * At return, the structure vt will be filled with tuner information
1124 * if the tuner matches vt->type.
1125 * Note: vt->type should be initialized before calling it.
1126 * This is done by either video_ioctl2 or by the bridge driver.
1127 */
1140static int tuner_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) 1128static int tuner_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1141{ 1129{
1142 struct tuner *t = to_tuner(sd); 1130 struct tuner *t = to_tuner(sd);
@@ -1145,48 +1133,58 @@ static int tuner_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1145 1133
1146 if (check_mode(t, vt->type) == -EINVAL) 1134 if (check_mode(t, vt->type) == -EINVAL)
1147 return 0; 1135 return 0;
1148 vt->type = t->mode; 1136 if (vt->type == t->mode && analog_ops->get_afc)
1149 if (analog_ops->get_afc)
1150 vt->afc = analog_ops->get_afc(&t->fe); 1137 vt->afc = analog_ops->get_afc(&t->fe);
1151 if (t->mode == V4L2_TUNER_ANALOG_TV) 1138 if (vt->type == V4L2_TUNER_ANALOG_TV)
1152 vt->capability |= V4L2_TUNER_CAP_NORM; 1139 vt->capability |= V4L2_TUNER_CAP_NORM;
1153 if (t->mode != V4L2_TUNER_RADIO) { 1140 if (vt->type != V4L2_TUNER_RADIO) {
1154 vt->rangelow = tv_range[0] * 16; 1141 vt->rangelow = tv_range[0] * 16;
1155 vt->rangehigh = tv_range[1] * 16; 1142 vt->rangehigh = tv_range[1] * 16;
1156 return 0; 1143 return 0;
1157 } 1144 }
1158 1145
1159 /* radio mode */ 1146 /* radio mode */
1160 vt->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO; 1147 if (vt->type == t->mode) {
1161 if (fe_tuner_ops->get_status) { 1148 vt->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
1162 u32 tuner_status; 1149 if (fe_tuner_ops->get_status) {
1163 1150 u32 tuner_status;
1164 fe_tuner_ops->get_status(&t->fe, &tuner_status); 1151
1165 vt->rxsubchans = 1152 fe_tuner_ops->get_status(&t->fe, &tuner_status);
1166 (tuner_status & TUNER_STATUS_STEREO) ? 1153 vt->rxsubchans =
1167 V4L2_TUNER_SUB_STEREO : 1154 (tuner_status & TUNER_STATUS_STEREO) ?
1168 V4L2_TUNER_SUB_MONO; 1155 V4L2_TUNER_SUB_STEREO :
1156 V4L2_TUNER_SUB_MONO;
1157 }
1158 if (analog_ops->has_signal)
1159 vt->signal = analog_ops->has_signal(&t->fe);
1160 vt->audmode = t->audmode;
1169 } 1161 }
1170 if (analog_ops->has_signal)
1171 vt->signal = analog_ops->has_signal(&t->fe);
1172 vt->capability |= V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO; 1162 vt->capability |= V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO;
1173 vt->audmode = t->audmode;
1174 vt->rangelow = radio_range[0] * 16000; 1163 vt->rangelow = radio_range[0] * 16000;
1175 vt->rangehigh = radio_range[1] * 16000; 1164 vt->rangehigh = radio_range[1] * 16000;
1176 1165
1177 return 0; 1166 return 0;
1178} 1167}
1179 1168
1169/**
1170 * tuner_s_tuner - Set the tuner's audio mode
1171 * @sd: pointer to struct v4l2_subdev
1172 * @vt: pointer to struct v4l2_tuner
1173 *
1174 * Sets the audio mode if the tuner matches vt->type.
1175 * Note: vt->type should be initialized before calling it.
1176 * This is done by either video_ioctl2 or by the bridge driver.
1177 */
1180static int tuner_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) 1178static int tuner_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1181{ 1179{
1182 struct tuner *t = to_tuner(sd); 1180 struct tuner *t = to_tuner(sd);
1183 struct i2c_client *client = v4l2_get_subdevdata(sd);
1184 1181
1185 if (set_mode_freq(client, t, vt->type, 0) == -EINVAL) 1182 if (set_mode(t, vt->type))
1186 return 0; 1183 return 0;
1187 1184
1188 if (t->mode == V4L2_TUNER_RADIO) 1185 if (t->mode == V4L2_TUNER_RADIO)
1189 t->audmode = vt->audmode; 1186 t->audmode = vt->audmode;
1187 set_freq(t, 0);
1190 1188
1191 return 0; 1189 return 0;
1192} 1190}
@@ -1221,7 +1219,8 @@ static int tuner_resume(struct i2c_client *c)
1221 tuner_dbg("resume\n"); 1219 tuner_dbg("resume\n");
1222 1220
1223 if (!t->standby) 1221 if (!t->standby)
1224 set_mode_freq(c, t, t->type, 0); 1222 if (set_mode(t, t->mode) == 0)
1223 set_freq(t, 0);
1225 1224
1226 return 0; 1225 return 0;
1227} 1226}
diff --git a/drivers/media/video/uvc/uvc_entity.c b/drivers/media/video/uvc/uvc_entity.c
index c3ab0c813be2..48fea373c25a 100644
--- a/drivers/media/video/uvc/uvc_entity.c
+++ b/drivers/media/video/uvc/uvc_entity.c
@@ -27,14 +27,20 @@ static int uvc_mc_register_entity(struct uvc_video_chain *chain,
27 struct uvc_entity *entity) 27 struct uvc_entity *entity)
28{ 28{
29 const u32 flags = MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE; 29 const u32 flags = MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE;
30 struct uvc_entity *remote; 30 struct media_entity *sink;
31 unsigned int i; 31 unsigned int i;
32 u8 remote_pad; 32 int ret;
33 int ret = 0; 33
34 sink = (UVC_ENTITY_TYPE(entity) == UVC_TT_STREAMING)
35 ? (entity->vdev ? &entity->vdev->entity : NULL)
36 : &entity->subdev.entity;
37 if (sink == NULL)
38 return 0;
34 39
35 for (i = 0; i < entity->num_pads; ++i) { 40 for (i = 0; i < entity->num_pads; ++i) {
36 struct media_entity *source; 41 struct media_entity *source;
37 struct media_entity *sink; 42 struct uvc_entity *remote;
43 u8 remote_pad;
38 44
39 if (!(entity->pads[i].flags & MEDIA_PAD_FL_SINK)) 45 if (!(entity->pads[i].flags & MEDIA_PAD_FL_SINK))
40 continue; 46 continue;
@@ -43,10 +49,11 @@ static int uvc_mc_register_entity(struct uvc_video_chain *chain,
43 if (remote == NULL) 49 if (remote == NULL)
44 return -EINVAL; 50 return -EINVAL;
45 51
46 source = (UVC_ENTITY_TYPE(remote) == UVC_TT_STREAMING) 52 source = (UVC_ENTITY_TYPE(remote) != UVC_TT_STREAMING)
47 ? &remote->vdev->entity : &remote->subdev.entity; 53 ? (remote->vdev ? &remote->vdev->entity : NULL)
48 sink = (UVC_ENTITY_TYPE(entity) == UVC_TT_STREAMING) 54 : &remote->subdev.entity;
49 ? &entity->vdev->entity : &entity->subdev.entity; 55 if (source == NULL)
56 continue;
50 57
51 remote_pad = remote->num_pads - 1; 58 remote_pad = remote->num_pads - 1;
52 ret = media_entity_create_link(source, remote_pad, 59 ret = media_entity_create_link(source, remote_pad,
@@ -55,11 +62,10 @@ static int uvc_mc_register_entity(struct uvc_video_chain *chain,
55 return ret; 62 return ret;
56 } 63 }
57 64
58 if (UVC_ENTITY_TYPE(entity) != UVC_TT_STREAMING) 65 if (UVC_ENTITY_TYPE(entity) == UVC_TT_STREAMING)
59 ret = v4l2_device_register_subdev(&chain->dev->vdev, 66 return 0;
60 &entity->subdev);
61 67
62 return ret; 68 return v4l2_device_register_subdev(&chain->dev->vdev, &entity->subdev);
63} 69}
64 70
65static struct v4l2_subdev_ops uvc_subdev_ops = { 71static struct v4l2_subdev_ops uvc_subdev_ops = {
@@ -84,9 +90,11 @@ static int uvc_mc_init_entity(struct uvc_entity *entity)
84 90
85 ret = media_entity_init(&entity->subdev.entity, 91 ret = media_entity_init(&entity->subdev.entity,
86 entity->num_pads, entity->pads, 0); 92 entity->num_pads, entity->pads, 0);
87 } else 93 } else if (entity->vdev != NULL) {
88 ret = media_entity_init(&entity->vdev->entity, 94 ret = media_entity_init(&entity->vdev->entity,
89 entity->num_pads, entity->pads, 0); 95 entity->num_pads, entity->pads, 0);
96 } else
97 ret = 0;
90 98
91 return ret; 99 return ret;
92} 100}
diff --git a/drivers/media/video/uvc/uvc_queue.c b/drivers/media/video/uvc/uvc_queue.c
index 109a06384a8f..f90ce9fce539 100644
--- a/drivers/media/video/uvc/uvc_queue.c
+++ b/drivers/media/video/uvc/uvc_queue.c
@@ -104,6 +104,8 @@ static int __uvc_free_buffers(struct uvc_video_queue *queue)
104 } 104 }
105 105
106 if (queue->count) { 106 if (queue->count) {
107 uvc_queue_cancel(queue, 0);
108 INIT_LIST_HEAD(&queue->mainqueue);
107 vfree(queue->mem); 109 vfree(queue->mem);
108 queue->count = 0; 110 queue->count = 0;
109 } 111 }
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c
index fc766b9f24c5..49994793cc77 100644
--- a/drivers/media/video/uvc/uvc_video.c
+++ b/drivers/media/video/uvc/uvc_video.c
@@ -1255,8 +1255,10 @@ int uvc_video_enable(struct uvc_streaming *stream, int enable)
1255 1255
1256 /* Commit the streaming parameters. */ 1256 /* Commit the streaming parameters. */
1257 ret = uvc_commit_video(stream, &stream->ctrl); 1257 ret = uvc_commit_video(stream, &stream->ctrl);
1258 if (ret < 0) 1258 if (ret < 0) {
1259 uvc_queue_enable(&stream->queue, 0);
1259 return ret; 1260 return ret;
1261 }
1260 1262
1261 return uvc_init_video(stream, GFP_KERNEL); 1263 return uvc_init_video(stream, GFP_KERNEL);
1262} 1264}
diff --git a/drivers/media/video/v4l2-dev.c b/drivers/media/video/v4l2-dev.c
index 19d5ae293780..06f14008b346 100644
--- a/drivers/media/video/v4l2-dev.c
+++ b/drivers/media/video/v4l2-dev.c
@@ -167,6 +167,12 @@ static void v4l2_device_release(struct device *cd)
167 167
168 mutex_unlock(&videodev_lock); 168 mutex_unlock(&videodev_lock);
169 169
170#if defined(CONFIG_MEDIA_CONTROLLER)
171 if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
172 vdev->vfl_type != VFL_TYPE_SUBDEV)
173 media_device_unregister_entity(&vdev->entity);
174#endif
175
170 /* Release video_device and perform other 176 /* Release video_device and perform other
171 cleanups as needed. */ 177 cleanups as needed. */
172 vdev->release(vdev); 178 vdev->release(vdev);
@@ -389,9 +395,6 @@ static int v4l2_mmap(struct file *filp, struct vm_area_struct *vm)
389static int v4l2_open(struct inode *inode, struct file *filp) 395static int v4l2_open(struct inode *inode, struct file *filp)
390{ 396{
391 struct video_device *vdev; 397 struct video_device *vdev;
392#if defined(CONFIG_MEDIA_CONTROLLER)
393 struct media_entity *entity = NULL;
394#endif
395 int ret = 0; 398 int ret = 0;
396 399
397 /* Check if the video device is available */ 400 /* Check if the video device is available */
@@ -405,17 +408,6 @@ static int v4l2_open(struct inode *inode, struct file *filp)
405 /* and increase the device refcount */ 408 /* and increase the device refcount */
406 video_get(vdev); 409 video_get(vdev);
407 mutex_unlock(&videodev_lock); 410 mutex_unlock(&videodev_lock);
408#if defined(CONFIG_MEDIA_CONTROLLER)
409 if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
410 vdev->vfl_type != VFL_TYPE_SUBDEV) {
411 entity = media_entity_get(&vdev->entity);
412 if (!entity) {
413 ret = -EBUSY;
414 video_put(vdev);
415 return ret;
416 }
417 }
418#endif
419 if (vdev->fops->open) { 411 if (vdev->fops->open) {
420 if (vdev->lock && mutex_lock_interruptible(vdev->lock)) { 412 if (vdev->lock && mutex_lock_interruptible(vdev->lock)) {
421 ret = -ERESTARTSYS; 413 ret = -ERESTARTSYS;
@@ -431,14 +423,8 @@ static int v4l2_open(struct inode *inode, struct file *filp)
431 423
432err: 424err:
433 /* decrease the refcount in case of an error */ 425 /* decrease the refcount in case of an error */
434 if (ret) { 426 if (ret)
435#if defined(CONFIG_MEDIA_CONTROLLER)
436 if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
437 vdev->vfl_type != VFL_TYPE_SUBDEV)
438 media_entity_put(entity);
439#endif
440 video_put(vdev); 427 video_put(vdev);
441 }
442 return ret; 428 return ret;
443} 429}
444 430
@@ -455,11 +441,6 @@ static int v4l2_release(struct inode *inode, struct file *filp)
455 if (vdev->lock) 441 if (vdev->lock)
456 mutex_unlock(vdev->lock); 442 mutex_unlock(vdev->lock);
457 } 443 }
458#if defined(CONFIG_MEDIA_CONTROLLER)
459 if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
460 vdev->vfl_type != VFL_TYPE_SUBDEV)
461 media_entity_put(&vdev->entity);
462#endif
463 /* decrease the refcount unconditionally since the release() 444 /* decrease the refcount unconditionally since the release()
464 return value is ignored. */ 445 return value is ignored. */
465 video_put(vdev); 446 video_put(vdev);
@@ -754,12 +735,6 @@ void video_unregister_device(struct video_device *vdev)
754 if (!vdev || !video_is_registered(vdev)) 735 if (!vdev || !video_is_registered(vdev))
755 return; 736 return;
756 737
757#if defined(CONFIG_MEDIA_CONTROLLER)
758 if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
759 vdev->vfl_type != VFL_TYPE_SUBDEV)
760 media_device_unregister_entity(&vdev->entity);
761#endif
762
763 mutex_lock(&videodev_lock); 738 mutex_lock(&videodev_lock);
764 /* This must be in a critical section to prevent a race with v4l2_open. 739 /* This must be in a critical section to prevent a race with v4l2_open.
765 * Once this bit has been cleared video_get may never be called again. 740 * Once this bit has been cleared video_get may never be called again.
diff --git a/drivers/media/video/v4l2-ioctl.c b/drivers/media/video/v4l2-ioctl.c
index 506edcc2ddeb..69e8c6ffcc49 100644
--- a/drivers/media/video/v4l2-ioctl.c
+++ b/drivers/media/video/v4l2-ioctl.c
@@ -1822,6 +1822,8 @@ static long __video_do_ioctl(struct file *file,
1822 if (!ops->vidioc_g_tuner) 1822 if (!ops->vidioc_g_tuner)
1823 break; 1823 break;
1824 1824
1825 p->type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
1826 V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1825 ret = ops->vidioc_g_tuner(file, fh, p); 1827 ret = ops->vidioc_g_tuner(file, fh, p);
1826 if (!ret) 1828 if (!ret)
1827 dbgarg(cmd, "index=%d, name=%s, type=%d, " 1829 dbgarg(cmd, "index=%d, name=%s, type=%d, "
@@ -1840,6 +1842,8 @@ static long __video_do_ioctl(struct file *file,
1840 1842
1841 if (!ops->vidioc_s_tuner) 1843 if (!ops->vidioc_s_tuner)
1842 break; 1844 break;
1845 p->type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
1846 V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1843 dbgarg(cmd, "index=%d, name=%s, type=%d, " 1847 dbgarg(cmd, "index=%d, name=%s, type=%d, "
1844 "capability=0x%x, rangelow=%d, " 1848 "capability=0x%x, rangelow=%d, "
1845 "rangehigh=%d, signal=%d, afc=%d, " 1849 "rangehigh=%d, signal=%d, afc=%d, "
@@ -1858,6 +1862,8 @@ static long __video_do_ioctl(struct file *file,
1858 if (!ops->vidioc_g_frequency) 1862 if (!ops->vidioc_g_frequency)
1859 break; 1863 break;
1860 1864
1865 p->type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
1866 V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1861 ret = ops->vidioc_g_frequency(file, fh, p); 1867 ret = ops->vidioc_g_frequency(file, fh, p);
1862 if (!ret) 1868 if (!ret)
1863 dbgarg(cmd, "tuner=%d, type=%d, frequency=%d\n", 1869 dbgarg(cmd, "tuner=%d, type=%d, frequency=%d\n",
@@ -1940,13 +1946,19 @@ static long __video_do_ioctl(struct file *file,
1940 case VIDIOC_S_HW_FREQ_SEEK: 1946 case VIDIOC_S_HW_FREQ_SEEK:
1941 { 1947 {
1942 struct v4l2_hw_freq_seek *p = arg; 1948 struct v4l2_hw_freq_seek *p = arg;
1949 enum v4l2_tuner_type type;
1943 1950
1944 if (!ops->vidioc_s_hw_freq_seek) 1951 if (!ops->vidioc_s_hw_freq_seek)
1945 break; 1952 break;
1953 type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
1954 V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1946 dbgarg(cmd, 1955 dbgarg(cmd,
1947 "tuner=%d, type=%d, seek_upward=%d, wrap_around=%d\n", 1956 "tuner=%u, type=%u, seek_upward=%u, wrap_around=%u, spacing=%u\n",
1948 p->tuner, p->type, p->seek_upward, p->wrap_around); 1957 p->tuner, p->type, p->seek_upward, p->wrap_around, p->spacing);
1949 ret = ops->vidioc_s_hw_freq_seek(file, fh, p); 1958 if (p->type != type)
1959 ret = -EINVAL;
1960 else
1961 ret = ops->vidioc_s_hw_freq_seek(file, fh, p);
1950 break; 1962 break;
1951 } 1963 }
1952 case VIDIOC_ENUM_FRAMESIZES: 1964 case VIDIOC_ENUM_FRAMESIZES:
diff --git a/drivers/media/video/videobuf2-core.c b/drivers/media/video/videobuf2-core.c
index 6ba1461d51ef..3015e6000946 100644
--- a/drivers/media/video/videobuf2-core.c
+++ b/drivers/media/video/videobuf2-core.c
@@ -492,13 +492,6 @@ int vb2_reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
492 return -EINVAL; 492 return -EINVAL;
493 } 493 }
494 494
495 /*
496 * If the same number of buffers and memory access method is requested
497 * then return immediately.
498 */
499 if (q->memory == req->memory && req->count == q->num_buffers)
500 return 0;
501
502 if (req->count == 0 || q->num_buffers != 0 || q->memory != req->memory) { 495 if (req->count == 0 || q->num_buffers != 0 || q->memory != req->memory) {
503 /* 496 /*
504 * We already have buffers allocated, so first check if they 497 * We already have buffers allocated, so first check if they
@@ -539,9 +532,9 @@ int vb2_reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
539 /* Finally, allocate buffers and video memory */ 532 /* Finally, allocate buffers and video memory */
540 ret = __vb2_queue_alloc(q, req->memory, num_buffers, num_planes, 533 ret = __vb2_queue_alloc(q, req->memory, num_buffers, num_planes,
541 plane_sizes); 534 plane_sizes);
542 if (ret < 0) { 535 if (ret == 0) {
543 dprintk(1, "Memory allocation failed with error: %d\n", ret); 536 dprintk(1, "Memory allocation failed\n");
544 return ret; 537 return -ENOMEM;
545 } 538 }
546 539
547 /* 540 /*
@@ -1196,6 +1189,7 @@ static void __vb2_queue_cancel(struct vb2_queue *q)
1196 * has not already dequeued before initiating cancel. 1189 * has not already dequeued before initiating cancel.
1197 */ 1190 */
1198 INIT_LIST_HEAD(&q->done_list); 1191 INIT_LIST_HEAD(&q->done_list);
1192 atomic_set(&q->queued_count, 0);
1199 wake_up_all(&q->done_wq); 1193 wake_up_all(&q->done_wq);
1200 1194
1201 /* 1195 /*
diff --git a/drivers/media/video/videobuf2-dma-sg.c b/drivers/media/video/videobuf2-dma-sg.c
index b2d9485aac75..10a20d9509d9 100644
--- a/drivers/media/video/videobuf2-dma-sg.c
+++ b/drivers/media/video/videobuf2-dma-sg.c
@@ -62,7 +62,7 @@ static void *vb2_dma_sg_alloc(void *alloc_ctx, unsigned long size)
62 goto fail_pages_array_alloc; 62 goto fail_pages_array_alloc;
63 63
64 for (i = 0; i < buf->sg_desc.num_pages; ++i) { 64 for (i = 0; i < buf->sg_desc.num_pages; ++i) {
65 buf->pages[i] = alloc_page(GFP_KERNEL | __GFP_ZERO); 65 buf->pages[i] = alloc_page(GFP_KERNEL | __GFP_ZERO | __GFP_NOWARN);
66 if (NULL == buf->pages[i]) 66 if (NULL == buf->pages[i])
67 goto fail_pages_alloc; 67 goto fail_pages_alloc;
68 sg_set_page(&buf->sg_desc.sglist[i], 68 sg_set_page(&buf->sg_desc.sglist[i],
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 0f09c057e796..6ca938a6bf94 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -728,6 +728,9 @@ config MFD_TPS65910
728 if you say yes here you get support for the TPS65910 series of 728 if you say yes here you get support for the TPS65910 series of
729 Power Management chips. 729 Power Management chips.
730 730
731config TPS65911_COMPARATOR
732 tristate
733
731endif # MFD_SUPPORT 734endif # MFD_SUPPORT
732 735
733menu "Multimedia Capabilities Port drivers" 736menu "Multimedia Capabilities Port drivers"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index efe3cc33ed92..d7d47d2a4c76 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -94,3 +94,4 @@ obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
94obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o 94obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
95obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o 95obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
96obj-$(CONFIG_MFD_TPS65910) += tps65910.o tps65910-irq.o 96obj-$(CONFIG_MFD_TPS65910) += tps65910.o tps65910-irq.o
97obj-$(CONFIG_TPS65911_COMPARATOR) += tps65911-comparator.o
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index c27fd1fc3b86..c71ae09430c5 100644
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -619,6 +619,7 @@ static void asic3_clk_disable(struct asic3 *asic, struct asic3_clk *clk)
619/* MFD cells (SPI, PWM, LED, DS1WM, MMC) */ 619/* MFD cells (SPI, PWM, LED, DS1WM, MMC) */
620static struct ds1wm_driver_data ds1wm_pdata = { 620static struct ds1wm_driver_data ds1wm_pdata = {
621 .active_high = 1, 621 .active_high = 1,
622 .reset_recover_delay = 1,
622}; 623};
623 624
624static struct resource ds1wm_resources[] = { 625static struct resource ds1wm_resources[] = {
diff --git a/drivers/mfd/htc-pasic3.c b/drivers/mfd/htc-pasic3.c
index 2808bd125d13..04c7093d6499 100644
--- a/drivers/mfd/htc-pasic3.c
+++ b/drivers/mfd/htc-pasic3.c
@@ -99,6 +99,7 @@ static int ds1wm_disable(struct platform_device *pdev)
99 99
100static struct ds1wm_driver_data ds1wm_pdata = { 100static struct ds1wm_driver_data ds1wm_pdata = {
101 .active_high = 0, 101 .active_high = 0,
102 .reset_recover_delay = 1,
102}; 103};
103 104
104static struct resource ds1wm_resources[] __initdata = { 105static struct resource ds1wm_resources[] __initdata = {
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 855219526ccb..1717144fe7f4 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -26,7 +26,6 @@
26#include <linux/spinlock.h> 26#include <linux/spinlock.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <plat/usb.h> 28#include <plat/usb.h>
29#include <linux/pm_runtime.h>
30 29
31#define USBHS_DRIVER_NAME "usbhs-omap" 30#define USBHS_DRIVER_NAME "usbhs-omap"
32#define OMAP_EHCI_DEVICE "ehci-omap" 31#define OMAP_EHCI_DEVICE "ehci-omap"
@@ -147,6 +146,9 @@
147 146
148 147
149struct usbhs_hcd_omap { 148struct usbhs_hcd_omap {
149 struct clk *usbhost_ick;
150 struct clk *usbhost_hs_fck;
151 struct clk *usbhost_fs_fck;
150 struct clk *xclk60mhsp1_ck; 152 struct clk *xclk60mhsp1_ck;
151 struct clk *xclk60mhsp2_ck; 153 struct clk *xclk60mhsp2_ck;
152 struct clk *utmi_p1_fck; 154 struct clk *utmi_p1_fck;
@@ -156,6 +158,8 @@ struct usbhs_hcd_omap {
156 struct clk *usbhost_p2_fck; 158 struct clk *usbhost_p2_fck;
157 struct clk *usbtll_p2_fck; 159 struct clk *usbtll_p2_fck;
158 struct clk *init_60m_fclk; 160 struct clk *init_60m_fclk;
161 struct clk *usbtll_fck;
162 struct clk *usbtll_ick;
159 163
160 void __iomem *uhh_base; 164 void __iomem *uhh_base;
161 void __iomem *tll_base; 165 void __iomem *tll_base;
@@ -349,13 +353,46 @@ static int __devinit usbhs_omap_probe(struct platform_device *pdev)
349 omap->platdata.ehci_data = pdata->ehci_data; 353 omap->platdata.ehci_data = pdata->ehci_data;
350 omap->platdata.ohci_data = pdata->ohci_data; 354 omap->platdata.ohci_data = pdata->ohci_data;
351 355
352 pm_runtime_enable(&pdev->dev); 356 omap->usbhost_ick = clk_get(dev, "usbhost_ick");
357 if (IS_ERR(omap->usbhost_ick)) {
358 ret = PTR_ERR(omap->usbhost_ick);
359 dev_err(dev, "usbhost_ick failed error:%d\n", ret);
360 goto err_end;
361 }
362
363 omap->usbhost_hs_fck = clk_get(dev, "hs_fck");
364 if (IS_ERR(omap->usbhost_hs_fck)) {
365 ret = PTR_ERR(omap->usbhost_hs_fck);
366 dev_err(dev, "usbhost_hs_fck failed error:%d\n", ret);
367 goto err_usbhost_ick;
368 }
369
370 omap->usbhost_fs_fck = clk_get(dev, "fs_fck");
371 if (IS_ERR(omap->usbhost_fs_fck)) {
372 ret = PTR_ERR(omap->usbhost_fs_fck);
373 dev_err(dev, "usbhost_fs_fck failed error:%d\n", ret);
374 goto err_usbhost_hs_fck;
375 }
376
377 omap->usbtll_fck = clk_get(dev, "usbtll_fck");
378 if (IS_ERR(omap->usbtll_fck)) {
379 ret = PTR_ERR(omap->usbtll_fck);
380 dev_err(dev, "usbtll_fck failed error:%d\n", ret);
381 goto err_usbhost_fs_fck;
382 }
383
384 omap->usbtll_ick = clk_get(dev, "usbtll_ick");
385 if (IS_ERR(omap->usbtll_ick)) {
386 ret = PTR_ERR(omap->usbtll_ick);
387 dev_err(dev, "usbtll_ick failed error:%d\n", ret);
388 goto err_usbtll_fck;
389 }
353 390
354 omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk"); 391 omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk");
355 if (IS_ERR(omap->utmi_p1_fck)) { 392 if (IS_ERR(omap->utmi_p1_fck)) {
356 ret = PTR_ERR(omap->utmi_p1_fck); 393 ret = PTR_ERR(omap->utmi_p1_fck);
357 dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret); 394 dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
358 goto err_end; 395 goto err_usbtll_ick;
359 } 396 }
360 397
361 omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck"); 398 omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck");
@@ -485,8 +522,22 @@ err_xclk60mhsp1_ck:
485err_utmi_p1_fck: 522err_utmi_p1_fck:
486 clk_put(omap->utmi_p1_fck); 523 clk_put(omap->utmi_p1_fck);
487 524
525err_usbtll_ick:
526 clk_put(omap->usbtll_ick);
527
528err_usbtll_fck:
529 clk_put(omap->usbtll_fck);
530
531err_usbhost_fs_fck:
532 clk_put(omap->usbhost_fs_fck);
533
534err_usbhost_hs_fck:
535 clk_put(omap->usbhost_hs_fck);
536
537err_usbhost_ick:
538 clk_put(omap->usbhost_ick);
539
488err_end: 540err_end:
489 pm_runtime_disable(&pdev->dev);
490 kfree(omap); 541 kfree(omap);
491 542
492end_probe: 543end_probe:
@@ -520,7 +571,11 @@ static int __devexit usbhs_omap_remove(struct platform_device *pdev)
520 clk_put(omap->utmi_p2_fck); 571 clk_put(omap->utmi_p2_fck);
521 clk_put(omap->xclk60mhsp1_ck); 572 clk_put(omap->xclk60mhsp1_ck);
522 clk_put(omap->utmi_p1_fck); 573 clk_put(omap->utmi_p1_fck);
523 pm_runtime_disable(&pdev->dev); 574 clk_put(omap->usbtll_ick);
575 clk_put(omap->usbtll_fck);
576 clk_put(omap->usbhost_fs_fck);
577 clk_put(omap->usbhost_hs_fck);
578 clk_put(omap->usbhost_ick);
524 kfree(omap); 579 kfree(omap);
525 580
526 return 0; 581 return 0;
@@ -640,6 +695,7 @@ static int usbhs_enable(struct device *dev)
640 struct usbhs_omap_platform_data *pdata = &omap->platdata; 695 struct usbhs_omap_platform_data *pdata = &omap->platdata;
641 unsigned long flags = 0; 696 unsigned long flags = 0;
642 int ret = 0; 697 int ret = 0;
698 unsigned long timeout;
643 unsigned reg; 699 unsigned reg;
644 700
645 dev_dbg(dev, "starting TI HSUSB Controller\n"); 701 dev_dbg(dev, "starting TI HSUSB Controller\n");
@@ -652,7 +708,11 @@ static int usbhs_enable(struct device *dev)
652 if (omap->count > 0) 708 if (omap->count > 0)
653 goto end_count; 709 goto end_count;
654 710
655 pm_runtime_get_sync(dev); 711 clk_enable(omap->usbhost_ick);
712 clk_enable(omap->usbhost_hs_fck);
713 clk_enable(omap->usbhost_fs_fck);
714 clk_enable(omap->usbtll_fck);
715 clk_enable(omap->usbtll_ick);
656 716
657 if (pdata->ehci_data->phy_reset) { 717 if (pdata->ehci_data->phy_reset) {
658 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) { 718 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) {
@@ -676,6 +736,50 @@ static int usbhs_enable(struct device *dev)
676 omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION); 736 omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION);
677 dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev); 737 dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev);
678 738
739 /* perform TLL soft reset, and wait until reset is complete */
740 usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
741 OMAP_USBTLL_SYSCONFIG_SOFTRESET);
742
743 /* Wait for TLL reset to complete */
744 timeout = jiffies + msecs_to_jiffies(1000);
745 while (!(usbhs_read(omap->tll_base, OMAP_USBTLL_SYSSTATUS)
746 & OMAP_USBTLL_SYSSTATUS_RESETDONE)) {
747 cpu_relax();
748
749 if (time_after(jiffies, timeout)) {
750 dev_dbg(dev, "operation timed out\n");
751 ret = -EINVAL;
752 goto err_tll;
753 }
754 }
755
756 dev_dbg(dev, "TLL RESET DONE\n");
757
758 /* (1<<3) = no idle mode only for initial debugging */
759 usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
760 OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
761 OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
762 OMAP_USBTLL_SYSCONFIG_AUTOIDLE);
763
764 /* Put UHH in NoIdle/NoStandby mode */
765 reg = usbhs_read(omap->uhh_base, OMAP_UHH_SYSCONFIG);
766 if (is_omap_usbhs_rev1(omap)) {
767 reg |= (OMAP_UHH_SYSCONFIG_ENAWAKEUP
768 | OMAP_UHH_SYSCONFIG_SIDLEMODE
769 | OMAP_UHH_SYSCONFIG_CACTIVITY
770 | OMAP_UHH_SYSCONFIG_MIDLEMODE);
771 reg &= ~OMAP_UHH_SYSCONFIG_AUTOIDLE;
772
773
774 } else if (is_omap_usbhs_rev2(omap)) {
775 reg &= ~OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR;
776 reg |= OMAP4_UHH_SYSCONFIG_NOIDLE;
777 reg &= ~OMAP4_UHH_SYSCONFIG_STDBYMODE_CLEAR;
778 reg |= OMAP4_UHH_SYSCONFIG_NOSTDBY;
779 }
780
781 usbhs_write(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
782
679 reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG); 783 reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
680 /* setup ULPI bypass and burst configurations */ 784 /* setup ULPI bypass and burst configurations */
681 reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN 785 reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
@@ -815,8 +919,6 @@ end_count:
815 return 0; 919 return 0;
816 920
817err_tll: 921err_tll:
818 pm_runtime_put_sync(dev);
819 spin_unlock_irqrestore(&omap->lock, flags);
820 if (pdata->ehci_data->phy_reset) { 922 if (pdata->ehci_data->phy_reset) {
821 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) 923 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0]))
822 gpio_free(pdata->ehci_data->reset_gpio_port[0]); 924 gpio_free(pdata->ehci_data->reset_gpio_port[0]);
@@ -824,6 +926,13 @@ err_tll:
824 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) 926 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1]))
825 gpio_free(pdata->ehci_data->reset_gpio_port[1]); 927 gpio_free(pdata->ehci_data->reset_gpio_port[1]);
826 } 928 }
929
930 clk_disable(omap->usbtll_ick);
931 clk_disable(omap->usbtll_fck);
932 clk_disable(omap->usbhost_fs_fck);
933 clk_disable(omap->usbhost_hs_fck);
934 clk_disable(omap->usbhost_ick);
935 spin_unlock_irqrestore(&omap->lock, flags);
827 return ret; 936 return ret;
828} 937}
829 938
@@ -896,7 +1005,11 @@ static void usbhs_disable(struct device *dev)
896 clk_disable(omap->utmi_p1_fck); 1005 clk_disable(omap->utmi_p1_fck);
897 } 1006 }
898 1007
899 pm_runtime_put_sync(dev); 1008 clk_disable(omap->usbtll_ick);
1009 clk_disable(omap->usbtll_fck);
1010 clk_disable(omap->usbhost_fs_fck);
1011 clk_disable(omap->usbhost_hs_fck);
1012 clk_disable(omap->usbhost_ick);
900 1013
901 /* The gpio_free migh sleep; so unlock the spinlock */ 1014 /* The gpio_free migh sleep; so unlock the spinlock */
902 spin_unlock_irqrestore(&omap->lock, flags); 1015 spin_unlock_irqrestore(&omap->lock, flags);
diff --git a/drivers/mfd/tps65911-comparator.c b/drivers/mfd/tps65911-comparator.c
index 3d2dc56a3d40..283ac6759757 100644
--- a/drivers/mfd/tps65911-comparator.c
+++ b/drivers/mfd/tps65911-comparator.c
@@ -125,7 +125,7 @@ static DEVICE_ATTR(comp2_threshold, S_IRUGO, comp_threshold_show, NULL);
125static __devinit int tps65911_comparator_probe(struct platform_device *pdev) 125static __devinit int tps65911_comparator_probe(struct platform_device *pdev)
126{ 126{
127 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); 127 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
128 struct tps65910_platform_data *pdata = dev_get_platdata(tps65910->dev); 128 struct tps65910_board *pdata = dev_get_platdata(tps65910->dev);
129 int ret; 129 int ret;
130 130
131 ret = comp_threshold_set(tps65910, COMP1, pdata->vmbch_threshold); 131 ret = comp_threshold_set(tps65910, COMP1, pdata->vmbch_threshold);
diff --git a/drivers/misc/pti.c b/drivers/misc/pti.c
index bb6f9255c17c..374dfcfccd07 100644
--- a/drivers/misc/pti.c
+++ b/drivers/misc/pti.c
@@ -317,7 +317,8 @@ EXPORT_SYMBOL_GPL(pti_request_masterchannel);
317 * a master, channel ID address 317 * a master, channel ID address
318 * used to write to PTI HW. 318 * used to write to PTI HW.
319 * 319 *
320 * @mc: master, channel apeture ID address to be released. 320 * @mc: master, channel apeture ID address to be released. This
321 * will de-allocate the structure via kfree().
321 */ 322 */
322void pti_release_masterchannel(struct pti_masterchannel *mc) 323void pti_release_masterchannel(struct pti_masterchannel *mc)
323{ 324{
@@ -475,8 +476,10 @@ static int pti_tty_install(struct tty_driver *driver, struct tty_struct *tty)
475 else 476 else
476 pti_tty_data->mc = pti_request_masterchannel(2); 477 pti_tty_data->mc = pti_request_masterchannel(2);
477 478
478 if (pti_tty_data->mc == NULL) 479 if (pti_tty_data->mc == NULL) {
480 kfree(pti_tty_data);
479 return -ENXIO; 481 return -ENXIO;
482 }
480 tty->driver_data = pti_tty_data; 483 tty->driver_data = pti_tty_data;
481 } 484 }
482 485
@@ -495,7 +498,7 @@ static void pti_tty_cleanup(struct tty_struct *tty)
495 if (pti_tty_data == NULL) 498 if (pti_tty_data == NULL)
496 return; 499 return;
497 pti_release_masterchannel(pti_tty_data->mc); 500 pti_release_masterchannel(pti_tty_data->mc);
498 kfree(tty->driver_data); 501 kfree(pti_tty_data);
499 tty->driver_data = NULL; 502 tty->driver_data = NULL;
500} 503}
501 504
@@ -581,7 +584,7 @@ static int pti_char_open(struct inode *inode, struct file *filp)
581static int pti_char_release(struct inode *inode, struct file *filp) 584static int pti_char_release(struct inode *inode, struct file *filp)
582{ 585{
583 pti_release_masterchannel(filp->private_data); 586 pti_release_masterchannel(filp->private_data);
584 kfree(filp->private_data); 587 filp->private_data = NULL;
585 return 0; 588 return 0;
586} 589}
587 590
diff --git a/drivers/misc/ti-st/st_core.c b/drivers/misc/ti-st/st_core.c
index f91f82eabda7..54c91ffe4a91 100644
--- a/drivers/misc/ti-st/st_core.c
+++ b/drivers/misc/ti-st/st_core.c
@@ -605,7 +605,7 @@ long st_unregister(struct st_proto_s *proto)
605 pr_debug("%s: %d ", __func__, proto->chnl_id); 605 pr_debug("%s: %d ", __func__, proto->chnl_id);
606 606
607 st_kim_ref(&st_gdata, 0); 607 st_kim_ref(&st_gdata, 0);
608 if (proto->chnl_id >= ST_MAX_CHANNELS) { 608 if (!st_gdata || proto->chnl_id >= ST_MAX_CHANNELS) {
609 pr_err(" chnl_id %d not supported", proto->chnl_id); 609 pr_err(" chnl_id %d not supported", proto->chnl_id);
610 return -EPROTONOSUPPORT; 610 return -EPROTONOSUPPORT;
611 } 611 }
diff --git a/drivers/misc/ti-st/st_kim.c b/drivers/misc/ti-st/st_kim.c
index 5da93ee6f6be..38fd2f04c07e 100644
--- a/drivers/misc/ti-st/st_kim.c
+++ b/drivers/misc/ti-st/st_kim.c
@@ -245,9 +245,9 @@ void skip_change_remote_baud(unsigned char **ptr, long *len)
245 pr_err("invalid action after change remote baud command"); 245 pr_err("invalid action after change remote baud command");
246 } else { 246 } else {
247 *ptr = *ptr + sizeof(struct bts_action) + 247 *ptr = *ptr + sizeof(struct bts_action) +
248 ((struct bts_action *)nxt_action)->size; 248 ((struct bts_action *)cur_action)->size;
249 *len = *len - (sizeof(struct bts_action) + 249 *len = *len - (sizeof(struct bts_action) +
250 ((struct bts_action *)nxt_action)->size); 250 ((struct bts_action *)cur_action)->size);
251 /* warn user on not commenting these in firmware */ 251 /* warn user on not commenting these in firmware */
252 pr_warn("skipping the wait event of change remote baud"); 252 pr_warn("skipping the wait event of change remote baud");
253 } 253 }
@@ -604,6 +604,10 @@ void st_kim_ref(struct st_data_s **core_data, int id)
604 struct kim_data_s *kim_gdata; 604 struct kim_data_s *kim_gdata;
605 /* get kim_gdata reference from platform device */ 605 /* get kim_gdata reference from platform device */
606 pdev = st_get_plat_device(id); 606 pdev = st_get_plat_device(id);
607 if (!pdev) {
608 *core_data = NULL;
609 return;
610 }
607 kim_gdata = dev_get_drvdata(&pdev->dev); 611 kim_gdata = dev_get_drvdata(&pdev->dev);
608 *core_data = kim_gdata->core_data; 612 *core_data = kim_gdata->core_data;
609} 613}
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 7721de942c69..fe140724a02e 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -582,6 +582,8 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
582 data->error = -EILSEQ; 582 data->error = -EILSEQ;
583 } else if (status & MCI_DATATIMEOUT) { 583 } else if (status & MCI_DATATIMEOUT) {
584 data->error = -ETIMEDOUT; 584 data->error = -ETIMEDOUT;
585 } else if (status & MCI_STARTBITERR) {
586 data->error = -ECOMM;
585 } else if (status & MCI_TXUNDERRUN) { 587 } else if (status & MCI_TXUNDERRUN) {
586 data->error = -EIO; 588 data->error = -EIO;
587 } else if (status & MCI_RXOVERRUN) { 589 } else if (status & MCI_RXOVERRUN) {
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index bb32e21c09db..2164e8c6476c 100644
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -86,6 +86,7 @@
86#define MCI_CMDRESPEND (1 << 6) 86#define MCI_CMDRESPEND (1 << 6)
87#define MCI_CMDSENT (1 << 7) 87#define MCI_CMDSENT (1 << 7)
88#define MCI_DATAEND (1 << 8) 88#define MCI_DATAEND (1 << 8)
89#define MCI_STARTBITERR (1 << 9)
89#define MCI_DATABLOCKEND (1 << 10) 90#define MCI_DATABLOCKEND (1 << 10)
90#define MCI_CMDACTIVE (1 << 11) 91#define MCI_CMDACTIVE (1 << 11)
91#define MCI_TXACTIVE (1 << 12) 92#define MCI_TXACTIVE (1 << 12)
@@ -112,6 +113,7 @@
112#define MCI_CMDRESPENDCLR (1 << 6) 113#define MCI_CMDRESPENDCLR (1 << 6)
113#define MCI_CMDSENTCLR (1 << 7) 114#define MCI_CMDSENTCLR (1 << 7)
114#define MCI_DATAENDCLR (1 << 8) 115#define MCI_DATAENDCLR (1 << 8)
116#define MCI_STARTBITERRCLR (1 << 9)
115#define MCI_DATABLOCKENDCLR (1 << 10) 117#define MCI_DATABLOCKENDCLR (1 << 10)
116/* Extended status bits for the ST Micro variants */ 118/* Extended status bits for the ST Micro variants */
117#define MCI_ST_SDIOITC (1 << 22) 119#define MCI_ST_SDIOITC (1 << 22)
@@ -127,6 +129,7 @@
127#define MCI_CMDRESPENDMASK (1 << 6) 129#define MCI_CMDRESPENDMASK (1 << 6)
128#define MCI_CMDSENTMASK (1 << 7) 130#define MCI_CMDSENTMASK (1 << 7)
129#define MCI_DATAENDMASK (1 << 8) 131#define MCI_DATAENDMASK (1 << 8)
132#define MCI_STARTBITERRMASK (1 << 9)
130#define MCI_DATABLOCKENDMASK (1 << 10) 133#define MCI_DATABLOCKENDMASK (1 << 10)
131#define MCI_CMDACTIVEMASK (1 << 11) 134#define MCI_CMDACTIVEMASK (1 << 11)
132#define MCI_TXACTIVEMASK (1 << 12) 135#define MCI_TXACTIVEMASK (1 << 12)
@@ -150,7 +153,7 @@
150#define MCI_IRQENABLE \ 153#define MCI_IRQENABLE \
151 (MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \ 154 (MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \
152 MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \ 155 MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \
153 MCI_CMDRESPENDMASK|MCI_CMDSENTMASK) 156 MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_STARTBITERRMASK)
154 157
155/* These interrupts are directed to IRQ1 when two IRQ lines are available */ 158/* These interrupts are directed to IRQ1 when two IRQ lines are available */
156#define MCI_IRQ1MASK \ 159#define MCI_IRQ1MASK \
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index 0bb254c7d2b1..33d8aad8bba5 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -339,9 +339,9 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
339 (FIR_OP_UA << FIR_OP1_SHIFT) | 339 (FIR_OP_UA << FIR_OP1_SHIFT) |
340 (FIR_OP_RBW << FIR_OP2_SHIFT)); 340 (FIR_OP_RBW << FIR_OP2_SHIFT));
341 out_be32(&lbc->fcr, NAND_CMD_READID << FCR_CMD0_SHIFT); 341 out_be32(&lbc->fcr, NAND_CMD_READID << FCR_CMD0_SHIFT);
342 /* 5 bytes for manuf, device and exts */ 342 /* nand_get_flash_type() reads 8 bytes of entire ID string */
343 out_be32(&lbc->fbcr, 5); 343 out_be32(&lbc->fbcr, 8);
344 elbc_fcm_ctrl->read_bytes = 5; 344 elbc_fcm_ctrl->read_bytes = 8;
345 elbc_fcm_ctrl->use_mdr = 1; 345 elbc_fcm_ctrl->use_mdr = 1;
346 elbc_fcm_ctrl->mdr = 0; 346 elbc_fcm_ctrl->mdr = 0;
347 347
diff --git a/drivers/net/8139too.c b/drivers/net/8139too.c
index 98517a373473..e3bad8247fd1 100644
--- a/drivers/net/8139too.c
+++ b/drivers/net/8139too.c
@@ -992,6 +992,7 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev,
992 * features 992 * features
993 */ 993 */
994 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA; 994 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
995 dev->vlan_features = dev->features;
995 996
996 dev->irq = pdev->irq; 997 dev->irq = pdev->irq;
997 998
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 19f04a34783a..93359fab240e 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -3416,7 +3416,8 @@ config NETCONSOLE
3416 3416
3417config NETCONSOLE_DYNAMIC 3417config NETCONSOLE_DYNAMIC
3418 bool "Dynamic reconfiguration of logging targets" 3418 bool "Dynamic reconfiguration of logging targets"
3419 depends on NETCONSOLE && SYSFS && CONFIGFS_FS 3419 depends on NETCONSOLE && SYSFS && CONFIGFS_FS && \
3420 !(NETCONSOLE=y && CONFIGFS_FS=m)
3420 help 3421 help
3421 This option enables the ability to dynamically reconfigure target 3422 This option enables the ability to dynamically reconfigure target
3422 parameters (interface, IP addresses, port numbers, MAC addresses) 3423 parameters (interface, IP addresses, port numbers, MAC addresses)
diff --git a/drivers/net/bna/bnad.c b/drivers/net/bna/bnad.c
index 7d25a97d33f6..44e219c910da 100644
--- a/drivers/net/bna/bnad.c
+++ b/drivers/net/bna/bnad.c
@@ -1111,7 +1111,7 @@ bnad_mbox_irq_alloc(struct bnad *bnad,
1111 struct bna_intr_info *intr_info) 1111 struct bna_intr_info *intr_info)
1112{ 1112{
1113 int err = 0; 1113 int err = 0;
1114 unsigned long flags; 1114 unsigned long irq_flags = 0, flags;
1115 u32 irq; 1115 u32 irq;
1116 irq_handler_t irq_handler; 1116 irq_handler_t irq_handler;
1117 1117
@@ -1125,18 +1125,17 @@ bnad_mbox_irq_alloc(struct bnad *bnad,
1125 if (bnad->cfg_flags & BNAD_CF_MSIX) { 1125 if (bnad->cfg_flags & BNAD_CF_MSIX) {
1126 irq_handler = (irq_handler_t)bnad_msix_mbox_handler; 1126 irq_handler = (irq_handler_t)bnad_msix_mbox_handler;
1127 irq = bnad->msix_table[bnad->msix_num - 1].vector; 1127 irq = bnad->msix_table[bnad->msix_num - 1].vector;
1128 flags = 0;
1129 intr_info->intr_type = BNA_INTR_T_MSIX; 1128 intr_info->intr_type = BNA_INTR_T_MSIX;
1130 intr_info->idl[0].vector = bnad->msix_num - 1; 1129 intr_info->idl[0].vector = bnad->msix_num - 1;
1131 } else { 1130 } else {
1132 irq_handler = (irq_handler_t)bnad_isr; 1131 irq_handler = (irq_handler_t)bnad_isr;
1133 irq = bnad->pcidev->irq; 1132 irq = bnad->pcidev->irq;
1134 flags = IRQF_SHARED; 1133 irq_flags = IRQF_SHARED;
1135 intr_info->intr_type = BNA_INTR_T_INTX; 1134 intr_info->intr_type = BNA_INTR_T_INTX;
1136 /* intr_info->idl.vector = 0 ? */ 1135 /* intr_info->idl.vector = 0 ? */
1137 } 1136 }
1138 spin_unlock_irqrestore(&bnad->bna_lock, flags); 1137 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1139 1138 flags = irq_flags;
1140 sprintf(bnad->mbox_irq_name, "%s", BNAD_NAME); 1139 sprintf(bnad->mbox_irq_name, "%s", BNAD_NAME);
1141 1140
1142 /* 1141 /*
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c
index 4b70311a11ef..74be989f51c5 100644
--- a/drivers/net/bnx2x/bnx2x_main.c
+++ b/drivers/net/bnx2x/bnx2x_main.c
@@ -49,6 +49,7 @@
49#include <linux/zlib.h> 49#include <linux/zlib.h>
50#include <linux/io.h> 50#include <linux/io.h>
51#include <linux/stringify.h> 51#include <linux/stringify.h>
52#include <linux/vmalloc.h>
52 53
53#define BNX2X_MAIN 54#define BNX2X_MAIN
54#include "bnx2x.h" 55#include "bnx2x.h"
@@ -4537,8 +4538,7 @@ static int bnx2x_gunzip_init(struct bnx2x *bp)
4537 if (bp->strm == NULL) 4538 if (bp->strm == NULL)
4538 goto gunzip_nomem2; 4539 goto gunzip_nomem2;
4539 4540
4540 bp->strm->workspace = kmalloc(zlib_inflate_workspacesize(), 4541 bp->strm->workspace = vmalloc(zlib_inflate_workspacesize());
4541 GFP_KERNEL);
4542 if (bp->strm->workspace == NULL) 4542 if (bp->strm->workspace == NULL)
4543 goto gunzip_nomem3; 4543 goto gunzip_nomem3;
4544 4544
@@ -4562,7 +4562,7 @@ gunzip_nomem1:
4562static void bnx2x_gunzip_end(struct bnx2x *bp) 4562static void bnx2x_gunzip_end(struct bnx2x *bp)
4563{ 4563{
4564 if (bp->strm) { 4564 if (bp->strm) {
4565 kfree(bp->strm->workspace); 4565 vfree(bp->strm->workspace);
4566 kfree(bp->strm); 4566 kfree(bp->strm);
4567 bp->strm = NULL; 4567 bp->strm = NULL;
4568 } 4568 }
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index 1d699e3df547..754df5ef1729 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -36,7 +36,7 @@ config CAN_SLCAN
36config CAN_DEV 36config CAN_DEV
37 tristate "Platform CAN drivers with Netlink support" 37 tristate "Platform CAN drivers with Netlink support"
38 depends on CAN 38 depends on CAN
39 default Y 39 default y
40 ---help--- 40 ---help---
41 Enables the common framework for platform CAN drivers with Netlink 41 Enables the common framework for platform CAN drivers with Netlink
42 support. This is the standard library for CAN drivers. 42 support. This is the standard library for CAN drivers.
@@ -45,7 +45,7 @@ config CAN_DEV
45config CAN_CALC_BITTIMING 45config CAN_CALC_BITTIMING
46 bool "CAN bit-timing calculation" 46 bool "CAN bit-timing calculation"
47 depends on CAN_DEV 47 depends on CAN_DEV
48 default Y 48 default y
49 ---help--- 49 ---help---
50 If enabled, CAN bit-timing parameters will be calculated for the 50 If enabled, CAN bit-timing parameters will be calculated for the
51 bit-rate specified via Netlink argument "bitrate" when the device 51 bit-rate specified via Netlink argument "bitrate" when the device
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c
index 3f562ba2f0c9..76bf5892b962 100644
--- a/drivers/net/cxgb3/sge.c
+++ b/drivers/net/cxgb3/sge.c
@@ -2026,7 +2026,7 @@ static void rx_eth(struct adapter *adap, struct sge_rspq *rq,
2026 skb->ip_summed = CHECKSUM_UNNECESSARY; 2026 skb->ip_summed = CHECKSUM_UNNECESSARY;
2027 } else 2027 } else
2028 skb_checksum_none_assert(skb); 2028 skb_checksum_none_assert(skb);
2029 skb_record_rx_queue(skb, qs - &adap->sge.qs[0]); 2029 skb_record_rx_queue(skb, qs - &adap->sge.qs[pi->first_qset]);
2030 2030
2031 if (unlikely(p->vlan_valid)) { 2031 if (unlikely(p->vlan_valid)) {
2032 struct vlan_group *grp = pi->vlan_grp; 2032 struct vlan_group *grp = pi->vlan_grp;
@@ -2145,7 +2145,7 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
2145 if (!complete) 2145 if (!complete)
2146 return; 2146 return;
2147 2147
2148 skb_record_rx_queue(skb, qs - &adap->sge.qs[0]); 2148 skb_record_rx_queue(skb, qs - &adap->sge.qs[pi->first_qset]);
2149 2149
2150 if (unlikely(cpl->vlan_valid)) { 2150 if (unlikely(cpl->vlan_valid)) {
2151 struct vlan_group *grp = pi->vlan_grp; 2151 struct vlan_group *grp = pi->vlan_grp;
diff --git a/drivers/net/greth.c b/drivers/net/greth.c
index f181304a7ab6..672f096fe090 100644
--- a/drivers/net/greth.c
+++ b/drivers/net/greth.c
@@ -1015,11 +1015,10 @@ static int greth_set_mac_add(struct net_device *dev, void *p)
1015 return -EINVAL; 1015 return -EINVAL;
1016 1016
1017 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 1017 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1018 GRETH_REGSAVE(regs->esa_msb, dev->dev_addr[0] << 8 | dev->dev_addr[1]);
1019 GRETH_REGSAVE(regs->esa_lsb, dev->dev_addr[2] << 24 | dev->dev_addr[3] << 16 |
1020 dev->dev_addr[4] << 8 | dev->dev_addr[5]);
1018 1021
1019 GRETH_REGSAVE(regs->esa_msb, addr->sa_data[0] << 8 | addr->sa_data[1]);
1020 GRETH_REGSAVE(regs->esa_lsb,
1021 addr->sa_data[2] << 24 | addr->
1022 sa_data[3] << 16 | addr->sa_data[4] << 8 | addr->sa_data[5]);
1023 return 0; 1022 return 0;
1024} 1023}
1025 1024
diff --git a/drivers/net/hamradio/6pack.c b/drivers/net/hamradio/6pack.c
index 3e5d0b6b6516..0d283781bc5e 100644
--- a/drivers/net/hamradio/6pack.c
+++ b/drivers/net/hamradio/6pack.c
@@ -692,10 +692,10 @@ static void sixpack_close(struct tty_struct *tty)
692{ 692{
693 struct sixpack *sp; 693 struct sixpack *sp;
694 694
695 write_lock(&disc_data_lock); 695 write_lock_bh(&disc_data_lock);
696 sp = tty->disc_data; 696 sp = tty->disc_data;
697 tty->disc_data = NULL; 697 tty->disc_data = NULL;
698 write_unlock(&disc_data_lock); 698 write_unlock_bh(&disc_data_lock);
699 if (!sp) 699 if (!sp)
700 return; 700 return;
701 701
diff --git a/drivers/net/hamradio/mkiss.c b/drivers/net/hamradio/mkiss.c
index 4c628393c8b1..bc02968cee16 100644
--- a/drivers/net/hamradio/mkiss.c
+++ b/drivers/net/hamradio/mkiss.c
@@ -813,10 +813,10 @@ static void mkiss_close(struct tty_struct *tty)
813{ 813{
814 struct mkiss *ax; 814 struct mkiss *ax;
815 815
816 write_lock(&disc_data_lock); 816 write_lock_bh(&disc_data_lock);
817 ax = tty->disc_data; 817 ax = tty->disc_data;
818 tty->disc_data = NULL; 818 tty->disc_data = NULL;
819 write_unlock(&disc_data_lock); 819 write_unlock_bh(&disc_data_lock);
820 820
821 if (!ax) 821 if (!ax)
822 return; 822 return;
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c
index b78be088c4ad..8f8b65af9ed5 100644
--- a/drivers/net/natsemi.c
+++ b/drivers/net/natsemi.c
@@ -2360,7 +2360,8 @@ static void netdev_rx(struct net_device *dev, int *work_done, int work_to_do)
2360 PCI_DMA_FROMDEVICE); 2360 PCI_DMA_FROMDEVICE);
2361 } else { 2361 } else {
2362 pci_unmap_single(np->pci_dev, np->rx_dma[entry], 2362 pci_unmap_single(np->pci_dev, np->rx_dma[entry],
2363 buflen, PCI_DMA_FROMDEVICE); 2363 buflen + NATSEMI_PADDING,
2364 PCI_DMA_FROMDEVICE);
2364 skb_put(skb = np->rx_skbuff[entry], pkt_len); 2365 skb_put(skb = np->rx_skbuff[entry], pkt_len);
2365 np->rx_skbuff[entry] = NULL; 2366 np->rx_skbuff[entry] = NULL;
2366 } 2367 }
diff --git a/drivers/net/ppp_deflate.c b/drivers/net/ppp_deflate.c
index 31e9407a0739..1dbdf82a6dfd 100644
--- a/drivers/net/ppp_deflate.c
+++ b/drivers/net/ppp_deflate.c
@@ -305,7 +305,7 @@ static void z_decomp_free(void *arg)
305 305
306 if (state) { 306 if (state) {
307 zlib_inflateEnd(&state->strm); 307 zlib_inflateEnd(&state->strm);
308 kfree(state->strm.workspace); 308 vfree(state->strm.workspace);
309 kfree(state); 309 kfree(state);
310 } 310 }
311} 311}
@@ -345,8 +345,7 @@ static void *z_decomp_alloc(unsigned char *options, int opt_len)
345 345
346 state->w_size = w_size; 346 state->w_size = w_size;
347 state->strm.next_out = NULL; 347 state->strm.next_out = NULL;
348 state->strm.workspace = kmalloc(zlib_inflate_workspacesize(), 348 state->strm.workspace = vmalloc(zlib_inflate_workspacesize());
349 GFP_KERNEL|__GFP_REPEAT);
350 if (state->strm.workspace == NULL) 349 if (state->strm.workspace == NULL)
351 goto out_free; 350 goto out_free;
352 351
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h
index d32850715f5c..ca306fd5f588 100644
--- a/drivers/net/qlge/qlge.h
+++ b/drivers/net/qlge/qlge.h
@@ -16,7 +16,7 @@
16 */ 16 */
17#define DRV_NAME "qlge" 17#define DRV_NAME "qlge"
18#define DRV_STRING "QLogic 10 Gigabit PCI-E Ethernet Driver " 18#define DRV_STRING "QLogic 10 Gigabit PCI-E Ethernet Driver "
19#define DRV_VERSION "v1.00.00.27.00.00-01" 19#define DRV_VERSION "v1.00.00.29.00.00-01"
20 20
21#define WQ_ADDR_ALIGN 0x3 /* 4 byte alignment */ 21#define WQ_ADDR_ALIGN 0x3 /* 4 byte alignment */
22 22
@@ -1996,6 +1996,7 @@ enum {
1996 QL_LB_LINK_UP = 10, 1996 QL_LB_LINK_UP = 10,
1997 QL_FRC_COREDUMP = 11, 1997 QL_FRC_COREDUMP = 11,
1998 QL_EEH_FATAL = 12, 1998 QL_EEH_FATAL = 12,
1999 QL_ASIC_RECOVERY = 14, /* We are in ascic recovery. */
1999}; 2000};
2000 2001
2001/* link_status bit definitions */ 2002/* link_status bit definitions */
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index 930ae45457bb..6b4ff970972b 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -2152,6 +2152,10 @@ void ql_queue_asic_error(struct ql_adapter *qdev)
2152 * thread 2152 * thread
2153 */ 2153 */
2154 clear_bit(QL_ADAPTER_UP, &qdev->flags); 2154 clear_bit(QL_ADAPTER_UP, &qdev->flags);
2155 /* Set asic recovery bit to indicate reset process that we are
2156 * in fatal error recovery process rather than normal close
2157 */
2158 set_bit(QL_ASIC_RECOVERY, &qdev->flags);
2155 queue_delayed_work(qdev->workqueue, &qdev->asic_reset_work, 0); 2159 queue_delayed_work(qdev->workqueue, &qdev->asic_reset_work, 0);
2156} 2160}
2157 2161
@@ -2166,23 +2170,20 @@ static void ql_process_chip_ae_intr(struct ql_adapter *qdev,
2166 return; 2170 return;
2167 2171
2168 case CAM_LOOKUP_ERR_EVENT: 2172 case CAM_LOOKUP_ERR_EVENT:
2169 netif_err(qdev, link, qdev->ndev, 2173 netdev_err(qdev->ndev, "Multiple CAM hits lookup occurred.\n");
2170 "Multiple CAM hits lookup occurred.\n"); 2174 netdev_err(qdev->ndev, "This event shouldn't occur.\n");
2171 netif_err(qdev, drv, qdev->ndev,
2172 "This event shouldn't occur.\n");
2173 ql_queue_asic_error(qdev); 2175 ql_queue_asic_error(qdev);
2174 return; 2176 return;
2175 2177
2176 case SOFT_ECC_ERROR_EVENT: 2178 case SOFT_ECC_ERROR_EVENT:
2177 netif_err(qdev, rx_err, qdev->ndev, 2179 netdev_err(qdev->ndev, "Soft ECC error detected.\n");
2178 "Soft ECC error detected.\n");
2179 ql_queue_asic_error(qdev); 2180 ql_queue_asic_error(qdev);
2180 break; 2181 break;
2181 2182
2182 case PCI_ERR_ANON_BUF_RD: 2183 case PCI_ERR_ANON_BUF_RD:
2183 netif_err(qdev, rx_err, qdev->ndev, 2184 netdev_err(qdev->ndev, "PCI error occurred when reading "
2184 "PCI error occurred when reading anonymous buffers from rx_ring %d.\n", 2185 "anonymous buffers from rx_ring %d.\n",
2185 ib_ae_rsp->q_id); 2186 ib_ae_rsp->q_id);
2186 ql_queue_asic_error(qdev); 2187 ql_queue_asic_error(qdev);
2187 break; 2188 break;
2188 2189
@@ -2437,11 +2438,10 @@ static irqreturn_t qlge_isr(int irq, void *dev_id)
2437 */ 2438 */
2438 if (var & STS_FE) { 2439 if (var & STS_FE) {
2439 ql_queue_asic_error(qdev); 2440 ql_queue_asic_error(qdev);
2440 netif_err(qdev, intr, qdev->ndev, 2441 netdev_err(qdev->ndev, "Got fatal error, STS = %x.\n", var);
2441 "Got fatal error, STS = %x.\n", var);
2442 var = ql_read32(qdev, ERR_STS); 2442 var = ql_read32(qdev, ERR_STS);
2443 netif_err(qdev, intr, qdev->ndev, 2443 netdev_err(qdev->ndev, "Resetting chip. "
2444 "Resetting chip. Error Status Register = 0x%x\n", var); 2444 "Error Status Register = 0x%x\n", var);
2445 return IRQ_HANDLED; 2445 return IRQ_HANDLED;
2446 } 2446 }
2447 2447
@@ -3818,11 +3818,17 @@ static int ql_adapter_reset(struct ql_adapter *qdev)
3818 end_jiffies = jiffies + 3818 end_jiffies = jiffies +
3819 max((unsigned long)1, usecs_to_jiffies(30)); 3819 max((unsigned long)1, usecs_to_jiffies(30));
3820 3820
3821 /* Stop management traffic. */ 3821 /* Check if bit is set then skip the mailbox command and
3822 ql_mb_set_mgmnt_traffic_ctl(qdev, MB_SET_MPI_TFK_STOP); 3822 * clear the bit, else we are in normal reset process.
3823 */
3824 if (!test_bit(QL_ASIC_RECOVERY, &qdev->flags)) {
3825 /* Stop management traffic. */
3826 ql_mb_set_mgmnt_traffic_ctl(qdev, MB_SET_MPI_TFK_STOP);
3823 3827
3824 /* Wait for the NIC and MGMNT FIFOs to empty. */ 3828 /* Wait for the NIC and MGMNT FIFOs to empty. */
3825 ql_wait_fifo_empty(qdev); 3829 ql_wait_fifo_empty(qdev);
3830 } else
3831 clear_bit(QL_ASIC_RECOVERY, &qdev->flags);
3826 3832
3827 ql_write32(qdev, RST_FO, (RST_FO_FR << 16) | RST_FO_FR); 3833 ql_write32(qdev, RST_FO, (RST_FO_FR << 16) | RST_FO_FR);
3828 3834
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 05d81780d1fd..5990621fb5cd 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -742,7 +742,7 @@ static void rtl8168_oob_notify(struct rtl8169_private *tp, u8 cmd)
742 msleep(2); 742 msleep(2);
743 for (i = 0; i < 5; i++) { 743 for (i = 0; i < 5; i++) {
744 udelay(100); 744 udelay(100);
745 if (!(RTL_R32(ERIDR) & ERIAR_FLAG)) 745 if (!(RTL_R32(ERIAR) & ERIAR_FLAG))
746 break; 746 break;
747 } 747 }
748 748
diff --git a/drivers/net/rionet.c b/drivers/net/rionet.c
index 77c5092a6a40..5d3436d47edd 100644
--- a/drivers/net/rionet.c
+++ b/drivers/net/rionet.c
@@ -378,7 +378,7 @@ static int rionet_close(struct net_device *ndev)
378 378
379static void rionet_remove(struct rio_dev *rdev) 379static void rionet_remove(struct rio_dev *rdev)
380{ 380{
381 struct net_device *ndev = NULL; 381 struct net_device *ndev = rio_get_drvdata(rdev);
382 struct rionet_peer *peer, *tmp; 382 struct rionet_peer *peer, *tmp;
383 383
384 free_pages((unsigned long)rionet_active, rdev->net->hport->sys_size ? 384 free_pages((unsigned long)rionet_active, rdev->net->hport->sys_size ?
@@ -433,22 +433,12 @@ static const struct net_device_ops rionet_netdev_ops = {
433 .ndo_set_mac_address = eth_mac_addr, 433 .ndo_set_mac_address = eth_mac_addr,
434}; 434};
435 435
436static int rionet_setup_netdev(struct rio_mport *mport) 436static int rionet_setup_netdev(struct rio_mport *mport, struct net_device *ndev)
437{ 437{
438 int rc = 0; 438 int rc = 0;
439 struct net_device *ndev = NULL;
440 struct rionet_private *rnet; 439 struct rionet_private *rnet;
441 u16 device_id; 440 u16 device_id;
442 441
443 /* Allocate our net_device structure */
444 ndev = alloc_etherdev(sizeof(struct rionet_private));
445 if (ndev == NULL) {
446 printk(KERN_INFO "%s: could not allocate ethernet device.\n",
447 DRV_NAME);
448 rc = -ENOMEM;
449 goto out;
450 }
451
452 rionet_active = (struct rio_dev **)__get_free_pages(GFP_KERNEL, 442 rionet_active = (struct rio_dev **)__get_free_pages(GFP_KERNEL,
453 mport->sys_size ? __fls(sizeof(void *)) + 4 : 0); 443 mport->sys_size ? __fls(sizeof(void *)) + 4 : 0);
454 if (!rionet_active) { 444 if (!rionet_active) {
@@ -504,11 +494,21 @@ static int rionet_probe(struct rio_dev *rdev, const struct rio_device_id *id)
504 int rc = -ENODEV; 494 int rc = -ENODEV;
505 u32 lpef, lsrc_ops, ldst_ops; 495 u32 lpef, lsrc_ops, ldst_ops;
506 struct rionet_peer *peer; 496 struct rionet_peer *peer;
497 struct net_device *ndev = NULL;
507 498
508 /* If local device is not rionet capable, give up quickly */ 499 /* If local device is not rionet capable, give up quickly */
509 if (!rionet_capable) 500 if (!rionet_capable)
510 goto out; 501 goto out;
511 502
503 /* Allocate our net_device structure */
504 ndev = alloc_etherdev(sizeof(struct rionet_private));
505 if (ndev == NULL) {
506 printk(KERN_INFO "%s: could not allocate ethernet device.\n",
507 DRV_NAME);
508 rc = -ENOMEM;
509 goto out;
510 }
511
512 /* 512 /*
513 * First time through, make sure local device is rionet 513 * First time through, make sure local device is rionet
514 * capable, setup netdev, and set flags so this is skipped 514 * capable, setup netdev, and set flags so this is skipped
@@ -529,7 +529,7 @@ static int rionet_probe(struct rio_dev *rdev, const struct rio_device_id *id)
529 goto out; 529 goto out;
530 } 530 }
531 531
532 rc = rionet_setup_netdev(rdev->net->hport); 532 rc = rionet_setup_netdev(rdev->net->hport, ndev);
533 rionet_check = 1; 533 rionet_check = 1;
534 } 534 }
535 535
@@ -546,6 +546,8 @@ static int rionet_probe(struct rio_dev *rdev, const struct rio_device_id *id)
546 list_add_tail(&peer->node, &rionet_peers); 546 list_add_tail(&peer->node, &rionet_peers);
547 } 547 }
548 548
549 rio_set_drvdata(rdev, ndev);
550
549 out: 551 out:
550 return rc; 552 return rc;
551} 553}
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 8a72a979ee71..1f3f7b4dd638 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -140,6 +140,8 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
140 .tpauser = 1, 140 .tpauser = 1,
141 .hw_swap = 1, 141 .hw_swap = 1,
142 .no_ade = 1, 142 .no_ade = 1,
143 .rpadir = 1,
144 .rpadir_value = 2 << 16,
143}; 145};
144 146
145#define SH_GIGA_ETH_BASE 0xfee00000 147#define SH_GIGA_ETH_BASE 0xfee00000
@@ -1184,8 +1186,8 @@ static void sh_eth_adjust_link(struct net_device *ndev)
1184 mdp->cd->set_rate(ndev); 1186 mdp->cd->set_rate(ndev);
1185 } 1187 }
1186 if (mdp->link == PHY_DOWN) { 1188 if (mdp->link == PHY_DOWN) {
1187 sh_eth_write(ndev, (sh_eth_read(ndev, ECMR) & ~ECMR_TXF) 1189 sh_eth_write(ndev,
1188 | ECMR_DM, ECMR); 1190 (sh_eth_read(ndev, ECMR) & ~ECMR_TXF), ECMR);
1189 new_state = 1; 1191 new_state = 1;
1190 mdp->link = phydev->link; 1192 mdp->link = phydev->link;
1191 } 1193 }
diff --git a/drivers/net/usb/kalmia.c b/drivers/net/usb/kalmia.c
index d965fb1e013e..a9b6c63d54e4 100644
--- a/drivers/net/usb/kalmia.c
+++ b/drivers/net/usb/kalmia.c
@@ -100,34 +100,42 @@ kalmia_send_init_packet(struct usbnet *dev, u8 *init_msg, u8 init_msg_len,
100static int 100static int
101kalmia_init_and_get_ethernet_addr(struct usbnet *dev, u8 *ethernet_addr) 101kalmia_init_and_get_ethernet_addr(struct usbnet *dev, u8 *ethernet_addr)
102{ 102{
103 char init_msg_1[] = 103 const static char init_msg_1[] =
104 { 0x57, 0x50, 0x04, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 104 { 0x57, 0x50, 0x04, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00,
105 0x00, 0x00 }; 105 0x00, 0x00 };
106 char init_msg_2[] = 106 const static char init_msg_2[] =
107 { 0x57, 0x50, 0x04, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xf4, 107 { 0x57, 0x50, 0x04, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xf4,
108 0x00, 0x00 }; 108 0x00, 0x00 };
109 char receive_buf[28]; 109 const static int buflen = 28;
110 char *usb_buf;
110 int status; 111 int status;
111 112
112 status = kalmia_send_init_packet(dev, init_msg_1, sizeof(init_msg_1) 113 usb_buf = kmalloc(buflen, GFP_DMA | GFP_KERNEL);
113 / sizeof(init_msg_1[0]), receive_buf, 24); 114 if (!usb_buf)
115 return -ENOMEM;
116
117 memcpy(usb_buf, init_msg_1, 12);
118 status = kalmia_send_init_packet(dev, usb_buf, sizeof(init_msg_1)
119 / sizeof(init_msg_1[0]), usb_buf, 24);
114 if (status != 0) 120 if (status != 0)
115 return status; 121 return status;
116 122
117 status = kalmia_send_init_packet(dev, init_msg_2, sizeof(init_msg_2) 123 memcpy(usb_buf, init_msg_2, 12);
118 / sizeof(init_msg_2[0]), receive_buf, 28); 124 status = kalmia_send_init_packet(dev, usb_buf, sizeof(init_msg_2)
125 / sizeof(init_msg_2[0]), usb_buf, 28);
119 if (status != 0) 126 if (status != 0)
120 return status; 127 return status;
121 128
122 memcpy(ethernet_addr, receive_buf + 10, ETH_ALEN); 129 memcpy(ethernet_addr, usb_buf + 10, ETH_ALEN);
123 130
131 kfree(usb_buf);
124 return status; 132 return status;
125} 133}
126 134
127static int 135static int
128kalmia_bind(struct usbnet *dev, struct usb_interface *intf) 136kalmia_bind(struct usbnet *dev, struct usb_interface *intf)
129{ 137{
130 u8 status; 138 int status;
131 u8 ethernet_addr[ETH_ALEN]; 139 u8 ethernet_addr[ETH_ALEN];
132 140
133 /* Don't bind to AT command interface */ 141 /* Don't bind to AT command interface */
@@ -190,7 +198,8 @@ kalmia_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
190 dev_kfree_skb_any(skb); 198 dev_kfree_skb_any(skb);
191 skb = skb2; 199 skb = skb2;
192 200
193 done: header_start = skb_push(skb, KALMIA_HEADER_LENGTH); 201done:
202 header_start = skb_push(skb, KALMIA_HEADER_LENGTH);
194 ether_type_1 = header_start[KALMIA_HEADER_LENGTH + 12]; 203 ether_type_1 = header_start[KALMIA_HEADER_LENGTH + 12];
195 ether_type_2 = header_start[KALMIA_HEADER_LENGTH + 13]; 204 ether_type_2 = header_start[KALMIA_HEADER_LENGTH + 13];
196 205
@@ -201,9 +210,8 @@ kalmia_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
201 header_start[0] = 0x57; 210 header_start[0] = 0x57;
202 header_start[1] = 0x44; 211 header_start[1] = 0x44;
203 content_len = skb->len - KALMIA_HEADER_LENGTH; 212 content_len = skb->len - KALMIA_HEADER_LENGTH;
204 header_start[2] = (content_len & 0xff); /* low byte */
205 header_start[3] = (content_len >> 8); /* high byte */
206 213
214 put_unaligned_le16(content_len, &header_start[2]);
207 header_start[4] = ether_type_1; 215 header_start[4] = ether_type_1;
208 header_start[5] = ether_type_2; 216 header_start[5] = ether_type_2;
209 217
@@ -231,13 +239,13 @@ kalmia_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
231 * Our task here is to strip off framing, leaving skb with one 239 * Our task here is to strip off framing, leaving skb with one
232 * data frame for the usbnet framework code to process. 240 * data frame for the usbnet framework code to process.
233 */ 241 */
234 const u8 HEADER_END_OF_USB_PACKET[] = 242 const static u8 HEADER_END_OF_USB_PACKET[] =
235 { 0x57, 0x5a, 0x00, 0x00, 0x08, 0x00 }; 243 { 0x57, 0x5a, 0x00, 0x00, 0x08, 0x00 };
236 const u8 EXPECTED_UNKNOWN_HEADER_1[] = 244 const static u8 EXPECTED_UNKNOWN_HEADER_1[] =
237 { 0x57, 0x43, 0x1e, 0x00, 0x15, 0x02 }; 245 { 0x57, 0x43, 0x1e, 0x00, 0x15, 0x02 };
238 const u8 EXPECTED_UNKNOWN_HEADER_2[] = 246 const static u8 EXPECTED_UNKNOWN_HEADER_2[] =
239 { 0x57, 0x50, 0x0e, 0x00, 0x00, 0x00 }; 247 { 0x57, 0x50, 0x0e, 0x00, 0x00, 0x00 };
240 u8 i = 0; 248 int i = 0;
241 249
242 /* incomplete header? */ 250 /* incomplete header? */
243 if (skb->len < KALMIA_HEADER_LENGTH) 251 if (skb->len < KALMIA_HEADER_LENGTH)
@@ -285,7 +293,7 @@ kalmia_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
285 293
286 /* subtract start header and end header */ 294 /* subtract start header and end header */
287 usb_packet_length = skb->len - (2 * KALMIA_HEADER_LENGTH); 295 usb_packet_length = skb->len - (2 * KALMIA_HEADER_LENGTH);
288 ether_packet_length = header_start[2] + (header_start[3] << 8); 296 ether_packet_length = get_unaligned_le16(&header_start[2]);
289 skb_pull(skb, KALMIA_HEADER_LENGTH); 297 skb_pull(skb, KALMIA_HEADER_LENGTH);
290 298
291 /* Some small packets misses end marker */ 299 /* Some small packets misses end marker */
diff --git a/drivers/net/usb/zaurus.c b/drivers/net/usb/zaurus.c
index 241756e0e86f..1a2234c20514 100644
--- a/drivers/net/usb/zaurus.c
+++ b/drivers/net/usb/zaurus.c
@@ -331,17 +331,7 @@ static const struct usb_device_id products [] = {
331 ZAURUS_MASTER_INTERFACE, 331 ZAURUS_MASTER_INTERFACE,
332 .driver_info = ZAURUS_PXA_INFO, 332 .driver_info = ZAURUS_PXA_INFO,
333}, 333},
334
335
336/* At least some of the newest PXA units have very different lies about
337 * their standards support: they claim to be cell phones offering
338 * direct access to their radios! (No, they don't conform to CDC MDLM.)
339 */
340{ 334{
341 USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_MDLM,
342 USB_CDC_PROTO_NONE),
343 .driver_info = (unsigned long) &bogus_mdlm_info,
344}, {
345 /* Motorola MOTOMAGX phones */ 335 /* Motorola MOTOMAGX phones */
346 USB_DEVICE_AND_INTERFACE_INFO(0x22b8, 0x6425, USB_CLASS_COMM, 336 USB_DEVICE_AND_INTERFACE_INFO(0x22b8, 0x6425, USB_CLASS_COMM,
347 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 337 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c
index fa6e2ac7475a..67402350d0df 100644
--- a/drivers/net/vmxnet3/vmxnet3_drv.c
+++ b/drivers/net/vmxnet3/vmxnet3_drv.c
@@ -575,7 +575,7 @@ vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
575 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx]; 575 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
576 u32 val; 576 u32 val;
577 577
578 while (num_allocated < num_to_alloc) { 578 while (num_allocated <= num_to_alloc) {
579 struct vmxnet3_rx_buf_info *rbi; 579 struct vmxnet3_rx_buf_info *rbi;
580 union Vmxnet3_GenericDesc *gd; 580 union Vmxnet3_GenericDesc *gd;
581 581
@@ -621,9 +621,15 @@ vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
621 621
622 BUG_ON(rbi->dma_addr == 0); 622 BUG_ON(rbi->dma_addr == 0);
623 gd->rxd.addr = cpu_to_le64(rbi->dma_addr); 623 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
624 gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT) 624 gd->dword[2] = cpu_to_le32((!ring->gen << VMXNET3_RXD_GEN_SHIFT)
625 | val | rbi->len); 625 | val | rbi->len);
626 626
627 /* Fill the last buffer but dont mark it ready, or else the
628 * device will think that the queue is full */
629 if (num_allocated == num_to_alloc)
630 break;
631
632 gd->dword[2] |= cpu_to_le32(ring->gen << VMXNET3_RXD_GEN_SHIFT);
627 num_allocated++; 633 num_allocated++;
628 vmxnet3_cmd_ring_adv_next2fill(ring); 634 vmxnet3_cmd_ring_adv_next2fill(ring);
629 } 635 }
@@ -1140,6 +1146,7 @@ vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1140 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2 1146 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2
1141 }; 1147 };
1142 u32 num_rxd = 0; 1148 u32 num_rxd = 0;
1149 bool skip_page_frags = false;
1143 struct Vmxnet3_RxCompDesc *rcd; 1150 struct Vmxnet3_RxCompDesc *rcd;
1144 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx; 1151 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1145#ifdef __BIG_ENDIAN_BITFIELD 1152#ifdef __BIG_ENDIAN_BITFIELD
@@ -1150,11 +1157,12 @@ vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1150 &rxComp); 1157 &rxComp);
1151 while (rcd->gen == rq->comp_ring.gen) { 1158 while (rcd->gen == rq->comp_ring.gen) {
1152 struct vmxnet3_rx_buf_info *rbi; 1159 struct vmxnet3_rx_buf_info *rbi;
1153 struct sk_buff *skb; 1160 struct sk_buff *skb, *new_skb = NULL;
1161 struct page *new_page = NULL;
1154 int num_to_alloc; 1162 int num_to_alloc;
1155 struct Vmxnet3_RxDesc *rxd; 1163 struct Vmxnet3_RxDesc *rxd;
1156 u32 idx, ring_idx; 1164 u32 idx, ring_idx;
1157 1165 struct vmxnet3_cmd_ring *ring = NULL;
1158 if (num_rxd >= quota) { 1166 if (num_rxd >= quota) {
1159 /* we may stop even before we see the EOP desc of 1167 /* we may stop even before we see the EOP desc of
1160 * the current pkt 1168 * the current pkt
@@ -1165,6 +1173,7 @@ vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1165 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2); 1173 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2);
1166 idx = rcd->rxdIdx; 1174 idx = rcd->rxdIdx;
1167 ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1; 1175 ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1;
1176 ring = rq->rx_ring + ring_idx;
1168 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd, 1177 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1169 &rxCmdDesc); 1178 &rxCmdDesc);
1170 rbi = rq->buf_info[ring_idx] + idx; 1179 rbi = rq->buf_info[ring_idx] + idx;
@@ -1193,37 +1202,80 @@ vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1193 goto rcd_done; 1202 goto rcd_done;
1194 } 1203 }
1195 1204
1205 skip_page_frags = false;
1196 ctx->skb = rbi->skb; 1206 ctx->skb = rbi->skb;
1197 rbi->skb = NULL; 1207 new_skb = dev_alloc_skb(rbi->len + NET_IP_ALIGN);
1208 if (new_skb == NULL) {
1209 /* Skb allocation failed, do not handover this
1210 * skb to stack. Reuse it. Drop the existing pkt
1211 */
1212 rq->stats.rx_buf_alloc_failure++;
1213 ctx->skb = NULL;
1214 rq->stats.drop_total++;
1215 skip_page_frags = true;
1216 goto rcd_done;
1217 }
1198 1218
1199 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len, 1219 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len,
1200 PCI_DMA_FROMDEVICE); 1220 PCI_DMA_FROMDEVICE);
1201 1221
1202 skb_put(ctx->skb, rcd->len); 1222 skb_put(ctx->skb, rcd->len);
1223
1224 /* Immediate refill */
1225 new_skb->dev = adapter->netdev;
1226 skb_reserve(new_skb, NET_IP_ALIGN);
1227 rbi->skb = new_skb;
1228 rbi->dma_addr = pci_map_single(adapter->pdev,
1229 rbi->skb->data, rbi->len,
1230 PCI_DMA_FROMDEVICE);
1231 rxd->addr = cpu_to_le64(rbi->dma_addr);
1232 rxd->len = rbi->len;
1233
1203 } else { 1234 } else {
1204 BUG_ON(ctx->skb == NULL); 1235 BUG_ON(ctx->skb == NULL && !skip_page_frags);
1236
1205 /* non SOP buffer must be type 1 in most cases */ 1237 /* non SOP buffer must be type 1 in most cases */
1206 if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) { 1238 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE);
1207 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY); 1239 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1208 1240
1209 if (rcd->len) { 1241 /* If an sop buffer was dropped, skip all
1210 pci_unmap_page(adapter->pdev, 1242 * following non-sop fragments. They will be reused.
1211 rbi->dma_addr, rbi->len, 1243 */
1212 PCI_DMA_FROMDEVICE); 1244 if (skip_page_frags)
1245 goto rcd_done;
1213 1246
1214 vmxnet3_append_frag(ctx->skb, rcd, rbi); 1247 new_page = alloc_page(GFP_ATOMIC);
1215 rbi->page = NULL; 1248 if (unlikely(new_page == NULL)) {
1216 } 1249 /* Replacement page frag could not be allocated.
1217 } else { 1250 * Reuse this page. Drop the pkt and free the
1218 /* 1251 * skb which contained this page as a frag. Skip
1219 * The only time a non-SOP buffer is type 0 is 1252 * processing all the following non-sop frags.
1220 * when it's EOP and error flag is raised, which
1221 * has already been handled.
1222 */ 1253 */
1223 BUG_ON(true); 1254 rq->stats.rx_buf_alloc_failure++;
1255 dev_kfree_skb(ctx->skb);
1256 ctx->skb = NULL;
1257 skip_page_frags = true;
1258 goto rcd_done;
1259 }
1260
1261 if (rcd->len) {
1262 pci_unmap_page(adapter->pdev,
1263 rbi->dma_addr, rbi->len,
1264 PCI_DMA_FROMDEVICE);
1265
1266 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1224 } 1267 }
1268
1269 /* Immediate refill */
1270 rbi->page = new_page;
1271 rbi->dma_addr = pci_map_page(adapter->pdev, rbi->page,
1272 0, PAGE_SIZE,
1273 PCI_DMA_FROMDEVICE);
1274 rxd->addr = cpu_to_le64(rbi->dma_addr);
1275 rxd->len = rbi->len;
1225 } 1276 }
1226 1277
1278
1227 skb = ctx->skb; 1279 skb = ctx->skb;
1228 if (rcd->eop) { 1280 if (rcd->eop) {
1229 skb->len += skb->data_len; 1281 skb->len += skb->data_len;
@@ -1244,26 +1296,27 @@ vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1244 } 1296 }
1245 1297
1246rcd_done: 1298rcd_done:
1247 /* device may skip some rx descs */ 1299 /* device may have skipped some rx descs */
1248 rq->rx_ring[ring_idx].next2comp = idx; 1300 ring->next2comp = idx;
1249 VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp, 1301 num_to_alloc = vmxnet3_cmd_ring_desc_avail(ring);
1250 rq->rx_ring[ring_idx].size); 1302 ring = rq->rx_ring + ring_idx;
1251 1303 while (num_to_alloc) {
1252 /* refill rx buffers frequently to avoid starving the h/w */ 1304 vmxnet3_getRxDesc(rxd, &ring->base[ring->next2fill].rxd,
1253 num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring + 1305 &rxCmdDesc);
1254 ring_idx); 1306 BUG_ON(!rxd->addr);
1255 if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq, 1307
1256 ring_idx, adapter))) { 1308 /* Recv desc is ready to be used by the device */
1257 vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc, 1309 rxd->gen = ring->gen;
1258 adapter); 1310 vmxnet3_cmd_ring_adv_next2fill(ring);
1259 1311 num_to_alloc--;
1260 /* if needed, update the register */ 1312 }
1261 if (unlikely(rq->shared->updateRxProd)) { 1313
1262 VMXNET3_WRITE_BAR0_REG(adapter, 1314 /* if needed, update the register */
1263 rxprod_reg[ring_idx] + rq->qid * 8, 1315 if (unlikely(rq->shared->updateRxProd)) {
1264 rq->rx_ring[ring_idx].next2fill); 1316 VMXNET3_WRITE_BAR0_REG(adapter,
1265 rq->uncommitted[ring_idx] = 0; 1317 rxprod_reg[ring_idx] + rq->qid * 8,
1266 } 1318 ring->next2fill);
1319 rq->uncommitted[ring_idx] = 0;
1267 } 1320 }
1268 1321
1269 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring); 1322 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
@@ -2894,6 +2947,7 @@ vmxnet3_probe_device(struct pci_dev *pdev,
2894 else 2947 else
2895#endif 2948#endif
2896 num_rx_queues = 1; 2949 num_rx_queues = 1;
2950 num_rx_queues = rounddown_pow_of_two(num_rx_queues);
2897 2951
2898 if (enable_mq) 2952 if (enable_mq)
2899 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES, 2953 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES,
@@ -2901,6 +2955,7 @@ vmxnet3_probe_device(struct pci_dev *pdev,
2901 else 2955 else
2902 num_tx_queues = 1; 2956 num_tx_queues = 1;
2903 2957
2958 num_tx_queues = rounddown_pow_of_two(num_tx_queues);
2904 netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter), 2959 netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter),
2905 max(num_tx_queues, num_rx_queues)); 2960 max(num_tx_queues, num_rx_queues));
2906 printk(KERN_INFO "# of Tx queues : %d, # of Rx queues : %d\n", 2961 printk(KERN_INFO "# of Tx queues : %d, # of Rx queues : %d\n",
@@ -3085,6 +3140,7 @@ vmxnet3_remove_device(struct pci_dev *pdev)
3085 else 3140 else
3086#endif 3141#endif
3087 num_rx_queues = 1; 3142 num_rx_queues = 1;
3143 num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3088 3144
3089 cancel_work_sync(&adapter->work); 3145 cancel_work_sync(&adapter->work);
3090 3146
diff --git a/drivers/net/vmxnet3/vmxnet3_int.h b/drivers/net/vmxnet3/vmxnet3_int.h
index f50d36fdf405..e08d75e3f170 100644
--- a/drivers/net/vmxnet3/vmxnet3_int.h
+++ b/drivers/net/vmxnet3/vmxnet3_int.h
@@ -55,6 +55,7 @@
55#include <linux/if_vlan.h> 55#include <linux/if_vlan.h>
56#include <linux/if_arp.h> 56#include <linux/if_arp.h>
57#include <linux/inetdevice.h> 57#include <linux/inetdevice.h>
58#include <linux/log2.h>
58 59
59#include "vmxnet3_defs.h" 60#include "vmxnet3_defs.h"
60 61
@@ -68,10 +69,10 @@
68/* 69/*
69 * Version numbers 70 * Version numbers
70 */ 71 */
71#define VMXNET3_DRIVER_VERSION_STRING "1.1.9.0-k" 72#define VMXNET3_DRIVER_VERSION_STRING "1.1.18.0-k"
72 73
73/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */ 74/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
74#define VMXNET3_DRIVER_VERSION_NUM 0x01010900 75#define VMXNET3_DRIVER_VERSION_NUM 0x01011200
75 76
76#if defined(CONFIG_PCI_MSI) 77#if defined(CONFIG_PCI_MSI)
77 /* RSS only makes sense if MSI-X is supported. */ 78 /* RSS only makes sense if MSI-X is supported. */
diff --git a/drivers/net/wireless/ath/ath5k/desc.c b/drivers/net/wireless/ath/ath5k/desc.c
index 62172d585723..f82383b3ed30 100644
--- a/drivers/net/wireless/ath/ath5k/desc.c
+++ b/drivers/net/wireless/ath/ath5k/desc.c
@@ -107,10 +107,13 @@ ath5k_hw_setup_2word_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc,
107 case AR5K_PKT_TYPE_BEACON: 107 case AR5K_PKT_TYPE_BEACON:
108 case AR5K_PKT_TYPE_PROBE_RESP: 108 case AR5K_PKT_TYPE_PROBE_RESP:
109 frame_type = AR5K_AR5210_TX_DESC_FRAME_TYPE_NO_DELAY; 109 frame_type = AR5K_AR5210_TX_DESC_FRAME_TYPE_NO_DELAY;
110 break;
110 case AR5K_PKT_TYPE_PIFS: 111 case AR5K_PKT_TYPE_PIFS:
111 frame_type = AR5K_AR5210_TX_DESC_FRAME_TYPE_PIFS; 112 frame_type = AR5K_AR5210_TX_DESC_FRAME_TYPE_PIFS;
113 break;
112 default: 114 default:
113 frame_type = type; 115 frame_type = type;
116 break;
114 } 117 }
115 118
116 tx_ctl->tx_control_0 |= 119 tx_ctl->tx_control_0 |=
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c
index 1fef84f87c78..392771f93759 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.c
+++ b/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -691,14 +691,12 @@ ath5k_eeprom_free_pcal_info(struct ath5k_hw *ah, int mode)
691 if (!chinfo[pier].pd_curves) 691 if (!chinfo[pier].pd_curves)
692 continue; 692 continue;
693 693
694 for (pdg = 0; pdg < ee->ee_pd_gains[mode]; pdg++) { 694 for (pdg = 0; pdg < AR5K_EEPROM_N_PD_CURVES; pdg++) {
695 struct ath5k_pdgain_info *pd = 695 struct ath5k_pdgain_info *pd =
696 &chinfo[pier].pd_curves[pdg]; 696 &chinfo[pier].pd_curves[pdg];
697 697
698 if (pd != NULL) { 698 kfree(pd->pd_step);
699 kfree(pd->pd_step); 699 kfree(pd->pd_pwr);
700 kfree(pd->pd_pwr);
701 }
702 } 700 }
703 701
704 kfree(chinfo[pier].pd_curves); 702 kfree(chinfo[pier].pd_curves);
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index b8cbfc707213..3bad0b2cf9a3 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -278,6 +278,12 @@ static int ath_pci_suspend(struct device *device)
278 278
279 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1); 279 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
280 280
281 /* The device has to be moved to FULLSLEEP forcibly.
282 * Otherwise the chip never moved to full sleep,
283 * when no interface is up.
284 */
285 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
286
281 return 0; 287 return 0;
282} 288}
283 289
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c
index 61d4a11f566b..2a88e73bb39c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-1000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-1000.c
@@ -36,6 +36,7 @@
36#include <net/mac80211.h> 36#include <net/mac80211.h>
37#include <linux/etherdevice.h> 37#include <linux/etherdevice.h>
38#include <asm/unaligned.h> 38#include <asm/unaligned.h>
39#include <linux/stringify.h>
39 40
40#include "iwl-eeprom.h" 41#include "iwl-eeprom.h"
41#include "iwl-dev.h" 42#include "iwl-dev.h"
@@ -55,10 +56,10 @@
55#define IWL100_UCODE_API_MIN 5 56#define IWL100_UCODE_API_MIN 5
56 57
57#define IWL1000_FW_PRE "iwlwifi-1000-" 58#define IWL1000_FW_PRE "iwlwifi-1000-"
58#define IWL1000_MODULE_FIRMWARE(api) IWL1000_FW_PRE #api ".ucode" 59#define IWL1000_MODULE_FIRMWARE(api) IWL1000_FW_PRE __stringify(api) ".ucode"
59 60
60#define IWL100_FW_PRE "iwlwifi-100-" 61#define IWL100_FW_PRE "iwlwifi-100-"
61#define IWL100_MODULE_FIRMWARE(api) IWL100_FW_PRE #api ".ucode" 62#define IWL100_MODULE_FIRMWARE(api) IWL100_FW_PRE __stringify(api) ".ucode"
62 63
63 64
64/* 65/*
diff --git a/drivers/net/wireless/iwlwifi/iwl-2000.c b/drivers/net/wireless/iwlwifi/iwl-2000.c
index 2282279cffc4..3df76f53a41b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-2000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-2000.c
@@ -36,6 +36,7 @@
36#include <net/mac80211.h> 36#include <net/mac80211.h>
37#include <linux/etherdevice.h> 37#include <linux/etherdevice.h>
38#include <asm/unaligned.h> 38#include <asm/unaligned.h>
39#include <linux/stringify.h>
39 40
40#include "iwl-eeprom.h" 41#include "iwl-eeprom.h"
41#include "iwl-dev.h" 42#include "iwl-dev.h"
@@ -58,13 +59,13 @@
58#define IWL105_UCODE_API_MIN 5 59#define IWL105_UCODE_API_MIN 5
59 60
60#define IWL2030_FW_PRE "iwlwifi-2030-" 61#define IWL2030_FW_PRE "iwlwifi-2030-"
61#define IWL2030_MODULE_FIRMWARE(api) IWL2030_FW_PRE #api ".ucode" 62#define IWL2030_MODULE_FIRMWARE(api) IWL2030_FW_PRE __stringify(api) ".ucode"
62 63
63#define IWL2000_FW_PRE "iwlwifi-2000-" 64#define IWL2000_FW_PRE "iwlwifi-2000-"
64#define IWL2000_MODULE_FIRMWARE(api) IWL2000_FW_PRE #api ".ucode" 65#define IWL2000_MODULE_FIRMWARE(api) IWL2000_FW_PRE __stringify(api) ".ucode"
65 66
66#define IWL105_FW_PRE "iwlwifi-105-" 67#define IWL105_FW_PRE "iwlwifi-105-"
67#define IWL105_MODULE_FIRMWARE(api) IWL105_FW_PRE #api ".ucode" 68#define IWL105_MODULE_FIRMWARE(api) IWL105_FW_PRE __stringify(api) ".ucode"
68 69
69static void iwl2000_set_ct_threshold(struct iwl_priv *priv) 70static void iwl2000_set_ct_threshold(struct iwl_priv *priv)
70{ 71{
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index f99f9c193352..e816c27db794 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -37,6 +37,7 @@
37#include <net/mac80211.h> 37#include <net/mac80211.h>
38#include <linux/etherdevice.h> 38#include <linux/etherdevice.h>
39#include <asm/unaligned.h> 39#include <asm/unaligned.h>
40#include <linux/stringify.h>
40 41
41#include "iwl-eeprom.h" 42#include "iwl-eeprom.h"
42#include "iwl-dev.h" 43#include "iwl-dev.h"
@@ -57,10 +58,10 @@
57#define IWL5150_UCODE_API_MIN 1 58#define IWL5150_UCODE_API_MIN 1
58 59
59#define IWL5000_FW_PRE "iwlwifi-5000-" 60#define IWL5000_FW_PRE "iwlwifi-5000-"
60#define IWL5000_MODULE_FIRMWARE(api) IWL5000_FW_PRE #api ".ucode" 61#define IWL5000_MODULE_FIRMWARE(api) IWL5000_FW_PRE __stringify(api) ".ucode"
61 62
62#define IWL5150_FW_PRE "iwlwifi-5150-" 63#define IWL5150_FW_PRE "iwlwifi-5150-"
63#define IWL5150_MODULE_FIRMWARE(api) IWL5150_FW_PRE #api ".ucode" 64#define IWL5150_MODULE_FIRMWARE(api) IWL5150_FW_PRE __stringify(api) ".ucode"
64 65
65/* NIC configuration for 5000 series */ 66/* NIC configuration for 5000 series */
66static void iwl5000_nic_config(struct iwl_priv *priv) 67static void iwl5000_nic_config(struct iwl_priv *priv)
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c
index fbe565c816e3..5b150bc70b06 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c
@@ -36,6 +36,7 @@
36#include <net/mac80211.h> 36#include <net/mac80211.h>
37#include <linux/etherdevice.h> 37#include <linux/etherdevice.h>
38#include <asm/unaligned.h> 38#include <asm/unaligned.h>
39#include <linux/stringify.h>
39 40
40#include "iwl-eeprom.h" 41#include "iwl-eeprom.h"
41#include "iwl-dev.h" 42#include "iwl-dev.h"
@@ -58,16 +59,16 @@
58#define IWL6000G2_UCODE_API_MIN 4 59#define IWL6000G2_UCODE_API_MIN 4
59 60
60#define IWL6000_FW_PRE "iwlwifi-6000-" 61#define IWL6000_FW_PRE "iwlwifi-6000-"
61#define IWL6000_MODULE_FIRMWARE(api) IWL6000_FW_PRE #api ".ucode" 62#define IWL6000_MODULE_FIRMWARE(api) IWL6000_FW_PRE __stringify(api) ".ucode"
62 63
63#define IWL6050_FW_PRE "iwlwifi-6050-" 64#define IWL6050_FW_PRE "iwlwifi-6050-"
64#define IWL6050_MODULE_FIRMWARE(api) IWL6050_FW_PRE #api ".ucode" 65#define IWL6050_MODULE_FIRMWARE(api) IWL6050_FW_PRE __stringify(api) ".ucode"
65 66
66#define IWL6005_FW_PRE "iwlwifi-6000g2a-" 67#define IWL6005_FW_PRE "iwlwifi-6000g2a-"
67#define IWL6005_MODULE_FIRMWARE(api) IWL6005_FW_PRE #api ".ucode" 68#define IWL6005_MODULE_FIRMWARE(api) IWL6005_FW_PRE __stringify(api) ".ucode"
68 69
69#define IWL6030_FW_PRE "iwlwifi-6000g2b-" 70#define IWL6030_FW_PRE "iwlwifi-6000g2b-"
70#define IWL6030_MODULE_FIRMWARE(api) IWL6030_FW_PRE #api ".ucode" 71#define IWL6030_MODULE_FIRMWARE(api) IWL6030_FW_PRE __stringify(api) ".ucode"
71 72
72static void iwl6000_set_ct_threshold(struct iwl_priv *priv) 73static void iwl6000_set_ct_threshold(struct iwl_priv *priv)
73{ 74{
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index 213c80c6a668..45cc51c9c93e 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -1763,6 +1763,7 @@ int iwl_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1763 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif); 1763 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1764 struct iwl_rxon_context *bss_ctx = &priv->contexts[IWL_RXON_CTX_BSS]; 1764 struct iwl_rxon_context *bss_ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1765 struct iwl_rxon_context *tmp; 1765 struct iwl_rxon_context *tmp;
1766 enum nl80211_iftype newviftype = newtype;
1766 u32 interface_modes; 1767 u32 interface_modes;
1767 int err; 1768 int err;
1768 1769
@@ -1818,7 +1819,7 @@ int iwl_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1818 1819
1819 /* success */ 1820 /* success */
1820 iwl_teardown_interface(priv, vif, true); 1821 iwl_teardown_interface(priv, vif, true);
1821 vif->type = newtype; 1822 vif->type = newviftype;
1822 vif->p2p = newp2p; 1823 vif->p2p = newp2p;
1823 err = iwl_setup_interface(priv, ctx); 1824 err = iwl_setup_interface(priv, ctx);
1824 WARN_ON(err); 1825 WARN_ON(err);
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c
index 686e176b5ebd..137dba95b1ad 100644
--- a/drivers/net/wireless/iwlwifi/iwl-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-tx.c
@@ -126,7 +126,7 @@ static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
126} 126}
127 127
128static void iwlagn_unmap_tfd(struct iwl_priv *priv, struct iwl_cmd_meta *meta, 128static void iwlagn_unmap_tfd(struct iwl_priv *priv, struct iwl_cmd_meta *meta,
129 struct iwl_tfd *tfd) 129 struct iwl_tfd *tfd, int dma_dir)
130{ 130{
131 struct pci_dev *dev = priv->pci_dev; 131 struct pci_dev *dev = priv->pci_dev;
132 int i; 132 int i;
@@ -151,7 +151,7 @@ static void iwlagn_unmap_tfd(struct iwl_priv *priv, struct iwl_cmd_meta *meta,
151 /* Unmap chunks, if any. */ 151 /* Unmap chunks, if any. */
152 for (i = 1; i < num_tbs; i++) 152 for (i = 1; i < num_tbs; i++)
153 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i), 153 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
154 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE); 154 iwl_tfd_tb_get_len(tfd, i), dma_dir);
155} 155}
156 156
157/** 157/**
@@ -167,7 +167,8 @@ void iwlagn_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
167 struct iwl_tfd *tfd_tmp = txq->tfds; 167 struct iwl_tfd *tfd_tmp = txq->tfds;
168 int index = txq->q.read_ptr; 168 int index = txq->q.read_ptr;
169 169
170 iwlagn_unmap_tfd(priv, &txq->meta[index], &tfd_tmp[index]); 170 iwlagn_unmap_tfd(priv, &txq->meta[index], &tfd_tmp[index],
171 PCI_DMA_TODEVICE);
171 172
172 /* free SKB */ 173 /* free SKB */
173 if (txq->txb) { 174 if (txq->txb) {
@@ -310,9 +311,7 @@ void iwl_cmd_queue_unmap(struct iwl_priv *priv)
310 i = get_cmd_index(q, q->read_ptr); 311 i = get_cmd_index(q, q->read_ptr);
311 312
312 if (txq->meta[i].flags & CMD_MAPPED) { 313 if (txq->meta[i].flags & CMD_MAPPED) {
313 pci_unmap_single(priv->pci_dev, 314 iwlagn_unmap_tfd(priv, &txq->meta[i], &txq->tfds[i],
314 dma_unmap_addr(&txq->meta[i], mapping),
315 dma_unmap_len(&txq->meta[i], len),
316 PCI_DMA_BIDIRECTIONAL); 315 PCI_DMA_BIDIRECTIONAL);
317 txq->meta[i].flags = 0; 316 txq->meta[i].flags = 0;
318 } 317 }
@@ -535,12 +534,7 @@ out_free_arrays:
535void iwl_tx_queue_reset(struct iwl_priv *priv, struct iwl_tx_queue *txq, 534void iwl_tx_queue_reset(struct iwl_priv *priv, struct iwl_tx_queue *txq,
536 int slots_num, u32 txq_id) 535 int slots_num, u32 txq_id)
537{ 536{
538 int actual_slots = slots_num; 537 memset(txq->meta, 0, sizeof(struct iwl_cmd_meta) * slots_num);
539
540 if (txq_id == priv->cmd_queue)
541 actual_slots++;
542
543 memset(txq->meta, 0, sizeof(struct iwl_cmd_meta) * actual_slots);
544 538
545 txq->need_update = 0; 539 txq->need_update = 0;
546 540
@@ -700,10 +694,11 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
700 if (!(cmd->dataflags[i] & IWL_HCMD_DFL_NOCOPY)) 694 if (!(cmd->dataflags[i] & IWL_HCMD_DFL_NOCOPY))
701 continue; 695 continue;
702 phys_addr = pci_map_single(priv->pci_dev, (void *)cmd->data[i], 696 phys_addr = pci_map_single(priv->pci_dev, (void *)cmd->data[i],
703 cmd->len[i], PCI_DMA_TODEVICE); 697 cmd->len[i], PCI_DMA_BIDIRECTIONAL);
704 if (pci_dma_mapping_error(priv->pci_dev, phys_addr)) { 698 if (pci_dma_mapping_error(priv->pci_dev, phys_addr)) {
705 iwlagn_unmap_tfd(priv, out_meta, 699 iwlagn_unmap_tfd(priv, out_meta,
706 &txq->tfds[q->write_ptr]); 700 &txq->tfds[q->write_ptr],
701 PCI_DMA_BIDIRECTIONAL);
707 idx = -ENOMEM; 702 idx = -ENOMEM;
708 goto out; 703 goto out;
709 } 704 }
@@ -807,7 +802,7 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
807 cmd = txq->cmd[cmd_index]; 802 cmd = txq->cmd[cmd_index];
808 meta = &txq->meta[cmd_index]; 803 meta = &txq->meta[cmd_index];
809 804
810 iwlagn_unmap_tfd(priv, meta, &txq->tfds[index]); 805 iwlagn_unmap_tfd(priv, meta, &txq->tfds[index], PCI_DMA_BIDIRECTIONAL);
811 806
812 /* Input error checking is done when commands are added to queue. */ 807 /* Input error checking is done when commands are added to queue. */
813 if (meta->flags & CMD_WANT_SKB) { 808 if (meta->flags & CMD_WANT_SKB) {
diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c
index 9f8ccae93317..254b64ba4bf6 100644
--- a/drivers/net/wireless/rtlwifi/pci.c
+++ b/drivers/net/wireless/rtlwifi/pci.c
@@ -1624,6 +1624,16 @@ static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1624 pci_read_config_byte(pdev, 0x8, &revisionid); 1624 pci_read_config_byte(pdev, 0x8, &revisionid);
1625 pci_read_config_word(pdev, 0x3C, &irqline); 1625 pci_read_config_word(pdev, 0x3C, &irqline);
1626 1626
1627 /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1628 * r8192e_pci, and RTL8192SE, which uses this driver. If the
1629 * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1630 * the correct driver is r8192e_pci, thus this routine should
1631 * return false.
1632 */
1633 if (deviceid == RTL_PCI_8192SE_DID &&
1634 revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1635 return false;
1636
1627 if (deviceid == RTL_PCI_8192_DID || 1637 if (deviceid == RTL_PCI_8192_DID ||
1628 deviceid == RTL_PCI_0044_DID || 1638 deviceid == RTL_PCI_0044_DID ||
1629 deviceid == RTL_PCI_0047_DID || 1639 deviceid == RTL_PCI_0047_DID ||
@@ -1856,7 +1866,8 @@ int __devinit rtl_pci_probe(struct pci_dev *pdev,
1856 pci_write_config_byte(pdev, 0x04, 0x07); 1866 pci_write_config_byte(pdev, 0x04, 0x07);
1857 1867
1858 /* find adapter */ 1868 /* find adapter */
1859 _rtl_pci_find_adapter(pdev, hw); 1869 if (!_rtl_pci_find_adapter(pdev, hw))
1870 goto fail3;
1860 1871
1861 /* Init IO handler */ 1872 /* Init IO handler */
1862 _rtl_pci_io_handler_init(&pdev->dev, hw); 1873 _rtl_pci_io_handler_init(&pdev->dev, hw);
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
index bee7c1480f63..092e342c19df 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
@@ -53,6 +53,8 @@ MODULE_FIRMWARE("rtlwifi/rtl8192cufw.bin");
53static int rtl92cu_init_sw_vars(struct ieee80211_hw *hw) 53static int rtl92cu_init_sw_vars(struct ieee80211_hw *hw)
54{ 54{
55 struct rtl_priv *rtlpriv = rtl_priv(hw); 55 struct rtl_priv *rtlpriv = rtl_priv(hw);
56 const struct firmware *firmware;
57 int err;
56 58
57 rtlpriv->dm.dm_initialgain_enable = 1; 59 rtlpriv->dm.dm_initialgain_enable = 1;
58 rtlpriv->dm.dm_flag = 0; 60 rtlpriv->dm.dm_flag = 0;
@@ -64,6 +66,24 @@ static int rtl92cu_init_sw_vars(struct ieee80211_hw *hw)
64 ("Can't alloc buffer for fw.\n")); 66 ("Can't alloc buffer for fw.\n"));
65 return 1; 67 return 1;
66 } 68 }
69 /* request fw */
70 err = request_firmware(&firmware, rtlpriv->cfg->fw_name,
71 rtlpriv->io.dev);
72 if (err) {
73 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
74 ("Failed to request firmware!\n"));
75 return 1;
76 }
77 if (firmware->size > 0x4000) {
78 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
79 ("Firmware is too big!\n"));
80 release_firmware(firmware);
81 return 1;
82 }
83 memcpy(rtlpriv->rtlhal.pfirmware, firmware->data, firmware->size);
84 rtlpriv->rtlhal.fwsize = firmware->size;
85 release_firmware(firmware);
86
67 return 0; 87 return 0;
68} 88}
69 89
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 2c5b9b991279..692671b11667 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3483,6 +3483,8 @@ static int __init pci_setup(char *str)
3483 pci_no_msi(); 3483 pci_no_msi();
3484 } else if (!strcmp(str, "noaer")) { 3484 } else if (!strcmp(str, "noaer")) {
3485 pci_no_aer(); 3485 pci_no_aer();
3486 } else if (!strncmp(str, "realloc", 7)) {
3487 pci_realloc();
3486 } else if (!strcmp(str, "nodomains")) { 3488 } else if (!strcmp(str, "nodomains")) {
3487 pci_no_domains(); 3489 pci_no_domains();
3488 } else if (!strncmp(str, "cbiosize=", 9)) { 3490 } else if (!strncmp(str, "cbiosize=", 9)) {
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 731e20265ace..3a39bf1f1e2c 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -146,6 +146,8 @@ static inline void pci_no_msi(void) { }
146static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } 146static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
147#endif 147#endif
148 148
149extern void pci_realloc(void);
150
149static inline int pci_no_d1d2(struct pci_dev *dev) 151static inline int pci_no_d1d2(struct pci_dev *dev)
150{ 152{
151 unsigned int parent_dstates = 0; 153 unsigned int parent_dstates = 0;
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 1e9e5a5b8c81..9995842e45b5 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -47,6 +47,13 @@ struct resource_list_x {
47 (head)->next = NULL; \ 47 (head)->next = NULL; \
48} while (0) 48} while (0)
49 49
50int pci_realloc_enable = 0;
51#define pci_realloc_enabled() pci_realloc_enable
52void pci_realloc(void)
53{
54 pci_realloc_enable = 1;
55}
56
50/** 57/**
51 * add_to_list() - add a new resource tracker to the list 58 * add_to_list() - add a new resource tracker to the list
52 * @head: Head of the list 59 * @head: Head of the list
@@ -1025,6 +1032,7 @@ static int __init pci_get_max_depth(void)
1025 return depth; 1032 return depth;
1026} 1033}
1027 1034
1035
1028/* 1036/*
1029 * first try will not touch pci bridge res 1037 * first try will not touch pci bridge res
1030 * second and later try will clear small leaf bridge res 1038 * second and later try will clear small leaf bridge res
@@ -1068,6 +1076,13 @@ again:
1068 /* any device complain? */ 1076 /* any device complain? */
1069 if (!head.next) 1077 if (!head.next)
1070 goto enable_and_dump; 1078 goto enable_and_dump;
1079
1080 /* don't realloc if asked to do so */
1081 if (!pci_realloc_enabled()) {
1082 free_list(resource_list_x, &head);
1083 goto enable_and_dump;
1084 }
1085
1071 failed_type = 0; 1086 failed_type = 0;
1072 for (list = head.next; list;) { 1087 for (list = head.next; list;) {
1073 failed_type |= list->flags; 1088 failed_type |= list->flags;
diff --git a/drivers/platform/x86/acer-wmi.c b/drivers/platform/x86/acer-wmi.c
index 005417bd429e..e1c4938b301b 100644
--- a/drivers/platform/x86/acer-wmi.c
+++ b/drivers/platform/x86/acer-wmi.c
@@ -1156,9 +1156,9 @@ static acpi_status wmid3_set_device_status(u32 value, u16 device)
1156 struct wmid3_gds_input_param params = { 1156 struct wmid3_gds_input_param params = {
1157 .function_num = 0x1, 1157 .function_num = 0x1,
1158 .hotkey_number = 0x01, 1158 .hotkey_number = 0x01,
1159 .devices = ACER_WMID3_GDS_WIRELESS & 1159 .devices = ACER_WMID3_GDS_WIRELESS |
1160 ACER_WMID3_GDS_THREEG & 1160 ACER_WMID3_GDS_THREEG |
1161 ACER_WMID3_GDS_WIMAX & 1161 ACER_WMID3_GDS_WIMAX |
1162 ACER_WMID3_GDS_BLUETOOTH, 1162 ACER_WMID3_GDS_BLUETOOTH,
1163 }; 1163 };
1164 struct acpi_buffer input = { 1164 struct acpi_buffer input = {
@@ -1445,6 +1445,8 @@ static void acer_wmi_notify(u32 value, void *context)
1445 union acpi_object *obj; 1445 union acpi_object *obj;
1446 struct event_return_value return_value; 1446 struct event_return_value return_value;
1447 acpi_status status; 1447 acpi_status status;
1448 u16 device_state;
1449 const struct key_entry *key;
1448 1450
1449 status = wmi_get_event_data(value, &response); 1451 status = wmi_get_event_data(value, &response);
1450 if (status != AE_OK) { 1452 if (status != AE_OK) {
@@ -1472,23 +1474,32 @@ static void acer_wmi_notify(u32 value, void *context)
1472 1474
1473 switch (return_value.function) { 1475 switch (return_value.function) {
1474 case WMID_HOTKEY_EVENT: 1476 case WMID_HOTKEY_EVENT:
1475 if (return_value.device_state) { 1477 device_state = return_value.device_state;
1476 u16 device_state = return_value.device_state; 1478 pr_debug("device state: 0x%x\n", device_state);
1477 pr_debug("device state: 0x%x\n", device_state); 1479
1478 if (has_cap(ACER_CAP_WIRELESS)) 1480 key = sparse_keymap_entry_from_scancode(acer_wmi_input_dev,
1479 rfkill_set_sw_state(wireless_rfkill, 1481 return_value.key_num);
1480 !(device_state & ACER_WMID3_GDS_WIRELESS)); 1482 if (!key) {
1481 if (has_cap(ACER_CAP_BLUETOOTH))
1482 rfkill_set_sw_state(bluetooth_rfkill,
1483 !(device_state & ACER_WMID3_GDS_BLUETOOTH));
1484 if (has_cap(ACER_CAP_THREEG))
1485 rfkill_set_sw_state(threeg_rfkill,
1486 !(device_state & ACER_WMID3_GDS_THREEG));
1487 }
1488 if (!sparse_keymap_report_event(acer_wmi_input_dev,
1489 return_value.key_num, 1, true))
1490 pr_warn("Unknown key number - 0x%x\n", 1483 pr_warn("Unknown key number - 0x%x\n",
1491 return_value.key_num); 1484 return_value.key_num);
1485 } else {
1486 switch (key->keycode) {
1487 case KEY_WLAN:
1488 case KEY_BLUETOOTH:
1489 if (has_cap(ACER_CAP_WIRELESS))
1490 rfkill_set_sw_state(wireless_rfkill,
1491 !(device_state & ACER_WMID3_GDS_WIRELESS));
1492 if (has_cap(ACER_CAP_THREEG))
1493 rfkill_set_sw_state(threeg_rfkill,
1494 !(device_state & ACER_WMID3_GDS_THREEG));
1495 if (has_cap(ACER_CAP_BLUETOOTH))
1496 rfkill_set_sw_state(bluetooth_rfkill,
1497 !(device_state & ACER_WMID3_GDS_BLUETOOTH));
1498 break;
1499 }
1500 sparse_keymap_report_entry(acer_wmi_input_dev, key,
1501 1, true);
1502 }
1492 break; 1503 break;
1493 default: 1504 default:
1494 pr_warn("Unknown function number - %d - %d\n", 1505 pr_warn("Unknown function number - %d - %d\n",
diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wmi.c
index 00460cb9587b..3c7857c71a23 100644
--- a/drivers/platform/x86/asus-wmi.c
+++ b/drivers/platform/x86/asus-wmi.c
@@ -1025,6 +1025,7 @@ static int asus_wmi_backlight_init(struct asus_wmi *asus)
1025 return power; 1025 return power;
1026 1026
1027 memset(&props, 0, sizeof(struct backlight_properties)); 1027 memset(&props, 0, sizeof(struct backlight_properties));
1028 props.type = BACKLIGHT_PLATFORM;
1028 props.max_brightness = max; 1029 props.max_brightness = max;
1029 bd = backlight_device_register(asus->driver->name, 1030 bd = backlight_device_register(asus->driver->name,
1030 &asus->platform_device->dev, asus, 1031 &asus->platform_device->dev, asus,
diff --git a/drivers/platform/x86/compal-laptop.c b/drivers/platform/x86/compal-laptop.c
index 3f204fde1b02..8877b836d27c 100644
--- a/drivers/platform/x86/compal-laptop.c
+++ b/drivers/platform/x86/compal-laptop.c
@@ -1030,8 +1030,10 @@ static int __devinit compal_probe(struct platform_device *pdev)
1030 initialize_fan_control_data(data); 1030 initialize_fan_control_data(data);
1031 1031
1032 err = sysfs_create_group(&pdev->dev.kobj, &compal_attribute_group); 1032 err = sysfs_create_group(&pdev->dev.kobj, &compal_attribute_group);
1033 if (err) 1033 if (err) {
1034 kfree(data);
1034 return err; 1035 return err;
1036 }
1035 1037
1036 data->hwmon_dev = hwmon_device_register(&pdev->dev); 1038 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1037 if (IS_ERR(data->hwmon_dev)) { 1039 if (IS_ERR(data->hwmon_dev)) {
diff --git a/drivers/platform/x86/dell-laptop.c b/drivers/platform/x86/dell-laptop.c
index d3841de6a8cf..e39ab1d3ed87 100644
--- a/drivers/platform/x86/dell-laptop.c
+++ b/drivers/platform/x86/dell-laptop.c
@@ -292,12 +292,9 @@ static int dell_rfkill_set(void *data, bool blocked)
292 dell_send_request(buffer, 17, 11); 292 dell_send_request(buffer, 17, 11);
293 293
294 /* If the hardware switch controls this radio, and the hardware 294 /* If the hardware switch controls this radio, and the hardware
295 switch is disabled, don't allow changing the software state. 295 switch is disabled, don't allow changing the software state */
296 If the hardware switch is reported as not supported, always
297 fire the SMI to toggle the killswitch. */
298 if ((hwswitch_state & BIT(hwswitch_bit)) && 296 if ((hwswitch_state & BIT(hwswitch_bit)) &&
299 !(buffer->output[1] & BIT(16)) && 297 !(buffer->output[1] & BIT(16))) {
300 (buffer->output[1] & BIT(0))) {
301 ret = -EINVAL; 298 ret = -EINVAL;
302 goto out; 299 goto out;
303 } 300 }
@@ -403,23 +400,6 @@ static const struct file_operations dell_debugfs_fops = {
403 400
404static void dell_update_rfkill(struct work_struct *ignored) 401static void dell_update_rfkill(struct work_struct *ignored)
405{ 402{
406 int status;
407
408 get_buffer();
409 dell_send_request(buffer, 17, 11);
410 status = buffer->output[1];
411 release_buffer();
412
413 /* if hardware rfkill is not supported, set it explicitly */
414 if (!(status & BIT(0))) {
415 if (wifi_rfkill)
416 dell_rfkill_set((void *)1, !((status & BIT(17)) >> 17));
417 if (bluetooth_rfkill)
418 dell_rfkill_set((void *)2, !((status & BIT(18)) >> 18));
419 if (wwan_rfkill)
420 dell_rfkill_set((void *)3, !((status & BIT(19)) >> 19));
421 }
422
423 if (wifi_rfkill) 403 if (wifi_rfkill)
424 dell_rfkill_query(wifi_rfkill, (void *)1); 404 dell_rfkill_query(wifi_rfkill, (void *)1);
425 if (bluetooth_rfkill) 405 if (bluetooth_rfkill)
@@ -560,11 +540,11 @@ static int dell_get_intensity(struct backlight_device *bd)
560 else 540 else
561 dell_send_request(buffer, 0, 1); 541 dell_send_request(buffer, 0, 1);
562 542
543 ret = buffer->output[1];
544
563out: 545out:
564 release_buffer(); 546 release_buffer();
565 if (ret) 547 return ret;
566 return ret;
567 return buffer->output[1];
568} 548}
569 549
570static const struct backlight_ops dell_ops = { 550static const struct backlight_ops dell_ops = {
diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c
index f94017bcdd6e..e2faa3cbb792 100644
--- a/drivers/platform/x86/hp-wmi.c
+++ b/drivers/platform/x86/hp-wmi.c
@@ -207,6 +207,7 @@ static int hp_wmi_perform_query(int query, int write, void *buffer,
207 }; 207 };
208 struct acpi_buffer input = { sizeof(struct bios_args), &args }; 208 struct acpi_buffer input = { sizeof(struct bios_args), &args };
209 struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL }; 209 struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
210 u32 rc;
210 211
211 if (WARN_ON(insize > sizeof(args.data))) 212 if (WARN_ON(insize > sizeof(args.data)))
212 return -EINVAL; 213 return -EINVAL;
@@ -224,13 +225,13 @@ static int hp_wmi_perform_query(int query, int write, void *buffer,
224 } 225 }
225 226
226 bios_return = (struct bios_return *)obj->buffer.pointer; 227 bios_return = (struct bios_return *)obj->buffer.pointer;
228 rc = bios_return->return_code;
227 229
228 if (bios_return->return_code) { 230 if (rc) {
229 if (bios_return->return_code != HPWMI_RET_UNKNOWN_CMDTYPE) 231 if (rc != HPWMI_RET_UNKNOWN_CMDTYPE)
230 pr_warn("query 0x%x returned error 0x%x\n", 232 pr_warn("query 0x%x returned error 0x%x\n", query, rc);
231 query, bios_return->return_code);
232 kfree(obj); 233 kfree(obj);
233 return bios_return->return_code; 234 return rc;
234 } 235 }
235 236
236 if (!outsize) { 237 if (!outsize) {
diff --git a/drivers/platform/x86/intel_oaktrail.c b/drivers/platform/x86/intel_oaktrail.c
index e936364a609d..7f88c7923fc6 100644
--- a/drivers/platform/x86/intel_oaktrail.c
+++ b/drivers/platform/x86/intel_oaktrail.c
@@ -250,6 +250,7 @@ static int oaktrail_backlight_init(void)
250 struct backlight_properties props; 250 struct backlight_properties props;
251 251
252 memset(&props, 0, sizeof(struct backlight_properties)); 252 memset(&props, 0, sizeof(struct backlight_properties));
253 props.type = BACKLIGHT_PLATFORM;
253 props.max_brightness = OT_EC_BL_BRIGHTNESS_MAX; 254 props.max_brightness = OT_EC_BL_BRIGHTNESS_MAX;
254 bd = backlight_device_register(DRIVER_NAME, 255 bd = backlight_device_register(DRIVER_NAME,
255 &oaktrail_device->dev, NULL, 256 &oaktrail_device->dev, NULL,
diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c
index 77f6e707a2a9..26c5b117df22 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -184,6 +184,10 @@ enum tpacpi_hkey_event_t {
184 184
185 /* Misc bay events */ 185 /* Misc bay events */
186 TP_HKEY_EV_OPTDRV_EJ = 0x3006, /* opt. drive tray ejected */ 186 TP_HKEY_EV_OPTDRV_EJ = 0x3006, /* opt. drive tray ejected */
187 TP_HKEY_EV_HOTPLUG_DOCK = 0x4010, /* docked into hotplug dock
188 or port replicator */
189 TP_HKEY_EV_HOTPLUG_UNDOCK = 0x4011, /* undocked from hotplug
190 dock or port replicator */
187 191
188 /* User-interface events */ 192 /* User-interface events */
189 TP_HKEY_EV_LID_CLOSE = 0x5001, /* laptop lid closed */ 193 TP_HKEY_EV_LID_CLOSE = 0x5001, /* laptop lid closed */
@@ -194,6 +198,10 @@ enum tpacpi_hkey_event_t {
194 TP_HKEY_EV_PEN_REMOVED = 0x500c, /* tablet pen removed */ 198 TP_HKEY_EV_PEN_REMOVED = 0x500c, /* tablet pen removed */
195 TP_HKEY_EV_BRGHT_CHANGED = 0x5010, /* backlight control event */ 199 TP_HKEY_EV_BRGHT_CHANGED = 0x5010, /* backlight control event */
196 200
201 /* Key-related user-interface events */
202 TP_HKEY_EV_KEY_NUMLOCK = 0x6000, /* NumLock key pressed */
203 TP_HKEY_EV_KEY_FN = 0x6005, /* Fn key pressed? E420 */
204
197 /* Thermal events */ 205 /* Thermal events */
198 TP_HKEY_EV_ALARM_BAT_HOT = 0x6011, /* battery too hot */ 206 TP_HKEY_EV_ALARM_BAT_HOT = 0x6011, /* battery too hot */
199 TP_HKEY_EV_ALARM_BAT_XHOT = 0x6012, /* battery critically hot */ 207 TP_HKEY_EV_ALARM_BAT_XHOT = 0x6012, /* battery critically hot */
@@ -201,6 +209,10 @@ enum tpacpi_hkey_event_t {
201 TP_HKEY_EV_ALARM_SENSOR_XHOT = 0x6022, /* sensor critically hot */ 209 TP_HKEY_EV_ALARM_SENSOR_XHOT = 0x6022, /* sensor critically hot */
202 TP_HKEY_EV_THM_TABLE_CHANGED = 0x6030, /* thermal table changed */ 210 TP_HKEY_EV_THM_TABLE_CHANGED = 0x6030, /* thermal table changed */
203 211
212 TP_HKEY_EV_UNK_6040 = 0x6040, /* Related to AC change?
213 some sort of APM hint,
214 W520 */
215
204 /* Misc */ 216 /* Misc */
205 TP_HKEY_EV_RFKILL_CHANGED = 0x7000, /* rfkill switch changed */ 217 TP_HKEY_EV_RFKILL_CHANGED = 0x7000, /* rfkill switch changed */
206}; 218};
@@ -3513,6 +3525,34 @@ static bool hotkey_notify_wakeup(const u32 hkey,
3513 return true; 3525 return true;
3514} 3526}
3515 3527
3528static bool hotkey_notify_dockevent(const u32 hkey,
3529 bool *send_acpi_ev,
3530 bool *ignore_acpi_ev)
3531{
3532 /* 0x4000-0x4FFF: dock-related events */
3533 *send_acpi_ev = true;
3534 *ignore_acpi_ev = false;
3535
3536 switch (hkey) {
3537 case TP_HKEY_EV_UNDOCK_ACK:
3538 /* ACPI undock operation completed after wakeup */
3539 hotkey_autosleep_ack = 1;
3540 pr_info("undocked\n");
3541 hotkey_wakeup_hotunplug_complete_notify_change();
3542 return true;
3543
3544 case TP_HKEY_EV_HOTPLUG_DOCK: /* docked to port replicator */
3545 pr_info("docked into hotplug port replicator\n");
3546 return true;
3547 case TP_HKEY_EV_HOTPLUG_UNDOCK: /* undocked from port replicator */
3548 pr_info("undocked from hotplug port replicator\n");
3549 return true;
3550
3551 default:
3552 return false;
3553 }
3554}
3555
3516static bool hotkey_notify_usrevent(const u32 hkey, 3556static bool hotkey_notify_usrevent(const u32 hkey,
3517 bool *send_acpi_ev, 3557 bool *send_acpi_ev,
3518 bool *ignore_acpi_ev) 3558 bool *ignore_acpi_ev)
@@ -3547,13 +3587,13 @@ static bool hotkey_notify_usrevent(const u32 hkey,
3547 3587
3548static void thermal_dump_all_sensors(void); 3588static void thermal_dump_all_sensors(void);
3549 3589
3550static bool hotkey_notify_thermal(const u32 hkey, 3590static bool hotkey_notify_6xxx(const u32 hkey,
3551 bool *send_acpi_ev, 3591 bool *send_acpi_ev,
3552 bool *ignore_acpi_ev) 3592 bool *ignore_acpi_ev)
3553{ 3593{
3554 bool known = true; 3594 bool known = true;
3555 3595
3556 /* 0x6000-0x6FFF: thermal alarms */ 3596 /* 0x6000-0x6FFF: thermal alarms/notices and keyboard events */
3557 *send_acpi_ev = true; 3597 *send_acpi_ev = true;
3558 *ignore_acpi_ev = false; 3598 *ignore_acpi_ev = false;
3559 3599
@@ -3582,8 +3622,17 @@ static bool hotkey_notify_thermal(const u32 hkey,
3582 "a sensor reports something is extremely hot!\n"); 3622 "a sensor reports something is extremely hot!\n");
3583 /* recommended action: immediate sleep/hibernate */ 3623 /* recommended action: immediate sleep/hibernate */
3584 break; 3624 break;
3625
3626 case TP_HKEY_EV_KEY_NUMLOCK:
3627 case TP_HKEY_EV_KEY_FN:
3628 /* key press events, we just ignore them as long as the EC
3629 * is still reporting them in the normal keyboard stream */
3630 *send_acpi_ev = false;
3631 *ignore_acpi_ev = true;
3632 return true;
3633
3585 default: 3634 default:
3586 pr_alert("THERMAL ALERT: unknown thermal alarm received\n"); 3635 pr_warn("unknown possible thermal alarm or keyboard event received\n");
3587 known = false; 3636 known = false;
3588 } 3637 }
3589 3638
@@ -3652,15 +3701,9 @@ static void hotkey_notify(struct ibm_struct *ibm, u32 event)
3652 } 3701 }
3653 break; 3702 break;
3654 case 4: 3703 case 4:
3655 /* 0x4000-0x4FFF: dock-related wakeups */ 3704 /* 0x4000-0x4FFF: dock-related events */
3656 if (hkey == TP_HKEY_EV_UNDOCK_ACK) { 3705 known_ev = hotkey_notify_dockevent(hkey, &send_acpi_ev,
3657 hotkey_autosleep_ack = 1; 3706 &ignore_acpi_ev);
3658 pr_info("undocked\n");
3659 hotkey_wakeup_hotunplug_complete_notify_change();
3660 known_ev = true;
3661 } else {
3662 known_ev = false;
3663 }
3664 break; 3707 break;
3665 case 5: 3708 case 5:
3666 /* 0x5000-0x5FFF: human interface helpers */ 3709 /* 0x5000-0x5FFF: human interface helpers */
@@ -3668,8 +3711,9 @@ static void hotkey_notify(struct ibm_struct *ibm, u32 event)
3668 &ignore_acpi_ev); 3711 &ignore_acpi_ev);
3669 break; 3712 break;
3670 case 6: 3713 case 6:
3671 /* 0x6000-0x6FFF: thermal alarms */ 3714 /* 0x6000-0x6FFF: thermal alarms/notices and
3672 known_ev = hotkey_notify_thermal(hkey, &send_acpi_ev, 3715 * keyboard events */
3716 known_ev = hotkey_notify_6xxx(hkey, &send_acpi_ev,
3673 &ignore_acpi_ev); 3717 &ignore_acpi_ev);
3674 break; 3718 break;
3675 case 7: 3719 case 7:
diff --git a/drivers/regulator/db8500-prcmu.c b/drivers/regulator/db8500-prcmu.c
index e5f7b8fe51f4..2bb8f451cc06 100644
--- a/drivers/regulator/db8500-prcmu.c
+++ b/drivers/regulator/db8500-prcmu.c
@@ -266,7 +266,7 @@ static struct regulator_ops db8500_regulator_switch_ops = {
266 * Regulator information 266 * Regulator information
267 */ 267 */
268static struct db8500_regulator_info 268static struct db8500_regulator_info
269 db8500_regulator_info[DB8500_NUM_REGULATORS] = { 269db8500_regulator_info[DB8500_NUM_REGULATORS] = {
270 [DB8500_REGULATOR_VAPE] = { 270 [DB8500_REGULATOR_VAPE] = {
271 .desc = { 271 .desc = {
272 .name = "db8500-vape", 272 .name = "db8500-vape",
@@ -492,11 +492,9 @@ static int __devinit db8500_regulator_probe(struct platform_device *pdev)
492 info->desc.name, err); 492 info->desc.name, err);
493 493
494 /* if failing, unregister all earlier regulators */ 494 /* if failing, unregister all earlier regulators */
495 i--; 495 while (--i >= 0) {
496 while (i >= 0) {
497 info = &db8500_regulator_info[i]; 496 info = &db8500_regulator_info[i];
498 regulator_unregister(info->rdev); 497 regulator_unregister(info->rdev);
499 i--;
500 } 498 }
501 return err; 499 return err;
502 } 500 }
@@ -536,13 +534,7 @@ static struct platform_driver db8500_regulator_driver = {
536 534
537static int __init db8500_regulator_init(void) 535static int __init db8500_regulator_init(void)
538{ 536{
539 int ret; 537 return platform_driver_register(&db8500_regulator_driver);
540
541 ret = platform_driver_register(&db8500_regulator_driver);
542 if (ret < 0)
543 return -ENODEV;
544
545 return 0;
546} 538}
547 539
548static void __exit db8500_regulator_exit(void) 540static void __exit db8500_regulator_exit(void)
diff --git a/drivers/regulator/max8952.c b/drivers/regulator/max8952.c
index daff7fd0e95c..486ed8141fcd 100644
--- a/drivers/regulator/max8952.c
+++ b/drivers/regulator/max8952.c
@@ -139,7 +139,7 @@ static int max8952_set_voltage(struct regulator_dev *rdev,
139 s8 vid = -1, i; 139 s8 vid = -1, i;
140 140
141 if (!gpio_is_valid(max8952->pdata->gpio_vid0) || 141 if (!gpio_is_valid(max8952->pdata->gpio_vid0) ||
142 !gpio_is_valid(max8952->pdata->gpio_vid0)) { 142 !gpio_is_valid(max8952->pdata->gpio_vid1)) {
143 /* DVS not supported */ 143 /* DVS not supported */
144 return -EPERM; 144 return -EPERM;
145 } 145 }
diff --git a/drivers/regulator/max8997.c b/drivers/regulator/max8997.c
index 10d5a1d9768e..ad6628ca94f4 100644
--- a/drivers/regulator/max8997.c
+++ b/drivers/regulator/max8997.c
@@ -39,25 +39,28 @@ struct max8997_data {
39 struct regulator_dev **rdev; 39 struct regulator_dev **rdev;
40 int ramp_delay; /* in mV/us */ 40 int ramp_delay; /* in mV/us */
41 41
42 bool buck1_gpiodvs;
43 bool buck2_gpiodvs;
44 bool buck5_gpiodvs;
42 u8 buck1_vol[8]; 45 u8 buck1_vol[8];
43 u8 buck2_vol[8]; 46 u8 buck2_vol[8];
44 u8 buck5_vol[8]; 47 u8 buck5_vol[8];
48 int buck125_gpios[3];
45 int buck125_gpioindex; 49 int buck125_gpioindex;
50 bool ignore_gpiodvs_side_effect;
46 51
47 u8 saved_states[MAX8997_REG_MAX]; 52 u8 saved_states[MAX8997_REG_MAX];
48}; 53};
49 54
50static inline void max8997_set_gpio(struct max8997_data *max8997) 55static inline void max8997_set_gpio(struct max8997_data *max8997)
51{ 56{
52 struct max8997_platform_data *pdata =
53 dev_get_platdata(max8997->iodev->dev);
54 int set3 = (max8997->buck125_gpioindex) & 0x1; 57 int set3 = (max8997->buck125_gpioindex) & 0x1;
55 int set2 = ((max8997->buck125_gpioindex) >> 1) & 0x1; 58 int set2 = ((max8997->buck125_gpioindex) >> 1) & 0x1;
56 int set1 = ((max8997->buck125_gpioindex) >> 2) & 0x1; 59 int set1 = ((max8997->buck125_gpioindex) >> 2) & 0x1;
57 60
58 gpio_set_value(pdata->buck125_gpios[0], set1); 61 gpio_set_value(max8997->buck125_gpios[0], set1);
59 gpio_set_value(pdata->buck125_gpios[1], set2); 62 gpio_set_value(max8997->buck125_gpios[1], set2);
60 gpio_set_value(pdata->buck125_gpios[2], set3); 63 gpio_set_value(max8997->buck125_gpios[2], set3);
61} 64}
62 65
63struct voltage_map_desc { 66struct voltage_map_desc {
@@ -380,8 +383,6 @@ static int max8997_get_voltage_register(struct regulator_dev *rdev,
380static int max8997_get_voltage(struct regulator_dev *rdev) 383static int max8997_get_voltage(struct regulator_dev *rdev)
381{ 384{
382 struct max8997_data *max8997 = rdev_get_drvdata(rdev); 385 struct max8997_data *max8997 = rdev_get_drvdata(rdev);
383 struct max8997_platform_data *pdata =
384 dev_get_platdata(max8997->iodev->dev);
385 struct i2c_client *i2c = max8997->iodev->i2c; 386 struct i2c_client *i2c = max8997->iodev->i2c;
386 int reg, shift, mask, ret; 387 int reg, shift, mask, ret;
387 int rid = max8997_get_rid(rdev); 388 int rid = max8997_get_rid(rdev);
@@ -391,9 +392,9 @@ static int max8997_get_voltage(struct regulator_dev *rdev)
391 if (ret) 392 if (ret)
392 return ret; 393 return ret;
393 394
394 if ((rid == MAX8997_BUCK1 && pdata->buck1_gpiodvs) || 395 if ((rid == MAX8997_BUCK1 && max8997->buck1_gpiodvs) ||
395 (rid == MAX8997_BUCK2 && pdata->buck2_gpiodvs) || 396 (rid == MAX8997_BUCK2 && max8997->buck2_gpiodvs) ||
396 (rid == MAX8997_BUCK5 && pdata->buck5_gpiodvs)) 397 (rid == MAX8997_BUCK5 && max8997->buck5_gpiodvs))
397 reg += max8997->buck125_gpioindex; 398 reg += max8997->buck125_gpioindex;
398 399
399 ret = max8997_read_reg(i2c, reg, &val); 400 ret = max8997_read_reg(i2c, reg, &val);
@@ -543,7 +544,8 @@ static int max8997_set_voltage_ldobuck(struct regulator_dev *rdev,
543 rid == MAX8997_BUCK4 || rid == MAX8997_BUCK5) { 544 rid == MAX8997_BUCK4 || rid == MAX8997_BUCK5) {
544 /* If the voltage is increasing */ 545 /* If the voltage is increasing */
545 if (org < i) 546 if (org < i)
546 udelay(desc->step * (i - org) / max8997->ramp_delay); 547 udelay(DIV_ROUND_UP(desc->step * (i - org),
548 max8997->ramp_delay));
547 } 549 }
548 550
549 return ret; 551 return ret;
@@ -561,8 +563,6 @@ static int max8997_assess_side_effect(struct regulator_dev *rdev,
561 u8 new_val, int *best) 563 u8 new_val, int *best)
562{ 564{
563 struct max8997_data *max8997 = rdev_get_drvdata(rdev); 565 struct max8997_data *max8997 = rdev_get_drvdata(rdev);
564 struct max8997_platform_data *pdata =
565 dev_get_platdata(max8997->iodev->dev);
566 int rid = max8997_get_rid(rdev); 566 int rid = max8997_get_rid(rdev);
567 u8 *buckx_val[3]; 567 u8 *buckx_val[3];
568 bool buckx_gpiodvs[3]; 568 bool buckx_gpiodvs[3];
@@ -589,9 +589,9 @@ static int max8997_assess_side_effect(struct regulator_dev *rdev,
589 buckx_val[0] = max8997->buck1_vol; 589 buckx_val[0] = max8997->buck1_vol;
590 buckx_val[1] = max8997->buck2_vol; 590 buckx_val[1] = max8997->buck2_vol;
591 buckx_val[2] = max8997->buck5_vol; 591 buckx_val[2] = max8997->buck5_vol;
592 buckx_gpiodvs[0] = pdata->buck1_gpiodvs; 592 buckx_gpiodvs[0] = max8997->buck1_gpiodvs;
593 buckx_gpiodvs[1] = pdata->buck2_gpiodvs; 593 buckx_gpiodvs[1] = max8997->buck2_gpiodvs;
594 buckx_gpiodvs[2] = pdata->buck5_gpiodvs; 594 buckx_gpiodvs[2] = max8997->buck5_gpiodvs;
595 595
596 for (i = 0; i < 8; i++) { 596 for (i = 0; i < 8; i++) {
597 int others; 597 int others;
@@ -640,8 +640,6 @@ static int max8997_set_voltage_buck(struct regulator_dev *rdev,
640 int min_uV, int max_uV, unsigned *selector) 640 int min_uV, int max_uV, unsigned *selector)
641{ 641{
642 struct max8997_data *max8997 = rdev_get_drvdata(rdev); 642 struct max8997_data *max8997 = rdev_get_drvdata(rdev);
643 struct max8997_platform_data *pdata =
644 dev_get_platdata(max8997->iodev->dev);
645 int rid = max8997_get_rid(rdev); 643 int rid = max8997_get_rid(rdev);
646 const struct voltage_map_desc *desc; 644 const struct voltage_map_desc *desc;
647 int new_val, new_idx, damage, tmp_val, tmp_idx, tmp_dmg; 645 int new_val, new_idx, damage, tmp_val, tmp_idx, tmp_dmg;
@@ -653,15 +651,15 @@ static int max8997_set_voltage_buck(struct regulator_dev *rdev,
653 651
654 switch (rid) { 652 switch (rid) {
655 case MAX8997_BUCK1: 653 case MAX8997_BUCK1:
656 if (pdata->buck1_gpiodvs) 654 if (max8997->buck1_gpiodvs)
657 gpio_dvs_mode = true; 655 gpio_dvs_mode = true;
658 break; 656 break;
659 case MAX8997_BUCK2: 657 case MAX8997_BUCK2:
660 if (pdata->buck2_gpiodvs) 658 if (max8997->buck2_gpiodvs)
661 gpio_dvs_mode = true; 659 gpio_dvs_mode = true;
662 break; 660 break;
663 case MAX8997_BUCK5: 661 case MAX8997_BUCK5:
664 if (pdata->buck5_gpiodvs) 662 if (max8997->buck5_gpiodvs)
665 gpio_dvs_mode = true; 663 gpio_dvs_mode = true;
666 break; 664 break;
667 } 665 }
@@ -695,7 +693,7 @@ static int max8997_set_voltage_buck(struct regulator_dev *rdev,
695 new_idx = tmp_idx; 693 new_idx = tmp_idx;
696 new_val = tmp_val; 694 new_val = tmp_val;
697 695
698 if (pdata->ignore_gpiodvs_side_effect == false) 696 if (max8997->ignore_gpiodvs_side_effect == false)
699 return -EINVAL; 697 return -EINVAL;
700 698
701 dev_warn(&rdev->dev, "MAX8997 GPIO-DVS Side Effect Warning: GPIO SET:" 699 dev_warn(&rdev->dev, "MAX8997 GPIO-DVS Side Effect Warning: GPIO SET:"
@@ -993,6 +991,11 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)
993 i2c = max8997->iodev->i2c; 991 i2c = max8997->iodev->i2c;
994 992
995 max8997->buck125_gpioindex = pdata->buck125_default_idx; 993 max8997->buck125_gpioindex = pdata->buck125_default_idx;
994 max8997->buck1_gpiodvs = pdata->buck1_gpiodvs;
995 max8997->buck2_gpiodvs = pdata->buck2_gpiodvs;
996 max8997->buck5_gpiodvs = pdata->buck5_gpiodvs;
997 memcpy(max8997->buck125_gpios, pdata->buck125_gpios, sizeof(int) * 3);
998 max8997->ignore_gpiodvs_side_effect = pdata->ignore_gpiodvs_side_effect;
996 999
997 for (i = 0; i < 8; i++) { 1000 for (i = 0; i < 8; i++) {
998 max8997->buck1_vol[i] = ret = 1001 max8997->buck1_vol[i] = ret =
@@ -1124,6 +1127,10 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)
1124 0x3f); 1127 0x3f);
1125 } 1128 }
1126 1129
1130 /* Misc Settings */
1131 max8997->ramp_delay = 10; /* set 10mV/us, which is the default */
1132 max8997_write_reg(i2c, MAX8997_REG_BUCKRAMP, (0xf << 4) | 0x9);
1133
1127 for (i = 0; i < pdata->num_regulators; i++) { 1134 for (i = 0; i < pdata->num_regulators; i++) {
1128 const struct voltage_map_desc *desc; 1135 const struct voltage_map_desc *desc;
1129 int id = pdata->regulators[i].id; 1136 int id = pdata->regulators[i].id;
@@ -1148,10 +1155,6 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)
1148 } 1155 }
1149 } 1156 }
1150 1157
1151 /* Misc Settings */
1152 max8997->ramp_delay = 10; /* set 10mV/us, which is the default */
1153 max8997_write_reg(i2c, MAX8997_REG_BUCKRAMP, (0xf << 4) | 0x9);
1154
1155 return 0; 1158 return 0;
1156err: 1159err:
1157 for (i = 0; i < max8997->num_regulators; i++) 1160 for (i = 0; i < max8997->num_regulators; i++)
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 4a1f029c4fe9..8d9dae89f065 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -830,6 +830,19 @@ config SCSI_GDTH
830 To compile this driver as a module, choose M here: the 830 To compile this driver as a module, choose M here: the
831 module will be called gdth. 831 module will be called gdth.
832 832
833config SCSI_ISCI
834 tristate "Intel(R) C600 Series Chipset SAS Controller"
835 depends on PCI && SCSI
836 depends on X86
837 # (temporary): known alpha quality driver
838 depends on EXPERIMENTAL
839 select SCSI_SAS_LIBSAS
840 ---help---
841 This driver supports the 6Gb/s SAS capabilities of the storage
842 control unit found in the Intel(R) C600 series chipset.
843
844 The experimental tag will be removed after the driver exits alpha
845
833config SCSI_GENERIC_NCR5380 846config SCSI_GENERIC_NCR5380
834 tristate "Generic NCR5380/53c400 SCSI PIO support" 847 tristate "Generic NCR5380/53c400 SCSI PIO support"
835 depends on ISA && SCSI 848 depends on ISA && SCSI
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index 7ad0b8a79ae8..3c08f5352b2d 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -73,6 +73,7 @@ obj-$(CONFIG_SCSI_AACRAID) += aacraid/
73obj-$(CONFIG_SCSI_AIC7XXX_OLD) += aic7xxx_old.o 73obj-$(CONFIG_SCSI_AIC7XXX_OLD) += aic7xxx_old.o
74obj-$(CONFIG_SCSI_AIC94XX) += aic94xx/ 74obj-$(CONFIG_SCSI_AIC94XX) += aic94xx/
75obj-$(CONFIG_SCSI_PM8001) += pm8001/ 75obj-$(CONFIG_SCSI_PM8001) += pm8001/
76obj-$(CONFIG_SCSI_ISCI) += isci/
76obj-$(CONFIG_SCSI_IPS) += ips.o 77obj-$(CONFIG_SCSI_IPS) += ips.o
77obj-$(CONFIG_SCSI_FD_MCS) += fd_mcs.o 78obj-$(CONFIG_SCSI_FD_MCS) += fd_mcs.o
78obj-$(CONFIG_SCSI_FUTURE_DOMAIN)+= fdomain.o 79obj-$(CONFIG_SCSI_FUTURE_DOMAIN)+= fdomain.o
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c
index c6c0434d8034..6bba23a26303 100644
--- a/drivers/scsi/hpsa.c
+++ b/drivers/scsi/hpsa.c
@@ -1037,6 +1037,7 @@ static void complete_scsi_command(struct CommandList *cp)
1037 unsigned char sense_key; 1037 unsigned char sense_key;
1038 unsigned char asc; /* additional sense code */ 1038 unsigned char asc; /* additional sense code */
1039 unsigned char ascq; /* additional sense code qualifier */ 1039 unsigned char ascq; /* additional sense code qualifier */
1040 unsigned long sense_data_size;
1040 1041
1041 ei = cp->err_info; 1042 ei = cp->err_info;
1042 cmd = (struct scsi_cmnd *) cp->scsi_cmd; 1043 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
@@ -1051,10 +1052,14 @@ static void complete_scsi_command(struct CommandList *cp)
1051 cmd->result |= ei->ScsiStatus; 1052 cmd->result |= ei->ScsiStatus;
1052 1053
1053 /* copy the sense data whether we need to or not. */ 1054 /* copy the sense data whether we need to or not. */
1054 memcpy(cmd->sense_buffer, ei->SenseInfo, 1055 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1055 ei->SenseLen > SCSI_SENSE_BUFFERSIZE ? 1056 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1056 SCSI_SENSE_BUFFERSIZE : 1057 else
1057 ei->SenseLen); 1058 sense_data_size = sizeof(ei->SenseInfo);
1059 if (ei->SenseLen < sense_data_size)
1060 sense_data_size = ei->SenseLen;
1061
1062 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1058 scsi_set_resid(cmd, ei->ResidualCnt); 1063 scsi_set_resid(cmd, ei->ResidualCnt);
1059 1064
1060 if (ei->CommandStatus == 0) { 1065 if (ei->CommandStatus == 0) {
@@ -2580,7 +2585,8 @@ static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2580 c->SG[0].Ext = 0; /* we are not chaining*/ 2585 c->SG[0].Ext = 0; /* we are not chaining*/
2581 } 2586 }
2582 hpsa_scsi_do_simple_cmd_core(h, c); 2587 hpsa_scsi_do_simple_cmd_core(h, c);
2583 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 2588 if (iocommand.buf_size > 0)
2589 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2584 check_ioctl_unit_attention(h, c); 2590 check_ioctl_unit_attention(h, c);
2585 2591
2586 /* Copy the error information out */ 2592 /* Copy the error information out */
diff --git a/drivers/scsi/ibmvscsi/ibmvfc.c b/drivers/scsi/ibmvscsi/ibmvfc.c
index b7650613b8c2..bdfa223a7dbb 100644
--- a/drivers/scsi/ibmvscsi/ibmvfc.c
+++ b/drivers/scsi/ibmvscsi/ibmvfc.c
@@ -4306,8 +4306,8 @@ static void ibmvfc_do_work(struct ibmvfc_host *vhost)
4306 spin_lock_irqsave(vhost->host->host_lock, flags); 4306 spin_lock_irqsave(vhost->host->host_lock, flags);
4307 if (rc == H_CLOSED) 4307 if (rc == H_CLOSED)
4308 vio_enable_interrupts(to_vio_dev(vhost->dev)); 4308 vio_enable_interrupts(to_vio_dev(vhost->dev));
4309 else if (rc || (rc = ibmvfc_send_crq_init(vhost)) || 4309 if (rc || (rc = ibmvfc_send_crq_init(vhost)) ||
4310 (rc = vio_enable_interrupts(to_vio_dev(vhost->dev)))) { 4310 (rc = vio_enable_interrupts(to_vio_dev(vhost->dev)))) {
4311 ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD); 4311 ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
4312 dev_err(vhost->dev, "Error after reset (rc=%d)\n", rc); 4312 dev_err(vhost->dev, "Error after reset (rc=%d)\n", rc);
4313 } 4313 }
diff --git a/drivers/scsi/isci/Makefile b/drivers/scsi/isci/Makefile
new file mode 100644
index 000000000000..3359e10e0d8f
--- /dev/null
+++ b/drivers/scsi/isci/Makefile
@@ -0,0 +1,8 @@
1obj-$(CONFIG_SCSI_ISCI) += isci.o
2isci-objs := init.o phy.o request.o \
3 remote_device.o port.o \
4 host.o task.o probe_roms.o \
5 remote_node_context.o \
6 remote_node_table.o \
7 unsolicited_frame_control.o \
8 port_config.o \
diff --git a/drivers/scsi/isci/firmware/Makefile b/drivers/scsi/isci/firmware/Makefile
new file mode 100644
index 000000000000..5f54461cabc5
--- /dev/null
+++ b/drivers/scsi/isci/firmware/Makefile
@@ -0,0 +1,19 @@
1# Makefile for create_fw
2#
3CC=gcc
4CFLAGS=-c -Wall -O2 -g
5LDFLAGS=
6SOURCES=create_fw.c
7OBJECTS=$(SOURCES:.cpp=.o)
8EXECUTABLE=create_fw
9
10all: $(SOURCES) $(EXECUTABLE)
11
12$(EXECUTABLE): $(OBJECTS)
13 $(CC) $(LDFLAGS) $(OBJECTS) -o $@
14
15.c.o:
16 $(CC) $(CFLAGS) $< -O $@
17
18clean:
19 rm -f *.o $(EXECUTABLE)
diff --git a/drivers/scsi/isci/firmware/README b/drivers/scsi/isci/firmware/README
new file mode 100644
index 000000000000..8056d2bd233b
--- /dev/null
+++ b/drivers/scsi/isci/firmware/README
@@ -0,0 +1,36 @@
1This defines the temporary binary blow we are to pass to the SCU
2driver to emulate the binary firmware that we will eventually be
3able to access via NVRAM on the SCU controller.
4
5The current size of the binary blob is expected to be 149 bytes or larger
6
7Header Types:
80x1: Phy Masks
90x2: Phy Gens
100x3: SAS Addrs
110xff: End of Data
12
13ID string - u8[12]: "#SCU MAGIC#\0"
14Version - u8: 1
15SubVersion - u8: 0
16
17Header Type - u8: 0x1
18Size - u8: 8
19Phy Mask - u32[8]
20
21Header Type - u8: 0x2
22Size - u8: 8
23Phy Gen - u32[8]
24
25Header Type - u8: 0x3
26Size - u8: 8
27Sas Addr - u64[8]
28
29Header Type - u8: 0xf
30
31
32==============================================================================
33
34Place isci_firmware.bin in /lib/firmware
35Be sure to recreate the initramfs image to include the firmware.
36
diff --git a/drivers/scsi/isci/firmware/create_fw.c b/drivers/scsi/isci/firmware/create_fw.c
new file mode 100644
index 000000000000..c7a2887a7e95
--- /dev/null
+++ b/drivers/scsi/isci/firmware/create_fw.c
@@ -0,0 +1,99 @@
1#include <stdio.h>
2#include <stdlib.h>
3#include <unistd.h>
4#include <sys/types.h>
5#include <sys/stat.h>
6#include <fcntl.h>
7#include <string.h>
8#include <errno.h>
9#include <asm/types.h>
10#include <strings.h>
11#include <stdint.h>
12
13#include "create_fw.h"
14#include "../probe_roms.h"
15
16int write_blob(struct isci_orom *isci_orom)
17{
18 FILE *fd;
19 int err;
20 size_t count;
21
22 fd = fopen(blob_name, "w+");
23 if (!fd) {
24 perror("Open file for write failed");
25 fclose(fd);
26 return -EIO;
27 }
28
29 count = fwrite(isci_orom, sizeof(struct isci_orom), 1, fd);
30 if (count != 1) {
31 perror("Write data failed");
32 fclose(fd);
33 return -EIO;
34 }
35
36 fclose(fd);
37
38 return 0;
39}
40
41void set_binary_values(struct isci_orom *isci_orom)
42{
43 int ctrl_idx, phy_idx, port_idx;
44
45 /* setting OROM signature */
46 strncpy(isci_orom->hdr.signature, sig, strlen(sig));
47 isci_orom->hdr.version = version;
48 isci_orom->hdr.total_block_length = sizeof(struct isci_orom);
49 isci_orom->hdr.hdr_length = sizeof(struct sci_bios_oem_param_block_hdr);
50 isci_orom->hdr.num_elements = num_elements;
51
52 for (ctrl_idx = 0; ctrl_idx < 2; ctrl_idx++) {
53 isci_orom->ctrl[ctrl_idx].controller.mode_type = mode_type;
54 isci_orom->ctrl[ctrl_idx].controller.max_concurrent_dev_spin_up =
55 max_num_concurrent_dev_spin_up;
56 isci_orom->ctrl[ctrl_idx].controller.do_enable_ssc =
57 enable_ssc;
58
59 for (port_idx = 0; port_idx < 4; port_idx++)
60 isci_orom->ctrl[ctrl_idx].ports[port_idx].phy_mask =
61 phy_mask[ctrl_idx][port_idx];
62
63 for (phy_idx = 0; phy_idx < 4; phy_idx++) {
64 isci_orom->ctrl[ctrl_idx].phys[phy_idx].sas_address.high =
65 (__u32)(sas_addr[ctrl_idx][phy_idx] >> 32);
66 isci_orom->ctrl[ctrl_idx].phys[phy_idx].sas_address.low =
67 (__u32)(sas_addr[ctrl_idx][phy_idx]);
68
69 isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control0 =
70 afe_tx_amp_control0;
71 isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control1 =
72 afe_tx_amp_control1;
73 isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control2 =
74 afe_tx_amp_control2;
75 isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control3 =
76 afe_tx_amp_control3;
77 }
78 }
79}
80
81int main(void)
82{
83 int err;
84 struct isci_orom *isci_orom;
85
86 isci_orom = malloc(sizeof(struct isci_orom));
87 memset(isci_orom, 0, sizeof(struct isci_orom));
88
89 set_binary_values(isci_orom);
90
91 err = write_blob(isci_orom);
92 if (err < 0) {
93 free(isci_orom);
94 return err;
95 }
96
97 free(isci_orom);
98 return 0;
99}
diff --git a/drivers/scsi/isci/firmware/create_fw.h b/drivers/scsi/isci/firmware/create_fw.h
new file mode 100644
index 000000000000..5f298828d22e
--- /dev/null
+++ b/drivers/scsi/isci/firmware/create_fw.h
@@ -0,0 +1,77 @@
1#ifndef _CREATE_FW_H_
2#define _CREATE_FW_H_
3#include "../probe_roms.h"
4
5
6/* we are configuring for 2 SCUs */
7static const int num_elements = 2;
8
9/*
10 * For all defined arrays:
11 * elements 0-3 are for SCU0, ports 0-3
12 * elements 4-7 are for SCU1, ports 0-3
13 *
14 * valid configurations for one SCU are:
15 * P0 P1 P2 P3
16 * ----------------
17 * 0xF,0x0,0x0,0x0 # 1 x4 port
18 * 0x3,0x0,0x4,0x8 # Phys 0 and 1 are a x2 port, phy 2 and phy 3 are each x1
19 * # ports
20 * 0x1,0x2,0xC,0x0 # Phys 0 and 1 are each x1 ports, phy 2 and phy 3 are a x2
21 * # port
22 * 0x3,0x0,0xC,0x0 # Phys 0 and 1 are a x2 port, phy 2 and phy 3 are a x2 port
23 * 0x1,0x2,0x4,0x8 # Each phy is a x1 port (this is the default configuration)
24 *
25 * if there is a port/phy on which you do not wish to override the default
26 * values, use the value assigned to UNINIT_PARAM (255).
27 */
28
29/* discovery mode type (port auto config mode by default ) */
30
31/*
32 * if there is a port/phy on which you do not wish to override the default
33 * values, use the value "0000000000000000". SAS address of zero's is
34 * considered invalid and will not be used.
35 */
36#ifdef MPC
37static const int mode_type = SCIC_PORT_MANUAL_CONFIGURATION_MODE;
38static const __u8 phy_mask[2][4] = { {1, 2, 4, 8},
39 {1, 2, 4, 8} };
40static const unsigned long long sas_addr[2][4] = { { 0x5FCFFFFFF0000001ULL,
41 0x5FCFFFFFF0000002ULL,
42 0x5FCFFFFFF0000003ULL,
43 0x5FCFFFFFF0000004ULL },
44 { 0x5FCFFFFFF0000005ULL,
45 0x5FCFFFFFF0000006ULL,
46 0x5FCFFFFFF0000007ULL,
47 0x5FCFFFFFF0000008ULL } };
48#else /* APC (default) */
49static const int mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
50static const __u8 phy_mask[2][4];
51static const unsigned long long sas_addr[2][4] = { { 0x5FCFFFFF00000001ULL,
52 0x5FCFFFFF00000001ULL,
53 0x5FCFFFFF00000001ULL,
54 0x5FCFFFFF00000001ULL },
55 { 0x5FCFFFFF00000002ULL,
56 0x5FCFFFFF00000002ULL,
57 0x5FCFFFFF00000002ULL,
58 0x5FCFFFFF00000002ULL } };
59#endif
60
61/* Maximum number of concurrent device spin up */
62static const int max_num_concurrent_dev_spin_up = 1;
63
64/* enable of ssc operation */
65static const int enable_ssc;
66
67/* AFE_TX_AMP_CONTROL */
68static const unsigned int afe_tx_amp_control0 = 0x000bdd08;
69static const unsigned int afe_tx_amp_control1 = 0x000ffc00;
70static const unsigned int afe_tx_amp_control2 = 0x000b7c09;
71static const unsigned int afe_tx_amp_control3 = 0x000afc6e;
72
73static const char blob_name[] = "isci_firmware.bin";
74static const char sig[] = "ISCUOEMB";
75static const unsigned char version = 0x10;
76
77#endif
diff --git a/drivers/scsi/isci/host.c b/drivers/scsi/isci/host.c
new file mode 100644
index 000000000000..26072f1e9852
--- /dev/null
+++ b/drivers/scsi/isci/host.c
@@ -0,0 +1,2751 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55#include <linux/circ_buf.h>
56#include <linux/device.h>
57#include <scsi/sas.h>
58#include "host.h"
59#include "isci.h"
60#include "port.h"
61#include "host.h"
62#include "probe_roms.h"
63#include "remote_device.h"
64#include "request.h"
65#include "scu_completion_codes.h"
66#include "scu_event_codes.h"
67#include "registers.h"
68#include "scu_remote_node_context.h"
69#include "scu_task_context.h"
70
71#define SCU_CONTEXT_RAM_INIT_STALL_TIME 200
72
73#define smu_max_ports(dcc_value) \
74 (\
75 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
76 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
77 )
78
79#define smu_max_task_contexts(dcc_value) \
80 (\
81 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
82 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
83 )
84
85#define smu_max_rncs(dcc_value) \
86 (\
87 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
88 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
89 )
90
91#define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT 100
92
93/**
94 *
95 *
96 * The number of milliseconds to wait while a given phy is consuming power
97 * before allowing another set of phys to consume power. Ultimately, this will
98 * be specified by OEM parameter.
99 */
100#define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
101
102/**
103 * NORMALIZE_PUT_POINTER() -
104 *
105 * This macro will normalize the completion queue put pointer so its value can
106 * be used as an array inde
107 */
108#define NORMALIZE_PUT_POINTER(x) \
109 ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
110
111
112/**
113 * NORMALIZE_EVENT_POINTER() -
114 *
115 * This macro will normalize the completion queue event entry so its value can
116 * be used as an index.
117 */
118#define NORMALIZE_EVENT_POINTER(x) \
119 (\
120 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
121 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
122 )
123
124/**
125 * NORMALIZE_GET_POINTER() -
126 *
127 * This macro will normalize the completion queue get pointer so its value can
128 * be used as an index into an array
129 */
130#define NORMALIZE_GET_POINTER(x) \
131 ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
132
133/**
134 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
135 *
136 * This macro will normalize the completion queue cycle pointer so it matches
137 * the completion queue cycle bit
138 */
139#define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
140 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
141
142/**
143 * COMPLETION_QUEUE_CYCLE_BIT() -
144 *
145 * This macro will return the cycle bit of the completion queue entry
146 */
147#define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
148
149/* Init the state machine and call the state entry function (if any) */
150void sci_init_sm(struct sci_base_state_machine *sm,
151 const struct sci_base_state *state_table, u32 initial_state)
152{
153 sci_state_transition_t handler;
154
155 sm->initial_state_id = initial_state;
156 sm->previous_state_id = initial_state;
157 sm->current_state_id = initial_state;
158 sm->state_table = state_table;
159
160 handler = sm->state_table[initial_state].enter_state;
161 if (handler)
162 handler(sm);
163}
164
165/* Call the state exit fn, update the current state, call the state entry fn */
166void sci_change_state(struct sci_base_state_machine *sm, u32 next_state)
167{
168 sci_state_transition_t handler;
169
170 handler = sm->state_table[sm->current_state_id].exit_state;
171 if (handler)
172 handler(sm);
173
174 sm->previous_state_id = sm->current_state_id;
175 sm->current_state_id = next_state;
176
177 handler = sm->state_table[sm->current_state_id].enter_state;
178 if (handler)
179 handler(sm);
180}
181
182static bool sci_controller_completion_queue_has_entries(struct isci_host *ihost)
183{
184 u32 get_value = ihost->completion_queue_get;
185 u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
186
187 if (NORMALIZE_GET_POINTER_CYCLE_BIT(get_value) ==
188 COMPLETION_QUEUE_CYCLE_BIT(ihost->completion_queue[get_index]))
189 return true;
190
191 return false;
192}
193
194static bool sci_controller_isr(struct isci_host *ihost)
195{
196 if (sci_controller_completion_queue_has_entries(ihost)) {
197 return true;
198 } else {
199 /*
200 * we have a spurious interrupt it could be that we have already
201 * emptied the completion queue from a previous interrupt */
202 writel(SMU_ISR_COMPLETION, &ihost->smu_registers->interrupt_status);
203
204 /*
205 * There is a race in the hardware that could cause us not to be notified
206 * of an interrupt completion if we do not take this step. We will mask
207 * then unmask the interrupts so if there is another interrupt pending
208 * the clearing of the interrupt source we get the next interrupt message. */
209 writel(0xFF000000, &ihost->smu_registers->interrupt_mask);
210 writel(0, &ihost->smu_registers->interrupt_mask);
211 }
212
213 return false;
214}
215
216irqreturn_t isci_msix_isr(int vec, void *data)
217{
218 struct isci_host *ihost = data;
219
220 if (sci_controller_isr(ihost))
221 tasklet_schedule(&ihost->completion_tasklet);
222
223 return IRQ_HANDLED;
224}
225
226static bool sci_controller_error_isr(struct isci_host *ihost)
227{
228 u32 interrupt_status;
229
230 interrupt_status =
231 readl(&ihost->smu_registers->interrupt_status);
232 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
233
234 if (interrupt_status != 0) {
235 /*
236 * There is an error interrupt pending so let it through and handle
237 * in the callback */
238 return true;
239 }
240
241 /*
242 * There is a race in the hardware that could cause us not to be notified
243 * of an interrupt completion if we do not take this step. We will mask
244 * then unmask the error interrupts so if there was another interrupt
245 * pending we will be notified.
246 * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
247 writel(0xff, &ihost->smu_registers->interrupt_mask);
248 writel(0, &ihost->smu_registers->interrupt_mask);
249
250 return false;
251}
252
253static void sci_controller_task_completion(struct isci_host *ihost, u32 ent)
254{
255 u32 index = SCU_GET_COMPLETION_INDEX(ent);
256 struct isci_request *ireq = ihost->reqs[index];
257
258 /* Make sure that we really want to process this IO request */
259 if (test_bit(IREQ_ACTIVE, &ireq->flags) &&
260 ireq->io_tag != SCI_CONTROLLER_INVALID_IO_TAG &&
261 ISCI_TAG_SEQ(ireq->io_tag) == ihost->io_request_sequence[index])
262 /* Yep this is a valid io request pass it along to the
263 * io request handler
264 */
265 sci_io_request_tc_completion(ireq, ent);
266}
267
268static void sci_controller_sdma_completion(struct isci_host *ihost, u32 ent)
269{
270 u32 index;
271 struct isci_request *ireq;
272 struct isci_remote_device *idev;
273
274 index = SCU_GET_COMPLETION_INDEX(ent);
275
276 switch (scu_get_command_request_type(ent)) {
277 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
278 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
279 ireq = ihost->reqs[index];
280 dev_warn(&ihost->pdev->dev, "%s: %x for io request %p\n",
281 __func__, ent, ireq);
282 /* @todo For a post TC operation we need to fail the IO
283 * request
284 */
285 break;
286 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
287 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
288 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
289 idev = ihost->device_table[index];
290 dev_warn(&ihost->pdev->dev, "%s: %x for device %p\n",
291 __func__, ent, idev);
292 /* @todo For a port RNC operation we need to fail the
293 * device
294 */
295 break;
296 default:
297 dev_warn(&ihost->pdev->dev, "%s: unknown completion type %x\n",
298 __func__, ent);
299 break;
300 }
301}
302
303static void sci_controller_unsolicited_frame(struct isci_host *ihost, u32 ent)
304{
305 u32 index;
306 u32 frame_index;
307
308 struct scu_unsolicited_frame_header *frame_header;
309 struct isci_phy *iphy;
310 struct isci_remote_device *idev;
311
312 enum sci_status result = SCI_FAILURE;
313
314 frame_index = SCU_GET_FRAME_INDEX(ent);
315
316 frame_header = ihost->uf_control.buffers.array[frame_index].header;
317 ihost->uf_control.buffers.array[frame_index].state = UNSOLICITED_FRAME_IN_USE;
318
319 if (SCU_GET_FRAME_ERROR(ent)) {
320 /*
321 * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
322 * / this cause a problem? We expect the phy initialization will
323 * / fail if there is an error in the frame. */
324 sci_controller_release_frame(ihost, frame_index);
325 return;
326 }
327
328 if (frame_header->is_address_frame) {
329 index = SCU_GET_PROTOCOL_ENGINE_INDEX(ent);
330 iphy = &ihost->phys[index];
331 result = sci_phy_frame_handler(iphy, frame_index);
332 } else {
333
334 index = SCU_GET_COMPLETION_INDEX(ent);
335
336 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
337 /*
338 * This is a signature fis or a frame from a direct attached SATA
339 * device that has not yet been created. In either case forwared
340 * the frame to the PE and let it take care of the frame data. */
341 index = SCU_GET_PROTOCOL_ENGINE_INDEX(ent);
342 iphy = &ihost->phys[index];
343 result = sci_phy_frame_handler(iphy, frame_index);
344 } else {
345 if (index < ihost->remote_node_entries)
346 idev = ihost->device_table[index];
347 else
348 idev = NULL;
349
350 if (idev != NULL)
351 result = sci_remote_device_frame_handler(idev, frame_index);
352 else
353 sci_controller_release_frame(ihost, frame_index);
354 }
355 }
356
357 if (result != SCI_SUCCESS) {
358 /*
359 * / @todo Is there any reason to report some additional error message
360 * / when we get this failure notifiction? */
361 }
362}
363
364static void sci_controller_event_completion(struct isci_host *ihost, u32 ent)
365{
366 struct isci_remote_device *idev;
367 struct isci_request *ireq;
368 struct isci_phy *iphy;
369 u32 index;
370
371 index = SCU_GET_COMPLETION_INDEX(ent);
372
373 switch (scu_get_event_type(ent)) {
374 case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
375 /* / @todo The driver did something wrong and we need to fix the condtion. */
376 dev_err(&ihost->pdev->dev,
377 "%s: SCIC Controller 0x%p received SMU command error "
378 "0x%x\n",
379 __func__,
380 ihost,
381 ent);
382 break;
383
384 case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
385 case SCU_EVENT_TYPE_SMU_ERROR:
386 case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
387 /*
388 * / @todo This is a hardware failure and its likely that we want to
389 * / reset the controller. */
390 dev_err(&ihost->pdev->dev,
391 "%s: SCIC Controller 0x%p received fatal controller "
392 "event 0x%x\n",
393 __func__,
394 ihost,
395 ent);
396 break;
397
398 case SCU_EVENT_TYPE_TRANSPORT_ERROR:
399 ireq = ihost->reqs[index];
400 sci_io_request_event_handler(ireq, ent);
401 break;
402
403 case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
404 switch (scu_get_event_specifier(ent)) {
405 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
406 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
407 ireq = ihost->reqs[index];
408 if (ireq != NULL)
409 sci_io_request_event_handler(ireq, ent);
410 else
411 dev_warn(&ihost->pdev->dev,
412 "%s: SCIC Controller 0x%p received "
413 "event 0x%x for io request object "
414 "that doesnt exist.\n",
415 __func__,
416 ihost,
417 ent);
418
419 break;
420
421 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
422 idev = ihost->device_table[index];
423 if (idev != NULL)
424 sci_remote_device_event_handler(idev, ent);
425 else
426 dev_warn(&ihost->pdev->dev,
427 "%s: SCIC Controller 0x%p received "
428 "event 0x%x for remote device object "
429 "that doesnt exist.\n",
430 __func__,
431 ihost,
432 ent);
433
434 break;
435 }
436 break;
437
438 case SCU_EVENT_TYPE_BROADCAST_CHANGE:
439 /*
440 * direct the broadcast change event to the phy first and then let
441 * the phy redirect the broadcast change to the port object */
442 case SCU_EVENT_TYPE_ERR_CNT_EVENT:
443 /*
444 * direct error counter event to the phy object since that is where
445 * we get the event notification. This is a type 4 event. */
446 case SCU_EVENT_TYPE_OSSP_EVENT:
447 index = SCU_GET_PROTOCOL_ENGINE_INDEX(ent);
448 iphy = &ihost->phys[index];
449 sci_phy_event_handler(iphy, ent);
450 break;
451
452 case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
453 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
454 case SCU_EVENT_TYPE_RNC_OPS_MISC:
455 if (index < ihost->remote_node_entries) {
456 idev = ihost->device_table[index];
457
458 if (idev != NULL)
459 sci_remote_device_event_handler(idev, ent);
460 } else
461 dev_err(&ihost->pdev->dev,
462 "%s: SCIC Controller 0x%p received event 0x%x "
463 "for remote device object 0x%0x that doesnt "
464 "exist.\n",
465 __func__,
466 ihost,
467 ent,
468 index);
469
470 break;
471
472 default:
473 dev_warn(&ihost->pdev->dev,
474 "%s: SCIC Controller received unknown event code %x\n",
475 __func__,
476 ent);
477 break;
478 }
479}
480
481static void sci_controller_process_completions(struct isci_host *ihost)
482{
483 u32 completion_count = 0;
484 u32 ent;
485 u32 get_index;
486 u32 get_cycle;
487 u32 event_get;
488 u32 event_cycle;
489
490 dev_dbg(&ihost->pdev->dev,
491 "%s: completion queue begining get:0x%08x\n",
492 __func__,
493 ihost->completion_queue_get);
494
495 /* Get the component parts of the completion queue */
496 get_index = NORMALIZE_GET_POINTER(ihost->completion_queue_get);
497 get_cycle = SMU_CQGR_CYCLE_BIT & ihost->completion_queue_get;
498
499 event_get = NORMALIZE_EVENT_POINTER(ihost->completion_queue_get);
500 event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & ihost->completion_queue_get;
501
502 while (
503 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
504 == COMPLETION_QUEUE_CYCLE_BIT(ihost->completion_queue[get_index])
505 ) {
506 completion_count++;
507
508 ent = ihost->completion_queue[get_index];
509
510 /* increment the get pointer and check for rollover to toggle the cycle bit */
511 get_cycle ^= ((get_index+1) & SCU_MAX_COMPLETION_QUEUE_ENTRIES) <<
512 (SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT - SCU_MAX_COMPLETION_QUEUE_SHIFT);
513 get_index = (get_index+1) & (SCU_MAX_COMPLETION_QUEUE_ENTRIES-1);
514
515 dev_dbg(&ihost->pdev->dev,
516 "%s: completion queue entry:0x%08x\n",
517 __func__,
518 ent);
519
520 switch (SCU_GET_COMPLETION_TYPE(ent)) {
521 case SCU_COMPLETION_TYPE_TASK:
522 sci_controller_task_completion(ihost, ent);
523 break;
524
525 case SCU_COMPLETION_TYPE_SDMA:
526 sci_controller_sdma_completion(ihost, ent);
527 break;
528
529 case SCU_COMPLETION_TYPE_UFI:
530 sci_controller_unsolicited_frame(ihost, ent);
531 break;
532
533 case SCU_COMPLETION_TYPE_EVENT:
534 case SCU_COMPLETION_TYPE_NOTIFY: {
535 event_cycle ^= ((event_get+1) & SCU_MAX_EVENTS) <<
536 (SMU_COMPLETION_QUEUE_GET_EVENT_CYCLE_BIT_SHIFT - SCU_MAX_EVENTS_SHIFT);
537 event_get = (event_get+1) & (SCU_MAX_EVENTS-1);
538
539 sci_controller_event_completion(ihost, ent);
540 break;
541 }
542 default:
543 dev_warn(&ihost->pdev->dev,
544 "%s: SCIC Controller received unknown "
545 "completion type %x\n",
546 __func__,
547 ent);
548 break;
549 }
550 }
551
552 /* Update the get register if we completed one or more entries */
553 if (completion_count > 0) {
554 ihost->completion_queue_get =
555 SMU_CQGR_GEN_BIT(ENABLE) |
556 SMU_CQGR_GEN_BIT(EVENT_ENABLE) |
557 event_cycle |
558 SMU_CQGR_GEN_VAL(EVENT_POINTER, event_get) |
559 get_cycle |
560 SMU_CQGR_GEN_VAL(POINTER, get_index);
561
562 writel(ihost->completion_queue_get,
563 &ihost->smu_registers->completion_queue_get);
564
565 }
566
567 dev_dbg(&ihost->pdev->dev,
568 "%s: completion queue ending get:0x%08x\n",
569 __func__,
570 ihost->completion_queue_get);
571
572}
573
574static void sci_controller_error_handler(struct isci_host *ihost)
575{
576 u32 interrupt_status;
577
578 interrupt_status =
579 readl(&ihost->smu_registers->interrupt_status);
580
581 if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
582 sci_controller_completion_queue_has_entries(ihost)) {
583
584 sci_controller_process_completions(ihost);
585 writel(SMU_ISR_QUEUE_SUSPEND, &ihost->smu_registers->interrupt_status);
586 } else {
587 dev_err(&ihost->pdev->dev, "%s: status: %#x\n", __func__,
588 interrupt_status);
589
590 sci_change_state(&ihost->sm, SCIC_FAILED);
591
592 return;
593 }
594
595 /* If we dont process any completions I am not sure that we want to do this.
596 * We are in the middle of a hardware fault and should probably be reset.
597 */
598 writel(0, &ihost->smu_registers->interrupt_mask);
599}
600
601irqreturn_t isci_intx_isr(int vec, void *data)
602{
603 irqreturn_t ret = IRQ_NONE;
604 struct isci_host *ihost = data;
605
606 if (sci_controller_isr(ihost)) {
607 writel(SMU_ISR_COMPLETION, &ihost->smu_registers->interrupt_status);
608 tasklet_schedule(&ihost->completion_tasklet);
609 ret = IRQ_HANDLED;
610 } else if (sci_controller_error_isr(ihost)) {
611 spin_lock(&ihost->scic_lock);
612 sci_controller_error_handler(ihost);
613 spin_unlock(&ihost->scic_lock);
614 ret = IRQ_HANDLED;
615 }
616
617 return ret;
618}
619
620irqreturn_t isci_error_isr(int vec, void *data)
621{
622 struct isci_host *ihost = data;
623
624 if (sci_controller_error_isr(ihost))
625 sci_controller_error_handler(ihost);
626
627 return IRQ_HANDLED;
628}
629
630/**
631 * isci_host_start_complete() - This function is called by the core library,
632 * through the ISCI Module, to indicate controller start status.
633 * @isci_host: This parameter specifies the ISCI host object
634 * @completion_status: This parameter specifies the completion status from the
635 * core library.
636 *
637 */
638static void isci_host_start_complete(struct isci_host *ihost, enum sci_status completion_status)
639{
640 if (completion_status != SCI_SUCCESS)
641 dev_info(&ihost->pdev->dev,
642 "controller start timed out, continuing...\n");
643 isci_host_change_state(ihost, isci_ready);
644 clear_bit(IHOST_START_PENDING, &ihost->flags);
645 wake_up(&ihost->eventq);
646}
647
648int isci_host_scan_finished(struct Scsi_Host *shost, unsigned long time)
649{
650 struct isci_host *ihost = SHOST_TO_SAS_HA(shost)->lldd_ha;
651
652 if (test_bit(IHOST_START_PENDING, &ihost->flags))
653 return 0;
654
655 /* todo: use sas_flush_discovery once it is upstream */
656 scsi_flush_work(shost);
657
658 scsi_flush_work(shost);
659
660 dev_dbg(&ihost->pdev->dev,
661 "%s: ihost->status = %d, time = %ld\n",
662 __func__, isci_host_get_state(ihost), time);
663
664 return 1;
665
666}
667
668/**
669 * sci_controller_get_suggested_start_timeout() - This method returns the
670 * suggested sci_controller_start() timeout amount. The user is free to
671 * use any timeout value, but this method provides the suggested minimum
672 * start timeout value. The returned value is based upon empirical
673 * information determined as a result of interoperability testing.
674 * @controller: the handle to the controller object for which to return the
675 * suggested start timeout.
676 *
677 * This method returns the number of milliseconds for the suggested start
678 * operation timeout.
679 */
680static u32 sci_controller_get_suggested_start_timeout(struct isci_host *ihost)
681{
682 /* Validate the user supplied parameters. */
683 if (!ihost)
684 return 0;
685
686 /*
687 * The suggested minimum timeout value for a controller start operation:
688 *
689 * Signature FIS Timeout
690 * + Phy Start Timeout
691 * + Number of Phy Spin Up Intervals
692 * ---------------------------------
693 * Number of milliseconds for the controller start operation.
694 *
695 * NOTE: The number of phy spin up intervals will be equivalent
696 * to the number of phys divided by the number phys allowed
697 * per interval - 1 (once OEM parameters are supported).
698 * Currently we assume only 1 phy per interval. */
699
700 return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
701 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
702 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
703}
704
705static void sci_controller_enable_interrupts(struct isci_host *ihost)
706{
707 BUG_ON(ihost->smu_registers == NULL);
708 writel(0, &ihost->smu_registers->interrupt_mask);
709}
710
711void sci_controller_disable_interrupts(struct isci_host *ihost)
712{
713 BUG_ON(ihost->smu_registers == NULL);
714 writel(0xffffffff, &ihost->smu_registers->interrupt_mask);
715}
716
717static void sci_controller_enable_port_task_scheduler(struct isci_host *ihost)
718{
719 u32 port_task_scheduler_value;
720
721 port_task_scheduler_value =
722 readl(&ihost->scu_registers->peg0.ptsg.control);
723 port_task_scheduler_value |=
724 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) |
725 SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
726 writel(port_task_scheduler_value,
727 &ihost->scu_registers->peg0.ptsg.control);
728}
729
730static void sci_controller_assign_task_entries(struct isci_host *ihost)
731{
732 u32 task_assignment;
733
734 /*
735 * Assign all the TCs to function 0
736 * TODO: Do we actually need to read this register to write it back?
737 */
738
739 task_assignment =
740 readl(&ihost->smu_registers->task_context_assignment[0]);
741
742 task_assignment |= (SMU_TCA_GEN_VAL(STARTING, 0)) |
743 (SMU_TCA_GEN_VAL(ENDING, ihost->task_context_entries - 1)) |
744 (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE));
745
746 writel(task_assignment,
747 &ihost->smu_registers->task_context_assignment[0]);
748
749}
750
751static void sci_controller_initialize_completion_queue(struct isci_host *ihost)
752{
753 u32 index;
754 u32 completion_queue_control_value;
755 u32 completion_queue_get_value;
756 u32 completion_queue_put_value;
757
758 ihost->completion_queue_get = 0;
759
760 completion_queue_control_value =
761 (SMU_CQC_QUEUE_LIMIT_SET(SCU_MAX_COMPLETION_QUEUE_ENTRIES - 1) |
762 SMU_CQC_EVENT_LIMIT_SET(SCU_MAX_EVENTS - 1));
763
764 writel(completion_queue_control_value,
765 &ihost->smu_registers->completion_queue_control);
766
767
768 /* Set the completion queue get pointer and enable the queue */
769 completion_queue_get_value = (
770 (SMU_CQGR_GEN_VAL(POINTER, 0))
771 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
772 | (SMU_CQGR_GEN_BIT(ENABLE))
773 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
774 );
775
776 writel(completion_queue_get_value,
777 &ihost->smu_registers->completion_queue_get);
778
779 /* Set the completion queue put pointer */
780 completion_queue_put_value = (
781 (SMU_CQPR_GEN_VAL(POINTER, 0))
782 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
783 );
784
785 writel(completion_queue_put_value,
786 &ihost->smu_registers->completion_queue_put);
787
788 /* Initialize the cycle bit of the completion queue entries */
789 for (index = 0; index < SCU_MAX_COMPLETION_QUEUE_ENTRIES; index++) {
790 /*
791 * If get.cycle_bit != completion_queue.cycle_bit
792 * its not a valid completion queue entry
793 * so at system start all entries are invalid */
794 ihost->completion_queue[index] = 0x80000000;
795 }
796}
797
798static void sci_controller_initialize_unsolicited_frame_queue(struct isci_host *ihost)
799{
800 u32 frame_queue_control_value;
801 u32 frame_queue_get_value;
802 u32 frame_queue_put_value;
803
804 /* Write the queue size */
805 frame_queue_control_value =
806 SCU_UFQC_GEN_VAL(QUEUE_SIZE, SCU_MAX_UNSOLICITED_FRAMES);
807
808 writel(frame_queue_control_value,
809 &ihost->scu_registers->sdma.unsolicited_frame_queue_control);
810
811 /* Setup the get pointer for the unsolicited frame queue */
812 frame_queue_get_value = (
813 SCU_UFQGP_GEN_VAL(POINTER, 0)
814 | SCU_UFQGP_GEN_BIT(ENABLE_BIT)
815 );
816
817 writel(frame_queue_get_value,
818 &ihost->scu_registers->sdma.unsolicited_frame_get_pointer);
819 /* Setup the put pointer for the unsolicited frame queue */
820 frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
821 writel(frame_queue_put_value,
822 &ihost->scu_registers->sdma.unsolicited_frame_put_pointer);
823}
824
825static void sci_controller_transition_to_ready(struct isci_host *ihost, enum sci_status status)
826{
827 if (ihost->sm.current_state_id == SCIC_STARTING) {
828 /*
829 * We move into the ready state, because some of the phys/ports
830 * may be up and operational.
831 */
832 sci_change_state(&ihost->sm, SCIC_READY);
833
834 isci_host_start_complete(ihost, status);
835 }
836}
837
838static bool is_phy_starting(struct isci_phy *iphy)
839{
840 enum sci_phy_states state;
841
842 state = iphy->sm.current_state_id;
843 switch (state) {
844 case SCI_PHY_STARTING:
845 case SCI_PHY_SUB_INITIAL:
846 case SCI_PHY_SUB_AWAIT_SAS_SPEED_EN:
847 case SCI_PHY_SUB_AWAIT_IAF_UF:
848 case SCI_PHY_SUB_AWAIT_SAS_POWER:
849 case SCI_PHY_SUB_AWAIT_SATA_POWER:
850 case SCI_PHY_SUB_AWAIT_SATA_PHY_EN:
851 case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN:
852 case SCI_PHY_SUB_AWAIT_SIG_FIS_UF:
853 case SCI_PHY_SUB_FINAL:
854 return true;
855 default:
856 return false;
857 }
858}
859
860/**
861 * sci_controller_start_next_phy - start phy
862 * @scic: controller
863 *
864 * If all the phys have been started, then attempt to transition the
865 * controller to the READY state and inform the user
866 * (sci_cb_controller_start_complete()).
867 */
868static enum sci_status sci_controller_start_next_phy(struct isci_host *ihost)
869{
870 struct sci_oem_params *oem = &ihost->oem_parameters;
871 struct isci_phy *iphy;
872 enum sci_status status;
873
874 status = SCI_SUCCESS;
875
876 if (ihost->phy_startup_timer_pending)
877 return status;
878
879 if (ihost->next_phy_to_start >= SCI_MAX_PHYS) {
880 bool is_controller_start_complete = true;
881 u32 state;
882 u8 index;
883
884 for (index = 0; index < SCI_MAX_PHYS; index++) {
885 iphy = &ihost->phys[index];
886 state = iphy->sm.current_state_id;
887
888 if (!phy_get_non_dummy_port(iphy))
889 continue;
890
891 /* The controller start operation is complete iff:
892 * - all links have been given an opportunity to start
893 * - have no indication of a connected device
894 * - have an indication of a connected device and it has
895 * finished the link training process.
896 */
897 if ((iphy->is_in_link_training == false && state == SCI_PHY_INITIAL) ||
898 (iphy->is_in_link_training == false && state == SCI_PHY_STOPPED) ||
899 (iphy->is_in_link_training == true && is_phy_starting(iphy))) {
900 is_controller_start_complete = false;
901 break;
902 }
903 }
904
905 /*
906 * The controller has successfully finished the start process.
907 * Inform the SCI Core user and transition to the READY state. */
908 if (is_controller_start_complete == true) {
909 sci_controller_transition_to_ready(ihost, SCI_SUCCESS);
910 sci_del_timer(&ihost->phy_timer);
911 ihost->phy_startup_timer_pending = false;
912 }
913 } else {
914 iphy = &ihost->phys[ihost->next_phy_to_start];
915
916 if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
917 if (phy_get_non_dummy_port(iphy) == NULL) {
918 ihost->next_phy_to_start++;
919
920 /* Caution recursion ahead be forwarned
921 *
922 * The PHY was never added to a PORT in MPC mode
923 * so start the next phy in sequence This phy
924 * will never go link up and will not draw power
925 * the OEM parameters either configured the phy
926 * incorrectly for the PORT or it was never
927 * assigned to a PORT
928 */
929 return sci_controller_start_next_phy(ihost);
930 }
931 }
932
933 status = sci_phy_start(iphy);
934
935 if (status == SCI_SUCCESS) {
936 sci_mod_timer(&ihost->phy_timer,
937 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT);
938 ihost->phy_startup_timer_pending = true;
939 } else {
940 dev_warn(&ihost->pdev->dev,
941 "%s: Controller stop operation failed "
942 "to stop phy %d because of status "
943 "%d.\n",
944 __func__,
945 ihost->phys[ihost->next_phy_to_start].phy_index,
946 status);
947 }
948
949 ihost->next_phy_to_start++;
950 }
951
952 return status;
953}
954
955static void phy_startup_timeout(unsigned long data)
956{
957 struct sci_timer *tmr = (struct sci_timer *)data;
958 struct isci_host *ihost = container_of(tmr, typeof(*ihost), phy_timer);
959 unsigned long flags;
960 enum sci_status status;
961
962 spin_lock_irqsave(&ihost->scic_lock, flags);
963
964 if (tmr->cancel)
965 goto done;
966
967 ihost->phy_startup_timer_pending = false;
968
969 do {
970 status = sci_controller_start_next_phy(ihost);
971 } while (status != SCI_SUCCESS);
972
973done:
974 spin_unlock_irqrestore(&ihost->scic_lock, flags);
975}
976
977static u16 isci_tci_active(struct isci_host *ihost)
978{
979 return CIRC_CNT(ihost->tci_head, ihost->tci_tail, SCI_MAX_IO_REQUESTS);
980}
981
982static enum sci_status sci_controller_start(struct isci_host *ihost,
983 u32 timeout)
984{
985 enum sci_status result;
986 u16 index;
987
988 if (ihost->sm.current_state_id != SCIC_INITIALIZED) {
989 dev_warn(&ihost->pdev->dev,
990 "SCIC Controller start operation requested in "
991 "invalid state\n");
992 return SCI_FAILURE_INVALID_STATE;
993 }
994
995 /* Build the TCi free pool */
996 BUILD_BUG_ON(SCI_MAX_IO_REQUESTS > 1 << sizeof(ihost->tci_pool[0]) * 8);
997 ihost->tci_head = 0;
998 ihost->tci_tail = 0;
999 for (index = 0; index < ihost->task_context_entries; index++)
1000 isci_tci_free(ihost, index);
1001
1002 /* Build the RNi free pool */
1003 sci_remote_node_table_initialize(&ihost->available_remote_nodes,
1004 ihost->remote_node_entries);
1005
1006 /*
1007 * Before anything else lets make sure we will not be
1008 * interrupted by the hardware.
1009 */
1010 sci_controller_disable_interrupts(ihost);
1011
1012 /* Enable the port task scheduler */
1013 sci_controller_enable_port_task_scheduler(ihost);
1014
1015 /* Assign all the task entries to ihost physical function */
1016 sci_controller_assign_task_entries(ihost);
1017
1018 /* Now initialize the completion queue */
1019 sci_controller_initialize_completion_queue(ihost);
1020
1021 /* Initialize the unsolicited frame queue for use */
1022 sci_controller_initialize_unsolicited_frame_queue(ihost);
1023
1024 /* Start all of the ports on this controller */
1025 for (index = 0; index < ihost->logical_port_entries; index++) {
1026 struct isci_port *iport = &ihost->ports[index];
1027
1028 result = sci_port_start(iport);
1029 if (result)
1030 return result;
1031 }
1032
1033 sci_controller_start_next_phy(ihost);
1034
1035 sci_mod_timer(&ihost->timer, timeout);
1036
1037 sci_change_state(&ihost->sm, SCIC_STARTING);
1038
1039 return SCI_SUCCESS;
1040}
1041
1042void isci_host_scan_start(struct Scsi_Host *shost)
1043{
1044 struct isci_host *ihost = SHOST_TO_SAS_HA(shost)->lldd_ha;
1045 unsigned long tmo = sci_controller_get_suggested_start_timeout(ihost);
1046
1047 set_bit(IHOST_START_PENDING, &ihost->flags);
1048
1049 spin_lock_irq(&ihost->scic_lock);
1050 sci_controller_start(ihost, tmo);
1051 sci_controller_enable_interrupts(ihost);
1052 spin_unlock_irq(&ihost->scic_lock);
1053}
1054
1055static void isci_host_stop_complete(struct isci_host *ihost, enum sci_status completion_status)
1056{
1057 isci_host_change_state(ihost, isci_stopped);
1058 sci_controller_disable_interrupts(ihost);
1059 clear_bit(IHOST_STOP_PENDING, &ihost->flags);
1060 wake_up(&ihost->eventq);
1061}
1062
1063static void sci_controller_completion_handler(struct isci_host *ihost)
1064{
1065 /* Empty out the completion queue */
1066 if (sci_controller_completion_queue_has_entries(ihost))
1067 sci_controller_process_completions(ihost);
1068
1069 /* Clear the interrupt and enable all interrupts again */
1070 writel(SMU_ISR_COMPLETION, &ihost->smu_registers->interrupt_status);
1071 /* Could we write the value of SMU_ISR_COMPLETION? */
1072 writel(0xFF000000, &ihost->smu_registers->interrupt_mask);
1073 writel(0, &ihost->smu_registers->interrupt_mask);
1074}
1075
1076/**
1077 * isci_host_completion_routine() - This function is the delayed service
1078 * routine that calls the sci core library's completion handler. It's
1079 * scheduled as a tasklet from the interrupt service routine when interrupts
1080 * in use, or set as the timeout function in polled mode.
1081 * @data: This parameter specifies the ISCI host object
1082 *
1083 */
1084static void isci_host_completion_routine(unsigned long data)
1085{
1086 struct isci_host *ihost = (struct isci_host *)data;
1087 struct list_head completed_request_list;
1088 struct list_head errored_request_list;
1089 struct list_head *current_position;
1090 struct list_head *next_position;
1091 struct isci_request *request;
1092 struct isci_request *next_request;
1093 struct sas_task *task;
1094
1095 INIT_LIST_HEAD(&completed_request_list);
1096 INIT_LIST_HEAD(&errored_request_list);
1097
1098 spin_lock_irq(&ihost->scic_lock);
1099
1100 sci_controller_completion_handler(ihost);
1101
1102 /* Take the lists of completed I/Os from the host. */
1103
1104 list_splice_init(&ihost->requests_to_complete,
1105 &completed_request_list);
1106
1107 /* Take the list of errored I/Os from the host. */
1108 list_splice_init(&ihost->requests_to_errorback,
1109 &errored_request_list);
1110
1111 spin_unlock_irq(&ihost->scic_lock);
1112
1113 /* Process any completions in the lists. */
1114 list_for_each_safe(current_position, next_position,
1115 &completed_request_list) {
1116
1117 request = list_entry(current_position, struct isci_request,
1118 completed_node);
1119 task = isci_request_access_task(request);
1120
1121 /* Normal notification (task_done) */
1122 dev_dbg(&ihost->pdev->dev,
1123 "%s: Normal - request/task = %p/%p\n",
1124 __func__,
1125 request,
1126 task);
1127
1128 /* Return the task to libsas */
1129 if (task != NULL) {
1130
1131 task->lldd_task = NULL;
1132 if (!(task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1133
1134 /* If the task is already in the abort path,
1135 * the task_done callback cannot be called.
1136 */
1137 task->task_done(task);
1138 }
1139 }
1140
1141 spin_lock_irq(&ihost->scic_lock);
1142 isci_free_tag(ihost, request->io_tag);
1143 spin_unlock_irq(&ihost->scic_lock);
1144 }
1145 list_for_each_entry_safe(request, next_request, &errored_request_list,
1146 completed_node) {
1147
1148 task = isci_request_access_task(request);
1149
1150 /* Use sas_task_abort */
1151 dev_warn(&ihost->pdev->dev,
1152 "%s: Error - request/task = %p/%p\n",
1153 __func__,
1154 request,
1155 task);
1156
1157 if (task != NULL) {
1158
1159 /* Put the task into the abort path if it's not there
1160 * already.
1161 */
1162 if (!(task->task_state_flags & SAS_TASK_STATE_ABORTED))
1163 sas_task_abort(task);
1164
1165 } else {
1166 /* This is a case where the request has completed with a
1167 * status such that it needed further target servicing,
1168 * but the sas_task reference has already been removed
1169 * from the request. Since it was errored, it was not
1170 * being aborted, so there is nothing to do except free
1171 * it.
1172 */
1173
1174 spin_lock_irq(&ihost->scic_lock);
1175 /* Remove the request from the remote device's list
1176 * of pending requests.
1177 */
1178 list_del_init(&request->dev_node);
1179 isci_free_tag(ihost, request->io_tag);
1180 spin_unlock_irq(&ihost->scic_lock);
1181 }
1182 }
1183
1184}
1185
1186/**
1187 * sci_controller_stop() - This method will stop an individual controller
1188 * object.This method will invoke the associated user callback upon
1189 * completion. The completion callback is called when the following
1190 * conditions are met: -# the method return status is SCI_SUCCESS. -# the
1191 * controller has been quiesced. This method will ensure that all IO
1192 * requests are quiesced, phys are stopped, and all additional operation by
1193 * the hardware is halted.
1194 * @controller: the handle to the controller object to stop.
1195 * @timeout: This parameter specifies the number of milliseconds in which the
1196 * stop operation should complete.
1197 *
1198 * The controller must be in the STARTED or STOPPED state. Indicate if the
1199 * controller stop method succeeded or failed in some way. SCI_SUCCESS if the
1200 * stop operation successfully began. SCI_WARNING_ALREADY_IN_STATE if the
1201 * controller is already in the STOPPED state. SCI_FAILURE_INVALID_STATE if the
1202 * controller is not either in the STARTED or STOPPED states.
1203 */
1204static enum sci_status sci_controller_stop(struct isci_host *ihost, u32 timeout)
1205{
1206 if (ihost->sm.current_state_id != SCIC_READY) {
1207 dev_warn(&ihost->pdev->dev,
1208 "SCIC Controller stop operation requested in "
1209 "invalid state\n");
1210 return SCI_FAILURE_INVALID_STATE;
1211 }
1212
1213 sci_mod_timer(&ihost->timer, timeout);
1214 sci_change_state(&ihost->sm, SCIC_STOPPING);
1215 return SCI_SUCCESS;
1216}
1217
1218/**
1219 * sci_controller_reset() - This method will reset the supplied core
1220 * controller regardless of the state of said controller. This operation is
1221 * considered destructive. In other words, all current operations are wiped
1222 * out. No IO completions for outstanding devices occur. Outstanding IO
1223 * requests are not aborted or completed at the actual remote device.
1224 * @controller: the handle to the controller object to reset.
1225 *
1226 * Indicate if the controller reset method succeeded or failed in some way.
1227 * SCI_SUCCESS if the reset operation successfully started. SCI_FATAL_ERROR if
1228 * the controller reset operation is unable to complete.
1229 */
1230static enum sci_status sci_controller_reset(struct isci_host *ihost)
1231{
1232 switch (ihost->sm.current_state_id) {
1233 case SCIC_RESET:
1234 case SCIC_READY:
1235 case SCIC_STOPPED:
1236 case SCIC_FAILED:
1237 /*
1238 * The reset operation is not a graceful cleanup, just
1239 * perform the state transition.
1240 */
1241 sci_change_state(&ihost->sm, SCIC_RESETTING);
1242 return SCI_SUCCESS;
1243 default:
1244 dev_warn(&ihost->pdev->dev,
1245 "SCIC Controller reset operation requested in "
1246 "invalid state\n");
1247 return SCI_FAILURE_INVALID_STATE;
1248 }
1249}
1250
1251void isci_host_deinit(struct isci_host *ihost)
1252{
1253 int i;
1254
1255 isci_host_change_state(ihost, isci_stopping);
1256 for (i = 0; i < SCI_MAX_PORTS; i++) {
1257 struct isci_port *iport = &ihost->ports[i];
1258 struct isci_remote_device *idev, *d;
1259
1260 list_for_each_entry_safe(idev, d, &iport->remote_dev_list, node) {
1261 if (test_bit(IDEV_ALLOCATED, &idev->flags))
1262 isci_remote_device_stop(ihost, idev);
1263 }
1264 }
1265
1266 set_bit(IHOST_STOP_PENDING, &ihost->flags);
1267
1268 spin_lock_irq(&ihost->scic_lock);
1269 sci_controller_stop(ihost, SCIC_CONTROLLER_STOP_TIMEOUT);
1270 spin_unlock_irq(&ihost->scic_lock);
1271
1272 wait_for_stop(ihost);
1273 sci_controller_reset(ihost);
1274
1275 /* Cancel any/all outstanding port timers */
1276 for (i = 0; i < ihost->logical_port_entries; i++) {
1277 struct isci_port *iport = &ihost->ports[i];
1278 del_timer_sync(&iport->timer.timer);
1279 }
1280
1281 /* Cancel any/all outstanding phy timers */
1282 for (i = 0; i < SCI_MAX_PHYS; i++) {
1283 struct isci_phy *iphy = &ihost->phys[i];
1284 del_timer_sync(&iphy->sata_timer.timer);
1285 }
1286
1287 del_timer_sync(&ihost->port_agent.timer.timer);
1288
1289 del_timer_sync(&ihost->power_control.timer.timer);
1290
1291 del_timer_sync(&ihost->timer.timer);
1292
1293 del_timer_sync(&ihost->phy_timer.timer);
1294}
1295
1296static void __iomem *scu_base(struct isci_host *isci_host)
1297{
1298 struct pci_dev *pdev = isci_host->pdev;
1299 int id = isci_host->id;
1300
1301 return pcim_iomap_table(pdev)[SCI_SCU_BAR * 2] + SCI_SCU_BAR_SIZE * id;
1302}
1303
1304static void __iomem *smu_base(struct isci_host *isci_host)
1305{
1306 struct pci_dev *pdev = isci_host->pdev;
1307 int id = isci_host->id;
1308
1309 return pcim_iomap_table(pdev)[SCI_SMU_BAR * 2] + SCI_SMU_BAR_SIZE * id;
1310}
1311
1312static void isci_user_parameters_get(struct sci_user_parameters *u)
1313{
1314 int i;
1315
1316 for (i = 0; i < SCI_MAX_PHYS; i++) {
1317 struct sci_phy_user_params *u_phy = &u->phys[i];
1318
1319 u_phy->max_speed_generation = phy_gen;
1320
1321 /* we are not exporting these for now */
1322 u_phy->align_insertion_frequency = 0x7f;
1323 u_phy->in_connection_align_insertion_frequency = 0xff;
1324 u_phy->notify_enable_spin_up_insertion_frequency = 0x33;
1325 }
1326
1327 u->stp_inactivity_timeout = stp_inactive_to;
1328 u->ssp_inactivity_timeout = ssp_inactive_to;
1329 u->stp_max_occupancy_timeout = stp_max_occ_to;
1330 u->ssp_max_occupancy_timeout = ssp_max_occ_to;
1331 u->no_outbound_task_timeout = no_outbound_task_to;
1332 u->max_number_concurrent_device_spin_up = max_concurr_spinup;
1333}
1334
1335static void sci_controller_initial_state_enter(struct sci_base_state_machine *sm)
1336{
1337 struct isci_host *ihost = container_of(sm, typeof(*ihost), sm);
1338
1339 sci_change_state(&ihost->sm, SCIC_RESET);
1340}
1341
1342static inline void sci_controller_starting_state_exit(struct sci_base_state_machine *sm)
1343{
1344 struct isci_host *ihost = container_of(sm, typeof(*ihost), sm);
1345
1346 sci_del_timer(&ihost->timer);
1347}
1348
1349#define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
1350#define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
1351#define INTERRUPT_COALESCE_TIMEOUT_MAX_US 2700000
1352#define INTERRUPT_COALESCE_NUMBER_MAX 256
1353#define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN 7
1354#define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX 28
1355
1356/**
1357 * sci_controller_set_interrupt_coalescence() - This method allows the user to
1358 * configure the interrupt coalescence.
1359 * @controller: This parameter represents the handle to the controller object
1360 * for which its interrupt coalesce register is overridden.
1361 * @coalesce_number: Used to control the number of entries in the Completion
1362 * Queue before an interrupt is generated. If the number of entries exceed
1363 * this number, an interrupt will be generated. The valid range of the input
1364 * is [0, 256]. A setting of 0 results in coalescing being disabled.
1365 * @coalesce_timeout: Timeout value in microseconds. The valid range of the
1366 * input is [0, 2700000] . A setting of 0 is allowed and results in no
1367 * interrupt coalescing timeout.
1368 *
1369 * Indicate if the user successfully set the interrupt coalesce parameters.
1370 * SCI_SUCCESS The user successfully updated the interrutp coalescence.
1371 * SCI_FAILURE_INVALID_PARAMETER_VALUE The user input value is out of range.
1372 */
1373static enum sci_status
1374sci_controller_set_interrupt_coalescence(struct isci_host *ihost,
1375 u32 coalesce_number,
1376 u32 coalesce_timeout)
1377{
1378 u8 timeout_encode = 0;
1379 u32 min = 0;
1380 u32 max = 0;
1381
1382 /* Check if the input parameters fall in the range. */
1383 if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
1384 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
1385
1386 /*
1387 * Defined encoding for interrupt coalescing timeout:
1388 * Value Min Max Units
1389 * ----- --- --- -----
1390 * 0 - - Disabled
1391 * 1 13.3 20.0 ns
1392 * 2 26.7 40.0
1393 * 3 53.3 80.0
1394 * 4 106.7 160.0
1395 * 5 213.3 320.0
1396 * 6 426.7 640.0
1397 * 7 853.3 1280.0
1398 * 8 1.7 2.6 us
1399 * 9 3.4 5.1
1400 * 10 6.8 10.2
1401 * 11 13.7 20.5
1402 * 12 27.3 41.0
1403 * 13 54.6 81.9
1404 * 14 109.2 163.8
1405 * 15 218.5 327.7
1406 * 16 436.9 655.4
1407 * 17 873.8 1310.7
1408 * 18 1.7 2.6 ms
1409 * 19 3.5 5.2
1410 * 20 7.0 10.5
1411 * 21 14.0 21.0
1412 * 22 28.0 41.9
1413 * 23 55.9 83.9
1414 * 24 111.8 167.8
1415 * 25 223.7 335.5
1416 * 26 447.4 671.1
1417 * 27 894.8 1342.2
1418 * 28 1.8 2.7 s
1419 * Others Undefined */
1420
1421 /*
1422 * Use the table above to decide the encode of interrupt coalescing timeout
1423 * value for register writing. */
1424 if (coalesce_timeout == 0)
1425 timeout_encode = 0;
1426 else{
1427 /* make the timeout value in unit of (10 ns). */
1428 coalesce_timeout = coalesce_timeout * 100;
1429 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
1430 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
1431
1432 /* get the encode of timeout for register writing. */
1433 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
1434 timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
1435 timeout_encode++) {
1436 if (min <= coalesce_timeout && max > coalesce_timeout)
1437 break;
1438 else if (coalesce_timeout >= max && coalesce_timeout < min * 2
1439 && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
1440 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
1441 break;
1442 else{
1443 timeout_encode++;
1444 break;
1445 }
1446 } else {
1447 max = max * 2;
1448 min = min * 2;
1449 }
1450 }
1451
1452 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
1453 /* the value is out of range. */
1454 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
1455 }
1456
1457 writel(SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
1458 SMU_ICC_GEN_VAL(TIMER, timeout_encode),
1459 &ihost->smu_registers->interrupt_coalesce_control);
1460
1461
1462 ihost->interrupt_coalesce_number = (u16)coalesce_number;
1463 ihost->interrupt_coalesce_timeout = coalesce_timeout / 100;
1464
1465 return SCI_SUCCESS;
1466}
1467
1468
1469static void sci_controller_ready_state_enter(struct sci_base_state_machine *sm)
1470{
1471 struct isci_host *ihost = container_of(sm, typeof(*ihost), sm);
1472
1473 /* set the default interrupt coalescence number and timeout value. */
1474 sci_controller_set_interrupt_coalescence(ihost, 0x10, 250);
1475}
1476
1477static void sci_controller_ready_state_exit(struct sci_base_state_machine *sm)
1478{
1479 struct isci_host *ihost = container_of(sm, typeof(*ihost), sm);
1480
1481 /* disable interrupt coalescence. */
1482 sci_controller_set_interrupt_coalescence(ihost, 0, 0);
1483}
1484
1485static enum sci_status sci_controller_stop_phys(struct isci_host *ihost)
1486{
1487 u32 index;
1488 enum sci_status status;
1489 enum sci_status phy_status;
1490
1491 status = SCI_SUCCESS;
1492
1493 for (index = 0; index < SCI_MAX_PHYS; index++) {
1494 phy_status = sci_phy_stop(&ihost->phys[index]);
1495
1496 if (phy_status != SCI_SUCCESS &&
1497 phy_status != SCI_FAILURE_INVALID_STATE) {
1498 status = SCI_FAILURE;
1499
1500 dev_warn(&ihost->pdev->dev,
1501 "%s: Controller stop operation failed to stop "
1502 "phy %d because of status %d.\n",
1503 __func__,
1504 ihost->phys[index].phy_index, phy_status);
1505 }
1506 }
1507
1508 return status;
1509}
1510
1511static enum sci_status sci_controller_stop_ports(struct isci_host *ihost)
1512{
1513 u32 index;
1514 enum sci_status port_status;
1515 enum sci_status status = SCI_SUCCESS;
1516
1517 for (index = 0; index < ihost->logical_port_entries; index++) {
1518 struct isci_port *iport = &ihost->ports[index];
1519
1520 port_status = sci_port_stop(iport);
1521
1522 if ((port_status != SCI_SUCCESS) &&
1523 (port_status != SCI_FAILURE_INVALID_STATE)) {
1524 status = SCI_FAILURE;
1525
1526 dev_warn(&ihost->pdev->dev,
1527 "%s: Controller stop operation failed to "
1528 "stop port %d because of status %d.\n",
1529 __func__,
1530 iport->logical_port_index,
1531 port_status);
1532 }
1533 }
1534
1535 return status;
1536}
1537
1538static enum sci_status sci_controller_stop_devices(struct isci_host *ihost)
1539{
1540 u32 index;
1541 enum sci_status status;
1542 enum sci_status device_status;
1543
1544 status = SCI_SUCCESS;
1545
1546 for (index = 0; index < ihost->remote_node_entries; index++) {
1547 if (ihost->device_table[index] != NULL) {
1548 /* / @todo What timeout value do we want to provide to this request? */
1549 device_status = sci_remote_device_stop(ihost->device_table[index], 0);
1550
1551 if ((device_status != SCI_SUCCESS) &&
1552 (device_status != SCI_FAILURE_INVALID_STATE)) {
1553 dev_warn(&ihost->pdev->dev,
1554 "%s: Controller stop operation failed "
1555 "to stop device 0x%p because of "
1556 "status %d.\n",
1557 __func__,
1558 ihost->device_table[index], device_status);
1559 }
1560 }
1561 }
1562
1563 return status;
1564}
1565
1566static void sci_controller_stopping_state_enter(struct sci_base_state_machine *sm)
1567{
1568 struct isci_host *ihost = container_of(sm, typeof(*ihost), sm);
1569
1570 /* Stop all of the components for this controller */
1571 sci_controller_stop_phys(ihost);
1572 sci_controller_stop_ports(ihost);
1573 sci_controller_stop_devices(ihost);
1574}
1575
1576static void sci_controller_stopping_state_exit(struct sci_base_state_machine *sm)
1577{
1578 struct isci_host *ihost = container_of(sm, typeof(*ihost), sm);
1579
1580 sci_del_timer(&ihost->timer);
1581}
1582
1583static void sci_controller_reset_hardware(struct isci_host *ihost)
1584{
1585 /* Disable interrupts so we dont take any spurious interrupts */
1586 sci_controller_disable_interrupts(ihost);
1587
1588 /* Reset the SCU */
1589 writel(0xFFFFFFFF, &ihost->smu_registers->soft_reset_control);
1590
1591 /* Delay for 1ms to before clearing the CQP and UFQPR. */
1592 udelay(1000);
1593
1594 /* The write to the CQGR clears the CQP */
1595 writel(0x00000000, &ihost->smu_registers->completion_queue_get);
1596
1597 /* The write to the UFQGP clears the UFQPR */
1598 writel(0, &ihost->scu_registers->sdma.unsolicited_frame_get_pointer);
1599}
1600
1601static void sci_controller_resetting_state_enter(struct sci_base_state_machine *sm)
1602{
1603 struct isci_host *ihost = container_of(sm, typeof(*ihost), sm);
1604
1605 sci_controller_reset_hardware(ihost);
1606 sci_change_state(&ihost->sm, SCIC_RESET);
1607}
1608
1609static const struct sci_base_state sci_controller_state_table[] = {
1610 [SCIC_INITIAL] = {
1611 .enter_state = sci_controller_initial_state_enter,
1612 },
1613 [SCIC_RESET] = {},
1614 [SCIC_INITIALIZING] = {},
1615 [SCIC_INITIALIZED] = {},
1616 [SCIC_STARTING] = {
1617 .exit_state = sci_controller_starting_state_exit,
1618 },
1619 [SCIC_READY] = {
1620 .enter_state = sci_controller_ready_state_enter,
1621 .exit_state = sci_controller_ready_state_exit,
1622 },
1623 [SCIC_RESETTING] = {
1624 .enter_state = sci_controller_resetting_state_enter,
1625 },
1626 [SCIC_STOPPING] = {
1627 .enter_state = sci_controller_stopping_state_enter,
1628 .exit_state = sci_controller_stopping_state_exit,
1629 },
1630 [SCIC_STOPPED] = {},
1631 [SCIC_FAILED] = {}
1632};
1633
1634static void sci_controller_set_default_config_parameters(struct isci_host *ihost)
1635{
1636 /* these defaults are overridden by the platform / firmware */
1637 u16 index;
1638
1639 /* Default to APC mode. */
1640 ihost->oem_parameters.controller.mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
1641
1642 /* Default to APC mode. */
1643 ihost->oem_parameters.controller.max_concurrent_dev_spin_up = 1;
1644
1645 /* Default to no SSC operation. */
1646 ihost->oem_parameters.controller.do_enable_ssc = false;
1647
1648 /* Initialize all of the port parameter information to narrow ports. */
1649 for (index = 0; index < SCI_MAX_PORTS; index++) {
1650 ihost->oem_parameters.ports[index].phy_mask = 0;
1651 }
1652
1653 /* Initialize all of the phy parameter information. */
1654 for (index = 0; index < SCI_MAX_PHYS; index++) {
1655 /* Default to 6G (i.e. Gen 3) for now. */
1656 ihost->user_parameters.phys[index].max_speed_generation = 3;
1657
1658 /* the frequencies cannot be 0 */
1659 ihost->user_parameters.phys[index].align_insertion_frequency = 0x7f;
1660 ihost->user_parameters.phys[index].in_connection_align_insertion_frequency = 0xff;
1661 ihost->user_parameters.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;
1662
1663 /*
1664 * Previous Vitesse based expanders had a arbitration issue that
1665 * is worked around by having the upper 32-bits of SAS address
1666 * with a value greater then the Vitesse company identifier.
1667 * Hence, usage of 0x5FCFFFFF. */
1668 ihost->oem_parameters.phys[index].sas_address.low = 0x1 + ihost->id;
1669 ihost->oem_parameters.phys[index].sas_address.high = 0x5FCFFFFF;
1670 }
1671
1672 ihost->user_parameters.stp_inactivity_timeout = 5;
1673 ihost->user_parameters.ssp_inactivity_timeout = 5;
1674 ihost->user_parameters.stp_max_occupancy_timeout = 5;
1675 ihost->user_parameters.ssp_max_occupancy_timeout = 20;
1676 ihost->user_parameters.no_outbound_task_timeout = 20;
1677}
1678
1679static void controller_timeout(unsigned long data)
1680{
1681 struct sci_timer *tmr = (struct sci_timer *)data;
1682 struct isci_host *ihost = container_of(tmr, typeof(*ihost), timer);
1683 struct sci_base_state_machine *sm = &ihost->sm;
1684 unsigned long flags;
1685
1686 spin_lock_irqsave(&ihost->scic_lock, flags);
1687
1688 if (tmr->cancel)
1689 goto done;
1690
1691 if (sm->current_state_id == SCIC_STARTING)
1692 sci_controller_transition_to_ready(ihost, SCI_FAILURE_TIMEOUT);
1693 else if (sm->current_state_id == SCIC_STOPPING) {
1694 sci_change_state(sm, SCIC_FAILED);
1695 isci_host_stop_complete(ihost, SCI_FAILURE_TIMEOUT);
1696 } else /* / @todo Now what do we want to do in this case? */
1697 dev_err(&ihost->pdev->dev,
1698 "%s: Controller timer fired when controller was not "
1699 "in a state being timed.\n",
1700 __func__);
1701
1702done:
1703 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1704}
1705
1706static enum sci_status sci_controller_construct(struct isci_host *ihost,
1707 void __iomem *scu_base,
1708 void __iomem *smu_base)
1709{
1710 u8 i;
1711
1712 sci_init_sm(&ihost->sm, sci_controller_state_table, SCIC_INITIAL);
1713
1714 ihost->scu_registers = scu_base;
1715 ihost->smu_registers = smu_base;
1716
1717 sci_port_configuration_agent_construct(&ihost->port_agent);
1718
1719 /* Construct the ports for this controller */
1720 for (i = 0; i < SCI_MAX_PORTS; i++)
1721 sci_port_construct(&ihost->ports[i], i, ihost);
1722 sci_port_construct(&ihost->ports[i], SCIC_SDS_DUMMY_PORT, ihost);
1723
1724 /* Construct the phys for this controller */
1725 for (i = 0; i < SCI_MAX_PHYS; i++) {
1726 /* Add all the PHYs to the dummy port */
1727 sci_phy_construct(&ihost->phys[i],
1728 &ihost->ports[SCI_MAX_PORTS], i);
1729 }
1730
1731 ihost->invalid_phy_mask = 0;
1732
1733 sci_init_timer(&ihost->timer, controller_timeout);
1734
1735 /* Initialize the User and OEM parameters to default values. */
1736 sci_controller_set_default_config_parameters(ihost);
1737
1738 return sci_controller_reset(ihost);
1739}
1740
1741int sci_oem_parameters_validate(struct sci_oem_params *oem)
1742{
1743 int i;
1744
1745 for (i = 0; i < SCI_MAX_PORTS; i++)
1746 if (oem->ports[i].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX)
1747 return -EINVAL;
1748
1749 for (i = 0; i < SCI_MAX_PHYS; i++)
1750 if (oem->phys[i].sas_address.high == 0 &&
1751 oem->phys[i].sas_address.low == 0)
1752 return -EINVAL;
1753
1754 if (oem->controller.mode_type == SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE) {
1755 for (i = 0; i < SCI_MAX_PHYS; i++)
1756 if (oem->ports[i].phy_mask != 0)
1757 return -EINVAL;
1758 } else if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
1759 u8 phy_mask = 0;
1760
1761 for (i = 0; i < SCI_MAX_PHYS; i++)
1762 phy_mask |= oem->ports[i].phy_mask;
1763
1764 if (phy_mask == 0)
1765 return -EINVAL;
1766 } else
1767 return -EINVAL;
1768
1769 if (oem->controller.max_concurrent_dev_spin_up > MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT)
1770 return -EINVAL;
1771
1772 return 0;
1773}
1774
1775static enum sci_status sci_oem_parameters_set(struct isci_host *ihost)
1776{
1777 u32 state = ihost->sm.current_state_id;
1778
1779 if (state == SCIC_RESET ||
1780 state == SCIC_INITIALIZING ||
1781 state == SCIC_INITIALIZED) {
1782
1783 if (sci_oem_parameters_validate(&ihost->oem_parameters))
1784 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
1785
1786 return SCI_SUCCESS;
1787 }
1788
1789 return SCI_FAILURE_INVALID_STATE;
1790}
1791
1792static void power_control_timeout(unsigned long data)
1793{
1794 struct sci_timer *tmr = (struct sci_timer *)data;
1795 struct isci_host *ihost = container_of(tmr, typeof(*ihost), power_control.timer);
1796 struct isci_phy *iphy;
1797 unsigned long flags;
1798 u8 i;
1799
1800 spin_lock_irqsave(&ihost->scic_lock, flags);
1801
1802 if (tmr->cancel)
1803 goto done;
1804
1805 ihost->power_control.phys_granted_power = 0;
1806
1807 if (ihost->power_control.phys_waiting == 0) {
1808 ihost->power_control.timer_started = false;
1809 goto done;
1810 }
1811
1812 for (i = 0; i < SCI_MAX_PHYS; i++) {
1813
1814 if (ihost->power_control.phys_waiting == 0)
1815 break;
1816
1817 iphy = ihost->power_control.requesters[i];
1818 if (iphy == NULL)
1819 continue;
1820
1821 if (ihost->power_control.phys_granted_power >=
1822 ihost->oem_parameters.controller.max_concurrent_dev_spin_up)
1823 break;
1824
1825 ihost->power_control.requesters[i] = NULL;
1826 ihost->power_control.phys_waiting--;
1827 ihost->power_control.phys_granted_power++;
1828 sci_phy_consume_power_handler(iphy);
1829 }
1830
1831 /*
1832 * It doesn't matter if the power list is empty, we need to start the
1833 * timer in case another phy becomes ready.
1834 */
1835 sci_mod_timer(tmr, SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
1836 ihost->power_control.timer_started = true;
1837
1838done:
1839 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1840}
1841
1842void sci_controller_power_control_queue_insert(struct isci_host *ihost,
1843 struct isci_phy *iphy)
1844{
1845 BUG_ON(iphy == NULL);
1846
1847 if (ihost->power_control.phys_granted_power <
1848 ihost->oem_parameters.controller.max_concurrent_dev_spin_up) {
1849 ihost->power_control.phys_granted_power++;
1850 sci_phy_consume_power_handler(iphy);
1851
1852 /*
1853 * stop and start the power_control timer. When the timer fires, the
1854 * no_of_phys_granted_power will be set to 0
1855 */
1856 if (ihost->power_control.timer_started)
1857 sci_del_timer(&ihost->power_control.timer);
1858
1859 sci_mod_timer(&ihost->power_control.timer,
1860 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
1861 ihost->power_control.timer_started = true;
1862
1863 } else {
1864 /* Add the phy in the waiting list */
1865 ihost->power_control.requesters[iphy->phy_index] = iphy;
1866 ihost->power_control.phys_waiting++;
1867 }
1868}
1869
1870void sci_controller_power_control_queue_remove(struct isci_host *ihost,
1871 struct isci_phy *iphy)
1872{
1873 BUG_ON(iphy == NULL);
1874
1875 if (ihost->power_control.requesters[iphy->phy_index])
1876 ihost->power_control.phys_waiting--;
1877
1878 ihost->power_control.requesters[iphy->phy_index] = NULL;
1879}
1880
1881#define AFE_REGISTER_WRITE_DELAY 10
1882
1883/* Initialize the AFE for this phy index. We need to read the AFE setup from
1884 * the OEM parameters
1885 */
1886static void sci_controller_afe_initialization(struct isci_host *ihost)
1887{
1888 const struct sci_oem_params *oem = &ihost->oem_parameters;
1889 struct pci_dev *pdev = ihost->pdev;
1890 u32 afe_status;
1891 u32 phy_id;
1892
1893 /* Clear DFX Status registers */
1894 writel(0x0081000f, &ihost->scu_registers->afe.afe_dfx_master_control0);
1895 udelay(AFE_REGISTER_WRITE_DELAY);
1896
1897 if (is_b0(pdev)) {
1898 /* PM Rx Equalization Save, PM SPhy Rx Acknowledgement
1899 * Timer, PM Stagger Timer */
1900 writel(0x0007BFFF, &ihost->scu_registers->afe.afe_pmsn_master_control2);
1901 udelay(AFE_REGISTER_WRITE_DELAY);
1902 }
1903
1904 /* Configure bias currents to normal */
1905 if (is_a2(pdev))
1906 writel(0x00005A00, &ihost->scu_registers->afe.afe_bias_control);
1907 else if (is_b0(pdev) || is_c0(pdev))
1908 writel(0x00005F00, &ihost->scu_registers->afe.afe_bias_control);
1909
1910 udelay(AFE_REGISTER_WRITE_DELAY);
1911
1912 /* Enable PLL */
1913 if (is_b0(pdev) || is_c0(pdev))
1914 writel(0x80040A08, &ihost->scu_registers->afe.afe_pll_control0);
1915 else
1916 writel(0x80040908, &ihost->scu_registers->afe.afe_pll_control0);
1917
1918 udelay(AFE_REGISTER_WRITE_DELAY);
1919
1920 /* Wait for the PLL to lock */
1921 do {
1922 afe_status = readl(&ihost->scu_registers->afe.afe_common_block_status);
1923 udelay(AFE_REGISTER_WRITE_DELAY);
1924 } while ((afe_status & 0x00001000) == 0);
1925
1926 if (is_a2(pdev)) {
1927 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
1928 writel(0x7bcc96ad, &ihost->scu_registers->afe.afe_pmsn_master_control0);
1929 udelay(AFE_REGISTER_WRITE_DELAY);
1930 }
1931
1932 for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
1933 const struct sci_phy_oem_params *oem_phy = &oem->phys[phy_id];
1934
1935 if (is_b0(pdev)) {
1936 /* Configure transmitter SSC parameters */
1937 writel(0x00030000, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_ssc_control);
1938 udelay(AFE_REGISTER_WRITE_DELAY);
1939 } else if (is_c0(pdev)) {
1940 /* Configure transmitter SSC parameters */
1941 writel(0x0003000, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_ssc_control);
1942 udelay(AFE_REGISTER_WRITE_DELAY);
1943
1944 /*
1945 * All defaults, except the Receive Word Alignament/Comma Detect
1946 * Enable....(0xe800) */
1947 writel(0x00004500, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
1948 udelay(AFE_REGISTER_WRITE_DELAY);
1949 } else {
1950 /*
1951 * All defaults, except the Receive Word Alignament/Comma Detect
1952 * Enable....(0xe800) */
1953 writel(0x00004512, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
1954 udelay(AFE_REGISTER_WRITE_DELAY);
1955
1956 writel(0x0050100F, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control1);
1957 udelay(AFE_REGISTER_WRITE_DELAY);
1958 }
1959
1960 /*
1961 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
1962 * & increase TX int & ext bias 20%....(0xe85c) */
1963 if (is_a2(pdev))
1964 writel(0x000003F0, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
1965 else if (is_b0(pdev)) {
1966 /* Power down TX and RX (PWRDNTX and PWRDNRX) */
1967 writel(0x000003D7, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
1968 udelay(AFE_REGISTER_WRITE_DELAY);
1969
1970 /*
1971 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
1972 * & increase TX int & ext bias 20%....(0xe85c) */
1973 writel(0x000003D4, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
1974 } else {
1975 writel(0x000001E7, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
1976 udelay(AFE_REGISTER_WRITE_DELAY);
1977
1978 /*
1979 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
1980 * & increase TX int & ext bias 20%....(0xe85c) */
1981 writel(0x000001E4, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
1982 }
1983 udelay(AFE_REGISTER_WRITE_DELAY);
1984
1985 if (is_a2(pdev)) {
1986 /* Enable TX equalization (0xe824) */
1987 writel(0x00040000, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
1988 udelay(AFE_REGISTER_WRITE_DELAY);
1989 }
1990
1991 /*
1992 * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
1993 * RDD=0x0(RX Detect Enabled) ....(0xe800) */
1994 writel(0x00004100, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
1995 udelay(AFE_REGISTER_WRITE_DELAY);
1996
1997 /* Leave DFE/FFE on */
1998 if (is_a2(pdev))
1999 writel(0x3F11103F, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
2000 else if (is_b0(pdev)) {
2001 writel(0x3F11103F, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
2002 udelay(AFE_REGISTER_WRITE_DELAY);
2003 /* Enable TX equalization (0xe824) */
2004 writel(0x00040000, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
2005 } else {
2006 writel(0x0140DF0F, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control1);
2007 udelay(AFE_REGISTER_WRITE_DELAY);
2008
2009 writel(0x3F6F103F, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
2010 udelay(AFE_REGISTER_WRITE_DELAY);
2011
2012 /* Enable TX equalization (0xe824) */
2013 writel(0x00040000, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
2014 }
2015
2016 udelay(AFE_REGISTER_WRITE_DELAY);
2017
2018 writel(oem_phy->afe_tx_amp_control0,
2019 &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control0);
2020 udelay(AFE_REGISTER_WRITE_DELAY);
2021
2022 writel(oem_phy->afe_tx_amp_control1,
2023 &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control1);
2024 udelay(AFE_REGISTER_WRITE_DELAY);
2025
2026 writel(oem_phy->afe_tx_amp_control2,
2027 &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control2);
2028 udelay(AFE_REGISTER_WRITE_DELAY);
2029
2030 writel(oem_phy->afe_tx_amp_control3,
2031 &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control3);
2032 udelay(AFE_REGISTER_WRITE_DELAY);
2033 }
2034
2035 /* Transfer control to the PEs */
2036 writel(0x00010f00, &ihost->scu_registers->afe.afe_dfx_master_control0);
2037 udelay(AFE_REGISTER_WRITE_DELAY);
2038}
2039
2040static void sci_controller_initialize_power_control(struct isci_host *ihost)
2041{
2042 sci_init_timer(&ihost->power_control.timer, power_control_timeout);
2043
2044 memset(ihost->power_control.requesters, 0,
2045 sizeof(ihost->power_control.requesters));
2046
2047 ihost->power_control.phys_waiting = 0;
2048 ihost->power_control.phys_granted_power = 0;
2049}
2050
2051static enum sci_status sci_controller_initialize(struct isci_host *ihost)
2052{
2053 struct sci_base_state_machine *sm = &ihost->sm;
2054 enum sci_status result = SCI_FAILURE;
2055 unsigned long i, state, val;
2056
2057 if (ihost->sm.current_state_id != SCIC_RESET) {
2058 dev_warn(&ihost->pdev->dev,
2059 "SCIC Controller initialize operation requested "
2060 "in invalid state\n");
2061 return SCI_FAILURE_INVALID_STATE;
2062 }
2063
2064 sci_change_state(sm, SCIC_INITIALIZING);
2065
2066 sci_init_timer(&ihost->phy_timer, phy_startup_timeout);
2067
2068 ihost->next_phy_to_start = 0;
2069 ihost->phy_startup_timer_pending = false;
2070
2071 sci_controller_initialize_power_control(ihost);
2072
2073 /*
2074 * There is nothing to do here for B0 since we do not have to
2075 * program the AFE registers.
2076 * / @todo The AFE settings are supposed to be correct for the B0 but
2077 * / presently they seem to be wrong. */
2078 sci_controller_afe_initialization(ihost);
2079
2080
2081 /* Take the hardware out of reset */
2082 writel(0, &ihost->smu_registers->soft_reset_control);
2083
2084 /*
2085 * / @todo Provide meaningfull error code for hardware failure
2086 * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2087 for (i = 100; i >= 1; i--) {
2088 u32 status;
2089
2090 /* Loop until the hardware reports success */
2091 udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
2092 status = readl(&ihost->smu_registers->control_status);
2093
2094 if ((status & SCU_RAM_INIT_COMPLETED) == SCU_RAM_INIT_COMPLETED)
2095 break;
2096 }
2097 if (i == 0)
2098 goto out;
2099
2100 /*
2101 * Determine what are the actaul device capacities that the
2102 * hardware will support */
2103 val = readl(&ihost->smu_registers->device_context_capacity);
2104
2105 /* Record the smaller of the two capacity values */
2106 ihost->logical_port_entries = min(smu_max_ports(val), SCI_MAX_PORTS);
2107 ihost->task_context_entries = min(smu_max_task_contexts(val), SCI_MAX_IO_REQUESTS);
2108 ihost->remote_node_entries = min(smu_max_rncs(val), SCI_MAX_REMOTE_DEVICES);
2109
2110 /*
2111 * Make all PEs that are unassigned match up with the
2112 * logical ports
2113 */
2114 for (i = 0; i < ihost->logical_port_entries; i++) {
2115 struct scu_port_task_scheduler_group_registers __iomem
2116 *ptsg = &ihost->scu_registers->peg0.ptsg;
2117
2118 writel(i, &ptsg->protocol_engine[i]);
2119 }
2120
2121 /* Initialize hardware PCI Relaxed ordering in DMA engines */
2122 val = readl(&ihost->scu_registers->sdma.pdma_configuration);
2123 val |= SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2124 writel(val, &ihost->scu_registers->sdma.pdma_configuration);
2125
2126 val = readl(&ihost->scu_registers->sdma.cdma_configuration);
2127 val |= SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2128 writel(val, &ihost->scu_registers->sdma.cdma_configuration);
2129
2130 /*
2131 * Initialize the PHYs before the PORTs because the PHY registers
2132 * are accessed during the port initialization.
2133 */
2134 for (i = 0; i < SCI_MAX_PHYS; i++) {
2135 result = sci_phy_initialize(&ihost->phys[i],
2136 &ihost->scu_registers->peg0.pe[i].tl,
2137 &ihost->scu_registers->peg0.pe[i].ll);
2138 if (result != SCI_SUCCESS)
2139 goto out;
2140 }
2141
2142 for (i = 0; i < ihost->logical_port_entries; i++) {
2143 struct isci_port *iport = &ihost->ports[i];
2144
2145 iport->port_task_scheduler_registers = &ihost->scu_registers->peg0.ptsg.port[i];
2146 iport->port_pe_configuration_register = &ihost->scu_registers->peg0.ptsg.protocol_engine[0];
2147 iport->viit_registers = &ihost->scu_registers->peg0.viit[i];
2148 }
2149
2150 result = sci_port_configuration_agent_initialize(ihost, &ihost->port_agent);
2151
2152 out:
2153 /* Advance the controller state machine */
2154 if (result == SCI_SUCCESS)
2155 state = SCIC_INITIALIZED;
2156 else
2157 state = SCIC_FAILED;
2158 sci_change_state(sm, state);
2159
2160 return result;
2161}
2162
2163static enum sci_status sci_user_parameters_set(struct isci_host *ihost,
2164 struct sci_user_parameters *sci_parms)
2165{
2166 u32 state = ihost->sm.current_state_id;
2167
2168 if (state == SCIC_RESET ||
2169 state == SCIC_INITIALIZING ||
2170 state == SCIC_INITIALIZED) {
2171 u16 index;
2172
2173 /*
2174 * Validate the user parameters. If they are not legal, then
2175 * return a failure.
2176 */
2177 for (index = 0; index < SCI_MAX_PHYS; index++) {
2178 struct sci_phy_user_params *user_phy;
2179
2180 user_phy = &sci_parms->phys[index];
2181
2182 if (!((user_phy->max_speed_generation <=
2183 SCIC_SDS_PARM_MAX_SPEED) &&
2184 (user_phy->max_speed_generation >
2185 SCIC_SDS_PARM_NO_SPEED)))
2186 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2187
2188 if (user_phy->in_connection_align_insertion_frequency <
2189 3)
2190 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2191
2192 if ((user_phy->in_connection_align_insertion_frequency <
2193 3) ||
2194 (user_phy->align_insertion_frequency == 0) ||
2195 (user_phy->
2196 notify_enable_spin_up_insertion_frequency ==
2197 0))
2198 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2199 }
2200
2201 if ((sci_parms->stp_inactivity_timeout == 0) ||
2202 (sci_parms->ssp_inactivity_timeout == 0) ||
2203 (sci_parms->stp_max_occupancy_timeout == 0) ||
2204 (sci_parms->ssp_max_occupancy_timeout == 0) ||
2205 (sci_parms->no_outbound_task_timeout == 0))
2206 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2207
2208 memcpy(&ihost->user_parameters, sci_parms, sizeof(*sci_parms));
2209
2210 return SCI_SUCCESS;
2211 }
2212
2213 return SCI_FAILURE_INVALID_STATE;
2214}
2215
2216static int sci_controller_mem_init(struct isci_host *ihost)
2217{
2218 struct device *dev = &ihost->pdev->dev;
2219 dma_addr_t dma;
2220 size_t size;
2221 int err;
2222
2223 size = SCU_MAX_COMPLETION_QUEUE_ENTRIES * sizeof(u32);
2224 ihost->completion_queue = dmam_alloc_coherent(dev, size, &dma, GFP_KERNEL);
2225 if (!ihost->completion_queue)
2226 return -ENOMEM;
2227
2228 writel(lower_32_bits(dma), &ihost->smu_registers->completion_queue_lower);
2229 writel(upper_32_bits(dma), &ihost->smu_registers->completion_queue_upper);
2230
2231 size = ihost->remote_node_entries * sizeof(union scu_remote_node_context);
2232 ihost->remote_node_context_table = dmam_alloc_coherent(dev, size, &dma,
2233 GFP_KERNEL);
2234 if (!ihost->remote_node_context_table)
2235 return -ENOMEM;
2236
2237 writel(lower_32_bits(dma), &ihost->smu_registers->remote_node_context_lower);
2238 writel(upper_32_bits(dma), &ihost->smu_registers->remote_node_context_upper);
2239
2240 size = ihost->task_context_entries * sizeof(struct scu_task_context),
2241 ihost->task_context_table = dmam_alloc_coherent(dev, size, &dma, GFP_KERNEL);
2242 if (!ihost->task_context_table)
2243 return -ENOMEM;
2244
2245 ihost->task_context_dma = dma;
2246 writel(lower_32_bits(dma), &ihost->smu_registers->host_task_table_lower);
2247 writel(upper_32_bits(dma), &ihost->smu_registers->host_task_table_upper);
2248
2249 err = sci_unsolicited_frame_control_construct(ihost);
2250 if (err)
2251 return err;
2252
2253 /*
2254 * Inform the silicon as to the location of the UF headers and
2255 * address table.
2256 */
2257 writel(lower_32_bits(ihost->uf_control.headers.physical_address),
2258 &ihost->scu_registers->sdma.uf_header_base_address_lower);
2259 writel(upper_32_bits(ihost->uf_control.headers.physical_address),
2260 &ihost->scu_registers->sdma.uf_header_base_address_upper);
2261
2262 writel(lower_32_bits(ihost->uf_control.address_table.physical_address),
2263 &ihost->scu_registers->sdma.uf_address_table_lower);
2264 writel(upper_32_bits(ihost->uf_control.address_table.physical_address),
2265 &ihost->scu_registers->sdma.uf_address_table_upper);
2266
2267 return 0;
2268}
2269
2270int isci_host_init(struct isci_host *ihost)
2271{
2272 int err = 0, i;
2273 enum sci_status status;
2274 struct sci_user_parameters sci_user_params;
2275 struct isci_pci_info *pci_info = to_pci_info(ihost->pdev);
2276
2277 spin_lock_init(&ihost->state_lock);
2278 spin_lock_init(&ihost->scic_lock);
2279 init_waitqueue_head(&ihost->eventq);
2280
2281 isci_host_change_state(ihost, isci_starting);
2282
2283 status = sci_controller_construct(ihost, scu_base(ihost),
2284 smu_base(ihost));
2285
2286 if (status != SCI_SUCCESS) {
2287 dev_err(&ihost->pdev->dev,
2288 "%s: sci_controller_construct failed - status = %x\n",
2289 __func__,
2290 status);
2291 return -ENODEV;
2292 }
2293
2294 ihost->sas_ha.dev = &ihost->pdev->dev;
2295 ihost->sas_ha.lldd_ha = ihost;
2296
2297 /*
2298 * grab initial values stored in the controller object for OEM and USER
2299 * parameters
2300 */
2301 isci_user_parameters_get(&sci_user_params);
2302 status = sci_user_parameters_set(ihost, &sci_user_params);
2303 if (status != SCI_SUCCESS) {
2304 dev_warn(&ihost->pdev->dev,
2305 "%s: sci_user_parameters_set failed\n",
2306 __func__);
2307 return -ENODEV;
2308 }
2309
2310 /* grab any OEM parameters specified in orom */
2311 if (pci_info->orom) {
2312 status = isci_parse_oem_parameters(&ihost->oem_parameters,
2313 pci_info->orom,
2314 ihost->id);
2315 if (status != SCI_SUCCESS) {
2316 dev_warn(&ihost->pdev->dev,
2317 "parsing firmware oem parameters failed\n");
2318 return -EINVAL;
2319 }
2320 }
2321
2322 status = sci_oem_parameters_set(ihost);
2323 if (status != SCI_SUCCESS) {
2324 dev_warn(&ihost->pdev->dev,
2325 "%s: sci_oem_parameters_set failed\n",
2326 __func__);
2327 return -ENODEV;
2328 }
2329
2330 tasklet_init(&ihost->completion_tasklet,
2331 isci_host_completion_routine, (unsigned long)ihost);
2332
2333 INIT_LIST_HEAD(&ihost->requests_to_complete);
2334 INIT_LIST_HEAD(&ihost->requests_to_errorback);
2335
2336 spin_lock_irq(&ihost->scic_lock);
2337 status = sci_controller_initialize(ihost);
2338 spin_unlock_irq(&ihost->scic_lock);
2339 if (status != SCI_SUCCESS) {
2340 dev_warn(&ihost->pdev->dev,
2341 "%s: sci_controller_initialize failed -"
2342 " status = 0x%x\n",
2343 __func__, status);
2344 return -ENODEV;
2345 }
2346
2347 err = sci_controller_mem_init(ihost);
2348 if (err)
2349 return err;
2350
2351 for (i = 0; i < SCI_MAX_PORTS; i++)
2352 isci_port_init(&ihost->ports[i], ihost, i);
2353
2354 for (i = 0; i < SCI_MAX_PHYS; i++)
2355 isci_phy_init(&ihost->phys[i], ihost, i);
2356
2357 for (i = 0; i < SCI_MAX_REMOTE_DEVICES; i++) {
2358 struct isci_remote_device *idev = &ihost->devices[i];
2359
2360 INIT_LIST_HEAD(&idev->reqs_in_process);
2361 INIT_LIST_HEAD(&idev->node);
2362 }
2363
2364 for (i = 0; i < SCI_MAX_IO_REQUESTS; i++) {
2365 struct isci_request *ireq;
2366 dma_addr_t dma;
2367
2368 ireq = dmam_alloc_coherent(&ihost->pdev->dev,
2369 sizeof(struct isci_request), &dma,
2370 GFP_KERNEL);
2371 if (!ireq)
2372 return -ENOMEM;
2373
2374 ireq->tc = &ihost->task_context_table[i];
2375 ireq->owning_controller = ihost;
2376 spin_lock_init(&ireq->state_lock);
2377 ireq->request_daddr = dma;
2378 ireq->isci_host = ihost;
2379 ihost->reqs[i] = ireq;
2380 }
2381
2382 return 0;
2383}
2384
2385void sci_controller_link_up(struct isci_host *ihost, struct isci_port *iport,
2386 struct isci_phy *iphy)
2387{
2388 switch (ihost->sm.current_state_id) {
2389 case SCIC_STARTING:
2390 sci_del_timer(&ihost->phy_timer);
2391 ihost->phy_startup_timer_pending = false;
2392 ihost->port_agent.link_up_handler(ihost, &ihost->port_agent,
2393 iport, iphy);
2394 sci_controller_start_next_phy(ihost);
2395 break;
2396 case SCIC_READY:
2397 ihost->port_agent.link_up_handler(ihost, &ihost->port_agent,
2398 iport, iphy);
2399 break;
2400 default:
2401 dev_dbg(&ihost->pdev->dev,
2402 "%s: SCIC Controller linkup event from phy %d in "
2403 "unexpected state %d\n", __func__, iphy->phy_index,
2404 ihost->sm.current_state_id);
2405 }
2406}
2407
2408void sci_controller_link_down(struct isci_host *ihost, struct isci_port *iport,
2409 struct isci_phy *iphy)
2410{
2411 switch (ihost->sm.current_state_id) {
2412 case SCIC_STARTING:
2413 case SCIC_READY:
2414 ihost->port_agent.link_down_handler(ihost, &ihost->port_agent,
2415 iport, iphy);
2416 break;
2417 default:
2418 dev_dbg(&ihost->pdev->dev,
2419 "%s: SCIC Controller linkdown event from phy %d in "
2420 "unexpected state %d\n",
2421 __func__,
2422 iphy->phy_index,
2423 ihost->sm.current_state_id);
2424 }
2425}
2426
2427static bool sci_controller_has_remote_devices_stopping(struct isci_host *ihost)
2428{
2429 u32 index;
2430
2431 for (index = 0; index < ihost->remote_node_entries; index++) {
2432 if ((ihost->device_table[index] != NULL) &&
2433 (ihost->device_table[index]->sm.current_state_id == SCI_DEV_STOPPING))
2434 return true;
2435 }
2436
2437 return false;
2438}
2439
2440void sci_controller_remote_device_stopped(struct isci_host *ihost,
2441 struct isci_remote_device *idev)
2442{
2443 if (ihost->sm.current_state_id != SCIC_STOPPING) {
2444 dev_dbg(&ihost->pdev->dev,
2445 "SCIC Controller 0x%p remote device stopped event "
2446 "from device 0x%p in unexpected state %d\n",
2447 ihost, idev,
2448 ihost->sm.current_state_id);
2449 return;
2450 }
2451
2452 if (!sci_controller_has_remote_devices_stopping(ihost))
2453 sci_change_state(&ihost->sm, SCIC_STOPPED);
2454}
2455
2456void sci_controller_post_request(struct isci_host *ihost, u32 request)
2457{
2458 dev_dbg(&ihost->pdev->dev, "%s[%d]: %#x\n",
2459 __func__, ihost->id, request);
2460
2461 writel(request, &ihost->smu_registers->post_context_port);
2462}
2463
2464struct isci_request *sci_request_by_tag(struct isci_host *ihost, u16 io_tag)
2465{
2466 u16 task_index;
2467 u16 task_sequence;
2468
2469 task_index = ISCI_TAG_TCI(io_tag);
2470
2471 if (task_index < ihost->task_context_entries) {
2472 struct isci_request *ireq = ihost->reqs[task_index];
2473
2474 if (test_bit(IREQ_ACTIVE, &ireq->flags)) {
2475 task_sequence = ISCI_TAG_SEQ(io_tag);
2476
2477 if (task_sequence == ihost->io_request_sequence[task_index])
2478 return ireq;
2479 }
2480 }
2481
2482 return NULL;
2483}
2484
2485/**
2486 * This method allocates remote node index and the reserves the remote node
2487 * context space for use. This method can fail if there are no more remote
2488 * node index available.
2489 * @scic: This is the controller object which contains the set of
2490 * free remote node ids
2491 * @sci_dev: This is the device object which is requesting the a remote node
2492 * id
2493 * @node_id: This is the remote node id that is assinged to the device if one
2494 * is available
2495 *
2496 * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
2497 * node index available.
2498 */
2499enum sci_status sci_controller_allocate_remote_node_context(struct isci_host *ihost,
2500 struct isci_remote_device *idev,
2501 u16 *node_id)
2502{
2503 u16 node_index;
2504 u32 remote_node_count = sci_remote_device_node_count(idev);
2505
2506 node_index = sci_remote_node_table_allocate_remote_node(
2507 &ihost->available_remote_nodes, remote_node_count
2508 );
2509
2510 if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
2511 ihost->device_table[node_index] = idev;
2512
2513 *node_id = node_index;
2514
2515 return SCI_SUCCESS;
2516 }
2517
2518 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
2519}
2520
2521void sci_controller_free_remote_node_context(struct isci_host *ihost,
2522 struct isci_remote_device *idev,
2523 u16 node_id)
2524{
2525 u32 remote_node_count = sci_remote_device_node_count(idev);
2526
2527 if (ihost->device_table[node_id] == idev) {
2528 ihost->device_table[node_id] = NULL;
2529
2530 sci_remote_node_table_release_remote_node_index(
2531 &ihost->available_remote_nodes, remote_node_count, node_id
2532 );
2533 }
2534}
2535
2536void sci_controller_copy_sata_response(void *response_buffer,
2537 void *frame_header,
2538 void *frame_buffer)
2539{
2540 /* XXX type safety? */
2541 memcpy(response_buffer, frame_header, sizeof(u32));
2542
2543 memcpy(response_buffer + sizeof(u32),
2544 frame_buffer,
2545 sizeof(struct dev_to_host_fis) - sizeof(u32));
2546}
2547
2548void sci_controller_release_frame(struct isci_host *ihost, u32 frame_index)
2549{
2550 if (sci_unsolicited_frame_control_release_frame(&ihost->uf_control, frame_index))
2551 writel(ihost->uf_control.get,
2552 &ihost->scu_registers->sdma.unsolicited_frame_get_pointer);
2553}
2554
2555void isci_tci_free(struct isci_host *ihost, u16 tci)
2556{
2557 u16 tail = ihost->tci_tail & (SCI_MAX_IO_REQUESTS-1);
2558
2559 ihost->tci_pool[tail] = tci;
2560 ihost->tci_tail = tail + 1;
2561}
2562
2563static u16 isci_tci_alloc(struct isci_host *ihost)
2564{
2565 u16 head = ihost->tci_head & (SCI_MAX_IO_REQUESTS-1);
2566 u16 tci = ihost->tci_pool[head];
2567
2568 ihost->tci_head = head + 1;
2569 return tci;
2570}
2571
2572static u16 isci_tci_space(struct isci_host *ihost)
2573{
2574 return CIRC_SPACE(ihost->tci_head, ihost->tci_tail, SCI_MAX_IO_REQUESTS);
2575}
2576
2577u16 isci_alloc_tag(struct isci_host *ihost)
2578{
2579 if (isci_tci_space(ihost)) {
2580 u16 tci = isci_tci_alloc(ihost);
2581 u8 seq = ihost->io_request_sequence[tci];
2582
2583 return ISCI_TAG(seq, tci);
2584 }
2585
2586 return SCI_CONTROLLER_INVALID_IO_TAG;
2587}
2588
2589enum sci_status isci_free_tag(struct isci_host *ihost, u16 io_tag)
2590{
2591 u16 tci = ISCI_TAG_TCI(io_tag);
2592 u16 seq = ISCI_TAG_SEQ(io_tag);
2593
2594 /* prevent tail from passing head */
2595 if (isci_tci_active(ihost) == 0)
2596 return SCI_FAILURE_INVALID_IO_TAG;
2597
2598 if (seq == ihost->io_request_sequence[tci]) {
2599 ihost->io_request_sequence[tci] = (seq+1) & (SCI_MAX_SEQ-1);
2600
2601 isci_tci_free(ihost, tci);
2602
2603 return SCI_SUCCESS;
2604 }
2605 return SCI_FAILURE_INVALID_IO_TAG;
2606}
2607
2608enum sci_status sci_controller_start_io(struct isci_host *ihost,
2609 struct isci_remote_device *idev,
2610 struct isci_request *ireq)
2611{
2612 enum sci_status status;
2613
2614 if (ihost->sm.current_state_id != SCIC_READY) {
2615 dev_warn(&ihost->pdev->dev, "invalid state to start I/O");
2616 return SCI_FAILURE_INVALID_STATE;
2617 }
2618
2619 status = sci_remote_device_start_io(ihost, idev, ireq);
2620 if (status != SCI_SUCCESS)
2621 return status;
2622
2623 set_bit(IREQ_ACTIVE, &ireq->flags);
2624 sci_controller_post_request(ihost, ireq->post_context);
2625 return SCI_SUCCESS;
2626}
2627
2628enum sci_status sci_controller_terminate_request(struct isci_host *ihost,
2629 struct isci_remote_device *idev,
2630 struct isci_request *ireq)
2631{
2632 /* terminate an ongoing (i.e. started) core IO request. This does not
2633 * abort the IO request at the target, but rather removes the IO
2634 * request from the host controller.
2635 */
2636 enum sci_status status;
2637
2638 if (ihost->sm.current_state_id != SCIC_READY) {
2639 dev_warn(&ihost->pdev->dev,
2640 "invalid state to terminate request\n");
2641 return SCI_FAILURE_INVALID_STATE;
2642 }
2643
2644 status = sci_io_request_terminate(ireq);
2645 if (status != SCI_SUCCESS)
2646 return status;
2647
2648 /*
2649 * Utilize the original post context command and or in the POST_TC_ABORT
2650 * request sub-type.
2651 */
2652 sci_controller_post_request(ihost,
2653 ireq->post_context | SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT);
2654 return SCI_SUCCESS;
2655}
2656
2657/**
2658 * sci_controller_complete_io() - This method will perform core specific
2659 * completion operations for an IO request. After this method is invoked,
2660 * the user should consider the IO request as invalid until it is properly
2661 * reused (i.e. re-constructed).
2662 * @ihost: The handle to the controller object for which to complete the
2663 * IO request.
2664 * @idev: The handle to the remote device object for which to complete
2665 * the IO request.
2666 * @ireq: the handle to the io request object to complete.
2667 */
2668enum sci_status sci_controller_complete_io(struct isci_host *ihost,
2669 struct isci_remote_device *idev,
2670 struct isci_request *ireq)
2671{
2672 enum sci_status status;
2673 u16 index;
2674
2675 switch (ihost->sm.current_state_id) {
2676 case SCIC_STOPPING:
2677 /* XXX: Implement this function */
2678 return SCI_FAILURE;
2679 case SCIC_READY:
2680 status = sci_remote_device_complete_io(ihost, idev, ireq);
2681 if (status != SCI_SUCCESS)
2682 return status;
2683
2684 index = ISCI_TAG_TCI(ireq->io_tag);
2685 clear_bit(IREQ_ACTIVE, &ireq->flags);
2686 return SCI_SUCCESS;
2687 default:
2688 dev_warn(&ihost->pdev->dev, "invalid state to complete I/O");
2689 return SCI_FAILURE_INVALID_STATE;
2690 }
2691
2692}
2693
2694enum sci_status sci_controller_continue_io(struct isci_request *ireq)
2695{
2696 struct isci_host *ihost = ireq->owning_controller;
2697
2698 if (ihost->sm.current_state_id != SCIC_READY) {
2699 dev_warn(&ihost->pdev->dev, "invalid state to continue I/O");
2700 return SCI_FAILURE_INVALID_STATE;
2701 }
2702
2703 set_bit(IREQ_ACTIVE, &ireq->flags);
2704 sci_controller_post_request(ihost, ireq->post_context);
2705 return SCI_SUCCESS;
2706}
2707
2708/**
2709 * sci_controller_start_task() - This method is called by the SCIC user to
2710 * send/start a framework task management request.
2711 * @controller: the handle to the controller object for which to start the task
2712 * management request.
2713 * @remote_device: the handle to the remote device object for which to start
2714 * the task management request.
2715 * @task_request: the handle to the task request object to start.
2716 */
2717enum sci_task_status sci_controller_start_task(struct isci_host *ihost,
2718 struct isci_remote_device *idev,
2719 struct isci_request *ireq)
2720{
2721 enum sci_status status;
2722
2723 if (ihost->sm.current_state_id != SCIC_READY) {
2724 dev_warn(&ihost->pdev->dev,
2725 "%s: SCIC Controller starting task from invalid "
2726 "state\n",
2727 __func__);
2728 return SCI_TASK_FAILURE_INVALID_STATE;
2729 }
2730
2731 status = sci_remote_device_start_task(ihost, idev, ireq);
2732 switch (status) {
2733 case SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS:
2734 set_bit(IREQ_ACTIVE, &ireq->flags);
2735
2736 /*
2737 * We will let framework know this task request started successfully,
2738 * although core is still woring on starting the request (to post tc when
2739 * RNC is resumed.)
2740 */
2741 return SCI_SUCCESS;
2742 case SCI_SUCCESS:
2743 set_bit(IREQ_ACTIVE, &ireq->flags);
2744 sci_controller_post_request(ihost, ireq->post_context);
2745 break;
2746 default:
2747 break;
2748 }
2749
2750 return status;
2751}
diff --git a/drivers/scsi/isci/host.h b/drivers/scsi/isci/host.h
new file mode 100644
index 000000000000..062101a39f79
--- /dev/null
+++ b/drivers/scsi/isci/host.h
@@ -0,0 +1,542 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55#ifndef _SCI_HOST_H_
56#define _SCI_HOST_H_
57
58#include "remote_device.h"
59#include "phy.h"
60#include "isci.h"
61#include "remote_node_table.h"
62#include "registers.h"
63#include "unsolicited_frame_control.h"
64#include "probe_roms.h"
65
66struct isci_request;
67struct scu_task_context;
68
69
70/**
71 * struct sci_power_control -
72 *
73 * This structure defines the fields for managing power control for direct
74 * attached disk devices.
75 */
76struct sci_power_control {
77 /**
78 * This field is set when the power control timer is running and cleared when
79 * it is not.
80 */
81 bool timer_started;
82
83 /**
84 * Timer to control when the directed attached disks can consume power.
85 */
86 struct sci_timer timer;
87
88 /**
89 * This field is used to keep track of how many phys are put into the
90 * requesters field.
91 */
92 u8 phys_waiting;
93
94 /**
95 * This field is used to keep track of how many phys have been granted to consume power
96 */
97 u8 phys_granted_power;
98
99 /**
100 * This field is an array of phys that we are waiting on. The phys are direct
101 * mapped into requesters via struct sci_phy.phy_index
102 */
103 struct isci_phy *requesters[SCI_MAX_PHYS];
104
105};
106
107struct sci_port_configuration_agent;
108typedef void (*port_config_fn)(struct isci_host *,
109 struct sci_port_configuration_agent *,
110 struct isci_port *, struct isci_phy *);
111
112struct sci_port_configuration_agent {
113 u16 phy_configured_mask;
114 u16 phy_ready_mask;
115 struct {
116 u8 min_index;
117 u8 max_index;
118 } phy_valid_port_range[SCI_MAX_PHYS];
119 bool timer_pending;
120 port_config_fn link_up_handler;
121 port_config_fn link_down_handler;
122 struct sci_timer timer;
123};
124
125/**
126 * isci_host - primary host/controller object
127 * @timer: timeout start/stop operations
128 * @device_table: rni (hw remote node index) to remote device lookup table
129 * @available_remote_nodes: rni allocator
130 * @power_control: manage device spin up
131 * @io_request_sequence: generation number for tci's (task contexts)
132 * @task_context_table: hw task context table
133 * @remote_node_context_table: hw remote node context table
134 * @completion_queue: hw-producer driver-consumer communication ring
135 * @completion_queue_get: tracks the driver 'head' of the ring to notify hw
136 * @logical_port_entries: min({driver|silicon}-supported-port-count)
137 * @remote_node_entries: min({driver|silicon}-supported-node-count)
138 * @task_context_entries: min({driver|silicon}-supported-task-count)
139 * @phy_timer: phy startup timer
140 * @invalid_phy_mask: if an invalid_link_up notification is reported a bit for
141 * the phy index is set so further notifications are not
142 * made. Once the phy reports link up and is made part of a
143 * port then this bit is cleared.
144
145 */
146struct isci_host {
147 struct sci_base_state_machine sm;
148 /* XXX can we time this externally */
149 struct sci_timer timer;
150 /* XXX drop reference module params directly */
151 struct sci_user_parameters user_parameters;
152 /* XXX no need to be a union */
153 struct sci_oem_params oem_parameters;
154 struct sci_port_configuration_agent port_agent;
155 struct isci_remote_device *device_table[SCI_MAX_REMOTE_DEVICES];
156 struct sci_remote_node_table available_remote_nodes;
157 struct sci_power_control power_control;
158 u8 io_request_sequence[SCI_MAX_IO_REQUESTS];
159 struct scu_task_context *task_context_table;
160 dma_addr_t task_context_dma;
161 union scu_remote_node_context *remote_node_context_table;
162 u32 *completion_queue;
163 u32 completion_queue_get;
164 u32 logical_port_entries;
165 u32 remote_node_entries;
166 u32 task_context_entries;
167 struct sci_unsolicited_frame_control uf_control;
168
169 /* phy startup */
170 struct sci_timer phy_timer;
171 /* XXX kill */
172 bool phy_startup_timer_pending;
173 u32 next_phy_to_start;
174 /* XXX convert to unsigned long and use bitops */
175 u8 invalid_phy_mask;
176
177 /* TODO attempt dynamic interrupt coalescing scheme */
178 u16 interrupt_coalesce_number;
179 u32 interrupt_coalesce_timeout;
180 struct smu_registers __iomem *smu_registers;
181 struct scu_registers __iomem *scu_registers;
182
183 u16 tci_head;
184 u16 tci_tail;
185 u16 tci_pool[SCI_MAX_IO_REQUESTS];
186
187 int id; /* unique within a given pci device */
188 struct isci_phy phys[SCI_MAX_PHYS];
189 struct isci_port ports[SCI_MAX_PORTS + 1]; /* includes dummy port */
190 struct sas_ha_struct sas_ha;
191
192 spinlock_t state_lock;
193 struct pci_dev *pdev;
194 enum isci_status status;
195 #define IHOST_START_PENDING 0
196 #define IHOST_STOP_PENDING 1
197 unsigned long flags;
198 wait_queue_head_t eventq;
199 struct Scsi_Host *shost;
200 struct tasklet_struct completion_tasklet;
201 struct list_head requests_to_complete;
202 struct list_head requests_to_errorback;
203 spinlock_t scic_lock;
204 struct isci_request *reqs[SCI_MAX_IO_REQUESTS];
205 struct isci_remote_device devices[SCI_MAX_REMOTE_DEVICES];
206};
207
208/**
209 * enum sci_controller_states - This enumeration depicts all the states
210 * for the common controller state machine.
211 */
212enum sci_controller_states {
213 /**
214 * Simply the initial state for the base controller state machine.
215 */
216 SCIC_INITIAL = 0,
217
218 /**
219 * This state indicates that the controller is reset. The memory for
220 * the controller is in it's initial state, but the controller requires
221 * initialization.
222 * This state is entered from the INITIAL state.
223 * This state is entered from the RESETTING state.
224 */
225 SCIC_RESET,
226
227 /**
228 * This state is typically an action state that indicates the controller
229 * is in the process of initialization. In this state no new IO operations
230 * are permitted.
231 * This state is entered from the RESET state.
232 */
233 SCIC_INITIALIZING,
234
235 /**
236 * This state indicates that the controller has been successfully
237 * initialized. In this state no new IO operations are permitted.
238 * This state is entered from the INITIALIZING state.
239 */
240 SCIC_INITIALIZED,
241
242 /**
243 * This state indicates the the controller is in the process of becoming
244 * ready (i.e. starting). In this state no new IO operations are permitted.
245 * This state is entered from the INITIALIZED state.
246 */
247 SCIC_STARTING,
248
249 /**
250 * This state indicates the controller is now ready. Thus, the user
251 * is able to perform IO operations on the controller.
252 * This state is entered from the STARTING state.
253 */
254 SCIC_READY,
255
256 /**
257 * This state is typically an action state that indicates the controller
258 * is in the process of resetting. Thus, the user is unable to perform
259 * IO operations on the controller. A reset is considered destructive in
260 * most cases.
261 * This state is entered from the READY state.
262 * This state is entered from the FAILED state.
263 * This state is entered from the STOPPED state.
264 */
265 SCIC_RESETTING,
266
267 /**
268 * This state indicates that the controller is in the process of stopping.
269 * In this state no new IO operations are permitted, but existing IO
270 * operations are allowed to complete.
271 * This state is entered from the READY state.
272 */
273 SCIC_STOPPING,
274
275 /**
276 * This state indicates that the controller has successfully been stopped.
277 * In this state no new IO operations are permitted.
278 * This state is entered from the STOPPING state.
279 */
280 SCIC_STOPPED,
281
282 /**
283 * This state indicates that the controller could not successfully be
284 * initialized. In this state no new IO operations are permitted.
285 * This state is entered from the INITIALIZING state.
286 * This state is entered from the STARTING state.
287 * This state is entered from the STOPPING state.
288 * This state is entered from the RESETTING state.
289 */
290 SCIC_FAILED,
291};
292
293/**
294 * struct isci_pci_info - This class represents the pci function containing the
295 * controllers. Depending on PCI SKU, there could be up to 2 controllers in
296 * the PCI function.
297 */
298#define SCI_MAX_MSIX_INT (SCI_NUM_MSI_X_INT*SCI_MAX_CONTROLLERS)
299
300struct isci_pci_info {
301 struct msix_entry msix_entries[SCI_MAX_MSIX_INT];
302 struct isci_host *hosts[SCI_MAX_CONTROLLERS];
303 struct isci_orom *orom;
304};
305
306static inline struct isci_pci_info *to_pci_info(struct pci_dev *pdev)
307{
308 return pci_get_drvdata(pdev);
309}
310
311#define for_each_isci_host(id, ihost, pdev) \
312 for (id = 0, ihost = to_pci_info(pdev)->hosts[id]; \
313 id < ARRAY_SIZE(to_pci_info(pdev)->hosts) && ihost; \
314 ihost = to_pci_info(pdev)->hosts[++id])
315
316static inline enum isci_status isci_host_get_state(struct isci_host *isci_host)
317{
318 return isci_host->status;
319}
320
321static inline void isci_host_change_state(struct isci_host *isci_host,
322 enum isci_status status)
323{
324 unsigned long flags;
325
326 dev_dbg(&isci_host->pdev->dev,
327 "%s: isci_host = %p, state = 0x%x",
328 __func__,
329 isci_host,
330 status);
331 spin_lock_irqsave(&isci_host->state_lock, flags);
332 isci_host->status = status;
333 spin_unlock_irqrestore(&isci_host->state_lock, flags);
334
335}
336
337static inline void wait_for_start(struct isci_host *ihost)
338{
339 wait_event(ihost->eventq, !test_bit(IHOST_START_PENDING, &ihost->flags));
340}
341
342static inline void wait_for_stop(struct isci_host *ihost)
343{
344 wait_event(ihost->eventq, !test_bit(IHOST_STOP_PENDING, &ihost->flags));
345}
346
347static inline void wait_for_device_start(struct isci_host *ihost, struct isci_remote_device *idev)
348{
349 wait_event(ihost->eventq, !test_bit(IDEV_START_PENDING, &idev->flags));
350}
351
352static inline void wait_for_device_stop(struct isci_host *ihost, struct isci_remote_device *idev)
353{
354 wait_event(ihost->eventq, !test_bit(IDEV_STOP_PENDING, &idev->flags));
355}
356
357static inline struct isci_host *dev_to_ihost(struct domain_device *dev)
358{
359 return dev->port->ha->lldd_ha;
360}
361
362/* we always use protocol engine group zero */
363#define ISCI_PEG 0
364
365/* see sci_controller_io_tag_allocate|free for how seq and tci are built */
366#define ISCI_TAG(seq, tci) (((u16) (seq)) << 12 | tci)
367
368/* these are returned by the hardware, so sanitize them */
369#define ISCI_TAG_SEQ(tag) (((tag) >> 12) & (SCI_MAX_SEQ-1))
370#define ISCI_TAG_TCI(tag) ((tag) & (SCI_MAX_IO_REQUESTS-1))
371
372/* expander attached sata devices require 3 rnc slots */
373static inline int sci_remote_device_node_count(struct isci_remote_device *idev)
374{
375 struct domain_device *dev = idev->domain_dev;
376
377 if ((dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) &&
378 !idev->is_direct_attached)
379 return SCU_STP_REMOTE_NODE_COUNT;
380 return SCU_SSP_REMOTE_NODE_COUNT;
381}
382
383/**
384 * sci_controller_clear_invalid_phy() -
385 *
386 * This macro will clear the bit in the invalid phy mask for this controller
387 * object. This is used to control messages reported for invalid link up
388 * notifications.
389 */
390#define sci_controller_clear_invalid_phy(controller, phy) \
391 ((controller)->invalid_phy_mask &= ~(1 << (phy)->phy_index))
392
393static inline struct device *sciphy_to_dev(struct isci_phy *iphy)
394{
395
396 if (!iphy || !iphy->isci_port || !iphy->isci_port->isci_host)
397 return NULL;
398
399 return &iphy->isci_port->isci_host->pdev->dev;
400}
401
402static inline struct device *sciport_to_dev(struct isci_port *iport)
403{
404
405 if (!iport || !iport->isci_host)
406 return NULL;
407
408 return &iport->isci_host->pdev->dev;
409}
410
411static inline struct device *scirdev_to_dev(struct isci_remote_device *idev)
412{
413 if (!idev || !idev->isci_port || !idev->isci_port->isci_host)
414 return NULL;
415
416 return &idev->isci_port->isci_host->pdev->dev;
417}
418
419static inline bool is_a2(struct pci_dev *pdev)
420{
421 if (pdev->revision < 4)
422 return true;
423 return false;
424}
425
426static inline bool is_b0(struct pci_dev *pdev)
427{
428 if (pdev->revision == 4)
429 return true;
430 return false;
431}
432
433static inline bool is_c0(struct pci_dev *pdev)
434{
435 if (pdev->revision >= 5)
436 return true;
437 return false;
438}
439
440void sci_controller_post_request(struct isci_host *ihost,
441 u32 request);
442void sci_controller_release_frame(struct isci_host *ihost,
443 u32 frame_index);
444void sci_controller_copy_sata_response(void *response_buffer,
445 void *frame_header,
446 void *frame_buffer);
447enum sci_status sci_controller_allocate_remote_node_context(struct isci_host *ihost,
448 struct isci_remote_device *idev,
449 u16 *node_id);
450void sci_controller_free_remote_node_context(
451 struct isci_host *ihost,
452 struct isci_remote_device *idev,
453 u16 node_id);
454
455struct isci_request *sci_request_by_tag(struct isci_host *ihost,
456 u16 io_tag);
457
458void sci_controller_power_control_queue_insert(
459 struct isci_host *ihost,
460 struct isci_phy *iphy);
461
462void sci_controller_power_control_queue_remove(
463 struct isci_host *ihost,
464 struct isci_phy *iphy);
465
466void sci_controller_link_up(
467 struct isci_host *ihost,
468 struct isci_port *iport,
469 struct isci_phy *iphy);
470
471void sci_controller_link_down(
472 struct isci_host *ihost,
473 struct isci_port *iport,
474 struct isci_phy *iphy);
475
476void sci_controller_remote_device_stopped(
477 struct isci_host *ihost,
478 struct isci_remote_device *idev);
479
480void sci_controller_copy_task_context(
481 struct isci_host *ihost,
482 struct isci_request *ireq);
483
484void sci_controller_register_setup(struct isci_host *ihost);
485
486enum sci_status sci_controller_continue_io(struct isci_request *ireq);
487int isci_host_scan_finished(struct Scsi_Host *, unsigned long);
488void isci_host_scan_start(struct Scsi_Host *);
489u16 isci_alloc_tag(struct isci_host *ihost);
490enum sci_status isci_free_tag(struct isci_host *ihost, u16 io_tag);
491void isci_tci_free(struct isci_host *ihost, u16 tci);
492
493int isci_host_init(struct isci_host *);
494
495void isci_host_init_controller_names(
496 struct isci_host *isci_host,
497 unsigned int controller_idx);
498
499void isci_host_deinit(
500 struct isci_host *);
501
502void isci_host_port_link_up(
503 struct isci_host *,
504 struct isci_port *,
505 struct isci_phy *);
506int isci_host_dev_found(struct domain_device *);
507
508void isci_host_remote_device_start_complete(
509 struct isci_host *,
510 struct isci_remote_device *,
511 enum sci_status);
512
513void sci_controller_disable_interrupts(
514 struct isci_host *ihost);
515
516enum sci_status sci_controller_start_io(
517 struct isci_host *ihost,
518 struct isci_remote_device *idev,
519 struct isci_request *ireq);
520
521enum sci_task_status sci_controller_start_task(
522 struct isci_host *ihost,
523 struct isci_remote_device *idev,
524 struct isci_request *ireq);
525
526enum sci_status sci_controller_terminate_request(
527 struct isci_host *ihost,
528 struct isci_remote_device *idev,
529 struct isci_request *ireq);
530
531enum sci_status sci_controller_complete_io(
532 struct isci_host *ihost,
533 struct isci_remote_device *idev,
534 struct isci_request *ireq);
535
536void sci_port_configuration_agent_construct(
537 struct sci_port_configuration_agent *port_agent);
538
539enum sci_status sci_port_configuration_agent_initialize(
540 struct isci_host *ihost,
541 struct sci_port_configuration_agent *port_agent);
542#endif
diff --git a/drivers/scsi/isci/init.c b/drivers/scsi/isci/init.c
new file mode 100644
index 000000000000..61e0d09e2b57
--- /dev/null
+++ b/drivers/scsi/isci/init.c
@@ -0,0 +1,565 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include <linux/kernel.h>
57#include <linux/init.h>
58#include <linux/module.h>
59#include <linux/firmware.h>
60#include <linux/efi.h>
61#include <asm/string.h>
62#include "isci.h"
63#include "task.h"
64#include "probe_roms.h"
65
66static struct scsi_transport_template *isci_transport_template;
67
68static DEFINE_PCI_DEVICE_TABLE(isci_id_table) = {
69 { PCI_VDEVICE(INTEL, 0x1D61),},
70 { PCI_VDEVICE(INTEL, 0x1D63),},
71 { PCI_VDEVICE(INTEL, 0x1D65),},
72 { PCI_VDEVICE(INTEL, 0x1D67),},
73 { PCI_VDEVICE(INTEL, 0x1D69),},
74 { PCI_VDEVICE(INTEL, 0x1D6B),},
75 { PCI_VDEVICE(INTEL, 0x1D60),},
76 { PCI_VDEVICE(INTEL, 0x1D62),},
77 { PCI_VDEVICE(INTEL, 0x1D64),},
78 { PCI_VDEVICE(INTEL, 0x1D66),},
79 { PCI_VDEVICE(INTEL, 0x1D68),},
80 { PCI_VDEVICE(INTEL, 0x1D6A),},
81 {}
82};
83
84MODULE_DEVICE_TABLE(pci, isci_id_table);
85
86/* linux isci specific settings */
87
88unsigned char no_outbound_task_to = 20;
89module_param(no_outbound_task_to, byte, 0);
90MODULE_PARM_DESC(no_outbound_task_to, "No Outbound Task Timeout (1us incr)");
91
92u16 ssp_max_occ_to = 20;
93module_param(ssp_max_occ_to, ushort, 0);
94MODULE_PARM_DESC(ssp_max_occ_to, "SSP Max occupancy timeout (100us incr)");
95
96u16 stp_max_occ_to = 5;
97module_param(stp_max_occ_to, ushort, 0);
98MODULE_PARM_DESC(stp_max_occ_to, "STP Max occupancy timeout (100us incr)");
99
100u16 ssp_inactive_to = 5;
101module_param(ssp_inactive_to, ushort, 0);
102MODULE_PARM_DESC(ssp_inactive_to, "SSP inactivity timeout (100us incr)");
103
104u16 stp_inactive_to = 5;
105module_param(stp_inactive_to, ushort, 0);
106MODULE_PARM_DESC(stp_inactive_to, "STP inactivity timeout (100us incr)");
107
108unsigned char phy_gen = 3;
109module_param(phy_gen, byte, 0);
110MODULE_PARM_DESC(phy_gen, "PHY generation (1: 1.5Gbps 2: 3.0Gbps 3: 6.0Gbps)");
111
112unsigned char max_concurr_spinup = 1;
113module_param(max_concurr_spinup, byte, 0);
114MODULE_PARM_DESC(max_concurr_spinup, "Max concurrent device spinup");
115
116static struct scsi_host_template isci_sht = {
117
118 .module = THIS_MODULE,
119 .name = DRV_NAME,
120 .proc_name = DRV_NAME,
121 .queuecommand = sas_queuecommand,
122 .target_alloc = sas_target_alloc,
123 .slave_configure = sas_slave_configure,
124 .slave_destroy = sas_slave_destroy,
125 .scan_finished = isci_host_scan_finished,
126 .scan_start = isci_host_scan_start,
127 .change_queue_depth = sas_change_queue_depth,
128 .change_queue_type = sas_change_queue_type,
129 .bios_param = sas_bios_param,
130 .can_queue = ISCI_CAN_QUEUE_VAL,
131 .cmd_per_lun = 1,
132 .this_id = -1,
133 .sg_tablesize = SG_ALL,
134 .max_sectors = SCSI_DEFAULT_MAX_SECTORS,
135 .use_clustering = ENABLE_CLUSTERING,
136 .eh_device_reset_handler = sas_eh_device_reset_handler,
137 .eh_bus_reset_handler = isci_bus_reset_handler,
138 .slave_alloc = sas_slave_alloc,
139 .target_destroy = sas_target_destroy,
140 .ioctl = sas_ioctl,
141};
142
143static struct sas_domain_function_template isci_transport_ops = {
144
145 /* The class calls these to notify the LLDD of an event. */
146 .lldd_port_formed = isci_port_formed,
147 .lldd_port_deformed = isci_port_deformed,
148
149 /* The class calls these when a device is found or gone. */
150 .lldd_dev_found = isci_remote_device_found,
151 .lldd_dev_gone = isci_remote_device_gone,
152
153 .lldd_execute_task = isci_task_execute_task,
154 /* Task Management Functions. Must be called from process context. */
155 .lldd_abort_task = isci_task_abort_task,
156 .lldd_abort_task_set = isci_task_abort_task_set,
157 .lldd_clear_aca = isci_task_clear_aca,
158 .lldd_clear_task_set = isci_task_clear_task_set,
159 .lldd_I_T_nexus_reset = isci_task_I_T_nexus_reset,
160 .lldd_lu_reset = isci_task_lu_reset,
161 .lldd_query_task = isci_task_query_task,
162
163 /* Port and Adapter management */
164 .lldd_clear_nexus_port = isci_task_clear_nexus_port,
165 .lldd_clear_nexus_ha = isci_task_clear_nexus_ha,
166
167 /* Phy management */
168 .lldd_control_phy = isci_phy_control,
169};
170
171
172/******************************************************************************
173* P R O T E C T E D M E T H O D S
174******************************************************************************/
175
176
177
178/**
179 * isci_register_sas_ha() - This method initializes various lldd
180 * specific members of the sas_ha struct and calls the libsas
181 * sas_register_ha() function.
182 * @isci_host: This parameter specifies the lldd specific wrapper for the
183 * libsas sas_ha struct.
184 *
185 * This method returns an error code indicating sucess or failure. The user
186 * should check for possible memory allocation error return otherwise, a zero
187 * indicates success.
188 */
189static int isci_register_sas_ha(struct isci_host *isci_host)
190{
191 int i;
192 struct sas_ha_struct *sas_ha = &(isci_host->sas_ha);
193 struct asd_sas_phy **sas_phys;
194 struct asd_sas_port **sas_ports;
195
196 sas_phys = devm_kzalloc(&isci_host->pdev->dev,
197 SCI_MAX_PHYS * sizeof(void *),
198 GFP_KERNEL);
199 if (!sas_phys)
200 return -ENOMEM;
201
202 sas_ports = devm_kzalloc(&isci_host->pdev->dev,
203 SCI_MAX_PORTS * sizeof(void *),
204 GFP_KERNEL);
205 if (!sas_ports)
206 return -ENOMEM;
207
208 /*----------------- Libsas Initialization Stuff----------------------
209 * Set various fields in the sas_ha struct:
210 */
211
212 sas_ha->sas_ha_name = DRV_NAME;
213 sas_ha->lldd_module = THIS_MODULE;
214 sas_ha->sas_addr = &isci_host->phys[0].sas_addr[0];
215
216 /* set the array of phy and port structs. */
217 for (i = 0; i < SCI_MAX_PHYS; i++) {
218 sas_phys[i] = &isci_host->phys[i].sas_phy;
219 sas_ports[i] = &isci_host->ports[i].sas_port;
220 }
221
222 sas_ha->sas_phy = sas_phys;
223 sas_ha->sas_port = sas_ports;
224 sas_ha->num_phys = SCI_MAX_PHYS;
225
226 sas_ha->lldd_queue_size = ISCI_CAN_QUEUE_VAL;
227 sas_ha->lldd_max_execute_num = 1;
228 sas_ha->strict_wide_ports = 1;
229
230 sas_register_ha(sas_ha);
231
232 return 0;
233}
234
235static ssize_t isci_show_id(struct device *dev, struct device_attribute *attr, char *buf)
236{
237 struct Scsi_Host *shost = container_of(dev, typeof(*shost), shost_dev);
238 struct sas_ha_struct *sas_ha = SHOST_TO_SAS_HA(shost);
239 struct isci_host *ihost = container_of(sas_ha, typeof(*ihost), sas_ha);
240
241 return snprintf(buf, PAGE_SIZE, "%d\n", ihost->id);
242}
243
244static DEVICE_ATTR(isci_id, S_IRUGO, isci_show_id, NULL);
245
246static void isci_unregister(struct isci_host *isci_host)
247{
248 struct Scsi_Host *shost;
249
250 if (!isci_host)
251 return;
252
253 shost = isci_host->shost;
254 device_remove_file(&shost->shost_dev, &dev_attr_isci_id);
255
256 sas_unregister_ha(&isci_host->sas_ha);
257
258 sas_remove_host(isci_host->shost);
259 scsi_remove_host(isci_host->shost);
260 scsi_host_put(isci_host->shost);
261}
262
263static int __devinit isci_pci_init(struct pci_dev *pdev)
264{
265 int err, bar_num, bar_mask = 0;
266 void __iomem * const *iomap;
267
268 err = pcim_enable_device(pdev);
269 if (err) {
270 dev_err(&pdev->dev,
271 "failed enable PCI device %s!\n",
272 pci_name(pdev));
273 return err;
274 }
275
276 for (bar_num = 0; bar_num < SCI_PCI_BAR_COUNT; bar_num++)
277 bar_mask |= 1 << (bar_num * 2);
278
279 err = pcim_iomap_regions(pdev, bar_mask, DRV_NAME);
280 if (err)
281 return err;
282
283 iomap = pcim_iomap_table(pdev);
284 if (!iomap)
285 return -ENOMEM;
286
287 pci_set_master(pdev);
288
289 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
290 if (err) {
291 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
292 if (err)
293 return err;
294 }
295
296 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
297 if (err) {
298 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
299 if (err)
300 return err;
301 }
302
303 return 0;
304}
305
306static int num_controllers(struct pci_dev *pdev)
307{
308 /* bar size alone can tell us if we are running with a dual controller
309 * part, no need to trust revision ids that might be under broken firmware
310 * control
311 */
312 resource_size_t scu_bar_size = pci_resource_len(pdev, SCI_SCU_BAR*2);
313 resource_size_t smu_bar_size = pci_resource_len(pdev, SCI_SMU_BAR*2);
314
315 if (scu_bar_size >= SCI_SCU_BAR_SIZE*SCI_MAX_CONTROLLERS &&
316 smu_bar_size >= SCI_SMU_BAR_SIZE*SCI_MAX_CONTROLLERS)
317 return SCI_MAX_CONTROLLERS;
318 else
319 return 1;
320}
321
322static int isci_setup_interrupts(struct pci_dev *pdev)
323{
324 int err, i, num_msix;
325 struct isci_host *ihost;
326 struct isci_pci_info *pci_info = to_pci_info(pdev);
327
328 /*
329 * Determine the number of vectors associated with this
330 * PCI function.
331 */
332 num_msix = num_controllers(pdev) * SCI_NUM_MSI_X_INT;
333
334 for (i = 0; i < num_msix; i++)
335 pci_info->msix_entries[i].entry = i;
336
337 err = pci_enable_msix(pdev, pci_info->msix_entries, num_msix);
338 if (err)
339 goto intx;
340
341 for (i = 0; i < num_msix; i++) {
342 int id = i / SCI_NUM_MSI_X_INT;
343 struct msix_entry *msix = &pci_info->msix_entries[i];
344 irq_handler_t isr;
345
346 ihost = pci_info->hosts[id];
347 /* odd numbered vectors are error interrupts */
348 if (i & 1)
349 isr = isci_error_isr;
350 else
351 isr = isci_msix_isr;
352
353 err = devm_request_irq(&pdev->dev, msix->vector, isr, 0,
354 DRV_NAME"-msix", ihost);
355 if (!err)
356 continue;
357
358 dev_info(&pdev->dev, "msix setup failed falling back to intx\n");
359 while (i--) {
360 id = i / SCI_NUM_MSI_X_INT;
361 ihost = pci_info->hosts[id];
362 msix = &pci_info->msix_entries[i];
363 devm_free_irq(&pdev->dev, msix->vector, ihost);
364 }
365 pci_disable_msix(pdev);
366 goto intx;
367 }
368 return 0;
369
370 intx:
371 for_each_isci_host(i, ihost, pdev) {
372 err = devm_request_irq(&pdev->dev, pdev->irq, isci_intx_isr,
373 IRQF_SHARED, DRV_NAME"-intx", ihost);
374 if (err)
375 break;
376 }
377 return err;
378}
379
380static struct isci_host *isci_host_alloc(struct pci_dev *pdev, int id)
381{
382 struct isci_host *isci_host;
383 struct Scsi_Host *shost;
384 int err;
385
386 isci_host = devm_kzalloc(&pdev->dev, sizeof(*isci_host), GFP_KERNEL);
387 if (!isci_host)
388 return NULL;
389
390 isci_host->pdev = pdev;
391 isci_host->id = id;
392
393 shost = scsi_host_alloc(&isci_sht, sizeof(void *));
394 if (!shost)
395 return NULL;
396 isci_host->shost = shost;
397
398 err = isci_host_init(isci_host);
399 if (err)
400 goto err_shost;
401
402 SHOST_TO_SAS_HA(shost) = &isci_host->sas_ha;
403 isci_host->sas_ha.core.shost = shost;
404 shost->transportt = isci_transport_template;
405
406 shost->max_id = ~0;
407 shost->max_lun = ~0;
408 shost->max_cmd_len = MAX_COMMAND_SIZE;
409
410 err = scsi_add_host(shost, &pdev->dev);
411 if (err)
412 goto err_shost;
413
414 err = isci_register_sas_ha(isci_host);
415 if (err)
416 goto err_shost_remove;
417
418 err = device_create_file(&shost->shost_dev, &dev_attr_isci_id);
419 if (err)
420 goto err_unregister_ha;
421
422 return isci_host;
423
424 err_unregister_ha:
425 sas_unregister_ha(&(isci_host->sas_ha));
426 err_shost_remove:
427 scsi_remove_host(shost);
428 err_shost:
429 scsi_host_put(shost);
430
431 return NULL;
432}
433
434static int __devinit isci_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
435{
436 struct isci_pci_info *pci_info;
437 int err, i;
438 struct isci_host *isci_host;
439 const struct firmware *fw = NULL;
440 struct isci_orom *orom = NULL;
441 char *source = "(platform)";
442
443 dev_info(&pdev->dev, "driver configured for rev: %d silicon\n",
444 pdev->revision);
445
446 pci_info = devm_kzalloc(&pdev->dev, sizeof(*pci_info), GFP_KERNEL);
447 if (!pci_info)
448 return -ENOMEM;
449 pci_set_drvdata(pdev, pci_info);
450
451 if (efi_enabled)
452 orom = isci_get_efi_var(pdev);
453
454 if (!orom)
455 orom = isci_request_oprom(pdev);
456
457 for (i = 0; orom && i < ARRAY_SIZE(orom->ctrl); i++) {
458 if (sci_oem_parameters_validate(&orom->ctrl[i])) {
459 dev_warn(&pdev->dev,
460 "[%d]: invalid oem parameters detected, falling back to firmware\n", i);
461 devm_kfree(&pdev->dev, orom);
462 orom = NULL;
463 break;
464 }
465 }
466
467 if (!orom) {
468 source = "(firmware)";
469 orom = isci_request_firmware(pdev, fw);
470 if (!orom) {
471 /* TODO convert this to WARN_TAINT_ONCE once the
472 * orom/efi parameter support is widely available
473 */
474 dev_warn(&pdev->dev,
475 "Loading user firmware failed, using default "
476 "values\n");
477 dev_warn(&pdev->dev,
478 "Default OEM configuration being used: 4 "
479 "narrow ports, and default SAS Addresses\n");
480 }
481 }
482
483 if (orom)
484 dev_info(&pdev->dev,
485 "OEM SAS parameters (version: %u.%u) loaded %s\n",
486 (orom->hdr.version & 0xf0) >> 4,
487 (orom->hdr.version & 0xf), source);
488
489 pci_info->orom = orom;
490
491 err = isci_pci_init(pdev);
492 if (err)
493 return err;
494
495 for (i = 0; i < num_controllers(pdev); i++) {
496 struct isci_host *h = isci_host_alloc(pdev, i);
497
498 if (!h) {
499 err = -ENOMEM;
500 goto err_host_alloc;
501 }
502 pci_info->hosts[i] = h;
503 }
504
505 err = isci_setup_interrupts(pdev);
506 if (err)
507 goto err_host_alloc;
508
509 for_each_isci_host(i, isci_host, pdev)
510 scsi_scan_host(isci_host->shost);
511
512 return 0;
513
514 err_host_alloc:
515 for_each_isci_host(i, isci_host, pdev)
516 isci_unregister(isci_host);
517 return err;
518}
519
520static void __devexit isci_pci_remove(struct pci_dev *pdev)
521{
522 struct isci_host *ihost;
523 int i;
524
525 for_each_isci_host(i, ihost, pdev) {
526 isci_unregister(ihost);
527 isci_host_deinit(ihost);
528 sci_controller_disable_interrupts(ihost);
529 }
530}
531
532static struct pci_driver isci_pci_driver = {
533 .name = DRV_NAME,
534 .id_table = isci_id_table,
535 .probe = isci_pci_probe,
536 .remove = __devexit_p(isci_pci_remove),
537};
538
539static __init int isci_init(void)
540{
541 int err;
542
543 pr_info("%s: Intel(R) C600 SAS Controller Driver\n", DRV_NAME);
544
545 isci_transport_template = sas_domain_attach_transport(&isci_transport_ops);
546 if (!isci_transport_template)
547 return -ENOMEM;
548
549 err = pci_register_driver(&isci_pci_driver);
550 if (err)
551 sas_release_transport(isci_transport_template);
552
553 return err;
554}
555
556static __exit void isci_exit(void)
557{
558 pci_unregister_driver(&isci_pci_driver);
559 sas_release_transport(isci_transport_template);
560}
561
562MODULE_LICENSE("Dual BSD/GPL");
563MODULE_FIRMWARE(ISCI_FW_NAME);
564module_init(isci_init);
565module_exit(isci_exit);
diff --git a/drivers/scsi/isci/isci.h b/drivers/scsi/isci/isci.h
new file mode 100644
index 000000000000..d1de63312e7f
--- /dev/null
+++ b/drivers/scsi/isci/isci.h
@@ -0,0 +1,538 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef __ISCI_H__
57#define __ISCI_H__
58
59#include <linux/interrupt.h>
60#include <linux/types.h>
61
62#define DRV_NAME "isci"
63#define SCI_PCI_BAR_COUNT 2
64#define SCI_NUM_MSI_X_INT 2
65#define SCI_SMU_BAR 0
66#define SCI_SMU_BAR_SIZE (16*1024)
67#define SCI_SCU_BAR 1
68#define SCI_SCU_BAR_SIZE (4*1024*1024)
69#define SCI_IO_SPACE_BAR0 2
70#define SCI_IO_SPACE_BAR1 3
71#define ISCI_CAN_QUEUE_VAL 250 /* < SCI_MAX_IO_REQUESTS ? */
72#define SCIC_CONTROLLER_STOP_TIMEOUT 5000
73
74#define SCI_CONTROLLER_INVALID_IO_TAG 0xFFFF
75
76#define SCI_MAX_PHYS (4UL)
77#define SCI_MAX_PORTS SCI_MAX_PHYS
78#define SCI_MAX_SMP_PHYS (384) /* not silicon constrained */
79#define SCI_MAX_REMOTE_DEVICES (256UL)
80#define SCI_MAX_IO_REQUESTS (256UL)
81#define SCI_MAX_SEQ (16)
82#define SCI_MAX_MSIX_MESSAGES (2)
83#define SCI_MAX_SCATTER_GATHER_ELEMENTS 130 /* not silicon constrained */
84#define SCI_MAX_CONTROLLERS 2
85#define SCI_MAX_DOMAINS SCI_MAX_PORTS
86
87#define SCU_MAX_CRITICAL_NOTIFICATIONS (384)
88#define SCU_MAX_EVENTS_SHIFT (7)
89#define SCU_MAX_EVENTS (1 << SCU_MAX_EVENTS_SHIFT)
90#define SCU_MAX_UNSOLICITED_FRAMES (128)
91#define SCU_MAX_COMPLETION_QUEUE_SCRATCH (128)
92#define SCU_MAX_COMPLETION_QUEUE_ENTRIES (SCU_MAX_CRITICAL_NOTIFICATIONS \
93 + SCU_MAX_EVENTS \
94 + SCU_MAX_UNSOLICITED_FRAMES \
95 + SCI_MAX_IO_REQUESTS \
96 + SCU_MAX_COMPLETION_QUEUE_SCRATCH)
97#define SCU_MAX_COMPLETION_QUEUE_SHIFT (ilog2(SCU_MAX_COMPLETION_QUEUE_ENTRIES))
98
99#define SCU_ABSOLUTE_MAX_UNSOLICITED_FRAMES (4096)
100#define SCU_UNSOLICITED_FRAME_BUFFER_SIZE (1024)
101#define SCU_INVALID_FRAME_INDEX (0xFFFF)
102
103#define SCU_IO_REQUEST_MAX_SGE_SIZE (0x00FFFFFF)
104#define SCU_IO_REQUEST_MAX_TRANSFER_LENGTH (0x00FFFFFF)
105
106static inline void check_sizes(void)
107{
108 BUILD_BUG_ON_NOT_POWER_OF_2(SCU_MAX_EVENTS);
109 BUILD_BUG_ON(SCU_MAX_UNSOLICITED_FRAMES <= 8);
110 BUILD_BUG_ON_NOT_POWER_OF_2(SCU_MAX_UNSOLICITED_FRAMES);
111 BUILD_BUG_ON_NOT_POWER_OF_2(SCU_MAX_COMPLETION_QUEUE_ENTRIES);
112 BUILD_BUG_ON(SCU_MAX_UNSOLICITED_FRAMES > SCU_ABSOLUTE_MAX_UNSOLICITED_FRAMES);
113 BUILD_BUG_ON_NOT_POWER_OF_2(SCI_MAX_IO_REQUESTS);
114 BUILD_BUG_ON_NOT_POWER_OF_2(SCI_MAX_SEQ);
115}
116
117/**
118 * enum sci_status - This is the general return status enumeration for non-IO,
119 * non-task management related SCI interface methods.
120 *
121 *
122 */
123enum sci_status {
124 /**
125 * This member indicates successful completion.
126 */
127 SCI_SUCCESS = 0,
128
129 /**
130 * This value indicates that the calling method completed successfully,
131 * but that the IO may have completed before having it's start method
132 * invoked. This occurs during SAT translation for requests that do
133 * not require an IO to the target or for any other requests that may
134 * be completed without having to submit IO.
135 */
136 SCI_SUCCESS_IO_COMPLETE_BEFORE_START,
137
138 /**
139 * This Value indicates that the SCU hardware returned an early response
140 * because the io request specified more data than is returned by the
141 * target device (mode pages, inquiry data, etc.). The completion routine
142 * will handle this case to get the actual number of bytes transferred.
143 */
144 SCI_SUCCESS_IO_DONE_EARLY,
145
146 /**
147 * This member indicates that the object for which a state change is
148 * being requested is already in said state.
149 */
150 SCI_WARNING_ALREADY_IN_STATE,
151
152 /**
153 * This member indicates interrupt coalescence timer may cause SAS
154 * specification compliance issues (i.e. SMP target mode response
155 * frames must be returned within 1.9 milliseconds).
156 */
157 SCI_WARNING_TIMER_CONFLICT,
158
159 /**
160 * This field indicates a sequence of action is not completed yet. Mostly,
161 * this status is used when multiple ATA commands are needed in a SATI translation.
162 */
163 SCI_WARNING_SEQUENCE_INCOMPLETE,
164
165 /**
166 * This member indicates that there was a general failure.
167 */
168 SCI_FAILURE,
169
170 /**
171 * This member indicates that the SCI implementation is unable to complete
172 * an operation due to a critical flaw the prevents any further operation
173 * (i.e. an invalid pointer).
174 */
175 SCI_FATAL_ERROR,
176
177 /**
178 * This member indicates the calling function failed, because the state
179 * of the controller is in a state that prevents successful completion.
180 */
181 SCI_FAILURE_INVALID_STATE,
182
183 /**
184 * This member indicates the calling function failed, because there is
185 * insufficient resources/memory to complete the request.
186 */
187 SCI_FAILURE_INSUFFICIENT_RESOURCES,
188
189 /**
190 * This member indicates the calling function failed, because the
191 * controller object required for the operation can't be located.
192 */
193 SCI_FAILURE_CONTROLLER_NOT_FOUND,
194
195 /**
196 * This member indicates the calling function failed, because the
197 * discovered controller type is not supported by the library.
198 */
199 SCI_FAILURE_UNSUPPORTED_CONTROLLER_TYPE,
200
201 /**
202 * This member indicates the calling function failed, because the
203 * requested initialization data version isn't supported.
204 */
205 SCI_FAILURE_UNSUPPORTED_INIT_DATA_VERSION,
206
207 /**
208 * This member indicates the calling function failed, because the
209 * requested configuration of SAS Phys into SAS Ports is not supported.
210 */
211 SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION,
212
213 /**
214 * This member indicates the calling function failed, because the
215 * requested protocol is not supported by the remote device, port,
216 * or controller.
217 */
218 SCI_FAILURE_UNSUPPORTED_PROTOCOL,
219
220 /**
221 * This member indicates the calling function failed, because the
222 * requested information type is not supported by the SCI implementation.
223 */
224 SCI_FAILURE_UNSUPPORTED_INFORMATION_TYPE,
225
226 /**
227 * This member indicates the calling function failed, because the
228 * device already exists.
229 */
230 SCI_FAILURE_DEVICE_EXISTS,
231
232 /**
233 * This member indicates the calling function failed, because adding
234 * a phy to the object is not possible.
235 */
236 SCI_FAILURE_ADDING_PHY_UNSUPPORTED,
237
238 /**
239 * This member indicates the calling function failed, because the
240 * requested information type is not supported by the SCI implementation.
241 */
242 SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD,
243
244 /**
245 * This member indicates the calling function failed, because the SCI
246 * implementation does not support the supplied time limit.
247 */
248 SCI_FAILURE_UNSUPPORTED_TIME_LIMIT,
249
250 /**
251 * This member indicates the calling method failed, because the SCI
252 * implementation does not contain the specified Phy.
253 */
254 SCI_FAILURE_INVALID_PHY,
255
256 /**
257 * This member indicates the calling method failed, because the SCI
258 * implementation does not contain the specified Port.
259 */
260 SCI_FAILURE_INVALID_PORT,
261
262 /**
263 * This member indicates the calling method was partly successful
264 * The port was reset but not all phys in port are operational
265 */
266 SCI_FAILURE_RESET_PORT_PARTIAL_SUCCESS,
267
268 /**
269 * This member indicates that calling method failed
270 * The port reset did not complete because none of the phys are operational
271 */
272 SCI_FAILURE_RESET_PORT_FAILURE,
273
274 /**
275 * This member indicates the calling method failed, because the SCI
276 * implementation does not contain the specified remote device.
277 */
278 SCI_FAILURE_INVALID_REMOTE_DEVICE,
279
280 /**
281 * This member indicates the calling method failed, because the remote
282 * device is in a bad state and requires a reset.
283 */
284 SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED,
285
286 /**
287 * This member indicates the calling method failed, because the SCI
288 * implementation does not contain or support the specified IO tag.
289 */
290 SCI_FAILURE_INVALID_IO_TAG,
291
292 /**
293 * This member indicates that the operation failed and the user should
294 * check the response data associated with the IO.
295 */
296 SCI_FAILURE_IO_RESPONSE_VALID,
297
298 /**
299 * This member indicates that the operation failed, the failure is
300 * controller implementation specific, and the response data associated
301 * with the request is not valid. You can query for the controller
302 * specific error information via sci_controller_get_request_status()
303 */
304 SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR,
305
306 /**
307 * This member indicated that the operation failed because the
308 * user requested this IO to be terminated.
309 */
310 SCI_FAILURE_IO_TERMINATED,
311
312 /**
313 * This member indicates that the operation failed and the associated
314 * request requires a SCSI abort task to be sent to the target.
315 */
316 SCI_FAILURE_IO_REQUIRES_SCSI_ABORT,
317
318 /**
319 * This member indicates that the operation failed because the supplied
320 * device could not be located.
321 */
322 SCI_FAILURE_DEVICE_NOT_FOUND,
323
324 /**
325 * This member indicates that the operation failed because the
326 * objects association is required and is not correctly set.
327 */
328 SCI_FAILURE_INVALID_ASSOCIATION,
329
330 /**
331 * This member indicates that the operation failed, because a timeout
332 * occurred.
333 */
334 SCI_FAILURE_TIMEOUT,
335
336 /**
337 * This member indicates that the operation failed, because the user
338 * specified a value that is either invalid or not supported.
339 */
340 SCI_FAILURE_INVALID_PARAMETER_VALUE,
341
342 /**
343 * This value indicates that the operation failed, because the number
344 * of messages (MSI-X) is not supported.
345 */
346 SCI_FAILURE_UNSUPPORTED_MESSAGE_COUNT,
347
348 /**
349 * This value indicates that the method failed due to a lack of
350 * available NCQ tags.
351 */
352 SCI_FAILURE_NO_NCQ_TAG_AVAILABLE,
353
354 /**
355 * This value indicates that a protocol violation has occurred on the
356 * link.
357 */
358 SCI_FAILURE_PROTOCOL_VIOLATION,
359
360 /**
361 * This value indicates a failure condition that retry may help to clear.
362 */
363 SCI_FAILURE_RETRY_REQUIRED,
364
365 /**
366 * This field indicates the retry limit was reached when a retry is attempted
367 */
368 SCI_FAILURE_RETRY_LIMIT_REACHED,
369
370 /**
371 * This member indicates the calling method was partly successful.
372 * Mostly, this status is used when a LUN_RESET issued to an expander attached
373 * STP device in READY NCQ substate needs to have RNC suspended/resumed
374 * before posting TC.
375 */
376 SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS,
377
378 /**
379 * This field indicates an illegal phy connection based on the routing attribute
380 * of both expander phy attached to each other.
381 */
382 SCI_FAILURE_ILLEGAL_ROUTING_ATTRIBUTE_CONFIGURATION,
383
384 /**
385 * This field indicates a CONFIG ROUTE INFO command has a response with function result
386 * INDEX DOES NOT EXIST, usually means exceeding max route index.
387 */
388 SCI_FAILURE_EXCEED_MAX_ROUTE_INDEX,
389
390 /**
391 * This value indicates that an unsupported PCI device ID has been
392 * specified. This indicates that attempts to invoke
393 * sci_library_allocate_controller() will fail.
394 */
395 SCI_FAILURE_UNSUPPORTED_PCI_DEVICE_ID
396
397};
398
399/**
400 * enum sci_io_status - This enumeration depicts all of the possible IO
401 * completion status values. Each value in this enumeration maps directly
402 * to a value in the enum sci_status enumeration. Please refer to that
403 * enumeration for detailed comments concerning what the status represents.
404 *
405 * Add the API to retrieve the SCU status from the core. Check to see that the
406 * following status are properly handled: - SCI_IO_FAILURE_UNSUPPORTED_PROTOCOL
407 * - SCI_IO_FAILURE_INVALID_IO_TAG
408 */
409enum sci_io_status {
410 SCI_IO_SUCCESS = SCI_SUCCESS,
411 SCI_IO_FAILURE = SCI_FAILURE,
412 SCI_IO_SUCCESS_COMPLETE_BEFORE_START = SCI_SUCCESS_IO_COMPLETE_BEFORE_START,
413 SCI_IO_SUCCESS_IO_DONE_EARLY = SCI_SUCCESS_IO_DONE_EARLY,
414 SCI_IO_FAILURE_INVALID_STATE = SCI_FAILURE_INVALID_STATE,
415 SCI_IO_FAILURE_INSUFFICIENT_RESOURCES = SCI_FAILURE_INSUFFICIENT_RESOURCES,
416 SCI_IO_FAILURE_UNSUPPORTED_PROTOCOL = SCI_FAILURE_UNSUPPORTED_PROTOCOL,
417 SCI_IO_FAILURE_RESPONSE_VALID = SCI_FAILURE_IO_RESPONSE_VALID,
418 SCI_IO_FAILURE_CONTROLLER_SPECIFIC_ERR = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR,
419 SCI_IO_FAILURE_TERMINATED = SCI_FAILURE_IO_TERMINATED,
420 SCI_IO_FAILURE_REQUIRES_SCSI_ABORT = SCI_FAILURE_IO_REQUIRES_SCSI_ABORT,
421 SCI_IO_FAILURE_INVALID_PARAMETER_VALUE = SCI_FAILURE_INVALID_PARAMETER_VALUE,
422 SCI_IO_FAILURE_NO_NCQ_TAG_AVAILABLE = SCI_FAILURE_NO_NCQ_TAG_AVAILABLE,
423 SCI_IO_FAILURE_PROTOCOL_VIOLATION = SCI_FAILURE_PROTOCOL_VIOLATION,
424
425 SCI_IO_FAILURE_REMOTE_DEVICE_RESET_REQUIRED = SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED,
426
427 SCI_IO_FAILURE_RETRY_REQUIRED = SCI_FAILURE_RETRY_REQUIRED,
428 SCI_IO_FAILURE_RETRY_LIMIT_REACHED = SCI_FAILURE_RETRY_LIMIT_REACHED,
429 SCI_IO_FAILURE_INVALID_REMOTE_DEVICE = SCI_FAILURE_INVALID_REMOTE_DEVICE
430};
431
432/**
433 * enum sci_task_status - This enumeration depicts all of the possible task
434 * completion status values. Each value in this enumeration maps directly
435 * to a value in the enum sci_status enumeration. Please refer to that
436 * enumeration for detailed comments concerning what the status represents.
437 *
438 * Check to see that the following status are properly handled:
439 */
440enum sci_task_status {
441 SCI_TASK_SUCCESS = SCI_SUCCESS,
442 SCI_TASK_FAILURE = SCI_FAILURE,
443 SCI_TASK_FAILURE_INVALID_STATE = SCI_FAILURE_INVALID_STATE,
444 SCI_TASK_FAILURE_INSUFFICIENT_RESOURCES = SCI_FAILURE_INSUFFICIENT_RESOURCES,
445 SCI_TASK_FAILURE_UNSUPPORTED_PROTOCOL = SCI_FAILURE_UNSUPPORTED_PROTOCOL,
446 SCI_TASK_FAILURE_INVALID_TAG = SCI_FAILURE_INVALID_IO_TAG,
447 SCI_TASK_FAILURE_RESPONSE_VALID = SCI_FAILURE_IO_RESPONSE_VALID,
448 SCI_TASK_FAILURE_CONTROLLER_SPECIFIC_ERR = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR,
449 SCI_TASK_FAILURE_TERMINATED = SCI_FAILURE_IO_TERMINATED,
450 SCI_TASK_FAILURE_INVALID_PARAMETER_VALUE = SCI_FAILURE_INVALID_PARAMETER_VALUE,
451
452 SCI_TASK_FAILURE_REMOTE_DEVICE_RESET_REQUIRED = SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED,
453 SCI_TASK_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS = SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS
454
455};
456
457/**
458 * sci_swab32_cpy - convert between scsi and scu-hardware byte format
459 * @dest: receive the 4-byte endian swapped version of src
460 * @src: word aligned source buffer
461 *
462 * scu hardware handles SSP/SMP control, response, and unidentified
463 * frames in "big endian dword" order. Regardless of host endian this
464 * is always a swab32()-per-dword conversion of the standard definition,
465 * i.e. single byte fields swapped and multi-byte fields in little-
466 * endian
467 */
468static inline void sci_swab32_cpy(void *_dest, void *_src, ssize_t word_cnt)
469{
470 u32 *dest = _dest, *src = _src;
471
472 while (--word_cnt >= 0)
473 dest[word_cnt] = swab32(src[word_cnt]);
474}
475
476extern unsigned char no_outbound_task_to;
477extern u16 ssp_max_occ_to;
478extern u16 stp_max_occ_to;
479extern u16 ssp_inactive_to;
480extern u16 stp_inactive_to;
481extern unsigned char phy_gen;
482extern unsigned char max_concurr_spinup;
483
484irqreturn_t isci_msix_isr(int vec, void *data);
485irqreturn_t isci_intx_isr(int vec, void *data);
486irqreturn_t isci_error_isr(int vec, void *data);
487
488/*
489 * Each timer is associated with a cancellation flag that is set when
490 * del_timer() is called and checked in the timer callback function. This
491 * is needed since del_timer_sync() cannot be called with sci_lock held.
492 * For deinit however, del_timer_sync() is used without holding the lock.
493 */
494struct sci_timer {
495 struct timer_list timer;
496 bool cancel;
497};
498
499static inline
500void sci_init_timer(struct sci_timer *tmr, void (*fn)(unsigned long))
501{
502 tmr->timer.function = fn;
503 tmr->timer.data = (unsigned long) tmr;
504 tmr->cancel = 0;
505 init_timer(&tmr->timer);
506}
507
508static inline void sci_mod_timer(struct sci_timer *tmr, unsigned long msec)
509{
510 tmr->cancel = 0;
511 mod_timer(&tmr->timer, jiffies + msecs_to_jiffies(msec));
512}
513
514static inline void sci_del_timer(struct sci_timer *tmr)
515{
516 tmr->cancel = 1;
517 del_timer(&tmr->timer);
518}
519
520struct sci_base_state_machine {
521 const struct sci_base_state *state_table;
522 u32 initial_state_id;
523 u32 current_state_id;
524 u32 previous_state_id;
525};
526
527typedef void (*sci_state_transition_t)(struct sci_base_state_machine *sm);
528
529struct sci_base_state {
530 sci_state_transition_t enter_state; /* Called on state entry */
531 sci_state_transition_t exit_state; /* Called on state exit */
532};
533
534extern void sci_init_sm(struct sci_base_state_machine *sm,
535 const struct sci_base_state *state_table,
536 u32 initial_state);
537extern void sci_change_state(struct sci_base_state_machine *sm, u32 next_state);
538#endif /* __ISCI_H__ */
diff --git a/drivers/scsi/isci/phy.c b/drivers/scsi/isci/phy.c
new file mode 100644
index 000000000000..79313a7a2356
--- /dev/null
+++ b/drivers/scsi/isci/phy.c
@@ -0,0 +1,1312 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include "isci.h"
57#include "host.h"
58#include "phy.h"
59#include "scu_event_codes.h"
60#include "probe_roms.h"
61
62/* Maximum arbitration wait time in micro-seconds */
63#define SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME (700)
64
65enum sas_linkrate sci_phy_linkrate(struct isci_phy *iphy)
66{
67 return iphy->max_negotiated_speed;
68}
69
70static enum sci_status
71sci_phy_transport_layer_initialization(struct isci_phy *iphy,
72 struct scu_transport_layer_registers __iomem *reg)
73{
74 u32 tl_control;
75
76 iphy->transport_layer_registers = reg;
77
78 writel(SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX,
79 &iphy->transport_layer_registers->stp_rni);
80
81 /*
82 * Hardware team recommends that we enable the STP prefetch for all
83 * transports
84 */
85 tl_control = readl(&iphy->transport_layer_registers->control);
86 tl_control |= SCU_TLCR_GEN_BIT(STP_WRITE_DATA_PREFETCH);
87 writel(tl_control, &iphy->transport_layer_registers->control);
88
89 return SCI_SUCCESS;
90}
91
92static enum sci_status
93sci_phy_link_layer_initialization(struct isci_phy *iphy,
94 struct scu_link_layer_registers __iomem *reg)
95{
96 struct isci_host *ihost = iphy->owning_port->owning_controller;
97 int phy_idx = iphy->phy_index;
98 struct sci_phy_user_params *phy_user = &ihost->user_parameters.phys[phy_idx];
99 struct sci_phy_oem_params *phy_oem =
100 &ihost->oem_parameters.phys[phy_idx];
101 u32 phy_configuration;
102 struct sci_phy_cap phy_cap;
103 u32 parity_check = 0;
104 u32 parity_count = 0;
105 u32 llctl, link_rate;
106 u32 clksm_value = 0;
107
108 iphy->link_layer_registers = reg;
109
110 /* Set our IDENTIFY frame data */
111 #define SCI_END_DEVICE 0x01
112
113 writel(SCU_SAS_TIID_GEN_BIT(SMP_INITIATOR) |
114 SCU_SAS_TIID_GEN_BIT(SSP_INITIATOR) |
115 SCU_SAS_TIID_GEN_BIT(STP_INITIATOR) |
116 SCU_SAS_TIID_GEN_BIT(DA_SATA_HOST) |
117 SCU_SAS_TIID_GEN_VAL(DEVICE_TYPE, SCI_END_DEVICE),
118 &iphy->link_layer_registers->transmit_identification);
119
120 /* Write the device SAS Address */
121 writel(0xFEDCBA98,
122 &iphy->link_layer_registers->sas_device_name_high);
123 writel(phy_idx, &iphy->link_layer_registers->sas_device_name_low);
124
125 /* Write the source SAS Address */
126 writel(phy_oem->sas_address.high,
127 &iphy->link_layer_registers->source_sas_address_high);
128 writel(phy_oem->sas_address.low,
129 &iphy->link_layer_registers->source_sas_address_low);
130
131 /* Clear and Set the PHY Identifier */
132 writel(0, &iphy->link_layer_registers->identify_frame_phy_id);
133 writel(SCU_SAS_TIPID_GEN_VALUE(ID, phy_idx),
134 &iphy->link_layer_registers->identify_frame_phy_id);
135
136 /* Change the initial state of the phy configuration register */
137 phy_configuration =
138 readl(&iphy->link_layer_registers->phy_configuration);
139
140 /* Hold OOB state machine in reset */
141 phy_configuration |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
142 writel(phy_configuration,
143 &iphy->link_layer_registers->phy_configuration);
144
145 /* Configure the SNW capabilities */
146 phy_cap.all = 0;
147 phy_cap.start = 1;
148 phy_cap.gen3_no_ssc = 1;
149 phy_cap.gen2_no_ssc = 1;
150 phy_cap.gen1_no_ssc = 1;
151 if (ihost->oem_parameters.controller.do_enable_ssc == true) {
152 phy_cap.gen3_ssc = 1;
153 phy_cap.gen2_ssc = 1;
154 phy_cap.gen1_ssc = 1;
155 }
156
157 /*
158 * The SAS specification indicates that the phy_capabilities that
159 * are transmitted shall have an even parity. Calculate the parity. */
160 parity_check = phy_cap.all;
161 while (parity_check != 0) {
162 if (parity_check & 0x1)
163 parity_count++;
164 parity_check >>= 1;
165 }
166
167 /*
168 * If parity indicates there are an odd number of bits set, then
169 * set the parity bit to 1 in the phy capabilities. */
170 if ((parity_count % 2) != 0)
171 phy_cap.parity = 1;
172
173 writel(phy_cap.all, &iphy->link_layer_registers->phy_capabilities);
174
175 /* Set the enable spinup period but disable the ability to send
176 * notify enable spinup
177 */
178 writel(SCU_ENSPINUP_GEN_VAL(COUNT,
179 phy_user->notify_enable_spin_up_insertion_frequency),
180 &iphy->link_layer_registers->notify_enable_spinup_control);
181
182 /* Write the ALIGN Insertion Ferequency for connected phy and
183 * inpendent of connected state
184 */
185 clksm_value = SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(CONNECTED,
186 phy_user->in_connection_align_insertion_frequency);
187
188 clksm_value |= SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(GENERAL,
189 phy_user->align_insertion_frequency);
190
191 writel(clksm_value, &iphy->link_layer_registers->clock_skew_management);
192
193 /* @todo Provide a way to write this register correctly */
194 writel(0x02108421,
195 &iphy->link_layer_registers->afe_lookup_table_control);
196
197 llctl = SCU_SAS_LLCTL_GEN_VAL(NO_OUTBOUND_TASK_TIMEOUT,
198 (u8)ihost->user_parameters.no_outbound_task_timeout);
199
200 switch (phy_user->max_speed_generation) {
201 case SCIC_SDS_PARM_GEN3_SPEED:
202 link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN3;
203 break;
204 case SCIC_SDS_PARM_GEN2_SPEED:
205 link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN2;
206 break;
207 default:
208 link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1;
209 break;
210 }
211 llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate);
212 writel(llctl, &iphy->link_layer_registers->link_layer_control);
213
214 if (is_a2(ihost->pdev)) {
215 /* Program the max ARB time for the PHY to 700us so we inter-operate with
216 * the PMC expander which shuts down PHYs if the expander PHY generates too
217 * many breaks. This time value will guarantee that the initiator PHY will
218 * generate the break.
219 */
220 writel(SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME,
221 &iphy->link_layer_registers->maximum_arbitration_wait_timer_timeout);
222 }
223
224 /* Disable link layer hang detection, rely on the OS timeout for I/O timeouts. */
225 writel(0, &iphy->link_layer_registers->link_layer_hang_detection_timeout);
226
227 /* We can exit the initial state to the stopped state */
228 sci_change_state(&iphy->sm, SCI_PHY_STOPPED);
229
230 return SCI_SUCCESS;
231}
232
233static void phy_sata_timeout(unsigned long data)
234{
235 struct sci_timer *tmr = (struct sci_timer *)data;
236 struct isci_phy *iphy = container_of(tmr, typeof(*iphy), sata_timer);
237 struct isci_host *ihost = iphy->owning_port->owning_controller;
238 unsigned long flags;
239
240 spin_lock_irqsave(&ihost->scic_lock, flags);
241
242 if (tmr->cancel)
243 goto done;
244
245 dev_dbg(sciphy_to_dev(iphy),
246 "%s: SCIC SDS Phy 0x%p did not receive signature fis before "
247 "timeout.\n",
248 __func__,
249 iphy);
250
251 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
252done:
253 spin_unlock_irqrestore(&ihost->scic_lock, flags);
254}
255
256/**
257 * This method returns the port currently containing this phy. If the phy is
258 * currently contained by the dummy port, then the phy is considered to not
259 * be part of a port.
260 * @sci_phy: This parameter specifies the phy for which to retrieve the
261 * containing port.
262 *
263 * This method returns a handle to a port that contains the supplied phy.
264 * NULL This value is returned if the phy is not part of a real
265 * port (i.e. it's contained in the dummy port). !NULL All other
266 * values indicate a handle/pointer to the port containing the phy.
267 */
268struct isci_port *phy_get_non_dummy_port(struct isci_phy *iphy)
269{
270 struct isci_port *iport = iphy->owning_port;
271
272 if (iport->physical_port_index == SCIC_SDS_DUMMY_PORT)
273 return NULL;
274
275 return iphy->owning_port;
276}
277
278/**
279 * This method will assign a port to the phy object.
280 * @out]: iphy This parameter specifies the phy for which to assign a port
281 * object.
282 *
283 *
284 */
285void sci_phy_set_port(
286 struct isci_phy *iphy,
287 struct isci_port *iport)
288{
289 iphy->owning_port = iport;
290
291 if (iphy->bcn_received_while_port_unassigned) {
292 iphy->bcn_received_while_port_unassigned = false;
293 sci_port_broadcast_change_received(iphy->owning_port, iphy);
294 }
295}
296
297enum sci_status sci_phy_initialize(struct isci_phy *iphy,
298 struct scu_transport_layer_registers __iomem *tl,
299 struct scu_link_layer_registers __iomem *ll)
300{
301 /* Perfrom the initialization of the TL hardware */
302 sci_phy_transport_layer_initialization(iphy, tl);
303
304 /* Perofrm the initialization of the PE hardware */
305 sci_phy_link_layer_initialization(iphy, ll);
306
307 /* There is nothing that needs to be done in this state just
308 * transition to the stopped state
309 */
310 sci_change_state(&iphy->sm, SCI_PHY_STOPPED);
311
312 return SCI_SUCCESS;
313}
314
315/**
316 * This method assigns the direct attached device ID for this phy.
317 *
318 * @iphy The phy for which the direct attached device id is to
319 * be assigned.
320 * @device_id The direct attached device ID to assign to the phy.
321 * This will either be the RNi for the device or an invalid RNi if there
322 * is no current device assigned to the phy.
323 */
324void sci_phy_setup_transport(struct isci_phy *iphy, u32 device_id)
325{
326 u32 tl_control;
327
328 writel(device_id, &iphy->transport_layer_registers->stp_rni);
329
330 /*
331 * The read should guarantee that the first write gets posted
332 * before the next write
333 */
334 tl_control = readl(&iphy->transport_layer_registers->control);
335 tl_control |= SCU_TLCR_GEN_BIT(CLEAR_TCI_NCQ_MAPPING_TABLE);
336 writel(tl_control, &iphy->transport_layer_registers->control);
337}
338
339static void sci_phy_suspend(struct isci_phy *iphy)
340{
341 u32 scu_sas_pcfg_value;
342
343 scu_sas_pcfg_value =
344 readl(&iphy->link_layer_registers->phy_configuration);
345 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE);
346 writel(scu_sas_pcfg_value,
347 &iphy->link_layer_registers->phy_configuration);
348
349 sci_phy_setup_transport(iphy, SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX);
350}
351
352void sci_phy_resume(struct isci_phy *iphy)
353{
354 u32 scu_sas_pcfg_value;
355
356 scu_sas_pcfg_value =
357 readl(&iphy->link_layer_registers->phy_configuration);
358 scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE);
359 writel(scu_sas_pcfg_value,
360 &iphy->link_layer_registers->phy_configuration);
361}
362
363void sci_phy_get_sas_address(struct isci_phy *iphy, struct sci_sas_address *sas)
364{
365 sas->high = readl(&iphy->link_layer_registers->source_sas_address_high);
366 sas->low = readl(&iphy->link_layer_registers->source_sas_address_low);
367}
368
369void sci_phy_get_attached_sas_address(struct isci_phy *iphy, struct sci_sas_address *sas)
370{
371 struct sas_identify_frame *iaf;
372
373 iaf = &iphy->frame_rcvd.iaf;
374 memcpy(sas, iaf->sas_addr, SAS_ADDR_SIZE);
375}
376
377void sci_phy_get_protocols(struct isci_phy *iphy, struct sci_phy_proto *proto)
378{
379 proto->all = readl(&iphy->link_layer_registers->transmit_identification);
380}
381
382enum sci_status sci_phy_start(struct isci_phy *iphy)
383{
384 enum sci_phy_states state = iphy->sm.current_state_id;
385
386 if (state != SCI_PHY_STOPPED) {
387 dev_dbg(sciphy_to_dev(iphy),
388 "%s: in wrong state: %d\n", __func__, state);
389 return SCI_FAILURE_INVALID_STATE;
390 }
391
392 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
393 return SCI_SUCCESS;
394}
395
396enum sci_status sci_phy_stop(struct isci_phy *iphy)
397{
398 enum sci_phy_states state = iphy->sm.current_state_id;
399
400 switch (state) {
401 case SCI_PHY_SUB_INITIAL:
402 case SCI_PHY_SUB_AWAIT_OSSP_EN:
403 case SCI_PHY_SUB_AWAIT_SAS_SPEED_EN:
404 case SCI_PHY_SUB_AWAIT_SAS_POWER:
405 case SCI_PHY_SUB_AWAIT_SATA_POWER:
406 case SCI_PHY_SUB_AWAIT_SATA_PHY_EN:
407 case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN:
408 case SCI_PHY_SUB_AWAIT_SIG_FIS_UF:
409 case SCI_PHY_SUB_FINAL:
410 case SCI_PHY_READY:
411 break;
412 default:
413 dev_dbg(sciphy_to_dev(iphy),
414 "%s: in wrong state: %d\n", __func__, state);
415 return SCI_FAILURE_INVALID_STATE;
416 }
417
418 sci_change_state(&iphy->sm, SCI_PHY_STOPPED);
419 return SCI_SUCCESS;
420}
421
422enum sci_status sci_phy_reset(struct isci_phy *iphy)
423{
424 enum sci_phy_states state = iphy->sm.current_state_id;
425
426 if (state != SCI_PHY_READY) {
427 dev_dbg(sciphy_to_dev(iphy),
428 "%s: in wrong state: %d\n", __func__, state);
429 return SCI_FAILURE_INVALID_STATE;
430 }
431
432 sci_change_state(&iphy->sm, SCI_PHY_RESETTING);
433 return SCI_SUCCESS;
434}
435
436enum sci_status sci_phy_consume_power_handler(struct isci_phy *iphy)
437{
438 enum sci_phy_states state = iphy->sm.current_state_id;
439
440 switch (state) {
441 case SCI_PHY_SUB_AWAIT_SAS_POWER: {
442 u32 enable_spinup;
443
444 enable_spinup = readl(&iphy->link_layer_registers->notify_enable_spinup_control);
445 enable_spinup |= SCU_ENSPINUP_GEN_BIT(ENABLE);
446 writel(enable_spinup, &iphy->link_layer_registers->notify_enable_spinup_control);
447
448 /* Change state to the final state this substate machine has run to completion */
449 sci_change_state(&iphy->sm, SCI_PHY_SUB_FINAL);
450
451 return SCI_SUCCESS;
452 }
453 case SCI_PHY_SUB_AWAIT_SATA_POWER: {
454 u32 scu_sas_pcfg_value;
455
456 /* Release the spinup hold state and reset the OOB state machine */
457 scu_sas_pcfg_value =
458 readl(&iphy->link_layer_registers->phy_configuration);
459 scu_sas_pcfg_value &=
460 ~(SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD) | SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE));
461 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
462 writel(scu_sas_pcfg_value,
463 &iphy->link_layer_registers->phy_configuration);
464
465 /* Now restart the OOB operation */
466 scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
467 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE);
468 writel(scu_sas_pcfg_value,
469 &iphy->link_layer_registers->phy_configuration);
470
471 /* Change state to the final state this substate machine has run to completion */
472 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_PHY_EN);
473
474 return SCI_SUCCESS;
475 }
476 default:
477 dev_dbg(sciphy_to_dev(iphy),
478 "%s: in wrong state: %d\n", __func__, state);
479 return SCI_FAILURE_INVALID_STATE;
480 }
481}
482
483static void sci_phy_start_sas_link_training(struct isci_phy *iphy)
484{
485 /* continue the link training for the phy as if it were a SAS PHY
486 * instead of a SATA PHY. This is done because the completion queue had a SAS
487 * PHY DETECTED event when the state machine was expecting a SATA PHY event.
488 */
489 u32 phy_control;
490
491 phy_control = readl(&iphy->link_layer_registers->phy_configuration);
492 phy_control |= SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD);
493 writel(phy_control,
494 &iphy->link_layer_registers->phy_configuration);
495
496 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SAS_SPEED_EN);
497
498 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_SAS;
499}
500
501static void sci_phy_start_sata_link_training(struct isci_phy *iphy)
502{
503 /* This method continues the link training for the phy as if it were a SATA PHY
504 * instead of a SAS PHY. This is done because the completion queue had a SATA
505 * SPINUP HOLD event when the state machine was expecting a SAS PHY event. none
506 */
507 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_POWER);
508
509 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_SATA;
510}
511
512/**
513 * sci_phy_complete_link_training - perform processing common to
514 * all protocols upon completion of link training.
515 * @sci_phy: This parameter specifies the phy object for which link training
516 * has completed.
517 * @max_link_rate: This parameter specifies the maximum link rate to be
518 * associated with this phy.
519 * @next_state: This parameter specifies the next state for the phy's starting
520 * sub-state machine.
521 *
522 */
523static void sci_phy_complete_link_training(struct isci_phy *iphy,
524 enum sas_linkrate max_link_rate,
525 u32 next_state)
526{
527 iphy->max_negotiated_speed = max_link_rate;
528
529 sci_change_state(&iphy->sm, next_state);
530}
531
532enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)
533{
534 enum sci_phy_states state = iphy->sm.current_state_id;
535
536 switch (state) {
537 case SCI_PHY_SUB_AWAIT_OSSP_EN:
538 switch (scu_get_event_code(event_code)) {
539 case SCU_EVENT_SAS_PHY_DETECTED:
540 sci_phy_start_sas_link_training(iphy);
541 iphy->is_in_link_training = true;
542 break;
543 case SCU_EVENT_SATA_SPINUP_HOLD:
544 sci_phy_start_sata_link_training(iphy);
545 iphy->is_in_link_training = true;
546 break;
547 default:
548 dev_dbg(sciphy_to_dev(iphy),
549 "%s: PHY starting substate machine received "
550 "unexpected event_code %x\n",
551 __func__,
552 event_code);
553 return SCI_FAILURE;
554 }
555 return SCI_SUCCESS;
556 case SCI_PHY_SUB_AWAIT_SAS_SPEED_EN:
557 switch (scu_get_event_code(event_code)) {
558 case SCU_EVENT_SAS_PHY_DETECTED:
559 /*
560 * Why is this being reported again by the controller?
561 * We would re-enter this state so just stay here */
562 break;
563 case SCU_EVENT_SAS_15:
564 case SCU_EVENT_SAS_15_SSC:
565 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_1_5_GBPS,
566 SCI_PHY_SUB_AWAIT_IAF_UF);
567 break;
568 case SCU_EVENT_SAS_30:
569 case SCU_EVENT_SAS_30_SSC:
570 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_3_0_GBPS,
571 SCI_PHY_SUB_AWAIT_IAF_UF);
572 break;
573 case SCU_EVENT_SAS_60:
574 case SCU_EVENT_SAS_60_SSC:
575 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_6_0_GBPS,
576 SCI_PHY_SUB_AWAIT_IAF_UF);
577 break;
578 case SCU_EVENT_SATA_SPINUP_HOLD:
579 /*
580 * We were doing SAS PHY link training and received a SATA PHY event
581 * continue OOB/SN as if this were a SATA PHY */
582 sci_phy_start_sata_link_training(iphy);
583 break;
584 case SCU_EVENT_LINK_FAILURE:
585 /* Link failure change state back to the starting state */
586 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
587 break;
588 default:
589 dev_warn(sciphy_to_dev(iphy),
590 "%s: PHY starting substate machine received "
591 "unexpected event_code %x\n",
592 __func__, event_code);
593
594 return SCI_FAILURE;
595 break;
596 }
597 return SCI_SUCCESS;
598 case SCI_PHY_SUB_AWAIT_IAF_UF:
599 switch (scu_get_event_code(event_code)) {
600 case SCU_EVENT_SAS_PHY_DETECTED:
601 /* Backup the state machine */
602 sci_phy_start_sas_link_training(iphy);
603 break;
604 case SCU_EVENT_SATA_SPINUP_HOLD:
605 /* We were doing SAS PHY link training and received a
606 * SATA PHY event continue OOB/SN as if this were a
607 * SATA PHY
608 */
609 sci_phy_start_sata_link_training(iphy);
610 break;
611 case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT:
612 case SCU_EVENT_LINK_FAILURE:
613 case SCU_EVENT_HARD_RESET_RECEIVED:
614 /* Start the oob/sn state machine over again */
615 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
616 break;
617 default:
618 dev_warn(sciphy_to_dev(iphy),
619 "%s: PHY starting substate machine received "
620 "unexpected event_code %x\n",
621 __func__, event_code);
622 return SCI_FAILURE;
623 }
624 return SCI_SUCCESS;
625 case SCI_PHY_SUB_AWAIT_SAS_POWER:
626 switch (scu_get_event_code(event_code)) {
627 case SCU_EVENT_LINK_FAILURE:
628 /* Link failure change state back to the starting state */
629 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
630 break;
631 default:
632 dev_warn(sciphy_to_dev(iphy),
633 "%s: PHY starting substate machine received unexpected "
634 "event_code %x\n",
635 __func__,
636 event_code);
637 return SCI_FAILURE;
638 }
639 return SCI_SUCCESS;
640 case SCI_PHY_SUB_AWAIT_SATA_POWER:
641 switch (scu_get_event_code(event_code)) {
642 case SCU_EVENT_LINK_FAILURE:
643 /* Link failure change state back to the starting state */
644 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
645 break;
646 case SCU_EVENT_SATA_SPINUP_HOLD:
647 /* These events are received every 10ms and are
648 * expected while in this state
649 */
650 break;
651
652 case SCU_EVENT_SAS_PHY_DETECTED:
653 /* There has been a change in the phy type before OOB/SN for the
654 * SATA finished start down the SAS link traning path.
655 */
656 sci_phy_start_sas_link_training(iphy);
657 break;
658
659 default:
660 dev_warn(sciphy_to_dev(iphy),
661 "%s: PHY starting substate machine received "
662 "unexpected event_code %x\n",
663 __func__, event_code);
664
665 return SCI_FAILURE;
666 }
667 return SCI_SUCCESS;
668 case SCI_PHY_SUB_AWAIT_SATA_PHY_EN:
669 switch (scu_get_event_code(event_code)) {
670 case SCU_EVENT_LINK_FAILURE:
671 /* Link failure change state back to the starting state */
672 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
673 break;
674 case SCU_EVENT_SATA_SPINUP_HOLD:
675 /* These events might be received since we dont know how many may be in
676 * the completion queue while waiting for power
677 */
678 break;
679 case SCU_EVENT_SATA_PHY_DETECTED:
680 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_SATA;
681
682 /* We have received the SATA PHY notification change state */
683 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN);
684 break;
685 case SCU_EVENT_SAS_PHY_DETECTED:
686 /* There has been a change in the phy type before OOB/SN for the
687 * SATA finished start down the SAS link traning path.
688 */
689 sci_phy_start_sas_link_training(iphy);
690 break;
691 default:
692 dev_warn(sciphy_to_dev(iphy),
693 "%s: PHY starting substate machine received "
694 "unexpected event_code %x\n",
695 __func__,
696 event_code);
697
698 return SCI_FAILURE;;
699 }
700 return SCI_SUCCESS;
701 case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN:
702 switch (scu_get_event_code(event_code)) {
703 case SCU_EVENT_SATA_PHY_DETECTED:
704 /*
705 * The hardware reports multiple SATA PHY detected events
706 * ignore the extras */
707 break;
708 case SCU_EVENT_SATA_15:
709 case SCU_EVENT_SATA_15_SSC:
710 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_1_5_GBPS,
711 SCI_PHY_SUB_AWAIT_SIG_FIS_UF);
712 break;
713 case SCU_EVENT_SATA_30:
714 case SCU_EVENT_SATA_30_SSC:
715 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_3_0_GBPS,
716 SCI_PHY_SUB_AWAIT_SIG_FIS_UF);
717 break;
718 case SCU_EVENT_SATA_60:
719 case SCU_EVENT_SATA_60_SSC:
720 sci_phy_complete_link_training(iphy, SAS_LINK_RATE_6_0_GBPS,
721 SCI_PHY_SUB_AWAIT_SIG_FIS_UF);
722 break;
723 case SCU_EVENT_LINK_FAILURE:
724 /* Link failure change state back to the starting state */
725 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
726 break;
727 case SCU_EVENT_SAS_PHY_DETECTED:
728 /*
729 * There has been a change in the phy type before OOB/SN for the
730 * SATA finished start down the SAS link traning path. */
731 sci_phy_start_sas_link_training(iphy);
732 break;
733 default:
734 dev_warn(sciphy_to_dev(iphy),
735 "%s: PHY starting substate machine received "
736 "unexpected event_code %x\n",
737 __func__, event_code);
738
739 return SCI_FAILURE;
740 }
741
742 return SCI_SUCCESS;
743 case SCI_PHY_SUB_AWAIT_SIG_FIS_UF:
744 switch (scu_get_event_code(event_code)) {
745 case SCU_EVENT_SATA_PHY_DETECTED:
746 /* Backup the state machine */
747 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN);
748 break;
749
750 case SCU_EVENT_LINK_FAILURE:
751 /* Link failure change state back to the starting state */
752 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
753 break;
754
755 default:
756 dev_warn(sciphy_to_dev(iphy),
757 "%s: PHY starting substate machine received "
758 "unexpected event_code %x\n",
759 __func__,
760 event_code);
761
762 return SCI_FAILURE;
763 }
764 return SCI_SUCCESS;
765 case SCI_PHY_READY:
766 switch (scu_get_event_code(event_code)) {
767 case SCU_EVENT_LINK_FAILURE:
768 /* Link failure change state back to the starting state */
769 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
770 break;
771 case SCU_EVENT_BROADCAST_CHANGE:
772 /* Broadcast change received. Notify the port. */
773 if (phy_get_non_dummy_port(iphy) != NULL)
774 sci_port_broadcast_change_received(iphy->owning_port, iphy);
775 else
776 iphy->bcn_received_while_port_unassigned = true;
777 break;
778 default:
779 dev_warn(sciphy_to_dev(iphy),
780 "%sP SCIC PHY 0x%p ready state machine received "
781 "unexpected event_code %x\n",
782 __func__, iphy, event_code);
783 return SCI_FAILURE_INVALID_STATE;
784 }
785 return SCI_SUCCESS;
786 case SCI_PHY_RESETTING:
787 switch (scu_get_event_code(event_code)) {
788 case SCU_EVENT_HARD_RESET_TRANSMITTED:
789 /* Link failure change state back to the starting state */
790 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
791 break;
792 default:
793 dev_warn(sciphy_to_dev(iphy),
794 "%s: SCIC PHY 0x%p resetting state machine received "
795 "unexpected event_code %x\n",
796 __func__, iphy, event_code);
797
798 return SCI_FAILURE_INVALID_STATE;
799 break;
800 }
801 return SCI_SUCCESS;
802 default:
803 dev_dbg(sciphy_to_dev(iphy),
804 "%s: in wrong state: %d\n", __func__, state);
805 return SCI_FAILURE_INVALID_STATE;
806 }
807}
808
809enum sci_status sci_phy_frame_handler(struct isci_phy *iphy, u32 frame_index)
810{
811 enum sci_phy_states state = iphy->sm.current_state_id;
812 struct isci_host *ihost = iphy->owning_port->owning_controller;
813 enum sci_status result;
814 unsigned long flags;
815
816 switch (state) {
817 case SCI_PHY_SUB_AWAIT_IAF_UF: {
818 u32 *frame_words;
819 struct sas_identify_frame iaf;
820
821 result = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
822 frame_index,
823 (void **)&frame_words);
824
825 if (result != SCI_SUCCESS)
826 return result;
827
828 sci_swab32_cpy(&iaf, frame_words, sizeof(iaf) / sizeof(u32));
829 if (iaf.frame_type == 0) {
830 u32 state;
831
832 spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags);
833 memcpy(&iphy->frame_rcvd.iaf, &iaf, sizeof(iaf));
834 spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags);
835 if (iaf.smp_tport) {
836 /* We got the IAF for an expander PHY go to the final
837 * state since there are no power requirements for
838 * expander phys.
839 */
840 state = SCI_PHY_SUB_FINAL;
841 } else {
842 /* We got the IAF we can now go to the await spinup
843 * semaphore state
844 */
845 state = SCI_PHY_SUB_AWAIT_SAS_POWER;
846 }
847 sci_change_state(&iphy->sm, state);
848 result = SCI_SUCCESS;
849 } else
850 dev_warn(sciphy_to_dev(iphy),
851 "%s: PHY starting substate machine received "
852 "unexpected frame id %x\n",
853 __func__, frame_index);
854
855 sci_controller_release_frame(ihost, frame_index);
856 return result;
857 }
858 case SCI_PHY_SUB_AWAIT_SIG_FIS_UF: {
859 struct dev_to_host_fis *frame_header;
860 u32 *fis_frame_data;
861
862 result = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
863 frame_index,
864 (void **)&frame_header);
865
866 if (result != SCI_SUCCESS)
867 return result;
868
869 if ((frame_header->fis_type == FIS_REGD2H) &&
870 !(frame_header->status & ATA_BUSY)) {
871 sci_unsolicited_frame_control_get_buffer(&ihost->uf_control,
872 frame_index,
873 (void **)&fis_frame_data);
874
875 spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags);
876 sci_controller_copy_sata_response(&iphy->frame_rcvd.fis,
877 frame_header,
878 fis_frame_data);
879 spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags);
880
881 /* got IAF we can now go to the await spinup semaphore state */
882 sci_change_state(&iphy->sm, SCI_PHY_SUB_FINAL);
883
884 result = SCI_SUCCESS;
885 } else
886 dev_warn(sciphy_to_dev(iphy),
887 "%s: PHY starting substate machine received "
888 "unexpected frame id %x\n",
889 __func__, frame_index);
890
891 /* Regardless of the result we are done with this frame with it */
892 sci_controller_release_frame(ihost, frame_index);
893
894 return result;
895 }
896 default:
897 dev_dbg(sciphy_to_dev(iphy),
898 "%s: in wrong state: %d\n", __func__, state);
899 return SCI_FAILURE_INVALID_STATE;
900 }
901
902}
903
904static void sci_phy_starting_initial_substate_enter(struct sci_base_state_machine *sm)
905{
906 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
907
908 /* This is just an temporary state go off to the starting state */
909 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_OSSP_EN);
910}
911
912static void sci_phy_starting_await_sas_power_substate_enter(struct sci_base_state_machine *sm)
913{
914 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
915 struct isci_host *ihost = iphy->owning_port->owning_controller;
916
917 sci_controller_power_control_queue_insert(ihost, iphy);
918}
919
920static void sci_phy_starting_await_sas_power_substate_exit(struct sci_base_state_machine *sm)
921{
922 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
923 struct isci_host *ihost = iphy->owning_port->owning_controller;
924
925 sci_controller_power_control_queue_remove(ihost, iphy);
926}
927
928static void sci_phy_starting_await_sata_power_substate_enter(struct sci_base_state_machine *sm)
929{
930 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
931 struct isci_host *ihost = iphy->owning_port->owning_controller;
932
933 sci_controller_power_control_queue_insert(ihost, iphy);
934}
935
936static void sci_phy_starting_await_sata_power_substate_exit(struct sci_base_state_machine *sm)
937{
938 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
939 struct isci_host *ihost = iphy->owning_port->owning_controller;
940
941 sci_controller_power_control_queue_remove(ihost, iphy);
942}
943
944static void sci_phy_starting_await_sata_phy_substate_enter(struct sci_base_state_machine *sm)
945{
946 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
947
948 sci_mod_timer(&iphy->sata_timer, SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT);
949}
950
951static void sci_phy_starting_await_sata_phy_substate_exit(struct sci_base_state_machine *sm)
952{
953 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
954
955 sci_del_timer(&iphy->sata_timer);
956}
957
958static void sci_phy_starting_await_sata_speed_substate_enter(struct sci_base_state_machine *sm)
959{
960 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
961
962 sci_mod_timer(&iphy->sata_timer, SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT);
963}
964
965static void sci_phy_starting_await_sata_speed_substate_exit(struct sci_base_state_machine *sm)
966{
967 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
968
969 sci_del_timer(&iphy->sata_timer);
970}
971
972static void sci_phy_starting_await_sig_fis_uf_substate_enter(struct sci_base_state_machine *sm)
973{
974 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
975
976 if (sci_port_link_detected(iphy->owning_port, iphy)) {
977
978 /*
979 * Clear the PE suspend condition so we can actually
980 * receive SIG FIS
981 * The hardware will not respond to the XRDY until the PE
982 * suspend condition is cleared.
983 */
984 sci_phy_resume(iphy);
985
986 sci_mod_timer(&iphy->sata_timer,
987 SCIC_SDS_SIGNATURE_FIS_TIMEOUT);
988 } else
989 iphy->is_in_link_training = false;
990}
991
992static void sci_phy_starting_await_sig_fis_uf_substate_exit(struct sci_base_state_machine *sm)
993{
994 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
995
996 sci_del_timer(&iphy->sata_timer);
997}
998
999static void sci_phy_starting_final_substate_enter(struct sci_base_state_machine *sm)
1000{
1001 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1002
1003 /* State machine has run to completion so exit out and change
1004 * the base state machine to the ready state
1005 */
1006 sci_change_state(&iphy->sm, SCI_PHY_READY);
1007}
1008
1009/**
1010 *
1011 * @sci_phy: This is the struct isci_phy object to stop.
1012 *
1013 * This method will stop the struct isci_phy object. This does not reset the
1014 * protocol engine it just suspends it and places it in a state where it will
1015 * not cause the end device to power up. none
1016 */
1017static void scu_link_layer_stop_protocol_engine(
1018 struct isci_phy *iphy)
1019{
1020 u32 scu_sas_pcfg_value;
1021 u32 enable_spinup_value;
1022
1023 /* Suspend the protocol engine and place it in a sata spinup hold state */
1024 scu_sas_pcfg_value =
1025 readl(&iphy->link_layer_registers->phy_configuration);
1026 scu_sas_pcfg_value |=
1027 (SCU_SAS_PCFG_GEN_BIT(OOB_RESET) |
1028 SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE) |
1029 SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD));
1030 writel(scu_sas_pcfg_value,
1031 &iphy->link_layer_registers->phy_configuration);
1032
1033 /* Disable the notify enable spinup primitives */
1034 enable_spinup_value = readl(&iphy->link_layer_registers->notify_enable_spinup_control);
1035 enable_spinup_value &= ~SCU_ENSPINUP_GEN_BIT(ENABLE);
1036 writel(enable_spinup_value, &iphy->link_layer_registers->notify_enable_spinup_control);
1037}
1038
1039/**
1040 *
1041 *
1042 * This method will start the OOB/SN state machine for this struct isci_phy object.
1043 */
1044static void scu_link_layer_start_oob(
1045 struct isci_phy *iphy)
1046{
1047 u32 scu_sas_pcfg_value;
1048
1049 scu_sas_pcfg_value =
1050 readl(&iphy->link_layer_registers->phy_configuration);
1051 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE);
1052 scu_sas_pcfg_value &=
1053 ~(SCU_SAS_PCFG_GEN_BIT(OOB_RESET) |
1054 SCU_SAS_PCFG_GEN_BIT(HARD_RESET));
1055 writel(scu_sas_pcfg_value,
1056 &iphy->link_layer_registers->phy_configuration);
1057}
1058
1059/**
1060 *
1061 *
1062 * This method will transmit a hard reset request on the specified phy. The SCU
1063 * hardware requires that we reset the OOB state machine and set the hard reset
1064 * bit in the phy configuration register. We then must start OOB over with the
1065 * hard reset bit set.
1066 */
1067static void scu_link_layer_tx_hard_reset(
1068 struct isci_phy *iphy)
1069{
1070 u32 phy_configuration_value;
1071
1072 /*
1073 * SAS Phys must wait for the HARD_RESET_TX event notification to transition
1074 * to the starting state. */
1075 phy_configuration_value =
1076 readl(&iphy->link_layer_registers->phy_configuration);
1077 phy_configuration_value |=
1078 (SCU_SAS_PCFG_GEN_BIT(HARD_RESET) |
1079 SCU_SAS_PCFG_GEN_BIT(OOB_RESET));
1080 writel(phy_configuration_value,
1081 &iphy->link_layer_registers->phy_configuration);
1082
1083 /* Now take the OOB state machine out of reset */
1084 phy_configuration_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE);
1085 phy_configuration_value &= ~SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
1086 writel(phy_configuration_value,
1087 &iphy->link_layer_registers->phy_configuration);
1088}
1089
1090static void sci_phy_stopped_state_enter(struct sci_base_state_machine *sm)
1091{
1092 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1093 struct isci_port *iport = iphy->owning_port;
1094 struct isci_host *ihost = iport->owning_controller;
1095
1096 /*
1097 * @todo We need to get to the controller to place this PE in a
1098 * reset state
1099 */
1100 sci_del_timer(&iphy->sata_timer);
1101
1102 scu_link_layer_stop_protocol_engine(iphy);
1103
1104 if (iphy->sm.previous_state_id != SCI_PHY_INITIAL)
1105 sci_controller_link_down(ihost, phy_get_non_dummy_port(iphy), iphy);
1106}
1107
1108static void sci_phy_starting_state_enter(struct sci_base_state_machine *sm)
1109{
1110 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1111 struct isci_port *iport = iphy->owning_port;
1112 struct isci_host *ihost = iport->owning_controller;
1113
1114 scu_link_layer_stop_protocol_engine(iphy);
1115 scu_link_layer_start_oob(iphy);
1116
1117 /* We don't know what kind of phy we are going to be just yet */
1118 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_UNKNOWN;
1119 iphy->bcn_received_while_port_unassigned = false;
1120
1121 if (iphy->sm.previous_state_id == SCI_PHY_READY)
1122 sci_controller_link_down(ihost, phy_get_non_dummy_port(iphy), iphy);
1123
1124 sci_change_state(&iphy->sm, SCI_PHY_SUB_INITIAL);
1125}
1126
1127static void sci_phy_ready_state_enter(struct sci_base_state_machine *sm)
1128{
1129 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1130 struct isci_port *iport = iphy->owning_port;
1131 struct isci_host *ihost = iport->owning_controller;
1132
1133 sci_controller_link_up(ihost, phy_get_non_dummy_port(iphy), iphy);
1134}
1135
1136static void sci_phy_ready_state_exit(struct sci_base_state_machine *sm)
1137{
1138 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1139
1140 sci_phy_suspend(iphy);
1141}
1142
1143static void sci_phy_resetting_state_enter(struct sci_base_state_machine *sm)
1144{
1145 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1146
1147 /* The phy is being reset, therefore deactivate it from the port. In
1148 * the resetting state we don't notify the user regarding link up and
1149 * link down notifications
1150 */
1151 sci_port_deactivate_phy(iphy->owning_port, iphy, false);
1152
1153 if (iphy->protocol == SCIC_SDS_PHY_PROTOCOL_SAS) {
1154 scu_link_layer_tx_hard_reset(iphy);
1155 } else {
1156 /* The SCU does not need to have a discrete reset state so
1157 * just go back to the starting state.
1158 */
1159 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
1160 }
1161}
1162
1163static const struct sci_base_state sci_phy_state_table[] = {
1164 [SCI_PHY_INITIAL] = { },
1165 [SCI_PHY_STOPPED] = {
1166 .enter_state = sci_phy_stopped_state_enter,
1167 },
1168 [SCI_PHY_STARTING] = {
1169 .enter_state = sci_phy_starting_state_enter,
1170 },
1171 [SCI_PHY_SUB_INITIAL] = {
1172 .enter_state = sci_phy_starting_initial_substate_enter,
1173 },
1174 [SCI_PHY_SUB_AWAIT_OSSP_EN] = { },
1175 [SCI_PHY_SUB_AWAIT_SAS_SPEED_EN] = { },
1176 [SCI_PHY_SUB_AWAIT_IAF_UF] = { },
1177 [SCI_PHY_SUB_AWAIT_SAS_POWER] = {
1178 .enter_state = sci_phy_starting_await_sas_power_substate_enter,
1179 .exit_state = sci_phy_starting_await_sas_power_substate_exit,
1180 },
1181 [SCI_PHY_SUB_AWAIT_SATA_POWER] = {
1182 .enter_state = sci_phy_starting_await_sata_power_substate_enter,
1183 .exit_state = sci_phy_starting_await_sata_power_substate_exit
1184 },
1185 [SCI_PHY_SUB_AWAIT_SATA_PHY_EN] = {
1186 .enter_state = sci_phy_starting_await_sata_phy_substate_enter,
1187 .exit_state = sci_phy_starting_await_sata_phy_substate_exit
1188 },
1189 [SCI_PHY_SUB_AWAIT_SATA_SPEED_EN] = {
1190 .enter_state = sci_phy_starting_await_sata_speed_substate_enter,
1191 .exit_state = sci_phy_starting_await_sata_speed_substate_exit
1192 },
1193 [SCI_PHY_SUB_AWAIT_SIG_FIS_UF] = {
1194 .enter_state = sci_phy_starting_await_sig_fis_uf_substate_enter,
1195 .exit_state = sci_phy_starting_await_sig_fis_uf_substate_exit
1196 },
1197 [SCI_PHY_SUB_FINAL] = {
1198 .enter_state = sci_phy_starting_final_substate_enter,
1199 },
1200 [SCI_PHY_READY] = {
1201 .enter_state = sci_phy_ready_state_enter,
1202 .exit_state = sci_phy_ready_state_exit,
1203 },
1204 [SCI_PHY_RESETTING] = {
1205 .enter_state = sci_phy_resetting_state_enter,
1206 },
1207 [SCI_PHY_FINAL] = { },
1208};
1209
1210void sci_phy_construct(struct isci_phy *iphy,
1211 struct isci_port *iport, u8 phy_index)
1212{
1213 sci_init_sm(&iphy->sm, sci_phy_state_table, SCI_PHY_INITIAL);
1214
1215 /* Copy the rest of the input data to our locals */
1216 iphy->owning_port = iport;
1217 iphy->phy_index = phy_index;
1218 iphy->bcn_received_while_port_unassigned = false;
1219 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_UNKNOWN;
1220 iphy->link_layer_registers = NULL;
1221 iphy->max_negotiated_speed = SAS_LINK_RATE_UNKNOWN;
1222
1223 /* Create the SIGNATURE FIS Timeout timer for this phy */
1224 sci_init_timer(&iphy->sata_timer, phy_sata_timeout);
1225}
1226
1227void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index)
1228{
1229 struct sci_oem_params *oem = &ihost->oem_parameters;
1230 u64 sci_sas_addr;
1231 __be64 sas_addr;
1232
1233 sci_sas_addr = oem->phys[index].sas_address.high;
1234 sci_sas_addr <<= 32;
1235 sci_sas_addr |= oem->phys[index].sas_address.low;
1236 sas_addr = cpu_to_be64(sci_sas_addr);
1237 memcpy(iphy->sas_addr, &sas_addr, sizeof(sas_addr));
1238
1239 iphy->isci_port = NULL;
1240 iphy->sas_phy.enabled = 0;
1241 iphy->sas_phy.id = index;
1242 iphy->sas_phy.sas_addr = &iphy->sas_addr[0];
1243 iphy->sas_phy.frame_rcvd = (u8 *)&iphy->frame_rcvd;
1244 iphy->sas_phy.ha = &ihost->sas_ha;
1245 iphy->sas_phy.lldd_phy = iphy;
1246 iphy->sas_phy.enabled = 1;
1247 iphy->sas_phy.class = SAS;
1248 iphy->sas_phy.iproto = SAS_PROTOCOL_ALL;
1249 iphy->sas_phy.tproto = 0;
1250 iphy->sas_phy.type = PHY_TYPE_PHYSICAL;
1251 iphy->sas_phy.role = PHY_ROLE_INITIATOR;
1252 iphy->sas_phy.oob_mode = OOB_NOT_CONNECTED;
1253 iphy->sas_phy.linkrate = SAS_LINK_RATE_UNKNOWN;
1254 memset(&iphy->frame_rcvd, 0, sizeof(iphy->frame_rcvd));
1255}
1256
1257
1258/**
1259 * isci_phy_control() - This function is one of the SAS Domain Template
1260 * functions. This is a phy management function.
1261 * @phy: This parameter specifies the sphy being controlled.
1262 * @func: This parameter specifies the phy control function being invoked.
1263 * @buf: This parameter is specific to the phy function being invoked.
1264 *
1265 * status, zero indicates success.
1266 */
1267int isci_phy_control(struct asd_sas_phy *sas_phy,
1268 enum phy_func func,
1269 void *buf)
1270{
1271 int ret = 0;
1272 struct isci_phy *iphy = sas_phy->lldd_phy;
1273 struct isci_port *iport = iphy->isci_port;
1274 struct isci_host *ihost = sas_phy->ha->lldd_ha;
1275 unsigned long flags;
1276
1277 dev_dbg(&ihost->pdev->dev,
1278 "%s: phy %p; func %d; buf %p; isci phy %p, port %p\n",
1279 __func__, sas_phy, func, buf, iphy, iport);
1280
1281 switch (func) {
1282 case PHY_FUNC_DISABLE:
1283 spin_lock_irqsave(&ihost->scic_lock, flags);
1284 sci_phy_stop(iphy);
1285 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1286 break;
1287
1288 case PHY_FUNC_LINK_RESET:
1289 spin_lock_irqsave(&ihost->scic_lock, flags);
1290 sci_phy_stop(iphy);
1291 sci_phy_start(iphy);
1292 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1293 break;
1294
1295 case PHY_FUNC_HARD_RESET:
1296 if (!iport)
1297 return -ENODEV;
1298
1299 /* Perform the port reset. */
1300 ret = isci_port_perform_hard_reset(ihost, iport, iphy);
1301
1302 break;
1303
1304 default:
1305 dev_dbg(&ihost->pdev->dev,
1306 "%s: phy %p; func %d NOT IMPLEMENTED!\n",
1307 __func__, sas_phy, func);
1308 ret = -ENOSYS;
1309 break;
1310 }
1311 return ret;
1312}
diff --git a/drivers/scsi/isci/phy.h b/drivers/scsi/isci/phy.h
new file mode 100644
index 000000000000..67699c8e321c
--- /dev/null
+++ b/drivers/scsi/isci/phy.h
@@ -0,0 +1,504 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55#ifndef _ISCI_PHY_H_
56#define _ISCI_PHY_H_
57
58#include <scsi/sas.h>
59#include <scsi/libsas.h>
60#include "isci.h"
61#include "sas.h"
62
63/* This is the timeout value for the SATA phy to wait for a SIGNATURE FIS
64 * before restarting the starting state machine. Technically, the old parallel
65 * ATA specification required up to 30 seconds for a device to issue its
66 * signature FIS as a result of a soft reset. Now we see that devices respond
67 * generally within 15 seconds, but we'll use 25 for now.
68 */
69#define SCIC_SDS_SIGNATURE_FIS_TIMEOUT 25000
70
71/* This is the timeout for the SATA OOB/SN because the hardware does not
72 * recognize a hot plug after OOB signal but before the SN signals. We need to
73 * make sure after a hotplug timeout if we have not received the speed event
74 * notification from the hardware that we restart the hardware OOB state
75 * machine.
76 */
77#define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT 250
78
79enum sci_phy_protocol {
80 SCIC_SDS_PHY_PROTOCOL_UNKNOWN,
81 SCIC_SDS_PHY_PROTOCOL_SAS,
82 SCIC_SDS_PHY_PROTOCOL_SATA,
83 SCIC_SDS_MAX_PHY_PROTOCOLS
84};
85
86/**
87 * isci_phy - hba local phy infrastructure
88 * @sm:
89 * @protocol: attached device protocol
90 * @phy_index: physical index relative to the controller (0-3)
91 * @bcn_received_while_port_unassigned: bcn to report after port association
92 * @sata_timer: timeout SATA signature FIS arrival
93 */
94struct isci_phy {
95 struct sci_base_state_machine sm;
96 struct isci_port *owning_port;
97 enum sas_linkrate max_negotiated_speed;
98 enum sci_phy_protocol protocol;
99 u8 phy_index;
100 bool bcn_received_while_port_unassigned;
101 bool is_in_link_training;
102 struct sci_timer sata_timer;
103 struct scu_transport_layer_registers __iomem *transport_layer_registers;
104 struct scu_link_layer_registers __iomem *link_layer_registers;
105 struct asd_sas_phy sas_phy;
106 struct isci_port *isci_port;
107 u8 sas_addr[SAS_ADDR_SIZE];
108 union {
109 struct sas_identify_frame iaf;
110 struct dev_to_host_fis fis;
111 } frame_rcvd;
112};
113
114static inline struct isci_phy *to_iphy(struct asd_sas_phy *sas_phy)
115{
116 struct isci_phy *iphy = container_of(sas_phy, typeof(*iphy), sas_phy);
117
118 return iphy;
119}
120
121struct sci_phy_cap {
122 union {
123 struct {
124 /*
125 * The SAS specification indicates the start bit shall
126 * always be set to
127 * 1. This implementation will have the start bit set
128 * to 0 if the PHY CAPABILITIES were either not
129 * received or speed negotiation failed.
130 */
131 u8 start:1;
132 u8 tx_ssc_type:1;
133 u8 res1:2;
134 u8 req_logical_linkrate:4;
135
136 u32 gen1_no_ssc:1;
137 u32 gen1_ssc:1;
138 u32 gen2_no_ssc:1;
139 u32 gen2_ssc:1;
140 u32 gen3_no_ssc:1;
141 u32 gen3_ssc:1;
142 u32 res2:17;
143 u32 parity:1;
144 };
145 u32 all;
146 };
147} __packed;
148
149/* this data structure reflects the link layer transmit identification reg */
150struct sci_phy_proto {
151 union {
152 struct {
153 u16 _r_a:1;
154 u16 smp_iport:1;
155 u16 stp_iport:1;
156 u16 ssp_iport:1;
157 u16 _r_b:4;
158 u16 _r_c:1;
159 u16 smp_tport:1;
160 u16 stp_tport:1;
161 u16 ssp_tport:1;
162 u16 _r_d:4;
163 };
164 u16 all;
165 };
166} __packed;
167
168
169/**
170 * struct sci_phy_properties - This structure defines the properties common to
171 * all phys that can be retrieved.
172 *
173 *
174 */
175struct sci_phy_properties {
176 /**
177 * This field specifies the port that currently contains the
178 * supplied phy. This field may be set to NULL
179 * if the phy is not currently contained in a port.
180 */
181 struct isci_port *iport;
182
183 /**
184 * This field specifies the link rate at which the phy is
185 * currently operating.
186 */
187 enum sas_linkrate negotiated_link_rate;
188
189 /**
190 * This field specifies the index of the phy in relation to other
191 * phys within the controller. This index is zero relative.
192 */
193 u8 index;
194};
195
196/**
197 * struct sci_sas_phy_properties - This structure defines the properties,
198 * specific to a SAS phy, that can be retrieved.
199 *
200 *
201 */
202struct sci_sas_phy_properties {
203 /**
204 * This field delineates the Identify Address Frame received
205 * from the remote end point.
206 */
207 struct sas_identify_frame rcvd_iaf;
208
209 /**
210 * This field delineates the Phy capabilities structure received
211 * from the remote end point.
212 */
213 struct sci_phy_cap rcvd_cap;
214
215};
216
217/**
218 * struct sci_sata_phy_properties - This structure defines the properties,
219 * specific to a SATA phy, that can be retrieved.
220 *
221 *
222 */
223struct sci_sata_phy_properties {
224 /**
225 * This field delineates the signature FIS received from the
226 * attached target.
227 */
228 struct dev_to_host_fis signature_fis;
229
230 /**
231 * This field specifies to the user if a port selector is connected
232 * on the specified phy.
233 */
234 bool is_port_selector_present;
235
236};
237
238/**
239 * enum sci_phy_counter_id - This enumeration depicts the various pieces of
240 * optional information that can be retrieved for a specific phy.
241 *
242 *
243 */
244enum sci_phy_counter_id {
245 /**
246 * This PHY information field tracks the number of frames received.
247 */
248 SCIC_PHY_COUNTER_RECEIVED_FRAME,
249
250 /**
251 * This PHY information field tracks the number of frames transmitted.
252 */
253 SCIC_PHY_COUNTER_TRANSMITTED_FRAME,
254
255 /**
256 * This PHY information field tracks the number of DWORDs received.
257 */
258 SCIC_PHY_COUNTER_RECEIVED_FRAME_WORD,
259
260 /**
261 * This PHY information field tracks the number of DWORDs transmitted.
262 */
263 SCIC_PHY_COUNTER_TRANSMITTED_FRAME_DWORD,
264
265 /**
266 * This PHY information field tracks the number of times DWORD
267 * synchronization was lost.
268 */
269 SCIC_PHY_COUNTER_LOSS_OF_SYNC_ERROR,
270
271 /**
272 * This PHY information field tracks the number of received DWORDs with
273 * running disparity errors.
274 */
275 SCIC_PHY_COUNTER_RECEIVED_DISPARITY_ERROR,
276
277 /**
278 * This PHY information field tracks the number of received frames with a
279 * CRC error (not including short or truncated frames).
280 */
281 SCIC_PHY_COUNTER_RECEIVED_FRAME_CRC_ERROR,
282
283 /**
284 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
285 * primitives received.
286 */
287 SCIC_PHY_COUNTER_RECEIVED_DONE_ACK_NAK_TIMEOUT,
288
289 /**
290 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
291 * primitives transmitted.
292 */
293 SCIC_PHY_COUNTER_TRANSMITTED_DONE_ACK_NAK_TIMEOUT,
294
295 /**
296 * This PHY information field tracks the number of times the inactivity
297 * timer for connections on the phy has been utilized.
298 */
299 SCIC_PHY_COUNTER_INACTIVITY_TIMER_EXPIRED,
300
301 /**
302 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
303 * primitives received.
304 */
305 SCIC_PHY_COUNTER_RECEIVED_DONE_CREDIT_TIMEOUT,
306
307 /**
308 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
309 * primitives transmitted.
310 */
311 SCIC_PHY_COUNTER_TRANSMITTED_DONE_CREDIT_TIMEOUT,
312
313 /**
314 * This PHY information field tracks the number of CREDIT BLOCKED
315 * primitives received.
316 * @note Depending on remote device implementation, credit blocks
317 * may occur regularly.
318 */
319 SCIC_PHY_COUNTER_RECEIVED_CREDIT_BLOCKED,
320
321 /**
322 * This PHY information field contains the number of short frames
323 * received. A short frame is simply a frame smaller then what is
324 * allowed by either the SAS or SATA specification.
325 */
326 SCIC_PHY_COUNTER_RECEIVED_SHORT_FRAME,
327
328 /**
329 * This PHY information field contains the number of frames received after
330 * credit has been exhausted.
331 */
332 SCIC_PHY_COUNTER_RECEIVED_FRAME_WITHOUT_CREDIT,
333
334 /**
335 * This PHY information field contains the number of frames received after
336 * a DONE has been received.
337 */
338 SCIC_PHY_COUNTER_RECEIVED_FRAME_AFTER_DONE,
339
340 /**
341 * This PHY information field contains the number of times the phy
342 * failed to achieve DWORD synchronization during speed negotiation.
343 */
344 SCIC_PHY_COUNTER_SN_DWORD_SYNC_ERROR
345};
346
347enum sci_phy_states {
348 /**
349 * Simply the initial state for the base domain state machine.
350 */
351 SCI_PHY_INITIAL,
352
353 /**
354 * This state indicates that the phy has successfully been stopped.
355 * In this state no new IO operations are permitted on this phy.
356 * This state is entered from the INITIAL state.
357 * This state is entered from the STARTING state.
358 * This state is entered from the READY state.
359 * This state is entered from the RESETTING state.
360 */
361 SCI_PHY_STOPPED,
362
363 /**
364 * This state indicates that the phy is in the process of becomming
365 * ready. In this state no new IO operations are permitted on this phy.
366 * This state is entered from the STOPPED state.
367 * This state is entered from the READY state.
368 * This state is entered from the RESETTING state.
369 */
370 SCI_PHY_STARTING,
371
372 /**
373 * Initial state
374 */
375 SCI_PHY_SUB_INITIAL,
376
377 /**
378 * Wait state for the hardware OSSP event type notification
379 */
380 SCI_PHY_SUB_AWAIT_OSSP_EN,
381
382 /**
383 * Wait state for the PHY speed notification
384 */
385 SCI_PHY_SUB_AWAIT_SAS_SPEED_EN,
386
387 /**
388 * Wait state for the IAF Unsolicited frame notification
389 */
390 SCI_PHY_SUB_AWAIT_IAF_UF,
391
392 /**
393 * Wait state for the request to consume power
394 */
395 SCI_PHY_SUB_AWAIT_SAS_POWER,
396
397 /**
398 * Wait state for request to consume power
399 */
400 SCI_PHY_SUB_AWAIT_SATA_POWER,
401
402 /**
403 * Wait state for the SATA PHY notification
404 */
405 SCI_PHY_SUB_AWAIT_SATA_PHY_EN,
406
407 /**
408 * Wait for the SATA PHY speed notification
409 */
410 SCI_PHY_SUB_AWAIT_SATA_SPEED_EN,
411
412 /**
413 * Wait state for the SIGNATURE FIS unsolicited frame notification
414 */
415 SCI_PHY_SUB_AWAIT_SIG_FIS_UF,
416
417 /**
418 * Exit state for this state machine
419 */
420 SCI_PHY_SUB_FINAL,
421
422 /**
423 * This state indicates the the phy is now ready. Thus, the user
424 * is able to perform IO operations utilizing this phy as long as it
425 * is currently part of a valid port.
426 * This state is entered from the STARTING state.
427 */
428 SCI_PHY_READY,
429
430 /**
431 * This state indicates that the phy is in the process of being reset.
432 * In this state no new IO operations are permitted on this phy.
433 * This state is entered from the READY state.
434 */
435 SCI_PHY_RESETTING,
436
437 /**
438 * Simply the final state for the base phy state machine.
439 */
440 SCI_PHY_FINAL,
441};
442
443void sci_phy_construct(
444 struct isci_phy *iphy,
445 struct isci_port *iport,
446 u8 phy_index);
447
448struct isci_port *phy_get_non_dummy_port(struct isci_phy *iphy);
449
450void sci_phy_set_port(
451 struct isci_phy *iphy,
452 struct isci_port *iport);
453
454enum sci_status sci_phy_initialize(
455 struct isci_phy *iphy,
456 struct scu_transport_layer_registers __iomem *transport_layer_registers,
457 struct scu_link_layer_registers __iomem *link_layer_registers);
458
459enum sci_status sci_phy_start(
460 struct isci_phy *iphy);
461
462enum sci_status sci_phy_stop(
463 struct isci_phy *iphy);
464
465enum sci_status sci_phy_reset(
466 struct isci_phy *iphy);
467
468void sci_phy_resume(
469 struct isci_phy *iphy);
470
471void sci_phy_setup_transport(
472 struct isci_phy *iphy,
473 u32 device_id);
474
475enum sci_status sci_phy_event_handler(
476 struct isci_phy *iphy,
477 u32 event_code);
478
479enum sci_status sci_phy_frame_handler(
480 struct isci_phy *iphy,
481 u32 frame_index);
482
483enum sci_status sci_phy_consume_power_handler(
484 struct isci_phy *iphy);
485
486void sci_phy_get_sas_address(
487 struct isci_phy *iphy,
488 struct sci_sas_address *sas_address);
489
490void sci_phy_get_attached_sas_address(
491 struct isci_phy *iphy,
492 struct sci_sas_address *sas_address);
493
494struct sci_phy_proto;
495void sci_phy_get_protocols(
496 struct isci_phy *iphy,
497 struct sci_phy_proto *protocols);
498enum sas_linkrate sci_phy_linkrate(struct isci_phy *iphy);
499
500struct isci_host;
501void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index);
502int isci_phy_control(struct asd_sas_phy *phy, enum phy_func func, void *buf);
503
504#endif /* !defined(_ISCI_PHY_H_) */
diff --git a/drivers/scsi/isci/port.c b/drivers/scsi/isci/port.c
new file mode 100644
index 000000000000..8f6f9b77e41a
--- /dev/null
+++ b/drivers/scsi/isci/port.c
@@ -0,0 +1,1757 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include "isci.h"
57#include "port.h"
58#include "request.h"
59
60#define SCIC_SDS_PORT_HARD_RESET_TIMEOUT (1000)
61#define SCU_DUMMY_INDEX (0xFFFF)
62
63static void isci_port_change_state(struct isci_port *iport, enum isci_status status)
64{
65 unsigned long flags;
66
67 dev_dbg(&iport->isci_host->pdev->dev,
68 "%s: iport = %p, state = 0x%x\n",
69 __func__, iport, status);
70
71 /* XXX pointless lock */
72 spin_lock_irqsave(&iport->state_lock, flags);
73 iport->status = status;
74 spin_unlock_irqrestore(&iport->state_lock, flags);
75}
76
77static void sci_port_get_protocols(struct isci_port *iport, struct sci_phy_proto *proto)
78{
79 u8 index;
80
81 proto->all = 0;
82 for (index = 0; index < SCI_MAX_PHYS; index++) {
83 struct isci_phy *iphy = iport->phy_table[index];
84
85 if (!iphy)
86 continue;
87 sci_phy_get_protocols(iphy, proto);
88 }
89}
90
91static u32 sci_port_get_phys(struct isci_port *iport)
92{
93 u32 index;
94 u32 mask;
95
96 mask = 0;
97 for (index = 0; index < SCI_MAX_PHYS; index++)
98 if (iport->phy_table[index])
99 mask |= (1 << index);
100
101 return mask;
102}
103
104/**
105 * sci_port_get_properties() - This method simply returns the properties
106 * regarding the port, such as: physical index, protocols, sas address, etc.
107 * @port: this parameter specifies the port for which to retrieve the physical
108 * index.
109 * @properties: This parameter specifies the properties structure into which to
110 * copy the requested information.
111 *
112 * Indicate if the user specified a valid port. SCI_SUCCESS This value is
113 * returned if the specified port was valid. SCI_FAILURE_INVALID_PORT This
114 * value is returned if the specified port is not valid. When this value is
115 * returned, no data is copied to the properties output parameter.
116 */
117static enum sci_status sci_port_get_properties(struct isci_port *iport,
118 struct sci_port_properties *prop)
119{
120 if (!iport || iport->logical_port_index == SCIC_SDS_DUMMY_PORT)
121 return SCI_FAILURE_INVALID_PORT;
122
123 prop->index = iport->logical_port_index;
124 prop->phy_mask = sci_port_get_phys(iport);
125 sci_port_get_sas_address(iport, &prop->local.sas_address);
126 sci_port_get_protocols(iport, &prop->local.protocols);
127 sci_port_get_attached_sas_address(iport, &prop->remote.sas_address);
128
129 return SCI_SUCCESS;
130}
131
132static void sci_port_bcn_enable(struct isci_port *iport)
133{
134 struct isci_phy *iphy;
135 u32 val;
136 int i;
137
138 for (i = 0; i < ARRAY_SIZE(iport->phy_table); i++) {
139 iphy = iport->phy_table[i];
140 if (!iphy)
141 continue;
142 val = readl(&iphy->link_layer_registers->link_layer_control);
143 /* clear the bit by writing 1. */
144 writel(val, &iphy->link_layer_registers->link_layer_control);
145 }
146}
147
148/* called under sci_lock to stabilize phy:port associations */
149void isci_port_bcn_enable(struct isci_host *ihost, struct isci_port *iport)
150{
151 int i;
152
153 clear_bit(IPORT_BCN_BLOCKED, &iport->flags);
154 wake_up(&ihost->eventq);
155
156 if (!test_and_clear_bit(IPORT_BCN_PENDING, &iport->flags))
157 return;
158
159 for (i = 0; i < ARRAY_SIZE(iport->phy_table); i++) {
160 struct isci_phy *iphy = iport->phy_table[i];
161
162 if (!iphy)
163 continue;
164
165 ihost->sas_ha.notify_port_event(&iphy->sas_phy,
166 PORTE_BROADCAST_RCVD);
167 break;
168 }
169}
170
171static void isci_port_bc_change_received(struct isci_host *ihost,
172 struct isci_port *iport,
173 struct isci_phy *iphy)
174{
175 if (iport && test_bit(IPORT_BCN_BLOCKED, &iport->flags)) {
176 dev_dbg(&ihost->pdev->dev,
177 "%s: disabled BCN; isci_phy = %p, sas_phy = %p\n",
178 __func__, iphy, &iphy->sas_phy);
179 set_bit(IPORT_BCN_PENDING, &iport->flags);
180 atomic_inc(&iport->event);
181 wake_up(&ihost->eventq);
182 } else {
183 dev_dbg(&ihost->pdev->dev,
184 "%s: isci_phy = %p, sas_phy = %p\n",
185 __func__, iphy, &iphy->sas_phy);
186
187 ihost->sas_ha.notify_port_event(&iphy->sas_phy,
188 PORTE_BROADCAST_RCVD);
189 }
190 sci_port_bcn_enable(iport);
191}
192
193static void isci_port_link_up(struct isci_host *isci_host,
194 struct isci_port *iport,
195 struct isci_phy *iphy)
196{
197 unsigned long flags;
198 struct sci_port_properties properties;
199 unsigned long success = true;
200
201 BUG_ON(iphy->isci_port != NULL);
202
203 iphy->isci_port = iport;
204
205 dev_dbg(&isci_host->pdev->dev,
206 "%s: isci_port = %p\n",
207 __func__, iport);
208
209 spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags);
210
211 isci_port_change_state(iphy->isci_port, isci_starting);
212
213 sci_port_get_properties(iport, &properties);
214
215 if (iphy->protocol == SCIC_SDS_PHY_PROTOCOL_SATA) {
216 u64 attached_sas_address;
217
218 iphy->sas_phy.oob_mode = SATA_OOB_MODE;
219 iphy->sas_phy.frame_rcvd_size = sizeof(struct dev_to_host_fis);
220
221 /*
222 * For direct-attached SATA devices, the SCI core will
223 * automagically assign a SAS address to the end device
224 * for the purpose of creating a port. This SAS address
225 * will not be the same as assigned to the PHY and needs
226 * to be obtained from struct sci_port_properties properties.
227 */
228 attached_sas_address = properties.remote.sas_address.high;
229 attached_sas_address <<= 32;
230 attached_sas_address |= properties.remote.sas_address.low;
231 swab64s(&attached_sas_address);
232
233 memcpy(&iphy->sas_phy.attached_sas_addr,
234 &attached_sas_address, sizeof(attached_sas_address));
235 } else if (iphy->protocol == SCIC_SDS_PHY_PROTOCOL_SAS) {
236 iphy->sas_phy.oob_mode = SAS_OOB_MODE;
237 iphy->sas_phy.frame_rcvd_size = sizeof(struct sas_identify_frame);
238
239 /* Copy the attached SAS address from the IAF */
240 memcpy(iphy->sas_phy.attached_sas_addr,
241 iphy->frame_rcvd.iaf.sas_addr, SAS_ADDR_SIZE);
242 } else {
243 dev_err(&isci_host->pdev->dev, "%s: unkown target\n", __func__);
244 success = false;
245 }
246
247 iphy->sas_phy.phy->negotiated_linkrate = sci_phy_linkrate(iphy);
248
249 spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags);
250
251 /* Notify libsas that we have an address frame, if indeed
252 * we've found an SSP, SMP, or STP target */
253 if (success)
254 isci_host->sas_ha.notify_port_event(&iphy->sas_phy,
255 PORTE_BYTES_DMAED);
256}
257
258
259/**
260 * isci_port_link_down() - This function is called by the sci core when a link
261 * becomes inactive.
262 * @isci_host: This parameter specifies the isci host object.
263 * @phy: This parameter specifies the isci phy with the active link.
264 * @port: This parameter specifies the isci port with the active link.
265 *
266 */
267static void isci_port_link_down(struct isci_host *isci_host,
268 struct isci_phy *isci_phy,
269 struct isci_port *isci_port)
270{
271 struct isci_remote_device *isci_device;
272
273 dev_dbg(&isci_host->pdev->dev,
274 "%s: isci_port = %p\n", __func__, isci_port);
275
276 if (isci_port) {
277
278 /* check to see if this is the last phy on this port. */
279 if (isci_phy->sas_phy.port &&
280 isci_phy->sas_phy.port->num_phys == 1) {
281 atomic_inc(&isci_port->event);
282 isci_port_bcn_enable(isci_host, isci_port);
283
284 /* change the state for all devices on this port. The
285 * next task sent to this device will be returned as
286 * SAS_TASK_UNDELIVERED, and the scsi mid layer will
287 * remove the target
288 */
289 list_for_each_entry(isci_device,
290 &isci_port->remote_dev_list,
291 node) {
292 dev_dbg(&isci_host->pdev->dev,
293 "%s: isci_device = %p\n",
294 __func__, isci_device);
295 set_bit(IDEV_GONE, &isci_device->flags);
296 }
297 }
298 isci_port_change_state(isci_port, isci_stopping);
299 }
300
301 /* Notify libsas of the borken link, this will trigger calls to our
302 * isci_port_deformed and isci_dev_gone functions.
303 */
304 sas_phy_disconnected(&isci_phy->sas_phy);
305 isci_host->sas_ha.notify_phy_event(&isci_phy->sas_phy,
306 PHYE_LOSS_OF_SIGNAL);
307
308 isci_phy->isci_port = NULL;
309
310 dev_dbg(&isci_host->pdev->dev,
311 "%s: isci_port = %p - Done\n", __func__, isci_port);
312}
313
314
315/**
316 * isci_port_ready() - This function is called by the sci core when a link
317 * becomes ready.
318 * @isci_host: This parameter specifies the isci host object.
319 * @port: This parameter specifies the sci port with the active link.
320 *
321 */
322static void isci_port_ready(struct isci_host *isci_host, struct isci_port *isci_port)
323{
324 dev_dbg(&isci_host->pdev->dev,
325 "%s: isci_port = %p\n", __func__, isci_port);
326
327 complete_all(&isci_port->start_complete);
328 isci_port_change_state(isci_port, isci_ready);
329 return;
330}
331
332/**
333 * isci_port_not_ready() - This function is called by the sci core when a link
334 * is not ready. All remote devices on this link will be removed if they are
335 * in the stopping state.
336 * @isci_host: This parameter specifies the isci host object.
337 * @port: This parameter specifies the sci port with the active link.
338 *
339 */
340static void isci_port_not_ready(struct isci_host *isci_host, struct isci_port *isci_port)
341{
342 dev_dbg(&isci_host->pdev->dev,
343 "%s: isci_port = %p\n", __func__, isci_port);
344}
345
346static void isci_port_stop_complete(struct isci_host *ihost,
347 struct isci_port *iport,
348 enum sci_status completion_status)
349{
350 dev_dbg(&ihost->pdev->dev, "Port stop complete\n");
351}
352
353/**
354 * isci_port_hard_reset_complete() - This function is called by the sci core
355 * when the hard reset complete notification has been received.
356 * @port: This parameter specifies the sci port with the active link.
357 * @completion_status: This parameter specifies the core status for the reset
358 * process.
359 *
360 */
361static void isci_port_hard_reset_complete(struct isci_port *isci_port,
362 enum sci_status completion_status)
363{
364 dev_dbg(&isci_port->isci_host->pdev->dev,
365 "%s: isci_port = %p, completion_status=%x\n",
366 __func__, isci_port, completion_status);
367
368 /* Save the status of the hard reset from the port. */
369 isci_port->hard_reset_status = completion_status;
370
371 complete_all(&isci_port->hard_reset_complete);
372}
373
374/* This method will return a true value if the specified phy can be assigned to
375 * this port The following is a list of phys for each port that are allowed: -
376 * Port 0 - 3 2 1 0 - Port 1 - 1 - Port 2 - 3 2 - Port 3 - 3 This method
377 * doesn't preclude all configurations. It merely ensures that a phy is part
378 * of the allowable set of phy identifiers for that port. For example, one
379 * could assign phy 3 to port 0 and no other phys. Please refer to
380 * sci_port_is_phy_mask_valid() for information regarding whether the
381 * phy_mask for a port can be supported. bool true if this is a valid phy
382 * assignment for the port false if this is not a valid phy assignment for the
383 * port
384 */
385bool sci_port_is_valid_phy_assignment(struct isci_port *iport, u32 phy_index)
386{
387 struct isci_host *ihost = iport->owning_controller;
388 struct sci_user_parameters *user = &ihost->user_parameters;
389
390 /* Initialize to invalid value. */
391 u32 existing_phy_index = SCI_MAX_PHYS;
392 u32 index;
393
394 if ((iport->physical_port_index == 1) && (phy_index != 1))
395 return false;
396
397 if (iport->physical_port_index == 3 && phy_index != 3)
398 return false;
399
400 if (iport->physical_port_index == 2 &&
401 (phy_index == 0 || phy_index == 1))
402 return false;
403
404 for (index = 0; index < SCI_MAX_PHYS; index++)
405 if (iport->phy_table[index] && index != phy_index)
406 existing_phy_index = index;
407
408 /* Ensure that all of the phys in the port are capable of
409 * operating at the same maximum link rate.
410 */
411 if (existing_phy_index < SCI_MAX_PHYS &&
412 user->phys[phy_index].max_speed_generation !=
413 user->phys[existing_phy_index].max_speed_generation)
414 return false;
415
416 return true;
417}
418
419/**
420 *
421 * @sci_port: This is the port object for which to determine if the phy mask
422 * can be supported.
423 *
424 * This method will return a true value if the port's phy mask can be supported
425 * by the SCU. The following is a list of valid PHY mask configurations for
426 * each port: - Port 0 - [[3 2] 1] 0 - Port 1 - [1] - Port 2 - [[3] 2]
427 * - Port 3 - [3] This method returns a boolean indication specifying if the
428 * phy mask can be supported. true if this is a valid phy assignment for the
429 * port false if this is not a valid phy assignment for the port
430 */
431static bool sci_port_is_phy_mask_valid(
432 struct isci_port *iport,
433 u32 phy_mask)
434{
435 if (iport->physical_port_index == 0) {
436 if (((phy_mask & 0x0F) == 0x0F)
437 || ((phy_mask & 0x03) == 0x03)
438 || ((phy_mask & 0x01) == 0x01)
439 || (phy_mask == 0))
440 return true;
441 } else if (iport->physical_port_index == 1) {
442 if (((phy_mask & 0x02) == 0x02)
443 || (phy_mask == 0))
444 return true;
445 } else if (iport->physical_port_index == 2) {
446 if (((phy_mask & 0x0C) == 0x0C)
447 || ((phy_mask & 0x04) == 0x04)
448 || (phy_mask == 0))
449 return true;
450 } else if (iport->physical_port_index == 3) {
451 if (((phy_mask & 0x08) == 0x08)
452 || (phy_mask == 0))
453 return true;
454 }
455
456 return false;
457}
458
459/*
460 * This method retrieves a currently active (i.e. connected) phy contained in
461 * the port. Currently, the lowest order phy that is connected is returned.
462 * This method returns a pointer to a SCIS_SDS_PHY object. NULL This value is
463 * returned if there are no currently active (i.e. connected to a remote end
464 * point) phys contained in the port. All other values specify a struct sci_phy
465 * object that is active in the port.
466 */
467static struct isci_phy *sci_port_get_a_connected_phy(struct isci_port *iport)
468{
469 u32 index;
470 struct isci_phy *iphy;
471
472 for (index = 0; index < SCI_MAX_PHYS; index++) {
473 /* Ensure that the phy is both part of the port and currently
474 * connected to the remote end-point.
475 */
476 iphy = iport->phy_table[index];
477 if (iphy && sci_port_active_phy(iport, iphy))
478 return iphy;
479 }
480
481 return NULL;
482}
483
484static enum sci_status sci_port_set_phy(struct isci_port *iport, struct isci_phy *iphy)
485{
486 /* Check to see if we can add this phy to a port
487 * that means that the phy is not part of a port and that the port does
488 * not already have a phy assinged to the phy index.
489 */
490 if (!iport->phy_table[iphy->phy_index] &&
491 !phy_get_non_dummy_port(iphy) &&
492 sci_port_is_valid_phy_assignment(iport, iphy->phy_index)) {
493 /* Phy is being added in the stopped state so we are in MPC mode
494 * make logical port index = physical port index
495 */
496 iport->logical_port_index = iport->physical_port_index;
497 iport->phy_table[iphy->phy_index] = iphy;
498 sci_phy_set_port(iphy, iport);
499
500 return SCI_SUCCESS;
501 }
502
503 return SCI_FAILURE;
504}
505
506static enum sci_status sci_port_clear_phy(struct isci_port *iport, struct isci_phy *iphy)
507{
508 /* Make sure that this phy is part of this port */
509 if (iport->phy_table[iphy->phy_index] == iphy &&
510 phy_get_non_dummy_port(iphy) == iport) {
511 struct isci_host *ihost = iport->owning_controller;
512
513 /* Yep it is assigned to this port so remove it */
514 sci_phy_set_port(iphy, &ihost->ports[SCI_MAX_PORTS]);
515 iport->phy_table[iphy->phy_index] = NULL;
516 return SCI_SUCCESS;
517 }
518
519 return SCI_FAILURE;
520}
521
522void sci_port_get_sas_address(struct isci_port *iport, struct sci_sas_address *sas)
523{
524 u32 index;
525
526 sas->high = 0;
527 sas->low = 0;
528 for (index = 0; index < SCI_MAX_PHYS; index++)
529 if (iport->phy_table[index])
530 sci_phy_get_sas_address(iport->phy_table[index], sas);
531}
532
533void sci_port_get_attached_sas_address(struct isci_port *iport, struct sci_sas_address *sas)
534{
535 struct isci_phy *iphy;
536
537 /*
538 * Ensure that the phy is both part of the port and currently
539 * connected to the remote end-point.
540 */
541 iphy = sci_port_get_a_connected_phy(iport);
542 if (iphy) {
543 if (iphy->protocol != SCIC_SDS_PHY_PROTOCOL_SATA) {
544 sci_phy_get_attached_sas_address(iphy, sas);
545 } else {
546 sci_phy_get_sas_address(iphy, sas);
547 sas->low += iphy->phy_index;
548 }
549 } else {
550 sas->high = 0;
551 sas->low = 0;
552 }
553}
554
555/**
556 * sci_port_construct_dummy_rnc() - create dummy rnc for si workaround
557 *
558 * @sci_port: logical port on which we need to create the remote node context
559 * @rni: remote node index for this remote node context.
560 *
561 * This routine will construct a dummy remote node context data structure
562 * This structure will be posted to the hardware to work around a scheduler
563 * error in the hardware.
564 */
565static void sci_port_construct_dummy_rnc(struct isci_port *iport, u16 rni)
566{
567 union scu_remote_node_context *rnc;
568
569 rnc = &iport->owning_controller->remote_node_context_table[rni];
570
571 memset(rnc, 0, sizeof(union scu_remote_node_context));
572
573 rnc->ssp.remote_sas_address_hi = 0;
574 rnc->ssp.remote_sas_address_lo = 0;
575
576 rnc->ssp.remote_node_index = rni;
577 rnc->ssp.remote_node_port_width = 1;
578 rnc->ssp.logical_port_index = iport->physical_port_index;
579
580 rnc->ssp.nexus_loss_timer_enable = false;
581 rnc->ssp.check_bit = false;
582 rnc->ssp.is_valid = true;
583 rnc->ssp.is_remote_node_context = true;
584 rnc->ssp.function_number = 0;
585 rnc->ssp.arbitration_wait_time = 0;
586}
587
588/*
589 * construct a dummy task context data structure. This
590 * structure will be posted to the hardwre to work around a scheduler error
591 * in the hardware.
592 */
593static void sci_port_construct_dummy_task(struct isci_port *iport, u16 tag)
594{
595 struct isci_host *ihost = iport->owning_controller;
596 struct scu_task_context *task_context;
597
598 task_context = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
599 memset(task_context, 0, sizeof(struct scu_task_context));
600
601 task_context->initiator_request = 1;
602 task_context->connection_rate = 1;
603 task_context->logical_port_index = iport->physical_port_index;
604 task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SSP;
605 task_context->task_index = ISCI_TAG_TCI(tag);
606 task_context->valid = SCU_TASK_CONTEXT_VALID;
607 task_context->context_type = SCU_TASK_CONTEXT_TYPE;
608 task_context->remote_node_index = iport->reserved_rni;
609 task_context->do_not_dma_ssp_good_response = 1;
610 task_context->task_phase = 0x01;
611}
612
613static void sci_port_destroy_dummy_resources(struct isci_port *iport)
614{
615 struct isci_host *ihost = iport->owning_controller;
616
617 if (iport->reserved_tag != SCI_CONTROLLER_INVALID_IO_TAG)
618 isci_free_tag(ihost, iport->reserved_tag);
619
620 if (iport->reserved_rni != SCU_DUMMY_INDEX)
621 sci_remote_node_table_release_remote_node_index(&ihost->available_remote_nodes,
622 1, iport->reserved_rni);
623
624 iport->reserved_rni = SCU_DUMMY_INDEX;
625 iport->reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;
626}
627
628void sci_port_setup_transports(struct isci_port *iport, u32 device_id)
629{
630 u8 index;
631
632 for (index = 0; index < SCI_MAX_PHYS; index++) {
633 if (iport->active_phy_mask & (1 << index))
634 sci_phy_setup_transport(iport->phy_table[index], device_id);
635 }
636}
637
638static void sci_port_activate_phy(struct isci_port *iport, struct isci_phy *iphy,
639 bool do_notify_user)
640{
641 struct isci_host *ihost = iport->owning_controller;
642
643 if (iphy->protocol != SCIC_SDS_PHY_PROTOCOL_SATA)
644 sci_phy_resume(iphy);
645
646 iport->active_phy_mask |= 1 << iphy->phy_index;
647
648 sci_controller_clear_invalid_phy(ihost, iphy);
649
650 if (do_notify_user == true)
651 isci_port_link_up(ihost, iport, iphy);
652}
653
654void sci_port_deactivate_phy(struct isci_port *iport, struct isci_phy *iphy,
655 bool do_notify_user)
656{
657 struct isci_host *ihost = iport->owning_controller;
658
659 iport->active_phy_mask &= ~(1 << iphy->phy_index);
660
661 iphy->max_negotiated_speed = SAS_LINK_RATE_UNKNOWN;
662
663 /* Re-assign the phy back to the LP as if it were a narrow port */
664 writel(iphy->phy_index,
665 &iport->port_pe_configuration_register[iphy->phy_index]);
666
667 if (do_notify_user == true)
668 isci_port_link_down(ihost, iphy, iport);
669}
670
671static void sci_port_invalid_link_up(struct isci_port *iport, struct isci_phy *iphy)
672{
673 struct isci_host *ihost = iport->owning_controller;
674
675 /*
676 * Check to see if we have alreay reported this link as bad and if
677 * not go ahead and tell the SCI_USER that we have discovered an
678 * invalid link.
679 */
680 if ((ihost->invalid_phy_mask & (1 << iphy->phy_index)) == 0) {
681 ihost->invalid_phy_mask |= 1 << iphy->phy_index;
682 dev_warn(&ihost->pdev->dev, "Invalid link up!\n");
683 }
684}
685
686static bool is_port_ready_state(enum sci_port_states state)
687{
688 switch (state) {
689 case SCI_PORT_READY:
690 case SCI_PORT_SUB_WAITING:
691 case SCI_PORT_SUB_OPERATIONAL:
692 case SCI_PORT_SUB_CONFIGURING:
693 return true;
694 default:
695 return false;
696 }
697}
698
699/* flag dummy rnc hanling when exiting a ready state */
700static void port_state_machine_change(struct isci_port *iport,
701 enum sci_port_states state)
702{
703 struct sci_base_state_machine *sm = &iport->sm;
704 enum sci_port_states old_state = sm->current_state_id;
705
706 if (is_port_ready_state(old_state) && !is_port_ready_state(state))
707 iport->ready_exit = true;
708
709 sci_change_state(sm, state);
710 iport->ready_exit = false;
711}
712
713/**
714 * sci_port_general_link_up_handler - phy can be assigned to port?
715 * @sci_port: sci_port object for which has a phy that has gone link up.
716 * @sci_phy: This is the struct isci_phy object that has gone link up.
717 * @do_notify_user: This parameter specifies whether to inform the user (via
718 * sci_port_link_up()) as to the fact that a new phy as become ready.
719 *
720 * Determine if this phy can be assigned to this
721 * port . If the phy is not a valid PHY for
722 * this port then the function will notify the user. A PHY can only be
723 * part of a port if it's attached SAS ADDRESS is the same as all other PHYs in
724 * the same port. none
725 */
726static void sci_port_general_link_up_handler(struct isci_port *iport,
727 struct isci_phy *iphy,
728 bool do_notify_user)
729{
730 struct sci_sas_address port_sas_address;
731 struct sci_sas_address phy_sas_address;
732
733 sci_port_get_attached_sas_address(iport, &port_sas_address);
734 sci_phy_get_attached_sas_address(iphy, &phy_sas_address);
735
736 /* If the SAS address of the new phy matches the SAS address of
737 * other phys in the port OR this is the first phy in the port,
738 * then activate the phy and allow it to be used for operations
739 * in this port.
740 */
741 if ((phy_sas_address.high == port_sas_address.high &&
742 phy_sas_address.low == port_sas_address.low) ||
743 iport->active_phy_mask == 0) {
744 struct sci_base_state_machine *sm = &iport->sm;
745
746 sci_port_activate_phy(iport, iphy, do_notify_user);
747 if (sm->current_state_id == SCI_PORT_RESETTING)
748 port_state_machine_change(iport, SCI_PORT_READY);
749 } else
750 sci_port_invalid_link_up(iport, iphy);
751}
752
753
754
755/**
756 * This method returns false if the port only has a single phy object assigned.
757 * If there are no phys or more than one phy then the method will return
758 * true.
759 * @sci_port: The port for which the wide port condition is to be checked.
760 *
761 * bool true Is returned if this is a wide ported port. false Is returned if
762 * this is a narrow port.
763 */
764static bool sci_port_is_wide(struct isci_port *iport)
765{
766 u32 index;
767 u32 phy_count = 0;
768
769 for (index = 0; index < SCI_MAX_PHYS; index++) {
770 if (iport->phy_table[index] != NULL) {
771 phy_count++;
772 }
773 }
774
775 return phy_count != 1;
776}
777
778/**
779 * This method is called by the PHY object when the link is detected. if the
780 * port wants the PHY to continue on to the link up state then the port
781 * layer must return true. If the port object returns false the phy object
782 * must halt its attempt to go link up.
783 * @sci_port: The port associated with the phy object.
784 * @sci_phy: The phy object that is trying to go link up.
785 *
786 * true if the phy object can continue to the link up condition. true Is
787 * returned if this phy can continue to the ready state. false Is returned if
788 * can not continue on to the ready state. This notification is in place for
789 * wide ports and direct attached phys. Since there are no wide ported SATA
790 * devices this could become an invalid port configuration.
791 */
792bool sci_port_link_detected(
793 struct isci_port *iport,
794 struct isci_phy *iphy)
795{
796 if ((iport->logical_port_index != SCIC_SDS_DUMMY_PORT) &&
797 (iphy->protocol == SCIC_SDS_PHY_PROTOCOL_SATA) &&
798 sci_port_is_wide(iport)) {
799 sci_port_invalid_link_up(iport, iphy);
800
801 return false;
802 }
803
804 return true;
805}
806
807static void port_timeout(unsigned long data)
808{
809 struct sci_timer *tmr = (struct sci_timer *)data;
810 struct isci_port *iport = container_of(tmr, typeof(*iport), timer);
811 struct isci_host *ihost = iport->owning_controller;
812 unsigned long flags;
813 u32 current_state;
814
815 spin_lock_irqsave(&ihost->scic_lock, flags);
816
817 if (tmr->cancel)
818 goto done;
819
820 current_state = iport->sm.current_state_id;
821
822 if (current_state == SCI_PORT_RESETTING) {
823 /* if the port is still in the resetting state then the timeout
824 * fired before the reset completed.
825 */
826 port_state_machine_change(iport, SCI_PORT_FAILED);
827 } else if (current_state == SCI_PORT_STOPPED) {
828 /* if the port is stopped then the start request failed In this
829 * case stay in the stopped state.
830 */
831 dev_err(sciport_to_dev(iport),
832 "%s: SCIC Port 0x%p failed to stop before tiemout.\n",
833 __func__,
834 iport);
835 } else if (current_state == SCI_PORT_STOPPING) {
836 /* if the port is still stopping then the stop has not completed */
837 isci_port_stop_complete(iport->owning_controller,
838 iport,
839 SCI_FAILURE_TIMEOUT);
840 } else {
841 /* The port is in the ready state and we have a timer
842 * reporting a timeout this should not happen.
843 */
844 dev_err(sciport_to_dev(iport),
845 "%s: SCIC Port 0x%p is processing a timeout operation "
846 "in state %d.\n", __func__, iport, current_state);
847 }
848
849done:
850 spin_unlock_irqrestore(&ihost->scic_lock, flags);
851}
852
853/* --------------------------------------------------------------------------- */
854
855/**
856 * This function updates the hardwares VIIT entry for this port.
857 *
858 *
859 */
860static void sci_port_update_viit_entry(struct isci_port *iport)
861{
862 struct sci_sas_address sas_address;
863
864 sci_port_get_sas_address(iport, &sas_address);
865
866 writel(sas_address.high,
867 &iport->viit_registers->initiator_sas_address_hi);
868 writel(sas_address.low,
869 &iport->viit_registers->initiator_sas_address_lo);
870
871 /* This value get cleared just in case its not already cleared */
872 writel(0, &iport->viit_registers->reserved);
873
874 /* We are required to update the status register last */
875 writel(SCU_VIIT_ENTRY_ID_VIIT |
876 SCU_VIIT_IPPT_INITIATOR |
877 ((1 << iport->physical_port_index) << SCU_VIIT_ENTRY_LPVIE_SHIFT) |
878 SCU_VIIT_STATUS_ALL_VALID,
879 &iport->viit_registers->status);
880}
881
882enum sas_linkrate sci_port_get_max_allowed_speed(struct isci_port *iport)
883{
884 u16 index;
885 struct isci_phy *iphy;
886 enum sas_linkrate max_allowed_speed = SAS_LINK_RATE_6_0_GBPS;
887
888 /*
889 * Loop through all of the phys in this port and find the phy with the
890 * lowest maximum link rate. */
891 for (index = 0; index < SCI_MAX_PHYS; index++) {
892 iphy = iport->phy_table[index];
893 if (iphy && sci_port_active_phy(iport, iphy) &&
894 iphy->max_negotiated_speed < max_allowed_speed)
895 max_allowed_speed = iphy->max_negotiated_speed;
896 }
897
898 return max_allowed_speed;
899}
900
901static void sci_port_suspend_port_task_scheduler(struct isci_port *iport)
902{
903 u32 pts_control_value;
904
905 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
906 pts_control_value |= SCU_PTSxCR_GEN_BIT(SUSPEND);
907 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
908}
909
910/**
911 * sci_port_post_dummy_request() - post dummy/workaround request
912 * @sci_port: port to post task
913 *
914 * Prevent the hardware scheduler from posting new requests to the front
915 * of the scheduler queue causing a starvation problem for currently
916 * ongoing requests.
917 *
918 */
919static void sci_port_post_dummy_request(struct isci_port *iport)
920{
921 struct isci_host *ihost = iport->owning_controller;
922 u16 tag = iport->reserved_tag;
923 struct scu_task_context *tc;
924 u32 command;
925
926 tc = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
927 tc->abort = 0;
928
929 command = SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC |
930 iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT |
931 ISCI_TAG_TCI(tag);
932
933 sci_controller_post_request(ihost, command);
934}
935
936/**
937 * This routine will abort the dummy request. This will alow the hardware to
938 * power down parts of the silicon to save power.
939 *
940 * @sci_port: The port on which the task must be aborted.
941 *
942 */
943static void sci_port_abort_dummy_request(struct isci_port *iport)
944{
945 struct isci_host *ihost = iport->owning_controller;
946 u16 tag = iport->reserved_tag;
947 struct scu_task_context *tc;
948 u32 command;
949
950 tc = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
951 tc->abort = 1;
952
953 command = SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT |
954 iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT |
955 ISCI_TAG_TCI(tag);
956
957 sci_controller_post_request(ihost, command);
958}
959
960/**
961 *
962 * @sci_port: This is the struct isci_port object to resume.
963 *
964 * This method will resume the port task scheduler for this port object. none
965 */
966static void
967sci_port_resume_port_task_scheduler(struct isci_port *iport)
968{
969 u32 pts_control_value;
970
971 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
972 pts_control_value &= ~SCU_PTSxCR_GEN_BIT(SUSPEND);
973 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
974}
975
976static void sci_port_ready_substate_waiting_enter(struct sci_base_state_machine *sm)
977{
978 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
979
980 sci_port_suspend_port_task_scheduler(iport);
981
982 iport->not_ready_reason = SCIC_PORT_NOT_READY_NO_ACTIVE_PHYS;
983
984 if (iport->active_phy_mask != 0) {
985 /* At least one of the phys on the port is ready */
986 port_state_machine_change(iport,
987 SCI_PORT_SUB_OPERATIONAL);
988 }
989}
990
991static void sci_port_ready_substate_operational_enter(struct sci_base_state_machine *sm)
992{
993 u32 index;
994 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
995 struct isci_host *ihost = iport->owning_controller;
996
997 isci_port_ready(ihost, iport);
998
999 for (index = 0; index < SCI_MAX_PHYS; index++) {
1000 if (iport->phy_table[index]) {
1001 writel(iport->physical_port_index,
1002 &iport->port_pe_configuration_register[
1003 iport->phy_table[index]->phy_index]);
1004 }
1005 }
1006
1007 sci_port_update_viit_entry(iport);
1008
1009 sci_port_resume_port_task_scheduler(iport);
1010
1011 /*
1012 * Post the dummy task for the port so the hardware can schedule
1013 * io correctly
1014 */
1015 sci_port_post_dummy_request(iport);
1016}
1017
1018static void sci_port_invalidate_dummy_remote_node(struct isci_port *iport)
1019{
1020 struct isci_host *ihost = iport->owning_controller;
1021 u8 phys_index = iport->physical_port_index;
1022 union scu_remote_node_context *rnc;
1023 u16 rni = iport->reserved_rni;
1024 u32 command;
1025
1026 rnc = &ihost->remote_node_context_table[rni];
1027
1028 rnc->ssp.is_valid = false;
1029
1030 /* ensure the preceding tc abort request has reached the
1031 * controller and give it ample time to act before posting the rnc
1032 * invalidate
1033 */
1034 readl(&ihost->smu_registers->interrupt_status); /* flush */
1035 udelay(10);
1036
1037 command = SCU_CONTEXT_COMMAND_POST_RNC_INVALIDATE |
1038 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1039
1040 sci_controller_post_request(ihost, command);
1041}
1042
1043/**
1044 *
1045 * @object: This is the object which is cast to a struct isci_port object.
1046 *
1047 * This method will perform the actions required by the struct isci_port on
1048 * exiting the SCI_PORT_SUB_OPERATIONAL. This function reports
1049 * the port not ready and suspends the port task scheduler. none
1050 */
1051static void sci_port_ready_substate_operational_exit(struct sci_base_state_machine *sm)
1052{
1053 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1054 struct isci_host *ihost = iport->owning_controller;
1055
1056 /*
1057 * Kill the dummy task for this port if it has not yet posted
1058 * the hardware will treat this as a NOP and just return abort
1059 * complete.
1060 */
1061 sci_port_abort_dummy_request(iport);
1062
1063 isci_port_not_ready(ihost, iport);
1064
1065 if (iport->ready_exit)
1066 sci_port_invalidate_dummy_remote_node(iport);
1067}
1068
1069static void sci_port_ready_substate_configuring_enter(struct sci_base_state_machine *sm)
1070{
1071 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1072 struct isci_host *ihost = iport->owning_controller;
1073
1074 if (iport->active_phy_mask == 0) {
1075 isci_port_not_ready(ihost, iport);
1076
1077 port_state_machine_change(iport,
1078 SCI_PORT_SUB_WAITING);
1079 } else if (iport->started_request_count == 0)
1080 port_state_machine_change(iport,
1081 SCI_PORT_SUB_OPERATIONAL);
1082}
1083
1084static void sci_port_ready_substate_configuring_exit(struct sci_base_state_machine *sm)
1085{
1086 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1087
1088 sci_port_suspend_port_task_scheduler(iport);
1089 if (iport->ready_exit)
1090 sci_port_invalidate_dummy_remote_node(iport);
1091}
1092
1093enum sci_status sci_port_start(struct isci_port *iport)
1094{
1095 struct isci_host *ihost = iport->owning_controller;
1096 enum sci_status status = SCI_SUCCESS;
1097 enum sci_port_states state;
1098 u32 phy_mask;
1099
1100 state = iport->sm.current_state_id;
1101 if (state != SCI_PORT_STOPPED) {
1102 dev_warn(sciport_to_dev(iport),
1103 "%s: in wrong state: %d\n", __func__, state);
1104 return SCI_FAILURE_INVALID_STATE;
1105 }
1106
1107 if (iport->assigned_device_count > 0) {
1108 /* TODO This is a start failure operation because
1109 * there are still devices assigned to this port.
1110 * There must be no devices assigned to a port on a
1111 * start operation.
1112 */
1113 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
1114 }
1115
1116 if (iport->reserved_rni == SCU_DUMMY_INDEX) {
1117 u16 rni = sci_remote_node_table_allocate_remote_node(
1118 &ihost->available_remote_nodes, 1);
1119
1120 if (rni != SCU_DUMMY_INDEX)
1121 sci_port_construct_dummy_rnc(iport, rni);
1122 else
1123 status = SCI_FAILURE_INSUFFICIENT_RESOURCES;
1124 iport->reserved_rni = rni;
1125 }
1126
1127 if (iport->reserved_tag == SCI_CONTROLLER_INVALID_IO_TAG) {
1128 u16 tag;
1129
1130 tag = isci_alloc_tag(ihost);
1131 if (tag == SCI_CONTROLLER_INVALID_IO_TAG)
1132 status = SCI_FAILURE_INSUFFICIENT_RESOURCES;
1133 else
1134 sci_port_construct_dummy_task(iport, tag);
1135 iport->reserved_tag = tag;
1136 }
1137
1138 if (status == SCI_SUCCESS) {
1139 phy_mask = sci_port_get_phys(iport);
1140
1141 /*
1142 * There are one or more phys assigned to this port. Make sure
1143 * the port's phy mask is in fact legal and supported by the
1144 * silicon.
1145 */
1146 if (sci_port_is_phy_mask_valid(iport, phy_mask) == true) {
1147 port_state_machine_change(iport,
1148 SCI_PORT_READY);
1149
1150 return SCI_SUCCESS;
1151 }
1152 status = SCI_FAILURE;
1153 }
1154
1155 if (status != SCI_SUCCESS)
1156 sci_port_destroy_dummy_resources(iport);
1157
1158 return status;
1159}
1160
1161enum sci_status sci_port_stop(struct isci_port *iport)
1162{
1163 enum sci_port_states state;
1164
1165 state = iport->sm.current_state_id;
1166 switch (state) {
1167 case SCI_PORT_STOPPED:
1168 return SCI_SUCCESS;
1169 case SCI_PORT_SUB_WAITING:
1170 case SCI_PORT_SUB_OPERATIONAL:
1171 case SCI_PORT_SUB_CONFIGURING:
1172 case SCI_PORT_RESETTING:
1173 port_state_machine_change(iport,
1174 SCI_PORT_STOPPING);
1175 return SCI_SUCCESS;
1176 default:
1177 dev_warn(sciport_to_dev(iport),
1178 "%s: in wrong state: %d\n", __func__, state);
1179 return SCI_FAILURE_INVALID_STATE;
1180 }
1181}
1182
1183static enum sci_status sci_port_hard_reset(struct isci_port *iport, u32 timeout)
1184{
1185 enum sci_status status = SCI_FAILURE_INVALID_PHY;
1186 struct isci_phy *iphy = NULL;
1187 enum sci_port_states state;
1188 u32 phy_index;
1189
1190 state = iport->sm.current_state_id;
1191 if (state != SCI_PORT_SUB_OPERATIONAL) {
1192 dev_warn(sciport_to_dev(iport),
1193 "%s: in wrong state: %d\n", __func__, state);
1194 return SCI_FAILURE_INVALID_STATE;
1195 }
1196
1197 /* Select a phy on which we can send the hard reset request. */
1198 for (phy_index = 0; phy_index < SCI_MAX_PHYS && !iphy; phy_index++) {
1199 iphy = iport->phy_table[phy_index];
1200 if (iphy && !sci_port_active_phy(iport, iphy)) {
1201 /*
1202 * We found a phy but it is not ready select
1203 * different phy
1204 */
1205 iphy = NULL;
1206 }
1207 }
1208
1209 /* If we have a phy then go ahead and start the reset procedure */
1210 if (!iphy)
1211 return status;
1212 status = sci_phy_reset(iphy);
1213
1214 if (status != SCI_SUCCESS)
1215 return status;
1216
1217 sci_mod_timer(&iport->timer, timeout);
1218 iport->not_ready_reason = SCIC_PORT_NOT_READY_HARD_RESET_REQUESTED;
1219
1220 port_state_machine_change(iport, SCI_PORT_RESETTING);
1221 return SCI_SUCCESS;
1222}
1223
1224/**
1225 * sci_port_add_phy() -
1226 * @sci_port: This parameter specifies the port in which the phy will be added.
1227 * @sci_phy: This parameter is the phy which is to be added to the port.
1228 *
1229 * This method will add a PHY to the selected port. This method returns an
1230 * enum sci_status. SCI_SUCCESS the phy has been added to the port. Any other
1231 * status is a failure to add the phy to the port.
1232 */
1233enum sci_status sci_port_add_phy(struct isci_port *iport,
1234 struct isci_phy *iphy)
1235{
1236 enum sci_status status;
1237 enum sci_port_states state;
1238
1239 state = iport->sm.current_state_id;
1240 switch (state) {
1241 case SCI_PORT_STOPPED: {
1242 struct sci_sas_address port_sas_address;
1243
1244 /* Read the port assigned SAS Address if there is one */
1245 sci_port_get_sas_address(iport, &port_sas_address);
1246
1247 if (port_sas_address.high != 0 && port_sas_address.low != 0) {
1248 struct sci_sas_address phy_sas_address;
1249
1250 /* Make sure that the PHY SAS Address matches the SAS Address
1251 * for this port
1252 */
1253 sci_phy_get_sas_address(iphy, &phy_sas_address);
1254
1255 if (port_sas_address.high != phy_sas_address.high ||
1256 port_sas_address.low != phy_sas_address.low)
1257 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
1258 }
1259 return sci_port_set_phy(iport, iphy);
1260 }
1261 case SCI_PORT_SUB_WAITING:
1262 case SCI_PORT_SUB_OPERATIONAL:
1263 status = sci_port_set_phy(iport, iphy);
1264
1265 if (status != SCI_SUCCESS)
1266 return status;
1267
1268 sci_port_general_link_up_handler(iport, iphy, true);
1269 iport->not_ready_reason = SCIC_PORT_NOT_READY_RECONFIGURING;
1270 port_state_machine_change(iport, SCI_PORT_SUB_CONFIGURING);
1271
1272 return status;
1273 case SCI_PORT_SUB_CONFIGURING:
1274 status = sci_port_set_phy(iport, iphy);
1275
1276 if (status != SCI_SUCCESS)
1277 return status;
1278 sci_port_general_link_up_handler(iport, iphy, true);
1279
1280 /* Re-enter the configuring state since this may be the last phy in
1281 * the port.
1282 */
1283 port_state_machine_change(iport,
1284 SCI_PORT_SUB_CONFIGURING);
1285 return SCI_SUCCESS;
1286 default:
1287 dev_warn(sciport_to_dev(iport),
1288 "%s: in wrong state: %d\n", __func__, state);
1289 return SCI_FAILURE_INVALID_STATE;
1290 }
1291}
1292
1293/**
1294 * sci_port_remove_phy() -
1295 * @sci_port: This parameter specifies the port in which the phy will be added.
1296 * @sci_phy: This parameter is the phy which is to be added to the port.
1297 *
1298 * This method will remove the PHY from the selected PORT. This method returns
1299 * an enum sci_status. SCI_SUCCESS the phy has been removed from the port. Any
1300 * other status is a failure to add the phy to the port.
1301 */
1302enum sci_status sci_port_remove_phy(struct isci_port *iport,
1303 struct isci_phy *iphy)
1304{
1305 enum sci_status status;
1306 enum sci_port_states state;
1307
1308 state = iport->sm.current_state_id;
1309
1310 switch (state) {
1311 case SCI_PORT_STOPPED:
1312 return sci_port_clear_phy(iport, iphy);
1313 case SCI_PORT_SUB_OPERATIONAL:
1314 status = sci_port_clear_phy(iport, iphy);
1315 if (status != SCI_SUCCESS)
1316 return status;
1317
1318 sci_port_deactivate_phy(iport, iphy, true);
1319 iport->not_ready_reason = SCIC_PORT_NOT_READY_RECONFIGURING;
1320 port_state_machine_change(iport,
1321 SCI_PORT_SUB_CONFIGURING);
1322 return SCI_SUCCESS;
1323 case SCI_PORT_SUB_CONFIGURING:
1324 status = sci_port_clear_phy(iport, iphy);
1325
1326 if (status != SCI_SUCCESS)
1327 return status;
1328 sci_port_deactivate_phy(iport, iphy, true);
1329
1330 /* Re-enter the configuring state since this may be the last phy in
1331 * the port
1332 */
1333 port_state_machine_change(iport,
1334 SCI_PORT_SUB_CONFIGURING);
1335 return SCI_SUCCESS;
1336 default:
1337 dev_warn(sciport_to_dev(iport),
1338 "%s: in wrong state: %d\n", __func__, state);
1339 return SCI_FAILURE_INVALID_STATE;
1340 }
1341}
1342
1343enum sci_status sci_port_link_up(struct isci_port *iport,
1344 struct isci_phy *iphy)
1345{
1346 enum sci_port_states state;
1347
1348 state = iport->sm.current_state_id;
1349 switch (state) {
1350 case SCI_PORT_SUB_WAITING:
1351 /* Since this is the first phy going link up for the port we
1352 * can just enable it and continue
1353 */
1354 sci_port_activate_phy(iport, iphy, true);
1355
1356 port_state_machine_change(iport,
1357 SCI_PORT_SUB_OPERATIONAL);
1358 return SCI_SUCCESS;
1359 case SCI_PORT_SUB_OPERATIONAL:
1360 sci_port_general_link_up_handler(iport, iphy, true);
1361 return SCI_SUCCESS;
1362 case SCI_PORT_RESETTING:
1363 /* TODO We should make sure that the phy that has gone
1364 * link up is the same one on which we sent the reset. It is
1365 * possible that the phy on which we sent the reset is not the
1366 * one that has gone link up and we want to make sure that
1367 * phy being reset comes back. Consider the case where a
1368 * reset is sent but before the hardware processes the reset it
1369 * get a link up on the port because of a hot plug event.
1370 * because of the reset request this phy will go link down
1371 * almost immediately.
1372 */
1373
1374 /* In the resetting state we don't notify the user regarding
1375 * link up and link down notifications.
1376 */
1377 sci_port_general_link_up_handler(iport, iphy, false);
1378 return SCI_SUCCESS;
1379 default:
1380 dev_warn(sciport_to_dev(iport),
1381 "%s: in wrong state: %d\n", __func__, state);
1382 return SCI_FAILURE_INVALID_STATE;
1383 }
1384}
1385
1386enum sci_status sci_port_link_down(struct isci_port *iport,
1387 struct isci_phy *iphy)
1388{
1389 enum sci_port_states state;
1390
1391 state = iport->sm.current_state_id;
1392 switch (state) {
1393 case SCI_PORT_SUB_OPERATIONAL:
1394 sci_port_deactivate_phy(iport, iphy, true);
1395
1396 /* If there are no active phys left in the port, then
1397 * transition the port to the WAITING state until such time
1398 * as a phy goes link up
1399 */
1400 if (iport->active_phy_mask == 0)
1401 port_state_machine_change(iport,
1402 SCI_PORT_SUB_WAITING);
1403 return SCI_SUCCESS;
1404 case SCI_PORT_RESETTING:
1405 /* In the resetting state we don't notify the user regarding
1406 * link up and link down notifications. */
1407 sci_port_deactivate_phy(iport, iphy, false);
1408 return SCI_SUCCESS;
1409 default:
1410 dev_warn(sciport_to_dev(iport),
1411 "%s: in wrong state: %d\n", __func__, state);
1412 return SCI_FAILURE_INVALID_STATE;
1413 }
1414}
1415
1416enum sci_status sci_port_start_io(struct isci_port *iport,
1417 struct isci_remote_device *idev,
1418 struct isci_request *ireq)
1419{
1420 enum sci_port_states state;
1421
1422 state = iport->sm.current_state_id;
1423 switch (state) {
1424 case SCI_PORT_SUB_WAITING:
1425 return SCI_FAILURE_INVALID_STATE;
1426 case SCI_PORT_SUB_OPERATIONAL:
1427 iport->started_request_count++;
1428 return SCI_SUCCESS;
1429 default:
1430 dev_warn(sciport_to_dev(iport),
1431 "%s: in wrong state: %d\n", __func__, state);
1432 return SCI_FAILURE_INVALID_STATE;
1433 }
1434}
1435
1436enum sci_status sci_port_complete_io(struct isci_port *iport,
1437 struct isci_remote_device *idev,
1438 struct isci_request *ireq)
1439{
1440 enum sci_port_states state;
1441
1442 state = iport->sm.current_state_id;
1443 switch (state) {
1444 case SCI_PORT_STOPPED:
1445 dev_warn(sciport_to_dev(iport),
1446 "%s: in wrong state: %d\n", __func__, state);
1447 return SCI_FAILURE_INVALID_STATE;
1448 case SCI_PORT_STOPPING:
1449 sci_port_decrement_request_count(iport);
1450
1451 if (iport->started_request_count == 0)
1452 port_state_machine_change(iport,
1453 SCI_PORT_STOPPED);
1454 break;
1455 case SCI_PORT_READY:
1456 case SCI_PORT_RESETTING:
1457 case SCI_PORT_FAILED:
1458 case SCI_PORT_SUB_WAITING:
1459 case SCI_PORT_SUB_OPERATIONAL:
1460 sci_port_decrement_request_count(iport);
1461 break;
1462 case SCI_PORT_SUB_CONFIGURING:
1463 sci_port_decrement_request_count(iport);
1464 if (iport->started_request_count == 0) {
1465 port_state_machine_change(iport,
1466 SCI_PORT_SUB_OPERATIONAL);
1467 }
1468 break;
1469 }
1470 return SCI_SUCCESS;
1471}
1472
1473static void sci_port_enable_port_task_scheduler(struct isci_port *iport)
1474{
1475 u32 pts_control_value;
1476
1477 /* enable the port task scheduler in a suspended state */
1478 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
1479 pts_control_value |= SCU_PTSxCR_GEN_BIT(ENABLE) | SCU_PTSxCR_GEN_BIT(SUSPEND);
1480 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
1481}
1482
1483static void sci_port_disable_port_task_scheduler(struct isci_port *iport)
1484{
1485 u32 pts_control_value;
1486
1487 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
1488 pts_control_value &=
1489 ~(SCU_PTSxCR_GEN_BIT(ENABLE) | SCU_PTSxCR_GEN_BIT(SUSPEND));
1490 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
1491}
1492
1493static void sci_port_post_dummy_remote_node(struct isci_port *iport)
1494{
1495 struct isci_host *ihost = iport->owning_controller;
1496 u8 phys_index = iport->physical_port_index;
1497 union scu_remote_node_context *rnc;
1498 u16 rni = iport->reserved_rni;
1499 u32 command;
1500
1501 rnc = &ihost->remote_node_context_table[rni];
1502 rnc->ssp.is_valid = true;
1503
1504 command = SCU_CONTEXT_COMMAND_POST_RNC_32 |
1505 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1506
1507 sci_controller_post_request(ihost, command);
1508
1509 /* ensure hardware has seen the post rnc command and give it
1510 * ample time to act before sending the suspend
1511 */
1512 readl(&ihost->smu_registers->interrupt_status); /* flush */
1513 udelay(10);
1514
1515 command = SCU_CONTEXT_COMMAND_POST_RNC_SUSPEND_TX_RX |
1516 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1517
1518 sci_controller_post_request(ihost, command);
1519}
1520
1521static void sci_port_stopped_state_enter(struct sci_base_state_machine *sm)
1522{
1523 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1524
1525 if (iport->sm.previous_state_id == SCI_PORT_STOPPING) {
1526 /*
1527 * If we enter this state becasuse of a request to stop
1528 * the port then we want to disable the hardwares port
1529 * task scheduler. */
1530 sci_port_disable_port_task_scheduler(iport);
1531 }
1532}
1533
1534static void sci_port_stopped_state_exit(struct sci_base_state_machine *sm)
1535{
1536 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1537
1538 /* Enable and suspend the port task scheduler */
1539 sci_port_enable_port_task_scheduler(iport);
1540}
1541
1542static void sci_port_ready_state_enter(struct sci_base_state_machine *sm)
1543{
1544 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1545 struct isci_host *ihost = iport->owning_controller;
1546 u32 prev_state;
1547
1548 prev_state = iport->sm.previous_state_id;
1549 if (prev_state == SCI_PORT_RESETTING)
1550 isci_port_hard_reset_complete(iport, SCI_SUCCESS);
1551 else
1552 isci_port_not_ready(ihost, iport);
1553
1554 /* Post and suspend the dummy remote node context for this port. */
1555 sci_port_post_dummy_remote_node(iport);
1556
1557 /* Start the ready substate machine */
1558 port_state_machine_change(iport,
1559 SCI_PORT_SUB_WAITING);
1560}
1561
1562static void sci_port_resetting_state_exit(struct sci_base_state_machine *sm)
1563{
1564 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1565
1566 sci_del_timer(&iport->timer);
1567}
1568
1569static void sci_port_stopping_state_exit(struct sci_base_state_machine *sm)
1570{
1571 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1572
1573 sci_del_timer(&iport->timer);
1574
1575 sci_port_destroy_dummy_resources(iport);
1576}
1577
1578static void sci_port_failed_state_enter(struct sci_base_state_machine *sm)
1579{
1580 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1581
1582 isci_port_hard_reset_complete(iport, SCI_FAILURE_TIMEOUT);
1583}
1584
1585/* --------------------------------------------------------------------------- */
1586
1587static const struct sci_base_state sci_port_state_table[] = {
1588 [SCI_PORT_STOPPED] = {
1589 .enter_state = sci_port_stopped_state_enter,
1590 .exit_state = sci_port_stopped_state_exit
1591 },
1592 [SCI_PORT_STOPPING] = {
1593 .exit_state = sci_port_stopping_state_exit
1594 },
1595 [SCI_PORT_READY] = {
1596 .enter_state = sci_port_ready_state_enter,
1597 },
1598 [SCI_PORT_SUB_WAITING] = {
1599 .enter_state = sci_port_ready_substate_waiting_enter,
1600 },
1601 [SCI_PORT_SUB_OPERATIONAL] = {
1602 .enter_state = sci_port_ready_substate_operational_enter,
1603 .exit_state = sci_port_ready_substate_operational_exit
1604 },
1605 [SCI_PORT_SUB_CONFIGURING] = {
1606 .enter_state = sci_port_ready_substate_configuring_enter,
1607 .exit_state = sci_port_ready_substate_configuring_exit
1608 },
1609 [SCI_PORT_RESETTING] = {
1610 .exit_state = sci_port_resetting_state_exit
1611 },
1612 [SCI_PORT_FAILED] = {
1613 .enter_state = sci_port_failed_state_enter,
1614 }
1615};
1616
1617void sci_port_construct(struct isci_port *iport, u8 index,
1618 struct isci_host *ihost)
1619{
1620 sci_init_sm(&iport->sm, sci_port_state_table, SCI_PORT_STOPPED);
1621
1622 iport->logical_port_index = SCIC_SDS_DUMMY_PORT;
1623 iport->physical_port_index = index;
1624 iport->active_phy_mask = 0;
1625 iport->ready_exit = false;
1626
1627 iport->owning_controller = ihost;
1628
1629 iport->started_request_count = 0;
1630 iport->assigned_device_count = 0;
1631
1632 iport->reserved_rni = SCU_DUMMY_INDEX;
1633 iport->reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;
1634
1635 sci_init_timer(&iport->timer, port_timeout);
1636
1637 iport->port_task_scheduler_registers = NULL;
1638
1639 for (index = 0; index < SCI_MAX_PHYS; index++)
1640 iport->phy_table[index] = NULL;
1641}
1642
1643void isci_port_init(struct isci_port *iport, struct isci_host *ihost, int index)
1644{
1645 INIT_LIST_HEAD(&iport->remote_dev_list);
1646 INIT_LIST_HEAD(&iport->domain_dev_list);
1647 spin_lock_init(&iport->state_lock);
1648 init_completion(&iport->start_complete);
1649 iport->isci_host = ihost;
1650 isci_port_change_state(iport, isci_freed);
1651 atomic_set(&iport->event, 0);
1652}
1653
1654/**
1655 * isci_port_get_state() - This function gets the status of the port object.
1656 * @isci_port: This parameter points to the isci_port object
1657 *
1658 * status of the object as a isci_status enum.
1659 */
1660enum isci_status isci_port_get_state(
1661 struct isci_port *isci_port)
1662{
1663 return isci_port->status;
1664}
1665
1666void sci_port_broadcast_change_received(struct isci_port *iport, struct isci_phy *iphy)
1667{
1668 struct isci_host *ihost = iport->owning_controller;
1669
1670 /* notify the user. */
1671 isci_port_bc_change_received(ihost, iport, iphy);
1672}
1673
1674int isci_port_perform_hard_reset(struct isci_host *ihost, struct isci_port *iport,
1675 struct isci_phy *iphy)
1676{
1677 unsigned long flags;
1678 enum sci_status status;
1679 int idx, ret = TMF_RESP_FUNC_COMPLETE;
1680
1681 dev_dbg(&ihost->pdev->dev, "%s: iport = %p\n",
1682 __func__, iport);
1683
1684 init_completion(&iport->hard_reset_complete);
1685
1686 spin_lock_irqsave(&ihost->scic_lock, flags);
1687
1688 #define ISCI_PORT_RESET_TIMEOUT SCIC_SDS_SIGNATURE_FIS_TIMEOUT
1689 status = sci_port_hard_reset(iport, ISCI_PORT_RESET_TIMEOUT);
1690
1691 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1692
1693 if (status == SCI_SUCCESS) {
1694 wait_for_completion(&iport->hard_reset_complete);
1695
1696 dev_dbg(&ihost->pdev->dev,
1697 "%s: iport = %p; hard reset completion\n",
1698 __func__, iport);
1699
1700 if (iport->hard_reset_status != SCI_SUCCESS)
1701 ret = TMF_RESP_FUNC_FAILED;
1702 } else {
1703 ret = TMF_RESP_FUNC_FAILED;
1704
1705 dev_err(&ihost->pdev->dev,
1706 "%s: iport = %p; sci_port_hard_reset call"
1707 " failed 0x%x\n",
1708 __func__, iport, status);
1709
1710 }
1711
1712 /* If the hard reset for the port has failed, consider this
1713 * the same as link failures on all phys in the port.
1714 */
1715 if (ret != TMF_RESP_FUNC_COMPLETE) {
1716
1717 dev_err(&ihost->pdev->dev,
1718 "%s: iport = %p; hard reset failed "
1719 "(0x%x) - driving explicit link fail for all phys\n",
1720 __func__, iport, iport->hard_reset_status);
1721
1722 /* Down all phys in the port. */
1723 spin_lock_irqsave(&ihost->scic_lock, flags);
1724 for (idx = 0; idx < SCI_MAX_PHYS; ++idx) {
1725 struct isci_phy *iphy = iport->phy_table[idx];
1726
1727 if (!iphy)
1728 continue;
1729 sci_phy_stop(iphy);
1730 sci_phy_start(iphy);
1731 }
1732 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1733 }
1734 return ret;
1735}
1736
1737/**
1738 * isci_port_deformed() - This function is called by libsas when a port becomes
1739 * inactive.
1740 * @phy: This parameter specifies the libsas phy with the inactive port.
1741 *
1742 */
1743void isci_port_deformed(struct asd_sas_phy *phy)
1744{
1745 pr_debug("%s: sas_phy = %p\n", __func__, phy);
1746}
1747
1748/**
1749 * isci_port_formed() - This function is called by libsas when a port becomes
1750 * active.
1751 * @phy: This parameter specifies the libsas phy with the active port.
1752 *
1753 */
1754void isci_port_formed(struct asd_sas_phy *phy)
1755{
1756 pr_debug("%s: sas_phy = %p, sas_port = %p\n", __func__, phy, phy->port);
1757}
diff --git a/drivers/scsi/isci/port.h b/drivers/scsi/isci/port.h
new file mode 100644
index 000000000000..b50ecd4e8f9c
--- /dev/null
+++ b/drivers/scsi/isci/port.h
@@ -0,0 +1,306 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _ISCI_PORT_H_
57#define _ISCI_PORT_H_
58
59#include <scsi/libsas.h>
60#include "isci.h"
61#include "sas.h"
62#include "phy.h"
63
64#define SCIC_SDS_DUMMY_PORT 0xFF
65
66struct isci_phy;
67struct isci_host;
68
69enum isci_status {
70 isci_freed = 0x00,
71 isci_starting = 0x01,
72 isci_ready = 0x02,
73 isci_ready_for_io = 0x03,
74 isci_stopping = 0x04,
75 isci_stopped = 0x05,
76};
77
78/**
79 * struct isci_port - isci direct attached sas port object
80 * @event: counts bcns and port stop events (for bcn filtering)
81 * @ready_exit: several states constitute 'ready'. When exiting ready we
82 * need to take extra port-teardown actions that are
83 * skipped when exiting to another 'ready' state.
84 * @logical_port_index: software port index
85 * @physical_port_index: hardware port index
86 * @active_phy_mask: identifies phy members
87 * @reserved_tag:
88 * @reserved_rni: reserver for port task scheduler workaround
89 * @started_request_count: reference count for outstanding commands
90 * @not_ready_reason: set during state transitions and notified
91 * @timer: timeout start/stop operations
92 */
93struct isci_port {
94 enum isci_status status;
95 #define IPORT_BCN_BLOCKED 0
96 #define IPORT_BCN_PENDING 1
97 unsigned long flags;
98 atomic_t event;
99 struct isci_host *isci_host;
100 struct asd_sas_port sas_port;
101 struct list_head remote_dev_list;
102 spinlock_t state_lock;
103 struct list_head domain_dev_list;
104 struct completion start_complete;
105 struct completion hard_reset_complete;
106 enum sci_status hard_reset_status;
107 struct sci_base_state_machine sm;
108 bool ready_exit;
109 u8 logical_port_index;
110 u8 physical_port_index;
111 u8 active_phy_mask;
112 u16 reserved_rni;
113 u16 reserved_tag;
114 u32 started_request_count;
115 u32 assigned_device_count;
116 u32 not_ready_reason;
117 struct isci_phy *phy_table[SCI_MAX_PHYS];
118 struct isci_host *owning_controller;
119 struct sci_timer timer;
120 struct scu_port_task_scheduler_registers __iomem *port_task_scheduler_registers;
121 /* XXX rework: only one register, no need to replicate per-port */
122 u32 __iomem *port_pe_configuration_register;
123 struct scu_viit_entry __iomem *viit_registers;
124};
125
126enum sci_port_not_ready_reason_code {
127 SCIC_PORT_NOT_READY_NO_ACTIVE_PHYS,
128 SCIC_PORT_NOT_READY_HARD_RESET_REQUESTED,
129 SCIC_PORT_NOT_READY_INVALID_PORT_CONFIGURATION,
130 SCIC_PORT_NOT_READY_RECONFIGURING,
131
132 SCIC_PORT_NOT_READY_REASON_CODE_MAX
133};
134
135struct sci_port_end_point_properties {
136 struct sci_sas_address sas_address;
137 struct sci_phy_proto protocols;
138};
139
140struct sci_port_properties {
141 u32 index;
142 struct sci_port_end_point_properties local;
143 struct sci_port_end_point_properties remote;
144 u32 phy_mask;
145};
146
147/**
148 * enum sci_port_states - This enumeration depicts all the states for the
149 * common port state machine.
150 *
151 *
152 */
153enum sci_port_states {
154 /**
155 * This state indicates that the port has successfully been stopped.
156 * In this state no new IO operations are permitted.
157 * This state is entered from the STOPPING state.
158 */
159 SCI_PORT_STOPPED,
160
161 /**
162 * This state indicates that the port is in the process of stopping.
163 * In this state no new IO operations are permitted, but existing IO
164 * operations are allowed to complete.
165 * This state is entered from the READY state.
166 */
167 SCI_PORT_STOPPING,
168
169 /**
170 * This state indicates the port is now ready. Thus, the user is
171 * able to perform IO operations on this port.
172 * This state is entered from the STARTING state.
173 */
174 SCI_PORT_READY,
175
176 /**
177 * The substate where the port is started and ready but has no
178 * active phys.
179 */
180 SCI_PORT_SUB_WAITING,
181
182 /**
183 * The substate where the port is started and ready and there is
184 * at least one phy operational.
185 */
186 SCI_PORT_SUB_OPERATIONAL,
187
188 /**
189 * The substate where the port is started and there was an
190 * add/remove phy event. This state is only used in Automatic
191 * Port Configuration Mode (APC)
192 */
193 SCI_PORT_SUB_CONFIGURING,
194
195 /**
196 * This state indicates the port is in the process of performing a hard
197 * reset. Thus, the user is unable to perform IO operations on this
198 * port.
199 * This state is entered from the READY state.
200 */
201 SCI_PORT_RESETTING,
202
203 /**
204 * This state indicates the port has failed a reset request. This state
205 * is entered when a port reset request times out.
206 * This state is entered from the RESETTING state.
207 */
208 SCI_PORT_FAILED,
209
210
211};
212
213static inline void sci_port_decrement_request_count(struct isci_port *iport)
214{
215 if (WARN_ONCE(iport->started_request_count == 0,
216 "%s: tried to decrement started_request_count past 0!?",
217 __func__))
218 /* pass */;
219 else
220 iport->started_request_count--;
221}
222
223#define sci_port_active_phy(port, phy) \
224 (((port)->active_phy_mask & (1 << (phy)->phy_index)) != 0)
225
226void sci_port_construct(
227 struct isci_port *iport,
228 u8 port_index,
229 struct isci_host *ihost);
230
231enum sci_status sci_port_start(struct isci_port *iport);
232enum sci_status sci_port_stop(struct isci_port *iport);
233
234enum sci_status sci_port_add_phy(
235 struct isci_port *iport,
236 struct isci_phy *iphy);
237
238enum sci_status sci_port_remove_phy(
239 struct isci_port *iport,
240 struct isci_phy *iphy);
241
242void sci_port_setup_transports(
243 struct isci_port *iport,
244 u32 device_id);
245
246void isci_port_bcn_enable(struct isci_host *, struct isci_port *);
247
248void sci_port_deactivate_phy(
249 struct isci_port *iport,
250 struct isci_phy *iphy,
251 bool do_notify_user);
252
253bool sci_port_link_detected(
254 struct isci_port *iport,
255 struct isci_phy *iphy);
256
257enum sci_status sci_port_link_up(struct isci_port *iport,
258 struct isci_phy *iphy);
259enum sci_status sci_port_link_down(struct isci_port *iport,
260 struct isci_phy *iphy);
261
262struct isci_request;
263struct isci_remote_device;
264enum sci_status sci_port_start_io(
265 struct isci_port *iport,
266 struct isci_remote_device *idev,
267 struct isci_request *ireq);
268
269enum sci_status sci_port_complete_io(
270 struct isci_port *iport,
271 struct isci_remote_device *idev,
272 struct isci_request *ireq);
273
274enum sas_linkrate sci_port_get_max_allowed_speed(
275 struct isci_port *iport);
276
277void sci_port_broadcast_change_received(
278 struct isci_port *iport,
279 struct isci_phy *iphy);
280
281bool sci_port_is_valid_phy_assignment(
282 struct isci_port *iport,
283 u32 phy_index);
284
285void sci_port_get_sas_address(
286 struct isci_port *iport,
287 struct sci_sas_address *sas_address);
288
289void sci_port_get_attached_sas_address(
290 struct isci_port *iport,
291 struct sci_sas_address *sas_address);
292
293enum isci_status isci_port_get_state(
294 struct isci_port *isci_port);
295
296void isci_port_formed(struct asd_sas_phy *);
297void isci_port_deformed(struct asd_sas_phy *);
298
299void isci_port_init(
300 struct isci_port *port,
301 struct isci_host *host,
302 int index);
303
304int isci_port_perform_hard_reset(struct isci_host *ihost, struct isci_port *iport,
305 struct isci_phy *iphy);
306#endif /* !defined(_ISCI_PORT_H_) */
diff --git a/drivers/scsi/isci/port_config.c b/drivers/scsi/isci/port_config.c
new file mode 100644
index 000000000000..486b113c634a
--- /dev/null
+++ b/drivers/scsi/isci/port_config.c
@@ -0,0 +1,754 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include "host.h"
57
58#define SCIC_SDS_MPC_RECONFIGURATION_TIMEOUT (10)
59#define SCIC_SDS_APC_RECONFIGURATION_TIMEOUT (10)
60#define SCIC_SDS_APC_WAIT_LINK_UP_NOTIFICATION (100)
61
62enum SCIC_SDS_APC_ACTIVITY {
63 SCIC_SDS_APC_SKIP_PHY,
64 SCIC_SDS_APC_ADD_PHY,
65 SCIC_SDS_APC_START_TIMER,
66
67 SCIC_SDS_APC_ACTIVITY_MAX
68};
69
70/*
71 * ******************************************************************************
72 * General port configuration agent routines
73 * ****************************************************************************** */
74
75/**
76 *
77 * @address_one: A SAS Address to be compared.
78 * @address_two: A SAS Address to be compared.
79 *
80 * Compare the two SAS Address and if SAS Address One is greater than SAS
81 * Address Two then return > 0 else if SAS Address One is less than SAS Address
82 * Two return < 0 Otherwise they are the same return 0 A signed value of x > 0
83 * > y where x is returned for Address One > Address Two y is returned for
84 * Address One < Address Two 0 is returned ofr Address One = Address Two
85 */
86static s32 sci_sas_address_compare(
87 struct sci_sas_address address_one,
88 struct sci_sas_address address_two)
89{
90 if (address_one.high > address_two.high) {
91 return 1;
92 } else if (address_one.high < address_two.high) {
93 return -1;
94 } else if (address_one.low > address_two.low) {
95 return 1;
96 } else if (address_one.low < address_two.low) {
97 return -1;
98 }
99
100 /* The two SAS Address must be identical */
101 return 0;
102}
103
104/**
105 *
106 * @controller: The controller object used for the port search.
107 * @phy: The phy object to match.
108 *
109 * This routine will find a matching port for the phy. This means that the
110 * port and phy both have the same broadcast sas address and same received sas
111 * address. The port address or the NULL if there is no matching
112 * port. port address if the port can be found to match the phy.
113 * NULL if there is no matching port for the phy.
114 */
115static struct isci_port *sci_port_configuration_agent_find_port(
116 struct isci_host *ihost,
117 struct isci_phy *iphy)
118{
119 u8 i;
120 struct sci_sas_address port_sas_address;
121 struct sci_sas_address port_attached_device_address;
122 struct sci_sas_address phy_sas_address;
123 struct sci_sas_address phy_attached_device_address;
124
125 /*
126 * Since this phy can be a member of a wide port check to see if one or
127 * more phys match the sent and received SAS address as this phy in which
128 * case it should participate in the same port.
129 */
130 sci_phy_get_sas_address(iphy, &phy_sas_address);
131 sci_phy_get_attached_sas_address(iphy, &phy_attached_device_address);
132
133 for (i = 0; i < ihost->logical_port_entries; i++) {
134 struct isci_port *iport = &ihost->ports[i];
135
136 sci_port_get_sas_address(iport, &port_sas_address);
137 sci_port_get_attached_sas_address(iport, &port_attached_device_address);
138
139 if (sci_sas_address_compare(port_sas_address, phy_sas_address) == 0 &&
140 sci_sas_address_compare(port_attached_device_address, phy_attached_device_address) == 0)
141 return iport;
142 }
143
144 return NULL;
145}
146
147/**
148 *
149 * @controller: This is the controller object that contains the port agent
150 * @port_agent: This is the port configruation agent for the controller.
151 *
152 * This routine will validate the port configuration is correct for the SCU
153 * hardware. The SCU hardware allows for port configurations as follows. LP0
154 * -> (PE0), (PE0, PE1), (PE0, PE1, PE2, PE3) LP1 -> (PE1) LP2 -> (PE2), (PE2,
155 * PE3) LP3 -> (PE3) enum sci_status SCI_SUCCESS the port configuration is valid for
156 * this port configuration agent. SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION
157 * the port configuration is not valid for this port configuration agent.
158 */
159static enum sci_status sci_port_configuration_agent_validate_ports(
160 struct isci_host *ihost,
161 struct sci_port_configuration_agent *port_agent)
162{
163 struct sci_sas_address first_address;
164 struct sci_sas_address second_address;
165
166 /*
167 * Sanity check the max ranges for all the phys the max index
168 * is always equal to the port range index */
169 if (port_agent->phy_valid_port_range[0].max_index != 0 ||
170 port_agent->phy_valid_port_range[1].max_index != 1 ||
171 port_agent->phy_valid_port_range[2].max_index != 2 ||
172 port_agent->phy_valid_port_range[3].max_index != 3)
173 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
174
175 /*
176 * This is a request to configure a single x4 port or at least attempt
177 * to make all the phys into a single port */
178 if (port_agent->phy_valid_port_range[0].min_index == 0 &&
179 port_agent->phy_valid_port_range[1].min_index == 0 &&
180 port_agent->phy_valid_port_range[2].min_index == 0 &&
181 port_agent->phy_valid_port_range[3].min_index == 0)
182 return SCI_SUCCESS;
183
184 /*
185 * This is a degenerate case where phy 1 and phy 2 are assigned
186 * to the same port this is explicitly disallowed by the hardware
187 * unless they are part of the same x4 port and this condition was
188 * already checked above. */
189 if (port_agent->phy_valid_port_range[2].min_index == 1) {
190 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
191 }
192
193 /*
194 * PE0 and PE3 can never have the same SAS Address unless they
195 * are part of the same x4 wide port and we have already checked
196 * for this condition. */
197 sci_phy_get_sas_address(&ihost->phys[0], &first_address);
198 sci_phy_get_sas_address(&ihost->phys[3], &second_address);
199
200 if (sci_sas_address_compare(first_address, second_address) == 0) {
201 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
202 }
203
204 /*
205 * PE0 and PE1 are configured into a 2x1 ports make sure that the
206 * SAS Address for PE0 and PE2 are different since they can not be
207 * part of the same port. */
208 if (port_agent->phy_valid_port_range[0].min_index == 0 &&
209 port_agent->phy_valid_port_range[1].min_index == 1) {
210 sci_phy_get_sas_address(&ihost->phys[0], &first_address);
211 sci_phy_get_sas_address(&ihost->phys[2], &second_address);
212
213 if (sci_sas_address_compare(first_address, second_address) == 0) {
214 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
215 }
216 }
217
218 /*
219 * PE2 and PE3 are configured into a 2x1 ports make sure that the
220 * SAS Address for PE1 and PE3 are different since they can not be
221 * part of the same port. */
222 if (port_agent->phy_valid_port_range[2].min_index == 2 &&
223 port_agent->phy_valid_port_range[3].min_index == 3) {
224 sci_phy_get_sas_address(&ihost->phys[1], &first_address);
225 sci_phy_get_sas_address(&ihost->phys[3], &second_address);
226
227 if (sci_sas_address_compare(first_address, second_address) == 0) {
228 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
229 }
230 }
231
232 return SCI_SUCCESS;
233}
234
235/*
236 * ******************************************************************************
237 * Manual port configuration agent routines
238 * ****************************************************************************** */
239
240/* verify all of the phys in the same port are using the same SAS address */
241static enum sci_status
242sci_mpc_agent_validate_phy_configuration(struct isci_host *ihost,
243 struct sci_port_configuration_agent *port_agent)
244{
245 u32 phy_mask;
246 u32 assigned_phy_mask;
247 struct sci_sas_address sas_address;
248 struct sci_sas_address phy_assigned_address;
249 u8 port_index;
250 u8 phy_index;
251
252 assigned_phy_mask = 0;
253 sas_address.high = 0;
254 sas_address.low = 0;
255
256 for (port_index = 0; port_index < SCI_MAX_PORTS; port_index++) {
257 phy_mask = ihost->oem_parameters.ports[port_index].phy_mask;
258
259 if (!phy_mask)
260 continue;
261 /*
262 * Make sure that one or more of the phys were not already assinged to
263 * a different port. */
264 if ((phy_mask & ~assigned_phy_mask) == 0) {
265 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
266 }
267
268 /* Find the starting phy index for this round through the loop */
269 for (phy_index = 0; phy_index < SCI_MAX_PHYS; phy_index++) {
270 if ((phy_mask & (1 << phy_index)) == 0)
271 continue;
272 sci_phy_get_sas_address(&ihost->phys[phy_index],
273 &sas_address);
274
275 /*
276 * The phy_index can be used as the starting point for the
277 * port range since the hardware starts all logical ports
278 * the same as the PE index. */
279 port_agent->phy_valid_port_range[phy_index].min_index = port_index;
280 port_agent->phy_valid_port_range[phy_index].max_index = phy_index;
281
282 if (phy_index != port_index) {
283 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
284 }
285
286 break;
287 }
288
289 /*
290 * See how many additional phys are being added to this logical port.
291 * Note: We have not moved the current phy_index so we will actually
292 * compare the startting phy with itself.
293 * This is expected and required to add the phy to the port. */
294 while (phy_index < SCI_MAX_PHYS) {
295 if ((phy_mask & (1 << phy_index)) == 0)
296 continue;
297 sci_phy_get_sas_address(&ihost->phys[phy_index],
298 &phy_assigned_address);
299
300 if (sci_sas_address_compare(sas_address, phy_assigned_address) != 0) {
301 /*
302 * The phy mask specified that this phy is part of the same port
303 * as the starting phy and it is not so fail this configuration */
304 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
305 }
306
307 port_agent->phy_valid_port_range[phy_index].min_index = port_index;
308 port_agent->phy_valid_port_range[phy_index].max_index = phy_index;
309
310 sci_port_add_phy(&ihost->ports[port_index],
311 &ihost->phys[phy_index]);
312
313 assigned_phy_mask |= (1 << phy_index);
314 }
315
316 phy_index++;
317 }
318
319 return sci_port_configuration_agent_validate_ports(ihost, port_agent);
320}
321
322static void mpc_agent_timeout(unsigned long data)
323{
324 u8 index;
325 struct sci_timer *tmr = (struct sci_timer *)data;
326 struct sci_port_configuration_agent *port_agent;
327 struct isci_host *ihost;
328 unsigned long flags;
329 u16 configure_phy_mask;
330
331 port_agent = container_of(tmr, typeof(*port_agent), timer);
332 ihost = container_of(port_agent, typeof(*ihost), port_agent);
333
334 spin_lock_irqsave(&ihost->scic_lock, flags);
335
336 if (tmr->cancel)
337 goto done;
338
339 port_agent->timer_pending = false;
340
341 /* Find the mask of phys that are reported read but as yet unconfigured into a port */
342 configure_phy_mask = ~port_agent->phy_configured_mask & port_agent->phy_ready_mask;
343
344 for (index = 0; index < SCI_MAX_PHYS; index++) {
345 struct isci_phy *iphy = &ihost->phys[index];
346
347 if (configure_phy_mask & (1 << index)) {
348 port_agent->link_up_handler(ihost, port_agent,
349 phy_get_non_dummy_port(iphy),
350 iphy);
351 }
352 }
353
354done:
355 spin_unlock_irqrestore(&ihost->scic_lock, flags);
356}
357
358static void sci_mpc_agent_link_up(struct isci_host *ihost,
359 struct sci_port_configuration_agent *port_agent,
360 struct isci_port *iport,
361 struct isci_phy *iphy)
362{
363 /* If the port is NULL then the phy was not assigned to a port.
364 * This is because the phy was not given the same SAS Address as
365 * the other PHYs in the port.
366 */
367 if (!iport)
368 return;
369
370 port_agent->phy_ready_mask |= (1 << iphy->phy_index);
371 sci_port_link_up(iport, iphy);
372 if ((iport->active_phy_mask & (1 << iphy->phy_index)))
373 port_agent->phy_configured_mask |= (1 << iphy->phy_index);
374}
375
376/**
377 *
378 * @controller: This is the controller object that receives the link down
379 * notification.
380 * @port: This is the port object associated with the phy. If the is no
381 * associated port this is an NULL. The port is an invalid
382 * handle only if the phy was never port of this port. This happens when
383 * the phy is not broadcasting the same SAS address as the other phys in the
384 * assigned port.
385 * @phy: This is the phy object which has gone link down.
386 *
387 * This function handles the manual port configuration link down notifications.
388 * Since all ports and phys are associated at initialization time we just turn
389 * around and notifiy the port object of the link down event. If this PHY is
390 * not associated with a port there is no action taken. Is it possible to get a
391 * link down notification from a phy that has no assocoated port?
392 */
393static void sci_mpc_agent_link_down(
394 struct isci_host *ihost,
395 struct sci_port_configuration_agent *port_agent,
396 struct isci_port *iport,
397 struct isci_phy *iphy)
398{
399 if (iport != NULL) {
400 /*
401 * If we can form a new port from the remainder of the phys
402 * then we want to start the timer to allow the SCI User to
403 * cleanup old devices and rediscover the port before
404 * rebuilding the port with the phys that remain in the ready
405 * state.
406 */
407 port_agent->phy_ready_mask &= ~(1 << iphy->phy_index);
408 port_agent->phy_configured_mask &= ~(1 << iphy->phy_index);
409
410 /*
411 * Check to see if there are more phys waiting to be
412 * configured into a port. If there are allow the SCI User
413 * to tear down this port, if necessary, and then reconstruct
414 * the port after the timeout.
415 */
416 if ((port_agent->phy_configured_mask == 0x0000) &&
417 (port_agent->phy_ready_mask != 0x0000) &&
418 !port_agent->timer_pending) {
419 port_agent->timer_pending = true;
420
421 sci_mod_timer(&port_agent->timer,
422 SCIC_SDS_MPC_RECONFIGURATION_TIMEOUT);
423 }
424
425 sci_port_link_down(iport, iphy);
426 }
427}
428
429/* verify phys are assigned a valid SAS address for automatic port
430 * configuration mode.
431 */
432static enum sci_status
433sci_apc_agent_validate_phy_configuration(struct isci_host *ihost,
434 struct sci_port_configuration_agent *port_agent)
435{
436 u8 phy_index;
437 u8 port_index;
438 struct sci_sas_address sas_address;
439 struct sci_sas_address phy_assigned_address;
440
441 phy_index = 0;
442
443 while (phy_index < SCI_MAX_PHYS) {
444 port_index = phy_index;
445
446 /* Get the assigned SAS Address for the first PHY on the controller. */
447 sci_phy_get_sas_address(&ihost->phys[phy_index],
448 &sas_address);
449
450 while (++phy_index < SCI_MAX_PHYS) {
451 sci_phy_get_sas_address(&ihost->phys[phy_index],
452 &phy_assigned_address);
453
454 /* Verify each of the SAS address are all the same for every PHY */
455 if (sci_sas_address_compare(sas_address, phy_assigned_address) == 0) {
456 port_agent->phy_valid_port_range[phy_index].min_index = port_index;
457 port_agent->phy_valid_port_range[phy_index].max_index = phy_index;
458 } else {
459 port_agent->phy_valid_port_range[phy_index].min_index = phy_index;
460 port_agent->phy_valid_port_range[phy_index].max_index = phy_index;
461 break;
462 }
463 }
464 }
465
466 return sci_port_configuration_agent_validate_ports(ihost, port_agent);
467}
468
469static void sci_apc_agent_configure_ports(struct isci_host *ihost,
470 struct sci_port_configuration_agent *port_agent,
471 struct isci_phy *iphy,
472 bool start_timer)
473{
474 u8 port_index;
475 enum sci_status status;
476 struct isci_port *iport;
477 enum SCIC_SDS_APC_ACTIVITY apc_activity = SCIC_SDS_APC_SKIP_PHY;
478
479 iport = sci_port_configuration_agent_find_port(ihost, iphy);
480
481 if (iport) {
482 if (sci_port_is_valid_phy_assignment(iport, iphy->phy_index))
483 apc_activity = SCIC_SDS_APC_ADD_PHY;
484 else
485 apc_activity = SCIC_SDS_APC_SKIP_PHY;
486 } else {
487 /*
488 * There is no matching Port for this PHY so lets search through the
489 * Ports and see if we can add the PHY to its own port or maybe start
490 * the timer and wait to see if a wider port can be made.
491 *
492 * Note the break when we reach the condition of the port id == phy id */
493 for (port_index = port_agent->phy_valid_port_range[iphy->phy_index].min_index;
494 port_index <= port_agent->phy_valid_port_range[iphy->phy_index].max_index;
495 port_index++) {
496
497 iport = &ihost->ports[port_index];
498
499 /* First we must make sure that this PHY can be added to this Port. */
500 if (sci_port_is_valid_phy_assignment(iport, iphy->phy_index)) {
501 /*
502 * Port contains a PHY with a greater PHY ID than the current
503 * PHY that has gone link up. This phy can not be part of any
504 * port so skip it and move on. */
505 if (iport->active_phy_mask > (1 << iphy->phy_index)) {
506 apc_activity = SCIC_SDS_APC_SKIP_PHY;
507 break;
508 }
509
510 /*
511 * We have reached the end of our Port list and have not found
512 * any reason why we should not either add the PHY to the port
513 * or wait for more phys to become active. */
514 if (iport->physical_port_index == iphy->phy_index) {
515 /*
516 * The Port either has no active PHYs.
517 * Consider that if the port had any active PHYs we would have
518 * or active PHYs with
519 * a lower PHY Id than this PHY. */
520 if (apc_activity != SCIC_SDS_APC_START_TIMER) {
521 apc_activity = SCIC_SDS_APC_ADD_PHY;
522 }
523
524 break;
525 }
526
527 /*
528 * The current Port has no active PHYs and this PHY could be part
529 * of this Port. Since we dont know as yet setup to start the
530 * timer and see if there is a better configuration. */
531 if (iport->active_phy_mask == 0) {
532 apc_activity = SCIC_SDS_APC_START_TIMER;
533 }
534 } else if (iport->active_phy_mask != 0) {
535 /*
536 * The Port has an active phy and the current Phy can not
537 * participate in this port so skip the PHY and see if
538 * there is a better configuration. */
539 apc_activity = SCIC_SDS_APC_SKIP_PHY;
540 }
541 }
542 }
543
544 /*
545 * Check to see if the start timer operations should instead map to an
546 * add phy operation. This is caused because we have been waiting to
547 * add a phy to a port but could not becuase the automatic port
548 * configuration engine had a choice of possible ports for the phy.
549 * Since we have gone through a timeout we are going to restrict the
550 * choice to the smallest possible port. */
551 if (
552 (start_timer == false)
553 && (apc_activity == SCIC_SDS_APC_START_TIMER)
554 ) {
555 apc_activity = SCIC_SDS_APC_ADD_PHY;
556 }
557
558 switch (apc_activity) {
559 case SCIC_SDS_APC_ADD_PHY:
560 status = sci_port_add_phy(iport, iphy);
561
562 if (status == SCI_SUCCESS) {
563 port_agent->phy_configured_mask |= (1 << iphy->phy_index);
564 }
565 break;
566
567 case SCIC_SDS_APC_START_TIMER:
568 /*
569 * This can occur for either a link down event, or a link
570 * up event where we cannot yet tell the port to which a
571 * phy belongs.
572 */
573 if (port_agent->timer_pending)
574 sci_del_timer(&port_agent->timer);
575
576 port_agent->timer_pending = true;
577 sci_mod_timer(&port_agent->timer,
578 SCIC_SDS_APC_WAIT_LINK_UP_NOTIFICATION);
579 break;
580
581 case SCIC_SDS_APC_SKIP_PHY:
582 default:
583 /* do nothing the PHY can not be made part of a port at this time. */
584 break;
585 }
586}
587
588/**
589 * sci_apc_agent_link_up - handle apc link up events
590 * @scic: This is the controller object that receives the link up
591 * notification.
592 * @sci_port: This is the port object associated with the phy. If the is no
593 * associated port this is an NULL.
594 * @sci_phy: This is the phy object which has gone link up.
595 *
596 * This method handles the automatic port configuration for link up
597 * notifications. Is it possible to get a link down notification from a phy
598 * that has no assocoated port?
599 */
600static void sci_apc_agent_link_up(struct isci_host *ihost,
601 struct sci_port_configuration_agent *port_agent,
602 struct isci_port *iport,
603 struct isci_phy *iphy)
604{
605 u8 phy_index = iphy->phy_index;
606
607 if (!iport) {
608 /* the phy is not the part of this port */
609 port_agent->phy_ready_mask |= 1 << phy_index;
610 sci_apc_agent_configure_ports(ihost, port_agent, iphy, true);
611 } else {
612 /* the phy is already the part of the port */
613 u32 port_state = iport->sm.current_state_id;
614
615 /* if the PORT'S state is resetting then the link up is from
616 * port hard reset in this case, we need to tell the port
617 * that link up is recieved
618 */
619 BUG_ON(port_state != SCI_PORT_RESETTING);
620 port_agent->phy_ready_mask |= 1 << phy_index;
621 sci_port_link_up(iport, iphy);
622 }
623}
624
625/**
626 *
627 * @controller: This is the controller object that receives the link down
628 * notification.
629 * @iport: This is the port object associated with the phy. If the is no
630 * associated port this is an NULL.
631 * @iphy: This is the phy object which has gone link down.
632 *
633 * This method handles the automatic port configuration link down
634 * notifications. not associated with a port there is no action taken. Is it
635 * possible to get a link down notification from a phy that has no assocoated
636 * port?
637 */
638static void sci_apc_agent_link_down(
639 struct isci_host *ihost,
640 struct sci_port_configuration_agent *port_agent,
641 struct isci_port *iport,
642 struct isci_phy *iphy)
643{
644 port_agent->phy_ready_mask &= ~(1 << iphy->phy_index);
645
646 if (!iport)
647 return;
648 if (port_agent->phy_configured_mask & (1 << iphy->phy_index)) {
649 enum sci_status status;
650
651 status = sci_port_remove_phy(iport, iphy);
652
653 if (status == SCI_SUCCESS)
654 port_agent->phy_configured_mask &= ~(1 << iphy->phy_index);
655 }
656}
657
658/* configure the phys into ports when the timer fires */
659static void apc_agent_timeout(unsigned long data)
660{
661 u32 index;
662 struct sci_timer *tmr = (struct sci_timer *)data;
663 struct sci_port_configuration_agent *port_agent;
664 struct isci_host *ihost;
665 unsigned long flags;
666 u16 configure_phy_mask;
667
668 port_agent = container_of(tmr, typeof(*port_agent), timer);
669 ihost = container_of(port_agent, typeof(*ihost), port_agent);
670
671 spin_lock_irqsave(&ihost->scic_lock, flags);
672
673 if (tmr->cancel)
674 goto done;
675
676 port_agent->timer_pending = false;
677
678 configure_phy_mask = ~port_agent->phy_configured_mask & port_agent->phy_ready_mask;
679
680 if (!configure_phy_mask)
681 return;
682
683 for (index = 0; index < SCI_MAX_PHYS; index++) {
684 if ((configure_phy_mask & (1 << index)) == 0)
685 continue;
686
687 sci_apc_agent_configure_ports(ihost, port_agent,
688 &ihost->phys[index], false);
689 }
690
691done:
692 spin_unlock_irqrestore(&ihost->scic_lock, flags);
693}
694
695/*
696 * ******************************************************************************
697 * Public port configuration agent routines
698 * ****************************************************************************** */
699
700/**
701 *
702 *
703 * This method will construct the port configuration agent for operation. This
704 * call is universal for both manual port configuration and automatic port
705 * configuration modes.
706 */
707void sci_port_configuration_agent_construct(
708 struct sci_port_configuration_agent *port_agent)
709{
710 u32 index;
711
712 port_agent->phy_configured_mask = 0x00;
713 port_agent->phy_ready_mask = 0x00;
714
715 port_agent->link_up_handler = NULL;
716 port_agent->link_down_handler = NULL;
717
718 port_agent->timer_pending = false;
719
720 for (index = 0; index < SCI_MAX_PORTS; index++) {
721 port_agent->phy_valid_port_range[index].min_index = 0;
722 port_agent->phy_valid_port_range[index].max_index = 0;
723 }
724}
725
726enum sci_status sci_port_configuration_agent_initialize(
727 struct isci_host *ihost,
728 struct sci_port_configuration_agent *port_agent)
729{
730 enum sci_status status;
731 enum sci_port_configuration_mode mode;
732
733 mode = ihost->oem_parameters.controller.mode_type;
734
735 if (mode == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
736 status = sci_mpc_agent_validate_phy_configuration(
737 ihost, port_agent);
738
739 port_agent->link_up_handler = sci_mpc_agent_link_up;
740 port_agent->link_down_handler = sci_mpc_agent_link_down;
741
742 sci_init_timer(&port_agent->timer, mpc_agent_timeout);
743 } else {
744 status = sci_apc_agent_validate_phy_configuration(
745 ihost, port_agent);
746
747 port_agent->link_up_handler = sci_apc_agent_link_up;
748 port_agent->link_down_handler = sci_apc_agent_link_down;
749
750 sci_init_timer(&port_agent->timer, apc_agent_timeout);
751 }
752
753 return status;
754}
diff --git a/drivers/scsi/isci/probe_roms.c b/drivers/scsi/isci/probe_roms.c
new file mode 100644
index 000000000000..b5f4341de243
--- /dev/null
+++ b/drivers/scsi/isci/probe_roms.c
@@ -0,0 +1,243 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 */
24
25/* probe_roms - scan for oem parameters */
26
27#include <linux/kernel.h>
28#include <linux/firmware.h>
29#include <linux/uaccess.h>
30#include <linux/efi.h>
31#include <asm/probe_roms.h>
32
33#include "isci.h"
34#include "task.h"
35#include "probe_roms.h"
36
37static efi_char16_t isci_efivar_name[] = {
38 'R', 's', 't', 'S', 'c', 'u', 'O'
39};
40
41struct isci_orom *isci_request_oprom(struct pci_dev *pdev)
42{
43 void __iomem *oprom = pci_map_biosrom(pdev);
44 struct isci_orom *rom = NULL;
45 size_t len, i;
46 int j;
47 char oem_sig[4];
48 struct isci_oem_hdr oem_hdr;
49 u8 *tmp, sum;
50
51 if (!oprom)
52 return NULL;
53
54 len = pci_biosrom_size(pdev);
55 rom = devm_kzalloc(&pdev->dev, sizeof(*rom), GFP_KERNEL);
56 if (!rom) {
57 dev_warn(&pdev->dev,
58 "Unable to allocate memory for orom\n");
59 return NULL;
60 }
61
62 for (i = 0; i < len && rom; i += ISCI_OEM_SIG_SIZE) {
63 memcpy_fromio(oem_sig, oprom + i, ISCI_OEM_SIG_SIZE);
64
65 /* we think we found the OEM table */
66 if (memcmp(oem_sig, ISCI_OEM_SIG, ISCI_OEM_SIG_SIZE) == 0) {
67 size_t copy_len;
68
69 memcpy_fromio(&oem_hdr, oprom + i, sizeof(oem_hdr));
70
71 copy_len = min(oem_hdr.len - sizeof(oem_hdr),
72 sizeof(*rom));
73
74 memcpy_fromio(rom,
75 oprom + i + sizeof(oem_hdr),
76 copy_len);
77
78 /* calculate checksum */
79 tmp = (u8 *)&oem_hdr;
80 for (j = 0, sum = 0; j < sizeof(oem_hdr); j++, tmp++)
81 sum += *tmp;
82
83 tmp = (u8 *)rom;
84 for (j = 0; j < sizeof(*rom); j++, tmp++)
85 sum += *tmp;
86
87 if (sum != 0) {
88 dev_warn(&pdev->dev,
89 "OEM table checksum failed\n");
90 continue;
91 }
92
93 /* keep going if that's not the oem param table */
94 if (memcmp(rom->hdr.signature,
95 ISCI_ROM_SIG,
96 ISCI_ROM_SIG_SIZE) != 0)
97 continue;
98
99 dev_info(&pdev->dev,
100 "OEM parameter table found in OROM\n");
101 break;
102 }
103 }
104
105 if (i >= len) {
106 dev_err(&pdev->dev, "oprom parse error\n");
107 devm_kfree(&pdev->dev, rom);
108 rom = NULL;
109 }
110 pci_unmap_biosrom(oprom);
111
112 return rom;
113}
114
115enum sci_status isci_parse_oem_parameters(struct sci_oem_params *oem,
116 struct isci_orom *orom, int scu_index)
117{
118 /* check for valid inputs */
119 if (scu_index < 0 || scu_index >= SCI_MAX_CONTROLLERS ||
120 scu_index > orom->hdr.num_elements || !oem)
121 return -EINVAL;
122
123 *oem = orom->ctrl[scu_index];
124 return 0;
125}
126
127struct isci_orom *isci_request_firmware(struct pci_dev *pdev, const struct firmware *fw)
128{
129 struct isci_orom *orom = NULL, *data;
130 int i, j;
131
132 if (request_firmware(&fw, ISCI_FW_NAME, &pdev->dev) != 0)
133 return NULL;
134
135 if (fw->size < sizeof(*orom))
136 goto out;
137
138 data = (struct isci_orom *)fw->data;
139
140 if (strncmp(ISCI_ROM_SIG, data->hdr.signature,
141 strlen(ISCI_ROM_SIG)) != 0)
142 goto out;
143
144 orom = devm_kzalloc(&pdev->dev, fw->size, GFP_KERNEL);
145 if (!orom)
146 goto out;
147
148 memcpy(orom, fw->data, fw->size);
149
150 if (is_c0(pdev))
151 goto out;
152
153 /*
154 * deprecated: override default amp_control for pre-preproduction
155 * silicon revisions
156 */
157 for (i = 0; i < ARRAY_SIZE(orom->ctrl); i++)
158 for (j = 0; j < ARRAY_SIZE(orom->ctrl[i].phys); j++) {
159 orom->ctrl[i].phys[j].afe_tx_amp_control0 = 0xe7c03;
160 orom->ctrl[i].phys[j].afe_tx_amp_control1 = 0xe7c03;
161 orom->ctrl[i].phys[j].afe_tx_amp_control2 = 0xe7c03;
162 orom->ctrl[i].phys[j].afe_tx_amp_control3 = 0xe7c03;
163 }
164 out:
165 release_firmware(fw);
166
167 return orom;
168}
169
170static struct efi *get_efi(void)
171{
172#ifdef CONFIG_EFI
173 return &efi;
174#else
175 return NULL;
176#endif
177}
178
179struct isci_orom *isci_get_efi_var(struct pci_dev *pdev)
180{
181 efi_status_t status;
182 struct isci_orom *rom;
183 struct isci_oem_hdr *oem_hdr;
184 u8 *tmp, sum;
185 int j;
186 unsigned long data_len;
187 u8 *efi_data;
188 u32 efi_attrib = 0;
189
190 data_len = 1024;
191 efi_data = devm_kzalloc(&pdev->dev, data_len, GFP_KERNEL);
192 if (!efi_data) {
193 dev_warn(&pdev->dev,
194 "Unable to allocate memory for EFI data\n");
195 return NULL;
196 }
197
198 rom = (struct isci_orom *)(efi_data + sizeof(struct isci_oem_hdr));
199
200 if (get_efi())
201 status = get_efi()->get_variable(isci_efivar_name,
202 &ISCI_EFI_VENDOR_GUID,
203 &efi_attrib,
204 &data_len,
205 efi_data);
206 else
207 status = EFI_NOT_FOUND;
208
209 if (status != EFI_SUCCESS) {
210 dev_warn(&pdev->dev,
211 "Unable to obtain EFI var data for OEM parms\n");
212 return NULL;
213 }
214
215 oem_hdr = (struct isci_oem_hdr *)efi_data;
216
217 if (memcmp(oem_hdr->sig, ISCI_OEM_SIG, ISCI_OEM_SIG_SIZE) != 0) {
218 dev_warn(&pdev->dev,
219 "Invalid OEM header signature\n");
220 return NULL;
221 }
222
223 /* calculate checksum */
224 tmp = (u8 *)efi_data;
225 for (j = 0, sum = 0; j < (sizeof(*oem_hdr) + sizeof(*rom)); j++, tmp++)
226 sum += *tmp;
227
228 if (sum != 0) {
229 dev_warn(&pdev->dev,
230 "OEM table checksum failed\n");
231 return NULL;
232 }
233
234 if (memcmp(rom->hdr.signature,
235 ISCI_ROM_SIG,
236 ISCI_ROM_SIG_SIZE) != 0) {
237 dev_warn(&pdev->dev,
238 "Invalid OEM table signature\n");
239 return NULL;
240 }
241
242 return rom;
243}
diff --git a/drivers/scsi/isci/probe_roms.h b/drivers/scsi/isci/probe_roms.h
new file mode 100644
index 000000000000..dc007e692f4e
--- /dev/null
+++ b/drivers/scsi/isci/probe_roms.h
@@ -0,0 +1,249 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55#ifndef _ISCI_PROBE_ROMS_H_
56#define _ISCI_PROBE_ROMS_H_
57
58#ifdef __KERNEL__
59#include <linux/firmware.h>
60#include <linux/pci.h>
61#include <linux/efi.h>
62#include "isci.h"
63
64#define SCIC_SDS_PARM_NO_SPEED 0
65
66/* generation 1 (i.e. 1.5 Gb/s) */
67#define SCIC_SDS_PARM_GEN1_SPEED 1
68
69/* generation 2 (i.e. 3.0 Gb/s) */
70#define SCIC_SDS_PARM_GEN2_SPEED 2
71
72/* generation 3 (i.e. 6.0 Gb/s) */
73#define SCIC_SDS_PARM_GEN3_SPEED 3
74#define SCIC_SDS_PARM_MAX_SPEED SCIC_SDS_PARM_GEN3_SPEED
75
76/* parameters that can be set by module parameters */
77struct sci_user_parameters {
78 struct sci_phy_user_params {
79 /**
80 * This field specifies the NOTIFY (ENABLE SPIN UP) primitive
81 * insertion frequency for this phy index.
82 */
83 u32 notify_enable_spin_up_insertion_frequency;
84
85 /**
86 * This method specifies the number of transmitted DWORDs within which
87 * to transmit a single ALIGN primitive. This value applies regardless
88 * of what type of device is attached or connection state. A value of
89 * 0 indicates that no ALIGN primitives will be inserted.
90 */
91 u16 align_insertion_frequency;
92
93 /**
94 * This method specifies the number of transmitted DWORDs within which
95 * to transmit 2 ALIGN primitives. This applies for SAS connections
96 * only. A minimum value of 3 is required for this field.
97 */
98 u16 in_connection_align_insertion_frequency;
99
100 /**
101 * This field indicates the maximum speed generation to be utilized
102 * by phys in the supplied port.
103 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
104 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
105 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
106 */
107 u8 max_speed_generation;
108
109 } phys[SCI_MAX_PHYS];
110
111 /**
112 * This field specifies the maximum number of direct attached devices
113 * that can have power supplied to them simultaneously.
114 */
115 u8 max_number_concurrent_device_spin_up;
116
117 /**
118 * This field specifies the number of seconds to allow a phy to consume
119 * power before yielding to another phy.
120 *
121 */
122 u8 phy_spin_up_delay_interval;
123
124 /**
125 * These timer values specifies how long a link will remain open with no
126 * activity in increments of a microsecond, it can be in increments of
127 * 100 microseconds if the upper most bit is set.
128 *
129 */
130 u16 stp_inactivity_timeout;
131 u16 ssp_inactivity_timeout;
132
133 /**
134 * These timer values specifies how long a link will remain open in increments
135 * of 100 microseconds.
136 *
137 */
138 u16 stp_max_occupancy_timeout;
139 u16 ssp_max_occupancy_timeout;
140
141 /**
142 * This timer value specifies how long a link will remain open with no
143 * outbound traffic in increments of a microsecond.
144 *
145 */
146 u8 no_outbound_task_timeout;
147
148};
149
150#define SCIC_SDS_PARM_PHY_MASK_MIN 0x0
151#define SCIC_SDS_PARM_PHY_MASK_MAX 0xF
152#define MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT 4
153
154struct sci_oem_params;
155int sci_oem_parameters_validate(struct sci_oem_params *oem);
156
157struct isci_orom;
158struct isci_orom *isci_request_oprom(struct pci_dev *pdev);
159enum sci_status isci_parse_oem_parameters(struct sci_oem_params *oem,
160 struct isci_orom *orom, int scu_index);
161struct isci_orom *isci_request_firmware(struct pci_dev *pdev, const struct firmware *fw);
162struct isci_orom *isci_get_efi_var(struct pci_dev *pdev);
163
164struct isci_oem_hdr {
165 u8 sig[4];
166 u8 rev_major;
167 u8 rev_minor;
168 u16 len;
169 u8 checksum;
170 u8 reserved1;
171 u16 reserved2;
172} __attribute__ ((packed));
173
174#else
175#define SCI_MAX_PORTS 4
176#define SCI_MAX_PHYS 4
177#define SCI_MAX_CONTROLLERS 2
178#endif
179
180#define ISCI_FW_NAME "isci/isci_firmware.bin"
181
182#define ROMSIGNATURE 0xaa55
183
184#define ISCI_OEM_SIG "$OEM"
185#define ISCI_OEM_SIG_SIZE 4
186#define ISCI_ROM_SIG "ISCUOEMB"
187#define ISCI_ROM_SIG_SIZE 8
188
189#define ISCI_EFI_VENDOR_GUID \
190 EFI_GUID(0x193dfefa, 0xa445, 0x4302, 0x99, 0xd8, 0xef, 0x3a, 0xad, \
191 0x1a, 0x04, 0xc6)
192#define ISCI_EFI_VAR_NAME "RstScuO"
193
194/* Allowed PORT configuration modes APC Automatic PORT configuration mode is
195 * defined by the OEM configuration parameters providing no PHY_MASK parameters
196 * for any PORT. i.e. There are no phys assigned to any of the ports at start.
197 * MPC Manual PORT configuration mode is defined by the OEM configuration
198 * parameters providing a PHY_MASK value for any PORT. It is assumed that any
199 * PORT with no PHY_MASK is an invalid port and not all PHYs must be assigned.
200 * A PORT_PHY mask that assigns just a single PHY to a port and no other PHYs
201 * being assigned is sufficient to declare manual PORT configuration.
202 */
203enum sci_port_configuration_mode {
204 SCIC_PORT_MANUAL_CONFIGURATION_MODE = 0,
205 SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE = 1
206};
207
208struct sci_bios_oem_param_block_hdr {
209 uint8_t signature[ISCI_ROM_SIG_SIZE];
210 uint16_t total_block_length;
211 uint8_t hdr_length;
212 uint8_t version;
213 uint8_t preboot_source;
214 uint8_t num_elements;
215 uint16_t element_length;
216 uint8_t reserved[8];
217} __attribute__ ((packed));
218
219struct sci_oem_params {
220 struct {
221 uint8_t mode_type;
222 uint8_t max_concurrent_dev_spin_up;
223 uint8_t do_enable_ssc;
224 uint8_t reserved;
225 } controller;
226
227 struct {
228 uint8_t phy_mask;
229 } ports[SCI_MAX_PORTS];
230
231 struct sci_phy_oem_params {
232 struct {
233 uint32_t high;
234 uint32_t low;
235 } sas_address;
236
237 uint32_t afe_tx_amp_control0;
238 uint32_t afe_tx_amp_control1;
239 uint32_t afe_tx_amp_control2;
240 uint32_t afe_tx_amp_control3;
241 } phys[SCI_MAX_PHYS];
242} __attribute__ ((packed));
243
244struct isci_orom {
245 struct sci_bios_oem_param_block_hdr hdr;
246 struct sci_oem_params ctrl[SCI_MAX_CONTROLLERS];
247} __attribute__ ((packed));
248
249#endif
diff --git a/drivers/scsi/isci/registers.h b/drivers/scsi/isci/registers.h
new file mode 100644
index 000000000000..9b266c7428e8
--- /dev/null
+++ b/drivers/scsi/isci/registers.h
@@ -0,0 +1,1934 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _SCU_REGISTERS_H_
57#define _SCU_REGISTERS_H_
58
59/**
60 * This file contains the constants and structures for the SCU memory mapped
61 * registers.
62 *
63 *
64 */
65
66#define SCU_VIIT_ENTRY_ID_MASK (0xC0000000)
67#define SCU_VIIT_ENTRY_ID_SHIFT (30)
68
69#define SCU_VIIT_ENTRY_FUNCTION_MASK (0x0FF00000)
70#define SCU_VIIT_ENTRY_FUNCTION_SHIFT (20)
71
72#define SCU_VIIT_ENTRY_IPPTMODE_MASK (0x0001F800)
73#define SCU_VIIT_ENTRY_IPPTMODE_SHIFT (12)
74
75#define SCU_VIIT_ENTRY_LPVIE_MASK (0x00000F00)
76#define SCU_VIIT_ENTRY_LPVIE_SHIFT (8)
77
78#define SCU_VIIT_ENTRY_STATUS_MASK (0x000000FF)
79#define SCU_VIIT_ENTRY_STATUS_SHIFT (0)
80
81#define SCU_VIIT_ENTRY_ID_INVALID (0 << SCU_VIIT_ENTRY_ID_SHIFT)
82#define SCU_VIIT_ENTRY_ID_VIIT (1 << SCU_VIIT_ENTRY_ID_SHIFT)
83#define SCU_VIIT_ENTRY_ID_IIT (2 << SCU_VIIT_ENTRY_ID_SHIFT)
84#define SCU_VIIT_ENTRY_ID_VIRT_EXP (3 << SCU_VIIT_ENTRY_ID_SHIFT)
85
86#define SCU_VIIT_IPPT_SSP_INITIATOR (0x01 << SCU_VIIT_ENTRY_IPPTMODE_SHIFT)
87#define SCU_VIIT_IPPT_SMP_INITIATOR (0x02 << SCU_VIIT_ENTRY_IPPTMODE_SHIFT)
88#define SCU_VIIT_IPPT_STP_INITIATOR (0x04 << SCU_VIIT_ENTRY_IPPTMODE_SHIFT)
89#define SCU_VIIT_IPPT_INITIATOR \
90 (\
91 SCU_VIIT_IPPT_SSP_INITIATOR \
92 | SCU_VIIT_IPPT_SMP_INITIATOR \
93 | SCU_VIIT_IPPT_STP_INITIATOR \
94 )
95
96#define SCU_VIIT_STATUS_RNC_VALID (0x01 << SCU_VIIT_ENTRY_STATUS_SHIFT)
97#define SCU_VIIT_STATUS_ADDRESS_VALID (0x02 << SCU_VIIT_ENTRY_STATUS_SHIFT)
98#define SCU_VIIT_STATUS_RNI_VALID (0x04 << SCU_VIIT_ENTRY_STATUS_SHIFT)
99#define SCU_VIIT_STATUS_ALL_VALID \
100 (\
101 SCU_VIIT_STATUS_RNC_VALID \
102 | SCU_VIIT_STATUS_ADDRESS_VALID \
103 | SCU_VIIT_STATUS_RNI_VALID \
104 )
105
106#define SCU_VIIT_IPPT_SMP_TARGET (0x10 << SCU_VIIT_ENTRY_IPPTMODE_SHIFT)
107
108/**
109 * struct scu_viit_entry - This is the SCU Virtual Initiator Table Entry
110 *
111 *
112 */
113struct scu_viit_entry {
114 /**
115 * This must be encoded as to the type of initiator that is being constructed
116 * for this port.
117 */
118 u32 status;
119
120 /**
121 * Virtual initiator high SAS Address
122 */
123 u32 initiator_sas_address_hi;
124
125 /**
126 * Virtual initiator low SAS Address
127 */
128 u32 initiator_sas_address_lo;
129
130 /**
131 * This must be 0
132 */
133 u32 reserved;
134
135};
136
137
138/* IIT Status Defines */
139#define SCU_IIT_ENTRY_ID_MASK (0xC0000000)
140#define SCU_IIT_ENTRY_ID_SHIFT (30)
141
142#define SCU_IIT_ENTRY_STATUS_UPDATE_MASK (0x20000000)
143#define SCU_IIT_ENTRY_STATUS_UPDATE_SHIFT (29)
144
145#define SCU_IIT_ENTRY_LPI_MASK (0x00000F00)
146#define SCU_IIT_ENTRY_LPI_SHIFT (8)
147
148#define SCU_IIT_ENTRY_STATUS_MASK (0x000000FF)
149#define SCU_IIT_ENTRY_STATUS_SHIFT (0)
150
151/* IIT Remote Initiator Defines */
152#define SCU_IIT_ENTRY_REMOTE_TAG_MASK (0x0000FFFF)
153#define SCU_IIT_ENTRY_REMOTE_TAG_SHIFT (0)
154
155#define SCU_IIT_ENTRY_REMOTE_RNC_MASK (0x0FFF0000)
156#define SCU_IIT_ENTRY_REMOTE_RNC_SHIFT (16)
157
158#define SCU_IIT_ENTRY_ID_INVALID (0 << SCU_IIT_ENTRY_ID_SHIFT)
159#define SCU_IIT_ENTRY_ID_VIIT (1 << SCU_IIT_ENTRY_ID_SHIFT)
160#define SCU_IIT_ENTRY_ID_IIT (2 << SCU_IIT_ENTRY_ID_SHIFT)
161#define SCU_IIT_ENTRY_ID_VIRT_EXP (3 << SCU_IIT_ENTRY_ID_SHIFT)
162
163/**
164 * struct scu_iit_entry - This will be implemented later when we support
165 * virtual functions
166 *
167 *
168 */
169struct scu_iit_entry {
170 u32 status;
171 u32 remote_initiator_sas_address_hi;
172 u32 remote_initiator_sas_address_lo;
173 u32 remote_initiator;
174
175};
176
177/* Generate a value for an SCU register */
178#define SCU_GEN_VALUE(name, value) \
179 (((value) << name ## _SHIFT) & (name ## _MASK))
180
181/*
182 * Generate a bit value for an SCU register
183 * Make sure that the register MASK is just a single bit */
184#define SCU_GEN_BIT(name) \
185 SCU_GEN_VALUE(name, ((u32)1))
186
187#define SCU_SET_BIT(name, reg_value) \
188 ((reg_value) | SCU_GEN_BIT(name))
189
190#define SCU_CLEAR_BIT(name, reg_value) \
191 ((reg_value)$ ~(SCU_GEN_BIT(name)))
192
193/*
194 * *****************************************************************************
195 * Unions for bitfield definitions of SCU Registers
196 * SMU Post Context Port
197 * ***************************************************************************** */
198#define SMU_POST_CONTEXT_PORT_CONTEXT_INDEX_SHIFT (0)
199#define SMU_POST_CONTEXT_PORT_CONTEXT_INDEX_MASK (0x00000FFF)
200#define SMU_POST_CONTEXT_PORT_LOGICAL_PORT_INDEX_SHIFT (12)
201#define SMU_POST_CONTEXT_PORT_LOGICAL_PORT_INDEX_MASK (0x0000F000)
202#define SMU_POST_CONTEXT_PORT_PROTOCOL_ENGINE_SHIFT (16)
203#define SMU_POST_CONTEXT_PORT_PROTOCOL_ENGINE_MASK (0x00030000)
204#define SMU_POST_CONTEXT_PORT_COMMAND_CONTEXT_SHIFT (18)
205#define SMU_POST_CONTEXT_PORT_COMMAND_CONTEXT_MASK (0x00FC0000)
206#define SMU_POST_CONTEXT_PORT_RESERVED_MASK (0xFF000000)
207
208#define SMU_PCP_GEN_VAL(name, value) \
209 SCU_GEN_VALUE(SMU_POST_CONTEXT_PORT_ ## name, value)
210
211/* ***************************************************************************** */
212#define SMU_INTERRUPT_STATUS_COMPLETION_SHIFT (31)
213#define SMU_INTERRUPT_STATUS_COMPLETION_MASK (0x80000000)
214#define SMU_INTERRUPT_STATUS_QUEUE_SUSPEND_SHIFT (1)
215#define SMU_INTERRUPT_STATUS_QUEUE_SUSPEND_MASK (0x00000002)
216#define SMU_INTERRUPT_STATUS_QUEUE_ERROR_SHIFT (0)
217#define SMU_INTERRUPT_STATUS_QUEUE_ERROR_MASK (0x00000001)
218#define SMU_INTERRUPT_STATUS_RESERVED_MASK (0x7FFFFFFC)
219
220#define SMU_ISR_GEN_BIT(name) \
221 SCU_GEN_BIT(SMU_INTERRUPT_STATUS_ ## name)
222
223#define SMU_ISR_QUEUE_ERROR SMU_ISR_GEN_BIT(QUEUE_ERROR)
224#define SMU_ISR_QUEUE_SUSPEND SMU_ISR_GEN_BIT(QUEUE_SUSPEND)
225#define SMU_ISR_COMPLETION SMU_ISR_GEN_BIT(COMPLETION)
226
227/* ***************************************************************************** */
228#define SMU_INTERRUPT_MASK_COMPLETION_SHIFT (31)
229#define SMU_INTERRUPT_MASK_COMPLETION_MASK (0x80000000)
230#define SMU_INTERRUPT_MASK_QUEUE_SUSPEND_SHIFT (1)
231#define SMU_INTERRUPT_MASK_QUEUE_SUSPEND_MASK (0x00000002)
232#define SMU_INTERRUPT_MASK_QUEUE_ERROR_SHIFT (0)
233#define SMU_INTERRUPT_MASK_QUEUE_ERROR_MASK (0x00000001)
234#define SMU_INTERRUPT_MASK_RESERVED_MASK (0x7FFFFFFC)
235
236#define SMU_IMR_GEN_BIT(name) \
237 SCU_GEN_BIT(SMU_INTERRUPT_MASK_ ## name)
238
239#define SMU_IMR_QUEUE_ERROR SMU_IMR_GEN_BIT(QUEUE_ERROR)
240#define SMU_IMR_QUEUE_SUSPEND SMU_IMR_GEN_BIT(QUEUE_SUSPEND)
241#define SMU_IMR_COMPLETION SMU_IMR_GEN_BIT(COMPLETION)
242
243/* ***************************************************************************** */
244#define SMU_INTERRUPT_COALESCING_CONTROL_TIMER_SHIFT (0)
245#define SMU_INTERRUPT_COALESCING_CONTROL_TIMER_MASK (0x0000001F)
246#define SMU_INTERRUPT_COALESCING_CONTROL_NUMBER_SHIFT (8)
247#define SMU_INTERRUPT_COALESCING_CONTROL_NUMBER_MASK (0x0000FF00)
248#define SMU_INTERRUPT_COALESCING_CONTROL_RESERVED_MASK (0xFFFF00E0)
249
250#define SMU_ICC_GEN_VAL(name, value) \
251 SCU_GEN_VALUE(SMU_INTERRUPT_COALESCING_CONTROL_ ## name, value)
252
253/* ***************************************************************************** */
254#define SMU_TASK_CONTEXT_RANGE_START_SHIFT (0)
255#define SMU_TASK_CONTEXT_RANGE_START_MASK (0x00000FFF)
256#define SMU_TASK_CONTEXT_RANGE_ENDING_SHIFT (16)
257#define SMU_TASK_CONTEXT_RANGE_ENDING_MASK (0x0FFF0000)
258#define SMU_TASK_CONTEXT_RANGE_ENABLE_SHIFT (31)
259#define SMU_TASK_CONTEXT_RANGE_ENABLE_MASK (0x80000000)
260#define SMU_TASK_CONTEXT_RANGE_RESERVED_MASK (0x7000F000)
261
262#define SMU_TCR_GEN_VAL(name, value) \
263 SCU_GEN_VALUE(SMU_TASK_CONTEXT_RANGE_ ## name, value)
264
265#define SMU_TCR_GEN_BIT(name, value) \
266 SCU_GEN_BIT(SMU_TASK_CONTEXT_RANGE_ ## name)
267
268/* ***************************************************************************** */
269
270#define SMU_COMPLETION_QUEUE_PUT_POINTER_SHIFT (0)
271#define SMU_COMPLETION_QUEUE_PUT_POINTER_MASK (0x00003FFF)
272#define SMU_COMPLETION_QUEUE_PUT_CYCLE_BIT_SHIFT (15)
273#define SMU_COMPLETION_QUEUE_PUT_CYCLE_BIT_MASK (0x00008000)
274#define SMU_COMPLETION_QUEUE_PUT_EVENT_POINTER_SHIFT (16)
275#define SMU_COMPLETION_QUEUE_PUT_EVENT_POINTER_MASK (0x03FF0000)
276#define SMU_COMPLETION_QUEUE_PUT_EVENT_CYCLE_BIT_SHIFT (26)
277#define SMU_COMPLETION_QUEUE_PUT_EVENT_CYCLE_BIT_MASK (0x04000000)
278#define SMU_COMPLETION_QUEUE_PUT_RESERVED_MASK (0xF8004000)
279
280#define SMU_CQPR_GEN_VAL(name, value) \
281 SCU_GEN_VALUE(SMU_COMPLETION_QUEUE_PUT_ ## name, value)
282
283#define SMU_CQPR_GEN_BIT(name) \
284 SCU_GEN_BIT(SMU_COMPLETION_QUEUE_PUT_ ## name)
285
286/* ***************************************************************************** */
287
288#define SMU_COMPLETION_QUEUE_GET_POINTER_SHIFT (0)
289#define SMU_COMPLETION_QUEUE_GET_POINTER_MASK (0x00003FFF)
290#define SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT (15)
291#define SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_MASK (0x00008000)
292#define SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT (16)
293#define SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK (0x03FF0000)
294#define SMU_COMPLETION_QUEUE_GET_EVENT_CYCLE_BIT_SHIFT (26)
295#define SMU_COMPLETION_QUEUE_GET_EVENT_CYCLE_BIT_MASK (0x04000000)
296#define SMU_COMPLETION_QUEUE_GET_ENABLE_SHIFT (30)
297#define SMU_COMPLETION_QUEUE_GET_ENABLE_MASK (0x40000000)
298#define SMU_COMPLETION_QUEUE_GET_EVENT_ENABLE_SHIFT (31)
299#define SMU_COMPLETION_QUEUE_GET_EVENT_ENABLE_MASK (0x80000000)
300#define SMU_COMPLETION_QUEUE_GET_RESERVED_MASK (0x38004000)
301
302#define SMU_CQGR_GEN_VAL(name, value) \
303 SCU_GEN_VALUE(SMU_COMPLETION_QUEUE_GET_ ## name, value)
304
305#define SMU_CQGR_GEN_BIT(name) \
306 SCU_GEN_BIT(SMU_COMPLETION_QUEUE_GET_ ## name)
307
308#define SMU_CQGR_CYCLE_BIT \
309 SMU_CQGR_GEN_BIT(CYCLE_BIT)
310
311#define SMU_CQGR_EVENT_CYCLE_BIT \
312 SMU_CQGR_GEN_BIT(EVENT_CYCLE_BIT)
313
314#define SMU_CQGR_GET_POINTER_SET(value) \
315 SMU_CQGR_GEN_VAL(POINTER, value)
316
317
318/* ***************************************************************************** */
319#define SMU_COMPLETION_QUEUE_CONTROL_QUEUE_LIMIT_SHIFT (0)
320#define SMU_COMPLETION_QUEUE_CONTROL_QUEUE_LIMIT_MASK (0x00003FFF)
321#define SMU_COMPLETION_QUEUE_CONTROL_EVENT_LIMIT_SHIFT (16)
322#define SMU_COMPLETION_QUEUE_CONTROL_EVENT_LIMIT_MASK (0x03FF0000)
323#define SMU_COMPLETION_QUEUE_CONTROL_RESERVED_MASK (0xFC00C000)
324
325#define SMU_CQC_GEN_VAL(name, value) \
326 SCU_GEN_VALUE(SMU_COMPLETION_QUEUE_CONTROL_ ## name, value)
327
328#define SMU_CQC_QUEUE_LIMIT_SET(value) \
329 SMU_CQC_GEN_VAL(QUEUE_LIMIT, value)
330
331#define SMU_CQC_EVENT_LIMIT_SET(value) \
332 SMU_CQC_GEN_VAL(EVENT_LIMIT, value)
333
334
335/* ***************************************************************************** */
336#define SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT (0)
337#define SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK (0x00000FFF)
338#define SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT (12)
339#define SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK (0x00007000)
340#define SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT (15)
341#define SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK (0x07FF8000)
342#define SMU_DEVICE_CONTEXT_CAPACITY_MAX_PEG_SHIFT (27)
343#define SMU_DEVICE_CONTEXT_CAPACITY_MAX_PEG_MASK (0x08000000)
344#define SMU_DEVICE_CONTEXT_CAPACITY_RESERVED_MASK (0xF0000000)
345
346#define SMU_DCC_GEN_VAL(name, value) \
347 SCU_GEN_VALUE(SMU_DEVICE_CONTEXT_CAPACITY_ ## name, value)
348
349#define SMU_DCC_GET_MAX_PEG(value) \
350 (\
351 ((value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_PEG_MASK) \
352 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT \
353 )
354
355#define SMU_DCC_GET_MAX_LP(value) \
356 (\
357 ((value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
358 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT \
359 )
360
361#define SMU_DCC_GET_MAX_TC(value) \
362 (\
363 ((value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
364 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT \
365 )
366
367#define SMU_DCC_GET_MAX_RNC(value) \
368 (\
369 ((value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
370 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT \
371 )
372
373/* -------------------------------------------------------------------------- */
374
375#define SMU_CONTROL_STATUS_TASK_CONTEXT_RANGE_ENABLE_SHIFT (0)
376#define SMU_CONTROL_STATUS_TASK_CONTEXT_RANGE_ENABLE_MASK (0x00000001)
377#define SMU_CONTROL_STATUS_COMPLETION_BYTE_SWAP_ENABLE_SHIFT (1)
378#define SMU_CONTROL_STATUS_COMPLETION_BYTE_SWAP_ENABLE_MASK (0x00000002)
379#define SMU_CONTROL_STATUS_CONTEXT_RAM_INIT_COMPLETED_SHIFT (16)
380#define SMU_CONTROL_STATUS_CONTEXT_RAM_INIT_COMPLETED_MASK (0x00010000)
381#define SMU_CONTROL_STATUS_SCHEDULER_RAM_INIT_COMPLETED_SHIFT (17)
382#define SMU_CONTROL_STATUS_SCHEDULER_RAM_INIT_COMPLETED_MASK (0x00020000)
383#define SMU_CONTROL_STATUS_RESERVED_MASK (0xFFFCFFFC)
384
385#define SMU_SMUCSR_GEN_BIT(name) \
386 SCU_GEN_BIT(SMU_CONTROL_STATUS_ ## name)
387
388#define SMU_SMUCSR_SCHEDULER_RAM_INIT_COMPLETED \
389 (SMU_SMUCSR_GEN_BIT(SCHEDULER_RAM_INIT_COMPLETED))
390
391#define SMU_SMUCSR_CONTEXT_RAM_INIT_COMPLETED \
392 (SMU_SMUCSR_GEN_BIT(CONTEXT_RAM_INIT_COMPLETED))
393
394#define SCU_RAM_INIT_COMPLETED \
395 (\
396 SMU_SMUCSR_CONTEXT_RAM_INIT_COMPLETED \
397 | SMU_SMUCSR_SCHEDULER_RAM_INIT_COMPLETED \
398 )
399
400/* -------------------------------------------------------------------------- */
401
402#define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE0_SHIFT (0)
403#define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE0_MASK (0x00000001)
404#define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE1_SHIFT (1)
405#define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE1_MASK (0x00000002)
406#define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE2_SHIFT (2)
407#define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE2_MASK (0x00000004)
408#define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE3_SHIFT (3)
409#define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE3_MASK (0x00000008)
410#define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE0_SHIFT (8)
411#define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE0_MASK (0x00000100)
412#define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE1_SHIFT (9)
413#define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE1_MASK (0x00000200)
414#define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE2_SHIFT (10)
415#define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE2_MASK (0x00000400)
416#define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE3_SHIFT (11)
417#define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE3_MASK (0x00000800)
418
419#define SMU_RESET_PROTOCOL_ENGINE(peg, pe) \
420 ((1 << (pe)) << ((peg) * 8))
421
422#define SMU_RESET_PEG_PROTOCOL_ENGINES(peg) \
423 (\
424 SMU_RESET_PROTOCOL_ENGINE(peg, 0) \
425 | SMU_RESET_PROTOCOL_ENGINE(peg, 1) \
426 | SMU_RESET_PROTOCOL_ENGINE(peg, 2) \
427 | SMU_RESET_PROTOCOL_ENGINE(peg, 3) \
428 )
429
430#define SMU_RESET_ALL_PROTOCOL_ENGINES() \
431 (\
432 SMU_RESET_PEG_PROTOCOL_ENGINES(0) \
433 | SMU_RESET_PEG_PROTOCOL_ENGINES(1) \
434 )
435
436#define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG0_LP0_SHIFT (16)
437#define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG0_LP0_MASK (0x00010000)
438#define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG0_LP2_SHIFT (17)
439#define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG0_LP2_MASK (0x00020000)
440#define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG1_LP0_SHIFT (18)
441#define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG1_LP0_MASK (0x00040000)
442#define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG1_LP2_SHIFT (19)
443#define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG1_LP2_MASK (0x00080000)
444
445#define SMU_RESET_WIDE_PORT_QUEUE(peg, wide_port) \
446 ((1 << ((wide_port) / 2)) << ((peg) * 2) << 16)
447
448#define SMU_SOFTRESET_CONTROL_RESET_PEG0_SHIFT (20)
449#define SMU_SOFTRESET_CONTROL_RESET_PEG0_MASK (0x00100000)
450#define SMU_SOFTRESET_CONTROL_RESET_PEG1_SHIFT (21)
451#define SMU_SOFTRESET_CONTROL_RESET_PEG1_MASK (0x00200000)
452#define SMU_SOFTRESET_CONTROL_RESET_SCU_SHIFT (22)
453#define SMU_SOFTRESET_CONTROL_RESET_SCU_MASK (0x00400000)
454
455/*
456 * It seems to make sense that if you are going to reset the protocol
457 * engine group that you would also reset all of the protocol engines */
458#define SMU_RESET_PROTOCOL_ENGINE_GROUP(peg) \
459 (\
460 (1 << ((peg) + 20)) \
461 | SMU_RESET_WIDE_PORT_QUEUE(peg, 0) \
462 | SMU_RESET_WIDE_PORT_QUEUE(peg, 1) \
463 | SMU_RESET_PEG_PROTOCOL_ENGINES(peg) \
464 )
465
466#define SMU_RESET_ALL_PROTOCOL_ENGINE_GROUPS() \
467 (\
468 SMU_RESET_PROTOCOL_ENGINE_GROUP(0) \
469 | SMU_RESET_PROTOCOL_ENGINE_GROUP(1) \
470 )
471
472#define SMU_RESET_SCU() (0xFFFFFFFF)
473
474
475
476/* ***************************************************************************** */
477#define SMU_TASK_CONTEXT_ASSIGNMENT_STARTING_SHIFT (0)
478#define SMU_TASK_CONTEXT_ASSIGNMENT_STARTING_MASK (0x00000FFF)
479#define SMU_TASK_CONTEXT_ASSIGNMENT_ENDING_SHIFT (16)
480#define SMU_TASK_CONTEXT_ASSIGNMENT_ENDING_MASK (0x0FFF0000)
481#define SMU_TASK_CONTEXT_ASSIGNMENT_RANGE_CHECK_ENABLE_SHIFT (31)
482#define SMU_TASK_CONTEXT_ASSIGNMENT_RANGE_CHECK_ENABLE_MASK (0x80000000)
483#define SMU_TASK_CONTEXT_ASSIGNMENT_RESERVED_MASK (0x7000F000)
484
485#define SMU_TCA_GEN_VAL(name, value) \
486 SCU_GEN_VALUE(SMU_TASK_CONTEXT_ASSIGNMENT_ ## name, value)
487
488#define SMU_TCA_GEN_BIT(name) \
489 SCU_GEN_BIT(SMU_TASK_CONTEXT_ASSIGNMENT_ ## name)
490
491/* ***************************************************************************** */
492#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_CONTROL_QUEUE_SIZE_SHIFT (0)
493#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_CONTROL_QUEUE_SIZE_MASK (0x00000FFF)
494#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_CONTROL_RESERVED_MASK (0xFFFFF000)
495
496#define SCU_UFQC_GEN_VAL(name, value) \
497 SCU_GEN_VALUE(SCU_SDMA_UNSOLICITED_FRAME_QUEUE_CONTROL_ ## name, value)
498
499#define SCU_UFQC_QUEUE_SIZE_SET(value) \
500 SCU_UFQC_GEN_VAL(QUEUE_SIZE, value)
501
502/* ***************************************************************************** */
503#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_PUT_POINTER_SHIFT (0)
504#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_PUT_POINTER_MASK (0x00000FFF)
505#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_PUT_CYCLE_BIT_SHIFT (12)
506#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_PUT_CYCLE_BIT_MASK (0x00001000)
507#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_PUT_RESERVED_MASK (0xFFFFE000)
508
509#define SCU_UFQPP_GEN_VAL(name, value) \
510 SCU_GEN_VALUE(SCU_SDMA_UNSOLICITED_FRAME_QUEUE_PUT_ ## name, value)
511
512#define SCU_UFQPP_GEN_BIT(name) \
513 SCU_GEN_BIT(SCU_SDMA_UNSOLICITED_FRAME_QUEUE_PUT_ ## name)
514
515/*
516 * *****************************************************************************
517 * * SDMA Registers
518 * ***************************************************************************** */
519#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_POINTER_SHIFT (0)
520#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_POINTER_MASK (0x00000FFF)
521#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_CYCLE_BIT_SHIFT (12)
522#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_CYCLE_BIT_MASK (12)
523#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_ENABLE_BIT_SHIFT (31)
524#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_ENABLE_BIT_MASK (0x80000000)
525#define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_RESERVED_MASK (0x7FFFE000)
526
527#define SCU_UFQGP_GEN_VAL(name, value) \
528 SCU_GEN_VALUE(SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_ ## name, value)
529
530#define SCU_UFQGP_GEN_BIT(name) \
531 SCU_GEN_BIT(SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_ ## name)
532
533#define SCU_UFQGP_CYCLE_BIT(value) \
534 SCU_UFQGP_GEN_BIT(CYCLE_BIT, value)
535
536#define SCU_UFQGP_GET_POINTER(value) \
537 SCU_UFQGP_GEN_VALUE(POINTER, value)
538
539#define SCU_UFQGP_ENABLE(value) \
540 (SCU_UFQGP_GEN_BIT(ENABLE) | value)
541
542#define SCU_UFQGP_DISABLE(value) \
543 (~SCU_UFQGP_GEN_BIT(ENABLE) & value)
544
545#define SCU_UFQGP_VALUE(bit, value) \
546 (SCU_UFQGP_CYCLE_BIT(bit) | SCU_UFQGP_GET_POINTER(value))
547
548/* ***************************************************************************** */
549#define SCU_PDMA_CONFIGURATION_ADDRESS_MODIFIER_SHIFT (0)
550#define SCU_PDMA_CONFIGURATION_ADDRESS_MODIFIER_MASK (0x0000FFFF)
551#define SCU_PDMA_CONFIGURATION_PCI_RELAXED_ORDERING_ENABLE_SHIFT (16)
552#define SCU_PDMA_CONFIGURATION_PCI_RELAXED_ORDERING_ENABLE_MASK (0x00010000)
553#define SCU_PDMA_CONFIGURATION_PCI_NO_SNOOP_ENABLE_SHIFT (17)
554#define SCU_PDMA_CONFIGURATION_PCI_NO_SNOOP_ENABLE_MASK (0x00020000)
555#define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_BYTE_SWAP_SHIFT (18)
556#define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_BYTE_SWAP_MASK (0x00040000)
557#define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_XPI_SGL_FETCH_SHIFT (19)
558#define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_XPI_SGL_FETCH_MASK (0x00080000)
559#define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_XPI_RX_HEADER_RAM_WRITE_SHIFT (20)
560#define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_XPI_RX_HEADER_RAM_WRITE_MASK (0x00100000)
561#define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_XPI_UF_ADDRESS_FETCH_SHIFT (21)
562#define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_XPI_UF_ADDRESS_FETCH_MASK (0x00200000)
563#define SCU_PDMA_CONFIGURATION_ADDRESS_MODIFIER_SELECT_SHIFT (22)
564#define SCU_PDMA_CONFIGURATION_ADDRESS_MODIFIER_SELECT_MASK (0x00400000)
565#define SCU_PDMA_CONFIGURATION_RESERVED_MASK (0xFF800000)
566
567#define SCU_PDMACR_GEN_VALUE(name, value) \
568 SCU_GEN_VALUE(SCU_PDMA_CONFIGURATION_ ## name, value)
569
570#define SCU_PDMACR_GEN_BIT(name) \
571 SCU_GEN_BIT(SCU_PDMA_CONFIGURATION_ ## name)
572
573#define SCU_PDMACR_BE_GEN_BIT(name) \
574 SCU_PCMACR_GEN_BIT(BIG_ENDIAN_CONTROL_ ## name)
575
576/* ***************************************************************************** */
577#define SCU_CDMA_CONFIGURATION_PCI_RELAXED_ORDERING_ENABLE_SHIFT (8)
578#define SCU_CDMA_CONFIGURATION_PCI_RELAXED_ORDERING_ENABLE_MASK (0x00000100)
579
580#define SCU_CDMACR_GEN_BIT(name) \
581 SCU_GEN_BIT(SCU_CDMA_CONFIGURATION_ ## name)
582
583/*
584 * *****************************************************************************
585 * * SCU Link Layer Registers
586 * ***************************************************************************** */
587#define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_TIMEOUT_SHIFT (0)
588#define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_TIMEOUT_MASK (0x000000FF)
589#define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_LOCK_TIME_SHIFT (8)
590#define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_LOCK_TIME_MASK (0x0000FF00)
591#define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_RATE_CHANGE_DELAY_SHIFT (16)
592#define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_RATE_CHANGE_DELAY_MASK (0x00FF0000)
593#define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_DWORD_SYNC_TIMEOUT_SHIFT (24)
594#define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_DWORD_SYNC_TIMEOUT_MASK (0xFF000000)
595#define SCU_LINK_LAYER_SPEED_NECGOIATION_TIMER_VALUES_REQUIRED_MASK (0x00000000)
596#define SCU_LINK_LAYER_SPEED_NECGOIATION_TIMER_VALUES_DEFAULT_MASK (0x7D00676F)
597#define SCU_LINK_LAYER_SPEED_NECGOIATION_TIMER_VALUES_RESERVED_MASK (0x00FF0000)
598
599#define SCU_SAS_SPDTOV_GEN_VALUE(name, value) \
600 SCU_GEN_VALUE(SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_ ## name, value)
601
602
603#define SCU_LINK_STATUS_DWORD_SYNC_AQUIRED_SHIFT (2)
604#define SCU_LINK_STATUS_DWORD_SYNC_AQUIRED_MASK (0x00000004)
605#define SCU_LINK_STATUS_TRANSMIT_PORT_SELECTION_DONE_SHIFT (4)
606#define SCU_LINK_STATUS_TRANSMIT_PORT_SELECTION_DONE_MASK (0x00000010)
607#define SCU_LINK_STATUS_RECEIVER_CREDIT_EXHAUSTED_SHIFT (5)
608#define SCU_LINK_STATUS_RECEIVER_CREDIT_EXHAUSTED_MASK (0x00000020)
609#define SCU_LINK_STATUS_RESERVED_MASK (0xFFFFFFCD)
610
611#define SCU_SAS_LLSTA_GEN_BIT(name) \
612 SCU_GEN_BIT(SCU_LINK_STATUS_ ## name)
613
614
615/* TODO: Where is the SATA_PSELTOV register? */
616
617/*
618 * *****************************************************************************
619 * * SCU SAS Maximum Arbitration Wait Time Timeout Register
620 * ***************************************************************************** */
621#define SCU_SAS_MAX_ARBITRATION_WAIT_TIME_TIMEOUT_VALUE_SHIFT (0)
622#define SCU_SAS_MAX_ARBITRATION_WAIT_TIME_TIMEOUT_VALUE_MASK (0x00007FFF)
623#define SCU_SAS_MAX_ARBITRATION_WAIT_TIME_TIMEOUT_SCALE_SHIFT (15)
624#define SCU_SAS_MAX_ARBITRATION_WAIT_TIME_TIMEOUT_SCALE_MASK (0x00008000)
625
626#define SCU_SAS_MAWTTOV_GEN_VALUE(name, value) \
627 SCU_GEN_VALUE(SCU_SAS_MAX_ARBITRATION_WAIT_TIME_TIMEOUT_ ## name, value)
628
629#define SCU_SAS_MAWTTOV_GEN_BIT(name) \
630 SCU_GEN_BIT(SCU_SAS_MAX_ARBITRATION_WAIT_TIME_TIMEOUT_ ## name)
631
632
633/*
634 * TODO: Where is the SAS_LNKTOV regsiter?
635 * TODO: Where is the SAS_PHYTOV register? */
636
637#define SCU_SAS_TRANSMIT_IDENTIFICATION_SMP_TARGET_SHIFT (1)
638#define SCU_SAS_TRANSMIT_IDENTIFICATION_SMP_TARGET_MASK (0x00000002)
639#define SCU_SAS_TRANSMIT_IDENTIFICATION_STP_TARGET_SHIFT (2)
640#define SCU_SAS_TRANSMIT_IDENTIFICATION_STP_TARGET_MASK (0x00000004)
641#define SCU_SAS_TRANSMIT_IDENTIFICATION_SSP_TARGET_SHIFT (3)
642#define SCU_SAS_TRANSMIT_IDENTIFICATION_SSP_TARGET_MASK (0x00000008)
643#define SCU_SAS_TRANSMIT_IDENTIFICATION_DA_SATA_HOST_SHIFT (8)
644#define SCU_SAS_TRANSMIT_IDENTIFICATION_DA_SATA_HOST_MASK (0x00000100)
645#define SCU_SAS_TRANSMIT_IDENTIFICATION_SMP_INITIATOR_SHIFT (9)
646#define SCU_SAS_TRANSMIT_IDENTIFICATION_SMP_INITIATOR_MASK (0x00000200)
647#define SCU_SAS_TRANSMIT_IDENTIFICATION_STP_INITIATOR_SHIFT (10)
648#define SCU_SAS_TRANSMIT_IDENTIFICATION_STP_INITIATOR_MASK (0x00000400)
649#define SCU_SAS_TRANSMIT_IDENTIFICATION_SSP_INITIATOR_SHIFT (11)
650#define SCU_SAS_TRANSMIT_IDENTIFICATION_SSP_INITIATOR_MASK (0x00000800)
651#define SCU_SAS_TRANSMIT_IDENTIFICATION_REASON_CODE_SHIFT (16)
652#define SCU_SAS_TRANSMIT_IDENTIFICATION_REASON_CODE_MASK (0x000F0000)
653#define SCU_SAS_TRANSMIT_IDENTIFICATION_ADDRESS_FRAME_TYPE_SHIFT (24)
654#define SCU_SAS_TRANSMIT_IDENTIFICATION_ADDRESS_FRAME_TYPE_MASK (0x0F000000)
655#define SCU_SAS_TRANSMIT_IDENTIFICATION_DEVICE_TYPE_SHIFT (28)
656#define SCU_SAS_TRANSMIT_IDENTIFICATION_DEVICE_TYPE_MASK (0x70000000)
657#define SCU_SAS_TRANSMIT_IDENTIFICATION_RESERVED_MASK (0x80F0F1F1)
658
659#define SCU_SAS_TIID_GEN_VAL(name, value) \
660 SCU_GEN_VALUE(SCU_SAS_TRANSMIT_IDENTIFICATION_ ## name, value)
661
662#define SCU_SAS_TIID_GEN_BIT(name) \
663 SCU_GEN_BIT(SCU_SAS_TRANSMIT_IDENTIFICATION_ ## name)
664
665/* SAS Identify Frame PHY Identifier Register */
666#define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_BREAK_REPLY_CAPABLE_SHIFT (16)
667#define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_BREAK_REPLY_CAPABLE_MASK (0x00010000)
668#define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_REQUESTED_INSIDE_ZPSDS_SHIFT (17)
669#define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_REQUESTED_INSIDE_ZPSDS_MASK (0x00020000)
670#define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_INSIDE_ZPSDS_PERSISTENT_SHIFT (18)
671#define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_INSIDE_ZPSDS_PERSISTENT_MASK (0x00040000)
672#define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_ID_SHIFT (24)
673#define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_ID_MASK (0xFF000000)
674#define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_RESERVED_MASK (0x00F800FF)
675
676#define SCU_SAS_TIPID_GEN_VALUE(name, value) \
677 SCU_GEN_VALUE(SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_ ## name, value)
678
679#define SCU_SAS_TIPID_GEN_BIT(name) \
680 SCU_GEN_BIT(SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_ ## name)
681
682
683#define SCU_SAS_PHY_CONFIGURATION_TX_PARITY_CHECK_SHIFT (4)
684#define SCU_SAS_PHY_CONFIGURATION_TX_PARITY_CHECK_MASK (0x00000010)
685#define SCU_SAS_PHY_CONFIGURATION_TX_BAD_CRC_SHIFT (6)
686#define SCU_SAS_PHY_CONFIGURATION_TX_BAD_CRC_MASK (0x00000040)
687#define SCU_SAS_PHY_CONFIGURATION_DISABLE_SCRAMBLER_SHIFT (7)
688#define SCU_SAS_PHY_CONFIGURATION_DISABLE_SCRAMBLER_MASK (0x00000080)
689#define SCU_SAS_PHY_CONFIGURATION_DISABLE_DESCRAMBLER_SHIFT (8)
690#define SCU_SAS_PHY_CONFIGURATION_DISABLE_DESCRAMBLER_MASK (0x00000100)
691#define SCU_SAS_PHY_CONFIGURATION_DISABLE_CREDIT_INSERTION_SHIFT (9)
692#define SCU_SAS_PHY_CONFIGURATION_DISABLE_CREDIT_INSERTION_MASK (0x00000200)
693#define SCU_SAS_PHY_CONFIGURATION_SUSPEND_PROTOCOL_ENGINE_SHIFT (11)
694#define SCU_SAS_PHY_CONFIGURATION_SUSPEND_PROTOCOL_ENGINE_MASK (0x00000800)
695#define SCU_SAS_PHY_CONFIGURATION_SATA_SPINUP_HOLD_SHIFT (12)
696#define SCU_SAS_PHY_CONFIGURATION_SATA_SPINUP_HOLD_MASK (0x00001000)
697#define SCU_SAS_PHY_CONFIGURATION_TRANSMIT_PORT_SELECTION_SIGNAL_SHIFT (13)
698#define SCU_SAS_PHY_CONFIGURATION_TRANSMIT_PORT_SELECTION_SIGNAL_MASK (0x00002000)
699#define SCU_SAS_PHY_CONFIGURATION_HARD_RESET_SHIFT (14)
700#define SCU_SAS_PHY_CONFIGURATION_HARD_RESET_MASK (0x00004000)
701#define SCU_SAS_PHY_CONFIGURATION_OOB_ENABLE_SHIFT (15)
702#define SCU_SAS_PHY_CONFIGURATION_OOB_ENABLE_MASK (0x00008000)
703#define SCU_SAS_PHY_CONFIGURATION_ENABLE_FRAME_TX_INSERT_ALIGN_SHIFT (23)
704#define SCU_SAS_PHY_CONFIGURATION_ENABLE_FRAME_TX_INSERT_ALIGN_MASK (0x00800000)
705#define SCU_SAS_PHY_CONFIGURATION_FORWARD_IDENTIFY_FRAME_SHIFT (27)
706#define SCU_SAS_PHY_CONFIGURATION_FORWARD_IDENTIFY_FRAME_MASK (0x08000000)
707#define SCU_SAS_PHY_CONFIGURATION_DISABLE_BYTE_TRANSPOSE_STP_FRAME_SHIFT (28)
708#define SCU_SAS_PHY_CONFIGURATION_DISABLE_BYTE_TRANSPOSE_STP_FRAME_MASK (0x10000000)
709#define SCU_SAS_PHY_CONFIGURATION_OOB_RESET_SHIFT (29)
710#define SCU_SAS_PHY_CONFIGURATION_OOB_RESET_MASK (0x20000000)
711#define SCU_SAS_PHY_CONFIGURATION_THREE_IAF_ENABLE_SHIFT (30)
712#define SCU_SAS_PHY_CONFIGURATION_THREE_IAF_ENABLE_MASK (0x40000000)
713#define SCU_SAS_PHY_CONFIGURATION_OOB_ALIGN0_ENABLE_SHIFT (31)
714#define SCU_SAS_PHY_CONFIGURATION_OOB_ALIGN0_ENABLE_MASK (0x80000000)
715#define SCU_SAS_PHY_CONFIGURATION_REQUIRED_MASK (0x0100000F)
716#define SCU_SAS_PHY_CONFIGURATION_DEFAULT_MASK (0x4180100F)
717#define SCU_SAS_PHY_CONFIGURATION_RESERVED_MASK (0x00000000)
718
719#define SCU_SAS_PCFG_GEN_BIT(name) \
720 SCU_GEN_BIT(SCU_SAS_PHY_CONFIGURATION_ ## name)
721
722#define SCU_LINK_LAYER_ALIGN_INSERTION_FREQUENCY_GENERAL_SHIFT (0)
723#define SCU_LINK_LAYER_ALIGN_INSERTION_FREQUENCY_GENERAL_MASK (0x000007FF)
724#define SCU_LINK_LAYER_ALIGN_INSERTION_FREQUENCY_CONNECTED_SHIFT (16)
725#define SCU_LINK_LAYER_ALIGN_INSERTION_FREQUENCY_CONNECTED_MASK (0x00ff0000)
726
727#define SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(name, value) \
728 SCU_GEN_VALUE(SCU_LINK_LAYER_ALIGN_INSERTION_FREQUENCY_##name, value)
729
730#define SCU_LINK_LAYER_ENABLE_SPINUP_CONTROL_COUNT_SHIFT (0)
731#define SCU_LINK_LAYER_ENABLE_SPINUP_CONTROL_COUNT_MASK (0x0003FFFF)
732#define SCU_LINK_LAYER_ENABLE_SPINUP_CONTROL_ENABLE_SHIFT (31)
733#define SCU_LINK_LAYER_ENABLE_SPINUP_CONTROL_ENABLE_MASK (0x80000000)
734#define SCU_LINK_LAYER_ENABLE_SPINUP_CONTROL_RESERVED_MASK (0x7FFC0000)
735
736#define SCU_ENSPINUP_GEN_VAL(name, value) \
737 SCU_GEN_VALUE(SCU_LINK_LAYER_ENABLE_SPINUP_CONTROL_ ## name, value)
738
739#define SCU_ENSPINUP_GEN_BIT(name) \
740 SCU_GEN_BIT(SCU_LINK_LAYER_ENABLE_SPINUP_CONTROL_ ## name)
741
742
743#define SCU_LINK_LAYER_PHY_CAPABILITIES_TXSSCTYPE_SHIFT (1)
744#define SCU_LINK_LAYER_PHY_CAPABILITIES_TXSSCTYPE_MASK (0x00000002)
745#define SCU_LINK_LAYER_PHY_CAPABILITIES_RLLRATE_SHIFT (4)
746#define SCU_LINK_LAYER_PHY_CAPABILITIES_RLLRATE_MASK (0x000000F0)
747#define SCU_LINK_LAYER_PHY_CAPABILITIES_SWO15GBPS_SHIFT (8)
748#define SCU_LINK_LAYER_PHY_CAPABILITIES_SWO15GBPS_MASK (0x00000100)
749#define SCU_LINK_LAYER_PHY_CAPABILITIES_SW15GBPS_SHIFT (9)
750#define SCU_LINK_LAYER_PHY_CAPABILITIES_SW15GBPS_MASK (0x00000201)
751#define SCU_LINK_LAYER_PHY_CAPABILITIES_SWO30GBPS_SHIFT (10)
752#define SCU_LINK_LAYER_PHY_CAPABILITIES_SWO30GBPS_MASK (0x00000401)
753#define SCU_LINK_LAYER_PHY_CAPABILITIES_SW30GBPS_SHIFT (11)
754#define SCU_LINK_LAYER_PHY_CAPABILITIES_SW30GBPS_MASK (0x00000801)
755#define SCU_LINK_LAYER_PHY_CAPABILITIES_SWO60GBPS_SHIFT (12)
756#define SCU_LINK_LAYER_PHY_CAPABILITIES_SWO60GBPS_MASK (0x00001001)
757#define SCU_LINK_LAYER_PHY_CAPABILITIES_SW60GBPS_SHIFT (13)
758#define SCU_LINK_LAYER_PHY_CAPABILITIES_SW60GBPS_MASK (0x00002001)
759#define SCU_LINK_LAYER_PHY_CAPABILITIES_EVEN_PARITY_SHIFT (31)
760#define SCU_LINK_LAYER_PHY_CAPABILITIES_EVEN_PARITY_MASK (0x80000000)
761#define SCU_LINK_LAYER_PHY_CAPABILITIES_DEFAULT_MASK (0x00003F01)
762#define SCU_LINK_LAYER_PHY_CAPABILITIES_REQUIRED_MASK (0x00000001)
763#define SCU_LINK_LAYER_PHY_CAPABILITIES_RESERVED_MASK (0x7FFFC00D)
764
765#define SCU_SAS_PHYCAP_GEN_VAL(name, value) \
766 SCU_GEN_VALUE(SCU_LINK_LAYER_PHY_CAPABILITIES_ ## name, value)
767
768#define SCU_SAS_PHYCAP_GEN_BIT(name) \
769 SCU_GEN_BIT(SCU_LINK_LAYER_PHY_CAPABILITIES_ ## name)
770
771
772#define SCU_LINK_LAYER_PHY_SOURCE_ZONE_GROUP_CONTROL_VIRTUAL_EXPANDER_PHY_ZONE_GROUP_SHIFT (0)
773#define SCU_LINK_LAYER_PHY_SOURCE_ZONE_GROUP_CONTROL_VIRTUAL_EXPANDER_PHY_ZONE_GROUP_MASK (0x000000FF)
774#define SCU_LINK_LAYER_PHY_SOURCE_ZONE_GROUP_CONTROL_INSIDE_SOURCE_ZONE_GROUP_SHIFT (31)
775#define SCU_LINK_LAYER_PHY_SOURCE_ZONE_GROUP_CONTROL_INSIDE_SOURCE_ZONE_GROUP_MASK (0x80000000)
776#define SCU_LINK_LAYER_PHY_SOURCE_ZONE_GROUP_CONTROL_RESERVED_MASK (0x7FFFFF00)
777
778#define SCU_PSZGCR_GEN_VAL(name, value) \
779 SCU_GEN_VALUE(SCU_LINK_LAYER_PHY_SOURCE_ZONE_GROUP_CONTROL_ ## name, value)
780
781#define SCU_PSZGCR_GEN_BIT(name) \
782 SCU_GEN_BIT(SCU_LINK_LAYER_PHY_SOURCE_ZONE_GROUP_CONTROL_ ## name)
783
784#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE0_LOCKED_SHIFT (1)
785#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE0_LOCKED_MASK (0x00000002)
786#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE0_UPDATING_SHIFT (2)
787#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE0_UPDATING_MASK (0x00000004)
788#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE1_LOCKED_SHIFT (4)
789#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE1_LOCKED_MASK (0x00000010)
790#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE1_UPDATING_SHIFT (5)
791#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE1_UPDATING_MASK (0x00000020)
792#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE0_SHIFT (16)
793#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE0_MASK (0x00030000)
794#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE0_SHIFT (19)
795#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE0_MASK (0x00080000)
796#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE1_SHIFT (20)
797#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE1_MASK (0x00300000)
798#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE1_SHIFT (23)
799#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE1_MASK (0x00800000)
800#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE2_SHIFT (24)
801#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE2_MASK (0x03000000)
802#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE2_SHIFT (27)
803#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE2_MASK (0x08000000)
804#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE3_SHIFT (28)
805#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE3_MASK (0x30000000)
806#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE3_SHIFT (31)
807#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE3_MASK (0x80000000)
808#define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_RESERVED_MASK (0x4444FFC9)
809
810#define SCU_PEG_SCUVZECR_GEN_VAL(name, val) \
811 SCU_GEN_VALUE(SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ ## name, val)
812
813#define SCU_PEG_SCUVZECR_GEN_BIT(name) \
814 SCU_GEN_BIT(SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ ## name)
815
816
817/*
818 * *****************************************************************************
819 * * Port Task Scheduler registers shift and mask values
820 * ***************************************************************************** */
821#define SCU_PTSG_CONTROL_IT_NEXUS_TIMEOUT_SHIFT (0)
822#define SCU_PTSG_CONTROL_IT_NEXUS_TIMEOUT_MASK (0x0000FFFF)
823#define SCU_PTSG_CONTROL_TASK_TIMEOUT_SHIFT (16)
824#define SCU_PTSG_CONTROL_TASK_TIMEOUT_MASK (0x00FF0000)
825#define SCU_PTSG_CONTROL_PTSG_ENABLE_SHIFT (24)
826#define SCU_PTSG_CONTROL_PTSG_ENABLE_MASK (0x01000000)
827#define SCU_PTSG_CONTROL_ETM_ENABLE_SHIFT (25)
828#define SCU_PTSG_CONTROL_ETM_ENABLE_MASK (0x02000000)
829#define SCU_PTSG_CONTROL_DEFAULT_MASK (0x00020002)
830#define SCU_PTSG_CONTROL_REQUIRED_MASK (0x00000000)
831#define SCU_PTSG_CONTROL_RESERVED_MASK (0xFC000000)
832
833#define SCU_PTSGCR_GEN_VAL(name, val) \
834 SCU_GEN_VALUE(SCU_PTSG_CONTROL_ ## name, val)
835
836#define SCU_PTSGCR_GEN_BIT(name) \
837 SCU_GEN_BIT(SCU_PTSG_CONTROL_ ## name)
838
839
840/* ***************************************************************************** */
841#define SCU_PTSG_REAL_TIME_CLOCK_SHIFT (0)
842#define SCU_PTSG_REAL_TIME_CLOCK_MASK (0x0000FFFF)
843#define SCU_PTSG_REAL_TIME_CLOCK_RESERVED_MASK (0xFFFF0000)
844
845#define SCU_RTCR_GEN_VAL(name, val) \
846 SCU_GEN_VALUE(SCU_PTSG_ ## name, val)
847
848
849#define SCU_PTSG_REAL_TIME_CLOCK_CONTROL_PRESCALER_VALUE_SHIFT (0)
850#define SCU_PTSG_REAL_TIME_CLOCK_CONTROL_PRESCALER_VALUE_MASK (0x00FFFFFF)
851#define SCU_PTSG_REAL_TIME_CLOCK_CONTROL_RESERVED_MASK (0xFF000000)
852
853#define SCU_RTCCR_GEN_VAL(name, val) \
854 SCU_GEN_VALUE(SCU_PTSG_REAL_TIME_CLOCK_CONTROL_ ## name, val)
855
856
857#define SCU_PTSG_PORT_TASK_SCHEDULER_CONTROL_SUSPEND_SHIFT (0)
858#define SCU_PTSG_PORT_TASK_SCHEDULER_CONTROL_SUSPEND_MASK (0x00000001)
859#define SCU_PTSG_PORT_TASK_SCHEDULER_CONTROL_ENABLE_SHIFT (1)
860#define SCU_PTSG_PORT_TASK_SCHEDULER_CONTROL_ENABLE_MASK (0x00000002)
861#define SCU_PTSG_PORT_TASK_SCHEDULER_CONTROL_RESERVED_MASK (0xFFFFFFFC)
862
863#define SCU_PTSxCR_GEN_BIT(name) \
864 SCU_GEN_BIT(SCU_PTSG_PORT_TASK_SCHEDULER_CONTROL_ ## name)
865
866
867#define SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_NEXT_RN_VALID_SHIFT (0)
868#define SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_NEXT_RN_VALID_MASK (0x00000001)
869#define SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_ACTIVE_RNSC_LIST_VALID_SHIFT (1)
870#define SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_ACTIVE_RNSC_LIST_VALID_MASK (0x00000002)
871#define SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_PTS_SUSPENDED_SHIFT (2)
872#define SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_PTS_SUSPENDED_MASK (0x00000004)
873#define SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_RESERVED_MASK (0xFFFFFFF8)
874
875#define SCU_PTSxSR_GEN_BIT(name) \
876 SCU_GEN_BIT(SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_ ## name)
877
878
879/*
880 * *****************************************************************************
881 * * SGPIO Register shift and mask values
882 * ***************************************************************************** */
883#define SCU_SGPIO_CONTROL_SGPIO_ENABLE_SHIFT (0)
884#define SCU_SGPIO_CONTROL_SGPIO_ENABLE_MASK (0x00000001)
885#define SCU_SGPIO_CONTROL_SGPIO_SERIAL_CLOCK_SELECT_SHIFT (1)
886#define SCU_SGPIO_CONTROL_SGPIO_SERIAL_CLOCK_SELECT_MASK (0x00000002)
887#define SCU_SGPIO_CONTROL_SGPIO_SERIAL_SHIFT_WIDTH_SELECT_SHIFT (2)
888#define SCU_SGPIO_CONTROL_SGPIO_SERIAL_SHIFT_WIDTH_SELECT_MASK (0x00000004)
889#define SCU_SGPIO_CONTROL_SGPIO_TEST_BIT_SHIFT (15)
890#define SCU_SGPIO_CONTROL_SGPIO_TEST_BIT_MASK (0x00008000)
891#define SCU_SGPIO_CONTROL_SGPIO_RESERVED_MASK (0xFFFF7FF8)
892
893#define SCU_SGICRx_GEN_BIT(name) \
894 SCU_GEN_BIT(SCU_SGPIO_CONTROL_SGPIO_ ## name)
895
896#define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R0_SHIFT (0)
897#define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R0_MASK (0x0000000F)
898#define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R1_SHIFT (4)
899#define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R1_MASK (0x000000F0)
900#define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R2_SHIFT (8)
901#define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R2_MASK (0x00000F00)
902#define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R3_SHIFT (12)
903#define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R3_MASK (0x0000F000)
904#define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_RESERVED_MASK (0xFFFF0000)
905
906#define SCU_SGPBRx_GEN_VAL(name, value) \
907 SCU_GEN_VALUE(SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_ ## name, value)
908
909#define SCU_SGPIO_START_DRIVE_LOWER_R0_SHIFT (0)
910#define SCU_SGPIO_START_DRIVE_LOWER_R0_MASK (0x00000003)
911#define SCU_SGPIO_START_DRIVE_LOWER_R1_SHIFT (4)
912#define SCU_SGPIO_START_DRIVE_LOWER_R1_MASK (0x00000030)
913#define SCU_SGPIO_START_DRIVE_LOWER_R2_SHIFT (8)
914#define SCU_SGPIO_START_DRIVE_LOWER_R2_MASK (0x00000300)
915#define SCU_SGPIO_START_DRIVE_LOWER_R3_SHIFT (12)
916#define SCU_SGPIO_START_DRIVE_LOWER_R3_MASK (0x00003000)
917#define SCU_SGPIO_START_DRIVE_LOWER_RESERVED_MASK (0xFFFF8888)
918
919#define SCU_SGSDLRx_GEN_VAL(name, value) \
920 SCU_GEN_VALUE(SCU_SGPIO_START_DRIVE_LOWER_ ## name, value)
921
922#define SCU_SGPIO_START_DRIVE_UPPER_R0_SHIFT (0)
923#define SCU_SGPIO_START_DRIVE_UPPER_R0_MASK (0x00000003)
924#define SCU_SGPIO_START_DRIVE_UPPER_R1_SHIFT (4)
925#define SCU_SGPIO_START_DRIVE_UPPER_R1_MASK (0x00000030)
926#define SCU_SGPIO_START_DRIVE_UPPER_R2_SHIFT (8)
927#define SCU_SGPIO_START_DRIVE_UPPER_R2_MASK (0x00000300)
928#define SCU_SGPIO_START_DRIVE_UPPER_R3_SHIFT (12)
929#define SCU_SGPIO_START_DRIVE_UPPER_R3_MASK (0x00003000)
930#define SCU_SGPIO_START_DRIVE_UPPER_RESERVED_MASK (0xFFFF8888)
931
932#define SCU_SGSDURx_GEN_VAL(name, value) \
933 SCU_GEN_VALUE(SCU_SGPIO_START_DRIVE_LOWER_ ## name, value)
934
935#define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D0_SHIFT (0)
936#define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D0_MASK (0x00000003)
937#define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D1_SHIFT (4)
938#define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D1_MASK (0x00000030)
939#define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D2_SHIFT (8)
940#define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D2_MASK (0x00000300)
941#define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D3_SHIFT (12)
942#define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D3_MASK (0x00003000)
943#define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_RESERVED_MASK (0xFFFF8888)
944
945#define SCU_SGSIDLRx_GEN_VAL(name, value) \
946 SCU_GEN_VALUE(SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_ ## name, value)
947
948#define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D0_SHIFT (0)
949#define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D0_MASK (0x00000003)
950#define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D1_SHIFT (4)
951#define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D1_MASK (0x00000030)
952#define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D2_SHIFT (8)
953#define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D2_MASK (0x00000300)
954#define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D3_SHIFT (12)
955#define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D3_MASK (0x00003000)
956#define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_RESERVED_MASK (0xFFFF8888)
957
958#define SCU_SGSIDURx_GEN_VAL(name, value) \
959 SCU_GEN_VALUE(SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_ ## name, value)
960
961#define SCU_SGPIO_VENDOR_SPECIFIC_CODE_SHIFT (0)
962#define SCU_SGPIO_VENDOR_SPECIFIC_CODE_MASK (0x0000000F)
963#define SCU_SGPIO_VENDOR_SPECIFIC_CODE_RESERVED_MASK (0xFFFFFFF0)
964
965#define SCU_SGVSCR_GEN_VAL(value) \
966 SCU_GEN_VALUE(SCU_SGPIO_VENDOR_SPECIFIC_CODE ## name, value)
967
968#define SCU_SGPIO_OUPUT_DATA_SELECT_INPUT_DATA0_SHIFT (0)
969#define SCU_SGPIO_OUPUT_DATA_SELECT_INPUT_DATA0_MASK (0x00000003)
970#define SCU_SGPIO_OUPUT_DATA_SELECT_INVERT_INPUT_DATA0_SHIFT (2)
971#define SCU_SGPIO_OUPUT_DATA_SELECT_INVERT_INPUT_DATA0_MASK (0x00000004)
972#define SCU_SGPIO_OUPUT_DATA_SELECT_JOG_ENABLE_DATA0_SHIFT (3)
973#define SCU_SGPIO_OUPUT_DATA_SELECT_JOG_ENABLE_DATA0_MASK (0x00000008)
974#define SCU_SGPIO_OUPUT_DATA_SELECT_INPUT_DATA1_SHIFT (4)
975#define SCU_SGPIO_OUPUT_DATA_SELECT_INPUT_DATA1_MASK (0x00000030)
976#define SCU_SGPIO_OUPUT_DATA_SELECT_INVERT_INPUT_DATA1_SHIFT (6)
977#define SCU_SGPIO_OUPUT_DATA_SELECT_INVERT_INPUT_DATA1_MASK (0x00000040)
978#define SCU_SGPIO_OUPUT_DATA_SELECT_JOG_ENABLE_DATA1_SHIFT (7)
979#define SCU_SGPIO_OUPUT_DATA_SELECT_JOG_ENABLE_DATA1_MASK (0x00000080)
980#define SCU_SGPIO_OUPUT_DATA_SELECT_INPUT_DATA2_SHIFT (8)
981#define SCU_SGPIO_OUPUT_DATA_SELECT_INPUT_DATA2_MASK (0x00000300)
982#define SCU_SGPIO_OUPUT_DATA_SELECT_INVERT_INPUT_DATA2_SHIFT (10)
983#define SCU_SGPIO_OUPUT_DATA_SELECT_INVERT_INPUT_DATA2_MASK (0x00000400)
984#define SCU_SGPIO_OUPUT_DATA_SELECT_JOG_ENABLE_DATA2_SHIFT (11)
985#define SCU_SGPIO_OUPUT_DATA_SELECT_JOG_ENABLE_DATA2_MASK (0x00000800)
986#define SCU_SGPIO_OUPUT_DATA_SELECT_RESERVED_MASK (0xFFFFF000)
987
988#define SCU_SGODSR_GEN_VAL(name, value) \
989 SCU_GEN_VALUE(SCU_SGPIO_OUPUT_DATA_SELECT_ ## name, value)
990
991#define SCU_SGODSR_GEN_BIT(name) \
992 SCU_GEN_BIT(SCU_SGPIO_OUPUT_DATA_SELECT_ ## name)
993
994/*
995 * *****************************************************************************
996 * * SMU Registers
997 * ***************************************************************************** */
998
999/*
1000 * ----------------------------------------------------------------------------
1001 * SMU Registers
1002 * These registers are based off of BAR0
1003 *
1004 * To calculate the offset for other functions use
1005 * BAR0 + FN# * SystemPageSize * 2
1006 *
1007 * The TCA is only accessable from FN#0 (Physical Function) and each
1008 * is programmed by (BAR0 + SCU_SMU_TCA_OFFSET + (FN# * 0x04)) or
1009 * TCA0 for FN#0 is at BAR0 + 0x0400
1010 * TCA1 for FN#1 is at BAR0 + 0x0404
1011 * etc.
1012 * ----------------------------------------------------------------------------
1013 * Accessable to all FN#s */
1014#define SCU_SMU_PCP_OFFSET 0x0000
1015#define SCU_SMU_AMR_OFFSET 0x0004
1016#define SCU_SMU_ISR_OFFSET 0x0010
1017#define SCU_SMU_IMR_OFFSET 0x0014
1018#define SCU_SMU_ICC_OFFSET 0x0018
1019#define SCU_SMU_HTTLBAR_OFFSET 0x0020
1020#define SCU_SMU_HTTUBAR_OFFSET 0x0024
1021#define SCU_SMU_TCR_OFFSET 0x0028
1022#define SCU_SMU_CQLBAR_OFFSET 0x0030
1023#define SCU_SMU_CQUBAR_OFFSET 0x0034
1024#define SCU_SMU_CQPR_OFFSET 0x0040
1025#define SCU_SMU_CQGR_OFFSET 0x0044
1026#define SCU_SMU_CQC_OFFSET 0x0048
1027/* Accessable to FN#0 only */
1028#define SCU_SMU_RNCLBAR_OFFSET 0x0080
1029#define SCU_SMU_RNCUBAR_OFFSET 0x0084
1030#define SCU_SMU_DCC_OFFSET 0x0090
1031#define SCU_SMU_DFC_OFFSET 0x0094
1032#define SCU_SMU_SMUCSR_OFFSET 0x0098
1033#define SCU_SMU_SCUSRCR_OFFSET 0x009C
1034#define SCU_SMU_SMAW_OFFSET 0x00A0
1035#define SCU_SMU_SMDW_OFFSET 0x00A4
1036/* Accessable to FN#0 only */
1037#define SCU_SMU_TCA_OFFSET 0x0400
1038/* Accessable to all FN#s */
1039#define SCU_SMU_MT_MLAR0_OFFSET 0x2000
1040#define SCU_SMU_MT_MUAR0_OFFSET 0x2004
1041#define SCU_SMU_MT_MDR0_OFFSET 0x2008
1042#define SCU_SMU_MT_VCR0_OFFSET 0x200C
1043#define SCU_SMU_MT_MLAR1_OFFSET 0x2010
1044#define SCU_SMU_MT_MUAR1_OFFSET 0x2014
1045#define SCU_SMU_MT_MDR1_OFFSET 0x2018
1046#define SCU_SMU_MT_VCR1_OFFSET 0x201C
1047#define SCU_SMU_MPBA_OFFSET 0x3000
1048
1049/**
1050 * struct smu_registers - These are the SMU registers
1051 *
1052 *
1053 */
1054struct smu_registers {
1055/* 0x0000 PCP */
1056 u32 post_context_port;
1057/* 0x0004 AMR */
1058 u32 address_modifier;
1059 u32 reserved_08;
1060 u32 reserved_0C;
1061/* 0x0010 ISR */
1062 u32 interrupt_status;
1063/* 0x0014 IMR */
1064 u32 interrupt_mask;
1065/* 0x0018 ICC */
1066 u32 interrupt_coalesce_control;
1067 u32 reserved_1C;
1068/* 0x0020 HTTLBAR */
1069 u32 host_task_table_lower;
1070/* 0x0024 HTTUBAR */
1071 u32 host_task_table_upper;
1072/* 0x0028 TCR */
1073 u32 task_context_range;
1074 u32 reserved_2C;
1075/* 0x0030 CQLBAR */
1076 u32 completion_queue_lower;
1077/* 0x0034 CQUBAR */
1078 u32 completion_queue_upper;
1079 u32 reserved_38;
1080 u32 reserved_3C;
1081/* 0x0040 CQPR */
1082 u32 completion_queue_put;
1083/* 0x0044 CQGR */
1084 u32 completion_queue_get;
1085/* 0x0048 CQC */
1086 u32 completion_queue_control;
1087 u32 reserved_4C;
1088 u32 reserved_5x[4];
1089 u32 reserved_6x[4];
1090 u32 reserved_7x[4];
1091/*
1092 * Accessable to FN#0 only
1093 * 0x0080 RNCLBAR */
1094 u32 remote_node_context_lower;
1095/* 0x0084 RNCUBAR */
1096 u32 remote_node_context_upper;
1097 u32 reserved_88;
1098 u32 reserved_8C;
1099/* 0x0090 DCC */
1100 u32 device_context_capacity;
1101/* 0x0094 DFC */
1102 u32 device_function_capacity;
1103/* 0x0098 SMUCSR */
1104 u32 control_status;
1105/* 0x009C SCUSRCR */
1106 u32 soft_reset_control;
1107/* 0x00A0 SMAW */
1108 u32 mmr_address_window;
1109/* 0x00A4 SMDW */
1110 u32 mmr_data_window;
1111 u32 reserved_A8;
1112 u32 reserved_AC;
1113/* A whole bunch of reserved space */
1114 u32 reserved_Bx[4];
1115 u32 reserved_Cx[4];
1116 u32 reserved_Dx[4];
1117 u32 reserved_Ex[4];
1118 u32 reserved_Fx[4];
1119 u32 reserved_1xx[64];
1120 u32 reserved_2xx[64];
1121 u32 reserved_3xx[64];
1122/*
1123 * Accessable to FN#0 only
1124 * 0x0400 TCA */
1125 u32 task_context_assignment[256];
1126/* MSI-X registers not included */
1127};
1128
1129/*
1130 * *****************************************************************************
1131 * SDMA Registers
1132 * ***************************************************************************** */
1133#define SCU_SDMA_BASE 0x6000
1134#define SCU_SDMA_PUFATLHAR_OFFSET 0x0000
1135#define SCU_SDMA_PUFATUHAR_OFFSET 0x0004
1136#define SCU_SDMA_UFLHBAR_OFFSET 0x0008
1137#define SCU_SDMA_UFUHBAR_OFFSET 0x000C
1138#define SCU_SDMA_UFQC_OFFSET 0x0010
1139#define SCU_SDMA_UFQPP_OFFSET 0x0014
1140#define SCU_SDMA_UFQGP_OFFSET 0x0018
1141#define SCU_SDMA_PDMACR_OFFSET 0x001C
1142#define SCU_SDMA_CDMACR_OFFSET 0x0080
1143
1144/**
1145 * struct scu_sdma_registers - These are the SCU SDMA Registers
1146 *
1147 *
1148 */
1149struct scu_sdma_registers {
1150/* 0x0000 PUFATLHAR */
1151 u32 uf_address_table_lower;
1152/* 0x0004 PUFATUHAR */
1153 u32 uf_address_table_upper;
1154/* 0x0008 UFLHBAR */
1155 u32 uf_header_base_address_lower;
1156/* 0x000C UFUHBAR */
1157 u32 uf_header_base_address_upper;
1158/* 0x0010 UFQC */
1159 u32 unsolicited_frame_queue_control;
1160/* 0x0014 UFQPP */
1161 u32 unsolicited_frame_put_pointer;
1162/* 0x0018 UFQGP */
1163 u32 unsolicited_frame_get_pointer;
1164/* 0x001C PDMACR */
1165 u32 pdma_configuration;
1166/* Reserved until offset 0x80 */
1167 u32 reserved_0020_007C[0x18];
1168/* 0x0080 CDMACR */
1169 u32 cdma_configuration;
1170/* Remainder SDMA register space */
1171 u32 reserved_0084_0400[0xDF];
1172
1173};
1174
1175/*
1176 * *****************************************************************************
1177 * * SCU Link Registers
1178 * ***************************************************************************** */
1179#define SCU_PEG0_OFFSET 0x0000
1180#define SCU_PEG1_OFFSET 0x8000
1181
1182#define SCU_TL0_OFFSET 0x0000
1183#define SCU_TL1_OFFSET 0x0400
1184#define SCU_TL2_OFFSET 0x0800
1185#define SCU_TL3_OFFSET 0x0C00
1186
1187#define SCU_LL_OFFSET 0x0080
1188#define SCU_LL0_OFFSET (SCU_TL0_OFFSET + SCU_LL_OFFSET)
1189#define SCU_LL1_OFFSET (SCU_TL1_OFFSET + SCU_LL_OFFSET)
1190#define SCU_LL2_OFFSET (SCU_TL2_OFFSET + SCU_LL_OFFSET)
1191#define SCU_LL3_OFFSET (SCU_TL3_OFFSET + SCU_LL_OFFSET)
1192
1193/* Transport Layer Offsets (PEG + TL) */
1194#define SCU_TLCR_OFFSET 0x0000
1195#define SCU_TLADTR_OFFSET 0x0004
1196#define SCU_TLTTMR_OFFSET 0x0008
1197#define SCU_TLEECR0_OFFSET 0x000C
1198#define SCU_STPTLDARNI_OFFSET 0x0010
1199
1200
1201#define SCU_TLCR_HASH_SAS_CHECKING_ENABLE_SHIFT (0)
1202#define SCU_TLCR_HASH_SAS_CHECKING_ENABLE_MASK (0x00000001)
1203#define SCU_TLCR_CLEAR_TCI_NCQ_MAPPING_TABLE_SHIFT (1)
1204#define SCU_TLCR_CLEAR_TCI_NCQ_MAPPING_TABLE_MASK (0x00000002)
1205#define SCU_TLCR_STP_WRITE_DATA_PREFETCH_SHIFT (3)
1206#define SCU_TLCR_STP_WRITE_DATA_PREFETCH_MASK (0x00000008)
1207#define SCU_TLCR_CMD_NAK_STATUS_CODE_SHIFT (4)
1208#define SCU_TLCR_CMD_NAK_STATUS_CODE_MASK (0x00000010)
1209#define SCU_TLCR_RESERVED_MASK (0xFFFFFFEB)
1210
1211#define SCU_TLCR_GEN_BIT(name) \
1212 SCU_GEN_BIT(SCU_TLCR_ ## name)
1213
1214/**
1215 * struct scu_transport_layer_registers - These are the SCU Transport Layer
1216 * registers
1217 *
1218 *
1219 */
1220struct scu_transport_layer_registers {
1221 /* 0x0000 TLCR */
1222 u32 control;
1223 /* 0x0004 TLADTR */
1224 u32 arbitration_delay_timer;
1225 /* 0x0008 TLTTMR */
1226 u32 timer_test_mode;
1227 /* 0x000C reserved */
1228 u32 reserved_0C;
1229 /* 0x0010 STPTLDARNI */
1230 u32 stp_rni;
1231 /* 0x0014 TLFEWPORCTRL */
1232 u32 tlfe_wpo_read_control;
1233 /* 0x0018 TLFEWPORDATA */
1234 u32 tlfe_wpo_read_data;
1235 /* 0x001C RXTLSSCSR1 */
1236 u32 rxtl_single_step_control_status_1;
1237 /* 0x0020 RXTLSSCSR2 */
1238 u32 rxtl_single_step_control_status_2;
1239 /* 0x0024 AWTRDDCR */
1240 u32 tlfe_awt_retry_delay_debug_control;
1241 /* Remainder of TL memory space */
1242 u32 reserved_0028_007F[0x16];
1243
1244};
1245
1246/* Protocol Engine Group Registers */
1247#define SCU_SCUVZECRx_OFFSET 0x1080
1248
1249/* Link Layer Offsets (PEG + TL + LL) */
1250#define SCU_SAS_SPDTOV_OFFSET 0x0000
1251#define SCU_SAS_LLSTA_OFFSET 0x0004
1252#define SCU_SATA_PSELTOV_OFFSET 0x0008
1253#define SCU_SAS_TIMETOV_OFFSET 0x0010
1254#define SCU_SAS_LOSTOT_OFFSET 0x0014
1255#define SCU_SAS_LNKTOV_OFFSET 0x0018
1256#define SCU_SAS_PHYTOV_OFFSET 0x001C
1257#define SCU_SAS_AFERCNT_OFFSET 0x0020
1258#define SCU_SAS_WERCNT_OFFSET 0x0024
1259#define SCU_SAS_TIID_OFFSET 0x0028
1260#define SCU_SAS_TIDNH_OFFSET 0x002C
1261#define SCU_SAS_TIDNL_OFFSET 0x0030
1262#define SCU_SAS_TISSAH_OFFSET 0x0034
1263#define SCU_SAS_TISSAL_OFFSET 0x0038
1264#define SCU_SAS_TIPID_OFFSET 0x003C
1265#define SCU_SAS_TIRES2_OFFSET 0x0040
1266#define SCU_SAS_ADRSTA_OFFSET 0x0044
1267#define SCU_SAS_MAWTTOV_OFFSET 0x0048
1268#define SCU_SAS_FRPLDFIL_OFFSET 0x0054
1269#define SCU_SAS_RFCNT_OFFSET 0x0060
1270#define SCU_SAS_TFCNT_OFFSET 0x0064
1271#define SCU_SAS_RFDCNT_OFFSET 0x0068
1272#define SCU_SAS_TFDCNT_OFFSET 0x006C
1273#define SCU_SAS_LERCNT_OFFSET 0x0070
1274#define SCU_SAS_RDISERRCNT_OFFSET 0x0074
1275#define SCU_SAS_CRERCNT_OFFSET 0x0078
1276#define SCU_STPCTL_OFFSET 0x007C
1277#define SCU_SAS_PCFG_OFFSET 0x0080
1278#define SCU_SAS_CLKSM_OFFSET 0x0084
1279#define SCU_SAS_TXCOMWAKE_OFFSET 0x0088
1280#define SCU_SAS_TXCOMINIT_OFFSET 0x008C
1281#define SCU_SAS_TXCOMSAS_OFFSET 0x0090
1282#define SCU_SAS_COMINIT_OFFSET 0x0094
1283#define SCU_SAS_COMWAKE_OFFSET 0x0098
1284#define SCU_SAS_COMSAS_OFFSET 0x009C
1285#define SCU_SAS_SFERCNT_OFFSET 0x00A0
1286#define SCU_SAS_CDFERCNT_OFFSET 0x00A4
1287#define SCU_SAS_DNFERCNT_OFFSET 0x00A8
1288#define SCU_SAS_PRSTERCNT_OFFSET 0x00AC
1289#define SCU_SAS_CNTCTL_OFFSET 0x00B0
1290#define SCU_SAS_SSPTOV_OFFSET 0x00B4
1291#define SCU_FTCTL_OFFSET 0x00B8
1292#define SCU_FRCTL_OFFSET 0x00BC
1293#define SCU_FTWMRK_OFFSET 0x00C0
1294#define SCU_ENSPINUP_OFFSET 0x00C4
1295#define SCU_SAS_TRNTOV_OFFSET 0x00C8
1296#define SCU_SAS_PHYCAP_OFFSET 0x00CC
1297#define SCU_SAS_PHYCTL_OFFSET 0x00D0
1298#define SCU_SAS_LLCTL_OFFSET 0x00D8
1299#define SCU_AFE_XCVRCR_OFFSET 0x00DC
1300#define SCU_AFE_LUTCR_OFFSET 0x00E0
1301
1302#define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_SHIFT (0)
1303#define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_MASK (0x00000003)
1304#define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1 (0)
1305#define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN2 (1)
1306#define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN3 (2)
1307#define SCU_SAS_LINK_LAYER_CONTROL_BROADCAST_PRIMITIVE_SHIFT (2)
1308#define SCU_SAS_LINK_LAYER_CONTROL_BROADCAST_PRIMITIVE_MASK (0x000003FC)
1309#define SCU_SAS_LINK_LAYER_CONTROL_CLOSE_NO_ACTIVE_TASK_DISABLE_SHIFT (16)
1310#define SCU_SAS_LINK_LAYER_CONTROL_CLOSE_NO_ACTIVE_TASK_DISABLE_MASK (0x00010000)
1311#define SCU_SAS_LINK_LAYER_CONTROL_CLOSE_NO_OUTBOUND_TASK_DISABLE_SHIFT (17)
1312#define SCU_SAS_LINK_LAYER_CONTROL_CLOSE_NO_OUTBOUND_TASK_DISABLE_MASK (0x00020000)
1313#define SCU_SAS_LINK_LAYER_CONTROL_NO_OUTBOUND_TASK_TIMEOUT_SHIFT (24)
1314#define SCU_SAS_LINK_LAYER_CONTROL_NO_OUTBOUND_TASK_TIMEOUT_MASK (0xFF000000)
1315#define SCU_SAS_LINK_LAYER_CONTROL_RESERVED (0x00FCFC00)
1316
1317#define SCU_SAS_LLCTL_GEN_VAL(name, value) \
1318 SCU_GEN_VALUE(SCU_SAS_LINK_LAYER_CONTROL_ ## name, value)
1319
1320#define SCU_SAS_LLCTL_GEN_BIT(name) \
1321 SCU_GEN_BIT(SCU_SAS_LINK_LAYER_CONTROL_ ## name)
1322
1323
1324/* #define SCU_FRXHECR_DCNT_OFFSET 0x00B0 */
1325#define SCU_PSZGCR_OFFSET 0x00E4
1326#define SCU_SAS_RECPHYCAP_OFFSET 0x00E8
1327/* #define SCU_TX_LUTSEL_OFFSET 0x00B8 */
1328
1329#define SCU_SAS_PTxC_OFFSET 0x00D4 /* Same offset as SAS_TCTSTM */
1330
1331/**
1332 * struct scu_link_layer_registers - SCU Link Layer Registers
1333 *
1334 *
1335 */
1336struct scu_link_layer_registers {
1337/* 0x0000 SAS_SPDTOV */
1338 u32 speed_negotiation_timers;
1339/* 0x0004 SAS_LLSTA */
1340 u32 link_layer_status;
1341/* 0x0008 SATA_PSELTOV */
1342 u32 port_selector_timeout;
1343 u32 reserved0C;
1344/* 0x0010 SAS_TIMETOV */
1345 u32 timeout_unit_value;
1346/* 0x0014 SAS_RCDTOV */
1347 u32 rcd_timeout;
1348/* 0x0018 SAS_LNKTOV */
1349 u32 link_timer_timeouts;
1350/* 0x001C SAS_PHYTOV */
1351 u32 sas_phy_timeouts;
1352/* 0x0020 SAS_AFERCNT */
1353 u32 received_address_frame_error_counter;
1354/* 0x0024 SAS_WERCNT */
1355 u32 invalid_dword_counter;
1356/* 0x0028 SAS_TIID */
1357 u32 transmit_identification;
1358/* 0x002C SAS_TIDNH */
1359 u32 sas_device_name_high;
1360/* 0x0030 SAS_TIDNL */
1361 u32 sas_device_name_low;
1362/* 0x0034 SAS_TISSAH */
1363 u32 source_sas_address_high;
1364/* 0x0038 SAS_TISSAL */
1365 u32 source_sas_address_low;
1366/* 0x003C SAS_TIPID */
1367 u32 identify_frame_phy_id;
1368/* 0x0040 SAS_TIRES2 */
1369 u32 identify_frame_reserved;
1370/* 0x0044 SAS_ADRSTA */
1371 u32 received_address_frame;
1372/* 0x0048 SAS_MAWTTOV */
1373 u32 maximum_arbitration_wait_timer_timeout;
1374/* 0x004C SAS_PTxC */
1375 u32 transmit_primitive;
1376/* 0x0050 SAS_RORES */
1377 u32 error_counter_event_notification_control;
1378/* 0x0054 SAS_FRPLDFIL */
1379 u32 frxq_payload_fill_threshold;
1380/* 0x0058 SAS_LLHANG_TOT */
1381 u32 link_layer_hang_detection_timeout;
1382 u32 reserved_5C;
1383/* 0x0060 SAS_RFCNT */
1384 u32 received_frame_count;
1385/* 0x0064 SAS_TFCNT */
1386 u32 transmit_frame_count;
1387/* 0x0068 SAS_RFDCNT */
1388 u32 received_dword_count;
1389/* 0x006C SAS_TFDCNT */
1390 u32 transmit_dword_count;
1391/* 0x0070 SAS_LERCNT */
1392 u32 loss_of_sync_error_count;
1393/* 0x0074 SAS_RDISERRCNT */
1394 u32 running_disparity_error_count;
1395/* 0x0078 SAS_CRERCNT */
1396 u32 received_frame_crc_error_count;
1397/* 0x007C STPCTL */
1398 u32 stp_control;
1399/* 0x0080 SAS_PCFG */
1400 u32 phy_configuration;
1401/* 0x0084 SAS_CLKSM */
1402 u32 clock_skew_management;
1403/* 0x0088 SAS_TXCOMWAKE */
1404 u32 transmit_comwake_signal;
1405/* 0x008C SAS_TXCOMINIT */
1406 u32 transmit_cominit_signal;
1407/* 0x0090 SAS_TXCOMSAS */
1408 u32 transmit_comsas_signal;
1409/* 0x0094 SAS_COMINIT */
1410 u32 cominit_control;
1411/* 0x0098 SAS_COMWAKE */
1412 u32 comwake_control;
1413/* 0x009C SAS_COMSAS */
1414 u32 comsas_control;
1415/* 0x00A0 SAS_SFERCNT */
1416 u32 received_short_frame_count;
1417/* 0x00A4 SAS_CDFERCNT */
1418 u32 received_frame_without_credit_count;
1419/* 0x00A8 SAS_DNFERCNT */
1420 u32 received_frame_after_done_count;
1421/* 0x00AC SAS_PRSTERCNT */
1422 u32 phy_reset_problem_count;
1423/* 0x00B0 SAS_CNTCTL */
1424 u32 counter_control;
1425/* 0x00B4 SAS_SSPTOV */
1426 u32 ssp_timer_timeout_values;
1427/* 0x00B8 FTCTL */
1428 u32 ftx_control;
1429/* 0x00BC FRCTL */
1430 u32 frx_control;
1431/* 0x00C0 FTWMRK */
1432 u32 ftx_watermark;
1433/* 0x00C4 ENSPINUP */
1434 u32 notify_enable_spinup_control;
1435/* 0x00C8 SAS_TRNTOV */
1436 u32 sas_training_sequence_timer_values;
1437/* 0x00CC SAS_PHYCAP */
1438 u32 phy_capabilities;
1439/* 0x00D0 SAS_PHYCTL */
1440 u32 phy_control;
1441 u32 reserved_d4;
1442/* 0x00D8 LLCTL */
1443 u32 link_layer_control;
1444/* 0x00DC AFE_XCVRCR */
1445 u32 afe_xcvr_control;
1446/* 0x00E0 AFE_LUTCR */
1447 u32 afe_lookup_table_control;
1448/* 0x00E4 PSZGCR */
1449 u32 phy_source_zone_group_control;
1450/* 0x00E8 SAS_RECPHYCAP */
1451 u32 receive_phycap;
1452 u32 reserved_ec;
1453/* 0x00F0 SNAFERXRSTCTL */
1454 u32 speed_negotiation_afe_rx_reset_control;
1455/* 0x00F4 SAS_SSIPMCTL */
1456 u32 power_management_control;
1457/* 0x00F8 SAS_PSPREQ_PRIM */
1458 u32 sas_pm_partial_request_primitive;
1459/* 0x00FC SAS_PSSREQ_PRIM */
1460 u32 sas_pm_slumber_request_primitive;
1461/* 0x0100 SAS_PPSACK_PRIM */
1462 u32 sas_pm_ack_primitive_register;
1463/* 0x0104 SAS_PSNAK_PRIM */
1464 u32 sas_pm_nak_primitive_register;
1465/* 0x0108 SAS_SSIPMTOV */
1466 u32 sas_primitive_timeout;
1467 u32 reserved_10c;
1468/* 0x0110 - 0x011C PLAPRDCTRLxREG */
1469 u32 pla_product_control[4];
1470/* 0x0120 PLAPRDSUMREG */
1471 u32 pla_product_sum;
1472/* 0x0124 PLACONTROLREG */
1473 u32 pla_control;
1474/* Remainder of memory space 896 bytes */
1475 u32 reserved_0128_037f[0x96];
1476
1477};
1478
1479/*
1480 * 0x00D4 // Same offset as SAS_TCTSTM SAS_PTxC
1481 * u32 primitive_transmit_control; */
1482
1483/*
1484 * ----------------------------------------------------------------------------
1485 * SGPIO
1486 * ---------------------------------------------------------------------------- */
1487#define SCU_SGPIO_OFFSET 0x1400
1488
1489/* #define SCU_SGPIO_OFFSET 0x6000 // later moves to 0x1400 see HSD 652625 */
1490#define SCU_SGPIO_SGICR_OFFSET 0x0000
1491#define SCU_SGPIO_SGPBR_OFFSET 0x0004
1492#define SCU_SGPIO_SGSDLR_OFFSET 0x0008
1493#define SCU_SGPIO_SGSDUR_OFFSET 0x000C
1494#define SCU_SGPIO_SGSIDLR_OFFSET 0x0010
1495#define SCU_SGPIO_SGSIDUR_OFFSET 0x0014
1496#define SCU_SGPIO_SGVSCR_OFFSET 0x0018
1497/* Address from 0x0820 to 0x083C */
1498#define SCU_SGPIO_SGODSR_OFFSET 0x0020
1499
1500/**
1501 * struct scu_sgpio_registers - SCU SGPIO Registers
1502 *
1503 *
1504 */
1505struct scu_sgpio_registers {
1506/* 0x0000 SGPIO_SGICR */
1507 u32 interface_control;
1508/* 0x0004 SGPIO_SGPBR */
1509 u32 blink_rate;
1510/* 0x0008 SGPIO_SGSDLR */
1511 u32 start_drive_lower;
1512/* 0x000C SGPIO_SGSDUR */
1513 u32 start_drive_upper;
1514/* 0x0010 SGPIO_SGSIDLR */
1515 u32 serial_input_lower;
1516/* 0x0014 SGPIO_SGSIDUR */
1517 u32 serial_input_upper;
1518/* 0x0018 SGPIO_SGVSCR */
1519 u32 vendor_specific_code;
1520/* 0x0020 SGPIO_SGODSR */
1521 u32 ouput_data_select[8];
1522/* Remainder of memory space 256 bytes */
1523 u32 reserved_1444_14ff[0x31];
1524
1525};
1526
1527/*
1528 * *****************************************************************************
1529 * * Defines for VIIT entry offsets
1530 * * Access additional entries by SCU_VIIT_BASE + index * 0x10
1531 * ***************************************************************************** */
1532#define SCU_VIIT_BASE 0x1c00
1533
1534struct scu_viit_registers {
1535 u32 registers[256];
1536};
1537
1538/*
1539 * *****************************************************************************
1540 * * SCU PORT TASK SCHEDULER REGISTERS
1541 * ***************************************************************************** */
1542
1543#define SCU_PTSG_BASE 0x1000
1544
1545#define SCU_PTSG_PTSGCR_OFFSET 0x0000
1546#define SCU_PTSG_RTCR_OFFSET 0x0004
1547#define SCU_PTSG_RTCCR_OFFSET 0x0008
1548#define SCU_PTSG_PTS0CR_OFFSET 0x0010
1549#define SCU_PTSG_PTS0SR_OFFSET 0x0014
1550#define SCU_PTSG_PTS1CR_OFFSET 0x0018
1551#define SCU_PTSG_PTS1SR_OFFSET 0x001C
1552#define SCU_PTSG_PTS2CR_OFFSET 0x0020
1553#define SCU_PTSG_PTS2SR_OFFSET 0x0024
1554#define SCU_PTSG_PTS3CR_OFFSET 0x0028
1555#define SCU_PTSG_PTS3SR_OFFSET 0x002C
1556#define SCU_PTSG_PCSPE0CR_OFFSET 0x0030
1557#define SCU_PTSG_PCSPE1CR_OFFSET 0x0034
1558#define SCU_PTSG_PCSPE2CR_OFFSET 0x0038
1559#define SCU_PTSG_PCSPE3CR_OFFSET 0x003C
1560#define SCU_PTSG_ETMTSCCR_OFFSET 0x0040
1561#define SCU_PTSG_ETMRNSCCR_OFFSET 0x0044
1562
1563/**
1564 * struct scu_port_task_scheduler_registers - These are the control/stats pairs
1565 * for each Port Task Scheduler.
1566 *
1567 *
1568 */
1569struct scu_port_task_scheduler_registers {
1570 u32 control;
1571 u32 status;
1572};
1573
1574/**
1575 * struct scu_port_task_scheduler_group_registers - These are the PORT Task
1576 * Scheduler registers
1577 *
1578 *
1579 */
1580struct scu_port_task_scheduler_group_registers {
1581/* 0x0000 PTSGCR */
1582 u32 control;
1583/* 0x0004 RTCR */
1584 u32 real_time_clock;
1585/* 0x0008 RTCCR */
1586 u32 real_time_clock_control;
1587/* 0x000C */
1588 u32 reserved_0C;
1589/*
1590 * 0x0010 PTS0CR
1591 * 0x0014 PTS0SR
1592 * 0x0018 PTS1CR
1593 * 0x001C PTS1SR
1594 * 0x0020 PTS2CR
1595 * 0x0024 PTS2SR
1596 * 0x0028 PTS3CR
1597 * 0x002C PTS3SR */
1598 struct scu_port_task_scheduler_registers port[4];
1599/*
1600 * 0x0030 PCSPE0CR
1601 * 0x0034 PCSPE1CR
1602 * 0x0038 PCSPE2CR
1603 * 0x003C PCSPE3CR */
1604 u32 protocol_engine[4];
1605/* 0x0040 ETMTSCCR */
1606 u32 tc_scanning_interval_control;
1607/* 0x0044 ETMRNSCCR */
1608 u32 rnc_scanning_interval_control;
1609/* Remainder of memory space 128 bytes */
1610 u32 reserved_1048_107f[0x0E];
1611
1612};
1613
1614#define SCU_PTSG_SCUVZECR_OFFSET 0x003C
1615
1616/*
1617 * *****************************************************************************
1618 * * AFE REGISTERS
1619 * ***************************************************************************** */
1620#define SCU_AFE_MMR_BASE 0xE000
1621
1622/*
1623 * AFE 0 is at offset 0x0800
1624 * AFE 1 is at offset 0x0900
1625 * AFE 2 is at offset 0x0a00
1626 * AFE 3 is at offset 0x0b00 */
1627struct scu_afe_transceiver {
1628 /* 0x0000 AFE_XCVR_CTRL0 */
1629 u32 afe_xcvr_control0;
1630 /* 0x0004 AFE_XCVR_CTRL1 */
1631 u32 afe_xcvr_control1;
1632 /* 0x0008 */
1633 u32 reserved_0008;
1634 /* 0x000c afe_dfx_rx_control0 */
1635 u32 afe_dfx_rx_control0;
1636 /* 0x0010 AFE_DFX_RX_CTRL1 */
1637 u32 afe_dfx_rx_control1;
1638 /* 0x0014 */
1639 u32 reserved_0014;
1640 /* 0x0018 AFE_DFX_RX_STS0 */
1641 u32 afe_dfx_rx_status0;
1642 /* 0x001c AFE_DFX_RX_STS1 */
1643 u32 afe_dfx_rx_status1;
1644 /* 0x0020 */
1645 u32 reserved_0020;
1646 /* 0x0024 AFE_TX_CTRL */
1647 u32 afe_tx_control;
1648 /* 0x0028 AFE_TX_AMP_CTRL0 */
1649 u32 afe_tx_amp_control0;
1650 /* 0x002c AFE_TX_AMP_CTRL1 */
1651 u32 afe_tx_amp_control1;
1652 /* 0x0030 AFE_TX_AMP_CTRL2 */
1653 u32 afe_tx_amp_control2;
1654 /* 0x0034 AFE_TX_AMP_CTRL3 */
1655 u32 afe_tx_amp_control3;
1656 /* 0x0038 afe_tx_ssc_control */
1657 u32 afe_tx_ssc_control;
1658 /* 0x003c */
1659 u32 reserved_003c;
1660 /* 0x0040 AFE_RX_SSC_CTRL0 */
1661 u32 afe_rx_ssc_control0;
1662 /* 0x0044 AFE_RX_SSC_CTRL1 */
1663 u32 afe_rx_ssc_control1;
1664 /* 0x0048 AFE_RX_SSC_CTRL2 */
1665 u32 afe_rx_ssc_control2;
1666 /* 0x004c AFE_RX_EQ_STS0 */
1667 u32 afe_rx_eq_status0;
1668 /* 0x0050 AFE_RX_EQ_STS1 */
1669 u32 afe_rx_eq_status1;
1670 /* 0x0054 AFE_RX_CDR_STS */
1671 u32 afe_rx_cdr_status;
1672 /* 0x0058 */
1673 u32 reserved_0058;
1674 /* 0x005c AFE_CHAN_CTRL */
1675 u32 afe_channel_control;
1676 /* 0x0060-0x006c */
1677 u32 reserved_0060_006c[0x04];
1678 /* 0x0070 AFE_XCVR_EC_STS0 */
1679 u32 afe_xcvr_error_capture_status0;
1680 /* 0x0074 AFE_XCVR_EC_STS1 */
1681 u32 afe_xcvr_error_capture_status1;
1682 /* 0x0078 AFE_XCVR_EC_STS2 */
1683 u32 afe_xcvr_error_capture_status2;
1684 /* 0x007c afe_xcvr_ec_status3 */
1685 u32 afe_xcvr_error_capture_status3;
1686 /* 0x0080 AFE_XCVR_EC_STS4 */
1687 u32 afe_xcvr_error_capture_status4;
1688 /* 0x0084 AFE_XCVR_EC_STS5 */
1689 u32 afe_xcvr_error_capture_status5;
1690 /* 0x0088-0x00fc */
1691 u32 reserved_008c_00fc[0x1e];
1692};
1693
1694/**
1695 * struct scu_afe_registers - AFE Regsiters
1696 *
1697 *
1698 */
1699/* Uaoa AFE registers */
1700struct scu_afe_registers {
1701 /* 0Xe000 AFE_BIAS_CTRL */
1702 u32 afe_bias_control;
1703 u32 reserved_0004;
1704 /* 0x0008 AFE_PLL_CTRL0 */
1705 u32 afe_pll_control0;
1706 /* 0x000c AFE_PLL_CTRL1 */
1707 u32 afe_pll_control1;
1708 /* 0x0010 AFE_PLL_CTRL2 */
1709 u32 afe_pll_control2;
1710 /* 0x0014 AFE_CB_STS */
1711 u32 afe_common_block_status;
1712 /* 0x0018-0x007c */
1713 u32 reserved_18_7c[0x1a];
1714 /* 0x0080 AFE_PMSN_MCTRL0 */
1715 u32 afe_pmsn_master_control0;
1716 /* 0x0084 AFE_PMSN_MCTRL1 */
1717 u32 afe_pmsn_master_control1;
1718 /* 0x0088 AFE_PMSN_MCTRL2 */
1719 u32 afe_pmsn_master_control2;
1720 /* 0x008C-0x00fc */
1721 u32 reserved_008c_00fc[0x1D];
1722 /* 0x0100 AFE_DFX_MST_CTRL0 */
1723 u32 afe_dfx_master_control0;
1724 /* 0x0104 AFE_DFX_MST_CTRL1 */
1725 u32 afe_dfx_master_control1;
1726 /* 0x0108 AFE_DFX_DCL_CTRL */
1727 u32 afe_dfx_dcl_control;
1728 /* 0x010c AFE_DFX_DMON_CTRL */
1729 u32 afe_dfx_digital_monitor_control;
1730 /* 0x0110 AFE_DFX_AMONP_CTRL */
1731 u32 afe_dfx_analog_p_monitor_control;
1732 /* 0x0114 AFE_DFX_AMONN_CTRL */
1733 u32 afe_dfx_analog_n_monitor_control;
1734 /* 0x0118 AFE_DFX_NTL_STS */
1735 u32 afe_dfx_ntl_status;
1736 /* 0x011c AFE_DFX_FIFO_STS0 */
1737 u32 afe_dfx_fifo_status0;
1738 /* 0x0120 AFE_DFX_FIFO_STS1 */
1739 u32 afe_dfx_fifo_status1;
1740 /* 0x0124 AFE_DFX_MPAT_CTRL */
1741 u32 afe_dfx_master_pattern_control;
1742 /* 0x0128 AFE_DFX_P0_CTRL */
1743 u32 afe_dfx_p0_control;
1744 /* 0x012c-0x01a8 AFE_DFX_P0_DRx */
1745 u32 afe_dfx_p0_data[32];
1746 /* 0x01ac */
1747 u32 reserved_01ac;
1748 /* 0x01b0-0x020c AFE_DFX_P0_IRx */
1749 u32 afe_dfx_p0_instruction[24];
1750 /* 0x0210 */
1751 u32 reserved_0210;
1752 /* 0x0214 AFE_DFX_P1_CTRL */
1753 u32 afe_dfx_p1_control;
1754 /* 0x0218-0x245 AFE_DFX_P1_DRx */
1755 u32 afe_dfx_p1_data[16];
1756 /* 0x0258-0x029c */
1757 u32 reserved_0258_029c[0x12];
1758 /* 0x02a0-0x02bc AFE_DFX_P1_IRx */
1759 u32 afe_dfx_p1_instruction[8];
1760 /* 0x02c0-0x2fc */
1761 u32 reserved_02c0_02fc[0x10];
1762 /* 0x0300 AFE_DFX_TX_PMSN_CTRL */
1763 u32 afe_dfx_tx_pmsn_control;
1764 /* 0x0304 AFE_DFX_RX_PMSN_CTRL */
1765 u32 afe_dfx_rx_pmsn_control;
1766 u32 reserved_0308;
1767 /* 0x030c AFE_DFX_NOA_CTRL0 */
1768 u32 afe_dfx_noa_control0;
1769 /* 0x0310 AFE_DFX_NOA_CTRL1 */
1770 u32 afe_dfx_noa_control1;
1771 /* 0x0314 AFE_DFX_NOA_CTRL2 */
1772 u32 afe_dfx_noa_control2;
1773 /* 0x0318 AFE_DFX_NOA_CTRL3 */
1774 u32 afe_dfx_noa_control3;
1775 /* 0x031c AFE_DFX_NOA_CTRL4 */
1776 u32 afe_dfx_noa_control4;
1777 /* 0x0320 AFE_DFX_NOA_CTRL5 */
1778 u32 afe_dfx_noa_control5;
1779 /* 0x0324 AFE_DFX_NOA_CTRL6 */
1780 u32 afe_dfx_noa_control6;
1781 /* 0x0328 AFE_DFX_NOA_CTRL7 */
1782 u32 afe_dfx_noa_control7;
1783 /* 0x032c-0x07fc */
1784 u32 reserved_032c_07fc[0x135];
1785
1786 /* 0x0800-0x0bfc */
1787 struct scu_afe_transceiver scu_afe_xcvr[4];
1788
1789 /* 0x0c00-0x0ffc */
1790 u32 reserved_0c00_0ffc[0x0100];
1791};
1792
1793struct scu_protocol_engine_group_registers {
1794 u32 table[0xE0];
1795};
1796
1797
1798struct scu_viit_iit {
1799 u32 table[256];
1800};
1801
1802/**
1803 * Placeholder for the ZONE Partition Table information ZONING will not be
1804 * included in the 1.1 release.
1805 *
1806 *
1807 */
1808struct scu_zone_partition_table {
1809 u32 table[2048];
1810};
1811
1812/**
1813 * Placeholder for the CRAM register since I am not sure if we need to
1814 * read/write to these registers as yet.
1815 *
1816 *
1817 */
1818struct scu_completion_ram {
1819 u32 ram[128];
1820};
1821
1822/**
1823 * Placeholder for the FBRAM registers since I am not sure if we need to
1824 * read/write to these registers as yet.
1825 *
1826 *
1827 */
1828struct scu_frame_buffer_ram {
1829 u32 ram[128];
1830};
1831
1832#define scu_scratch_ram_SIZE_IN_DWORDS 256
1833
1834/**
1835 * Placeholder for the scratch RAM registers.
1836 *
1837 *
1838 */
1839struct scu_scratch_ram {
1840 u32 ram[scu_scratch_ram_SIZE_IN_DWORDS];
1841};
1842
1843/**
1844 * Placeholder since I am not yet sure what these registers are here for.
1845 *
1846 *
1847 */
1848struct noa_protocol_engine_partition {
1849 u32 reserved[64];
1850};
1851
1852/**
1853 * Placeholder since I am not yet sure what these registers are here for.
1854 *
1855 *
1856 */
1857struct noa_hub_partition {
1858 u32 reserved[64];
1859};
1860
1861/**
1862 * Placeholder since I am not yet sure what these registers are here for.
1863 *
1864 *
1865 */
1866struct noa_host_interface_partition {
1867 u32 reserved[64];
1868};
1869
1870/**
1871 * struct transport_link_layer_pair - The SCU Hardware pairs up the TL
1872 * registers with the LL registers so we must place them adjcent to make the
1873 * array of registers in the PEG.
1874 *
1875 *
1876 */
1877struct transport_link_layer_pair {
1878 struct scu_transport_layer_registers tl;
1879 struct scu_link_layer_registers ll;
1880};
1881
1882/**
1883 * struct scu_peg_registers - SCU Protocol Engine Memory mapped register space.
1884 * These registers are unique to each protocol engine group. There can be
1885 * at most two PEG for a single SCU part.
1886 *
1887 *
1888 */
1889struct scu_peg_registers {
1890 struct transport_link_layer_pair pe[4];
1891 struct scu_port_task_scheduler_group_registers ptsg;
1892 struct scu_protocol_engine_group_registers peg;
1893 struct scu_sgpio_registers sgpio;
1894 u32 reserved_01500_1BFF[0x1C0];
1895 struct scu_viit_entry viit[64];
1896 struct scu_zone_partition_table zpt0;
1897 struct scu_zone_partition_table zpt1;
1898};
1899
1900/**
1901 * struct scu_registers - SCU regsiters including both PEG registers if we turn
1902 * on that compile option. All of these registers are in the memory mapped
1903 * space returned from BAR1.
1904 *
1905 *
1906 */
1907struct scu_registers {
1908 /* 0x0000 - PEG 0 */
1909 struct scu_peg_registers peg0;
1910
1911 /* 0x6000 - SDMA and Miscellaneous */
1912 struct scu_sdma_registers sdma;
1913 struct scu_completion_ram cram;
1914 struct scu_frame_buffer_ram fbram;
1915 u32 reserved_6800_69FF[0x80];
1916 struct noa_protocol_engine_partition noa_pe;
1917 struct noa_hub_partition noa_hub;
1918 struct noa_host_interface_partition noa_if;
1919 u32 reserved_6d00_7fff[0x4c0];
1920
1921 /* 0x8000 - PEG 1 */
1922 struct scu_peg_registers peg1;
1923
1924 /* 0xE000 - AFE Registers */
1925 struct scu_afe_registers afe;
1926
1927 /* 0xF000 - reserved */
1928 u32 reserved_f000_211fff[0x80c00];
1929
1930 /* 0x212000 - scratch RAM */
1931 struct scu_scratch_ram scratch_ram;
1932};
1933
1934#endif /* _SCU_REGISTERS_HEADER_ */
diff --git a/drivers/scsi/isci/remote_device.c b/drivers/scsi/isci/remote_device.c
new file mode 100644
index 000000000000..b6e6368c2665
--- /dev/null
+++ b/drivers/scsi/isci/remote_device.c
@@ -0,0 +1,1501 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55#include <scsi/sas.h>
56#include "isci.h"
57#include "port.h"
58#include "remote_device.h"
59#include "request.h"
60#include "remote_node_context.h"
61#include "scu_event_codes.h"
62#include "task.h"
63
64/**
65 * isci_remote_device_not_ready() - This function is called by the ihost when
66 * the remote device is not ready. We mark the isci device as ready (not
67 * "ready_for_io") and signal the waiting proccess.
68 * @isci_host: This parameter specifies the isci host object.
69 * @isci_device: This parameter specifies the remote device
70 *
71 * sci_lock is held on entrance to this function.
72 */
73static void isci_remote_device_not_ready(struct isci_host *ihost,
74 struct isci_remote_device *idev, u32 reason)
75{
76 struct isci_request *ireq;
77
78 dev_dbg(&ihost->pdev->dev,
79 "%s: isci_device = %p\n", __func__, idev);
80
81 switch (reason) {
82 case SCIC_REMOTE_DEVICE_NOT_READY_STOP_REQUESTED:
83 set_bit(IDEV_GONE, &idev->flags);
84 break;
85 case SCIC_REMOTE_DEVICE_NOT_READY_SATA_SDB_ERROR_FIS_RECEIVED:
86 set_bit(IDEV_IO_NCQERROR, &idev->flags);
87
88 /* Kill all outstanding requests for the device. */
89 list_for_each_entry(ireq, &idev->reqs_in_process, dev_node) {
90
91 dev_dbg(&ihost->pdev->dev,
92 "%s: isci_device = %p request = %p\n",
93 __func__, idev, ireq);
94
95 sci_controller_terminate_request(ihost,
96 idev,
97 ireq);
98 }
99 /* Fall through into the default case... */
100 default:
101 clear_bit(IDEV_IO_READY, &idev->flags);
102 break;
103 }
104}
105
106/**
107 * isci_remote_device_ready() - This function is called by the ihost when the
108 * remote device is ready. We mark the isci device as ready and signal the
109 * waiting proccess.
110 * @ihost: our valid isci_host
111 * @idev: remote device
112 *
113 */
114static void isci_remote_device_ready(struct isci_host *ihost, struct isci_remote_device *idev)
115{
116 dev_dbg(&ihost->pdev->dev,
117 "%s: idev = %p\n", __func__, idev);
118
119 clear_bit(IDEV_IO_NCQERROR, &idev->flags);
120 set_bit(IDEV_IO_READY, &idev->flags);
121 if (test_and_clear_bit(IDEV_START_PENDING, &idev->flags))
122 wake_up(&ihost->eventq);
123}
124
125/* called once the remote node context is ready to be freed.
126 * The remote device can now report that its stop operation is complete. none
127 */
128static void rnc_destruct_done(void *_dev)
129{
130 struct isci_remote_device *idev = _dev;
131
132 BUG_ON(idev->started_request_count != 0);
133 sci_change_state(&idev->sm, SCI_DEV_STOPPED);
134}
135
136static enum sci_status sci_remote_device_terminate_requests(struct isci_remote_device *idev)
137{
138 struct isci_host *ihost = idev->owning_port->owning_controller;
139 enum sci_status status = SCI_SUCCESS;
140 u32 i;
141
142 for (i = 0; i < SCI_MAX_IO_REQUESTS; i++) {
143 struct isci_request *ireq = ihost->reqs[i];
144 enum sci_status s;
145
146 if (!test_bit(IREQ_ACTIVE, &ireq->flags) ||
147 ireq->target_device != idev)
148 continue;
149
150 s = sci_controller_terminate_request(ihost, idev, ireq);
151 if (s != SCI_SUCCESS)
152 status = s;
153 }
154
155 return status;
156}
157
158enum sci_status sci_remote_device_stop(struct isci_remote_device *idev,
159 u32 timeout)
160{
161 struct sci_base_state_machine *sm = &idev->sm;
162 enum sci_remote_device_states state = sm->current_state_id;
163
164 switch (state) {
165 case SCI_DEV_INITIAL:
166 case SCI_DEV_FAILED:
167 case SCI_DEV_FINAL:
168 default:
169 dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %d\n",
170 __func__, state);
171 return SCI_FAILURE_INVALID_STATE;
172 case SCI_DEV_STOPPED:
173 return SCI_SUCCESS;
174 case SCI_DEV_STARTING:
175 /* device not started so there had better be no requests */
176 BUG_ON(idev->started_request_count != 0);
177 sci_remote_node_context_destruct(&idev->rnc,
178 rnc_destruct_done, idev);
179 /* Transition to the stopping state and wait for the
180 * remote node to complete being posted and invalidated.
181 */
182 sci_change_state(sm, SCI_DEV_STOPPING);
183 return SCI_SUCCESS;
184 case SCI_DEV_READY:
185 case SCI_STP_DEV_IDLE:
186 case SCI_STP_DEV_CMD:
187 case SCI_STP_DEV_NCQ:
188 case SCI_STP_DEV_NCQ_ERROR:
189 case SCI_STP_DEV_AWAIT_RESET:
190 case SCI_SMP_DEV_IDLE:
191 case SCI_SMP_DEV_CMD:
192 sci_change_state(sm, SCI_DEV_STOPPING);
193 if (idev->started_request_count == 0) {
194 sci_remote_node_context_destruct(&idev->rnc,
195 rnc_destruct_done, idev);
196 return SCI_SUCCESS;
197 } else
198 return sci_remote_device_terminate_requests(idev);
199 break;
200 case SCI_DEV_STOPPING:
201 /* All requests should have been terminated, but if there is an
202 * attempt to stop a device already in the stopping state, then
203 * try again to terminate.
204 */
205 return sci_remote_device_terminate_requests(idev);
206 case SCI_DEV_RESETTING:
207 sci_change_state(sm, SCI_DEV_STOPPING);
208 return SCI_SUCCESS;
209 }
210}
211
212enum sci_status sci_remote_device_reset(struct isci_remote_device *idev)
213{
214 struct sci_base_state_machine *sm = &idev->sm;
215 enum sci_remote_device_states state = sm->current_state_id;
216
217 switch (state) {
218 case SCI_DEV_INITIAL:
219 case SCI_DEV_STOPPED:
220 case SCI_DEV_STARTING:
221 case SCI_SMP_DEV_IDLE:
222 case SCI_SMP_DEV_CMD:
223 case SCI_DEV_STOPPING:
224 case SCI_DEV_FAILED:
225 case SCI_DEV_RESETTING:
226 case SCI_DEV_FINAL:
227 default:
228 dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %d\n",
229 __func__, state);
230 return SCI_FAILURE_INVALID_STATE;
231 case SCI_DEV_READY:
232 case SCI_STP_DEV_IDLE:
233 case SCI_STP_DEV_CMD:
234 case SCI_STP_DEV_NCQ:
235 case SCI_STP_DEV_NCQ_ERROR:
236 case SCI_STP_DEV_AWAIT_RESET:
237 sci_change_state(sm, SCI_DEV_RESETTING);
238 return SCI_SUCCESS;
239 }
240}
241
242enum sci_status sci_remote_device_reset_complete(struct isci_remote_device *idev)
243{
244 struct sci_base_state_machine *sm = &idev->sm;
245 enum sci_remote_device_states state = sm->current_state_id;
246
247 if (state != SCI_DEV_RESETTING) {
248 dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %d\n",
249 __func__, state);
250 return SCI_FAILURE_INVALID_STATE;
251 }
252
253 sci_change_state(sm, SCI_DEV_READY);
254 return SCI_SUCCESS;
255}
256
257enum sci_status sci_remote_device_suspend(struct isci_remote_device *idev,
258 u32 suspend_type)
259{
260 struct sci_base_state_machine *sm = &idev->sm;
261 enum sci_remote_device_states state = sm->current_state_id;
262
263 if (state != SCI_STP_DEV_CMD) {
264 dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %d\n",
265 __func__, state);
266 return SCI_FAILURE_INVALID_STATE;
267 }
268
269 return sci_remote_node_context_suspend(&idev->rnc,
270 suspend_type, NULL, NULL);
271}
272
273enum sci_status sci_remote_device_frame_handler(struct isci_remote_device *idev,
274 u32 frame_index)
275{
276 struct sci_base_state_machine *sm = &idev->sm;
277 enum sci_remote_device_states state = sm->current_state_id;
278 struct isci_host *ihost = idev->owning_port->owning_controller;
279 enum sci_status status;
280
281 switch (state) {
282 case SCI_DEV_INITIAL:
283 case SCI_DEV_STOPPED:
284 case SCI_DEV_STARTING:
285 case SCI_STP_DEV_IDLE:
286 case SCI_SMP_DEV_IDLE:
287 case SCI_DEV_FINAL:
288 default:
289 dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %d\n",
290 __func__, state);
291 /* Return the frame back to the controller */
292 sci_controller_release_frame(ihost, frame_index);
293 return SCI_FAILURE_INVALID_STATE;
294 case SCI_DEV_READY:
295 case SCI_STP_DEV_NCQ_ERROR:
296 case SCI_STP_DEV_AWAIT_RESET:
297 case SCI_DEV_STOPPING:
298 case SCI_DEV_FAILED:
299 case SCI_DEV_RESETTING: {
300 struct isci_request *ireq;
301 struct ssp_frame_hdr hdr;
302 void *frame_header;
303 ssize_t word_cnt;
304
305 status = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
306 frame_index,
307 &frame_header);
308 if (status != SCI_SUCCESS)
309 return status;
310
311 word_cnt = sizeof(hdr) / sizeof(u32);
312 sci_swab32_cpy(&hdr, frame_header, word_cnt);
313
314 ireq = sci_request_by_tag(ihost, be16_to_cpu(hdr.tag));
315 if (ireq && ireq->target_device == idev) {
316 /* The IO request is now in charge of releasing the frame */
317 status = sci_io_request_frame_handler(ireq, frame_index);
318 } else {
319 /* We could not map this tag to a valid IO
320 * request Just toss the frame and continue
321 */
322 sci_controller_release_frame(ihost, frame_index);
323 }
324 break;
325 }
326 case SCI_STP_DEV_NCQ: {
327 struct dev_to_host_fis *hdr;
328
329 status = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
330 frame_index,
331 (void **)&hdr);
332 if (status != SCI_SUCCESS)
333 return status;
334
335 if (hdr->fis_type == FIS_SETDEVBITS &&
336 (hdr->status & ATA_ERR)) {
337 idev->not_ready_reason = SCIC_REMOTE_DEVICE_NOT_READY_SATA_SDB_ERROR_FIS_RECEIVED;
338
339 /* TODO Check sactive and complete associated IO if any. */
340 sci_change_state(sm, SCI_STP_DEV_NCQ_ERROR);
341 } else if (hdr->fis_type == FIS_REGD2H &&
342 (hdr->status & ATA_ERR)) {
343 /*
344 * Some devices return D2H FIS when an NCQ error is detected.
345 * Treat this like an SDB error FIS ready reason.
346 */
347 idev->not_ready_reason = SCIC_REMOTE_DEVICE_NOT_READY_SATA_SDB_ERROR_FIS_RECEIVED;
348 sci_change_state(&idev->sm, SCI_STP_DEV_NCQ_ERROR);
349 } else
350 status = SCI_FAILURE;
351
352 sci_controller_release_frame(ihost, frame_index);
353 break;
354 }
355 case SCI_STP_DEV_CMD:
356 case SCI_SMP_DEV_CMD:
357 /* The device does not process any UF received from the hardware while
358 * in this state. All unsolicited frames are forwarded to the io request
359 * object.
360 */
361 status = sci_io_request_frame_handler(idev->working_request, frame_index);
362 break;
363 }
364
365 return status;
366}
367
368static bool is_remote_device_ready(struct isci_remote_device *idev)
369{
370
371 struct sci_base_state_machine *sm = &idev->sm;
372 enum sci_remote_device_states state = sm->current_state_id;
373
374 switch (state) {
375 case SCI_DEV_READY:
376 case SCI_STP_DEV_IDLE:
377 case SCI_STP_DEV_CMD:
378 case SCI_STP_DEV_NCQ:
379 case SCI_STP_DEV_NCQ_ERROR:
380 case SCI_STP_DEV_AWAIT_RESET:
381 case SCI_SMP_DEV_IDLE:
382 case SCI_SMP_DEV_CMD:
383 return true;
384 default:
385 return false;
386 }
387}
388
389enum sci_status sci_remote_device_event_handler(struct isci_remote_device *idev,
390 u32 event_code)
391{
392 struct sci_base_state_machine *sm = &idev->sm;
393 enum sci_remote_device_states state = sm->current_state_id;
394 enum sci_status status;
395
396 switch (scu_get_event_type(event_code)) {
397 case SCU_EVENT_TYPE_RNC_OPS_MISC:
398 case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
399 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
400 status = sci_remote_node_context_event_handler(&idev->rnc, event_code);
401 break;
402 case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
403 if (scu_get_event_code(event_code) == SCU_EVENT_IT_NEXUS_TIMEOUT) {
404 status = SCI_SUCCESS;
405
406 /* Suspend the associated RNC */
407 sci_remote_node_context_suspend(&idev->rnc,
408 SCI_SOFTWARE_SUSPENSION,
409 NULL, NULL);
410
411 dev_dbg(scirdev_to_dev(idev),
412 "%s: device: %p event code: %x: %s\n",
413 __func__, idev, event_code,
414 is_remote_device_ready(idev)
415 ? "I_T_Nexus_Timeout event"
416 : "I_T_Nexus_Timeout event in wrong state");
417
418 break;
419 }
420 /* Else, fall through and treat as unhandled... */
421 default:
422 dev_dbg(scirdev_to_dev(idev),
423 "%s: device: %p event code: %x: %s\n",
424 __func__, idev, event_code,
425 is_remote_device_ready(idev)
426 ? "unexpected event"
427 : "unexpected event in wrong state");
428 status = SCI_FAILURE_INVALID_STATE;
429 break;
430 }
431
432 if (status != SCI_SUCCESS)
433 return status;
434
435 if (state == SCI_STP_DEV_IDLE) {
436
437 /* We pick up suspension events to handle specifically to this
438 * state. We resume the RNC right away.
439 */
440 if (scu_get_event_type(event_code) == SCU_EVENT_TYPE_RNC_SUSPEND_TX ||
441 scu_get_event_type(event_code) == SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX)
442 status = sci_remote_node_context_resume(&idev->rnc, NULL, NULL);
443 }
444
445 return status;
446}
447
448static void sci_remote_device_start_request(struct isci_remote_device *idev,
449 struct isci_request *ireq,
450 enum sci_status status)
451{
452 struct isci_port *iport = idev->owning_port;
453
454 /* cleanup requests that failed after starting on the port */
455 if (status != SCI_SUCCESS)
456 sci_port_complete_io(iport, idev, ireq);
457 else {
458 kref_get(&idev->kref);
459 idev->started_request_count++;
460 }
461}
462
463enum sci_status sci_remote_device_start_io(struct isci_host *ihost,
464 struct isci_remote_device *idev,
465 struct isci_request *ireq)
466{
467 struct sci_base_state_machine *sm = &idev->sm;
468 enum sci_remote_device_states state = sm->current_state_id;
469 struct isci_port *iport = idev->owning_port;
470 enum sci_status status;
471
472 switch (state) {
473 case SCI_DEV_INITIAL:
474 case SCI_DEV_STOPPED:
475 case SCI_DEV_STARTING:
476 case SCI_STP_DEV_NCQ_ERROR:
477 case SCI_DEV_STOPPING:
478 case SCI_DEV_FAILED:
479 case SCI_DEV_RESETTING:
480 case SCI_DEV_FINAL:
481 default:
482 dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %d\n",
483 __func__, state);
484 return SCI_FAILURE_INVALID_STATE;
485 case SCI_DEV_READY:
486 /* attempt to start an io request for this device object. The remote
487 * device object will issue the start request for the io and if
488 * successful it will start the request for the port object then
489 * increment its own request count.
490 */
491 status = sci_port_start_io(iport, idev, ireq);
492 if (status != SCI_SUCCESS)
493 return status;
494
495 status = sci_remote_node_context_start_io(&idev->rnc, ireq);
496 if (status != SCI_SUCCESS)
497 break;
498
499 status = sci_request_start(ireq);
500 break;
501 case SCI_STP_DEV_IDLE: {
502 /* handle the start io operation for a sata device that is in
503 * the command idle state. - Evalute the type of IO request to
504 * be started - If its an NCQ request change to NCQ substate -
505 * If its any other command change to the CMD substate
506 *
507 * If this is a softreset we may want to have a different
508 * substate.
509 */
510 enum sci_remote_device_states new_state;
511 struct sas_task *task = isci_request_access_task(ireq);
512
513 status = sci_port_start_io(iport, idev, ireq);
514 if (status != SCI_SUCCESS)
515 return status;
516
517 status = sci_remote_node_context_start_io(&idev->rnc, ireq);
518 if (status != SCI_SUCCESS)
519 break;
520
521 status = sci_request_start(ireq);
522 if (status != SCI_SUCCESS)
523 break;
524
525 if (task->ata_task.use_ncq)
526 new_state = SCI_STP_DEV_NCQ;
527 else {
528 idev->working_request = ireq;
529 new_state = SCI_STP_DEV_CMD;
530 }
531 sci_change_state(sm, new_state);
532 break;
533 }
534 case SCI_STP_DEV_NCQ: {
535 struct sas_task *task = isci_request_access_task(ireq);
536
537 if (task->ata_task.use_ncq) {
538 status = sci_port_start_io(iport, idev, ireq);
539 if (status != SCI_SUCCESS)
540 return status;
541
542 status = sci_remote_node_context_start_io(&idev->rnc, ireq);
543 if (status != SCI_SUCCESS)
544 break;
545
546 status = sci_request_start(ireq);
547 } else
548 return SCI_FAILURE_INVALID_STATE;
549 break;
550 }
551 case SCI_STP_DEV_AWAIT_RESET:
552 return SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED;
553 case SCI_SMP_DEV_IDLE:
554 status = sci_port_start_io(iport, idev, ireq);
555 if (status != SCI_SUCCESS)
556 return status;
557
558 status = sci_remote_node_context_start_io(&idev->rnc, ireq);
559 if (status != SCI_SUCCESS)
560 break;
561
562 status = sci_request_start(ireq);
563 if (status != SCI_SUCCESS)
564 break;
565
566 idev->working_request = ireq;
567 sci_change_state(&idev->sm, SCI_SMP_DEV_CMD);
568 break;
569 case SCI_STP_DEV_CMD:
570 case SCI_SMP_DEV_CMD:
571 /* device is already handling a command it can not accept new commands
572 * until this one is complete.
573 */
574 return SCI_FAILURE_INVALID_STATE;
575 }
576
577 sci_remote_device_start_request(idev, ireq, status);
578 return status;
579}
580
581static enum sci_status common_complete_io(struct isci_port *iport,
582 struct isci_remote_device *idev,
583 struct isci_request *ireq)
584{
585 enum sci_status status;
586
587 status = sci_request_complete(ireq);
588 if (status != SCI_SUCCESS)
589 return status;
590
591 status = sci_port_complete_io(iport, idev, ireq);
592 if (status != SCI_SUCCESS)
593 return status;
594
595 sci_remote_device_decrement_request_count(idev);
596 return status;
597}
598
599enum sci_status sci_remote_device_complete_io(struct isci_host *ihost,
600 struct isci_remote_device *idev,
601 struct isci_request *ireq)
602{
603 struct sci_base_state_machine *sm = &idev->sm;
604 enum sci_remote_device_states state = sm->current_state_id;
605 struct isci_port *iport = idev->owning_port;
606 enum sci_status status;
607
608 switch (state) {
609 case SCI_DEV_INITIAL:
610 case SCI_DEV_STOPPED:
611 case SCI_DEV_STARTING:
612 case SCI_STP_DEV_IDLE:
613 case SCI_SMP_DEV_IDLE:
614 case SCI_DEV_FAILED:
615 case SCI_DEV_FINAL:
616 default:
617 dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %d\n",
618 __func__, state);
619 return SCI_FAILURE_INVALID_STATE;
620 case SCI_DEV_READY:
621 case SCI_STP_DEV_AWAIT_RESET:
622 case SCI_DEV_RESETTING:
623 status = common_complete_io(iport, idev, ireq);
624 break;
625 case SCI_STP_DEV_CMD:
626 case SCI_STP_DEV_NCQ:
627 case SCI_STP_DEV_NCQ_ERROR:
628 status = common_complete_io(iport, idev, ireq);
629 if (status != SCI_SUCCESS)
630 break;
631
632 if (ireq->sci_status == SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED) {
633 /* This request causes hardware error, device needs to be Lun Reset.
634 * So here we force the state machine to IDLE state so the rest IOs
635 * can reach RNC state handler, these IOs will be completed by RNC with
636 * status of "DEVICE_RESET_REQUIRED", instead of "INVALID STATE".
637 */
638 sci_change_state(sm, SCI_STP_DEV_AWAIT_RESET);
639 } else if (idev->started_request_count == 0)
640 sci_change_state(sm, SCI_STP_DEV_IDLE);
641 break;
642 case SCI_SMP_DEV_CMD:
643 status = common_complete_io(iport, idev, ireq);
644 if (status != SCI_SUCCESS)
645 break;
646 sci_change_state(sm, SCI_SMP_DEV_IDLE);
647 break;
648 case SCI_DEV_STOPPING:
649 status = common_complete_io(iport, idev, ireq);
650 if (status != SCI_SUCCESS)
651 break;
652
653 if (idev->started_request_count == 0)
654 sci_remote_node_context_destruct(&idev->rnc,
655 rnc_destruct_done,
656 idev);
657 break;
658 }
659
660 if (status != SCI_SUCCESS)
661 dev_err(scirdev_to_dev(idev),
662 "%s: Port:0x%p Device:0x%p Request:0x%p Status:0x%x "
663 "could not complete\n", __func__, iport,
664 idev, ireq, status);
665 else
666 isci_put_device(idev);
667
668 return status;
669}
670
671static void sci_remote_device_continue_request(void *dev)
672{
673 struct isci_remote_device *idev = dev;
674
675 /* we need to check if this request is still valid to continue. */
676 if (idev->working_request)
677 sci_controller_continue_io(idev->working_request);
678}
679
680enum sci_status sci_remote_device_start_task(struct isci_host *ihost,
681 struct isci_remote_device *idev,
682 struct isci_request *ireq)
683{
684 struct sci_base_state_machine *sm = &idev->sm;
685 enum sci_remote_device_states state = sm->current_state_id;
686 struct isci_port *iport = idev->owning_port;
687 enum sci_status status;
688
689 switch (state) {
690 case SCI_DEV_INITIAL:
691 case SCI_DEV_STOPPED:
692 case SCI_DEV_STARTING:
693 case SCI_SMP_DEV_IDLE:
694 case SCI_SMP_DEV_CMD:
695 case SCI_DEV_STOPPING:
696 case SCI_DEV_FAILED:
697 case SCI_DEV_RESETTING:
698 case SCI_DEV_FINAL:
699 default:
700 dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %d\n",
701 __func__, state);
702 return SCI_FAILURE_INVALID_STATE;
703 case SCI_STP_DEV_IDLE:
704 case SCI_STP_DEV_CMD:
705 case SCI_STP_DEV_NCQ:
706 case SCI_STP_DEV_NCQ_ERROR:
707 case SCI_STP_DEV_AWAIT_RESET:
708 status = sci_port_start_io(iport, idev, ireq);
709 if (status != SCI_SUCCESS)
710 return status;
711
712 status = sci_remote_node_context_start_task(&idev->rnc, ireq);
713 if (status != SCI_SUCCESS)
714 goto out;
715
716 status = sci_request_start(ireq);
717 if (status != SCI_SUCCESS)
718 goto out;
719
720 /* Note: If the remote device state is not IDLE this will
721 * replace the request that probably resulted in the task
722 * management request.
723 */
724 idev->working_request = ireq;
725 sci_change_state(sm, SCI_STP_DEV_CMD);
726
727 /* The remote node context must cleanup the TCi to NCQ mapping
728 * table. The only way to do this correctly is to either write
729 * to the TLCR register or to invalidate and repost the RNC. In
730 * either case the remote node context state machine will take
731 * the correct action when the remote node context is suspended
732 * and later resumed.
733 */
734 sci_remote_node_context_suspend(&idev->rnc,
735 SCI_SOFTWARE_SUSPENSION, NULL, NULL);
736 sci_remote_node_context_resume(&idev->rnc,
737 sci_remote_device_continue_request,
738 idev);
739
740 out:
741 sci_remote_device_start_request(idev, ireq, status);
742 /* We need to let the controller start request handler know that
743 * it can't post TC yet. We will provide a callback function to
744 * post TC when RNC gets resumed.
745 */
746 return SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS;
747 case SCI_DEV_READY:
748 status = sci_port_start_io(iport, idev, ireq);
749 if (status != SCI_SUCCESS)
750 return status;
751
752 status = sci_remote_node_context_start_task(&idev->rnc, ireq);
753 if (status != SCI_SUCCESS)
754 break;
755
756 status = sci_request_start(ireq);
757 break;
758 }
759 sci_remote_device_start_request(idev, ireq, status);
760
761 return status;
762}
763
764void sci_remote_device_post_request(struct isci_remote_device *idev, u32 request)
765{
766 struct isci_port *iport = idev->owning_port;
767 u32 context;
768
769 context = request |
770 (ISCI_PEG << SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) |
771 (iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) |
772 idev->rnc.remote_node_index;
773
774 sci_controller_post_request(iport->owning_controller, context);
775}
776
777/* called once the remote node context has transisitioned to a
778 * ready state. This is the indication that the remote device object can also
779 * transition to ready.
780 */
781static void remote_device_resume_done(void *_dev)
782{
783 struct isci_remote_device *idev = _dev;
784
785 if (is_remote_device_ready(idev))
786 return;
787
788 /* go 'ready' if we are not already in a ready state */
789 sci_change_state(&idev->sm, SCI_DEV_READY);
790}
791
792static void sci_stp_remote_device_ready_idle_substate_resume_complete_handler(void *_dev)
793{
794 struct isci_remote_device *idev = _dev;
795 struct isci_host *ihost = idev->owning_port->owning_controller;
796
797 /* For NCQ operation we do not issue a isci_remote_device_not_ready().
798 * As a result, avoid sending the ready notification.
799 */
800 if (idev->sm.previous_state_id != SCI_STP_DEV_NCQ)
801 isci_remote_device_ready(ihost, idev);
802}
803
804static void sci_remote_device_initial_state_enter(struct sci_base_state_machine *sm)
805{
806 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
807
808 /* Initial state is a transitional state to the stopped state */
809 sci_change_state(&idev->sm, SCI_DEV_STOPPED);
810}
811
812/**
813 * sci_remote_device_destruct() - free remote node context and destruct
814 * @remote_device: This parameter specifies the remote device to be destructed.
815 *
816 * Remote device objects are a limited resource. As such, they must be
817 * protected. Thus calls to construct and destruct are mutually exclusive and
818 * non-reentrant. The return value shall indicate if the device was
819 * successfully destructed or if some failure occurred. enum sci_status This value
820 * is returned if the device is successfully destructed.
821 * SCI_FAILURE_INVALID_REMOTE_DEVICE This value is returned if the supplied
822 * device isn't valid (e.g. it's already been destoryed, the handle isn't
823 * valid, etc.).
824 */
825static enum sci_status sci_remote_device_destruct(struct isci_remote_device *idev)
826{
827 struct sci_base_state_machine *sm = &idev->sm;
828 enum sci_remote_device_states state = sm->current_state_id;
829 struct isci_host *ihost;
830
831 if (state != SCI_DEV_STOPPED) {
832 dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %d\n",
833 __func__, state);
834 return SCI_FAILURE_INVALID_STATE;
835 }
836
837 ihost = idev->owning_port->owning_controller;
838 sci_controller_free_remote_node_context(ihost, idev,
839 idev->rnc.remote_node_index);
840 idev->rnc.remote_node_index = SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX;
841 sci_change_state(sm, SCI_DEV_FINAL);
842
843 return SCI_SUCCESS;
844}
845
846/**
847 * isci_remote_device_deconstruct() - This function frees an isci_remote_device.
848 * @ihost: This parameter specifies the isci host object.
849 * @idev: This parameter specifies the remote device to be freed.
850 *
851 */
852static void isci_remote_device_deconstruct(struct isci_host *ihost, struct isci_remote_device *idev)
853{
854 dev_dbg(&ihost->pdev->dev,
855 "%s: isci_device = %p\n", __func__, idev);
856
857 /* There should not be any outstanding io's. All paths to
858 * here should go through isci_remote_device_nuke_requests.
859 * If we hit this condition, we will need a way to complete
860 * io requests in process */
861 BUG_ON(!list_empty(&idev->reqs_in_process));
862
863 sci_remote_device_destruct(idev);
864 list_del_init(&idev->node);
865 isci_put_device(idev);
866}
867
868static void sci_remote_device_stopped_state_enter(struct sci_base_state_machine *sm)
869{
870 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
871 struct isci_host *ihost = idev->owning_port->owning_controller;
872 u32 prev_state;
873
874 /* If we are entering from the stopping state let the SCI User know that
875 * the stop operation has completed.
876 */
877 prev_state = idev->sm.previous_state_id;
878 if (prev_state == SCI_DEV_STOPPING)
879 isci_remote_device_deconstruct(ihost, idev);
880
881 sci_controller_remote_device_stopped(ihost, idev);
882}
883
884static void sci_remote_device_starting_state_enter(struct sci_base_state_machine *sm)
885{
886 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
887 struct isci_host *ihost = idev->owning_port->owning_controller;
888
889 isci_remote_device_not_ready(ihost, idev,
890 SCIC_REMOTE_DEVICE_NOT_READY_START_REQUESTED);
891}
892
893static void sci_remote_device_ready_state_enter(struct sci_base_state_machine *sm)
894{
895 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
896 struct isci_host *ihost = idev->owning_port->owning_controller;
897 struct domain_device *dev = idev->domain_dev;
898
899 if (dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_SATA)) {
900 sci_change_state(&idev->sm, SCI_STP_DEV_IDLE);
901 } else if (dev_is_expander(dev)) {
902 sci_change_state(&idev->sm, SCI_SMP_DEV_IDLE);
903 } else
904 isci_remote_device_ready(ihost, idev);
905}
906
907static void sci_remote_device_ready_state_exit(struct sci_base_state_machine *sm)
908{
909 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
910 struct domain_device *dev = idev->domain_dev;
911
912 if (dev->dev_type == SAS_END_DEV) {
913 struct isci_host *ihost = idev->owning_port->owning_controller;
914
915 isci_remote_device_not_ready(ihost, idev,
916 SCIC_REMOTE_DEVICE_NOT_READY_STOP_REQUESTED);
917 }
918}
919
920static void sci_remote_device_resetting_state_enter(struct sci_base_state_machine *sm)
921{
922 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
923
924 sci_remote_node_context_suspend(
925 &idev->rnc, SCI_SOFTWARE_SUSPENSION, NULL, NULL);
926}
927
928static void sci_remote_device_resetting_state_exit(struct sci_base_state_machine *sm)
929{
930 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
931
932 sci_remote_node_context_resume(&idev->rnc, NULL, NULL);
933}
934
935static void sci_stp_remote_device_ready_idle_substate_enter(struct sci_base_state_machine *sm)
936{
937 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
938
939 idev->working_request = NULL;
940 if (sci_remote_node_context_is_ready(&idev->rnc)) {
941 /*
942 * Since the RNC is ready, it's alright to finish completion
943 * processing (e.g. signal the remote device is ready). */
944 sci_stp_remote_device_ready_idle_substate_resume_complete_handler(idev);
945 } else {
946 sci_remote_node_context_resume(&idev->rnc,
947 sci_stp_remote_device_ready_idle_substate_resume_complete_handler,
948 idev);
949 }
950}
951
952static void sci_stp_remote_device_ready_cmd_substate_enter(struct sci_base_state_machine *sm)
953{
954 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
955 struct isci_host *ihost = idev->owning_port->owning_controller;
956
957 BUG_ON(idev->working_request == NULL);
958
959 isci_remote_device_not_ready(ihost, idev,
960 SCIC_REMOTE_DEVICE_NOT_READY_SATA_REQUEST_STARTED);
961}
962
963static void sci_stp_remote_device_ready_ncq_error_substate_enter(struct sci_base_state_machine *sm)
964{
965 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
966 struct isci_host *ihost = idev->owning_port->owning_controller;
967
968 if (idev->not_ready_reason == SCIC_REMOTE_DEVICE_NOT_READY_SATA_SDB_ERROR_FIS_RECEIVED)
969 isci_remote_device_not_ready(ihost, idev,
970 idev->not_ready_reason);
971}
972
973static void sci_smp_remote_device_ready_idle_substate_enter(struct sci_base_state_machine *sm)
974{
975 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
976 struct isci_host *ihost = idev->owning_port->owning_controller;
977
978 isci_remote_device_ready(ihost, idev);
979}
980
981static void sci_smp_remote_device_ready_cmd_substate_enter(struct sci_base_state_machine *sm)
982{
983 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
984 struct isci_host *ihost = idev->owning_port->owning_controller;
985
986 BUG_ON(idev->working_request == NULL);
987
988 isci_remote_device_not_ready(ihost, idev,
989 SCIC_REMOTE_DEVICE_NOT_READY_SMP_REQUEST_STARTED);
990}
991
992static void sci_smp_remote_device_ready_cmd_substate_exit(struct sci_base_state_machine *sm)
993{
994 struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);
995
996 idev->working_request = NULL;
997}
998
999static const struct sci_base_state sci_remote_device_state_table[] = {
1000 [SCI_DEV_INITIAL] = {
1001 .enter_state = sci_remote_device_initial_state_enter,
1002 },
1003 [SCI_DEV_STOPPED] = {
1004 .enter_state = sci_remote_device_stopped_state_enter,
1005 },
1006 [SCI_DEV_STARTING] = {
1007 .enter_state = sci_remote_device_starting_state_enter,
1008 },
1009 [SCI_DEV_READY] = {
1010 .enter_state = sci_remote_device_ready_state_enter,
1011 .exit_state = sci_remote_device_ready_state_exit
1012 },
1013 [SCI_STP_DEV_IDLE] = {
1014 .enter_state = sci_stp_remote_device_ready_idle_substate_enter,
1015 },
1016 [SCI_STP_DEV_CMD] = {
1017 .enter_state = sci_stp_remote_device_ready_cmd_substate_enter,
1018 },
1019 [SCI_STP_DEV_NCQ] = { },
1020 [SCI_STP_DEV_NCQ_ERROR] = {
1021 .enter_state = sci_stp_remote_device_ready_ncq_error_substate_enter,
1022 },
1023 [SCI_STP_DEV_AWAIT_RESET] = { },
1024 [SCI_SMP_DEV_IDLE] = {
1025 .enter_state = sci_smp_remote_device_ready_idle_substate_enter,
1026 },
1027 [SCI_SMP_DEV_CMD] = {
1028 .enter_state = sci_smp_remote_device_ready_cmd_substate_enter,
1029 .exit_state = sci_smp_remote_device_ready_cmd_substate_exit,
1030 },
1031 [SCI_DEV_STOPPING] = { },
1032 [SCI_DEV_FAILED] = { },
1033 [SCI_DEV_RESETTING] = {
1034 .enter_state = sci_remote_device_resetting_state_enter,
1035 .exit_state = sci_remote_device_resetting_state_exit
1036 },
1037 [SCI_DEV_FINAL] = { },
1038};
1039
1040/**
1041 * sci_remote_device_construct() - common construction
1042 * @sci_port: SAS/SATA port through which this device is accessed.
1043 * @sci_dev: remote device to construct
1044 *
1045 * This routine just performs benign initialization and does not
1046 * allocate the remote_node_context which is left to
1047 * sci_remote_device_[de]a_construct(). sci_remote_device_destruct()
1048 * frees the remote_node_context(s) for the device.
1049 */
1050static void sci_remote_device_construct(struct isci_port *iport,
1051 struct isci_remote_device *idev)
1052{
1053 idev->owning_port = iport;
1054 idev->started_request_count = 0;
1055
1056 sci_init_sm(&idev->sm, sci_remote_device_state_table, SCI_DEV_INITIAL);
1057
1058 sci_remote_node_context_construct(&idev->rnc,
1059 SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX);
1060}
1061
1062/**
1063 * sci_remote_device_da_construct() - construct direct attached device.
1064 *
1065 * The information (e.g. IAF, Signature FIS, etc.) necessary to build
1066 * the device is known to the SCI Core since it is contained in the
1067 * sci_phy object. Remote node context(s) is/are a global resource
1068 * allocated by this routine, freed by sci_remote_device_destruct().
1069 *
1070 * Returns:
1071 * SCI_FAILURE_DEVICE_EXISTS - device has already been constructed.
1072 * SCI_FAILURE_UNSUPPORTED_PROTOCOL - e.g. sas device attached to
1073 * sata-only controller instance.
1074 * SCI_FAILURE_INSUFFICIENT_RESOURCES - remote node contexts exhausted.
1075 */
1076static enum sci_status sci_remote_device_da_construct(struct isci_port *iport,
1077 struct isci_remote_device *idev)
1078{
1079 enum sci_status status;
1080 struct domain_device *dev = idev->domain_dev;
1081
1082 sci_remote_device_construct(iport, idev);
1083
1084 /*
1085 * This information is request to determine how many remote node context
1086 * entries will be needed to store the remote node.
1087 */
1088 idev->is_direct_attached = true;
1089 status = sci_controller_allocate_remote_node_context(iport->owning_controller,
1090 idev,
1091 &idev->rnc.remote_node_index);
1092
1093 if (status != SCI_SUCCESS)
1094 return status;
1095
1096 if (dev->dev_type == SAS_END_DEV || dev->dev_type == SATA_DEV ||
1097 (dev->tproto & SAS_PROTOCOL_STP) || dev_is_expander(dev))
1098 /* pass */;
1099 else
1100 return SCI_FAILURE_UNSUPPORTED_PROTOCOL;
1101
1102 idev->connection_rate = sci_port_get_max_allowed_speed(iport);
1103
1104 /* / @todo Should I assign the port width by reading all of the phys on the port? */
1105 idev->device_port_width = 1;
1106
1107 return SCI_SUCCESS;
1108}
1109
1110/**
1111 * sci_remote_device_ea_construct() - construct expander attached device
1112 *
1113 * Remote node context(s) is/are a global resource allocated by this
1114 * routine, freed by sci_remote_device_destruct().
1115 *
1116 * Returns:
1117 * SCI_FAILURE_DEVICE_EXISTS - device has already been constructed.
1118 * SCI_FAILURE_UNSUPPORTED_PROTOCOL - e.g. sas device attached to
1119 * sata-only controller instance.
1120 * SCI_FAILURE_INSUFFICIENT_RESOURCES - remote node contexts exhausted.
1121 */
1122static enum sci_status sci_remote_device_ea_construct(struct isci_port *iport,
1123 struct isci_remote_device *idev)
1124{
1125 struct domain_device *dev = idev->domain_dev;
1126 enum sci_status status;
1127
1128 sci_remote_device_construct(iport, idev);
1129
1130 status = sci_controller_allocate_remote_node_context(iport->owning_controller,
1131 idev,
1132 &idev->rnc.remote_node_index);
1133 if (status != SCI_SUCCESS)
1134 return status;
1135
1136 if (dev->dev_type == SAS_END_DEV || dev->dev_type == SATA_DEV ||
1137 (dev->tproto & SAS_PROTOCOL_STP) || dev_is_expander(dev))
1138 /* pass */;
1139 else
1140 return SCI_FAILURE_UNSUPPORTED_PROTOCOL;
1141
1142 /*
1143 * For SAS-2 the physical link rate is actually a logical link
1144 * rate that incorporates multiplexing. The SCU doesn't
1145 * incorporate multiplexing and for the purposes of the
1146 * connection the logical link rate is that same as the
1147 * physical. Furthermore, the SAS-2 and SAS-1.1 fields overlay
1148 * one another, so this code works for both situations. */
1149 idev->connection_rate = min_t(u16, sci_port_get_max_allowed_speed(iport),
1150 dev->linkrate);
1151
1152 /* / @todo Should I assign the port width by reading all of the phys on the port? */
1153 idev->device_port_width = 1;
1154
1155 return SCI_SUCCESS;
1156}
1157
1158/**
1159 * sci_remote_device_start() - This method will start the supplied remote
1160 * device. This method enables normal IO requests to flow through to the
1161 * remote device.
1162 * @remote_device: This parameter specifies the device to be started.
1163 * @timeout: This parameter specifies the number of milliseconds in which the
1164 * start operation should complete.
1165 *
1166 * An indication of whether the device was successfully started. SCI_SUCCESS
1167 * This value is returned if the device was successfully started.
1168 * SCI_FAILURE_INVALID_PHY This value is returned if the user attempts to start
1169 * the device when there have been no phys added to it.
1170 */
1171static enum sci_status sci_remote_device_start(struct isci_remote_device *idev,
1172 u32 timeout)
1173{
1174 struct sci_base_state_machine *sm = &idev->sm;
1175 enum sci_remote_device_states state = sm->current_state_id;
1176 enum sci_status status;
1177
1178 if (state != SCI_DEV_STOPPED) {
1179 dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %d\n",
1180 __func__, state);
1181 return SCI_FAILURE_INVALID_STATE;
1182 }
1183
1184 status = sci_remote_node_context_resume(&idev->rnc,
1185 remote_device_resume_done,
1186 idev);
1187 if (status != SCI_SUCCESS)
1188 return status;
1189
1190 sci_change_state(sm, SCI_DEV_STARTING);
1191
1192 return SCI_SUCCESS;
1193}
1194
1195static enum sci_status isci_remote_device_construct(struct isci_port *iport,
1196 struct isci_remote_device *idev)
1197{
1198 struct isci_host *ihost = iport->isci_host;
1199 struct domain_device *dev = idev->domain_dev;
1200 enum sci_status status;
1201
1202 if (dev->parent && dev_is_expander(dev->parent))
1203 status = sci_remote_device_ea_construct(iport, idev);
1204 else
1205 status = sci_remote_device_da_construct(iport, idev);
1206
1207 if (status != SCI_SUCCESS) {
1208 dev_dbg(&ihost->pdev->dev, "%s: construct failed: %d\n",
1209 __func__, status);
1210
1211 return status;
1212 }
1213
1214 /* start the device. */
1215 status = sci_remote_device_start(idev, ISCI_REMOTE_DEVICE_START_TIMEOUT);
1216
1217 if (status != SCI_SUCCESS)
1218 dev_warn(&ihost->pdev->dev, "remote device start failed: %d\n",
1219 status);
1220
1221 return status;
1222}
1223
1224void isci_remote_device_nuke_requests(struct isci_host *ihost, struct isci_remote_device *idev)
1225{
1226 DECLARE_COMPLETION_ONSTACK(aborted_task_completion);
1227
1228 dev_dbg(&ihost->pdev->dev,
1229 "%s: idev = %p\n", __func__, idev);
1230
1231 /* Cleanup all requests pending for this device. */
1232 isci_terminate_pending_requests(ihost, idev);
1233
1234 dev_dbg(&ihost->pdev->dev,
1235 "%s: idev = %p, done\n", __func__, idev);
1236}
1237
1238/**
1239 * This function builds the isci_remote_device when a libsas dev_found message
1240 * is received.
1241 * @isci_host: This parameter specifies the isci host object.
1242 * @port: This parameter specifies the isci_port conected to this device.
1243 *
1244 * pointer to new isci_remote_device.
1245 */
1246static struct isci_remote_device *
1247isci_remote_device_alloc(struct isci_host *ihost, struct isci_port *iport)
1248{
1249 struct isci_remote_device *idev;
1250 int i;
1251
1252 for (i = 0; i < SCI_MAX_REMOTE_DEVICES; i++) {
1253 idev = &ihost->devices[i];
1254 if (!test_and_set_bit(IDEV_ALLOCATED, &idev->flags))
1255 break;
1256 }
1257
1258 if (i >= SCI_MAX_REMOTE_DEVICES) {
1259 dev_warn(&ihost->pdev->dev, "%s: failed\n", __func__);
1260 return NULL;
1261 }
1262
1263 if (WARN_ONCE(!list_empty(&idev->reqs_in_process), "found requests in process\n"))
1264 return NULL;
1265
1266 if (WARN_ONCE(!list_empty(&idev->node), "found non-idle remote device\n"))
1267 return NULL;
1268
1269 return idev;
1270}
1271
1272void isci_remote_device_release(struct kref *kref)
1273{
1274 struct isci_remote_device *idev = container_of(kref, typeof(*idev), kref);
1275 struct isci_host *ihost = idev->isci_port->isci_host;
1276
1277 idev->domain_dev = NULL;
1278 idev->isci_port = NULL;
1279 clear_bit(IDEV_START_PENDING, &idev->flags);
1280 clear_bit(IDEV_STOP_PENDING, &idev->flags);
1281 clear_bit(IDEV_IO_READY, &idev->flags);
1282 clear_bit(IDEV_GONE, &idev->flags);
1283 clear_bit(IDEV_EH, &idev->flags);
1284 smp_mb__before_clear_bit();
1285 clear_bit(IDEV_ALLOCATED, &idev->flags);
1286 wake_up(&ihost->eventq);
1287}
1288
1289/**
1290 * isci_remote_device_stop() - This function is called internally to stop the
1291 * remote device.
1292 * @isci_host: This parameter specifies the isci host object.
1293 * @isci_device: This parameter specifies the remote device.
1294 *
1295 * The status of the ihost request to stop.
1296 */
1297enum sci_status isci_remote_device_stop(struct isci_host *ihost, struct isci_remote_device *idev)
1298{
1299 enum sci_status status;
1300 unsigned long flags;
1301
1302 dev_dbg(&ihost->pdev->dev,
1303 "%s: isci_device = %p\n", __func__, idev);
1304
1305 spin_lock_irqsave(&ihost->scic_lock, flags);
1306 idev->domain_dev->lldd_dev = NULL; /* disable new lookups */
1307 set_bit(IDEV_GONE, &idev->flags);
1308 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1309
1310 /* Kill all outstanding requests. */
1311 isci_remote_device_nuke_requests(ihost, idev);
1312
1313 set_bit(IDEV_STOP_PENDING, &idev->flags);
1314
1315 spin_lock_irqsave(&ihost->scic_lock, flags);
1316 status = sci_remote_device_stop(idev, 50);
1317 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1318
1319 /* Wait for the stop complete callback. */
1320 if (WARN_ONCE(status != SCI_SUCCESS, "failed to stop device\n"))
1321 /* nothing to wait for */;
1322 else
1323 wait_for_device_stop(ihost, idev);
1324
1325 return status;
1326}
1327
1328/**
1329 * isci_remote_device_gone() - This function is called by libsas when a domain
1330 * device is removed.
1331 * @domain_device: This parameter specifies the libsas domain device.
1332 *
1333 */
1334void isci_remote_device_gone(struct domain_device *dev)
1335{
1336 struct isci_host *ihost = dev_to_ihost(dev);
1337 struct isci_remote_device *idev = dev->lldd_dev;
1338
1339 dev_dbg(&ihost->pdev->dev,
1340 "%s: domain_device = %p, isci_device = %p, isci_port = %p\n",
1341 __func__, dev, idev, idev->isci_port);
1342
1343 isci_remote_device_stop(ihost, idev);
1344}
1345
1346
1347/**
1348 * isci_remote_device_found() - This function is called by libsas when a remote
1349 * device is discovered. A remote device object is created and started. the
1350 * function then sleeps until the sci core device started message is
1351 * received.
1352 * @domain_device: This parameter specifies the libsas domain device.
1353 *
1354 * status, zero indicates success.
1355 */
1356int isci_remote_device_found(struct domain_device *domain_dev)
1357{
1358 struct isci_host *isci_host = dev_to_ihost(domain_dev);
1359 struct isci_port *isci_port;
1360 struct isci_phy *isci_phy;
1361 struct asd_sas_port *sas_port;
1362 struct asd_sas_phy *sas_phy;
1363 struct isci_remote_device *isci_device;
1364 enum sci_status status;
1365
1366 dev_dbg(&isci_host->pdev->dev,
1367 "%s: domain_device = %p\n", __func__, domain_dev);
1368
1369 wait_for_start(isci_host);
1370
1371 sas_port = domain_dev->port;
1372 sas_phy = list_first_entry(&sas_port->phy_list, struct asd_sas_phy,
1373 port_phy_el);
1374 isci_phy = to_iphy(sas_phy);
1375 isci_port = isci_phy->isci_port;
1376
1377 /* we are being called for a device on this port,
1378 * so it has to come up eventually
1379 */
1380 wait_for_completion(&isci_port->start_complete);
1381
1382 if ((isci_stopping == isci_port_get_state(isci_port)) ||
1383 (isci_stopped == isci_port_get_state(isci_port)))
1384 return -ENODEV;
1385
1386 isci_device = isci_remote_device_alloc(isci_host, isci_port);
1387 if (!isci_device)
1388 return -ENODEV;
1389
1390 kref_init(&isci_device->kref);
1391 INIT_LIST_HEAD(&isci_device->node);
1392
1393 spin_lock_irq(&isci_host->scic_lock);
1394 isci_device->domain_dev = domain_dev;
1395 isci_device->isci_port = isci_port;
1396 list_add_tail(&isci_device->node, &isci_port->remote_dev_list);
1397
1398 set_bit(IDEV_START_PENDING, &isci_device->flags);
1399 status = isci_remote_device_construct(isci_port, isci_device);
1400
1401 dev_dbg(&isci_host->pdev->dev,
1402 "%s: isci_device = %p\n",
1403 __func__, isci_device);
1404
1405 if (status == SCI_SUCCESS) {
1406 /* device came up, advertise it to the world */
1407 domain_dev->lldd_dev = isci_device;
1408 } else
1409 isci_put_device(isci_device);
1410 spin_unlock_irq(&isci_host->scic_lock);
1411
1412 /* wait for the device ready callback. */
1413 wait_for_device_start(isci_host, isci_device);
1414
1415 return status == SCI_SUCCESS ? 0 : -ENODEV;
1416}
1417/**
1418 * isci_device_is_reset_pending() - This function will check if there is any
1419 * pending reset condition on the device.
1420 * @request: This parameter is the isci_device object.
1421 *
1422 * true if there is a reset pending for the device.
1423 */
1424bool isci_device_is_reset_pending(
1425 struct isci_host *isci_host,
1426 struct isci_remote_device *isci_device)
1427{
1428 struct isci_request *isci_request;
1429 struct isci_request *tmp_req;
1430 bool reset_is_pending = false;
1431 unsigned long flags;
1432
1433 dev_dbg(&isci_host->pdev->dev,
1434 "%s: isci_device = %p\n", __func__, isci_device);
1435
1436 spin_lock_irqsave(&isci_host->scic_lock, flags);
1437
1438 /* Check for reset on all pending requests. */
1439 list_for_each_entry_safe(isci_request, tmp_req,
1440 &isci_device->reqs_in_process, dev_node) {
1441 dev_dbg(&isci_host->pdev->dev,
1442 "%s: isci_device = %p request = %p\n",
1443 __func__, isci_device, isci_request);
1444
1445 if (isci_request->ttype == io_task) {
1446 struct sas_task *task = isci_request_access_task(
1447 isci_request);
1448
1449 spin_lock(&task->task_state_lock);
1450 if (task->task_state_flags & SAS_TASK_NEED_DEV_RESET)
1451 reset_is_pending = true;
1452 spin_unlock(&task->task_state_lock);
1453 }
1454 }
1455
1456 spin_unlock_irqrestore(&isci_host->scic_lock, flags);
1457
1458 dev_dbg(&isci_host->pdev->dev,
1459 "%s: isci_device = %p reset_is_pending = %d\n",
1460 __func__, isci_device, reset_is_pending);
1461
1462 return reset_is_pending;
1463}
1464
1465/**
1466 * isci_device_clear_reset_pending() - This function will clear if any pending
1467 * reset condition flags on the device.
1468 * @request: This parameter is the isci_device object.
1469 *
1470 * true if there is a reset pending for the device.
1471 */
1472void isci_device_clear_reset_pending(struct isci_host *ihost, struct isci_remote_device *idev)
1473{
1474 struct isci_request *isci_request;
1475 struct isci_request *tmp_req;
1476 unsigned long flags = 0;
1477
1478 dev_dbg(&ihost->pdev->dev, "%s: idev=%p, ihost=%p\n",
1479 __func__, idev, ihost);
1480
1481 spin_lock_irqsave(&ihost->scic_lock, flags);
1482
1483 /* Clear reset pending on all pending requests. */
1484 list_for_each_entry_safe(isci_request, tmp_req,
1485 &idev->reqs_in_process, dev_node) {
1486 dev_dbg(&ihost->pdev->dev, "%s: idev = %p request = %p\n",
1487 __func__, idev, isci_request);
1488
1489 if (isci_request->ttype == io_task) {
1490
1491 unsigned long flags2;
1492 struct sas_task *task = isci_request_access_task(
1493 isci_request);
1494
1495 spin_lock_irqsave(&task->task_state_lock, flags2);
1496 task->task_state_flags &= ~SAS_TASK_NEED_DEV_RESET;
1497 spin_unlock_irqrestore(&task->task_state_lock, flags2);
1498 }
1499 }
1500 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1501}
diff --git a/drivers/scsi/isci/remote_device.h b/drivers/scsi/isci/remote_device.h
new file mode 100644
index 000000000000..57ccfc3d6ad3
--- /dev/null
+++ b/drivers/scsi/isci/remote_device.h
@@ -0,0 +1,352 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _ISCI_REMOTE_DEVICE_H_
57#define _ISCI_REMOTE_DEVICE_H_
58#include <scsi/libsas.h>
59#include <linux/kref.h>
60#include "scu_remote_node_context.h"
61#include "remote_node_context.h"
62#include "port.h"
63
64enum sci_remote_device_not_ready_reason_code {
65 SCIC_REMOTE_DEVICE_NOT_READY_START_REQUESTED,
66 SCIC_REMOTE_DEVICE_NOT_READY_STOP_REQUESTED,
67 SCIC_REMOTE_DEVICE_NOT_READY_SATA_REQUEST_STARTED,
68 SCIC_REMOTE_DEVICE_NOT_READY_SATA_SDB_ERROR_FIS_RECEIVED,
69 SCIC_REMOTE_DEVICE_NOT_READY_SMP_REQUEST_STARTED,
70 SCIC_REMOTE_DEVICE_NOT_READY_REASON_CODE_MAX
71};
72
73/**
74 * isci_remote_device - isci representation of a sas expander / end point
75 * @device_port_width: hw setting for number of simultaneous connections
76 * @connection_rate: per-taskcontext connection rate for this device
77 * @working_request: SATA requests have no tag we for unaccelerated
78 * protocols we need a method to associate unsolicited
79 * frames with a pending request
80 */
81struct isci_remote_device {
82 #define IDEV_START_PENDING 0
83 #define IDEV_STOP_PENDING 1
84 #define IDEV_ALLOCATED 2
85 #define IDEV_EH 3
86 #define IDEV_GONE 4
87 #define IDEV_IO_READY 5
88 #define IDEV_IO_NCQERROR 6
89 unsigned long flags;
90 struct kref kref;
91 struct isci_port *isci_port;
92 struct domain_device *domain_dev;
93 struct list_head node;
94 struct list_head reqs_in_process;
95 struct sci_base_state_machine sm;
96 u32 device_port_width;
97 enum sas_linkrate connection_rate;
98 bool is_direct_attached;
99 struct isci_port *owning_port;
100 struct sci_remote_node_context rnc;
101 /* XXX unify with device reference counting and delete */
102 u32 started_request_count;
103 struct isci_request *working_request;
104 u32 not_ready_reason;
105};
106
107#define ISCI_REMOTE_DEVICE_START_TIMEOUT 5000
108
109/* device reference routines must be called under sci_lock */
110static inline struct isci_remote_device *isci_lookup_device(struct domain_device *dev)
111{
112 struct isci_remote_device *idev = dev->lldd_dev;
113
114 if (idev && !test_bit(IDEV_GONE, &idev->flags)) {
115 kref_get(&idev->kref);
116 return idev;
117 }
118
119 return NULL;
120}
121
122void isci_remote_device_release(struct kref *kref);
123static inline void isci_put_device(struct isci_remote_device *idev)
124{
125 if (idev)
126 kref_put(&idev->kref, isci_remote_device_release);
127}
128
129enum sci_status isci_remote_device_stop(struct isci_host *ihost,
130 struct isci_remote_device *idev);
131void isci_remote_device_nuke_requests(struct isci_host *ihost,
132 struct isci_remote_device *idev);
133void isci_remote_device_gone(struct domain_device *domain_dev);
134int isci_remote_device_found(struct domain_device *domain_dev);
135bool isci_device_is_reset_pending(struct isci_host *ihost,
136 struct isci_remote_device *idev);
137void isci_device_clear_reset_pending(struct isci_host *ihost,
138 struct isci_remote_device *idev);
139/**
140 * sci_remote_device_stop() - This method will stop both transmission and
141 * reception of link activity for the supplied remote device. This method
142 * disables normal IO requests from flowing through to the remote device.
143 * @remote_device: This parameter specifies the device to be stopped.
144 * @timeout: This parameter specifies the number of milliseconds in which the
145 * stop operation should complete.
146 *
147 * An indication of whether the device was successfully stopped. SCI_SUCCESS
148 * This value is returned if the transmission and reception for the device was
149 * successfully stopped.
150 */
151enum sci_status sci_remote_device_stop(
152 struct isci_remote_device *idev,
153 u32 timeout);
154
155/**
156 * sci_remote_device_reset() - This method will reset the device making it
157 * ready for operation. This method must be called anytime the device is
158 * reset either through a SMP phy control or a port hard reset request.
159 * @remote_device: This parameter specifies the device to be reset.
160 *
161 * This method does not actually cause the device hardware to be reset. This
162 * method resets the software object so that it will be operational after a
163 * device hardware reset completes. An indication of whether the device reset
164 * was accepted. SCI_SUCCESS This value is returned if the device reset is
165 * started.
166 */
167enum sci_status sci_remote_device_reset(
168 struct isci_remote_device *idev);
169
170/**
171 * sci_remote_device_reset_complete() - This method informs the device object
172 * that the reset operation is complete and the device can resume operation
173 * again.
174 * @remote_device: This parameter specifies the device which is to be informed
175 * of the reset complete operation.
176 *
177 * An indication that the device is resuming operation. SCI_SUCCESS the device
178 * is resuming operation.
179 */
180enum sci_status sci_remote_device_reset_complete(
181 struct isci_remote_device *idev);
182
183/**
184 * enum sci_remote_device_states - This enumeration depicts all the states
185 * for the common remote device state machine.
186 *
187 *
188 */
189enum sci_remote_device_states {
190 /**
191 * Simply the initial state for the base remote device state machine.
192 */
193 SCI_DEV_INITIAL,
194
195 /**
196 * This state indicates that the remote device has successfully been
197 * stopped. In this state no new IO operations are permitted.
198 * This state is entered from the INITIAL state.
199 * This state is entered from the STOPPING state.
200 */
201 SCI_DEV_STOPPED,
202
203 /**
204 * This state indicates the the remote device is in the process of
205 * becoming ready (i.e. starting). In this state no new IO operations
206 * are permitted.
207 * This state is entered from the STOPPED state.
208 */
209 SCI_DEV_STARTING,
210
211 /**
212 * This state indicates the remote device is now ready. Thus, the user
213 * is able to perform IO operations on the remote device.
214 * This state is entered from the STARTING state.
215 */
216 SCI_DEV_READY,
217
218 /**
219 * This is the idle substate for the stp remote device. When there are no
220 * active IO for the device it is is in this state.
221 */
222 SCI_STP_DEV_IDLE,
223
224 /**
225 * This is the command state for for the STP remote device. This state is
226 * entered when the device is processing a non-NCQ command. The device object
227 * will fail any new start IO requests until this command is complete.
228 */
229 SCI_STP_DEV_CMD,
230
231 /**
232 * This is the NCQ state for the STP remote device. This state is entered
233 * when the device is processing an NCQ reuqest. It will remain in this state
234 * so long as there is one or more NCQ requests being processed.
235 */
236 SCI_STP_DEV_NCQ,
237
238 /**
239 * This is the NCQ error state for the STP remote device. This state is
240 * entered when an SDB error FIS is received by the device object while in the
241 * NCQ state. The device object will only accept a READ LOG command while in
242 * this state.
243 */
244 SCI_STP_DEV_NCQ_ERROR,
245
246 /**
247 * This is the READY substate indicates the device is waiting for the RESET task
248 * coming to be recovered from certain hardware specific error.
249 */
250 SCI_STP_DEV_AWAIT_RESET,
251
252 /**
253 * This is the ready operational substate for the remote device. This is the
254 * normal operational state for a remote device.
255 */
256 SCI_SMP_DEV_IDLE,
257
258 /**
259 * This is the suspended state for the remote device. This is the state that
260 * the device is placed in when a RNC suspend is received by the SCU hardware.
261 */
262 SCI_SMP_DEV_CMD,
263
264 /**
265 * This state indicates that the remote device is in the process of
266 * stopping. In this state no new IO operations are permitted, but
267 * existing IO operations are allowed to complete.
268 * This state is entered from the READY state.
269 * This state is entered from the FAILED state.
270 */
271 SCI_DEV_STOPPING,
272
273 /**
274 * This state indicates that the remote device has failed.
275 * In this state no new IO operations are permitted.
276 * This state is entered from the INITIALIZING state.
277 * This state is entered from the READY state.
278 */
279 SCI_DEV_FAILED,
280
281 /**
282 * This state indicates the device is being reset.
283 * In this state no new IO operations are permitted.
284 * This state is entered from the READY state.
285 */
286 SCI_DEV_RESETTING,
287
288 /**
289 * Simply the final state for the base remote device state machine.
290 */
291 SCI_DEV_FINAL,
292};
293
294static inline struct isci_remote_device *rnc_to_dev(struct sci_remote_node_context *rnc)
295{
296 struct isci_remote_device *idev;
297
298 idev = container_of(rnc, typeof(*idev), rnc);
299
300 return idev;
301}
302
303static inline bool dev_is_expander(struct domain_device *dev)
304{
305 return dev->dev_type == EDGE_DEV || dev->dev_type == FANOUT_DEV;
306}
307
308static inline void sci_remote_device_decrement_request_count(struct isci_remote_device *idev)
309{
310 /* XXX delete this voodoo when converting to the top-level device
311 * reference count
312 */
313 if (WARN_ONCE(idev->started_request_count == 0,
314 "%s: tried to decrement started_request_count past 0!?",
315 __func__))
316 /* pass */;
317 else
318 idev->started_request_count--;
319}
320
321enum sci_status sci_remote_device_frame_handler(
322 struct isci_remote_device *idev,
323 u32 frame_index);
324
325enum sci_status sci_remote_device_event_handler(
326 struct isci_remote_device *idev,
327 u32 event_code);
328
329enum sci_status sci_remote_device_start_io(
330 struct isci_host *ihost,
331 struct isci_remote_device *idev,
332 struct isci_request *ireq);
333
334enum sci_status sci_remote_device_start_task(
335 struct isci_host *ihost,
336 struct isci_remote_device *idev,
337 struct isci_request *ireq);
338
339enum sci_status sci_remote_device_complete_io(
340 struct isci_host *ihost,
341 struct isci_remote_device *idev,
342 struct isci_request *ireq);
343
344enum sci_status sci_remote_device_suspend(
345 struct isci_remote_device *idev,
346 u32 suspend_type);
347
348void sci_remote_device_post_request(
349 struct isci_remote_device *idev,
350 u32 request);
351
352#endif /* !defined(_ISCI_REMOTE_DEVICE_H_) */
diff --git a/drivers/scsi/isci/remote_node_context.c b/drivers/scsi/isci/remote_node_context.c
new file mode 100644
index 000000000000..748e8339d1ec
--- /dev/null
+++ b/drivers/scsi/isci/remote_node_context.c
@@ -0,0 +1,627 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include "host.h"
57#include "isci.h"
58#include "remote_device.h"
59#include "remote_node_context.h"
60#include "scu_event_codes.h"
61#include "scu_task_context.h"
62
63
64/**
65 *
66 * @sci_rnc: The RNC for which the is posted request is being made.
67 *
68 * This method will return true if the RNC is not in the initial state. In all
69 * other states the RNC is considered active and this will return true. The
70 * destroy request of the state machine drives the RNC back to the initial
71 * state. If the state machine changes then this routine will also have to be
72 * changed. bool true if the state machine is not in the initial state false if
73 * the state machine is in the initial state
74 */
75
76/**
77 *
78 * @sci_rnc: The state of the remote node context object to check.
79 *
80 * This method will return true if the remote node context is in a READY state
81 * otherwise it will return false bool true if the remote node context is in
82 * the ready state. false if the remote node context is not in the ready state.
83 */
84bool sci_remote_node_context_is_ready(
85 struct sci_remote_node_context *sci_rnc)
86{
87 u32 current_state = sci_rnc->sm.current_state_id;
88
89 if (current_state == SCI_RNC_READY) {
90 return true;
91 }
92
93 return false;
94}
95
96static union scu_remote_node_context *sci_rnc_by_id(struct isci_host *ihost, u16 id)
97{
98 if (id < ihost->remote_node_entries &&
99 ihost->device_table[id])
100 return &ihost->remote_node_context_table[id];
101
102 return NULL;
103}
104
105static void sci_remote_node_context_construct_buffer(struct sci_remote_node_context *sci_rnc)
106{
107 struct isci_remote_device *idev = rnc_to_dev(sci_rnc);
108 struct domain_device *dev = idev->domain_dev;
109 int rni = sci_rnc->remote_node_index;
110 union scu_remote_node_context *rnc;
111 struct isci_host *ihost;
112 __le64 sas_addr;
113
114 ihost = idev->owning_port->owning_controller;
115 rnc = sci_rnc_by_id(ihost, rni);
116
117 memset(rnc, 0, sizeof(union scu_remote_node_context)
118 * sci_remote_device_node_count(idev));
119
120 rnc->ssp.remote_node_index = rni;
121 rnc->ssp.remote_node_port_width = idev->device_port_width;
122 rnc->ssp.logical_port_index = idev->owning_port->physical_port_index;
123
124 /* sas address is __be64, context ram format is __le64 */
125 sas_addr = cpu_to_le64(SAS_ADDR(dev->sas_addr));
126 rnc->ssp.remote_sas_address_hi = upper_32_bits(sas_addr);
127 rnc->ssp.remote_sas_address_lo = lower_32_bits(sas_addr);
128
129 rnc->ssp.nexus_loss_timer_enable = true;
130 rnc->ssp.check_bit = false;
131 rnc->ssp.is_valid = false;
132 rnc->ssp.is_remote_node_context = true;
133 rnc->ssp.function_number = 0;
134
135 rnc->ssp.arbitration_wait_time = 0;
136
137 if (dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) {
138 rnc->ssp.connection_occupancy_timeout =
139 ihost->user_parameters.stp_max_occupancy_timeout;
140 rnc->ssp.connection_inactivity_timeout =
141 ihost->user_parameters.stp_inactivity_timeout;
142 } else {
143 rnc->ssp.connection_occupancy_timeout =
144 ihost->user_parameters.ssp_max_occupancy_timeout;
145 rnc->ssp.connection_inactivity_timeout =
146 ihost->user_parameters.ssp_inactivity_timeout;
147 }
148
149 rnc->ssp.initial_arbitration_wait_time = 0;
150
151 /* Open Address Frame Parameters */
152 rnc->ssp.oaf_connection_rate = idev->connection_rate;
153 rnc->ssp.oaf_features = 0;
154 rnc->ssp.oaf_source_zone_group = 0;
155 rnc->ssp.oaf_more_compatibility_features = 0;
156}
157
158/**
159 *
160 * @sci_rnc:
161 * @callback:
162 * @callback_parameter:
163 *
164 * This method will setup the remote node context object so it will transition
165 * to its ready state. If the remote node context is already setup to
166 * transition to its final state then this function does nothing. none
167 */
168static void sci_remote_node_context_setup_to_resume(
169 struct sci_remote_node_context *sci_rnc,
170 scics_sds_remote_node_context_callback callback,
171 void *callback_parameter)
172{
173 if (sci_rnc->destination_state != SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_FINAL) {
174 sci_rnc->destination_state = SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_READY;
175 sci_rnc->user_callback = callback;
176 sci_rnc->user_cookie = callback_parameter;
177 }
178}
179
180static void sci_remote_node_context_setup_to_destory(
181 struct sci_remote_node_context *sci_rnc,
182 scics_sds_remote_node_context_callback callback,
183 void *callback_parameter)
184{
185 sci_rnc->destination_state = SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_FINAL;
186 sci_rnc->user_callback = callback;
187 sci_rnc->user_cookie = callback_parameter;
188}
189
190/**
191 *
192 *
193 * This method just calls the user callback function and then resets the
194 * callback.
195 */
196static void sci_remote_node_context_notify_user(
197 struct sci_remote_node_context *rnc)
198{
199 if (rnc->user_callback != NULL) {
200 (*rnc->user_callback)(rnc->user_cookie);
201
202 rnc->user_callback = NULL;
203 rnc->user_cookie = NULL;
204 }
205}
206
207static void sci_remote_node_context_continue_state_transitions(struct sci_remote_node_context *rnc)
208{
209 if (rnc->destination_state == SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_READY)
210 sci_remote_node_context_resume(rnc, rnc->user_callback,
211 rnc->user_cookie);
212}
213
214static void sci_remote_node_context_validate_context_buffer(struct sci_remote_node_context *sci_rnc)
215{
216 union scu_remote_node_context *rnc_buffer;
217 struct isci_remote_device *idev = rnc_to_dev(sci_rnc);
218 struct domain_device *dev = idev->domain_dev;
219 struct isci_host *ihost = idev->owning_port->owning_controller;
220
221 rnc_buffer = sci_rnc_by_id(ihost, sci_rnc->remote_node_index);
222
223 rnc_buffer->ssp.is_valid = true;
224
225 if (!idev->is_direct_attached &&
226 (dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP))) {
227 sci_remote_device_post_request(idev, SCU_CONTEXT_COMMAND_POST_RNC_96);
228 } else {
229 sci_remote_device_post_request(idev, SCU_CONTEXT_COMMAND_POST_RNC_32);
230
231 if (idev->is_direct_attached)
232 sci_port_setup_transports(idev->owning_port,
233 sci_rnc->remote_node_index);
234 }
235}
236
237static void sci_remote_node_context_invalidate_context_buffer(struct sci_remote_node_context *sci_rnc)
238{
239 union scu_remote_node_context *rnc_buffer;
240 struct isci_remote_device *idev = rnc_to_dev(sci_rnc);
241 struct isci_host *ihost = idev->owning_port->owning_controller;
242
243 rnc_buffer = sci_rnc_by_id(ihost, sci_rnc->remote_node_index);
244
245 rnc_buffer->ssp.is_valid = false;
246
247 sci_remote_device_post_request(rnc_to_dev(sci_rnc),
248 SCU_CONTEXT_COMMAND_POST_RNC_INVALIDATE);
249}
250
251static void sci_remote_node_context_initial_state_enter(struct sci_base_state_machine *sm)
252{
253 struct sci_remote_node_context *rnc = container_of(sm, typeof(*rnc), sm);
254
255 /* Check to see if we have gotten back to the initial state because
256 * someone requested to destroy the remote node context object.
257 */
258 if (sm->previous_state_id == SCI_RNC_INVALIDATING) {
259 rnc->destination_state = SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_UNSPECIFIED;
260 sci_remote_node_context_notify_user(rnc);
261 }
262}
263
264static void sci_remote_node_context_posting_state_enter(struct sci_base_state_machine *sm)
265{
266 struct sci_remote_node_context *sci_rnc = container_of(sm, typeof(*sci_rnc), sm);
267
268 sci_remote_node_context_validate_context_buffer(sci_rnc);
269}
270
271static void sci_remote_node_context_invalidating_state_enter(struct sci_base_state_machine *sm)
272{
273 struct sci_remote_node_context *rnc = container_of(sm, typeof(*rnc), sm);
274
275 sci_remote_node_context_invalidate_context_buffer(rnc);
276}
277
278static void sci_remote_node_context_resuming_state_enter(struct sci_base_state_machine *sm)
279{
280 struct sci_remote_node_context *rnc = container_of(sm, typeof(*rnc), sm);
281 struct isci_remote_device *idev;
282 struct domain_device *dev;
283
284 idev = rnc_to_dev(rnc);
285 dev = idev->domain_dev;
286
287 /*
288 * For direct attached SATA devices we need to clear the TLCR
289 * NCQ to TCi tag mapping on the phy and in cases where we
290 * resume because of a target reset we also need to update
291 * the STPTLDARNI register with the RNi of the device
292 */
293 if ((dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) &&
294 idev->is_direct_attached)
295 sci_port_setup_transports(idev->owning_port,
296 rnc->remote_node_index);
297
298 sci_remote_device_post_request(idev, SCU_CONTEXT_COMMAND_POST_RNC_RESUME);
299}
300
301static void sci_remote_node_context_ready_state_enter(struct sci_base_state_machine *sm)
302{
303 struct sci_remote_node_context *rnc = container_of(sm, typeof(*rnc), sm);
304
305 rnc->destination_state = SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_UNSPECIFIED;
306
307 if (rnc->user_callback)
308 sci_remote_node_context_notify_user(rnc);
309}
310
311static void sci_remote_node_context_tx_suspended_state_enter(struct sci_base_state_machine *sm)
312{
313 struct sci_remote_node_context *rnc = container_of(sm, typeof(*rnc), sm);
314
315 sci_remote_node_context_continue_state_transitions(rnc);
316}
317
318static void sci_remote_node_context_tx_rx_suspended_state_enter(struct sci_base_state_machine *sm)
319{
320 struct sci_remote_node_context *rnc = container_of(sm, typeof(*rnc), sm);
321
322 sci_remote_node_context_continue_state_transitions(rnc);
323}
324
325static const struct sci_base_state sci_remote_node_context_state_table[] = {
326 [SCI_RNC_INITIAL] = {
327 .enter_state = sci_remote_node_context_initial_state_enter,
328 },
329 [SCI_RNC_POSTING] = {
330 .enter_state = sci_remote_node_context_posting_state_enter,
331 },
332 [SCI_RNC_INVALIDATING] = {
333 .enter_state = sci_remote_node_context_invalidating_state_enter,
334 },
335 [SCI_RNC_RESUMING] = {
336 .enter_state = sci_remote_node_context_resuming_state_enter,
337 },
338 [SCI_RNC_READY] = {
339 .enter_state = sci_remote_node_context_ready_state_enter,
340 },
341 [SCI_RNC_TX_SUSPENDED] = {
342 .enter_state = sci_remote_node_context_tx_suspended_state_enter,
343 },
344 [SCI_RNC_TX_RX_SUSPENDED] = {
345 .enter_state = sci_remote_node_context_tx_rx_suspended_state_enter,
346 },
347 [SCI_RNC_AWAIT_SUSPENSION] = { },
348};
349
350void sci_remote_node_context_construct(struct sci_remote_node_context *rnc,
351 u16 remote_node_index)
352{
353 memset(rnc, 0, sizeof(struct sci_remote_node_context));
354
355 rnc->remote_node_index = remote_node_index;
356 rnc->destination_state = SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_UNSPECIFIED;
357
358 sci_init_sm(&rnc->sm, sci_remote_node_context_state_table, SCI_RNC_INITIAL);
359}
360
361enum sci_status sci_remote_node_context_event_handler(struct sci_remote_node_context *sci_rnc,
362 u32 event_code)
363{
364 enum scis_sds_remote_node_context_states state;
365
366 state = sci_rnc->sm.current_state_id;
367 switch (state) {
368 case SCI_RNC_POSTING:
369 switch (scu_get_event_code(event_code)) {
370 case SCU_EVENT_POST_RNC_COMPLETE:
371 sci_change_state(&sci_rnc->sm, SCI_RNC_READY);
372 break;
373 default:
374 goto out;
375 }
376 break;
377 case SCI_RNC_INVALIDATING:
378 if (scu_get_event_code(event_code) == SCU_EVENT_POST_RNC_INVALIDATE_COMPLETE) {
379 if (sci_rnc->destination_state == SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_FINAL)
380 state = SCI_RNC_INITIAL;
381 else
382 state = SCI_RNC_POSTING;
383 sci_change_state(&sci_rnc->sm, state);
384 } else {
385 switch (scu_get_event_type(event_code)) {
386 case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
387 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
388 /* We really dont care if the hardware is going to suspend
389 * the device since it's being invalidated anyway */
390 dev_dbg(scirdev_to_dev(rnc_to_dev(sci_rnc)),
391 "%s: SCIC Remote Node Context 0x%p was "
392 "suspeneded by hardware while being "
393 "invalidated.\n", __func__, sci_rnc);
394 break;
395 default:
396 goto out;
397 }
398 }
399 break;
400 case SCI_RNC_RESUMING:
401 if (scu_get_event_code(event_code) == SCU_EVENT_POST_RCN_RELEASE) {
402 sci_change_state(&sci_rnc->sm, SCI_RNC_READY);
403 } else {
404 switch (scu_get_event_type(event_code)) {
405 case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
406 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
407 /* We really dont care if the hardware is going to suspend
408 * the device since it's being resumed anyway */
409 dev_dbg(scirdev_to_dev(rnc_to_dev(sci_rnc)),
410 "%s: SCIC Remote Node Context 0x%p was "
411 "suspeneded by hardware while being resumed.\n",
412 __func__, sci_rnc);
413 break;
414 default:
415 goto out;
416 }
417 }
418 break;
419 case SCI_RNC_READY:
420 switch (scu_get_event_type(event_code)) {
421 case SCU_EVENT_TL_RNC_SUSPEND_TX:
422 sci_change_state(&sci_rnc->sm, SCI_RNC_TX_SUSPENDED);
423 sci_rnc->suspension_code = scu_get_event_specifier(event_code);
424 break;
425 case SCU_EVENT_TL_RNC_SUSPEND_TX_RX:
426 sci_change_state(&sci_rnc->sm, SCI_RNC_TX_RX_SUSPENDED);
427 sci_rnc->suspension_code = scu_get_event_specifier(event_code);
428 break;
429 default:
430 goto out;
431 }
432 break;
433 case SCI_RNC_AWAIT_SUSPENSION:
434 switch (scu_get_event_type(event_code)) {
435 case SCU_EVENT_TL_RNC_SUSPEND_TX:
436 sci_change_state(&sci_rnc->sm, SCI_RNC_TX_SUSPENDED);
437 sci_rnc->suspension_code = scu_get_event_specifier(event_code);
438 break;
439 case SCU_EVENT_TL_RNC_SUSPEND_TX_RX:
440 sci_change_state(&sci_rnc->sm, SCI_RNC_TX_RX_SUSPENDED);
441 sci_rnc->suspension_code = scu_get_event_specifier(event_code);
442 break;
443 default:
444 goto out;
445 }
446 break;
447 default:
448 dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),
449 "%s: invalid state %d\n", __func__, state);
450 return SCI_FAILURE_INVALID_STATE;
451 }
452 return SCI_SUCCESS;
453
454 out:
455 dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),
456 "%s: code: %#x state: %d\n", __func__, event_code, state);
457 return SCI_FAILURE;
458
459}
460
461enum sci_status sci_remote_node_context_destruct(struct sci_remote_node_context *sci_rnc,
462 scics_sds_remote_node_context_callback cb_fn,
463 void *cb_p)
464{
465 enum scis_sds_remote_node_context_states state;
466
467 state = sci_rnc->sm.current_state_id;
468 switch (state) {
469 case SCI_RNC_INVALIDATING:
470 sci_remote_node_context_setup_to_destory(sci_rnc, cb_fn, cb_p);
471 return SCI_SUCCESS;
472 case SCI_RNC_POSTING:
473 case SCI_RNC_RESUMING:
474 case SCI_RNC_READY:
475 case SCI_RNC_TX_SUSPENDED:
476 case SCI_RNC_TX_RX_SUSPENDED:
477 case SCI_RNC_AWAIT_SUSPENSION:
478 sci_remote_node_context_setup_to_destory(sci_rnc, cb_fn, cb_p);
479 sci_change_state(&sci_rnc->sm, SCI_RNC_INVALIDATING);
480 return SCI_SUCCESS;
481 case SCI_RNC_INITIAL:
482 dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),
483 "%s: invalid state %d\n", __func__, state);
484 /* We have decided that the destruct request on the remote node context
485 * can not fail since it is either in the initial/destroyed state or is
486 * can be destroyed.
487 */
488 return SCI_SUCCESS;
489 default:
490 dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),
491 "%s: invalid state %d\n", __func__, state);
492 return SCI_FAILURE_INVALID_STATE;
493 }
494}
495
496enum sci_status sci_remote_node_context_suspend(struct sci_remote_node_context *sci_rnc,
497 u32 suspend_type,
498 scics_sds_remote_node_context_callback cb_fn,
499 void *cb_p)
500{
501 enum scis_sds_remote_node_context_states state;
502
503 state = sci_rnc->sm.current_state_id;
504 if (state != SCI_RNC_READY) {
505 dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),
506 "%s: invalid state %d\n", __func__, state);
507 return SCI_FAILURE_INVALID_STATE;
508 }
509
510 sci_rnc->user_callback = cb_fn;
511 sci_rnc->user_cookie = cb_p;
512 sci_rnc->suspension_code = suspend_type;
513
514 if (suspend_type == SCI_SOFTWARE_SUSPENSION) {
515 sci_remote_device_post_request(rnc_to_dev(sci_rnc),
516 SCU_CONTEXT_COMMAND_POST_RNC_SUSPEND_TX);
517 }
518
519 sci_change_state(&sci_rnc->sm, SCI_RNC_AWAIT_SUSPENSION);
520 return SCI_SUCCESS;
521}
522
523enum sci_status sci_remote_node_context_resume(struct sci_remote_node_context *sci_rnc,
524 scics_sds_remote_node_context_callback cb_fn,
525 void *cb_p)
526{
527 enum scis_sds_remote_node_context_states state;
528
529 state = sci_rnc->sm.current_state_id;
530 switch (state) {
531 case SCI_RNC_INITIAL:
532 if (sci_rnc->remote_node_index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX)
533 return SCI_FAILURE_INVALID_STATE;
534
535 sci_remote_node_context_setup_to_resume(sci_rnc, cb_fn, cb_p);
536 sci_remote_node_context_construct_buffer(sci_rnc);
537 sci_change_state(&sci_rnc->sm, SCI_RNC_POSTING);
538 return SCI_SUCCESS;
539 case SCI_RNC_POSTING:
540 case SCI_RNC_INVALIDATING:
541 case SCI_RNC_RESUMING:
542 if (sci_rnc->destination_state != SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_READY)
543 return SCI_FAILURE_INVALID_STATE;
544
545 sci_rnc->user_callback = cb_fn;
546 sci_rnc->user_cookie = cb_p;
547 return SCI_SUCCESS;
548 case SCI_RNC_TX_SUSPENDED: {
549 struct isci_remote_device *idev = rnc_to_dev(sci_rnc);
550 struct domain_device *dev = idev->domain_dev;
551
552 sci_remote_node_context_setup_to_resume(sci_rnc, cb_fn, cb_p);
553
554 /* TODO: consider adding a resume action of NONE, INVALIDATE, WRITE_TLCR */
555 if (dev->dev_type == SAS_END_DEV || dev_is_expander(dev))
556 sci_change_state(&sci_rnc->sm, SCI_RNC_RESUMING);
557 else if (dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) {
558 if (idev->is_direct_attached) {
559 /* @todo Fix this since I am being silly in writing to the STPTLDARNI register. */
560 sci_change_state(&sci_rnc->sm, SCI_RNC_RESUMING);
561 } else {
562 sci_change_state(&sci_rnc->sm, SCI_RNC_INVALIDATING);
563 }
564 } else
565 return SCI_FAILURE;
566 return SCI_SUCCESS;
567 }
568 case SCI_RNC_TX_RX_SUSPENDED:
569 sci_remote_node_context_setup_to_resume(sci_rnc, cb_fn, cb_p);
570 sci_change_state(&sci_rnc->sm, SCI_RNC_RESUMING);
571 return SCI_FAILURE_INVALID_STATE;
572 case SCI_RNC_AWAIT_SUSPENSION:
573 sci_remote_node_context_setup_to_resume(sci_rnc, cb_fn, cb_p);
574 return SCI_SUCCESS;
575 default:
576 dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),
577 "%s: invalid state %d\n", __func__, state);
578 return SCI_FAILURE_INVALID_STATE;
579 }
580}
581
582enum sci_status sci_remote_node_context_start_io(struct sci_remote_node_context *sci_rnc,
583 struct isci_request *ireq)
584{
585 enum scis_sds_remote_node_context_states state;
586
587 state = sci_rnc->sm.current_state_id;
588
589 switch (state) {
590 case SCI_RNC_READY:
591 return SCI_SUCCESS;
592 case SCI_RNC_TX_SUSPENDED:
593 case SCI_RNC_TX_RX_SUSPENDED:
594 case SCI_RNC_AWAIT_SUSPENSION:
595 dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),
596 "%s: invalid state %d\n", __func__, state);
597 return SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED;
598 default:
599 break;
600 }
601 dev_dbg(scirdev_to_dev(rnc_to_dev(sci_rnc)),
602 "%s: requested to start IO while still resuming, %d\n",
603 __func__, state);
604 return SCI_FAILURE_INVALID_STATE;
605}
606
607enum sci_status sci_remote_node_context_start_task(struct sci_remote_node_context *sci_rnc,
608 struct isci_request *ireq)
609{
610 enum scis_sds_remote_node_context_states state;
611
612 state = sci_rnc->sm.current_state_id;
613 switch (state) {
614 case SCI_RNC_RESUMING:
615 case SCI_RNC_READY:
616 case SCI_RNC_AWAIT_SUSPENSION:
617 return SCI_SUCCESS;
618 case SCI_RNC_TX_SUSPENDED:
619 case SCI_RNC_TX_RX_SUSPENDED:
620 sci_remote_node_context_resume(sci_rnc, NULL, NULL);
621 return SCI_SUCCESS;
622 default:
623 dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),
624 "%s: invalid state %d\n", __func__, state);
625 return SCI_FAILURE_INVALID_STATE;
626 }
627}
diff --git a/drivers/scsi/isci/remote_node_context.h b/drivers/scsi/isci/remote_node_context.h
new file mode 100644
index 000000000000..41580ad12520
--- /dev/null
+++ b/drivers/scsi/isci/remote_node_context.h
@@ -0,0 +1,224 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _SCIC_SDS_REMOTE_NODE_CONTEXT_H_
57#define _SCIC_SDS_REMOTE_NODE_CONTEXT_H_
58
59/**
60 * This file contains the structures, constants, and prototypes associated with
61 * the remote node context in the silicon. It exists to model and manage
62 * the remote node context in the silicon.
63 *
64 *
65 */
66
67#include "isci.h"
68
69/**
70 *
71 *
72 * This constant represents an invalid remote device id, it is used to program
73 * the STPDARNI register so the driver knows when it has received a SIGNATURE
74 * FIS from the SCU.
75 */
76#define SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX 0x0FFF
77
78#define SCU_HARDWARE_SUSPENSION (0)
79#define SCI_SOFTWARE_SUSPENSION (1)
80
81struct isci_request;
82struct isci_remote_device;
83struct sci_remote_node_context;
84
85typedef void (*scics_sds_remote_node_context_callback)(void *);
86
87/**
88 * This is the enumeration of the remote node context states.
89 */
90enum scis_sds_remote_node_context_states {
91 /**
92 * This state is the initial state for a remote node context. On a resume
93 * request the remote node context will transition to the posting state.
94 */
95 SCI_RNC_INITIAL,
96
97 /**
98 * This is a transition state that posts the RNi to the hardware. Once the RNC
99 * is posted the remote node context will be made ready.
100 */
101 SCI_RNC_POSTING,
102
103 /**
104 * This is a transition state that will post an RNC invalidate to the
105 * hardware. Once the invalidate is complete the remote node context will
106 * transition to the posting state.
107 */
108 SCI_RNC_INVALIDATING,
109
110 /**
111 * This is a transition state that will post an RNC resume to the hardare.
112 * Once the event notification of resume complete is received the remote node
113 * context will transition to the ready state.
114 */
115 SCI_RNC_RESUMING,
116
117 /**
118 * This is the state that the remote node context must be in to accept io
119 * request operations.
120 */
121 SCI_RNC_READY,
122
123 /**
124 * This is the state that the remote node context transitions to when it gets
125 * a TX suspend notification from the hardware.
126 */
127 SCI_RNC_TX_SUSPENDED,
128
129 /**
130 * This is the state that the remote node context transitions to when it gets
131 * a TX RX suspend notification from the hardware.
132 */
133 SCI_RNC_TX_RX_SUSPENDED,
134
135 /**
136 * This state is a wait state for the remote node context that waits for a
137 * suspend notification from the hardware. This state is entered when either
138 * there is a request to supend the remote node context or when there is a TC
139 * completion where the remote node will be suspended by the hardware.
140 */
141 SCI_RNC_AWAIT_SUSPENSION
142};
143
144/**
145 *
146 *
147 * This enumeration is used to define the end destination state for the remote
148 * node context.
149 */
150enum sci_remote_node_context_destination_state {
151 SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_UNSPECIFIED,
152 SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_READY,
153 SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_FINAL
154};
155
156/**
157 * struct sci_remote_node_context - This structure contains the data
158 * associated with the remote node context object. The remote node context
159 * (RNC) object models the the remote device information necessary to manage
160 * the silicon RNC.
161 */
162struct sci_remote_node_context {
163 /**
164 * This field indicates the remote node index (RNI) associated with
165 * this RNC.
166 */
167 u16 remote_node_index;
168
169 /**
170 * This field is the recored suspension code or the reason for the remote node
171 * context suspension.
172 */
173 u32 suspension_code;
174
175 /**
176 * This field is true if the remote node context is resuming from its current
177 * state. This can cause an automatic resume on receiving a suspension
178 * notification.
179 */
180 enum sci_remote_node_context_destination_state destination_state;
181
182 /**
183 * This field contains the callback function that the user requested to be
184 * called when the requested state transition is complete.
185 */
186 scics_sds_remote_node_context_callback user_callback;
187
188 /**
189 * This field contains the parameter that is called when the user requested
190 * state transition is completed.
191 */
192 void *user_cookie;
193
194 /**
195 * This field contains the data for the object's state machine.
196 */
197 struct sci_base_state_machine sm;
198};
199
200void sci_remote_node_context_construct(struct sci_remote_node_context *rnc,
201 u16 remote_node_index);
202
203
204bool sci_remote_node_context_is_ready(
205 struct sci_remote_node_context *sci_rnc);
206
207enum sci_status sci_remote_node_context_event_handler(struct sci_remote_node_context *sci_rnc,
208 u32 event_code);
209enum sci_status sci_remote_node_context_destruct(struct sci_remote_node_context *sci_rnc,
210 scics_sds_remote_node_context_callback callback,
211 void *callback_parameter);
212enum sci_status sci_remote_node_context_suspend(struct sci_remote_node_context *sci_rnc,
213 u32 suspend_type,
214 scics_sds_remote_node_context_callback cb_fn,
215 void *cb_p);
216enum sci_status sci_remote_node_context_resume(struct sci_remote_node_context *sci_rnc,
217 scics_sds_remote_node_context_callback cb_fn,
218 void *cb_p);
219enum sci_status sci_remote_node_context_start_task(struct sci_remote_node_context *sci_rnc,
220 struct isci_request *ireq);
221enum sci_status sci_remote_node_context_start_io(struct sci_remote_node_context *sci_rnc,
222 struct isci_request *ireq);
223
224#endif /* _SCIC_SDS_REMOTE_NODE_CONTEXT_H_ */
diff --git a/drivers/scsi/isci/remote_node_table.c b/drivers/scsi/isci/remote_node_table.c
new file mode 100644
index 000000000000..301b3141945e
--- /dev/null
+++ b/drivers/scsi/isci/remote_node_table.c
@@ -0,0 +1,598 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56/**
57 * This file contains the implementation of the SCIC_SDS_REMOTE_NODE_TABLE
58 * public, protected, and private methods.
59 *
60 *
61 */
62#include "remote_node_table.h"
63#include "remote_node_context.h"
64
65/**
66 *
67 * @remote_node_table: This is the remote node index table from which the
68 * selection will be made.
69 * @group_table_index: This is the index to the group table from which to
70 * search for an available selection.
71 *
72 * This routine will find the bit position in absolute bit terms of the next 32
73 * + bit position. If there are available bits in the first u32 then it is
74 * just bit position. u32 This is the absolute bit position for an available
75 * group.
76 */
77static u32 sci_remote_node_table_get_group_index(
78 struct sci_remote_node_table *remote_node_table,
79 u32 group_table_index)
80{
81 u32 dword_index;
82 u32 *group_table;
83 u32 bit_index;
84
85 group_table = remote_node_table->remote_node_groups[group_table_index];
86
87 for (dword_index = 0; dword_index < remote_node_table->group_array_size; dword_index++) {
88 if (group_table[dword_index] != 0) {
89 for (bit_index = 0; bit_index < 32; bit_index++) {
90 if ((group_table[dword_index] & (1 << bit_index)) != 0) {
91 return (dword_index * 32) + bit_index;
92 }
93 }
94 }
95 }
96
97 return SCIC_SDS_REMOTE_NODE_TABLE_INVALID_INDEX;
98}
99
100/**
101 *
102 * @out]: remote_node_table This the remote node table in which to clear the
103 * selector.
104 * @set_index: This is the remote node selector in which the change will be
105 * made.
106 * @group_index: This is the bit index in the table to be modified.
107 *
108 * This method will clear the group index entry in the specified group index
109 * table. none
110 */
111static void sci_remote_node_table_clear_group_index(
112 struct sci_remote_node_table *remote_node_table,
113 u32 group_table_index,
114 u32 group_index)
115{
116 u32 dword_index;
117 u32 bit_index;
118 u32 *group_table;
119
120 BUG_ON(group_table_index >= SCU_STP_REMOTE_NODE_COUNT);
121 BUG_ON(group_index >= (u32)(remote_node_table->group_array_size * 32));
122
123 dword_index = group_index / 32;
124 bit_index = group_index % 32;
125 group_table = remote_node_table->remote_node_groups[group_table_index];
126
127 group_table[dword_index] = group_table[dword_index] & ~(1 << bit_index);
128}
129
130/**
131 *
132 * @out]: remote_node_table This the remote node table in which to set the
133 * selector.
134 * @group_table_index: This is the remote node selector in which the change
135 * will be made.
136 * @group_index: This is the bit position in the table to be modified.
137 *
138 * This method will set the group index bit entry in the specified gropu index
139 * table. none
140 */
141static void sci_remote_node_table_set_group_index(
142 struct sci_remote_node_table *remote_node_table,
143 u32 group_table_index,
144 u32 group_index)
145{
146 u32 dword_index;
147 u32 bit_index;
148 u32 *group_table;
149
150 BUG_ON(group_table_index >= SCU_STP_REMOTE_NODE_COUNT);
151 BUG_ON(group_index >= (u32)(remote_node_table->group_array_size * 32));
152
153 dword_index = group_index / 32;
154 bit_index = group_index % 32;
155 group_table = remote_node_table->remote_node_groups[group_table_index];
156
157 group_table[dword_index] = group_table[dword_index] | (1 << bit_index);
158}
159
160/**
161 *
162 * @out]: remote_node_table This is the remote node table in which to modify
163 * the remote node availability.
164 * @remote_node_index: This is the remote node index that is being returned to
165 * the table.
166 *
167 * This method will set the remote to available in the remote node allocation
168 * table. none
169 */
170static void sci_remote_node_table_set_node_index(
171 struct sci_remote_node_table *remote_node_table,
172 u32 remote_node_index)
173{
174 u32 dword_location;
175 u32 dword_remainder;
176 u32 slot_normalized;
177 u32 slot_position;
178
179 BUG_ON(
180 (remote_node_table->available_nodes_array_size * SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD)
181 <= (remote_node_index / SCU_STP_REMOTE_NODE_COUNT)
182 );
183
184 dword_location = remote_node_index / SCIC_SDS_REMOTE_NODES_PER_DWORD;
185 dword_remainder = remote_node_index % SCIC_SDS_REMOTE_NODES_PER_DWORD;
186 slot_normalized = (dword_remainder / SCU_STP_REMOTE_NODE_COUNT) * sizeof(u32);
187 slot_position = remote_node_index % SCU_STP_REMOTE_NODE_COUNT;
188
189 remote_node_table->available_remote_nodes[dword_location] |=
190 1 << (slot_normalized + slot_position);
191}
192
193/**
194 *
195 * @out]: remote_node_table This is the remote node table from which to clear
196 * the available remote node bit.
197 * @remote_node_index: This is the remote node index which is to be cleared
198 * from the table.
199 *
200 * This method clears the remote node index from the table of available remote
201 * nodes. none
202 */
203static void sci_remote_node_table_clear_node_index(
204 struct sci_remote_node_table *remote_node_table,
205 u32 remote_node_index)
206{
207 u32 dword_location;
208 u32 dword_remainder;
209 u32 slot_position;
210 u32 slot_normalized;
211
212 BUG_ON(
213 (remote_node_table->available_nodes_array_size * SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD)
214 <= (remote_node_index / SCU_STP_REMOTE_NODE_COUNT)
215 );
216
217 dword_location = remote_node_index / SCIC_SDS_REMOTE_NODES_PER_DWORD;
218 dword_remainder = remote_node_index % SCIC_SDS_REMOTE_NODES_PER_DWORD;
219 slot_normalized = (dword_remainder / SCU_STP_REMOTE_NODE_COUNT) * sizeof(u32);
220 slot_position = remote_node_index % SCU_STP_REMOTE_NODE_COUNT;
221
222 remote_node_table->available_remote_nodes[dword_location] &=
223 ~(1 << (slot_normalized + slot_position));
224}
225
226/**
227 *
228 * @out]: remote_node_table The remote node table from which the slot will be
229 * cleared.
230 * @group_index: The index for the slot that is to be cleared.
231 *
232 * This method clears the entire table slot at the specified slot index. none
233 */
234static void sci_remote_node_table_clear_group(
235 struct sci_remote_node_table *remote_node_table,
236 u32 group_index)
237{
238 u32 dword_location;
239 u32 dword_remainder;
240 u32 dword_value;
241
242 BUG_ON(
243 (remote_node_table->available_nodes_array_size * SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD)
244 <= (group_index / SCU_STP_REMOTE_NODE_COUNT)
245 );
246
247 dword_location = group_index / SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD;
248 dword_remainder = group_index % SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD;
249
250 dword_value = remote_node_table->available_remote_nodes[dword_location];
251 dword_value &= ~(SCIC_SDS_REMOTE_NODE_TABLE_FULL_SLOT_VALUE << (dword_remainder * 4));
252 remote_node_table->available_remote_nodes[dword_location] = dword_value;
253}
254
255/**
256 *
257 * @remote_node_table:
258 *
259 * THis method sets an entire remote node group in the remote node table.
260 */
261static void sci_remote_node_table_set_group(
262 struct sci_remote_node_table *remote_node_table,
263 u32 group_index)
264{
265 u32 dword_location;
266 u32 dword_remainder;
267 u32 dword_value;
268
269 BUG_ON(
270 (remote_node_table->available_nodes_array_size * SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD)
271 <= (group_index / SCU_STP_REMOTE_NODE_COUNT)
272 );
273
274 dword_location = group_index / SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD;
275 dword_remainder = group_index % SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD;
276
277 dword_value = remote_node_table->available_remote_nodes[dword_location];
278 dword_value |= (SCIC_SDS_REMOTE_NODE_TABLE_FULL_SLOT_VALUE << (dword_remainder * 4));
279 remote_node_table->available_remote_nodes[dword_location] = dword_value;
280}
281
282/**
283 *
284 * @remote_node_table: This is the remote node table that for which the group
285 * value is to be returned.
286 * @group_index: This is the group index to use to find the group value.
287 *
288 * This method will return the group value for the specified group index. The
289 * bit values at the specified remote node group index.
290 */
291static u8 sci_remote_node_table_get_group_value(
292 struct sci_remote_node_table *remote_node_table,
293 u32 group_index)
294{
295 u32 dword_location;
296 u32 dword_remainder;
297 u32 dword_value;
298
299 dword_location = group_index / SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD;
300 dword_remainder = group_index % SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD;
301
302 dword_value = remote_node_table->available_remote_nodes[dword_location];
303 dword_value &= (SCIC_SDS_REMOTE_NODE_TABLE_FULL_SLOT_VALUE << (dword_remainder * 4));
304 dword_value = dword_value >> (dword_remainder * 4);
305
306 return (u8)dword_value;
307}
308
309/**
310 *
311 * @out]: remote_node_table The remote that which is to be initialized.
312 * @remote_node_entries: The number of entries to put in the table.
313 *
314 * This method will initialize the remote node table for use. none
315 */
316void sci_remote_node_table_initialize(
317 struct sci_remote_node_table *remote_node_table,
318 u32 remote_node_entries)
319{
320 u32 index;
321
322 /*
323 * Initialize the raw data we could improve the speed by only initializing
324 * those entries that we are actually going to be used */
325 memset(
326 remote_node_table->available_remote_nodes,
327 0x00,
328 sizeof(remote_node_table->available_remote_nodes)
329 );
330
331 memset(
332 remote_node_table->remote_node_groups,
333 0x00,
334 sizeof(remote_node_table->remote_node_groups)
335 );
336
337 /* Initialize the available remote node sets */
338 remote_node_table->available_nodes_array_size = (u16)
339 (remote_node_entries / SCIC_SDS_REMOTE_NODES_PER_DWORD)
340 + ((remote_node_entries % SCIC_SDS_REMOTE_NODES_PER_DWORD) != 0);
341
342
343 /* Initialize each full DWORD to a FULL SET of remote nodes */
344 for (index = 0; index < remote_node_entries; index++) {
345 sci_remote_node_table_set_node_index(remote_node_table, index);
346 }
347
348 remote_node_table->group_array_size = (u16)
349 (remote_node_entries / (SCU_STP_REMOTE_NODE_COUNT * 32))
350 + ((remote_node_entries % (SCU_STP_REMOTE_NODE_COUNT * 32)) != 0);
351
352 for (index = 0; index < (remote_node_entries / SCU_STP_REMOTE_NODE_COUNT); index++) {
353 /*
354 * These are all guaranteed to be full slot values so fill them in the
355 * available sets of 3 remote nodes */
356 sci_remote_node_table_set_group_index(remote_node_table, 2, index);
357 }
358
359 /* Now fill in any remainders that we may find */
360 if ((remote_node_entries % SCU_STP_REMOTE_NODE_COUNT) == 2) {
361 sci_remote_node_table_set_group_index(remote_node_table, 1, index);
362 } else if ((remote_node_entries % SCU_STP_REMOTE_NODE_COUNT) == 1) {
363 sci_remote_node_table_set_group_index(remote_node_table, 0, index);
364 }
365}
366
367/**
368 *
369 * @out]: remote_node_table The remote node table from which to allocate a
370 * remote node.
371 * @table_index: The group index that is to be used for the search.
372 *
373 * This method will allocate a single RNi from the remote node table. The
374 * table index will determine from which remote node group table to search.
375 * This search may fail and another group node table can be specified. The
376 * function is designed to allow a serach of the available single remote node
377 * group up to the triple remote node group. If an entry is found in the
378 * specified table the remote node is removed and the remote node groups are
379 * updated. The RNi value or an invalid remote node context if an RNi can not
380 * be found.
381 */
382static u16 sci_remote_node_table_allocate_single_remote_node(
383 struct sci_remote_node_table *remote_node_table,
384 u32 group_table_index)
385{
386 u8 index;
387 u8 group_value;
388 u32 group_index;
389 u16 remote_node_index = SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX;
390
391 group_index = sci_remote_node_table_get_group_index(
392 remote_node_table, group_table_index);
393
394 /* We could not find an available slot in the table selector 0 */
395 if (group_index != SCIC_SDS_REMOTE_NODE_TABLE_INVALID_INDEX) {
396 group_value = sci_remote_node_table_get_group_value(
397 remote_node_table, group_index);
398
399 for (index = 0; index < SCU_STP_REMOTE_NODE_COUNT; index++) {
400 if (((1 << index) & group_value) != 0) {
401 /* We have selected a bit now clear it */
402 remote_node_index = (u16)(group_index * SCU_STP_REMOTE_NODE_COUNT
403 + index);
404
405 sci_remote_node_table_clear_group_index(
406 remote_node_table, group_table_index, group_index
407 );
408
409 sci_remote_node_table_clear_node_index(
410 remote_node_table, remote_node_index
411 );
412
413 if (group_table_index > 0) {
414 sci_remote_node_table_set_group_index(
415 remote_node_table, group_table_index - 1, group_index
416 );
417 }
418
419 break;
420 }
421 }
422 }
423
424 return remote_node_index;
425}
426
427/**
428 *
429 * @remote_node_table: This is the remote node table from which to allocate the
430 * remote node entries.
431 * @group_table_index: THis is the group table index which must equal two (2)
432 * for this operation.
433 *
434 * This method will allocate three consecutive remote node context entries. If
435 * there are no remaining triple entries the function will return a failure.
436 * The remote node index that represents three consecutive remote node entries
437 * or an invalid remote node context if none can be found.
438 */
439static u16 sci_remote_node_table_allocate_triple_remote_node(
440 struct sci_remote_node_table *remote_node_table,
441 u32 group_table_index)
442{
443 u32 group_index;
444 u16 remote_node_index = SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX;
445
446 group_index = sci_remote_node_table_get_group_index(
447 remote_node_table, group_table_index);
448
449 if (group_index != SCIC_SDS_REMOTE_NODE_TABLE_INVALID_INDEX) {
450 remote_node_index = (u16)group_index * SCU_STP_REMOTE_NODE_COUNT;
451
452 sci_remote_node_table_clear_group_index(
453 remote_node_table, group_table_index, group_index
454 );
455
456 sci_remote_node_table_clear_group(
457 remote_node_table, group_index
458 );
459 }
460
461 return remote_node_index;
462}
463
464/**
465 *
466 * @remote_node_table: This is the remote node table from which the remote node
467 * allocation is to take place.
468 * @remote_node_count: This is ther remote node count which is one of
469 * SCU_SSP_REMOTE_NODE_COUNT(1) or SCU_STP_REMOTE_NODE_COUNT(3).
470 *
471 * This method will allocate a remote node that mataches the remote node count
472 * specified by the caller. Valid values for remote node count is
473 * SCU_SSP_REMOTE_NODE_COUNT(1) or SCU_STP_REMOTE_NODE_COUNT(3). u16 This is
474 * the remote node index that is returned or an invalid remote node context.
475 */
476u16 sci_remote_node_table_allocate_remote_node(
477 struct sci_remote_node_table *remote_node_table,
478 u32 remote_node_count)
479{
480 u16 remote_node_index = SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX;
481
482 if (remote_node_count == SCU_SSP_REMOTE_NODE_COUNT) {
483 remote_node_index =
484 sci_remote_node_table_allocate_single_remote_node(
485 remote_node_table, 0);
486
487 if (remote_node_index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
488 remote_node_index =
489 sci_remote_node_table_allocate_single_remote_node(
490 remote_node_table, 1);
491 }
492
493 if (remote_node_index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
494 remote_node_index =
495 sci_remote_node_table_allocate_single_remote_node(
496 remote_node_table, 2);
497 }
498 } else if (remote_node_count == SCU_STP_REMOTE_NODE_COUNT) {
499 remote_node_index =
500 sci_remote_node_table_allocate_triple_remote_node(
501 remote_node_table, 2);
502 }
503
504 return remote_node_index;
505}
506
507/**
508 *
509 * @remote_node_table:
510 *
511 * This method will free a single remote node index back to the remote node
512 * table. This routine will update the remote node groups
513 */
514static void sci_remote_node_table_release_single_remote_node(
515 struct sci_remote_node_table *remote_node_table,
516 u16 remote_node_index)
517{
518 u32 group_index;
519 u8 group_value;
520
521 group_index = remote_node_index / SCU_STP_REMOTE_NODE_COUNT;
522
523 group_value = sci_remote_node_table_get_group_value(remote_node_table, group_index);
524
525 /*
526 * Assert that we are not trying to add an entry to a slot that is already
527 * full. */
528 BUG_ON(group_value == SCIC_SDS_REMOTE_NODE_TABLE_FULL_SLOT_VALUE);
529
530 if (group_value == 0x00) {
531 /*
532 * There are no entries in this slot so it must be added to the single
533 * slot table. */
534 sci_remote_node_table_set_group_index(remote_node_table, 0, group_index);
535 } else if ((group_value & (group_value - 1)) == 0) {
536 /*
537 * There is only one entry in this slot so it must be moved from the
538 * single slot table to the dual slot table */
539 sci_remote_node_table_clear_group_index(remote_node_table, 0, group_index);
540 sci_remote_node_table_set_group_index(remote_node_table, 1, group_index);
541 } else {
542 /*
543 * There are two entries in the slot so it must be moved from the dual
544 * slot table to the tripple slot table. */
545 sci_remote_node_table_clear_group_index(remote_node_table, 1, group_index);
546 sci_remote_node_table_set_group_index(remote_node_table, 2, group_index);
547 }
548
549 sci_remote_node_table_set_node_index(remote_node_table, remote_node_index);
550}
551
552/**
553 *
554 * @remote_node_table: This is the remote node table to which the remote node
555 * index is to be freed.
556 *
557 * This method will release a group of three consecutive remote nodes back to
558 * the free remote nodes.
559 */
560static void sci_remote_node_table_release_triple_remote_node(
561 struct sci_remote_node_table *remote_node_table,
562 u16 remote_node_index)
563{
564 u32 group_index;
565
566 group_index = remote_node_index / SCU_STP_REMOTE_NODE_COUNT;
567
568 sci_remote_node_table_set_group_index(
569 remote_node_table, 2, group_index
570 );
571
572 sci_remote_node_table_set_group(remote_node_table, group_index);
573}
574
575/**
576 *
577 * @remote_node_table: The remote node table to which the remote node index is
578 * to be freed.
579 * @remote_node_count: This is the count of consecutive remote nodes that are
580 * to be freed.
581 *
582 * This method will release the remote node index back into the remote node
583 * table free pool.
584 */
585void sci_remote_node_table_release_remote_node_index(
586 struct sci_remote_node_table *remote_node_table,
587 u32 remote_node_count,
588 u16 remote_node_index)
589{
590 if (remote_node_count == SCU_SSP_REMOTE_NODE_COUNT) {
591 sci_remote_node_table_release_single_remote_node(
592 remote_node_table, remote_node_index);
593 } else if (remote_node_count == SCU_STP_REMOTE_NODE_COUNT) {
594 sci_remote_node_table_release_triple_remote_node(
595 remote_node_table, remote_node_index);
596 }
597}
598
diff --git a/drivers/scsi/isci/remote_node_table.h b/drivers/scsi/isci/remote_node_table.h
new file mode 100644
index 000000000000..721ab982d2ac
--- /dev/null
+++ b/drivers/scsi/isci/remote_node_table.h
@@ -0,0 +1,188 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _SCIC_SDS_REMOTE_NODE_TABLE_H_
57#define _SCIC_SDS_REMOTE_NODE_TABLE_H_
58
59#include "isci.h"
60
61/**
62 *
63 *
64 * Remote node sets are sets of remote node index in the remtoe node table The
65 * SCU hardware requires that STP remote node entries take three consecutive
66 * remote node index so the table is arranged in sets of three. The bits are
67 * used as 0111 0111 to make a byte and the bits define the set of three remote
68 * nodes to use as a sequence.
69 */
70#define SCIC_SDS_REMOTE_NODE_SETS_PER_BYTE 2
71
72/**
73 *
74 *
75 * Since the remote node table is organized as DWORDS take the remote node sets
76 * in bytes and represent them in DWORDs. The lowest ordered bits are the ones
77 * used in case full DWORD is not being used. i.e. 0000 0000 0000 0000 0111
78 * 0111 0111 0111 // if only a single WORD is in use in the DWORD.
79 */
80#define SCIC_SDS_REMOTE_NODE_SETS_PER_DWORD \
81 (sizeof(u32) * SCIC_SDS_REMOTE_NODE_SETS_PER_BYTE)
82/**
83 *
84 *
85 * This is a count of the numeber of remote nodes that can be represented in a
86 * byte
87 */
88#define SCIC_SDS_REMOTE_NODES_PER_BYTE \
89 (SCU_STP_REMOTE_NODE_COUNT * SCIC_SDS_REMOTE_NODE_SETS_PER_BYTE)
90
91/**
92 *
93 *
94 * This is a count of the number of remote nodes that can be represented in a
95 * DWROD
96 */
97#define SCIC_SDS_REMOTE_NODES_PER_DWORD \
98 (sizeof(u32) * SCIC_SDS_REMOTE_NODES_PER_BYTE)
99
100/**
101 *
102 *
103 * This is the number of bits in a remote node group
104 */
105#define SCIC_SDS_REMOTE_NODES_BITS_PER_GROUP 4
106
107#define SCIC_SDS_REMOTE_NODE_TABLE_INVALID_INDEX (0xFFFFFFFF)
108#define SCIC_SDS_REMOTE_NODE_TABLE_FULL_SLOT_VALUE (0x07)
109#define SCIC_SDS_REMOTE_NODE_TABLE_EMPTY_SLOT_VALUE (0x00)
110
111/**
112 *
113 *
114 * Expander attached sata remote node count
115 */
116#define SCU_STP_REMOTE_NODE_COUNT 3
117
118/**
119 *
120 *
121 * Expander or direct attached ssp remote node count
122 */
123#define SCU_SSP_REMOTE_NODE_COUNT 1
124
125/**
126 *
127 *
128 * Direct attached STP remote node count
129 */
130#define SCU_SATA_REMOTE_NODE_COUNT 1
131
132/**
133 * struct sci_remote_node_table -
134 *
135 *
136 */
137struct sci_remote_node_table {
138 /**
139 * This field contains the array size in dwords
140 */
141 u16 available_nodes_array_size;
142
143 /**
144 * This field contains the array size of the
145 */
146 u16 group_array_size;
147
148 /**
149 * This field is the array of available remote node entries in bits.
150 * Because of the way STP remote node data is allocated on the SCU hardware
151 * the remote nodes must occupy three consecutive remote node context
152 * entries. For ease of allocation and de-allocation we have broken the
153 * sets of three into a single nibble. When the STP RNi is allocated all
154 * of the bits in the nibble are cleared. This math results in a table size
155 * of MAX_REMOTE_NODES / CONSECUTIVE RNi ENTRIES for STP / 2 entries per byte.
156 */
157 u32 available_remote_nodes[
158 (SCI_MAX_REMOTE_DEVICES / SCIC_SDS_REMOTE_NODES_PER_DWORD)
159 + ((SCI_MAX_REMOTE_DEVICES % SCIC_SDS_REMOTE_NODES_PER_DWORD) != 0)];
160
161 /**
162 * This field is the nibble selector for the above table. There are three
163 * possible selectors each for fast lookup when trying to find one, two or
164 * three remote node entries.
165 */
166 u32 remote_node_groups[
167 SCU_STP_REMOTE_NODE_COUNT][
168 (SCI_MAX_REMOTE_DEVICES / (32 * SCU_STP_REMOTE_NODE_COUNT))
169 + ((SCI_MAX_REMOTE_DEVICES % (32 * SCU_STP_REMOTE_NODE_COUNT)) != 0)];
170
171};
172
173/* --------------------------------------------------------------------------- */
174
175void sci_remote_node_table_initialize(
176 struct sci_remote_node_table *remote_node_table,
177 u32 remote_node_entries);
178
179u16 sci_remote_node_table_allocate_remote_node(
180 struct sci_remote_node_table *remote_node_table,
181 u32 remote_node_count);
182
183void sci_remote_node_table_release_remote_node_index(
184 struct sci_remote_node_table *remote_node_table,
185 u32 remote_node_count,
186 u16 remote_node_index);
187
188#endif /* _SCIC_SDS_REMOTE_NODE_TABLE_H_ */
diff --git a/drivers/scsi/isci/request.c b/drivers/scsi/isci/request.c
new file mode 100644
index 000000000000..a46e07ac789f
--- /dev/null
+++ b/drivers/scsi/isci/request.c
@@ -0,0 +1,3391 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include "isci.h"
57#include "task.h"
58#include "request.h"
59#include "scu_completion_codes.h"
60#include "scu_event_codes.h"
61#include "sas.h"
62
63static struct scu_sgl_element_pair *to_sgl_element_pair(struct isci_request *ireq,
64 int idx)
65{
66 if (idx == 0)
67 return &ireq->tc->sgl_pair_ab;
68 else if (idx == 1)
69 return &ireq->tc->sgl_pair_cd;
70 else if (idx < 0)
71 return NULL;
72 else
73 return &ireq->sg_table[idx - 2];
74}
75
76static dma_addr_t to_sgl_element_pair_dma(struct isci_host *ihost,
77 struct isci_request *ireq, u32 idx)
78{
79 u32 offset;
80
81 if (idx == 0) {
82 offset = (void *) &ireq->tc->sgl_pair_ab -
83 (void *) &ihost->task_context_table[0];
84 return ihost->task_context_dma + offset;
85 } else if (idx == 1) {
86 offset = (void *) &ireq->tc->sgl_pair_cd -
87 (void *) &ihost->task_context_table[0];
88 return ihost->task_context_dma + offset;
89 }
90
91 return sci_io_request_get_dma_addr(ireq, &ireq->sg_table[idx - 2]);
92}
93
94static void init_sgl_element(struct scu_sgl_element *e, struct scatterlist *sg)
95{
96 e->length = sg_dma_len(sg);
97 e->address_upper = upper_32_bits(sg_dma_address(sg));
98 e->address_lower = lower_32_bits(sg_dma_address(sg));
99 e->address_modifier = 0;
100}
101
102static void sci_request_build_sgl(struct isci_request *ireq)
103{
104 struct isci_host *ihost = ireq->isci_host;
105 struct sas_task *task = isci_request_access_task(ireq);
106 struct scatterlist *sg = NULL;
107 dma_addr_t dma_addr;
108 u32 sg_idx = 0;
109 struct scu_sgl_element_pair *scu_sg = NULL;
110 struct scu_sgl_element_pair *prev_sg = NULL;
111
112 if (task->num_scatter > 0) {
113 sg = task->scatter;
114
115 while (sg) {
116 scu_sg = to_sgl_element_pair(ireq, sg_idx);
117 init_sgl_element(&scu_sg->A, sg);
118 sg = sg_next(sg);
119 if (sg) {
120 init_sgl_element(&scu_sg->B, sg);
121 sg = sg_next(sg);
122 } else
123 memset(&scu_sg->B, 0, sizeof(scu_sg->B));
124
125 if (prev_sg) {
126 dma_addr = to_sgl_element_pair_dma(ihost,
127 ireq,
128 sg_idx);
129
130 prev_sg->next_pair_upper =
131 upper_32_bits(dma_addr);
132 prev_sg->next_pair_lower =
133 lower_32_bits(dma_addr);
134 }
135
136 prev_sg = scu_sg;
137 sg_idx++;
138 }
139 } else { /* handle when no sg */
140 scu_sg = to_sgl_element_pair(ireq, sg_idx);
141
142 dma_addr = dma_map_single(&ihost->pdev->dev,
143 task->scatter,
144 task->total_xfer_len,
145 task->data_dir);
146
147 ireq->zero_scatter_daddr = dma_addr;
148
149 scu_sg->A.length = task->total_xfer_len;
150 scu_sg->A.address_upper = upper_32_bits(dma_addr);
151 scu_sg->A.address_lower = lower_32_bits(dma_addr);
152 }
153
154 if (scu_sg) {
155 scu_sg->next_pair_upper = 0;
156 scu_sg->next_pair_lower = 0;
157 }
158}
159
160static void sci_io_request_build_ssp_command_iu(struct isci_request *ireq)
161{
162 struct ssp_cmd_iu *cmd_iu;
163 struct sas_task *task = isci_request_access_task(ireq);
164
165 cmd_iu = &ireq->ssp.cmd;
166
167 memcpy(cmd_iu->LUN, task->ssp_task.LUN, 8);
168 cmd_iu->add_cdb_len = 0;
169 cmd_iu->_r_a = 0;
170 cmd_iu->_r_b = 0;
171 cmd_iu->en_fburst = 0; /* unsupported */
172 cmd_iu->task_prio = task->ssp_task.task_prio;
173 cmd_iu->task_attr = task->ssp_task.task_attr;
174 cmd_iu->_r_c = 0;
175
176 sci_swab32_cpy(&cmd_iu->cdb, task->ssp_task.cdb,
177 sizeof(task->ssp_task.cdb) / sizeof(u32));
178}
179
180static void sci_task_request_build_ssp_task_iu(struct isci_request *ireq)
181{
182 struct ssp_task_iu *task_iu;
183 struct sas_task *task = isci_request_access_task(ireq);
184 struct isci_tmf *isci_tmf = isci_request_access_tmf(ireq);
185
186 task_iu = &ireq->ssp.tmf;
187
188 memset(task_iu, 0, sizeof(struct ssp_task_iu));
189
190 memcpy(task_iu->LUN, task->ssp_task.LUN, 8);
191
192 task_iu->task_func = isci_tmf->tmf_code;
193 task_iu->task_tag =
194 (ireq->ttype == tmf_task) ?
195 isci_tmf->io_tag :
196 SCI_CONTROLLER_INVALID_IO_TAG;
197}
198
199/**
200 * This method is will fill in the SCU Task Context for any type of SSP request.
201 * @sci_req:
202 * @task_context:
203 *
204 */
205static void scu_ssp_reqeust_construct_task_context(
206 struct isci_request *ireq,
207 struct scu_task_context *task_context)
208{
209 dma_addr_t dma_addr;
210 struct isci_remote_device *idev;
211 struct isci_port *iport;
212
213 idev = ireq->target_device;
214 iport = idev->owning_port;
215
216 /* Fill in the TC with the its required data */
217 task_context->abort = 0;
218 task_context->priority = 0;
219 task_context->initiator_request = 1;
220 task_context->connection_rate = idev->connection_rate;
221 task_context->protocol_engine_index = ISCI_PEG;
222 task_context->logical_port_index = iport->physical_port_index;
223 task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SSP;
224 task_context->valid = SCU_TASK_CONTEXT_VALID;
225 task_context->context_type = SCU_TASK_CONTEXT_TYPE;
226
227 task_context->remote_node_index = idev->rnc.remote_node_index;
228 task_context->command_code = 0;
229
230 task_context->link_layer_control = 0;
231 task_context->do_not_dma_ssp_good_response = 1;
232 task_context->strict_ordering = 0;
233 task_context->control_frame = 0;
234 task_context->timeout_enable = 0;
235 task_context->block_guard_enable = 0;
236
237 task_context->address_modifier = 0;
238
239 /* task_context->type.ssp.tag = ireq->io_tag; */
240 task_context->task_phase = 0x01;
241
242 ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC |
243 (ISCI_PEG << SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) |
244 (iport->physical_port_index <<
245 SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) |
246 ISCI_TAG_TCI(ireq->io_tag));
247
248 /*
249 * Copy the physical address for the command buffer to the
250 * SCU Task Context
251 */
252 dma_addr = sci_io_request_get_dma_addr(ireq, &ireq->ssp.cmd);
253
254 task_context->command_iu_upper = upper_32_bits(dma_addr);
255 task_context->command_iu_lower = lower_32_bits(dma_addr);
256
257 /*
258 * Copy the physical address for the response buffer to the
259 * SCU Task Context
260 */
261 dma_addr = sci_io_request_get_dma_addr(ireq, &ireq->ssp.rsp);
262
263 task_context->response_iu_upper = upper_32_bits(dma_addr);
264 task_context->response_iu_lower = lower_32_bits(dma_addr);
265}
266
267/**
268 * This method is will fill in the SCU Task Context for a SSP IO request.
269 * @sci_req:
270 *
271 */
272static void scu_ssp_io_request_construct_task_context(struct isci_request *ireq,
273 enum dma_data_direction dir,
274 u32 len)
275{
276 struct scu_task_context *task_context = ireq->tc;
277
278 scu_ssp_reqeust_construct_task_context(ireq, task_context);
279
280 task_context->ssp_command_iu_length =
281 sizeof(struct ssp_cmd_iu) / sizeof(u32);
282 task_context->type.ssp.frame_type = SSP_COMMAND;
283
284 switch (dir) {
285 case DMA_FROM_DEVICE:
286 case DMA_NONE:
287 default:
288 task_context->task_type = SCU_TASK_TYPE_IOREAD;
289 break;
290 case DMA_TO_DEVICE:
291 task_context->task_type = SCU_TASK_TYPE_IOWRITE;
292 break;
293 }
294
295 task_context->transfer_length_bytes = len;
296
297 if (task_context->transfer_length_bytes > 0)
298 sci_request_build_sgl(ireq);
299}
300
301/**
302 * This method will fill in the SCU Task Context for a SSP Task request. The
303 * following important settings are utilized: -# priority ==
304 * SCU_TASK_PRIORITY_HIGH. This ensures that the task request is issued
305 * ahead of other task destined for the same Remote Node. -# task_type ==
306 * SCU_TASK_TYPE_IOREAD. This simply indicates that a normal request type
307 * (i.e. non-raw frame) is being utilized to perform task management. -#
308 * control_frame == 1. This ensures that the proper endianess is set so
309 * that the bytes are transmitted in the right order for a task frame.
310 * @sci_req: This parameter specifies the task request object being
311 * constructed.
312 *
313 */
314static void scu_ssp_task_request_construct_task_context(struct isci_request *ireq)
315{
316 struct scu_task_context *task_context = ireq->tc;
317
318 scu_ssp_reqeust_construct_task_context(ireq, task_context);
319
320 task_context->control_frame = 1;
321 task_context->priority = SCU_TASK_PRIORITY_HIGH;
322 task_context->task_type = SCU_TASK_TYPE_RAW_FRAME;
323 task_context->transfer_length_bytes = 0;
324 task_context->type.ssp.frame_type = SSP_TASK;
325 task_context->ssp_command_iu_length =
326 sizeof(struct ssp_task_iu) / sizeof(u32);
327}
328
329/**
330 * This method is will fill in the SCU Task Context for any type of SATA
331 * request. This is called from the various SATA constructors.
332 * @sci_req: The general IO request object which is to be used in
333 * constructing the SCU task context.
334 * @task_context: The buffer pointer for the SCU task context which is being
335 * constructed.
336 *
337 * The general io request construction is complete. The buffer assignment for
338 * the command buffer is complete. none Revisit task context construction to
339 * determine what is common for SSP/SMP/STP task context structures.
340 */
341static void scu_sata_reqeust_construct_task_context(
342 struct isci_request *ireq,
343 struct scu_task_context *task_context)
344{
345 dma_addr_t dma_addr;
346 struct isci_remote_device *idev;
347 struct isci_port *iport;
348
349 idev = ireq->target_device;
350 iport = idev->owning_port;
351
352 /* Fill in the TC with the its required data */
353 task_context->abort = 0;
354 task_context->priority = SCU_TASK_PRIORITY_NORMAL;
355 task_context->initiator_request = 1;
356 task_context->connection_rate = idev->connection_rate;
357 task_context->protocol_engine_index = ISCI_PEG;
358 task_context->logical_port_index = iport->physical_port_index;
359 task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_STP;
360 task_context->valid = SCU_TASK_CONTEXT_VALID;
361 task_context->context_type = SCU_TASK_CONTEXT_TYPE;
362
363 task_context->remote_node_index = idev->rnc.remote_node_index;
364 task_context->command_code = 0;
365
366 task_context->link_layer_control = 0;
367 task_context->do_not_dma_ssp_good_response = 1;
368 task_context->strict_ordering = 0;
369 task_context->control_frame = 0;
370 task_context->timeout_enable = 0;
371 task_context->block_guard_enable = 0;
372
373 task_context->address_modifier = 0;
374 task_context->task_phase = 0x01;
375
376 task_context->ssp_command_iu_length =
377 (sizeof(struct host_to_dev_fis) - sizeof(u32)) / sizeof(u32);
378
379 /* Set the first word of the H2D REG FIS */
380 task_context->type.words[0] = *(u32 *)&ireq->stp.cmd;
381
382 ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC |
383 (ISCI_PEG << SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) |
384 (iport->physical_port_index <<
385 SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) |
386 ISCI_TAG_TCI(ireq->io_tag));
387 /*
388 * Copy the physical address for the command buffer to the SCU Task
389 * Context. We must offset the command buffer by 4 bytes because the
390 * first 4 bytes are transfered in the body of the TC.
391 */
392 dma_addr = sci_io_request_get_dma_addr(ireq,
393 ((char *) &ireq->stp.cmd) +
394 sizeof(u32));
395
396 task_context->command_iu_upper = upper_32_bits(dma_addr);
397 task_context->command_iu_lower = lower_32_bits(dma_addr);
398
399 /* SATA Requests do not have a response buffer */
400 task_context->response_iu_upper = 0;
401 task_context->response_iu_lower = 0;
402}
403
404static void scu_stp_raw_request_construct_task_context(struct isci_request *ireq)
405{
406 struct scu_task_context *task_context = ireq->tc;
407
408 scu_sata_reqeust_construct_task_context(ireq, task_context);
409
410 task_context->control_frame = 0;
411 task_context->priority = SCU_TASK_PRIORITY_NORMAL;
412 task_context->task_type = SCU_TASK_TYPE_SATA_RAW_FRAME;
413 task_context->type.stp.fis_type = FIS_REGH2D;
414 task_context->transfer_length_bytes = sizeof(struct host_to_dev_fis) - sizeof(u32);
415}
416
417static enum sci_status sci_stp_pio_request_construct(struct isci_request *ireq,
418 bool copy_rx_frame)
419{
420 struct isci_stp_request *stp_req = &ireq->stp.req;
421
422 scu_stp_raw_request_construct_task_context(ireq);
423
424 stp_req->status = 0;
425 stp_req->sgl.offset = 0;
426 stp_req->sgl.set = SCU_SGL_ELEMENT_PAIR_A;
427
428 if (copy_rx_frame) {
429 sci_request_build_sgl(ireq);
430 stp_req->sgl.index = 0;
431 } else {
432 /* The user does not want the data copied to the SGL buffer location */
433 stp_req->sgl.index = -1;
434 }
435
436 return SCI_SUCCESS;
437}
438
439/**
440 *
441 * @sci_req: This parameter specifies the request to be constructed as an
442 * optimized request.
443 * @optimized_task_type: This parameter specifies whether the request is to be
444 * an UDMA request or a NCQ request. - A value of 0 indicates UDMA. - A
445 * value of 1 indicates NCQ.
446 *
447 * This method will perform request construction common to all types of STP
448 * requests that are optimized by the silicon (i.e. UDMA, NCQ). This method
449 * returns an indication as to whether the construction was successful.
450 */
451static void sci_stp_optimized_request_construct(struct isci_request *ireq,
452 u8 optimized_task_type,
453 u32 len,
454 enum dma_data_direction dir)
455{
456 struct scu_task_context *task_context = ireq->tc;
457
458 /* Build the STP task context structure */
459 scu_sata_reqeust_construct_task_context(ireq, task_context);
460
461 /* Copy over the SGL elements */
462 sci_request_build_sgl(ireq);
463
464 /* Copy over the number of bytes to be transfered */
465 task_context->transfer_length_bytes = len;
466
467 if (dir == DMA_TO_DEVICE) {
468 /*
469 * The difference between the DMA IN and DMA OUT request task type
470 * values are consistent with the difference between FPDMA READ
471 * and FPDMA WRITE values. Add the supplied task type parameter
472 * to this difference to set the task type properly for this
473 * DATA OUT (WRITE) case. */
474 task_context->task_type = optimized_task_type + (SCU_TASK_TYPE_DMA_OUT
475 - SCU_TASK_TYPE_DMA_IN);
476 } else {
477 /*
478 * For the DATA IN (READ) case, simply save the supplied
479 * optimized task type. */
480 task_context->task_type = optimized_task_type;
481 }
482}
483
484
485
486static enum sci_status
487sci_io_request_construct_sata(struct isci_request *ireq,
488 u32 len,
489 enum dma_data_direction dir,
490 bool copy)
491{
492 enum sci_status status = SCI_SUCCESS;
493 struct sas_task *task = isci_request_access_task(ireq);
494
495 /* check for management protocols */
496 if (ireq->ttype == tmf_task) {
497 struct isci_tmf *tmf = isci_request_access_tmf(ireq);
498
499 if (tmf->tmf_code == isci_tmf_sata_srst_high ||
500 tmf->tmf_code == isci_tmf_sata_srst_low) {
501 scu_stp_raw_request_construct_task_context(ireq);
502 return SCI_SUCCESS;
503 } else {
504 dev_err(&ireq->owning_controller->pdev->dev,
505 "%s: Request 0x%p received un-handled SAT "
506 "management protocol 0x%x.\n",
507 __func__, ireq, tmf->tmf_code);
508
509 return SCI_FAILURE;
510 }
511 }
512
513 if (!sas_protocol_ata(task->task_proto)) {
514 dev_err(&ireq->owning_controller->pdev->dev,
515 "%s: Non-ATA protocol in SATA path: 0x%x\n",
516 __func__,
517 task->task_proto);
518 return SCI_FAILURE;
519
520 }
521
522 /* non data */
523 if (task->data_dir == DMA_NONE) {
524 scu_stp_raw_request_construct_task_context(ireq);
525 return SCI_SUCCESS;
526 }
527
528 /* NCQ */
529 if (task->ata_task.use_ncq) {
530 sci_stp_optimized_request_construct(ireq,
531 SCU_TASK_TYPE_FPDMAQ_READ,
532 len, dir);
533 return SCI_SUCCESS;
534 }
535
536 /* DMA */
537 if (task->ata_task.dma_xfer) {
538 sci_stp_optimized_request_construct(ireq,
539 SCU_TASK_TYPE_DMA_IN,
540 len, dir);
541 return SCI_SUCCESS;
542 } else /* PIO */
543 return sci_stp_pio_request_construct(ireq, copy);
544
545 return status;
546}
547
548static enum sci_status sci_io_request_construct_basic_ssp(struct isci_request *ireq)
549{
550 struct sas_task *task = isci_request_access_task(ireq);
551
552 ireq->protocol = SCIC_SSP_PROTOCOL;
553
554 scu_ssp_io_request_construct_task_context(ireq,
555 task->data_dir,
556 task->total_xfer_len);
557
558 sci_io_request_build_ssp_command_iu(ireq);
559
560 sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED);
561
562 return SCI_SUCCESS;
563}
564
565enum sci_status sci_task_request_construct_ssp(
566 struct isci_request *ireq)
567{
568 /* Construct the SSP Task SCU Task Context */
569 scu_ssp_task_request_construct_task_context(ireq);
570
571 /* Fill in the SSP Task IU */
572 sci_task_request_build_ssp_task_iu(ireq);
573
574 sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED);
575
576 return SCI_SUCCESS;
577}
578
579static enum sci_status sci_io_request_construct_basic_sata(struct isci_request *ireq)
580{
581 enum sci_status status;
582 bool copy = false;
583 struct sas_task *task = isci_request_access_task(ireq);
584
585 ireq->protocol = SCIC_STP_PROTOCOL;
586
587 copy = (task->data_dir == DMA_NONE) ? false : true;
588
589 status = sci_io_request_construct_sata(ireq,
590 task->total_xfer_len,
591 task->data_dir,
592 copy);
593
594 if (status == SCI_SUCCESS)
595 sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED);
596
597 return status;
598}
599
600enum sci_status sci_task_request_construct_sata(struct isci_request *ireq)
601{
602 enum sci_status status = SCI_SUCCESS;
603
604 /* check for management protocols */
605 if (ireq->ttype == tmf_task) {
606 struct isci_tmf *tmf = isci_request_access_tmf(ireq);
607
608 if (tmf->tmf_code == isci_tmf_sata_srst_high ||
609 tmf->tmf_code == isci_tmf_sata_srst_low) {
610 scu_stp_raw_request_construct_task_context(ireq);
611 } else {
612 dev_err(&ireq->owning_controller->pdev->dev,
613 "%s: Request 0x%p received un-handled SAT "
614 "Protocol 0x%x.\n",
615 __func__, ireq, tmf->tmf_code);
616
617 return SCI_FAILURE;
618 }
619 }
620
621 if (status != SCI_SUCCESS)
622 return status;
623 sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED);
624
625 return status;
626}
627
628/**
629 * sci_req_tx_bytes - bytes transferred when reply underruns request
630 * @sci_req: request that was terminated early
631 */
632#define SCU_TASK_CONTEXT_SRAM 0x200000
633static u32 sci_req_tx_bytes(struct isci_request *ireq)
634{
635 struct isci_host *ihost = ireq->owning_controller;
636 u32 ret_val = 0;
637
638 if (readl(&ihost->smu_registers->address_modifier) == 0) {
639 void __iomem *scu_reg_base = ihost->scu_registers;
640
641 /* get the bytes of data from the Address == BAR1 + 20002Ch + (256*TCi) where
642 * BAR1 is the scu_registers
643 * 0x20002C = 0x200000 + 0x2c
644 * = start of task context SRAM + offset of (type.ssp.data_offset)
645 * TCi is the io_tag of struct sci_request
646 */
647 ret_val = readl(scu_reg_base +
648 (SCU_TASK_CONTEXT_SRAM + offsetof(struct scu_task_context, type.ssp.data_offset)) +
649 ((sizeof(struct scu_task_context)) * ISCI_TAG_TCI(ireq->io_tag)));
650 }
651
652 return ret_val;
653}
654
655enum sci_status sci_request_start(struct isci_request *ireq)
656{
657 enum sci_base_request_states state;
658 struct scu_task_context *tc = ireq->tc;
659 struct isci_host *ihost = ireq->owning_controller;
660
661 state = ireq->sm.current_state_id;
662 if (state != SCI_REQ_CONSTRUCTED) {
663 dev_warn(&ihost->pdev->dev,
664 "%s: SCIC IO Request requested to start while in wrong "
665 "state %d\n", __func__, state);
666 return SCI_FAILURE_INVALID_STATE;
667 }
668
669 tc->task_index = ISCI_TAG_TCI(ireq->io_tag);
670
671 switch (tc->protocol_type) {
672 case SCU_TASK_CONTEXT_PROTOCOL_SMP:
673 case SCU_TASK_CONTEXT_PROTOCOL_SSP:
674 /* SSP/SMP Frame */
675 tc->type.ssp.tag = ireq->io_tag;
676 tc->type.ssp.target_port_transfer_tag = 0xFFFF;
677 break;
678
679 case SCU_TASK_CONTEXT_PROTOCOL_STP:
680 /* STP/SATA Frame
681 * tc->type.stp.ncq_tag = ireq->ncq_tag;
682 */
683 break;
684
685 case SCU_TASK_CONTEXT_PROTOCOL_NONE:
686 /* / @todo When do we set no protocol type? */
687 break;
688
689 default:
690 /* This should never happen since we build the IO
691 * requests */
692 break;
693 }
694
695 /* Add to the post_context the io tag value */
696 ireq->post_context |= ISCI_TAG_TCI(ireq->io_tag);
697
698 /* Everything is good go ahead and change state */
699 sci_change_state(&ireq->sm, SCI_REQ_STARTED);
700
701 return SCI_SUCCESS;
702}
703
704enum sci_status
705sci_io_request_terminate(struct isci_request *ireq)
706{
707 enum sci_base_request_states state;
708
709 state = ireq->sm.current_state_id;
710
711 switch (state) {
712 case SCI_REQ_CONSTRUCTED:
713 ireq->scu_status = SCU_TASK_DONE_TASK_ABORT;
714 ireq->sci_status = SCI_FAILURE_IO_TERMINATED;
715 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
716 return SCI_SUCCESS;
717 case SCI_REQ_STARTED:
718 case SCI_REQ_TASK_WAIT_TC_COMP:
719 case SCI_REQ_SMP_WAIT_RESP:
720 case SCI_REQ_SMP_WAIT_TC_COMP:
721 case SCI_REQ_STP_UDMA_WAIT_TC_COMP:
722 case SCI_REQ_STP_UDMA_WAIT_D2H:
723 case SCI_REQ_STP_NON_DATA_WAIT_H2D:
724 case SCI_REQ_STP_NON_DATA_WAIT_D2H:
725 case SCI_REQ_STP_PIO_WAIT_H2D:
726 case SCI_REQ_STP_PIO_WAIT_FRAME:
727 case SCI_REQ_STP_PIO_DATA_IN:
728 case SCI_REQ_STP_PIO_DATA_OUT:
729 case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED:
730 case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG:
731 case SCI_REQ_STP_SOFT_RESET_WAIT_D2H:
732 sci_change_state(&ireq->sm, SCI_REQ_ABORTING);
733 return SCI_SUCCESS;
734 case SCI_REQ_TASK_WAIT_TC_RESP:
735 sci_change_state(&ireq->sm, SCI_REQ_ABORTING);
736 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
737 return SCI_SUCCESS;
738 case SCI_REQ_ABORTING:
739 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
740 return SCI_SUCCESS;
741 case SCI_REQ_COMPLETED:
742 default:
743 dev_warn(&ireq->owning_controller->pdev->dev,
744 "%s: SCIC IO Request requested to abort while in wrong "
745 "state %d\n",
746 __func__,
747 ireq->sm.current_state_id);
748 break;
749 }
750
751 return SCI_FAILURE_INVALID_STATE;
752}
753
754enum sci_status sci_request_complete(struct isci_request *ireq)
755{
756 enum sci_base_request_states state;
757 struct isci_host *ihost = ireq->owning_controller;
758
759 state = ireq->sm.current_state_id;
760 if (WARN_ONCE(state != SCI_REQ_COMPLETED,
761 "isci: request completion from wrong state (%d)\n", state))
762 return SCI_FAILURE_INVALID_STATE;
763
764 if (ireq->saved_rx_frame_index != SCU_INVALID_FRAME_INDEX)
765 sci_controller_release_frame(ihost,
766 ireq->saved_rx_frame_index);
767
768 /* XXX can we just stop the machine and remove the 'final' state? */
769 sci_change_state(&ireq->sm, SCI_REQ_FINAL);
770 return SCI_SUCCESS;
771}
772
773enum sci_status sci_io_request_event_handler(struct isci_request *ireq,
774 u32 event_code)
775{
776 enum sci_base_request_states state;
777 struct isci_host *ihost = ireq->owning_controller;
778
779 state = ireq->sm.current_state_id;
780
781 if (state != SCI_REQ_STP_PIO_DATA_IN) {
782 dev_warn(&ihost->pdev->dev, "%s: (%x) in wrong state %d\n",
783 __func__, event_code, state);
784
785 return SCI_FAILURE_INVALID_STATE;
786 }
787
788 switch (scu_get_event_specifier(event_code)) {
789 case SCU_TASK_DONE_CRC_ERR << SCU_EVENT_SPECIFIC_CODE_SHIFT:
790 /* We are waiting for data and the SCU has R_ERR the data frame.
791 * Go back to waiting for the D2H Register FIS
792 */
793 sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME);
794 return SCI_SUCCESS;
795 default:
796 dev_err(&ihost->pdev->dev,
797 "%s: pio request unexpected event %#x\n",
798 __func__, event_code);
799
800 /* TODO Should we fail the PIO request when we get an
801 * unexpected event?
802 */
803 return SCI_FAILURE;
804 }
805}
806
807/*
808 * This function copies response data for requests returning response data
809 * instead of sense data.
810 * @sci_req: This parameter specifies the request object for which to copy
811 * the response data.
812 */
813static void sci_io_request_copy_response(struct isci_request *ireq)
814{
815 void *resp_buf;
816 u32 len;
817 struct ssp_response_iu *ssp_response;
818 struct isci_tmf *isci_tmf = isci_request_access_tmf(ireq);
819
820 ssp_response = &ireq->ssp.rsp;
821
822 resp_buf = &isci_tmf->resp.resp_iu;
823
824 len = min_t(u32,
825 SSP_RESP_IU_MAX_SIZE,
826 be32_to_cpu(ssp_response->response_data_len));
827
828 memcpy(resp_buf, ssp_response->resp_data, len);
829}
830
831static enum sci_status
832request_started_state_tc_event(struct isci_request *ireq,
833 u32 completion_code)
834{
835 struct ssp_response_iu *resp_iu;
836 u8 datapres;
837
838 /* TODO: Any SDMA return code of other than 0 is bad decode 0x003C0000
839 * to determine SDMA status
840 */
841 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
842 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD):
843 ireq->scu_status = SCU_TASK_DONE_GOOD;
844 ireq->sci_status = SCI_SUCCESS;
845 break;
846 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_EARLY_RESP): {
847 /* There are times when the SCU hardware will return an early
848 * response because the io request specified more data than is
849 * returned by the target device (mode pages, inquiry data,
850 * etc.). We must check the response stats to see if this is
851 * truly a failed request or a good request that just got
852 * completed early.
853 */
854 struct ssp_response_iu *resp = &ireq->ssp.rsp;
855 ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32);
856
857 sci_swab32_cpy(&ireq->ssp.rsp,
858 &ireq->ssp.rsp,
859 word_cnt);
860
861 if (resp->status == 0) {
862 ireq->scu_status = SCU_TASK_DONE_GOOD;
863 ireq->sci_status = SCI_SUCCESS_IO_DONE_EARLY;
864 } else {
865 ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE;
866 ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID;
867 }
868 break;
869 }
870 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CHECK_RESPONSE): {
871 ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32);
872
873 sci_swab32_cpy(&ireq->ssp.rsp,
874 &ireq->ssp.rsp,
875 word_cnt);
876
877 ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE;
878 ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID;
879 break;
880 }
881
882 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_RESP_LEN_ERR):
883 /* TODO With TASK_DONE_RESP_LEN_ERR is the response frame
884 * guaranteed to be received before this completion status is
885 * posted?
886 */
887 resp_iu = &ireq->ssp.rsp;
888 datapres = resp_iu->datapres;
889
890 if (datapres == 1 || datapres == 2) {
891 ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE;
892 ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID;
893 } else {
894 ireq->scu_status = SCU_TASK_DONE_GOOD;
895 ireq->sci_status = SCI_SUCCESS;
896 }
897 break;
898 /* only stp device gets suspended. */
899 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_ACK_NAK_TO):
900 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_PERR):
901 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_NAK_ERR):
902 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_DATA_LEN_ERR):
903 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_ABORT_ERR):
904 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_XR_WD_LEN):
905 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_MAX_PLD_ERR):
906 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_RESP):
907 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_SDBFIS):
908 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_REG_ERR):
909 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SDB_ERR):
910 if (ireq->protocol == SCIC_STP_PROTOCOL) {
911 ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >>
912 SCU_COMPLETION_TL_STATUS_SHIFT;
913 ireq->sci_status = SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED;
914 } else {
915 ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >>
916 SCU_COMPLETION_TL_STATUS_SHIFT;
917 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
918 }
919 break;
920
921 /* both stp/ssp device gets suspended */
922 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LF_ERR):
923 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_WRONG_DESTINATION):
924 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1):
925 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2):
926 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3):
927 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_BAD_DESTINATION):
928 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_ZONE_VIOLATION):
929 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY):
930 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED):
931 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED):
932 ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >>
933 SCU_COMPLETION_TL_STATUS_SHIFT;
934 ireq->sci_status = SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED;
935 break;
936
937 /* neither ssp nor stp gets suspended. */
938 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_NAK_CMD_ERR):
939 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_XR):
940 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_XR_IU_LEN_ERR):
941 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SDMA_ERR):
942 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_OFFSET_ERR):
943 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_EXCESS_DATA):
944 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_RESP_TO_ERR):
945 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_UFI_ERR):
946 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_FRM_TYPE_ERR):
947 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_LL_RX_ERR):
948 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_DATA):
949 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_OPEN_FAIL):
950 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_VIIT_ENTRY_NV):
951 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_IIT_ENTRY_NV):
952 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_RNCNV_OUTBOUND):
953 default:
954 ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >>
955 SCU_COMPLETION_TL_STATUS_SHIFT;
956 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
957 break;
958 }
959
960 /*
961 * TODO: This is probably wrong for ACK/NAK timeout conditions
962 */
963
964 /* In all cases we will treat this as the completion of the IO req. */
965 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
966 return SCI_SUCCESS;
967}
968
969static enum sci_status
970request_aborting_state_tc_event(struct isci_request *ireq,
971 u32 completion_code)
972{
973 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
974 case (SCU_TASK_DONE_GOOD << SCU_COMPLETION_TL_STATUS_SHIFT):
975 case (SCU_TASK_DONE_TASK_ABORT << SCU_COMPLETION_TL_STATUS_SHIFT):
976 ireq->scu_status = SCU_TASK_DONE_TASK_ABORT;
977 ireq->sci_status = SCI_FAILURE_IO_TERMINATED;
978 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
979 break;
980
981 default:
982 /* Unless we get some strange error wait for the task abort to complete
983 * TODO: Should there be a state change for this completion?
984 */
985 break;
986 }
987
988 return SCI_SUCCESS;
989}
990
991static enum sci_status ssp_task_request_await_tc_event(struct isci_request *ireq,
992 u32 completion_code)
993{
994 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
995 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD):
996 ireq->scu_status = SCU_TASK_DONE_GOOD;
997 ireq->sci_status = SCI_SUCCESS;
998 sci_change_state(&ireq->sm, SCI_REQ_TASK_WAIT_TC_RESP);
999 break;
1000 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_ACK_NAK_TO):
1001 /* Currently, the decision is to simply allow the task request
1002 * to timeout if the task IU wasn't received successfully.
1003 * There is a potential for receiving multiple task responses if
1004 * we decide to send the task IU again.
1005 */
1006 dev_warn(&ireq->owning_controller->pdev->dev,
1007 "%s: TaskRequest:0x%p CompletionCode:%x - "
1008 "ACK/NAK timeout\n", __func__, ireq,
1009 completion_code);
1010
1011 sci_change_state(&ireq->sm, SCI_REQ_TASK_WAIT_TC_RESP);
1012 break;
1013 default:
1014 /*
1015 * All other completion status cause the IO to be complete.
1016 * If a NAK was received, then it is up to the user to retry
1017 * the request.
1018 */
1019 ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code);
1020 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1021 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1022 break;
1023 }
1024
1025 return SCI_SUCCESS;
1026}
1027
1028static enum sci_status
1029smp_request_await_response_tc_event(struct isci_request *ireq,
1030 u32 completion_code)
1031{
1032 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
1033 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD):
1034 /* In the AWAIT RESPONSE state, any TC completion is
1035 * unexpected. but if the TC has success status, we
1036 * complete the IO anyway.
1037 */
1038 ireq->scu_status = SCU_TASK_DONE_GOOD;
1039 ireq->sci_status = SCI_SUCCESS;
1040 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1041 break;
1042 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_RESP_TO_ERR):
1043 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_UFI_ERR):
1044 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_FRM_TYPE_ERR):
1045 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_LL_RX_ERR):
1046 /* These status has been seen in a specific LSI
1047 * expander, which sometimes is not able to send smp
1048 * response within 2 ms. This causes our hardware break
1049 * the connection and set TC completion with one of
1050 * these SMP_XXX_XX_ERR status. For these type of error,
1051 * we ask ihost user to retry the request.
1052 */
1053 ireq->scu_status = SCU_TASK_DONE_SMP_RESP_TO_ERR;
1054 ireq->sci_status = SCI_FAILURE_RETRY_REQUIRED;
1055 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1056 break;
1057 default:
1058 /* All other completion status cause the IO to be complete. If a NAK
1059 * was received, then it is up to the user to retry the request
1060 */
1061 ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code);
1062 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1063 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1064 break;
1065 }
1066
1067 return SCI_SUCCESS;
1068}
1069
1070static enum sci_status
1071smp_request_await_tc_event(struct isci_request *ireq,
1072 u32 completion_code)
1073{
1074 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
1075 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD):
1076 ireq->scu_status = SCU_TASK_DONE_GOOD;
1077 ireq->sci_status = SCI_SUCCESS;
1078 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1079 break;
1080 default:
1081 /* All other completion status cause the IO to be
1082 * complete. If a NAK was received, then it is up to
1083 * the user to retry the request.
1084 */
1085 ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code);
1086 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1087 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1088 break;
1089 }
1090
1091 return SCI_SUCCESS;
1092}
1093
1094static struct scu_sgl_element *pio_sgl_next(struct isci_stp_request *stp_req)
1095{
1096 struct scu_sgl_element *sgl;
1097 struct scu_sgl_element_pair *sgl_pair;
1098 struct isci_request *ireq = to_ireq(stp_req);
1099 struct isci_stp_pio_sgl *pio_sgl = &stp_req->sgl;
1100
1101 sgl_pair = to_sgl_element_pair(ireq, pio_sgl->index);
1102 if (!sgl_pair)
1103 sgl = NULL;
1104 else if (pio_sgl->set == SCU_SGL_ELEMENT_PAIR_A) {
1105 if (sgl_pair->B.address_lower == 0 &&
1106 sgl_pair->B.address_upper == 0) {
1107 sgl = NULL;
1108 } else {
1109 pio_sgl->set = SCU_SGL_ELEMENT_PAIR_B;
1110 sgl = &sgl_pair->B;
1111 }
1112 } else {
1113 if (sgl_pair->next_pair_lower == 0 &&
1114 sgl_pair->next_pair_upper == 0) {
1115 sgl = NULL;
1116 } else {
1117 pio_sgl->index++;
1118 pio_sgl->set = SCU_SGL_ELEMENT_PAIR_A;
1119 sgl_pair = to_sgl_element_pair(ireq, pio_sgl->index);
1120 sgl = &sgl_pair->A;
1121 }
1122 }
1123
1124 return sgl;
1125}
1126
1127static enum sci_status
1128stp_request_non_data_await_h2d_tc_event(struct isci_request *ireq,
1129 u32 completion_code)
1130{
1131 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
1132 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD):
1133 ireq->scu_status = SCU_TASK_DONE_GOOD;
1134 ireq->sci_status = SCI_SUCCESS;
1135 sci_change_state(&ireq->sm, SCI_REQ_STP_NON_DATA_WAIT_D2H);
1136 break;
1137
1138 default:
1139 /* All other completion status cause the IO to be
1140 * complete. If a NAK was received, then it is up to
1141 * the user to retry the request.
1142 */
1143 ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code);
1144 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1145 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1146 break;
1147 }
1148
1149 return SCI_SUCCESS;
1150}
1151
1152#define SCU_MAX_FRAME_BUFFER_SIZE 0x400 /* 1K is the maximum SCU frame data payload */
1153
1154/* transmit DATA_FIS from (current sgl + offset) for input
1155 * parameter length. current sgl and offset is alreay stored in the IO request
1156 */
1157static enum sci_status sci_stp_request_pio_data_out_trasmit_data_frame(
1158 struct isci_request *ireq,
1159 u32 length)
1160{
1161 struct isci_stp_request *stp_req = &ireq->stp.req;
1162 struct scu_task_context *task_context = ireq->tc;
1163 struct scu_sgl_element_pair *sgl_pair;
1164 struct scu_sgl_element *current_sgl;
1165
1166 /* Recycle the TC and reconstruct it for sending out DATA FIS containing
1167 * for the data from current_sgl+offset for the input length
1168 */
1169 sgl_pair = to_sgl_element_pair(ireq, stp_req->sgl.index);
1170 if (stp_req->sgl.set == SCU_SGL_ELEMENT_PAIR_A)
1171 current_sgl = &sgl_pair->A;
1172 else
1173 current_sgl = &sgl_pair->B;
1174
1175 /* update the TC */
1176 task_context->command_iu_upper = current_sgl->address_upper;
1177 task_context->command_iu_lower = current_sgl->address_lower;
1178 task_context->transfer_length_bytes = length;
1179 task_context->type.stp.fis_type = FIS_DATA;
1180
1181 /* send the new TC out. */
1182 return sci_controller_continue_io(ireq);
1183}
1184
1185static enum sci_status sci_stp_request_pio_data_out_transmit_data(struct isci_request *ireq)
1186{
1187 struct isci_stp_request *stp_req = &ireq->stp.req;
1188 struct scu_sgl_element_pair *sgl_pair;
1189 struct scu_sgl_element *sgl;
1190 enum sci_status status;
1191 u32 offset;
1192 u32 len = 0;
1193
1194 offset = stp_req->sgl.offset;
1195 sgl_pair = to_sgl_element_pair(ireq, stp_req->sgl.index);
1196 if (WARN_ONCE(!sgl_pair, "%s: null sgl element", __func__))
1197 return SCI_FAILURE;
1198
1199 if (stp_req->sgl.set == SCU_SGL_ELEMENT_PAIR_A) {
1200 sgl = &sgl_pair->A;
1201 len = sgl_pair->A.length - offset;
1202 } else {
1203 sgl = &sgl_pair->B;
1204 len = sgl_pair->B.length - offset;
1205 }
1206
1207 if (stp_req->pio_len == 0)
1208 return SCI_SUCCESS;
1209
1210 if (stp_req->pio_len >= len) {
1211 status = sci_stp_request_pio_data_out_trasmit_data_frame(ireq, len);
1212 if (status != SCI_SUCCESS)
1213 return status;
1214 stp_req->pio_len -= len;
1215
1216 /* update the current sgl, offset and save for future */
1217 sgl = pio_sgl_next(stp_req);
1218 offset = 0;
1219 } else if (stp_req->pio_len < len) {
1220 sci_stp_request_pio_data_out_trasmit_data_frame(ireq, stp_req->pio_len);
1221
1222 /* Sgl offset will be adjusted and saved for future */
1223 offset += stp_req->pio_len;
1224 sgl->address_lower += stp_req->pio_len;
1225 stp_req->pio_len = 0;
1226 }
1227
1228 stp_req->sgl.offset = offset;
1229
1230 return status;
1231}
1232
1233/**
1234 *
1235 * @stp_request: The request that is used for the SGL processing.
1236 * @data_buffer: The buffer of data to be copied.
1237 * @length: The length of the data transfer.
1238 *
1239 * Copy the data from the buffer for the length specified to the IO reqeust SGL
1240 * specified data region. enum sci_status
1241 */
1242static enum sci_status
1243sci_stp_request_pio_data_in_copy_data_buffer(struct isci_stp_request *stp_req,
1244 u8 *data_buf, u32 len)
1245{
1246 struct isci_request *ireq;
1247 u8 *src_addr;
1248 int copy_len;
1249 struct sas_task *task;
1250 struct scatterlist *sg;
1251 void *kaddr;
1252 int total_len = len;
1253
1254 ireq = to_ireq(stp_req);
1255 task = isci_request_access_task(ireq);
1256 src_addr = data_buf;
1257
1258 if (task->num_scatter > 0) {
1259 sg = task->scatter;
1260
1261 while (total_len > 0) {
1262 struct page *page = sg_page(sg);
1263
1264 copy_len = min_t(int, total_len, sg_dma_len(sg));
1265 kaddr = kmap_atomic(page, KM_IRQ0);
1266 memcpy(kaddr + sg->offset, src_addr, copy_len);
1267 kunmap_atomic(kaddr, KM_IRQ0);
1268 total_len -= copy_len;
1269 src_addr += copy_len;
1270 sg = sg_next(sg);
1271 }
1272 } else {
1273 BUG_ON(task->total_xfer_len < total_len);
1274 memcpy(task->scatter, src_addr, total_len);
1275 }
1276
1277 return SCI_SUCCESS;
1278}
1279
1280/**
1281 *
1282 * @sci_req: The PIO DATA IN request that is to receive the data.
1283 * @data_buffer: The buffer to copy from.
1284 *
1285 * Copy the data buffer to the io request data region. enum sci_status
1286 */
1287static enum sci_status sci_stp_request_pio_data_in_copy_data(
1288 struct isci_stp_request *stp_req,
1289 u8 *data_buffer)
1290{
1291 enum sci_status status;
1292
1293 /*
1294 * If there is less than 1K remaining in the transfer request
1295 * copy just the data for the transfer */
1296 if (stp_req->pio_len < SCU_MAX_FRAME_BUFFER_SIZE) {
1297 status = sci_stp_request_pio_data_in_copy_data_buffer(
1298 stp_req, data_buffer, stp_req->pio_len);
1299
1300 if (status == SCI_SUCCESS)
1301 stp_req->pio_len = 0;
1302 } else {
1303 /* We are transfering the whole frame so copy */
1304 status = sci_stp_request_pio_data_in_copy_data_buffer(
1305 stp_req, data_buffer, SCU_MAX_FRAME_BUFFER_SIZE);
1306
1307 if (status == SCI_SUCCESS)
1308 stp_req->pio_len -= SCU_MAX_FRAME_BUFFER_SIZE;
1309 }
1310
1311 return status;
1312}
1313
1314static enum sci_status
1315stp_request_pio_await_h2d_completion_tc_event(struct isci_request *ireq,
1316 u32 completion_code)
1317{
1318 enum sci_status status = SCI_SUCCESS;
1319
1320 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
1321 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD):
1322 ireq->scu_status = SCU_TASK_DONE_GOOD;
1323 ireq->sci_status = SCI_SUCCESS;
1324 sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME);
1325 break;
1326
1327 default:
1328 /* All other completion status cause the IO to be
1329 * complete. If a NAK was received, then it is up to
1330 * the user to retry the request.
1331 */
1332 ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code);
1333 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1334 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1335 break;
1336 }
1337
1338 return status;
1339}
1340
1341static enum sci_status
1342pio_data_out_tx_done_tc_event(struct isci_request *ireq,
1343 u32 completion_code)
1344{
1345 enum sci_status status = SCI_SUCCESS;
1346 bool all_frames_transferred = false;
1347 struct isci_stp_request *stp_req = &ireq->stp.req;
1348
1349 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
1350 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD):
1351 /* Transmit data */
1352 if (stp_req->pio_len != 0) {
1353 status = sci_stp_request_pio_data_out_transmit_data(ireq);
1354 if (status == SCI_SUCCESS) {
1355 if (stp_req->pio_len == 0)
1356 all_frames_transferred = true;
1357 }
1358 } else if (stp_req->pio_len == 0) {
1359 /*
1360 * this will happen if the all data is written at the
1361 * first time after the pio setup fis is received
1362 */
1363 all_frames_transferred = true;
1364 }
1365
1366 /* all data transferred. */
1367 if (all_frames_transferred) {
1368 /*
1369 * Change the state to SCI_REQ_STP_PIO_DATA_IN
1370 * and wait for PIO_SETUP fis / or D2H REg fis. */
1371 sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME);
1372 }
1373 break;
1374
1375 default:
1376 /*
1377 * All other completion status cause the IO to be complete.
1378 * If a NAK was received, then it is up to the user to retry
1379 * the request.
1380 */
1381 ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code);
1382 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1383 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1384 break;
1385 }
1386
1387 return status;
1388}
1389
1390static enum sci_status sci_stp_request_udma_general_frame_handler(struct isci_request *ireq,
1391 u32 frame_index)
1392{
1393 struct isci_host *ihost = ireq->owning_controller;
1394 struct dev_to_host_fis *frame_header;
1395 enum sci_status status;
1396 u32 *frame_buffer;
1397
1398 status = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
1399 frame_index,
1400 (void **)&frame_header);
1401
1402 if ((status == SCI_SUCCESS) &&
1403 (frame_header->fis_type == FIS_REGD2H)) {
1404 sci_unsolicited_frame_control_get_buffer(&ihost->uf_control,
1405 frame_index,
1406 (void **)&frame_buffer);
1407
1408 sci_controller_copy_sata_response(&ireq->stp.rsp,
1409 frame_header,
1410 frame_buffer);
1411 }
1412
1413 sci_controller_release_frame(ihost, frame_index);
1414
1415 return status;
1416}
1417
1418enum sci_status
1419sci_io_request_frame_handler(struct isci_request *ireq,
1420 u32 frame_index)
1421{
1422 struct isci_host *ihost = ireq->owning_controller;
1423 struct isci_stp_request *stp_req = &ireq->stp.req;
1424 enum sci_base_request_states state;
1425 enum sci_status status;
1426 ssize_t word_cnt;
1427
1428 state = ireq->sm.current_state_id;
1429 switch (state) {
1430 case SCI_REQ_STARTED: {
1431 struct ssp_frame_hdr ssp_hdr;
1432 void *frame_header;
1433
1434 sci_unsolicited_frame_control_get_header(&ihost->uf_control,
1435 frame_index,
1436 &frame_header);
1437
1438 word_cnt = sizeof(struct ssp_frame_hdr) / sizeof(u32);
1439 sci_swab32_cpy(&ssp_hdr, frame_header, word_cnt);
1440
1441 if (ssp_hdr.frame_type == SSP_RESPONSE) {
1442 struct ssp_response_iu *resp_iu;
1443 ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32);
1444
1445 sci_unsolicited_frame_control_get_buffer(&ihost->uf_control,
1446 frame_index,
1447 (void **)&resp_iu);
1448
1449 sci_swab32_cpy(&ireq->ssp.rsp, resp_iu, word_cnt);
1450
1451 resp_iu = &ireq->ssp.rsp;
1452
1453 if (resp_iu->datapres == 0x01 ||
1454 resp_iu->datapres == 0x02) {
1455 ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE;
1456 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1457 } else {
1458 ireq->scu_status = SCU_TASK_DONE_GOOD;
1459 ireq->sci_status = SCI_SUCCESS;
1460 }
1461 } else {
1462 /* not a response frame, why did it get forwarded? */
1463 dev_err(&ihost->pdev->dev,
1464 "%s: SCIC IO Request 0x%p received unexpected "
1465 "frame %d type 0x%02x\n", __func__, ireq,
1466 frame_index, ssp_hdr.frame_type);
1467 }
1468
1469 /*
1470 * In any case we are done with this frame buffer return it to
1471 * the controller
1472 */
1473 sci_controller_release_frame(ihost, frame_index);
1474
1475 return SCI_SUCCESS;
1476 }
1477
1478 case SCI_REQ_TASK_WAIT_TC_RESP:
1479 sci_io_request_copy_response(ireq);
1480 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1481 sci_controller_release_frame(ihost, frame_index);
1482 return SCI_SUCCESS;
1483
1484 case SCI_REQ_SMP_WAIT_RESP: {
1485 struct smp_resp *rsp_hdr = &ireq->smp.rsp;
1486 void *frame_header;
1487
1488 sci_unsolicited_frame_control_get_header(&ihost->uf_control,
1489 frame_index,
1490 &frame_header);
1491
1492 /* byte swap the header. */
1493 word_cnt = SMP_RESP_HDR_SZ / sizeof(u32);
1494 sci_swab32_cpy(rsp_hdr, frame_header, word_cnt);
1495
1496 if (rsp_hdr->frame_type == SMP_RESPONSE) {
1497 void *smp_resp;
1498
1499 sci_unsolicited_frame_control_get_buffer(&ihost->uf_control,
1500 frame_index,
1501 &smp_resp);
1502
1503 word_cnt = (sizeof(struct smp_resp) - SMP_RESP_HDR_SZ) /
1504 sizeof(u32);
1505
1506 sci_swab32_cpy(((u8 *) rsp_hdr) + SMP_RESP_HDR_SZ,
1507 smp_resp, word_cnt);
1508
1509 ireq->scu_status = SCU_TASK_DONE_GOOD;
1510 ireq->sci_status = SCI_SUCCESS;
1511 sci_change_state(&ireq->sm, SCI_REQ_SMP_WAIT_TC_COMP);
1512 } else {
1513 /*
1514 * This was not a response frame why did it get
1515 * forwarded?
1516 */
1517 dev_err(&ihost->pdev->dev,
1518 "%s: SCIC SMP Request 0x%p received unexpected "
1519 "frame %d type 0x%02x\n",
1520 __func__,
1521 ireq,
1522 frame_index,
1523 rsp_hdr->frame_type);
1524
1525 ireq->scu_status = SCU_TASK_DONE_SMP_FRM_TYPE_ERR;
1526 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1527 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1528 }
1529
1530 sci_controller_release_frame(ihost, frame_index);
1531
1532 return SCI_SUCCESS;
1533 }
1534
1535 case SCI_REQ_STP_UDMA_WAIT_TC_COMP:
1536 return sci_stp_request_udma_general_frame_handler(ireq,
1537 frame_index);
1538
1539 case SCI_REQ_STP_UDMA_WAIT_D2H:
1540 /* Use the general frame handler to copy the resposne data */
1541 status = sci_stp_request_udma_general_frame_handler(ireq, frame_index);
1542
1543 if (status != SCI_SUCCESS)
1544 return status;
1545
1546 ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE;
1547 ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID;
1548 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1549 return SCI_SUCCESS;
1550
1551 case SCI_REQ_STP_NON_DATA_WAIT_D2H: {
1552 struct dev_to_host_fis *frame_header;
1553 u32 *frame_buffer;
1554
1555 status = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
1556 frame_index,
1557 (void **)&frame_header);
1558
1559 if (status != SCI_SUCCESS) {
1560 dev_err(&ihost->pdev->dev,
1561 "%s: SCIC IO Request 0x%p could not get frame "
1562 "header for frame index %d, status %x\n",
1563 __func__,
1564 stp_req,
1565 frame_index,
1566 status);
1567
1568 return status;
1569 }
1570
1571 switch (frame_header->fis_type) {
1572 case FIS_REGD2H:
1573 sci_unsolicited_frame_control_get_buffer(&ihost->uf_control,
1574 frame_index,
1575 (void **)&frame_buffer);
1576
1577 sci_controller_copy_sata_response(&ireq->stp.rsp,
1578 frame_header,
1579 frame_buffer);
1580
1581 /* The command has completed with error */
1582 ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE;
1583 ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID;
1584 break;
1585
1586 default:
1587 dev_warn(&ihost->pdev->dev,
1588 "%s: IO Request:0x%p Frame Id:%d protocol "
1589 "violation occurred\n", __func__, stp_req,
1590 frame_index);
1591
1592 ireq->scu_status = SCU_TASK_DONE_UNEXP_FIS;
1593 ireq->sci_status = SCI_FAILURE_PROTOCOL_VIOLATION;
1594 break;
1595 }
1596
1597 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1598
1599 /* Frame has been decoded return it to the controller */
1600 sci_controller_release_frame(ihost, frame_index);
1601
1602 return status;
1603 }
1604
1605 case SCI_REQ_STP_PIO_WAIT_FRAME: {
1606 struct sas_task *task = isci_request_access_task(ireq);
1607 struct dev_to_host_fis *frame_header;
1608 u32 *frame_buffer;
1609
1610 status = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
1611 frame_index,
1612 (void **)&frame_header);
1613
1614 if (status != SCI_SUCCESS) {
1615 dev_err(&ihost->pdev->dev,
1616 "%s: SCIC IO Request 0x%p could not get frame "
1617 "header for frame index %d, status %x\n",
1618 __func__, stp_req, frame_index, status);
1619 return status;
1620 }
1621
1622 switch (frame_header->fis_type) {
1623 case FIS_PIO_SETUP:
1624 /* Get from the frame buffer the PIO Setup Data */
1625 sci_unsolicited_frame_control_get_buffer(&ihost->uf_control,
1626 frame_index,
1627 (void **)&frame_buffer);
1628
1629 /* Get the data from the PIO Setup The SCU Hardware
1630 * returns first word in the frame_header and the rest
1631 * of the data is in the frame buffer so we need to
1632 * back up one dword
1633 */
1634
1635 /* transfer_count: first 16bits in the 4th dword */
1636 stp_req->pio_len = frame_buffer[3] & 0xffff;
1637
1638 /* status: 4th byte in the 3rd dword */
1639 stp_req->status = (frame_buffer[2] >> 24) & 0xff;
1640
1641 sci_controller_copy_sata_response(&ireq->stp.rsp,
1642 frame_header,
1643 frame_buffer);
1644
1645 ireq->stp.rsp.status = stp_req->status;
1646
1647 /* The next state is dependent on whether the
1648 * request was PIO Data-in or Data out
1649 */
1650 if (task->data_dir == DMA_FROM_DEVICE) {
1651 sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_DATA_IN);
1652 } else if (task->data_dir == DMA_TO_DEVICE) {
1653 /* Transmit data */
1654 status = sci_stp_request_pio_data_out_transmit_data(ireq);
1655 if (status != SCI_SUCCESS)
1656 break;
1657 sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_DATA_OUT);
1658 }
1659 break;
1660
1661 case FIS_SETDEVBITS:
1662 sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME);
1663 break;
1664
1665 case FIS_REGD2H:
1666 if (frame_header->status & ATA_BUSY) {
1667 /*
1668 * Now why is the drive sending a D2H Register
1669 * FIS when it is still busy? Do nothing since
1670 * we are still in the right state.
1671 */
1672 dev_dbg(&ihost->pdev->dev,
1673 "%s: SCIC PIO Request 0x%p received "
1674 "D2H Register FIS with BSY status "
1675 "0x%x\n",
1676 __func__,
1677 stp_req,
1678 frame_header->status);
1679 break;
1680 }
1681
1682 sci_unsolicited_frame_control_get_buffer(&ihost->uf_control,
1683 frame_index,
1684 (void **)&frame_buffer);
1685
1686 sci_controller_copy_sata_response(&ireq->stp.req,
1687 frame_header,
1688 frame_buffer);
1689
1690 ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE;
1691 ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID;
1692 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1693 break;
1694
1695 default:
1696 /* FIXME: what do we do here? */
1697 break;
1698 }
1699
1700 /* Frame is decoded return it to the controller */
1701 sci_controller_release_frame(ihost, frame_index);
1702
1703 return status;
1704 }
1705
1706 case SCI_REQ_STP_PIO_DATA_IN: {
1707 struct dev_to_host_fis *frame_header;
1708 struct sata_fis_data *frame_buffer;
1709
1710 status = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
1711 frame_index,
1712 (void **)&frame_header);
1713
1714 if (status != SCI_SUCCESS) {
1715 dev_err(&ihost->pdev->dev,
1716 "%s: SCIC IO Request 0x%p could not get frame "
1717 "header for frame index %d, status %x\n",
1718 __func__,
1719 stp_req,
1720 frame_index,
1721 status);
1722 return status;
1723 }
1724
1725 if (frame_header->fis_type != FIS_DATA) {
1726 dev_err(&ihost->pdev->dev,
1727 "%s: SCIC PIO Request 0x%p received frame %d "
1728 "with fis type 0x%02x when expecting a data "
1729 "fis.\n",
1730 __func__,
1731 stp_req,
1732 frame_index,
1733 frame_header->fis_type);
1734
1735 ireq->scu_status = SCU_TASK_DONE_GOOD;
1736 ireq->sci_status = SCI_FAILURE_IO_REQUIRES_SCSI_ABORT;
1737 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1738
1739 /* Frame is decoded return it to the controller */
1740 sci_controller_release_frame(ihost, frame_index);
1741 return status;
1742 }
1743
1744 if (stp_req->sgl.index < 0) {
1745 ireq->saved_rx_frame_index = frame_index;
1746 stp_req->pio_len = 0;
1747 } else {
1748 sci_unsolicited_frame_control_get_buffer(&ihost->uf_control,
1749 frame_index,
1750 (void **)&frame_buffer);
1751
1752 status = sci_stp_request_pio_data_in_copy_data(stp_req,
1753 (u8 *)frame_buffer);
1754
1755 /* Frame is decoded return it to the controller */
1756 sci_controller_release_frame(ihost, frame_index);
1757 }
1758
1759 /* Check for the end of the transfer, are there more
1760 * bytes remaining for this data transfer
1761 */
1762 if (status != SCI_SUCCESS || stp_req->pio_len != 0)
1763 return status;
1764
1765 if ((stp_req->status & ATA_BUSY) == 0) {
1766 ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE;
1767 ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID;
1768 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1769 } else {
1770 sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME);
1771 }
1772 return status;
1773 }
1774
1775 case SCI_REQ_STP_SOFT_RESET_WAIT_D2H: {
1776 struct dev_to_host_fis *frame_header;
1777 u32 *frame_buffer;
1778
1779 status = sci_unsolicited_frame_control_get_header(&ihost->uf_control,
1780 frame_index,
1781 (void **)&frame_header);
1782 if (status != SCI_SUCCESS) {
1783 dev_err(&ihost->pdev->dev,
1784 "%s: SCIC IO Request 0x%p could not get frame "
1785 "header for frame index %d, status %x\n",
1786 __func__,
1787 stp_req,
1788 frame_index,
1789 status);
1790 return status;
1791 }
1792
1793 switch (frame_header->fis_type) {
1794 case FIS_REGD2H:
1795 sci_unsolicited_frame_control_get_buffer(&ihost->uf_control,
1796 frame_index,
1797 (void **)&frame_buffer);
1798
1799 sci_controller_copy_sata_response(&ireq->stp.rsp,
1800 frame_header,
1801 frame_buffer);
1802
1803 /* The command has completed with error */
1804 ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE;
1805 ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID;
1806 break;
1807
1808 default:
1809 dev_warn(&ihost->pdev->dev,
1810 "%s: IO Request:0x%p Frame Id:%d protocol "
1811 "violation occurred\n",
1812 __func__,
1813 stp_req,
1814 frame_index);
1815
1816 ireq->scu_status = SCU_TASK_DONE_UNEXP_FIS;
1817 ireq->sci_status = SCI_FAILURE_PROTOCOL_VIOLATION;
1818 break;
1819 }
1820
1821 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1822
1823 /* Frame has been decoded return it to the controller */
1824 sci_controller_release_frame(ihost, frame_index);
1825
1826 return status;
1827 }
1828 case SCI_REQ_ABORTING:
1829 /*
1830 * TODO: Is it even possible to get an unsolicited frame in the
1831 * aborting state?
1832 */
1833 sci_controller_release_frame(ihost, frame_index);
1834 return SCI_SUCCESS;
1835
1836 default:
1837 dev_warn(&ihost->pdev->dev,
1838 "%s: SCIC IO Request given unexpected frame %x while "
1839 "in state %d\n",
1840 __func__,
1841 frame_index,
1842 state);
1843
1844 sci_controller_release_frame(ihost, frame_index);
1845 return SCI_FAILURE_INVALID_STATE;
1846 }
1847}
1848
1849static enum sci_status stp_request_udma_await_tc_event(struct isci_request *ireq,
1850 u32 completion_code)
1851{
1852 enum sci_status status = SCI_SUCCESS;
1853
1854 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
1855 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD):
1856 ireq->scu_status = SCU_TASK_DONE_GOOD;
1857 ireq->sci_status = SCI_SUCCESS;
1858 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1859 break;
1860 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_FIS):
1861 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_REG_ERR):
1862 /* We must check ther response buffer to see if the D2H
1863 * Register FIS was received before we got the TC
1864 * completion.
1865 */
1866 if (ireq->stp.rsp.fis_type == FIS_REGD2H) {
1867 sci_remote_device_suspend(ireq->target_device,
1868 SCU_EVENT_SPECIFIC(SCU_NORMALIZE_COMPLETION_STATUS(completion_code)));
1869
1870 ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE;
1871 ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID;
1872 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1873 } else {
1874 /* If we have an error completion status for the
1875 * TC then we can expect a D2H register FIS from
1876 * the device so we must change state to wait
1877 * for it
1878 */
1879 sci_change_state(&ireq->sm, SCI_REQ_STP_UDMA_WAIT_D2H);
1880 }
1881 break;
1882
1883 /* TODO Check to see if any of these completion status need to
1884 * wait for the device to host register fis.
1885 */
1886 /* TODO We can retry the command for SCU_TASK_DONE_CMD_LL_R_ERR
1887 * - this comes only for B0
1888 */
1889 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_INV_FIS_LEN):
1890 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_MAX_PLD_ERR):
1891 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_R_ERR):
1892 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CMD_LL_R_ERR):
1893 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CRC_ERR):
1894 sci_remote_device_suspend(ireq->target_device,
1895 SCU_EVENT_SPECIFIC(SCU_NORMALIZE_COMPLETION_STATUS(completion_code)));
1896 /* Fall through to the default case */
1897 default:
1898 /* All other completion status cause the IO to be complete. */
1899 ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code);
1900 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1901 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1902 break;
1903 }
1904
1905 return status;
1906}
1907
1908static enum sci_status
1909stp_request_soft_reset_await_h2d_asserted_tc_event(struct isci_request *ireq,
1910 u32 completion_code)
1911{
1912 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
1913 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD):
1914 ireq->scu_status = SCU_TASK_DONE_GOOD;
1915 ireq->sci_status = SCI_SUCCESS;
1916 sci_change_state(&ireq->sm, SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG);
1917 break;
1918
1919 default:
1920 /*
1921 * All other completion status cause the IO to be complete.
1922 * If a NAK was received, then it is up to the user to retry
1923 * the request.
1924 */
1925 ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code);
1926 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1927 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1928 break;
1929 }
1930
1931 return SCI_SUCCESS;
1932}
1933
1934static enum sci_status
1935stp_request_soft_reset_await_h2d_diagnostic_tc_event(struct isci_request *ireq,
1936 u32 completion_code)
1937{
1938 switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) {
1939 case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD):
1940 ireq->scu_status = SCU_TASK_DONE_GOOD;
1941 ireq->sci_status = SCI_SUCCESS;
1942 sci_change_state(&ireq->sm, SCI_REQ_STP_SOFT_RESET_WAIT_D2H);
1943 break;
1944
1945 default:
1946 /* All other completion status cause the IO to be complete. If
1947 * a NAK was received, then it is up to the user to retry the
1948 * request.
1949 */
1950 ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code);
1951 ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
1952 sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
1953 break;
1954 }
1955
1956 return SCI_SUCCESS;
1957}
1958
1959enum sci_status
1960sci_io_request_tc_completion(struct isci_request *ireq,
1961 u32 completion_code)
1962{
1963 enum sci_base_request_states state;
1964 struct isci_host *ihost = ireq->owning_controller;
1965
1966 state = ireq->sm.current_state_id;
1967
1968 switch (state) {
1969 case SCI_REQ_STARTED:
1970 return request_started_state_tc_event(ireq, completion_code);
1971
1972 case SCI_REQ_TASK_WAIT_TC_COMP:
1973 return ssp_task_request_await_tc_event(ireq,
1974 completion_code);
1975
1976 case SCI_REQ_SMP_WAIT_RESP:
1977 return smp_request_await_response_tc_event(ireq,
1978 completion_code);
1979
1980 case SCI_REQ_SMP_WAIT_TC_COMP:
1981 return smp_request_await_tc_event(ireq, completion_code);
1982
1983 case SCI_REQ_STP_UDMA_WAIT_TC_COMP:
1984 return stp_request_udma_await_tc_event(ireq,
1985 completion_code);
1986
1987 case SCI_REQ_STP_NON_DATA_WAIT_H2D:
1988 return stp_request_non_data_await_h2d_tc_event(ireq,
1989 completion_code);
1990
1991 case SCI_REQ_STP_PIO_WAIT_H2D:
1992 return stp_request_pio_await_h2d_completion_tc_event(ireq,
1993 completion_code);
1994
1995 case SCI_REQ_STP_PIO_DATA_OUT:
1996 return pio_data_out_tx_done_tc_event(ireq, completion_code);
1997
1998 case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED:
1999 return stp_request_soft_reset_await_h2d_asserted_tc_event(ireq,
2000 completion_code);
2001
2002 case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG:
2003 return stp_request_soft_reset_await_h2d_diagnostic_tc_event(ireq,
2004 completion_code);
2005
2006 case SCI_REQ_ABORTING:
2007 return request_aborting_state_tc_event(ireq,
2008 completion_code);
2009
2010 default:
2011 dev_warn(&ihost->pdev->dev,
2012 "%s: SCIC IO Request given task completion "
2013 "notification %x while in wrong state %d\n",
2014 __func__,
2015 completion_code,
2016 state);
2017 return SCI_FAILURE_INVALID_STATE;
2018 }
2019}
2020
2021/**
2022 * isci_request_process_response_iu() - This function sets the status and
2023 * response iu, in the task struct, from the request object for the upper
2024 * layer driver.
2025 * @sas_task: This parameter is the task struct from the upper layer driver.
2026 * @resp_iu: This parameter points to the response iu of the completed request.
2027 * @dev: This parameter specifies the linux device struct.
2028 *
2029 * none.
2030 */
2031static void isci_request_process_response_iu(
2032 struct sas_task *task,
2033 struct ssp_response_iu *resp_iu,
2034 struct device *dev)
2035{
2036 dev_dbg(dev,
2037 "%s: resp_iu = %p "
2038 "resp_iu->status = 0x%x,\nresp_iu->datapres = %d "
2039 "resp_iu->response_data_len = %x, "
2040 "resp_iu->sense_data_len = %x\nrepsonse data: ",
2041 __func__,
2042 resp_iu,
2043 resp_iu->status,
2044 resp_iu->datapres,
2045 resp_iu->response_data_len,
2046 resp_iu->sense_data_len);
2047
2048 task->task_status.stat = resp_iu->status;
2049
2050 /* libsas updates the task status fields based on the response iu. */
2051 sas_ssp_task_response(dev, task, resp_iu);
2052}
2053
2054/**
2055 * isci_request_set_open_reject_status() - This function prepares the I/O
2056 * completion for OPEN_REJECT conditions.
2057 * @request: This parameter is the completed isci_request object.
2058 * @response_ptr: This parameter specifies the service response for the I/O.
2059 * @status_ptr: This parameter specifies the exec status for the I/O.
2060 * @complete_to_host_ptr: This parameter specifies the action to be taken by
2061 * the LLDD with respect to completing this request or forcing an abort
2062 * condition on the I/O.
2063 * @open_rej_reason: This parameter specifies the encoded reason for the
2064 * abandon-class reject.
2065 *
2066 * none.
2067 */
2068static void isci_request_set_open_reject_status(
2069 struct isci_request *request,
2070 struct sas_task *task,
2071 enum service_response *response_ptr,
2072 enum exec_status *status_ptr,
2073 enum isci_completion_selection *complete_to_host_ptr,
2074 enum sas_open_rej_reason open_rej_reason)
2075{
2076 /* Task in the target is done. */
2077 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2078 *response_ptr = SAS_TASK_UNDELIVERED;
2079 *status_ptr = SAS_OPEN_REJECT;
2080 *complete_to_host_ptr = isci_perform_normal_io_completion;
2081 task->task_status.open_rej_reason = open_rej_reason;
2082}
2083
2084/**
2085 * isci_request_handle_controller_specific_errors() - This function decodes
2086 * controller-specific I/O completion error conditions.
2087 * @request: This parameter is the completed isci_request object.
2088 * @response_ptr: This parameter specifies the service response for the I/O.
2089 * @status_ptr: This parameter specifies the exec status for the I/O.
2090 * @complete_to_host_ptr: This parameter specifies the action to be taken by
2091 * the LLDD with respect to completing this request or forcing an abort
2092 * condition on the I/O.
2093 *
2094 * none.
2095 */
2096static void isci_request_handle_controller_specific_errors(
2097 struct isci_remote_device *idev,
2098 struct isci_request *request,
2099 struct sas_task *task,
2100 enum service_response *response_ptr,
2101 enum exec_status *status_ptr,
2102 enum isci_completion_selection *complete_to_host_ptr)
2103{
2104 unsigned int cstatus;
2105
2106 cstatus = request->scu_status;
2107
2108 dev_dbg(&request->isci_host->pdev->dev,
2109 "%s: %p SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR "
2110 "- controller status = 0x%x\n",
2111 __func__, request, cstatus);
2112
2113 /* Decode the controller-specific errors; most
2114 * important is to recognize those conditions in which
2115 * the target may still have a task outstanding that
2116 * must be aborted.
2117 *
2118 * Note that there are SCU completion codes being
2119 * named in the decode below for which SCIC has already
2120 * done work to handle them in a way other than as
2121 * a controller-specific completion code; these are left
2122 * in the decode below for completeness sake.
2123 */
2124 switch (cstatus) {
2125 case SCU_TASK_DONE_DMASETUP_DIRERR:
2126 /* Also SCU_TASK_DONE_SMP_FRM_TYPE_ERR: */
2127 case SCU_TASK_DONE_XFERCNT_ERR:
2128 /* Also SCU_TASK_DONE_SMP_UFI_ERR: */
2129 if (task->task_proto == SAS_PROTOCOL_SMP) {
2130 /* SCU_TASK_DONE_SMP_UFI_ERR == Task Done. */
2131 *response_ptr = SAS_TASK_COMPLETE;
2132
2133 /* See if the device has been/is being stopped. Note
2134 * that we ignore the quiesce state, since we are
2135 * concerned about the actual device state.
2136 */
2137 if (!idev)
2138 *status_ptr = SAS_DEVICE_UNKNOWN;
2139 else
2140 *status_ptr = SAS_ABORTED_TASK;
2141
2142 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2143
2144 *complete_to_host_ptr =
2145 isci_perform_normal_io_completion;
2146 } else {
2147 /* Task in the target is not done. */
2148 *response_ptr = SAS_TASK_UNDELIVERED;
2149
2150 if (!idev)
2151 *status_ptr = SAS_DEVICE_UNKNOWN;
2152 else
2153 *status_ptr = SAM_STAT_TASK_ABORTED;
2154
2155 clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2156
2157 *complete_to_host_ptr =
2158 isci_perform_error_io_completion;
2159 }
2160
2161 break;
2162
2163 case SCU_TASK_DONE_CRC_ERR:
2164 case SCU_TASK_DONE_NAK_CMD_ERR:
2165 case SCU_TASK_DONE_EXCESS_DATA:
2166 case SCU_TASK_DONE_UNEXP_FIS:
2167 /* Also SCU_TASK_DONE_UNEXP_RESP: */
2168 case SCU_TASK_DONE_VIIT_ENTRY_NV: /* TODO - conditions? */
2169 case SCU_TASK_DONE_IIT_ENTRY_NV: /* TODO - conditions? */
2170 case SCU_TASK_DONE_RNCNV_OUTBOUND: /* TODO - conditions? */
2171 /* These are conditions in which the target
2172 * has completed the task, so that no cleanup
2173 * is necessary.
2174 */
2175 *response_ptr = SAS_TASK_COMPLETE;
2176
2177 /* See if the device has been/is being stopped. Note
2178 * that we ignore the quiesce state, since we are
2179 * concerned about the actual device state.
2180 */
2181 if (!idev)
2182 *status_ptr = SAS_DEVICE_UNKNOWN;
2183 else
2184 *status_ptr = SAS_ABORTED_TASK;
2185
2186 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2187
2188 *complete_to_host_ptr = isci_perform_normal_io_completion;
2189 break;
2190
2191
2192 /* Note that the only open reject completion codes seen here will be
2193 * abandon-class codes; all others are automatically retried in the SCU.
2194 */
2195 case SCU_TASK_OPEN_REJECT_WRONG_DESTINATION:
2196
2197 isci_request_set_open_reject_status(
2198 request, task, response_ptr, status_ptr,
2199 complete_to_host_ptr, SAS_OREJ_WRONG_DEST);
2200 break;
2201
2202 case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION:
2203
2204 /* Note - the return of AB0 will change when
2205 * libsas implements detection of zone violations.
2206 */
2207 isci_request_set_open_reject_status(
2208 request, task, response_ptr, status_ptr,
2209 complete_to_host_ptr, SAS_OREJ_RESV_AB0);
2210 break;
2211
2212 case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1:
2213
2214 isci_request_set_open_reject_status(
2215 request, task, response_ptr, status_ptr,
2216 complete_to_host_ptr, SAS_OREJ_RESV_AB1);
2217 break;
2218
2219 case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2:
2220
2221 isci_request_set_open_reject_status(
2222 request, task, response_ptr, status_ptr,
2223 complete_to_host_ptr, SAS_OREJ_RESV_AB2);
2224 break;
2225
2226 case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3:
2227
2228 isci_request_set_open_reject_status(
2229 request, task, response_ptr, status_ptr,
2230 complete_to_host_ptr, SAS_OREJ_RESV_AB3);
2231 break;
2232
2233 case SCU_TASK_OPEN_REJECT_BAD_DESTINATION:
2234
2235 isci_request_set_open_reject_status(
2236 request, task, response_ptr, status_ptr,
2237 complete_to_host_ptr, SAS_OREJ_BAD_DEST);
2238 break;
2239
2240 case SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY:
2241
2242 isci_request_set_open_reject_status(
2243 request, task, response_ptr, status_ptr,
2244 complete_to_host_ptr, SAS_OREJ_STP_NORES);
2245 break;
2246
2247 case SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED:
2248
2249 isci_request_set_open_reject_status(
2250 request, task, response_ptr, status_ptr,
2251 complete_to_host_ptr, SAS_OREJ_EPROTO);
2252 break;
2253
2254 case SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED:
2255
2256 isci_request_set_open_reject_status(
2257 request, task, response_ptr, status_ptr,
2258 complete_to_host_ptr, SAS_OREJ_CONN_RATE);
2259 break;
2260
2261 case SCU_TASK_DONE_LL_R_ERR:
2262 /* Also SCU_TASK_DONE_ACK_NAK_TO: */
2263 case SCU_TASK_DONE_LL_PERR:
2264 case SCU_TASK_DONE_LL_SY_TERM:
2265 /* Also SCU_TASK_DONE_NAK_ERR:*/
2266 case SCU_TASK_DONE_LL_LF_TERM:
2267 /* Also SCU_TASK_DONE_DATA_LEN_ERR: */
2268 case SCU_TASK_DONE_LL_ABORT_ERR:
2269 case SCU_TASK_DONE_SEQ_INV_TYPE:
2270 /* Also SCU_TASK_DONE_UNEXP_XR: */
2271 case SCU_TASK_DONE_XR_IU_LEN_ERR:
2272 case SCU_TASK_DONE_INV_FIS_LEN:
2273 /* Also SCU_TASK_DONE_XR_WD_LEN: */
2274 case SCU_TASK_DONE_SDMA_ERR:
2275 case SCU_TASK_DONE_OFFSET_ERR:
2276 case SCU_TASK_DONE_MAX_PLD_ERR:
2277 case SCU_TASK_DONE_LF_ERR:
2278 case SCU_TASK_DONE_SMP_RESP_TO_ERR: /* Escalate to dev reset? */
2279 case SCU_TASK_DONE_SMP_LL_RX_ERR:
2280 case SCU_TASK_DONE_UNEXP_DATA:
2281 case SCU_TASK_DONE_UNEXP_SDBFIS:
2282 case SCU_TASK_DONE_REG_ERR:
2283 case SCU_TASK_DONE_SDB_ERR:
2284 case SCU_TASK_DONE_TASK_ABORT:
2285 default:
2286 /* Task in the target is not done. */
2287 *response_ptr = SAS_TASK_UNDELIVERED;
2288 *status_ptr = SAM_STAT_TASK_ABORTED;
2289
2290 if (task->task_proto == SAS_PROTOCOL_SMP) {
2291 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2292
2293 *complete_to_host_ptr = isci_perform_normal_io_completion;
2294 } else {
2295 clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2296
2297 *complete_to_host_ptr = isci_perform_error_io_completion;
2298 }
2299 break;
2300 }
2301}
2302
2303/**
2304 * isci_task_save_for_upper_layer_completion() - This function saves the
2305 * request for later completion to the upper layer driver.
2306 * @host: This parameter is a pointer to the host on which the the request
2307 * should be queued (either as an error or success).
2308 * @request: This parameter is the completed request.
2309 * @response: This parameter is the response code for the completed task.
2310 * @status: This parameter is the status code for the completed task.
2311 *
2312 * none.
2313 */
2314static void isci_task_save_for_upper_layer_completion(
2315 struct isci_host *host,
2316 struct isci_request *request,
2317 enum service_response response,
2318 enum exec_status status,
2319 enum isci_completion_selection task_notification_selection)
2320{
2321 struct sas_task *task = isci_request_access_task(request);
2322
2323 task_notification_selection
2324 = isci_task_set_completion_status(task, response, status,
2325 task_notification_selection);
2326
2327 /* Tasks aborted specifically by a call to the lldd_abort_task
2328 * function should not be completed to the host in the regular path.
2329 */
2330 switch (task_notification_selection) {
2331
2332 case isci_perform_normal_io_completion:
2333
2334 /* Normal notification (task_done) */
2335 dev_dbg(&host->pdev->dev,
2336 "%s: Normal - task = %p, response=%d (%d), status=%d (%d)\n",
2337 __func__,
2338 task,
2339 task->task_status.resp, response,
2340 task->task_status.stat, status);
2341 /* Add to the completed list. */
2342 list_add(&request->completed_node,
2343 &host->requests_to_complete);
2344
2345 /* Take the request off the device's pending request list. */
2346 list_del_init(&request->dev_node);
2347 break;
2348
2349 case isci_perform_aborted_io_completion:
2350 /* No notification to libsas because this request is
2351 * already in the abort path.
2352 */
2353 dev_dbg(&host->pdev->dev,
2354 "%s: Aborted - task = %p, response=%d (%d), status=%d (%d)\n",
2355 __func__,
2356 task,
2357 task->task_status.resp, response,
2358 task->task_status.stat, status);
2359
2360 /* Wake up whatever process was waiting for this
2361 * request to complete.
2362 */
2363 WARN_ON(request->io_request_completion == NULL);
2364
2365 if (request->io_request_completion != NULL) {
2366
2367 /* Signal whoever is waiting that this
2368 * request is complete.
2369 */
2370 complete(request->io_request_completion);
2371 }
2372 break;
2373
2374 case isci_perform_error_io_completion:
2375 /* Use sas_task_abort */
2376 dev_dbg(&host->pdev->dev,
2377 "%s: Error - task = %p, response=%d (%d), status=%d (%d)\n",
2378 __func__,
2379 task,
2380 task->task_status.resp, response,
2381 task->task_status.stat, status);
2382 /* Add to the aborted list. */
2383 list_add(&request->completed_node,
2384 &host->requests_to_errorback);
2385 break;
2386
2387 default:
2388 dev_dbg(&host->pdev->dev,
2389 "%s: Unknown - task = %p, response=%d (%d), status=%d (%d)\n",
2390 __func__,
2391 task,
2392 task->task_status.resp, response,
2393 task->task_status.stat, status);
2394
2395 /* Add to the error to libsas list. */
2396 list_add(&request->completed_node,
2397 &host->requests_to_errorback);
2398 break;
2399 }
2400}
2401
2402static void isci_request_process_stp_response(struct sas_task *task,
2403 void *response_buffer)
2404{
2405 struct dev_to_host_fis *d2h_reg_fis = response_buffer;
2406 struct task_status_struct *ts = &task->task_status;
2407 struct ata_task_resp *resp = (void *)&ts->buf[0];
2408
2409 resp->frame_len = le16_to_cpu(*(__le16 *)(response_buffer + 6));
2410 memcpy(&resp->ending_fis[0], response_buffer + 16, 24);
2411 ts->buf_valid_size = sizeof(*resp);
2412
2413 /**
2414 * If the device fault bit is set in the status register, then
2415 * set the sense data and return.
2416 */
2417 if (d2h_reg_fis->status & ATA_DF)
2418 ts->stat = SAS_PROTO_RESPONSE;
2419 else
2420 ts->stat = SAM_STAT_GOOD;
2421
2422 ts->resp = SAS_TASK_COMPLETE;
2423}
2424
2425static void isci_request_io_request_complete(struct isci_host *ihost,
2426 struct isci_request *request,
2427 enum sci_io_status completion_status)
2428{
2429 struct sas_task *task = isci_request_access_task(request);
2430 struct ssp_response_iu *resp_iu;
2431 void *resp_buf;
2432 unsigned long task_flags;
2433 struct isci_remote_device *idev = isci_lookup_device(task->dev);
2434 enum service_response response = SAS_TASK_UNDELIVERED;
2435 enum exec_status status = SAS_ABORTED_TASK;
2436 enum isci_request_status request_status;
2437 enum isci_completion_selection complete_to_host
2438 = isci_perform_normal_io_completion;
2439
2440 dev_dbg(&ihost->pdev->dev,
2441 "%s: request = %p, task = %p,\n"
2442 "task->data_dir = %d completion_status = 0x%x\n",
2443 __func__,
2444 request,
2445 task,
2446 task->data_dir,
2447 completion_status);
2448
2449 spin_lock(&request->state_lock);
2450 request_status = request->status;
2451
2452 /* Decode the request status. Note that if the request has been
2453 * aborted by a task management function, we don't care
2454 * what the status is.
2455 */
2456 switch (request_status) {
2457
2458 case aborted:
2459 /* "aborted" indicates that the request was aborted by a task
2460 * management function, since once a task management request is
2461 * perfomed by the device, the request only completes because
2462 * of the subsequent driver terminate.
2463 *
2464 * Aborted also means an external thread is explicitly managing
2465 * this request, so that we do not complete it up the stack.
2466 *
2467 * The target is still there (since the TMF was successful).
2468 */
2469 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2470 response = SAS_TASK_COMPLETE;
2471
2472 /* See if the device has been/is being stopped. Note
2473 * that we ignore the quiesce state, since we are
2474 * concerned about the actual device state.
2475 */
2476 if (!idev)
2477 status = SAS_DEVICE_UNKNOWN;
2478 else
2479 status = SAS_ABORTED_TASK;
2480
2481 complete_to_host = isci_perform_aborted_io_completion;
2482 /* This was an aborted request. */
2483
2484 spin_unlock(&request->state_lock);
2485 break;
2486
2487 case aborting:
2488 /* aborting means that the task management function tried and
2489 * failed to abort the request. We need to note the request
2490 * as SAS_TASK_UNDELIVERED, so that the scsi mid layer marks the
2491 * target as down.
2492 *
2493 * Aborting also means an external thread is explicitly managing
2494 * this request, so that we do not complete it up the stack.
2495 */
2496 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2497 response = SAS_TASK_UNDELIVERED;
2498
2499 if (!idev)
2500 /* The device has been /is being stopped. Note that
2501 * we ignore the quiesce state, since we are
2502 * concerned about the actual device state.
2503 */
2504 status = SAS_DEVICE_UNKNOWN;
2505 else
2506 status = SAS_PHY_DOWN;
2507
2508 complete_to_host = isci_perform_aborted_io_completion;
2509
2510 /* This was an aborted request. */
2511
2512 spin_unlock(&request->state_lock);
2513 break;
2514
2515 case terminating:
2516
2517 /* This was an terminated request. This happens when
2518 * the I/O is being terminated because of an action on
2519 * the device (reset, tear down, etc.), and the I/O needs
2520 * to be completed up the stack.
2521 */
2522 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2523 response = SAS_TASK_UNDELIVERED;
2524
2525 /* See if the device has been/is being stopped. Note
2526 * that we ignore the quiesce state, since we are
2527 * concerned about the actual device state.
2528 */
2529 if (!idev)
2530 status = SAS_DEVICE_UNKNOWN;
2531 else
2532 status = SAS_ABORTED_TASK;
2533
2534 complete_to_host = isci_perform_aborted_io_completion;
2535
2536 /* This was a terminated request. */
2537
2538 spin_unlock(&request->state_lock);
2539 break;
2540
2541 case dead:
2542 /* This was a terminated request that timed-out during the
2543 * termination process. There is no task to complete to
2544 * libsas.
2545 */
2546 complete_to_host = isci_perform_normal_io_completion;
2547 spin_unlock(&request->state_lock);
2548 break;
2549
2550 default:
2551
2552 /* The request is done from an SCU HW perspective. */
2553 request->status = completed;
2554
2555 spin_unlock(&request->state_lock);
2556
2557 /* This is an active request being completed from the core. */
2558 switch (completion_status) {
2559
2560 case SCI_IO_FAILURE_RESPONSE_VALID:
2561 dev_dbg(&ihost->pdev->dev,
2562 "%s: SCI_IO_FAILURE_RESPONSE_VALID (%p/%p)\n",
2563 __func__,
2564 request,
2565 task);
2566
2567 if (sas_protocol_ata(task->task_proto)) {
2568 resp_buf = &request->stp.rsp;
2569 isci_request_process_stp_response(task,
2570 resp_buf);
2571 } else if (SAS_PROTOCOL_SSP == task->task_proto) {
2572
2573 /* crack the iu response buffer. */
2574 resp_iu = &request->ssp.rsp;
2575 isci_request_process_response_iu(task, resp_iu,
2576 &ihost->pdev->dev);
2577
2578 } else if (SAS_PROTOCOL_SMP == task->task_proto) {
2579
2580 dev_err(&ihost->pdev->dev,
2581 "%s: SCI_IO_FAILURE_RESPONSE_VALID: "
2582 "SAS_PROTOCOL_SMP protocol\n",
2583 __func__);
2584
2585 } else
2586 dev_err(&ihost->pdev->dev,
2587 "%s: unknown protocol\n", __func__);
2588
2589 /* use the task status set in the task struct by the
2590 * isci_request_process_response_iu call.
2591 */
2592 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2593 response = task->task_status.resp;
2594 status = task->task_status.stat;
2595 break;
2596
2597 case SCI_IO_SUCCESS:
2598 case SCI_IO_SUCCESS_IO_DONE_EARLY:
2599
2600 response = SAS_TASK_COMPLETE;
2601 status = SAM_STAT_GOOD;
2602 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2603
2604 if (task->task_proto == SAS_PROTOCOL_SMP) {
2605 void *rsp = &request->smp.rsp;
2606
2607 dev_dbg(&ihost->pdev->dev,
2608 "%s: SMP protocol completion\n",
2609 __func__);
2610
2611 sg_copy_from_buffer(
2612 &task->smp_task.smp_resp, 1,
2613 rsp, sizeof(struct smp_resp));
2614 } else if (completion_status
2615 == SCI_IO_SUCCESS_IO_DONE_EARLY) {
2616
2617 /* This was an SSP / STP / SATA transfer.
2618 * There is a possibility that less data than
2619 * the maximum was transferred.
2620 */
2621 u32 transferred_length = sci_req_tx_bytes(request);
2622
2623 task->task_status.residual
2624 = task->total_xfer_len - transferred_length;
2625
2626 /* If there were residual bytes, call this an
2627 * underrun.
2628 */
2629 if (task->task_status.residual != 0)
2630 status = SAS_DATA_UNDERRUN;
2631
2632 dev_dbg(&ihost->pdev->dev,
2633 "%s: SCI_IO_SUCCESS_IO_DONE_EARLY %d\n",
2634 __func__,
2635 status);
2636
2637 } else
2638 dev_dbg(&ihost->pdev->dev,
2639 "%s: SCI_IO_SUCCESS\n",
2640 __func__);
2641
2642 break;
2643
2644 case SCI_IO_FAILURE_TERMINATED:
2645 dev_dbg(&ihost->pdev->dev,
2646 "%s: SCI_IO_FAILURE_TERMINATED (%p/%p)\n",
2647 __func__,
2648 request,
2649 task);
2650
2651 /* The request was terminated explicitly. No handling
2652 * is needed in the SCSI error handler path.
2653 */
2654 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2655 response = SAS_TASK_UNDELIVERED;
2656
2657 /* See if the device has been/is being stopped. Note
2658 * that we ignore the quiesce state, since we are
2659 * concerned about the actual device state.
2660 */
2661 if (!idev)
2662 status = SAS_DEVICE_UNKNOWN;
2663 else
2664 status = SAS_ABORTED_TASK;
2665
2666 complete_to_host = isci_perform_normal_io_completion;
2667 break;
2668
2669 case SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR:
2670
2671 isci_request_handle_controller_specific_errors(
2672 idev, request, task, &response, &status,
2673 &complete_to_host);
2674
2675 break;
2676
2677 case SCI_IO_FAILURE_REMOTE_DEVICE_RESET_REQUIRED:
2678 /* This is a special case, in that the I/O completion
2679 * is telling us that the device needs a reset.
2680 * In order for the device reset condition to be
2681 * noticed, the I/O has to be handled in the error
2682 * handler. Set the reset flag and cause the
2683 * SCSI error thread to be scheduled.
2684 */
2685 spin_lock_irqsave(&task->task_state_lock, task_flags);
2686 task->task_state_flags |= SAS_TASK_NEED_DEV_RESET;
2687 spin_unlock_irqrestore(&task->task_state_lock, task_flags);
2688
2689 /* Fail the I/O. */
2690 response = SAS_TASK_UNDELIVERED;
2691 status = SAM_STAT_TASK_ABORTED;
2692
2693 complete_to_host = isci_perform_error_io_completion;
2694 clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2695 break;
2696
2697 case SCI_FAILURE_RETRY_REQUIRED:
2698
2699 /* Fail the I/O so it can be retried. */
2700 response = SAS_TASK_UNDELIVERED;
2701 if (!idev)
2702 status = SAS_DEVICE_UNKNOWN;
2703 else
2704 status = SAS_ABORTED_TASK;
2705
2706 complete_to_host = isci_perform_normal_io_completion;
2707 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2708 break;
2709
2710
2711 default:
2712 /* Catch any otherwise unhandled error codes here. */
2713 dev_dbg(&ihost->pdev->dev,
2714 "%s: invalid completion code: 0x%x - "
2715 "isci_request = %p\n",
2716 __func__, completion_status, request);
2717
2718 response = SAS_TASK_UNDELIVERED;
2719
2720 /* See if the device has been/is being stopped. Note
2721 * that we ignore the quiesce state, since we are
2722 * concerned about the actual device state.
2723 */
2724 if (!idev)
2725 status = SAS_DEVICE_UNKNOWN;
2726 else
2727 status = SAS_ABORTED_TASK;
2728
2729 if (SAS_PROTOCOL_SMP == task->task_proto) {
2730 set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2731 complete_to_host = isci_perform_normal_io_completion;
2732 } else {
2733 clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags);
2734 complete_to_host = isci_perform_error_io_completion;
2735 }
2736 break;
2737 }
2738 break;
2739 }
2740
2741 switch (task->task_proto) {
2742 case SAS_PROTOCOL_SSP:
2743 if (task->data_dir == DMA_NONE)
2744 break;
2745 if (task->num_scatter == 0)
2746 /* 0 indicates a single dma address */
2747 dma_unmap_single(&ihost->pdev->dev,
2748 request->zero_scatter_daddr,
2749 task->total_xfer_len, task->data_dir);
2750 else /* unmap the sgl dma addresses */
2751 dma_unmap_sg(&ihost->pdev->dev, task->scatter,
2752 request->num_sg_entries, task->data_dir);
2753 break;
2754 case SAS_PROTOCOL_SMP: {
2755 struct scatterlist *sg = &task->smp_task.smp_req;
2756 struct smp_req *smp_req;
2757 void *kaddr;
2758
2759 dma_unmap_sg(&ihost->pdev->dev, sg, 1, DMA_TO_DEVICE);
2760
2761 /* need to swab it back in case the command buffer is re-used */
2762 kaddr = kmap_atomic(sg_page(sg), KM_IRQ0);
2763 smp_req = kaddr + sg->offset;
2764 sci_swab32_cpy(smp_req, smp_req, sg->length / sizeof(u32));
2765 kunmap_atomic(kaddr, KM_IRQ0);
2766 break;
2767 }
2768 default:
2769 break;
2770 }
2771
2772 /* Put the completed request on the correct list */
2773 isci_task_save_for_upper_layer_completion(ihost, request, response,
2774 status, complete_to_host
2775 );
2776
2777 /* complete the io request to the core. */
2778 sci_controller_complete_io(ihost, request->target_device, request);
2779 isci_put_device(idev);
2780
2781 /* set terminated handle so it cannot be completed or
2782 * terminated again, and to cause any calls into abort
2783 * task to recognize the already completed case.
2784 */
2785 set_bit(IREQ_TERMINATED, &request->flags);
2786}
2787
2788static void sci_request_started_state_enter(struct sci_base_state_machine *sm)
2789{
2790 struct isci_request *ireq = container_of(sm, typeof(*ireq), sm);
2791 struct domain_device *dev = ireq->target_device->domain_dev;
2792 struct sas_task *task;
2793
2794 /* XXX as hch said always creating an internal sas_task for tmf
2795 * requests would simplify the driver
2796 */
2797 task = ireq->ttype == io_task ? isci_request_access_task(ireq) : NULL;
2798
2799 /* all unaccelerated request types (non ssp or ncq) handled with
2800 * substates
2801 */
2802 if (!task && dev->dev_type == SAS_END_DEV) {
2803 sci_change_state(sm, SCI_REQ_TASK_WAIT_TC_COMP);
2804 } else if (!task &&
2805 (isci_request_access_tmf(ireq)->tmf_code == isci_tmf_sata_srst_high ||
2806 isci_request_access_tmf(ireq)->tmf_code == isci_tmf_sata_srst_low)) {
2807 sci_change_state(sm, SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED);
2808 } else if (task && task->task_proto == SAS_PROTOCOL_SMP) {
2809 sci_change_state(sm, SCI_REQ_SMP_WAIT_RESP);
2810 } else if (task && sas_protocol_ata(task->task_proto) &&
2811 !task->ata_task.use_ncq) {
2812 u32 state;
2813
2814 if (task->data_dir == DMA_NONE)
2815 state = SCI_REQ_STP_NON_DATA_WAIT_H2D;
2816 else if (task->ata_task.dma_xfer)
2817 state = SCI_REQ_STP_UDMA_WAIT_TC_COMP;
2818 else /* PIO */
2819 state = SCI_REQ_STP_PIO_WAIT_H2D;
2820
2821 sci_change_state(sm, state);
2822 }
2823}
2824
2825static void sci_request_completed_state_enter(struct sci_base_state_machine *sm)
2826{
2827 struct isci_request *ireq = container_of(sm, typeof(*ireq), sm);
2828 struct isci_host *ihost = ireq->owning_controller;
2829
2830 /* Tell the SCI_USER that the IO request is complete */
2831 if (!test_bit(IREQ_TMF, &ireq->flags))
2832 isci_request_io_request_complete(ihost, ireq,
2833 ireq->sci_status);
2834 else
2835 isci_task_request_complete(ihost, ireq, ireq->sci_status);
2836}
2837
2838static void sci_request_aborting_state_enter(struct sci_base_state_machine *sm)
2839{
2840 struct isci_request *ireq = container_of(sm, typeof(*ireq), sm);
2841
2842 /* Setting the abort bit in the Task Context is required by the silicon. */
2843 ireq->tc->abort = 1;
2844}
2845
2846static void sci_stp_request_started_non_data_await_h2d_completion_enter(struct sci_base_state_machine *sm)
2847{
2848 struct isci_request *ireq = container_of(sm, typeof(*ireq), sm);
2849
2850 ireq->target_device->working_request = ireq;
2851}
2852
2853static void sci_stp_request_started_pio_await_h2d_completion_enter(struct sci_base_state_machine *sm)
2854{
2855 struct isci_request *ireq = container_of(sm, typeof(*ireq), sm);
2856
2857 ireq->target_device->working_request = ireq;
2858}
2859
2860static void sci_stp_request_started_soft_reset_await_h2d_asserted_completion_enter(struct sci_base_state_machine *sm)
2861{
2862 struct isci_request *ireq = container_of(sm, typeof(*ireq), sm);
2863
2864 ireq->target_device->working_request = ireq;
2865}
2866
2867static void sci_stp_request_started_soft_reset_await_h2d_diagnostic_completion_enter(struct sci_base_state_machine *sm)
2868{
2869 struct isci_request *ireq = container_of(sm, typeof(*ireq), sm);
2870 struct scu_task_context *tc = ireq->tc;
2871 struct host_to_dev_fis *h2d_fis;
2872 enum sci_status status;
2873
2874 /* Clear the SRST bit */
2875 h2d_fis = &ireq->stp.cmd;
2876 h2d_fis->control = 0;
2877
2878 /* Clear the TC control bit */
2879 tc->control_frame = 0;
2880
2881 status = sci_controller_continue_io(ireq);
2882 WARN_ONCE(status != SCI_SUCCESS, "isci: continue io failure\n");
2883}
2884
2885static const struct sci_base_state sci_request_state_table[] = {
2886 [SCI_REQ_INIT] = { },
2887 [SCI_REQ_CONSTRUCTED] = { },
2888 [SCI_REQ_STARTED] = {
2889 .enter_state = sci_request_started_state_enter,
2890 },
2891 [SCI_REQ_STP_NON_DATA_WAIT_H2D] = {
2892 .enter_state = sci_stp_request_started_non_data_await_h2d_completion_enter,
2893 },
2894 [SCI_REQ_STP_NON_DATA_WAIT_D2H] = { },
2895 [SCI_REQ_STP_PIO_WAIT_H2D] = {
2896 .enter_state = sci_stp_request_started_pio_await_h2d_completion_enter,
2897 },
2898 [SCI_REQ_STP_PIO_WAIT_FRAME] = { },
2899 [SCI_REQ_STP_PIO_DATA_IN] = { },
2900 [SCI_REQ_STP_PIO_DATA_OUT] = { },
2901 [SCI_REQ_STP_UDMA_WAIT_TC_COMP] = { },
2902 [SCI_REQ_STP_UDMA_WAIT_D2H] = { },
2903 [SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED] = {
2904 .enter_state = sci_stp_request_started_soft_reset_await_h2d_asserted_completion_enter,
2905 },
2906 [SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG] = {
2907 .enter_state = sci_stp_request_started_soft_reset_await_h2d_diagnostic_completion_enter,
2908 },
2909 [SCI_REQ_STP_SOFT_RESET_WAIT_D2H] = { },
2910 [SCI_REQ_TASK_WAIT_TC_COMP] = { },
2911 [SCI_REQ_TASK_WAIT_TC_RESP] = { },
2912 [SCI_REQ_SMP_WAIT_RESP] = { },
2913 [SCI_REQ_SMP_WAIT_TC_COMP] = { },
2914 [SCI_REQ_COMPLETED] = {
2915 .enter_state = sci_request_completed_state_enter,
2916 },
2917 [SCI_REQ_ABORTING] = {
2918 .enter_state = sci_request_aborting_state_enter,
2919 },
2920 [SCI_REQ_FINAL] = { },
2921};
2922
2923static void
2924sci_general_request_construct(struct isci_host *ihost,
2925 struct isci_remote_device *idev,
2926 struct isci_request *ireq)
2927{
2928 sci_init_sm(&ireq->sm, sci_request_state_table, SCI_REQ_INIT);
2929
2930 ireq->target_device = idev;
2931 ireq->protocol = SCIC_NO_PROTOCOL;
2932 ireq->saved_rx_frame_index = SCU_INVALID_FRAME_INDEX;
2933
2934 ireq->sci_status = SCI_SUCCESS;
2935 ireq->scu_status = 0;
2936 ireq->post_context = 0xFFFFFFFF;
2937}
2938
2939static enum sci_status
2940sci_io_request_construct(struct isci_host *ihost,
2941 struct isci_remote_device *idev,
2942 struct isci_request *ireq)
2943{
2944 struct domain_device *dev = idev->domain_dev;
2945 enum sci_status status = SCI_SUCCESS;
2946
2947 /* Build the common part of the request */
2948 sci_general_request_construct(ihost, idev, ireq);
2949
2950 if (idev->rnc.remote_node_index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX)
2951 return SCI_FAILURE_INVALID_REMOTE_DEVICE;
2952
2953 if (dev->dev_type == SAS_END_DEV)
2954 /* pass */;
2955 else if (dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP))
2956 memset(&ireq->stp.cmd, 0, sizeof(ireq->stp.cmd));
2957 else if (dev_is_expander(dev))
2958 /* pass */;
2959 else
2960 return SCI_FAILURE_UNSUPPORTED_PROTOCOL;
2961
2962 memset(ireq->tc, 0, offsetof(struct scu_task_context, sgl_pair_ab));
2963
2964 return status;
2965}
2966
2967enum sci_status sci_task_request_construct(struct isci_host *ihost,
2968 struct isci_remote_device *idev,
2969 u16 io_tag, struct isci_request *ireq)
2970{
2971 struct domain_device *dev = idev->domain_dev;
2972 enum sci_status status = SCI_SUCCESS;
2973
2974 /* Build the common part of the request */
2975 sci_general_request_construct(ihost, idev, ireq);
2976
2977 if (dev->dev_type == SAS_END_DEV ||
2978 dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) {
2979 set_bit(IREQ_TMF, &ireq->flags);
2980 memset(ireq->tc, 0, sizeof(struct scu_task_context));
2981 } else
2982 status = SCI_FAILURE_UNSUPPORTED_PROTOCOL;
2983
2984 return status;
2985}
2986
2987static enum sci_status isci_request_ssp_request_construct(
2988 struct isci_request *request)
2989{
2990 enum sci_status status;
2991
2992 dev_dbg(&request->isci_host->pdev->dev,
2993 "%s: request = %p\n",
2994 __func__,
2995 request);
2996 status = sci_io_request_construct_basic_ssp(request);
2997 return status;
2998}
2999
3000static enum sci_status isci_request_stp_request_construct(struct isci_request *ireq)
3001{
3002 struct sas_task *task = isci_request_access_task(ireq);
3003 struct host_to_dev_fis *fis = &ireq->stp.cmd;
3004 struct ata_queued_cmd *qc = task->uldd_task;
3005 enum sci_status status;
3006
3007 dev_dbg(&ireq->isci_host->pdev->dev,
3008 "%s: ireq = %p\n",
3009 __func__,
3010 ireq);
3011
3012 memcpy(fis, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
3013 if (!task->ata_task.device_control_reg_update)
3014 fis->flags |= 0x80;
3015 fis->flags &= 0xF0;
3016
3017 status = sci_io_request_construct_basic_sata(ireq);
3018
3019 if (qc && (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
3020 qc->tf.command == ATA_CMD_FPDMA_READ)) {
3021 fis->sector_count = qc->tag << 3;
3022 ireq->tc->type.stp.ncq_tag = qc->tag;
3023 }
3024
3025 return status;
3026}
3027
3028static enum sci_status
3029sci_io_request_construct_smp(struct device *dev,
3030 struct isci_request *ireq,
3031 struct sas_task *task)
3032{
3033 struct scatterlist *sg = &task->smp_task.smp_req;
3034 struct isci_remote_device *idev;
3035 struct scu_task_context *task_context;
3036 struct isci_port *iport;
3037 struct smp_req *smp_req;
3038 void *kaddr;
3039 u8 req_len;
3040 u32 cmd;
3041
3042 kaddr = kmap_atomic(sg_page(sg), KM_IRQ0);
3043 smp_req = kaddr + sg->offset;
3044 /*
3045 * Look at the SMP requests' header fields; for certain SAS 1.x SMP
3046 * functions under SAS 2.0, a zero request length really indicates
3047 * a non-zero default length.
3048 */
3049 if (smp_req->req_len == 0) {
3050 switch (smp_req->func) {
3051 case SMP_DISCOVER:
3052 case SMP_REPORT_PHY_ERR_LOG:
3053 case SMP_REPORT_PHY_SATA:
3054 case SMP_REPORT_ROUTE_INFO:
3055 smp_req->req_len = 2;
3056 break;
3057 case SMP_CONF_ROUTE_INFO:
3058 case SMP_PHY_CONTROL:
3059 case SMP_PHY_TEST_FUNCTION:
3060 smp_req->req_len = 9;
3061 break;
3062 /* Default - zero is a valid default for 2.0. */
3063 }
3064 }
3065 req_len = smp_req->req_len;
3066 sci_swab32_cpy(smp_req, smp_req, sg->length / sizeof(u32));
3067 cmd = *(u32 *) smp_req;
3068 kunmap_atomic(kaddr, KM_IRQ0);
3069
3070 if (!dma_map_sg(dev, sg, 1, DMA_TO_DEVICE))
3071 return SCI_FAILURE;
3072
3073 ireq->protocol = SCIC_SMP_PROTOCOL;
3074
3075 /* byte swap the smp request. */
3076
3077 task_context = ireq->tc;
3078
3079 idev = ireq->target_device;
3080 iport = idev->owning_port;
3081
3082 /*
3083 * Fill in the TC with the its required data
3084 * 00h
3085 */
3086 task_context->priority = 0;
3087 task_context->initiator_request = 1;
3088 task_context->connection_rate = idev->connection_rate;
3089 task_context->protocol_engine_index = ISCI_PEG;
3090 task_context->logical_port_index = iport->physical_port_index;
3091 task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SMP;
3092 task_context->abort = 0;
3093 task_context->valid = SCU_TASK_CONTEXT_VALID;
3094 task_context->context_type = SCU_TASK_CONTEXT_TYPE;
3095
3096 /* 04h */
3097 task_context->remote_node_index = idev->rnc.remote_node_index;
3098 task_context->command_code = 0;
3099 task_context->task_type = SCU_TASK_TYPE_SMP_REQUEST;
3100
3101 /* 08h */
3102 task_context->link_layer_control = 0;
3103 task_context->do_not_dma_ssp_good_response = 1;
3104 task_context->strict_ordering = 0;
3105 task_context->control_frame = 1;
3106 task_context->timeout_enable = 0;
3107 task_context->block_guard_enable = 0;
3108
3109 /* 0ch */
3110 task_context->address_modifier = 0;
3111
3112 /* 10h */
3113 task_context->ssp_command_iu_length = req_len;
3114
3115 /* 14h */
3116 task_context->transfer_length_bytes = 0;
3117
3118 /*
3119 * 18h ~ 30h, protocol specific
3120 * since commandIU has been build by framework at this point, we just
3121 * copy the frist DWord from command IU to this location. */
3122 memcpy(&task_context->type.smp, &cmd, sizeof(u32));
3123
3124 /*
3125 * 40h
3126 * "For SMP you could program it to zero. We would prefer that way
3127 * so that done code will be consistent." - Venki
3128 */
3129 task_context->task_phase = 0;
3130
3131 ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC |
3132 (ISCI_PEG << SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) |
3133 (iport->physical_port_index <<
3134 SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) |
3135 ISCI_TAG_TCI(ireq->io_tag));
3136 /*
3137 * Copy the physical address for the command buffer to the SCU Task
3138 * Context command buffer should not contain command header.
3139 */
3140 task_context->command_iu_upper = upper_32_bits(sg_dma_address(sg));
3141 task_context->command_iu_lower = lower_32_bits(sg_dma_address(sg) + sizeof(u32));
3142
3143 /* SMP response comes as UF, so no need to set response IU address. */
3144 task_context->response_iu_upper = 0;
3145 task_context->response_iu_lower = 0;
3146
3147 sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED);
3148
3149 return SCI_SUCCESS;
3150}
3151
3152/*
3153 * isci_smp_request_build() - This function builds the smp request.
3154 * @ireq: This parameter points to the isci_request allocated in the
3155 * request construct function.
3156 *
3157 * SCI_SUCCESS on successfull completion, or specific failure code.
3158 */
3159static enum sci_status isci_smp_request_build(struct isci_request *ireq)
3160{
3161 struct sas_task *task = isci_request_access_task(ireq);
3162 struct device *dev = &ireq->isci_host->pdev->dev;
3163 enum sci_status status = SCI_FAILURE;
3164
3165 status = sci_io_request_construct_smp(dev, ireq, task);
3166 if (status != SCI_SUCCESS)
3167 dev_dbg(&ireq->isci_host->pdev->dev,
3168 "%s: failed with status = %d\n",
3169 __func__,
3170 status);
3171
3172 return status;
3173}
3174
3175/**
3176 * isci_io_request_build() - This function builds the io request object.
3177 * @ihost: This parameter specifies the ISCI host object
3178 * @request: This parameter points to the isci_request object allocated in the
3179 * request construct function.
3180 * @sci_device: This parameter is the handle for the sci core's remote device
3181 * object that is the destination for this request.
3182 *
3183 * SCI_SUCCESS on successfull completion, or specific failure code.
3184 */
3185static enum sci_status isci_io_request_build(struct isci_host *ihost,
3186 struct isci_request *request,
3187 struct isci_remote_device *idev)
3188{
3189 enum sci_status status = SCI_SUCCESS;
3190 struct sas_task *task = isci_request_access_task(request);
3191
3192 dev_dbg(&ihost->pdev->dev,
3193 "%s: idev = 0x%p; request = %p, "
3194 "num_scatter = %d\n",
3195 __func__,
3196 idev,
3197 request,
3198 task->num_scatter);
3199
3200 /* map the sgl addresses, if present.
3201 * libata does the mapping for sata devices
3202 * before we get the request.
3203 */
3204 if (task->num_scatter &&
3205 !sas_protocol_ata(task->task_proto) &&
3206 !(SAS_PROTOCOL_SMP & task->task_proto)) {
3207
3208 request->num_sg_entries = dma_map_sg(
3209 &ihost->pdev->dev,
3210 task->scatter,
3211 task->num_scatter,
3212 task->data_dir
3213 );
3214
3215 if (request->num_sg_entries == 0)
3216 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
3217 }
3218
3219 status = sci_io_request_construct(ihost, idev, request);
3220
3221 if (status != SCI_SUCCESS) {
3222 dev_dbg(&ihost->pdev->dev,
3223 "%s: failed request construct\n",
3224 __func__);
3225 return SCI_FAILURE;
3226 }
3227
3228 switch (task->task_proto) {
3229 case SAS_PROTOCOL_SMP:
3230 status = isci_smp_request_build(request);
3231 break;
3232 case SAS_PROTOCOL_SSP:
3233 status = isci_request_ssp_request_construct(request);
3234 break;
3235 case SAS_PROTOCOL_SATA:
3236 case SAS_PROTOCOL_STP:
3237 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
3238 status = isci_request_stp_request_construct(request);
3239 break;
3240 default:
3241 dev_dbg(&ihost->pdev->dev,
3242 "%s: unknown protocol\n", __func__);
3243 return SCI_FAILURE;
3244 }
3245
3246 return SCI_SUCCESS;
3247}
3248
3249static struct isci_request *isci_request_from_tag(struct isci_host *ihost, u16 tag)
3250{
3251 struct isci_request *ireq;
3252
3253 ireq = ihost->reqs[ISCI_TAG_TCI(tag)];
3254 ireq->io_tag = tag;
3255 ireq->io_request_completion = NULL;
3256 ireq->flags = 0;
3257 ireq->num_sg_entries = 0;
3258 INIT_LIST_HEAD(&ireq->completed_node);
3259 INIT_LIST_HEAD(&ireq->dev_node);
3260 isci_request_change_state(ireq, allocated);
3261
3262 return ireq;
3263}
3264
3265static struct isci_request *isci_io_request_from_tag(struct isci_host *ihost,
3266 struct sas_task *task,
3267 u16 tag)
3268{
3269 struct isci_request *ireq;
3270
3271 ireq = isci_request_from_tag(ihost, tag);
3272 ireq->ttype_ptr.io_task_ptr = task;
3273 ireq->ttype = io_task;
3274 task->lldd_task = ireq;
3275
3276 return ireq;
3277}
3278
3279struct isci_request *isci_tmf_request_from_tag(struct isci_host *ihost,
3280 struct isci_tmf *isci_tmf,
3281 u16 tag)
3282{
3283 struct isci_request *ireq;
3284
3285 ireq = isci_request_from_tag(ihost, tag);
3286 ireq->ttype_ptr.tmf_task_ptr = isci_tmf;
3287 ireq->ttype = tmf_task;
3288
3289 return ireq;
3290}
3291
3292int isci_request_execute(struct isci_host *ihost, struct isci_remote_device *idev,
3293 struct sas_task *task, u16 tag)
3294{
3295 enum sci_status status = SCI_FAILURE_UNSUPPORTED_PROTOCOL;
3296 struct isci_request *ireq;
3297 unsigned long flags;
3298 int ret = 0;
3299
3300 /* do common allocation and init of request object. */
3301 ireq = isci_io_request_from_tag(ihost, task, tag);
3302
3303 status = isci_io_request_build(ihost, ireq, idev);
3304 if (status != SCI_SUCCESS) {
3305 dev_dbg(&ihost->pdev->dev,
3306 "%s: request_construct failed - status = 0x%x\n",
3307 __func__,
3308 status);
3309 return status;
3310 }
3311
3312 spin_lock_irqsave(&ihost->scic_lock, flags);
3313
3314 if (test_bit(IDEV_IO_NCQERROR, &idev->flags)) {
3315
3316 if (isci_task_is_ncq_recovery(task)) {
3317
3318 /* The device is in an NCQ recovery state. Issue the
3319 * request on the task side. Note that it will
3320 * complete on the I/O request side because the
3321 * request was built that way (ie.
3322 * ireq->is_task_management_request is false).
3323 */
3324 status = sci_controller_start_task(ihost,
3325 idev,
3326 ireq);
3327 } else {
3328 status = SCI_FAILURE;
3329 }
3330 } else {
3331 /* send the request, let the core assign the IO TAG. */
3332 status = sci_controller_start_io(ihost, idev,
3333 ireq);
3334 }
3335
3336 if (status != SCI_SUCCESS &&
3337 status != SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED) {
3338 dev_dbg(&ihost->pdev->dev,
3339 "%s: failed request start (0x%x)\n",
3340 __func__, status);
3341 spin_unlock_irqrestore(&ihost->scic_lock, flags);
3342 return status;
3343 }
3344
3345 /* Either I/O started OK, or the core has signaled that
3346 * the device needs a target reset.
3347 *
3348 * In either case, hold onto the I/O for later.
3349 *
3350 * Update it's status and add it to the list in the
3351 * remote device object.
3352 */
3353 list_add(&ireq->dev_node, &idev->reqs_in_process);
3354
3355 if (status == SCI_SUCCESS) {
3356 isci_request_change_state(ireq, started);
3357 } else {
3358 /* The request did not really start in the
3359 * hardware, so clear the request handle
3360 * here so no terminations will be done.
3361 */
3362 set_bit(IREQ_TERMINATED, &ireq->flags);
3363 isci_request_change_state(ireq, completed);
3364 }
3365 spin_unlock_irqrestore(&ihost->scic_lock, flags);
3366
3367 if (status ==
3368 SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED) {
3369 /* Signal libsas that we need the SCSI error
3370 * handler thread to work on this I/O and that
3371 * we want a device reset.
3372 */
3373 spin_lock_irqsave(&task->task_state_lock, flags);
3374 task->task_state_flags |= SAS_TASK_NEED_DEV_RESET;
3375 spin_unlock_irqrestore(&task->task_state_lock, flags);
3376
3377 /* Cause this task to be scheduled in the SCSI error
3378 * handler thread.
3379 */
3380 isci_execpath_callback(ihost, task,
3381 sas_task_abort);
3382
3383 /* Change the status, since we are holding
3384 * the I/O until it is managed by the SCSI
3385 * error handler.
3386 */
3387 status = SCI_SUCCESS;
3388 }
3389
3390 return ret;
3391}
diff --git a/drivers/scsi/isci/request.h b/drivers/scsi/isci/request.h
new file mode 100644
index 000000000000..7a1d5a9778eb
--- /dev/null
+++ b/drivers/scsi/isci/request.h
@@ -0,0 +1,448 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _ISCI_REQUEST_H_
57#define _ISCI_REQUEST_H_
58
59#include "isci.h"
60#include "host.h"
61#include "scu_task_context.h"
62
63/**
64 * struct isci_request_status - This enum defines the possible states of an I/O
65 * request.
66 *
67 *
68 */
69enum isci_request_status {
70 unallocated = 0x00,
71 allocated = 0x01,
72 started = 0x02,
73 completed = 0x03,
74 aborting = 0x04,
75 aborted = 0x05,
76 terminating = 0x06,
77 dead = 0x07
78};
79
80enum task_type {
81 io_task = 0,
82 tmf_task = 1
83};
84
85enum sci_request_protocol {
86 SCIC_NO_PROTOCOL,
87 SCIC_SMP_PROTOCOL,
88 SCIC_SSP_PROTOCOL,
89 SCIC_STP_PROTOCOL
90}; /* XXX remove me, use sas_task.{dev|task_proto} instead */;
91
92/**
93 * isci_stp_request - extra request infrastructure to handle pio/atapi protocol
94 * @pio_len - number of bytes requested at PIO setup
95 * @status - pio setup ending status value to tell us if we need
96 * to wait for another fis or if the transfer is complete. Upon
97 * receipt of a d2h fis this will be the status field of that fis.
98 * @sgl - track pio transfer progress as we iterate through the sgl
99 * @device_cdb_len - atapi device advertises it's transfer constraints at setup
100 */
101struct isci_stp_request {
102 u32 pio_len;
103 u8 status;
104
105 struct isci_stp_pio_sgl {
106 int index;
107 u8 set;
108 u32 offset;
109 } sgl;
110 u32 device_cdb_len;
111};
112
113struct isci_request {
114 enum isci_request_status status;
115 #define IREQ_COMPLETE_IN_TARGET 0
116 #define IREQ_TERMINATED 1
117 #define IREQ_TMF 2
118 #define IREQ_ACTIVE 3
119 unsigned long flags;
120 /* XXX kill ttype and ttype_ptr, allocate full sas_task */
121 enum task_type ttype;
122 union ttype_ptr_union {
123 struct sas_task *io_task_ptr; /* When ttype==io_task */
124 struct isci_tmf *tmf_task_ptr; /* When ttype==tmf_task */
125 } ttype_ptr;
126 struct isci_host *isci_host;
127 /* For use in the requests_to_{complete|abort} lists: */
128 struct list_head completed_node;
129 /* For use in the reqs_in_process list: */
130 struct list_head dev_node;
131 spinlock_t state_lock;
132 dma_addr_t request_daddr;
133 dma_addr_t zero_scatter_daddr;
134 unsigned int num_sg_entries;
135 /* Note: "io_request_completion" is completed in two different ways
136 * depending on whether this is a TMF or regular request.
137 * - TMF requests are completed in the thread that started them;
138 * - regular requests are completed in the request completion callback
139 * function.
140 * This difference in operation allows the aborter of a TMF request
141 * to be sure that once the TMF request completes, the I/O that the
142 * TMF was aborting is guaranteed to have completed.
143 *
144 * XXX kill io_request_completion
145 */
146 struct completion *io_request_completion;
147 struct sci_base_state_machine sm;
148 struct isci_host *owning_controller;
149 struct isci_remote_device *target_device;
150 u16 io_tag;
151 enum sci_request_protocol protocol;
152 u32 scu_status; /* hardware result */
153 u32 sci_status; /* upper layer disposition */
154 u32 post_context;
155 struct scu_task_context *tc;
156 /* could be larger with sg chaining */
157 #define SCU_SGL_SIZE ((SCI_MAX_SCATTER_GATHER_ELEMENTS + 1) / 2)
158 struct scu_sgl_element_pair sg_table[SCU_SGL_SIZE] __attribute__ ((aligned(32)));
159 /* This field is a pointer to the stored rx frame data. It is used in
160 * STP internal requests and SMP response frames. If this field is
161 * non-NULL the saved frame must be released on IO request completion.
162 */
163 u32 saved_rx_frame_index;
164
165 union {
166 struct {
167 union {
168 struct ssp_cmd_iu cmd;
169 struct ssp_task_iu tmf;
170 };
171 union {
172 struct ssp_response_iu rsp;
173 u8 rsp_buf[SSP_RESP_IU_MAX_SIZE];
174 };
175 } ssp;
176 struct {
177 struct smp_resp rsp;
178 } smp;
179 struct {
180 struct isci_stp_request req;
181 struct host_to_dev_fis cmd;
182 struct dev_to_host_fis rsp;
183 } stp;
184 };
185};
186
187static inline struct isci_request *to_ireq(struct isci_stp_request *stp_req)
188{
189 struct isci_request *ireq;
190
191 ireq = container_of(stp_req, typeof(*ireq), stp.req);
192 return ireq;
193}
194
195/**
196 * enum sci_base_request_states - This enumeration depicts all the states for
197 * the common request state machine.
198 *
199 *
200 */
201enum sci_base_request_states {
202 /*
203 * Simply the initial state for the base request state machine.
204 */
205 SCI_REQ_INIT,
206
207 /*
208 * This state indicates that the request has been constructed.
209 * This state is entered from the INITIAL state.
210 */
211 SCI_REQ_CONSTRUCTED,
212
213 /*
214 * This state indicates that the request has been started. This state
215 * is entered from the CONSTRUCTED state.
216 */
217 SCI_REQ_STARTED,
218
219 SCI_REQ_STP_UDMA_WAIT_TC_COMP,
220 SCI_REQ_STP_UDMA_WAIT_D2H,
221
222 SCI_REQ_STP_NON_DATA_WAIT_H2D,
223 SCI_REQ_STP_NON_DATA_WAIT_D2H,
224
225 SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED,
226 SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG,
227 SCI_REQ_STP_SOFT_RESET_WAIT_D2H,
228
229 /*
230 * While in this state the IO request object is waiting for the TC
231 * completion notification for the H2D Register FIS
232 */
233 SCI_REQ_STP_PIO_WAIT_H2D,
234
235 /*
236 * While in this state the IO request object is waiting for either a
237 * PIO Setup FIS or a D2H register FIS. The type of frame received is
238 * based on the result of the prior frame and line conditions.
239 */
240 SCI_REQ_STP_PIO_WAIT_FRAME,
241
242 /*
243 * While in this state the IO request object is waiting for a DATA
244 * frame from the device.
245 */
246 SCI_REQ_STP_PIO_DATA_IN,
247
248 /*
249 * While in this state the IO request object is waiting to transmit
250 * the next data frame to the device.
251 */
252 SCI_REQ_STP_PIO_DATA_OUT,
253
254 /*
255 * The AWAIT_TC_COMPLETION sub-state indicates that the started raw
256 * task management request is waiting for the transmission of the
257 * initial frame (i.e. command, task, etc.).
258 */
259 SCI_REQ_TASK_WAIT_TC_COMP,
260
261 /*
262 * This sub-state indicates that the started task management request
263 * is waiting for the reception of an unsolicited frame
264 * (i.e. response IU).
265 */
266 SCI_REQ_TASK_WAIT_TC_RESP,
267
268 /*
269 * This sub-state indicates that the started task management request
270 * is waiting for the reception of an unsolicited frame
271 * (i.e. response IU).
272 */
273 SCI_REQ_SMP_WAIT_RESP,
274
275 /*
276 * The AWAIT_TC_COMPLETION sub-state indicates that the started SMP
277 * request is waiting for the transmission of the initial frame
278 * (i.e. command, task, etc.).
279 */
280 SCI_REQ_SMP_WAIT_TC_COMP,
281
282 /*
283 * This state indicates that the request has completed.
284 * This state is entered from the STARTED state. This state is entered
285 * from the ABORTING state.
286 */
287 SCI_REQ_COMPLETED,
288
289 /*
290 * This state indicates that the request is in the process of being
291 * terminated/aborted.
292 * This state is entered from the CONSTRUCTED state.
293 * This state is entered from the STARTED state.
294 */
295 SCI_REQ_ABORTING,
296
297 /*
298 * Simply the final state for the base request state machine.
299 */
300 SCI_REQ_FINAL,
301};
302
303enum sci_status sci_request_start(struct isci_request *ireq);
304enum sci_status sci_io_request_terminate(struct isci_request *ireq);
305enum sci_status
306sci_io_request_event_handler(struct isci_request *ireq,
307 u32 event_code);
308enum sci_status
309sci_io_request_frame_handler(struct isci_request *ireq,
310 u32 frame_index);
311enum sci_status
312sci_task_request_terminate(struct isci_request *ireq);
313extern enum sci_status
314sci_request_complete(struct isci_request *ireq);
315extern enum sci_status
316sci_io_request_tc_completion(struct isci_request *ireq, u32 code);
317
318/* XXX open code in caller */
319static inline dma_addr_t
320sci_io_request_get_dma_addr(struct isci_request *ireq, void *virt_addr)
321{
322
323 char *requested_addr = (char *)virt_addr;
324 char *base_addr = (char *)ireq;
325
326 BUG_ON(requested_addr < base_addr);
327 BUG_ON((requested_addr - base_addr) >= sizeof(*ireq));
328
329 return ireq->request_daddr + (requested_addr - base_addr);
330}
331
332/**
333 * isci_request_change_state() - This function sets the status of the request
334 * object.
335 * @request: This parameter points to the isci_request object
336 * @status: This Parameter is the new status of the object
337 *
338 */
339static inline enum isci_request_status
340isci_request_change_state(struct isci_request *isci_request,
341 enum isci_request_status status)
342{
343 enum isci_request_status old_state;
344 unsigned long flags;
345
346 dev_dbg(&isci_request->isci_host->pdev->dev,
347 "%s: isci_request = %p, state = 0x%x\n",
348 __func__,
349 isci_request,
350 status);
351
352 BUG_ON(isci_request == NULL);
353
354 spin_lock_irqsave(&isci_request->state_lock, flags);
355 old_state = isci_request->status;
356 isci_request->status = status;
357 spin_unlock_irqrestore(&isci_request->state_lock, flags);
358
359 return old_state;
360}
361
362/**
363 * isci_request_change_started_to_newstate() - This function sets the status of
364 * the request object.
365 * @request: This parameter points to the isci_request object
366 * @status: This Parameter is the new status of the object
367 *
368 * state previous to any change.
369 */
370static inline enum isci_request_status
371isci_request_change_started_to_newstate(struct isci_request *isci_request,
372 struct completion *completion_ptr,
373 enum isci_request_status newstate)
374{
375 enum isci_request_status old_state;
376 unsigned long flags;
377
378 spin_lock_irqsave(&isci_request->state_lock, flags);
379
380 old_state = isci_request->status;
381
382 if (old_state == started || old_state == aborting) {
383 BUG_ON(isci_request->io_request_completion != NULL);
384
385 isci_request->io_request_completion = completion_ptr;
386 isci_request->status = newstate;
387 }
388
389 spin_unlock_irqrestore(&isci_request->state_lock, flags);
390
391 dev_dbg(&isci_request->isci_host->pdev->dev,
392 "%s: isci_request = %p, old_state = 0x%x\n",
393 __func__,
394 isci_request,
395 old_state);
396
397 return old_state;
398}
399
400/**
401 * isci_request_change_started_to_aborted() - This function sets the status of
402 * the request object.
403 * @request: This parameter points to the isci_request object
404 * @completion_ptr: This parameter is saved as the kernel completion structure
405 * signalled when the old request completes.
406 *
407 * state previous to any change.
408 */
409static inline enum isci_request_status
410isci_request_change_started_to_aborted(struct isci_request *isci_request,
411 struct completion *completion_ptr)
412{
413 return isci_request_change_started_to_newstate(isci_request,
414 completion_ptr,
415 aborted);
416}
417
418#define isci_request_access_task(req) ((req)->ttype_ptr.io_task_ptr)
419
420#define isci_request_access_tmf(req) ((req)->ttype_ptr.tmf_task_ptr)
421
422struct isci_request *isci_tmf_request_from_tag(struct isci_host *ihost,
423 struct isci_tmf *isci_tmf,
424 u16 tag);
425int isci_request_execute(struct isci_host *ihost, struct isci_remote_device *idev,
426 struct sas_task *task, u16 tag);
427void isci_terminate_pending_requests(struct isci_host *ihost,
428 struct isci_remote_device *idev);
429enum sci_status
430sci_task_request_construct(struct isci_host *ihost,
431 struct isci_remote_device *idev,
432 u16 io_tag,
433 struct isci_request *ireq);
434enum sci_status
435sci_task_request_construct_ssp(struct isci_request *ireq);
436enum sci_status
437sci_task_request_construct_sata(struct isci_request *ireq);
438void sci_smp_request_copy_response(struct isci_request *ireq);
439
440static inline int isci_task_is_ncq_recovery(struct sas_task *task)
441{
442 return (sas_protocol_ata(task->task_proto) &&
443 task->ata_task.fis.command == ATA_CMD_READ_LOG_EXT &&
444 task->ata_task.fis.lbal == ATA_LOG_SATA_NCQ);
445
446}
447
448#endif /* !defined(_ISCI_REQUEST_H_) */
diff --git a/drivers/scsi/isci/sas.h b/drivers/scsi/isci/sas.h
new file mode 100644
index 000000000000..462b15174d3f
--- /dev/null
+++ b/drivers/scsi/isci/sas.h
@@ -0,0 +1,219 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _SCI_SAS_H_
57#define _SCI_SAS_H_
58
59#include <linux/kernel.h>
60
61/*
62 * SATA FIS Types These constants depict the various SATA FIS types devined in
63 * the serial ATA specification.
64 * XXX: This needs to go into <scsi/sas.h>
65 */
66#define FIS_REGH2D 0x27
67#define FIS_REGD2H 0x34
68#define FIS_SETDEVBITS 0xA1
69#define FIS_DMA_ACTIVATE 0x39
70#define FIS_DMA_SETUP 0x41
71#define FIS_BIST_ACTIVATE 0x58
72#define FIS_PIO_SETUP 0x5F
73#define FIS_DATA 0x46
74
75/**************************************************************************/
76#define SSP_RESP_IU_MAX_SIZE 280
77
78/*
79 * contents of the SSP COMMAND INFORMATION UNIT.
80 * For specific information on each of these individual fields please
81 * reference the SAS specification SSP transport layer section.
82 * XXX: This needs to go into <scsi/sas.h>
83 */
84struct ssp_cmd_iu {
85 u8 LUN[8];
86 u8 add_cdb_len:6;
87 u8 _r_a:2;
88 u8 _r_b;
89 u8 en_fburst:1;
90 u8 task_prio:4;
91 u8 task_attr:3;
92 u8 _r_c;
93
94 u8 cdb[16];
95} __packed;
96
97/*
98 * contents of the SSP TASK INFORMATION UNIT.
99 * For specific information on each of these individual fields please
100 * reference the SAS specification SSP transport layer section.
101 * XXX: This needs to go into <scsi/sas.h>
102 */
103struct ssp_task_iu {
104 u8 LUN[8];
105 u8 _r_a;
106 u8 task_func;
107 u8 _r_b[4];
108 u16 task_tag;
109 u8 _r_c[12];
110} __packed;
111
112
113/*
114 * struct smp_req_phy_id - This structure defines the contents of
115 * an SMP Request that is comprised of the struct smp_request_header and a
116 * phy identifier.
117 * Examples: SMP_REQUEST_DISCOVER, SMP_REQUEST_REPORT_PHY_SATA.
118 *
119 * For specific information on each of these individual fields please reference
120 * the SAS specification.
121 */
122struct smp_req_phy_id {
123 u8 _r_a[4]; /* bytes 4-7 */
124
125 u8 ign_zone_grp:1; /* byte 8 */
126 u8 _r_b:7;
127
128 u8 phy_id; /* byte 9 */
129 u8 _r_c; /* byte 10 */
130 u8 _r_d; /* byte 11 */
131} __packed;
132
133/*
134 * struct smp_req_config_route_info - This structure defines the
135 * contents of an SMP Configure Route Information request.
136 *
137 * For specific information on each of these individual fields please reference
138 * the SAS specification.
139 */
140struct smp_req_conf_rtinfo {
141 u16 exp_change_cnt; /* bytes 4-5 */
142 u8 exp_rt_idx_hi; /* byte 6 */
143 u8 exp_rt_idx; /* byte 7 */
144
145 u8 _r_a; /* byte 8 */
146 u8 phy_id; /* byte 9 */
147 u16 _r_b; /* bytes 10-11 */
148
149 u8 _r_c:7; /* byte 12 */
150 u8 dis_rt_entry:1;
151 u8 _r_d[3]; /* bytes 13-15 */
152
153 u8 rt_sas_addr[8]; /* bytes 16-23 */
154 u8 _r_e[16]; /* bytes 24-39 */
155} __packed;
156
157/*
158 * struct smp_req_phycntl - This structure defines the contents of an
159 * SMP Phy Controller request.
160 *
161 * For specific information on each of these individual fields please reference
162 * the SAS specification.
163 */
164struct smp_req_phycntl {
165 u16 exp_change_cnt; /* byte 4-5 */
166
167 u8 _r_a[3]; /* bytes 6-8 */
168
169 u8 phy_id; /* byte 9 */
170 u8 phy_op; /* byte 10 */
171
172 u8 upd_pathway:1; /* byte 11 */
173 u8 _r_b:7;
174
175 u8 _r_c[12]; /* byte 12-23 */
176
177 u8 att_dev_name[8]; /* byte 24-31 */
178
179 u8 _r_d:4; /* byte 32 */
180 u8 min_linkrate:4;
181
182 u8 _r_e:4; /* byte 33 */
183 u8 max_linkrate:4;
184
185 u8 _r_f[2]; /* byte 34-35 */
186
187 u8 pathway:4; /* byte 36 */
188 u8 _r_g:4;
189
190 u8 _r_h[3]; /* bytes 37-39 */
191} __packed;
192
193/*
194 * struct smp_req - This structure simply unionizes the existing request
195 * structures into a common request type.
196 *
197 * XXX: This data structure may need to go to scsi/sas.h
198 */
199struct smp_req {
200 u8 type; /* byte 0 */
201 u8 func; /* byte 1 */
202 u8 alloc_resp_len; /* byte 2 */
203 u8 req_len; /* byte 3 */
204 u8 req_data[0];
205} __packed;
206
207#define SMP_RESP_HDR_SZ 4
208
209/*
210 * struct sci_sas_address - This structure depicts how a SAS address is
211 * represented by SCI.
212 * XXX convert this to u8 [SAS_ADDR_SIZE] like the rest of libsas
213 *
214 */
215struct sci_sas_address {
216 u32 high;
217 u32 low;
218};
219#endif
diff --git a/drivers/scsi/isci/scu_completion_codes.h b/drivers/scsi/isci/scu_completion_codes.h
new file mode 100644
index 000000000000..c8b329c695f9
--- /dev/null
+++ b/drivers/scsi/isci/scu_completion_codes.h
@@ -0,0 +1,283 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _SCU_COMPLETION_CODES_HEADER_
57#define _SCU_COMPLETION_CODES_HEADER_
58
59/**
60 * This file contains the constants and macros for the SCU hardware completion
61 * codes.
62 *
63 *
64 */
65
66#define SCU_COMPLETION_TYPE_SHIFT 28
67#define SCU_COMPLETION_TYPE_MASK 0x70000000
68
69/**
70 * SCU_COMPLETION_TYPE() -
71 *
72 * This macro constructs an SCU completion type
73 */
74#define SCU_COMPLETION_TYPE(type) \
75 ((u32)(type) << SCU_COMPLETION_TYPE_SHIFT)
76
77/**
78 * SCU_COMPLETION_TYPE() -
79 *
80 * These macros contain the SCU completion types SCU_COMPLETION_TYPE
81 */
82#define SCU_COMPLETION_TYPE_TASK SCU_COMPLETION_TYPE(0)
83#define SCU_COMPLETION_TYPE_SDMA SCU_COMPLETION_TYPE(1)
84#define SCU_COMPLETION_TYPE_UFI SCU_COMPLETION_TYPE(2)
85#define SCU_COMPLETION_TYPE_EVENT SCU_COMPLETION_TYPE(3)
86#define SCU_COMPLETION_TYPE_NOTIFY SCU_COMPLETION_TYPE(4)
87
88/**
89 *
90 *
91 * These constants provide the shift and mask values for the various parts of
92 * an SCU completion code.
93 */
94#define SCU_COMPLETION_STATUS_MASK 0x0FFC0000
95#define SCU_COMPLETION_TL_STATUS_MASK 0x0FC00000
96#define SCU_COMPLETION_TL_STATUS_SHIFT 22
97#define SCU_COMPLETION_SDMA_STATUS_MASK 0x003C0000
98#define SCU_COMPLETION_PEG_MASK 0x00010000
99#define SCU_COMPLETION_PORT_MASK 0x00007000
100#define SCU_COMPLETION_PE_MASK SCU_COMPLETION_PORT_MASK
101#define SCU_COMPLETION_PE_SHIFT 12
102#define SCU_COMPLETION_INDEX_MASK 0x00000FFF
103
104/**
105 * SCU_GET_COMPLETION_TYPE() -
106 *
107 * This macro returns the SCU completion type.
108 */
109#define SCU_GET_COMPLETION_TYPE(completion_code) \
110 ((completion_code) & SCU_COMPLETION_TYPE_MASK)
111
112/**
113 * SCU_GET_COMPLETION_STATUS() -
114 *
115 * This macro returns the SCU completion status.
116 */
117#define SCU_GET_COMPLETION_STATUS(completion_code) \
118 ((completion_code) & SCU_COMPLETION_STATUS_MASK)
119
120/**
121 * SCU_GET_COMPLETION_TL_STATUS() -
122 *
123 * This macro returns the transport layer completion status.
124 */
125#define SCU_GET_COMPLETION_TL_STATUS(completion_code) \
126 ((completion_code) & SCU_COMPLETION_TL_STATUS_MASK)
127
128/**
129 * SCU_MAKE_COMPLETION_STATUS() -
130 *
131 * This macro takes a completion code and performs the shift and mask
132 * operations to turn it into a completion code that can be compared to a
133 * SCU_GET_COMPLETION_TL_STATUS.
134 */
135#define SCU_MAKE_COMPLETION_STATUS(completion_code) \
136 ((u32)(completion_code) << SCU_COMPLETION_TL_STATUS_SHIFT)
137
138/**
139 * SCU_NORMALIZE_COMPLETION_STATUS() -
140 *
141 * This macro takes a SCU_GET_COMPLETION_TL_STATUS and normalizes it for a
142 * return code.
143 */
144#define SCU_NORMALIZE_COMPLETION_STATUS(completion_code) \
145 (\
146 ((completion_code) & SCU_COMPLETION_TL_STATUS_MASK) \
147 >> SCU_COMPLETION_TL_STATUS_SHIFT \
148 )
149
150/**
151 * SCU_GET_COMPLETION_SDMA_STATUS() -
152 *
153 * This macro returns the SDMA completion status.
154 */
155#define SCU_GET_COMPLETION_SDMA_STATUS(completion_code) \
156 ((completion_code) & SCU_COMPLETION_SDMA_STATUS_MASK)
157
158/**
159 * SCU_GET_COMPLETION_PEG() -
160 *
161 * This macro returns the Protocol Engine Group from the completion code.
162 */
163#define SCU_GET_COMPLETION_PEG(completion_code) \
164 ((completion_code) & SCU_COMPLETION_PEG_MASK)
165
166/**
167 * SCU_GET_COMPLETION_PORT() -
168 *
169 * This macro reuturns the logical port index from the completion code.
170 */
171#define SCU_GET_COMPLETION_PORT(completion_code) \
172 ((completion_code) & SCU_COMPLETION_PORT_MASK)
173
174/**
175 * SCU_GET_PROTOCOL_ENGINE_INDEX() -
176 *
177 * This macro returns the PE index from the completion code.
178 */
179#define SCU_GET_PROTOCOL_ENGINE_INDEX(completion_code) \
180 (((completion_code) & SCU_COMPLETION_PE_MASK) >> SCU_COMPLETION_PE_SHIFT)
181
182/**
183 * SCU_GET_COMPLETION_INDEX() -
184 *
185 * This macro returns the index of the completion which is either a TCi or an
186 * RNi depending on the completion type.
187 */
188#define SCU_GET_COMPLETION_INDEX(completion_code) \
189 ((completion_code) & SCU_COMPLETION_INDEX_MASK)
190
191#define SCU_UNSOLICITED_FRAME_MASK 0x0FFF0000
192#define SCU_UNSOLICITED_FRAME_SHIFT 16
193
194/**
195 * SCU_GET_FRAME_INDEX() -
196 *
197 * This macro returns a normalized frame index from an unsolicited frame
198 * completion.
199 */
200#define SCU_GET_FRAME_INDEX(completion_code) \
201 (\
202 ((completion_code) & SCU_UNSOLICITED_FRAME_MASK) \
203 >> SCU_UNSOLICITED_FRAME_SHIFT \
204 )
205
206#define SCU_UNSOLICITED_FRAME_ERROR_MASK 0x00008000
207
208/**
209 * SCU_GET_FRAME_ERROR() -
210 *
211 * This macro returns a zero (0) value if there is no frame error otherwise it
212 * returns non-zero (!0).
213 */
214#define SCU_GET_FRAME_ERROR(completion_code) \
215 ((completion_code) & SCU_UNSOLICITED_FRAME_ERROR_MASK)
216
217/**
218 *
219 *
220 * These constants represent normalized completion codes which must be shifted
221 * 18 bits to match it with the hardware completion code. In a 16-bit compiler,
222 * immediate constants are 16-bit values (the size of an int). If we shift
223 * those by 18 bits, we completely lose the value. To ensure the value is a
224 * 32-bit value like we want, each immediate value must be cast to a u32.
225 */
226#define SCU_TASK_DONE_GOOD ((u32)0x00)
227#define SCU_TASK_DONE_CRC_ERR ((u32)0x14)
228#define SCU_TASK_DONE_CHECK_RESPONSE ((u32)0x14)
229#define SCU_TASK_DONE_GEN_RESPONSE ((u32)0x15)
230#define SCU_TASK_DONE_NAK_CMD_ERR ((u32)0x16)
231#define SCU_TASK_DONE_CMD_LL_R_ERR ((u32)0x16)
232#define SCU_TASK_DONE_LL_R_ERR ((u32)0x17)
233#define SCU_TASK_DONE_ACK_NAK_TO ((u32)0x17)
234#define SCU_TASK_DONE_LL_PERR ((u32)0x18)
235#define SCU_TASK_DONE_LL_SY_TERM ((u32)0x19)
236#define SCU_TASK_DONE_NAK_ERR ((u32)0x19)
237#define SCU_TASK_DONE_LL_LF_TERM ((u32)0x1A)
238#define SCU_TASK_DONE_DATA_LEN_ERR ((u32)0x1A)
239#define SCU_TASK_DONE_LL_CL_TERM ((u32)0x1B)
240#define SCU_TASK_DONE_LL_ABORT_ERR ((u32)0x1B)
241#define SCU_TASK_DONE_SEQ_INV_TYPE ((u32)0x1C)
242#define SCU_TASK_DONE_UNEXP_XR ((u32)0x1C)
243#define SCU_TASK_DONE_INV_FIS_TYPE ((u32)0x1D)
244#define SCU_TASK_DONE_XR_IU_LEN_ERR ((u32)0x1D)
245#define SCU_TASK_DONE_INV_FIS_LEN ((u32)0x1E)
246#define SCU_TASK_DONE_XR_WD_LEN ((u32)0x1E)
247#define SCU_TASK_DONE_SDMA_ERR ((u32)0x1F)
248#define SCU_TASK_DONE_OFFSET_ERR ((u32)0x20)
249#define SCU_TASK_DONE_MAX_PLD_ERR ((u32)0x21)
250#define SCU_TASK_DONE_EXCESS_DATA ((u32)0x22)
251#define SCU_TASK_DONE_LF_ERR ((u32)0x23)
252#define SCU_TASK_DONE_UNEXP_FIS ((u32)0x24)
253#define SCU_TASK_DONE_UNEXP_RESP ((u32)0x24)
254#define SCU_TASK_DONE_EARLY_RESP ((u32)0x25)
255#define SCU_TASK_DONE_SMP_RESP_TO_ERR ((u32)0x26)
256#define SCU_TASK_DONE_DMASETUP_DIRERR ((u32)0x27)
257#define SCU_TASK_DONE_SMP_UFI_ERR ((u32)0x27)
258#define SCU_TASK_DONE_XFERCNT_ERR ((u32)0x28)
259#define SCU_TASK_DONE_SMP_FRM_TYPE_ERR ((u32)0x28)
260#define SCU_TASK_DONE_SMP_LL_RX_ERR ((u32)0x29)
261#define SCU_TASK_DONE_RESP_LEN_ERR ((u32)0x2A)
262#define SCU_TASK_DONE_UNEXP_DATA ((u32)0x2B)
263#define SCU_TASK_DONE_OPEN_FAIL ((u32)0x2C)
264#define SCU_TASK_DONE_UNEXP_SDBFIS ((u32)0x2D)
265#define SCU_TASK_DONE_REG_ERR ((u32)0x2E)
266#define SCU_TASK_DONE_SDB_ERR ((u32)0x2F)
267#define SCU_TASK_DONE_TASK_ABORT ((u32)0x30)
268#define SCU_TASK_DONE_CMD_SDMA_ERR ((U32)0x32)
269#define SCU_TASK_DONE_CMD_LL_ABORT_ERR ((U32)0x33)
270#define SCU_TASK_OPEN_REJECT_WRONG_DESTINATION ((u32)0x34)
271#define SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1 ((u32)0x35)
272#define SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2 ((u32)0x36)
273#define SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3 ((u32)0x37)
274#define SCU_TASK_OPEN_REJECT_BAD_DESTINATION ((u32)0x38)
275#define SCU_TASK_OPEN_REJECT_ZONE_VIOLATION ((u32)0x39)
276#define SCU_TASK_DONE_VIIT_ENTRY_NV ((u32)0x3A)
277#define SCU_TASK_DONE_IIT_ENTRY_NV ((u32)0x3B)
278#define SCU_TASK_DONE_RNCNV_OUTBOUND ((u32)0x3C)
279#define SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY ((u32)0x3D)
280#define SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED ((u32)0x3E)
281#define SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED ((u32)0x3F)
282
283#endif /* _SCU_COMPLETION_CODES_HEADER_ */
diff --git a/drivers/scsi/isci/scu_event_codes.h b/drivers/scsi/isci/scu_event_codes.h
new file mode 100644
index 000000000000..36a945ad5722
--- /dev/null
+++ b/drivers/scsi/isci/scu_event_codes.h
@@ -0,0 +1,336 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef __SCU_EVENT_CODES_HEADER__
57#define __SCU_EVENT_CODES_HEADER__
58
59/**
60 * This file contains the constants and macros for the SCU event codes.
61 *
62 *
63 */
64
65#define SCU_EVENT_TYPE_CODE_SHIFT 24
66#define SCU_EVENT_TYPE_CODE_MASK 0x0F000000
67
68#define SCU_EVENT_SPECIFIC_CODE_SHIFT 18
69#define SCU_EVENT_SPECIFIC_CODE_MASK 0x00FC0000
70
71#define SCU_EVENT_CODE_MASK \
72 (SCU_EVENT_TYPE_CODE_MASK | SCU_EVENT_SPECIFIC_CODE_MASK)
73
74/**
75 * SCU_EVENT_TYPE() -
76 *
77 * This macro constructs an SCU event type from the type value.
78 */
79#define SCU_EVENT_TYPE(type) \
80 ((u32)(type) << SCU_EVENT_TYPE_CODE_SHIFT)
81
82/**
83 * SCU_EVENT_SPECIFIC() -
84 *
85 * This macro constructs an SCU event specifier from the code value.
86 */
87#define SCU_EVENT_SPECIFIC(code) \
88 ((u32)(code) << SCU_EVENT_SPECIFIC_CODE_SHIFT)
89
90/**
91 * SCU_EVENT_MESSAGE() -
92 *
93 * This macro constructs a combines an SCU event type and SCU event specifier
94 * from the type and code values.
95 */
96#define SCU_EVENT_MESSAGE(type, code) \
97 ((type) | SCU_EVENT_SPECIFIC(code))
98
99/**
100 * SCU_EVENT_TYPE() -
101 *
102 * SCU_EVENT_TYPES
103 */
104#define SCU_EVENT_TYPE_SMU_COMMAND_ERROR SCU_EVENT_TYPE(0x08)
105#define SCU_EVENT_TYPE_SMU_PCQ_ERROR SCU_EVENT_TYPE(0x09)
106#define SCU_EVENT_TYPE_SMU_ERROR SCU_EVENT_TYPE(0x00)
107#define SCU_EVENT_TYPE_TRANSPORT_ERROR SCU_EVENT_TYPE(0x01)
108#define SCU_EVENT_TYPE_BROADCAST_CHANGE SCU_EVENT_TYPE(0x02)
109#define SCU_EVENT_TYPE_OSSP_EVENT SCU_EVENT_TYPE(0x03)
110#define SCU_EVENT_TYPE_FATAL_MEMORY_ERROR SCU_EVENT_TYPE(0x0F)
111#define SCU_EVENT_TYPE_RNC_SUSPEND_TX SCU_EVENT_TYPE(0x04)
112#define SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX SCU_EVENT_TYPE(0x05)
113#define SCU_EVENT_TYPE_RNC_OPS_MISC SCU_EVENT_TYPE(0x06)
114#define SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT SCU_EVENT_TYPE(0x07)
115#define SCU_EVENT_TYPE_ERR_CNT_EVENT SCU_EVENT_TYPE(0x0A)
116
117/**
118 *
119 *
120 * SCU_EVENT_SPECIFIERS
121 */
122#define SCU_EVENT_SPECIFIER_DRIVER_SUSPEND 0x20
123#define SCU_EVENT_SPECIFIER_RNC_RELEASE 0x00
124
125/**
126 *
127 *
128 * SMU_COMMAND_EVENTS
129 */
130#define SCU_EVENT_INVALID_CONTEXT_COMMAND \
131 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_COMMAND_ERROR, 0x00)
132
133/**
134 *
135 *
136 * SMU_PCQ_EVENTS
137 */
138#define SCU_EVENT_UNCORRECTABLE_PCQ_ERROR \
139 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_PCQ_ERROR, 0x00)
140
141/**
142 *
143 *
144 * SMU_EVENTS
145 */
146#define SCU_EVENT_UNCORRECTABLE_REGISTER_WRITE \
147 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_ERROR, 0x02)
148#define SCU_EVENT_UNCORRECTABLE_REGISTER_READ \
149 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_ERROR, 0x03)
150#define SCU_EVENT_PCIE_INTERFACE_ERROR \
151 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_ERROR, 0x04)
152#define SCU_EVENT_FUNCTION_LEVEL_RESET \
153 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_ERROR, 0x05)
154
155/**
156 *
157 *
158 * TRANSPORT_LEVEL_ERRORS
159 */
160#define SCU_EVENT_ACK_NAK_TIMEOUT_ERROR \
161 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_TRANSPORT_ERROR, 0x00)
162
163/**
164 *
165 *
166 * BROADCAST_CHANGE_EVENTS
167 */
168#define SCU_EVENT_BROADCAST_CHANGE \
169 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x01)
170#define SCU_EVENT_BROADCAST_RESERVED0 \
171 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x02)
172#define SCU_EVENT_BROADCAST_RESERVED1 \
173 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x03)
174#define SCU_EVENT_BROADCAST_SES \
175 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x04)
176#define SCU_EVENT_BROADCAST_EXPANDER \
177 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x05)
178#define SCU_EVENT_BROADCAST_AEN \
179 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x06)
180#define SCU_EVENT_BROADCAST_RESERVED3 \
181 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x07)
182#define SCU_EVENT_BROADCAST_RESERVED4 \
183 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x08)
184#define SCU_EVENT_PE_SUSPENDED \
185 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x09)
186
187/**
188 *
189 *
190 * OSSP_EVENTS
191 */
192#define SCU_EVENT_PORT_SELECTOR_DETECTED \
193 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x10)
194#define SCU_EVENT_SENT_PORT_SELECTION \
195 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x11)
196#define SCU_EVENT_HARD_RESET_TRANSMITTED \
197 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x12)
198#define SCU_EVENT_HARD_RESET_RECEIVED \
199 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x13)
200#define SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT \
201 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x15)
202#define SCU_EVENT_LINK_FAILURE \
203 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x16)
204#define SCU_EVENT_SATA_SPINUP_HOLD \
205 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x17)
206#define SCU_EVENT_SAS_15_SSC \
207 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x18)
208#define SCU_EVENT_SAS_15 \
209 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x19)
210#define SCU_EVENT_SAS_30_SSC \
211 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1A)
212#define SCU_EVENT_SAS_30 \
213 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1B)
214#define SCU_EVENT_SAS_60_SSC \
215 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1C)
216#define SCU_EVENT_SAS_60 \
217 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1D)
218#define SCU_EVENT_SATA_15_SSC \
219 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1E)
220#define SCU_EVENT_SATA_15 \
221 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1F)
222#define SCU_EVENT_SATA_30_SSC \
223 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x20)
224#define SCU_EVENT_SATA_30 \
225 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x21)
226#define SCU_EVENT_SATA_60_SSC \
227 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x22)
228#define SCU_EVENT_SATA_60 \
229 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x23)
230#define SCU_EVENT_SAS_PHY_DETECTED \
231 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x24)
232#define SCU_EVENT_SATA_PHY_DETECTED \
233 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x25)
234
235/**
236 *
237 *
238 * FATAL_INTERNAL_MEMORY_ERROR_EVENTS
239 */
240#define SCU_EVENT_TSC_RNSC_UNCORRECTABLE_ERROR \
241 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_FATAL_MEMORY_ERROR, 0x00)
242#define SCU_EVENT_TC_RNC_UNCORRECTABLE_ERROR \
243 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_FATAL_MEMORY_ERROR, 0x01)
244#define SCU_EVENT_ZPT_UNCORRECTABLE_ERROR \
245 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_FATAL_MEMORY_ERROR, 0x02)
246
247/**
248 *
249 *
250 * REMOTE_NODE_SUSPEND_EVENTS
251 */
252#define SCU_EVENT_TL_RNC_SUSPEND_TX \
253 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_SUSPEND_TX, 0x00)
254#define SCU_EVENT_TL_RNC_SUSPEND_TX_RX \
255 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX, 0x00)
256#define SCU_EVENT_DRIVER_POST_RNC_SUSPEND_TX \
257 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_SUSPEND_TX, 0x20)
258#define SCU_EVENT_DRIVER_POST_RNC_SUSPEND_TX_RX \
259 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX, 0x20)
260
261/**
262 *
263 *
264 * REMOTE_NODE_MISC_EVENTS
265 */
266#define SCU_EVENT_POST_RCN_RELEASE \
267 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_OPS_MISC, SCU_EVENT_SPECIFIER_RNC_RELEASE)
268#define SCU_EVENT_POST_IT_NEXUS_LOSS_TIMER_ENABLE \
269 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_OPS_MISC, 0x01)
270#define SCU_EVENT_POST_IT_NEXUS_LOSS_TIMER_DISABLE \
271 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_OPS_MISC, 0x02)
272#define SCU_EVENT_POST_RNC_COMPLETE \
273 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_OPS_MISC, 0x03)
274#define SCU_EVENT_POST_RNC_INVALIDATE_COMPLETE \
275 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_OPS_MISC, 0x04)
276
277/**
278 *
279 *
280 * ERROR_COUNT_EVENT
281 */
282#define SCU_EVENT_RX_CREDIT_BLOCKED_RECEIVED \
283 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_ERR_CNT_EVENT, 0x00)
284#define SCU_EVENT_TX_DONE_CREDIT_TIMEOUT \
285 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_ERR_CNT_EVENT, 0x01)
286#define SCU_EVENT_RX_DONE_CREDIT_TIMEOUT \
287 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_ERR_CNT_EVENT, 0x02)
288
289/**
290 * scu_get_event_type() -
291 *
292 * This macro returns the SCU event type from the event code.
293 */
294#define scu_get_event_type(event_code) \
295 ((event_code) & SCU_EVENT_TYPE_CODE_MASK)
296
297/**
298 * scu_get_event_specifier() -
299 *
300 * This macro returns the SCU event specifier from the event code.
301 */
302#define scu_get_event_specifier(event_code) \
303 ((event_code) & SCU_EVENT_SPECIFIC_CODE_MASK)
304
305/**
306 * scu_get_event_code() -
307 *
308 * This macro returns the combined SCU event type and SCU event specifier from
309 * the event code.
310 */
311#define scu_get_event_code(event_code) \
312 ((event_code) & SCU_EVENT_CODE_MASK)
313
314
315/**
316 *
317 *
318 * PTS_SCHEDULE_EVENT
319 */
320#define SCU_EVENT_SMP_RESPONSE_NO_PE \
321 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT, 0x00)
322#define SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE \
323 scu_get_event_specifier(SCU_EVENT_SMP_RESPONSE_NO_PE)
324
325#define SCU_EVENT_TASK_TIMEOUT \
326 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT, 0x01)
327#define SCU_EVENT_SPECIFIC_TASK_TIMEOUT \
328 scu_get_event_specifier(SCU_EVENT_TASK_TIMEOUT)
329
330#define SCU_EVENT_IT_NEXUS_TIMEOUT \
331 SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT, 0x02)
332#define SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT \
333 scu_get_event_specifier(SCU_EVENT_IT_NEXUS_TIMEOUT)
334
335
336#endif /* __SCU_EVENT_CODES_HEADER__ */
diff --git a/drivers/scsi/isci/scu_remote_node_context.h b/drivers/scsi/isci/scu_remote_node_context.h
new file mode 100644
index 000000000000..33745adc826b
--- /dev/null
+++ b/drivers/scsi/isci/scu_remote_node_context.h
@@ -0,0 +1,229 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef __SCU_REMOTE_NODE_CONTEXT_HEADER__
57#define __SCU_REMOTE_NODE_CONTEXT_HEADER__
58
59/**
60 * This file contains the structures and constatns used by the SCU hardware to
61 * describe a remote node context.
62 *
63 *
64 */
65
66/**
67 * struct ssp_remote_node_context - This structure contains the SCU hardware
68 * definition for an SSP remote node.
69 *
70 *
71 */
72struct ssp_remote_node_context {
73 /* WORD 0 */
74
75 /**
76 * This field is the remote node index assigned for this remote node. All
77 * remote nodes must have a unique remote node index. The value of the remote
78 * node index can not exceed the maximum number of remote nodes reported in
79 * the SCU device context capacity register.
80 */
81 u32 remote_node_index:12;
82 u32 reserved0_1:4;
83
84 /**
85 * This field tells the SCU hardware how many simultaneous connections that
86 * this remote node will support.
87 */
88 u32 remote_node_port_width:4;
89
90 /**
91 * This field tells the SCU hardware which logical port to associate with this
92 * remote node.
93 */
94 u32 logical_port_index:3;
95 u32 reserved0_2:5;
96
97 /**
98 * This field will enable the I_T nexus loss timer for this remote node.
99 */
100 u32 nexus_loss_timer_enable:1;
101
102 /**
103 * This field is the for driver debug only and is not used.
104 */
105 u32 check_bit:1;
106
107 /**
108 * This field must be set to true when the hardware DMAs the remote node
109 * context to the hardware SRAM. When the remote node is being invalidated
110 * this field must be set to false.
111 */
112 u32 is_valid:1;
113
114 /**
115 * This field must be set to true.
116 */
117 u32 is_remote_node_context:1;
118
119 /* WORD 1 - 2 */
120
121 /**
122 * This is the low word of the remote device SAS Address
123 */
124 u32 remote_sas_address_lo;
125
126 /**
127 * This field is the high word of the remote device SAS Address
128 */
129 u32 remote_sas_address_hi;
130
131 /* WORD 3 */
132 /**
133 * This field reprensets the function number assigned to this remote device.
134 * This value must match the virtual function number that is being used to
135 * communicate to the device.
136 */
137 u32 function_number:8;
138 u32 reserved3_1:8;
139
140 /**
141 * This field provides the driver a way to cheat on the arbitration wait time
142 * for this remote node.
143 */
144 u32 arbitration_wait_time:16;
145
146 /* WORD 4 */
147 /**
148 * This field tells the SCU hardware how long this device may occupy the
149 * connection before it must be closed.
150 */
151 u32 connection_occupancy_timeout:16;
152
153 /**
154 * This field tells the SCU hardware how long to maintain a connection when
155 * there are no frames being transmitted on the link.
156 */
157 u32 connection_inactivity_timeout:16;
158
159 /* WORD 5 */
160 /**
161 * This field allows the driver to cheat on the arbitration wait time for this
162 * remote node.
163 */
164 u32 initial_arbitration_wait_time:16;
165
166 /**
167 * This field is tells the hardware what to program for the connection rate in
168 * the open address frame. See the SAS spec for valid values.
169 */
170 u32 oaf_connection_rate:4;
171
172 /**
173 * This field tells the SCU hardware what to program for the features in the
174 * open address frame. See the SAS spec for valid values.
175 */
176 u32 oaf_features:4;
177
178 /**
179 * This field tells the SCU hardware what to use for the source zone group in
180 * the open address frame. See the SAS spec for more details on zoning.
181 */
182 u32 oaf_source_zone_group:8;
183
184 /* WORD 6 */
185 /**
186 * This field tells the SCU hardware what to use as the more capibilities in
187 * the open address frame. See the SAS Spec for details.
188 */
189 u32 oaf_more_compatibility_features;
190
191 /* WORD 7 */
192 u32 reserved7;
193
194};
195
196/**
197 * struct stp_remote_node_context - This structure contains the SCU hardware
198 * definition for a STP remote node.
199 *
200 * STP Targets are not yet supported so this definition is a placeholder until
201 * we do support them.
202 */
203struct stp_remote_node_context {
204 /**
205 * Placeholder data for the STP remote node.
206 */
207 u32 data[8];
208
209};
210
211/**
212 * This union combines the SAS and SATA remote node definitions.
213 *
214 * union scu_remote_node_context
215 */
216union scu_remote_node_context {
217 /**
218 * SSP Remote Node
219 */
220 struct ssp_remote_node_context ssp;
221
222 /**
223 * STP Remote Node
224 */
225 struct stp_remote_node_context stp;
226
227};
228
229#endif /* __SCU_REMOTE_NODE_CONTEXT_HEADER__ */
diff --git a/drivers/scsi/isci/scu_task_context.h b/drivers/scsi/isci/scu_task_context.h
new file mode 100644
index 000000000000..7df87d923285
--- /dev/null
+++ b/drivers/scsi/isci/scu_task_context.h
@@ -0,0 +1,942 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _SCU_TASK_CONTEXT_H_
57#define _SCU_TASK_CONTEXT_H_
58
59/**
60 * This file contains the structures and constants for the SCU hardware task
61 * context.
62 *
63 *
64 */
65
66
67/**
68 * enum scu_ssp_task_type - This enumberation defines the various SSP task
69 * types the SCU hardware will accept. The definition for the various task
70 * types the SCU hardware will accept can be found in the DS specification.
71 *
72 *
73 */
74typedef enum {
75 SCU_TASK_TYPE_IOREAD, /* /< IO READ direction or no direction */
76 SCU_TASK_TYPE_IOWRITE, /* /< IO Write direction */
77 SCU_TASK_TYPE_SMP_REQUEST, /* /< SMP Request type */
78 SCU_TASK_TYPE_RESPONSE, /* /< Driver generated response frame (targt mode) */
79 SCU_TASK_TYPE_RAW_FRAME, /* /< Raw frame request type */
80 SCU_TASK_TYPE_PRIMITIVE /* /< Request for a primitive to be transmitted */
81} scu_ssp_task_type;
82
83/**
84 * enum scu_sata_task_type - This enumeration defines the various SATA task
85 * types the SCU hardware will accept. The definition for the various task
86 * types the SCU hardware will accept can be found in the DS specification.
87 *
88 *
89 */
90typedef enum {
91 SCU_TASK_TYPE_DMA_IN, /* /< Read request */
92 SCU_TASK_TYPE_FPDMAQ_READ, /* /< NCQ read request */
93 SCU_TASK_TYPE_PACKET_DMA_IN, /* /< Packet read request */
94 SCU_TASK_TYPE_SATA_RAW_FRAME, /* /< Raw frame request */
95 RESERVED_4,
96 RESERVED_5,
97 RESERVED_6,
98 RESERVED_7,
99 SCU_TASK_TYPE_DMA_OUT, /* /< Write request */
100 SCU_TASK_TYPE_FPDMAQ_WRITE, /* /< NCQ write Request */
101 SCU_TASK_TYPE_PACKET_DMA_OUT /* /< Packet write request */
102} scu_sata_task_type;
103
104
105/**
106 *
107 *
108 * SCU_CONTEXT_TYPE
109 */
110#define SCU_TASK_CONTEXT_TYPE 0
111#define SCU_RNC_CONTEXT_TYPE 1
112
113/**
114 *
115 *
116 * SCU_TASK_CONTEXT_VALIDITY
117 */
118#define SCU_TASK_CONTEXT_INVALID 0
119#define SCU_TASK_CONTEXT_VALID 1
120
121/**
122 *
123 *
124 * SCU_COMMAND_CODE
125 */
126#define SCU_COMMAND_CODE_INITIATOR_NEW_TASK 0
127#define SCU_COMMAND_CODE_ACTIVE_TASK 1
128#define SCU_COMMAND_CODE_PRIMITIVE_SEQ_TASK 2
129#define SCU_COMMAND_CODE_TARGET_RAW_FRAMES 3
130
131/**
132 *
133 *
134 * SCU_TASK_PRIORITY
135 */
136/**
137 *
138 *
139 * This priority is used when there is no priority request for this request.
140 */
141#define SCU_TASK_PRIORITY_NORMAL 0
142
143/**
144 *
145 *
146 * This priority indicates that the task should be scheduled to the head of the
147 * queue. The task will NOT be executed if the TX is suspended for the remote
148 * node.
149 */
150#define SCU_TASK_PRIORITY_HEAD_OF_Q 1
151
152/**
153 *
154 *
155 * This priority indicates that the task will be executed before all
156 * SCU_TASK_PRIORITY_NORMAL and SCU_TASK_PRIORITY_HEAD_OF_Q tasks. The task
157 * WILL be executed if the TX is suspended for the remote node.
158 */
159#define SCU_TASK_PRIORITY_HIGH 2
160
161/**
162 *
163 *
164 * This task priority is reserved and should not be used.
165 */
166#define SCU_TASK_PRIORITY_RESERVED 3
167
168#define SCU_TASK_INITIATOR_MODE 1
169#define SCU_TASK_TARGET_MODE 0
170
171#define SCU_TASK_REGULAR 0
172#define SCU_TASK_ABORTED 1
173
174/* direction bit defintion */
175/**
176 *
177 *
178 * SATA_DIRECTION
179 */
180#define SCU_SATA_WRITE_DATA_DIRECTION 0
181#define SCU_SATA_READ_DATA_DIRECTION 1
182
183/**
184 *
185 *
186 * SCU_COMMAND_CONTEXT_MACROS These macros provide the mask and shift
187 * operations to construct the various SCU commands
188 */
189#define SCU_CONTEXT_COMMAND_REQUEST_TYPE_SHIFT 21
190#define SCU_CONTEXT_COMMAND_REQUEST_TYPE_MASK 0x00E00000
191#define scu_get_command_request_type(x) \
192 ((x) & SCU_CONTEXT_COMMAND_REQUEST_TYPE_MASK)
193
194#define SCU_CONTEXT_COMMAND_REQUEST_SUBTYPE_SHIFT 18
195#define SCU_CONTEXT_COMMAND_REQUEST_SUBTYPE_MASK 0x001C0000
196#define scu_get_command_request_subtype(x) \
197 ((x) & SCU_CONTEXT_COMMAND_REQUEST_SUBTYPE_MASK)
198
199#define SCU_CONTEXT_COMMAND_REQUEST_FULLTYPE_MASK \
200 (\
201 SCU_CONTEXT_COMMAND_REQUEST_TYPE_MASK \
202 | SCU_CONTEXT_COMMAND_REQUEST_SUBTYPE_MASK \
203 )
204#define scu_get_command_request_full_type(x) \
205 ((x) & SCU_CONTEXT_COMMAND_REQUEST_FULLTYPE_MASK)
206
207#define SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT 16
208#define SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_MASK 0x00010000
209#define scu_get_command_protocl_engine_group(x) \
210 ((x) & SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_MASK)
211
212#define SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT 12
213#define SCU_CONTEXT_COMMAND_LOGICAL_PORT_MASK 0x00007000
214#define scu_get_command_reqeust_logical_port(x) \
215 ((x) & SCU_CONTEXT_COMMAND_LOGICAL_PORT_MASK)
216
217
218#define MAKE_SCU_CONTEXT_COMMAND_TYPE(type) \
219 ((u32)(type) << SCU_CONTEXT_COMMAND_REQUEST_TYPE_SHIFT)
220
221/**
222 * MAKE_SCU_CONTEXT_COMMAND_TYPE() -
223 *
224 * SCU_COMMAND_TYPES These constants provide the grouping of the different SCU
225 * command types.
226 */
227#define SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC MAKE_SCU_CONTEXT_COMMAND_TYPE(0)
228#define SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC MAKE_SCU_CONTEXT_COMMAND_TYPE(1)
229#define SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC MAKE_SCU_CONTEXT_COMMAND_TYPE(2)
230#define SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC MAKE_SCU_CONTEXT_COMMAND_TYPE(3)
231#define SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC MAKE_SCU_CONTEXT_COMMAND_TYPE(6)
232
233#define MAKE_SCU_CONTEXT_COMMAND_REQUEST(type, command) \
234 ((type) | ((command) << SCU_CONTEXT_COMMAND_REQUEST_SUBTYPE_SHIFT))
235
236/**
237 *
238 *
239 * SCU_REQUEST_TYPES These constants are the various request types that can be
240 * posted to the SCU hardware.
241 */
242#define SCU_CONTEXT_COMMAND_REQUST_POST_TC \
243 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC, 0))
244
245#define SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT \
246 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC, 1))
247
248#define SCU_CONTEXT_COMMAND_REQUST_DUMP_TC \
249 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC, 0))
250
251#define SCU_CONTEXT_COMMAND_POST_RNC_32 \
252 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC, 0))
253
254#define SCU_CONTEXT_COMMAND_POST_RNC_96 \
255 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC, 1))
256
257#define SCU_CONTEXT_COMMAND_POST_RNC_INVALIDATE \
258 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC, 2))
259
260#define SCU_CONTEXT_COMMAND_DUMP_RNC_32 \
261 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC, 0))
262
263#define SCU_CONTEXT_COMMAND_DUMP_RNC_96 \
264 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC, 1))
265
266#define SCU_CONTEXT_COMMAND_POST_RNC_SUSPEND_TX \
267 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC, 0))
268
269#define SCU_CONTEXT_COMMAND_POST_RNC_SUSPEND_TX_RX \
270 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC, 1))
271
272#define SCU_CONTEXT_COMMAND_POST_RNC_RESUME \
273 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC, 2))
274
275#define SCU_CONTEXT_IT_NEXUS_LOSS_TIMER_ENABLE \
276 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC, 3))
277
278#define SCU_CONTEXT_IT_NEXUS_LOSS_TIMER_DISABLE \
279 (MAKE_SCU_CONTEXT_COMMAND_REQUEST(SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC, 4))
280
281/**
282 *
283 *
284 * SCU_TASK_CONTEXT_PROTOCOL SCU Task context protocol types this is uesd to
285 * program the SCU Task context protocol field in word 0x00.
286 */
287#define SCU_TASK_CONTEXT_PROTOCOL_SMP 0x00
288#define SCU_TASK_CONTEXT_PROTOCOL_SSP 0x01
289#define SCU_TASK_CONTEXT_PROTOCOL_STP 0x02
290#define SCU_TASK_CONTEXT_PROTOCOL_NONE 0x07
291
292/**
293 * struct ssp_task_context - This is the SCU hardware definition for an SSP
294 * request.
295 *
296 *
297 */
298struct ssp_task_context {
299 /* OFFSET 0x18 */
300 u32 reserved00:24;
301 u32 frame_type:8;
302
303 /* OFFSET 0x1C */
304 u32 reserved01;
305
306 /* OFFSET 0x20 */
307 u32 fill_bytes:2;
308 u32 reserved02:6;
309 u32 changing_data_pointer:1;
310 u32 retransmit:1;
311 u32 retry_data_frame:1;
312 u32 tlr_control:2;
313 u32 reserved03:19;
314
315 /* OFFSET 0x24 */
316 u32 uiRsvd4;
317
318 /* OFFSET 0x28 */
319 u32 target_port_transfer_tag:16;
320 u32 tag:16;
321
322 /* OFFSET 0x2C */
323 u32 data_offset;
324};
325
326/**
327 * struct stp_task_context - This is the SCU hardware definition for an STP
328 * request.
329 *
330 *
331 */
332struct stp_task_context {
333 /* OFFSET 0x18 */
334 u32 fis_type:8;
335 u32 pm_port:4;
336 u32 reserved0:3;
337 u32 control:1;
338 u32 command:8;
339 u32 features:8;
340
341 /* OFFSET 0x1C */
342 u32 reserved1;
343
344 /* OFFSET 0x20 */
345 u32 reserved2;
346
347 /* OFFSET 0x24 */
348 u32 reserved3;
349
350 /* OFFSET 0x28 */
351 u32 ncq_tag:5;
352 u32 reserved4:27;
353
354 /* OFFSET 0x2C */
355 u32 data_offset; /* TODO: What is this used for? */
356};
357
358/**
359 * struct smp_task_context - This is the SCU hardware definition for an SMP
360 * request.
361 *
362 *
363 */
364struct smp_task_context {
365 /* OFFSET 0x18 */
366 u32 response_length:8;
367 u32 function_result:8;
368 u32 function:8;
369 u32 frame_type:8;
370
371 /* OFFSET 0x1C */
372 u32 smp_response_ufi:12;
373 u32 reserved1:20;
374
375 /* OFFSET 0x20 */
376 u32 reserved2;
377
378 /* OFFSET 0x24 */
379 u32 reserved3;
380
381 /* OFFSET 0x28 */
382 u32 reserved4;
383
384 /* OFFSET 0x2C */
385 u32 reserved5;
386};
387
388/**
389 * struct primitive_task_context - This is the SCU hardware definition used
390 * when the driver wants to send a primitive on the link.
391 *
392 *
393 */
394struct primitive_task_context {
395 /* OFFSET 0x18 */
396 /**
397 * This field is the control word and it must be 0.
398 */
399 u32 control; /* /< must be set to 0 */
400
401 /* OFFSET 0x1C */
402 /**
403 * This field specifies the primitive that is to be transmitted.
404 */
405 u32 sequence;
406
407 /* OFFSET 0x20 */
408 u32 reserved0;
409
410 /* OFFSET 0x24 */
411 u32 reserved1;
412
413 /* OFFSET 0x28 */
414 u32 reserved2;
415
416 /* OFFSET 0x2C */
417 u32 reserved3;
418};
419
420/**
421 * The union of the protocols that can be selected in the SCU task context
422 * field.
423 *
424 * protocol_context
425 */
426union protocol_context {
427 struct ssp_task_context ssp;
428 struct stp_task_context stp;
429 struct smp_task_context smp;
430 struct primitive_task_context primitive;
431 u32 words[6];
432};
433
434/**
435 * struct scu_sgl_element - This structure represents a single SCU defined SGL
436 * element. SCU SGLs contain a 64 bit address with the maximum data transfer
437 * being 24 bits in size. The SGL can not cross a 4GB boundary.
438 *
439 * struct scu_sgl_element
440 */
441struct scu_sgl_element {
442 /**
443 * This field is the upper 32 bits of the 64 bit physical address.
444 */
445 u32 address_upper;
446
447 /**
448 * This field is the lower 32 bits of the 64 bit physical address.
449 */
450 u32 address_lower;
451
452 /**
453 * This field is the number of bytes to transfer.
454 */
455 u32 length:24;
456
457 /**
458 * This field is the address modifier to be used when a virtual function is
459 * requesting a data transfer.
460 */
461 u32 address_modifier:8;
462
463};
464
465#define SCU_SGL_ELEMENT_PAIR_A 0
466#define SCU_SGL_ELEMENT_PAIR_B 1
467
468/**
469 * struct scu_sgl_element_pair - This structure is the SCU hardware definition
470 * of a pair of SGL elements. The SCU hardware always works on SGL pairs.
471 * They are refered to in the DS specification as SGL A and SGL B. Each SGL
472 * pair is followed by the address of the next pair.
473 *
474 *
475 */
476struct scu_sgl_element_pair {
477 /* OFFSET 0x60-0x68 */
478 /**
479 * This field is the SGL element A of the SGL pair.
480 */
481 struct scu_sgl_element A;
482
483 /* OFFSET 0x6C-0x74 */
484 /**
485 * This field is the SGL element B of the SGL pair.
486 */
487 struct scu_sgl_element B;
488
489 /* OFFSET 0x78-0x7C */
490 /**
491 * This field is the upper 32 bits of the 64 bit address to the next SGL
492 * element pair.
493 */
494 u32 next_pair_upper;
495
496 /**
497 * This field is the lower 32 bits of the 64 bit address to the next SGL
498 * element pair.
499 */
500 u32 next_pair_lower;
501
502};
503
504/**
505 * struct transport_snapshot - This structure is the SCU hardware scratch area
506 * for the task context. This is set to 0 by the driver but can be read by
507 * issuing a dump TC request to the SCU.
508 *
509 *
510 */
511struct transport_snapshot {
512 /* OFFSET 0x48 */
513 u32 xfer_rdy_write_data_length;
514
515 /* OFFSET 0x4C */
516 u32 data_offset;
517
518 /* OFFSET 0x50 */
519 u32 data_transfer_size:24;
520 u32 reserved_50_0:8;
521
522 /* OFFSET 0x54 */
523 u32 next_initiator_write_data_offset;
524
525 /* OFFSET 0x58 */
526 u32 next_initiator_write_data_xfer_size:24;
527 u32 reserved_58_0:8;
528};
529
530/**
531 * struct scu_task_context - This structure defines the contents of the SCU
532 * silicon task context. It lays out all of the fields according to the
533 * expected order and location for the Storage Controller unit.
534 *
535 *
536 */
537struct scu_task_context {
538 /* OFFSET 0x00 ------ */
539 /**
540 * This field must be encoded to one of the valid SCU task priority values
541 * - SCU_TASK_PRIORITY_NORMAL
542 * - SCU_TASK_PRIORITY_HEAD_OF_Q
543 * - SCU_TASK_PRIORITY_HIGH
544 */
545 u32 priority:2;
546
547 /**
548 * This field must be set to true if this is an initiator generated request.
549 * Until target mode is supported all task requests are initiator requests.
550 */
551 u32 initiator_request:1;
552
553 /**
554 * This field must be set to one of the valid connection rates valid values
555 * are 0x8, 0x9, and 0xA.
556 */
557 u32 connection_rate:4;
558
559 /**
560 * This field muse be programed when generating an SMP response since the SMP
561 * connection remains open until the SMP response is generated.
562 */
563 u32 protocol_engine_index:3;
564
565 /**
566 * This field must contain the logical port for the task request.
567 */
568 u32 logical_port_index:3;
569
570 /**
571 * This field must be set to one of the SCU_TASK_CONTEXT_PROTOCOL values
572 * - SCU_TASK_CONTEXT_PROTOCOL_SMP
573 * - SCU_TASK_CONTEXT_PROTOCOL_SSP
574 * - SCU_TASK_CONTEXT_PROTOCOL_STP
575 * - SCU_TASK_CONTEXT_PROTOCOL_NONE
576 */
577 u32 protocol_type:3;
578
579 /**
580 * This filed must be set to the TCi allocated for this task
581 */
582 u32 task_index:12;
583
584 /**
585 * This field is reserved and must be set to 0x00
586 */
587 u32 reserved_00_0:1;
588
589 /**
590 * For a normal task request this must be set to 0. If this is an abort of
591 * this task request it must be set to 1.
592 */
593 u32 abort:1;
594
595 /**
596 * This field must be set to true for the SCU hardware to process the task.
597 */
598 u32 valid:1;
599
600 /**
601 * This field must be set to SCU_TASK_CONTEXT_TYPE
602 */
603 u32 context_type:1;
604
605 /* OFFSET 0x04 */
606 /**
607 * This field contains the RNi that is the target of this request.
608 */
609 u32 remote_node_index:12;
610
611 /**
612 * This field is programmed if this is a mirrored request, which we are not
613 * using, in which case it is the RNi for the mirrored target.
614 */
615 u32 mirrored_node_index:12;
616
617 /**
618 * This field is programmed with the direction of the SATA reqeust
619 * - SCU_SATA_WRITE_DATA_DIRECTION
620 * - SCU_SATA_READ_DATA_DIRECTION
621 */
622 u32 sata_direction:1;
623
624 /**
625 * This field is programmsed with one of the following SCU_COMMAND_CODE
626 * - SCU_COMMAND_CODE_INITIATOR_NEW_TASK
627 * - SCU_COMMAND_CODE_ACTIVE_TASK
628 * - SCU_COMMAND_CODE_PRIMITIVE_SEQ_TASK
629 * - SCU_COMMAND_CODE_TARGET_RAW_FRAMES
630 */
631 u32 command_code:2;
632
633 /**
634 * This field is set to true if the remote node should be suspended.
635 * This bit is only valid for SSP & SMP target devices.
636 */
637 u32 suspend_node:1;
638
639 /**
640 * This field is programmed with one of the following command type codes
641 *
642 * For SAS requests use the scu_ssp_task_type
643 * - SCU_TASK_TYPE_IOREAD
644 * - SCU_TASK_TYPE_IOWRITE
645 * - SCU_TASK_TYPE_SMP_REQUEST
646 * - SCU_TASK_TYPE_RESPONSE
647 * - SCU_TASK_TYPE_RAW_FRAME
648 * - SCU_TASK_TYPE_PRIMITIVE
649 *
650 * For SATA requests use the scu_sata_task_type
651 * - SCU_TASK_TYPE_DMA_IN
652 * - SCU_TASK_TYPE_FPDMAQ_READ
653 * - SCU_TASK_TYPE_PACKET_DMA_IN
654 * - SCU_TASK_TYPE_SATA_RAW_FRAME
655 * - SCU_TASK_TYPE_DMA_OUT
656 * - SCU_TASK_TYPE_FPDMAQ_WRITE
657 * - SCU_TASK_TYPE_PACKET_DMA_OUT
658 */
659 u32 task_type:4;
660
661 /* OFFSET 0x08 */
662 /**
663 * This field is reserved and the must be set to 0x00
664 */
665 u32 link_layer_control:8; /* presently all reserved */
666
667 /**
668 * This field is set to true when TLR is to be enabled
669 */
670 u32 ssp_tlr_enable:1;
671
672 /**
673 * This is field specifies if the SCU DMAs a response frame to host
674 * memory for good response frames when operating in target mode.
675 */
676 u32 dma_ssp_target_good_response:1;
677
678 /**
679 * This field indicates if the SCU should DMA the response frame to
680 * host memory.
681 */
682 u32 do_not_dma_ssp_good_response:1;
683
684 /**
685 * This field is set to true when strict ordering is to be enabled
686 */
687 u32 strict_ordering:1;
688
689 /**
690 * This field indicates the type of endianess to be utilized for the
691 * frame. command, task, and response frames utilized control_frame
692 * set to 1.
693 */
694 u32 control_frame:1;
695
696 /**
697 * This field is reserved and the driver should set to 0x00
698 */
699 u32 tl_control_reserved:3;
700
701 /**
702 * This field is set to true when the SCU hardware task timeout control is to
703 * be enabled
704 */
705 u32 timeout_enable:1;
706
707 /**
708 * This field is reserved and the driver should set it to 0x00
709 */
710 u32 pts_control_reserved:7;
711
712 /**
713 * This field should be set to true when block guard is to be enabled
714 */
715 u32 block_guard_enable:1;
716
717 /**
718 * This field is reserved and the driver should set to 0x00
719 */
720 u32 sdma_control_reserved:7;
721
722 /* OFFSET 0x0C */
723 /**
724 * This field is the address modifier for this io request it should be
725 * programmed with the virtual function that is making the request.
726 */
727 u32 address_modifier:16;
728
729 /**
730 * @todo What we support mirrored SMP response frame?
731 */
732 u32 mirrored_protocol_engine:3; /* mirrored protocol Engine Index */
733
734 /**
735 * If this is a mirrored request the logical port index for the mirrored RNi
736 * must be programmed.
737 */
738 u32 mirrored_logical_port:4; /* mirrored local port index */
739
740 /**
741 * This field is reserved and the driver must set it to 0x00
742 */
743 u32 reserved_0C_0:8;
744
745 /**
746 * This field must be set to true if the mirrored request processing is to be
747 * enabled.
748 */
749 u32 mirror_request_enable:1; /* Mirrored request Enable */
750
751 /* OFFSET 0x10 */
752 /**
753 * This field is the command iu length in dwords
754 */
755 u32 ssp_command_iu_length:8;
756
757 /**
758 * This is the target TLR enable bit it must be set to 0 when creatning the
759 * task context.
760 */
761 u32 xfer_ready_tlr_enable:1;
762
763 /**
764 * This field is reserved and the driver must set it to 0x00
765 */
766 u32 reserved_10_0:7;
767
768 /**
769 * This is the maximum burst size that the SCU hardware will send in one
770 * connection its value is (N x 512) and N must be a multiple of 2. If the
771 * value is 0x00 then maximum burst size is disabled.
772 */
773 u32 ssp_max_burst_size:16;
774
775 /* OFFSET 0x14 */
776 /**
777 * This filed is set to the number of bytes to be transfered in the request.
778 */
779 u32 transfer_length_bytes:24; /* In terms of bytes */
780
781 /**
782 * This field is reserved and the driver should set it to 0x00
783 */
784 u32 reserved_14_0:8;
785
786 /* OFFSET 0x18-0x2C */
787 /**
788 * This union provides for the protocol specif part of the SCU Task Context.
789 */
790 union protocol_context type;
791
792 /* OFFSET 0x30-0x34 */
793 /**
794 * This field is the upper 32 bits of the 64 bit physical address of the
795 * command iu buffer
796 */
797 u32 command_iu_upper;
798
799 /**
800 * This field is the lower 32 bits of the 64 bit physical address of the
801 * command iu buffer
802 */
803 u32 command_iu_lower;
804
805 /* OFFSET 0x38-0x3C */
806 /**
807 * This field is the upper 32 bits of the 64 bit physical address of the
808 * response iu buffer
809 */
810 u32 response_iu_upper;
811
812 /**
813 * This field is the lower 32 bits of the 64 bit physical address of the
814 * response iu buffer
815 */
816 u32 response_iu_lower;
817
818 /* OFFSET 0x40 */
819 /**
820 * This field is set to the task phase of the SCU hardware. The driver must
821 * set this to 0x01
822 */
823 u32 task_phase:8;
824
825 /**
826 * This field is set to the transport layer task status. The driver must set
827 * this to 0x00
828 */
829 u32 task_status:8;
830
831 /**
832 * This field is used during initiator write TLR
833 */
834 u32 previous_extended_tag:4;
835
836 /**
837 * This field is set the maximum number of retries for a STP non-data FIS
838 */
839 u32 stp_retry_count:2;
840
841 /**
842 * This field is reserved and the driver must set it to 0x00
843 */
844 u32 reserved_40_1:2;
845
846 /**
847 * This field is used by the SCU TL to determine when to take a snapshot when
848 * tranmitting read data frames.
849 * - 0x00 The entire IO
850 * - 0x01 32k
851 * - 0x02 64k
852 * - 0x04 128k
853 * - 0x08 256k
854 */
855 u32 ssp_tlr_threshold:4;
856
857 /**
858 * This field is reserved and the driver must set it to 0x00
859 */
860 u32 reserved_40_2:4;
861
862 /* OFFSET 0x44 */
863 u32 write_data_length; /* read only set to 0 */
864
865 /* OFFSET 0x48-0x58 */
866 struct transport_snapshot snapshot; /* read only set to 0 */
867
868 /* OFFSET 0x5C */
869 u32 block_protection_enable:1;
870 u32 block_size:2;
871 u32 block_protection_function:2;
872 u32 reserved_5C_0:9;
873 u32 active_sgl_element:2; /* read only set to 0 */
874 u32 sgl_exhausted:1; /* read only set to 0 */
875 u32 payload_data_transfer_error:4; /* read only set to 0 */
876 u32 frame_buffer_offset:11; /* read only set to 0 */
877
878 /* OFFSET 0x60-0x7C */
879 /**
880 * This field is the first SGL element pair found in the TC data structure.
881 */
882 struct scu_sgl_element_pair sgl_pair_ab;
883 /* OFFSET 0x80-0x9C */
884 /**
885 * This field is the second SGL element pair found in the TC data structure.
886 */
887 struct scu_sgl_element_pair sgl_pair_cd;
888
889 /* OFFSET 0xA0-BC */
890 struct scu_sgl_element_pair sgl_snapshot_ac;
891
892 /* OFFSET 0xC0 */
893 u32 active_sgl_element_pair; /* read only set to 0 */
894
895 /* OFFSET 0xC4-0xCC */
896 u32 reserved_C4_CC[3];
897
898 /* OFFSET 0xD0 */
899 u32 intermediate_crc_value:16;
900 u32 initial_crc_seed:16;
901
902 /* OFFSET 0xD4 */
903 u32 application_tag_for_verify:16;
904 u32 application_tag_for_generate:16;
905
906 /* OFFSET 0xD8 */
907 u32 reference_tag_seed_for_verify_function;
908
909 /* OFFSET 0xDC */
910 u32 reserved_DC;
911
912 /* OFFSET 0xE0 */
913 u32 reserved_E0_0:16;
914 u32 application_tag_mask_for_generate:16;
915
916 /* OFFSET 0xE4 */
917 u32 block_protection_control:16;
918 u32 application_tag_mask_for_verify:16;
919
920 /* OFFSET 0xE8 */
921 u32 block_protection_error:8;
922 u32 reserved_E8_0:24;
923
924 /* OFFSET 0xEC */
925 u32 reference_tag_seed_for_verify;
926
927 /* OFFSET 0xF0 */
928 u32 intermediate_crc_valid_snapshot:16;
929 u32 reserved_F0_0:16;
930
931 /* OFFSET 0xF4 */
932 u32 reference_tag_seed_for_verify_function_snapshot;
933
934 /* OFFSET 0xF8 */
935 u32 snapshot_of_reserved_dword_DC_of_tc;
936
937 /* OFFSET 0xFC */
938 u32 reference_tag_seed_for_generate_function_snapshot;
939
940};
941
942#endif /* _SCU_TASK_CONTEXT_H_ */
diff --git a/drivers/scsi/isci/task.c b/drivers/scsi/isci/task.c
new file mode 100644
index 000000000000..d6bcdd013dc9
--- /dev/null
+++ b/drivers/scsi/isci/task.c
@@ -0,0 +1,1676 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include <linux/completion.h>
57#include <linux/irqflags.h>
58#include "sas.h"
59#include <scsi/libsas.h>
60#include "remote_device.h"
61#include "remote_node_context.h"
62#include "isci.h"
63#include "request.h"
64#include "task.h"
65#include "host.h"
66
67/**
68* isci_task_refuse() - complete the request to the upper layer driver in
69* the case where an I/O needs to be completed back in the submit path.
70* @ihost: host on which the the request was queued
71* @task: request to complete
72* @response: response code for the completed task.
73* @status: status code for the completed task.
74*
75*/
76static void isci_task_refuse(struct isci_host *ihost, struct sas_task *task,
77 enum service_response response,
78 enum exec_status status)
79
80{
81 enum isci_completion_selection disposition;
82
83 disposition = isci_perform_normal_io_completion;
84 disposition = isci_task_set_completion_status(task, response, status,
85 disposition);
86
87 /* Tasks aborted specifically by a call to the lldd_abort_task
88 * function should not be completed to the host in the regular path.
89 */
90 switch (disposition) {
91 case isci_perform_normal_io_completion:
92 /* Normal notification (task_done) */
93 dev_dbg(&ihost->pdev->dev,
94 "%s: Normal - task = %p, response=%d, "
95 "status=%d\n",
96 __func__, task, response, status);
97
98 task->lldd_task = NULL;
99
100 isci_execpath_callback(ihost, task, task->task_done);
101 break;
102
103 case isci_perform_aborted_io_completion:
104 /*
105 * No notification because this request is already in the
106 * abort path.
107 */
108 dev_dbg(&ihost->pdev->dev,
109 "%s: Aborted - task = %p, response=%d, "
110 "status=%d\n",
111 __func__, task, response, status);
112 break;
113
114 case isci_perform_error_io_completion:
115 /* Use sas_task_abort */
116 dev_dbg(&ihost->pdev->dev,
117 "%s: Error - task = %p, response=%d, "
118 "status=%d\n",
119 __func__, task, response, status);
120
121 isci_execpath_callback(ihost, task, sas_task_abort);
122 break;
123
124 default:
125 dev_dbg(&ihost->pdev->dev,
126 "%s: isci task notification default case!",
127 __func__);
128 sas_task_abort(task);
129 break;
130 }
131}
132
133#define for_each_sas_task(num, task) \
134 for (; num > 0; num--,\
135 task = list_entry(task->list.next, struct sas_task, list))
136
137
138static inline int isci_device_io_ready(struct isci_remote_device *idev,
139 struct sas_task *task)
140{
141 return idev ? test_bit(IDEV_IO_READY, &idev->flags) ||
142 (test_bit(IDEV_IO_NCQERROR, &idev->flags) &&
143 isci_task_is_ncq_recovery(task))
144 : 0;
145}
146/**
147 * isci_task_execute_task() - This function is one of the SAS Domain Template
148 * functions. This function is called by libsas to send a task down to
149 * hardware.
150 * @task: This parameter specifies the SAS task to send.
151 * @num: This parameter specifies the number of tasks to queue.
152 * @gfp_flags: This parameter specifies the context of this call.
153 *
154 * status, zero indicates success.
155 */
156int isci_task_execute_task(struct sas_task *task, int num, gfp_t gfp_flags)
157{
158 struct isci_host *ihost = dev_to_ihost(task->dev);
159 struct isci_remote_device *idev;
160 unsigned long flags;
161 bool io_ready;
162 u16 tag;
163
164 dev_dbg(&ihost->pdev->dev, "%s: num=%d\n", __func__, num);
165
166 for_each_sas_task(num, task) {
167 enum sci_status status = SCI_FAILURE;
168
169 spin_lock_irqsave(&ihost->scic_lock, flags);
170 idev = isci_lookup_device(task->dev);
171 io_ready = isci_device_io_ready(idev, task);
172 tag = isci_alloc_tag(ihost);
173 spin_unlock_irqrestore(&ihost->scic_lock, flags);
174
175 dev_dbg(&ihost->pdev->dev,
176 "task: %p, num: %d dev: %p idev: %p:%#lx cmd = %p\n",
177 task, num, task->dev, idev, idev ? idev->flags : 0,
178 task->uldd_task);
179
180 if (!idev) {
181 isci_task_refuse(ihost, task, SAS_TASK_UNDELIVERED,
182 SAS_DEVICE_UNKNOWN);
183 } else if (!io_ready || tag == SCI_CONTROLLER_INVALID_IO_TAG) {
184 /* Indicate QUEUE_FULL so that the scsi midlayer
185 * retries.
186 */
187 isci_task_refuse(ihost, task, SAS_TASK_COMPLETE,
188 SAS_QUEUE_FULL);
189 } else {
190 /* There is a device and it's ready for I/O. */
191 spin_lock_irqsave(&task->task_state_lock, flags);
192
193 if (task->task_state_flags & SAS_TASK_STATE_ABORTED) {
194 /* The I/O was aborted. */
195 spin_unlock_irqrestore(&task->task_state_lock,
196 flags);
197
198 isci_task_refuse(ihost, task,
199 SAS_TASK_UNDELIVERED,
200 SAM_STAT_TASK_ABORTED);
201 } else {
202 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
203 spin_unlock_irqrestore(&task->task_state_lock, flags);
204
205 /* build and send the request. */
206 status = isci_request_execute(ihost, idev, task, tag);
207
208 if (status != SCI_SUCCESS) {
209
210 spin_lock_irqsave(&task->task_state_lock, flags);
211 /* Did not really start this command. */
212 task->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
213 spin_unlock_irqrestore(&task->task_state_lock, flags);
214
215 /* Indicate QUEUE_FULL so that the scsi
216 * midlayer retries. if the request
217 * failed for remote device reasons,
218 * it gets returned as
219 * SAS_TASK_UNDELIVERED next time
220 * through.
221 */
222 isci_task_refuse(ihost, task,
223 SAS_TASK_COMPLETE,
224 SAS_QUEUE_FULL);
225 }
226 }
227 }
228 if (status != SCI_SUCCESS && tag != SCI_CONTROLLER_INVALID_IO_TAG) {
229 spin_lock_irqsave(&ihost->scic_lock, flags);
230 /* command never hit the device, so just free
231 * the tci and skip the sequence increment
232 */
233 isci_tci_free(ihost, ISCI_TAG_TCI(tag));
234 spin_unlock_irqrestore(&ihost->scic_lock, flags);
235 }
236 isci_put_device(idev);
237 }
238 return 0;
239}
240
241static enum sci_status isci_sata_management_task_request_build(struct isci_request *ireq)
242{
243 struct isci_tmf *isci_tmf;
244 enum sci_status status;
245
246 if (tmf_task != ireq->ttype)
247 return SCI_FAILURE;
248
249 isci_tmf = isci_request_access_tmf(ireq);
250
251 switch (isci_tmf->tmf_code) {
252
253 case isci_tmf_sata_srst_high:
254 case isci_tmf_sata_srst_low: {
255 struct host_to_dev_fis *fis = &ireq->stp.cmd;
256
257 memset(fis, 0, sizeof(*fis));
258
259 fis->fis_type = 0x27;
260 fis->flags &= ~0x80;
261 fis->flags &= 0xF0;
262 if (isci_tmf->tmf_code == isci_tmf_sata_srst_high)
263 fis->control |= ATA_SRST;
264 else
265 fis->control &= ~ATA_SRST;
266 break;
267 }
268 /* other management commnd go here... */
269 default:
270 return SCI_FAILURE;
271 }
272
273 /* core builds the protocol specific request
274 * based on the h2d fis.
275 */
276 status = sci_task_request_construct_sata(ireq);
277
278 return status;
279}
280
281static struct isci_request *isci_task_request_build(struct isci_host *ihost,
282 struct isci_remote_device *idev,
283 u16 tag, struct isci_tmf *isci_tmf)
284{
285 enum sci_status status = SCI_FAILURE;
286 struct isci_request *ireq = NULL;
287 struct domain_device *dev;
288
289 dev_dbg(&ihost->pdev->dev,
290 "%s: isci_tmf = %p\n", __func__, isci_tmf);
291
292 dev = idev->domain_dev;
293
294 /* do common allocation and init of request object. */
295 ireq = isci_tmf_request_from_tag(ihost, isci_tmf, tag);
296 if (!ireq)
297 return NULL;
298
299 /* let the core do it's construct. */
300 status = sci_task_request_construct(ihost, idev, tag,
301 ireq);
302
303 if (status != SCI_SUCCESS) {
304 dev_warn(&ihost->pdev->dev,
305 "%s: sci_task_request_construct failed - "
306 "status = 0x%x\n",
307 __func__,
308 status);
309 return NULL;
310 }
311
312 /* XXX convert to get this from task->tproto like other drivers */
313 if (dev->dev_type == SAS_END_DEV) {
314 isci_tmf->proto = SAS_PROTOCOL_SSP;
315 status = sci_task_request_construct_ssp(ireq);
316 if (status != SCI_SUCCESS)
317 return NULL;
318 }
319
320 if (dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) {
321 isci_tmf->proto = SAS_PROTOCOL_SATA;
322 status = isci_sata_management_task_request_build(ireq);
323
324 if (status != SCI_SUCCESS)
325 return NULL;
326 }
327 return ireq;
328}
329
330static int isci_task_execute_tmf(struct isci_host *ihost,
331 struct isci_remote_device *idev,
332 struct isci_tmf *tmf, unsigned long timeout_ms)
333{
334 DECLARE_COMPLETION_ONSTACK(completion);
335 enum sci_task_status status = SCI_TASK_FAILURE;
336 struct isci_request *ireq;
337 int ret = TMF_RESP_FUNC_FAILED;
338 unsigned long flags;
339 unsigned long timeleft;
340 u16 tag;
341
342 spin_lock_irqsave(&ihost->scic_lock, flags);
343 tag = isci_alloc_tag(ihost);
344 spin_unlock_irqrestore(&ihost->scic_lock, flags);
345
346 if (tag == SCI_CONTROLLER_INVALID_IO_TAG)
347 return ret;
348
349 /* sanity check, return TMF_RESP_FUNC_FAILED
350 * if the device is not there and ready.
351 */
352 if (!idev ||
353 (!test_bit(IDEV_IO_READY, &idev->flags) &&
354 !test_bit(IDEV_IO_NCQERROR, &idev->flags))) {
355 dev_dbg(&ihost->pdev->dev,
356 "%s: idev = %p not ready (%#lx)\n",
357 __func__,
358 idev, idev ? idev->flags : 0);
359 goto err_tci;
360 } else
361 dev_dbg(&ihost->pdev->dev,
362 "%s: idev = %p\n",
363 __func__, idev);
364
365 /* Assign the pointer to the TMF's completion kernel wait structure. */
366 tmf->complete = &completion;
367
368 ireq = isci_task_request_build(ihost, idev, tag, tmf);
369 if (!ireq)
370 goto err_tci;
371
372 spin_lock_irqsave(&ihost->scic_lock, flags);
373
374 /* start the TMF io. */
375 status = sci_controller_start_task(ihost, idev, ireq);
376
377 if (status != SCI_TASK_SUCCESS) {
378 dev_dbg(&ihost->pdev->dev,
379 "%s: start_io failed - status = 0x%x, request = %p\n",
380 __func__,
381 status,
382 ireq);
383 spin_unlock_irqrestore(&ihost->scic_lock, flags);
384 goto err_tci;
385 }
386
387 if (tmf->cb_state_func != NULL)
388 tmf->cb_state_func(isci_tmf_started, tmf, tmf->cb_data);
389
390 isci_request_change_state(ireq, started);
391
392 /* add the request to the remote device request list. */
393 list_add(&ireq->dev_node, &idev->reqs_in_process);
394
395 spin_unlock_irqrestore(&ihost->scic_lock, flags);
396
397 /* Wait for the TMF to complete, or a timeout. */
398 timeleft = wait_for_completion_timeout(&completion,
399 msecs_to_jiffies(timeout_ms));
400
401 if (timeleft == 0) {
402 spin_lock_irqsave(&ihost->scic_lock, flags);
403
404 if (tmf->cb_state_func != NULL)
405 tmf->cb_state_func(isci_tmf_timed_out, tmf, tmf->cb_data);
406
407 sci_controller_terminate_request(ihost,
408 idev,
409 ireq);
410
411 spin_unlock_irqrestore(&ihost->scic_lock, flags);
412
413 wait_for_completion(tmf->complete);
414 }
415
416 isci_print_tmf(tmf);
417
418 if (tmf->status == SCI_SUCCESS)
419 ret = TMF_RESP_FUNC_COMPLETE;
420 else if (tmf->status == SCI_FAILURE_IO_RESPONSE_VALID) {
421 dev_dbg(&ihost->pdev->dev,
422 "%s: tmf.status == "
423 "SCI_FAILURE_IO_RESPONSE_VALID\n",
424 __func__);
425 ret = TMF_RESP_FUNC_COMPLETE;
426 }
427 /* Else - leave the default "failed" status alone. */
428
429 dev_dbg(&ihost->pdev->dev,
430 "%s: completed request = %p\n",
431 __func__,
432 ireq);
433
434 return ret;
435
436 err_tci:
437 spin_lock_irqsave(&ihost->scic_lock, flags);
438 isci_tci_free(ihost, ISCI_TAG_TCI(tag));
439 spin_unlock_irqrestore(&ihost->scic_lock, flags);
440
441 return ret;
442}
443
444static void isci_task_build_tmf(struct isci_tmf *tmf,
445 enum isci_tmf_function_codes code,
446 void (*tmf_sent_cb)(enum isci_tmf_cb_state,
447 struct isci_tmf *,
448 void *),
449 void *cb_data)
450{
451 memset(tmf, 0, sizeof(*tmf));
452
453 tmf->tmf_code = code;
454 tmf->cb_state_func = tmf_sent_cb;
455 tmf->cb_data = cb_data;
456}
457
458static void isci_task_build_abort_task_tmf(struct isci_tmf *tmf,
459 enum isci_tmf_function_codes code,
460 void (*tmf_sent_cb)(enum isci_tmf_cb_state,
461 struct isci_tmf *,
462 void *),
463 struct isci_request *old_request)
464{
465 isci_task_build_tmf(tmf, code, tmf_sent_cb, old_request);
466 tmf->io_tag = old_request->io_tag;
467}
468
469/**
470 * isci_task_validate_request_to_abort() - This function checks the given I/O
471 * against the "started" state. If the request is still "started", it's
472 * state is changed to aborted. NOTE: isci_host->scic_lock MUST BE HELD
473 * BEFORE CALLING THIS FUNCTION.
474 * @isci_request: This parameter specifies the request object to control.
475 * @isci_host: This parameter specifies the ISCI host object
476 * @isci_device: This is the device to which the request is pending.
477 * @aborted_io_completion: This is a completion structure that will be added to
478 * the request in case it is changed to aborting; this completion is
479 * triggered when the request is fully completed.
480 *
481 * Either "started" on successful change of the task status to "aborted", or
482 * "unallocated" if the task cannot be controlled.
483 */
484static enum isci_request_status isci_task_validate_request_to_abort(
485 struct isci_request *isci_request,
486 struct isci_host *isci_host,
487 struct isci_remote_device *isci_device,
488 struct completion *aborted_io_completion)
489{
490 enum isci_request_status old_state = unallocated;
491
492 /* Only abort the task if it's in the
493 * device's request_in_process list
494 */
495 if (isci_request && !list_empty(&isci_request->dev_node)) {
496 old_state = isci_request_change_started_to_aborted(
497 isci_request, aborted_io_completion);
498
499 }
500
501 return old_state;
502}
503
504/**
505* isci_request_cleanup_completed_loiterer() - This function will take care of
506* the final cleanup on any request which has been explicitly terminated.
507* @isci_host: This parameter specifies the ISCI host object
508* @isci_device: This is the device to which the request is pending.
509* @isci_request: This parameter specifies the terminated request object.
510* @task: This parameter is the libsas I/O request.
511*/
512static void isci_request_cleanup_completed_loiterer(
513 struct isci_host *isci_host,
514 struct isci_remote_device *isci_device,
515 struct isci_request *isci_request,
516 struct sas_task *task)
517{
518 unsigned long flags;
519
520 dev_dbg(&isci_host->pdev->dev,
521 "%s: isci_device=%p, request=%p, task=%p\n",
522 __func__, isci_device, isci_request, task);
523
524 if (task != NULL) {
525
526 spin_lock_irqsave(&task->task_state_lock, flags);
527 task->lldd_task = NULL;
528
529 task->task_state_flags &= ~SAS_TASK_NEED_DEV_RESET;
530
531 isci_set_task_doneflags(task);
532
533 /* If this task is not in the abort path, call task_done. */
534 if (!(task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
535
536 spin_unlock_irqrestore(&task->task_state_lock, flags);
537 task->task_done(task);
538 } else
539 spin_unlock_irqrestore(&task->task_state_lock, flags);
540 }
541
542 if (isci_request != NULL) {
543 spin_lock_irqsave(&isci_host->scic_lock, flags);
544 list_del_init(&isci_request->dev_node);
545 spin_unlock_irqrestore(&isci_host->scic_lock, flags);
546 }
547}
548
549/**
550 * isci_terminate_request_core() - This function will terminate the given
551 * request, and wait for it to complete. This function must only be called
552 * from a thread that can wait. Note that the request is terminated and
553 * completed (back to the host, if started there).
554 * @ihost: This SCU.
555 * @idev: The target.
556 * @isci_request: The I/O request to be terminated.
557 *
558 */
559static void isci_terminate_request_core(struct isci_host *ihost,
560 struct isci_remote_device *idev,
561 struct isci_request *isci_request)
562{
563 enum sci_status status = SCI_SUCCESS;
564 bool was_terminated = false;
565 bool needs_cleanup_handling = false;
566 enum isci_request_status request_status;
567 unsigned long flags;
568 unsigned long termination_completed = 1;
569 struct completion *io_request_completion;
570 struct sas_task *task;
571
572 dev_dbg(&ihost->pdev->dev,
573 "%s: device = %p; request = %p\n",
574 __func__, idev, isci_request);
575
576 spin_lock_irqsave(&ihost->scic_lock, flags);
577
578 io_request_completion = isci_request->io_request_completion;
579
580 task = (isci_request->ttype == io_task)
581 ? isci_request_access_task(isci_request)
582 : NULL;
583
584 /* Note that we are not going to control
585 * the target to abort the request.
586 */
587 set_bit(IREQ_COMPLETE_IN_TARGET, &isci_request->flags);
588
589 /* Make sure the request wasn't just sitting around signalling
590 * device condition (if the request handle is NULL, then the
591 * request completed but needed additional handling here).
592 */
593 if (!test_bit(IREQ_TERMINATED, &isci_request->flags)) {
594 was_terminated = true;
595 needs_cleanup_handling = true;
596 status = sci_controller_terminate_request(ihost,
597 idev,
598 isci_request);
599 }
600 spin_unlock_irqrestore(&ihost->scic_lock, flags);
601
602 /*
603 * The only time the request to terminate will
604 * fail is when the io request is completed and
605 * being aborted.
606 */
607 if (status != SCI_SUCCESS) {
608 dev_dbg(&ihost->pdev->dev,
609 "%s: sci_controller_terminate_request"
610 " returned = 0x%x\n",
611 __func__, status);
612
613 isci_request->io_request_completion = NULL;
614
615 } else {
616 if (was_terminated) {
617 dev_dbg(&ihost->pdev->dev,
618 "%s: before completion wait (%p/%p)\n",
619 __func__, isci_request, io_request_completion);
620
621 /* Wait here for the request to complete. */
622 #define TERMINATION_TIMEOUT_MSEC 500
623 termination_completed
624 = wait_for_completion_timeout(
625 io_request_completion,
626 msecs_to_jiffies(TERMINATION_TIMEOUT_MSEC));
627
628 if (!termination_completed) {
629
630 /* The request to terminate has timed out. */
631 spin_lock_irqsave(&ihost->scic_lock,
632 flags);
633
634 /* Check for state changes. */
635 if (!test_bit(IREQ_TERMINATED, &isci_request->flags)) {
636
637 /* The best we can do is to have the
638 * request die a silent death if it
639 * ever really completes.
640 *
641 * Set the request state to "dead",
642 * and clear the task pointer so that
643 * an actual completion event callback
644 * doesn't do anything.
645 */
646 isci_request->status = dead;
647 isci_request->io_request_completion
648 = NULL;
649
650 if (isci_request->ttype == io_task) {
651
652 /* Break links with the
653 * sas_task.
654 */
655 isci_request->ttype_ptr.io_task_ptr
656 = NULL;
657 }
658 } else
659 termination_completed = 1;
660
661 spin_unlock_irqrestore(&ihost->scic_lock,
662 flags);
663
664 if (!termination_completed) {
665
666 dev_dbg(&ihost->pdev->dev,
667 "%s: *** Timeout waiting for "
668 "termination(%p/%p)\n",
669 __func__, io_request_completion,
670 isci_request);
671
672 /* The request can no longer be referenced
673 * safely since it may go away if the
674 * termination every really does complete.
675 */
676 isci_request = NULL;
677 }
678 }
679 if (termination_completed)
680 dev_dbg(&ihost->pdev->dev,
681 "%s: after completion wait (%p/%p)\n",
682 __func__, isci_request, io_request_completion);
683 }
684
685 if (termination_completed) {
686
687 isci_request->io_request_completion = NULL;
688
689 /* Peek at the status of the request. This will tell
690 * us if there was special handling on the request such that it
691 * needs to be detached and freed here.
692 */
693 spin_lock_irqsave(&isci_request->state_lock, flags);
694 request_status = isci_request->status;
695
696 if ((isci_request->ttype == io_task) /* TMFs are in their own thread */
697 && ((request_status == aborted)
698 || (request_status == aborting)
699 || (request_status == terminating)
700 || (request_status == completed)
701 || (request_status == dead)
702 )
703 ) {
704
705 /* The completion routine won't free a request in
706 * the aborted/aborting/etc. states, so we do
707 * it here.
708 */
709 needs_cleanup_handling = true;
710 }
711 spin_unlock_irqrestore(&isci_request->state_lock, flags);
712
713 }
714 if (needs_cleanup_handling)
715 isci_request_cleanup_completed_loiterer(
716 ihost, idev, isci_request, task);
717 }
718}
719
720/**
721 * isci_terminate_pending_requests() - This function will change the all of the
722 * requests on the given device's state to "aborting", will terminate the
723 * requests, and wait for them to complete. This function must only be
724 * called from a thread that can wait. Note that the requests are all
725 * terminated and completed (back to the host, if started there).
726 * @isci_host: This parameter specifies SCU.
727 * @idev: This parameter specifies the target.
728 *
729 */
730void isci_terminate_pending_requests(struct isci_host *ihost,
731 struct isci_remote_device *idev)
732{
733 struct completion request_completion;
734 enum isci_request_status old_state;
735 unsigned long flags;
736 LIST_HEAD(list);
737
738 spin_lock_irqsave(&ihost->scic_lock, flags);
739 list_splice_init(&idev->reqs_in_process, &list);
740
741 /* assumes that isci_terminate_request_core deletes from the list */
742 while (!list_empty(&list)) {
743 struct isci_request *ireq = list_entry(list.next, typeof(*ireq), dev_node);
744
745 /* Change state to "terminating" if it is currently
746 * "started".
747 */
748 old_state = isci_request_change_started_to_newstate(ireq,
749 &request_completion,
750 terminating);
751 switch (old_state) {
752 case started:
753 case completed:
754 case aborting:
755 break;
756 default:
757 /* termination in progress, or otherwise dispositioned.
758 * We know the request was on 'list' so should be safe
759 * to move it back to reqs_in_process
760 */
761 list_move(&ireq->dev_node, &idev->reqs_in_process);
762 ireq = NULL;
763 break;
764 }
765
766 if (!ireq)
767 continue;
768 spin_unlock_irqrestore(&ihost->scic_lock, flags);
769
770 init_completion(&request_completion);
771
772 dev_dbg(&ihost->pdev->dev,
773 "%s: idev=%p request=%p; task=%p old_state=%d\n",
774 __func__, idev, ireq,
775 ireq->ttype == io_task ? isci_request_access_task(ireq) : NULL,
776 old_state);
777
778 /* If the old_state is started:
779 * This request was not already being aborted. If it had been,
780 * then the aborting I/O (ie. the TMF request) would not be in
781 * the aborting state, and thus would be terminated here. Note
782 * that since the TMF completion's call to the kernel function
783 * "complete()" does not happen until the pending I/O request
784 * terminate fully completes, we do not have to implement a
785 * special wait here for already aborting requests - the
786 * termination of the TMF request will force the request
787 * to finish it's already started terminate.
788 *
789 * If old_state == completed:
790 * This request completed from the SCU hardware perspective
791 * and now just needs cleaning up in terms of freeing the
792 * request and potentially calling up to libsas.
793 *
794 * If old_state == aborting:
795 * This request has already gone through a TMF timeout, but may
796 * not have been terminated; needs cleaning up at least.
797 */
798 isci_terminate_request_core(ihost, idev, ireq);
799 spin_lock_irqsave(&ihost->scic_lock, flags);
800 }
801 spin_unlock_irqrestore(&ihost->scic_lock, flags);
802}
803
804/**
805 * isci_task_send_lu_reset_sas() - This function is called by of the SAS Domain
806 * Template functions.
807 * @lun: This parameter specifies the lun to be reset.
808 *
809 * status, zero indicates success.
810 */
811static int isci_task_send_lu_reset_sas(
812 struct isci_host *isci_host,
813 struct isci_remote_device *isci_device,
814 u8 *lun)
815{
816 struct isci_tmf tmf;
817 int ret = TMF_RESP_FUNC_FAILED;
818
819 dev_dbg(&isci_host->pdev->dev,
820 "%s: isci_host = %p, isci_device = %p\n",
821 __func__, isci_host, isci_device);
822 /* Send the LUN reset to the target. By the time the call returns,
823 * the TMF has fully exected in the target (in which case the return
824 * value is "TMF_RESP_FUNC_COMPLETE", or the request timed-out (or
825 * was otherwise unable to be executed ("TMF_RESP_FUNC_FAILED").
826 */
827 isci_task_build_tmf(&tmf, isci_tmf_ssp_lun_reset, NULL, NULL);
828
829 #define ISCI_LU_RESET_TIMEOUT_MS 2000 /* 2 second timeout. */
830 ret = isci_task_execute_tmf(isci_host, isci_device, &tmf, ISCI_LU_RESET_TIMEOUT_MS);
831
832 if (ret == TMF_RESP_FUNC_COMPLETE)
833 dev_dbg(&isci_host->pdev->dev,
834 "%s: %p: TMF_LU_RESET passed\n",
835 __func__, isci_device);
836 else
837 dev_dbg(&isci_host->pdev->dev,
838 "%s: %p: TMF_LU_RESET failed (%x)\n",
839 __func__, isci_device, ret);
840
841 return ret;
842}
843
844static int isci_task_send_lu_reset_sata(struct isci_host *ihost,
845 struct isci_remote_device *idev, u8 *lun)
846{
847 int ret = TMF_RESP_FUNC_FAILED;
848 struct isci_tmf tmf;
849
850 /* Send the soft reset to the target */
851 #define ISCI_SRST_TIMEOUT_MS 25000 /* 25 second timeout. */
852 isci_task_build_tmf(&tmf, isci_tmf_sata_srst_high, NULL, NULL);
853
854 ret = isci_task_execute_tmf(ihost, idev, &tmf, ISCI_SRST_TIMEOUT_MS);
855
856 if (ret != TMF_RESP_FUNC_COMPLETE) {
857 dev_dbg(&ihost->pdev->dev,
858 "%s: Assert SRST failed (%p) = %x",
859 __func__, idev, ret);
860
861 /* Return the failure so that the LUN reset is escalated
862 * to a target reset.
863 */
864 }
865 return ret;
866}
867
868/**
869 * isci_task_lu_reset() - This function is one of the SAS Domain Template
870 * functions. This is one of the Task Management functoins called by libsas,
871 * to reset the given lun. Note the assumption that while this call is
872 * executing, no I/O will be sent by the host to the device.
873 * @lun: This parameter specifies the lun to be reset.
874 *
875 * status, zero indicates success.
876 */
877int isci_task_lu_reset(struct domain_device *domain_device, u8 *lun)
878{
879 struct isci_host *isci_host = dev_to_ihost(domain_device);
880 struct isci_remote_device *isci_device;
881 unsigned long flags;
882 int ret;
883
884 spin_lock_irqsave(&isci_host->scic_lock, flags);
885 isci_device = isci_lookup_device(domain_device);
886 spin_unlock_irqrestore(&isci_host->scic_lock, flags);
887
888 dev_dbg(&isci_host->pdev->dev,
889 "%s: domain_device=%p, isci_host=%p; isci_device=%p\n",
890 __func__, domain_device, isci_host, isci_device);
891
892 if (isci_device)
893 set_bit(IDEV_EH, &isci_device->flags);
894
895 /* If there is a device reset pending on any request in the
896 * device's list, fail this LUN reset request in order to
897 * escalate to the device reset.
898 */
899 if (!isci_device ||
900 isci_device_is_reset_pending(isci_host, isci_device)) {
901 dev_dbg(&isci_host->pdev->dev,
902 "%s: No dev (%p), or "
903 "RESET PENDING: domain_device=%p\n",
904 __func__, isci_device, domain_device);
905 ret = TMF_RESP_FUNC_FAILED;
906 goto out;
907 }
908
909 /* Send the task management part of the reset. */
910 if (sas_protocol_ata(domain_device->tproto)) {
911 ret = isci_task_send_lu_reset_sata(isci_host, isci_device, lun);
912 } else
913 ret = isci_task_send_lu_reset_sas(isci_host, isci_device, lun);
914
915 /* If the LUN reset worked, all the I/O can now be terminated. */
916 if (ret == TMF_RESP_FUNC_COMPLETE)
917 /* Terminate all I/O now. */
918 isci_terminate_pending_requests(isci_host,
919 isci_device);
920
921 out:
922 isci_put_device(isci_device);
923 return ret;
924}
925
926
927/* int (*lldd_clear_nexus_port)(struct asd_sas_port *); */
928int isci_task_clear_nexus_port(struct asd_sas_port *port)
929{
930 return TMF_RESP_FUNC_FAILED;
931}
932
933
934
935int isci_task_clear_nexus_ha(struct sas_ha_struct *ha)
936{
937 return TMF_RESP_FUNC_FAILED;
938}
939
940/* Task Management Functions. Must be called from process context. */
941
942/**
943 * isci_abort_task_process_cb() - This is a helper function for the abort task
944 * TMF command. It manages the request state with respect to the successful
945 * transmission / completion of the abort task request.
946 * @cb_state: This parameter specifies when this function was called - after
947 * the TMF request has been started and after it has timed-out.
948 * @tmf: This parameter specifies the TMF in progress.
949 *
950 *
951 */
952static void isci_abort_task_process_cb(
953 enum isci_tmf_cb_state cb_state,
954 struct isci_tmf *tmf,
955 void *cb_data)
956{
957 struct isci_request *old_request;
958
959 old_request = (struct isci_request *)cb_data;
960
961 dev_dbg(&old_request->isci_host->pdev->dev,
962 "%s: tmf=%p, old_request=%p\n",
963 __func__, tmf, old_request);
964
965 switch (cb_state) {
966
967 case isci_tmf_started:
968 /* The TMF has been started. Nothing to do here, since the
969 * request state was already set to "aborted" by the abort
970 * task function.
971 */
972 if ((old_request->status != aborted)
973 && (old_request->status != completed))
974 dev_dbg(&old_request->isci_host->pdev->dev,
975 "%s: Bad request status (%d): tmf=%p, old_request=%p\n",
976 __func__, old_request->status, tmf, old_request);
977 break;
978
979 case isci_tmf_timed_out:
980
981 /* Set the task's state to "aborting", since the abort task
982 * function thread set it to "aborted" (above) in anticipation
983 * of the task management request working correctly. Since the
984 * timeout has now fired, the TMF request failed. We set the
985 * state such that the request completion will indicate the
986 * device is no longer present.
987 */
988 isci_request_change_state(old_request, aborting);
989 break;
990
991 default:
992 dev_dbg(&old_request->isci_host->pdev->dev,
993 "%s: Bad cb_state (%d): tmf=%p, old_request=%p\n",
994 __func__, cb_state, tmf, old_request);
995 break;
996 }
997}
998
999/**
1000 * isci_task_abort_task() - This function is one of the SAS Domain Template
1001 * functions. This function is called by libsas to abort a specified task.
1002 * @task: This parameter specifies the SAS task to abort.
1003 *
1004 * status, zero indicates success.
1005 */
1006int isci_task_abort_task(struct sas_task *task)
1007{
1008 struct isci_host *isci_host = dev_to_ihost(task->dev);
1009 DECLARE_COMPLETION_ONSTACK(aborted_io_completion);
1010 struct isci_request *old_request = NULL;
1011 enum isci_request_status old_state;
1012 struct isci_remote_device *isci_device = NULL;
1013 struct isci_tmf tmf;
1014 int ret = TMF_RESP_FUNC_FAILED;
1015 unsigned long flags;
1016 bool any_dev_reset = false;
1017
1018 /* Get the isci_request reference from the task. Note that
1019 * this check does not depend on the pending request list
1020 * in the device, because tasks driving resets may land here
1021 * after completion in the core.
1022 */
1023 spin_lock_irqsave(&isci_host->scic_lock, flags);
1024 spin_lock(&task->task_state_lock);
1025
1026 old_request = task->lldd_task;
1027
1028 /* If task is already done, the request isn't valid */
1029 if (!(task->task_state_flags & SAS_TASK_STATE_DONE) &&
1030 (task->task_state_flags & SAS_TASK_AT_INITIATOR) &&
1031 old_request)
1032 isci_device = isci_lookup_device(task->dev);
1033
1034 spin_unlock(&task->task_state_lock);
1035 spin_unlock_irqrestore(&isci_host->scic_lock, flags);
1036
1037 dev_dbg(&isci_host->pdev->dev,
1038 "%s: task = %p\n", __func__, task);
1039
1040 if (!isci_device || !old_request)
1041 goto out;
1042
1043 set_bit(IDEV_EH, &isci_device->flags);
1044
1045 /* This version of the driver will fail abort requests for
1046 * SATA/STP. Failing the abort request this way will cause the
1047 * SCSI error handler thread to escalate to LUN reset
1048 */
1049 if (sas_protocol_ata(task->task_proto)) {
1050 dev_dbg(&isci_host->pdev->dev,
1051 " task %p is for a STP/SATA device;"
1052 " returning TMF_RESP_FUNC_FAILED\n"
1053 " to cause a LUN reset...\n", task);
1054 goto out;
1055 }
1056
1057 dev_dbg(&isci_host->pdev->dev,
1058 "%s: old_request == %p\n", __func__, old_request);
1059
1060 any_dev_reset = isci_device_is_reset_pending(isci_host, isci_device);
1061
1062 spin_lock_irqsave(&task->task_state_lock, flags);
1063
1064 any_dev_reset = any_dev_reset || (task->task_state_flags & SAS_TASK_NEED_DEV_RESET);
1065
1066 /* If the extraction of the request reference from the task
1067 * failed, then the request has been completed (or if there is a
1068 * pending reset then this abort request function must be failed
1069 * in order to escalate to the target reset).
1070 */
1071 if ((old_request == NULL) || any_dev_reset) {
1072
1073 /* If the device reset task flag is set, fail the task
1074 * management request. Otherwise, the original request
1075 * has completed.
1076 */
1077 if (any_dev_reset) {
1078
1079 /* Turn off the task's DONE to make sure this
1080 * task is escalated to a target reset.
1081 */
1082 task->task_state_flags &= ~SAS_TASK_STATE_DONE;
1083
1084 /* Make the reset happen as soon as possible. */
1085 task->task_state_flags |= SAS_TASK_NEED_DEV_RESET;
1086
1087 spin_unlock_irqrestore(&task->task_state_lock, flags);
1088
1089 /* Fail the task management request in order to
1090 * escalate to the target reset.
1091 */
1092 ret = TMF_RESP_FUNC_FAILED;
1093
1094 dev_dbg(&isci_host->pdev->dev,
1095 "%s: Failing task abort in order to "
1096 "escalate to target reset because\n"
1097 "SAS_TASK_NEED_DEV_RESET is set for "
1098 "task %p on dev %p\n",
1099 __func__, task, isci_device);
1100
1101
1102 } else {
1103 /* The request has already completed and there
1104 * is nothing to do here other than to set the task
1105 * done bit, and indicate that the task abort function
1106 * was sucessful.
1107 */
1108 isci_set_task_doneflags(task);
1109
1110 spin_unlock_irqrestore(&task->task_state_lock, flags);
1111
1112 ret = TMF_RESP_FUNC_COMPLETE;
1113
1114 dev_dbg(&isci_host->pdev->dev,
1115 "%s: abort task not needed for %p\n",
1116 __func__, task);
1117 }
1118 goto out;
1119 } else {
1120 spin_unlock_irqrestore(&task->task_state_lock, flags);
1121 }
1122
1123 spin_lock_irqsave(&isci_host->scic_lock, flags);
1124
1125 /* Check the request status and change to "aborted" if currently
1126 * "starting"; if true then set the I/O kernel completion
1127 * struct that will be triggered when the request completes.
1128 */
1129 old_state = isci_task_validate_request_to_abort(
1130 old_request, isci_host, isci_device,
1131 &aborted_io_completion);
1132 if ((old_state != started) &&
1133 (old_state != completed) &&
1134 (old_state != aborting)) {
1135
1136 spin_unlock_irqrestore(&isci_host->scic_lock, flags);
1137
1138 /* The request was already being handled by someone else (because
1139 * they got to set the state away from started).
1140 */
1141 dev_dbg(&isci_host->pdev->dev,
1142 "%s: device = %p; old_request %p already being aborted\n",
1143 __func__,
1144 isci_device, old_request);
1145 ret = TMF_RESP_FUNC_COMPLETE;
1146 goto out;
1147 }
1148 if (task->task_proto == SAS_PROTOCOL_SMP ||
1149 test_bit(IREQ_COMPLETE_IN_TARGET, &old_request->flags)) {
1150
1151 spin_unlock_irqrestore(&isci_host->scic_lock, flags);
1152
1153 dev_dbg(&isci_host->pdev->dev,
1154 "%s: SMP request (%d)"
1155 " or complete_in_target (%d), thus no TMF\n",
1156 __func__, (task->task_proto == SAS_PROTOCOL_SMP),
1157 test_bit(IREQ_COMPLETE_IN_TARGET, &old_request->flags));
1158
1159 /* Set the state on the task. */
1160 isci_task_all_done(task);
1161
1162 ret = TMF_RESP_FUNC_COMPLETE;
1163
1164 /* Stopping and SMP devices are not sent a TMF, and are not
1165 * reset, but the outstanding I/O request is terminated below.
1166 */
1167 } else {
1168 /* Fill in the tmf stucture */
1169 isci_task_build_abort_task_tmf(&tmf, isci_tmf_ssp_task_abort,
1170 isci_abort_task_process_cb,
1171 old_request);
1172
1173 spin_unlock_irqrestore(&isci_host->scic_lock, flags);
1174
1175 #define ISCI_ABORT_TASK_TIMEOUT_MS 500 /* half second timeout. */
1176 ret = isci_task_execute_tmf(isci_host, isci_device, &tmf,
1177 ISCI_ABORT_TASK_TIMEOUT_MS);
1178
1179 if (ret != TMF_RESP_FUNC_COMPLETE)
1180 dev_dbg(&isci_host->pdev->dev,
1181 "%s: isci_task_send_tmf failed\n",
1182 __func__);
1183 }
1184 if (ret == TMF_RESP_FUNC_COMPLETE) {
1185 set_bit(IREQ_COMPLETE_IN_TARGET, &old_request->flags);
1186
1187 /* Clean up the request on our side, and wait for the aborted
1188 * I/O to complete.
1189 */
1190 isci_terminate_request_core(isci_host, isci_device, old_request);
1191 }
1192
1193 /* Make sure we do not leave a reference to aborted_io_completion */
1194 old_request->io_request_completion = NULL;
1195 out:
1196 isci_put_device(isci_device);
1197 return ret;
1198}
1199
1200/**
1201 * isci_task_abort_task_set() - This function is one of the SAS Domain Template
1202 * functions. This is one of the Task Management functoins called by libsas,
1203 * to abort all task for the given lun.
1204 * @d_device: This parameter specifies the domain device associated with this
1205 * request.
1206 * @lun: This parameter specifies the lun associated with this request.
1207 *
1208 * status, zero indicates success.
1209 */
1210int isci_task_abort_task_set(
1211 struct domain_device *d_device,
1212 u8 *lun)
1213{
1214 return TMF_RESP_FUNC_FAILED;
1215}
1216
1217
1218/**
1219 * isci_task_clear_aca() - This function is one of the SAS Domain Template
1220 * functions. This is one of the Task Management functoins called by libsas.
1221 * @d_device: This parameter specifies the domain device associated with this
1222 * request.
1223 * @lun: This parameter specifies the lun associated with this request.
1224 *
1225 * status, zero indicates success.
1226 */
1227int isci_task_clear_aca(
1228 struct domain_device *d_device,
1229 u8 *lun)
1230{
1231 return TMF_RESP_FUNC_FAILED;
1232}
1233
1234
1235
1236/**
1237 * isci_task_clear_task_set() - This function is one of the SAS Domain Template
1238 * functions. This is one of the Task Management functoins called by libsas.
1239 * @d_device: This parameter specifies the domain device associated with this
1240 * request.
1241 * @lun: This parameter specifies the lun associated with this request.
1242 *
1243 * status, zero indicates success.
1244 */
1245int isci_task_clear_task_set(
1246 struct domain_device *d_device,
1247 u8 *lun)
1248{
1249 return TMF_RESP_FUNC_FAILED;
1250}
1251
1252
1253/**
1254 * isci_task_query_task() - This function is implemented to cause libsas to
1255 * correctly escalate the failed abort to a LUN or target reset (this is
1256 * because sas_scsi_find_task libsas function does not correctly interpret
1257 * all return codes from the abort task call). When TMF_RESP_FUNC_SUCC is
1258 * returned, libsas turns this into a LUN reset; when FUNC_FAILED is
1259 * returned, libsas will turn this into a target reset
1260 * @task: This parameter specifies the sas task being queried.
1261 * @lun: This parameter specifies the lun associated with this request.
1262 *
1263 * status, zero indicates success.
1264 */
1265int isci_task_query_task(
1266 struct sas_task *task)
1267{
1268 /* See if there is a pending device reset for this device. */
1269 if (task->task_state_flags & SAS_TASK_NEED_DEV_RESET)
1270 return TMF_RESP_FUNC_FAILED;
1271 else
1272 return TMF_RESP_FUNC_SUCC;
1273}
1274
1275/*
1276 * isci_task_request_complete() - This function is called by the sci core when
1277 * an task request completes.
1278 * @ihost: This parameter specifies the ISCI host object
1279 * @ireq: This parameter is the completed isci_request object.
1280 * @completion_status: This parameter specifies the completion status from the
1281 * sci core.
1282 *
1283 * none.
1284 */
1285void
1286isci_task_request_complete(struct isci_host *ihost,
1287 struct isci_request *ireq,
1288 enum sci_task_status completion_status)
1289{
1290 struct isci_tmf *tmf = isci_request_access_tmf(ireq);
1291 struct completion *tmf_complete;
1292
1293 dev_dbg(&ihost->pdev->dev,
1294 "%s: request = %p, status=%d\n",
1295 __func__, ireq, completion_status);
1296
1297 isci_request_change_state(ireq, completed);
1298
1299 tmf->status = completion_status;
1300 set_bit(IREQ_COMPLETE_IN_TARGET, &ireq->flags);
1301
1302 if (tmf->proto == SAS_PROTOCOL_SSP) {
1303 memcpy(&tmf->resp.resp_iu,
1304 &ireq->ssp.rsp,
1305 SSP_RESP_IU_MAX_SIZE);
1306 } else if (tmf->proto == SAS_PROTOCOL_SATA) {
1307 memcpy(&tmf->resp.d2h_fis,
1308 &ireq->stp.rsp,
1309 sizeof(struct dev_to_host_fis));
1310 }
1311
1312 /* PRINT_TMF( ((struct isci_tmf *)request->task)); */
1313 tmf_complete = tmf->complete;
1314
1315 sci_controller_complete_io(ihost, ireq->target_device, ireq);
1316 /* set the 'terminated' flag handle to make sure it cannot be terminated
1317 * or completed again.
1318 */
1319 set_bit(IREQ_TERMINATED, &ireq->flags);
1320
1321 isci_request_change_state(ireq, unallocated);
1322 list_del_init(&ireq->dev_node);
1323
1324 /* The task management part completes last. */
1325 complete(tmf_complete);
1326}
1327
1328static void isci_smp_task_timedout(unsigned long _task)
1329{
1330 struct sas_task *task = (void *) _task;
1331 unsigned long flags;
1332
1333 spin_lock_irqsave(&task->task_state_lock, flags);
1334 if (!(task->task_state_flags & SAS_TASK_STATE_DONE))
1335 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1336 spin_unlock_irqrestore(&task->task_state_lock, flags);
1337
1338 complete(&task->completion);
1339}
1340
1341static void isci_smp_task_done(struct sas_task *task)
1342{
1343 if (!del_timer(&task->timer))
1344 return;
1345 complete(&task->completion);
1346}
1347
1348static struct sas_task *isci_alloc_task(void)
1349{
1350 struct sas_task *task = kzalloc(sizeof(*task), GFP_KERNEL);
1351
1352 if (task) {
1353 INIT_LIST_HEAD(&task->list);
1354 spin_lock_init(&task->task_state_lock);
1355 task->task_state_flags = SAS_TASK_STATE_PENDING;
1356 init_timer(&task->timer);
1357 init_completion(&task->completion);
1358 }
1359
1360 return task;
1361}
1362
1363static void isci_free_task(struct isci_host *ihost, struct sas_task *task)
1364{
1365 if (task) {
1366 BUG_ON(!list_empty(&task->list));
1367 kfree(task);
1368 }
1369}
1370
1371static int isci_smp_execute_task(struct isci_host *ihost,
1372 struct domain_device *dev, void *req,
1373 int req_size, void *resp, int resp_size)
1374{
1375 int res, retry;
1376 struct sas_task *task = NULL;
1377
1378 for (retry = 0; retry < 3; retry++) {
1379 task = isci_alloc_task();
1380 if (!task)
1381 return -ENOMEM;
1382
1383 task->dev = dev;
1384 task->task_proto = dev->tproto;
1385 sg_init_one(&task->smp_task.smp_req, req, req_size);
1386 sg_init_one(&task->smp_task.smp_resp, resp, resp_size);
1387
1388 task->task_done = isci_smp_task_done;
1389
1390 task->timer.data = (unsigned long) task;
1391 task->timer.function = isci_smp_task_timedout;
1392 task->timer.expires = jiffies + 10*HZ;
1393 add_timer(&task->timer);
1394
1395 res = isci_task_execute_task(task, 1, GFP_KERNEL);
1396
1397 if (res) {
1398 del_timer(&task->timer);
1399 dev_dbg(&ihost->pdev->dev,
1400 "%s: executing SMP task failed:%d\n",
1401 __func__, res);
1402 goto ex_err;
1403 }
1404
1405 wait_for_completion(&task->completion);
1406 res = -ECOMM;
1407 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1408 dev_dbg(&ihost->pdev->dev,
1409 "%s: smp task timed out or aborted\n",
1410 __func__);
1411 isci_task_abort_task(task);
1412 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1413 dev_dbg(&ihost->pdev->dev,
1414 "%s: SMP task aborted and not done\n",
1415 __func__);
1416 goto ex_err;
1417 }
1418 }
1419 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1420 task->task_status.stat == SAM_STAT_GOOD) {
1421 res = 0;
1422 break;
1423 }
1424 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1425 task->task_status.stat == SAS_DATA_UNDERRUN) {
1426 /* no error, but return the number of bytes of
1427 * underrun */
1428 res = task->task_status.residual;
1429 break;
1430 }
1431 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1432 task->task_status.stat == SAS_DATA_OVERRUN) {
1433 res = -EMSGSIZE;
1434 break;
1435 } else {
1436 dev_dbg(&ihost->pdev->dev,
1437 "%s: task to dev %016llx response: 0x%x "
1438 "status 0x%x\n", __func__,
1439 SAS_ADDR(dev->sas_addr),
1440 task->task_status.resp,
1441 task->task_status.stat);
1442 isci_free_task(ihost, task);
1443 task = NULL;
1444 }
1445 }
1446ex_err:
1447 BUG_ON(retry == 3 && task != NULL);
1448 isci_free_task(ihost, task);
1449 return res;
1450}
1451
1452#define DISCOVER_REQ_SIZE 16
1453#define DISCOVER_RESP_SIZE 56
1454
1455int isci_smp_get_phy_attached_dev_type(struct isci_host *ihost,
1456 struct domain_device *dev,
1457 int phy_id, int *adt)
1458{
1459 struct smp_resp *disc_resp;
1460 u8 *disc_req;
1461 int res;
1462
1463 disc_resp = kzalloc(DISCOVER_RESP_SIZE, GFP_KERNEL);
1464 if (!disc_resp)
1465 return -ENOMEM;
1466
1467 disc_req = kzalloc(DISCOVER_REQ_SIZE, GFP_KERNEL);
1468 if (disc_req) {
1469 disc_req[0] = SMP_REQUEST;
1470 disc_req[1] = SMP_DISCOVER;
1471 disc_req[9] = phy_id;
1472 } else {
1473 kfree(disc_resp);
1474 return -ENOMEM;
1475 }
1476 res = isci_smp_execute_task(ihost, dev, disc_req, DISCOVER_REQ_SIZE,
1477 disc_resp, DISCOVER_RESP_SIZE);
1478 if (!res) {
1479 if (disc_resp->result != SMP_RESP_FUNC_ACC)
1480 res = disc_resp->result;
1481 else
1482 *adt = disc_resp->disc.attached_dev_type;
1483 }
1484 kfree(disc_req);
1485 kfree(disc_resp);
1486
1487 return res;
1488}
1489
1490static void isci_wait_for_smp_phy_reset(struct isci_remote_device *idev, int phy_num)
1491{
1492 struct domain_device *dev = idev->domain_dev;
1493 struct isci_port *iport = idev->isci_port;
1494 struct isci_host *ihost = iport->isci_host;
1495 int res, iteration = 0, attached_device_type;
1496 #define STP_WAIT_MSECS 25000
1497 unsigned long tmo = msecs_to_jiffies(STP_WAIT_MSECS);
1498 unsigned long deadline = jiffies + tmo;
1499 enum {
1500 SMP_PHYWAIT_PHYDOWN,
1501 SMP_PHYWAIT_PHYUP,
1502 SMP_PHYWAIT_DONE
1503 } phy_state = SMP_PHYWAIT_PHYDOWN;
1504
1505 /* While there is time, wait for the phy to go away and come back */
1506 while (time_is_after_jiffies(deadline) && phy_state != SMP_PHYWAIT_DONE) {
1507 int event = atomic_read(&iport->event);
1508
1509 ++iteration;
1510
1511 tmo = wait_event_timeout(ihost->eventq,
1512 event != atomic_read(&iport->event) ||
1513 !test_bit(IPORT_BCN_BLOCKED, &iport->flags),
1514 tmo);
1515 /* link down, stop polling */
1516 if (!test_bit(IPORT_BCN_BLOCKED, &iport->flags))
1517 break;
1518
1519 dev_dbg(&ihost->pdev->dev,
1520 "%s: iport %p, iteration %d,"
1521 " phase %d: time_remaining %lu, bcns = %d\n",
1522 __func__, iport, iteration, phy_state,
1523 tmo, test_bit(IPORT_BCN_PENDING, &iport->flags));
1524
1525 res = isci_smp_get_phy_attached_dev_type(ihost, dev, phy_num,
1526 &attached_device_type);
1527 tmo = deadline - jiffies;
1528
1529 if (res) {
1530 dev_dbg(&ihost->pdev->dev,
1531 "%s: iteration %d, phase %d:"
1532 " SMP error=%d, time_remaining=%lu\n",
1533 __func__, iteration, phy_state, res, tmo);
1534 break;
1535 }
1536 dev_dbg(&ihost->pdev->dev,
1537 "%s: iport %p, iteration %d,"
1538 " phase %d: time_remaining %lu, bcns = %d, "
1539 "attdevtype = %x\n",
1540 __func__, iport, iteration, phy_state,
1541 tmo, test_bit(IPORT_BCN_PENDING, &iport->flags),
1542 attached_device_type);
1543
1544 switch (phy_state) {
1545 case SMP_PHYWAIT_PHYDOWN:
1546 /* Has the device gone away? */
1547 if (!attached_device_type)
1548 phy_state = SMP_PHYWAIT_PHYUP;
1549
1550 break;
1551
1552 case SMP_PHYWAIT_PHYUP:
1553 /* Has the device come back? */
1554 if (attached_device_type)
1555 phy_state = SMP_PHYWAIT_DONE;
1556 break;
1557
1558 case SMP_PHYWAIT_DONE:
1559 break;
1560 }
1561
1562 }
1563 dev_dbg(&ihost->pdev->dev, "%s: done\n", __func__);
1564}
1565
1566static int isci_reset_device(struct isci_host *ihost,
1567 struct isci_remote_device *idev)
1568{
1569 struct sas_phy *phy = sas_find_local_phy(idev->domain_dev);
1570 struct isci_port *iport = idev->isci_port;
1571 enum sci_status status;
1572 unsigned long flags;
1573 int rc;
1574
1575 dev_dbg(&ihost->pdev->dev, "%s: idev %p\n", __func__, idev);
1576
1577 spin_lock_irqsave(&ihost->scic_lock, flags);
1578 status = sci_remote_device_reset(idev);
1579 if (status != SCI_SUCCESS) {
1580 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1581
1582 dev_dbg(&ihost->pdev->dev,
1583 "%s: sci_remote_device_reset(%p) returned %d!\n",
1584 __func__, idev, status);
1585
1586 return TMF_RESP_FUNC_FAILED;
1587 }
1588 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1589
1590 /* Make sure all pending requests are able to be fully terminated. */
1591 isci_device_clear_reset_pending(ihost, idev);
1592
1593 /* If this is a device on an expander, disable BCN processing. */
1594 if (!scsi_is_sas_phy_local(phy))
1595 set_bit(IPORT_BCN_BLOCKED, &iport->flags);
1596
1597 rc = sas_phy_reset(phy, true);
1598
1599 /* Terminate in-progress I/O now. */
1600 isci_remote_device_nuke_requests(ihost, idev);
1601
1602 /* Since all pending TCs have been cleaned, resume the RNC. */
1603 spin_lock_irqsave(&ihost->scic_lock, flags);
1604 status = sci_remote_device_reset_complete(idev);
1605 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1606
1607 /* If this is a device on an expander, bring the phy back up. */
1608 if (!scsi_is_sas_phy_local(phy)) {
1609 /* A phy reset will cause the device to go away then reappear.
1610 * Since libsas will take action on incoming BCNs (eg. remove
1611 * a device going through an SMP phy-control driven reset),
1612 * we need to wait until the phy comes back up before letting
1613 * discovery proceed in libsas.
1614 */
1615 isci_wait_for_smp_phy_reset(idev, phy->number);
1616
1617 spin_lock_irqsave(&ihost->scic_lock, flags);
1618 isci_port_bcn_enable(ihost, idev->isci_port);
1619 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1620 }
1621
1622 if (status != SCI_SUCCESS) {
1623 dev_dbg(&ihost->pdev->dev,
1624 "%s: sci_remote_device_reset_complete(%p) "
1625 "returned %d!\n", __func__, idev, status);
1626 }
1627
1628 dev_dbg(&ihost->pdev->dev, "%s: idev %p complete.\n", __func__, idev);
1629
1630 return rc;
1631}
1632
1633int isci_task_I_T_nexus_reset(struct domain_device *dev)
1634{
1635 struct isci_host *ihost = dev_to_ihost(dev);
1636 struct isci_remote_device *idev;
1637 unsigned long flags;
1638 int ret;
1639
1640 spin_lock_irqsave(&ihost->scic_lock, flags);
1641 idev = isci_lookup_device(dev);
1642 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1643
1644 if (!idev || !test_bit(IDEV_EH, &idev->flags)) {
1645 ret = TMF_RESP_FUNC_COMPLETE;
1646 goto out;
1647 }
1648
1649 ret = isci_reset_device(ihost, idev);
1650 out:
1651 isci_put_device(idev);
1652 return ret;
1653}
1654
1655int isci_bus_reset_handler(struct scsi_cmnd *cmd)
1656{
1657 struct domain_device *dev = sdev_to_domain_dev(cmd->device);
1658 struct isci_host *ihost = dev_to_ihost(dev);
1659 struct isci_remote_device *idev;
1660 unsigned long flags;
1661 int ret;
1662
1663 spin_lock_irqsave(&ihost->scic_lock, flags);
1664 idev = isci_lookup_device(dev);
1665 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1666
1667 if (!idev) {
1668 ret = TMF_RESP_FUNC_COMPLETE;
1669 goto out;
1670 }
1671
1672 ret = isci_reset_device(ihost, idev);
1673 out:
1674 isci_put_device(idev);
1675 return ret;
1676}
diff --git a/drivers/scsi/isci/task.h b/drivers/scsi/isci/task.h
new file mode 100644
index 000000000000..4a7fa90287ef
--- /dev/null
+++ b/drivers/scsi/isci/task.h
@@ -0,0 +1,367 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55#ifndef _ISCI_TASK_H_
56#define _ISCI_TASK_H_
57
58#include <scsi/sas_ata.h>
59#include "host.h"
60
61struct isci_request;
62
63/**
64 * enum isci_tmf_cb_state - This enum defines the possible states in which the
65 * TMF callback function is invoked during the TMF execution process.
66 *
67 *
68 */
69enum isci_tmf_cb_state {
70
71 isci_tmf_init_state = 0,
72 isci_tmf_started,
73 isci_tmf_timed_out
74};
75
76/**
77 * enum isci_tmf_function_codes - This enum defines the possible preparations
78 * of task management requests.
79 *
80 *
81 */
82enum isci_tmf_function_codes {
83
84 isci_tmf_func_none = 0,
85 isci_tmf_ssp_task_abort = TMF_ABORT_TASK,
86 isci_tmf_ssp_lun_reset = TMF_LU_RESET,
87 isci_tmf_sata_srst_high = TMF_LU_RESET + 0x100, /* Non SCSI */
88 isci_tmf_sata_srst_low = TMF_LU_RESET + 0x101 /* Non SCSI */
89};
90/**
91 * struct isci_tmf - This class represents the task management object which
92 * acts as an interface to libsas for processing task management requests
93 *
94 *
95 */
96struct isci_tmf {
97
98 struct completion *complete;
99 enum sas_protocol proto;
100 union {
101 struct ssp_response_iu resp_iu;
102 struct dev_to_host_fis d2h_fis;
103 u8 rsp_buf[SSP_RESP_IU_MAX_SIZE];
104 } resp;
105 unsigned char lun[8];
106 u16 io_tag;
107 struct isci_remote_device *device;
108 enum isci_tmf_function_codes tmf_code;
109 int status;
110
111 /* The optional callback function allows the user process to
112 * track the TMF transmit / timeout conditions.
113 */
114 void (*cb_state_func)(
115 enum isci_tmf_cb_state,
116 struct isci_tmf *, void *);
117 void *cb_data;
118
119};
120
121static inline void isci_print_tmf(struct isci_tmf *tmf)
122{
123 if (SAS_PROTOCOL_SATA == tmf->proto)
124 dev_dbg(&tmf->device->isci_port->isci_host->pdev->dev,
125 "%s: status = %x\n"
126 "tmf->resp.d2h_fis.status = %x\n"
127 "tmf->resp.d2h_fis.error = %x\n",
128 __func__,
129 tmf->status,
130 tmf->resp.d2h_fis.status,
131 tmf->resp.d2h_fis.error);
132 else
133 dev_dbg(&tmf->device->isci_port->isci_host->pdev->dev,
134 "%s: status = %x\n"
135 "tmf->resp.resp_iu.data_present = %x\n"
136 "tmf->resp.resp_iu.status = %x\n"
137 "tmf->resp.resp_iu.data_length = %x\n"
138 "tmf->resp.resp_iu.data[0] = %x\n"
139 "tmf->resp.resp_iu.data[1] = %x\n"
140 "tmf->resp.resp_iu.data[2] = %x\n"
141 "tmf->resp.resp_iu.data[3] = %x\n",
142 __func__,
143 tmf->status,
144 tmf->resp.resp_iu.datapres,
145 tmf->resp.resp_iu.status,
146 be32_to_cpu(tmf->resp.resp_iu.response_data_len),
147 tmf->resp.resp_iu.resp_data[0],
148 tmf->resp.resp_iu.resp_data[1],
149 tmf->resp.resp_iu.resp_data[2],
150 tmf->resp.resp_iu.resp_data[3]);
151}
152
153
154int isci_task_execute_task(
155 struct sas_task *task,
156 int num,
157 gfp_t gfp_flags);
158
159int isci_task_abort_task(
160 struct sas_task *task);
161
162int isci_task_abort_task_set(
163 struct domain_device *d_device,
164 u8 *lun);
165
166int isci_task_clear_aca(
167 struct domain_device *d_device,
168 u8 *lun);
169
170int isci_task_clear_task_set(
171 struct domain_device *d_device,
172 u8 *lun);
173
174int isci_task_query_task(
175 struct sas_task *task);
176
177int isci_task_lu_reset(
178 struct domain_device *d_device,
179 u8 *lun);
180
181int isci_task_clear_nexus_port(
182 struct asd_sas_port *port);
183
184int isci_task_clear_nexus_ha(
185 struct sas_ha_struct *ha);
186
187int isci_task_I_T_nexus_reset(
188 struct domain_device *d_device);
189
190void isci_task_request_complete(
191 struct isci_host *isci_host,
192 struct isci_request *request,
193 enum sci_task_status completion_status);
194
195u16 isci_task_ssp_request_get_io_tag_to_manage(
196 struct isci_request *request);
197
198u8 isci_task_ssp_request_get_function(
199 struct isci_request *request);
200
201
202void *isci_task_ssp_request_get_response_data_address(
203 struct isci_request *request);
204
205u32 isci_task_ssp_request_get_response_data_length(
206 struct isci_request *request);
207
208int isci_queuecommand(
209 struct scsi_cmnd *scsi_cmd,
210 void (*donefunc)(struct scsi_cmnd *));
211
212int isci_bus_reset_handler(struct scsi_cmnd *cmd);
213
214/**
215 * enum isci_completion_selection - This enum defines the possible actions to
216 * take with respect to a given request's notification back to libsas.
217 *
218 *
219 */
220enum isci_completion_selection {
221
222 isci_perform_normal_io_completion, /* Normal notify (task_done) */
223 isci_perform_aborted_io_completion, /* No notification. */
224 isci_perform_error_io_completion /* Use sas_task_abort */
225};
226
227static inline void isci_set_task_doneflags(
228 struct sas_task *task)
229{
230 /* Since no futher action will be taken on this task,
231 * make sure to mark it complete from the lldd perspective.
232 */
233 task->task_state_flags |= SAS_TASK_STATE_DONE;
234 task->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
235 task->task_state_flags &= ~SAS_TASK_STATE_PENDING;
236}
237/**
238 * isci_task_all_done() - This function clears the task bits to indicate the
239 * LLDD is done with the task.
240 *
241 *
242 */
243static inline void isci_task_all_done(
244 struct sas_task *task)
245{
246 unsigned long flags;
247
248 /* Since no futher action will be taken on this task,
249 * make sure to mark it complete from the lldd perspective.
250 */
251 spin_lock_irqsave(&task->task_state_lock, flags);
252 isci_set_task_doneflags(task);
253 spin_unlock_irqrestore(&task->task_state_lock, flags);
254}
255
256/**
257 * isci_task_set_completion_status() - This function sets the completion status
258 * for the request.
259 * @task: This parameter is the completed request.
260 * @response: This parameter is the response code for the completed task.
261 * @status: This parameter is the status code for the completed task.
262 *
263* @return The new notification mode for the request.
264*/
265static inline enum isci_completion_selection
266isci_task_set_completion_status(
267 struct sas_task *task,
268 enum service_response response,
269 enum exec_status status,
270 enum isci_completion_selection task_notification_selection)
271{
272 unsigned long flags;
273
274 spin_lock_irqsave(&task->task_state_lock, flags);
275
276 /* If a device reset is being indicated, make sure the I/O
277 * is in the error path.
278 */
279 if (task->task_state_flags & SAS_TASK_NEED_DEV_RESET) {
280 /* Fail the I/O to make sure it goes into the error path. */
281 response = SAS_TASK_UNDELIVERED;
282 status = SAM_STAT_TASK_ABORTED;
283
284 task_notification_selection = isci_perform_error_io_completion;
285 }
286 task->task_status.resp = response;
287 task->task_status.stat = status;
288
289 switch (task_notification_selection) {
290
291 case isci_perform_error_io_completion:
292
293 if (task->task_proto == SAS_PROTOCOL_SMP) {
294 /* There is no error escalation in the SMP case.
295 * Convert to a normal completion to avoid the
296 * timeout in the discovery path and to let the
297 * next action take place quickly.
298 */
299 task_notification_selection
300 = isci_perform_normal_io_completion;
301
302 /* Fall through to the normal case... */
303 } else {
304 /* Use sas_task_abort */
305 /* Leave SAS_TASK_STATE_DONE clear
306 * Leave SAS_TASK_AT_INITIATOR set.
307 */
308 break;
309 }
310
311 case isci_perform_aborted_io_completion:
312 /* This path can occur with task-managed requests as well as
313 * requests terminated because of LUN or device resets.
314 */
315 /* Fall through to the normal case... */
316 case isci_perform_normal_io_completion:
317 /* Normal notification (task_done) */
318 isci_set_task_doneflags(task);
319 break;
320 default:
321 WARN_ONCE(1, "unknown task_notification_selection: %d\n",
322 task_notification_selection);
323 break;
324 }
325
326 spin_unlock_irqrestore(&task->task_state_lock, flags);
327
328 return task_notification_selection;
329
330}
331/**
332* isci_execpath_callback() - This function is called from the task
333* execute path when the task needs to callback libsas about the submit-time
334* task failure. The callback occurs either through the task's done function
335* or through sas_task_abort. In the case of regular non-discovery SATA/STP I/O
336* requests, libsas takes the host lock before calling execute task. Therefore
337* in this situation the host lock must be managed before calling the func.
338*
339* @ihost: This parameter is the controller to which the I/O request was sent.
340* @task: This parameter is the I/O request.
341* @func: This parameter is the function to call in the correct context.
342* @status: This parameter is the status code for the completed task.
343*
344*/
345static inline void isci_execpath_callback(struct isci_host *ihost,
346 struct sas_task *task,
347 void (*func)(struct sas_task *))
348{
349 struct domain_device *dev = task->dev;
350
351 if (dev_is_sata(dev) && task->uldd_task) {
352 unsigned long flags;
353
354 /* Since we are still in the submit path, and since
355 * libsas takes the host lock on behalf of SATA
356 * devices before I/O starts (in the non-discovery case),
357 * we need to unlock before we can call the callback function.
358 */
359 raw_local_irq_save(flags);
360 spin_unlock(dev->sata_dev.ap->lock);
361 func(task);
362 spin_lock(dev->sata_dev.ap->lock);
363 raw_local_irq_restore(flags);
364 } else
365 func(task);
366}
367#endif /* !defined(_SCI_TASK_H_) */
diff --git a/drivers/scsi/isci/unsolicited_frame_control.c b/drivers/scsi/isci/unsolicited_frame_control.c
new file mode 100644
index 000000000000..e9e1e2abacb9
--- /dev/null
+++ b/drivers/scsi/isci/unsolicited_frame_control.c
@@ -0,0 +1,225 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include "host.h"
57#include "unsolicited_frame_control.h"
58#include "registers.h"
59
60int sci_unsolicited_frame_control_construct(struct isci_host *ihost)
61{
62 struct sci_unsolicited_frame_control *uf_control = &ihost->uf_control;
63 struct sci_unsolicited_frame *uf;
64 u32 buf_len, header_len, i;
65 dma_addr_t dma;
66 size_t size;
67 void *virt;
68
69 /*
70 * Prepare all of the memory sizes for the UF headers, UF address
71 * table, and UF buffers themselves.
72 */
73 buf_len = SCU_MAX_UNSOLICITED_FRAMES * SCU_UNSOLICITED_FRAME_BUFFER_SIZE;
74 header_len = SCU_MAX_UNSOLICITED_FRAMES * sizeof(struct scu_unsolicited_frame_header);
75 size = buf_len + header_len + SCU_MAX_UNSOLICITED_FRAMES * sizeof(dma_addr_t);
76
77 /*
78 * The Unsolicited Frame buffers are set at the start of the UF
79 * memory descriptor entry. The headers and address table will be
80 * placed after the buffers.
81 */
82 virt = dmam_alloc_coherent(&ihost->pdev->dev, size, &dma, GFP_KERNEL);
83 if (!virt)
84 return -ENOMEM;
85
86 /*
87 * Program the location of the UF header table into the SCU.
88 * Notes:
89 * - The address must align on a 64-byte boundary. Guaranteed to be
90 * on 64-byte boundary already 1KB boundary for unsolicited frames.
91 * - Program unused header entries to overlap with the last
92 * unsolicited frame. The silicon will never DMA to these unused
93 * headers, since we program the UF address table pointers to
94 * NULL.
95 */
96 uf_control->headers.physical_address = dma + buf_len;
97 uf_control->headers.array = virt + buf_len;
98
99 /*
100 * Program the location of the UF address table into the SCU.
101 * Notes:
102 * - The address must align on a 64-bit boundary. Guaranteed to be on 64
103 * byte boundary already due to above programming headers being on a
104 * 64-bit boundary and headers are on a 64-bytes in size.
105 */
106 uf_control->address_table.physical_address = dma + buf_len + header_len;
107 uf_control->address_table.array = virt + buf_len + header_len;
108 uf_control->get = 0;
109
110 /*
111 * UF buffer requirements are:
112 * - The last entry in the UF queue is not NULL.
113 * - There is a power of 2 number of entries (NULL or not-NULL)
114 * programmed into the queue.
115 * - Aligned on a 1KB boundary. */
116
117 /*
118 * Program the actual used UF buffers into the UF address table and
119 * the controller's array of UFs.
120 */
121 for (i = 0; i < SCU_MAX_UNSOLICITED_FRAMES; i++) {
122 uf = &uf_control->buffers.array[i];
123
124 uf_control->address_table.array[i] = dma;
125
126 uf->buffer = virt;
127 uf->header = &uf_control->headers.array[i];
128 uf->state = UNSOLICITED_FRAME_EMPTY;
129
130 /*
131 * Increment the address of the physical and virtual memory
132 * pointers. Everything is aligned on 1k boundary with an
133 * increment of 1k.
134 */
135 virt += SCU_UNSOLICITED_FRAME_BUFFER_SIZE;
136 dma += SCU_UNSOLICITED_FRAME_BUFFER_SIZE;
137 }
138
139 return 0;
140}
141
142enum sci_status sci_unsolicited_frame_control_get_header(struct sci_unsolicited_frame_control *uf_control,
143 u32 frame_index,
144 void **frame_header)
145{
146 if (frame_index < SCU_MAX_UNSOLICITED_FRAMES) {
147 /* Skip the first word in the frame since this is a controll word used
148 * by the hardware.
149 */
150 *frame_header = &uf_control->buffers.array[frame_index].header->data;
151
152 return SCI_SUCCESS;
153 }
154
155 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
156}
157
158enum sci_status sci_unsolicited_frame_control_get_buffer(struct sci_unsolicited_frame_control *uf_control,
159 u32 frame_index,
160 void **frame_buffer)
161{
162 if (frame_index < SCU_MAX_UNSOLICITED_FRAMES) {
163 *frame_buffer = uf_control->buffers.array[frame_index].buffer;
164
165 return SCI_SUCCESS;
166 }
167
168 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
169}
170
171bool sci_unsolicited_frame_control_release_frame(struct sci_unsolicited_frame_control *uf_control,
172 u32 frame_index)
173{
174 u32 frame_get;
175 u32 frame_cycle;
176
177 frame_get = uf_control->get & (SCU_MAX_UNSOLICITED_FRAMES - 1);
178 frame_cycle = uf_control->get & SCU_MAX_UNSOLICITED_FRAMES;
179
180 /*
181 * In the event there are NULL entries in the UF table, we need to
182 * advance the get pointer in order to find out if this frame should
183 * be released (i.e. update the get pointer)
184 */
185 while (lower_32_bits(uf_control->address_table.array[frame_get]) == 0 &&
186 upper_32_bits(uf_control->address_table.array[frame_get]) == 0 &&
187 frame_get < SCU_MAX_UNSOLICITED_FRAMES)
188 frame_get++;
189
190 /*
191 * The table has a NULL entry as it's last element. This is
192 * illegal.
193 */
194 BUG_ON(frame_get >= SCU_MAX_UNSOLICITED_FRAMES);
195 if (frame_index >= SCU_MAX_UNSOLICITED_FRAMES)
196 return false;
197
198 uf_control->buffers.array[frame_index].state = UNSOLICITED_FRAME_RELEASED;
199
200 if (frame_get != frame_index) {
201 /*
202 * Frames remain in use until we advance the get pointer
203 * so there is nothing we can do here
204 */
205 return false;
206 }
207
208 /*
209 * The frame index is equal to the current get pointer so we
210 * can now free up all of the frame entries that
211 */
212 while (uf_control->buffers.array[frame_get].state == UNSOLICITED_FRAME_RELEASED) {
213 uf_control->buffers.array[frame_get].state = UNSOLICITED_FRAME_EMPTY;
214
215 if (frame_get+1 == SCU_MAX_UNSOLICITED_FRAMES-1) {
216 frame_cycle ^= SCU_MAX_UNSOLICITED_FRAMES;
217 frame_get = 0;
218 } else
219 frame_get++;
220 }
221
222 uf_control->get = SCU_UFQGP_GEN_BIT(ENABLE_BIT) | frame_cycle | frame_get;
223
224 return true;
225}
diff --git a/drivers/scsi/isci/unsolicited_frame_control.h b/drivers/scsi/isci/unsolicited_frame_control.h
new file mode 100644
index 000000000000..31cb9506f52d
--- /dev/null
+++ b/drivers/scsi/isci/unsolicited_frame_control.h
@@ -0,0 +1,278 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _SCIC_SDS_UNSOLICITED_FRAME_CONTROL_H_
57#define _SCIC_SDS_UNSOLICITED_FRAME_CONTROL_H_
58
59#include "isci.h"
60
61#define SCU_UNSOLICITED_FRAME_HEADER_DATA_DWORDS 15
62
63/**
64 * struct scu_unsolicited_frame_header -
65 *
66 * This structure delineates the format of an unsolicited frame header. The
67 * first DWORD are UF attributes defined by the silicon architecture. The data
68 * depicts actual header information received on the link.
69 */
70struct scu_unsolicited_frame_header {
71 /**
72 * This field indicates if there is an Initiator Index Table entry with
73 * which this header is associated.
74 */
75 u32 iit_exists:1;
76
77 /**
78 * This field simply indicates the protocol type (i.e. SSP, STP, SMP).
79 */
80 u32 protocol_type:3;
81
82 /**
83 * This field indicates if the frame is an address frame (IAF or OAF)
84 * or if it is a information unit frame.
85 */
86 u32 is_address_frame:1;
87
88 /**
89 * This field simply indicates the connection rate at which the frame
90 * was received.
91 */
92 u32 connection_rate:4;
93
94 u32 reserved:23;
95
96 /**
97 * This field represents the actual header data received on the link.
98 */
99 u32 data[SCU_UNSOLICITED_FRAME_HEADER_DATA_DWORDS];
100
101};
102
103
104
105/**
106 * enum unsolicited_frame_state -
107 *
108 * This enumeration represents the current unsolicited frame state. The
109 * controller object can not updtate the hardware unsolicited frame put pointer
110 * unless it has already processed the priror unsolicited frames.
111 */
112enum unsolicited_frame_state {
113 /**
114 * This state is when the frame is empty and not in use. It is
115 * different from the released state in that the hardware could DMA
116 * data to this frame buffer.
117 */
118 UNSOLICITED_FRAME_EMPTY,
119
120 /**
121 * This state is set when the frame buffer is in use by by some
122 * object in the system.
123 */
124 UNSOLICITED_FRAME_IN_USE,
125
126 /**
127 * This state is set when the frame is returned to the free pool
128 * but one or more frames prior to this one are still in use.
129 * Once all of the frame before this one are freed it will go to
130 * the empty state.
131 */
132 UNSOLICITED_FRAME_RELEASED,
133
134 UNSOLICITED_FRAME_MAX_STATES
135};
136
137/**
138 * struct sci_unsolicited_frame -
139 *
140 * This is the unsolicited frame data structure it acts as the container for
141 * the current frame state, frame header and frame buffer.
142 */
143struct sci_unsolicited_frame {
144 /**
145 * This field contains the current frame state
146 */
147 enum unsolicited_frame_state state;
148
149 /**
150 * This field points to the frame header data.
151 */
152 struct scu_unsolicited_frame_header *header;
153
154 /**
155 * This field points to the frame buffer data.
156 */
157 void *buffer;
158
159};
160
161/**
162 * struct sci_uf_header_array -
163 *
164 * This structure contains all of the unsolicited frame header information.
165 */
166struct sci_uf_header_array {
167 /**
168 * This field is represents a virtual pointer to the start
169 * address of the UF address table. The table contains
170 * 64-bit pointers as required by the hardware.
171 */
172 struct scu_unsolicited_frame_header *array;
173
174 /**
175 * This field specifies the physical address location for the UF
176 * buffer array.
177 */
178 dma_addr_t physical_address;
179
180};
181
182/**
183 * struct sci_uf_buffer_array -
184 *
185 * This structure contains all of the unsolicited frame buffer (actual payload)
186 * information.
187 */
188struct sci_uf_buffer_array {
189 /**
190 * This field is the unsolicited frame data its used to manage
191 * the data for the unsolicited frame requests. It also represents
192 * the virtual address location that corresponds to the
193 * physical_address field.
194 */
195 struct sci_unsolicited_frame array[SCU_MAX_UNSOLICITED_FRAMES];
196
197 /**
198 * This field specifies the physical address location for the UF
199 * buffer array.
200 */
201 dma_addr_t physical_address;
202};
203
204/**
205 * struct sci_uf_address_table_array -
206 *
207 * This object maintains all of the unsolicited frame address table specific
208 * data. The address table is a collection of 64-bit pointers that point to
209 * 1KB buffers into which the silicon will DMA unsolicited frames.
210 */
211struct sci_uf_address_table_array {
212 /**
213 * This field represents a virtual pointer that refers to the
214 * starting address of the UF address table.
215 * 64-bit pointers are required by the hardware.
216 */
217 dma_addr_t *array;
218
219 /**
220 * This field specifies the physical address location for the UF
221 * address table.
222 */
223 dma_addr_t physical_address;
224
225};
226
227/**
228 * struct sci_unsolicited_frame_control -
229 *
230 * This object contains all of the data necessary to handle unsolicited frames.
231 */
232struct sci_unsolicited_frame_control {
233 /**
234 * This field is the software copy of the unsolicited frame queue
235 * get pointer. The controller object writes this value to the
236 * hardware to let the hardware put more unsolicited frame entries.
237 */
238 u32 get;
239
240 /**
241 * This field contains all of the unsolicited frame header
242 * specific fields.
243 */
244 struct sci_uf_header_array headers;
245
246 /**
247 * This field contains all of the unsolicited frame buffer
248 * specific fields.
249 */
250 struct sci_uf_buffer_array buffers;
251
252 /**
253 * This field contains all of the unsolicited frame address table
254 * specific fields.
255 */
256 struct sci_uf_address_table_array address_table;
257
258};
259
260struct isci_host;
261
262int sci_unsolicited_frame_control_construct(struct isci_host *ihost);
263
264enum sci_status sci_unsolicited_frame_control_get_header(
265 struct sci_unsolicited_frame_control *uf_control,
266 u32 frame_index,
267 void **frame_header);
268
269enum sci_status sci_unsolicited_frame_control_get_buffer(
270 struct sci_unsolicited_frame_control *uf_control,
271 u32 frame_index,
272 void **frame_buffer);
273
274bool sci_unsolicited_frame_control_release_frame(
275 struct sci_unsolicited_frame_control *uf_control,
276 u32 frame_index);
277
278#endif /* _SCIC_SDS_UNSOLICITED_FRAME_CONTROL_H_ */
diff --git a/drivers/spi/spi_s3c64xx.c b/drivers/spi/spi_s3c64xx.c
index 795828b90f45..8945e201e42e 100644
--- a/drivers/spi/spi_s3c64xx.c
+++ b/drivers/spi/spi_s3c64xx.c
@@ -116,9 +116,7 @@
116 (((i)->fifo_lvl_mask + 1))) \ 116 (((i)->fifo_lvl_mask + 1))) \
117 ? 1 : 0) 117 ? 1 : 0)
118 118
119#define S3C64XX_SPI_ST_TX_DONE(v, i) ((((v) >> (i)->rx_lvl_offset) & \ 119#define S3C64XX_SPI_ST_TX_DONE(v, i) (((v) & (1 << (i)->tx_st_done)) ? 1 : 0)
120 (((i)->fifo_lvl_mask + 1) << 1)) \
121 ? 1 : 0)
122#define TX_FIFO_LVL(v, i) (((v) >> 6) & (i)->fifo_lvl_mask) 120#define TX_FIFO_LVL(v, i) (((v) >> 6) & (i)->fifo_lvl_mask)
123#define RX_FIFO_LVL(v, i) (((v) >> (i)->rx_lvl_offset) & (i)->fifo_lvl_mask) 121#define RX_FIFO_LVL(v, i) (((v) >> (i)->rx_lvl_offset) & (i)->fifo_lvl_mask)
124 122
diff --git a/drivers/staging/brcm80211/Kconfig b/drivers/staging/brcm80211/Kconfig
index f4cf9b23481e..379cf16e89f7 100644
--- a/drivers/staging/brcm80211/Kconfig
+++ b/drivers/staging/brcm80211/Kconfig
@@ -7,6 +7,7 @@ config BRCMSMAC
7 default n 7 default n
8 depends on PCI 8 depends on PCI
9 depends on WLAN && MAC80211 9 depends on WLAN && MAC80211
10 depends on X86 || MIPS
10 select BRCMUTIL 11 select BRCMUTIL
11 select FW_LOADER 12 select FW_LOADER
12 select CRC_CCITT 13 select CRC_CCITT
@@ -20,6 +21,7 @@ config BRCMFMAC
20 default n 21 default n
21 depends on MMC 22 depends on MMC
22 depends on WLAN && CFG80211 23 depends on WLAN && CFG80211
24 depends on X86 || MIPS
23 select BRCMUTIL 25 select BRCMUTIL
24 select FW_LOADER 26 select FW_LOADER
25 select WIRELESS_EXT 27 select WIRELESS_EXT
diff --git a/drivers/staging/comedi/Kconfig b/drivers/staging/comedi/Kconfig
index 1502d80f6f78..20008a4376e8 100644
--- a/drivers/staging/comedi/Kconfig
+++ b/drivers/staging/comedi/Kconfig
@@ -2,6 +2,7 @@ config COMEDI
2 tristate "Data acquisition support (comedi)" 2 tristate "Data acquisition support (comedi)"
3 default N 3 default N
4 depends on m 4 depends on m
5 depends on BROKEN || FRV || M32R || MN10300 || SUPERH || TILE || X86
5 ---help--- 6 ---help---
6 Enable support a wide range of data acquisition devices 7 Enable support a wide range of data acquisition devices
7 for Linux. 8 for Linux.
@@ -160,6 +161,7 @@ config COMEDI_PCL730
160 161
161config COMEDI_PCL812 162config COMEDI_PCL812
162 tristate "Advantech PCL-812/813 and ADlink ACL-8112/8113/8113/8216" 163 tristate "Advantech PCL-812/813 and ADlink ACL-8112/8113/8113/8216"
164 depends on VIRT_TO_BUS
163 default N 165 default N
164 ---help--- 166 ---help---
165 Enable support for Advantech PCL-812/PG, PCL-813/B, ADLink 167 Enable support for Advantech PCL-812/PG, PCL-813/B, ADLink
@@ -171,6 +173,7 @@ config COMEDI_PCL812
171 173
172config COMEDI_PCL816 174config COMEDI_PCL816
173 tristate "Advantech PCL-814 and PCL-816 ISA card support" 175 tristate "Advantech PCL-814 and PCL-816 ISA card support"
176 depends on VIRT_TO_BUS
174 default N 177 default N
175 ---help--- 178 ---help---
176 Enable support for Advantech PCL-814 and PCL-816 ISA cards 179 Enable support for Advantech PCL-814 and PCL-816 ISA cards
@@ -180,6 +183,7 @@ config COMEDI_PCL816
180 183
181config COMEDI_PCL818 184config COMEDI_PCL818
182 tristate "Advantech PCL-718 and PCL-818 ISA card support" 185 tristate "Advantech PCL-718 and PCL-818 ISA card support"
186 depends on VIRT_TO_BUS
183 default N 187 default N
184 ---help--- 188 ---help---
185 Enable support for Advantech PCL-818 ISA cards 189 Enable support for Advantech PCL-818 ISA cards
@@ -269,6 +273,7 @@ config COMEDI_DAS800
269 273
270config COMEDI_DAS1800 274config COMEDI_DAS1800
271 tristate "DAS1800 and compatible ISA card support" 275 tristate "DAS1800 and compatible ISA card support"
276 depends on VIRT_TO_BUS
272 select COMEDI_FC 277 select COMEDI_FC
273 default N 278 default N
274 ---help--- 279 ---help---
@@ -340,6 +345,7 @@ config COMEDI_DT2817
340config COMEDI_DT282X 345config COMEDI_DT282X
341 tristate "Data Translation DT2821 series and DT-EZ ISA card support" 346 tristate "Data Translation DT2821 series and DT-EZ ISA card support"
342 select COMEDI_FC 347 select COMEDI_FC
348 depends on VIRT_TO_BUS
343 default N 349 default N
344 ---help--- 350 ---help---
345 Enable support for Data Translation DT2821 series including DT-EZ 351 Enable support for Data Translation DT2821 series including DT-EZ
@@ -419,6 +425,7 @@ config COMEDI_ADQ12B
419config COMEDI_NI_AT_A2150 425config COMEDI_NI_AT_A2150
420 tristate "NI AT-A2150 ISA card support" 426 tristate "NI AT-A2150 ISA card support"
421 depends on COMEDI_NI_COMMON 427 depends on COMEDI_NI_COMMON
428 depends on VIRT_TO_BUS
422 default N 429 default N
423 ---help--- 430 ---help---
424 Enable support for National Instruments AT-A2150 cards 431 Enable support for National Instruments AT-A2150 cards
@@ -536,6 +543,7 @@ if COMEDI_PCI_DRIVERS && PCI
536 543
537config COMEDI_ADDI_APCI_035 544config COMEDI_ADDI_APCI_035
538 tristate "ADDI-DATA APCI_035 support" 545 tristate "ADDI-DATA APCI_035 support"
546 depends on VIRT_TO_BUS
539 default N 547 default N
540 ---help--- 548 ---help---
541 Enable support for ADDI-DATA APCI_035 cards 549 Enable support for ADDI-DATA APCI_035 cards
@@ -545,6 +553,7 @@ config COMEDI_ADDI_APCI_035
545 553
546config COMEDI_ADDI_APCI_1032 554config COMEDI_ADDI_APCI_1032
547 tristate "ADDI-DATA APCI_1032 support" 555 tristate "ADDI-DATA APCI_1032 support"
556 depends on VIRT_TO_BUS
548 default N 557 default N
549 ---help--- 558 ---help---
550 Enable support for ADDI-DATA APCI_1032 cards 559 Enable support for ADDI-DATA APCI_1032 cards
@@ -554,6 +563,7 @@ config COMEDI_ADDI_APCI_1032
554 563
555config COMEDI_ADDI_APCI_1500 564config COMEDI_ADDI_APCI_1500
556 tristate "ADDI-DATA APCI_1500 support" 565 tristate "ADDI-DATA APCI_1500 support"
566 depends on VIRT_TO_BUS
557 default N 567 default N
558 ---help--- 568 ---help---
559 Enable support for ADDI-DATA APCI_1500 cards 569 Enable support for ADDI-DATA APCI_1500 cards
@@ -563,6 +573,7 @@ config COMEDI_ADDI_APCI_1500
563 573
564config COMEDI_ADDI_APCI_1516 574config COMEDI_ADDI_APCI_1516
565 tristate "ADDI-DATA APCI_1516 support" 575 tristate "ADDI-DATA APCI_1516 support"
576 depends on VIRT_TO_BUS
566 default N 577 default N
567 ---help--- 578 ---help---
568 Enable support for ADDI-DATA APCI_1516 cards 579 Enable support for ADDI-DATA APCI_1516 cards
@@ -572,6 +583,7 @@ config COMEDI_ADDI_APCI_1516
572 583
573config COMEDI_ADDI_APCI_1564 584config COMEDI_ADDI_APCI_1564
574 tristate "ADDI-DATA APCI_1564 support" 585 tristate "ADDI-DATA APCI_1564 support"
586 depends on VIRT_TO_BUS
575 default N 587 default N
576 ---help--- 588 ---help---
577 Enable support for ADDI-DATA APCI_1564 cards 589 Enable support for ADDI-DATA APCI_1564 cards
@@ -581,6 +593,7 @@ config COMEDI_ADDI_APCI_1564
581 593
582config COMEDI_ADDI_APCI_16XX 594config COMEDI_ADDI_APCI_16XX
583 tristate "ADDI-DATA APCI_16xx support" 595 tristate "ADDI-DATA APCI_16xx support"
596 depends on VIRT_TO_BUS
584 default N 597 default N
585 ---help--- 598 ---help---
586 Enable support for ADDI-DATA APCI_16xx cards 599 Enable support for ADDI-DATA APCI_16xx cards
@@ -590,6 +603,7 @@ config COMEDI_ADDI_APCI_16XX
590 603
591config COMEDI_ADDI_APCI_2016 604config COMEDI_ADDI_APCI_2016
592 tristate "ADDI-DATA APCI_2016 support" 605 tristate "ADDI-DATA APCI_2016 support"
606 depends on VIRT_TO_BUS
593 default N 607 default N
594 ---help--- 608 ---help---
595 Enable support for ADDI-DATA APCI_2016 cards 609 Enable support for ADDI-DATA APCI_2016 cards
@@ -599,6 +613,7 @@ config COMEDI_ADDI_APCI_2016
599 613
600config COMEDI_ADDI_APCI_2032 614config COMEDI_ADDI_APCI_2032
601 tristate "ADDI-DATA APCI_2032 support" 615 tristate "ADDI-DATA APCI_2032 support"
616 depends on VIRT_TO_BUS
602 default N 617 default N
603 ---help--- 618 ---help---
604 Enable support for ADDI-DATA APCI_2032 cards 619 Enable support for ADDI-DATA APCI_2032 cards
@@ -608,6 +623,7 @@ config COMEDI_ADDI_APCI_2032
608 623
609config COMEDI_ADDI_APCI_2200 624config COMEDI_ADDI_APCI_2200
610 tristate "ADDI-DATA APCI_2200 support" 625 tristate "ADDI-DATA APCI_2200 support"
626 depends on VIRT_TO_BUS
611 default N 627 default N
612 ---help--- 628 ---help---
613 Enable support for ADDI-DATA APCI_2200 cards 629 Enable support for ADDI-DATA APCI_2200 cards
@@ -617,6 +633,7 @@ config COMEDI_ADDI_APCI_2200
617 633
618config COMEDI_ADDI_APCI_3001 634config COMEDI_ADDI_APCI_3001
619 tristate "ADDI-DATA APCI_3001 support" 635 tristate "ADDI-DATA APCI_3001 support"
636 depends on VIRT_TO_BUS
620 select COMEDI_FC 637 select COMEDI_FC
621 default N 638 default N
622 ---help--- 639 ---help---
@@ -627,6 +644,7 @@ config COMEDI_ADDI_APCI_3001
627 644
628config COMEDI_ADDI_APCI_3120 645config COMEDI_ADDI_APCI_3120
629 tristate "ADDI-DATA APCI_3520 support" 646 tristate "ADDI-DATA APCI_3520 support"
647 depends on VIRT_TO_BUS
630 select COMEDI_FC 648 select COMEDI_FC
631 default N 649 default N
632 ---help--- 650 ---help---
@@ -637,6 +655,7 @@ config COMEDI_ADDI_APCI_3120
637 655
638config COMEDI_ADDI_APCI_3501 656config COMEDI_ADDI_APCI_3501
639 tristate "ADDI-DATA APCI_3501 support" 657 tristate "ADDI-DATA APCI_3501 support"
658 depends on VIRT_TO_BUS
640 default N 659 default N
641 ---help--- 660 ---help---
642 Enable support for ADDI-DATA APCI_3501 cards 661 Enable support for ADDI-DATA APCI_3501 cards
@@ -646,6 +665,7 @@ config COMEDI_ADDI_APCI_3501
646 665
647config COMEDI_ADDI_APCI_3XXX 666config COMEDI_ADDI_APCI_3XXX
648 tristate "ADDI-DATA APCI_3xxx support" 667 tristate "ADDI-DATA APCI_3xxx support"
668 depends on VIRT_TO_BUS
649 default N 669 default N
650 ---help--- 670 ---help---
651 Enable support for ADDI-DATA APCI_3xxx cards 671 Enable support for ADDI-DATA APCI_3xxx cards
@@ -712,6 +732,7 @@ config COMEDI_ADL_PCI9111
712config COMEDI_ADL_PCI9118 732config COMEDI_ADL_PCI9118
713 tristate "ADLink PCI-9118DG, PCI-9118HG, PCI-9118HR support" 733 tristate "ADLink PCI-9118DG, PCI-9118HG, PCI-9118HR support"
714 select COMEDI_FC 734 select COMEDI_FC
735 depends on VIRT_TO_BUS
715 default N 736 default N
716 ---help--- 737 ---help---
717 Enable support for ADlink PCI-9118DG, PCI-9118HG, PCI-9118HR cards 738 Enable support for ADlink PCI-9118DG, PCI-9118HG, PCI-9118HR cards
@@ -1287,6 +1308,7 @@ config COMEDI_NI_LABPC
1287 depends on COMEDI_MITE 1308 depends on COMEDI_MITE
1288 select COMEDI_8255 1309 select COMEDI_8255
1289 select COMEDI_FC 1310 select COMEDI_FC
1311 depends on VIRT_TO_BUS
1290 default N 1312 default N
1291 ---help--- 1313 ---help---
1292 Enable support for National Instruments Lab-PC and compatibles 1314 Enable support for National Instruments Lab-PC and compatibles
diff --git a/drivers/staging/iio/Kconfig b/drivers/staging/iio/Kconfig
index f96d5b5d5141..d329635fb5c4 100644
--- a/drivers/staging/iio/Kconfig
+++ b/drivers/staging/iio/Kconfig
@@ -4,7 +4,7 @@
4 4
5menuconfig IIO 5menuconfig IIO
6 tristate "Industrial I/O support" 6 tristate "Industrial I/O support"
7 depends on !S390 7 depends on GENERIC_HARDIRQS
8 help 8 help
9 The industrial I/O subsystem provides a unified framework for 9 The industrial I/O subsystem provides a unified framework for
10 drivers for many different types of embedded sensors using a 10 drivers for many different types of embedded sensors using a
diff --git a/drivers/staging/iio/accel/adis16204.h b/drivers/staging/iio/accel/adis16204.h
index 5310a4297688..1690c0d15690 100644
--- a/drivers/staging/iio/accel/adis16204.h
+++ b/drivers/staging/iio/accel/adis16204.h
@@ -84,7 +84,6 @@ struct adis16204_state {
84 84
85int adis16204_set_irq(struct iio_dev *indio_dev, bool enable); 85int adis16204_set_irq(struct iio_dev *indio_dev, bool enable);
86 86
87#ifdef CONFIG_IIO_RING_BUFFER
88enum adis16204_scan { 87enum adis16204_scan {
89 ADIS16204_SCAN_SUPPLY, 88 ADIS16204_SCAN_SUPPLY,
90 ADIS16204_SCAN_ACC_X, 89 ADIS16204_SCAN_ACC_X,
@@ -93,6 +92,7 @@ enum adis16204_scan {
93 ADIS16204_SCAN_TEMP, 92 ADIS16204_SCAN_TEMP,
94}; 93};
95 94
95#ifdef CONFIG_IIO_RING_BUFFER
96void adis16204_remove_trigger(struct iio_dev *indio_dev); 96void adis16204_remove_trigger(struct iio_dev *indio_dev);
97int adis16204_probe_trigger(struct iio_dev *indio_dev); 97int adis16204_probe_trigger(struct iio_dev *indio_dev);
98 98
diff --git a/drivers/staging/iio/accel/adis16209.h b/drivers/staging/iio/accel/adis16209.h
index 58d08db6f9b5..3153cbee0957 100644
--- a/drivers/staging/iio/accel/adis16209.h
+++ b/drivers/staging/iio/accel/adis16209.h
@@ -121,8 +121,6 @@ struct adis16209_state {
121 121
122int adis16209_set_irq(struct iio_dev *indio_dev, bool enable); 122int adis16209_set_irq(struct iio_dev *indio_dev, bool enable);
123 123
124#ifdef CONFIG_IIO_RING_BUFFER
125
126#define ADIS16209_SCAN_SUPPLY 0 124#define ADIS16209_SCAN_SUPPLY 0
127#define ADIS16209_SCAN_ACC_X 1 125#define ADIS16209_SCAN_ACC_X 1
128#define ADIS16209_SCAN_ACC_Y 2 126#define ADIS16209_SCAN_ACC_Y 2
@@ -132,6 +130,8 @@ int adis16209_set_irq(struct iio_dev *indio_dev, bool enable);
132#define ADIS16209_SCAN_INCLI_Y 6 130#define ADIS16209_SCAN_INCLI_Y 6
133#define ADIS16209_SCAN_ROT 7 131#define ADIS16209_SCAN_ROT 7
134 132
133#ifdef CONFIG_IIO_RING_BUFFER
134
135void adis16209_remove_trigger(struct iio_dev *indio_dev); 135void adis16209_remove_trigger(struct iio_dev *indio_dev);
136int adis16209_probe_trigger(struct iio_dev *indio_dev); 136int adis16209_probe_trigger(struct iio_dev *indio_dev);
137 137
diff --git a/drivers/staging/iio/gyro/adis16260.h b/drivers/staging/iio/gyro/adis16260.h
index 702dc982f62f..24bf70e4b29b 100644
--- a/drivers/staging/iio/gyro/adis16260.h
+++ b/drivers/staging/iio/gyro/adis16260.h
@@ -104,7 +104,6 @@ struct adis16260_state {
104 104
105int adis16260_set_irq(struct iio_dev *indio_dev, bool enable); 105int adis16260_set_irq(struct iio_dev *indio_dev, bool enable);
106 106
107#ifdef CONFIG_IIO_RING_BUFFER
108/* At the moment triggers are only used for ring buffer 107/* At the moment triggers are only used for ring buffer
109 * filling. This may change! 108 * filling. This may change!
110 */ 109 */
@@ -115,6 +114,7 @@ int adis16260_set_irq(struct iio_dev *indio_dev, bool enable);
115#define ADIS16260_SCAN_TEMP 3 114#define ADIS16260_SCAN_TEMP 3
116#define ADIS16260_SCAN_ANGL 4 115#define ADIS16260_SCAN_ANGL 4
117 116
117#ifdef CONFIG_IIO_RING_BUFFER
118void adis16260_remove_trigger(struct iio_dev *indio_dev); 118void adis16260_remove_trigger(struct iio_dev *indio_dev);
119int adis16260_probe_trigger(struct iio_dev *indio_dev); 119int adis16260_probe_trigger(struct iio_dev *indio_dev);
120 120
diff --git a/drivers/staging/iio/imu/adis16400.h b/drivers/staging/iio/imu/adis16400.h
index db184d11dfc0..e87715b9acc6 100644
--- a/drivers/staging/iio/imu/adis16400.h
+++ b/drivers/staging/iio/imu/adis16400.h
@@ -158,7 +158,6 @@ struct adis16400_state {
158 158
159int adis16400_set_irq(struct iio_dev *indio_dev, bool enable); 159int adis16400_set_irq(struct iio_dev *indio_dev, bool enable);
160 160
161#ifdef CONFIG_IIO_RING_BUFFER
162/* At the moment triggers are only used for ring buffer 161/* At the moment triggers are only used for ring buffer
163 * filling. This may change! 162 * filling. This may change!
164 */ 163 */
@@ -182,6 +181,7 @@ int adis16400_set_irq(struct iio_dev *indio_dev, bool enable);
182#define ADIS16300_SCAN_INCLI_X 12 181#define ADIS16300_SCAN_INCLI_X 12
183#define ADIS16300_SCAN_INCLI_Y 13 182#define ADIS16300_SCAN_INCLI_Y 13
184 183
184#ifdef CONFIG_IIO_RING_BUFFER
185void adis16400_remove_trigger(struct iio_dev *indio_dev); 185void adis16400_remove_trigger(struct iio_dev *indio_dev);
186int adis16400_probe_trigger(struct iio_dev *indio_dev); 186int adis16400_probe_trigger(struct iio_dev *indio_dev);
187 187
diff --git a/drivers/staging/lirc/lirc_imon.c b/drivers/staging/lirc/lirc_imon.c
index 4039eda2a15b..4a9e563f40fa 100644
--- a/drivers/staging/lirc/lirc_imon.c
+++ b/drivers/staging/lirc/lirc_imon.c
@@ -672,8 +672,6 @@ static void imon_incoming_packet(struct imon_context *context,
672static void usb_rx_callback(struct urb *urb) 672static void usb_rx_callback(struct urb *urb)
673{ 673{
674 struct imon_context *context; 674 struct imon_context *context;
675 unsigned char *buf;
676 int len;
677 int intfnum = 0; 675 int intfnum = 0;
678 676
679 if (!urb) 677 if (!urb)
@@ -683,9 +681,6 @@ static void usb_rx_callback(struct urb *urb)
683 if (!context) 681 if (!context)
684 return; 682 return;
685 683
686 buf = urb->transfer_buffer;
687 len = urb->actual_length;
688
689 switch (urb->status) { 684 switch (urb->status) {
690 case -ENOENT: /* usbcore unlink successful! */ 685 case -ENOENT: /* usbcore unlink successful! */
691 return; 686 return;
@@ -728,7 +723,6 @@ static int imon_probe(struct usb_interface *interface,
728 int ir_ep_found = 0; 723 int ir_ep_found = 0;
729 int alloc_status = 0; 724 int alloc_status = 0;
730 int vfd_proto_6p = 0; 725 int vfd_proto_6p = 0;
731 int code_length;
732 struct imon_context *context = NULL; 726 struct imon_context *context = NULL;
733 int i; 727 int i;
734 u16 vendor, product; 728 u16 vendor, product;
@@ -749,8 +743,6 @@ static int imon_probe(struct usb_interface *interface,
749 else 743 else
750 context->display = 1; 744 context->display = 1;
751 745
752 code_length = BUF_CHUNK_SIZE * 8;
753
754 usbdev = usb_get_dev(interface_to_usbdev(interface)); 746 usbdev = usb_get_dev(interface_to_usbdev(interface));
755 iface_desc = interface->cur_altsetting; 747 iface_desc = interface->cur_altsetting;
756 num_endpts = iface_desc->desc.bNumEndpoints; 748 num_endpts = iface_desc->desc.bNumEndpoints;
@@ -856,7 +848,7 @@ static int imon_probe(struct usb_interface *interface,
856 848
857 strcpy(driver->name, MOD_NAME); 849 strcpy(driver->name, MOD_NAME);
858 driver->minor = -1; 850 driver->minor = -1;
859 driver->code_length = sizeof(int) * 8; 851 driver->code_length = BUF_CHUNK_SIZE * 8;
860 driver->sample_rate = 0; 852 driver->sample_rate = 0;
861 driver->features = LIRC_CAN_REC_MODE2; 853 driver->features = LIRC_CAN_REC_MODE2;
862 driver->data = context; 854 driver->data = context;
diff --git a/drivers/staging/lirc/lirc_serial.c b/drivers/staging/lirc/lirc_serial.c
index 4a3cca03224a..805df913bb6e 100644
--- a/drivers/staging/lirc/lirc_serial.c
+++ b/drivers/staging/lirc/lirc_serial.c
@@ -838,7 +838,23 @@ static int hardware_init_port(void)
838 838
839static int init_port(void) 839static int init_port(void)
840{ 840{
841 int i, nlow, nhigh; 841 int i, nlow, nhigh, result;
842
843 result = request_irq(irq, irq_handler,
844 IRQF_DISABLED | (share_irq ? IRQF_SHARED : 0),
845 LIRC_DRIVER_NAME, (void *)&hardware);
846
847 switch (result) {
848 case -EBUSY:
849 printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n", irq);
850 return -EBUSY;
851 case -EINVAL:
852 printk(KERN_ERR LIRC_DRIVER_NAME
853 ": Bad irq number or handler\n");
854 return -EINVAL;
855 default:
856 break;
857 };
842 858
843 /* Reserve io region. */ 859 /* Reserve io region. */
844 /* 860 /*
@@ -893,34 +909,17 @@ static int init_port(void)
893 printk(KERN_INFO LIRC_DRIVER_NAME ": Manually using active " 909 printk(KERN_INFO LIRC_DRIVER_NAME ": Manually using active "
894 "%s receiver\n", sense ? "low" : "high"); 910 "%s receiver\n", sense ? "low" : "high");
895 911
912 dprintk("Interrupt %d, port %04x obtained\n", irq, io);
896 return 0; 913 return 0;
897} 914}
898 915
899static int set_use_inc(void *data) 916static int set_use_inc(void *data)
900{ 917{
901 int result;
902 unsigned long flags; 918 unsigned long flags;
903 919
904 /* initialize timestamp */ 920 /* initialize timestamp */
905 do_gettimeofday(&lasttv); 921 do_gettimeofday(&lasttv);
906 922
907 result = request_irq(irq, irq_handler,
908 IRQF_DISABLED | (share_irq ? IRQF_SHARED : 0),
909 LIRC_DRIVER_NAME, (void *)&hardware);
910
911 switch (result) {
912 case -EBUSY:
913 printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n", irq);
914 return -EBUSY;
915 case -EINVAL:
916 printk(KERN_ERR LIRC_DRIVER_NAME
917 ": Bad irq number or handler\n");
918 return -EINVAL;
919 default:
920 dprintk("Interrupt %d, port %04x obtained\n", irq, io);
921 break;
922 }
923
924 spin_lock_irqsave(&hardware[type].lock, flags); 923 spin_lock_irqsave(&hardware[type].lock, flags);
925 924
926 /* Set DLAB 0. */ 925 /* Set DLAB 0. */
@@ -945,10 +944,6 @@ static void set_use_dec(void *data)
945 soutp(UART_IER, sinp(UART_IER) & 944 soutp(UART_IER, sinp(UART_IER) &
946 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); 945 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
947 spin_unlock_irqrestore(&hardware[type].lock, flags); 946 spin_unlock_irqrestore(&hardware[type].lock, flags);
948
949 free_irq(irq, (void *)&hardware);
950
951 dprintk("freed IRQ %d\n", irq);
952} 947}
953 948
954static ssize_t lirc_write(struct file *file, const char *buf, 949static ssize_t lirc_write(struct file *file, const char *buf,
@@ -1256,6 +1251,9 @@ exit_serial_exit:
1256static void __exit lirc_serial_exit_module(void) 1251static void __exit lirc_serial_exit_module(void)
1257{ 1252{
1258 lirc_serial_exit(); 1253 lirc_serial_exit();
1254
1255 free_irq(irq, (void *)&hardware);
1256
1259 if (iommap != 0) 1257 if (iommap != 0)
1260 release_mem_region(iommap, 8 << ioshift); 1258 release_mem_region(iommap, 8 << ioshift);
1261 else 1259 else
diff --git a/drivers/staging/lirc/lirc_sir.c b/drivers/staging/lirc/lirc_sir.c
index a7b46f24f24e..0d3864594b12 100644
--- a/drivers/staging/lirc/lirc_sir.c
+++ b/drivers/staging/lirc/lirc_sir.c
@@ -739,23 +739,16 @@ static void send_space(unsigned long len)
739static void send_pulse(unsigned long len) 739static void send_pulse(unsigned long len)
740{ 740{
741 long bytes_out = len / TIME_CONST; 741 long bytes_out = len / TIME_CONST;
742 long time_left;
743 742
744 time_left = (long)len - (long)bytes_out * (long)TIME_CONST; 743 if (bytes_out == 0)
745 if (bytes_out == 0) {
746 bytes_out++; 744 bytes_out++;
747 time_left = 0; 745
748 }
749 while (bytes_out--) { 746 while (bytes_out--) {
750 outb(PULSE, io + UART_TX); 747 outb(PULSE, io + UART_TX);
751 /* FIXME treba seriozne cakanie z char/serial.c */ 748 /* FIXME treba seriozne cakanie z char/serial.c */
752 while (!(inb(io + UART_LSR) & UART_LSR_THRE)) 749 while (!(inb(io + UART_LSR) & UART_LSR_THRE))
753 ; 750 ;
754 } 751 }
755#if 0
756 if (time_left > 0)
757 safe_udelay(time_left);
758#endif
759} 752}
760#endif 753#endif
761 754
diff --git a/drivers/staging/lirc/lirc_zilog.c b/drivers/staging/lirc/lirc_zilog.c
index dd6a57c3c3a3..4e051f6b52db 100644
--- a/drivers/staging/lirc/lirc_zilog.c
+++ b/drivers/staging/lirc/lirc_zilog.c
@@ -475,14 +475,14 @@ static int lirc_thread(void *arg)
475 dprintk("poll thread started\n"); 475 dprintk("poll thread started\n");
476 476
477 while (!kthread_should_stop()) { 477 while (!kthread_should_stop()) {
478 set_current_state(TASK_INTERRUPTIBLE);
479
478 /* if device not opened, we can sleep half a second */ 480 /* if device not opened, we can sleep half a second */
479 if (atomic_read(&ir->open_count) == 0) { 481 if (atomic_read(&ir->open_count) == 0) {
480 schedule_timeout(HZ/2); 482 schedule_timeout(HZ/2);
481 continue; 483 continue;
482 } 484 }
483 485
484 set_current_state(TASK_INTERRUPTIBLE);
485
486 /* 486 /*
487 * This is ~113*2 + 24 + jitter (2*repeat gap + code length). 487 * This is ~113*2 + 24 + jitter (2*repeat gap + code length).
488 * We use this interval as the chip resets every time you poll 488 * We use this interval as the chip resets every time you poll
diff --git a/drivers/staging/mei/init.c b/drivers/staging/mei/init.c
index d1ffa32cd141..685fcf639644 100644
--- a/drivers/staging/mei/init.c
+++ b/drivers/staging/mei/init.c
@@ -189,7 +189,7 @@ int mei_hw_init(struct mei_device *dev)
189 mutex_lock(&dev->device_lock); 189 mutex_lock(&dev->device_lock);
190 } 190 }
191 191
192 if (!err && !dev->recvd_msg) { 192 if (err <= 0 && !dev->recvd_msg) {
193 dev->mei_state = MEI_DISABLED; 193 dev->mei_state = MEI_DISABLED;
194 dev_dbg(&dev->pdev->dev, 194 dev_dbg(&dev->pdev->dev,
195 "wait_event_interruptible_timeout failed" 195 "wait_event_interruptible_timeout failed"
diff --git a/drivers/staging/mei/wd.c b/drivers/staging/mei/wd.c
index 2564b038636a..fff53d0b5c6e 100644
--- a/drivers/staging/mei/wd.c
+++ b/drivers/staging/mei/wd.c
@@ -169,10 +169,15 @@ int mei_wd_stop(struct mei_device *dev, bool preserve)
169 ret = wait_event_interruptible_timeout(dev->wait_stop_wd, 169 ret = wait_event_interruptible_timeout(dev->wait_stop_wd,
170 dev->wd_stopped, 10 * HZ); 170 dev->wd_stopped, 10 * HZ);
171 mutex_lock(&dev->device_lock); 171 mutex_lock(&dev->device_lock);
172 if (!dev->wd_stopped) 172 if (dev->wd_stopped) {
173 dev_dbg(&dev->pdev->dev, "stop wd failed to complete.\n"); 173 dev_dbg(&dev->pdev->dev, "stop wd complete ret=%d.\n", ret);
174 else 174 ret = 0;
175 dev_dbg(&dev->pdev->dev, "stop wd complete.\n"); 175 } else {
176 if (!ret)
177 ret = -ETIMEDOUT;
178 dev_warn(&dev->pdev->dev,
179 "stop wd failed to complete ret=%d.\n", ret);
180 }
176 181
177 if (preserve) 182 if (preserve)
178 dev->wd_timeout = wd_timeout; 183 dev->wd_timeout = wd_timeout;
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
index 09e8c7d53af3..19b4ae052af8 100644
--- a/drivers/tty/n_gsm.c
+++ b/drivers/tty/n_gsm.c
@@ -875,7 +875,8 @@ static int gsm_dlci_data_output_framed(struct gsm_mux *gsm,
875 *dp++ = last << 7 | first << 6 | 1; /* EA */ 875 *dp++ = last << 7 | first << 6 | 1; /* EA */
876 len--; 876 len--;
877 } 877 }
878 memcpy(dp, skb_pull(dlci->skb, len), len); 878 memcpy(dp, dlci->skb->data, len);
879 skb_pull(dlci->skb, len);
879 __gsm_data_queue(dlci, msg); 880 __gsm_data_queue(dlci, msg);
880 if (last) 881 if (last)
881 dlci->skb = NULL; 882 dlci->skb = NULL;
@@ -984,10 +985,22 @@ static void gsm_control_reply(struct gsm_mux *gsm, int cmd, u8 *data,
984 */ 985 */
985 986
986static void gsm_process_modem(struct tty_struct *tty, struct gsm_dlci *dlci, 987static void gsm_process_modem(struct tty_struct *tty, struct gsm_dlci *dlci,
987 u32 modem) 988 u32 modem, int clen)
988{ 989{
989 int mlines = 0; 990 int mlines = 0;
990 u8 brk = modem >> 6; 991 u8 brk = 0;
992
993 /* The modem status command can either contain one octet (v.24 signals)
994 or two octets (v.24 signals + break signals). The length field will
995 either be 2 or 3 respectively. This is specified in section
996 5.4.6.3.7 of the 27.010 mux spec. */
997
998 if (clen == 2)
999 modem = modem & 0x7f;
1000 else {
1001 brk = modem & 0x7f;
1002 modem = (modem >> 7) & 0x7f;
1003 };
991 1004
992 /* Flow control/ready to communicate */ 1005 /* Flow control/ready to communicate */
993 if (modem & MDM_FC) { 1006 if (modem & MDM_FC) {
@@ -1061,7 +1074,7 @@ static void gsm_control_modem(struct gsm_mux *gsm, u8 *data, int clen)
1061 return; 1074 return;
1062 } 1075 }
1063 tty = tty_port_tty_get(&dlci->port); 1076 tty = tty_port_tty_get(&dlci->port);
1064 gsm_process_modem(tty, dlci, modem); 1077 gsm_process_modem(tty, dlci, modem, clen);
1065 if (tty) { 1078 if (tty) {
1066 tty_wakeup(tty); 1079 tty_wakeup(tty);
1067 tty_kref_put(tty); 1080 tty_kref_put(tty);
@@ -1482,12 +1495,13 @@ static void gsm_dlci_begin_close(struct gsm_dlci *dlci)
1482 * open we shovel the bits down it, if not we drop them. 1495 * open we shovel the bits down it, if not we drop them.
1483 */ 1496 */
1484 1497
1485static void gsm_dlci_data(struct gsm_dlci *dlci, u8 *data, int len) 1498static void gsm_dlci_data(struct gsm_dlci *dlci, u8 *data, int clen)
1486{ 1499{
1487 /* krefs .. */ 1500 /* krefs .. */
1488 struct tty_port *port = &dlci->port; 1501 struct tty_port *port = &dlci->port;
1489 struct tty_struct *tty = tty_port_tty_get(port); 1502 struct tty_struct *tty = tty_port_tty_get(port);
1490 unsigned int modem = 0; 1503 unsigned int modem = 0;
1504 int len = clen;
1491 1505
1492 if (debug & 16) 1506 if (debug & 16)
1493 pr_debug("%d bytes for tty %p\n", len, tty); 1507 pr_debug("%d bytes for tty %p\n", len, tty);
@@ -1507,7 +1521,7 @@ static void gsm_dlci_data(struct gsm_dlci *dlci, u8 *data, int len)
1507 if (len == 0) 1521 if (len == 0)
1508 return; 1522 return;
1509 } 1523 }
1510 gsm_process_modem(tty, dlci, modem); 1524 gsm_process_modem(tty, dlci, modem, clen);
1511 /* Line state will go via DLCI 0 controls only */ 1525 /* Line state will go via DLCI 0 controls only */
1512 case 1: 1526 case 1:
1513 default: 1527 default:
diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index 0ad32888091c..c3954fbf6ac4 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -1815,6 +1815,7 @@ do_it_again:
1815 /* FIXME: does n_tty_set_room need locking ? */ 1815 /* FIXME: does n_tty_set_room need locking ? */
1816 n_tty_set_room(tty); 1816 n_tty_set_room(tty);
1817 timeout = schedule_timeout(timeout); 1817 timeout = schedule_timeout(timeout);
1818 BUG_ON(!tty->read_buf);
1818 continue; 1819 continue;
1819 } 1820 }
1820 __set_current_state(TASK_RUNNING); 1821 __set_current_state(TASK_RUNNING);
diff --git a/drivers/tty/serial/8250.c b/drivers/tty/serial/8250.c
index b40f7b90c81d..b4129f53fb1b 100644
--- a/drivers/tty/serial/8250.c
+++ b/drivers/tty/serial/8250.c
@@ -3318,6 +3318,7 @@ void serial8250_unregister_port(int line)
3318 uart->port.flags &= ~UPF_BOOT_AUTOCONF; 3318 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3319 uart->port.type = PORT_UNKNOWN; 3319 uart->port.type = PORT_UNKNOWN;
3320 uart->port.dev = &serial8250_isa_devs->dev; 3320 uart->port.dev = &serial8250_isa_devs->dev;
3321 uart->capabilities = uart_config[uart->port.type].flags;
3321 uart_add_one_port(&serial8250_reg, &uart->port); 3322 uart_add_one_port(&serial8250_reg, &uart->port);
3322 } else { 3323 } else {
3323 uart->port.dev = NULL; 3324 uart->port.dev = NULL;
diff --git a/drivers/tty/serial/8250_pci.c b/drivers/tty/serial/8250_pci.c
index 78e98a5cef96..f41b4259ecdd 100644
--- a/drivers/tty/serial/8250_pci.c
+++ b/drivers/tty/serial/8250_pci.c
@@ -994,6 +994,15 @@ static int skip_tx_en_setup(struct serial_private *priv,
994 return pci_default_setup(priv, board, port, idx); 994 return pci_default_setup(priv, board, port, idx);
995} 995}
996 996
997static int pci_eg20t_init(struct pci_dev *dev)
998{
999#if defined(CONFIG_SERIAL_PCH_UART) || defined(CONFIG_SERIAL_PCH_UART_MODULE)
1000 return -ENODEV;
1001#else
1002 return 0;
1003#endif
1004}
1005
997/* This should be in linux/pci_ids.h */ 1006/* This should be in linux/pci_ids.h */
998#define PCI_VENDOR_ID_SBSMODULARIO 0x124B 1007#define PCI_VENDOR_ID_SBSMODULARIO 0x124B
999#define PCI_SUBVENDOR_ID_SBSMODULARIO 0x124B 1008#define PCI_SUBVENDOR_ID_SBSMODULARIO 0x124B
@@ -1446,6 +1455,56 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
1446 .init = pci_oxsemi_tornado_init, 1455 .init = pci_oxsemi_tornado_init,
1447 .setup = pci_default_setup, 1456 .setup = pci_default_setup,
1448 }, 1457 },
1458 {
1459 .vendor = PCI_VENDOR_ID_INTEL,
1460 .device = 0x8811,
1461 .init = pci_eg20t_init,
1462 },
1463 {
1464 .vendor = PCI_VENDOR_ID_INTEL,
1465 .device = 0x8812,
1466 .init = pci_eg20t_init,
1467 },
1468 {
1469 .vendor = PCI_VENDOR_ID_INTEL,
1470 .device = 0x8813,
1471 .init = pci_eg20t_init,
1472 },
1473 {
1474 .vendor = PCI_VENDOR_ID_INTEL,
1475 .device = 0x8814,
1476 .init = pci_eg20t_init,
1477 },
1478 {
1479 .vendor = 0x10DB,
1480 .device = 0x8027,
1481 .init = pci_eg20t_init,
1482 },
1483 {
1484 .vendor = 0x10DB,
1485 .device = 0x8028,
1486 .init = pci_eg20t_init,
1487 },
1488 {
1489 .vendor = 0x10DB,
1490 .device = 0x8029,
1491 .init = pci_eg20t_init,
1492 },
1493 {
1494 .vendor = 0x10DB,
1495 .device = 0x800C,
1496 .init = pci_eg20t_init,
1497 },
1498 {
1499 .vendor = 0x10DB,
1500 .device = 0x800D,
1501 .init = pci_eg20t_init,
1502 },
1503 {
1504 .vendor = 0x10DB,
1505 .device = 0x800D,
1506 .init = pci_eg20t_init,
1507 },
1449 /* 1508 /*
1450 * Cronyx Omega PCI (PLX-chip based) 1509 * Cronyx Omega PCI (PLX-chip based)
1451 */ 1510 */
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 8dc0541feecc..f5f6831b0a64 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -50,6 +50,7 @@
50#include <linux/dmaengine.h> 50#include <linux/dmaengine.h>
51#include <linux/dma-mapping.h> 51#include <linux/dma-mapping.h>
52#include <linux/scatterlist.h> 52#include <linux/scatterlist.h>
53#include <linux/delay.h>
53 54
54#include <asm/io.h> 55#include <asm/io.h>
55#include <asm/sizes.h> 56#include <asm/sizes.h>
@@ -65,6 +66,30 @@
65#define UART_DR_ERROR (UART011_DR_OE|UART011_DR_BE|UART011_DR_PE|UART011_DR_FE) 66#define UART_DR_ERROR (UART011_DR_OE|UART011_DR_BE|UART011_DR_PE|UART011_DR_FE)
66#define UART_DUMMY_DR_RX (1 << 16) 67#define UART_DUMMY_DR_RX (1 << 16)
67 68
69
70#define UART_WA_SAVE_NR 14
71
72static void pl011_lockup_wa(unsigned long data);
73static const u32 uart_wa_reg[UART_WA_SAVE_NR] = {
74 ST_UART011_DMAWM,
75 ST_UART011_TIMEOUT,
76 ST_UART011_LCRH_RX,
77 UART011_IBRD,
78 UART011_FBRD,
79 ST_UART011_LCRH_TX,
80 UART011_IFLS,
81 ST_UART011_XFCR,
82 ST_UART011_XON1,
83 ST_UART011_XON2,
84 ST_UART011_XOFF1,
85 ST_UART011_XOFF2,
86 UART011_CR,
87 UART011_IMSC
88};
89
90static u32 uart_wa_regdata[UART_WA_SAVE_NR];
91static DECLARE_TASKLET(pl011_lockup_tlet, pl011_lockup_wa, 0);
92
68/* There is by now at least one vendor with differing details, so handle it */ 93/* There is by now at least one vendor with differing details, so handle it */
69struct vendor_data { 94struct vendor_data {
70 unsigned int ifls; 95 unsigned int ifls;
@@ -72,6 +97,7 @@ struct vendor_data {
72 unsigned int lcrh_tx; 97 unsigned int lcrh_tx;
73 unsigned int lcrh_rx; 98 unsigned int lcrh_rx;
74 bool oversampling; 99 bool oversampling;
100 bool interrupt_may_hang; /* vendor-specific */
75 bool dma_threshold; 101 bool dma_threshold;
76}; 102};
77 103
@@ -90,9 +116,12 @@ static struct vendor_data vendor_st = {
90 .lcrh_tx = ST_UART011_LCRH_TX, 116 .lcrh_tx = ST_UART011_LCRH_TX,
91 .lcrh_rx = ST_UART011_LCRH_RX, 117 .lcrh_rx = ST_UART011_LCRH_RX,
92 .oversampling = true, 118 .oversampling = true,
119 .interrupt_may_hang = true,
93 .dma_threshold = true, 120 .dma_threshold = true,
94}; 121};
95 122
123static struct uart_amba_port *amba_ports[UART_NR];
124
96/* Deals with DMA transactions */ 125/* Deals with DMA transactions */
97 126
98struct pl011_sgbuf { 127struct pl011_sgbuf {
@@ -132,6 +161,7 @@ struct uart_amba_port {
132 unsigned int lcrh_rx; /* vendor-specific */ 161 unsigned int lcrh_rx; /* vendor-specific */
133 bool autorts; 162 bool autorts;
134 char type[12]; 163 char type[12];
164 bool interrupt_may_hang; /* vendor-specific */
135#ifdef CONFIG_DMA_ENGINE 165#ifdef CONFIG_DMA_ENGINE
136 /* DMA stuff */ 166 /* DMA stuff */
137 bool using_tx_dma; 167 bool using_tx_dma;
@@ -1008,6 +1038,68 @@ static inline bool pl011_dma_rx_running(struct uart_amba_port *uap)
1008#endif 1038#endif
1009 1039
1010 1040
1041/*
1042 * pl011_lockup_wa
1043 * This workaround aims to break the deadlock situation
1044 * when after long transfer over uart in hardware flow
1045 * control, uart interrupt registers cannot be cleared.
1046 * Hence uart transfer gets blocked.
1047 *
1048 * It is seen that during such deadlock condition ICR
1049 * don't get cleared even on multiple write. This leads
1050 * pass_counter to decrease and finally reach zero. This
1051 * can be taken as trigger point to run this UART_BT_WA.
1052 *
1053 */
1054static void pl011_lockup_wa(unsigned long data)
1055{
1056 struct uart_amba_port *uap = amba_ports[0];
1057 void __iomem *base = uap->port.membase;
1058 struct circ_buf *xmit = &uap->port.state->xmit;
1059 struct tty_struct *tty = uap->port.state->port.tty;
1060 int buf_empty_retries = 200;
1061 int loop;
1062
1063 /* Stop HCI layer from submitting data for tx */
1064 tty->hw_stopped = 1;
1065 while (!uart_circ_empty(xmit)) {
1066 if (buf_empty_retries-- == 0)
1067 break;
1068 udelay(100);
1069 }
1070
1071 /* Backup registers */
1072 for (loop = 0; loop < UART_WA_SAVE_NR; loop++)
1073 uart_wa_regdata[loop] = readl(base + uart_wa_reg[loop]);
1074
1075 /* Disable UART so that FIFO data is flushed out */
1076 writew(0x00, uap->port.membase + UART011_CR);
1077
1078 /* Soft reset UART module */
1079 if (uap->port.dev->platform_data) {
1080 struct amba_pl011_data *plat;
1081
1082 plat = uap->port.dev->platform_data;
1083 if (plat->reset)
1084 plat->reset();
1085 }
1086
1087 /* Restore registers */
1088 for (loop = 0; loop < UART_WA_SAVE_NR; loop++)
1089 writew(uart_wa_regdata[loop] ,
1090 uap->port.membase + uart_wa_reg[loop]);
1091
1092 /* Initialise the old status of the modem signals */
1093 uap->old_status = readw(uap->port.membase + UART01x_FR) &
1094 UART01x_FR_MODEM_ANY;
1095
1096 if (readl(base + UART011_MIS) & 0x2)
1097 printk(KERN_EMERG "UART_BT_WA: ***FAILED***\n");
1098
1099 /* Start Tx/Rx */
1100 tty->hw_stopped = 0;
1101}
1102
1011static void pl011_stop_tx(struct uart_port *port) 1103static void pl011_stop_tx(struct uart_port *port)
1012{ 1104{
1013 struct uart_amba_port *uap = (struct uart_amba_port *)port; 1105 struct uart_amba_port *uap = (struct uart_amba_port *)port;
@@ -1158,8 +1250,11 @@ static irqreturn_t pl011_int(int irq, void *dev_id)
1158 if (status & UART011_TXIS) 1250 if (status & UART011_TXIS)
1159 pl011_tx_chars(uap); 1251 pl011_tx_chars(uap);
1160 1252
1161 if (pass_counter-- == 0) 1253 if (pass_counter-- == 0) {
1254 if (uap->interrupt_may_hang)
1255 tasklet_schedule(&pl011_lockup_tlet);
1162 break; 1256 break;
1257 }
1163 1258
1164 status = readw(uap->port.membase + UART011_MIS); 1259 status = readw(uap->port.membase + UART011_MIS);
1165 } while (status != 0); 1260 } while (status != 0);
@@ -1339,6 +1434,14 @@ static int pl011_startup(struct uart_port *port)
1339 writew(uap->im, uap->port.membase + UART011_IMSC); 1434 writew(uap->im, uap->port.membase + UART011_IMSC);
1340 spin_unlock_irq(&uap->port.lock); 1435 spin_unlock_irq(&uap->port.lock);
1341 1436
1437 if (uap->port.dev->platform_data) {
1438 struct amba_pl011_data *plat;
1439
1440 plat = uap->port.dev->platform_data;
1441 if (plat->init)
1442 plat->init();
1443 }
1444
1342 return 0; 1445 return 0;
1343 1446
1344 clk_dis: 1447 clk_dis:
@@ -1394,6 +1497,15 @@ static void pl011_shutdown(struct uart_port *port)
1394 * Shut down the clock producer 1497 * Shut down the clock producer
1395 */ 1498 */
1396 clk_disable(uap->clk); 1499 clk_disable(uap->clk);
1500
1501 if (uap->port.dev->platform_data) {
1502 struct amba_pl011_data *plat;
1503
1504 plat = uap->port.dev->platform_data;
1505 if (plat->exit)
1506 plat->exit();
1507 }
1508
1397} 1509}
1398 1510
1399static void 1511static void
@@ -1700,6 +1812,14 @@ static int __init pl011_console_setup(struct console *co, char *options)
1700 if (!uap) 1812 if (!uap)
1701 return -ENODEV; 1813 return -ENODEV;
1702 1814
1815 if (uap->port.dev->platform_data) {
1816 struct amba_pl011_data *plat;
1817
1818 plat = uap->port.dev->platform_data;
1819 if (plat->init)
1820 plat->init();
1821 }
1822
1703 uap->port.uartclk = clk_get_rate(uap->clk); 1823 uap->port.uartclk = clk_get_rate(uap->clk);
1704 1824
1705 if (options) 1825 if (options)
@@ -1774,6 +1894,7 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
1774 uap->lcrh_rx = vendor->lcrh_rx; 1894 uap->lcrh_rx = vendor->lcrh_rx;
1775 uap->lcrh_tx = vendor->lcrh_tx; 1895 uap->lcrh_tx = vendor->lcrh_tx;
1776 uap->fifosize = vendor->fifosize; 1896 uap->fifosize = vendor->fifosize;
1897 uap->interrupt_may_hang = vendor->interrupt_may_hang;
1777 uap->port.dev = &dev->dev; 1898 uap->port.dev = &dev->dev;
1778 uap->port.mapbase = dev->res.start; 1899 uap->port.mapbase = dev->res.start;
1779 uap->port.membase = base; 1900 uap->port.membase = base;
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 6d5d6e679fc7..af9b7814965a 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -1709,12 +1709,13 @@ static int atmel_serial_resume(struct platform_device *pdev)
1709static int __devinit atmel_serial_probe(struct platform_device *pdev) 1709static int __devinit atmel_serial_probe(struct platform_device *pdev)
1710{ 1710{
1711 struct atmel_uart_port *port; 1711 struct atmel_uart_port *port;
1712 struct atmel_uart_data *pdata = pdev->dev.platform_data;
1712 void *data; 1713 void *data;
1713 int ret; 1714 int ret;
1714 1715
1715 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1)); 1716 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
1716 1717
1717 port = &atmel_ports[pdev->id]; 1718 port = &atmel_ports[pdata->num];
1718 port->backup_imr = 0; 1719 port->backup_imr = 0;
1719 1720
1720 atmel_init_port(port, pdev); 1721 atmel_init_port(port, pdev);
diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c
index a1a0e55d0807..c0b68b9cad91 100644
--- a/drivers/tty/serial/bcm63xx_uart.c
+++ b/drivers/tty/serial/bcm63xx_uart.c
@@ -250,6 +250,20 @@ static void bcm_uart_do_rx(struct uart_port *port)
250 /* get overrun/fifo empty information from ier 250 /* get overrun/fifo empty information from ier
251 * register */ 251 * register */
252 iestat = bcm_uart_readl(port, UART_IR_REG); 252 iestat = bcm_uart_readl(port, UART_IR_REG);
253
254 if (unlikely(iestat & UART_IR_STAT(UART_IR_RXOVER))) {
255 unsigned int val;
256
257 /* fifo reset is required to clear
258 * interrupt */
259 val = bcm_uart_readl(port, UART_CTL_REG);
260 val |= UART_CTL_RSTRXFIFO_MASK;
261 bcm_uart_writel(port, val, UART_CTL_REG);
262
263 port->icount.overrun++;
264 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
265 }
266
253 if (!(iestat & UART_IR_STAT(UART_IR_RXNOTEMPTY))) 267 if (!(iestat & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
254 break; 268 break;
255 269
@@ -284,10 +298,6 @@ static void bcm_uart_do_rx(struct uart_port *port)
284 if (uart_handle_sysrq_char(port, c)) 298 if (uart_handle_sysrq_char(port, c))
285 continue; 299 continue;
286 300
287 if (unlikely(iestat & UART_IR_STAT(UART_IR_RXOVER))) {
288 port->icount.overrun++;
289 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
290 }
291 301
292 if ((cstat & port->ignore_status_mask) == 0) 302 if ((cstat & port->ignore_status_mask) == 0)
293 tty_insert_flip_char(tty, c, flag); 303 tty_insert_flip_char(tty, c, flag);
diff --git a/drivers/tty/serial/jsm/jsm_driver.c b/drivers/tty/serial/jsm/jsm_driver.c
index 18f548449c63..96da17868cf3 100644
--- a/drivers/tty/serial/jsm/jsm_driver.c
+++ b/drivers/tty/serial/jsm/jsm_driver.c
@@ -125,7 +125,7 @@ static int __devinit jsm_probe_one(struct pci_dev *pdev, const struct pci_device
125 brd->bd_uart_offset = 0x200; 125 brd->bd_uart_offset = 0x200;
126 brd->bd_dividend = 921600; 126 brd->bd_dividend = 921600;
127 127
128 brd->re_map_membase = ioremap(brd->membase, 0x1000); 128 brd->re_map_membase = ioremap(brd->membase, pci_resource_len(pdev, 0));
129 if (!brd->re_map_membase) { 129 if (!brd->re_map_membase) {
130 dev_err(&pdev->dev, 130 dev_err(&pdev->dev,
131 "card has no PCI Memory resources, " 131 "card has no PCI Memory resources, "
diff --git a/drivers/tty/serial/s5pv210.c b/drivers/tty/serial/s5pv210.c
index fb2619f93d84..dd194dc80ee9 100644
--- a/drivers/tty/serial/s5pv210.c
+++ b/drivers/tty/serial/s5pv210.c
@@ -30,7 +30,7 @@ static int s5pv210_serial_setsource(struct uart_port *port,
30 struct s3c2410_uartcfg *cfg = port->dev->platform_data; 30 struct s3c2410_uartcfg *cfg = port->dev->platform_data;
31 unsigned long ucon = rd_regl(port, S3C2410_UCON); 31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32 32
33 if ((cfg->clocks_size) == 1) 33 if (cfg->flags & NO_NEED_CHECK_CLKSRC)
34 return 0; 34 return 0;
35 35
36 if (strcmp(clk->name, "pclk") == 0) 36 if (strcmp(clk->name, "pclk") == 0)
@@ -55,7 +55,7 @@ static int s5pv210_serial_getsource(struct uart_port *port,
55 55
56 clk->divisor = 1; 56 clk->divisor = 1;
57 57
58 if ((cfg->clocks_size) == 1) 58 if (cfg->flags & NO_NEED_CHECK_CLKSRC)
59 return 0; 59 return 0;
60 60
61 switch (ucon & S5PV210_UCON_CLKMASK) { 61 switch (ucon & S5PV210_UCON_CLKMASK) {
diff --git a/drivers/tty/tty_ldisc.c b/drivers/tty/tty_ldisc.c
index 5d01d32e2cf0..ef925d581713 100644
--- a/drivers/tty/tty_ldisc.c
+++ b/drivers/tty/tty_ldisc.c
@@ -555,7 +555,7 @@ static void tty_ldisc_flush_works(struct tty_struct *tty)
555static int tty_ldisc_wait_idle(struct tty_struct *tty) 555static int tty_ldisc_wait_idle(struct tty_struct *tty)
556{ 556{
557 int ret; 557 int ret;
558 ret = wait_event_interruptible_timeout(tty_ldisc_idle, 558 ret = wait_event_timeout(tty_ldisc_idle,
559 atomic_read(&tty->ldisc->users) == 1, 5 * HZ); 559 atomic_read(&tty->ldisc->users) == 1, 5 * HZ);
560 if (ret < 0) 560 if (ret < 0)
561 return ret; 561 return ret;
@@ -763,6 +763,8 @@ static int tty_ldisc_reinit(struct tty_struct *tty, int ldisc)
763 if (IS_ERR(ld)) 763 if (IS_ERR(ld))
764 return -1; 764 return -1;
765 765
766 WARN_ON_ONCE(tty_ldisc_wait_idle(tty));
767
766 tty_ldisc_close(tty, tty->ldisc); 768 tty_ldisc_close(tty, tty->ldisc);
767 tty_ldisc_put(tty->ldisc); 769 tty_ldisc_put(tty->ldisc);
768 tty->ldisc = NULL; 770 tty->ldisc = NULL;
diff --git a/drivers/usb/core/driver.c b/drivers/usb/core/driver.c
index aa3cc465a601..34e3da5aa72a 100644
--- a/drivers/usb/core/driver.c
+++ b/drivers/usb/core/driver.c
@@ -1187,13 +1187,22 @@ static int usb_suspend_both(struct usb_device *udev, pm_message_t msg)
1187 for (i = n - 1; i >= 0; --i) { 1187 for (i = n - 1; i >= 0; --i) {
1188 intf = udev->actconfig->interface[i]; 1188 intf = udev->actconfig->interface[i];
1189 status = usb_suspend_interface(udev, intf, msg); 1189 status = usb_suspend_interface(udev, intf, msg);
1190
1191 /* Ignore errors during system sleep transitions */
1192 if (!(msg.event & PM_EVENT_AUTO))
1193 status = 0;
1190 if (status != 0) 1194 if (status != 0)
1191 break; 1195 break;
1192 } 1196 }
1193 } 1197 }
1194 if (status == 0) 1198 if (status == 0) {
1195 status = usb_suspend_device(udev, msg); 1199 status = usb_suspend_device(udev, msg);
1196 1200
1201 /* Again, ignore errors during system sleep transitions */
1202 if (!(msg.event & PM_EVENT_AUTO))
1203 status = 0;
1204 }
1205
1197 /* If the suspend failed, resume interfaces that did get suspended */ 1206 /* If the suspend failed, resume interfaces that did get suspended */
1198 if (status != 0) { 1207 if (status != 0) {
1199 msg.event ^= (PM_EVENT_SUSPEND | PM_EVENT_RESUME); 1208 msg.event ^= (PM_EVENT_SUSPEND | PM_EVENT_RESUME);
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 90ae1753dda1..a428aa080a36 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -1634,6 +1634,7 @@ void usb_disconnect(struct usb_device **pdev)
1634{ 1634{
1635 struct usb_device *udev = *pdev; 1635 struct usb_device *udev = *pdev;
1636 int i; 1636 int i;
1637 struct usb_hcd *hcd = bus_to_hcd(udev->bus);
1637 1638
1638 if (!udev) { 1639 if (!udev) {
1639 pr_debug ("%s nodev\n", __func__); 1640 pr_debug ("%s nodev\n", __func__);
@@ -1661,7 +1662,9 @@ void usb_disconnect(struct usb_device **pdev)
1661 * so that the hardware is now fully quiesced. 1662 * so that the hardware is now fully quiesced.
1662 */ 1663 */
1663 dev_dbg (&udev->dev, "unregistering device\n"); 1664 dev_dbg (&udev->dev, "unregistering device\n");
1665 mutex_lock(hcd->bandwidth_mutex);
1664 usb_disable_device(udev, 0); 1666 usb_disable_device(udev, 0);
1667 mutex_unlock(hcd->bandwidth_mutex);
1665 usb_hcd_synchronize_unlinks(udev); 1668 usb_hcd_synchronize_unlinks(udev);
1666 1669
1667 usb_remove_ep_devs(&udev->ep0); 1670 usb_remove_ep_devs(&udev->ep0);
@@ -2362,6 +2365,10 @@ int usb_port_suspend(struct usb_device *udev, pm_message_t msg)
2362 USB_DEVICE_REMOTE_WAKEUP, 0, 2365 USB_DEVICE_REMOTE_WAKEUP, 0,
2363 NULL, 0, 2366 NULL, 0,
2364 USB_CTRL_SET_TIMEOUT); 2367 USB_CTRL_SET_TIMEOUT);
2368
2369 /* System sleep transitions should never fail */
2370 if (!(msg.event & PM_EVENT_AUTO))
2371 status = 0;
2365 } else { 2372 } else {
2366 /* device has up to 10 msec to fully suspend */ 2373 /* device has up to 10 msec to fully suspend */
2367 dev_dbg(&udev->dev, "usb %ssuspend\n", 2374 dev_dbg(&udev->dev, "usb %ssuspend\n",
@@ -2611,16 +2618,15 @@ static int hub_suspend(struct usb_interface *intf, pm_message_t msg)
2611 struct usb_device *hdev = hub->hdev; 2618 struct usb_device *hdev = hub->hdev;
2612 unsigned port1; 2619 unsigned port1;
2613 2620
2614 /* fail if children aren't already suspended */ 2621 /* Warn if children aren't already suspended */
2615 for (port1 = 1; port1 <= hdev->maxchild; port1++) { 2622 for (port1 = 1; port1 <= hdev->maxchild; port1++) {
2616 struct usb_device *udev; 2623 struct usb_device *udev;
2617 2624
2618 udev = hdev->children [port1-1]; 2625 udev = hdev->children [port1-1];
2619 if (udev && udev->can_submit) { 2626 if (udev && udev->can_submit) {
2620 if (!(msg.event & PM_EVENT_AUTO)) 2627 dev_warn(&intf->dev, "port %d nyet suspended\n", port1);
2621 dev_dbg(&intf->dev, "port %d nyet suspended\n", 2628 if (msg.event & PM_EVENT_AUTO)
2622 port1); 2629 return -EBUSY;
2623 return -EBUSY;
2624 } 2630 }
2625 } 2631 }
2626 2632
diff --git a/drivers/usb/core/message.c b/drivers/usb/core/message.c
index 5701e857392b..0b5ec234c787 100644
--- a/drivers/usb/core/message.c
+++ b/drivers/usb/core/message.c
@@ -1135,15 +1135,26 @@ void usb_disable_interface(struct usb_device *dev, struct usb_interface *intf,
1135 * Deallocates hcd/hardware state for the endpoints (nuking all or most 1135 * Deallocates hcd/hardware state for the endpoints (nuking all or most
1136 * pending urbs) and usbcore state for the interfaces, so that usbcore 1136 * pending urbs) and usbcore state for the interfaces, so that usbcore
1137 * must usb_set_configuration() before any interfaces could be used. 1137 * must usb_set_configuration() before any interfaces could be used.
1138 *
1139 * Must be called with hcd->bandwidth_mutex held.
1138 */ 1140 */
1139void usb_disable_device(struct usb_device *dev, int skip_ep0) 1141void usb_disable_device(struct usb_device *dev, int skip_ep0)
1140{ 1142{
1141 int i; 1143 int i;
1144 struct usb_hcd *hcd = bus_to_hcd(dev->bus);
1142 1145
1143 /* getting rid of interfaces will disconnect 1146 /* getting rid of interfaces will disconnect
1144 * any drivers bound to them (a key side effect) 1147 * any drivers bound to them (a key side effect)
1145 */ 1148 */
1146 if (dev->actconfig) { 1149 if (dev->actconfig) {
1150 /*
1151 * FIXME: In order to avoid self-deadlock involving the
1152 * bandwidth_mutex, we have to mark all the interfaces
1153 * before unregistering any of them.
1154 */
1155 for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++)
1156 dev->actconfig->interface[i]->unregistering = 1;
1157
1147 for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++) { 1158 for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++) {
1148 struct usb_interface *interface; 1159 struct usb_interface *interface;
1149 1160
@@ -1153,7 +1164,6 @@ void usb_disable_device(struct usb_device *dev, int skip_ep0)
1153 continue; 1164 continue;
1154 dev_dbg(&dev->dev, "unregistering interface %s\n", 1165 dev_dbg(&dev->dev, "unregistering interface %s\n",
1155 dev_name(&interface->dev)); 1166 dev_name(&interface->dev));
1156 interface->unregistering = 1;
1157 remove_intf_ep_devs(interface); 1167 remove_intf_ep_devs(interface);
1158 device_del(&interface->dev); 1168 device_del(&interface->dev);
1159 } 1169 }
@@ -1172,6 +1182,16 @@ void usb_disable_device(struct usb_device *dev, int skip_ep0)
1172 1182
1173 dev_dbg(&dev->dev, "%s nuking %s URBs\n", __func__, 1183 dev_dbg(&dev->dev, "%s nuking %s URBs\n", __func__,
1174 skip_ep0 ? "non-ep0" : "all"); 1184 skip_ep0 ? "non-ep0" : "all");
1185 if (hcd->driver->check_bandwidth) {
1186 /* First pass: Cancel URBs, leave endpoint pointers intact. */
1187 for (i = skip_ep0; i < 16; ++i) {
1188 usb_disable_endpoint(dev, i, false);
1189 usb_disable_endpoint(dev, i + USB_DIR_IN, false);
1190 }
1191 /* Remove endpoints from the host controller internal state */
1192 usb_hcd_alloc_bandwidth(dev, NULL, NULL, NULL);
1193 /* Second pass: remove endpoint pointers */
1194 }
1175 for (i = skip_ep0; i < 16; ++i) { 1195 for (i = skip_ep0; i < 16; ++i) {
1176 usb_disable_endpoint(dev, i, true); 1196 usb_disable_endpoint(dev, i, true);
1177 usb_disable_endpoint(dev, i + USB_DIR_IN, true); 1197 usb_disable_endpoint(dev, i + USB_DIR_IN, true);
@@ -1273,6 +1293,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate)
1273 interface); 1293 interface);
1274 return -EINVAL; 1294 return -EINVAL;
1275 } 1295 }
1296 if (iface->unregistering)
1297 return -ENODEV;
1276 1298
1277 alt = usb_altnum_to_altsetting(iface, alternate); 1299 alt = usb_altnum_to_altsetting(iface, alternate);
1278 if (!alt) { 1300 if (!alt) {
@@ -1727,6 +1749,7 @@ free_interfaces:
1727 /* if it's already configured, clear out old state first. 1749 /* if it's already configured, clear out old state first.
1728 * getting rid of old interfaces means unbinding their drivers. 1750 * getting rid of old interfaces means unbinding their drivers.
1729 */ 1751 */
1752 mutex_lock(hcd->bandwidth_mutex);
1730 if (dev->state != USB_STATE_ADDRESS) 1753 if (dev->state != USB_STATE_ADDRESS)
1731 usb_disable_device(dev, 1); /* Skip ep0 */ 1754 usb_disable_device(dev, 1); /* Skip ep0 */
1732 1755
@@ -1739,7 +1762,6 @@ free_interfaces:
1739 * host controller will not allow submissions to dropped endpoints. If 1762 * host controller will not allow submissions to dropped endpoints. If
1740 * this call fails, the device state is unchanged. 1763 * this call fails, the device state is unchanged.
1741 */ 1764 */
1742 mutex_lock(hcd->bandwidth_mutex);
1743 ret = usb_hcd_alloc_bandwidth(dev, cp, NULL, NULL); 1765 ret = usb_hcd_alloc_bandwidth(dev, cp, NULL, NULL);
1744 if (ret < 0) { 1766 if (ret < 0) {
1745 mutex_unlock(hcd->bandwidth_mutex); 1767 mutex_unlock(hcd->bandwidth_mutex);
diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c
index 2cd9a60c7f3a..4e4833168087 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -46,7 +46,6 @@
46#include <asm/system.h> 46#include <asm/system.h>
47#include <asm/unaligned.h> 47#include <asm/unaligned.h>
48#include <asm/dma.h> 48#include <asm/dma.h>
49#include <asm/cacheflush.h>
50 49
51#include "fsl_usb2_udc.h" 50#include "fsl_usb2_udc.h"
52 51
@@ -118,6 +117,17 @@ static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
118#define fsl_readl(p) (*_fsl_readl)((p)) 117#define fsl_readl(p) (*_fsl_readl)((p))
119#define fsl_writel(v, p) (*_fsl_writel)((v), (p)) 118#define fsl_writel(v, p) (*_fsl_writel)((v), (p))
120 119
120static inline void fsl_set_accessors(struct fsl_usb2_platform_data *pdata)
121{
122 if (pdata->big_endian_mmio) {
123 _fsl_readl = _fsl_readl_be;
124 _fsl_writel = _fsl_writel_be;
125 } else {
126 _fsl_readl = _fsl_readl_le;
127 _fsl_writel = _fsl_writel_le;
128 }
129}
130
121static inline u32 cpu_to_hc32(const u32 x) 131static inline u32 cpu_to_hc32(const u32 x)
122{ 132{
123 return udc_controller->pdata->big_endian_desc 133 return udc_controller->pdata->big_endian_desc
@@ -132,6 +142,8 @@ static inline u32 hc32_to_cpu(const u32 x)
132 : le32_to_cpu((__force __le32)x); 142 : le32_to_cpu((__force __le32)x);
133} 143}
134#else /* !CONFIG_PPC32 */ 144#else /* !CONFIG_PPC32 */
145static inline void fsl_set_accessors(struct fsl_usb2_platform_data *pdata) {}
146
135#define fsl_readl(addr) readl(addr) 147#define fsl_readl(addr) readl(addr)
136#define fsl_writel(val32, addr) writel(val32, addr) 148#define fsl_writel(val32, addr) writel(val32, addr)
137#define cpu_to_hc32(x) cpu_to_le32(x) 149#define cpu_to_hc32(x) cpu_to_le32(x)
@@ -1277,6 +1289,11 @@ static int ep0_prime_status(struct fsl_udc *udc, int direction)
1277 req->req.complete = NULL; 1289 req->req.complete = NULL;
1278 req->dtd_count = 0; 1290 req->dtd_count = 0;
1279 1291
1292 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
1293 req->req.buf, req->req.length,
1294 ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1295 req->mapped = 1;
1296
1280 if (fsl_req_to_dtd(req) == 0) 1297 if (fsl_req_to_dtd(req) == 0)
1281 fsl_queue_td(ep, req); 1298 fsl_queue_td(ep, req);
1282 else 1299 else
@@ -1348,9 +1365,6 @@ static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1348 /* Fill in the reqest structure */ 1365 /* Fill in the reqest structure */
1349 *((u16 *) req->req.buf) = cpu_to_le16(tmp); 1366 *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1350 1367
1351 /* flush cache for the req buffer */
1352 flush_dcache_range((u32)req->req.buf, (u32)req->req.buf + 8);
1353
1354 req->ep = ep; 1368 req->ep = ep;
1355 req->req.length = 2; 1369 req->req.length = 2;
1356 req->req.status = -EINPROGRESS; 1370 req->req.status = -EINPROGRESS;
@@ -1358,6 +1372,11 @@ static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1358 req->req.complete = NULL; 1372 req->req.complete = NULL;
1359 req->dtd_count = 0; 1373 req->dtd_count = 0;
1360 1374
1375 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
1376 req->req.buf, req->req.length,
1377 ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1378 req->mapped = 1;
1379
1361 /* prime the data phase */ 1380 /* prime the data phase */
1362 if ((fsl_req_to_dtd(req) == 0)) 1381 if ((fsl_req_to_dtd(req) == 0))
1363 fsl_queue_td(ep, req); 1382 fsl_queue_td(ep, req);
@@ -2354,7 +2373,6 @@ static int __init struct_udc_setup(struct fsl_udc *udc,
2354 struct fsl_req, req); 2373 struct fsl_req, req);
2355 /* allocate a small amount of memory to get valid address */ 2374 /* allocate a small amount of memory to get valid address */
2356 udc->status_req->req.buf = kmalloc(8, GFP_KERNEL); 2375 udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2357 udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2358 2376
2359 udc->resume_state = USB_STATE_NOTATTACHED; 2377 udc->resume_state = USB_STATE_NOTATTACHED;
2360 udc->usb_state = USB_STATE_POWERED; 2378 udc->usb_state = USB_STATE_POWERED;
@@ -2470,13 +2488,7 @@ static int __init fsl_udc_probe(struct platform_device *pdev)
2470 } 2488 }
2471 2489
2472 /* Set accessors only after pdata->init() ! */ 2490 /* Set accessors only after pdata->init() ! */
2473 if (pdata->big_endian_mmio) { 2491 fsl_set_accessors(pdata);
2474 _fsl_readl = _fsl_readl_be;
2475 _fsl_writel = _fsl_writel_be;
2476 } else {
2477 _fsl_readl = _fsl_readl_le;
2478 _fsl_writel = _fsl_writel_le;
2479 }
2480 2492
2481#ifndef CONFIG_ARCH_MXC 2493#ifndef CONFIG_ARCH_MXC
2482 if (pdata->have_sysif_regs) 2494 if (pdata->have_sysif_regs)
diff --git a/drivers/usb/host/ehci-ath79.c b/drivers/usb/host/ehci-ath79.c
index 98cc8a13169c..aa248c2f2c60 100644
--- a/drivers/usb/host/ehci-ath79.c
+++ b/drivers/usb/host/ehci-ath79.c
@@ -44,7 +44,6 @@ static int ehci_ath79_init(struct usb_hcd *hcd)
44 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 44 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
45 struct platform_device *pdev = to_platform_device(hcd->self.controller); 45 struct platform_device *pdev = to_platform_device(hcd->self.controller);
46 const struct platform_device_id *id; 46 const struct platform_device_id *id;
47 int hclength;
48 int ret; 47 int ret;
49 48
50 id = platform_get_device_id(pdev); 49 id = platform_get_device_id(pdev);
@@ -53,20 +52,23 @@ static int ehci_ath79_init(struct usb_hcd *hcd)
53 return -EINVAL; 52 return -EINVAL;
54 } 53 }
55 54
56 hclength = HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
57 switch (id->driver_data) { 55 switch (id->driver_data) {
58 case EHCI_ATH79_IP_V1: 56 case EHCI_ATH79_IP_V1:
59 ehci->has_synopsys_hc_bug = 1; 57 ehci->has_synopsys_hc_bug = 1;
60 58
61 ehci->caps = hcd->regs; 59 ehci->caps = hcd->regs;
62 ehci->regs = hcd->regs + hclength; 60 ehci->regs = hcd->regs +
61 HC_LENGTH(ehci,
62 ehci_readl(ehci, &ehci->caps->hc_capbase));
63 break; 63 break;
64 64
65 case EHCI_ATH79_IP_V2: 65 case EHCI_ATH79_IP_V2:
66 hcd->has_tt = 1; 66 hcd->has_tt = 1;
67 67
68 ehci->caps = hcd->regs + 0x100; 68 ehci->caps = hcd->regs + 0x100;
69 ehci->regs = hcd->regs + 0x100 + hclength; 69 ehci->regs = hcd->regs + 0x100 +
70 HC_LENGTH(ehci,
71 ehci_readl(ehci, &ehci->caps->hc_capbase));
70 break; 72 break;
71 73
72 default: 74 default:
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index b435ed67dd5c..f8030ee928e8 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1,4 +1,8 @@
1/* 1/*
2 * Enhanced Host Controller Interface (EHCI) driver for USB.
3 *
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5 *
2 * Copyright (c) 2000-2004 by David Brownell 6 * Copyright (c) 2000-2004 by David Brownell
3 * 7 *
4 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c
index c9e6e454c625..55d3d5859ac5 100644
--- a/drivers/usb/host/isp1760-hcd.c
+++ b/drivers/usb/host/isp1760-hcd.c
@@ -1555,7 +1555,7 @@ static void kill_transfer(struct usb_hcd *hcd, struct urb *urb,
1555 1555
1556 /* We need to forcefully reclaim the slot since some transfers never 1556 /* We need to forcefully reclaim the slot since some transfers never
1557 return, e.g. interrupt transfers and NAKed bulk transfers. */ 1557 return, e.g. interrupt transfers and NAKed bulk transfers. */
1558 if (usb_pipebulk(urb->pipe)) { 1558 if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe)) {
1559 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG); 1559 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
1560 skip_map |= (1 << qh->slot); 1560 skip_map |= (1 << qh->slot);
1561 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map); 1561 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 9aa10bdf3918..f9cf3f04b742 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1,5 +1,7 @@
1/* 1/*
2 * OHCI HCD (Host Controller Driver) for USB. 2 * Open Host Controller Interface (OHCI) driver for USB.
3 *
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
3 * 5 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 6 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net> 7 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index db6f8b9c19b6..4586369dda00 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -2517,6 +2517,7 @@ static int __devinit r8a66597_probe(struct platform_device *pdev)
2517 INIT_LIST_HEAD(&r8a66597->child_device); 2517 INIT_LIST_HEAD(&r8a66597->child_device);
2518 2518
2519 hcd->rsrc_start = res->start; 2519 hcd->rsrc_start = res->start;
2520 hcd->has_tt = 1;
2520 2521
2521 ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | irq_trigger); 2522 ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | irq_trigger);
2522 if (ret != 0) { 2523 if (ret != 0) {
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 0f8e1d29a858..fcb7f7efc86d 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -1215,8 +1215,6 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1215 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet)); 1215 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet));
1216 /* dig out max burst from ep companion desc */ 1216 /* dig out max burst from ep companion desc */
1217 max_packet = ep->ss_ep_comp.bMaxBurst; 1217 max_packet = ep->ss_ep_comp.bMaxBurst;
1218 if (!max_packet)
1219 xhci_warn(xhci, "WARN no SS endpoint bMaxBurst\n");
1220 ep_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(max_packet)); 1218 ep_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(max_packet));
1221 break; 1219 break;
1222 case USB_SPEED_HIGH: 1220 case USB_SPEED_HIGH:
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 17541d09eabb..cb16de213f64 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -29,6 +29,9 @@
29#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73 29#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
30#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000 30#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
31 31
32#define PCI_VENDOR_ID_ETRON 0x1b6f
33#define PCI_DEVICE_ID_ASROCK_P67 0x7023
34
32static const char hcd_name[] = "xhci_hcd"; 35static const char hcd_name[] = "xhci_hcd";
33 36
34/* called after powerup, by probe or system-pm "wakeup" */ 37/* called after powerup, by probe or system-pm "wakeup" */
@@ -134,6 +137,11 @@ static int xhci_pci_setup(struct usb_hcd *hcd)
134 xhci->quirks |= XHCI_EP_LIMIT_QUIRK; 137 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
135 xhci->limit_active_eps = 64; 138 xhci->limit_active_eps = 64;
136 } 139 }
140 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
141 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
142 xhci->quirks |= XHCI_RESET_ON_RESUME;
143 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
144 }
137 145
138 /* Make sure the HC is halted. */ 146 /* Make sure the HC is halted. */
139 retval = xhci_halt(xhci); 147 retval = xhci_halt(xhci);
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 800f417c7309..70cacbbe7fb9 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -1733,6 +1733,7 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
1733 frame->status = -EOVERFLOW; 1733 frame->status = -EOVERFLOW;
1734 skip_td = true; 1734 skip_td = true;
1735 break; 1735 break;
1736 case COMP_DEV_ERR:
1736 case COMP_STALL: 1737 case COMP_STALL:
1737 frame->status = -EPROTO; 1738 frame->status = -EPROTO;
1738 skip_td = true; 1739 skip_td = true;
@@ -1767,9 +1768,6 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
1767 } 1768 }
1768 } 1769 }
1769 1770
1770 if ((idx == urb_priv->length - 1) && *status == -EINPROGRESS)
1771 *status = 0;
1772
1773 return finish_td(xhci, td, event_trb, event, ep, status, false); 1771 return finish_td(xhci, td, event_trb, event, ep, status, false);
1774} 1772}
1775 1773
@@ -1787,8 +1785,7 @@ static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
1787 idx = urb_priv->td_cnt; 1785 idx = urb_priv->td_cnt;
1788 frame = &td->urb->iso_frame_desc[idx]; 1786 frame = &td->urb->iso_frame_desc[idx];
1789 1787
1790 /* The transfer is partly done */ 1788 /* The transfer is partly done. */
1791 *status = -EXDEV;
1792 frame->status = -EXDEV; 1789 frame->status = -EXDEV;
1793 1790
1794 /* calc actual length */ 1791 /* calc actual length */
@@ -2016,6 +2013,10 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2016 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), 2013 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2017 ep_index); 2014 ep_index);
2018 goto cleanup; 2015 goto cleanup;
2016 case COMP_DEV_ERR:
2017 xhci_warn(xhci, "WARN: detect an incompatible device");
2018 status = -EPROTO;
2019 break;
2019 case COMP_MISSED_INT: 2020 case COMP_MISSED_INT:
2020 /* 2021 /*
2021 * When encounter missed service error, one or more isoc tds 2022 * When encounter missed service error, one or more isoc tds
@@ -2063,6 +2064,20 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2063 /* Is this a TRB in the currently executing TD? */ 2064 /* Is this a TRB in the currently executing TD? */
2064 event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue, 2065 event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue,
2065 td->last_trb, event_dma); 2066 td->last_trb, event_dma);
2067
2068 /*
2069 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2070 * is not in the current TD pointed by ep_ring->dequeue because
2071 * that the hardware dequeue pointer still at the previous TRB
2072 * of the current TD. The previous TRB maybe a Link TD or the
2073 * last TRB of the previous TD. The command completion handle
2074 * will take care the rest.
2075 */
2076 if (!event_seg && trb_comp_code == COMP_STOP_INVAL) {
2077 ret = 0;
2078 goto cleanup;
2079 }
2080
2066 if (!event_seg) { 2081 if (!event_seg) {
2067 if (!ep->skip || 2082 if (!ep->skip ||
2068 !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) { 2083 !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
@@ -2158,6 +2173,11 @@ cleanup:
2158 urb->transfer_buffer_length, 2173 urb->transfer_buffer_length,
2159 status); 2174 status);
2160 spin_unlock(&xhci->lock); 2175 spin_unlock(&xhci->lock);
2176 /* EHCI, UHCI, and OHCI always unconditionally set the
2177 * urb->status of an isochronous endpoint to 0.
2178 */
2179 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
2180 status = 0;
2161 usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status); 2181 usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
2162 spin_lock(&xhci->lock); 2182 spin_lock(&xhci->lock);
2163 } 2183 }
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 06e7023258d0..f5fe1ac301ab 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -759,6 +759,8 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
759 msleep(100); 759 msleep(100);
760 760
761 spin_lock_irq(&xhci->lock); 761 spin_lock_irq(&xhci->lock);
762 if (xhci->quirks & XHCI_RESET_ON_RESUME)
763 hibernated = true;
762 764
763 if (!hibernated) { 765 if (!hibernated) {
764 /* step 1: restore register */ 766 /* step 1: restore register */
@@ -1401,6 +1403,7 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1401 u32 added_ctxs; 1403 u32 added_ctxs;
1402 unsigned int last_ctx; 1404 unsigned int last_ctx;
1403 u32 new_add_flags, new_drop_flags, new_slot_info; 1405 u32 new_add_flags, new_drop_flags, new_slot_info;
1406 struct xhci_virt_device *virt_dev;
1404 int ret = 0; 1407 int ret = 0;
1405 1408
1406 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__); 1409 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
@@ -1425,11 +1428,25 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1425 return 0; 1428 return 0;
1426 } 1429 }
1427 1430
1428 in_ctx = xhci->devs[udev->slot_id]->in_ctx; 1431 virt_dev = xhci->devs[udev->slot_id];
1429 out_ctx = xhci->devs[udev->slot_id]->out_ctx; 1432 in_ctx = virt_dev->in_ctx;
1433 out_ctx = virt_dev->out_ctx;
1430 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); 1434 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1431 ep_index = xhci_get_endpoint_index(&ep->desc); 1435 ep_index = xhci_get_endpoint_index(&ep->desc);
1432 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); 1436 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1437
1438 /* If this endpoint is already in use, and the upper layers are trying
1439 * to add it again without dropping it, reject the addition.
1440 */
1441 if (virt_dev->eps[ep_index].ring &&
1442 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1443 xhci_get_endpoint_flag(&ep->desc))) {
1444 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1445 "without dropping it.\n",
1446 (unsigned int) ep->desc.bEndpointAddress);
1447 return -EINVAL;
1448 }
1449
1433 /* If the HCD has already noted the endpoint is enabled, 1450 /* If the HCD has already noted the endpoint is enabled,
1434 * ignore this request. 1451 * ignore this request.
1435 */ 1452 */
@@ -1445,8 +1462,7 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1445 * process context, not interrupt context (or so documenation 1462 * process context, not interrupt context (or so documenation
1446 * for usb_set_interface() and usb_set_configuration() claim). 1463 * for usb_set_interface() and usb_set_configuration() claim).
1447 */ 1464 */
1448 if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id], 1465 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1449 udev, ep, GFP_NOIO) < 0) {
1450 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n", 1466 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1451 __func__, ep->desc.bEndpointAddress); 1467 __func__, ep->desc.bEndpointAddress);
1452 return -ENOMEM; 1468 return -ENOMEM;
@@ -1537,6 +1553,11 @@ static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1537 "and endpoint is not disabled.\n"); 1553 "and endpoint is not disabled.\n");
1538 ret = -EINVAL; 1554 ret = -EINVAL;
1539 break; 1555 break;
1556 case COMP_DEV_ERR:
1557 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1558 "configure command.\n");
1559 ret = -ENODEV;
1560 break;
1540 case COMP_SUCCESS: 1561 case COMP_SUCCESS:
1541 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n"); 1562 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1542 ret = 0; 1563 ret = 0;
@@ -1571,6 +1592,11 @@ static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1571 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1); 1592 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1572 ret = -EINVAL; 1593 ret = -EINVAL;
1573 break; 1594 break;
1595 case COMP_DEV_ERR:
1596 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1597 "context command.\n");
1598 ret = -ENODEV;
1599 break;
1574 case COMP_MEL_ERR: 1600 case COMP_MEL_ERR:
1575 /* Max Exit Latency too large error */ 1601 /* Max Exit Latency too large error */
1576 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n"); 1602 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
@@ -2853,6 +2879,11 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2853 dev_warn(&udev->dev, "Device not responding to set address.\n"); 2879 dev_warn(&udev->dev, "Device not responding to set address.\n");
2854 ret = -EPROTO; 2880 ret = -EPROTO;
2855 break; 2881 break;
2882 case COMP_DEV_ERR:
2883 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
2884 "device command.\n");
2885 ret = -ENODEV;
2886 break;
2856 case COMP_SUCCESS: 2887 case COMP_SUCCESS:
2857 xhci_dbg(xhci, "Successful Address Device command\n"); 2888 xhci_dbg(xhci, "Successful Address Device command\n");
2858 break; 2889 break;
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 7d1ea3bf5e1f..d8bbf5ccb10d 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -874,6 +874,8 @@ struct xhci_transfer_event {
874#define COMP_PING_ERR 20 874#define COMP_PING_ERR 20
875/* Event Ring is full */ 875/* Event Ring is full */
876#define COMP_ER_FULL 21 876#define COMP_ER_FULL 21
877/* Incompatible Device Error */
878#define COMP_DEV_ERR 22
877/* Missed Service Error - HC couldn't service an isoc ep within interval */ 879/* Missed Service Error - HC couldn't service an isoc ep within interval */
878#define COMP_MISSED_INT 23 880#define COMP_MISSED_INT 23
879/* Successfully stopped command ring */ 881/* Successfully stopped command ring */
@@ -1308,6 +1310,7 @@ struct xhci_hcd {
1308 */ 1310 */
1309#define XHCI_EP_LIMIT_QUIRK (1 << 5) 1311#define XHCI_EP_LIMIT_QUIRK (1 << 5)
1310#define XHCI_BROKEN_MSI (1 << 6) 1312#define XHCI_BROKEN_MSI (1 << 6)
1313#define XHCI_RESET_ON_RESUME (1 << 7)
1311 unsigned int num_active_eps; 1314 unsigned int num_active_eps;
1312 unsigned int limit_active_eps; 1315 unsigned int limit_active_eps;
1313 /* There are two roothubs to keep track of bus suspend info for */ 1316 /* There are two roothubs to keep track of bus suspend info for */
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index 0a50a35e1853..6aeb363e63e7 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -1524,6 +1524,12 @@ static void musb_gadget_fifo_flush(struct usb_ep *ep)
1524 csr = musb_readw(epio, MUSB_TXCSR); 1524 csr = musb_readw(epio, MUSB_TXCSR);
1525 if (csr & MUSB_TXCSR_FIFONOTEMPTY) { 1525 if (csr & MUSB_TXCSR_FIFONOTEMPTY) {
1526 csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_P_WZC_BITS; 1526 csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_P_WZC_BITS;
1527 /*
1528 * Setting both TXPKTRDY and FLUSHFIFO makes controller
1529 * to interrupt current FIFO loading, but not flushing
1530 * the already loaded ones.
1531 */
1532 csr &= ~MUSB_TXCSR_TXPKTRDY;
1527 musb_writew(epio, MUSB_TXCSR, csr); 1533 musb_writew(epio, MUSB_TXCSR, csr);
1528 /* REVISIT may be inappropriate w/o FIFONOTEMPTY ... */ 1534 /* REVISIT may be inappropriate w/o FIFONOTEMPTY ... */
1529 musb_writew(epio, MUSB_TXCSR, csr); 1535 musb_writew(epio, MUSB_TXCSR, csr);
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 7295e316bdfc..8b2473fa0f47 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -1575,7 +1575,7 @@ void musb_host_rx(struct musb *musb, u8 epnum)
1575 /* even if there was an error, we did the dma 1575 /* even if there was an error, we did the dma
1576 * for iso_frame_desc->length 1576 * for iso_frame_desc->length
1577 */ 1577 */
1578 if (d->status != EILSEQ && d->status != -EOVERFLOW) 1578 if (d->status != -EILSEQ && d->status != -EOVERFLOW)
1579 d->status = 0; 1579 d->status = 0;
1580 1580
1581 if (++qh->iso_idx >= urb->number_of_packets) 1581 if (++qh->iso_idx >= urb->number_of_packets)
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 162728977553..2e06b90aa1f8 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -179,6 +179,7 @@ static struct usb_device_id id_table_combined [] = {
179 { USB_DEVICE(FTDI_VID, FTDI_232RL_PID) }, 179 { USB_DEVICE(FTDI_VID, FTDI_232RL_PID) },
180 { USB_DEVICE(FTDI_VID, FTDI_8U2232C_PID) }, 180 { USB_DEVICE(FTDI_VID, FTDI_8U2232C_PID) },
181 { USB_DEVICE(FTDI_VID, FTDI_4232H_PID) }, 181 { USB_DEVICE(FTDI_VID, FTDI_4232H_PID) },
182 { USB_DEVICE(FTDI_VID, FTDI_232H_PID) },
182 { USB_DEVICE(FTDI_VID, FTDI_MICRO_CHAMELEON_PID) }, 183 { USB_DEVICE(FTDI_VID, FTDI_MICRO_CHAMELEON_PID) },
183 { USB_DEVICE(FTDI_VID, FTDI_RELAIS_PID) }, 184 { USB_DEVICE(FTDI_VID, FTDI_RELAIS_PID) },
184 { USB_DEVICE(FTDI_VID, FTDI_OPENDCC_PID) }, 185 { USB_DEVICE(FTDI_VID, FTDI_OPENDCC_PID) },
@@ -848,7 +849,8 @@ static const char *ftdi_chip_name[] = {
848 [FT2232C] = "FT2232C", 849 [FT2232C] = "FT2232C",
849 [FT232RL] = "FT232RL", 850 [FT232RL] = "FT232RL",
850 [FT2232H] = "FT2232H", 851 [FT2232H] = "FT2232H",
851 [FT4232H] = "FT4232H" 852 [FT4232H] = "FT4232H",
853 [FT232H] = "FT232H"
852}; 854};
853 855
854 856
@@ -1168,6 +1170,7 @@ static __u32 get_ftdi_divisor(struct tty_struct *tty,
1168 break; 1170 break;
1169 case FT2232H: /* FT2232H chip */ 1171 case FT2232H: /* FT2232H chip */
1170 case FT4232H: /* FT4232H chip */ 1172 case FT4232H: /* FT4232H chip */
1173 case FT232H: /* FT232H chip */
1171 if ((baud <= 12000000) & (baud >= 1200)) { 1174 if ((baud <= 12000000) & (baud >= 1200)) {
1172 div_value = ftdi_2232h_baud_to_divisor(baud); 1175 div_value = ftdi_2232h_baud_to_divisor(baud);
1173 } else if (baud < 1200) { 1176 } else if (baud < 1200) {
@@ -1429,9 +1432,12 @@ static void ftdi_determine_type(struct usb_serial_port *port)
1429 } else if (version < 0x600) { 1432 } else if (version < 0x600) {
1430 /* Assume it's an FT232BM (or FT245BM) */ 1433 /* Assume it's an FT232BM (or FT245BM) */
1431 priv->chip_type = FT232BM; 1434 priv->chip_type = FT232BM;
1432 } else { 1435 } else if (version < 0x900) {
1433 /* Assume it's an FT232R */ 1436 /* Assume it's an FT232RL */
1434 priv->chip_type = FT232RL; 1437 priv->chip_type = FT232RL;
1438 } else {
1439 /* Assume it's an FT232H */
1440 priv->chip_type = FT232H;
1435 } 1441 }
1436 dev_info(&udev->dev, "Detected %s\n", ftdi_chip_name[priv->chip_type]); 1442 dev_info(&udev->dev, "Detected %s\n", ftdi_chip_name[priv->chip_type]);
1437} 1443}
@@ -1559,7 +1565,8 @@ static int create_sysfs_attrs(struct usb_serial_port *port)
1559 priv->chip_type == FT2232C || 1565 priv->chip_type == FT2232C ||
1560 priv->chip_type == FT232RL || 1566 priv->chip_type == FT232RL ||
1561 priv->chip_type == FT2232H || 1567 priv->chip_type == FT2232H ||
1562 priv->chip_type == FT4232H)) { 1568 priv->chip_type == FT4232H ||
1569 priv->chip_type == FT232H)) {
1563 retval = device_create_file(&port->dev, 1570 retval = device_create_file(&port->dev,
1564 &dev_attr_latency_timer); 1571 &dev_attr_latency_timer);
1565 } 1572 }
@@ -1580,7 +1587,8 @@ static void remove_sysfs_attrs(struct usb_serial_port *port)
1580 priv->chip_type == FT2232C || 1587 priv->chip_type == FT2232C ||
1581 priv->chip_type == FT232RL || 1588 priv->chip_type == FT232RL ||
1582 priv->chip_type == FT2232H || 1589 priv->chip_type == FT2232H ||
1583 priv->chip_type == FT4232H) { 1590 priv->chip_type == FT4232H ||
1591 priv->chip_type == FT232H) {
1584 device_remove_file(&port->dev, &dev_attr_latency_timer); 1592 device_remove_file(&port->dev, &dev_attr_latency_timer);
1585 } 1593 }
1586 } 1594 }
@@ -2212,6 +2220,7 @@ static int ftdi_tiocmget(struct tty_struct *tty)
2212 case FT232RL: 2220 case FT232RL:
2213 case FT2232H: 2221 case FT2232H:
2214 case FT4232H: 2222 case FT4232H:
2223 case FT232H:
2215 len = 2; 2224 len = 2;
2216 break; 2225 break;
2217 default: 2226 default:
diff --git a/drivers/usb/serial/ftdi_sio.h b/drivers/usb/serial/ftdi_sio.h
index 213fe3d61282..19584faa86f9 100644
--- a/drivers/usb/serial/ftdi_sio.h
+++ b/drivers/usb/serial/ftdi_sio.h
@@ -156,7 +156,8 @@ enum ftdi_chip_type {
156 FT2232C = 4, 156 FT2232C = 4,
157 FT232RL = 5, 157 FT232RL = 5,
158 FT2232H = 6, 158 FT2232H = 6,
159 FT4232H = 7 159 FT4232H = 7,
160 FT232H = 8
160}; 161};
161 162
162enum ftdi_sio_baudrate { 163enum ftdi_sio_baudrate {
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h
index ab1fcdf3c378..19156d1049fe 100644
--- a/drivers/usb/serial/ftdi_sio_ids.h
+++ b/drivers/usb/serial/ftdi_sio_ids.h
@@ -22,6 +22,7 @@
22#define FTDI_8U232AM_ALT_PID 0x6006 /* FTDI's alternate PID for above */ 22#define FTDI_8U232AM_ALT_PID 0x6006 /* FTDI's alternate PID for above */
23#define FTDI_8U2232C_PID 0x6010 /* Dual channel device */ 23#define FTDI_8U2232C_PID 0x6010 /* Dual channel device */
24#define FTDI_4232H_PID 0x6011 /* Quad channel hi-speed device */ 24#define FTDI_4232H_PID 0x6011 /* Quad channel hi-speed device */
25#define FTDI_232H_PID 0x6014 /* Single channel hi-speed device */
25#define FTDI_SIO_PID 0x8372 /* Product Id SIO application of 8U100AX */ 26#define FTDI_SIO_PID 0x8372 /* Product Id SIO application of 8U100AX */
26#define FTDI_232RL_PID 0xFBFA /* Product ID for FT232RL */ 27#define FTDI_232RL_PID 0xFBFA /* Product ID for FT232RL */
27 28
diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c
index c6d92a530086..ea8445689c85 100644
--- a/drivers/usb/serial/ti_usb_3410_5052.c
+++ b/drivers/usb/serial/ti_usb_3410_5052.c
@@ -1745,6 +1745,7 @@ static int ti_download_firmware(struct ti_device *tdev)
1745 } 1745 }
1746 if (fw_p->size > TI_FIRMWARE_BUF_SIZE) { 1746 if (fw_p->size > TI_FIRMWARE_BUF_SIZE) {
1747 dev_err(&dev->dev, "%s - firmware too large %zu\n", __func__, fw_p->size); 1747 dev_err(&dev->dev, "%s - firmware too large %zu\n", __func__, fw_p->size);
1748 release_firmware(fw_p);
1748 return -ENOENT; 1749 return -ENOENT;
1749 } 1750 }
1750 1751
diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c
index 5fc983c5b92c..cf03ad067147 100644
--- a/drivers/video/amba-clcd.c
+++ b/drivers/video/amba-clcd.c
@@ -447,6 +447,8 @@ static int clcdfb_register(struct clcd_fb *fb)
447 goto out; 447 goto out;
448 } 448 }
449 449
450 fb->fb.device = &fb->dev->dev;
451
450 fb->fb.fix.mmio_start = fb->dev->res.start; 452 fb->fb.fix.mmio_start = fb->dev->res.start;
451 fb->fb.fix.mmio_len = resource_size(&fb->dev->res); 453 fb->fb.fix.mmio_len = resource_size(&fb->dev->res);
452 454
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index bedf5be27f05..0acc7d65aeaa 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -555,8 +555,6 @@ static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
555static int fsl_diu_check_var(struct fb_var_screeninfo *var, 555static int fsl_diu_check_var(struct fb_var_screeninfo *var,
556 struct fb_info *info) 556 struct fb_info *info)
557{ 557{
558 unsigned long htotal, vtotal;
559
560 pr_debug("check_var xres: %d\n", var->xres); 558 pr_debug("check_var xres: %d\n", var->xres);
561 pr_debug("check_var yres: %d\n", var->yres); 559 pr_debug("check_var yres: %d\n", var->yres);
562 560
@@ -635,20 +633,6 @@ static int fsl_diu_check_var(struct fb_var_screeninfo *var,
635 633
636 break; 634 break;
637 } 635 }
638 /* If the pixclock is below the minimum spec'd value then set to
639 * refresh rate for 60Hz since this is supported by most monitors.
640 * Refer to Documentation/fb/ for calculations.
641 */
642 if ((var->pixclock < MIN_PIX_CLK) || (var->pixclock > MAX_PIX_CLK)) {
643 htotal = var->xres + var->right_margin + var->hsync_len +
644 var->left_margin;
645 vtotal = var->yres + var->lower_margin + var->vsync_len +
646 var->upper_margin;
647 var->pixclock = (vtotal * htotal * 6UL) / 100UL;
648 var->pixclock = KHZ2PICOS(var->pixclock);
649 pr_debug("pixclock set for 60Hz refresh = %u ps\n",
650 var->pixclock);
651 }
652 636
653 var->height = -1; 637 var->height = -1;
654 var->width = -1; 638 var->width = -1;
diff --git a/drivers/video/geode/gx1fb_core.c b/drivers/video/geode/gx1fb_core.c
index c6b554f72c6d..5a5d0928df33 100644
--- a/drivers/video/geode/gx1fb_core.c
+++ b/drivers/video/geode/gx1fb_core.c
@@ -29,7 +29,7 @@ static int crt_option = 1;
29static char panel_option[32] = ""; 29static char panel_option[32] = "";
30 30
31/* Modes relevant to the GX1 (taken from modedb.c) */ 31/* Modes relevant to the GX1 (taken from modedb.c) */
32static const struct fb_videomode __initdata gx1_modedb[] = { 32static const struct fb_videomode __devinitdata gx1_modedb[] = {
33 /* 640x480-60 VESA */ 33 /* 640x480-60 VESA */
34 { NULL, 60, 640, 480, 39682, 48, 16, 33, 10, 96, 2, 34 { NULL, 60, 640, 480, 39682, 48, 16, 33, 10, 96, 2,
35 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, 35 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
@@ -195,7 +195,7 @@ static int gx1fb_blank(int blank_mode, struct fb_info *info)
195 return par->vid_ops->blank_display(info, blank_mode); 195 return par->vid_ops->blank_display(info, blank_mode);
196} 196}
197 197
198static int __init gx1fb_map_video_memory(struct fb_info *info, struct pci_dev *dev) 198static int __devinit gx1fb_map_video_memory(struct fb_info *info, struct pci_dev *dev)
199{ 199{
200 struct geodefb_par *par = info->par; 200 struct geodefb_par *par = info->par;
201 unsigned gx_base; 201 unsigned gx_base;
@@ -268,7 +268,7 @@ static struct fb_ops gx1fb_ops = {
268 .fb_imageblit = cfb_imageblit, 268 .fb_imageblit = cfb_imageblit,
269}; 269};
270 270
271static struct fb_info * __init gx1fb_init_fbinfo(struct device *dev) 271static struct fb_info * __devinit gx1fb_init_fbinfo(struct device *dev)
272{ 272{
273 struct geodefb_par *par; 273 struct geodefb_par *par;
274 struct fb_info *info; 274 struct fb_info *info;
@@ -318,7 +318,7 @@ static struct fb_info * __init gx1fb_init_fbinfo(struct device *dev)
318 return info; 318 return info;
319} 319}
320 320
321static int __init gx1fb_probe(struct pci_dev *pdev, const struct pci_device_id *id) 321static int __devinit gx1fb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
322{ 322{
323 struct geodefb_par *par; 323 struct geodefb_par *par;
324 struct fb_info *info; 324 struct fb_info *info;
@@ -382,7 +382,7 @@ static int __init gx1fb_probe(struct pci_dev *pdev, const struct pci_device_id *
382 return ret; 382 return ret;
383} 383}
384 384
385static void gx1fb_remove(struct pci_dev *pdev) 385static void __devexit gx1fb_remove(struct pci_dev *pdev)
386{ 386{
387 struct fb_info *info = pci_get_drvdata(pdev); 387 struct fb_info *info = pci_get_drvdata(pdev);
388 struct geodefb_par *par = info->par; 388 struct geodefb_par *par = info->par;
@@ -441,7 +441,7 @@ static struct pci_driver gx1fb_driver = {
441 .name = "gx1fb", 441 .name = "gx1fb",
442 .id_table = gx1fb_id_table, 442 .id_table = gx1fb_id_table,
443 .probe = gx1fb_probe, 443 .probe = gx1fb_probe,
444 .remove = gx1fb_remove, 444 .remove = __devexit_p(gx1fb_remove),
445}; 445};
446 446
447static int __init gx1fb_init(void) 447static int __init gx1fb_init(void)
@@ -456,7 +456,7 @@ static int __init gx1fb_init(void)
456 return pci_register_driver(&gx1fb_driver); 456 return pci_register_driver(&gx1fb_driver);
457} 457}
458 458
459static void __exit gx1fb_cleanup(void) 459static void __devexit gx1fb_cleanup(void)
460{ 460{
461 pci_unregister_driver(&gx1fb_driver); 461 pci_unregister_driver(&gx1fb_driver);
462} 462}
diff --git a/drivers/video/hecubafb.c b/drivers/video/hecubafb.c
index fbef15f7a218..614251a9af91 100644
--- a/drivers/video/hecubafb.c
+++ b/drivers/video/hecubafb.c
@@ -233,7 +233,7 @@ static int __devinit hecubafb_probe(struct platform_device *dev)
233 233
234 videomemory = vzalloc(videomemorysize); 234 videomemory = vzalloc(videomemorysize);
235 if (!videomemory) 235 if (!videomemory)
236 return retval; 236 goto err_videomem_alloc;
237 237
238 info = framebuffer_alloc(sizeof(struct hecubafb_par), &dev->dev); 238 info = framebuffer_alloc(sizeof(struct hecubafb_par), &dev->dev);
239 if (!info) 239 if (!info)
@@ -275,6 +275,7 @@ err_fbreg:
275 framebuffer_release(info); 275 framebuffer_release(info);
276err_fballoc: 276err_fballoc:
277 vfree(videomemory); 277 vfree(videomemory);
278err_videomem_alloc:
278 module_put(board->owner); 279 module_put(board->owner);
279 return retval; 280 return retval;
280} 281}
diff --git a/drivers/video/sh_mobile_meram.c b/drivers/video/sh_mobile_meram.c
index 9170c82b495c..cc7d7329dc15 100644
--- a/drivers/video/sh_mobile_meram.c
+++ b/drivers/video/sh_mobile_meram.c
@@ -218,7 +218,7 @@ static inline void meram_get_next_icb_addr(struct sh_mobile_meram_info *pdata,
218 icb_offset = 0xc0000000 | (cfg->current_reg << 23); 218 icb_offset = 0xc0000000 | (cfg->current_reg << 23);
219 219
220 *icb_addr_y = icb_offset | (cfg->icb[0].marker_icb << 24); 220 *icb_addr_y = icb_offset | (cfg->icb[0].marker_icb << 24);
221 if ((*icb_addr_c) && is_nvcolor(cfg->pixelformat)) 221 if (is_nvcolor(cfg->pixelformat))
222 *icb_addr_c = icb_offset | (cfg->icb[1].marker_icb << 24); 222 *icb_addr_c = icb_offset | (cfg->icb[1].marker_icb << 24);
223} 223}
224 224
diff --git a/drivers/video/sm501fb.c b/drivers/video/sm501fb.c
index 87f0be1e78b5..6294dca95500 100644
--- a/drivers/video/sm501fb.c
+++ b/drivers/video/sm501fb.c
@@ -1664,7 +1664,7 @@ static void sm501fb_stop(struct sm501fb_info *info)
1664 resource_size(info->regs_res)); 1664 resource_size(info->regs_res));
1665} 1665}
1666 1666
1667static int sm501fb_init_fb(struct fb_info *fb, 1667static int __devinit sm501fb_init_fb(struct fb_info *fb,
1668 enum sm501_controller head, 1668 enum sm501_controller head,
1669 const char *fbname) 1669 const char *fbname)
1670{ 1670{
diff --git a/drivers/video/udlfb.c b/drivers/video/udlfb.c
index 52b0f3e8ccac..816a4fda04f5 100644
--- a/drivers/video/udlfb.c
+++ b/drivers/video/udlfb.c
@@ -1233,8 +1233,12 @@ static int dlfb_setup_modes(struct dlfb_data *dev,
1233 if (dlfb_is_valid_mode(&info->monspecs.modedb[i], info)) 1233 if (dlfb_is_valid_mode(&info->monspecs.modedb[i], info))
1234 fb_add_videomode(&info->monspecs.modedb[i], 1234 fb_add_videomode(&info->monspecs.modedb[i],
1235 &info->modelist); 1235 &info->modelist);
1236 else /* if we've removed top/best mode */ 1236 else {
1237 info->monspecs.misc &= ~FB_MISC_1ST_DETAIL; 1237 if (i == 0)
1238 /* if we've removed top/best mode */
1239 info->monspecs.misc
1240 &= ~FB_MISC_1ST_DETAIL;
1241 }
1238 } 1242 }
1239 1243
1240 default_vmode = fb_find_best_display(&info->monspecs, 1244 default_vmode = fb_find_best_display(&info->monspecs,
diff --git a/drivers/video/vesafb.c b/drivers/video/vesafb.c
index a99bbe86db13..501b3406c6d5 100644
--- a/drivers/video/vesafb.c
+++ b/drivers/video/vesafb.c
@@ -175,6 +175,7 @@ static int vesafb_setcolreg(unsigned regno, unsigned red, unsigned green,
175 175
176static void vesafb_destroy(struct fb_info *info) 176static void vesafb_destroy(struct fb_info *info)
177{ 177{
178 fb_dealloc_cmap(&info->cmap);
178 if (info->screen_base) 179 if (info->screen_base)
179 iounmap(info->screen_base); 180 iounmap(info->screen_base);
180 release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size); 181 release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size);
diff --git a/drivers/w1/masters/ds1wm.c b/drivers/w1/masters/ds1wm.c
index ad57593d224a..a0c8965c1a79 100644
--- a/drivers/w1/masters/ds1wm.c
+++ b/drivers/w1/masters/ds1wm.c
@@ -109,6 +109,7 @@ struct ds1wm_data {
109 /* byte to write that makes all intr disabled, */ 109 /* byte to write that makes all intr disabled, */
110 /* considering active_state (IAS) (optimization) */ 110 /* considering active_state (IAS) (optimization) */
111 u8 int_en_reg_none; 111 u8 int_en_reg_none;
112 unsigned int reset_recover_delay; /* see ds1wm.h */
112}; 113};
113 114
114static inline void ds1wm_write_register(struct ds1wm_data *ds1wm_data, u32 reg, 115static inline void ds1wm_write_register(struct ds1wm_data *ds1wm_data, u32 reg,
@@ -187,6 +188,9 @@ static int ds1wm_reset(struct ds1wm_data *ds1wm_data)
187 return 1; 188 return 1;
188 } 189 }
189 190
191 if (ds1wm_data->reset_recover_delay)
192 msleep(ds1wm_data->reset_recover_delay);
193
190 return 0; 194 return 0;
191} 195}
192 196
@@ -490,6 +494,7 @@ static int ds1wm_probe(struct platform_device *pdev)
490 } 494 }
491 ds1wm_data->irq = res->start; 495 ds1wm_data->irq = res->start;
492 ds1wm_data->int_en_reg_none = (plat->active_high ? DS1WM_INTEN_IAS : 0); 496 ds1wm_data->int_en_reg_none = (plat->active_high ? DS1WM_INTEN_IAS : 0);
497 ds1wm_data->reset_recover_delay = plat->reset_recover_delay;
493 498
494 if (res->flags & IORESOURCE_IRQ_HIGHEDGE) 499 if (res->flags & IORESOURCE_IRQ_HIGHEDGE)
495 irq_set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_RISING); 500 irq_set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_RISING);
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 022f9eb0b7bf..9536d386bb38 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -535,8 +535,7 @@ config I6300ESB_WDT
535 535
536config INTEL_SCU_WATCHDOG 536config INTEL_SCU_WATCHDOG
537 bool "Intel SCU Watchdog for Mobile Platforms" 537 bool "Intel SCU Watchdog for Mobile Platforms"
538 depends on WATCHDOG 538 depends on X86_MRST
539 depends on INTEL_SCU_IPC
540 ---help--- 539 ---help---
541 Hardware driver for the watchdog time built into the Intel SCU 540 Hardware driver for the watchdog time built into the Intel SCU
542 for Intel Mobile Platforms. 541 for Intel Mobile Platforms.
diff --git a/drivers/watchdog/at32ap700x_wdt.c b/drivers/watchdog/at32ap700x_wdt.c
index 750bc5281d79..4ca5d40304b2 100644
--- a/drivers/watchdog/at32ap700x_wdt.c
+++ b/drivers/watchdog/at32ap700x_wdt.c
@@ -448,7 +448,7 @@ static void __exit at32_wdt_exit(void)
448} 448}
449module_exit(at32_wdt_exit); 449module_exit(at32_wdt_exit);
450 450
451MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); 451MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");
452MODULE_DESCRIPTION("Watchdog driver for Atmel AT32AP700X"); 452MODULE_DESCRIPTION("Watchdog driver for Atmel AT32AP700X");
453MODULE_LICENSE("GPL"); 453MODULE_LICENSE("GPL");
454MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 454MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
diff --git a/drivers/watchdog/gef_wdt.c b/drivers/watchdog/gef_wdt.c
index 29a7cd4b90c8..b146082bd85a 100644
--- a/drivers/watchdog/gef_wdt.c
+++ b/drivers/watchdog/gef_wdt.c
@@ -329,4 +329,4 @@ MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com>");
329MODULE_DESCRIPTION("GE watchdog driver"); 329MODULE_DESCRIPTION("GE watchdog driver");
330MODULE_LICENSE("GPL"); 330MODULE_LICENSE("GPL");
331MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 331MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
332MODULE_ALIAS("platform: gef_wdt"); 332MODULE_ALIAS("platform:gef_wdt");
diff --git a/drivers/watchdog/intel_scu_watchdog.c b/drivers/watchdog/intel_scu_watchdog.c
index 919bdd16136f..ba4386066a42 100644
--- a/drivers/watchdog/intel_scu_watchdog.c
+++ b/drivers/watchdog/intel_scu_watchdog.c
@@ -42,7 +42,6 @@
42#include <linux/sched.h> 42#include <linux/sched.h>
43#include <linux/signal.h> 43#include <linux/signal.h>
44#include <linux/sfi.h> 44#include <linux/sfi.h>
45#include <linux/types.h>
46#include <asm/irq.h> 45#include <asm/irq.h>
47#include <asm/atomic.h> 46#include <asm/atomic.h>
48#include <asm/intel_scu_ipc.h> 47#include <asm/intel_scu_ipc.h>
diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c
index 1479dc4d6129..0430e093b1a0 100644
--- a/drivers/watchdog/mtx-1_wdt.c
+++ b/drivers/watchdog/mtx-1_wdt.c
@@ -66,23 +66,18 @@ static struct {
66 int default_ticks; 66 int default_ticks;
67 unsigned long inuse; 67 unsigned long inuse;
68 unsigned gpio; 68 unsigned gpio;
69 int gstate; 69 unsigned int gstate;
70} mtx1_wdt_device; 70} mtx1_wdt_device;
71 71
72static void mtx1_wdt_trigger(unsigned long unused) 72static void mtx1_wdt_trigger(unsigned long unused)
73{ 73{
74 u32 tmp;
75
76 spin_lock(&mtx1_wdt_device.lock); 74 spin_lock(&mtx1_wdt_device.lock);
77 if (mtx1_wdt_device.running) 75 if (mtx1_wdt_device.running)
78 ticks--; 76 ticks--;
79 77
80 /* toggle wdt gpio */ 78 /* toggle wdt gpio */
81 mtx1_wdt_device.gstate = ~mtx1_wdt_device.gstate; 79 mtx1_wdt_device.gstate = !mtx1_wdt_device.gstate;
82 if (mtx1_wdt_device.gstate) 80 gpio_set_value(mtx1_wdt_device.gpio, mtx1_wdt_device.gstate);
83 gpio_direction_output(mtx1_wdt_device.gpio, 1);
84 else
85 gpio_direction_input(mtx1_wdt_device.gpio);
86 81
87 if (mtx1_wdt_device.queue && ticks) 82 if (mtx1_wdt_device.queue && ticks)
88 mod_timer(&mtx1_wdt_device.timer, jiffies + MTX1_WDT_INTERVAL); 83 mod_timer(&mtx1_wdt_device.timer, jiffies + MTX1_WDT_INTERVAL);
@@ -105,7 +100,7 @@ static void mtx1_wdt_start(void)
105 if (!mtx1_wdt_device.queue) { 100 if (!mtx1_wdt_device.queue) {
106 mtx1_wdt_device.queue = 1; 101 mtx1_wdt_device.queue = 1;
107 mtx1_wdt_device.gstate = 1; 102 mtx1_wdt_device.gstate = 1;
108 gpio_direction_output(mtx1_wdt_device.gpio, 1); 103 gpio_set_value(mtx1_wdt_device.gpio, 1);
109 mod_timer(&mtx1_wdt_device.timer, jiffies + MTX1_WDT_INTERVAL); 104 mod_timer(&mtx1_wdt_device.timer, jiffies + MTX1_WDT_INTERVAL);
110 } 105 }
111 mtx1_wdt_device.running++; 106 mtx1_wdt_device.running++;
@@ -120,7 +115,7 @@ static int mtx1_wdt_stop(void)
120 if (mtx1_wdt_device.queue) { 115 if (mtx1_wdt_device.queue) {
121 mtx1_wdt_device.queue = 0; 116 mtx1_wdt_device.queue = 0;
122 mtx1_wdt_device.gstate = 0; 117 mtx1_wdt_device.gstate = 0;
123 gpio_direction_output(mtx1_wdt_device.gpio, 0); 118 gpio_set_value(mtx1_wdt_device.gpio, 0);
124 } 119 }
125 ticks = mtx1_wdt_device.default_ticks; 120 ticks = mtx1_wdt_device.default_ticks;
126 spin_unlock_irqrestore(&mtx1_wdt_device.lock, flags); 121 spin_unlock_irqrestore(&mtx1_wdt_device.lock, flags);
@@ -214,6 +209,12 @@ static int __devinit mtx1_wdt_probe(struct platform_device *pdev)
214 int ret; 209 int ret;
215 210
216 mtx1_wdt_device.gpio = pdev->resource[0].start; 211 mtx1_wdt_device.gpio = pdev->resource[0].start;
212 ret = gpio_request_one(mtx1_wdt_device.gpio,
213 GPIOF_OUT_INIT_HIGH, "mtx1-wdt");
214 if (ret < 0) {
215 dev_err(&pdev->dev, "failed to request gpio");
216 return ret;
217 }
217 218
218 spin_lock_init(&mtx1_wdt_device.lock); 219 spin_lock_init(&mtx1_wdt_device.lock);
219 init_completion(&mtx1_wdt_device.stop); 220 init_completion(&mtx1_wdt_device.stop);
@@ -239,11 +240,13 @@ static int __devexit mtx1_wdt_remove(struct platform_device *pdev)
239 mtx1_wdt_device.queue = 0; 240 mtx1_wdt_device.queue = 0;
240 wait_for_completion(&mtx1_wdt_device.stop); 241 wait_for_completion(&mtx1_wdt_device.stop);
241 } 242 }
243
244 gpio_free(mtx1_wdt_device.gpio);
242 misc_deregister(&mtx1_wdt_misc); 245 misc_deregister(&mtx1_wdt_misc);
243 return 0; 246 return 0;
244} 247}
245 248
246static struct platform_driver mtx1_wdt = { 249static struct platform_driver mtx1_wdt_driver = {
247 .probe = mtx1_wdt_probe, 250 .probe = mtx1_wdt_probe,
248 .remove = __devexit_p(mtx1_wdt_remove), 251 .remove = __devexit_p(mtx1_wdt_remove),
249 .driver.name = "mtx1-wdt", 252 .driver.name = "mtx1-wdt",
@@ -252,12 +255,12 @@ static struct platform_driver mtx1_wdt = {
252 255
253static int __init mtx1_wdt_init(void) 256static int __init mtx1_wdt_init(void)
254{ 257{
255 return platform_driver_register(&mtx1_wdt); 258 return platform_driver_register(&mtx1_wdt_driver);
256} 259}
257 260
258static void __exit mtx1_wdt_exit(void) 261static void __exit mtx1_wdt_exit(void)
259{ 262{
260 platform_driver_unregister(&mtx1_wdt); 263 platform_driver_unregister(&mtx1_wdt_driver);
261} 264}
262 265
263module_init(mtx1_wdt_init); 266module_init(mtx1_wdt_init);
diff --git a/drivers/watchdog/wm831x_wdt.c b/drivers/watchdog/wm831x_wdt.c
index 8c4b2d5bb7da..871caea4e1c6 100644
--- a/drivers/watchdog/wm831x_wdt.c
+++ b/drivers/watchdog/wm831x_wdt.c
@@ -320,6 +320,11 @@ static int __devinit wm831x_wdt_probe(struct platform_device *pdev)
320 struct wm831x_watchdog_pdata *pdata; 320 struct wm831x_watchdog_pdata *pdata;
321 int reg, ret; 321 int reg, ret;
322 322
323 if (wm831x) {
324 dev_err(&pdev->dev, "wm831x watchdog already registered\n");
325 return -EBUSY;
326 }
327
323 wm831x = dev_get_drvdata(pdev->dev.parent); 328 wm831x = dev_get_drvdata(pdev->dev.parent);
324 329
325 ret = wm831x_reg_read(wm831x, WM831X_WATCHDOG); 330 ret = wm831x_reg_read(wm831x, WM831X_WATCHDOG);
diff --git a/firmware/Makefile b/firmware/Makefile
index 0d15a3d113a2..5f43bfba3c7a 100644
--- a/firmware/Makefile
+++ b/firmware/Makefile
@@ -82,6 +82,7 @@ fw-shipped-$(CONFIG_SERIAL_8250_CS) += cis/MT5634ZLX.cis cis/RS-COM-2P.cis \
82fw-shipped-$(CONFIG_PCMCIA_SMC91C92) += ositech/Xilinx7OD.bin 82fw-shipped-$(CONFIG_PCMCIA_SMC91C92) += ositech/Xilinx7OD.bin
83fw-shipped-$(CONFIG_SCSI_ADVANSYS) += advansys/mcode.bin advansys/38C1600.bin \ 83fw-shipped-$(CONFIG_SCSI_ADVANSYS) += advansys/mcode.bin advansys/38C1600.bin \
84 advansys/3550.bin advansys/38C0800.bin 84 advansys/3550.bin advansys/38C0800.bin
85fw-shipped-$(CONFIG_SCSI_ISCI) += isci/isci_firmware.bin
85fw-shipped-$(CONFIG_SCSI_QLOGIC_1280) += qlogic/1040.bin qlogic/1280.bin \ 86fw-shipped-$(CONFIG_SCSI_QLOGIC_1280) += qlogic/1040.bin qlogic/1280.bin \
86 qlogic/12160.bin 87 qlogic/12160.bin
87fw-shipped-$(CONFIG_SCSI_QLOGICPTI) += qlogic/isp1000.bin 88fw-shipped-$(CONFIG_SCSI_QLOGICPTI) += qlogic/isp1000.bin
diff --git a/firmware/isci/isci_firmware.bin.ihex b/firmware/isci/isci_firmware.bin.ihex
new file mode 100644
index 000000000000..2e6619570072
--- /dev/null
+++ b/firmware/isci/isci_firmware.bin.ihex
@@ -0,0 +1,16 @@
1:10000000495343554F454D42E80018100002000087
2:1000100000000000000000000101000000000000DE
3:10002000FFFFCF5F0100000008DD0B0000FC0F00A8
4:10003000097C0B006EFC0A00FFFFCF5F010000008F
5:1000400008DD0B0000FC0F00097C0B006EFC0A00B1
6:10005000FFFFCF5F0100000008DD0B0000FC0F0078
7:10006000097C0B006EFC0A00FFFFCF5F010000005F
8:1000700008DD0B0000FC0F00097C0B006EFC0A0081
9:100080000101000000000000FFFFCF5F0200000040
10:1000900008DD0B0000FC0F00097C0B006EFC0A0061
11:1000A000FFFFCF5F0200000008DD0B0000FC0F0027
12:1000B000097C0B006EFC0A00FFFFCF5F020000000E
13:1000C00008DD0B0000FC0F00097C0B006EFC0A0031
14:1000D000FFFFCF5F0200000008DD0B0000FC0F00F7
15:0800E000097C0B006EFC0A0014
16:00000001FF
diff --git a/fs/binfmt_elf_fdpic.c b/fs/binfmt_elf_fdpic.c
index 63039ed9576f..2bc5dc644b4c 100644
--- a/fs/binfmt_elf_fdpic.c
+++ b/fs/binfmt_elf_fdpic.c
@@ -1864,6 +1864,7 @@ cleanup:
1864 kfree(psinfo); 1864 kfree(psinfo);
1865 kfree(notes); 1865 kfree(notes);
1866 kfree(fpu); 1866 kfree(fpu);
1867 kfree(shdr4extnum);
1867#ifdef ELF_CORE_COPY_XFPREGS 1868#ifdef ELF_CORE_COPY_XFPREGS
1868 kfree(xfpu); 1869 kfree(xfpu);
1869#endif 1870#endif
diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h
index f30ac05dbda7..3b859a3e6a0e 100644
--- a/fs/btrfs/ctree.h
+++ b/fs/btrfs/ctree.h
@@ -1335,6 +1335,11 @@ struct btrfs_ioctl_defrag_range_args {
1335 */ 1335 */
1336#define BTRFS_STRING_ITEM_KEY 253 1336#define BTRFS_STRING_ITEM_KEY 253
1337 1337
1338/*
1339 * Flags for mount options.
1340 *
1341 * Note: don't forget to add new options to btrfs_show_options()
1342 */
1338#define BTRFS_MOUNT_NODATASUM (1 << 0) 1343#define BTRFS_MOUNT_NODATASUM (1 << 0)
1339#define BTRFS_MOUNT_NODATACOW (1 << 1) 1344#define BTRFS_MOUNT_NODATACOW (1 << 1)
1340#define BTRFS_MOUNT_NOBARRIER (1 << 2) 1345#define BTRFS_MOUNT_NOBARRIER (1 << 2)
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
index d340f63d8f07..3601f0aebddf 100644
--- a/fs/btrfs/inode.c
+++ b/fs/btrfs/inode.c
@@ -2678,12 +2678,14 @@ noinline int btrfs_update_inode(struct btrfs_trans_handle *trans,
2678 int ret; 2678 int ret;
2679 2679
2680 /* 2680 /*
2681 * If root is tree root, it means this inode is used to 2681 * If the inode is a free space inode, we can deadlock during commit
2682 * store free space information. And these inodes are updated 2682 * if we put it into the delayed code.
2683 * when committing the transaction, so they needn't delaye to 2683 *
2684 * be updated, or deadlock will occured. 2684 * The data relocation inode should also be directly updated
2685 * without delay
2685 */ 2686 */
2686 if (!is_free_space_inode(root, inode)) { 2687 if (!is_free_space_inode(root, inode)
2688 && root->root_key.objectid != BTRFS_DATA_RELOC_TREE_OBJECTID) {
2687 ret = btrfs_delayed_update_inode(trans, root, inode); 2689 ret = btrfs_delayed_update_inode(trans, root, inode);
2688 if (!ret) 2690 if (!ret)
2689 btrfs_set_inode_last_trans(trans, inode); 2691 btrfs_set_inode_last_trans(trans, inode);
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c
index 0bb4ebbb71b7..15634d4648d7 100644
--- a/fs/btrfs/super.c
+++ b/fs/btrfs/super.c
@@ -723,6 +723,12 @@ static int btrfs_show_options(struct seq_file *seq, struct vfsmount *vfs)
723 seq_puts(seq, ",clear_cache"); 723 seq_puts(seq, ",clear_cache");
724 if (btrfs_test_opt(root, USER_SUBVOL_RM_ALLOWED)) 724 if (btrfs_test_opt(root, USER_SUBVOL_RM_ALLOWED))
725 seq_puts(seq, ",user_subvol_rm_allowed"); 725 seq_puts(seq, ",user_subvol_rm_allowed");
726 if (btrfs_test_opt(root, ENOSPC_DEBUG))
727 seq_puts(seq, ",enospc_debug");
728 if (btrfs_test_opt(root, AUTO_DEFRAG))
729 seq_puts(seq, ",autodefrag");
730 if (btrfs_test_opt(root, INODE_MAP_CACHE))
731 seq_puts(seq, ",inode_cache");
726 return 0; 732 return 0;
727} 733}
728 734
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index 1efa56e18f9b..19450bc53632 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -2098,7 +2098,8 @@ int btrfs_balance(struct btrfs_root *dev_root)
2098 chunk_root->root_key.objectid, 2098 chunk_root->root_key.objectid,
2099 found_key.objectid, 2099 found_key.objectid,
2100 found_key.offset); 2100 found_key.offset);
2101 BUG_ON(ret && ret != -ENOSPC); 2101 if (ret && ret != -ENOSPC)
2102 goto error;
2102 key.offset = found_key.offset - 1; 2103 key.offset = found_key.offset - 1;
2103 } 2104 }
2104 ret = 0; 2105 ret = 0;
diff --git a/fs/ceph/file.c b/fs/ceph/file.c
index 9542f07d0b93..4698a5c553dc 100644
--- a/fs/ceph/file.c
+++ b/fs/ceph/file.c
@@ -290,7 +290,6 @@ static int striped_read(struct inode *inode,
290 struct ceph_inode_info *ci = ceph_inode(inode); 290 struct ceph_inode_info *ci = ceph_inode(inode);
291 u64 pos, this_len; 291 u64 pos, this_len;
292 int io_align, page_align; 292 int io_align, page_align;
293 int page_off = off & ~PAGE_CACHE_MASK; /* first byte's offset in page */
294 int left, pages_left; 293 int left, pages_left;
295 int read; 294 int read;
296 struct page **page_pos; 295 struct page **page_pos;
@@ -326,12 +325,11 @@ more:
326 ret, hit_stripe ? " HITSTRIPE" : "", was_short ? " SHORT" : ""); 325 ret, hit_stripe ? " HITSTRIPE" : "", was_short ? " SHORT" : "");
327 326
328 if (ret > 0) { 327 if (ret > 0) {
329 int didpages = 328 int didpages = (page_align + ret) >> PAGE_CACHE_SHIFT;
330 ((pos & ~PAGE_CACHE_MASK) + ret) >> PAGE_CACHE_SHIFT;
331 329
332 if (read < pos - off) { 330 if (read < pos - off) {
333 dout(" zero gap %llu to %llu\n", off + read, pos); 331 dout(" zero gap %llu to %llu\n", off + read, pos);
334 ceph_zero_page_vector_range(page_off + read, 332 ceph_zero_page_vector_range(page_align + read,
335 pos - off - read, pages); 333 pos - off - read, pages);
336 } 334 }
337 pos += ret; 335 pos += ret;
@@ -356,7 +354,7 @@ more:
356 left = inode->i_size - pos; 354 left = inode->i_size - pos;
357 355
358 dout("zero tail %d\n", left); 356 dout("zero tail %d\n", left);
359 ceph_zero_page_vector_range(page_off + read, left, 357 ceph_zero_page_vector_range(page_align + read, left,
360 pages); 358 pages);
361 read += left; 359 read += left;
362 } 360 }
@@ -478,9 +476,6 @@ static ssize_t ceph_sync_write(struct file *file, const char __user *data,
478 else 476 else
479 pos = *offset; 477 pos = *offset;
480 478
481 io_align = pos & ~PAGE_MASK;
482 buf_align = (unsigned long)data & ~PAGE_MASK;
483
484 ret = filemap_write_and_wait_range(inode->i_mapping, pos, pos + left); 479 ret = filemap_write_and_wait_range(inode->i_mapping, pos, pos + left);
485 if (ret < 0) 480 if (ret < 0)
486 return ret; 481 return ret;
@@ -504,6 +499,8 @@ static ssize_t ceph_sync_write(struct file *file, const char __user *data,
504 * boundary. this isn't atomic, unfortunately. :( 499 * boundary. this isn't atomic, unfortunately. :(
505 */ 500 */
506more: 501more:
502 io_align = pos & ~PAGE_MASK;
503 buf_align = (unsigned long)data & ~PAGE_MASK;
507 len = left; 504 len = left;
508 if (file->f_flags & O_DIRECT) { 505 if (file->f_flags & O_DIRECT) {
509 /* write from beginning of first page, regardless of 506 /* write from beginning of first page, regardless of
@@ -593,6 +590,7 @@ out:
593 pos += len; 590 pos += len;
594 written += len; 591 written += len;
595 left -= len; 592 left -= len;
593 data += written;
596 if (left) 594 if (left)
597 goto more; 595 goto more;
598 596
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index 35f9154615fa..3e2989976297 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -649,9 +649,9 @@ cifs_do_mount(struct file_system_type *fs_type,
649 649
650 cFYI(1, "Devname: %s flags: %d ", dev_name, flags); 650 cFYI(1, "Devname: %s flags: %d ", dev_name, flags);
651 651
652 rc = cifs_setup_volume_info(&volume_info, (char *)data, dev_name); 652 volume_info = cifs_get_volume_info((char *)data, dev_name);
653 if (rc) 653 if (IS_ERR(volume_info))
654 return ERR_PTR(rc); 654 return ERR_CAST(volume_info);
655 655
656 cifs_sb = kzalloc(sizeof(struct cifs_sb_info), GFP_KERNEL); 656 cifs_sb = kzalloc(sizeof(struct cifs_sb_info), GFP_KERNEL);
657 if (cifs_sb == NULL) { 657 if (cifs_sb == NULL) {
@@ -713,7 +713,7 @@ cifs_do_mount(struct file_system_type *fs_type,
713out_super: 713out_super:
714 deactivate_locked_super(sb); 714 deactivate_locked_super(sb);
715out: 715out:
716 cifs_cleanup_volume_info(&volume_info); 716 cifs_cleanup_volume_info(volume_info);
717 return root; 717 return root;
718 718
719out_mountdata: 719out_mountdata:
diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h
index 257f312ede42..8df28e925e5b 100644
--- a/fs/cifs/cifsproto.h
+++ b/fs/cifs/cifsproto.h
@@ -154,9 +154,9 @@ extern int set_cifs_acl(struct cifs_ntsd *, __u32, struct inode *,
154extern void cifs_setup_cifs_sb(struct smb_vol *pvolume_info, 154extern void cifs_setup_cifs_sb(struct smb_vol *pvolume_info,
155 struct cifs_sb_info *cifs_sb); 155 struct cifs_sb_info *cifs_sb);
156extern int cifs_match_super(struct super_block *, void *); 156extern int cifs_match_super(struct super_block *, void *);
157extern void cifs_cleanup_volume_info(struct smb_vol **pvolume_info); 157extern void cifs_cleanup_volume_info(struct smb_vol *pvolume_info);
158extern int cifs_setup_volume_info(struct smb_vol **pvolume_info, 158extern struct smb_vol *cifs_get_volume_info(char *mount_data,
159 char *mount_data, const char *devname); 159 const char *devname);
160extern int cifs_mount(struct cifs_sb_info *, struct smb_vol *); 160extern int cifs_mount(struct cifs_sb_info *, struct smb_vol *);
161extern void cifs_umount(struct cifs_sb_info *); 161extern void cifs_umount(struct cifs_sb_info *);
162extern void cifs_dfs_release_automount_timer(void); 162extern void cifs_dfs_release_automount_timer(void);
diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c
index 7f540df52527..dbd669cc5bc7 100644
--- a/fs/cifs/connect.c
+++ b/fs/cifs/connect.c
@@ -65,6 +65,8 @@ static int ip_connect(struct TCP_Server_Info *server);
65static int generic_ip_connect(struct TCP_Server_Info *server); 65static int generic_ip_connect(struct TCP_Server_Info *server);
66static void tlink_rb_insert(struct rb_root *root, struct tcon_link *new_tlink); 66static void tlink_rb_insert(struct rb_root *root, struct tcon_link *new_tlink);
67static void cifs_prune_tlinks(struct work_struct *work); 67static void cifs_prune_tlinks(struct work_struct *work);
68static int cifs_setup_volume_info(struct smb_vol *volume_info, char *mount_data,
69 const char *devname);
68 70
69/* 71/*
70 * cifs tcp session reconnection 72 * cifs tcp session reconnection
@@ -2240,8 +2242,8 @@ cifs_match_super(struct super_block *sb, void *data)
2240 2242
2241 rc = compare_mount_options(sb, mnt_data); 2243 rc = compare_mount_options(sb, mnt_data);
2242out: 2244out:
2243 cifs_put_tlink(tlink);
2244 spin_unlock(&cifs_tcp_ses_lock); 2245 spin_unlock(&cifs_tcp_ses_lock);
2246 cifs_put_tlink(tlink);
2245 return rc; 2247 return rc;
2246} 2248}
2247 2249
@@ -2474,14 +2476,6 @@ generic_ip_connect(struct TCP_Server_Info *server)
2474 if (rc < 0) 2476 if (rc < 0)
2475 return rc; 2477 return rc;
2476 2478
2477 rc = socket->ops->connect(socket, saddr, slen, 0);
2478 if (rc < 0) {
2479 cFYI(1, "Error %d connecting to server", rc);
2480 sock_release(socket);
2481 server->ssocket = NULL;
2482 return rc;
2483 }
2484
2485 /* 2479 /*
2486 * Eventually check for other socket options to change from 2480 * Eventually check for other socket options to change from
2487 * the default. sock_setsockopt not used because it expects 2481 * the default. sock_setsockopt not used because it expects
@@ -2510,6 +2504,14 @@ generic_ip_connect(struct TCP_Server_Info *server)
2510 socket->sk->sk_sndbuf, 2504 socket->sk->sk_sndbuf,
2511 socket->sk->sk_rcvbuf, socket->sk->sk_rcvtimeo); 2505 socket->sk->sk_rcvbuf, socket->sk->sk_rcvtimeo);
2512 2506
2507 rc = socket->ops->connect(socket, saddr, slen, 0);
2508 if (rc < 0) {
2509 cFYI(1, "Error %d connecting to server", rc);
2510 sock_release(socket);
2511 server->ssocket = NULL;
2512 return rc;
2513 }
2514
2513 if (sport == htons(RFC1001_PORT)) 2515 if (sport == htons(RFC1001_PORT))
2514 rc = ip_rfc1001_connect(server); 2516 rc = ip_rfc1001_connect(server);
2515 2517
@@ -2830,15 +2832,9 @@ is_path_accessible(int xid, struct cifs_tcon *tcon,
2830 return rc; 2832 return rc;
2831} 2833}
2832 2834
2833void 2835static void
2834cifs_cleanup_volume_info(struct smb_vol **pvolume_info) 2836cleanup_volume_info_contents(struct smb_vol *volume_info)
2835{ 2837{
2836 struct smb_vol *volume_info;
2837
2838 if (!pvolume_info || !*pvolume_info)
2839 return;
2840
2841 volume_info = *pvolume_info;
2842 kfree(volume_info->username); 2838 kfree(volume_info->username);
2843 kzfree(volume_info->password); 2839 kzfree(volume_info->password);
2844 kfree(volume_info->UNC); 2840 kfree(volume_info->UNC);
@@ -2846,28 +2842,44 @@ cifs_cleanup_volume_info(struct smb_vol **pvolume_info)
2846 kfree(volume_info->domainname); 2842 kfree(volume_info->domainname);
2847 kfree(volume_info->iocharset); 2843 kfree(volume_info->iocharset);
2848 kfree(volume_info->prepath); 2844 kfree(volume_info->prepath);
2845}
2846
2847void
2848cifs_cleanup_volume_info(struct smb_vol *volume_info)
2849{
2850 if (!volume_info)
2851 return;
2852 cleanup_volume_info_contents(volume_info);
2849 kfree(volume_info); 2853 kfree(volume_info);
2850 *pvolume_info = NULL;
2851 return;
2852} 2854}
2853 2855
2856
2854#ifdef CONFIG_CIFS_DFS_UPCALL 2857#ifdef CONFIG_CIFS_DFS_UPCALL
2855/* build_path_to_root returns full path to root when 2858/* build_path_to_root returns full path to root when
2856 * we do not have an exiting connection (tcon) */ 2859 * we do not have an exiting connection (tcon) */
2857static char * 2860static char *
2858build_unc_path_to_root(const struct smb_vol *volume_info, 2861build_unc_path_to_root(const struct smb_vol *vol,
2859 const struct cifs_sb_info *cifs_sb) 2862 const struct cifs_sb_info *cifs_sb)
2860{ 2863{
2861 char *full_path; 2864 char *full_path, *pos;
2865 unsigned int pplen = vol->prepath ? strlen(vol->prepath) : 0;
2866 unsigned int unc_len = strnlen(vol->UNC, MAX_TREE_SIZE + 1);
2862 2867
2863 int unc_len = strnlen(volume_info->UNC, MAX_TREE_SIZE + 1); 2868 full_path = kmalloc(unc_len + pplen + 1, GFP_KERNEL);
2864 full_path = kmalloc(unc_len + 1, GFP_KERNEL);
2865 if (full_path == NULL) 2869 if (full_path == NULL)
2866 return ERR_PTR(-ENOMEM); 2870 return ERR_PTR(-ENOMEM);
2867 2871
2868 strncpy(full_path, volume_info->UNC, unc_len); 2872 strncpy(full_path, vol->UNC, unc_len);
2869 full_path[unc_len] = 0; /* add trailing null */ 2873 pos = full_path + unc_len;
2874
2875 if (pplen) {
2876 strncpy(pos, vol->prepath, pplen);
2877 pos += pplen;
2878 }
2879
2880 *pos = '\0'; /* add trailing null */
2870 convert_delimiter(full_path, CIFS_DIR_SEP(cifs_sb)); 2881 convert_delimiter(full_path, CIFS_DIR_SEP(cifs_sb));
2882 cFYI(1, "%s: full_path=%s", __func__, full_path);
2871 return full_path; 2883 return full_path;
2872} 2884}
2873 2885
@@ -2910,15 +2922,18 @@ expand_dfs_referral(int xid, struct cifs_ses *pSesInfo,
2910 &fake_devname); 2922 &fake_devname);
2911 2923
2912 free_dfs_info_array(referrals, num_referrals); 2924 free_dfs_info_array(referrals, num_referrals);
2913 kfree(fake_devname);
2914
2915 if (cifs_sb->mountdata != NULL)
2916 kfree(cifs_sb->mountdata);
2917 2925
2918 if (IS_ERR(mdata)) { 2926 if (IS_ERR(mdata)) {
2919 rc = PTR_ERR(mdata); 2927 rc = PTR_ERR(mdata);
2920 mdata = NULL; 2928 mdata = NULL;
2929 } else {
2930 cleanup_volume_info_contents(volume_info);
2931 memset(volume_info, '\0', sizeof(*volume_info));
2932 rc = cifs_setup_volume_info(volume_info, mdata,
2933 fake_devname);
2921 } 2934 }
2935 kfree(fake_devname);
2936 kfree(cifs_sb->mountdata);
2922 cifs_sb->mountdata = mdata; 2937 cifs_sb->mountdata = mdata;
2923 } 2938 }
2924 kfree(full_path); 2939 kfree(full_path);
@@ -2926,33 +2941,20 @@ expand_dfs_referral(int xid, struct cifs_ses *pSesInfo,
2926} 2941}
2927#endif 2942#endif
2928 2943
2929int cifs_setup_volume_info(struct smb_vol **pvolume_info, char *mount_data, 2944static int
2930 const char *devname) 2945cifs_setup_volume_info(struct smb_vol *volume_info, char *mount_data,
2946 const char *devname)
2931{ 2947{
2932 struct smb_vol *volume_info;
2933 int rc = 0; 2948 int rc = 0;
2934 2949
2935 *pvolume_info = NULL; 2950 if (cifs_parse_mount_options(mount_data, devname, volume_info))
2936 2951 return -EINVAL;
2937 volume_info = kzalloc(sizeof(struct smb_vol), GFP_KERNEL);
2938 if (!volume_info) {
2939 rc = -ENOMEM;
2940 goto out;
2941 }
2942
2943 if (cifs_parse_mount_options(mount_data, devname,
2944 volume_info)) {
2945 rc = -EINVAL;
2946 goto out;
2947 }
2948 2952
2949 if (volume_info->nullauth) { 2953 if (volume_info->nullauth) {
2950 cFYI(1, "null user"); 2954 cFYI(1, "null user");
2951 volume_info->username = kzalloc(1, GFP_KERNEL); 2955 volume_info->username = kzalloc(1, GFP_KERNEL);
2952 if (volume_info->username == NULL) { 2956 if (volume_info->username == NULL)
2953 rc = -ENOMEM; 2957 return -ENOMEM;
2954 goto out;
2955 }
2956 } else if (volume_info->username) { 2958 } else if (volume_info->username) {
2957 /* BB fixme parse for domain name here */ 2959 /* BB fixme parse for domain name here */
2958 cFYI(1, "Username: %s", volume_info->username); 2960 cFYI(1, "Username: %s", volume_info->username);
@@ -2960,8 +2962,7 @@ int cifs_setup_volume_info(struct smb_vol **pvolume_info, char *mount_data,
2960 cifserror("No username specified"); 2962 cifserror("No username specified");
2961 /* In userspace mount helper we can get user name from alternate 2963 /* In userspace mount helper we can get user name from alternate
2962 locations such as env variables and files on disk */ 2964 locations such as env variables and files on disk */
2963 rc = -EINVAL; 2965 return -EINVAL;
2964 goto out;
2965 } 2966 }
2966 2967
2967 /* this is needed for ASCII cp to Unicode converts */ 2968 /* this is needed for ASCII cp to Unicode converts */
@@ -2973,18 +2974,32 @@ int cifs_setup_volume_info(struct smb_vol **pvolume_info, char *mount_data,
2973 if (volume_info->local_nls == NULL) { 2974 if (volume_info->local_nls == NULL) {
2974 cERROR(1, "CIFS mount error: iocharset %s not found", 2975 cERROR(1, "CIFS mount error: iocharset %s not found",
2975 volume_info->iocharset); 2976 volume_info->iocharset);
2976 rc = -ELIBACC; 2977 return -ELIBACC;
2977 goto out;
2978 } 2978 }
2979 } 2979 }
2980 2980
2981 *pvolume_info = volume_info;
2982 return rc;
2983out:
2984 cifs_cleanup_volume_info(&volume_info);
2985 return rc; 2981 return rc;
2986} 2982}
2987 2983
2984struct smb_vol *
2985cifs_get_volume_info(char *mount_data, const char *devname)
2986{
2987 int rc;
2988 struct smb_vol *volume_info;
2989
2990 volume_info = kzalloc(sizeof(struct smb_vol), GFP_KERNEL);
2991 if (!volume_info)
2992 return ERR_PTR(-ENOMEM);
2993
2994 rc = cifs_setup_volume_info(volume_info, mount_data, devname);
2995 if (rc) {
2996 cifs_cleanup_volume_info(volume_info);
2997 volume_info = ERR_PTR(rc);
2998 }
2999
3000 return volume_info;
3001}
3002
2988int 3003int
2989cifs_mount(struct cifs_sb_info *cifs_sb, struct smb_vol *volume_info) 3004cifs_mount(struct cifs_sb_info *cifs_sb, struct smb_vol *volume_info)
2990{ 3005{
@@ -2997,6 +3012,7 @@ cifs_mount(struct cifs_sb_info *cifs_sb, struct smb_vol *volume_info)
2997 struct tcon_link *tlink; 3012 struct tcon_link *tlink;
2998#ifdef CONFIG_CIFS_DFS_UPCALL 3013#ifdef CONFIG_CIFS_DFS_UPCALL
2999 int referral_walks_count = 0; 3014 int referral_walks_count = 0;
3015#endif
3000 3016
3001 rc = bdi_setup_and_register(&cifs_sb->bdi, "cifs", BDI_CAP_MAP_COPY); 3017 rc = bdi_setup_and_register(&cifs_sb->bdi, "cifs", BDI_CAP_MAP_COPY);
3002 if (rc) 3018 if (rc)
@@ -3004,6 +3020,7 @@ cifs_mount(struct cifs_sb_info *cifs_sb, struct smb_vol *volume_info)
3004 3020
3005 cifs_sb->bdi.ra_pages = default_backing_dev_info.ra_pages; 3021 cifs_sb->bdi.ra_pages = default_backing_dev_info.ra_pages;
3006 3022
3023#ifdef CONFIG_CIFS_DFS_UPCALL
3007try_mount_again: 3024try_mount_again:
3008 /* cleanup activities if we're chasing a referral */ 3025 /* cleanup activities if we're chasing a referral */
3009 if (referral_walks_count) { 3026 if (referral_walks_count) {
@@ -3012,7 +3029,6 @@ try_mount_again:
3012 else if (pSesInfo) 3029 else if (pSesInfo)
3013 cifs_put_smb_ses(pSesInfo); 3030 cifs_put_smb_ses(pSesInfo);
3014 3031
3015 cifs_cleanup_volume_info(&volume_info);
3016 FreeXid(xid); 3032 FreeXid(xid);
3017 } 3033 }
3018#endif 3034#endif
diff --git a/fs/cifs/fscache.c b/fs/cifs/fscache.c
index 816696621ec9..42e5363b4102 100644
--- a/fs/cifs/fscache.c
+++ b/fs/cifs/fscache.c
@@ -92,6 +92,7 @@ static void cifs_fscache_disable_inode_cookie(struct inode *inode)
92 92
93 if (cifsi->fscache) { 93 if (cifsi->fscache) {
94 cFYI(1, "%s: (0x%p)", __func__, cifsi->fscache); 94 cFYI(1, "%s: (0x%p)", __func__, cifsi->fscache);
95 fscache_uncache_all_inode_pages(cifsi->fscache, inode);
95 fscache_relinquish_cookie(cifsi->fscache, 1); 96 fscache_relinquish_cookie(cifsi->fscache, 1);
96 cifsi->fscache = NULL; 97 cifsi->fscache = NULL;
97 } 98 }
diff --git a/fs/fscache/page.c b/fs/fscache/page.c
index a2a5d19ece6a..2f343b4d7a7d 100644
--- a/fs/fscache/page.c
+++ b/fs/fscache/page.c
@@ -954,3 +954,47 @@ void fscache_mark_pages_cached(struct fscache_retrieval *op,
954 pagevec_reinit(pagevec); 954 pagevec_reinit(pagevec);
955} 955}
956EXPORT_SYMBOL(fscache_mark_pages_cached); 956EXPORT_SYMBOL(fscache_mark_pages_cached);
957
958/*
959 * Uncache all the pages in an inode that are marked PG_fscache, assuming them
960 * to be associated with the given cookie.
961 */
962void __fscache_uncache_all_inode_pages(struct fscache_cookie *cookie,
963 struct inode *inode)
964{
965 struct address_space *mapping = inode->i_mapping;
966 struct pagevec pvec;
967 pgoff_t next;
968 int i;
969
970 _enter("%p,%p", cookie, inode);
971
972 if (!mapping || mapping->nrpages == 0) {
973 _leave(" [no pages]");
974 return;
975 }
976
977 pagevec_init(&pvec, 0);
978 next = 0;
979 while (next <= (loff_t)-1 &&
980 pagevec_lookup(&pvec, mapping, next, PAGEVEC_SIZE)
981 ) {
982 for (i = 0; i < pagevec_count(&pvec); i++) {
983 struct page *page = pvec.pages[i];
984 pgoff_t page_index = page->index;
985
986 ASSERTCMP(page_index, >=, next);
987 next = page_index + 1;
988
989 if (PageFsCache(page)) {
990 __fscache_wait_on_page_write(cookie, page);
991 __fscache_uncache_page(cookie, page);
992 }
993 }
994 pagevec_release(&pvec);
995 cond_resched();
996 }
997
998 _leave("");
999}
1000EXPORT_SYMBOL(__fscache_uncache_all_inode_pages);
diff --git a/fs/hfsplus/super.c b/fs/hfsplus/super.c
index b49b55584c84..84a47b709f51 100644
--- a/fs/hfsplus/super.c
+++ b/fs/hfsplus/super.c
@@ -500,7 +500,7 @@ static int hfsplus_fill_super(struct super_block *sb, void *data, int silent)
500out_put_hidden_dir: 500out_put_hidden_dir:
501 iput(sbi->hidden_dir); 501 iput(sbi->hidden_dir);
502out_put_root: 502out_put_root:
503 iput(sbi->alloc_file); 503 iput(root);
504out_put_alloc_file: 504out_put_alloc_file:
505 iput(sbi->alloc_file); 505 iput(sbi->alloc_file);
506out_close_cat_tree: 506out_close_cat_tree:
diff --git a/fs/hfsplus/wrapper.c b/fs/hfsplus/wrapper.c
index 3031d81f5f0f..4ac88ff79aa6 100644
--- a/fs/hfsplus/wrapper.c
+++ b/fs/hfsplus/wrapper.c
@@ -36,6 +36,7 @@ int hfsplus_submit_bio(struct block_device *bdev, sector_t sector,
36{ 36{
37 DECLARE_COMPLETION_ONSTACK(wait); 37 DECLARE_COMPLETION_ONSTACK(wait);
38 struct bio *bio; 38 struct bio *bio;
39 int ret = 0;
39 40
40 bio = bio_alloc(GFP_NOIO, 1); 41 bio = bio_alloc(GFP_NOIO, 1);
41 bio->bi_sector = sector; 42 bio->bi_sector = sector;
@@ -54,8 +55,10 @@ int hfsplus_submit_bio(struct block_device *bdev, sector_t sector,
54 wait_for_completion(&wait); 55 wait_for_completion(&wait);
55 56
56 if (!bio_flagged(bio, BIO_UPTODATE)) 57 if (!bio_flagged(bio, BIO_UPTODATE))
57 return -EIO; 58 ret = -EIO;
58 return 0; 59
60 bio_put(bio);
61 return ret;
59} 62}
60 63
61static int hfsplus_read_mdb(void *bufptr, struct hfsplus_wd *wd) 64static int hfsplus_read_mdb(void *bufptr, struct hfsplus_wd *wd)
diff --git a/fs/locks.c b/fs/locks.c
index 0a4f50dfadfb..b286539d547a 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -160,10 +160,28 @@ EXPORT_SYMBOL_GPL(unlock_flocks);
160 160
161static struct kmem_cache *filelock_cache __read_mostly; 161static struct kmem_cache *filelock_cache __read_mostly;
162 162
163static void locks_init_lock_always(struct file_lock *fl)
164{
165 fl->fl_next = NULL;
166 fl->fl_fasync = NULL;
167 fl->fl_owner = NULL;
168 fl->fl_pid = 0;
169 fl->fl_nspid = NULL;
170 fl->fl_file = NULL;
171 fl->fl_flags = 0;
172 fl->fl_type = 0;
173 fl->fl_start = fl->fl_end = 0;
174}
175
163/* Allocate an empty lock structure. */ 176/* Allocate an empty lock structure. */
164struct file_lock *locks_alloc_lock(void) 177struct file_lock *locks_alloc_lock(void)
165{ 178{
166 return kmem_cache_alloc(filelock_cache, GFP_KERNEL); 179 struct file_lock *fl = kmem_cache_alloc(filelock_cache, GFP_KERNEL);
180
181 if (fl)
182 locks_init_lock_always(fl);
183
184 return fl;
167} 185}
168EXPORT_SYMBOL_GPL(locks_alloc_lock); 186EXPORT_SYMBOL_GPL(locks_alloc_lock);
169 187
@@ -200,17 +218,9 @@ void locks_init_lock(struct file_lock *fl)
200 INIT_LIST_HEAD(&fl->fl_link); 218 INIT_LIST_HEAD(&fl->fl_link);
201 INIT_LIST_HEAD(&fl->fl_block); 219 INIT_LIST_HEAD(&fl->fl_block);
202 init_waitqueue_head(&fl->fl_wait); 220 init_waitqueue_head(&fl->fl_wait);
203 fl->fl_next = NULL;
204 fl->fl_fasync = NULL;
205 fl->fl_owner = NULL;
206 fl->fl_pid = 0;
207 fl->fl_nspid = NULL;
208 fl->fl_file = NULL;
209 fl->fl_flags = 0;
210 fl->fl_type = 0;
211 fl->fl_start = fl->fl_end = 0;
212 fl->fl_ops = NULL; 221 fl->fl_ops = NULL;
213 fl->fl_lmops = NULL; 222 fl->fl_lmops = NULL;
223 locks_init_lock_always(fl);
214} 224}
215 225
216EXPORT_SYMBOL(locks_init_lock); 226EXPORT_SYMBOL(locks_init_lock);
diff --git a/fs/nfs/fscache.c b/fs/nfs/fscache.c
index ce153a6b3aec..419119c371bf 100644
--- a/fs/nfs/fscache.c
+++ b/fs/nfs/fscache.c
@@ -259,12 +259,10 @@ static void nfs_fscache_disable_inode_cookie(struct inode *inode)
259 dfprintk(FSCACHE, 259 dfprintk(FSCACHE,
260 "NFS: nfsi 0x%p turning cache off\n", NFS_I(inode)); 260 "NFS: nfsi 0x%p turning cache off\n", NFS_I(inode));
261 261
262 /* Need to invalidate any mapped pages that were read in before 262 /* Need to uncache any pages attached to this inode that
263 * turning off the cache. 263 * fscache knows about before turning off the cache.
264 */ 264 */
265 if (inode->i_mapping && inode->i_mapping->nrpages) 265 fscache_uncache_all_inode_pages(NFS_I(inode)->fscache, inode);
266 invalidate_inode_pages2(inode->i_mapping);
267
268 nfs_fscache_zap_inode_cookie(inode); 266 nfs_fscache_zap_inode_cookie(inode);
269 } 267 }
270} 268}
diff --git a/fs/proc/base.c b/fs/proc/base.c
index 8a84210ca080..fc5bc2767692 100644
--- a/fs/proc/base.c
+++ b/fs/proc/base.c
@@ -2708,6 +2708,9 @@ static int do_io_accounting(struct task_struct *task, char *buffer, int whole)
2708 struct task_io_accounting acct = task->ioac; 2708 struct task_io_accounting acct = task->ioac;
2709 unsigned long flags; 2709 unsigned long flags;
2710 2710
2711 if (!ptrace_may_access(task, PTRACE_MODE_READ))
2712 return -EACCES;
2713
2711 if (whole && lock_task_sighand(task, &flags)) { 2714 if (whole && lock_task_sighand(task, &flags)) {
2712 struct task_struct *t = task; 2715 struct task_struct *t = task;
2713 2716
@@ -2839,7 +2842,7 @@ static const struct pid_entry tgid_base_stuff[] = {
2839 REG("coredump_filter", S_IRUGO|S_IWUSR, proc_coredump_filter_operations), 2842 REG("coredump_filter", S_IRUGO|S_IWUSR, proc_coredump_filter_operations),
2840#endif 2843#endif
2841#ifdef CONFIG_TASK_IO_ACCOUNTING 2844#ifdef CONFIG_TASK_IO_ACCOUNTING
2842 INF("io", S_IRUGO, proc_tgid_io_accounting), 2845 INF("io", S_IRUSR, proc_tgid_io_accounting),
2843#endif 2846#endif
2844#ifdef CONFIG_HARDWALL 2847#ifdef CONFIG_HARDWALL
2845 INF("hardwall", S_IRUGO, proc_pid_hardwall), 2848 INF("hardwall", S_IRUGO, proc_pid_hardwall),
@@ -3181,7 +3184,7 @@ static const struct pid_entry tid_base_stuff[] = {
3181 REG("make-it-fail", S_IRUGO|S_IWUSR, proc_fault_inject_operations), 3184 REG("make-it-fail", S_IRUGO|S_IWUSR, proc_fault_inject_operations),
3182#endif 3185#endif
3183#ifdef CONFIG_TASK_IO_ACCOUNTING 3186#ifdef CONFIG_TASK_IO_ACCOUNTING
3184 INF("io", S_IRUGO, proc_tid_io_accounting), 3187 INF("io", S_IRUSR, proc_tid_io_accounting),
3185#endif 3188#endif
3186#ifdef CONFIG_HARDWALL 3189#ifdef CONFIG_HARDWALL
3187 INF("hardwall", S_IRUGO, proc_pid_hardwall), 3190 INF("hardwall", S_IRUGO, proc_pid_hardwall),
diff --git a/fs/xfs/xfs_inode_item.c b/fs/xfs/xfs_inode_item.c
index 09983a3344a5..b1e88d56069c 100644
--- a/fs/xfs/xfs_inode_item.c
+++ b/fs/xfs/xfs_inode_item.c
@@ -681,15 +681,15 @@ xfs_inode_item_unlock(
681 * where the cluster buffer may be unpinned before the inode is inserted into 681 * where the cluster buffer may be unpinned before the inode is inserted into
682 * the AIL during transaction committed processing. If the buffer is unpinned 682 * the AIL during transaction committed processing. If the buffer is unpinned
683 * before the inode item has been committed and inserted, then it is possible 683 * before the inode item has been committed and inserted, then it is possible
684 * for the buffer to be written and IO completions before the inode is inserted 684 * for the buffer to be written and IO completes before the inode is inserted
685 * into the AIL. In that case, we'd be inserting a clean, stale inode into the 685 * into the AIL. In that case, we'd be inserting a clean, stale inode into the
686 * AIL which will never get removed. It will, however, get reclaimed which 686 * AIL which will never get removed. It will, however, get reclaimed which
687 * triggers an assert in xfs_inode_free() complaining about freein an inode 687 * triggers an assert in xfs_inode_free() complaining about freein an inode
688 * still in the AIL. 688 * still in the AIL.
689 * 689 *
690 * To avoid this, return a lower LSN than the one passed in so that the 690 * To avoid this, just unpin the inode directly and return a LSN of -1 so the
691 * transaction committed code will not move the inode forward in the AIL but 691 * transaction committed code knows that it does not need to do any further
692 * will still unpin it properly. 692 * processing on the item.
693 */ 693 */
694STATIC xfs_lsn_t 694STATIC xfs_lsn_t
695xfs_inode_item_committed( 695xfs_inode_item_committed(
@@ -699,8 +699,10 @@ xfs_inode_item_committed(
699 struct xfs_inode_log_item *iip = INODE_ITEM(lip); 699 struct xfs_inode_log_item *iip = INODE_ITEM(lip);
700 struct xfs_inode *ip = iip->ili_inode; 700 struct xfs_inode *ip = iip->ili_inode;
701 701
702 if (xfs_iflags_test(ip, XFS_ISTALE)) 702 if (xfs_iflags_test(ip, XFS_ISTALE)) {
703 return lsn - 1; 703 xfs_inode_item_unpin(lip, 0);
704 return -1;
705 }
704 return lsn; 706 return lsn;
705} 707}
706 708
diff --git a/fs/xfs/xfs_trans.c b/fs/xfs/xfs_trans.c
index 7c7bc2b786bd..c83f63b33aae 100644
--- a/fs/xfs/xfs_trans.c
+++ b/fs/xfs/xfs_trans.c
@@ -1361,7 +1361,7 @@ xfs_trans_item_committed(
1361 lip->li_flags |= XFS_LI_ABORTED; 1361 lip->li_flags |= XFS_LI_ABORTED;
1362 item_lsn = IOP_COMMITTED(lip, commit_lsn); 1362 item_lsn = IOP_COMMITTED(lip, commit_lsn);
1363 1363
1364 /* If the committed routine returns -1, item has been freed. */ 1364 /* item_lsn of -1 means the item needs no further processing */
1365 if (XFS_LSN_CMP(item_lsn, (xfs_lsn_t)-1) == 0) 1365 if (XFS_LSN_CMP(item_lsn, (xfs_lsn_t)-1) == 0)
1366 return; 1366 return;
1367 1367
@@ -1474,7 +1474,7 @@ xfs_trans_committed_bulk(
1474 lip->li_flags |= XFS_LI_ABORTED; 1474 lip->li_flags |= XFS_LI_ABORTED;
1475 item_lsn = IOP_COMMITTED(lip, commit_lsn); 1475 item_lsn = IOP_COMMITTED(lip, commit_lsn);
1476 1476
1477 /* item_lsn of -1 means the item was freed */ 1477 /* item_lsn of -1 means the item needs no further processing */
1478 if (XFS_LSN_CMP(item_lsn, (xfs_lsn_t)-1) == 0) 1478 if (XFS_LSN_CMP(item_lsn, (xfs_lsn_t)-1) == 0)
1479 continue; 1479 continue;
1480 1480
diff --git a/include/linux/amba/serial.h b/include/linux/amba/serial.h
index 5479fdc849e9..514ed45c462e 100644
--- a/include/linux/amba/serial.h
+++ b/include/linux/amba/serial.h
@@ -201,6 +201,9 @@ struct amba_pl011_data {
201 bool (*dma_filter)(struct dma_chan *chan, void *filter_param); 201 bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
202 void *dma_rx_param; 202 void *dma_rx_param;
203 void *dma_tx_param; 203 void *dma_tx_param;
204 void (*init) (void);
205 void (*exit) (void);
206 void (*reset) (void);
204}; 207};
205#endif 208#endif
206 209
diff --git a/include/linux/connector.h b/include/linux/connector.h
index 7c60d0942adb..f696bccd48cb 100644
--- a/include/linux/connector.h
+++ b/include/linux/connector.h
@@ -44,7 +44,7 @@
44#define CN_VAL_DRBD 0x1 44#define CN_VAL_DRBD 0x1
45#define CN_KVP_IDX 0x9 /* HyperV KVP */ 45#define CN_KVP_IDX 0x9 /* HyperV KVP */
46 46
47#define CN_NETLINK_USERS 9 47#define CN_NETLINK_USERS 10 /* Highest index + 1 */
48 48
49/* 49/*
50 * Maximum connector's message size. 50 * Maximum connector's message size.
diff --git a/include/linux/drbd_limits.h b/include/linux/drbd_limits.h
index 246f576c981d..447c36752385 100644
--- a/include/linux/drbd_limits.h
+++ b/include/linux/drbd_limits.h
@@ -117,10 +117,10 @@
117/* drbdsetup XY resize -d Z 117/* drbdsetup XY resize -d Z
118 * you are free to reduce the device size to nothing, if you want to. 118 * you are free to reduce the device size to nothing, if you want to.
119 * the upper limit with 64bit kernel, enough ram and flexible meta data 119 * the upper limit with 64bit kernel, enough ram and flexible meta data
120 * is 16 TB, currently. */ 120 * is 1 PiB, currently. */
121/* DRBD_MAX_SECTORS */ 121/* DRBD_MAX_SECTORS */
122#define DRBD_DISK_SIZE_SECT_MIN 0 122#define DRBD_DISK_SIZE_SECT_MIN 0
123#define DRBD_DISK_SIZE_SECT_MAX (16 * (2LLU << 30)) 123#define DRBD_DISK_SIZE_SECT_MAX (1 * (2LLU << 40))
124#define DRBD_DISK_SIZE_SECT_DEF 0 /* = disabled = no user size... */ 124#define DRBD_DISK_SIZE_SECT_DEF 0 /* = disabled = no user size... */
125 125
126#define DRBD_ON_IO_ERROR_DEF EP_PASS_ON 126#define DRBD_ON_IO_ERROR_DEF EP_PASS_ON
diff --git a/include/linux/fscache.h b/include/linux/fscache.h
index 7c4d72f5581f..9ec20dec3353 100644
--- a/include/linux/fscache.h
+++ b/include/linux/fscache.h
@@ -204,6 +204,8 @@ extern bool __fscache_check_page_write(struct fscache_cookie *, struct page *);
204extern void __fscache_wait_on_page_write(struct fscache_cookie *, struct page *); 204extern void __fscache_wait_on_page_write(struct fscache_cookie *, struct page *);
205extern bool __fscache_maybe_release_page(struct fscache_cookie *, struct page *, 205extern bool __fscache_maybe_release_page(struct fscache_cookie *, struct page *,
206 gfp_t); 206 gfp_t);
207extern void __fscache_uncache_all_inode_pages(struct fscache_cookie *,
208 struct inode *);
207 209
208/** 210/**
209 * fscache_register_netfs - Register a filesystem as desiring caching services 211 * fscache_register_netfs - Register a filesystem as desiring caching services
@@ -643,4 +645,23 @@ bool fscache_maybe_release_page(struct fscache_cookie *cookie,
643 return false; 645 return false;
644} 646}
645 647
648/**
649 * fscache_uncache_all_inode_pages - Uncache all an inode's pages
650 * @cookie: The cookie representing the inode's cache object.
651 * @inode: The inode to uncache pages from.
652 *
653 * Uncache all the pages in an inode that are marked PG_fscache, assuming them
654 * to be associated with the given cookie.
655 *
656 * This function may sleep. It will wait for pages that are being written out
657 * and will wait whilst the PG_fscache mark is removed by the cache.
658 */
659static inline
660void fscache_uncache_all_inode_pages(struct fscache_cookie *cookie,
661 struct inode *inode)
662{
663 if (fscache_cookie_valid(cookie))
664 __fscache_uncache_all_inode_pages(cookie, inode);
665}
666
646#endif /* _LINUX_FSCACHE_H */ 667#endif /* _LINUX_FSCACHE_H */
diff --git a/include/linux/fsl-diu-fb.h b/include/linux/fsl-diu-fb.h
index 781d4671415f..daa9952d2174 100644
--- a/include/linux/fsl-diu-fb.h
+++ b/include/linux/fsl-diu-fb.h
@@ -24,12 +24,6 @@
24 * See mpc8610fb_set_par(), map_video_memory(), and unmap_video_memory() 24 * See mpc8610fb_set_par(), map_video_memory(), and unmap_video_memory()
25 */ 25 */
26#define MEM_ALLOC_THRESHOLD (1024*768*4+32) 26#define MEM_ALLOC_THRESHOLD (1024*768*4+32)
27/* Minimum value that the pixel clock can be set to in pico seconds
28 * This is determined by platform clock/3 where the minimum platform
29 * clock is 533MHz. This gives 5629 pico seconds.
30 */
31#define MIN_PIX_CLK 5629
32#define MAX_PIX_CLK 96096
33 27
34#include <linux/types.h> 28#include <linux/types.h>
35 29
diff --git a/include/linux/mfd/ds1wm.h b/include/linux/mfd/ds1wm.h
index be469a357cbb..38a372a0e285 100644
--- a/include/linux/mfd/ds1wm.h
+++ b/include/linux/mfd/ds1wm.h
@@ -3,4 +3,11 @@
3struct ds1wm_driver_data { 3struct ds1wm_driver_data {
4 int active_high; 4 int active_high;
5 int clock_rate; 5 int clock_rate;
6 /* in milliseconds, the amount of time to */
7 /* sleep following a reset pulse. Zero */
8 /* should work if your bus devices recover*/
9 /* time respects the 1-wire spec since the*/
10 /* ds1wm implements the precise timings of*/
11 /* a reset pulse/presence detect sequence.*/
12 unsigned int reset_recover_delay;
6}; 13};
diff --git a/include/linux/sched.h b/include/linux/sched.h
index a837b20ba190..496770a96487 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -808,7 +808,7 @@ enum cpu_idle_type {
808 * when BITS_PER_LONG <= 32 are pretty high and the returns do not justify the 808 * when BITS_PER_LONG <= 32 are pretty high and the returns do not justify the
809 * increased costs. 809 * increased costs.
810 */ 810 */
811#if BITS_PER_LONG > 32 811#if 0 /* BITS_PER_LONG > 32 -- currently broken: it increases power usage under light load */
812# define SCHED_LOAD_RESOLUTION 10 812# define SCHED_LOAD_RESOLUTION 10
813# define scale_load(w) ((w) << SCHED_LOAD_RESOLUTION) 813# define scale_load(w) ((w) << SCHED_LOAD_RESOLUTION)
814# define scale_load_down(w) ((w) >> SCHED_LOAD_RESOLUTION) 814# define scale_load_down(w) ((w) >> SCHED_LOAD_RESOLUTION)
diff --git a/include/media/lirc_dev.h b/include/media/lirc_dev.h
index 630e702c9511..168dd0b1bae2 100644
--- a/include/media/lirc_dev.h
+++ b/include/media/lirc_dev.h
@@ -9,7 +9,7 @@
9#ifndef _LINUX_LIRC_DEV_H 9#ifndef _LINUX_LIRC_DEV_H
10#define _LINUX_LIRC_DEV_H 10#define _LINUX_LIRC_DEV_H
11 11
12#define MAX_IRCTL_DEVICES 4 12#define MAX_IRCTL_DEVICES 8
13#define BUFLEN 16 13#define BUFLEN 16
14 14
15#define mod(n, div) ((n) % (div)) 15#define mod(n, div) ((n) % (div))
diff --git a/include/media/m5mols.h b/include/media/m5mols.h
index 2d7e7ca2313d..aac2c0e06d5e 100644
--- a/include/media/m5mols.h
+++ b/include/media/m5mols.h
@@ -2,10 +2,10 @@
2 * Driver header for M-5MOLS 8M Pixel camera sensor with ISP 2 * Driver header for M-5MOLS 8M Pixel camera sensor with ISP
3 * 3 *
4 * Copyright (C) 2011 Samsung Electronics Co., Ltd. 4 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
5 * Author: HeungJun Kim, riverful.kim@samsung.com 5 * Author: HeungJun Kim <riverful.kim@samsung.com>
6 * 6 *
7 * Copyright (C) 2009 Samsung Electronics Co., Ltd. 7 * Copyright (C) 2009 Samsung Electronics Co., Ltd.
8 * Author: Dongsoo Nathaniel Kim, dongsoo45.kim@samsung.com 8 * Author: Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h
index 1562c4ff3a65..2884e3e69cb1 100644
--- a/include/media/v4l2-subdev.h
+++ b/include/media/v4l2-subdev.h
@@ -173,16 +173,20 @@ struct v4l2_subdev_core_ops {
173 struct v4l2_event_subscription *sub); 173 struct v4l2_event_subscription *sub);
174}; 174};
175 175
176/* s_mode: switch the tuner to a specific tuner mode. Replacement of s_radio. 176/* s_radio: v4l device was opened in radio mode.
177 177
178 s_radio: v4l device was opened in Radio mode, to be replaced by s_mode. 178 g_frequency: freq->type must be filled in. Normally done by video_ioctl2
179 or the bridge driver.
180
181 g_tuner:
182 s_tuner: vt->type must be filled in. Normally done by video_ioctl2 or the
183 bridge driver.
179 184
180 s_type_addr: sets tuner type and its I2C addr. 185 s_type_addr: sets tuner type and its I2C addr.
181 186
182 s_config: sets tda9887 specific stuff, like port1, port2 and qss 187 s_config: sets tda9887 specific stuff, like port1, port2 and qss
183 */ 188 */
184struct v4l2_subdev_tuner_ops { 189struct v4l2_subdev_tuner_ops {
185 int (*s_mode)(struct v4l2_subdev *sd, enum v4l2_tuner_type);
186 int (*s_radio)(struct v4l2_subdev *sd); 190 int (*s_radio)(struct v4l2_subdev *sd);
187 int (*s_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq); 191 int (*s_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq);
188 int (*g_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq); 192 int (*g_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq);
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index 0589f554788a..396e8fc8910e 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -2688,7 +2688,7 @@ void cfg80211_send_unprot_disassoc(struct net_device *dev, const u8 *buf,
2688 * @dev: network device 2688 * @dev: network device
2689 * @addr: The source MAC address of the frame 2689 * @addr: The source MAC address of the frame
2690 * @key_type: The key type that the received frame used 2690 * @key_type: The key type that the received frame used
2691 * @key_id: Key identifier (0..3) 2691 * @key_id: Key identifier (0..3). Can be -1 if missing.
2692 * @tsc: The TSC value of the frame that generated the MIC failure (6 octets) 2692 * @tsc: The TSC value of the frame that generated the MIC failure (6 octets)
2693 * @gfp: allocation flags 2693 * @gfp: allocation flags
2694 * 2694 *
diff --git a/include/net/dst.h b/include/net/dst.h
index 7d15d238b6ec..e12ddfb9eb16 100644
--- a/include/net/dst.h
+++ b/include/net/dst.h
@@ -77,6 +77,7 @@ struct dst_entry {
77#define DST_NOPOLICY 0x0004 77#define DST_NOPOLICY 0x0004
78#define DST_NOHASH 0x0008 78#define DST_NOHASH 0x0008
79#define DST_NOCACHE 0x0010 79#define DST_NOCACHE 0x0010
80#define DST_NOCOUNT 0x0020
80 union { 81 union {
81 struct dst_entry *next; 82 struct dst_entry *next;
82 struct rtable __rcu *rt_next; 83 struct rtable __rcu *rt_next;
diff --git a/include/sound/sb16_csp.h b/include/sound/sb16_csp.h
index 736eac71d053..af1b49e982df 100644
--- a/include/sound/sb16_csp.h
+++ b/include/sound/sb16_csp.h
@@ -99,7 +99,14 @@ struct snd_sb_csp_info {
99/* get CSP information */ 99/* get CSP information */
100#define SNDRV_SB_CSP_IOCTL_INFO _IOR('H', 0x10, struct snd_sb_csp_info) 100#define SNDRV_SB_CSP_IOCTL_INFO _IOR('H', 0x10, struct snd_sb_csp_info)
101/* load microcode to CSP */ 101/* load microcode to CSP */
102#define SNDRV_SB_CSP_IOCTL_LOAD_CODE _IOW('H', 0x11, struct snd_sb_csp_microcode) 102/* NOTE: struct snd_sb_csp_microcode overflows the max size (13 bits)
103 * defined for some architectures like MIPS, and it leads to build errors.
104 * (x86 and co have 14-bit size, thus it's valid, though.)
105 * As a workaround for skipping the size-limit check, here we don't use the
106 * normal _IOW() macro but _IOC() with the manual argument.
107 */
108#define SNDRV_SB_CSP_IOCTL_LOAD_CODE \
109 _IOC(_IOC_WRITE, 'H', 0x11, sizeof(struct snd_sb_csp_microcode))
103/* unload microcode from CSP */ 110/* unload microcode from CSP */
104#define SNDRV_SB_CSP_IOCTL_UNLOAD_CODE _IO('H', 0x12) 111#define SNDRV_SB_CSP_IOCTL_UNLOAD_CODE _IO('H', 0x12)
105/* start CSP */ 112/* start CSP */
diff --git a/kernel/jump_label.c b/kernel/jump_label.c
index fa27e750dbc0..a8ce45097f3d 100644
--- a/kernel/jump_label.c
+++ b/kernel/jump_label.c
@@ -375,15 +375,19 @@ int jump_label_text_reserved(void *start, void *end)
375 375
376static void jump_label_update(struct jump_label_key *key, int enable) 376static void jump_label_update(struct jump_label_key *key, int enable)
377{ 377{
378 struct jump_entry *entry = key->entries; 378 struct jump_entry *entry = key->entries, *stop = __stop___jump_table;
379
380 /* if there are no users, entry can be NULL */
381 if (entry)
382 __jump_label_update(key, entry, __stop___jump_table, enable);
383 379
384#ifdef CONFIG_MODULES 380#ifdef CONFIG_MODULES
381 struct module *mod = __module_address((jump_label_t)key);
382
385 __jump_label_mod_update(key, enable); 383 __jump_label_mod_update(key, enable);
384
385 if (mod)
386 stop = mod->jump_entries + mod->num_jump_entries;
386#endif 387#endif
388 /* if there are no users, entry can be NULL */
389 if (entry)
390 __jump_label_update(key, entry, stop, enable);
387} 391}
388 392
389#endif 393#endif
diff --git a/kernel/power/snapshot.c b/kernel/power/snapshot.c
index ace55889f702..06efa54f93d6 100644
--- a/kernel/power/snapshot.c
+++ b/kernel/power/snapshot.c
@@ -1211,7 +1211,11 @@ static void free_unnecessary_pages(void)
1211 to_free_highmem = alloc_highmem - save; 1211 to_free_highmem = alloc_highmem - save;
1212 } else { 1212 } else {
1213 to_free_highmem = 0; 1213 to_free_highmem = 0;
1214 to_free_normal -= save - alloc_highmem; 1214 save -= alloc_highmem;
1215 if (to_free_normal > save)
1216 to_free_normal -= save;
1217 else
1218 to_free_normal = 0;
1215 } 1219 }
1216 1220
1217 memory_bm_position_reset(&copy_bm); 1221 memory_bm_position_reset(&copy_bm);
diff --git a/kernel/resource.c b/kernel/resource.c
index 798e2fae2a06..3ff40178dce7 100644
--- a/kernel/resource.c
+++ b/kernel/resource.c
@@ -38,6 +38,14 @@ struct resource iomem_resource = {
38}; 38};
39EXPORT_SYMBOL(iomem_resource); 39EXPORT_SYMBOL(iomem_resource);
40 40
41/* constraints to be met while allocating resources */
42struct resource_constraint {
43 resource_size_t min, max, align;
44 resource_size_t (*alignf)(void *, const struct resource *,
45 resource_size_t, resource_size_t);
46 void *alignf_data;
47};
48
41static DEFINE_RWLOCK(resource_lock); 49static DEFINE_RWLOCK(resource_lock);
42 50
43static void *r_next(struct seq_file *m, void *v, loff_t *pos) 51static void *r_next(struct seq_file *m, void *v, loff_t *pos)
@@ -384,16 +392,13 @@ static bool resource_contains(struct resource *res1, struct resource *res2)
384} 392}
385 393
386/* 394/*
387 * Find empty slot in the resource tree given range and alignment. 395 * Find empty slot in the resource tree with the given range and
396 * alignment constraints
388 */ 397 */
389static int find_resource(struct resource *root, struct resource *new, 398static int __find_resource(struct resource *root, struct resource *old,
390 resource_size_t size, resource_size_t min, 399 struct resource *new,
391 resource_size_t max, resource_size_t align, 400 resource_size_t size,
392 resource_size_t (*alignf)(void *, 401 struct resource_constraint *constraint)
393 const struct resource *,
394 resource_size_t,
395 resource_size_t),
396 void *alignf_data)
397{ 402{
398 struct resource *this = root->child; 403 struct resource *this = root->child;
399 struct resource tmp = *new, avail, alloc; 404 struct resource tmp = *new, avail, alloc;
@@ -404,25 +409,26 @@ static int find_resource(struct resource *root, struct resource *new,
404 * Skip past an allocated resource that starts at 0, since the assignment 409 * Skip past an allocated resource that starts at 0, since the assignment
405 * of this->start - 1 to tmp->end below would cause an underflow. 410 * of this->start - 1 to tmp->end below would cause an underflow.
406 */ 411 */
407 if (this && this->start == 0) { 412 if (this && this->start == root->start) {
408 tmp.start = this->end + 1; 413 tmp.start = (this == old) ? old->start : this->end + 1;
409 this = this->sibling; 414 this = this->sibling;
410 } 415 }
411 for(;;) { 416 for(;;) {
412 if (this) 417 if (this)
413 tmp.end = this->start - 1; 418 tmp.end = (this == old) ? this->end : this->start - 1;
414 else 419 else
415 tmp.end = root->end; 420 tmp.end = root->end;
416 421
417 resource_clip(&tmp, min, max); 422 resource_clip(&tmp, constraint->min, constraint->max);
418 arch_remove_reservations(&tmp); 423 arch_remove_reservations(&tmp);
419 424
420 /* Check for overflow after ALIGN() */ 425 /* Check for overflow after ALIGN() */
421 avail = *new; 426 avail = *new;
422 avail.start = ALIGN(tmp.start, align); 427 avail.start = ALIGN(tmp.start, constraint->align);
423 avail.end = tmp.end; 428 avail.end = tmp.end;
424 if (avail.start >= tmp.start) { 429 if (avail.start >= tmp.start) {
425 alloc.start = alignf(alignf_data, &avail, size, align); 430 alloc.start = constraint->alignf(constraint->alignf_data, &avail,
431 size, constraint->align);
426 alloc.end = alloc.start + size - 1; 432 alloc.end = alloc.start + size - 1;
427 if (resource_contains(&avail, &alloc)) { 433 if (resource_contains(&avail, &alloc)) {
428 new->start = alloc.start; 434 new->start = alloc.start;
@@ -432,14 +438,75 @@ static int find_resource(struct resource *root, struct resource *new,
432 } 438 }
433 if (!this) 439 if (!this)
434 break; 440 break;
435 tmp.start = this->end + 1; 441 if (this != old)
442 tmp.start = this->end + 1;
436 this = this->sibling; 443 this = this->sibling;
437 } 444 }
438 return -EBUSY; 445 return -EBUSY;
439} 446}
440 447
448/*
449 * Find empty slot in the resource tree given range and alignment.
450 */
451static int find_resource(struct resource *root, struct resource *new,
452 resource_size_t size,
453 struct resource_constraint *constraint)
454{
455 return __find_resource(root, NULL, new, size, constraint);
456}
457
441/** 458/**
442 * allocate_resource - allocate empty slot in the resource tree given range & alignment 459 * reallocate_resource - allocate a slot in the resource tree given range & alignment.
460 * The resource will be relocated if the new size cannot be reallocated in the
461 * current location.
462 *
463 * @root: root resource descriptor
464 * @old: resource descriptor desired by caller
465 * @newsize: new size of the resource descriptor
466 * @constraint: the size and alignment constraints to be met.
467 */
468int reallocate_resource(struct resource *root, struct resource *old,
469 resource_size_t newsize,
470 struct resource_constraint *constraint)
471{
472 int err=0;
473 struct resource new = *old;
474 struct resource *conflict;
475
476 write_lock(&resource_lock);
477
478 if ((err = __find_resource(root, old, &new, newsize, constraint)))
479 goto out;
480
481 if (resource_contains(&new, old)) {
482 old->start = new.start;
483 old->end = new.end;
484 goto out;
485 }
486
487 if (old->child) {
488 err = -EBUSY;
489 goto out;
490 }
491
492 if (resource_contains(old, &new)) {
493 old->start = new.start;
494 old->end = new.end;
495 } else {
496 __release_resource(old);
497 *old = new;
498 conflict = __request_resource(root, old);
499 BUG_ON(conflict);
500 }
501out:
502 write_unlock(&resource_lock);
503 return err;
504}
505
506
507/**
508 * allocate_resource - allocate empty slot in the resource tree given range & alignment.
509 * The resource will be reallocated with a new size if it was already allocated
443 * @root: root resource descriptor 510 * @root: root resource descriptor
444 * @new: resource descriptor desired by caller 511 * @new: resource descriptor desired by caller
445 * @size: requested resource region size 512 * @size: requested resource region size
@@ -459,12 +526,25 @@ int allocate_resource(struct resource *root, struct resource *new,
459 void *alignf_data) 526 void *alignf_data)
460{ 527{
461 int err; 528 int err;
529 struct resource_constraint constraint;
462 530
463 if (!alignf) 531 if (!alignf)
464 alignf = simple_align_resource; 532 alignf = simple_align_resource;
465 533
534 constraint.min = min;
535 constraint.max = max;
536 constraint.align = align;
537 constraint.alignf = alignf;
538 constraint.alignf_data = alignf_data;
539
540 if ( new->parent ) {
541 /* resource is already allocated, try reallocating with
542 the new constraints */
543 return reallocate_resource(root, new, size, &constraint);
544 }
545
466 write_lock(&resource_lock); 546 write_lock(&resource_lock);
467 err = find_resource(root, new, size, min, max, align, alignf, alignf_data); 547 err = find_resource(root, new, size, &constraint);
468 if (err >= 0 && __request_resource(root, new)) 548 if (err >= 0 && __request_resource(root, new))
469 err = -EBUSY; 549 err = -EBUSY;
470 write_unlock(&resource_lock); 550 write_unlock(&resource_lock);
diff --git a/kernel/sched.c b/kernel/sched.c
index 3f2e502d609b..9769c756ad66 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -292,8 +292,8 @@ static DEFINE_SPINLOCK(task_group_lock);
292 * (The default weight is 1024 - so there's no practical 292 * (The default weight is 1024 - so there's no practical
293 * limitation from this.) 293 * limitation from this.)
294 */ 294 */
295#define MIN_SHARES 2 295#define MIN_SHARES (1UL << 1)
296#define MAX_SHARES (1UL << (18 + SCHED_LOAD_RESOLUTION)) 296#define MAX_SHARES (1UL << 18)
297 297
298static int root_task_group_load = ROOT_TASK_GROUP_LOAD; 298static int root_task_group_load = ROOT_TASK_GROUP_LOAD;
299#endif 299#endif
@@ -8450,10 +8450,7 @@ int sched_group_set_shares(struct task_group *tg, unsigned long shares)
8450 if (!tg->se[0]) 8450 if (!tg->se[0])
8451 return -EINVAL; 8451 return -EINVAL;
8452 8452
8453 if (shares < MIN_SHARES) 8453 shares = clamp(shares, scale_load(MIN_SHARES), scale_load(MAX_SHARES));
8454 shares = MIN_SHARES;
8455 else if (shares > MAX_SHARES)
8456 shares = MAX_SHARES;
8457 8454
8458 mutex_lock(&shares_mutex); 8455 mutex_lock(&shares_mutex);
8459 if (tg->shares == shares) 8456 if (tg->shares == shares)
diff --git a/lib/debugobjects.c b/lib/debugobjects.c
index 9d86e45086f5..a78b7c6e042c 100644
--- a/lib/debugobjects.c
+++ b/lib/debugobjects.c
@@ -198,7 +198,7 @@ static void free_object(struct debug_obj *obj)
198 * initialized: 198 * initialized:
199 */ 199 */
200 if (obj_pool_free > ODEBUG_POOL_SIZE && obj_cache) 200 if (obj_pool_free > ODEBUG_POOL_SIZE && obj_cache)
201 sched = !work_pending(&debug_obj_work); 201 sched = keventd_up() && !work_pending(&debug_obj_work);
202 hlist_add_head(&obj->node, &obj_pool); 202 hlist_add_head(&obj->node, &obj_pool);
203 obj_pool_free++; 203 obj_pool_free++;
204 obj_pool_used--; 204 obj_pool_used--;
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index ddffc74cdebe..e013b8e57d25 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -108,10 +108,12 @@ enum mem_cgroup_events_index {
108enum mem_cgroup_events_target { 108enum mem_cgroup_events_target {
109 MEM_CGROUP_TARGET_THRESH, 109 MEM_CGROUP_TARGET_THRESH,
110 MEM_CGROUP_TARGET_SOFTLIMIT, 110 MEM_CGROUP_TARGET_SOFTLIMIT,
111 MEM_CGROUP_TARGET_NUMAINFO,
111 MEM_CGROUP_NTARGETS, 112 MEM_CGROUP_NTARGETS,
112}; 113};
113#define THRESHOLDS_EVENTS_TARGET (128) 114#define THRESHOLDS_EVENTS_TARGET (128)
114#define SOFTLIMIT_EVENTS_TARGET (1024) 115#define SOFTLIMIT_EVENTS_TARGET (1024)
116#define NUMAINFO_EVENTS_TARGET (1024)
115 117
116struct mem_cgroup_stat_cpu { 118struct mem_cgroup_stat_cpu {
117 long count[MEM_CGROUP_STAT_NSTATS]; 119 long count[MEM_CGROUP_STAT_NSTATS];
@@ -237,7 +239,8 @@ struct mem_cgroup {
237 int last_scanned_node; 239 int last_scanned_node;
238#if MAX_NUMNODES > 1 240#if MAX_NUMNODES > 1
239 nodemask_t scan_nodes; 241 nodemask_t scan_nodes;
240 unsigned long next_scan_node_update; 242 atomic_t numainfo_events;
243 atomic_t numainfo_updating;
241#endif 244#endif
242 /* 245 /*
243 * Should the accounting and control be hierarchical, per subtree? 246 * Should the accounting and control be hierarchical, per subtree?
@@ -577,15 +580,6 @@ static long mem_cgroup_read_stat(struct mem_cgroup *mem,
577 return val; 580 return val;
578} 581}
579 582
580static long mem_cgroup_local_usage(struct mem_cgroup *mem)
581{
582 long ret;
583
584 ret = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_RSS);
585 ret += mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_CACHE);
586 return ret;
587}
588
589static void mem_cgroup_swap_statistics(struct mem_cgroup *mem, 583static void mem_cgroup_swap_statistics(struct mem_cgroup *mem,
590 bool charge) 584 bool charge)
591{ 585{
@@ -689,6 +683,9 @@ static void __mem_cgroup_target_update(struct mem_cgroup *mem, int target)
689 case MEM_CGROUP_TARGET_SOFTLIMIT: 683 case MEM_CGROUP_TARGET_SOFTLIMIT:
690 next = val + SOFTLIMIT_EVENTS_TARGET; 684 next = val + SOFTLIMIT_EVENTS_TARGET;
691 break; 685 break;
686 case MEM_CGROUP_TARGET_NUMAINFO:
687 next = val + NUMAINFO_EVENTS_TARGET;
688 break;
692 default: 689 default:
693 return; 690 return;
694 } 691 }
@@ -707,11 +704,19 @@ static void memcg_check_events(struct mem_cgroup *mem, struct page *page)
707 mem_cgroup_threshold(mem); 704 mem_cgroup_threshold(mem);
708 __mem_cgroup_target_update(mem, MEM_CGROUP_TARGET_THRESH); 705 __mem_cgroup_target_update(mem, MEM_CGROUP_TARGET_THRESH);
709 if (unlikely(__memcg_event_check(mem, 706 if (unlikely(__memcg_event_check(mem,
710 MEM_CGROUP_TARGET_SOFTLIMIT))){ 707 MEM_CGROUP_TARGET_SOFTLIMIT))) {
711 mem_cgroup_update_tree(mem, page); 708 mem_cgroup_update_tree(mem, page);
712 __mem_cgroup_target_update(mem, 709 __mem_cgroup_target_update(mem,
713 MEM_CGROUP_TARGET_SOFTLIMIT); 710 MEM_CGROUP_TARGET_SOFTLIMIT);
711 }
712#if MAX_NUMNODES > 1
713 if (unlikely(__memcg_event_check(mem,
714 MEM_CGROUP_TARGET_NUMAINFO))) {
715 atomic_inc(&mem->numainfo_events);
716 __mem_cgroup_target_update(mem,
717 MEM_CGROUP_TARGET_NUMAINFO);
714 } 718 }
719#endif
715 } 720 }
716} 721}
717 722
@@ -1129,7 +1134,6 @@ unsigned long mem_cgroup_zone_nr_lru_pages(struct mem_cgroup *memcg,
1129 return MEM_CGROUP_ZSTAT(mz, lru); 1134 return MEM_CGROUP_ZSTAT(mz, lru);
1130} 1135}
1131 1136
1132#ifdef CONFIG_NUMA
1133static unsigned long mem_cgroup_node_nr_file_lru_pages(struct mem_cgroup *memcg, 1137static unsigned long mem_cgroup_node_nr_file_lru_pages(struct mem_cgroup *memcg,
1134 int nid) 1138 int nid)
1135{ 1139{
@@ -1141,6 +1145,17 @@ static unsigned long mem_cgroup_node_nr_file_lru_pages(struct mem_cgroup *memcg,
1141 return ret; 1145 return ret;
1142} 1146}
1143 1147
1148static unsigned long mem_cgroup_node_nr_anon_lru_pages(struct mem_cgroup *memcg,
1149 int nid)
1150{
1151 unsigned long ret;
1152
1153 ret = mem_cgroup_get_zonestat_node(memcg, nid, LRU_INACTIVE_ANON) +
1154 mem_cgroup_get_zonestat_node(memcg, nid, LRU_ACTIVE_ANON);
1155 return ret;
1156}
1157
1158#if MAX_NUMNODES > 1
1144static unsigned long mem_cgroup_nr_file_lru_pages(struct mem_cgroup *memcg) 1159static unsigned long mem_cgroup_nr_file_lru_pages(struct mem_cgroup *memcg)
1145{ 1160{
1146 u64 total = 0; 1161 u64 total = 0;
@@ -1152,17 +1167,6 @@ static unsigned long mem_cgroup_nr_file_lru_pages(struct mem_cgroup *memcg)
1152 return total; 1167 return total;
1153} 1168}
1154 1169
1155static unsigned long mem_cgroup_node_nr_anon_lru_pages(struct mem_cgroup *memcg,
1156 int nid)
1157{
1158 unsigned long ret;
1159
1160 ret = mem_cgroup_get_zonestat_node(memcg, nid, LRU_INACTIVE_ANON) +
1161 mem_cgroup_get_zonestat_node(memcg, nid, LRU_ACTIVE_ANON);
1162
1163 return ret;
1164}
1165
1166static unsigned long mem_cgroup_nr_anon_lru_pages(struct mem_cgroup *memcg) 1170static unsigned long mem_cgroup_nr_anon_lru_pages(struct mem_cgroup *memcg)
1167{ 1171{
1168 u64 total = 0; 1172 u64 total = 0;
@@ -1559,6 +1563,28 @@ mem_cgroup_select_victim(struct mem_cgroup *root_mem)
1559 return ret; 1563 return ret;
1560} 1564}
1561 1565
1566/**
1567 * test_mem_cgroup_node_reclaimable
1568 * @mem: the target memcg
1569 * @nid: the node ID to be checked.
1570 * @noswap : specify true here if the user wants flle only information.
1571 *
1572 * This function returns whether the specified memcg contains any
1573 * reclaimable pages on a node. Returns true if there are any reclaimable
1574 * pages in the node.
1575 */
1576static bool test_mem_cgroup_node_reclaimable(struct mem_cgroup *mem,
1577 int nid, bool noswap)
1578{
1579 if (mem_cgroup_node_nr_file_lru_pages(mem, nid))
1580 return true;
1581 if (noswap || !total_swap_pages)
1582 return false;
1583 if (mem_cgroup_node_nr_anon_lru_pages(mem, nid))
1584 return true;
1585 return false;
1586
1587}
1562#if MAX_NUMNODES > 1 1588#if MAX_NUMNODES > 1
1563 1589
1564/* 1590/*
@@ -1570,26 +1596,26 @@ mem_cgroup_select_victim(struct mem_cgroup *root_mem)
1570static void mem_cgroup_may_update_nodemask(struct mem_cgroup *mem) 1596static void mem_cgroup_may_update_nodemask(struct mem_cgroup *mem)
1571{ 1597{
1572 int nid; 1598 int nid;
1573 1599 /*
1574 if (time_after(mem->next_scan_node_update, jiffies)) 1600 * numainfo_events > 0 means there was at least NUMAINFO_EVENTS_TARGET
1601 * pagein/pageout changes since the last update.
1602 */
1603 if (!atomic_read(&mem->numainfo_events))
1604 return;
1605 if (atomic_inc_return(&mem->numainfo_updating) > 1)
1575 return; 1606 return;
1576 1607
1577 mem->next_scan_node_update = jiffies + 10*HZ;
1578 /* make a nodemask where this memcg uses memory from */ 1608 /* make a nodemask where this memcg uses memory from */
1579 mem->scan_nodes = node_states[N_HIGH_MEMORY]; 1609 mem->scan_nodes = node_states[N_HIGH_MEMORY];
1580 1610
1581 for_each_node_mask(nid, node_states[N_HIGH_MEMORY]) { 1611 for_each_node_mask(nid, node_states[N_HIGH_MEMORY]) {
1582 1612
1583 if (mem_cgroup_get_zonestat_node(mem, nid, LRU_INACTIVE_FILE) || 1613 if (!test_mem_cgroup_node_reclaimable(mem, nid, false))
1584 mem_cgroup_get_zonestat_node(mem, nid, LRU_ACTIVE_FILE)) 1614 node_clear(nid, mem->scan_nodes);
1585 continue;
1586
1587 if (total_swap_pages &&
1588 (mem_cgroup_get_zonestat_node(mem, nid, LRU_INACTIVE_ANON) ||
1589 mem_cgroup_get_zonestat_node(mem, nid, LRU_ACTIVE_ANON)))
1590 continue;
1591 node_clear(nid, mem->scan_nodes);
1592 } 1615 }
1616
1617 atomic_set(&mem->numainfo_events, 0);
1618 atomic_set(&mem->numainfo_updating, 0);
1593} 1619}
1594 1620
1595/* 1621/*
@@ -1627,11 +1653,51 @@ int mem_cgroup_select_victim_node(struct mem_cgroup *mem)
1627 return node; 1653 return node;
1628} 1654}
1629 1655
1656/*
1657 * Check all nodes whether it contains reclaimable pages or not.
1658 * For quick scan, we make use of scan_nodes. This will allow us to skip
1659 * unused nodes. But scan_nodes is lazily updated and may not cotain
1660 * enough new information. We need to do double check.
1661 */
1662bool mem_cgroup_reclaimable(struct mem_cgroup *mem, bool noswap)
1663{
1664 int nid;
1665
1666 /*
1667 * quick check...making use of scan_node.
1668 * We can skip unused nodes.
1669 */
1670 if (!nodes_empty(mem->scan_nodes)) {
1671 for (nid = first_node(mem->scan_nodes);
1672 nid < MAX_NUMNODES;
1673 nid = next_node(nid, mem->scan_nodes)) {
1674
1675 if (test_mem_cgroup_node_reclaimable(mem, nid, noswap))
1676 return true;
1677 }
1678 }
1679 /*
1680 * Check rest of nodes.
1681 */
1682 for_each_node_state(nid, N_HIGH_MEMORY) {
1683 if (node_isset(nid, mem->scan_nodes))
1684 continue;
1685 if (test_mem_cgroup_node_reclaimable(mem, nid, noswap))
1686 return true;
1687 }
1688 return false;
1689}
1690
1630#else 1691#else
1631int mem_cgroup_select_victim_node(struct mem_cgroup *mem) 1692int mem_cgroup_select_victim_node(struct mem_cgroup *mem)
1632{ 1693{
1633 return 0; 1694 return 0;
1634} 1695}
1696
1697bool mem_cgroup_reclaimable(struct mem_cgroup *mem, bool noswap)
1698{
1699 return test_mem_cgroup_node_reclaimable(mem, 0, noswap);
1700}
1635#endif 1701#endif
1636 1702
1637/* 1703/*
@@ -1702,7 +1768,7 @@ static int mem_cgroup_hierarchical_reclaim(struct mem_cgroup *root_mem,
1702 } 1768 }
1703 } 1769 }
1704 } 1770 }
1705 if (!mem_cgroup_local_usage(victim)) { 1771 if (!mem_cgroup_reclaimable(victim, noswap)) {
1706 /* this cgroup's local usage == 0 */ 1772 /* this cgroup's local usage == 0 */
1707 css_put(&victim->css); 1773 css_put(&victim->css);
1708 continue; 1774 continue;
diff --git a/mm/memory.c b/mm/memory.c
index 40b7531ee8ba..9b8a01d941cb 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -305,6 +305,7 @@ int __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
305 if (batch->nr == batch->max) { 305 if (batch->nr == batch->max) {
306 if (!tlb_next_batch(tlb)) 306 if (!tlb_next_batch(tlb))
307 return 0; 307 return 0;
308 batch = tlb->active;
308 } 309 }
309 VM_BUG_ON(batch->nr > batch->max); 310 VM_BUG_ON(batch->nr > batch->max);
310 311
diff --git a/mm/nommu.c b/mm/nommu.c
index 1fd0c51b10a6..9edc897a3970 100644
--- a/mm/nommu.c
+++ b/mm/nommu.c
@@ -1813,10 +1813,13 @@ struct page *follow_page(struct vm_area_struct *vma, unsigned long address,
1813 return NULL; 1813 return NULL;
1814} 1814}
1815 1815
1816int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, 1816int remap_pfn_range(struct vm_area_struct *vma, unsigned long addr,
1817 unsigned long to, unsigned long size, pgprot_t prot) 1817 unsigned long pfn, unsigned long size, pgprot_t prot)
1818{ 1818{
1819 vma->vm_start = vma->vm_pgoff << PAGE_SHIFT; 1819 if (addr != (pfn << PAGE_SHIFT))
1820 return -EINVAL;
1821
1822 vma->vm_flags |= VM_IO | VM_RESERVED | VM_PFNMAP;
1820 return 0; 1823 return 0;
1821} 1824}
1822EXPORT_SYMBOL(remap_pfn_range); 1825EXPORT_SYMBOL(remap_pfn_range);
diff --git a/mm/vmscan.c b/mm/vmscan.c
index 4f49535d4cd3..5ed24b94c5e6 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -2326,7 +2326,7 @@ static bool sleeping_prematurely(pg_data_t *pgdat, int order, long remaining,
2326 return true; 2326 return true;
2327 2327
2328 /* Check the watermark levels */ 2328 /* Check the watermark levels */
2329 for (i = 0; i < pgdat->nr_zones; i++) { 2329 for (i = 0; i <= classzone_idx; i++) {
2330 struct zone *zone = pgdat->node_zones + i; 2330 struct zone *zone = pgdat->node_zones + i;
2331 2331
2332 if (!populated_zone(zone)) 2332 if (!populated_zone(zone))
@@ -2344,7 +2344,7 @@ static bool sleeping_prematurely(pg_data_t *pgdat, int order, long remaining,
2344 } 2344 }
2345 2345
2346 if (!zone_watermark_ok_safe(zone, order, high_wmark_pages(zone), 2346 if (!zone_watermark_ok_safe(zone, order, high_wmark_pages(zone),
2347 classzone_idx, 0)) 2347 i, 0))
2348 all_zones_ok = false; 2348 all_zones_ok = false;
2349 else 2349 else
2350 balanced += zone->present_pages; 2350 balanced += zone->present_pages;
@@ -2451,7 +2451,6 @@ loop_again:
2451 if (!zone_watermark_ok_safe(zone, order, 2451 if (!zone_watermark_ok_safe(zone, order,
2452 high_wmark_pages(zone), 0, 0)) { 2452 high_wmark_pages(zone), 0, 0)) {
2453 end_zone = i; 2453 end_zone = i;
2454 *classzone_idx = i;
2455 break; 2454 break;
2456 } 2455 }
2457 } 2456 }
@@ -2510,18 +2509,18 @@ loop_again:
2510 KSWAPD_ZONE_BALANCE_GAP_RATIO); 2509 KSWAPD_ZONE_BALANCE_GAP_RATIO);
2511 if (!zone_watermark_ok_safe(zone, order, 2510 if (!zone_watermark_ok_safe(zone, order,
2512 high_wmark_pages(zone) + balance_gap, 2511 high_wmark_pages(zone) + balance_gap,
2513 end_zone, 0)) 2512 end_zone, 0)) {
2514 shrink_zone(priority, zone, &sc); 2513 shrink_zone(priority, zone, &sc);
2515 reclaim_state->reclaimed_slab = 0;
2516 nr_slab = shrink_slab(&shrink, sc.nr_scanned, lru_pages);
2517 sc.nr_reclaimed += reclaim_state->reclaimed_slab;
2518 total_scanned += sc.nr_scanned;
2519 2514
2520 if (zone->all_unreclaimable) 2515 reclaim_state->reclaimed_slab = 0;
2521 continue; 2516 nr_slab = shrink_slab(&shrink, sc.nr_scanned, lru_pages);
2522 if (nr_slab == 0 && 2517 sc.nr_reclaimed += reclaim_state->reclaimed_slab;
2523 !zone_reclaimable(zone)) 2518 total_scanned += sc.nr_scanned;
2524 zone->all_unreclaimable = 1; 2519
2520 if (nr_slab == 0 && !zone_reclaimable(zone))
2521 zone->all_unreclaimable = 1;
2522 }
2523
2525 /* 2524 /*
2526 * If we've done a decent amount of scanning and 2525 * If we've done a decent amount of scanning and
2527 * the reclaim ratio is low, start doing writepage 2526 * the reclaim ratio is low, start doing writepage
@@ -2531,6 +2530,12 @@ loop_again:
2531 total_scanned > sc.nr_reclaimed + sc.nr_reclaimed / 2) 2530 total_scanned > sc.nr_reclaimed + sc.nr_reclaimed / 2)
2532 sc.may_writepage = 1; 2531 sc.may_writepage = 1;
2533 2532
2533 if (zone->all_unreclaimable) {
2534 if (end_zone && end_zone == i)
2535 end_zone--;
2536 continue;
2537 }
2538
2534 if (!zone_watermark_ok_safe(zone, order, 2539 if (!zone_watermark_ok_safe(zone, order,
2535 high_wmark_pages(zone), end_zone, 0)) { 2540 high_wmark_pages(zone), end_zone, 0)) {
2536 all_zones_ok = 0; 2541 all_zones_ok = 0;
@@ -2709,8 +2714,8 @@ static void kswapd_try_to_sleep(pg_data_t *pgdat, int order, int classzone_idx)
2709 */ 2714 */
2710static int kswapd(void *p) 2715static int kswapd(void *p)
2711{ 2716{
2712 unsigned long order; 2717 unsigned long order, new_order;
2713 int classzone_idx; 2718 int classzone_idx, new_classzone_idx;
2714 pg_data_t *pgdat = (pg_data_t*)p; 2719 pg_data_t *pgdat = (pg_data_t*)p;
2715 struct task_struct *tsk = current; 2720 struct task_struct *tsk = current;
2716 2721
@@ -2740,17 +2745,23 @@ static int kswapd(void *p)
2740 tsk->flags |= PF_MEMALLOC | PF_SWAPWRITE | PF_KSWAPD; 2745 tsk->flags |= PF_MEMALLOC | PF_SWAPWRITE | PF_KSWAPD;
2741 set_freezable(); 2746 set_freezable();
2742 2747
2743 order = 0; 2748 order = new_order = 0;
2744 classzone_idx = MAX_NR_ZONES - 1; 2749 classzone_idx = new_classzone_idx = pgdat->nr_zones - 1;
2745 for ( ; ; ) { 2750 for ( ; ; ) {
2746 unsigned long new_order;
2747 int new_classzone_idx;
2748 int ret; 2751 int ret;
2749 2752
2750 new_order = pgdat->kswapd_max_order; 2753 /*
2751 new_classzone_idx = pgdat->classzone_idx; 2754 * If the last balance_pgdat was unsuccessful it's unlikely a
2752 pgdat->kswapd_max_order = 0; 2755 * new request of a similar or harder type will succeed soon
2753 pgdat->classzone_idx = MAX_NR_ZONES - 1; 2756 * so consider going to sleep on the basis we reclaimed at
2757 */
2758 if (classzone_idx >= new_classzone_idx && order == new_order) {
2759 new_order = pgdat->kswapd_max_order;
2760 new_classzone_idx = pgdat->classzone_idx;
2761 pgdat->kswapd_max_order = 0;
2762 pgdat->classzone_idx = pgdat->nr_zones - 1;
2763 }
2764
2754 if (order < new_order || classzone_idx > new_classzone_idx) { 2765 if (order < new_order || classzone_idx > new_classzone_idx) {
2755 /* 2766 /*
2756 * Don't sleep if someone wants a larger 'order' 2767 * Don't sleep if someone wants a larger 'order'
@@ -2763,7 +2774,7 @@ static int kswapd(void *p)
2763 order = pgdat->kswapd_max_order; 2774 order = pgdat->kswapd_max_order;
2764 classzone_idx = pgdat->classzone_idx; 2775 classzone_idx = pgdat->classzone_idx;
2765 pgdat->kswapd_max_order = 0; 2776 pgdat->kswapd_max_order = 0;
2766 pgdat->classzone_idx = MAX_NR_ZONES - 1; 2777 pgdat->classzone_idx = pgdat->nr_zones - 1;
2767 } 2778 }
2768 2779
2769 ret = try_to_freeze(); 2780 ret = try_to_freeze();
diff --git a/net/8021q/vlan_dev.c b/net/8021q/vlan_dev.c
index 7ea5cf9ea08a..86bff9b1ac47 100644
--- a/net/8021q/vlan_dev.c
+++ b/net/8021q/vlan_dev.c
@@ -586,9 +586,14 @@ static void vlan_dev_uninit(struct net_device *dev)
586static u32 vlan_dev_fix_features(struct net_device *dev, u32 features) 586static u32 vlan_dev_fix_features(struct net_device *dev, u32 features)
587{ 587{
588 struct net_device *real_dev = vlan_dev_info(dev)->real_dev; 588 struct net_device *real_dev = vlan_dev_info(dev)->real_dev;
589 u32 old_features = features;
589 590
590 features &= real_dev->features; 591 features &= real_dev->features;
591 features &= real_dev->vlan_features; 592 features &= real_dev->vlan_features;
593
594 if (old_features & NETIF_F_SOFT_FEATURES)
595 features |= old_features & NETIF_F_SOFT_FEATURES;
596
592 if (dev_ethtool_get_rx_csum(real_dev)) 597 if (dev_ethtool_get_rx_csum(real_dev))
593 features |= NETIF_F_RXCSUM; 598 features |= NETIF_F_RXCSUM;
594 features |= NETIF_F_LLTX; 599 features |= NETIF_F_LLTX;
diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c
index 3163330cd4f1..d3a05b9ade7a 100644
--- a/net/bluetooth/hci_conn.c
+++ b/net/bluetooth/hci_conn.c
@@ -608,11 +608,11 @@ int hci_conn_security(struct hci_conn *conn, __u8 sec_level, __u8 auth_type)
608 goto encrypt; 608 goto encrypt;
609 609
610auth: 610auth:
611 if (test_and_set_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend)) 611 if (test_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend))
612 return 0; 612 return 0;
613 613
614 hci_conn_auth(conn, sec_level, auth_type); 614 if (!hci_conn_auth(conn, sec_level, auth_type))
615 return 0; 615 return 0;
616 616
617encrypt: 617encrypt:
618 if (conn->link_mode & HCI_LM_ENCRYPT) 618 if (conn->link_mode & HCI_LM_ENCRYPT)
diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
index e64a1c2df238..56fdd9162da9 100644
--- a/net/bluetooth/l2cap_core.c
+++ b/net/bluetooth/l2cap_core.c
@@ -4002,21 +4002,30 @@ static int l2cap_security_cfm(struct hci_conn *hcon, u8 status, u8 encrypt)
4002 } 4002 }
4003 } else if (sk->sk_state == BT_CONNECT2) { 4003 } else if (sk->sk_state == BT_CONNECT2) {
4004 struct l2cap_conn_rsp rsp; 4004 struct l2cap_conn_rsp rsp;
4005 __u16 result; 4005 __u16 res, stat;
4006 4006
4007 if (!status) { 4007 if (!status) {
4008 sk->sk_state = BT_CONFIG; 4008 if (bt_sk(sk)->defer_setup) {
4009 result = L2CAP_CR_SUCCESS; 4009 struct sock *parent = bt_sk(sk)->parent;
4010 res = L2CAP_CR_PEND;
4011 stat = L2CAP_CS_AUTHOR_PEND;
4012 parent->sk_data_ready(parent, 0);
4013 } else {
4014 sk->sk_state = BT_CONFIG;
4015 res = L2CAP_CR_SUCCESS;
4016 stat = L2CAP_CS_NO_INFO;
4017 }
4010 } else { 4018 } else {
4011 sk->sk_state = BT_DISCONN; 4019 sk->sk_state = BT_DISCONN;
4012 l2cap_sock_set_timer(sk, HZ / 10); 4020 l2cap_sock_set_timer(sk, HZ / 10);
4013 result = L2CAP_CR_SEC_BLOCK; 4021 res = L2CAP_CR_SEC_BLOCK;
4022 stat = L2CAP_CS_NO_INFO;
4014 } 4023 }
4015 4024
4016 rsp.scid = cpu_to_le16(chan->dcid); 4025 rsp.scid = cpu_to_le16(chan->dcid);
4017 rsp.dcid = cpu_to_le16(chan->scid); 4026 rsp.dcid = cpu_to_le16(chan->scid);
4018 rsp.result = cpu_to_le16(result); 4027 rsp.result = cpu_to_le16(res);
4019 rsp.status = cpu_to_le16(L2CAP_CS_NO_INFO); 4028 rsp.status = cpu_to_le16(stat);
4020 l2cap_send_cmd(conn, chan->ident, L2CAP_CONN_RSP, 4029 l2cap_send_cmd(conn, chan->ident, L2CAP_CONN_RSP,
4021 sizeof(rsp), &rsp); 4030 sizeof(rsp), &rsp);
4022 } 4031 }
diff --git a/net/bridge/br_device.c b/net/bridge/br_device.c
index c188c803c09c..32b8f9f7f79e 100644
--- a/net/bridge/br_device.c
+++ b/net/bridge/br_device.c
@@ -49,7 +49,9 @@ netdev_tx_t br_dev_xmit(struct sk_buff *skb, struct net_device *dev)
49 skb_pull(skb, ETH_HLEN); 49 skb_pull(skb, ETH_HLEN);
50 50
51 rcu_read_lock(); 51 rcu_read_lock();
52 if (is_multicast_ether_addr(dest)) { 52 if (is_broadcast_ether_addr(dest))
53 br_flood_deliver(br, skb);
54 else if (is_multicast_ether_addr(dest)) {
53 if (unlikely(netpoll_tx_running(dev))) { 55 if (unlikely(netpoll_tx_running(dev))) {
54 br_flood_deliver(br, skb); 56 br_flood_deliver(br, skb);
55 goto out; 57 goto out;
diff --git a/net/bridge/br_input.c b/net/bridge/br_input.c
index f3ac1e858ee1..f06ee39c73fd 100644
--- a/net/bridge/br_input.c
+++ b/net/bridge/br_input.c
@@ -60,7 +60,7 @@ int br_handle_frame_finish(struct sk_buff *skb)
60 br = p->br; 60 br = p->br;
61 br_fdb_update(br, p, eth_hdr(skb)->h_source); 61 br_fdb_update(br, p, eth_hdr(skb)->h_source);
62 62
63 if (is_multicast_ether_addr(dest) && 63 if (!is_broadcast_ether_addr(dest) && is_multicast_ether_addr(dest) &&
64 br_multicast_rcv(br, p, skb)) 64 br_multicast_rcv(br, p, skb))
65 goto drop; 65 goto drop;
66 66
@@ -77,7 +77,9 @@ int br_handle_frame_finish(struct sk_buff *skb)
77 77
78 dst = NULL; 78 dst = NULL;
79 79
80 if (is_multicast_ether_addr(dest)) { 80 if (is_broadcast_ether_addr(dest))
81 skb2 = skb;
82 else if (is_multicast_ether_addr(dest)) {
81 mdst = br_mdb_get(br, skb); 83 mdst = br_mdb_get(br, skb);
82 if (mdst || BR_INPUT_SKB_CB_MROUTERS_ONLY(skb)) { 84 if (mdst || BR_INPUT_SKB_CB_MROUTERS_ONLY(skb)) {
83 if ((mdst && mdst->mglist) || 85 if ((mdst && mdst->mglist) ||
diff --git a/net/bridge/br_multicast.c b/net/bridge/br_multicast.c
index 29b9812c8da0..2d85ca7111d3 100644
--- a/net/bridge/br_multicast.c
+++ b/net/bridge/br_multicast.c
@@ -1379,8 +1379,11 @@ static int br_multicast_ipv4_rcv(struct net_bridge *br,
1379 if (unlikely(ip_fast_csum((u8 *)iph, iph->ihl))) 1379 if (unlikely(ip_fast_csum((u8 *)iph, iph->ihl)))
1380 return -EINVAL; 1380 return -EINVAL;
1381 1381
1382 if (iph->protocol != IPPROTO_IGMP) 1382 if (iph->protocol != IPPROTO_IGMP) {
1383 if ((iph->daddr & IGMP_LOCAL_GROUP_MASK) != IGMP_LOCAL_GROUP)
1384 BR_INPUT_SKB_CB(skb)->mrouters_only = 1;
1383 return 0; 1385 return 0;
1386 }
1384 1387
1385 len = ntohs(iph->tot_len); 1388 len = ntohs(iph->tot_len);
1386 if (skb->len < len || len < ip_hdrlen(skb)) 1389 if (skb->len < len || len < ip_hdrlen(skb))
diff --git a/net/ceph/osd_client.c b/net/ceph/osd_client.c
index 9cb627a4073a..7330c2757c0c 100644
--- a/net/ceph/osd_client.c
+++ b/net/ceph/osd_client.c
@@ -477,8 +477,9 @@ struct ceph_osd_request *ceph_osdc_new_request(struct ceph_osd_client *osdc,
477 calc_layout(osdc, vino, layout, off, plen, req, ops); 477 calc_layout(osdc, vino, layout, off, plen, req, ops);
478 req->r_file_layout = *layout; /* keep a copy */ 478 req->r_file_layout = *layout; /* keep a copy */
479 479
480 /* in case it differs from natural alignment that calc_layout 480 /* in case it differs from natural (file) alignment that
481 filled in for us */ 481 calc_layout filled in for us */
482 req->r_num_pages = calc_pages_for(page_align, *plen);
482 req->r_page_alignment = page_align; 483 req->r_page_alignment = page_align;
483 484
484 ceph_osdc_build_request(req, off, plen, ops, 485 ceph_osdc_build_request(req, off, plen, ops,
@@ -2027,8 +2028,9 @@ static struct ceph_msg *get_reply(struct ceph_connection *con,
2027 int want = calc_pages_for(req->r_page_alignment, data_len); 2028 int want = calc_pages_for(req->r_page_alignment, data_len);
2028 2029
2029 if (unlikely(req->r_num_pages < want)) { 2030 if (unlikely(req->r_num_pages < want)) {
2030 pr_warning("tid %lld reply %d > expected %d pages\n", 2031 pr_warning("tid %lld reply has %d bytes %d pages, we"
2031 tid, want, m->nr_pages); 2032 " had only %d pages ready\n", tid, data_len,
2033 want, req->r_num_pages);
2032 *skip = 1; 2034 *skip = 1;
2033 ceph_msg_put(m); 2035 ceph_msg_put(m);
2034 m = NULL; 2036 m = NULL;
diff --git a/net/core/dst.c b/net/core/dst.c
index 9ccca038444f..6135f3671692 100644
--- a/net/core/dst.c
+++ b/net/core/dst.c
@@ -190,7 +190,8 @@ void *dst_alloc(struct dst_ops *ops, struct net_device *dev,
190 dst->lastuse = jiffies; 190 dst->lastuse = jiffies;
191 dst->flags = flags; 191 dst->flags = flags;
192 dst->next = NULL; 192 dst->next = NULL;
193 dst_entries_add(ops, 1); 193 if (!(flags & DST_NOCOUNT))
194 dst_entries_add(ops, 1);
194 return dst; 195 return dst;
195} 196}
196EXPORT_SYMBOL(dst_alloc); 197EXPORT_SYMBOL(dst_alloc);
@@ -243,7 +244,8 @@ again:
243 neigh_release(neigh); 244 neigh_release(neigh);
244 } 245 }
245 246
246 dst_entries_add(dst->ops, -1); 247 if (!(dst->flags & DST_NOCOUNT))
248 dst_entries_add(dst->ops, -1);
247 249
248 if (dst->ops->destroy) 250 if (dst->ops->destroy)
249 dst->ops->destroy(dst); 251 dst->ops->destroy(dst);
diff --git a/net/ipv4/af_inet.c b/net/ipv4/af_inet.c
index eae1f676f870..ef1528af7abf 100644
--- a/net/ipv4/af_inet.c
+++ b/net/ipv4/af_inet.c
@@ -465,8 +465,10 @@ int inet_bind(struct socket *sock, struct sockaddr *uaddr, int addr_len)
465 if (addr_len < sizeof(struct sockaddr_in)) 465 if (addr_len < sizeof(struct sockaddr_in))
466 goto out; 466 goto out;
467 467
468 if (addr->sin_family != AF_INET) 468 if (addr->sin_family != AF_INET) {
469 err = -EAFNOSUPPORT;
469 goto out; 470 goto out;
471 }
470 472
471 chk_addr_ret = inet_addr_type(sock_net(sk), addr->sin_addr.s_addr); 473 chk_addr_ret = inet_addr_type(sock_net(sk), addr->sin_addr.s_addr);
472 474
diff --git a/net/ipv4/ip_output.c b/net/ipv4/ip_output.c
index a8024eaa0e87..84f26e8e6c60 100644
--- a/net/ipv4/ip_output.c
+++ b/net/ipv4/ip_output.c
@@ -802,8 +802,6 @@ static int __ip_append_data(struct sock *sk,
802 skb = skb_peek_tail(queue); 802 skb = skb_peek_tail(queue);
803 803
804 exthdrlen = !skb ? rt->dst.header_len : 0; 804 exthdrlen = !skb ? rt->dst.header_len : 0;
805 length += exthdrlen;
806 transhdrlen += exthdrlen;
807 mtu = cork->fragsize; 805 mtu = cork->fragsize;
808 806
809 hh_len = LL_RESERVED_SPACE(rt->dst.dev); 807 hh_len = LL_RESERVED_SPACE(rt->dst.dev);
@@ -830,7 +828,7 @@ static int __ip_append_data(struct sock *sk,
830 cork->length += length; 828 cork->length += length;
831 if (((length > mtu) || (skb && skb_is_gso(skb))) && 829 if (((length > mtu) || (skb && skb_is_gso(skb))) &&
832 (sk->sk_protocol == IPPROTO_UDP) && 830 (sk->sk_protocol == IPPROTO_UDP) &&
833 (rt->dst.dev->features & NETIF_F_UFO)) { 831 (rt->dst.dev->features & NETIF_F_UFO) && !rt->dst.header_len) {
834 err = ip_ufo_append_data(sk, queue, getfrag, from, length, 832 err = ip_ufo_append_data(sk, queue, getfrag, from, length,
835 hh_len, fragheaderlen, transhdrlen, 833 hh_len, fragheaderlen, transhdrlen,
836 mtu, flags); 834 mtu, flags);
@@ -883,17 +881,16 @@ alloc_new_skb:
883 else 881 else
884 alloclen = fraglen; 882 alloclen = fraglen;
885 883
884 alloclen += exthdrlen;
885
886 /* The last fragment gets additional space at tail. 886 /* The last fragment gets additional space at tail.
887 * Note, with MSG_MORE we overallocate on fragments, 887 * Note, with MSG_MORE we overallocate on fragments,
888 * because we have no idea what fragment will be 888 * because we have no idea what fragment will be
889 * the last. 889 * the last.
890 */ 890 */
891 if (datalen == length + fraggap) { 891 if (datalen == length + fraggap)
892 alloclen += rt->dst.trailer_len; 892 alloclen += rt->dst.trailer_len;
893 /* make sure mtu is not reached */ 893
894 if (datalen > mtu - fragheaderlen - rt->dst.trailer_len)
895 datalen -= ALIGN(rt->dst.trailer_len, 8);
896 }
897 if (transhdrlen) { 894 if (transhdrlen) {
898 skb = sock_alloc_send_skb(sk, 895 skb = sock_alloc_send_skb(sk,
899 alloclen + hh_len + 15, 896 alloclen + hh_len + 15,
@@ -926,11 +923,11 @@ alloc_new_skb:
926 /* 923 /*
927 * Find where to start putting bytes. 924 * Find where to start putting bytes.
928 */ 925 */
929 data = skb_put(skb, fraglen); 926 data = skb_put(skb, fraglen + exthdrlen);
930 skb_set_network_header(skb, exthdrlen); 927 skb_set_network_header(skb, exthdrlen);
931 skb->transport_header = (skb->network_header + 928 skb->transport_header = (skb->network_header +
932 fragheaderlen); 929 fragheaderlen);
933 data += fragheaderlen; 930 data += fragheaderlen + exthdrlen;
934 931
935 if (fraggap) { 932 if (fraggap) {
936 skb->csum = skb_copy_and_csum_bits( 933 skb->csum = skb_copy_and_csum_bits(
@@ -1064,7 +1061,7 @@ static int ip_setup_cork(struct sock *sk, struct inet_cork *cork,
1064 */ 1061 */
1065 *rtp = NULL; 1062 *rtp = NULL;
1066 cork->fragsize = inet->pmtudisc == IP_PMTUDISC_PROBE ? 1063 cork->fragsize = inet->pmtudisc == IP_PMTUDISC_PROBE ?
1067 rt->dst.dev->mtu : dst_mtu(rt->dst.path); 1064 rt->dst.dev->mtu : dst_mtu(&rt->dst);
1068 cork->dst = &rt->dst; 1065 cork->dst = &rt->dst;
1069 cork->length = 0; 1066 cork->length = 0;
1070 cork->tx_flags = ipc->tx_flags; 1067 cork->tx_flags = ipc->tx_flags;
diff --git a/net/ipv4/netfilter.c b/net/ipv4/netfilter.c
index 4614babdc45f..2e97e3ec1eb7 100644
--- a/net/ipv4/netfilter.c
+++ b/net/ipv4/netfilter.c
@@ -17,51 +17,35 @@ int ip_route_me_harder(struct sk_buff *skb, unsigned addr_type)
17 const struct iphdr *iph = ip_hdr(skb); 17 const struct iphdr *iph = ip_hdr(skb);
18 struct rtable *rt; 18 struct rtable *rt;
19 struct flowi4 fl4 = {}; 19 struct flowi4 fl4 = {};
20 unsigned long orefdst; 20 __be32 saddr = iph->saddr;
21 __u8 flags = 0;
21 unsigned int hh_len; 22 unsigned int hh_len;
22 unsigned int type;
23 23
24 type = inet_addr_type(net, iph->saddr); 24 if (!skb->sk && addr_type != RTN_LOCAL) {
25 if (skb->sk && inet_sk(skb->sk)->transparent) 25 if (addr_type == RTN_UNSPEC)
26 type = RTN_LOCAL; 26 addr_type = inet_addr_type(net, saddr);
27 if (addr_type == RTN_UNSPEC) 27 if (addr_type == RTN_LOCAL || addr_type == RTN_UNICAST)
28 addr_type = type; 28 flags |= FLOWI_FLAG_ANYSRC;
29 else
30 saddr = 0;
31 }
29 32
30 /* some non-standard hacks like ipt_REJECT.c:send_reset() can cause 33 /* some non-standard hacks like ipt_REJECT.c:send_reset() can cause
31 * packets with foreign saddr to appear on the NF_INET_LOCAL_OUT hook. 34 * packets with foreign saddr to appear on the NF_INET_LOCAL_OUT hook.
32 */ 35 */
33 if (addr_type == RTN_LOCAL) { 36 fl4.daddr = iph->daddr;
34 fl4.daddr = iph->daddr; 37 fl4.saddr = saddr;
35 if (type == RTN_LOCAL) 38 fl4.flowi4_tos = RT_TOS(iph->tos);
36 fl4.saddr = iph->saddr; 39 fl4.flowi4_oif = skb->sk ? skb->sk->sk_bound_dev_if : 0;
37 fl4.flowi4_tos = RT_TOS(iph->tos); 40 fl4.flowi4_mark = skb->mark;
38 fl4.flowi4_oif = skb->sk ? skb->sk->sk_bound_dev_if : 0; 41 fl4.flowi4_flags = skb->sk ? inet_sk_flowi_flags(skb->sk) : flags;
39 fl4.flowi4_mark = skb->mark; 42 rt = ip_route_output_key(net, &fl4);
40 fl4.flowi4_flags = skb->sk ? inet_sk_flowi_flags(skb->sk) : 0; 43 if (IS_ERR(rt))
41 rt = ip_route_output_key(net, &fl4); 44 return -1;
42 if (IS_ERR(rt))
43 return -1;
44
45 /* Drop old route. */
46 skb_dst_drop(skb);
47 skb_dst_set(skb, &rt->dst);
48 } else {
49 /* non-local src, find valid iif to satisfy
50 * rp-filter when calling ip_route_input. */
51 fl4.daddr = iph->saddr;
52 rt = ip_route_output_key(net, &fl4);
53 if (IS_ERR(rt))
54 return -1;
55 45
56 orefdst = skb->_skb_refdst; 46 /* Drop old route. */
57 if (ip_route_input(skb, iph->daddr, iph->saddr, 47 skb_dst_drop(skb);
58 RT_TOS(iph->tos), rt->dst.dev) != 0) { 48 skb_dst_set(skb, &rt->dst);
59 dst_release(&rt->dst);
60 return -1;
61 }
62 dst_release(&rt->dst);
63 refdst_drop(orefdst);
64 }
65 49
66 if (skb_dst(skb)->error) 50 if (skb_dst(skb)->error)
67 return -1; 51 return -1;
diff --git a/net/ipv4/netfilter/ipt_REJECT.c b/net/ipv4/netfilter/ipt_REJECT.c
index 1ff79e557f96..51f13f8ec724 100644
--- a/net/ipv4/netfilter/ipt_REJECT.c
+++ b/net/ipv4/netfilter/ipt_REJECT.c
@@ -40,7 +40,6 @@ static void send_reset(struct sk_buff *oldskb, int hook)
40 struct iphdr *niph; 40 struct iphdr *niph;
41 const struct tcphdr *oth; 41 const struct tcphdr *oth;
42 struct tcphdr _otcph, *tcph; 42 struct tcphdr _otcph, *tcph;
43 unsigned int addr_type;
44 43
45 /* IP header checks: fragment. */ 44 /* IP header checks: fragment. */
46 if (ip_hdr(oldskb)->frag_off & htons(IP_OFFSET)) 45 if (ip_hdr(oldskb)->frag_off & htons(IP_OFFSET))
@@ -55,6 +54,9 @@ static void send_reset(struct sk_buff *oldskb, int hook)
55 if (oth->rst) 54 if (oth->rst)
56 return; 55 return;
57 56
57 if (skb_rtable(oldskb)->rt_flags & (RTCF_BROADCAST | RTCF_MULTICAST))
58 return;
59
58 /* Check checksum */ 60 /* Check checksum */
59 if (nf_ip_checksum(oldskb, hook, ip_hdrlen(oldskb), IPPROTO_TCP)) 61 if (nf_ip_checksum(oldskb, hook, ip_hdrlen(oldskb), IPPROTO_TCP))
60 return; 62 return;
@@ -101,19 +103,11 @@ static void send_reset(struct sk_buff *oldskb, int hook)
101 nskb->csum_start = (unsigned char *)tcph - nskb->head; 103 nskb->csum_start = (unsigned char *)tcph - nskb->head;
102 nskb->csum_offset = offsetof(struct tcphdr, check); 104 nskb->csum_offset = offsetof(struct tcphdr, check);
103 105
104 addr_type = RTN_UNSPEC;
105 if (hook != NF_INET_FORWARD
106#ifdef CONFIG_BRIDGE_NETFILTER
107 || (nskb->nf_bridge && nskb->nf_bridge->mask & BRNF_BRIDGED)
108#endif
109 )
110 addr_type = RTN_LOCAL;
111
112 /* ip_route_me_harder expects skb->dst to be set */ 106 /* ip_route_me_harder expects skb->dst to be set */
113 skb_dst_set_noref(nskb, skb_dst(oldskb)); 107 skb_dst_set_noref(nskb, skb_dst(oldskb));
114 108
115 nskb->protocol = htons(ETH_P_IP); 109 nskb->protocol = htons(ETH_P_IP);
116 if (ip_route_me_harder(nskb, addr_type)) 110 if (ip_route_me_harder(nskb, RTN_UNSPEC))
117 goto free_nskb; 111 goto free_nskb;
118 112
119 niph->ttl = ip4_dst_hoplimit(skb_dst(nskb)); 113 niph->ttl = ip4_dst_hoplimit(skb_dst(nskb));
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 054a59d21eb0..46febcacb729 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -3220,7 +3220,7 @@ __setup("thash_entries=", set_thash_entries);
3220void __init tcp_init(void) 3220void __init tcp_init(void)
3221{ 3221{
3222 struct sk_buff *skb = NULL; 3222 struct sk_buff *skb = NULL;
3223 unsigned long nr_pages, limit; 3223 unsigned long limit;
3224 int i, max_share, cnt; 3224 int i, max_share, cnt;
3225 unsigned long jiffy = jiffies; 3225 unsigned long jiffy = jiffies;
3226 3226
@@ -3277,13 +3277,7 @@ void __init tcp_init(void)
3277 sysctl_tcp_max_orphans = cnt / 2; 3277 sysctl_tcp_max_orphans = cnt / 2;
3278 sysctl_max_syn_backlog = max(128, cnt / 256); 3278 sysctl_max_syn_backlog = max(128, cnt / 256);
3279 3279
3280 /* Set the pressure threshold to be a fraction of global memory that 3280 limit = nr_free_buffer_pages() / 8;
3281 * is up to 1/2 at 256 MB, decreasing toward zero with the amount of
3282 * memory, with a floor of 128 pages.
3283 */
3284 nr_pages = totalram_pages - totalhigh_pages;
3285 limit = min(nr_pages, 1UL<<(28-PAGE_SHIFT)) >> (20-PAGE_SHIFT);
3286 limit = (limit * (nr_pages >> (20-PAGE_SHIFT))) >> (PAGE_SHIFT-11);
3287 limit = max(limit, 128UL); 3281 limit = max(limit, 128UL);
3288 sysctl_tcp_mem[0] = limit / 4 * 3; 3282 sysctl_tcp_mem[0] = limit / 4 * 3;
3289 sysctl_tcp_mem[1] = limit; 3283 sysctl_tcp_mem[1] = limit;
diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c
index abca870d8ff6..198f75b7bdd3 100644
--- a/net/ipv4/udp.c
+++ b/net/ipv4/udp.c
@@ -1249,6 +1249,9 @@ csum_copy_err:
1249 1249
1250 if (noblock) 1250 if (noblock)
1251 return -EAGAIN; 1251 return -EAGAIN;
1252
1253 /* starting over for a new packet */
1254 msg->msg_flags &= ~MSG_TRUNC;
1252 goto try_again; 1255 goto try_again;
1253} 1256}
1254 1257
@@ -2206,16 +2209,10 @@ void __init udp_table_init(struct udp_table *table, const char *name)
2206 2209
2207void __init udp_init(void) 2210void __init udp_init(void)
2208{ 2211{
2209 unsigned long nr_pages, limit; 2212 unsigned long limit;
2210 2213
2211 udp_table_init(&udp_table, "UDP"); 2214 udp_table_init(&udp_table, "UDP");
2212 /* Set the pressure threshold up by the same strategy of TCP. It is a 2215 limit = nr_free_buffer_pages() / 8;
2213 * fraction of global memory that is up to 1/2 at 256 MB, decreasing
2214 * toward zero with the amount of memory, with a floor of 128 pages.
2215 */
2216 nr_pages = totalram_pages - totalhigh_pages;
2217 limit = min(nr_pages, 1UL<<(28-PAGE_SHIFT)) >> (20-PAGE_SHIFT);
2218 limit = (limit * (nr_pages >> (20-PAGE_SHIFT))) >> (PAGE_SHIFT-11);
2219 limit = max(limit, 128UL); 2216 limit = max(limit, 128UL);
2220 sysctl_udp_mem[0] = limit / 4 * 3; 2217 sysctl_udp_mem[0] = limit / 4 * 3;
2221 sysctl_udp_mem[1] = limit; 2218 sysctl_udp_mem[1] = limit;
diff --git a/net/ipv4/xfrm4_output.c b/net/ipv4/xfrm4_output.c
index 2d51840e53a1..327a617d594c 100644
--- a/net/ipv4/xfrm4_output.c
+++ b/net/ipv4/xfrm4_output.c
@@ -32,7 +32,12 @@ static int xfrm4_tunnel_check_size(struct sk_buff *skb)
32 dst = skb_dst(skb); 32 dst = skb_dst(skb);
33 mtu = dst_mtu(dst); 33 mtu = dst_mtu(dst);
34 if (skb->len > mtu) { 34 if (skb->len > mtu) {
35 icmp_send(skb, ICMP_DEST_UNREACH, ICMP_FRAG_NEEDED, htonl(mtu)); 35 if (skb->sk)
36 ip_local_error(skb->sk, EMSGSIZE, ip_hdr(skb)->daddr,
37 inet_sk(skb->sk)->inet_dport, mtu);
38 else
39 icmp_send(skb, ICMP_DEST_UNREACH,
40 ICMP_FRAG_NEEDED, htonl(mtu));
36 ret = -EMSGSIZE; 41 ret = -EMSGSIZE;
37 } 42 }
38out: 43out:
diff --git a/net/ipv6/af_inet6.c b/net/ipv6/af_inet6.c
index d450a2f9fc06..3b5669a2582d 100644
--- a/net/ipv6/af_inet6.c
+++ b/net/ipv6/af_inet6.c
@@ -274,7 +274,7 @@ int inet6_bind(struct socket *sock, struct sockaddr *uaddr, int addr_len)
274 return -EINVAL; 274 return -EINVAL;
275 275
276 if (addr->sin6_family != AF_INET6) 276 if (addr->sin6_family != AF_INET6)
277 return -EINVAL; 277 return -EAFNOSUPPORT;
278 278
279 addr_type = ipv6_addr_type(&addr->sin6_addr); 279 addr_type = ipv6_addr_type(&addr->sin6_addr);
280 if ((addr_type & IPV6_ADDR_MULTICAST) && sock->type == SOCK_STREAM) 280 if ((addr_type & IPV6_ADDR_MULTICAST) && sock->type == SOCK_STREAM)
diff --git a/net/ipv6/route.c b/net/ipv6/route.c
index de2b1decd786..0ef1f086feb8 100644
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -228,9 +228,10 @@ static struct rt6_info ip6_blk_hole_entry_template = {
228 228
229/* allocate dst with ip6_dst_ops */ 229/* allocate dst with ip6_dst_ops */
230static inline struct rt6_info *ip6_dst_alloc(struct dst_ops *ops, 230static inline struct rt6_info *ip6_dst_alloc(struct dst_ops *ops,
231 struct net_device *dev) 231 struct net_device *dev,
232 int flags)
232{ 233{
233 struct rt6_info *rt = dst_alloc(ops, dev, 0, 0, 0); 234 struct rt6_info *rt = dst_alloc(ops, dev, 0, 0, flags);
234 235
235 memset(&rt->rt6i_table, 0, sizeof(*rt) - sizeof(struct dst_entry)); 236 memset(&rt->rt6i_table, 0, sizeof(*rt) - sizeof(struct dst_entry));
236 237
@@ -1042,7 +1043,7 @@ struct dst_entry *icmp6_dst_alloc(struct net_device *dev,
1042 if (unlikely(idev == NULL)) 1043 if (unlikely(idev == NULL))
1043 return NULL; 1044 return NULL;
1044 1045
1045 rt = ip6_dst_alloc(&net->ipv6.ip6_dst_ops, dev); 1046 rt = ip6_dst_alloc(&net->ipv6.ip6_dst_ops, dev, 0);
1046 if (unlikely(rt == NULL)) { 1047 if (unlikely(rt == NULL)) {
1047 in6_dev_put(idev); 1048 in6_dev_put(idev);
1048 goto out; 1049 goto out;
@@ -1062,14 +1063,6 @@ struct dst_entry *icmp6_dst_alloc(struct net_device *dev,
1062 dst_metric_set(&rt->dst, RTAX_HOPLIMIT, 255); 1063 dst_metric_set(&rt->dst, RTAX_HOPLIMIT, 255);
1063 rt->dst.output = ip6_output; 1064 rt->dst.output = ip6_output;
1064 1065
1065#if 0 /* there's no chance to use these for ndisc */
1066 rt->dst.flags = ipv6_addr_type(addr) & IPV6_ADDR_UNICAST
1067 ? DST_HOST
1068 : 0;
1069 ipv6_addr_copy(&rt->rt6i_dst.addr, addr);
1070 rt->rt6i_dst.plen = 128;
1071#endif
1072
1073 spin_lock_bh(&icmp6_dst_lock); 1066 spin_lock_bh(&icmp6_dst_lock);
1074 rt->dst.next = icmp6_dst_gc_list; 1067 rt->dst.next = icmp6_dst_gc_list;
1075 icmp6_dst_gc_list = &rt->dst; 1068 icmp6_dst_gc_list = &rt->dst;
@@ -1214,7 +1207,7 @@ int ip6_route_add(struct fib6_config *cfg)
1214 goto out; 1207 goto out;
1215 } 1208 }
1216 1209
1217 rt = ip6_dst_alloc(&net->ipv6.ip6_dst_ops, NULL); 1210 rt = ip6_dst_alloc(&net->ipv6.ip6_dst_ops, NULL, DST_NOCOUNT);
1218 1211
1219 if (rt == NULL) { 1212 if (rt == NULL) {
1220 err = -ENOMEM; 1213 err = -ENOMEM;
@@ -1244,7 +1237,7 @@ int ip6_route_add(struct fib6_config *cfg)
1244 ipv6_addr_prefix(&rt->rt6i_dst.addr, &cfg->fc_dst, cfg->fc_dst_len); 1237 ipv6_addr_prefix(&rt->rt6i_dst.addr, &cfg->fc_dst, cfg->fc_dst_len);
1245 rt->rt6i_dst.plen = cfg->fc_dst_len; 1238 rt->rt6i_dst.plen = cfg->fc_dst_len;
1246 if (rt->rt6i_dst.plen == 128) 1239 if (rt->rt6i_dst.plen == 128)
1247 rt->dst.flags = DST_HOST; 1240 rt->dst.flags |= DST_HOST;
1248 1241
1249#ifdef CONFIG_IPV6_SUBTREES 1242#ifdef CONFIG_IPV6_SUBTREES
1250 ipv6_addr_prefix(&rt->rt6i_src.addr, &cfg->fc_src, cfg->fc_src_len); 1243 ipv6_addr_prefix(&rt->rt6i_src.addr, &cfg->fc_src, cfg->fc_src_len);
@@ -1734,7 +1727,7 @@ static struct rt6_info * ip6_rt_copy(struct rt6_info *ort)
1734{ 1727{
1735 struct net *net = dev_net(ort->rt6i_dev); 1728 struct net *net = dev_net(ort->rt6i_dev);
1736 struct rt6_info *rt = ip6_dst_alloc(&net->ipv6.ip6_dst_ops, 1729 struct rt6_info *rt = ip6_dst_alloc(&net->ipv6.ip6_dst_ops,
1737 ort->dst.dev); 1730 ort->dst.dev, 0);
1738 1731
1739 if (rt) { 1732 if (rt) {
1740 rt->dst.input = ort->dst.input; 1733 rt->dst.input = ort->dst.input;
@@ -2013,7 +2006,7 @@ struct rt6_info *addrconf_dst_alloc(struct inet6_dev *idev,
2013{ 2006{
2014 struct net *net = dev_net(idev->dev); 2007 struct net *net = dev_net(idev->dev);
2015 struct rt6_info *rt = ip6_dst_alloc(&net->ipv6.ip6_dst_ops, 2008 struct rt6_info *rt = ip6_dst_alloc(&net->ipv6.ip6_dst_ops,
2016 net->loopback_dev); 2009 net->loopback_dev, 0);
2017 struct neighbour *neigh; 2010 struct neighbour *neigh;
2018 2011
2019 if (rt == NULL) { 2012 if (rt == NULL) {
@@ -2025,7 +2018,7 @@ struct rt6_info *addrconf_dst_alloc(struct inet6_dev *idev,
2025 2018
2026 in6_dev_hold(idev); 2019 in6_dev_hold(idev);
2027 2020
2028 rt->dst.flags = DST_HOST; 2021 rt->dst.flags |= DST_HOST;
2029 rt->dst.input = ip6_input; 2022 rt->dst.input = ip6_input;
2030 rt->dst.output = ip6_output; 2023 rt->dst.output = ip6_output;
2031 rt->rt6i_idev = idev; 2024 rt->rt6i_idev = idev;
diff --git a/net/ipv6/udp.c b/net/ipv6/udp.c
index 41f8c9c08dba..328985c40883 100644
--- a/net/ipv6/udp.c
+++ b/net/ipv6/udp.c
@@ -453,8 +453,11 @@ csum_copy_err:
453 } 453 }
454 unlock_sock_fast(sk, slow); 454 unlock_sock_fast(sk, slow);
455 455
456 if (flags & MSG_DONTWAIT) 456 if (noblock)
457 return -EAGAIN; 457 return -EAGAIN;
458
459 /* starting over for a new packet */
460 msg->msg_flags &= ~MSG_TRUNC;
458 goto try_again; 461 goto try_again;
459} 462}
460 463
diff --git a/net/mac80211/wpa.c b/net/mac80211/wpa.c
index 9dc3b5f26e80..d91c1a26630d 100644
--- a/net/mac80211/wpa.c
+++ b/net/mac80211/wpa.c
@@ -154,7 +154,13 @@ update_iv:
154 return RX_CONTINUE; 154 return RX_CONTINUE;
155 155
156mic_fail: 156mic_fail:
157 mac80211_ev_michael_mic_failure(rx->sdata, rx->key->conf.keyidx, 157 /*
158 * In some cases the key can be unset - e.g. a multicast packet, in
159 * a driver that supports HW encryption. Send up the key idx only if
160 * the key is set.
161 */
162 mac80211_ev_michael_mic_failure(rx->sdata,
163 rx->key ? rx->key->conf.keyidx : -1,
158 (void *) skb->data, NULL, GFP_ATOMIC); 164 (void *) skb->data, NULL, GFP_ATOMIC);
159 return RX_DROP_UNUSABLE; 165 return RX_DROP_UNUSABLE;
160} 166}
diff --git a/net/sctp/protocol.c b/net/sctp/protocol.c
index 67380a29e2e9..207175b2f40a 100644
--- a/net/sctp/protocol.c
+++ b/net/sctp/protocol.c
@@ -1058,7 +1058,6 @@ SCTP_STATIC __init int sctp_init(void)
1058 int status = -EINVAL; 1058 int status = -EINVAL;
1059 unsigned long goal; 1059 unsigned long goal;
1060 unsigned long limit; 1060 unsigned long limit;
1061 unsigned long nr_pages;
1062 int max_share; 1061 int max_share;
1063 int order; 1062 int order;
1064 1063
@@ -1148,15 +1147,7 @@ SCTP_STATIC __init int sctp_init(void)
1148 /* Initialize handle used for association ids. */ 1147 /* Initialize handle used for association ids. */
1149 idr_init(&sctp_assocs_id); 1148 idr_init(&sctp_assocs_id);
1150 1149
1151 /* Set the pressure threshold to be a fraction of global memory that 1150 limit = nr_free_buffer_pages() / 8;
1152 * is up to 1/2 at 256 MB, decreasing toward zero with the amount of
1153 * memory, with a floor of 128 pages.
1154 * Note this initializes the data in sctpv6_prot too
1155 * Unabashedly stolen from tcp_init
1156 */
1157 nr_pages = totalram_pages - totalhigh_pages;
1158 limit = min(nr_pages, 1UL<<(28-PAGE_SHIFT)) >> (20-PAGE_SHIFT);
1159 limit = (limit * (nr_pages >> (20-PAGE_SHIFT))) >> (PAGE_SHIFT-11);
1160 limit = max(limit, 128UL); 1151 limit = max(limit, 128UL);
1161 sysctl_sctp_mem[0] = limit / 4 * 3; 1152 sysctl_sctp_mem[0] = limit / 4 * 3;
1162 sysctl_sctp_mem[1] = limit; 1153 sysctl_sctp_mem[1] = limit;
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index 6766913a53e6..08c6238802de 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -2073,10 +2073,33 @@ static int sctp_setsockopt_disable_fragments(struct sock *sk,
2073static int sctp_setsockopt_events(struct sock *sk, char __user *optval, 2073static int sctp_setsockopt_events(struct sock *sk, char __user *optval,
2074 unsigned int optlen) 2074 unsigned int optlen)
2075{ 2075{
2076 struct sctp_association *asoc;
2077 struct sctp_ulpevent *event;
2078
2076 if (optlen > sizeof(struct sctp_event_subscribe)) 2079 if (optlen > sizeof(struct sctp_event_subscribe))
2077 return -EINVAL; 2080 return -EINVAL;
2078 if (copy_from_user(&sctp_sk(sk)->subscribe, optval, optlen)) 2081 if (copy_from_user(&sctp_sk(sk)->subscribe, optval, optlen))
2079 return -EFAULT; 2082 return -EFAULT;
2083
2084 /*
2085 * At the time when a user app subscribes to SCTP_SENDER_DRY_EVENT,
2086 * if there is no data to be sent or retransmit, the stack will
2087 * immediately send up this notification.
2088 */
2089 if (sctp_ulpevent_type_enabled(SCTP_SENDER_DRY_EVENT,
2090 &sctp_sk(sk)->subscribe)) {
2091 asoc = sctp_id2assoc(sk, 0);
2092
2093 if (asoc && sctp_outq_is_empty(&asoc->outqueue)) {
2094 event = sctp_ulpevent_make_sender_dry_event(asoc,
2095 GFP_ATOMIC);
2096 if (!event)
2097 return -ENOMEM;
2098
2099 sctp_ulpq_tail_event(&asoc->ulpq, event);
2100 }
2101 }
2102
2080 return 0; 2103 return 0;
2081} 2104}
2082 2105
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index 98fa8eb6cc4b..f07602d7bf68 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -6463,7 +6463,8 @@ void nl80211_michael_mic_failure(struct cfg80211_registered_device *rdev,
6463 if (addr) 6463 if (addr)
6464 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, addr); 6464 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, addr);
6465 NLA_PUT_U32(msg, NL80211_ATTR_KEY_TYPE, key_type); 6465 NLA_PUT_U32(msg, NL80211_ATTR_KEY_TYPE, key_type);
6466 NLA_PUT_U8(msg, NL80211_ATTR_KEY_IDX, key_id); 6466 if (key_id != -1)
6467 NLA_PUT_U8(msg, NL80211_ATTR_KEY_IDX, key_id);
6467 if (tsc) 6468 if (tsc)
6468 NLA_PUT(msg, NL80211_ATTR_KEY_SEQ, 6, tsc); 6469 NLA_PUT(msg, NL80211_ATTR_KEY_SEQ, 6, tsc);
6469 6470
diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
index 9bec2e8a838c..5ce74a385525 100644
--- a/net/xfrm/xfrm_policy.c
+++ b/net/xfrm/xfrm_policy.c
@@ -50,7 +50,7 @@ static struct xfrm_policy_afinfo *xfrm_policy_get_afinfo(unsigned short family);
50static void xfrm_policy_put_afinfo(struct xfrm_policy_afinfo *afinfo); 50static void xfrm_policy_put_afinfo(struct xfrm_policy_afinfo *afinfo);
51static void xfrm_init_pmtu(struct dst_entry *dst); 51static void xfrm_init_pmtu(struct dst_entry *dst);
52static int stale_bundle(struct dst_entry *dst); 52static int stale_bundle(struct dst_entry *dst);
53static int xfrm_bundle_ok(struct xfrm_dst *xdst, int family); 53static int xfrm_bundle_ok(struct xfrm_dst *xdst);
54 54
55 55
56static struct xfrm_policy *__xfrm_policy_unlink(struct xfrm_policy *pol, 56static struct xfrm_policy *__xfrm_policy_unlink(struct xfrm_policy *pol,
@@ -2241,7 +2241,7 @@ static struct dst_entry *xfrm_dst_check(struct dst_entry *dst, u32 cookie)
2241 2241
2242static int stale_bundle(struct dst_entry *dst) 2242static int stale_bundle(struct dst_entry *dst)
2243{ 2243{
2244 return !xfrm_bundle_ok((struct xfrm_dst *)dst, AF_UNSPEC); 2244 return !xfrm_bundle_ok((struct xfrm_dst *)dst);
2245} 2245}
2246 2246
2247void xfrm_dst_ifdown(struct dst_entry *dst, struct net_device *dev) 2247void xfrm_dst_ifdown(struct dst_entry *dst, struct net_device *dev)
@@ -2313,7 +2313,7 @@ static void xfrm_init_pmtu(struct dst_entry *dst)
2313 * still valid. 2313 * still valid.
2314 */ 2314 */
2315 2315
2316static int xfrm_bundle_ok(struct xfrm_dst *first, int family) 2316static int xfrm_bundle_ok(struct xfrm_dst *first)
2317{ 2317{
2318 struct dst_entry *dst = &first->u.dst; 2318 struct dst_entry *dst = &first->u.dst;
2319 struct xfrm_dst *last; 2319 struct xfrm_dst *last;
diff --git a/sound/atmel/abdac.c b/sound/atmel/abdac.c
index 6e2409181895..bfee60c4d4c0 100644
--- a/sound/atmel/abdac.c
+++ b/sound/atmel/abdac.c
@@ -599,4 +599,4 @@ module_exit(atmel_abdac_exit);
599 599
600MODULE_LICENSE("GPL"); 600MODULE_LICENSE("GPL");
601MODULE_DESCRIPTION("Driver for Atmel Audio Bitstream DAC (ABDAC)"); 601MODULE_DESCRIPTION("Driver for Atmel Audio Bitstream DAC (ABDAC)");
602MODULE_AUTHOR("Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>"); 602MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");
diff --git a/sound/atmel/ac97c.c b/sound/atmel/ac97c.c
index b310702c646e..ac35222ad0dd 100644
--- a/sound/atmel/ac97c.c
+++ b/sound/atmel/ac97c.c
@@ -1199,4 +1199,4 @@ module_exit(atmel_ac97c_exit);
1199 1199
1200MODULE_LICENSE("GPL"); 1200MODULE_LICENSE("GPL");
1201MODULE_DESCRIPTION("Driver for Atmel AC97 controller"); 1201MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
1202MODULE_AUTHOR("Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>"); 1202MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");
diff --git a/sound/pci/cs5535audio/cs5535audio_pcm.c b/sound/pci/cs5535audio/cs5535audio_pcm.c
index f16bc8aad6ed..e083122ca55a 100644
--- a/sound/pci/cs5535audio/cs5535audio_pcm.c
+++ b/sound/pci/cs5535audio/cs5535audio_pcm.c
@@ -149,7 +149,7 @@ static int cs5535audio_build_dma_packets(struct cs5535audio *cs5535au,
149 &((struct cs5535audio_dma_desc *) dma->desc_buf.area)[i]; 149 &((struct cs5535audio_dma_desc *) dma->desc_buf.area)[i];
150 desc->addr = cpu_to_le32(addr); 150 desc->addr = cpu_to_le32(addr);
151 desc->size = cpu_to_le32(period_bytes); 151 desc->size = cpu_to_le32(period_bytes);
152 desc->ctlreserved = cpu_to_le32(PRD_EOP); 152 desc->ctlreserved = cpu_to_le16(PRD_EOP);
153 desc_addr += sizeof(struct cs5535audio_dma_desc); 153 desc_addr += sizeof(struct cs5535audio_dma_desc);
154 addr += period_bytes; 154 addr += period_bytes;
155 } 155 }
@@ -157,7 +157,7 @@ static int cs5535audio_build_dma_packets(struct cs5535audio *cs5535au,
157 lastdesc = &((struct cs5535audio_dma_desc *) dma->desc_buf.area)[periods]; 157 lastdesc = &((struct cs5535audio_dma_desc *) dma->desc_buf.area)[periods];
158 lastdesc->addr = cpu_to_le32((u32) dma->desc_buf.addr); 158 lastdesc->addr = cpu_to_le32((u32) dma->desc_buf.addr);
159 lastdesc->size = 0; 159 lastdesc->size = 0;
160 lastdesc->ctlreserved = cpu_to_le32(PRD_JMP); 160 lastdesc->ctlreserved = cpu_to_le16(PRD_JMP);
161 jmpprd_addr = cpu_to_le32(lastdesc->addr + 161 jmpprd_addr = cpu_to_le32(lastdesc->addr +
162 (sizeof(struct cs5535audio_dma_desc)*periods)); 162 (sizeof(struct cs5535audio_dma_desc)*periods));
163 163
diff --git a/sound/pci/hda/hda_eld.c b/sound/pci/hda/hda_eld.c
index b05f7be9dc1b..e3e853153d14 100644
--- a/sound/pci/hda/hda_eld.c
+++ b/sound/pci/hda/hda_eld.c
@@ -294,7 +294,7 @@ static int hdmi_update_eld(struct hdmi_eld *e,
294 snd_printd(KERN_INFO "HDMI: out of range MNL %d\n", mnl); 294 snd_printd(KERN_INFO "HDMI: out of range MNL %d\n", mnl);
295 goto out_fail; 295 goto out_fail;
296 } else 296 } else
297 strlcpy(e->monitor_name, buf + ELD_FIXED_BYTES, mnl); 297 strlcpy(e->monitor_name, buf + ELD_FIXED_BYTES, mnl + 1);
298 298
299 for (i = 0; i < e->sad_count; i++) { 299 for (i = 0; i < e->sad_count; i++) {
300 if (ELD_FIXED_BYTES + mnl + 3 * (i + 1) > size) { 300 if (ELD_FIXED_BYTES + mnl + 3 * (i + 1) > size) {
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index 694b9daf691f..7bbc5f237a5e 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -3074,6 +3074,7 @@ static const char * const cxt5066_models[CXT5066_MODELS] = {
3074}; 3074};
3075 3075
3076static const struct snd_pci_quirk cxt5066_cfg_tbl[] = { 3076static const struct snd_pci_quirk cxt5066_cfg_tbl[] = {
3077 SND_PCI_QUIRK(0x1025, 0x054c, "Acer Aspire 3830TG", CXT5066_AUTO),
3077 SND_PCI_QUIRK_MASK(0x1025, 0xff00, 0x0400, "Acer", CXT5066_IDEAPAD), 3078 SND_PCI_QUIRK_MASK(0x1025, 0xff00, 0x0400, "Acer", CXT5066_IDEAPAD),
3078 SND_PCI_QUIRK(0x1028, 0x02d8, "Dell Vostro", CXT5066_DELL_VOSTRO), 3079 SND_PCI_QUIRK(0x1028, 0x02d8, "Dell Vostro", CXT5066_DELL_VOSTRO),
3079 SND_PCI_QUIRK(0x1028, 0x02f5, "Dell Vostro 320", CXT5066_IDEAPAD), 3080 SND_PCI_QUIRK(0x1028, 0x02f5, "Dell Vostro 320", CXT5066_IDEAPAD),
@@ -4389,6 +4390,8 @@ static const struct hda_codec_preset snd_hda_preset_conexant[] = {
4389 .patch = patch_cxt5066 }, 4390 .patch = patch_cxt5066 },
4390 { .id = 0x14f15069, .name = "CX20585", 4391 { .id = 0x14f15069, .name = "CX20585",
4391 .patch = patch_cxt5066 }, 4392 .patch = patch_cxt5066 },
4393 { .id = 0x14f1506c, .name = "CX20588",
4394 .patch = patch_cxt5066 },
4392 { .id = 0x14f1506e, .name = "CX20590", 4395 { .id = 0x14f1506e, .name = "CX20590",
4393 .patch = patch_cxt5066 }, 4396 .patch = patch_cxt5066 },
4394 { .id = 0x14f15097, .name = "CX20631", 4397 { .id = 0x14f15097, .name = "CX20631",
@@ -4417,6 +4420,7 @@ MODULE_ALIAS("snd-hda-codec-id:14f15066");
4417MODULE_ALIAS("snd-hda-codec-id:14f15067"); 4420MODULE_ALIAS("snd-hda-codec-id:14f15067");
4418MODULE_ALIAS("snd-hda-codec-id:14f15068"); 4421MODULE_ALIAS("snd-hda-codec-id:14f15068");
4419MODULE_ALIAS("snd-hda-codec-id:14f15069"); 4422MODULE_ALIAS("snd-hda-codec-id:14f15069");
4423MODULE_ALIAS("snd-hda-codec-id:14f1506c");
4420MODULE_ALIAS("snd-hda-codec-id:14f1506e"); 4424MODULE_ALIAS("snd-hda-codec-id:14f1506e");
4421MODULE_ALIAS("snd-hda-codec-id:14f15097"); 4425MODULE_ALIAS("snd-hda-codec-id:14f15097");
4422MODULE_ALIAS("snd-hda-codec-id:14f15098"); 4426MODULE_ALIAS("snd-hda-codec-id:14f15098");
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index d21191dcfe88..b48fb43b5448 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -2715,17 +2715,30 @@ typedef int (*getput_call_t)(struct snd_kcontrol *kcontrol,
2715 2715
2716static int alc_cap_getput_caller(struct snd_kcontrol *kcontrol, 2716static int alc_cap_getput_caller(struct snd_kcontrol *kcontrol,
2717 struct snd_ctl_elem_value *ucontrol, 2717 struct snd_ctl_elem_value *ucontrol,
2718 getput_call_t func) 2718 getput_call_t func, bool check_adc_switch)
2719{ 2719{
2720 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2720 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2721 struct alc_spec *spec = codec->spec; 2721 struct alc_spec *spec = codec->spec;
2722 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2722 int i, err = 0;
2723 int err;
2724 2723
2725 mutex_lock(&codec->control_mutex); 2724 mutex_lock(&codec->control_mutex);
2726 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(spec->adc_nids[adc_idx], 2725 if (check_adc_switch && spec->dual_adc_switch) {
2727 3, 0, HDA_INPUT); 2726 for (i = 0; i < spec->num_adc_nids; i++) {
2728 err = func(kcontrol, ucontrol); 2727 kcontrol->private_value =
2728 HDA_COMPOSE_AMP_VAL(spec->adc_nids[i],
2729 3, 0, HDA_INPUT);
2730 err = func(kcontrol, ucontrol);
2731 if (err < 0)
2732 goto error;
2733 }
2734 } else {
2735 i = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2736 kcontrol->private_value =
2737 HDA_COMPOSE_AMP_VAL(spec->adc_nids[i],
2738 3, 0, HDA_INPUT);
2739 err = func(kcontrol, ucontrol);
2740 }
2741 error:
2729 mutex_unlock(&codec->control_mutex); 2742 mutex_unlock(&codec->control_mutex);
2730 return err; 2743 return err;
2731} 2744}
@@ -2734,14 +2747,14 @@ static int alc_cap_vol_get(struct snd_kcontrol *kcontrol,
2734 struct snd_ctl_elem_value *ucontrol) 2747 struct snd_ctl_elem_value *ucontrol)
2735{ 2748{
2736 return alc_cap_getput_caller(kcontrol, ucontrol, 2749 return alc_cap_getput_caller(kcontrol, ucontrol,
2737 snd_hda_mixer_amp_volume_get); 2750 snd_hda_mixer_amp_volume_get, false);
2738} 2751}
2739 2752
2740static int alc_cap_vol_put(struct snd_kcontrol *kcontrol, 2753static int alc_cap_vol_put(struct snd_kcontrol *kcontrol,
2741 struct snd_ctl_elem_value *ucontrol) 2754 struct snd_ctl_elem_value *ucontrol)
2742{ 2755{
2743 return alc_cap_getput_caller(kcontrol, ucontrol, 2756 return alc_cap_getput_caller(kcontrol, ucontrol,
2744 snd_hda_mixer_amp_volume_put); 2757 snd_hda_mixer_amp_volume_put, true);
2745} 2758}
2746 2759
2747/* capture mixer elements */ 2760/* capture mixer elements */
@@ -2751,14 +2764,14 @@ static int alc_cap_sw_get(struct snd_kcontrol *kcontrol,
2751 struct snd_ctl_elem_value *ucontrol) 2764 struct snd_ctl_elem_value *ucontrol)
2752{ 2765{
2753 return alc_cap_getput_caller(kcontrol, ucontrol, 2766 return alc_cap_getput_caller(kcontrol, ucontrol,
2754 snd_hda_mixer_amp_switch_get); 2767 snd_hda_mixer_amp_switch_get, false);
2755} 2768}
2756 2769
2757static int alc_cap_sw_put(struct snd_kcontrol *kcontrol, 2770static int alc_cap_sw_put(struct snd_kcontrol *kcontrol,
2758 struct snd_ctl_elem_value *ucontrol) 2771 struct snd_ctl_elem_value *ucontrol)
2759{ 2772{
2760 return alc_cap_getput_caller(kcontrol, ucontrol, 2773 return alc_cap_getput_caller(kcontrol, ucontrol,
2761 snd_hda_mixer_amp_switch_put); 2774 snd_hda_mixer_amp_switch_put, true);
2762} 2775}
2763 2776
2764#define _DEFINE_CAPMIX(num) \ 2777#define _DEFINE_CAPMIX(num) \
diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c
index 3f08afc0f0d3..c8e402fc3782 100644
--- a/sound/pci/rme9652/hdspm.c
+++ b/sound/pci/rme9652/hdspm.c
@@ -896,11 +896,11 @@ struct hdspm {
896 unsigned char max_channels_in; 896 unsigned char max_channels_in;
897 unsigned char max_channels_out; 897 unsigned char max_channels_out;
898 898
899 char *channel_map_in; 899 signed char *channel_map_in;
900 char *channel_map_out; 900 signed char *channel_map_out;
901 901
902 char *channel_map_in_ss, *channel_map_in_ds, *channel_map_in_qs; 902 signed char *channel_map_in_ss, *channel_map_in_ds, *channel_map_in_qs;
903 char *channel_map_out_ss, *channel_map_out_ds, *channel_map_out_qs; 903 signed char *channel_map_out_ss, *channel_map_out_ds, *channel_map_out_qs;
904 904
905 char **port_names_in; 905 char **port_names_in;
906 char **port_names_out; 906 char **port_names_out;
diff --git a/sound/soc/blackfin/bf5xx-i2s-pcm.c b/sound/soc/blackfin/bf5xx-i2s-pcm.c
index b5101efd1c87..f1fd95bb6416 100644
--- a/sound/soc/blackfin/bf5xx-i2s-pcm.c
+++ b/sound/soc/blackfin/bf5xx-i2s-pcm.c
@@ -138,11 +138,20 @@ static snd_pcm_uframes_t bf5xx_pcm_pointer(struct snd_pcm_substream *substream)
138 pr_debug("%s enter\n", __func__); 138 pr_debug("%s enter\n", __func__);
139 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 139 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
140 diff = sport_curr_offset_tx(sport); 140 diff = sport_curr_offset_tx(sport);
141 frames = bytes_to_frames(substream->runtime, diff);
142 } else { 141 } else {
143 diff = sport_curr_offset_rx(sport); 142 diff = sport_curr_offset_rx(sport);
144 frames = bytes_to_frames(substream->runtime, diff);
145 } 143 }
144
145 /*
146 * TX at least can report one frame beyond the end of the
147 * buffer if we hit the wraparound case - clamp to within the
148 * buffer as the ALSA APIs require.
149 */
150 if (diff == snd_pcm_lib_buffer_bytes(substream))
151 diff = 0;
152
153 frames = bytes_to_frames(substream->runtime, diff);
154
146 return frames; 155 return frames;
147} 156}
148 157
diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
index 4be0570e3f1f..65f46047b1cb 100644
--- a/sound/soc/codecs/ak4642.c
+++ b/sound/soc/codecs/ak4642.c
@@ -357,7 +357,7 @@ static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
357 default: 357 default:
358 return -EINVAL; 358 return -EINVAL;
359 } 359 }
360 snd_soc_update_bits(codec, PW_MGMT2, MS, data); 360 snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
361 snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko); 361 snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
362 362
363 /* format type */ 363 /* format type */
diff --git a/sound/soc/codecs/tlv320aic26.c b/sound/soc/codecs/tlv320aic26.c
index e2a7608d3944..7859bdcc93db 100644
--- a/sound/soc/codecs/tlv320aic26.c
+++ b/sound/soc/codecs/tlv320aic26.c
@@ -161,10 +161,18 @@ static int aic26_hw_params(struct snd_pcm_substream *substream,
161 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL; 161 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
162 } 162 }
163 163
164 /* Configure PLL */ 164 /**
165 * Configure PLL
166 * fsref = (mclk * PLLM) / 2048
167 * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
168 */
165 pval = 1; 169 pval = 1;
166 jval = (fsref == 44100) ? 7 : 8; 170 /* compute J portion of multiplier */
167 dval = (fsref == 44100) ? 5264 : 1920; 171 jval = fsref / (aic26->mclk / 2048);
172 /* compute fractional DDDD component of multiplier */
173 dval = fsref - (jval * (aic26->mclk / 2048));
174 dval = (10000 * dval) / (aic26->mclk / 2048);
175 dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
168 qval = 0; 176 qval = 0;
169 reg = 0x8000 | qval << 11 | pval << 8 | jval << 2; 177 reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
170 aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg); 178 aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index c3d96fc8c267..789453d44ec5 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -1114,12 +1114,19 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power)
1114 1114
1115 /* Sync reg_cache with the hardware */ 1115 /* Sync reg_cache with the hardware */
1116 codec->cache_only = 0; 1116 codec->cache_only = 0;
1117 for (i = 0; i < ARRAY_SIZE(aic3x_reg); i++) 1117 for (i = AIC3X_SAMPLE_RATE_SEL_REG; i < ARRAY_SIZE(aic3x_reg); i++)
1118 snd_soc_write(codec, i, cache[i]); 1118 snd_soc_write(codec, i, cache[i]);
1119 if (aic3x->model == AIC3X_MODEL_3007) 1119 if (aic3x->model == AIC3X_MODEL_3007)
1120 aic3x_init_3007(codec); 1120 aic3x_init_3007(codec);
1121 codec->cache_sync = 0; 1121 codec->cache_sync = 0;
1122 } else { 1122 } else {
1123 /*
1124 * Do soft reset to this codec instance in order to clear
1125 * possible VDD leakage currents in case the supply regulators
1126 * remain on
1127 */
1128 snd_soc_write(codec, AIC3X_RESET, SOFT_RESET);
1129 codec->cache_sync = 1;
1123 aic3x->power = 0; 1130 aic3x->power = 0;
1124 /* HW writes are needless when bias is off */ 1131 /* HW writes are needless when bias is off */
1125 codec->cache_only = 1; 1132 codec->cache_only = 1;
diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index 2dc964b55e4f..76b4361e9b80 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -175,6 +175,7 @@ static const struct snd_kcontrol_new wm8731_input_mux_controls =
175SOC_DAPM_ENUM("Input Select", wm8731_insel_enum); 175SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
176 176
177static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = { 177static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
178SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
178SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0), 179SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
179SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1, 180SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
180 &wm8731_output_mixer_controls[0], 181 &wm8731_output_mixer_controls[0],
@@ -204,6 +205,8 @@ static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
204static const struct snd_soc_dapm_route wm8731_intercon[] = { 205static const struct snd_soc_dapm_route wm8731_intercon[] = {
205 {"DAC", NULL, "OSC", wm8731_check_osc}, 206 {"DAC", NULL, "OSC", wm8731_check_osc},
206 {"ADC", NULL, "OSC", wm8731_check_osc}, 207 {"ADC", NULL, "OSC", wm8731_check_osc},
208 {"DAC", NULL, "ACTIVE"},
209 {"ADC", NULL, "ACTIVE"},
207 210
208 /* output mixer */ 211 /* output mixer */
209 {"Output Mixer", "Line Bypass Switch", "Line Input"}, 212 {"Output Mixer", "Line Bypass Switch", "Line Input"},
@@ -315,29 +318,6 @@ static int wm8731_hw_params(struct snd_pcm_substream *substream,
315 return 0; 318 return 0;
316} 319}
317 320
318static int wm8731_pcm_prepare(struct snd_pcm_substream *substream,
319 struct snd_soc_dai *dai)
320{
321 struct snd_soc_codec *codec = dai->codec;
322
323 /* set active */
324 snd_soc_write(codec, WM8731_ACTIVE, 0x0001);
325
326 return 0;
327}
328
329static void wm8731_shutdown(struct snd_pcm_substream *substream,
330 struct snd_soc_dai *dai)
331{
332 struct snd_soc_codec *codec = dai->codec;
333
334 /* deactivate */
335 if (!codec->active) {
336 udelay(50);
337 snd_soc_write(codec, WM8731_ACTIVE, 0x0);
338 }
339}
340
341static int wm8731_mute(struct snd_soc_dai *dai, int mute) 321static int wm8731_mute(struct snd_soc_dai *dai, int mute)
342{ 322{
343 struct snd_soc_codec *codec = dai->codec; 323 struct snd_soc_codec *codec = dai->codec;
@@ -480,7 +460,6 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
480 snd_soc_write(codec, WM8731_PWR, reg | 0x0040); 460 snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
481 break; 461 break;
482 case SND_SOC_BIAS_OFF: 462 case SND_SOC_BIAS_OFF:
483 snd_soc_write(codec, WM8731_ACTIVE, 0x0);
484 snd_soc_write(codec, WM8731_PWR, 0xffff); 463 snd_soc_write(codec, WM8731_PWR, 0xffff);
485 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), 464 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
486 wm8731->supplies); 465 wm8731->supplies);
@@ -496,9 +475,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
496 SNDRV_PCM_FMTBIT_S24_LE) 475 SNDRV_PCM_FMTBIT_S24_LE)
497 476
498static struct snd_soc_dai_ops wm8731_dai_ops = { 477static struct snd_soc_dai_ops wm8731_dai_ops = {
499 .prepare = wm8731_pcm_prepare,
500 .hw_params = wm8731_hw_params, 478 .hw_params = wm8731_hw_params,
501 .shutdown = wm8731_shutdown,
502 .digital_mute = wm8731_mute, 479 .digital_mute = wm8731_mute,
503 .set_sysclk = wm8731_set_dai_sysclk, 480 .set_sysclk = wm8731_set_dai_sysclk,
504 .set_fmt = wm8731_set_dai_fmt, 481 .set_fmt = wm8731_set_dai_fmt,
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
index 970a95c5360b..c2fc0356c2a4 100644
--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -1713,6 +1713,8 @@ static int _wm8994_set_fll(struct snd_soc_codec *codec, int id, int src,
1713 snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset, 1713 snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset,
1714 WM8994_FLL1_ENA | WM8994_FLL1_FRAC, 1714 WM8994_FLL1_ENA | WM8994_FLL1_FRAC,
1715 reg); 1715 reg);
1716
1717 msleep(5);
1716 } 1718 }
1717 1719
1718 wm8994->fll[id].in = freq_in; 1720 wm8994->fll[id].in = freq_in;
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index d75043ed7fc0..b194be09e74d 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -1929,8 +1929,9 @@ static void snd_soc_instantiate_card(struct snd_soc_card *card)
1929 "%s", card->name); 1929 "%s", card->name);
1930 snprintf(card->snd_card->longname, sizeof(card->snd_card->longname), 1930 snprintf(card->snd_card->longname, sizeof(card->snd_card->longname),
1931 "%s", card->long_name ? card->long_name : card->name); 1931 "%s", card->long_name ? card->long_name : card->name);
1932 snprintf(card->snd_card->driver, sizeof(card->snd_card->driver), 1932 if (card->driver_name)
1933 "%s", card->driver_name ? card->driver_name : card->name); 1933 strlcpy(card->snd_card->driver, card->driver_name,
1934 sizeof(card->snd_card->driver));
1934 1935
1935 if (card->late_probe) { 1936 if (card->late_probe) {
1936 ret = card->late_probe(card); 1937 ret = card->late_probe(card);
diff --git a/sound/soc/tegra/tegra_i2s.c b/sound/soc/tegra/tegra_i2s.c
index 6b817e20548c..95f03c10b4f7 100644
--- a/sound/soc/tegra/tegra_i2s.c
+++ b/sound/soc/tegra/tegra_i2s.c
@@ -222,12 +222,18 @@ static int tegra_i2s_hw_params(struct snd_pcm_substream *substream,
222 if (i2sclock % (2 * srate)) 222 if (i2sclock % (2 * srate))
223 reg |= TEGRA_I2S_TIMING_NON_SYM_ENABLE; 223 reg |= TEGRA_I2S_TIMING_NON_SYM_ENABLE;
224 224
225 if (!i2s->clk_refs)
226 clk_enable(i2s->clk_i2s);
227
225 tegra_i2s_write(i2s, TEGRA_I2S_TIMING, reg); 228 tegra_i2s_write(i2s, TEGRA_I2S_TIMING, reg);
226 229
227 tegra_i2s_write(i2s, TEGRA_I2S_FIFO_SCR, 230 tegra_i2s_write(i2s, TEGRA_I2S_FIFO_SCR,
228 TEGRA_I2S_FIFO_SCR_FIFO2_ATN_LVL_FOUR_SLOTS | 231 TEGRA_I2S_FIFO_SCR_FIFO2_ATN_LVL_FOUR_SLOTS |
229 TEGRA_I2S_FIFO_SCR_FIFO1_ATN_LVL_FOUR_SLOTS); 232 TEGRA_I2S_FIFO_SCR_FIFO1_ATN_LVL_FOUR_SLOTS);
230 233
234 if (!i2s->clk_refs)
235 clk_disable(i2s->clk_i2s);
236
231 return 0; 237 return 0;
232} 238}
233 239
diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c
index 337a00241a1f..4dd051bdf4fd 100644
--- a/sound/spi/at73c213.c
+++ b/sound/spi/at73c213.c
@@ -1124,6 +1124,6 @@ static void __exit at73c213_exit(void)
1124} 1124}
1125module_exit(at73c213_exit); 1125module_exit(at73c213_exit);
1126 1126
1127MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); 1127MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");
1128MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC"); 1128MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC");
1129MODULE_LICENSE("GPL"); 1129MODULE_LICENSE("GPL");