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-rw-r--r--Documentation/devicetree/bindings/arm/sirf.txt10
-rw-r--r--Documentation/devicetree/bindings/arm/vt8500.txt8
-rw-r--r--Documentation/devicetree/bindings/clock/imx31-clock.txt91
-rw-r--r--MAINTAINERS1
-rw-r--r--arch/arm/Kconfig17
-rw-r--r--arch/arm/Kconfig.debug32
-rw-r--r--arch/arm/boot/dts/Makefile4
-rw-r--r--arch/arm/boot/dts/emev2.dtsi7
-rw-r--r--arch/arm/boot/dts/imx31.dtsi17
-rw-r--r--arch/arm/boot/dts/marco-evb.dts54
-rw-r--r--arch/arm/boot/dts/marco.dtsi756
-rw-r--r--arch/arm/boot/dts/sh73a0-reference.dtsi24
-rw-r--r--arch/arm/boot/dts/sh73a0.dtsi100
-rw-r--r--arch/arm/boot/dts/wm8850-w70v2.dts47
-rw-r--r--arch/arm/boot/dts/wm8850.dtsi224
-rw-r--r--arch/arm/common/Kconfig23
-rw-r--r--arch/arm/common/Makefile2
-rw-r--r--arch/arm/configs/imx_v6_v7_defconfig2
-rw-r--r--arch/arm/configs/prima2_defconfig3
-rw-r--r--arch/arm/include/asm/mach/arch.h3
-rw-r--r--arch/arm/include/asm/mach/irq.h1
-rw-r--r--arch/arm/include/asm/mach/time.h30
-rw-r--r--arch/arm/include/debug/imx.S2
-rw-r--r--arch/arm/include/debug/vt8500.S (renamed from arch/arm/mach-vt8500/include/mach/debug-macro.S)24
-rw-r--r--arch/arm/kernel/irq.c10
-rw-r--r--arch/arm/kernel/smp.c3
-rw-r--r--arch/arm/kernel/smp_twd.c1
-rw-r--r--arch/arm/kernel/time.c53
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c12
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c53
-rw-r--r--arch/arm/mach-at91/at91x40_time.c13
-rw-r--r--arch/arm/mach-at91/board-1arm.c2
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c2
-rw-r--r--arch/arm/mach-at91/board-cam60.c2
-rw-r--r--arch/arm/mach-at91/board-carmeva.c2
-rw-r--r--arch/arm/mach-at91/board-cpu9krea.c2
-rw-r--r--arch/arm/mach-at91/board-cpuat91.c2
-rw-r--r--arch/arm/mach-at91/board-csb337.c2
-rw-r--r--arch/arm/mach-at91/board-csb637.c2
-rw-r--r--arch/arm/mach-at91/board-dt.c2
-rw-r--r--arch/arm/mach-at91/board-eb01.c2
-rw-r--r--arch/arm/mach-at91/board-eb9200.c2
-rw-r--r--arch/arm/mach-at91/board-ecbat91.c2
-rw-r--r--arch/arm/mach-at91/board-eco920.c2
-rw-r--r--arch/arm/mach-at91/board-flexibity.c2
-rw-r--r--arch/arm/mach-at91/board-foxg20.c2
-rw-r--r--arch/arm/mach-at91/board-gsia18s.c2
-rw-r--r--arch/arm/mach-at91/board-kafa.c2
-rw-r--r--arch/arm/mach-at91/board-kb9202.c2
-rw-r--r--arch/arm/mach-at91/board-neocore926.c2
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c2
-rw-r--r--arch/arm/mach-at91/board-picotux200.c2
-rw-r--r--arch/arm/mach-at91/board-qil-a9260.c2
-rw-r--r--arch/arm/mach-at91/board-rm9200-dt.c2
-rw-r--r--arch/arm/mach-at91/board-rm9200dk.c2
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c2
-rw-r--r--arch/arm/mach-at91/board-rsi-ews.c2
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c2
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c4
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c2
-rw-r--r--arch/arm/mach-at91/board-snapper9260.c2
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c4
-rw-r--r--arch/arm/mach-at91/board-usb-a926x.c6
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c2
-rw-r--r--arch/arm/mach-at91/generic.h7
-rw-r--r--arch/arm/mach-bcm/board_bcm.c22
-rw-r--r--arch/arm/mach-bcm2835/bcm2835.c30
-rw-r--r--arch/arm/mach-clps711x/board-autcpu12.c2
-rw-r--r--arch/arm/mach-clps711x/board-cdb89712.c2
-rw-r--r--arch/arm/mach-clps711x/board-clep7312.c2
-rw-r--r--arch/arm/mach-clps711x/board-edb7211.c2
-rw-r--r--arch/arm/mach-clps711x/board-fortunet.c2
-rw-r--r--arch/arm/mach-clps711x/board-p720t.c2
-rw-r--r--arch/arm/mach-clps711x/common.c6
-rw-r--r--arch/arm/mach-clps711x/common.h4
-rw-r--r--arch/arm/mach-cns3xxx/cns3420vb.c4
-rw-r--r--arch/arm/mach-cns3xxx/core.c21
-rw-r--r--arch/arm/mach-cns3xxx/core.h2
-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c11
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c11
-rw-r--r--arch/arm/mach-davinci/board-dm355-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm355-leopard.c2
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c4
-rw-r--r--arch/arm/mach-davinci/board-mityomapl138.c11
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c2
-rw-r--r--arch/arm/mach-davinci/board-omapl138-hawk.c2
-rw-r--r--arch/arm/mach-davinci/board-sffsdr.c2
-rw-r--r--arch/arm/mach-davinci/board-tnetv107x-evm.c2
-rw-r--r--arch/arm/mach-davinci/clock.c39
-rw-r--r--arch/arm/mach-davinci/clock.h3
-rw-r--r--arch/arm/mach-davinci/da850.c17
-rw-r--r--arch/arm/mach-davinci/da8xx-dt.c2
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c16
-rw-r--r--arch/arm/mach-davinci/include/mach/clock.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/common.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h3
-rw-r--r--arch/arm/mach-davinci/psc.c29
-rw-r--r--arch/arm/mach-davinci/time.c7
-rw-r--r--arch/arm/mach-dove/cm-a510.c2
-rw-r--r--arch/arm/mach-dove/common.c8
-rw-r--r--arch/arm/mach-dove/common.h2
-rw-r--r--arch/arm/mach-dove/dove-db-setup.c2
-rw-r--r--arch/arm/mach-ebsa110/core.c15
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c4
-rw-r--r--arch/arm/mach-ep93xx/core.c38
-rw-r--r--arch/arm/mach-ep93xx/edb93xx.c25
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c4
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h2
-rw-r--r--arch/arm/mach-ep93xx/micro9.c13
-rw-r--r--arch/arm/mach-ep93xx/simone.c4
-rw-r--r--arch/arm/mach-ep93xx/snappercl15.c4
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c4
-rw-r--r--arch/arm/mach-ep93xx/vision_ep9307.c4
-rw-r--r--arch/arm/mach-exynos/common.c10
-rw-r--r--arch/arm/mach-exynos/common.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-irq.h2
-rw-r--r--arch/arm/mach-exynos/mach-armlex4210.c4
-rw-r--r--arch/arm/mach-exynos/mach-exynos4-dt.c4
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c4
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c4
-rw-r--r--arch/arm/mach-exynos/mach-origen.c4
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c7
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c7
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c4
-rw-r--r--arch/arm/mach-exynos/mct.c25
-rw-r--r--arch/arm/mach-exynos/platsmp.c6
-rw-r--r--arch/arm/mach-footbridge/cats-hw.c2
-rw-r--r--arch/arm/mach-footbridge/common.h4
-rw-r--r--arch/arm/mach-footbridge/dc21285-timer.c12
-rw-r--r--arch/arm/mach-footbridge/ebsa285.c2
-rw-r--r--arch/arm/mach-footbridge/isa-timer.c6
-rw-r--r--arch/arm/mach-footbridge/netwinder-hw.c2
-rw-r--r--arch/arm/mach-footbridge/personal.c2
-rw-r--r--arch/arm/mach-gemini/board-nas4220b.c6
-rw-r--r--arch/arm/mach-gemini/board-rut1xx.c6
-rw-r--r--arch/arm/mach-gemini/board-wbd111.c6
-rw-r--r--arch/arm/mach-gemini/board-wbd222.c6
-rw-r--r--arch/arm/mach-h720x/common.c6
-rw-r--r--arch/arm/mach-h720x/common.h6
-rw-r--r--arch/arm/mach-h720x/cpu-h7201.c9
-rw-r--r--arch/arm/mach-h720x/cpu-h7202.c9
-rw-r--r--arch/arm/mach-h720x/h7201-eval.c2
-rw-r--r--arch/arm/mach-h720x/h7202-eval.c2
-rw-r--r--arch/arm/mach-highbank/highbank.c17
-rw-r--r--arch/arm/mach-highbank/platsmp.c6
-rw-r--r--arch/arm/mach-imx/Kconfig36
-rw-r--r--arch/arm/mach-imx/Makefile9
-rw-r--r--arch/arm/mach-imx/Makefile.boot4
-rw-r--r--arch/arm/mach-imx/clk-imx27.c7
-rw-r--r--arch/arm/mach-imx/clk-imx31.c15
-rw-r--r--arch/arm/mach-imx/clk-imx35.c4
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c12
-rw-r--r--arch/arm/mach-imx/common.h15
-rw-r--r--arch/arm/mach-imx/cpu-imx5.c39
-rw-r--r--arch/arm/mach-imx/cpuidle-imx6q.c95
-rw-r--r--arch/arm/mach-imx/cpuidle.h5
-rw-r--r--arch/arm/mach-imx/devices-imx50.h33
-rw-r--r--arch/arm/mach-imx/devices/Kconfig2
-rw-r--r--arch/arm/mach-imx/devices/platform-fec.c6
-rw-r--r--arch/arm/mach-imx/devices/platform-imx-i2c.c10
-rw-r--r--arch/arm/mach-imx/devices/platform-imx-uart.c12
-rw-r--r--arch/arm/mach-imx/epit.c15
-rw-r--r--arch/arm/mach-imx/gpc.c7
-rw-r--r--arch/arm/mach-imx/hardware.h6
-rw-r--r--arch/arm/mach-imx/imx25-dt.c11
-rw-r--r--arch/arm/mach-imx/imx27-dt.c16
-rw-r--r--arch/arm/mach-imx/imx31-dt.c28
-rw-r--r--arch/arm/mach-imx/imx51-dt.c16
-rw-r--r--arch/arm/mach-imx/iomux-mx50.h977
-rw-r--r--arch/arm/mach-imx/lluart.c47
-rw-r--r--arch/arm/mach-imx/mach-apf9328.c6
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c6
-rw-r--r--arch/arm/mach-imx/mach-bug.c6
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c6
-rw-r--r--arch/arm/mach-imx/mach-cpuimx35.c6
-rw-r--r--arch/arm/mach-imx/mach-cpuimx51sd.c6
-rw-r--r--arch/arm/mach-imx/mach-eukrea_cpuimx25.c6
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c6
-rw-r--r--arch/arm/mach-imx/mach-imx27ipcam.c6
-rw-r--r--arch/arm/mach-imx/mach-imx27lite.c6
-rw-r--r--arch/arm/mach-imx/mach-imx53.c16
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c37
-rw-r--r--arch/arm/mach-imx/mach-kzm_arm11_01.c6
-rw-r--r--arch/arm/mach-imx/mach-mx1ads.c8
-rw-r--r--arch/arm/mach-imx/mach-mx21ads.c6
-rw-r--r--arch/arm/mach-imx/mach-mx25_3ds.c6
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c6
-rw-r--r--arch/arm/mach-imx/mach-mx27ads.c6
-rw-r--r--arch/arm/mach-imx/mach-mx31_3ds.c6
-rw-r--r--arch/arm/mach-imx/mach-mx31ads.c6
-rw-r--r--arch/arm/mach-imx/mach-mx31lilly.c6
-rw-r--r--arch/arm/mach-imx/mach-mx31lite.c6
-rw-r--r--arch/arm/mach-imx/mach-mx31moboard.c6
-rw-r--r--arch/arm/mach-imx/mach-mx35_3ds.c6
-rw-r--r--arch/arm/mach-imx/mach-mx50_rdp.c225
-rw-r--r--arch/arm/mach-imx/mach-mx51_3ds.c178
-rw-r--r--arch/arm/mach-imx/mach-mx51_babbage.c6
-rw-r--r--arch/arm/mach-imx/mach-mxt_td60.c6
-rw-r--r--arch/arm/mach-imx/mach-pca100.c6
-rw-r--r--arch/arm/mach-imx/mach-pcm037.c6
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c6
-rw-r--r--arch/arm/mach-imx/mach-pcm043.c6
-rw-r--r--arch/arm/mach-imx/mach-qong.c6
-rw-r--r--arch/arm/mach-imx/mach-scb9328.c6
-rw-r--r--arch/arm/mach-imx/mach-vpr200.c6
-rw-r--r--arch/arm/mach-imx/mm-imx5.c48
-rw-r--r--arch/arm/mach-imx/mx50.h290
-rw-r--r--arch/arm/mach-imx/mxc.h13
-rw-r--r--arch/arm/mach-imx/platsmp.c14
-rw-r--r--arch/arm/mach-imx/pm-imx5.c7
-rw-r--r--arch/arm/mach-imx/time.c18
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c16
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c16
-rw-r--r--arch/arm/mach-iop13xx/iq81340mc.c6
-rw-r--r--arch/arm/mach-iop13xx/iq81340sc.c6
-rw-r--r--arch/arm/mach-iop32x/em7210.c6
-rw-r--r--arch/arm/mach-iop32x/glantank.c6
-rw-r--r--arch/arm/mach-iop32x/iq31244.c8
-rw-r--r--arch/arm/mach-iop32x/iq80321.c6
-rw-r--r--arch/arm/mach-iop32x/n2100.c6
-rw-r--r--arch/arm/mach-iop33x/iq80331.c6
-rw-r--r--arch/arm/mach-iop33x/iq80332.c6
-rw-r--r--arch/arm/mach-ixp4xx/avila-setup.c4
-rw-r--r--arch/arm/mach-ixp4xx/common.c15
-rw-r--r--arch/arm/mach-ixp4xx/coyote-setup.c4
-rw-r--r--arch/arm/mach-ixp4xx/dsmg600-setup.c6
-rw-r--r--arch/arm/mach-ixp4xx/fsg-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/gateway7001-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c2
-rw-r--r--arch/arm/mach-ixp4xx/gtwx5715-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/platform.h3
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-setup.c8
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-setup.c6
-rw-r--r--arch/arm/mach-ixp4xx/omixp-setup.c6
-rw-r--r--arch/arm/mach-ixp4xx/vulcan-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/wg302v2-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/board-dt.c2
-rw-r--r--arch/arm/mach-kirkwood/common.c6
-rw-r--r--arch/arm/mach-kirkwood/common.h2
-rw-r--r--arch/arm/mach-kirkwood/d2net_v2-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/db88f6281-bp-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/dockstar-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/guruplug-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/netspace_v2-setup.c6
-rw-r--r--arch/arm/mach-kirkwood/netxbig_v2-setup.c4
-rw-r--r--arch/arm/mach-kirkwood/openrd-setup.c6
-rw-r--r--arch/arm/mach-kirkwood/rd88f6192-nas-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/rd88f6281-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/sheevaplug-setup.c4
-rw-r--r--arch/arm/mach-kirkwood/t5325-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/ts219-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/ts41x-setup.c2
-rw-r--r--arch/arm/mach-ks8695/board-acs5k.c2
-rw-r--r--arch/arm/mach-ks8695/board-dsm320.c2
-rw-r--r--arch/arm/mach-ks8695/board-micrel.c2
-rw-r--r--arch/arm/mach-ks8695/board-og.c10
-rw-r--r--arch/arm/mach-ks8695/board-sg.c6
-rw-r--r--arch/arm/mach-ks8695/generic.h2
-rw-r--r--arch/arm/mach-ks8695/time.c6
-rw-r--r--arch/arm/mach-lpc32xx/common.h2
-rw-r--r--arch/arm/mach-lpc32xx/phy3250.c2
-rw-r--r--arch/arm/mach-lpc32xx/timer.c16
-rw-r--r--arch/arm/mach-mmp/aspenite.c4
-rw-r--r--arch/arm/mach-mmp/avengers_lite.c2
-rw-r--r--arch/arm/mach-mmp/brownstone.c2
-rw-r--r--arch/arm/mach-mmp/common.h2
-rw-r--r--arch/arm/mach-mmp/flint.c2
-rw-r--r--arch/arm/mach-mmp/gplugd.c2
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h4
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h4
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa910.h4
-rw-r--r--arch/arm/mach-mmp/jasper.c2
-rw-r--r--arch/arm/mach-mmp/mmp-dt.c8
-rw-r--r--arch/arm/mach-mmp/mmp2-dt.c6
-rw-r--r--arch/arm/mach-mmp/mmp2.c6
-rw-r--r--arch/arm/mach-mmp/pxa168.c6
-rw-r--r--arch/arm/mach-mmp/pxa910.c6
-rw-r--r--arch/arm/mach-mmp/tavorevb.c2
-rw-r--r--arch/arm/mach-mmp/teton_bga.c2
-rw-r--r--arch/arm/mach-mmp/time.c7
-rw-r--r--arch/arm/mach-mmp/ttc_dkb.c2
-rw-r--r--arch/arm/mach-msm/board-dt-8660.c18
-rw-r--r--arch/arm/mach-msm/board-dt-8960.c18
-rw-r--r--arch/arm/mach-msm/board-halibut.c2
-rw-r--r--arch/arm/mach-msm/board-mahimahi.c4
-rw-r--r--arch/arm/mach-msm/board-msm7x30.c6
-rw-r--r--arch/arm/mach-msm/board-qsd8x50.c4
-rw-r--r--arch/arm/mach-msm/board-sapphire.c4
-rw-r--r--arch/arm/mach-msm/board-trout.c2
-rw-r--r--arch/arm/mach-msm/common.h8
-rw-r--r--arch/arm/mach-msm/platsmp.c6
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-rw-r--r--arch/arm/mach-versatile/core.c9
-rw-r--r--arch/arm/mach-versatile/core.h2
-rw-r--r--arch/arm/mach-versatile/versatile_ab.c4
-rw-r--r--arch/arm/mach-versatile/versatile_dt.c4
-rw-r--r--arch/arm/mach-versatile/versatile_pb.c4
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c4
-rw-r--r--arch/arm/mach-vexpress/platsmp.c3
-rw-r--r--arch/arm/mach-vexpress/v2m.c28
-rw-r--r--arch/arm/mach-vt8500/Kconfig28
-rw-r--r--arch/arm/mach-vt8500/Makefile2
-rw-r--r--arch/arm/mach-vt8500/common.h1
-rw-r--r--arch/arm/mach-vt8500/include/mach/uncompress.h37
-rw-r--r--arch/arm/mach-vt8500/vt8500.c9
-rw-r--r--arch/arm/mach-w90x900/mach-nuc910evb.c2
-rw-r--r--arch/arm/mach-w90x900/mach-nuc950evb.c2
-rw-r--r--arch/arm/mach-w90x900/mach-nuc960evb.c2
-rw-r--r--arch/arm/mach-w90x900/nuc9xx.h3
-rw-r--r--arch/arm/mach-w90x900/time.c16
-rw-r--r--arch/arm/mach-zynq/common.c26
-rw-r--r--arch/arm/plat-iop/time.c9
-rw-r--r--arch/arm/plat-orion/time.c6
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h3
-rw-r--r--arch/arm/plat-samsung/include/plat/s5p-time.h2
-rw-r--r--arch/arm/plat-samsung/s5p-irq-eint.c3
-rw-r--r--arch/arm/plat-samsung/s5p-irq.c3
-rw-r--r--arch/arm/plat-samsung/s5p-time.c15
-rw-r--r--arch/arm/plat-samsung/time.c20
-rw-r--r--arch/arm/plat-spear/time.c8
-rw-r--r--arch/arm/plat-versatile/platsmp.c4
-rw-r--r--arch/blackfin/kernel/time.c6
-rw-r--r--arch/cris/arch-v10/kernel/time.c10
-rw-r--r--arch/cris/kernel/time.c11
-rw-r--r--arch/m32r/kernel/time.c4
-rw-r--r--arch/m68k/amiga/config.c10
-rw-r--r--arch/m68k/apollo/config.c9
-rw-r--r--arch/m68k/atari/config.c4
-rw-r--r--arch/m68k/atari/time.c6
-rw-r--r--arch/m68k/bvme6000/config.c10
-rw-r--r--arch/m68k/hp300/config.c2
-rw-r--r--arch/m68k/hp300/time.c4
-rw-r--r--arch/m68k/hp300/time.h2
-rw-r--r--arch/m68k/include/asm/machdep.h2
-rw-r--r--arch/m68k/kernel/setup_mm.c1
-rw-r--r--arch/m68k/kernel/time.c15
-rw-r--r--arch/m68k/mac/config.c4
-rw-r--r--arch/m68k/mac/via.c4
-rw-r--r--arch/m68k/mvme147/config.c8
-rw-r--r--arch/m68k/mvme16x/config.c8
-rw-r--r--arch/m68k/q40/config.c8
-rw-r--r--arch/m68k/sun3/config.c4
-rw-r--r--arch/m68k/sun3/intersil.c4
-rw-r--r--arch/m68k/sun3x/config.c2
-rw-r--r--arch/m68k/sun3x/time.c2
-rw-r--r--arch/m68k/sun3x/time.h2
-rw-r--r--drivers/clk/clk-bcm2835.c9
-rw-r--r--drivers/clocksource/Kconfig6
-rw-r--r--drivers/clocksource/Makefile2
-rw-r--r--drivers/clocksource/bcm2835_timer.c6
-rw-r--r--drivers/clocksource/clksrc-of.c35
-rw-r--r--drivers/clocksource/cs5535-clockevt.c11
-rw-r--r--drivers/clocksource/dw_apb_timer_of.c6
-rw-r--r--drivers/clocksource/nomadik-mtu.c33
-rw-r--r--drivers/clocksource/sunxi_timer.c17
-rw-r--r--drivers/clocksource/tcb_clksrc.c7
-rw-r--r--drivers/clocksource/vt8500_timer.c (renamed from arch/arm/mach-vt8500/timer.c)9
-rw-r--r--drivers/irqchip/Kconfig27
-rw-r--r--drivers/irqchip/Makefile6
-rw-r--r--drivers/irqchip/irq-gic.c (renamed from arch/arm/common/gic.c)59
-rw-r--r--drivers/irqchip/irq-vic.c (renamed from arch/arm/common/vic.c)95
-rw-r--r--drivers/irqchip/irqchip.c30
-rw-r--r--drivers/irqchip/irqchip.h29
-rw-r--r--drivers/irqchip/spear-shirq.c5
-rw-r--r--drivers/mfd/db8500-prcmu.c2
-rw-r--r--include/asm-generic/vmlinux.lds.h22
-rw-r--r--include/linux/bcm2835_timer.h2
-rw-r--r--include/linux/clocksource.h9
-rw-r--r--include/linux/dw_apb_timer.h2
-rw-r--r--include/linux/irqchip.h16
-rw-r--r--include/linux/irqchip/arm-gic.h (renamed from arch/arm/include/asm/hardware/gic.h)15
-rw-r--r--include/linux/irqchip/arm-vic.h (renamed from arch/arm/include/asm/hardware/vic.h)25
-rw-r--r--include/linux/sunxi_timer.h2
-rw-r--r--include/linux/time.h4
-rw-r--r--include/linux/vt8500_timer.h (renamed from arch/arm/mach-vt8500/include/mach/timex.h)18
-rw-r--r--kernel/time/clockevents.c1
-rw-r--r--kernel/time/timekeeping.c26
679 files changed, 4176 insertions, 4522 deletions
diff --git a/Documentation/devicetree/bindings/arm/sirf.txt b/Documentation/devicetree/bindings/arm/sirf.txt
index 1881e1c6dda5..c6ba6d3c747f 100644
--- a/Documentation/devicetree/bindings/arm/sirf.txt
+++ b/Documentation/devicetree/bindings/arm/sirf.txt
@@ -1,3 +1,9 @@
1prima2 "cb" evaluation board 1CSR SiRFprimaII and SiRFmarco device tree bindings.
2========================================
3
2Required root node properties: 4Required root node properties:
3 - compatible = "sirf,prima2-cb", "sirf,prima2"; 5 - compatible:
6 - "sirf,prima2-cb" : prima2 "cb" evaluation board
7 - "sirf,marco-cb" : marco "cb" evaluation board
8 - "sirf,prima2" : prima2 device based board
9 - "sirf,marco" : marco device based board
diff --git a/Documentation/devicetree/bindings/arm/vt8500.txt b/Documentation/devicetree/bindings/arm/vt8500.txt
index d657832c6819..87dc1ddf4770 100644
--- a/Documentation/devicetree/bindings/arm/vt8500.txt
+++ b/Documentation/devicetree/bindings/arm/vt8500.txt
@@ -12,3 +12,11 @@ compatible = "wm,wm8505";
12Boards with the Wondermedia WM8650 SoC shall have the following properties: 12Boards with the Wondermedia WM8650 SoC shall have the following properties:
13Required root node property: 13Required root node property:
14compatible = "wm,wm8650"; 14compatible = "wm,wm8650";
15
16Boards with the Wondermedia WM8750 SoC shall have the following properties:
17Required root node property:
18compatible = "wm,wm8750";
19
20Boards with the Wondermedia WM8850 SoC shall have the following properties:
21Required root node property:
22compatible = "wm,wm8850";
diff --git a/Documentation/devicetree/bindings/clock/imx31-clock.txt b/Documentation/devicetree/bindings/clock/imx31-clock.txt
new file mode 100644
index 000000000000..19df842c694f
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/imx31-clock.txt
@@ -0,0 +1,91 @@
1* Clock bindings for Freescale i.MX31
2
3Required properties:
4- compatible: Should be "fsl,imx31-ccm"
5- reg: Address and length of the register set
6- interrupts: Should contain CCM interrupt
7- #clock-cells: Should be <1>
8
9The clock consumer should specify the desired clock by having the clock
10ID in its "clocks" phandle cell. The following is a full list of i.MX31
11clocks and IDs.
12
13 Clock ID
14 -----------------------
15 dummy 0
16 ckih 1
17 ckil 2
18 mpll 3
19 spll 4
20 upll 5
21 mcu_main 6
22 hsp 7
23 ahb 8
24 nfc 9
25 ipg 10
26 per_div 11
27 per 12
28 csi_sel 13
29 fir_sel 14
30 csi_div 15
31 usb_div_pre 16
32 usb_div_post 17
33 fir_div_pre 18
34 fir_div_post 19
35 sdhc1_gate 20
36 sdhc2_gate 21
37 gpt_gate 22
38 epit1_gate 23
39 epit2_gate 24
40 iim_gate 25
41 ata_gate 26
42 sdma_gate 27
43 cspi3_gate 28
44 rng_gate 29
45 uart1_gate 30
46 uart2_gate 31
47 ssi1_gate 32
48 i2c1_gate 33
49 i2c2_gate 34
50 i2c3_gate 35
51 hantro_gate 36
52 mstick1_gate 37
53 mstick2_gate 38
54 csi_gate 39
55 rtc_gate 40
56 wdog_gate 41
57 pwm_gate 42
58 sim_gate 43
59 ect_gate 44
60 usb_gate 45
61 kpp_gate 46
62 ipu_gate 47
63 uart3_gate 48
64 uart4_gate 49
65 uart5_gate 50
66 owire_gate 51
67 ssi2_gate 52
68 cspi1_gate 53
69 cspi2_gate 54
70 gacc_gate 55
71 emi_gate 56
72 rtic_gate 57
73 firi_gate 58
74
75Examples:
76
77clks: ccm@53f80000{
78 compatible = "fsl,imx31-ccm";
79 reg = <0x53f80000 0x4000>;
80 interrupts = <0 31 0x04 0 53 0x04>;
81 #clock-cells = <1>;
82};
83
84uart1: serial@43f90000 {
85 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
86 reg = <0x43f90000 0x4000>;
87 interrupts = <45>;
88 clocks = <&clks 10>, <&clks 30>;
89 clock-names = "ipg", "per";
90 status = "disabled";
91};
diff --git a/MAINTAINERS b/MAINTAINERS
index 212c255b9347..43dbae19838b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4216,6 +4216,7 @@ M: Thomas Gleixner <tglx@linutronix.de>
4216S: Maintained 4216S: Maintained
4217T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core 4217T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
4218F: kernel/irq/ 4218F: kernel/irq/
4219F: drivers/irqchip/
4219 4220
4220IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY) 4221IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
4221M: Benjamin Herrenschmidt <benh@kernel.crashing.org> 4222M: Benjamin Herrenschmidt <benh@kernel.crashing.org>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 67874b82a4ed..a3ffd1a391a7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -393,6 +393,7 @@ config ARCH_GEMINI
393config ARCH_SIRF 393config ARCH_SIRF
394 bool "CSR SiRF" 394 bool "CSR SiRF"
395 select ARCH_REQUIRE_GPIOLIB 395 select ARCH_REQUIRE_GPIOLIB
396 select AUTO_ZRELADDR
396 select COMMON_CLK 397 select COMMON_CLK
397 select GENERIC_CLOCKEVENTS 398 select GENERIC_CLOCKEVENTS
398 select GENERIC_IRQ_CHIP 399 select GENERIC_IRQ_CHIP
@@ -949,22 +950,6 @@ config ARCH_OMAP
949 help 950 help
950 Support for TI's OMAP platform (OMAP1/2/3/4). 951 Support for TI's OMAP platform (OMAP1/2/3/4).
951 952
952config ARCH_VT8500_SINGLE
953 bool "VIA/WonderMedia 85xx"
954 select ARCH_HAS_CPUFREQ
955 select ARCH_REQUIRE_GPIOLIB
956 select CLKDEV_LOOKUP
957 select COMMON_CLK
958 select CPU_ARM926T
959 select GENERIC_CLOCKEVENTS
960 select GENERIC_GPIO
961 select HAVE_CLK
962 select MULTI_IRQ_HANDLER
963 select SPARSE_IRQ
964 select USE_OF
965 help
966 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
967
968endchoice 953endchoice
969 954
970menu "Multiple platform selection" 955menu "Multiple platform selection"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 661030d6bc6c..0cc8e3652b0e 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -219,12 +219,12 @@ choice
219 Say Y here if you want kernel low-level debugging support 219 Say Y here if you want kernel low-level debugging support
220 on i.MX51. 220 on i.MX51.
221 221
222 config DEBUG_IMX50_IMX53_UART 222 config DEBUG_IMX53_UART
223 bool "i.MX50 and i.MX53 Debug UART" 223 bool "i.MX53 Debug UART"
224 depends on SOC_IMX50 || SOC_IMX53 224 depends on SOC_IMX53
225 help 225 help
226 Say Y here if you want kernel low-level debugging support 226 Say Y here if you want kernel low-level debugging support
227 on i.MX50 or i.MX53. 227 on i.MX53.
228 228
229 config DEBUG_IMX6Q_UART 229 config DEBUG_IMX6Q_UART
230 bool "i.MX6Q Debug UART" 230 bool "i.MX6Q Debug UART"
@@ -386,6 +386,20 @@ choice
386 Say Y here if you want kernel low-level debugging support 386 Say Y here if you want kernel low-level debugging support
387 on Tegra based platforms. 387 on Tegra based platforms.
388 388
389 config DEBUG_SIRFPRIMA2_UART1
390 bool "Kernel low-level debugging messages via SiRFprimaII UART1"
391 depends on ARCH_PRIMA2
392 help
393 Say Y here if you want the debug print routines to direct
394 their output to the uart1 port on SiRFprimaII devices.
395
396 config DEBUG_SIRFMARCO_UART1
397 bool "Kernel low-level debugging messages via SiRFmarco UART1"
398 depends on ARCH_MARCO
399 help
400 Say Y here if you want the debug print routines to direct
401 their output to the uart1 port on SiRFmarco devices.
402
389 config DEBUG_VEXPRESS_UART0_DETECT 403 config DEBUG_VEXPRESS_UART0_DETECT
390 bool "Autodetect UART0 on Versatile Express Cortex-A core tiles" 404 bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
391 depends on ARCH_VEXPRESS && CPU_CP15_MMU 405 depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -412,6 +426,13 @@ choice
412 of the tiles using the RS1 memory map, including all new A-class 426 of the tiles using the RS1 memory map, including all new A-class
413 core tiles, FPGA-based SMMs and software models. 427 core tiles, FPGA-based SMMs and software models.
414 428
429 config DEBUG_VT8500_UART0
430 bool "Use UART0 on VIA/Wondermedia SoCs"
431 depends on ARCH_VT8500
432 help
433 This option selects UART0 on VIA/Wondermedia System-on-a-chip
434 devices, including VT8500, WM8505, WM8650 and WM8850.
435
415 config DEBUG_LL_UART_NONE 436 config DEBUG_LL_UART_NONE
416 bool "No low-level debugging UART" 437 bool "No low-level debugging UART"
417 depends on !ARCH_MULTIPLATFORM 438 depends on !ARCH_MULTIPLATFORM
@@ -497,7 +518,7 @@ config DEBUG_LL_INCLUDE
497 DEBUG_IMX21_IMX27_UART || \ 518 DEBUG_IMX21_IMX27_UART || \
498 DEBUG_IMX31_IMX35_UART || \ 519 DEBUG_IMX31_IMX35_UART || \
499 DEBUG_IMX51_UART || \ 520 DEBUG_IMX51_UART || \
500 DEBUG_IMX50_IMX53_UART ||\ 521 DEBUG_IMX53_UART ||\
501 DEBUG_IMX6Q_UART 522 DEBUG_IMX6Q_UART
502 default "debug/highbank.S" if DEBUG_HIGHBANK_UART 523 default "debug/highbank.S" if DEBUG_HIGHBANK_UART
503 default "debug/mvebu.S" if DEBUG_MVEBU_UART 524 default "debug/mvebu.S" if DEBUG_MVEBU_UART
@@ -506,6 +527,7 @@ config DEBUG_LL_INCLUDE
506 default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1 527 default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1
507 default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \ 528 default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
508 DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1 529 DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
530 default "debug/vt8500.S" if DEBUG_VT8500_UART0
509 default "debug/tegra.S" if DEBUG_TEGRA_UART 531 default "debug/tegra.S" if DEBUG_TEGRA_UART
510 default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1 532 default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
511 default "mach/debug-macro.S" 533 default "mach/debug-macro.S"
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5ebb44fe826a..3547d1495e4d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -73,6 +73,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
73 kirkwood-ts219-6281.dtb \ 73 kirkwood-ts219-6281.dtb \
74 kirkwood-ts219-6282.dtb \ 74 kirkwood-ts219-6282.dtb \
75 kirkwood-openblocks_a6.dtb 75 kirkwood-openblocks_a6.dtb
76dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
76dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \ 77dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
77 msm8960-cdp.dtb 78 msm8960-cdp.dtb
78dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ 79dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
@@ -151,7 +152,8 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
151 xenvm-4.2.dtb 152 xenvm-4.2.dtb
152dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \ 153dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
153 wm8505-ref.dtb \ 154 wm8505-ref.dtb \
154 wm8650-mid.dtb 155 wm8650-mid.dtb \
156 wm8850-w70v2.dtb
155dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb 157dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
156 158
157targets += dtbs 159targets += dtbs
diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
index eb504a6c0f4a..c8a8c08b48dd 100644
--- a/arch/arm/boot/dts/emev2.dtsi
+++ b/arch/arm/boot/dts/emev2.dtsi
@@ -15,11 +15,18 @@
15 interrupt-parent = <&gic>; 15 interrupt-parent = <&gic>;
16 16
17 cpus { 17 cpus {
18 #address-cells = <1>;
19 #size-cells = <0>;
20
18 cpu@0 { 21 cpu@0 {
22 device_type = "cpu";
19 compatible = "arm,cortex-a9"; 23 compatible = "arm,cortex-a9";
24 reg = <0>;
20 }; 25 };
21 cpu@1 { 26 cpu@1 {
27 device_type = "cpu";
22 compatible = "arm,cortex-a9"; 28 compatible = "arm,cortex-a9";
29 reg = <1>;
23 }; 30 };
24 }; 31 };
25 32
diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi
index eef7099f3e3c..454c2d175402 100644
--- a/arch/arm/boot/dts/imx31.dtsi
+++ b/arch/arm/boot/dts/imx31.dtsi
@@ -45,6 +45,8 @@
45 compatible = "fsl,imx31-uart", "fsl,imx21-uart"; 45 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
46 reg = <0x43f90000 0x4000>; 46 reg = <0x43f90000 0x4000>;
47 interrupts = <45>; 47 interrupts = <45>;
48 clocks = <&clks 10>, <&clks 30>;
49 clock-names = "ipg", "per";
48 status = "disabled"; 50 status = "disabled";
49 }; 51 };
50 52
@@ -52,12 +54,16 @@
52 compatible = "fsl,imx31-uart", "fsl,imx21-uart"; 54 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
53 reg = <0x43f94000 0x4000>; 55 reg = <0x43f94000 0x4000>;
54 interrupts = <32>; 56 interrupts = <32>;
57 clocks = <&clks 10>, <&clks 31>;
58 clock-names = "ipg", "per";
55 status = "disabled"; 59 status = "disabled";
56 }; 60 };
57 61
58 uart4: serial@43fb0000 { 62 uart4: serial@43fb0000 {
59 compatible = "fsl,imx31-uart", "fsl,imx21-uart"; 63 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
60 reg = <0x43fb0000 0x4000>; 64 reg = <0x43fb0000 0x4000>;
65 clocks = <&clks 10>, <&clks 49>;
66 clock-names = "ipg", "per";
61 interrupts = <46>; 67 interrupts = <46>;
62 status = "disabled"; 68 status = "disabled";
63 }; 69 };
@@ -66,6 +72,8 @@
66 compatible = "fsl,imx31-uart", "fsl,imx21-uart"; 72 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
67 reg = <0x43fb4000 0x4000>; 73 reg = <0x43fb4000 0x4000>;
68 interrupts = <47>; 74 interrupts = <47>;
75 clocks = <&clks 10>, <&clks 50>;
76 clock-names = "ipg", "per";
69 status = "disabled"; 77 status = "disabled";
70 }; 78 };
71 }; 79 };
@@ -81,8 +89,17 @@
81 compatible = "fsl,imx31-uart", "fsl,imx21-uart"; 89 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
82 reg = <0x5000c000 0x4000>; 90 reg = <0x5000c000 0x4000>;
83 interrupts = <18>; 91 interrupts = <18>;
92 clocks = <&clks 10>, <&clks 48>;
93 clock-names = "ipg", "per";
84 status = "disabled"; 94 status = "disabled";
85 }; 95 };
96
97 clks: ccm@53f80000{
98 compatible = "fsl,imx31-ccm";
99 reg = <0x53f80000 0x4000>;
100 interrupts = <0 31 0x04 0 53 0x04>;
101 #clock-cells = <1>;
102 };
86 }; 103 };
87 }; 104 };
88}; 105};
diff --git a/arch/arm/boot/dts/marco-evb.dts b/arch/arm/boot/dts/marco-evb.dts
new file mode 100644
index 000000000000..5130aeacfca5
--- /dev/null
+++ b/arch/arm/boot/dts/marco-evb.dts
@@ -0,0 +1,54 @@
1/*
2 * DTS file for CSR SiRFmarco Evaluation Board
3 *
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9/dts-v1/;
10
11/include/ "marco.dtsi"
12
13/ {
14 model = "CSR SiRFmarco Evaluation Board";
15 compatible = "sirf,marco-cb", "sirf,marco";
16
17 memory {
18 reg = <0x40000000 0x60000000>;
19 };
20
21 axi {
22 peri-iobg {
23 uart1: uart@cc060000 {
24 status = "okay";
25 };
26 uart2: uart@cc070000 {
27 status = "okay";
28 };
29 i2c0: i2c@cc0e0000 {
30 status = "okay";
31 fpga-cpld@4d {
32 compatible = "sirf,fpga-cpld";
33 reg = <0x4d>;
34 };
35 };
36 spi1: spi@cc170000 {
37 status = "okay";
38 pinctrl-names = "default";
39 pinctrl-0 = <&spi1_pins_a>;
40 spi@0 {
41 compatible = "spidev";
42 reg = <0>;
43 spi-max-frequency = <1000000>;
44 };
45 };
46 pci-iobg {
47 sd0: sdhci@cd000000 {
48 bus-width = <8>;
49 status = "okay";
50 };
51 };
52 };
53 };
54};
diff --git a/arch/arm/boot/dts/marco.dtsi b/arch/arm/boot/dts/marco.dtsi
new file mode 100644
index 000000000000..1579c3491ccd
--- /dev/null
+++ b/arch/arm/boot/dts/marco.dtsi
@@ -0,0 +1,756 @@
1/*
2 * DTS file for CSR SiRFmarco SoC
3 *
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9/include/ "skeleton.dtsi"
10/ {
11 compatible = "sirf,marco";
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&gic>;
15
16 cpus {
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 cpu@0 {
21 device_type = "cpu";
22 compatible = "arm,cortex-a9";
23 reg = <0>;
24 };
25 cpu@1 {
26 device_type = "cpu";
27 compatible = "arm,cortex-a9";
28 reg = <1>;
29 };
30 };
31
32 axi {
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 ranges = <0x40000000 0x40000000 0xa0000000>;
37
38 l2-cache-controller@c0030000 {
39 compatible = "sirf,marco-pl310-cache", "arm,pl310-cache";
40 reg = <0xc0030000 0x1000>;
41 interrupts = <0 59 0>;
42 arm,tag-latency = <1 1 1>;
43 arm,data-latency = <1 1 1>;
44 arm,filter-ranges = <0x40000000 0x80000000>;
45 };
46
47 gic: interrupt-controller@c0011000 {
48 compatible = "arm,cortex-a9-gic";
49 interrupt-controller;
50 #interrupt-cells = <3>;
51 reg = <0xc0011000 0x1000>,
52 <0xc0010100 0x0100>;
53 };
54
55 rstc-iobg {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges = <0xc2000000 0xc2000000 0x1000000>;
60
61 reset-controller@c2000000 {
62 compatible = "sirf,marco-rstc";
63 reg = <0xc2000000 0x10000>;
64 };
65 };
66
67 sys-iobg {
68 compatible = "simple-bus";
69 #address-cells = <1>;
70 #size-cells = <1>;
71 ranges = <0xc3000000 0xc3000000 0x1000000>;
72
73 clock-controller@c3000000 {
74 compatible = "sirf,marco-clkc";
75 reg = <0xc3000000 0x1000>;
76 interrupts = <0 3 0>;
77 };
78
79 rsc-controller@c3010000 {
80 compatible = "sirf,marco-rsc";
81 reg = <0xc3010000 0x1000>;
82 };
83 };
84
85 mem-iobg {
86 compatible = "simple-bus";
87 #address-cells = <1>;
88 #size-cells = <1>;
89 ranges = <0xc4000000 0xc4000000 0x1000000>;
90
91 memory-controller@c4000000 {
92 compatible = "sirf,marco-memc";
93 reg = <0xc4000000 0x10000>;
94 interrupts = <0 27 0>;
95 };
96 };
97
98 disp-iobg0 {
99 compatible = "simple-bus";
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges = <0xc5000000 0xc5000000 0x1000000>;
103
104 display0@c5000000 {
105 compatible = "sirf,marco-lcd";
106 reg = <0xc5000000 0x10000>;
107 interrupts = <0 30 0>;
108 };
109
110 vpp0@c5010000 {
111 compatible = "sirf,marco-vpp";
112 reg = <0xc5010000 0x10000>;
113 interrupts = <0 31 0>;
114 };
115 };
116
117 disp-iobg1 {
118 compatible = "simple-bus";
119 #address-cells = <1>;
120 #size-cells = <1>;
121 ranges = <0xc6000000 0xc6000000 0x1000000>;
122
123 display1@c6000000 {
124 compatible = "sirf,marco-lcd";
125 reg = <0xc6000000 0x10000>;
126 interrupts = <0 62 0>;
127 };
128
129 vpp1@c6010000 {
130 compatible = "sirf,marco-vpp";
131 reg = <0xc6010000 0x10000>;
132 interrupts = <0 63 0>;
133 };
134 };
135
136 graphics-iobg {
137 compatible = "simple-bus";
138 #address-cells = <1>;
139 #size-cells = <1>;
140 ranges = <0xc8000000 0xc8000000 0x1000000>;
141
142 graphics@c8000000 {
143 compatible = "powervr,sgx540";
144 reg = <0xc8000000 0x1000000>;
145 interrupts = <0 6 0>;
146 };
147 };
148
149 multimedia-iobg {
150 compatible = "simple-bus";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 ranges = <0xc9000000 0xc9000000 0x1000000>;
154
155 multimedia@a0000000 {
156 compatible = "sirf,marco-video-codec";
157 reg = <0xc9000000 0x1000000>;
158 interrupts = <0 5 0>;
159 };
160 };
161
162 dsp-iobg {
163 compatible = "simple-bus";
164 #address-cells = <1>;
165 #size-cells = <1>;
166 ranges = <0xca000000 0xca000000 0x2000000>;
167
168 dspif@ca000000 {
169 compatible = "sirf,marco-dspif";
170 reg = <0xca000000 0x10000>;
171 interrupts = <0 9 0>;
172 };
173
174 gps@ca010000 {
175 compatible = "sirf,marco-gps";
176 reg = <0xca010000 0x10000>;
177 interrupts = <0 7 0>;
178 };
179
180 dsp@cb000000 {
181 compatible = "sirf,marco-dsp";
182 reg = <0xcb000000 0x1000000>;
183 interrupts = <0 8 0>;
184 };
185 };
186
187 peri-iobg {
188 compatible = "simple-bus";
189 #address-cells = <1>;
190 #size-cells = <1>;
191 ranges = <0xcc000000 0xcc000000 0x2000000>;
192
193 timer@cc020000 {
194 compatible = "sirf,marco-tick";
195 reg = <0xcc020000 0x1000>;
196 interrupts = <0 0 0>,
197 <0 1 0>,
198 <0 2 0>,
199 <0 49 0>,
200 <0 50 0>,
201 <0 51 0>;
202 };
203
204 nand@cc030000 {
205 compatible = "sirf,marco-nand";
206 reg = <0xcc030000 0x10000>;
207 interrupts = <0 41 0>;
208 };
209
210 audio@cc040000 {
211 compatible = "sirf,marco-audio";
212 reg = <0xcc040000 0x10000>;
213 interrupts = <0 35 0>;
214 };
215
216 uart0: uart@cc050000 {
217 cell-index = <0>;
218 compatible = "sirf,marco-uart";
219 reg = <0xcc050000 0x1000>;
220 interrupts = <0 17 0>;
221 fifosize = <128>;
222 status = "disabled";
223 };
224
225 uart1: uart@cc060000 {
226 cell-index = <1>;
227 compatible = "sirf,marco-uart";
228 reg = <0xcc060000 0x1000>;
229 interrupts = <0 18 0>;
230 fifosize = <32>;
231 status = "disabled";
232 };
233
234 uart2: uart@cc070000 {
235 cell-index = <2>;
236 compatible = "sirf,marco-uart";
237 reg = <0xcc070000 0x1000>;
238 interrupts = <0 19 0>;
239 fifosize = <128>;
240 status = "disabled";
241 };
242
243 uart3: uart@cc190000 {
244 cell-index = <3>;
245 compatible = "sirf,marco-uart";
246 reg = <0xcc190000 0x1000>;
247 interrupts = <0 66 0>;
248 fifosize = <128>;
249 status = "disabled";
250 };
251
252 uart4: uart@cc1a0000 {
253 cell-index = <4>;
254 compatible = "sirf,marco-uart";
255 reg = <0xcc1a0000 0x1000>;
256 interrupts = <0 69 0>;
257 fifosize = <128>;
258 status = "disabled";
259 };
260
261 usp0: usp@cc080000 {
262 cell-index = <0>;
263 compatible = "sirf,marco-usp";
264 reg = <0xcc080000 0x10000>;
265 interrupts = <0 20 0>;
266 status = "disabled";
267 };
268
269 usp1: usp@cc090000 {
270 cell-index = <1>;
271 compatible = "sirf,marco-usp";
272 reg = <0xcc090000 0x10000>;
273 interrupts = <0 21 0>;
274 status = "disabled";
275 };
276
277 usp2: usp@cc0a0000 {
278 cell-index = <2>;
279 compatible = "sirf,marco-usp";
280 reg = <0xcc0a0000 0x10000>;
281 interrupts = <0 22 0>;
282 status = "disabled";
283 };
284
285 dmac0: dma-controller@cc0b0000 {
286 cell-index = <0>;
287 compatible = "sirf,marco-dmac";
288 reg = <0xcc0b0000 0x10000>;
289 interrupts = <0 12 0>;
290 };
291
292 dmac1: dma-controller@cc160000 {
293 cell-index = <1>;
294 compatible = "sirf,marco-dmac";
295 reg = <0xcc160000 0x10000>;
296 interrupts = <0 13 0>;
297 };
298
299 vip@cc0c0000 {
300 compatible = "sirf,marco-vip";
301 reg = <0xcc0c0000 0x10000>;
302 };
303
304 spi0: spi@cc0d0000 {
305 cell-index = <0>;
306 compatible = "sirf,marco-spi";
307 reg = <0xcc0d0000 0x10000>;
308 interrupts = <0 15 0>;
309 sirf,spi-num-chipselects = <1>;
310 cs-gpios = <&gpio 0 0>;
311 sirf,spi-dma-rx-channel = <25>;
312 sirf,spi-dma-tx-channel = <20>;
313 #address-cells = <1>;
314 #size-cells = <0>;
315 status = "disabled";
316 };
317
318 spi1: spi@cc170000 {
319 cell-index = <1>;
320 compatible = "sirf,marco-spi";
321 reg = <0xcc170000 0x10000>;
322 interrupts = <0 16 0>;
323 sirf,spi-num-chipselects = <1>;
324 cs-gpios = <&gpio 0 0>;
325 sirf,spi-dma-rx-channel = <12>;
326 sirf,spi-dma-tx-channel = <13>;
327 #address-cells = <1>;
328 #size-cells = <0>;
329 status = "disabled";
330 };
331
332 i2c0: i2c@cc0e0000 {
333 cell-index = <0>;
334 compatible = "sirf,marco-i2c";
335 reg = <0xcc0e0000 0x10000>;
336 interrupts = <0 24 0>;
337 #address-cells = <1>;
338 #size-cells = <0>;
339 status = "disabled";
340 };
341
342 i2c1: i2c@cc0f0000 {
343 cell-index = <1>;
344 compatible = "sirf,marco-i2c";
345 reg = <0xcc0f0000 0x10000>;
346 interrupts = <0 25 0>;
347 #address-cells = <1>;
348 #size-cells = <0>;
349 status = "disabled";
350 };
351
352 tsc@cc110000 {
353 compatible = "sirf,marco-tsc";
354 reg = <0xcc110000 0x10000>;
355 interrupts = <0 33 0>;
356 };
357
358 gpio: pinctrl@cc120000 {
359 #gpio-cells = <2>;
360 #interrupt-cells = <2>;
361 compatible = "sirf,marco-pinctrl";
362 reg = <0xcc120000 0x10000>;
363 interrupts = <0 43 0>,
364 <0 44 0>,
365 <0 45 0>,
366 <0 46 0>,
367 <0 47 0>;
368 gpio-controller;
369 interrupt-controller;
370
371 lcd_16pins_a: lcd0_0 {
372 lcd {
373 sirf,pins = "lcd_16bitsgrp";
374 sirf,function = "lcd_16bits";
375 };
376 };
377 lcd_18pins_a: lcd0_1 {
378 lcd {
379 sirf,pins = "lcd_18bitsgrp";
380 sirf,function = "lcd_18bits";
381 };
382 };
383 lcd_24pins_a: lcd0_2 {
384 lcd {
385 sirf,pins = "lcd_24bitsgrp";
386 sirf,function = "lcd_24bits";
387 };
388 };
389 lcdrom_pins_a: lcdrom0_0 {
390 lcd {
391 sirf,pins = "lcdromgrp";
392 sirf,function = "lcdrom";
393 };
394 };
395 uart0_pins_a: uart0_0 {
396 uart {
397 sirf,pins = "uart0grp";
398 sirf,function = "uart0";
399 };
400 };
401 uart1_pins_a: uart1_0 {
402 uart {
403 sirf,pins = "uart1grp";
404 sirf,function = "uart1";
405 };
406 };
407 uart2_pins_a: uart2_0 {
408 uart {
409 sirf,pins = "uart2grp";
410 sirf,function = "uart2";
411 };
412 };
413 uart2_noflow_pins_a: uart2_1 {
414 uart {
415 sirf,pins = "uart2_nostreamctrlgrp";
416 sirf,function = "uart2_nostreamctrl";
417 };
418 };
419 spi0_pins_a: spi0_0 {
420 spi {
421 sirf,pins = "spi0grp";
422 sirf,function = "spi0";
423 };
424 };
425 spi1_pins_a: spi1_0 {
426 spi {
427 sirf,pins = "spi1grp";
428 sirf,function = "spi1";
429 };
430 };
431 i2c0_pins_a: i2c0_0 {
432 i2c {
433 sirf,pins = "i2c0grp";
434 sirf,function = "i2c0";
435 };
436 };
437 i2c1_pins_a: i2c1_0 {
438 i2c {
439 sirf,pins = "i2c1grp";
440 sirf,function = "i2c1";
441 };
442 };
443 pwm0_pins_a: pwm0_0 {
444 pwm {
445 sirf,pins = "pwm0grp";
446 sirf,function = "pwm0";
447 };
448 };
449 pwm1_pins_a: pwm1_0 {
450 pwm {
451 sirf,pins = "pwm1grp";
452 sirf,function = "pwm1";
453 };
454 };
455 pwm2_pins_a: pwm2_0 {
456 pwm {
457 sirf,pins = "pwm2grp";
458 sirf,function = "pwm2";
459 };
460 };
461 pwm3_pins_a: pwm3_0 {
462 pwm {
463 sirf,pins = "pwm3grp";
464 sirf,function = "pwm3";
465 };
466 };
467 gps_pins_a: gps_0 {
468 gps {
469 sirf,pins = "gpsgrp";
470 sirf,function = "gps";
471 };
472 };
473 vip_pins_a: vip_0 {
474 vip {
475 sirf,pins = "vipgrp";
476 sirf,function = "vip";
477 };
478 };
479 sdmmc0_pins_a: sdmmc0_0 {
480 sdmmc0 {
481 sirf,pins = "sdmmc0grp";
482 sirf,function = "sdmmc0";
483 };
484 };
485 sdmmc1_pins_a: sdmmc1_0 {
486 sdmmc1 {
487 sirf,pins = "sdmmc1grp";
488 sirf,function = "sdmmc1";
489 };
490 };
491 sdmmc2_pins_a: sdmmc2_0 {
492 sdmmc2 {
493 sirf,pins = "sdmmc2grp";
494 sirf,function = "sdmmc2";
495 };
496 };
497 sdmmc3_pins_a: sdmmc3_0 {
498 sdmmc3 {
499 sirf,pins = "sdmmc3grp";
500 sirf,function = "sdmmc3";
501 };
502 };
503 sdmmc4_pins_a: sdmmc4_0 {
504 sdmmc4 {
505 sirf,pins = "sdmmc4grp";
506 sirf,function = "sdmmc4";
507 };
508 };
509 sdmmc5_pins_a: sdmmc5_0 {
510 sdmmc5 {
511 sirf,pins = "sdmmc5grp";
512 sirf,function = "sdmmc5";
513 };
514 };
515 i2s_pins_a: i2s_0 {
516 i2s {
517 sirf,pins = "i2sgrp";
518 sirf,function = "i2s";
519 };
520 };
521 ac97_pins_a: ac97_0 {
522 ac97 {
523 sirf,pins = "ac97grp";
524 sirf,function = "ac97";
525 };
526 };
527 nand_pins_a: nand_0 {
528 nand {
529 sirf,pins = "nandgrp";
530 sirf,function = "nand";
531 };
532 };
533 usp0_pins_a: usp0_0 {
534 usp0 {
535 sirf,pins = "usp0grp";
536 sirf,function = "usp0";
537 };
538 };
539 usp1_pins_a: usp1_0 {
540 usp1 {
541 sirf,pins = "usp1grp";
542 sirf,function = "usp1";
543 };
544 };
545 usp2_pins_a: usp2_0 {
546 usp2 {
547 sirf,pins = "usp2grp";
548 sirf,function = "usp2";
549 };
550 };
551 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus_0 {
552 usb0_utmi_drvbus {
553 sirf,pins = "usb0_utmi_drvbusgrp";
554 sirf,function = "usb0_utmi_drvbus";
555 };
556 };
557 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus_0 {
558 usb1_utmi_drvbus {
559 sirf,pins = "usb1_utmi_drvbusgrp";
560 sirf,function = "usb1_utmi_drvbus";
561 };
562 };
563 warm_rst_pins_a: warm_rst_0 {
564 warm_rst {
565 sirf,pins = "warm_rstgrp";
566 sirf,function = "warm_rst";
567 };
568 };
569 pulse_count_pins_a: pulse_count_0 {
570 pulse_count {
571 sirf,pins = "pulse_countgrp";
572 sirf,function = "pulse_count";
573 };
574 };
575 cko0_rst_pins_a: cko0_rst_0 {
576 cko0_rst {
577 sirf,pins = "cko0_rstgrp";
578 sirf,function = "cko0_rst";
579 };
580 };
581 cko1_rst_pins_a: cko1_rst_0 {
582 cko1_rst {
583 sirf,pins = "cko1_rstgrp";
584 sirf,function = "cko1_rst";
585 };
586 };
587 };
588
589 pwm@cc130000 {
590 compatible = "sirf,marco-pwm";
591 reg = <0xcc130000 0x10000>;
592 };
593
594 efusesys@cc140000 {
595 compatible = "sirf,marco-efuse";
596 reg = <0xcc140000 0x10000>;
597 };
598
599 pulsec@cc150000 {
600 compatible = "sirf,marco-pulsec";
601 reg = <0xcc150000 0x10000>;
602 interrupts = <0 48 0>;
603 };
604
605 pci-iobg {
606 compatible = "sirf,marco-pciiobg", "simple-bus";
607 #address-cells = <1>;
608 #size-cells = <1>;
609 ranges = <0xcd000000 0xcd000000 0x1000000>;
610
611 sd0: sdhci@cd000000 {
612 cell-index = <0>;
613 compatible = "sirf,marco-sdhc";
614 reg = <0xcd000000 0x100000>;
615 interrupts = <0 38 0>;
616 status = "disabled";
617 };
618
619 sd1: sdhci@cd100000 {
620 cell-index = <1>;
621 compatible = "sirf,marco-sdhc";
622 reg = <0xcd100000 0x100000>;
623 interrupts = <0 38 0>;
624 status = "disabled";
625 };
626
627 sd2: sdhci@cd200000 {
628 cell-index = <2>;
629 compatible = "sirf,marco-sdhc";
630 reg = <0xcd200000 0x100000>;
631 interrupts = <0 23 0>;
632 status = "disabled";
633 };
634
635 sd3: sdhci@cd300000 {
636 cell-index = <3>;
637 compatible = "sirf,marco-sdhc";
638 reg = <0xcd300000 0x100000>;
639 interrupts = <0 23 0>;
640 status = "disabled";
641 };
642
643 sd4: sdhci@cd400000 {
644 cell-index = <4>;
645 compatible = "sirf,marco-sdhc";
646 reg = <0xcd400000 0x100000>;
647 interrupts = <0 39 0>;
648 status = "disabled";
649 };
650
651 sd5: sdhci@cd500000 {
652 cell-index = <5>;
653 compatible = "sirf,marco-sdhc";
654 reg = <0xcd500000 0x100000>;
655 interrupts = <0 39 0>;
656 status = "disabled";
657 };
658
659 pci-copy@cd900000 {
660 compatible = "sirf,marco-pcicp";
661 reg = <0xcd900000 0x100000>;
662 interrupts = <0 40 0>;
663 };
664
665 rom-interface@cda00000 {
666 compatible = "sirf,marco-romif";
667 reg = <0xcda00000 0x100000>;
668 };
669 };
670 };
671
672 rtc-iobg {
673 compatible = "sirf,marco-rtciobg", "sirf-marco-rtciobg-bus";
674 #address-cells = <1>;
675 #size-cells = <1>;
676 reg = <0xc1000000 0x10000>;
677
678 gpsrtc@1000 {
679 compatible = "sirf,marco-gpsrtc";
680 reg = <0x1000 0x1000>;
681 interrupts = <0 55 0>,
682 <0 56 0>,
683 <0 57 0>;
684 };
685
686 sysrtc@2000 {
687 compatible = "sirf,marco-sysrtc";
688 reg = <0x2000 0x1000>;
689 interrupts = <0 52 0>,
690 <0 53 0>,
691 <0 54 0>;
692 };
693
694 pwrc@3000 {
695 compatible = "sirf,marco-pwrc";
696 reg = <0x3000 0x1000>;
697 interrupts = <0 32 0>;
698 };
699 };
700
701 uus-iobg {
702 compatible = "simple-bus";
703 #address-cells = <1>;
704 #size-cells = <1>;
705 ranges = <0xce000000 0xce000000 0x1000000>;
706
707 usb0: usb@ce000000 {
708 compatible = "chipidea,ci13611a-marco";
709 reg = <0xce000000 0x10000>;
710 interrupts = <0 10 0>;
711 };
712
713 usb1: usb@ce010000 {
714 compatible = "chipidea,ci13611a-marco";
715 reg = <0xce010000 0x10000>;
716 interrupts = <0 11 0>;
717 };
718
719 security@ce020000 {
720 compatible = "sirf,marco-security";
721 reg = <0xce020000 0x10000>;
722 interrupts = <0 42 0>;
723 };
724 };
725
726 can-iobg {
727 compatible = "simple-bus";
728 #address-cells = <1>;
729 #size-cells = <1>;
730 ranges = <0xd0000000 0xd0000000 0x1000000>;
731
732 can0: can@d0000000 {
733 compatible = "sirf,marco-can";
734 reg = <0xd0000000 0x10000>;
735 };
736
737 can1: can@d0010000 {
738 compatible = "sirf,marco-can";
739 reg = <0xd0010000 0x10000>;
740 };
741 };
742
743 lvds-iobg {
744 compatible = "simple-bus";
745 #address-cells = <1>;
746 #size-cells = <1>;
747 ranges = <0xd1000000 0xd1000000 0x1000000>;
748
749 lvds@d1000000 {
750 compatible = "sirf,marco-lvds";
751 reg = <0xd1000000 0x10000>;
752 interrupts = <0 64 0>;
753 };
754 };
755 };
756};
diff --git a/arch/arm/boot/dts/sh73a0-reference.dtsi b/arch/arm/boot/dts/sh73a0-reference.dtsi
new file mode 100644
index 000000000000..d4bb0125b2b2
--- /dev/null
+++ b/arch/arm/boot/dts/sh73a0-reference.dtsi
@@ -0,0 +1,24 @@
1/*
2 * Device Tree Source for the SH73A0 SoC
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "sh73a0.dtsi"
12
13/ {
14 compatible = "renesas,sh73a0";
15
16 mmcif: mmcif@0x10010000 {
17 compatible = "renesas,sh-mmcif";
18 reg = <0xe6bd0000 0x100>;
19 interrupt-parent = <&gic>;
20 interrupts = <0 140 0x4
21 0 141 0x4>;
22 reg-io-width = <4>;
23 };
24};
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
new file mode 100644
index 000000000000..8a59465d0231
--- /dev/null
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -0,0 +1,100 @@
1/*
2 * Device Tree Source for the SH73A0 SoC
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 compatible = "renesas,sh73a0";
15
16 cpus {
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 cpu@0 {
21 device_type = "cpu";
22 compatible = "arm,cortex-a9";
23 reg = <0>;
24 };
25 cpu@1 {
26 device_type = "cpu";
27 compatible = "arm,cortex-a9";
28 reg = <1>;
29 };
30 };
31
32 gic: interrupt-controller@f0001000 {
33 compatible = "arm,cortex-a9-gic";
34 #interrupt-cells = <3>;
35 #address-cells = <1>;
36 interrupt-controller;
37 reg = <0xf0001000 0x1000>,
38 <0xf0000100 0x100>;
39 };
40
41 i2c0: i2c@0xe6820000 {
42 #address-cells = <1>;
43 #size-cells = <0>;
44 compatible = "renesas,rmobile-iic";
45 reg = <0xe6820000 0x425>;
46 interrupt-parent = <&gic>;
47 interrupts = <0 167 0x4
48 0 168 0x4
49 0 169 0x4
50 0 170 0x4>;
51 };
52
53 i2c1: i2c@0xe6822000 {
54 #address-cells = <1>;
55 #size-cells = <0>;
56 compatible = "renesas,rmobile-iic";
57 reg = <0xe6822000 0x425>;
58 interrupt-parent = <&gic>;
59 interrupts = <0 51 0x4
60 0 52 0x4
61 0 53 0x4
62 0 54 0x4>;
63 };
64
65 i2c2: i2c@0xe6824000 {
66 #address-cells = <1>;
67 #size-cells = <0>;
68 compatible = "renesas,rmobile-iic";
69 reg = <0xe6824000 0x425>;
70 interrupt-parent = <&gic>;
71 interrupts = <0 171 0x4
72 0 172 0x4
73 0 173 0x4
74 0 174 0x4>;
75 };
76
77 i2c3: i2c@0xe6826000 {
78 #address-cells = <1>;
79 #size-cells = <0>;
80 compatible = "renesas,rmobile-iic";
81 reg = <0xe6826000 0x425>;
82 interrupt-parent = <&gic>;
83 interrupts = <0 183 0x4
84 0 184 0x4
85 0 185 0x4
86 0 186 0x4>;
87 };
88
89 i2c4: i2c@0xe6828000 {
90 #address-cells = <1>;
91 #size-cells = <0>;
92 compatible = "renesas,rmobile-iic";
93 reg = <0xe6828000 0x425>;
94 interrupt-parent = <&gic>;
95 interrupts = <0 187 0x4
96 0 188 0x4
97 0 189 0x4
98 0 190 0x4>;
99 };
100};
diff --git a/arch/arm/boot/dts/wm8850-w70v2.dts b/arch/arm/boot/dts/wm8850-w70v2.dts
new file mode 100644
index 000000000000..fcc660c89540
--- /dev/null
+++ b/arch/arm/boot/dts/wm8850-w70v2.dts
@@ -0,0 +1,47 @@
1/*
2 * wm8850-w70v2.dts
3 * - Device tree file for Wondermedia WM8850 Tablet
4 * - 'W70-V2' mainboard
5 * - HongLianYing 'HLY070ML268-21A' 7" LCD panel
6 *
7 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
8 *
9 * Licensed under GPLv2 or later
10 */
11
12/dts-v1/;
13/include/ "wm8850.dtsi"
14
15/ {
16 model = "Wondermedia WM8850-W70v2 Tablet";
17
18 /*
19 * Display node is based on Sascha Hauer's patch on dri-devel.
20 * Added a bpp property to calculate the size of the framebuffer
21 * until the binding is formalized.
22 */
23 display: display@0 {
24 modes {
25 mode0: mode@0 {
26 hactive = <800>;
27 vactive = <480>;
28 hback-porch = <88>;
29 hfront-porch = <40>;
30 hsync-len = <0>;
31 vback-porch = <32>;
32 vfront-porch = <11>;
33 vsync-len = <1>;
34 clock = <0>; /* unused but required */
35 bpp = <16>; /* non-standard but required */
36 };
37 };
38 };
39
40 backlight {
41 compatible = "pwm-backlight";
42 pwms = <&pwm 0 50000 1>; /* duty inverted */
43
44 brightness-levels = <0 40 60 80 100 130 190 255>;
45 default-brightness-level = <5>;
46 };
47};
diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
new file mode 100644
index 000000000000..e8cbfdc87bba
--- /dev/null
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -0,0 +1,224 @@
1/*
2 * wm8850.dtsi - Device tree file for Wondermedia WM8850 SoC
3 *
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * Licensed under GPLv2 or later
7 */
8
9/include/ "skeleton.dtsi"
10
11/ {
12 compatible = "wm,wm8850";
13
14 aliases {
15 serial0 = &uart0;
16 serial1 = &uart1;
17 serial2 = &uart2;
18 serial3 = &uart3;
19 };
20
21 soc {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 ranges;
26 interrupt-parent = <&intc0>;
27
28 intc0: interrupt-controller@d8140000 {
29 compatible = "via,vt8500-intc";
30 interrupt-controller;
31 reg = <0xd8140000 0x10000>;
32 #interrupt-cells = <1>;
33 };
34
35 /* Secondary IC cascaded to intc0 */
36 intc1: interrupt-controller@d8150000 {
37 compatible = "via,vt8500-intc";
38 interrupt-controller;
39 #interrupt-cells = <1>;
40 reg = <0xD8150000 0x10000>;
41 interrupts = <56 57 58 59 60 61 62 63>;
42 };
43
44 gpio: gpio-controller@d8110000 {
45 compatible = "wm,wm8650-gpio";
46 gpio-controller;
47 reg = <0xd8110000 0x10000>;
48 #gpio-cells = <3>;
49 };
50
51 pmc@d8130000 {
52 compatible = "via,vt8500-pmc";
53 reg = <0xd8130000 0x1000>;
54
55 clocks {
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 ref25: ref25M {
60 #clock-cells = <0>;
61 compatible = "fixed-clock";
62 clock-frequency = <25000000>;
63 };
64
65 ref24: ref24M {
66 #clock-cells = <0>;
67 compatible = "fixed-clock";
68 clock-frequency = <24000000>;
69 };
70
71 plla: plla {
72 #clock-cells = <0>;
73 compatible = "wm,wm8750-pll-clock";
74 clocks = <&ref25>;
75 reg = <0x200>;
76 };
77
78 pllb: pllb {
79 #clock-cells = <0>;
80 compatible = "wm,wm8750-pll-clock";
81 clocks = <&ref25>;
82 reg = <0x204>;
83 };
84
85 clkuart0: uart0 {
86 #clock-cells = <0>;
87 compatible = "via,vt8500-device-clock";
88 clocks = <&ref24>;
89 enable-reg = <0x254>;
90 enable-bit = <24>;
91 };
92
93 clkuart1: uart1 {
94 #clock-cells = <0>;
95 compatible = "via,vt8500-device-clock";
96 clocks = <&ref24>;
97 enable-reg = <0x254>;
98 enable-bit = <25>;
99 };
100
101 clkuart2: uart2 {
102 #clock-cells = <0>;
103 compatible = "via,vt8500-device-clock";
104 clocks = <&ref24>;
105 enable-reg = <0x254>;
106 enable-bit = <26>;
107 };
108
109 clkuart3: uart3 {
110 #clock-cells = <0>;
111 compatible = "via,vt8500-device-clock";
112 clocks = <&ref24>;
113 enable-reg = <0x254>;
114 enable-bit = <27>;
115 };
116
117 clkpwm: pwm {
118 #clock-cells = <0>;
119 compatible = "via,vt8500-device-clock";
120 clocks = <&pllb>;
121 divisor-reg = <0x350>;
122 enable-reg = <0x250>;
123 enable-bit = <17>;
124 };
125
126 clksdhc: sdhc {
127 #clock-cells = <0>;
128 compatible = "via,vt8500-device-clock";
129 clocks = <&pllb>;
130 divisor-reg = <0x330>;
131 divisor-mask = <0x3f>;
132 enable-reg = <0x250>;
133 enable-bit = <0>;
134 };
135 };
136 };
137
138 fb@d8051700 {
139 compatible = "wm,wm8505-fb";
140 reg = <0xd8051700 0x200>;
141 display = <&display>;
142 default-mode = <&mode0>;
143 };
144
145 ge_rops@d8050400 {
146 compatible = "wm,prizm-ge-rops";
147 reg = <0xd8050400 0x100>;
148 };
149
150 pwm: pwm@d8220000 {
151 #pwm-cells = <3>;
152 compatible = "via,vt8500-pwm";
153 reg = <0xd8220000 0x100>;
154 clocks = <&clkpwm>;
155 };
156
157 timer@d8130100 {
158 compatible = "via,vt8500-timer";
159 reg = <0xd8130100 0x28>;
160 interrupts = <36>;
161 };
162
163 ehci@d8007900 {
164 compatible = "via,vt8500-ehci";
165 reg = <0xd8007900 0x200>;
166 interrupts = <26>;
167 };
168
169 uhci@d8007b00 {
170 compatible = "platform-uhci";
171 reg = <0xd8007b00 0x200>;
172 interrupts = <26>;
173 };
174
175 uhci@d8008d00 {
176 compatible = "platform-uhci";
177 reg = <0xd8008d00 0x200>;
178 interrupts = <26>;
179 };
180
181 uart0: uart@d8200000 {
182 compatible = "via,vt8500-uart";
183 reg = <0xd8200000 0x1040>;
184 interrupts = <32>;
185 clocks = <&clkuart0>;
186 };
187
188 uart1: uart@d82b0000 {
189 compatible = "via,vt8500-uart";
190 reg = <0xd82b0000 0x1040>;
191 interrupts = <33>;
192 clocks = <&clkuart1>;
193 };
194
195 uart2: uart@d8210000 {
196 compatible = "via,vt8500-uart";
197 reg = <0xd8210000 0x1040>;
198 interrupts = <47>;
199 clocks = <&clkuart2>;
200 };
201
202 uart3: uart@d82c0000 {
203 compatible = "via,vt8500-uart";
204 reg = <0xd82c0000 0x1040>;
205 interrupts = <50>;
206 clocks = <&clkuart3>;
207 };
208
209 rtc@d8100000 {
210 compatible = "via,vt8500-rtc";
211 reg = <0xd8100000 0x10000>;
212 interrupts = <48>;
213 };
214
215 sdhc@d800a000 {
216 compatible = "wm,wm8505-sdhc";
217 reg = <0xd800a000 0x1000>;
218 interrupts = <20 21>;
219 clocks = <&clksdhc>;
220 bus-width = <4>;
221 sdon-inverted;
222 };
223 };
224};
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 45ceeb0e93e0..9353184d730d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,26 +1,3 @@
1config ARM_GIC
2 bool
3 select IRQ_DOMAIN
4 select MULTI_IRQ_HANDLER
5
6config GIC_NON_BANKED
7 bool
8
9config ARM_VIC
10 bool
11 select IRQ_DOMAIN
12 select MULTI_IRQ_HANDLER
13
14config ARM_VIC_NR
15 int
16 default 4 if ARCH_S5PV210
17 default 3 if ARCH_S5PC100
18 default 2
19 depends on ARM_VIC
20 help
21 The maximum number of VICs available in the system, for
22 power management.
23
24config ICST 1config ICST
25 bool 2 bool
26 3
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index e8a4e58f1b82..dc8dd0de5c0f 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -2,8 +2,6 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-$(CONFIG_ARM_GIC) += gic.o
6obj-$(CONFIG_ARM_VIC) += vic.o
7obj-$(CONFIG_ICST) += icst.o 5obj-$(CONFIG_ICST) += icst.o
8obj-$(CONFIG_SA1111) += sa1111.o 6obj-$(CONFIG_SA1111) += sa1111.o
9obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o 7obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 69667133321f..d946372c4300 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -19,6 +19,7 @@ CONFIG_MODULE_SRCVERSION_ALL=y
19CONFIG_ARCH_MXC=y 19CONFIG_ARCH_MXC=y
20CONFIG_ARCH_MULTI_V6=y 20CONFIG_ARCH_MULTI_V6=y
21CONFIG_ARCH_MULTI_V7=y 21CONFIG_ARCH_MULTI_V7=y
22CONFIG_MACH_IMX31_DT=y
22CONFIG_MACH_MX31LILLY=y 23CONFIG_MACH_MX31LILLY=y
23CONFIG_MACH_MX31LITE=y 24CONFIG_MACH_MX31LITE=y
24CONFIG_MACH_PCM037=y 25CONFIG_MACH_PCM037=y
@@ -32,7 +33,6 @@ CONFIG_MACH_PCM043=y
32CONFIG_MACH_MX35_3DS=y 33CONFIG_MACH_MX35_3DS=y
33CONFIG_MACH_VPR200=y 34CONFIG_MACH_VPR200=y
34CONFIG_MACH_IMX51_DT=y 35CONFIG_MACH_IMX51_DT=y
35CONFIG_MACH_MX51_3DS=y
36CONFIG_MACH_EUKREA_CPUIMX51SD=y 36CONFIG_MACH_EUKREA_CPUIMX51SD=y
37CONFIG_SOC_IMX53=y 37CONFIG_SOC_IMX53=y
38CONFIG_SOC_IMX6Q=y 38CONFIG_SOC_IMX6Q=y
diff --git a/arch/arm/configs/prima2_defconfig b/arch/arm/configs/prima2_defconfig
index 6a936c7c078a..002a1ceadceb 100644
--- a/arch/arm/configs/prima2_defconfig
+++ b/arch/arm/configs/prima2_defconfig
@@ -11,6 +11,9 @@ CONFIG_PARTITION_ADVANCED=y
11CONFIG_BSD_DISKLABEL=y 11CONFIG_BSD_DISKLABEL=y
12CONFIG_SOLARIS_X86_PARTITION=y 12CONFIG_SOLARIS_X86_PARTITION=y
13CONFIG_ARCH_SIRF=y 13CONFIG_ARCH_SIRF=y
14# CONFIG_SWP_EMULATE is not set
15CONFIG_SMP=y
16CONFIG_SCHED_MC=y
14CONFIG_PREEMPT=y 17CONFIG_PREEMPT=y
15CONFIG_AEABI=y 18CONFIG_AEABI=y
16CONFIG_KEXEC=y 19CONFIG_KEXEC=y
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 917d4fcfd9b4..308ad7d6f98b 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -12,7 +12,6 @@
12 12
13struct tag; 13struct tag;
14struct meminfo; 14struct meminfo;
15struct sys_timer;
16struct pt_regs; 15struct pt_regs;
17struct smp_operations; 16struct smp_operations;
18#ifdef CONFIG_SMP 17#ifdef CONFIG_SMP
@@ -48,7 +47,7 @@ struct machine_desc {
48 void (*map_io)(void);/* IO mapping function */ 47 void (*map_io)(void);/* IO mapping function */
49 void (*init_early)(void); 48 void (*init_early)(void);
50 void (*init_irq)(void); 49 void (*init_irq)(void);
51 struct sys_timer *timer; /* system tick timer */ 50 void (*init_time)(void);
52 void (*init_machine)(void); 51 void (*init_machine)(void);
53 void (*init_late)(void); 52 void (*init_late)(void);
54#ifdef CONFIG_MULTI_IRQ_HANDLER 53#ifdef CONFIG_MULTI_IRQ_HANDLER
diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h
index 15cb035309f7..18c883023339 100644
--- a/arch/arm/include/asm/mach/irq.h
+++ b/arch/arm/include/asm/mach/irq.h
@@ -22,6 +22,7 @@ extern int show_fiq_list(struct seq_file *, int);
22 22
23#ifdef CONFIG_MULTI_IRQ_HANDLER 23#ifdef CONFIG_MULTI_IRQ_HANDLER
24extern void (*handle_arch_irq)(struct pt_regs *); 24extern void (*handle_arch_irq)(struct pt_regs *);
25extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
25#endif 26#endif
26 27
27/* 28/*
diff --git a/arch/arm/include/asm/mach/time.h b/arch/arm/include/asm/mach/time.h
index 6ca945f534ab..90c12e1e695c 100644
--- a/arch/arm/include/asm/mach/time.h
+++ b/arch/arm/include/asm/mach/time.h
@@ -10,36 +10,6 @@
10#ifndef __ASM_ARM_MACH_TIME_H 10#ifndef __ASM_ARM_MACH_TIME_H
11#define __ASM_ARM_MACH_TIME_H 11#define __ASM_ARM_MACH_TIME_H
12 12
13/*
14 * This is our kernel timer structure.
15 *
16 * - init
17 * Initialise the kernels jiffy timer source, claim interrupt
18 * using setup_irq. This is called early on during initialisation
19 * while interrupts are still disabled on the local CPU.
20 * - suspend
21 * Suspend the kernel jiffy timer source, if necessary. This
22 * is called with interrupts disabled, after all normal devices
23 * have been suspended. If no action is required, set this to
24 * NULL.
25 * - resume
26 * Resume the kernel jiffy timer source, if necessary. This
27 * is called with interrupts disabled before any normal devices
28 * are resumed. If no action is required, set this to NULL.
29 * - offset
30 * Return the timer offset in microseconds since the last timer
31 * interrupt. Note: this must take account of any unprocessed
32 * timer interrupt which may be pending.
33 */
34struct sys_timer {
35 void (*init)(void);
36 void (*suspend)(void);
37 void (*resume)(void);
38#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
39 unsigned long (*offset)(void);
40#endif
41};
42
43extern void timer_tick(void); 13extern void timer_tick(void);
44 14
45struct timespec; 15struct timespec;
diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S
index 0c4e17d4d359..c6f294cf18f0 100644
--- a/arch/arm/include/debug/imx.S
+++ b/arch/arm/include/debug/imx.S
@@ -34,7 +34,7 @@
34#define UART_PADDR 0x43f90000 34#define UART_PADDR 0x43f90000
35#elif defined (CONFIG_DEBUG_IMX51_UART) 35#elif defined (CONFIG_DEBUG_IMX51_UART)
36#define UART_PADDR 0x73fbc000 36#define UART_PADDR 0x73fbc000
37#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) 37#elif defined (CONFIG_DEBUG_IMX53_UART)
38#define UART_PADDR 0x53fbc000 38#define UART_PADDR 0x53fbc000
39#elif defined (CONFIG_DEBUG_IMX6Q_UART) 39#elif defined (CONFIG_DEBUG_IMX6Q_UART)
40#define UART_PADDR IMX6Q_DEBUG_UART_BASE 40#define UART_PADDR IMX6Q_DEBUG_UART_BASE
diff --git a/arch/arm/mach-vt8500/include/mach/debug-macro.S b/arch/arm/include/debug/vt8500.S
index ca292f29d4a3..0e0ca0869da7 100644
--- a/arch/arm/mach-vt8500/include/mach/debug-macro.S
+++ b/arch/arm/include/debug/vt8500.S
@@ -1,20 +1,24 @@
1/* 1/*
2 * arch/arm/mach-vt8500/include/mach/debug-macro.S 2 * Debugging macro include header
3 * 3 *
4 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> 4 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
5 * 5 * Moved from arch/arm/mach-vt8500/include/mach/debug-macro.S
6 * Debugging macro include header 6 * Minor changes for readability.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 */
12*/ 12
13#define DEBUG_LL_PHYS_BASE 0xD8000000
14#define DEBUG_LL_VIRT_BASE 0xF8000000
15#define DEBUG_LL_UART_OFFSET 0x00200000
13 16
17#if defined(CONFIG_DEBUG_VT8500_UART0)
14 .macro addruart, rp, rv, tmp 18 .macro addruart, rp, rv, tmp
15 mov \rp, #0x00200000 19 mov \rp, #DEBUG_LL_UART_OFFSET
16 orr \rv, \rp, #0xf8000000 20 orr \rv, \rp, #DEBUG_LL_VIRT_BASE
17 orr \rp, \rp, #0xd8000000 21 orr \rp, \rp, #DEBUG_LL_PHYS_BASE
18 .endm 22 .endm
19 23
20 .macro senduart,rd,rx 24 .macro senduart,rd,rx
@@ -29,3 +33,5 @@
29 33
30 .macro waituart,rd,rx 34 .macro waituart,rd,rx
31 .endm 35 .endm
36
37#endif
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 896165096d6a..8e4ef4c83a74 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -117,6 +117,16 @@ void __init init_IRQ(void)
117 machine_desc->init_irq(); 117 machine_desc->init_irq();
118} 118}
119 119
120#ifdef CONFIG_MULTI_IRQ_HANDLER
121void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
122{
123 if (handle_arch_irq)
124 return;
125
126 handle_arch_irq = handle_irq;
127}
128#endif
129
120#ifdef CONFIG_SPARSE_IRQ 130#ifdef CONFIG_SPARSE_IRQ
121int __init arch_probe_nr_irqs(void) 131int __init arch_probe_nr_irqs(void)
122{ 132{
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 84f4cbf652e5..3fc96db2a4b6 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -416,7 +416,8 @@ static void (*smp_cross_call)(const struct cpumask *, unsigned int);
416 416
417void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) 417void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
418{ 418{
419 smp_cross_call = fn; 419 if (!smp_cross_call)
420 smp_cross_call = fn;
420} 421}
421 422
422void arch_send_call_function_ipi_mask(const struct cpumask *mask) 423void arch_send_call_function_ipi_mask(const struct cpumask *mask)
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 49f335d301ba..dc9bb0146665 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -24,7 +24,6 @@
24 24
25#include <asm/smp_twd.h> 25#include <asm/smp_twd.h>
26#include <asm/localtimer.h> 26#include <asm/localtimer.h>
27#include <asm/hardware/gic.h>
28 27
29/* set up by the platform code */ 28/* set up by the platform code */
30static void __iomem *twd_base; 29static void __iomem *twd_base;
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index 09be0c3c9069..955d92d265e5 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -21,7 +21,6 @@
21#include <linux/timex.h> 21#include <linux/timex.h>
22#include <linux/errno.h> 22#include <linux/errno.h>
23#include <linux/profile.h> 23#include <linux/profile.h>
24#include <linux/syscore_ops.h>
25#include <linux/timer.h> 24#include <linux/timer.h>
26#include <linux/irq.h> 25#include <linux/irq.h>
27 26
@@ -31,11 +30,6 @@
31#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
32#include <asm/mach/time.h> 31#include <asm/mach/time.h>
33 32
34/*
35 * Our system timer.
36 */
37static struct sys_timer *system_timer;
38
39#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) || \ 33#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) || \
40 defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE) 34 defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE)
41/* this needs a better home */ 35/* this needs a better home */
@@ -69,16 +63,6 @@ unsigned long profile_pc(struct pt_regs *regs)
69EXPORT_SYMBOL(profile_pc); 63EXPORT_SYMBOL(profile_pc);
70#endif 64#endif
71 65
72#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
73u32 arch_gettimeoffset(void)
74{
75 if (system_timer->offset != NULL)
76 return system_timer->offset() * 1000;
77
78 return 0;
79}
80#endif /* CONFIG_ARCH_USES_GETTIMEOFFSET */
81
82#ifndef CONFIG_GENERIC_CLOCKEVENTS 66#ifndef CONFIG_GENERIC_CLOCKEVENTS
83/* 67/*
84 * Kernel system timer support. 68 * Kernel system timer support.
@@ -129,43 +113,8 @@ int __init register_persistent_clock(clock_access_fn read_boot,
129 return -EINVAL; 113 return -EINVAL;
130} 114}
131 115
132#if defined(CONFIG_PM) && !defined(CONFIG_GENERIC_CLOCKEVENTS)
133static int timer_suspend(void)
134{
135 if (system_timer->suspend)
136 system_timer->suspend();
137
138 return 0;
139}
140
141static void timer_resume(void)
142{
143 if (system_timer->resume)
144 system_timer->resume();
145}
146#else
147#define timer_suspend NULL
148#define timer_resume NULL
149#endif
150
151static struct syscore_ops timer_syscore_ops = {
152 .suspend = timer_suspend,
153 .resume = timer_resume,
154};
155
156static int __init timer_init_syscore_ops(void)
157{
158 register_syscore_ops(&timer_syscore_ops);
159
160 return 0;
161}
162
163device_initcall(timer_init_syscore_ops);
164
165void __init time_init(void) 116void __init time_init(void)
166{ 117{
167 system_timer = machine_desc->timer; 118 machine_desc->init_time();
168 system_timer->init();
169 sched_clock_postinit(); 119 sched_clock_postinit();
170} 120}
171
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index cafe98836c8a..2acdff4c1dfe 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
174static struct clock_event_device clkevt = { 174static struct clock_event_device clkevt = {
175 .name = "at91_tick", 175 .name = "at91_tick",
176 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 176 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
177 .shift = 32,
178 .rating = 150, 177 .rating = 150,
179 .set_next_event = clkevt32k_next_event, 178 .set_next_event = clkevt32k_next_event,
180 .set_mode = clkevt32k_mode, 179 .set_mode = clkevt32k_mode,
@@ -265,17 +264,10 @@ void __init at91rm9200_timer_init(void)
265 at91_st_write(AT91_ST_RTMR, 1); 264 at91_st_write(AT91_ST_RTMR, 1);
266 265
267 /* Setup timer clockevent, with minimum of two ticks (important!!) */ 266 /* Setup timer clockevent, with minimum of two ticks (important!!) */
268 clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
269 clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
270 clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
271 clkevt.cpumask = cpumask_of(0); 267 clkevt.cpumask = cpumask_of(0);
272 clockevents_register_device(&clkevt); 268 clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
269 2, AT91_ST_ALMV);
273 270
274 /* register clocksource */ 271 /* register clocksource */
275 clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); 272 clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
276} 273}
277
278struct sys_timer at91rm9200_timer = {
279 .init = at91rm9200_timer_init,
280};
281
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 358412f1f5f8..3a4bc2e1a65e 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -104,12 +104,38 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
104 } 104 }
105} 105}
106 106
107static void at91sam926x_pit_suspend(struct clock_event_device *cedev)
108{
109 /* Disable timer */
110 pit_write(AT91_PIT_MR, 0);
111}
112
113static void at91sam926x_pit_reset(void)
114{
115 /* Disable timer and irqs */
116 pit_write(AT91_PIT_MR, 0);
117
118 /* Clear any pending interrupts, wait for PIT to stop counting */
119 while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
120 cpu_relax();
121
122 /* Start PIT but don't enable IRQ */
123 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
124}
125
126static void at91sam926x_pit_resume(struct clock_event_device *cedev)
127{
128 at91sam926x_pit_reset();
129}
130
107static struct clock_event_device pit_clkevt = { 131static struct clock_event_device pit_clkevt = {
108 .name = "pit", 132 .name = "pit",
109 .features = CLOCK_EVT_FEAT_PERIODIC, 133 .features = CLOCK_EVT_FEAT_PERIODIC,
110 .shift = 32, 134 .shift = 32,
111 .rating = 100, 135 .rating = 100,
112 .set_mode = pit_clkevt_mode, 136 .set_mode = pit_clkevt_mode,
137 .suspend = at91sam926x_pit_suspend,
138 .resume = at91sam926x_pit_resume,
113}; 139};
114 140
115 141
@@ -150,19 +176,6 @@ static struct irqaction at91sam926x_pit_irq = {
150 .irq = NR_IRQS_LEGACY + AT91_ID_SYS, 176 .irq = NR_IRQS_LEGACY + AT91_ID_SYS,
151}; 177};
152 178
153static void at91sam926x_pit_reset(void)
154{
155 /* Disable timer and irqs */
156 pit_write(AT91_PIT_MR, 0);
157
158 /* Clear any pending interrupts, wait for PIT to stop counting */
159 while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
160 cpu_relax();
161
162 /* Start PIT but don't enable IRQ */
163 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
164}
165
166#ifdef CONFIG_OF 179#ifdef CONFIG_OF
167static struct of_device_id pit_timer_ids[] = { 180static struct of_device_id pit_timer_ids[] = {
168 { .compatible = "atmel,at91sam9260-pit" }, 181 { .compatible = "atmel,at91sam9260-pit" },
@@ -211,7 +224,7 @@ static int __init of_at91sam926x_pit_init(void)
211/* 224/*
212 * Set up both clocksource and clockevent support. 225 * Set up both clocksource and clockevent support.
213 */ 226 */
214static void __init at91sam926x_pit_init(void) 227void __init at91sam926x_pit_init(void)
215{ 228{
216 unsigned long pit_rate; 229 unsigned long pit_rate;
217 unsigned bits; 230 unsigned bits;
@@ -250,12 +263,6 @@ static void __init at91sam926x_pit_init(void)
250 clockevents_register_device(&pit_clkevt); 263 clockevents_register_device(&pit_clkevt);
251} 264}
252 265
253static void at91sam926x_pit_suspend(void)
254{
255 /* Disable timer */
256 pit_write(AT91_PIT_MR, 0);
257}
258
259void __init at91sam926x_ioremap_pit(u32 addr) 266void __init at91sam926x_ioremap_pit(u32 addr)
260{ 267{
261#if defined(CONFIG_OF) 268#if defined(CONFIG_OF)
@@ -272,9 +279,3 @@ void __init at91sam926x_ioremap_pit(u32 addr)
272 if (!pit_base_addr) 279 if (!pit_base_addr)
273 panic("Impossible to ioremap PIT\n"); 280 panic("Impossible to ioremap PIT\n");
274} 281}
275
276struct sys_timer at91sam926x_timer = {
277 .init = at91sam926x_pit_init,
278 .suspend = at91sam926x_pit_suspend,
279 .resume = at91sam926x_pit_reset,
280};
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c
index 0e57e440c061..0c07a4459cb2 100644
--- a/arch/arm/mach-at91/at91x40_time.c
+++ b/arch/arm/mach-at91/at91x40_time.c
@@ -42,9 +42,10 @@
42#define AT91_TC_CLK1BASE 0x40 42#define AT91_TC_CLK1BASE 0x40
43#define AT91_TC_CLK2BASE 0x80 43#define AT91_TC_CLK2BASE 0x80
44 44
45static unsigned long at91x40_gettimeoffset(void) 45static u32 at91x40_gettimeoffset(void)
46{ 46{
47 return (at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128)); 47 return (at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 /
48 (AT91X40_MASTER_CLOCK / 128)) * 1000;
48} 49}
49 50
50static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id) 51static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id)
@@ -64,6 +65,8 @@ void __init at91x40_timer_init(void)
64{ 65{
65 unsigned int v; 66 unsigned int v;
66 67
68 arch_gettimeoffset = at91x40_gettimeoffset;
69
67 at91_tc_write(AT91_TC_BCR, 0); 70 at91_tc_write(AT91_TC_BCR, 0);
68 v = at91_tc_read(AT91_TC_BMR); 71 v = at91_tc_read(AT91_TC_BMR);
69 v = (v & ~AT91_TC_TC1XC1S) | AT91_TC_TC1XC1S_NONE; 72 v = (v & ~AT91_TC_TC1XC1S) | AT91_TC_TC1XC1S_NONE;
@@ -79,9 +82,3 @@ void __init at91x40_timer_init(void)
79 82
80 at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN)); 83 at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN));
81} 84}
82
83struct sys_timer at91x40_timer = {
84 .init = at91x40_timer_init,
85 .offset = at91x40_gettimeoffset,
86};
87
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index b99b5752cc10..35ab632bbf68 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -90,7 +90,7 @@ static void __init onearm_board_init(void)
90 90
91MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") 91MACHINE_START(ONEARM, "Ajeco 1ARM single board computer")
92 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 92 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
93 .timer = &at91rm9200_timer, 93 .init_time = at91rm9200_timer_init,
94 .map_io = at91_map_io, 94 .map_io = at91_map_io,
95 .handle_irq = at91_aic_handle_irq, 95 .handle_irq = at91_aic_handle_irq,
96 .init_early = onearm_init_early, 96 .init_early = onearm_init_early,
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 854b97974287..f95e31cda4b3 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -210,7 +210,7 @@ static void __init afeb9260_board_init(void)
210 210
211MACHINE_START(AFEB9260, "Custom afeb9260 board") 211MACHINE_START(AFEB9260, "Custom afeb9260 board")
212 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ 212 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */
213 .timer = &at91sam926x_timer, 213 .init_time = at91sam926x_pit_init,
214 .map_io = at91_map_io, 214 .map_io = at91_map_io,
215 .handle_irq = at91_aic_handle_irq, 215 .handle_irq = at91_aic_handle_irq,
216 .init_early = afeb9260_init_early, 216 .init_early = afeb9260_init_early,
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index 28a18ce6d914..ade948b82662 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -187,7 +187,7 @@ static void __init cam60_board_init(void)
187 187
188MACHINE_START(CAM60, "KwikByte CAM60") 188MACHINE_START(CAM60, "KwikByte CAM60")
189 /* Maintainer: KwikByte */ 189 /* Maintainer: KwikByte */
190 .timer = &at91sam926x_timer, 190 .init_time = at91sam926x_pit_init,
191 .map_io = at91_map_io, 191 .map_io = at91_map_io,
192 .handle_irq = at91_aic_handle_irq, 192 .handle_irq = at91_aic_handle_irq,
193 .init_early = cam60_init_early, 193 .init_early = cam60_init_early,
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index c17bb533a949..92983050a9bd 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -157,7 +157,7 @@ static void __init carmeva_board_init(void)
157 157
158MACHINE_START(CARMEVA, "Carmeva") 158MACHINE_START(CARMEVA, "Carmeva")
159 /* Maintainer: Conitec Datasystems */ 159 /* Maintainer: Conitec Datasystems */
160 .timer = &at91rm9200_timer, 160 .init_time = at91rm9200_timer_init,
161 .map_io = at91_map_io, 161 .map_io = at91_map_io,
162 .handle_irq = at91_aic_handle_irq, 162 .handle_irq = at91_aic_handle_irq,
163 .init_early = carmeva_init_early, 163 .init_early = carmeva_init_early,
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 847432441ecc..008527efdbcf 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -374,7 +374,7 @@ MACHINE_START(CPUAT9260, "Eukrea CPU9260")
374MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") 374MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
375#endif 375#endif
376 /* Maintainer: Eric Benard - EUKREA Electromatique */ 376 /* Maintainer: Eric Benard - EUKREA Electromatique */
377 .timer = &at91sam926x_timer, 377 .init_time = at91sam926x_pit_init,
378 .map_io = at91_map_io, 378 .map_io = at91_map_io,
379 .handle_irq = at91_aic_handle_irq, 379 .handle_irq = at91_aic_handle_irq,
380 .init_early = cpu9krea_init_early, 380 .init_early = cpu9krea_init_early,
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 2a7af7868747..42f1353a4baf 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -178,7 +178,7 @@ static void __init cpuat91_board_init(void)
178 178
179MACHINE_START(CPUAT91, "Eukrea") 179MACHINE_START(CPUAT91, "Eukrea")
180 /* Maintainer: Eric Benard - EUKREA Electromatique */ 180 /* Maintainer: Eric Benard - EUKREA Electromatique */
181 .timer = &at91rm9200_timer, 181 .init_time = at91rm9200_timer_init,
182 .map_io = at91_map_io, 182 .map_io = at91_map_io,
183 .handle_irq = at91_aic_handle_irq, 183 .handle_irq = at91_aic_handle_irq,
184 .init_early = cpuat91_init_early, 184 .init_early = cpuat91_init_early,
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index 48a531e05be3..e5fde215225b 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -251,7 +251,7 @@ static void __init csb337_board_init(void)
251 251
252MACHINE_START(CSB337, "Cogent CSB337") 252MACHINE_START(CSB337, "Cogent CSB337")
253 /* Maintainer: Bill Gatliff */ 253 /* Maintainer: Bill Gatliff */
254 .timer = &at91rm9200_timer, 254 .init_time = at91rm9200_timer_init,
255 .map_io = at91_map_io, 255 .map_io = at91_map_io,
256 .handle_irq = at91_aic_handle_irq, 256 .handle_irq = at91_aic_handle_irq,
257 .init_early = csb337_init_early, 257 .init_early = csb337_init_early,
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index ec0f3abd504b..fdf11061c577 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -132,7 +132,7 @@ static void __init csb637_board_init(void)
132 132
133MACHINE_START(CSB637, "Cogent CSB637") 133MACHINE_START(CSB637, "Cogent CSB637")
134 /* Maintainer: Bill Gatliff */ 134 /* Maintainer: Bill Gatliff */
135 .timer = &at91rm9200_timer, 135 .init_time = at91rm9200_timer_init,
136 .map_io = at91_map_io, 136 .map_io = at91_map_io,
137 .handle_irq = at91_aic_handle_irq, 137 .handle_irq = at91_aic_handle_irq,
138 .init_early = csb637_init_early, 138 .init_early = csb637_init_early,
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index 881170ce61dd..8db30132abed 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -49,7 +49,7 @@ static const char *at91_dt_board_compat[] __initdata = {
49 49
50DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") 50DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
51 /* Maintainer: Atmel */ 51 /* Maintainer: Atmel */
52 .timer = &at91sam926x_timer, 52 .init_time = at91sam926x_pit_init,
53 .map_io = at91_map_io, 53 .map_io = at91_map_io,
54 .handle_irq = at91_aic_handle_irq, 54 .handle_irq = at91_aic_handle_irq,
55 .init_early = at91_dt_initialize, 55 .init_early = at91_dt_initialize,
diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c
index b489388a6f84..becf0a6a289e 100644
--- a/arch/arm/mach-at91/board-eb01.c
+++ b/arch/arm/mach-at91/board-eb01.c
@@ -44,7 +44,7 @@ static void __init at91eb01_init_early(void)
44 44
45MACHINE_START(AT91EB01, "Atmel AT91 EB01") 45MACHINE_START(AT91EB01, "Atmel AT91 EB01")
46 /* Maintainer: Greg Ungerer <gerg@snapgear.com> */ 46 /* Maintainer: Greg Ungerer <gerg@snapgear.com> */
47 .timer = &at91x40_timer, 47 .init_time = at91x40_timer_init,
48 .handle_irq = at91_aic_handle_irq, 48 .handle_irq = at91_aic_handle_irq,
49 .init_early = at91eb01_init_early, 49 .init_early = at91eb01_init_early,
50 .init_irq = at91eb01_init_irq, 50 .init_irq = at91eb01_init_irq,
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 9f5e71c95f05..f9be8161bbfa 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -116,7 +116,7 @@ static void __init eb9200_board_init(void)
116} 116}
117 117
118MACHINE_START(ATEB9200, "Embest ATEB9200") 118MACHINE_START(ATEB9200, "Embest ATEB9200")
119 .timer = &at91rm9200_timer, 119 .init_time = at91rm9200_timer_init,
120 .map_io = at91_map_io, 120 .map_io = at91_map_io,
121 .handle_irq = at91_aic_handle_irq, 121 .handle_irq = at91_aic_handle_irq,
122 .init_early = eb9200_init_early, 122 .init_early = eb9200_init_early,
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index ef69e0ebe949..b2fcd71262ba 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -181,7 +181,7 @@ static void __init ecb_at91board_init(void)
181 181
182MACHINE_START(ECBAT91, "emQbit's ECB_AT91") 182MACHINE_START(ECBAT91, "emQbit's ECB_AT91")
183 /* Maintainer: emQbit.com */ 183 /* Maintainer: emQbit.com */
184 .timer = &at91rm9200_timer, 184 .init_time = at91rm9200_timer_init,
185 .map_io = at91_map_io, 185 .map_io = at91_map_io,
186 .handle_irq = at91_aic_handle_irq, 186 .handle_irq = at91_aic_handle_irq,
187 .init_early = ecb_at91init_early, 187 .init_early = ecb_at91init_early,
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 50f3d3795c05..77de410efc90 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -149,7 +149,7 @@ static void __init eco920_board_init(void)
149 149
150MACHINE_START(ECO920, "eco920") 150MACHINE_START(ECO920, "eco920")
151 /* Maintainer: Sascha Hauer */ 151 /* Maintainer: Sascha Hauer */
152 .timer = &at91rm9200_timer, 152 .init_time = at91rm9200_timer_init,
153 .map_io = at91_map_io, 153 .map_io = at91_map_io,
154 .handle_irq = at91_aic_handle_irq, 154 .handle_irq = at91_aic_handle_irq,
155 .init_early = eco920_init_early, 155 .init_early = eco920_init_early,
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 5d44eba0f20f..737c08563628 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -159,7 +159,7 @@ static void __init flexibity_board_init(void)
159 159
160MACHINE_START(FLEXIBITY, "Flexibity Connect") 160MACHINE_START(FLEXIBITY, "Flexibity Connect")
161 /* Maintainer: Maxim Osipov */ 161 /* Maintainer: Maxim Osipov */
162 .timer = &at91sam926x_timer, 162 .init_time = at91sam926x_pit_init,
163 .map_io = at91_map_io, 163 .map_io = at91_map_io,
164 .handle_irq = at91_aic_handle_irq, 164 .handle_irq = at91_aic_handle_irq,
165 .init_early = flexibity_init_early, 165 .init_early = flexibity_init_early,
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index 191d37c16bab..2ea7059b840b 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -261,7 +261,7 @@ static void __init foxg20_board_init(void)
261 261
262MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20") 262MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20")
263 /* Maintainer: Sergio Tanzilli */ 263 /* Maintainer: Sergio Tanzilli */
264 .timer = &at91sam926x_timer, 264 .init_time = at91sam926x_pit_init,
265 .map_io = at91_map_io, 265 .map_io = at91_map_io,
266 .handle_irq = at91_aic_handle_irq, 266 .handle_irq = at91_aic_handle_irq,
267 .init_early = foxg20_init_early, 267 .init_early = foxg20_init_early,
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index 23a2fa17ab29..c1d61d247790 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -574,7 +574,7 @@ static void __init gsia18s_board_init(void)
574} 574}
575 575
576MACHINE_START(GSIA18S, "GS_IA18_S") 576MACHINE_START(GSIA18S, "GS_IA18_S")
577 .timer = &at91sam926x_timer, 577 .init_time = at91sam926x_pit_init,
578 .map_io = at91_map_io, 578 .map_io = at91_map_io,
579 .handle_irq = at91_aic_handle_irq, 579 .handle_irq = at91_aic_handle_irq,
580 .init_early = gsia18s_init_early, 580 .init_early = gsia18s_init_early,
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 9a43d1e1a037..88e2f5d2d16d 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -103,7 +103,7 @@ static void __init kafa_board_init(void)
103 103
104MACHINE_START(KAFA, "Sperry-Sun KAFA") 104MACHINE_START(KAFA, "Sperry-Sun KAFA")
105 /* Maintainer: Sergei Sharonov */ 105 /* Maintainer: Sergei Sharonov */
106 .timer = &at91rm9200_timer, 106 .init_time = at91rm9200_timer_init,
107 .map_io = at91_map_io, 107 .map_io = at91_map_io,
108 .handle_irq = at91_aic_handle_irq, 108 .handle_irq = at91_aic_handle_irq,
109 .init_early = kafa_init_early, 109 .init_early = kafa_init_early,
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index f168bec2369f..0c519d9ebffc 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -149,7 +149,7 @@ static void __init kb9202_board_init(void)
149 149
150MACHINE_START(KB9200, "KB920x") 150MACHINE_START(KB9200, "KB920x")
151 /* Maintainer: KwikByte, Inc. */ 151 /* Maintainer: KwikByte, Inc. */
152 .timer = &at91rm9200_timer, 152 .init_time = at91rm9200_timer_init,
153 .map_io = at91_map_io, 153 .map_io = at91_map_io,
154 .handle_irq = at91_aic_handle_irq, 154 .handle_irq = at91_aic_handle_irq,
155 .init_early = kb9202_init_early, 155 .init_early = kb9202_init_early,
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index bc7a1c4a1f6a..5b4760fe53de 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -378,7 +378,7 @@ static void __init neocore926_board_init(void)
378 378
379MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926") 379MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")
380 /* Maintainer: ADENEO */ 380 /* Maintainer: ADENEO */
381 .timer = &at91sam926x_timer, 381 .init_time = at91sam926x_pit_init,
382 .map_io = at91_map_io, 382 .map_io = at91_map_io,
383 .handle_irq = at91_aic_handle_irq, 383 .handle_irq = at91_aic_handle_irq,
384 .init_early = neocore926_init_early, 384 .init_early = neocore926_init_early,
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index 0299554495dd..65c0d6b5ecba 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -217,7 +217,7 @@ static void __init pcontrol_g20_board_init(void)
217 217
218MACHINE_START(PCONTROL_G20, "PControl G20") 218MACHINE_START(PCONTROL_G20, "PControl G20")
219 /* Maintainer: pgsellmann@portner-elektronik.at */ 219 /* Maintainer: pgsellmann@portner-elektronik.at */
220 .timer = &at91sam926x_timer, 220 .init_time = at91sam926x_pit_init,
221 .map_io = at91_map_io, 221 .map_io = at91_map_io,
222 .handle_irq = at91_aic_handle_irq, 222 .handle_irq = at91_aic_handle_irq,
223 .init_early = pcontrol_g20_init_early, 223 .init_early = pcontrol_g20_init_early,
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index 4938f1cd5e13..ab2b2ec36c14 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -119,7 +119,7 @@ static void __init picotux200_board_init(void)
119 119
120MACHINE_START(PICOTUX2XX, "picotux 200") 120MACHINE_START(PICOTUX2XX, "picotux 200")
121 /* Maintainer: Kleinhenz Elektronik GmbH */ 121 /* Maintainer: Kleinhenz Elektronik GmbH */
122 .timer = &at91rm9200_timer, 122 .init_time = at91rm9200_timer_init,
123 .map_io = at91_map_io, 123 .map_io = at91_map_io,
124 .handle_irq = at91_aic_handle_irq, 124 .handle_irq = at91_aic_handle_irq,
125 .init_early = picotux200_init_early, 125 .init_early = picotux200_init_early,
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 33b1628467ea..aa3bc9b0f150 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -257,7 +257,7 @@ static void __init ek_board_init(void)
257 257
258MACHINE_START(QIL_A9260, "CALAO QIL_A9260") 258MACHINE_START(QIL_A9260, "CALAO QIL_A9260")
259 /* Maintainer: calao-systems */ 259 /* Maintainer: calao-systems */
260 .timer = &at91sam926x_timer, 260 .init_time = at91sam926x_pit_init,
261 .map_io = at91_map_io, 261 .map_io = at91_map_io,
262 .handle_irq = at91_aic_handle_irq, 262 .handle_irq = at91_aic_handle_irq,
263 .init_early = ek_init_early, 263 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-rm9200-dt.c b/arch/arm/mach-at91/board-rm9200-dt.c
index 5f9ce3da3fde..3fcb6623a33e 100644
--- a/arch/arm/mach-at91/board-rm9200-dt.c
+++ b/arch/arm/mach-at91/board-rm9200-dt.c
@@ -47,7 +47,7 @@ static const char *at91rm9200_dt_board_compat[] __initdata = {
47}; 47};
48 48
49DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)") 49DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
50 .timer = &at91rm9200_timer, 50 .init_time = at91rm9200_timer_init,
51 .map_io = at91_map_io, 51 .map_io = at91_map_io,
52 .handle_irq = at91_aic_handle_irq, 52 .handle_irq = at91_aic_handle_irq,
53 .init_early = at91rm9200_dt_initialize, 53 .init_early = at91rm9200_dt_initialize,
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 9e5061bef0d0..690541b18cbc 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -219,7 +219,7 @@ static void __init dk_board_init(void)
219 219
220MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") 220MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
221 /* Maintainer: SAN People/Atmel */ 221 /* Maintainer: SAN People/Atmel */
222 .timer = &at91rm9200_timer, 222 .init_time = at91rm9200_timer_init,
223 .map_io = at91_map_io, 223 .map_io = at91_map_io,
224 .handle_irq = at91_aic_handle_irq, 224 .handle_irq = at91_aic_handle_irq,
225 .init_early = dk_init_early, 225 .init_early = dk_init_early,
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 58277dbc718f..8b17dadc1aba 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -186,7 +186,7 @@ static void __init ek_board_init(void)
186 186
187MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") 187MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
188 /* Maintainer: SAN People/Atmel */ 188 /* Maintainer: SAN People/Atmel */
189 .timer = &at91rm9200_timer, 189 .init_time = at91rm9200_timer_init,
190 .map_io = at91_map_io, 190 .map_io = at91_map_io,
191 .handle_irq = at91_aic_handle_irq, 191 .handle_irq = at91_aic_handle_irq,
192 .init_early = ek_init_early, 192 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c
index 2e8b8339a206..f6d7f1958c7e 100644
--- a/arch/arm/mach-at91/board-rsi-ews.c
+++ b/arch/arm/mach-at91/board-rsi-ews.c
@@ -222,7 +222,7 @@ static void __init rsi_ews_board_init(void)
222 222
223MACHINE_START(RSI_EWS, "RSI EWS") 223MACHINE_START(RSI_EWS, "RSI EWS")
224 /* Maintainer: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> */ 224 /* Maintainer: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> */
225 .timer = &at91rm9200_timer, 225 .init_time = at91rm9200_timer_init,
226 .map_io = at91_map_io, 226 .map_io = at91_map_io,
227 .handle_irq = at91_aic_handle_irq, 227 .handle_irq = at91_aic_handle_irq,
228 .init_early = rsi_ews_init_early, 228 .init_early = rsi_ews_init_early,
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index b75fbf6003a1..43ee4dc43b50 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -218,7 +218,7 @@ static void __init ek_board_init(void)
218 218
219MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") 219MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
220 /* Maintainer: Olimex */ 220 /* Maintainer: Olimex */
221 .timer = &at91sam926x_timer, 221 .init_time = at91sam926x_pit_init,
222 .map_io = at91_map_io, 222 .map_io = at91_map_io,
223 .handle_irq = at91_aic_handle_irq, 223 .handle_irq = at91_aic_handle_irq,
224 .init_early = ek_init_early, 224 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index f0135cd1d858..0b153c87521d 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -343,7 +343,7 @@ static void __init ek_board_init(void)
343 343
344MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") 344MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
345 /* Maintainer: Atmel */ 345 /* Maintainer: Atmel */
346 .timer = &at91sam926x_timer, 346 .init_time = at91sam926x_pit_init,
347 .map_io = at91_map_io, 347 .map_io = at91_map_io,
348 .handle_irq = at91_aic_handle_irq, 348 .handle_irq = at91_aic_handle_irq,
349 .init_early = ek_init_early, 349 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 13ebaa8e4100..b446645c7727 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -612,7 +612,7 @@ MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
612MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") 612MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
613#endif 613#endif
614 /* Maintainer: Atmel */ 614 /* Maintainer: Atmel */
615 .timer = &at91sam926x_timer, 615 .init_time = at91sam926x_pit_init,
616 .map_io = at91_map_io, 616 .map_io = at91_map_io,
617 .handle_irq = at91_aic_handle_irq, 617 .handle_irq = at91_aic_handle_irq,
618 .init_early = ek_init_early, 618 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 89b9608742a7..3284df05df14 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -443,7 +443,7 @@ static void __init ek_board_init(void)
443 443
444MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") 444MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
445 /* Maintainer: Atmel */ 445 /* Maintainer: Atmel */
446 .timer = &at91sam926x_timer, 446 .init_time = at91sam926x_pit_init,
447 .map_io = at91_map_io, 447 .map_io = at91_map_io,
448 .handle_irq = at91_aic_handle_irq, 448 .handle_irq = at91_aic_handle_irq,
449 .init_early = ek_init_early, 449 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 1b7dd9f688d3..f9cd1f2c7146 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -409,7 +409,7 @@ static void __init ek_board_init(void)
409 409
410MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") 410MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
411 /* Maintainer: Atmel */ 411 /* Maintainer: Atmel */
412 .timer = &at91sam926x_timer, 412 .init_time = at91sam926x_pit_init,
413 .map_io = at91_map_io, 413 .map_io = at91_map_io,
414 .handle_irq = at91_aic_handle_irq, 414 .handle_irq = at91_aic_handle_irq,
415 .init_early = ek_init_early, 415 .init_early = ek_init_early,
@@ -419,7 +419,7 @@ MACHINE_END
419 419
420MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") 420MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
421 /* Maintainer: Atmel */ 421 /* Maintainer: Atmel */
422 .timer = &at91sam926x_timer, 422 .init_time = at91sam926x_pit_init,
423 .map_io = at91_map_io, 423 .map_io = at91_map_io,
424 .handle_irq = at91_aic_handle_irq, 424 .handle_irq = at91_aic_handle_irq,
425 .init_early = ek_init_early, 425 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index e4cc375e3a32..2a94896a1375 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -502,7 +502,7 @@ static void __init ek_board_init(void)
502 502
503MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") 503MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
504 /* Maintainer: Atmel */ 504 /* Maintainer: Atmel */
505 .timer = &at91sam926x_timer, 505 .init_time = at91sam926x_pit_init,
506 .map_io = at91_map_io, 506 .map_io = at91_map_io,
507 .handle_irq = at91_aic_handle_irq, 507 .handle_irq = at91_aic_handle_irq,
508 .init_early = ek_init_early, 508 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 377a1097afa7..aa265dcf2128 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -320,7 +320,7 @@ static void __init ek_board_init(void)
320 320
321MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") 321MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
322 /* Maintainer: Atmel */ 322 /* Maintainer: Atmel */
323 .timer = &at91sam926x_timer, 323 .init_time = at91sam926x_pit_init,
324 .map_io = at91_map_io, 324 .map_io = at91_map_io,
325 .handle_irq = at91_aic_handle_irq, 325 .handle_irq = at91_aic_handle_irq,
326 .init_early = ek_init_early, 326 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 98771500ddb9..3aaa9784cf0e 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -177,7 +177,7 @@ static void __init snapper9260_board_init(void)
177} 177}
178 178
179MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") 179MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
180 .timer = &at91sam926x_timer, 180 .init_time = at91sam926x_pit_init,
181 .map_io = at91_map_io, 181 .map_io = at91_map_io,
182 .handle_irq = at91_aic_handle_irq, 182 .handle_irq = at91_aic_handle_irq,
183 .init_early = snapper9260_init_early, 183 .init_early = snapper9260_init_early,
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 48a962b61fa3..a033b8df9fb2 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -272,7 +272,7 @@ static void __init stamp9g20evb_board_init(void)
272 272
273MACHINE_START(PORTUXG20, "taskit PortuxG20") 273MACHINE_START(PORTUXG20, "taskit PortuxG20")
274 /* Maintainer: taskit GmbH */ 274 /* Maintainer: taskit GmbH */
275 .timer = &at91sam926x_timer, 275 .init_time = at91sam926x_pit_init,
276 .map_io = at91_map_io, 276 .map_io = at91_map_io,
277 .handle_irq = at91_aic_handle_irq, 277 .handle_irq = at91_aic_handle_irq,
278 .init_early = stamp9g20_init_early, 278 .init_early = stamp9g20_init_early,
@@ -282,7 +282,7 @@ MACHINE_END
282 282
283MACHINE_START(STAMP9G20, "taskit Stamp9G20") 283MACHINE_START(STAMP9G20, "taskit Stamp9G20")
284 /* Maintainer: taskit GmbH */ 284 /* Maintainer: taskit GmbH */
285 .timer = &at91sam926x_timer, 285 .init_time = at91sam926x_pit_init,
286 .map_io = at91_map_io, 286 .map_io = at91_map_io,
287 .handle_irq = at91_aic_handle_irq, 287 .handle_irq = at91_aic_handle_irq,
288 .init_early = stamp9g20_init_early, 288 .init_early = stamp9g20_init_early,
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c
index c1060f96e589..2487d944a1bc 100644
--- a/arch/arm/mach-at91/board-usb-a926x.c
+++ b/arch/arm/mach-at91/board-usb-a926x.c
@@ -355,7 +355,7 @@ static void __init ek_board_init(void)
355 355
356MACHINE_START(USB_A9263, "CALAO USB_A9263") 356MACHINE_START(USB_A9263, "CALAO USB_A9263")
357 /* Maintainer: calao-systems */ 357 /* Maintainer: calao-systems */
358 .timer = &at91sam926x_timer, 358 .init_time = at91sam926x_pit_init,
359 .map_io = at91_map_io, 359 .map_io = at91_map_io,
360 .handle_irq = at91_aic_handle_irq, 360 .handle_irq = at91_aic_handle_irq,
361 .init_early = ek_init_early, 361 .init_early = ek_init_early,
@@ -365,7 +365,7 @@ MACHINE_END
365 365
366MACHINE_START(USB_A9260, "CALAO USB_A9260") 366MACHINE_START(USB_A9260, "CALAO USB_A9260")
367 /* Maintainer: calao-systems */ 367 /* Maintainer: calao-systems */
368 .timer = &at91sam926x_timer, 368 .init_time = at91sam926x_pit_init,
369 .map_io = at91_map_io, 369 .map_io = at91_map_io,
370 .handle_irq = at91_aic_handle_irq, 370 .handle_irq = at91_aic_handle_irq,
371 .init_early = ek_init_early, 371 .init_early = ek_init_early,
@@ -375,7 +375,7 @@ MACHINE_END
375 375
376MACHINE_START(USB_A9G20, "CALAO USB_A92G0") 376MACHINE_START(USB_A9G20, "CALAO USB_A92G0")
377 /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ 377 /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */
378 .timer = &at91sam926x_timer, 378 .init_time = at91sam926x_pit_init,
379 .map_io = at91_map_io, 379 .map_io = at91_map_io,
380 .handle_irq = at91_aic_handle_irq, 380 .handle_irq = at91_aic_handle_irq,
381 .init_early = ek_init_early, 381 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 8673aebcb85d..be083771df2e 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -587,7 +587,7 @@ static void __init yl9200_board_init(void)
587 587
588MACHINE_START(YL9200, "uCdragon YL-9200") 588MACHINE_START(YL9200, "uCdragon YL-9200")
589 /* Maintainer: S.Birtles */ 589 /* Maintainer: S.Birtles */
590 .timer = &at91rm9200_timer, 590 .init_time = at91rm9200_timer_init,
591 .map_io = at91_map_io, 591 .map_io = at91_map_io,
592 .handle_irq = at91_aic_handle_irq, 592 .handle_irq = at91_aic_handle_irq,
593 .init_early = yl9200_init_early, 593 .init_early = yl9200_init_early,
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index fc593d615e7d..78ab06548658 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -36,12 +36,11 @@ extern int __init at91_aic5_of_init(struct device_node *node,
36 36
37 37
38 /* Timer */ 38 /* Timer */
39struct sys_timer;
40extern void at91rm9200_ioremap_st(u32 addr); 39extern void at91rm9200_ioremap_st(u32 addr);
41extern struct sys_timer at91rm9200_timer; 40extern void at91rm9200_timer_init(void);
42extern void at91sam926x_ioremap_pit(u32 addr); 41extern void at91sam926x_ioremap_pit(u32 addr);
43extern struct sys_timer at91sam926x_timer; 42extern void at91sam926x_pit_init(void);
44extern struct sys_timer at91x40_timer; 43extern void at91x40_timer_init(void);
45 44
46 /* Clocks */ 45 /* Clocks */
47#ifdef CONFIG_AT91_PMC_UNIT 46#ifdef CONFIG_AT91_PMC_UNIT
diff --git a/arch/arm/mach-bcm/board_bcm.c b/arch/arm/mach-bcm/board_bcm.c
index 3a62f1b1cabc..f0f9abafad29 100644
--- a/arch/arm/mach-bcm/board_bcm.c
+++ b/arch/arm/mach-bcm/board_bcm.c
@@ -11,34 +11,19 @@
11 * GNU General Public License for more details. 11 * GNU General Public License for more details.
12 */ 12 */
13 13
14#include <linux/of_irq.h>
15#include <linux/of_platform.h> 14#include <linux/of_platform.h>
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/device.h> 16#include <linux/device.h>
18#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/irqchip.h>
19 19
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <asm/hardware/gic.h>
22
23#include <asm/mach/time.h> 21#include <asm/mach/time.h>
24 22
25static const struct of_device_id irq_match[] = {
26 {.compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
27 {}
28};
29
30static void timer_init(void) 23static void timer_init(void)
31{ 24{
32} 25}
33 26
34static struct sys_timer timer = {
35 .init = timer_init,
36};
37
38static void __init init_irq(void)
39{
40 of_irq_init(irq_match);
41}
42 27
43static void __init board_init(void) 28static void __init board_init(void)
44{ 29{
@@ -49,9 +34,8 @@ static void __init board_init(void)
49static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, }; 34static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, };
50 35
51DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor") 36DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor")
52 .init_irq = init_irq, 37 .init_irq = irqchip_init,
53 .timer = &timer, 38 .init_time = timer_init,
54 .init_machine = board_init, 39 .init_machine = board_init,
55 .dt_compat = bcm11351_dt_compat, 40 .dt_compat = bcm11351_dt_compat,
56 .handle_irq = gic_handle_irq,
57MACHINE_END 41MACHINE_END
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index f0d739f4b7a3..1a446a164c8c 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -26,11 +26,13 @@
26#include <mach/bcm2835_soc.h> 26#include <mach/bcm2835_soc.h>
27 27
28#define PM_RSTC 0x1c 28#define PM_RSTC 0x1c
29#define PM_RSTS 0x20
29#define PM_WDOG 0x24 30#define PM_WDOG 0x24
30 31
31#define PM_PASSWORD 0x5a000000 32#define PM_PASSWORD 0x5a000000
32#define PM_RSTC_WRCFG_MASK 0x00000030 33#define PM_RSTC_WRCFG_MASK 0x00000030
33#define PM_RSTC_WRCFG_FULL_RESET 0x00000020 34#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
35#define PM_RSTS_HADWRH_SET 0x00000040
34 36
35static void __iomem *wdt_regs; 37static void __iomem *wdt_regs;
36 38
@@ -67,6 +69,29 @@ static void bcm2835_restart(char mode, const char *cmd)
67 mdelay(1); 69 mdelay(1);
68} 70}
69 71
72/*
73 * We can't really power off, but if we do the normal reset scheme, and
74 * indicate to bootcode.bin not to reboot, then most of the chip will be
75 * powered off.
76 */
77static void bcm2835_power_off(void)
78{
79 u32 val;
80
81 /*
82 * We set the watchdog hard reset bit here to distinguish this reset
83 * from the normal (full) reset. bootcode.bin will not reboot after a
84 * hard reset.
85 */
86 val = readl_relaxed(wdt_regs + PM_RSTS);
87 val &= ~PM_RSTC_WRCFG_MASK;
88 val |= PM_PASSWORD | PM_RSTS_HADWRH_SET;
89 writel_relaxed(val, wdt_regs + PM_RSTS);
90
91 /* Continue with normal reset mechanism */
92 bcm2835_restart(0, "");
93}
94
70static struct map_desc io_map __initdata = { 95static struct map_desc io_map __initdata = {
71 .virtual = BCM2835_PERIPH_VIRT, 96 .virtual = BCM2835_PERIPH_VIRT,
72 .pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS), 97 .pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS),
@@ -84,6 +109,9 @@ static void __init bcm2835_init(void)
84 int ret; 109 int ret;
85 110
86 bcm2835_setup_restart(); 111 bcm2835_setup_restart();
112 if (wdt_regs)
113 pm_power_off = bcm2835_power_off;
114
87 bcm2835_init_clocks(); 115 bcm2835_init_clocks();
88 116
89 ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, 117 ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
@@ -104,7 +132,7 @@ DT_MACHINE_START(BCM2835, "BCM2835")
104 .init_irq = bcm2835_init_irq, 132 .init_irq = bcm2835_init_irq,
105 .handle_irq = bcm2835_handle_irq, 133 .handle_irq = bcm2835_handle_irq,
106 .init_machine = bcm2835_init, 134 .init_machine = bcm2835_init,
107 .timer = &bcm2835_timer, 135 .init_time = bcm2835_timer_init,
108 .restart = bcm2835_restart, 136 .restart = bcm2835_restart,
109 .dt_compat = bcm2835_compat 137 .dt_compat = bcm2835_compat
110MACHINE_END 138MACHINE_END
diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c
index 3fbf43f72589..f38584709df7 100644
--- a/arch/arm/mach-clps711x/board-autcpu12.c
+++ b/arch/arm/mach-clps711x/board-autcpu12.c
@@ -170,7 +170,7 @@ MACHINE_START(AUTCPU12, "autronix autcpu12")
170 .nr_irqs = CLPS711X_NR_IRQS, 170 .nr_irqs = CLPS711X_NR_IRQS,
171 .map_io = clps711x_map_io, 171 .map_io = clps711x_map_io,
172 .init_irq = clps711x_init_irq, 172 .init_irq = clps711x_init_irq,
173 .timer = &clps711x_timer, 173 .init_time = clps711x_timer_init,
174 .init_machine = autcpu12_init, 174 .init_machine = autcpu12_init,
175 .init_late = autcpu12_init_late, 175 .init_late = autcpu12_init_late,
176 .handle_irq = clps711x_handle_irq, 176 .handle_irq = clps711x_handle_irq,
diff --git a/arch/arm/mach-clps711x/board-cdb89712.c b/arch/arm/mach-clps711x/board-cdb89712.c
index 60900ddf97c9..baab7da33c9b 100644
--- a/arch/arm/mach-clps711x/board-cdb89712.c
+++ b/arch/arm/mach-clps711x/board-cdb89712.c
@@ -140,7 +140,7 @@ MACHINE_START(CDB89712, "Cirrus-CDB89712")
140 .nr_irqs = CLPS711X_NR_IRQS, 140 .nr_irqs = CLPS711X_NR_IRQS,
141 .map_io = clps711x_map_io, 141 .map_io = clps711x_map_io,
142 .init_irq = clps711x_init_irq, 142 .init_irq = clps711x_init_irq,
143 .timer = &clps711x_timer, 143 .init_time = clps711x_timer_init,
144 .init_machine = cdb89712_init, 144 .init_machine = cdb89712_init,
145 .handle_irq = clps711x_handle_irq, 145 .handle_irq = clps711x_handle_irq,
146 .restart = clps711x_restart, 146 .restart = clps711x_restart,
diff --git a/arch/arm/mach-clps711x/board-clep7312.c b/arch/arm/mach-clps711x/board-clep7312.c
index 0b32a487183b..014aa3c19a03 100644
--- a/arch/arm/mach-clps711x/board-clep7312.c
+++ b/arch/arm/mach-clps711x/board-clep7312.c
@@ -40,7 +40,7 @@ MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
40 .fixup = fixup_clep7312, 40 .fixup = fixup_clep7312,
41 .map_io = clps711x_map_io, 41 .map_io = clps711x_map_io,
42 .init_irq = clps711x_init_irq, 42 .init_irq = clps711x_init_irq,
43 .timer = &clps711x_timer, 43 .init_time = clps711x_timer_init,
44 .handle_irq = clps711x_handle_irq, 44 .handle_irq = clps711x_handle_irq,
45 .restart = clps711x_restart, 45 .restart = clps711x_restart,
46MACHINE_END 46MACHINE_END
diff --git a/arch/arm/mach-clps711x/board-edb7211.c b/arch/arm/mach-clps711x/board-edb7211.c
index 71aa5cf2c0d3..5f928e9ed2ef 100644
--- a/arch/arm/mach-clps711x/board-edb7211.c
+++ b/arch/arm/mach-clps711x/board-edb7211.c
@@ -173,7 +173,7 @@ MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
173 .reserve = edb7211_reserve, 173 .reserve = edb7211_reserve,
174 .map_io = edb7211_map_io, 174 .map_io = edb7211_map_io,
175 .init_irq = clps711x_init_irq, 175 .init_irq = clps711x_init_irq,
176 .timer = &clps711x_timer, 176 .init_time = clps711x_timer_init,
177 .init_machine = edb7211_init, 177 .init_machine = edb7211_init,
178 .handle_irq = clps711x_handle_irq, 178 .handle_irq = clps711x_handle_irq,
179 .restart = clps711x_restart, 179 .restart = clps711x_restart,
diff --git a/arch/arm/mach-clps711x/board-fortunet.c b/arch/arm/mach-clps711x/board-fortunet.c
index 7d0125580366..c5675efc8c6a 100644
--- a/arch/arm/mach-clps711x/board-fortunet.c
+++ b/arch/arm/mach-clps711x/board-fortunet.c
@@ -78,7 +78,7 @@ MACHINE_START(FORTUNET, "ARM-FortuNet")
78 .fixup = fortunet_fixup, 78 .fixup = fortunet_fixup,
79 .map_io = clps711x_map_io, 79 .map_io = clps711x_map_io,
80 .init_irq = clps711x_init_irq, 80 .init_irq = clps711x_init_irq,
81 .timer = &clps711x_timer, 81 .init_time = clps711x_timer_init,
82 .handle_irq = clps711x_handle_irq, 82 .handle_irq = clps711x_handle_irq,
83 .restart = clps711x_restart, 83 .restart = clps711x_restart,
84MACHINE_END 84MACHINE_END
diff --git a/arch/arm/mach-clps711x/board-p720t.c b/arch/arm/mach-clps711x/board-p720t.c
index 1518fc83babd..8d3ee6771135 100644
--- a/arch/arm/mach-clps711x/board-p720t.c
+++ b/arch/arm/mach-clps711x/board-p720t.c
@@ -224,7 +224,7 @@ MACHINE_START(P720T, "ARM-Prospector720T")
224 .map_io = p720t_map_io, 224 .map_io = p720t_map_io,
225 .init_early = p720t_init_early, 225 .init_early = p720t_init_early,
226 .init_irq = clps711x_init_irq, 226 .init_irq = clps711x_init_irq,
227 .timer = &clps711x_timer, 227 .init_time = clps711x_timer_init,
228 .init_machine = p720t_init, 228 .init_machine = p720t_init,
229 .init_late = p720t_init_late, 229 .init_late = p720t_init_late,
230 .handle_irq = clps711x_handle_irq, 230 .handle_irq = clps711x_handle_irq,
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index e046439573ee..20ff50f3ccf0 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -282,7 +282,7 @@ static void add_fixed_clk(struct clk *clk, const char *name, int rate)
282 clk_register_clkdev(clk, name, NULL); 282 clk_register_clkdev(clk, name, NULL);
283} 283}
284 284
285static void __init clps711x_timer_init(void) 285void __init clps711x_timer_init(void)
286{ 286{
287 int osc, ext, pll, cpu, bus, timl, timh, uart, spi; 287 int osc, ext, pll, cpu, bus, timl, timh, uart, spi;
288 u32 tmp; 288 u32 tmp;
@@ -345,10 +345,6 @@ static void __init clps711x_timer_init(void)
345 setup_irq(IRQ_TC2OI, &clps711x_timer_irq); 345 setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
346} 346}
347 347
348struct sys_timer clps711x_timer = {
349 .init = clps711x_timer_init,
350};
351
352void clps711x_restart(char mode, const char *cmd) 348void clps711x_restart(char mode, const char *cmd)
353{ 349{
354 soft_restart(0); 350 soft_restart(0);
diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h
index b7c0c75c90c0..f84a7292c70e 100644
--- a/arch/arm/mach-clps711x/common.h
+++ b/arch/arm/mach-clps711x/common.h
@@ -8,10 +8,8 @@
8#define CLPS711X_NR_GPIO (4 * 8 + 3) 8#define CLPS711X_NR_GPIO (4 * 8 + 3)
9#define CLPS711X_GPIO(prt, bit) ((prt) * 8 + (bit)) 9#define CLPS711X_GPIO(prt, bit) ((prt) * 8 + (bit))
10 10
11struct sys_timer;
12
13extern void clps711x_map_io(void); 11extern void clps711x_map_io(void);
14extern void clps711x_init_irq(void); 12extern void clps711x_init_irq(void);
13extern void clps711x_timer_init(void);
15extern void clps711x_handle_irq(struct pt_regs *regs); 14extern void clps711x_handle_irq(struct pt_regs *regs);
16extern void clps711x_restart(char mode, const char *cmd); 15extern void clps711x_restart(char mode, const char *cmd);
17extern struct sys_timer clps711x_timer;
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index ae305397003c..a71867e1d8d6 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -28,7 +28,6 @@
28#include <linux/usb/ohci_pdriver.h> 28#include <linux/usb/ohci_pdriver.h>
29#include <asm/setup.h> 29#include <asm/setup.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31#include <asm/hardware/gic.h>
32#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
33#include <asm/mach/map.h> 32#include <asm/mach/map.h>
34#include <asm/mach/time.h> 33#include <asm/mach/time.h>
@@ -250,8 +249,7 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
250 .atag_offset = 0x100, 249 .atag_offset = 0x100,
251 .map_io = cns3420_map_io, 250 .map_io = cns3420_map_io,
252 .init_irq = cns3xxx_init_irq, 251 .init_irq = cns3xxx_init_irq,
253 .timer = &cns3xxx_timer, 252 .init_time = cns3xxx_timer_init,
254 .handle_irq = gic_handle_irq,
255 .init_machine = cns3420_init, 253 .init_machine = cns3420_init,
256 .restart = cns3xxx_restart, 254 .restart = cns3xxx_restart,
257MACHINE_END 255MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 031805b1428d..e698f26cc0cb 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -12,10 +12,10 @@
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/clockchips.h> 13#include <linux/clockchips.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/irqchip/arm-gic.h>
15#include <asm/mach/map.h> 16#include <asm/mach/map.h>
16#include <asm/mach/time.h> 17#include <asm/mach/time.h>
17#include <asm/mach/irq.h> 18#include <asm/mach/irq.h>
18#include <asm/hardware/gic.h>
19#include <asm/hardware/cache-l2x0.h> 19#include <asm/hardware/cache-l2x0.h>
20#include <mach/cns3xxx.h> 20#include <mach/cns3xxx.h>
21#include "core.h" 21#include "core.h"
@@ -134,7 +134,6 @@ static int cns3xxx_timer_set_next_event(unsigned long evt,
134 134
135static struct clock_event_device cns3xxx_tmr1_clockevent = { 135static struct clock_event_device cns3xxx_tmr1_clockevent = {
136 .name = "cns3xxx timer1", 136 .name = "cns3xxx timer1",
137 .shift = 8,
138 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 137 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
139 .set_mode = cns3xxx_timer_set_mode, 138 .set_mode = cns3xxx_timer_set_mode,
140 .set_next_event = cns3xxx_timer_set_next_event, 139 .set_next_event = cns3xxx_timer_set_next_event,
@@ -145,15 +144,9 @@ static struct clock_event_device cns3xxx_tmr1_clockevent = {
145static void __init cns3xxx_clockevents_init(unsigned int timer_irq) 144static void __init cns3xxx_clockevents_init(unsigned int timer_irq)
146{ 145{
147 cns3xxx_tmr1_clockevent.irq = timer_irq; 146 cns3xxx_tmr1_clockevent.irq = timer_irq;
148 cns3xxx_tmr1_clockevent.mult = 147 clockevents_config_and_register(&cns3xxx_tmr1_clockevent,
149 div_sc((cns3xxx_cpu_clock() >> 3) * 1000000, NSEC_PER_SEC, 148 (cns3xxx_cpu_clock() >> 3) * 1000000,
150 cns3xxx_tmr1_clockevent.shift); 149 0xf, 0xffffffff);
151 cns3xxx_tmr1_clockevent.max_delta_ns =
152 clockevent_delta2ns(0xffffffff, &cns3xxx_tmr1_clockevent);
153 cns3xxx_tmr1_clockevent.min_delta_ns =
154 clockevent_delta2ns(0xf, &cns3xxx_tmr1_clockevent);
155
156 clockevents_register_device(&cns3xxx_tmr1_clockevent);
157} 150}
158 151
159/* 152/*
@@ -235,17 +228,13 @@ static void __init __cns3xxx_timer_init(unsigned int timer_irq)
235 cns3xxx_clockevents_init(timer_irq); 228 cns3xxx_clockevents_init(timer_irq);
236} 229}
237 230
238static void __init cns3xxx_timer_init(void) 231void __init cns3xxx_timer_init(void)
239{ 232{
240 cns3xxx_tmr1 = IOMEM(CNS3XXX_TIMER1_2_3_BASE_VIRT); 233 cns3xxx_tmr1 = IOMEM(CNS3XXX_TIMER1_2_3_BASE_VIRT);
241 234
242 __cns3xxx_timer_init(IRQ_CNS3XXX_TIMER0); 235 __cns3xxx_timer_init(IRQ_CNS3XXX_TIMER0);
243} 236}
244 237
245struct sys_timer cns3xxx_timer = {
246 .init = cns3xxx_timer_init,
247};
248
249#ifdef CONFIG_CACHE_L2X0 238#ifdef CONFIG_CACHE_L2X0
250 239
251void __init cns3xxx_l2x0_init(void) 240void __init cns3xxx_l2x0_init(void)
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h
index 4894b8c17151..b23b17b4da10 100644
--- a/arch/arm/mach-cns3xxx/core.h
+++ b/arch/arm/mach-cns3xxx/core.h
@@ -11,7 +11,7 @@
11#ifndef __CNS3XXX_CORE_H 11#ifndef __CNS3XXX_CORE_H
12#define __CNS3XXX_CORE_H 12#define __CNS3XXX_CORE_H
13 13
14extern struct sys_timer cns3xxx_timer; 14extern void cns3xxx_timer_init(void);
15 15
16#ifdef CONFIG_CACHE_L2X0 16#ifdef CONFIG_CACHE_L2X0
17void __init cns3xxx_l2x0_init(void); 17void __init cns3xxx_l2x0_init(void);
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 95b5e102ceb1..6da25eebf911 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -652,8 +652,13 @@ static __init void da830_evm_init(void)
652 if (ret) 652 if (ret)
653 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret); 653 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
654 654
655 ret = da8xx_register_spi(0, da830evm_spi_info, 655 ret = spi_register_board_info(da830evm_spi_info,
656 ARRAY_SIZE(da830evm_spi_info)); 656 ARRAY_SIZE(da830evm_spi_info));
657 if (ret)
658 pr_warn("%s: spi info registration failed: %d\n", __func__,
659 ret);
660
661 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
657 if (ret) 662 if (ret)
658 pr_warning("da830_evm_init: spi 0 registration failed: %d\n", 663 pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
659 ret); 664 ret);
@@ -679,7 +684,7 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
679 .atag_offset = 0x100, 684 .atag_offset = 0x100,
680 .map_io = da830_evm_map_io, 685 .map_io = da830_evm_map_io,
681 .init_irq = cp_intc_init, 686 .init_irq = cp_intc_init,
682 .timer = &davinci_timer, 687 .init_time = davinci_timer_init,
683 .init_machine = da830_evm_init, 688 .init_machine = da830_evm_init,
684 .init_late = davinci_init_late, 689 .init_late = davinci_init_late,
685 .dma_zone_size = SZ_128M, 690 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 0299915575a8..3a76a47df39c 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1565,8 +1565,13 @@ static __init void da850_evm_init(void)
1565 1565
1566 da850_vpif_init(); 1566 da850_vpif_init();
1567 1567
1568 ret = da8xx_register_spi(1, da850evm_spi_info, 1568 ret = spi_register_board_info(da850evm_spi_info,
1569 ARRAY_SIZE(da850evm_spi_info)); 1569 ARRAY_SIZE(da850evm_spi_info));
1570 if (ret)
1571 pr_warn("%s: spi info registration failed: %d\n", __func__,
1572 ret);
1573
1574 ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info));
1570 if (ret) 1575 if (ret)
1571 pr_warning("da850_evm_init: spi 1 registration failed: %d\n", 1576 pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
1572 ret); 1577 ret);
@@ -1599,7 +1604,7 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
1599 .atag_offset = 0x100, 1604 .atag_offset = 0x100,
1600 .map_io = da850_evm_map_io, 1605 .map_io = da850_evm_map_io,
1601 .init_irq = cp_intc_init, 1606 .init_irq = cp_intc_init,
1602 .timer = &davinci_timer, 1607 .init_time = davinci_timer_init,
1603 .init_machine = da850_evm_init, 1608 .init_machine = da850_evm_init,
1604 .init_late = davinci_init_late, 1609 .init_late = davinci_init_late,
1605 .dma_zone_size = SZ_128M, 1610 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index cdf8d0746e79..147b8e1a4407 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -355,7 +355,7 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
355 .atag_offset = 0x100, 355 .atag_offset = 0x100,
356 .map_io = dm355_evm_map_io, 356 .map_io = dm355_evm_map_io,
357 .init_irq = davinci_irq_init, 357 .init_irq = davinci_irq_init,
358 .timer = &davinci_timer, 358 .init_time = davinci_timer_init,
359 .init_machine = dm355_evm_init, 359 .init_machine = dm355_evm_init,
360 .init_late = davinci_init_late, 360 .init_late = davinci_init_late,
361 .dma_zone_size = SZ_128M, 361 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index d41954507fc2..dff4ddc5ef81 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -274,7 +274,7 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
274 .atag_offset = 0x100, 274 .atag_offset = 0x100,
275 .map_io = dm355_leopard_map_io, 275 .map_io = dm355_leopard_map_io,
276 .init_irq = davinci_irq_init, 276 .init_irq = davinci_irq_init,
277 .timer = &davinci_timer, 277 .init_time = davinci_timer_init,
278 .init_machine = dm355_leopard_init, 278 .init_machine = dm355_leopard_init,
279 .init_late = davinci_init_late, 279 .init_late = davinci_init_late,
280 .dma_zone_size = SZ_128M, 280 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 5d49c75388ca..c2d4958a0cb6 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -616,7 +616,7 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
616 .atag_offset = 0x100, 616 .atag_offset = 0x100,
617 .map_io = dm365_evm_map_io, 617 .map_io = dm365_evm_map_io,
618 .init_irq = davinci_irq_init, 618 .init_irq = davinci_irq_init,
619 .timer = &davinci_timer, 619 .init_time = davinci_timer_init,
620 .init_machine = dm365_evm_init, 620 .init_machine = dm365_evm_init,
621 .init_late = davinci_init_late, 621 .init_late = davinci_init_late,
622 .dma_zone_size = SZ_128M, 622 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index f5e018de7fa5..e4a16f98e6a2 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -825,7 +825,7 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
825 .atag_offset = 0x100, 825 .atag_offset = 0x100,
826 .map_io = davinci_evm_map_io, 826 .map_io = davinci_evm_map_io,
827 .init_irq = davinci_irq_init, 827 .init_irq = davinci_irq_init,
828 .timer = &davinci_timer, 828 .init_time = davinci_timer_init,
829 .init_machine = davinci_evm_init, 829 .init_machine = davinci_evm_init,
830 .init_late = davinci_init_late, 830 .init_late = davinci_init_late,
831 .dma_zone_size = SZ_128M, 831 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 6e2f1631df5b..de7adff324dc 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -818,7 +818,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
818 .atag_offset = 0x100, 818 .atag_offset = 0x100,
819 .map_io = davinci_map_io, 819 .map_io = davinci_map_io,
820 .init_irq = davinci_irq_init, 820 .init_irq = davinci_irq_init,
821 .timer = &davinci_timer, 821 .init_time = davinci_timer_init,
822 .init_machine = evm_init, 822 .init_machine = evm_init,
823 .init_late = davinci_init_late, 823 .init_late = davinci_init_late,
824 .dma_zone_size = SZ_128M, 824 .dma_zone_size = SZ_128M,
@@ -829,7 +829,7 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
829 .atag_offset = 0x100, 829 .atag_offset = 0x100,
830 .map_io = davinci_map_io, 830 .map_io = davinci_map_io,
831 .init_irq = davinci_irq_init, 831 .init_irq = davinci_irq_init,
832 .timer = &davinci_timer, 832 .init_time = davinci_timer_init,
833 .init_machine = evm_init, 833 .init_machine = evm_init,
834 .init_late = davinci_init_late, 834 .init_late = davinci_init_late,
835 .dma_zone_size = SZ_128M, 835 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 43e4a0d663fa..9549d53aa63f 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -529,8 +529,13 @@ static void __init mityomapl138_init(void)
529 529
530 mityomapl138_setup_nand(); 530 mityomapl138_setup_nand();
531 531
532 ret = da8xx_register_spi(1, mityomapl138_spi_flash_info, 532 ret = spi_register_board_info(mityomapl138_spi_flash_info,
533 ARRAY_SIZE(mityomapl138_spi_flash_info)); 533 ARRAY_SIZE(mityomapl138_spi_flash_info));
534 if (ret)
535 pr_warn("spi info registration failed: %d\n", ret);
536
537 ret = da8xx_register_spi_bus(1,
538 ARRAY_SIZE(mityomapl138_spi_flash_info));
534 if (ret) 539 if (ret)
535 pr_warning("spi 1 registration failed: %d\n", ret); 540 pr_warning("spi 1 registration failed: %d\n", ret);
536 541
@@ -570,7 +575,7 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
570 .atag_offset = 0x100, 575 .atag_offset = 0x100,
571 .map_io = mityomapl138_map_io, 576 .map_io = mityomapl138_map_io,
572 .init_irq = cp_intc_init, 577 .init_irq = cp_intc_init,
573 .timer = &davinci_timer, 578 .init_time = davinci_timer_init,
574 .init_machine = mityomapl138_init, 579 .init_machine = mityomapl138_init,
575 .init_late = davinci_init_late, 580 .init_late = davinci_init_late,
576 .dma_zone_size = SZ_128M, 581 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 3e3e3afebf88..1c98107527fa 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -237,7 +237,7 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
237 .atag_offset = 0x100, 237 .atag_offset = 0x100,
238 .map_io = davinci_ntosd2_map_io, 238 .map_io = davinci_ntosd2_map_io,
239 .init_irq = davinci_irq_init, 239 .init_irq = davinci_irq_init,
240 .timer = &davinci_timer, 240 .init_time = davinci_timer_init,
241 .init_machine = davinci_ntosd2_init, 241 .init_machine = davinci_ntosd2_init,
242 .init_late = davinci_init_late, 242 .init_late = davinci_init_late,
243 .dma_zone_size = SZ_128M, 243 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index dc1208e9e664..deb3922612b9 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -341,7 +341,7 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
341 .atag_offset = 0x100, 341 .atag_offset = 0x100,
342 .map_io = omapl138_hawk_map_io, 342 .map_io = omapl138_hawk_map_io,
343 .init_irq = cp_intc_init, 343 .init_irq = cp_intc_init,
344 .timer = &davinci_timer, 344 .init_time = davinci_timer_init,
345 .init_machine = omapl138_hawk_init, 345 .init_machine = omapl138_hawk_init,
346 .init_late = davinci_init_late, 346 .init_late = davinci_init_late,
347 .dma_zone_size = SZ_128M, 347 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 6957787fa7f3..739be7e738fe 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -155,7 +155,7 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
155 .atag_offset = 0x100, 155 .atag_offset = 0x100,
156 .map_io = davinci_sffsdr_map_io, 156 .map_io = davinci_sffsdr_map_io,
157 .init_irq = davinci_irq_init, 157 .init_irq = davinci_irq_init,
158 .timer = &davinci_timer, 158 .init_time = davinci_timer_init,
159 .init_machine = davinci_sffsdr_init, 159 .init_machine = davinci_sffsdr_init,
160 .init_late = davinci_init_late, 160 .init_late = davinci_init_late,
161 .dma_zone_size = SZ_128M, 161 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index be3099733b1f..4f416023d4e2 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -280,7 +280,7 @@ MACHINE_START(TNETV107X, "TNETV107X EVM")
280 .atag_offset = 0x100, 280 .atag_offset = 0x100,
281 .map_io = tnetv107x_init, 281 .map_io = tnetv107x_init,
282 .init_irq = cp_intc_init, 282 .init_irq = cp_intc_init,
283 .timer = &davinci_timer, 283 .init_time = davinci_timer_init,
284 .init_machine = tnetv107x_evm_board_init, 284 .init_machine = tnetv107x_evm_board_init,
285 .init_late = davinci_init_late, 285 .init_late = davinci_init_late,
286 .dma_zone_size = SZ_128M, 286 .dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 34668ead53c7..d458558ee84a 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -52,6 +52,40 @@ static void __clk_disable(struct clk *clk)
52 __clk_disable(clk->parent); 52 __clk_disable(clk->parent);
53} 53}
54 54
55int davinci_clk_reset(struct clk *clk, bool reset)
56{
57 unsigned long flags;
58
59 if (clk == NULL || IS_ERR(clk))
60 return -EINVAL;
61
62 spin_lock_irqsave(&clockfw_lock, flags);
63 if (clk->flags & CLK_PSC)
64 davinci_psc_reset(clk->gpsc, clk->lpsc, reset);
65 spin_unlock_irqrestore(&clockfw_lock, flags);
66
67 return 0;
68}
69EXPORT_SYMBOL(davinci_clk_reset);
70
71int davinci_clk_reset_assert(struct clk *clk)
72{
73 if (clk == NULL || IS_ERR(clk) || !clk->reset)
74 return -EINVAL;
75
76 return clk->reset(clk, true);
77}
78EXPORT_SYMBOL(davinci_clk_reset_assert);
79
80int davinci_clk_reset_deassert(struct clk *clk)
81{
82 if (clk == NULL || IS_ERR(clk) || !clk->reset)
83 return -EINVAL;
84
85 return clk->reset(clk, false);
86}
87EXPORT_SYMBOL(davinci_clk_reset_deassert);
88
55int clk_enable(struct clk *clk) 89int clk_enable(struct clk *clk)
56{ 90{
57 unsigned long flags; 91 unsigned long flags;
@@ -535,7 +569,7 @@ int davinci_set_refclk_rate(unsigned long rate)
535} 569}
536 570
537int __init davinci_clk_init(struct clk_lookup *clocks) 571int __init davinci_clk_init(struct clk_lookup *clocks)
538 { 572{
539 struct clk_lookup *c; 573 struct clk_lookup *c;
540 struct clk *clk; 574 struct clk *clk;
541 size_t num_clocks = 0; 575 size_t num_clocks = 0;
@@ -576,6 +610,9 @@ int __init davinci_clk_init(struct clk_lookup *clocks)
576 if (clk->lpsc) 610 if (clk->lpsc)
577 clk->flags |= CLK_PSC; 611 clk->flags |= CLK_PSC;
578 612
613 if (clk->flags & PSC_LRST)
614 clk->reset = davinci_clk_reset;
615
579 clk_register(clk); 616 clk_register(clk);
580 num_clocks++; 617 num_clocks++;
581 618
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 46f0f1bf1a4c..8694b395fc92 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -103,6 +103,7 @@ struct clk {
103 unsigned long (*recalc) (struct clk *); 103 unsigned long (*recalc) (struct clk *);
104 int (*set_rate) (struct clk *clk, unsigned long rate); 104 int (*set_rate) (struct clk *clk, unsigned long rate);
105 int (*round_rate) (struct clk *clk, unsigned long rate); 105 int (*round_rate) (struct clk *clk, unsigned long rate);
106 int (*reset) (struct clk *clk, bool reset);
106}; 107};
107 108
108/* Clock flags: SoC-specific flags start at BIT(16) */ 109/* Clock flags: SoC-specific flags start at BIT(16) */
@@ -112,6 +113,7 @@ struct clk {
112#define PRE_PLL BIT(4) /* source is before PLL mult/div */ 113#define PRE_PLL BIT(4) /* source is before PLL mult/div */
113#define PSC_SWRSTDISABLE BIT(5) /* Disable state is SwRstDisable */ 114#define PSC_SWRSTDISABLE BIT(5) /* Disable state is SwRstDisable */
114#define PSC_FORCE BIT(6) /* Force module state transtition */ 115#define PSC_FORCE BIT(6) /* Force module state transtition */
116#define PSC_LRST BIT(8) /* Use local reset on enable/disable */
115 117
116#define CLK(dev, con, ck) \ 118#define CLK(dev, con, ck) \
117 { \ 119 { \
@@ -126,6 +128,7 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
126int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate); 128int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
127int davinci_set_refclk_rate(unsigned long rate); 129int davinci_set_refclk_rate(unsigned long rate);
128int davinci_simple_set_rate(struct clk *clk, unsigned long rate); 130int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
131int davinci_clk_reset(struct clk *clk, bool reset);
129 132
130extern struct platform_device davinci_wdt_device; 133extern struct platform_device davinci_wdt_device;
131extern void davinci_watchdog_reset(struct platform_device *); 134extern void davinci_watchdog_reset(struct platform_device *);
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 6b9154e9f908..0c4a26ddebba 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -76,6 +76,13 @@ static struct clk pll0_aux_clk = {
76 .flags = CLK_PLL | PRE_PLL, 76 .flags = CLK_PLL | PRE_PLL,
77}; 77};
78 78
79static struct clk pll0_sysclk1 = {
80 .name = "pll0_sysclk1",
81 .parent = &pll0_clk,
82 .flags = CLK_PLL,
83 .div_reg = PLLDIV1,
84};
85
79static struct clk pll0_sysclk2 = { 86static struct clk pll0_sysclk2 = {
80 .name = "pll0_sysclk2", 87 .name = "pll0_sysclk2",
81 .parent = &pll0_clk, 88 .parent = &pll0_clk,
@@ -368,10 +375,19 @@ static struct clk sata_clk = {
368 .flags = PSC_FORCE, 375 .flags = PSC_FORCE,
369}; 376};
370 377
378static struct clk dsp_clk = {
379 .name = "dsp",
380 .parent = &pll0_sysclk1,
381 .domain = DAVINCI_GPSC_DSPDOMAIN,
382 .lpsc = DA8XX_LPSC0_GEM,
383 .flags = PSC_LRST | PSC_FORCE,
384};
385
371static struct clk_lookup da850_clks[] = { 386static struct clk_lookup da850_clks[] = {
372 CLK(NULL, "ref", &ref_clk), 387 CLK(NULL, "ref", &ref_clk),
373 CLK(NULL, "pll0", &pll0_clk), 388 CLK(NULL, "pll0", &pll0_clk),
374 CLK(NULL, "pll0_aux", &pll0_aux_clk), 389 CLK(NULL, "pll0_aux", &pll0_aux_clk),
390 CLK(NULL, "pll0_sysclk1", &pll0_sysclk1),
375 CLK(NULL, "pll0_sysclk2", &pll0_sysclk2), 391 CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
376 CLK(NULL, "pll0_sysclk3", &pll0_sysclk3), 392 CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
377 CLK(NULL, "pll0_sysclk4", &pll0_sysclk4), 393 CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
@@ -413,6 +429,7 @@ static struct clk_lookup da850_clks[] = {
413 CLK("spi_davinci.1", NULL, &spi1_clk), 429 CLK("spi_davinci.1", NULL, &spi1_clk),
414 CLK("vpif", NULL, &vpif_clk), 430 CLK("vpif", NULL, &vpif_clk),
415 CLK("ahci", NULL, &sata_clk), 431 CLK("ahci", NULL, &sata_clk),
432 CLK("davinci-rproc.0", NULL, &dsp_clk),
416 CLK(NULL, NULL, NULL), 433 CLK(NULL, NULL, NULL),
417}; 434};
418 435
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 37c27af18fa0..9a7c76efc8f8 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -56,7 +56,7 @@ static const char *da850_boards_compat[] __initdata = {
56DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x") 56DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x")
57 .map_io = da850_init, 57 .map_io = da850_init,
58 .init_irq = da8xx_init_irq, 58 .init_irq = da8xx_init_irq,
59 .timer = &davinci_timer, 59 .init_time = davinci_timer_init,
60 .init_machine = da850_init_machine, 60 .init_machine = da850_init_machine,
61 .dt_compat = da850_boards_compat, 61 .dt_compat = da850_boards_compat,
62 .init_late = davinci_init_late, 62 .init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 2d5502d84a22..aa402bc160c8 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -751,7 +751,7 @@ void __iomem * __init da8xx_get_mem_ctlr(void)
751 751
752 da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K); 752 da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K);
753 if (!da8xx_ddr2_ctlr_base) 753 if (!da8xx_ddr2_ctlr_base)
754 pr_warning("%s: Unable to map DDR2 controller", __func__); 754 pr_warn("%s: Unable to map DDR2 controller", __func__);
755 755
756 return da8xx_ddr2_ctlr_base; 756 return da8xx_ddr2_ctlr_base;
757} 757}
@@ -832,7 +832,7 @@ static struct resource da8xx_spi1_resources[] = {
832 }, 832 },
833}; 833};
834 834
835struct davinci_spi_platform_data da8xx_spi_pdata[] = { 835static struct davinci_spi_platform_data da8xx_spi_pdata[] = {
836 [0] = { 836 [0] = {
837 .version = SPI_VERSION_2, 837 .version = SPI_VERSION_2,
838 .intr_line = 1, 838 .intr_line = 1,
@@ -866,20 +866,12 @@ static struct platform_device da8xx_spi_device[] = {
866 }, 866 },
867}; 867};
868 868
869int __init da8xx_register_spi(int instance, const struct spi_board_info *info, 869int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
870 unsigned len)
871{ 870{
872 int ret;
873
874 if (instance < 0 || instance > 1) 871 if (instance < 0 || instance > 1)
875 return -EINVAL; 872 return -EINVAL;
876 873
877 ret = spi_register_board_info(info, len); 874 da8xx_spi_pdata[instance].num_chipselect = num_chipselect;
878 if (ret)
879 pr_warning("%s: failed to register board info for spi %d :"
880 " %d\n", __func__, instance, ret);
881
882 da8xx_spi_pdata[instance].num_chipselect = len;
883 875
884 if (instance == 1 && cpu_is_davinci_da850()) { 876 if (instance == 1 && cpu_is_davinci_da850()) {
885 da8xx_spi1_resources[0].start = DA850_SPI1_BASE; 877 da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h
index a3b040219876..3e8af6a0b64c 100644
--- a/arch/arm/mach-davinci/include/mach/clock.h
+++ b/arch/arm/mach-davinci/include/mach/clock.h
@@ -18,4 +18,7 @@ struct clk;
18extern int clk_register(struct clk *clk); 18extern int clk_register(struct clk *clk);
19extern void clk_unregister(struct clk *clk); 19extern void clk_unregister(struct clk *clk);
20 20
21int davinci_clk_reset_assert(struct clk *c);
22int davinci_clk_reset_deassert(struct clk *c);
23
21#endif 24#endif
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 046c7238a3d6..b124b77c90c5 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -15,9 +15,7 @@
15#include <linux/compiler.h> 15#include <linux/compiler.h>
16#include <linux/types.h> 16#include <linux/types.h>
17 17
18struct sys_timer; 18extern void davinci_timer_init(void);
19
20extern struct sys_timer davinci_timer;
21 19
22extern void davinci_irq_init(void); 20extern void davinci_irq_init(void);
23extern void __iomem *davinci_intc_base; 21extern void __iomem *davinci_intc_base;
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 700d311c6854..1b14aea40310 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -82,8 +82,7 @@ void __init da850_init(void);
82int da830_register_edma(struct edma_rsv_info *rsv); 82int da830_register_edma(struct edma_rsv_info *rsv);
83int da850_register_edma(struct edma_rsv_info *rsv[2]); 83int da850_register_edma(struct edma_rsv_info *rsv[2]);
84int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); 84int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
85int da8xx_register_spi(int instance, 85int da8xx_register_spi_bus(int instance, unsigned num_chipselect);
86 const struct spi_board_info *info, unsigned len);
87int da8xx_register_watchdog(void); 86int da8xx_register_watchdog(void);
88int da8xx_register_usb20(unsigned mA, unsigned potpgt); 87int da8xx_register_usb20(unsigned mA, unsigned potpgt);
89int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); 88int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
@@ -110,7 +109,6 @@ extern struct platform_device da8xx_serial_device;
110extern struct emac_platform_data da8xx_emac_pdata; 109extern struct emac_platform_data da8xx_emac_pdata;
111extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; 110extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
112extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; 111extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
113extern struct davinci_spi_platform_data da8xx_spi_pdata[];
114 112
115extern struct platform_device da8xx_wdt_device; 113extern struct platform_device da8xx_wdt_device;
116 114
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 40a0027838e8..0a22710493fd 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -246,6 +246,7 @@
246 246
247#define MDSTAT_STATE_MASK 0x3f 247#define MDSTAT_STATE_MASK 0x3f
248#define PDSTAT_STATE_MASK 0x1f 248#define PDSTAT_STATE_MASK 0x1f
249#define MDCTL_LRST BIT(8)
249#define MDCTL_FORCE BIT(31) 250#define MDCTL_FORCE BIT(31)
250#define PDCTL_NEXT BIT(0) 251#define PDCTL_NEXT BIT(0)
251#define PDCTL_EPCGOOD BIT(8) 252#define PDCTL_EPCGOOD BIT(8)
@@ -253,6 +254,8 @@
253#ifndef __ASSEMBLER__ 254#ifndef __ASSEMBLER__
254 255
255extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); 256extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
257extern void davinci_psc_reset(unsigned int ctlr, unsigned int id,
258 bool reset);
256extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, 259extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
257 unsigned int id, bool enable, u32 flags); 260 unsigned int id, bool enable, u32 flags);
258 261
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index d7e210f4b55c..82fdc69d5728 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -35,7 +35,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
35 struct davinci_soc_info *soc_info = &davinci_soc_info; 35 struct davinci_soc_info *soc_info = &davinci_soc_info;
36 36
37 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { 37 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
38 pr_warning("PSC: Bad psc data: 0x%x[%d]\n", 38 pr_warn("PSC: Bad psc data: 0x%x[%d]\n",
39 (int)soc_info->psc_bases, ctlr); 39 (int)soc_info->psc_bases, ctlr);
40 return 0; 40 return 0;
41 } 41 }
@@ -48,6 +48,31 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
48 return mdstat & BIT(12); 48 return mdstat & BIT(12);
49} 49}
50 50
51/* Control "reset" line associated with PSC domain */
52void davinci_psc_reset(unsigned int ctlr, unsigned int id, bool reset)
53{
54 u32 mdctl;
55 void __iomem *psc_base;
56 struct davinci_soc_info *soc_info = &davinci_soc_info;
57
58 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
59 pr_warn("PSC: Bad psc data: 0x%x[%d]\n",
60 (int)soc_info->psc_bases, ctlr);
61 return;
62 }
63
64 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
65
66 mdctl = readl(psc_base + MDCTL + 4 * id);
67 if (reset)
68 mdctl &= ~MDCTL_LRST;
69 else
70 mdctl |= MDCTL_LRST;
71 writel(mdctl, psc_base + MDCTL + 4 * id);
72
73 iounmap(psc_base);
74}
75
51/* Enable or disable a PSC domain */ 76/* Enable or disable a PSC domain */
52void davinci_psc_config(unsigned int domain, unsigned int ctlr, 77void davinci_psc_config(unsigned int domain, unsigned int ctlr,
53 unsigned int id, bool enable, u32 flags) 78 unsigned int id, bool enable, u32 flags)
@@ -58,7 +83,7 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
58 u32 next_state = PSC_STATE_ENABLE; 83 u32 next_state = PSC_STATE_ENABLE;
59 84
60 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { 85 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
61 pr_warning("PSC: Bad psc data: 0x%x[%d]\n", 86 pr_warn("PSC: Bad psc data: 0x%x[%d]\n",
62 (int)soc_info->psc_bases, ctlr); 87 (int)soc_info->psc_bases, ctlr);
63 return; 88 return;
64 } 89 }
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 9847938785ca..bad361ec1666 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -337,7 +337,7 @@ static struct clock_event_device clockevent_davinci = {
337}; 337};
338 338
339 339
340static void __init davinci_timer_init(void) 340void __init davinci_timer_init(void)
341{ 341{
342 struct clk *timer_clk; 342 struct clk *timer_clk;
343 struct davinci_soc_info *soc_info = &davinci_soc_info; 343 struct davinci_soc_info *soc_info = &davinci_soc_info;
@@ -410,11 +410,6 @@ static void __init davinci_timer_init(void)
410 timer32_config(&timers[i]); 410 timer32_config(&timers[i]);
411} 411}
412 412
413struct sys_timer davinci_timer = {
414 .init = davinci_timer_init,
415};
416
417
418/* reset board using watchdog timer */ 413/* reset board using watchdog timer */
419void davinci_watchdog_reset(struct platform_device *pdev) 414void davinci_watchdog_reset(struct platform_device *pdev)
420{ 415{
diff --git a/arch/arm/mach-dove/cm-a510.c b/arch/arm/mach-dove/cm-a510.c
index 792b4e2e24f1..0dc39cf30fdd 100644
--- a/arch/arm/mach-dove/cm-a510.c
+++ b/arch/arm/mach-dove/cm-a510.c
@@ -92,6 +92,6 @@ MACHINE_START(CM_A510, "Compulab CM-A510 Board")
92 .map_io = dove_map_io, 92 .map_io = dove_map_io,
93 .init_early = dove_init_early, 93 .init_early = dove_init_early,
94 .init_irq = dove_init_irq, 94 .init_irq = dove_init_irq,
95 .timer = &dove_timer, 95 .init_time = dove_timer_init,
96 .restart = dove_restart, 96 .restart = dove_restart,
97MACHINE_END 97MACHINE_END
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 89f4f993cd03..0c7911b3e155 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -242,17 +242,13 @@ static int __init dove_find_tclk(void)
242 return 166666667; 242 return 166666667;
243} 243}
244 244
245static void __init dove_timer_init(void) 245void __init dove_timer_init(void)
246{ 246{
247 dove_tclk = dove_find_tclk(); 247 dove_tclk = dove_find_tclk();
248 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, 248 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
249 IRQ_DOVE_BRIDGE, dove_tclk); 249 IRQ_DOVE_BRIDGE, dove_tclk);
250} 250}
251 251
252struct sys_timer dove_timer = {
253 .init = dove_timer_init,
254};
255
256/***************************************************************************** 252/*****************************************************************************
257 * Cryptographic Engines and Security Accelerator (CESA) 253 * Cryptographic Engines and Security Accelerator (CESA)
258 ****************************************************************************/ 254 ****************************************************************************/
@@ -454,7 +450,7 @@ DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
454 .map_io = dove_map_io, 450 .map_io = dove_map_io,
455 .init_early = dove_init_early, 451 .init_early = dove_init_early,
456 .init_irq = orion_dt_init_irq, 452 .init_irq = orion_dt_init_irq,
457 .timer = &dove_timer, 453 .init_time = dove_timer_init,
458 .init_machine = dove_dt_init, 454 .init_machine = dove_dt_init,
459 .restart = dove_restart, 455 .restart = dove_restart,
460 .dt_compat = dove_dt_board_compat, 456 .dt_compat = dove_dt_board_compat,
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 1a233404b735..ee59fba4c6d1 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -14,7 +14,7 @@
14struct mv643xx_eth_platform_data; 14struct mv643xx_eth_platform_data;
15struct mv_sata_platform_data; 15struct mv_sata_platform_data;
16 16
17extern struct sys_timer dove_timer; 17extern void dove_timer_init(void);
18 18
19/* 19/*
20 * Basic Dove init functions used early by machine-setup. 20 * Basic Dove init functions used early by machine-setup.
diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c
index bc2867f11346..76e26f949c27 100644
--- a/arch/arm/mach-dove/dove-db-setup.c
+++ b/arch/arm/mach-dove/dove-db-setup.c
@@ -98,6 +98,6 @@ MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board")
98 .map_io = dove_map_io, 98 .map_io = dove_map_io,
99 .init_early = dove_init_early, 99 .init_early = dove_init_early,
100 .init_irq = dove_init_irq, 100 .init_irq = dove_init_irq,
101 .timer = &dove_timer, 101 .init_time = dove_timer_init,
102 .restart = dove_restart, 102 .restart = dove_restart,
103MACHINE_END 103MACHINE_END
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index f0fe6b5350e2..b13cc74114db 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -158,7 +158,7 @@ static void __init ebsa110_init_early(void)
158 * interrupt, then the PIT counter will roll over (ie, be negative). 158 * interrupt, then the PIT counter will roll over (ie, be negative).
159 * This actually works out to be convenient. 159 * This actually works out to be convenient.
160 */ 160 */
161static unsigned long ebsa110_gettimeoffset(void) 161static u32 ebsa110_gettimeoffset(void)
162{ 162{
163 unsigned long offset, count; 163 unsigned long offset, count;
164 164
@@ -181,7 +181,7 @@ static unsigned long ebsa110_gettimeoffset(void)
181 */ 181 */
182 offset = offset * (1000000 / HZ) / COUNT; 182 offset = offset * (1000000 / HZ) / COUNT;
183 183
184 return offset; 184 return offset * 1000;
185} 185}
186 186
187static irqreturn_t 187static irqreturn_t
@@ -213,8 +213,10 @@ static struct irqaction ebsa110_timer_irq = {
213/* 213/*
214 * Set up timer interrupt. 214 * Set up timer interrupt.
215 */ 215 */
216static void __init ebsa110_timer_init(void) 216void __init ebsa110_timer_init(void)
217{ 217{
218 arch_gettimeoffset = ebsa110_gettimeoffset;
219
218 /* 220 /*
219 * Timer 1, mode 2, LSB/MSB 221 * Timer 1, mode 2, LSB/MSB
220 */ 222 */
@@ -225,11 +227,6 @@ static void __init ebsa110_timer_init(void)
225 setup_irq(IRQ_EBSA110_TIMER0, &ebsa110_timer_irq); 227 setup_irq(IRQ_EBSA110_TIMER0, &ebsa110_timer_irq);
226} 228}
227 229
228static struct sys_timer ebsa110_timer = {
229 .init = ebsa110_timer_init,
230 .offset = ebsa110_gettimeoffset,
231};
232
233static struct plat_serial8250_port serial_platform_data[] = { 230static struct plat_serial8250_port serial_platform_data[] = {
234 { 231 {
235 .iobase = 0x3f8, 232 .iobase = 0x3f8,
@@ -328,6 +325,6 @@ MACHINE_START(EBSA110, "EBSA110")
328 .map_io = ebsa110_map_io, 325 .map_io = ebsa110_map_io,
329 .init_early = ebsa110_init_early, 326 .init_early = ebsa110_init_early,
330 .init_irq = ebsa110_init_irq, 327 .init_irq = ebsa110_init_irq,
331 .timer = &ebsa110_timer, 328 .init_time = ebsa110_timer_init,
332 .restart = ebsa110_restart, 329 .restart = ebsa110_restart,
333MACHINE_END 330MACHINE_END
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 41383bf03d4b..bda6c3a5c923 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -17,7 +17,6 @@
17 17
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19 19
20#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23 22
@@ -39,8 +38,7 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
39 .atag_offset = 0x100, 38 .atag_offset = 0x100,
40 .map_io = ep93xx_map_io, 39 .map_io = ep93xx_map_io,
41 .init_irq = ep93xx_init_irq, 40 .init_irq = ep93xx_init_irq,
42 .handle_irq = vic_handle_irq, 41 .init_time = ep93xx_timer_init,
43 .timer = &ep93xx_timer,
44 .init_machine = adssphere_init_machine, 42 .init_machine = adssphere_init_machine,
45 .init_late = ep93xx_init_late, 43 .init_late = ep93xx_init_late,
46 .restart = ep93xx_restart, 44 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index e85bf17f2d2a..c49ed3dc1aea 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -34,6 +34,7 @@
34#include <linux/i2c-gpio.h> 34#include <linux/i2c-gpio.h>
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/export.h> 36#include <linux/export.h>
37#include <linux/irqchip/arm-vic.h>
37 38
38#include <mach/hardware.h> 39#include <mach/hardware.h>
39#include <linux/platform_data/video-ep93xx.h> 40#include <linux/platform_data/video-ep93xx.h>
@@ -44,8 +45,6 @@
44#include <asm/mach/map.h> 45#include <asm/mach/map.h>
45#include <asm/mach/time.h> 46#include <asm/mach/time.h>
46 47
47#include <asm/hardware/vic.h>
48
49#include "soc.h" 48#include "soc.h"
50 49
51/************************************************************************* 50/*************************************************************************
@@ -140,11 +139,29 @@ static struct irqaction ep93xx_timer_irq = {
140 .handler = ep93xx_timer_interrupt, 139 .handler = ep93xx_timer_interrupt,
141}; 140};
142 141
143static void __init ep93xx_timer_init(void) 142static u32 ep93xx_gettimeoffset(void)
143{
144 int offset;
145
146 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
147
148 /*
149 * Timer 4 is based on a 983.04 kHz reference clock,
150 * so dividing by 983040 gives the fraction of a second,
151 * so dividing by 0.983040 converts to uS.
152 * Refactor the calculation to avoid overflow.
153 * Finally, multiply by 1000 to give nS.
154 */
155 return (offset + (53 * offset / 3072)) * 1000;
156}
157
158void __init ep93xx_timer_init(void)
144{ 159{
145 u32 tmode = EP93XX_TIMER123_CONTROL_MODE | 160 u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
146 EP93XX_TIMER123_CONTROL_CLKSEL; 161 EP93XX_TIMER123_CONTROL_CLKSEL;
147 162
163 arch_gettimeoffset = ep93xx_gettimeoffset;
164
148 /* Enable periodic HZ timer. */ 165 /* Enable periodic HZ timer. */
149 __raw_writel(tmode, EP93XX_TIMER1_CONTROL); 166 __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
150 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD); 167 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
@@ -158,21 +175,6 @@ static void __init ep93xx_timer_init(void)
158 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq); 175 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
159} 176}
160 177
161static unsigned long ep93xx_gettimeoffset(void)
162{
163 int offset;
164
165 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
166
167 /* Calculate (1000000 / 983040) * offset. */
168 return offset + (53 * offset / 3072);
169}
170
171struct sys_timer ep93xx_timer = {
172 .init = ep93xx_timer_init,
173 .offset = ep93xx_gettimeoffset,
174};
175
176 178
177/************************************************************************* 179/*************************************************************************
178 * EP93xx IRQ handling 180 * EP93xx IRQ handling
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index b8f53d57a299..27b14ae92c7e 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -39,7 +39,6 @@
39#include <linux/platform_data/spi-ep93xx.h> 39#include <linux/platform_data/spi-ep93xx.h>
40#include <mach/gpio-ep93xx.h> 40#include <mach/gpio-ep93xx.h>
41 41
42#include <asm/hardware/vic.h>
43#include <asm/mach-types.h> 42#include <asm/mach-types.h>
44#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
45 44
@@ -276,8 +275,7 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
276 .atag_offset = 0x100, 275 .atag_offset = 0x100,
277 .map_io = ep93xx_map_io, 276 .map_io = ep93xx_map_io,
278 .init_irq = ep93xx_init_irq, 277 .init_irq = ep93xx_init_irq,
279 .handle_irq = vic_handle_irq, 278 .init_time = ep93xx_timer_init,
280 .timer = &ep93xx_timer,
281 .init_machine = edb93xx_init_machine, 279 .init_machine = edb93xx_init_machine,
282 .init_late = ep93xx_init_late, 280 .init_late = ep93xx_init_late,
283 .restart = ep93xx_restart, 281 .restart = ep93xx_restart,
@@ -290,8 +288,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
290 .atag_offset = 0x100, 288 .atag_offset = 0x100,
291 .map_io = ep93xx_map_io, 289 .map_io = ep93xx_map_io,
292 .init_irq = ep93xx_init_irq, 290 .init_irq = ep93xx_init_irq,
293 .handle_irq = vic_handle_irq, 291 .init_time = ep93xx_timer_init,
294 .timer = &ep93xx_timer,
295 .init_machine = edb93xx_init_machine, 292 .init_machine = edb93xx_init_machine,
296 .init_late = ep93xx_init_late, 293 .init_late = ep93xx_init_late,
297 .restart = ep93xx_restart, 294 .restart = ep93xx_restart,
@@ -304,8 +301,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
304 .atag_offset = 0x100, 301 .atag_offset = 0x100,
305 .map_io = ep93xx_map_io, 302 .map_io = ep93xx_map_io,
306 .init_irq = ep93xx_init_irq, 303 .init_irq = ep93xx_init_irq,
307 .handle_irq = vic_handle_irq, 304 .init_time = ep93xx_timer_init,
308 .timer = &ep93xx_timer,
309 .init_machine = edb93xx_init_machine, 305 .init_machine = edb93xx_init_machine,
310 .init_late = ep93xx_init_late, 306 .init_late = ep93xx_init_late,
311 .restart = ep93xx_restart, 307 .restart = ep93xx_restart,
@@ -318,8 +314,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
318 .atag_offset = 0x100, 314 .atag_offset = 0x100,
319 .map_io = ep93xx_map_io, 315 .map_io = ep93xx_map_io,
320 .init_irq = ep93xx_init_irq, 316 .init_irq = ep93xx_init_irq,
321 .handle_irq = vic_handle_irq, 317 .init_time = ep93xx_timer_init,
322 .timer = &ep93xx_timer,
323 .init_machine = edb93xx_init_machine, 318 .init_machine = edb93xx_init_machine,
324 .init_late = ep93xx_init_late, 319 .init_late = ep93xx_init_late,
325 .restart = ep93xx_restart, 320 .restart = ep93xx_restart,
@@ -332,8 +327,7 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
332 .atag_offset = 0x100, 327 .atag_offset = 0x100,
333 .map_io = ep93xx_map_io, 328 .map_io = ep93xx_map_io,
334 .init_irq = ep93xx_init_irq, 329 .init_irq = ep93xx_init_irq,
335 .handle_irq = vic_handle_irq, 330 .init_time = ep93xx_timer_init,
336 .timer = &ep93xx_timer,
337 .init_machine = edb93xx_init_machine, 331 .init_machine = edb93xx_init_machine,
338 .init_late = ep93xx_init_late, 332 .init_late = ep93xx_init_late,
339 .restart = ep93xx_restart, 333 .restart = ep93xx_restart,
@@ -346,8 +340,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
346 .atag_offset = 0x100, 340 .atag_offset = 0x100,
347 .map_io = ep93xx_map_io, 341 .map_io = ep93xx_map_io,
348 .init_irq = ep93xx_init_irq, 342 .init_irq = ep93xx_init_irq,
349 .handle_irq = vic_handle_irq, 343 .init_time = ep93xx_timer_init,
350 .timer = &ep93xx_timer,
351 .init_machine = edb93xx_init_machine, 344 .init_machine = edb93xx_init_machine,
352 .init_late = ep93xx_init_late, 345 .init_late = ep93xx_init_late,
353 .restart = ep93xx_restart, 346 .restart = ep93xx_restart,
@@ -360,8 +353,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
360 .atag_offset = 0x100, 353 .atag_offset = 0x100,
361 .map_io = ep93xx_map_io, 354 .map_io = ep93xx_map_io,
362 .init_irq = ep93xx_init_irq, 355 .init_irq = ep93xx_init_irq,
363 .handle_irq = vic_handle_irq, 356 .init_time = ep93xx_timer_init,
364 .timer = &ep93xx_timer,
365 .init_machine = edb93xx_init_machine, 357 .init_machine = edb93xx_init_machine,
366 .init_late = ep93xx_init_late, 358 .init_late = ep93xx_init_late,
367 .restart = ep93xx_restart, 359 .restart = ep93xx_restart,
@@ -374,8 +366,7 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
374 .atag_offset = 0x100, 366 .atag_offset = 0x100,
375 .map_io = ep93xx_map_io, 367 .map_io = ep93xx_map_io,
376 .init_irq = ep93xx_init_irq, 368 .init_irq = ep93xx_init_irq,
377 .handle_irq = vic_handle_irq, 369 .init_time = ep93xx_timer_init,
378 .timer = &ep93xx_timer,
379 .init_machine = edb93xx_init_machine, 370 .init_machine = edb93xx_init_machine,
380 .init_late = ep93xx_init_late, 371 .init_late = ep93xx_init_late,
381 .restart = ep93xx_restart, 372 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 7fd705b5efe4..0cca5b183309 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -17,7 +17,6 @@
17 17
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19 19
20#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23 22
@@ -39,8 +38,7 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
39 .atag_offset = 0x100, 38 .atag_offset = 0x100,
40 .map_io = ep93xx_map_io, 39 .map_io = ep93xx_map_io,
41 .init_irq = ep93xx_init_irq, 40 .init_irq = ep93xx_init_irq,
42 .handle_irq = vic_handle_irq, 41 .init_time = ep93xx_timer_init,
43 .timer = &ep93xx_timer,
44 .init_machine = gesbc9312_init_machine, 42 .init_machine = gesbc9312_init_machine,
45 .init_late = ep93xx_init_late, 43 .init_late = ep93xx_init_late,
46 .restart = ep93xx_restart, 44 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 33a5122c6dc8..a14e1b37beff 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -53,7 +53,7 @@ int ep93xx_ide_acquire_gpio(struct platform_device *pdev);
53void ep93xx_ide_release_gpio(struct platform_device *pdev); 53void ep93xx_ide_release_gpio(struct platform_device *pdev);
54 54
55void ep93xx_init_devices(void); 55void ep93xx_init_devices(void);
56extern struct sys_timer ep93xx_timer; 56extern void ep93xx_timer_init(void);
57 57
58void ep93xx_restart(char, const char *); 58void ep93xx_restart(char, const char *);
59void ep93xx_init_late(void); 59void ep93xx_init_late(void);
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index 3d7cdab725b2..373583c29825 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -18,7 +18,6 @@
18 18
19#include <mach/hardware.h> 19#include <mach/hardware.h>
20 20
21#include <asm/hardware/vic.h>
22#include <asm/mach-types.h> 21#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
24 23
@@ -82,8 +81,7 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
82 .atag_offset = 0x100, 81 .atag_offset = 0x100,
83 .map_io = ep93xx_map_io, 82 .map_io = ep93xx_map_io,
84 .init_irq = ep93xx_init_irq, 83 .init_irq = ep93xx_init_irq,
85 .handle_irq = vic_handle_irq, 84 .init_time = ep93xx_timer_init,
86 .timer = &ep93xx_timer,
87 .init_machine = micro9_init_machine, 85 .init_machine = micro9_init_machine,
88 .init_late = ep93xx_init_late, 86 .init_late = ep93xx_init_late,
89 .restart = ep93xx_restart, 87 .restart = ep93xx_restart,
@@ -96,8 +94,7 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
96 .atag_offset = 0x100, 94 .atag_offset = 0x100,
97 .map_io = ep93xx_map_io, 95 .map_io = ep93xx_map_io,
98 .init_irq = ep93xx_init_irq, 96 .init_irq = ep93xx_init_irq,
99 .handle_irq = vic_handle_irq, 97 .init_time = ep93xx_timer_init,
100 .timer = &ep93xx_timer,
101 .init_machine = micro9_init_machine, 98 .init_machine = micro9_init_machine,
102 .init_late = ep93xx_init_late, 99 .init_late = ep93xx_init_late,
103 .restart = ep93xx_restart, 100 .restart = ep93xx_restart,
@@ -110,8 +107,7 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
110 .atag_offset = 0x100, 107 .atag_offset = 0x100,
111 .map_io = ep93xx_map_io, 108 .map_io = ep93xx_map_io,
112 .init_irq = ep93xx_init_irq, 109 .init_irq = ep93xx_init_irq,
113 .handle_irq = vic_handle_irq, 110 .init_time = ep93xx_timer_init,
114 .timer = &ep93xx_timer,
115 .init_machine = micro9_init_machine, 111 .init_machine = micro9_init_machine,
116 .init_late = ep93xx_init_late, 112 .init_late = ep93xx_init_late,
117 .restart = ep93xx_restart, 113 .restart = ep93xx_restart,
@@ -124,8 +120,7 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
124 .atag_offset = 0x100, 120 .atag_offset = 0x100,
125 .map_io = ep93xx_map_io, 121 .map_io = ep93xx_map_io,
126 .init_irq = ep93xx_init_irq, 122 .init_irq = ep93xx_init_irq,
127 .handle_irq = vic_handle_irq, 123 .init_time = ep93xx_timer_init,
128 .timer = &ep93xx_timer,
129 .init_machine = micro9_init_machine, 124 .init_machine = micro9_init_machine,
130 .init_late = ep93xx_init_late, 125 .init_late = ep93xx_init_late,
131 .restart = ep93xx_restart, 126 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 0eb3f17a6fa2..36f22c1a31fe 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -25,7 +25,6 @@
25#include <linux/platform_data/video-ep93xx.h> 25#include <linux/platform_data/video-ep93xx.h>
26#include <mach/gpio-ep93xx.h> 26#include <mach/gpio-ep93xx.h>
27 27
28#include <asm/hardware/vic.h>
29#include <asm/mach-types.h> 28#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
31 30
@@ -83,8 +82,7 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
83 .atag_offset = 0x100, 82 .atag_offset = 0x100,
84 .map_io = ep93xx_map_io, 83 .map_io = ep93xx_map_io,
85 .init_irq = ep93xx_init_irq, 84 .init_irq = ep93xx_init_irq,
86 .handle_irq = vic_handle_irq, 85 .init_time = ep93xx_timer_init,
87 .timer = &ep93xx_timer,
88 .init_machine = simone_init_machine, 86 .init_machine = simone_init_machine,
89 .init_late = ep93xx_init_late, 87 .init_late = ep93xx_init_late,
90 .restart = ep93xx_restart, 88 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 50043eef1cf2..aa86f86638dd 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -31,7 +31,6 @@
31#include <linux/platform_data/video-ep93xx.h> 31#include <linux/platform_data/video-ep93xx.h>
32#include <mach/gpio-ep93xx.h> 32#include <mach/gpio-ep93xx.h>
33 33
34#include <asm/hardware/vic.h>
35#include <asm/mach-types.h> 34#include <asm/mach-types.h>
36#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
37 36
@@ -176,8 +175,7 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
176 .atag_offset = 0x100, 175 .atag_offset = 0x100,
177 .map_io = ep93xx_map_io, 176 .map_io = ep93xx_map_io,
178 .init_irq = ep93xx_init_irq, 177 .init_irq = ep93xx_init_irq,
179 .handle_irq = vic_handle_irq, 178 .init_time = ep93xx_timer_init,
180 .timer = &ep93xx_timer,
181 .init_machine = snappercl15_init_machine, 179 .init_machine = snappercl15_init_machine,
182 .init_late = ep93xx_init_late, 180 .init_late = ep93xx_init_late,
183 .restart = ep93xx_restart, 181 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 3c4c233391dc..61f4b5dc4d7d 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -22,7 +22,6 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24 24
25#include <asm/hardware/vic.h>
26#include <asm/mach-types.h> 25#include <asm/mach-types.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
28#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
@@ -246,8 +245,7 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
246 .atag_offset = 0x100, 245 .atag_offset = 0x100,
247 .map_io = ts72xx_map_io, 246 .map_io = ts72xx_map_io,
248 .init_irq = ep93xx_init_irq, 247 .init_irq = ep93xx_init_irq,
249 .handle_irq = vic_handle_irq, 248 .init_time = ep93xx_timer_init,
250 .timer = &ep93xx_timer,
251 .init_machine = ts72xx_init_machine, 249 .init_machine = ts72xx_init_machine,
252 .init_late = ep93xx_init_late, 250 .init_late = ep93xx_init_late,
253 .restart = ep93xx_restart, 251 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index ba92e25e3016..605956fd07a2 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -34,7 +34,6 @@
34#include <linux/platform_data/spi-ep93xx.h> 34#include <linux/platform_data/spi-ep93xx.h>
35#include <mach/gpio-ep93xx.h> 35#include <mach/gpio-ep93xx.h>
36 36
37#include <asm/hardware/vic.h>
38#include <asm/mach-types.h> 37#include <asm/mach-types.h>
39#include <asm/mach/map.h> 38#include <asm/mach/map.h>
40#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
@@ -364,8 +363,7 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
364 .atag_offset = 0x100, 363 .atag_offset = 0x100,
365 .map_io = vision_map_io, 364 .map_io = vision_map_io,
366 .init_irq = ep93xx_init_irq, 365 .init_irq = ep93xx_init_irq,
367 .handle_irq = vic_handle_irq, 366 .init_time = ep93xx_timer_init,
368 .timer = &ep93xx_timer,
369 .init_machine = vision_init_machine, 367 .init_machine = vision_init_machine,
370 .init_late = ep93xx_init_late, 368 .init_late = ep93xx_init_late,
371 .restart = ep93xx_restart, 369 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 1a89824a5f78..4ea80bc4ef9b 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -22,12 +22,13 @@
22#include <linux/of_irq.h> 22#include <linux/of_irq.h>
23#include <linux/export.h> 23#include <linux/export.h>
24#include <linux/irqdomain.h> 24#include <linux/irqdomain.h>
25#include <linux/irqchip.h>
25#include <linux/of_address.h> 26#include <linux/of_address.h>
27#include <linux/irqchip/arm-gic.h>
26 28
27#include <asm/proc-fns.h> 29#include <asm/proc-fns.h>
28#include <asm/exception.h> 30#include <asm/exception.h>
29#include <asm/hardware/cache-l2x0.h> 31#include <asm/hardware/cache-l2x0.h>
30#include <asm/hardware/gic.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/mach/irq.h> 33#include <asm/mach/irq.h>
33#include <asm/cacheflush.h> 34#include <asm/cacheflush.h>
@@ -644,8 +645,6 @@ static int __init combiner_of_init(struct device_node *np,
644} 645}
645 646
646static const struct of_device_id exynos_dt_irq_match[] = { 647static const struct of_device_id exynos_dt_irq_match[] = {
647 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
648 { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
649 { .compatible = "samsung,exynos4210-combiner", 648 { .compatible = "samsung,exynos4210-combiner",
650 .data = combiner_of_init, }, 649 .data = combiner_of_init, },
651 {}, 650 {},
@@ -661,8 +660,10 @@ void __init exynos4_init_irq(void)
661 if (!of_have_populated_dt()) 660 if (!of_have_populated_dt())
662 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL); 661 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
663#ifdef CONFIG_OF 662#ifdef CONFIG_OF
664 else 663 else {
664 irqchip_init();
665 of_irq_init(exynos_dt_irq_match); 665 of_irq_init(exynos_dt_irq_match);
666 }
666#endif 667#endif
667 668
668 if (!of_have_populated_dt()) 669 if (!of_have_populated_dt())
@@ -679,6 +680,7 @@ void __init exynos4_init_irq(void)
679void __init exynos5_init_irq(void) 680void __init exynos5_init_irq(void)
680{ 681{
681#ifdef CONFIG_OF 682#ifdef CONFIG_OF
683 irqchip_init();
682 of_irq_init(exynos_dt_irq_match); 684 of_irq_init(exynos_dt_irq_match);
683#endif 685#endif
684 /* 686 /*
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 04744f9c120f..12f2f1117e99 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -12,7 +12,7 @@
12#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H 12#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
13#define __ARCH_ARM_MACH_EXYNOS_COMMON_H 13#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
14 14
15extern struct sys_timer exynos4_timer; 15extern void exynos4_timer_init(void);
16 16
17struct map_desc; 17struct map_desc;
18void exynos_init_io(struct map_desc *mach_desc, int size); 18void exynos_init_io(struct map_desc *mach_desc, int size);
diff --git a/arch/arm/mach-exynos/include/mach/regs-irq.h b/arch/arm/mach-exynos/include/mach/regs-irq.h
index 9c7b4bfd546f..f2b50506b9f6 100644
--- a/arch/arm/mach-exynos/include/mach/regs-irq.h
+++ b/arch/arm/mach-exynos/include/mach/regs-irq.h
@@ -13,7 +13,7 @@
13#ifndef __ASM_ARCH_REGS_IRQ_H 13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__ 14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15 15
16#include <asm/hardware/gic.h> 16#include <linux/irqchip/arm-gic.h>
17#include <mach/map.h> 17#include <mach/map.h>
18 18
19#endif /* __ASM_ARCH_REGS_IRQ_H */ 19#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c
index b938f9fc1dd1..685f29173afa 100644
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ b/arch/arm/mach-exynos/mach-armlex4210.c
@@ -16,7 +16,6 @@
16#include <linux/smsc911x.h> 16#include <linux/smsc911x.h>
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
20#include <asm/mach-types.h> 19#include <asm/mach-types.h>
21 20
22#include <plat/cpu.h> 21#include <plat/cpu.h>
@@ -201,9 +200,8 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
201 .smp = smp_ops(exynos_smp_ops), 200 .smp = smp_ops(exynos_smp_ops),
202 .init_irq = exynos4_init_irq, 201 .init_irq = exynos4_init_irq,
203 .map_io = armlex4210_map_io, 202 .map_io = armlex4210_map_io,
204 .handle_irq = gic_handle_irq,
205 .init_machine = armlex4210_machine_init, 203 .init_machine = armlex4210_machine_init,
206 .init_late = exynos_init_late, 204 .init_late = exynos_init_late,
207 .timer = &exynos4_timer, 205 .init_time = exynos4_timer_init,
208 .restart = exynos4_restart, 206 .restart = exynos4_restart,
209MACHINE_END 207MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index 92757ff817ae..112d10e53d20 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -15,7 +15,6 @@
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16 16
17#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
18#include <asm/hardware/gic.h>
19#include <mach/map.h> 18#include <mach/map.h>
20 19
21#include <plat/cpu.h> 20#include <plat/cpu.h>
@@ -107,10 +106,9 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
107 .smp = smp_ops(exynos_smp_ops), 106 .smp = smp_ops(exynos_smp_ops),
108 .init_irq = exynos4_init_irq, 107 .init_irq = exynos4_init_irq,
109 .map_io = exynos4_dt_map_io, 108 .map_io = exynos4_dt_map_io,
110 .handle_irq = gic_handle_irq,
111 .init_machine = exynos4_dt_machine_init, 109 .init_machine = exynos4_dt_machine_init,
112 .init_late = exynos_init_late, 110 .init_late = exynos_init_late,
113 .timer = &exynos4_timer, 111 .init_time = exynos4_timer_init,
114 .dt_compat = exynos4_dt_compat, 112 .dt_compat = exynos4_dt_compat,
115 .restart = exynos4_restart, 113 .restart = exynos4_restart,
116MACHINE_END 114MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index e99d3d8f2bcf..0deeecffa3ae 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -16,7 +16,6 @@
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
20#include <mach/map.h> 19#include <mach/map.h>
21#include <mach/regs-pmu.h> 20#include <mach/regs-pmu.h>
22 21
@@ -179,10 +178,9 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
179 .init_irq = exynos5_init_irq, 178 .init_irq = exynos5_init_irq,
180 .smp = smp_ops(exynos_smp_ops), 179 .smp = smp_ops(exynos_smp_ops),
181 .map_io = exynos5_dt_map_io, 180 .map_io = exynos5_dt_map_io,
182 .handle_irq = gic_handle_irq,
183 .init_machine = exynos5_dt_machine_init, 181 .init_machine = exynos5_dt_machine_init,
184 .init_late = exynos_init_late, 182 .init_late = exynos_init_late,
185 .timer = &exynos4_timer, 183 .init_time = exynos4_timer_init,
186 .dt_compat = exynos5_dt_compat, 184 .dt_compat = exynos5_dt_compat,
187 .restart = exynos5_restart, 185 .restart = exynos5_restart,
188 .reserve = exynos5_reserve, 186 .reserve = exynos5_reserve,
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 27d4ed8b116e..b8b3fbf0bae7 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -39,7 +39,6 @@
39#include <media/v4l2-mediabus.h> 39#include <media/v4l2-mediabus.h>
40 40
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
42#include <asm/hardware/gic.h>
43#include <asm/mach-types.h> 42#include <asm/mach-types.h>
44 43
45#include <plat/adc.h> 44#include <plat/adc.h>
@@ -1379,10 +1378,9 @@ MACHINE_START(NURI, "NURI")
1379 .smp = smp_ops(exynos_smp_ops), 1378 .smp = smp_ops(exynos_smp_ops),
1380 .init_irq = exynos4_init_irq, 1379 .init_irq = exynos4_init_irq,
1381 .map_io = nuri_map_io, 1380 .map_io = nuri_map_io,
1382 .handle_irq = gic_handle_irq,
1383 .init_machine = nuri_machine_init, 1381 .init_machine = nuri_machine_init,
1384 .init_late = exynos_init_late, 1382 .init_late = exynos_init_late,
1385 .timer = &exynos4_timer, 1383 .init_time = exynos4_timer_init,
1386 .reserve = &nuri_reserve, 1384 .reserve = &nuri_reserve,
1387 .restart = exynos4_restart, 1385 .restart = exynos4_restart,
1388MACHINE_END 1386MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 5e34b9c16196..579d2d171daa 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -29,7 +29,6 @@
29#include <linux/platform_data/usb-exynos.h> 29#include <linux/platform_data/usb-exynos.h>
30 30
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/hardware/gic.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
34 33
35#include <video/platform_lcd.h> 34#include <video/platform_lcd.h>
@@ -814,10 +813,9 @@ MACHINE_START(ORIGEN, "ORIGEN")
814 .smp = smp_ops(exynos_smp_ops), 813 .smp = smp_ops(exynos_smp_ops),
815 .init_irq = exynos4_init_irq, 814 .init_irq = exynos4_init_irq,
816 .map_io = origen_map_io, 815 .map_io = origen_map_io,
817 .handle_irq = gic_handle_irq,
818 .init_machine = origen_machine_init, 816 .init_machine = origen_machine_init,
819 .init_late = exynos_init_late, 817 .init_late = exynos_init_late,
820 .timer = &exynos4_timer, 818 .init_time = exynos4_timer_init,
821 .reserve = &origen_reserve, 819 .reserve = &origen_reserve,
822 .restart = exynos4_restart, 820 .restart = exynos4_restart,
823MACHINE_END 821MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index ae6da40c2aa9..fe6149624b84 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -25,7 +25,6 @@
25#include <linux/platform_data/s3c-hsotg.h> 25#include <linux/platform_data/s3c-hsotg.h>
26 26
27#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
28#include <asm/hardware/gic.h>
29#include <asm/mach-types.h> 28#include <asm/mach-types.h>
30 29
31#include <video/samsung_fimd.h> 30#include <video/samsung_fimd.h>
@@ -376,9 +375,8 @@ MACHINE_START(SMDK4212, "SMDK4212")
376 .smp = smp_ops(exynos_smp_ops), 375 .smp = smp_ops(exynos_smp_ops),
377 .init_irq = exynos4_init_irq, 376 .init_irq = exynos4_init_irq,
378 .map_io = smdk4x12_map_io, 377 .map_io = smdk4x12_map_io,
379 .handle_irq = gic_handle_irq,
380 .init_machine = smdk4x12_machine_init, 378 .init_machine = smdk4x12_machine_init,
381 .timer = &exynos4_timer, 379 .init_time = exynos4_timer_init,
382 .restart = exynos4_restart, 380 .restart = exynos4_restart,
383 .reserve = &smdk4x12_reserve, 381 .reserve = &smdk4x12_reserve,
384MACHINE_END 382MACHINE_END
@@ -390,10 +388,9 @@ MACHINE_START(SMDK4412, "SMDK4412")
390 .smp = smp_ops(exynos_smp_ops), 388 .smp = smp_ops(exynos_smp_ops),
391 .init_irq = exynos4_init_irq, 389 .init_irq = exynos4_init_irq,
392 .map_io = smdk4x12_map_io, 390 .map_io = smdk4x12_map_io,
393 .handle_irq = gic_handle_irq,
394 .init_machine = smdk4x12_machine_init, 391 .init_machine = smdk4x12_machine_init,
395 .init_late = exynos_init_late, 392 .init_late = exynos_init_late,
396 .timer = &exynos4_timer, 393 .init_time = exynos4_timer_init,
397 .restart = exynos4_restart, 394 .restart = exynos4_restart,
398 .reserve = &smdk4x12_reserve, 395 .reserve = &smdk4x12_reserve,
399MACHINE_END 396MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index 35548e3c097d..d71672922b19 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -26,7 +26,6 @@
26#include <linux/platform_data/usb-exynos.h> 26#include <linux/platform_data/usb-exynos.h>
27 27
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29#include <asm/hardware/gic.h>
30#include <asm/mach-types.h> 29#include <asm/mach-types.h>
31 30
32#include <video/platform_lcd.h> 31#include <video/platform_lcd.h>
@@ -423,9 +422,8 @@ MACHINE_START(SMDKV310, "SMDKV310")
423 .smp = smp_ops(exynos_smp_ops), 422 .smp = smp_ops(exynos_smp_ops),
424 .init_irq = exynos4_init_irq, 423 .init_irq = exynos4_init_irq,
425 .map_io = smdkv310_map_io, 424 .map_io = smdkv310_map_io,
426 .handle_irq = gic_handle_irq,
427 .init_machine = smdkv310_machine_init, 425 .init_machine = smdkv310_machine_init,
428 .timer = &exynos4_timer, 426 .init_time = exynos4_timer_init,
429 .reserve = &smdkv310_reserve, 427 .reserve = &smdkv310_reserve,
430 .restart = exynos4_restart, 428 .restart = exynos4_restart,
431MACHINE_END 429MACHINE_END
@@ -436,10 +434,9 @@ MACHINE_START(SMDKC210, "SMDKC210")
436 .smp = smp_ops(exynos_smp_ops), 434 .smp = smp_ops(exynos_smp_ops),
437 .init_irq = exynos4_init_irq, 435 .init_irq = exynos4_init_irq,
438 .map_io = smdkv310_map_io, 436 .map_io = smdkv310_map_io,
439 .handle_irq = gic_handle_irq,
440 .init_machine = smdkv310_machine_init, 437 .init_machine = smdkv310_machine_init,
441 .init_late = exynos_init_late, 438 .init_late = exynos_init_late,
442 .timer = &exynos4_timer, 439 .init_time = exynos4_timer_init,
443 .reserve = &smdkv310_reserve, 440 .reserve = &smdkv310_reserve,
444 .restart = exynos4_restart, 441 .restart = exynos4_restart,
445MACHINE_END 442MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 9e3340f18950..c9d33a43103e 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -29,7 +29,6 @@
29#include <drm/exynos_drm.h> 29#include <drm/exynos_drm.h>
30 30
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/hardware/gic.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
34 33
35#include <video/samsung_fimd.h> 34#include <video/samsung_fimd.h>
@@ -1151,10 +1150,9 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1151 .smp = smp_ops(exynos_smp_ops), 1150 .smp = smp_ops(exynos_smp_ops),
1152 .init_irq = exynos4_init_irq, 1151 .init_irq = exynos4_init_irq,
1153 .map_io = universal_map_io, 1152 .map_io = universal_map_io,
1154 .handle_irq = gic_handle_irq,
1155 .init_machine = universal_machine_init, 1153 .init_machine = universal_machine_init,
1156 .init_late = exynos_init_late, 1154 .init_late = exynos_init_late,
1157 .timer = &s5p_timer, 1155 .init_time = s5p_timer_init,
1158 .reserve = &universal_reserve, 1156 .reserve = &universal_reserve,
1159 .restart = exynos4_restart, 1157 .restart = exynos4_restart,
1160MACHINE_END 1158MACHINE_END
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 57668eb68e75..c9d6650f9b5d 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -22,7 +22,6 @@
22#include <linux/of.h> 22#include <linux/of.h>
23 23
24#include <asm/arch_timer.h> 24#include <asm/arch_timer.h>
25#include <asm/hardware/gic.h>
26#include <asm/localtimer.h> 25#include <asm/localtimer.h>
27 26
28#include <plat/cpu.h> 27#include <plat/cpu.h>
@@ -255,13 +254,9 @@ static struct irqaction mct_comp_event_irq = {
255 254
256static void exynos4_clockevent_init(void) 255static void exynos4_clockevent_init(void)
257{ 256{
258 clockevents_calc_mult_shift(&mct_comp_device, clk_rate, 5);
259 mct_comp_device.max_delta_ns =
260 clockevent_delta2ns(0xffffffff, &mct_comp_device);
261 mct_comp_device.min_delta_ns =
262 clockevent_delta2ns(0xf, &mct_comp_device);
263 mct_comp_device.cpumask = cpumask_of(0); 257 mct_comp_device.cpumask = cpumask_of(0);
264 clockevents_register_device(&mct_comp_device); 258 clockevents_config_and_register(&mct_comp_device, clk_rate,
259 0xf, 0xffffffff);
265 260
266 if (soc_is_exynos5250()) 261 if (soc_is_exynos5250())
267 setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq); 262 setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq);
@@ -404,14 +399,8 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
404 evt->set_mode = exynos4_tick_set_mode; 399 evt->set_mode = exynos4_tick_set_mode;
405 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 400 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
406 evt->rating = 450; 401 evt->rating = 450;
407 402 clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
408 clockevents_calc_mult_shift(evt, clk_rate / (TICK_BASE_CNT + 1), 5); 403 0xf, 0x7fffffff);
409 evt->max_delta_ns =
410 clockevent_delta2ns(0x7fffffff, evt);
411 evt->min_delta_ns =
412 clockevent_delta2ns(0xf, evt);
413
414 clockevents_register_device(evt);
415 404
416 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); 405 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
417 406
@@ -478,7 +467,7 @@ static void __init exynos4_timer_resources(void)
478#endif /* CONFIG_LOCAL_TIMERS */ 467#endif /* CONFIG_LOCAL_TIMERS */
479} 468}
480 469
481static void __init exynos_timer_init(void) 470void __init exynos4_timer_init(void)
482{ 471{
483 if (soc_is_exynos5440()) { 472 if (soc_is_exynos5440()) {
484 arch_timer_of_register(); 473 arch_timer_of_register();
@@ -494,7 +483,3 @@ static void __init exynos_timer_init(void)
494 exynos4_clocksource_init(); 483 exynos4_clocksource_init();
495 exynos4_clockevent_init(); 484 exynos4_clockevent_init();
496} 485}
497
498struct sys_timer exynos4_timer = {
499 .init = exynos_timer_init,
500};
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index c5c840e947b8..60f7c5be057d 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -20,9 +20,9 @@
20#include <linux/jiffies.h> 20#include <linux/jiffies.h>
21#include <linux/smp.h> 21#include <linux/smp.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/irqchip/arm-gic.h>
23 24
24#include <asm/cacheflush.h> 25#include <asm/cacheflush.h>
25#include <asm/hardware/gic.h>
26#include <asm/smp_plat.h> 26#include <asm/smp_plat.h>
27#include <asm/smp_scu.h> 27#include <asm/smp_scu.h>
28 28
@@ -149,7 +149,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
149 149
150 __raw_writel(virt_to_phys(exynos4_secondary_startup), 150 __raw_writel(virt_to_phys(exynos4_secondary_startup),
151 cpu_boot_reg(phys_cpu)); 151 cpu_boot_reg(phys_cpu));
152 gic_raise_softirq(cpumask_of(cpu), 0); 152 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
153 153
154 if (pen_release == -1) 154 if (pen_release == -1)
155 break; 155 break;
@@ -190,8 +190,6 @@ static void __init exynos_smp_init_cpus(void)
190 190
191 for (i = 0; i < ncores; i++) 191 for (i = 0; i < ncores; i++)
192 set_cpu_possible(i, true); 192 set_cpu_possible(i, true);
193
194 set_smp_cross_call(gic_raise_softirq);
195} 193}
196 194
197static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) 195static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 25b453601acc..6987a09ec219 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -90,6 +90,6 @@ MACHINE_START(CATS, "Chalice-CATS")
90 .fixup = fixup_cats, 90 .fixup = fixup_cats,
91 .map_io = footbridge_map_io, 91 .map_io = footbridge_map_io,
92 .init_irq = footbridge_init_irq, 92 .init_irq = footbridge_init_irq,
93 .timer = &isa_timer, 93 .init_time = isa_timer_init,
94 .restart = footbridge_restart, 94 .restart = footbridge_restart,
95MACHINE_END 95MACHINE_END
diff --git a/arch/arm/mach-footbridge/common.h b/arch/arm/mach-footbridge/common.h
index c9767b892cb2..a846e50a07b8 100644
--- a/arch/arm/mach-footbridge/common.h
+++ b/arch/arm/mach-footbridge/common.h
@@ -1,6 +1,6 @@
1 1
2extern struct sys_timer footbridge_timer; 2extern void footbridge_timer_init(void);
3extern struct sys_timer isa_timer; 3extern void isa_timer_init(void);
4 4
5extern void isa_rtc_init(void); 5extern void isa_rtc_init(void);
6 6
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index 3b54196447c7..9ee78f7b4990 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -93,7 +93,7 @@ static struct irqaction footbridge_timer_irq = {
93/* 93/*
94 * Set up timer interrupt. 94 * Set up timer interrupt.
95 */ 95 */
96static void __init footbridge_timer_init(void) 96void __init footbridge_timer_init(void)
97{ 97{
98 struct clock_event_device *ce = &ckevt_dc21285; 98 struct clock_event_device *ce = &ckevt_dc21285;
99 99
@@ -101,14 +101,6 @@ static void __init footbridge_timer_init(void)
101 101
102 setup_irq(ce->irq, &footbridge_timer_irq); 102 setup_irq(ce->irq, &footbridge_timer_irq);
103 103
104 clockevents_calc_mult_shift(ce, mem_fclk_21285, 5);
105 ce->max_delta_ns = clockevent_delta2ns(0xffffff, ce);
106 ce->min_delta_ns = clockevent_delta2ns(0x000004, ce);
107 ce->cpumask = cpumask_of(smp_processor_id()); 104 ce->cpumask = cpumask_of(smp_processor_id());
108 105 clockevents_config_and_register(ce, mem_fclk_21285, 0x4, 0xffffff);
109 clockevents_register_device(ce);
110} 106}
111
112struct sys_timer footbridge_timer = {
113 .init = footbridge_timer_init,
114};
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index b09551ef89ca..b08243500e2e 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -101,7 +101,7 @@ MACHINE_START(EBSA285, "EBSA285")
101 .video_end = 0x000bffff, 101 .video_end = 0x000bffff,
102 .map_io = footbridge_map_io, 102 .map_io = footbridge_map_io,
103 .init_irq = footbridge_init_irq, 103 .init_irq = footbridge_init_irq,
104 .timer = &footbridge_timer, 104 .init_time = footbridge_timer_init,
105 .restart = footbridge_restart, 105 .restart = footbridge_restart,
106MACHINE_END 106MACHINE_END
107 107
diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c
index c40bb415f4b5..d9301dd56354 100644
--- a/arch/arm/mach-footbridge/isa-timer.c
+++ b/arch/arm/mach-footbridge/isa-timer.c
@@ -31,14 +31,10 @@ static struct irqaction pit_timer_irq = {
31 .dev_id = &i8253_clockevent, 31 .dev_id = &i8253_clockevent,
32}; 32};
33 33
34static void __init isa_timer_init(void) 34void __init isa_timer_init(void)
35{ 35{
36 clocksource_i8253_init(); 36 clocksource_i8253_init();
37 37
38 setup_irq(i8253_clockevent.irq, &pit_timer_irq); 38 setup_irq(i8253_clockevent.irq, &pit_timer_irq);
39 clockevent_i8253_init(false); 39 clockevent_i8253_init(false);
40} 40}
41
42struct sys_timer isa_timer = {
43 .init = isa_timer_init,
44};
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index d2d14339c6c4..90ea23fdce4c 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -766,6 +766,6 @@ MACHINE_START(NETWINDER, "Rebel-NetWinder")
766 .fixup = fixup_netwinder, 766 .fixup = fixup_netwinder,
767 .map_io = footbridge_map_io, 767 .map_io = footbridge_map_io,
768 .init_irq = footbridge_init_irq, 768 .init_irq = footbridge_init_irq,
769 .timer = &isa_timer, 769 .init_time = isa_timer_init,
770 .restart = netwinder_restart, 770 .restart = netwinder_restart,
771MACHINE_END 771MACHINE_END
diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c
index e1e9990fa957..7bdeabdcd4d8 100644
--- a/arch/arm/mach-footbridge/personal.c
+++ b/arch/arm/mach-footbridge/personal.c
@@ -18,7 +18,7 @@ MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer")
18 .atag_offset = 0x100, 18 .atag_offset = 0x100,
19 .map_io = footbridge_map_io, 19 .map_io = footbridge_map_io,
20 .init_irq = footbridge_init_irq, 20 .init_irq = footbridge_init_irq,
21 .timer = &footbridge_timer, 21 .init_time = footbridge_timer_init,
22 .restart = footbridge_restart, 22 .restart = footbridge_restart,
23MACHINE_END 23MACHINE_END
24 24
diff --git a/arch/arm/mach-gemini/board-nas4220b.c b/arch/arm/mach-gemini/board-nas4220b.c
index 5927d3c253aa..08bd650c42f3 100644
--- a/arch/arm/mach-gemini/board-nas4220b.c
+++ b/arch/arm/mach-gemini/board-nas4220b.c
@@ -31,10 +31,6 @@
31 31
32#include "common.h" 32#include "common.h"
33 33
34static struct sys_timer ib4220b_timer = {
35 .init = gemini_timer_init,
36};
37
38static struct gpio_led ib4220b_leds[] = { 34static struct gpio_led ib4220b_leds[] = {
39 { 35 {
40 .name = "nas4220b:orange:hdd", 36 .name = "nas4220b:orange:hdd",
@@ -105,6 +101,6 @@ MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")
105 .atag_offset = 0x100, 101 .atag_offset = 0x100,
106 .map_io = gemini_map_io, 102 .map_io = gemini_map_io,
107 .init_irq = gemini_init_irq, 103 .init_irq = gemini_init_irq,
108 .timer = &ib4220b_timer, 104 .init_time = gemini_timer_init,
109 .init_machine = ib4220b_init, 105 .init_machine = ib4220b_init,
110MACHINE_END 106MACHINE_END
diff --git a/arch/arm/mach-gemini/board-rut1xx.c b/arch/arm/mach-gemini/board-rut1xx.c
index cd7437a1cea0..fa0a36337f4d 100644
--- a/arch/arm/mach-gemini/board-rut1xx.c
+++ b/arch/arm/mach-gemini/board-rut1xx.c
@@ -71,10 +71,6 @@ static struct platform_device rut1xx_leds = {
71 }, 71 },
72}; 72};
73 73
74static struct sys_timer rut1xx_timer = {
75 .init = gemini_timer_init,
76};
77
78static void __init rut1xx_init(void) 74static void __init rut1xx_init(void)
79{ 75{
80 gemini_gpio_init(); 76 gemini_gpio_init();
@@ -89,6 +85,6 @@ MACHINE_START(RUT100, "Teltonika RUT100")
89 .atag_offset = 0x100, 85 .atag_offset = 0x100,
90 .map_io = gemini_map_io, 86 .map_io = gemini_map_io,
91 .init_irq = gemini_init_irq, 87 .init_irq = gemini_init_irq,
92 .timer = &rut1xx_timer, 88 .init_time = gemini_timer_init,
93 .init_machine = rut1xx_init, 89 .init_machine = rut1xx_init,
94MACHINE_END 90MACHINE_END
diff --git a/arch/arm/mach-gemini/board-wbd111.c b/arch/arm/mach-gemini/board-wbd111.c
index a367880368f1..3321cd6cc1f3 100644
--- a/arch/arm/mach-gemini/board-wbd111.c
+++ b/arch/arm/mach-gemini/board-wbd111.c
@@ -80,10 +80,6 @@ static struct platform_device wbd111_leds_device = {
80 }, 80 },
81}; 81};
82 82
83static struct sys_timer wbd111_timer = {
84 .init = gemini_timer_init,
85};
86
87static struct mtd_partition wbd111_partitions[] = { 83static struct mtd_partition wbd111_partitions[] = {
88 { 84 {
89 .name = "RedBoot", 85 .name = "RedBoot",
@@ -132,6 +128,6 @@ MACHINE_START(WBD111, "Wiliboard WBD-111")
132 .atag_offset = 0x100, 128 .atag_offset = 0x100,
133 .map_io = gemini_map_io, 129 .map_io = gemini_map_io,
134 .init_irq = gemini_init_irq, 130 .init_irq = gemini_init_irq,
135 .timer = &wbd111_timer, 131 .init_time = gemini_timer_init,
136 .init_machine = wbd111_init, 132 .init_machine = wbd111_init,
137MACHINE_END 133MACHINE_END
diff --git a/arch/arm/mach-gemini/board-wbd222.c b/arch/arm/mach-gemini/board-wbd222.c
index f382811c1319..fe33c825fdaf 100644
--- a/arch/arm/mach-gemini/board-wbd222.c
+++ b/arch/arm/mach-gemini/board-wbd222.c
@@ -80,10 +80,6 @@ static struct platform_device wbd222_leds_device = {
80 }, 80 },
81}; 81};
82 82
83static struct sys_timer wbd222_timer = {
84 .init = gemini_timer_init,
85};
86
87static struct mtd_partition wbd222_partitions[] = { 83static struct mtd_partition wbd222_partitions[] = {
88 { 84 {
89 .name = "RedBoot", 85 .name = "RedBoot",
@@ -132,6 +128,6 @@ MACHINE_START(WBD222, "Wiliboard WBD-222")
132 .atag_offset = 0x100, 128 .atag_offset = 0x100,
133 .map_io = gemini_map_io, 129 .map_io = gemini_map_io,
134 .init_irq = gemini_init_irq, 130 .init_irq = gemini_init_irq,
135 .timer = &wbd222_timer, 131 .init_time = gemini_timer_init,
136 .init_machine = wbd222_init, 132 .init_machine = wbd222_init,
137MACHINE_END 133MACHINE_END
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index aa1331e86bcf..17ef91fa3d56 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -42,12 +42,12 @@ void __init arch_dma_init(dma_t *dma)
42} 42}
43 43
44/* 44/*
45 * Return usecs since last timer reload 45 * Return nsecs since last timer reload
46 * (timercount * (usecs perjiffie)) / (ticks per jiffie) 46 * (timercount * (usecs perjiffie)) / (ticks per jiffie)
47 */ 47 */
48unsigned long h720x_gettimeoffset(void) 48u32 h720x_gettimeoffset(void)
49{ 49{
50 return (CPU_REG (TIMER_VIRT, TM0_COUNT) * tick_usec) / LATCH; 50 return ((CPU_REG(TIMER_VIRT, TM0_COUNT) * tick_usec) / LATCH) * 1000;
51} 51}
52 52
53/* 53/*
diff --git a/arch/arm/mach-h720x/common.h b/arch/arm/mach-h720x/common.h
index 2489537d33dd..7e738410ca93 100644
--- a/arch/arm/mach-h720x/common.h
+++ b/arch/arm/mach-h720x/common.h
@@ -13,18 +13,18 @@
13 * 13 *
14 */ 14 */
15 15
16extern unsigned long h720x_gettimeoffset(void); 16extern u32 h720x_gettimeoffset(void);
17extern void __init h720x_init_irq(void); 17extern void __init h720x_init_irq(void);
18extern void __init h720x_map_io(void); 18extern void __init h720x_map_io(void);
19extern void h720x_restart(char, const char *); 19extern void h720x_restart(char, const char *);
20 20
21#ifdef CONFIG_ARCH_H7202 21#ifdef CONFIG_ARCH_H7202
22extern struct sys_timer h7202_timer; 22extern void h7202_timer_init(void);
23extern void __init init_hw_h7202(void); 23extern void __init init_hw_h7202(void);
24extern void __init h7202_init_irq(void); 24extern void __init h7202_init_irq(void);
25extern void __init h7202_init_time(void); 25extern void __init h7202_init_time(void);
26#endif 26#endif
27 27
28#ifdef CONFIG_ARCH_H7201 28#ifdef CONFIG_ARCH_H7201
29extern struct sys_timer h7201_timer; 29extern void h7201_timer_init(void);
30#endif 30#endif
diff --git a/arch/arm/mach-h720x/cpu-h7201.c b/arch/arm/mach-h720x/cpu-h7201.c
index 24df2a349a98..13c741215387 100644
--- a/arch/arm/mach-h720x/cpu-h7201.c
+++ b/arch/arm/mach-h720x/cpu-h7201.c
@@ -44,8 +44,10 @@ static struct irqaction h7201_timer_irq = {
44/* 44/*
45 * Setup TIMER0 as system timer 45 * Setup TIMER0 as system timer
46 */ 46 */
47void __init h7201_init_time(void) 47void __init h7201_timer_init(void)
48{ 48{
49 arch_gettimeoffset = h720x_gettimeoffset;
50
49 CPU_REG (TIMER_VIRT, TM0_PERIOD) = LATCH; 51 CPU_REG (TIMER_VIRT, TM0_PERIOD) = LATCH;
50 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_RESET; 52 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_RESET;
51 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_REPEAT | TM_START; 53 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_REPEAT | TM_START;
@@ -53,8 +55,3 @@ void __init h7201_init_time(void)
53 55
54 setup_irq(IRQ_TIMER0, &h7201_timer_irq); 56 setup_irq(IRQ_TIMER0, &h7201_timer_irq);
55} 57}
56
57struct sys_timer h7201_timer = {
58 .init = h7201_init_time,
59 .offset = h720x_gettimeoffset,
60};
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index c37d570b852d..e2ae7e898f9d 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -178,8 +178,10 @@ static struct irqaction h7202_timer_irq = {
178/* 178/*
179 * Setup TIMER0 as system timer 179 * Setup TIMER0 as system timer
180 */ 180 */
181void __init h7202_init_time(void) 181void __init h7202_timer_init(void)
182{ 182{
183 arch_gettimeoffset = h720x_gettimeoffset;
184
183 CPU_REG (TIMER_VIRT, TM0_PERIOD) = LATCH; 185 CPU_REG (TIMER_VIRT, TM0_PERIOD) = LATCH;
184 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_RESET; 186 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_RESET;
185 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_REPEAT | TM_START; 187 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_REPEAT | TM_START;
@@ -188,11 +190,6 @@ void __init h7202_init_time(void)
188 setup_irq(IRQ_TIMER0, &h7202_timer_irq); 190 setup_irq(IRQ_TIMER0, &h7202_timer_irq);
189} 191}
190 192
191struct sys_timer h7202_timer = {
192 .init = h7202_init_time,
193 .offset = h720x_gettimeoffset,
194};
195
196void __init h7202_init_irq (void) 193void __init h7202_init_irq (void)
197{ 194{
198 int irq; 195 int irq;
diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c
index 5fdb20c855e2..4fdeb686c0a9 100644
--- a/arch/arm/mach-h720x/h7201-eval.c
+++ b/arch/arm/mach-h720x/h7201-eval.c
@@ -32,7 +32,7 @@ MACHINE_START(H7201, "Hynix GMS30C7201")
32 .atag_offset = 0x1000, 32 .atag_offset = 0x1000,
33 .map_io = h720x_map_io, 33 .map_io = h720x_map_io,
34 .init_irq = h720x_init_irq, 34 .init_irq = h720x_init_irq,
35 .timer = &h7201_timer, 35 .init_time = h7201_timer_init,
36 .dma_zone_size = SZ_256M, 36 .dma_zone_size = SZ_256M,
37 .restart = h720x_restart, 37 .restart = h720x_restart,
38MACHINE_END 38MACHINE_END
diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c
index 169673036c59..f68e967a2062 100644
--- a/arch/arm/mach-h720x/h7202-eval.c
+++ b/arch/arm/mach-h720x/h7202-eval.c
@@ -74,7 +74,7 @@ MACHINE_START(H7202, "Hynix HMS30C7202")
74 .atag_offset = 0x100, 74 .atag_offset = 0x100,
75 .map_io = h720x_map_io, 75 .map_io = h720x_map_io,
76 .init_irq = h7202_init_irq, 76 .init_irq = h7202_init_irq,
77 .timer = &h7202_timer, 77 .init_time = h7202_timer_init,
78 .init_machine = init_eval_h7202, 78 .init_machine = init_eval_h7202,
79 .dma_zone_size = SZ_256M, 79 .dma_zone_size = SZ_256M,
80 .restart = h720x_restart, 80 .restart = h720x_restart,
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 981dc1e1da51..fd630bccbd31 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -18,6 +18,7 @@
18#include <linux/dma-mapping.h> 18#include <linux/dma-mapping.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/irq.h> 20#include <linux/irq.h>
21#include <linux/irqchip.h>
21#include <linux/irqdomain.h> 22#include <linux/irqdomain.h>
22#include <linux/of.h> 23#include <linux/of.h>
23#include <linux/of_irq.h> 24#include <linux/of_irq.h>
@@ -32,7 +33,6 @@
32#include <asm/smp_twd.h> 33#include <asm/smp_twd.h>
33#include <asm/hardware/arm_timer.h> 34#include <asm/hardware/arm_timer.h>
34#include <asm/hardware/timer-sp.h> 35#include <asm/hardware/timer-sp.h>
35#include <asm/hardware/gic.h>
36#include <asm/hardware/cache-l2x0.h> 36#include <asm/hardware/cache-l2x0.h>
37#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
38#include <asm/mach/map.h> 38#include <asm/mach/map.h>
@@ -66,12 +66,6 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr)
66 HB_JUMP_TABLE_PHYS(cpu) + 15); 66 HB_JUMP_TABLE_PHYS(cpu) + 15);
67} 67}
68 68
69const static struct of_device_id irq_match[] = {
70 { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
71 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
72 {}
73};
74
75#ifdef CONFIG_CACHE_L2X0 69#ifdef CONFIG_CACHE_L2X0
76static void highbank_l2x0_disable(void) 70static void highbank_l2x0_disable(void)
77{ 71{
@@ -82,7 +76,7 @@ static void highbank_l2x0_disable(void)
82 76
83static void __init highbank_init_irq(void) 77static void __init highbank_init_irq(void)
84{ 78{
85 of_irq_init(irq_match); 79 irqchip_init();
86 80
87 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) 81 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
88 highbank_scu_map_io(); 82 highbank_scu_map_io();
@@ -129,10 +123,6 @@ static void __init highbank_timer_init(void)
129 arch_timer_sched_clock_init(); 123 arch_timer_sched_clock_init();
130} 124}
131 125
132static struct sys_timer highbank_timer = {
133 .init = highbank_timer_init,
134};
135
136static void highbank_power_off(void) 126static void highbank_power_off(void)
137{ 127{
138 highbank_set_pwr_shutdown(); 128 highbank_set_pwr_shutdown();
@@ -209,8 +199,7 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
209 .smp = smp_ops(highbank_smp_ops), 199 .smp = smp_ops(highbank_smp_ops),
210 .map_io = debug_ll_io_init, 200 .map_io = debug_ll_io_init,
211 .init_irq = highbank_init_irq, 201 .init_irq = highbank_init_irq,
212 .timer = &highbank_timer, 202 .init_time = highbank_timer_init,
213 .handle_irq = gic_handle_irq,
214 .init_machine = highbank_init, 203 .init_machine = highbank_init,
215 .dt_compat = highbank_match, 204 .dt_compat = highbank_match,
216 .restart = highbank_restart, 205 .restart = highbank_restart,
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index 4ecc864ac8b9..8797a7001720 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -17,9 +17,9 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/smp.h> 18#include <linux/smp.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/irqchip/arm-gic.h>
20 21
21#include <asm/smp_scu.h> 22#include <asm/smp_scu.h>
22#include <asm/hardware/gic.h>
23 23
24#include "core.h" 24#include "core.h"
25 25
@@ -33,7 +33,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)
33static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) 33static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
34{ 34{
35 highbank_set_cpu_jump(cpu, secondary_startup); 35 highbank_set_cpu_jump(cpu, secondary_startup);
36 gic_raise_softirq(cpumask_of(cpu), 0); 36 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
37 return 0; 37 return 0;
38} 38}
39 39
@@ -56,8 +56,6 @@ static void __init highbank_smp_init_cpus(void)
56 56
57 for (i = 0; i < ncores; i++) 57 for (i = 0; i < ncores; i++)
58 set_cpu_possible(i, true); 58 set_cpu_possible(i, true);
59
60 set_smp_cross_call(gic_raise_softirq);
61} 59}
62 60
63static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) 61static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0a2349dc7018..7b11d3329e81 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -95,9 +95,6 @@ config MACH_MX27
95config ARCH_MX5 95config ARCH_MX5
96 bool 96 bool
97 97
98config ARCH_MX50
99 bool
100
101config ARCH_MX51 98config ARCH_MX51
102 bool 99 bool
103 100
@@ -164,11 +161,6 @@ config SOC_IMX5
164 select CPU_V7 161 select CPU_V7
165 select MXC_TZIC 162 select MXC_TZIC
166 163
167config SOC_IMX50
168 bool
169 select ARCH_MX50
170 select SOC_IMX5
171
172config SOC_IMX51 164config SOC_IMX51
173 bool 165 bool
174 select ARCH_MX5 166 select ARCH_MX5
@@ -738,25 +730,10 @@ endif
738 730
739if ARCH_MULTI_V7 731if ARCH_MULTI_V7
740 732
741comment "i.MX5 platforms:"
742
743config MACH_MX50_RDP
744 bool "Support MX50 reference design platform"
745 depends on BROKEN
746 select IMX_HAVE_PLATFORM_IMX_I2C
747 select IMX_HAVE_PLATFORM_IMX_UART
748 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
749 select IMX_HAVE_PLATFORM_SPI_IMX
750 select SOC_IMX50
751 help
752 Include support for MX50 reference design platform (RDP) board. This
753 includes specific configurations for the board and its peripherals.
754
755comment "i.MX51 machines:" 733comment "i.MX51 machines:"
756 734
757config MACH_IMX51_DT 735config MACH_IMX51_DT
758 bool "Support i.MX51 platforms from device tree" 736 bool "Support i.MX51 platforms from device tree"
759 select MACH_MX51_BABBAGE
760 select SOC_IMX51 737 select SOC_IMX51
761 help 738 help
762 Include support for Freescale i.MX51 based platforms 739 Include support for Freescale i.MX51 based platforms
@@ -777,19 +754,6 @@ config MACH_MX51_BABBAGE
777 u-boot. This includes specific configurations for the board and its 754 u-boot. This includes specific configurations for the board and its
778 peripherals. 755 peripherals.
779 756
780config MACH_MX51_3DS
781 bool "Support MX51PDK (3DS)"
782 select IMX_HAVE_PLATFORM_IMX2_WDT
783 select IMX_HAVE_PLATFORM_IMX_KEYPAD
784 select IMX_HAVE_PLATFORM_IMX_UART
785 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
786 select IMX_HAVE_PLATFORM_SPI_IMX
787 select MXC_DEBUG_BOARD
788 select SOC_IMX51
789 help
790 Include support for MX51PDK (3DS) platform. This includes specific
791 configurations for the board and its peripherals.
792
793config MACH_EUKREA_CPUIMX51SD 757config MACH_EUKREA_CPUIMX51SD
794 bool "Support Eukrea CPUIMX51SD module" 758 bool "Support Eukrea CPUIMX51SD module"
795 select IMX_HAVE_PLATFORM_FSL_USB2_UDC 759 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 0634b3152c24..c4ce0906d76a 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -28,7 +28,11 @@ obj-$(CONFIG_MXC_ULPI) += ulpi.o
28obj-$(CONFIG_MXC_USE_EPIT) += epit.o 28obj-$(CONFIG_MXC_USE_EPIT) += epit.o
29obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o 29obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
30obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o 30obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
31obj-$(CONFIG_CPU_IDLE) += cpuidle.o 31
32ifeq ($(CONFIG_CPU_IDLE),y)
33obj-y += cpuidle.o
34obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o
35endif
32 36
33ifdef CONFIG_SND_IMX_SOC 37ifdef CONFIG_SND_IMX_SOC
34obj-y += ssi-fiq.o 38obj-y += ssi-fiq.o
@@ -88,7 +92,6 @@ obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o
88obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o 92obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
89obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o 93obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
90 94
91obj-$(CONFIG_DEBUG_LL) += lluart.o
92obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o 95obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
93obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o 96obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
94obj-$(CONFIG_HAVE_IMX_SRC) += src.o 97obj-$(CONFIG_HAVE_IMX_SRC) += src.o
@@ -103,10 +106,8 @@ endif
103 106
104# i.MX5 based machines 107# i.MX5 based machines
105obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o 108obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
106obj-$(CONFIG_MACH_MX51_3DS) += mach-mx51_3ds.o
107obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o 109obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o
108obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o 110obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o
109obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
110 111
111obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o 112obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
112obj-$(CONFIG_SOC_IMX53) += mach-imx53.o 113obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index b27815de8473..41ba1bb0437b 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -22,10 +22,6 @@ zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
22params_phys-$(CONFIG_SOC_IMX35) := 0x80000100 22params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
23initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000 23initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
24 24
25zreladdr-$(CONFIG_SOC_IMX50) += 0x70008000
26params_phys-$(CONFIG_SOC_IMX50) := 0x70000100
27initrd_phys-$(CONFIG_SOC_IMX50) := 0x70800000
28
29zreladdr-$(CONFIG_SOC_IMX51) += 0x90008000 25zreladdr-$(CONFIG_SOC_IMX51) += 0x90008000
30params_phys-$(CONFIG_SOC_IMX51) := 0x90000100 26params_phys-$(CONFIG_SOC_IMX51) := 0x90000100
31initrd_phys-$(CONFIG_SOC_IMX51) := 0x90800000 27initrd_phys-$(CONFIG_SOC_IMX51) := 0x90800000
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 1ffe3b534e51..d24b0d68e83f 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -62,7 +62,7 @@ static const char *clko_sel_clks[] = {
62 "32k", "usb_div", "dptc", 62 "32k", "usb_div", "dptc",
63}; 63};
64 64
65static const char *ssi_sel_clks[] = { "spll", "mpll", }; 65static const char *ssi_sel_clks[] = { "spll_gate", "mpll", };
66 66
67enum mx27_clks { 67enum mx27_clks {
68 dummy, ckih, ckil, mpll, spll, mpll_main2, ahb, ipg, nfc_div, per1_div, 68 dummy, ckih, ckil, mpll, spll, mpll_main2, ahb, ipg, nfc_div, per1_div,
@@ -82,7 +82,7 @@ enum mx27_clks {
82 csi_ahb_gate, brom_ahb_gate, ata_ahb_gate, wdog_ipg_gate, usb_ipg_gate, 82 csi_ahb_gate, brom_ahb_gate, ata_ahb_gate, wdog_ipg_gate, usb_ipg_gate,
83 uart6_ipg_gate, uart5_ipg_gate, uart4_ipg_gate, uart3_ipg_gate, 83 uart6_ipg_gate, uart5_ipg_gate, uart4_ipg_gate, uart3_ipg_gate,
84 uart2_ipg_gate, uart1_ipg_gate, ckih_div1p5, fpm, mpll_osc_sel, 84 uart2_ipg_gate, uart1_ipg_gate, ckih_div1p5, fpm, mpll_osc_sel,
85 mpll_sel, clk_max 85 mpll_sel, spll_gate, clk_max
86}; 86};
87 87
88static struct clk *clk[clk_max]; 88static struct clk *clk[clk_max];
@@ -104,6 +104,7 @@ int __init mx27_clocks_init(unsigned long fref)
104 ARRAY_SIZE(mpll_sel_clks)); 104 ARRAY_SIZE(mpll_sel_clks));
105 clk[mpll] = imx_clk_pllv1("mpll", "mpll_sel", CCM_MPCTL0); 105 clk[mpll] = imx_clk_pllv1("mpll", "mpll_sel", CCM_MPCTL0);
106 clk[spll] = imx_clk_pllv1("spll", "ckih", CCM_SPCTL0); 106 clk[spll] = imx_clk_pllv1("spll", "ckih", CCM_SPCTL0);
107 clk[spll_gate] = imx_clk_gate("spll_gate", "spll", CCM_CSCR, 1);
107 clk[mpll_main2] = imx_clk_fixed_factor("mpll_main2", "mpll", 2, 3); 108 clk[mpll_main2] = imx_clk_fixed_factor("mpll_main2", "mpll", 2, 3);
108 109
109 if (mx27_revision() >= IMX_CHIP_REVISION_2_0) { 110 if (mx27_revision() >= IMX_CHIP_REVISION_2_0) {
@@ -121,7 +122,7 @@ int __init mx27_clocks_init(unsigned long fref)
121 clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6); 122 clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6);
122 clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks)); 123 clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks));
123 clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6); 124 clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6);
124 clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3); 125 clk[usb_div] = imx_clk_divider("usb_div", "spll_gate", CCM_CSCR, 28, 3);
125 clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks)); 126 clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));
126 clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks)); 127 clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks));
127 if (mx27_revision() >= IMX_CHIP_REVISION_2_0) 128 if (mx27_revision() >= IMX_CHIP_REVISION_2_0)
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 16ccbd41dea9..b5b65f3efaf1 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -34,8 +34,8 @@ static const char *csi_sel[] = { "upll", "spll", };
34static const char *fir_sel[] = { "mcu_main", "upll", "spll" }; 34static const char *fir_sel[] = { "mcu_main", "upll", "spll" };
35 35
36enum mx31_clks { 36enum mx31_clks {
37 ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, per_div, 37 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg,
38 per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre, 38 per_div, per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre,
39 fir_div_post, sdhc1_gate, sdhc2_gate, gpt_gate, epit1_gate, epit2_gate, 39 fir_div_post, sdhc1_gate, sdhc2_gate, gpt_gate, epit1_gate, epit2_gate,
40 iim_gate, ata_gate, sdma_gate, cspi3_gate, rng_gate, uart1_gate, 40 iim_gate, ata_gate, sdma_gate, cspi3_gate, rng_gate, uart1_gate,
41 uart2_gate, ssi1_gate, i2c1_gate, i2c2_gate, i2c3_gate, hantro_gate, 41 uart2_gate, ssi1_gate, i2c1_gate, i2c2_gate, i2c3_gate, hantro_gate,
@@ -46,12 +46,15 @@ enum mx31_clks {
46}; 46};
47 47
48static struct clk *clk[clk_max]; 48static struct clk *clk[clk_max];
49static struct clk_onecell_data clk_data;
49 50
50int __init mx31_clocks_init(unsigned long fref) 51int __init mx31_clocks_init(unsigned long fref)
51{ 52{
52 void __iomem *base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR); 53 void __iomem *base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR);
53 int i; 54 int i;
55 struct device_node *np;
54 56
57 clk[dummy] = imx_clk_fixed("dummy", 0);
55 clk[ckih] = imx_clk_fixed("ckih", fref); 58 clk[ckih] = imx_clk_fixed("ckih", fref);
56 clk[ckil] = imx_clk_fixed("ckil", 32768); 59 clk[ckil] = imx_clk_fixed("ckil", 32768);
57 clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MXC_CCM_MPCTL); 60 clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MXC_CCM_MPCTL);
@@ -116,6 +119,14 @@ int __init mx31_clocks_init(unsigned long fref)
116 pr_err("imx31 clk %d: register failed with %ld\n", 119 pr_err("imx31 clk %d: register failed with %ld\n",
117 i, PTR_ERR(clk[i])); 120 i, PTR_ERR(clk[i]));
118 121
122 np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm");
123
124 if (np) {
125 clk_data.clks = clk;
126 clk_data.clk_num = ARRAY_SIZE(clk);
127 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
128 }
129
119 clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); 130 clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");
120 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); 131 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
121 clk_register_clkdev(clk[cspi1_gate], NULL, "imx31-cspi.0"); 132 clk_register_clkdev(clk[cspi1_gate], NULL, "imx31-cspi.0");
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index f0727e80815d..74e3a34d78b8 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -67,13 +67,13 @@ enum mx35_clks {
67 67
68static struct clk *clk[clk_max]; 68static struct clk *clk[clk_max];
69 69
70int __init mx35_clocks_init() 70int __init mx35_clocks_init(void)
71{ 71{
72 void __iomem *base = MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR); 72 void __iomem *base = MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR);
73 u32 pdr0, consumer_sel, hsp_sel; 73 u32 pdr0, consumer_sel, hsp_sel;
74 struct arm_ahb_div *aad; 74 struct arm_ahb_div *aad;
75 unsigned char *hsp_div; 75 unsigned char *hsp_div;
76 int i; 76 u32 i;
77 77
78 pdr0 = __raw_readl(base + MXC_CCM_PDR0); 78 pdr0 = __raw_readl(base + MXC_CCM_PDR0);
79 consumer_sel = (pdr0 >> 16) & 0xf; 79 consumer_sel = (pdr0 >> 16) & 0xf;
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index c0c4e723b7f5..540138c4606c 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -54,9 +54,18 @@
54#define BM_CLPCR_MASK_SCU_IDLE (0x1 << 26) 54#define BM_CLPCR_MASK_SCU_IDLE (0x1 << 26)
55#define BM_CLPCR_MASK_L2CC_IDLE (0x1 << 27) 55#define BM_CLPCR_MASK_L2CC_IDLE (0x1 << 27)
56 56
57#define CGPR 0x64
58#define BM_CGPR_CHICKEN_BIT (0x1 << 17)
59
57static void __iomem *ccm_base; 60static void __iomem *ccm_base;
58 61
59void __init imx6q_clock_map_io(void) { } 62void imx6q_set_chicken_bit(void)
63{
64 u32 val = readl_relaxed(ccm_base + CGPR);
65
66 val |= BM_CGPR_CHICKEN_BIT;
67 writel_relaxed(val, ccm_base + CGPR);
68}
60 69
61int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) 70int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
62{ 71{
@@ -68,6 +77,7 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
68 break; 77 break;
69 case WAIT_UNCLOCKED: 78 case WAIT_UNCLOCKED:
70 val |= 0x1 << BP_CLPCR_LPM; 79 val |= 0x1 << BP_CLPCR_LPM;
80 val |= BM_CLPCR_ARM_CLK_DIS_ON_LPM;
71 break; 81 break;
72 case STOP_POWER_ON: 82 case STOP_POWER_ON:
73 val |= 0x2 << BP_CLPCR_LPM; 83 val |= 0x2 << BP_CLPCR_LPM;
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index fa36fb84ab19..5a800bfcec5b 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -21,7 +21,6 @@ extern void mx25_map_io(void);
21extern void mx27_map_io(void); 21extern void mx27_map_io(void);
22extern void mx31_map_io(void); 22extern void mx31_map_io(void);
23extern void mx35_map_io(void); 23extern void mx35_map_io(void);
24extern void mx50_map_io(void);
25extern void mx51_map_io(void); 24extern void mx51_map_io(void);
26extern void mx53_map_io(void); 25extern void mx53_map_io(void);
27extern void imx1_init_early(void); 26extern void imx1_init_early(void);
@@ -30,7 +29,6 @@ extern void imx25_init_early(void);
30extern void imx27_init_early(void); 29extern void imx27_init_early(void);
31extern void imx31_init_early(void); 30extern void imx31_init_early(void);
32extern void imx35_init_early(void); 31extern void imx35_init_early(void);
33extern void imx50_init_early(void);
34extern void imx51_init_early(void); 32extern void imx51_init_early(void);
35extern void imx53_init_early(void); 33extern void imx53_init_early(void);
36extern void mxc_init_irq(void __iomem *); 34extern void mxc_init_irq(void __iomem *);
@@ -41,7 +39,6 @@ extern void mx25_init_irq(void);
41extern void mx27_init_irq(void); 39extern void mx27_init_irq(void);
42extern void mx31_init_irq(void); 40extern void mx31_init_irq(void);
43extern void mx35_init_irq(void); 41extern void mx35_init_irq(void);
44extern void mx50_init_irq(void);
45extern void mx51_init_irq(void); 42extern void mx51_init_irq(void);
46extern void mx53_init_irq(void); 43extern void mx53_init_irq(void);
47extern void imx1_soc_init(void); 44extern void imx1_soc_init(void);
@@ -50,7 +47,6 @@ extern void imx25_soc_init(void);
50extern void imx27_soc_init(void); 47extern void imx27_soc_init(void);
51extern void imx31_soc_init(void); 48extern void imx31_soc_init(void);
52extern void imx35_soc_init(void); 49extern void imx35_soc_init(void);
53extern void imx50_soc_init(void);
54extern void imx51_soc_init(void); 50extern void imx51_soc_init(void);
55extern void imx51_init_late(void); 51extern void imx51_init_late(void);
56extern void imx53_init_late(void); 52extern void imx53_init_late(void);
@@ -109,27 +105,22 @@ void tzic_handle_irq(struct pt_regs *);
109#define imx27_handle_irq avic_handle_irq 105#define imx27_handle_irq avic_handle_irq
110#define imx31_handle_irq avic_handle_irq 106#define imx31_handle_irq avic_handle_irq
111#define imx35_handle_irq avic_handle_irq 107#define imx35_handle_irq avic_handle_irq
112#define imx50_handle_irq tzic_handle_irq
113#define imx51_handle_irq tzic_handle_irq 108#define imx51_handle_irq tzic_handle_irq
114#define imx53_handle_irq tzic_handle_irq 109#define imx53_handle_irq tzic_handle_irq
115#define imx6q_handle_irq gic_handle_irq
116 110
117extern void imx_enable_cpu(int cpu, bool enable); 111extern void imx_enable_cpu(int cpu, bool enable);
118extern void imx_set_cpu_jump(int cpu, void *jump_addr); 112extern void imx_set_cpu_jump(int cpu, void *jump_addr);
119#ifdef CONFIG_DEBUG_LL
120extern void imx_lluart_map_io(void);
121#else
122static inline void imx_lluart_map_io(void) {}
123#endif
124extern void v7_cpu_resume(void); 113extern void v7_cpu_resume(void);
125extern u32 *pl310_get_save_ptr(void); 114extern u32 *pl310_get_save_ptr(void);
126#ifdef CONFIG_SMP 115#ifdef CONFIG_SMP
127extern void v7_secondary_startup(void); 116extern void v7_secondary_startup(void);
128extern void imx_scu_map_io(void); 117extern void imx_scu_map_io(void);
129extern void imx_smp_prepare(void); 118extern void imx_smp_prepare(void);
119extern void imx_scu_standby_enable(void);
130#else 120#else
131static inline void imx_scu_map_io(void) {} 121static inline void imx_scu_map_io(void) {}
132static inline void imx_smp_prepare(void) {} 122static inline void imx_smp_prepare(void) {}
123static inline void imx_scu_standby_enable(void) {}
133#endif 124#endif
134extern void imx_enable_cpu(int cpu, bool enable); 125extern void imx_enable_cpu(int cpu, bool enable);
135extern void imx_set_cpu_jump(int cpu, void *jump_addr); 126extern void imx_set_cpu_jump(int cpu, void *jump_addr);
@@ -139,7 +130,7 @@ extern void imx_gpc_init(void);
139extern void imx_gpc_pre_suspend(void); 130extern void imx_gpc_pre_suspend(void);
140extern void imx_gpc_post_resume(void); 131extern void imx_gpc_post_resume(void);
141extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); 132extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
142extern void imx6q_clock_map_io(void); 133extern void imx6q_set_chicken_bit(void);
143 134
144extern void imx_cpu_die(unsigned int cpu); 135extern void imx_cpu_die(unsigned int cpu);
145extern int imx_cpu_kill(unsigned int cpu); 136extern int imx_cpu_kill(unsigned int cpu);
diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c
index d88760014ff9..d7ce72252a4e 100644
--- a/arch/arm/mach-imx/cpu-imx5.c
+++ b/arch/arm/mach-imx/cpu-imx5.c
@@ -22,7 +22,6 @@
22static int mx5_cpu_rev = -1; 22static int mx5_cpu_rev = -1;
23 23
24#define IIM_SREV 0x24 24#define IIM_SREV 0x24
25#define MX50_HW_ADADIG_DIGPROG 0xB0
26 25
27static int get_mx51_srev(void) 26static int get_mx51_srev(void)
28{ 27{
@@ -108,41 +107,3 @@ int mx53_revision(void)
108 return mx5_cpu_rev; 107 return mx5_cpu_rev;
109} 108}
110EXPORT_SYMBOL(mx53_revision); 109EXPORT_SYMBOL(mx53_revision);
111
112static int get_mx50_srev(void)
113{
114 void __iomem *anatop = ioremap(MX50_ANATOP_BASE_ADDR, SZ_8K);
115 u32 rev;
116
117 if (!anatop) {
118 mx5_cpu_rev = -EINVAL;
119 return 0;
120 }
121
122 rev = readl(anatop + MX50_HW_ADADIG_DIGPROG);
123 rev &= 0xff;
124
125 iounmap(anatop);
126 if (rev == 0x0)
127 return IMX_CHIP_REVISION_1_0;
128 else if (rev == 0x1)
129 return IMX_CHIP_REVISION_1_1;
130 return 0;
131}
132
133/*
134 * Returns:
135 * the silicon revision of the cpu
136 * -EINVAL - not a mx50
137 */
138int mx50_revision(void)
139{
140 if (!cpu_is_mx50())
141 return -EINVAL;
142
143 if (mx5_cpu_rev == -1)
144 mx5_cpu_rev = get_mx50_srev();
145
146 return mx5_cpu_rev;
147}
148EXPORT_SYMBOL(mx50_revision);
diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c
new file mode 100644
index 000000000000..d533e2695f0e
--- /dev/null
+++ b/arch/arm/mach-imx/cpuidle-imx6q.c
@@ -0,0 +1,95 @@
1/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/clockchips.h>
10#include <linux/cpuidle.h>
11#include <linux/module.h>
12#include <asm/cpuidle.h>
13#include <asm/proc-fns.h>
14
15#include "common.h"
16#include "cpuidle.h"
17
18static atomic_t master = ATOMIC_INIT(0);
19static DEFINE_SPINLOCK(master_lock);
20
21static int imx6q_enter_wait(struct cpuidle_device *dev,
22 struct cpuidle_driver *drv, int index)
23{
24 int cpu = dev->cpu;
25
26 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
27
28 if (atomic_inc_return(&master) == num_online_cpus()) {
29 /*
30 * With this lock, we prevent other cpu to exit and enter
31 * this function again and become the master.
32 */
33 if (!spin_trylock(&master_lock))
34 goto idle;
35 imx6q_set_lpm(WAIT_UNCLOCKED);
36 cpu_do_idle();
37 imx6q_set_lpm(WAIT_CLOCKED);
38 spin_unlock(&master_lock);
39 goto done;
40 }
41
42idle:
43 cpu_do_idle();
44done:
45 atomic_dec(&master);
46 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
47
48 return index;
49}
50
51/*
52 * For each cpu, setup the broadcast timer because local timer
53 * stops for the states other than WFI.
54 */
55static void imx6q_setup_broadcast_timer(void *arg)
56{
57 int cpu = smp_processor_id();
58
59 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
60}
61
62static struct cpuidle_driver imx6q_cpuidle_driver = {
63 .name = "imx6q_cpuidle",
64 .owner = THIS_MODULE,
65 .en_core_tk_irqen = 1,
66 .states = {
67 /* WFI */
68 ARM_CPUIDLE_WFI_STATE,
69 /* WAIT */
70 {
71 .exit_latency = 50,
72 .target_residency = 75,
73 .flags = CPUIDLE_FLAG_TIME_VALID,
74 .enter = imx6q_enter_wait,
75 .name = "WAIT",
76 .desc = "Clock off",
77 },
78 },
79 .state_count = 2,
80 .safe_state_index = 0,
81};
82
83int __init imx6q_cpuidle_init(void)
84{
85 /* Need to enable SCU standby for entering WAIT modes */
86 imx_scu_standby_enable();
87
88 /* Set chicken bit to get a reliable WAIT mode support */
89 imx6q_set_chicken_bit();
90
91 /* Configure the broadcast timer on each cpu */
92 on_each_cpu(imx6q_setup_broadcast_timer, NULL, 1);
93
94 return imx_cpuidle_init(&imx6q_cpuidle_driver);
95}
diff --git a/arch/arm/mach-imx/cpuidle.h b/arch/arm/mach-imx/cpuidle.h
index bc932d1af372..e092d1359d94 100644
--- a/arch/arm/mach-imx/cpuidle.h
+++ b/arch/arm/mach-imx/cpuidle.h
@@ -14,9 +14,14 @@
14 14
15#ifdef CONFIG_CPU_IDLE 15#ifdef CONFIG_CPU_IDLE
16extern int imx_cpuidle_init(struct cpuidle_driver *drv); 16extern int imx_cpuidle_init(struct cpuidle_driver *drv);
17extern int imx6q_cpuidle_init(void);
17#else 18#else
18static inline int imx_cpuidle_init(struct cpuidle_driver *drv) 19static inline int imx_cpuidle_init(struct cpuidle_driver *drv)
19{ 20{
20 return -ENODEV; 21 return -ENODEV;
21} 22}
23static inline int imx6q_cpuidle_init(void)
24{
25 return -ENODEV;
26}
22#endif 27#endif
diff --git a/arch/arm/mach-imx/devices-imx50.h b/arch/arm/mach-imx/devices-imx50.h
deleted file mode 100644
index 2c290391f298..000000000000
--- a/arch/arm/mach-imx/devices-imx50.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include "devices/devices-common.h"
22
23extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[];
24#define imx50_add_imx_uart(id, pdata) \
25 imx_add_imx_uart_1irq(&imx50_imx_uart_data[id], pdata)
26
27extern const struct imx_fec_data imx50_fec_data;
28#define imx50_add_fec(pdata) \
29 imx_add_fec(&imx50_fec_data, pdata)
30
31extern const struct imx_imx_i2c_data imx50_imx_i2c_data[];
32#define imx50_add_imx_i2c(id, pdata) \
33 imx_add_imx_i2c(&imx50_imx_i2c_data[id], pdata)
diff --git a/arch/arm/mach-imx/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig
index 9a8f1ca7bcb1..9b9ba1f4ffe1 100644
--- a/arch/arm/mach-imx/devices/Kconfig
+++ b/arch/arm/mach-imx/devices/Kconfig
@@ -1,6 +1,6 @@
1config IMX_HAVE_PLATFORM_FEC 1config IMX_HAVE_PLATFORM_FEC
2 bool 2 bool
3 default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX50 || SOC_IMX51 || SOC_IMX53 3 default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX51 || SOC_IMX53
4 4
5config IMX_HAVE_PLATFORM_FLEXCAN 5config IMX_HAVE_PLATFORM_FLEXCAN
6 bool 6 bool
diff --git a/arch/arm/mach-imx/devices/platform-fec.c b/arch/arm/mach-imx/devices/platform-fec.c
index 2cb188ad9a0a..63eba08f87b1 100644
--- a/arch/arm/mach-imx/devices/platform-fec.c
+++ b/arch/arm/mach-imx/devices/platform-fec.c
@@ -35,12 +35,6 @@ const struct imx_fec_data imx35_fec_data __initconst =
35 imx_fec_data_entry_single(MX35, "imx27-fec"); 35 imx_fec_data_entry_single(MX35, "imx27-fec");
36#endif 36#endif
37 37
38#ifdef CONFIG_SOC_IMX50
39/* i.mx50 has the i.mx25 type fec */
40const struct imx_fec_data imx50_fec_data __initconst =
41 imx_fec_data_entry_single(MX50, "imx25-fec");
42#endif
43
44#ifdef CONFIG_SOC_IMX51 38#ifdef CONFIG_SOC_IMX51
45/* i.mx51 has the i.mx27 type fec */ 39/* i.mx51 has the i.mx27 type fec */
46const struct imx_fec_data imx51_fec_data __initconst = 40const struct imx_fec_data imx51_fec_data __initconst =
diff --git a/arch/arm/mach-imx/devices/platform-imx-i2c.c b/arch/arm/mach-imx/devices/platform-imx-i2c.c
index 8e30e5703cd2..57d342e85c2f 100644
--- a/arch/arm/mach-imx/devices/platform-imx-i2c.c
+++ b/arch/arm/mach-imx/devices/platform-imx-i2c.c
@@ -70,16 +70,6 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
70}; 70};
71#endif /* ifdef CONFIG_SOC_IMX35 */ 71#endif /* ifdef CONFIG_SOC_IMX35 */
72 72
73#ifdef CONFIG_SOC_IMX50
74const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
75#define imx50_imx_i2c_data_entry(_id, _hwid) \
76 imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K)
77 imx50_imx_i2c_data_entry(0, 1),
78 imx50_imx_i2c_data_entry(1, 2),
79 imx50_imx_i2c_data_entry(2, 3),
80};
81#endif /* ifdef CONFIG_SOC_IMX51 */
82
83#ifdef CONFIG_SOC_IMX51 73#ifdef CONFIG_SOC_IMX51
84const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { 74const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
85#define imx51_imx_i2c_data_entry(_id, _hwid) \ 75#define imx51_imx_i2c_data_entry(_id, _hwid) \
diff --git a/arch/arm/mach-imx/devices/platform-imx-uart.c b/arch/arm/mach-imx/devices/platform-imx-uart.c
index 67bf866a2cb6..faac4aa6ca6d 100644
--- a/arch/arm/mach-imx/devices/platform-imx-uart.c
+++ b/arch/arm/mach-imx/devices/platform-imx-uart.c
@@ -94,18 +94,6 @@ const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = {
94}; 94};
95#endif /* ifdef CONFIG_SOC_IMX35 */ 95#endif /* ifdef CONFIG_SOC_IMX35 */
96 96
97#ifdef CONFIG_SOC_IMX50
98const struct imx_imx_uart_1irq_data imx50_imx_uart_data[] __initconst = {
99#define imx50_imx_uart_data_entry(_id, _hwid) \
100 imx_imx_uart_1irq_data_entry(MX50, _id, _hwid, SZ_4K)
101 imx50_imx_uart_data_entry(0, 1),
102 imx50_imx_uart_data_entry(1, 2),
103 imx50_imx_uart_data_entry(2, 3),
104 imx50_imx_uart_data_entry(3, 4),
105 imx50_imx_uart_data_entry(4, 5),
106};
107#endif /* ifdef CONFIG_SOC_IMX50 */
108
109#ifdef CONFIG_SOC_IMX51 97#ifdef CONFIG_SOC_IMX51
110const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst = { 98const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst = {
111#define imx51_imx_uart_data_entry(_id, _hwid) \ 99#define imx51_imx_uart_data_entry(_id, _hwid) \
diff --git a/arch/arm/mach-imx/epit.c b/arch/arm/mach-imx/epit.c
index 04a5961beeac..e02de188ae83 100644
--- a/arch/arm/mach-imx/epit.c
+++ b/arch/arm/mach-imx/epit.c
@@ -178,7 +178,6 @@ static struct irqaction epit_timer_irq = {
178static struct clock_event_device clockevent_epit = { 178static struct clock_event_device clockevent_epit = {
179 .name = "epit", 179 .name = "epit",
180 .features = CLOCK_EVT_FEAT_ONESHOT, 180 .features = CLOCK_EVT_FEAT_ONESHOT,
181 .shift = 32,
182 .set_mode = epit_set_mode, 181 .set_mode = epit_set_mode,
183 .set_next_event = epit_set_next_event, 182 .set_next_event = epit_set_next_event,
184 .rating = 200, 183 .rating = 200,
@@ -186,18 +185,10 @@ static struct clock_event_device clockevent_epit = {
186 185
187static int __init epit_clockevent_init(struct clk *timer_clk) 186static int __init epit_clockevent_init(struct clk *timer_clk)
188{ 187{
189 unsigned int c = clk_get_rate(timer_clk);
190
191 clockevent_epit.mult = div_sc(c, NSEC_PER_SEC,
192 clockevent_epit.shift);
193 clockevent_epit.max_delta_ns =
194 clockevent_delta2ns(0xfffffffe, &clockevent_epit);
195 clockevent_epit.min_delta_ns =
196 clockevent_delta2ns(0x800, &clockevent_epit);
197
198 clockevent_epit.cpumask = cpumask_of(0); 188 clockevent_epit.cpumask = cpumask_of(0);
199 189 clockevents_config_and_register(&clockevent_epit,
200 clockevents_register_device(&clockevent_epit); 190 clk_get_rate(timer_clk),
191 0x800, 0xfffffffe);
201 192
202 return 0; 193 return 0;
203} 194}
diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
index e1537f9e45b8..a96ccc7f5012 100644
--- a/arch/arm/mach-imx/gpc.c
+++ b/arch/arm/mach-imx/gpc.c
@@ -15,7 +15,7 @@
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_address.h> 16#include <linux/of_address.h>
17#include <linux/of_irq.h> 17#include <linux/of_irq.h>
18#include <asm/hardware/gic.h> 18#include <linux/irqchip/arm-gic.h>
19 19
20#define GPC_IMR1 0x008 20#define GPC_IMR1 0x008
21#define GPC_PGC_CPU_PDN 0x2a0 21#define GPC_PGC_CPU_PDN 0x2a0
@@ -101,11 +101,16 @@ static void imx_gpc_irq_mask(struct irq_data *d)
101void __init imx_gpc_init(void) 101void __init imx_gpc_init(void)
102{ 102{
103 struct device_node *np; 103 struct device_node *np;
104 int i;
104 105
105 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpc"); 106 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpc");
106 gpc_base = of_iomap(np, 0); 107 gpc_base = of_iomap(np, 0);
107 WARN_ON(!gpc_base); 108 WARN_ON(!gpc_base);
108 109
110 /* Initially mask all interrupts */
111 for (i = 0; i < IMR_NUM; i++)
112 writel_relaxed(~0, gpc_base + GPC_IMR1 + i * 4);
113
109 /* Register GPC as the secondary interrupt controller behind GIC */ 114 /* Register GPC as the secondary interrupt controller behind GIC */
110 gic_arch_extn.irq_mask = imx_gpc_irq_mask; 115 gic_arch_extn.irq_mask = imx_gpc_irq_mask;
111 gic_arch_extn.irq_unmask = imx_gpc_irq_unmask; 116 gic_arch_extn.irq_unmask = imx_gpc_irq_unmask;
diff --git a/arch/arm/mach-imx/hardware.h b/arch/arm/mach-imx/hardware.h
index 3ce7fa3bd43f..911e9b31b03f 100644
--- a/arch/arm/mach-imx/hardware.h
+++ b/arch/arm/mach-imx/hardware.h
@@ -72,11 +72,6 @@
72 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 72 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
73 * X_MEMC 0xb8000000+0x010000 -> 0xf5c00000+0x010000 73 * X_MEMC 0xb8000000+0x010000 -> 0xf5c00000+0x010000
74 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 74 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
75 * mx50:
76 * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000
77 * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000
78 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
79 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000
80 * mx51: 75 * mx51:
81 * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000 76 * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000
82 * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000 77 * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000
@@ -108,7 +103,6 @@
108#include "mxc.h" 103#include "mxc.h"
109 104
110#include "mx6q.h" 105#include "mx6q.h"
111#include "mx50.h"
112#include "mx51.h" 106#include "mx51.h"
113#include "mx53.h" 107#include "mx53.h"
114#include "mx3x.h" 108#include "mx3x.h"
diff --git a/arch/arm/mach-imx/imx25-dt.c b/arch/arm/mach-imx/imx25-dt.c
index e17dfbc42192..03b65e5ea541 100644
--- a/arch/arm/mach-imx/imx25-dt.c
+++ b/arch/arm/mach-imx/imx25-dt.c
@@ -22,15 +22,6 @@ static void __init imx25_dt_init(void)
22 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 22 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
23} 23}
24 24
25static void __init imx25_timer_init(void)
26{
27 mx25_clocks_init_dt();
28}
29
30static struct sys_timer imx25_timer = {
31 .init = imx25_timer_init,
32};
33
34static const char * const imx25_dt_board_compat[] __initconst = { 25static const char * const imx25_dt_board_compat[] __initconst = {
35 "fsl,imx25", 26 "fsl,imx25",
36 NULL 27 NULL
@@ -41,7 +32,7 @@ DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
41 .init_early = imx25_init_early, 32 .init_early = imx25_init_early,
42 .init_irq = mx25_init_irq, 33 .init_irq = mx25_init_irq,
43 .handle_irq = imx25_handle_irq, 34 .handle_irq = imx25_handle_irq,
44 .timer = &imx25_timer, 35 .init_time = imx25_timer_init,
45 .init_machine = imx25_dt_init, 36 .init_machine = imx25_dt_init,
46 .dt_compat = imx25_dt_board_compat, 37 .dt_compat = imx25_dt_board_compat,
47 .restart = mxc_restart, 38 .restart = mxc_restart,
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
index ebfae96543c4..c915a490a11c 100644
--- a/arch/arm/mach-imx/imx27-dt.c
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -39,26 +39,22 @@ static void __init imx27_dt_init(void)
39 imx27_auxdata_lookup, NULL); 39 imx27_auxdata_lookup, NULL);
40} 40}
41 41
42static void __init imx27_timer_init(void)
43{
44 mx27_clocks_init_dt();
45}
46
47static struct sys_timer imx27_timer = {
48 .init = imx27_timer_init,
49};
50
51static const char * const imx27_dt_board_compat[] __initconst = { 42static const char * const imx27_dt_board_compat[] __initconst = {
52 "fsl,imx27", 43 "fsl,imx27",
53 NULL 44 NULL
54}; 45};
55 46
47static void __init imx27_timer_init(void)
48{
49 mx27_clocks_init_dt();
50}
51
56DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)") 52DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
57 .map_io = mx27_map_io, 53 .map_io = mx27_map_io,
58 .init_early = imx27_init_early, 54 .init_early = imx27_init_early,
59 .init_irq = mx27_init_irq, 55 .init_irq = mx27_init_irq,
60 .handle_irq = imx27_handle_irq, 56 .handle_irq = imx27_handle_irq,
61 .timer = &imx27_timer, 57 .init_time = imx27_timer_init,
62 .init_machine = imx27_dt_init, 58 .init_machine = imx27_dt_init,
63 .dt_compat = imx27_dt_board_compat, 59 .dt_compat = imx27_dt_board_compat,
64 .restart = mxc_restart, 60 .restart = mxc_restart,
diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c
index af476de2570e..00737eb4e00d 100644
--- a/arch/arm/mach-imx/imx31-dt.c
+++ b/arch/arm/mach-imx/imx31-dt.c
@@ -18,35 +18,11 @@
18#include "common.h" 18#include "common.h"
19#include "mx31.h" 19#include "mx31.h"
20 20
21static const struct of_dev_auxdata imx31_auxdata_lookup[] __initconst = {
22 OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART1_BASE_ADDR,
23 "imx21-uart.0", NULL),
24 OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART2_BASE_ADDR,
25 "imx21-uart.1", NULL),
26 OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART3_BASE_ADDR,
27 "imx21-uart.2", NULL),
28 OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART4_BASE_ADDR,
29 "imx21-uart.3", NULL),
30 OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART5_BASE_ADDR,
31 "imx21-uart.4", NULL),
32 { /* sentinel */ }
33};
34
35static void __init imx31_dt_init(void) 21static void __init imx31_dt_init(void)
36{ 22{
37 of_platform_populate(NULL, of_default_bus_match_table, 23 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
38 imx31_auxdata_lookup, NULL);
39} 24}
40 25
41static void __init imx31_timer_init(void)
42{
43 mx31_clocks_init_dt();
44}
45
46static struct sys_timer imx31_timer = {
47 .init = imx31_timer_init,
48};
49
50static const char *imx31_dt_board_compat[] __initdata = { 26static const char *imx31_dt_board_compat[] __initdata = {
51 "fsl,imx31", 27 "fsl,imx31",
52 NULL 28 NULL
@@ -57,7 +33,7 @@ DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
57 .init_early = imx31_init_early, 33 .init_early = imx31_init_early,
58 .init_irq = mx31_init_irq, 34 .init_irq = mx31_init_irq,
59 .handle_irq = imx31_handle_irq, 35 .handle_irq = imx31_handle_irq,
60 .timer = &imx31_timer, 36 .init_time = mx31_clocks_init_dt,
61 .init_machine = imx31_dt_init, 37 .init_machine = imx31_dt_init,
62 .dt_compat = imx31_dt_board_compat, 38 .dt_compat = imx31_dt_board_compat,
63 .restart = mxc_restart, 39 .restart = mxc_restart,
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index 5ffa40c673f8..e2926a8863f8 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -24,26 +24,22 @@ static void __init imx51_dt_init(void)
24 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 24 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
25} 25}
26 26
27static void __init imx51_timer_init(void)
28{
29 mx51_clocks_init_dt();
30}
31
32static struct sys_timer imx51_timer = {
33 .init = imx51_timer_init,
34};
35
36static const char *imx51_dt_board_compat[] __initdata = { 27static const char *imx51_dt_board_compat[] __initdata = {
37 "fsl,imx51", 28 "fsl,imx51",
38 NULL 29 NULL
39}; 30};
40 31
32static void __init imx51_timer_init(void)
33{
34 mx51_clocks_init_dt();
35}
36
41DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)") 37DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
42 .map_io = mx51_map_io, 38 .map_io = mx51_map_io,
43 .init_early = imx51_init_early, 39 .init_early = imx51_init_early,
44 .init_irq = mx51_init_irq, 40 .init_irq = mx51_init_irq,
45 .handle_irq = imx51_handle_irq, 41 .handle_irq = imx51_handle_irq,
46 .timer = &imx51_timer, 42 .init_time = imx51_timer_init,
47 .init_machine = imx51_dt_init, 43 .init_machine = imx51_dt_init,
48 .init_late = imx51_init_late, 44 .init_late = imx51_init_late,
49 .dt_compat = imx51_dt_board_compat, 45 .dt_compat = imx51_dt_board_compat,
diff --git a/arch/arm/mach-imx/iomux-mx50.h b/arch/arm/mach-imx/iomux-mx50.h
deleted file mode 100644
index 00f56e0e8009..000000000000
--- a/arch/arm/mach-imx/iomux-mx50.h
+++ /dev/null
@@ -1,977 +0,0 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
17 */
18
19#ifndef __MACH_IOMUX_MX50_H__
20#define __MACH_IOMUX_MX50_H__
21
22#include "iomux-v3.h"
23
24#define MX50_ELCDIF_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH)
25
26#define MX50_SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
27 PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH)
28
29#define MX50_UART_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE)
30
31#define MX50_I2C_PAD_CTRL (PAD_CTL_ODE | PAD_CTL_DSE_HIGH | \
32 PAD_CTL_PUS_100K_UP | PAD_CTL_HYS)
33
34#define MX50_USB_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
35 PAD_CTL_DSE_HIGH | PAD_CTL_PUS_47K_UP)
36
37#define MX50_FEC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
38 PAD_CTL_PUS_22K_UP | PAD_CTL_ODE | \
39 PAD_CTL_DSE_HIGH)
40
41#define MX50_OWIRE_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
42 PAD_CTL_PUS_100K_UP | PAD_CTL_ODE | \
43 PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST)
44
45#define MX50_KEYPAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
46 PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_HIGH)
47
48#define MX50_CSPI_SS_PAD (PAD_CTL_PKE | PAD_CTL_PUE | \
49 PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_HIGH)
50
51#define MX50_PAD_KEY_COL0__KEY_COL0 IOMUX_PAD(0x2CC, 0x20, 0, 0x0, 0, NO_PAD_CTRL)
52#define MX50_PAD_KEY_COL0__GPIO_4_0 IOMUX_PAD(0x2CC, 0x20, 1, 0x0, 0, NO_PAD_CTRL)
53#define MX50_PAD_KEY_COL0__NANDF_CLE IOMUX_PAD(0x2CC, 0x20, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
54
55#define MX50_PAD_KEY_ROW0__KEY_ROW0 IOMUX_PAD(0x2D0, 0x24, 0, 0x0, 0, MX50_KEYPAD_CTRL)
56#define MX50_PAD_KEY_ROW0__GPIO_4_1 IOMUX_PAD(0x2D0, 0x24, 1, 0x0, 0, NO_PAD_CTRL)
57#define MX50_PAD_KEY_ROW0__NANDF_ALE IOMUX_PAD(0x2D0, 0x24, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
58
59#define MX50_PAD_KEY_COL1__KEY_COL1 IOMUX_PAD(0x2D4, 0x28, 0, 0x0, 0, NO_PAD_CTRL)
60#define MX50_PAD_KEY_COL1__GPIO_4_2 IOMUX_PAD(0x2D4, 0x28, 1, 0x0, 0, NO_PAD_CTRL)
61#define MX50_PAD_KEY_COL1__NANDF_CE0 IOMUX_PAD(0x2D4, 0x28, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
62
63#define MX50_PAD_KEY_ROW1__KEY_ROW1 IOMUX_PAD(0x2D8, 0x2C, 0, 0x0, 0, MX50_KEYPAD_CTRL)
64#define MX50_PAD_KEY_ROW1__GPIO_4_3 IOMUX_PAD(0x2D8, 0x2C, 1, 0x0, 0, NO_PAD_CTRL)
65#define MX50_PAD_KEY_ROW1__NANDF_CE1 IOMUX_PAD(0x2D8, 0x2C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
66
67#define MX50_PAD_KEY_COL2__KEY_COL2 IOMUX_PAD(0x2DC, 0x30, 0, 0x0, 0, MX50_KEYPAD_CTRL)
68#define MX50_PAD_KEY_COL2__GPIO_4_4 IOMUX_PAD(0x2DC, 0x30, 1, 0x0, 0, NO_PAD_CTRL)
69#define MX50_PAD_KEY_COL2__NANDF_CE2 IOMUX_PAD(0x2DC, 0x30, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
70
71#define MX50_PAD_KEY_ROW2__KEY_ROW2 IOMUX_PAD(0x2E0, 0x34, 0, 0x0, 0, MX50_KEYPAD_CTRL)
72#define MX50_PAD_KEY_ROW2__GPIO_4_5 IOMUX_PAD(0x2E0, 0x34, 1, 0x0, 0, NO_PAD_CTRL)
73#define MX50_PAD_KEY_ROW2__NANDF_CE3 IOMUX_PAD(0x2E0, 0x34, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
74
75#define MX50_PAD_KEY_COL3__KEY_COL3 IOMUX_PAD(0x2E4, 0x38, 0, 0x0, 0, NO_PAD_CTRL)
76#define MX50_PAD_KEY_COL3__GPIO_4_6 IOMUX_PAD(0x2E4, 0x38, 1, 0x0, 0, NO_PAD_CTRL)
77#define MX50_PAD_KEY_COL3__NANDF_READY IOMUX_PAD(0x2E4, 0x38, 2, 0x7b4, 0, PAD_CTL_PKE | \
78 PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
79#define MX50_PAD_KEY_COL3__SDMA_EXT0 IOMUX_PAD(0x2E4, 0x38, 6, 0x7b8, 0, NO_PAD_CTRL)
80
81#define MX50_PAD_KEY_ROW3__KEY_ROW3 IOMUX_PAD(0x2E8, 0x3C, 0, 0x0, 0, MX50_KEYPAD_CTRL)
82#define MX50_PAD_KEY_ROW3__GPIO_4_7 IOMUX_PAD(0x2E8, 0x3C, 1, 0x0, 0, NO_PAD_CTRL)
83#define MX50_PAD_KEY_ROW3__NANDF_DQS IOMUX_PAD(0x2E8, 0x3C, 2, 0x7b0, 0, PAD_CTL_DSE_HIGH)
84#define MX50_PAD_KEY_ROW3__SDMA_EXT1 IOMUX_PAD(0x2E8, 0x3C, 6, 0x7bc, 0, NO_PAD_CTRL)
85
86#define MX50_PAD_I2C1_SCL__I2C1_SCL IOMUX_PAD(0x2EC, 0x40, IOMUX_CONFIG_SION, 0x0, 0, \
87 MX50_I2C_PAD_CTRL)
88#define MX50_PAD_I2C1_SCL__GPIO_6_18 IOMUX_PAD(0x2EC, 0x40, 1, 0x0, 0, NO_PAD_CTRL)
89#define MX50_PAD_I2C1_SCL__UART2_TXD IOMUX_PAD(0x2EC, 0x40, 2, 0x0, 0, MX50_UART_PAD_CTRL)
90
91#define MX50_PAD_I2C1_SDA__I2C1_SDA IOMUX_PAD(0x2F0, 0x44, IOMUX_CONFIG_SION, 0x0, 0, \
92 MX50_I2C_PAD_CTRL)
93#define MX50_PAD_I2C1_SDA__GPIO_6_19 IOMUX_PAD(0x2F0, 0x44, 1, 0x0, 0, NO_PAD_CTRL)
94#define MX50_PAD_I2C1_SDA__UART2_RXD IOMUX_PAD(0x2F0, 0x44, 2, 0x7cc, 1, MX50_UART_PAD_CTRL)
95
96#define MX50_PAD_I2C2_SCL__I2C2_SCL IOMUX_PAD(0x2F4, 0x48, IOMUX_CONFIG_SION, 0x0, 0, \
97 MX50_I2C_PAD_CTRL)
98#define MX50_PAD_I2C2_SCL__GPIO_6_20 IOMUX_PAD(0x2F4, 0x48, 1, 0x0, 0, NO_PAD_CTRL)
99#define MX50_PAD_I2C2_SCL__UART2_CTS IOMUX_PAD(0x2F4, 0x48, 2, 0x0, 0, MX50_UART_PAD_CTRL)
100#define MX50_PAD_I2C2_SCL__DCDC_OK IOMUX_PAD(0x2F4, 0x48, 7, 0x0, 0, NO_PAD_CTRL)
101
102#define MX50_PAD_I2C2_SDA__I2C2_SDA IOMUX_PAD(0x2F8, 0x4C, IOMUX_CONFIG_SION, 0x0, 0, \
103 MX50_I2C_PAD_CTRL)
104#define MX50_PAD_I2C2_SDA__GPIO_6_21 IOMUX_PAD(0x2F8, 0x4C, 1, 0x0, 0, NO_PAD_CTRL)
105#define MX50_PAD_I2C2_SDA__UART2_RTS IOMUX_PAD(0x2F8, 0x4C, 2, 0x7c8, 1, MX50_UART_PAD_CTRL)
106#define MX50_PAD_I2C2_SDA__PWRSTABLE IOMUX_PAD(0x2F8, 0x4C, 7, 0x0, 0, NO_PAD_CTRL)
107
108#define MX50_PAD_I2C3_SCL__I2C3_SCL IOMUX_PAD(0x2FC, 0x50, IOMUX_CONFIG_SION, 0x0, 0, \
109 MX50_I2C_PAD_CTRL)
110#define MX50_PAD_I2C3_SCL__GPIO_6_22 IOMUX_PAD(0x2FC, 0x50, 1, 0x0, 0, NO_PAD_CTRL)
111#define MX50_PAD_I2C3_SCL__FEC_MDC IOMUX_PAD(0x2FC, 0x50, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
112#define MX50_PAD_I2C3_SCL__PMIC_RDY IOMUX_PAD(0x2FC, 0x50, 3, 0x0, 0, NO_PAD_CTRL)
113#define MX50_PAD_I2C3_SCL__GPT_CAPIN1 IOMUX_PAD(0x2FC, 0x50, 5, 0x0, 0, NO_PAD_CTRL)
114#define MX50_PAD_I2C3_SCL__USBOTG_OC IOMUX_PAD(0x2FC, 0x50, 7, 0x7E8, 0, MX50_USB_PAD_CTRL)
115
116#define MX50_PAD_I2C3_SDA__I2C3_SDA IOMUX_PAD(0x300, 0x54, IOMUX_CONFIG_SION, 0x0, 0, \
117 MX50_I2C_PAD_CTRL)
118#define MX50_PAD_I2C3_SDA__GPIO_6_23 IOMUX_PAD(0x300, 0x54, 1, 0x0, 0, NO_PAD_CTRL)
119#define MX50_PAD_I2C3_SDA__FEC_MDIO IOMUX_PAD(0x300, 0x54, 2, 0x774, 0, MX50_FEC_PAD_CTRL)
120#define MX50_PAD_I2C3_SDA__PWRFAIL_INT IOMUX_PAD(0x300, 0x54, 3, 0x0, 0, NO_PAD_CTRL)
121#define MX50_PAD_I2C3_SDA__ALARM_DEB IOMUX_PAD(0x300, 0x54, 4, 0x0, 0, NO_PAD_CTRL)
122#define MX50_PAD_I2C3_SDA__GPT_CAPIN1 IOMUX_PAD(0x300, 0x54, 5, 0x0, 0, NO_PAD_CTRL)
123#define MX50_PAD_I2C3_SDA__USBOTG_PWR IOMUX_PAD(0x300, 0x54, 7, 0x0, 0, \
124 PAD_CTL_PKE | PAD_CTL_DSE_HIGH)
125
126#define MX50_PAD_PWM1__PWM1_PWMO IOMUX_PAD(0x304, 0x58, 0, 0x0, 0, NO_PAD_CTRL)
127#define MX50_PAD_PWM1__GPIO_6_24 IOMUX_PAD(0x304, 0x58, 1, 0x0, 0, NO_PAD_CTRL)
128#define MX50_PAD_PWM1__USBOTG_OC IOMUX_PAD(0x304, 0x58, 2, 0x7E8, 1, MX50_USB_PAD_CTRL)
129#define MX50_PAD_PWM1__GPT_CMPOUT1 IOMUX_PAD(0x304, 0x58, 5, 0x0, 0, NO_PAD_CTRL)
130
131#define MX50_PAD_PWM2__PWM2_PWMO IOMUX_PAD(0x308, 0x5C, 0, 0x0, 0, NO_PAD_CTRL)
132#define MX50_PAD_PWM2__GPIO_6_25 IOMUX_PAD(0x308, 0x5C, 1, 0x0, 0, NO_PAD_CTRL)
133#define MX50_PAD_PWM2__USBOTG_PWR IOMUX_PAD(0x308, 0x5C, 2, 0x0, 0, \
134 PAD_CTL_PKE | PAD_CTL_DSE_HIGH)
135#define MX50_PAD_PWM2__DCDC_PWM IOMUX_PAD(0x308, 0x5C, 4, 0x0, 0, NO_PAD_CTRL)
136#define MX50_PAD_PWM2__GPT_CMPOUT2 IOMUX_PAD(0x308, 0x5C, 5, 0x0, 0, NO_PAD_CTRL)
137#define MX50_PAD_PWM2__ANY_PU_RST IOMUX_PAD(0x308, 0x5C, 7, 0x0, 0, NO_PAD_CTRL)
138
139#define MX50_PAD_OWIRE__OWIRE IOMUX_PAD(0x30C, 0x60, 0, 0x0, 0, MX50_OWIRE_PAD_CTRL)
140#define MX50_PAD_OWIRE__GPIO_6_26 IOMUX_PAD(0x30C, 0x60, 1, 0x0, 0, NO_PAD_CTRL)
141#define MX50_PAD_OWIRE__USBH1_OC IOMUX_PAD(0x30C, 0x60, 2, 0x0, 0, MX50_USB_PAD_CTRL)
142#define MX50_PAD_OWIRE__SSI_EXT1_CLK IOMUX_PAD(0x30C, 0x60, 3, 0x0, 0, NO_PAD_CTRL)
143#define MX50_PAD_OWIRE__EPDC_PWRIRQ IOMUX_PAD(0x30C, 0x60, 4, 0x0, 0, NO_PAD_CTRL)
144#define MX50_PAD_OWIRE__GPT_CMPOUT3 IOMUX_PAD(0x30C, 0x60, 5, 0x0, 0, NO_PAD_CTRL)
145
146#define MX50_PAD_EPITO__EPITO IOMUX_PAD(0x310, 0x64, 0, 0x0, 0, NO_PAD_CTRL)
147#define MX50_PAD_EPITO__GPIO_6_27 IOMUX_PAD(0x310, 0x64, 1, 0x0, 0, NO_PAD_CTRL)
148#define MX50_PAD_EPITO__USBH1_PWR IOMUX_PAD(0x310, 0x64, 2, 0x0, 0, \
149 PAD_CTL_PKE | PAD_CTL_DSE_HIGH)
150#define MX50_PAD_EPITO__SSI_EXT2_CLK IOMUX_PAD(0x310, 0x64, 3, 0x0, 0, NO_PAD_CTRL)
151#define MX50_PAD_EPITO__TOG_EN IOMUX_PAD(0x310, 0x64, 4, 0x0, 0, NO_PAD_CTRL)
152#define MX50_PAD_EPITO__GPT_CLKIN IOMUX_PAD(0x310, 0x64, 5, 0x0, 0, NO_PAD_CTRL)
153
154#define MX50_PAD_WDOG__WDOG IOMUX_PAD(0x314, 0x68, 0, 0x0, 0, NO_PAD_CTRL)
155#define MX50_PAD_WDOG__GPIO_6_28 IOMUX_PAD(0x314, 0x68, 1, 0x0, 0, NO_PAD_CTRL)
156#define MX50_PAD_WDOG__WDOG_RST IOMUX_PAD(0x314, 0x68, 2, 0x0, 0, NO_PAD_CTRL)
157#define MX50_PAD_WDOG__XTAL32K IOMUX_PAD(0x314, 0x68, 6, 0x0, 0, NO_PAD_CTRL)
158
159#define MX50_PAD_SSI_TXFS__SSI_TXFS IOMUX_PAD(0x318, 0x6C, 0, 0x0, 0, NO_PAD_CTRL)
160#define MX50_PAD_SSI_TXFS__GPIO_6_0 IOMUX_PAD(0x318, 0x6C, 1, 0x0, 0, NO_PAD_CTRL)
161
162#define MX50_PAD_SSI_TXC__SSI_TXC IOMUX_PAD(0x31C, 0x70, 0, 0x0, 0, NO_PAD_CTRL)
163#define MX50_PAD_SSI_TXC__GPIO_6_1 IOMUX_PAD(0x31C, 0x70, 1, 0x0, 0, NO_PAD_CTRL)
164
165#define MX50_PAD_SSI_TXD__SSI_TXD IOMUX_PAD(0x320, 0x74, 0, 0x0, 0, NO_PAD_CTRL)
166#define MX50_PAD_SSI_TXD__GPIO_6_2 IOMUX_PAD(0x320, 0x74, 1, 0x0, 0, NO_PAD_CTRL)
167#define MX50_PAD_SSI_TXD__CSPI_RDY IOMUX_PAD(0x320, 0x74, 4, 0x6e8, 0, NO_PAD_CTRL)
168
169#define MX50_PAD_SSI_RXD__SSI_RXD IOMUX_PAD(0x324, 0x78, 0, 0x0, 0, NO_PAD_CTRL)
170#define MX50_PAD_SSI_RXD__GPIO_6_3 IOMUX_PAD(0x324, 0x78, 1, 0x0, 0, NO_PAD_CTRL)
171#define MX50_PAD_SSI_RXD__CSPI_SS3 IOMUX_PAD(0x324, 0x78, 4, 0x6f4, 0, MX50_CSPI_SS_PAD)
172
173#define MX50_PAD_SSI_RXFS__AUD3_RXFS IOMUX_PAD(0x328, 0x7C, 0, 0x0, 0, NO_PAD_CTRL)
174#define MX50_PAD_SSI_RXFS__GPIO_6_4 IOMUX_PAD(0x328, 0x7C, 1, 0x0, 0, NO_PAD_CTRL)
175#define MX50_PAD_SSI_RXFS__UART5_TXD IOMUX_PAD(0x328, 0x7C, 2, 0x0, 0, MX50_UART_PAD_CTRL)
176#define MX50_PAD_SSI_RXFS__WEIM_D6 IOMUX_PAD(0x328, 0x7C, 3, 0x804, 0, NO_PAD_CTRL)
177#define MX50_PAD_SSI_RXFS__CSPI_SS2 IOMUX_PAD(0x328, 0x7C, 4, 0x6f0, 0, MX50_CSPI_SS_PAD)
178#define MX50_PAD_SSI_RXFS__FEC_COL IOMUX_PAD(0x328, 0x7C, 5, 0x770, 0, PAD_CTL_DSE_HIGH)
179#define MX50_PAD_SSI_RXFS__FEC_MDC IOMUX_PAD(0x328, 0x7C, 6, 0x0, 0, PAD_CTL_DSE_HIGH)
180
181#define MX50_PAD_SSI_RXC__AUD3_RXC IOMUX_PAD(0x32C, 0x80, 0, 0x0, 0, NO_PAD_CTRL)
182#define MX50_PAD_SSI_RXC__GPIO_6_5 IOMUX_PAD(0x32C, 0x80, 1, 0x0, 0, NO_PAD_CTRL)
183#define MX50_PAD_SSI_RXC__UART5_RXD IOMUX_PAD(0x32C, 0x80, 2, 0x7e4, 1, MX50_UART_PAD_CTRL)
184#define MX50_PAD_SSI_RXC__WEIM_D7 IOMUX_PAD(0x32C, 0x80, 3, 0x808, 0, NO_PAD_CTRL)
185#define MX50_PAD_SSI_RXC__CSPI_SS1 IOMUX_PAD(0x32C, 0x80, 4, 0x6ec, 0, MX50_CSPI_SS_PAD)
186#define MX50_PAD_SSI_RXC__FEC_RX_CLK IOMUX_PAD(0x32C, 0x80, 5, 0x780, 0, NO_PAD_CTRL)
187#define MX50_PAD_SSI_RXC__FEC_MDIO IOMUX_PAD(0x32C, 0x80, 6, 0x774, 1, MX50_FEC_PAD_CTRL)
188
189#define MX50_PAD_UART1_TXD__UART1_TXD IOMUX_PAD(0x330, 0x84, 0, 0x0, 0, MX50_UART_PAD_CTRL)
190#define MX50_PAD_UART1_TXD__GPIO_6_6 IOMUX_PAD(0x330, 0x84, 1, 0x0, 0, NO_PAD_CTRL)
191
192#define MX50_PAD_UART1_RXD__UART1_RXD IOMUX_PAD(0x334, 0x88, 0, 0x7c4, 1, MX50_UART_PAD_CTRL)
193#define MX50_PAD_UART1_RXD__GPIO_6_7 IOMUX_PAD(0x334, 0x88, 1, 0x0, 0, NO_PAD_CTRL)
194
195#define MX50_PAD_UART1_CTS__UART1_CTS IOMUX_PAD(0x338, 0x8C, 0, 0x0, 0, MX50_UART_PAD_CTRL)
196#define MX50_PAD_UART1_CTS__GPIO_6_8 IOMUX_PAD(0x338, 0x8C, 1, 0x0, 0, NO_PAD_CTRL)
197#define MX50_PAD_UART1_CTS__UART5_TXD IOMUX_PAD(0x338, 0x8C, 2, 0x0, 0, MX50_UART_PAD_CTRL)
198#define MX50_PAD_UART1_CTS__SD4_D4 IOMUX_PAD(0x338, 0x8C, 4, 0x760, 0, MX50_SD_PAD_CTRL)
199#define MX50_PAD_UART1_CTS__SD4_CMD IOMUX_PAD(0x338, 0x8C, 5, 0x74c, 0, MX50_SD_PAD_CTRL)
200
201#define MX50_PAD_UART1_RTS__UART1_RTS IOMUX_PAD(0x33C, 0x90, 0, 0x7c0, 1, MX50_UART_PAD_CTRL)
202#define MX50_PAD_UART1_RTS__GPIO_6_9 IOMUX_PAD(0x33C, 0x90, 1, 0x0, 0, NO_PAD_CTRL)
203#define MX50_PAD_UART1_RTS__UART5_RXD IOMUX_PAD(0x33C, 0x90, 2, 0x7e4, 3, MX50_UART_PAD_CTRL)
204#define MX50_PAD_UART1_RTS__SD4_D5 IOMUX_PAD(0x33C, 0x90, 4, 0x764, 0, MX50_SD_PAD_CTRL)
205#define MX50_PAD_UART1_RTS__SD4_CLK IOMUX_PAD(0x33C, 0x90, 5, 0x748, 0, MX50_SD_PAD_CTRL)
206
207#define MX50_PAD_UART2_TXD__UART2_TXD IOMUX_PAD(0x340, 0x94, 0, 0x0, 0, MX50_UART_PAD_CTRL)
208#define MX50_PAD_UART2_TXD__GPIO_6_10 IOMUX_PAD(0x340, 0x94, 1, 0x0, 0, NO_PAD_CTRL)
209#define MX50_PAD_UART2_TXD__SD4_D6 IOMUX_PAD(0x340, 0x94, 4, 0x768, 0, MX50_SD_PAD_CTRL)
210#define MX50_PAD_UART2_TXD__SD4_D4 IOMUX_PAD(0x340, 0x94, 5, 0x760, 1, MX50_SD_PAD_CTRL)
211
212#define MX50_PAD_UART2_RXD__UART2_RXD IOMUX_PAD(0x344, 0x98, 0, 0x7cc, 3, MX50_UART_PAD_CTRL)
213#define MX50_PAD_UART2_RXD__GPIO_6_11 IOMUX_PAD(0x344, 0x98, 1, 0x0, 0, NO_PAD_CTRL)
214#define MX50_PAD_UART2_RXD__SD4_D7 IOMUX_PAD(0x344, 0x98, 4, 0x76c, 0, MX50_SD_PAD_CTRL)
215#define MX50_PAD_UART2_RXD__SD4_D5 IOMUX_PAD(0x344, 0x98, 5, 0x764, 1, MX50_SD_PAD_CTRL)
216
217#define MX50_PAD_UART2_CTS__UART2_CTS IOMUX_PAD(0x348, 0x9C, 0, 0x0, 0, MX50_UART_PAD_CTRL)
218#define MX50_PAD_UART2_CTS__GPIO_6_12 IOMUX_PAD(0x348, 0x9C, 1, 0x0, 0, NO_PAD_CTRL)
219#define MX50_PAD_UART2_CTS__SD4_CMD IOMUX_PAD(0x348, 0x9C, 4, 0x74c, 1, MX50_SD_PAD_CTRL)
220#define MX50_PAD_UART2_CTS__SD4_D6 IOMUX_PAD(0x348, 0x9C, 5, 0x768, 1, MX50_SD_PAD_CTRL)
221
222#define MX50_PAD_UART2_RTS__UART2_RTS IOMUX_PAD(0x34C, 0xA0, 0, 0x7c8, 3, MX50_UART_PAD_CTRL)
223#define MX50_PAD_UART2_RTS__GPIO_6_13 IOMUX_PAD(0x34C, 0xA0, 1, 0x0, 0, NO_PAD_CTRL)
224#define MX50_PAD_UART2_RTS__SD4_CLK IOMUX_PAD(0x34C, 0xA0, 4, 0x748, 1, MX50_SD_PAD_CTRL)
225#define MX50_PAD_UART2_RTS__SD4_D7 IOMUX_PAD(0x34C, 0xA0, 5, 0x76c, 1, MX50_SD_PAD_CTRL)
226
227#define MX50_PAD_UART3_TXD__UART3_TXD IOMUX_PAD(0x350, 0xA4, 0, 0x0, 0, MX50_UART_PAD_CTRL)
228#define MX50_PAD_UART3_TXD__GPIO_6_14 IOMUX_PAD(0x350, 0xA4, 1, 0x0, 0, NO_PAD_CTRL)
229#define MX50_PAD_UART3_TXD__SD1_D4 IOMUX_PAD(0x350, 0xA4, 3, 0x0, 0, MX50_SD_PAD_CTRL)
230#define MX50_PAD_UART3_TXD__SD4_D0 IOMUX_PAD(0x350, 0xA4, 4, 0x750, 0, MX50_SD_PAD_CTRL)
231#define MX50_PAD_UART3_TXD__SD2_WP IOMUX_PAD(0x350, 0xA4, 5, 0x744, 0, MX50_SD_PAD_CTRL)
232#define MX50_PAD_UART3_TXD__WEIM_D12 IOMUX_PAD(0x350, 0xA4, 6, 0x81c, 0, NO_PAD_CTRL)
233
234#define MX50_PAD_UART3_RXD__UART3_RXD IOMUX_PAD(0x354, 0xA8, 0, 0x7d4, 1, MX50_UART_PAD_CTRL)
235#define MX50_PAD_UART3_RXD__GPIO_6_15 IOMUX_PAD(0x354, 0xA8, 1, 0x0, 0, NO_PAD_CTRL)
236#define MX50_PAD_UART3_RXD__SD1_D5 IOMUX_PAD(0x354, 0xA8, 3, 0x0, 0, MX50_SD_PAD_CTRL)
237#define MX50_PAD_UART3_RXD__SD4_D1 IOMUX_PAD(0x354, 0xA8, 4, 0x754, 0, MX50_SD_PAD_CTRL)
238#define MX50_PAD_UART3_RXD__SD2_CD IOMUX_PAD(0x354, 0xA8, 5, 0x740, 0, MX50_SD_PAD_CTRL)
239#define MX50_PAD_UART3_RXD__WEIM_D13 IOMUX_PAD(0x354, 0xA8, 6, 0x820, 0, NO_PAD_CTRL)
240
241#define MX50_PAD_UART4_TXD__UART4_TXD IOMUX_PAD(0x358, 0xAC, 0, 0x0, 0, MX50_UART_PAD_CTRL)
242#define MX50_PAD_UART4_TXD__GPIO_6_16 IOMUX_PAD(0x358, 0xAC, 1, 0x0, 0, NO_PAD_CTRL)
243#define MX50_PAD_UART4_TXD__UART3_CTS IOMUX_PAD(0x358, 0xAC, 2, 0x0, 0, MX50_UART_PAD_CTRL)
244#define MX50_PAD_UART4_TXD__SD1_D6 IOMUX_PAD(0x358, 0xAC, 3, 0x0, 0, MX50_SD_PAD_CTRL)
245#define MX50_PAD_UART4_TXD__SD4_D2 IOMUX_PAD(0x358, 0xAC, 4, 0x758, 0, MX50_SD_PAD_CTRL)
246#define MX50_PAD_UART4_TXD__SD2_LCTL IOMUX_PAD(0x358, 0xAC, 5, 0x0, 0, MX50_SD_PAD_CTRL)
247#define MX50_PAD_UART4_TXD__WEIM_D14 IOMUX_PAD(0x358, 0xAC, 6, 0x824, 0, NO_PAD_CTRL)
248
249#define MX50_PAD_UART4_RXD__UART4_RXD IOMUX_PAD(0x35C, 0xB0, 0, 0x7dc, 1, MX50_UART_PAD_CTRL)
250#define MX50_PAD_UART4_RXD__GPIO_6_17 IOMUX_PAD(0x35C, 0xB0, 1, 0x0, 0, NO_PAD_CTRL)
251#define MX50_PAD_UART4_RXD__UART3_RTS IOMUX_PAD(0x35C, 0xB0, 2, 0x7d0, 1, MX50_UART_PAD_CTRL)
252#define MX50_PAD_UART4_RXD__SD1_D7 IOMUX_PAD(0x35C, 0xB0, 3, 0x0, 0, MX50_SD_PAD_CTRL)
253#define MX50_PAD_UART4_RXD__SD4_D3 IOMUX_PAD(0x35C, 0xB0, 4, 0x75c, 0, MX50_SD_PAD_CTRL)
254#define MX50_PAD_UART4_RXD__SD1_LCTL IOMUX_PAD(0x35C, 0xB0, 5, 0x0, 0, MX50_SD_PAD_CTRL)
255#define MX50_PAD_UART4_RXD__WEIM_D15 IOMUX_PAD(0x35C, 0xB0, 6, 0x828, 0, NO_PAD_CTRL)
256
257#define MX50_PAD_CSPI_SCLK__CSPI_SCLK IOMUX_PAD(0x360, 0xB4, 0, 0x0, 0, NO_PAD_CTRL)
258#define MX50_PAD_CSPI_SCLK__GPIO_4_8 IOMUX_PAD(0x360, 0xB4, 1, 0x0, 0, NO_PAD_CTRL)
259
260#define MX50_PAD_CSPI_MOSI__CSPI_MOSI IOMUX_PAD(0x364, 0xB8, 0, 0x0, 0, NO_PAD_CTRL)
261#define MX50_PAD_CSPI_MOSI__GPIO_4_9 IOMUX_PAD(0x364, 0xB8, 1, 0x0, 0, NO_PAD_CTRL)
262
263#define MX50_PAD_CSPI_MISO__CSPI_MISO IOMUX_PAD(0x368, 0xBC, 0, 0x0, 0, NO_PAD_CTRL)
264#define MX50_PAD_CSPI_MISO__GPIO_4_10 IOMUX_PAD(0x368, 0xBC, 1, 0x0, 0, NO_PAD_CTRL)
265
266#define MX50_PAD_CSPI_SS0__CSPI_SS0 IOMUX_PAD(0x36C, 0xC0, 0, 0x0, 0, MX50_CSPI_SS_PAD)
267#define MX50_PAD_CSPI_SS0__GPIO_4_11 IOMUX_PAD(0x36C, 0xC0, 1, 0x0, 0, NO_PAD_CTRL)
268
269#define MX50_PAD_ECSPI1_SCLK__ECSPI1_SCLK IOMUX_PAD(0x370, 0xC4, 0, 0x0, 0, NO_PAD_CTRL)
270#define MX50_PAD_ECSPI1_SCLK__GPIO_4_12 IOMUX_PAD(0x370, 0xC4, 1, 0x0, 0, NO_PAD_CTRL)
271#define MX50_PAD_ECSPI1_SCLK__CSPI_RDY IOMUX_PAD(0x370, 0xC4, 2, 0x6e8, 1, NO_PAD_CTRL)
272#define MX50_PAD_ECSPI1_SCLK__ECSPI2_RDY IOMUX_PAD(0x370, 0xC4, 3, 0x0, 0, NO_PAD_CTRL)
273#define MX50_PAD_ECSPI1_SCLK__UART3_RTS IOMUX_PAD(0x370, 0xC4, 4, 0x7d0, 2, MX50_UART_PAD_CTRL)
274#define MX50_PAD_ECSPI1_SCLK__EPDC_SDCE6 IOMUX_PAD(0x370, 0xC4, 5, 0x0, 0, NO_PAD_CTRL)
275#define MX50_PAD_ECSPI1_SCLK__WEIM_D8 IOMUX_PAD(0x370, 0xC4, 7, 0x80c, 0, NO_PAD_CTRL)
276
277#define MX50_PAD_ECSPI1_MOSI__ECSPI1_MOSI IOMUX_PAD(0x374, 0xC8, 0, 0x0, 0, NO_PAD_CTRL)
278#define MX50_PAD_ECSPI1_MOSI__GPIO_4_13 IOMUX_PAD(0x374, 0xC8, 1, 0x0, 0, NO_PAD_CTRL)
279#define MX50_PAD_ECSPI1_MOSI__CSPI_SS1 IOMUX_PAD(0x374, 0xC8, 2, 0x6ec, 1, MX50_CSPI_SS_PAD)
280#define MX50_PAD_ECSPI1_MOSI__ECSPI2_SS1 IOMUX_PAD(0x374, 0xC8, 3, 0x0, 0, MX50_CSPI_SS_PAD)
281#define MX50_PAD_ECSPI1_MOSI__UART3_CTS IOMUX_PAD(0x374, 0xC8, 4, 0x0, 0, MX50_UART_PAD_CTRL)
282#define MX50_PAD_ECSPI1_MOSI__EPDC_SDCE7 IOMUX_PAD(0x374, 0xC8, 5, 0x0, 0, NO_PAD_CTRL)
283#define MX50_PAD_ECSPI1_MOSI__WEIM_D9 IOMUX_PAD(0x374, 0xC8, 7, 0x810, 0, NO_PAD_CTRL)
284
285#define MX50_PAD_ECSPI1_MISO__ECSPI1_MISO IOMUX_PAD(0x378, 0xCC, 0, 0x0, 0, NO_PAD_CTRL)
286#define MX50_PAD_ECSPI1_MISO__GPIO_4_14 IOMUX_PAD(0x378, 0xCC, 1, 0x0, 0, NO_PAD_CTRL)
287#define MX50_PAD_ECSPI1_MISO__CSPI_SS2 IOMUX_PAD(0x378, 0xCC, 2, 0x6f0, 1, MX50_CSPI_SS_PAD)
288#define MX50_PAD_ECSPI1_MISO__ECSPI2_SS2 IOMUX_PAD(0x378, 0xCC, 3, 0x0, 0, MX50_CSPI_SS_PAD)
289#define MX50_PAD_ECSPI1_MISO__UART4_RTS IOMUX_PAD(0x378, 0xCC, 4, 0x7d8, 0, MX50_UART_PAD_CTRL)
290#define MX50_PAD_ECSPI1_MISO__EPDC_SDCE8 IOMUX_PAD(0x378, 0xCC, 5, 0x0, 0, NO_PAD_CTRL)
291#define MX50_PAD_ECSPI1_MISO__WEIM_D10 IOMUX_PAD(0x378, 0xCC, 7, 0x814, 0, NO_PAD_CTRL)
292
293#define MX50_PAD_ECSPI1_SS0__ECSPI1_SS0 IOMUX_PAD(0x37C, 0xD0, 0, 0x0, 0, MX50_CSPI_SS_PAD)
294#define MX50_PAD_ECSPI1_SS0__GPIO_4_15 IOMUX_PAD(0x37C, 0xD0, 1, 0x0, 0, PAD_CTL_PUS_100K_UP)
295#define MX50_PAD_ECSPI1_SS0__CSPI_SS3 IOMUX_PAD(0x37C, 0xD0, 2, 0x6f4, 1, MX50_CSPI_SS_PAD)
296#define MX50_PAD_ECSPI1_SS0__ECSPI2_SS3 IOMUX_PAD(0x37C, 0xD0, 3, 0x0, 0, MX50_CSPI_SS_PAD)
297#define MX50_PAD_ECSPI1_SS0__UART4_CTS IOMUX_PAD(0x37C, 0xD0, 4, 0x0, 0, MX50_UART_PAD_CTRL)
298#define MX50_PAD_ECSPI1_SS0__EPDC_SDCE9 IOMUX_PAD(0x37C, 0xD0, 5, 0x0, 0, NO_PAD_CTRL)
299#define MX50_PAD_ECSPI1_SS0__WEIM_D11 IOMUX_PAD(0x37C, 0xD0, 7, 0x818, 0, NO_PAD_CTRL)
300
301#define MX50_PAD_ECSPI2_SCLK__ECSPI2_SCLK IOMUX_PAD(0x380, 0xD4, 0, 0x0, 0, NO_PAD_CTRL)
302#define MX50_PAD_ECSPI2_SCLK__GPIO_4_16 IOMUX_PAD(0x380, 0xD4, 1, 0x0, 0, NO_PAD_CTRL)
303#define MX50_PAD_ECSPI2_SCLK__ELCDIF_WR IOMUX_PAD(0x380, 0xD4, 2, 0x0, 0, NO_PAD_CTRL)
304#define MX50_PAD_ECSPI2_SCLK__ECSPI1_RDY IOMUX_PAD(0x380, 0xD4, 3, 0x0, 0, NO_PAD_CTRL)
305#define MX50_PAD_ECSPI2_SCLK__UART5_RTS IOMUX_PAD(0x380, 0xD4, 4, 0x7e0, 0, MX50_UART_PAD_CTRL)
306#define MX50_PAD_ECSPI2_SCLK__ELCDIF_DOTCLK IOMUX_PAD(0x380, 0xD4, 5, 0x0, 0, NO_PAD_CTRL)
307#define MX50_PAD_ECSPI2_SCLK__NANDF_CEN4 IOMUX_PAD(0x380, 0xD4, 6, 0x0, 0, NO_PAD_CTRL)
308#define MX50_PAD_ECSPI2_SCLK__WEIM_D8 IOMUX_PAD(0x380, 0xD4, 7, 0x80c, 1, NO_PAD_CTRL)
309
310#define MX50_PAD_ECSPI2_MOSI__ECSPI2_MOSI IOMUX_PAD(0x384, 0xD8, 0, 0x0, 0, NO_PAD_CTRL)
311#define MX50_PAD_ECSPI2_MOSI__GPIO_4_17 IOMUX_PAD(0x384, 0xD8, 1, 0x0, 0, NO_PAD_CTRL)
312#define MX50_PAD_ECSPI2_MOSI__ELCDIF_RD IOMUX_PAD(0x384, 0xD8, 2, 0x0, 0, NO_PAD_CTRL)
313#define MX50_PAD_ECSPI2_MOSI__ECSPI1_SS1 IOMUX_PAD(0x384, 0xD8, 3, 0x0, 0, MX50_CSPI_SS_PAD)
314#define MX50_PAD_ECSPI2_MOSI__UART5_CTS IOMUX_PAD(0x384, 0xD8, 4, 0x0, 0, MX50_UART_PAD_CTRL)
315#define MX50_PAD_ECSPI2_MOSI__ELCDIF_EN IOMUX_PAD(0x384, 0xD8, 5, 0x0, 0, NO_PAD_CTRL)
316#define MX50_PAD_ECSPI2_MOSI__NANDF_CEN5 IOMUX_PAD(0x384, 0xD8, 6, 0x0, 0, NO_PAD_CTRL)
317#define MX50_PAD_ECSPI2_MOSI__WEIM_D9 IOMUX_PAD(0x384, 0xD8, 7, 0x810, 1, NO_PAD_CTRL)
318
319#define MX50_PAD_ECSPI2_MISO__ECSPI2_MISO IOMUX_PAD(0x388, 0xDC, 0, 0x0, 0, NO_PAD_CTRL)
320#define MX50_PAD_ECSPI2_MISO__GPIO_4_18 IOMUX_PAD(0x388, 0xDC, 1, 0x0, 0, PAD_CTL_PUS_100K_UP)
321#define MX50_PAD_ECSPI2_MISO__ELCDIF_RS IOMUX_PAD(0x388, 0xDC, 2, 0x0, 0, NO_PAD_CTRL)
322#define MX50_PAD_ECSPI2_MISO__ECSPI1_SS2 IOMUX_PAD(0x388, 0xDC, 3, 0x0, 0, MX50_CSPI_SS_PAD)
323#define MX50_PAD_ECSPI2_MISO__UART5_TXD IOMUX_PAD(0x388, 0xDC, 4, 0x0, 0, MX50_UART_PAD_CTRL)
324#define MX50_PAD_ECSPI2_MISO__ELCDIF_VSYNC IOMUX_PAD(0x388, 0xDC, 5, 0x73c, 0, NO_PAD_CTRL)
325#define MX50_PAD_ECSPI2_MISO__NANDF_CEN6 IOMUX_PAD(0x388, 0xDC, 6, 0x0, 0, NO_PAD_CTRL)
326#define MX50_PAD_ECSPI2_MISO__WEIM_D10 IOMUX_PAD(0x388, 0xDC, 7, 0x814, 1, NO_PAD_CTRL)
327
328#define MX50_PAD_ECSPI2_SS0__ECSPI2_SS0 IOMUX_PAD(0x38C, 0xE0, 0, 0x0, 0, MX50_CSPI_SS_PAD)
329#define MX50_PAD_ECSPI2_SS0__GPIO_4_19 IOMUX_PAD(0x38C, 0xE0, 1, 0x0, 0, NO_PAD_CTRL)
330#define MX50_PAD_ECSPI2_SS0__ELCDIF_CS IOMUX_PAD(0x38C, 0xE0, 2, 0x0, 0, NO_PAD_CTRL)
331#define MX50_PAD_ECSPI2_SS0__ECSPI1_SS3 IOMUX_PAD(0x38C, 0xE0, 3, 0x0, 0, MX50_CSPI_SS_PAD)
332#define MX50_PAD_ECSPI2_SS0__UART5_RXD IOMUX_PAD(0x38C, 0xE0, 4, 0x7e4, 5, MX50_UART_PAD_CTRL)
333#define MX50_PAD_ECSPI2_SS0__ELCDIF_HSYNC IOMUX_PAD(0x38C, 0xE0, 5, 0x6f8, 0, NO_PAD_CTRL)
334#define MX50_PAD_ECSPI2_SS0__NANDF_CEN7 IOMUX_PAD(0x38C, 0xE0, 6, 0x0, 0, NO_PAD_CTRL)
335#define MX50_PAD_ECSPI2_SS0__WEIM_D11 IOMUX_PAD(0x38C, 0xE0, 7, 0x818, 1, NO_PAD_CTRL)
336
337#define MX50_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x390, 0xE4, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)
338#define MX50_PAD_SD1_CLK__GPIO_5_0 IOMUX_PAD(0x390, 0xE4, 1, 0x0, 0, NO_PAD_CTRL)
339#define MX50_PAD_SD1_CLK__CLKO IOMUX_PAD(0x390, 0xE4, 7, 0x0, 0, NO_PAD_CTRL)
340
341#define MX50_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x394, 0xE8, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)
342#define MX50_PAD_SD1_CMD__GPIO_5_1 IOMUX_PAD(0x394, 0xE8, 1, 0x0, 0, NO_PAD_CTRL)
343#define MX50_PAD_SD1_CMD__CLKO2 IOMUX_PAD(0x394, 0xE8, 7, 0x0, 0, NO_PAD_CTRL)
344
345#define MX50_PAD_SD1_D0__SD1_D0 IOMUX_PAD(0x398, 0xEC, 0, 0x0, 0, MX50_SD_PAD_CTRL)
346#define MX50_PAD_SD1_D0__GPIO_5_2 IOMUX_PAD(0x398, 0xEC, 1, 0x0, 0, NO_PAD_CTRL)
347#define MX50_PAD_SD1_D0__PLL1_BYP IOMUX_PAD(0x398, 0xEC, 7, 0x6dc, 0, NO_PAD_CTRL)
348
349#define MX50_PAD_SD1_D1__SD1_D1 IOMUX_PAD(0x39C, 0xF0, 0, 0x0, 0, MX50_SD_PAD_CTRL)
350#define MX50_PAD_SD1_D1__GPIO_5_3 IOMUX_PAD(0x39C, 0xF0, 1, 0x0, 0, NO_PAD_CTRL)
351#define MX50_PAD_SD1_D1__PLL2_BYP IOMUX_PAD(0x39C, 0xF0, 7, 0x6e0, 0, NO_PAD_CTRL)
352
353#define MX50_PAD_SD1_D2__SD1_D2 IOMUX_PAD(0x3A0, 0xF4, 0, 0x0, 0, MX50_SD_PAD_CTRL)
354#define MX50_PAD_SD1_D2__GPIO_5_4 IOMUX_PAD(0x3A0, 0xF4, 1, 0x0, 0, NO_PAD_CTRL)
355#define MX50_PAD_SD1_D2__PLL3_BYP IOMUX_PAD(0x3A0, 0xF4, 7, 0x6e4, 0, NO_PAD_CTRL)
356
357#define MX50_PAD_SD1_D3__SD1_D3 IOMUX_PAD(0x3A4, 0xF8, 0, 0x0, 0, MX50_SD_PAD_CTRL)
358#define MX50_PAD_SD1_D3__GPIO_5_5 IOMUX_PAD(0x3A4, 0xF8, 1, 0x0, 0, NO_PAD_CTRL)
359
360#define MX50_PAD_SD2_CLK__SD2_CLK IOMUX_PAD(0x3A8, 0xFC, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)
361#define MX50_PAD_SD2_CLK__GPIO_5_6 IOMUX_PAD(0x3A8, 0xFC, 1, 0x0, 0, NO_PAD_CTRL)
362#define MX50_PAD_SD2_CLK__MSHC_SCLK IOMUX_PAD(0x3A8, 0xFC, 2, 0x0, 0, MX50_SD_PAD_CTRL)
363
364#define MX50_PAD_SD2_CMD__SD2_CMD IOMUX_PAD(0x3AC, 0x100, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)
365#define MX50_PAD_SD2_CMD__GPIO_5_7 IOMUX_PAD(0x3AC, 0x100, 1, 0x0, 0, NO_PAD_CTRL)
366#define MX50_PAD_SD2_CMD__MSHC_BS IOMUX_PAD(0x3AC, 0x100, 2, 0x0, 0, MX50_SD_PAD_CTRL)
367
368#define MX50_PAD_SD2_D0__SD2_D0 IOMUX_PAD(0x3B0, 0x104, 0, 0x0, 0, MX50_SD_PAD_CTRL)
369#define MX50_PAD_SD2_D0__GPIO_5_8 IOMUX_PAD(0x3B0, 0x104, 1, 0x0, 0, NO_PAD_CTRL)
370#define MX50_PAD_SD2_D0__MSHC_D0 IOMUX_PAD(0x3B0, 0x104, 2, 0x0, 0, MX50_SD_PAD_CTRL)
371#define MX50_PAD_SD2_D0__KEY_COL4 IOMUX_PAD(0x3B0, 0x104, 3, 0x790, 0, NO_PAD_CTRL)
372
373#define MX50_PAD_SD2_D1__SD2_D1 IOMUX_PAD(0x3B4, 0x108, 0, 0x0, 0, MX50_SD_PAD_CTRL)
374#define MX50_PAD_SD2_D1__GPIO_5_9 IOMUX_PAD(0x3B4, 0x108, 1, 0x0, 0, NO_PAD_CTRL)
375#define MX50_PAD_SD2_D1__MSHC_D1 IOMUX_PAD(0x3B4, 0x108, 2, 0x0, 0, MX50_SD_PAD_CTRL)
376#define MX50_PAD_SD2_D1__KEY_ROW4 IOMUX_PAD(0x3B4, 0x108, 3, 0x7a0, 0, NO_PAD_CTRL)
377
378#define MX50_PAD_SD2_D2__SD2_D2 IOMUX_PAD(0x3B8, 0x10C, 0, 0x0, 0, MX50_SD_PAD_CTRL)
379#define MX50_PAD_SD2_D2__GPIO_5_10 IOMUX_PAD(0x3B8, 0x10C, 1, 0x0, 0, NO_PAD_CTRL)
380#define MX50_PAD_SD2_D2__MSHC_D2 IOMUX_PAD(0x3B8, 0x10C, 2, 0x0, 0, MX50_SD_PAD_CTRL)
381#define MX50_PAD_SD2_D2__KEY_COL5 IOMUX_PAD(0x3B8, 0x10C, 3, 0x794, 0, NO_PAD_CTRL)
382
383#define MX50_PAD_SD2_D3__SD2_D3 IOMUX_PAD(0x3BC, 0x110, 0, 0x0, 0, MX50_SD_PAD_CTRL)
384#define MX50_PAD_SD2_D3__GPIO_5_11 IOMUX_PAD(0x3BC, 0x110, 1, 0x0, 0, NO_PAD_CTRL)
385#define MX50_PAD_SD2_D3__MSHC_D3 IOMUX_PAD(0x3BC, 0x110, 2, 0x0, 0, MX50_SD_PAD_CTRL)
386#define MX50_PAD_SD2_D3__KEY_ROW5 IOMUX_PAD(0x3BC, 0x110, 3, 0x7a4, 0, NO_PAD_CTRL)
387
388#define MX50_PAD_SD2_D4__SD2_D4 IOMUX_PAD(0x3C0, 0x114, 0, 0x0, 0, MX50_SD_PAD_CTRL)
389#define MX50_PAD_SD2_D4__GPIO_5_12 IOMUX_PAD(0x3C0, 0x114, 1, 0x0, 0, NO_PAD_CTRL)
390#define MX50_PAD_SD2_D4__AUD4_RXFS IOMUX_PAD(0x3C0, 0x114, 2, 0x6d0, 0, NO_PAD_CTRL)
391#define MX50_PAD_SD2_D4__KEY_COL6 IOMUX_PAD(0x3C0, 0x114, 3, 0x798, 0, NO_PAD_CTRL)
392#define MX50_PAD_SD2_D4__WEIM_D0 IOMUX_PAD(0x3C0, 0x114, 4, 0x7ec, 0, NO_PAD_CTRL)
393#define MX50_PAD_SD2_D4__CCM_OUT0 IOMUX_PAD(0x3C0, 0x114, 7, 0x0, 0, NO_PAD_CTRL)
394
395#define MX50_PAD_SD2_D5__SD2_D5 IOMUX_PAD(0x3C4, 0x118, 0, 0x0, 0, MX50_SD_PAD_CTRL)
396#define MX50_PAD_SD2_D5__GPIO_5_13 IOMUX_PAD(0x3C4, 0x118, 1, 0x0, 0, NO_PAD_CTRL)
397#define MX50_PAD_SD2_D5__AUD4_RXC IOMUX_PAD(0x3C4, 0x118, 2, 0x6cc, 0, NO_PAD_CTRL)
398#define MX50_PAD_SD2_D5__KEY_ROW6 IOMUX_PAD(0x3C4, 0x118, 3, 0x7a8, 0, NO_PAD_CTRL)
399#define MX50_PAD_SD2_D5__WEIM_D1 IOMUX_PAD(0x3C4, 0x118, 4, 0x7f0, 0, NO_PAD_CTRL)
400#define MX50_PAD_SD2_D5__CCM_OUT1 IOMUX_PAD(0x3C4, 0x118, 7, 0x0, 0, NO_PAD_CTRL)
401
402#define MX50_PAD_SD2_D6__SD2_D6 IOMUX_PAD(0x3C8, 0x11C, 0, 0x0, 0, MX50_SD_PAD_CTRL)
403#define MX50_PAD_SD2_D6__GPIO_5_14 IOMUX_PAD(0x3C8, 0x11C, 1, 0x0, 0, NO_PAD_CTRL)
404#define MX50_PAD_SD2_D6__AUD4_RXD IOMUX_PAD(0x3C8, 0x11C, 2, 0x6c4, 0, NO_PAD_CTRL)
405#define MX50_PAD_SD2_D6__KEY_COL7 IOMUX_PAD(0x3C8, 0x11C, 3, 0x79c, 0, NO_PAD_CTRL)
406#define MX50_PAD_SD2_D6__WEIM_D2 IOMUX_PAD(0x3C8, 0x11C, 4, 0x7f4, 0, NO_PAD_CTRL)
407#define MX50_PAD_SD2_D6__CCM_OUT2 IOMUX_PAD(0x3C8, 0x11C, 7, 0x0, 0, NO_PAD_CTRL)
408
409#define MX50_PAD_SD2_D7__SD2_D7 IOMUX_PAD(0x3CC, 0x120, 0, 0x0, 0, MX50_SD_PAD_CTRL)
410#define MX50_PAD_SD2_D7__GPIO_5_15 IOMUX_PAD(0x3CC, 0x120, 1, 0x0, 0, NO_PAD_CTRL)
411#define MX50_PAD_SD2_D7__AUD4_TXFS IOMUX_PAD(0x3CC, 0x120, 2, 0x6d8, 0, NO_PAD_CTRL)
412#define MX50_PAD_SD2_D7__KEY_ROW7 IOMUX_PAD(0x3CC, 0x120, 3, 0x7ac, 0, NO_PAD_CTRL)
413#define MX50_PAD_SD2_D7__WEIM_D3 IOMUX_PAD(0x3CC, 0x120, 4, 0x7f8, 0, NO_PAD_CTRL)
414#define MX50_PAD_SD2_D7__CCM_STOP IOMUX_PAD(0x3CC, 0x120, 7, 0x0, 0, NO_PAD_CTRL)
415
416#define MX50_PAD_SD2_WP__SD2_WP IOMUX_PAD(0x3D0, 0x124, 0, 0x744, 1, MX50_SD_PAD_CTRL)
417#define MX50_PAD_SD2_WP__GPIO_5_16 IOMUX_PAD(0x3D0, 0x124, 1, 0x0, 0, NO_PAD_CTRL)
418#define MX50_PAD_SD2_WP__AUD4_TXD IOMUX_PAD(0x3D0, 0x124, 2, 0x6c8, 0, NO_PAD_CTRL)
419#define MX50_PAD_SD2_WP__WEIM_D4 IOMUX_PAD(0x3D0, 0x124, 4, 0x7fc, 0, NO_PAD_CTRL)
420#define MX50_PAD_SD2_WP__CCM_WAIT IOMUX_PAD(0x3D0, 0x124, 7, 0x0, 0, NO_PAD_CTRL)
421
422#define MX50_PAD_SD2_CD__SD2_CD IOMUX_PAD(0x3D4, 0x128, 0, 0x740, 1, MX50_SD_PAD_CTRL)
423#define MX50_PAD_SD2_CD__GPIO_5_17 IOMUX_PAD(0x3D4, 0x128, 1, 0x0, 0, NO_PAD_CTRL)
424#define MX50_PAD_SD2_CD__AUD4_TXC IOMUX_PAD(0x3D4, 0x128, 2, 0x6d4, 0, NO_PAD_CTRL)
425#define MX50_PAD_SD2_CD__WEIM_D5 IOMUX_PAD(0x3D4, 0x128, 4, 0x800, 0, NO_PAD_CTRL)
426#define MX50_PAD_SD2_CD__CCM_REF_EN IOMUX_PAD(0x3D4, 0x128, 7, 0x0, 0, NO_PAD_CTRL)
427
428#define MX50_PAD_PMIC_ON_REQ__PMIC_ON_REQ IOMUX_PAD(0x3D8, 0, 0, 0x0, 0, NO_PAD_CTRL)
429
430#define MX50_PAD_PMIC_STBY_REQ__PMIC_STBY_REQ IOMUX_PAD(0x3DC, 0, 0, 0x0, 0, NO_PAD_CTRL)
431
432#define MX50_PAD_PMIC_PORT_B__PMIC_PORT_B IOMUX_PAD(0x3E0, 0, 0, 0x0, 0, NO_PAD_CTRL)
433
434#define MX50_PAD_PMIC_BOOT_MODE1__PMIC_BOOT_MODE1 IOMUX_PAD(0x3E4, 0, 0, 0x0, 0, NO_PAD_CTRL)
435
436#define MX50_PAD_PMIC_RESET_IN_B__PMIC_RESET_IN_B IOMUX_PAD(0x3E8, 0, 0, 0x0, 0, NO_PAD_CTRL)
437
438#define MX50_PAD_PMIC_BOOT_MODE0__PMIC_BOOT_MODE0 IOMUX_PAD(0x3EC, 0, 0, 0x0, 0, NO_PAD_CTRL)
439
440#define MX50_PAD_PMIC_TEST_MODE__PMIC_TEST_MODE IOMUX_PAD(0x3F0, 0, 0, 0x0, 0, NO_PAD_CTRL)
441
442#define MX50_PAD_PMIC_JTAG_TMS__PMIC_JTAG_TMS IOMUX_PAD(0x3F4, 0, 0, 0x0, 0, NO_PAD_CTRL)
443
444#define MX50_PAD_PMIC_JTAG_MOD__PMIC_JTAG_MOD IOMUX_PAD(0x3F8, 0, 0, 0x0, 0, NO_PAD_CTRL)
445
446#define MX50_PAD_PMIC_JTAG_TRSTB__PMIC_JTAG_TRSTB IOMUX_PAD(0x3FC, 0, 0, 0x0, 0, NO_PAD_CTRL)
447
448#define MX50_PAD_PMIC_JTAG_TDI__PMIC_JTAG_TDI IOMUX_PAD(0x400, 0, 0, 0x0, 0, NO_PAD_CTRL)
449
450#define MX50_PAD_PMIC_JTAG_TCK__PMIC_JTAG_TCK IOMUX_PAD(0x404, 0, 0, 0x0, 0, NO_PAD_CTRL)
451
452#define MX50_PAD_PMIC_JTAG_TDO__PMIC_JTAG_TDO IOMUX_PAD(0x408, 0, 0, 0x0, 0, NO_PAD_CTRL)
453
454#define MX50_PAD_DISP_D0__DISP_D0 IOMUX_PAD(0x40C, 0x12C, 0, 0x6fc, 0, MX50_ELCDIF_PAD_CTRL)
455#define MX50_PAD_DISP_D0__GPIO_2_0 IOMUX_PAD(0x40C, 0x12C, 1, 0x0, 0, NO_PAD_CTRL)
456#define MX50_PAD_DISP_D0__FEC_TXCLK IOMUX_PAD(0x40C, 0x12C, 2, 0x78c, 0, PAD_CTL_HYS | PAD_CTL_PKE)
457
458#define MX50_PAD_DISP_D1__DISP_D1 IOMUX_PAD(0x410, 0x130, 0, 0x700, 0, MX50_ELCDIF_PAD_CTRL)
459#define MX50_PAD_DISP_D1__GPIO_2_1 IOMUX_PAD(0x410, 0x130, 1, 0x0, 0, NO_PAD_CTRL)
460#define MX50_PAD_DISP_D1__FEC_RX_ER IOMUX_PAD(0x410, 0x130, 2, 0x788, 0, PAD_CTL_HYS | PAD_CTL_PKE)
461#define MX50_PAD_DISP_D1__WEIM_A17 IOMUX_PAD(0x410, 0x130, 3, 0x0, 0, NO_PAD_CTRL)
462
463#define MX50_PAD_DISP_D2__DISP_D2 IOMUX_PAD(0x414, 0x134, 0, 0x704, 0, MX50_ELCDIF_PAD_CTRL)
464#define MX50_PAD_DISP_D2__GPIO_2_2 IOMUX_PAD(0x414, 0x134, 1, 0x0, 0, NO_PAD_CTRL)
465#define MX50_PAD_DISP_D2__FEC_RX_DV IOMUX_PAD(0x414, 0x134, 2, 0x784, 0, PAD_CTL_HYS | PAD_CTL_PKE)
466#define MX50_PAD_DISP_D2__WEIM_A18 IOMUX_PAD(0x414, 0x134, 3, 0x0, 0, NO_PAD_CTRL)
467
468#define MX50_PAD_DISP_D3__DISP_D3 IOMUX_PAD(0x418, 0x138, 0, 0x708, 0, MX50_ELCDIF_PAD_CTRL)
469#define MX50_PAD_DISP_D3__GPIO_2_3 IOMUX_PAD(0x418, 0x138, 1, 0x0, 0, NO_PAD_CTRL)
470#define MX50_PAD_DISP_D3__FEC_RXD1 IOMUX_PAD(0x418, 0x138, 2, 0x77C, 0, PAD_CTL_HYS | PAD_CTL_PKE)
471#define MX50_PAD_DISP_D3__WEIM_A19 IOMUX_PAD(0x418, 0x138, 3, 0x0, 0, NO_PAD_CTRL)
472#define MX50_PAD_DISP_D3__FEC_COL IOMUX_PAD(0x418, 0x138, 4, 0x770, 1, NO_PAD_CTRL)
473
474#define MX50_PAD_DISP_D4__DISP_D4 IOMUX_PAD(0x41C, 0x13C, 0, 0x70c, 0, MX50_ELCDIF_PAD_CTRL)
475#define MX50_PAD_DISP_D4__GPIO_2_4 IOMUX_PAD(0x41C, 0x13C, 1, 0x0, 0, NO_PAD_CTRL)
476#define MX50_PAD_DISP_D4__FEC_RXD0 IOMUX_PAD(0x41C, 0x13C, 2, 0x778, 0, PAD_CTL_HYS | PAD_CTL_PKE)
477#define MX50_PAD_DISP_D4__WEIM_A20 IOMUX_PAD(0x41C, 0x13C, 3, 0x0, 0, NO_PAD_CTRL)
478
479#define MX50_PAD_DISP_D5__DISP_D5 IOMUX_PAD(0x420, 0x140, 0, 0x710, 0, MX50_ELCDIF_PAD_CTRL)
480#define MX50_PAD_DISP_D5__GPIO_2_5 IOMUX_PAD(0x420, 0x140, 1, 0x0, 0, NO_PAD_CTRL)
481#define MX50_PAD_DISP_D5__FEC_TX_EN IOMUX_PAD(0x420, 0x140, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
482#define MX50_PAD_DISP_D5__WEIM_A21 IOMUX_PAD(0x420, 0x140, 3, 0x0, 0, NO_PAD_CTRL)
483
484#define MX50_PAD_DISP_D6__DISP_D6 IOMUX_PAD(0x424, 0x144, 0, 0x714, 0, MX50_ELCDIF_PAD_CTRL)
485#define MX50_PAD_DISP_D6__GPIO_2_6 IOMUX_PAD(0x424, 0x144, 1, 0x0, 0, NO_PAD_CTRL)
486#define MX50_PAD_DISP_D6__FEC_TXD1 IOMUX_PAD(0x424, 0x144, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
487#define MX50_PAD_DISP_D6__WEIM_A22 IOMUX_PAD(0x424, 0x144, 3, 0x0, 0, NO_PAD_CTRL)
488#define MX50_PAD_DISP_D6__FEC_RX_CLK IOMUX_PAD(0x424, 0x144, 4, 0x780, 1, NO_PAD_CTRL)
489
490#define MX50_PAD_DISP_D7__DISP_D7 IOMUX_PAD(0x428, 0x148, 0, 0x718, 0, MX50_ELCDIF_PAD_CTRL)
491#define MX50_PAD_DISP_D7__GPIO_2_7 IOMUX_PAD(0x428, 0x148, 1, 0x0, 0, NO_PAD_CTRL)
492#define MX50_PAD_DISP_D7__FEC_TXD0 IOMUX_PAD(0x428, 0x148, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
493#define MX50_PAD_DISP_D7__WEIM_A23 IOMUX_PAD(0x428, 0x148, 3, 0x0, 0, NO_PAD_CTRL)
494
495
496#define MX50_PAD_DISP_WR__ELCDIF_WR IOMUX_PAD(0x42C, 0x14C, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
497#define MX50_PAD_DISP_WR__GPIO_2_16 IOMUX_PAD(0x42C, 0x14C, 1, 0x0, 0, NO_PAD_CTRL)
498#define MX50_PAD_DISP_WR__ELCDIF_PIXCLK IOMUX_PAD(0x42C, 0x14C, 2, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
499#define MX50_PAD_DISP_WR__WEIM_A24 IOMUX_PAD(0x42C, 0x14C, 3, 0x0, 0, NO_PAD_CTRL)
500
501#define MX50_PAD_DISP_RD__ELCDIF_RD IOMUX_PAD(0x430, 0x150, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
502#define MX50_PAD_DISP_RD__GPIO_2_19 IOMUX_PAD(0x430, 0x150, 1, 0x0, 0, NO_PAD_CTRL)
503#define MX50_PAD_DISP_RD__ELCDIF_EN IOMUX_PAD(0x430, 0x150, 2, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
504#define MX50_PAD_DISP_RD__WEIM_A25 IOMUX_PAD(0x430, 0x150, 3, 0x0, 0, NO_PAD_CTRL)
505
506#define MX50_PAD_DISP_RS__ELCDIF_RS IOMUX_PAD(0x434, 0x154, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
507#define MX50_PAD_DISP_RS__GPIO_2_17 IOMUX_PAD(0x434, 0x154, 1, 0x0, 0, NO_PAD_CTRL)
508#define MX50_PAD_DISP_RS__ELCDIF_VSYNC IOMUX_PAD(0x434, 0x154, 2, 0x73c, 1, MX50_ELCDIF_PAD_CTRL)
509#define MX50_PAD_DISP_RS__WEIM_A26 IOMUX_PAD(0x434, 0x154, 3, 0x0, 0, NO_PAD_CTRL)
510
511#define MX50_PAD_DISP_CS__ELCDIF_CS IOMUX_PAD(0x438, 0x158, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
512#define MX50_PAD_DISP_CS__GPIO_2_21 IOMUX_PAD(0x438, 0x158, 1, 0x0, 0, NO_PAD_CTRL)
513#define MX50_PAD_DISP_CS__ELCDIF_HSYNC IOMUX_PAD(0x438, 0x158, 2, 0x6f8, 1, MX50_ELCDIF_PAD_CTRL)
514#define MX50_PAD_DISP_CS__WEIM_A27 IOMUX_PAD(0x438, 0x158, 3, 0x0, 0, NO_PAD_CTRL)
515#define MX50_PAD_DISP_CS__WEIM_CS3 IOMUX_PAD(0x438, 0x158, 4, 0x0, 0, NO_PAD_CTRL)
516
517#define MX50_PAD_DISP_BUSY__ELCDIF_HSYNC IOMUX_PAD(0x43C, 0x15C, 0, 0x6f8, 2, MX50_ELCDIF_PAD_CTRL)
518#define MX50_PAD_DISP_BUSY__GPIO_2_18 IOMUX_PAD(0x43C, 0x15C, 1, 0x0, 0, NO_PAD_CTRL)
519#define MX50_PAD_DISP_BUSY__WEIM_CS3 IOMUX_PAD(0x43C, 0x15C, 3, 0x0, 0, NO_PAD_CTRL)
520
521#define MX50_PAD_DISP_RESET__ELCDIF_RST IOMUX_PAD(0x440, 0x160, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
522#define MX50_PAD_DISP_RESET__GPIO_2_20 IOMUX_PAD(0x440, 0x160, 1, 0x0, 0, NO_PAD_CTRL)
523#define MX50_PAD_DISP_RESET__WEIM_CS3 IOMUX_PAD(0x440, 0x160, 4, 0x0, 0, NO_PAD_CTRL)
524
525#define MX50_PAD_SD3_CMD__SD3_CMD IOMUX_PAD(0x444, 0x164, 0, 0x0, 0, MX50_SD_PAD_CTRL)
526#define MX50_PAD_SD3_CMD__GPIO_5_18 IOMUX_PAD(0x444, 0x164, 1, 0x0, 0, NO_PAD_CTRL)
527#define MX50_PIN_SD3_CMD__NANDF_WRN IOMUX_PAD(0x444, 0x164, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
528#define MX50_PAD_SD3_CMD__SSP_CMD IOMUX_PAD(0x444, 0x164, 3, 0x0, 0, NO_PAD_CTRL)
529
530#define MX50_PAD_SD3_CLK__SD3_CLK IOMUX_PAD(0x448, 0x168, 0, 0x0, 0, MX50_SD_PAD_CTRL)
531#define MX50_PAD_SD3_CLK__GPIO_5_19 IOMUX_PAD(0x448, 0x168, 1, 0x0, 0, NO_PAD_CTRL)
532#define MX50_PIN_SD3_CLK__NANDF_RDN IOMUX_PAD(0x448, 0x168, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
533#define MX50_PAD_SD3_CLK__SSP_CLK IOMUX_PAD(0x448, 0x168, 3, 0x0, 0, NO_PAD_CTRL)
534
535#define MX50_PAD_SD3_D0__SD3_D0 IOMUX_PAD(0x44C, 0x16C, 0, 0x0, 0, MX50_SD_PAD_CTRL)
536#define MX50_PAD_SD3_D0__GPIO_5_20 IOMUX_PAD(0x44C, 0x16C, 1, 0x0, 0, NO_PAD_CTRL)
537#define MX50_PIN_SD3_D0__NANDF_D4 IOMUX_PAD(0x44C, 0x16C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
538#define MX50_PAD_SD3_D0__SSP_D0 IOMUX_PAD(0x44C, 0x16C, 3, 0x0, 0, NO_PAD_CTRL)
539#define MX50_PAD_SD3_D0__PLL1_BYP IOMUX_PAD(0x44C, 0x16C, 7, 0x6dc, 1, NO_PAD_CTRL)
540
541#define MX50_PAD_SD3_D1__SD3_D1 IOMUX_PAD(0x450, 0x170, 0, 0x0, 0, MX50_SD_PAD_CTRL)
542#define MX50_PAD_SD3_D1__GPIO_5_21 IOMUX_PAD(0x450, 0x170, 1, 0x0, 0, NO_PAD_CTRL)
543#define MX50_PIN_SD3_D1__NANDF_D5 IOMUX_PAD(0x450, 0x170, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
544#define MX50_PAD_SD3_D1__PLL2_BYP IOMUX_PAD(0x450, 0x170, 7, 0x6e0, 1, NO_PAD_CTRL)
545
546#define MX50_PAD_SD3_D2__SD3_D2 IOMUX_PAD(0x454, 0x174, 0, 0x0, 0, MX50_SD_PAD_CTRL)
547#define MX50_PAD_SD3_D2__GPIO_5_22 IOMUX_PAD(0x454, 0x174, 1, 0x0, 0, NO_PAD_CTRL)
548#define MX50_PIN_SD3_D2__NANDF_D6 IOMUX_PAD(0x454, 0x174, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
549#define MX50_PAD_SD3_D2__SSP_D2 IOMUX_PAD(0x454, 0x174, 3, 0x0, 0, NO_PAD_CTRL)
550#define MX50_PAD_SD3_D2__PLL3_BYP IOMUX_PAD(0x454, 0x174, 7, 0x6e4, 1, NO_PAD_CTRL)
551
552#define MX50_PAD_SD3_D3__SD3_D3 IOMUX_PAD(0x458, 0x178, 0, 0x0, 0, MX50_SD_PAD_CTRL)
553#define MX50_PAD_SD3_D3__GPIO_5_23 IOMUX_PAD(0x458, 0x178, 1, 0x0, 0, NO_PAD_CTRL)
554#define MX50_PIN_SD3_D3__NANDF_D7 IOMUX_PAD(0x458, 0x178, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
555#define MX50_PAD_SD3_D3__SSP_D3 IOMUX_PAD(0x458, 0x178, 3, 0x0, 0, NO_PAD_CTRL)
556
557#define MX50_PAD_SD3_D4__SD3_D4 IOMUX_PAD(0x45C, 0x17C, 0, 0x0, 0, MX50_SD_PAD_CTRL)
558#define MX50_PAD_SD3_D4__GPIO_5_24 IOMUX_PAD(0x45C, 0x17C, 1, 0x0, 0, NO_PAD_CTRL)
559#define MX50_PIN_SD3_D4__NANDF_D0 IOMUX_PAD(0x45C, 0x17C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
560#define MX50_PAD_SD3_D4__SSP_D4 IOMUX_PAD(0x45C, 0x17C, 1, 0x0, 0, NO_PAD_CTRL)
561
562#define MX50_PAD_SD3_D5__SD3_D5 IOMUX_PAD(0x460, 0x180, 0, 0x0, 0, MX50_SD_PAD_CTRL)
563#define MX50_PAD_SD3_D5__GPIO_5_25 IOMUX_PAD(0x460, 0x180, 1, 0x0, 0, NO_PAD_CTRL)
564#define MX50_PIN_SD3_D5__NANDF_D1 IOMUX_PAD(0x460, 0x180, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
565#define MX50_PAD_SD3_D5__SSP_D5 IOMUX_PAD(0x460, 0x180, 3, 0x0, 0, NO_PAD_CTRL)
566
567#define MX50_PAD_SD3_D6__SD3_D6 IOMUX_PAD(0x464, 0x184, 0, 0x0, 0, MX50_SD_PAD_CTRL)
568#define MX50_PAD_SD3_D6__GPIO_5_26 IOMUX_PAD(0x464, 0x184, 1, 0x0, 0, NO_PAD_CTRL)
569#define MX50_PIN_SD3_D6__NANDF_D2 IOMUX_PAD(0x464, 0x184, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
570#define MX50_PAD_SD3_D6__SSP_D6 IOMUX_PAD(0x464, 0x184, 3, 0x0, 0, NO_PAD_CTRL)
571
572#define MX50_PAD_SD3_D7__SD3_D7 IOMUX_PAD(0x468, 0x188, 0, 0x0, 0, MX50_SD_PAD_CTRL)
573#define MX50_PAD_SD3_D7__GPIO_5_27 IOMUX_PAD(0x468, 0x188, 1, 0x0, 0, NO_PAD_CTRL)
574#define MX50_PIN_SD3_D7__NANDF_D3 IOMUX_PAD(0x468, 0x188, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
575#define MX50_PAD_SD3_D7__SSP_D7 IOMUX_PAD(0x468, 0x188, 3, 0x0, 0, NO_PAD_CTRL)
576
577#define MX50_PAD_SD3_WP__SD3_WP IOMUX_PAD(0x46C, 0x18C, 0, 0x0, 0, MX50_SD_PAD_CTRL)
578#define MX50_PAD_SD3_WP__GPIO_5_28 IOMUX_PAD(0x46C, 0x18C, 1, 0x0, 0, NO_PAD_CTRL)
579#define MX50_PIN_SD3_WP__NANDF_RESETN IOMUX_PAD(0x46C, 0x18C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
580#define MX50_PAD_SD3_WP__SSP_CD IOMUX_PAD(0x46C, 0x18C, 3, 0x0, 0, NO_PAD_CTRL)
581#define MX50_PAD_SD3_WP__SD4_LCTL IOMUX_PAD(0x46C, 0x18C, 4, 0x0, 0, MX50_SD_PAD_CTRL)
582#define MX50_PAD_SD3_WP__WEIM_CS3 IOMUX_PAD(0x46C, 0x18C, 5, 0x0, 0, NO_PAD_CTRL)
583
584#define MX50_PAD_DISP_D8__DISP_D8 IOMUX_PAD(0x470, 0x190, 0, 0x71c, 0, MX50_ELCDIF_PAD_CTRL)
585#define MX50_PAD_DISP_D8__GPIO_2_8 IOMUX_PAD(0x470, 0x190, 1, 0x0, 0, NO_PAD_CTRL)
586#define MX50_PAD_DISP_D8__NANDF_CLE IOMUX_PAD(0x470, 0x190, 2, 0x0, 0, NO_PAD_CTRL)
587#define MX50_PAD_DISP_D8__SD1_LCTL IOMUX_PAD(0x470, 0x190, 3, 0x0, 0, MX50_SD_PAD_CTRL)
588#define MX50_PAD_DISP_D8__SD4_CMD IOMUX_PAD(0x470, 0x190, 4, 0x74c, 2, MX50_SD_PAD_CTRL)
589#define MX50_PAD_DISP_D8__KEY_COL4 IOMUX_PAD(0x470, 0x190, 5, 0x790, 1, NO_PAD_CTRL)
590#define MX50_PAD_DISP_D8__FEC_TX_CLK IOMUX_PAD(0x470, 0x190, 6, 0x78c, 1, NO_PAD_CTRL)
591
592#define MX50_PAD_DISP_D9__DISP_D9 IOMUX_PAD(0x474, 0x194, 0, 0x720, 0, MX50_ELCDIF_PAD_CTRL)
593#define MX50_PAD_DISP_D9__GPIO_2_9 IOMUX_PAD(0x474, 0x194, 1, 0x0, 0, NO_PAD_CTRL)
594#define MX50_PAD_DISP_D9__NANDF_ALE IOMUX_PAD(0x474, 0x194, 2, 0x0, 0, NO_PAD_CTRL)
595#define MX50_PAD_DISP_D9__SD2_LCTL IOMUX_PAD(0x474, 0x194, 3, 0x0, 0, MX50_SD_PAD_CTRL)
596#define MX50_PAD_DISP_D9__SD4_CLK IOMUX_PAD(0x474, 0x194, 4, 0x748, 2, MX50_SD_PAD_CTRL)
597#define MX50_PAD_DISP_D9__KEY_ROW4 IOMUX_PAD(0x474, 0x194, 5, 0x7a0, 1, NO_PAD_CTRL)
598#define MX50_PAD_DISP_D9__FEC_RX_ER IOMUX_PAD(0x474, 0x194, 6, 0x788, 1, NO_PAD_CTRL)
599
600#define MX50_PAD_DISP_D10__DISP_D10 IOMUX_PAD(0x478, 0x198, 0, 0x724, 0, MX50_ELCDIF_PAD_CTRL)
601#define MX50_PAD_DISP_D10__GPIO_2_10 IOMUX_PAD(0x478, 0x198, 1, 0x0, 0, NO_PAD_CTRL)
602#define MX50_PAD_DISP_D10__NANDF_CEN0 IOMUX_PAD(0x478, 0x198, 2, 0x0, 0, NO_PAD_CTRL)
603#define MX50_PAD_DISP_D10__SD3_LCTL IOMUX_PAD(0x478, 0x198, 3, 0x0, 0, MX50_SD_PAD_CTRL)
604#define MX50_PAD_DISP_D10__SD4_D0 IOMUX_PAD(0x478, 0x198, 4, 0x750, 1, MX50_SD_PAD_CTRL)
605#define MX50_PAD_DISP_D10__KEY_COL5 IOMUX_PAD(0x478, 0x198, 5, 0x794, 1, NO_PAD_CTRL)
606#define MX50_PAD_DISP_D10__FEC_RX_DV IOMUX_PAD(0x478, 0x198, 6, 0x784, 1, NO_PAD_CTRL)
607
608#define MX50_PAD_DISP_D11__DISP_D11 IOMUX_PAD(0x47C, 0x19C, 0, 0x728, 0, MX50_ELCDIF_PAD_CTRL)
609#define MX50_PAD_DISP_D11__GPIO_2_11 IOMUX_PAD(0x47C, 0x19C, 1, 0x0, 0, NO_PAD_CTRL)
610#define MX50_PAD_DISP_D11__NANDF_CEN1 IOMUX_PAD(0x47C, 0x19C, 2, 0x0, 0, NO_PAD_CTRL)
611#define MX50_PAD_DISP_D11__SD4_D1 IOMUX_PAD(0x47C, 0x19C, 4, 0x754, 1, MX50_SD_PAD_CTRL)
612#define MX50_PAD_DISP_D11__KEY_ROW5 IOMUX_PAD(0x47C, 0x19C, 5, 0x7a4, 1, NO_PAD_CTRL)
613#define MX50_PAD_DISP_D11__FEC_RDAT1 IOMUX_PAD(0x47C, 0x19C, 6, 0x77c, 1, NO_PAD_CTRL)
614
615#define MX50_PAD_DISP_D12__DISP_D12 IOMUX_PAD(0x480, 0x1A0, 0, 0x72c, 0, MX50_ELCDIF_PAD_CTRL)
616#define MX50_PAD_DISP_D12__GPIO_2_12 IOMUX_PAD(0x480, 0x1A0, 1, 0x0, 0, NO_PAD_CTRL)
617#define MX50_PAD_DISP_D12__NANDF_CEN2 IOMUX_PAD(0x480, 0x1A0, 2, 0x0, 0, NO_PAD_CTRL)
618#define MX50_PAD_DISP_D12__SD1_CD IOMUX_PAD(0x480, 0x1A0, 3, 0x0, 0, MX50_SD_PAD_CTRL)
619#define MX50_PAD_DISP_D12__SD4_D2 IOMUX_PAD(0x480, 0x1A0, 4, 0x758, 1, MX50_SD_PAD_CTRL)
620#define MX50_PAD_DISP_D12__KEY_COL6 IOMUX_PAD(0x480, 0x1A0, 5, 0x798, 1, NO_PAD_CTRL)
621#define MX50_PAD_DISP_D12__FEC_RDAT0 IOMUX_PAD(0x480, 0x1A0, 6, 0x778, 1, NO_PAD_CTRL)
622
623#define MX50_PAD_DISP_D13__DISP_D13 IOMUX_PAD(0x484, 0x1A4, 0, 0x730, 0, MX50_ELCDIF_PAD_CTRL)
624#define MX50_PAD_DISP_D13__GPIO_2_13 IOMUX_PAD(0x484, 0x1A4, 1, 0x0, 0, NO_PAD_CTRL)
625#define MX50_PAD_DISP_D13__NANDF_CEN3 IOMUX_PAD(0x484, 0x1A4, 2, 0x0, 0, NO_PAD_CTRL)
626#define MX50_PAD_DISP_D13__SD3_CD IOMUX_PAD(0x484, 0x1A4, 3, 0x0, 0, MX50_SD_PAD_CTRL)
627#define MX50_PAD_DISP_D13__SD4_D3 IOMUX_PAD(0x484, 0x1A4, 4, 0x75c, 1, MX50_SD_PAD_CTRL)
628#define MX50_PAD_DISP_D13__KEY_ROW6 IOMUX_PAD(0x484, 0x1A4, 5, 0x7a8, 1, NO_PAD_CTRL)
629#define MX50_PAD_DISP_D13__FEC_TX_EN IOMUX_PAD(0x484, 0x1A4, 6, 0x0, 0, NO_PAD_CTRL)
630
631#define MX50_PAD_DISP_D14__DISP_D14 IOMUX_PAD(0x488, 0x1A8, 0, 0x734, 0, MX50_ELCDIF_PAD_CTRL)
632#define MX50_PAD_DISP_D14__GPIO_2_14 IOMUX_PAD(0x488, 0x1A8, 1, 0x0, 0, NO_PAD_CTRL)
633#define MX50_PAD_DISP_D14__NANDF_RDY0 IOMUX_PAD(0x488, 0x1A8, 2, 0x7b4, 1, NO_PAD_CTRL)
634#define MX50_PAD_DISP_D14__SD1_WP IOMUX_PAD(0x488, 0x1A8, 3, 0x0, 0, MX50_SD_PAD_CTRL)
635#define MX50_PAD_DISP_D14__SD4_WP IOMUX_PAD(0x488, 0x1A8, 4, 0x0, 0, MX50_SD_PAD_CTRL)
636#define MX50_PAD_DISP_D14__KEY_COL7 IOMUX_PAD(0x488, 0x1A8, 5, 0x79c, 1, NO_PAD_CTRL)
637#define MX50_PAD_DISP_D14__FEC_TDAT1 IOMUX_PAD(0x488, 0x1A8, 6, 0x0, 0, NO_PAD_CTRL)
638
639#define MX50_PAD_DISP_D15__DISP_D15 IOMUX_PAD(0x48C, 0x1AC, 0, 0x738, 0, MX50_ELCDIF_PAD_CTRL)
640#define MX50_PAD_DISP_D15__GPIO_2_15 IOMUX_PAD(0x48C, 0x1AC, 1, 0x0, 0, NO_PAD_CTRL)
641#define MX50_PAD_DISP_D15__NANDF_DQS IOMUX_PAD(0x48C, 0x1AC, 2, 0x7b0, 1, NO_PAD_CTRL)
642#define MX50_PAD_DISP_D15__SD3_RST IOMUX_PAD(0x48C, 0x1AC, 3, 0x0, 0, MX50_SD_PAD_CTRL)
643#define MX50_PAD_DISP_D15__SD4_CD IOMUX_PAD(0x48C, 0x1AC, 4, 0x0, 0, MX50_SD_PAD_CTRL)
644#define MX50_PAD_DISP_D15__KEY_ROW7 IOMUX_PAD(0x48C, 0x1AC, 5, 0x7ac, 1, NO_PAD_CTRL)
645#define MX50_PAD_DISP_D15__FEC_TDAT0 IOMUX_PAD(0x48C, 0x1AC, 6, 0x0, 0, NO_PAD_CTRL)
646
647#define MX50_PAD_EPDC_D0__EPDC_D0 IOMUX_PAD(0x54C, 0x1B0, 0, 0x0, 0, NO_PAD_CTRL)
648#define MX50_PAD_EPDC_D0__GPIO_3_0 IOMUX_PAD(0x54C, 0x1B0, 1, 0x0, 0, NO_PAD_CTRL)
649#define MX50_PAD_EPDC_D0__WEIM_D0 IOMUX_PAD(0x54C, 0x1B0, 2, 0x7ec, 1, NO_PAD_CTRL)
650#define MX50_PAD_EPDC_D0__ELCDIF_RS IOMUX_PAD(0x54C, 0x1B0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
651#define MX50_PAD_EPDC_D0__ELCDIF_PIXCLK IOMUX_PAD(0x54C, 0x1B0, 4, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
652
653#define MX50_PAD_EPDC_D1__EPDC_D1 IOMUX_PAD(0x550, 0x1B4, 0, 0x0, 0, NO_PAD_CTRL)
654#define MX50_PAD_EPDC_D1__GPIO_3_1 IOMUX_PAD(0x550, 0x1B4, 1, 0x0, 0, NO_PAD_CTRL)
655#define MX50_PAD_EPDC_D1__WEIM_D1 IOMUX_PAD(0x550, 0x1B4, 2, 0x7f0, 1, NO_PAD_CTRL)
656#define MX50_PAD_EPDC_D1__ELCDIF_CS IOMUX_PAD(0x550, 0x1B4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
657#define MX50_PAD_EPDC_D1__ELCDIF_EN IOMUX_PAD(0x550, 0x1B4, 4, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
658
659#define MX50_PAD_EPDC_D2__EPDC_D2 IOMUX_PAD(0x554, 0x1B8, 0, 0x0, 0, NO_PAD_CTRL)
660#define MX50_PAD_EPDC_D2__GPIO_3_2 IOMUX_PAD(0x554, 0x1B8, 1, 0x0, 0, NO_PAD_CTRL)
661#define MX50_PAD_EPDC_D2__WEIM_D2 IOMUX_PAD(0x554, 0x1B8, 2, 0x7f4, 1, NO_PAD_CTRL)
662#define MX50_PAD_EPDC_D2__ELCDIF_WR IOMUX_PAD(0x554, 0x1B8, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
663#define MX50_PAD_EPDC_D2__ELCDIF_VSYNC IOMUX_PAD(0x554, 0x1B8, 4, 0x73c, 2, MX50_ELCDIF_PAD_CTRL)
664
665#define MX50_PAD_EPDC_D3__EPDC_D3 IOMUX_PAD(0x558, 0x1BC, 0, 0x0, 0, NO_PAD_CTRL)
666#define MX50_PAD_EPDC_D3__GPIO_3_3 IOMUX_PAD(0x558, 0x1BC, 1, 0x0, 0, NO_PAD_CTRL)
667#define MX50_PAD_EPDC_D3__WEIM_D3 IOMUX_PAD(0x558, 0x1BC, 2, 0x7f8, 1, NO_PAD_CTRL)
668#define MX50_PAD_EPDC_D3__ELCDIF_RD IOMUX_PAD(0x558, 0x1BC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
669#define MX50_PAD_EPDC_D3__ELCDIF_HSYNC IOMUX_PAD(0x558, 0x1BC, 4, 0x6f8, 3, MX50_ELCDIF_PAD_CTRL)
670
671#define MX50_PAD_EPDC_D4__EPDC_D4 IOMUX_PAD(0x55C, 0x1C0, 0, 0x0, 0, NO_PAD_CTRL)
672#define MX50_PAD_EPDC_D4__GPIO_3_4 IOMUX_PAD(0x55C, 0x1C0, 1, 0x0, 0, NO_PAD_CTRL)
673#define MX50_PAD_EPDC_D4__WEIM_D4 IOMUX_PAD(0x55C, 0x1C0, 2, 0x7fc, 1, NO_PAD_CTRL)
674
675#define MX50_PAD_EPDC_D5__EPDC_D5 IOMUX_PAD(0x560, 0x1C4, 0, 0x0, 0, NO_PAD_CTRL)
676#define MX50_PAD_EPDC_D5__GPIO_3_5 IOMUX_PAD(0x560, 0x1C4, 1, 0x0, 0, NO_PAD_CTRL)
677#define MX50_PAD_EPDC_D5__WEIM_D5 IOMUX_PAD(0x560, 0x1C4, 2, 0x800, 1, NO_PAD_CTRL)
678
679#define MX50_PAD_EPDC_D6__EPDC_D6 IOMUX_PAD(0x564, 0x1C8, 0, 0x0, 0, NO_PAD_CTRL)
680#define MX50_PAD_EPDC_D6__GPIO_3_6 IOMUX_PAD(0x564, 0x1C8, 1, 0x0, 0, NO_PAD_CTRL)
681#define MX50_PAD_EPDC_D6__WEIM_D6 IOMUX_PAD(0x564, 0x1C8, 2, 0x804, 1, NO_PAD_CTRL)
682
683#define MX50_PAD_EPDC_D7__EPDC_D7 IOMUX_PAD(0x568, 0x1CC, 0, 0x0, 0, NO_PAD_CTRL)
684#define MX50_PAD_EPDC_D7__GPIO_3_7 IOMUX_PAD(0x568, 0x1CC, 1, 0x0, 0, NO_PAD_CTRL)
685#define MX50_PAD_EPDC_D7__WEIM_D7 IOMUX_PAD(0x568, 0x1CC, 2, 0x808, 1, NO_PAD_CTRL)
686
687#define MX50_PAD_EPDC_D8__EPDC_D8 IOMUX_PAD(0x56C, 0x1D0, 0, 0x0, 0, NO_PAD_CTRL)
688#define MX50_PAD_EPDC_D8__GPIO_3_8 IOMUX_PAD(0x56C, 0x1D0, 1, 0x0, 0, NO_PAD_CTRL)
689#define MX50_PAD_EPDC_D8__WEIM_D8 IOMUX_PAD(0x56C, 0x1D0, 2, 0x80c, 2, NO_PAD_CTRL)
690#define MX50_PAD_EPDC_D8__ELCDIF_D24 IOMUX_PAD(0x56C, 0x1D0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
691
692#define MX50_PAD_EPDC_D9__EPDC_D9 IOMUX_PAD(0x570, 0x1D4, 0, 0x0, 0, NO_PAD_CTRL)
693#define MX50_PAD_EPDC_D9__GPIO_3_9 IOMUX_PAD(0x570, 0x1D4, 1, 0x0, 0, NO_PAD_CTRL)
694#define MX50_PAD_EPDC_D9__WEIM_D9 IOMUX_PAD(0x570, 0x1D4, 2, 0x810, 2, NO_PAD_CTRL)
695#define MX50_PAD_EPDC_D9__ELCDIF_D25 IOMUX_PAD(0x570, 0x1D4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
696
697#define MX50_PAD_EPDC_D10__EPDC_D10 IOMUX_PAD(0x574, 0x1D8, 0, 0x0, 0, NO_PAD_CTRL)
698#define MX50_PAD_EPDC_D10__GPIO_3_10 IOMUX_PAD(0x574, 0x1D8, 1, 0x0, 0, NO_PAD_CTRL)
699#define MX50_PAD_EPDC_D10__WEIM_D10 IOMUX_PAD(0x574, 0x1D8, 2, 0x814, 2, NO_PAD_CTRL)
700#define MX50_PAD_EPDC_D10__ELCDIF_D26 IOMUX_PAD(0x574, 0x1D8, 3, 0x0, 0, NO_PAD_CTRL)
701
702#define MX50_PAD_EPDC_D11__EPDC_D11 IOMUX_PAD(0x578, 0x1DC, 0, 0x0, 0, NO_PAD_CTRL)
703#define MX50_PAD_EPDC_D11__GPIO_3_11 IOMUX_PAD(0x578, 0x1DC, 1, 0x0, 0, NO_PAD_CTRL)
704#define MX50_PAD_EPDC_D11__WEIM_D11 IOMUX_PAD(0x578, 0x1DC, 2, 0x818, 2, NO_PAD_CTRL)
705#define MX50_PAD_EPDC_D11__ELCDIF_D27 IOMUX_PAD(0x578, 0x1DC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
706
707#define MX50_PAD_EPDC_D12__EPDC_D12 IOMUX_PAD(0x57C, 0x1E0, 0, 0x0, 0, NO_PAD_CTRL)
708#define MX50_PAD_EPDC_D12__GPIO_3_12 IOMUX_PAD(0x57C, 0x1E0, 1, 0x0, 0, NO_PAD_CTRL)
709#define MX50_PAD_EPDC_D12__WEIM_D12 IOMUX_PAD(0x57C, 0x1E0, 2, 0x81c, 1, NO_PAD_CTRL)
710#define MX50_PAD_EPDC_D12__ELCDIF_D28 IOMUX_PAD(0x57C, 0x1E0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
711
712#define MX50_PAD_EPDC_D13__EPDC_D13 IOMUX_PAD(0x580, 0x1E4, 0, 0x0, 0, NO_PAD_CTRL)
713#define MX50_PAD_EPDC_D13__GPIO_3_13 IOMUX_PAD(0x580, 0x1E4, 1, 0x0, 0, NO_PAD_CTRL)
714#define MX50_PAD_EPDC_D13__WEIM_D13 IOMUX_PAD(0x580, 0x1E4, 2, 0x820, 1, NO_PAD_CTRL)
715#define MX50_PAD_EPDC_D13__ELCDIF_D29 IOMUX_PAD(0x580, 0x1E4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
716
717#define MX50_PAD_EPDC_D14__EPDC_D14 IOMUX_PAD(0x584, 0x1E8, 0, 0x0, 0, NO_PAD_CTRL)
718#define MX50_PAD_EPDC_D14__GPIO_3_14 IOMUX_PAD(0x584, 0x1E8, 1, 0x0, 0, NO_PAD_CTRL)
719#define MX50_PAD_EPDC_D14__WEIM_D14 IOMUX_PAD(0x584, 0x1E8, 2, 0x824, 1, NO_PAD_CTRL)
720#define MX50_PAD_EPDC_D14__ELCDIF_D30 IOMUX_PAD(0x584, 0x1E8, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
721#define MX50_PAD_EPDC_D14__AUD6_TXD IOMUX_PAD(0x584, 0x1E8, 4, 0x0, 0, NO_PAD_CTRL)
722
723#define MX50_PAD_EPDC_D15__EPDC_D15 IOMUX_PAD(0x588, 0x1EC, 0, 0x0, 0, NO_PAD_CTRL)
724#define MX50_PAD_EPDC_D15__GPIO_3_15 IOMUX_PAD(0x588, 0x1EC, 1, 0x0, 0, NO_PAD_CTRL)
725#define MX50_PAD_EPDC_D15__WEIM_D15 IOMUX_PAD(0x588, 0x1EC, 2, 0x828, 1, NO_PAD_CTRL)
726#define MX50_PAD_EPDC_D15__ELCDIF_D31 IOMUX_PAD(0x588, 0x1EC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
727#define MX50_PAD_EPDC_D15__AUD6_TXC IOMUX_PAD(0x588, 0x1EC, 4, 0x0, 0, NO_PAD_CTRL)
728
729#define MX50_PAD_EPDC_GDCLK__EPDC_GDCLK IOMUX_PAD(0x58C, 0x1F0, 0, 0x0, 0, NO_PAD_CTRL)
730#define MX50_PAD_EPDC_GDCLK__GPIO_3_16 IOMUX_PAD(0x58C, 0x1F0, 1, 0x0, 0, NO_PAD_CTRL)
731#define MX50_PAD_EPDC_GDCLK__WEIM_D16 IOMUX_PAD(0x58C, 0x1F0, 2, 0x0, 0, NO_PAD_CTRL)
732#define MX50_PAD_EPDC_GDCLK__ELCDIF_D16 IOMUX_PAD(0x58C, 0x1F0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
733#define MX50_PAD_EPDC_GDCLK__AUD6_TXFS IOMUX_PAD(0x58C, 0x1F0, 4, 0x0, 0, NO_PAD_CTRL)
734
735#define MX50_PAD_EPDC_GDSP__EPDC_GDSP IOMUX_PAD(0x590, 0x1F4, 0, 0x0, 0, NO_PAD_CTRL)
736#define MX50_PAD_EPDC_GDSP__GPIO_3_17 IOMUX_PAD(0x590, 0x1F4, 1, 0x0, 0, NO_PAD_CTRL)
737#define MX50_PAD_EPDC_GDSP__WEIM_D17 IOMUX_PAD(0x590, 0x1F4, 2, 0x0, 0, NO_PAD_CTRL)
738#define MX50_PAD_EPDC_GDSP__ELCDIF_D17 IOMUX_PAD(0x590, 0x1F4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
739#define MX50_PAD_EPDC_GDSP__AUD6_RXD IOMUX_PAD(0x590, 0x1F4, 4, 0x0, 0, NO_PAD_CTRL)
740
741#define MX50_PAD_EPDC_GDOE__EPDC_GDOE IOMUX_PAD(0x594, 0x1F8, 0, 0x0, 0, NO_PAD_CTRL)
742#define MX50_PAD_EPDC_GDOE__GPIO_3_18 IOMUX_PAD(0x594, 0x1F8, 1, 0x0, 0, NO_PAD_CTRL)
743#define MX50_PAD_EPDC_GDOE__WEIM_D18 IOMUX_PAD(0x594, 0x1F8, 2, 0x0, 0, NO_PAD_CTRL)
744#define MX50_PAD_EPDC_GDOE__ELCDIF_D18 IOMUX_PAD(0x594, 0x1F8, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
745#define MX50_PAD_EPDC_GDOE__AUD6_RXC IOMUX_PAD(0x594, 0x1F8, 4, 0x0, 0, NO_PAD_CTRL)
746
747#define MX50_PAD_EPDC_GDRL__EPDC_GDRL IOMUX_PAD(0x598, 0x1FC, 0, 0x0, 0, NO_PAD_CTRL)
748#define MX50_PAD_EPDC_GDRL__GPIO_3_19 IOMUX_PAD(0x598, 0x1FC, 1, 0x0, 0, NO_PAD_CTRL)
749#define MX50_PAD_EPDC_GDRL__WEIM_D19 IOMUX_PAD(0x598, 0x1FC, 2, 0x0, 0, NO_PAD_CTRL)
750#define MX50_PAD_EPDC_GDRL__ELCDIF_D19 IOMUX_PAD(0x598, 0x1FC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
751#define MX50_PAD_EPDC_GDRL__AUD6_RXFS IOMUX_PAD(0x598, 0x1FC, 4, 0x0, 0, NO_PAD_CTRL)
752
753#define MX50_PAD_EPDC_SDCLK__EPDC_SDCLK IOMUX_PAD(0x59C, 0x200, 0, 0x0, 0, NO_PAD_CTRL)
754#define MX50_PAD_EPDC_SDCLK__GPIO_3_20 IOMUX_PAD(0x59C, 0x200, 1, 0x0, 0, NO_PAD_CTRL)
755#define MX50_PAD_EPDC_SDCLK__WEIM_D20 IOMUX_PAD(0x59C, 0x200, 2, 0x0, 0, NO_PAD_CTRL)
756#define MX50_PAD_EPDC_SDCLK__ELCDIF_D20 IOMUX_PAD(0x59C, 0x200, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
757#define MX50_PAD_EPDC_SDCLK__AUD5_TXD IOMUX_PAD(0x59C, 0x200, 4, 0x0, 0, NO_PAD_CTRL)
758
759#define MX50_PAD_EPDC_SDOEZ__EPDC_SDOEZ IOMUX_PAD(0x5A0, 0x204, 0, 0x0, 0, NO_PAD_CTRL)
760#define MX50_PAD_EPDC_SDOEZ__GPIO_3_21 IOMUX_PAD(0x5A0, 0x204, 1, 0x0, 0, NO_PAD_CTRL)
761#define MX50_PAD_EPDC_SDOEZ__WEIM_D21 IOMUX_PAD(0x5A0, 0x204, 2, 0x0, 0, NO_PAD_CTRL)
762#define MX50_PAD_EPDC_SDOEZ__ELCDIF_D21 IOMUX_PAD(0x5A0, 0x204, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
763#define MX50_PAD_EPDC_SDOEZ__AUD5_TXC IOMUX_PAD(0x5A0, 0x204, 4, 0x0, 0, NO_PAD_CTRL)
764
765#define MX50_PAD_EPDC_SDOED__EPDC_SDOED IOMUX_PAD(0x5A4, 0x208, 0, 0x0, 0, NO_PAD_CTRL)
766#define MX50_PAD_EPDC_SDOED__GPIO_3_22 IOMUX_PAD(0x5A4, 0x208, 1, 0x0, 0, NO_PAD_CTRL)
767#define MX50_PAD_EPDC_SDOED__WEIM_D22 IOMUX_PAD(0x5A4, 0x208, 2, 0x0, 0, NO_PAD_CTRL)
768#define MX50_PAD_EPDC_SDOED__ELCDIF_D22 IOMUX_PAD(0x5A4, 0x208, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
769#define MX50_PAD_EPDC_SDOED__AUD5_TXFS IOMUX_PAD(0x5A4, 0x208, 4, 0x0, 0, NO_PAD_CTRL)
770
771#define MX50_PAD_EPDC_SDOE__EPDC_SDOE IOMUX_PAD(0x5A8, 0x20C, 0, 0x0, 0, NO_PAD_CTRL)
772#define MX50_PAD_EPDC_SDOE__GPIO_3_23 IOMUX_PAD(0x5A8, 0x20C, 1, 0x0, 0, NO_PAD_CTRL)
773#define MX50_PAD_EPDC_SDOE__WEIM_D23 IOMUX_PAD(0x5A8, 0x20C, 2, 0x0, 0, NO_PAD_CTRL)
774#define MX50_PAD_EPDC_SDOE__ELCDIF_D23 IOMUX_PAD(0x5A8, 0x20C, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
775#define MX50_PAD_EPDC_SDOE__AUD5_RXD IOMUX_PAD(0x5A8, 0x20C, 4, 0x0, 0, NO_PAD_CTRL)
776
777#define MX50_PAD_EPDC_SDLE__EPDC_SDLE IOMUX_PAD(0x5AC, 0x210, 0, 0x0, 0, NO_PAD_CTRL)
778#define MX50_PAD_EPDC_SDLE__GPIO_3_24 IOMUX_PAD(0x5AC, 0x210, 1, 0x0, 0, NO_PAD_CTRL)
779#define MX50_PAD_EPDC_SDLE__WEIM_D24 IOMUX_PAD(0x5AC, 0x210, 2, 0x0, 0, NO_PAD_CTRL)
780#define MX50_PAD_EPDC_SDLE__ELCDIF_D8 IOMUX_PAD(0x5AC, 0x210, 3, 0x71c, 1, MX50_ELCDIF_PAD_CTRL)
781#define MX50_PAD_EPDC_SDLE__AUD5_RXC IOMUX_PAD(0x5AC, 0x210, 4, 0x0, 0, NO_PAD_CTRL)
782
783#define MX50_PAD_EPDC_SDCLKN__EPDC_SDCLKN IOMUX_PAD(0x5B0, 0x214, 0, 0x0, 0, NO_PAD_CTRL)
784#define MX50_PAD_EPDC_SDCLKN__GPIO_3_25 IOMUX_PAD(0x5B0, 0x214, 1, 0x0, 0, NO_PAD_CTRL)
785#define MX50_PAD_EPDC_SDCLKN__WEIM_D25 IOMUX_PAD(0x5B0, 0x214, 2, 0x0, 0, NO_PAD_CTRL)
786#define MX50_PAD_EPDC_SDCLKN__ELCDIF_D9 IOMUX_PAD(0x5B0, 0x214, 3, 0x720, 1, MX50_ELCDIF_PAD_CTRL)
787#define MX50_PAD_EPDC_SDCLKN__AUD5_RXFS IOMUX_PAD(0x5B0, 0x214, 4, 0x0, 0, NO_PAD_CTRL)
788
789#define MX50_PAD_EPDC_SDSHR__EPDC_SDSHR IOMUX_PAD(0x5B4, 0x218, 0, 0x0, 0, NO_PAD_CTRL)
790#define MX50_PAD_EPDC_SDSHR__GPIO_3_26 IOMUX_PAD(0x5B4, 0x218, 1, 0x0, 0, NO_PAD_CTRL)
791#define MX50_PAD_EPDC_SDSHR__WEIM_D26 IOMUX_PAD(0x5B4, 0x218, 2, 0x0, 0, NO_PAD_CTRL)
792#define MX50_PAD_EPDC_SDSHR__ELCDIF_D10 IOMUX_PAD(0x5B4, 0x218, 3, 0x724, 1, MX50_ELCDIF_PAD_CTRL)
793#define MX50_PAD_EPDC_SDSHR__AUD4_TXD IOMUX_PAD(0x5B4, 0x218, 4, 0x6c8, 1, NO_PAD_CTRL)
794
795#define MX50_PAD_EPDC_PWRCOM__EPDC_PWRCOM IOMUX_PAD(0x5B8, 0x21C, 0, 0x0, 0, NO_PAD_CTRL)
796#define MX50_PAD_EPDC_PWRCOM__GPIO_3_27 IOMUX_PAD(0x5B8, 0x21C, 1, 0x0, 0, NO_PAD_CTRL)
797#define MX50_PAD_EPDC_PWRCOM__WEIM_D27 IOMUX_PAD(0x5B8, 0x21C, 2, 0x0, 0, NO_PAD_CTRL)
798#define MX50_PAD_EPDC_PWRCOM__ELCDIF_D11 IOMUX_PAD(0x5B8, 0x21C, 3, 0x728, 1, MX50_ELCDIF_PAD_CTRL)
799#define MX50_PAD_EPDC_PWRCOM__AUD4_TXC IOMUX_PAD(0x5B8, 0x21C, 4, 0x6d4, 1, NO_PAD_CTRL)
800
801#define MX50_PAD_EPDC_PWRSTAT__EPDC_PWRSTAT IOMUX_PAD(0x5BC, 0x220, 0, 0x0, 0, NO_PAD_CTRL)
802#define MX50_PAD_EPDC_PWRSTAT__GPIO_3_28 IOMUX_PAD(0x5BC, 0x220, 1, 0x0, 0, NO_PAD_CTRL)
803#define MX50_PAD_EPDC_PWRSTAT__WEIM_D28 IOMUX_PAD(0x5BC, 0x220, 2, 0x0, 0, NO_PAD_CTRL)
804#define MX50_PAD_EPDC_PWRSTAT__ELCDIF_D12 IOMUX_PAD(0x5BC, 0x220, 3, 0x72c, 1, MX50_ELCDIF_PAD_CTRL)
805#define MX50_PAD_EPDC_PWRSTAT__AUD4_TXFS IOMUX_PAD(0x5BC, 0x220, 4, 0x6d8, 1, NO_PAD_CTRL)
806
807#define MX50_PAD_EPDC_PWRCTRL0__EPDC_PWRCTRL0 IOMUX_PAD(0x5C0, 0x224, 0, 0x0, 0, NO_PAD_CTRL)
808#define MX50_PAD_EPDC_PWRCTRL0__GPIO_3_29 IOMUX_PAD(0x5C0, 0x224, 1, 0x0, 0, NO_PAD_CTRL)
809#define MX50_PAD_EPDC_PWRCTRL0__WEIM_D29 IOMUX_PAD(0x5C0, 0x224, 2, 0x0, 0, NO_PAD_CTRL)
810#define MX50_PAD_EPDC_PWRCTRL0__ELCDIF_D13 IOMUX_PAD(0x5C0, 0x224, 3, 0x730, 1, MX50_ELCDIF_PAD_CTRL)
811#define MX50_PAD_EPDC_PWRCTRL0__AUD4_RXD IOMUX_PAD(0x5C0, 0x224, 4, 0x6c4, 1, NO_PAD_CTRL)
812
813#define MX50_PAD_EPDC_PWRCTRL1__EPDC_PWRCTRL1 IOMUX_PAD(0x5C4, 0x228, 0, 0x0, 0, NO_PAD_CTRL)
814#define MX50_PAD_EPDC_PWRCTRL1__GPIO_3_30 IOMUX_PAD(0x5C4, 0x228, 1, 0x0, 0, NO_PAD_CTRL)
815#define MX50_PAD_EPDC_PWRCTRL1__WEIM_D30 IOMUX_PAD(0x5C4, 0x228, 2, 0x0, 0, NO_PAD_CTRL)
816#define MX50_PAD_EPDC_PWRCTRL1__ELCDIF_D14 IOMUX_PAD(0x5C4, 0x228, 3, 0x734, 1, MX50_ELCDIF_PAD_CTRL)
817#define MX50_PAD_EPDC_PWRCTRL1__AUD4_RXC IOMUX_PAD(0x5C4, 0x228, 4, 0x6cc, 1, NO_PAD_CTRL)
818
819#define MX50_PAD_EPDC_PWRCTRL2__EPDC_PWRCTRL2 IOMUX_PAD(0x5C8, 0x22C, 0, 0x0, 0, NO_PAD_CTRL)
820#define MX50_PAD_EPDC_PWRCTRL2__GPIO_3_31 IOMUX_PAD(0x5C8, 0x22C, 1, 0x0, 0, NO_PAD_CTRL)
821#define MX50_PAD_EPDC_PWRCTRL2__WEIM_D31 IOMUX_PAD(0x5C8, 0x22C, 2, 0x0, 0, NO_PAD_CTRL)
822#define MX50_PAD_EPDC_PWRCTRL2__ELCDIF_D15 IOMUX_PAD(0x5C8, 0x22C, 3, 0x738, 1, MX50_ELCDIF_PAD_CTRL)
823#define MX50_PAD_EPDC_PWRCTRL2__AUD4_RXFS IOMUX_PAD(0x5C8, 0x22C, 4, 0x6d0, 1, NO_PAD_CTRL)
824#define MX50_PAD_EPDC_PWRCTRL2__SDMA_EXT0 IOMUX_PAD(0x5C8, 0x22C, 6, 0x7b8, 1, NO_PAD_CTRL)
825
826#define MX50_PAD_EPDC_PWRCTRL3__PWRCTRL3 IOMUX_PAD(0x5CC, 0x230, 0, 0x0, 0, NO_PAD_CTRL)
827#define MX50_PAD_EPDC_PWRCTRL3__GPIO_4_20 IOMUX_PAD(0x5CC, 0x230, 1, 0x0, 0, NO_PAD_CTRL)
828#define MX50_PAD_EPDC_PWRCTRL3__WEIM_EB2 IOMUX_PAD(0x5CC, 0x230, 2, 0x0, 0, NO_PAD_CTRL)
829#define MX50_PAD_EPDC_PWRCTRL3__SDMA_EXT1 IOMUX_PAD(0x5CC, 0x230, 6, 0x7bc, 1, NO_PAD_CTRL)
830
831#define MX50_PAD_EPDC_VCOM0__EPDC_VCOM0 IOMUX_PAD(0x5D0, 0x234, 0, 0x0, 0, NO_PAD_CTRL)
832#define MX50_PAD_EPDC_VCOM0__GPIO_4_21 IOMUX_PAD(0x5D0, 0x234, 1, 0x0, 0, NO_PAD_CTRL)
833#define MX50_PAD_EPDC_VCOM0__WEIM_EB3 IOMUX_PAD(0x5D0, 0x234, 2, 0x0, 0, NO_PAD_CTRL)
834
835#define MX50_PAD_EPDC_VCOM1__EPDC_VCOM1 IOMUX_PAD(0x5D4, 0x238, 0, 0x0, 0, NO_PAD_CTRL)
836#define MX50_PAD_EPDC_VCOM1__GPIO_4_22 IOMUX_PAD(0x5D4, 0x238, 1, 0x0, 0, NO_PAD_CTRL)
837#define MX50_PAD_EPDC_VCOM1__WEIM_CS3 IOMUX_PAD(0x5D4, 0x238, 2, 0x0, 0, NO_PAD_CTRL)
838
839#define MX50_PAD_EPDC_BDR0__EPDC_BDR0 IOMUX_PAD(0x5D8, 0x23C, 0, 0x0, 0, NO_PAD_CTRL)
840#define MX50_PAD_EPDC_BDR0__GPIO_4_23 IOMUX_PAD(0x5D8, 0x23C, 1, 0x0, 0, NO_PAD_CTRL)
841#define MX50_PAD_EPDC_BDR0__ELCDIF_D7 IOMUX_PAD(0x5D8, 0x23C, 3, 0x718, 1, MX50_ELCDIF_PAD_CTRL)
842
843#define MX50_PAD_EPDC_BDR1__EPDC_BDR1 IOMUX_PAD(0x5DC, 0x240, 0, 0x0, 0, NO_PAD_CTRL)
844#define MX50_PAD_EPDC_BDR1__GPIO_4_24 IOMUX_PAD(0x5DC, 0x240, 1, 0x0, 0, NO_PAD_CTRL)
845#define MX50_PAD_EPDC_BDR1__ELCDIF_D6 IOMUX_PAD(0x5DC, 0x240, 3, 0x714, 1, MX50_ELCDIF_PAD_CTRL)
846
847#define MX50_PAD_EPDC_SDCE0__EPDC_SDCE0 IOMUX_PAD(0x5E0, 0x244, 0, 0x0, 0, NO_PAD_CTRL)
848#define MX50_PAD_EPDC_SDCE0__GPIO_4_25 IOMUX_PAD(0x5E0, 0x244, 1, 0x0, 0, NO_PAD_CTRL)
849#define MX50_PAD_EPDC_SDCE0__ELCDIF_D5 IOMUX_PAD(0x5E0, 0x244, 3, 0x710, 1, MX50_ELCDIF_PAD_CTRL)
850
851#define MX50_PAD_EPDC_SDCE1__EPDC_SDCE1 IOMUX_PAD(0x5E4, 0x248, 0, 0x0, 0, NO_PAD_CTRL)
852#define MX50_PAD_EPDC_SDCE1__GPIO_4_26 IOMUX_PAD(0x5E4, 0x248, 1, 0x0, 0, NO_PAD_CTRL)
853#define MX50_PAD_EPDC_SDCE1__ELCDIF_D4 IOMUX_PAD(0x5E4, 0x248, 2, 0x70c, 1, MX50_ELCDIF_PAD_CTRL)
854
855#define MX50_PAD_EPDC_SDCE2__EPDC_SDCE2 IOMUX_PAD(0x5E8, 0x24C, 0, 0x0, 0, NO_PAD_CTRL)
856#define MX50_PAD_EPDC_SDCE2__GPIO_4_27 IOMUX_PAD(0x5E8, 0x24C, 1, 0x0, 0, NO_PAD_CTRL)
857#define MX50_PAD_EPDC_SDCE2__ELCDIF_DAT3 IOMUX_PAD(0x5E8, 0x24C, 3, 0x708, 1, MX50_ELCDIF_PAD_CTRL)
858
859#define MX50_PAD_EPDC_SDCE3__EPDC_SDCE3 IOMUX_PAD(0x5EC, 0x250, 0, 0x0, 0, NO_PAD_CTRL)
860#define MX50_PAD_EPDC_SDCE3__GPIO_4_28 IOMUX_PAD(0x5EC, 0x250, 1, 0x0, 0, NO_PAD_CTRL)
861#define MX50_PAD_EPDC_SDCE3__ELCDIF_D2 IOMUX_PAD(0x5EC, 0x250, 3, 0x704, 1, MX50_ELCDIF_PAD_CTRL)
862
863#define MX50_PAD_EPDC_SDCE4__EPDC_SDCE4 IOMUX_PAD(0x5F0, 0x254, 0, 0x0, 0, NO_PAD_CTRL)
864#define MX50_PAD_EPDC_SDCE4__GPIO_4_29 IOMUX_PAD(0x5F0, 0x254, 1, 0x0, 0, NO_PAD_CTRL)
865#define MX50_PAD_EPDC_SDCE4__ELCDIF_D1 IOMUX_PAD(0x5F0, 0x254, 3, 0x700, 1, MX50_ELCDIF_PAD_CTRL)
866
867#define MX50_PAD_EPDC_SDCE5__EPDC_SDCE5 IOMUX_PAD(0x5F4, 0x258, 0, 0x0, 0, NO_PAD_CTRL)
868#define MX50_PAD_EPDC_SDCE5__GPIO_4_30 IOMUX_PAD(0x5F4, 0x258, 1, 0x0, 0, NO_PAD_CTRL)
869#define MX50_PAD_EPDC_SDCE5__ELCDIF_D0 IOMUX_PAD(0x5F4, 0x258, 3, 0x6fc, 1, MX50_ELCDIF_PAD_CTRL)
870
871#define MX50_PAD_EIM_DA0__WEIM_A0 IOMUX_PAD(0x5F8, 0x25C, 0, 0x0, 0, NO_PAD_CTRL)
872#define MX50_PAD_EIM_DA0__GPIO_1_0 IOMUX_PAD(0x5F8, 0x25C, 1, 0x0, 0, NO_PAD_CTRL)
873#define MX50_PAD_EIM_DA0__KEY_COL4 IOMUX_PAD(0x5f8, 0x25C, 3, 0x790, 2, NO_PAD_CTRL)
874
875#define MX50_PAD_EIM_DA1__WEIM_A1 IOMUX_PAD(0x5FC, 0x260, 0, 0x0, 0, NO_PAD_CTRL)
876#define MX50_PAD_EIM_DA1__GPIO_1_1 IOMUX_PAD(0x5FC, 0x260, 1, 0x0, 0, NO_PAD_CTRL)
877#define MX50_PAD_EIM_DA1__KEY_ROW4 IOMUX_PAD(0x5fc, 0x260, 3, 0x7a0, 2, MX50_KEYPAD_CTRL)
878
879#define MX50_PAD_EIM_DA2__WEIM_A2 IOMUX_PAD(0x600, 0x264, 0, 0x0, 0, NO_PAD_CTRL)
880#define MX50_PAD_EIM_DA2__GPIO_1_2 IOMUX_PAD(0x600, 0x264, 1, 0x0, 0, NO_PAD_CTRL)
881#define MX50_PAD_EIM_DA2__KEY_COL5 IOMUX_PAD(0x600, 0x264, 3, 0x794, 2, NO_PAD_CTRL)
882
883#define MX50_PAD_EIM_DA3__WEIM_A3 IOMUX_PAD(0x604, 0x268, 0, 0x0, 0, NO_PAD_CTRL)
884#define MX50_PAD_EIM_DA3__GPIO_1_3 IOMUX_PAD(0x604, 0x268, 1, 0x0, 0, NO_PAD_CTRL)
885#define MX50_PAD_EIM_DA3__KEY_ROW5 IOMUX_PAD(0x604, 0x268, 3, 0x7a4, 2, MX50_KEYPAD_CTRL)
886
887#define MX50_PAD_EIM_DA4__WEIM_A4 IOMUX_PAD(0x608, 0x26C, 0, 0x0, 0, NO_PAD_CTRL)
888#define MX50_PAD_EIM_DA4__GPIO_1_4 IOMUX_PAD(0x608, 0x26C, 1, 0x0, 0, NO_PAD_CTRL)
889#define MX50_PAD_EIM_DA4__KEY_COL6 IOMUX_PAD(0x608, 0x26C, 3, 0x798, 2, NO_PAD_CTRL)
890
891#define MX50_PAD_EIM_DA5__WEIM_A5 IOMUX_PAD(0x60C, 0x270, 0, 0x0, 0, NO_PAD_CTRL)
892#define MX50_PAD_EIM_DA5__GPIO_1_5 IOMUX_PAD(0x60C, 0x270, 1, 0x0, 0, NO_PAD_CTRL)
893#define MX50_PAD_EIM_DA5__KEY_ROW6 IOMUX_PAD(0x60C, 0x270, 3, 0x7a8, 2, MX50_KEYPAD_CTRL)
894
895#define MX50_PAD_EIM_DA6__WEIM_A6 IOMUX_PAD(0x610, 0x274, 0, 0x0, 0, NO_PAD_CTRL)
896#define MX50_PAD_EIM_DA6__GPIO_1_6 IOMUX_PAD(0x610, 0x274, 1, 0x0, 0, NO_PAD_CTRL)
897#define MX50_PAD_EIM_DA6__KEY_COL7 IOMUX_PAD(0x610, 0x274, 3, 0x79c, 2, NO_PAD_CTRL)
898
899#define MX50_PAD_EIM_DA7__WEIM_A7 IOMUX_PAD(0x614, 0x278, 0, 0x0, 0, NO_PAD_CTRL)
900#define MX50_PAD_EIM_DA7__GPIO_1_7 IOMUX_PAD(0x614, 0x278, 1, 0x0, 0, NO_PAD_CTRL)
901#define MX50_PAD_EIM_DA7__KEY_ROW7 IOMUX_PAD(0x614, 0x278, 3, 0x7ac, 2, MX50_KEYPAD_CTRL)
902
903#define MX50_PAD_EIM_DA8__WEIM_A8 IOMUX_PAD(0x618, 0x27C, 0, 0x0, 0, NO_PAD_CTRL)
904#define MX50_PAD_EIM_DA8__GPIO_1_8 IOMUX_PAD(0x618, 0x27C, 1, 0x0, 0, NO_PAD_CTRL)
905#define MX50_PIN_EIM_DA8__NANDF_CLE IOMUX_PAD(0x618, 0x27C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
906
907#define MX50_PAD_EIM_DA9__WEIM_A9 IOMUX_PAD(0x61C, 0x280, 0, 0x0, 0, NO_PAD_CTRL)
908#define MX50_PAD_EIM_DA9__GPIO_1_9 IOMUX_PAD(0x61C, 0x280, 1, 0x0, 0, NO_PAD_CTRL)
909#define MX50_PIN_EIM_DA9__NANDF_ALE IOMUX_PAD(0x61C, 0x280, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
910
911#define MX50_PAD_EIM_DA10__WEIM_A10 IOMUX_PAD(0x620, 0x284, 0, 0x0, 0, NO_PAD_CTRL)
912#define MX50_PAD_EIM_DA10__GPIO_1_10 IOMUX_PAD(0x620, 0x284, 1, 0x0, 0, NO_PAD_CTRL)
913#define MX50_PIN_EIM_DA10__NANDF_CE0 IOMUX_PAD(0x620, 0x284, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
914
915#define MX50_PAD_EIM_DA11__WEIM_A11 IOMUX_PAD(0x624, 0x288, 0, 0x0, 0, NO_PAD_CTRL)
916#define MX50_PAD_EIM_DA11__GPIO_1_11 IOMUX_PAD(0x624, 0x288, 1, 0x0, 0, NO_PAD_CTRL)
917#define MX50_PIN_EIM_DA11__NANDF_CE1 IOMUX_PAD(0x624, 0x288, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
918
919#define MX50_PAD_EIM_DA12__WEIM_A12 IOMUX_PAD(0x628, 0x28C, 0, 0x0, 0, NO_PAD_CTRL)
920#define MX50_PAD_EIM_DA12__GPIO_1_12 IOMUX_PAD(0x628, 0x28C, 1, 0x0, 0, NO_PAD_CTRL)
921#define MX50_PIN_EIM_DA12__NANDF_CE2 IOMUX_PAD(0x628, 0x28C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
922#define MX50_PAD_EIM_DA12__EPDC_SDCE6 IOMUX_PAD(0x628, 0x28C, 3, 0x0, 0, NO_PAD_CTRL)
923
924#define MX50_PAD_EIM_DA13__WEIM_A13 IOMUX_PAD(0x62C, 0x290, 0, 0x0, 0, NO_PAD_CTRL)
925#define MX50_PAD_EIM_DA13__GPIO_1_13 IOMUX_PAD(0x62C, 0x290, 1, 0x0, 0, NO_PAD_CTRL)
926#define MX50_PIN_EIM_DA13__NANDF_CE3 IOMUX_PAD(0x62C, 0x290, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
927#define MX50_PIN_EIM_DA13__EPDC_SDCE7 IOMUX_PAD(0x62C, 0x290, 3, 0x0, 0, NO_PAD_CTRL)
928
929#define MX50_PAD_EIM_DA14__WEIM_A14 IOMUX_PAD(0x630, 0x294, 0, 0x0, 0, NO_PAD_CTRL)
930#define MX50_PAD_EIM_DA14__GPIO_1_14 IOMUX_PAD(0x630, 0x294, 1, 0x0, 0, NO_PAD_CTRL)
931#define MX50_PAD_EIM_DA14__NANDF_READY IOMUX_PAD(0x630, 0x294, 2, 0x7B4, 2, PAD_CTL_PKE | \
932 PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
933#define MX50_PAD_EIM_DA14__EPDC_SDCE8 IOMUX_PAD(0x630, 0x294, 3, 0x0, 0, NO_PAD_CTRL)
934
935#define MX50_PAD_EIM_DA15__WEIM_A15 IOMUX_PAD(0x634, 0x298, 0, 0x0, 0, NO_PAD_CTRL)
936#define MX50_PAD_EIM_DA15__GPIO_1_15 IOMUX_PAD(0x634, 0x298, 1, 0x0, 0, NO_PAD_CTRL)
937#define MX50_PIN_EIM_DA15__NANDF_DQS IOMUX_PAD(0x634, 0x298, 2, 0x7B0, 2, PAD_CTL_DSE_HIGH)
938#define MX50_PAD_EIM_DA15__EPDC_SDCE9 IOMUX_PAD(0x634, 0x298, 3, 0x0, 0, NO_PAD_CTRL)
939
940#define MX50_PAD_EIM_CS2__WEIM_CS2 IOMUX_PAD(0x638, 0x29C, 0, 0x0, 0, NO_PAD_CTRL)
941#define MX50_PAD_EIM_CS2__GPIO_1_16 IOMUX_PAD(0x638, 0x29C, 1, 0x0, 0, NO_PAD_CTRL)
942#define MX50_PAD_EIM_CS2__WEIM_A27 IOMUX_PAD(0x638, 0x29C, 2, 0x0, 0, NO_PAD_CTRL)
943
944#define MX50_PAD_EIM_CS1__WEIM_CS1 IOMUX_PAD(0x63C, 0x2A0, 0, 0x0, 0, NO_PAD_CTRL)
945#define MX50_PAD_EIM_CS1__GPIO_1_17 IOMUX_PAD(0x63C, 0x2A0, 1, 0x0, 0, NO_PAD_CTRL)
946
947#define MX50_PAD_EIM_CS0__WEIM_CS0 IOMUX_PAD(0x640, 0x2A4, 0, 0x0, 0, NO_PAD_CTRL)
948#define MX50_PAD_EIM_CS0__GPIO_1_18 IOMUX_PAD(0x640, 0x2A4, 1, 0x0, 0, NO_PAD_CTRL)
949
950#define MX50_PAD_EIM_EB0__WEIM_EB0 IOMUX_PAD(0x644, 0x2A8, 0, 0x0, 0, NO_PAD_CTRL)
951#define MX50_PAD_EIM_EB0__GPIO_1_19 IOMUX_PAD(0x644, 0x2A8, 1, 0x0, 0, NO_PAD_CTRL)
952
953#define MX50_PAD_EIM_EB1__WEIM_EB1 IOMUX_PAD(0x648, 0x2AC, 0, 0x0, 0, NO_PAD_CTRL)
954#define MX50_PAD_EIM_EB1__GPIO_1_20 IOMUX_PAD(0x648, 0x2AC, 1, 0x0, 0, NO_PAD_CTRL)
955
956#define MX50_PAD_EIM_WAIT__WEIM_WAIT IOMUX_PAD(0x64C, 0x2B0, 0, 0x0, 0, NO_PAD_CTRL)
957#define MX50_PAD_EIM_WAIT__GPIO_1_21 IOMUX_PAD(0x64C, 0x2B0, 1, 0x0, 0, NO_PAD_CTRL)
958
959#define MX50_PAD_EIM_BCLK__WEIM_BCLK IOMUX_PAD(0x650, 0x2B4, 0, 0x0, 0, NO_PAD_CTRL)
960#define MX50_PAD_EIM_BCLK__GPIO_1_22 IOMUX_PAD(0x650, 0x2B4, 1, 0x0, 0, NO_PAD_CTRL)
961
962#define MX50_PAD_EIM_RDY__WEIM_RDY IOMUX_PAD(0x654, 0x2B8, 0, 0x0, 0, NO_PAD_CTRL)
963#define MX50_PAD_EIM_RDY__GPIO_1_23 IOMUX_PAD(0x654, 0x2B8, 1, 0x0, 0, NO_PAD_CTRL)
964
965#define MX50_PAD_EIM_OE__WEIM_OE IOMUX_PAD(0x658, 0x2BC, 0, 0x0, 0, NO_PAD_CTRL)
966#define MX50_PAD_EIM_OE__GPIO_1_24 IOMUX_PAD(0x658, 0x2BC, 1, 0x0, 0, NO_PAD_CTRL)
967
968#define MX50_PAD_EIM_RW__WEIM_RW IOMUX_PAD(0x65C, 0x2C0, 0, 0x0, 0, NO_PAD_CTRL)
969#define MX50_PAD_EIM_RW__GPIO_1_25 IOMUX_PAD(0x65C, 0x2C0, 1, 0x0, 0, NO_PAD_CTRL)
970
971#define MX50_PAD_EIM_LBA__WEIM_LBA IOMUX_PAD(0x660, 0x2C4, 0, 0x0, 0, NO_PAD_CTRL)
972#define MX50_PAD_EIM_LBA__GPIO_1_26 IOMUX_PAD(0x660, 0x2C4, 1, 0x0, 0, NO_PAD_CTRL)
973
974#define MX50_PAD_EIM_CRE__WEIM_CRE IOMUX_PAD(0x664, 0x2C8, 0, 0x0, 0, NO_PAD_CTRL)
975#define MX50_PAD_EIM_CRE__GPIO_1_27 IOMUX_PAD(0x664, 0x2C8, 1, 0x0, 0, NO_PAD_CTRL)
976
977#endif /* __MACH_IOMUX_MX50_H__ */
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c
deleted file mode 100644
index 2fdc9bf2fb5e..000000000000
--- a/arch/arm/mach-imx/lluart.c
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/init.h>
14#include <asm/page.h>
15#include <asm/sizes.h>
16#include <asm/mach/map.h>
17
18#include "hardware.h"
19
20#define IMX6Q_UART1_BASE_ADDR 0x02020000
21#define IMX6Q_UART2_BASE_ADDR 0x021e8000
22#define IMX6Q_UART3_BASE_ADDR 0x021ec000
23#define IMX6Q_UART4_BASE_ADDR 0x021f0000
24#define IMX6Q_UART5_BASE_ADDR 0x021f4000
25
26/*
27 * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
28 * of IMX6Q_UART##n##_BASE_ADDR.
29 */
30#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
31#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n)
32#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
33
34static struct map_desc imx_lluart_desc = {
35#ifdef CONFIG_DEBUG_IMX6Q_UART
36 .virtual = IMX_IO_P2V(IMX6Q_DEBUG_UART_BASE),
37 .pfn = __phys_to_pfn(IMX6Q_DEBUG_UART_BASE),
38 .length = 0x4000,
39 .type = MT_DEVICE,
40#endif
41};
42
43void __init imx_lluart_map_io(void)
44{
45 if (imx_lluart_desc.virtual)
46 iotable_init(&imx_lluart_desc, 1);
47}
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 5c9bd2c66e6d..067580b2969b 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -137,17 +137,13 @@ static void __init apf9328_timer_init(void)
137 mx1_clocks_init(32768); 137 mx1_clocks_init(32768);
138} 138}
139 139
140static struct sys_timer apf9328_timer = {
141 .init = apf9328_timer_init,
142};
143
144MACHINE_START(APF9328, "Armadeus APF9328") 140MACHINE_START(APF9328, "Armadeus APF9328")
145 /* Maintainer: Gwenhael Goavec-Merou, ARMadeus Systems */ 141 /* Maintainer: Gwenhael Goavec-Merou, ARMadeus Systems */
146 .map_io = mx1_map_io, 142 .map_io = mx1_map_io,
147 .init_early = imx1_init_early, 143 .init_early = imx1_init_early,
148 .init_irq = mx1_init_irq, 144 .init_irq = mx1_init_irq,
149 .handle_irq = imx1_handle_irq, 145 .handle_irq = imx1_handle_irq,
150 .timer = &apf9328_timer, 146 .init_time = apf9328_timer_init,
151 .init_machine = apf9328_init, 147 .init_machine = apf9328_init,
152 .restart = mxc_restart, 148 .restart = mxc_restart,
153MACHINE_END 149MACHINE_END
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 59bd6b06a6b5..368a6e3f5926 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -557,10 +557,6 @@ static void __init armadillo5x0_timer_init(void)
557 mx31_clocks_init(26000000); 557 mx31_clocks_init(26000000);
558} 558}
559 559
560static struct sys_timer armadillo5x0_timer = {
561 .init = armadillo5x0_timer_init,
562};
563
564MACHINE_START(ARMADILLO5X0, "Armadillo-500") 560MACHINE_START(ARMADILLO5X0, "Armadillo-500")
565 /* Maintainer: Alberto Panizzo */ 561 /* Maintainer: Alberto Panizzo */
566 .atag_offset = 0x100, 562 .atag_offset = 0x100,
@@ -568,7 +564,7 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500")
568 .init_early = imx31_init_early, 564 .init_early = imx31_init_early,
569 .init_irq = mx31_init_irq, 565 .init_irq = mx31_init_irq,
570 .handle_irq = imx31_handle_irq, 566 .handle_irq = imx31_handle_irq,
571 .timer = &armadillo5x0_timer, 567 .init_time = armadillo5x0_timer_init,
572 .init_machine = armadillo5x0_init, 568 .init_machine = armadillo5x0_init,
573 .restart = mxc_restart, 569 .restart = mxc_restart,
574MACHINE_END 570MACHINE_END
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index 3a39d5aec07a..2d00476f7d2c 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -53,16 +53,12 @@ static void __init bug_timer_init(void)
53 mx31_clocks_init(26000000); 53 mx31_clocks_init(26000000);
54} 54}
55 55
56static struct sys_timer bug_timer = {
57 .init = bug_timer_init,
58};
59
60MACHINE_START(BUG, "BugLabs BUGBase") 56MACHINE_START(BUG, "BugLabs BUGBase")
61 .map_io = mx31_map_io, 57 .map_io = mx31_map_io,
62 .init_early = imx31_init_early, 58 .init_early = imx31_init_early,
63 .init_irq = mx31_init_irq, 59 .init_irq = mx31_init_irq,
64 .handle_irq = imx31_handle_irq, 60 .handle_irq = imx31_handle_irq,
65 .timer = &bug_timer, 61 .init_time = bug_timer_init,
66 .init_machine = bug_board_init, 62 .init_machine = bug_board_init,
67 .restart = mxc_restart, 63 .restart = mxc_restart,
68MACHINE_END 64MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 12a370646b45..146559311bd2 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -309,17 +309,13 @@ static void __init eukrea_cpuimx27_timer_init(void)
309 mx27_clocks_init(26000000); 309 mx27_clocks_init(26000000);
310} 310}
311 311
312static struct sys_timer eukrea_cpuimx27_timer = {
313 .init = eukrea_cpuimx27_timer_init,
314};
315
316MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27") 312MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
317 .atag_offset = 0x100, 313 .atag_offset = 0x100,
318 .map_io = mx27_map_io, 314 .map_io = mx27_map_io,
319 .init_early = imx27_init_early, 315 .init_early = imx27_init_early,
320 .init_irq = mx27_init_irq, 316 .init_irq = mx27_init_irq,
321 .handle_irq = imx27_handle_irq, 317 .handle_irq = imx27_handle_irq,
322 .timer = &eukrea_cpuimx27_timer, 318 .init_time = eukrea_cpuimx27_timer_init,
323 .init_machine = eukrea_cpuimx27_init, 319 .init_machine = eukrea_cpuimx27_init,
324 .restart = mxc_restart, 320 .restart = mxc_restart,
325MACHINE_END 321MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index 5a31bf8c8f4c..771362d1fbee 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -193,10 +193,6 @@ static void __init eukrea_cpuimx35_timer_init(void)
193 mx35_clocks_init(); 193 mx35_clocks_init();
194} 194}
195 195
196static struct sys_timer eukrea_cpuimx35_timer = {
197 .init = eukrea_cpuimx35_timer_init,
198};
199
200MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35") 196MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
201 /* Maintainer: Eukrea Electromatique */ 197 /* Maintainer: Eukrea Electromatique */
202 .atag_offset = 0x100, 198 .atag_offset = 0x100,
@@ -204,7 +200,7 @@ MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
204 .init_early = imx35_init_early, 200 .init_early = imx35_init_early,
205 .init_irq = mx35_init_irq, 201 .init_irq = mx35_init_irq,
206 .handle_irq = imx35_handle_irq, 202 .handle_irq = imx35_handle_irq,
207 .timer = &eukrea_cpuimx35_timer, 203 .init_time = eukrea_cpuimx35_timer_init,
208 .init_machine = eukrea_cpuimx35_init, 204 .init_machine = eukrea_cpuimx35_init,
209 .restart = mxc_restart, 205 .restart = mxc_restart,
210MACHINE_END 206MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
index b727de029c8f..9b7393234f6f 100644
--- a/arch/arm/mach-imx/mach-cpuimx51sd.c
+++ b/arch/arm/mach-imx/mach-cpuimx51sd.c
@@ -355,10 +355,6 @@ static void __init eukrea_cpuimx51sd_timer_init(void)
355 mx51_clocks_init(32768, 24000000, 22579200, 0); 355 mx51_clocks_init(32768, 24000000, 22579200, 0);
356} 356}
357 357
358static struct sys_timer mxc_timer = {
359 .init = eukrea_cpuimx51sd_timer_init,
360};
361
362MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD") 358MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD")
363 /* Maintainer: Eric Bénard <eric@eukrea.com> */ 359 /* Maintainer: Eric Bénard <eric@eukrea.com> */
364 .atag_offset = 0x100, 360 .atag_offset = 0x100,
@@ -366,7 +362,7 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD")
366 .init_early = imx51_init_early, 362 .init_early = imx51_init_early,
367 .init_irq = mx51_init_irq, 363 .init_irq = mx51_init_irq,
368 .handle_irq = imx51_handle_irq, 364 .handle_irq = imx51_handle_irq,
369 .timer = &mxc_timer, 365 .init_time = eukrea_cpuimx51sd_timer_init,
370 .init_machine = eukrea_cpuimx51sd_init, 366 .init_machine = eukrea_cpuimx51sd_init,
371 .init_late = imx51_init_late, 367 .init_late = imx51_init_late,
372 .restart = mxc_restart, 368 .restart = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index 75027a5ad8b7..4bf454424249 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -159,10 +159,6 @@ static void __init eukrea_cpuimx25_timer_init(void)
159 mx25_clocks_init(); 159 mx25_clocks_init();
160} 160}
161 161
162static struct sys_timer eukrea_cpuimx25_timer = {
163 .init = eukrea_cpuimx25_timer_init,
164};
165
166MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25") 162MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
167 /* Maintainer: Eukrea Electromatique */ 163 /* Maintainer: Eukrea Electromatique */
168 .atag_offset = 0x100, 164 .atag_offset = 0x100,
@@ -170,7 +166,7 @@ MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
170 .init_early = imx25_init_early, 166 .init_early = imx25_init_early,
171 .init_irq = mx25_init_irq, 167 .init_irq = mx25_init_irq,
172 .handle_irq = imx25_handle_irq, 168 .handle_irq = imx25_handle_irq,
173 .timer = &eukrea_cpuimx25_timer, 169 .init_time = eukrea_cpuimx25_timer_init,
174 .init_machine = eukrea_cpuimx25_init, 170 .init_machine = eukrea_cpuimx25_init,
175 .restart = mxc_restart, 171 .restart = mxc_restart,
176MACHINE_END 172MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 318bd8df7fcc..29ac8ee651d2 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -598,10 +598,6 @@ static void __init visstrim_m10_timer_init(void)
598 mx27_clocks_init((unsigned long)25000000); 598 mx27_clocks_init((unsigned long)25000000);
599} 599}
600 600
601static struct sys_timer visstrim_m10_timer = {
602 .init = visstrim_m10_timer_init,
603};
604
605MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10") 601MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
606 .atag_offset = 0x100, 602 .atag_offset = 0x100,
607 .reserve = visstrim_reserve, 603 .reserve = visstrim_reserve,
@@ -609,7 +605,7 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
609 .init_early = imx27_init_early, 605 .init_early = imx27_init_early,
610 .init_irq = mx27_init_irq, 606 .init_irq = mx27_init_irq,
611 .handle_irq = imx27_handle_irq, 607 .handle_irq = imx27_handle_irq,
612 .timer = &visstrim_m10_timer, 608 .init_time = visstrim_m10_timer_init,
613 .init_machine = visstrim_m10_board_init, 609 .init_machine = visstrim_m10_board_init,
614 .restart = mxc_restart, 610 .restart = mxc_restart,
615MACHINE_END 611MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 53a860112938..1a851aea6832 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -65,10 +65,6 @@ static void __init mx27ipcam_timer_init(void)
65 mx27_clocks_init(25000000); 65 mx27_clocks_init(25000000);
66} 66}
67 67
68static struct sys_timer mx27ipcam_timer = {
69 .init = mx27ipcam_timer_init,
70};
71
72MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM") 68MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM")
73 /* maintainer: Freescale Semiconductor, Inc. */ 69 /* maintainer: Freescale Semiconductor, Inc. */
74 .atag_offset = 0x100, 70 .atag_offset = 0x100,
@@ -76,7 +72,7 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM")
76 .init_early = imx27_init_early, 72 .init_early = imx27_init_early,
77 .init_irq = mx27_init_irq, 73 .init_irq = mx27_init_irq,
78 .handle_irq = imx27_handle_irq, 74 .handle_irq = imx27_handle_irq,
79 .timer = &mx27ipcam_timer, 75 .init_time = mx27ipcam_timer_init,
80 .init_machine = mx27ipcam_init, 76 .init_machine = mx27ipcam_init,
81 .restart = mxc_restart, 77 .restart = mxc_restart,
82MACHINE_END 78MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index fc8dce931378..3da2e3e44ce9 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -72,17 +72,13 @@ static void __init mx27lite_timer_init(void)
72 mx27_clocks_init(26000000); 72 mx27_clocks_init(26000000);
73} 73}
74 74
75static struct sys_timer mx27lite_timer = {
76 .init = mx27lite_timer_init,
77};
78
79MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") 75MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
80 .atag_offset = 0x100, 76 .atag_offset = 0x100,
81 .map_io = mx27_map_io, 77 .map_io = mx27_map_io,
82 .init_early = imx27_init_early, 78 .init_early = imx27_init_early,
83 .init_irq = mx27_init_irq, 79 .init_irq = mx27_init_irq,
84 .handle_irq = imx27_handle_irq, 80 .handle_irq = imx27_handle_irq,
85 .timer = &mx27lite_timer, 81 .init_time = mx27lite_timer_init,
86 .init_machine = mx27lite_init, 82 .init_machine = mx27lite_init,
87 .restart = mxc_restart, 83 .restart = mxc_restart,
88MACHINE_END 84MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c
index 860284dea0e7..f579c616feed 100644
--- a/arch/arm/mach-imx/mach-imx53.c
+++ b/arch/arm/mach-imx/mach-imx53.c
@@ -44,26 +44,22 @@ static void __init imx53_dt_init(void)
44 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 44 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
45} 45}
46 46
47static void __init imx53_timer_init(void)
48{
49 mx53_clocks_init_dt();
50}
51
52static struct sys_timer imx53_timer = {
53 .init = imx53_timer_init,
54};
55
56static const char *imx53_dt_board_compat[] __initdata = { 47static const char *imx53_dt_board_compat[] __initdata = {
57 "fsl,imx53", 48 "fsl,imx53",
58 NULL 49 NULL
59}; 50};
60 51
52static void __init imx53_timer_init(void)
53{
54 mx53_clocks_init_dt();
55}
56
61DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)") 57DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
62 .map_io = mx53_map_io, 58 .map_io = mx53_map_io,
63 .init_early = imx53_init_early, 59 .init_early = imx53_init_early,
64 .init_irq = mx53_init_irq, 60 .init_irq = mx53_init_irq,
65 .handle_irq = imx53_handle_irq, 61 .handle_irq = imx53_handle_irq,
66 .timer = &imx53_timer, 62 .init_time = imx53_timer_init,
67 .init_machine = imx53_dt_init, 63 .init_machine = imx53_dt_init,
68 .init_late = imx53_init_late, 64 .init_late = imx53_init_late,
69 .dt_compat = imx53_dt_board_compat, 65 .dt_compat = imx53_dt_board_compat,
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 4eb1b3ac794c..1786b2d1257e 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -12,12 +12,12 @@
12 12
13#include <linux/clk.h> 13#include <linux/clk.h>
14#include <linux/clkdev.h> 14#include <linux/clkdev.h>
15#include <linux/cpuidle.h>
16#include <linux/delay.h> 15#include <linux/delay.h>
17#include <linux/export.h> 16#include <linux/export.h>
18#include <linux/init.h> 17#include <linux/init.h>
19#include <linux/io.h> 18#include <linux/io.h>
20#include <linux/irq.h> 19#include <linux/irq.h>
20#include <linux/irqchip.h>
21#include <linux/of.h> 21#include <linux/of.h>
22#include <linux/of_address.h> 22#include <linux/of_address.h>
23#include <linux/of_irq.h> 23#include <linux/of_irq.h>
@@ -26,11 +26,10 @@
26#include <linux/regmap.h> 26#include <linux/regmap.h>
27#include <linux/micrel_phy.h> 27#include <linux/micrel_phy.h>
28#include <linux/mfd/syscon.h> 28#include <linux/mfd/syscon.h>
29#include <asm/cpuidle.h>
30#include <asm/smp_twd.h> 29#include <asm/smp_twd.h>
31#include <asm/hardware/cache-l2x0.h> 30#include <asm/hardware/cache-l2x0.h>
32#include <asm/hardware/gic.h>
33#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/mach/map.h>
34#include <asm/mach/time.h> 33#include <asm/mach/time.h>
35#include <asm/system_misc.h> 34#include <asm/system_misc.h>
36 35
@@ -201,37 +200,28 @@ static void __init imx6q_init_machine(void)
201 imx6q_1588_init(); 200 imx6q_1588_init();
202} 201}
203 202
204static struct cpuidle_driver imx6q_cpuidle_driver = {
205 .name = "imx6q_cpuidle",
206 .owner = THIS_MODULE,
207 .en_core_tk_irqen = 1,
208 .states[0] = ARM_CPUIDLE_WFI_STATE,
209 .state_count = 1,
210};
211
212static void __init imx6q_init_late(void) 203static void __init imx6q_init_late(void)
213{ 204{
214 imx_cpuidle_init(&imx6q_cpuidle_driver); 205 /*
206 * WAIT mode is broken on TO 1.0 and 1.1, so there is no point
207 * to run cpuidle on them.
208 */
209 if (imx6q_revision() > IMX_CHIP_REVISION_1_1)
210 imx6q_cpuidle_init();
215} 211}
216 212
217static void __init imx6q_map_io(void) 213static void __init imx6q_map_io(void)
218{ 214{
219 imx_lluart_map_io(); 215 debug_ll_io_init();
220 imx_scu_map_io(); 216 imx_scu_map_io();
221 imx6q_clock_map_io();
222} 217}
223 218
224static const struct of_device_id imx6q_irq_match[] __initconst = {
225 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
226 { /* sentinel */ }
227};
228
229static void __init imx6q_init_irq(void) 219static void __init imx6q_init_irq(void)
230{ 220{
231 l2x0_of_init(0, ~0UL); 221 l2x0_of_init(0, ~0UL);
232 imx_src_init(); 222 imx_src_init();
233 imx_gpc_init(); 223 imx_gpc_init();
234 of_irq_init(imx6q_irq_match); 224 irqchip_init();
235} 225}
236 226
237static void __init imx6q_timer_init(void) 227static void __init imx6q_timer_init(void)
@@ -241,10 +231,6 @@ static void __init imx6q_timer_init(void)
241 imx_print_silicon_rev("i.MX6Q", imx6q_revision()); 231 imx_print_silicon_rev("i.MX6Q", imx6q_revision());
242} 232}
243 233
244static struct sys_timer imx6q_timer = {
245 .init = imx6q_timer_init,
246};
247
248static const char *imx6q_dt_compat[] __initdata = { 234static const char *imx6q_dt_compat[] __initdata = {
249 "fsl,imx6q", 235 "fsl,imx6q",
250 NULL, 236 NULL,
@@ -254,8 +240,7 @@ DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
254 .smp = smp_ops(imx_smp_ops), 240 .smp = smp_ops(imx_smp_ops),
255 .map_io = imx6q_map_io, 241 .map_io = imx6q_map_io,
256 .init_irq = imx6q_init_irq, 242 .init_irq = imx6q_init_irq,
257 .handle_irq = imx6q_handle_irq, 243 .init_time = imx6q_timer_init,
258 .timer = &imx6q_timer,
259 .init_machine = imx6q_init_machine, 244 .init_machine = imx6q_init_machine,
260 .init_late = imx6q_init_late, 245 .init_late = imx6q_init_late,
261 .dt_compat = imx6q_dt_compat, 246 .dt_compat = imx6q_dt_compat,
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 2e536ea53444..c7bc41d6b468 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -284,17 +284,13 @@ static void __init kzm_timer_init(void)
284 mx31_clocks_init(26000000); 284 mx31_clocks_init(26000000);
285} 285}
286 286
287static struct sys_timer kzm_timer = {
288 .init = kzm_timer_init,
289};
290
291MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") 287MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
292 .atag_offset = 0x100, 288 .atag_offset = 0x100,
293 .map_io = kzm_map_io, 289 .map_io = kzm_map_io,
294 .init_early = imx31_init_early, 290 .init_early = imx31_init_early,
295 .init_irq = mx31_init_irq, 291 .init_irq = mx31_init_irq,
296 .handle_irq = imx31_handle_irq, 292 .handle_irq = imx31_handle_irq,
297 .timer = &kzm_timer, 293 .init_time = kzm_timer_init,
298 .init_machine = kzm_board_init, 294 .init_machine = kzm_board_init,
299 .restart = mxc_restart, 295 .restart = mxc_restart,
300MACHINE_END 296MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index 06b483783e68..9f883e4d6fc9 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -132,10 +132,6 @@ static void __init mx1ads_timer_init(void)
132 mx1_clocks_init(32000); 132 mx1_clocks_init(32000);
133} 133}
134 134
135static struct sys_timer mx1ads_timer = {
136 .init = mx1ads_timer_init,
137};
138
139MACHINE_START(MX1ADS, "Freescale MX1ADS") 135MACHINE_START(MX1ADS, "Freescale MX1ADS")
140 /* Maintainer: Sascha Hauer, Pengutronix */ 136 /* Maintainer: Sascha Hauer, Pengutronix */
141 .atag_offset = 0x100, 137 .atag_offset = 0x100,
@@ -143,7 +139,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
143 .init_early = imx1_init_early, 139 .init_early = imx1_init_early,
144 .init_irq = mx1_init_irq, 140 .init_irq = mx1_init_irq,
145 .handle_irq = imx1_handle_irq, 141 .handle_irq = imx1_handle_irq,
146 .timer = &mx1ads_timer, 142 .init_time = mx1ads_timer_init,
147 .init_machine = mx1ads_init, 143 .init_machine = mx1ads_init,
148 .restart = mxc_restart, 144 .restart = mxc_restart,
149MACHINE_END 145MACHINE_END
@@ -154,7 +150,7 @@ MACHINE_START(MXLADS, "Freescale MXLADS")
154 .init_early = imx1_init_early, 150 .init_early = imx1_init_early,
155 .init_irq = mx1_init_irq, 151 .init_irq = mx1_init_irq,
156 .handle_irq = imx1_handle_irq, 152 .handle_irq = imx1_handle_irq,
157 .timer = &mx1ads_timer, 153 .init_time = mx1ads_timer_init,
158 .init_machine = mx1ads_init, 154 .init_machine = mx1ads_init,
159 .restart = mxc_restart, 155 .restart = mxc_restart,
160MACHINE_END 156MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index 6adb3136bb08..a06aa4dc37fc 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -318,10 +318,6 @@ static void __init mx21ads_timer_init(void)
318 mx21_clocks_init(32768, 26000000); 318 mx21_clocks_init(32768, 26000000);
319} 319}
320 320
321static struct sys_timer mx21ads_timer = {
322 .init = mx21ads_timer_init,
323};
324
325MACHINE_START(MX21ADS, "Freescale i.MX21ADS") 321MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
326 /* maintainer: Freescale Semiconductor, Inc. */ 322 /* maintainer: Freescale Semiconductor, Inc. */
327 .atag_offset = 0x100, 323 .atag_offset = 0x100,
@@ -329,7 +325,7 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
329 .init_early = imx21_init_early, 325 .init_early = imx21_init_early,
330 .init_irq = mx21_init_irq, 326 .init_irq = mx21_init_irq,
331 .handle_irq = imx21_handle_irq, 327 .handle_irq = imx21_handle_irq,
332 .timer = &mx21ads_timer, 328 .init_time = mx21ads_timer_init,
333 .init_machine = mx21ads_board_init, 329 .init_machine = mx21ads_board_init,
334 .restart = mxc_restart, 330 .restart = mxc_restart,
335MACHINE_END 331MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index b1b03aa55bb8..8bcda688a006 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -257,10 +257,6 @@ static void __init mx25pdk_timer_init(void)
257 mx25_clocks_init(); 257 mx25_clocks_init();
258} 258}
259 259
260static struct sys_timer mx25pdk_timer = {
261 .init = mx25pdk_timer_init,
262};
263
264MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)") 260MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
265 /* Maintainer: Freescale Semiconductor, Inc. */ 261 /* Maintainer: Freescale Semiconductor, Inc. */
266 .atag_offset = 0x100, 262 .atag_offset = 0x100,
@@ -268,7 +264,7 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
268 .init_early = imx25_init_early, 264 .init_early = imx25_init_early,
269 .init_irq = mx25_init_irq, 265 .init_irq = mx25_init_irq,
270 .handle_irq = imx25_handle_irq, 266 .handle_irq = imx25_handle_irq,
271 .timer = &mx25pdk_timer, 267 .init_time = mx25pdk_timer_init,
272 .init_machine = mx25pdk_init, 268 .init_machine = mx25pdk_init,
273 .restart = mxc_restart, 269 .restart = mxc_restart,
274MACHINE_END 270MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index d0e547fa925f..25b3e4c9bc0a 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -538,10 +538,6 @@ static void __init mx27pdk_timer_init(void)
538 mx27_clocks_init(26000000); 538 mx27_clocks_init(26000000);
539} 539}
540 540
541static struct sys_timer mx27pdk_timer = {
542 .init = mx27pdk_timer_init,
543};
544
545MACHINE_START(MX27_3DS, "Freescale MX27PDK") 541MACHINE_START(MX27_3DS, "Freescale MX27PDK")
546 /* maintainer: Freescale Semiconductor, Inc. */ 542 /* maintainer: Freescale Semiconductor, Inc. */
547 .atag_offset = 0x100, 543 .atag_offset = 0x100,
@@ -549,7 +545,7 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK")
549 .init_early = imx27_init_early, 545 .init_early = imx27_init_early,
550 .init_irq = mx27_init_irq, 546 .init_irq = mx27_init_irq,
551 .handle_irq = imx27_handle_irq, 547 .handle_irq = imx27_handle_irq,
552 .timer = &mx27pdk_timer, 548 .init_time = mx27pdk_timer_init,
553 .init_machine = mx27pdk_init, 549 .init_machine = mx27pdk_init,
554 .restart = mxc_restart, 550 .restart = mxc_restart,
555MACHINE_END 551MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index 3d036f57f0e6..9821b824dcaf 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -323,10 +323,6 @@ static void __init mx27ads_timer_init(void)
323 mx27_clocks_init(fref); 323 mx27_clocks_init(fref);
324} 324}
325 325
326static struct sys_timer mx27ads_timer = {
327 .init = mx27ads_timer_init,
328};
329
330static struct map_desc mx27ads_io_desc[] __initdata = { 326static struct map_desc mx27ads_io_desc[] __initdata = {
331 { 327 {
332 .virtual = PBC_BASE_ADDRESS, 328 .virtual = PBC_BASE_ADDRESS,
@@ -349,7 +345,7 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
349 .init_early = imx27_init_early, 345 .init_early = imx27_init_early,
350 .init_irq = mx27_init_irq, 346 .init_irq = mx27_init_irq,
351 .handle_irq = imx27_handle_irq, 347 .handle_irq = imx27_handle_irq,
352 .timer = &mx27ads_timer, 348 .init_time = mx27ads_timer_init,
353 .init_machine = mx27ads_board_init, 349 .init_machine = mx27ads_board_init,
354 .restart = mxc_restart, 350 .restart = mxc_restart,
355MACHINE_END 351MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index bc301befdd06..1ed916175d41 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -762,10 +762,6 @@ static void __init mx31_3ds_timer_init(void)
762 mx31_clocks_init(26000000); 762 mx31_clocks_init(26000000);
763} 763}
764 764
765static struct sys_timer mx31_3ds_timer = {
766 .init = mx31_3ds_timer_init,
767};
768
769static void __init mx31_3ds_reserve(void) 765static void __init mx31_3ds_reserve(void)
770{ 766{
771 /* reserve MX31_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */ 767 /* reserve MX31_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
@@ -780,7 +776,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
780 .init_early = imx31_init_early, 776 .init_early = imx31_init_early,
781 .init_irq = mx31_init_irq, 777 .init_irq = mx31_init_irq,
782 .handle_irq = imx31_handle_irq, 778 .handle_irq = imx31_handle_irq,
783 .timer = &mx31_3ds_timer, 779 .init_time = mx31_3ds_timer_init,
784 .init_machine = mx31_3ds_init, 780 .init_machine = mx31_3ds_init,
785 .reserve = mx31_3ds_reserve, 781 .reserve = mx31_3ds_reserve,
786 .restart = mxc_restart, 782 .restart = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index 8b56f8883f32..daf8889125cc 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -576,10 +576,6 @@ static void __init mx31ads_timer_init(void)
576 mx31_clocks_init(26000000); 576 mx31_clocks_init(26000000);
577} 577}
578 578
579static struct sys_timer mx31ads_timer = {
580 .init = mx31ads_timer_init,
581};
582
583MACHINE_START(MX31ADS, "Freescale MX31ADS") 579MACHINE_START(MX31ADS, "Freescale MX31ADS")
584 /* Maintainer: Freescale Semiconductor, Inc. */ 580 /* Maintainer: Freescale Semiconductor, Inc. */
585 .atag_offset = 0x100, 581 .atag_offset = 0x100,
@@ -587,7 +583,7 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS")
587 .init_early = imx31_init_early, 583 .init_early = imx31_init_early,
588 .init_irq = mx31ads_init_irq, 584 .init_irq = mx31ads_init_irq,
589 .handle_irq = imx31_handle_irq, 585 .handle_irq = imx31_handle_irq,
590 .timer = &mx31ads_timer, 586 .init_time = mx31ads_timer_init,
591 .init_machine = mx31ads_init, 587 .init_machine = mx31ads_init,
592 .restart = mxc_restart, 588 .restart = mxc_restart,
593MACHINE_END 589MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 08b9965c8b36..832b1e2f964e 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -303,17 +303,13 @@ static void __init mx31lilly_timer_init(void)
303 mx31_clocks_init(26000000); 303 mx31_clocks_init(26000000);
304} 304}
305 305
306static struct sys_timer mx31lilly_timer = {
307 .init = mx31lilly_timer_init,
308};
309
310MACHINE_START(LILLY1131, "INCO startec LILLY-1131") 306MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
311 .atag_offset = 0x100, 307 .atag_offset = 0x100,
312 .map_io = mx31_map_io, 308 .map_io = mx31_map_io,
313 .init_early = imx31_init_early, 309 .init_early = imx31_init_early,
314 .init_irq = mx31_init_irq, 310 .init_irq = mx31_init_irq,
315 .handle_irq = imx31_handle_irq, 311 .handle_irq = imx31_handle_irq,
316 .timer = &mx31lilly_timer, 312 .init_time = mx31lilly_timer_init,
317 .init_machine = mx31lilly_board_init, 313 .init_machine = mx31lilly_board_init,
318 .restart = mxc_restart, 314 .restart = mxc_restart,
319MACHINE_END 315MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index bdcd92e59518..bea07299b61a 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -285,10 +285,6 @@ static void __init mx31lite_timer_init(void)
285 mx31_clocks_init(26000000); 285 mx31_clocks_init(26000000);
286} 286}
287 287
288static struct sys_timer mx31lite_timer = {
289 .init = mx31lite_timer_init,
290};
291
292MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") 288MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
293 /* Maintainer: Freescale Semiconductor, Inc. */ 289 /* Maintainer: Freescale Semiconductor, Inc. */
294 .atag_offset = 0x100, 290 .atag_offset = 0x100,
@@ -296,7 +292,7 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
296 .init_early = imx31_init_early, 292 .init_early = imx31_init_early,
297 .init_irq = mx31_init_irq, 293 .init_irq = mx31_init_irq,
298 .handle_irq = imx31_handle_irq, 294 .handle_irq = imx31_handle_irq,
299 .timer = &mx31lite_timer, 295 .init_time = mx31lite_timer_init,
300 .init_machine = mx31lite_init, 296 .init_machine = mx31lite_init,
301 .restart = mxc_restart, 297 .restart = mxc_restart,
302MACHINE_END 298MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index 2517cfa9f26b..dae4cd7be040 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -596,10 +596,6 @@ static void __init mx31moboard_timer_init(void)
596 mx31_clocks_init(26000000); 596 mx31_clocks_init(26000000);
597} 597}
598 598
599static struct sys_timer mx31moboard_timer = {
600 .init = mx31moboard_timer_init,
601};
602
603static void __init mx31moboard_reserve(void) 599static void __init mx31moboard_reserve(void)
604{ 600{
605 /* reserve 4 MiB for mx3-camera */ 601 /* reserve 4 MiB for mx3-camera */
@@ -615,7 +611,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
615 .init_early = imx31_init_early, 611 .init_early = imx31_init_early,
616 .init_irq = mx31_init_irq, 612 .init_irq = mx31_init_irq,
617 .handle_irq = imx31_handle_irq, 613 .handle_irq = imx31_handle_irq,
618 .timer = &mx31moboard_timer, 614 .init_time = mx31moboard_timer_init,
619 .init_machine = mx31moboard_init, 615 .init_machine = mx31moboard_init,
620 .restart = mxc_restart, 616 .restart = mxc_restart,
621MACHINE_END 617MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 5277da45d60c..a42f4f07051f 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -602,10 +602,6 @@ static void __init mx35pdk_timer_init(void)
602 mx35_clocks_init(); 602 mx35_clocks_init();
603} 603}
604 604
605static struct sys_timer mx35pdk_timer = {
606 .init = mx35pdk_timer_init,
607};
608
609static void __init mx35_3ds_reserve(void) 605static void __init mx35_3ds_reserve(void)
610{ 606{
611 /* reserve MX35_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */ 607 /* reserve MX35_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
@@ -620,7 +616,7 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK")
620 .init_early = imx35_init_early, 616 .init_early = imx35_init_early,
621 .init_irq = mx35_init_irq, 617 .init_irq = mx35_init_irq,
622 .handle_irq = imx35_handle_irq, 618 .handle_irq = imx35_handle_irq,
623 .timer = &mx35pdk_timer, 619 .init_time = mx35pdk_timer_init,
624 .init_machine = mx35_3ds_init, 620 .init_machine = mx35_3ds_init,
625 .reserve = mx35_3ds_reserve, 621 .reserve = mx35_3ds_reserve,
626 .restart = mxc_restart, 622 .restart = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mx50_rdp.c b/arch/arm/mach-imx/mach-mx50_rdp.c
deleted file mode 100644
index 0c1f88a80bdc..000000000000
--- a/arch/arm/mach-imx/mach-mx50_rdp.c
+++ /dev/null
@@ -1,225 +0,0 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/gpio.h>
24#include <linux/delay.h>
25#include <linux/io.h>
26
27#include <asm/irq.h>
28#include <asm/setup.h>
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/time.h>
32
33#include "common.h"
34#include "devices-imx50.h"
35#include "hardware.h"
36#include "iomux-mx50.h"
37
38#define FEC_EN IMX_GPIO_NR(6, 23)
39#define FEC_RESET_B IMX_GPIO_NR(4, 12)
40
41static iomux_v3_cfg_t mx50_rdp_pads[] __initdata = {
42 /* SD1 */
43 MX50_PAD_ECSPI2_SS0__GPIO_4_19,
44 MX50_PAD_EIM_CRE__GPIO_1_27,
45 MX50_PAD_SD1_CMD__SD1_CMD,
46
47 MX50_PAD_SD1_CLK__SD1_CLK,
48 MX50_PAD_SD1_D0__SD1_D0,
49 MX50_PAD_SD1_D1__SD1_D1,
50 MX50_PAD_SD1_D2__SD1_D2,
51 MX50_PAD_SD1_D3__SD1_D3,
52
53 /* SD2 */
54 MX50_PAD_SD2_CD__GPIO_5_17,
55 MX50_PAD_SD2_WP__GPIO_5_16,
56 MX50_PAD_SD2_CMD__SD2_CMD,
57 MX50_PAD_SD2_CLK__SD2_CLK,
58 MX50_PAD_SD2_D0__SD2_D0,
59 MX50_PAD_SD2_D1__SD2_D1,
60 MX50_PAD_SD2_D2__SD2_D2,
61 MX50_PAD_SD2_D3__SD2_D3,
62 MX50_PAD_SD2_D4__SD2_D4,
63 MX50_PAD_SD2_D5__SD2_D5,
64 MX50_PAD_SD2_D6__SD2_D6,
65 MX50_PAD_SD2_D7__SD2_D7,
66
67 /* SD3 */
68 MX50_PAD_SD3_CMD__SD3_CMD,
69 MX50_PAD_SD3_CLK__SD3_CLK,
70 MX50_PAD_SD3_D0__SD3_D0,
71 MX50_PAD_SD3_D1__SD3_D1,
72 MX50_PAD_SD3_D2__SD3_D2,
73 MX50_PAD_SD3_D3__SD3_D3,
74 MX50_PAD_SD3_D4__SD3_D4,
75 MX50_PAD_SD3_D5__SD3_D5,
76 MX50_PAD_SD3_D6__SD3_D6,
77 MX50_PAD_SD3_D7__SD3_D7,
78
79 /* PWR_INT */
80 MX50_PAD_ECSPI2_MISO__GPIO_4_18,
81
82 /* UART pad setting */
83 MX50_PAD_UART1_TXD__UART1_TXD,
84 MX50_PAD_UART1_RXD__UART1_RXD,
85 MX50_PAD_UART1_RTS__UART1_RTS,
86 MX50_PAD_UART2_TXD__UART2_TXD,
87 MX50_PAD_UART2_RXD__UART2_RXD,
88 MX50_PAD_UART2_CTS__UART2_CTS,
89 MX50_PAD_UART2_RTS__UART2_RTS,
90
91 MX50_PAD_I2C1_SCL__I2C1_SCL,
92 MX50_PAD_I2C1_SDA__I2C1_SDA,
93 MX50_PAD_I2C2_SCL__I2C2_SCL,
94 MX50_PAD_I2C2_SDA__I2C2_SDA,
95
96 MX50_PAD_EPITO__USBH1_PWR,
97 /* Need to comment below line if
98 * one needs to debug owire.
99 */
100 MX50_PAD_OWIRE__USBH1_OC,
101 /* using gpio to control otg pwr */
102 MX50_PAD_PWM2__GPIO_6_25,
103 MX50_PAD_I2C3_SCL__USBOTG_OC,
104
105 MX50_PAD_SSI_RXC__FEC_MDIO,
106 MX50_PAD_SSI_RXFS__FEC_MDC,
107 MX50_PAD_DISP_D0__FEC_TXCLK,
108 MX50_PAD_DISP_D1__FEC_RX_ER,
109 MX50_PAD_DISP_D2__FEC_RX_DV,
110 MX50_PAD_DISP_D3__FEC_RXD1,
111 MX50_PAD_DISP_D4__FEC_RXD0,
112 MX50_PAD_DISP_D5__FEC_TX_EN,
113 MX50_PAD_DISP_D6__FEC_TXD1,
114 MX50_PAD_DISP_D7__FEC_TXD0,
115 MX50_PAD_I2C3_SDA__GPIO_6_23,
116 MX50_PAD_ECSPI1_SCLK__GPIO_4_12,
117
118 MX50_PAD_CSPI_SS0__CSPI_SS0,
119 MX50_PAD_ECSPI1_MOSI__CSPI_SS1,
120 MX50_PAD_CSPI_MOSI__CSPI_MOSI,
121 MX50_PAD_CSPI_MISO__CSPI_MISO,
122
123 /* SGTL500_OSC_EN */
124 MX50_PAD_UART1_CTS__GPIO_6_8,
125
126 /* SGTL_AMP_SHDN */
127 MX50_PAD_UART3_RXD__GPIO_6_15,
128
129 /* Keypad */
130 MX50_PAD_KEY_COL0__KEY_COL0,
131 MX50_PAD_KEY_ROW0__KEY_ROW0,
132 MX50_PAD_KEY_COL1__KEY_COL1,
133 MX50_PAD_KEY_ROW1__KEY_ROW1,
134 MX50_PAD_KEY_COL2__KEY_COL2,
135 MX50_PAD_KEY_ROW2__KEY_ROW2,
136 MX50_PAD_KEY_COL3__KEY_COL3,
137 MX50_PAD_KEY_ROW3__KEY_ROW3,
138 MX50_PAD_EIM_DA0__KEY_COL4,
139 MX50_PAD_EIM_DA1__KEY_ROW4,
140 MX50_PAD_EIM_DA2__KEY_COL5,
141 MX50_PAD_EIM_DA3__KEY_ROW5,
142 MX50_PAD_EIM_DA4__KEY_COL6,
143 MX50_PAD_EIM_DA5__KEY_ROW6,
144 MX50_PAD_EIM_DA6__KEY_COL7,
145 MX50_PAD_EIM_DA7__KEY_ROW7,
146 /*EIM pads */
147 MX50_PAD_EIM_DA8__GPIO_1_8,
148 MX50_PAD_EIM_DA9__GPIO_1_9,
149 MX50_PAD_EIM_DA10__GPIO_1_10,
150 MX50_PAD_EIM_DA11__GPIO_1_11,
151 MX50_PAD_EIM_DA12__GPIO_1_12,
152 MX50_PAD_EIM_DA13__GPIO_1_13,
153 MX50_PAD_EIM_DA14__GPIO_1_14,
154 MX50_PAD_EIM_DA15__GPIO_1_15,
155 MX50_PAD_EIM_CS2__GPIO_1_16,
156 MX50_PAD_EIM_CS1__GPIO_1_17,
157 MX50_PAD_EIM_CS0__GPIO_1_18,
158 MX50_PAD_EIM_EB0__GPIO_1_19,
159 MX50_PAD_EIM_EB1__GPIO_1_20,
160 MX50_PAD_EIM_WAIT__GPIO_1_21,
161 MX50_PAD_EIM_BCLK__GPIO_1_22,
162 MX50_PAD_EIM_RDY__GPIO_1_23,
163 MX50_PAD_EIM_OE__GPIO_1_24,
164};
165
166/* Serial ports */
167static const struct imxuart_platform_data uart_pdata __initconst = {
168 .flags = IMXUART_HAVE_RTSCTS,
169};
170
171static const struct fec_platform_data fec_data __initconst = {
172 .phy = PHY_INTERFACE_MODE_RMII,
173};
174
175static inline void mx50_rdp_fec_reset(void)
176{
177 gpio_request(FEC_EN, "fec-en");
178 gpio_direction_output(FEC_EN, 0);
179 gpio_request(FEC_RESET_B, "fec-reset_b");
180 gpio_direction_output(FEC_RESET_B, 0);
181 msleep(1);
182 gpio_set_value(FEC_RESET_B, 1);
183}
184
185static const struct imxi2c_platform_data i2c_data __initconst = {
186 .bitrate = 100000,
187};
188
189/*
190 * Board specific initialization.
191 */
192static void __init mx50_rdp_board_init(void)
193{
194 imx50_soc_init();
195
196 mxc_iomux_v3_setup_multiple_pads(mx50_rdp_pads,
197 ARRAY_SIZE(mx50_rdp_pads));
198
199 imx50_add_imx_uart(0, &uart_pdata);
200 imx50_add_imx_uart(1, &uart_pdata);
201 mx50_rdp_fec_reset();
202 imx50_add_fec(&fec_data);
203 imx50_add_imx_i2c(0, &i2c_data);
204 imx50_add_imx_i2c(1, &i2c_data);
205 imx50_add_imx_i2c(2, &i2c_data);
206}
207
208static void __init mx50_rdp_timer_init(void)
209{
210 mx50_clocks_init(32768, 24000000, 22579200);
211}
212
213static struct sys_timer mx50_rdp_timer = {
214 .init = mx50_rdp_timer_init,
215};
216
217MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform")
218 .map_io = mx50_map_io,
219 .init_early = imx50_init_early,
220 .init_irq = mx50_init_irq,
221 .handle_irq = imx50_handle_irq,
222 .timer = &mx50_rdp_timer,
223 .init_machine = mx50_rdp_board_init,
224 .restart = mxc_restart,
225MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c
deleted file mode 100644
index abc25bd1107b..000000000000
--- a/arch/arm/mach-imx/mach-mx51_3ds.c
+++ /dev/null
@@ -1,178 +0,0 @@
1/*
2 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2010 Jason Wang <jason77.wang@gmail.com>
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/irq.h>
14#include <linux/platform_device.h>
15#include <linux/spi/spi.h>
16#include <linux/gpio.h>
17
18#include <asm/mach-types.h>
19#include <asm/mach/arch.h>
20#include <asm/mach/time.h>
21
22#include "3ds_debugboard.h"
23#include "common.h"
24#include "devices-imx51.h"
25#include "hardware.h"
26#include "iomux-mx51.h"
27
28#define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28)
29
30static iomux_v3_cfg_t mx51_3ds_pads[] = {
31 /* UART1 */
32 MX51_PAD_UART1_RXD__UART1_RXD,
33 MX51_PAD_UART1_TXD__UART1_TXD,
34 MX51_PAD_UART1_RTS__UART1_RTS,
35 MX51_PAD_UART1_CTS__UART1_CTS,
36
37 /* UART2 */
38 MX51_PAD_UART2_RXD__UART2_RXD,
39 MX51_PAD_UART2_TXD__UART2_TXD,
40 MX51_PAD_EIM_D25__UART2_CTS,
41 MX51_PAD_EIM_D26__UART2_RTS,
42
43 /* UART3 */
44 MX51_PAD_UART3_RXD__UART3_RXD,
45 MX51_PAD_UART3_TXD__UART3_TXD,
46 MX51_PAD_EIM_D24__UART3_CTS,
47 MX51_PAD_EIM_D27__UART3_RTS,
48
49 /* CPLD PARENT IRQ PIN */
50 MX51_PAD_GPIO1_6__GPIO1_6,
51
52 /* KPP */
53 MX51_PAD_KEY_ROW0__KEY_ROW0,
54 MX51_PAD_KEY_ROW1__KEY_ROW1,
55 MX51_PAD_KEY_ROW2__KEY_ROW2,
56 MX51_PAD_KEY_ROW3__KEY_ROW3,
57 MX51_PAD_KEY_COL0__KEY_COL0,
58 MX51_PAD_KEY_COL1__KEY_COL1,
59 MX51_PAD_KEY_COL2__KEY_COL2,
60 MX51_PAD_KEY_COL3__KEY_COL3,
61 MX51_PAD_KEY_COL4__KEY_COL4,
62 MX51_PAD_KEY_COL5__KEY_COL5,
63
64 /* eCSPI2 */
65 MX51_PAD_NANDF_RB2__ECSPI2_SCLK,
66 MX51_PAD_NANDF_RB3__ECSPI2_MISO,
67 MX51_PAD_NANDF_D15__ECSPI2_MOSI,
68 MX51_PAD_NANDF_D12__GPIO3_28,
69};
70
71/* Serial ports */
72static const struct imxuart_platform_data uart_pdata __initconst = {
73 .flags = IMXUART_HAVE_RTSCTS,
74};
75
76static int mx51_3ds_board_keymap[] = {
77 KEY(0, 0, KEY_1),
78 KEY(0, 1, KEY_2),
79 KEY(0, 2, KEY_3),
80 KEY(0, 3, KEY_F1),
81 KEY(0, 4, KEY_UP),
82 KEY(0, 5, KEY_F2),
83
84 KEY(1, 0, KEY_4),
85 KEY(1, 1, KEY_5),
86 KEY(1, 2, KEY_6),
87 KEY(1, 3, KEY_LEFT),
88 KEY(1, 4, KEY_SELECT),
89 KEY(1, 5, KEY_RIGHT),
90
91 KEY(2, 0, KEY_7),
92 KEY(2, 1, KEY_8),
93 KEY(2, 2, KEY_9),
94 KEY(2, 3, KEY_F3),
95 KEY(2, 4, KEY_DOWN),
96 KEY(2, 5, KEY_F4),
97
98 KEY(3, 0, KEY_0),
99 KEY(3, 1, KEY_OK),
100 KEY(3, 2, KEY_ESC),
101 KEY(3, 3, KEY_ENTER),
102 KEY(3, 4, KEY_MENU),
103 KEY(3, 5, KEY_BACK)
104};
105
106static const struct matrix_keymap_data mx51_3ds_map_data __initconst = {
107 .keymap = mx51_3ds_board_keymap,
108 .keymap_size = ARRAY_SIZE(mx51_3ds_board_keymap),
109};
110
111static int mx51_3ds_spi2_cs[] = {
112 MXC_SPI_CS(0),
113 MX51_3DS_ECSPI2_CS,
114};
115
116static const struct spi_imx_master mx51_3ds_ecspi2_pdata __initconst = {
117 .chipselect = mx51_3ds_spi2_cs,
118 .num_chipselect = ARRAY_SIZE(mx51_3ds_spi2_cs),
119};
120
121static struct spi_board_info mx51_3ds_spi_nor_device[] = {
122 {
123 .modalias = "m25p80",
124 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
125 .bus_num = 1,
126 .chip_select = 1,
127 .mode = SPI_MODE_0,
128 .platform_data = NULL,},
129};
130
131/*
132 * Board specific initialization.
133 */
134static void __init mx51_3ds_init(void)
135{
136 imx51_soc_init();
137
138 mxc_iomux_v3_setup_multiple_pads(mx51_3ds_pads,
139 ARRAY_SIZE(mx51_3ds_pads));
140
141 imx51_add_imx_uart(0, &uart_pdata);
142 imx51_add_imx_uart(1, &uart_pdata);
143 imx51_add_imx_uart(2, &uart_pdata);
144
145 imx51_add_ecspi(1, &mx51_3ds_ecspi2_pdata);
146 spi_register_board_info(mx51_3ds_spi_nor_device,
147 ARRAY_SIZE(mx51_3ds_spi_nor_device));
148
149 if (mxc_expio_init(MX51_CS5_BASE_ADDR, IMX_GPIO_NR(1, 6)))
150 printk(KERN_WARNING "Init of the debugboard failed, all "
151 "devices on the board are unusable.\n");
152
153 imx51_add_sdhci_esdhc_imx(0, NULL);
154 imx51_add_imx_keypad(&mx51_3ds_map_data);
155 imx51_add_imx2_wdt(0);
156}
157
158static void __init mx51_3ds_timer_init(void)
159{
160 mx51_clocks_init(32768, 24000000, 22579200, 0);
161}
162
163static struct sys_timer mx51_3ds_timer = {
164 .init = mx51_3ds_timer_init,
165};
166
167MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board")
168 /* Maintainer: Freescale Semiconductor, Inc. */
169 .atag_offset = 0x100,
170 .map_io = mx51_map_io,
171 .init_early = imx51_init_early,
172 .init_irq = mx51_init_irq,
173 .handle_irq = imx51_handle_irq,
174 .timer = &mx51_3ds_timer,
175 .init_machine = mx51_3ds_init,
176 .init_late = imx51_init_late,
177 .restart = mxc_restart,
178MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c
index d9a84ca2199a..6c4d7feb4520 100644
--- a/arch/arm/mach-imx/mach-mx51_babbage.c
+++ b/arch/arm/mach-imx/mach-mx51_babbage.c
@@ -418,10 +418,6 @@ static void __init mx51_babbage_timer_init(void)
418 mx51_clocks_init(32768, 24000000, 22579200, 0); 418 mx51_clocks_init(32768, 24000000, 22579200, 0);
419} 419}
420 420
421static struct sys_timer mx51_babbage_timer = {
422 .init = mx51_babbage_timer_init,
423};
424
425MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board") 421MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
426 /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */ 422 /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
427 .atag_offset = 0x100, 423 .atag_offset = 0x100,
@@ -429,7 +425,7 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
429 .init_early = imx51_init_early, 425 .init_early = imx51_init_early,
430 .init_irq = mx51_init_irq, 426 .init_irq = mx51_init_irq,
431 .handle_irq = imx51_handle_irq, 427 .handle_irq = imx51_handle_irq,
432 .timer = &mx51_babbage_timer, 428 .init_time = mx51_babbage_timer_init,
433 .init_machine = mx51_babbage_init, 429 .init_machine = mx51_babbage_init,
434 .init_late = imx51_init_late, 430 .init_late = imx51_init_late,
435 .restart = mxc_restart, 431 .restart = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index f4a8c7e108e1..a27faaba98ec 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -261,10 +261,6 @@ static void __init mxt_td60_timer_init(void)
261 mx27_clocks_init(26000000); 261 mx27_clocks_init(26000000);
262} 262}
263 263
264static struct sys_timer mxt_td60_timer = {
265 .init = mxt_td60_timer_init,
266};
267
268MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60") 264MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
269 /* maintainer: Maxtrack Industrial */ 265 /* maintainer: Maxtrack Industrial */
270 .atag_offset = 0x100, 266 .atag_offset = 0x100,
@@ -272,7 +268,7 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
272 .init_early = imx27_init_early, 268 .init_early = imx27_init_early,
273 .init_irq = mx27_init_irq, 269 .init_irq = mx27_init_irq,
274 .handle_irq = imx27_handle_irq, 270 .handle_irq = imx27_handle_irq,
275 .timer = &mxt_td60_timer, 271 .init_time = mxt_td60_timer_init,
276 .init_machine = mxt_td60_board_init, 272 .init_machine = mxt_td60_board_init,
277 .restart = mxc_restart, 273 .restart = mxc_restart,
278MACHINE_END 274MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index eee369fa94a2..b8b15bb1ffdf 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -416,10 +416,6 @@ static void __init pca100_timer_init(void)
416 mx27_clocks_init(26000000); 416 mx27_clocks_init(26000000);
417} 417}
418 418
419static struct sys_timer pca100_timer = {
420 .init = pca100_timer_init,
421};
422
423MACHINE_START(PCA100, "phyCARD-i.MX27") 419MACHINE_START(PCA100, "phyCARD-i.MX27")
424 .atag_offset = 0x100, 420 .atag_offset = 0x100,
425 .map_io = mx27_map_io, 421 .map_io = mx27_map_io,
@@ -427,6 +423,6 @@ MACHINE_START(PCA100, "phyCARD-i.MX27")
427 .init_irq = mx27_init_irq, 423 .init_irq = mx27_init_irq,
428 .handle_irq = imx27_handle_irq, 424 .handle_irq = imx27_handle_irq,
429 .init_machine = pca100_init, 425 .init_machine = pca100_init,
430 .timer = &pca100_timer, 426 .init_time = pca100_timer_init,
431 .restart = mxc_restart, 427 .restart = mxc_restart,
432MACHINE_END 428MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index 547fef133f65..bc0261e99d39 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -685,10 +685,6 @@ static void __init pcm037_timer_init(void)
685 mx31_clocks_init(26000000); 685 mx31_clocks_init(26000000);
686} 686}
687 687
688static struct sys_timer pcm037_timer = {
689 .init = pcm037_timer_init,
690};
691
692static void __init pcm037_reserve(void) 688static void __init pcm037_reserve(void)
693{ 689{
694 /* reserve 4 MiB for mx3-camera */ 690 /* reserve 4 MiB for mx3-camera */
@@ -709,7 +705,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
709 .init_early = imx31_init_early, 705 .init_early = imx31_init_early,
710 .init_irq = mx31_init_irq, 706 .init_irq = mx31_init_irq,
711 .handle_irq = imx31_handle_irq, 707 .handle_irq = imx31_handle_irq,
712 .timer = &pcm037_timer, 708 .init_time = pcm037_timer_init,
713 .init_machine = pcm037_init, 709 .init_machine = pcm037_init,
714 .init_late = pcm037_init_late, 710 .init_late = pcm037_init_late,
715 .restart = mxc_restart, 711 .restart = mxc_restart,
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 4aa0d0798605..e805ac273e9c 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -346,17 +346,13 @@ static void __init pcm038_timer_init(void)
346 mx27_clocks_init(26000000); 346 mx27_clocks_init(26000000);
347} 347}
348 348
349static struct sys_timer pcm038_timer = {
350 .init = pcm038_timer_init,
351};
352
353MACHINE_START(PCM038, "phyCORE-i.MX27") 349MACHINE_START(PCM038, "phyCORE-i.MX27")
354 .atag_offset = 0x100, 350 .atag_offset = 0x100,
355 .map_io = mx27_map_io, 351 .map_io = mx27_map_io,
356 .init_early = imx27_init_early, 352 .init_early = imx27_init_early,
357 .init_irq = mx27_init_irq, 353 .init_irq = mx27_init_irq,
358 .handle_irq = imx27_handle_irq, 354 .handle_irq = imx27_handle_irq,
359 .timer = &pcm038_timer, 355 .init_time = pcm038_timer_init,
360 .init_machine = pcm038_init, 356 .init_machine = pcm038_init,
361 .restart = mxc_restart, 357 .restart = mxc_restart,
362MACHINE_END 358MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index 92445440221e..8ed533f0f8ca 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -394,10 +394,6 @@ static void __init pcm043_timer_init(void)
394 mx35_clocks_init(); 394 mx35_clocks_init();
395} 395}
396 396
397static struct sys_timer pcm043_timer = {
398 .init = pcm043_timer_init,
399};
400
401MACHINE_START(PCM043, "Phytec Phycore pcm043") 397MACHINE_START(PCM043, "Phytec Phycore pcm043")
402 /* Maintainer: Pengutronix */ 398 /* Maintainer: Pengutronix */
403 .atag_offset = 0x100, 399 .atag_offset = 0x100,
@@ -405,7 +401,7 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043")
405 .init_early = imx35_init_early, 401 .init_early = imx35_init_early,
406 .init_irq = mx35_init_irq, 402 .init_irq = mx35_init_irq,
407 .handle_irq = imx35_handle_irq, 403 .handle_irq = imx35_handle_irq,
408 .timer = &pcm043_timer, 404 .init_time = pcm043_timer_init,
409 .init_machine = pcm043_init, 405 .init_machine = pcm043_init,
410 .restart = mxc_restart, 406 .restart = mxc_restart,
411MACHINE_END 407MACHINE_END
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index 96d9a91f8a3b..22af27ed457e 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -260,10 +260,6 @@ static void __init qong_timer_init(void)
260 mx31_clocks_init(26000000); 260 mx31_clocks_init(26000000);
261} 261}
262 262
263static struct sys_timer qong_timer = {
264 .init = qong_timer_init,
265};
266
267MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") 263MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
268 /* Maintainer: DENX Software Engineering GmbH */ 264 /* Maintainer: DENX Software Engineering GmbH */
269 .atag_offset = 0x100, 265 .atag_offset = 0x100,
@@ -271,7 +267,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
271 .init_early = imx31_init_early, 267 .init_early = imx31_init_early,
272 .init_irq = mx31_init_irq, 268 .init_irq = mx31_init_irq,
273 .handle_irq = imx31_handle_irq, 269 .handle_irq = imx31_handle_irq,
274 .timer = &qong_timer, 270 .init_time = qong_timer_init,
275 .init_machine = qong_init, 271 .init_machine = qong_init,
276 .restart = mxc_restart, 272 .restart = mxc_restart,
277MACHINE_END 273MACHINE_END
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index fc970409dbaf..b0fa10dd79fe 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -131,10 +131,6 @@ static void __init scb9328_timer_init(void)
131 mx1_clocks_init(32000); 131 mx1_clocks_init(32000);
132} 132}
133 133
134static struct sys_timer scb9328_timer = {
135 .init = scb9328_timer_init,
136};
137
138MACHINE_START(SCB9328, "Synertronixx scb9328") 134MACHINE_START(SCB9328, "Synertronixx scb9328")
139 /* Sascha Hauer */ 135 /* Sascha Hauer */
140 .atag_offset = 100, 136 .atag_offset = 100,
@@ -142,7 +138,7 @@ MACHINE_START(SCB9328, "Synertronixx scb9328")
142 .init_early = imx1_init_early, 138 .init_early = imx1_init_early,
143 .init_irq = mx1_init_irq, 139 .init_irq = mx1_init_irq,
144 .handle_irq = imx1_handle_irq, 140 .handle_irq = imx1_handle_irq,
145 .timer = &scb9328_timer, 141 .init_time = scb9328_timer_init,
146 .init_machine = scb9328_init, 142 .init_machine = scb9328_init,
147 .restart = mxc_restart, 143 .restart = mxc_restart,
148MACHINE_END 144MACHINE_END
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 3aecf91e4289..0910761e8280 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -305,17 +305,13 @@ static void __init vpr200_timer_init(void)
305 mx35_clocks_init(); 305 mx35_clocks_init();
306} 306}
307 307
308static struct sys_timer vpr200_timer = {
309 .init = vpr200_timer_init,
310};
311
312MACHINE_START(VPR200, "VPR200") 308MACHINE_START(VPR200, "VPR200")
313 /* Maintainer: Creative Product Design */ 309 /* Maintainer: Creative Product Design */
314 .map_io = mx35_map_io, 310 .map_io = mx35_map_io,
315 .init_early = imx35_init_early, 311 .init_early = imx35_init_early,
316 .init_irq = mx35_init_irq, 312 .init_irq = mx35_init_irq,
317 .handle_irq = imx35_handle_irq, 313 .handle_irq = imx35_handle_irq,
318 .timer = &vpr200_timer, 314 .init_time = vpr200_timer_init,
319 .init_machine = vpr200_board_init, 315 .init_machine = vpr200_board_init,
320 .restart = mxc_restart, 316 .restart = mxc_restart,
321MACHINE_END 317MACHINE_END
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index 79d71cf23a1d..cf34994cfe28 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -24,16 +24,6 @@
24#include "iomux-v3.h" 24#include "iomux-v3.h"
25 25
26/* 26/*
27 * Define the MX50 memory map.
28 */
29static struct map_desc mx50_io_desc[] __initdata = {
30 imx_map_entry(MX50, TZIC, MT_DEVICE),
31 imx_map_entry(MX50, SPBA0, MT_DEVICE),
32 imx_map_entry(MX50, AIPS1, MT_DEVICE),
33 imx_map_entry(MX50, AIPS2, MT_DEVICE),
34};
35
36/*
37 * Define the MX51 memory map. 27 * Define the MX51 memory map.
38 */ 28 */
39static struct map_desc mx51_io_desc[] __initdata = { 29static struct map_desc mx51_io_desc[] __initdata = {
@@ -59,11 +49,6 @@ static struct map_desc mx53_io_desc[] __initdata = {
59 * system startup to create static physical to virtual memory mappings 49 * system startup to create static physical to virtual memory mappings
60 * for the IO modules. 50 * for the IO modules.
61 */ 51 */
62void __init mx50_map_io(void)
63{
64 iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc));
65}
66
67void __init mx51_map_io(void) 52void __init mx51_map_io(void)
68{ 53{
69 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc)); 54 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
@@ -74,13 +59,6 @@ void __init mx53_map_io(void)
74 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc)); 59 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
75} 60}
76 61
77void __init imx50_init_early(void)
78{
79 mxc_set_cpu_type(MXC_CPU_MX50);
80 mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR));
81 mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
82}
83
84/* 62/*
85 * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by 63 * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
86 * the Freescale marketing division. However this did not remove the 64 * the Freescale marketing division. However this did not remove the
@@ -115,11 +93,6 @@ void __init imx53_init_early(void)
115 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); 93 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
116} 94}
117 95
118void __init mx50_init_irq(void)
119{
120 tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
121}
122
123void __init mx51_init_irq(void) 96void __init mx51_init_irq(void)
124{ 97{
125 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR)); 98 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
@@ -148,31 +121,10 @@ static struct sdma_platform_data imx51_sdma_pdata __initdata = {
148 .script_addrs = &imx51_sdma_script, 121 .script_addrs = &imx51_sdma_script,
149}; 122};
150 123
151static const struct resource imx50_audmux_res[] __initconst = {
152 DEFINE_RES_MEM(MX50_AUDMUX_BASE_ADDR, SZ_16K),
153};
154
155static const struct resource imx51_audmux_res[] __initconst = { 124static const struct resource imx51_audmux_res[] __initconst = {
156 DEFINE_RES_MEM(MX51_AUDMUX_BASE_ADDR, SZ_16K), 125 DEFINE_RES_MEM(MX51_AUDMUX_BASE_ADDR, SZ_16K),
157}; 126};
158 127
159void __init imx50_soc_init(void)
160{
161 mxc_device_init();
162
163 /* i.mx50 has the i.mx35 type gpio */
164 mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
165 mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
166 mxc_register_gpio("imx35-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
167 mxc_register_gpio("imx35-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
168 mxc_register_gpio("imx35-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
169 mxc_register_gpio("imx35-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
170
171 /* i.mx50 has the i.mx31 type audmux */
172 platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res,
173 ARRAY_SIZE(imx50_audmux_res));
174}
175
176void __init imx51_soc_init(void) 128void __init imx51_soc_init(void)
177{ 129{
178 mxc_device_init(); 130 mxc_device_init();
diff --git a/arch/arm/mach-imx/mx50.h b/arch/arm/mach-imx/mx50.h
deleted file mode 100644
index 09ac19c1570c..000000000000
--- a/arch/arm/mach-imx/mx50.h
+++ /dev/null
@@ -1,290 +0,0 @@
1#ifndef __MACH_MX50_H__
2#define __MACH_MX50_H__
3
4/*
5 * IROM
6 */
7#define MX50_IROM_BASE_ADDR 0x0
8#define MX50_IROM_SIZE SZ_64K
9
10/* TZIC */
11#define MX50_TZIC_BASE_ADDR 0x0fffc000
12#define MX50_TZIC_SIZE SZ_16K
13
14/*
15 * IRAM
16 */
17#define MX50_IRAM_BASE_ADDR 0xf8000000 /* internal ram */
18#define MX50_IRAM_PARTITIONS 16
19#define MX50_IRAM_SIZE (MX50_IRAM_PARTITIONS * SZ_8K) /* 128KB */
20
21/*
22 * Databahn
23 */
24#define MX50_DATABAHN_BASE_ADDR 0x14000000
25
26/*
27 * Graphics Memory of GPU
28 */
29#define MX50_GPU2D_BASE_ADDR 0x20000000
30
31#define MX50_DEBUG_BASE_ADDR 0x40000000
32#define MX50_DEBUG_SIZE SZ_1M
33#define MX50_ETB_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x00001000)
34#define MX50_ETM_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x00002000)
35#define MX50_TPIU_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x00003000)
36#define MX50_CTI0_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x00004000)
37#define MX50_CTI1_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x00005000)
38#define MX50_CTI2_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x00006000)
39#define MX50_CTI3_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x00007000)
40#define MX50_CORTEX_DBG_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x00008000)
41
42#define MX50_APBHDMA_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x01000000)
43#define MX50_OCOTP_CTRL_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x01002000)
44#define MX50_DIGCTL_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x01004000)
45#define MX50_GPMI_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x01006000)
46#define MX50_BCH_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x01008000)
47#define MX50_ELCDIF_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x0100a000)
48#define MX50_EPXP_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x0100c000)
49#define MX50_DCP_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x0100e000)
50#define MX50_EPDC_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x01010000)
51#define MX50_QOSC_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x01012000)
52#define MX50_PERFMON_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x01014000)
53#define MX50_SSP_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x01016000)
54#define MX50_ANATOP_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x01018000)
55#define MX50_NIC_BASE_ADDR (MX50_DEBUG_BASE_ADDR + 0x08000000)
56
57/*
58 * SPBA global module enabled #0
59 */
60#define MX50_SPBA0_BASE_ADDR 0x50000000
61#define MX50_SPBA0_SIZE SZ_1M
62
63#define MX50_MMC_SDHC1_BASE_ADDR (MX50_SPBA0_BASE_ADDR + 0x00004000)
64#define MX50_MMC_SDHC2_BASE_ADDR (MX50_SPBA0_BASE_ADDR + 0x00008000)
65#define MX50_UART3_BASE_ADDR (MX50_SPBA0_BASE_ADDR + 0x0000c000)
66#define MX50_CSPI1_BASE_ADDR (MX50_SPBA0_BASE_ADDR + 0x00010000)
67#define MX50_SSI2_BASE_ADDR (MX50_SPBA0_BASE_ADDR + 0x00014000)
68#define MX50_MMC_SDHC3_BASE_ADDR (MX50_SPBA0_BASE_ADDR + 0x00020000)
69#define MX50_MMC_SDHC4_BASE_ADDR (MX50_SPBA0_BASE_ADDR + 0x00024000)
70
71/*
72 * AIPS 1
73 */
74#define MX50_AIPS1_BASE_ADDR 0x53f00000
75#define MX50_AIPS1_SIZE SZ_1M
76
77#define MX50_OTG_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x00080000)
78#define MX50_GPIO1_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x00084000)
79#define MX50_GPIO2_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x00088000)
80#define MX50_GPIO3_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x0008c000)
81#define MX50_GPIO4_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x00090000)
82#define MX50_KPP_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x00094000)
83#define MX50_WDOG_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x00098000)
84#define MX50_GPT1_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000a0000)
85#define MX50_SRTC_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000a4000)
86#define MX50_IOMUXC_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000a8000)
87#define MX50_EPIT1_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000ac000)
88#define MX50_PWM1_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000b4000)
89#define MX50_PWM2_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000b8000)
90#define MX50_UART1_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000bc000)
91#define MX50_UART2_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000c0000)
92#define MX50_SRC_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000d0000)
93#define MX50_CCM_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000d4000)
94#define MX50_GPC_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000d8000)
95#define MX50_GPIO5_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000dc000)
96#define MX50_GPIO6_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000e0000)
97#define MX50_I2C3_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000ec000)
98#define MX50_UART4_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000f0000)
99
100#define MX50_MSHC_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000f4000)
101#define MX50_RNGB_BASE_ADDR (MX50_AIPS1_BASE_ADDR + 0x000f8000)
102
103/*
104 * AIPS 2
105 */
106#define MX50_AIPS2_BASE_ADDR 0x63f00000
107#define MX50_AIPS2_SIZE SZ_1M
108
109#define MX50_PLL1_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x00080000)
110#define MX50_PLL2_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x00084000)
111#define MX50_PLL3_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x00088000)
112#define MX50_UART5_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x00090000)
113#define MX50_AHBMAX_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x00094000)
114#define MX50_ARM_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000a0000)
115#define MX50_OWIRE_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000a4000)
116#define MX50_CSPI2_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000ac000)
117#define MX50_SDMA_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000b0000)
118#define MX50_ROMCP_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000b8000)
119#define MX50_CSPI3_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000c0000)
120#define MX50_I2C2_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000c4000)
121#define MX50_I2C1_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000c8000)
122#define MX50_SSI1_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000cc000)
123#define MX50_AUDMUX_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000d0000)
124#define MX50_WEIM_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000d8000)
125#define MX50_FEC_BASE_ADDR (MX50_AIPS2_BASE_ADDR + 0x000ec000)
126
127/*
128 * Memory regions and CS
129 */
130#define MX50_CSD0_BASE_ADDR 0x70000000
131#define MX50_CSD1_BASE_ADDR 0xb0000000
132#define MX50_CS0_BASE_ADDR 0xf0000000
133
134#define MX50_IO_P2V(x) IMX_IO_P2V(x)
135#define MX50_IO_ADDRESS(x) IOMEM(MX50_IO_P2V(x))
136
137/*
138 * defines for SPBA modules
139 */
140#define MX50_SPBA_SDHC1 0x04
141#define MX50_SPBA_SDHC2 0x08
142#define MX50_SPBA_UART3 0x0c
143#define MX50_SPBA_CSPI1 0x10
144#define MX50_SPBA_SSI2 0x14
145#define MX50_SPBA_SDHC3 0x20
146#define MX50_SPBA_SDHC4 0x24
147#define MX50_SPBA_SPDIF 0x28
148#define MX50_SPBA_ATA 0x30
149#define MX50_SPBA_SLIM 0x34
150#define MX50_SPBA_HSI2C 0x38
151#define MX50_SPBA_CTRL 0x3c
152
153/*
154 * DMA request assignments
155 */
156#define MX50_DMA_REQ_GPC 1
157#define MX50_DMA_REQ_ATA_UART4_RX 2
158#define MX50_DMA_REQ_ATA_UART4_TX 3
159#define MX50_DMA_REQ_CSPI1_RX 6
160#define MX50_DMA_REQ_CSPI1_TX 7
161#define MX50_DMA_REQ_CSPI2_RX 8
162#define MX50_DMA_REQ_CSPI2_TX 9
163#define MX50_DMA_REQ_I2C3_SDHC3 10
164#define MX50_DMA_REQ_SDHC4 11
165#define MX50_DMA_REQ_UART2_FIRI_RX 12
166#define MX50_DMA_REQ_UART2_FIRI_TX 13
167#define MX50_DMA_REQ_EXT0 14
168#define MX50_DMA_REQ_EXT1 15
169#define MX50_DMA_REQ_UART5_RX 16
170#define MX50_DMA_REQ_UART5_TX 17
171#define MX50_DMA_REQ_UART1_RX 18
172#define MX50_DMA_REQ_UART1_TX 19
173#define MX50_DMA_REQ_I2C1_SDHC1 20
174#define MX50_DMA_REQ_I2C2_SDHC2 21
175#define MX50_DMA_REQ_SSI2_RX2 22
176#define MX50_DMA_REQ_SSI2_TX2 23
177#define MX50_DMA_REQ_SSI2_RX1 24
178#define MX50_DMA_REQ_SSI2_TX1 25
179#define MX50_DMA_REQ_SSI1_RX2 26
180#define MX50_DMA_REQ_SSI1_TX2 27
181#define MX50_DMA_REQ_SSI1_RX1 28
182#define MX50_DMA_REQ_SSI1_TX1 29
183#define MX50_DMA_REQ_CSPI_RX 38
184#define MX50_DMA_REQ_CSPI_TX 39
185#define MX50_DMA_REQ_UART3_RX 42
186#define MX50_DMA_REQ_UART3_TX 43
187
188/*
189 * Interrupt numbers
190 */
191#include <asm/irq.h>
192#define MX50_INT_MMC_SDHC1 (NR_IRQS_LEGACY + 1)
193#define MX50_INT_MMC_SDHC2 (NR_IRQS_LEGACY + 2)
194#define MX50_INT_MMC_SDHC3 (NR_IRQS_LEGACY + 3)
195#define MX50_INT_MMC_SDHC4 (NR_IRQS_LEGACY + 4)
196#define MX50_INT_DAP (NR_IRQS_LEGACY + 5)
197#define MX50_INT_SDMA (NR_IRQS_LEGACY + 6)
198#define MX50_INT_IOMUX (NR_IRQS_LEGACY + 7)
199#define MX50_INT_UART4 (NR_IRQS_LEGACY + 13)
200#define MX50_INT_USB_H1 (NR_IRQS_LEGACY + 14)
201#define MX50_INT_USB_OTG (NR_IRQS_LEGACY + 18)
202#define MX50_INT_DATABAHN (NR_IRQS_LEGACY + 19)
203#define MX50_INT_ELCDIF (NR_IRQS_LEGACY + 20)
204#define MX50_INT_EPXP (NR_IRQS_LEGACY + 21)
205#define MX50_INT_SRTC_NTZ (NR_IRQS_LEGACY + 24)
206#define MX50_INT_SRTC_TZ (NR_IRQS_LEGACY + 25)
207#define MX50_INT_EPDC (NR_IRQS_LEGACY + 27)
208#define MX50_INT_NIC (NR_IRQS_LEGACY + 28)
209#define MX50_INT_SSI1 (NR_IRQS_LEGACY + 29)
210#define MX50_INT_SSI2 (NR_IRQS_LEGACY + 30)
211#define MX50_INT_UART1 (NR_IRQS_LEGACY + 31)
212#define MX50_INT_UART2 (NR_IRQS_LEGACY + 32)
213#define MX50_INT_UART3 (NR_IRQS_LEGACY + 33)
214#define MX50_INT_RESV34 (NR_IRQS_LEGACY + 34)
215#define MX50_INT_RESV35 (NR_IRQS_LEGACY + 35)
216#define MX50_INT_CSPI1 (NR_IRQS_LEGACY + 36)
217#define MX50_INT_CSPI2 (NR_IRQS_LEGACY + 37)
218#define MX50_INT_CSPI (NR_IRQS_LEGACY + 38)
219#define MX50_INT_GPT (NR_IRQS_LEGACY + 39)
220#define MX50_INT_EPIT1 (NR_IRQS_LEGACY + 40)
221#define MX50_INT_GPIO1_INT7 (NR_IRQS_LEGACY + 42)
222#define MX50_INT_GPIO1_INT6 (NR_IRQS_LEGACY + 43)
223#define MX50_INT_GPIO1_INT5 (NR_IRQS_LEGACY + 44)
224#define MX50_INT_GPIO1_INT4 (NR_IRQS_LEGACY + 45)
225#define MX50_INT_GPIO1_INT3 (NR_IRQS_LEGACY + 46)
226#define MX50_INT_GPIO1_INT2 (NR_IRQS_LEGACY + 47)
227#define MX50_INT_GPIO1_INT1 (NR_IRQS_LEGACY + 48)
228#define MX50_INT_GPIO1_INT0 (NR_IRQS_LEGACY + 49)
229#define MX50_INT_GPIO1_LOW (NR_IRQS_LEGACY + 50)
230#define MX50_INT_GPIO1_HIGH (NR_IRQS_LEGACY + 51)
231#define MX50_INT_GPIO2_LOW (NR_IRQS_LEGACY + 52)
232#define MX50_INT_GPIO2_HIGH (NR_IRQS_LEGACY + 53)
233#define MX50_INT_GPIO3_LOW (NR_IRQS_LEGACY + 54)
234#define MX50_INT_GPIO3_HIGH (NR_IRQS_LEGACY + 55)
235#define MX50_INT_GPIO4_LOW (NR_IRQS_LEGACY + 56)
236#define MX50_INT_GPIO4_HIGH (NR_IRQS_LEGACY + 57)
237#define MX50_INT_WDOG1 (NR_IRQS_LEGACY + 58)
238#define MX50_INT_KPP (NR_IRQS_LEGACY + 60)
239#define MX50_INT_PWM1 (NR_IRQS_LEGACY + 61)
240#define MX50_INT_I2C1 (NR_IRQS_LEGACY + 62)
241#define MX50_INT_I2C2 (NR_IRQS_LEGACY + 63)
242#define MX50_INT_I2C3 (NR_IRQS_LEGACY + 64)
243#define MX50_INT_RESV65 (NR_IRQS_LEGACY + 65)
244#define MX50_INT_DCDC (NR_IRQS_LEGACY + 66)
245#define MX50_INT_THERMAL_ALARM (NR_IRQS_LEGACY + 67)
246#define MX50_INT_ANA3 (NR_IRQS_LEGACY + 68)
247#define MX50_INT_ANA4 (NR_IRQS_LEGACY + 69)
248#define MX50_INT_CCM1 (NR_IRQS_LEGACY + 71)
249#define MX50_INT_CCM2 (NR_IRQS_LEGACY + 72)
250#define MX50_INT_GPC1 (NR_IRQS_LEGACY + 73)
251#define MX50_INT_GPC2 (NR_IRQS_LEGACY + 74)
252#define MX50_INT_SRC (NR_IRQS_LEGACY + 75)
253#define MX50_INT_NM (NR_IRQS_LEGACY + 76)
254#define MX50_INT_PMU (NR_IRQS_LEGACY + 77)
255#define MX50_INT_CTI_IRQ (NR_IRQS_LEGACY + 78)
256#define MX50_INT_CTI1_TG0 (NR_IRQS_LEGACY + 79)
257#define MX50_INT_CTI1_TG1 (NR_IRQS_LEGACY + 80)
258#define MX50_INT_GPU2_IRQ (NR_IRQS_LEGACY + 84)
259#define MX50_INT_GPU2_BUSY (NR_IRQS_LEGACY + 85)
260#define MX50_INT_UART5 (NR_IRQS_LEGACY + 86)
261#define MX50_INT_FEC (NR_IRQS_LEGACY + 87)
262#define MX50_INT_OWIRE (NR_IRQS_LEGACY + 88)
263#define MX50_INT_CTI1_TG2 (NR_IRQS_LEGACY + 89)
264#define MX50_INT_SJC (NR_IRQS_LEGACY + 90)
265#define MX50_INT_DCP_CHAN1_3 (NR_IRQS_LEGACY + 91)
266#define MX50_INT_DCP_CHAN0 (NR_IRQS_LEGACY + 92)
267#define MX50_INT_PWM2 (NR_IRQS_LEGACY + 94)
268#define MX50_INT_RNGB (NR_IRQS_LEGACY + 97)
269#define MX50_INT_CTI1_TG3 (NR_IRQS_LEGACY + 98)
270#define MX50_INT_RAWNAND_BCH (NR_IRQS_LEGACY + 100)
271#define MX50_INT_RAWNAND_GPMI (NR_IRQS_LEGACY + 102)
272#define MX50_INT_GPIO5_LOW (NR_IRQS_LEGACY + 103)
273#define MX50_INT_GPIO5_HIGH (NR_IRQS_LEGACY + 104)
274#define MX50_INT_GPIO6_LOW (NR_IRQS_LEGACY + 105)
275#define MX50_INT_GPIO6_HIGH (NR_IRQS_LEGACY + 106)
276#define MX50_INT_MSHC (NR_IRQS_LEGACY + 109)
277#define MX50_INT_APBHDMA_CHAN0 (NR_IRQS_LEGACY + 110)
278#define MX50_INT_APBHDMA_CHAN1 (NR_IRQS_LEGACY + 111)
279#define MX50_INT_APBHDMA_CHAN2 (NR_IRQS_LEGACY + 112)
280#define MX50_INT_APBHDMA_CHAN3 (NR_IRQS_LEGACY + 113)
281#define MX50_INT_APBHDMA_CHAN4 (NR_IRQS_LEGACY + 114)
282#define MX50_INT_APBHDMA_CHAN5 (NR_IRQS_LEGACY + 115)
283#define MX50_INT_APBHDMA_CHAN6 (NR_IRQS_LEGACY + 116)
284#define MX50_INT_APBHDMA_CHAN7 (NR_IRQS_LEGACY + 117)
285
286#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
287extern int mx50_revision(void);
288#endif
289
290#endif /* ifndef __MACH_MX50_H__ */
diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h
index d78298366a91..7dce17a9fe6c 100644
--- a/arch/arm/mach-imx/mxc.h
+++ b/arch/arm/mach-imx/mxc.h
@@ -32,7 +32,6 @@
32#define MXC_CPU_MX27 27 32#define MXC_CPU_MX27 27
33#define MXC_CPU_MX31 31 33#define MXC_CPU_MX31 31
34#define MXC_CPU_MX35 35 34#define MXC_CPU_MX35 35
35#define MXC_CPU_MX50 50
36#define MXC_CPU_MX51 51 35#define MXC_CPU_MX51 51
37#define MXC_CPU_MX53 53 36#define MXC_CPU_MX53 53
38 37
@@ -126,18 +125,6 @@ extern unsigned int __mxc_cpu_type;
126# define cpu_is_mx35() (0) 125# define cpu_is_mx35() (0)
127#endif 126#endif
128 127
129#ifdef CONFIG_SOC_IMX50
130# ifdef mxc_cpu_type
131# undef mxc_cpu_type
132# define mxc_cpu_type __mxc_cpu_type
133# else
134# define mxc_cpu_type MXC_CPU_MX50
135# endif
136# define cpu_is_mx50() (mxc_cpu_type == MXC_CPU_MX50)
137#else
138# define cpu_is_mx50() (0)
139#endif
140
141#ifdef CONFIG_SOC_IMX51 128#ifdef CONFIG_SOC_IMX51
142# ifdef mxc_cpu_type 129# ifdef mxc_cpu_type
143# undef mxc_cpu_type 130# undef mxc_cpu_type
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 66fae885c842..7c0b03f67b05 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -12,14 +12,16 @@
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/smp.h> 14#include <linux/smp.h>
15#include <linux/irqchip/arm-gic.h>
15#include <asm/page.h> 16#include <asm/page.h>
16#include <asm/smp_scu.h> 17#include <asm/smp_scu.h>
17#include <asm/hardware/gic.h>
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19 19
20#include "common.h" 20#include "common.h"
21#include "hardware.h" 21#include "hardware.h"
22 22
23#define SCU_STANDBY_ENABLE (1 << 5)
24
23static void __iomem *scu_base; 25static void __iomem *scu_base;
24 26
25static struct map_desc scu_io_desc __initdata = { 27static struct map_desc scu_io_desc __initdata = {
@@ -42,6 +44,14 @@ void __init imx_scu_map_io(void)
42 scu_base = IMX_IO_ADDRESS(base); 44 scu_base = IMX_IO_ADDRESS(base);
43} 45}
44 46
47void imx_scu_standby_enable(void)
48{
49 u32 val = readl_relaxed(scu_base);
50
51 val |= SCU_STANDBY_ENABLE;
52 writel_relaxed(val, scu_base);
53}
54
45static void __cpuinit imx_secondary_init(unsigned int cpu) 55static void __cpuinit imx_secondary_init(unsigned int cpu)
46{ 56{
47 /* 57 /*
@@ -71,8 +81,6 @@ static void __init imx_smp_init_cpus(void)
71 81
72 for (i = 0; i < ncores; i++) 82 for (i = 0; i < ncores; i++)
73 set_cpu_possible(i, true); 83 set_cpu_possible(i, true);
74
75 set_smp_cross_call(gic_raise_softirq);
76} 84}
77 85
78void imx_smp_prepare(void) 86void imx_smp_prepare(void)
diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c
index 2e063c2deb9e..f67fd7ee8127 100644
--- a/arch/arm/mach-imx/pm-imx5.c
+++ b/arch/arm/mach-imx/pm-imx5.c
@@ -34,7 +34,7 @@
34 34
35/* 35/*
36 * set cpu low power mode before WFI instruction. This function is called 36 * set cpu low power mode before WFI instruction. This function is called
37 * mx5 because it can be used for mx50, mx51, and mx53. 37 * mx5 because it can be used for mx51, and mx53.
38 */ 38 */
39static void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode) 39static void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
40{ 40{
@@ -85,10 +85,7 @@ static void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
85 __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC); 85 __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC);
86 __raw_writel(ccm_clpcr, MXC_CCM_CLPCR); 86 __raw_writel(ccm_clpcr, MXC_CCM_CLPCR);
87 __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR); 87 __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR);
88 88 __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
89 /* Enable NEON SRPG for all but MX50TO1.0. */
90 if (mx50_revision() != IMX_CHIP_REVISION_1_0)
91 __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
92 89
93 if (stop_mode) { 90 if (stop_mode) {
94 empgc0 |= MXC_SRPGCR_PCR; 91 empgc0 |= MXC_SRPGCR_PCR;
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index f017302f6d09..fea91313678b 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -152,7 +152,8 @@ static int v2_set_next_event(unsigned long evt,
152 152
153 __raw_writel(tcmp, timer_base + V2_TCMP); 153 __raw_writel(tcmp, timer_base + V2_TCMP);
154 154
155 return (int)(tcmp - __raw_readl(timer_base + V2_TCN)) < 0 ? 155 return evt < 0x7fffffff &&
156 (int)(tcmp - __raw_readl(timer_base + V2_TCN)) < 0 ?
156 -ETIME : 0; 157 -ETIME : 0;
157} 158}
158 159
@@ -256,7 +257,6 @@ static struct irqaction mxc_timer_irq = {
256static struct clock_event_device clockevent_mxc = { 257static struct clock_event_device clockevent_mxc = {
257 .name = "mxc_timer1", 258 .name = "mxc_timer1",
258 .features = CLOCK_EVT_FEAT_ONESHOT, 259 .features = CLOCK_EVT_FEAT_ONESHOT,
259 .shift = 32,
260 .set_mode = mxc_set_mode, 260 .set_mode = mxc_set_mode,
261 .set_next_event = mx1_2_set_next_event, 261 .set_next_event = mx1_2_set_next_event,
262 .rating = 200, 262 .rating = 200,
@@ -264,21 +264,13 @@ static struct clock_event_device clockevent_mxc = {
264 264
265static int __init mxc_clockevent_init(struct clk *timer_clk) 265static int __init mxc_clockevent_init(struct clk *timer_clk)
266{ 266{
267 unsigned int c = clk_get_rate(timer_clk);
268
269 if (timer_is_v2()) 267 if (timer_is_v2())
270 clockevent_mxc.set_next_event = v2_set_next_event; 268 clockevent_mxc.set_next_event = v2_set_next_event;
271 269
272 clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC,
273 clockevent_mxc.shift);
274 clockevent_mxc.max_delta_ns =
275 clockevent_delta2ns(0xfffffffe, &clockevent_mxc);
276 clockevent_mxc.min_delta_ns =
277 clockevent_delta2ns(0xff, &clockevent_mxc);
278
279 clockevent_mxc.cpumask = cpumask_of(0); 270 clockevent_mxc.cpumask = cpumask_of(0);
280 271 clockevents_config_and_register(&clockevent_mxc,
281 clockevents_register_device(&clockevent_mxc); 272 clk_get_rate(timer_clk),
273 0xff, 0xfffffffe);
282 274
283 return 0; 275 return 0;
284} 276}
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 11e2a4145807..78f1b3814f77 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -425,7 +425,7 @@ void __init ap_init_early(void)
425 425
426#ifdef CONFIG_OF 426#ifdef CONFIG_OF
427 427
428static void __init ap_init_timer_of(void) 428static void __init ap_of_timer_init(void)
429{ 429{
430 struct device_node *node; 430 struct device_node *node;
431 const char *path; 431 const char *path;
@@ -464,10 +464,6 @@ static void __init ap_init_timer_of(void)
464 integrator_clockevent_init(rate, base, irq); 464 integrator_clockevent_init(rate, base, irq);
465} 465}
466 466
467static struct sys_timer ap_of_timer = {
468 .init = ap_init_timer_of,
469};
470
471static const struct of_device_id fpga_irq_of_match[] __initconst = { 467static const struct of_device_id fpga_irq_of_match[] __initconst = {
472 { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, }, 468 { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
473 { /* Sentinel */ } 469 { /* Sentinel */ }
@@ -586,7 +582,7 @@ DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
586 .init_early = ap_init_early, 582 .init_early = ap_init_early,
587 .init_irq = ap_init_irq_of, 583 .init_irq = ap_init_irq_of,
588 .handle_irq = fpga_handle_irq, 584 .handle_irq = fpga_handle_irq,
589 .timer = &ap_of_timer, 585 .init_time = ap_of_timer_init,
590 .init_machine = ap_init_of, 586 .init_machine = ap_init_of,
591 .restart = integrator_restart, 587 .restart = integrator_restart,
592 .dt_compat = ap_dt_board_compat, 588 .dt_compat = ap_dt_board_compat,
@@ -638,7 +634,7 @@ static struct platform_device cfi_flash_device = {
638 .resource = &cfi_flash_resource, 634 .resource = &cfi_flash_resource,
639}; 635};
640 636
641static void __init ap_init_timer(void) 637static void __init ap_timer_init(void)
642{ 638{
643 struct clk *clk; 639 struct clk *clk;
644 unsigned long rate; 640 unsigned long rate;
@@ -657,10 +653,6 @@ static void __init ap_init_timer(void)
657 IRQ_TIMERINT1); 653 IRQ_TIMERINT1);
658} 654}
659 655
660static struct sys_timer ap_timer = {
661 .init = ap_init_timer,
662};
663
664#define INTEGRATOR_SC_VALID_INT 0x003fffff 656#define INTEGRATOR_SC_VALID_INT 0x003fffff
665 657
666static void __init ap_init_irq(void) 658static void __init ap_init_irq(void)
@@ -716,7 +708,7 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
716 .init_early = ap_init_early, 708 .init_early = ap_init_early,
717 .init_irq = ap_init_irq, 709 .init_irq = ap_init_irq,
718 .handle_irq = fpga_handle_irq, 710 .handle_irq = fpga_handle_irq,
719 .timer = &ap_timer, 711 .init_time = ap_timer_init,
720 .init_machine = ap_init, 712 .init_machine = ap_init,
721 .restart = integrator_restart, 713 .restart = integrator_restart,
722MACHINE_END 714MACHINE_END
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 7322838c0447..4cef9a0ebbb9 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -251,7 +251,7 @@ static void __init intcp_init_early(void)
251 251
252#ifdef CONFIG_OF 252#ifdef CONFIG_OF
253 253
254static void __init intcp_timer_init_of(void) 254static void __init cp_of_timer_init(void)
255{ 255{
256 struct device_node *node; 256 struct device_node *node;
257 const char *path; 257 const char *path;
@@ -283,10 +283,6 @@ static void __init intcp_timer_init_of(void)
283 sp804_clockevents_init(base, irq, node->name); 283 sp804_clockevents_init(base, irq, node->name);
284} 284}
285 285
286static struct sys_timer cp_of_timer = {
287 .init = intcp_timer_init_of,
288};
289
290static const struct of_device_id fpga_irq_of_match[] __initconst = { 286static const struct of_device_id fpga_irq_of_match[] __initconst = {
291 { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, }, 287 { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
292 { /* Sentinel */ } 288 { /* Sentinel */ }
@@ -390,7 +386,7 @@ DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
390 .init_early = intcp_init_early, 386 .init_early = intcp_init_early,
391 .init_irq = intcp_init_irq_of, 387 .init_irq = intcp_init_irq_of,
392 .handle_irq = fpga_handle_irq, 388 .handle_irq = fpga_handle_irq,
393 .timer = &cp_of_timer, 389 .init_time = cp_of_timer_init,
394 .init_machine = intcp_init_of, 390 .init_machine = intcp_init_of,
395 .restart = integrator_restart, 391 .restart = integrator_restart,
396 .dt_compat = intcp_dt_board_compat, 392 .dt_compat = intcp_dt_board_compat,
@@ -512,7 +508,7 @@ static void __init intcp_init_irq(void)
512#define TIMER1_VA_BASE __io_address(INTEGRATOR_TIMER1_BASE) 508#define TIMER1_VA_BASE __io_address(INTEGRATOR_TIMER1_BASE)
513#define TIMER2_VA_BASE __io_address(INTEGRATOR_TIMER2_BASE) 509#define TIMER2_VA_BASE __io_address(INTEGRATOR_TIMER2_BASE)
514 510
515static void __init intcp_timer_init(void) 511static void __init cp_timer_init(void)
516{ 512{
517 writel(0, TIMER0_VA_BASE + TIMER_CTRL); 513 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
518 writel(0, TIMER1_VA_BASE + TIMER_CTRL); 514 writel(0, TIMER1_VA_BASE + TIMER_CTRL);
@@ -522,10 +518,6 @@ static void __init intcp_timer_init(void)
522 sp804_clockevents_init(TIMER1_VA_BASE, IRQ_TIMERINT1, "timer1"); 518 sp804_clockevents_init(TIMER1_VA_BASE, IRQ_TIMERINT1, "timer1");
523} 519}
524 520
525static struct sys_timer cp_timer = {
526 .init = intcp_timer_init,
527};
528
529#define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 } 521#define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
530#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT } 522#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT }
531 523
@@ -565,7 +557,7 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
565 .init_early = intcp_init_early, 557 .init_early = intcp_init_early,
566 .init_irq = intcp_init_irq, 558 .init_irq = intcp_init_irq,
567 .handle_irq = fpga_handle_irq, 559 .handle_irq = fpga_handle_irq,
568 .timer = &cp_timer, 560 .init_time = cp_timer_init,
569 .init_machine = intcp_init, 561 .init_machine = intcp_init,
570 .restart = integrator_restart, 562 .restart = integrator_restart,
571MACHINE_END 563MACHINE_END
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index e3f3e7daa79e..02a8228ac2d3 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -84,17 +84,13 @@ static void __init iq81340mc_timer_init(void)
84 iop_init_time(bus_freq); 84 iop_init_time(bus_freq);
85} 85}
86 86
87static struct sys_timer iq81340mc_timer = {
88 .init = iq81340mc_timer_init,
89};
90
91MACHINE_START(IQ81340MC, "Intel IQ81340MC") 87MACHINE_START(IQ81340MC, "Intel IQ81340MC")
92 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ 88 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
93 .atag_offset = 0x100, 89 .atag_offset = 0x100,
94 .init_early = iop13xx_init_early, 90 .init_early = iop13xx_init_early,
95 .map_io = iop13xx_map_io, 91 .map_io = iop13xx_map_io,
96 .init_irq = iop13xx_init_irq, 92 .init_irq = iop13xx_init_irq,
97 .timer = &iq81340mc_timer, 93 .init_time = iq81340mc_timer_init,
98 .init_machine = iq81340mc_init, 94 .init_machine = iq81340mc_init,
99 .restart = iop13xx_restart, 95 .restart = iop13xx_restart,
100MACHINE_END 96MACHINE_END
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index e94744111634..1b80f10722b3 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -86,17 +86,13 @@ static void __init iq81340sc_timer_init(void)
86 iop_init_time(bus_freq); 86 iop_init_time(bus_freq);
87} 87}
88 88
89static struct sys_timer iq81340sc_timer = {
90 .init = iq81340sc_timer_init,
91};
92
93MACHINE_START(IQ81340SC, "Intel IQ81340SC") 89MACHINE_START(IQ81340SC, "Intel IQ81340SC")
94 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ 90 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
95 .atag_offset = 0x100, 91 .atag_offset = 0x100,
96 .init_early = iop13xx_init_early, 92 .init_early = iop13xx_init_early,
97 .map_io = iop13xx_map_io, 93 .map_io = iop13xx_map_io,
98 .init_irq = iop13xx_init_irq, 94 .init_irq = iop13xx_init_irq,
99 .timer = &iq81340sc_timer, 95 .init_time = iq81340sc_timer_init,
100 .init_machine = iq81340sc_init, 96 .init_machine = iq81340sc_init,
101 .restart = iop13xx_restart, 97 .restart = iop13xx_restart,
102MACHINE_END 98MACHINE_END
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 9f369f09c29d..31fbb6c61b25 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -40,10 +40,6 @@ static void __init em7210_timer_init(void)
40 iop_init_time(200000000); 40 iop_init_time(200000000);
41} 41}
42 42
43static struct sys_timer em7210_timer = {
44 .init = em7210_timer_init,
45};
46
47/* 43/*
48 * EM7210 RTC 44 * EM7210 RTC
49 */ 45 */
@@ -205,7 +201,7 @@ MACHINE_START(EM7210, "Lanner EM7210")
205 .atag_offset = 0x100, 201 .atag_offset = 0x100,
206 .map_io = em7210_map_io, 202 .map_io = em7210_map_io,
207 .init_irq = iop32x_init_irq, 203 .init_irq = iop32x_init_irq,
208 .timer = &em7210_timer, 204 .init_time = em7210_timer_init,
209 .init_machine = em7210_init_machine, 205 .init_machine = em7210_init_machine,
210 .restart = iop3xx_restart, 206 .restart = iop3xx_restart,
211MACHINE_END 207MACHINE_END
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index 02e20c3912ba..ac304705fe68 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -44,10 +44,6 @@ static void __init glantank_timer_init(void)
44 iop_init_time(200000000); 44 iop_init_time(200000000);
45} 45}
46 46
47static struct sys_timer glantank_timer = {
48 .init = glantank_timer_init,
49};
50
51 47
52/* 48/*
53 * GLAN Tank I/O. 49 * GLAN Tank I/O.
@@ -209,7 +205,7 @@ MACHINE_START(GLANTANK, "GLAN Tank")
209 .atag_offset = 0x100, 205 .atag_offset = 0x100,
210 .map_io = glantank_map_io, 206 .map_io = glantank_map_io,
211 .init_irq = iop32x_init_irq, 207 .init_irq = iop32x_init_irq,
212 .timer = &glantank_timer, 208 .init_time = glantank_timer_init,
213 .init_machine = glantank_init_machine, 209 .init_machine = glantank_init_machine,
214 .restart = iop3xx_restart, 210 .restart = iop3xx_restart,
215MACHINE_END 211MACHINE_END
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index ddd1c7ecfe57..f2cd2966212d 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -75,10 +75,6 @@ static void __init iq31244_timer_init(void)
75 } 75 }
76} 76}
77 77
78static struct sys_timer iq31244_timer = {
79 .init = iq31244_timer_init,
80};
81
82 78
83/* 79/*
84 * IQ31244 I/O. 80 * IQ31244 I/O.
@@ -314,7 +310,7 @@ MACHINE_START(IQ31244, "Intel IQ31244")
314 .atag_offset = 0x100, 310 .atag_offset = 0x100,
315 .map_io = iq31244_map_io, 311 .map_io = iq31244_map_io,
316 .init_irq = iop32x_init_irq, 312 .init_irq = iop32x_init_irq,
317 .timer = &iq31244_timer, 313 .init_time = iq31244_timer_init,
318 .init_machine = iq31244_init_machine, 314 .init_machine = iq31244_init_machine,
319 .restart = iop3xx_restart, 315 .restart = iop3xx_restart,
320MACHINE_END 316MACHINE_END
@@ -329,7 +325,7 @@ MACHINE_START(EP80219, "Intel EP80219")
329 .atag_offset = 0x100, 325 .atag_offset = 0x100,
330 .map_io = iq31244_map_io, 326 .map_io = iq31244_map_io,
331 .init_irq = iop32x_init_irq, 327 .init_irq = iop32x_init_irq,
332 .timer = &iq31244_timer, 328 .init_time = iq31244_timer_init,
333 .init_machine = iq31244_init_machine, 329 .init_machine = iq31244_init_machine,
334 .restart = iop3xx_restart, 330 .restart = iop3xx_restart,
335MACHINE_END 331MACHINE_END
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index bf155e6a3b45..015435de90dd 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -43,10 +43,6 @@ static void __init iq80321_timer_init(void)
43 iop_init_time(200000000); 43 iop_init_time(200000000);
44} 44}
45 45
46static struct sys_timer iq80321_timer = {
47 .init = iq80321_timer_init,
48};
49
50 46
51/* 47/*
52 * IQ80321 I/O. 48 * IQ80321 I/O.
@@ -188,7 +184,7 @@ MACHINE_START(IQ80321, "Intel IQ80321")
188 .atag_offset = 0x100, 184 .atag_offset = 0x100,
189 .map_io = iq80321_map_io, 185 .map_io = iq80321_map_io,
190 .init_irq = iop32x_init_irq, 186 .init_irq = iop32x_init_irq,
191 .timer = &iq80321_timer, 187 .init_time = iq80321_timer_init,
192 .init_machine = iq80321_init_machine, 188 .init_machine = iq80321_init_machine,
193 .restart = iop3xx_restart, 189 .restart = iop3xx_restart,
194MACHINE_END 190MACHINE_END
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 5a7ae91e8849..ea0984a7449e 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -50,10 +50,6 @@ static void __init n2100_timer_init(void)
50 iop_init_time(198000000); 50 iop_init_time(198000000);
51} 51}
52 52
53static struct sys_timer n2100_timer = {
54 .init = n2100_timer_init,
55};
56
57 53
58/* 54/*
59 * N2100 I/O. 55 * N2100 I/O.
@@ -337,7 +333,7 @@ MACHINE_START(N2100, "Thecus N2100")
337 .atag_offset = 0x100, 333 .atag_offset = 0x100,
338 .map_io = n2100_map_io, 334 .map_io = n2100_map_io,
339 .init_irq = iop32x_init_irq, 335 .init_irq = iop32x_init_irq,
340 .timer = &n2100_timer, 336 .init_time = n2100_timer_init,
341 .init_machine = n2100_init_machine, 337 .init_machine = n2100_init_machine,
342 .restart = n2100_restart, 338 .restart = n2100_restart,
343MACHINE_END 339MACHINE_END
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index e74a7debe793..c43304a10fa7 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -45,10 +45,6 @@ static void __init iq80331_timer_init(void)
45 iop_init_time(266000000); 45 iop_init_time(266000000);
46} 46}
47 47
48static struct sys_timer iq80331_timer = {
49 .init = iq80331_timer_init,
50};
51
52 48
53/* 49/*
54 * IQ80331 PCI. 50 * IQ80331 PCI.
@@ -143,7 +139,7 @@ MACHINE_START(IQ80331, "Intel IQ80331")
143 .atag_offset = 0x100, 139 .atag_offset = 0x100,
144 .map_io = iop3xx_map_io, 140 .map_io = iop3xx_map_io,
145 .init_irq = iop33x_init_irq, 141 .init_irq = iop33x_init_irq,
146 .timer = &iq80331_timer, 142 .init_time = iq80331_timer_init,
147 .init_machine = iq80331_init_machine, 143 .init_machine = iq80331_init_machine,
148 .restart = iop3xx_restart, 144 .restart = iop3xx_restart,
149MACHINE_END 145MACHINE_END
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index e2f5beece6e8..8192987e78e5 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -45,10 +45,6 @@ static void __init iq80332_timer_init(void)
45 iop_init_time(266000000); 45 iop_init_time(266000000);
46} 46}
47 47
48static struct sys_timer iq80332_timer = {
49 .init = iq80332_timer_init,
50};
51
52 48
53/* 49/*
54 * IQ80332 PCI. 50 * IQ80332 PCI.
@@ -143,7 +139,7 @@ MACHINE_START(IQ80332, "Intel IQ80332")
143 .atag_offset = 0x100, 139 .atag_offset = 0x100,
144 .map_io = iop3xx_map_io, 140 .map_io = iop3xx_map_io,
145 .init_irq = iop33x_init_irq, 141 .init_irq = iop33x_init_irq,
146 .timer = &iq80332_timer, 142 .init_time = iq80332_timer_init,
147 .init_machine = iq80332_init_machine, 143 .init_machine = iq80332_init_machine,
148 .restart = iop3xx_restart, 144 .restart = iop3xx_restart,
149MACHINE_END 145MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
index 90e42e9982cb..6beec150c060 100644
--- a/arch/arm/mach-ixp4xx/avila-setup.c
+++ b/arch/arm/mach-ixp4xx/avila-setup.c
@@ -167,7 +167,7 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform")
167 .map_io = ixp4xx_map_io, 167 .map_io = ixp4xx_map_io,
168 .init_early = ixp4xx_init_early, 168 .init_early = ixp4xx_init_early,
169 .init_irq = ixp4xx_init_irq, 169 .init_irq = ixp4xx_init_irq,
170 .timer = &ixp4xx_timer, 170 .init_time = ixp4xx_timer_init,
171 .atag_offset = 0x100, 171 .atag_offset = 0x100,
172 .init_machine = avila_init, 172 .init_machine = avila_init,
173#if defined(CONFIG_PCI) 173#if defined(CONFIG_PCI)
@@ -187,7 +187,7 @@ MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
187 .map_io = ixp4xx_map_io, 187 .map_io = ixp4xx_map_io,
188 .init_early = ixp4xx_init_early, 188 .init_early = ixp4xx_init_early,
189 .init_irq = ixp4xx_init_irq, 189 .init_irq = ixp4xx_init_irq,
190 .timer = &ixp4xx_timer, 190 .init_time = ixp4xx_timer_init,
191 .atag_offset = 0x100, 191 .atag_offset = 0x100,
192 .init_machine = avila_init, 192 .init_machine = avila_init,
193#if defined(CONFIG_PCI) 193#if defined(CONFIG_PCI)
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 8c0c0e2d0727..1dbeb7c99d58 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -307,10 +307,6 @@ void __init ixp4xx_timer_init(void)
307 ixp4xx_clockevent_init(); 307 ixp4xx_clockevent_init();
308} 308}
309 309
310struct sys_timer ixp4xx_timer = {
311 .init = ixp4xx_timer_init,
312};
313
314static struct pxa2xx_udc_mach_info ixp4xx_udc_info; 310static struct pxa2xx_udc_mach_info ixp4xx_udc_info;
315 311
316void __init ixp4xx_set_udc_info(struct pxa2xx_udc_mach_info *info) 312void __init ixp4xx_set_udc_info(struct pxa2xx_udc_mach_info *info)
@@ -523,22 +519,15 @@ static struct clock_event_device clockevent_ixp4xx = {
523 .name = "ixp4xx timer1", 519 .name = "ixp4xx timer1",
524 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 520 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
525 .rating = 200, 521 .rating = 200,
526 .shift = 24,
527 .set_mode = ixp4xx_set_mode, 522 .set_mode = ixp4xx_set_mode,
528 .set_next_event = ixp4xx_set_next_event, 523 .set_next_event = ixp4xx_set_next_event,
529}; 524};
530 525
531static void __init ixp4xx_clockevent_init(void) 526static void __init ixp4xx_clockevent_init(void)
532{ 527{
533 clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC,
534 clockevent_ixp4xx.shift);
535 clockevent_ixp4xx.max_delta_ns =
536 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
537 clockevent_ixp4xx.min_delta_ns =
538 clockevent_delta2ns(0xf, &clockevent_ixp4xx);
539 clockevent_ixp4xx.cpumask = cpumask_of(0); 528 clockevent_ixp4xx.cpumask = cpumask_of(0);
540 529 clockevents_config_and_register(&clockevent_ixp4xx, IXP4XX_TIMER_FREQ,
541 clockevents_register_device(&clockevent_ixp4xx); 530 0xf, 0xfffffffe);
542} 531}
543 532
544void ixp4xx_restart(char mode, const char *cmd) 533void ixp4xx_restart(char mode, const char *cmd)
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index 1b83110028d6..820cae8608fc 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -112,7 +112,7 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
112 .map_io = ixp4xx_map_io, 112 .map_io = ixp4xx_map_io,
113 .init_early = ixp4xx_init_early, 113 .init_early = ixp4xx_init_early,
114 .init_irq = ixp4xx_init_irq, 114 .init_irq = ixp4xx_init_irq,
115 .timer = &ixp4xx_timer, 115 .init_time = ixp4xx_timer_init,
116 .atag_offset = 0x100, 116 .atag_offset = 0x100,
117 .init_machine = coyote_init, 117 .init_machine = coyote_init,
118#if defined(CONFIG_PCI) 118#if defined(CONFIG_PCI)
@@ -132,7 +132,7 @@ MACHINE_START(IXDPG425, "Intel IXDPG425")
132 .map_io = ixp4xx_map_io, 132 .map_io = ixp4xx_map_io,
133 .init_early = ixp4xx_init_early, 133 .init_early = ixp4xx_init_early,
134 .init_irq = ixp4xx_init_irq, 134 .init_irq = ixp4xx_init_irq,
135 .timer = &ixp4xx_timer, 135 .init_time = ixp4xx_timer_init,
136 .atag_offset = 0x100, 136 .atag_offset = 0x100,
137 .init_machine = coyote_init, 137 .init_machine = coyote_init,
138 .restart = ixp4xx_restart, 138 .restart = ixp4xx_restart,
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 97a0af8f1955..5d413f8c5700 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -226,10 +226,6 @@ static void __init dsmg600_timer_init(void)
226 ixp4xx_timer_init(); 226 ixp4xx_timer_init();
227} 227}
228 228
229static struct sys_timer dsmg600_timer = {
230 .init = dsmg600_timer_init,
231};
232
233static void __init dsmg600_init(void) 229static void __init dsmg600_init(void)
234{ 230{
235 ixp4xx_sys_init(); 231 ixp4xx_sys_init();
@@ -282,7 +278,7 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
282 .map_io = ixp4xx_map_io, 278 .map_io = ixp4xx_map_io,
283 .init_early = ixp4xx_init_early, 279 .init_early = ixp4xx_init_early,
284 .init_irq = ixp4xx_init_irq, 280 .init_irq = ixp4xx_init_irq,
285 .timer = &dsmg600_timer, 281 .init_time = dsmg600_timer_init,
286 .init_machine = dsmg600_init, 282 .init_machine = dsmg600_init,
287#if defined(CONFIG_PCI) 283#if defined(CONFIG_PCI)
288 .dma_zone_size = SZ_64M, 284 .dma_zone_size = SZ_64M,
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index 9175a25a7511..429966b756ed 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -272,7 +272,7 @@ MACHINE_START(FSG, "Freecom FSG-3")
272 .map_io = ixp4xx_map_io, 272 .map_io = ixp4xx_map_io,
273 .init_early = ixp4xx_init_early, 273 .init_early = ixp4xx_init_early,
274 .init_irq = ixp4xx_init_irq, 274 .init_irq = ixp4xx_init_irq,
275 .timer = &ixp4xx_timer, 275 .init_time = ixp4xx_timer_init,
276 .atag_offset = 0x100, 276 .atag_offset = 0x100,
277 .init_machine = fsg_init, 277 .init_machine = fsg_init,
278#if defined(CONFIG_PCI) 278#if defined(CONFIG_PCI)
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c
index 033c71758953..3d24b3fcee87 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
@@ -99,7 +99,7 @@ MACHINE_START(GATEWAY7001, "Gateway 7001 AP")
99 .map_io = ixp4xx_map_io, 99 .map_io = ixp4xx_map_io,
100 .init_early = ixp4xx_init_early, 100 .init_early = ixp4xx_init_early,
101 .init_irq = ixp4xx_init_irq, 101 .init_irq = ixp4xx_init_irq,
102 .timer = &ixp4xx_timer, 102 .init_time = ixp4xx_timer_init,
103 .atag_offset = 0x100, 103 .atag_offset = 0x100,
104 .init_machine = gateway7001_init, 104 .init_machine = gateway7001_init,
105#if defined(CONFIG_PCI) 105#if defined(CONFIG_PCI)
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index 53b8348dfcc2..e54ff491c105 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -498,7 +498,7 @@ MACHINE_START(GORAMO_MLR, "MultiLink")
498 .map_io = ixp4xx_map_io, 498 .map_io = ixp4xx_map_io,
499 .init_early = ixp4xx_init_early, 499 .init_early = ixp4xx_init_early,
500 .init_irq = ixp4xx_init_irq, 500 .init_irq = ixp4xx_init_irq,
501 .timer = &ixp4xx_timer, 501 .init_time = ixp4xx_timer_init,
502 .atag_offset = 0x100, 502 .atag_offset = 0x100,
503 .init_machine = gmlr_init, 503 .init_machine = gmlr_init,
504#if defined(CONFIG_PCI) 504#if defined(CONFIG_PCI)
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index 18ebc6be7969..16a12994fb53 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -167,7 +167,7 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
167 .map_io = ixp4xx_map_io, 167 .map_io = ixp4xx_map_io,
168 .init_early = ixp4xx_init_early, 168 .init_early = ixp4xx_init_early,
169 .init_irq = ixp4xx_init_irq, 169 .init_irq = ixp4xx_init_irq,
170 .timer = &ixp4xx_timer, 170 .init_time = ixp4xx_timer_init,
171 .atag_offset = 0x100, 171 .atag_offset = 0x100,
172 .init_machine = gtwx5715_init, 172 .init_machine = gtwx5715_init,
173#if defined(CONFIG_PCI) 173#if defined(CONFIG_PCI)
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index 5bce94aacca9..db5afb69c123 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -89,8 +89,6 @@ struct ixp4xx_pata_data {
89 void __iomem *cs1; 89 void __iomem *cs1;
90}; 90};
91 91
92struct sys_timer;
93
94#define IXP4XX_ETH_NPEA 0x00 92#define IXP4XX_ETH_NPEA 0x00
95#define IXP4XX_ETH_NPEB 0x10 93#define IXP4XX_ETH_NPEB 0x10
96#define IXP4XX_ETH_NPEC 0x20 94#define IXP4XX_ETH_NPEC 0x20
@@ -125,7 +123,6 @@ extern void ixp4xx_init_early(void);
125extern void ixp4xx_init_irq(void); 123extern void ixp4xx_init_irq(void);
126extern void ixp4xx_sys_init(void); 124extern void ixp4xx_sys_init(void);
127extern void ixp4xx_timer_init(void); 125extern void ixp4xx_timer_init(void);
128extern struct sys_timer ixp4xx_timer;
129extern void ixp4xx_restart(char, const char *); 126extern void ixp4xx_restart(char, const char *);
130extern void ixp4xx_pci_preinit(void); 127extern void ixp4xx_pci_preinit(void);
131struct pci_sys_data; 128struct pci_sys_data;
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index 108a9d3f382d..22d688b7d513 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -252,7 +252,7 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
252 .map_io = ixp4xx_map_io, 252 .map_io = ixp4xx_map_io,
253 .init_early = ixp4xx_init_early, 253 .init_early = ixp4xx_init_early,
254 .init_irq = ixp4xx_init_irq, 254 .init_irq = ixp4xx_init_irq,
255 .timer = &ixp4xx_timer, 255 .init_time = ixp4xx_timer_init,
256 .atag_offset = 0x100, 256 .atag_offset = 0x100,
257 .init_machine = ixdp425_init, 257 .init_machine = ixdp425_init,
258#if defined(CONFIG_PCI) 258#if defined(CONFIG_PCI)
@@ -268,7 +268,7 @@ MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
268 .map_io = ixp4xx_map_io, 268 .map_io = ixp4xx_map_io,
269 .init_early = ixp4xx_init_early, 269 .init_early = ixp4xx_init_early,
270 .init_irq = ixp4xx_init_irq, 270 .init_irq = ixp4xx_init_irq,
271 .timer = &ixp4xx_timer, 271 .init_time = ixp4xx_timer_init,
272 .atag_offset = 0x100, 272 .atag_offset = 0x100,
273 .init_machine = ixdp425_init, 273 .init_machine = ixdp425_init,
274#if defined(CONFIG_PCI) 274#if defined(CONFIG_PCI)
@@ -283,7 +283,7 @@ MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
283 .map_io = ixp4xx_map_io, 283 .map_io = ixp4xx_map_io,
284 .init_early = ixp4xx_init_early, 284 .init_early = ixp4xx_init_early,
285 .init_irq = ixp4xx_init_irq, 285 .init_irq = ixp4xx_init_irq,
286 .timer = &ixp4xx_timer, 286 .init_time = ixp4xx_timer_init,
287 .atag_offset = 0x100, 287 .atag_offset = 0x100,
288 .init_machine = ixdp425_init, 288 .init_machine = ixdp425_init,
289#if defined(CONFIG_PCI) 289#if defined(CONFIG_PCI)
@@ -298,7 +298,7 @@ MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
298 .map_io = ixp4xx_map_io, 298 .map_io = ixp4xx_map_io,
299 .init_early = ixp4xx_init_early, 299 .init_early = ixp4xx_init_early,
300 .init_irq = ixp4xx_init_irq, 300 .init_irq = ixp4xx_init_irq,
301 .timer = &ixp4xx_timer, 301 .init_time = ixp4xx_timer_init,
302 .atag_offset = 0x100, 302 .atag_offset = 0x100,
303 .init_machine = ixdp425_init, 303 .init_machine = ixdp425_init,
304#if defined(CONFIG_PCI) 304#if defined(CONFIG_PCI)
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index 33cb0955b6bf..ed667ce9f576 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -317,7 +317,7 @@ MACHINE_START(NAS100D, "Iomega NAS 100d")
317 .map_io = ixp4xx_map_io, 317 .map_io = ixp4xx_map_io,
318 .init_early = ixp4xx_init_early, 318 .init_early = ixp4xx_init_early,
319 .init_irq = ixp4xx_init_irq, 319 .init_irq = ixp4xx_init_irq,
320 .timer = &ixp4xx_timer, 320 .init_time = ixp4xx_timer_init,
321 .init_machine = nas100d_init, 321 .init_machine = nas100d_init,
322#if defined(CONFIG_PCI) 322#if defined(CONFIG_PCI)
323 .dma_zone_size = SZ_64M, 323 .dma_zone_size = SZ_64M,
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index e2903faaebb3..7e55236c26ea 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -232,10 +232,6 @@ static void __init nslu2_timer_init(void)
232 ixp4xx_timer_init(); 232 ixp4xx_timer_init();
233} 233}
234 234
235static struct sys_timer nslu2_timer = {
236 .init = nslu2_timer_init,
237};
238
239static void __init nslu2_init(void) 235static void __init nslu2_init(void)
240{ 236{
241 uint8_t __iomem *f; 237 uint8_t __iomem *f;
@@ -303,7 +299,7 @@ MACHINE_START(NSLU2, "Linksys NSLU2")
303 .map_io = ixp4xx_map_io, 299 .map_io = ixp4xx_map_io,
304 .init_early = ixp4xx_init_early, 300 .init_early = ixp4xx_init_early,
305 .init_irq = ixp4xx_init_irq, 301 .init_irq = ixp4xx_init_irq,
306 .timer = &nslu2_timer, 302 .init_time = nslu2_timer_init,
307 .init_machine = nslu2_init, 303 .init_machine = nslu2_init,
308#if defined(CONFIG_PCI) 304#if defined(CONFIG_PCI)
309 .dma_zone_size = SZ_64M, 305 .dma_zone_size = SZ_64M,
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
index 158ddb79821d..46a89f5e8269 100644
--- a/arch/arm/mach-ixp4xx/omixp-setup.c
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -245,7 +245,7 @@ MACHINE_START(DEVIXP, "Omicron DEVIXP")
245 .map_io = ixp4xx_map_io, 245 .map_io = ixp4xx_map_io,
246 .init_early = ixp4xx_init_early, 246 .init_early = ixp4xx_init_early,
247 .init_irq = ixp4xx_init_irq, 247 .init_irq = ixp4xx_init_irq,
248 .timer = &ixp4xx_timer, 248 .init_time = ixp4xx_timer_init,
249 .init_machine = omixp_init, 249 .init_machine = omixp_init,
250 .restart = ixp4xx_restart, 250 .restart = ixp4xx_restart,
251MACHINE_END 251MACHINE_END
@@ -257,7 +257,7 @@ MACHINE_START(MICCPT, "Omicron MICCPT")
257 .map_io = ixp4xx_map_io, 257 .map_io = ixp4xx_map_io,
258 .init_early = ixp4xx_init_early, 258 .init_early = ixp4xx_init_early,
259 .init_irq = ixp4xx_init_irq, 259 .init_irq = ixp4xx_init_irq,
260 .timer = &ixp4xx_timer, 260 .init_time = ixp4xx_timer_init,
261 .init_machine = omixp_init, 261 .init_machine = omixp_init,
262#if defined(CONFIG_PCI) 262#if defined(CONFIG_PCI)
263 .dma_zone_size = SZ_64M, 263 .dma_zone_size = SZ_64M,
@@ -272,7 +272,7 @@ MACHINE_START(MIC256, "Omicron MIC256")
272 .map_io = ixp4xx_map_io, 272 .map_io = ixp4xx_map_io,
273 .init_early = ixp4xx_init_early, 273 .init_early = ixp4xx_init_early,
274 .init_irq = ixp4xx_init_irq, 274 .init_irq = ixp4xx_init_irq,
275 .timer = &ixp4xx_timer, 275 .init_time = ixp4xx_timer_init,
276 .init_machine = omixp_init, 276 .init_machine = omixp_init,
277 .restart = ixp4xx_restart, 277 .restart = ixp4xx_restart,
278MACHINE_END 278MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c
index 2798f435aaf4..d42730a1d4ab 100644
--- a/arch/arm/mach-ixp4xx/vulcan-setup.c
+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -239,7 +239,7 @@ MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
239 .map_io = ixp4xx_map_io, 239 .map_io = ixp4xx_map_io,
240 .init_early = ixp4xx_init_early, 240 .init_early = ixp4xx_init_early,
241 .init_irq = ixp4xx_init_irq, 241 .init_irq = ixp4xx_init_irq,
242 .timer = &ixp4xx_timer, 242 .init_time = ixp4xx_timer_init,
243 .atag_offset = 0x100, 243 .atag_offset = 0x100,
244 .init_machine = vulcan_init, 244 .init_machine = vulcan_init,
245#if defined(CONFIG_PCI) 245#if defined(CONFIG_PCI)
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c
index a785175b115b..8f9ea2f3a9a5 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
@@ -100,7 +100,7 @@ MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2")
100 .map_io = ixp4xx_map_io, 100 .map_io = ixp4xx_map_io,
101 .init_early = ixp4xx_init_early, 101 .init_early = ixp4xx_init_early,
102 .init_irq = ixp4xx_init_irq, 102 .init_irq = ixp4xx_init_irq,
103 .timer = &ixp4xx_timer, 103 .init_time = ixp4xx_timer_init,
104 .atag_offset = 0x100, 104 .atag_offset = 0x100,
105 .init_machine = wg302v2_init, 105 .init_machine = wg302v2_init,
106#if defined(CONFIG_PCI) 106#if defined(CONFIG_PCI)
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index de4fd2bb1e27..d4af5c191c24 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -183,7 +183,7 @@ DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
183 .map_io = kirkwood_map_io, 183 .map_io = kirkwood_map_io,
184 .init_early = kirkwood_init_early, 184 .init_early = kirkwood_init_early,
185 .init_irq = orion_dt_init_irq, 185 .init_irq = orion_dt_init_irq,
186 .timer = &kirkwood_timer, 186 .init_time = kirkwood_timer_init,
187 .init_machine = kirkwood_dt_init, 187 .init_machine = kirkwood_dt_init,
188 .restart = kirkwood_restart, 188 .restart = kirkwood_restart,
189 .dt_compat = kirkwood_dt_board_compat, 189 .dt_compat = kirkwood_dt_board_compat,
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index bac21a554c91..b5ad4dff6b12 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -530,7 +530,7 @@ static int __init kirkwood_find_tclk(void)
530 return 166666667; 530 return 166666667;
531} 531}
532 532
533static void __init kirkwood_timer_init(void) 533void __init kirkwood_timer_init(void)
534{ 534{
535 kirkwood_tclk = kirkwood_find_tclk(); 535 kirkwood_tclk = kirkwood_find_tclk();
536 536
@@ -538,10 +538,6 @@ static void __init kirkwood_timer_init(void)
538 IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); 538 IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
539} 539}
540 540
541struct sys_timer kirkwood_timer = {
542 .init = kirkwood_timer_init,
543};
544
545/***************************************************************************** 541/*****************************************************************************
546 * Audio 542 * Audio
547 ****************************************************************************/ 543 ****************************************************************************/
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 5ffa57f08c80..283ab611e8da 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -156,7 +156,7 @@ void kirkwood_xor1_init(void);
156void kirkwood_crypto_init(void); 156void kirkwood_crypto_init(void);
157 157
158extern int kirkwood_tclk; 158extern int kirkwood_tclk;
159extern struct sys_timer kirkwood_timer; 159extern void kirkwood_timer_init(void);
160 160
161#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) 161#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
162 162
diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c
index 2c1a453df201..453418063c1e 100644
--- a/arch/arm/mach-kirkwood/d2net_v2-setup.c
+++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c
@@ -226,6 +226,6 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2")
226 .map_io = kirkwood_map_io, 226 .map_io = kirkwood_map_io,
227 .init_early = kirkwood_init_early, 227 .init_early = kirkwood_init_early,
228 .init_irq = kirkwood_init_irq, 228 .init_irq = kirkwood_init_irq,
229 .timer = &kirkwood_timer, 229 .init_time = kirkwood_timer_init,
230 .restart = kirkwood_restart, 230 .restart = kirkwood_restart,
231MACHINE_END 231MACHINE_END
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index c49b177c1523..5a369fe74754 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -103,6 +103,6 @@ MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board")
103 .map_io = kirkwood_map_io, 103 .map_io = kirkwood_map_io,
104 .init_early = kirkwood_init_early, 104 .init_early = kirkwood_init_early,
105 .init_irq = kirkwood_init_irq, 105 .init_irq = kirkwood_init_irq,
106 .timer = &kirkwood_timer, 106 .init_time = kirkwood_timer_init,
107 .restart = kirkwood_restart, 107 .restart = kirkwood_restart,
108MACHINE_END 108MACHINE_END
diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c
index 791a98fafa29..77f98f2b0416 100644
--- a/arch/arm/mach-kirkwood/dockstar-setup.c
+++ b/arch/arm/mach-kirkwood/dockstar-setup.c
@@ -107,6 +107,6 @@ MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar")
107 .map_io = kirkwood_map_io, 107 .map_io = kirkwood_map_io,
108 .init_early = kirkwood_init_early, 108 .init_early = kirkwood_init_early,
109 .init_irq = kirkwood_init_irq, 109 .init_irq = kirkwood_init_irq,
110 .timer = &kirkwood_timer, 110 .init_time = kirkwood_timer_init,
111 .restart = kirkwood_restart, 111 .restart = kirkwood_restart,
112MACHINE_END 112MACHINE_END
diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c
index 7cb55f982243..1c6e736cbbf8 100644
--- a/arch/arm/mach-kirkwood/guruplug-setup.c
+++ b/arch/arm/mach-kirkwood/guruplug-setup.c
@@ -126,6 +126,6 @@ MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board")
126 .map_io = kirkwood_map_io, 126 .map_io = kirkwood_map_io,
127 .init_early = kirkwood_init_early, 127 .init_early = kirkwood_init_early,
128 .init_irq = kirkwood_init_irq, 128 .init_irq = kirkwood_init_irq,
129 .timer = &kirkwood_timer, 129 .init_time = kirkwood_timer_init,
130 .restart = kirkwood_restart, 130 .restart = kirkwood_restart,
131MACHINE_END 131MACHINE_END
diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
index 6d8364a97810..ba384b992bef 100644
--- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
+++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
@@ -167,6 +167,6 @@ MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board")
167 .map_io = kirkwood_map_io, 167 .map_io = kirkwood_map_io,
168 .init_early = kirkwood_init_early, 168 .init_early = kirkwood_init_early,
169 .init_irq = kirkwood_init_irq, 169 .init_irq = kirkwood_init_irq,
170 .timer = &kirkwood_timer, 170 .init_time = kirkwood_timer_init,
171 .restart = kirkwood_restart, 171 .restart = kirkwood_restart,
172MACHINE_END 172MACHINE_END
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 728e86d33f0c..3b706611da8e 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -263,7 +263,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
263 .map_io = kirkwood_map_io, 263 .map_io = kirkwood_map_io,
264 .init_early = kirkwood_init_early, 264 .init_early = kirkwood_init_early,
265 .init_irq = kirkwood_init_irq, 265 .init_irq = kirkwood_init_irq,
266 .timer = &kirkwood_timer, 266 .init_time = kirkwood_timer_init,
267 .restart = kirkwood_restart, 267 .restart = kirkwood_restart,
268MACHINE_END 268MACHINE_END
269#endif 269#endif
@@ -275,7 +275,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
275 .map_io = kirkwood_map_io, 275 .map_io = kirkwood_map_io,
276 .init_early = kirkwood_init_early, 276 .init_early = kirkwood_init_early,
277 .init_irq = kirkwood_init_irq, 277 .init_irq = kirkwood_init_irq,
278 .timer = &kirkwood_timer, 278 .init_time = kirkwood_timer_init,
279 .restart = kirkwood_restart, 279 .restart = kirkwood_restart,
280MACHINE_END 280MACHINE_END
281#endif 281#endif
@@ -287,7 +287,7 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2")
287 .map_io = kirkwood_map_io, 287 .map_io = kirkwood_map_io,
288 .init_early = kirkwood_init_early, 288 .init_early = kirkwood_init_early,
289 .init_irq = kirkwood_init_irq, 289 .init_irq = kirkwood_init_irq,
290 .timer = &kirkwood_timer, 290 .init_time = kirkwood_timer_init,
291 .restart = kirkwood_restart, 291 .restart = kirkwood_restart,
292MACHINE_END 292MACHINE_END
293#endif 293#endif
diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
index a3b091470b8a..913d032cdb19 100644
--- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
@@ -404,7 +404,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2")
404 .map_io = kirkwood_map_io, 404 .map_io = kirkwood_map_io,
405 .init_early = kirkwood_init_early, 405 .init_early = kirkwood_init_early,
406 .init_irq = kirkwood_init_irq, 406 .init_irq = kirkwood_init_irq,
407 .timer = &kirkwood_timer, 407 .init_time = kirkwood_timer_init,
408 .restart = kirkwood_restart, 408 .restart = kirkwood_restart,
409MACHINE_END 409MACHINE_END
410#endif 410#endif
@@ -416,7 +416,7 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2")
416 .map_io = kirkwood_map_io, 416 .map_io = kirkwood_map_io,
417 .init_early = kirkwood_init_early, 417 .init_early = kirkwood_init_early,
418 .init_irq = kirkwood_init_irq, 418 .init_irq = kirkwood_init_irq,
419 .timer = &kirkwood_timer, 419 .init_time = kirkwood_timer_init,
420 .restart = kirkwood_restart, 420 .restart = kirkwood_restart,
421MACHINE_END 421MACHINE_END
422#endif 422#endif
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
index 7e81e9b586bf..8ddd69fdc937 100644
--- a/arch/arm/mach-kirkwood/openrd-setup.c
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -221,7 +221,7 @@ MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
221 .map_io = kirkwood_map_io, 221 .map_io = kirkwood_map_io,
222 .init_early = kirkwood_init_early, 222 .init_early = kirkwood_init_early,
223 .init_irq = kirkwood_init_irq, 223 .init_irq = kirkwood_init_irq,
224 .timer = &kirkwood_timer, 224 .init_time = kirkwood_timer_init,
225 .restart = kirkwood_restart, 225 .restart = kirkwood_restart,
226MACHINE_END 226MACHINE_END
227#endif 227#endif
@@ -234,7 +234,7 @@ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
234 .map_io = kirkwood_map_io, 234 .map_io = kirkwood_map_io,
235 .init_early = kirkwood_init_early, 235 .init_early = kirkwood_init_early,
236 .init_irq = kirkwood_init_irq, 236 .init_irq = kirkwood_init_irq,
237 .timer = &kirkwood_timer, 237 .init_time = kirkwood_timer_init,
238 .restart = kirkwood_restart, 238 .restart = kirkwood_restart,
239MACHINE_END 239MACHINE_END
240#endif 240#endif
@@ -247,7 +247,7 @@ MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board")
247 .map_io = kirkwood_map_io, 247 .map_io = kirkwood_map_io,
248 .init_early = kirkwood_init_early, 248 .init_early = kirkwood_init_early,
249 .init_irq = kirkwood_init_irq, 249 .init_irq = kirkwood_init_irq,
250 .timer = &kirkwood_timer, 250 .init_time = kirkwood_timer_init,
251 .restart = kirkwood_restart, 251 .restart = kirkwood_restart,
252MACHINE_END 252MACHINE_END
253#endif 253#endif
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
index 19072c84008f..e4fd3129d36f 100644
--- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -84,6 +84,6 @@ MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board")
84 .map_io = kirkwood_map_io, 84 .map_io = kirkwood_map_io,
85 .init_early = kirkwood_init_early, 85 .init_early = kirkwood_init_early,
86 .init_irq = kirkwood_init_irq, 86 .init_irq = kirkwood_init_irq,
87 .timer = &kirkwood_timer, 87 .init_time = kirkwood_timer_init,
88 .restart = kirkwood_restart, 88 .restart = kirkwood_restart,
89MACHINE_END 89MACHINE_END
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 9717101a7437..c7d93b48926b 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -120,6 +120,6 @@ MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board")
120 .map_io = kirkwood_map_io, 120 .map_io = kirkwood_map_io,
121 .init_early = kirkwood_init_early, 121 .init_early = kirkwood_init_early,
122 .init_irq = kirkwood_init_irq, 122 .init_irq = kirkwood_init_irq,
123 .timer = &kirkwood_timer, 123 .init_time = kirkwood_timer_init,
124 .restart = kirkwood_restart, 124 .restart = kirkwood_restart,
125MACHINE_END 125MACHINE_END
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 8a175948b28d..55b68fa39f45 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -143,7 +143,7 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
143 .map_io = kirkwood_map_io, 143 .map_io = kirkwood_map_io,
144 .init_early = kirkwood_init_early, 144 .init_early = kirkwood_init_early,
145 .init_irq = kirkwood_init_irq, 145 .init_irq = kirkwood_init_irq,
146 .timer = &kirkwood_timer, 146 .init_time = kirkwood_timer_init,
147 .restart = kirkwood_restart, 147 .restart = kirkwood_restart,
148MACHINE_END 148MACHINE_END
149#endif 149#endif
@@ -155,7 +155,7 @@ MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board")
155 .map_io = kirkwood_map_io, 155 .map_io = kirkwood_map_io,
156 .init_early = kirkwood_init_early, 156 .init_early = kirkwood_init_early,
157 .init_irq = kirkwood_init_irq, 157 .init_irq = kirkwood_init_irq,
158 .timer = &kirkwood_timer, 158 .init_time = kirkwood_timer_init,
159 .restart = kirkwood_restart, 159 .restart = kirkwood_restart,
160MACHINE_END 160MACHINE_END
161#endif 161#endif
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c
index f2daf711e72e..8736f8c97518 100644
--- a/arch/arm/mach-kirkwood/t5325-setup.c
+++ b/arch/arm/mach-kirkwood/t5325-setup.c
@@ -211,6 +211,6 @@ MACHINE_START(T5325, "HP t5325 Thin Client")
211 .map_io = kirkwood_map_io, 211 .map_io = kirkwood_map_io,
212 .init_early = kirkwood_init_early, 212 .init_early = kirkwood_init_early,
213 .init_irq = kirkwood_init_irq, 213 .init_irq = kirkwood_init_irq,
214 .timer = &kirkwood_timer, 214 .init_time = kirkwood_timer_init,
215 .restart = kirkwood_restart, 215 .restart = kirkwood_restart,
216MACHINE_END 216MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c
index 73e2b6ca9564..283abff90228 100644
--- a/arch/arm/mach-kirkwood/ts219-setup.c
+++ b/arch/arm/mach-kirkwood/ts219-setup.c
@@ -137,6 +137,6 @@ MACHINE_START(TS219, "QNAP TS-119/TS-219")
137 .map_io = kirkwood_map_io, 137 .map_io = kirkwood_map_io,
138 .init_early = kirkwood_init_early, 138 .init_early = kirkwood_init_early,
139 .init_irq = kirkwood_init_irq, 139 .init_irq = kirkwood_init_irq,
140 .timer = &kirkwood_timer, 140 .init_time = kirkwood_timer_init,
141 .restart = kirkwood_restart, 141 .restart = kirkwood_restart,
142MACHINE_END 142MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c
index e4c61279ea86..81d585806b2f 100644
--- a/arch/arm/mach-kirkwood/ts41x-setup.c
+++ b/arch/arm/mach-kirkwood/ts41x-setup.c
@@ -181,6 +181,6 @@ MACHINE_START(TS41X, "QNAP TS-41x")
181 .map_io = kirkwood_map_io, 181 .map_io = kirkwood_map_io,
182 .init_early = kirkwood_init_early, 182 .init_early = kirkwood_init_early,
183 .init_irq = kirkwood_init_irq, 183 .init_irq = kirkwood_init_irq,
184 .timer = &kirkwood_timer, 184 .init_time = kirkwood_timer_init,
185 .restart = kirkwood_restart, 185 .restart = kirkwood_restart,
186MACHINE_END 186MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c
index b0c306ccbc6e..456d6386edf8 100644
--- a/arch/arm/mach-ks8695/board-acs5k.c
+++ b/arch/arm/mach-ks8695/board-acs5k.c
@@ -227,6 +227,6 @@ MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board")
227 .map_io = ks8695_map_io, 227 .map_io = ks8695_map_io,
228 .init_irq = ks8695_init_irq, 228 .init_irq = ks8695_init_irq,
229 .init_machine = acs5k_init, 229 .init_machine = acs5k_init,
230 .timer = &ks8695_timer, 230 .init_time = ks8695_timer_init,
231 .restart = ks8695_restart, 231 .restart = ks8695_restart,
232MACHINE_END 232MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c
index e0d36cef2c56..d37c218c3584 100644
--- a/arch/arm/mach-ks8695/board-dsm320.c
+++ b/arch/arm/mach-ks8695/board-dsm320.c
@@ -125,6 +125,6 @@ MACHINE_START(DSM320, "D-Link DSM-320 Wireless Media Player")
125 .map_io = ks8695_map_io, 125 .map_io = ks8695_map_io,
126 .init_irq = ks8695_init_irq, 126 .init_irq = ks8695_init_irq,
127 .init_machine = dsm320_init, 127 .init_machine = dsm320_init,
128 .timer = &ks8695_timer, 128 .init_time = ks8695_timer_init,
129 .restart = ks8695_restart, 129 .restart = ks8695_restart,
130MACHINE_END 130MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
index a8270725b76d..3acbdfd31391 100644
--- a/arch/arm/mach-ks8695/board-micrel.c
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -57,6 +57,6 @@ MACHINE_START(KS8695, "KS8695 Centaur Development Board")
57 .map_io = ks8695_map_io, 57 .map_io = ks8695_map_io,
58 .init_irq = ks8695_init_irq, 58 .init_irq = ks8695_init_irq,
59 .init_machine = micrel_init, 59 .init_machine = micrel_init,
60 .timer = &ks8695_timer, 60 .init_time = ks8695_timer_init,
61 .restart = ks8695_restart, 61 .restart = ks8695_restart,
62MACHINE_END 62MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-og.c b/arch/arm/mach-ks8695/board-og.c
index 1623ba461e47..002bc619bb68 100644
--- a/arch/arm/mach-ks8695/board-og.c
+++ b/arch/arm/mach-ks8695/board-og.c
@@ -145,7 +145,7 @@ MACHINE_START(CM4002, "OpenGear/CM4002")
145 .map_io = ks8695_map_io, 145 .map_io = ks8695_map_io,
146 .init_irq = ks8695_init_irq, 146 .init_irq = ks8695_init_irq,
147 .init_machine = og_init, 147 .init_machine = og_init,
148 .timer = &ks8695_timer, 148 .init_time = ks8695_timer_init,
149 .restart = ks8695_restart, 149 .restart = ks8695_restart,
150MACHINE_END 150MACHINE_END
151#endif 151#endif
@@ -157,7 +157,7 @@ MACHINE_START(CM4008, "OpenGear/CM4008")
157 .map_io = ks8695_map_io, 157 .map_io = ks8695_map_io,
158 .init_irq = ks8695_init_irq, 158 .init_irq = ks8695_init_irq,
159 .init_machine = og_init, 159 .init_machine = og_init,
160 .timer = &ks8695_timer, 160 .init_time = ks8695_timer_init,
161 .restart = ks8695_restart, 161 .restart = ks8695_restart,
162MACHINE_END 162MACHINE_END
163#endif 163#endif
@@ -169,7 +169,7 @@ MACHINE_START(CM41XX, "OpenGear/CM41xx")
169 .map_io = ks8695_map_io, 169 .map_io = ks8695_map_io,
170 .init_irq = ks8695_init_irq, 170 .init_irq = ks8695_init_irq,
171 .init_machine = og_init, 171 .init_machine = og_init,
172 .timer = &ks8695_timer, 172 .init_time = ks8695_timer_init,
173 .restart = ks8695_restart, 173 .restart = ks8695_restart,
174MACHINE_END 174MACHINE_END
175#endif 175#endif
@@ -181,7 +181,7 @@ MACHINE_START(IM4004, "OpenGear/IM4004")
181 .map_io = ks8695_map_io, 181 .map_io = ks8695_map_io,
182 .init_irq = ks8695_init_irq, 182 .init_irq = ks8695_init_irq,
183 .init_machine = og_init, 183 .init_machine = og_init,
184 .timer = &ks8695_timer, 184 .init_time = ks8695_timer_init,
185 .restart = ks8695_restart, 185 .restart = ks8695_restart,
186MACHINE_END 186MACHINE_END
187#endif 187#endif
@@ -193,7 +193,7 @@ MACHINE_START(IM42XX, "OpenGear/IM42xx")
193 .map_io = ks8695_map_io, 193 .map_io = ks8695_map_io,
194 .init_irq = ks8695_init_irq, 194 .init_irq = ks8695_init_irq,
195 .init_machine = og_init, 195 .init_machine = og_init,
196 .timer = &ks8695_timer, 196 .init_time = ks8695_timer_init,
197 .restart = ks8695_restart, 197 .restart = ks8695_restart,
198MACHINE_END 198MACHINE_END
199#endif 199#endif
diff --git a/arch/arm/mach-ks8695/board-sg.c b/arch/arm/mach-ks8695/board-sg.c
index f35b98b5bf37..fdf2352d2cf8 100644
--- a/arch/arm/mach-ks8695/board-sg.c
+++ b/arch/arm/mach-ks8695/board-sg.c
@@ -91,7 +91,7 @@ MACHINE_START(LITE300, "SecureComputing/SG300")
91 .map_io = ks8695_map_io, 91 .map_io = ks8695_map_io,
92 .init_irq = ks8695_init_irq, 92 .init_irq = ks8695_init_irq,
93 .init_machine = sg_init, 93 .init_machine = sg_init,
94 .timer = &ks8695_timer, 94 .init_time = ks8695_timer_init,
95 .restart = ks8695_restart, 95 .restart = ks8695_restart,
96MACHINE_END 96MACHINE_END
97#endif 97#endif
@@ -103,7 +103,7 @@ MACHINE_START(SG310, "McAfee/SG310")
103 .map_io = ks8695_map_io, 103 .map_io = ks8695_map_io,
104 .init_irq = ks8695_init_irq, 104 .init_irq = ks8695_init_irq,
105 .init_machine = sg_init, 105 .init_machine = sg_init,
106 .timer = &ks8695_timer, 106 .init_time = ks8695_timer_init,
107 .restart = ks8695_restart, 107 .restart = ks8695_restart,
108MACHINE_END 108MACHINE_END
109#endif 109#endif
@@ -115,7 +115,7 @@ MACHINE_START(SE4200, "SecureComputing/SE4200")
115 .map_io = ks8695_map_io, 115 .map_io = ks8695_map_io,
116 .init_irq = ks8695_init_irq, 116 .init_irq = ks8695_init_irq,
117 .init_machine = sg_init, 117 .init_machine = sg_init,
118 .timer = &ks8695_timer, 118 .init_time = ks8695_timer_init,
119 .restart = ks8695_restart, 119 .restart = ks8695_restart,
120MACHINE_END 120MACHINE_END
121#endif 121#endif
diff --git a/arch/arm/mach-ks8695/generic.h b/arch/arm/mach-ks8695/generic.h
index f8bdb11a9c33..6e97ce462d73 100644
--- a/arch/arm/mach-ks8695/generic.h
+++ b/arch/arm/mach-ks8695/generic.h
@@ -13,4 +13,4 @@
13extern __init void ks8695_map_io(void); 13extern __init void ks8695_map_io(void);
14extern __init void ks8695_init_irq(void); 14extern __init void ks8695_init_irq(void);
15extern void ks8695_restart(char, const char *); 15extern void ks8695_restart(char, const char *);
16extern struct sys_timer ks8695_timer; 16extern void ks8695_timer_init(void);
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index 46c84bc7792c..c272a3863d5f 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -146,7 +146,7 @@ static void ks8695_timer_setup(void)
146 0xFFFFFFFFU); 146 0xFFFFFFFFU);
147} 147}
148 148
149static void __init ks8695_timer_init (void) 149void __init ks8695_timer_init(void)
150{ 150{
151 ks8695_timer_setup(); 151 ks8695_timer_setup();
152 152
@@ -154,10 +154,6 @@ static void __init ks8695_timer_init (void)
154 setup_irq(KS8695_IRQ_TIMER1, &ks8695_timer_irq); 154 setup_irq(KS8695_IRQ_TIMER1, &ks8695_timer_irq);
155} 155}
156 156
157struct sys_timer ks8695_timer = {
158 .init = ks8695_timer_init,
159};
160
161void ks8695_restart(char mode, const char *cmd) 157void ks8695_restart(char mode, const char *cmd)
162{ 158{
163 unsigned int reg; 159 unsigned int reg;
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index afeac3b1fae6..e0b26062a272 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -25,7 +25,7 @@
25/* 25/*
26 * Other arch specific structures and functions 26 * Other arch specific structures and functions
27 */ 27 */
28extern struct sys_timer lpc32xx_timer; 28extern void lpc32xx_timer_init(void);
29extern void __init lpc32xx_init_irq(void); 29extern void __init lpc32xx_init_irq(void);
30extern void __init lpc32xx_map_io(void); 30extern void __init lpc32xx_map_io(void);
31extern void __init lpc32xx_serial_init(void); 31extern void __init lpc32xx_serial_init(void);
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index e8ff4c3f0566..c1cd5a943ab1 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -263,7 +263,7 @@ DT_MACHINE_START(LPC32XX_DT, "LPC32XX SoC (Flattened Device Tree)")
263 .atag_offset = 0x100, 263 .atag_offset = 0x100,
264 .map_io = lpc32xx_map_io, 264 .map_io = lpc32xx_map_io,
265 .init_irq = lpc32xx_init_irq, 265 .init_irq = lpc32xx_init_irq,
266 .timer = &lpc32xx_timer, 266 .init_time = lpc32xx_timer_init,
267 .init_machine = lpc3250_machine_init, 267 .init_machine = lpc3250_machine_init,
268 .dt_compat = lpc32xx_dt_compat, 268 .dt_compat = lpc32xx_dt_compat,
269 .restart = lpc23xx_restart, 269 .restart = lpc23xx_restart,
diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c
index c40667c33161..20eab63d10ba 100644
--- a/arch/arm/mach-lpc32xx/timer.c
+++ b/arch/arm/mach-lpc32xx/timer.c
@@ -70,7 +70,6 @@ static void lpc32xx_clkevt_mode(enum clock_event_mode mode,
70static struct clock_event_device lpc32xx_clkevt = { 70static struct clock_event_device lpc32xx_clkevt = {
71 .name = "lpc32xx_clkevt", 71 .name = "lpc32xx_clkevt",
72 .features = CLOCK_EVT_FEAT_ONESHOT, 72 .features = CLOCK_EVT_FEAT_ONESHOT,
73 .shift = 32,
74 .rating = 300, 73 .rating = 300,
75 .set_next_event = lpc32xx_clkevt_next_event, 74 .set_next_event = lpc32xx_clkevt_next_event,
76 .set_mode = lpc32xx_clkevt_mode, 75 .set_mode = lpc32xx_clkevt_mode,
@@ -100,7 +99,7 @@ static struct irqaction lpc32xx_timer_irq = {
100 * clocks need to be enabled here manually and then tagged as used in 99 * clocks need to be enabled here manually and then tagged as used in
101 * the clock driver initialization 100 * the clock driver initialization
102 */ 101 */
103static void __init lpc32xx_timer_init(void) 102void __init lpc32xx_timer_init(void)
104{ 103{
105 u32 clkrate, pllreg; 104 u32 clkrate, pllreg;
106 105
@@ -141,14 +140,8 @@ static void __init lpc32xx_timer_init(void)
141 setup_irq(IRQ_LPC32XX_TIMER0, &lpc32xx_timer_irq); 140 setup_irq(IRQ_LPC32XX_TIMER0, &lpc32xx_timer_irq);
142 141
143 /* Setup the clockevent structure. */ 142 /* Setup the clockevent structure. */
144 lpc32xx_clkevt.mult = div_sc(clkrate, NSEC_PER_SEC,
145 lpc32xx_clkevt.shift);
146 lpc32xx_clkevt.max_delta_ns = clockevent_delta2ns(-1,
147 &lpc32xx_clkevt);
148 lpc32xx_clkevt.min_delta_ns = clockevent_delta2ns(1,
149 &lpc32xx_clkevt) + 1;
150 lpc32xx_clkevt.cpumask = cpumask_of(0); 143 lpc32xx_clkevt.cpumask = cpumask_of(0);
151 clockevents_register_device(&lpc32xx_clkevt); 144 clockevents_config_and_register(&lpc32xx_clkevt, clkrate, 1, -1);
152 145
153 /* Use timer1 as clock source. */ 146 /* Use timer1 as clock source. */
154 __raw_writel(LPC32XX_TIMER_CNTR_TCR_RESET, 147 __raw_writel(LPC32XX_TIMER_CNTR_TCR_RESET,
@@ -161,8 +154,3 @@ static void __init lpc32xx_timer_init(void)
161 clocksource_mmio_init(LPC32XX_TIMER_TC(LPC32XX_TIMER1_BASE), 154 clocksource_mmio_init(LPC32XX_TIMER_TC(LPC32XX_TIMER1_BASE),
162 "lpc32xx_clksrc", clkrate, 300, 32, clocksource_mmio_readl_up); 155 "lpc32xx_clksrc", clkrate, 300, 32, clocksource_mmio_readl_up);
163} 156}
164
165struct sys_timer lpc32xx_timer = {
166 .init = &lpc32xx_timer_init,
167};
168
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index e5dba9c5dc54..9f64d5632e07 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -262,7 +262,7 @@ MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
262 .map_io = mmp_map_io, 262 .map_io = mmp_map_io,
263 .nr_irqs = MMP_NR_IRQS, 263 .nr_irqs = MMP_NR_IRQS,
264 .init_irq = pxa168_init_irq, 264 .init_irq = pxa168_init_irq,
265 .timer = &pxa168_timer, 265 .init_time = pxa168_timer_init,
266 .init_machine = common_init, 266 .init_machine = common_init,
267 .restart = pxa168_restart, 267 .restart = pxa168_restart,
268MACHINE_END 268MACHINE_END
@@ -271,7 +271,7 @@ MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
271 .map_io = mmp_map_io, 271 .map_io = mmp_map_io,
272 .nr_irqs = MMP_NR_IRQS, 272 .nr_irqs = MMP_NR_IRQS,
273 .init_irq = pxa168_init_irq, 273 .init_irq = pxa168_init_irq,
274 .timer = &pxa168_timer, 274 .init_time = pxa168_timer_init,
275 .init_machine = common_init, 275 .init_machine = common_init,
276 .restart = pxa168_restart, 276 .restart = pxa168_restart,
277MACHINE_END 277MACHINE_END
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 603542ae6fbd..1f94957b56ae 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -45,7 +45,7 @@ MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
45 .map_io = mmp_map_io, 45 .map_io = mmp_map_io,
46 .nr_irqs = MMP_NR_IRQS, 46 .nr_irqs = MMP_NR_IRQS,
47 .init_irq = pxa168_init_irq, 47 .init_irq = pxa168_init_irq,
48 .timer = &pxa168_timer, 48 .init_time = pxa168_timer_init,
49 .init_machine = avengers_lite_init, 49 .init_machine = avengers_lite_init,
50 .restart = pxa168_restart, 50 .restart = pxa168_restart,
51MACHINE_END 51MACHINE_END
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index 5cb769cd26d9..2358011c7d8e 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -218,7 +218,7 @@ MACHINE_START(BROWNSTONE, "Brownstone Development Platform")
218 .map_io = mmp_map_io, 218 .map_io = mmp_map_io,
219 .nr_irqs = BROWNSTONE_NR_IRQS, 219 .nr_irqs = BROWNSTONE_NR_IRQS,
220 .init_irq = mmp2_init_irq, 220 .init_irq = mmp2_init_irq,
221 .timer = &mmp2_timer, 221 .init_time = mmp2_timer_init,
222 .init_machine = brownstone_init, 222 .init_machine = brownstone_init,
223 .restart = mmp_restart, 223 .restart = mmp_restart,
224MACHINE_END 224MACHINE_END
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index bd453274fca2..0bdc50b134ce 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -1,7 +1,5 @@
1#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) 1#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
2 2
3struct sys_timer;
4
5extern void timer_init(int irq); 3extern void timer_init(int irq);
6 4
7extern void __init icu_init_irq(void); 5extern void __init icu_init_irq(void);
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index 8059cc0905c6..754c352dd02b 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -121,7 +121,7 @@ MACHINE_START(FLINT, "Flint Development Platform")
121 .map_io = mmp_map_io, 121 .map_io = mmp_map_io,
122 .nr_irqs = FLINT_NR_IRQS, 122 .nr_irqs = FLINT_NR_IRQS,
123 .init_irq = mmp2_init_irq, 123 .init_irq = mmp2_init_irq,
124 .timer = &mmp2_timer, 124 .init_time = mmp2_timer_init,
125 .init_machine = flint_init, 125 .init_machine = flint_init,
126 .restart = mmp_restart, 126 .restart = mmp_restart,
127MACHINE_END 127MACHINE_END
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 5c3d61ee729a..d1e2d595e79c 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -194,7 +194,7 @@ MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
194 .map_io = mmp_map_io, 194 .map_io = mmp_map_io,
195 .nr_irqs = MMP_NR_IRQS, 195 .nr_irqs = MMP_NR_IRQS,
196 .init_irq = pxa168_init_irq, 196 .init_irq = pxa168_init_irq,
197 .timer = &pxa168_timer, 197 .init_time = pxa168_timer_init,
198 .init_machine = gplugd_init, 198 .init_machine = gplugd_init,
199 .restart = pxa168_restart, 199 .restart = pxa168_restart,
200MACHINE_END 200MACHINE_END
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index c4ca4d17194a..0764f4ecec82 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -3,9 +3,7 @@
3 3
4#include <linux/platform_data/pxa_sdhci.h> 4#include <linux/platform_data/pxa_sdhci.h>
5 5
6struct sys_timer; 6extern void mmp2_timer_init(void);
7
8extern struct sys_timer mmp2_timer;
9extern void __init mmp2_init_icu(void); 7extern void __init mmp2_init_icu(void);
10extern void __init mmp2_init_irq(void); 8extern void __init mmp2_init_irq(void);
11extern void mmp2_clear_pmic_int(void); 9extern void mmp2_clear_pmic_int(void);
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 37632d964d50..7ed1df21ea1c 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -1,9 +1,7 @@
1#ifndef __ASM_MACH_PXA168_H 1#ifndef __ASM_MACH_PXA168_H
2#define __ASM_MACH_PXA168_H 2#define __ASM_MACH_PXA168_H
3 3
4struct sys_timer; 4extern void pxa168_timer_init(void);
5
6extern struct sys_timer pxa168_timer;
7extern void __init pxa168_init_irq(void); 5extern void __init pxa168_init_irq(void);
8extern void pxa168_restart(char, const char *); 6extern void pxa168_restart(char, const char *);
9extern void pxa168_clear_keypad_wakeup(void); 7extern void pxa168_clear_keypad_wakeup(void);
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index 3b58a3b2d7df..eff31ab6dc3b 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -1,9 +1,7 @@
1#ifndef __ASM_MACH_PXA910_H 1#ifndef __ASM_MACH_PXA910_H
2#define __ASM_MACH_PXA910_H 2#define __ASM_MACH_PXA910_H
3 3
4struct sys_timer; 4extern void pxa910_timer_init(void);
5
6extern struct sys_timer pxa910_timer;
7extern void __init pxa910_init_irq(void); 5extern void __init pxa910_init_irq(void);
8 6
9#include <linux/i2c.h> 7#include <linux/i2c.h>
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index ff73249884d0..66634fd0ecb0 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -174,7 +174,7 @@ MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
174 .map_io = mmp_map_io, 174 .map_io = mmp_map_io,
175 .nr_irqs = JASPER_NR_IRQS, 175 .nr_irqs = JASPER_NR_IRQS,
176 .init_irq = mmp2_init_irq, 176 .init_irq = mmp2_init_irq,
177 .timer = &mmp2_timer, 177 .init_time = mmp2_timer_init,
178 .init_machine = jasper_init, 178 .init_machine = jasper_init,
179 .restart = mmp_restart, 179 .restart = mmp_restart,
180MACHINE_END 180MACHINE_END
diff --git a/arch/arm/mach-mmp/mmp-dt.c b/arch/arm/mach-mmp/mmp-dt.c
index 033cc31b3c72..d063efa0a4f1 100644
--- a/arch/arm/mach-mmp/mmp-dt.c
+++ b/arch/arm/mach-mmp/mmp-dt.c
@@ -22,10 +22,6 @@
22extern void __init mmp_dt_irq_init(void); 22extern void __init mmp_dt_irq_init(void);
23extern void __init mmp_dt_init_timer(void); 23extern void __init mmp_dt_init_timer(void);
24 24
25static struct sys_timer mmp_dt_timer = {
26 .init = mmp_dt_init_timer,
27};
28
29static const struct of_dev_auxdata pxa168_auxdata_lookup[] __initconst = { 25static const struct of_dev_auxdata pxa168_auxdata_lookup[] __initconst = {
30 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL), 26 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL),
31 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL), 27 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL),
@@ -69,7 +65,7 @@ static const char *mmp_dt_board_compat[] __initdata = {
69DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)") 65DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)")
70 .map_io = mmp_map_io, 66 .map_io = mmp_map_io,
71 .init_irq = mmp_dt_irq_init, 67 .init_irq = mmp_dt_irq_init,
72 .timer = &mmp_dt_timer, 68 .init_time = mmp_dt_init_timer,
73 .init_machine = pxa168_dt_init, 69 .init_machine = pxa168_dt_init,
74 .dt_compat = mmp_dt_board_compat, 70 .dt_compat = mmp_dt_board_compat,
75MACHINE_END 71MACHINE_END
@@ -77,7 +73,7 @@ MACHINE_END
77DT_MACHINE_START(PXA910_DT, "Marvell PXA910 (Device Tree Support)") 73DT_MACHINE_START(PXA910_DT, "Marvell PXA910 (Device Tree Support)")
78 .map_io = mmp_map_io, 74 .map_io = mmp_map_io,
79 .init_irq = mmp_dt_irq_init, 75 .init_irq = mmp_dt_irq_init,
80 .timer = &mmp_dt_timer, 76 .init_time = mmp_dt_init_timer,
81 .init_machine = pxa910_dt_init, 77 .init_machine = pxa910_dt_init,
82 .dt_compat = mmp_dt_board_compat, 78 .dt_compat = mmp_dt_board_compat,
83MACHINE_END 79MACHINE_END
diff --git a/arch/arm/mach-mmp/mmp2-dt.c b/arch/arm/mach-mmp/mmp2-dt.c
index 535a5ed5977b..fad431aa6e09 100644
--- a/arch/arm/mach-mmp/mmp2-dt.c
+++ b/arch/arm/mach-mmp/mmp2-dt.c
@@ -24,10 +24,6 @@
24extern void __init mmp_dt_irq_init(void); 24extern void __init mmp_dt_irq_init(void);
25extern void __init mmp_dt_init_timer(void); 25extern void __init mmp_dt_init_timer(void);
26 26
27static struct sys_timer mmp_dt_timer = {
28 .init = mmp_dt_init_timer,
29};
30
31static const struct of_dev_auxdata mmp2_auxdata_lookup[] __initconst = { 27static const struct of_dev_auxdata mmp2_auxdata_lookup[] __initconst = {
32 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4030000, "pxa2xx-uart.0", NULL), 28 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4030000, "pxa2xx-uart.0", NULL),
33 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.1", NULL), 29 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.1", NULL),
@@ -54,7 +50,7 @@ static const char *mmp2_dt_board_compat[] __initdata = {
54DT_MACHINE_START(MMP2_DT, "Marvell MMP2 (Device Tree Support)") 50DT_MACHINE_START(MMP2_DT, "Marvell MMP2 (Device Tree Support)")
55 .map_io = mmp_map_io, 51 .map_io = mmp_map_io,
56 .init_irq = mmp_dt_irq_init, 52 .init_irq = mmp_dt_irq_init,
57 .timer = &mmp_dt_timer, 53 .init_time = mmp_dt_init_timer,
58 .init_machine = mmp2_dt_init, 54 .init_machine = mmp2_dt_init,
59 .dt_compat = mmp2_dt_board_compat, 55 .dt_compat = mmp2_dt_board_compat,
60MACHINE_END 56MACHINE_END
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 3a3768c7a191..d94d114eef7b 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -114,7 +114,7 @@ postcore_initcall(mmp2_init);
114 114
115#define APBC_TIMERS APBC_REG(0x024) 115#define APBC_TIMERS APBC_REG(0x024)
116 116
117static void __init mmp2_timer_init(void) 117void __init mmp2_timer_init(void)
118{ 118{
119 unsigned long clk_rst; 119 unsigned long clk_rst;
120 120
@@ -130,10 +130,6 @@ static void __init mmp2_timer_init(void)
130 timer_init(IRQ_MMP2_TIMER1); 130 timer_init(IRQ_MMP2_TIMER1);
131} 131}
132 132
133struct sys_timer mmp2_timer = {
134 .init = mmp2_timer_init,
135};
136
137/* on-chip devices */ 133/* on-chip devices */
138MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5); 134MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
139MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21); 135MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index b7f074f15498..9bc7b86a86a7 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -67,7 +67,7 @@ postcore_initcall(pxa168_init);
67#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) 67#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
68#define APBC_TIMERS APBC_REG(0x34) 68#define APBC_TIMERS APBC_REG(0x34)
69 69
70static void __init pxa168_timer_init(void) 70void __init pxa168_timer_init(void)
71{ 71{
72 /* this is early, we have to initialize the CCU registers by 72 /* this is early, we have to initialize the CCU registers by
73 * ourselves instead of using clk_* API. Clock rate is defined 73 * ourselves instead of using clk_* API. Clock rate is defined
@@ -81,10 +81,6 @@ static void __init pxa168_timer_init(void)
81 timer_init(IRQ_PXA168_TIMER1); 81 timer_init(IRQ_PXA168_TIMER1);
82} 82}
83 83
84struct sys_timer pxa168_timer = {
85 .init = pxa168_timer_init,
86};
87
88void pxa168_clear_keypad_wakeup(void) 84void pxa168_clear_keypad_wakeup(void)
89{ 85{
90 uint32_t val; 86 uint32_t val;
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 8b1e16fbb7a5..c6a89f1eca4e 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -101,7 +101,7 @@ postcore_initcall(pxa910_init);
101#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) 101#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
102#define APBC_TIMERS APBC_REG(0x34) 102#define APBC_TIMERS APBC_REG(0x34)
103 103
104static void __init pxa910_timer_init(void) 104void __init pxa910_timer_init(void)
105{ 105{
106 /* reset and configure */ 106 /* reset and configure */
107 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); 107 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
@@ -110,10 +110,6 @@ static void __init pxa910_timer_init(void)
110 timer_init(IRQ_PXA910_AP1_TIMER1); 110 timer_init(IRQ_PXA910_AP1_TIMER1);
111} 111}
112 112
113struct sys_timer pxa910_timer = {
114 .init = pxa910_timer_init,
115};
116
117/* on-chip devices */ 113/* on-chip devices */
118 114
119/* NOTE: there are totally 3 UARTs on PXA910: 115/* NOTE: there are totally 3 UARTs on PXA910:
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index b28f9084dfff..4c127d23955d 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -103,7 +103,7 @@ MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
103 .map_io = mmp_map_io, 103 .map_io = mmp_map_io,
104 .nr_irqs = MMP_NR_IRQS, 104 .nr_irqs = MMP_NR_IRQS,
105 .init_irq = pxa910_init_irq, 105 .init_irq = pxa910_init_irq,
106 .timer = &pxa910_timer, 106 .init_time = pxa910_timer_init,
107 .init_machine = tavorevb_init, 107 .init_machine = tavorevb_init,
108 .restart = mmp_restart, 108 .restart = mmp_restart,
109MACHINE_END 109MACHINE_END
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index dd30ea74785c..8609967975ed 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -86,7 +86,7 @@ MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
86 .map_io = mmp_map_io, 86 .map_io = mmp_map_io,
87 .nr_irqs = MMP_NR_IRQS, 87 .nr_irqs = MMP_NR_IRQS,
88 .init_irq = pxa168_init_irq, 88 .init_irq = pxa168_init_irq,
89 .timer = &pxa168_timer, 89 .init_time = pxa168_timer_init,
90 .init_machine = teton_bga_init, 90 .init_machine = teton_bga_init,
91 .restart = pxa168_restart, 91 .restart = pxa168_restart,
92MACHINE_END 92MACHINE_END
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 936447c70977..86a18b3d252e 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -141,7 +141,6 @@ static void timer_set_mode(enum clock_event_mode mode,
141static struct clock_event_device ckevt = { 141static struct clock_event_device ckevt = {
142 .name = "clockevent", 142 .name = "clockevent",
143 .features = CLOCK_EVT_FEAT_ONESHOT, 143 .features = CLOCK_EVT_FEAT_ONESHOT,
144 .shift = 32,
145 .rating = 200, 144 .rating = 200,
146 .set_next_event = timer_set_next_event, 145 .set_next_event = timer_set_next_event,
147 .set_mode = timer_set_mode, 146 .set_mode = timer_set_mode,
@@ -198,15 +197,13 @@ void __init timer_init(int irq)
198 197
199 setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE); 198 setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
200 199
201 ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift);
202 ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
203 ckevt.min_delta_ns = clockevent_delta2ns(MIN_DELTA, &ckevt);
204 ckevt.cpumask = cpumask_of(0); 200 ckevt.cpumask = cpumask_of(0);
205 201
206 setup_irq(irq, &timer_irq); 202 setup_irq(irq, &timer_irq);
207 203
208 clocksource_register_hz(&cksrc, CLOCK_TICK_RATE); 204 clocksource_register_hz(&cksrc, CLOCK_TICK_RATE);
209 clockevents_register_device(&ckevt); 205 clockevents_config_and_register(&ckevt, CLOCK_TICK_RATE,
206 MIN_DELTA, MAX_DELTA);
210} 207}
211 208
212#ifdef CONFIG_OF 209#ifdef CONFIG_OF
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index ce55fd8821c4..6e474900b13e 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -218,7 +218,7 @@ MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
218 .map_io = mmp_map_io, 218 .map_io = mmp_map_io,
219 .nr_irqs = TTCDKB_NR_IRQS, 219 .nr_irqs = TTCDKB_NR_IRQS,
220 .init_irq = pxa910_init_irq, 220 .init_irq = pxa910_init_irq,
221 .timer = &pxa910_timer, 221 .init_time = pxa910_timer_init,
222 .init_machine = ttc_dkb_init, 222 .init_machine = ttc_dkb_init,
223 .restart = mmp_restart, 223 .restart = mmp_restart,
224MACHINE_END 224MACHINE_END
diff --git a/arch/arm/mach-msm/board-dt-8660.c b/arch/arm/mach-msm/board-dt-8660.c
index b5b4de2cdf9e..7dcfc5300bbd 100644
--- a/arch/arm/mach-msm/board-dt-8660.c
+++ b/arch/arm/mach-msm/board-dt-8660.c
@@ -11,26 +11,15 @@
11 */ 11 */
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/irqchip.h>
14#include <linux/of.h> 15#include <linux/of.h>
15#include <linux/of_irq.h>
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
20 19
21#include <mach/board.h> 20#include <mach/board.h>
22#include "common.h" 21#include "common.h"
23 22
24static const struct of_device_id msm_dt_gic_match[] __initconst = {
25 { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init },
26 {}
27};
28
29static void __init msm8x60_init_irq(void)
30{
31 of_irq_init(msm_dt_gic_match);
32}
33
34static void __init msm8x60_init_late(void) 23static void __init msm8x60_init_late(void)
35{ 24{
36 smd_debugfs_init(); 25 smd_debugfs_init();
@@ -55,10 +44,9 @@ static const char *msm8x60_fluid_match[] __initdata = {
55DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)") 44DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
56 .smp = smp_ops(msm_smp_ops), 45 .smp = smp_ops(msm_smp_ops),
57 .map_io = msm_map_msm8x60_io, 46 .map_io = msm_map_msm8x60_io,
58 .init_irq = msm8x60_init_irq, 47 .init_irq = irqchip_init,
59 .handle_irq = gic_handle_irq,
60 .init_machine = msm8x60_dt_init, 48 .init_machine = msm8x60_dt_init,
61 .init_late = msm8x60_init_late, 49 .init_late = msm8x60_init_late,
62 .timer = &msm_dt_timer, 50 .init_time = msm_dt_timer_init,
63 .dt_compat = msm8x60_fluid_match, 51 .dt_compat = msm8x60_fluid_match,
64MACHINE_END 52MACHINE_END
diff --git a/arch/arm/mach-msm/board-dt-8960.c b/arch/arm/mach-msm/board-dt-8960.c
index 4490edb71c17..73019363ffa4 100644
--- a/arch/arm/mach-msm/board-dt-8960.c
+++ b/arch/arm/mach-msm/board-dt-8960.c
@@ -11,24 +11,13 @@
11 */ 11 */
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/of_irq.h> 14#include <linux/irqchip.h>
15#include <linux/of_platform.h> 15#include <linux/of_platform.h>
16 16
17#include <asm/hardware/gic.h>
18#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
19 18
20#include "common.h" 19#include "common.h"
21 20
22static const struct of_device_id msm_dt_gic_match[] __initconst = {
23 { .compatible = "qcom,msm-qgic2", .data = gic_of_init },
24 { }
25};
26
27static void __init msm_dt_init_irq(void)
28{
29 of_irq_init(msm_dt_gic_match);
30}
31
32static void __init msm_dt_init(void) 21static void __init msm_dt_init(void)
33{ 22{
34 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 23 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -42,9 +31,8 @@ static const char * const msm8960_dt_match[] __initconst = {
42DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)") 31DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)")
43 .smp = smp_ops(msm_smp_ops), 32 .smp = smp_ops(msm_smp_ops),
44 .map_io = msm_map_msm8960_io, 33 .map_io = msm_map_msm8960_io,
45 .init_irq = msm_dt_init_irq, 34 .init_irq = irqchip_init,
46 .timer = &msm_dt_timer, 35 .init_time = msm_dt_timer_init,
47 .init_machine = msm_dt_init, 36 .init_machine = msm_dt_init,
48 .dt_compat = msm8960_dt_match, 37 .dt_compat = msm8960_dt_match,
49 .handle_irq = gic_handle_irq,
50MACHINE_END 38MACHINE_END
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 6ce542e2e21c..84d720af34ab 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -106,5 +106,5 @@ MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
106 .init_irq = halibut_init_irq, 106 .init_irq = halibut_init_irq,
107 .init_machine = halibut_init, 107 .init_machine = halibut_init,
108 .init_late = halibut_init_late, 108 .init_late = halibut_init_late,
109 .timer = &msm7x01_timer, 109 .init_time = msm7x01_timer_init,
110MACHINE_END 110MACHINE_END
diff --git a/arch/arm/mach-msm/board-mahimahi.c b/arch/arm/mach-msm/board-mahimahi.c
index df00bc03ce74..30c3496db593 100644
--- a/arch/arm/mach-msm/board-mahimahi.c
+++ b/arch/arm/mach-msm/board-mahimahi.c
@@ -75,7 +75,7 @@ static void __init mahimahi_init_late(void)
75 smd_debugfs_init(); 75 smd_debugfs_init();
76} 76}
77 77
78extern struct sys_timer msm_timer; 78void msm_timer_init(void);
79 79
80MACHINE_START(MAHIMAHI, "mahimahi") 80MACHINE_START(MAHIMAHI, "mahimahi")
81 .atag_offset = 0x100, 81 .atag_offset = 0x100,
@@ -84,5 +84,5 @@ MACHINE_START(MAHIMAHI, "mahimahi")
84 .init_irq = msm_init_irq, 84 .init_irq = msm_init_irq,
85 .init_machine = mahimahi_init, 85 .init_machine = mahimahi_init,
86 .init_late = mahimahi_init_late, 86 .init_late = mahimahi_init_late,
87 .timer = &msm_timer, 87 .init_time = msm_timer_init,
88MACHINE_END 88MACHINE_END
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index effa6f4336c7..7bc3f82e3ec9 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -131,7 +131,7 @@ MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")
131 .init_irq = msm7x30_init_irq, 131 .init_irq = msm7x30_init_irq,
132 .init_machine = msm7x30_init, 132 .init_machine = msm7x30_init,
133 .init_late = msm7x30_init_late, 133 .init_late = msm7x30_init_late,
134 .timer = &msm7x30_timer, 134 .init_time = msm7x30_timer_init,
135MACHINE_END 135MACHINE_END
136 136
137MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA") 137MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
@@ -142,7 +142,7 @@ MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
142 .init_irq = msm7x30_init_irq, 142 .init_irq = msm7x30_init_irq,
143 .init_machine = msm7x30_init, 143 .init_machine = msm7x30_init,
144 .init_late = msm7x30_init_late, 144 .init_late = msm7x30_init_late,
145 .timer = &msm7x30_timer, 145 .init_time = msm7x30_timer_init,
146MACHINE_END 146MACHINE_END
147 147
148MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID") 148MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
@@ -153,5 +153,5 @@ MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
153 .init_irq = msm7x30_init_irq, 153 .init_irq = msm7x30_init_irq,
154 .init_machine = msm7x30_init, 154 .init_machine = msm7x30_init,
155 .init_late = msm7x30_init_late, 155 .init_late = msm7x30_init_late,
156 .timer = &msm7x30_timer, 156 .init_time = msm7x30_timer_init,
157MACHINE_END 157MACHINE_END
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index 2448fcf09eb1..686e7949a73a 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -200,7 +200,7 @@ MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
200 .init_irq = qsd8x50_init_irq, 200 .init_irq = qsd8x50_init_irq,
201 .init_machine = qsd8x50_init, 201 .init_machine = qsd8x50_init,
202 .init_late = qsd8x50_init_late, 202 .init_late = qsd8x50_init_late,
203 .timer = &qsd8x50_timer, 203 .init_time = qsd8x50_timer_init,
204MACHINE_END 204MACHINE_END
205 205
206MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5") 206MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
@@ -209,5 +209,5 @@ MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
209 .init_irq = qsd8x50_init_irq, 209 .init_irq = qsd8x50_init_irq,
210 .init_machine = qsd8x50_init, 210 .init_machine = qsd8x50_init,
211 .init_late = qsd8x50_init_late, 211 .init_late = qsd8x50_init_late,
212 .timer = &qsd8x50_timer, 212 .init_time = qsd8x50_timer_init,
213MACHINE_END 213MACHINE_END
diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c
index b7b0fc7e3278..70730111b37c 100644
--- a/arch/arm/mach-msm/board-sapphire.c
+++ b/arch/arm/mach-msm/board-sapphire.c
@@ -53,7 +53,7 @@ static struct platform_device *devices[] __initdata = {
53 &msm_device_uart3, 53 &msm_device_uart3,
54}; 54};
55 55
56extern struct sys_timer msm_timer; 56void msm_timer_init(void);
57 57
58static void __init sapphire_init_irq(void) 58static void __init sapphire_init_irq(void)
59{ 59{
@@ -113,5 +113,5 @@ MACHINE_START(SAPPHIRE, "sapphire")
113 .init_irq = sapphire_init_irq, 113 .init_irq = sapphire_init_irq,
114 .init_machine = sapphire_init, 114 .init_machine = sapphire_init,
115 .init_late = sapphire_init_late, 115 .init_late = sapphire_init_late,
116 .timer = &msm_timer, 116 .init_time = msm_timer_init,
117MACHINE_END 117MACHINE_END
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 4ba0800e243e..919bfa32871a 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -110,5 +110,5 @@ MACHINE_START(TROUT, "HTC Dream")
110 .init_irq = trout_init_irq, 110 .init_irq = trout_init_irq,
111 .init_machine = trout_init, 111 .init_machine = trout_init,
112 .init_late = trout_init_late, 112 .init_late = trout_init_late,
113 .timer = &msm7x01_timer, 113 .init_time = msm7x01_timer_init,
114MACHINE_END 114MACHINE_END
diff --git a/arch/arm/mach-msm/common.h b/arch/arm/mach-msm/common.h
index 633a7159d5ff..ce8215a269e5 100644
--- a/arch/arm/mach-msm/common.h
+++ b/arch/arm/mach-msm/common.h
@@ -12,10 +12,10 @@
12#ifndef __MACH_COMMON_H 12#ifndef __MACH_COMMON_H
13#define __MACH_COMMON_H 13#define __MACH_COMMON_H
14 14
15extern struct sys_timer msm7x01_timer; 15extern void msm7x01_timer_init(void);
16extern struct sys_timer msm7x30_timer; 16extern void msm7x30_timer_init(void);
17extern struct sys_timer msm_dt_timer; 17extern void msm_dt_timer_init(void);
18extern struct sys_timer qsd8x50_timer; 18extern void qsd8x50_timer_init(void);
19 19
20extern void msm_map_common_io(void); 20extern void msm_map_common_io(void);
21extern void msm_map_msm7x30_io(void); 21extern void msm_map_msm7x30_io(void);
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 7ed69b69c87c..42932865416a 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -15,8 +15,8 @@
15#include <linux/jiffies.h> 15#include <linux/jiffies.h>
16#include <linux/smp.h> 16#include <linux/smp.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/irqchip/arm-gic.h>
18 19
19#include <asm/hardware/gic.h>
20#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
21#include <asm/cputype.h> 21#include <asm/cputype.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
@@ -115,7 +115,7 @@ static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *id
115 * the boot monitor to read the system wide flags register, 115 * the boot monitor to read the system wide flags register,
116 * and branch to the address found there. 116 * and branch to the address found there.
117 */ 117 */
118 gic_raise_softirq(cpumask_of(cpu), 0); 118 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
119 119
120 timeout = jiffies + (1 * HZ); 120 timeout = jiffies + (1 * HZ);
121 while (time_before(jiffies, timeout)) { 121 while (time_before(jiffies, timeout)) {
@@ -153,8 +153,6 @@ static void __init msm_smp_init_cpus(void)
153 153
154 for (i = 0; i < ncores; i++) 154 for (i = 0; i < ncores; i++)
155 set_cpu_possible(i, true); 155 set_cpu_possible(i, true);
156
157 set_smp_cross_call(gic_raise_softirq);
158} 156}
159 157
160static void __init msm_smp_prepare_cpus(unsigned int max_cpus) 158static void __init msm_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 476549a8a709..2969027f02fa 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -25,7 +25,6 @@
25#include <linux/of_irq.h> 25#include <linux/of_irq.h>
26 26
27#include <asm/mach/time.h> 27#include <asm/mach/time.h>
28#include <asm/hardware/gic.h>
29#include <asm/localtimer.h> 28#include <asm/localtimer.h>
30#include <asm/sched_clock.h> 29#include <asm/sched_clock.h>
31 30
@@ -144,13 +143,9 @@ static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
144 evt->rating = msm_clockevent.rating; 143 evt->rating = msm_clockevent.rating;
145 evt->set_mode = msm_timer_set_mode; 144 evt->set_mode = msm_timer_set_mode;
146 evt->set_next_event = msm_timer_set_next_event; 145 evt->set_next_event = msm_timer_set_next_event;
147 evt->shift = msm_clockevent.shift;
148 evt->mult = div_sc(GPT_HZ, NSEC_PER_SEC, evt->shift);
149 evt->max_delta_ns = clockevent_delta2ns(0xf0000000, evt);
150 evt->min_delta_ns = clockevent_delta2ns(4, evt);
151 146
152 *__this_cpu_ptr(msm_evt.percpu_evt) = evt; 147 *__this_cpu_ptr(msm_evt.percpu_evt) = evt;
153 clockevents_register_device(evt); 148 clockevents_config_and_register(evt, GPT_HZ, 4, 0xf0000000);
154 enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING); 149 enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING);
155 return 0; 150 return 0;
156} 151}
@@ -229,7 +224,7 @@ static const struct of_device_id msm_gpt_match[] __initconst = {
229 { }, 224 { },
230}; 225};
231 226
232static void __init msm_dt_timer_init(void) 227void __init msm_dt_timer_init(void)
233{ 228{
234 struct device_node *np; 229 struct device_node *np;
235 u32 freq; 230 u32 freq;
@@ -296,10 +291,6 @@ static void __init msm_dt_timer_init(void)
296 291
297 msm_timer_init(freq, 32, irq, !!percpu_offset); 292 msm_timer_init(freq, 32, irq, !!percpu_offset);
298} 293}
299
300struct sys_timer msm_dt_timer = {
301 .init = msm_dt_timer_init
302};
303#endif 294#endif
304 295
305static int __init msm_timer_map(phys_addr_t event, phys_addr_t source) 296static int __init msm_timer_map(phys_addr_t event, phys_addr_t source)
@@ -317,7 +308,7 @@ static int __init msm_timer_map(phys_addr_t event, phys_addr_t source)
317 return 0; 308 return 0;
318} 309}
319 310
320static void __init msm7x01_timer_init(void) 311void __init msm7x01_timer_init(void)
321{ 312{
322 struct clocksource *cs = &msm_clocksource; 313 struct clocksource *cs = &msm_clocksource;
323 314
@@ -330,28 +321,16 @@ static void __init msm7x01_timer_init(void)
330 false); 321 false);
331} 322}
332 323
333struct sys_timer msm7x01_timer = { 324void __init msm7x30_timer_init(void)
334 .init = msm7x01_timer_init
335};
336
337static void __init msm7x30_timer_init(void)
338{ 325{
339 if (msm_timer_map(0xc0100004, 0xc0100024)) 326 if (msm_timer_map(0xc0100004, 0xc0100024))
340 return; 327 return;
341 msm_timer_init(24576000 / 4, 32, 1, false); 328 msm_timer_init(24576000 / 4, 32, 1, false);
342} 329}
343 330
344struct sys_timer msm7x30_timer = { 331void __init qsd8x50_timer_init(void)
345 .init = msm7x30_timer_init
346};
347
348static void __init qsd8x50_timer_init(void)
349{ 332{
350 if (msm_timer_map(0xAC100000, 0xAC100010)) 333 if (msm_timer_map(0xAC100000, 0xAC100010))
351 return; 334 return;
352 msm_timer_init(19200000 / 4, 32, 7, false); 335 msm_timer_init(19200000 / 4, 32, 7, false);
353} 336}
354
355struct sys_timer qsd8x50_timer = {
356 .init = qsd8x50_timer_init
357};
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
index ee74ec97c141..1f2ef98b37c6 100644
--- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -150,6 +150,6 @@ MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
150 .map_io = mv78xx0_map_io, 150 .map_io = mv78xx0_map_io,
151 .init_early = mv78xx0_init_early, 151 .init_early = mv78xx0_init_early,
152 .init_irq = mv78xx0_init_irq, 152 .init_irq = mv78xx0_init_irq,
153 .timer = &mv78xx0_timer, 153 .init_time = mv78xx0_timer_init,
154 .restart = mv78xx0_restart, 154 .restart = mv78xx0_restart,
155MACHINE_END 155MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index d0cb4857b4b3..0efa14498ebc 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -336,16 +336,12 @@ void __init mv78xx0_init_early(void)
336 orion_time_set_base(TIMER_VIRT_BASE); 336 orion_time_set_base(TIMER_VIRT_BASE);
337} 337}
338 338
339static void __init_refok mv78xx0_timer_init(void) 339void __init_refok mv78xx0_timer_init(void)
340{ 340{
341 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, 341 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
342 IRQ_MV78XX0_TIMER_1, get_tclk()); 342 IRQ_MV78XX0_TIMER_1, get_tclk());
343} 343}
344 344
345struct sys_timer mv78xx0_timer = {
346 .init = mv78xx0_timer_init,
347};
348
349 345
350/***************************************************************************** 346/*****************************************************************************
351 * General 347 * General
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 507c767d49e0..5e9485bad0ac 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -47,7 +47,7 @@ void mv78xx0_uart3_init(void);
47void mv78xx0_i2c_init(void); 47void mv78xx0_i2c_init(void);
48void mv78xx0_restart(char, const char *); 48void mv78xx0_restart(char, const char *);
49 49
50extern struct sys_timer mv78xx0_timer; 50extern void mv78xx0_timer_init(void);
51 51
52 52
53#endif 53#endif
diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
index 4d6d48bf51ef..4e0f22b30bc8 100644
--- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
+++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
@@ -98,6 +98,6 @@ MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
98 .map_io = mv78xx0_map_io, 98 .map_io = mv78xx0_map_io,
99 .init_early = mv78xx0_init_early, 99 .init_early = mv78xx0_init_early,
100 .init_irq = mv78xx0_init_irq, 100 .init_irq = mv78xx0_init_irq,
101 .timer = &mv78xx0_timer, 101 .init_time = mv78xx0_timer_init,
102 .restart = mv78xx0_restart, 102 .restart = mv78xx0_restart,
103MACHINE_END 103MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
index 9a882706e138..d2d06f3957f3 100644
--- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
+++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
@@ -83,6 +83,6 @@ MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
83 .map_io = mv78xx0_map_io, 83 .map_io = mv78xx0_map_io,
84 .init_early = mv78xx0_init_early, 84 .init_early = mv78xx0_init_early,
85 .init_irq = mv78xx0_init_irq, 85 .init_irq = mv78xx0_init_irq,
86 .timer = &mv78xx0_timer, 86 .init_time = mv78xx0_timer_init,
87 .restart = mv78xx0_restart, 87 .restart = mv78xx0_restart,
88MACHINE_END 88MACHINE_END
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index 7434b5e36197..a5ea616d6d12 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -56,10 +56,6 @@ void __init armada_370_xp_init_early(void)
56 init_dma_coherent_pool_size(SZ_1M); 56 init_dma_coherent_pool_size(SZ_1M);
57} 57}
58 58
59struct sys_timer armada_370_xp_timer = {
60 .init = armada_370_xp_timer_and_clk_init,
61};
62
63static void __init armada_370_xp_dt_init(void) 59static void __init armada_370_xp_dt_init(void)
64{ 60{
65 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 61 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -78,7 +74,7 @@ DT_MACHINE_START(ARMADA_XP_DT, "Marvell Armada 370/XP (Device Tree)")
78 .init_early = armada_370_xp_init_early, 74 .init_early = armada_370_xp_init_early,
79 .init_irq = armada_370_xp_init_irq, 75 .init_irq = armada_370_xp_init_irq,
80 .handle_irq = armada_370_xp_handle_irq, 76 .handle_irq = armada_370_xp_handle_irq,
81 .timer = &armada_370_xp_timer, 77 .init_time = armada_370_xp_timer_and_clk_init,
82 .restart = mvebu_restart, 78 .restart = mvebu_restart,
83 .dt_compat = armada_370_xp_dt_compat, 79 .dt_compat = armada_370_xp_dt_compat,
84MACHINE_END 80MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index c66129b5dd18..5fad7cefe8aa 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -163,19 +163,11 @@ static void __init imx23_timer_init(void)
163 mx23_clocks_init(); 163 mx23_clocks_init();
164} 164}
165 165
166static struct sys_timer imx23_timer = {
167 .init = imx23_timer_init,
168};
169
170static void __init imx28_timer_init(void) 166static void __init imx28_timer_init(void)
171{ 167{
172 mx28_clocks_init(); 168 mx28_clocks_init();
173} 169}
174 170
175static struct sys_timer imx28_timer = {
176 .init = imx28_timer_init,
177};
178
179enum mac_oui { 171enum mac_oui {
180 OUI_FSL, 172 OUI_FSL,
181 OUI_DENX, 173 OUI_DENX,
@@ -446,7 +438,7 @@ DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
446 .map_io = mx23_map_io, 438 .map_io = mx23_map_io,
447 .init_irq = icoll_init_irq, 439 .init_irq = icoll_init_irq,
448 .handle_irq = icoll_handle_irq, 440 .handle_irq = icoll_handle_irq,
449 .timer = &imx23_timer, 441 .init_time = imx23_timer_init,
450 .init_machine = mxs_machine_init, 442 .init_machine = mxs_machine_init,
451 .dt_compat = imx23_dt_compat, 443 .dt_compat = imx23_dt_compat,
452 .restart = mxs_restart, 444 .restart = mxs_restart,
@@ -456,7 +448,7 @@ DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
456 .map_io = mx28_map_io, 448 .map_io = mx28_map_io,
457 .init_irq = icoll_init_irq, 449 .init_irq = icoll_init_irq,
458 .handle_irq = icoll_handle_irq, 450 .handle_irq = icoll_handle_irq,
459 .timer = &imx28_timer, 451 .init_time = imx28_timer_init,
460 .init_machine = mxs_machine_init, 452 .init_machine = mxs_machine_init,
461 .dt_compat = imx28_dt_compat, 453 .dt_compat = imx28_dt_compat,
462 .restart = mxs_restart, 454 .restart = mxs_restart,
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c
index 856f4c796061..27451b1ba3f1 100644
--- a/arch/arm/mach-mxs/timer.c
+++ b/arch/arm/mach-mxs/timer.c
@@ -195,7 +195,6 @@ static void mxs_set_mode(enum clock_event_mode mode,
195static struct clock_event_device mxs_clockevent_device = { 195static struct clock_event_device mxs_clockevent_device = {
196 .name = "mxs_timrot", 196 .name = "mxs_timrot",
197 .features = CLOCK_EVT_FEAT_ONESHOT, 197 .features = CLOCK_EVT_FEAT_ONESHOT,
198 .shift = 32,
199 .set_mode = mxs_set_mode, 198 .set_mode = mxs_set_mode,
200 .set_next_event = timrotv2_set_next_event, 199 .set_next_event = timrotv2_set_next_event,
201 .rating = 200, 200 .rating = 200,
@@ -203,25 +202,12 @@ static struct clock_event_device mxs_clockevent_device = {
203 202
204static int __init mxs_clockevent_init(struct clk *timer_clk) 203static int __init mxs_clockevent_init(struct clk *timer_clk)
205{ 204{
206 unsigned int c = clk_get_rate(timer_clk); 205 if (timrot_is_v1())
207
208 mxs_clockevent_device.mult =
209 div_sc(c, NSEC_PER_SEC, mxs_clockevent_device.shift);
210 mxs_clockevent_device.cpumask = cpumask_of(0);
211 if (timrot_is_v1()) {
212 mxs_clockevent_device.set_next_event = timrotv1_set_next_event; 206 mxs_clockevent_device.set_next_event = timrotv1_set_next_event;
213 mxs_clockevent_device.max_delta_ns = 207 mxs_clockevent_device.cpumask = cpumask_of(0);
214 clockevent_delta2ns(0xfffe, &mxs_clockevent_device); 208 clockevents_config_and_register(&mxs_clockevent_device,
215 mxs_clockevent_device.min_delta_ns = 209 clk_get_rate(timer_clk), 0xf,
216 clockevent_delta2ns(0xf, &mxs_clockevent_device); 210 timrot_is_v1() ? 0xfffe : 0xfffffffe);
217 } else {
218 mxs_clockevent_device.max_delta_ns =
219 clockevent_delta2ns(0xfffffffe, &mxs_clockevent_device);
220 mxs_clockevent_device.min_delta_ns =
221 clockevent_delta2ns(0xf, &mxs_clockevent_device);
222 }
223
224 clockevents_register_device(&mxs_clockevent_device);
225 211
226 return 0; 212 return 0;
227} 213}
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index aa627465d914..27c2cb7ab813 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -23,9 +23,9 @@
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/irqchip/arm-vic.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/mach/map.h> 28#include <asm/mach/map.h>
28#include <asm/hardware/vic.h>
29#include <mach/netx-regs.h> 29#include <mach/netx-regs.h>
30#include <asm/mach/irq.h> 30#include <asm/mach/irq.h>
31 31
diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h
index 9b915119b8d6..768b26bbb42b 100644
--- a/arch/arm/mach-netx/generic.h
+++ b/arch/arm/mach-netx/generic.h
@@ -21,5 +21,4 @@ extern void __init netx_map_io(void);
21extern void __init netx_init_irq(void); 21extern void __init netx_init_irq(void);
22extern void netx_restart(char, const char *); 22extern void netx_restart(char, const char *);
23 23
24struct sys_timer; 24extern void netx_timer_init(void);
25extern struct sys_timer netx_timer;
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
index 8b781ff7c9e9..9b558eb3070f 100644
--- a/arch/arm/mach-netx/nxdb500.c
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -28,7 +28,6 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
32#include <mach/netx-regs.h> 31#include <mach/netx-regs.h>
33#include <linux/platform_data/eth-netx.h> 32#include <linux/platform_data/eth-netx.h>
34 33
@@ -204,8 +203,7 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
204 .atag_offset = 0x100, 203 .atag_offset = 0x100,
205 .map_io = netx_map_io, 204 .map_io = netx_map_io,
206 .init_irq = netx_init_irq, 205 .init_irq = netx_init_irq,
207 .handle_irq = vic_handle_irq, 206 .init_time = netx_timer_init,
208 .timer = &netx_timer,
209 .init_machine = nxdb500_init, 207 .init_machine = nxdb500_init,
210 .restart = netx_restart, 208 .restart = netx_restart,
211MACHINE_END 209MACHINE_END
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
index b26dbce334f2..a5e86cd365e7 100644
--- a/arch/arm/mach-netx/nxdkn.c
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -28,7 +28,6 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
32#include <mach/netx-regs.h> 31#include <mach/netx-regs.h>
33#include <linux/platform_data/eth-netx.h> 32#include <linux/platform_data/eth-netx.h>
34 33
@@ -97,8 +96,7 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
97 .atag_offset = 0x100, 96 .atag_offset = 0x100,
98 .map_io = netx_map_io, 97 .map_io = netx_map_io,
99 .init_irq = netx_init_irq, 98 .init_irq = netx_init_irq,
100 .handle_irq = vic_handle_irq, 99 .init_time = netx_timer_init,
101 .timer = &netx_timer,
102 .init_machine = nxdkn_init, 100 .init_machine = nxdkn_init,
103 .restart = netx_restart, 101 .restart = netx_restart,
104MACHINE_END 102MACHINE_END
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
index 257382efafa0..ad17885d0159 100644
--- a/arch/arm/mach-netx/nxeb500hmi.c
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -28,7 +28,6 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
32#include <mach/netx-regs.h> 31#include <mach/netx-regs.h>
33#include <linux/platform_data/eth-netx.h> 32#include <linux/platform_data/eth-netx.h>
34 33
@@ -181,8 +180,7 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
181 .atag_offset = 0x100, 180 .atag_offset = 0x100,
182 .map_io = netx_map_io, 181 .map_io = netx_map_io,
183 .init_irq = netx_init_irq, 182 .init_irq = netx_init_irq,
184 .handle_irq = vic_handle_irq, 183 .init_time = netx_timer_init,
185 .timer = &netx_timer,
186 .init_machine = nxeb500hmi_init, 184 .init_machine = nxeb500hmi_init,
187 .restart = netx_restart, 185 .restart = netx_restart,
188MACHINE_END 186MACHINE_END
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c
index e24c141ba489..6df42e643031 100644
--- a/arch/arm/mach-netx/time.c
+++ b/arch/arm/mach-netx/time.c
@@ -76,7 +76,6 @@ static int netx_set_next_event(unsigned long evt,
76 76
77static struct clock_event_device netx_clockevent = { 77static struct clock_event_device netx_clockevent = {
78 .name = "netx-timer" __stringify(TIMER_CLOCKEVENT), 78 .name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
79 .shift = 32,
80 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 79 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
81 .set_next_event = netx_set_next_event, 80 .set_next_event = netx_set_next_event,
82 .set_mode = netx_set_mode, 81 .set_mode = netx_set_mode,
@@ -107,7 +106,7 @@ static struct irqaction netx_timer_irq = {
107/* 106/*
108 * Set up timer interrupt 107 * Set up timer interrupt
109 */ 108 */
110static void __init netx_timer_init(void) 109void __init netx_timer_init(void)
111{ 110{
112 /* disable timer initially */ 111 /* disable timer initially */
113 writel(0, NETX_GPIO_COUNTER_CTRL(0)); 112 writel(0, NETX_GPIO_COUNTER_CTRL(0));
@@ -140,18 +139,9 @@ static void __init netx_timer_init(void)
140 clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE), 139 clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE),
141 "netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up); 140 "netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up);
142 141
143 netx_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
144 netx_clockevent.shift);
145 netx_clockevent.max_delta_ns =
146 clockevent_delta2ns(0xfffffffe, &netx_clockevent);
147 /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine. 142 /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine.
148 * Adding some safety ... */ 143 * Adding some safety ... */
149 netx_clockevent.min_delta_ns =
150 clockevent_delta2ns(0xa00, &netx_clockevent);
151 netx_clockevent.cpumask = cpumask_of(0); 144 netx_clockevent.cpumask = cpumask_of(0);
152 clockevents_register_device(&netx_clockevent); 145 clockevents_config_and_register(&netx_clockevent, CLOCK_TICK_RATE,
146 0xa00, 0xfffffffe);
153} 147}
154
155struct sys_timer netx_timer = {
156 .init = netx_timer_init,
157};
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 9f19069248da..aaed48d94374 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -27,7 +27,6 @@
27#include <linux/pinctrl/machine.h> 27#include <linux/pinctrl/machine.h>
28#include <linux/platform_data/pinctrl-nomadik.h> 28#include <linux/platform_data/pinctrl-nomadik.h>
29#include <linux/platform_data/clocksource-nomadik-mtu.h> 29#include <linux/platform_data/clocksource-nomadik-mtu.h>
30#include <asm/hardware/vic.h>
31#include <asm/sizes.h> 30#include <asm/sizes.h>
32#include <asm/mach-types.h> 31#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
@@ -267,10 +266,6 @@ static void __init nomadik_timer_init(void)
267 nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE), IRQ_MTU0); 266 nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE), IRQ_MTU0);
268} 267}
269 268
270static struct sys_timer nomadik_timer = {
271 .init = nomadik_timer_init,
272};
273
274static struct i2c_board_info __initdata nhk8815_i2c0_devices[] = { 269static struct i2c_board_info __initdata nhk8815_i2c0_devices[] = {
275 { 270 {
276 I2C_BOARD_INFO("stw4811", 0x2d), 271 I2C_BOARD_INFO("stw4811", 0x2d),
@@ -352,8 +347,7 @@ MACHINE_START(NOMADIK, "NHK8815")
352 .atag_offset = 0x100, 347 .atag_offset = 0x100,
353 .map_io = cpu8815_map_io, 348 .map_io = cpu8815_map_io,
354 .init_irq = cpu8815_init_irq, 349 .init_irq = cpu8815_init_irq,
355 .handle_irq = vic_handle_irq, 350 .init_time = nomadik_timer_init,
356 .timer = &nomadik_timer,
357 .init_machine = nhk8815_platform_init, 351 .init_machine = nhk8815_platform_init,
358 .restart = cpu8815_restart, 352 .restart = cpu8815_restart,
359MACHINE_END 353MACHINE_END
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 1273931303fb..351404673f6c 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -25,13 +25,13 @@
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/dma-mapping.h> 27#include <linux/dma-mapping.h>
28#include <linux/irqchip/arm-vic.h>
28#include <linux/platform_data/clk-nomadik.h> 29#include <linux/platform_data/clk-nomadik.h>
29#include <linux/platform_data/pinctrl-nomadik.h> 30#include <linux/platform_data/pinctrl-nomadik.h>
30 31
31#include <mach/hardware.h> 32#include <mach/hardware.h>
32#include <mach/irqs.h> 33#include <mach/irqs.h>
33#include <asm/mach/map.h> 34#include <asm/mach/map.h>
34#include <asm/hardware/vic.h>
35 35
36#include <asm/cacheflush.h> 36#include <asm/cacheflush.h>
37#include <asm/hardware/cache-l2x0.h> 37#include <asm/hardware/cache-l2x0.h>
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 2e98a3ac7c5e..2aab761ee68d 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -628,6 +628,6 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
628 .init_irq = omap1_init_irq, 628 .init_irq = omap1_init_irq,
629 .init_machine = ams_delta_init, 629 .init_machine = ams_delta_init,
630 .init_late = ams_delta_init_late, 630 .init_late = ams_delta_init_late,
631 .timer = &omap1_timer, 631 .init_time = omap1_timer_init,
632 .restart = omap1_restart, 632 .restart = omap1_restart,
633MACHINE_END 633MACHINE_END
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 560a7dcf0a56..702d58039cc1 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -364,6 +364,6 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
364 .init_irq = omap1_init_irq, 364 .init_irq = omap1_init_irq,
365 .init_machine = omap_fsample_init, 365 .init_machine = omap_fsample_init,
366 .init_late = omap1_init_late, 366 .init_late = omap1_init_late,
367 .timer = &omap1_timer, 367 .init_time = omap1_timer_init,
368 .restart = omap1_restart, 368 .restart = omap1_restart,
369MACHINE_END 369MACHINE_END
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 608e7d2a2778..e1d9171774bc 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -84,6 +84,6 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
84 .init_irq = omap1_init_irq, 84 .init_irq = omap1_init_irq,
85 .init_machine = omap_generic_init, 85 .init_machine = omap_generic_init,
86 .init_late = omap1_init_late, 86 .init_late = omap1_init_late,
87 .timer = &omap1_timer, 87 .init_time = omap1_timer_init,
88 .restart = omap1_restart, 88 .restart = omap1_restart,
89MACHINE_END 89MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 2274bd677efc..0dac3d239e32 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -461,6 +461,6 @@ MACHINE_START(OMAP_H2, "TI-H2")
461 .init_irq = omap1_init_irq, 461 .init_irq = omap1_init_irq,
462 .init_machine = h2_init, 462 .init_machine = h2_init,
463 .init_late = omap1_init_late, 463 .init_late = omap1_init_late,
464 .timer = &omap1_timer, 464 .init_time = omap1_timer_init,
465 .restart = omap1_restart, 465 .restart = omap1_restart,
466MACHINE_END 466MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 1051935f0aac..816ecd13f81e 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -454,6 +454,6 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
454 .init_irq = omap1_init_irq, 454 .init_irq = omap1_init_irq,
455 .init_machine = h3_init, 455 .init_machine = h3_init,
456 .init_late = omap1_init_late, 456 .init_late = omap1_init_late,
457 .timer = &omap1_timer, 457 .init_time = omap1_timer_init,
458 .restart = omap1_restart, 458 .restart = omap1_restart,
459MACHINE_END 459MACHINE_END
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 356f816c84a6..35a2379b986f 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -603,6 +603,6 @@ MACHINE_START(HERALD, "HTC Herald")
603 .init_irq = omap1_init_irq, 603 .init_irq = omap1_init_irq,
604 .init_machine = htcherald_init, 604 .init_machine = htcherald_init,
605 .init_late = omap1_init_late, 605 .init_late = omap1_init_late,
606 .timer = &omap1_timer, 606 .init_time = omap1_timer_init,
607 .restart = omap1_restart, 607 .restart = omap1_restart,
608MACHINE_END 608MACHINE_END
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index f8033fab0f82..bd5f02e9c354 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -458,6 +458,6 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
458 .init_irq = omap1_init_irq, 458 .init_irq = omap1_init_irq,
459 .init_machine = innovator_init, 459 .init_machine = innovator_init,
460 .init_late = omap1_init_late, 460 .init_late = omap1_init_late,
461 .timer = &omap1_timer, 461 .init_time = omap1_timer_init,
462 .restart = omap1_restart, 462 .restart = omap1_restart,
463MACHINE_END 463MACHINE_END
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 24d2f2df11a0..4695ca717706 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -242,6 +242,6 @@ MACHINE_START(NOKIA770, "Nokia 770")
242 .init_irq = omap1_init_irq, 242 .init_irq = omap1_init_irq,
243 .init_machine = omap_nokia770_init, 243 .init_machine = omap_nokia770_init,
244 .init_late = omap1_init_late, 244 .init_late = omap1_init_late,
245 .timer = &omap1_timer, 245 .init_time = omap1_timer_init,
246 .restart = omap1_restart, 246 .restart = omap1_restart,
247MACHINE_END 247MACHINE_END
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 872ea47cd28a..a7ce69286688 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -609,6 +609,6 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
609 .init_irq = omap1_init_irq, 609 .init_irq = omap1_init_irq,
610 .init_machine = osk_init, 610 .init_machine = osk_init,
611 .init_late = omap1_init_late, 611 .init_late = omap1_init_late,
612 .timer = &omap1_timer, 612 .init_time = omap1_timer_init,
613 .restart = omap1_restart, 613 .restart = omap1_restart,
614MACHINE_END 614MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index c33dceb46607..845a1a7aef95 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -268,6 +268,6 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
268 .init_irq = omap1_init_irq, 268 .init_irq = omap1_init_irq,
269 .init_machine = omap_palmte_init, 269 .init_machine = omap_palmte_init,
270 .init_late = omap1_init_late, 270 .init_late = omap1_init_late,
271 .timer = &omap1_timer, 271 .init_time = omap1_timer_init,
272 .restart = omap1_restart, 272 .restart = omap1_restart,
273MACHINE_END 273MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 2948b0ee4be8..65a4a3e357f2 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -314,6 +314,6 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
314 .init_irq = omap1_init_irq, 314 .init_irq = omap1_init_irq,
315 .init_machine = omap_palmtt_init, 315 .init_machine = omap_palmtt_init,
316 .init_late = omap1_init_late, 316 .init_late = omap1_init_late,
317 .timer = &omap1_timer, 317 .init_time = omap1_timer_init,
318 .restart = omap1_restart, 318 .restart = omap1_restart,
319MACHINE_END 319MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 7a05895c0be3..01c970071fd8 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -330,6 +330,6 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
330 .init_irq = omap1_init_irq, 330 .init_irq = omap1_init_irq,
331 .init_machine = omap_palmz71_init, 331 .init_machine = omap_palmz71_init,
332 .init_late = omap1_init_late, 332 .init_late = omap1_init_late,
333 .timer = &omap1_timer, 333 .init_time = omap1_timer_init,
334 .restart = omap1_restart, 334 .restart = omap1_restart,
335MACHINE_END 335MACHINE_END
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 27f8d12ec222..8b2f7127f716 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -326,6 +326,6 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
326 .init_irq = omap1_init_irq, 326 .init_irq = omap1_init_irq,
327 .init_machine = omap_perseus2_init, 327 .init_machine = omap_perseus2_init,
328 .init_late = omap1_init_late, 328 .init_late = omap1_init_late,
329 .timer = &omap1_timer, 329 .init_time = omap1_timer_init,
330 .restart = omap1_restart, 330 .restart = omap1_restart,
331MACHINE_END 331MACHINE_END
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 20ed52ae1714..9732a98f3e06 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -407,6 +407,6 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
407 .init_irq = omap1_init_irq, 407 .init_irq = omap1_init_irq,
408 .init_machine = omap_sx1_init, 408 .init_machine = omap_sx1_init,
409 .init_late = omap1_init_late, 409 .init_late = omap1_init_late,
410 .timer = &omap1_timer, 410 .init_time = omap1_timer_init,
411 .restart = omap1_restart, 411 .restart = omap1_restart,
412MACHINE_END 412MACHINE_END
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index abf705f49b19..6c116e1a4b01 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -289,6 +289,6 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
289 .init_irq = omap1_init_irq, 289 .init_irq = omap1_init_irq,
290 .init_machine = voiceblue_init, 290 .init_machine = voiceblue_init,
291 .init_late = omap1_init_late, 291 .init_late = omap1_init_late,
292 .timer = &omap1_timer, 292 .init_time = omap1_timer_init,
293 .restart = voiceblue_restart, 293 .restart = voiceblue_restart,
294MACHINE_END 294MACHINE_END
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index b53e0854422f..fb18831e88aa 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -75,7 +75,7 @@ extern void __init omap_check_revision(void);
75extern void omap1_nand_cmd_ctl(struct mtd_info *mtd, int cmd, 75extern void omap1_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
76 unsigned int ctrl); 76 unsigned int ctrl);
77 77
78extern struct sys_timer omap1_timer; 78extern void omap1_timer_init(void);
79#ifdef CONFIG_OMAP_32K_TIMER 79#ifdef CONFIG_OMAP_32K_TIMER
80extern int omap_32k_timer_init(void); 80extern int omap_32k_timer_init(void);
81#else 81#else
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 4d4816fd6fc9..726ec23d29c7 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -145,7 +145,6 @@ static void omap_mpu_set_mode(enum clock_event_mode mode,
145static struct clock_event_device clockevent_mpu_timer1 = { 145static struct clock_event_device clockevent_mpu_timer1 = {
146 .name = "mpu_timer1", 146 .name = "mpu_timer1",
147 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 147 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
148 .shift = 32,
149 .set_next_event = omap_mpu_set_next_event, 148 .set_next_event = omap_mpu_set_next_event,
150 .set_mode = omap_mpu_set_mode, 149 .set_mode = omap_mpu_set_mode,
151}; 150};
@@ -170,15 +169,9 @@ static __init void omap_init_mpu_timer(unsigned long rate)
170 setup_irq(INT_TIMER1, &omap_mpu_timer1_irq); 169 setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);
171 omap_mpu_timer_start(0, (rate / HZ) - 1, 1); 170 omap_mpu_timer_start(0, (rate / HZ) - 1, 1);
172 171
173 clockevent_mpu_timer1.mult = div_sc(rate, NSEC_PER_SEC,
174 clockevent_mpu_timer1.shift);
175 clockevent_mpu_timer1.max_delta_ns =
176 clockevent_delta2ns(-1, &clockevent_mpu_timer1);
177 clockevent_mpu_timer1.min_delta_ns =
178 clockevent_delta2ns(1, &clockevent_mpu_timer1);
179
180 clockevent_mpu_timer1.cpumask = cpumask_of(0); 172 clockevent_mpu_timer1.cpumask = cpumask_of(0);
181 clockevents_register_device(&clockevent_mpu_timer1); 173 clockevents_config_and_register(&clockevent_mpu_timer1, rate,
174 1, -1);
182} 175}
183 176
184 177
@@ -236,12 +229,8 @@ static inline void omap_mpu_timer_init(void)
236 * Timer initialization 229 * Timer initialization
237 * --------------------------------------------------------------------------- 230 * ---------------------------------------------------------------------------
238 */ 231 */
239static void __init omap1_timer_init(void) 232void __init omap1_timer_init(void)
240{ 233{
241 if (omap_32k_timer_init() != 0) 234 if (omap_32k_timer_init() != 0)
242 omap_mpu_timer_init(); 235 omap_mpu_timer_init();
243} 236}
244
245struct sys_timer omap1_timer = {
246 .init = omap1_timer_init,
247};
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 41152fadd4c0..0b74246ba62c 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -140,7 +140,6 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode,
140static struct clock_event_device clockevent_32k_timer = { 140static struct clock_event_device clockevent_32k_timer = {
141 .name = "32k-timer", 141 .name = "32k-timer",
142 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 142 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
143 .shift = 32,
144 .set_next_event = omap_32k_timer_set_next_event, 143 .set_next_event = omap_32k_timer_set_next_event,
145 .set_mode = omap_32k_timer_set_mode, 144 .set_mode = omap_32k_timer_set_mode,
146}; 145};
@@ -165,16 +164,9 @@ static __init void omap_init_32k_timer(void)
165{ 164{
166 setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); 165 setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
167 166
168 clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC,
169 NSEC_PER_SEC,
170 clockevent_32k_timer.shift);
171 clockevent_32k_timer.max_delta_ns =
172 clockevent_delta2ns(0xfffffffe, &clockevent_32k_timer);
173 clockevent_32k_timer.min_delta_ns =
174 clockevent_delta2ns(1, &clockevent_32k_timer);
175
176 clockevent_32k_timer.cpumask = cpumask_of(0); 167 clockevent_32k_timer.cpumask = cpumask_of(0);
177 clockevents_register_device(&clockevent_32k_timer); 168 clockevents_config_and_register(&clockevent_32k_timer,
169 OMAP_32K_TICKS_PER_SEC, 1, 0xfffffffe);
178} 170}
179 171
180/* 172/*
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 4815ea6f8f5d..5f413968d568 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -284,6 +284,6 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
284 .handle_irq = omap2_intc_handle_irq, 284 .handle_irq = omap2_intc_handle_irq,
285 .init_machine = omap_2430sdp_init, 285 .init_machine = omap_2430sdp_init,
286 .init_late = omap2430_init_late, 286 .init_late = omap2430_init_late,
287 .timer = &omap2_timer, 287 .init_time = omap2_sync32k_timer_init,
288 .restart = omap2xxx_restart, 288 .restart = omap2xxx_restart,
289MACHINE_END 289MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index bb73afc9ac17..8e2513f6a282 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -597,6 +597,6 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
597 .handle_irq = omap3_intc_handle_irq, 597 .handle_irq = omap3_intc_handle_irq,
598 .init_machine = omap_3430sdp_init, 598 .init_machine = omap_3430sdp_init,
599 .init_late = omap3430_init_late, 599 .init_late = omap3430_init_late,
600 .timer = &omap3_timer, 600 .init_time = omap3_sync32k_timer_init,
601 .restart = omap3xxx_restart, 601 .restart = omap3xxx_restart,
602MACHINE_END 602MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 050aaa771254..33846274bb8a 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -211,6 +211,6 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
211 .handle_irq = omap3_intc_handle_irq, 211 .handle_irq = omap3_intc_handle_irq,
212 .init_machine = omap_sdp_init, 212 .init_machine = omap_sdp_init,
213 .init_late = omap3630_init_late, 213 .init_late = omap3630_init_late,
214 .timer = &omap3_timer, 214 .init_time = omap3_sync32k_timer_init,
215 .restart = omap3xxx_restart, 215 .restart = omap3xxx_restart,
216MACHINE_END 216MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 1cc6696594fd..f8eeef40efe8 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -26,10 +26,10 @@
26#include <linux/regulator/fixed.h> 26#include <linux/regulator/fixed.h>
27#include <linux/leds.h> 27#include <linux/leds.h>
28#include <linux/leds_pwm.h> 28#include <linux/leds_pwm.h>
29#include <linux/irqchip/arm-gic.h>
29#include <linux/platform_data/omap4-keypad.h> 30#include <linux/platform_data/omap4-keypad.h>
30#include <linux/usb/musb.h> 31#include <linux/usb/musb.h>
31 32
32#include <asm/hardware/gic.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
35#include <asm/mach/map.h> 35#include <asm/mach/map.h>
@@ -722,9 +722,8 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
722 .map_io = omap4_map_io, 722 .map_io = omap4_map_io,
723 .init_early = omap4430_init_early, 723 .init_early = omap4430_init_early,
724 .init_irq = gic_init_irq, 724 .init_irq = gic_init_irq,
725 .handle_irq = gic_handle_irq,
726 .init_machine = omap_4430sdp_init, 725 .init_machine = omap_4430sdp_init,
727 .init_late = omap4430_init_late, 726 .init_late = omap4430_init_late,
728 .timer = &omap4_timer, 727 .init_time = omap4_local_timer_init,
729 .restart = omap44xx_restart, 728 .restart = omap44xx_restart,
730MACHINE_END 729MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 51b96a1206d1..07f0be24a5d1 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -92,6 +92,6 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
92 .handle_irq = omap3_intc_handle_irq, 92 .handle_irq = omap3_intc_handle_irq,
93 .init_machine = am3517_crane_init, 93 .init_machine = am3517_crane_init,
94 .init_late = am35xx_init_late, 94 .init_late = am35xx_init_late,
95 .timer = &omap3_timer, 95 .init_time = omap3_sync32k_timer_init,
96 .restart = omap3xxx_restart, 96 .restart = omap3xxx_restart,
97MACHINE_END 97MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index f81a303b87ff..6f5b2a05f4b2 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -393,6 +393,6 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
393 .handle_irq = omap3_intc_handle_irq, 393 .handle_irq = omap3_intc_handle_irq,
394 .init_machine = am3517_evm_init, 394 .init_machine = am3517_evm_init,
395 .init_late = am35xx_init_late, 395 .init_late = am35xx_init_late,
396 .timer = &omap3_timer, 396 .init_time = omap3_sync32k_timer_init,
397 .restart = omap3xxx_restart, 397 .restart = omap3xxx_restart,
398MACHINE_END 398MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 5d0a61f54165..3a6ca74709ab 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -337,6 +337,6 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
337 .handle_irq = omap2_intc_handle_irq, 337 .handle_irq = omap2_intc_handle_irq,
338 .init_machine = omap_apollon_init, 338 .init_machine = omap_apollon_init,
339 .init_late = omap2420_init_late, 339 .init_late = omap2420_init_late,
340 .timer = &omap2_timer, 340 .init_time = omap2_sync32k_timer_init,
341 .restart = omap2xxx_restart, 341 .restart = omap2xxx_restart,
342MACHINE_END 342MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index b3102c2f4a3c..68647c389190 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -751,7 +751,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
751 .handle_irq = omap3_intc_handle_irq, 751 .handle_irq = omap3_intc_handle_irq,
752 .init_machine = cm_t35_init, 752 .init_machine = cm_t35_init,
753 .init_late = omap35xx_init_late, 753 .init_late = omap35xx_init_late,
754 .timer = &omap3_timer, 754 .init_time = omap3_sync32k_timer_init,
755 .restart = omap3xxx_restart, 755 .restart = omap3xxx_restart,
756MACHINE_END 756MACHINE_END
757 757
@@ -764,6 +764,6 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
764 .handle_irq = omap3_intc_handle_irq, 764 .handle_irq = omap3_intc_handle_irq,
765 .init_machine = cm_t3730_init, 765 .init_machine = cm_t3730_init,
766 .init_late = omap3630_init_late, 766 .init_late = omap3630_init_late,
767 .timer = &omap3_timer, 767 .init_time = omap3_sync32k_timer_init,
768 .restart = omap3xxx_restart, 768 .restart = omap3xxx_restart,
769MACHINE_END 769MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index ebbc2adb499e..6a9529ab95cd 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -297,6 +297,6 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
297 .handle_irq = omap3_intc_handle_irq, 297 .handle_irq = omap3_intc_handle_irq,
298 .init_machine = cm_t3517_init, 298 .init_machine = cm_t3517_init,
299 .init_late = am35xx_init_late, 299 .init_late = am35xx_init_late,
300 .timer = &omap3_gp_timer, 300 .init_time = omap3_gp_gptimer_timer_init,
301 .restart = omap3xxx_restart, 301 .restart = omap3xxx_restart,
302MACHINE_END 302MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 12865af25d3a..0b1d8f758088 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -643,6 +643,6 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
643 .handle_irq = omap3_intc_handle_irq, 643 .handle_irq = omap3_intc_handle_irq,
644 .init_machine = devkit8000_init, 644 .init_machine = devkit8000_init,
645 .init_late = omap35xx_init_late, 645 .init_late = omap35xx_init_late,
646 .timer = &omap3_secure_timer, 646 .init_time = omap3_secure_sync32k_timer_init,
647 .restart = omap3xxx_restart, 647 .restart = omap3xxx_restart,
648MACHINE_END 648MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 53cb380b7877..2590463e4b57 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -16,7 +16,6 @@
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
18 18
19#include <asm/hardware/gic.h>
20#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
21 20
22#include "common.h" 21#include "common.h"
@@ -65,7 +64,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
65 .init_irq = omap_intc_of_init, 64 .init_irq = omap_intc_of_init,
66 .handle_irq = omap2_intc_handle_irq, 65 .handle_irq = omap2_intc_handle_irq,
67 .init_machine = omap_generic_init, 66 .init_machine = omap_generic_init,
68 .timer = &omap2_timer, 67 .init_time = omap2_sync32k_timer_init,
69 .dt_compat = omap242x_boards_compat, 68 .dt_compat = omap242x_boards_compat,
70 .restart = omap2xxx_restart, 69 .restart = omap2xxx_restart,
71MACHINE_END 70MACHINE_END
@@ -84,7 +83,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
84 .init_irq = omap_intc_of_init, 83 .init_irq = omap_intc_of_init,
85 .handle_irq = omap2_intc_handle_irq, 84 .handle_irq = omap2_intc_handle_irq,
86 .init_machine = omap_generic_init, 85 .init_machine = omap_generic_init,
87 .timer = &omap2_timer, 86 .init_time = omap2_sync32k_timer_init,
88 .dt_compat = omap243x_boards_compat, 87 .dt_compat = omap243x_boards_compat,
89 .restart = omap2xxx_restart, 88 .restart = omap2xxx_restart,
90MACHINE_END 89MACHINE_END
@@ -103,7 +102,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
103 .init_irq = omap_intc_of_init, 102 .init_irq = omap_intc_of_init,
104 .handle_irq = omap3_intc_handle_irq, 103 .handle_irq = omap3_intc_handle_irq,
105 .init_machine = omap_generic_init, 104 .init_machine = omap_generic_init,
106 .timer = &omap3_timer, 105 .init_time = omap3_sync32k_timer_init,
107 .dt_compat = omap3_boards_compat, 106 .dt_compat = omap3_boards_compat,
108 .restart = omap3xxx_restart, 107 .restart = omap3xxx_restart,
109MACHINE_END 108MACHINE_END
@@ -120,7 +119,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
120 .init_irq = omap_intc_of_init, 119 .init_irq = omap_intc_of_init,
121 .handle_irq = omap3_intc_handle_irq, 120 .handle_irq = omap3_intc_handle_irq,
122 .init_machine = omap_generic_init, 121 .init_machine = omap_generic_init,
123 .timer = &omap3_secure_timer, 122 .init_time = omap3_secure_sync32k_timer_init,
124 .dt_compat = omap3_gp_boards_compat, 123 .dt_compat = omap3_gp_boards_compat,
125 .restart = omap3xxx_restart, 124 .restart = omap3xxx_restart,
126MACHINE_END 125MACHINE_END
@@ -139,7 +138,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
139 .init_irq = omap_intc_of_init, 138 .init_irq = omap_intc_of_init,
140 .handle_irq = omap3_intc_handle_irq, 139 .handle_irq = omap3_intc_handle_irq,
141 .init_machine = omap_generic_init, 140 .init_machine = omap_generic_init,
142 .timer = &omap3_am33xx_timer, 141 .init_time = omap3_am33xx_gptimer_timer_init,
143 .dt_compat = am33xx_boards_compat, 142 .dt_compat = am33xx_boards_compat,
144MACHINE_END 143MACHINE_END
145#endif 144#endif
@@ -156,10 +155,9 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
156 .map_io = omap4_map_io, 155 .map_io = omap4_map_io,
157 .init_early = omap4430_init_early, 156 .init_early = omap4430_init_early,
158 .init_irq = omap_gic_of_init, 157 .init_irq = omap_gic_of_init,
159 .handle_irq = gic_handle_irq,
160 .init_machine = omap_generic_init, 158 .init_machine = omap_generic_init,
161 .init_late = omap4430_init_late, 159 .init_late = omap4430_init_late,
162 .timer = &omap4_timer, 160 .init_time = omap4_local_timer_init,
163 .dt_compat = omap4_boards_compat, 161 .dt_compat = omap4_boards_compat,
164 .restart = omap44xx_restart, 162 .restart = omap44xx_restart,
165MACHINE_END 163MACHINE_END
@@ -177,9 +175,8 @@ DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
177 .map_io = omap5_map_io, 175 .map_io = omap5_map_io,
178 .init_early = omap5_init_early, 176 .init_early = omap5_init_early,
179 .init_irq = omap_gic_of_init, 177 .init_irq = omap_gic_of_init,
180 .handle_irq = gic_handle_irq,
181 .init_machine = omap_generic_init, 178 .init_machine = omap_generic_init,
182 .timer = &omap5_timer, 179 .init_time = omap5_realtime_timer_init,
183 .dt_compat = omap5_boards_compat, 180 .dt_compat = omap5_boards_compat,
184 .restart = omap44xx_restart, 181 .restart = omap44xx_restart,
185MACHINE_END 182MACHINE_END
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 3be1311f9e33..812c829fa46f 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -342,6 +342,6 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
342 .handle_irq = omap2_intc_handle_irq, 342 .handle_irq = omap2_intc_handle_irq,
343 .init_machine = omap_h4_init, 343 .init_machine = omap_h4_init,
344 .init_late = omap2420_init_late, 344 .init_late = omap2420_init_late,
345 .timer = &omap2_timer, 345 .init_time = omap2_sync32k_timer_init,
346 .restart = omap2xxx_restart, 346 .restart = omap2xxx_restart,
347MACHINE_END 347MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 0f24cb84ba5a..5b447649f5a0 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -655,7 +655,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
655 .handle_irq = omap3_intc_handle_irq, 655 .handle_irq = omap3_intc_handle_irq,
656 .init_machine = igep_init, 656 .init_machine = igep_init,
657 .init_late = omap35xx_init_late, 657 .init_late = omap35xx_init_late,
658 .timer = &omap3_timer, 658 .init_time = omap3_sync32k_timer_init,
659 .restart = omap3xxx_restart, 659 .restart = omap3xxx_restart,
660MACHINE_END 660MACHINE_END
661 661
@@ -668,6 +668,6 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
668 .handle_irq = omap3_intc_handle_irq, 668 .handle_irq = omap3_intc_handle_irq,
669 .init_machine = igep_init, 669 .init_machine = igep_init,
670 .init_late = omap35xx_init_late, 670 .init_late = omap35xx_init_late,
671 .timer = &omap3_timer, 671 .init_time = omap3_sync32k_timer_init,
672 .restart = omap3xxx_restart, 672 .restart = omap3xxx_restart,
673MACHINE_END 673MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 0869f4f3d3e1..ff440c0d04dd 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -435,6 +435,6 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
435 .handle_irq = omap3_intc_handle_irq, 435 .handle_irq = omap3_intc_handle_irq,
436 .init_machine = omap_ldp_init, 436 .init_machine = omap_ldp_init,
437 .init_late = omap3430_init_late, 437 .init_late = omap3430_init_late,
438 .timer = &omap3_timer, 438 .init_time = omap3_sync32k_timer_init,
439 .restart = omap3xxx_restart, 439 .restart = omap3xxx_restart,
440MACHINE_END 440MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 0abb30fe399c..f6eeb87e4e95 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -731,7 +731,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
731 .handle_irq = omap2_intc_handle_irq, 731 .handle_irq = omap2_intc_handle_irq,
732 .init_machine = n8x0_init_machine, 732 .init_machine = n8x0_init_machine,
733 .init_late = omap2420_init_late, 733 .init_late = omap2420_init_late,
734 .timer = &omap2_timer, 734 .init_time = omap2_sync32k_timer_init,
735 .restart = omap2xxx_restart, 735 .restart = omap2xxx_restart,
736MACHINE_END 736MACHINE_END
737 737
@@ -744,7 +744,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
744 .handle_irq = omap2_intc_handle_irq, 744 .handle_irq = omap2_intc_handle_irq,
745 .init_machine = n8x0_init_machine, 745 .init_machine = n8x0_init_machine,
746 .init_late = omap2420_init_late, 746 .init_late = omap2420_init_late,
747 .timer = &omap2_timer, 747 .init_time = omap2_sync32k_timer_init,
748 .restart = omap2xxx_restart, 748 .restart = omap2xxx_restart,
749MACHINE_END 749MACHINE_END
750 750
@@ -757,6 +757,6 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
757 .handle_irq = omap2_intc_handle_irq, 757 .handle_irq = omap2_intc_handle_irq,
758 .init_machine = n8x0_init_machine, 758 .init_machine = n8x0_init_machine,
759 .init_late = omap2420_init_late, 759 .init_late = omap2420_init_late,
760 .timer = &omap2_timer, 760 .init_time = omap2_sync32k_timer_init,
761 .restart = omap2xxx_restart, 761 .restart = omap2xxx_restart,
762MACHINE_END 762MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 22c483d5dfa8..b81b4585f46f 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -544,6 +544,6 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
544 .handle_irq = omap3_intc_handle_irq, 544 .handle_irq = omap3_intc_handle_irq,
545 .init_machine = omap3_beagle_init, 545 .init_machine = omap3_beagle_init,
546 .init_late = omap3_init_late, 546 .init_late = omap3_init_late,
547 .timer = &omap3_secure_timer, 547 .init_time = omap3_secure_sync32k_timer_init,
548 .restart = omap3xxx_restart, 548 .restart = omap3xxx_restart,
549MACHINE_END 549MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 3985f35aee06..f2f636b19762 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -757,6 +757,6 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
757 .handle_irq = omap3_intc_handle_irq, 757 .handle_irq = omap3_intc_handle_irq,
758 .init_machine = omap3_evm_init, 758 .init_machine = omap3_evm_init,
759 .init_late = omap35xx_init_late, 759 .init_late = omap35xx_init_late,
760 .timer = &omap3_timer, 760 .init_time = omap3_sync32k_timer_init,
761 .restart = omap3xxx_restart, 761 .restart = omap3xxx_restart,
762MACHINE_END 762MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 2a065ba6eb58..0fba43a9b07d 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -231,7 +231,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
231 .handle_irq = omap3_intc_handle_irq, 231 .handle_irq = omap3_intc_handle_irq,
232 .init_machine = omap3logic_init, 232 .init_machine = omap3logic_init,
233 .init_late = omap35xx_init_late, 233 .init_late = omap35xx_init_late,
234 .timer = &omap3_timer, 234 .init_time = omap3_sync32k_timer_init,
235 .restart = omap3xxx_restart, 235 .restart = omap3xxx_restart,
236MACHINE_END 236MACHINE_END
237 237
@@ -244,6 +244,6 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
244 .handle_irq = omap3_intc_handle_irq, 244 .handle_irq = omap3_intc_handle_irq,
245 .init_machine = omap3logic_init, 245 .init_machine = omap3logic_init,
246 .init_late = omap35xx_init_late, 246 .init_late = omap35xx_init_late,
247 .timer = &omap3_timer, 247 .init_time = omap3_sync32k_timer_init,
248 .restart = omap3xxx_restart, 248 .restart = omap3xxx_restart,
249MACHINE_END 249MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index a53a6683c1b8..12e181689340 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -618,6 +618,6 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
618 .handle_irq = omap3_intc_handle_irq, 618 .handle_irq = omap3_intc_handle_irq,
619 .init_machine = omap3pandora_init, 619 .init_machine = omap3pandora_init,
620 .init_late = omap35xx_init_late, 620 .init_late = omap35xx_init_late,
621 .timer = &omap3_timer, 621 .init_time = omap3_sync32k_timer_init,
622 .restart = omap3xxx_restart, 622 .restart = omap3xxx_restart,
623MACHINE_END 623MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 53a6cbcf9747..13ee40545604 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -427,6 +427,6 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
427 .handle_irq = omap3_intc_handle_irq, 427 .handle_irq = omap3_intc_handle_irq,
428 .init_machine = omap3_stalker_init, 428 .init_machine = omap3_stalker_init,
429 .init_late = omap35xx_init_late, 429 .init_late = omap35xx_init_late,
430 .timer = &omap3_secure_timer, 430 .init_time = omap3_secure_sync32k_timer_init,
431 .restart = omap3xxx_restart, 431 .restart = omap3xxx_restart,
432MACHINE_END 432MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 263cb9cfbf37..36c455c85ed9 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -386,6 +386,6 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
386 .handle_irq = omap3_intc_handle_irq, 386 .handle_irq = omap3_intc_handle_irq,
387 .init_machine = omap3_touchbook_init, 387 .init_machine = omap3_touchbook_init,
388 .init_late = omap3430_init_late, 388 .init_late = omap3430_init_late,
389 .timer = &omap3_secure_timer, 389 .init_time = omap3_secure_sync32k_timer_init,
390 .restart = omap3xxx_restart, 390 .restart = omap3xxx_restart,
391MACHINE_END 391MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 769c1feee1c4..b62317906b39 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -31,9 +31,9 @@
31#include <linux/ti_wilink_st.h> 31#include <linux/ti_wilink_st.h>
32#include <linux/usb/musb.h> 32#include <linux/usb/musb.h>
33#include <linux/wl12xx.h> 33#include <linux/wl12xx.h>
34#include <linux/irqchip/arm-gic.h>
34#include <linux/platform_data/omap-abe-twl6040.h> 35#include <linux/platform_data/omap-abe-twl6040.h>
35 36
36#include <asm/hardware/gic.h>
37#include <asm/mach-types.h> 37#include <asm/mach-types.h>
38#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
@@ -459,9 +459,8 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
459 .map_io = omap4_map_io, 459 .map_io = omap4_map_io,
460 .init_early = omap4430_init_early, 460 .init_early = omap4430_init_early,
461 .init_irq = gic_init_irq, 461 .init_irq = gic_init_irq,
462 .handle_irq = gic_handle_irq,
463 .init_machine = omap4_panda_init, 462 .init_machine = omap4_panda_init,
464 .init_late = omap4430_init_late, 463 .init_late = omap4430_init_late,
465 .timer = &omap4_timer, 464 .init_time = omap4_local_timer_init,
466 .restart = omap44xx_restart, 465 .restart = omap44xx_restart,
467MACHINE_END 466MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index c8fde3e56441..233a37d541c3 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -551,6 +551,6 @@ MACHINE_START(OVERO, "Gumstix Overo")
551 .handle_irq = omap3_intc_handle_irq, 551 .handle_irq = omap3_intc_handle_irq,
552 .init_machine = overo_init, 552 .init_machine = overo_init,
553 .init_late = omap35xx_init_late, 553 .init_late = omap35xx_init_late,
554 .timer = &omap3_timer, 554 .init_time = omap3_sync32k_timer_init,
555 .restart = omap3xxx_restart, 555 .restart = omap3xxx_restart,
556MACHINE_END 556MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 0c777b75e484..386a2ddc1173 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -147,7 +147,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
147 .handle_irq = omap3_intc_handle_irq, 147 .handle_irq = omap3_intc_handle_irq,
148 .init_machine = rm680_init, 148 .init_machine = rm680_init,
149 .init_late = omap3630_init_late, 149 .init_late = omap3630_init_late,
150 .timer = &omap3_timer, 150 .init_time = omap3_sync32k_timer_init,
151 .restart = omap3xxx_restart, 151 .restart = omap3xxx_restart,
152MACHINE_END 152MACHINE_END
153 153
@@ -160,6 +160,6 @@ MACHINE_START(NOKIA_RM696, "Nokia RM-696 board")
160 .handle_irq = omap3_intc_handle_irq, 160 .handle_irq = omap3_intc_handle_irq,
161 .init_machine = rm680_init, 161 .init_machine = rm680_init,
162 .init_late = omap3630_init_late, 162 .init_late = omap3630_init_late,
163 .timer = &omap3_timer, 163 .init_time = omap3_sync32k_timer_init,
164 .restart = omap3xxx_restart, 164 .restart = omap3xxx_restart,
165MACHINE_END 165MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index d0374ea2dfb0..f7c4616cbb60 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -123,6 +123,6 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
123 .handle_irq = omap3_intc_handle_irq, 123 .handle_irq = omap3_intc_handle_irq,
124 .init_machine = rx51_init, 124 .init_machine = rx51_init,
125 .init_late = omap3430_init_late, 125 .init_late = omap3430_init_late,
126 .timer = &omap3_timer, 126 .init_time = omap3_sync32k_timer_init,
127 .restart = omap3xxx_restart, 127 .restart = omap3xxx_restart,
128MACHINE_END 128MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 1a3e056d63a7..6273c286e1d8 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -43,7 +43,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
43 .map_io = ti81xx_map_io, 43 .map_io = ti81xx_map_io,
44 .init_early = ti81xx_init_early, 44 .init_early = ti81xx_init_early,
45 .init_irq = ti81xx_init_irq, 45 .init_irq = ti81xx_init_irq,
46 .timer = &omap3_timer, 46 .init_time = omap3_sync32k_timer_init,
47 .init_machine = ti81xx_evm_init, 47 .init_machine = ti81xx_evm_init,
48 .init_late = ti81xx_init_late, 48 .init_late = ti81xx_init_late,
49 .restart = omap44xx_restart, 49 .restart = omap44xx_restart,
@@ -55,7 +55,7 @@ MACHINE_START(TI8148EVM, "ti8148evm")
55 .map_io = ti81xx_map_io, 55 .map_io = ti81xx_map_io,
56 .init_early = ti81xx_init_early, 56 .init_early = ti81xx_init_early,
57 .init_irq = ti81xx_init_irq, 57 .init_irq = ti81xx_init_irq,
58 .timer = &omap3_timer, 58 .init_time = omap3_sync32k_timer_init,
59 .init_machine = ti81xx_evm_init, 59 .init_machine = ti81xx_evm_init,
60 .init_late = ti81xx_init_late, 60 .init_late = ti81xx_init_late,
61 .restart = omap44xx_restart, 61 .restart = omap44xx_restart,
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index d7fa31e67238..d257cf1e0abe 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -137,7 +137,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
137 .handle_irq = omap3_intc_handle_irq, 137 .handle_irq = omap3_intc_handle_irq,
138 .init_machine = omap_zoom_init, 138 .init_machine = omap_zoom_init,
139 .init_late = omap3430_init_late, 139 .init_late = omap3430_init_late,
140 .timer = &omap3_timer, 140 .init_time = omap3_sync32k_timer_init,
141 .restart = omap3xxx_restart, 141 .restart = omap3xxx_restart,
142MACHINE_END 142MACHINE_END
143 143
@@ -150,6 +150,6 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
150 .handle_irq = omap3_intc_handle_irq, 150 .handle_irq = omap3_intc_handle_irq,
151 .init_machine = omap_zoom_init, 151 .init_machine = omap_zoom_init,
152 .init_late = omap3630_init_late, 152 .init_late = omap3630_init_late,
153 .timer = &omap3_timer, 153 .init_time = omap3_sync32k_timer_init,
154 .restart = omap3xxx_restart, 154 .restart = omap3xxx_restart,
155MACHINE_END 155MACHINE_END
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 948bcaa82eb6..b4350274361b 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -79,13 +79,13 @@ static inline int omap_mux_late_init(void)
79 79
80extern void omap2_init_common_infrastructure(void); 80extern void omap2_init_common_infrastructure(void);
81 81
82extern struct sys_timer omap2_timer; 82extern void omap2_sync32k_timer_init(void);
83extern struct sys_timer omap3_timer; 83extern void omap3_sync32k_timer_init(void);
84extern struct sys_timer omap3_secure_timer; 84extern void omap3_secure_sync32k_timer_init(void);
85extern struct sys_timer omap3_gp_timer; 85extern void omap3_gp_gptimer_timer_init(void);
86extern struct sys_timer omap3_am33xx_timer; 86extern void omap3_am33xx_gptimer_timer_init(void);
87extern struct sys_timer omap4_timer; 87extern void omap4_local_timer_init(void);
88extern struct sys_timer omap5_timer; 88extern void omap5_realtime_timer_init(void);
89 89
90void omap2420_init_early(void); 90void omap2420_init_early(void);
91void omap2430_init_early(void); 91void omap2430_init_early(void);
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index cd42d921940d..361677983af0 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -19,9 +19,9 @@
19#include <linux/device.h> 19#include <linux/device.h>
20#include <linux/smp.h> 20#include <linux/smp.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/irqchip/arm-gic.h>
22 23
23#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
24#include <asm/hardware/gic.h>
25#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
26 26
27#include "omap-secure.h" 27#include "omap-secure.h"
@@ -157,7 +157,7 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *
157 booted = true; 157 booted = true;
158 } 158 }
159 159
160 gic_raise_softirq(cpumask_of(cpu), 0); 160 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
161 161
162 /* 162 /*
163 * Now the secondary core is starting up let it run its 163 * Now the secondary core is starting up let it run its
@@ -231,8 +231,6 @@ static void __init omap4_smp_init_cpus(void)
231 231
232 for (i = 0; i < ncores; i++) 232 for (i = 0; i < ncores; i++)
233 set_cpu_possible(i, true); 233 set_cpu_possible(i, true);
234
235 set_smp_cross_call(gic_raise_softirq);
236} 234}
237 235
238static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) 236static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 5d3b4f4f81ae..8c5b5e3e3541 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -24,8 +24,7 @@
24#include <linux/cpu.h> 24#include <linux/cpu.h>
25#include <linux/notifier.h> 25#include <linux/notifier.h>
26#include <linux/cpu_pm.h> 26#include <linux/cpu_pm.h>
27 27#include <linux/irqchip/arm-gic.h>
28#include <asm/hardware/gic.h>
29 28
30#include "omap-wakeupgen.h" 29#include "omap-wakeupgen.h"
31#include "omap-secure.h" 30#include "omap-secure.h"
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 6897ae21bb82..547094883606 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -15,13 +15,14 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/irqchip.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
19#include <linux/memblock.h> 20#include <linux/memblock.h>
20#include <linux/of_irq.h> 21#include <linux/of_irq.h>
21#include <linux/of_platform.h> 22#include <linux/of_platform.h>
22#include <linux/export.h> 23#include <linux/export.h>
24#include <linux/irqchip/arm-gic.h>
23 25
24#include <asm/hardware/gic.h>
25#include <asm/hardware/cache-l2x0.h> 26#include <asm/hardware/cache-l2x0.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/memblock.h> 28#include <asm/memblock.h>
@@ -255,16 +256,10 @@ static int __init omap4_sar_ram_init(void)
255} 256}
256early_initcall(omap4_sar_ram_init); 257early_initcall(omap4_sar_ram_init);
257 258
258static struct of_device_id irq_match[] __initdata = {
259 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
260 { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
261 { }
262};
263
264void __init omap_gic_of_init(void) 259void __init omap_gic_of_init(void)
265{ 260{
266 omap_wakeupgen_init(); 261 omap_wakeupgen_init();
267 of_irq_init(irq_match); 262 irqchip_init();
268} 263}
269 264
270#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) 265#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index b8ad6e632bb8..d86074745c50 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
131static struct clock_event_device clockevent_gpt = { 131static struct clock_event_device clockevent_gpt = {
132 .name = "gp_timer", 132 .name = "gp_timer",
133 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 133 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
134 .shift = 32,
135 .rating = 300, 134 .rating = 300,
136 .set_next_event = omap2_gp_timer_set_next_event, 135 .set_next_event = omap2_gp_timer_set_next_event,
137 .set_mode = omap2_gp_timer_set_mode, 136 .set_mode = omap2_gp_timer_set_mode,
@@ -336,17 +335,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
336 335
337 __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); 336 __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
338 337
339 clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
340 clockevent_gpt.shift);
341 clockevent_gpt.max_delta_ns =
342 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
343 clockevent_gpt.min_delta_ns =
344 clockevent_delta2ns(3, &clockevent_gpt);
345 /* Timer internal resynch latency. */
346
347 clockevent_gpt.cpumask = cpu_possible_mask; 338 clockevent_gpt.cpumask = cpu_possible_mask;
348 clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev); 339 clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
349 clockevents_register_device(&clockevent_gpt); 340 clockevents_config_and_register(&clockevent_gpt, clkev.rate,
341 3, /* Timer internal resynch latency */
342 0xffffffff);
350 343
351 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", 344 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
352 gptimer_id, clkev.rate); 345 gptimer_id, clkev.rate);
@@ -552,7 +545,7 @@ static inline void __init realtime_counter_init(void)
552 545
553#define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \ 546#define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \
554 clksrc_nr, clksrc_src) \ 547 clksrc_nr, clksrc_src) \
555static void __init omap##name##_gptimer_timer_init(void) \ 548void __init omap##name##_gptimer_timer_init(void) \
556{ \ 549{ \
557 omap_dmtimer_init(); \ 550 omap_dmtimer_init(); \
558 omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ 551 omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
@@ -561,7 +554,7 @@ static void __init omap##name##_gptimer_timer_init(void) \
561 554
562#define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \ 555#define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \
563 clksrc_nr, clksrc_src) \ 556 clksrc_nr, clksrc_src) \
564static void __init omap##name##_sync32k_timer_init(void) \ 557void __init omap##name##_sync32k_timer_init(void) \
565{ \ 558{ \
566 omap_dmtimer_init(); \ 559 omap_dmtimer_init(); \
567 omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ 560 omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
@@ -572,33 +565,23 @@ static void __init omap##name##_sync32k_timer_init(void) \
572 omap2_sync32k_clocksource_init(); \ 565 omap2_sync32k_clocksource_init(); \
573} 566}
574 567
575#define OMAP_SYS_TIMER(name, clksrc) \
576struct sys_timer omap##name##_timer = { \
577 .init = omap##name##_##clksrc##_timer_init, \
578};
579
580#ifdef CONFIG_ARCH_OMAP2 568#ifdef CONFIG_ARCH_OMAP2
581OMAP_SYS_32K_TIMER_INIT(2, 1, OMAP2_32K_SOURCE, "ti,timer-alwon", 569OMAP_SYS_32K_TIMER_INIT(2, 1, OMAP2_32K_SOURCE, "ti,timer-alwon",
582 2, OMAP2_MPU_SOURCE); 570 2, OMAP2_MPU_SOURCE);
583OMAP_SYS_TIMER(2, sync32k);
584#endif /* CONFIG_ARCH_OMAP2 */ 571#endif /* CONFIG_ARCH_OMAP2 */
585 572
586#ifdef CONFIG_ARCH_OMAP3 573#ifdef CONFIG_ARCH_OMAP3
587OMAP_SYS_32K_TIMER_INIT(3, 1, OMAP3_32K_SOURCE, "ti,timer-alwon", 574OMAP_SYS_32K_TIMER_INIT(3, 1, OMAP3_32K_SOURCE, "ti,timer-alwon",
588 2, OMAP3_MPU_SOURCE); 575 2, OMAP3_MPU_SOURCE);
589OMAP_SYS_TIMER(3, sync32k);
590OMAP_SYS_32K_TIMER_INIT(3_secure, 12, OMAP3_32K_SOURCE, "ti,timer-secure", 576OMAP_SYS_32K_TIMER_INIT(3_secure, 12, OMAP3_32K_SOURCE, "ti,timer-secure",
591 2, OMAP3_MPU_SOURCE); 577 2, OMAP3_MPU_SOURCE);
592OMAP_SYS_TIMER(3_secure, sync32k);
593OMAP_SYS_GP_TIMER_INIT(3_gp, 1, OMAP3_MPU_SOURCE, "ti,timer-alwon", 578OMAP_SYS_GP_TIMER_INIT(3_gp, 1, OMAP3_MPU_SOURCE, "ti,timer-alwon",
594 2, OMAP3_MPU_SOURCE); 579 2, OMAP3_MPU_SOURCE);
595OMAP_SYS_TIMER(3_gp, gptimer);
596#endif /* CONFIG_ARCH_OMAP3 */ 580#endif /* CONFIG_ARCH_OMAP3 */
597 581
598#ifdef CONFIG_SOC_AM33XX 582#ifdef CONFIG_SOC_AM33XX
599OMAP_SYS_GP_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon", 583OMAP_SYS_GP_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon",
600 2, OMAP4_MPU_SOURCE); 584 2, OMAP4_MPU_SOURCE);
601OMAP_SYS_TIMER(3_am33xx, gptimer);
602#endif /* CONFIG_SOC_AM33XX */ 585#endif /* CONFIG_SOC_AM33XX */
603 586
604#ifdef CONFIG_ARCH_OMAP4 587#ifdef CONFIG_ARCH_OMAP4
@@ -606,7 +589,7 @@ OMAP_SYS_32K_TIMER_INIT(4, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
606 2, OMAP4_MPU_SOURCE); 589 2, OMAP4_MPU_SOURCE);
607#ifdef CONFIG_LOCAL_TIMERS 590#ifdef CONFIG_LOCAL_TIMERS
608static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29); 591static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29);
609static void __init omap4_local_timer_init(void) 592void __init omap4_local_timer_init(void)
610{ 593{
611 omap4_sync32k_timer_init(); 594 omap4_sync32k_timer_init();
612 /* Local timers are not supprted on OMAP4430 ES1.0 */ 595 /* Local timers are not supprted on OMAP4430 ES1.0 */
@@ -624,18 +607,17 @@ static void __init omap4_local_timer_init(void)
624 } 607 }
625} 608}
626#else /* CONFIG_LOCAL_TIMERS */ 609#else /* CONFIG_LOCAL_TIMERS */
627static void __init omap4_local_timer_init(void) 610void __init omap4_local_timer_init(void)
628{ 611{
629 omap4_sync32k_timer_init(); 612 omap4_sync32k_timer_init();
630} 613}
631#endif /* CONFIG_LOCAL_TIMERS */ 614#endif /* CONFIG_LOCAL_TIMERS */
632OMAP_SYS_TIMER(4, local);
633#endif /* CONFIG_ARCH_OMAP4 */ 615#endif /* CONFIG_ARCH_OMAP4 */
634 616
635#ifdef CONFIG_SOC_OMAP5 617#ifdef CONFIG_SOC_OMAP5
636OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon", 618OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
637 2, OMAP4_MPU_SOURCE); 619 2, OMAP4_MPU_SOURCE);
638static void __init omap5_realtime_timer_init(void) 620void __init omap5_realtime_timer_init(void)
639{ 621{
640 int err; 622 int err;
641 623
@@ -646,7 +628,6 @@ static void __init omap5_realtime_timer_init(void)
646 if (err) 628 if (err)
647 pr_err("%s: arch_timer_register failed %d\n", __func__, err); 629 pr_err("%s: arch_timer_register failed %d\n", __func__, err);
648} 630}
649OMAP_SYS_TIMER(5, realtime);
650#endif /* CONFIG_SOC_OMAP5 */ 631#endif /* CONFIG_SOC_OMAP5 */
651 632
652/** 633/**
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
index 32e5c211a89b..35a8014529ca 100644
--- a/arch/arm/mach-orion5x/board-dt.c
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -72,7 +72,7 @@ DT_MACHINE_START(ORION5X_DT, "Marvell Orion5x (Flattened Device Tree)")
72 .map_io = orion5x_map_io, 72 .map_io = orion5x_map_io,
73 .init_early = orion5x_init_early, 73 .init_early = orion5x_init_early,
74 .init_irq = orion_dt_init_irq, 74 .init_irq = orion_dt_init_irq,
75 .timer = &orion5x_timer, 75 .init_time = orion5x_timer_init,
76 .init_machine = orion5x_dt_init, 76 .init_machine = orion5x_dt_init,
77 .restart = orion5x_restart, 77 .restart = orion5x_restart,
78 .dt_compat = orion5x_dt_compat, 78 .dt_compat = orion5x_dt_compat,
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 550f92320afb..d068f1431c40 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -217,7 +217,7 @@ int __init orion5x_find_tclk(void)
217 return 166666667; 217 return 166666667;
218} 218}
219 219
220static void __init orion5x_timer_init(void) 220void __init orion5x_timer_init(void)
221{ 221{
222 orion5x_tclk = orion5x_find_tclk(); 222 orion5x_tclk = orion5x_find_tclk();
223 223
@@ -225,10 +225,6 @@ static void __init orion5x_timer_init(void)
225 IRQ_ORION5X_BRIDGE, orion5x_tclk); 225 IRQ_ORION5X_BRIDGE, orion5x_tclk);
226} 226}
227 227
228struct sys_timer orion5x_timer = {
229 .init = orion5x_timer_init,
230};
231
232 228
233/***************************************************************************** 229/*****************************************************************************
234 * General 230 * General
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 7db5cdd9c4b7..e60345760283 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -15,7 +15,7 @@ void orion5x_init(void);
15void orion5x_id(u32 *dev, u32 *rev, char **dev_name); 15void orion5x_id(u32 *dev, u32 *rev, char **dev_name);
16void clk_init(void); 16void clk_init(void);
17extern int orion5x_tclk; 17extern int orion5x_tclk;
18extern struct sys_timer orion5x_timer; 18extern void orion5x_timer_init(void);
19 19
20/* 20/*
21 * Enumerations and functions for Orion windows mapping. Used by Orion core 21 * Enumerations and functions for Orion windows mapping. Used by Orion core
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
index e3629c063df2..57d0af74874d 100644
--- a/arch/arm/mach-orion5x/d2net-setup.c
+++ b/arch/arm/mach-orion5x/d2net-setup.c
@@ -342,7 +342,7 @@ MACHINE_START(D2NET, "LaCie d2 Network")
342 .map_io = orion5x_map_io, 342 .map_io = orion5x_map_io,
343 .init_early = orion5x_init_early, 343 .init_early = orion5x_init_early,
344 .init_irq = orion5x_init_irq, 344 .init_irq = orion5x_init_irq,
345 .timer = &orion5x_timer, 345 .init_time = orion5x_timer_init,
346 .fixup = tag_fixup_mem32, 346 .fixup = tag_fixup_mem32,
347 .restart = orion5x_restart, 347 .restart = orion5x_restart,
348MACHINE_END 348MACHINE_END
@@ -355,7 +355,7 @@ MACHINE_START(BIGDISK, "LaCie Big Disk Network")
355 .map_io = orion5x_map_io, 355 .map_io = orion5x_map_io,
356 .init_early = orion5x_init_early, 356 .init_early = orion5x_init_early,
357 .init_irq = orion5x_init_irq, 357 .init_irq = orion5x_init_irq,
358 .timer = &orion5x_timer, 358 .init_time = orion5x_timer_init,
359 .fixup = tag_fixup_mem32, 359 .fixup = tag_fixup_mem32,
360 .restart = orion5x_restart, 360 .restart = orion5x_restart,
361MACHINE_END 361MACHINE_END
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 41fe2b1ff47c..76665640087b 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -362,6 +362,6 @@ MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board")
362 .map_io = orion5x_map_io, 362 .map_io = orion5x_map_io,
363 .init_early = orion5x_init_early, 363 .init_early = orion5x_init_early,
364 .init_irq = orion5x_init_irq, 364 .init_irq = orion5x_init_irq,
365 .timer = &orion5x_timer, 365 .init_time = orion5x_timer_init,
366 .restart = orion5x_restart, 366 .restart = orion5x_restart,
367MACHINE_END 367MACHINE_END
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index e533588880ff..6eb1732757fd 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -714,7 +714,7 @@ MACHINE_START(DNS323, "D-Link DNS-323")
714 .map_io = orion5x_map_io, 714 .map_io = orion5x_map_io,
715 .init_early = orion5x_init_early, 715 .init_early = orion5x_init_early,
716 .init_irq = orion5x_init_irq, 716 .init_irq = orion5x_init_irq,
717 .timer = &orion5x_timer, 717 .init_time = orion5x_timer_init,
718 .fixup = tag_fixup_mem32, 718 .fixup = tag_fixup_mem32,
719 .restart = orion5x_restart, 719 .restart = orion5x_restart,
720MACHINE_END 720MACHINE_END
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index f1ae10ae5bd4..b98403526218 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -383,7 +383,7 @@ MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro")
383 .map_io = orion5x_map_io, 383 .map_io = orion5x_map_io,
384 .init_early = orion5x_init_early, 384 .init_early = orion5x_init_early,
385 .init_irq = orion5x_init_irq, 385 .init_irq = orion5x_init_irq,
386 .timer = &orion5x_timer, 386 .init_time = orion5x_timer_init,
387 .fixup = tag_fixup_mem32, 387 .fixup = tag_fixup_mem32,
388 .restart = orion5x_restart, 388 .restart = orion5x_restart,
389MACHINE_END 389MACHINE_END
@@ -397,7 +397,7 @@ MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live")
397 .map_io = orion5x_map_io, 397 .map_io = orion5x_map_io,
398 .init_early = orion5x_init_early, 398 .init_early = orion5x_init_early,
399 .init_irq = orion5x_init_irq, 399 .init_irq = orion5x_init_irq,
400 .timer = &orion5x_timer, 400 .init_time = orion5x_timer_init,
401 .fixup = tag_fixup_mem32, 401 .fixup = tag_fixup_mem32,
402 .restart = orion5x_restart, 402 .restart = orion5x_restart,
403MACHINE_END 403MACHINE_END
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
index 0c9e413b5805..044da5b6a6ae 100644
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ b/arch/arm/mach-orion5x/ls-chl-setup.c
@@ -322,7 +322,7 @@ MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)")
322 .map_io = orion5x_map_io, 322 .map_io = orion5x_map_io,
323 .init_early = orion5x_init_early, 323 .init_early = orion5x_init_early,
324 .init_irq = orion5x_init_irq, 324 .init_irq = orion5x_init_irq,
325 .timer = &orion5x_timer, 325 .init_time = orion5x_timer_init,
326 .fixup = tag_fixup_mem32, 326 .fixup = tag_fixup_mem32,
327 .restart = orion5x_restart, 327 .restart = orion5x_restart,
328MACHINE_END 328MACHINE_END
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
index c1b5d8a58037..d49f93423f52 100644
--- a/arch/arm/mach-orion5x/ls_hgl-setup.c
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -269,7 +269,7 @@ MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL")
269 .map_io = orion5x_map_io, 269 .map_io = orion5x_map_io,
270 .init_early = orion5x_init_early, 270 .init_early = orion5x_init_early,
271 .init_irq = orion5x_init_irq, 271 .init_irq = orion5x_init_irq,
272 .timer = &orion5x_timer, 272 .init_time = orion5x_timer_init,
273 .fixup = tag_fixup_mem32, 273 .fixup = tag_fixup_mem32,
274 .restart = orion5x_restart, 274 .restart = orion5x_restart,
275MACHINE_END 275MACHINE_END
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index 949eaa8f12e3..8e3965c6c0fe 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -271,7 +271,7 @@ MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini")
271 .map_io = orion5x_map_io, 271 .map_io = orion5x_map_io,
272 .init_early = orion5x_init_early, 272 .init_early = orion5x_init_early,
273 .init_irq = orion5x_init_irq, 273 .init_irq = orion5x_init_irq,
274 .timer = &orion5x_timer, 274 .init_time = orion5x_timer_init,
275 .fixup = tag_fixup_mem32, 275 .fixup = tag_fixup_mem32,
276 .restart = orion5x_restart, 276 .restart = orion5x_restart,
277MACHINE_END 277MACHINE_END
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 1c16d045333e..0ec94a1f2b16 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -265,7 +265,7 @@ MACHINE_START(MSS2, "Maxtor Shared Storage II")
265 .map_io = orion5x_map_io, 265 .map_io = orion5x_map_io,
266 .init_early = orion5x_init_early, 266 .init_early = orion5x_init_early,
267 .init_irq = orion5x_init_irq, 267 .init_irq = orion5x_init_irq,
268 .timer = &orion5x_timer, 268 .init_time = orion5x_timer_init,
269 .fixup = tag_fixup_mem32, 269 .fixup = tag_fixup_mem32,
270 .restart = orion5x_restart, 270 .restart = orion5x_restart,
271MACHINE_END 271MACHINE_END
diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c
index c87fde4deeca..18143f2a9093 100644
--- a/arch/arm/mach-orion5x/mv2120-setup.c
+++ b/arch/arm/mach-orion5x/mv2120-setup.c
@@ -233,7 +233,7 @@ MACHINE_START(MV2120, "HP Media Vault mv2120")
233 .map_io = orion5x_map_io, 233 .map_io = orion5x_map_io,
234 .init_early = orion5x_init_early, 234 .init_early = orion5x_init_early,
235 .init_irq = orion5x_init_irq, 235 .init_irq = orion5x_init_irq,
236 .timer = &orion5x_timer, 236 .init_time = orion5x_timer_init,
237 .fixup = tag_fixup_mem32, 237 .fixup = tag_fixup_mem32,
238 .restart = orion5x_restart, 238 .restart = orion5x_restart,
239MACHINE_END 239MACHINE_END
diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c
index 3506f16c0bf2..282e503b003e 100644
--- a/arch/arm/mach-orion5x/net2big-setup.c
+++ b/arch/arm/mach-orion5x/net2big-setup.c
@@ -425,7 +425,7 @@ MACHINE_START(NET2BIG, "LaCie 2Big Network")
425 .map_io = orion5x_map_io, 425 .map_io = orion5x_map_io,
426 .init_early = orion5x_init_early, 426 .init_early = orion5x_init_early,
427 .init_irq = orion5x_init_irq, 427 .init_irq = orion5x_init_irq,
428 .timer = &orion5x_timer, 428 .init_time = orion5x_timer_init,
429 .fixup = tag_fixup_mem32, 429 .fixup = tag_fixup_mem32,
430 .restart = orion5x_restart, 430 .restart = orion5x_restart,
431MACHINE_END 431MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index 9b1c95310291..d6e72f672afb 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -171,7 +171,7 @@ MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
171 .map_io = orion5x_map_io, 171 .map_io = orion5x_map_io,
172 .init_early = orion5x_init_early, 172 .init_early = orion5x_init_early,
173 .init_irq = orion5x_init_irq, 173 .init_irq = orion5x_init_irq,
174 .timer = &orion5x_timer, 174 .init_time = orion5x_timer_init,
175 .fixup = tag_fixup_mem32, 175 .fixup = tag_fixup_mem32,
176 .restart = orion5x_restart, 176 .restart = orion5x_restart,
177MACHINE_END 177MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index 51ba2b81a10b..c8b7913310e5 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -183,7 +183,7 @@ MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
183 .map_io = orion5x_map_io, 183 .map_io = orion5x_map_io,
184 .init_early = orion5x_init_early, 184 .init_early = orion5x_init_early,
185 .init_irq = orion5x_init_irq, 185 .init_irq = orion5x_init_irq,
186 .timer = &orion5x_timer, 186 .init_time = orion5x_timer_init,
187 .fixup = tag_fixup_mem32, 187 .fixup = tag_fixup_mem32,
188 .restart = orion5x_restart, 188 .restart = orion5x_restart,
189MACHINE_END 189MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 0a56b9444f1b..f9e156725d7c 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -281,6 +281,6 @@ MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
281 .map_io = orion5x_map_io, 281 .map_io = orion5x_map_io,
282 .init_early = orion5x_init_early, 282 .init_early = orion5x_init_early,
283 .init_irq = orion5x_init_irq, 283 .init_irq = orion5x_init_irq,
284 .timer = &orion5x_timer, 284 .init_time = orion5x_timer_init,
285 .restart = orion5x_restart, 285 .restart = orion5x_restart,
286MACHINE_END 286MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index ed50910b08a4..78a1e6ab1b9d 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -123,7 +123,7 @@ MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
123 .map_io = orion5x_map_io, 123 .map_io = orion5x_map_io,
124 .init_early = orion5x_init_early, 124 .init_early = orion5x_init_early,
125 .init_irq = orion5x_init_irq, 125 .init_irq = orion5x_init_irq,
126 .timer = &orion5x_timer, 126 .init_time = orion5x_timer_init,
127 .fixup = tag_fixup_mem32, 127 .fixup = tag_fixup_mem32,
128 .restart = orion5x_restart, 128 .restart = orion5x_restart,
129MACHINE_END 129MACHINE_END
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 90e571dc4deb..acc0877ec1c9 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -361,7 +361,7 @@ MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live")
361 .map_io = orion5x_map_io, 361 .map_io = orion5x_map_io,
362 .init_early = orion5x_init_early, 362 .init_early = orion5x_init_early,
363 .init_irq = orion5x_init_irq, 363 .init_irq = orion5x_init_irq,
364 .timer = &orion5x_timer, 364 .init_time = orion5x_timer_init,
365 .fixup = tag_fixup_mem32, 365 .fixup = tag_fixup_mem32,
366 .restart = orion5x_restart, 366 .restart = orion5x_restart,
367MACHINE_END 367MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index b184f680e0db..9c17f0c2b488 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -326,7 +326,7 @@ MACHINE_START(TS209, "QNAP TS-109/TS-209")
326 .map_io = orion5x_map_io, 326 .map_io = orion5x_map_io,
327 .init_early = orion5x_init_early, 327 .init_early = orion5x_init_early,
328 .init_irq = orion5x_init_irq, 328 .init_irq = orion5x_init_irq,
329 .timer = &orion5x_timer, 329 .init_time = orion5x_timer_init,
330 .fixup = tag_fixup_mem32, 330 .fixup = tag_fixup_mem32,
331 .restart = orion5x_restart, 331 .restart = orion5x_restart,
332MACHINE_END 332MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index a5c2e64c4ece..8cc5ab6c503e 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -315,7 +315,7 @@ MACHINE_START(TS409, "QNAP TS-409")
315 .map_io = orion5x_map_io, 315 .map_io = orion5x_map_io,
316 .init_early = orion5x_init_early, 316 .init_early = orion5x_init_early,
317 .init_irq = orion5x_init_irq, 317 .init_irq = orion5x_init_irq,
318 .timer = &orion5x_timer, 318 .init_time = orion5x_timer_init,
319 .fixup = tag_fixup_mem32, 319 .fixup = tag_fixup_mem32,
320 .restart = orion5x_restart, 320 .restart = orion5x_restart,
321MACHINE_END 321MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index b0727dcd1ef9..e960855d32ac 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -619,6 +619,6 @@ MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
619 .map_io = ts78xx_map_io, 619 .map_io = ts78xx_map_io,
620 .init_early = orion5x_init_early, 620 .init_early = orion5x_init_early,
621 .init_irq = orion5x_init_irq, 621 .init_irq = orion5x_init_irq,
622 .timer = &orion5x_timer, 622 .init_time = orion5x_timer_init,
623 .restart = orion5x_restart, 623 .restart = orion5x_restart,
624MACHINE_END 624MACHINE_END
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index 754c12b6abf0..66552ca7e05d 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -176,7 +176,7 @@ MACHINE_START(WNR854T, "Netgear WNR854T")
176 .map_io = orion5x_map_io, 176 .map_io = orion5x_map_io,
177 .init_early = orion5x_init_early, 177 .init_early = orion5x_init_early,
178 .init_irq = orion5x_init_irq, 178 .init_irq = orion5x_init_irq,
179 .timer = &orion5x_timer, 179 .init_time = orion5x_timer_init,
180 .fixup = tag_fixup_mem32, 180 .fixup = tag_fixup_mem32,
181 .restart = orion5x_restart, 181 .restart = orion5x_restart,
182MACHINE_END 182MACHINE_END
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index 45c21251eb1e..2c5408e2e689 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -264,7 +264,7 @@ MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
264 .map_io = orion5x_map_io, 264 .map_io = orion5x_map_io,
265 .init_early = orion5x_init_early, 265 .init_early = orion5x_init_early,
266 .init_irq = orion5x_init_irq, 266 .init_irq = orion5x_init_irq,
267 .timer = &orion5x_timer, 267 .init_time = orion5x_timer_init,
268 .fixup = tag_fixup_mem32, 268 .fixup = tag_fixup_mem32,
269 .restart = orion5x_restart, 269 .restart = orion5x_restart,
270MACHINE_END 270MACHINE_END
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index f6c0849af5e9..70b441ad1d18 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/delay.h> 10#include <linux/delay.h>
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <linux/irqchip.h>
12#include <linux/irqdomain.h> 13#include <linux/irqdomain.h>
13#include <linux/of.h> 14#include <linux/of.h>
14#include <linux/of_address.h> 15#include <linux/of_address.h>
@@ -17,7 +18,6 @@
17#include <linux/dw_apb_timer.h> 18#include <linux/dw_apb_timer.h>
18 19
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
20#include <asm/hardware/vic.h>
21#include <asm/mach/map.h> 21#include <asm/mach/map.h>
22 22
23#include "common.h" 23#include "common.h"
@@ -70,16 +70,6 @@ static const char *picoxcell_dt_match[] = {
70 NULL 70 NULL
71}; 71};
72 72
73static const struct of_device_id vic_of_match[] __initconst = {
74 { .compatible = "arm,pl192-vic", .data = vic_of_init, },
75 { /* Sentinel */ }
76};
77
78static void __init picoxcell_init_irq(void)
79{
80 of_irq_init(vic_of_match);
81}
82
83static void picoxcell_wdt_restart(char mode, const char *cmd) 73static void picoxcell_wdt_restart(char mode, const char *cmd)
84{ 74{
85 /* 75 /*
@@ -97,9 +87,8 @@ static void picoxcell_wdt_restart(char mode, const char *cmd)
97DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") 87DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
98 .map_io = picoxcell_map_io, 88 .map_io = picoxcell_map_io,
99 .nr_irqs = NR_IRQS_LEGACY, 89 .nr_irqs = NR_IRQS_LEGACY,
100 .init_irq = picoxcell_init_irq, 90 .init_irq = irqchip_init,
101 .handle_irq = vic_handle_irq, 91 .init_time = dw_apb_timer_init,
102 .timer = &dw_apb_timer,
103 .init_machine = picoxcell_init_machine, 92 .init_machine = picoxcell_init_machine,
104 .dt_compat = picoxcell_dt_match, 93 .dt_compat = picoxcell_dt_match,
105 .restart = picoxcell_wdt_restart, 94 .restart = picoxcell_wdt_restart,
diff --git a/arch/arm/mach-picoxcell/common.h b/arch/arm/mach-picoxcell/common.h
index a65cb02f84c8..481b42a4ef15 100644
--- a/arch/arm/mach-picoxcell/common.h
+++ b/arch/arm/mach-picoxcell/common.h
@@ -12,6 +12,6 @@
12 12
13#include <asm/mach/time.h> 13#include <asm/mach/time.h>
14 14
15extern struct sys_timer dw_apb_timer; 15extern void dw_apb_timer_init(void);
16 16
17#endif /* __PICOXCELL_COMMON_H__ */ 17#endif /* __PICOXCELL_COMMON_H__ */
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig
index 558ccfb8d458..4f7379fe01e2 100644
--- a/arch/arm/mach-prima2/Kconfig
+++ b/arch/arm/mach-prima2/Kconfig
@@ -11,6 +11,16 @@ config ARCH_PRIMA2
11 help 11 help
12 Support for CSR SiRFSoC ARM Cortex A9 Platform 12 Support for CSR SiRFSoC ARM Cortex A9 Platform
13 13
14config ARCH_MARCO
15 bool "CSR SiRFSoC MARCO ARM Cortex A9 Platform"
16 default y
17 select ARM_GIC
18 select CPU_V7
19 select HAVE_SMP
20 select SMP_ON_UP
21 help
22 Support for CSR SiRFSoC ARM Cortex A9 Platform
23
14endmenu 24endmenu
15 25
16config SIRF_IRQ 26config SIRF_IRQ
diff --git a/arch/arm/mach-prima2/Makefile b/arch/arm/mach-prima2/Makefile
index fc9ce22e2b5a..bfe360cbd177 100644
--- a/arch/arm/mach-prima2/Makefile
+++ b/arch/arm/mach-prima2/Makefile
@@ -1,4 +1,3 @@
1obj-y := timer.o
2obj-y += rstc.o 1obj-y += rstc.o
3obj-y += common.o 2obj-y += common.o
4obj-y += rtciobrg.o 3obj-y += rtciobrg.o
@@ -6,3 +5,7 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o
6obj-$(CONFIG_CACHE_L2X0) += l2x0.o 5obj-$(CONFIG_CACHE_L2X0) += l2x0.o
7obj-$(CONFIG_SUSPEND) += pm.o sleep.o 6obj-$(CONFIG_SUSPEND) += pm.o sleep.o
8obj-$(CONFIG_SIRF_IRQ) += irq.o 7obj-$(CONFIG_SIRF_IRQ) += irq.o
8obj-$(CONFIG_SMP) += platsmp.o headsmp.o
9obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
10obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o
11obj-$(CONFIG_ARCH_MARCO) += timer-marco.o
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c
index f25a54194639..2d57aa479a7b 100644
--- a/arch/arm/mach-prima2/common.c
+++ b/arch/arm/mach-prima2/common.c
@@ -8,6 +8,7 @@
8 8
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/irqchip.h>
11#include <asm/sizes.h> 12#include <asm/sizes.h>
12#include <asm/mach-types.h> 13#include <asm/mach-types.h>
13#include <asm/mach/arch.h> 14#include <asm/mach/arch.h>
@@ -30,6 +31,12 @@ void __init sirfsoc_init_late(void)
30 sirfsoc_pm_init(); 31 sirfsoc_pm_init();
31} 32}
32 33
34static __init void sirfsoc_map_io(void)
35{
36 sirfsoc_map_lluart();
37 sirfsoc_map_scu();
38}
39
33#ifdef CONFIG_ARCH_PRIMA2 40#ifdef CONFIG_ARCH_PRIMA2
34static const char *prima2_dt_match[] __initdata = { 41static const char *prima2_dt_match[] __initdata = {
35 "sirf,prima2", 42 "sirf,prima2",
@@ -38,9 +45,12 @@ static const char *prima2_dt_match[] __initdata = {
38 45
39DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)") 46DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
40 /* Maintainer: Barry Song <baohua.song@csr.com> */ 47 /* Maintainer: Barry Song <baohua.song@csr.com> */
41 .map_io = sirfsoc_map_lluart, 48 .map_io = sirfsoc_map_io,
42 .init_irq = sirfsoc_of_irq_init, 49 .init_irq = sirfsoc_of_irq_init,
43 .timer = &sirfsoc_timer, 50 .init_time = sirfsoc_prima2_timer_init,
51#ifdef CONFIG_MULTI_IRQ_HANDLER
52 .handle_irq = sirfsoc_handle_irq,
53#endif
44 .dma_zone_size = SZ_256M, 54 .dma_zone_size = SZ_256M,
45 .init_machine = sirfsoc_mach_init, 55 .init_machine = sirfsoc_mach_init,
46 .init_late = sirfsoc_init_late, 56 .init_late = sirfsoc_init_late,
@@ -48,3 +58,22 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
48 .restart = sirfsoc_restart, 58 .restart = sirfsoc_restart,
49MACHINE_END 59MACHINE_END
50#endif 60#endif
61
62#ifdef CONFIG_ARCH_MARCO
63static const char *marco_dt_match[] __initdata = {
64 "sirf,marco",
65 NULL
66};
67
68DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)")
69 /* Maintainer: Barry Song <baohua.song@csr.com> */
70 .smp = smp_ops(sirfsoc_smp_ops),
71 .map_io = sirfsoc_map_io,
72 .init_irq = irqchip_init,
73 .init_time = sirfsoc_marco_timer_init,
74 .init_machine = sirfsoc_mach_init,
75 .init_late = sirfsoc_init_late,
76 .dt_compat = marco_dt_match,
77 .restart = sirfsoc_restart,
78MACHINE_END
79#endif
diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h
index 60d826fc2185..b7c26b62e4a7 100644
--- a/arch/arm/mach-prima2/common.h
+++ b/arch/arm/mach-prima2/common.h
@@ -11,12 +11,19 @@
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/mach/time.h> 13#include <asm/mach/time.h>
14#include <asm/exception.h>
14 15
15extern struct sys_timer sirfsoc_timer; 16extern void sirfsoc_prima2_timer_init(void);
17extern void sirfsoc_marco_timer_init(void);
18
19extern struct smp_operations sirfsoc_smp_ops;
20extern void sirfsoc_secondary_startup(void);
21extern void sirfsoc_cpu_die(unsigned int cpu);
16 22
17extern void __init sirfsoc_of_irq_init(void); 23extern void __init sirfsoc_of_irq_init(void);
18extern void __init sirfsoc_of_clk_init(void); 24extern void __init sirfsoc_of_clk_init(void);
19extern void sirfsoc_restart(char, const char *); 25extern void sirfsoc_restart(char, const char *);
26extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs);
20 27
21#ifndef CONFIG_DEBUG_LL 28#ifndef CONFIG_DEBUG_LL
22static inline void sirfsoc_map_lluart(void) {} 29static inline void sirfsoc_map_lluart(void) {}
@@ -24,6 +31,12 @@ static inline void sirfsoc_map_lluart(void) {}
24extern void __init sirfsoc_map_lluart(void); 31extern void __init sirfsoc_map_lluart(void);
25#endif 32#endif
26 33
34#ifndef CONFIG_SMP
35static inline void sirfsoc_map_scu(void) {}
36#else
37extern void sirfsoc_map_scu(void);
38#endif
39
27#ifdef CONFIG_SUSPEND 40#ifdef CONFIG_SUSPEND
28extern int sirfsoc_pm_init(void); 41extern int sirfsoc_pm_init(void);
29#else 42#else
diff --git a/arch/arm/mach-prima2/headsmp.S b/arch/arm/mach-prima2/headsmp.S
new file mode 100644
index 000000000000..6ec19d51a271
--- /dev/null
+++ b/arch/arm/mach-prima2/headsmp.S
@@ -0,0 +1,79 @@
1/*
2 * Entry of the second core for CSR Marco dual-core SMP SoCs
3 *
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#include <linux/linkage.h>
10#include <linux/init.h>
11
12 __INIT
13/*
14 * Cold boot and hardware reset show different behaviour,
15 * system will be always panic if we warm-reset the board
16 * Here we invalidate L1 of CPU1 to make sure there isn't
17 * uninitialized data written into memory later
18 */
19ENTRY(v7_invalidate_l1)
20 mov r0, #0
21 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
22 mcr p15, 2, r0, c0, c0, 0
23 mrc p15, 1, r0, c0, c0, 0
24
25 ldr r1, =0x7fff
26 and r2, r1, r0, lsr #13
27
28 ldr r1, =0x3ff
29
30 and r3, r1, r0, lsr #3 @ NumWays - 1
31 add r2, r2, #1 @ NumSets
32
33 and r0, r0, #0x7
34 add r0, r0, #4 @ SetShift
35
36 clz r1, r3 @ WayShift
37 add r4, r3, #1 @ NumWays
381: sub r2, r2, #1 @ NumSets--
39 mov r3, r4 @ Temp = NumWays
402: subs r3, r3, #1 @ Temp--
41 mov r5, r3, lsl r1
42 mov r6, r2, lsl r0
43 orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
44 mcr p15, 0, r5, c7, c6, 2
45 bgt 2b
46 cmp r2, #0
47 bgt 1b
48 dsb
49 isb
50 mov pc, lr
51ENDPROC(v7_invalidate_l1)
52
53/*
54 * SIRFSOC specific entry point for secondary CPUs. This provides
55 * a "holding pen" into which all secondary cores are held until we're
56 * ready for them to initialise.
57 */
58ENTRY(sirfsoc_secondary_startup)
59 bl v7_invalidate_l1
60 mrc p15, 0, r0, c0, c0, 5
61 and r0, r0, #15
62 adr r4, 1f
63 ldmia r4, {r5, r6}
64 sub r4, r4, r5
65 add r6, r6, r4
66pen: ldr r7, [r6]
67 cmp r7, r0
68 bne pen
69
70 /*
71 * we've been released from the holding pen: secondary_stack
72 * should now contain the SVC stack for this core
73 */
74 b secondary_startup
75ENDPROC(sirfsoc_secondary_startup)
76
77 .align
781: .long .
79 .long pen_release
diff --git a/arch/arm/mach-prima2/hotplug.c b/arch/arm/mach-prima2/hotplug.c
new file mode 100644
index 000000000000..97c1ee586442
--- /dev/null
+++ b/arch/arm/mach-prima2/hotplug.c
@@ -0,0 +1,41 @@
1/*
2 * CPU hotplug support for CSR Marco dual-core SMP SoCs
3 *
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#include <linux/kernel.h>
10#include <linux/errno.h>
11#include <linux/smp.h>
12
13#include <asm/cacheflush.h>
14#include <asm/smp_plat.h>
15
16static inline void platform_do_lowpower(unsigned int cpu)
17{
18 flush_cache_all();
19
20 /* we put the platform to just WFI */
21 for (;;) {
22 __asm__ __volatile__("dsb\n\t" "wfi\n\t"
23 : : : "memory");
24 if (pen_release == cpu_logical_map(cpu)) {
25 /*
26 * OK, proper wakeup, we're done
27 */
28 break;
29 }
30 }
31}
32
33/*
34 * platform-specific code to shutdown a CPU
35 *
36 * Called with IRQs disabled
37 */
38void sirfsoc_cpu_die(unsigned int cpu)
39{
40 platform_do_lowpower(cpu);
41}
diff --git a/arch/arm/mach-prima2/include/mach/irqs.h b/arch/arm/mach-prima2/include/mach/irqs.h
index f6014a07541f..b778a0f248ed 100644
--- a/arch/arm/mach-prima2/include/mach/irqs.h
+++ b/arch/arm/mach-prima2/include/mach/irqs.h
@@ -10,8 +10,8 @@
10#define __ASM_ARCH_IRQS_H 10#define __ASM_ARCH_IRQS_H
11 11
12#define SIRFSOC_INTENAL_IRQ_START 0 12#define SIRFSOC_INTENAL_IRQ_START 0
13#define SIRFSOC_INTENAL_IRQ_END 59 13#define SIRFSOC_INTENAL_IRQ_END 127
14#define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1) 14#define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1)
15#define NR_IRQS 220 15#define NR_IRQS 288
16 16
17#endif 17#endif
diff --git a/arch/arm/mach-prima2/include/mach/uart.h b/arch/arm/mach-prima2/include/mach/uart.h
index c98b4d5ac24a..c10510d01a44 100644
--- a/arch/arm/mach-prima2/include/mach/uart.h
+++ b/arch/arm/mach-prima2/include/mach/uart.h
@@ -10,7 +10,13 @@
10#define __MACH_PRIMA2_SIRFSOC_UART_H 10#define __MACH_PRIMA2_SIRFSOC_UART_H
11 11
12/* UART-1: used as serial debug port */ 12/* UART-1: used as serial debug port */
13#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
13#define SIRFSOC_UART1_PA_BASE 0xb0060000 14#define SIRFSOC_UART1_PA_BASE 0xb0060000
15#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1)
16#define SIRFSOC_UART1_PA_BASE 0xcc060000
17#else
18#define SIRFSOC_UART1_PA_BASE 0
19#endif
14#define SIRFSOC_UART1_VA_BASE SIRFSOC_VA(0x060000) 20#define SIRFSOC_UART1_VA_BASE SIRFSOC_VA(0x060000)
15#define SIRFSOC_UART1_SIZE SZ_4K 21#define SIRFSOC_UART1_SIZE SZ_4K
16 22
diff --git a/arch/arm/mach-prima2/include/mach/uncompress.h b/arch/arm/mach-prima2/include/mach/uncompress.h
index 0c898fcf909c..15f3edcfbb47 100644
--- a/arch/arm/mach-prima2/include/mach/uncompress.h
+++ b/arch/arm/mach-prima2/include/mach/uncompress.h
@@ -25,6 +25,9 @@ static __inline__ void putc(char c)
25 * during kernel decompression, all mappings are flat: 25 * during kernel decompression, all mappings are flat:
26 * virt_addr == phys_addr 26 * virt_addr == phys_addr
27 */ 27 */
28 if (!SIRFSOC_UART1_PA_BASE)
29 return;
30
28 while (__raw_readl((void __iomem *)SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_STATUS) 31 while (__raw_readl((void __iomem *)SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_STATUS)
29 & SIRFSOC_UART1_TXFIFO_FULL) 32 & SIRFSOC_UART1_TXFIFO_FULL)
30 barrier(); 33 barrier();
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c
index 7dee9176e77a..6c0f3e9c43fb 100644
--- a/arch/arm/mach-prima2/irq.c
+++ b/arch/arm/mach-prima2/irq.c
@@ -9,17 +9,19 @@
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/io.h> 10#include <linux/io.h>
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <mach/hardware.h>
13#include <asm/mach/irq.h>
14#include <linux/of.h> 12#include <linux/of.h>
15#include <linux/of_address.h> 13#include <linux/of_address.h>
16#include <linux/irqdomain.h> 14#include <linux/irqdomain.h>
17#include <linux/syscore_ops.h> 15#include <linux/syscore_ops.h>
16#include <asm/mach/irq.h>
17#include <asm/exception.h>
18#include <mach/hardware.h>
18 19
19#define SIRFSOC_INT_RISC_MASK0 0x0018 20#define SIRFSOC_INT_RISC_MASK0 0x0018
20#define SIRFSOC_INT_RISC_MASK1 0x001C 21#define SIRFSOC_INT_RISC_MASK1 0x001C
21#define SIRFSOC_INT_RISC_LEVEL0 0x0020 22#define SIRFSOC_INT_RISC_LEVEL0 0x0020
22#define SIRFSOC_INT_RISC_LEVEL1 0x0024 23#define SIRFSOC_INT_RISC_LEVEL1 0x0024
24#define SIRFSOC_INIT_IRQ_ID 0x0038
23 25
24void __iomem *sirfsoc_intc_base; 26void __iomem *sirfsoc_intc_base;
25 27
@@ -52,6 +54,16 @@ static __init void sirfsoc_irq_init(void)
52 writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_MASK1); 54 writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_MASK1);
53} 55}
54 56
57asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs)
58{
59 u32 irqstat, irqnr;
60
61 irqstat = readl_relaxed(sirfsoc_intc_base + SIRFSOC_INIT_IRQ_ID);
62 irqnr = irqstat & 0xff;
63
64 handle_IRQ(irqnr, regs);
65}
66
55static struct of_device_id intc_ids[] = { 67static struct of_device_id intc_ids[] = {
56 { .compatible = "sirf,prima2-intc" }, 68 { .compatible = "sirf,prima2-intc" },
57 {}, 69 {},
diff --git a/arch/arm/mach-prima2/l2x0.c b/arch/arm/mach-prima2/l2x0.c
index c99837797d76..cbcbe9cb094c 100644
--- a/arch/arm/mach-prima2/l2x0.c
+++ b/arch/arm/mach-prima2/l2x0.c
@@ -11,19 +11,38 @@
11#include <linux/of.h> 11#include <linux/of.h>
12#include <asm/hardware/cache-l2x0.h> 12#include <asm/hardware/cache-l2x0.h>
13 13
14static struct of_device_id prima2_l2x0_ids[] = { 14struct l2x0_aux
15 { .compatible = "sirf,prima2-pl310-cache" }, 15{
16 u32 val;
17 u32 mask;
18};
19
20static struct l2x0_aux prima2_l2x0_aux __initconst = {
21 .val = 2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT,
22 .mask = 0,
23};
24
25static struct l2x0_aux marco_l2x0_aux __initconst = {
26 .val = (2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
27 (1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT),
28 .mask = L2X0_AUX_CTRL_MASK,
29};
30
31static struct of_device_id sirf_l2x0_ids[] __initconst = {
32 { .compatible = "sirf,prima2-pl310-cache", .data = &prima2_l2x0_aux, },
33 { .compatible = "sirf,marco-pl310-cache", .data = &marco_l2x0_aux, },
16 {}, 34 {},
17}; 35};
18 36
19static int __init sirfsoc_l2x0_init(void) 37static int __init sirfsoc_l2x0_init(void)
20{ 38{
21 struct device_node *np; 39 struct device_node *np;
40 const struct l2x0_aux *aux;
22 41
23 np = of_find_matching_node(NULL, prima2_l2x0_ids); 42 np = of_find_matching_node(NULL, sirf_l2x0_ids);
24 if (np) { 43 if (np) {
25 pr_info("Initializing prima2 L2 cache\n"); 44 aux = of_match_node(sirf_l2x0_ids, np)->data;
26 return l2x0_of_init(0x40000, 0); 45 return l2x0_of_init(aux->val, aux->mask);
27 } 46 }
28 47
29 return 0; 48 return 0;
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c
new file mode 100644
index 000000000000..4b788310f6a6
--- /dev/null
+++ b/arch/arm/mach-prima2/platsmp.c
@@ -0,0 +1,157 @@
1/*
2 * plat smp support for CSR Marco dual-core SMP SoCs
3 *
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#include <linux/init.h>
10#include <linux/smp.h>
11#include <linux/delay.h>
12#include <linux/of.h>
13#include <linux/of_address.h>
14#include <linux/irqchip/arm-gic.h>
15#include <asm/page.h>
16#include <asm/mach/map.h>
17#include <asm/smp_plat.h>
18#include <asm/smp_scu.h>
19#include <asm/cacheflush.h>
20#include <asm/cputype.h>
21#include <mach/map.h>
22
23#include "common.h"
24
25static void __iomem *scu_base;
26static void __iomem *rsc_base;
27
28static DEFINE_SPINLOCK(boot_lock);
29
30static struct map_desc scu_io_desc __initdata = {
31 .length = SZ_4K,
32 .type = MT_DEVICE,
33};
34
35void __init sirfsoc_map_scu(void)
36{
37 unsigned long base;
38
39 /* Get SCU base */
40 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
41
42 scu_io_desc.virtual = SIRFSOC_VA(base);
43 scu_io_desc.pfn = __phys_to_pfn(base);
44 iotable_init(&scu_io_desc, 1);
45
46 scu_base = (void __iomem *)SIRFSOC_VA(base);
47}
48
49static void __cpuinit sirfsoc_secondary_init(unsigned int cpu)
50{
51 /*
52 * if any interrupts are already enabled for the primary
53 * core (e.g. timer irq), then they will not have been enabled
54 * for us: do so
55 */
56 gic_secondary_init(0);
57
58 /*
59 * let the primary processor know we're out of the
60 * pen, then head off into the C entry point
61 */
62 pen_release = -1;
63 smp_wmb();
64
65 /*
66 * Synchronise with the boot thread.
67 */
68 spin_lock(&boot_lock);
69 spin_unlock(&boot_lock);
70}
71
72static struct of_device_id rsc_ids[] = {
73 { .compatible = "sirf,marco-rsc" },
74 {},
75};
76
77static int __cpuinit sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
78{
79 unsigned long timeout;
80 struct device_node *np;
81
82 np = of_find_matching_node(NULL, rsc_ids);
83 if (!np)
84 return -ENODEV;
85
86 rsc_base = of_iomap(np, 0);
87 if (!rsc_base)
88 return -ENOMEM;
89
90 /*
91 * write the address of secondary startup into the sram register
92 * at offset 0x2C, then write the magic number 0x3CAF5D62 to the
93 * RSC register at offset 0x28, which is what boot rom code is
94 * waiting for. This would wake up the secondary core from WFE
95 */
96#define SIRFSOC_CPU1_JUMPADDR_OFFSET 0x2C
97 __raw_writel(virt_to_phys(sirfsoc_secondary_startup),
98 rsc_base + SIRFSOC_CPU1_JUMPADDR_OFFSET);
99
100#define SIRFSOC_CPU1_WAKEMAGIC_OFFSET 0x28
101 __raw_writel(0x3CAF5D62,
102 rsc_base + SIRFSOC_CPU1_WAKEMAGIC_OFFSET);
103
104 /* make sure write buffer is drained */
105 mb();
106
107 spin_lock(&boot_lock);
108
109 /*
110 * The secondary processor is waiting to be released from
111 * the holding pen - release it, then wait for it to flag
112 * that it has been released by resetting pen_release.
113 *
114 * Note that "pen_release" is the hardware CPU ID, whereas
115 * "cpu" is Linux's internal ID.
116 */
117 pen_release = cpu_logical_map(cpu);
118 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
119 outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
120
121 /*
122 * Send the secondary CPU SEV, thereby causing the boot monitor to read
123 * the JUMPADDR and WAKEMAGIC, and branch to the address found there.
124 */
125 dsb_sev();
126
127 timeout = jiffies + (1 * HZ);
128 while (time_before(jiffies, timeout)) {
129 smp_rmb();
130 if (pen_release == -1)
131 break;
132
133 udelay(10);
134 }
135
136 /*
137 * now the secondary core is starting up let it run its
138 * calibrations, then wait for it to finish
139 */
140 spin_unlock(&boot_lock);
141
142 return pen_release != -1 ? -ENOSYS : 0;
143}
144
145static void __init sirfsoc_smp_prepare_cpus(unsigned int max_cpus)
146{
147 scu_enable(scu_base);
148}
149
150struct smp_operations sirfsoc_smp_ops __initdata = {
151 .smp_prepare_cpus = sirfsoc_smp_prepare_cpus,
152 .smp_secondary_init = sirfsoc_secondary_init,
153 .smp_boot_secondary = sirfsoc_boot_secondary,
154#ifdef CONFIG_HOTPLUG_CPU
155 .cpu_die = sirfsoc_cpu_die,
156#endif
157};
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index 762adb73ab7c..435019ca0a48 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -19,6 +19,7 @@ static DEFINE_MUTEX(rstc_lock);
19 19
20static struct of_device_id rstc_ids[] = { 20static struct of_device_id rstc_ids[] = {
21 { .compatible = "sirf,prima2-rstc" }, 21 { .compatible = "sirf,prima2-rstc" },
22 { .compatible = "sirf,marco-rstc" },
22 {}, 23 {},
23}; 24};
24 25
@@ -42,27 +43,37 @@ early_initcall(sirfsoc_of_rstc_init);
42 43
43int sirfsoc_reset_device(struct device *dev) 44int sirfsoc_reset_device(struct device *dev)
44{ 45{
45 const unsigned int *prop = of_get_property(dev->of_node, "reset-bit", NULL); 46 u32 reset_bit;
46 unsigned int reset_bit;
47 47
48 if (!prop) 48 if (of_property_read_u32(dev->of_node, "reset-bit", &reset_bit))
49 return -ENODEV; 49 return -EINVAL;
50
51 reset_bit = be32_to_cpup(prop);
52 50
53 mutex_lock(&rstc_lock); 51 mutex_lock(&rstc_lock);
54 52
55 /* 53 if (of_device_is_compatible(dev->of_node, "sirf,prima2-rstc")) {
56 * Writing 1 to this bit resets corresponding block. Writing 0 to this 54 /*
57 * bit de-asserts reset signal of the corresponding block. 55 * Writing 1 to this bit resets corresponding block. Writing 0 to this
58 * datasheet doesn't require explicit delay between the set and clear 56 * bit de-asserts reset signal of the corresponding block.
59 * of reset bit. it could be shorter if tests pass. 57 * datasheet doesn't require explicit delay between the set and clear
60 */ 58 * of reset bit. it could be shorter if tests pass.
61 writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | reset_bit, 59 */
62 sirfsoc_rstc_base + (reset_bit / 32) * 4); 60 writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | reset_bit,
63 msleep(10); 61 sirfsoc_rstc_base + (reset_bit / 32) * 4);
64 writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~reset_bit, 62 msleep(10);
65 sirfsoc_rstc_base + (reset_bit / 32) * 4); 63 writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~reset_bit,
64 sirfsoc_rstc_base + (reset_bit / 32) * 4);
65 } else {
66 /*
67 * For MARCO and POLO
68 * Writing 1 to SET register resets corresponding block. Writing 1 to CLEAR
69 * register de-asserts reset signal of the corresponding block.
70 * datasheet doesn't require explicit delay between the set and clear
71 * of reset bit. it could be shorter if tests pass.
72 */
73 writel(reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8);
74 msleep(10);
75 writel(reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4);
76 }
66 77
67 mutex_unlock(&rstc_lock); 78 mutex_unlock(&rstc_lock);
68 79
diff --git a/arch/arm/mach-prima2/rtciobrg.c b/arch/arm/mach-prima2/rtciobrg.c
index 557353602130..9f2da2eec4dc 100644
--- a/arch/arm/mach-prima2/rtciobrg.c
+++ b/arch/arm/mach-prima2/rtciobrg.c
@@ -104,6 +104,7 @@ EXPORT_SYMBOL_GPL(sirfsoc_rtc_iobrg_writel);
104 104
105static const struct of_device_id rtciobrg_ids[] = { 105static const struct of_device_id rtciobrg_ids[] = {
106 { .compatible = "sirf,prima2-rtciobg" }, 106 { .compatible = "sirf,prima2-rtciobg" },
107 { .compatible = "sirf,marco-rtciobg" },
107 {} 108 {}
108}; 109};
109 110
diff --git a/arch/arm/mach-prima2/timer-marco.c b/arch/arm/mach-prima2/timer-marco.c
new file mode 100644
index 000000000000..f4eea2e97eb0
--- /dev/null
+++ b/arch/arm/mach-prima2/timer-marco.c
@@ -0,0 +1,316 @@
1/*
2 * System timer for CSR SiRFprimaII
3 *
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#include <linux/kernel.h>
10#include <linux/interrupt.h>
11#include <linux/clockchips.h>
12#include <linux/clocksource.h>
13#include <linux/bitops.h>
14#include <linux/irq.h>
15#include <linux/clk.h>
16#include <linux/slab.h>
17#include <linux/of.h>
18#include <linux/of_irq.h>
19#include <linux/of_address.h>
20#include <asm/sched_clock.h>
21#include <asm/localtimer.h>
22#include <asm/mach/time.h>
23
24#include "common.h"
25
26#define SIRFSOC_TIMER_32COUNTER_0_CTRL 0x0000
27#define SIRFSOC_TIMER_32COUNTER_1_CTRL 0x0004
28#define SIRFSOC_TIMER_MATCH_0 0x0018
29#define SIRFSOC_TIMER_MATCH_1 0x001c
30#define SIRFSOC_TIMER_COUNTER_0 0x0048
31#define SIRFSOC_TIMER_COUNTER_1 0x004c
32#define SIRFSOC_TIMER_INTR_STATUS 0x0060
33#define SIRFSOC_TIMER_WATCHDOG_EN 0x0064
34#define SIRFSOC_TIMER_64COUNTER_CTRL 0x0068
35#define SIRFSOC_TIMER_64COUNTER_LO 0x006c
36#define SIRFSOC_TIMER_64COUNTER_HI 0x0070
37#define SIRFSOC_TIMER_64COUNTER_LOAD_LO 0x0074
38#define SIRFSOC_TIMER_64COUNTER_LOAD_HI 0x0078
39#define SIRFSOC_TIMER_64COUNTER_RLATCHED_LO 0x007c
40#define SIRFSOC_TIMER_64COUNTER_RLATCHED_HI 0x0080
41
42#define SIRFSOC_TIMER_REG_CNT 6
43
44static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
45 SIRFSOC_TIMER_WATCHDOG_EN,
46 SIRFSOC_TIMER_32COUNTER_0_CTRL,
47 SIRFSOC_TIMER_32COUNTER_1_CTRL,
48 SIRFSOC_TIMER_64COUNTER_CTRL,
49 SIRFSOC_TIMER_64COUNTER_RLATCHED_LO,
50 SIRFSOC_TIMER_64COUNTER_RLATCHED_HI,
51};
52
53static u32 sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT];
54
55static void __iomem *sirfsoc_timer_base;
56static void __init sirfsoc_of_timer_map(void);
57
58/* disable count and interrupt */
59static inline void sirfsoc_timer_count_disable(int idx)
60{
61 writel_relaxed(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL + 4 * idx) & ~0x7,
62 sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL + 4 * idx);
63}
64
65/* enable count and interrupt */
66static inline void sirfsoc_timer_count_enable(int idx)
67{
68 writel_relaxed(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL + 4 * idx) | 0x7,
69 sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL + 4 * idx);
70}
71
72/* timer interrupt handler */
73static irqreturn_t sirfsoc_timer_interrupt(int irq, void *dev_id)
74{
75 struct clock_event_device *ce = dev_id;
76 int cpu = smp_processor_id();
77
78 /* clear timer interrupt */
79 writel_relaxed(BIT(cpu), sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS);
80
81 if (ce->mode == CLOCK_EVT_MODE_ONESHOT)
82 sirfsoc_timer_count_disable(cpu);
83
84 ce->event_handler(ce);
85
86 return IRQ_HANDLED;
87}
88
89/* read 64-bit timer counter */
90static cycle_t sirfsoc_timer_read(struct clocksource *cs)
91{
92 u64 cycles;
93
94 writel_relaxed((readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL) |
95 BIT(0)) & ~BIT(1), sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL);
96
97 cycles = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_RLATCHED_HI);
98 cycles = (cycles << 32) | readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_RLATCHED_LO);
99
100 return cycles;
101}
102
103static int sirfsoc_timer_set_next_event(unsigned long delta,
104 struct clock_event_device *ce)
105{
106 int cpu = smp_processor_id();
107
108 writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_0 +
109 4 * cpu);
110 writel_relaxed(delta, sirfsoc_timer_base + SIRFSOC_TIMER_MATCH_0 +
111 4 * cpu);
112
113 /* enable the tick */
114 sirfsoc_timer_count_enable(cpu);
115
116 return 0;
117}
118
119static void sirfsoc_timer_set_mode(enum clock_event_mode mode,
120 struct clock_event_device *ce)
121{
122 switch (mode) {
123 case CLOCK_EVT_MODE_ONESHOT:
124 /* enable in set_next_event */
125 break;
126 default:
127 break;
128 }
129
130 sirfsoc_timer_count_disable(smp_processor_id());
131}
132
133static void sirfsoc_clocksource_suspend(struct clocksource *cs)
134{
135 int i;
136
137 for (i = 0; i < SIRFSOC_TIMER_REG_CNT; i++)
138 sirfsoc_timer_reg_val[i] = readl_relaxed(sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
139}
140
141static void sirfsoc_clocksource_resume(struct clocksource *cs)
142{
143 int i;
144
145 for (i = 0; i < SIRFSOC_TIMER_REG_CNT - 2; i++)
146 writel_relaxed(sirfsoc_timer_reg_val[i], sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
147
148 writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 2],
149 sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_LOAD_LO);
150 writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 1],
151 sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_LOAD_HI);
152
153 writel_relaxed(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL) |
154 BIT(1) | BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL);
155}
156
157static struct clock_event_device sirfsoc_clockevent = {
158 .name = "sirfsoc_clockevent",
159 .rating = 200,
160 .features = CLOCK_EVT_FEAT_ONESHOT,
161 .set_mode = sirfsoc_timer_set_mode,
162 .set_next_event = sirfsoc_timer_set_next_event,
163};
164
165static struct clocksource sirfsoc_clocksource = {
166 .name = "sirfsoc_clocksource",
167 .rating = 200,
168 .mask = CLOCKSOURCE_MASK(64),
169 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
170 .read = sirfsoc_timer_read,
171 .suspend = sirfsoc_clocksource_suspend,
172 .resume = sirfsoc_clocksource_resume,
173};
174
175static struct irqaction sirfsoc_timer_irq = {
176 .name = "sirfsoc_timer0",
177 .flags = IRQF_TIMER | IRQF_NOBALANCING,
178 .handler = sirfsoc_timer_interrupt,
179 .dev_id = &sirfsoc_clockevent,
180};
181
182#ifdef CONFIG_LOCAL_TIMERS
183
184static struct irqaction sirfsoc_timer1_irq = {
185 .name = "sirfsoc_timer1",
186 .flags = IRQF_TIMER | IRQF_NOBALANCING,
187 .handler = sirfsoc_timer_interrupt,
188};
189
190static int __cpuinit sirfsoc_local_timer_setup(struct clock_event_device *ce)
191{
192 /* Use existing clock_event for cpu 0 */
193 if (!smp_processor_id())
194 return 0;
195
196 ce->irq = sirfsoc_timer1_irq.irq;
197 ce->name = "local_timer";
198 ce->features = sirfsoc_clockevent.features;
199 ce->rating = sirfsoc_clockevent.rating;
200 ce->set_mode = sirfsoc_timer_set_mode;
201 ce->set_next_event = sirfsoc_timer_set_next_event;
202 ce->shift = sirfsoc_clockevent.shift;
203 ce->mult = sirfsoc_clockevent.mult;
204 ce->max_delta_ns = sirfsoc_clockevent.max_delta_ns;
205 ce->min_delta_ns = sirfsoc_clockevent.min_delta_ns;
206
207 sirfsoc_timer1_irq.dev_id = ce;
208 BUG_ON(setup_irq(ce->irq, &sirfsoc_timer1_irq));
209 irq_set_affinity(sirfsoc_timer1_irq.irq, cpumask_of(1));
210
211 clockevents_register_device(ce);
212 return 0;
213}
214
215static void sirfsoc_local_timer_stop(struct clock_event_device *ce)
216{
217 sirfsoc_timer_count_disable(1);
218
219 remove_irq(sirfsoc_timer1_irq.irq, &sirfsoc_timer1_irq);
220}
221
222static struct local_timer_ops sirfsoc_local_timer_ops __cpuinitdata = {
223 .setup = sirfsoc_local_timer_setup,
224 .stop = sirfsoc_local_timer_stop,
225};
226#endif /* CONFIG_LOCAL_TIMERS */
227
228static void __init sirfsoc_clockevent_init(void)
229{
230 clockevents_calc_mult_shift(&sirfsoc_clockevent, CLOCK_TICK_RATE, 60);
231
232 sirfsoc_clockevent.max_delta_ns =
233 clockevent_delta2ns(-2, &sirfsoc_clockevent);
234 sirfsoc_clockevent.min_delta_ns =
235 clockevent_delta2ns(2, &sirfsoc_clockevent);
236
237 sirfsoc_clockevent.cpumask = cpumask_of(0);
238 clockevents_register_device(&sirfsoc_clockevent);
239#ifdef CONFIG_LOCAL_TIMERS
240 local_timer_register(&sirfsoc_local_timer_ops);
241#endif
242}
243
244/* initialize the kernel jiffy timer source */
245void __init sirfsoc_marco_timer_init(void)
246{
247 unsigned long rate;
248 u32 timer_div;
249 struct clk *clk;
250
251 /* initialize clocking early, we want to set the OS timer */
252 sirfsoc_of_clk_init();
253
254 /* timer's input clock is io clock */
255 clk = clk_get_sys("io", NULL);
256
257 BUG_ON(IS_ERR(clk));
258 rate = clk_get_rate(clk);
259
260 BUG_ON(rate < CLOCK_TICK_RATE);
261 BUG_ON(rate % CLOCK_TICK_RATE);
262
263 sirfsoc_of_timer_map();
264
265 /* Initialize the timer dividers */
266 timer_div = rate / CLOCK_TICK_RATE - 1;
267 writel_relaxed(timer_div << 16, sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL);
268 writel_relaxed(timer_div << 16, sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL);
269 writel_relaxed(timer_div << 16, sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_1_CTRL);
270
271 /* Initialize timer counters to 0 */
272 writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_LOAD_LO);
273 writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_LOAD_HI);
274 writel_relaxed(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL) |
275 BIT(1) | BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL);
276 writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_0);
277 writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_1);
278
279 /* Clear all interrupts */
280 writel_relaxed(0xFFFF, sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS);
281
282 BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
283
284 BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq));
285
286 sirfsoc_clockevent_init();
287}
288
289static struct of_device_id timer_ids[] = {
290 { .compatible = "sirf,marco-tick" },
291 {},
292};
293
294static void __init sirfsoc_of_timer_map(void)
295{
296 struct device_node *np;
297
298 np = of_find_matching_node(NULL, timer_ids);
299 if (!np)
300 return;
301 sirfsoc_timer_base = of_iomap(np, 0);
302 if (!sirfsoc_timer_base)
303 panic("unable to map timer cpu registers\n");
304
305 sirfsoc_timer_irq.irq = irq_of_parse_and_map(np, 0);
306 if (!sirfsoc_timer_irq.irq)
307 panic("No irq passed for timer0 via DT\n");
308
309#ifdef CONFIG_LOCAL_TIMERS
310 sirfsoc_timer1_irq.irq = irq_of_parse_and_map(np, 1);
311 if (!sirfsoc_timer1_irq.irq)
312 panic("No irq passed for timer1 via DT\n");
313#endif
314
315 of_node_put(np);
316}
diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer-prima2.c
index d95bf252f694..6da584f8a949 100644
--- a/arch/arm/mach-prima2/timer.c
+++ b/arch/arm/mach-prima2/timer-prima2.c
@@ -175,19 +175,13 @@ static u32 notrace sirfsoc_read_sched_clock(void)
175 175
176static void __init sirfsoc_clockevent_init(void) 176static void __init sirfsoc_clockevent_init(void)
177{ 177{
178 clockevents_calc_mult_shift(&sirfsoc_clockevent, CLOCK_TICK_RATE, 60);
179
180 sirfsoc_clockevent.max_delta_ns =
181 clockevent_delta2ns(-2, &sirfsoc_clockevent);
182 sirfsoc_clockevent.min_delta_ns =
183 clockevent_delta2ns(2, &sirfsoc_clockevent);
184
185 sirfsoc_clockevent.cpumask = cpumask_of(0); 178 sirfsoc_clockevent.cpumask = cpumask_of(0);
186 clockevents_register_device(&sirfsoc_clockevent); 179 clockevents_config_and_register(&sirfsoc_clockevent, CLOCK_TICK_RATE,
180 2, -2);
187} 181}
188 182
189/* initialize the kernel jiffy timer source */ 183/* initialize the kernel jiffy timer source */
190static void __init sirfsoc_timer_init(void) 184void __init sirfsoc_prima2_timer_init(void)
191{ 185{
192 unsigned long rate; 186 unsigned long rate;
193 struct clk *clk; 187 struct clk *clk;
@@ -233,7 +227,7 @@ static void __init sirfsoc_of_timer_map(void)
233 227
234 np = of_find_matching_node(NULL, timer_ids); 228 np = of_find_matching_node(NULL, timer_ids);
235 if (!np) 229 if (!np)
236 panic("unable to find compatible timer node in dtb\n"); 230 return;
237 sirfsoc_timer_base = of_iomap(np, 0); 231 sirfsoc_timer_base = of_iomap(np, 0);
238 if (!sirfsoc_timer_base) 232 if (!sirfsoc_timer_base)
239 panic("unable to map timer cpu registers\n"); 233 panic("unable to map timer cpu registers\n");
@@ -245,7 +239,3 @@ static void __init sirfsoc_of_timer_map(void)
245 239
246 of_node_put(np); 240 of_node_put(np);
247} 241}
248
249struct sys_timer sirfsoc_timer = {
250 .init = sirfsoc_timer_init,
251};
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 208229342514..2f71b3fbd319 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -822,7 +822,7 @@ MACHINE_START(BALLOON3, "Balloon3")
822 .nr_irqs = BALLOON3_NR_IRQS, 822 .nr_irqs = BALLOON3_NR_IRQS,
823 .init_irq = balloon3_init_irq, 823 .init_irq = balloon3_init_irq,
824 .handle_irq = pxa27x_handle_irq, 824 .handle_irq = pxa27x_handle_irq,
825 .timer = &pxa_timer, 825 .init_time = pxa_timer_init,
826 .init_machine = balloon3_init, 826 .init_machine = balloon3_init,
827 .atag_offset = 0x100, 827 .atag_offset = 0x100,
828 .restart = pxa_restart, 828 .restart = pxa_restart,
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index 9a8760b72913..c092730749b9 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -153,7 +153,7 @@ MACHINE_START(CAPC7117,
153 .nr_irqs = PXA_NR_IRQS, 153 .nr_irqs = PXA_NR_IRQS,
154 .init_irq = pxa3xx_init_irq, 154 .init_irq = pxa3xx_init_irq,
155 .handle_irq = pxa3xx_handle_irq, 155 .handle_irq = pxa3xx_handle_irq,
156 .timer = &pxa_timer, 156 .init_time = pxa_timer_init,
157 .init_machine = capc7117_init, 157 .init_machine = capc7117_init,
158 .restart = pxa_restart, 158 .restart = pxa_restart,
159MACHINE_END 159MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index a103c8ffea9f..bb99f59a36d8 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -520,7 +520,7 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX")
520 .init_irq = cmx2xx_init_irq, 520 .init_irq = cmx2xx_init_irq,
521 /* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */ 521 /* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */
522 .handle_irq = pxa25x_handle_irq, 522 .handle_irq = pxa25x_handle_irq,
523 .timer = &pxa_timer, 523 .init_time = pxa_timer_init,
524 .init_machine = cmx2xx_init, 524 .init_machine = cmx2xx_init,
525#ifdef CONFIG_PCI 525#ifdef CONFIG_PCI
526 .dma_zone_size = SZ_64M, 526 .dma_zone_size = SZ_64M,
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index cc2b23afcaaf..8091aac89edf 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -854,7 +854,7 @@ MACHINE_START(CM_X300, "CM-X300 module")
854 .nr_irqs = PXA_NR_IRQS, 854 .nr_irqs = PXA_NR_IRQS,
855 .init_irq = pxa3xx_init_irq, 855 .init_irq = pxa3xx_init_irq,
856 .handle_irq = pxa3xx_handle_irq, 856 .handle_irq = pxa3xx_handle_irq,
857 .timer = &pxa_timer, 857 .init_time = pxa_timer_init,
858 .init_machine = cm_x300_init, 858 .init_machine = cm_x300_init,
859 .fixup = cm_x300_fixup, 859 .fixup = cm_x300_fixup,
860 .restart = pxa_restart, 860 .restart = pxa_restart,
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index b2f227d36125..5f9d9303b346 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -313,7 +313,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
313 .nr_irqs = PXA_NR_IRQS, 313 .nr_irqs = PXA_NR_IRQS,
314 .init_irq = pxa27x_init_irq, 314 .init_irq = pxa27x_init_irq,
315 .handle_irq = pxa27x_handle_irq, 315 .handle_irq = pxa27x_handle_irq,
316 .timer = &pxa_timer, 316 .init_time = pxa_timer_init,
317 .restart = pxa_restart, 317 .restart = pxa_restart,
318MACHINE_END 318MACHINE_END
319 319
@@ -324,7 +324,7 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
324 .nr_irqs = PXA_NR_IRQS, 324 .nr_irqs = PXA_NR_IRQS,
325 .init_irq = pxa27x_init_irq, 325 .init_irq = pxa27x_init_irq,
326 .handle_irq = pxa27x_handle_irq, 326 .handle_irq = pxa27x_handle_irq,
327 .timer = &pxa_timer, 327 .init_time = pxa_timer_init,
328 .restart = pxa_restart, 328 .restart = pxa_restart,
329MACHINE_END 329MACHINE_END
330 330
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index a9c9c163dd95..f1a1ac1fbd85 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -189,7 +189,7 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
189 .nr_irqs = PXA_NR_IRQS, 189 .nr_irqs = PXA_NR_IRQS,
190 .init_irq = pxa3xx_init_irq, 190 .init_irq = pxa3xx_init_irq,
191 .handle_irq = pxa3xx_handle_irq, 191 .handle_irq = pxa3xx_handle_irq,
192 .timer = &pxa_timer, 192 .init_time = pxa_timer_init,
193 .restart = pxa_restart, 193 .restart = pxa_restart,
194MACHINE_END 194MACHINE_END
195 195
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 25515cd7e68f..f6cc8b0ab82f 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -259,7 +259,7 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
259 .nr_irqs = PXA_NR_IRQS, 259 .nr_irqs = PXA_NR_IRQS,
260 .init_irq = pxa3xx_init_irq, 260 .init_irq = pxa3xx_init_irq,
261 .handle_irq = pxa3xx_handle_irq, 261 .handle_irq = pxa3xx_handle_irq,
262 .timer = &pxa_timer, 262 .init_time = pxa_timer_init,
263 .restart = pxa_restart, 263 .restart = pxa_restart,
264MACHINE_END 264MACHINE_END
265 265
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 7c83f52c549c..a5b8fead7d61 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -733,7 +733,7 @@ MACHINE_START(CORGI, "SHARP Corgi")
733 .init_irq = pxa25x_init_irq, 733 .init_irq = pxa25x_init_irq,
734 .handle_irq = pxa25x_handle_irq, 734 .handle_irq = pxa25x_handle_irq,
735 .init_machine = corgi_init, 735 .init_machine = corgi_init,
736 .timer = &pxa_timer, 736 .init_time = pxa_timer_init,
737 .restart = corgi_restart, 737 .restart = corgi_restart,
738MACHINE_END 738MACHINE_END
739#endif 739#endif
@@ -746,7 +746,7 @@ MACHINE_START(SHEPHERD, "SHARP Shepherd")
746 .init_irq = pxa25x_init_irq, 746 .init_irq = pxa25x_init_irq,
747 .handle_irq = pxa25x_handle_irq, 747 .handle_irq = pxa25x_handle_irq,
748 .init_machine = corgi_init, 748 .init_machine = corgi_init,
749 .timer = &pxa_timer, 749 .init_time = pxa_timer_init,
750 .restart = corgi_restart, 750 .restart = corgi_restart,
751MACHINE_END 751MACHINE_END
752#endif 752#endif
@@ -759,7 +759,7 @@ MACHINE_START(HUSKY, "SHARP Husky")
759 .init_irq = pxa25x_init_irq, 759 .init_irq = pxa25x_init_irq,
760 .handle_irq = pxa25x_handle_irq, 760 .handle_irq = pxa25x_handle_irq,
761 .init_machine = corgi_init, 761 .init_machine = corgi_init,
762 .timer = &pxa_timer, 762 .init_time = pxa_timer_init,
763 .restart = corgi_restart, 763 .restart = corgi_restart,
764MACHINE_END 764MACHINE_END
765#endif 765#endif
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 7039f44b3647..fadfff8feaef 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -278,6 +278,6 @@ MACHINE_START(CSB726, "Cogent CSB726")
278 .init_irq = pxa27x_init_irq, 278 .init_irq = pxa27x_init_irq,
279 .handle_irq = pxa27x_handle_irq, 279 .handle_irq = pxa27x_handle_irq,
280 .init_machine = csb726_init, 280 .init_machine = csb726_init,
281 .timer = &pxa_timer, 281 .init_time = pxa_timer_init,
282 .restart = pxa_restart, 282 .restart = pxa_restart,
283MACHINE_END 283MACHINE_END
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 1b6411439ec8..446563a7d1ad 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -1298,7 +1298,7 @@ MACHINE_START(EM_X270, "Compulab EM-X270")
1298 .nr_irqs = PXA_NR_IRQS, 1298 .nr_irqs = PXA_NR_IRQS,
1299 .init_irq = pxa27x_init_irq, 1299 .init_irq = pxa27x_init_irq,
1300 .handle_irq = pxa27x_handle_irq, 1300 .handle_irq = pxa27x_handle_irq,
1301 .timer = &pxa_timer, 1301 .init_time = pxa_timer_init,
1302 .init_machine = em_x270_init, 1302 .init_machine = em_x270_init,
1303 .restart = pxa_restart, 1303 .restart = pxa_restart,
1304MACHINE_END 1304MACHINE_END
@@ -1309,7 +1309,7 @@ MACHINE_START(EXEDA, "Compulab eXeda")
1309 .nr_irqs = PXA_NR_IRQS, 1309 .nr_irqs = PXA_NR_IRQS,
1310 .init_irq = pxa27x_init_irq, 1310 .init_irq = pxa27x_init_irq,
1311 .handle_irq = pxa27x_handle_irq, 1311 .handle_irq = pxa27x_handle_irq,
1312 .timer = &pxa_timer, 1312 .init_time = pxa_timer_init,
1313 .init_machine = em_x270_init, 1313 .init_machine = em_x270_init,
1314 .restart = pxa_restart, 1314 .restart = pxa_restart,
1315MACHINE_END 1315MACHINE_END
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index be2ee9bf5c6e..8280ebcaab9f 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -195,7 +195,7 @@ MACHINE_START(E330, "Toshiba e330")
195 .handle_irq = pxa25x_handle_irq, 195 .handle_irq = pxa25x_handle_irq,
196 .fixup = eseries_fixup, 196 .fixup = eseries_fixup,
197 .init_machine = e330_init, 197 .init_machine = e330_init,
198 .timer = &pxa_timer, 198 .init_time = pxa_timer_init,
199 .restart = pxa_restart, 199 .restart = pxa_restart,
200MACHINE_END 200MACHINE_END
201#endif 201#endif
@@ -246,7 +246,7 @@ MACHINE_START(E350, "Toshiba e350")
246 .handle_irq = pxa25x_handle_irq, 246 .handle_irq = pxa25x_handle_irq,
247 .fixup = eseries_fixup, 247 .fixup = eseries_fixup,
248 .init_machine = e350_init, 248 .init_machine = e350_init,
249 .timer = &pxa_timer, 249 .init_time = pxa_timer_init,
250 .restart = pxa_restart, 250 .restart = pxa_restart,
251MACHINE_END 251MACHINE_END
252#endif 252#endif
@@ -370,7 +370,7 @@ MACHINE_START(E400, "Toshiba e400")
370 .handle_irq = pxa25x_handle_irq, 370 .handle_irq = pxa25x_handle_irq,
371 .fixup = eseries_fixup, 371 .fixup = eseries_fixup,
372 .init_machine = e400_init, 372 .init_machine = e400_init,
373 .timer = &pxa_timer, 373 .init_time = pxa_timer_init,
374 .restart = pxa_restart, 374 .restart = pxa_restart,
375MACHINE_END 375MACHINE_END
376#endif 376#endif
@@ -566,7 +566,7 @@ MACHINE_START(E740, "Toshiba e740")
566 .handle_irq = pxa25x_handle_irq, 566 .handle_irq = pxa25x_handle_irq,
567 .fixup = eseries_fixup, 567 .fixup = eseries_fixup,
568 .init_machine = e740_init, 568 .init_machine = e740_init,
569 .timer = &pxa_timer, 569 .init_time = pxa_timer_init,
570 .restart = pxa_restart, 570 .restart = pxa_restart,
571MACHINE_END 571MACHINE_END
572#endif 572#endif
@@ -765,7 +765,7 @@ MACHINE_START(E750, "Toshiba e750")
765 .handle_irq = pxa25x_handle_irq, 765 .handle_irq = pxa25x_handle_irq,
766 .fixup = eseries_fixup, 766 .fixup = eseries_fixup,
767 .init_machine = e750_init, 767 .init_machine = e750_init,
768 .timer = &pxa_timer, 768 .init_time = pxa_timer_init,
769 .restart = pxa_restart, 769 .restart = pxa_restart,
770MACHINE_END 770MACHINE_END
771#endif 771#endif
@@ -977,7 +977,7 @@ MACHINE_START(E800, "Toshiba e800")
977 .handle_irq = pxa25x_handle_irq, 977 .handle_irq = pxa25x_handle_irq,
978 .fixup = eseries_fixup, 978 .fixup = eseries_fixup,
979 .init_machine = e800_init, 979 .init_machine = e800_init,
980 .timer = &pxa_timer, 980 .init_time = pxa_timer_init,
981 .restart = pxa_restart, 981 .restart = pxa_restart,
982MACHINE_END 982MACHINE_END
983#endif 983#endif
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index dc58fa0edb66..dca10709be8f 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -802,7 +802,7 @@ MACHINE_START(EZX_A780, "Motorola EZX A780")
802 .nr_irqs = EZX_NR_IRQS, 802 .nr_irqs = EZX_NR_IRQS,
803 .init_irq = pxa27x_init_irq, 803 .init_irq = pxa27x_init_irq,
804 .handle_irq = pxa27x_handle_irq, 804 .handle_irq = pxa27x_handle_irq,
805 .timer = &pxa_timer, 805 .init_time = pxa_timer_init,
806 .init_machine = a780_init, 806 .init_machine = a780_init,
807 .restart = pxa_restart, 807 .restart = pxa_restart,
808MACHINE_END 808MACHINE_END
@@ -869,7 +869,7 @@ MACHINE_START(EZX_E680, "Motorola EZX E680")
869 .nr_irqs = EZX_NR_IRQS, 869 .nr_irqs = EZX_NR_IRQS,
870 .init_irq = pxa27x_init_irq, 870 .init_irq = pxa27x_init_irq,
871 .handle_irq = pxa27x_handle_irq, 871 .handle_irq = pxa27x_handle_irq,
872 .timer = &pxa_timer, 872 .init_time = pxa_timer_init,
873 .init_machine = e680_init, 873 .init_machine = e680_init,
874 .restart = pxa_restart, 874 .restart = pxa_restart,
875MACHINE_END 875MACHINE_END
@@ -936,7 +936,7 @@ MACHINE_START(EZX_A1200, "Motorola EZX A1200")
936 .nr_irqs = EZX_NR_IRQS, 936 .nr_irqs = EZX_NR_IRQS,
937 .init_irq = pxa27x_init_irq, 937 .init_irq = pxa27x_init_irq,
938 .handle_irq = pxa27x_handle_irq, 938 .handle_irq = pxa27x_handle_irq,
939 .timer = &pxa_timer, 939 .init_time = pxa_timer_init,
940 .init_machine = a1200_init, 940 .init_machine = a1200_init,
941 .restart = pxa_restart, 941 .restart = pxa_restart,
942MACHINE_END 942MACHINE_END
@@ -1128,7 +1128,7 @@ MACHINE_START(EZX_A910, "Motorola EZX A910")
1128 .nr_irqs = EZX_NR_IRQS, 1128 .nr_irqs = EZX_NR_IRQS,
1129 .init_irq = pxa27x_init_irq, 1129 .init_irq = pxa27x_init_irq,
1130 .handle_irq = pxa27x_handle_irq, 1130 .handle_irq = pxa27x_handle_irq,
1131 .timer = &pxa_timer, 1131 .init_time = pxa_timer_init,
1132 .init_machine = a910_init, 1132 .init_machine = a910_init,
1133 .restart = pxa_restart, 1133 .restart = pxa_restart,
1134MACHINE_END 1134MACHINE_END
@@ -1195,7 +1195,7 @@ MACHINE_START(EZX_E6, "Motorola EZX E6")
1195 .nr_irqs = EZX_NR_IRQS, 1195 .nr_irqs = EZX_NR_IRQS,
1196 .init_irq = pxa27x_init_irq, 1196 .init_irq = pxa27x_init_irq,
1197 .handle_irq = pxa27x_handle_irq, 1197 .handle_irq = pxa27x_handle_irq,
1198 .timer = &pxa_timer, 1198 .init_time = pxa_timer_init,
1199 .init_machine = e6_init, 1199 .init_machine = e6_init,
1200 .restart = pxa_restart, 1200 .restart = pxa_restart,
1201MACHINE_END 1201MACHINE_END
@@ -1236,7 +1236,7 @@ MACHINE_START(EZX_E2, "Motorola EZX E2")
1236 .nr_irqs = EZX_NR_IRQS, 1236 .nr_irqs = EZX_NR_IRQS,
1237 .init_irq = pxa27x_init_irq, 1237 .init_irq = pxa27x_init_irq,
1238 .handle_irq = pxa27x_handle_irq, 1238 .handle_irq = pxa27x_handle_irq,
1239 .timer = &pxa_timer, 1239 .init_time = pxa_timer_init,
1240 .init_machine = e2_init, 1240 .init_machine = e2_init,
1241 .restart = pxa_restart, 1241 .restart = pxa_restart,
1242MACHINE_END 1242MACHINE_END
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 42d5cca66257..fd7ea39b78c0 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -10,9 +10,8 @@
10 */ 10 */
11 11
12struct irq_data; 12struct irq_data;
13struct sys_timer;
14 13
15extern struct sys_timer pxa_timer; 14extern void pxa_timer_init(void);
16 15
17extern void __init pxa_map_io(void); 16extern void __init pxa_map_io(void);
18 17
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 60755a6bb1c6..00b92dad7b81 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -238,7 +238,7 @@ MACHINE_START(GUMSTIX, "Gumstix")
238 .nr_irqs = PXA_NR_IRQS, 238 .nr_irqs = PXA_NR_IRQS,
239 .init_irq = pxa25x_init_irq, 239 .init_irq = pxa25x_init_irq,
240 .handle_irq = pxa25x_handle_irq, 240 .handle_irq = pxa25x_handle_irq,
241 .timer = &pxa_timer, 241 .init_time = pxa_timer_init,
242 .init_machine = gumstix_init, 242 .init_machine = gumstix_init,
243 .restart = pxa_restart, 243 .restart = pxa_restart,
244MACHINE_END 244MACHINE_END
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index e7dec589f014..875ec3351499 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -208,7 +208,7 @@ MACHINE_START(H5400, "HP iPAQ H5000")
208 .nr_irqs = PXA_NR_IRQS, 208 .nr_irqs = PXA_NR_IRQS,
209 .init_irq = pxa25x_init_irq, 209 .init_irq = pxa25x_init_irq,
210 .handle_irq = pxa25x_handle_irq, 210 .handle_irq = pxa25x_handle_irq,
211 .timer = &pxa_timer, 211 .init_time = pxa_timer_init,
212 .init_machine = h5000_init, 212 .init_machine = h5000_init,
213 .restart = pxa_restart, 213 .restart = pxa_restart,
214MACHINE_END 214MACHINE_END
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c
index 2962de898da9..7a8d749a07b8 100644
--- a/arch/arm/mach-pxa/himalaya.c
+++ b/arch/arm/mach-pxa/himalaya.c
@@ -164,6 +164,6 @@ MACHINE_START(HIMALAYA, "HTC Himalaya")
164 .init_irq = pxa25x_init_irq, 164 .init_irq = pxa25x_init_irq,
165 .handle_irq = pxa25x_handle_irq, 165 .handle_irq = pxa25x_handle_irq,
166 .init_machine = himalaya_init, 166 .init_machine = himalaya_init,
167 .timer = &pxa_timer, 167 .init_time = pxa_timer_init,
168 .restart = pxa_restart, 168 .restart = pxa_restart,
169MACHINE_END 169MACHINE_END
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index e2c6391863fe..133109ec7332 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -900,6 +900,6 @@ MACHINE_START(H4700, "HP iPAQ HX4700")
900 .init_irq = pxa27x_init_irq, 900 .init_irq = pxa27x_init_irq,
901 .handle_irq = pxa27x_handle_irq, 901 .handle_irq = pxa27x_handle_irq,
902 .init_machine = hx4700_init, 902 .init_machine = hx4700_init,
903 .timer = &pxa_timer, 903 .init_time = pxa_timer_init,
904 .restart = pxa_restart, 904 .restart = pxa_restart,
905MACHINE_END 905MACHINE_END
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index 1d02eabc9c65..fe31bfcbb8df 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -196,7 +196,7 @@ MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
196 .nr_irqs = PXA_NR_IRQS, 196 .nr_irqs = PXA_NR_IRQS,
197 .init_irq = pxa3xx_init_irq, 197 .init_irq = pxa3xx_init_irq,
198 .handle_irq = pxa3xx_handle_irq, 198 .handle_irq = pxa3xx_handle_irq,
199 .timer = &pxa_timer, 199 .init_time = pxa_timer_init,
200 .init_machine = icontrol_init, 200 .init_machine = icontrol_init,
201 .restart = pxa_restart, 201 .restart = pxa_restart,
202MACHINE_END 202MACHINE_END
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 64507cdd2e8f..343c4e3a7c5d 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -279,7 +279,7 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
279 .nr_irqs = PXA_NR_IRQS, 279 .nr_irqs = PXA_NR_IRQS,
280 .init_irq = pxa25x_init_irq, 280 .init_irq = pxa25x_init_irq,
281 .handle_irq = pxa25x_handle_irq, 281 .handle_irq = pxa25x_handle_irq,
282 .timer = &pxa_timer, 282 .init_time = pxa_timer_init,
283 .init_machine = idp_init, 283 .init_machine = idp_init,
284 .restart = pxa_restart, 284 .restart = pxa_restart,
285MACHINE_END 285MACHINE_END
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 402874f9021f..e848c4607baf 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -443,7 +443,7 @@ MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleto
443 .nr_irqs = LITTLETON_NR_IRQS, 443 .nr_irqs = LITTLETON_NR_IRQS,
444 .init_irq = pxa3xx_init_irq, 444 .init_irq = pxa3xx_init_irq,
445 .handle_irq = pxa3xx_handle_irq, 445 .handle_irq = pxa3xx_handle_irq,
446 .timer = &pxa_timer, 446 .init_time = pxa_timer_init,
447 .init_machine = littleton_init, 447 .init_machine = littleton_init,
448 .restart = pxa_restart, 448 .restart = pxa_restart,
449MACHINE_END 449MACHINE_END
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 1a63eaa89867..1255ee00f3d1 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -503,7 +503,7 @@ MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
503 .nr_irqs = LPD270_NR_IRQS, 503 .nr_irqs = LPD270_NR_IRQS,
504 .init_irq = lpd270_init_irq, 504 .init_irq = lpd270_init_irq,
505 .handle_irq = pxa27x_handle_irq, 505 .handle_irq = pxa27x_handle_irq,
506 .timer = &pxa_timer, 506 .init_time = pxa_timer_init,
507 .init_machine = lpd270_init, 507 .init_machine = lpd270_init,
508 .restart = pxa_restart, 508 .restart = pxa_restart,
509MACHINE_END 509MACHINE_END
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 553056d9a3c5..d8a1be619f21 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -650,7 +650,7 @@ MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)")
650 .nr_irqs = LUBBOCK_NR_IRQS, 650 .nr_irqs = LUBBOCK_NR_IRQS,
651 .init_irq = lubbock_init_irq, 651 .init_irq = lubbock_init_irq,
652 .handle_irq = pxa25x_handle_irq, 652 .handle_irq = pxa25x_handle_irq,
653 .timer = &pxa_timer, 653 .init_time = pxa_timer_init,
654 .init_machine = lubbock_init, 654 .init_machine = lubbock_init,
655 .restart = pxa_restart, 655 .restart = pxa_restart,
656MACHINE_END 656MACHINE_END
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index f7922404d941..f44532fc648b 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -774,6 +774,6 @@ MACHINE_START(MAGICIAN, "HTC Magician")
774 .init_irq = pxa27x_init_irq, 774 .init_irq = pxa27x_init_irq,
775 .handle_irq = pxa27x_handle_irq, 775 .handle_irq = pxa27x_handle_irq,
776 .init_machine = magician_init, 776 .init_machine = magician_init,
777 .timer = &pxa_timer, 777 .init_time = pxa_timer_init,
778 .restart = pxa_restart, 778 .restart = pxa_restart,
779MACHINE_END 779MACHINE_END
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index f27a61ee7ac7..7a12c1ba90ff 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -714,7 +714,7 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
714 .nr_irqs = MAINSTONE_NR_IRQS, 714 .nr_irqs = MAINSTONE_NR_IRQS,
715 .init_irq = mainstone_init_irq, 715 .init_irq = mainstone_init_irq,
716 .handle_irq = pxa27x_handle_irq, 716 .handle_irq = pxa27x_handle_irq,
717 .timer = &pxa_timer, 717 .init_time = pxa_timer_init,
718 .init_machine = mainstone_init, 718 .init_machine = mainstone_init,
719 .restart = pxa_restart, 719 .restart = pxa_restart,
720MACHINE_END 720MACHINE_END
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 2831308dba68..f8979b943cbf 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -762,6 +762,6 @@ MACHINE_START(MIOA701, "MIO A701")
762 .init_irq = &pxa27x_init_irq, 762 .init_irq = &pxa27x_init_irq,
763 .handle_irq = &pxa27x_handle_irq, 763 .handle_irq = &pxa27x_handle_irq,
764 .init_machine = mioa701_machine_init, 764 .init_machine = mioa701_machine_init,
765 .timer = &pxa_timer, 765 .init_time = pxa_timer_init,
766 .restart = mioa701_restart, 766 .restart = mioa701_restart,
767MACHINE_END 767MACHINE_END
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
index 152efbf093f6..854f1f562d6b 100644
--- a/arch/arm/mach-pxa/mp900.c
+++ b/arch/arm/mach-pxa/mp900.c
@@ -93,7 +93,7 @@ static void __init mp900c_init(void)
93/* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */ 93/* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */
94MACHINE_START(NEC_MP900, "MobilePro900/C") 94MACHINE_START(NEC_MP900, "MobilePro900/C")
95 .atag_offset = 0x220100, 95 .atag_offset = 0x220100,
96 .timer = &pxa_timer, 96 .init_time = pxa_timer_init,
97 .map_io = pxa25x_map_io, 97 .map_io = pxa25x_map_io,
98 .nr_irqs = PXA_NR_IRQS, 98 .nr_irqs = PXA_NR_IRQS,
99 .init_irq = pxa25x_init_irq, 99 .init_irq = pxa25x_init_irq,
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 8bcc96e3b0db..909b713e5789 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -347,7 +347,7 @@ MACHINE_START(PALMLD, "Palm LifeDrive")
347 .nr_irqs = PXA_NR_IRQS, 347 .nr_irqs = PXA_NR_IRQS,
348 .init_irq = pxa27x_init_irq, 348 .init_irq = pxa27x_init_irq,
349 .handle_irq = pxa27x_handle_irq, 349 .handle_irq = pxa27x_handle_irq,
350 .timer = &pxa_timer, 350 .init_time = pxa_timer_init,
351 .init_machine = palmld_init, 351 .init_machine = palmld_init,
352 .restart = pxa_restart, 352 .restart = pxa_restart,
353MACHINE_END 353MACHINE_END
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 5ca7b904a30e..5033fd07968f 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -208,7 +208,7 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5")
208 .nr_irqs = PXA_NR_IRQS, 208 .nr_irqs = PXA_NR_IRQS,
209 .init_irq = pxa27x_init_irq, 209 .init_irq = pxa27x_init_irq,
210 .handle_irq = pxa27x_handle_irq, 210 .handle_irq = pxa27x_handle_irq,
211 .timer = &pxa_timer, 211 .init_time = pxa_timer_init,
212 .init_machine = palmt5_init, 212 .init_machine = palmt5_init,
213 .restart = pxa_restart, 213 .restart = pxa_restart,
214MACHINE_END 214MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index ca924cfedfc0..100b176f7e88 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -542,7 +542,7 @@ MACHINE_START(PALMTC, "Palm Tungsten|C")
542 .nr_irqs = PXA_NR_IRQS, 542 .nr_irqs = PXA_NR_IRQS,
543 .init_irq = pxa25x_init_irq, 543 .init_irq = pxa25x_init_irq,
544 .handle_irq = pxa25x_handle_irq, 544 .handle_irq = pxa25x_handle_irq,
545 .timer = &pxa_timer, 545 .init_time = pxa_timer_init,
546 .init_machine = palmtc_init, 546 .init_machine = palmtc_init,
547 .restart = pxa_restart, 547 .restart = pxa_restart,
548MACHINE_END 548MACHINE_END
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 32e0d7998355..0742721ced2d 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -363,7 +363,7 @@ MACHINE_START(PALMTE2, "Palm Tungsten|E2")
363 .nr_irqs = PXA_NR_IRQS, 363 .nr_irqs = PXA_NR_IRQS,
364 .init_irq = pxa25x_init_irq, 364 .init_irq = pxa25x_init_irq,
365 .handle_irq = pxa25x_handle_irq, 365 .handle_irq = pxa25x_handle_irq,
366 .timer = &pxa_timer, 366 .init_time = pxa_timer_init,
367 .init_machine = palmte2_init, 367 .init_machine = palmte2_init,
368 .restart = pxa_restart, 368 .restart = pxa_restart,
369MACHINE_END 369MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 3f3c48f2f7ce..d17bda278782 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -451,7 +451,7 @@ MACHINE_START(TREO680, "Palm Treo 680")
451 .nr_irqs = PXA_NR_IRQS, 451 .nr_irqs = PXA_NR_IRQS,
452 .init_irq = pxa27x_init_irq, 452 .init_irq = pxa27x_init_irq,
453 .handle_irq = pxa27x_handle_irq, 453 .handle_irq = pxa27x_handle_irq,
454 .timer = &pxa_timer, 454 .init_time = pxa_timer_init,
455 .init_machine = treo680_init, 455 .init_machine = treo680_init,
456 .restart = pxa_restart, 456 .restart = pxa_restart,
457MACHINE_END 457MACHINE_END
@@ -465,7 +465,7 @@ MACHINE_START(CENTRO, "Palm Centro 685")
465 .nr_irqs = PXA_NR_IRQS, 465 .nr_irqs = PXA_NR_IRQS,
466 .init_irq = pxa27x_init_irq, 466 .init_irq = pxa27x_init_irq,
467 .handle_irq = pxa27x_handle_irq, 467 .handle_irq = pxa27x_handle_irq,
468 .timer = &pxa_timer, 468 .init_time = pxa_timer_init,
469 .init_machine = centro_init, 469 .init_machine = centro_init,
470 .restart = pxa_restart, 470 .restart = pxa_restart,
471MACHINE_END 471MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 8b4366628a12..627c93a7364c 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -366,7 +366,7 @@ MACHINE_START(PALMTX, "Palm T|X")
366 .nr_irqs = PXA_NR_IRQS, 366 .nr_irqs = PXA_NR_IRQS,
367 .init_irq = pxa27x_init_irq, 367 .init_irq = pxa27x_init_irq,
368 .handle_irq = pxa27x_handle_irq, 368 .handle_irq = pxa27x_handle_irq,
369 .timer = &pxa_timer, 369 .init_time = pxa_timer_init,
370 .init_machine = palmtx_init, 370 .init_machine = palmtx_init,
371 .restart = pxa_restart, 371 .restart = pxa_restart,
372MACHINE_END 372MACHINE_END
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 8cdd4f58e253..18b7fcd98592 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -404,7 +404,7 @@ MACHINE_START(PALMZ72, "Palm Zire72")
404 .nr_irqs = PXA_NR_IRQS, 404 .nr_irqs = PXA_NR_IRQS,
405 .init_irq = pxa27x_init_irq, 405 .init_irq = pxa27x_init_irq,
406 .handle_irq = pxa27x_handle_irq, 406 .handle_irq = pxa27x_handle_irq,
407 .timer = &pxa_timer, 407 .init_time = pxa_timer_init,
408 .init_machine = palmz72_init, 408 .init_machine = palmz72_init,
409 .restart = pxa_restart, 409 .restart = pxa_restart,
410MACHINE_END 410MACHINE_END
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index fe9054435b6f..69918c7e3f1f 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -263,7 +263,7 @@ MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270")
263 .nr_irqs = PCM027_NR_IRQS, 263 .nr_irqs = PCM027_NR_IRQS,
264 .init_irq = pxa27x_init_irq, 264 .init_irq = pxa27x_init_irq,
265 .handle_irq = pxa27x_handle_irq, 265 .handle_irq = pxa27x_handle_irq,
266 .timer = &pxa_timer, 266 .init_time = pxa_timer_init,
267 .init_machine = pcm027_init, 267 .init_machine = pcm027_init,
268 .restart = pxa_restart, 268 .restart = pxa_restart,
269MACHINE_END 269MACHINE_END
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 2910bb935c75..50ccd5f1d560 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -469,7 +469,7 @@ MACHINE_START(POODLE, "SHARP Poodle")
469 .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */ 469 .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */
470 .init_irq = pxa25x_init_irq, 470 .init_irq = pxa25x_init_irq,
471 .handle_irq = pxa25x_handle_irq, 471 .handle_irq = pxa25x_handle_irq,
472 .timer = &pxa_timer, 472 .init_time = pxa_timer_init,
473 .init_machine = poodle_init, 473 .init_machine = poodle_init,
474 .restart = pxa_restart, 474 .restart = pxa_restart,
475MACHINE_END 475MACHINE_END
diff --git a/arch/arm/mach-pxa/pxa-dt.c b/arch/arm/mach-pxa/pxa-dt.c
index c9192cea0033..3835979a0dd3 100644
--- a/arch/arm/mach-pxa/pxa-dt.c
+++ b/arch/arm/mach-pxa/pxa-dt.c
@@ -55,7 +55,7 @@ DT_MACHINE_START(PXA_DT, "Marvell PXA3xx (Device Tree Support)")
55 .map_io = pxa3xx_map_io, 55 .map_io = pxa3xx_map_io,
56 .init_irq = pxa3xx_dt_init_irq, 56 .init_irq = pxa3xx_dt_init_irq,
57 .handle_irq = pxa3xx_handle_irq, 57 .handle_irq = pxa3xx_handle_irq,
58 .timer = &pxa_timer, 58 .init_time = pxa_timer_init,
59 .restart = pxa_restart, 59 .restart = pxa_restart,
60 .init_machine = pxa3xx_dt_init, 60 .init_machine = pxa3xx_dt_init,
61 .dt_compat = pxa3xx_dt_board_compat, 61 .dt_compat = pxa3xx_dt_board_compat,
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 25b08bfa997b..af41888acbd6 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -1095,7 +1095,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
1095 .nr_irqs = PXA_NR_IRQS, 1095 .nr_irqs = PXA_NR_IRQS,
1096 .init_irq = pxa3xx_init_irq, 1096 .init_irq = pxa3xx_init_irq,
1097 .handle_irq = pxa3xx_handle_irq, 1097 .handle_irq = pxa3xx_handle_irq,
1098 .timer = &pxa_timer, 1098 .init_time = pxa_timer_init,
1099 .restart = pxa_restart, 1099 .restart = pxa_restart,
1100MACHINE_END 1100MACHINE_END
1101#endif 1101#endif
@@ -1108,7 +1108,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
1108 .nr_irqs = PXA_NR_IRQS, 1108 .nr_irqs = PXA_NR_IRQS,
1109 .init_irq = pxa3xx_init_irq, 1109 .init_irq = pxa3xx_init_irq,
1110 .handle_irq = pxa3xx_handle_irq, 1110 .handle_irq = pxa3xx_handle_irq,
1111 .timer = &pxa_timer, 1111 .init_time = pxa_timer_init,
1112 .restart = pxa_restart, 1112 .restart = pxa_restart,
1113MACHINE_END 1113MACHINE_END
1114#endif 1114#endif
@@ -1121,7 +1121,7 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
1121 .nr_irqs = PXA_NR_IRQS, 1121 .nr_irqs = PXA_NR_IRQS,
1122 .init_irq = pxa3xx_init_irq, 1122 .init_irq = pxa3xx_init_irq,
1123 .handle_irq = pxa3xx_handle_irq, 1123 .handle_irq = pxa3xx_handle_irq,
1124 .timer = &pxa_timer, 1124 .init_time = pxa_timer_init,
1125 .restart = pxa_restart, 1125 .restart = pxa_restart,
1126MACHINE_END 1126MACHINE_END
1127#endif 1127#endif
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 08d87a5d2639..710c493eac89 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -601,7 +601,7 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
601 .nr_irqs = PXA_NR_IRQS, 601 .nr_irqs = PXA_NR_IRQS,
602 .init_irq = pxa3xx_init_irq, 602 .init_irq = pxa3xx_init_irq,
603 .handle_irq = pxa3xx_handle_irq, 603 .handle_irq = pxa3xx_handle_irq,
604 .timer = &pxa_timer, 604 .init_time = pxa_timer_init,
605 .init_machine = saar_init, 605 .init_machine = saar_init,
606 .restart = pxa_restart, 606 .restart = pxa_restart,
607MACHINE_END 607MACHINE_END
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 2073f0e6db0d..f90aa27ad599 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -986,7 +986,7 @@ MACHINE_START(SPITZ, "SHARP Spitz")
986 .init_irq = pxa27x_init_irq, 986 .init_irq = pxa27x_init_irq,
987 .handle_irq = pxa27x_handle_irq, 987 .handle_irq = pxa27x_handle_irq,
988 .init_machine = spitz_init, 988 .init_machine = spitz_init,
989 .timer = &pxa_timer, 989 .init_time = pxa_timer_init,
990 .restart = spitz_restart, 990 .restart = spitz_restart,
991MACHINE_END 991MACHINE_END
992#endif 992#endif
@@ -1000,7 +1000,7 @@ MACHINE_START(BORZOI, "SHARP Borzoi")
1000 .init_irq = pxa27x_init_irq, 1000 .init_irq = pxa27x_init_irq,
1001 .handle_irq = pxa27x_handle_irq, 1001 .handle_irq = pxa27x_handle_irq,
1002 .init_machine = spitz_init, 1002 .init_machine = spitz_init,
1003 .timer = &pxa_timer, 1003 .init_time = pxa_timer_init,
1004 .restart = spitz_restart, 1004 .restart = spitz_restart,
1005MACHINE_END 1005MACHINE_END
1006#endif 1006#endif
@@ -1014,7 +1014,7 @@ MACHINE_START(AKITA, "SHARP Akita")
1014 .init_irq = pxa27x_init_irq, 1014 .init_irq = pxa27x_init_irq,
1015 .handle_irq = pxa27x_handle_irq, 1015 .handle_irq = pxa27x_handle_irq,
1016 .init_machine = spitz_init, 1016 .init_machine = spitz_init,
1017 .timer = &pxa_timer, 1017 .init_time = pxa_timer_init,
1018 .restart = spitz_restart, 1018 .restart = spitz_restart,
1019MACHINE_END 1019MACHINE_END
1020#endif 1020#endif
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 456560b5aad4..88fde43c948c 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -1006,7 +1006,7 @@ MACHINE_START(INTELMOTE2, "IMOTE 2")
1006 .nr_irqs = PXA_NR_IRQS, 1006 .nr_irqs = PXA_NR_IRQS,
1007 .init_irq = pxa27x_init_irq, 1007 .init_irq = pxa27x_init_irq,
1008 .handle_irq = pxa27x_handle_irq, 1008 .handle_irq = pxa27x_handle_irq,
1009 .timer = &pxa_timer, 1009 .init_time = pxa_timer_init,
1010 .init_machine = imote2_init, 1010 .init_machine = imote2_init,
1011 .atag_offset = 0x100, 1011 .atag_offset = 0x100,
1012 .restart = pxa_restart, 1012 .restart = pxa_restart,
@@ -1019,7 +1019,7 @@ MACHINE_START(STARGATE2, "Stargate 2")
1019 .nr_irqs = STARGATE_NR_IRQS, 1019 .nr_irqs = STARGATE_NR_IRQS,
1020 .init_irq = pxa27x_init_irq, 1020 .init_irq = pxa27x_init_irq,
1021 .handle_irq = pxa27x_handle_irq, 1021 .handle_irq = pxa27x_handle_irq,
1022 .timer = &pxa_timer, 1022 .init_time = pxa_timer_init,
1023 .init_machine = stargate2_init, 1023 .init_machine = stargate2_init,
1024 .atag_offset = 0x100, 1024 .atag_offset = 0x100,
1025 .restart = pxa_restart, 1025 .restart = pxa_restart,
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 1a25f8a7b0ce..f55979c09a5f 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -494,7 +494,7 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
494 .nr_irqs = PXA_NR_IRQS, 494 .nr_irqs = PXA_NR_IRQS,
495 .init_irq = pxa3xx_init_irq, 495 .init_irq = pxa3xx_init_irq,
496 .handle_irq = pxa3xx_handle_irq, 496 .handle_irq = pxa3xx_handle_irq,
497 .timer = &pxa_timer, 497 .init_time = pxa_timer_init,
498 .init_machine = tavorevb_init, 498 .init_machine = tavorevb_init,
499 .restart = pxa_restart, 499 .restart = pxa_restart,
500MACHINE_END 500MACHINE_END
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 4bc47d63698b..8f1ee92aea30 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -89,48 +89,10 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
89 } 89 }
90} 90}
91 91
92static struct clock_event_device ckevt_pxa_osmr0 = {
93 .name = "osmr0",
94 .features = CLOCK_EVT_FEAT_ONESHOT,
95 .rating = 200,
96 .set_next_event = pxa_osmr0_set_next_event,
97 .set_mode = pxa_osmr0_set_mode,
98};
99
100static struct irqaction pxa_ost0_irq = {
101 .name = "ost0",
102 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
103 .handler = pxa_ost0_interrupt,
104 .dev_id = &ckevt_pxa_osmr0,
105};
106
107static void __init pxa_timer_init(void)
108{
109 unsigned long clock_tick_rate = get_clock_tick_rate();
110
111 writel_relaxed(0, OIER);
112 writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
113
114 setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate);
115
116 clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
117 ckevt_pxa_osmr0.max_delta_ns =
118 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
119 ckevt_pxa_osmr0.min_delta_ns =
120 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1;
121 ckevt_pxa_osmr0.cpumask = cpumask_of(0);
122
123 setup_irq(IRQ_OST0, &pxa_ost0_irq);
124
125 clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32,
126 clocksource_mmio_readl_up);
127 clockevents_register_device(&ckevt_pxa_osmr0);
128}
129
130#ifdef CONFIG_PM 92#ifdef CONFIG_PM
131static unsigned long osmr[4], oier, oscr; 93static unsigned long osmr[4], oier, oscr;
132 94
133static void pxa_timer_suspend(void) 95static void pxa_timer_suspend(struct clock_event_device *cedev)
134{ 96{
135 osmr[0] = readl_relaxed(OSMR0); 97 osmr[0] = readl_relaxed(OSMR0);
136 osmr[1] = readl_relaxed(OSMR1); 98 osmr[1] = readl_relaxed(OSMR1);
@@ -140,7 +102,7 @@ static void pxa_timer_suspend(void)
140 oscr = readl_relaxed(OSCR); 102 oscr = readl_relaxed(OSCR);
141} 103}
142 104
143static void pxa_timer_resume(void) 105static void pxa_timer_resume(struct clock_event_device *cedev)
144{ 106{
145 /* 107 /*
146 * Ensure that we have at least MIN_OSCR_DELTA between match 108 * Ensure that we have at least MIN_OSCR_DELTA between match
@@ -163,8 +125,38 @@ static void pxa_timer_resume(void)
163#define pxa_timer_resume NULL 125#define pxa_timer_resume NULL
164#endif 126#endif
165 127
166struct sys_timer pxa_timer = { 128static struct clock_event_device ckevt_pxa_osmr0 = {
167 .init = pxa_timer_init, 129 .name = "osmr0",
130 .features = CLOCK_EVT_FEAT_ONESHOT,
131 .rating = 200,
132 .set_next_event = pxa_osmr0_set_next_event,
133 .set_mode = pxa_osmr0_set_mode,
168 .suspend = pxa_timer_suspend, 134 .suspend = pxa_timer_suspend,
169 .resume = pxa_timer_resume, 135 .resume = pxa_timer_resume,
170}; 136};
137
138static struct irqaction pxa_ost0_irq = {
139 .name = "ost0",
140 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
141 .handler = pxa_ost0_interrupt,
142 .dev_id = &ckevt_pxa_osmr0,
143};
144
145void __init pxa_timer_init(void)
146{
147 unsigned long clock_tick_rate = get_clock_tick_rate();
148
149 writel_relaxed(0, OIER);
150 writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
151
152 setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate);
153
154 ckevt_pxa_osmr0.cpumask = cpumask_of(0);
155
156 setup_irq(IRQ_OST0, &pxa_ost0_irq);
157
158 clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32,
159 clocksource_mmio_readl_up);
160 clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate,
161 MIN_OSCR_DELTA * 2, 0x7fffffff);
162}
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 233629edf7ee..9e7998d3635f 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -982,6 +982,6 @@ MACHINE_START(TOSA, "SHARP Tosa")
982 .init_irq = pxa25x_init_irq, 982 .init_irq = pxa25x_init_irq,
983 .handle_irq = pxa25x_handle_irq, 983 .handle_irq = pxa25x_handle_irq,
984 .init_machine = tosa_init, 984 .init_machine = tosa_init,
985 .timer = &pxa_timer, 985 .init_time = pxa_timer_init,
986 .restart = tosa_restart, 986 .restart = tosa_restart,
987MACHINE_END 987MACHINE_END
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index fbbcbed4d1d4..c58043462acd 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -561,7 +561,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
561 .nr_irqs = PXA_NR_IRQS, 561 .nr_irqs = PXA_NR_IRQS,
562 .init_irq = pxa27x_init_irq, 562 .init_irq = pxa27x_init_irq,
563 .handle_irq = pxa27x_handle_irq, 563 .handle_irq = pxa27x_handle_irq,
564 .timer = &pxa_timer, 564 .init_time = pxa_timer_init,
565 .restart = pxa_restart, 565 .restart = pxa_restart,
566MACHINE_END 566MACHINE_END
567 567
@@ -573,6 +573,6 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
573 .nr_irqs = PXA_NR_IRQS, 573 .nr_irqs = PXA_NR_IRQS,
574 .init_irq = pxa27x_init_irq, 574 .init_irq = pxa27x_init_irq,
575 .handle_irq = pxa27x_handle_irq, 575 .handle_irq = pxa27x_handle_irq,
576 .timer = &pxa_timer, 576 .init_time = pxa_timer_init,
577 .restart = pxa_restart, 577 .restart = pxa_restart,
578MACHINE_END 578MACHINE_END
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index c773e4dded64..9c363c081d3f 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -997,7 +997,7 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
997 .nr_irqs = PXA_NR_IRQS, 997 .nr_irqs = PXA_NR_IRQS,
998 .init_irq = viper_init_irq, 998 .init_irq = viper_init_irq,
999 .handle_irq = pxa25x_handle_irq, 999 .handle_irq = pxa25x_handle_irq,
1000 .timer = &pxa_timer, 1000 .init_time = pxa_timer_init,
1001 .init_machine = viper_init, 1001 .init_machine = viper_init,
1002 .restart = pxa_restart, 1002 .restart = pxa_restart,
1003MACHINE_END 1003MACHINE_END
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index 491b6c9a2a9b..aa89488f961e 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -719,7 +719,7 @@ MACHINE_START(VPAC270, "Voipac PXA270")
719 .nr_irqs = PXA_NR_IRQS, 719 .nr_irqs = PXA_NR_IRQS,
720 .init_irq = pxa27x_init_irq, 720 .init_irq = pxa27x_init_irq,
721 .handle_irq = pxa27x_handle_irq, 721 .handle_irq = pxa27x_handle_irq,
722 .timer = &pxa_timer, 722 .init_time = pxa_timer_init,
723 .init_machine = vpac270_init, 723 .init_machine = vpac270_init,
724 .restart = pxa_restart, 724 .restart = pxa_restart,
725MACHINE_END 725MACHINE_END
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index 4275713ccd10..13b1d4586d7d 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -185,7 +185,7 @@ MACHINE_START(XCEP, "Iskratel XCEP")
185 .nr_irqs = PXA_NR_IRQS, 185 .nr_irqs = PXA_NR_IRQS,
186 .init_irq = pxa25x_init_irq, 186 .init_irq = pxa25x_init_irq,
187 .handle_irq = pxa25x_handle_irq, 187 .handle_irq = pxa25x_handle_irq,
188 .timer = &pxa_timer, 188 .init_time = pxa_timer_init,
189 .restart = pxa_restart, 189 .restart = pxa_restart,
190MACHINE_END 190MACHINE_END
191 191
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index 97529face7aa..989903a7e467 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -722,7 +722,7 @@ MACHINE_START(ZIPIT2, "Zipit Z2")
722 .nr_irqs = PXA_NR_IRQS, 722 .nr_irqs = PXA_NR_IRQS,
723 .init_irq = pxa27x_init_irq, 723 .init_irq = pxa27x_init_irq,
724 .handle_irq = pxa27x_handle_irq, 724 .handle_irq = pxa27x_handle_irq,
725 .timer = &pxa_timer, 725 .init_time = pxa_timer_init,
726 .init_machine = z2_init, 726 .init_machine = z2_init,
727 .restart = pxa_restart, 727 .restart = pxa_restart,
728MACHINE_END 728MACHINE_END
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index abd3aa145083..f5d436434566 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -910,7 +910,7 @@ MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
910 .nr_irqs = ZEUS_NR_IRQS, 910 .nr_irqs = ZEUS_NR_IRQS,
911 .init_irq = zeus_init_irq, 911 .init_irq = zeus_init_irq,
912 .handle_irq = pxa27x_handle_irq, 912 .handle_irq = pxa27x_handle_irq,
913 .timer = &pxa_timer, 913 .init_time = pxa_timer_init,
914 .init_machine = zeus_init, 914 .init_machine = zeus_init,
915 .restart = pxa_restart, 915 .restart = pxa_restart,
916MACHINE_END 916MACHINE_END
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 226279fac9d4..1f00d650ac27 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -428,7 +428,7 @@ MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
428 .nr_irqs = ZYLONITE_NR_IRQS, 428 .nr_irqs = ZYLONITE_NR_IRQS,
429 .init_irq = pxa3xx_init_irq, 429 .init_irq = pxa3xx_init_irq,
430 .handle_irq = pxa3xx_handle_irq, 430 .handle_irq = pxa3xx_handle_irq,
431 .timer = &pxa_timer, 431 .init_time = pxa_timer_init,
432 .init_machine = zylonite_init, 432 .init_machine = zylonite_init,
433 .restart = pxa_restart, 433 .restart = pxa_restart,
434MACHINE_END 434MACHINE_END
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 682467480588..1d5ee5c9a1dc 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -42,7 +42,6 @@
42#include <asm/mach/irq.h> 42#include <asm/mach/irq.h>
43#include <asm/mach/map.h> 43#include <asm/mach/map.h>
44 44
45#include <asm/hardware/gic.h>
46 45
47#include <mach/platform.h> 46#include <mach/platform.h>
48#include <mach/irqs.h> 47#include <mach/irqs.h>
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 300f7064465d..98e3052b7933 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -14,7 +14,6 @@
14#include <linux/io.h> 14#include <linux/io.h>
15 15
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17#include <asm/hardware/gic.h>
18#include <asm/mach-types.h> 17#include <asm/mach-types.h>
19#include <asm/smp_scu.h> 18#include <asm/smp_scu.h>
20 19
@@ -59,8 +58,6 @@ static void __init realview_smp_init_cpus(void)
59 58
60 for (i = 0; i < ncores; i++) 59 for (i = 0; i < ncores; i++)
61 set_cpu_possible(i, true); 60 set_cpu_possible(i, true);
62
63 set_smp_cross_call(gic_raise_softirq);
64} 61}
65 62
66static void __init realview_smp_prepare_cpus(unsigned int max_cpus) 63static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 28511d43637a..5b1c8bfe6fa9 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -27,13 +27,13 @@
27#include <linux/amba/mmci.h> 27#include <linux/amba/mmci.h>
28#include <linux/amba/pl022.h> 28#include <linux/amba/pl022.h>
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/irqchip/arm-gic.h>
30#include <linux/platform_data/clk-realview.h> 31#include <linux/platform_data/clk-realview.h>
31 32
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/irq.h> 34#include <asm/irq.h>
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/pgtable.h> 36#include <asm/pgtable.h>
36#include <asm/hardware/gic.h>
37#include <asm/hardware/cache-l2x0.h> 37#include <asm/hardware/cache-l2x0.h>
38#include <asm/smp_twd.h> 38#include <asm/smp_twd.h>
39 39
@@ -418,10 +418,6 @@ static void __init realview_eb_timer_init(void)
418 realview_eb_twd_init(); 418 realview_eb_twd_init();
419} 419}
420 420
421static struct sys_timer realview_eb_timer = {
422 .init = realview_eb_timer_init,
423};
424
425static void realview_eb_restart(char mode, const char *cmd) 421static void realview_eb_restart(char mode, const char *cmd)
426{ 422{
427 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 423 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
@@ -472,8 +468,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
472 .map_io = realview_eb_map_io, 468 .map_io = realview_eb_map_io,
473 .init_early = realview_init_early, 469 .init_early = realview_init_early,
474 .init_irq = gic_init_irq, 470 .init_irq = gic_init_irq,
475 .timer = &realview_eb_timer, 471 .init_time = realview_eb_timer_init,
476 .handle_irq = gic_handle_irq,
477 .init_machine = realview_eb_init, 472 .init_machine = realview_eb_init,
478#ifdef CONFIG_ZONE_DMA 473#ifdef CONFIG_ZONE_DMA
479 .dma_zone_size = SZ_256M, 474 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 07d6672ddae7..d5e83a1f6982 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -29,13 +29,13 @@
29#include <linux/mtd/physmap.h> 29#include <linux/mtd/physmap.h>
30#include <linux/mtd/partitions.h> 30#include <linux/mtd/partitions.h>
31#include <linux/io.h> 31#include <linux/io.h>
32#include <linux/irqchip/arm-gic.h>
32#include <linux/platform_data/clk-realview.h> 33#include <linux/platform_data/clk-realview.h>
33 34
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35#include <asm/irq.h> 36#include <asm/irq.h>
36#include <asm/mach-types.h> 37#include <asm/mach-types.h>
37#include <asm/pgtable.h> 38#include <asm/pgtable.h>
38#include <asm/hardware/gic.h>
39#include <asm/hardware/cache-l2x0.h> 39#include <asm/hardware/cache-l2x0.h>
40 40
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
@@ -329,10 +329,6 @@ static void __init realview_pb1176_timer_init(void)
329 realview_timer_init(IRQ_DC1176_TIMER0); 329 realview_timer_init(IRQ_DC1176_TIMER0);
330} 330}
331 331
332static struct sys_timer realview_pb1176_timer = {
333 .init = realview_pb1176_timer_init,
334};
335
336static void realview_pb1176_restart(char mode, const char *cmd) 332static void realview_pb1176_restart(char mode, const char *cmd)
337{ 333{
338 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 334 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
@@ -384,8 +380,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
384 .map_io = realview_pb1176_map_io, 380 .map_io = realview_pb1176_map_io,
385 .init_early = realview_init_early, 381 .init_early = realview_init_early,
386 .init_irq = gic_init_irq, 382 .init_irq = gic_init_irq,
387 .timer = &realview_pb1176_timer, 383 .init_time = realview_pb1176_timer_init,
388 .handle_irq = gic_handle_irq,
389 .init_machine = realview_pb1176_init, 384 .init_machine = realview_pb1176_init,
390#ifdef CONFIG_ZONE_DMA 385#ifdef CONFIG_ZONE_DMA
391 .dma_zone_size = SZ_256M, 386 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 7ed53d75350f..c3cfe213b5e6 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -27,13 +27,13 @@
27#include <linux/amba/mmci.h> 27#include <linux/amba/mmci.h>
28#include <linux/amba/pl022.h> 28#include <linux/amba/pl022.h>
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/irqchip/arm-gic.h>
30#include <linux/platform_data/clk-realview.h> 31#include <linux/platform_data/clk-realview.h>
31 32
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/irq.h> 34#include <asm/irq.h>
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/pgtable.h> 36#include <asm/pgtable.h>
36#include <asm/hardware/gic.h>
37#include <asm/hardware/cache-l2x0.h> 37#include <asm/hardware/cache-l2x0.h>
38#include <asm/smp_twd.h> 38#include <asm/smp_twd.h>
39 39
@@ -316,10 +316,6 @@ static void __init realview_pb11mp_timer_init(void)
316 realview_pb11mp_twd_init(); 316 realview_pb11mp_twd_init();
317} 317}
318 318
319static struct sys_timer realview_pb11mp_timer = {
320 .init = realview_pb11mp_timer_init,
321};
322
323static void realview_pb11mp_restart(char mode, const char *cmd) 319static void realview_pb11mp_restart(char mode, const char *cmd)
324{ 320{
325 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 321 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
@@ -367,8 +363,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
367 .map_io = realview_pb11mp_map_io, 363 .map_io = realview_pb11mp_map_io,
368 .init_early = realview_init_early, 364 .init_early = realview_init_early,
369 .init_irq = gic_init_irq, 365 .init_irq = gic_init_irq,
370 .timer = &realview_pb11mp_timer, 366 .init_time = realview_pb11mp_timer_init,
371 .handle_irq = gic_handle_irq,
372 .init_machine = realview_pb11mp_init, 367 .init_machine = realview_pb11mp_init,
373#ifdef CONFIG_ZONE_DMA 368#ifdef CONFIG_ZONE_DMA
374 .dma_zone_size = SZ_256M, 369 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 9992431b8a15..dde652a59620 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -27,12 +27,12 @@
27#include <linux/amba/mmci.h> 27#include <linux/amba/mmci.h>
28#include <linux/amba/pl022.h> 28#include <linux/amba/pl022.h>
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/irqchip/arm-gic.h>
30#include <linux/platform_data/clk-realview.h> 31#include <linux/platform_data/clk-realview.h>
31 32
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34#include <asm/pgtable.h> 35#include <asm/pgtable.h>
35#include <asm/hardware/gic.h>
36 36
37#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
38#include <asm/mach/map.h> 38#include <asm/mach/map.h>
@@ -264,10 +264,6 @@ static void __init realview_pba8_timer_init(void)
264 realview_timer_init(IRQ_PBA8_TIMER0_1); 264 realview_timer_init(IRQ_PBA8_TIMER0_1);
265} 265}
266 266
267static struct sys_timer realview_pba8_timer = {
268 .init = realview_pba8_timer_init,
269};
270
271static void realview_pba8_restart(char mode, const char *cmd) 267static void realview_pba8_restart(char mode, const char *cmd)
272{ 268{
273 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 269 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
@@ -308,8 +304,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
308 .map_io = realview_pba8_map_io, 304 .map_io = realview_pba8_map_io,
309 .init_early = realview_init_early, 305 .init_early = realview_init_early,
310 .init_irq = gic_init_irq, 306 .init_irq = gic_init_irq,
311 .timer = &realview_pba8_timer, 307 .init_time = realview_pba8_timer_init,
312 .handle_irq = gic_handle_irq,
313 .init_machine = realview_pba8_init, 308 .init_machine = realview_pba8_init,
314#ifdef CONFIG_ZONE_DMA 309#ifdef CONFIG_ZONE_DMA
315 .dma_zone_size = SZ_256M, 310 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 4f486f05108a..54f0185b01e3 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -26,13 +26,13 @@
26#include <linux/amba/mmci.h> 26#include <linux/amba/mmci.h>
27#include <linux/amba/pl022.h> 27#include <linux/amba/pl022.h>
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/irqchip/arm-gic.h>
29#include <linux/platform_data/clk-realview.h> 30#include <linux/platform_data/clk-realview.h>
30 31
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/smp_twd.h> 34#include <asm/smp_twd.h>
34#include <asm/pgtable.h> 35#include <asm/pgtable.h>
35#include <asm/hardware/gic.h>
36#include <asm/hardware/cache-l2x0.h> 36#include <asm/hardware/cache-l2x0.h>
37 37
38#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
@@ -324,10 +324,6 @@ static void __init realview_pbx_timer_init(void)
324 realview_pbx_twd_init(); 324 realview_pbx_twd_init();
325} 325}
326 326
327static struct sys_timer realview_pbx_timer = {
328 .init = realview_pbx_timer_init,
329};
330
331static void realview_pbx_fixup(struct tag *tags, char **from, 327static void realview_pbx_fixup(struct tag *tags, char **from,
332 struct meminfo *meminfo) 328 struct meminfo *meminfo)
333{ 329{
@@ -404,8 +400,7 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
404 .map_io = realview_pbx_map_io, 400 .map_io = realview_pbx_map_io,
405 .init_early = realview_init_early, 401 .init_early = realview_init_early,
406 .init_irq = gic_init_irq, 402 .init_irq = gic_init_irq,
407 .timer = &realview_pbx_timer, 403 .init_time = realview_pbx_timer_init,
408 .handle_irq = gic_handle_irq,
409 .init_machine = realview_pbx_init, 404 .init_machine = realview_pbx_init,
410#ifdef CONFIG_ZONE_DMA 405#ifdef CONFIG_ZONE_DMA
411 .dma_zone_size = SZ_256M, 406 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index f3fa259ce01f..a302cf5e0fc7 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -211,7 +211,7 @@ static void rpc_restart(char mode, const char *cmd)
211 soft_restart(0); 211 soft_restart(0);
212} 212}
213 213
214extern struct sys_timer ioc_timer; 214void ioc_timer_init(void);
215 215
216MACHINE_START(RISCPC, "Acorn-RiscPC") 216MACHINE_START(RISCPC, "Acorn-RiscPC")
217 /* Maintainer: Russell King */ 217 /* Maintainer: Russell King */
@@ -220,6 +220,6 @@ MACHINE_START(RISCPC, "Acorn-RiscPC")
220 .reserve_lp1 = 1, 220 .reserve_lp1 = 1,
221 .map_io = rpc_map_io, 221 .map_io = rpc_map_io,
222 .init_irq = rpc_init_irq, 222 .init_irq = rpc_init_irq,
223 .timer = &ioc_timer, 223 .init_time = ioc_timer_init,
224 .restart = rpc_restart, 224 .restart = rpc_restart,
225MACHINE_END 225MACHINE_END
diff --git a/arch/arm/mach-rpc/time.c b/arch/arm/mach-rpc/time.c
index 581fca934bb3..9a6def14df01 100644
--- a/arch/arm/mach-rpc/time.c
+++ b/arch/arm/mach-rpc/time.c
@@ -24,7 +24,7 @@
24 24
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
26 26
27unsigned long ioc_timer_gettimeoffset(void) 27static u32 ioc_timer_gettimeoffset(void)
28{ 28{
29 unsigned int count1, count2, status; 29 unsigned int count1, count2, status;
30 long offset; 30 long offset;
@@ -56,7 +56,7 @@ unsigned long ioc_timer_gettimeoffset(void)
56 } 56 }
57 57
58 offset = (LATCH - offset) * (tick_nsec / 1000); 58 offset = (LATCH - offset) * (tick_nsec / 1000);
59 return (offset + LATCH/2) / LATCH; 59 return ((offset + LATCH/2) / LATCH) * 1000;
60} 60}
61 61
62void __init ioctime_init(void) 62void __init ioctime_init(void)
@@ -82,14 +82,9 @@ static struct irqaction ioc_timer_irq = {
82/* 82/*
83 * Set up timer interrupt. 83 * Set up timer interrupt.
84 */ 84 */
85static void __init ioc_timer_init(void) 85void __init ioc_timer_init(void)
86{ 86{
87 arch_gettimeoffset = ioc_timer_gettimeoffset;
87 ioctime_init(); 88 ioctime_init();
88 setup_irq(IRQ_TIMER0, &ioc_timer_irq); 89 setup_irq(IRQ_TIMER0, &ioc_timer_irq);
89} 90}
90
91struct sys_timer ioc_timer = {
92 .init = ioc_timer_init,
93 .offset = ioc_timer_gettimeoffset,
94};
95
diff --git a/arch/arm/mach-s3c24xx/mach-amlm5900.c b/arch/arm/mach-s3c24xx/mach-amlm5900.c
index f4ad99c1e476..0e0279e79150 100644
--- a/arch/arm/mach-s3c24xx/mach-amlm5900.c
+++ b/arch/arm/mach-s3c24xx/mach-amlm5900.c
@@ -237,6 +237,6 @@ MACHINE_START(AML_M5900, "AML_M5900")
237 .map_io = amlm5900_map_io, 237 .map_io = amlm5900_map_io,
238 .init_irq = s3c24xx_init_irq, 238 .init_irq = s3c24xx_init_irq,
239 .init_machine = amlm5900_init, 239 .init_machine = amlm5900_init,
240 .timer = &s3c24xx_timer, 240 .init_time = s3c24xx_timer_init,
241 .restart = s3c2410_restart, 241 .restart = s3c2410_restart,
242MACHINE_END 242MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c
index 1ee8c4638743..85eefab881af 100644
--- a/arch/arm/mach-s3c24xx/mach-anubis.c
+++ b/arch/arm/mach-s3c24xx/mach-anubis.c
@@ -448,6 +448,6 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
448 .map_io = anubis_map_io, 448 .map_io = anubis_map_io,
449 .init_machine = anubis_init, 449 .init_machine = anubis_init,
450 .init_irq = s3c24xx_init_irq, 450 .init_irq = s3c24xx_init_irq,
451 .timer = &s3c24xx_timer, 451 .init_time = s3c24xx_timer_init,
452 .restart = s3c244x_restart, 452 .restart = s3c244x_restart,
453MACHINE_END 453MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c
index 00381fe5de32..b31c4aa724f2 100644
--- a/arch/arm/mach-s3c24xx/mach-at2440evb.c
+++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c
@@ -210,6 +210,6 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
210 .map_io = at2440evb_map_io, 210 .map_io = at2440evb_map_io,
211 .init_machine = at2440evb_init, 211 .init_machine = at2440evb_init,
212 .init_irq = s3c24xx_init_irq, 212 .init_irq = s3c24xx_init_irq,
213 .timer = &s3c24xx_timer, 213 .init_time = s3c24xx_timer_init,
214 .restart = s3c244x_restart, 214 .restart = s3c244x_restart,
215MACHINE_END 215MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c
index 6a30ce7e4aa7..526964c19dd8 100644
--- a/arch/arm/mach-s3c24xx/mach-bast.c
+++ b/arch/arm/mach-s3c24xx/mach-bast.c
@@ -612,6 +612,6 @@ MACHINE_START(BAST, "Simtec-BAST")
612 .map_io = bast_map_io, 612 .map_io = bast_map_io,
613 .init_irq = s3c24xx_init_irq, 613 .init_irq = s3c24xx_init_irq,
614 .init_machine = bast_init, 614 .init_machine = bast_init,
615 .timer = &s3c24xx_timer, 615 .init_time = s3c24xx_timer_init,
616 .restart = s3c2410_restart, 616 .restart = s3c2410_restart,
617MACHINE_END 617MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index 973b87ca87f4..fb5d3b3b53db 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -595,6 +595,6 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
595 .map_io = gta02_map_io, 595 .map_io = gta02_map_io,
596 .init_irq = s3c24xx_init_irq, 596 .init_irq = s3c24xx_init_irq,
597 .init_machine = gta02_machine_init, 597 .init_machine = gta02_machine_init,
598 .timer = &s3c24xx_timer, 598 .init_time = s3c24xx_timer_init,
599 .restart = s3c244x_restart, 599 .restart = s3c244x_restart,
600MACHINE_END 600MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c
index b23dd1b106e8..2eb09e27c13c 100644
--- a/arch/arm/mach-s3c24xx/mach-h1940.c
+++ b/arch/arm/mach-s3c24xx/mach-h1940.c
@@ -746,6 +746,6 @@ MACHINE_START(H1940, "IPAQ-H1940")
746 .reserve = h1940_reserve, 746 .reserve = h1940_reserve,
747 .init_irq = h1940_init_irq, 747 .init_irq = h1940_init_irq,
748 .init_machine = h1940_init, 748 .init_machine = h1940_init,
749 .timer = &s3c24xx_timer, 749 .init_time = s3c24xx_timer_init,
750 .restart = s3c2410_restart, 750 .restart = s3c2410_restart,
751MACHINE_END 751MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c
index c9954e26b492..d7a172555238 100644
--- a/arch/arm/mach-s3c24xx/mach-jive.c
+++ b/arch/arm/mach-s3c24xx/mach-jive.c
@@ -661,6 +661,6 @@ MACHINE_START(JIVE, "JIVE")
661 .init_irq = s3c24xx_init_irq, 661 .init_irq = s3c24xx_init_irq,
662 .map_io = jive_map_io, 662 .map_io = jive_map_io,
663 .init_machine = jive_machine_init, 663 .init_machine = jive_machine_init,
664 .timer = &s3c24xx_timer, 664 .init_time = s3c24xx_timer_init,
665 .restart = s3c2412_restart, 665 .restart = s3c2412_restart,
666MACHINE_END 666MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index a31d5b83e5f7..2db09ade9b50 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -688,6 +688,6 @@ MACHINE_START(MINI2440, "MINI2440")
688 .map_io = mini2440_map_io, 688 .map_io = mini2440_map_io,
689 .init_machine = mini2440_init, 689 .init_machine = mini2440_init,
690 .init_irq = s3c24xx_init_irq, 690 .init_irq = s3c24xx_init_irq,
691 .timer = &s3c24xx_timer, 691 .init_time = s3c24xx_timer_init,
692 .restart = s3c244x_restart, 692 .restart = s3c244x_restart,
693MACHINE_END 693MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-n30.c b/arch/arm/mach-s3c24xx/mach-n30.c
index c53a9bfe1417..d9d04b240295 100644
--- a/arch/arm/mach-s3c24xx/mach-n30.c
+++ b/arch/arm/mach-s3c24xx/mach-n30.c
@@ -589,7 +589,7 @@ MACHINE_START(N30, "Acer-N30")
589 Ben Dooks <ben-linux@fluff.org> 589 Ben Dooks <ben-linux@fluff.org>
590 */ 590 */
591 .atag_offset = 0x100, 591 .atag_offset = 0x100,
592 .timer = &s3c24xx_timer, 592 .init_time = s3c24xx_timer_init,
593 .init_machine = n30_init, 593 .init_machine = n30_init,
594 .init_irq = s3c24xx_init_irq, 594 .init_irq = s3c24xx_init_irq,
595 .map_io = n30_map_io, 595 .map_io = n30_map_io,
@@ -600,7 +600,7 @@ MACHINE_START(N35, "Acer-N35")
600 /* Maintainer: Christer Weinigel <christer@weinigel.se> 600 /* Maintainer: Christer Weinigel <christer@weinigel.se>
601 */ 601 */
602 .atag_offset = 0x100, 602 .atag_offset = 0x100,
603 .timer = &s3c24xx_timer, 603 .init_time = s3c24xx_timer_init,
604 .init_machine = n30_init, 604 .init_machine = n30_init,
605 .init_irq = s3c24xx_init_irq, 605 .init_irq = s3c24xx_init_irq,
606 .map_io = n30_map_io, 606 .map_io = n30_map_io,
diff --git a/arch/arm/mach-s3c24xx/mach-nexcoder.c b/arch/arm/mach-s3c24xx/mach-nexcoder.c
index a2b92b0898e2..a454e2461860 100644
--- a/arch/arm/mach-s3c24xx/mach-nexcoder.c
+++ b/arch/arm/mach-s3c24xx/mach-nexcoder.c
@@ -153,6 +153,6 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
153 .map_io = nexcoder_map_io, 153 .map_io = nexcoder_map_io,
154 .init_machine = nexcoder_init, 154 .init_machine = nexcoder_init,
155 .init_irq = s3c24xx_init_irq, 155 .init_irq = s3c24xx_init_irq,
156 .timer = &s3c24xx_timer, 156 .init_time = s3c24xx_timer_init,
157 .restart = s3c244x_restart, 157 .restart = s3c244x_restart,
158MACHINE_END 158MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c
index bb36d832bd3d..ba0f5b5ec19e 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris.c
@@ -428,6 +428,6 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
428 .map_io = osiris_map_io, 428 .map_io = osiris_map_io,
429 .init_irq = s3c24xx_init_irq, 429 .init_irq = s3c24xx_init_irq,
430 .init_machine = osiris_init, 430 .init_machine = osiris_init,
431 .timer = &s3c24xx_timer, 431 .init_time = s3c24xx_timer_init,
432 .restart = s3c244x_restart, 432 .restart = s3c244x_restart,
433MACHINE_END 433MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c
index bca39f0232b3..e0fdae93aa7b 100644
--- a/arch/arm/mach-s3c24xx/mach-otom.c
+++ b/arch/arm/mach-s3c24xx/mach-otom.c
@@ -118,6 +118,6 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1")
118 .map_io = otom11_map_io, 118 .map_io = otom11_map_io,
119 .init_machine = otom11_init, 119 .init_machine = otom11_init,
120 .init_irq = s3c24xx_init_irq, 120 .init_irq = s3c24xx_init_irq,
121 .timer = &s3c24xx_timer, 121 .init_time = s3c24xx_timer_init,
122 .restart = s3c2410_restart, 122 .restart = s3c2410_restart,
123MACHINE_END 123MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c
index 7b6ba13d7285..56175f0941b1 100644
--- a/arch/arm/mach-s3c24xx/mach-qt2410.c
+++ b/arch/arm/mach-s3c24xx/mach-qt2410.c
@@ -343,6 +343,6 @@ MACHINE_START(QT2410, "QT2410")
343 .map_io = qt2410_map_io, 343 .map_io = qt2410_map_io,
344 .init_irq = s3c24xx_init_irq, 344 .init_irq = s3c24xx_init_irq,
345 .init_machine = qt2410_machine_init, 345 .init_machine = qt2410_machine_init,
346 .timer = &s3c24xx_timer, 346 .init_time = s3c24xx_timer_init,
347 .restart = s3c2410_restart, 347 .restart = s3c2410_restart,
348MACHINE_END 348MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index 0606f2faaa5c..e14ec7105a6d 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -814,6 +814,6 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
814 .reserve = rx1950_reserve, 814 .reserve = rx1950_reserve,
815 .init_irq = s3c24xx_init_irq, 815 .init_irq = s3c24xx_init_irq,
816 .init_machine = rx1950_init_machine, 816 .init_machine = rx1950_init_machine,
817 .timer = &s3c24xx_timer, 817 .init_time = s3c24xx_timer_init,
818 .restart = s3c244x_restart, 818 .restart = s3c244x_restart,
819MACHINE_END 819MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c
index dacbb9a2122a..d00caa8de922 100644
--- a/arch/arm/mach-s3c24xx/mach-rx3715.c
+++ b/arch/arm/mach-s3c24xx/mach-rx3715.c
@@ -212,6 +212,6 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
212 .reserve = rx3715_reserve, 212 .reserve = rx3715_reserve,
213 .init_irq = rx3715_init_irq, 213 .init_irq = rx3715_init_irq,
214 .init_machine = rx3715_init_machine, 214 .init_machine = rx3715_init_machine,
215 .timer = &s3c24xx_timer, 215 .init_time = s3c24xx_timer_init,
216 .restart = s3c244x_restart, 216 .restart = s3c244x_restart,
217MACHINE_END 217MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2410.c b/arch/arm/mach-s3c24xx/mach-smdk2410.c
index 82796b97cb04..e184bfa9613a 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2410.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2410.c
@@ -117,6 +117,6 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc
117 .map_io = smdk2410_map_io, 117 .map_io = smdk2410_map_io,
118 .init_irq = s3c24xx_init_irq, 118 .init_irq = s3c24xx_init_irq,
119 .init_machine = smdk2410_init, 119 .init_machine = smdk2410_init,
120 .timer = &s3c24xx_timer, 120 .init_time = s3c24xx_timer_init,
121 .restart = s3c2410_restart, 121 .restart = s3c2410_restart,
122MACHINE_END 122MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c
index ce99fd8bbbc5..69f356e83790 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2413.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c
@@ -133,7 +133,7 @@ MACHINE_START(S3C2413, "S3C2413")
133 .init_irq = s3c24xx_init_irq, 133 .init_irq = s3c24xx_init_irq,
134 .map_io = smdk2413_map_io, 134 .map_io = smdk2413_map_io,
135 .init_machine = smdk2413_machine_init, 135 .init_machine = smdk2413_machine_init,
136 .timer = &s3c24xx_timer, 136 .init_time = s3c24xx_timer_init,
137 .restart = s3c2412_restart, 137 .restart = s3c2412_restart,
138MACHINE_END 138MACHINE_END
139 139
@@ -145,7 +145,7 @@ MACHINE_START(SMDK2412, "SMDK2412")
145 .init_irq = s3c24xx_init_irq, 145 .init_irq = s3c24xx_init_irq,
146 .map_io = smdk2413_map_io, 146 .map_io = smdk2413_map_io,
147 .init_machine = smdk2413_machine_init, 147 .init_machine = smdk2413_machine_init,
148 .timer = &s3c24xx_timer, 148 .init_time = s3c24xx_timer_init,
149 .restart = s3c2412_restart, 149 .restart = s3c2412_restart,
150MACHINE_END 150MACHINE_END
151 151
@@ -157,6 +157,6 @@ MACHINE_START(SMDK2413, "SMDK2413")
157 .init_irq = s3c24xx_init_irq, 157 .init_irq = s3c24xx_init_irq,
158 .map_io = smdk2413_map_io, 158 .map_io = smdk2413_map_io,
159 .init_machine = smdk2413_machine_init, 159 .init_machine = smdk2413_machine_init,
160 .timer = &s3c24xx_timer, 160 .init_time = s3c24xx_timer_init,
161 .restart = s3c2412_restart, 161 .restart = s3c2412_restart,
162MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c
index f30d7fccbfee..fe160c7f4b0a 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2416.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c
@@ -254,6 +254,6 @@ MACHINE_START(SMDK2416, "SMDK2416")
254 .init_irq = s3c24xx_init_irq, 254 .init_irq = s3c24xx_init_irq,
255 .map_io = smdk2416_map_io, 255 .map_io = smdk2416_map_io,
256 .init_machine = smdk2416_machine_init, 256 .init_machine = smdk2416_machine_init,
257 .timer = &s3c24xx_timer, 257 .init_time = s3c24xx_timer_init,
258 .restart = s3c2416_restart, 258 .restart = s3c2416_restart,
259MACHINE_END 259MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c b/arch/arm/mach-s3c24xx/mach-smdk2440.c
index b7ff882c6ce6..a8fdafedc4c1 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2440.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c
@@ -182,6 +182,6 @@ MACHINE_START(S3C2440, "SMDK2440")
182 .init_irq = s3c24xx_init_irq, 182 .init_irq = s3c24xx_init_irq,
183 .map_io = smdk2440_map_io, 183 .map_io = smdk2440_map_io,
184 .init_machine = smdk2440_machine_init, 184 .init_machine = smdk2440_machine_init,
185 .timer = &s3c24xx_timer, 185 .init_time = s3c24xx_timer_init,
186 .restart = s3c244x_restart, 186 .restart = s3c244x_restart,
187MACHINE_END 187MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c
index 2568656f046f..7830d7004306 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2443.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c
@@ -144,6 +144,6 @@ MACHINE_START(SMDK2443, "SMDK2443")
144 .init_irq = s3c24xx_init_irq, 144 .init_irq = s3c24xx_init_irq,
145 .map_io = smdk2443_map_io, 145 .map_io = smdk2443_map_io,
146 .init_machine = smdk2443_machine_init, 146 .init_machine = smdk2443_machine_init,
147 .timer = &s3c24xx_timer, 147 .init_time = s3c24xx_timer_init,
148 .restart = s3c2443_restart, 148 .restart = s3c2443_restart,
149MACHINE_END 149MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-tct_hammer.c b/arch/arm/mach-s3c24xx/mach-tct_hammer.c
index 495bf5cf52e9..24b3d79e7b2c 100644
--- a/arch/arm/mach-s3c24xx/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c24xx/mach-tct_hammer.c
@@ -149,6 +149,6 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER")
149 .map_io = tct_hammer_map_io, 149 .map_io = tct_hammer_map_io,
150 .init_irq = s3c24xx_init_irq, 150 .init_irq = s3c24xx_init_irq,
151 .init_machine = tct_hammer_init, 151 .init_machine = tct_hammer_init,
152 .timer = &s3c24xx_timer, 152 .init_time = s3c24xx_timer_init,
153 .restart = s3c2410_restart, 153 .restart = s3c2410_restart,
154MACHINE_END 154MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c
index 14d5b12e388c..dda21a01e3cc 100644
--- a/arch/arm/mach-s3c24xx/mach-vr1000.c
+++ b/arch/arm/mach-s3c24xx/mach-vr1000.c
@@ -357,6 +357,6 @@ MACHINE_START(VR1000, "Thorcom-VR1000")
357 .map_io = vr1000_map_io, 357 .map_io = vr1000_map_io,
358 .init_machine = vr1000_init, 358 .init_machine = vr1000_init,
359 .init_irq = s3c24xx_init_irq, 359 .init_irq = s3c24xx_init_irq,
360 .timer = &s3c24xx_timer, 360 .init_time = s3c24xx_timer_init,
361 .restart = s3c2410_restart, 361 .restart = s3c2410_restart,
362MACHINE_END 362MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c
index f1d44ae11833..7fe7d4f60419 100644
--- a/arch/arm/mach-s3c24xx/mach-vstms.c
+++ b/arch/arm/mach-s3c24xx/mach-vstms.c
@@ -161,6 +161,6 @@ MACHINE_START(VSTMS, "VSTMS")
161 .init_irq = s3c24xx_init_irq, 161 .init_irq = s3c24xx_init_irq,
162 .init_machine = vstms_init, 162 .init_machine = vstms_init,
163 .map_io = vstms_map_io, 163 .map_io = vstms_map_io,
164 .timer = &s3c24xx_timer, 164 .init_time = s3c24xx_timer_init,
165 .restart = s3c2412_restart, 165 .restart = s3c2412_restart,
166MACHINE_END 166MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index aef303b8997e..0b9c0ba44834 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -25,10 +25,10 @@
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/irqchip/arm-vic.h>
28 29
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
31#include <asm/hardware/vic.h>
32#include <asm/system_misc.h> 32#include <asm/system_misc.h>
33 33
34#include <mach/map.h> 34#include <mach/map.h>
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-irq.h b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
index bcce68a0bb75..6a1127891c87 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
@@ -15,6 +15,5 @@
15#ifndef __ASM_ARCH_REGS_IRQ_H 15#ifndef __ASM_ARCH_REGS_IRQ_H
16#define __ASM_ARCH_REGS_IRQ_H __FILE__ 16#define __ASM_ARCH_REGS_IRQ_H __FILE__
17 17
18#include <asm/hardware/vic.h>
19 18
20#endif /* __ASM_ARCH_6400_REGS_IRQ_H */ 19#endif /* __ASM_ARCH_6400_REGS_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/tick.h b/arch/arm/mach-s3c64xx/include/mach/tick.h
index ebe18a9469b8..db9c1b1d56a4 100644
--- a/arch/arm/mach-s3c64xx/include/mach/tick.h
+++ b/arch/arm/mach-s3c64xx/include/mach/tick.h
@@ -15,6 +15,8 @@
15#ifndef __ASM_ARCH_TICK_H 15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__ 16#define __ASM_ARCH_TICK_H __FILE__
17 17
18#include <linux/irqchip/arm-vic.h>
19
18/* note, the timer interrutps turn up in 2 places, the vic and then 20/* note, the timer interrutps turn up in 2 places, the vic and then
19 * the timer block. We take the VIC as the base at the moment. 21 * the timer block. We take the VIC as the base at the moment.
20 */ 22 */
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 99e82ac81b69..afeae0b5bb28 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -31,7 +31,6 @@
31#include <video/platform_lcd.h> 31#include <video/platform_lcd.h>
32#include <video/samsung_fimd.h> 32#include <video/samsung_fimd.h>
33 33
34#include <asm/hardware/vic.h>
35#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
36#include <asm/mach/map.h> 35#include <asm/mach/map.h>
37#include <asm/mach/irq.h> 36#include <asm/mach/irq.h>
@@ -230,10 +229,9 @@ MACHINE_START(ANW6410, "A&W6410")
230 .atag_offset = 0x100, 229 .atag_offset = 0x100,
231 230
232 .init_irq = s3c6410_init_irq, 231 .init_irq = s3c6410_init_irq,
233 .handle_irq = vic_handle_irq,
234 .map_io = anw6410_map_io, 232 .map_io = anw6410_map_io,
235 .init_machine = anw6410_machine_init, 233 .init_machine = anw6410_machine_init,
236 .init_late = s3c64xx_init_late, 234 .init_late = s3c64xx_init_late,
237 .timer = &s3c24xx_timer, 235 .init_time = s3c24xx_timer_init,
238 .restart = s3c64xx_restart, 236 .restart = s3c64xx_restart,
239MACHINE_END 237MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index bf6311a28f3d..5b6adc7f1d39 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -42,7 +42,6 @@
42 42
43#include <sound/wm1250-ev1.h> 43#include <sound/wm1250-ev1.h>
44 44
45#include <asm/hardware/vic.h>
46#include <asm/mach/arch.h> 45#include <asm/mach/arch.h>
47#include <asm/mach-types.h> 46#include <asm/mach-types.h>
48 47
@@ -867,10 +866,9 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
867 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ 866 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
868 .atag_offset = 0x100, 867 .atag_offset = 0x100,
869 .init_irq = s3c6410_init_irq, 868 .init_irq = s3c6410_init_irq,
870 .handle_irq = vic_handle_irq,
871 .map_io = crag6410_map_io, 869 .map_io = crag6410_map_io,
872 .init_machine = crag6410_machine_init, 870 .init_machine = crag6410_machine_init,
873 .init_late = s3c64xx_init_late, 871 .init_late = s3c64xx_init_late,
874 .timer = &s3c24xx_timer, 872 .init_time = s3c24xx_timer_init,
875 .restart = s3c64xx_restart, 873 .restart = s3c64xx_restart,
876MACHINE_END 874MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 2b144893ddc4..7212eb9cfeb9 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -30,7 +30,6 @@
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <mach/map.h> 31#include <mach/map.h>
32 32
33#include <asm/hardware/vic.h>
34#include <asm/irq.h> 33#include <asm/irq.h>
35#include <asm/mach-types.h> 34#include <asm/mach-types.h>
36 35
@@ -273,10 +272,9 @@ MACHINE_START(HMT, "Airgoo-HMT")
273 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */ 272 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */
274 .atag_offset = 0x100, 273 .atag_offset = 0x100,
275 .init_irq = s3c6410_init_irq, 274 .init_irq = s3c6410_init_irq,
276 .handle_irq = vic_handle_irq,
277 .map_io = hmt_map_io, 275 .map_io = hmt_map_io,
278 .init_machine = hmt_machine_init, 276 .init_machine = hmt_machine_init,
279 .init_late = s3c64xx_init_late, 277 .init_late = s3c64xx_init_late,
280 .timer = &s3c24xx_timer, 278 .init_time = s3c24xx_timer_init,
281 .restart = s3c64xx_restart, 279 .restart = s3c64xx_restart,
282MACHINE_END 280MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 07c349cca333..e173e6e98228 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -24,7 +24,6 @@
24#include <linux/serial_core.h> 24#include <linux/serial_core.h>
25#include <linux/types.h> 25#include <linux/types.h>
26 26
27#include <asm/hardware/vic.h>
28#include <asm/mach-types.h> 27#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 29#include <asm/mach/map.h>
@@ -352,10 +351,9 @@ MACHINE_START(MINI6410, "MINI6410")
352 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ 351 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
353 .atag_offset = 0x100, 352 .atag_offset = 0x100,
354 .init_irq = s3c6410_init_irq, 353 .init_irq = s3c6410_init_irq,
355 .handle_irq = vic_handle_irq,
356 .map_io = mini6410_map_io, 354 .map_io = mini6410_map_io,
357 .init_machine = mini6410_machine_init, 355 .init_machine = mini6410_machine_init,
358 .init_late = s3c64xx_init_late, 356 .init_late = s3c64xx_init_late,
359 .timer = &s3c24xx_timer, 357 .init_time = s3c24xx_timer_init,
360 .restart = s3c64xx_restart, 358 .restart = s3c64xx_restart,
361MACHINE_END 359MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index e5f9a79b535d..8d3cedd995ff 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -26,7 +26,6 @@
26#include <video/platform_lcd.h> 26#include <video/platform_lcd.h>
27#include <video/samsung_fimd.h> 27#include <video/samsung_fimd.h>
28 28
29#include <asm/hardware/vic.h>
30#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 30#include <asm/mach/map.h>
32#include <asm/mach/irq.h> 31#include <asm/mach/irq.h>
@@ -101,10 +100,9 @@ MACHINE_START(NCP, "NCP")
101 /* Maintainer: Samsung Electronics */ 100 /* Maintainer: Samsung Electronics */
102 .atag_offset = 0x100, 101 .atag_offset = 0x100,
103 .init_irq = s3c6410_init_irq, 102 .init_irq = s3c6410_init_irq,
104 .handle_irq = vic_handle_irq,
105 .map_io = ncp_map_io, 103 .map_io = ncp_map_io,
106 .init_machine = ncp_machine_init, 104 .init_machine = ncp_machine_init,
107 .init_late = s3c64xx_init_late, 105 .init_late = s3c64xx_init_late,
108 .timer = &s3c24xx_timer, 106 .init_time = s3c24xx_timer_init,
109 .restart = s3c64xx_restart, 107 .restart = s3c64xx_restart,
110MACHINE_END 108MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 7476f7c722ab..4d0d47a66930 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -25,7 +25,6 @@
25#include <linux/serial_core.h> 25#include <linux/serial_core.h>
26#include <linux/types.h> 26#include <linux/types.h>
27 27
28#include <asm/hardware/vic.h>
29#include <asm/mach-types.h> 28#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 30#include <asm/mach/map.h>
@@ -331,10 +330,9 @@ MACHINE_START(REAL6410, "REAL6410")
331 .atag_offset = 0x100, 330 .atag_offset = 0x100,
332 331
333 .init_irq = s3c6410_init_irq, 332 .init_irq = s3c6410_init_irq,
334 .handle_irq = vic_handle_irq,
335 .map_io = real6410_map_io, 333 .map_io = real6410_map_io,
336 .init_machine = real6410_machine_init, 334 .init_machine = real6410_machine_init,
337 .init_late = s3c64xx_init_late, 335 .init_late = s3c64xx_init_late,
338 .timer = &s3c24xx_timer, 336 .init_time = s3c24xx_timer_init,
339 .restart = s3c64xx_restart, 337 .restart = s3c64xx_restart,
340MACHINE_END 338MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 96d6da2b6b5f..ca2afcfce573 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -17,7 +17,6 @@
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23 22
@@ -153,10 +152,9 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
153 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 152 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
154 .atag_offset = 0x100, 153 .atag_offset = 0x100,
155 .init_irq = s3c6410_init_irq, 154 .init_irq = s3c6410_init_irq,
156 .handle_irq = vic_handle_irq,
157 .map_io = smartq_map_io, 155 .map_io = smartq_map_io,
158 .init_machine = smartq5_machine_init, 156 .init_machine = smartq5_machine_init,
159 .init_late = s3c64xx_init_late, 157 .init_late = s3c64xx_init_late,
160 .timer = &s3c24xx_timer, 158 .init_time = s3c24xx_timer_init,
161 .restart = s3c64xx_restart, 159 .restart = s3c64xx_restart,
162MACHINE_END 160MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index 7d1167bdc921..37bb0c632a5e 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -17,7 +17,6 @@
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23 22
@@ -169,10 +168,9 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
169 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 168 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
170 .atag_offset = 0x100, 169 .atag_offset = 0x100,
171 .init_irq = s3c6410_init_irq, 170 .init_irq = s3c6410_init_irq,
172 .handle_irq = vic_handle_irq,
173 .map_io = smartq_map_io, 171 .map_io = smartq_map_io,
174 .init_machine = smartq7_machine_init, 172 .init_machine = smartq7_machine_init,
175 .init_late = s3c64xx_init_late, 173 .init_late = s3c64xx_init_late,
176 .timer = &s3c24xx_timer, 174 .init_time = s3c24xx_timer_init,
177 .restart = s3c64xx_restart, 175 .restart = s3c64xx_restart,
178MACHINE_END 176MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index a928fae5694e..a392869c8342 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -22,7 +22,6 @@
22 22
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <asm/hardware/vic.h>
26#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
28#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
@@ -90,10 +89,9 @@ MACHINE_START(SMDK6400, "SMDK6400")
90 .atag_offset = 0x100, 89 .atag_offset = 0x100,
91 90
92 .init_irq = s3c6400_init_irq, 91 .init_irq = s3c6400_init_irq,
93 .handle_irq = vic_handle_irq,
94 .map_io = smdk6400_map_io, 92 .map_io = smdk6400_map_io,
95 .init_machine = smdk6400_machine_init, 93 .init_machine = smdk6400_machine_init,
96 .init_late = s3c64xx_init_late, 94 .init_late = s3c64xx_init_late,
97 .timer = &s3c24xx_timer, 95 .init_time = s3c24xx_timer_init,
98 .restart = s3c64xx_restart, 96 .restart = s3c64xx_restart,
99MACHINE_END 97MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 574a9eef588d..1663d10ba02a 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -45,7 +45,6 @@
45#include <video/platform_lcd.h> 45#include <video/platform_lcd.h>
46#include <video/samsung_fimd.h> 46#include <video/samsung_fimd.h>
47 47
48#include <asm/hardware/vic.h>
49#include <asm/mach/arch.h> 48#include <asm/mach/arch.h>
50#include <asm/mach/map.h> 49#include <asm/mach/map.h>
51#include <asm/mach/irq.h> 50#include <asm/mach/irq.h>
@@ -700,10 +699,9 @@ MACHINE_START(SMDK6410, "SMDK6410")
700 .atag_offset = 0x100, 699 .atag_offset = 0x100,
701 700
702 .init_irq = s3c6410_init_irq, 701 .init_irq = s3c6410_init_irq,
703 .handle_irq = vic_handle_irq,
704 .map_io = smdk6410_map_io, 702 .map_io = smdk6410_map_io,
705 .init_machine = smdk6410_machine_init, 703 .init_machine = smdk6410_machine_init,
706 .init_late = s3c64xx_init_late, 704 .init_late = s3c64xx_init_late,
707 .timer = &s3c24xx_timer, 705 .init_time = s3c24xx_timer_init,
708 .restart = s3c64xx_restart, 706 .restart = s3c64xx_restart,
709MACHINE_END 707MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-irq.h b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
index 4aaebdace55f..d60397d1ff40 100644
--- a/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
@@ -13,7 +13,6 @@
13#ifndef __ASM_ARCH_REGS_IRQ_H 13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__ 14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15 15
16#include <asm/hardware/vic.h>
17#include <mach/map.h> 16#include <mach/map.h>
18 17
19#endif /* __ASM_ARCH_REGS_IRQ_H */ 18#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/tick.h b/arch/arm/mach-s5p64x0/include/mach/tick.h
deleted file mode 100644
index 00aa7f1d8e51..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/tick.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/tick.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * http://armlinux.simtec.co.uk/
9 * Ben Dooks <ben@simtec.co.uk>
10 *
11 * S5P64X0 - Timer tick support definitions
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16*/
17
18#ifndef __ASM_ARCH_TICK_H
19#define __ASM_ARCH_TICK_H __FILE__
20
21static inline u32 s3c24xx_ostimer_pending(void)
22{
23 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
24 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
25}
26
27#define TICK_MAX (0xffffffff)
28
29#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 1af823558c60..a40d5eb38124 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -29,7 +29,6 @@
29#include <video/platform_lcd.h> 29#include <video/platform_lcd.h>
30#include <video/samsung_fimd.h> 30#include <video/samsung_fimd.h>
31 31
32#include <asm/hardware/vic.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
@@ -272,9 +271,8 @@ MACHINE_START(SMDK6440, "SMDK6440")
272 .atag_offset = 0x100, 271 .atag_offset = 0x100,
273 272
274 .init_irq = s5p6440_init_irq, 273 .init_irq = s5p6440_init_irq,
275 .handle_irq = vic_handle_irq,
276 .map_io = smdk6440_map_io, 274 .map_io = smdk6440_map_io,
277 .init_machine = smdk6440_machine_init, 275 .init_machine = smdk6440_machine_init,
278 .timer = &s5p_timer, 276 .init_time = s5p_timer_init,
279 .restart = s5p64x0_restart, 277 .restart = s5p64x0_restart,
280MACHINE_END 278MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 62526ccf6b70..703e576a26e0 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -29,7 +29,6 @@
29#include <video/platform_lcd.h> 29#include <video/platform_lcd.h>
30#include <video/samsung_fimd.h> 30#include <video/samsung_fimd.h>
31 31
32#include <asm/hardware/vic.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
@@ -291,9 +290,8 @@ MACHINE_START(SMDK6450, "SMDK6450")
291 .atag_offset = 0x100, 290 .atag_offset = 0x100,
292 291
293 .init_irq = s5p6450_init_irq, 292 .init_irq = s5p6450_init_irq,
294 .handle_irq = vic_handle_irq,
295 .map_io = smdk6450_map_io, 293 .map_io = smdk6450_map_io,
296 .init_machine = smdk6450_machine_init, 294 .init_machine = smdk6450_machine_init,
297 .timer = &s5p_timer, 295 .init_time = s5p_timer_init,
298 .restart = s5p64x0_restart, 296 .restart = s5p64x0_restart,
299MACHINE_END 297MACHINE_END
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-irq.h b/arch/arm/mach-s5pc100/include/mach/regs-irq.h
index 4d9036d0f288..761627897f30 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-irq.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-irq.h
@@ -14,6 +14,5 @@
14#define __ASM_ARCH_REGS_IRQ_H __FILE__ 14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15 15
16#include <mach/map.h> 16#include <mach/map.h>
17#include <asm/hardware/vic.h>
18 17
19#endif /* __ASM_ARCH_REGS_IRQ_H */ 18#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h
index 20f68730ed18..0af8e41230ed 100644
--- a/arch/arm/mach-s5pc100/include/mach/tick.h
+++ b/arch/arm/mach-s5pc100/include/mach/tick.h
@@ -15,6 +15,8 @@
15#ifndef __ASM_ARCH_TICK_H 15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__ 16#define __ASM_ARCH_TICK_H __FILE__
17 17
18#include <linux/irqchip/arm-vic.h>
19
18/* note, the timer interrutps turn up in 2 places, the vic and then 20/* note, the timer interrutps turn up in 2 places, the vic and then
19 * the timer block. We take the VIC as the base at the moment. 21 * the timer block. We take the VIC as the base at the moment.
20 */ 22 */
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 9abe95e806ab..185a19583898 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -25,7 +25,6 @@
25#include <linux/input.h> 25#include <linux/input.h>
26#include <linux/pwm_backlight.h> 26#include <linux/pwm_backlight.h>
27 27
28#include <asm/hardware/vic.h>
29#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 29#include <asm/mach/map.h>
31 30
@@ -254,9 +253,8 @@ MACHINE_START(SMDKC100, "SMDKC100")
254 /* Maintainer: Byungho Min <bhmin@samsung.com> */ 253 /* Maintainer: Byungho Min <bhmin@samsung.com> */
255 .atag_offset = 0x100, 254 .atag_offset = 0x100,
256 .init_irq = s5pc100_init_irq, 255 .init_irq = s5pc100_init_irq,
257 .handle_irq = vic_handle_irq,
258 .map_io = smdkc100_map_io, 256 .map_io = smdkc100_map_io,
259 .init_machine = smdkc100_machine_init, 257 .init_machine = smdkc100_machine_init,
260 .timer = &s3c24xx_timer, 258 .init_time = s3c24xx_timer_init,
261 .restart = s5pc100_restart, 259 .restart = s5pc100_restart,
262MACHINE_END 260MACHINE_END
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-irq.h b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
index 5c3b104a7c86..d8bc1e6c7aaa 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-irq.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
@@ -13,7 +13,6 @@
13#ifndef __ASM_ARCH_REGS_IRQ_H 13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__ 14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15 15
16#include <asm/hardware/vic.h>
17#include <mach/map.h> 16#include <mach/map.h>
18 17
19#endif /* __ASM_ARCH_REGS_IRQ_H */ 18#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/tick.h b/arch/arm/mach-s5pv210/include/mach/tick.h
deleted file mode 100644
index 7993b3603ccf..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/tick.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/tick.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/tick.h
7 *
8 * S5PV210 - Timer tick support definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__
17
18static inline u32 s3c24xx_ostimer_pending(void)
19{
20 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
21 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
22}
23
24#define TICK_MAX (0xffffffff)
25
26#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index ee9fa5c2ef2c..11900a8e88a3 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -22,7 +22,6 @@
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/gpio.h> 23#include <linux/gpio.h>
24 24
25#include <asm/hardware/vic.h>
26#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
28#include <asm/setup.h> 27#include <asm/setup.h>
@@ -685,9 +684,8 @@ MACHINE_START(AQUILA, "Aquila")
685 Kyungmin Park <kyungmin.park@samsung.com> */ 684 Kyungmin Park <kyungmin.park@samsung.com> */
686 .atag_offset = 0x100, 685 .atag_offset = 0x100,
687 .init_irq = s5pv210_init_irq, 686 .init_irq = s5pv210_init_irq,
688 .handle_irq = vic_handle_irq,
689 .map_io = aquila_map_io, 687 .map_io = aquila_map_io,
690 .init_machine = aquila_machine_init, 688 .init_machine = aquila_machine_init,
691 .timer = &s5p_timer, 689 .init_time = s5p_timer_init,
692 .restart = s5pv210_restart, 690 .restart = s5pv210_restart,
693MACHINE_END 691MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index c72b31078c99..570481591746 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -29,7 +29,6 @@
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/platform_data/s3c-hsotg.h> 30#include <linux/platform_data/s3c-hsotg.h>
31 31
32#include <asm/hardware/vic.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35#include <asm/setup.h> 34#include <asm/setup.h>
@@ -972,10 +971,9 @@ MACHINE_START(GONI, "GONI")
972 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ 971 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
973 .atag_offset = 0x100, 972 .atag_offset = 0x100,
974 .init_irq = s5pv210_init_irq, 973 .init_irq = s5pv210_init_irq,
975 .handle_irq = vic_handle_irq,
976 .map_io = goni_map_io, 974 .map_io = goni_map_io,
977 .init_machine = goni_machine_init, 975 .init_machine = goni_machine_init,
978 .timer = &s5p_timer, 976 .init_time = s5p_timer_init,
979 .reserve = &goni_reserve, 977 .reserve = &goni_reserve,
980 .restart = s5pv210_restart, 978 .restart = s5pv210_restart,
981MACHINE_END 979MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index f1f3bd37ecda..28bd0248a3e2 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -15,7 +15,6 @@
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/device.h> 16#include <linux/device.h>
17 17
18#include <asm/hardware/vic.h>
19#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
20#include <asm/mach/map.h> 19#include <asm/mach/map.h>
21#include <asm/setup.h> 20#include <asm/setup.h>
@@ -152,10 +151,9 @@ MACHINE_START(SMDKC110, "SMDKC110")
152 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 151 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
153 .atag_offset = 0x100, 152 .atag_offset = 0x100,
154 .init_irq = s5pv210_init_irq, 153 .init_irq = s5pv210_init_irq,
155 .handle_irq = vic_handle_irq,
156 .map_io = smdkc110_map_io, 154 .map_io = smdkc110_map_io,
157 .init_machine = smdkc110_machine_init, 155 .init_machine = smdkc110_machine_init,
158 .timer = &s5p_timer, 156 .init_time = s5p_timer_init,
159 .restart = s5pv210_restart, 157 .restart = s5pv210_restart,
160 .reserve = &smdkc110_reserve, 158 .reserve = &smdkc110_reserve,
161MACHINE_END 159MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 6bc8404bf678..3c73f36869bb 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -21,7 +21,6 @@
21#include <linux/pwm_backlight.h> 21#include <linux/pwm_backlight.h>
22#include <linux/platform_data/s3c-hsotg.h> 22#include <linux/platform_data/s3c-hsotg.h>
23 23
24#include <asm/hardware/vic.h>
25#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 25#include <asm/mach/map.h>
27#include <asm/setup.h> 26#include <asm/setup.h>
@@ -328,10 +327,9 @@ MACHINE_START(SMDKV210, "SMDKV210")
328 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 327 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
329 .atag_offset = 0x100, 328 .atag_offset = 0x100,
330 .init_irq = s5pv210_init_irq, 329 .init_irq = s5pv210_init_irq,
331 .handle_irq = vic_handle_irq,
332 .map_io = smdkv210_map_io, 330 .map_io = smdkv210_map_io,
333 .init_machine = smdkv210_machine_init, 331 .init_machine = smdkv210_machine_init,
334 .timer = &s5p_timer, 332 .init_time = s5p_timer_init,
335 .restart = s5pv210_restart, 333 .restart = s5pv210_restart,
336 .reserve = &smdkv210_reserve, 334 .reserve = &smdkv210_reserve,
337MACHINE_END 335MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index 18785cb5e1ef..2d4c5531819c 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -14,7 +14,6 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16 16
17#include <asm/hardware/vic.h>
18#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 18#include <asm/mach/map.h>
20#include <asm/setup.h> 19#include <asm/setup.h>
@@ -129,9 +128,8 @@ MACHINE_START(TORBRECK, "TORBRECK")
129 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */ 128 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */
130 .atag_offset = 0x100, 129 .atag_offset = 0x100,
131 .init_irq = s5pv210_init_irq, 130 .init_irq = s5pv210_init_irq,
132 .handle_irq = vic_handle_irq,
133 .map_io = torbreck_map_io, 131 .map_io = torbreck_map_io,
134 .init_machine = torbreck_machine_init, 132 .init_machine = torbreck_machine_init,
135 .timer = &s5p_timer, 133 .init_time = s5p_timer_init,
136 .restart = s5pv210_restart, 134 .restart = s5pv210_restart,
137MACHINE_END 135MACHINE_END
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 9a23739f7026..b38d2525d5db 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -621,7 +621,7 @@ MACHINE_START(ASSABET, "Intel-Assabet")
621 .map_io = assabet_map_io, 621 .map_io = assabet_map_io,
622 .nr_irqs = SA1100_NR_IRQS, 622 .nr_irqs = SA1100_NR_IRQS,
623 .init_irq = sa1100_init_irq, 623 .init_irq = sa1100_init_irq,
624 .timer = &sa1100_timer, 624 .init_time = sa1100_timer_init,
625 .init_machine = assabet_init, 625 .init_machine = assabet_init,
626 .init_late = sa11x0_init_late, 626 .init_late = sa11x0_init_late,
627#ifdef CONFIG_SA1111 627#ifdef CONFIG_SA1111
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index b2dadf3ea3df..63361b6d04e9 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -336,7 +336,7 @@ MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
336 .nr_irqs = SA1100_NR_IRQS, 336 .nr_irqs = SA1100_NR_IRQS,
337 .init_irq = sa1100_init_irq, 337 .init_irq = sa1100_init_irq,
338 .init_late = sa11x0_init_late, 338 .init_late = sa11x0_init_late,
339 .timer = &sa1100_timer, 339 .init_time = sa1100_timer_init,
340#ifdef CONFIG_SA1111 340#ifdef CONFIG_SA1111
341 .dma_zone_size = SZ_1M, 341 .dma_zone_size = SZ_1M,
342#endif 342#endif
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 304bca4a07c0..2d25ececb415 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -174,7 +174,7 @@ MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
174 .map_io = cerf_map_io, 174 .map_io = cerf_map_io,
175 .nr_irqs = SA1100_NR_IRQS, 175 .nr_irqs = SA1100_NR_IRQS,
176 .init_irq = cerf_init_irq, 176 .init_irq = cerf_init_irq,
177 .timer = &sa1100_timer, 177 .init_time = sa1100_timer_init,
178 .init_machine = cerf_init, 178 .init_machine = cerf_init,
179 .init_late = sa11x0_init_late, 179 .init_late = sa11x0_init_late,
180 .restart = sa11x0_restart, 180 .restart = sa11x0_restart,
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 45f424f5fca6..612a45689770 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -399,7 +399,7 @@ MACHINE_START(COLLIE, "Sharp-Collie")
399 .map_io = collie_map_io, 399 .map_io = collie_map_io,
400 .nr_irqs = SA1100_NR_IRQS, 400 .nr_irqs = SA1100_NR_IRQS,
401 .init_irq = sa1100_init_irq, 401 .init_irq = sa1100_init_irq,
402 .timer = &sa1100_timer, 402 .init_time = sa1100_timer_init,
403 .init_machine = collie_init, 403 .init_machine = collie_init,
404 .init_late = sa11x0_init_late, 404 .init_late = sa11x0_init_late,
405 .restart = sa11x0_restart, 405 .restart = sa11x0_restart,
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h
index a5b7c13da3e3..2abc6a1f6e86 100644
--- a/arch/arm/mach-sa1100/generic.h
+++ b/arch/arm/mach-sa1100/generic.h
@@ -4,9 +4,7 @@
4 * Author: Nicolas Pitre 4 * Author: Nicolas Pitre
5 */ 5 */
6 6
7struct sys_timer; 7extern void sa1100_timer_init(void);
8
9extern struct sys_timer sa1100_timer;
10extern void __init sa1100_map_io(void); 8extern void __init sa1100_map_io(void);
11extern void __init sa1100_init_irq(void); 9extern void __init sa1100_init_irq(void);
12extern void __init sa1100_init_gpio(void); 10extern void __init sa1100_init_gpio(void);
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c
index e1571eab08ae..b8f2b151539b 100644
--- a/arch/arm/mach-sa1100/h3100.c
+++ b/arch/arm/mach-sa1100/h3100.c
@@ -108,7 +108,7 @@ MACHINE_START(H3100, "Compaq iPAQ H3100")
108 .map_io = h3100_map_io, 108 .map_io = h3100_map_io,
109 .nr_irqs = SA1100_NR_IRQS, 109 .nr_irqs = SA1100_NR_IRQS,
110 .init_irq = sa1100_init_irq, 110 .init_irq = sa1100_init_irq,
111 .timer = &sa1100_timer, 111 .init_time = sa1100_timer_init,
112 .init_machine = h3100_mach_init, 112 .init_machine = h3100_mach_init,
113 .init_late = sa11x0_init_late, 113 .init_late = sa11x0_init_late,
114 .restart = sa11x0_restart, 114 .restart = sa11x0_restart,
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index ba7a2901ab88..b8dc5bd22623 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -158,7 +158,7 @@ MACHINE_START(H3600, "Compaq iPAQ H3600")
158 .map_io = h3600_map_io, 158 .map_io = h3600_map_io,
159 .nr_irqs = SA1100_NR_IRQS, 159 .nr_irqs = SA1100_NR_IRQS,
160 .init_irq = sa1100_init_irq, 160 .init_irq = sa1100_init_irq,
161 .timer = &sa1100_timer, 161 .init_time = sa1100_timer_init,
162 .init_machine = h3600_mach_init, 162 .init_machine = h3600_mach_init,
163 .init_late = sa11x0_init_late, 163 .init_late = sa11x0_init_late,
164 .restart = sa11x0_restart, 164 .restart = sa11x0_restart,
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
index d005939c41fc..643d5f2d9af9 100644
--- a/arch/arm/mach-sa1100/hackkit.c
+++ b/arch/arm/mach-sa1100/hackkit.c
@@ -229,7 +229,7 @@ MACHINE_START(HACKKIT, "HackKit Cpu Board")
229 .map_io = hackkit_map_io, 229 .map_io = hackkit_map_io,
230 .nr_irqs = SA1100_NR_IRQS, 230 .nr_irqs = SA1100_NR_IRQS,
231 .init_irq = sa1100_init_irq, 231 .init_irq = sa1100_init_irq,
232 .timer = &sa1100_timer, 232 .init_time = sa1100_timer_init,
233 .init_machine = hackkit_init, 233 .init_machine = hackkit_init,
234 .init_late = sa11x0_init_late, 234 .init_late = sa11x0_init_late,
235 .restart = sa11x0_restart, 235 .restart = sa11x0_restart,
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 35cfc428b4d4..c0b1f5bafae4 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -346,7 +346,7 @@ MACHINE_START(JORNADA720, "HP Jornada 720")
346 .map_io = jornada720_map_io, 346 .map_io = jornada720_map_io,
347 .nr_irqs = SA1100_NR_IRQS, 347 .nr_irqs = SA1100_NR_IRQS,
348 .init_irq = sa1100_init_irq, 348 .init_irq = sa1100_init_irq,
349 .timer = &sa1100_timer, 349 .init_time = sa1100_timer_init,
350 .init_machine = jornada720_mach_init, 350 .init_machine = jornada720_mach_init,
351 .init_late = sa11x0_init_late, 351 .init_late = sa11x0_init_late,
352#ifdef CONFIG_SA1111 352#ifdef CONFIG_SA1111
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
index f69f78fc3ddd..a89917653884 100644
--- a/arch/arm/mach-sa1100/lart.c
+++ b/arch/arm/mach-sa1100/lart.c
@@ -174,6 +174,6 @@ MACHINE_START(LART, "LART")
174 .init_irq = sa1100_init_irq, 174 .init_irq = sa1100_init_irq,
175 .init_machine = lart_init, 175 .init_machine = lart_init,
176 .init_late = sa11x0_init_late, 176 .init_late = sa11x0_init_late,
177 .timer = &sa1100_timer, 177 .init_time = sa1100_timer_init,
178 .restart = sa11x0_restart, 178 .restart = sa11x0_restart,
179MACHINE_END 179MACHINE_END
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c
index 102e08f7b109..f1cb3784d525 100644
--- a/arch/arm/mach-sa1100/nanoengine.c
+++ b/arch/arm/mach-sa1100/nanoengine.c
@@ -110,7 +110,7 @@ MACHINE_START(NANOENGINE, "BSE nanoEngine")
110 .map_io = nanoengine_map_io, 110 .map_io = nanoengine_map_io,
111 .nr_irqs = SA1100_NR_IRQS, 111 .nr_irqs = SA1100_NR_IRQS,
112 .init_irq = sa1100_init_irq, 112 .init_irq = sa1100_init_irq,
113 .timer = &sa1100_timer, 113 .init_time = sa1100_timer_init,
114 .init_machine = nanoengine_init, 114 .init_machine = nanoengine_init,
115 .init_late = sa11x0_init_late, 115 .init_late = sa11x0_init_late,
116 .restart = sa11x0_restart, 116 .restart = sa11x0_restart,
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index c51bb63f90fb..091261878eff 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -133,7 +133,7 @@ MACHINE_START(PLEB, "PLEB")
133 .map_io = pleb_map_io, 133 .map_io = pleb_map_io,
134 .nr_irqs = SA1100_NR_IRQS, 134 .nr_irqs = SA1100_NR_IRQS,
135 .init_irq = sa1100_init_irq, 135 .init_irq = sa1100_init_irq,
136 .timer = &sa1100_timer, 136 .init_time = sa1100_timer_init,
137 .init_machine = pleb_init, 137 .init_machine = pleb_init,
138 .init_late = sa11x0_init_late, 138 .init_late = sa11x0_init_late,
139 .restart = sa11x0_restart, 139 .restart = sa11x0_restart,
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 6460d25fbb88..c8866bce7386 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -102,7 +102,7 @@ MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
102 .map_io = shannon_map_io, 102 .map_io = shannon_map_io,
103 .nr_irqs = SA1100_NR_IRQS, 103 .nr_irqs = SA1100_NR_IRQS,
104 .init_irq = sa1100_init_irq, 104 .init_irq = sa1100_init_irq,
105 .timer = &sa1100_timer, 105 .init_time = sa1100_timer_init,
106 .init_machine = shannon_init, 106 .init_machine = shannon_init,
107 .init_late = sa11x0_init_late, 107 .init_late = sa11x0_init_late,
108 .restart = sa11x0_restart, 108 .restart = sa11x0_restart,
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index 6d65f65fcb23..bcbc94540e45 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -396,6 +396,6 @@ MACHINE_START(SIMPAD, "Simpad")
396 .nr_irqs = SA1100_NR_IRQS, 396 .nr_irqs = SA1100_NR_IRQS,
397 .init_irq = sa1100_init_irq, 397 .init_irq = sa1100_init_irq,
398 .init_late = sa11x0_init_late, 398 .init_late = sa11x0_init_late,
399 .timer = &sa1100_timer, 399 .init_time = sa1100_timer_init,
400 .restart = sa11x0_restart, 400 .restart = sa11x0_restart,
401MACHINE_END 401MACHINE_END
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 80702c9ecc77..a59a13a665a6 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -69,46 +69,10 @@ sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
69 } 69 }
70} 70}
71 71
72static struct clock_event_device ckevt_sa1100_osmr0 = {
73 .name = "osmr0",
74 .features = CLOCK_EVT_FEAT_ONESHOT,
75 .rating = 200,
76 .set_next_event = sa1100_osmr0_set_next_event,
77 .set_mode = sa1100_osmr0_set_mode,
78};
79
80static struct irqaction sa1100_timer_irq = {
81 .name = "ost0",
82 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
83 .handler = sa1100_ost0_interrupt,
84 .dev_id = &ckevt_sa1100_osmr0,
85};
86
87static void __init sa1100_timer_init(void)
88{
89 writel_relaxed(0, OIER);
90 writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
91
92 setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
93
94 clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
95 ckevt_sa1100_osmr0.max_delta_ns =
96 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
97 ckevt_sa1100_osmr0.min_delta_ns =
98 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
99 ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
100
101 setup_irq(IRQ_OST0, &sa1100_timer_irq);
102
103 clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32,
104 clocksource_mmio_readl_up);
105 clockevents_register_device(&ckevt_sa1100_osmr0);
106}
107
108#ifdef CONFIG_PM 72#ifdef CONFIG_PM
109unsigned long osmr[4], oier; 73unsigned long osmr[4], oier;
110 74
111static void sa1100_timer_suspend(void) 75static void sa1100_timer_suspend(struct clock_event_device *cedev)
112{ 76{
113 osmr[0] = readl_relaxed(OSMR0); 77 osmr[0] = readl_relaxed(OSMR0);
114 osmr[1] = readl_relaxed(OSMR1); 78 osmr[1] = readl_relaxed(OSMR1);
@@ -117,7 +81,7 @@ static void sa1100_timer_suspend(void)
117 oier = readl_relaxed(OIER); 81 oier = readl_relaxed(OIER);
118} 82}
119 83
120static void sa1100_timer_resume(void) 84static void sa1100_timer_resume(struct clock_event_device *cedev)
121{ 85{
122 writel_relaxed(0x0f, OSSR); 86 writel_relaxed(0x0f, OSSR);
123 writel_relaxed(osmr[0], OSMR0); 87 writel_relaxed(osmr[0], OSMR0);
@@ -136,8 +100,36 @@ static void sa1100_timer_resume(void)
136#define sa1100_timer_resume NULL 100#define sa1100_timer_resume NULL
137#endif 101#endif
138 102
139struct sys_timer sa1100_timer = { 103static struct clock_event_device ckevt_sa1100_osmr0 = {
140 .init = sa1100_timer_init, 104 .name = "osmr0",
105 .features = CLOCK_EVT_FEAT_ONESHOT,
106 .rating = 200,
107 .set_next_event = sa1100_osmr0_set_next_event,
108 .set_mode = sa1100_osmr0_set_mode,
141 .suspend = sa1100_timer_suspend, 109 .suspend = sa1100_timer_suspend,
142 .resume = sa1100_timer_resume, 110 .resume = sa1100_timer_resume,
143}; 111};
112
113static struct irqaction sa1100_timer_irq = {
114 .name = "ost0",
115 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
116 .handler = sa1100_ost0_interrupt,
117 .dev_id = &ckevt_sa1100_osmr0,
118};
119
120void __init sa1100_timer_init(void)
121{
122 writel_relaxed(0, OIER);
123 writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
124
125 setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
126
127 ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
128
129 setup_irq(IRQ_OST0, &sa1100_timer_irq);
130
131 clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32,
132 clocksource_mmio_readl_up);
133 clockevents_config_and_register(&ckevt_sa1100_osmr0, 3686400,
134 MIN_OSCR_DELTA * 2, 0x7fffffff);
135}
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index 9ad2e9737fb5..b63dec848195 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -128,10 +128,6 @@ static void __init shark_timer_init(void)
128 setup_irq(IRQ_TIMER, &shark_timer_irq); 128 setup_irq(IRQ_TIMER, &shark_timer_irq);
129} 129}
130 130
131static struct sys_timer shark_timer = {
132 .init = shark_timer_init,
133};
134
135static void shark_init_early(void) 131static void shark_init_early(void)
136{ 132{
137 disable_hlt(); 133 disable_hlt();
@@ -142,7 +138,7 @@ MACHINE_START(SHARK, "Shark")
142 .atag_offset = 0x3000, 138 .atag_offset = 0x3000,
143 .init_early = shark_init_early, 139 .init_early = shark_init_early,
144 .init_irq = shark_init_irq, 140 .init_irq = shark_init_irq,
145 .timer = &shark_timer, 141 .init_time = shark_timer_init,
146 .dma_zone_size = SZ_4M, 142 .dma_zone_size = SZ_4M,
147 .restart = shark_restart, 143 .restart = shark_restart,
148MACHINE_END 144MACHINE_END
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 0b7147928aa3..700e6623aa86 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o
15# SMP objects 15# SMP objects
16smp-y := platsmp.o headsmp.o 16smp-y := platsmp.o headsmp.o
17smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o 17smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o
18smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o 18smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-sh73a0.o
19smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o 19smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o
20smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o 20smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o
21 21
@@ -37,6 +37,7 @@ obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o
37obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o 37obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o
38obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o 38obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o
39obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o 39obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
40obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o
40 41
41# Board objects 42# Board objects
42obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o 43obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 032d10817e79..705bc63c7984 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -40,6 +40,7 @@
40#include <linux/mmc/sh_mobile_sdhi.h> 40#include <linux/mmc/sh_mobile_sdhi.h>
41#include <linux/mfd/tmio.h> 41#include <linux/mfd/tmio.h>
42#include <linux/sh_clk.h> 42#include <linux/sh_clk.h>
43#include <linux/irqchip/arm-gic.h>
43#include <video/sh_mobile_lcdc.h> 44#include <video/sh_mobile_lcdc.h>
44#include <video/sh_mipi_dsi.h> 45#include <video/sh_mipi_dsi.h>
45#include <sound/sh_fsi.h> 46#include <sound/sh_fsi.h>
@@ -49,7 +50,6 @@
49#include <mach/common.h> 50#include <mach/common.h>
50#include <asm/mach-types.h> 51#include <asm/mach-types.h>
51#include <asm/mach/arch.h> 52#include <asm/mach/arch.h>
52#include <asm/hardware/gic.h>
53#include <asm/hardware/cache-l2x0.h> 53#include <asm/hardware/cache-l2x0.h>
54#include <asm/traps.h> 54#include <asm/traps.h>
55 55
@@ -668,8 +668,7 @@ MACHINE_START(AG5EVM, "ag5evm")
668 .init_early = sh73a0_add_early_devices, 668 .init_early = sh73a0_add_early_devices,
669 .nr_irqs = NR_IRQS_LEGACY, 669 .nr_irqs = NR_IRQS_LEGACY,
670 .init_irq = sh73a0_init_irq, 670 .init_irq = sh73a0_init_irq,
671 .handle_irq = gic_handle_irq,
672 .init_machine = ag5evm_init, 671 .init_machine = ag5evm_init,
673 .init_late = shmobile_init_late, 672 .init_late = shmobile_init_late,
674 .timer = &shmobile_timer, 673 .init_time = sh73a0_earlytimer_init,
675MACHINE_END 674MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 99ef190d0909..c1d4ab630214 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -1350,5 +1350,5 @@ MACHINE_START(AP4EVB, "ap4evb")
1350 .handle_irq = shmobile_handle_irq_intc, 1350 .handle_irq = shmobile_handle_irq_intc,
1351 .init_machine = ap4evb_init, 1351 .init_machine = ap4evb_init,
1352 .init_late = sh7372_pm_init_late, 1352 .init_late = sh7372_pm_init_late,
1353 .timer = &shmobile_timer, 1353 .init_time = sh7372_earlytimer_init,
1354MACHINE_END 1354MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 5353adf6b828..65731370da81 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -1181,6 +1181,8 @@ static void __init eva_init(void)
1181 rmobile_add_device_to_domain("A4LC", &hdmi_lcdc_device); 1181 rmobile_add_device_to_domain("A4LC", &hdmi_lcdc_device);
1182 if (usb) 1182 if (usb)
1183 rmobile_add_device_to_domain("A3SP", usb); 1183 rmobile_add_device_to_domain("A3SP", usb);
1184
1185 r8a7740_pm_init();
1184} 1186}
1185 1187
1186static void __init eva_earlytimer_init(void) 1188static void __init eva_earlytimer_init(void)
@@ -1192,9 +1194,6 @@ static void __init eva_earlytimer_init(void)
1192static void __init eva_add_early_devices(void) 1194static void __init eva_add_early_devices(void)
1193{ 1195{
1194 r8a7740_add_early_devices(); 1196 r8a7740_add_early_devices();
1195
1196 /* override timer setup with board-specific code */
1197 shmobile_timer.init = eva_earlytimer_init;
1198} 1197}
1199 1198
1200#define RESCNT2 IOMEM(0xe6188020) 1199#define RESCNT2 IOMEM(0xe6188020)
@@ -1216,7 +1215,7 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
1216 .handle_irq = shmobile_handle_irq_intc, 1215 .handle_irq = shmobile_handle_irq_intc,
1217 .init_machine = eva_init, 1216 .init_machine = eva_init,
1218 .init_late = shmobile_init_late, 1217 .init_late = shmobile_init_late,
1219 .timer = &shmobile_timer, 1218 .init_time = eva_earlytimer_init,
1220 .dt_compat = eva_boards_compat_dt, 1219 .dt_compat = eva_boards_compat_dt,
1221 .restart = eva_restart, 1220 .restart = eva_restart,
1222MACHINE_END 1221MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index cb8c994e1430..331b7ce4edd8 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -499,9 +499,6 @@ static void __init bonito_earlytimer_init(void)
499static void __init bonito_add_early_devices(void) 499static void __init bonito_add_early_devices(void)
500{ 500{
501 r8a7740_add_early_devices(); 501 r8a7740_add_early_devices();
502
503 /* override timer setup with board-specific code */
504 shmobile_timer.init = bonito_earlytimer_init;
505} 502}
506 503
507MACHINE_START(BONITO, "bonito") 504MACHINE_START(BONITO, "bonito")
@@ -511,5 +508,5 @@ MACHINE_START(BONITO, "bonito")
511 .handle_irq = shmobile_handle_irq_intc, 508 .handle_irq = shmobile_handle_irq_intc,
512 .init_machine = bonito_init, 509 .init_machine = bonito_init,
513 .init_late = shmobile_init_late, 510 .init_late = shmobile_init_late,
514 .timer = &shmobile_timer, 511 .init_time = bonito_earlytimer_init,
515MACHINE_END 512MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index bf88f9a8b7ac..d759a9c2b9e8 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -35,6 +35,7 @@
35#include <linux/input/sh_keysc.h> 35#include <linux/input/sh_keysc.h>
36#include <linux/gpio_keys.h> 36#include <linux/gpio_keys.h>
37#include <linux/leds.h> 37#include <linux/leds.h>
38#include <linux/irqchip/arm-gic.h>
38#include <linux/platform_data/leds-renesas-tpu.h> 39#include <linux/platform_data/leds-renesas-tpu.h>
39#include <linux/mmc/host.h> 40#include <linux/mmc/host.h>
40#include <linux/mmc/sh_mmcif.h> 41#include <linux/mmc/sh_mmcif.h>
@@ -47,7 +48,6 @@
47#include <asm/mach-types.h> 48#include <asm/mach-types.h>
48#include <asm/mach/arch.h> 49#include <asm/mach/arch.h>
49#include <asm/mach/time.h> 50#include <asm/mach/time.h>
50#include <asm/hardware/gic.h>
51#include <asm/hardware/cache-l2x0.h> 51#include <asm/hardware/cache-l2x0.h>
52#include <asm/traps.h> 52#include <asm/traps.h>
53 53
@@ -550,8 +550,7 @@ MACHINE_START(KOTA2, "kota2")
550 .init_early = sh73a0_add_early_devices, 550 .init_early = sh73a0_add_early_devices,
551 .nr_irqs = NR_IRQS_LEGACY, 551 .nr_irqs = NR_IRQS_LEGACY,
552 .init_irq = sh73a0_init_irq, 552 .init_irq = sh73a0_init_irq,
553 .handle_irq = gic_handle_irq,
554 .init_machine = kota2_init, 553 .init_machine = kota2_init,
555 .init_late = shmobile_init_late, 554 .init_late = shmobile_init_late,
556 .timer = &shmobile_timer, 555 .init_time = sh73a0_earlytimer_init,
557MACHINE_END 556MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
index b52bc0d1273f..c254782aa727 100644
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ b/arch/arm/mach-shmobile/board-kzm9d.c
@@ -28,7 +28,6 @@
28#include <mach/emev2.h> 28#include <mach/emev2.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/gic.h>
32 31
33/* Dummy supplies, where voltage doesn't matter */ 32/* Dummy supplies, where voltage doesn't matter */
34static struct regulator_consumer_supply dummy_supplies[] = { 33static struct regulator_consumer_supply dummy_supplies[] = {
@@ -89,9 +88,8 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
89 .init_early = emev2_add_early_devices, 88 .init_early = emev2_add_early_devices,
90 .nr_irqs = NR_IRQS_LEGACY, 89 .nr_irqs = NR_IRQS_LEGACY,
91 .init_irq = emev2_init_irq, 90 .init_irq = emev2_init_irq,
92 .handle_irq = gic_handle_irq,
93 .init_machine = kzm9d_add_standard_devices, 91 .init_machine = kzm9d_add_standard_devices,
94 .init_late = shmobile_init_late, 92 .init_late = shmobile_init_late,
95 .timer = &shmobile_timer, 93 .init_time = shmobile_timer_init,
96 .dt_compat = kzm9d_boards_compat_dt, 94 .dt_compat = kzm9d_boards_compat_dt,
97MACHINE_END 95MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index c02448d6847f..363c6edfa3cd 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -25,6 +25,7 @@
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/i2c/pcf857x.h> 26#include <linux/i2c/pcf857x.h>
27#include <linux/input.h> 27#include <linux/input.h>
28#include <linux/irqchip/arm-gic.h>
28#include <linux/mmc/host.h> 29#include <linux/mmc/host.h>
29#include <linux/mmc/sh_mmcif.h> 30#include <linux/mmc/sh_mmcif.h>
30#include <linux/mmc/sh_mobile_sdhi.h> 31#include <linux/mmc/sh_mobile_sdhi.h>
@@ -42,7 +43,6 @@
42#include <mach/sh73a0.h> 43#include <mach/sh73a0.h>
43#include <mach/common.h> 44#include <mach/common.h>
44#include <asm/hardware/cache-l2x0.h> 45#include <asm/hardware/cache-l2x0.h>
45#include <asm/hardware/gic.h>
46#include <asm/mach-types.h> 46#include <asm/mach-types.h>
47#include <asm/mach/arch.h> 47#include <asm/mach/arch.h>
48#include <video/sh_mobile_lcdc.h> 48#include <video/sh_mobile_lcdc.h>
@@ -772,6 +772,8 @@ static void __init kzm_init(void)
772 772
773 sh73a0_add_standard_devices(); 773 sh73a0_add_standard_devices();
774 platform_add_devices(kzm_devices, ARRAY_SIZE(kzm_devices)); 774 platform_add_devices(kzm_devices, ARRAY_SIZE(kzm_devices));
775
776 sh73a0_pm_init();
775} 777}
776 778
777static void kzm9g_restart(char mode, const char *cmd) 779static void kzm9g_restart(char mode, const char *cmd)
@@ -792,10 +794,9 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g")
792 .init_early = sh73a0_add_early_devices, 794 .init_early = sh73a0_add_early_devices,
793 .nr_irqs = NR_IRQS_LEGACY, 795 .nr_irqs = NR_IRQS_LEGACY,
794 .init_irq = sh73a0_init_irq, 796 .init_irq = sh73a0_init_irq,
795 .handle_irq = gic_handle_irq,
796 .init_machine = kzm_init, 797 .init_machine = kzm_init,
797 .init_late = shmobile_init_late, 798 .init_late = shmobile_init_late,
798 .timer = &shmobile_timer, 799 .init_time = sh73a0_earlytimer_init,
799 .restart = kzm9g_restart, 800 .restart = kzm9g_restart,
800 .dt_compat = kzm9g_boards_compat_dt, 801 .dt_compat = kzm9g_boards_compat_dt,
801MACHINE_END 802MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 2fed62f66045..fe4917f2c1a2 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1593,6 +1593,6 @@ DT_MACHINE_START(MACKEREL_DT, "mackerel")
1593 .handle_irq = shmobile_handle_irq_intc, 1593 .handle_irq = shmobile_handle_irq_intc,
1594 .init_machine = mackerel_init, 1594 .init_machine = mackerel_init,
1595 .init_late = sh7372_pm_init_late, 1595 .init_late = sh7372_pm_init_late,
1596 .timer = &shmobile_timer, 1596 .init_time = sh7372_earlytimer_init,
1597 .dt_compat = mackerel_boards_compat_dt, 1597 .dt_compat = mackerel_boards_compat_dt,
1598MACHINE_END 1598MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index 449f9289567d..cdcb799e802f 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -44,7 +44,6 @@
44#include <mach/irqs.h> 44#include <mach/irqs.h>
45#include <asm/mach-types.h> 45#include <asm/mach-types.h>
46#include <asm/mach/arch.h> 46#include <asm/mach/arch.h>
47#include <asm/hardware/gic.h>
48#include <asm/traps.h> 47#include <asm/traps.h>
49 48
50/* Fixed 3.3V regulator to be used by SDHI0 */ 49/* Fixed 3.3V regulator to be used by SDHI0 */
@@ -382,8 +381,7 @@ MACHINE_START(MARZEN, "marzen")
382 .init_early = r8a7779_add_early_devices, 381 .init_early = r8a7779_add_early_devices,
383 .nr_irqs = NR_IRQS_LEGACY, 382 .nr_irqs = NR_IRQS_LEGACY,
384 .init_irq = r8a7779_init_irq, 383 .init_irq = r8a7779_init_irq,
385 .handle_irq = gic_handle_irq,
386 .init_machine = marzen_init, 384 .init_machine = marzen_init,
387 .init_late = marzen_init_late, 385 .init_late = marzen_init_late,
388 .timer = &shmobile_timer, 386 .init_time = r8a7779_earlytimer_init,
389MACHINE_END 387MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index eac49d59782f..19ce885a3b43 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -581,10 +581,14 @@ static struct clk_lookup lookups[] = {
581 581
582 /* MSTP32 clocks */ 582 /* MSTP32 clocks */
583 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), 583 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]),
584 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP111]), 584 CLKDEV_DEV_ID("sh_tmu.3", &mstp_clks[MSTP111]),
585 CLKDEV_DEV_ID("sh_tmu.4", &mstp_clks[MSTP111]),
586 CLKDEV_DEV_ID("sh_tmu.5", &mstp_clks[MSTP111]),
585 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), 587 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]),
586 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), 588 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]),
587 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), 589 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]),
590 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]),
591 CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP125]),
588 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), 592 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]),
589 CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]), 593 CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]),
590 594
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 3ca6757b129a..45d21fe317f4 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -544,6 +544,7 @@ static struct clk_lookup lookups[] = {
544 544
545 /* MSTP32 clocks */ 545 /* MSTP32 clocks */
546 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */ 546 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
547 CLKDEV_DEV_ID("fff30000.i2c", &mstp_clks[MSTP001]), /* IIC2 */
547 CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */ 548 CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */
548 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */ 549 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
549 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ 550 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
@@ -556,6 +557,7 @@ static struct clk_lookup lookups[] = {
556 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */ 557 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */
557 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */ 558 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
558 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ 559 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
560 CLKDEV_DEV_ID("fff20000.i2c", &mstp_clks[MSTP116]), /* IIC0 */
559 CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[MSTP113]), /* MERAM */ 561 CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[MSTP113]), /* MERAM */
560 CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */ 562 CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
561 CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */ 563 CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */
@@ -577,18 +579,25 @@ static struct clk_lookup lookups[] = {
577 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ 579 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
578 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ 580 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
579 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ 581 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
582 CLKDEV_DEV_ID("e6c20000.i2c", &mstp_clks[MSTP323]), /* IIC1 */
580 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */ 583 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
581 CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */ 584 CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */
582 CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP322]), /* USB0 */ 585 CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP322]), /* USB0 */
583 CLKDEV_DEV_ID("sh_flctl.0", &mstp_clks[MSTP315]), /* FLCTL */ 586 CLKDEV_DEV_ID("sh_flctl.0", &mstp_clks[MSTP315]), /* FLCTL */
584 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ 587 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
588 CLKDEV_DEV_ID("e6850000.sdhi", &mstp_clks[MSTP314]), /* SDHI0 */
585 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 589 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
590 CLKDEV_DEV_ID("e6860000.sdhi", &mstp_clks[MSTP313]), /* SDHI1 */
586 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */ 591 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */
592 CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMC */
587 CLKDEV_DEV_ID("sh-mipi-dsi.1", &mstp_clks[MSTP423]), /* DSITX1 */ 593 CLKDEV_DEV_ID("sh-mipi-dsi.1", &mstp_clks[MSTP423]), /* DSITX1 */
588 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */ 594 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */
595 CLKDEV_DEV_ID("e6870000.sdhi", &mstp_clks[MSTP415]), /* SDHI2 */
589 CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */ 596 CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
590 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */ 597 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
598 CLKDEV_DEV_ID("e6d20000.i2c", &mstp_clks[MSTP411]), /* IIC3 */
591 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */ 599 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */
600 CLKDEV_DEV_ID("e6d30000.i2c", &mstp_clks[MSTP410]), /* IIC4 */
592 CLKDEV_DEV_ID("sh-dma-engine.4", &mstp_clks[MSTP407]), /* USB-DMAC1 */ 601 CLKDEV_DEV_ID("sh-dma-engine.4", &mstp_clks[MSTP407]), /* USB-DMAC1 */
593 CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */ 602 CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
594 CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */ 603 CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 516ff7f3e434..afa5423a0f93 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -264,17 +264,17 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2,
264 SH_CLK_DIV4(&pll1_clk, _reg, _bit, _mask, _flags) 264 SH_CLK_DIV4(&pll1_clk, _reg, _bit, _mask, _flags)
265 265
266static struct clk div4_clks[DIV4_NR] = { 266static struct clk div4_clks[DIV4_NR] = {
267 [DIV4_I] = DIV4(FRQCRA, 20, 0xfff, CLK_ENABLE_ON_INIT), 267 [DIV4_I] = DIV4(FRQCRA, 20, 0xdff, CLK_ENABLE_ON_INIT),
268 [DIV4_ZG] = DIV4(FRQCRA, 16, 0xbff, CLK_ENABLE_ON_INIT), 268 [DIV4_ZG] = DIV4(FRQCRA, 16, 0xd7f, CLK_ENABLE_ON_INIT),
269 [DIV4_M3] = DIV4(FRQCRA, 12, 0xfff, CLK_ENABLE_ON_INIT), 269 [DIV4_M3] = DIV4(FRQCRA, 12, 0x1dff, CLK_ENABLE_ON_INIT),
270 [DIV4_B] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT), 270 [DIV4_B] = DIV4(FRQCRA, 8, 0xdff, CLK_ENABLE_ON_INIT),
271 [DIV4_M1] = DIV4(FRQCRA, 4, 0xfff, 0), 271 [DIV4_M1] = DIV4(FRQCRA, 4, 0x1dff, 0),
272 [DIV4_M2] = DIV4(FRQCRA, 0, 0xfff, 0), 272 [DIV4_M2] = DIV4(FRQCRA, 0, 0x1dff, 0),
273 [DIV4_Z] = DIV4(FRQCRB, 24, 0xbff, 0), 273 [DIV4_Z] = DIV4(FRQCRB, 24, 0x97f, 0),
274 [DIV4_ZTR] = DIV4(FRQCRB, 20, 0xfff, 0), 274 [DIV4_ZTR] = DIV4(FRQCRB, 20, 0xdff, 0),
275 [DIV4_ZT] = DIV4(FRQCRB, 16, 0xfff, 0), 275 [DIV4_ZT] = DIV4(FRQCRB, 16, 0xdff, 0),
276 [DIV4_ZX] = DIV4(FRQCRB, 12, 0xfff, 0), 276 [DIV4_ZX] = DIV4(FRQCRB, 12, 0xdff, 0),
277 [DIV4_HP] = DIV4(FRQCRB, 4, 0xfff, 0), 277 [DIV4_HP] = DIV4(FRQCRB, 4, 0xdff, 0),
278}; 278};
279 279
280enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1, 280enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1,
@@ -525,6 +525,13 @@ static struct clk mstp_clks[MSTP_NR] = {
525 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 525 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
526}; 526};
527 527
528/* The lookups structure below includes duplicate entries for some clocks
529 * with alternate names.
530 * - The traditional name used when a device is initialised with platform data
531 * - The name used when a device is initialised using device tree
532 * The longer-term aim is to remove these duplicates, and indeed the
533 * lookups table entirely, by describing clocks using device tree.
534 */
528static struct clk_lookup lookups[] = { 535static struct clk_lookup lookups[] = {
529 /* main clocks */ 536 /* main clocks */
530 CLKDEV_CON_ID("r_clk", &r_clk), 537 CLKDEV_CON_ID("r_clk", &r_clk),
@@ -545,6 +552,7 @@ static struct clk_lookup lookups[] = {
545 552
546 /* MSTP32 clocks */ 553 /* MSTP32 clocks */
547 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ 554 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
555 CLKDEV_DEV_ID("e6824000.i2c", &mstp_clks[MSTP001]), /* I2C2 */
548 CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */ 556 CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */
549 CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */ 557 CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */
550 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */ 558 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */
@@ -553,6 +561,7 @@ static struct clk_lookup lookups[] = {
553 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ 561 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
554 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ 562 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
555 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ 563 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
564 CLKDEV_DEV_ID("e6820000.i2c", &mstp_clks[MSTP116]), /* I2C0 */
556 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ 565 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
557 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ 566 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
558 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */ 567 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */
@@ -569,17 +578,21 @@ static struct clk_lookup lookups[] = {
569 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */ 578 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
570 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */ 579 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
571 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */ 580 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
581 CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */
572 CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */ 582 CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */
573 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ 583 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
574 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 584 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
575 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ 585 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
586 CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
576 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ 587 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
577 CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */ 588 CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */
578 CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */ 589 CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */
579 CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */ 590 CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */
580 CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */ 591 CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */
581 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ 592 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
593 CLKDEV_DEV_ID("e6826000.i2c", &mstp_clks[MSTP411]), /* I2C3 */
582 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ 594 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
595 CLKDEV_DEV_ID("e6828000.i2c", &mstp_clks[MSTP410]), /* I2C4 */
583 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ 596 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
584}; 597};
585 598
diff --git a/arch/arm/mach-shmobile/headsmp-sh73a0.S b/arch/arm/mach-shmobile/headsmp-sh73a0.S
new file mode 100644
index 000000000000..bec4c0d9b713
--- /dev/null
+++ b/arch/arm/mach-shmobile/headsmp-sh73a0.S
@@ -0,0 +1,50 @@
1/*
2 * SMP support for SoC sh73a0
3 *
4 * Copyright (C) 2012 Bastian Hecht
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#include <linux/linkage.h>
23#include <linux/init.h>
24#include <asm/memory.h>
25
26 __CPUINIT
27/*
28 * Reset vector for secondary CPUs.
29 *
30 * First we turn on L1 cache coherency for our CPU. Then we jump to
31 * shmobile_invalidate_start that invalidates the cache and hands over control
32 * to the common ARM startup code.
33 * This function will be mapped to address 0 by the SBAR register.
34 * A normal branch is out of range here so we need a long jump. We jump to
35 * the physical address as the MMU is still turned off.
36 */
37 .align 12
38ENTRY(sh73a0_secondary_vector)
39 mrc p15, 0, r0, c0, c0, 5 @ read MIPDR
40 and r0, r0, #3 @ mask out cpu ID
41 lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits
42 mov r1, #0xf0000000 @ SCU base address
43 ldr r2, [r1, #8] @ SCU Power Status Register
44 mov r3, #3
45 bic r2, r2, r3, lsl r0 @ Clear bits of our CPU (Run Mode)
46 str r2, [r1, #8] @ write back
47
48 ldr pc, 1f
491: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET
50ENDPROC(sh73a0_secondary_vector)
diff --git a/arch/arm/mach-shmobile/hotplug.c b/arch/arm/mach-shmobile/hotplug.c
index b09a0bdbf813..a1524e3367b0 100644
--- a/arch/arm/mach-shmobile/hotplug.c
+++ b/arch/arm/mach-shmobile/hotplug.c
@@ -56,6 +56,12 @@ int shmobile_cpu_disable(unsigned int cpu)
56 return cpu == 0 ? -EPERM : 0; 56 return cpu == 0 ? -EPERM : 0;
57} 57}
58 58
59int shmobile_cpu_disable_any(unsigned int cpu)
60{
61 cpumask_clear_cpu(cpu, &dead_cpus);
62 return 0;
63}
64
59int shmobile_cpu_is_dead(unsigned int cpu) 65int shmobile_cpu_is_dead(unsigned int cpu)
60{ 66{
61 return cpumask_test_cpu(cpu, &dead_cpus); 67 return cpumask_test_cpu(cpu, &dead_cpus);
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index dfeca79e9e96..e48606d8a2be 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -2,7 +2,7 @@
2#define __ARCH_MACH_COMMON_H 2#define __ARCH_MACH_COMMON_H
3 3
4extern void shmobile_earlytimer_init(void); 4extern void shmobile_earlytimer_init(void);
5extern struct sys_timer shmobile_timer; 5extern void shmobile_timer_init(void);
6extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz, 6extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
7 unsigned int mult, unsigned int div); 7 unsigned int mult, unsigned int div);
8struct twd_local_timer; 8struct twd_local_timer;
@@ -20,8 +20,11 @@ extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv);
20 20
21extern void sh7372_init_irq(void); 21extern void sh7372_init_irq(void);
22extern void sh7372_map_io(void); 22extern void sh7372_map_io(void);
23extern void sh7372_earlytimer_init(void);
23extern void sh7372_add_early_devices(void); 24extern void sh7372_add_early_devices(void);
24extern void sh7372_add_standard_devices(void); 25extern void sh7372_add_standard_devices(void);
26extern void sh7372_add_early_devices_dt(void);
27extern void sh7372_add_standard_devices_dt(void);
25extern void sh7372_clock_init(void); 28extern void sh7372_clock_init(void);
26extern void sh7372_pinmux_init(void); 29extern void sh7372_pinmux_init(void);
27extern void sh7372_pm_init(void); 30extern void sh7372_pm_init(void);
@@ -31,11 +34,17 @@ extern struct clk sh7372_extal1_clk;
31extern struct clk sh7372_extal2_clk; 34extern struct clk sh7372_extal2_clk;
32 35
33extern void sh73a0_init_irq(void); 36extern void sh73a0_init_irq(void);
37extern void sh73a0_init_irq_dt(void);
34extern void sh73a0_map_io(void); 38extern void sh73a0_map_io(void);
39extern void sh73a0_earlytimer_init(void);
35extern void sh73a0_add_early_devices(void); 40extern void sh73a0_add_early_devices(void);
41extern void sh73a0_add_early_devices_dt(void);
36extern void sh73a0_add_standard_devices(void); 42extern void sh73a0_add_standard_devices(void);
43extern void sh73a0_add_standard_devices_dt(void);
37extern void sh73a0_clock_init(void); 44extern void sh73a0_clock_init(void);
38extern void sh73a0_pinmux_init(void); 45extern void sh73a0_pinmux_init(void);
46extern void sh73a0_pm_init(void);
47extern void sh73a0_secondary_vector(void);
39extern struct clk sh73a0_extal1_clk; 48extern struct clk sh73a0_extal1_clk;
40extern struct clk sh73a0_extal2_clk; 49extern struct clk sh73a0_extal2_clk;
41extern struct clk sh73a0_extcki_clk; 50extern struct clk sh73a0_extcki_clk;
@@ -47,9 +56,11 @@ extern void r8a7740_add_early_devices(void);
47extern void r8a7740_add_standard_devices(void); 56extern void r8a7740_add_standard_devices(void);
48extern void r8a7740_clock_init(u8 md_ck); 57extern void r8a7740_clock_init(u8 md_ck);
49extern void r8a7740_pinmux_init(void); 58extern void r8a7740_pinmux_init(void);
59extern void r8a7740_pm_init(void);
50 60
51extern void r8a7779_init_irq(void); 61extern void r8a7779_init_irq(void);
52extern void r8a7779_map_io(void); 62extern void r8a7779_map_io(void);
63extern void r8a7779_earlytimer_init(void);
53extern void r8a7779_add_early_devices(void); 64extern void r8a7779_add_early_devices(void);
54extern void r8a7779_add_standard_devices(void); 65extern void r8a7779_add_standard_devices(void);
55extern void r8a7779_clock_init(void); 66extern void r8a7779_clock_init(void);
@@ -73,6 +84,7 @@ static inline int shmobile_cpuidle_init(void) { return 0; }
73 84
74extern void shmobile_cpu_die(unsigned int cpu); 85extern void shmobile_cpu_die(unsigned int cpu);
75extern int shmobile_cpu_disable(unsigned int cpu); 86extern int shmobile_cpu_disable(unsigned int cpu);
87extern int shmobile_cpu_disable_any(unsigned int cpu);
76 88
77#ifdef CONFIG_HOTPLUG_CPU 89#ifdef CONFIG_HOTPLUG_CPU
78extern int shmobile_cpu_is_dead(unsigned int cpu); 90extern int shmobile_cpu_is_dead(unsigned int cpu);
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index ef66f1a8aa2e..8807c27f71f9 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -22,10 +22,10 @@
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/irqchip/arm-gic.h>
25#include <mach/common.h> 26#include <mach/common.h>
26#include <mach/intc.h> 27#include <mach/intc.h>
27#include <mach/r8a7779.h> 28#include <mach/r8a7779.h>
28#include <asm/hardware/gic.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31 31
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index f0c5e5190601..91faba666d46 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -23,10 +23,11 @@
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/sh_intc.h> 25#include <linux/sh_intc.h>
26#include <linux/irqchip.h>
27#include <linux/irqchip/arm-gic.h>
26#include <mach/intc.h> 28#include <mach/intc.h>
27#include <mach/irqs.h> 29#include <mach/irqs.h>
28#include <mach/sh73a0.h> 30#include <mach/sh73a0.h>
29#include <asm/hardware/gic.h>
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
32 33
@@ -315,11 +316,6 @@ static int intca_gic_set_type(struct irq_data *data, unsigned int type)
315 return irq_cbp(irq_set_type, to_intca_reloc_irq(data), type); 316 return irq_cbp(irq_set_type, to_intca_reloc_irq(data), type);
316} 317}
317 318
318static int intca_gic_set_wake(struct irq_data *data, unsigned int on)
319{
320 return irq_cbp(irq_set_wake, to_intca_reloc_irq(data), on);
321}
322
323#ifdef CONFIG_SMP 319#ifdef CONFIG_SMP
324static int intca_gic_set_affinity(struct irq_data *data, 320static int intca_gic_set_affinity(struct irq_data *data,
325 const struct cpumask *cpumask, 321 const struct cpumask *cpumask,
@@ -339,7 +335,7 @@ struct irq_chip intca_gic_irq_chip = {
339 .irq_disable = intca_gic_disable, 335 .irq_disable = intca_gic_disable,
340 .irq_shutdown = intca_gic_disable, 336 .irq_shutdown = intca_gic_disable,
341 .irq_set_type = intca_gic_set_type, 337 .irq_set_type = intca_gic_set_type,
342 .irq_set_wake = intca_gic_set_wake, 338 .irq_set_wake = sh73a0_set_wake,
343#ifdef CONFIG_SMP 339#ifdef CONFIG_SMP
344 .irq_set_affinity = intca_gic_set_affinity, 340 .irq_set_affinity = intca_gic_set_affinity,
345#endif 341#endif
@@ -464,3 +460,11 @@ void __init sh73a0_init_irq(void)
464 sh73a0_pint1_cascade.handler = sh73a0_pint1_demux; 460 sh73a0_pint1_cascade.handler = sh73a0_pint1_demux;
465 setup_irq(gic_spi(34), &sh73a0_pint1_cascade); 461 setup_irq(gic_spi(34), &sh73a0_pint1_cascade);
466} 462}
463
464#ifdef CONFIG_OF
465void __init sh73a0_init_irq_dt(void)
466{
467 irqchip_init();
468 gic_arch_extn.irq_set_wake = sh73a0_set_wake;
469}
470#endif
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index ed8d2351915e..1f958d7b0bac 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -12,7 +12,6 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/smp.h> 14#include <linux/smp.h>
15#include <asm/hardware/gic.h>
16 15
17void __init shmobile_smp_init_cpus(unsigned int ncores) 16void __init shmobile_smp_init_cpus(unsigned int ncores)
18{ 17{
@@ -26,6 +25,4 @@ void __init shmobile_smp_init_cpus(unsigned int ncores)
26 25
27 for (i = 0; i < ncores; i++) 26 for (i = 0; i < ncores; i++)
28 set_cpu_possible(i, true); 27 set_cpu_possible(i, true);
29
30 set_smp_cross_call(gic_raise_softirq);
31} 28}
diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c
index 21e5316d2d88..40b87aa1d448 100644
--- a/arch/arm/mach-shmobile/pm-r8a7740.c
+++ b/arch/arm/mach-shmobile/pm-r8a7740.c
@@ -9,7 +9,9 @@
9 * for more details. 9 * for more details.
10 */ 10 */
11#include <linux/console.h> 11#include <linux/console.h>
12#include <linux/suspend.h>
12#include <mach/pm-rmobile.h> 13#include <mach/pm-rmobile.h>
14#include <mach/common.h>
13 15
14#ifdef CONFIG_PM 16#ifdef CONFIG_PM
15static int r8a7740_pd_a4s_suspend(void) 17static int r8a7740_pd_a4s_suspend(void)
@@ -58,3 +60,23 @@ void __init r8a7740_init_pm_domains(void)
58} 60}
59 61
60#endif /* CONFIG_PM */ 62#endif /* CONFIG_PM */
63
64#ifdef CONFIG_SUSPEND
65static int r8a7740_enter_suspend(suspend_state_t suspend_state)
66{
67 cpu_do_idle();
68 return 0;
69}
70
71static void r8a7740_suspend_init(void)
72{
73 shmobile_suspend_ops.enter = r8a7740_enter_suspend;
74}
75#else
76static void r8a7740_suspend_init(void) {}
77#endif
78
79void __init r8a7740_pm_init(void)
80{
81 r8a7740_suspend_init();
82}
diff --git a/arch/arm/mach-shmobile/pm-sh73a0.c b/arch/arm/mach-shmobile/pm-sh73a0.c
new file mode 100644
index 000000000000..99086e98fbbc
--- /dev/null
+++ b/arch/arm/mach-shmobile/pm-sh73a0.c
@@ -0,0 +1,32 @@
1/*
2 * sh73a0 Power management support
3 *
4 * Copyright (C) 2012 Bastian Hecht <hechtb+renesas@gmail.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/suspend.h>
12#include <mach/common.h>
13
14#ifdef CONFIG_SUSPEND
15static int sh73a0_enter_suspend(suspend_state_t suspend_state)
16{
17 cpu_do_idle();
18 return 0;
19}
20
21static void sh73a0_suspend_init(void)
22{
23 shmobile_suspend_ops.enter = sh73a0_enter_suspend;
24}
25#else
26static void sh73a0_suspend_init(void) {}
27#endif
28
29void __init sh73a0_pm_init(void)
30{
31 sh73a0_suspend_init();
32}
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index a47beeb18283..47662a581c0a 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -20,13 +20,14 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/irqchip.h>
23#include <linux/platform_device.h> 24#include <linux/platform_device.h>
24#include <linux/platform_data/gpio-em.h> 25#include <linux/platform_data/gpio-em.h>
25#include <linux/of_platform.h> 26#include <linux/of_platform.h>
26#include <linux/delay.h> 27#include <linux/delay.h>
27#include <linux/input.h> 28#include <linux/input.h>
28#include <linux/io.h> 29#include <linux/io.h>
29#include <linux/of_irq.h> 30#include <linux/irqchip/arm-gic.h>
30#include <mach/hardware.h> 31#include <mach/hardware.h>
31#include <mach/common.h> 32#include <mach/common.h>
32#include <mach/emev2.h> 33#include <mach/emev2.h>
@@ -35,7 +36,6 @@
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
36#include <asm/mach/map.h> 37#include <asm/mach/map.h>
37#include <asm/mach/time.h> 38#include <asm/mach/time.h>
38#include <asm/hardware/gic.h>
39 39
40static struct map_desc emev2_io_desc[] __initdata = { 40static struct map_desc emev2_io_desc[] __initdata = {
41#ifdef CONFIG_SMP 41#ifdef CONFIG_SMP
@@ -445,29 +445,18 @@ void __init emev2_add_standard_devices_dt(void)
445 emev2_auxdata_lookup, NULL); 445 emev2_auxdata_lookup, NULL);
446} 446}
447 447
448static const struct of_device_id emev2_dt_irq_match[] = {
449 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
450 {},
451};
452
453static const char *emev2_boards_compat_dt[] __initdata = { 448static const char *emev2_boards_compat_dt[] __initdata = {
454 "renesas,emev2", 449 "renesas,emev2",
455 NULL, 450 NULL,
456}; 451};
457 452
458void __init emev2_init_irq_dt(void)
459{
460 of_irq_init(emev2_dt_irq_match);
461}
462
463DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)") 453DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
464 .smp = smp_ops(emev2_smp_ops), 454 .smp = smp_ops(emev2_smp_ops),
465 .init_early = emev2_init_delay, 455 .init_early = emev2_init_delay,
466 .nr_irqs = NR_IRQS_LEGACY, 456 .nr_irqs = NR_IRQS_LEGACY,
467 .init_irq = emev2_init_irq_dt, 457 .init_irq = irqchip_init,
468 .handle_irq = gic_handle_irq,
469 .init_machine = emev2_add_standard_devices_dt, 458 .init_machine = emev2_add_standard_devices_dt,
470 .timer = &shmobile_timer, 459 .init_time = shmobile_timer_init,
471 .dt_compat = emev2_boards_compat_dt, 460 .dt_compat = emev2_boards_compat_dt,
472MACHINE_END 461MACHINE_END
473 462
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 095222469d03..847567d55487 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -27,7 +27,6 @@
27#include <linux/serial_sci.h> 27#include <linux/serial_sci.h>
28#include <linux/sh_dma.h> 28#include <linux/sh_dma.h>
29#include <linux/sh_timer.h> 29#include <linux/sh_timer.h>
30#include <linux/dma-mapping.h>
31#include <mach/dma-register.h> 30#include <mach/dma-register.h>
32#include <mach/r8a7740.h> 31#include <mach/r8a7740.h>
33#include <mach/pm-rmobile.h> 32#include <mach/pm-rmobile.h>
@@ -262,6 +261,97 @@ static struct platform_device cmt10_device = {
262 .num_resources = ARRAY_SIZE(cmt10_resources), 261 .num_resources = ARRAY_SIZE(cmt10_resources),
263}; 262};
264 263
264/* TMU */
265static struct sh_timer_config tmu00_platform_data = {
266 .name = "TMU00",
267 .channel_offset = 0x4,
268 .timer_bit = 0,
269 .clockevent_rating = 200,
270};
271
272static struct resource tmu00_resources[] = {
273 [0] = {
274 .name = "TMU00",
275 .start = 0xfff80008,
276 .end = 0xfff80014 - 1,
277 .flags = IORESOURCE_MEM,
278 },
279 [1] = {
280 .start = intcs_evt2irq(0xe80),
281 .flags = IORESOURCE_IRQ,
282 },
283};
284
285static struct platform_device tmu00_device = {
286 .name = "sh_tmu",
287 .id = 0,
288 .dev = {
289 .platform_data = &tmu00_platform_data,
290 },
291 .resource = tmu00_resources,
292 .num_resources = ARRAY_SIZE(tmu00_resources),
293};
294
295static struct sh_timer_config tmu01_platform_data = {
296 .name = "TMU01",
297 .channel_offset = 0x10,
298 .timer_bit = 1,
299 .clocksource_rating = 200,
300};
301
302static struct resource tmu01_resources[] = {
303 [0] = {
304 .name = "TMU01",
305 .start = 0xfff80014,
306 .end = 0xfff80020 - 1,
307 .flags = IORESOURCE_MEM,
308 },
309 [1] = {
310 .start = intcs_evt2irq(0xea0),
311 .flags = IORESOURCE_IRQ,
312 },
313};
314
315static struct platform_device tmu01_device = {
316 .name = "sh_tmu",
317 .id = 1,
318 .dev = {
319 .platform_data = &tmu01_platform_data,
320 },
321 .resource = tmu01_resources,
322 .num_resources = ARRAY_SIZE(tmu01_resources),
323};
324
325static struct sh_timer_config tmu02_platform_data = {
326 .name = "TMU02",
327 .channel_offset = 0x1C,
328 .timer_bit = 2,
329 .clocksource_rating = 200,
330};
331
332static struct resource tmu02_resources[] = {
333 [0] = {
334 .name = "TMU02",
335 .start = 0xfff80020,
336 .end = 0xfff8002C - 1,
337 .flags = IORESOURCE_MEM,
338 },
339 [1] = {
340 .start = intcs_evt2irq(0xec0),
341 .flags = IORESOURCE_IRQ,
342 },
343};
344
345static struct platform_device tmu02_device = {
346 .name = "sh_tmu",
347 .id = 2,
348 .dev = {
349 .platform_data = &tmu02_platform_data,
350 },
351 .resource = tmu02_resources,
352 .num_resources = ARRAY_SIZE(tmu02_resources),
353};
354
265static struct platform_device *r8a7740_early_devices[] __initdata = { 355static struct platform_device *r8a7740_early_devices[] __initdata = {
266 &scif0_device, 356 &scif0_device,
267 &scif1_device, 357 &scif1_device,
@@ -273,6 +363,9 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
273 &scif7_device, 363 &scif7_device,
274 &scifb_device, 364 &scifb_device,
275 &cmt10_device, 365 &cmt10_device,
366 &tmu00_device,
367 &tmu01_device,
368 &tmu02_device,
276}; 369};
277 370
278/* DMA */ 371/* DMA */
@@ -705,12 +798,6 @@ void __init r8a7740_add_standard_devices(void)
705 rmobile_add_device_to_domain("A3SP", &i2c1_device); 798 rmobile_add_device_to_domain("A3SP", &i2c1_device);
706} 799}
707 800
708static void __init r8a7740_earlytimer_init(void)
709{
710 r8a7740_clock_init(0);
711 shmobile_earlytimer_init();
712}
713
714void __init r8a7740_add_early_devices(void) 801void __init r8a7740_add_early_devices(void)
715{ 802{
716 early_platform_add_devices(r8a7740_early_devices, 803 early_platform_add_devices(r8a7740_early_devices,
@@ -718,9 +805,6 @@ void __init r8a7740_add_early_devices(void)
718 805
719 /* setup early console here as well */ 806 /* setup early console here as well */
720 shmobile_setup_console(); 807 shmobile_setup_console();
721
722 /* override timer setup with soc-specific code */
723 shmobile_timer.init = r8a7740_earlytimer_init;
724} 808}
725 809
726#ifdef CONFIG_USE_OF 810#ifdef CONFIG_USE_OF
@@ -763,7 +847,7 @@ DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
763 .init_irq = r8a7740_init_irq, 847 .init_irq = r8a7740_init_irq,
764 .handle_irq = shmobile_handle_irq_intc, 848 .handle_irq = shmobile_handle_irq_intc,
765 .init_machine = r8a7740_add_standard_devices_dt, 849 .init_machine = r8a7740_add_standard_devices_dt,
766 .timer = &shmobile_timer, 850 .init_time = shmobile_timer_init,
767 .dt_compat = r8a7740_boards_compat_dt, 851 .dt_compat = r8a7740_boards_compat_dt,
768MACHINE_END 852MACHINE_END
769 853
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 7a1ad4f38539..7e87ab3eb8d3 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -66,8 +66,7 @@ static struct plat_sci_port scif0_platform_data = {
66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
67 .scbrr_algo_id = SCBRR_ALGO_2, 67 .scbrr_algo_id = SCBRR_ALGO_2,
68 .type = PORT_SCIF, 68 .type = PORT_SCIF,
69 .irqs = { gic_spi(88), gic_spi(88), 69 .irqs = SCIx_IRQ_MUXED(gic_spi(88)),
70 gic_spi(88), gic_spi(88) },
71}; 70};
72 71
73static struct platform_device scif0_device = { 72static struct platform_device scif0_device = {
@@ -84,8 +83,7 @@ static struct plat_sci_port scif1_platform_data = {
84 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 83 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
85 .scbrr_algo_id = SCBRR_ALGO_2, 84 .scbrr_algo_id = SCBRR_ALGO_2,
86 .type = PORT_SCIF, 85 .type = PORT_SCIF,
87 .irqs = { gic_spi(89), gic_spi(89), 86 .irqs = SCIx_IRQ_MUXED(gic_spi(89)),
88 gic_spi(89), gic_spi(89) },
89}; 87};
90 88
91static struct platform_device scif1_device = { 89static struct platform_device scif1_device = {
@@ -102,8 +100,7 @@ static struct plat_sci_port scif2_platform_data = {
102 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 100 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
103 .scbrr_algo_id = SCBRR_ALGO_2, 101 .scbrr_algo_id = SCBRR_ALGO_2,
104 .type = PORT_SCIF, 102 .type = PORT_SCIF,
105 .irqs = { gic_spi(90), gic_spi(90), 103 .irqs = SCIx_IRQ_MUXED(gic_spi(90)),
106 gic_spi(90), gic_spi(90) },
107}; 104};
108 105
109static struct platform_device scif2_device = { 106static struct platform_device scif2_device = {
@@ -120,8 +117,7 @@ static struct plat_sci_port scif3_platform_data = {
120 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 117 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
121 .scbrr_algo_id = SCBRR_ALGO_2, 118 .scbrr_algo_id = SCBRR_ALGO_2,
122 .type = PORT_SCIF, 119 .type = PORT_SCIF,
123 .irqs = { gic_spi(91), gic_spi(91), 120 .irqs = SCIx_IRQ_MUXED(gic_spi(91)),
124 gic_spi(91), gic_spi(91) },
125}; 121};
126 122
127static struct platform_device scif3_device = { 123static struct platform_device scif3_device = {
@@ -138,8 +134,7 @@ static struct plat_sci_port scif4_platform_data = {
138 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 134 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
139 .scbrr_algo_id = SCBRR_ALGO_2, 135 .scbrr_algo_id = SCBRR_ALGO_2,
140 .type = PORT_SCIF, 136 .type = PORT_SCIF,
141 .irqs = { gic_spi(92), gic_spi(92), 137 .irqs = SCIx_IRQ_MUXED(gic_spi(92)),
142 gic_spi(92), gic_spi(92) },
143}; 138};
144 139
145static struct platform_device scif4_device = { 140static struct platform_device scif4_device = {
@@ -156,8 +151,7 @@ static struct plat_sci_port scif5_platform_data = {
156 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 151 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
157 .scbrr_algo_id = SCBRR_ALGO_2, 152 .scbrr_algo_id = SCBRR_ALGO_2,
158 .type = PORT_SCIF, 153 .type = PORT_SCIF,
159 .irqs = { gic_spi(93), gic_spi(93), 154 .irqs = SCIx_IRQ_MUXED(gic_spi(93)),
160 gic_spi(93), gic_spi(93) },
161}; 155};
162 156
163static struct platform_device scif5_device = { 157static struct platform_device scif5_device = {
@@ -339,7 +333,7 @@ void __init r8a7779_add_standard_devices(void)
339/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 333/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
340void __init __weak r8a7779_register_twd(void) { } 334void __init __weak r8a7779_register_twd(void) { }
341 335
342static void __init r8a7779_earlytimer_init(void) 336void __init r8a7779_earlytimer_init(void)
343{ 337{
344 r8a7779_clock_init(); 338 r8a7779_clock_init();
345 shmobile_earlytimer_init(); 339 shmobile_earlytimer_init();
@@ -366,7 +360,4 @@ void __init r8a7779_add_early_devices(void)
366 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel 360 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
367 * command line in case of the marzen board. 361 * command line in case of the marzen board.
368 */ 362 */
369
370 /* override timer setup with soc-specific code */
371 shmobile_timer.init = r8a7779_earlytimer_init;
372} 363}
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index c917882424a7..191ae72e21ba 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -1054,7 +1054,7 @@ void __init sh7372_add_standard_devices(void)
1054 ARRAY_SIZE(domain_devices)); 1054 ARRAY_SIZE(domain_devices));
1055} 1055}
1056 1056
1057static void __init sh7372_earlytimer_init(void) 1057void __init sh7372_earlytimer_init(void)
1058{ 1058{
1059 sh7372_clock_init(); 1059 sh7372_clock_init();
1060 shmobile_earlytimer_init(); 1060 shmobile_earlytimer_init();
@@ -1067,9 +1067,6 @@ void __init sh7372_add_early_devices(void)
1067 1067
1068 /* setup early console here as well */ 1068 /* setup early console here as well */
1069 shmobile_setup_console(); 1069 shmobile_setup_console();
1070
1071 /* override timer setup with soc-specific code */
1072 shmobile_timer.init = sh7372_earlytimer_init;
1073} 1070}
1074 1071
1075#ifdef CONFIG_USE_OF 1072#ifdef CONFIG_USE_OF
@@ -1113,7 +1110,7 @@ DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
1113 .init_irq = sh7372_init_irq, 1110 .init_irq = sh7372_init_irq,
1114 .handle_irq = shmobile_handle_irq_intc, 1111 .handle_irq = shmobile_handle_irq_intc,
1115 .init_machine = sh7372_add_standard_devices_dt, 1112 .init_machine = sh7372_add_standard_devices_dt,
1116 .timer = &shmobile_timer, 1113 .init_time = shmobile_timer_init,
1117 .dt_compat = sh7372_boards_compat_dt, 1114 .dt_compat = sh7372_boards_compat_dt,
1118MACHINE_END 1115MACHINE_END
1119 1116
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index db99a4ade80c..f7ecb0bc1bec 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -23,6 +23,7 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/of_platform.h>
26#include <linux/delay.h> 27#include <linux/delay.h>
27#include <linux/input.h> 28#include <linux/input.h>
28#include <linux/io.h> 29#include <linux/io.h>
@@ -754,7 +755,7 @@ static struct platform_device pmu_device = {
754 .resource = pmu_resources, 755 .resource = pmu_resources,
755}; 756};
756 757
757static struct platform_device *sh73a0_early_devices[] __initdata = { 758static struct platform_device *sh73a0_early_devices_dt[] __initdata = {
758 &scif0_device, 759 &scif0_device,
759 &scif1_device, 760 &scif1_device,
760 &scif2_device, 761 &scif2_device,
@@ -765,6 +766,9 @@ static struct platform_device *sh73a0_early_devices[] __initdata = {
765 &scif7_device, 766 &scif7_device,
766 &scif8_device, 767 &scif8_device,
767 &cmt10_device, 768 &cmt10_device,
769};
770
771static struct platform_device *sh73a0_early_devices[] __initdata = {
768 &tmu00_device, 772 &tmu00_device,
769 &tmu01_device, 773 &tmu01_device,
770}; 774};
@@ -787,6 +791,8 @@ void __init sh73a0_add_standard_devices(void)
787 /* Clear software reset bit on SY-DMAC module */ 791 /* Clear software reset bit on SY-DMAC module */
788 __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 792 __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2);
789 793
794 platform_add_devices(sh73a0_early_devices_dt,
795 ARRAY_SIZE(sh73a0_early_devices_dt));
790 platform_add_devices(sh73a0_early_devices, 796 platform_add_devices(sh73a0_early_devices,
791 ARRAY_SIZE(sh73a0_early_devices)); 797 ARRAY_SIZE(sh73a0_early_devices));
792 platform_add_devices(sh73a0_late_devices, 798 platform_add_devices(sh73a0_late_devices,
@@ -796,7 +802,7 @@ void __init sh73a0_add_standard_devices(void)
796/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 802/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
797void __init __weak sh73a0_register_twd(void) { } 803void __init __weak sh73a0_register_twd(void) { }
798 804
799static void __init sh73a0_earlytimer_init(void) 805void __init sh73a0_earlytimer_init(void)
800{ 806{
801 sh73a0_clock_init(); 807 sh73a0_clock_init();
802 shmobile_earlytimer_init(); 808 shmobile_earlytimer_init();
@@ -805,12 +811,63 @@ static void __init sh73a0_earlytimer_init(void)
805 811
806void __init sh73a0_add_early_devices(void) 812void __init sh73a0_add_early_devices(void)
807{ 813{
814 early_platform_add_devices(sh73a0_early_devices_dt,
815 ARRAY_SIZE(sh73a0_early_devices_dt));
808 early_platform_add_devices(sh73a0_early_devices, 816 early_platform_add_devices(sh73a0_early_devices,
809 ARRAY_SIZE(sh73a0_early_devices)); 817 ARRAY_SIZE(sh73a0_early_devices));
810 818
811 /* setup early console here as well */ 819 /* setup early console here as well */
812 shmobile_setup_console(); 820 shmobile_setup_console();
821}
822
823#ifdef CONFIG_USE_OF
824
825/* Please note that the clock initialisation shcheme used in
826 * sh73a0_add_early_devices_dt() and sh73a0_add_standard_devices_dt()
827 * does not work with SMP as there is a yet to be resolved lock-up in
828 * workqueue initialisation.
829 *
830 * CONFIG_SMP should be disabled when using this code.
831 */
832
833void __init sh73a0_add_early_devices_dt(void)
834{
835 shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */
836
837 early_platform_add_devices(sh73a0_early_devices_dt,
838 ARRAY_SIZE(sh73a0_early_devices_dt));
839
840 /* setup early console here as well */
841 shmobile_setup_console();
842}
813 843
814 /* override timer setup with soc-specific code */ 844static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = {
815 shmobile_timer.init = sh73a0_earlytimer_init; 845 {},
846};
847
848void __init sh73a0_add_standard_devices_dt(void)
849{
850 /* clocks are setup late during boot in the case of DT */
851 sh73a0_clock_init();
852
853 platform_add_devices(sh73a0_early_devices_dt,
854 ARRAY_SIZE(sh73a0_early_devices_dt));
855 of_platform_populate(NULL, of_default_bus_match_table,
856 sh73a0_auxdata_lookup, NULL);
816} 857}
858
859static const char *sh73a0_boards_compat_dt[] __initdata = {
860 "renesas,sh73a0",
861 NULL,
862};
863
864DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
865 .map_io = sh73a0_map_io,
866 .init_early = sh73a0_add_early_devices_dt,
867 .nr_irqs = NR_IRQS_LEGACY,
868 .init_irq = sh73a0_init_irq_dt,
869 .init_machine = sh73a0_add_standard_devices_dt,
870 .init_time = shmobile_timer_init,
871 .dt_compat = sh73a0_boards_compat_dt,
872MACHINE_END
873#endif /* CONFIG_USE_OF */
diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S
index 1d564674451d..a9df53b69ab8 100644
--- a/arch/arm/mach-shmobile/sleep-sh7372.S
+++ b/arch/arm/mach-shmobile/sleep-sh7372.S
@@ -59,17 +59,19 @@ sh7372_do_idle_sysc:
59 mcr p15, 0, r0, c1, c0, 0 59 mcr p15, 0, r0, c1, c0, 0
60 isb 60 isb
61 61
62 /*
63 * Clean and invalidate data cache again.
64 */
65 ldr r1, kernel_flush
66 blx r1
67
62 /* disable L2 cache in the aux control register */ 68 /* disable L2 cache in the aux control register */
63 mrc p15, 0, r10, c1, c0, 1 69 mrc p15, 0, r10, c1, c0, 1
64 bic r10, r10, #2 70 bic r10, r10, #2
65 mcr p15, 0, r10, c1, c0, 1 71 mcr p15, 0, r10, c1, c0, 1
72 isb
66 73
67 /* 74 /*
68 * Invalidate data cache again.
69 */
70 ldr r1, kernel_flush
71 blx r1
72 /*
73 * The kernel doesn't interwork: v7_flush_dcache_all in particluar will 75 * The kernel doesn't interwork: v7_flush_dcache_all in particluar will
74 * always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled. 76 * always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled.
75 * This sequence switches back to ARM. Note that .align may insert a 77 * This sequence switches back to ARM. Note that .align may insert a
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index f67456286280..953eb1f9388d 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -23,11 +23,11 @@
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/irqchip/arm-gic.h>
26#include <mach/common.h> 27#include <mach/common.h>
27#include <mach/emev2.h> 28#include <mach/emev2.h>
28#include <asm/smp_plat.h> 29#include <asm/smp_plat.h>
29#include <asm/smp_scu.h> 30#include <asm/smp_scu.h>
30#include <asm/hardware/gic.h>
31#include <asm/cacheflush.h> 31#include <asm/cacheflush.h>
32 32
33#define EMEV2_SCU_BASE 0x1e000000 33#define EMEV2_SCU_BASE 0x1e000000
@@ -100,7 +100,7 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *
100 /* Tell ROM loader about our vector (in headsmp.S) */ 100 /* Tell ROM loader about our vector (in headsmp.S) */
101 emev2_set_boot_vector(__pa(shmobile_secondary_vector)); 101 emev2_set_boot_vector(__pa(shmobile_secondary_vector));
102 102
103 gic_raise_softirq(cpumask_of(cpu), 0); 103 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
104 return 0; 104 return 0;
105} 105}
106 106
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 2ce6af9a6a37..3a4acf23edcf 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -23,12 +23,12 @@
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/irqchip/arm-gic.h>
26#include <mach/common.h> 27#include <mach/common.h>
27#include <mach/r8a7779.h> 28#include <mach/r8a7779.h>
28#include <asm/smp_plat.h> 29#include <asm/smp_plat.h>
29#include <asm/smp_scu.h> 30#include <asm/smp_scu.h>
30#include <asm/smp_twd.h> 31#include <asm/smp_twd.h>
31#include <asm/hardware/gic.h>
32 32
33#define AVECR IOMEM(0xfe700040) 33#define AVECR IOMEM(0xfe700040)
34 34
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 624f00f70abf..acb46a94ccdf 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -23,12 +23,13 @@
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/irqchip/arm-gic.h>
26#include <mach/common.h> 27#include <mach/common.h>
28#include <asm/cacheflush.h>
27#include <asm/smp_plat.h> 29#include <asm/smp_plat.h>
28#include <mach/sh73a0.h> 30#include <mach/sh73a0.h>
29#include <asm/smp_scu.h> 31#include <asm/smp_scu.h>
30#include <asm/smp_twd.h> 32#include <asm/smp_twd.h>
31#include <asm/hardware/gic.h>
32 33
33#define WUPCR IOMEM(0xe6151010) 34#define WUPCR IOMEM(0xe6151010)
34#define SRESCR IOMEM(0xe6151018) 35#define SRESCR IOMEM(0xe6151018)
@@ -36,14 +37,13 @@
36#define SBAR IOMEM(0xe6180020) 37#define SBAR IOMEM(0xe6180020)
37#define APARMBAREA IOMEM(0xe6f10020) 38#define APARMBAREA IOMEM(0xe6f10020)
38 39
40#define PSTR_SHUTDOWN_MODE 3
41
39static void __iomem *scu_base_addr(void) 42static void __iomem *scu_base_addr(void)
40{ 43{
41 return (void __iomem *)0xf0000000; 44 return (void __iomem *)0xf0000000;
42} 45}
43 46
44static DEFINE_SPINLOCK(scu_lock);
45static unsigned long tmp;
46
47#ifdef CONFIG_HAVE_ARM_TWD 47#ifdef CONFIG_HAVE_ARM_TWD
48static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); 48static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
49void __init sh73a0_register_twd(void) 49void __init sh73a0_register_twd(void)
@@ -52,20 +52,6 @@ void __init sh73a0_register_twd(void)
52} 52}
53#endif 53#endif
54 54
55static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
56{
57 void __iomem *scu_base = scu_base_addr();
58
59 spin_lock(&scu_lock);
60 tmp = __raw_readl(scu_base + 8);
61 tmp &= ~clr;
62 tmp |= set;
63 spin_unlock(&scu_lock);
64
65 /* disable cache coherency after releasing the lock */
66 __raw_writel(tmp, scu_base + 8);
67}
68
69static unsigned int __init sh73a0_get_core_count(void) 55static unsigned int __init sh73a0_get_core_count(void)
70{ 56{
71 void __iomem *scu_base = scu_base_addr(); 57 void __iomem *scu_base = scu_base_addr();
@@ -82,9 +68,6 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct
82{ 68{
83 cpu = cpu_logical_map(cpu); 69 cpu = cpu_logical_map(cpu);
84 70
85 /* enable cache coherency */
86 modify_scu_cpu_psr(0, 3 << (cpu * 8));
87
88 if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3) 71 if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
89 __raw_writel(1 << cpu, WUPCR); /* wake up */ 72 __raw_writel(1 << cpu, WUPCR); /* wake up */
90 else 73 else
@@ -95,16 +78,14 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct
95 78
96static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) 79static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
97{ 80{
98 int cpu = cpu_logical_map(0);
99
100 scu_enable(scu_base_addr()); 81 scu_enable(scu_base_addr());
101 82
102 /* Map the reset vector (in headsmp.S) */ 83 /* Map the reset vector (in headsmp-sh73a0.S) */
103 __raw_writel(0, APARMBAREA); /* 4k */ 84 __raw_writel(0, APARMBAREA); /* 4k */
104 __raw_writel(__pa(shmobile_secondary_vector), SBAR); 85 __raw_writel(__pa(sh73a0_secondary_vector), SBAR);
105 86
106 /* enable cache coherency on CPU0 */ 87 /* enable cache coherency on booting CPU */
107 modify_scu_cpu_psr(0, 3 << (cpu * 8)); 88 scu_power_mode(scu_base_addr(), SCU_PM_NORMAL);
108} 89}
109 90
110static void __init sh73a0_smp_init_cpus(void) 91static void __init sh73a0_smp_init_cpus(void)
@@ -114,16 +95,20 @@ static void __init sh73a0_smp_init_cpus(void)
114 shmobile_smp_init_cpus(ncores); 95 shmobile_smp_init_cpus(ncores);
115} 96}
116 97
117static int __maybe_unused sh73a0_cpu_kill(unsigned int cpu) 98#ifdef CONFIG_HOTPLUG_CPU
99static int sh73a0_cpu_kill(unsigned int cpu)
118{ 100{
101
119 int k; 102 int k;
103 u32 pstr;
120 104
121 /* this function is running on another CPU than the offline target, 105 /*
122 * here we need wait for shutdown code in platform_cpu_die() to 106 * wait until the power status register confirms the shutdown of the
123 * finish before asking SoC-specific code to power off the CPU core. 107 * offline target
124 */ 108 */
125 for (k = 0; k < 1000; k++) { 109 for (k = 0; k < 1000; k++) {
126 if (shmobile_cpu_is_dead(cpu)) 110 pstr = (__raw_readl(PSTR) >> (4 * cpu)) & 3;
111 if (pstr == PSTR_SHUTDOWN_MODE)
127 return 1; 112 return 1;
128 113
129 mdelay(1); 114 mdelay(1);
@@ -132,6 +117,23 @@ static int __maybe_unused sh73a0_cpu_kill(unsigned int cpu)
132 return 0; 117 return 0;
133} 118}
134 119
120static void sh73a0_cpu_die(unsigned int cpu)
121{
122 /*
123 * The ARM MPcore does not issue a cache coherency request for the L1
124 * cache when powering off single CPUs. We must take care of this and
125 * further caches.
126 */
127 dsb();
128 flush_cache_all();
129
130 /* Set power off mode. This takes the CPU out of the MP cluster */
131 scu_power_mode(scu_base_addr(), SCU_PM_POWEROFF);
132
133 /* Enter shutdown mode */
134 cpu_do_idle();
135}
136#endif /* CONFIG_HOTPLUG_CPU */
135 137
136struct smp_operations sh73a0_smp_ops __initdata = { 138struct smp_operations sh73a0_smp_ops __initdata = {
137 .smp_init_cpus = sh73a0_smp_init_cpus, 139 .smp_init_cpus = sh73a0_smp_init_cpus,
@@ -140,7 +142,7 @@ struct smp_operations sh73a0_smp_ops __initdata = {
140 .smp_boot_secondary = sh73a0_boot_secondary, 142 .smp_boot_secondary = sh73a0_boot_secondary,
141#ifdef CONFIG_HOTPLUG_CPU 143#ifdef CONFIG_HOTPLUG_CPU
142 .cpu_kill = sh73a0_cpu_kill, 144 .cpu_kill = sh73a0_cpu_kill,
143 .cpu_die = shmobile_cpu_die, 145 .cpu_die = sh73a0_cpu_die,
144 .cpu_disable = shmobile_cpu_disable, 146 .cpu_disable = shmobile_cpu_disable_any,
145#endif 147#endif
146}; 148};
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index a68919727e24..fdbe54a11555 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -60,10 +60,6 @@ void __init shmobile_earlytimer_init(void)
60 late_time_init = shmobile_late_time_init; 60 late_time_init = shmobile_late_time_init;
61} 61}
62 62
63static void __init shmobile_timer_init(void) 63void __init shmobile_timer_init(void)
64{ 64{
65} 65}
66
67struct sys_timer shmobile_timer = {
68 .init = shmobile_timer_init,
69};
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index 68dd1b69512a..4e9e69d9e7de 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -22,9 +22,9 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/of.h> 23#include <linux/of.h>
24#include <linux/of_address.h> 24#include <linux/of_address.h>
25#include <linux/irqchip/arm-gic.h>
25 26
26#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
27#include <asm/hardware/gic.h>
28#include <asm/smp_scu.h> 28#include <asm/smp_scu.h>
29#include <asm/smp_plat.h> 29#include <asm/smp_plat.h>
30 30
@@ -83,8 +83,6 @@ static void __init socfpga_smp_init_cpus(void)
83 83
84 for (i = 0; i < ncores; i++) 84 for (i = 0; i < ncores; i++)
85 set_cpu_possible(i, true); 85 set_cpu_possible(i, true);
86
87 set_smp_cross_call(gic_raise_softirq);
88} 86}
89 87
90static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus) 88static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index 6732924a5fee..27d68468a027 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -15,12 +15,12 @@
15 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */ 16 */
17#include <linux/dw_apb_timer.h> 17#include <linux/dw_apb_timer.h>
18#include <linux/irqchip.h>
18#include <linux/of_address.h> 19#include <linux/of_address.h>
19#include <linux/of_irq.h> 20#include <linux/of_irq.h>
20#include <linux/of_platform.h> 21#include <linux/of_platform.h>
21 22
22#include <asm/hardware/cache-l2x0.h> 23#include <asm/hardware/cache-l2x0.h>
23#include <asm/hardware/gic.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26 26
@@ -62,11 +62,6 @@ static void __init socfpga_map_io(void)
62 early_printk("Early printk initialized\n"); 62 early_printk("Early printk initialized\n");
63} 63}
64 64
65const static struct of_device_id irq_match[] = {
66 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
67 {}
68};
69
70void __init socfpga_sysmgr_init(void) 65void __init socfpga_sysmgr_init(void)
71{ 66{
72 struct device_node *np; 67 struct device_node *np;
@@ -78,9 +73,9 @@ void __init socfpga_sysmgr_init(void)
78 rst_manager_base_addr = of_iomap(np, 0); 73 rst_manager_base_addr = of_iomap(np, 0);
79} 74}
80 75
81static void __init gic_init_irq(void) 76static void __init socfpga_init_irq(void)
82{ 77{
83 of_irq_init(irq_match); 78 irqchip_init();
84 socfpga_sysmgr_init(); 79 socfpga_sysmgr_init();
85} 80}
86 81
@@ -105,9 +100,8 @@ static const char *altera_dt_match[] = {
105DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA") 100DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
106 .smp = smp_ops(socfpga_smp_ops), 101 .smp = smp_ops(socfpga_smp_ops),
107 .map_io = socfpga_map_io, 102 .map_io = socfpga_map_io,
108 .init_irq = gic_init_irq, 103 .init_irq = socfpga_init_irq,
109 .handle_irq = gic_handle_irq, 104 .init_time = dw_apb_timer_init,
110 .timer = &dw_apb_timer,
111 .init_machine = socfpga_cyclone5_init, 105 .init_machine = socfpga_cyclone5_init,
112 .restart = socfpga_cyclone5_restart, 106 .restart = socfpga_cyclone5_restart,
113 .dt_compat = altera_dt_match, 107 .dt_compat = altera_dt_match,
diff --git a/arch/arm/mach-spear13xx/include/mach/generic.h b/arch/arm/mach-spear13xx/include/mach/generic.h
index c33f4d9361bd..633e678e01a3 100644
--- a/arch/arm/mach-spear13xx/include/mach/generic.h
+++ b/arch/arm/mach-spear13xx/include/mach/generic.h
@@ -18,7 +18,7 @@
18#include <asm/mach/time.h> 18#include <asm/mach/time.h>
19 19
20/* Add spear13xx structure declarations here */ 20/* Add spear13xx structure declarations here */
21extern struct sys_timer spear13xx_timer; 21extern void spear13xx_timer_init(void);
22extern struct pl022_ssp_controller pl022_plat_data; 22extern struct pl022_ssp_controller pl022_plat_data;
23extern struct dw_dma_platform_data dmac_plat_data; 23extern struct dw_dma_platform_data dmac_plat_data;
24extern struct dw_dma_slave cf_dma_priv; 24extern struct dw_dma_slave cf_dma_priv;
@@ -28,7 +28,6 @@ extern struct dw_dma_slave nand_write_dma_priv;
28/* Add spear13xx family function declarations here */ 28/* Add spear13xx family function declarations here */
29void __init spear_setup_of_timer(void); 29void __init spear_setup_of_timer(void);
30void __init spear13xx_map_io(void); 30void __init spear13xx_map_io(void);
31void __init spear13xx_dt_init_irq(void);
32void __init spear13xx_l2x0_init(void); 31void __init spear13xx_l2x0_init(void);
33bool dw_dma_filter(struct dma_chan *chan, void *slave); 32bool dw_dma_filter(struct dma_chan *chan, void *slave);
34void spear_restart(char, const char *); 33void spear_restart(char, const char *);
diff --git a/arch/arm/mach-spear13xx/platsmp.c b/arch/arm/mach-spear13xx/platsmp.c
index 2eaa3fa7b432..af4ade61cd95 100644
--- a/arch/arm/mach-spear13xx/platsmp.c
+++ b/arch/arm/mach-spear13xx/platsmp.c
@@ -15,8 +15,8 @@
15#include <linux/jiffies.h> 15#include <linux/jiffies.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/irqchip/arm-gic.h>
18#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
19#include <asm/hardware/gic.h>
20#include <asm/smp_scu.h> 20#include <asm/smp_scu.h>
21#include <mach/spear.h> 21#include <mach/spear.h>
22#include <mach/generic.h> 22#include <mach/generic.h>
@@ -104,8 +104,6 @@ static void __init spear13xx_smp_init_cpus(void)
104 104
105 for (i = 0; i < ncores; i++) 105 for (i = 0; i < ncores; i++)
106 set_cpu_possible(i, true); 106 set_cpu_possible(i, true);
107
108 set_smp_cross_call(gic_raise_softirq);
109} 107}
110 108
111static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus) 109static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-spear13xx/spear1310.c b/arch/arm/mach-spear13xx/spear1310.c
index 02f4724bb0d4..56214d1076ef 100644
--- a/arch/arm/mach-spear13xx/spear1310.c
+++ b/arch/arm/mach-spear13xx/spear1310.c
@@ -14,9 +14,9 @@
14#define pr_fmt(fmt) "SPEAr1310: " fmt 14#define pr_fmt(fmt) "SPEAr1310: " fmt
15 15
16#include <linux/amba/pl022.h> 16#include <linux/amba/pl022.h>
17#include <linux/irqchip.h>
17#include <linux/of_platform.h> 18#include <linux/of_platform.h>
18#include <linux/pata_arasan_cf_data.h> 19#include <linux/pata_arasan_cf_data.h>
19#include <asm/hardware/gic.h>
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <asm/mach/map.h> 21#include <asm/mach/map.h>
22#include <mach/generic.h> 22#include <mach/generic.h>
@@ -90,9 +90,8 @@ static void __init spear1310_map_io(void)
90DT_MACHINE_START(SPEAR1310_DT, "ST SPEAr1310 SoC with Flattened Device Tree") 90DT_MACHINE_START(SPEAR1310_DT, "ST SPEAr1310 SoC with Flattened Device Tree")
91 .smp = smp_ops(spear13xx_smp_ops), 91 .smp = smp_ops(spear13xx_smp_ops),
92 .map_io = spear1310_map_io, 92 .map_io = spear1310_map_io,
93 .init_irq = spear13xx_dt_init_irq, 93 .init_irq = irqchip_init,
94 .handle_irq = gic_handle_irq, 94 .init_time = spear13xx_timer_init,
95 .timer = &spear13xx_timer,
96 .init_machine = spear1310_dt_init, 95 .init_machine = spear1310_dt_init,
97 .restart = spear_restart, 96 .restart = spear_restart,
98 .dt_compat = spear1310_dt_board_compat, 97 .dt_compat = spear1310_dt_board_compat,
diff --git a/arch/arm/mach-spear13xx/spear1340.c b/arch/arm/mach-spear13xx/spear1340.c
index 081014fb314a..9a28beb2a113 100644
--- a/arch/arm/mach-spear13xx/spear1340.c
+++ b/arch/arm/mach-spear13xx/spear1340.c
@@ -18,7 +18,7 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/dw_dmac.h> 19#include <linux/dw_dmac.h>
20#include <linux/of_platform.h> 20#include <linux/of_platform.h>
21#include <asm/hardware/gic.h> 21#include <linux/irqchip.h>
22#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
23#include <mach/dma.h> 23#include <mach/dma.h>
24#include <mach/generic.h> 24#include <mach/generic.h>
@@ -184,9 +184,8 @@ static const char * const spear1340_dt_board_compat[] = {
184DT_MACHINE_START(SPEAR1340_DT, "ST SPEAr1340 SoC with Flattened Device Tree") 184DT_MACHINE_START(SPEAR1340_DT, "ST SPEAr1340 SoC with Flattened Device Tree")
185 .smp = smp_ops(spear13xx_smp_ops), 185 .smp = smp_ops(spear13xx_smp_ops),
186 .map_io = spear13xx_map_io, 186 .map_io = spear13xx_map_io,
187 .init_irq = spear13xx_dt_init_irq, 187 .init_irq = irqchip_init,
188 .handle_irq = gic_handle_irq, 188 .init_time = spear13xx_timer_init,
189 .timer = &spear13xx_timer,
190 .init_machine = spear1340_dt_init, 189 .init_machine = spear1340_dt_init,
191 .restart = spear_restart, 190 .restart = spear_restart,
192 .dt_compat = spear1340_dt_board_compat, 191 .dt_compat = spear1340_dt_board_compat,
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index c4af775a8451..c7d2b4a8d8cc 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -17,9 +17,8 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/dw_dmac.h> 18#include <linux/dw_dmac.h>
19#include <linux/err.h> 19#include <linux/err.h>
20#include <linux/of_irq.h> 20#include <linux/of.h>
21#include <asm/hardware/cache-l2x0.h> 21#include <asm/hardware/cache-l2x0.h>
22#include <asm/hardware/gic.h>
23#include <asm/mach/map.h> 22#include <asm/mach/map.h>
24#include <asm/smp_twd.h> 23#include <asm/smp_twd.h>
25#include <mach/dma.h> 24#include <mach/dma.h>
@@ -153,7 +152,7 @@ static void __init spear13xx_clk_init(void)
153 pr_err("%s: Unknown machine\n", __func__); 152 pr_err("%s: Unknown machine\n", __func__);
154} 153}
155 154
156static void __init spear13xx_timer_init(void) 155void __init spear13xx_timer_init(void)
157{ 156{
158 char pclk_name[] = "osc_24m_clk"; 157 char pclk_name[] = "osc_24m_clk";
159 struct clk *gpt_clk, *pclk; 158 struct clk *gpt_clk, *pclk;
@@ -182,17 +181,3 @@ static void __init spear13xx_timer_init(void)
182 spear_setup_of_timer(); 181 spear_setup_of_timer();
183 twd_local_timer_of_register(); 182 twd_local_timer_of_register();
184} 183}
185
186struct sys_timer spear13xx_timer = {
187 .init = spear13xx_timer_init,
188};
189
190static const struct of_device_id gic_of_match[] __initconst = {
191 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
192 { /* Sentinel */ }
193};
194
195void __init spear13xx_dt_init_irq(void)
196{
197 of_irq_init(gic_of_match);
198}
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index ce19113ca791..df310799e416 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -22,7 +22,7 @@
22#include <asm/mach/map.h> 22#include <asm/mach/map.h>
23 23
24/* Add spear3xx family device structure declarations here */ 24/* Add spear3xx family device structure declarations here */
25extern struct sys_timer spear3xx_timer; 25extern void spear3xx_timer_init(void);
26extern struct pl022_ssp_controller pl022_plat_data; 26extern struct pl022_ssp_controller pl022_plat_data;
27extern struct pl08x_platform_data pl080_plat_data; 27extern struct pl08x_platform_data pl080_plat_data;
28 28
@@ -30,7 +30,6 @@ extern struct pl08x_platform_data pl080_plat_data;
30void __init spear_setup_of_timer(void); 30void __init spear_setup_of_timer(void);
31void __init spear3xx_clk_init(void); 31void __init spear3xx_clk_init(void);
32void __init spear3xx_map_io(void); 32void __init spear3xx_map_io(void);
33void __init spear3xx_dt_init_irq(void);
34 33
35void spear_restart(char, const char *); 34void spear_restart(char, const char *);
36 35
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index a69cbfdb07ee..bbc9b7e9c62c 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -14,8 +14,8 @@
14#define pr_fmt(fmt) "SPEAr300: " fmt 14#define pr_fmt(fmt) "SPEAr300: " fmt
15 15
16#include <linux/amba/pl08x.h> 16#include <linux/amba/pl08x.h>
17#include <linux/irqchip.h>
17#include <linux/of_platform.h> 18#include <linux/of_platform.h>
18#include <asm/hardware/vic.h>
19#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
20#include <mach/generic.h> 20#include <mach/generic.h>
21#include <mach/spear.h> 21#include <mach/spear.h>
@@ -212,9 +212,8 @@ static void __init spear300_map_io(void)
212 212
213DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree") 213DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
214 .map_io = spear300_map_io, 214 .map_io = spear300_map_io,
215 .init_irq = spear3xx_dt_init_irq, 215 .init_irq = irqchip_init,
216 .handle_irq = vic_handle_irq, 216 .init_time = spear3xx_timer_init,
217 .timer = &spear3xx_timer,
218 .init_machine = spear300_dt_init, 217 .init_machine = spear300_dt_init,
219 .restart = spear_restart, 218 .restart = spear_restart,
220 .dt_compat = spear300_dt_board_compat, 219 .dt_compat = spear300_dt_board_compat,
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index b963ebb10b56..c13a434a8195 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -15,8 +15,8 @@
15 15
16#include <linux/amba/pl08x.h> 16#include <linux/amba/pl08x.h>
17#include <linux/amba/serial.h> 17#include <linux/amba/serial.h>
18#include <linux/irqchip.h>
18#include <linux/of_platform.h> 19#include <linux/of_platform.h>
19#include <asm/hardware/vic.h>
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <mach/generic.h> 21#include <mach/generic.h>
22#include <mach/spear.h> 22#include <mach/spear.h>
@@ -254,9 +254,8 @@ static void __init spear310_map_io(void)
254 254
255DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree") 255DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree")
256 .map_io = spear310_map_io, 256 .map_io = spear310_map_io,
257 .init_irq = spear3xx_dt_init_irq, 257 .init_irq = irqchip_init,
258 .handle_irq = vic_handle_irq, 258 .init_time = spear3xx_timer_init,
259 .timer = &spear3xx_timer,
260 .init_machine = spear310_dt_init, 259 .init_machine = spear310_dt_init,
261 .restart = spear_restart, 260 .restart = spear_restart,
262 .dt_compat = spear310_dt_board_compat, 261 .dt_compat = spear310_dt_board_compat,
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 66e3a0c33e75..e1c77079a3e5 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -16,8 +16,8 @@
16#include <linux/amba/pl022.h> 16#include <linux/amba/pl022.h>
17#include <linux/amba/pl08x.h> 17#include <linux/amba/pl08x.h>
18#include <linux/amba/serial.h> 18#include <linux/amba/serial.h>
19#include <linux/irqchip.h>
19#include <linux/of_platform.h> 20#include <linux/of_platform.h>
20#include <asm/hardware/vic.h>
21#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
22#include <mach/generic.h> 22#include <mach/generic.h>
23#include <mach/spear.h> 23#include <mach/spear.h>
@@ -268,9 +268,8 @@ static void __init spear320_map_io(void)
268 268
269DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree") 269DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree")
270 .map_io = spear320_map_io, 270 .map_io = spear320_map_io,
271 .init_irq = spear3xx_dt_init_irq, 271 .init_irq = irqchip_init,
272 .handle_irq = vic_handle_irq, 272 .init_time = spear3xx_timer_init,
273 .timer = &spear3xx_timer,
274 .init_machine = spear320_dt_init, 273 .init_machine = spear320_dt_init,
275 .restart = spear_restart, 274 .restart = spear_restart,
276 .dt_compat = spear320_dt_board_compat, 275 .dt_compat = spear320_dt_board_compat,
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 38fe95db31a7..b2ba516ca2d4 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -15,11 +15,8 @@
15 15
16#include <linux/amba/pl022.h> 16#include <linux/amba/pl022.h>
17#include <linux/amba/pl08x.h> 17#include <linux/amba/pl08x.h>
18#include <linux/irqchip/spear-shirq.h>
19#include <linux/of_irq.h>
20#include <linux/io.h> 18#include <linux/io.h>
21#include <asm/hardware/pl080.h> 19#include <asm/hardware/pl080.h>
22#include <asm/hardware/vic.h>
23#include <plat/pl080.h> 20#include <plat/pl080.h>
24#include <mach/generic.h> 21#include <mach/generic.h>
25#include <mach/spear.h> 22#include <mach/spear.h>
@@ -87,7 +84,7 @@ void __init spear3xx_map_io(void)
87 iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc)); 84 iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc));
88} 85}
89 86
90static void __init spear3xx_timer_init(void) 87void __init spear3xx_timer_init(void)
91{ 88{
92 char pclk_name[] = "pll3_clk"; 89 char pclk_name[] = "pll3_clk";
93 struct clk *gpt_clk, *pclk; 90 struct clk *gpt_clk, *pclk;
@@ -115,20 +112,3 @@ static void __init spear3xx_timer_init(void)
115 112
116 spear_setup_of_timer(); 113 spear_setup_of_timer();
117} 114}
118
119struct sys_timer spear3xx_timer = {
120 .init = spear3xx_timer_init,
121};
122
123static const struct of_device_id vic_of_match[] __initconst = {
124 { .compatible = "arm,pl190-vic", .data = vic_of_init, },
125 { .compatible = "st,spear300-shirq", .data = spear300_shirq_of_init, },
126 { .compatible = "st,spear310-shirq", .data = spear310_shirq_of_init, },
127 { .compatible = "st,spear320-shirq", .data = spear320_shirq_of_init, },
128 { /* Sentinel */ }
129};
130
131void __init spear3xx_dt_init_irq(void)
132{
133 of_irq_init(vic_of_match);
134}
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 5a5a52db252b..b8bd33ca88bd 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -16,12 +16,11 @@
16#include <linux/amba/pl08x.h> 16#include <linux/amba/pl08x.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/irqchip.h>
19#include <linux/of.h> 20#include <linux/of.h>
20#include <linux/of_address.h> 21#include <linux/of_address.h>
21#include <linux/of_irq.h>
22#include <linux/of_platform.h> 22#include <linux/of_platform.h>
23#include <asm/hardware/pl080.h> 23#include <asm/hardware/pl080.h>
24#include <asm/hardware/vic.h>
25#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
26#include <asm/mach/time.h> 25#include <asm/mach/time.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
@@ -374,7 +373,7 @@ void __init spear6xx_map_io(void)
374 iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc)); 373 iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
375} 374}
376 375
377static void __init spear6xx_timer_init(void) 376void __init spear6xx_timer_init(void)
378{ 377{
379 char pclk_name[] = "pll3_clk"; 378 char pclk_name[] = "pll3_clk";
380 struct clk *gpt_clk, *pclk; 379 struct clk *gpt_clk, *pclk;
@@ -403,10 +402,6 @@ static void __init spear6xx_timer_init(void)
403 spear_setup_of_timer(); 402 spear_setup_of_timer();
404} 403}
405 404
406struct sys_timer spear6xx_timer = {
407 .init = spear6xx_timer_init,
408};
409
410/* Add auxdata to pass platform data */ 405/* Add auxdata to pass platform data */
411struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = { 406struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = {
412 OF_DEV_AUXDATA("arm,pl080", SPEAR6XX_ICM3_DMA_BASE, NULL, 407 OF_DEV_AUXDATA("arm,pl080", SPEAR6XX_ICM3_DMA_BASE, NULL,
@@ -425,21 +420,10 @@ static const char *spear600_dt_board_compat[] = {
425 NULL 420 NULL
426}; 421};
427 422
428static const struct of_device_id vic_of_match[] __initconst = {
429 { .compatible = "arm,pl190-vic", .data = vic_of_init, },
430 { /* Sentinel */ }
431};
432
433static void __init spear6xx_dt_init_irq(void)
434{
435 of_irq_init(vic_of_match);
436}
437
438DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)") 423DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)")
439 .map_io = spear6xx_map_io, 424 .map_io = spear6xx_map_io,
440 .init_irq = spear6xx_dt_init_irq, 425 .init_irq = irqchip_init,
441 .handle_irq = vic_handle_irq, 426 .init_time = spear6xx_timer_init,
442 .timer = &spear6xx_timer,
443 .init_machine = spear600_dt_init, 427 .init_machine = spear600_dt_init,
444 .restart = spear_restart, 428 .restart = spear_restart,
445 .dt_compat = spear600_dt_board_compat, 429 .dt_compat = spear600_dt_board_compat,
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index 1dc8a92e5a5f..fb8fbcecb17f 100644
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -21,8 +21,6 @@
21 21
22#include <linux/irqchip/sunxi.h> 22#include <linux/irqchip/sunxi.h>
23 23
24#include <asm/hardware/vic.h>
25
26#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 25#include <asm/mach/map.h>
28 26
@@ -91,6 +89,6 @@ DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
91 .init_irq = sunxi_init_irq, 89 .init_irq = sunxi_init_irq,
92 .handle_irq = sunxi_handle_irq, 90 .handle_irq = sunxi_handle_irq,
93 .restart = sunxi_restart, 91 .restart = sunxi_restart,
94 .timer = &sunxi_timer, 92 .init_time = &sunxi_timer_init,
95 .dt_compat = sunxi_board_dt_compat, 93 .dt_compat = sunxi_board_dt_compat,
96MACHINE_END 94MACHINE_END
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index 734d9cc87f2e..5ed81bab2d4b 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -25,7 +25,6 @@
25#include <linux/of.h> 25#include <linux/of.h>
26#include <linux/of_address.h> 26#include <linux/of_address.h>
27#include <linux/of_fdt.h> 27#include <linux/of_fdt.h>
28#include <linux/of_irq.h>
29#include <linux/of_platform.h> 28#include <linux/of_platform.h>
30#include <linux/pda_power.h> 29#include <linux/pda_power.h>
31#include <linux/platform_data/tegra_usb.h> 30#include <linux/platform_data/tegra_usb.h>
@@ -34,7 +33,6 @@
34#include <linux/i2c-tegra.h> 33#include <linux/i2c-tegra.h>
35#include <linux/usb/tegra_usb_phy.h> 34#include <linux/usb/tegra_usb_phy.h>
36 35
37#include <asm/hardware/gic.h>
38#include <asm/mach-types.h> 36#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
40#include <asm/mach/time.h> 38#include <asm/mach/time.h>
@@ -202,8 +200,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
202 .smp = smp_ops(tegra_smp_ops), 200 .smp = smp_ops(tegra_smp_ops),
203 .init_early = tegra20_init_early, 201 .init_early = tegra20_init_early,
204 .init_irq = tegra_dt_init_irq, 202 .init_irq = tegra_dt_init_irq,
205 .handle_irq = gic_handle_irq, 203 .init_time = tegra_init_timer,
206 .timer = &tegra_sys_timer,
207 .init_machine = tegra_dt_init, 204 .init_machine = tegra_dt_init,
208 .init_late = tegra_dt_init_late, 205 .init_late = tegra_dt_init_late,
209 .restart = tegra_assert_system_reset, 206 .restart = tegra_assert_system_reset,
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c
index 6497d1236b08..12dc2ddeca64 100644
--- a/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -31,7 +31,6 @@
31#include <linux/of_platform.h> 31#include <linux/of_platform.h>
32 32
33#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
34#include <asm/hardware/gic.h>
35 34
36#include "board.h" 35#include "board.h"
37#include "clock.h" 36#include "clock.h"
@@ -112,8 +111,7 @@ DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
112 .map_io = tegra_map_common_io, 111 .map_io = tegra_map_common_io,
113 .init_early = tegra30_init_early, 112 .init_early = tegra30_init_early,
114 .init_irq = tegra_dt_init_irq, 113 .init_irq = tegra_dt_init_irq,
115 .handle_irq = gic_handle_irq, 114 .init_time = tegra_init_timer,
116 .timer = &tegra_sys_timer,
117 .init_machine = tegra30_dt_init, 115 .init_machine = tegra30_dt_init,
118 .init_late = tegra_init_late, 116 .init_late = tegra_init_late,
119 .restart = tegra_assert_system_reset, 117 .restart = tegra_assert_system_reset,
diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h
index 91fbe733a21e..744cdd246f6a 100644
--- a/arch/arm/mach-tegra/board.h
+++ b/arch/arm/mach-tegra/board.h
@@ -55,5 +55,5 @@ static inline int harmony_pcie_init(void) { return 0; }
55 55
56void __init tegra_paz00_wifikill_init(void); 56void __init tegra_paz00_wifikill_init(void);
57 57
58extern struct sys_timer tegra_sys_timer; 58extern void tegra_init_timer(void);
59#endif 59#endif
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index d54cfc54b9fe..3599959517b3 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -21,10 +21,9 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/of_irq.h> 24#include <linux/irqchip.h>
25 25
26#include <asm/hardware/cache-l2x0.h> 26#include <asm/hardware/cache-l2x0.h>
27#include <asm/hardware/gic.h>
28 27
29#include <mach/powergate.h> 28#include <mach/powergate.h>
30 29
@@ -57,15 +56,10 @@ u32 tegra_uart_config[4] = {
57}; 56};
58 57
59#ifdef CONFIG_OF 58#ifdef CONFIG_OF
60static const struct of_device_id tegra_dt_irq_match[] __initconst = {
61 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
62 { }
63};
64
65void __init tegra_dt_init_irq(void) 59void __init tegra_dt_init_irq(void)
66{ 60{
67 tegra_init_irq(); 61 tegra_init_irq();
68 of_irq_init(tegra_dt_irq_match); 62 irqchip_init();
69} 63}
70#endif 64#endif
71 65
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index b7886f183511..2ff2128cb9d8 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -22,8 +22,7 @@
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/of.h> 24#include <linux/of.h>
25 25#include <linux/irqchip/arm-gic.h>
26#include <asm/hardware/gic.h>
27 26
28#include "board.h" 27#include "board.h"
29#include "iomap.h" 28#include "iomap.h"
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 1b926df99c4b..18d7290cf93b 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -18,9 +18,9 @@
18#include <linux/jiffies.h> 18#include <linux/jiffies.h>
19#include <linux/smp.h> 19#include <linux/smp.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/irqchip/arm-gic.h>
21 22
22#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
23#include <asm/hardware/gic.h>
24#include <asm/mach-types.h> 24#include <asm/mach-types.h>
25#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
26 26
@@ -159,8 +159,6 @@ static void __init tegra_smp_init_cpus(void)
159 159
160 for (i = 0; i < ncores; i++) 160 for (i = 0; i < ncores; i++)
161 set_cpu_possible(i, true); 161 set_cpu_possible(i, true);
162
163 set_smp_cross_call(gic_raise_softirq);
164} 162}
165 163
166static void __init tegra_smp_prepare_cpus(unsigned int max_cpus) 164static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index e4863f3e9ee7..eba0969ded19 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -168,7 +168,7 @@ static const struct of_device_id rtc_match[] __initconst = {
168 {} 168 {}
169}; 169};
170 170
171static void __init tegra_init_timer(void) 171void __init tegra_init_timer(void)
172{ 172{
173 struct device_node *np; 173 struct device_node *np;
174 struct clk *clk; 174 struct clk *clk;
@@ -259,24 +259,16 @@ static void __init tegra_init_timer(void)
259 BUG(); 259 BUG();
260 } 260 }
261 261
262 clockevents_calc_mult_shift(&tegra_clockevent, 1000000, 5);
263 tegra_clockevent.max_delta_ns =
264 clockevent_delta2ns(0x1fffffff, &tegra_clockevent);
265 tegra_clockevent.min_delta_ns =
266 clockevent_delta2ns(0x1, &tegra_clockevent);
267 tegra_clockevent.cpumask = cpu_all_mask; 262 tegra_clockevent.cpumask = cpu_all_mask;
268 tegra_clockevent.irq = tegra_timer_irq.irq; 263 tegra_clockevent.irq = tegra_timer_irq.irq;
269 clockevents_register_device(&tegra_clockevent); 264 clockevents_config_and_register(&tegra_clockevent, 1000000,
265 0x1, 0x1fffffff);
270#ifdef CONFIG_HAVE_ARM_TWD 266#ifdef CONFIG_HAVE_ARM_TWD
271 twd_local_timer_of_register(); 267 twd_local_timer_of_register();
272#endif 268#endif
273 register_persistent_clock(NULL, tegra_read_persistent_clock); 269 register_persistent_clock(NULL, tegra_read_persistent_clock);
274} 270}
275 271
276struct sys_timer tegra_sys_timer = {
277 .init = tegra_init_timer,
278};
279
280#ifdef CONFIG_PM 272#ifdef CONFIG_PM
281static u32 usec_config; 273static u32 usec_config;
282 274
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 4ce77cdc31cc..12060ae4e8f1 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -31,11 +31,11 @@
31#include <linux/dma-mapping.h> 31#include <linux/dma-mapping.h>
32#include <linux/platform_data/clk-u300.h> 32#include <linux/platform_data/clk-u300.h>
33#include <linux/platform_data/pinctrl-coh901.h> 33#include <linux/platform_data/pinctrl-coh901.h>
34#include <linux/irqchip/arm-vic.h>
34 35
35#include <asm/types.h> 36#include <asm/types.h>
36#include <asm/setup.h> 37#include <asm/setup.h>
37#include <asm/memory.h> 38#include <asm/memory.h>
38#include <asm/hardware/vic.h>
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
40#include <asm/mach-types.h> 40#include <asm/mach-types.h>
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
@@ -1779,8 +1779,7 @@ MACHINE_START(U300, "Ericsson AB U335 S335/B335 Prototype Board")
1779 .map_io = u300_map_io, 1779 .map_io = u300_map_io,
1780 .nr_irqs = 0, 1780 .nr_irqs = 0,
1781 .init_irq = u300_init_irq, 1781 .init_irq = u300_init_irq,
1782 .handle_irq = vic_handle_irq, 1782 .init_time = u300_timer_init,
1783 .timer = &u300_timer,
1784 .init_machine = u300_init_machine, 1783 .init_machine = u300_init_machine,
1785 .restart = u300_restart, 1784 .restart = u300_restart,
1786MACHINE_END 1785MACHINE_END
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 1da10e20e996..d9e73209c9b8 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -349,7 +349,7 @@ static u32 notrace u300_read_sched_clock(void)
349/* 349/*
350 * This sets up the system timers, clock source and clock event. 350 * This sets up the system timers, clock source and clock event.
351 */ 351 */
352static void __init u300_timer_init(void) 352void __init u300_timer_init(void)
353{ 353{
354 struct clk *clk; 354 struct clk *clk;
355 unsigned long rate; 355 unsigned long rate;
@@ -413,11 +413,3 @@ static void __init u300_timer_init(void)
413 * used by hrtimers! 413 * used by hrtimers!
414 */ 414 */
415} 415}
416
417/*
418 * Very simple system timer that only register the clock event and
419 * clock source.
420 */
421struct sys_timer u300_timer = {
422 .init = u300_timer_init,
423};
diff --git a/arch/arm/mach-u300/timer.h b/arch/arm/mach-u300/timer.h
index b5e9791762e0..d34287bc34f5 100644
--- a/arch/arm/mach-u300/timer.h
+++ b/arch/arm/mach-u300/timer.h
@@ -1 +1 @@
extern struct sys_timer u300_timer; extern void u300_timer_init(void);
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index d453522edb0d..0e928d281759 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -40,7 +40,6 @@
40 40
41#include <asm/mach-types.h> 41#include <asm/mach-types.h>
42#include <asm/mach/arch.h> 42#include <asm/mach/arch.h>
43#include <asm/hardware/gic.h>
44 43
45#include <mach/hardware.h> 44#include <mach/hardware.h>
46#include <mach/setup.h> 45#include <mach/setup.h>
@@ -751,8 +750,7 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
751 .map_io = u8500_map_io, 750 .map_io = u8500_map_io,
752 .init_irq = ux500_init_irq, 751 .init_irq = ux500_init_irq,
753 /* we re-use nomadik timer here */ 752 /* we re-use nomadik timer here */
754 .timer = &ux500_timer, 753 .init_time = ux500_timer_init,
755 .handle_irq = gic_handle_irq,
756 .init_machine = mop500_init_machine, 754 .init_machine = mop500_init_machine,
757 .init_late = ux500_init_late, 755 .init_late = ux500_init_late,
758MACHINE_END 756MACHINE_END
@@ -761,8 +759,7 @@ MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520")
761 .atag_offset = 0x100, 759 .atag_offset = 0x100,
762 .map_io = u8500_map_io, 760 .map_io = u8500_map_io,
763 .init_irq = ux500_init_irq, 761 .init_irq = ux500_init_irq,
764 .timer = &ux500_timer, 762 .init_time = ux500_timer_init,
765 .handle_irq = gic_handle_irq,
766 .init_machine = mop500_init_machine, 763 .init_machine = mop500_init_machine,
767 .init_late = ux500_init_late, 764 .init_late = ux500_init_late,
768MACHINE_END 765MACHINE_END
@@ -772,8 +769,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
772 .smp = smp_ops(ux500_smp_ops), 769 .smp = smp_ops(ux500_smp_ops),
773 .map_io = u8500_map_io, 770 .map_io = u8500_map_io,
774 .init_irq = ux500_init_irq, 771 .init_irq = ux500_init_irq,
775 .timer = &ux500_timer, 772 .init_time = ux500_timer_init,
776 .handle_irq = gic_handle_irq,
777 .init_machine = hrefv60_init_machine, 773 .init_machine = hrefv60_init_machine,
778 .init_late = ux500_init_late, 774 .init_late = ux500_init_late,
779MACHINE_END 775MACHINE_END
@@ -784,8 +780,7 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
784 .map_io = u8500_map_io, 780 .map_io = u8500_map_io,
785 .init_irq = ux500_init_irq, 781 .init_irq = ux500_init_irq,
786 /* we re-use nomadik timer here */ 782 /* we re-use nomadik timer here */
787 .timer = &ux500_timer, 783 .init_time = ux500_timer_init,
788 .handle_irq = gic_handle_irq,
789 .init_machine = snowball_init_machine, 784 .init_machine = snowball_init_machine,
790 .init_late = NULL, 785 .init_late = NULL,
791MACHINE_END 786MACHINE_END
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 5b286e06474c..218a6b1ada7e 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -27,7 +27,6 @@
27#include <asm/pmu.h> 27#include <asm/pmu.h>
28#include <asm/mach/map.h> 28#include <asm/mach/map.h>
29#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
30#include <asm/hardware/gic.h>
31 30
32#include <mach/hardware.h> 31#include <mach/hardware.h>
33#include <mach/setup.h> 32#include <mach/setup.h>
@@ -341,8 +340,7 @@ DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
341 .map_io = u8500_map_io, 340 .map_io = u8500_map_io,
342 .init_irq = ux500_init_irq, 341 .init_irq = ux500_init_irq,
343 /* we re-use nomadik timer here */ 342 /* we re-use nomadik timer here */
344 .timer = &ux500_timer, 343 .init_time = ux500_timer_init,
345 .handle_irq = gic_handle_irq,
346 .init_machine = u8500_init_machine, 344 .init_machine = u8500_init_machine,
347 .init_late = NULL, 345 .init_late = NULL,
348 .dt_compat = stericsson_dt_platform_compat, 346 .dt_compat = stericsson_dt_platform_compat,
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 721e7b4275f3..5dd90d31ffc3 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -17,9 +17,10 @@
17#include <linux/of.h> 17#include <linux/of.h>
18#include <linux/of_irq.h> 18#include <linux/of_irq.h>
19#include <linux/irq.h> 19#include <linux/irq.h>
20#include <linux/irqchip.h>
21#include <linux/irqchip/arm-gic.h>
20#include <linux/platform_data/clk-ux500.h> 22#include <linux/platform_data/clk-ux500.h>
21 23
22#include <asm/hardware/gic.h>
23#include <asm/mach/map.h> 24#include <asm/mach/map.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
@@ -42,11 +43,6 @@ void __iomem *_PRCMU_BASE;
42 * This feels fragile because it depends on the gpio device getting probed 43 * This feels fragile because it depends on the gpio device getting probed
43 * _before_ any device uses the gpio interrupts. 44 * _before_ any device uses the gpio interrupts.
44*/ 45*/
45static const struct of_device_id ux500_dt_irq_match[] = {
46 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
47 {},
48};
49
50void __init ux500_init_irq(void) 46void __init ux500_init_irq(void)
51{ 47{
52 void __iomem *dist_base; 48 void __iomem *dist_base;
@@ -62,7 +58,7 @@ void __init ux500_init_irq(void)
62 58
63#ifdef CONFIG_OF 59#ifdef CONFIG_OF
64 if (of_have_populated_dt()) 60 if (of_have_populated_dt())
65 of_irq_init(ux500_dt_irq_match); 61 irqchip_init();
66 else 62 else
67#endif 63#endif
68 gic_init(0, 29, dist_base, cpu_base); 64 gic_init(0, 29, dist_base, cpu_base);
diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h
index 6be4c4d2ab88..bddce2b49372 100644
--- a/arch/arm/mach-ux500/include/mach/setup.h
+++ b/arch/arm/mach-ux500/include/mach/setup.h
@@ -28,8 +28,7 @@ extern struct device *ux500_soc_device_init(const char *soc_id);
28struct amba_device; 28struct amba_device;
29extern void __init amba_add_devices(struct amba_device *devs[], int num); 29extern void __init amba_add_devices(struct amba_device *devs[], int num);
30 30
31struct sys_timer; 31extern void ux500_timer_init(void);
32extern struct sys_timer ux500_timer;
33 32
34#define __IO_DEV_DESC(x, sz) { \ 33#define __IO_DEV_DESC(x, sz) { \
35 .virtual = IO_ADDRESS(x), \ 34 .virtual = IO_ADDRESS(x), \
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 3db7782f3afb..b8adac93421f 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -16,9 +16,9 @@
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/irqchip/arm-gic.h>
19 20
20#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
21#include <asm/hardware/gic.h>
22#include <asm/smp_plat.h> 22#include <asm/smp_plat.h>
23#include <asm/smp_scu.h> 23#include <asm/smp_scu.h>
24#include <mach/hardware.h> 24#include <mach/hardware.h>
@@ -91,7 +91,7 @@ static int __cpuinit ux500_boot_secondary(unsigned int cpu, struct task_struct *
91 */ 91 */
92 write_pen_release(cpu_logical_map(cpu)); 92 write_pen_release(cpu_logical_map(cpu));
93 93
94 smp_send_reschedule(cpu); 94 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
95 95
96 timeout = jiffies + (1 * HZ); 96 timeout = jiffies + (1 * HZ);
97 while (time_before(jiffies, timeout)) { 97 while (time_before(jiffies, timeout)) {
@@ -155,8 +155,6 @@ static void __init ux500_smp_init_cpus(void)
155 155
156 for (i = 0; i < ncores; i++) 156 for (i = 0; i < ncores; i++)
157 set_cpu_possible(i, true); 157 set_cpu_possible(i, true);
158
159 set_smp_cross_call(gic_raise_softirq);
160} 158}
161 159
162static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) 160static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c
index 875309acb022..aa2a78acb59e 100644
--- a/arch/arm/mach-ux500/timer.c
+++ b/arch/arm/mach-ux500/timer.c
@@ -46,7 +46,7 @@ const static struct of_device_id prcmu_timer_of_match[] __initconst = {
46 { }, 46 { },
47}; 47};
48 48
49static void __init ux500_timer_init(void) 49void __init ux500_timer_init(void)
50{ 50{
51 void __iomem *mtu_timer_base; 51 void __iomem *mtu_timer_base;
52 void __iomem *prcmu_timer_base; 52 void __iomem *prcmu_timer_base;
@@ -99,14 +99,3 @@ dt_fail:
99 clksrc_dbx500_prcmu_init(prcmu_timer_base); 99 clksrc_dbx500_prcmu_init(prcmu_timer_base);
100 ux500_twd_init(); 100 ux500_twd_init();
101} 101}
102
103static void ux500_timer_reset(void)
104{
105 nmdk_clkevt_reset();
106 nmdk_clksrc_reset();
107}
108
109struct sys_timer ux500_timer = {
110 .init = ux500_timer_init,
111 .resume = ux500_timer_reset,
112};
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 5d5929450366..a42b89083eb2 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -32,6 +32,7 @@
32#include <linux/amba/mmci.h> 32#include <linux/amba/mmci.h>
33#include <linux/amba/pl022.h> 33#include <linux/amba/pl022.h>
34#include <linux/io.h> 34#include <linux/io.h>
35#include <linux/irqchip/arm-vic.h>
35#include <linux/irqchip/versatile-fpga.h> 36#include <linux/irqchip/versatile-fpga.h>
36#include <linux/gfp.h> 37#include <linux/gfp.h>
37#include <linux/clkdev.h> 38#include <linux/clkdev.h>
@@ -40,7 +41,6 @@
40#include <asm/irq.h> 41#include <asm/irq.h>
41#include <asm/hardware/arm_timer.h> 42#include <asm/hardware/arm_timer.h>
42#include <asm/hardware/icst.h> 43#include <asm/hardware/icst.h>
43#include <asm/hardware/vic.h>
44#include <asm/mach-types.h> 44#include <asm/mach-types.h>
45 45
46#include <asm/mach/arch.h> 46#include <asm/mach/arch.h>
@@ -770,7 +770,7 @@ void __init versatile_init(void)
770/* 770/*
771 * Set up timer interrupt, and return the current time in seconds. 771 * Set up timer interrupt, and return the current time in seconds.
772 */ 772 */
773static void __init versatile_timer_init(void) 773void __init versatile_timer_init(void)
774{ 774{
775 u32 val; 775 u32 val;
776 776
@@ -797,8 +797,3 @@ static void __init versatile_timer_init(void)
797 sp804_clocksource_init(TIMER3_VA_BASE, "timer3"); 797 sp804_clocksource_init(TIMER3_VA_BASE, "timer3");
798 sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1, "timer0"); 798 sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1, "timer0");
799} 799}
800
801struct sys_timer versatile_timer = {
802 .init = versatile_timer_init,
803};
804
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index 683e60776a85..5c1b87d1da6b 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -29,7 +29,7 @@ extern void __init versatile_init(void);
29extern void __init versatile_init_early(void); 29extern void __init versatile_init_early(void);
30extern void __init versatile_init_irq(void); 30extern void __init versatile_init_irq(void);
31extern void __init versatile_map_io(void); 31extern void __init versatile_map_io(void);
32extern struct sys_timer versatile_timer; 32extern void versatile_timer_init(void);
33extern void versatile_restart(char, const char *); 33extern void versatile_restart(char, const char *);
34extern unsigned int mmc_status(struct device *dev); 34extern unsigned int mmc_status(struct device *dev);
35#ifdef CONFIG_OF 35#ifdef CONFIG_OF
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index 98f65493177a..1caef1093793 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -26,7 +26,6 @@
26 26
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <asm/irq.h> 28#include <asm/irq.h>
29#include <asm/hardware/vic.h>
30#include <asm/mach-types.h> 29#include <asm/mach-types.h>
31 30
32#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
@@ -39,8 +38,7 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
39 .map_io = versatile_map_io, 38 .map_io = versatile_map_io,
40 .init_early = versatile_init_early, 39 .init_early = versatile_init_early,
41 .init_irq = versatile_init_irq, 40 .init_irq = versatile_init_irq,
42 .handle_irq = vic_handle_irq, 41 .init_time = versatile_timer_init,
43 .timer = &versatile_timer,
44 .init_machine = versatile_init, 42 .init_machine = versatile_init,
45 .restart = versatile_restart, 43 .restart = versatile_restart,
46MACHINE_END 44MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index ae5ad3c8f3dd..2558f2e957c3 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -24,7 +24,6 @@
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/of_irq.h> 25#include <linux/of_irq.h>
26#include <linux/of_platform.h> 26#include <linux/of_platform.h>
27#include <asm/hardware/vic.h>
28#include <asm/mach-types.h> 27#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
30 29
@@ -46,8 +45,7 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
46 .map_io = versatile_map_io, 45 .map_io = versatile_map_io,
47 .init_early = versatile_init_early, 46 .init_early = versatile_init_early,
48 .init_irq = versatile_init_irq, 47 .init_irq = versatile_init_irq,
49 .handle_irq = vic_handle_irq, 48 .init_time = versatile_timer_init,
50 .timer = &versatile_timer,
51 .init_machine = versatile_dt_init, 49 .init_machine = versatile_dt_init,
52 .dt_compat = versatile_dt_match, 50 .dt_compat = versatile_dt_match,
53 .restart = versatile_restart, 51 .restart = versatile_restart,
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 19738331bd3d..611d140c8695 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -27,7 +27,6 @@
27#include <linux/io.h> 27#include <linux/io.h>
28 28
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <asm/hardware/vic.h>
31#include <asm/irq.h> 30#include <asm/irq.h>
32#include <asm/mach-types.h> 31#include <asm/mach-types.h>
33 32
@@ -107,8 +106,7 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
107 .map_io = versatile_map_io, 106 .map_io = versatile_map_io,
108 .init_early = versatile_init_early, 107 .init_early = versatile_init_early,
109 .init_irq = versatile_init_irq, 108 .init_irq = versatile_init_irq,
110 .handle_irq = vic_handle_irq, 109 .init_time = versatile_timer_init,
111 .timer = &versatile_timer,
112 .init_machine = versatile_pb_init, 110 .init_machine = versatile_pb_init,
113 .restart = versatile_restart, 111 .restart = versatile_restart,
114MACHINE_END 112MACHINE_END
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 60838ddb8564..6f34497a4245 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -10,10 +10,10 @@
10#include <linux/amba/clcd.h> 10#include <linux/amba/clcd.h>
11#include <linux/clkdev.h> 11#include <linux/clkdev.h>
12#include <linux/vexpress.h> 12#include <linux/vexpress.h>
13#include <linux/irqchip/arm-gic.h>
13 14
14#include <asm/hardware/arm_timer.h> 15#include <asm/hardware/arm_timer.h>
15#include <asm/hardware/cache-l2x0.h> 16#include <asm/hardware/cache-l2x0.h>
16#include <asm/hardware/gic.h>
17#include <asm/smp_scu.h> 17#include <asm/smp_scu.h>
18#include <asm/smp_twd.h> 18#include <asm/smp_twd.h>
19 19
@@ -182,8 +182,6 @@ static void __init ct_ca9x4_init_cpu_map(void)
182 182
183 for (i = 0; i < ncores; ++i) 183 for (i = 0; i < ncores; ++i)
184 set_cpu_possible(i, true); 184 set_cpu_possible(i, true);
185
186 set_smp_cross_call(gic_raise_softirq);
187} 185}
188 186
189static void __init ct_ca9x4_smp_enable(unsigned int max_cpus) 187static void __init ct_ca9x4_smp_enable(unsigned int max_cpus)
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index c5d70de9bb4e..dc1ace55d557 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -16,7 +16,6 @@
16#include <linux/vexpress.h> 16#include <linux/vexpress.h>
17 17
18#include <asm/smp_scu.h> 18#include <asm/smp_scu.h>
19#include <asm/hardware/gic.h>
20#include <asm/mach/map.h> 19#include <asm/mach/map.h>
21 20
22#include <mach/motherboard.h> 21#include <mach/motherboard.h>
@@ -128,8 +127,6 @@ static void __init vexpress_dt_smp_init_cpus(void)
128 127
129 for (i = 0; i < ncores; ++i) 128 for (i = 0; i < ncores; ++i)
130 set_cpu_possible(i, true); 129 set_cpu_possible(i, true);
131
132 set_smp_cross_call(gic_raise_softirq);
133} 130}
134 131
135static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus) 132static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 011661a6c5cb..915683cb67d6 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -7,6 +7,7 @@
7#include <linux/io.h> 7#include <linux/io.h>
8#include <linux/smp.h> 8#include <linux/smp.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/irqchip.h>
10#include <linux/of_address.h> 11#include <linux/of_address.h>
11#include <linux/of_fdt.h> 12#include <linux/of_fdt.h>
12#include <linux/of_irq.h> 13#include <linux/of_irq.h>
@@ -30,7 +31,6 @@
30#include <asm/mach/time.h> 31#include <asm/mach/time.h>
31#include <asm/hardware/arm_timer.h> 32#include <asm/hardware/arm_timer.h>
32#include <asm/hardware/cache-l2x0.h> 33#include <asm/hardware/cache-l2x0.h>
33#include <asm/hardware/gic.h>
34#include <asm/hardware/timer-sp.h> 34#include <asm/hardware/timer-sp.h>
35 35
36#include <mach/ct-ca9x4.h> 36#include <mach/ct-ca9x4.h>
@@ -291,10 +291,6 @@ static void __init v2m_timer_init(void)
291 v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0); 291 v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0);
292} 292}
293 293
294static struct sys_timer v2m_timer = {
295 .init = v2m_timer_init,
296};
297
298static void __init v2m_init_early(void) 294static void __init v2m_init_early(void)
299{ 295{
300 if (ct_desc->init_early) 296 if (ct_desc->init_early)
@@ -376,8 +372,7 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
376 .map_io = v2m_map_io, 372 .map_io = v2m_map_io,
377 .init_early = v2m_init_early, 373 .init_early = v2m_init_early,
378 .init_irq = v2m_init_irq, 374 .init_irq = v2m_init_irq,
379 .timer = &v2m_timer, 375 .init_time = v2m_timer_init,
380 .handle_irq = gic_handle_irq,
381 .init_machine = v2m_init, 376 .init_machine = v2m_init,
382 .restart = vexpress_restart, 377 .restart = vexpress_restart,
383MACHINE_END 378MACHINE_END
@@ -434,16 +429,6 @@ void __init v2m_dt_init_early(void)
434 } 429 }
435} 430}
436 431
437static struct of_device_id vexpress_irq_match[] __initdata = {
438 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
439 {}
440};
441
442static void __init v2m_dt_init_irq(void)
443{
444 of_irq_init(vexpress_irq_match);
445}
446
447static void __init v2m_dt_timer_init(void) 432static void __init v2m_dt_timer_init(void)
448{ 433{
449 struct device_node *node = NULL; 434 struct device_node *node = NULL;
@@ -468,10 +453,6 @@ static void __init v2m_dt_timer_init(void)
468 24000000); 453 24000000);
469} 454}
470 455
471static struct sys_timer v2m_dt_timer = {
472 .init = v2m_dt_timer_init,
473};
474
475static const struct of_device_id v2m_dt_bus_match[] __initconst = { 456static const struct of_device_id v2m_dt_bus_match[] __initconst = {
476 { .compatible = "simple-bus", }, 457 { .compatible = "simple-bus", },
477 { .compatible = "arm,amba-bus", }, 458 { .compatible = "arm,amba-bus", },
@@ -497,9 +478,8 @@ DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
497 .smp = smp_ops(vexpress_smp_ops), 478 .smp = smp_ops(vexpress_smp_ops),
498 .map_io = v2m_dt_map_io, 479 .map_io = v2m_dt_map_io,
499 .init_early = v2m_dt_init_early, 480 .init_early = v2m_dt_init_early,
500 .init_irq = v2m_dt_init_irq, 481 .init_irq = irqchip_init,
501 .timer = &v2m_dt_timer, 482 .init_time = v2m_dt_timer_init,
502 .init_machine = v2m_dt_init, 483 .init_machine = v2m_dt_init,
503 .handle_irq = gic_handle_irq,
504 .restart = vexpress_restart, 484 .restart = vexpress_restart,
505MACHINE_END 485MACHINE_END
diff --git a/arch/arm/mach-vt8500/Kconfig b/arch/arm/mach-vt8500/Kconfig
index 2ed0b7d95db6..c0b1c604ccf8 100644
--- a/arch/arm/mach-vt8500/Kconfig
+++ b/arch/arm/mach-vt8500/Kconfig
@@ -1,12 +1,34 @@
1config ARCH_VT8500 1config ARCH_VT8500
2 bool "VIA/WonderMedia 85xx" if ARCH_MULTI_V5 2 bool
3 default ARCH_VT8500_SINGLE
4 select ARCH_HAS_CPUFREQ 3 select ARCH_HAS_CPUFREQ
5 select ARCH_REQUIRE_GPIOLIB 4 select ARCH_REQUIRE_GPIOLIB
6 select CLKDEV_LOOKUP 5 select CLKDEV_LOOKUP
7 select CPU_ARM926T
8 select GENERIC_CLOCKEVENTS 6 select GENERIC_CLOCKEVENTS
9 select GENERIC_GPIO 7 select GENERIC_GPIO
10 select HAVE_CLK 8 select HAVE_CLK
9 select VT8500_TIMER
11 help 10 help
12 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. 11 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
12
13config ARCH_WM8505
14 bool "VIA/Wondermedia 85xx and WM8650"
15 depends on ARCH_MULTI_V5
16 select ARCH_VT8500
17 select CPU_ARM926T
18 help
19
20config ARCH_WM8750
21 bool "WonderMedia WM8750"
22 depends on ARCH_MULTI_V6
23 select ARCH_VT8500
24 select CPU_V6
25 help
26 Support for WonderMedia WM8750 System-on-Chip.
27
28config ARCH_WM8850
29 bool "WonderMedia WM8850"
30 depends on ARCH_MULTI_V7
31 select ARCH_VT8500
32 select CPU_V7
33 help
34 Support for WonderMedia WM8850 System-on-Chip.
diff --git a/arch/arm/mach-vt8500/Makefile b/arch/arm/mach-vt8500/Makefile
index e035251cda48..92ceb2436b60 100644
--- a/arch/arm/mach-vt8500/Makefile
+++ b/arch/arm/mach-vt8500/Makefile
@@ -1 +1 @@
obj-$(CONFIG_ARCH_VT8500) += irq.o timer.o vt8500.o obj-$(CONFIG_ARCH_VT8500) += irq.o vt8500.o
diff --git a/arch/arm/mach-vt8500/common.h b/arch/arm/mach-vt8500/common.h
index 6f2b843115db..77611a6968d6 100644
--- a/arch/arm/mach-vt8500/common.h
+++ b/arch/arm/mach-vt8500/common.h
@@ -18,7 +18,6 @@
18 18
19#include <linux/of.h> 19#include <linux/of.h>
20 20
21void __init vt8500_timer_init(void);
22int __init vt8500_irq_init(struct device_node *node, 21int __init vt8500_irq_init(struct device_node *node,
23 struct device_node *parent); 22 struct device_node *parent);
24 23
diff --git a/arch/arm/mach-vt8500/include/mach/uncompress.h b/arch/arm/mach-vt8500/include/mach/uncompress.h
deleted file mode 100644
index e6e81fdaf109..000000000000
--- a/arch/arm/mach-vt8500/include/mach/uncompress.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/* arch/arm/mach-vt8500/include/mach/uncompress.h
2 *
3 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
4 *
5 * Based on arch/arm/mach-dove/include/mach/uncompress.h
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#define UART0_PHYS 0xd8200000
19#define UART0_ADDR(x) *(volatile unsigned char *)(UART0_PHYS + x)
20
21static void putc(const char c)
22{
23 while (UART0_ADDR(0x1c) & 0x2)
24 /* Tx busy, wait and poll */;
25
26 UART0_ADDR(0) = c;
27}
28
29static void flush(void)
30{
31}
32
33/*
34 * nothing to do
35 */
36#define arch_decomp_setup()
37#define arch_decomp_wdog()
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index 3c66d48ea082..6141868b9a3c 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -20,6 +20,7 @@
20 20
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/pm.h> 22#include <linux/pm.h>
23#include <linux/vt8500_timer.h>
23 24
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
@@ -175,21 +176,19 @@ static void __init vt8500_init_irq(void)
175 of_irq_init(vt8500_irq_match); 176 of_irq_init(vt8500_irq_match);
176}; 177};
177 178
178static struct sys_timer vt8500_timer = {
179 .init = vt8500_timer_init,
180};
181
182static const char * const vt8500_dt_compat[] = { 179static const char * const vt8500_dt_compat[] = {
183 "via,vt8500", 180 "via,vt8500",
184 "wm,wm8650", 181 "wm,wm8650",
185 "wm,wm8505", 182 "wm,wm8505",
183 "wm,wm8750",
184 "wm,wm8850",
186}; 185};
187 186
188DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)") 187DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
189 .dt_compat = vt8500_dt_compat, 188 .dt_compat = vt8500_dt_compat,
190 .map_io = vt8500_map_io, 189 .map_io = vt8500_map_io,
191 .init_irq = vt8500_init_irq, 190 .init_irq = vt8500_init_irq,
192 .timer = &vt8500_timer, 191 .init_time = vt8500_timer_init,
193 .init_machine = vt8500_init, 192 .init_machine = vt8500_init,
194 .restart = vt8500_restart, 193 .restart = vt8500_restart,
195 .handle_irq = vt8500_handle_irq, 194 .handle_irq = vt8500_handle_irq,
diff --git a/arch/arm/mach-w90x900/mach-nuc910evb.c b/arch/arm/mach-w90x900/mach-nuc910evb.c
index b4243e4f1565..92f1c978f35e 100644
--- a/arch/arm/mach-w90x900/mach-nuc910evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc910evb.c
@@ -37,6 +37,6 @@ MACHINE_START(W90P910EVB, "W90P910EVB")
37 .map_io = nuc910evb_map_io, 37 .map_io = nuc910evb_map_io,
38 .init_irq = nuc900_init_irq, 38 .init_irq = nuc900_init_irq,
39 .init_machine = nuc910evb_init, 39 .init_machine = nuc910evb_init,
40 .timer = &nuc900_timer, 40 .init_time = nuc900_timer_init,
41 .restart = nuc9xx_restart, 41 .restart = nuc9xx_restart,
42MACHINE_END 42MACHINE_END
diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c
index 500fe5932ce9..26f7189056e3 100644
--- a/arch/arm/mach-w90x900/mach-nuc950evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc950evb.c
@@ -40,6 +40,6 @@ MACHINE_START(W90P950EVB, "W90P950EVB")
40 .map_io = nuc950evb_map_io, 40 .map_io = nuc950evb_map_io,
41 .init_irq = nuc900_init_irq, 41 .init_irq = nuc900_init_irq,
42 .init_machine = nuc950evb_init, 42 .init_machine = nuc950evb_init,
43 .timer = &nuc900_timer, 43 .init_time = nuc900_timer_init,
44 .restart = nuc9xx_restart, 44 .restart = nuc9xx_restart,
45MACHINE_END 45MACHINE_END
diff --git a/arch/arm/mach-w90x900/mach-nuc960evb.c b/arch/arm/mach-w90x900/mach-nuc960evb.c
index cbb3adc3db10..9b4e73fe10e5 100644
--- a/arch/arm/mach-w90x900/mach-nuc960evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc960evb.c
@@ -37,6 +37,6 @@ MACHINE_START(W90N960EVB, "W90N960EVB")
37 .map_io = nuc960evb_map_io, 37 .map_io = nuc960evb_map_io,
38 .init_irq = nuc900_init_irq, 38 .init_irq = nuc900_init_irq,
39 .init_machine = nuc960evb_init, 39 .init_machine = nuc960evb_init,
40 .timer = &nuc900_timer, 40 .init_time = nuc900_timer_init,
41 .restart = nuc9xx_restart, 41 .restart = nuc9xx_restart,
42MACHINE_END 42MACHINE_END
diff --git a/arch/arm/mach-w90x900/nuc9xx.h b/arch/arm/mach-w90x900/nuc9xx.h
index 91acb4047793..88ef4b267089 100644
--- a/arch/arm/mach-w90x900/nuc9xx.h
+++ b/arch/arm/mach-w90x900/nuc9xx.h
@@ -15,10 +15,9 @@
15 * 15 *
16 */ 16 */
17struct map_desc; 17struct map_desc;
18struct sys_timer;
19 18
20/* core initialisation functions */ 19/* core initialisation functions */
21 20
22extern void nuc900_init_irq(void); 21extern void nuc900_init_irq(void);
23extern struct sys_timer nuc900_timer; 22extern void nuc900_timer_init(void);
24extern void nuc9xx_restart(char, const char *); 23extern void nuc9xx_restart(char, const char *);
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
index fa27c498ac09..30fbca844575 100644
--- a/arch/arm/mach-w90x900/time.c
+++ b/arch/arm/mach-w90x900/time.c
@@ -91,7 +91,6 @@ static int nuc900_clockevent_setnextevent(unsigned long evt,
91 91
92static struct clock_event_device nuc900_clockevent_device = { 92static struct clock_event_device nuc900_clockevent_device = {
93 .name = "nuc900-timer0", 93 .name = "nuc900-timer0",
94 .shift = 32,
95 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 94 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
96 .set_mode = nuc900_clockevent_setmode, 95 .set_mode = nuc900_clockevent_setmode,
97 .set_next_event = nuc900_clockevent_setnextevent, 96 .set_next_event = nuc900_clockevent_setnextevent,
@@ -133,15 +132,10 @@ static void __init nuc900_clockevents_init(void)
133 __raw_writel(RESETINT, REG_TISR); 132 __raw_writel(RESETINT, REG_TISR);
134 setup_irq(IRQ_TIMER0, &nuc900_timer0_irq); 133 setup_irq(IRQ_TIMER0, &nuc900_timer0_irq);
135 134
136 nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC,
137 nuc900_clockevent_device.shift);
138 nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff,
139 &nuc900_clockevent_device);
140 nuc900_clockevent_device.min_delta_ns = clockevent_delta2ns(0xf,
141 &nuc900_clockevent_device);
142 nuc900_clockevent_device.cpumask = cpumask_of(0); 135 nuc900_clockevent_device.cpumask = cpumask_of(0);
143 136
144 clockevents_register_device(&nuc900_clockevent_device); 137 clockevents_config_and_register(&nuc900_clockevent_device, rate,
138 0xf, 0xffffffff);
145} 139}
146 140
147static void __init nuc900_clocksource_init(void) 141static void __init nuc900_clocksource_init(void)
@@ -167,12 +161,8 @@ static void __init nuc900_clocksource_init(void)
167 TDR_SHIFT, clocksource_mmio_readl_down); 161 TDR_SHIFT, clocksource_mmio_readl_down);
168} 162}
169 163
170static void __init nuc900_timer_init(void) 164void __init nuc900_timer_init(void)
171{ 165{
172 nuc900_clocksource_init(); 166 nuc900_clocksource_init();
173 nuc900_clockevents_init(); 167 nuc900_clockevents_init();
174} 168}
175
176struct sys_timer nuc900_timer = {
177 .init = nuc900_timer_init,
178};
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index e16d4bed0f7a..6472a69cbfe1 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -31,7 +31,6 @@
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/page.h> 32#include <asm/page.h>
33#include <asm/pgtable.h> 33#include <asm/pgtable.h>
34#include <asm/hardware/gic.h>
35#include <asm/hardware/cache-l2x0.h> 34#include <asm/hardware/cache-l2x0.h>
36 35
37#include "common.h" 36#include "common.h"
@@ -55,19 +54,6 @@ static void __init xilinx_init_machine(void)
55 of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); 54 of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
56} 55}
57 56
58static struct of_device_id irq_match[] __initdata = {
59 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
60 { }
61};
62
63/**
64 * xilinx_irq_init() - Interrupt controller initialization for the GIC.
65 */
66static void __init xilinx_irq_init(void)
67{
68 of_irq_init(irq_match);
69}
70
71#define SCU_PERIPH_PHYS 0xF8F00000 57#define SCU_PERIPH_PHYS 0xF8F00000
72#define SCU_PERIPH_SIZE SZ_8K 58#define SCU_PERIPH_SIZE SZ_8K
73#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) 59#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE)
@@ -93,13 +79,6 @@ static void __init xilinx_zynq_timer_init(void)
93 xttcpss_timer_init(); 79 xttcpss_timer_init();
94} 80}
95 81
96/*
97 * Instantiate and initialize the system timer structure
98 */
99static struct sys_timer xttcpss_sys_timer = {
100 .init = xilinx_zynq_timer_init,
101};
102
103/** 82/**
104 * xilinx_map_io() - Create memory mappings needed for early I/O. 83 * xilinx_map_io() - Create memory mappings needed for early I/O.
105 */ 84 */
@@ -117,9 +96,8 @@ static const char *xilinx_dt_match[] = {
117 96
118MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 97MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
119 .map_io = xilinx_map_io, 98 .map_io = xilinx_map_io,
120 .init_irq = xilinx_irq_init, 99 .init_irq = irqchip_init,
121 .handle_irq = gic_handle_irq,
122 .init_machine = xilinx_init_machine, 100 .init_machine = xilinx_init_machine,
123 .timer = &xttcpss_sys_timer, 101 .init_time = xilinx_zynq_timer_init,
124 .dt_compat = xilinx_dt_match, 102 .dt_compat = xilinx_dt_match,
125MACHINE_END 103MACHINE_END
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index cbfbbe461788..837a2d52e9db 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -156,14 +156,9 @@ void __init iop_init_time(unsigned long tick_rate)
156 write_tmr0(timer_ctl & ~IOP_TMR_EN); 156 write_tmr0(timer_ctl & ~IOP_TMR_EN);
157 write_tisr(1); 157 write_tisr(1);
158 setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); 158 setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq);
159 clockevents_calc_mult_shift(&iop_clockevent,
160 tick_rate, IOP_MIN_RANGE);
161 iop_clockevent.max_delta_ns =
162 clockevent_delta2ns(0xfffffffe, &iop_clockevent);
163 iop_clockevent.min_delta_ns =
164 clockevent_delta2ns(0xf, &iop_clockevent);
165 iop_clockevent.cpumask = cpumask_of(0); 159 iop_clockevent.cpumask = cpumask_of(0);
166 clockevents_register_device(&iop_clockevent); 160 clockevents_config_and_register(&iop_clockevent, tick_rate,
161 0xf, 0xfffffffe);
167 162
168 /* 163 /*
169 * Set up free-running clocksource timer 1. 164 * Set up free-running clocksource timer 1.
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 0f4fa863dd55..5d5ac0f05422 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -156,7 +156,6 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
156static struct clock_event_device orion_clkevt = { 156static struct clock_event_device orion_clkevt = {
157 .name = "orion_tick", 157 .name = "orion_tick",
158 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, 158 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
159 .shift = 32,
160 .rating = 300, 159 .rating = 300,
161 .set_next_event = orion_clkevt_next_event, 160 .set_next_event = orion_clkevt_next_event,
162 .set_mode = orion_clkevt_mode, 161 .set_mode = orion_clkevt_mode,
@@ -221,9 +220,6 @@ orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask,
221 * Setup clockevent timer (interrupt-driven). 220 * Setup clockevent timer (interrupt-driven).
222 */ 221 */
223 setup_irq(irq, &orion_timer_irq); 222 setup_irq(irq, &orion_timer_irq);
224 orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
225 orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt);
226 orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt);
227 orion_clkevt.cpumask = cpumask_of(0); 223 orion_clkevt.cpumask = cpumask_of(0);
228 clockevents_register_device(&orion_clkevt); 224 clockevents_config_and_register(&orion_clkevt, tclk, 1, 0xfffffffe);
229} 225}
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index b69e11dc679d..37703ef6dfc7 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -194,8 +194,7 @@ extern void s3c24xx_init_uartdevs(char *name,
194 194
195/* timer for 2410/2440 */ 195/* timer for 2410/2440 */
196 196
197struct sys_timer; 197extern void s3c24xx_timer_init(void);
198extern struct sys_timer s3c24xx_timer;
199 198
200extern struct syscore_ops s3c2410_pm_syscore_ops; 199extern struct syscore_ops s3c2410_pm_syscore_ops;
201extern struct syscore_ops s3c2412_pm_syscore_ops; 200extern struct syscore_ops s3c2412_pm_syscore_ops;
diff --git a/arch/arm/plat-samsung/include/plat/s5p-time.h b/arch/arm/plat-samsung/include/plat/s5p-time.h
index 3a70aebc9205..9c96f3586ce0 100644
--- a/arch/arm/plat-samsung/include/plat/s5p-time.h
+++ b/arch/arm/plat-samsung/include/plat/s5p-time.h
@@ -36,5 +36,5 @@ struct s5p_timer_source {
36 36
37extern void __init s5p_set_timer_source(enum s5p_timer_mode event, 37extern void __init s5p_set_timer_source(enum s5p_timer_mode event,
38 enum s5p_timer_mode source); 38 enum s5p_timer_mode source);
39extern struct sys_timer s5p_timer; 39extern void s5p_timer_init(void);
40#endif /* __ASM_PLAT_S5P_TIME_H */ 40#endif /* __ASM_PLAT_S5P_TIME_H */
diff --git a/arch/arm/plat-samsung/s5p-irq-eint.c b/arch/arm/plat-samsung/s5p-irq-eint.c
index 33bd3f3d20f5..faa651602780 100644
--- a/arch/arm/plat-samsung/s5p-irq-eint.c
+++ b/arch/arm/plat-samsung/s5p-irq-eint.c
@@ -15,8 +15,7 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18 18#include <linux/irqchip/arm-vic.h>
19#include <asm/hardware/vic.h>
20 19
21#include <plat/regs-irqtype.h> 20#include <plat/regs-irqtype.h>
22 21
diff --git a/arch/arm/plat-samsung/s5p-irq.c b/arch/arm/plat-samsung/s5p-irq.c
index dfb47d638f03..103e371f5e35 100644
--- a/arch/arm/plat-samsung/s5p-irq.c
+++ b/arch/arm/plat-samsung/s5p-irq.c
@@ -13,8 +13,7 @@
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/io.h> 15#include <linux/io.h>
16 16#include <linux/irqchip/arm-vic.h>
17#include <asm/hardware/vic.h>
18 17
19#include <mach/map.h> 18#include <mach/map.h>
20#include <plat/regs-timer.h> 19#include <plat/regs-timer.h>
diff --git a/arch/arm/plat-samsung/s5p-time.c b/arch/arm/plat-samsung/s5p-time.c
index 028b6e877eb9..e92510cf82ee 100644
--- a/arch/arm/plat-samsung/s5p-time.c
+++ b/arch/arm/plat-samsung/s5p-time.c
@@ -274,15 +274,8 @@ static void __init s5p_clockevent_init(void)
274 clock_rate = clk_get_rate(tin_event); 274 clock_rate = clk_get_rate(tin_event);
275 clock_count_per_tick = clock_rate / HZ; 275 clock_count_per_tick = clock_rate / HZ;
276 276
277 clockevents_calc_mult_shift(&time_event_device,
278 clock_rate, S5PTIMER_MIN_RANGE);
279 time_event_device.max_delta_ns =
280 clockevent_delta2ns(-1, &time_event_device);
281 time_event_device.min_delta_ns =
282 clockevent_delta2ns(1, &time_event_device);
283
284 time_event_device.cpumask = cpumask_of(0); 277 time_event_device.cpumask = cpumask_of(0);
285 clockevents_register_device(&time_event_device); 278 clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
286 279
287 irq_number = timer_source.event_id + IRQ_TIMER0; 280 irq_number = timer_source.event_id + IRQ_TIMER0;
288 setup_irq(irq_number, &s5p_clock_event_irq); 281 setup_irq(irq_number, &s5p_clock_event_irq);
@@ -393,13 +386,9 @@ static void __init s5p_timer_resources(void)
393 clk_enable(tin_source); 386 clk_enable(tin_source);
394} 387}
395 388
396static void __init s5p_timer_init(void) 389void __init s5p_timer_init(void)
397{ 390{
398 s5p_timer_resources(); 391 s5p_timer_resources();
399 s5p_clockevent_init(); 392 s5p_clockevent_init();
400 s5p_clocksource_init(); 393 s5p_clocksource_init();
401} 394}
402
403struct sys_timer s5p_timer = {
404 .init = s5p_timer_init,
405};
diff --git a/arch/arm/plat-samsung/time.c b/arch/arm/plat-samsung/time.c
index 60552e22f22e..73defd00c3e4 100644
--- a/arch/arm/plat-samsung/time.c
+++ b/arch/arm/plat-samsung/time.c
@@ -27,6 +27,7 @@
27#include <linux/clk.h> 27#include <linux/clk.h>
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/platform_device.h> 29#include <linux/platform_device.h>
30#include <linux/syscore_ops.h>
30 31
31#include <asm/mach-types.h> 32#include <asm/mach-types.h>
32 33
@@ -95,7 +96,7 @@ static inline unsigned long timer_ticks_to_usec(unsigned long ticks)
95 * IRQs are disabled before entering here from do_gettimeofday() 96 * IRQs are disabled before entering here from do_gettimeofday()
96 */ 97 */
97 98
98static unsigned long s3c2410_gettimeoffset (void) 99static u32 s3c2410_gettimeoffset(void)
99{ 100{
100 unsigned long tdone; 101 unsigned long tdone;
101 unsigned long tval; 102 unsigned long tval;
@@ -120,7 +121,7 @@ static unsigned long s3c2410_gettimeoffset (void)
120 tdone += timer_startval; 121 tdone += timer_startval;
121 } 122 }
122 123
123 return timer_ticks_to_usec(tdone); 124 return timer_ticks_to_usec(tdone) * 1000;
124} 125}
125 126
126 127
@@ -271,15 +272,16 @@ static void __init s3c2410_timer_resources(void)
271 clk_enable(tin); 272 clk_enable(tin);
272} 273}
273 274
274static void __init s3c2410_timer_init(void) 275static struct syscore_ops s3c24xx_syscore_ops = {
276 .resume = s3c2410_timer_setup,
277};
278
279void __init s3c24xx_timer_init(void)
275{ 280{
281 arch_gettimeoffset = s3c2410_gettimeoffset;
282
276 s3c2410_timer_resources(); 283 s3c2410_timer_resources();
277 s3c2410_timer_setup(); 284 s3c2410_timer_setup();
278 setup_irq(IRQ_TIMER4, &s3c2410_timer_irq); 285 setup_irq(IRQ_TIMER4, &s3c2410_timer_irq);
286 register_syscore_ops(&s3c24xx_syscore_ops);
279} 287}
280
281struct sys_timer s3c24xx_timer = {
282 .init = s3c2410_timer_init,
283 .offset = s3c2410_gettimeoffset,
284 .resume = s3c2410_timer_setup
285};
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index 03321af5de9f..bd5c53cd6962 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -186,15 +186,9 @@ static void __init spear_clockevent_init(int irq)
186 tick_rate = clk_get_rate(gpt_clk); 186 tick_rate = clk_get_rate(gpt_clk);
187 tick_rate >>= CTRL_PRESCALER16; 187 tick_rate >>= CTRL_PRESCALER16;
188 188
189 clockevents_calc_mult_shift(&clkevt, tick_rate, SPEAR_MIN_RANGE);
190
191 clkevt.max_delta_ns = clockevent_delta2ns(0xfff0,
192 &clkevt);
193 clkevt.min_delta_ns = clockevent_delta2ns(3, &clkevt);
194
195 clkevt.cpumask = cpumask_of(0); 189 clkevt.cpumask = cpumask_of(0);
196 190
197 clockevents_register_device(&clkevt); 191 clockevents_config_and_register(&clkevt, tick_rate, 3, 0xfff0);
198 192
199 setup_irq(irq, &spear_timer_irq); 193 setup_irq(irq, &spear_timer_irq);
200} 194}
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index 04ca4937d8ca..f2ac15561778 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -14,10 +14,10 @@
14#include <linux/device.h> 14#include <linux/device.h>
15#include <linux/jiffies.h> 15#include <linux/jiffies.h>
16#include <linux/smp.h> 16#include <linux/smp.h>
17#include <linux/irqchip/arm-gic.h>
17 18
18#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
19#include <asm/smp_plat.h> 20#include <asm/smp_plat.h>
20#include <asm/hardware/gic.h>
21 21
22/* 22/*
23 * Write pen_release in a way that is guaranteed to be visible to all 23 * Write pen_release in a way that is guaranteed to be visible to all
@@ -79,7 +79,7 @@ int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idl
79 * the boot monitor to read the system wide flags register, 79 * the boot monitor to read the system wide flags register,
80 * and branch to the address found there. 80 * and branch to the address found there.
81 */ 81 */
82 gic_raise_softirq(cpumask_of(cpu), 0); 82 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
83 83
84 timeout = jiffies + (1 * HZ); 84 timeout = jiffies + (1 * HZ);
85 while (time_before(jiffies, timeout)) { 85 while (time_before(jiffies, timeout)) {
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index 2310b249675f..3126b920a4a5 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -85,7 +85,7 @@ time_sched_init(irqreturn_t(*timer_routine) (int, void *))
85/* 85/*
86 * Should return useconds since last timer tick 86 * Should return useconds since last timer tick
87 */ 87 */
88u32 arch_gettimeoffset(void) 88static u32 blackfin_gettimeoffset(void)
89{ 89{
90 unsigned long offset; 90 unsigned long offset;
91 unsigned long clocks_per_jiffy; 91 unsigned long clocks_per_jiffy;
@@ -141,6 +141,10 @@ void read_persistent_clock(struct timespec *ts)
141 141
142void __init time_init(void) 142void __init time_init(void)
143{ 143{
144#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
145 arch_gettimeoffset = blackfin_gettimeoffset;
146#endif
147
144#ifdef CONFIG_RTC_DRV_BFIN 148#ifdef CONFIG_RTC_DRV_BFIN
145 /* [#2663] hack to filter junk RTC values that would cause 149 /* [#2663] hack to filter junk RTC values that would cause
146 * userspace to have to deal with time values greater than 150 * userspace to have to deal with time values greater than
diff --git a/arch/cris/arch-v10/kernel/time.c b/arch/cris/arch-v10/kernel/time.c
index bcffcb6a9415..fce7c541d70d 100644
--- a/arch/cris/arch-v10/kernel/time.c
+++ b/arch/cris/arch-v10/kernel/time.c
@@ -55,9 +55,9 @@ unsigned long get_ns_in_jiffie(void)
55 return ns; 55 return ns;
56} 56}
57 57
58unsigned long do_slow_gettimeoffset(void) 58static u32 cris_v10_gettimeoffset(void)
59{ 59{
60 unsigned long count; 60 u32 count;
61 61
62 /* The timer interrupt comes from Etrax timer 0. In order to get 62 /* The timer interrupt comes from Etrax timer 0. In order to get
63 * better precision, we check the current value. It might have 63 * better precision, we check the current value. It might have
@@ -65,8 +65,8 @@ unsigned long do_slow_gettimeoffset(void)
65 */ 65 */
66 count = *R_TIMER0_DATA; 66 count = *R_TIMER0_DATA;
67 67
68 /* Convert timer value to usec */ 68 /* Convert timer value to nsec */
69 return (TIMER0_DIV - count) * ((NSEC_PER_SEC/1000)/HZ)/TIMER0_DIV; 69 return (TIMER0_DIV - count) * (NSEC_PER_SEC/HZ)/TIMER0_DIV;
70} 70}
71 71
72/* Excerpt from the Etrax100 HSDD about the built-in watchdog: 72/* Excerpt from the Etrax100 HSDD about the built-in watchdog:
@@ -191,6 +191,8 @@ static struct irqaction irq2 = {
191void __init 191void __init
192time_init(void) 192time_init(void)
193{ 193{
194 arch_gettimeoffset = cris_v10_gettimeoffset;
195
194 /* probe for the RTC and read it if it exists 196 /* probe for the RTC and read it if it exists
195 * Before the RTC can be probed the loops_per_usec variable needs 197 * Before the RTC can be probed the loops_per_usec variable needs
196 * to be initialized to make usleep work. A better value for 198 * to be initialized to make usleep work. A better value for
diff --git a/arch/cris/kernel/time.c b/arch/cris/kernel/time.c
index 277ffc459e4b..fe6acdabbc8d 100644
--- a/arch/cris/kernel/time.c
+++ b/arch/cris/kernel/time.c
@@ -39,17 +39,6 @@
39extern unsigned long loops_per_jiffy; /* init/main.c */ 39extern unsigned long loops_per_jiffy; /* init/main.c */
40unsigned long loops_per_usec; 40unsigned long loops_per_usec;
41 41
42
43#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
44extern unsigned long do_slow_gettimeoffset(void);
45static unsigned long (*do_gettimeoffset)(void) = do_slow_gettimeoffset;
46
47u32 arch_gettimeoffset(void)
48{
49 return do_gettimeoffset() * 1000;
50}
51#endif
52
53int set_rtc_mmss(unsigned long nowtime) 42int set_rtc_mmss(unsigned long nowtime)
54{ 43{
55 D(printk(KERN_DEBUG "set_rtc_mmss(%lu)\n", nowtime)); 44 D(printk(KERN_DEBUG "set_rtc_mmss(%lu)\n", nowtime));
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c
index 84dd04048db9..1a15f81ea1bd 100644
--- a/arch/m32r/kernel/time.c
+++ b/arch/m32r/kernel/time.c
@@ -57,7 +57,7 @@ extern void smp_local_timer_interrupt(void);
57 57
58static unsigned long latch; 58static unsigned long latch;
59 59
60u32 arch_gettimeoffset(void) 60static u32 m32r_gettimeoffset(void)
61{ 61{
62 unsigned long elapsed_time = 0; /* [us] */ 62 unsigned long elapsed_time = 0; /* [us] */
63 63
@@ -165,6 +165,8 @@ void read_persistent_clock(struct timespec *ts)
165 165
166void __init time_init(void) 166void __init time_init(void)
167{ 167{
168 arch_gettimeoffset = m32r_gettimeoffset;
169
168#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ 170#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
169 || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ 171 || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
170 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) 172 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c
index ee01b7a38e58..b819390e29cd 100644
--- a/arch/m68k/amiga/config.c
+++ b/arch/m68k/amiga/config.c
@@ -95,7 +95,7 @@ static void amiga_sched_init(irq_handler_t handler);
95static void amiga_get_model(char *model); 95static void amiga_get_model(char *model);
96static void amiga_get_hardware_list(struct seq_file *m); 96static void amiga_get_hardware_list(struct seq_file *m);
97/* amiga specific timer functions */ 97/* amiga specific timer functions */
98static unsigned long amiga_gettimeoffset(void); 98static u32 amiga_gettimeoffset(void);
99extern void amiga_mksound(unsigned int count, unsigned int ticks); 99extern void amiga_mksound(unsigned int count, unsigned int ticks);
100static void amiga_reset(void); 100static void amiga_reset(void);
101extern void amiga_init_sound(void); 101extern void amiga_init_sound(void);
@@ -377,7 +377,7 @@ void __init config_amiga(void)
377 mach_init_IRQ = amiga_init_IRQ; 377 mach_init_IRQ = amiga_init_IRQ;
378 mach_get_model = amiga_get_model; 378 mach_get_model = amiga_get_model;
379 mach_get_hardware_list = amiga_get_hardware_list; 379 mach_get_hardware_list = amiga_get_hardware_list;
380 mach_gettimeoffset = amiga_gettimeoffset; 380 arch_gettimeoffset = amiga_gettimeoffset;
381 381
382 /* 382 /*
383 * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI 383 * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI
@@ -482,10 +482,10 @@ static void __init amiga_sched_init(irq_handler_t timer_routine)
482#define TICK_SIZE 10000 482#define TICK_SIZE 10000
483 483
484/* This is always executed with interrupts disabled. */ 484/* This is always executed with interrupts disabled. */
485static unsigned long amiga_gettimeoffset(void) 485static u32 amiga_gettimeoffset(void)
486{ 486{
487 unsigned short hi, lo, hi2; 487 unsigned short hi, lo, hi2;
488 unsigned long ticks, offset = 0; 488 u32 ticks, offset = 0;
489 489
490 /* read CIA B timer A current value */ 490 /* read CIA B timer A current value */
491 hi = ciab.tahi; 491 hi = ciab.tahi;
@@ -507,7 +507,7 @@ static unsigned long amiga_gettimeoffset(void)
507 ticks = jiffy_ticks - ticks; 507 ticks = jiffy_ticks - ticks;
508 ticks = (10000 * ticks) / jiffy_ticks; 508 ticks = (10000 * ticks) / jiffy_ticks;
509 509
510 return ticks + offset; 510 return (ticks + offset) * 1000;
511} 511}
512 512
513static void amiga_reset(void) __noreturn; 513static void amiga_reset(void) __noreturn;
diff --git a/arch/m68k/apollo/config.c b/arch/m68k/apollo/config.c
index f5565d6eeb8e..3ea56b90e718 100644
--- a/arch/m68k/apollo/config.c
+++ b/arch/m68k/apollo/config.c
@@ -26,7 +26,7 @@ u_long apollo_model;
26 26
27extern void dn_sched_init(irq_handler_t handler); 27extern void dn_sched_init(irq_handler_t handler);
28extern void dn_init_IRQ(void); 28extern void dn_init_IRQ(void);
29extern unsigned long dn_gettimeoffset(void); 29extern u32 dn_gettimeoffset(void);
30extern int dn_dummy_hwclk(int, struct rtc_time *); 30extern int dn_dummy_hwclk(int, struct rtc_time *);
31extern int dn_dummy_set_clock_mmss(unsigned long); 31extern int dn_dummy_set_clock_mmss(unsigned long);
32extern void dn_dummy_reset(void); 32extern void dn_dummy_reset(void);
@@ -151,7 +151,7 @@ void __init config_apollo(void)
151 151
152 mach_sched_init=dn_sched_init; /* */ 152 mach_sched_init=dn_sched_init; /* */
153 mach_init_IRQ=dn_init_IRQ; 153 mach_init_IRQ=dn_init_IRQ;
154 mach_gettimeoffset = dn_gettimeoffset; 154 arch_gettimeoffset = dn_gettimeoffset;
155 mach_max_dma_address = 0xffffffff; 155 mach_max_dma_address = 0xffffffff;
156 mach_hwclk = dn_dummy_hwclk; /* */ 156 mach_hwclk = dn_dummy_hwclk; /* */
157 mach_set_clock_mmss = dn_dummy_set_clock_mmss; /* */ 157 mach_set_clock_mmss = dn_dummy_set_clock_mmss; /* */
@@ -203,10 +203,9 @@ void dn_sched_init(irq_handler_t timer_routine)
203 pr_err("Couldn't register timer interrupt\n"); 203 pr_err("Couldn't register timer interrupt\n");
204} 204}
205 205
206unsigned long dn_gettimeoffset(void) { 206u32 dn_gettimeoffset(void)
207 207{
208 return 0xdeadbeef; 208 return 0xdeadbeef;
209
210} 209}
211 210
212int dn_dummy_hwclk(int op, struct rtc_time *t) { 211int dn_dummy_hwclk(int op, struct rtc_time *t) {
diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c
index d8eb32747ac5..037c11c99331 100644
--- a/arch/m68k/atari/config.c
+++ b/arch/m68k/atari/config.c
@@ -74,7 +74,7 @@ static void atari_heartbeat(int on);
74 74
75/* atari specific timer functions (in time.c) */ 75/* atari specific timer functions (in time.c) */
76extern void atari_sched_init(irq_handler_t); 76extern void atari_sched_init(irq_handler_t);
77extern unsigned long atari_gettimeoffset (void); 77extern u32 atari_gettimeoffset(void);
78extern int atari_mste_hwclk (int, struct rtc_time *); 78extern int atari_mste_hwclk (int, struct rtc_time *);
79extern int atari_tt_hwclk (int, struct rtc_time *); 79extern int atari_tt_hwclk (int, struct rtc_time *);
80extern int atari_mste_set_clock_mmss (unsigned long); 80extern int atari_mste_set_clock_mmss (unsigned long);
@@ -204,7 +204,7 @@ void __init config_atari(void)
204 mach_init_IRQ = atari_init_IRQ; 204 mach_init_IRQ = atari_init_IRQ;
205 mach_get_model = atari_get_model; 205 mach_get_model = atari_get_model;
206 mach_get_hardware_list = atari_get_hardware_list; 206 mach_get_hardware_list = atari_get_hardware_list;
207 mach_gettimeoffset = atari_gettimeoffset; 207 arch_gettimeoffset = atari_gettimeoffset;
208 mach_reset = atari_reset; 208 mach_reset = atari_reset;
209 mach_max_dma_address = 0xffffff; 209 mach_max_dma_address = 0xffffff;
210#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE) 210#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
diff --git a/arch/m68k/atari/time.c b/arch/m68k/atari/time.c
index c0cc68a2c829..da8f981c36d6 100644
--- a/arch/m68k/atari/time.c
+++ b/arch/m68k/atari/time.c
@@ -42,9 +42,9 @@ atari_sched_init(irq_handler_t timer_routine)
42#define TICK_SIZE 10000 42#define TICK_SIZE 10000
43 43
44/* This is always executed with interrupts disabled. */ 44/* This is always executed with interrupts disabled. */
45unsigned long atari_gettimeoffset (void) 45u32 atari_gettimeoffset(void)
46{ 46{
47 unsigned long ticks, offset = 0; 47 u32 ticks, offset = 0;
48 48
49 /* read MFP timer C current value */ 49 /* read MFP timer C current value */
50 ticks = st_mfp.tim_dt_c; 50 ticks = st_mfp.tim_dt_c;
@@ -57,7 +57,7 @@ unsigned long atari_gettimeoffset (void)
57 ticks = INT_TICKS - ticks; 57 ticks = INT_TICKS - ticks;
58 ticks = ticks * 10000L / INT_TICKS; 58 ticks = ticks * 10000L / INT_TICKS;
59 59
60 return ticks + offset; 60 return (ticks + offset) * 1000;
61} 61}
62 62
63 63
diff --git a/arch/m68k/bvme6000/config.c b/arch/m68k/bvme6000/config.c
index 0bf850a20ea2..8943aa4c18e6 100644
--- a/arch/m68k/bvme6000/config.c
+++ b/arch/m68k/bvme6000/config.c
@@ -38,7 +38,7 @@
38 38
39static void bvme6000_get_model(char *model); 39static void bvme6000_get_model(char *model);
40extern void bvme6000_sched_init(irq_handler_t handler); 40extern void bvme6000_sched_init(irq_handler_t handler);
41extern unsigned long bvme6000_gettimeoffset (void); 41extern u32 bvme6000_gettimeoffset(void);
42extern int bvme6000_hwclk (int, struct rtc_time *); 42extern int bvme6000_hwclk (int, struct rtc_time *);
43extern int bvme6000_set_clock_mmss (unsigned long); 43extern int bvme6000_set_clock_mmss (unsigned long);
44extern void bvme6000_reset (void); 44extern void bvme6000_reset (void);
@@ -110,7 +110,7 @@ void __init config_bvme6000(void)
110 mach_max_dma_address = 0xffffffff; 110 mach_max_dma_address = 0xffffffff;
111 mach_sched_init = bvme6000_sched_init; 111 mach_sched_init = bvme6000_sched_init;
112 mach_init_IRQ = bvme6000_init_IRQ; 112 mach_init_IRQ = bvme6000_init_IRQ;
113 mach_gettimeoffset = bvme6000_gettimeoffset; 113 arch_gettimeoffset = bvme6000_gettimeoffset;
114 mach_hwclk = bvme6000_hwclk; 114 mach_hwclk = bvme6000_hwclk;
115 mach_set_clock_mmss = bvme6000_set_clock_mmss; 115 mach_set_clock_mmss = bvme6000_set_clock_mmss;
116 mach_reset = bvme6000_reset; 116 mach_reset = bvme6000_reset;
@@ -216,13 +216,13 @@ void bvme6000_sched_init (irq_handler_t timer_routine)
216 * results... 216 * results...
217 */ 217 */
218 218
219unsigned long bvme6000_gettimeoffset (void) 219u32 bvme6000_gettimeoffset(void)
220{ 220{
221 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; 221 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
222 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE; 222 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
223 unsigned char msr = rtc->msr & 0xc0; 223 unsigned char msr = rtc->msr & 0xc0;
224 unsigned char t1int, t1op; 224 unsigned char t1int, t1op;
225 unsigned long v = 800000, ov; 225 u32 v = 800000, ov;
226 226
227 rtc->msr = 0; /* Ensure timer registers accessible */ 227 rtc->msr = 0; /* Ensure timer registers accessible */
228 228
@@ -246,7 +246,7 @@ unsigned long bvme6000_gettimeoffset (void)
246 v += 10000; /* Int pending, + 10ms */ 246 v += 10000; /* Int pending, + 10ms */
247 rtc->msr = msr; 247 rtc->msr = msr;
248 248
249 return v; 249 return v * 1000;
250} 250}
251 251
252/* 252/*
diff --git a/arch/m68k/hp300/config.c b/arch/m68k/hp300/config.c
index bf16af1edacf..b7609f791522 100644
--- a/arch/m68k/hp300/config.c
+++ b/arch/m68k/hp300/config.c
@@ -251,7 +251,7 @@ void __init config_hp300(void)
251 mach_sched_init = hp300_sched_init; 251 mach_sched_init = hp300_sched_init;
252 mach_init_IRQ = hp300_init_IRQ; 252 mach_init_IRQ = hp300_init_IRQ;
253 mach_get_model = hp300_get_model; 253 mach_get_model = hp300_get_model;
254 mach_gettimeoffset = hp300_gettimeoffset; 254 arch_gettimeoffset = hp300_gettimeoffset;
255 mach_hwclk = hp300_hwclk; 255 mach_hwclk = hp300_hwclk;
256 mach_get_ss = hp300_get_ss; 256 mach_get_ss = hp300_get_ss;
257 mach_reset = hp300_reset; 257 mach_reset = hp300_reset;
diff --git a/arch/m68k/hp300/time.c b/arch/m68k/hp300/time.c
index 29a71be9fa5b..749543b425a4 100644
--- a/arch/m68k/hp300/time.c
+++ b/arch/m68k/hp300/time.c
@@ -46,7 +46,7 @@ static irqreturn_t hp300_tick(int irq, void *dev_id)
46 return vector(irq, NULL); 46 return vector(irq, NULL);
47} 47}
48 48
49unsigned long hp300_gettimeoffset(void) 49u32 hp300_gettimeoffset(void)
50{ 50{
51 /* Read current timer 1 value */ 51 /* Read current timer 1 value */
52 unsigned char lsb, msb1, msb2; 52 unsigned char lsb, msb1, msb2;
@@ -59,7 +59,7 @@ unsigned long hp300_gettimeoffset(void)
59 /* A carry happened while we were reading. Read it again */ 59 /* A carry happened while we were reading. Read it again */
60 lsb = in_8(CLOCKBASE + 7); 60 lsb = in_8(CLOCKBASE + 7);
61 ticks = INTVAL - ((msb2 << 8) | lsb); 61 ticks = INTVAL - ((msb2 << 8) | lsb);
62 return (USECS_PER_JIFFY * ticks) / INTVAL; 62 return ((USECS_PER_JIFFY * ticks) / INTVAL) * 1000;
63} 63}
64 64
65void __init hp300_sched_init(irq_handler_t vector) 65void __init hp300_sched_init(irq_handler_t vector)
diff --git a/arch/m68k/hp300/time.h b/arch/m68k/hp300/time.h
index 7b98242960de..f5583ec4033d 100644
--- a/arch/m68k/hp300/time.h
+++ b/arch/m68k/hp300/time.h
@@ -1,2 +1,2 @@
1extern void hp300_sched_init(irq_handler_t vector); 1extern void hp300_sched_init(irq_handler_t vector);
2extern unsigned long hp300_gettimeoffset(void); 2extern u32 hp300_gettimeoffset(void);
diff --git a/arch/m68k/include/asm/machdep.h b/arch/m68k/include/asm/machdep.h
index 825c1c813196..953ca21da8ee 100644
--- a/arch/m68k/include/asm/machdep.h
+++ b/arch/m68k/include/asm/machdep.h
@@ -3,6 +3,7 @@
3 3
4#include <linux/seq_file.h> 4#include <linux/seq_file.h>
5#include <linux/interrupt.h> 5#include <linux/interrupt.h>
6#include <linux/time.h>
6 7
7struct pt_regs; 8struct pt_regs;
8struct mktime; 9struct mktime;
@@ -16,7 +17,6 @@ extern void (*mach_init_IRQ) (void);
16extern void (*mach_get_model) (char *model); 17extern void (*mach_get_model) (char *model);
17extern void (*mach_get_hardware_list) (struct seq_file *m); 18extern void (*mach_get_hardware_list) (struct seq_file *m);
18/* machine dependent timer functions */ 19/* machine dependent timer functions */
19extern unsigned long (*mach_gettimeoffset)(void);
20extern int (*mach_hwclk)(int, struct rtc_time*); 20extern int (*mach_hwclk)(int, struct rtc_time*);
21extern unsigned int (*mach_get_ss)(void); 21extern unsigned int (*mach_get_ss)(void);
22extern int (*mach_get_rtc_pll)(struct rtc_pll_info *); 22extern int (*mach_get_rtc_pll)(struct rtc_pll_info *);
diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c
index d872ce4807c9..80cfbe56ea32 100644
--- a/arch/m68k/kernel/setup_mm.c
+++ b/arch/m68k/kernel/setup_mm.c
@@ -84,7 +84,6 @@ void (*mach_init_IRQ) (void) __initdata = NULL;
84void (*mach_get_model) (char *model); 84void (*mach_get_model) (char *model);
85void (*mach_get_hardware_list) (struct seq_file *m); 85void (*mach_get_hardware_list) (struct seq_file *m);
86/* machine dependent timer functions */ 86/* machine dependent timer functions */
87unsigned long (*mach_gettimeoffset) (void);
88int (*mach_hwclk) (int, struct rtc_time*); 87int (*mach_hwclk) (int, struct rtc_time*);
89EXPORT_SYMBOL(mach_hwclk); 88EXPORT_SYMBOL(mach_hwclk);
90int (*mach_set_clock_mmss) (unsigned long); 89int (*mach_set_clock_mmss) (unsigned long);
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index 5d0bcaad2e55..bea6bcf8f9b8 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -80,18 +80,8 @@ void read_persistent_clock(struct timespec *ts)
80 } 80 }
81} 81}
82 82
83void __init time_init(void)
84{
85 mach_sched_init(timer_interrupt);
86}
87
88#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET 83#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
89 84
90u32 arch_gettimeoffset(void)
91{
92 return mach_gettimeoffset() * 1000;
93}
94
95static int __init rtc_init(void) 85static int __init rtc_init(void)
96{ 86{
97 struct platform_device *pdev; 87 struct platform_device *pdev;
@@ -106,3 +96,8 @@ static int __init rtc_init(void)
106module_init(rtc_init); 96module_init(rtc_init);
107 97
108#endif /* CONFIG_ARCH_USES_GETTIMEOFFSET */ 98#endif /* CONFIG_ARCH_USES_GETTIMEOFFSET */
99
100void __init time_init(void)
101{
102 mach_sched_init(timer_interrupt);
103}
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index d9f62e0f46c0..afb95d5fb26b 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -52,7 +52,7 @@ struct mac_booter_data mac_bi_data;
52static unsigned long mac_orig_videoaddr; 52static unsigned long mac_orig_videoaddr;
53 53
54/* Mac specific timer functions */ 54/* Mac specific timer functions */
55extern unsigned long mac_gettimeoffset(void); 55extern u32 mac_gettimeoffset(void);
56extern int mac_hwclk(int, struct rtc_time *); 56extern int mac_hwclk(int, struct rtc_time *);
57extern int mac_set_clock_mmss(unsigned long); 57extern int mac_set_clock_mmss(unsigned long);
58extern void iop_preinit(void); 58extern void iop_preinit(void);
@@ -177,7 +177,7 @@ void __init config_mac(void)
177 mach_sched_init = mac_sched_init; 177 mach_sched_init = mac_sched_init;
178 mach_init_IRQ = mac_init_IRQ; 178 mach_init_IRQ = mac_init_IRQ;
179 mach_get_model = mac_get_model; 179 mach_get_model = mac_get_model;
180 mach_gettimeoffset = mac_gettimeoffset; 180 arch_gettimeoffset = mac_gettimeoffset;
181 mach_hwclk = mac_hwclk; 181 mach_hwclk = mac_hwclk;
182 mach_set_clock_mmss = mac_set_clock_mmss; 182 mach_set_clock_mmss = mac_set_clock_mmss;
183 mach_reset = mac_reset; 183 mach_reset = mac_reset;
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
index 2d85662715fb..5d1458bb871b 100644
--- a/arch/m68k/mac/via.c
+++ b/arch/m68k/mac/via.c
@@ -327,7 +327,7 @@ void via_debug_dump(void)
327 * TBI: get time offset between scheduling timer ticks 327 * TBI: get time offset between scheduling timer ticks
328 */ 328 */
329 329
330unsigned long mac_gettimeoffset (void) 330u32 mac_gettimeoffset(void)
331{ 331{
332 unsigned long ticks, offset = 0; 332 unsigned long ticks, offset = 0;
333 333
@@ -341,7 +341,7 @@ unsigned long mac_gettimeoffset (void)
341 ticks = MAC_CLOCK_TICK - ticks; 341 ticks = MAC_CLOCK_TICK - ticks;
342 ticks = ticks * 10000L / MAC_CLOCK_TICK; 342 ticks = ticks * 10000L / MAC_CLOCK_TICK;
343 343
344 return ticks + offset; 344 return (ticks + offset) * 1000;
345} 345}
346 346
347/* 347/*
diff --git a/arch/m68k/mvme147/config.c b/arch/m68k/mvme147/config.c
index a41c09149e23..1c6262803b94 100644
--- a/arch/m68k/mvme147/config.c
+++ b/arch/m68k/mvme147/config.c
@@ -37,7 +37,7 @@
37 37
38static void mvme147_get_model(char *model); 38static void mvme147_get_model(char *model);
39extern void mvme147_sched_init(irq_handler_t handler); 39extern void mvme147_sched_init(irq_handler_t handler);
40extern unsigned long mvme147_gettimeoffset (void); 40extern u32 mvme147_gettimeoffset(void);
41extern int mvme147_hwclk (int, struct rtc_time *); 41extern int mvme147_hwclk (int, struct rtc_time *);
42extern int mvme147_set_clock_mmss (unsigned long); 42extern int mvme147_set_clock_mmss (unsigned long);
43extern void mvme147_reset (void); 43extern void mvme147_reset (void);
@@ -88,7 +88,7 @@ void __init config_mvme147(void)
88 mach_max_dma_address = 0x01000000; 88 mach_max_dma_address = 0x01000000;
89 mach_sched_init = mvme147_sched_init; 89 mach_sched_init = mvme147_sched_init;
90 mach_init_IRQ = mvme147_init_IRQ; 90 mach_init_IRQ = mvme147_init_IRQ;
91 mach_gettimeoffset = mvme147_gettimeoffset; 91 arch_gettimeoffset = mvme147_gettimeoffset;
92 mach_hwclk = mvme147_hwclk; 92 mach_hwclk = mvme147_hwclk;
93 mach_set_clock_mmss = mvme147_set_clock_mmss; 93 mach_set_clock_mmss = mvme147_set_clock_mmss;
94 mach_reset = mvme147_reset; 94 mach_reset = mvme147_reset;
@@ -127,7 +127,7 @@ void mvme147_sched_init (irq_handler_t timer_routine)
127 127
128/* This is always executed with interrupts disabled. */ 128/* This is always executed with interrupts disabled. */
129/* XXX There are race hazards in this code XXX */ 129/* XXX There are race hazards in this code XXX */
130unsigned long mvme147_gettimeoffset (void) 130u32 mvme147_gettimeoffset(void)
131{ 131{
132 volatile unsigned short *cp = (volatile unsigned short *)0xfffe1012; 132 volatile unsigned short *cp = (volatile unsigned short *)0xfffe1012;
133 unsigned short n; 133 unsigned short n;
@@ -137,7 +137,7 @@ unsigned long mvme147_gettimeoffset (void)
137 n = *cp; 137 n = *cp;
138 138
139 n -= PCC_TIMER_PRELOAD; 139 n -= PCC_TIMER_PRELOAD;
140 return (unsigned long)n * 25 / 4; 140 return ((unsigned long)n * 25 / 4) * 1000;
141} 141}
142 142
143static int bcd2int (unsigned char b) 143static int bcd2int (unsigned char b)
diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c
index b6d7d8a7a3dd..080a342458a1 100644
--- a/arch/m68k/mvme16x/config.c
+++ b/arch/m68k/mvme16x/config.c
@@ -43,7 +43,7 @@ static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
43 43
44static void mvme16x_get_model(char *model); 44static void mvme16x_get_model(char *model);
45extern void mvme16x_sched_init(irq_handler_t handler); 45extern void mvme16x_sched_init(irq_handler_t handler);
46extern unsigned long mvme16x_gettimeoffset (void); 46extern u32 mvme16x_gettimeoffset(void);
47extern int mvme16x_hwclk (int, struct rtc_time *); 47extern int mvme16x_hwclk (int, struct rtc_time *);
48extern int mvme16x_set_clock_mmss (unsigned long); 48extern int mvme16x_set_clock_mmss (unsigned long);
49extern void mvme16x_reset (void); 49extern void mvme16x_reset (void);
@@ -289,7 +289,7 @@ void __init config_mvme16x(void)
289 mach_max_dma_address = 0xffffffff; 289 mach_max_dma_address = 0xffffffff;
290 mach_sched_init = mvme16x_sched_init; 290 mach_sched_init = mvme16x_sched_init;
291 mach_init_IRQ = mvme16x_init_IRQ; 291 mach_init_IRQ = mvme16x_init_IRQ;
292 mach_gettimeoffset = mvme16x_gettimeoffset; 292 arch_gettimeoffset = mvme16x_gettimeoffset;
293 mach_hwclk = mvme16x_hwclk; 293 mach_hwclk = mvme16x_hwclk;
294 mach_set_clock_mmss = mvme16x_set_clock_mmss; 294 mach_set_clock_mmss = mvme16x_set_clock_mmss;
295 mach_reset = mvme16x_reset; 295 mach_reset = mvme16x_reset;
@@ -405,9 +405,9 @@ void mvme16x_sched_init (irq_handler_t timer_routine)
405 405
406 406
407/* This is always executed with interrupts disabled. */ 407/* This is always executed with interrupts disabled. */
408unsigned long mvme16x_gettimeoffset (void) 408u32 mvme16x_gettimeoffset(void)
409{ 409{
410 return (*(volatile unsigned long *)0xfff42008); 410 return (*(volatile u32 *)0xfff42008) * 1000;
411} 411}
412 412
413int bcd2int (unsigned char b) 413int bcd2int (unsigned char b)
diff --git a/arch/m68k/q40/config.c b/arch/m68k/q40/config.c
index 1adb5b7b0d1a..658542b914fc 100644
--- a/arch/m68k/q40/config.c
+++ b/arch/m68k/q40/config.c
@@ -40,7 +40,7 @@ extern void q40_init_IRQ(void);
40static void q40_get_model(char *model); 40static void q40_get_model(char *model);
41extern void q40_sched_init(irq_handler_t handler); 41extern void q40_sched_init(irq_handler_t handler);
42 42
43static unsigned long q40_gettimeoffset(void); 43static u32 q40_gettimeoffset(void);
44static int q40_hwclk(int, struct rtc_time *); 44static int q40_hwclk(int, struct rtc_time *);
45static unsigned int q40_get_ss(void); 45static unsigned int q40_get_ss(void);
46static int q40_set_clock_mmss(unsigned long); 46static int q40_set_clock_mmss(unsigned long);
@@ -170,7 +170,7 @@ void __init config_q40(void)
170 mach_sched_init = q40_sched_init; 170 mach_sched_init = q40_sched_init;
171 171
172 mach_init_IRQ = q40_init_IRQ; 172 mach_init_IRQ = q40_init_IRQ;
173 mach_gettimeoffset = q40_gettimeoffset; 173 arch_gettimeoffset = q40_gettimeoffset;
174 mach_hwclk = q40_hwclk; 174 mach_hwclk = q40_hwclk;
175 mach_get_ss = q40_get_ss; 175 mach_get_ss = q40_get_ss;
176 mach_get_rtc_pll = q40_get_rtc_pll; 176 mach_get_rtc_pll = q40_get_rtc_pll;
@@ -204,9 +204,9 @@ int q40_parse_bootinfo(const struct bi_record *rec)
204} 204}
205 205
206 206
207static unsigned long q40_gettimeoffset(void) 207static u32 q40_gettimeoffset(void)
208{ 208{
209 return 5000 * (ql_ticks != 0); 209 return 5000 * (ql_ticks != 0) * 1000;
210} 210}
211 211
212 212
diff --git a/arch/m68k/sun3/config.c b/arch/m68k/sun3/config.c
index 2ca25bd01a96..f59ec58083f8 100644
--- a/arch/m68k/sun3/config.c
+++ b/arch/m68k/sun3/config.c
@@ -36,7 +36,7 @@
36 36
37char sun3_reserved_pmeg[SUN3_PMEGS_NUM]; 37char sun3_reserved_pmeg[SUN3_PMEGS_NUM];
38 38
39extern unsigned long sun3_gettimeoffset(void); 39extern u32 sun3_gettimeoffset(void);
40static void sun3_sched_init(irq_handler_t handler); 40static void sun3_sched_init(irq_handler_t handler);
41extern void sun3_get_model (char* model); 41extern void sun3_get_model (char* model);
42extern int sun3_hwclk(int set, struct rtc_time *t); 42extern int sun3_hwclk(int set, struct rtc_time *t);
@@ -141,7 +141,7 @@ void __init config_sun3(void)
141 mach_sched_init = sun3_sched_init; 141 mach_sched_init = sun3_sched_init;
142 mach_init_IRQ = sun3_init_IRQ; 142 mach_init_IRQ = sun3_init_IRQ;
143 mach_reset = sun3_reboot; 143 mach_reset = sun3_reboot;
144 mach_gettimeoffset = sun3_gettimeoffset; 144 arch_gettimeoffset = sun3_gettimeoffset;
145 mach_get_model = sun3_get_model; 145 mach_get_model = sun3_get_model;
146 mach_hwclk = sun3_hwclk; 146 mach_hwclk = sun3_hwclk;
147 mach_halt = sun3_halt; 147 mach_halt = sun3_halt;
diff --git a/arch/m68k/sun3/intersil.c b/arch/m68k/sun3/intersil.c
index 94fe8016f1f0..889829e11f1d 100644
--- a/arch/m68k/sun3/intersil.c
+++ b/arch/m68k/sun3/intersil.c
@@ -23,9 +23,9 @@
23#define START_VAL (INTERSIL_RUN | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE) 23#define START_VAL (INTERSIL_RUN | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE)
24 24
25/* does this need to be implemented? */ 25/* does this need to be implemented? */
26unsigned long sun3_gettimeoffset(void) 26u32 sun3_gettimeoffset(void)
27{ 27{
28 return 1; 28 return 1000;
29} 29}
30 30
31 31
diff --git a/arch/m68k/sun3x/config.c b/arch/m68k/sun3x/config.c
index dd306c84d36d..0532d64d191e 100644
--- a/arch/m68k/sun3x/config.c
+++ b/arch/m68k/sun3x/config.c
@@ -48,7 +48,7 @@ void __init config_sun3x(void)
48 mach_sched_init = sun3x_sched_init; 48 mach_sched_init = sun3x_sched_init;
49 mach_init_IRQ = sun3_init_IRQ; 49 mach_init_IRQ = sun3_init_IRQ;
50 50
51 mach_gettimeoffset = sun3x_gettimeoffset; 51 arch_gettimeoffset = sun3x_gettimeoffset;
52 mach_reset = sun3x_reboot; 52 mach_reset = sun3x_reboot;
53 53
54 mach_hwclk = sun3x_hwclk; 54 mach_hwclk = sun3x_hwclk;
diff --git a/arch/m68k/sun3x/time.c b/arch/m68k/sun3x/time.c
index 1d0a72480409..c8eb08add6b0 100644
--- a/arch/m68k/sun3x/time.c
+++ b/arch/m68k/sun3x/time.c
@@ -71,7 +71,7 @@ int sun3x_hwclk(int set, struct rtc_time *t)
71 return 0; 71 return 0;
72} 72}
73/* Not much we can do here */ 73/* Not much we can do here */
74unsigned long sun3x_gettimeoffset (void) 74u32 sun3x_gettimeoffset(void)
75{ 75{
76 return 0L; 76 return 0L;
77} 77}
diff --git a/arch/m68k/sun3x/time.h b/arch/m68k/sun3x/time.h
index 6909e1297534..a4f9126be7e2 100644
--- a/arch/m68k/sun3x/time.h
+++ b/arch/m68k/sun3x/time.h
@@ -2,7 +2,7 @@
2#define SUN3X_TIME_H 2#define SUN3X_TIME_H
3 3
4extern int sun3x_hwclk(int set, struct rtc_time *t); 4extern int sun3x_hwclk(int set, struct rtc_time *t);
5unsigned long sun3x_gettimeoffset (void); 5u32 sun3x_gettimeoffset(void);
6void sun3x_sched_init(irq_handler_t vector); 6void sun3x_sched_init(irq_handler_t vector);
7 7
8struct mostek_dt { 8struct mostek_dt {
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
index e69991aab43a..792bc57a9db7 100644
--- a/drivers/clk/clk-bcm2835.c
+++ b/drivers/clk/clk-bcm2835.c
@@ -20,6 +20,13 @@
20#include <linux/clk-provider.h> 20#include <linux/clk-provider.h>
21#include <linux/clkdev.h> 21#include <linux/clkdev.h>
22#include <linux/clk/bcm2835.h> 22#include <linux/clk/bcm2835.h>
23#include <linux/clk-provider.h>
24#include <linux/of.h>
25
26static const __initconst struct of_device_id clk_match[] = {
27 { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
28 { }
29};
23 30
24/* 31/*
25 * These are fixed clocks. They're probably not all root clocks and it may 32 * These are fixed clocks. They're probably not all root clocks and it may
@@ -56,4 +63,6 @@ void __init bcm2835_init_clocks(void)
56 ret = clk_register_clkdev(clk, NULL, "20215000.uart"); 63 ret = clk_register_clkdev(clk, NULL, "20215000.uart");
57 if (ret) 64 if (ret)
58 pr_err("uart1_pclk alias not registered\n"); 65 pr_err("uart1_pclk alias not registered\n");
66
67 of_clk_init(clk_match);
59} 68}
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 7fdcbd3f4da5..7d978c1bd528 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -1,3 +1,6 @@
1config CLKSRC_OF
2 bool
3
1config CLKSRC_I8253 4config CLKSRC_I8253
2 bool 5 bool
3 6
@@ -25,6 +28,9 @@ config ARMADA_370_XP_TIMER
25config SUNXI_TIMER 28config SUNXI_TIMER
26 bool 29 bool
27 30
31config VT8500_TIMER
32 bool
33
28config CLKSRC_NOMADIK_MTU 34config CLKSRC_NOMADIK_MTU
29 bool 35 bool
30 depends on (ARCH_NOMADIK || ARCH_U8500) 36 depends on (ARCH_NOMADIK || ARCH_U8500)
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index f93453d01673..440449c1ca21 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -1,3 +1,4 @@
1obj-$(CONFIG_CLKSRC_OF) += clksrc-of.o
1obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o 2obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o
2obj-$(CONFIG_X86_CYCLONE_TIMER) += cyclone.o 3obj-$(CONFIG_X86_CYCLONE_TIMER) += cyclone.o
3obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o 4obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o
@@ -16,5 +17,6 @@ obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
16obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o 17obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
17obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o 18obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
18obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o 19obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o
20obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o
19 21
20obj-$(CONFIG_CLKSRC_ARM_GENERIC) += arm_generic.o 22obj-$(CONFIG_CLKSRC_ARM_GENERIC) += arm_generic.o
diff --git a/drivers/clocksource/bcm2835_timer.c b/drivers/clocksource/bcm2835_timer.c
index bc19f12c20ce..7f796d8f7505 100644
--- a/drivers/clocksource/bcm2835_timer.c
+++ b/drivers/clocksource/bcm2835_timer.c
@@ -101,7 +101,7 @@ static struct of_device_id bcm2835_time_match[] __initconst = {
101 {} 101 {}
102}; 102};
103 103
104static void __init bcm2835_time_init(void) 104void __init bcm2835_timer_init(void)
105{ 105{
106 struct device_node *node; 106 struct device_node *node;
107 void __iomem *base; 107 void __iomem *base;
@@ -155,7 +155,3 @@ static void __init bcm2835_time_init(void)
155 155
156 pr_info("bcm2835: system timer (irq = %d)\n", irq); 156 pr_info("bcm2835: system timer (irq = %d)\n", irq);
157} 157}
158
159struct sys_timer bcm2835_timer = {
160 .init = bcm2835_time_init,
161};
diff --git a/drivers/clocksource/clksrc-of.c b/drivers/clocksource/clksrc-of.c
new file mode 100644
index 000000000000..bdabdaa8d00f
--- /dev/null
+++ b/drivers/clocksource/clksrc-of.c
@@ -0,0 +1,35 @@
1/*
2 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <linux/init.h>
18#include <linux/of.h>
19
20extern struct of_device_id __clksrc_of_table[];
21
22static const struct of_device_id __clksrc_of_table_sentinel
23 __used __section(__clksrc_of_table_end);
24
25void __init clocksource_of_init(void)
26{
27 struct device_node *np;
28 const struct of_device_id *match;
29 void (*init_func)(void);
30
31 for_each_matching_node_and_match(np, __clksrc_of_table, &match) {
32 init_func = match->data;
33 init_func();
34 }
35}
diff --git a/drivers/clocksource/cs5535-clockevt.c b/drivers/clocksource/cs5535-clockevt.c
index d9279385304d..ea210482dd20 100644
--- a/drivers/clocksource/cs5535-clockevt.c
+++ b/drivers/clocksource/cs5535-clockevt.c
@@ -100,7 +100,6 @@ static struct clock_event_device cs5535_clockevent = {
100 .set_mode = mfgpt_set_mode, 100 .set_mode = mfgpt_set_mode,
101 .set_next_event = mfgpt_next_event, 101 .set_next_event = mfgpt_next_event,
102 .rating = 250, 102 .rating = 250,
103 .shift = 32
104}; 103};
105 104
106static irqreturn_t mfgpt_tick(int irq, void *dev_id) 105static irqreturn_t mfgpt_tick(int irq, void *dev_id)
@@ -169,17 +168,11 @@ static int __init cs5535_mfgpt_init(void)
169 cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, val); 168 cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, val);
170 169
171 /* Set up the clock event */ 170 /* Set up the clock event */
172 cs5535_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC,
173 cs5535_clockevent.shift);
174 cs5535_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
175 &cs5535_clockevent);
176 cs5535_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
177 &cs5535_clockevent);
178
179 printk(KERN_INFO DRV_NAME 171 printk(KERN_INFO DRV_NAME
180 ": Registering MFGPT timer as a clock event, using IRQ %d\n", 172 ": Registering MFGPT timer as a clock event, using IRQ %d\n",
181 timer_irq); 173 timer_irq);
182 clockevents_register_device(&cs5535_clockevent); 174 clockevents_config_and_register(&cs5535_clockevent, MFGPT_HZ,
175 0xF, 0xFFFE);
183 176
184 return 0; 177 return 0;
185 178
diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c
index f7dba5b79b44..ab09ed3742ee 100644
--- a/drivers/clocksource/dw_apb_timer_of.c
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -107,7 +107,7 @@ static const struct of_device_id osctimer_ids[] __initconst = {
107 {}, 107 {},
108}; 108};
109 109
110static void __init timer_init(void) 110void __init dw_apb_timer_init(void)
111{ 111{
112 struct device_node *event_timer, *source_timer; 112 struct device_node *event_timer, *source_timer;
113 113
@@ -125,7 +125,3 @@ static void __init timer_init(void)
125 125
126 init_sched_clock(); 126 init_sched_clock();
127} 127}
128
129struct sys_timer dw_apb_timer = {
130 .init = timer_init,
131};
diff --git a/drivers/clocksource/nomadik-mtu.c b/drivers/clocksource/nomadik-mtu.c
index 8914c3c1c88b..025afc6dd324 100644
--- a/drivers/clocksource/nomadik-mtu.c
+++ b/drivers/clocksource/nomadik-mtu.c
@@ -134,12 +134,32 @@ static void nmdk_clkevt_mode(enum clock_event_mode mode,
134 } 134 }
135} 135}
136 136
137void nmdk_clksrc_reset(void)
138{
139 /* Disable */
140 writel(0, mtu_base + MTU_CR(0));
141
142 /* ClockSource: configure load and background-load, and fire it up */
143 writel(nmdk_cycle, mtu_base + MTU_LR(0));
144 writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
145
146 writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA,
147 mtu_base + MTU_CR(0));
148}
149
150static void nmdk_clkevt_resume(struct clock_event_device *cedev)
151{
152 nmdk_clkevt_reset();
153 nmdk_clksrc_reset();
154}
155
137static struct clock_event_device nmdk_clkevt = { 156static struct clock_event_device nmdk_clkevt = {
138 .name = "mtu_1", 157 .name = "mtu_1",
139 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, 158 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
140 .rating = 200, 159 .rating = 200,
141 .set_mode = nmdk_clkevt_mode, 160 .set_mode = nmdk_clkevt_mode,
142 .set_next_event = nmdk_clkevt_next, 161 .set_next_event = nmdk_clkevt_next,
162 .resume = nmdk_clkevt_resume,
143}; 163};
144 164
145/* 165/*
@@ -161,19 +181,6 @@ static struct irqaction nmdk_timer_irq = {
161 .dev_id = &nmdk_clkevt, 181 .dev_id = &nmdk_clkevt,
162}; 182};
163 183
164void nmdk_clksrc_reset(void)
165{
166 /* Disable */
167 writel(0, mtu_base + MTU_CR(0));
168
169 /* ClockSource: configure load and background-load, and fire it up */
170 writel(nmdk_cycle, mtu_base + MTU_LR(0));
171 writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
172
173 writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA,
174 mtu_base + MTU_CR(0));
175}
176
177void __init nmdk_timer_init(void __iomem *base, int irq) 184void __init nmdk_timer_init(void __iomem *base, int irq)
178{ 185{
179 unsigned long rate; 186 unsigned long rate;
diff --git a/drivers/clocksource/sunxi_timer.c b/drivers/clocksource/sunxi_timer.c
index 3cd1bd3d7aee..0ce85e29769b 100644
--- a/drivers/clocksource/sunxi_timer.c
+++ b/drivers/clocksource/sunxi_timer.c
@@ -74,7 +74,6 @@ static int sunxi_clkevt_next_event(unsigned long evt,
74 74
75static struct clock_event_device sunxi_clockevent = { 75static struct clock_event_device sunxi_clockevent = {
76 .name = "sunxi_tick", 76 .name = "sunxi_tick",
77 .shift = 32,
78 .rating = 300, 77 .rating = 300,
79 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 78 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
80 .set_mode = sunxi_clkevt_mode, 79 .set_mode = sunxi_clkevt_mode,
@@ -104,7 +103,7 @@ static struct of_device_id sunxi_timer_dt_ids[] = {
104 { } 103 { }
105}; 104};
106 105
107static void __init sunxi_timer_init(void) 106void __init sunxi_timer_init(void)
108{ 107{
109 struct device_node *node; 108 struct device_node *node;
110 unsigned long rate = 0; 109 unsigned long rate = 0;
@@ -154,18 +153,8 @@ static void __init sunxi_timer_init(void)
154 val = readl(timer_base + TIMER_CTL_REG); 153 val = readl(timer_base + TIMER_CTL_REG);
155 writel(val | TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG); 154 writel(val | TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG);
156 155
157 sunxi_clockevent.mult = div_sc(rate / TIMER_SCAL,
158 NSEC_PER_SEC,
159 sunxi_clockevent.shift);
160 sunxi_clockevent.max_delta_ns = clockevent_delta2ns(0xff,
161 &sunxi_clockevent);
162 sunxi_clockevent.min_delta_ns = clockevent_delta2ns(0x1,
163 &sunxi_clockevent);
164 sunxi_clockevent.cpumask = cpumask_of(0); 156 sunxi_clockevent.cpumask = cpumask_of(0);
165 157
166 clockevents_register_device(&sunxi_clockevent); 158 clockevents_config_and_register(&sunxi_clockevent, rate / TIMER_SCAL,
159 0x1, 0xff);
167} 160}
168
169struct sys_timer sunxi_timer = {
170 .init = sunxi_timer_init,
171};
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 32cb929b8eb6..8a6187225dd0 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -157,7 +157,6 @@ static struct tc_clkevt_device clkevt = {
157 .name = "tc_clkevt", 157 .name = "tc_clkevt",
158 .features = CLOCK_EVT_FEAT_PERIODIC 158 .features = CLOCK_EVT_FEAT_PERIODIC
159 | CLOCK_EVT_FEAT_ONESHOT, 159 | CLOCK_EVT_FEAT_ONESHOT,
160 .shift = 32,
161 /* Should be lower than at91rm9200's system timer */ 160 /* Should be lower than at91rm9200's system timer */
162 .rating = 125, 161 .rating = 125,
163 .set_next_event = tc_next_event, 162 .set_next_event = tc_next_event,
@@ -196,13 +195,9 @@ static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
196 195
197 timer_clock = clk32k_divisor_idx; 196 timer_clock = clk32k_divisor_idx;
198 197
199 clkevt.clkevt.mult = div_sc(32768, NSEC_PER_SEC, clkevt.clkevt.shift);
200 clkevt.clkevt.max_delta_ns
201 = clockevent_delta2ns(0xffff, &clkevt.clkevt);
202 clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1;
203 clkevt.clkevt.cpumask = cpumask_of(0); 198 clkevt.clkevt.cpumask = cpumask_of(0);
204 199
205 clockevents_register_device(&clkevt.clkevt); 200 clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0xffff);
206 201
207 setup_irq(irq, &tc_irqaction); 202 setup_irq(irq, &tc_irqaction);
208} 203}
diff --git a/arch/arm/mach-vt8500/timer.c b/drivers/clocksource/vt8500_timer.c
index 3dd21a47881f..ed66cf07d3c6 100644
--- a/arch/arm/mach-vt8500/timer.c
+++ b/drivers/clocksource/vt8500_timer.c
@@ -168,17 +168,12 @@ void __init vt8500_timer_init(void)
168 pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n", 168 pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
169 __func__, clocksource.name); 169 __func__, clocksource.name);
170 170
171 clockevents_calc_mult_shift(&clockevent, VT8500_TIMER_HZ, 4);
172
173 /* copy-pasted from mach-msm; no idea */
174 clockevent.max_delta_ns =
175 clockevent_delta2ns(0xf0000000, &clockevent);
176 clockevent.min_delta_ns = clockevent_delta2ns(4, &clockevent);
177 clockevent.cpumask = cpumask_of(0); 171 clockevent.cpumask = cpumask_of(0);
178 172
179 if (setup_irq(timer_irq, &irq)) 173 if (setup_irq(timer_irq, &irq))
180 pr_err("%s: setup_irq failed for %s\n", __func__, 174 pr_err("%s: setup_irq failed for %s\n", __func__,
181 clockevent.name); 175 clockevent.name);
182 clockevents_register_device(&clockevent); 176 clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
177 4, 0xf0000000);
183} 178}
184 179
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 62ca575701d3..a350969e5efe 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -1,3 +1,30 @@
1config IRQCHIP
2 def_bool y
3 depends on OF_IRQ
4
5config ARM_GIC
6 bool
7 select IRQ_DOMAIN
8 select MULTI_IRQ_HANDLER
9
10config GIC_NON_BANKED
11 bool
12
13config ARM_VIC
14 bool
15 select IRQ_DOMAIN
16 select MULTI_IRQ_HANDLER
17
18config ARM_VIC_NR
19 int
20 default 4 if ARCH_S5PV210
21 default 3 if ARCH_S5PC100
22 default 2
23 depends on ARM_VIC
24 help
25 The maximum number of VICs available in the system, for
26 power management.
27
1config VERSATILE_FPGA_IRQ 28config VERSATILE_FPGA_IRQ
2 bool 29 bool
3 select IRQ_DOMAIN 30 select IRQ_DOMAIN
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index bf4609a5bd9d..0fb865574390 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -1,4 +1,8 @@
1obj-$(CONFIG_IRQCHIP) += irqchip.o
2
1obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o 3obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
2obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi.o 4obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi.o
3obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
4obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o 5obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o
6obj-$(CONFIG_ARM_GIC) += irq-gic.o
7obj-$(CONFIG_ARM_VIC) += irq-vic.o
8obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
diff --git a/arch/arm/common/gic.c b/drivers/irqchip/irq-gic.c
index 36ae03a3f5d1..69d9a395d54c 100644
--- a/arch/arm/common/gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -38,12 +38,14 @@
38#include <linux/interrupt.h> 38#include <linux/interrupt.h>
39#include <linux/percpu.h> 39#include <linux/percpu.h>
40#include <linux/slab.h> 40#include <linux/slab.h>
41#include <linux/irqchip/arm-gic.h>
41 42
42#include <asm/irq.h> 43#include <asm/irq.h>
43#include <asm/exception.h> 44#include <asm/exception.h>
44#include <asm/smp_plat.h> 45#include <asm/smp_plat.h>
45#include <asm/mach/irq.h> 46#include <asm/mach/irq.h>
46#include <asm/hardware/gic.h> 47
48#include "irqchip.h"
47 49
48union gic_base { 50union gic_base {
49 void __iomem *common_base; 51 void __iomem *common_base;
@@ -276,7 +278,7 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
276#define gic_set_wake NULL 278#define gic_set_wake NULL
277#endif 279#endif
278 280
279asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) 281static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
280{ 282{
281 u32 irqstat, irqnr; 283 u32 irqstat, irqnr;
282 struct gic_chip_data *gic = &gic_data[0]; 284 struct gic_chip_data *gic = &gic_data[0];
@@ -617,6 +619,27 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
617} 619}
618#endif 620#endif
619 621
622#ifdef CONFIG_SMP
623void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
624{
625 int cpu;
626 unsigned long map = 0;
627
628 /* Convert our logical CPU mask into a physical one. */
629 for_each_cpu(cpu, mask)
630 map |= 1 << cpu_logical_map(cpu);
631
632 /*
633 * Ensure that stores to Normal memory are visible to the
634 * other CPUs before issuing the IPI.
635 */
636 dsb();
637
638 /* this always happens on GIC0 */
639 writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
640}
641#endif
642
620static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, 643static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
621 irq_hw_number_t hw) 644 irq_hw_number_t hw)
622{ 645{
@@ -743,6 +766,12 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
743 if (WARN_ON(!gic->domain)) 766 if (WARN_ON(!gic->domain))
744 return; 767 return;
745 768
769#ifdef CONFIG_SMP
770 set_smp_cross_call(gic_raise_softirq);
771#endif
772
773 set_handle_irq(gic_handle_irq);
774
746 gic_chip.flags |= gic_arch_extn.flags; 775 gic_chip.flags |= gic_arch_extn.flags;
747 gic_dist_init(gic); 776 gic_dist_init(gic);
748 gic_cpu_init(gic); 777 gic_cpu_init(gic);
@@ -756,27 +785,6 @@ void __cpuinit gic_secondary_init(unsigned int gic_nr)
756 gic_cpu_init(&gic_data[gic_nr]); 785 gic_cpu_init(&gic_data[gic_nr]);
757} 786}
758 787
759#ifdef CONFIG_SMP
760void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
761{
762 int cpu;
763 unsigned long map = 0;
764
765 /* Convert our logical CPU mask into a physical one. */
766 for_each_cpu(cpu, mask)
767 map |= gic_cpu_map[cpu];
768
769 /*
770 * Ensure that stores to Normal memory are visible to the
771 * other CPUs before issuing the IPI.
772 */
773 dsb();
774
775 /* this always happens on GIC0 */
776 writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
777}
778#endif
779
780#ifdef CONFIG_OF 788#ifdef CONFIG_OF
781static int gic_cnt __initdata = 0; 789static int gic_cnt __initdata = 0;
782 790
@@ -808,4 +816,9 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
808 gic_cnt++; 816 gic_cnt++;
809 return 0; 817 return 0;
810} 818}
819IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init);
820IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init);
821IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init);
822IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);
823
811#endif 824#endif
diff --git a/arch/arm/common/vic.c b/drivers/irqchip/irq-vic.c
index 8f324b99416e..3cf97aaebe40 100644
--- a/arch/arm/common/vic.c
+++ b/drivers/irqchip/irq-vic.c
@@ -30,10 +30,29 @@
30#include <linux/syscore_ops.h> 30#include <linux/syscore_ops.h>
31#include <linux/device.h> 31#include <linux/device.h>
32#include <linux/amba/bus.h> 32#include <linux/amba/bus.h>
33#include <linux/irqchip/arm-vic.h>
33 34
34#include <asm/exception.h> 35#include <asm/exception.h>
35#include <asm/mach/irq.h> 36#include <asm/mach/irq.h>
36#include <asm/hardware/vic.h> 37
38#include "irqchip.h"
39
40#define VIC_IRQ_STATUS 0x00
41#define VIC_FIQ_STATUS 0x04
42#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */
43#define VIC_INT_SOFT 0x18
44#define VIC_INT_SOFT_CLEAR 0x1c
45#define VIC_PROTECT 0x20
46#define VIC_PL190_VECT_ADDR 0x30 /* PL190 only */
47#define VIC_PL190_DEF_VECT_ADDR 0x34 /* PL190 only */
48
49#define VIC_VECT_ADDR0 0x100 /* 0 to 15 (0..31 PL192) */
50#define VIC_VECT_CNTL0 0x200 /* 0 to 15 (0..31 PL192) */
51#define VIC_ITCR 0x300 /* VIC test control register */
52
53#define VIC_VECT_CNTL_ENABLE (1 << 5)
54
55#define VIC_PL192_VECT_ADDR 0xF00
37 56
38/** 57/**
39 * struct vic_device - VIC PM device 58 * struct vic_device - VIC PM device
@@ -66,6 +85,8 @@ static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
66 85
67static int vic_id; 86static int vic_id;
68 87
88static void vic_handle_irq(struct pt_regs *regs);
89
69/** 90/**
70 * vic_init2 - common initialisation code 91 * vic_init2 - common initialisation code
71 * @base: Base of the VIC. 92 * @base: Base of the VIC.
@@ -182,6 +203,40 @@ static int vic_irqdomain_map(struct irq_domain *d, unsigned int irq,
182 return 0; 203 return 0;
183} 204}
184 205
206/*
207 * Handle each interrupt in a single VIC. Returns non-zero if we've
208 * handled at least one interrupt. This reads the status register
209 * before handling each interrupt, which is necessary given that
210 * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
211 */
212static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
213{
214 u32 stat, irq;
215 int handled = 0;
216
217 while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
218 irq = ffs(stat) - 1;
219 handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
220 handled = 1;
221 }
222
223 return handled;
224}
225
226/*
227 * Keep iterating over all registered VIC's until there are no pending
228 * interrupts.
229 */
230static asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
231{
232 int i, handled;
233
234 do {
235 for (i = 0, handled = 0; i < vic_id; ++i)
236 handled |= handle_one_vic(&vic_devices[i], regs);
237 } while (handled);
238}
239
185static struct irq_domain_ops vic_irqdomain_ops = { 240static struct irq_domain_ops vic_irqdomain_ops = {
186 .map = vic_irqdomain_map, 241 .map = vic_irqdomain_map,
187 .xlate = irq_domain_xlate_onetwocell, 242 .xlate = irq_domain_xlate_onetwocell,
@@ -218,6 +273,7 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
218 v->valid_sources = valid_sources; 273 v->valid_sources = valid_sources;
219 v->resume_sources = resume_sources; 274 v->resume_sources = resume_sources;
220 v->irq = irq; 275 v->irq = irq;
276 set_handle_irq(vic_handle_irq);
221 vic_id++; 277 vic_id++;
222 v->domain = irq_domain_add_simple(node, fls(valid_sources), irq, 278 v->domain = irq_domain_add_simple(node, fls(valid_sources), irq,
223 &vic_irqdomain_ops, v); 279 &vic_irqdomain_ops, v);
@@ -427,38 +483,7 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
427 483
428 return 0; 484 return 0;
429} 485}
486IRQCHIP_DECLARE(arm_pl190_vic, "arm,pl190-vic", vic_of_init);
487IRQCHIP_DECLARE(arm_pl192_vic, "arm,pl192-vic", vic_of_init);
488IRQCHIP_DECLARE(arm_versatile_vic, "arm,versatile-vic", vic_of_init);
430#endif /* CONFIG OF */ 489#endif /* CONFIG OF */
431
432/*
433 * Handle each interrupt in a single VIC. Returns non-zero if we've
434 * handled at least one interrupt. This reads the status register
435 * before handling each interrupt, which is necessary given that
436 * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
437 */
438static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
439{
440 u32 stat, irq;
441 int handled = 0;
442
443 while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
444 irq = ffs(stat) - 1;
445 handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
446 handled = 1;
447 }
448
449 return handled;
450}
451
452/*
453 * Keep iterating over all registered VIC's until there are no pending
454 * interrupts.
455 */
456asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
457{
458 int i, handled;
459
460 do {
461 for (i = 0, handled = 0; i < vic_id; ++i)
462 handled |= handle_one_vic(&vic_devices[i], regs);
463 } while (handled);
464}
diff --git a/drivers/irqchip/irqchip.c b/drivers/irqchip/irqchip.c
new file mode 100644
index 000000000000..f496afce29de
--- /dev/null
+++ b/drivers/irqchip/irqchip.c
@@ -0,0 +1,30 @@
1/*
2 * Copyright (C) 2012 Thomas Petazzoni
3 *
4 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/init.h>
12#include <linux/of_irq.h>
13
14#include "irqchip.h"
15
16/*
17 * This special of_device_id is the sentinel at the end of the
18 * of_device_id[] array of all irqchips. It is automatically placed at
19 * the end of the array by the linker, thanks to being part of a
20 * special section.
21 */
22static const struct of_device_id
23irqchip_of_match_end __used __section(__irqchip_of_end);
24
25extern struct of_device_id __irqchip_begin[];
26
27void __init irqchip_init(void)
28{
29 of_irq_init(__irqchip_begin);
30}
diff --git a/drivers/irqchip/irqchip.h b/drivers/irqchip/irqchip.h
new file mode 100644
index 000000000000..e445ba2d6add
--- /dev/null
+++ b/drivers/irqchip/irqchip.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright (C) 2012 Thomas Petazzoni
3 *
4 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef _IRQCHIP_H
12#define _IRQCHIP_H
13
14/*
15 * This macro must be used by the different irqchip drivers to declare
16 * the association between their DT compatible string and their
17 * initialization function.
18 *
19 * @name: name that must be unique accross all IRQCHIP_DECLARE of the
20 * same file.
21 * @compstr: compatible string of the irqchip driver
22 * @fn: initialization function
23 */
24#define IRQCHIP_DECLARE(name,compstr,fn) \
25 static const struct of_device_id irqchip_of_match_##name \
26 __used __section(__irqchip_of_table) \
27 = { .compatible = compstr, .data = fn }
28
29#endif
diff --git a/drivers/irqchip/spear-shirq.c b/drivers/irqchip/spear-shirq.c
index 80e1d2fd9d4c..8527743b5cef 100644
--- a/drivers/irqchip/spear-shirq.c
+++ b/drivers/irqchip/spear-shirq.c
@@ -25,6 +25,8 @@
25#include <linux/of_irq.h> 25#include <linux/of_irq.h>
26#include <linux/spinlock.h> 26#include <linux/spinlock.h>
27 27
28#include "irqchip.h"
29
28static DEFINE_SPINLOCK(lock); 30static DEFINE_SPINLOCK(lock);
29 31
30/* spear300 shared irq registers offsets and masks */ 32/* spear300 shared irq registers offsets and masks */
@@ -300,6 +302,7 @@ int __init spear300_shirq_of_init(struct device_node *np,
300 return shirq_init(spear300_shirq_blocks, 302 return shirq_init(spear300_shirq_blocks,
301 ARRAY_SIZE(spear300_shirq_blocks), np); 303 ARRAY_SIZE(spear300_shirq_blocks), np);
302} 304}
305IRQCHIP_DECLARE(spear300_shirq, "st,spear300-shirq", spear300_shirq_of_init);
303 306
304int __init spear310_shirq_of_init(struct device_node *np, 307int __init spear310_shirq_of_init(struct device_node *np,
305 struct device_node *parent) 308 struct device_node *parent)
@@ -307,6 +310,7 @@ int __init spear310_shirq_of_init(struct device_node *np,
307 return shirq_init(spear310_shirq_blocks, 310 return shirq_init(spear310_shirq_blocks,
308 ARRAY_SIZE(spear310_shirq_blocks), np); 311 ARRAY_SIZE(spear310_shirq_blocks), np);
309} 312}
313IRQCHIP_DECLARE(spear310_shirq, "st,spear310-shirq", spear310_shirq_of_init);
310 314
311int __init spear320_shirq_of_init(struct device_node *np, 315int __init spear320_shirq_of_init(struct device_node *np,
312 struct device_node *parent) 316 struct device_node *parent)
@@ -314,3 +318,4 @@ int __init spear320_shirq_of_init(struct device_node *np,
314 return shirq_init(spear320_shirq_blocks, 318 return shirq_init(spear320_shirq_blocks,
315 ARRAY_SIZE(spear320_shirq_blocks), np); 319 ARRAY_SIZE(spear320_shirq_blocks), np);
316} 320}
321IRQCHIP_DECLARE(spear320_shirq, "st,spear320-shirq", spear320_shirq_of_init);
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 268f45d42394..6fbe1c96a404 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -26,13 +26,13 @@
26#include <linux/fs.h> 26#include <linux/fs.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/uaccess.h> 28#include <linux/uaccess.h>
29#include <linux/irqchip/arm-gic.h>
29#include <linux/mfd/core.h> 30#include <linux/mfd/core.h>
30#include <linux/mfd/dbx500-prcmu.h> 31#include <linux/mfd/dbx500-prcmu.h>
31#include <linux/mfd/abx500/ab8500.h> 32#include <linux/mfd/abx500/ab8500.h>
32#include <linux/regulator/db8500-prcmu.h> 33#include <linux/regulator/db8500-prcmu.h>
33#include <linux/regulator/machine.h> 34#include <linux/regulator/machine.h>
34#include <linux/cpufreq.h> 35#include <linux/cpufreq.h>
35#include <asm/hardware/gic.h>
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <mach/irqs.h> 37#include <mach/irqs.h>
38#include <mach/db8500-regs.h> 38#include <mach/db8500-regs.h>
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index d1ea7ce0b4cb..fc62ac5c6d4f 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -149,6 +149,24 @@
149#define TRACE_SYSCALLS() 149#define TRACE_SYSCALLS()
150#endif 150#endif
151 151
152#ifdef CONFIG_CLKSRC_OF
153#define CLKSRC_OF_TABLES() . = ALIGN(8); \
154 VMLINUX_SYMBOL(__clksrc_of_table) = .; \
155 *(__clksrc_of_table) \
156 *(__clksrc_of_table_end)
157#else
158#define CLKSRC_OF_TABLES()
159#endif
160
161#ifdef CONFIG_IRQCHIP
162#define IRQCHIP_OF_MATCH_TABLE() \
163 . = ALIGN(8); \
164 VMLINUX_SYMBOL(__irqchip_begin) = .; \
165 *(__irqchip_of_table) \
166 *(__irqchip_of_end)
167#else
168#define IRQCHIP_OF_MATCH_TABLE()
169#endif
152 170
153#define KERNEL_DTB() \ 171#define KERNEL_DTB() \
154 STRUCT_ALIGN(); \ 172 STRUCT_ALIGN(); \
@@ -493,7 +511,9 @@
493 DEV_DISCARD(init.rodata) \ 511 DEV_DISCARD(init.rodata) \
494 CPU_DISCARD(init.rodata) \ 512 CPU_DISCARD(init.rodata) \
495 MEM_DISCARD(init.rodata) \ 513 MEM_DISCARD(init.rodata) \
496 KERNEL_DTB() 514 CLKSRC_OF_TABLES() \
515 KERNEL_DTB() \
516 IRQCHIP_OF_MATCH_TABLE()
497 517
498#define INIT_TEXT \ 518#define INIT_TEXT \
499 *(.init.text) \ 519 *(.init.text) \
diff --git a/include/linux/bcm2835_timer.h b/include/linux/bcm2835_timer.h
index 25680fe0903c..ca17aa817006 100644
--- a/include/linux/bcm2835_timer.h
+++ b/include/linux/bcm2835_timer.h
@@ -17,6 +17,6 @@
17 17
18#include <asm/mach/time.h> 18#include <asm/mach/time.h>
19 19
20extern struct sys_timer bcm2835_timer; 20extern void bcm2835_timer_init(void);
21 21
22#endif 22#endif
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 4dceaf8ae152..7944f14ea947 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -332,4 +332,13 @@ extern int clocksource_mmio_init(void __iomem *, const char *,
332 332
333extern int clocksource_i8253_init(void); 333extern int clocksource_i8253_init(void);
334 334
335#ifdef CONFIG_CLKSRC_OF
336extern void clocksource_of_init(void);
337
338#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \
339 static const struct of_device_id __clksrc_of_table_##name \
340 __used __section(__clksrc_of_table) \
341 = { .compatible = compat, .data = fn };
342#endif
343
335#endif /* _LINUX_CLOCKSOURCE_H */ 344#endif /* _LINUX_CLOCKSOURCE_H */
diff --git a/include/linux/dw_apb_timer.h b/include/linux/dw_apb_timer.h
index 1148575fd134..dd755ce2a5eb 100644
--- a/include/linux/dw_apb_timer.h
+++ b/include/linux/dw_apb_timer.h
@@ -53,5 +53,5 @@ void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs);
53cycle_t dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs); 53cycle_t dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs);
54void dw_apb_clocksource_unregister(struct dw_apb_clocksource *dw_cs); 54void dw_apb_clocksource_unregister(struct dw_apb_clocksource *dw_cs);
55 55
56extern struct sys_timer dw_apb_timer; 56extern void dw_apb_timer_init(void);
57#endif /* __DW_APB_TIMER_H__ */ 57#endif /* __DW_APB_TIMER_H__ */
diff --git a/include/linux/irqchip.h b/include/linux/irqchip.h
new file mode 100644
index 000000000000..e0006f1d35a0
--- /dev/null
+++ b/include/linux/irqchip.h
@@ -0,0 +1,16 @@
1/*
2 * Copyright (C) 2012 Thomas Petazzoni
3 *
4 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef _LINUX_IRQCHIP_H
12#define _LINUX_IRQCHIP_H
13
14void irqchip_init(void);
15
16#endif
diff --git a/arch/arm/include/asm/hardware/gic.h b/include/linux/irqchip/arm-gic.h
index 4b1ce6cd477f..a67ca55e6f4e 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/include/asm/hardware/gic.h 2 * include/linux/irqchip/arm-gic.h
3 * 3 *
4 * Copyright (C) 2002 ARM Limited, All Rights Reserved. 4 * Copyright (C) 2002 ARM Limited, All Rights Reserved.
5 * 5 *
@@ -7,10 +7,8 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#ifndef __ASM_ARM_HARDWARE_GIC_H 10#ifndef __LINUX_IRQCHIP_ARM_GIC_H
11#define __ASM_ARM_HARDWARE_GIC_H 11#define __LINUX_IRQCHIP_ARM_GIC_H
12
13#include <linux/compiler.h>
14 12
15#define GIC_CPU_CTRL 0x00 13#define GIC_CPU_CTRL 0x00
16#define GIC_CPU_PRIMASK 0x04 14#define GIC_CPU_PRIMASK 0x04
@@ -32,19 +30,14 @@
32#define GIC_DIST_CONFIG 0xc00 30#define GIC_DIST_CONFIG 0xc00
33#define GIC_DIST_SOFTINT 0xf00 31#define GIC_DIST_SOFTINT 0xf00
34 32
35#ifndef __ASSEMBLY__
36#include <linux/irqdomain.h>
37struct device_node; 33struct device_node;
38 34
39extern struct irq_chip gic_arch_extn; 35extern struct irq_chip gic_arch_extn;
40 36
41void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, 37void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
42 u32 offset, struct device_node *); 38 u32 offset, struct device_node *);
43int gic_of_init(struct device_node *node, struct device_node *parent);
44void gic_secondary_init(unsigned int); 39void gic_secondary_init(unsigned int);
45void gic_handle_irq(struct pt_regs *regs);
46void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); 40void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
47void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
48 41
49static inline void gic_init(unsigned int nr, int start, 42static inline void gic_init(unsigned int nr, int start,
50 void __iomem *dist , void __iomem *cpu) 43 void __iomem *dist , void __iomem *cpu)
@@ -53,5 +46,3 @@ static inline void gic_init(unsigned int nr, int start,
53} 46}
54 47
55#endif 48#endif
56
57#endif
diff --git a/arch/arm/include/asm/hardware/vic.h b/include/linux/irqchip/arm-vic.h
index 2bebad36fc83..e3c82dc95756 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/include/linux/irqchip/arm-vic.h
@@ -20,29 +20,11 @@
20#ifndef __ASM_ARM_HARDWARE_VIC_H 20#ifndef __ASM_ARM_HARDWARE_VIC_H
21#define __ASM_ARM_HARDWARE_VIC_H 21#define __ASM_ARM_HARDWARE_VIC_H
22 22
23#define VIC_IRQ_STATUS 0x00 23#include <linux/types.h>
24#define VIC_FIQ_STATUS 0x04 24
25#define VIC_RAW_STATUS 0x08 25#define VIC_RAW_STATUS 0x08
26#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */
27#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */ 26#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */
28#define VIC_INT_ENABLE_CLEAR 0x14 27#define VIC_INT_ENABLE_CLEAR 0x14
29#define VIC_INT_SOFT 0x18
30#define VIC_INT_SOFT_CLEAR 0x1c
31#define VIC_PROTECT 0x20
32#define VIC_PL190_VECT_ADDR 0x30 /* PL190 only */
33#define VIC_PL190_DEF_VECT_ADDR 0x34 /* PL190 only */
34
35#define VIC_VECT_ADDR0 0x100 /* 0 to 15 (0..31 PL192) */
36#define VIC_VECT_CNTL0 0x200 /* 0 to 15 (0..31 PL192) */
37#define VIC_ITCR 0x300 /* VIC test control register */
38
39#define VIC_VECT_CNTL_ENABLE (1 << 5)
40
41#define VIC_PL192_VECT_ADDR 0xF00
42
43#ifndef __ASSEMBLY__
44#include <linux/compiler.h>
45#include <linux/types.h>
46 28
47struct device_node; 29struct device_node;
48struct pt_regs; 30struct pt_regs;
@@ -50,8 +32,5 @@ struct pt_regs;
50void __vic_init(void __iomem *base, int irq_start, u32 vic_sources, 32void __vic_init(void __iomem *base, int irq_start, u32 vic_sources,
51 u32 resume_sources, struct device_node *node); 33 u32 resume_sources, struct device_node *node);
52void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); 34void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
53int vic_of_init(struct device_node *node, struct device_node *parent);
54void vic_handle_irq(struct pt_regs *regs);
55 35
56#endif /* __ASSEMBLY__ */
57#endif 36#endif
diff --git a/include/linux/sunxi_timer.h b/include/linux/sunxi_timer.h
index b9165bba6e61..18081787e5f3 100644
--- a/include/linux/sunxi_timer.h
+++ b/include/linux/sunxi_timer.h
@@ -19,6 +19,6 @@
19 19
20#include <asm/mach/time.h> 20#include <asm/mach/time.h>
21 21
22extern struct sys_timer sunxi_timer; 22void sunxi_timer_init(void);
23 23
24#endif 24#endif
diff --git a/include/linux/time.h b/include/linux/time.h
index 4d358e9d10f1..05e32a72103c 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -142,9 +142,7 @@ void timekeeping_inject_sleeptime(struct timespec *delta);
142 * finer then tick granular time. 142 * finer then tick granular time.
143 */ 143 */
144#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET 144#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
145extern u32 arch_gettimeoffset(void); 145extern u32 (*arch_gettimeoffset)(void);
146#else
147static inline u32 arch_gettimeoffset(void) { return 0; }
148#endif 146#endif
149 147
150extern void do_gettimeofday(struct timeval *tv); 148extern void do_gettimeofday(struct timeval *tv);
diff --git a/arch/arm/mach-vt8500/include/mach/timex.h b/include/linux/vt8500_timer.h
index 8487e4c690b7..33b0ee87d083 100644
--- a/arch/arm/mach-vt8500/include/mach/timex.h
+++ b/include/linux/vt8500_timer.h
@@ -1,7 +1,5 @@
1/* 1/*
2 * arch/arm/mach-vt8500/include/mach/timex.h 2 * Copyright 2012 Tony Prisk <linux@prisktech.co.nz>
3 *
4 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
5 * 3 *
6 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 5 * it under the terms of the GNU General Public License as published by
@@ -12,15 +10,13 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 12 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 13 */
20 14
21#ifndef MACH_TIMEX_H 15#ifndef __VT8500_TIMER_H
22#define MACH_TIMEX_H 16#define __VT8500_TIMER_H
17
18#include <asm/mach/time.h>
23 19
24#define CLOCK_TICK_RATE (3000000) 20void vt8500_timer_init(void);
25 21
26#endif /* MACH_TIMEX_H */ 22#endif
diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c
index 30b6de0d977c..c6d6400ee137 100644
--- a/kernel/time/clockevents.c
+++ b/kernel/time/clockevents.c
@@ -339,6 +339,7 @@ void clockevents_config_and_register(struct clock_event_device *dev,
339 clockevents_config(dev, freq); 339 clockevents_config(dev, freq);
340 clockevents_register_device(dev); 340 clockevents_register_device(dev);
341} 341}
342EXPORT_SYMBOL_GPL(clockevents_config_and_register);
342 343
343/** 344/**
344 * clockevents_update_freq - Update frequency and reprogram a clock event device. 345 * clockevents_update_freq - Update frequency and reprogram a clock event device.
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index cbc6acb0db3f..8ed934601587 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -135,6 +135,20 @@ static void tk_setup_internals(struct timekeeper *tk, struct clocksource *clock)
135} 135}
136 136
137/* Timekeeper helper functions. */ 137/* Timekeeper helper functions. */
138
139#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
140u32 (*arch_gettimeoffset)(void);
141
142u32 get_arch_timeoffset(void)
143{
144 if (likely(arch_gettimeoffset))
145 return arch_gettimeoffset();
146 return 0;
147}
148#else
149static inline u32 get_arch_timeoffset(void) { return 0; }
150#endif
151
138static inline s64 timekeeping_get_ns(struct timekeeper *tk) 152static inline s64 timekeeping_get_ns(struct timekeeper *tk)
139{ 153{
140 cycle_t cycle_now, cycle_delta; 154 cycle_t cycle_now, cycle_delta;
@@ -151,8 +165,8 @@ static inline s64 timekeeping_get_ns(struct timekeeper *tk)
151 nsec = cycle_delta * tk->mult + tk->xtime_nsec; 165 nsec = cycle_delta * tk->mult + tk->xtime_nsec;
152 nsec >>= tk->shift; 166 nsec >>= tk->shift;
153 167
154 /* If arch requires, add in gettimeoffset() */ 168 /* If arch requires, add in get_arch_timeoffset() */
155 return nsec + arch_gettimeoffset(); 169 return nsec + get_arch_timeoffset();
156} 170}
157 171
158static inline s64 timekeeping_get_ns_raw(struct timekeeper *tk) 172static inline s64 timekeeping_get_ns_raw(struct timekeeper *tk)
@@ -171,8 +185,8 @@ static inline s64 timekeeping_get_ns_raw(struct timekeeper *tk)
171 /* convert delta to nanoseconds. */ 185 /* convert delta to nanoseconds. */
172 nsec = clocksource_cyc2ns(cycle_delta, clock->mult, clock->shift); 186 nsec = clocksource_cyc2ns(cycle_delta, clock->mult, clock->shift);
173 187
174 /* If arch requires, add in gettimeoffset() */ 188 /* If arch requires, add in get_arch_timeoffset() */
175 return nsec + arch_gettimeoffset(); 189 return nsec + get_arch_timeoffset();
176} 190}
177 191
178static RAW_NOTIFIER_HEAD(pvclock_gtod_chain); 192static RAW_NOTIFIER_HEAD(pvclock_gtod_chain);
@@ -254,8 +268,8 @@ static void timekeeping_forward_now(struct timekeeper *tk)
254 268
255 tk->xtime_nsec += cycle_delta * tk->mult; 269 tk->xtime_nsec += cycle_delta * tk->mult;
256 270
257 /* If arch requires, add in gettimeoffset() */ 271 /* If arch requires, add in get_arch_timeoffset() */
258 tk->xtime_nsec += (u64)arch_gettimeoffset() << tk->shift; 272 tk->xtime_nsec += (u64)get_arch_timeoffset() << tk->shift;
259 273
260 tk_normalize_xtime(tk); 274 tk_normalize_xtime(tk);
261 275