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-rw-r--r--arch/arm/boot/dts/imx23.dtsi1
-rw-r--r--arch/arm/boot/dts/imx28.dtsi1
-rw-r--r--drivers/clk/mxs/clk-imx23.c26
-rw-r--r--drivers/clk/mxs/clk-imx28.c25
4 files changed, 37 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 27ce8070e187..8d37aa7430a3 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -295,6 +295,7 @@
295 }; 295 };
296 296
297 digctl@8001c000 { 297 digctl@8001c000 {
298 compatible = "fsl,imx23-digctl";
298 reg = <0x8001c000 2000>; 299 reg = <0x8001c000 2000>;
299 status = "disabled"; 300 status = "disabled";
300 }; 301 };
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index c2f10d381f03..d306ff55e30f 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -647,6 +647,7 @@
647 }; 647 };
648 648
649 digctl@8001c000 { 649 digctl@8001c000 {
650 compatible = "fsl,imx28-digctl";
650 reg = <0x8001c000 0x2000>; 651 reg = <0x8001c000 0x2000>;
651 interrupts = <89>; 652 interrupts = <89>;
652 status = "disabled"; 653 status = "disabled";
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index 46ae6bebe445..0c8fda48d0a2 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -15,11 +15,16 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/of.h> 17#include <linux/of.h>
18#include <linux/of_address.h>
18#include <mach/mx23.h> 19#include <mach/mx23.h>
19#include "clk.h" 20#include "clk.h"
20 21
21#define DIGCTRL MX23_IO_ADDRESS(MX23_DIGCTL_BASE_ADDR) 22static void __iomem *clkctrl;
22#define CLKCTRL MX23_IO_ADDRESS(MX23_CLKCTRL_BASE_ADDR) 23static void __iomem *digctrl;
24
25#define CLKCTRL clkctrl
26#define DIGCTRL digctrl
27
23#define PLLCTRL0 (CLKCTRL + 0x0000) 28#define PLLCTRL0 (CLKCTRL + 0x0000)
24#define CPU (CLKCTRL + 0x0020) 29#define CPU (CLKCTRL + 0x0020)
25#define HBUS (CLKCTRL + 0x0030) 30#define HBUS (CLKCTRL + 0x0030)
@@ -100,6 +105,14 @@ int __init mx23_clocks_init(void)
100 struct device_node *np; 105 struct device_node *np;
101 u32 i; 106 u32 i;
102 107
108 np = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl");
109 digctrl = of_iomap(np, 0);
110 WARN_ON(!digctrl);
111
112 np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl");
113 clkctrl = of_iomap(np, 0);
114 WARN_ON(!clkctrl);
115
103 clk_misc_init(); 116 clk_misc_init();
104 117
105 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); 118 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);
@@ -152,12 +165,9 @@ int __init mx23_clocks_init(void)
152 return PTR_ERR(clks[i]); 165 return PTR_ERR(clks[i]);
153 } 166 }
154 167
155 np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl"); 168 clk_data.clks = clks;
156 if (np) { 169 clk_data.clk_num = ARRAY_SIZE(clks);
157 clk_data.clks = clks; 170 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
158 clk_data.clk_num = ARRAY_SIZE(clks);
159 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
160 }
161 171
162 for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) 172 for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
163 clk_prepare_enable(clks[clks_init_on[i]]); 173 clk_prepare_enable(clks[clks_init_on[i]]);
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index fb30cd92b234..f623fdd93b46 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -15,10 +15,13 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/of.h> 17#include <linux/of.h>
18#include <linux/of_address.h>
18#include <mach/mx28.h> 19#include <mach/mx28.h>
19#include "clk.h" 20#include "clk.h"
20 21
21#define CLKCTRL MX28_IO_ADDRESS(MX28_CLKCTRL_BASE_ADDR) 22static void __iomem *clkctrl;
23#define CLKCTRL clkctrl
24
22#define PLL0CTRL0 (CLKCTRL + 0x0000) 25#define PLL0CTRL0 (CLKCTRL + 0x0000)
23#define PLL1CTRL0 (CLKCTRL + 0x0020) 26#define PLL1CTRL0 (CLKCTRL + 0x0020)
24#define PLL2CTRL0 (CLKCTRL + 0x0040) 27#define PLL2CTRL0 (CLKCTRL + 0x0040)
@@ -52,7 +55,8 @@
52#define BP_FRAC0_IO1FRAC 16 55#define BP_FRAC0_IO1FRAC 16
53#define BP_FRAC0_IO0FRAC 24 56#define BP_FRAC0_IO0FRAC 24
54 57
55#define DIGCTRL MX28_IO_ADDRESS(MX28_DIGCTL_BASE_ADDR) 58static void __iomem *digctrl;
59#define DIGCTRL digctrl
56#define BP_SAIF_CLKMUX 10 60#define BP_SAIF_CLKMUX 10
57 61
58/* 62/*
@@ -155,6 +159,14 @@ int __init mx28_clocks_init(void)
155 struct device_node *np; 159 struct device_node *np;
156 u32 i; 160 u32 i;
157 161
162 np = of_find_compatible_node(NULL, NULL, "fsl,imx28-digctl");
163 digctrl = of_iomap(np, 0);
164 WARN_ON(!digctrl);
165
166 np = of_find_compatible_node(NULL, NULL, "fsl,imx28-clkctrl");
167 clkctrl = of_iomap(np, 0);
168 WARN_ON(!clkctrl);
169
158 clk_misc_init(); 170 clk_misc_init();
159 171
160 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); 172 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);
@@ -230,12 +242,9 @@ int __init mx28_clocks_init(void)
230 return PTR_ERR(clks[i]); 242 return PTR_ERR(clks[i]);
231 } 243 }
232 244
233 np = of_find_compatible_node(NULL, NULL, "fsl,imx28-clkctrl"); 245 clk_data.clks = clks;
234 if (np) { 246 clk_data.clk_num = ARRAY_SIZE(clks);
235 clk_data.clks = clks; 247 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
236 clk_data.clk_num = ARRAY_SIZE(clks);
237 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
238 }
239 248
240 clk_register_clkdev(clks[enet_out], NULL, "enet_out"); 249 clk_register_clkdev(clks[enet_out], NULL, "enet_out");
241 250