diff options
-rw-r--r-- | Documentation/devicetree/bindings/spi/omap-spi.txt | 4 | ||||
-rw-r--r-- | drivers/spi/spi-bcm63xx.c | 16 | ||||
-rw-r--r-- | drivers/spi/spi-omap2-mcspi.c | 25 | ||||
-rw-r--r-- | drivers/spi/spi-pl022.c | 52 | ||||
-rw-r--r-- | drivers/spi/spi-s3c64xx.c | 32 | ||||
-rw-r--r-- | include/linux/platform_data/spi-omap2-mcspi.h | 4 |
6 files changed, 83 insertions, 50 deletions
diff --git a/Documentation/devicetree/bindings/spi/omap-spi.txt b/Documentation/devicetree/bindings/spi/omap-spi.txt index 81df374adbb9..2ef0a6b85653 100644 --- a/Documentation/devicetree/bindings/spi/omap-spi.txt +++ b/Documentation/devicetree/bindings/spi/omap-spi.txt | |||
@@ -6,7 +6,9 @@ Required properties: | |||
6 | - "ti,omap4-spi" for OMAP4+. | 6 | - "ti,omap4-spi" for OMAP4+. |
7 | - ti,spi-num-cs : Number of chipselect supported by the instance. | 7 | - ti,spi-num-cs : Number of chipselect supported by the instance. |
8 | - ti,hwmods: Name of the hwmod associated to the McSPI | 8 | - ti,hwmods: Name of the hwmod associated to the McSPI |
9 | 9 | - ti,pindir-d0-in-d1-out: Select the D0 pin as input and D1 as | |
10 | output. The default is D0 as output and | ||
11 | D1 as input. | ||
10 | 12 | ||
11 | Example: | 13 | Example: |
12 | 14 | ||
diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c index a9f4049c6769..6d97047d9242 100644 --- a/drivers/spi/spi-bcm63xx.c +++ b/drivers/spi/spi-bcm63xx.c | |||
@@ -36,7 +36,6 @@ | |||
36 | #include <bcm63xx_dev_spi.h> | 36 | #include <bcm63xx_dev_spi.h> |
37 | 37 | ||
38 | #define PFX KBUILD_MODNAME | 38 | #define PFX KBUILD_MODNAME |
39 | #define DRV_VER "0.1.2" | ||
40 | 39 | ||
41 | struct bcm63xx_spi { | 40 | struct bcm63xx_spi { |
42 | struct completion done; | 41 | struct completion done; |
@@ -170,13 +169,6 @@ static int bcm63xx_spi_setup(struct spi_device *spi) | |||
170 | return -EINVAL; | 169 | return -EINVAL; |
171 | } | 170 | } |
172 | 171 | ||
173 | ret = bcm63xx_spi_check_transfer(spi, NULL); | ||
174 | if (ret < 0) { | ||
175 | dev_err(&spi->dev, "setup: unsupported mode bits %x\n", | ||
176 | spi->mode & ~MODEBITS); | ||
177 | return ret; | ||
178 | } | ||
179 | |||
180 | dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n", | 172 | dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n", |
181 | __func__, spi->mode & MODEBITS, spi->bits_per_word, 0); | 173 | __func__, spi->mode & MODEBITS, spi->bits_per_word, 0); |
182 | 174 | ||
@@ -441,8 +433,8 @@ static int __devinit bcm63xx_spi_probe(struct platform_device *pdev) | |||
441 | goto out_clk_disable; | 433 | goto out_clk_disable; |
442 | } | 434 | } |
443 | 435 | ||
444 | dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d) v%s\n", | 436 | dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d)\n", |
445 | r->start, irq, bs->fifo_size, DRV_VER); | 437 | r->start, irq, bs->fifo_size); |
446 | 438 | ||
447 | return 0; | 439 | return 0; |
448 | 440 | ||
@@ -485,6 +477,8 @@ static int bcm63xx_spi_suspend(struct device *dev) | |||
485 | platform_get_drvdata(to_platform_device(dev)); | 477 | platform_get_drvdata(to_platform_device(dev)); |
486 | struct bcm63xx_spi *bs = spi_master_get_devdata(master); | 478 | struct bcm63xx_spi *bs = spi_master_get_devdata(master); |
487 | 479 | ||
480 | spi_master_suspend(master); | ||
481 | |||
488 | clk_disable(bs->clk); | 482 | clk_disable(bs->clk); |
489 | 483 | ||
490 | return 0; | 484 | return 0; |
@@ -498,6 +492,8 @@ static int bcm63xx_spi_resume(struct device *dev) | |||
498 | 492 | ||
499 | clk_enable(bs->clk); | 493 | clk_enable(bs->clk); |
500 | 494 | ||
495 | spi_master_resume(master); | ||
496 | |||
501 | return 0; | 497 | return 0; |
502 | } | 498 | } |
503 | 499 | ||
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 3542fdc664b1..51046332677c 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c | |||
@@ -130,6 +130,7 @@ struct omap2_mcspi { | |||
130 | struct omap2_mcspi_dma *dma_channels; | 130 | struct omap2_mcspi_dma *dma_channels; |
131 | struct device *dev; | 131 | struct device *dev; |
132 | struct omap2_mcspi_regs ctx; | 132 | struct omap2_mcspi_regs ctx; |
133 | unsigned int pin_dir:1; | ||
133 | }; | 134 | }; |
134 | 135 | ||
135 | struct omap2_mcspi_cs { | 136 | struct omap2_mcspi_cs { |
@@ -765,8 +766,15 @@ static int omap2_mcspi_setup_transfer(struct spi_device *spi, | |||
765 | /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS | 766 | /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS |
766 | * REVISIT: this controller could support SPI_3WIRE mode. | 767 | * REVISIT: this controller could support SPI_3WIRE mode. |
767 | */ | 768 | */ |
768 | l &= ~(OMAP2_MCSPI_CHCONF_IS|OMAP2_MCSPI_CHCONF_DPE1); | 769 | if (mcspi->pin_dir == MCSPI_PINDIR_D0_OUT_D1_IN) { |
769 | l |= OMAP2_MCSPI_CHCONF_DPE0; | 770 | l &= ~OMAP2_MCSPI_CHCONF_IS; |
771 | l &= ~OMAP2_MCSPI_CHCONF_DPE1; | ||
772 | l |= OMAP2_MCSPI_CHCONF_DPE0; | ||
773 | } else { | ||
774 | l |= OMAP2_MCSPI_CHCONF_IS; | ||
775 | l |= OMAP2_MCSPI_CHCONF_DPE1; | ||
776 | l &= ~OMAP2_MCSPI_CHCONF_DPE0; | ||
777 | } | ||
770 | 778 | ||
771 | /* wordlength */ | 779 | /* wordlength */ |
772 | l &= ~OMAP2_MCSPI_CHCONF_WL_MASK; | 780 | l &= ~OMAP2_MCSPI_CHCONF_WL_MASK; |
@@ -1167,6 +1175,11 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev) | |||
1167 | master->cleanup = omap2_mcspi_cleanup; | 1175 | master->cleanup = omap2_mcspi_cleanup; |
1168 | master->dev.of_node = node; | 1176 | master->dev.of_node = node; |
1169 | 1177 | ||
1178 | dev_set_drvdata(&pdev->dev, master); | ||
1179 | |||
1180 | mcspi = spi_master_get_devdata(master); | ||
1181 | mcspi->master = master; | ||
1182 | |||
1170 | match = of_match_device(omap_mcspi_of_match, &pdev->dev); | 1183 | match = of_match_device(omap_mcspi_of_match, &pdev->dev); |
1171 | if (match) { | 1184 | if (match) { |
1172 | u32 num_cs = 1; /* default number of chipselect */ | 1185 | u32 num_cs = 1; /* default number of chipselect */ |
@@ -1175,19 +1188,17 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev) | |||
1175 | of_property_read_u32(node, "ti,spi-num-cs", &num_cs); | 1188 | of_property_read_u32(node, "ti,spi-num-cs", &num_cs); |
1176 | master->num_chipselect = num_cs; | 1189 | master->num_chipselect = num_cs; |
1177 | master->bus_num = bus_num++; | 1190 | master->bus_num = bus_num++; |
1191 | if (of_get_property(node, "ti,pindir-d0-in-d1-out", NULL)) | ||
1192 | mcspi->pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT; | ||
1178 | } else { | 1193 | } else { |
1179 | pdata = pdev->dev.platform_data; | 1194 | pdata = pdev->dev.platform_data; |
1180 | master->num_chipselect = pdata->num_cs; | 1195 | master->num_chipselect = pdata->num_cs; |
1181 | if (pdev->id != -1) | 1196 | if (pdev->id != -1) |
1182 | master->bus_num = pdev->id; | 1197 | master->bus_num = pdev->id; |
1198 | mcspi->pin_dir = pdata->pin_dir; | ||
1183 | } | 1199 | } |
1184 | regs_offset = pdata->regs_offset; | 1200 | regs_offset = pdata->regs_offset; |
1185 | 1201 | ||
1186 | dev_set_drvdata(&pdev->dev, master); | ||
1187 | |||
1188 | mcspi = spi_master_get_devdata(master); | ||
1189 | mcspi->master = master; | ||
1190 | |||
1191 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1202 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1192 | if (r == NULL) { | 1203 | if (r == NULL) { |
1193 | status = -ENODEV; | 1204 | status = -ENODEV; |
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c index a1db91a99b89..1361868fced7 100644 --- a/drivers/spi/spi-pl022.c +++ b/drivers/spi/spi-pl022.c | |||
@@ -371,6 +371,7 @@ struct pl022 { | |||
371 | /* Two optional pin states - default & sleep */ | 371 | /* Two optional pin states - default & sleep */ |
372 | struct pinctrl *pinctrl; | 372 | struct pinctrl *pinctrl; |
373 | struct pinctrl_state *pins_default; | 373 | struct pinctrl_state *pins_default; |
374 | struct pinctrl_state *pins_idle; | ||
374 | struct pinctrl_state *pins_sleep; | 375 | struct pinctrl_state *pins_sleep; |
375 | struct spi_master *master; | 376 | struct spi_master *master; |
376 | struct pl022_ssp_controller *master_info; | 377 | struct pl022_ssp_controller *master_info; |
@@ -2116,6 +2117,11 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id) | |||
2116 | } else | 2117 | } else |
2117 | dev_err(dev, "could not get default pinstate\n"); | 2118 | dev_err(dev, "could not get default pinstate\n"); |
2118 | 2119 | ||
2120 | pl022->pins_idle = pinctrl_lookup_state(pl022->pinctrl, | ||
2121 | PINCTRL_STATE_IDLE); | ||
2122 | if (IS_ERR(pl022->pins_idle)) | ||
2123 | dev_dbg(dev, "could not get idle pinstate\n"); | ||
2124 | |||
2119 | pl022->pins_sleep = pinctrl_lookup_state(pl022->pinctrl, | 2125 | pl022->pins_sleep = pinctrl_lookup_state(pl022->pinctrl, |
2120 | PINCTRL_STATE_SLEEP); | 2126 | PINCTRL_STATE_SLEEP); |
2121 | if (IS_ERR(pl022->pins_sleep)) | 2127 | if (IS_ERR(pl022->pins_sleep)) |
@@ -2246,10 +2252,9 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id) | |||
2246 | pm_runtime_set_autosuspend_delay(dev, | 2252 | pm_runtime_set_autosuspend_delay(dev, |
2247 | platform_info->autosuspend_delay); | 2253 | platform_info->autosuspend_delay); |
2248 | pm_runtime_use_autosuspend(dev); | 2254 | pm_runtime_use_autosuspend(dev); |
2249 | pm_runtime_put_autosuspend(dev); | ||
2250 | } else { | ||
2251 | pm_runtime_put(dev); | ||
2252 | } | 2255 | } |
2256 | pm_runtime_put(dev); | ||
2257 | |||
2253 | return 0; | 2258 | return 0; |
2254 | 2259 | ||
2255 | err_spi_register: | 2260 | err_spi_register: |
@@ -2303,35 +2308,47 @@ pl022_remove(struct amba_device *adev) | |||
2303 | * the runtime counterparts to handle external resources like | 2308 | * the runtime counterparts to handle external resources like |
2304 | * clocks, pins and regulators when going to sleep. | 2309 | * clocks, pins and regulators when going to sleep. |
2305 | */ | 2310 | */ |
2306 | static void pl022_suspend_resources(struct pl022 *pl022) | 2311 | static void pl022_suspend_resources(struct pl022 *pl022, bool runtime) |
2307 | { | 2312 | { |
2308 | int ret; | 2313 | int ret; |
2314 | struct pinctrl_state *pins_state; | ||
2309 | 2315 | ||
2310 | clk_disable(pl022->clk); | 2316 | clk_disable(pl022->clk); |
2311 | 2317 | ||
2318 | pins_state = runtime ? pl022->pins_idle : pl022->pins_sleep; | ||
2312 | /* Optionally let pins go into sleep states */ | 2319 | /* Optionally let pins go into sleep states */ |
2313 | if (!IS_ERR(pl022->pins_sleep)) { | 2320 | if (!IS_ERR(pins_state)) { |
2314 | ret = pinctrl_select_state(pl022->pinctrl, | 2321 | ret = pinctrl_select_state(pl022->pinctrl, pins_state); |
2315 | pl022->pins_sleep); | ||
2316 | if (ret) | 2322 | if (ret) |
2317 | dev_err(&pl022->adev->dev, | 2323 | dev_err(&pl022->adev->dev, "could not set %s pins\n", |
2318 | "could not set pins to sleep state\n"); | 2324 | runtime ? "idle" : "sleep"); |
2319 | } | 2325 | } |
2320 | } | 2326 | } |
2321 | 2327 | ||
2322 | static void pl022_resume_resources(struct pl022 *pl022) | 2328 | static void pl022_resume_resources(struct pl022 *pl022, bool runtime) |
2323 | { | 2329 | { |
2324 | int ret; | 2330 | int ret; |
2325 | 2331 | ||
2326 | /* Optionaly enable pins to be muxed in and configured */ | 2332 | /* Optionaly enable pins to be muxed in and configured */ |
2333 | /* First go to the default state */ | ||
2327 | if (!IS_ERR(pl022->pins_default)) { | 2334 | if (!IS_ERR(pl022->pins_default)) { |
2328 | ret = pinctrl_select_state(pl022->pinctrl, | 2335 | ret = pinctrl_select_state(pl022->pinctrl, pl022->pins_default); |
2329 | pl022->pins_default); | ||
2330 | if (ret) | 2336 | if (ret) |
2331 | dev_err(&pl022->adev->dev, | 2337 | dev_err(&pl022->adev->dev, |
2332 | "could not set default pins\n"); | 2338 | "could not set default pins\n"); |
2333 | } | 2339 | } |
2334 | 2340 | ||
2341 | if (!runtime) { | ||
2342 | /* Then let's idle the pins until the next transfer happens */ | ||
2343 | if (!IS_ERR(pl022->pins_idle)) { | ||
2344 | ret = pinctrl_select_state(pl022->pinctrl, | ||
2345 | pl022->pins_idle); | ||
2346 | if (ret) | ||
2347 | dev_err(&pl022->adev->dev, | ||
2348 | "could not set idle pins\n"); | ||
2349 | } | ||
2350 | } | ||
2351 | |||
2335 | clk_enable(pl022->clk); | 2352 | clk_enable(pl022->clk); |
2336 | } | 2353 | } |
2337 | #endif | 2354 | #endif |
@@ -2347,7 +2364,9 @@ static int pl022_suspend(struct device *dev) | |||
2347 | dev_warn(dev, "cannot suspend master\n"); | 2364 | dev_warn(dev, "cannot suspend master\n"); |
2348 | return ret; | 2365 | return ret; |
2349 | } | 2366 | } |
2350 | pl022_suspend_resources(pl022); | 2367 | |
2368 | pm_runtime_get_sync(dev); | ||
2369 | pl022_suspend_resources(pl022, false); | ||
2351 | 2370 | ||
2352 | dev_dbg(dev, "suspended\n"); | 2371 | dev_dbg(dev, "suspended\n"); |
2353 | return 0; | 2372 | return 0; |
@@ -2358,7 +2377,8 @@ static int pl022_resume(struct device *dev) | |||
2358 | struct pl022 *pl022 = dev_get_drvdata(dev); | 2377 | struct pl022 *pl022 = dev_get_drvdata(dev); |
2359 | int ret; | 2378 | int ret; |
2360 | 2379 | ||
2361 | pl022_resume_resources(pl022); | 2380 | pl022_resume_resources(pl022, false); |
2381 | pm_runtime_put(dev); | ||
2362 | 2382 | ||
2363 | /* Start the queue running */ | 2383 | /* Start the queue running */ |
2364 | ret = spi_master_resume(pl022->master); | 2384 | ret = spi_master_resume(pl022->master); |
@@ -2376,7 +2396,7 @@ static int pl022_runtime_suspend(struct device *dev) | |||
2376 | { | 2396 | { |
2377 | struct pl022 *pl022 = dev_get_drvdata(dev); | 2397 | struct pl022 *pl022 = dev_get_drvdata(dev); |
2378 | 2398 | ||
2379 | pl022_suspend_resources(pl022); | 2399 | pl022_suspend_resources(pl022, true); |
2380 | return 0; | 2400 | return 0; |
2381 | } | 2401 | } |
2382 | 2402 | ||
@@ -2384,7 +2404,7 @@ static int pl022_runtime_resume(struct device *dev) | |||
2384 | { | 2404 | { |
2385 | struct pl022 *pl022 = dev_get_drvdata(dev); | 2405 | struct pl022 *pl022 = dev_get_drvdata(dev); |
2386 | 2406 | ||
2387 | pl022_resume_resources(pl022); | 2407 | pl022_resume_resources(pl022, true); |
2388 | return 0; | 2408 | return 0; |
2389 | } | 2409 | } |
2390 | #endif | 2410 | #endif |
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 6e7a805d324d..01b2f56a852e 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c | |||
@@ -516,7 +516,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) | |||
516 | 516 | ||
517 | /* Disable Clock */ | 517 | /* Disable Clock */ |
518 | if (sdd->port_conf->clk_from_cmu) { | 518 | if (sdd->port_conf->clk_from_cmu) { |
519 | clk_disable(sdd->src_clk); | 519 | clk_disable_unprepare(sdd->src_clk); |
520 | } else { | 520 | } else { |
521 | val = readl(regs + S3C64XX_SPI_CLK_CFG); | 521 | val = readl(regs + S3C64XX_SPI_CLK_CFG); |
522 | val &= ~S3C64XX_SPI_ENCLK_ENABLE; | 522 | val &= ~S3C64XX_SPI_ENCLK_ENABLE; |
@@ -564,7 +564,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) | |||
564 | /* There is half-multiplier before the SPI */ | 564 | /* There is half-multiplier before the SPI */ |
565 | clk_set_rate(sdd->src_clk, sdd->cur_speed * 2); | 565 | clk_set_rate(sdd->src_clk, sdd->cur_speed * 2); |
566 | /* Enable Clock */ | 566 | /* Enable Clock */ |
567 | clk_enable(sdd->src_clk); | 567 | clk_prepare_enable(sdd->src_clk); |
568 | } else { | 568 | } else { |
569 | /* Configure Clock */ | 569 | /* Configure Clock */ |
570 | val = readl(regs + S3C64XX_SPI_CLK_CFG); | 570 | val = readl(regs + S3C64XX_SPI_CLK_CFG); |
@@ -1302,7 +1302,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) | |||
1302 | goto err3; | 1302 | goto err3; |
1303 | } | 1303 | } |
1304 | 1304 | ||
1305 | if (clk_enable(sdd->clk)) { | 1305 | if (clk_prepare_enable(sdd->clk)) { |
1306 | dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n"); | 1306 | dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n"); |
1307 | ret = -EBUSY; | 1307 | ret = -EBUSY; |
1308 | goto err4; | 1308 | goto err4; |
@@ -1317,7 +1317,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) | |||
1317 | goto err5; | 1317 | goto err5; |
1318 | } | 1318 | } |
1319 | 1319 | ||
1320 | if (clk_enable(sdd->src_clk)) { | 1320 | if (clk_prepare_enable(sdd->src_clk)) { |
1321 | dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name); | 1321 | dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name); |
1322 | ret = -EBUSY; | 1322 | ret = -EBUSY; |
1323 | goto err6; | 1323 | goto err6; |
@@ -1361,11 +1361,11 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) | |||
1361 | err8: | 1361 | err8: |
1362 | free_irq(irq, sdd); | 1362 | free_irq(irq, sdd); |
1363 | err7: | 1363 | err7: |
1364 | clk_disable(sdd->src_clk); | 1364 | clk_disable_unprepare(sdd->src_clk); |
1365 | err6: | 1365 | err6: |
1366 | clk_put(sdd->src_clk); | 1366 | clk_put(sdd->src_clk); |
1367 | err5: | 1367 | err5: |
1368 | clk_disable(sdd->clk); | 1368 | clk_disable_unprepare(sdd->clk); |
1369 | err4: | 1369 | err4: |
1370 | clk_put(sdd->clk); | 1370 | clk_put(sdd->clk); |
1371 | err3: | 1371 | err3: |
@@ -1393,10 +1393,10 @@ static int s3c64xx_spi_remove(struct platform_device *pdev) | |||
1393 | 1393 | ||
1394 | free_irq(platform_get_irq(pdev, 0), sdd); | 1394 | free_irq(platform_get_irq(pdev, 0), sdd); |
1395 | 1395 | ||
1396 | clk_disable(sdd->src_clk); | 1396 | clk_disable_unprepare(sdd->src_clk); |
1397 | clk_put(sdd->src_clk); | 1397 | clk_put(sdd->src_clk); |
1398 | 1398 | ||
1399 | clk_disable(sdd->clk); | 1399 | clk_disable_unprepare(sdd->clk); |
1400 | clk_put(sdd->clk); | 1400 | clk_put(sdd->clk); |
1401 | 1401 | ||
1402 | if (!sdd->cntrlr_info->cfg_gpio && pdev->dev.of_node) | 1402 | if (!sdd->cntrlr_info->cfg_gpio && pdev->dev.of_node) |
@@ -1417,8 +1417,8 @@ static int s3c64xx_spi_suspend(struct device *dev) | |||
1417 | spi_master_suspend(master); | 1417 | spi_master_suspend(master); |
1418 | 1418 | ||
1419 | /* Disable the clock */ | 1419 | /* Disable the clock */ |
1420 | clk_disable(sdd->src_clk); | 1420 | clk_disable_unprepare(sdd->src_clk); |
1421 | clk_disable(sdd->clk); | 1421 | clk_disable_unprepare(sdd->clk); |
1422 | 1422 | ||
1423 | if (!sdd->cntrlr_info->cfg_gpio && dev->of_node) | 1423 | if (!sdd->cntrlr_info->cfg_gpio && dev->of_node) |
1424 | s3c64xx_spi_dt_gpio_free(sdd); | 1424 | s3c64xx_spi_dt_gpio_free(sdd); |
@@ -1440,8 +1440,8 @@ static int s3c64xx_spi_resume(struct device *dev) | |||
1440 | sci->cfg_gpio(); | 1440 | sci->cfg_gpio(); |
1441 | 1441 | ||
1442 | /* Enable the clock */ | 1442 | /* Enable the clock */ |
1443 | clk_enable(sdd->src_clk); | 1443 | clk_prepare_enable(sdd->src_clk); |
1444 | clk_enable(sdd->clk); | 1444 | clk_prepare_enable(sdd->clk); |
1445 | 1445 | ||
1446 | s3c64xx_spi_hwinit(sdd, sdd->port_id); | 1446 | s3c64xx_spi_hwinit(sdd, sdd->port_id); |
1447 | 1447 | ||
@@ -1457,8 +1457,8 @@ static int s3c64xx_spi_runtime_suspend(struct device *dev) | |||
1457 | struct spi_master *master = dev_get_drvdata(dev); | 1457 | struct spi_master *master = dev_get_drvdata(dev); |
1458 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); | 1458 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); |
1459 | 1459 | ||
1460 | clk_disable(sdd->clk); | 1460 | clk_disable_unprepare(sdd->clk); |
1461 | clk_disable(sdd->src_clk); | 1461 | clk_disable_unprepare(sdd->src_clk); |
1462 | 1462 | ||
1463 | return 0; | 1463 | return 0; |
1464 | } | 1464 | } |
@@ -1468,8 +1468,8 @@ static int s3c64xx_spi_runtime_resume(struct device *dev) | |||
1468 | struct spi_master *master = dev_get_drvdata(dev); | 1468 | struct spi_master *master = dev_get_drvdata(dev); |
1469 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); | 1469 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); |
1470 | 1470 | ||
1471 | clk_enable(sdd->src_clk); | 1471 | clk_prepare_enable(sdd->src_clk); |
1472 | clk_enable(sdd->clk); | 1472 | clk_prepare_enable(sdd->clk); |
1473 | 1473 | ||
1474 | return 0; | 1474 | return 0; |
1475 | } | 1475 | } |
diff --git a/include/linux/platform_data/spi-omap2-mcspi.h b/include/linux/platform_data/spi-omap2-mcspi.h index a357eb26bd25..ce70f7b5a8e1 100644 --- a/include/linux/platform_data/spi-omap2-mcspi.h +++ b/include/linux/platform_data/spi-omap2-mcspi.h | |||
@@ -7,9 +7,13 @@ | |||
7 | 7 | ||
8 | #define OMAP4_MCSPI_REG_OFFSET 0x100 | 8 | #define OMAP4_MCSPI_REG_OFFSET 0x100 |
9 | 9 | ||
10 | #define MCSPI_PINDIR_D0_OUT_D1_IN 0 | ||
11 | #define MCSPI_PINDIR_D0_IN_D1_OUT 1 | ||
12 | |||
10 | struct omap2_mcspi_platform_config { | 13 | struct omap2_mcspi_platform_config { |
11 | unsigned short num_cs; | 14 | unsigned short num_cs; |
12 | unsigned int regs_offset; | 15 | unsigned int regs_offset; |
16 | unsigned int pin_dir:1; | ||
13 | }; | 17 | }; |
14 | 18 | ||
15 | struct omap2_mcspi_dev_attr { | 19 | struct omap2_mcspi_dev_attr { |