1 files changed, 25 insertions, 3 deletions

diff --git a/drivers/eisa/pci_eisa.c b/drivers/eisa/pci_eisa.c
index cdae207028a7..ef5c3ec87432 100644
--- a/drivers/eisa/pci_eisa.c
+++ b/drivers/eisa/pci_eisa.c
@@ -22,7 +22,8 @@ static struct eisa_root_device pci_eisa_root;
 static int __init pci_eisa_init(struct pci_dev *pdev,
                                 const struct pci_device_id *ent)
 {
-        int rc;
+        int rc, i;
+        struct resource *res, *bus_res = NULL;
 
         if ((rc = pci_enable_device (pdev))) {
                 printk (KERN_ERR "pci_eisa : Could not enable device %s\n",
@@ -30,9 +31,30 @@ static int __init pci_eisa_init(struct pci_dev *pdev,
                 return rc;
         }
 
+        /*
+         * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
+         * device, so the resources available on EISA are the same as those
+         * available on the 82375 bus.  This works the same as a PCI-PCI
+         * bridge in subtractive-decode mode (see pci_read_bridge_bases()).
+         * We assume other PCI-EISA bridges are similar.
+         *
+         * eisa_root_register() can only deal with a single io port resource,
+        *  so we use the first valid io port resource.
+         */
+        pci_bus_for_each_resource(pdev->bus, res, i)
+                if (res && (res->flags & IORESOURCE_IO)) {
+                        bus_res = res;
+                        break;
+                }
+
+        if (!bus_res) {
+                dev_err(&pdev->dev, "No resources available\n");
+                return -1;
+        }
+
         pci_eisa_root.dev              = &pdev->dev;
-        pci_eisa_root.res              = pdev->bus->resource[0];
-        pci_eisa_root.bus_base_addr    = pdev->bus->resource[0]->start;
+        pci_eisa_root.res              = bus_res;
+        pci_eisa_root.bus_base_addr    = bus_res->start;
         pci_eisa_root.slots            = EISA_MAX_SLOTS;
         pci_eisa_root.dma_mask         = pdev->dma_mask;
         dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);