36 files changed, 687 insertions, 530 deletions

diff --git a/arch/um/Makefile-i386 b/arch/um/Makefile-i386
index 67290117d909..561e373bd850 100644
--- a/arch/um/Makefile-i386
+++ b/arch/um/Makefile-i386
@@ -22,11 +22,6 @@ export LDFLAGS HOSTCFLAGS HOSTLDFLAGS UML_OBJCOPYFLAGS
 endif
 endif
 
-KBUILD_CFLAGS           += -DCONFIG_X86_32
-KBUILD_AFLAGS           += -DCONFIG_X86_32
-CONFIG_X86_32           := y
-export CONFIG_X86_32
-
 # First of all, tune CFLAGS for the specific CPU. This actually sets cflags-y.
 include $(srctree)/arch/x86/Makefile_32.cpu
 
diff --git a/crypto/fcrypt.c b/crypto/fcrypt.c
index d161949fdb94..a32cb68bbc60 100644
--- a/crypto/fcrypt.c
+++ b/crypto/fcrypt.c
@@ -51,7 +51,7 @@
 #define ROUNDS 16
 
 struct fcrypt_ctx {
-        u32 sched[ROUNDS];
+        __be32 sched[ROUNDS];
 };
 
 /* Rotate right two 32 bit numbers as a 56 bit number */
@@ -73,8 +73,8 @@ do {								\
  * /afs/transarc.com/public/afsps/afs.rel31b.export-src/rxkad/sboxes.h
  */
 #undef Z
-#define Z(x) __constant_be32_to_cpu(x << 3)
-static const u32 sbox0[256] = {
+#define Z(x) __constant_cpu_to_be32(x << 3)
+static const __be32 sbox0[256] = {
         Z(0xea), Z(0x7f), Z(0xb2), Z(0x64), Z(0x9d), Z(0xb0), Z(0xd9), Z(0x11),
         Z(0xcd), Z(0x86), Z(0x86), Z(0x91), Z(0x0a), Z(0xb2), Z(0x93), Z(0x06),
         Z(0x0e), Z(0x06), Z(0xd2), Z(0x65), Z(0x73), Z(0xc5), Z(0x28), Z(0x60),
@@ -110,8 +110,8 @@ static const u32 sbox0[256] = {
 };
 
 #undef Z
-#define Z(x) __constant_be32_to_cpu((x << 27) | (x >> 5))
-static const u32 sbox1[256] = {
+#define Z(x) __constant_cpu_to_be32((x << 27) | (x >> 5))
+static const __be32 sbox1[256] = {
         Z(0x77), Z(0x14), Z(0xa6), Z(0xfe), Z(0xb2), Z(0x5e), Z(0x8c), Z(0x3e),
         Z(0x67), Z(0x6c), Z(0xa1), Z(0x0d), Z(0xc2), Z(0xa2), Z(0xc1), Z(0x85),
         Z(0x6c), Z(0x7b), Z(0x67), Z(0xc6), Z(0x23), Z(0xe3), Z(0xf2), Z(0x89),
@@ -147,8 +147,8 @@ static const u32 sbox1[256] = {
 };
 
 #undef Z
-#define Z(x) __constant_be32_to_cpu(x << 11)
-static const u32 sbox2[256] = {
+#define Z(x) __constant_cpu_to_be32(x << 11)
+static const __be32 sbox2[256] = {
         Z(0xf0), Z(0x37), Z(0x24), Z(0x53), Z(0x2a), Z(0x03), Z(0x83), Z(0x86),
         Z(0xd1), Z(0xec), Z(0x50), Z(0xf0), Z(0x42), Z(0x78), Z(0x2f), Z(0x6d),
         Z(0xbf), Z(0x80), Z(0x87), Z(0x27), Z(0x95), Z(0xe2), Z(0xc5), Z(0x5d),
@@ -184,8 +184,8 @@ static const u32 sbox2[256] = {
 };
 
 #undef Z
-#define Z(x) __constant_be32_to_cpu(x << 19)
-static const u32 sbox3[256] = {
+#define Z(x) __constant_cpu_to_be32(x << 19)
+static const __be32 sbox3[256] = {
         Z(0xa9), Z(0x2a), Z(0x48), Z(0x51), Z(0x84), Z(0x7e), Z(0x49), Z(0xe2),
         Z(0xb5), Z(0xb7), Z(0x42), Z(0x33), Z(0x7d), Z(0x5d), Z(0xa6), Z(0x12),
         Z(0x44), Z(0x48), Z(0x6d), Z(0x28), Z(0xaa), Z(0x20), Z(0x6d), Z(0x57),
@@ -225,7 +225,7 @@ static const u32 sbox3[256] = {
  */
 #define F_ENCRYPT(R, L, sched)                                          \
 do {                                                                    \
-        union lc4 { u32 l; u8 c[4]; } u;                                \
+        union lc4 { __be32 l; u8 c[4]; } u;                             \
         u.l = sched ^ R;                                                \
         L ^= sbox0[u.c[0]] ^ sbox1[u.c[1]] ^ sbox2[u.c[2]] ^ sbox3[u.c[3]]; \
 } while(0)
@@ -237,7 +237,7 @@ static void fcrypt_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
 {
         const struct fcrypt_ctx *ctx = crypto_tfm_ctx(tfm);
         struct {
-                u32 l, r;
+                __be32 l, r;
         } X;
 
         memcpy(&X, src, sizeof(X));
@@ -269,7 +269,7 @@ static void fcrypt_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
 {
         const struct fcrypt_ctx *ctx = crypto_tfm_ctx(tfm);
         struct {
-                u32 l, r;
+                __be32 l, r;
         } X;
 
         memcpy(&X, src, sizeof(X));
@@ -328,22 +328,22 @@ static int fcrypt_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int key
         k |= (*key) >> 1;
 
         /* Use lower 32 bits for schedule, rotate by 11 each round (16 times) */
-        ctx->sched[0x0] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0x1] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0x2] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0x3] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0x4] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0x5] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0x6] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0x7] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0x8] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0x9] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0xa] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0xb] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0xc] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0xd] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0xe] = be32_to_cpu(k); ror56_64(k, 11);
-        ctx->sched[0xf] = be32_to_cpu(k);
+        ctx->sched[0x0] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0x1] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0x2] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0x3] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0x4] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0x5] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0x6] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0x7] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0x8] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0x9] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0xa] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0xb] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0xc] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0xd] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0xe] = cpu_to_be32(k); ror56_64(k, 11);
+        ctx->sched[0xf] = cpu_to_be32(k);
 
         return 0;
 #else
@@ -369,22 +369,22 @@ static int fcrypt_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int key
         lo |= (*key) >> 1;
 
         /* Use lower 32 bits for schedule, rotate by 11 each round (16 times) */
-        ctx->sched[0x0] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0x1] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0x2] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0x3] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0x4] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0x5] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0x6] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0x7] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0x8] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0x9] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0xa] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0xb] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0xc] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0xd] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0xe] = be32_to_cpu(lo); ror56(hi, lo, 11);
-        ctx->sched[0xf] = be32_to_cpu(lo);
+        ctx->sched[0x0] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0x1] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0x2] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0x3] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0x4] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0x5] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0x6] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0x7] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0x8] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0x9] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0xa] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0xb] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0xc] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0xd] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0xe] = cpu_to_be32(lo); ror56(hi, lo, 11);
+        ctx->sched[0xf] = cpu_to_be32(lo);
         return 0;
 #endif
 }
diff --git a/drivers/char/cs5535_gpio.c b/drivers/char/cs5535_gpio.c
index fe6d2407baed..c2d23cae9515 100644
--- a/drivers/char/cs5535_gpio.c
+++ b/drivers/char/cs5535_gpio.c
@@ -104,6 +104,11 @@ static ssize_t cs5535_gpio_write(struct file *file, const char __user *data,
                 for (j = 0; j < ARRAY_SIZE(rm); j++) {
                         if (c == rm[j].on) {
                                 outl(m1, base + rm[j].wr_offset);
+                                /* If enabling output, turn off AUX 1 and AUX 2 */
+                                if (c == 'O') {
+                                        outl(m0, base + 0x10);
+                                        outl(m0, base + 0x14);
+                                }
                                 break;
                         } else if (c == rm[j].off) {
                                 outl(m0, base + rm[j].wr_offset);
diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c
index f59aecf5ec15..fd9c5d51870a 100644
--- a/drivers/input/touchscreen/ads7846.c
+++ b/drivers/input/touchscreen/ads7846.c
@@ -267,13 +267,12 @@ static int ads7846_read12_ser(struct device *dev, unsigned command)
         ts->irq_disabled = 0;
         enable_irq(spi->irq);
 
-        if (req->msg.status)
-                status = req->msg.status;
-
-        /* on-wire is a must-ignore bit, a BE12 value, then padding */
-        sample = be16_to_cpu(req->sample);
-        sample = sample >> 3;
-        sample &= 0x0fff;
+        if (status == 0) {
+                /* on-wire is a must-ignore bit, a BE12 value, then padding */
+                sample = be16_to_cpu(req->sample);
+                sample = sample >> 3;
+                sample &= 0x0fff;
+        }
 
         kfree(req);
         return status ? status : sample;
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c
index a6469218f194..365024b83d3d 100644
--- a/drivers/mmc/host/mmc_spi.c
+++ b/drivers/mmc/host/mmc_spi.c
@@ -176,8 +176,6 @@ mmc_spi_readbytes(struct mmc_spi_host *host, unsigned len)
                                 DMA_FROM_DEVICE);
 
         status = spi_sync(host->spi, &host->readback);
-        if (status == 0)
-                status = host->readback.status;
 
         if (host->dma_dev)
                 dma_sync_single_for_cpu(host->dma_dev,
@@ -480,8 +478,6 @@ mmc_spi_command_send(struct mmc_spi_host *host,
                                 DMA_BIDIRECTIONAL);
         }
         status = spi_sync(host->spi, &host->m);
-        if (status == 0)
-                status = host->m.status;
 
         if (host->dma_dev)
                 dma_sync_single_for_cpu(host->dma_dev,
@@ -624,8 +620,6 @@ mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t)
                                 DMA_BIDIRECTIONAL);
 
         status = spi_sync(spi, &host->m);
-        if (status == 0)
-                status = host->m.status;
 
         if (status != 0) {
                 dev_dbg(&spi->dev, "write error (%d)\n", status);
@@ -726,8 +720,6 @@ mmc_spi_readblock(struct mmc_spi_host *host, struct spi_transfer *t)
                 }
 
                 status = spi_sync(spi, &host->m);
-                if (status == 0)
-                        status = host->m.status;
 
                 if (host->dma_dev) {
                         dma_sync_single_for_cpu(host->dma_dev,
@@ -905,8 +897,6 @@ mmc_spi_data_do(struct mmc_spi_host *host, struct mmc_command *cmd,
                                         DMA_BIDIRECTIONAL);
 
                 tmp = spi_sync(spi, &host->m);
-                if (tmp == 0)
-                        tmp = host->m.status;
 
                 if (host->dma_dev)
                         dma_sync_single_for_cpu(host->dma_dev,
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
index a4f56e95cf96..f1e00ff54ce8 100644
--- a/drivers/rtc/interface.c
+++ b/drivers/rtc/interface.c
@@ -293,7 +293,7 @@ int rtc_irq_register(struct rtc_device *rtc, struct rtc_task *task)
                 return -EINVAL;
 
         /* Cannot register while the char dev is in use */
-        if (test_and_set_bit(RTC_DEV_BUSY, &rtc->flags))
+        if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags))
                 return -EBUSY;
 
         spin_lock_irq(&rtc->irq_task_lock);
@@ -303,7 +303,7 @@ int rtc_irq_register(struct rtc_device *rtc, struct rtc_task *task)
         }
         spin_unlock_irq(&rtc->irq_task_lock);
 
-        clear_bit(RTC_DEV_BUSY, &rtc->flags);
+        clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags);
 
         return retval;
 }
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c
index ae1bf177d625..025c60a17a4a 100644
--- a/drivers/rtc/rtc-dev.c
+++ b/drivers/rtc/rtc-dev.c
@@ -26,7 +26,7 @@ static int rtc_dev_open(struct inode *inode, struct file *file)
                                         struct rtc_device, char_dev);
         const struct rtc_class_ops *ops = rtc->ops;
 
-        if (test_and_set_bit(RTC_DEV_BUSY, &rtc->flags))
+        if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags))
                 return -EBUSY;
 
         file->private_data = rtc;
@@ -41,7 +41,7 @@ static int rtc_dev_open(struct inode *inode, struct file *file)
         }
 
         /* something has gone wrong */
-        clear_bit(RTC_DEV_BUSY, &rtc->flags);
+        clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags);
         return err;
 }
 
@@ -402,7 +402,7 @@ static int rtc_dev_release(struct inode *inode, struct file *file)
         if (rtc->ops->release)
                 rtc->ops->release(rtc->dev.parent);
 
-        clear_bit(RTC_DEV_BUSY, &rtc->flags);
+        clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags);
         return 0;
 }
 
diff --git a/drivers/rtc/rtc-max6902.c b/drivers/rtc/rtc-max6902.c
index 3e183cfee10f..1f956dc5d56e 100644
--- a/drivers/rtc/rtc-max6902.c
+++ b/drivers/rtc/rtc-max6902.c
@@ -89,13 +89,9 @@ static int max6902_get_reg(struct device *dev, unsigned char address,
 
         /* do the i/o */
         status = spi_sync(spi, &message);
-        if (status == 0)
-                status = message.status;
-        else
-                return status;
-
-        *data = chip->rx_buf[1];
 
+        if (status == 0)
+                *data = chip->rx_buf[1];
         return status;
 }
 
@@ -125,9 +121,7 @@ static int max6902_get_datetime(struct device *dev, struct rtc_time *dt)
 
         /* do the i/o */
         status = spi_sync(spi, &message);
-        if (status == 0)
-                status = message.status;
-        else
+        if (status)
                 return status;
 
         /* The chip sends data in this order:
diff --git a/drivers/spi/at25.c b/drivers/spi/at25.c
index e007833cca59..290dbe99647a 100644
--- a/drivers/spi/at25.c
+++ b/drivers/spi/at25.c
@@ -21,6 +21,13 @@
 #include <linux/spi/eeprom.h>
 
 
+/*
+ * NOTE: this is an *EEPROM* driver.  The vagaries of product naming
+ * mean that some AT25 products are EEPROMs, and others are FLASH.
+ * Handle FLASH chips with the drivers/mtd/devices/m25p80.c driver,
+ * not this one!
+ */
+
 struct at25_data {
         struct spi_device       *spi;
         struct mutex            lock;
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index b31f4431849b..93e9de46977a 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -541,10 +541,7 @@ static void spi_complete(void *arg)
  * Also, the caller is guaranteeing that the memory associated with the
  * message will not be freed before this call returns.
  *
- * The return value is a negative error code if the message could not be
- * submitted, else zero.  When the value is zero, then message->status is
- * also defined;  it's the completion code for the transfer, either zero
- * or a negative error code from the controller driver.
+ * It returns zero on success, else a negative error code.
  */
 int spi_sync(struct spi_device *spi, struct spi_message *message)
 {
@@ -554,8 +551,10 @@ int spi_sync(struct spi_device *spi, struct spi_message *message)
         message->complete = spi_complete;
         message->context = &done;
         status = spi_async(spi, message);
-        if (status == 0)
+        if (status == 0) {
                 wait_for_completion(&done);
+                status = message->status;
+        }
         message->context = NULL;
         return status;
 }
@@ -589,7 +588,7 @@ int spi_write_then_read(struct spi_device *spi,
                 const u8 *txbuf, unsigned n_tx,
                 u8 *rxbuf, unsigned n_rx)
 {
-        static DECLARE_MUTEX(lock);
+        static DEFINE_MUTEX(lock);
 
         int                     status;
         struct spi_message      message;
@@ -615,7 +614,7 @@ int spi_write_then_read(struct spi_device *spi,
         }
 
         /* ... unless someone else is using the pre-allocated buffer */
-        if (down_trylock(&lock)) {
+        if (!mutex_trylock(&lock)) {
                 local_buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
                 if (!local_buf)
                         return -ENOMEM;
@@ -628,13 +627,11 @@ int spi_write_then_read(struct spi_device *spi,
 
         /* do the i/o */
         status = spi_sync(spi, &message);
-        if (status == 0) {
+        if (status == 0)
                 memcpy(rxbuf, x[1].rx_buf, n_rx);
-                status = message.status;
-        }
 
         if (x[0].tx_buf == buf)
-                up(&lock);
+                mutex_unlock(&lock);
         else
                 kfree(local_buf);
 
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c
index 2ef11bb70b2e..22697b812205 100644
--- a/drivers/spi/spi_bfin5xx.c
+++ b/drivers/spi/spi_bfin5xx.c
@@ -1,17 +1,22 @@
 /*
- * File:         drivers/spi/bfin5xx_spi.c
- * Based on:     N/A
- * Author:       Luke Yang (Analog Devices Inc.)
+ * File:        drivers/spi/bfin5xx_spi.c
+ * Maintainer:
+ *              Bryan Wu <bryan.wu@analog.com>
+ * Original Author:
+ *              Luke Yang (Analog Devices Inc.)
  *
- * Created:      March. 10th 2006
- * Description:  SPI controller driver for Blackfin 5xx
- * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ * Created:     March. 10th 2006
+ * Description: SPI controller driver for Blackfin BF5xx
+ * Bugs:        Enter bugs at http://blackfin.uclinux.org/
  *
  * Modified:
  *      March 10, 2006  bfin5xx_spi.c Created. (Luke Yang)
  *      August 7, 2006  added full duplex mode (Axel Weiss & Luke Yang)
+ *      July  17, 2007  add support for BF54x SPI0 controller (Bryan Wu)
+ *      July  30, 2007  add platfrom_resource interface to support multi-port
+ *                      SPI controller (Bryan Wu)
  *
- * Copyright 2004-2006 Analog Devices Inc.
+ * Copyright 2004-2007 Analog Devices Inc.
  *
  * This program is free software ;  you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -31,50 +36,39 @@
 
 #include <linux/init.h>
 #include <linux/module.h>
+#include <linux/delay.h>
 #include <linux/device.h>
+#include <linux/io.h>
 #include <linux/ioport.h>
+#include <linux/irq.h>
 #include <linux/errno.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/spi/spi.h>
 #include <linux/workqueue.h>
-#include <linux/delay.h>
 
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/delay.h>
 #include <asm/dma.h>
-
+#include <asm/portmux.h>
 #include <asm/bfin5xx_spi.h>
 
-MODULE_AUTHOR("Luke Yang");
-MODULE_DESCRIPTION("Blackfin 5xx SPI Contoller");
-MODULE_LICENSE("GPL");
+#define DRV_NAME        "bfin-spi"
+#define DRV_AUTHOR      "Bryan Wu, Luke Yang"
+#define DRV_DESC        "Blackfin BF5xx on-chip SPI Contoller Driver"
+#define DRV_VERSION     "1.0"
 
-#define IS_DMA_ALIGNED(x) (((u32)(x)&0x07)==0)
+MODULE_AUTHOR(DRV_AUTHOR);
+MODULE_DESCRIPTION(DRV_DESC);
+MODULE_LICENSE("GPL");
 
-#define DEFINE_SPI_REG(reg, off) \
-static inline u16 read_##reg(void) \
-            { return *(volatile unsigned short*)(SPI0_REGBASE + off); } \
-static inline void write_##reg(u16 v) \
-            {*(volatile unsigned short*)(SPI0_REGBASE + off) = v;\
-             SSYNC();}
+#define IS_DMA_ALIGNED(x) (((u32)(x)&0x07) == 0)
 
-DEFINE_SPI_REG(CTRL, 0x00)
-DEFINE_SPI_REG(FLAG, 0x04)
-DEFINE_SPI_REG(STAT, 0x08)
-DEFINE_SPI_REG(TDBR, 0x0C)
-DEFINE_SPI_REG(RDBR, 0x10)
-DEFINE_SPI_REG(BAUD, 0x14)
-DEFINE_SPI_REG(SHAW, 0x18)
-#define START_STATE ((void*)0)
-#define RUNNING_STATE ((void*)1)
-#define DONE_STATE ((void*)2)
-#define ERROR_STATE ((void*)-1)
-#define QUEUE_RUNNING 0
-#define QUEUE_STOPPED 1
-int dma_requested;
+#define START_STATE     ((void *)0)
+#define RUNNING_STATE   ((void *)1)
+#define DONE_STATE      ((void *)2)
+#define ERROR_STATE     ((void *)-1)
+#define QUEUE_RUNNING   0
+#define QUEUE_STOPPED   1
 
 struct driver_data {
         /* Driver model hookup */
@@ -83,6 +77,12 @@ struct driver_data {
         /* SPI framework hookup */
         struct spi_master *master;
 
+        /* Regs base of SPI controller */
+        void __iomem *regs_base;
+
+        /* Pin request list */
+        u16 *pin_req;
+
         /* BFIN hookup */
         struct bfin5xx_spi_master *master_info;
 
@@ -107,12 +107,18 @@ struct driver_data {
         void *tx_end;
         void *rx;
         void *rx_end;
+
+        /* DMA stuffs */
+        int dma_channel;
         int dma_mapped;
+        int dma_requested;
         dma_addr_t rx_dma;
         dma_addr_t tx_dma;
+
         size_t rx_map_len;
         size_t tx_map_len;
         u8 n_bytes;
+        int cs_change;
         void (*write) (struct driver_data *);
         void (*read) (struct driver_data *);
         void (*duplex) (struct driver_data *);
@@ -129,28 +135,40 @@ struct chip_data {
         u8 enable_dma;
         u8 bits_per_word;       /* 8 or 16 */
         u8 cs_change_per_word;
-        u8 cs_chg_udelay;
+        u16 cs_chg_udelay;      /* Some devices require > 255usec delay */
         void (*write) (struct driver_data *);
         void (*read) (struct driver_data *);
         void (*duplex) (struct driver_data *);
 };
 
+#define DEFINE_SPI_REG(reg, off) \
+static inline u16 read_##reg(struct driver_data *drv_data) \
+        { return bfin_read16(drv_data->regs_base + off); } \
+static inline void write_##reg(struct driver_data *drv_data, u16 v) \
+        { bfin_write16(drv_data->regs_base + off, v); }
+
+DEFINE_SPI_REG(CTRL, 0x00)
+DEFINE_SPI_REG(FLAG, 0x04)
+DEFINE_SPI_REG(STAT, 0x08)
+DEFINE_SPI_REG(TDBR, 0x0C)
+DEFINE_SPI_REG(RDBR, 0x10)
+DEFINE_SPI_REG(BAUD, 0x14)
+DEFINE_SPI_REG(SHAW, 0x18)
+
 static void bfin_spi_enable(struct driver_data *drv_data)
 {
         u16 cr;
 
-        cr = read_CTRL();
-        write_CTRL(cr | BIT_CTL_ENABLE);
-        SSYNC();
+        cr = read_CTRL(drv_data);
+        write_CTRL(drv_data, (cr | BIT_CTL_ENABLE));
 }
 
 static void bfin_spi_disable(struct driver_data *drv_data)
 {
         u16 cr;
 
-        cr = read_CTRL();
-        write_CTRL(cr & (~BIT_CTL_ENABLE));
-        SSYNC();
+        cr = read_CTRL(drv_data);
+        write_CTRL(drv_data, (cr & (~BIT_CTL_ENABLE)));
 }
 
 /* Caculate the SPI_BAUD register value based on input HZ */
@@ -170,83 +188,71 @@ static int flush(struct driver_data *drv_data)
         unsigned long limit = loops_per_jiffy << 1;
 
         /* wait for stop and clear stat */
-        while (!(read_STAT() & BIT_STAT_SPIF) && limit--)
-                continue;
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF) && limit--)
+                cpu_relax();
 
-        write_STAT(BIT_STAT_CLR);
+        write_STAT(drv_data, BIT_STAT_CLR);
 
         return limit;
 }
 
+/* Chip select operation functions for cs_change flag */
+static void cs_active(struct driver_data *drv_data, struct chip_data *chip)
+{
+        u16 flag = read_FLAG(drv_data);
+
+        flag |= chip->flag;
+        flag &= ~(chip->flag << 8);
+
+        write_FLAG(drv_data, flag);
+}
+
+static void cs_deactive(struct driver_data *drv_data, struct chip_data *chip)
+{
+        u16 flag = read_FLAG(drv_data);
+
+        flag |= (chip->flag << 8);
+
+        write_FLAG(drv_data, flag);
+
+        /* Move delay here for consistency */
+        if (chip->cs_chg_udelay)
+                udelay(chip->cs_chg_udelay);
+}
+
+#define MAX_SPI_SSEL    7
+
 /* stop controller and re-config current chip*/
-static void restore_state(struct driver_data *drv_data)
+static int restore_state(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
+        int ret = 0;
 
         /* Clear status and disable clock */
-        write_STAT(BIT_STAT_CLR);
+        write_STAT(drv_data, BIT_STAT_CLR);
         bfin_spi_disable(drv_data);
         dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n");
 
-#if defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537)
-        dev_dbg(&drv_data->pdev->dev, 
-                "chip select number is %d\n", chip->chip_select_num);
-        
-        switch (chip->chip_select_num) {
-        case 1:
-                bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3c00);
-                SSYNC();
-                break;
-
-        case 2:
-        case 3:
-                bfin_write_PORT_MUX(bfin_read_PORT_MUX() | PJSE_SPI);
-                SSYNC();
-                bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3800);
-                SSYNC();
-                break;
-
-        case 4:
-                bfin_write_PORT_MUX(bfin_read_PORT_MUX() | PFS4E_SPI);
-                SSYNC();
-                bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3840);
-                SSYNC();
-                break;
+        /* Load the registers */
+        write_CTRL(drv_data, chip->ctl_reg);
+        write_BAUD(drv_data, chip->baud);
 
-        case 5:
-                bfin_write_PORT_MUX(bfin_read_PORT_MUX() | PFS5E_SPI);
-                SSYNC();
-                bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3820);
-                SSYNC();
-                break;
+        bfin_spi_enable(drv_data);
+        cs_active(drv_data, chip);
 
-        case 6:
-                bfin_write_PORT_MUX(bfin_read_PORT_MUX() | PFS6E_SPI);
-                SSYNC();
-                bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3810);
-                SSYNC();
-                break;
+        if (ret)
+                dev_dbg(&drv_data->pdev->dev,
+                        ": request chip select number %d failed\n",
+                        chip->chip_select_num);
 
-        case 7:
-                bfin_write_PORT_MUX(bfin_read_PORT_MUX() | PJCE_SPI);
-                SSYNC();
-                bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3800);
-                SSYNC();
-                break;
-        }
-#endif
-
-        /* Load the registers */
-        write_CTRL(chip->ctl_reg);
-        write_BAUD(chip->baud);
-        write_FLAG(chip->flag);
+        return ret;
 }
 
 /* used to kick off transfer in rx mode */
-static unsigned short dummy_read(void)
+static unsigned short dummy_read(struct driver_data *drv_data)
 {
         unsigned short tmp;
-        tmp = read_RDBR();
+        tmp = read_RDBR(drv_data);
         return tmp;
 }
 
@@ -255,9 +261,9 @@ static void null_writer(struct driver_data *drv_data)
         u8 n_bytes = drv_data->n_bytes;
 
         while (drv_data->tx < drv_data->tx_end) {
-                write_TDBR(0);
-                while ((read_STAT() & BIT_STAT_TXS))
-                        continue;
+                write_TDBR(drv_data, 0);
+                while ((read_STAT(drv_data) & BIT_STAT_TXS))
+                        cpu_relax();
                 drv_data->tx += n_bytes;
         }
 }
@@ -265,75 +271,78 @@ static void null_writer(struct driver_data *drv_data)
 static void null_reader(struct driver_data *drv_data)
 {
         u8 n_bytes = drv_data->n_bytes;
-        dummy_read();
+        dummy_read(drv_data);
 
         while (drv_data->rx < drv_data->rx_end) {
-                while (!(read_STAT() & BIT_STAT_RXS))
-                        continue;
-                dummy_read();
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                dummy_read(drv_data);
                 drv_data->rx += n_bytes;
         }
 }
 
 static void u8_writer(struct driver_data *drv_data)
 {
-        dev_dbg(&drv_data->pdev->dev, 
-                "cr8-s is 0x%x\n", read_STAT());
+        dev_dbg(&drv_data->pdev->dev,
+                "cr8-s is 0x%x\n", read_STAT(drv_data));
+
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
+
         while (drv_data->tx < drv_data->tx_end) {
-                write_TDBR(*(u8 *) (drv_data->tx));
-                while (read_STAT() & BIT_STAT_TXS)
-                        continue;
+                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
+                while (read_STAT(drv_data) & BIT_STAT_TXS)
+                        cpu_relax();
                 ++drv_data->tx;
         }
-
-        /* poll for SPI completion before returning */
-        while (!(read_STAT() & BIT_STAT_SPIF))
-                continue;
 }
 
 static void u8_cs_chg_writer(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
+
         while (drv_data->tx < drv_data->tx_end) {
-                write_FLAG(chip->flag);
-                SSYNC();
-
-                write_TDBR(*(u8 *) (drv_data->tx));
-                while (read_STAT() & BIT_STAT_TXS)
-                        continue;
-                while (!(read_STAT() & BIT_STAT_SPIF))
-                        continue;
-                write_FLAG(0xFF00 | chip->flag);
-                SSYNC();
-                if (chip->cs_chg_udelay)
-                        udelay(chip->cs_chg_udelay);
+                cs_active(drv_data, chip);
+
+                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
+                while (read_STAT(drv_data) & BIT_STAT_TXS)
+                        cpu_relax();
+
+                cs_deactive(drv_data, chip);
+
                 ++drv_data->tx;
         }
-        write_FLAG(0xFF00);
-        SSYNC();
 }
 
 static void u8_reader(struct driver_data *drv_data)
 {
-        dev_dbg(&drv_data->pdev->dev, 
-                "cr-8 is 0x%x\n", read_STAT());
+        dev_dbg(&drv_data->pdev->dev,
+                "cr-8 is 0x%x\n", read_STAT(drv_data));
+
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
 
         /* clear TDBR buffer before read(else it will be shifted out) */
-        write_TDBR(0xFFFF);
+        write_TDBR(drv_data, 0xFFFF);
 
-        dummy_read();
+        dummy_read(drv_data);
 
         while (drv_data->rx < drv_data->rx_end - 1) {
-                while (!(read_STAT() & BIT_STAT_RXS))
-                        continue;
-                *(u8 *) (drv_data->rx) = read_RDBR();
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
                 ++drv_data->rx;
         }
 
-        while (!(read_STAT() & BIT_STAT_RXS))
-                continue;
-        *(u8 *) (drv_data->rx) = read_SHAW();
+        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                cpu_relax();
+        *(u8 *) (drv_data->rx) = read_SHAW(drv_data);
         ++drv_data->rx;
 }
 
@@ -341,36 +350,47 @@ static void u8_cs_chg_reader(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
-        while (drv_data->rx < drv_data->rx_end) {
-                write_FLAG(chip->flag);
-                SSYNC();
-
-                read_RDBR();    /* kick off */
-                while (!(read_STAT() & BIT_STAT_RXS))
-                        continue;
-                while (!(read_STAT() & BIT_STAT_SPIF))
-                        continue;
-                *(u8 *) (drv_data->rx) = read_SHAW();
-                write_FLAG(0xFF00 | chip->flag);
-                SSYNC();
-                if (chip->cs_chg_udelay)
-                        udelay(chip->cs_chg_udelay);
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
+
+        /* clear TDBR buffer before read(else it will be shifted out) */
+        write_TDBR(drv_data, 0xFFFF);
+
+        cs_active(drv_data, chip);
+        dummy_read(drv_data);
+
+        while (drv_data->rx < drv_data->rx_end - 1) {
+                cs_deactive(drv_data, chip);
+
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                cs_active(drv_data, chip);
+                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
                 ++drv_data->rx;
         }
-        write_FLAG(0xFF00);
-        SSYNC();
+        cs_deactive(drv_data, chip);
+
+        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                cpu_relax();
+        *(u8 *) (drv_data->rx) = read_SHAW(drv_data);
+        ++drv_data->rx;
 }
 
 static void u8_duplex(struct driver_data *drv_data)
 {
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
+
         /* in duplex mode, clk is triggered by writing of TDBR */
         while (drv_data->rx < drv_data->rx_end) {
-                write_TDBR(*(u8 *) (drv_data->tx));
-                while (!(read_STAT() & BIT_STAT_SPIF))
-                        continue;
-                while (!(read_STAT() & BIT_STAT_RXS))
-                        continue;
-                *(u8 *) (drv_data->rx) = read_RDBR();
+                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
+                while (read_STAT(drv_data) & BIT_STAT_TXS)
+                        cpu_relax();
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
                 ++drv_data->rx;
                 ++drv_data->tx;
         }
@@ -380,83 +400,89 @@ static void u8_cs_chg_duplex(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
+
         while (drv_data->rx < drv_data->rx_end) {
-                write_FLAG(chip->flag);
-                SSYNC();
-
-                write_TDBR(*(u8 *) (drv_data->tx));
-                while (!(read_STAT() & BIT_STAT_SPIF))
-                        continue;
-                while (!(read_STAT() & BIT_STAT_RXS))
-                        continue;
-                *(u8 *) (drv_data->rx) = read_RDBR();
-                write_FLAG(0xFF00 | chip->flag);
-                SSYNC();
-                if (chip->cs_chg_udelay)
-                        udelay(chip->cs_chg_udelay);
+                cs_active(drv_data, chip);
+
+                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
+                while (read_STAT(drv_data) & BIT_STAT_TXS)
+                        cpu_relax();
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
+
+                cs_deactive(drv_data, chip);
+
                 ++drv_data->rx;
                 ++drv_data->tx;
         }
-        write_FLAG(0xFF00);
-        SSYNC();
 }
 
 static void u16_writer(struct driver_data *drv_data)
 {
-        dev_dbg(&drv_data->pdev->dev, 
-                "cr16 is 0x%x\n", read_STAT());
+        dev_dbg(&drv_data->pdev->dev,
+                "cr16 is 0x%x\n", read_STAT(drv_data));
+
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
 
         while (drv_data->tx < drv_data->tx_end) {
-                write_TDBR(*(u16 *) (drv_data->tx));
-                while ((read_STAT() & BIT_STAT_TXS))
-                        continue;
+                write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
+                while ((read_STAT(drv_data) & BIT_STAT_TXS))
+                        cpu_relax();
                 drv_data->tx += 2;
         }
-
-        /* poll for SPI completion before returning */
-        while (!(read_STAT() & BIT_STAT_SPIF))
-                continue;
 }
 
 static void u16_cs_chg_writer(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
+
         while (drv_data->tx < drv_data->tx_end) {
-                write_FLAG(chip->flag);
-                SSYNC();
-
-                write_TDBR(*(u16 *) (drv_data->tx));
-                while ((read_STAT() & BIT_STAT_TXS))
-                        continue;
-                while (!(read_STAT() & BIT_STAT_SPIF))
-                        continue;
-                write_FLAG(0xFF00 | chip->flag);
-                SSYNC();
-                if (chip->cs_chg_udelay)
-                        udelay(chip->cs_chg_udelay);
+                cs_active(drv_data, chip);
+
+                write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
+                while ((read_STAT(drv_data) & BIT_STAT_TXS))
+                        cpu_relax();
+
+                cs_deactive(drv_data, chip);
+
                 drv_data->tx += 2;
         }
-        write_FLAG(0xFF00);
-        SSYNC();
 }
 
 static void u16_reader(struct driver_data *drv_data)
 {
         dev_dbg(&drv_data->pdev->dev,
-                "cr-16 is 0x%x\n", read_STAT());
-        dummy_read();
+                "cr-16 is 0x%x\n", read_STAT(drv_data));
+
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
+
+        /* clear TDBR buffer before read(else it will be shifted out) */
+        write_TDBR(drv_data, 0xFFFF);
+
+        dummy_read(drv_data);
 
         while (drv_data->rx < (drv_data->rx_end - 2)) {
-                while (!(read_STAT() & BIT_STAT_RXS))
-                        continue;
-                *(u16 *) (drv_data->rx) = read_RDBR();
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
                 drv_data->rx += 2;
         }
 
-        while (!(read_STAT() & BIT_STAT_RXS))
-                continue;
-        *(u16 *) (drv_data->rx) = read_SHAW();
+        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                cpu_relax();
+        *(u16 *) (drv_data->rx) = read_SHAW(drv_data);
         drv_data->rx += 2;
 }
 
@@ -464,36 +490,47 @@ static void u16_cs_chg_reader(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
-        while (drv_data->rx < drv_data->rx_end) {
-                write_FLAG(chip->flag);
-                SSYNC();
-
-                read_RDBR();    /* kick off */
-                while (!(read_STAT() & BIT_STAT_RXS))
-                        continue;
-                while (!(read_STAT() & BIT_STAT_SPIF))
-                        continue;
-                *(u16 *) (drv_data->rx) = read_SHAW();
-                write_FLAG(0xFF00 | chip->flag);
-                SSYNC();
-                if (chip->cs_chg_udelay)
-                        udelay(chip->cs_chg_udelay);
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
+
+        /* clear TDBR buffer before read(else it will be shifted out) */
+        write_TDBR(drv_data, 0xFFFF);
+
+        cs_active(drv_data, chip);
+        dummy_read(drv_data);
+
+        while (drv_data->rx < drv_data->rx_end - 2) {
+                cs_deactive(drv_data, chip);
+
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                cs_active(drv_data, chip);
+                *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
                 drv_data->rx += 2;
         }
-        write_FLAG(0xFF00);
-        SSYNC();
+        cs_deactive(drv_data, chip);
+
+        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                cpu_relax();
+        *(u16 *) (drv_data->rx) = read_SHAW(drv_data);
+        drv_data->rx += 2;
 }
 
 static void u16_duplex(struct driver_data *drv_data)
 {
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
+
         /* in duplex mode, clk is triggered by writing of TDBR */
         while (drv_data->tx < drv_data->tx_end) {
-                write_TDBR(*(u16 *) (drv_data->tx));
-                while (!(read_STAT() & BIT_STAT_SPIF))
-                        continue;
-                while (!(read_STAT() & BIT_STAT_RXS))
-                        continue;
-                *(u16 *) (drv_data->rx) = read_RDBR();
+                write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
+                while (read_STAT(drv_data) & BIT_STAT_TXS)
+                        cpu_relax();
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
                 drv_data->rx += 2;
                 drv_data->tx += 2;
         }
@@ -503,25 +540,25 @@ static void u16_cs_chg_duplex(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
+        /* poll for SPI completion before start */
+        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                cpu_relax();
+
         while (drv_data->tx < drv_data->tx_end) {
-                write_FLAG(chip->flag);
-                SSYNC();
-
-                write_TDBR(*(u16 *) (drv_data->tx));
-                while (!(read_STAT() & BIT_STAT_SPIF))
-                        continue;
-                while (!(read_STAT() & BIT_STAT_RXS))
-                        continue;
-                *(u16 *) (drv_data->rx) = read_RDBR();
-                write_FLAG(0xFF00 | chip->flag);
-                SSYNC();
-                if (chip->cs_chg_udelay)
-                        udelay(chip->cs_chg_udelay);
+                cs_active(drv_data, chip);
+
+                write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
+                while (read_STAT(drv_data) & BIT_STAT_TXS)
+                        cpu_relax();
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
+
+                cs_deactive(drv_data, chip);
+
                 drv_data->rx += 2;
                 drv_data->tx += 2;
         }
-        write_FLAG(0xFF00);
-        SSYNC();
 }
 
 /* test if ther is more transfer to be done */
@@ -546,6 +583,7 @@ static void *next_transfer(struct driver_data *drv_data)
  */
 static void giveback(struct driver_data *drv_data)
 {
+        struct chip_data *chip = drv_data->cur_chip;
         struct spi_transfer *last_transfer;
         unsigned long flags;
         struct spi_message *msg;
@@ -565,10 +603,13 @@ static void giveback(struct driver_data *drv_data)
 
         /* disable chip select signal. And not stop spi in autobuffer mode */
         if (drv_data->tx_dma != 0xFFFF) {
-                write_FLAG(0xFF00);
+                cs_deactive(drv_data, chip);
                 bfin_spi_disable(drv_data);
         }
 
+        if (!drv_data->cs_change)
+                cs_deactive(drv_data, chip);
+
         if (msg->complete)
                 msg->complete(msg->context);
 }
@@ -576,14 +617,15 @@ static void giveback(struct driver_data *drv_data)
 static irqreturn_t dma_irq_handler(int irq, void *dev_id)
 {
         struct driver_data *drv_data = (struct driver_data *)dev_id;
+        struct chip_data *chip = drv_data->cur_chip;
         struct spi_message *msg = drv_data->cur_msg;
 
         dev_dbg(&drv_data->pdev->dev, "in dma_irq_handler\n");
-        clear_dma_irqstat(CH_SPI);
+        clear_dma_irqstat(drv_data->dma_channel);
 
         /* Wait for DMA to complete */
-        while (get_dma_curr_irqstat(CH_SPI) & DMA_RUN)
-                continue;
+        while (get_dma_curr_irqstat(drv_data->dma_channel) & DMA_RUN)
+                cpu_relax();
 
         /*
          * wait for the last transaction shifted out.  HRM states:
@@ -592,18 +634,19 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
          * register until it goes low for 2 successive reads
          */
         if (drv_data->tx != NULL) {
-                while ((bfin_read_SPI_STAT() & TXS) ||
-                       (bfin_read_SPI_STAT() & TXS))
-                        continue;
+                while ((read_STAT(drv_data) & TXS) ||
+                       (read_STAT(drv_data) & TXS))
+                        cpu_relax();
         }
 
-        while (!(bfin_read_SPI_STAT() & SPIF))
-                continue;
-
-        bfin_spi_disable(drv_data);
+        while (!(read_STAT(drv_data) & SPIF))
+                cpu_relax();
 
         msg->actual_length += drv_data->len_in_bytes;
 
+        if (drv_data->cs_change)
+                cs_deactive(drv_data, chip);
+
         /* Move to next transfer */
         msg->state = next_transfer(drv_data);
 
@@ -613,8 +656,8 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
         /* free the irq handler before next transfer */
         dev_dbg(&drv_data->pdev->dev,
                 "disable dma channel irq%d\n",
-                CH_SPI);
-        dma_disable_irq(CH_SPI);
+                drv_data->dma_channel);
+        dma_disable_irq(drv_data->dma_channel);
 
         return IRQ_HANDLED;
 }
@@ -690,31 +733,67 @@ static void pump_transfers(unsigned long data)
         drv_data->rx_dma = transfer->rx_dma;
         drv_data->tx_dma = transfer->tx_dma;
         drv_data->len_in_bytes = transfer->len;
+        drv_data->cs_change = transfer->cs_change;
+
+        /* Bits per word setup */
+        switch (transfer->bits_per_word) {
+        case 8:
+                drv_data->n_bytes = 1;
+                width = CFG_SPI_WORDSIZE8;
+                drv_data->read = chip->cs_change_per_word ?
+                        u8_cs_chg_reader : u8_reader;
+                drv_data->write = chip->cs_change_per_word ?
+                        u8_cs_chg_writer : u8_writer;
+                drv_data->duplex = chip->cs_change_per_word ?
+                        u8_cs_chg_duplex : u8_duplex;
+                break;
+
+        case 16:
+                drv_data->n_bytes = 2;
+                width = CFG_SPI_WORDSIZE16;
+                drv_data->read = chip->cs_change_per_word ?
+                        u16_cs_chg_reader : u16_reader;
+                drv_data->write = chip->cs_change_per_word ?
+                        u16_cs_chg_writer : u16_writer;
+                drv_data->duplex = chip->cs_change_per_word ?
+                        u16_cs_chg_duplex : u16_duplex;
+                break;
+
+        default:
+                /* No change, the same as default setting */
+                drv_data->n_bytes = chip->n_bytes;
+                width = chip->width;
+                drv_data->write = drv_data->tx ? chip->write : null_writer;
+                drv_data->read = drv_data->rx ? chip->read : null_reader;
+                drv_data->duplex = chip->duplex ? chip->duplex : null_writer;
+                break;
+        }
+        cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD));
+        cr |= (width << 8);
+        write_CTRL(drv_data, cr);
 
-        width = chip->width;
         if (width == CFG_SPI_WORDSIZE16) {
                 drv_data->len = (transfer->len) >> 1;
         } else {
                 drv_data->len = transfer->len;
         }
-        drv_data->write = drv_data->tx ? chip->write : null_writer;
-        drv_data->read = drv_data->rx ? chip->read : null_reader;
-        drv_data->duplex = chip->duplex ? chip->duplex : null_writer;
-        dev_dbg(&drv_data->pdev->dev,
-                "transfer: drv_data->write is %p, chip->write is %p, null_wr is %p\n",
-                drv_data->write, chip->write, null_writer);
+        dev_dbg(&drv_data->pdev->dev, "transfer: ",
+                "drv_data->write is %p, chip->write is %p, null_wr is %p\n",
+                drv_data->write, chip->write, null_writer);
 
         /* speed and width has been set on per message */
         message->state = RUNNING_STATE;
         dma_config = 0;
 
-        /* restore spi status for each spi transfer */
-        if (transfer->speed_hz) {
-                write_BAUD(hz_to_spi_baud(transfer->speed_hz));
-        } else {
-                write_BAUD(chip->baud);
-        }
-        write_FLAG(chip->flag);
+        /* Speed setup (surely valid because already checked) */
+        if (transfer->speed_hz)
+                write_BAUD(drv_data, hz_to_spi_baud(transfer->speed_hz));
+        else
+                write_BAUD(drv_data, chip->baud);
+
+        write_STAT(drv_data, BIT_STAT_CLR);
+        cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD));
+        cs_active(drv_data, chip);
 
         dev_dbg(&drv_data->pdev->dev,
                 "now pumping a transfer: width is %d, len is %d\n",
@@ -727,25 +806,25 @@ static void pump_transfers(unsigned long data)
          */
         if (drv_data->cur_chip->enable_dma && drv_data->len > 6) {
 
-                write_STAT(BIT_STAT_CLR);
-                disable_dma(CH_SPI);
-                clear_dma_irqstat(CH_SPI);
+                disable_dma(drv_data->dma_channel);
+                clear_dma_irqstat(drv_data->dma_channel);
                 bfin_spi_disable(drv_data);
 
                 /* config dma channel */
                 dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n");
                 if (width == CFG_SPI_WORDSIZE16) {
-                        set_dma_x_count(CH_SPI, drv_data->len);
-                        set_dma_x_modify(CH_SPI, 2);
+                        set_dma_x_count(drv_data->dma_channel, drv_data->len);
+                        set_dma_x_modify(drv_data->dma_channel, 2);
                         dma_width = WDSIZE_16;
                 } else {
-                        set_dma_x_count(CH_SPI, drv_data->len);
-                        set_dma_x_modify(CH_SPI, 1);
+                        set_dma_x_count(drv_data->dma_channel, drv_data->len);
+                        set_dma_x_modify(drv_data->dma_channel, 1);
                         dma_width = WDSIZE_8;
                 }
 
-                /* set transfer width,direction. And enable spi */
-                cr = (read_CTRL() & (~BIT_CTL_TIMOD));
+                /* poll for SPI completion before start */
+                while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+                        cpu_relax();
 
                 /* dirty hack for autobuffer DMA mode */
                 if (drv_data->tx_dma == 0xFFFF) {
@@ -755,13 +834,18 @@ static void pump_transfers(unsigned long data)
                         /* no irq in autobuffer mode */
                         dma_config =
                             (DMAFLOW_AUTO | RESTART | dma_width | DI_EN);
-                        set_dma_config(CH_SPI, dma_config);
-                        set_dma_start_addr(CH_SPI, (unsigned long)drv_data->tx);
-                        enable_dma(CH_SPI);
-                        write_CTRL(cr | CFG_SPI_DMAWRITE | (width << 8) |
-                                   (CFG_SPI_ENABLE << 14));
-
-                        /* just return here, there can only be one transfer in this mode */
+                        set_dma_config(drv_data->dma_channel, dma_config);
+                        set_dma_start_addr(drv_data->dma_channel,
+                                        (unsigned long)drv_data->tx);
+                        enable_dma(drv_data->dma_channel);
+
+                        /* start SPI transfer */
+                        write_CTRL(drv_data,
+                                (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE));
+
+                        /* just return here, there can only be one transfer
+                         * in this mode
+                         */
                         message->status = 0;
                         giveback(drv_data);
                         return;
@@ -772,58 +856,51 @@ static void pump_transfers(unsigned long data)
                         /* set transfer mode, and enable SPI */
                         dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n");
 
-                        /* disable SPI before write to TDBR */
-                        write_CTRL(cr & ~BIT_CTL_ENABLE);
-
                         /* clear tx reg soformer data is not shifted out */
-                        write_TDBR(0xFF);
+                        write_TDBR(drv_data, 0xFFFF);
 
-                        set_dma_x_count(CH_SPI, drv_data->len);
+                        set_dma_x_count(drv_data->dma_channel, drv_data->len);
 
                         /* start dma */
-                        dma_enable_irq(CH_SPI);
+                        dma_enable_irq(drv_data->dma_channel);
                         dma_config = (WNR | RESTART | dma_width | DI_EN);
-                        set_dma_config(CH_SPI, dma_config);
-                        set_dma_start_addr(CH_SPI, (unsigned long)drv_data->rx);
-                        enable_dma(CH_SPI);
+                        set_dma_config(drv_data->dma_channel, dma_config);
+                        set_dma_start_addr(drv_data->dma_channel,
+                                        (unsigned long)drv_data->rx);
+                        enable_dma(drv_data->dma_channel);
+
+                        /* start SPI transfer */
+                        write_CTRL(drv_data,
+                                (cr | CFG_SPI_DMAREAD | BIT_CTL_ENABLE));
 
-                        cr |=
-                            CFG_SPI_DMAREAD | (width << 8) | (CFG_SPI_ENABLE <<
-                                                              14);
-                        /* set transfer mode, and enable SPI */
-                        write_CTRL(cr);
                 } else if (drv_data->tx != NULL) {
                         dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n");
 
                         /* start dma */
-                        dma_enable_irq(CH_SPI);
+                        dma_enable_irq(drv_data->dma_channel);
                         dma_config = (RESTART | dma_width | DI_EN);
-                        set_dma_config(CH_SPI, dma_config);
-                        set_dma_start_addr(CH_SPI, (unsigned long)drv_data->tx);
-                        enable_dma(CH_SPI);
-
-                        write_CTRL(cr | CFG_SPI_DMAWRITE | (width << 8) |
-                                   (CFG_SPI_ENABLE << 14));
-
+                        set_dma_config(drv_data->dma_channel, dma_config);
+                        set_dma_start_addr(drv_data->dma_channel,
+                                        (unsigned long)drv_data->tx);
+                        enable_dma(drv_data->dma_channel);
+
+                        /* start SPI transfer */
+                        write_CTRL(drv_data,
+                                (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE));
                 }
         } else {
                 /* IO mode write then read */
                 dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n");
 
-                write_STAT(BIT_STAT_CLR);
-
                 if (drv_data->tx != NULL && drv_data->rx != NULL) {
                         /* full duplex mode */
                         BUG_ON((drv_data->tx_end - drv_data->tx) !=
                                (drv_data->rx_end - drv_data->rx));
-                        cr = (read_CTRL() & (~BIT_CTL_TIMOD));  
-                        cr |= CFG_SPI_WRITE | (width << 8) |
-                                (CFG_SPI_ENABLE << 14);
                         dev_dbg(&drv_data->pdev->dev,
                                 "IO duplex: cr is 0x%x\n", cr);
 
-                        write_CTRL(cr);
-                        SSYNC();
+                        /* set SPI transfer mode */
+                        write_CTRL(drv_data, (cr | CFG_SPI_WRITE));
 
                         drv_data->duplex(drv_data);
 
@@ -831,14 +908,11 @@ static void pump_transfers(unsigned long data)
                                 tranf_success = 0;
                 } else if (drv_data->tx != NULL) {
                         /* write only half duplex */
-                        cr = (read_CTRL() & (~BIT_CTL_TIMOD));
-                        cr |= CFG_SPI_WRITE | (width << 8) |
-                                (CFG_SPI_ENABLE << 14);
-                        dev_dbg(&drv_data->pdev->dev, 
+                        dev_dbg(&drv_data->pdev->dev,
                                 "IO write: cr is 0x%x\n", cr);
 
-                        write_CTRL(cr);
-                        SSYNC();
+                        /* set SPI transfer mode */
+                        write_CTRL(drv_data, (cr | CFG_SPI_WRITE));
 
                         drv_data->write(drv_data);
 
@@ -846,14 +920,11 @@ static void pump_transfers(unsigned long data)
                                 tranf_success = 0;
                 } else if (drv_data->rx != NULL) {
                         /* read only half duplex */
-                        cr = (read_CTRL() & (~BIT_CTL_TIMOD));
-                        cr |= CFG_SPI_READ | (width << 8) |
-                                (CFG_SPI_ENABLE << 14);
-                        dev_dbg(&drv_data->pdev->dev, 
+                        dev_dbg(&drv_data->pdev->dev,
                                 "IO read: cr is 0x%x\n", cr);
 
-                        write_CTRL(cr);
-                        SSYNC();
+                        /* set SPI transfer mode */
+                        write_CTRL(drv_data, (cr | CFG_SPI_READ));
 
                         drv_data->read(drv_data);
                         if (drv_data->rx != drv_data->rx_end)
@@ -861,7 +932,7 @@ static void pump_transfers(unsigned long data)
                 }
 
                 if (!tranf_success) {
-                        dev_dbg(&drv_data->pdev->dev, 
+                        dev_dbg(&drv_data->pdev->dev,
                                 "IO write error!\n");
                         message->state = ERROR_STATE;
                 } else {
@@ -881,9 +952,11 @@ static void pump_transfers(unsigned long data)
 /* pop a msg from queue and kick off real transfer */
 static void pump_messages(struct work_struct *work)
 {
-        struct driver_data *drv_data = container_of(work, struct driver_data, pump_messages);
+        struct driver_data *drv_data;
         unsigned long flags;
 
+        drv_data = container_of(work, struct driver_data, pump_messages);
+
         /* Lock queue and check for queue work */
         spin_lock_irqsave(&drv_data->lock, flags);
         if (list_empty(&drv_data->queue) || drv_data->run == QUEUE_STOPPED) {
@@ -902,6 +975,14 @@ static void pump_messages(struct work_struct *work)
         /* Extract head of queue */
         drv_data->cur_msg = list_entry(drv_data->queue.next,
                                        struct spi_message, queue);
+
+        /* Setup the SSP using the per chip configuration */
+        drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi);
+        if (restore_state(drv_data)) {
+                spin_unlock_irqrestore(&drv_data->lock, flags);
+                return;
+        };
+
         list_del_init(&drv_data->cur_msg->queue);
 
         /* Initial message state */
@@ -909,15 +990,12 @@ static void pump_messages(struct work_struct *work)
         drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next,
                                             struct spi_transfer, transfer_list);
 
-        /* Setup the SSP using the per chip configuration */
-        drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi);
-        restore_state(drv_data);
+        dev_dbg(&drv_data->pdev->dev, "got a message to pump, "
+                "state is set to: baud %d, flag 0x%x, ctl 0x%x\n",
+                drv_data->cur_chip->baud, drv_data->cur_chip->flag,
+                drv_data->cur_chip->ctl_reg);
+
         dev_dbg(&drv_data->pdev->dev,
-                "got a message to pump, state is set to: baud %d, flag 0x%x, ctl 0x%x\n",
-                drv_data->cur_chip->baud, drv_data->cur_chip->flag,
-                drv_data->cur_chip->ctl_reg);
-        
-        dev_dbg(&drv_data->pdev->dev, 
                 "the first transfer len is %d\n",
                 drv_data->cur_transfer->len);
 
@@ -959,6 +1037,22 @@ static int transfer(struct spi_device *spi, struct spi_message *msg)
         return 0;
 }
 
+#define MAX_SPI_SSEL    7
+
+static u16 ssel[3][MAX_SPI_SSEL] = {
+        {P_SPI0_SSEL1, P_SPI0_SSEL2, P_SPI0_SSEL3,
+        P_SPI0_SSEL4, P_SPI0_SSEL5,
+        P_SPI0_SSEL6, P_SPI0_SSEL7},
+
+        {P_SPI1_SSEL1, P_SPI1_SSEL2, P_SPI1_SSEL3,
+        P_SPI1_SSEL4, P_SPI1_SSEL5,
+        P_SPI1_SSEL6, P_SPI1_SSEL7},
+
+        {P_SPI2_SSEL1, P_SPI2_SSEL2, P_SPI2_SSEL3,
+        P_SPI2_SSEL4, P_SPI2_SSEL5,
+        P_SPI2_SSEL6, P_SPI2_SSEL7},
+};
+
 /* first setup for new devices */
 static int setup(struct spi_device *spi)
 {
@@ -993,6 +1087,18 @@ static int setup(struct spi_device *spi)
 
         /* chip_info isn't always needed */
         if (chip_info) {
+                /* Make sure people stop trying to set fields via ctl_reg
+                 * when they should actually be using common SPI framework.
+                 * Currently we let through: WOM EMISO PSSE GM SZ TIMOD.
+                 * Not sure if a user actually needs/uses any of these,
+                 * but let's assume (for now) they do.
+                 */
+                if (chip_info->ctl_reg & (SPE|MSTR|CPOL|CPHA|LSBF|SIZE)) {
+                        dev_err(&spi->dev, "do not set bits in ctl_reg "
+                                "that the SPI framework manages\n");
+                        return -EINVAL;
+                }
+
                 chip->enable_dma = chip_info->enable_dma != 0
                     && drv_data->master_info->enable_dma;
                 chip->ctl_reg = chip_info->ctl_reg;
@@ -1015,20 +1121,20 @@ static int setup(struct spi_device *spi)
          * if any one SPI chip is registered and wants DMA, request the
          * DMA channel for it
          */
-        if (chip->enable_dma && !dma_requested) {
+        if (chip->enable_dma && !drv_data->dma_requested) {
                 /* register dma irq handler */
-                if (request_dma(CH_SPI, "BF53x_SPI_DMA") < 0) {
+                if (request_dma(drv_data->dma_channel, "BF53x_SPI_DMA") < 0) {
                         dev_dbg(&spi->dev,
                                 "Unable to request BlackFin SPI DMA channel\n");
                         return -ENODEV;
                 }
-                if (set_dma_callback(CH_SPI, (void *)dma_irq_handler, drv_data)
-                    < 0) {
+                if (set_dma_callback(drv_data->dma_channel,
+                        (void *)dma_irq_handler, drv_data) < 0) {
                         dev_dbg(&spi->dev, "Unable to set dma callback\n");
                         return -EPERM;
                 }
-                dma_disable_irq(CH_SPI);
-                dma_requested = 1;
+                dma_disable_irq(drv_data->dma_channel);
+                drv_data->dma_requested = 1;
         }
 
         /*
@@ -1077,6 +1183,14 @@ static int setup(struct spi_device *spi)
 
         spi_set_ctldata(spi, chip);
 
+        dev_dbg(&spi->dev, "chip select number is %d\n", chip->chip_select_num);
+        if ((chip->chip_select_num > 0)
+                && (chip->chip_select_num <= spi->master->num_chipselect))
+                peripheral_request(ssel[spi->master->bus_num]
+                        [chip->chip_select_num-1], DRV_NAME);
+
+        cs_deactive(drv_data, chip);
+
         return 0;
 }
 
@@ -1088,6 +1202,11 @@ static void cleanup(struct spi_device *spi)
 {
         struct chip_data *chip = spi_get_ctldata(spi);
 
+        if ((chip->chip_select_num > 0)
+                && (chip->chip_select_num <= spi->master->num_chipselect))
+                peripheral_free(ssel[spi->master->bus_num]
+                                        [chip->chip_select_num-1]);
+
         kfree(chip);
 }
 
@@ -1183,6 +1302,7 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
         struct bfin5xx_spi_master *platform_info;
         struct spi_master *master;
         struct driver_data *drv_data = 0;
+        struct resource *res;
         int status = 0;
 
         platform_info = dev->platform_data;
@@ -1193,10 +1313,12 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
                 dev_err(&pdev->dev, "can not alloc spi_master\n");
                 return -ENOMEM;
         }
+
         drv_data = spi_master_get_devdata(master);
         drv_data->master = master;
         drv_data->master_info = platform_info;
         drv_data->pdev = pdev;
+        drv_data->pin_req = platform_info->pin_req;
 
         master->bus_num = pdev->id;
         master->num_chipselect = platform_info->num_chipselect;
@@ -1204,15 +1326,38 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
         master->setup = setup;
         master->transfer = transfer;
 
+        /* Find and map our resources */
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (res == NULL) {
+                dev_err(dev, "Cannot get IORESOURCE_MEM\n");
+                status = -ENOENT;
+                goto out_error_get_res;
+        }
+
+        drv_data->regs_base = ioremap(res->start, (res->end - res->start + 1));
+        if (drv_data->regs_base == NULL) {
+                dev_err(dev, "Cannot map IO\n");
+                status = -ENXIO;
+                goto out_error_ioremap;
+        }
+
+        drv_data->dma_channel = platform_get_irq(pdev, 0);
+        if (drv_data->dma_channel < 0) {
+                dev_err(dev, "No DMA channel specified\n");
+                status = -ENOENT;
+                goto out_error_no_dma_ch;
+        }
+
         /* Initial and start queue */
         status = init_queue(drv_data);
         if (status != 0) {
-                dev_err(&pdev->dev, "problem initializing queue\n");
+                dev_err(dev, "problem initializing queue\n");
                 goto out_error_queue_alloc;
         }
+
         status = start_queue(drv_data);
         if (status != 0) {
-                dev_err(&pdev->dev, "problem starting queue\n");
+                dev_err(dev, "problem starting queue\n");
                 goto out_error_queue_alloc;
         }
 
@@ -1220,15 +1365,30 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
         platform_set_drvdata(pdev, drv_data);
         status = spi_register_master(master);
         if (status != 0) {
-                dev_err(&pdev->dev, "problem registering spi master\n");
+                dev_err(dev, "problem registering spi master\n");
                 goto out_error_queue_alloc;
         }
-        dev_dbg(&pdev->dev, "controller probe successfully\n");
+
+        status = peripheral_request_list(drv_data->pin_req, DRV_NAME);
+        if (status != 0) {
+                dev_err(&pdev->dev, ": Requesting Peripherals failed\n");
+                goto out_error;
+        }
+
+        dev_info(dev, "%s, Version %s, regs_base@%p, dma channel@%d\n",
+                DRV_DESC, DRV_VERSION, drv_data->regs_base,
+                drv_data->dma_channel);
         return status;
 
-      out_error_queue_alloc:
+out_error_queue_alloc:
         destroy_queue(drv_data);
+out_error_no_dma_ch:
+        iounmap((void *) drv_data->regs_base);
+out_error_ioremap:
+out_error_get_res:
+out_error:
         spi_master_put(master);
+
         return status;
 }
 
@@ -1251,13 +1411,15 @@ static int __devexit bfin5xx_spi_remove(struct platform_device *pdev)
 
         /* Release DMA */
         if (drv_data->master_info->enable_dma) {
-                if (dma_channel_active(CH_SPI))
-                        free_dma(CH_SPI);
+                if (dma_channel_active(drv_data->dma_channel))
+                        free_dma(drv_data->dma_channel);
         }
 
         /* Disconnect from the SPI framework */
         spi_unregister_master(drv_data->master);
 
+        peripheral_free_list(drv_data->pin_req);
+
         /* Prevent double remove */
         platform_set_drvdata(pdev, NULL);
 
@@ -1305,7 +1467,7 @@ static int bfin5xx_spi_resume(struct platform_device *pdev)
 MODULE_ALIAS("bfin-spi-master");        /* for platform bus hotplug */
 static struct platform_driver bfin5xx_spi_driver = {
         .driver = {
-                .name   = "bfin-spi-master",
+                .name   = DRV_NAME,
                 .owner  = THIS_MODULE,
         },
         .suspend        = bfin5xx_spi_suspend,
diff --git a/fs/aio.c b/fs/aio.c
index f12db415c0f6..9dec7d2d546e 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -1161,7 +1161,12 @@ retry:
                         ret = 0;
                         if (to.timed_out)       /* Only check after read evt */
                                 break;
-                        io_schedule();
+                        /* Try to only show up in io wait if there are ops
+                         *  in flight */
+                        if (ctx->reqs_active)
+                                io_schedule();
+                        else
+                                schedule();
                         if (signal_pending(tsk)) {
                                 ret = -EINTR;
                                 break;
diff --git a/fs/bfs/inode.c b/fs/bfs/inode.c
index 294c41baef6e..a64a71d444f5 100644
--- a/fs/bfs/inode.c
+++ b/fs/bfs/inode.c
@@ -178,7 +178,8 @@ static void bfs_delete_inode(struct inode *inode)
         brelse(bh);
 
         if (bi->i_dsk_ino) {
-                info->si_freeb += BFS_FILEBLOCKS(bi);
+                if (bi->i_sblock)
+                        info->si_freeb += bi->i_eblock + 1 - bi->i_sblock;
                 info->si_freei++;
                 clear_bit(ino, info->si_imap);
                 dump_imap("delete_inode", s);
diff --git a/fs/cifs/cifsacl.c b/fs/cifs/cifsacl.c
index f02fdef463a7..c312adcba4fc 100644
--- a/fs/cifs/cifsacl.c
+++ b/fs/cifs/cifsacl.c
@@ -134,9 +134,10 @@ int compare_sids(const struct cifs_sid *ctsid, const struct cifs_sid *cwsid)
    pmode is the existing mode (we only want to overwrite part of this
    bits to set can be: S_IRWXU, S_IRWXG or S_IRWXO ie 00700 or 00070 or 00007
 */
-static void access_flags_to_mode(__u32 ace_flags, int type, umode_t *pmode,
+static void access_flags_to_mode(__le32 ace_flags, int type, umode_t *pmode,
                                  umode_t *pbits_to_set)
 {
+        __u32 flags = le32_to_cpu(ace_flags);
         /* the order of ACEs is important.  The canonical order is to begin with
            DENY entries followed by ALLOW, otherwise an allow entry could be
            encountered first, making the subsequent deny entry like "dead code"
@@ -146,17 +147,17 @@ static void access_flags_to_mode(__u32 ace_flags, int type, umode_t *pmode,
         /* For deny ACEs we change the mask so that subsequent allow access
            control entries do not turn on the bits we are denying */
         if (type == ACCESS_DENIED) {
-                if (ace_flags & GENERIC_ALL) {
+                if (flags & GENERIC_ALL) {
                         *pbits_to_set &= ~S_IRWXUGO;
                 }
-                if ((ace_flags & GENERIC_WRITE) ||
-                        ((ace_flags & FILE_WRITE_RIGHTS) == FILE_WRITE_RIGHTS))
+                if ((flags & GENERIC_WRITE) ||
+                        ((flags & FILE_WRITE_RIGHTS) == FILE_WRITE_RIGHTS))
                         *pbits_to_set &= ~S_IWUGO;
-                if ((ace_flags & GENERIC_READ) ||
-                        ((ace_flags & FILE_READ_RIGHTS) == FILE_READ_RIGHTS))
+                if ((flags & GENERIC_READ) ||
+                        ((flags & FILE_READ_RIGHTS) == FILE_READ_RIGHTS))
                         *pbits_to_set &= ~S_IRUGO;
-                if ((ace_flags & GENERIC_EXECUTE) ||
-                        ((ace_flags & FILE_EXEC_RIGHTS) == FILE_EXEC_RIGHTS))
+                if ((flags & GENERIC_EXECUTE) ||
+                        ((flags & FILE_EXEC_RIGHTS) == FILE_EXEC_RIGHTS))
                         *pbits_to_set &= ~S_IXUGO;
                 return;
         } else if (type != ACCESS_ALLOWED) {
@@ -165,25 +166,25 @@ static void access_flags_to_mode(__u32 ace_flags, int type, umode_t *pmode,
         }
         /* else ACCESS_ALLOWED type */
 
-        if (ace_flags & GENERIC_ALL) {
+        if (flags & GENERIC_ALL) {
                 *pmode |= (S_IRWXUGO & (*pbits_to_set));
 #ifdef CONFIG_CIFS_DEBUG2
                 cFYI(1, ("all perms"));
 #endif
                 return;
         }
-        if ((ace_flags & GENERIC_WRITE) ||
-                        ((ace_flags & FILE_WRITE_RIGHTS) == FILE_WRITE_RIGHTS))
+        if ((flags & GENERIC_WRITE) ||
+                        ((flags & FILE_WRITE_RIGHTS) == FILE_WRITE_RIGHTS))
                 *pmode |= (S_IWUGO & (*pbits_to_set));
-        if ((ace_flags & GENERIC_READ) ||
-                        ((ace_flags & FILE_READ_RIGHTS) == FILE_READ_RIGHTS))
+        if ((flags & GENERIC_READ) ||
+                        ((flags & FILE_READ_RIGHTS) == FILE_READ_RIGHTS))
                 *pmode |= (S_IRUGO & (*pbits_to_set));
-        if ((ace_flags & GENERIC_EXECUTE) ||
-                        ((ace_flags & FILE_EXEC_RIGHTS) == FILE_EXEC_RIGHTS))
+        if ((flags & GENERIC_EXECUTE) ||
+                        ((flags & FILE_EXEC_RIGHTS) == FILE_EXEC_RIGHTS))
                 *pmode |= (S_IXUGO & (*pbits_to_set));
 
 #ifdef CONFIG_CIFS_DEBUG2
-        cFYI(1, ("access flags 0x%x mode now 0x%x", ace_flags, *pmode));
+        cFYI(1, ("access flags 0x%x mode now 0x%x", flags, *pmode));
 #endif
         return;
 }
diff --git a/fs/jbd/checkpoint.c b/fs/jbd/checkpoint.c
index 47552d4a6324..0f69c416eebc 100644
--- a/fs/jbd/checkpoint.c
+++ b/fs/jbd/checkpoint.c
@@ -602,15 +602,15 @@ int __journal_remove_checkpoint(struct journal_head *jh)
 
         /*
          * There is one special case to worry about: if we have just pulled the
-         * buffer off a committing transaction's forget list, then even if the
-         * checkpoint list is empty, the transaction obviously cannot be
-         * dropped!
+         * buffer off a running or committing transaction's checkpoing list,
+         * then even if the checkpoint list is empty, the transaction obviously
+         * cannot be dropped!
          *
-         * The locking here around j_committing_transaction is a bit sleazy.
+         * The locking here around t_state is a bit sleazy.
          * See the comment at the end of journal_commit_transaction().
          */
-        if (transaction == journal->j_committing_transaction) {
-                JBUFFER_TRACE(jh, "belongs to committing transaction");
+        if (transaction->t_state != T_FINISHED) {
+                JBUFFER_TRACE(jh, "belongs to running/committing transaction");
                 goto out;
         }
 
diff --git a/fs/jbd/commit.c b/fs/jbd/commit.c
index 8f1f2aa5fb39..610264b99a8e 100644
--- a/fs/jbd/commit.c
+++ b/fs/jbd/commit.c
@@ -858,10 +858,10 @@ restart_loop:
         }
         spin_unlock(&journal->j_list_lock);
         /*
-         * This is a bit sleazy.  We borrow j_list_lock to protect
-         * journal->j_committing_transaction in __journal_remove_checkpoint.
-         * Really, __journal_remove_checkpoint should be using j_state_lock but
-         * it's a bit hassle to hold that across __journal_remove_checkpoint
+         * This is a bit sleazy.  We use j_list_lock to protect transition
+         * of a transaction into T_FINISHED state and calling
+         * __journal_drop_transaction(). Otherwise we could race with
+         * other checkpointing code processing the transaction...
          */
         spin_lock(&journal->j_state_lock);
         spin_lock(&journal->j_list_lock);
diff --git a/fs/ocfs2/cluster/tcp.c b/fs/ocfs2/cluster/tcp.c
index d84bd155997b..ee50c9610e7f 100644
--- a/fs/ocfs2/cluster/tcp.c
+++ b/fs/ocfs2/cluster/tcp.c
@@ -72,14 +72,6 @@
 
 #include "tcp_internal.h"
 
-/* 
- * The linux network stack isn't sparse endian clean.. It has macros like
- * ntohs() which perform the endian checks and structs like sockaddr_in
- * which aren't annotated.  So __force is found here to get the build
- * clean.  When they emerge from the dark ages and annotate the code
- * we can remove these.
- */
-
 #define SC_NODEF_FMT "node %s (num %u) at %u.%u.%u.%u:%u"
 #define SC_NODEF_ARGS(sc) sc->sc_node->nd_name, sc->sc_node->nd_num,    \
                           NIPQUAD(sc->sc_node->nd_ipv4_address),        \
@@ -1500,7 +1492,7 @@ static void o2net_start_connect(struct work_struct *work)
 
         myaddr.sin_family = AF_INET;
         myaddr.sin_addr.s_addr = mynode->nd_ipv4_address;
-        myaddr.sin_port = (__force u16)htons(0); /* any port */
+        myaddr.sin_port = htons(0); /* any port */
 
         ret = sock->ops->bind(sock, (struct sockaddr *)&myaddr,
                               sizeof(myaddr));
@@ -1701,11 +1693,11 @@ static int o2net_accept_one(struct socket *sock)
         if (ret < 0)
                 goto out;
 
-        node = o2nm_get_node_by_ip((__force __be32)sin.sin_addr.s_addr);
+        node = o2nm_get_node_by_ip(sin.sin_addr.s_addr);
         if (node == NULL) {
                 mlog(ML_NOTICE, "attempt to connect from unknown node at "
                      "%u.%u.%u.%u:%d\n", NIPQUAD(sin.sin_addr.s_addr),
-                     ntohs((__force __be16)sin.sin_port));
+                     ntohs(sin.sin_port));
                 ret = -EINVAL;
                 goto out;
         }
@@ -1714,7 +1706,7 @@ static int o2net_accept_one(struct socket *sock)
                 mlog(ML_NOTICE, "unexpected connect attempted from a lower "
                      "numbered node '%s' at " "%u.%u.%u.%u:%d with num %u\n",
                      node->nd_name, NIPQUAD(sin.sin_addr.s_addr),
-                     ntohs((__force __be16)sin.sin_port), node->nd_num);
+                     ntohs(sin.sin_port), node->nd_num);
                 ret = -EINVAL;
                 goto out;
         }
@@ -1725,7 +1717,7 @@ static int o2net_accept_one(struct socket *sock)
                 mlog(ML_CONN, "attempt to connect from node '%s' at "
                      "%u.%u.%u.%u:%d but it isn't heartbeating\n",
                      node->nd_name, NIPQUAD(sin.sin_addr.s_addr),
-                     ntohs((__force __be16)sin.sin_port));
+                     ntohs(sin.sin_port));
                 ret = -EINVAL;
                 goto out;
         }
@@ -1742,7 +1734,7 @@ static int o2net_accept_one(struct socket *sock)
                 mlog(ML_NOTICE, "attempt to connect from node '%s' at "
                      "%u.%u.%u.%u:%d but it already has an open connection\n",
                      node->nd_name, NIPQUAD(sin.sin_addr.s_addr),
-                     ntohs((__force __be16)sin.sin_port));
+                     ntohs(sin.sin_port));
                 goto out;
         }
 
diff --git a/fs/proc/generic.c b/fs/proc/generic.c
index 5fccfe222a63..8d49838e5554 100644
--- a/fs/proc/generic.c
+++ b/fs/proc/generic.c
@@ -595,6 +595,7 @@ static struct proc_dir_entry *proc_create(struct proc_dir_entry **parent,
         ent->namelen = len;
         ent->mode = mode;
         ent->nlink = nlink;
+        atomic_set(&ent->count, 1);
         ent->pde_users = 0;
         spin_lock_init(&ent->pde_unload_lock);
         ent->pde_unload_completion = NULL;
@@ -692,7 +693,6 @@ void free_proc_entry(struct proc_dir_entry *de)
 
 /*
  * Remove a /proc entry and free it if it's not currently in use.
- * If it is in use, we set the 'deleted' flag.
  */
 void remove_proc_entry(const char *name, struct proc_dir_entry *parent)
 {
@@ -741,13 +741,8 @@ continue_removing:
                         parent->nlink--;
                 de->nlink = 0;
                 WARN_ON(de->subdir);
-                if (!atomic_read(&de->count))
+                if (atomic_dec_and_test(&de->count))
                         free_proc_entry(de);
-                else {
-                        de->deleted = 1;
-                        printk("remove_proc_entry: %s/%s busy, count=%d\n",
-                                parent->name, de->name, atomic_read(&de->count));
-                }
                 break;
         }
         spin_unlock(&proc_subdir_lock);
diff --git a/fs/proc/inode.c b/fs/proc/inode.c
index abe6a3f04368..1a551d92e1d8 100644
--- a/fs/proc/inode.c
+++ b/fs/proc/inode.c
@@ -43,13 +43,8 @@ void de_put(struct proc_dir_entry *de)
                         return;
                 }
 
-                if (atomic_dec_and_test(&de->count)) {
-                        if (de->deleted) {
-                                printk("de_put: deferred delete of %s\n",
-                                        de->name);
-                                free_proc_entry(de);
-                        }
-                }               
+                if (atomic_dec_and_test(&de->count))
+                        free_proc_entry(de);
                 unlock_kernel();
         }
 }
diff --git a/fs/proc/root.c b/fs/proc/root.c
index ec9cb3b6c93b..81f99e691f99 100644
--- a/fs/proc/root.c
+++ b/fs/proc/root.c
@@ -207,6 +207,7 @@ struct proc_dir_entry proc_root = {
         .name           = "/proc",
         .mode           = S_IFDIR | S_IRUGO | S_IXUGO, 
         .nlink          = 2, 
+        .count          = ATOMIC_INIT(1),
         .proc_iops      = &proc_root_inode_operations, 
         .proc_fops      = &proc_root_operations,
         .parent         = &proc_root,
diff --git a/fs/reiserfs/procfs.c b/fs/reiserfs/procfs.c
index 9aa7a06e093f..001144621672 100644
--- a/fs/reiserfs/procfs.c
+++ b/fs/reiserfs/procfs.c
@@ -420,12 +420,6 @@ static void *r_start(struct seq_file *m, loff_t * pos)
                 return NULL;
 
         up_write(&s->s_umount);
-
-        if (de->deleted) {
-                deactivate_super(s);
-                return NULL;
-        }
-
         return s;
 }
 
diff --git a/fs/ufs/dir.c b/fs/ufs/dir.c
index 30f8c2bb0c3e..aaf2878305ce 100644
--- a/fs/ufs/dir.c
+++ b/fs/ufs/dir.c
@@ -179,7 +179,7 @@ bad_entry:
         goto fail;
 Eend:
         p = (struct ufs_dir_entry *)(kaddr + offs);
-        ufs_error (sb, "ext2_check_page",
+        ufs_error(sb, __FUNCTION__,
                    "entry in directory #%lu spans the page boundary"
                    "offset=%lu",
                    dir->i_ino, (page->index<<PAGE_CACHE_SHIFT)+offs);
diff --git a/fs/ufs/super.c b/fs/ufs/super.c
index c78c04fd993f..0072cb33ebec 100644
--- a/fs/ufs/super.c
+++ b/fs/ufs/super.c
@@ -755,13 +755,13 @@ static int ufs_fill_super(struct super_block *sb, void *data, int silent)
                 break;
         
         case UFS_MOUNT_UFSTYPE_NEXTSTEP:
-                /*TODO: check may be we need set special dir block size?*/
                 UFSD("ufstype=nextstep\n");
                 uspi->s_fsize = block_size = 1024;
                 uspi->s_fmask = ~(1024 - 1);
                 uspi->s_fshift = 10;
                 uspi->s_sbsize = super_block_size = 2048;
                 uspi->s_sbbase = 0;
+                uspi->s_dirblksize = 1024;
                 flags |= UFS_DE_OLD | UFS_UID_OLD | UFS_ST_OLD | UFS_CG_OLD;
                 if (!(sb->s_flags & MS_RDONLY)) {
                         if (!silent)
@@ -771,13 +771,13 @@ static int ufs_fill_super(struct super_block *sb, void *data, int silent)
                 break;
         
         case UFS_MOUNT_UFSTYPE_NEXTSTEP_CD:
-                /*TODO: check may be we need set special dir block size?*/
                 UFSD("ufstype=nextstep-cd\n");
                 uspi->s_fsize = block_size = 2048;
                 uspi->s_fmask = ~(2048 - 1);
                 uspi->s_fshift = 11;
                 uspi->s_sbsize = super_block_size = 2048;
                 uspi->s_sbbase = 0;
+                uspi->s_dirblksize = 1024;
                 flags |= UFS_DE_OLD | UFS_UID_OLD | UFS_ST_OLD | UFS_CG_OLD;
                 if (!(sb->s_flags & MS_RDONLY)) {
                         if (!silent)
diff --git a/include/asm-blackfin/bfin5xx_spi.h b/include/asm-blackfin/bfin5xx_spi.h
index f617d8765451..1a0b57f6a3d4 100644
--- a/include/asm-blackfin/bfin5xx_spi.h
+++ b/include/asm-blackfin/bfin5xx_spi.h
@@ -152,6 +152,7 @@
 struct bfin5xx_spi_master {
         u16 num_chipselect;
         u8 enable_dma;
+        u16 pin_req[4];
 };
 
 /* spi_board_info.controller_data for SPI slave devices,
@@ -162,7 +163,7 @@ struct bfin5xx_spi_chip {
         u8 enable_dma;
         u8 bits_per_word;
         u8 cs_change_per_word;
-        u8 cs_chg_udelay;
+        u16 cs_chg_udelay; /* Some devices require 16-bit delays */
 };
 
 #endif /* _SPI_CHANNEL_H_ */
diff --git a/include/asm-blackfin/mach-bf533/portmux.h b/include/asm-blackfin/mach-bf533/portmux.h
index b88d7a03ee3e..137f4884acfe 100644
--- a/include/asm-blackfin/mach-bf533/portmux.h
+++ b/include/asm-blackfin/mach-bf533/portmux.h
@@ -42,7 +42,7 @@
 #define P_SPORT0_DRPRI  (P_DONTCARE)
 
 #define P_SPI0_MOSI     (P_DONTCARE)
-#define P_SPI0_MIS0     (P_DONTCARE)
+#define P_SPI0_MISO     (P_DONTCARE)
 #define P_SPI0_SCK      (P_DONTCARE)
 #define P_SPI0_SSEL7    (P_DEFINED | P_IDENT(GPIO_PF7))
 #define P_SPI0_SSEL6    (P_DEFINED | P_IDENT(GPIO_PF6))
diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h
index da979cb62f7d..319a48590c9c 100644
--- a/include/asm-blackfin/mach-bf548/defBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h
@@ -1644,8 +1644,25 @@
 #define                   RESTART  0x20       /* Work Unit Transitions */
 #define                    DI_SEL  0x40       /* Data Interrupt Timing Select */
 #define                     DI_EN  0x80       /* Data Interrupt Enable */
+
 #define                    NDSIZE  0xf00      /* Flex Descriptor Size */
+#define                  NDSIZE_0 0x0000      /* Next Descriptor Size = 0 (Stop/Autobuffer) */
+#define                  NDSIZE_1 0x0100      /* Next Descriptor Size = 1 */
+#define                  NDSIZE_2 0x0200      /* Next Descriptor Size = 2 */
+#define                  NDSIZE_3 0x0300      /* Next Descriptor Size = 3 */
+#define                  NDSIZE_4 0x0400      /* Next Descriptor Size = 4 */
+#define                  NDSIZE_5 0x0500      /* Next Descriptor Size = 5 */
+#define                  NDSIZE_6 0x0600      /* Next Descriptor Size = 6 */
+#define                  NDSIZE_7 0x0700      /* Next Descriptor Size = 7 */
+#define                  NDSIZE_8 0x0800      /* Next Descriptor Size = 8 */
+#define                  NDSIZE_9 0x0900      /* Next Descriptor Size = 9 */
+
 #define                   DMAFLOW  0xf000     /* Next Operation */
+#define              DMAFLOW_STOP  0x0000     /* Stop Mode */
+#define              DMAFLOW_AUTO  0x1000     /* Autobuffer Mode */
+#define             DMAFLOW_ARRAY  0x4000     /* Descriptor Array Mode */
+#define             DMAFLOW_SMALL  0x6000     /* Small Model Descriptor List Mode */
+#define             DMAFLOW_LARGE  0x7000     /* Large Model Descriptor List Mode */
 
 /* Bit masks for DMAx_IRQ_STATUS, MDMA_Sx_IRQ_STATUS, MDMA_Dx_IRQ_STATUS */
 
diff --git a/include/linux/jbd.h b/include/linux/jbd.h
index 16e7ed855a18..d9ecd13393b0 100644
--- a/include/linux/jbd.h
+++ b/include/linux/jbd.h
@@ -439,6 +439,8 @@ struct transaction_s
         /*
          * Transaction's current state
          * [no locking - only kjournald alters this]
+         * [j_list_lock] guards transition of a transaction into T_FINISHED
+         * state and subsequent call of __journal_drop_transaction()
          * FIXME: needs barriers
          * KLUDGE: [use j_state_lock]
          */
diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h
index 523528d237b0..a5316829215b 100644
--- a/include/linux/proc_fs.h
+++ b/include/linux/proc_fs.h
@@ -77,7 +77,6 @@ struct proc_dir_entry {
         read_proc_t *read_proc;
         write_proc_t *write_proc;
         atomic_t count;         /* use count */
-        int deleted;            /* delete flag */
         int pde_users;  /* number of callers into module in progress */
         spinlock_t pde_unload_lock; /* proc_fops checks and pde_users bumps */
         struct completion *pde_unload_completion;
diff --git a/kernel/fork.c b/kernel/fork.c
index 8ca1a14cdc8c..8dd8ff281009 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -1292,23 +1292,14 @@ static struct task_struct *copy_process(unsigned long clone_flags,
                         __ptrace_link(p, current->parent);
 
                 if (thread_group_leader(p)) {
-                        if (clone_flags & CLONE_NEWPID) {
+                        if (clone_flags & CLONE_NEWPID)
                                 p->nsproxy->pid_ns->child_reaper = p;
-                                p->signal->tty = NULL;
-                                set_task_pgrp(p, p->pid);
-                                set_task_session(p, p->pid);
-                                attach_pid(p, PIDTYPE_PGID, pid);
-                                attach_pid(p, PIDTYPE_SID, pid);
-                        } else {
-                                p->signal->tty = current->signal->tty;
-                                set_task_pgrp(p, task_pgrp_nr(current));
-                                set_task_session(p, task_session_nr(current));
-                                attach_pid(p, PIDTYPE_PGID,
-                                                task_pgrp(current));
-                                attach_pid(p, PIDTYPE_SID,
-                                                task_session(current));
-                        }
 
+                        p->signal->tty = current->signal->tty;
+                        set_task_pgrp(p, task_pgrp_nr(current));
+                        set_task_session(p, task_session_nr(current));
+                        attach_pid(p, PIDTYPE_PGID, task_pgrp(current));
+                        attach_pid(p, PIDTYPE_SID, task_session(current));
                         list_add_tail_rcu(&p->tasks, &init_task.tasks);
                         __get_cpu_var(process_counts)++;
                 }
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 0deed82a6156..8ac51714b08c 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -1588,6 +1588,10 @@ struct ctl_table_header *register_sysctl_table(struct ctl_table * table)
 void unregister_sysctl_table(struct ctl_table_header * header)
 {
         might_sleep();
+
+        if (header == NULL)
+                return;
+
         spin_lock(&sysctl_lock);
         start_unregistering(header);
         spin_unlock(&sysctl_lock);
diff --git a/mm/backing-dev.c b/mm/backing-dev.c
index b0ceb29da4c7..e8644b1e5527 100644
--- a/mm/backing-dev.c
+++ b/mm/backing-dev.c
@@ -7,7 +7,7 @@
 
 int bdi_init(struct backing_dev_info *bdi)
 {
-        int i, j;
+        int i;
         int err;
 
         for (i = 0; i < NR_BDI_STAT_ITEMS; i++) {
@@ -21,7 +21,7 @@ int bdi_init(struct backing_dev_info *bdi)
 
         if (err) {
 err:
-                for (j = 0; j < i; j++)
+                while (i--)
                         percpu_counter_destroy(&bdi->bdi_stat[i]);
         }
 
diff --git a/mm/filemap_xip.c b/mm/filemap_xip.c
index 32132f3cd641..e233fff61b4b 100644
--- a/mm/filemap_xip.c
+++ b/mm/filemap_xip.c
@@ -314,7 +314,7 @@ __xip_file_write(struct file *filp, const char __user *buf,
                 fault_in_pages_readable(buf, bytes);
                 kaddr = kmap_atomic(page, KM_USER0);
                 copied = bytes -
-                        __copy_from_user_inatomic_nocache(kaddr, buf, bytes);
+                        __copy_from_user_inatomic_nocache(kaddr + offset, buf, bytes);
                 kunmap_atomic(kaddr, KM_USER0);
                 flush_dcache_page(page);
 
diff --git a/mm/mmap.c b/mm/mmap.c
index facc1a75bd4f..acfc13f23ca0 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -1934,6 +1934,10 @@ unsigned long do_brk(unsigned long addr, unsigned long len)
         if (is_hugepage_only_range(mm, addr, len))
                 return -EINVAL;
 
+        error = security_file_mmap(0, 0, 0, 0, addr, 1);
+        if (error)
+                return error;
+
         flags = VM_DATA_DEFAULT_FLAGS | VM_ACCOUNT | mm->def_flags;
 
         error = arch_mmap_check(addr, len, flags);
diff --git a/mm/slab.c b/mm/slab.c
index 202465a193c1..2e338a5f7b14 100644
--- a/mm/slab.c
+++ b/mm/slab.c
@@ -4475,3 +4475,4 @@ size_t ksize(const void *objp)
 
         return obj_size(virt_to_cache(objp));
 }
+EXPORT_SYMBOL(ksize);
diff --git a/mm/slob.c b/mm/slob.c
index 08a9bd91a1aa..ee2ef8af0d43 100644
--- a/mm/slob.c
+++ b/mm/slob.c
@@ -495,6 +495,7 @@ size_t ksize(const void *block)
         else
                 return sp->page.private;
 }
+EXPORT_SYMBOL(ksize);
 
 struct kmem_cache {
         unsigned int size, align;
diff --git a/mm/slub.c b/mm/slub.c
index 9acb413858ac..b9f37cb0f2e6 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -2558,8 +2558,12 @@ size_t ksize(const void *object)
         if (unlikely(object == ZERO_SIZE_PTR))
                 return 0;
 
-        page = get_object_page(object);
+        page = virt_to_head_page(object);
         BUG_ON(!page);
+
+        if (unlikely(!PageSlab(page)))
+                return PAGE_SIZE << compound_order(page);
+
         s = page->slab;
         BUG_ON(!s);