diff options
-rw-r--r-- | arch/arm/Kconfig | 3 | ||||
-rw-r--r-- | arch/arm/include/asm/mach/pci.h | 6 | ||||
-rw-r--r-- | arch/arm/include/asm/pci.h | 7 | ||||
-rw-r--r-- | arch/arm/kernel/bios32.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-cns3xxx/pcie.c | 40 | ||||
-rw-r--r-- | arch/arm64/kernel/pci.c | 22 | ||||
-rw-r--r-- | drivers/pci/host/pci-keystone.c | 4 | ||||
-rw-r--r-- | drivers/pci/host/pci-layerscape.c | 1 | ||||
-rw-r--r-- | drivers/pci/host/pci-mvebu.c | 15 | ||||
-rw-r--r-- | drivers/pci/host/pci-tegra.c | 13 | ||||
-rw-r--r-- | drivers/pci/host/pci-xgene.c | 2 | ||||
-rw-r--r-- | drivers/pci/host/pcie-designware.c | 3 | ||||
-rw-r--r-- | drivers/pci/host/pcie-rcar.c | 7 | ||||
-rw-r--r-- | drivers/pci/host/pcie-xilinx.c | 4 | ||||
-rw-r--r-- | drivers/pci/hotplug/cpci_hotplug_core.c | 3 | ||||
-rw-r--r-- | drivers/pci/hotplug/pciehp_ctrl.c | 2 | ||||
-rw-r--r-- | drivers/pci/pci-driver.c | 2 | ||||
-rw-r--r-- | drivers/pci/pci.c | 91 | ||||
-rw-r--r-- | drivers/pci/quirks.c | 78 | ||||
-rw-r--r-- | drivers/pci/rom.c | 7 | ||||
-rw-r--r-- | include/linux/pci.h | 4 |
21 files changed, 203 insertions, 114 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 97d07ed60a0b..dcb2e0c55be4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -1279,6 +1279,9 @@ config PCI_DOMAINS | |||
1279 | bool | 1279 | bool |
1280 | depends on PCI | 1280 | depends on PCI |
1281 | 1281 | ||
1282 | config PCI_DOMAINS_GENERIC | ||
1283 | def_bool PCI_DOMAINS | ||
1284 | |||
1282 | config PCI_NANOENGINE | 1285 | config PCI_NANOENGINE |
1283 | bool "BSE nanoEngine PCI support" | 1286 | bool "BSE nanoEngine PCI support" |
1284 | depends on SA1100_NANOENGINE | 1287 | depends on SA1100_NANOENGINE |
diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h index 8292b5f81e23..28b9bb35949e 100644 --- a/arch/arm/include/asm/mach/pci.h +++ b/arch/arm/include/asm/mach/pci.h | |||
@@ -19,9 +19,6 @@ struct pci_bus; | |||
19 | struct device; | 19 | struct device; |
20 | 20 | ||
21 | struct hw_pci { | 21 | struct hw_pci { |
22 | #ifdef CONFIG_PCI_DOMAINS | ||
23 | int domain; | ||
24 | #endif | ||
25 | #ifdef CONFIG_PCI_MSI | 22 | #ifdef CONFIG_PCI_MSI |
26 | struct msi_controller *msi_ctrl; | 23 | struct msi_controller *msi_ctrl; |
27 | #endif | 24 | #endif |
@@ -45,9 +42,6 @@ struct hw_pci { | |||
45 | * Per-controller structure | 42 | * Per-controller structure |
46 | */ | 43 | */ |
47 | struct pci_sys_data { | 44 | struct pci_sys_data { |
48 | #ifdef CONFIG_PCI_DOMAINS | ||
49 | int domain; | ||
50 | #endif | ||
51 | #ifdef CONFIG_PCI_MSI | 45 | #ifdef CONFIG_PCI_MSI |
52 | struct msi_controller *msi_ctrl; | 46 | struct msi_controller *msi_ctrl; |
53 | #endif | 47 | #endif |
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h index 7e95d8535e24..585dc33a7a24 100644 --- a/arch/arm/include/asm/pci.h +++ b/arch/arm/include/asm/pci.h | |||
@@ -18,13 +18,6 @@ static inline int pcibios_assign_all_busses(void) | |||
18 | } | 18 | } |
19 | 19 | ||
20 | #ifdef CONFIG_PCI_DOMAINS | 20 | #ifdef CONFIG_PCI_DOMAINS |
21 | static inline int pci_domain_nr(struct pci_bus *bus) | ||
22 | { | ||
23 | struct pci_sys_data *root = bus->sysdata; | ||
24 | |||
25 | return root->domain; | ||
26 | } | ||
27 | |||
28 | static inline int pci_proc_domain(struct pci_bus *bus) | 21 | static inline int pci_proc_domain(struct pci_bus *bus) |
29 | { | 22 | { |
30 | return pci_domain_nr(bus); | 23 | return pci_domain_nr(bus); |
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index a4effd6d8f2f..ddd75c58b1e8 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c | |||
@@ -463,9 +463,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw, | |||
463 | if (!sys) | 463 | if (!sys) |
464 | panic("PCI: unable to allocate sys data!"); | 464 | panic("PCI: unable to allocate sys data!"); |
465 | 465 | ||
466 | #ifdef CONFIG_PCI_DOMAINS | ||
467 | sys->domain = hw->domain; | ||
468 | #endif | ||
469 | #ifdef CONFIG_PCI_MSI | 466 | #ifdef CONFIG_PCI_MSI |
470 | sys->msi_ctrl = hw->msi_ctrl; | 467 | sys->msi_ctrl = hw->msi_ctrl; |
471 | #endif | 468 | #endif |
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c index 85fc72e875d2..c622c306c390 100644 --- a/arch/arm/mach-cns3xxx/pcie.c +++ b/arch/arm/mach-cns3xxx/pcie.c | |||
@@ -30,18 +30,15 @@ struct cns3xxx_pcie { | |||
30 | unsigned int irqs[2]; | 30 | unsigned int irqs[2]; |
31 | struct resource res_io; | 31 | struct resource res_io; |
32 | struct resource res_mem; | 32 | struct resource res_mem; |
33 | struct hw_pci hw_pci; | 33 | int port; |
34 | |||
35 | bool linked; | 34 | bool linked; |
36 | }; | 35 | }; |
37 | 36 | ||
38 | static struct cns3xxx_pcie cns3xxx_pcie[]; /* forward decl. */ | ||
39 | |||
40 | static struct cns3xxx_pcie *sysdata_to_cnspci(void *sysdata) | 37 | static struct cns3xxx_pcie *sysdata_to_cnspci(void *sysdata) |
41 | { | 38 | { |
42 | struct pci_sys_data *root = sysdata; | 39 | struct pci_sys_data *root = sysdata; |
43 | 40 | ||
44 | return &cns3xxx_pcie[root->domain]; | 41 | return root->private_data; |
45 | } | 42 | } |
46 | 43 | ||
47 | static struct cns3xxx_pcie *pdev_to_cnspci(const struct pci_dev *dev) | 44 | static struct cns3xxx_pcie *pdev_to_cnspci(const struct pci_dev *dev) |
@@ -160,13 +157,7 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = { | |||
160 | .flags = IORESOURCE_MEM, | 157 | .flags = IORESOURCE_MEM, |
161 | }, | 158 | }, |
162 | .irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, }, | 159 | .irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, }, |
163 | .hw_pci = { | 160 | .port = 0, |
164 | .domain = 0, | ||
165 | .nr_controllers = 1, | ||
166 | .ops = &cns3xxx_pcie_ops, | ||
167 | .setup = cns3xxx_pci_setup, | ||
168 | .map_irq = cns3xxx_pcie_map_irq, | ||
169 | }, | ||
170 | }, | 161 | }, |
171 | [1] = { | 162 | [1] = { |
172 | .host_regs = (void __iomem *)CNS3XXX_PCIE1_HOST_BASE_VIRT, | 163 | .host_regs = (void __iomem *)CNS3XXX_PCIE1_HOST_BASE_VIRT, |
@@ -185,19 +176,13 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = { | |||
185 | .flags = IORESOURCE_MEM, | 176 | .flags = IORESOURCE_MEM, |
186 | }, | 177 | }, |
187 | .irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, }, | 178 | .irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, }, |
188 | .hw_pci = { | 179 | .port = 1, |
189 | .domain = 1, | ||
190 | .nr_controllers = 1, | ||
191 | .ops = &cns3xxx_pcie_ops, | ||
192 | .setup = cns3xxx_pci_setup, | ||
193 | .map_irq = cns3xxx_pcie_map_irq, | ||
194 | }, | ||
195 | }, | 180 | }, |
196 | }; | 181 | }; |
197 | 182 | ||
198 | static void __init cns3xxx_pcie_check_link(struct cns3xxx_pcie *cnspci) | 183 | static void __init cns3xxx_pcie_check_link(struct cns3xxx_pcie *cnspci) |
199 | { | 184 | { |
200 | int port = cnspci->hw_pci.domain; | 185 | int port = cnspci->port; |
201 | u32 reg; | 186 | u32 reg; |
202 | unsigned long time; | 187 | unsigned long time; |
203 | 188 | ||
@@ -228,9 +213,9 @@ static void __init cns3xxx_pcie_check_link(struct cns3xxx_pcie *cnspci) | |||
228 | 213 | ||
229 | static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci) | 214 | static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci) |
230 | { | 215 | { |
231 | int port = cnspci->hw_pci.domain; | 216 | int port = cnspci->port; |
232 | struct pci_sys_data sd = { | 217 | struct pci_sys_data sd = { |
233 | .domain = port, | 218 | .private_data = cnspci, |
234 | }; | 219 | }; |
235 | struct pci_bus bus = { | 220 | struct pci_bus bus = { |
236 | .number = 0, | 221 | .number = 0, |
@@ -291,6 +276,14 @@ static int cns3xxx_pcie_abort_handler(unsigned long addr, unsigned int fsr, | |||
291 | void __init cns3xxx_pcie_init_late(void) | 276 | void __init cns3xxx_pcie_init_late(void) |
292 | { | 277 | { |
293 | int i; | 278 | int i; |
279 | void *private_data; | ||
280 | struct hw_pci hw_pci = { | ||
281 | .nr_controllers = 1, | ||
282 | .ops = &cns3xxx_pcie_ops, | ||
283 | .setup = cns3xxx_pci_setup, | ||
284 | .map_irq = cns3xxx_pcie_map_irq, | ||
285 | .private_data = &private_data, | ||
286 | }; | ||
294 | 287 | ||
295 | pcibios_min_io = 0; | 288 | pcibios_min_io = 0; |
296 | pcibios_min_mem = 0; | 289 | pcibios_min_mem = 0; |
@@ -303,7 +296,8 @@ void __init cns3xxx_pcie_init_late(void) | |||
303 | cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i)); | 296 | cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i)); |
304 | cns3xxx_pcie_check_link(&cns3xxx_pcie[i]); | 297 | cns3xxx_pcie_check_link(&cns3xxx_pcie[i]); |
305 | cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]); | 298 | cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]); |
306 | pci_common_init(&cns3xxx_pcie[i].hw_pci); | 299 | private_data = &cns3xxx_pcie[i]; |
300 | pci_common_init(&hw_pci); | ||
307 | } | 301 | } |
308 | 302 | ||
309 | pci_assign_unassigned_resources(); | 303 | pci_assign_unassigned_resources(); |
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index ce5836c14ec1..6f93c24ca801 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c | |||
@@ -46,25 +46,3 @@ int pcibios_add_device(struct pci_dev *dev) | |||
46 | 46 | ||
47 | return 0; | 47 | return 0; |
48 | } | 48 | } |
49 | |||
50 | |||
51 | #ifdef CONFIG_PCI_DOMAINS_GENERIC | ||
52 | static bool dt_domain_found = false; | ||
53 | |||
54 | void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent) | ||
55 | { | ||
56 | int domain = of_get_pci_domain_nr(parent->of_node); | ||
57 | |||
58 | if (domain >= 0) { | ||
59 | dt_domain_found = true; | ||
60 | } else if (dt_domain_found == true) { | ||
61 | dev_err(parent, "Node %s is missing \"linux,pci-domain\" property in DT\n", | ||
62 | parent->of_node->full_name); | ||
63 | return; | ||
64 | } else { | ||
65 | domain = pci_get_new_domain_nr(); | ||
66 | } | ||
67 | |||
68 | bus->domain_nr = domain; | ||
69 | } | ||
70 | #endif | ||
diff --git a/drivers/pci/host/pci-keystone.c b/drivers/pci/host/pci-keystone.c index 78f79e31ac5c..75333b0c4f0a 100644 --- a/drivers/pci/host/pci-keystone.c +++ b/drivers/pci/host/pci-keystone.c | |||
@@ -119,7 +119,7 @@ static void ks_pcie_msi_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
119 | struct pcie_port *pp = &ks_pcie->pp; | 119 | struct pcie_port *pp = &ks_pcie->pp; |
120 | struct irq_chip *chip = irq_desc_get_chip(desc); | 120 | struct irq_chip *chip = irq_desc_get_chip(desc); |
121 | 121 | ||
122 | dev_dbg(pp->dev, "ks_pci_msi_irq_handler, irq %d\n", irq); | 122 | dev_dbg(pp->dev, "%s, irq %d\n", __func__, irq); |
123 | 123 | ||
124 | /* | 124 | /* |
125 | * The chained irq handler installation would have replaced normal | 125 | * The chained irq handler installation would have replaced normal |
@@ -197,7 +197,7 @@ static int ks_pcie_get_irq_controller_info(struct keystone_pcie *ks_pcie, | |||
197 | */ | 197 | */ |
198 | for (temp = 0; temp < max_host_irqs; temp++) { | 198 | for (temp = 0; temp < max_host_irqs; temp++) { |
199 | host_irqs[temp] = irq_of_parse_and_map(*np_temp, temp); | 199 | host_irqs[temp] = irq_of_parse_and_map(*np_temp, temp); |
200 | if (host_irqs[temp] < 0) | 200 | if (!host_irqs[temp]) |
201 | break; | 201 | break; |
202 | } | 202 | } |
203 | if (temp) { | 203 | if (temp) { |
diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c index 6697b1a4d4fa..68c9e5e9b0a8 100644 --- a/drivers/pci/host/pci-layerscape.c +++ b/drivers/pci/host/pci-layerscape.c | |||
@@ -167,7 +167,6 @@ MODULE_DEVICE_TABLE(of, ls_pcie_of_match); | |||
167 | static struct platform_driver ls_pcie_driver = { | 167 | static struct platform_driver ls_pcie_driver = { |
168 | .driver = { | 168 | .driver = { |
169 | .name = "layerscape-pcie", | 169 | .name = "layerscape-pcie", |
170 | .owner = THIS_MODULE, | ||
171 | .of_match_table = ls_pcie_of_match, | 170 | .of_match_table = ls_pcie_of_match, |
172 | }, | 171 | }, |
173 | }; | 172 | }; |
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c index 1dd759596b0a..1309cfbaa719 100644 --- a/drivers/pci/host/pci-mvebu.c +++ b/drivers/pci/host/pci-mvebu.c | |||
@@ -101,9 +101,7 @@ struct mvebu_pcie { | |||
101 | struct mvebu_pcie_port *ports; | 101 | struct mvebu_pcie_port *ports; |
102 | struct msi_controller *msi; | 102 | struct msi_controller *msi; |
103 | struct resource io; | 103 | struct resource io; |
104 | char io_name[30]; | ||
105 | struct resource realio; | 104 | struct resource realio; |
106 | char mem_name[30]; | ||
107 | struct resource mem; | 105 | struct resource mem; |
108 | struct resource busn; | 106 | struct resource busn; |
109 | int nports; | 107 | int nports; |
@@ -723,18 +721,9 @@ static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys) | |||
723 | { | 721 | { |
724 | struct mvebu_pcie *pcie = sys_to_pcie(sys); | 722 | struct mvebu_pcie *pcie = sys_to_pcie(sys); |
725 | int i; | 723 | int i; |
726 | int domain = 0; | ||
727 | 724 | ||
728 | #ifdef CONFIG_PCI_DOMAINS | 725 | pcie->mem.name = "PCI MEM"; |
729 | domain = sys->domain; | 726 | pcie->realio.name = "PCI I/O"; |
730 | #endif | ||
731 | |||
732 | snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x", | ||
733 | domain); | ||
734 | pcie->mem.name = pcie->mem_name; | ||
735 | |||
736 | snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", domain); | ||
737 | pcie->realio.name = pcie->io_name; | ||
738 | 727 | ||
739 | if (request_resource(&iomem_resource, &pcie->mem)) | 728 | if (request_resource(&iomem_resource, &pcie->mem)) |
740 | return 0; | 729 | return 0; |
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index 44fd31b9fa2d..00e92720d7f7 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c | |||
@@ -576,19 +576,6 @@ static void tegra_pcie_port_free(struct tegra_pcie_port *port) | |||
576 | devm_kfree(pcie->dev, port); | 576 | devm_kfree(pcie->dev, port); |
577 | } | 577 | } |
578 | 578 | ||
579 | static void tegra_pcie_fixup_bridge(struct pci_dev *dev) | ||
580 | { | ||
581 | u16 reg; | ||
582 | |||
583 | if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) { | ||
584 | pci_read_config_word(dev, PCI_COMMAND, ®); | ||
585 | reg |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | | ||
586 | PCI_COMMAND_MASTER | PCI_COMMAND_SERR); | ||
587 | pci_write_config_word(dev, PCI_COMMAND, reg); | ||
588 | } | ||
589 | } | ||
590 | DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, tegra_pcie_fixup_bridge); | ||
591 | |||
592 | /* Tegra PCIE root complex wrongly reports device class */ | 579 | /* Tegra PCIE root complex wrongly reports device class */ |
593 | static void tegra_pcie_fixup_class(struct pci_dev *dev) | 580 | static void tegra_pcie_fixup_class(struct pci_dev *dev) |
594 | { | 581 | { |
diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c index ee6a3d3105d8..e77d831dc241 100644 --- a/drivers/pci/host/pci-xgene.c +++ b/drivers/pci/host/pci-xgene.c | |||
@@ -16,7 +16,7 @@ | |||
16 | * GNU General Public License for more details. | 16 | * GNU General Public License for more details. |
17 | * | 17 | * |
18 | */ | 18 | */ |
19 | #include <linux/clk-private.h> | 19 | #include <linux/clk.h> |
20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | #include <linux/jiffies.h> | 22 | #include <linux/jiffies.h> |
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index df781cdf13c1..eef311115899 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c | |||
@@ -508,9 +508,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp) | |||
508 | dw_pci.private_data = (void **)&pp; | 508 | dw_pci.private_data = (void **)&pp; |
509 | 509 | ||
510 | pci_common_init_dev(pp->dev, &dw_pci); | 510 | pci_common_init_dev(pp->dev, &dw_pci); |
511 | #ifdef CONFIG_PCI_DOMAINS | ||
512 | dw_pci.domain++; | ||
513 | #endif | ||
514 | 511 | ||
515 | return 0; | 512 | return 0; |
516 | } | 513 | } |
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c index 748786c402fc..c57bd0ac39a0 100644 --- a/drivers/pci/host/pcie-rcar.c +++ b/drivers/pci/host/pcie-rcar.c | |||
@@ -397,9 +397,6 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie) | |||
397 | #endif | 397 | #endif |
398 | 398 | ||
399 | pci_common_init_dev(&pdev->dev, &rcar_pci); | 399 | pci_common_init_dev(&pdev->dev, &rcar_pci); |
400 | #ifdef CONFIG_PCI_DOMAINS | ||
401 | rcar_pci.domain++; | ||
402 | #endif | ||
403 | } | 400 | } |
404 | 401 | ||
405 | static int phy_wait_for_ack(struct rcar_pcie *pcie) | 402 | static int phy_wait_for_ack(struct rcar_pcie *pcie) |
@@ -757,7 +754,7 @@ static int rcar_pcie_get_resources(struct platform_device *pdev, | |||
757 | goto err_map_reg; | 754 | goto err_map_reg; |
758 | 755 | ||
759 | i = irq_of_parse_and_map(pdev->dev.of_node, 0); | 756 | i = irq_of_parse_and_map(pdev->dev.of_node, 0); |
760 | if (i < 0) { | 757 | if (!i) { |
761 | dev_err(pcie->dev, "cannot get platform resources for msi interrupt\n"); | 758 | dev_err(pcie->dev, "cannot get platform resources for msi interrupt\n"); |
762 | err = -ENOENT; | 759 | err = -ENOENT; |
763 | goto err_map_reg; | 760 | goto err_map_reg; |
@@ -765,7 +762,7 @@ static int rcar_pcie_get_resources(struct platform_device *pdev, | |||
765 | pcie->msi.irq1 = i; | 762 | pcie->msi.irq1 = i; |
766 | 763 | ||
767 | i = irq_of_parse_and_map(pdev->dev.of_node, 1); | 764 | i = irq_of_parse_and_map(pdev->dev.of_node, 1); |
768 | if (i < 0) { | 765 | if (!i) { |
769 | dev_err(pcie->dev, "cannot get platform resources for msi interrupt\n"); | 766 | dev_err(pcie->dev, "cannot get platform resources for msi interrupt\n"); |
770 | err = -ENOENT; | 767 | err = -ENOENT; |
771 | goto err_map_reg; | 768 | goto err_map_reg; |
diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c index f67d0363e3c9..eac4a4b957ca 100644 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c | |||
@@ -148,10 +148,10 @@ static inline bool xilinx_pcie_link_is_up(struct xilinx_pcie_port *port) | |||
148 | */ | 148 | */ |
149 | static void xilinx_pcie_clear_err_interrupts(struct xilinx_pcie_port *port) | 149 | static void xilinx_pcie_clear_err_interrupts(struct xilinx_pcie_port *port) |
150 | { | 150 | { |
151 | u32 val = pcie_read(port, XILINX_PCIE_REG_RPEFR); | 151 | unsigned long val = pcie_read(port, XILINX_PCIE_REG_RPEFR); |
152 | 152 | ||
153 | if (val & XILINX_PCIE_RPEFR_ERR_VALID) { | 153 | if (val & XILINX_PCIE_RPEFR_ERR_VALID) { |
154 | dev_dbg(port->dev, "Requester ID %d\n", | 154 | dev_dbg(port->dev, "Requester ID %lu\n", |
155 | val & XILINX_PCIE_RPEFR_REQ_ID); | 155 | val & XILINX_PCIE_RPEFR_REQ_ID); |
156 | pcie_write(port, XILINX_PCIE_RPEFR_ALL_MASK, | 156 | pcie_write(port, XILINX_PCIE_RPEFR_ALL_MASK, |
157 | XILINX_PCIE_REG_RPEFR); | 157 | XILINX_PCIE_REG_RPEFR); |
diff --git a/drivers/pci/hotplug/cpci_hotplug_core.c b/drivers/pci/hotplug/cpci_hotplug_core.c index a5a7fd8332ac..46db29395a62 100644 --- a/drivers/pci/hotplug/cpci_hotplug_core.c +++ b/drivers/pci/hotplug/cpci_hotplug_core.c | |||
@@ -214,8 +214,7 @@ static void release_slot(struct hotplug_slot *hotplug_slot) | |||
214 | 214 | ||
215 | kfree(slot->hotplug_slot->info); | 215 | kfree(slot->hotplug_slot->info); |
216 | kfree(slot->hotplug_slot); | 216 | kfree(slot->hotplug_slot); |
217 | if (slot->dev) | 217 | pci_dev_put(slot->dev); |
218 | pci_dev_put(slot->dev); | ||
219 | kfree(slot); | 218 | kfree(slot); |
220 | } | 219 | } |
221 | 220 | ||
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c index ff32e85e1de6..f052e951b23e 100644 --- a/drivers/pci/hotplug/pciehp_ctrl.c +++ b/drivers/pci/hotplug/pciehp_ctrl.c | |||
@@ -532,8 +532,6 @@ static void interrupt_event_handler(struct work_struct *work) | |||
532 | pciehp_green_led_off(p_slot); | 532 | pciehp_green_led_off(p_slot); |
533 | break; | 533 | break; |
534 | case INT_PRESENCE_ON: | 534 | case INT_PRESENCE_ON: |
535 | if (!HP_SUPR_RM(ctrl)) | ||
536 | break; | ||
537 | ctrl_dbg(ctrl, "Surprise Insertion\n"); | 535 | ctrl_dbg(ctrl, "Surprise Insertion\n"); |
538 | handle_surprise_event(p_slot); | 536 | handle_surprise_event(p_slot); |
539 | break; | 537 | break; |
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c index 887e6bd95af7..09a66bad8018 100644 --- a/drivers/pci/pci-driver.c +++ b/drivers/pci/pci-driver.c | |||
@@ -1383,7 +1383,7 @@ static int pci_uevent(struct device *dev, struct kobj_uevent_env *env) | |||
1383 | if (add_uevent_var(env, "PCI_SLOT_NAME=%s", pci_name(pdev))) | 1383 | if (add_uevent_var(env, "PCI_SLOT_NAME=%s", pci_name(pdev))) |
1384 | return -ENOMEM; | 1384 | return -ENOMEM; |
1385 | 1385 | ||
1386 | if (add_uevent_var(env, "MODALIAS=pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x", | 1386 | if (add_uevent_var(env, "MODALIAS=pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X", |
1387 | pdev->vendor, pdev->device, | 1387 | pdev->vendor, pdev->device, |
1388 | pdev->subsystem_vendor, pdev->subsystem_device, | 1388 | pdev->subsystem_vendor, pdev->subsystem_device, |
1389 | (u8)(pdev->class >> 16), (u8)(pdev->class >> 8), | 1389 | (u8)(pdev->class >> 16), (u8)(pdev->class >> 8), |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index cab05f31223f..460d046ab6fe 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -10,6 +10,8 @@ | |||
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/delay.h> | 11 | #include <linux/delay.h> |
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/of.h> | ||
14 | #include <linux/of_pci.h> | ||
13 | #include <linux/pci.h> | 15 | #include <linux/pci.h> |
14 | #include <linux/pm.h> | 16 | #include <linux/pm.h> |
15 | #include <linux/slab.h> | 17 | #include <linux/slab.h> |
@@ -3197,7 +3199,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe) | |||
3197 | { | 3199 | { |
3198 | u16 csr; | 3200 | u16 csr; |
3199 | 3201 | ||
3200 | if (!dev->pm_cap) | 3202 | if (!dev->pm_cap || dev->dev_flags & PCI_DEV_FLAGS_NO_PM_RESET) |
3201 | return -ENOTTY; | 3203 | return -ENOTTY; |
3202 | 3204 | ||
3203 | pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr); | 3205 | pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr); |
@@ -3271,7 +3273,8 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe) | |||
3271 | { | 3273 | { |
3272 | struct pci_dev *pdev; | 3274 | struct pci_dev *pdev; |
3273 | 3275 | ||
3274 | if (pci_is_root_bus(dev->bus) || dev->subordinate || !dev->bus->self) | 3276 | if (pci_is_root_bus(dev->bus) || dev->subordinate || |
3277 | !dev->bus->self || dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET) | ||
3275 | return -ENOTTY; | 3278 | return -ENOTTY; |
3276 | 3279 | ||
3277 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | 3280 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) |
@@ -3305,7 +3308,8 @@ static int pci_dev_reset_slot_function(struct pci_dev *dev, int probe) | |||
3305 | { | 3308 | { |
3306 | struct pci_dev *pdev; | 3309 | struct pci_dev *pdev; |
3307 | 3310 | ||
3308 | if (dev->subordinate || !dev->slot) | 3311 | if (dev->subordinate || !dev->slot || |
3312 | dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET) | ||
3309 | return -ENOTTY; | 3313 | return -ENOTTY; |
3310 | 3314 | ||
3311 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | 3315 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) |
@@ -3557,6 +3561,20 @@ int pci_try_reset_function(struct pci_dev *dev) | |||
3557 | } | 3561 | } |
3558 | EXPORT_SYMBOL_GPL(pci_try_reset_function); | 3562 | EXPORT_SYMBOL_GPL(pci_try_reset_function); |
3559 | 3563 | ||
3564 | /* Do any devices on or below this bus prevent a bus reset? */ | ||
3565 | static bool pci_bus_resetable(struct pci_bus *bus) | ||
3566 | { | ||
3567 | struct pci_dev *dev; | ||
3568 | |||
3569 | list_for_each_entry(dev, &bus->devices, bus_list) { | ||
3570 | if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET || | ||
3571 | (dev->subordinate && !pci_bus_resetable(dev->subordinate))) | ||
3572 | return false; | ||
3573 | } | ||
3574 | |||
3575 | return true; | ||
3576 | } | ||
3577 | |||
3560 | /* Lock devices from the top of the tree down */ | 3578 | /* Lock devices from the top of the tree down */ |
3561 | static void pci_bus_lock(struct pci_bus *bus) | 3579 | static void pci_bus_lock(struct pci_bus *bus) |
3562 | { | 3580 | { |
@@ -3607,6 +3625,22 @@ unlock: | |||
3607 | return 0; | 3625 | return 0; |
3608 | } | 3626 | } |
3609 | 3627 | ||
3628 | /* Do any devices on or below this slot prevent a bus reset? */ | ||
3629 | static bool pci_slot_resetable(struct pci_slot *slot) | ||
3630 | { | ||
3631 | struct pci_dev *dev; | ||
3632 | |||
3633 | list_for_each_entry(dev, &slot->bus->devices, bus_list) { | ||
3634 | if (!dev->slot || dev->slot != slot) | ||
3635 | continue; | ||
3636 | if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET || | ||
3637 | (dev->subordinate && !pci_bus_resetable(dev->subordinate))) | ||
3638 | return false; | ||
3639 | } | ||
3640 | |||
3641 | return true; | ||
3642 | } | ||
3643 | |||
3610 | /* Lock devices from the top of the tree down */ | 3644 | /* Lock devices from the top of the tree down */ |
3611 | static void pci_slot_lock(struct pci_slot *slot) | 3645 | static void pci_slot_lock(struct pci_slot *slot) |
3612 | { | 3646 | { |
@@ -3728,7 +3762,7 @@ static int pci_slot_reset(struct pci_slot *slot, int probe) | |||
3728 | { | 3762 | { |
3729 | int rc; | 3763 | int rc; |
3730 | 3764 | ||
3731 | if (!slot) | 3765 | if (!slot || !pci_slot_resetable(slot)) |
3732 | return -ENOTTY; | 3766 | return -ENOTTY; |
3733 | 3767 | ||
3734 | if (!probe) | 3768 | if (!probe) |
@@ -3820,7 +3854,7 @@ EXPORT_SYMBOL_GPL(pci_try_reset_slot); | |||
3820 | 3854 | ||
3821 | static int pci_bus_reset(struct pci_bus *bus, int probe) | 3855 | static int pci_bus_reset(struct pci_bus *bus, int probe) |
3822 | { | 3856 | { |
3823 | if (!bus->self) | 3857 | if (!bus->self || !pci_bus_resetable(bus)) |
3824 | return -ENOTTY; | 3858 | return -ENOTTY; |
3825 | 3859 | ||
3826 | if (probe) | 3860 | if (probe) |
@@ -4439,6 +4473,53 @@ int pci_get_new_domain_nr(void) | |||
4439 | { | 4473 | { |
4440 | return atomic_inc_return(&__domain_nr); | 4474 | return atomic_inc_return(&__domain_nr); |
4441 | } | 4475 | } |
4476 | |||
4477 | #ifdef CONFIG_PCI_DOMAINS_GENERIC | ||
4478 | void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent) | ||
4479 | { | ||
4480 | static int use_dt_domains = -1; | ||
4481 | int domain = of_get_pci_domain_nr(parent->of_node); | ||
4482 | |||
4483 | /* | ||
4484 | * Check DT domain and use_dt_domains values. | ||
4485 | * | ||
4486 | * If DT domain property is valid (domain >= 0) and | ||
4487 | * use_dt_domains != 0, the DT assignment is valid since this means | ||
4488 | * we have not previously allocated a domain number by using | ||
4489 | * pci_get_new_domain_nr(); we should also update use_dt_domains to | ||
4490 | * 1, to indicate that we have just assigned a domain number from | ||
4491 | * DT. | ||
4492 | * | ||
4493 | * If DT domain property value is not valid (ie domain < 0), and we | ||
4494 | * have not previously assigned a domain number from DT | ||
4495 | * (use_dt_domains != 1) we should assign a domain number by | ||
4496 | * using the: | ||
4497 | * | ||
4498 | * pci_get_new_domain_nr() | ||
4499 | * | ||
4500 | * API and update the use_dt_domains value to keep track of method we | ||
4501 | * are using to assign domain numbers (use_dt_domains = 0). | ||
4502 | * | ||
4503 | * All other combinations imply we have a platform that is trying | ||
4504 | * to mix domain numbers obtained from DT and pci_get_new_domain_nr(), | ||
4505 | * which is a recipe for domain mishandling and it is prevented by | ||
4506 | * invalidating the domain value (domain = -1) and printing a | ||
4507 | * corresponding error. | ||
4508 | */ | ||
4509 | if (domain >= 0 && use_dt_domains) { | ||
4510 | use_dt_domains = 1; | ||
4511 | } else if (domain < 0 && use_dt_domains != 1) { | ||
4512 | use_dt_domains = 0; | ||
4513 | domain = pci_get_new_domain_nr(); | ||
4514 | } else { | ||
4515 | dev_err(parent, "Node %s has inconsistent \"linux,pci-domain\" property in DT\n", | ||
4516 | parent->of_node->full_name); | ||
4517 | domain = -1; | ||
4518 | } | ||
4519 | |||
4520 | bus->domain_nr = domain; | ||
4521 | } | ||
4522 | #endif | ||
4442 | #endif | 4523 | #endif |
4443 | 4524 | ||
4444 | /** | 4525 | /** |
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index ed6f89b6efe5..e248a119f15a 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -3028,6 +3028,41 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_REALTEK, 0x8169, | |||
3028 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MELLANOX, PCI_ANY_ID, | 3028 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MELLANOX, PCI_ANY_ID, |
3029 | quirk_broken_intx_masking); | 3029 | quirk_broken_intx_masking); |
3030 | 3030 | ||
3031 | static void quirk_no_bus_reset(struct pci_dev *dev) | ||
3032 | { | ||
3033 | dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET; | ||
3034 | } | ||
3035 | |||
3036 | /* | ||
3037 | * Atheros AR93xx chips do not behave after a bus reset. The device will | ||
3038 | * throw a Link Down error on AER-capable systems and regardless of AER, | ||
3039 | * config space of the device is never accessible again and typically | ||
3040 | * causes the system to hang or reset when access is attempted. | ||
3041 | * http://www.spinics.net/lists/linux-pci/msg34797.html | ||
3042 | */ | ||
3043 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset); | ||
3044 | |||
3045 | static void quirk_no_pm_reset(struct pci_dev *dev) | ||
3046 | { | ||
3047 | /* | ||
3048 | * We can't do a bus reset on root bus devices, but an ineffective | ||
3049 | * PM reset may be better than nothing. | ||
3050 | */ | ||
3051 | if (!pci_is_root_bus(dev->bus)) | ||
3052 | dev->dev_flags |= PCI_DEV_FLAGS_NO_PM_RESET; | ||
3053 | } | ||
3054 | |||
3055 | /* | ||
3056 | * Some AMD/ATI GPUS (HD8570 - Oland) report that a D3hot->D0 transition | ||
3057 | * causes a reset (i.e., they advertise NoSoftRst-). This transition seems | ||
3058 | * to have no effect on the device: it retains the framebuffer contents and | ||
3059 | * monitor sync. Advertising this support makes other layers, like VFIO, | ||
3060 | * assume pci_reset_function() is viable for this device. Mark it as | ||
3061 | * unavailable to skip it when testing reset methods. | ||
3062 | */ | ||
3063 | DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_ATI, PCI_ANY_ID, | ||
3064 | PCI_CLASS_DISPLAY_VGA, 8, quirk_no_pm_reset); | ||
3065 | |||
3031 | #ifdef CONFIG_ACPI | 3066 | #ifdef CONFIG_ACPI |
3032 | /* | 3067 | /* |
3033 | * Apple: Shutdown Cactus Ridge Thunderbolt controller. | 3068 | * Apple: Shutdown Cactus Ridge Thunderbolt controller. |
@@ -3528,6 +3563,44 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_JMICRON, | |||
3528 | quirk_dma_func1_alias); | 3563 | quirk_dma_func1_alias); |
3529 | 3564 | ||
3530 | /* | 3565 | /* |
3566 | * Some devices DMA with the wrong devfn, not just the wrong function. | ||
3567 | * quirk_fixed_dma_alias() uses this table to create fixed aliases, where | ||
3568 | * the alias is "fixed" and independent of the device devfn. | ||
3569 | * | ||
3570 | * For example, the Adaptec 3405 is a PCIe card with an Intel 80333 I/O | ||
3571 | * processor. To software, this appears as a PCIe-to-PCI/X bridge with a | ||
3572 | * single device on the secondary bus. In reality, the single exposed | ||
3573 | * device at 0e.0 is the Address Translation Unit (ATU) of the controller | ||
3574 | * that provides a bridge to the internal bus of the I/O processor. The | ||
3575 | * controller supports private devices, which can be hidden from PCI config | ||
3576 | * space. In the case of the Adaptec 3405, a private device at 01.0 | ||
3577 | * appears to be the DMA engine, which therefore needs to become a DMA | ||
3578 | * alias for the device. | ||
3579 | */ | ||
3580 | static const struct pci_device_id fixed_dma_alias_tbl[] = { | ||
3581 | { PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x0285, | ||
3582 | PCI_VENDOR_ID_ADAPTEC2, 0x02bb), /* Adaptec 3405 */ | ||
3583 | .driver_data = PCI_DEVFN(1, 0) }, | ||
3584 | { 0 } | ||
3585 | }; | ||
3586 | |||
3587 | static void quirk_fixed_dma_alias(struct pci_dev *dev) | ||
3588 | { | ||
3589 | const struct pci_device_id *id; | ||
3590 | |||
3591 | id = pci_match_id(fixed_dma_alias_tbl, dev); | ||
3592 | if (id) { | ||
3593 | dev->dma_alias_devfn = id->driver_data; | ||
3594 | dev->dev_flags |= PCI_DEV_FLAGS_DMA_ALIAS_DEVFN; | ||
3595 | dev_info(&dev->dev, "Enabling fixed DMA alias to %02x.%d\n", | ||
3596 | PCI_SLOT(dev->dma_alias_devfn), | ||
3597 | PCI_FUNC(dev->dma_alias_devfn)); | ||
3598 | } | ||
3599 | } | ||
3600 | |||
3601 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ADAPTEC2, 0x0285, quirk_fixed_dma_alias); | ||
3602 | |||
3603 | /* | ||
3531 | * A few PCIe-to-PCI bridges fail to expose a PCIe capability, resulting in | 3604 | * A few PCIe-to-PCI bridges fail to expose a PCIe capability, resulting in |
3532 | * using the wrong DMA alias for the device. Some of these devices can be | 3605 | * using the wrong DMA alias for the device. Some of these devices can be |
3533 | * used as either forward or reverse bridges, so we need to test whether the | 3606 | * used as either forward or reverse bridges, so we need to test whether the |
@@ -3630,6 +3703,9 @@ static const u16 pci_quirk_intel_pch_acs_ids[] = { | |||
3630 | 0x9c98, 0x9c99, 0x9c9a, 0x9c9b, | 3703 | 0x9c98, 0x9c99, 0x9c9a, 0x9c9b, |
3631 | /* Patsburg (X79) PCH */ | 3704 | /* Patsburg (X79) PCH */ |
3632 | 0x1d10, 0x1d12, 0x1d14, 0x1d16, 0x1d18, 0x1d1a, 0x1d1c, 0x1d1e, | 3705 | 0x1d10, 0x1d12, 0x1d14, 0x1d16, 0x1d18, 0x1d1a, 0x1d1c, 0x1d1e, |
3706 | /* Wellsburg (X99) PCH */ | ||
3707 | 0x8d10, 0x8d11, 0x8d12, 0x8d13, 0x8d14, 0x8d15, 0x8d16, 0x8d17, | ||
3708 | 0x8d18, 0x8d19, 0x8d1a, 0x8d1b, 0x8d1c, 0x8d1d, 0x8d1e, | ||
3633 | }; | 3709 | }; |
3634 | 3710 | ||
3635 | static bool pci_quirk_intel_pch_acs_match(struct pci_dev *dev) | 3711 | static bool pci_quirk_intel_pch_acs_match(struct pci_dev *dev) |
@@ -3713,6 +3789,8 @@ static const struct pci_dev_acs_enabled { | |||
3713 | { PCI_VENDOR_ID_INTEL, 0x1551, pci_quirk_mf_endpoint_acs }, | 3789 | { PCI_VENDOR_ID_INTEL, 0x1551, pci_quirk_mf_endpoint_acs }, |
3714 | { PCI_VENDOR_ID_INTEL, 0x1558, pci_quirk_mf_endpoint_acs }, | 3790 | { PCI_VENDOR_ID_INTEL, 0x1558, pci_quirk_mf_endpoint_acs }, |
3715 | { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs }, | 3791 | { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs }, |
3792 | { 0x19a2, 0x710, pci_quirk_mf_endpoint_acs }, /* Emulex BE3-R */ | ||
3793 | { 0x10df, 0x720, pci_quirk_mf_endpoint_acs }, /* Emulex Skyhawk-R */ | ||
3716 | { 0 } | 3794 | { 0 } |
3717 | }; | 3795 | }; |
3718 | 3796 | ||
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c index f955edb9bea7..eb0ad530dc43 100644 --- a/drivers/pci/rom.c +++ b/drivers/pci/rom.c | |||
@@ -71,6 +71,7 @@ size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size) | |||
71 | { | 71 | { |
72 | void __iomem *image; | 72 | void __iomem *image; |
73 | int last_image; | 73 | int last_image; |
74 | unsigned length; | ||
74 | 75 | ||
75 | image = rom; | 76 | image = rom; |
76 | do { | 77 | do { |
@@ -93,9 +94,9 @@ size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size) | |||
93 | if (readb(pds + 3) != 'R') | 94 | if (readb(pds + 3) != 'R') |
94 | break; | 95 | break; |
95 | last_image = readb(pds + 21) & 0x80; | 96 | last_image = readb(pds + 21) & 0x80; |
96 | /* this length is reliable */ | 97 | length = readw(pds + 16); |
97 | image += readw(pds + 16) * 512; | 98 | image += length * 512; |
98 | } while (!last_image); | 99 | } while (length && !last_image); |
99 | 100 | ||
100 | /* never return a size larger than the PCI resource window */ | 101 | /* never return a size larger than the PCI resource window */ |
101 | /* there are known ROMs that get the size wrong */ | 102 | /* there are known ROMs that get the size wrong */ |
diff --git a/include/linux/pci.h b/include/linux/pci.h index e7fd51900182..10028a94eeb3 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h | |||
@@ -175,6 +175,10 @@ enum pci_dev_flags { | |||
175 | PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4), | 175 | PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4), |
176 | /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */ | 176 | /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */ |
177 | PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5), | 177 | PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5), |
178 | /* Do not use bus resets for device */ | ||
179 | PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6), | ||
180 | /* Do not use PM reset even if device advertises NoSoftRst- */ | ||
181 | PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7), | ||
178 | }; | 182 | }; |
179 | 183 | ||
180 | enum pci_irq_reroute_variant { | 184 | enum pci_irq_reroute_variant { |