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-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c4
-rw-r--r--arch/arm/mach-omap2/prm2xxx.c88
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c22
-rw-r--r--arch/arm/mach-omap2/prm3xxx.c28
-rw-r--r--arch/arm/mach-omap2/prm44xx.c6
-rw-r--r--arch/arm/mach-omap2/prm44xx.h4
-rw-r--r--arch/arm/plat-omap/counter_32k.c2
-rw-r--r--arch/arm/plat-omap/sram.c2
9 files changed, 123 insertions, 35 deletions
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index bdf39481fbd6..6ef87580c33f 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -1167,6 +1167,8 @@ static const struct clk_ops emu_src_ck_ops = {
1167 .recalc_rate = &omap2_clksel_recalc, 1167 .recalc_rate = &omap2_clksel_recalc,
1168 .get_parent = &omap2_clksel_find_parent_index, 1168 .get_parent = &omap2_clksel_find_parent_index,
1169 .set_parent = &omap2_clksel_set_parent, 1169 .set_parent = &omap2_clksel_set_parent,
1170 .enable = &omap2_clkops_enable_clkdm,
1171 .disable = &omap2_clkops_disable_clkdm,
1170}; 1172};
1171 1173
1172static struct clk emu_src_ck; 1174static struct clk emu_src_ck;
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 081c71edddf4..02ca493b929b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -2515,7 +2515,7 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
2515 .user = OCP_USER_MPU, 2515 .user = OCP_USER_MPU,
2516}; 2516};
2517 2517
2518struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = { 2518static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
2519 { 2519 {
2520 .pa_start = 0x4A101000, 2520 .pa_start = 0x4A101000,
2521 .pa_end = 0x4A101000 + SZ_256 - 1, 2521 .pa_end = 0x4A101000 + SZ_256 - 1,
@@ -2523,7 +2523,7 @@ struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
2523 { } 2523 { }
2524}; 2524};
2525 2525
2526struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = { 2526static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
2527 .master = &am33xx_cpgmac0_hwmod, 2527 .master = &am33xx_cpgmac0_hwmod,
2528 .slave = &am33xx_mdio_hwmod, 2528 .slave = &am33xx_mdio_hwmod,
2529 .addr = am33xx_mdio_addr_space, 2529 .addr = am33xx_mdio_addr_space,
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index cc0e71430af1..418de9c3b319 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -28,6 +28,14 @@
28#include "prm-regbits-24xx.h" 28#include "prm-regbits-24xx.h"
29 29
30/* 30/*
31 * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
32 * these are reversed from the bits used on OMAP3+
33 */
34#define OMAP24XX_PWRDM_POWER_ON 0x0
35#define OMAP24XX_PWRDM_POWER_RET 0x1
36#define OMAP24XX_PWRDM_POWER_OFF 0x3
37
38/*
31 * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP 39 * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
32 * hardware register (which are specific to the OMAP2xxx SoCs) to 40 * hardware register (which are specific to the OMAP2xxx SoCs) to
33 * reset source ID bit shifts (which is an OMAP SoC-independent 41 * reset source ID bit shifts (which is an OMAP SoC-independent
@@ -68,6 +76,34 @@ static u32 omap2xxx_prm_read_reset_sources(void)
68} 76}
69 77
70/** 78/**
79 * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
80 * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
81 *
82 * Return the common power state bits corresponding to the OMAP2xxx
83 * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
84 */
85static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
86{
87 u8 pwrst;
88
89 switch (omap2xxx_pwrst) {
90 case OMAP24XX_PWRDM_POWER_OFF:
91 pwrst = PWRDM_POWER_OFF;
92 break;
93 case OMAP24XX_PWRDM_POWER_RET:
94 pwrst = PWRDM_POWER_RET;
95 break;
96 case OMAP24XX_PWRDM_POWER_ON:
97 pwrst = PWRDM_POWER_ON;
98 break;
99 default:
100 return -EINVAL;
101 }
102
103 return pwrst;
104}
105
106/**
71 * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC 107 * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
72 * 108 *
73 * Set the DPLL reset bit, which should reboot the SoC. This is the 109 * Set the DPLL reset bit, which should reboot the SoC. This is the
@@ -97,10 +133,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
97 return 0; 133 return 0;
98} 134}
99 135
136static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
137{
138 u8 omap24xx_pwrst;
139
140 switch (pwrst) {
141 case PWRDM_POWER_OFF:
142 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
143 break;
144 case PWRDM_POWER_RET:
145 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
146 break;
147 case PWRDM_POWER_ON:
148 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
149 break;
150 default:
151 return -EINVAL;
152 }
153
154 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
155 (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
156 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
157 return 0;
158}
159
160static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
161{
162 u8 omap2xxx_pwrst;
163
164 omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
165 OMAP2_PM_PWSTCTRL,
166 OMAP_POWERSTATE_MASK);
167
168 return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
169}
170
171static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
172{
173 u8 omap2xxx_pwrst;
174
175 omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
176 OMAP2_PM_PWSTST,
177 OMAP_POWERSTATEST_MASK);
178
179 return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
180}
181
100struct pwrdm_ops omap2_pwrdm_operations = { 182struct pwrdm_ops omap2_pwrdm_operations = {
101 .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, 183 .pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst,
102 .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, 184 .pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst,
103 .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, 185 .pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst,
104 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, 186 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
105 .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, 187 .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
106 .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, 188 .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 30517f5af707..a3e121f94a86 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
103/* Powerdomain low-level functions */ 103/* Powerdomain low-level functions */
104 104
105/* Common functions across OMAP2 and OMAP3 */ 105/* Common functions across OMAP2 and OMAP3 */
106int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
107{
108 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
109 (pwrst << OMAP_POWERSTATE_SHIFT),
110 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
111 return 0;
112}
113
114int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
115{
116 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
117 OMAP2_PM_PWSTCTRL,
118 OMAP_POWERSTATE_MASK);
119}
120
121int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
122{
123 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
124 OMAP2_PM_PWSTST,
125 OMAP_POWERSTATEST_MASK);
126}
127
128int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, 106int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
129 u8 pwrst) 107 u8 pwrst)
130{ 108{
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 39822aabcff3..e648bd55b072 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -277,6 +277,28 @@ static u32 omap3xxx_prm_read_reset_sources(void)
277 277
278/* Powerdomain low-level functions */ 278/* Powerdomain low-level functions */
279 279
280static int omap3_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
281{
282 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
283 (pwrst << OMAP_POWERSTATE_SHIFT),
284 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
285 return 0;
286}
287
288static int omap3_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
289{
290 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
291 OMAP2_PM_PWSTCTRL,
292 OMAP_POWERSTATE_MASK);
293}
294
295static int omap3_pwrdm_read_pwrst(struct powerdomain *pwrdm)
296{
297 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
298 OMAP2_PM_PWSTST,
299 OMAP_POWERSTATEST_MASK);
300}
301
280/* Applicable only for OMAP3. Not supported on OMAP2 */ 302/* Applicable only for OMAP3. Not supported on OMAP2 */
281static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) 303static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
282{ 304{
@@ -355,9 +377,9 @@ static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
355} 377}
356 378
357struct pwrdm_ops omap3_pwrdm_operations = { 379struct pwrdm_ops omap3_pwrdm_operations = {
358 .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, 380 .pwrdm_set_next_pwrst = omap3_pwrdm_set_next_pwrst,
359 .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, 381 .pwrdm_read_next_pwrst = omap3_pwrdm_read_next_pwrst,
360 .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, 382 .pwrdm_read_pwrst = omap3_pwrdm_read_pwrst,
361 .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, 383 .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst,
362 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, 384 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
363 .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, 385 .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 7498bc77fe8b..c05a343d465d 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -56,9 +56,9 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
56 * enumeration) 56 * enumeration)
57 */ 57 */
58static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { 58static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
59 { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT, 59 { OMAP4430_GLOBAL_WARM_SW_RST_SHIFT,
60 OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, 60 OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
61 { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT, 61 { OMAP4430_GLOBAL_COLD_RST_SHIFT,
62 OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, 62 OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
63 { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT, 63 { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT,
64 OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, 64 OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
@@ -333,7 +333,7 @@ static u32 omap44xx_prm_read_reset_sources(void)
333 u32 r = 0; 333 u32 r = 0;
334 u32 v; 334 u32 v;
335 335
336 v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, 336 v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
337 OMAP4_RM_RSTST); 337 OMAP4_RM_RSTST);
338 338
339 p = omap44xx_prm_reset_src_map; 339 p = omap44xx_prm_reset_src_map;
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 22b0979206ca..8ee1fbdec561 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -62,8 +62,8 @@
62 62
63/* OMAP4 specific register offsets */ 63/* OMAP4 specific register offsets */
64#define OMAP4_RM_RSTCTRL 0x0000 64#define OMAP4_RM_RSTCTRL 0x0000
65#define OMAP4_RM_RSTTIME 0x0004 65#define OMAP4_RM_RSTST 0x0004
66#define OMAP4_RM_RSTST 0x0008 66#define OMAP4_RM_RSTTIME 0x0008
67#define OMAP4_PM_PWSTCTRL 0x0000 67#define OMAP4_PM_PWSTCTRL 0x0000
68#define OMAP4_PM_PWSTST 0x0004 68#define OMAP4_PM_PWSTST 0x0004
69 69
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index f3771cdb9838..5b0b86bb34bb 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -22,6 +22,8 @@
22#include <asm/mach/time.h> 22#include <asm/mach/time.h>
23#include <asm/sched_clock.h> 23#include <asm/sched_clock.h>
24 24
25#include <plat/counter-32k.h>
26
25/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ 27/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
26#define OMAP2_32KSYNCNT_REV_OFF 0x0 28#define OMAP2_32KSYNCNT_REV_OFF 0x0
27#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30) 29#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 743fc2836f7a..a5bc92d7e476 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -26,6 +26,8 @@
26 26
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28 28
29#include <plat/sram.h>
30
29#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) 31#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
30 32
31static void __iomem *omap_sram_base; 33static void __iomem *omap_sram_base;