91 files changed, 967 insertions, 1032 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ade7e924bef5..041cf0774776 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -937,7 +937,6 @@ config ARCH_OMAP
         select CLKSRC_MMIO
         select GENERIC_CLOCKEVENTS
         select HAVE_CLK
-        select NEED_MACH_GPIO_H
         help
           Support for TI's OMAP platform (OMAP1/2/3/4).
 
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index cd169c386161..f0e69cbc5baa 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,7 +3,8 @@
 #
 
 # Common support
-obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
+obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
+         serial.o devices.o dma.o
 obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
 
 ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 8b5800acf726..e067f221f0f9 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -30,13 +30,13 @@
 #include <mach/tc.h>
 #include <mach/mux.h>
 #include <mach/flash.h>
-#include <../plat-omap/fpga.h>
 #include <linux/platform_data/keypad-omap.h>
 
 #include <mach/hardware.h>
 
 #include "iomap.h"
 #include "common.h"
+#include "fpga.h"
 
 /* fsample is pretty close to p2-sample */
 
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index c66334f22471..f8033fab0f82 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -33,7 +33,6 @@
 
 #include <mach/mux.h>
 #include <mach/flash.h>
-#include <../plat-omap/fpga.h>
 #include <mach/tc.h>
 #include <linux/platform_data/keypad-omap.h>
 
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 030bd48727be..9a7e483ed6fd 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -30,13 +30,13 @@
 
 #include <mach/tc.h>
 #include <mach/mux.h>
-#include <../plat-omap/fpga.h>
 #include <mach/flash.h>
 
 #include <mach/hardware.h>
 
 #include "iomap.h"
 #include "common.h"
+#include "fpga.h"
 
 static const unsigned int p2_keymap[] = {
         KEY(0, 0, KEY_UP),
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 931f3f6d396b..4f5fd4a084c0 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -24,12 +24,11 @@
 
 #include <mach/hardware.h>
 
-#include "../plat-omap/sram.h"
-
 #include "soc.h"
 #include "iomap.h"
 #include "clock.h"
 #include "opp.h"
+#include "sram.h"
 
 __u32 arm_idlect1_mask;
 struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 28aea55a412e..cb7c6ae2e3fc 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -27,10 +27,9 @@
 #include <mach/hardware.h>
 #include <mach/usb.h>   /* for OTG_BASE */
 
-#include "../plat-omap/sram.h"
-
 #include "iomap.h"
 #include "clock.h"
+#include "sram.h"
 
 /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */
 #define IDL_CLKOUT_ARM_SHIFT                    12
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index ecd0bb664dad..b53e0854422f 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -26,11 +26,10 @@
 #ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
 #define __ARCH_ARM_MACH_OMAP1_COMMON_H
 
-#include "../plat-omap/common.h"
 #include <linux/mtd/mtd.h>
 #include <linux/i2c-omap.h>
 
-#include "../plat-omap/i2c.h"
+#include <plat/i2c.h>
 
 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
 void omap7xx_map_io(void);
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 745031870ce4..0af635205e8a 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -28,12 +28,11 @@
 #include <mach/camera.h>
 #include <mach/hardware.h>
 
-#include "../plat-omap/sram.h"
-
 #include "common.h"
 #include "clock.h"
 #include "dma.h"
 #include "mmc.h"
+#include "sram.h"
 
 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
 
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index 71305c15fbd5..978aed85d328 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -321,6 +321,9 @@ static int __init omap1_system_dma_init(void)
                 d->dev_caps = ENABLE_1510_MODE;
         enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
 
+        if (cpu_is_omap16xx())
+                d->dev_caps = ENABLE_16XX_MODE;
+
         d->dev_caps             |= SRC_PORT;
         d->dev_caps             |= DST_PORT;
         d->dev_caps             |= SRC_INDEX;
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index d940fac9a9ed..8bd71b2d0967 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -27,12 +27,11 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 
-#include <../plat-omap/fpga.h>
-
 #include <mach/hardware.h>
 
 #include "iomap.h"
 #include "common.h"
+#include "fpga.h"
 
 static void fpga_mask_irq(struct irq_data *d)
 {
diff --git a/arch/arm/plat-omap/fpga.h b/arch/arm/mach-omap1/fpga.h
index 54faaa93e6f4..4b4307a80e48 100644
--- a/arch/arm/plat-omap/fpga.h
+++ b/arch/arm/mach-omap1/fpga.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/plat-omap/include/mach/fpga.h
- *
  * Interrupt handler for OMAP-1510 FPGA
  *
  * Copyright (C) 2001 RidgeRun, Inc.
@@ -38,26 +36,6 @@
 #define H2P2_DBG_FPGA_LAN_STATUS        IOMEM(H2P2_DBG_FPGA_BASE + 0x1A)        /* LAN Status line */
 #define H2P2_DBG_FPGA_LAN_RESET         IOMEM(H2P2_DBG_FPGA_BASE + 0x1C)        /* LAN Reset line */
 
-/* NOTE:  most boards don't have a static mapping for the FPGA ... */
-struct h2p2_dbg_fpga {
-        /* offset 0x00 */
-        u16             smc91x[8];
-        /* offset 0x10 */
-        u16             fpga_rev;
-        u16             board_rev;
-        u16             gpio_outputs;
-        u16             leds;
-        /* offset 0x18 */
-        u16             misc_inputs;
-        u16             lan_status;
-        u16             lan_reset;
-        u16             reserved0;
-        /* offset 0x20 */
-        u16             ps2_data;
-        u16             ps2_ctrl;
-        /* plus also 4 rs232 ports ... */
-};
-
 /* LEDs definition on debug board (16 LEDs, all physically green) */
 #define H2P2_DBG_FPGA_LED_GREEN         (1 << 15)
 #define H2P2_DBG_FPGA_LED_AMBER         (1 << 14)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 98e6f39224a4..02b3eb2e201c 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -19,6 +19,8 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <mach/irqs.h>
+
 #define OMAP1_MPUIO_VBASE               OMAP1_MPUIO_BASE
 #define OMAP1510_GPIO_BASE              0xFFFCE000
 
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 33f419236b17..b9952a258d82 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -19,6 +19,8 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <mach/irqs.h>
+
 #define OMAP1610_GPIO1_BASE             0xfffbe400
 #define OMAP1610_GPIO2_BASE             0xfffbec00
 #define OMAP1610_GPIO3_BASE             0xfffbb400
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 958ce9acee95..f5819b2b7cbe 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -19,6 +19,8 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <mach/irqs.h>
+
 #define OMAP7XX_GPIO1_BASE              0xfffbc000
 #define OMAP7XX_GPIO2_BASE              0xfffbc800
 #define OMAP7XX_GPIO3_BASE              0xfffbd000
diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c
index 32bcbb8d6c73..faca808cb3d9 100644
--- a/arch/arm/mach-omap1/i2c.c
+++ b/arch/arm/mach-omap1/i2c.c
@@ -23,7 +23,7 @@
 #include <mach/mux.h>
 #include "soc.h"
 
-#include "../plat-omap/i2c.h"
+#include <plat/i2c.h>
 
 #define OMAP_I2C_SIZE           0x3f
 #define OMAP1_I2C_BASE          0xfffb3800
@@ -54,6 +54,9 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,
         struct platform_device *pdev;
         struct resource *res;
 
+        if (bus_id > 1)
+                return -EINVAL;
+
         omap1_i2c_mux_pins(bus_id);
 
         pdev = &omap_i2c_devices[bus_id - 1];
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index 88f08cab1717..78a8c6c24764 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -13,8 +13,6 @@
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 
-#include "../../iomap.h"
-
                 .macro  get_irqnr_preamble, base, tmp
                 .endm
 
diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h
deleted file mode 100644
index ebf86c0f4f46..000000000000
--- a/arch/arm/mach-omap1/include/mach/gpio.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * arch/arm/mach-omap1/include/mach/gpio.h
- */
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h
index dc3237bd72d2..5875a5098d35 100644
--- a/arch/arm/mach-omap1/include/mach/hardware.h
+++ b/arch/arm/mach-omap1/include/mach/hardware.h
@@ -39,7 +39,7 @@
 #include <asm/sizes.h>
 #ifndef __ASSEMBLER__
 #include <asm/types.h>
-#include "../../mach-omap1/soc.h"
+#include <mach/soc.h>
 
 /*
  * NOTE: Please use ioremap + __raw_read/write where possible instead of these
@@ -72,6 +72,9 @@ static inline u32 omap_cs3_phys(void)
 
 #endif  /* ifndef __ASSEMBLER__ */
 
+#define OMAP1_IO_OFFSET         0x01000000      /* Virtual IO = 0xfefb0000 */
+#define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
+
 #include <mach/serial.h>
 
 /*
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h
index 351ae4f2c514..3c2530523111 100644
--- a/arch/arm/mach-omap1/include/mach/memory.h
+++ b/arch/arm/mach-omap1/include/mach/memory.h
@@ -19,7 +19,7 @@
  * because of the strncmp().
  */
 #if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__)
-#include "../../mach-omap1/soc.h"
+#include <mach/soc.h>
 
 /*
  * OMAP-1510 Local Bus address offset
diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h
new file mode 100644
index 000000000000..6cf9c1cc2bef
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/soc.h
@@ -0,0 +1,229 @@
+/*
+ * OMAP cpu type detection
+ *
+ * Copyright (C) 2004, 2008 Nokia Corporation
+ *
+ * Copyright (C) 2009-11 Texas Instruments.
+ *
+ * Written by Tony Lindgren <tony.lindgren@nokia.com>
+ *
+ * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARCH_OMAP_CPU_H
+#define __ASM_ARCH_OMAP_CPU_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
+
+/*
+ * Test if multicore OMAP support is needed
+ */
+#undef MULTI_OMAP1
+#undef OMAP_NAME
+
+#ifdef CONFIG_ARCH_OMAP730
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap730
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP850
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap850
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP15XX
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap1510
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP16XX
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap16xx
+# endif
+#endif
+
+/*
+ * omap_rev bits:
+ * CPU id bits  (0730, 1510, 1710, 2422...)     [31:16]
+ * CPU revision (See _REV_ defined in cpu.h)    [15:08]
+ * CPU class bits (15xx, 16xx, 24xx, 34xx...)   [07:00]
+ */
+unsigned int omap_rev(void);
+
+/*
+ * Get the CPU revision for OMAP devices
+ */
+#define GET_OMAP_REVISION()     ((omap_rev() >> 8) & 0xff)
+
+/*
+ * Macros to group OMAP into cpu classes.
+ * These can be used in most places.
+ * cpu_is_omap7xx():    True for OMAP730, OMAP850
+ * cpu_is_omap15xx():   True for OMAP1510, OMAP5910 and OMAP310
+ * cpu_is_omap16xx():   True for OMAP1610, OMAP5912 and OMAP1710
+ */
+#define GET_OMAP_CLASS  (omap_rev() & 0xff)
+
+#define IS_OMAP_CLASS(class, id)                        \
+static inline int is_omap ##class (void)                \
+{                                                       \
+        return (GET_OMAP_CLASS == (id)) ? 1 : 0;        \
+}
+
+#define GET_OMAP_SUBCLASS       ((omap_rev() >> 20) & 0x0fff)
+
+#define IS_OMAP_SUBCLASS(subclass, id)                  \
+static inline int is_omap ##subclass (void)             \
+{                                                       \
+        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
+}
+
+IS_OMAP_CLASS(7xx, 0x07)
+IS_OMAP_CLASS(15xx, 0x15)
+IS_OMAP_CLASS(16xx, 0x16)
+
+#define cpu_is_omap7xx()                0
+#define cpu_is_omap15xx()               0
+#define cpu_is_omap16xx()               0
+
+#if defined(MULTI_OMAP1)
+# if defined(CONFIG_ARCH_OMAP730)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              is_omap7xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP850)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              is_omap7xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP15XX)
+#  undef  cpu_is_omap15xx
+#  define cpu_is_omap15xx()             is_omap15xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP16XX)
+#  undef  cpu_is_omap16xx
+#  define cpu_is_omap16xx()             is_omap16xx()
+# endif
+#else
+# if defined(CONFIG_ARCH_OMAP730)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              1
+# endif
+# if defined(CONFIG_ARCH_OMAP850)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              1
+# endif
+# if defined(CONFIG_ARCH_OMAP15XX)
+#  undef  cpu_is_omap15xx
+#  define cpu_is_omap15xx()             1
+# endif
+# if defined(CONFIG_ARCH_OMAP16XX)
+#  undef  cpu_is_omap16xx
+#  define cpu_is_omap16xx()             1
+# endif
+#endif
+
+/*
+ * Macros to detect individual cpu types.
+ * These are only rarely needed.
+ * cpu_is_omap310():    True for OMAP310
+ * cpu_is_omap1510():   True for OMAP1510
+ * cpu_is_omap1610():   True for OMAP1610
+ * cpu_is_omap1611():   True for OMAP1611
+ * cpu_is_omap5912():   True for OMAP5912
+ * cpu_is_omap1621():   True for OMAP1621
+ * cpu_is_omap1710():   True for OMAP1710
+ */
+#define GET_OMAP_TYPE   ((omap_rev() >> 16) & 0xffff)
+
+#define IS_OMAP_TYPE(type, id)                          \
+static inline int is_omap ##type (void)                 \
+{                                                       \
+        return (GET_OMAP_TYPE == (id)) ? 1 : 0;         \
+}
+
+IS_OMAP_TYPE(310, 0x0310)
+IS_OMAP_TYPE(1510, 0x1510)
+IS_OMAP_TYPE(1610, 0x1610)
+IS_OMAP_TYPE(1611, 0x1611)
+IS_OMAP_TYPE(5912, 0x1611)
+IS_OMAP_TYPE(1621, 0x1621)
+IS_OMAP_TYPE(1710, 0x1710)
+
+#define cpu_is_omap310()                0
+#define cpu_is_omap1510()               0
+#define cpu_is_omap1610()               0
+#define cpu_is_omap5912()               0
+#define cpu_is_omap1611()               0
+#define cpu_is_omap1621()               0
+#define cpu_is_omap1710()               0
+
+/* These are needed to compile common code */
+#ifdef CONFIG_ARCH_OMAP1
+#define cpu_is_omap242x()               0
+#define cpu_is_omap2430()               0
+#define cpu_is_omap243x()               0
+#define cpu_is_omap24xx()               0
+#define cpu_is_omap34xx()               0
+#define cpu_is_omap44xx()               0
+#define soc_is_omap54xx()               0
+#define soc_is_am33xx()                 0
+#define cpu_class_is_omap1()            1
+#define cpu_class_is_omap2()            0
+#endif
+
+/*
+ * Whether we have MULTI_OMAP1 or not, we still need to distinguish
+ * between 310 vs. 1510 and 1611B/5912 vs. 1710.
+ */
+
+#if defined(CONFIG_ARCH_OMAP15XX)
+# undef  cpu_is_omap310
+# undef  cpu_is_omap1510
+# define cpu_is_omap310()               is_omap310()
+# define cpu_is_omap1510()              is_omap1510()
+#endif
+
+#if defined(CONFIG_ARCH_OMAP16XX)
+# undef  cpu_is_omap1610
+# undef  cpu_is_omap1611
+# undef  cpu_is_omap5912
+# undef  cpu_is_omap1621
+# undef  cpu_is_omap1710
+# define cpu_is_omap1610()              is_omap1610()
+# define cpu_is_omap1611()              is_omap1611()
+# define cpu_is_omap5912()              is_omap5912()
+# define cpu_is_omap1621()              is_omap1621()
+# define cpu_is_omap1710()              is_omap1710()
+#endif
+
+#endif  /* __ASSEMBLY__ */
+#endif
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 44389d7cd255..5a3b80617a11 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -134,7 +134,6 @@ void __init omap1_init_early(void)
          */
         omap1_clk_init();
         omap1_mux_init();
-        omap_init_consistent_dma_size();
 }
 
 void __init omap1_init_late(void)
diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h
index 330c4716b028..f4e2d7a21365 100644
--- a/arch/arm/mach-omap1/iomap.h
+++ b/arch/arm/mach-omap1/iomap.h
@@ -22,9 +22,6 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#define OMAP1_IO_OFFSET         0x01000000      /* Virtual IO = 0xfefb0000 */
-#define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
-
 /*
  * ----------------------------------------------------------------------------
  * Omap1 specific IO mapping
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index b2c2328d7c18..66d663a6ef3a 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -44,6 +44,7 @@
 #include <linux/io.h>
 #include <linux/atomic.h>
 
+#include <asm/fncpy.h>
 #include <asm/system_misc.h>
 #include <asm/irq.h>
 #include <asm/mach/time.h>
@@ -56,11 +57,10 @@
 
 #include <mach/irqs.h>
 
-#include "../plat-omap/sram.h"
-
 #include "iomap.h"
 #include "clock.h"
 #include "pm.h"
+#include "sram.h"
 
 static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
 static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index 0e628743bd03..a908c51839a4 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -36,6 +36,8 @@
 
 #include <asm/assembler.h>
 
+#include <mach/hardware.h>
+
 #include "iomap.h"
 #include "pm.h"
 
diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h
index 6cf9c1cc2bef..69daf0187b1d 100644
--- a/arch/arm/mach-omap1/soc.h
+++ b/arch/arm/mach-omap1/soc.h
@@ -1,229 +1,4 @@
 /*
- * OMAP cpu type detection
- *
- * Copyright (C) 2004, 2008 Nokia Corporation
- *
- * Copyright (C) 2009-11 Texas Instruments.
- *
- * Written by Tony Lindgren <tony.lindgren@nokia.com>
- *
- * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
+ * We can move mach/soc.h here once the drivers are fixed
  */
-
-#ifndef __ASM_ARCH_OMAP_CPU_H
-#define __ASM_ARCH_OMAP_CPU_H
-
-#ifndef __ASSEMBLY__
-
-#include <linux/bitops.h>
-
-/*
- * Test if multicore OMAP support is needed
- */
-#undef MULTI_OMAP1
-#undef OMAP_NAME
-
-#ifdef CONFIG_ARCH_OMAP730
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap730
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap850
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap1510
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap16xx
-# endif
-#endif
-
-/*
- * omap_rev bits:
- * CPU id bits  (0730, 1510, 1710, 2422...)     [31:16]
- * CPU revision (See _REV_ defined in cpu.h)    [15:08]
- * CPU class bits (15xx, 16xx, 24xx, 34xx...)   [07:00]
- */
-unsigned int omap_rev(void);
-
-/*
- * Get the CPU revision for OMAP devices
- */
-#define GET_OMAP_REVISION()     ((omap_rev() >> 8) & 0xff)
-
-/*
- * Macros to group OMAP into cpu classes.
- * These can be used in most places.
- * cpu_is_omap7xx():    True for OMAP730, OMAP850
- * cpu_is_omap15xx():   True for OMAP1510, OMAP5910 and OMAP310
- * cpu_is_omap16xx():   True for OMAP1610, OMAP5912 and OMAP1710
- */
-#define GET_OMAP_CLASS  (omap_rev() & 0xff)
-
-#define IS_OMAP_CLASS(class, id)                        \
-static inline int is_omap ##class (void)                \
-{                                                       \
-        return (GET_OMAP_CLASS == (id)) ? 1 : 0;        \
-}
-
-#define GET_OMAP_SUBCLASS       ((omap_rev() >> 20) & 0x0fff)
-
-#define IS_OMAP_SUBCLASS(subclass, id)                  \
-static inline int is_omap ##subclass (void)             \
-{                                                       \
-        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
-}
-
-IS_OMAP_CLASS(7xx, 0x07)
-IS_OMAP_CLASS(15xx, 0x15)
-IS_OMAP_CLASS(16xx, 0x16)
-
-#define cpu_is_omap7xx()                0
-#define cpu_is_omap15xx()               0
-#define cpu_is_omap16xx()               0
-
-#if defined(MULTI_OMAP1)
-# if defined(CONFIG_ARCH_OMAP730)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              is_omap7xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP850)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              is_omap7xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP15XX)
-#  undef  cpu_is_omap15xx
-#  define cpu_is_omap15xx()             is_omap15xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP16XX)
-#  undef  cpu_is_omap16xx
-#  define cpu_is_omap16xx()             is_omap16xx()
-# endif
-#else
-# if defined(CONFIG_ARCH_OMAP730)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              1
-# endif
-# if defined(CONFIG_ARCH_OMAP850)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              1
-# endif
-# if defined(CONFIG_ARCH_OMAP15XX)
-#  undef  cpu_is_omap15xx
-#  define cpu_is_omap15xx()             1
-# endif
-# if defined(CONFIG_ARCH_OMAP16XX)
-#  undef  cpu_is_omap16xx
-#  define cpu_is_omap16xx()             1
-# endif
-#endif
-
-/*
- * Macros to detect individual cpu types.
- * These are only rarely needed.
- * cpu_is_omap310():    True for OMAP310
- * cpu_is_omap1510():   True for OMAP1510
- * cpu_is_omap1610():   True for OMAP1610
- * cpu_is_omap1611():   True for OMAP1611
- * cpu_is_omap5912():   True for OMAP5912
- * cpu_is_omap1621():   True for OMAP1621
- * cpu_is_omap1710():   True for OMAP1710
- */
-#define GET_OMAP_TYPE   ((omap_rev() >> 16) & 0xffff)
-
-#define IS_OMAP_TYPE(type, id)                          \
-static inline int is_omap ##type (void)                 \
-{                                                       \
-        return (GET_OMAP_TYPE == (id)) ? 1 : 0;         \
-}
-
-IS_OMAP_TYPE(310, 0x0310)
-IS_OMAP_TYPE(1510, 0x1510)
-IS_OMAP_TYPE(1610, 0x1610)
-IS_OMAP_TYPE(1611, 0x1611)
-IS_OMAP_TYPE(5912, 0x1611)
-IS_OMAP_TYPE(1621, 0x1621)
-IS_OMAP_TYPE(1710, 0x1710)
-
-#define cpu_is_omap310()                0
-#define cpu_is_omap1510()               0
-#define cpu_is_omap1610()               0
-#define cpu_is_omap5912()               0
-#define cpu_is_omap1611()               0
-#define cpu_is_omap1621()               0
-#define cpu_is_omap1710()               0
-
-/* These are needed to compile common code */
-#ifdef CONFIG_ARCH_OMAP1
-#define cpu_is_omap242x()               0
-#define cpu_is_omap2430()               0
-#define cpu_is_omap243x()               0
-#define cpu_is_omap24xx()               0
-#define cpu_is_omap34xx()               0
-#define cpu_is_omap44xx()               0
-#define soc_is_omap54xx()               0
-#define soc_is_am33xx()                 0
-#define cpu_class_is_omap1()            1
-#define cpu_class_is_omap2()            0
-#endif
-
-/*
- * Whether we have MULTI_OMAP1 or not, we still need to distinguish
- * between 310 vs. 1510 and 1611B/5912 vs. 1710.
- */
-
-#if defined(CONFIG_ARCH_OMAP15XX)
-# undef  cpu_is_omap310
-# undef  cpu_is_omap1510
-# define cpu_is_omap310()               is_omap310()
-# define cpu_is_omap1510()              is_omap1510()
-#endif
-
-#if defined(CONFIG_ARCH_OMAP16XX)
-# undef  cpu_is_omap1610
-# undef  cpu_is_omap1611
-# undef  cpu_is_omap5912
-# undef  cpu_is_omap1621
-# undef  cpu_is_omap1710
-# define cpu_is_omap1610()              is_omap1610()
-# define cpu_is_omap1611()              is_omap1611()
-# define cpu_is_omap5912()              is_omap5912()
-# define cpu_is_omap1621()              is_omap1621()
-# define cpu_is_omap1710()              is_omap1710()
-#endif
-
-#endif  /* __ASSEMBLY__ */
-#endif
+#include <mach/soc.h>
diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c
new file mode 100644
index 000000000000..6431b0f862ce
--- /dev/null
+++ b/arch/arm/mach-omap1/sram-init.c
@@ -0,0 +1,76 @@
+/*
+ * OMAP SRAM detection and management
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fncpy.h>
+#include <asm/tlb.h>
+#include <asm/cacheflush.h>
+
+#include <asm/mach/map.h>
+
+#include "soc.h"
+#include "sram.h"
+
+#define OMAP1_SRAM_PA           0x20000000
+#define SRAM_BOOTLOADER_SZ      0x80
+
+/*
+ * The amount of SRAM depends on the core type.
+ * Note that we cannot try to test for SRAM here because writes
+ * to secure SRAM will hang the system. Also the SRAM is not
+ * yet mapped at this point.
+ */
+static void __init omap_detect_and_map_sram(void)
+{
+        unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ;
+        unsigned long omap_sram_start = OMAP1_SRAM_PA;
+        unsigned long omap_sram_size;
+
+        if (cpu_is_omap7xx())
+                omap_sram_size = 0x32000;       /* 200K */
+        else if (cpu_is_omap15xx())
+                omap_sram_size = 0x30000;       /* 192K */
+        else if (cpu_is_omap1610() || cpu_is_omap1611() ||
+                        cpu_is_omap1621() || cpu_is_omap1710())
+                omap_sram_size = 0x4000;        /* 16K */
+        else {
+                pr_err("Could not detect SRAM size\n");
+                omap_sram_size = 0x4000;
+        }
+
+        omap_map_sram(omap_sram_start, omap_sram_size,
+                omap_sram_skip, 1);
+}
+
+static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
+
+void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
+{
+        BUG_ON(!_omap_sram_reprogram_clock);
+        /* On 730, bit 13 must always be 1 */
+        if (cpu_is_omap7xx())
+                ckctl |= 0x2000;
+        _omap_sram_reprogram_clock(dpllctl, ckctl);
+}
+
+int __init omap_sram_init(void)
+{
+        omap_detect_and_map_sram();
+        _omap_sram_reprogram_clock =
+                        omap_sram_push(omap1_sram_reprogram_clock,
+                                        omap1_sram_reprogram_clock_sz);
+
+        return 0;
+}
diff --git a/arch/arm/mach-omap1/sram.h b/arch/arm/mach-omap1/sram.h
new file mode 100644
index 000000000000..d5a6c8362301
--- /dev/null
+++ b/arch/arm/mach-omap1/sram.h
@@ -0,0 +1,7 @@
+#include <plat/sram.h>
+
+extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
+
+/* Do not use these */
+extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
+extern unsigned long omap1_sram_reprogram_clock_sz;
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 74529549130c..89368195bf08 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -50,6 +50,7 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
+#include <plat/counter-32k.h>
 #include <plat/dmtimer.h>
 
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c
index 84267edd9421..104fed366b8f 100644
--- a/arch/arm/mach-omap1/usb.c
+++ b/arch/arm/mach-omap1/usb.c
@@ -301,7 +301,7 @@ static inline void otg_device_init(struct omap_usb_config *pdata)
 
 #endif
 
-u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
+static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
 {
         u32     syscon1 = 0;
 
@@ -409,7 +409,7 @@ u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
         return syscon1 << 16;
 }
 
-u32 __init omap1_usb1_init(unsigned nwires)
+static u32 __init omap1_usb1_init(unsigned nwires)
 {
         u32     syscon1 = 0;
 
@@ -475,7 +475,7 @@ bad:
         return syscon1 << 20;
 }
 
-u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
+static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
 {
         u32     syscon1 = 0;
 
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 798f35b8ea59..745401020c2b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -5,7 +5,7 @@
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
          common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
-         omap_device.o
+         omap_device.o sram.o
 
 omap-2-3-common                         = irq.o
 hwmod-common                            = omap_hwmod.o \
@@ -73,6 +73,8 @@ obj-$(CONFIG_ARCH_OMAP4)		+= opp4xxx_data.o
 endif
 
 # Power Management
+obj-$(CONFIG_OMAP_PM_NOOP)              += omap-pm-noop.o
+
 ifeq ($(CONFIG_PM),y)
 obj-$(CONFIG_ARCH_OMAP2)                += pm24xx.o
 obj-$(CONFIG_ARCH_OMAP2)                += sleep24xx.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index acb0a524ff7b..4815ea6f8f5d 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -28,7 +28,6 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 488f86fd0e72..c8e37dc00892 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -44,8 +44,6 @@
 #include <video/omap-panel-tfp410.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
-#include <mach/hardware.h>
-
 #include "common.h"
 #include "mux.h"
 #include "sdram-micron-mt46h32m32lf-6.h"
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 3c1e458f68a1..b626dbe6f7bc 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -33,7 +33,7 @@
 #include <asm/mach/map.h>
 
 #include <plat-omap/dma-omap.h>
-#include "debug-devices.h"
+#include <plat/debug-devices.h>
 
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 140b73094aff..c8fde3e56441 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -45,7 +45,6 @@
 #include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
-#include "common.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 #include <video/omap-panel-tfp410.h>
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index a0ae3c09f97a..d8620105c42a 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -25,14 +25,13 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include "../plat-omap/sram.h"
-
 #include "clock.h"
 #include "clock2xxx.h"
 #include "opp2xxx.h"
 #include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
 #include "sdrc.h"
+#include "sram.h"
 
 /* #define DOWN_VARIABLE_DPLL 1 */              /* Experimental */
 
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 7af224208a25..ae2b35e76dc8 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -33,8 +33,6 @@
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
 
-#include "../plat-omap/sram.h"
-
 #include "soc.h"
 #include "clock.h"
 #include "clock2xxx.h"
@@ -42,6 +40,7 @@
 #include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
 #include "sdrc.h"
+#include "sram.h"
 
 const struct prcm_config *curr_prcm_set;
 const struct prcm_config *rate_table;
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index 8e48c6d602e7..eb69acf21014 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -21,12 +21,11 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include "../plat-omap/sram.h"
-
 #include "clock.h"
 #include "clock3xxx.h"
 #include "clock34xx.h"
 #include "sdrc.h"
+#include "sram.h"
 
 #define CYCLES_PER_MHZ                  1000000
 
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index b2dfcd777194..058ce3c0873e 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -22,8 +22,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "../plat-omap/common.h"
-
 #include "clockdomain.h"
 #include "cm.h"
 #include "cm33xx.h"
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index c57eeeac7d11..08c586451f93 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -34,8 +34,6 @@
 
 #include <asm/proc-fns.h>
 
-#include "../plat-omap/common.h"
-
 #include "i2c.h"
 #include "serial.h"
 
@@ -280,5 +278,8 @@ struct omap2_hsmmc_info;
 extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
 extern void omap_reserve(void);
 
+struct omap_hwmod;
+extern int omap_dss_reset(struct omap_hwmod *);
+
 #endif /* __ASSEMBLER__ */
 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index b1926cd70468..e5aba58da5d2 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -276,6 +276,9 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
                 return -ENOMEM;
         }
 
+        if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
+                d->dev_caps |= HS_CHANNELS_RESERVED;
+
         /* Check the capabilities register for descriptor loading feature */
         if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
                 dma_common_ch_end = CCDN;
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index e3406dce59be..4a964338992a 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -14,7 +14,6 @@
 #include <linux/string.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
-#include <mach/hardware.h>
 #include <linux/platform_data/gpio-omap.h>
 
 #include "soc.h"
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index be092e8e5d85..fbb9b152cd5e 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -107,6 +107,19 @@ int omap_i2c_reset(struct omap_hwmod *oh)
         return 0;
 }
 
+static int __init omap_i2c_nr_ports(void)
+{
+        int ports = 0;
+
+        if (cpu_is_omap24xx())
+                ports = 2;
+        else if (cpu_is_omap34xx())
+                ports = 3;
+        else if (cpu_is_omap44xx())
+                ports = 4;
+        return ports;
+}
+
 static const char name[] = "omap_i2c";
 
 int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
@@ -119,6 +132,9 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
         struct omap_i2c_bus_platform_data *pdata;
         struct omap_i2c_dev_attr *dev_attr;
 
+        if (bus_id > omap_i2c_nr_ports())
+                return -EINVAL;
+
         omap2_i2c_mux_pins(bus_id);
 
         l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
diff --git a/arch/arm/mach-omap2/i2c.h b/arch/arm/mach-omap2/i2c.h
index 81dbb992a6bc..42b6f2e7d190 100644
--- a/arch/arm/mach-omap2/i2c.h
+++ b/arch/arm/mach-omap2/i2c.h
@@ -19,7 +19,7 @@
  *
  */
 
-#include "../plat-omap/i2c.h"
+#include <plat/i2c.h>
 
 #ifndef __MACH_OMAP2_I2C_H
 #define __MACH_OMAP2_I2C_H
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index f1e121502789..45cc7ed4dd58 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -28,6 +28,9 @@
 #include "soc.h"
 #include "control.h"
 
+#define OMAP4_SILICON_TYPE_STANDARD             0x01
+#define OMAP4_SILICON_TYPE_PERFORMANCE          0x02
+
 static unsigned int omap_revision;
 static const char *cpu_rev;
 u32 omap_features;
@@ -273,25 +276,11 @@ void __init omap4xxx_check_features(void)
 {
         u32 si_type;
 
-        if (cpu_is_omap443x())
-                omap_features |= OMAP4_HAS_MPU_1GHZ;
-
+        si_type =
+        (read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1) >> 16) & 0x03;
 
-        if (cpu_is_omap446x()) {
-                si_type =
-                        read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1);
-                switch ((si_type & (3 << 16)) >> 16) {
-                case 2:
-                        /* High performance device */
-                        omap_features |= OMAP4_HAS_MPU_1_5GHZ;
-                        break;
-                case 1:
-                default:
-                        /* Standard device */
-                        omap_features |= OMAP4_HAS_MPU_1_2GHZ;
-                        break;
-                }
-        }
+        if (si_type == OMAP4_SILICON_TYPE_PERFORMANCE)
+                omap_features = OMAP4_HAS_PERF_SILICON;
 }
 
 void __init ti81xx_check_features(void)
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 4b5cbdfac028..cfaed13d0040 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -13,7 +13,7 @@
 
 #include <linux/serial_reg.h>
 
-#include <../mach-omap2/serial.h>
+#include <mach/serial.h>
 
 #define UART_OFFSET(addr)       ((addr) & 0x00ffffff)
 
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
deleted file mode 100644
index 5621cc59c9f4..000000000000
--- a/arch/arm/mach-omap2/include/mach/gpio.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * arch/arm/mach-omap2/include/mach/gpio.h
- */
diff --git a/arch/arm/mach-omap2/include/mach/serial.h b/arch/arm/mach-omap2/include/mach/serial.h
new file mode 100644
index 000000000000..70eda00db7a4
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/serial.h
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * Memory entry used for the DEBUG_LL UART configuration, relative to
+ * start of RAM. See also uncompress.h and debug-macro.S.
+ *
+ * Note that using a memory location for storing the UART configuration
+ * has at least two limitations:
+ *
+ * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
+ *    uncompress code could then partially overwrite itself
+ * 2. We assume printascii is called at least once before paging_init,
+ *    and addruart has a chance to read OMAP_UART_INFO
+ */
+#define OMAP_UART_INFO_OFS      0x3ffc
+
+/* OMAP2 serial ports */
+#define OMAP2_UART1_BASE        0x4806a000
+#define OMAP2_UART2_BASE        0x4806c000
+#define OMAP2_UART3_BASE        0x4806e000
+
+/* OMAP3 serial ports */
+#define OMAP3_UART1_BASE        OMAP2_UART1_BASE
+#define OMAP3_UART2_BASE        OMAP2_UART2_BASE
+#define OMAP3_UART3_BASE        0x49020000
+#define OMAP3_UART4_BASE        0x49042000      /* Only on 36xx */
+#define OMAP3_UART4_AM35XX_BASE 0x4809E000      /* Only on AM35xx */
+
+/* OMAP4 serial ports */
+#define OMAP4_UART1_BASE        OMAP2_UART1_BASE
+#define OMAP4_UART2_BASE        OMAP2_UART2_BASE
+#define OMAP4_UART3_BASE        0x48020000
+#define OMAP4_UART4_BASE        0x4806e000
+
+/* TI81XX serial ports */
+#define TI81XX_UART1_BASE       0x48020000
+#define TI81XX_UART2_BASE       0x48022000
+#define TI81XX_UART3_BASE       0x48024000
+
+/* AM3505/3517 UART4 */
+#define AM35XX_UART4_BASE       0x4809E000      /* Only on AM3505/3517 */
+
+/* AM33XX serial port */
+#define AM33XX_UART1_BASE       0x44E09000
+
+/* OMAP5 serial ports */
+#define OMAP5_UART1_BASE        OMAP2_UART1_BASE
+#define OMAP5_UART2_BASE        OMAP2_UART2_BASE
+#define OMAP5_UART3_BASE        OMAP4_UART3_BASE
+#define OMAP5_UART4_BASE        OMAP4_UART4_BASE
+#define OMAP5_UART5_BASE        0x48066000
+#define OMAP5_UART6_BASE        0x48068000
+
+/* External port on Zoom2/3 */
+#define ZOOM_UART_BASE          0x10000000
+#define ZOOM_UART_VIRT          0xfa400000
+
+#define OMAP_PORT_SHIFT         2
+#define ZOOM_PORT_SHIFT         1
+
+#define OMAP24XX_BASE_BAUD      (48000000/16)
+
+/*
+ * DEBUG_LL port encoding stored into the UART1 scratchpad register by
+ * decomp_setup in uncompress.h
+ */
+#define OMAP2UART1              21
+#define OMAP2UART2              22
+#define OMAP2UART3              23
+#define OMAP3UART1              OMAP2UART1
+#define OMAP3UART2              OMAP2UART2
+#define OMAP3UART3              33
+#define OMAP3UART4              34              /* Only on 36xx */
+#define OMAP4UART1              OMAP2UART1
+#define OMAP4UART2              OMAP2UART2
+#define OMAP4UART3              43
+#define OMAP4UART4              44
+#define TI81XXUART1             81
+#define TI81XXUART2             82
+#define TI81XXUART3             83
+#define AM33XXUART1             84
+#define OMAP5UART3              OMAP4UART3
+#define OMAP5UART4              OMAP4UART4
+#define ZOOM_UART               95              /* Only on zoom2/3 */
+
+#ifndef __ASSEMBLER__
+
+struct omap_board_data;
+struct omap_uart_port_info;
+
+extern void omap_serial_init(void);
+extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
+extern void omap_serial_init_port(struct omap_board_data *bdata,
+                struct omap_uart_port_info *platform_data);
+#endif
diff --git a/arch/arm/mach-omap2/include/mach/uncompress.h b/arch/arm/mach-omap2/include/mach/uncompress.h
index 28d1ec0e869a..8e3546d3e041 100644
--- a/arch/arm/mach-omap2/include/mach/uncompress.h
+++ b/arch/arm/mach-omap2/include/mach/uncompress.h
@@ -23,7 +23,7 @@
 #include <asm/memory.h>
 #include <asm/mach-types.h>
 
-#include <../mach-omap2/serial.h>
+#include <mach/serial.h>
 
 #define MDR1_MODE_MASK                  0x07
 
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 007dc4d85d54..7c39238322e0 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -27,8 +27,6 @@
 
 #include <plat-omap/dma-omap.h>
 
-#include "../plat-omap/sram.h"
-
 #include "omap_hwmod.h"
 #include "soc.h"
 #include "iomap.h"
@@ -44,6 +42,7 @@
 #include "sdrc.h"
 #include "control.h"
 #include "serial.h"
+#include "sram.h"
 #include "cm2xxx.h"
 #include "cm3xxx.h"
 #include "prm.h"
@@ -365,11 +364,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 }
 
-static void __init omap_common_init_early(void)
-{
-        omap_init_consistent_dma_size();
-}
-
 static void __init omap_hwmod_init_postsetup(void)
 {
         u8 postsetup_state;
@@ -398,7 +392,6 @@ void __init omap2420_init_early(void)
         omap2xxx_check_revision();
         omap2xxx_prm_init();
         omap2xxx_cm_init();
-        omap_common_init_early();
         omap2xxx_voltagedomains_init();
         omap242x_powerdomains_init();
         omap242x_clockdomains_init();
@@ -429,7 +422,6 @@ void __init omap2430_init_early(void)
         omap2xxx_check_revision();
         omap2xxx_prm_init();
         omap2xxx_cm_init();
-        omap_common_init_early();
         omap2xxx_voltagedomains_init();
         omap243x_powerdomains_init();
         omap243x_clockdomains_init();
@@ -465,7 +457,6 @@ void __init omap3_init_early(void)
         omap3xxx_check_features();
         omap3xxx_prm_init();
         omap3xxx_cm_init();
-        omap_common_init_early();
         omap3xxx_voltagedomains_init();
         omap3xxx_powerdomains_init();
         omap3xxx_clockdomains_init();
@@ -504,7 +495,6 @@ void __init ti81xx_init_early(void)
         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
         omap3xxx_check_revision();
         ti81xx_check_features();
-        omap_common_init_early();
         omap3xxx_voltagedomains_init();
         omap3xxx_powerdomains_init();
         omap3xxx_clockdomains_init();
@@ -573,7 +563,6 @@ void __init am33xx_init_early(void)
         omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
         omap3xxx_check_revision();
         ti81xx_check_features();
-        omap_common_init_early();
         am33xx_voltagedomains_init();
         am33xx_powerdomains_init();
         am33xx_clockdomains_init();
@@ -599,7 +588,6 @@ void __init omap4430_init_early(void)
         omap4xxx_check_revision();
         omap4xxx_check_features();
         omap44xx_prm_init();
-        omap_common_init_early();
         omap44xx_voltagedomains_init();
         omap44xx_powerdomains_init();
         omap44xx_clockdomains_init();
@@ -631,7 +619,6 @@ void __init omap5_init_early(void)
         omap_prm_base_init();
         omap_cm_base_init();
         omap5xxx_check_revision();
-        omap_common_init_early();
 }
 #endif
 
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/mach-omap2/omap-pm-noop.c
index 198685b894b0..6a3be2bebddb 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/mach-omap2/omap-pm-noop.c
@@ -22,8 +22,8 @@
 #include <linux/device.h>
 #include <linux/platform_device.h>
 
-#include "../mach-omap2/omap_device.h"
-#include "../mach-omap2/omap-pm.h"
+#include "omap_device.h"
+#include "omap-pm.h"
 
 static bool off_mode_enabled;
 static int dummy_context_loss_counter;
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 64fce07a3ccd..5695885ea340 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -25,8 +25,6 @@
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
 
-#include "../plat-omap/sram.h"
-
 #include "omap-wakeupgen.h"
 #include "soc.h"
 #include "iomap.h"
@@ -37,6 +35,7 @@
 #include "prcm_mpu44xx.h"
 #include "omap4-sar-layout.h"
 #include "omap-secure.h"
+#include "sram.h"
 
 #ifdef CONFIG_CACHE_L2X0
 static void __iomem *l2cache_base;
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index 05c6a5906550..40d6c93d9853 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -12,8 +12,6 @@
 
 #include <plat-omap/dma-omap.h>
 
-#include "../plat-omap/common.h"
-
 #include "omap_hwmod.h"
 #include "hdq1w.h"
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 5b9be734709c..7a6132848f5d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -30,8 +30,6 @@
 #include <plat/dmtimer.h>
 #include <plat/iommu.h>
 
-#include "../plat-omap/common.h"
-
 #include "omap_hwmod.h"
 #include "omap_hwmod_common_data.h"
 #include "cm1_44xx.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 3d35bd64487c..c289b3333c99 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -31,6 +31,8 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <asm/fncpy.h>
+
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 #include <asm/mach-types.h>
@@ -38,8 +40,6 @@
 
 #include <plat-omap/dma-omap.h>
 
-#include "../plat-omap/sram.h"
-
 #include "soc.h"
 #include "common.h"
 #include "clock.h"
@@ -48,6 +48,7 @@
 #include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
 #include "sdrc.h"
+#include "sram.h"
 #include "pm.h"
 #include "control.h"
 #include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a9b8da1629bf..770320061422 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -32,6 +32,7 @@
 
 #include <trace/events/power.h>
 
+#include <asm/fncpy.h>
 #include <asm/suspend.h>
 #include <asm/system_misc.h>
 
@@ -39,8 +40,6 @@
 #include "powerdomain.h"
 #include <plat-omap/dma-omap.h>
 
-#include "../plat-omap/sram.h"
-
 #include "soc.h"
 #include "common.h"
 #include "cm3xxx.h"
@@ -50,6 +49,7 @@
 #include "prm3xxx.h"
 #include "pm.h"
 #include "sdrc.h"
+#include "sram.h"
 #include "control.h"
 
 /* pm34xx errata defined in pm.h */
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 53ec9cbaa3d3..1ac73883f891 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -19,8 +19,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "../plat-omap/common.h"
-
 #include "common.h"
 #include "powerdomain.h"
 #include "prm33xx.h"
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index c6ae53ca8224..228b850e632f 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -24,8 +24,6 @@
 #include <linux/interrupt.h>
 #include <linux/slab.h>
 
-#include "../plat-omap/common.h"
-
 #include "prm2xxx_3xxx.h"
 #include "prm2xxx.h"
 #include "prm3xxx.h"
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 3ed0d62333c5..dae7e4804a48 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -23,8 +23,6 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include "../plat-omap/sram.h"
-
 #include "common.h"
 #include "clock.h"
 #include "sdrc.h"
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 26c1728e09ca..907291714643 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,14 +24,13 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include "../plat-omap/sram.h"
-
 #include "soc.h"
 #include "iomap.h"
 #include "common.h"
 #include "prm2xxx.h"
 #include "clock.h"
 #include "sdrc.h"
+#include "sram.h"
 
 /* Memory timing, DLL mode flags */
 #define M_DDR           1
diff --git a/arch/arm/mach-omap2/serial.h b/arch/arm/mach-omap2/serial.h
index 6a6806271fcf..c4014f013df0 100644
--- a/arch/arm/mach-omap2/serial.h
+++ b/arch/arm/mach-omap2/serial.h
@@ -1,112 +1 @@
-/*
- * arch/arm/plat-omap/include/mach/serial.h
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#include <linux/init.h>
-
-/*
- * Memory entry used for the DEBUG_LL UART configuration, relative to
- * start of RAM. See also uncompress.h and debug-macro.S.
- *
- * Note that using a memory location for storing the UART configuration
- * has at least two limitations:
- *
- * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
- *    uncompress code could then partially overwrite itself
- * 2. We assume printascii is called at least once before paging_init,
- *    and addruart has a chance to read OMAP_UART_INFO
- */
-#define OMAP_UART_INFO_OFS      0x3ffc
-
-/* OMAP2 serial ports */
-#define OMAP2_UART1_BASE        0x4806a000
-#define OMAP2_UART2_BASE        0x4806c000
-#define OMAP2_UART3_BASE        0x4806e000
-
-/* OMAP3 serial ports */
-#define OMAP3_UART1_BASE        OMAP2_UART1_BASE
-#define OMAP3_UART2_BASE        OMAP2_UART2_BASE
-#define OMAP3_UART3_BASE        0x49020000
-#define OMAP3_UART4_BASE        0x49042000      /* Only on 36xx */
-#define OMAP3_UART4_AM35XX_BASE 0x4809E000      /* Only on AM35xx */
-
-/* OMAP4 serial ports */
-#define OMAP4_UART1_BASE        OMAP2_UART1_BASE
-#define OMAP4_UART2_BASE        OMAP2_UART2_BASE
-#define OMAP4_UART3_BASE        0x48020000
-#define OMAP4_UART4_BASE        0x4806e000
-
-/* TI81XX serial ports */
-#define TI81XX_UART1_BASE       0x48020000
-#define TI81XX_UART2_BASE       0x48022000
-#define TI81XX_UART3_BASE       0x48024000
-
-/* AM3505/3517 UART4 */
-#define AM35XX_UART4_BASE       0x4809E000      /* Only on AM3505/3517 */
-
-/* AM33XX serial port */
-#define AM33XX_UART1_BASE       0x44E09000
-
-/* OMAP5 serial ports */
-#define OMAP5_UART1_BASE        OMAP2_UART1_BASE
-#define OMAP5_UART2_BASE        OMAP2_UART2_BASE
-#define OMAP5_UART3_BASE        OMAP4_UART3_BASE
-#define OMAP5_UART4_BASE        OMAP4_UART4_BASE
-#define OMAP5_UART5_BASE        0x48066000
-#define OMAP5_UART6_BASE        0x48068000
-
-/* External port on Zoom2/3 */
-#define ZOOM_UART_BASE          0x10000000
-#define ZOOM_UART_VIRT          0xfa400000
-
-#define OMAP_PORT_SHIFT         2
-#define ZOOM_PORT_SHIFT         1
-
-#define OMAP24XX_BASE_BAUD      (48000000/16)
-
-/*
- * DEBUG_LL port encoding stored into the UART1 scratchpad register by
- * decomp_setup in uncompress.h
- */
-#define OMAP2UART1              21
-#define OMAP2UART2              22
-#define OMAP2UART3              23
-#define OMAP3UART1              OMAP2UART1
-#define OMAP3UART2              OMAP2UART2
-#define OMAP3UART3              33
-#define OMAP3UART4              34              /* Only on 36xx */
-#define OMAP4UART1              OMAP2UART1
-#define OMAP4UART2              OMAP2UART2
-#define OMAP4UART3              43
-#define OMAP4UART4              44
-#define TI81XXUART1             81
-#define TI81XXUART2             82
-#define TI81XXUART3             83
-#define AM33XXUART1             84
-#define OMAP5UART3              OMAP4UART3
-#define OMAP5UART4              OMAP4UART4
-#define ZOOM_UART               95              /* Only on zoom2/3 */
-
-#ifndef __ASSEMBLER__
-
-struct omap_board_data;
-struct omap_uart_port_info;
-
-extern void omap_serial_init(void);
-extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
-extern void omap_serial_init_port(struct omap_board_data *bdata,
-                struct omap_uart_port_info *platform_data);
-#endif
-
-#endif
+#include <mach/serial.h>
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 474dba7263e3..d1dedc8195ed 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -26,13 +26,12 @@
 
 #include <asm/assembler.h>
 
-#include "../plat-omap/sram.h"
-
 #include "omap34xx.h"
 #include "iomap.h"
 #include "cm3xxx.h"
 #include "prm3xxx.h"
 #include "sdrc.h"
+#include "sram.h"
 #include "control.h"
 
 /*
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 070096496e20..f31d90774de0 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -435,9 +435,7 @@ extern u32 omap_features;
 #define OMAP3_HAS_IO_WAKEUP             BIT(6)
 #define OMAP3_HAS_SDRC                  BIT(7)
 #define OMAP3_HAS_IO_CHAIN_CTRL         BIT(8)
-#define OMAP4_HAS_MPU_1GHZ              BIT(9)
-#define OMAP4_HAS_MPU_1_2GHZ            BIT(10)
-#define OMAP4_HAS_MPU_1_5GHZ            BIT(11)
+#define OMAP4_HAS_PERF_SILICON          BIT(9)
 
 
 #define OMAP3_HAS_FEATURE(feat,flag)                    \
@@ -465,9 +463,7 @@ static inline unsigned int omap4_has_ ##feat(void)	\
         return omap_features & OMAP4_HAS_ ##flag;       \
 }                                                       \
 
-OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ)
-OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ)
-OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ)
+OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)
 
 #endif  /* __ASSEMBLY__ */
 
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
new file mode 100644
index 000000000000..0ff0f068bea8
--- /dev/null
+++ b/arch/arm/mach-omap2/sram.c
@@ -0,0 +1,305 @@
+/*
+ *
+ * OMAP SRAM detection and management
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * Copyright (C) 2009-2012 Texas Instruments
+ * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fncpy.h>
+#include <asm/tlb.h>
+#include <asm/cacheflush.h>
+
+#include <asm/mach/map.h>
+
+#include "soc.h"
+#include "iomap.h"
+#include "prm2xxx_3xxx.h"
+#include "sdrc.h"
+#include "sram.h"
+
+#define OMAP2_SRAM_PUB_PA       (OMAP2_SRAM_PA + 0xf800)
+#define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
+#ifdef CONFIG_OMAP4_ERRATA_I688
+#define OMAP4_SRAM_PUB_PA       OMAP4_SRAM_PA
+#else
+#define OMAP4_SRAM_PUB_PA       (OMAP4_SRAM_PA + 0x4000)
+#endif
+#define OMAP5_SRAM_PA           0x40300000
+
+#define SRAM_BOOTLOADER_SZ      0x00
+
+#define OMAP24XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68005048)
+#define OMAP24XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68005050)
+#define OMAP24XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68005058)
+
+#define OMAP34XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68012848)
+#define OMAP34XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68012850)
+#define OMAP34XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68012858)
+#define OMAP34XX_VA_ADDR_MATCH2         OMAP2_L3_IO_ADDRESS(0x68012880)
+#define OMAP34XX_VA_SMS_RG_ATT0         OMAP2_L3_IO_ADDRESS(0x6C000048)
+
+#define GP_DEVICE               0x300
+
+#define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
+
+static unsigned long omap_sram_start;
+static unsigned long omap_sram_skip;
+static unsigned long omap_sram_size;
+
+/*
+ * Depending on the target RAMFS firewall setup, the public usable amount of
+ * SRAM varies.  The default accessible size for all device types is 2k. A GP
+ * device allows ARM11 but not other initiators for full size. This
+ * functionality seems ok until some nice security API happens.
+ */
+static int is_sram_locked(void)
+{
+        if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
+                /* RAMFW: R/W access to all initiators for all qualifier sets */
+                if (cpu_is_omap242x()) {
+                        __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
+                        __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */
+                        __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
+                }
+                if (cpu_is_omap34xx()) {
+                        __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
+                        __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */
+                        __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
+                        __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
+                        __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
+                }
+                return 0;
+        } else
+                return 1; /* assume locked with no PPA or security driver */
+}
+
+/*
+ * The amount of SRAM depends on the core type.
+ * Note that we cannot try to test for SRAM here because writes
+ * to secure SRAM will hang the system. Also the SRAM is not
+ * yet mapped at this point.
+ */
+static void __init omap_detect_sram(void)
+{
+        omap_sram_skip = SRAM_BOOTLOADER_SZ;
+        if (is_sram_locked()) {
+                if (cpu_is_omap34xx()) {
+                        omap_sram_start = OMAP3_SRAM_PUB_PA;
+                        if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
+                            (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
+                                omap_sram_size = 0x7000; /* 28K */
+                                omap_sram_skip += SZ_16K;
+                        } else {
+                                omap_sram_size = 0x8000; /* 32K */
+                        }
+                } else if (cpu_is_omap44xx()) {
+                        omap_sram_start = OMAP4_SRAM_PUB_PA;
+                        omap_sram_size = 0xa000; /* 40K */
+                } else if (soc_is_omap54xx()) {
+                        omap_sram_start = OMAP5_SRAM_PA;
+                        omap_sram_size = SZ_128K; /* 128KB */
+                } else {
+                        omap_sram_start = OMAP2_SRAM_PUB_PA;
+                        omap_sram_size = 0x800; /* 2K */
+                }
+        } else {
+                if (soc_is_am33xx()) {
+                        omap_sram_start = AM33XX_SRAM_PA;
+                        omap_sram_size = 0x10000; /* 64K */
+                } else if (cpu_is_omap34xx()) {
+                        omap_sram_start = OMAP3_SRAM_PA;
+                        omap_sram_size = 0x10000; /* 64K */
+                } else if (cpu_is_omap44xx()) {
+                        omap_sram_start = OMAP4_SRAM_PA;
+                        omap_sram_size = 0xe000; /* 56K */
+                } else if (soc_is_omap54xx()) {
+                        omap_sram_start = OMAP5_SRAM_PA;
+                        omap_sram_size = SZ_128K; /* 128KB */
+                } else {
+                        omap_sram_start = OMAP2_SRAM_PA;
+                        if (cpu_is_omap242x())
+                                omap_sram_size = 0xa0000; /* 640K */
+                        else if (cpu_is_omap243x())
+                                omap_sram_size = 0x10000; /* 64K */
+                }
+        }
+}
+
+/*
+ * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
+ */
+static void __init omap2_map_sram(void)
+{
+        int cached = 1;
+
+#ifdef CONFIG_OMAP4_ERRATA_I688
+        if (cpu_is_omap44xx()) {
+                omap_sram_start += PAGE_SIZE;
+                omap_sram_size -= SZ_16K;
+        }
+#endif
+        if (cpu_is_omap34xx()) {
+                /*
+                 * SRAM must be marked as non-cached on OMAP3 since the
+                 * CORE DPLL M2 divider change code (in SRAM) runs with the
+                 * SDRAM controller disabled, and if it is marked cached,
+                 * the ARM may attempt to write cache lines back to SDRAM
+                 * which will cause the system to hang.
+                 */
+                cached = 0;
+        }
+
+        omap_map_sram(omap_sram_start, omap_sram_size,
+                        omap_sram_skip, cached);
+}
+
+static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                              u32 base_cs, u32 force_unlock);
+
+void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                   u32 base_cs, u32 force_unlock)
+{
+        BUG_ON(!_omap2_sram_ddr_init);
+        _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
+                             base_cs, force_unlock);
+}
+
+static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
+                                          u32 mem_type);
+
+void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
+{
+        BUG_ON(!_omap2_sram_reprogram_sdrc);
+        _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
+}
+
+static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
+
+u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
+{
+        BUG_ON(!_omap2_set_prcm);
+        return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
+}
+
+#ifdef CONFIG_SOC_OMAP2420
+static int __init omap242x_sram_init(void)
+{
+        _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
+                                        omap242x_sram_ddr_init_sz);
+
+        _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
+                                            omap242x_sram_reprogram_sdrc_sz);
+
+        _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
+                                         omap242x_sram_set_prcm_sz);
+
+        return 0;
+}
+#else
+static inline int omap242x_sram_init(void)
+{
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_SOC_OMAP2430
+static int __init omap243x_sram_init(void)
+{
+        _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
+                                        omap243x_sram_ddr_init_sz);
+
+        _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
+                                            omap243x_sram_reprogram_sdrc_sz);
+
+        _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
+                                         omap243x_sram_set_prcm_sz);
+
+        return 0;
+}
+#else
+static inline int omap243x_sram_init(void)
+{
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+
+static u32 (*_omap3_sram_configure_core_dpll)(
+                        u32 m2, u32 unlock_dll, u32 f, u32 inc,
+                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
+
+u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
+                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
+{
+        BUG_ON(!_omap3_sram_configure_core_dpll);
+        return _omap3_sram_configure_core_dpll(
+                        m2, unlock_dll, f, inc,
+                        sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
+                        sdrc_actim_ctrl_b_0, sdrc_mr_0,
+                        sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
+                        sdrc_actim_ctrl_b_1, sdrc_mr_1);
+}
+
+void omap3_sram_restore_context(void)
+{
+        omap_sram_reset();
+
+        _omap3_sram_configure_core_dpll =
+                omap_sram_push(omap3_sram_configure_core_dpll,
+                               omap3_sram_configure_core_dpll_sz);
+        omap_push_sram_idle();
+}
+
+static inline int omap34xx_sram_init(void)
+{
+        omap3_sram_restore_context();
+        return 0;
+}
+#else
+static inline int omap34xx_sram_init(void)
+{
+        return 0;
+}
+#endif /* CONFIG_ARCH_OMAP3 */
+
+static inline int am33xx_sram_init(void)
+{
+        return 0;
+}
+
+int __init omap_sram_init(void)
+{
+        omap_detect_sram();
+        omap2_map_sram();
+
+        if (cpu_is_omap242x())
+                omap242x_sram_init();
+        else if (cpu_is_omap2430())
+                omap243x_sram_init();
+        else if (soc_is_am33xx())
+                am33xx_sram_init();
+        else if (cpu_is_omap34xx())
+                omap34xx_sram_init();
+
+        return 0;
+}
diff --git a/arch/arm/plat-omap/sram.h b/arch/arm/mach-omap2/sram.h
index cefda2e09869..ca7277c2a9ee 100644
--- a/arch/arm/plat-omap/sram.h
+++ b/arch/arm/mach-omap2/sram.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/plat-omap/include/mach/sram.h
- *
  * Interface for functions that need to be run in internal SRAM
  *
  * This program is free software; you can redistribute it and/or modify
@@ -8,26 +6,8 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef __ARCH_ARM_OMAP_SRAM_H
-#define __ARCH_ARM_OMAP_SRAM_H
-
 #ifndef __ASSEMBLY__
-#include <asm/fncpy.h>
-
-int __init omap_sram_init(void);
-
-extern void *omap_sram_push_address(unsigned long size);
-
-/* Macro to push a function to the internal SRAM, using the fncpy API */
-#define omap_sram_push(funcp, size) ({                          \
-        typeof(&(funcp)) _res = NULL;                           \
-        void *_sram_address = omap_sram_push_address(size);     \
-        if (_sram_address)                                      \
-                _res = fncpy(_sram_address, &(funcp), size);    \
-        _res;                                                   \
-})
-
-extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
+#include <plat/sram.h>
 
 extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
                                 u32 base_cs, u32 force_unlock);
@@ -44,9 +24,6 @@ extern u32 omap3_configure_core_dpll(
 extern void omap3_sram_restore_context(void);
 
 /* Do not use these */
-extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
-extern unsigned long omap1_sram_reprogram_clock_sz;
-
 extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
 extern unsigned long omap24xx_sram_reprogram_clock_sz;
 
@@ -104,4 +81,3 @@ static inline void omap_push_sram_idle(void) {}
 #define OMAP4_SRAM_PA           0x40300000
 #endif
 #define AM33XX_SRAM_PA          0x40300000
-#endif
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 565e5755c9bc..c5bc2cb4d8d3 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -45,6 +45,7 @@
 #include <asm/arch_timer.h>
 #include "omap_hwmod.h"
 #include "omap_device.h"
+#include <plat/counter-32k.h>
 #include <plat/dmtimer.h>
 #include "omap-pm.h"
 
@@ -559,6 +560,8 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
         if (timer_dev_attr)
                 pdata->timer_capability = timer_dev_attr->timer_capability;
 
+        pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
+
         pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
                                  NULL, 0, 0);
 
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 4bd0ace20e98..8d885848600a 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common support
-obj-y := common.o sram.o dma.o fb.o counter_32k.o
+obj-y := sram.o dma.o fb.o counter_32k.o
 obj-m :=
 obj-n :=
 obj-  :=
@@ -19,4 +19,3 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y)
 # OMAP mailbox framework
 obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
 
-obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
deleted file mode 100644
index a1555e028123..000000000000
--- a/arch/arm/plat-omap/common.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * linux/arch/arm/plat-omap/common.c
- *
- * Code common to all OMAP machines.
- * The file is created by Tony Lindgren <tony@atomide.com>
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/dma-mapping.h>
-
-#include "common.h"
-#include <plat-omap/dma-omap.h>
-
-void __init omap_init_consistent_dma_size(void)
-{
-#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
-        init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
-#endif
-}
diff --git a/arch/arm/plat-omap/common.h b/arch/arm/plat-omap/common.h
deleted file mode 100644
index 8ae0542a37d9..000000000000
--- a/arch/arm/plat-omap/common.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Header for shared OMAP code in plat-omap.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the  GNU General Public License along
- * with this program; if not, write  to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H
-#define __ARCH_ARM_MACH_OMAP_COMMON_H
-
-extern int __init omap_init_clocksource_32k(void __iomem *vbase);
-
-extern void __init omap_check_revision(void);
-
-extern void omap_reserve(void);
-struct omap_hwmod;
-extern int omap_dss_reset(struct omap_hwmod *);
-
-#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 66bf3f9324fe..f3771cdb9838 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -22,8 +22,6 @@
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
 
-#include "common.h"
-
 /* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
 #define OMAP2_32KSYNCNT_REV_OFF         0x0
 #define OMAP2_32KSYNCNT_REV_SCHEME      (0x3 << 30)
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c
index 5a4678edd65a..a609e2161817 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/plat-omap/debug-devices.c
@@ -15,8 +15,7 @@
 #include <linux/io.h>
 #include <linux/smc91x.h>
 
-#include <mach/hardware.h>
-#include "../mach-omap2/debug-devices.h"
+#include <plat/debug-devices.h>
 
 /* Many OMAP development platforms reuse the same "debug board"; these
  * platforms include H2, H3, H4, and Perseus2.
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index feca128bc8ed..aa7ebc6bcd65 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -17,16 +17,33 @@
 #include <linux/platform_data/gpio-omap.h>
 #include <linux/slab.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 
-#include "fpga.h"
-
 /* Many OMAP development platforms reuse the same "debug board"; these
  * platforms include H2, H3, H4, and Perseus2.  There are 16 LEDs on the
  * debug board (all green), accessed through FPGA registers.
  */
 
+/* NOTE:  most boards don't have a static mapping for the FPGA ... */
+struct h2p2_dbg_fpga {
+        /* offset 0x00 */
+        u16             smc91x[8];
+        /* offset 0x10 */
+        u16             fpga_rev;
+        u16             board_rev;
+        u16             gpio_outputs;
+        u16             leds;
+        /* offset 0x18 */
+        u16             misc_inputs;
+        u16             lan_status;
+        u16             lan_reset;
+        u16             reserved0;
+        /* offset 0x20 */
+        u16             ps2_data;
+        u16             ps2_ctrl;
+        /* plus also 4 rs232 ports ... */
+};
+
 static struct h2p2_dbg_fpga __iomem *fpga;
 
 static u16 fpga_led_state;
@@ -94,7 +111,7 @@ static int fpga_probe(struct platform_device *pdev)
         if (!iomem)
                 return -ENODEV;
 
-        fpga = ioremap(iomem->start, H2P2_DBG_FPGA_SIZE);
+        fpga = ioremap(iomem->start, resource_size(iomem));
         __raw_writew(0xff, &fpga->leds);
 
         for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) {
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 49803cc18787..c288b76f8e6c 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -38,9 +38,6 @@
 
 #include <plat-omap/dma-omap.h>
 
-#include "../mach-omap1/soc.h"
-#include "../mach-omap2/soc.h"
-
 /*
  * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA
  * channels that an instance of the SDMA IP block can support.  Used
@@ -182,7 +179,7 @@ void omap_set_dma_priority(int lch, int dst_port, int priority)
         unsigned long reg;
         u32 l;
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 switch (dst_port) {
                 case OMAP_DMA_PORT_OCP_T1:      /* FFFECC00 */
                         reg = OMAP_TC_OCPT1_PRIOR;
@@ -234,7 +231,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
         l |= data_type;
         p->dma_write(l, CSDP, lch);
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 u16 ccr;
 
                 ccr = p->dma_read(CCR, lch);
@@ -250,7 +247,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
                 p->dma_write(ccr, CCR2, lch);
         }
 
-        if (cpu_class_is_omap2() && dma_trigger) {
+        if (dma_omap2plus() && dma_trigger) {
                 u32 val;
 
                 val = p->dma_read(CCR, lch);
@@ -290,7 +287,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
 {
         BUG_ON(omap_dma_in_1510_mode());
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 u16 w;
 
                 w = p->dma_read(CCR2, lch);
@@ -320,7 +317,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
                 p->dma_write(w, LCH_CTRL, lch);
         }
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 u32 val;
 
                 val = p->dma_read(CCR, lch);
@@ -348,7 +345,7 @@ EXPORT_SYMBOL(omap_set_dma_color_mode);
 
 void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode)
 {
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 u32 csdp;
 
                 csdp = p->dma_read(CSDP, lch);
@@ -361,7 +358,7 @@ EXPORT_SYMBOL(omap_set_dma_write_mode);
 
 void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode)
 {
-        if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
+        if (dma_omap1() && !dma_omap15xx()) {
                 u32 l;
 
                 l = p->dma_read(LCH_CTRL, lch);
@@ -379,7 +376,7 @@ void omap_set_dma_src_params(int lch, int src_port, int src_amode,
 {
         u32 l;
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 u16 w;
 
                 w = p->dma_read(CSDP, lch);
@@ -421,7 +418,7 @@ EXPORT_SYMBOL(omap_set_dma_params);
 
 void omap_set_dma_src_index(int lch, int eidx, int fidx)
 {
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 return;
 
         p->dma_write(eidx, CSEI, lch);
@@ -453,13 +450,13 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
         case OMAP_DMA_DATA_BURST_DIS:
                 break;
         case OMAP_DMA_DATA_BURST_4:
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         burst = 0x1;
                 else
                         burst = 0x2;
                 break;
         case OMAP_DMA_DATA_BURST_8:
-                if (cpu_class_is_omap2()) {
+                if (dma_omap2plus()) {
                         burst = 0x2;
                         break;
                 }
@@ -469,7 +466,7 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
                  * fall through
                  */
         case OMAP_DMA_DATA_BURST_16:
-                if (cpu_class_is_omap2()) {
+                if (dma_omap2plus()) {
                         burst = 0x3;
                         break;
                 }
@@ -493,7 +490,7 @@ void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
 {
         u32 l;
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 l = p->dma_read(CSDP, lch);
                 l &= ~(0x1f << 9);
                 l |= dest_port << 9;
@@ -514,7 +511,7 @@ EXPORT_SYMBOL(omap_set_dma_dest_params);
 
 void omap_set_dma_dest_index(int lch, int eidx, int fidx)
 {
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 return;
 
         p->dma_write(eidx, CDEI, lch);
@@ -546,19 +543,19 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
         case OMAP_DMA_DATA_BURST_DIS:
                 break;
         case OMAP_DMA_DATA_BURST_4:
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         burst = 0x1;
                 else
                         burst = 0x2;
                 break;
         case OMAP_DMA_DATA_BURST_8:
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         burst = 0x2;
                 else
                         burst = 0x3;
                 break;
         case OMAP_DMA_DATA_BURST_16:
-                if (cpu_class_is_omap2()) {
+                if (dma_omap2plus()) {
                         burst = 0x3;
                         break;
                 }
@@ -579,7 +576,7 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
 static inline void omap_enable_channel_irq(int lch)
 {
         /* Clear CSR */
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 p->dma_read(CSR, lch);
         else
                 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
@@ -593,7 +590,7 @@ static inline void omap_disable_channel_irq(int lch)
         /* disable channel interrupts */
         p->dma_write(0, CICR, lch);
         /* Clear CSR */
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 p->dma_read(CSR, lch);
         else
                 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
@@ -617,7 +614,7 @@ static inline void enable_lnk(int lch)
 
         l = p->dma_read(CLNK_CTRL, lch);
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 l &= ~(1 << 14);
 
         /* Set the ENABLE_LNK bits */
@@ -625,7 +622,7 @@ static inline void enable_lnk(int lch)
                 l = dma_chan[lch].next_lch | (1 << 15);
 
 #ifndef CONFIG_ARCH_OMAP1
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 if (dma_chan[lch].next_linked_ch != -1)
                         l = dma_chan[lch].next_linked_ch | (1 << 15);
 #endif
@@ -642,12 +639,12 @@ static inline void disable_lnk(int lch)
         /* Disable interrupts */
         omap_disable_channel_irq(lch);
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 /* Set the STOP_LNK bit */
                 l |= 1 << 14;
         }
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 /* Clear the ENABLE_LNK bit */
                 l &= ~(1 << 15);
         }
@@ -661,7 +658,7 @@ static inline void omap2_enable_irq_lch(int lch)
         u32 val;
         unsigned long flags;
 
-        if (!cpu_class_is_omap2())
+        if (dma_omap1())
                 return;
 
         spin_lock_irqsave(&dma_chan_lock, flags);
@@ -679,7 +676,7 @@ static inline void omap2_disable_irq_lch(int lch)
         u32 val;
         unsigned long flags;
 
-        if (!cpu_class_is_omap2())
+        if (dma_omap1())
                 return;
 
         spin_lock_irqsave(&dma_chan_lock, flags);
@@ -718,7 +715,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
         if (p->clear_lch_regs)
                 p->clear_lch_regs(free_ch);
 
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 omap_clear_dma(free_ch);
 
         spin_unlock_irqrestore(&dma_chan_lock, flags);
@@ -729,7 +726,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
         chan->flags = 0;
 
 #ifndef CONFIG_ARCH_OMAP1
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 chan->chain_id = -1;
                 chan->next_linked_ch = -1;
         }
@@ -737,13 +734,13 @@ int omap_request_dma(int dev_id, const char *dev_name,
 
         chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ;
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ;
-        else if (cpu_class_is_omap2())
+        else if (dma_omap2plus())
                 chan->enabled_irqs |= OMAP2_DMA_MISALIGNED_ERR_IRQ |
                         OMAP2_DMA_TRANS_ERR_IRQ;
 
-        if (cpu_is_omap16xx()) {
+        if (dma_omap16xx()) {
                 /* If the sync device is set, configure it dynamically. */
                 if (dev_id != 0) {
                         set_gdma_dev(free_ch + 1, dev_id);
@@ -754,11 +751,11 @@ int omap_request_dma(int dev_id, const char *dev_name,
                  * id.
                  */
                 p->dma_write(dev_id | (1 << 10), CCR, free_ch);
-        } else if (cpu_is_omap7xx() || cpu_is_omap15xx()) {
+        } else if (dma_omap1()) {
                 p->dma_write(dev_id, CCR, free_ch);
         }
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 omap_enable_channel_irq(free_ch);
                 omap2_enable_irq_lch(free_ch);
         }
@@ -780,7 +777,7 @@ void omap_free_dma(int lch)
         }
 
         /* Disable interrupt for logical channel */
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 omap2_disable_irq_lch(lch);
 
         /* Disable all DMA interrupts for the channel. */
@@ -790,7 +787,7 @@ void omap_free_dma(int lch)
         p->dma_write(0, CCR, lch);
 
         /* Clear registers */
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 omap_clear_dma(lch);
 
         spin_lock_irqsave(&dma_chan_lock, flags);
@@ -816,7 +813,7 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
 {
         u32 reg;
 
-        if (!cpu_class_is_omap2()) {
+        if (dma_omap1()) {
                 printk(KERN_ERR "FIXME: no %s on 15xx/16xx\n", __func__);
                 return;
         }
@@ -855,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
         }
         l = p->dma_read(CCR, lch);
         l &= ~((1 << 6) | (1 << 26));
-        if (cpu_class_is_omap2() && !cpu_is_omap242x())
+        if (d->dev_caps & IS_RW_PRIORITY)
                 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
         else
                 l |= ((read_prio & 0x1) << 6);
@@ -888,7 +885,7 @@ void omap_start_dma(int lch)
          * The CPC/CDAC register needs to be initialized to zero
          * before starting dma transfer.
          */
-        if (cpu_is_omap15xx())
+        if (dma_omap15xx())
                 p->dma_write(0, CPC, lch);
         else
                 p->dma_write(0, CDAC, lch);
@@ -1051,7 +1048,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
 {
         dma_addr_t offset = 0;
 
-        if (cpu_is_omap15xx())
+        if (dma_omap15xx())
                 offset = p->dma_read(CPC, lch);
         else
                 offset = p->dma_read(CSAC, lch);
@@ -1059,7 +1056,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
         if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0)
                 offset = p->dma_read(CSAC, lch);
 
-        if (!cpu_is_omap15xx()) {
+        if (!dma_omap15xx()) {
                 /*
                  * CDAC == 0 indicates that the DMA transfer on the channel has
                  * not been started (no data has been transferred so far).
@@ -1071,7 +1068,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
                         offset = p->dma_read(CSSA, lch);
         }
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
 
         return offset;
@@ -1090,7 +1087,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
 {
         dma_addr_t offset = 0;
 
-        if (cpu_is_omap15xx())
+        if (dma_omap15xx())
                 offset = p->dma_read(CPC, lch);
         else
                 offset = p->dma_read(CDAC, lch);
@@ -1099,7 +1096,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
          * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
          * read before the DMA controller finished disabling the channel.
          */
-        if (!cpu_is_omap15xx() && offset == 0) {
+        if (!dma_omap15xx() && offset == 0) {
                 offset = p->dma_read(CDAC, lch);
                 /*
                  * CDAC == 0 indicates that the DMA transfer on the channel has
@@ -1110,7 +1107,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
                         offset = p->dma_read(CDSA, lch);
         }
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
 
         return offset;
@@ -1127,7 +1124,7 @@ int omap_dma_running(void)
 {
         int lch;
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 if (omap_lcd_dma_running())
                         return 1;
 
@@ -2030,7 +2027,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
         dma_chan                = d->chan;
         enable_1510_mode        = d->dev_caps & ENABLE_1510_MODE;
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 dma_linked_lch = kzalloc(sizeof(struct dma_link_info) *
                                                 dma_lch_count, GFP_KERNEL);
                 if (!dma_linked_lch) {
@@ -2042,7 +2039,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
         spin_lock_init(&dma_chan_lock);
         for (ch = 0; ch < dma_chan_count; ch++) {
                 omap_clear_dma(ch);
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         omap2_disable_irq_lch(ch);
 
                 dma_chan[ch].dev_id = -1;
@@ -2051,7 +2048,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                 if (ch >= 6 && enable_1510_mode)
                         continue;
 
-                if (cpu_class_is_omap1()) {
+                if (dma_omap1()) {
                         /*
                          * request_irq() doesn't like dev_id (ie. ch) being
                          * zero, so we have to kludge around this.
@@ -2076,11 +2073,11 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                 }
         }
 
-        if (cpu_class_is_omap2() && !cpu_is_omap242x())
+        if (d->dev_caps & IS_RW_PRIORITY)
                 omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
                                 DMA_DEFAULT_FIFO_DEPTH, 0);
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 strcpy(irq_name, "0");
                 dma_irq = platform_get_irq_byname(pdev, irq_name);
                 if (dma_irq < 0) {
@@ -2095,9 +2092,8 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                 }
         }
 
-        /* reserve dma channels 0 and 1 in high security devices */
-        if (cpu_is_omap34xx() &&
-                (omap_type() != OMAP2_DEVICE_TYPE_GP)) {
+        /* reserve dma channels 0 and 1 in high security devices on 34xx */
+        if (d->dev_caps & HS_CHANNELS_RESERVED) {
                 pr_info("Reserving DMA channels 0 and 1 for HS ROM code\n");
                 dma_chan[0].dev_id = 0;
                 dma_chan[1].dev_id = 1;
@@ -2124,7 +2120,7 @@ static int __devexit omap_system_dma_remove(struct platform_device *pdev)
 {
         int dma_irq;
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 char irq_name[4];
                 strcpy(irq_name, "0");
                 dma_irq = platform_get_irq_byname(pdev, irq_name);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 4a0b30a4ebda..82231a75abd6 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -43,10 +43,6 @@
 
 #include <plat/dmtimer.h>
 
-#include <mach/hardware.h>
-
-#include "../mach-omap2/omap-pm.h"
-
 static u32 omap_reserved_systimers;
 static LIST_HEAD(omap_timer_list);
 static DEFINE_SPINLOCK(dm_timer_lock);
@@ -272,7 +268,7 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
 EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
 
 #if defined(CONFIG_ARCH_OMAP1)
-
+#include <mach/hardware.h>
 /**
  * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
  * @inputmask: current value of idlect mask
@@ -349,7 +345,8 @@ int omap_dm_timer_start(struct omap_dm_timer *timer)
         omap_dm_timer_enable(timer);
 
         if (!(timer->capability & OMAP_TIMER_ALWON)) {
-                if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
+                if (timer->get_context_loss_count &&
+                        timer->get_context_loss_count(&timer->pdev->dev) !=
                                 timer->ctx_loss_count)
                         omap_timer_restore_context(timer);
         }
@@ -378,9 +375,11 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
 
         __omap_dm_timer_stop(timer, timer->posted, rate);
 
-        if (!(timer->capability & OMAP_TIMER_ALWON))
-                timer->ctx_loss_count =
-                        omap_pm_get_dev_context_loss_count(&timer->pdev->dev);
+        if (!(timer->capability & OMAP_TIMER_ALWON)) {
+                if (timer->get_context_loss_count)
+                        timer->ctx_loss_count =
+                                timer->get_context_loss_count(&timer->pdev->dev);
+        }
 
         /*
          * Since the register values are computed and written within
@@ -496,7 +495,8 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
         omap_dm_timer_enable(timer);
 
         if (!(timer->capability & OMAP_TIMER_ALWON)) {
-                if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
+                if (timer->get_context_loss_count &&
+                        timer->get_context_loss_count(&timer->pdev->dev) !=
                                 timer->ctx_loss_count)
                         omap_timer_restore_context(timer);
         }
@@ -730,6 +730,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
         timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
         timer->pdev = pdev;
         timer->capability = pdata->timer_capability;
+        timer->get_context_loss_count = pdata->get_context_loss_count;
 
         /* Skip pm_runtime_enable for OMAP1 */
         if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index f868caeedfd6..3a77b30f53d4 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -30,7 +30,6 @@
 #include <linux/io.h>
 #include <linux/omapfb.h>
 
-#include <mach/hardware.h>
 #include <asm/mach/map.h>
 
 #include <plat/cpu.h>
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index be6deb7c12ec..f9df624d108c 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -31,34 +31,13 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 
-#include <mach/irqs.h>
-
-#include "../mach-omap1/soc.h"
-#include "../mach-omap2/soc.h"
-
-#include "i2c.h"
+#include <plat/i2c.h>
 
 #define OMAP_I2C_MAX_CONTROLLERS 4
 static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
 
 #define OMAP_I2C_CMDLINE_SETUP  (BIT(31))
 
-static int __init omap_i2c_nr_ports(void)
-{
-        int ports = 0;
-
-        if (cpu_class_is_omap1())
-                ports = 1;
-        else if (cpu_is_omap24xx())
-                ports = 2;
-        else if (cpu_is_omap34xx())
-                ports = 3;
-        else if (cpu_is_omap44xx())
-                ports = 4;
-
-        return ports;
-}
-
 /**
  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
  * @str: String of options
@@ -72,12 +51,11 @@ static int __init omap_i2c_nr_ports(void)
  */
 static int __init omap_i2c_bus_setup(char *str)
 {
-        int ports;
         int ints[3];
 
-        ports = omap_i2c_nr_ports();
         get_options(str, 3, ints);
-        if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
+        if (ints[0] < 2 || ints[1] < 1 ||
+                        ints[1] > OMAP_I2C_MAX_CONTROLLERS)
                 return 0;
         i2c_pdata[ints[1] - 1].clkrate = ints[2];
         i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
@@ -122,7 +100,7 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 {
         int err;
 
-        BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
+        BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS);
 
         if (info) {
                 err = i2c_register_board_info(bus_id, info, len);
diff --git a/arch/arm/plat-omap/include/plat-omap/dma-omap.h b/arch/arm/plat-omap/include/plat-omap/dma-omap.h
index 222be7e934e5..6f506ba9e453 100644
--- a/arch/arm/plat-omap/include/plat-omap/dma-omap.h
+++ b/arch/arm/plat-omap/include/plat-omap/dma-omap.h
@@ -130,10 +130,12 @@
 #define SRC_PORT                        BIT(0x7)
 #define DST_PORT                        BIT(0x8)
 #define SRC_INDEX                       BIT(0x9)
-#define DST_INDEX                       BIT(0xA)
-#define IS_BURST_ONLY4                  BIT(0xB)
-#define CLEAR_CSR_ON_READ               BIT(0xC)
-#define IS_WORD_16                      BIT(0xD)
+#define DST_INDEX                       BIT(0xa)
+#define IS_BURST_ONLY4                  BIT(0xb)
+#define CLEAR_CSR_ON_READ               BIT(0xc)
+#define IS_WORD_16                      BIT(0xd)
+#define ENABLE_16XX_MODE                BIT(0xe)
+#define HS_CHANNELS_RESERVED            BIT(0xf)
 
 /* Defines for DMA Capabilities */
 #define DMA_HAS_TRANSPARENT_CAPS        (0x1 << 18)
@@ -270,7 +272,15 @@ struct omap_system_dma_plat_info {
         u32 (*dma_read)(int reg, int lch);
 };
 
-extern void __init omap_init_consistent_dma_size(void);
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#define dma_omap2plus() 1
+#else
+#define dma_omap2plus() 0
+#endif
+#define dma_omap1()     (!dma_omap2plus())
+#define dma_omap15xx()  ((dma_omap1() && (d->dev_caps & ENABLE_1510_MODE)))
+#define dma_omap16xx()  ((dma_omap1() && (d->dev_caps & ENABLE_16XX_MODE)))
+
 extern void omap_set_dma_priority(int lch, int dst_port, int priority);
 extern int omap_request_dma(int dev_id, const char *dev_name,
                         void (*callback)(int lch, u16 ch_status, void *data),
diff --git a/arch/arm/plat-omap/include/plat/counter-32k.h b/arch/arm/plat-omap/include/plat/counter-32k.h
new file mode 100644
index 000000000000..da000d482ff2
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/counter-32k.h
@@ -0,0 +1 @@
+int omap_init_clocksource_32k(void __iomem *vbase);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index ba542ec8d513..b4516aba67ed 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -29,7 +29,7 @@
 #define __ASM_ARCH_OMAP_CPU_H
 
 #ifdef CONFIG_ARCH_OMAP1
-#include "../../mach-omap1/soc.h"
+#include <mach/soc.h>
 #endif
 
 #ifdef CONFIG_ARCH_OMAP2PLUS
diff --git a/arch/arm/mach-omap2/debug-devices.h b/arch/arm/plat-omap/include/plat/debug-devices.h
index a4edbd2f7484..8fc4287222dd 100644
--- a/arch/arm/mach-omap2/debug-devices.h
+++ b/arch/arm/plat-omap/include/plat/debug-devices.h
@@ -1,9 +1,2 @@
-#ifndef _OMAP_DEBUG_DEVICES_H
-#define _OMAP_DEBUG_DEVICES_H
-
-#include <linux/types.h>
-
 /* for TI reference platforms sharing the same debug card */
 extern int debug_card_init(u32 addr, unsigned gpio);
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 85868e98c11c..3f5b9cfd9c0b 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -94,6 +94,7 @@ struct dmtimer_platform_data {
         /* set_timer_src - Only used for OMAP1 devices */
         int (*set_timer_src)(struct platform_device *pdev, int source);
         u32 timer_capability;
+        int (*get_context_loss_count)(struct device *);
 };
 
 int omap_dm_timer_reserve_systimer(int id);
@@ -263,6 +264,7 @@ struct omap_dm_timer {
         unsigned reserved:1;
         unsigned posted:1;
         struct timer_regs context;
+        int (*get_context_loss_count)(struct device *);
         int ctx_loss_count;
         int revision;
         u32 capability;
diff --git a/arch/arm/plat-omap/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h
index 7a9028cb5a75..7a9028cb5a75 100644
--- a/arch/arm/plat-omap/i2c.h
+++ b/arch/arm/plat-omap/include/plat/i2c.h
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
new file mode 100644
index 000000000000..ba4525059a99
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -0,0 +1,16 @@
+int omap_sram_init(void);
+
+void omap_map_sram(unsigned long start, unsigned long size,
+                        unsigned long skip, int cached);
+void omap_sram_reset(void);
+
+extern void *omap_sram_push_address(unsigned long size);
+
+/* Macro to push a function to the internal SRAM, using the fncpy API */
+#define omap_sram_push(funcp, size) ({                          \
+        typeof(&(funcp)) _res = NULL;                           \
+        void *_sram_address = omap_sram_push_address(size);     \
+        if (_sram_address)                                      \
+                _res = fncpy(_sram_address, &(funcp), size);    \
+        _res;                                                   \
+})
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 70dcc225157f..743fc2836f7a 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -20,198 +20,20 @@
 #include <linux/init.h>
 #include <linux/io.h>
 
+#include <asm/fncpy.h>
 #include <asm/tlb.h>
 #include <asm/cacheflush.h>
 
 #include <asm/mach/map.h>
 
-#include "../mach-omap1/soc.h"
-#include "../mach-omap2/soc.h"
-
-#include "sram.h"
-
-/* XXX These "sideways" includes will disappear when sram.c becomes a driver */
-#include "../mach-omap2/iomap.h"
-#include "../mach-omap2/prm2xxx_3xxx.h"
-#include "../mach-omap2/sdrc.h"
-
-#define OMAP1_SRAM_PA           0x20000000
-#define OMAP2_SRAM_PUB_PA       (OMAP2_SRAM_PA + 0xf800)
-#define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PUB_PA       OMAP4_SRAM_PA
-#else
-#define OMAP4_SRAM_PUB_PA       (OMAP4_SRAM_PA + 0x4000)
-#endif
-#define OMAP5_SRAM_PA           0x40300000
-
-#if defined(CONFIG_ARCH_OMAP2PLUS)
-#define SRAM_BOOTLOADER_SZ      0x00
-#else
-#define SRAM_BOOTLOADER_SZ      0x80
-#endif
-
-#define OMAP24XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68005048)
-#define OMAP24XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68005050)
-#define OMAP24XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68005058)
-
-#define OMAP34XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68012848)
-#define OMAP34XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68012850)
-#define OMAP34XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68012858)
-#define OMAP34XX_VA_ADDR_MATCH2         OMAP2_L3_IO_ADDRESS(0x68012880)
-#define OMAP34XX_VA_SMS_RG_ATT0         OMAP2_L3_IO_ADDRESS(0x6C000048)
-
-#define GP_DEVICE               0x300
-
 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
 
-static unsigned long omap_sram_start;
 static void __iomem *omap_sram_base;
 static unsigned long omap_sram_skip;
 static unsigned long omap_sram_size;
 static void __iomem *omap_sram_ceil;
 
 /*
- * Depending on the target RAMFS firewall setup, the public usable amount of
- * SRAM varies.  The default accessible size for all device types is 2k. A GP
- * device allows ARM11 but not other initiators for full size. This
- * functionality seems ok until some nice security API happens.
- */
-static int is_sram_locked(void)
-{
-        if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
-                /* RAMFW: R/W access to all initiators for all qualifier sets */
-                if (cpu_is_omap242x()) {
-                        __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
-                        __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */
-                        __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
-                }
-                if (cpu_is_omap34xx()) {
-                        __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
-                        __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */
-                        __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
-                        __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
-                        __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
-                }
-                return 0;
-        } else
-                return 1; /* assume locked with no PPA or security driver */
-}
-
-/*
- * The amount of SRAM depends on the core type.
- * Note that we cannot try to test for SRAM here because writes
- * to secure SRAM will hang the system. Also the SRAM is not
- * yet mapped at this point.
- */
-static void __init omap_detect_sram(void)
-{
-        omap_sram_skip = SRAM_BOOTLOADER_SZ;
-        if (cpu_class_is_omap2()) {
-                if (is_sram_locked()) {
-                        if (cpu_is_omap34xx()) {
-                                omap_sram_start = OMAP3_SRAM_PUB_PA;
-                                if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
-                                    (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
-                                        omap_sram_size = 0x7000; /* 28K */
-                                        omap_sram_skip += SZ_16K;
-                                } else {
-                                        omap_sram_size = 0x8000; /* 32K */
-                                }
-                        } else if (cpu_is_omap44xx()) {
-                                omap_sram_start = OMAP4_SRAM_PUB_PA;
-                                omap_sram_size = 0xa000; /* 40K */
-                        } else if (soc_is_omap54xx()) {
-                                omap_sram_start = OMAP5_SRAM_PA;
-                                omap_sram_size = SZ_128K; /* 128KB */
-                        } else {
-                                omap_sram_start = OMAP2_SRAM_PUB_PA;
-                                omap_sram_size = 0x800; /* 2K */
-                        }
-                } else {
-                        if (soc_is_am33xx()) {
-                                omap_sram_start = AM33XX_SRAM_PA;
-                                omap_sram_size = 0x10000; /* 64K */
-                        } else if (cpu_is_omap34xx()) {
-                                omap_sram_start = OMAP3_SRAM_PA;
-                                omap_sram_size = 0x10000; /* 64K */
-                        } else if (cpu_is_omap44xx()) {
-                                omap_sram_start = OMAP4_SRAM_PA;
-                                omap_sram_size = 0xe000; /* 56K */
-                        } else if (soc_is_omap54xx()) {
-                                omap_sram_start = OMAP5_SRAM_PA;
-                                omap_sram_size = SZ_128K; /* 128KB */
-                        } else {
-                                omap_sram_start = OMAP2_SRAM_PA;
-                                if (cpu_is_omap242x())
-                                        omap_sram_size = 0xa0000; /* 640K */
-                                else if (cpu_is_omap243x())
-                                        omap_sram_size = 0x10000; /* 64K */
-                        }
-                }
-        } else {
-                omap_sram_start = OMAP1_SRAM_PA;
-
-                if (cpu_is_omap7xx())
-                        omap_sram_size = 0x32000;       /* 200K */
-                else if (cpu_is_omap15xx())
-                        omap_sram_size = 0x30000;       /* 192K */
-                else if (cpu_is_omap1610() || cpu_is_omap1611() ||
-                                cpu_is_omap1621() || cpu_is_omap1710())
-                        omap_sram_size = 0x4000;        /* 16K */
-                else {
-                        pr_err("Could not detect SRAM size\n");
-                        omap_sram_size = 0x4000;
-                }
-        }
-}
-
-/*
- * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
- */
-static void __init omap_map_sram(void)
-{
-        int cached = 1;
-
-        if (omap_sram_size == 0)
-                return;
-
-#ifdef CONFIG_OMAP4_ERRATA_I688
-        if (cpu_is_omap44xx()) {
-                omap_sram_start += PAGE_SIZE;
-                omap_sram_size -= SZ_16K;
-        }
-#endif
-        if (cpu_is_omap34xx()) {
-                /*
-                 * SRAM must be marked as non-cached on OMAP3 since the
-                 * CORE DPLL M2 divider change code (in SRAM) runs with the
-                 * SDRAM controller disabled, and if it is marked cached,
-                 * the ARM may attempt to write cache lines back to SDRAM
-                 * which will cause the system to hang.
-                 */
-                cached = 0;
-        }
-
-        omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE);
-        omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size,
-                                                cached);
-        if (!omap_sram_base) {
-                pr_err("SRAM: Could not map\n");
-                return;
-        }
-
-        omap_sram_ceil = omap_sram_base + omap_sram_size;
-
-        /*
-         * Looks like we need to preserve some bootloader code at the
-         * beginning of SRAM for jumping to flash for reboot to work...
-         */
-        memset_io(omap_sram_base + omap_sram_skip, 0,
-                  omap_sram_size - omap_sram_skip);
-}
-
-/*
  * Memory allocator for SRAM: calculates the new ceiling address
  * for pushing a function using the fncpy API.
  *
@@ -236,171 +58,39 @@ void *omap_sram_push_address(unsigned long size)
         return (void *)omap_sram_ceil;
 }
 
-#ifdef CONFIG_ARCH_OMAP1
-
-static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
-
-void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
-{
-        BUG_ON(!_omap_sram_reprogram_clock);
-        /* On 730, bit 13 must always be 1 */
-        if (cpu_is_omap7xx())
-                ckctl |= 0x2000;
-        _omap_sram_reprogram_clock(dpllctl, ckctl);
-}
-
-static int __init omap1_sram_init(void)
-{
-        _omap_sram_reprogram_clock =
-                        omap_sram_push(omap1_sram_reprogram_clock,
-                                        omap1_sram_reprogram_clock_sz);
-
-        return 0;
-}
-
-#else
-#define omap1_sram_init()       do {} while (0)
-#endif
-
-#if defined(CONFIG_ARCH_OMAP2)
-
-static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
-                              u32 base_cs, u32 force_unlock);
-
-void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
-                   u32 base_cs, u32 force_unlock)
-{
-        BUG_ON(!_omap2_sram_ddr_init);
-        _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
-                             base_cs, force_unlock);
-}
-
-static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
-                                          u32 mem_type);
-
-void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
-{
-        BUG_ON(!_omap2_sram_reprogram_sdrc);
-        _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
-}
-
-static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
-
-u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
-{
-        BUG_ON(!_omap2_set_prcm);
-        return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2420
-static int __init omap242x_sram_init(void)
-{
-        _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
-                                        omap242x_sram_ddr_init_sz);
-
-        _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
-                                            omap242x_sram_reprogram_sdrc_sz);
-
-        _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
-                                         omap242x_sram_set_prcm_sz);
-
-        return 0;
-}
-#else
-static inline int omap242x_sram_init(void)
-{
-        return 0;
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2430
-static int __init omap243x_sram_init(void)
-{
-        _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
-                                        omap243x_sram_ddr_init_sz);
-
-        _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
-                                            omap243x_sram_reprogram_sdrc_sz);
-
-        _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
-                                         omap243x_sram_set_prcm_sz);
-
-        return 0;
-}
-#else
-static inline int omap243x_sram_init(void)
-{
-        return 0;
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-
-static u32 (*_omap3_sram_configure_core_dpll)(
-                        u32 m2, u32 unlock_dll, u32 f, u32 inc,
-                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
-                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
-                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
-                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
-
-u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
-                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
-                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
-                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
-                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
-{
-        BUG_ON(!_omap3_sram_configure_core_dpll);
-        return _omap3_sram_configure_core_dpll(
-                        m2, unlock_dll, f, inc,
-                        sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
-                        sdrc_actim_ctrl_b_0, sdrc_mr_0,
-                        sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
-                        sdrc_actim_ctrl_b_1, sdrc_mr_1);
-}
-
-void omap3_sram_restore_context(void)
+/*
+ * The SRAM context is lost during off-idle and stack
+ * needs to be reset.
+ */
+void omap_sram_reset(void)
 {
         omap_sram_ceil = omap_sram_base + omap_sram_size;
-
-        _omap3_sram_configure_core_dpll =
-                omap_sram_push(omap3_sram_configure_core_dpll,
-                               omap3_sram_configure_core_dpll_sz);
-        omap_push_sram_idle();
 }
 
-static inline int omap34xx_sram_init(void)
-{
-        omap3_sram_restore_context();
-        return 0;
-}
-#else
-static inline int omap34xx_sram_init(void)
-{
-        return 0;
-}
-#endif /* CONFIG_ARCH_OMAP3 */
-
-static inline int am33xx_sram_init(void)
+/*
+ * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
+ */
+void __init omap_map_sram(unsigned long start, unsigned long size,
+                                 unsigned long skip, int cached)
 {
-        return 0;
-}
+        if (size == 0)
+                return;
 
-int __init omap_sram_init(void)
-{
-        omap_detect_sram();
-        omap_map_sram();
+        start = ROUND_DOWN(start, PAGE_SIZE);
+        omap_sram_size = size;
+        omap_sram_skip = skip;
+        omap_sram_base = __arm_ioremap_exec(start, size, cached);
+        if (!omap_sram_base) {
+                pr_err("SRAM: Could not map\n");
+                return;
+        }
 
-        if (!(cpu_class_is_omap2()))
-                omap1_sram_init();
-        else if (cpu_is_omap242x())
-                omap242x_sram_init();
-        else if (cpu_is_omap2430())
-                omap243x_sram_init();
-        else if (soc_is_am33xx())
-                am33xx_sram_init();
-        else if (cpu_is_omap34xx())
-                omap34xx_sram_init();
+        omap_sram_reset();
 
-        return 0;
+        /*
+         * Looks like we need to preserve some bootloader code at the
+         * beginning of SRAM for jumping to flash for reboot to work...
+         */
+        memset_io(omap_sram_base + omap_sram_skip, 0,
+                  omap_sram_size - omap_sram_skip);
 }
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 56d925312a5c..7d35c237fbf1 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -21,12 +21,6 @@
 
 #include <plat-omap/dma-omap.h>
 
-#ifdef CONFIG_ARCH_OMAP2PLUS
-#define dma_omap2plus() 1
-#else
-#define dma_omap2plus() 0
-#endif
-
 struct omap_dmadev {
         struct dma_device ddev;
         spinlock_t lock;
diff --git a/drivers/media/platform/omap3isp/ispvideo.c b/drivers/media/platform/omap3isp/ispvideo.c
index a0b737fecf13..5bd40e6870cc 100644
--- a/drivers/media/platform/omap3isp/ispvideo.c
+++ b/drivers/media/platform/omap3isp/ispvideo.c
@@ -36,7 +36,6 @@
 #include <media/v4l2-ioctl.h>
 #include <plat/iommu.h>
 #include <plat/iovmm.h>
-#include <plat/omap-pm.h>
 
 #include "ispvideo.h"
 #include "isp.h"
diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h
index e8741c2678d5..5d50b25a73d7 100644
--- a/include/linux/platform_data/gpio-omap.h
+++ b/include/linux/platform_data/gpio-omap.h
@@ -26,7 +26,6 @@
 
 #include <linux/io.h>
 #include <linux/platform_device.h>
-#include <mach/irqs.h>
 
 #define OMAP1_MPUIO_BASE                        0xfffb5000
 
diff --git a/sound/soc/omap/am3517evm.c b/sound/soc/omap/am3517evm.c
index fad350682ca2..c1900b2a6f28 100644
--- a/sound/soc/omap/am3517evm.c
+++ b/sound/soc/omap/am3517evm.c
@@ -25,8 +25,6 @@
 #include <sound/soc.h>
 
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
-#include <mach/gpio.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 
 #include "omap-mcbsp.h"
diff --git a/sound/soc/omap/n810.c b/sound/soc/omap/n810.c
index 521bfc3d2b2b..230b8c144848 100644
--- a/sound/soc/omap/n810.c
+++ b/sound/soc/omap/n810.c
@@ -29,7 +29,6 @@
 #include <sound/soc.h>
 
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
 #include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
diff --git a/sound/soc/omap/osk5912.c b/sound/soc/omap/osk5912.c
index 3960e8df9c76..06ef8d67ed1c 100644
--- a/sound/soc/omap/osk5912.c
+++ b/sound/soc/omap/osk5912.c
@@ -28,7 +28,6 @@
 #include <sound/soc.h>
 
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
 #include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
diff --git a/sound/soc/omap/sdp3430.c b/sound/soc/omap/sdp3430.c
index 597cae769cea..b462a2c9385f 100644
--- a/sound/soc/omap/sdp3430.c
+++ b/sound/soc/omap/sdp3430.c
@@ -31,8 +31,6 @@
 #include <sound/jack.h>
 
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
-#include <mach/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>