diff options
-rw-r--r-- | Documentation/devicetree/bindings/bus/omap-ocp2scp.txt | 3 | ||||
-rw-r--r-- | MAINTAINERS | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/am4372.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/am57xx-beagle-x15.dts | 49 | ||||
-rw-r--r-- | arch/arm/boot/dts/dra7.dtsi | 33 | ||||
-rw-r--r-- | arch/arm/boot/dts/dra72x.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/dra74x.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap4-cpu-thermal.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap1/pm.c | 51 | ||||
-rw-r--r-- | arch/arm/mach-omap2/Kconfig | 22 | ||||
-rw-r--r-- | arch/arm/mach-omap2/common.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/common.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap2/io.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mux.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap-secure.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap4-common.c | 69 | ||||
-rw-r--r-- | arch/arm/mach-omap2/sleep44xx.S | 2 | ||||
-rw-r--r-- | drivers/bus/omap-ocp2scp.c | 34 |
18 files changed, 161 insertions, 137 deletions
diff --git a/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt b/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt index 63dd8051521c..18729f6fe1e5 100644 --- a/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt +++ b/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt | |||
@@ -1,7 +1,8 @@ | |||
1 | * OMAP OCP2SCP - ocp interface to scp interface | 1 | * OMAP OCP2SCP - ocp interface to scp interface |
2 | 2 | ||
3 | properties: | 3 | properties: |
4 | - compatible : Should be "ti,omap-ocp2scp" | 4 | - compatible : Should be "ti,am437x-ocp2scp" for AM437x processor |
5 | Should be "ti,omap-ocp2scp" for all others | ||
5 | - reg : Address and length of the register set for the device | 6 | - reg : Address and length of the register set for the device |
6 | - #address-cells, #size-cells : Must be present if the device has sub-nodes | 7 | - #address-cells, #size-cells : Must be present if the device has sub-nodes |
7 | - ranges : the child address space are mapped 1:1 onto the parent address space | 8 | - ranges : the child address space are mapped 1:1 onto the parent address space |
diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..085614010f1d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -6947,6 +6947,8 @@ Q: http://patchwork.kernel.org/project/linux-omap/list/ | |||
6947 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git | 6947 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git |
6948 | S: Maintained | 6948 | S: Maintained |
6949 | F: arch/arm/*omap*/ | 6949 | F: arch/arm/*omap*/ |
6950 | F: arch/arm/configs/omap1_defconfig | ||
6951 | F: arch/arm/configs/omap2plus_defconfig | ||
6950 | F: drivers/i2c/busses/i2c-omap.c | 6952 | F: drivers/i2c/busses/i2c-omap.c |
6951 | F: drivers/irqchip/irq-omap-intc.c | 6953 | F: drivers/irqchip/irq-omap-intc.c |
6952 | F: drivers/mfd/*omap*.c | 6954 | F: drivers/mfd/*omap*.c |
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index f8a02a295e08..2f6f0c2040db 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi | |||
@@ -800,7 +800,7 @@ | |||
800 | }; | 800 | }; |
801 | 801 | ||
802 | ocp2scp0: ocp2scp@483a8000 { | 802 | ocp2scp0: ocp2scp@483a8000 { |
803 | compatible = "ti,omap-ocp2scp"; | 803 | compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; |
804 | #address-cells = <1>; | 804 | #address-cells = <1>; |
805 | #size-cells = <1>; | 805 | #size-cells = <1>; |
806 | ranges; | 806 | ranges; |
@@ -819,7 +819,7 @@ | |||
819 | }; | 819 | }; |
820 | 820 | ||
821 | ocp2scp1: ocp2scp@483e8000 { | 821 | ocp2scp1: ocp2scp@483e8000 { |
822 | compatible = "ti,omap-ocp2scp"; | 822 | compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; |
823 | #address-cells = <1>; | 823 | #address-cells = <1>; |
824 | #size-cells = <1>; | 824 | #size-cells = <1>; |
825 | ranges; | 825 | ranges; |
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index 03750af3b49a..ae83a812d8a6 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts | |||
@@ -87,6 +87,7 @@ | |||
87 | gpios = <&tps659038_gpio 1 GPIO_ACTIVE_HIGH>; | 87 | gpios = <&tps659038_gpio 1 GPIO_ACTIVE_HIGH>; |
88 | gpio-fan,speed-map = <0 0>, | 88 | gpio-fan,speed-map = <0 0>, |
89 | <13000 1>; | 89 | <13000 1>; |
90 | #cooling-cells = <2>; | ||
90 | }; | 91 | }; |
91 | 92 | ||
92 | extcon_usb1: extcon_usb1 { | 93 | extcon_usb1: extcon_usb1 { |
@@ -442,6 +443,7 @@ | |||
442 | pinctrl-0 = <&tmp102_pins_default>; | 443 | pinctrl-0 = <&tmp102_pins_default>; |
443 | interrupt-parent = <&gpio7>; | 444 | interrupt-parent = <&gpio7>; |
444 | interrupts = <16 IRQ_TYPE_LEVEL_LOW>; | 445 | interrupts = <16 IRQ_TYPE_LEVEL_LOW>; |
446 | #thermal-sensor-cells = <1>; | ||
445 | }; | 447 | }; |
446 | }; | 448 | }; |
447 | 449 | ||
@@ -560,3 +562,50 @@ | |||
560 | &usb2 { | 562 | &usb2 { |
561 | dr_mode = "peripheral"; | 563 | dr_mode = "peripheral"; |
562 | }; | 564 | }; |
565 | |||
566 | &cpu_trips { | ||
567 | cpu_alert1: cpu_alert1 { | ||
568 | temperature = <50000>; /* millicelsius */ | ||
569 | hysteresis = <2000>; /* millicelsius */ | ||
570 | type = "active"; | ||
571 | }; | ||
572 | }; | ||
573 | |||
574 | &cpu_cooling_maps { | ||
575 | map1 { | ||
576 | trip = <&cpu_alert1>; | ||
577 | cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; | ||
578 | }; | ||
579 | }; | ||
580 | |||
581 | &thermal_zones { | ||
582 | board_thermal: board_thermal { | ||
583 | polling-delay-passive = <1250>; /* milliseconds */ | ||
584 | polling-delay = <1500>; /* milliseconds */ | ||
585 | |||
586 | /* sensor ID */ | ||
587 | thermal-sensors = <&tmp102 0>; | ||
588 | |||
589 | board_trips: trips { | ||
590 | board_alert0: board_alert { | ||
591 | temperature = <40000>; /* millicelsius */ | ||
592 | hysteresis = <2000>; /* millicelsius */ | ||
593 | type = "active"; | ||
594 | }; | ||
595 | |||
596 | board_crit: board_crit { | ||
597 | temperature = <105000>; /* millicelsius */ | ||
598 | hysteresis = <0>; /* millicelsius */ | ||
599 | type = "critical"; | ||
600 | }; | ||
601 | }; | ||
602 | |||
603 | board_cooling_maps: cooling-maps { | ||
604 | map0 { | ||
605 | trip = <&board_alert0>; | ||
606 | cooling-device = | ||
607 | <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; | ||
608 | }; | ||
609 | }; | ||
610 | }; | ||
611 | }; | ||
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 8e50ca3fc102..a4dec49d0278 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi | |||
@@ -261,6 +261,28 @@ | |||
261 | }; | 261 | }; |
262 | }; | 262 | }; |
263 | 263 | ||
264 | bandgap: bandgap@4a0021e0 { | ||
265 | reg = <0x4a0021e0 0xc | ||
266 | 0x4a00232c 0xc | ||
267 | 0x4a002380 0x2c | ||
268 | 0x4a0023C0 0x3c | ||
269 | 0x4a002564 0x8 | ||
270 | 0x4a002574 0x50>; | ||
271 | compatible = "ti,dra752-bandgap"; | ||
272 | interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; | ||
273 | #thermal-sensor-cells = <1>; | ||
274 | }; | ||
275 | |||
276 | dra7_ctrl_core: ctrl_core@4a002000 { | ||
277 | compatible = "syscon"; | ||
278 | reg = <0x4a002000 0x6d0>; | ||
279 | }; | ||
280 | |||
281 | dra7_ctrl_general: tisyscon@4a002e00 { | ||
282 | compatible = "syscon"; | ||
283 | reg = <0x4a002e00 0x7c>; | ||
284 | }; | ||
285 | |||
264 | sdma: dma-controller@4a056000 { | 286 | sdma: dma-controller@4a056000 { |
265 | compatible = "ti,omap4430-sdma"; | 287 | compatible = "ti,omap4430-sdma"; |
266 | reg = <0x4a056000 0x1000>; | 288 | reg = <0x4a056000 0x1000>; |
@@ -1446,6 +1468,17 @@ | |||
1446 | status = "disabled"; | 1468 | status = "disabled"; |
1447 | }; | 1469 | }; |
1448 | }; | 1470 | }; |
1471 | |||
1472 | thermal_zones: thermal-zones { | ||
1473 | #include "omap4-cpu-thermal.dtsi" | ||
1474 | #include "omap5-gpu-thermal.dtsi" | ||
1475 | #include "omap5-core-thermal.dtsi" | ||
1476 | }; | ||
1477 | |||
1478 | }; | ||
1479 | |||
1480 | &cpu_thermal { | ||
1481 | polling-delay = <500>; /* milliseconds */ | ||
1449 | }; | 1482 | }; |
1450 | 1483 | ||
1451 | /include/ "dra7xx-clocks.dtsi" | 1484 | /include/ "dra7xx-clocks.dtsi" |
diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi index e5a3d23a3df1..6ac8e3601499 100644 --- a/arch/arm/boot/dts/dra72x.dtsi +++ b/arch/arm/boot/dts/dra72x.dtsi | |||
@@ -20,6 +20,11 @@ | |||
20 | device_type = "cpu"; | 20 | device_type = "cpu"; |
21 | compatible = "arm,cortex-a15"; | 21 | compatible = "arm,cortex-a15"; |
22 | reg = <0>; | 22 | reg = <0>; |
23 | |||
24 | /* cooling options */ | ||
25 | cooling-min-level = <0>; | ||
26 | cooling-max-level = <2>; | ||
27 | #cooling-cells = <2>; /* min followed by max */ | ||
23 | }; | 28 | }; |
24 | }; | 29 | }; |
25 | 30 | ||
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi index 10173fab1a15..eef981f4bcd5 100644 --- a/arch/arm/boot/dts/dra74x.dtsi +++ b/arch/arm/boot/dts/dra74x.dtsi | |||
@@ -31,6 +31,11 @@ | |||
31 | clock-names = "cpu"; | 31 | clock-names = "cpu"; |
32 | 32 | ||
33 | clock-latency = <300000>; /* From omap-cpufreq driver */ | 33 | clock-latency = <300000>; /* From omap-cpufreq driver */ |
34 | |||
35 | /* cooling options */ | ||
36 | cooling-min-level = <0>; | ||
37 | cooling-max-level = <2>; | ||
38 | #cooling-cells = <2>; /* min followed by max */ | ||
34 | }; | 39 | }; |
35 | cpu@1 { | 40 | cpu@1 { |
36 | device_type = "cpu"; | 41 | device_type = "cpu"; |
diff --git a/arch/arm/boot/dts/omap4-cpu-thermal.dtsi b/arch/arm/boot/dts/omap4-cpu-thermal.dtsi index cb9458feb2e3..ab7f87ae96f0 100644 --- a/arch/arm/boot/dts/omap4-cpu-thermal.dtsi +++ b/arch/arm/boot/dts/omap4-cpu-thermal.dtsi | |||
@@ -18,7 +18,7 @@ cpu_thermal: cpu_thermal { | |||
18 | /* sensor ID */ | 18 | /* sensor ID */ |
19 | thermal-sensors = <&bandgap 0>; | 19 | thermal-sensors = <&bandgap 0>; |
20 | 20 | ||
21 | trips { | 21 | cpu_trips: trips { |
22 | cpu_alert0: cpu_alert { | 22 | cpu_alert0: cpu_alert { |
23 | temperature = <100000>; /* millicelsius */ | 23 | temperature = <100000>; /* millicelsius */ |
24 | hysteresis = <2000>; /* millicelsius */ | 24 | hysteresis = <2000>; /* millicelsius */ |
@@ -31,7 +31,7 @@ cpu_thermal: cpu_thermal { | |||
31 | }; | 31 | }; |
32 | }; | 32 | }; |
33 | 33 | ||
34 | cooling-maps { | 34 | cpu_cooling_maps: cooling-maps { |
35 | map0 { | 35 | map0 { |
36 | trip = <&cpu_alert0>; | 36 | trip = <&cpu_alert0>; |
37 | cooling-device = | 37 | cooling-device = |
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 34b4c0044961..dd94567c3628 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
@@ -71,13 +71,7 @@ static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE]; | |||
71 | static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; | 71 | static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; |
72 | static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; | 72 | static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; |
73 | 73 | ||
74 | #ifndef CONFIG_OMAP_32K_TIMER | 74 | static unsigned short enable_dyn_sleep; |
75 | |||
76 | static unsigned short enable_dyn_sleep = 0; | ||
77 | |||
78 | #else | ||
79 | |||
80 | static unsigned short enable_dyn_sleep = 1; | ||
81 | 75 | ||
82 | static ssize_t idle_show(struct kobject *kobj, struct kobj_attribute *attr, | 76 | static ssize_t idle_show(struct kobject *kobj, struct kobj_attribute *attr, |
83 | char *buf) | 77 | char *buf) |
@@ -90,8 +84,9 @@ static ssize_t idle_store(struct kobject *kobj, struct kobj_attribute *attr, | |||
90 | { | 84 | { |
91 | unsigned short value; | 85 | unsigned short value; |
92 | if (sscanf(buf, "%hu", &value) != 1 || | 86 | if (sscanf(buf, "%hu", &value) != 1 || |
93 | (value != 0 && value != 1)) { | 87 | (value != 0 && value != 1) || |
94 | printk(KERN_ERR "idle_sleep_store: Invalid value\n"); | 88 | (value != 0 && !IS_ENABLED(CONFIG_OMAP_32K_TIMER))) { |
89 | pr_err("idle_sleep_store: Invalid value\n"); | ||
95 | return -EINVAL; | 90 | return -EINVAL; |
96 | } | 91 | } |
97 | enable_dyn_sleep = value; | 92 | enable_dyn_sleep = value; |
@@ -101,7 +96,6 @@ static ssize_t idle_store(struct kobject *kobj, struct kobj_attribute *attr, | |||
101 | static struct kobj_attribute sleep_while_idle_attr = | 96 | static struct kobj_attribute sleep_while_idle_attr = |
102 | __ATTR(sleep_while_idle, 0644, idle_show, idle_store); | 97 | __ATTR(sleep_while_idle, 0644, idle_show, idle_store); |
103 | 98 | ||
104 | #endif | ||
105 | 99 | ||
106 | static void (*omap_sram_suspend)(unsigned long r0, unsigned long r1) = NULL; | 100 | static void (*omap_sram_suspend)(unsigned long r0, unsigned long r1) = NULL; |
107 | 101 | ||
@@ -115,16 +109,11 @@ void omap1_pm_idle(void) | |||
115 | { | 109 | { |
116 | extern __u32 arm_idlect1_mask; | 110 | extern __u32 arm_idlect1_mask; |
117 | __u32 use_idlect1 = arm_idlect1_mask; | 111 | __u32 use_idlect1 = arm_idlect1_mask; |
118 | int do_sleep = 0; | ||
119 | 112 | ||
120 | local_fiq_disable(); | 113 | local_fiq_disable(); |
121 | 114 | ||
122 | #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) | 115 | #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) |
123 | #warning Enable 32kHz OS timer in order to allow sleep states in idle | ||
124 | use_idlect1 = use_idlect1 & ~(1 << 9); | 116 | use_idlect1 = use_idlect1 & ~(1 << 9); |
125 | #else | ||
126 | if (enable_dyn_sleep) | ||
127 | do_sleep = 1; | ||
128 | #endif | 117 | #endif |
129 | 118 | ||
130 | #ifdef CONFIG_OMAP_DM_TIMER | 119 | #ifdef CONFIG_OMAP_DM_TIMER |
@@ -134,10 +123,12 @@ void omap1_pm_idle(void) | |||
134 | if (omap_dma_running()) | 123 | if (omap_dma_running()) |
135 | use_idlect1 &= ~(1 << 6); | 124 | use_idlect1 &= ~(1 << 6); |
136 | 125 | ||
137 | /* We should be able to remove the do_sleep variable and multiple | 126 | /* |
127 | * We should be able to remove the do_sleep variable and multiple | ||
138 | * tests above as soon as drivers, timer and DMA code have been fixed. | 128 | * tests above as soon as drivers, timer and DMA code have been fixed. |
139 | * Even the sleep block count should become obsolete. */ | 129 | * Even the sleep block count should become obsolete. |
140 | if ((use_idlect1 != ~0) || !do_sleep) { | 130 | */ |
131 | if ((use_idlect1 != ~0) || !enable_dyn_sleep) { | ||
141 | 132 | ||
142 | __u32 saved_idlect1 = omap_readl(ARM_IDLECT1); | 133 | __u32 saved_idlect1 = omap_readl(ARM_IDLECT1); |
143 | if (cpu_is_omap15xx()) | 134 | if (cpu_is_omap15xx()) |
@@ -635,15 +626,25 @@ static const struct platform_suspend_ops omap_pm_ops = { | |||
635 | 626 | ||
636 | static int __init omap_pm_init(void) | 627 | static int __init omap_pm_init(void) |
637 | { | 628 | { |
638 | 629 | int error = 0; | |
639 | #ifdef CONFIG_OMAP_32K_TIMER | ||
640 | int error; | ||
641 | #endif | ||
642 | 630 | ||
643 | if (!cpu_class_is_omap1()) | 631 | if (!cpu_class_is_omap1()) |
644 | return -ENODEV; | 632 | return -ENODEV; |
645 | 633 | ||
646 | printk("Power Management for TI OMAP.\n"); | 634 | pr_info("Power Management for TI OMAP.\n"); |
635 | |||
636 | if (!IS_ENABLED(CONFIG_OMAP_32K_TIMER)) | ||
637 | pr_info("OMAP1 PM: sleep states in idle disabled due to no 32KiHz timer\n"); | ||
638 | |||
639 | if (!IS_ENABLED(CONFIG_OMAP_DM_TIMER)) | ||
640 | pr_info("OMAP1 PM: sleep states in idle disabled due to no DMTIMER support\n"); | ||
641 | |||
642 | if (IS_ENABLED(CONFIG_OMAP_32K_TIMER) && | ||
643 | IS_ENABLED(CONFIG_OMAP_DM_TIMER)) { | ||
644 | /* OMAP16xx only */ | ||
645 | pr_info("OMAP1 PM: sleep states in idle enabled\n"); | ||
646 | enable_dyn_sleep = 1; | ||
647 | } | ||
647 | 648 | ||
648 | /* | 649 | /* |
649 | * We copy the assembler sleep/wakeup routines to SRAM. | 650 | * We copy the assembler sleep/wakeup routines to SRAM. |
@@ -693,17 +694,15 @@ static int __init omap_pm_init(void) | |||
693 | omap_pm_init_debugfs(); | 694 | omap_pm_init_debugfs(); |
694 | #endif | 695 | #endif |
695 | 696 | ||
696 | #ifdef CONFIG_OMAP_32K_TIMER | ||
697 | error = sysfs_create_file(power_kobj, &sleep_while_idle_attr.attr); | 697 | error = sysfs_create_file(power_kobj, &sleep_while_idle_attr.attr); |
698 | if (error) | 698 | if (error) |
699 | printk(KERN_ERR "sysfs_create_file failed: %d\n", error); | 699 | printk(KERN_ERR "sysfs_create_file failed: %d\n", error); |
700 | #endif | ||
701 | 700 | ||
702 | if (cpu_is_omap16xx()) { | 701 | if (cpu_is_omap16xx()) { |
703 | /* configure LOW_PWR pin */ | 702 | /* configure LOW_PWR pin */ |
704 | omap_cfg_reg(T20_1610_LOW_PWR); | 703 | omap_cfg_reg(T20_1610_LOW_PWR); |
705 | } | 704 | } |
706 | 705 | ||
707 | return 0; | 706 | return error; |
708 | } | 707 | } |
709 | __initcall(omap_pm_init); | 708 | __initcall(omap_pm_init); |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 2b8e47788062..1041b19485ab 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -69,6 +69,7 @@ config SOC_DRA7XX | |||
69 | select ARM_GIC | 69 | select ARM_GIC |
70 | select HAVE_ARM_ARCH_TIMER | 70 | select HAVE_ARM_ARCH_TIMER |
71 | select IRQ_CROSSBAR | 71 | select IRQ_CROSSBAR |
72 | select ARM_ERRATA_798181 if SMP | ||
72 | 73 | ||
73 | config ARCH_OMAP2PLUS | 74 | config ARCH_OMAP2PLUS |
74 | bool | 75 | bool |
@@ -278,27 +279,6 @@ config OMAP3_SDRC_AC_TIMING | |||
278 | wish to say no. Selecting yes without understanding what is | 279 | wish to say no. Selecting yes without understanding what is |
279 | going on could result in system crashes; | 280 | going on could result in system crashes; |
280 | 281 | ||
281 | config OMAP4_ERRATA_I688 | ||
282 | bool "OMAP4 errata: Async Bridge Corruption" | ||
283 | depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM | ||
284 | select ARCH_HAS_BARRIERS | ||
285 | help | ||
286 | If a data is stalled inside asynchronous bridge because of back | ||
287 | pressure, it may be accepted multiple times, creating pointer | ||
288 | misalignment that will corrupt next transfers on that data path | ||
289 | until next reset of the system (No recovery procedure once the | ||
290 | issue is hit, the path remains consistently broken). Async bridge | ||
291 | can be found on path between MPU to EMIF and MPU to L3 interconnect. | ||
292 | This situation can happen only when the idle is initiated by a | ||
293 | Master Request Disconnection (which is trigged by software when | ||
294 | executing WFI on CPU). | ||
295 | The work-around for this errata needs all the initiators connected | ||
296 | through async bridge must ensure that data path is properly drained | ||
297 | before issuing WFI. This condition will be met if one Strongly ordered | ||
298 | access is performed to the target right before executing the WFI. | ||
299 | In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained. | ||
300 | IO barrier ensure that there is no synchronisation loss on initiators | ||
301 | operating on both interconnect port simultaneously. | ||
302 | endmenu | 282 | endmenu |
303 | 283 | ||
304 | endif | 284 | endif |
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 484cdadfb187..eae6a0e87c90 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c | |||
@@ -30,5 +30,4 @@ int __weak omap_secure_ram_reserve_memblock(void) | |||
30 | void __init omap_reserve(void) | 30 | void __init omap_reserve(void) |
31 | { | 31 | { |
32 | omap_secure_ram_reserve_memblock(); | 32 | omap_secure_ram_reserve_memblock(); |
33 | omap_barrier_reserve_memblock(); | ||
34 | } | 33 | } |
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 46e24581d624..cf3cf22ecd42 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
@@ -200,9 +200,6 @@ void __init omap4_map_io(void); | |||
200 | void __init omap5_map_io(void); | 200 | void __init omap5_map_io(void); |
201 | void __init ti81xx_map_io(void); | 201 | void __init ti81xx_map_io(void); |
202 | 202 | ||
203 | /* omap_barriers_init() is OMAP4 only */ | ||
204 | void omap_barriers_init(void); | ||
205 | |||
206 | /** | 203 | /** |
207 | * omap_test_timeout - busy-loop, testing a condition | 204 | * omap_test_timeout - busy-loop, testing a condition |
208 | * @cond: condition to test until it evaluates to true | 205 | * @cond: condition to test until it evaluates to true |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 7743e3672f98..820dde8b5b04 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -306,7 +306,6 @@ void __init am33xx_map_io(void) | |||
306 | void __init omap4_map_io(void) | 306 | void __init omap4_map_io(void) |
307 | { | 307 | { |
308 | iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); | 308 | iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); |
309 | omap_barriers_init(); | ||
310 | } | 309 | } |
311 | #endif | 310 | #endif |
312 | 311 | ||
@@ -314,7 +313,6 @@ void __init omap4_map_io(void) | |||
314 | void __init omap5_map_io(void) | 313 | void __init omap5_map_io(void) |
315 | { | 314 | { |
316 | iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); | 315 | iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); |
317 | omap_barriers_init(); | ||
318 | } | 316 | } |
319 | #endif | 317 | #endif |
320 | /* | 318 | /* |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 78064b0d4db5..176eef6ef338 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
@@ -1053,7 +1053,7 @@ static void __init omap_mux_init_list(struct omap_mux_partition *partition, | |||
1053 | struct omap_mux *entry; | 1053 | struct omap_mux *entry; |
1054 | 1054 | ||
1055 | #ifdef CONFIG_OMAP_MUX | 1055 | #ifdef CONFIG_OMAP_MUX |
1056 | if (!superset->muxnames || !superset->muxnames[0]) { | 1056 | if (!superset->muxnames[0]) { |
1057 | superset++; | 1057 | superset++; |
1058 | continue; | 1058 | continue; |
1059 | } | 1059 | } |
diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h index dec2b05d184b..af2851fbcdf0 100644 --- a/arch/arm/mach-omap2/omap-secure.h +++ b/arch/arm/mach-omap2/omap-secure.h | |||
@@ -70,13 +70,6 @@ extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, | |||
70 | extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits); | 70 | extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits); |
71 | extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag); | 71 | extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag); |
72 | 72 | ||
73 | #ifdef CONFIG_OMAP4_ERRATA_I688 | ||
74 | extern int omap_barrier_reserve_memblock(void); | ||
75 | #else | ||
76 | static inline void omap_barrier_reserve_memblock(void) | ||
77 | { } | ||
78 | #endif | ||
79 | |||
80 | #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER | 73 | #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER |
81 | void set_cntfreq(void); | 74 | void set_cntfreq(void); |
82 | #else | 75 | #else |
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index cee0fe1ee6ff..afaac9e25764 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
@@ -52,75 +52,6 @@ static void __iomem *twd_base; | |||
52 | 52 | ||
53 | #define IRQ_LOCALTIMER 29 | 53 | #define IRQ_LOCALTIMER 29 |
54 | 54 | ||
55 | #ifdef CONFIG_OMAP4_ERRATA_I688 | ||
56 | /* Used to implement memory barrier on DRAM path */ | ||
57 | #define OMAP4_DRAM_BARRIER_VA 0xfe600000 | ||
58 | |||
59 | void __iomem *dram_sync, *sram_sync; | ||
60 | |||
61 | static phys_addr_t paddr; | ||
62 | static u32 size; | ||
63 | |||
64 | void omap_bus_sync(void) | ||
65 | { | ||
66 | if (dram_sync && sram_sync) { | ||
67 | writel_relaxed(readl_relaxed(dram_sync), dram_sync); | ||
68 | writel_relaxed(readl_relaxed(sram_sync), sram_sync); | ||
69 | isb(); | ||
70 | } | ||
71 | } | ||
72 | EXPORT_SYMBOL(omap_bus_sync); | ||
73 | |||
74 | static int __init omap4_sram_init(void) | ||
75 | { | ||
76 | struct device_node *np; | ||
77 | struct gen_pool *sram_pool; | ||
78 | |||
79 | np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu"); | ||
80 | if (!np) | ||
81 | pr_warn("%s:Unable to allocate sram needed to handle errata I688\n", | ||
82 | __func__); | ||
83 | sram_pool = of_get_named_gen_pool(np, "sram", 0); | ||
84 | if (!sram_pool) | ||
85 | pr_warn("%s:Unable to get sram pool needed to handle errata I688\n", | ||
86 | __func__); | ||
87 | else | ||
88 | sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE); | ||
89 | |||
90 | return 0; | ||
91 | } | ||
92 | omap_arch_initcall(omap4_sram_init); | ||
93 | |||
94 | /* Steal one page physical memory for barrier implementation */ | ||
95 | int __init omap_barrier_reserve_memblock(void) | ||
96 | { | ||
97 | |||
98 | size = ALIGN(PAGE_SIZE, SZ_1M); | ||
99 | paddr = arm_memblock_steal(size, SZ_1M); | ||
100 | |||
101 | return 0; | ||
102 | } | ||
103 | |||
104 | void __init omap_barriers_init(void) | ||
105 | { | ||
106 | struct map_desc dram_io_desc[1]; | ||
107 | |||
108 | dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA; | ||
109 | dram_io_desc[0].pfn = __phys_to_pfn(paddr); | ||
110 | dram_io_desc[0].length = size; | ||
111 | dram_io_desc[0].type = MT_MEMORY_RW_SO; | ||
112 | iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc)); | ||
113 | dram_sync = (void __iomem *) dram_io_desc[0].virtual; | ||
114 | |||
115 | pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n", | ||
116 | (long long) paddr, dram_io_desc[0].virtual); | ||
117 | |||
118 | } | ||
119 | #else | ||
120 | void __init omap_barriers_init(void) | ||
121 | {} | ||
122 | #endif | ||
123 | |||
124 | void gic_dist_disable(void) | 55 | void gic_dist_disable(void) |
125 | { | 56 | { |
126 | if (gic_dist_base_addr) | 57 | if (gic_dist_base_addr) |
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S index b84a0122d823..ad1bb9431e94 100644 --- a/arch/arm/mach-omap2/sleep44xx.S +++ b/arch/arm/mach-omap2/sleep44xx.S | |||
@@ -333,11 +333,9 @@ ENDPROC(omap4_cpu_resume) | |||
333 | 333 | ||
334 | #endif /* defined(CONFIG_SMP) && defined(CONFIG_PM) */ | 334 | #endif /* defined(CONFIG_SMP) && defined(CONFIG_PM) */ |
335 | 335 | ||
336 | #ifndef CONFIG_OMAP4_ERRATA_I688 | ||
337 | ENTRY(omap_bus_sync) | 336 | ENTRY(omap_bus_sync) |
338 | ret lr | 337 | ret lr |
339 | ENDPROC(omap_bus_sync) | 338 | ENDPROC(omap_bus_sync) |
340 | #endif | ||
341 | 339 | ||
342 | ENTRY(omap_do_wfi) | 340 | ENTRY(omap_do_wfi) |
343 | stmfd sp!, {lr} | 341 | stmfd sp!, {lr} |
diff --git a/drivers/bus/omap-ocp2scp.c b/drivers/bus/omap-ocp2scp.c index 723ec06ad2c8..9f1856948758 100644 --- a/drivers/bus/omap-ocp2scp.c +++ b/drivers/bus/omap-ocp2scp.c | |||
@@ -16,6 +16,7 @@ | |||
16 | * | 16 | * |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/io.h> | ||
19 | #include <linux/module.h> | 20 | #include <linux/module.h> |
20 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
21 | #include <linux/err.h> | 22 | #include <linux/err.h> |
@@ -23,6 +24,9 @@ | |||
23 | #include <linux/of.h> | 24 | #include <linux/of.h> |
24 | #include <linux/of_platform.h> | 25 | #include <linux/of_platform.h> |
25 | 26 | ||
27 | #define OCP2SCP_TIMING 0x18 | ||
28 | #define SYNC2_MASK 0xf | ||
29 | |||
26 | static int ocp2scp_remove_devices(struct device *dev, void *c) | 30 | static int ocp2scp_remove_devices(struct device *dev, void *c) |
27 | { | 31 | { |
28 | struct platform_device *pdev = to_platform_device(dev); | 32 | struct platform_device *pdev = to_platform_device(dev); |
@@ -35,6 +39,9 @@ static int ocp2scp_remove_devices(struct device *dev, void *c) | |||
35 | static int omap_ocp2scp_probe(struct platform_device *pdev) | 39 | static int omap_ocp2scp_probe(struct platform_device *pdev) |
36 | { | 40 | { |
37 | int ret; | 41 | int ret; |
42 | u32 reg; | ||
43 | void __iomem *regs; | ||
44 | struct resource *res; | ||
38 | struct device_node *np = pdev->dev.of_node; | 45 | struct device_node *np = pdev->dev.of_node; |
39 | 46 | ||
40 | if (np) { | 47 | if (np) { |
@@ -47,6 +54,32 @@ static int omap_ocp2scp_probe(struct platform_device *pdev) | |||
47 | } | 54 | } |
48 | 55 | ||
49 | pm_runtime_enable(&pdev->dev); | 56 | pm_runtime_enable(&pdev->dev); |
57 | /* | ||
58 | * As per AM572x TRM: http://www.ti.com/lit/ug/spruhz6/spruhz6.pdf | ||
59 | * under section 26.3.2.2, table 26-26 OCP2SCP TIMING Caution; | ||
60 | * As per OMAP4430 TRM: http://www.ti.com/lit/ug/swpu231ap/swpu231ap.pdf | ||
61 | * under section 23.12.6.2.2 , Table 23-1213 OCP2SCP TIMING Caution; | ||
62 | * As per OMAP4460 TRM: http://www.ti.com/lit/ug/swpu235ab/swpu235ab.pdf | ||
63 | * under section 23.12.6.2.2, Table 23-1213 OCP2SCP TIMING Caution; | ||
64 | * As per OMAP543x TRM http://www.ti.com/lit/pdf/swpu249 | ||
65 | * under section 27.3.2.2, Table 27-27 OCP2SCP TIMING Caution; | ||
66 | * | ||
67 | * Read path of OCP2SCP is not working properly due to low reset value | ||
68 | * of SYNC2 parameter in OCP2SCP. Suggested reset value is 0x6 or more. | ||
69 | */ | ||
70 | if (!of_device_is_compatible(np, "ti,am437x-ocp2scp")) { | ||
71 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
72 | regs = devm_ioremap_resource(&pdev->dev, res); | ||
73 | if (IS_ERR(regs)) | ||
74 | goto err0; | ||
75 | |||
76 | pm_runtime_get_sync(&pdev->dev); | ||
77 | reg = readl_relaxed(regs + OCP2SCP_TIMING); | ||
78 | reg &= ~(SYNC2_MASK); | ||
79 | reg |= 0x6; | ||
80 | writel_relaxed(reg, regs + OCP2SCP_TIMING); | ||
81 | pm_runtime_put_sync(&pdev->dev); | ||
82 | } | ||
50 | 83 | ||
51 | return 0; | 84 | return 0; |
52 | 85 | ||
@@ -67,6 +100,7 @@ static int omap_ocp2scp_remove(struct platform_device *pdev) | |||
67 | #ifdef CONFIG_OF | 100 | #ifdef CONFIG_OF |
68 | static const struct of_device_id omap_ocp2scp_id_table[] = { | 101 | static const struct of_device_id omap_ocp2scp_id_table[] = { |
69 | { .compatible = "ti,omap-ocp2scp" }, | 102 | { .compatible = "ti,omap-ocp2scp" }, |
103 | { .compatible = "ti,am437x-ocp2scp" }, | ||
70 | {} | 104 | {} |
71 | }; | 105 | }; |
72 | MODULE_DEVICE_TABLE(of, omap_ocp2scp_id_table); | 106 | MODULE_DEVICE_TABLE(of, omap_ocp2scp_id_table); |