diff options
124 files changed, 2007 insertions, 1618 deletions
diff --git a/Documentation/devicetree/bindings/clock/arm-integrator.txt b/Documentation/devicetree/bindings/clock/arm-integrator.txt new file mode 100644 index 000000000000..652914b17b95 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/arm-integrator.txt | |||
@@ -0,0 +1,34 @@ | |||
1 | Clock bindings for ARM Integrator Core Module clocks | ||
2 | |||
3 | Auxilary Oscillator Clock | ||
4 | |||
5 | This is a configurable clock fed from a 24 MHz chrystal, | ||
6 | used for generating e.g. video clocks. It is located on the | ||
7 | core module and there is only one of these. | ||
8 | |||
9 | This clock node *must* be a subnode of the core module, since | ||
10 | it obtains the base address for it's address range from its | ||
11 | parent node. | ||
12 | |||
13 | |||
14 | Required properties: | ||
15 | - compatible: must be "arm,integrator-cm-auxosc" | ||
16 | - #clock-cells: must be <0> | ||
17 | |||
18 | Optional properties: | ||
19 | - clocks: parent clock(s) | ||
20 | |||
21 | Example: | ||
22 | |||
23 | core-module@10000000 { | ||
24 | xtal24mhz: xtal24mhz@24M { | ||
25 | #clock-cells = <0>; | ||
26 | compatible = "fixed-clock"; | ||
27 | clock-frequency = <24000000>; | ||
28 | }; | ||
29 | auxosc: cm_aux_osc@25M { | ||
30 | #clock-cells = <0>; | ||
31 | compatible = "arm,integrator-cm-auxosc"; | ||
32 | clocks = <&xtal24mhz>; | ||
33 | }; | ||
34 | }; | ||
diff --git a/Documentation/devicetree/bindings/watchdog/marvel.txt b/Documentation/devicetree/bindings/watchdog/marvel.txt index 5dc8d30061ce..de11eb4c121f 100644 --- a/Documentation/devicetree/bindings/watchdog/marvel.txt +++ b/Documentation/devicetree/bindings/watchdog/marvel.txt | |||
@@ -3,17 +3,24 @@ | |||
3 | Required Properties: | 3 | Required Properties: |
4 | 4 | ||
5 | - Compatibility : "marvell,orion-wdt" | 5 | - Compatibility : "marvell,orion-wdt" |
6 | - reg : Address of the timer registers | 6 | "marvell,armada-370-wdt" |
7 | "marvell,armada-xp-wdt" | ||
8 | |||
9 | - reg : Should contain two entries: first one with the | ||
10 | timer control address, second one with the | ||
11 | rstout enable address. | ||
7 | 12 | ||
8 | Optional properties: | 13 | Optional properties: |
9 | 14 | ||
15 | - interrupts : Contains the IRQ for watchdog expiration | ||
10 | - timeout-sec : Contains the watchdog timeout in seconds | 16 | - timeout-sec : Contains the watchdog timeout in seconds |
11 | 17 | ||
12 | Example: | 18 | Example: |
13 | 19 | ||
14 | wdt@20300 { | 20 | wdt@20300 { |
15 | compatible = "marvell,orion-wdt"; | 21 | compatible = "marvell,orion-wdt"; |
16 | reg = <0x20300 0x28>; | 22 | reg = <0x20300 0x28>, <0x20108 0x4>; |
23 | interrupts = <3>; | ||
17 | timeout-sec = <10>; | 24 | timeout-sec = <10>; |
18 | status = "okay"; | 25 | status = "okay"; |
19 | }; | 26 | }; |
diff --git a/MAINTAINERS b/MAINTAINERS index fb08dcececf1..9dbf7f1898c5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -1167,6 +1167,14 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |||
1167 | W: http://www.arm.linux.org.uk/ | 1167 | W: http://www.arm.linux.org.uk/ |
1168 | S: Maintained | 1168 | S: Maintained |
1169 | 1169 | ||
1170 | ARM/QUALCOMM SUPPORT | ||
1171 | M: Kumar Gala <galak@codeaurora.org> | ||
1172 | M: David Brown <davidb@codeaurora.org> | ||
1173 | L: linux-arm-msm@vger.kernel.org | ||
1174 | S: Maintained | ||
1175 | F: arch/arm/mach-qcom/ | ||
1176 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git | ||
1177 | |||
1170 | ARM/RADISYS ENP2611 MACHINE SUPPORT | 1178 | ARM/RADISYS ENP2611 MACHINE SUPPORT |
1171 | M: Lennert Buytenhek <kernel@wantstofly.org> | 1179 | M: Lennert Buytenhek <kernel@wantstofly.org> |
1172 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | 1180 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e25419817791..f093f2030c1c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -657,9 +657,8 @@ config ARCH_PXA | |||
657 | help | 657 | help |
658 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. | 658 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
659 | 659 | ||
660 | config ARCH_MSM_NODT | 660 | config ARCH_MSM |
661 | bool "Qualcomm MSM" | 661 | bool "Qualcomm MSM (non-multiplatform)" |
662 | select ARCH_MSM | ||
663 | select ARCH_REQUIRE_GPIOLIB | 662 | select ARCH_REQUIRE_GPIOLIB |
664 | select COMMON_CLK | 663 | select COMMON_CLK |
665 | select GENERIC_CLOCKEVENTS | 664 | select GENERIC_CLOCKEVENTS |
@@ -1005,6 +1004,8 @@ source "arch/arm/plat-pxa/Kconfig" | |||
1005 | 1004 | ||
1006 | source "arch/arm/mach-mmp/Kconfig" | 1005 | source "arch/arm/mach-mmp/Kconfig" |
1007 | 1006 | ||
1007 | source "arch/arm/mach-qcom/Kconfig" | ||
1008 | |||
1008 | source "arch/arm/mach-realview/Kconfig" | 1009 | source "arch/arm/mach-realview/Kconfig" |
1009 | 1010 | ||
1010 | source "arch/arm/mach-rockchip/Kconfig" | 1011 | source "arch/arm/mach-rockchip/Kconfig" |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 0531da8e5216..4491c7b05275 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -956,7 +956,7 @@ config DEBUG_STI_UART | |||
956 | 956 | ||
957 | config DEBUG_MSM_UART | 957 | config DEBUG_MSM_UART |
958 | bool | 958 | bool |
959 | depends on ARCH_MSM | 959 | depends on ARCH_MSM || ARCH_QCOM |
960 | 960 | ||
961 | config DEBUG_LL_INCLUDE | 961 | config DEBUG_LL_INCLUDE |
962 | string | 962 | string |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 08a9ef58d9c3..51e5bede657f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -180,6 +180,7 @@ machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 | |||
180 | machine-$(CONFIG_ARCH_ORION5X) += orion5x | 180 | machine-$(CONFIG_ARCH_ORION5X) += orion5x |
181 | machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell | 181 | machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell |
182 | machine-$(CONFIG_ARCH_PXA) += pxa | 182 | machine-$(CONFIG_ARCH_PXA) += pxa |
183 | machine-$(CONFIG_ARCH_QCOM) += qcom | ||
183 | machine-$(CONFIG_ARCH_REALVIEW) += realview | 184 | machine-$(CONFIG_ARCH_REALVIEW) += realview |
184 | machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip | 185 | machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip |
185 | machine-$(CONFIG_ARCH_RPC) += rpc | 186 | machine-$(CONFIG_ARCH_RPC) += rpc |
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6d1e43d46187..3269029a1ce6 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -119,9 +119,6 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \ | |||
119 | kirkwood-ts219-6282.dtb | 119 | kirkwood-ts219-6282.dtb |
120 | dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb | 120 | dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb |
121 | dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb | 121 | dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb |
122 | dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \ | ||
123 | qcom-msm8960-cdp.dtb \ | ||
124 | qcom-apq8074-dragonboard.dtb | ||
125 | dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ | 122 | dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ |
126 | armada-370-mirabox.dtb \ | 123 | armada-370-mirabox.dtb \ |
127 | armada-370-netgear-rn102.dtb \ | 124 | armada-370-netgear-rn102.dtb \ |
@@ -233,6 +230,9 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ | |||
233 | dra7-evm.dtb | 230 | dra7-evm.dtb |
234 | dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb | 231 | dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb |
235 | dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb | 232 | dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb |
233 | dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \ | ||
234 | qcom-msm8960-cdp.dtb \ | ||
235 | qcom-apq8074-dragonboard.dtb | ||
236 | dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ | 236 | dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ |
237 | ste-hrefprev60-stuib.dtb \ | 237 | ste-hrefprev60-stuib.dtb \ |
238 | ste-hrefprev60-tvk.dtb \ | 238 | ste-hrefprev60-tvk.dtb \ |
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts index e6be9315ff0a..b10e6351da53 100644 --- a/arch/arm/boot/dts/integratorap.dts +++ b/arch/arm/boot/dts/integratorap.dts | |||
@@ -18,6 +18,28 @@ | |||
18 | bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk"; | 18 | bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk"; |
19 | }; | 19 | }; |
20 | 20 | ||
21 | /* 24 MHz chrystal on the core module */ | ||
22 | xtal24mhz: xtal24mhz@24M { | ||
23 | #clock-cells = <0>; | ||
24 | compatible = "fixed-clock"; | ||
25 | clock-frequency = <24000000>; | ||
26 | }; | ||
27 | |||
28 | pclk: pclk@0 { | ||
29 | #clock-cells = <0>; | ||
30 | compatible = "fixed-factor-clock"; | ||
31 | clock-div = <1>; | ||
32 | clock-mult = <1>; | ||
33 | clocks = <&xtal24mhz>; | ||
34 | }; | ||
35 | |||
36 | /* The UART clock is 14.74 MHz divided by an ICS525 */ | ||
37 | uartclk: uartclk@14.74M { | ||
38 | #clock-cells = <0>; | ||
39 | compatible = "fixed-clock"; | ||
40 | clock-frequency = <14745600>; | ||
41 | }; | ||
42 | |||
21 | syscon { | 43 | syscon { |
22 | compatible = "arm,integrator-ap-syscon"; | 44 | compatible = "arm,integrator-ap-syscon"; |
23 | reg = <0x11000000 0x100>; | 45 | reg = <0x11000000 0x100>; |
@@ -28,14 +50,17 @@ | |||
28 | 50 | ||
29 | timer0: timer@13000000 { | 51 | timer0: timer@13000000 { |
30 | compatible = "arm,integrator-timer"; | 52 | compatible = "arm,integrator-timer"; |
53 | clocks = <&xtal24mhz>; | ||
31 | }; | 54 | }; |
32 | 55 | ||
33 | timer1: timer@13000100 { | 56 | timer1: timer@13000100 { |
34 | compatible = "arm,integrator-timer"; | 57 | compatible = "arm,integrator-timer"; |
58 | clocks = <&xtal24mhz>; | ||
35 | }; | 59 | }; |
36 | 60 | ||
37 | timer2: timer@13000200 { | 61 | timer2: timer@13000200 { |
38 | compatible = "arm,integrator-timer"; | 62 | compatible = "arm,integrator-timer"; |
63 | clocks = <&xtal24mhz>; | ||
39 | }; | 64 | }; |
40 | 65 | ||
41 | pic: pic@14000000 { | 66 | pic: pic@14000000 { |
@@ -92,26 +117,36 @@ | |||
92 | rtc: rtc@15000000 { | 117 | rtc: rtc@15000000 { |
93 | compatible = "arm,pl030", "arm,primecell"; | 118 | compatible = "arm,pl030", "arm,primecell"; |
94 | arm,primecell-periphid = <0x00041030>; | 119 | arm,primecell-periphid = <0x00041030>; |
120 | clocks = <&pclk>; | ||
121 | clock-names = "apb_pclk"; | ||
95 | }; | 122 | }; |
96 | 123 | ||
97 | uart0: uart@16000000 { | 124 | uart0: uart@16000000 { |
98 | compatible = "arm,pl010", "arm,primecell"; | 125 | compatible = "arm,pl010", "arm,primecell"; |
99 | arm,primecell-periphid = <0x00041010>; | 126 | arm,primecell-periphid = <0x00041010>; |
127 | clocks = <&uartclk>, <&pclk>; | ||
128 | clock-names = "uartclk", "apb_pclk"; | ||
100 | }; | 129 | }; |
101 | 130 | ||
102 | uart1: uart@17000000 { | 131 | uart1: uart@17000000 { |
103 | compatible = "arm,pl010", "arm,primecell"; | 132 | compatible = "arm,pl010", "arm,primecell"; |
104 | arm,primecell-periphid = <0x00041010>; | 133 | arm,primecell-periphid = <0x00041010>; |
134 | clocks = <&uartclk>, <&pclk>; | ||
135 | clock-names = "uartclk", "apb_pclk"; | ||
105 | }; | 136 | }; |
106 | 137 | ||
107 | kmi0: kmi@18000000 { | 138 | kmi0: kmi@18000000 { |
108 | compatible = "arm,pl050", "arm,primecell"; | 139 | compatible = "arm,pl050", "arm,primecell"; |
109 | arm,primecell-periphid = <0x00041050>; | 140 | arm,primecell-periphid = <0x00041050>; |
141 | clocks = <&xtal24mhz>, <&pclk>; | ||
142 | clock-names = "KMIREFCLK", "apb_pclk"; | ||
110 | }; | 143 | }; |
111 | 144 | ||
112 | kmi1: kmi@19000000 { | 145 | kmi1: kmi@19000000 { |
113 | compatible = "arm,pl050", "arm,primecell"; | 146 | compatible = "arm,pl050", "arm,primecell"; |
114 | arm,primecell-periphid = <0x00041050>; | 147 | arm,primecell-periphid = <0x00041050>; |
148 | clocks = <&xtal24mhz>, <&pclk>; | ||
149 | clock-names = "KMIREFCLK", "apb_pclk"; | ||
115 | }; | 150 | }; |
116 | }; | 151 | }; |
117 | }; | 152 | }; |
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts index a21c17de9a5e..d43f15b4f79a 100644 --- a/arch/arm/boot/dts/integratorcp.dts +++ b/arch/arm/boot/dts/integratorcp.dts | |||
@@ -13,25 +13,107 @@ | |||
13 | bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; | 13 | bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; |
14 | }; | 14 | }; |
15 | 15 | ||
16 | /* | ||
17 | * The Integrator/CP overall clocking architecture can be found in | ||
18 | * ARM DUI 0184B page 7-28 "Integrator/CP922T system clocks" which | ||
19 | * appear to illustrate the layout used in most configurations. | ||
20 | */ | ||
21 | |||
22 | /* The codec chrystal operates at 24.576 MHz */ | ||
23 | xtal_codec: xtal24.576@24.576M { | ||
24 | #clock-cells = <0>; | ||
25 | compatible = "fixed-clock"; | ||
26 | clock-frequency = <24576000>; | ||
27 | }; | ||
28 | |||
29 | /* The chrystal is divided by 2 by the codec for the AACI bit clock */ | ||
30 | aaci_bitclk: aaci_bitclk@12.288M { | ||
31 | #clock-cells = <0>; | ||
32 | compatible = "fixed-factor-clock"; | ||
33 | clock-div = <2>; | ||
34 | clock-mult = <1>; | ||
35 | clocks = <&xtal_codec>; | ||
36 | }; | ||
37 | |||
38 | /* This is a 25MHz chrystal on the base board */ | ||
39 | xtal25mhz: xtal25mhz@25M { | ||
40 | #clock-cells = <0>; | ||
41 | compatible = "fixed-clock"; | ||
42 | clock-frequency = <25000000>; | ||
43 | }; | ||
44 | |||
45 | /* The UART clock is 14.74 MHz divided from 25MHz by an ICS525 */ | ||
46 | uartclk: uartclk@14.74M { | ||
47 | #clock-cells = <0>; | ||
48 | compatible = "fixed-clock"; | ||
49 | clock-frequency = <14745600>; | ||
50 | }; | ||
51 | |||
52 | /* Actually sysclk I think */ | ||
53 | pclk: pclk@0 { | ||
54 | #clock-cells = <0>; | ||
55 | compatible = "fixed-clock"; | ||
56 | clock-frequency = <0>; | ||
57 | }; | ||
58 | |||
59 | core-module@10000000 { | ||
60 | /* 24 MHz chrystal on the core module */ | ||
61 | xtal24mhz: xtal24mhz@24M { | ||
62 | #clock-cells = <0>; | ||
63 | compatible = "fixed-clock"; | ||
64 | clock-frequency = <24000000>; | ||
65 | }; | ||
66 | |||
67 | /* | ||
68 | * External oscillator on the core module, usually used | ||
69 | * to drive video circuitry. Driven from the 24MHz clock. | ||
70 | */ | ||
71 | auxosc: cm_aux_osc@25M { | ||
72 | #clock-cells = <0>; | ||
73 | compatible = "arm,integrator-cm-auxosc"; | ||
74 | clocks = <&xtal24mhz>; | ||
75 | }; | ||
76 | |||
77 | /* The KMI clock is the 24 MHz oscillator divided to 8MHz */ | ||
78 | kmiclk: kmiclk@1M { | ||
79 | #clock-cells = <0>; | ||
80 | compatible = "fixed-factor-clock"; | ||
81 | clock-div = <3>; | ||
82 | clock-mult = <1>; | ||
83 | clocks = <&xtal24mhz>; | ||
84 | }; | ||
85 | |||
86 | /* The timer clock is the 24 MHz oscillator divided to 1MHz */ | ||
87 | timclk: timclk@1M { | ||
88 | #clock-cells = <0>; | ||
89 | compatible = "fixed-factor-clock"; | ||
90 | clock-div = <24>; | ||
91 | clock-mult = <1>; | ||
92 | clocks = <&xtal24mhz>; | ||
93 | }; | ||
94 | }; | ||
95 | |||
16 | syscon { | 96 | syscon { |
17 | compatible = "arm,integrator-cp-syscon"; | 97 | compatible = "arm,integrator-cp-syscon"; |
18 | reg = <0xcb000000 0x100>; | 98 | reg = <0xcb000000 0x100>; |
19 | }; | 99 | }; |
20 | 100 | ||
21 | timer0: timer@13000000 { | 101 | timer0: timer@13000000 { |
22 | /* TIMER0 runs @ 25MHz */ | 102 | /* TIMER0 runs directly on the 25MHz chrystal */ |
23 | compatible = "arm,integrator-cp-timer"; | 103 | compatible = "arm,integrator-cp-timer"; |
24 | status = "disabled"; | 104 | clocks = <&xtal25mhz>; |
25 | }; | 105 | }; |
26 | 106 | ||
27 | timer1: timer@13000100 { | 107 | timer1: timer@13000100 { |
28 | /* TIMER1 runs @ 1MHz */ | 108 | /* TIMER1 runs @ 1MHz */ |
29 | compatible = "arm,integrator-cp-timer"; | 109 | compatible = "arm,integrator-cp-timer"; |
110 | clocks = <&timclk>; | ||
30 | }; | 111 | }; |
31 | 112 | ||
32 | timer2: timer@13000200 { | 113 | timer2: timer@13000200 { |
33 | /* TIMER2 runs @ 1MHz */ | 114 | /* TIMER2 runs @ 1MHz */ |
34 | compatible = "arm,integrator-cp-timer"; | 115 | compatible = "arm,integrator-cp-timer"; |
116 | clocks = <&timclk>; | ||
35 | }; | 117 | }; |
36 | 118 | ||
37 | pic: pic@14000000 { | 119 | pic: pic@14000000 { |
@@ -74,22 +156,32 @@ | |||
74 | */ | 156 | */ |
75 | rtc@15000000 { | 157 | rtc@15000000 { |
76 | compatible = "arm,pl031", "arm,primecell"; | 158 | compatible = "arm,pl031", "arm,primecell"; |
159 | clocks = <&pclk>; | ||
160 | clock-names = "apb_pclk"; | ||
77 | }; | 161 | }; |
78 | 162 | ||
79 | uart@16000000 { | 163 | uart@16000000 { |
80 | compatible = "arm,pl011", "arm,primecell"; | 164 | compatible = "arm,pl011", "arm,primecell"; |
165 | clocks = <&uartclk>, <&pclk>; | ||
166 | clock-names = "uartclk", "apb_pclk"; | ||
81 | }; | 167 | }; |
82 | 168 | ||
83 | uart@17000000 { | 169 | uart@17000000 { |
84 | compatible = "arm,pl011", "arm,primecell"; | 170 | compatible = "arm,pl011", "arm,primecell"; |
171 | clocks = <&uartclk>, <&pclk>; | ||
172 | clock-names = "uartclk", "apb_pclk"; | ||
85 | }; | 173 | }; |
86 | 174 | ||
87 | kmi@18000000 { | 175 | kmi@18000000 { |
88 | compatible = "arm,pl050", "arm,primecell"; | 176 | compatible = "arm,pl050", "arm,primecell"; |
177 | clocks = <&kmiclk>, <&pclk>; | ||
178 | clock-names = "KMIREFCLK", "apb_pclk"; | ||
89 | }; | 179 | }; |
90 | 180 | ||
91 | kmi@19000000 { | 181 | kmi@19000000 { |
92 | compatible = "arm,pl050", "arm,primecell"; | 182 | compatible = "arm,pl050", "arm,primecell"; |
183 | clocks = <&kmiclk>, <&pclk>; | ||
184 | clock-names = "KMIREFCLK", "apb_pclk"; | ||
93 | }; | 185 | }; |
94 | 186 | ||
95 | /* | 187 | /* |
@@ -100,18 +192,24 @@ | |||
100 | reg = <0x1c000000 0x1000>; | 192 | reg = <0x1c000000 0x1000>; |
101 | interrupts = <23 24>; | 193 | interrupts = <23 24>; |
102 | max-frequency = <515633>; | 194 | max-frequency = <515633>; |
195 | clocks = <&uartclk>, <&pclk>; | ||
196 | clock-names = "mclk", "apb_pclk"; | ||
103 | }; | 197 | }; |
104 | 198 | ||
105 | aaci@1d000000 { | 199 | aaci@1d000000 { |
106 | compatible = "arm,pl041", "arm,primecell"; | 200 | compatible = "arm,pl041", "arm,primecell"; |
107 | reg = <0x1d000000 0x1000>; | 201 | reg = <0x1d000000 0x1000>; |
108 | interrupts = <25>; | 202 | interrupts = <25>; |
203 | clocks = <&pclk>; | ||
204 | clock-names = "apb_pclk"; | ||
109 | }; | 205 | }; |
110 | 206 | ||
111 | clcd@c0000000 { | 207 | clcd@c0000000 { |
112 | compatible = "arm,pl110", "arm,primecell"; | 208 | compatible = "arm,pl110", "arm,primecell"; |
113 | reg = <0xC0000000 0x1000>; | 209 | reg = <0xC0000000 0x1000>; |
114 | interrupts = <22>; | 210 | interrupts = <22>; |
211 | clocks = <&auxosc>, <&pclk>; | ||
212 | clock-names = "clcd", "apb_pclk"; | ||
115 | }; | 213 | }; |
116 | }; | 214 | }; |
117 | }; | 215 | }; |
diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts index 68a72f5507b9..169bad90dac9 100644 --- a/arch/arm/boot/dts/qcom-msm8660-surf.dts +++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts | |||
@@ -1,63 +1,6 @@ | |||
1 | /dts-v1/; | 1 | #include "qcom-msm8660.dtsi" |
2 | |||
3 | /include/ "skeleton.dtsi" | ||
4 | |||
5 | #include <dt-bindings/clock/qcom,gcc-msm8660.h> | ||
6 | 2 | ||
7 | / { | 3 | / { |
8 | model = "Qualcomm MSM8660 SURF"; | 4 | model = "Qualcomm MSM8660 SURF"; |
9 | compatible = "qcom,msm8660-surf", "qcom,msm8660"; | 5 | compatible = "qcom,msm8660-surf", "qcom,msm8660"; |
10 | interrupt-parent = <&intc>; | ||
11 | |||
12 | intc: interrupt-controller@2080000 { | ||
13 | compatible = "qcom,msm-8660-qgic"; | ||
14 | interrupt-controller; | ||
15 | #interrupt-cells = <3>; | ||
16 | reg = < 0x02080000 0x1000 >, | ||
17 | < 0x02081000 0x1000 >; | ||
18 | }; | ||
19 | |||
20 | timer@2000000 { | ||
21 | compatible = "qcom,scss-timer", "qcom,msm-timer"; | ||
22 | interrupts = <1 0 0x301>, | ||
23 | <1 1 0x301>, | ||
24 | <1 2 0x301>; | ||
25 | reg = <0x02000000 0x100>; | ||
26 | clock-frequency = <27000000>, | ||
27 | <32768>; | ||
28 | cpu-offset = <0x40000>; | ||
29 | }; | ||
30 | |||
31 | msmgpio: gpio@800000 { | ||
32 | compatible = "qcom,msm-gpio"; | ||
33 | reg = <0x00800000 0x4000>; | ||
34 | gpio-controller; | ||
35 | #gpio-cells = <2>; | ||
36 | ngpio = <173>; | ||
37 | interrupts = <0 16 0x4>; | ||
38 | interrupt-controller; | ||
39 | #interrupt-cells = <2>; | ||
40 | }; | ||
41 | |||
42 | gcc: clock-controller@900000 { | ||
43 | compatible = "qcom,gcc-msm8660"; | ||
44 | #clock-cells = <1>; | ||
45 | #reset-cells = <1>; | ||
46 | reg = <0x900000 0x4000>; | ||
47 | }; | ||
48 | |||
49 | serial@19c40000 { | ||
50 | compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; | ||
51 | reg = <0x19c40000 0x1000>, | ||
52 | <0x19c00000 0x1000>; | ||
53 | interrupts = <0 195 0x0>; | ||
54 | clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>; | ||
55 | clock-names = "core", "iface"; | ||
56 | }; | ||
57 | |||
58 | qcom,ssbi@500000 { | ||
59 | compatible = "qcom,ssbi"; | ||
60 | reg = <0x500000 0x1000>; | ||
61 | qcom,controller-type = "pmic-arbiter"; | ||
62 | }; | ||
63 | }; | 6 | }; |
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi new file mode 100644 index 000000000000..69d6c4edea30 --- /dev/null +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi | |||
@@ -0,0 +1,63 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "skeleton.dtsi" | ||
4 | |||
5 | #include <dt-bindings/clock/qcom,gcc-msm8660.h> | ||
6 | |||
7 | / { | ||
8 | model = "Qualcomm MSM8660"; | ||
9 | compatible = "qcom,msm8660"; | ||
10 | interrupt-parent = <&intc>; | ||
11 | |||
12 | intc: interrupt-controller@2080000 { | ||
13 | compatible = "qcom,msm-8660-qgic"; | ||
14 | interrupt-controller; | ||
15 | #interrupt-cells = <3>; | ||
16 | reg = < 0x02080000 0x1000 >, | ||
17 | < 0x02081000 0x1000 >; | ||
18 | }; | ||
19 | |||
20 | timer@2000000 { | ||
21 | compatible = "qcom,scss-timer", "qcom,msm-timer"; | ||
22 | interrupts = <1 0 0x301>, | ||
23 | <1 1 0x301>, | ||
24 | <1 2 0x301>; | ||
25 | reg = <0x02000000 0x100>; | ||
26 | clock-frequency = <27000000>, | ||
27 | <32768>; | ||
28 | cpu-offset = <0x40000>; | ||
29 | }; | ||
30 | |||
31 | msmgpio: gpio@800000 { | ||
32 | compatible = "qcom,msm-gpio"; | ||
33 | reg = <0x00800000 0x4000>; | ||
34 | gpio-controller; | ||
35 | #gpio-cells = <2>; | ||
36 | ngpio = <173>; | ||
37 | interrupts = <0 16 0x4>; | ||
38 | interrupt-controller; | ||
39 | #interrupt-cells = <2>; | ||
40 | }; | ||
41 | |||
42 | gcc: clock-controller@900000 { | ||
43 | compatible = "qcom,gcc-msm8660"; | ||
44 | #clock-cells = <1>; | ||
45 | #reset-cells = <1>; | ||
46 | reg = <0x900000 0x4000>; | ||
47 | }; | ||
48 | |||
49 | serial@19c40000 { | ||
50 | compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; | ||
51 | reg = <0x19c40000 0x1000>, | ||
52 | <0x19c00000 0x1000>; | ||
53 | interrupts = <0 195 0x0>; | ||
54 | clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>; | ||
55 | clock-names = "core", "iface"; | ||
56 | }; | ||
57 | |||
58 | qcom,ssbi@500000 { | ||
59 | compatible = "qcom,ssbi"; | ||
60 | reg = <0x500000 0x1000>; | ||
61 | qcom,controller-type = "pmic-arbiter"; | ||
62 | }; | ||
63 | }; | ||
diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts index 7c30de4fa302..a58fb88315f6 100644 --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts | |||
@@ -1,70 +1,6 @@ | |||
1 | /dts-v1/; | 1 | #include "qcom-msm8960.dtsi" |
2 | |||
3 | /include/ "skeleton.dtsi" | ||
4 | |||
5 | #include <dt-bindings/clock/qcom,gcc-msm8960.h> | ||
6 | 2 | ||
7 | / { | 3 | / { |
8 | model = "Qualcomm MSM8960 CDP"; | 4 | model = "Qualcomm MSM8960 CDP"; |
9 | compatible = "qcom,msm8960-cdp", "qcom,msm8960"; | 5 | compatible = "qcom,msm8960-cdp", "qcom,msm8960"; |
10 | interrupt-parent = <&intc>; | ||
11 | |||
12 | intc: interrupt-controller@2000000 { | ||
13 | compatible = "qcom,msm-qgic2"; | ||
14 | interrupt-controller; | ||
15 | #interrupt-cells = <3>; | ||
16 | reg = < 0x02000000 0x1000 >, | ||
17 | < 0x02002000 0x1000 >; | ||
18 | }; | ||
19 | |||
20 | timer@200a000 { | ||
21 | compatible = "qcom,kpss-timer", "qcom,msm-timer"; | ||
22 | interrupts = <1 1 0x301>, | ||
23 | <1 2 0x301>, | ||
24 | <1 3 0x301>; | ||
25 | reg = <0x0200a000 0x100>; | ||
26 | clock-frequency = <27000000>, | ||
27 | <32768>; | ||
28 | cpu-offset = <0x80000>; | ||
29 | }; | ||
30 | |||
31 | msmgpio: gpio@800000 { | ||
32 | compatible = "qcom,msm-gpio"; | ||
33 | gpio-controller; | ||
34 | #gpio-cells = <2>; | ||
35 | ngpio = <150>; | ||
36 | interrupts = <0 16 0x4>; | ||
37 | interrupt-controller; | ||
38 | #interrupt-cells = <2>; | ||
39 | reg = <0x800000 0x4000>; | ||
40 | }; | ||
41 | |||
42 | gcc: clock-controller@900000 { | ||
43 | compatible = "qcom,gcc-msm8960"; | ||
44 | #clock-cells = <1>; | ||
45 | #reset-cells = <1>; | ||
46 | reg = <0x900000 0x4000>; | ||
47 | }; | ||
48 | |||
49 | clock-controller@4000000 { | ||
50 | compatible = "qcom,mmcc-msm8960"; | ||
51 | reg = <0x4000000 0x1000>; | ||
52 | #clock-cells = <1>; | ||
53 | #reset-cells = <1>; | ||
54 | }; | ||
55 | |||
56 | serial@16440000 { | ||
57 | compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; | ||
58 | reg = <0x16440000 0x1000>, | ||
59 | <0x16400000 0x1000>; | ||
60 | interrupts = <0 154 0x0>; | ||
61 | clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>; | ||
62 | clock-names = "core", "iface"; | ||
63 | }; | ||
64 | |||
65 | qcom,ssbi@500000 { | ||
66 | compatible = "qcom,ssbi"; | ||
67 | reg = <0x500000 0x1000>; | ||
68 | qcom,controller-type = "pmic-arbiter"; | ||
69 | }; | ||
70 | }; | 6 | }; |
diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi new file mode 100644 index 000000000000..ff002826552a --- /dev/null +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi | |||
@@ -0,0 +1,70 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "skeleton.dtsi" | ||
4 | |||
5 | #include <dt-bindings/clock/qcom,gcc-msm8960.h> | ||
6 | |||
7 | / { | ||
8 | model = "Qualcomm MSM8960"; | ||
9 | compatible = "qcom,msm8960"; | ||
10 | interrupt-parent = <&intc>; | ||
11 | |||
12 | intc: interrupt-controller@2000000 { | ||
13 | compatible = "qcom,msm-qgic2"; | ||
14 | interrupt-controller; | ||
15 | #interrupt-cells = <3>; | ||
16 | reg = < 0x02000000 0x1000 >, | ||
17 | < 0x02002000 0x1000 >; | ||
18 | }; | ||
19 | |||
20 | timer@200a000 { | ||
21 | compatible = "qcom,kpss-timer", "qcom,msm-timer"; | ||
22 | interrupts = <1 1 0x301>, | ||
23 | <1 2 0x301>, | ||
24 | <1 3 0x301>; | ||
25 | reg = <0x0200a000 0x100>; | ||
26 | clock-frequency = <27000000>, | ||
27 | <32768>; | ||
28 | cpu-offset = <0x80000>; | ||
29 | }; | ||
30 | |||
31 | msmgpio: gpio@800000 { | ||
32 | compatible = "qcom,msm-gpio"; | ||
33 | gpio-controller; | ||
34 | #gpio-cells = <2>; | ||
35 | ngpio = <150>; | ||
36 | interrupts = <0 16 0x4>; | ||
37 | interrupt-controller; | ||
38 | #interrupt-cells = <2>; | ||
39 | reg = <0x800000 0x4000>; | ||
40 | }; | ||
41 | |||
42 | gcc: clock-controller@900000 { | ||
43 | compatible = "qcom,gcc-msm8960"; | ||
44 | #clock-cells = <1>; | ||
45 | #reset-cells = <1>; | ||
46 | reg = <0x900000 0x4000>; | ||
47 | }; | ||
48 | |||
49 | clock-controller@4000000 { | ||
50 | compatible = "qcom,mmcc-msm8960"; | ||
51 | reg = <0x4000000 0x1000>; | ||
52 | #clock-cells = <1>; | ||
53 | #reset-cells = <1>; | ||
54 | }; | ||
55 | |||
56 | serial@16440000 { | ||
57 | compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; | ||
58 | reg = <0x16440000 0x1000>, | ||
59 | <0x16400000 0x1000>; | ||
60 | interrupts = <0 154 0x0>; | ||
61 | clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>; | ||
62 | clock-names = "core", "iface"; | ||
63 | }; | ||
64 | |||
65 | qcom,ssbi@500000 { | ||
66 | compatible = "qcom,ssbi"; | ||
67 | reg = <0x500000 0x1000>; | ||
68 | qcom,controller-type = "pmic-arbiter"; | ||
69 | }; | ||
70 | }; | ||
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c index 53c6a26b633d..fd6bff0c5b96 100644 --- a/arch/arm/common/timer-sp.c +++ b/arch/arm/common/timer-sp.c | |||
@@ -271,10 +271,14 @@ static void __init integrator_cp_of_init(struct device_node *np) | |||
271 | void __iomem *base; | 271 | void __iomem *base; |
272 | int irq; | 272 | int irq; |
273 | const char *name = of_get_property(np, "compatible", NULL); | 273 | const char *name = of_get_property(np, "compatible", NULL); |
274 | struct clk *clk; | ||
274 | 275 | ||
275 | base = of_iomap(np, 0); | 276 | base = of_iomap(np, 0); |
276 | if (WARN_ON(!base)) | 277 | if (WARN_ON(!base)) |
277 | return; | 278 | return; |
279 | clk = of_clk_get(np, 0); | ||
280 | if (WARN_ON(IS_ERR(clk))) | ||
281 | return; | ||
278 | 282 | ||
279 | /* Ensure timer is disabled */ | 283 | /* Ensure timer is disabled */ |
280 | writel(0, base + TIMER_CTRL); | 284 | writel(0, base + TIMER_CTRL); |
@@ -283,13 +287,13 @@ static void __init integrator_cp_of_init(struct device_node *np) | |||
283 | goto err; | 287 | goto err; |
284 | 288 | ||
285 | if (!init_count) | 289 | if (!init_count) |
286 | sp804_clocksource_init(base, name); | 290 | __sp804_clocksource_and_sched_clock_init(base, name, clk, 0); |
287 | else { | 291 | else { |
288 | irq = irq_of_parse_and_map(np, 0); | 292 | irq = irq_of_parse_and_map(np, 0); |
289 | if (irq <= 0) | 293 | if (irq <= 0) |
290 | goto err; | 294 | goto err; |
291 | 295 | ||
292 | sp804_clockevents_init(base, irq, name); | 296 | __sp804_clockevents_init(base, irq, clk, name); |
293 | } | 297 | } |
294 | 298 | ||
295 | init_count++; | 299 | init_count++; |
diff --git a/arch/arm/mach-davinci/aemif.c b/arch/arm/mach-davinci/aemif.c index f091a9010c2f..ff8b7e76b6e9 100644 --- a/arch/arm/mach-davinci/aemif.c +++ b/arch/arm/mach-davinci/aemif.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/time.h> | 16 | #include <linux/time.h> |
17 | 17 | ||
18 | #include <linux/platform_data/mtd-davinci-aemif.h> | 18 | #include <linux/platform_data/mtd-davinci-aemif.h> |
19 | #include <linux/platform_data/mtd-davinci.h> | ||
19 | 20 | ||
20 | /* Timing value configuration */ | 21 | /* Timing value configuration */ |
21 | 22 | ||
@@ -43,6 +44,17 @@ | |||
43 | WSTROBE(WSTROBE_MAX) | \ | 44 | WSTROBE(WSTROBE_MAX) | \ |
44 | WSETUP(WSETUP_MAX)) | 45 | WSETUP(WSETUP_MAX)) |
45 | 46 | ||
47 | static inline unsigned int davinci_aemif_readl(void __iomem *base, int offset) | ||
48 | { | ||
49 | return readl_relaxed(base + offset); | ||
50 | } | ||
51 | |||
52 | static inline void davinci_aemif_writel(void __iomem *base, | ||
53 | int offset, unsigned long value) | ||
54 | { | ||
55 | writel_relaxed(value, base + offset); | ||
56 | } | ||
57 | |||
46 | /* | 58 | /* |
47 | * aemif_calc_rate - calculate timing data. | 59 | * aemif_calc_rate - calculate timing data. |
48 | * @wanted: The cycle time needed in nanoseconds. | 60 | * @wanted: The cycle time needed in nanoseconds. |
@@ -76,6 +88,7 @@ static int aemif_calc_rate(int wanted, unsigned long clk, int max) | |||
76 | * @t: timing values to be progammed | 88 | * @t: timing values to be progammed |
77 | * @base: The virtual base address of the AEMIF interface | 89 | * @base: The virtual base address of the AEMIF interface |
78 | * @cs: chip-select to program the timing values for | 90 | * @cs: chip-select to program the timing values for |
91 | * @clkrate: the AEMIF clkrate | ||
79 | * | 92 | * |
80 | * This function programs the given timing values (in real clock) into the | 93 | * This function programs the given timing values (in real clock) into the |
81 | * AEMIF registers taking the AEMIF clock into account. | 94 | * AEMIF registers taking the AEMIF clock into account. |
@@ -86,24 +99,17 @@ static int aemif_calc_rate(int wanted, unsigned long clk, int max) | |||
86 | * | 99 | * |
87 | * Returns 0 on success, else negative errno. | 100 | * Returns 0 on success, else negative errno. |
88 | */ | 101 | */ |
89 | int davinci_aemif_setup_timing(struct davinci_aemif_timing *t, | 102 | static int davinci_aemif_setup_timing(struct davinci_aemif_timing *t, |
90 | void __iomem *base, unsigned cs) | 103 | void __iomem *base, unsigned cs, |
104 | unsigned long clkrate) | ||
91 | { | 105 | { |
92 | unsigned set, val; | 106 | unsigned set, val; |
93 | int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup; | 107 | int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup; |
94 | unsigned offset = A1CR_OFFSET + cs * 4; | 108 | unsigned offset = A1CR_OFFSET + cs * 4; |
95 | struct clk *aemif_clk; | ||
96 | unsigned long clkrate; | ||
97 | 109 | ||
98 | if (!t) | 110 | if (!t) |
99 | return 0; /* Nothing to do */ | 111 | return 0; /* Nothing to do */ |
100 | 112 | ||
101 | aemif_clk = clk_get(NULL, "aemif"); | ||
102 | if (IS_ERR(aemif_clk)) | ||
103 | return PTR_ERR(aemif_clk); | ||
104 | |||
105 | clkrate = clk_get_rate(aemif_clk); | ||
106 | |||
107 | clkrate /= 1000; /* turn clock into kHz for ease of use */ | 113 | clkrate /= 1000; /* turn clock into kHz for ease of use */ |
108 | 114 | ||
109 | ta = aemif_calc_rate(t->ta, clkrate, TA_MAX); | 115 | ta = aemif_calc_rate(t->ta, clkrate, TA_MAX); |
@@ -130,4 +136,83 @@ int davinci_aemif_setup_timing(struct davinci_aemif_timing *t, | |||
130 | 136 | ||
131 | return 0; | 137 | return 0; |
132 | } | 138 | } |
133 | EXPORT_SYMBOL(davinci_aemif_setup_timing); | 139 | |
140 | /** | ||
141 | * davinci_aemif_setup - setup AEMIF interface by davinci_nand_pdata | ||
142 | * @pdev - link to platform device to setup settings for | ||
143 | * | ||
144 | * This function does not use any locking while programming the AEMIF | ||
145 | * because it is expected that there is only one user of a given | ||
146 | * chip-select. | ||
147 | * | ||
148 | * Returns 0 on success, else negative errno. | ||
149 | */ | ||
150 | int davinci_aemif_setup(struct platform_device *pdev) | ||
151 | { | ||
152 | struct davinci_nand_pdata *pdata = dev_get_platdata(&pdev->dev); | ||
153 | uint32_t val; | ||
154 | unsigned long clkrate; | ||
155 | struct resource *res; | ||
156 | void __iomem *base; | ||
157 | struct clk *clk; | ||
158 | int ret = 0; | ||
159 | |||
160 | clk = clk_get(&pdev->dev, "aemif"); | ||
161 | if (IS_ERR(clk)) { | ||
162 | ret = PTR_ERR(clk); | ||
163 | dev_dbg(&pdev->dev, "unable to get AEMIF clock, err %d\n", ret); | ||
164 | return ret; | ||
165 | } | ||
166 | |||
167 | ret = clk_prepare_enable(clk); | ||
168 | if (ret < 0) { | ||
169 | dev_dbg(&pdev->dev, "unable to enable AEMIF clock, err %d\n", | ||
170 | ret); | ||
171 | goto err_put; | ||
172 | } | ||
173 | |||
174 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | ||
175 | if (!res) { | ||
176 | dev_err(&pdev->dev, "cannot get IORESOURCE_MEM\n"); | ||
177 | ret = -ENOMEM; | ||
178 | goto err; | ||
179 | } | ||
180 | |||
181 | base = ioremap(res->start, resource_size(res)); | ||
182 | if (!base) { | ||
183 | dev_err(&pdev->dev, "ioremap failed for resource %pR\n", res); | ||
184 | ret = -ENOMEM; | ||
185 | goto err; | ||
186 | } | ||
187 | |||
188 | /* | ||
189 | * Setup Async configuration register in case we did not boot | ||
190 | * from NAND and so bootloader did not bother to set it up. | ||
191 | */ | ||
192 | val = davinci_aemif_readl(base, A1CR_OFFSET + pdev->id * 4); | ||
193 | /* | ||
194 | * Extended Wait is not valid and Select Strobe mode is not | ||
195 | * used | ||
196 | */ | ||
197 | val &= ~(ACR_ASIZE_MASK | ACR_EW_MASK | ACR_SS_MASK); | ||
198 | if (pdata->options & NAND_BUSWIDTH_16) | ||
199 | val |= 0x1; | ||
200 | |||
201 | davinci_aemif_writel(base, A1CR_OFFSET + pdev->id * 4, val); | ||
202 | |||
203 | clkrate = clk_get_rate(clk); | ||
204 | |||
205 | if (pdata->timing) | ||
206 | ret = davinci_aemif_setup_timing(pdata->timing, base, pdev->id, | ||
207 | clkrate); | ||
208 | |||
209 | if (ret < 0) | ||
210 | dev_dbg(&pdev->dev, "NAND timing values setup fail\n"); | ||
211 | |||
212 | iounmap(base); | ||
213 | err: | ||
214 | clk_disable_unprepare(clk); | ||
215 | err_put: | ||
216 | clk_put(clk); | ||
217 | return ret; | ||
218 | } | ||
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index d1f45af7a530..5623131c4f0b 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c | |||
@@ -419,6 +419,9 @@ static inline void da830_evm_init_nand(int mux_mode) | |||
419 | if (ret) | 419 | if (ret) |
420 | pr_warning("da830_evm_init: NAND device not registered.\n"); | 420 | pr_warning("da830_evm_init: NAND device not registered.\n"); |
421 | 421 | ||
422 | if (davinci_aemif_setup(&da830_evm_nand_device)) | ||
423 | pr_warn("%s: Cannot configure AEMIF.\n", __func__); | ||
424 | |||
422 | gpio_direction_output(mux_mode, 1); | 425 | gpio_direction_output(mux_mode, 1); |
423 | } | 426 | } |
424 | #else | 427 | #else |
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index e0af0eccde8f..234c5bb091f5 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
@@ -358,6 +358,9 @@ static inline void da850_evm_setup_nor_nand(void) | |||
358 | 358 | ||
359 | platform_add_devices(da850_evm_devices, | 359 | platform_add_devices(da850_evm_devices, |
360 | ARRAY_SIZE(da850_evm_devices)); | 360 | ARRAY_SIZE(da850_evm_devices)); |
361 | |||
362 | if (davinci_aemif_setup(&da850_evm_nandflash_device)) | ||
363 | pr_warn("%s: Cannot configure AEMIF.\n", __func__); | ||
361 | } | 364 | } |
362 | } | 365 | } |
363 | 366 | ||
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 987605b78556..5602957b67d7 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -778,6 +778,11 @@ static __init void davinci_evm_init(void) | |||
778 | /* only one device will be jumpered and detected */ | 778 | /* only one device will be jumpered and detected */ |
779 | if (HAS_NAND) { | 779 | if (HAS_NAND) { |
780 | platform_device_register(&davinci_evm_nandflash_device); | 780 | platform_device_register(&davinci_evm_nandflash_device); |
781 | |||
782 | if (davinci_aemif_setup(&davinci_evm_nandflash_device)) | ||
783 | pr_warn("%s: Cannot configure AEMIF.\n", | ||
784 | __func__); | ||
785 | |||
781 | evm_leds[7].default_trigger = "nand-disk"; | 786 | evm_leds[7].default_trigger = "nand-disk"; |
782 | if (HAS_NOR) | 787 | if (HAS_NOR) |
783 | pr_warning("WARNING: both NAND and NOR flash " | 788 | pr_warning("WARNING: both NAND and NOR flash " |
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 13d0801fd6b1..ae129bc49273 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
@@ -805,6 +805,9 @@ static __init void evm_init(void) | |||
805 | 805 | ||
806 | platform_device_register(&davinci_nand_device); | 806 | platform_device_register(&davinci_nand_device); |
807 | 807 | ||
808 | if (davinci_aemif_setup(&davinci_nand_device)) | ||
809 | pr_warn("%s: Cannot configure AEMIF.\n", __func__); | ||
810 | |||
808 | dm646x_init_edma(dm646x_edma_rsv); | 811 | dm646x_init_edma(dm646x_edma_rsv); |
809 | 812 | ||
810 | if (HAS_ATA) | 813 | if (HAS_ATA) |
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index 7aa105b1fd0f..96fc00a167f5 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <mach/cp_intc.h> | 27 | #include <mach/cp_intc.h> |
28 | #include <mach/da8xx.h> | 28 | #include <mach/da8xx.h> |
29 | #include <linux/platform_data/mtd-davinci.h> | 29 | #include <linux/platform_data/mtd-davinci.h> |
30 | #include <linux/platform_data/mtd-davinci-aemif.h> | ||
30 | #include <mach/mux.h> | 31 | #include <mach/mux.h> |
31 | #include <linux/platform_data/spi-davinci.h> | 32 | #include <linux/platform_data/spi-davinci.h> |
32 | 33 | ||
@@ -432,6 +433,9 @@ static void __init mityomapl138_setup_nand(void) | |||
432 | { | 433 | { |
433 | platform_add_devices(mityomapl138_devices, | 434 | platform_add_devices(mityomapl138_devices, |
434 | ARRAY_SIZE(mityomapl138_devices)); | 435 | ARRAY_SIZE(mityomapl138_devices)); |
436 | |||
437 | if (davinci_aemif_setup(&mityomapl138_nandflash_device)) | ||
438 | pr_warn("%s: Cannot configure AEMIF.\n", __func__); | ||
435 | } | 439 | } |
436 | 440 | ||
437 | static const short mityomap_mii_pins[] = { | 441 | static const short mityomap_mii_pins[] = { |
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h index 5362df3df89f..f4a5b34489b7 100644 --- a/arch/arm/mach-dove/include/mach/bridge-regs.h +++ b/arch/arm/mach-dove/include/mach/bridge-regs.h | |||
@@ -21,6 +21,7 @@ | |||
21 | #define CPU_CTRL_PCIE1_LINK 0x00000008 | 21 | #define CPU_CTRL_PCIE1_LINK 0x00000008 |
22 | 22 | ||
23 | #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) | 23 | #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) |
24 | #define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108) | ||
24 | #define SOFT_RESET_OUT_EN 0x00000004 | 25 | #define SOFT_RESET_OUT_EN 0x00000004 |
25 | 26 | ||
26 | #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) | 27 | #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) |
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index abeff25532ab..6e8b0e10b420 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig | |||
@@ -30,6 +30,9 @@ config ARCH_CINTEGRATOR | |||
30 | config INTEGRATOR_IMPD1 | 30 | config INTEGRATOR_IMPD1 |
31 | tristate "Include support for Integrator/IM-PD1" | 31 | tristate "Include support for Integrator/IM-PD1" |
32 | depends on ARCH_INTEGRATOR_AP | 32 | depends on ARCH_INTEGRATOR_AP |
33 | select ARCH_REQUIRE_GPIOLIB | ||
34 | select ARM_VIC | ||
35 | select GPIO_PL061 if GPIOLIB | ||
33 | help | 36 | help |
34 | The IM-PD1 is an add-on logic module for the Integrator which | 37 | The IM-PD1 is an add-on logic module for the Integrator which |
35 | allows ARM(R) Ltd PrimeCells to be developed and evaluated. | 38 | allows ARM(R) Ltd PrimeCells to be developed and evaluated. |
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c index 9f82f9dcbb98..d9b784824808 100644 --- a/arch/arm/mach-integrator/impd1.c +++ b/arch/arm/mach-integrator/impd1.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/platform_data/clk-integrator.h> | 24 | #include <linux/platform_data/clk-integrator.h> |
25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
26 | #include <linux/irqchip/arm-vic.h> | ||
26 | 27 | ||
27 | #include <mach/lm.h> | 28 | #include <mach/lm.h> |
28 | #include <mach/impd1.h> | 29 | #include <mach/impd1.h> |
@@ -35,6 +36,7 @@ MODULE_PARM_DESC(lmid, "logic module stack position"); | |||
35 | 36 | ||
36 | struct impd1_module { | 37 | struct impd1_module { |
37 | void __iomem *base; | 38 | void __iomem *base; |
39 | void __iomem *vic_base; | ||
38 | }; | 40 | }; |
39 | 41 | ||
40 | void impd1_tweak_control(struct device *dev, u32 mask, u32 val) | 42 | void impd1_tweak_control(struct device *dev, u32 mask, u32 val) |
@@ -262,9 +264,6 @@ struct impd1_device { | |||
262 | 264 | ||
263 | static struct impd1_device impd1_devs[] = { | 265 | static struct impd1_device impd1_devs[] = { |
264 | { | 266 | { |
265 | .offset = 0x03000000, | ||
266 | .id = 0x00041190, | ||
267 | }, { | ||
268 | .offset = 0x00100000, | 267 | .offset = 0x00100000, |
269 | .irq = { 1 }, | 268 | .irq = { 1 }, |
270 | .id = 0x00141011, | 269 | .id = 0x00141011, |
@@ -304,46 +303,72 @@ static struct impd1_device impd1_devs[] = { | |||
304 | } | 303 | } |
305 | }; | 304 | }; |
306 | 305 | ||
307 | static int impd1_probe(struct lm_device *dev) | 306 | /* |
307 | * Valid IRQs: 0 thru 9 and 11, 10 unused. | ||
308 | */ | ||
309 | #define IMPD1_VALID_IRQS 0x00000bffU | ||
310 | |||
311 | static int __init impd1_probe(struct lm_device *dev) | ||
308 | { | 312 | { |
309 | struct impd1_module *impd1; | 313 | struct impd1_module *impd1; |
310 | int i, ret; | 314 | int irq_base; |
315 | int i; | ||
311 | 316 | ||
312 | if (dev->id != module_id) | 317 | if (dev->id != module_id) |
313 | return -EINVAL; | 318 | return -EINVAL; |
314 | 319 | ||
315 | if (!request_mem_region(dev->resource.start, SZ_4K, "LM registers")) | 320 | if (!devm_request_mem_region(&dev->dev, dev->resource.start, |
321 | SZ_4K, "LM registers")) | ||
316 | return -EBUSY; | 322 | return -EBUSY; |
317 | 323 | ||
318 | impd1 = kzalloc(sizeof(struct impd1_module), GFP_KERNEL); | 324 | impd1 = devm_kzalloc(&dev->dev, sizeof(struct impd1_module), |
319 | if (!impd1) { | 325 | GFP_KERNEL); |
320 | ret = -ENOMEM; | 326 | if (!impd1) |
321 | goto release_lm; | 327 | return -ENOMEM; |
322 | } | ||
323 | 328 | ||
324 | impd1->base = ioremap(dev->resource.start, SZ_4K); | 329 | impd1->base = devm_ioremap(&dev->dev, dev->resource.start, SZ_4K); |
325 | if (!impd1->base) { | 330 | if (!impd1->base) |
326 | ret = -ENOMEM; | 331 | return -ENOMEM; |
327 | goto free_impd1; | ||
328 | } | ||
329 | 332 | ||
330 | lm_set_drvdata(dev, impd1); | 333 | integrator_impd1_clk_init(impd1->base, dev->id); |
331 | 334 | ||
332 | printk("IM-PD1 found at 0x%08lx\n", | 335 | if (!devm_request_mem_region(&dev->dev, |
333 | (unsigned long)dev->resource.start); | 336 | dev->resource.start + 0x03000000, |
337 | SZ_4K, "VIC")) | ||
338 | return -EBUSY; | ||
334 | 339 | ||
335 | integrator_impd1_clk_init(impd1->base, dev->id); | 340 | impd1->vic_base = devm_ioremap(&dev->dev, |
341 | dev->resource.start + 0x03000000, | ||
342 | SZ_4K); | ||
343 | if (!impd1->vic_base) | ||
344 | return -ENOMEM; | ||
345 | |||
346 | irq_base = vic_init_cascaded(impd1->vic_base, dev->irq, | ||
347 | IMPD1_VALID_IRQS, 0); | ||
348 | |||
349 | lm_set_drvdata(dev, impd1); | ||
350 | |||
351 | dev_info(&dev->dev, "IM-PD1 found at 0x%08lx\n", | ||
352 | (unsigned long)dev->resource.start); | ||
336 | 353 | ||
337 | for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) { | 354 | for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) { |
338 | struct impd1_device *idev = impd1_devs + i; | 355 | struct impd1_device *idev = impd1_devs + i; |
339 | struct amba_device *d; | 356 | struct amba_device *d; |
340 | unsigned long pc_base; | 357 | unsigned long pc_base; |
341 | char devname[32]; | 358 | char devname[32]; |
359 | int irq1 = idev->irq[0]; | ||
360 | int irq2 = idev->irq[1]; | ||
361 | |||
362 | /* Translate IRQs to IM-PD1 local numberspace */ | ||
363 | if (irq1) | ||
364 | irq1 += irq_base; | ||
365 | if (irq2) | ||
366 | irq2 += irq_base; | ||
342 | 367 | ||
343 | pc_base = dev->resource.start + idev->offset; | 368 | pc_base = dev->resource.start + idev->offset; |
344 | snprintf(devname, 32, "lm%x:%5.5lx", dev->id, idev->offset >> 12); | 369 | snprintf(devname, 32, "lm%x:%5.5lx", dev->id, idev->offset >> 12); |
345 | d = amba_ahb_device_add_res(&dev->dev, devname, pc_base, SZ_4K, | 370 | d = amba_ahb_device_add_res(&dev->dev, devname, pc_base, SZ_4K, |
346 | dev->irq, dev->irq, | 371 | irq1, irq2, |
347 | idev->platform_data, idev->id, | 372 | idev->platform_data, idev->id, |
348 | &dev->resource); | 373 | &dev->resource); |
349 | if (IS_ERR(d)) { | 374 | if (IS_ERR(d)) { |
@@ -353,14 +378,6 @@ static int impd1_probe(struct lm_device *dev) | |||
353 | } | 378 | } |
354 | 379 | ||
355 | return 0; | 380 | return 0; |
356 | |||
357 | free_impd1: | ||
358 | if (impd1 && impd1->base) | ||
359 | iounmap(impd1->base); | ||
360 | kfree(impd1); | ||
361 | release_lm: | ||
362 | release_mem_region(dev->resource.start, SZ_4K); | ||
363 | return ret; | ||
364 | } | 381 | } |
365 | 382 | ||
366 | static int impd1_remove_one(struct device *dev, void *data) | 383 | static int impd1_remove_one(struct device *dev, void *data) |
@@ -371,16 +388,10 @@ static int impd1_remove_one(struct device *dev, void *data) | |||
371 | 388 | ||
372 | static void impd1_remove(struct lm_device *dev) | 389 | static void impd1_remove(struct lm_device *dev) |
373 | { | 390 | { |
374 | struct impd1_module *impd1 = lm_get_drvdata(dev); | ||
375 | |||
376 | device_for_each_child(&dev->dev, NULL, impd1_remove_one); | 391 | device_for_each_child(&dev->dev, NULL, impd1_remove_one); |
377 | integrator_impd1_clk_exit(dev->id); | 392 | integrator_impd1_clk_exit(dev->id); |
378 | 393 | ||
379 | lm_set_drvdata(dev, NULL); | 394 | lm_set_drvdata(dev, NULL); |
380 | |||
381 | iounmap(impd1->base); | ||
382 | kfree(impd1); | ||
383 | release_mem_region(dev->resource.start, SZ_4K); | ||
384 | } | 395 | } |
385 | 396 | ||
386 | static struct lm_driver impd1_driver = { | 397 | static struct lm_driver impd1_driver = { |
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 17c0fe627435..fedcd2fab094 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <linux/sys_soc.h> | 42 | #include <linux/sys_soc.h> |
43 | #include <linux/termios.h> | 43 | #include <linux/termios.h> |
44 | #include <linux/sched_clock.h> | 44 | #include <linux/sched_clock.h> |
45 | #include <linux/clk-provider.h> | ||
45 | 46 | ||
46 | #include <mach/hardware.h> | 47 | #include <mach/hardware.h> |
47 | #include <mach/platform.h> | 48 | #include <mach/platform.h> |
@@ -402,10 +403,7 @@ static void __init ap_of_timer_init(void) | |||
402 | struct clk *clk; | 403 | struct clk *clk; |
403 | unsigned long rate; | 404 | unsigned long rate; |
404 | 405 | ||
405 | clk = clk_get_sys("ap_timer", NULL); | 406 | of_clk_init(NULL); |
406 | BUG_ON(IS_ERR(clk)); | ||
407 | clk_prepare_enable(clk); | ||
408 | rate = clk_get_rate(clk); | ||
409 | 407 | ||
410 | err = of_property_read_string(of_aliases, | 408 | err = of_property_read_string(of_aliases, |
411 | "arm,timer-primary", &path); | 409 | "arm,timer-primary", &path); |
@@ -415,6 +413,12 @@ static void __init ap_of_timer_init(void) | |||
415 | base = of_iomap(node, 0); | 413 | base = of_iomap(node, 0); |
416 | if (WARN_ON(!base)) | 414 | if (WARN_ON(!base)) |
417 | return; | 415 | return; |
416 | |||
417 | clk = of_clk_get(node, 0); | ||
418 | BUG_ON(IS_ERR(clk)); | ||
419 | clk_prepare_enable(clk); | ||
420 | rate = clk_get_rate(clk); | ||
421 | |||
418 | writel(0, base + TIMER_CTRL); | 422 | writel(0, base + TIMER_CTRL); |
419 | integrator_clocksource_init(rate, base); | 423 | integrator_clocksource_init(rate, base); |
420 | 424 | ||
@@ -427,6 +431,12 @@ static void __init ap_of_timer_init(void) | |||
427 | if (WARN_ON(!base)) | 431 | if (WARN_ON(!base)) |
428 | return; | 432 | return; |
429 | irq = irq_of_parse_and_map(node, 0); | 433 | irq = irq_of_parse_and_map(node, 0); |
434 | |||
435 | clk = of_clk_get(node, 0); | ||
436 | BUG_ON(IS_ERR(clk)); | ||
437 | clk_prepare_enable(clk); | ||
438 | rate = clk_get_rate(clk); | ||
439 | |||
430 | writel(0, base + TIMER_CTRL); | 440 | writel(0, base + TIMER_CTRL); |
431 | integrator_clockevent_init(rate, base, irq); | 441 | integrator_clockevent_init(rate, base, irq); |
432 | } | 442 | } |
@@ -440,7 +450,6 @@ static void __init ap_init_irq_of(void) | |||
440 | { | 450 | { |
441 | cm_init(); | 451 | cm_init(); |
442 | of_irq_init(fpga_irq_of_match); | 452 | of_irq_init(fpga_irq_of_match); |
443 | integrator_clk_init(false); | ||
444 | } | 453 | } |
445 | 454 | ||
446 | /* For the Device Tree, add in the UART callbacks as AUXDATA */ | 455 | /* For the Device Tree, add in the UART callbacks as AUXDATA */ |
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index a3ef961e4a93..0ad5f60598c8 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <linux/irqchip/versatile-fpga.h> | 23 | #include <linux/irqchip/versatile-fpga.h> |
24 | #include <linux/gfp.h> | 24 | #include <linux/gfp.h> |
25 | #include <linux/mtd/physmap.h> | 25 | #include <linux/mtd/physmap.h> |
26 | #include <linux/platform_data/clk-integrator.h> | ||
27 | #include <linux/of_irq.h> | 26 | #include <linux/of_irq.h> |
28 | #include <linux/of_address.h> | 27 | #include <linux/of_address.h> |
29 | #include <linux/of_platform.h> | 28 | #include <linux/of_platform.h> |
@@ -33,8 +32,6 @@ | |||
33 | #include <mach/platform.h> | 32 | #include <mach/platform.h> |
34 | #include <asm/setup.h> | 33 | #include <asm/setup.h> |
35 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
36 | #include <asm/hardware/arm_timer.h> | ||
37 | #include <asm/hardware/icst.h> | ||
38 | 35 | ||
39 | #include <mach/lm.h> | 36 | #include <mach/lm.h> |
40 | 37 | ||
@@ -43,8 +40,6 @@ | |||
43 | #include <asm/mach/map.h> | 40 | #include <asm/mach/map.h> |
44 | #include <asm/mach/time.h> | 41 | #include <asm/mach/time.h> |
45 | 42 | ||
46 | #include <asm/hardware/timer-sp.h> | ||
47 | |||
48 | #include <plat/clcd.h> | 43 | #include <plat/clcd.h> |
49 | #include <plat/sched_clock.h> | 44 | #include <plat/sched_clock.h> |
50 | 45 | ||
@@ -250,7 +245,6 @@ static void __init intcp_init_irq_of(void) | |||
250 | { | 245 | { |
251 | cm_init(); | 246 | cm_init(); |
252 | of_irq_init(fpga_irq_of_match); | 247 | of_irq_init(fpga_irq_of_match); |
253 | integrator_clk_init(true); | ||
254 | } | 248 | } |
255 | 249 | ||
256 | /* | 250 | /* |
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h index 8b9d1c9ff199..60f64218d6a6 100644 --- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h +++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h | |||
@@ -21,6 +21,7 @@ | |||
21 | #define CPU_RESET 0x00000002 | 21 | #define CPU_RESET 0x00000002 |
22 | 22 | ||
23 | #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) | 23 | #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) |
24 | #define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108) | ||
24 | #define SOFT_RESET_OUT_EN 0x00000004 | 25 | #define SOFT_RESET_OUT_EN 0x00000004 |
25 | 26 | ||
26 | #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) | 27 | #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) |
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index 9625cf378931..a7f959e58c3d 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig | |||
@@ -1,50 +1,9 @@ | |||
1 | config ARCH_MSM | ||
2 | bool | ||
3 | |||
4 | config ARCH_MSM_DT | ||
5 | bool "Qualcomm MSM DT Support" if ARCH_MULTI_V7 | ||
6 | select ARCH_MSM | ||
7 | select ARCH_REQUIRE_GPIOLIB | ||
8 | select CLKSRC_OF | ||
9 | select GENERIC_CLOCKEVENTS | ||
10 | help | ||
11 | Support for Qualcomm's devicetree based MSM systems. | ||
12 | |||
13 | if ARCH_MSM | 1 | if ARCH_MSM |
14 | 2 | ||
15 | menu "Qualcomm MSM SoC Selection" | ||
16 | depends on ARCH_MSM_DT | ||
17 | |||
18 | config ARCH_MSM8X60 | ||
19 | bool "Enable support for MSM8X60" | ||
20 | select ARM_GIC | ||
21 | select CPU_V7 | ||
22 | select HAVE_SMP | ||
23 | select MSM_SCM if SMP | ||
24 | select MSM_TIMER | ||
25 | |||
26 | config ARCH_MSM8960 | ||
27 | bool "Enable support for MSM8960" | ||
28 | select ARM_GIC | ||
29 | select CPU_V7 | ||
30 | select HAVE_SMP | ||
31 | select MSM_SCM if SMP | ||
32 | select MSM_TIMER | ||
33 | |||
34 | config ARCH_MSM8974 | ||
35 | bool "Enable support for MSM8974" | ||
36 | select ARM_GIC | ||
37 | select CPU_V7 | ||
38 | select HAVE_ARM_ARCH_TIMER | ||
39 | select HAVE_SMP | ||
40 | select MSM_SCM if SMP | ||
41 | |||
42 | endmenu | ||
43 | |||
44 | choice | 3 | choice |
45 | prompt "Qualcomm MSM SoC Type" | 4 | prompt "Qualcomm MSM SoC Type" |
46 | default ARCH_MSM7X00A | 5 | default ARCH_MSM7X00A |
47 | depends on ARCH_MSM_NODT | 6 | depends on ARCH_MSM |
48 | 7 | ||
49 | config ARCH_MSM7X00A | 8 | config ARCH_MSM7X00A |
50 | bool "MSM7x00A / MSM7x01A" | 9 | bool "MSM7x00A / MSM7x01A" |
@@ -54,7 +13,7 @@ config ARCH_MSM7X00A | |||
54 | select MACH_TROUT if !MACH_HALIBUT | 13 | select MACH_TROUT if !MACH_HALIBUT |
55 | select MSM_PROC_COMM | 14 | select MSM_PROC_COMM |
56 | select MSM_SMD | 15 | select MSM_SMD |
57 | select MSM_TIMER | 16 | select CLKSRC_QCOM |
58 | select MSM_SMD_PKG3 | 17 | select MSM_SMD_PKG3 |
59 | 18 | ||
60 | config ARCH_MSM7X30 | 19 | config ARCH_MSM7X30 |
@@ -66,7 +25,7 @@ config ARCH_MSM7X30 | |||
66 | select MSM_GPIOMUX | 25 | select MSM_GPIOMUX |
67 | select MSM_PROC_COMM | 26 | select MSM_PROC_COMM |
68 | select MSM_SMD | 27 | select MSM_SMD |
69 | select MSM_TIMER | 28 | select CLKSRC_QCOM |
70 | select MSM_VIC | 29 | select MSM_VIC |
71 | 30 | ||
72 | config ARCH_QSD8X50 | 31 | config ARCH_QSD8X50 |
@@ -78,7 +37,7 @@ config ARCH_QSD8X50 | |||
78 | select MSM_GPIOMUX | 37 | select MSM_GPIOMUX |
79 | select MSM_PROC_COMM | 38 | select MSM_PROC_COMM |
80 | select MSM_SMD | 39 | select MSM_SMD |
81 | select MSM_TIMER | 40 | select CLKSRC_QCOM |
82 | select MSM_VIC | 41 | select MSM_VIC |
83 | 42 | ||
84 | endchoice | 43 | endchoice |
@@ -99,7 +58,7 @@ config MSM_VIC | |||
99 | bool | 58 | bool |
100 | 59 | ||
101 | menu "Qualcomm MSM Board Type" | 60 | menu "Qualcomm MSM Board Type" |
102 | depends on ARCH_MSM_NODT | 61 | depends on ARCH_MSM |
103 | 62 | ||
104 | config MACH_HALIBUT | 63 | config MACH_HALIBUT |
105 | depends on ARCH_MSM | 64 | depends on ARCH_MSM |
@@ -153,7 +112,4 @@ config MSM_GPIOMUX | |||
153 | config MSM_SCM | 112 | config MSM_SCM |
154 | bool | 113 | bool |
155 | 114 | ||
156 | config MSM_TIMER | ||
157 | bool | ||
158 | |||
159 | endif | 115 | endif |
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile index 8e307a10d3c3..27c078a568df 100644 --- a/arch/arm/mach-msm/Makefile +++ b/arch/arm/mach-msm/Makefile | |||
@@ -1,4 +1,3 @@ | |||
1 | obj-$(CONFIG_MSM_TIMER) += timer.o | ||
2 | obj-$(CONFIG_MSM_PROC_COMM) += clock.o | 1 | obj-$(CONFIG_MSM_PROC_COMM) += clock.o |
3 | 2 | ||
4 | obj-$(CONFIG_MSM_VIC) += irq-vic.o | 3 | obj-$(CONFIG_MSM_VIC) += irq-vic.o |
@@ -14,18 +13,11 @@ obj-$(CONFIG_ARCH_QSD8X50) += dma.o io.o | |||
14 | 13 | ||
15 | obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o | 14 | obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o |
16 | obj-$(CONFIG_MSM_SMD) += last_radio_log.o | 15 | obj-$(CONFIG_MSM_SMD) += last_radio_log.o |
17 | obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o | ||
18 | |||
19 | CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) | ||
20 | |||
21 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o | ||
22 | obj-$(CONFIG_SMP) += headsmp.o platsmp.o | ||
23 | 16 | ||
24 | obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o | 17 | obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o |
25 | obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o | 18 | obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o |
26 | obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o | 19 | obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o |
27 | obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o | 20 | obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o |
28 | obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o | 21 | obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o |
29 | obj-$(CONFIG_ARCH_MSM_DT) += board-dt.o | ||
30 | obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o | 22 | obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o |
31 | obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o | 23 | obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o |
diff --git a/arch/arm/mach-msm/common.h b/arch/arm/mach-msm/common.h index 33c7725adae2..0a4899b7d85c 100644 --- a/arch/arm/mach-msm/common.h +++ b/arch/arm/mach-msm/common.h | |||
@@ -24,7 +24,6 @@ extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size, | |||
24 | unsigned int mtype, void *caller); | 24 | unsigned int mtype, void *caller); |
25 | 25 | ||
26 | extern struct smp_operations msm_smp_ops; | 26 | extern struct smp_operations msm_smp_ops; |
27 | extern void msm_cpu_die(unsigned int cpu); | ||
28 | 27 | ||
29 | struct msm_mmc_platform_data; | 28 | struct msm_mmc_platform_data; |
30 | 29 | ||
diff --git a/arch/arm/mach-msm/headsmp.S b/arch/arm/mach-msm/headsmp.S deleted file mode 100644 index 6c62c3f82fe6..000000000000 --- a/arch/arm/mach-msm/headsmp.S +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-realview/headsmp.S | ||
3 | * | ||
4 | * Copyright (c) 2003 ARM Limited | ||
5 | * All Rights Reserved | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #include <linux/linkage.h> | ||
12 | #include <linux/init.h> | ||
13 | |||
14 | /* | ||
15 | * MSM specific entry point for secondary CPUs. This provides | ||
16 | * a "holding pen" into which all secondary cores are held until we're | ||
17 | * ready for them to initialise. | ||
18 | */ | ||
19 | ENTRY(msm_secondary_startup) | ||
20 | mrc p15, 0, r0, c0, c0, 5 | ||
21 | and r0, r0, #15 | ||
22 | adr r4, 1f | ||
23 | ldmia r4, {r5, r6} | ||
24 | sub r4, r4, r5 | ||
25 | add r6, r6, r4 | ||
26 | pen: ldr r7, [r6] | ||
27 | cmp r7, r0 | ||
28 | bne pen | ||
29 | |||
30 | /* | ||
31 | * we've been released from the holding pen: secondary_stack | ||
32 | * should now contain the SVC stack for this core | ||
33 | */ | ||
34 | b secondary_startup | ||
35 | ENDPROC(msm_secondary_startup) | ||
36 | |||
37 | .align | ||
38 | 1: .long . | ||
39 | .long pen_release | ||
diff --git a/arch/arm/mach-msm/hotplug.c b/arch/arm/mach-msm/hotplug.c deleted file mode 100644 index 326a87261f9a..000000000000 --- a/arch/arm/mach-msm/hotplug.c +++ /dev/null | |||
@@ -1,74 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2002 ARM Ltd. | ||
3 | * All Rights Reserved | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | */ | ||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/errno.h> | ||
11 | #include <linux/smp.h> | ||
12 | |||
13 | #include <asm/smp_plat.h> | ||
14 | |||
15 | #include "common.h" | ||
16 | |||
17 | static inline void cpu_enter_lowpower(void) | ||
18 | { | ||
19 | } | ||
20 | |||
21 | static inline void cpu_leave_lowpower(void) | ||
22 | { | ||
23 | } | ||
24 | |||
25 | static inline void platform_do_lowpower(unsigned int cpu) | ||
26 | { | ||
27 | /* Just enter wfi for now. TODO: Properly shut off the cpu. */ | ||
28 | for (;;) { | ||
29 | /* | ||
30 | * here's the WFI | ||
31 | */ | ||
32 | asm("wfi" | ||
33 | : | ||
34 | : | ||
35 | : "memory", "cc"); | ||
36 | |||
37 | if (pen_release == cpu_logical_map(cpu)) { | ||
38 | /* | ||
39 | * OK, proper wakeup, we're done | ||
40 | */ | ||
41 | break; | ||
42 | } | ||
43 | |||
44 | /* | ||
45 | * getting here, means that we have come out of WFI without | ||
46 | * having been woken up - this shouldn't happen | ||
47 | * | ||
48 | * The trouble is, letting people know about this is not really | ||
49 | * possible, since we are currently running incoherently, and | ||
50 | * therefore cannot safely call printk() or anything else | ||
51 | */ | ||
52 | pr_debug("CPU%u: spurious wakeup call\n", cpu); | ||
53 | } | ||
54 | } | ||
55 | |||
56 | /* | ||
57 | * platform-specific code to shutdown a CPU | ||
58 | * | ||
59 | * Called with IRQs disabled | ||
60 | */ | ||
61 | void __ref msm_cpu_die(unsigned int cpu) | ||
62 | { | ||
63 | /* | ||
64 | * we're ready for shutdown now, so do it | ||
65 | */ | ||
66 | cpu_enter_lowpower(); | ||
67 | platform_do_lowpower(cpu); | ||
68 | |||
69 | /* | ||
70 | * bring this CPU back into the world of cache | ||
71 | * coherency, and then restore interrupts | ||
72 | */ | ||
73 | cpu_leave_lowpower(); | ||
74 | } | ||
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h index 5f03484584d4..e20d6da234a6 100644 --- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h +++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h | |||
@@ -15,6 +15,7 @@ | |||
15 | #define L2_WRITETHROUGH 0x00020000 | 15 | #define L2_WRITETHROUGH 0x00020000 |
16 | 16 | ||
17 | #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) | 17 | #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) |
18 | #define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108) | ||
18 | #define SOFT_RESET_OUT_EN 0x00000004 | 19 | #define SOFT_RESET_OUT_EN 0x00000004 |
19 | 20 | ||
20 | #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) | 21 | #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) |
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h index f727d03f1688..5766e3fbff69 100644 --- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h +++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h | |||
@@ -18,6 +18,7 @@ | |||
18 | #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) | 18 | #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) |
19 | 19 | ||
20 | #define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108) | 20 | #define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108) |
21 | #define RSTOUTn_MASK_PHYS (ORION5X_BRIDGE_PHYS_BASE + 0x108) | ||
21 | 22 | ||
22 | #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c) | 23 | #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c) |
23 | 24 | ||
diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig new file mode 100644 index 000000000000..a028be234334 --- /dev/null +++ b/arch/arm/mach-qcom/Kconfig | |||
@@ -0,0 +1,33 @@ | |||
1 | config ARCH_QCOM | ||
2 | bool "Qualcomm Support" if ARCH_MULTI_V7 | ||
3 | select ARCH_REQUIRE_GPIOLIB | ||
4 | select ARM_GIC | ||
5 | select CLKSRC_OF | ||
6 | select GENERIC_CLOCKEVENTS | ||
7 | select HAVE_SMP | ||
8 | select QCOM_SCM if SMP | ||
9 | help | ||
10 | Support for Qualcomm's devicetree based systems. | ||
11 | |||
12 | if ARCH_QCOM | ||
13 | |||
14 | menu "Qualcomm SoC Selection" | ||
15 | |||
16 | config ARCH_MSM8X60 | ||
17 | bool "Enable support for MSM8X60" | ||
18 | select CLKSRC_QCOM | ||
19 | |||
20 | config ARCH_MSM8960 | ||
21 | bool "Enable support for MSM8960" | ||
22 | select CLKSRC_QCOM | ||
23 | |||
24 | config ARCH_MSM8974 | ||
25 | bool "Enable support for MSM8974" | ||
26 | select HAVE_ARM_ARCH_TIMER | ||
27 | |||
28 | endmenu | ||
29 | |||
30 | config QCOM_SCM | ||
31 | bool | ||
32 | |||
33 | endif | ||
diff --git a/arch/arm/mach-qcom/Makefile b/arch/arm/mach-qcom/Makefile new file mode 100644 index 000000000000..8f756ae1ae31 --- /dev/null +++ b/arch/arm/mach-qcom/Makefile | |||
@@ -0,0 +1,5 @@ | |||
1 | obj-y := board.o | ||
2 | obj-$(CONFIG_SMP) += platsmp.o | ||
3 | obj-$(CONFIG_QCOM_SCM) += scm.o scm-boot.o | ||
4 | |||
5 | CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) | ||
diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-qcom/board.c index 1f11d93e700e..830f69c3a3ce 100644 --- a/arch/arm/mach-msm/board-dt.c +++ b/arch/arm/mach-qcom/board.c | |||
@@ -1,4 +1,4 @@ | |||
1 | /* Copyright (c) 2010-2012,2013 The Linux Foundation. All rights reserved. | 1 | /* Copyright (c) 2010-2014 The Linux Foundation. All rights reserved. |
2 | * | 2 | * |
3 | * This program is free software; you can redistribute it and/or modify | 3 | * This program is free software; you can redistribute it and/or modify |
4 | * it under the terms of the GNU General Public License version 2 and | 4 | * it under the terms of the GNU General Public License version 2 and |
@@ -17,10 +17,9 @@ | |||
17 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
18 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
19 | 19 | ||
20 | #include "common.h" | 20 | extern struct smp_operations qcom_smp_ops; |
21 | 21 | ||
22 | static const char * const msm_dt_match[] __initconst = { | 22 | static const char * const qcom_dt_match[] __initconst = { |
23 | "qcom,msm8660-fluid", | ||
24 | "qcom,msm8660-surf", | 23 | "qcom,msm8660-surf", |
25 | "qcom,msm8960-cdp", | 24 | "qcom,msm8960-cdp", |
26 | NULL | 25 | NULL |
@@ -31,11 +30,11 @@ static const char * const apq8074_dt_match[] __initconst = { | |||
31 | NULL | 30 | NULL |
32 | }; | 31 | }; |
33 | 32 | ||
34 | DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)") | 33 | DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)") |
35 | .smp = smp_ops(msm_smp_ops), | 34 | .smp = smp_ops(qcom_smp_ops), |
36 | .dt_compat = msm_dt_match, | 35 | .dt_compat = qcom_dt_match, |
37 | MACHINE_END | 36 | MACHINE_END |
38 | 37 | ||
39 | DT_MACHINE_START(APQ_DT, "Qualcomm MSM (Flattened Device Tree)") | 38 | DT_MACHINE_START(APQ_DT, "Qualcomm (Flattened Device Tree)") |
40 | .dt_compat = apq8074_dt_match, | 39 | .dt_compat = apq8074_dt_match, |
41 | MACHINE_END | 40 | MACHINE_END |
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-qcom/platsmp.c index f10a1f58fde9..9c53ea70550d 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-qcom/platsmp.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * Copyright (C) 2002 ARM Ltd. | 2 | * Copyright (C) 2002 ARM Ltd. |
3 | * All Rights Reserved | 3 | * All Rights Reserved |
4 | * Copyright (c) 2010, Code Aurora Forum. All rights reserved. | 4 | * Copyright (c) 2010, Code Aurora Forum. All rights reserved. |
5 | * Copyright (c) 2014 The Linux Foundation. All rights reserved. | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
@@ -12,42 +13,38 @@ | |||
12 | #include <linux/errno.h> | 13 | #include <linux/errno.h> |
13 | #include <linux/delay.h> | 14 | #include <linux/delay.h> |
14 | #include <linux/device.h> | 15 | #include <linux/device.h> |
15 | #include <linux/jiffies.h> | ||
16 | #include <linux/smp.h> | 16 | #include <linux/smp.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | 18 | ||
19 | #include <asm/cacheflush.h> | ||
20 | #include <asm/cputype.h> | 19 | #include <asm/cputype.h> |
21 | #include <asm/mach-types.h> | ||
22 | #include <asm/smp_plat.h> | 20 | #include <asm/smp_plat.h> |
23 | 21 | ||
24 | #include "scm-boot.h" | 22 | #include "scm-boot.h" |
25 | #include "common.h" | ||
26 | 23 | ||
27 | #define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0 | 24 | #define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0 |
28 | #define SCSS_CPU1CORE_RESET 0xD80 | 25 | #define SCSS_CPU1CORE_RESET 0xD80 |
29 | #define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64 | 26 | #define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64 |
30 | 27 | ||
31 | extern void msm_secondary_startup(void); | 28 | extern void secondary_startup(void); |
32 | 29 | ||
33 | static DEFINE_SPINLOCK(boot_lock); | 30 | static DEFINE_SPINLOCK(boot_lock); |
34 | 31 | ||
32 | #ifdef CONFIG_HOTPLUG_CPU | ||
33 | static void __ref qcom_cpu_die(unsigned int cpu) | ||
34 | { | ||
35 | wfi(); | ||
36 | } | ||
37 | #endif | ||
38 | |||
35 | static inline int get_core_count(void) | 39 | static inline int get_core_count(void) |
36 | { | 40 | { |
37 | /* 1 + the PART[1:0] field of MIDR */ | 41 | /* 1 + the PART[1:0] field of MIDR */ |
38 | return ((read_cpuid_id() >> 4) & 3) + 1; | 42 | return ((read_cpuid_id() >> 4) & 3) + 1; |
39 | } | 43 | } |
40 | 44 | ||
41 | static void msm_secondary_init(unsigned int cpu) | 45 | static void qcom_secondary_init(unsigned int cpu) |
42 | { | 46 | { |
43 | /* | 47 | /* |
44 | * let the primary processor know we're out of the | ||
45 | * pen, then head off into the C entry point | ||
46 | */ | ||
47 | pen_release = -1; | ||
48 | smp_wmb(); | ||
49 | |||
50 | /* | ||
51 | * Synchronise with the boot thread. | 48 | * Synchronise with the boot thread. |
52 | */ | 49 | */ |
53 | spin_lock(&boot_lock); | 50 | spin_lock(&boot_lock); |
@@ -57,7 +54,7 @@ static void msm_secondary_init(unsigned int cpu) | |||
57 | static void prepare_cold_cpu(unsigned int cpu) | 54 | static void prepare_cold_cpu(unsigned int cpu) |
58 | { | 55 | { |
59 | int ret; | 56 | int ret; |
60 | ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), | 57 | ret = scm_set_boot_addr(virt_to_phys(secondary_startup), |
61 | SCM_FLAG_COLDBOOT_CPU1); | 58 | SCM_FLAG_COLDBOOT_CPU1); |
62 | if (ret == 0) { | 59 | if (ret == 0) { |
63 | void __iomem *sc1_base_ptr; | 60 | void __iomem *sc1_base_ptr; |
@@ -73,9 +70,8 @@ static void prepare_cold_cpu(unsigned int cpu) | |||
73 | "address\n"); | 70 | "address\n"); |
74 | } | 71 | } |
75 | 72 | ||
76 | static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) | 73 | static int qcom_boot_secondary(unsigned int cpu, struct task_struct *idle) |
77 | { | 74 | { |
78 | unsigned long timeout; | ||
79 | static int cold_boot_done; | 75 | static int cold_boot_done; |
80 | 76 | ||
81 | /* Only need to bring cpu out of reset this way once */ | 77 | /* Only need to bring cpu out of reset this way once */ |
@@ -91,39 +87,19 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
91 | spin_lock(&boot_lock); | 87 | spin_lock(&boot_lock); |
92 | 88 | ||
93 | /* | 89 | /* |
94 | * The secondary processor is waiting to be released from | ||
95 | * the holding pen - release it, then wait for it to flag | ||
96 | * that it has been released by resetting pen_release. | ||
97 | * | ||
98 | * Note that "pen_release" is the hardware CPU ID, whereas | ||
99 | * "cpu" is Linux's internal ID. | ||
100 | */ | ||
101 | pen_release = cpu_logical_map(cpu); | ||
102 | sync_cache_w(&pen_release); | ||
103 | |||
104 | /* | ||
105 | * Send the secondary CPU a soft interrupt, thereby causing | 90 | * Send the secondary CPU a soft interrupt, thereby causing |
106 | * the boot monitor to read the system wide flags register, | 91 | * the boot monitor to read the system wide flags register, |
107 | * and branch to the address found there. | 92 | * and branch to the address found there. |
108 | */ | 93 | */ |
109 | arch_send_wakeup_ipi_mask(cpumask_of(cpu)); | 94 | arch_send_wakeup_ipi_mask(cpumask_of(cpu)); |
110 | 95 | ||
111 | timeout = jiffies + (1 * HZ); | ||
112 | while (time_before(jiffies, timeout)) { | ||
113 | smp_rmb(); | ||
114 | if (pen_release == -1) | ||
115 | break; | ||
116 | |||
117 | udelay(10); | ||
118 | } | ||
119 | |||
120 | /* | 96 | /* |
121 | * now the secondary core is starting up let it run its | 97 | * now the secondary core is starting up let it run its |
122 | * calibrations, then wait for it to finish | 98 | * calibrations, then wait for it to finish |
123 | */ | 99 | */ |
124 | spin_unlock(&boot_lock); | 100 | spin_unlock(&boot_lock); |
125 | 101 | ||
126 | return pen_release != -1 ? -ENOSYS : 0; | 102 | return 0; |
127 | } | 103 | } |
128 | 104 | ||
129 | /* | 105 | /* |
@@ -132,7 +108,7 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
132 | * does not support the ARM SCU, so just set the possible cpu mask to | 108 | * does not support the ARM SCU, so just set the possible cpu mask to |
133 | * NR_CPUS. | 109 | * NR_CPUS. |
134 | */ | 110 | */ |
135 | static void __init msm_smp_init_cpus(void) | 111 | static void __init qcom_smp_init_cpus(void) |
136 | { | 112 | { |
137 | unsigned int i, ncores = get_core_count(); | 113 | unsigned int i, ncores = get_core_count(); |
138 | 114 | ||
@@ -146,16 +122,16 @@ static void __init msm_smp_init_cpus(void) | |||
146 | set_cpu_possible(i, true); | 122 | set_cpu_possible(i, true); |
147 | } | 123 | } |
148 | 124 | ||
149 | static void __init msm_smp_prepare_cpus(unsigned int max_cpus) | 125 | static void __init qcom_smp_prepare_cpus(unsigned int max_cpus) |
150 | { | 126 | { |
151 | } | 127 | } |
152 | 128 | ||
153 | struct smp_operations msm_smp_ops __initdata = { | 129 | struct smp_operations qcom_smp_ops __initdata = { |
154 | .smp_init_cpus = msm_smp_init_cpus, | 130 | .smp_init_cpus = qcom_smp_init_cpus, |
155 | .smp_prepare_cpus = msm_smp_prepare_cpus, | 131 | .smp_prepare_cpus = qcom_smp_prepare_cpus, |
156 | .smp_secondary_init = msm_secondary_init, | 132 | .smp_secondary_init = qcom_secondary_init, |
157 | .smp_boot_secondary = msm_boot_secondary, | 133 | .smp_boot_secondary = qcom_boot_secondary, |
158 | #ifdef CONFIG_HOTPLUG_CPU | 134 | #ifdef CONFIG_HOTPLUG_CPU |
159 | .cpu_die = msm_cpu_die, | 135 | .cpu_die = qcom_cpu_die, |
160 | #endif | 136 | #endif |
161 | }; | 137 | }; |
diff --git a/arch/arm/mach-msm/scm-boot.c b/arch/arm/mach-qcom/scm-boot.c index 45cee3e469a5..45cee3e469a5 100644 --- a/arch/arm/mach-msm/scm-boot.c +++ b/arch/arm/mach-qcom/scm-boot.c | |||
diff --git a/arch/arm/mach-msm/scm-boot.h b/arch/arm/mach-qcom/scm-boot.h index 7be32ff5d687..7be32ff5d687 100644 --- a/arch/arm/mach-msm/scm-boot.h +++ b/arch/arm/mach-qcom/scm-boot.h | |||
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-qcom/scm.c index c536fd6bf827..c536fd6bf827 100644 --- a/arch/arm/mach-msm/scm.c +++ b/arch/arm/mach-qcom/scm.c | |||
diff --git a/arch/arm/mach-msm/scm.h b/arch/arm/mach-qcom/scm.h index 00b31ea58f29..00b31ea58f29 100644 --- a/arch/arm/mach-msm/scm.h +++ b/arch/arm/mach-qcom/scm.h | |||
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c index e6ab0cd5b286..dd8ce87596de 100644 --- a/arch/arm/mach-shmobile/clock-r7s72100.c +++ b/arch/arm/mach-shmobile/clock-r7s72100.c | |||
@@ -176,6 +176,10 @@ static struct clk_lookup lookups[] = { | |||
176 | CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), | 176 | CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), |
177 | 177 | ||
178 | /* MSTP clocks */ | 178 | /* MSTP clocks */ |
179 | CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]), | ||
180 | CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]), | ||
181 | CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]), | ||
182 | CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]), | ||
179 | CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]), | 183 | CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]), |
180 | 184 | ||
181 | /* ICK */ | 185 | /* ICK */ |
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index f1fb89b76786..93a562531d53 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c | |||
@@ -127,16 +127,16 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
127 | [MSTP322] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 22, 0), /* SDHI1 */ | 127 | [MSTP322] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 22, 0), /* SDHI1 */ |
128 | [MSTP321] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 21, 0), /* SDHI2 */ | 128 | [MSTP321] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 21, 0), /* SDHI2 */ |
129 | [MSTP320] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 20, 0), /* SDHI3 */ | 129 | [MSTP320] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 20, 0), /* SDHI3 */ |
130 | [MSTP120] = SH_CLK_MSTP32(&clks_clk, MSTPCR1, 20, 0), /* VIN3 */ | 130 | [MSTP120] = SH_CLK_MSTP32_STS(&clks_clk, MSTPCR1, 20, MSTPSR1, 0), /* VIN3 */ |
131 | [MSTP116] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 16, 0), /* PCIe */ | 131 | [MSTP116] = SH_CLK_MSTP32_STS(&clkp_clk, MSTPCR1, 16, MSTPSR1, 0), /* PCIe */ |
132 | [MSTP115] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 15, 0), /* SATA */ | 132 | [MSTP115] = SH_CLK_MSTP32_STS(&clkp_clk, MSTPCR1, 15, MSTPSR1, 0), /* SATA */ |
133 | [MSTP114] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 14, 0), /* Ether */ | 133 | [MSTP114] = SH_CLK_MSTP32_STS(&clkp_clk, MSTPCR1, 14, MSTPSR1, 0), /* Ether */ |
134 | [MSTP110] = SH_CLK_MSTP32(&clks_clk, MSTPCR1, 10, 0), /* VIN0 */ | 134 | [MSTP110] = SH_CLK_MSTP32_STS(&clks_clk, MSTPCR1, 10, MSTPSR1, 0), /* VIN0 */ |
135 | [MSTP109] = SH_CLK_MSTP32(&clks_clk, MSTPCR1, 9, 0), /* VIN1 */ | 135 | [MSTP109] = SH_CLK_MSTP32_STS(&clks_clk, MSTPCR1, 9, MSTPSR1, 0), /* VIN1 */ |
136 | [MSTP108] = SH_CLK_MSTP32(&clks_clk, MSTPCR1, 8, 0), /* VIN2 */ | 136 | [MSTP108] = SH_CLK_MSTP32_STS(&clks_clk, MSTPCR1, 8, MSTPSR1, 0), /* VIN2 */ |
137 | [MSTP103] = SH_CLK_MSTP32(&clks_clk, MSTPCR1, 3, 0), /* DU */ | 137 | [MSTP103] = SH_CLK_MSTP32_STS(&clks_clk, MSTPCR1, 3, MSTPSR1, 0), /* DU */ |
138 | [MSTP101] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 1, 0), /* USB2 */ | 138 | [MSTP101] = SH_CLK_MSTP32_STS(&clkp_clk, MSTPCR1, 1, MSTPSR1, 0), /* USB2 */ |
139 | [MSTP100] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 0, 0), /* USB0/1 */ | 139 | [MSTP100] = SH_CLK_MSTP32_STS(&clkp_clk, MSTPCR1, 0, MSTPSR1, 0), /* USB0/1 */ |
140 | [MSTP030] = SH_CLK_MSTP32(&clkp_clk, MSTPCR0, 30, 0), /* I2C0 */ | 140 | [MSTP030] = SH_CLK_MSTP32(&clkp_clk, MSTPCR0, 30, 0), /* I2C0 */ |
141 | [MSTP029] = SH_CLK_MSTP32(&clkp_clk, MSTPCR0, 29, 0), /* I2C1 */ | 141 | [MSTP029] = SH_CLK_MSTP32(&clkp_clk, MSTPCR0, 29, 0), /* I2C1 */ |
142 | [MSTP028] = SH_CLK_MSTP32(&clkp_clk, MSTPCR0, 28, 0), /* I2C2 */ | 142 | [MSTP028] = SH_CLK_MSTP32(&clkp_clk, MSTPCR0, 28, 0), /* I2C2 */ |
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index f44987a92ad4..507073e9d455 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c | |||
@@ -43,17 +43,26 @@ | |||
43 | * see "p1 / 2" on R8A7790_CLOCK_ROOT() below | 43 | * see "p1 / 2" on R8A7790_CLOCK_ROOT() below |
44 | */ | 44 | */ |
45 | 45 | ||
46 | #define CPG_BASE 0xe6150000 | 46 | #define CPG_BASE 0xe6150000 |
47 | #define CPG_LEN 0x1000 | 47 | #define CPG_LEN 0x1000 |
48 | 48 | ||
49 | #define SMSTPCR1 0xe6150134 | 49 | #define SMSTPCR1 0xe6150134 |
50 | #define SMSTPCR2 0xe6150138 | 50 | #define SMSTPCR2 0xe6150138 |
51 | #define SMSTPCR3 0xe615013c | 51 | #define SMSTPCR3 0xe615013c |
52 | #define SMSTPCR5 0xe6150144 | 52 | #define SMSTPCR5 0xe6150144 |
53 | #define SMSTPCR7 0xe615014c | 53 | #define SMSTPCR7 0xe615014c |
54 | #define SMSTPCR8 0xe6150990 | 54 | #define SMSTPCR8 0xe6150990 |
55 | #define SMSTPCR9 0xe6150994 | 55 | #define SMSTPCR9 0xe6150994 |
56 | #define SMSTPCR10 0xe6150998 | 56 | #define SMSTPCR10 0xe6150998 |
57 | |||
58 | #define MSTPSR1 IOMEM(0xe6150038) | ||
59 | #define MSTPSR2 IOMEM(0xe6150040) | ||
60 | #define MSTPSR3 IOMEM(0xe6150048) | ||
61 | #define MSTPSR5 IOMEM(0xe615003c) | ||
62 | #define MSTPSR7 IOMEM(0xe61501c4) | ||
63 | #define MSTPSR8 IOMEM(0xe61509a0) | ||
64 | #define MSTPSR9 IOMEM(0xe61509a4) | ||
65 | #define MSTPSR10 IOMEM(0xe61509a8) | ||
57 | 66 | ||
58 | #define SDCKCR 0xE6150074 | 67 | #define SDCKCR 0xE6150074 |
59 | #define SD2CKCR 0xE6150078 | 68 | #define SD2CKCR 0xE6150078 |
@@ -187,11 +196,14 @@ enum { | |||
187 | MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005, | 196 | MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005, |
188 | MSTP931, MSTP930, MSTP929, MSTP928, | 197 | MSTP931, MSTP930, MSTP929, MSTP928, |
189 | MSTP917, | 198 | MSTP917, |
199 | MSTP815, MSTP814, | ||
190 | MSTP813, | 200 | MSTP813, |
201 | MSTP811, MSTP810, MSTP809, MSTP808, | ||
191 | MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720, | 202 | MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720, |
192 | MSTP717, MSTP716, | 203 | MSTP717, MSTP716, |
193 | MSTP704, | 204 | MSTP704, MSTP703, |
194 | MSTP522, | 205 | MSTP522, |
206 | MSTP502, MSTP501, | ||
195 | MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, | 207 | MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, |
196 | MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, | 208 | MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, |
197 | MSTP124, | 209 | MSTP124, |
@@ -199,48 +211,57 @@ enum { | |||
199 | }; | 211 | }; |
200 | 212 | ||
201 | static struct clk mstp_clks[MSTP_NR] = { | 213 | static struct clk mstp_clks[MSTP_NR] = { |
202 | [MSTP1015] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 15, 0), /* SSI0 */ | 214 | [MSTP1015] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 15, MSTPSR10, 0), /* SSI0 */ |
203 | [MSTP1014] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 14, 0), /* SSI1 */ | 215 | [MSTP1014] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 14, MSTPSR10, 0), /* SSI1 */ |
204 | [MSTP1013] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 13, 0), /* SSI2 */ | 216 | [MSTP1013] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 13, MSTPSR10, 0), /* SSI2 */ |
205 | [MSTP1012] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 12, 0), /* SSI3 */ | 217 | [MSTP1012] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 12, MSTPSR10, 0), /* SSI3 */ |
206 | [MSTP1011] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 11, 0), /* SSI4 */ | 218 | [MSTP1011] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 11, MSTPSR10, 0), /* SSI4 */ |
207 | [MSTP1010] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 10, 0), /* SSI5 */ | 219 | [MSTP1010] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 10, MSTPSR10, 0), /* SSI5 */ |
208 | [MSTP1009] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 9, 0), /* SSI6 */ | 220 | [MSTP1009] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 9, MSTPSR10, 0), /* SSI6 */ |
209 | [MSTP1008] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 8, 0), /* SSI7 */ | 221 | [MSTP1008] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 8, MSTPSR10, 0), /* SSI7 */ |
210 | [MSTP1007] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 7, 0), /* SSI8 */ | 222 | [MSTP1007] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 7, MSTPSR10, 0), /* SSI8 */ |
211 | [MSTP1006] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 6, 0), /* SSI9 */ | 223 | [MSTP1006] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 6, MSTPSR10, 0), /* SSI9 */ |
212 | [MSTP1005] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 5, 0), /* SSI ALL */ | 224 | [MSTP1005] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 5, MSTPSR10, 0), /* SSI ALL */ |
213 | [MSTP931] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 31, 0), /* I2C0 */ | 225 | [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ |
214 | [MSTP930] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 30, 0), /* I2C1 */ | 226 | [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ |
215 | [MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */ | 227 | [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ |
216 | [MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */ | 228 | [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */ |
217 | [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */ | 229 | [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */ |
218 | [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ | 230 | [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */ |
219 | [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ | 231 | [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */ |
220 | [MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */ | 232 | [MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */ |
221 | [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ | 233 | [MSTP811] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 11, MSTPSR8, 0), /* VIN0 */ |
222 | [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */ | 234 | [MSTP810] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 10, MSTPSR8, 0), /* VIN1 */ |
223 | [MSTP722] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 22, 0), /* DU2 */ | 235 | [MSTP809] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 9, MSTPSR8, 0), /* VIN2 */ |
224 | [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */ | 236 | [MSTP808] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 8, MSTPSR8, 0), /* VIN3 */ |
225 | [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ | 237 | [MSTP726] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 26, MSTPSR7, 0), /* LVDS0 */ |
226 | [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */ | 238 | [MSTP725] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 25, MSTPSR7, 0), /* LVDS1 */ |
227 | [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */ | 239 | [MSTP724] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 24, MSTPSR7, 0), /* DU0 */ |
228 | [MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */ | 240 | [MSTP723] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 23, MSTPSR7, 0), /* DU1 */ |
229 | [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */ | 241 | [MSTP722] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 22, MSTPSR7, 0), /* DU2 */ |
230 | [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */ | 242 | [MSTP721] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 21, MSTPSR7, 0), /* SCIF0 */ |
231 | [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */ | 243 | [MSTP720] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 20, MSTPSR7, 0), /* SCIF1 */ |
232 | [MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */ | 244 | [MSTP717] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR7, 17, MSTPSR7, 0), /* HSCIF0 */ |
233 | [MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SD2], SMSTPCR3, 12, 0), /* SDHI2 */ | 245 | [MSTP716] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR7, 16, MSTPSR7, 0), /* HSCIF1 */ |
234 | [MSTP311] = SH_CLK_MSTP32(&div6_clks[DIV6_SD3], SMSTPCR3, 11, 0), /* SDHI3 */ | 246 | [MSTP704] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR7, 4, MSTPSR7, 0), /* HSUSB */ |
235 | [MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1], SMSTPCR3, 5, 0), /* MMC1 */ | 247 | [MSTP703] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR7, 3, MSTPSR7, 0), /* EHCI */ |
236 | [MSTP304] = SH_CLK_MSTP32(&cp_clk, SMSTPCR3, 4, 0), /* TPU0 */ | 248 | [MSTP522] = SH_CLK_MSTP32_STS(&extal_clk, SMSTPCR5, 22, MSTPSR5, 0), /* Thermal */ |
237 | [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */ | 249 | [MSTP502] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR5, 2, MSTPSR5, 0), /* Audio-DMAC low */ |
238 | [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */ | 250 | [MSTP501] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR5, 1, MSTPSR5, 0), /* Audio-DMAC hi */ |
239 | [MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */ | 251 | [MSTP315] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, MSTPSR3, 0), /* MMC0 */ |
240 | [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ | 252 | [MSTP314] = SH_CLK_MSTP32_STS(&div4_clks[DIV4_SD0], SMSTPCR3, 14, MSTPSR3, 0), /* SDHI0 */ |
241 | [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ | 253 | [MSTP313] = SH_CLK_MSTP32_STS(&div4_clks[DIV4_SD1], SMSTPCR3, 13, MSTPSR3, 0), /* SDHI1 */ |
242 | [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ | 254 | [MSTP312] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_SD2], SMSTPCR3, 12, MSTPSR3, 0), /* SDHI2 */ |
243 | [MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */ | 255 | [MSTP311] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_SD3], SMSTPCR3, 11, MSTPSR3, 0), /* SDHI3 */ |
256 | [MSTP305] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_MMC1], SMSTPCR3, 5, MSTPSR3, 0), /* MMC1 */ | ||
257 | [MSTP304] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR3, 4, MSTPSR3, 0), /* TPU0 */ | ||
258 | [MSTP216] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 16, MSTPSR2, 0), /* SCIFB2 */ | ||
259 | [MSTP207] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 7, MSTPSR2, 0), /* SCIFB1 */ | ||
260 | [MSTP206] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 6, MSTPSR2, 0), /* SCIFB0 */ | ||
261 | [MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */ | ||
262 | [MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */ | ||
263 | [MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */ | ||
264 | [MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */ | ||
244 | }; | 265 | }; |
245 | 266 | ||
246 | static struct clk_lookup lookups[] = { | 267 | static struct clk_lookup lookups[] = { |
@@ -300,8 +321,14 @@ static struct clk_lookup lookups[] = { | |||
300 | CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]), | 321 | CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]), |
301 | CLKDEV_DEV_ID("i2c-rcar_gen2.3", &mstp_clks[MSTP928]), | 322 | CLKDEV_DEV_ID("i2c-rcar_gen2.3", &mstp_clks[MSTP928]), |
302 | CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]), | 323 | CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]), |
324 | CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]), | ||
325 | CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]), | ||
326 | CLKDEV_DEV_ID("r8a7790-vin.2", &mstp_clks[MSTP809]), | ||
327 | CLKDEV_DEV_ID("r8a7790-vin.3", &mstp_clks[MSTP808]), | ||
303 | CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), | 328 | CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), |
304 | CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), | 329 | CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), |
330 | CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP502]), | ||
331 | CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP501]), | ||
305 | CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]), | 332 | CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]), |
306 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]), | 333 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]), |
307 | CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]), | 334 | CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]), |
@@ -317,6 +344,11 @@ static struct clk_lookup lookups[] = { | |||
317 | CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), | 344 | CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), |
318 | CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]), | 345 | CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]), |
319 | CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]), | 346 | CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]), |
347 | CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]), | ||
348 | CLKDEV_DEV_ID("pci-rcar-gen2.1", &mstp_clks[MSTP703]), | ||
349 | CLKDEV_DEV_ID("pci-rcar-gen2.2", &mstp_clks[MSTP703]), | ||
350 | CLKDEV_DEV_ID("sata-r8a7790.0", &mstp_clks[MSTP815]), | ||
351 | CLKDEV_DEV_ID("sata-r8a7790.1", &mstp_clks[MSTP814]), | ||
320 | 352 | ||
321 | /* ICK */ | 353 | /* ICK */ |
322 | CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]), | 354 | CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]), |
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c index f5461262ee25..e4e4dfac85e9 100644 --- a/arch/arm/mach-shmobile/clock-r8a7791.c +++ b/arch/arm/mach-shmobile/clock-r8a7791.c | |||
@@ -59,6 +59,14 @@ | |||
59 | #define SMSTPCR10 0xE6150998 | 59 | #define SMSTPCR10 0xE6150998 |
60 | #define SMSTPCR11 0xE615099C | 60 | #define SMSTPCR11 0xE615099C |
61 | 61 | ||
62 | #define MSTPSR1 IOMEM(0xe6150038) | ||
63 | #define MSTPSR2 IOMEM(0xe6150040) | ||
64 | #define MSTPSR5 IOMEM(0xe615003c) | ||
65 | #define MSTPSR7 IOMEM(0xe61501c4) | ||
66 | #define MSTPSR8 IOMEM(0xe61509a0) | ||
67 | #define MSTPSR9 IOMEM(0xe61509a4) | ||
68 | #define MSTPSR11 IOMEM(0xe61509ac) | ||
69 | |||
62 | #define MODEMR 0xE6160060 | 70 | #define MODEMR 0xE6160060 |
63 | #define SDCKCR 0xE6150074 | 71 | #define SDCKCR 0xE6150074 |
64 | #define SD2CKCR 0xE6150078 | 72 | #define SD2CKCR 0xE6150078 |
@@ -103,7 +111,9 @@ SH_FIXED_RATIO_CLK_SET(hp_clk, pll1_clk, 1, 12); | |||
103 | SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24); | 111 | SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24); |
104 | SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024)); | 112 | SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024)); |
105 | SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15); | 113 | SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15); |
114 | SH_FIXED_RATIO_CLK_SET(zg_clk, pll1_clk, 1, 3); | ||
106 | SH_FIXED_RATIO_CLK_SET(zx_clk, pll1_clk, 1, 3); | 115 | SH_FIXED_RATIO_CLK_SET(zx_clk, pll1_clk, 1, 3); |
116 | SH_FIXED_RATIO_CLK_SET(zs_clk, pll1_clk, 1, 6); | ||
107 | 117 | ||
108 | static struct clk *main_clks[] = { | 118 | static struct clk *main_clks[] = { |
109 | &extal_clk, | 119 | &extal_clk, |
@@ -117,12 +127,17 @@ static struct clk *main_clks[] = { | |||
117 | &rclk_clk, | 127 | &rclk_clk, |
118 | &mp_clk, | 128 | &mp_clk, |
119 | &cp_clk, | 129 | &cp_clk, |
130 | &zg_clk, | ||
120 | &zx_clk, | 131 | &zx_clk, |
132 | &zs_clk, | ||
121 | }; | 133 | }; |
122 | 134 | ||
123 | /* MSTP */ | 135 | /* MSTP */ |
124 | enum { | 136 | enum { |
137 | MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925, | ||
138 | MSTP815, MSTP814, | ||
125 | MSTP813, | 139 | MSTP813, |
140 | MSTP811, MSTP810, MSTP809, | ||
126 | MSTP726, MSTP724, MSTP723, MSTP721, MSTP720, | 141 | MSTP726, MSTP724, MSTP723, MSTP721, MSTP720, |
127 | MSTP719, MSTP718, MSTP715, MSTP714, | 142 | MSTP719, MSTP718, MSTP715, MSTP714, |
128 | MSTP522, | 143 | MSTP522, |
@@ -133,27 +148,38 @@ enum { | |||
133 | }; | 148 | }; |
134 | 149 | ||
135 | static struct clk mstp_clks[MSTP_NR] = { | 150 | static struct clk mstp_clks[MSTP_NR] = { |
136 | [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ | 151 | [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ |
137 | [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ | 152 | [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ |
138 | [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ | 153 | [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ |
139 | [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */ | 154 | [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */ |
140 | [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */ | 155 | [MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */ |
141 | [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ | 156 | [MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */ |
142 | [MSTP719] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 19, 0), /* SCIF2 */ | 157 | [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */ |
143 | [MSTP718] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 18, 0), /* SCIF3 */ | 158 | [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */ |
144 | [MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */ | 159 | [MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */ |
145 | [MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */ | 160 | [MSTP811] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 11, MSTPSR8, 0), /* VIN0 */ |
146 | [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */ | 161 | [MSTP810] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 10, MSTPSR8, 0), /* VIN1 */ |
147 | [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */ | 162 | [MSTP809] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 9, MSTPSR8, 0), /* VIN2 */ |
148 | [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */ | 163 | [MSTP726] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 26, MSTPSR7, 0), /* LVDS0 */ |
149 | [MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */ | 164 | [MSTP724] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 24, MSTPSR7, 0), /* DU0 */ |
150 | [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ | 165 | [MSTP723] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 23, MSTPSR7, 0), /* DU1 */ |
151 | [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ | 166 | [MSTP721] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 21, MSTPSR7, 0), /* SCIF0 */ |
152 | [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ | 167 | [MSTP720] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 20, MSTPSR7, 0), /* SCIF1 */ |
153 | [MSTP1105] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 5, 0), /* SCIFA3 */ | 168 | [MSTP719] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 19, MSTPSR7, 0), /* SCIF2 */ |
154 | [MSTP1106] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 6, 0), /* SCIFA4 */ | 169 | [MSTP718] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 18, MSTPSR7, 0), /* SCIF3 */ |
155 | [MSTP1107] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 7, 0), /* SCIFA5 */ | 170 | [MSTP715] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 15, MSTPSR7, 0), /* SCIF4 */ |
156 | [MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */ | 171 | [MSTP714] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 14, MSTPSR7, 0), /* SCIF5 */ |
172 | [MSTP522] = SH_CLK_MSTP32_STS(&extal_clk, SMSTPCR5, 22, MSTPSR5, 0), /* Thermal */ | ||
173 | [MSTP216] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 16, MSTPSR2, 0), /* SCIFB2 */ | ||
174 | [MSTP207] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 7, MSTPSR2, 0), /* SCIFB1 */ | ||
175 | [MSTP206] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 6, MSTPSR2, 0), /* SCIFB0 */ | ||
176 | [MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */ | ||
177 | [MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */ | ||
178 | [MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */ | ||
179 | [MSTP1105] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 5, MSTPSR11, 0), /* SCIFA3 */ | ||
180 | [MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA4 */ | ||
181 | [MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA5 */ | ||
182 | [MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */ | ||
157 | }; | 183 | }; |
158 | 184 | ||
159 | static struct clk_lookup lookups[] = { | 185 | static struct clk_lookup lookups[] = { |
@@ -165,6 +191,8 @@ static struct clk_lookup lookups[] = { | |||
165 | CLKDEV_CON_ID("pll1", &pll1_clk), | 191 | CLKDEV_CON_ID("pll1", &pll1_clk), |
166 | CLKDEV_CON_ID("pll1_div2", &pll1_div2_clk), | 192 | CLKDEV_CON_ID("pll1_div2", &pll1_div2_clk), |
167 | CLKDEV_CON_ID("pll3", &pll3_clk), | 193 | CLKDEV_CON_ID("pll3", &pll3_clk), |
194 | CLKDEV_CON_ID("zg", &zg_clk), | ||
195 | CLKDEV_CON_ID("zs", &zs_clk), | ||
168 | CLKDEV_CON_ID("hp", &hp_clk), | 196 | CLKDEV_CON_ID("hp", &hp_clk), |
169 | CLKDEV_CON_ID("p", &p_clk), | 197 | CLKDEV_CON_ID("p", &p_clk), |
170 | CLKDEV_CON_ID("rclk", &rclk_clk), | 198 | CLKDEV_CON_ID("rclk", &rclk_clk), |
@@ -194,7 +222,18 @@ static struct clk_lookup lookups[] = { | |||
194 | CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), | 222 | CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), |
195 | CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), | 223 | CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), |
196 | CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), | 224 | CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), |
225 | CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]), | ||
226 | CLKDEV_DEV_ID("i2c-rcar_gen2.1", &mstp_clks[MSTP930]), | ||
227 | CLKDEV_DEV_ID("i2c-rcar_gen2.2", &mstp_clks[MSTP929]), | ||
228 | CLKDEV_DEV_ID("i2c-rcar_gen2.3", &mstp_clks[MSTP928]), | ||
229 | CLKDEV_DEV_ID("i2c-rcar_gen2.4", &mstp_clks[MSTP927]), | ||
230 | CLKDEV_DEV_ID("i2c-rcar_gen2.5", &mstp_clks[MSTP925]), | ||
197 | CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */ | 231 | CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */ |
232 | CLKDEV_DEV_ID("r8a7791-vin.0", &mstp_clks[MSTP811]), | ||
233 | CLKDEV_DEV_ID("r8a7791-vin.1", &mstp_clks[MSTP810]), | ||
234 | CLKDEV_DEV_ID("r8a7791-vin.2", &mstp_clks[MSTP809]), | ||
235 | CLKDEV_DEV_ID("sata-r8a7791.0", &mstp_clks[MSTP815]), | ||
236 | CLKDEV_DEV_ID("sata-r8a7791.1", &mstp_clks[MSTP814]), | ||
198 | }; | 237 | }; |
199 | 238 | ||
200 | #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ | 239 | #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ |
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h index 5fbfa28b40b6..2177325af22f 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h | |||
@@ -3,6 +3,31 @@ | |||
3 | 3 | ||
4 | #include <mach/rcar-gen2.h> | 4 | #include <mach/rcar-gen2.h> |
5 | 5 | ||
6 | /* DMA slave IDs */ | ||
7 | enum { | ||
8 | RCAR_DMA_SLAVE_INVALID, | ||
9 | AUDIO_DMAC_SLAVE_SSI0_TX, | ||
10 | AUDIO_DMAC_SLAVE_SSI0_RX, | ||
11 | AUDIO_DMAC_SLAVE_SSI1_TX, | ||
12 | AUDIO_DMAC_SLAVE_SSI1_RX, | ||
13 | AUDIO_DMAC_SLAVE_SSI2_TX, | ||
14 | AUDIO_DMAC_SLAVE_SSI2_RX, | ||
15 | AUDIO_DMAC_SLAVE_SSI3_TX, | ||
16 | AUDIO_DMAC_SLAVE_SSI3_RX, | ||
17 | AUDIO_DMAC_SLAVE_SSI4_TX, | ||
18 | AUDIO_DMAC_SLAVE_SSI4_RX, | ||
19 | AUDIO_DMAC_SLAVE_SSI5_TX, | ||
20 | AUDIO_DMAC_SLAVE_SSI5_RX, | ||
21 | AUDIO_DMAC_SLAVE_SSI6_TX, | ||
22 | AUDIO_DMAC_SLAVE_SSI6_RX, | ||
23 | AUDIO_DMAC_SLAVE_SSI7_TX, | ||
24 | AUDIO_DMAC_SLAVE_SSI7_RX, | ||
25 | AUDIO_DMAC_SLAVE_SSI8_TX, | ||
26 | AUDIO_DMAC_SLAVE_SSI8_RX, | ||
27 | AUDIO_DMAC_SLAVE_SSI9_TX, | ||
28 | AUDIO_DMAC_SLAVE_SSI9_RX, | ||
29 | }; | ||
30 | |||
6 | void r8a7790_add_standard_devices(void); | 31 | void r8a7790_add_standard_devices(void); |
7 | void r8a7790_add_dt_devices(void); | 32 | void r8a7790_add_dt_devices(void); |
8 | void r8a7790_clock_init(void); | 33 | void r8a7790_clock_init(void); |
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index 6ab37aa1e919..c4616f0698c6 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c | |||
@@ -24,12 +24,100 @@ | |||
24 | #include <linux/platform_data/gpio-rcar.h> | 24 | #include <linux/platform_data/gpio-rcar.h> |
25 | #include <linux/platform_data/irq-renesas-irqc.h> | 25 | #include <linux/platform_data/irq-renesas-irqc.h> |
26 | #include <linux/serial_sci.h> | 26 | #include <linux/serial_sci.h> |
27 | #include <linux/sh_dma.h> | ||
27 | #include <linux/sh_timer.h> | 28 | #include <linux/sh_timer.h> |
28 | #include <mach/common.h> | 29 | #include <mach/common.h> |
30 | #include <mach/dma-register.h> | ||
29 | #include <mach/irqs.h> | 31 | #include <mach/irqs.h> |
30 | #include <mach/r8a7790.h> | 32 | #include <mach/r8a7790.h> |
31 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
32 | 34 | ||
35 | /* Audio-DMAC */ | ||
36 | #define AUDIO_DMAC_SLAVE(_id, _addr, t, r) \ | ||
37 | { \ | ||
38 | .slave_id = AUDIO_DMAC_SLAVE_## _id ##_TX, \ | ||
39 | .addr = _addr + 0x8, \ | ||
40 | .chcr = CHCR_TX(XMIT_SZ_32BIT), \ | ||
41 | .mid_rid = t, \ | ||
42 | }, { \ | ||
43 | .slave_id = AUDIO_DMAC_SLAVE_## _id ##_RX, \ | ||
44 | .addr = _addr + 0xc, \ | ||
45 | .chcr = CHCR_RX(XMIT_SZ_32BIT), \ | ||
46 | .mid_rid = r, \ | ||
47 | } | ||
48 | |||
49 | static const struct sh_dmae_slave_config r8a7790_audio_dmac_slaves[] = { | ||
50 | AUDIO_DMAC_SLAVE(SSI0, 0xec241000, 0x01, 0x02), | ||
51 | AUDIO_DMAC_SLAVE(SSI1, 0xec241040, 0x03, 0x04), | ||
52 | AUDIO_DMAC_SLAVE(SSI2, 0xec241080, 0x05, 0x06), | ||
53 | AUDIO_DMAC_SLAVE(SSI3, 0xec2410c0, 0x07, 0x08), | ||
54 | AUDIO_DMAC_SLAVE(SSI4, 0xec241100, 0x09, 0x0a), | ||
55 | AUDIO_DMAC_SLAVE(SSI5, 0xec241140, 0x0b, 0x0c), | ||
56 | AUDIO_DMAC_SLAVE(SSI6, 0xec241180, 0x0d, 0x0e), | ||
57 | AUDIO_DMAC_SLAVE(SSI7, 0xec2411c0, 0x0f, 0x10), | ||
58 | AUDIO_DMAC_SLAVE(SSI8, 0xec241200, 0x11, 0x12), | ||
59 | AUDIO_DMAC_SLAVE(SSI9, 0xec241240, 0x13, 0x14), | ||
60 | }; | ||
61 | |||
62 | #define DMAE_CHANNEL(a, b) \ | ||
63 | { \ | ||
64 | .offset = (a) - 0x20, \ | ||
65 | .dmars = (a) - 0x20 + 0x40, \ | ||
66 | .chclr_bit = (b), \ | ||
67 | .chclr_offset = 0x80 - 0x20, \ | ||
68 | } | ||
69 | |||
70 | static const struct sh_dmae_channel r8a7790_audio_dmac_channels[] = { | ||
71 | DMAE_CHANNEL(0x8000, 0), | ||
72 | DMAE_CHANNEL(0x8080, 1), | ||
73 | DMAE_CHANNEL(0x8100, 2), | ||
74 | DMAE_CHANNEL(0x8180, 3), | ||
75 | DMAE_CHANNEL(0x8200, 4), | ||
76 | DMAE_CHANNEL(0x8280, 5), | ||
77 | DMAE_CHANNEL(0x8300, 6), | ||
78 | DMAE_CHANNEL(0x8380, 7), | ||
79 | DMAE_CHANNEL(0x8400, 8), | ||
80 | DMAE_CHANNEL(0x8480, 9), | ||
81 | DMAE_CHANNEL(0x8500, 10), | ||
82 | DMAE_CHANNEL(0x8580, 11), | ||
83 | DMAE_CHANNEL(0x8600, 12), | ||
84 | }; | ||
85 | |||
86 | static struct sh_dmae_pdata r8a7790_audio_dmac_platform_data = { | ||
87 | .slave = r8a7790_audio_dmac_slaves, | ||
88 | .slave_num = ARRAY_SIZE(r8a7790_audio_dmac_slaves), | ||
89 | .channel = r8a7790_audio_dmac_channels, | ||
90 | .channel_num = ARRAY_SIZE(r8a7790_audio_dmac_channels), | ||
91 | .ts_low_shift = TS_LOW_SHIFT, | ||
92 | .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, | ||
93 | .ts_high_shift = TS_HI_SHIFT, | ||
94 | .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, | ||
95 | .ts_shift = dma_ts_shift, | ||
96 | .ts_shift_num = ARRAY_SIZE(dma_ts_shift), | ||
97 | .dmaor_init = DMAOR_DME, | ||
98 | .chclr_present = 1, | ||
99 | .chclr_bitwise = 1, | ||
100 | }; | ||
101 | |||
102 | static struct resource r8a7790_audio_dmac_resources[] = { | ||
103 | /* Channel registers and DMAOR for low */ | ||
104 | DEFINE_RES_MEM(0xec700020, 0x8663 - 0x20), | ||
105 | DEFINE_RES_IRQ(gic_spi(346)), | ||
106 | DEFINE_RES_NAMED(gic_spi(320), 13, NULL, IORESOURCE_IRQ), | ||
107 | |||
108 | /* Channel registers and DMAOR for hi */ | ||
109 | DEFINE_RES_MEM(0xec720020, 0x8663 - 0x20), /* hi */ | ||
110 | DEFINE_RES_IRQ(gic_spi(347)), | ||
111 | DEFINE_RES_NAMED(gic_spi(333), 13, NULL, IORESOURCE_IRQ), | ||
112 | }; | ||
113 | |||
114 | #define r8a7790_register_audio_dmac(id) \ | ||
115 | platform_device_register_resndata( \ | ||
116 | &platform_bus, "sh-dma-engine", id, \ | ||
117 | &r8a7790_audio_dmac_resources[id * 3], 3, \ | ||
118 | &r8a7790_audio_dmac_platform_data, \ | ||
119 | sizeof(r8a7790_audio_dmac_platform_data)) | ||
120 | |||
33 | static const struct resource pfc_resources[] __initconst = { | 121 | static const struct resource pfc_resources[] __initconst = { |
34 | DEFINE_RES_MEM(0xe6060000, 0x250), | 122 | DEFINE_RES_MEM(0xe6060000, 0x250), |
35 | }; | 123 | }; |
@@ -101,6 +189,8 @@ void __init r8a7790_pinmux_init(void) | |||
101 | r8a7790_register_i2c(1); | 189 | r8a7790_register_i2c(1); |
102 | r8a7790_register_i2c(2); | 190 | r8a7790_register_i2c(2); |
103 | r8a7790_register_i2c(3); | 191 | r8a7790_register_i2c(3); |
192 | r8a7790_register_audio_dmac(0); | ||
193 | r8a7790_register_audio_dmac(1); | ||
104 | } | 194 | } |
105 | 195 | ||
106 | #define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \ | 196 | #define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \ |
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index a335126ae18f..f2c89fb8fca9 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -108,7 +108,7 @@ void __init versatile_init_irq(void) | |||
108 | 108 | ||
109 | np = of_find_matching_node_by_address(NULL, vic_of_match, | 109 | np = of_find_matching_node_by_address(NULL, vic_of_match, |
110 | VERSATILE_VIC_BASE); | 110 | VERSATILE_VIC_BASE); |
111 | __vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0, np); | 111 | __vic_init(VA_VIC_BASE, 0, IRQ_VIC_START, ~0, 0, np); |
112 | 112 | ||
113 | writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); | 113 | writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); |
114 | 114 | ||
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c index 830ff07f3385..3ec6e8e8d368 100644 --- a/arch/arm/plat-orion/common.c +++ b/arch/arm/plat-orion/common.c | |||
@@ -595,14 +595,16 @@ void __init orion_spi_1_init(unsigned long mapbase) | |||
595 | /***************************************************************************** | 595 | /***************************************************************************** |
596 | * Watchdog | 596 | * Watchdog |
597 | ****************************************************************************/ | 597 | ****************************************************************************/ |
598 | static struct resource orion_wdt_resource = | 598 | static struct resource orion_wdt_resource[] = { |
599 | DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28); | 599 | DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04), |
600 | DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04), | ||
601 | }; | ||
600 | 602 | ||
601 | static struct platform_device orion_wdt_device = { | 603 | static struct platform_device orion_wdt_device = { |
602 | .name = "orion_wdt", | 604 | .name = "orion_wdt", |
603 | .id = -1, | 605 | .id = -1, |
604 | .num_resources = 1, | 606 | .num_resources = ARRAY_SIZE(orion_wdt_resource), |
605 | .resource = &orion_wdt_resource, | 607 | .resource = orion_wdt_resource, |
606 | }; | 608 | }; |
607 | 609 | ||
608 | void __init orion_wdt_init(void) | 610 | void __init orion_wdt_init(void) |
diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile index 22fb66590dcd..dba48a5d5bb9 100644 --- a/arch/avr32/Makefile +++ b/arch/avr32/Makefile | |||
@@ -11,7 +11,7 @@ all: uImage vmlinux.elf | |||
11 | 11 | ||
12 | KBUILD_DEFCONFIG := atstk1002_defconfig | 12 | KBUILD_DEFCONFIG := atstk1002_defconfig |
13 | 13 | ||
14 | KBUILD_CFLAGS += -pipe -fno-builtin -mno-pic | 14 | KBUILD_CFLAGS += -pipe -fno-builtin -mno-pic -D__linux__ |
15 | KBUILD_AFLAGS += -mrelax -mno-pic | 15 | KBUILD_AFLAGS += -mrelax -mno-pic |
16 | KBUILD_CFLAGS_MODULE += -mno-relax | 16 | KBUILD_CFLAGS_MODULE += -mno-relax |
17 | LDFLAGS_vmlinux += --relax | 17 | LDFLAGS_vmlinux += --relax |
diff --git a/arch/avr32/boards/mimc200/fram.c b/arch/avr32/boards/mimc200/fram.c index 9764a1a1073e..c1466a872b9c 100644 --- a/arch/avr32/boards/mimc200/fram.c +++ b/arch/avr32/boards/mimc200/fram.c | |||
@@ -11,6 +11,7 @@ | |||
11 | #define FRAM_VERSION "1.0" | 11 | #define FRAM_VERSION "1.0" |
12 | 12 | ||
13 | #include <linux/miscdevice.h> | 13 | #include <linux/miscdevice.h> |
14 | #include <linux/module.h> | ||
14 | #include <linux/proc_fs.h> | 15 | #include <linux/proc_fs.h> |
15 | #include <linux/mm.h> | 16 | #include <linux/mm.h> |
16 | #include <linux/io.h> | 17 | #include <linux/io.h> |
diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild index cfb9fe1b8df9..c7c64a63c29f 100644 --- a/arch/avr32/include/asm/Kbuild +++ b/arch/avr32/include/asm/Kbuild | |||
@@ -17,5 +17,6 @@ generic-y += scatterlist.h | |||
17 | generic-y += sections.h | 17 | generic-y += sections.h |
18 | generic-y += topology.h | 18 | generic-y += topology.h |
19 | generic-y += trace_clock.h | 19 | generic-y += trace_clock.h |
20 | generic-y += vga.h | ||
20 | generic-y += xor.h | 21 | generic-y += xor.h |
21 | generic-y += hash.h | 22 | generic-y += hash.h |
diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h index fc6483f83ccc..4f5ec2bb7172 100644 --- a/arch/avr32/include/asm/io.h +++ b/arch/avr32/include/asm/io.h | |||
@@ -295,6 +295,8 @@ extern void __iounmap(void __iomem *addr); | |||
295 | #define iounmap(addr) \ | 295 | #define iounmap(addr) \ |
296 | __iounmap(addr) | 296 | __iounmap(addr) |
297 | 297 | ||
298 | #define ioremap_wc ioremap_nocache | ||
299 | |||
298 | #define cached(addr) P1SEGADDR(addr) | 300 | #define cached(addr) P1SEGADDR(addr) |
299 | #define uncached(addr) P2SEGADDR(addr) | 301 | #define uncached(addr) P2SEGADDR(addr) |
300 | 302 | ||
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h index 9e39ceb1d19f..d4dd41fb951b 100644 --- a/arch/powerpc/include/asm/eeh.h +++ b/arch/powerpc/include/asm/eeh.h | |||
@@ -172,10 +172,20 @@ struct eeh_ops { | |||
172 | }; | 172 | }; |
173 | 173 | ||
174 | extern struct eeh_ops *eeh_ops; | 174 | extern struct eeh_ops *eeh_ops; |
175 | extern int eeh_subsystem_enabled; | 175 | extern bool eeh_subsystem_enabled; |
176 | extern raw_spinlock_t confirm_error_lock; | 176 | extern raw_spinlock_t confirm_error_lock; |
177 | extern int eeh_probe_mode; | 177 | extern int eeh_probe_mode; |
178 | 178 | ||
179 | static inline bool eeh_enabled(void) | ||
180 | { | ||
181 | return eeh_subsystem_enabled; | ||
182 | } | ||
183 | |||
184 | static inline void eeh_set_enable(bool mode) | ||
185 | { | ||
186 | eeh_subsystem_enabled = mode; | ||
187 | } | ||
188 | |||
179 | #define EEH_PROBE_MODE_DEV (1<<0) /* From PCI device */ | 189 | #define EEH_PROBE_MODE_DEV (1<<0) /* From PCI device */ |
180 | #define EEH_PROBE_MODE_DEVTREE (1<<1) /* From device tree */ | 190 | #define EEH_PROBE_MODE_DEVTREE (1<<1) /* From device tree */ |
181 | 191 | ||
@@ -246,7 +256,7 @@ void eeh_remove_device(struct pci_dev *); | |||
246 | * If this macro yields TRUE, the caller relays to eeh_check_failure() | 256 | * If this macro yields TRUE, the caller relays to eeh_check_failure() |
247 | * which does further tests out of line. | 257 | * which does further tests out of line. |
248 | */ | 258 | */ |
249 | #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled) | 259 | #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_enabled()) |
250 | 260 | ||
251 | /* | 261 | /* |
252 | * Reads from a device which has been isolated by EEH will return | 262 | * Reads from a device which has been isolated by EEH will return |
@@ -257,6 +267,13 @@ void eeh_remove_device(struct pci_dev *); | |||
257 | 267 | ||
258 | #else /* !CONFIG_EEH */ | 268 | #else /* !CONFIG_EEH */ |
259 | 269 | ||
270 | static inline bool eeh_enabled(void) | ||
271 | { | ||
272 | return false; | ||
273 | } | ||
274 | |||
275 | static inline void eeh_set_enable(bool mode) { } | ||
276 | |||
260 | static inline int eeh_init(void) | 277 | static inline int eeh_init(void) |
261 | { | 278 | { |
262 | return 0; | 279 | return 0; |
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h index d750336b171d..623f2971ce0e 100644 --- a/arch/powerpc/include/asm/hugetlb.h +++ b/arch/powerpc/include/asm/hugetlb.h | |||
@@ -127,7 +127,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, | |||
127 | unsigned long addr, pte_t *ptep) | 127 | unsigned long addr, pte_t *ptep) |
128 | { | 128 | { |
129 | #ifdef CONFIG_PPC64 | 129 | #ifdef CONFIG_PPC64 |
130 | return __pte(pte_update(mm, addr, ptep, ~0UL, 1)); | 130 | return __pte(pte_update(mm, addr, ptep, ~0UL, 0, 1)); |
131 | #else | 131 | #else |
132 | return __pte(pte_update(ptep, ~0UL, 0)); | 132 | return __pte(pte_update(ptep, ~0UL, 0)); |
133 | #endif | 133 | #endif |
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h index bc141c950b1e..eb9261024f51 100644 --- a/arch/powerpc/include/asm/pgtable-ppc64.h +++ b/arch/powerpc/include/asm/pgtable-ppc64.h | |||
@@ -195,6 +195,7 @@ extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr, | |||
195 | static inline unsigned long pte_update(struct mm_struct *mm, | 195 | static inline unsigned long pte_update(struct mm_struct *mm, |
196 | unsigned long addr, | 196 | unsigned long addr, |
197 | pte_t *ptep, unsigned long clr, | 197 | pte_t *ptep, unsigned long clr, |
198 | unsigned long set, | ||
198 | int huge) | 199 | int huge) |
199 | { | 200 | { |
200 | #ifdef PTE_ATOMIC_UPDATES | 201 | #ifdef PTE_ATOMIC_UPDATES |
@@ -205,14 +206,15 @@ static inline unsigned long pte_update(struct mm_struct *mm, | |||
205 | andi. %1,%0,%6\n\ | 206 | andi. %1,%0,%6\n\ |
206 | bne- 1b \n\ | 207 | bne- 1b \n\ |
207 | andc %1,%0,%4 \n\ | 208 | andc %1,%0,%4 \n\ |
209 | or %1,%1,%7\n\ | ||
208 | stdcx. %1,0,%3 \n\ | 210 | stdcx. %1,0,%3 \n\ |
209 | bne- 1b" | 211 | bne- 1b" |
210 | : "=&r" (old), "=&r" (tmp), "=m" (*ptep) | 212 | : "=&r" (old), "=&r" (tmp), "=m" (*ptep) |
211 | : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY) | 213 | : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY), "r" (set) |
212 | : "cc" ); | 214 | : "cc" ); |
213 | #else | 215 | #else |
214 | unsigned long old = pte_val(*ptep); | 216 | unsigned long old = pte_val(*ptep); |
215 | *ptep = __pte(old & ~clr); | 217 | *ptep = __pte((old & ~clr) | set); |
216 | #endif | 218 | #endif |
217 | /* huge pages use the old page table lock */ | 219 | /* huge pages use the old page table lock */ |
218 | if (!huge) | 220 | if (!huge) |
@@ -231,9 +233,9 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm, | |||
231 | { | 233 | { |
232 | unsigned long old; | 234 | unsigned long old; |
233 | 235 | ||
234 | if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) | 236 | if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) |
235 | return 0; | 237 | return 0; |
236 | old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0); | 238 | old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0); |
237 | return (old & _PAGE_ACCESSED) != 0; | 239 | return (old & _PAGE_ACCESSED) != 0; |
238 | } | 240 | } |
239 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | 241 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG |
@@ -252,7 +254,7 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, | |||
252 | if ((pte_val(*ptep) & _PAGE_RW) == 0) | 254 | if ((pte_val(*ptep) & _PAGE_RW) == 0) |
253 | return; | 255 | return; |
254 | 256 | ||
255 | pte_update(mm, addr, ptep, _PAGE_RW, 0); | 257 | pte_update(mm, addr, ptep, _PAGE_RW, 0, 0); |
256 | } | 258 | } |
257 | 259 | ||
258 | static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, | 260 | static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, |
@@ -261,7 +263,7 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, | |||
261 | if ((pte_val(*ptep) & _PAGE_RW) == 0) | 263 | if ((pte_val(*ptep) & _PAGE_RW) == 0) |
262 | return; | 264 | return; |
263 | 265 | ||
264 | pte_update(mm, addr, ptep, _PAGE_RW, 1); | 266 | pte_update(mm, addr, ptep, _PAGE_RW, 0, 1); |
265 | } | 267 | } |
266 | 268 | ||
267 | /* | 269 | /* |
@@ -284,14 +286,14 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, | |||
284 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, | 286 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, |
285 | unsigned long addr, pte_t *ptep) | 287 | unsigned long addr, pte_t *ptep) |
286 | { | 288 | { |
287 | unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0); | 289 | unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0); |
288 | return __pte(old); | 290 | return __pte(old); |
289 | } | 291 | } |
290 | 292 | ||
291 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, | 293 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, |
292 | pte_t * ptep) | 294 | pte_t * ptep) |
293 | { | 295 | { |
294 | pte_update(mm, addr, ptep, ~0UL, 0); | 296 | pte_update(mm, addr, ptep, ~0UL, 0, 0); |
295 | } | 297 | } |
296 | 298 | ||
297 | 299 | ||
@@ -506,7 +508,9 @@ extern int pmdp_set_access_flags(struct vm_area_struct *vma, | |||
506 | 508 | ||
507 | extern unsigned long pmd_hugepage_update(struct mm_struct *mm, | 509 | extern unsigned long pmd_hugepage_update(struct mm_struct *mm, |
508 | unsigned long addr, | 510 | unsigned long addr, |
509 | pmd_t *pmdp, unsigned long clr); | 511 | pmd_t *pmdp, |
512 | unsigned long clr, | ||
513 | unsigned long set); | ||
510 | 514 | ||
511 | static inline int __pmdp_test_and_clear_young(struct mm_struct *mm, | 515 | static inline int __pmdp_test_and_clear_young(struct mm_struct *mm, |
512 | unsigned long addr, pmd_t *pmdp) | 516 | unsigned long addr, pmd_t *pmdp) |
@@ -515,7 +519,7 @@ static inline int __pmdp_test_and_clear_young(struct mm_struct *mm, | |||
515 | 519 | ||
516 | if ((pmd_val(*pmdp) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) | 520 | if ((pmd_val(*pmdp) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) |
517 | return 0; | 521 | return 0; |
518 | old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED); | 522 | old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0); |
519 | return ((old & _PAGE_ACCESSED) != 0); | 523 | return ((old & _PAGE_ACCESSED) != 0); |
520 | } | 524 | } |
521 | 525 | ||
@@ -542,7 +546,7 @@ static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr, | |||
542 | if ((pmd_val(*pmdp) & _PAGE_RW) == 0) | 546 | if ((pmd_val(*pmdp) & _PAGE_RW) == 0) |
543 | return; | 547 | return; |
544 | 548 | ||
545 | pmd_hugepage_update(mm, addr, pmdp, _PAGE_RW); | 549 | pmd_hugepage_update(mm, addr, pmdp, _PAGE_RW, 0); |
546 | } | 550 | } |
547 | 551 | ||
548 | #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH | 552 | #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH |
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h index f83b6f3e1b39..3ebb188c3ff5 100644 --- a/arch/powerpc/include/asm/pgtable.h +++ b/arch/powerpc/include/asm/pgtable.h | |||
@@ -75,12 +75,34 @@ static inline pte_t pte_mknuma(pte_t pte) | |||
75 | return pte; | 75 | return pte; |
76 | } | 76 | } |
77 | 77 | ||
78 | #define ptep_set_numa ptep_set_numa | ||
79 | static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr, | ||
80 | pte_t *ptep) | ||
81 | { | ||
82 | if ((pte_val(*ptep) & _PAGE_PRESENT) == 0) | ||
83 | VM_BUG_ON(1); | ||
84 | |||
85 | pte_update(mm, addr, ptep, _PAGE_PRESENT, _PAGE_NUMA, 0); | ||
86 | return; | ||
87 | } | ||
88 | |||
78 | #define pmd_numa pmd_numa | 89 | #define pmd_numa pmd_numa |
79 | static inline int pmd_numa(pmd_t pmd) | 90 | static inline int pmd_numa(pmd_t pmd) |
80 | { | 91 | { |
81 | return pte_numa(pmd_pte(pmd)); | 92 | return pte_numa(pmd_pte(pmd)); |
82 | } | 93 | } |
83 | 94 | ||
95 | #define pmdp_set_numa pmdp_set_numa | ||
96 | static inline void pmdp_set_numa(struct mm_struct *mm, unsigned long addr, | ||
97 | pmd_t *pmdp) | ||
98 | { | ||
99 | if ((pmd_val(*pmdp) & _PAGE_PRESENT) == 0) | ||
100 | VM_BUG_ON(1); | ||
101 | |||
102 | pmd_hugepage_update(mm, addr, pmdp, _PAGE_PRESENT, _PAGE_NUMA); | ||
103 | return; | ||
104 | } | ||
105 | |||
84 | #define pmd_mknonnuma pmd_mknonnuma | 106 | #define pmd_mknonnuma pmd_mknonnuma |
85 | static inline pmd_t pmd_mknonnuma(pmd_t pmd) | 107 | static inline pmd_t pmd_mknonnuma(pmd_t pmd) |
86 | { | 108 | { |
diff --git a/arch/powerpc/include/asm/vdso.h b/arch/powerpc/include/asm/vdso.h index 0d9cecddf8a4..c53f5f6d1761 100644 --- a/arch/powerpc/include/asm/vdso.h +++ b/arch/powerpc/include/asm/vdso.h | |||
@@ -4,11 +4,11 @@ | |||
4 | #ifdef __KERNEL__ | 4 | #ifdef __KERNEL__ |
5 | 5 | ||
6 | /* Default link addresses for the vDSOs */ | 6 | /* Default link addresses for the vDSOs */ |
7 | #define VDSO32_LBASE 0x100000 | 7 | #define VDSO32_LBASE 0x0 |
8 | #define VDSO64_LBASE 0x100000 | 8 | #define VDSO64_LBASE 0x0 |
9 | 9 | ||
10 | /* Default map addresses for 32bit vDSO */ | 10 | /* Default map addresses for 32bit vDSO */ |
11 | #define VDSO32_MBASE VDSO32_LBASE | 11 | #define VDSO32_MBASE 0x100000 |
12 | 12 | ||
13 | #define VDSO_VERSION_STRING LINUX_2.6.15 | 13 | #define VDSO_VERSION_STRING LINUX_2.6.15 |
14 | 14 | ||
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c index 148db72a8c43..e7b76a6bf150 100644 --- a/arch/powerpc/kernel/eeh.c +++ b/arch/powerpc/kernel/eeh.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/pci.h> | 28 | #include <linux/pci.h> |
29 | #include <linux/proc_fs.h> | 29 | #include <linux/proc_fs.h> |
30 | #include <linux/rbtree.h> | 30 | #include <linux/rbtree.h> |
31 | #include <linux/reboot.h> | ||
31 | #include <linux/seq_file.h> | 32 | #include <linux/seq_file.h> |
32 | #include <linux/spinlock.h> | 33 | #include <linux/spinlock.h> |
33 | #include <linux/export.h> | 34 | #include <linux/export.h> |
@@ -89,7 +90,7 @@ | |||
89 | /* Platform dependent EEH operations */ | 90 | /* Platform dependent EEH operations */ |
90 | struct eeh_ops *eeh_ops = NULL; | 91 | struct eeh_ops *eeh_ops = NULL; |
91 | 92 | ||
92 | int eeh_subsystem_enabled; | 93 | bool eeh_subsystem_enabled = false; |
93 | EXPORT_SYMBOL(eeh_subsystem_enabled); | 94 | EXPORT_SYMBOL(eeh_subsystem_enabled); |
94 | 95 | ||
95 | /* | 96 | /* |
@@ -364,7 +365,7 @@ int eeh_dev_check_failure(struct eeh_dev *edev) | |||
364 | 365 | ||
365 | eeh_stats.total_mmio_ffs++; | 366 | eeh_stats.total_mmio_ffs++; |
366 | 367 | ||
367 | if (!eeh_subsystem_enabled) | 368 | if (!eeh_enabled()) |
368 | return 0; | 369 | return 0; |
369 | 370 | ||
370 | if (!edev) { | 371 | if (!edev) { |
@@ -747,6 +748,17 @@ int __exit eeh_ops_unregister(const char *name) | |||
747 | return -EEXIST; | 748 | return -EEXIST; |
748 | } | 749 | } |
749 | 750 | ||
751 | static int eeh_reboot_notifier(struct notifier_block *nb, | ||
752 | unsigned long action, void *unused) | ||
753 | { | ||
754 | eeh_set_enable(false); | ||
755 | return NOTIFY_DONE; | ||
756 | } | ||
757 | |||
758 | static struct notifier_block eeh_reboot_nb = { | ||
759 | .notifier_call = eeh_reboot_notifier, | ||
760 | }; | ||
761 | |||
750 | /** | 762 | /** |
751 | * eeh_init - EEH initialization | 763 | * eeh_init - EEH initialization |
752 | * | 764 | * |
@@ -778,6 +790,14 @@ int eeh_init(void) | |||
778 | if (machine_is(powernv) && cnt++ <= 0) | 790 | if (machine_is(powernv) && cnt++ <= 0) |
779 | return ret; | 791 | return ret; |
780 | 792 | ||
793 | /* Register reboot notifier */ | ||
794 | ret = register_reboot_notifier(&eeh_reboot_nb); | ||
795 | if (ret) { | ||
796 | pr_warn("%s: Failed to register notifier (%d)\n", | ||
797 | __func__, ret); | ||
798 | return ret; | ||
799 | } | ||
800 | |||
781 | /* call platform initialization function */ | 801 | /* call platform initialization function */ |
782 | if (!eeh_ops) { | 802 | if (!eeh_ops) { |
783 | pr_warning("%s: Platform EEH operation not found\n", | 803 | pr_warning("%s: Platform EEH operation not found\n", |
@@ -822,7 +842,7 @@ int eeh_init(void) | |||
822 | return ret; | 842 | return ret; |
823 | } | 843 | } |
824 | 844 | ||
825 | if (eeh_subsystem_enabled) | 845 | if (eeh_enabled()) |
826 | pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n"); | 846 | pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n"); |
827 | else | 847 | else |
828 | pr_warning("EEH: No capable adapters found\n"); | 848 | pr_warning("EEH: No capable adapters found\n"); |
@@ -897,7 +917,7 @@ void eeh_add_device_late(struct pci_dev *dev) | |||
897 | struct device_node *dn; | 917 | struct device_node *dn; |
898 | struct eeh_dev *edev; | 918 | struct eeh_dev *edev; |
899 | 919 | ||
900 | if (!dev || !eeh_subsystem_enabled) | 920 | if (!dev || !eeh_enabled()) |
901 | return; | 921 | return; |
902 | 922 | ||
903 | pr_debug("EEH: Adding device %s\n", pci_name(dev)); | 923 | pr_debug("EEH: Adding device %s\n", pci_name(dev)); |
@@ -1005,7 +1025,7 @@ void eeh_remove_device(struct pci_dev *dev) | |||
1005 | { | 1025 | { |
1006 | struct eeh_dev *edev; | 1026 | struct eeh_dev *edev; |
1007 | 1027 | ||
1008 | if (!dev || !eeh_subsystem_enabled) | 1028 | if (!dev || !eeh_enabled()) |
1009 | return; | 1029 | return; |
1010 | edev = pci_dev_to_eeh_dev(dev); | 1030 | edev = pci_dev_to_eeh_dev(dev); |
1011 | 1031 | ||
@@ -1045,7 +1065,7 @@ void eeh_remove_device(struct pci_dev *dev) | |||
1045 | 1065 | ||
1046 | static int proc_eeh_show(struct seq_file *m, void *v) | 1066 | static int proc_eeh_show(struct seq_file *m, void *v) |
1047 | { | 1067 | { |
1048 | if (0 == eeh_subsystem_enabled) { | 1068 | if (!eeh_enabled()) { |
1049 | seq_printf(m, "EEH Subsystem is globally disabled\n"); | 1069 | seq_printf(m, "EEH Subsystem is globally disabled\n"); |
1050 | seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs); | 1070 | seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs); |
1051 | } else { | 1071 | } else { |
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 879f09620f83..7c6bb4b17b49 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
@@ -57,11 +57,14 @@ _GLOBAL(call_do_softirq) | |||
57 | mtlr r0 | 57 | mtlr r0 |
58 | blr | 58 | blr |
59 | 59 | ||
60 | /* | ||
61 | * void call_do_irq(struct pt_regs *regs, struct thread_info *irqtp); | ||
62 | */ | ||
60 | _GLOBAL(call_do_irq) | 63 | _GLOBAL(call_do_irq) |
61 | mflr r0 | 64 | mflr r0 |
62 | stw r0,4(r1) | 65 | stw r0,4(r1) |
63 | lwz r10,THREAD+KSP_LIMIT(r2) | 66 | lwz r10,THREAD+KSP_LIMIT(r2) |
64 | addi r11,r3,THREAD_INFO_GAP | 67 | addi r11,r4,THREAD_INFO_GAP |
65 | stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4) | 68 | stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4) |
66 | mr r1,r4 | 69 | mr r1,r4 |
67 | stw r10,8(r1) | 70 | stw r10,8(r1) |
diff --git a/arch/powerpc/kernel/vdso32/vdso32_wrapper.S b/arch/powerpc/kernel/vdso32/vdso32_wrapper.S index 79683d0393f5..6ac107ac402a 100644 --- a/arch/powerpc/kernel/vdso32/vdso32_wrapper.S +++ b/arch/powerpc/kernel/vdso32/vdso32_wrapper.S | |||
@@ -6,7 +6,7 @@ | |||
6 | .globl vdso32_start, vdso32_end | 6 | .globl vdso32_start, vdso32_end |
7 | .balign PAGE_SIZE | 7 | .balign PAGE_SIZE |
8 | vdso32_start: | 8 | vdso32_start: |
9 | .incbin "arch/powerpc/kernel/vdso32/vdso32.so" | 9 | .incbin "arch/powerpc/kernel/vdso32/vdso32.so.dbg" |
10 | .balign PAGE_SIZE | 10 | .balign PAGE_SIZE |
11 | vdso32_end: | 11 | vdso32_end: |
12 | 12 | ||
diff --git a/arch/powerpc/kernel/vdso64/vdso64_wrapper.S b/arch/powerpc/kernel/vdso64/vdso64_wrapper.S index 8df9e2463007..df60fca6a13d 100644 --- a/arch/powerpc/kernel/vdso64/vdso64_wrapper.S +++ b/arch/powerpc/kernel/vdso64/vdso64_wrapper.S | |||
@@ -6,7 +6,7 @@ | |||
6 | .globl vdso64_start, vdso64_end | 6 | .globl vdso64_start, vdso64_end |
7 | .balign PAGE_SIZE | 7 | .balign PAGE_SIZE |
8 | vdso64_start: | 8 | vdso64_start: |
9 | .incbin "arch/powerpc/kernel/vdso64/vdso64.so" | 9 | .incbin "arch/powerpc/kernel/vdso64/vdso64.so.dbg" |
10 | .balign PAGE_SIZE | 10 | .balign PAGE_SIZE |
11 | vdso64_end: | 11 | vdso64_end: |
12 | 12 | ||
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c index 65b7b65e8708..62bf5e8e78da 100644 --- a/arch/powerpc/mm/pgtable_64.c +++ b/arch/powerpc/mm/pgtable_64.c | |||
@@ -510,7 +510,8 @@ int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address, | |||
510 | } | 510 | } |
511 | 511 | ||
512 | unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, | 512 | unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, |
513 | pmd_t *pmdp, unsigned long clr) | 513 | pmd_t *pmdp, unsigned long clr, |
514 | unsigned long set) | ||
514 | { | 515 | { |
515 | 516 | ||
516 | unsigned long old, tmp; | 517 | unsigned long old, tmp; |
@@ -526,14 +527,15 @@ unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, | |||
526 | andi. %1,%0,%6\n\ | 527 | andi. %1,%0,%6\n\ |
527 | bne- 1b \n\ | 528 | bne- 1b \n\ |
528 | andc %1,%0,%4 \n\ | 529 | andc %1,%0,%4 \n\ |
530 | or %1,%1,%7\n\ | ||
529 | stdcx. %1,0,%3 \n\ | 531 | stdcx. %1,0,%3 \n\ |
530 | bne- 1b" | 532 | bne- 1b" |
531 | : "=&r" (old), "=&r" (tmp), "=m" (*pmdp) | 533 | : "=&r" (old), "=&r" (tmp), "=m" (*pmdp) |
532 | : "r" (pmdp), "r" (clr), "m" (*pmdp), "i" (_PAGE_BUSY) | 534 | : "r" (pmdp), "r" (clr), "m" (*pmdp), "i" (_PAGE_BUSY), "r" (set) |
533 | : "cc" ); | 535 | : "cc" ); |
534 | #else | 536 | #else |
535 | old = pmd_val(*pmdp); | 537 | old = pmd_val(*pmdp); |
536 | *pmdp = __pmd(old & ~clr); | 538 | *pmdp = __pmd((old & ~clr) | set); |
537 | #endif | 539 | #endif |
538 | if (old & _PAGE_HASHPTE) | 540 | if (old & _PAGE_HASHPTE) |
539 | hpte_do_hugepage_flush(mm, addr, pmdp); | 541 | hpte_do_hugepage_flush(mm, addr, pmdp); |
@@ -708,7 +710,7 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr, | |||
708 | void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, | 710 | void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, |
709 | pmd_t *pmdp) | 711 | pmd_t *pmdp) |
710 | { | 712 | { |
711 | pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT); | 713 | pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, 0); |
712 | } | 714 | } |
713 | 715 | ||
714 | /* | 716 | /* |
@@ -835,7 +837,7 @@ pmd_t pmdp_get_and_clear(struct mm_struct *mm, | |||
835 | unsigned long old; | 837 | unsigned long old; |
836 | pgtable_t *pgtable_slot; | 838 | pgtable_t *pgtable_slot; |
837 | 839 | ||
838 | old = pmd_hugepage_update(mm, addr, pmdp, ~0UL); | 840 | old = pmd_hugepage_update(mm, addr, pmdp, ~0UL, 0); |
839 | old_pmd = __pmd(old); | 841 | old_pmd = __pmd(old); |
840 | /* | 842 | /* |
841 | * We have pmd == none and we are holding page_table_lock. | 843 | * We have pmd == none and we are holding page_table_lock. |
diff --git a/arch/powerpc/mm/subpage-prot.c b/arch/powerpc/mm/subpage-prot.c index a770df2dae70..6c0b1f5f8d2c 100644 --- a/arch/powerpc/mm/subpage-prot.c +++ b/arch/powerpc/mm/subpage-prot.c | |||
@@ -78,7 +78,7 @@ static void hpte_flush_range(struct mm_struct *mm, unsigned long addr, | |||
78 | pte = pte_offset_map_lock(mm, pmd, addr, &ptl); | 78 | pte = pte_offset_map_lock(mm, pmd, addr, &ptl); |
79 | arch_enter_lazy_mmu_mode(); | 79 | arch_enter_lazy_mmu_mode(); |
80 | for (; npages > 0; --npages) { | 80 | for (; npages > 0; --npages) { |
81 | pte_update(mm, addr, pte, 0, 0); | 81 | pte_update(mm, addr, pte, 0, 0, 0); |
82 | addr += PAGE_SIZE; | 82 | addr += PAGE_SIZE; |
83 | ++pte; | 83 | ++pte; |
84 | } | 84 | } |
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c index e1e71618b70c..f51474336460 100644 --- a/arch/powerpc/platforms/powernv/eeh-ioda.c +++ b/arch/powerpc/platforms/powernv/eeh-ioda.c | |||
@@ -44,7 +44,8 @@ static int ioda_eeh_event(struct notifier_block *nb, | |||
44 | 44 | ||
45 | /* We simply send special EEH event */ | 45 | /* We simply send special EEH event */ |
46 | if ((changed_evts & OPAL_EVENT_PCI_ERROR) && | 46 | if ((changed_evts & OPAL_EVENT_PCI_ERROR) && |
47 | (events & OPAL_EVENT_PCI_ERROR)) | 47 | (events & OPAL_EVENT_PCI_ERROR) && |
48 | eeh_enabled()) | ||
48 | eeh_send_failure_event(NULL); | 49 | eeh_send_failure_event(NULL); |
49 | 50 | ||
50 | return 0; | 51 | return 0; |
@@ -489,8 +490,7 @@ static int ioda_eeh_bridge_reset(struct pci_controller *hose, | |||
489 | static int ioda_eeh_reset(struct eeh_pe *pe, int option) | 490 | static int ioda_eeh_reset(struct eeh_pe *pe, int option) |
490 | { | 491 | { |
491 | struct pci_controller *hose = pe->phb; | 492 | struct pci_controller *hose = pe->phb; |
492 | struct eeh_dev *edev; | 493 | struct pci_bus *bus; |
493 | struct pci_dev *dev; | ||
494 | int ret; | 494 | int ret; |
495 | 495 | ||
496 | /* | 496 | /* |
@@ -519,31 +519,11 @@ static int ioda_eeh_reset(struct eeh_pe *pe, int option) | |||
519 | if (pe->type & EEH_PE_PHB) { | 519 | if (pe->type & EEH_PE_PHB) { |
520 | ret = ioda_eeh_phb_reset(hose, option); | 520 | ret = ioda_eeh_phb_reset(hose, option); |
521 | } else { | 521 | } else { |
522 | if (pe->type & EEH_PE_DEVICE) { | 522 | bus = eeh_pe_bus_get(pe); |
523 | /* | 523 | if (pci_is_root_bus(bus)) |
524 | * If it's device PE, we didn't refer to the parent | ||
525 | * PCI bus yet. So we have to figure it out indirectly. | ||
526 | */ | ||
527 | edev = list_first_entry(&pe->edevs, | ||
528 | struct eeh_dev, list); | ||
529 | dev = eeh_dev_to_pci_dev(edev); | ||
530 | dev = dev->bus->self; | ||
531 | } else { | ||
532 | /* | ||
533 | * If it's bus PE, the parent PCI bus is already there | ||
534 | * and just pick it up. | ||
535 | */ | ||
536 | dev = pe->bus->self; | ||
537 | } | ||
538 | |||
539 | /* | ||
540 | * Do reset based on the fact that the direct upstream bridge | ||
541 | * is root bridge (port) or not. | ||
542 | */ | ||
543 | if (dev->bus->number == 0) | ||
544 | ret = ioda_eeh_root_reset(hose, option); | 524 | ret = ioda_eeh_root_reset(hose, option); |
545 | else | 525 | else |
546 | ret = ioda_eeh_bridge_reset(hose, dev, option); | 526 | ret = ioda_eeh_bridge_reset(hose, bus->self, option); |
547 | } | 527 | } |
548 | 528 | ||
549 | return ret; | 529 | return ret; |
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c index a79fddc5e74e..a59788e83b8b 100644 --- a/arch/powerpc/platforms/powernv/eeh-powernv.c +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c | |||
@@ -145,7 +145,7 @@ static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag) | |||
145 | * Enable EEH explicitly so that we will do EEH check | 145 | * Enable EEH explicitly so that we will do EEH check |
146 | * while accessing I/O stuff | 146 | * while accessing I/O stuff |
147 | */ | 147 | */ |
148 | eeh_subsystem_enabled = 1; | 148 | eeh_set_enable(true); |
149 | 149 | ||
150 | /* Save memory bars */ | 150 | /* Save memory bars */ |
151 | eeh_save_bars(edev); | 151 | eeh_save_bars(edev); |
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c index 9ef3cc8ebc11..8a8f0472d98f 100644 --- a/arch/powerpc/platforms/pseries/eeh_pseries.c +++ b/arch/powerpc/platforms/pseries/eeh_pseries.c | |||
@@ -265,7 +265,7 @@ static void *pseries_eeh_of_probe(struct device_node *dn, void *flag) | |||
265 | enable = 1; | 265 | enable = 1; |
266 | 266 | ||
267 | if (enable) { | 267 | if (enable) { |
268 | eeh_subsystem_enabled = 1; | 268 | eeh_set_enable(true); |
269 | eeh_add_to_parent_pe(edev); | 269 | eeh_add_to_parent_pe(edev); |
270 | 270 | ||
271 | pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n", | 271 | pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n", |
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c index 70670a2d9cf2..c413ec158ff5 100644 --- a/arch/powerpc/platforms/pseries/pci.c +++ b/arch/powerpc/platforms/pseries/pci.c | |||
@@ -113,7 +113,8 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) | |||
113 | { | 113 | { |
114 | struct device_node *dn, *pdn; | 114 | struct device_node *dn, *pdn; |
115 | struct pci_bus *bus; | 115 | struct pci_bus *bus; |
116 | const __be32 *pcie_link_speed_stats; | 116 | u32 pcie_link_speed_stats[2]; |
117 | int rc; | ||
117 | 118 | ||
118 | bus = bridge->bus; | 119 | bus = bridge->bus; |
119 | 120 | ||
@@ -122,38 +123,45 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) | |||
122 | return 0; | 123 | return 0; |
123 | 124 | ||
124 | for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) { | 125 | for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) { |
125 | pcie_link_speed_stats = of_get_property(pdn, | 126 | rc = of_property_read_u32_array(pdn, |
126 | "ibm,pcie-link-speed-stats", NULL); | 127 | "ibm,pcie-link-speed-stats", |
127 | if (pcie_link_speed_stats) | 128 | &pcie_link_speed_stats[0], 2); |
129 | if (!rc) | ||
128 | break; | 130 | break; |
129 | } | 131 | } |
130 | 132 | ||
131 | of_node_put(pdn); | 133 | of_node_put(pdn); |
132 | 134 | ||
133 | if (!pcie_link_speed_stats) { | 135 | if (rc) { |
134 | pr_err("no ibm,pcie-link-speed-stats property\n"); | 136 | pr_err("no ibm,pcie-link-speed-stats property\n"); |
135 | return 0; | 137 | return 0; |
136 | } | 138 | } |
137 | 139 | ||
138 | switch (be32_to_cpup(pcie_link_speed_stats)) { | 140 | switch (pcie_link_speed_stats[0]) { |
139 | case 0x01: | 141 | case 0x01: |
140 | bus->max_bus_speed = PCIE_SPEED_2_5GT; | 142 | bus->max_bus_speed = PCIE_SPEED_2_5GT; |
141 | break; | 143 | break; |
142 | case 0x02: | 144 | case 0x02: |
143 | bus->max_bus_speed = PCIE_SPEED_5_0GT; | 145 | bus->max_bus_speed = PCIE_SPEED_5_0GT; |
144 | break; | 146 | break; |
147 | case 0x04: | ||
148 | bus->max_bus_speed = PCIE_SPEED_8_0GT; | ||
149 | break; | ||
145 | default: | 150 | default: |
146 | bus->max_bus_speed = PCI_SPEED_UNKNOWN; | 151 | bus->max_bus_speed = PCI_SPEED_UNKNOWN; |
147 | break; | 152 | break; |
148 | } | 153 | } |
149 | 154 | ||
150 | switch (be32_to_cpup(pcie_link_speed_stats)) { | 155 | switch (pcie_link_speed_stats[1]) { |
151 | case 0x01: | 156 | case 0x01: |
152 | bus->cur_bus_speed = PCIE_SPEED_2_5GT; | 157 | bus->cur_bus_speed = PCIE_SPEED_2_5GT; |
153 | break; | 158 | break; |
154 | case 0x02: | 159 | case 0x02: |
155 | bus->cur_bus_speed = PCIE_SPEED_5_0GT; | 160 | bus->cur_bus_speed = PCIE_SPEED_5_0GT; |
156 | break; | 161 | break; |
162 | case 0x04: | ||
163 | bus->cur_bus_speed = PCIE_SPEED_8_0GT; | ||
164 | break; | ||
157 | default: | 165 | default: |
158 | bus->cur_bus_speed = PCI_SPEED_UNKNOWN; | 166 | bus->cur_bus_speed = PCI_SPEED_UNKNOWN; |
159 | break; | 167 | break; |
diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c index 1e16cbd61da2..61d6d62cc0d3 100644 --- a/drivers/base/dma-buf.c +++ b/drivers/base/dma-buf.c | |||
@@ -616,36 +616,35 @@ static int dma_buf_describe(struct seq_file *s) | |||
616 | if (ret) | 616 | if (ret) |
617 | return ret; | 617 | return ret; |
618 | 618 | ||
619 | seq_printf(s, "\nDma-buf Objects:\n"); | 619 | seq_puts(s, "\nDma-buf Objects:\n"); |
620 | seq_printf(s, "\texp_name\tsize\tflags\tmode\tcount\n"); | 620 | seq_puts(s, "size\tflags\tmode\tcount\texp_name\n"); |
621 | 621 | ||
622 | list_for_each_entry(buf_obj, &db_list.head, list_node) { | 622 | list_for_each_entry(buf_obj, &db_list.head, list_node) { |
623 | ret = mutex_lock_interruptible(&buf_obj->lock); | 623 | ret = mutex_lock_interruptible(&buf_obj->lock); |
624 | 624 | ||
625 | if (ret) { | 625 | if (ret) { |
626 | seq_printf(s, | 626 | seq_puts(s, |
627 | "\tERROR locking buffer object: skipping\n"); | 627 | "\tERROR locking buffer object: skipping\n"); |
628 | continue; | 628 | continue; |
629 | } | 629 | } |
630 | 630 | ||
631 | seq_printf(s, "\t"); | 631 | seq_printf(s, "%08zu\t%08x\t%08x\t%08ld\t%s\n", |
632 | 632 | buf_obj->size, | |
633 | seq_printf(s, "\t%s\t%08zu\t%08x\t%08x\t%08ld\n", | ||
634 | buf_obj->exp_name, buf_obj->size, | ||
635 | buf_obj->file->f_flags, buf_obj->file->f_mode, | 633 | buf_obj->file->f_flags, buf_obj->file->f_mode, |
636 | (long)(buf_obj->file->f_count.counter)); | 634 | (long)(buf_obj->file->f_count.counter), |
635 | buf_obj->exp_name); | ||
637 | 636 | ||
638 | seq_printf(s, "\t\tAttached Devices:\n"); | 637 | seq_puts(s, "\tAttached Devices:\n"); |
639 | attach_count = 0; | 638 | attach_count = 0; |
640 | 639 | ||
641 | list_for_each_entry(attach_obj, &buf_obj->attachments, node) { | 640 | list_for_each_entry(attach_obj, &buf_obj->attachments, node) { |
642 | seq_printf(s, "\t\t"); | 641 | seq_puts(s, "\t"); |
643 | 642 | ||
644 | seq_printf(s, "%s\n", attach_obj->dev->init_name); | 643 | seq_printf(s, "%s\n", dev_name(attach_obj->dev)); |
645 | attach_count++; | 644 | attach_count++; |
646 | } | 645 | } |
647 | 646 | ||
648 | seq_printf(s, "\n\t\tTotal %d devices attached\n", | 647 | seq_printf(s, "Total %d devices attached\n\n", |
649 | attach_count); | 648 | attach_count); |
650 | 649 | ||
651 | count++; | 650 | count++; |
diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c index 962fd35cbd8d..5a86da97a70b 100644 --- a/drivers/bus/arm-cci.c +++ b/drivers/bus/arm-cci.c | |||
@@ -31,7 +31,6 @@ | |||
31 | 31 | ||
32 | #define DRIVER_NAME "CCI-400" | 32 | #define DRIVER_NAME "CCI-400" |
33 | #define DRIVER_NAME_PMU DRIVER_NAME " PMU" | 33 | #define DRIVER_NAME_PMU DRIVER_NAME " PMU" |
34 | #define PMU_NAME "CCI_400" | ||
35 | 34 | ||
36 | #define CCI_PORT_CTRL 0x0 | 35 | #define CCI_PORT_CTRL 0x0 |
37 | #define CCI_CTRL_STATUS 0xc | 36 | #define CCI_CTRL_STATUS 0xc |
@@ -88,8 +87,7 @@ static unsigned long cci_ctrl_phys; | |||
88 | 87 | ||
89 | #define CCI_REV_R0 0 | 88 | #define CCI_REV_R0 0 |
90 | #define CCI_REV_R1 1 | 89 | #define CCI_REV_R1 1 |
91 | #define CCI_REV_R0_P4 4 | 90 | #define CCI_REV_R1_PX 5 |
92 | #define CCI_REV_R1_P2 6 | ||
93 | 91 | ||
94 | #define CCI_PMU_EVT_SEL 0x000 | 92 | #define CCI_PMU_EVT_SEL 0x000 |
95 | #define CCI_PMU_CNTR 0x004 | 93 | #define CCI_PMU_CNTR 0x004 |
@@ -163,6 +161,15 @@ static struct pmu_port_event_ranges port_event_range[] = { | |||
163 | }, | 161 | }, |
164 | }; | 162 | }; |
165 | 163 | ||
164 | /* | ||
165 | * Export different PMU names for the different revisions so userspace knows | ||
166 | * because the event ids are different | ||
167 | */ | ||
168 | static char *const pmu_names[] = { | ||
169 | [CCI_REV_R0] = "CCI_400", | ||
170 | [CCI_REV_R1] = "CCI_400_r1", | ||
171 | }; | ||
172 | |||
166 | struct cci_pmu_drv_data { | 173 | struct cci_pmu_drv_data { |
167 | void __iomem *base; | 174 | void __iomem *base; |
168 | struct arm_pmu *cci_pmu; | 175 | struct arm_pmu *cci_pmu; |
@@ -193,21 +200,16 @@ static int probe_cci_revision(void) | |||
193 | rev = readl_relaxed(cci_ctrl_base + CCI_PID2) & CCI_PID2_REV_MASK; | 200 | rev = readl_relaxed(cci_ctrl_base + CCI_PID2) & CCI_PID2_REV_MASK; |
194 | rev >>= CCI_PID2_REV_SHIFT; | 201 | rev >>= CCI_PID2_REV_SHIFT; |
195 | 202 | ||
196 | if (rev <= CCI_REV_R0_P4) | 203 | if (rev < CCI_REV_R1_PX) |
197 | return CCI_REV_R0; | 204 | return CCI_REV_R0; |
198 | else if (rev <= CCI_REV_R1_P2) | 205 | else |
199 | return CCI_REV_R1; | 206 | return CCI_REV_R1; |
200 | |||
201 | return -ENOENT; | ||
202 | } | 207 | } |
203 | 208 | ||
204 | static struct pmu_port_event_ranges *port_range_by_rev(void) | 209 | static struct pmu_port_event_ranges *port_range_by_rev(void) |
205 | { | 210 | { |
206 | int rev = probe_cci_revision(); | 211 | int rev = probe_cci_revision(); |
207 | 212 | ||
208 | if (rev < 0) | ||
209 | return NULL; | ||
210 | |||
211 | return &port_event_range[rev]; | 213 | return &port_event_range[rev]; |
212 | } | 214 | } |
213 | 215 | ||
@@ -526,7 +528,7 @@ static void pmu_write_counter(struct perf_event *event, u32 value) | |||
526 | static int cci_pmu_init(struct arm_pmu *cci_pmu, struct platform_device *pdev) | 528 | static int cci_pmu_init(struct arm_pmu *cci_pmu, struct platform_device *pdev) |
527 | { | 529 | { |
528 | *cci_pmu = (struct arm_pmu){ | 530 | *cci_pmu = (struct arm_pmu){ |
529 | .name = PMU_NAME, | 531 | .name = pmu_names[probe_cci_revision()], |
530 | .max_period = (1LLU << 32) - 1, | 532 | .max_period = (1LLU << 32) - 1, |
531 | .get_hw_events = pmu_get_hw_events, | 533 | .get_hw_events = pmu_get_hw_events, |
532 | .get_event_idx = pmu_get_event_idx, | 534 | .get_event_idx = pmu_get_event_idx, |
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 2f2b08457c67..244759bbd7b7 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig | |||
@@ -342,11 +342,11 @@ config HW_RANDOM_TPM | |||
342 | If unsure, say Y. | 342 | If unsure, say Y. |
343 | 343 | ||
344 | config HW_RANDOM_MSM | 344 | config HW_RANDOM_MSM |
345 | tristate "Qualcomm MSM Random Number Generator support" | 345 | tristate "Qualcomm SoCs Random Number Generator support" |
346 | depends on HW_RANDOM && ARCH_MSM | 346 | depends on HW_RANDOM && ARCH_QCOM |
347 | ---help--- | 347 | ---help--- |
348 | This driver provides kernel-side support for the Random Number | 348 | This driver provides kernel-side support for the Random Number |
349 | Generator hardware found on Qualcomm MSM SoCs. | 349 | Generator hardware found on Qualcomm SoCs. |
350 | 350 | ||
351 | To compile this driver as a module, choose M here. the | 351 | To compile this driver as a module, choose M here. the |
352 | module will be called msm-rng. | 352 | module will be called msm-rng. |
diff --git a/drivers/clk/versatile/clk-icst.c b/drivers/clk/versatile/clk-icst.c index 8cbfcf88fae3..a820b0cfcf57 100644 --- a/drivers/clk/versatile/clk-icst.c +++ b/drivers/clk/versatile/clk-icst.c | |||
@@ -33,7 +33,7 @@ struct clk_icst { | |||
33 | struct clk_hw hw; | 33 | struct clk_hw hw; |
34 | void __iomem *vcoreg; | 34 | void __iomem *vcoreg; |
35 | void __iomem *lockreg; | 35 | void __iomem *lockreg; |
36 | const struct icst_params *params; | 36 | struct icst_params *params; |
37 | unsigned long rate; | 37 | unsigned long rate; |
38 | }; | 38 | }; |
39 | 39 | ||
@@ -84,6 +84,8 @@ static unsigned long icst_recalc_rate(struct clk_hw *hw, | |||
84 | struct clk_icst *icst = to_icst(hw); | 84 | struct clk_icst *icst = to_icst(hw); |
85 | struct icst_vco vco; | 85 | struct icst_vco vco; |
86 | 86 | ||
87 | if (parent_rate) | ||
88 | icst->params->ref = parent_rate; | ||
87 | vco = vco_get(icst->vcoreg); | 89 | vco = vco_get(icst->vcoreg); |
88 | icst->rate = icst_hz(icst->params, vco); | 90 | icst->rate = icst_hz(icst->params, vco); |
89 | return icst->rate; | 91 | return icst->rate; |
@@ -105,6 +107,8 @@ static int icst_set_rate(struct clk_hw *hw, unsigned long rate, | |||
105 | struct clk_icst *icst = to_icst(hw); | 107 | struct clk_icst *icst = to_icst(hw); |
106 | struct icst_vco vco; | 108 | struct icst_vco vco; |
107 | 109 | ||
110 | if (parent_rate) | ||
111 | icst->params->ref = parent_rate; | ||
108 | vco = icst_hz_to_vco(icst->params, rate); | 112 | vco = icst_hz_to_vco(icst->params, rate); |
109 | icst->rate = icst_hz(icst->params, vco); | 113 | icst->rate = icst_hz(icst->params, vco); |
110 | vco_set(icst->lockreg, icst->vcoreg, vco); | 114 | vco_set(icst->lockreg, icst->vcoreg, vco); |
@@ -120,24 +124,33 @@ static const struct clk_ops icst_ops = { | |||
120 | struct clk *icst_clk_register(struct device *dev, | 124 | struct clk *icst_clk_register(struct device *dev, |
121 | const struct clk_icst_desc *desc, | 125 | const struct clk_icst_desc *desc, |
122 | const char *name, | 126 | const char *name, |
127 | const char *parent_name, | ||
123 | void __iomem *base) | 128 | void __iomem *base) |
124 | { | 129 | { |
125 | struct clk *clk; | 130 | struct clk *clk; |
126 | struct clk_icst *icst; | 131 | struct clk_icst *icst; |
127 | struct clk_init_data init; | 132 | struct clk_init_data init; |
133 | struct icst_params *pclone; | ||
128 | 134 | ||
129 | icst = kzalloc(sizeof(struct clk_icst), GFP_KERNEL); | 135 | icst = kzalloc(sizeof(struct clk_icst), GFP_KERNEL); |
130 | if (!icst) { | 136 | if (!icst) { |
131 | pr_err("could not allocate ICST clock!\n"); | 137 | pr_err("could not allocate ICST clock!\n"); |
132 | return ERR_PTR(-ENOMEM); | 138 | return ERR_PTR(-ENOMEM); |
133 | } | 139 | } |
140 | |||
141 | pclone = kmemdup(desc->params, sizeof(*pclone), GFP_KERNEL); | ||
142 | if (!pclone) { | ||
143 | pr_err("could not clone ICST params\n"); | ||
144 | return ERR_PTR(-ENOMEM); | ||
145 | } | ||
146 | |||
134 | init.name = name; | 147 | init.name = name; |
135 | init.ops = &icst_ops; | 148 | init.ops = &icst_ops; |
136 | init.flags = CLK_IS_ROOT; | 149 | init.flags = CLK_IS_ROOT; |
137 | init.parent_names = NULL; | 150 | init.parent_names = (parent_name ? &parent_name : NULL); |
138 | init.num_parents = 0; | 151 | init.num_parents = (parent_name ? 1 : 0); |
139 | icst->hw.init = &init; | 152 | icst->hw.init = &init; |
140 | icst->params = desc->params; | 153 | icst->params = pclone; |
141 | icst->vcoreg = base + desc->vco_offset; | 154 | icst->vcoreg = base + desc->vco_offset; |
142 | icst->lockreg = base + desc->lock_offset; | 155 | icst->lockreg = base + desc->lock_offset; |
143 | 156 | ||
diff --git a/drivers/clk/versatile/clk-icst.h b/drivers/clk/versatile/clk-icst.h index be99dd0da785..04e6f0aef588 100644 --- a/drivers/clk/versatile/clk-icst.h +++ b/drivers/clk/versatile/clk-icst.h | |||
@@ -16,4 +16,5 @@ struct clk_icst_desc { | |||
16 | struct clk *icst_clk_register(struct device *dev, | 16 | struct clk *icst_clk_register(struct device *dev, |
17 | const struct clk_icst_desc *desc, | 17 | const struct clk_icst_desc *desc, |
18 | const char *name, | 18 | const char *name, |
19 | const char *parent_name, | ||
19 | void __iomem *base); | 20 | void __iomem *base); |
diff --git a/drivers/clk/versatile/clk-impd1.c b/drivers/clk/versatile/clk-impd1.c index 844f8d711a12..6d8b8e1a080a 100644 --- a/drivers/clk/versatile/clk-impd1.c +++ b/drivers/clk/versatile/clk-impd1.c | |||
@@ -93,13 +93,15 @@ void integrator_impd1_clk_init(void __iomem *base, unsigned int id) | |||
93 | imc = &impd1_clks[id]; | 93 | imc = &impd1_clks[id]; |
94 | 94 | ||
95 | imc->vco1name = kasprintf(GFP_KERNEL, "lm%x-vco1", id); | 95 | imc->vco1name = kasprintf(GFP_KERNEL, "lm%x-vco1", id); |
96 | clk = icst_clk_register(NULL, &impd1_icst1_desc, imc->vco1name, base); | 96 | clk = icst_clk_register(NULL, &impd1_icst1_desc, imc->vco1name, NULL, |
97 | base); | ||
97 | imc->vco1clk = clk; | 98 | imc->vco1clk = clk; |
98 | imc->clks[0] = clkdev_alloc(clk, NULL, "lm%x:01000", id); | 99 | imc->clks[0] = clkdev_alloc(clk, NULL, "lm%x:01000", id); |
99 | 100 | ||
100 | /* VCO2 is also called "CLK2" */ | 101 | /* VCO2 is also called "CLK2" */ |
101 | imc->vco2name = kasprintf(GFP_KERNEL, "lm%x-vco2", id); | 102 | imc->vco2name = kasprintf(GFP_KERNEL, "lm%x-vco2", id); |
102 | clk = icst_clk_register(NULL, &impd1_icst2_desc, imc->vco2name, base); | 103 | clk = icst_clk_register(NULL, &impd1_icst2_desc, imc->vco2name, NULL, |
104 | base); | ||
103 | imc->vco2clk = clk; | 105 | imc->vco2clk = clk; |
104 | 106 | ||
105 | /* MMCI uses CLK2 right off */ | 107 | /* MMCI uses CLK2 right off */ |
diff --git a/drivers/clk/versatile/clk-integrator.c b/drivers/clk/versatile/clk-integrator.c index bda8967e09c2..734c4b8fe6ab 100644 --- a/drivers/clk/versatile/clk-integrator.c +++ b/drivers/clk/versatile/clk-integrator.c | |||
@@ -10,21 +10,17 @@ | |||
10 | #include <linux/clk.h> | 10 | #include <linux/clk.h> |
11 | #include <linux/clkdev.h> | 11 | #include <linux/clkdev.h> |
12 | #include <linux/err.h> | 12 | #include <linux/err.h> |
13 | #include <linux/platform_data/clk-integrator.h> | 13 | #include <linux/of.h> |
14 | 14 | #include <linux/of_address.h> | |
15 | #include <mach/hardware.h> | ||
16 | #include <mach/platform.h> | ||
17 | 15 | ||
18 | #include "clk-icst.h" | 16 | #include "clk-icst.h" |
19 | 17 | ||
20 | /* | 18 | #define INTEGRATOR_HDR_LOCK_OFFSET 0x14 |
21 | * Implementation of the ARM Integrator/AP and Integrator/CP clock tree. | ||
22 | * Inspired by portions of: | ||
23 | * plat-versatile/clock.c and plat-versatile/include/plat/clock.h | ||
24 | */ | ||
25 | 19 | ||
26 | static const struct icst_params cp_auxvco_params = { | 20 | /* Base offset for the core module */ |
27 | .ref = 24000000, | 21 | static void __iomem *cm_base; |
22 | |||
23 | static const struct icst_params cp_auxosc_params = { | ||
28 | .vco_max = ICST525_VCO_MAX_5V, | 24 | .vco_max = ICST525_VCO_MAX_5V, |
29 | .vco_min = ICST525_VCO_MIN, | 25 | .vco_min = ICST525_VCO_MIN, |
30 | .vd_min = 8, | 26 | .vd_min = 8, |
@@ -35,50 +31,39 @@ static const struct icst_params cp_auxvco_params = { | |||
35 | .idx2s = icst525_idx2s, | 31 | .idx2s = icst525_idx2s, |
36 | }; | 32 | }; |
37 | 33 | ||
38 | static const struct clk_icst_desc __initdata cp_icst_desc = { | 34 | static const struct clk_icst_desc __initdata cm_auxosc_desc = { |
39 | .params = &cp_auxvco_params, | 35 | .params = &cp_auxosc_params, |
40 | .vco_offset = 0x1c, | 36 | .vco_offset = 0x1c, |
41 | .lock_offset = INTEGRATOR_HDR_LOCK_OFFSET, | 37 | .lock_offset = INTEGRATOR_HDR_LOCK_OFFSET, |
42 | }; | 38 | }; |
43 | 39 | ||
44 | /* | 40 | static void __init of_integrator_cm_osc_setup(struct device_node *np) |
45 | * integrator_clk_init() - set up the integrator clock tree | ||
46 | * @is_cp: pass true if it's the Integrator/CP else AP is assumed | ||
47 | */ | ||
48 | void __init integrator_clk_init(bool is_cp) | ||
49 | { | 41 | { |
50 | struct clk *clk; | 42 | struct clk *clk = ERR_PTR(-EINVAL); |
51 | 43 | const char *clk_name = np->name; | |
52 | /* APB clock dummy */ | 44 | const struct clk_icst_desc *desc = &cm_auxosc_desc; |
53 | clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); | 45 | const char *parent_name; |
54 | clk_register_clkdev(clk, "apb_pclk", NULL); | ||
55 | |||
56 | /* UART reference clock */ | ||
57 | clk = clk_register_fixed_rate(NULL, "uartclk", NULL, CLK_IS_ROOT, | ||
58 | 14745600); | ||
59 | clk_register_clkdev(clk, NULL, "uart0"); | ||
60 | clk_register_clkdev(clk, NULL, "uart1"); | ||
61 | if (is_cp) | ||
62 | clk_register_clkdev(clk, NULL, "mmci"); | ||
63 | |||
64 | /* 24 MHz clock */ | ||
65 | clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, CLK_IS_ROOT, | ||
66 | 24000000); | ||
67 | clk_register_clkdev(clk, NULL, "kmi0"); | ||
68 | clk_register_clkdev(clk, NULL, "kmi1"); | ||
69 | if (!is_cp) | ||
70 | clk_register_clkdev(clk, NULL, "ap_timer"); | ||
71 | 46 | ||
72 | if (!is_cp) | 47 | if (!cm_base) { |
73 | return; | 48 | /* Remap the core module base if not done yet */ |
49 | struct device_node *parent; | ||
74 | 50 | ||
75 | /* 1 MHz clock */ | 51 | parent = of_get_parent(np); |
76 | clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, CLK_IS_ROOT, | 52 | if (!np) { |
77 | 1000000); | 53 | pr_err("no parent on core module clock\n"); |
78 | clk_register_clkdev(clk, NULL, "sp804"); | 54 | return; |
55 | } | ||
56 | cm_base = of_iomap(parent, 0); | ||
57 | if (!cm_base) { | ||
58 | pr_err("could not remap core module base\n"); | ||
59 | return; | ||
60 | } | ||
61 | } | ||
79 | 62 | ||
80 | /* ICST VCO clock used on the Integrator/CP CLCD */ | 63 | parent_name = of_clk_get_parent_name(np, 0); |
81 | clk = icst_clk_register(NULL, &cp_icst_desc, "icst", | 64 | clk = icst_clk_register(NULL, desc, clk_name, parent_name, cm_base); |
82 | __io_address(INTEGRATOR_HDR_BASE)); | 65 | if (!IS_ERR(clk)) |
83 | clk_register_clkdev(clk, NULL, "clcd"); | 66 | of_clk_add_provider(np, of_clk_src_simple_get, clk); |
84 | } | 67 | } |
68 | CLK_OF_DECLARE(integrator_cm_auxosc_clk, | ||
69 | "arm,integrator-cm-auxosc", of_integrator_cm_osc_setup); | ||
diff --git a/drivers/clk/versatile/clk-realview.c b/drivers/clk/versatile/clk-realview.c index 747e7b31117c..c8b523117fb7 100644 --- a/drivers/clk/versatile/clk-realview.c +++ b/drivers/clk/versatile/clk-realview.c | |||
@@ -85,10 +85,10 @@ void __init realview_clk_init(void __iomem *sysbase, bool is_pb1176) | |||
85 | /* ICST VCO clock */ | 85 | /* ICST VCO clock */ |
86 | if (is_pb1176) | 86 | if (is_pb1176) |
87 | clk = icst_clk_register(NULL, &realview_osc0_desc, | 87 | clk = icst_clk_register(NULL, &realview_osc0_desc, |
88 | "osc0", sysbase); | 88 | "osc0", NULL, sysbase); |
89 | else | 89 | else |
90 | clk = icst_clk_register(NULL, &realview_osc4_desc, | 90 | clk = icst_clk_register(NULL, &realview_osc4_desc, |
91 | "osc4", sysbase); | 91 | "osc4", NULL, sysbase); |
92 | 92 | ||
93 | clk_register_clkdev(clk, NULL, "dev:clcd"); | 93 | clk_register_clkdev(clk, NULL, "dev:clcd"); |
94 | clk_register_clkdev(clk, NULL, "issp:clcd"); | 94 | clk_register_clkdev(clk, NULL, "issp:clcd"); |
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index cd6950fd8caf..6510ec4f45ff 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig | |||
@@ -140,3 +140,6 @@ config VF_PIT_TIMER | |||
140 | bool | 140 | bool |
141 | help | 141 | help |
142 | Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. | 142 | Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. |
143 | |||
144 | config CLKSRC_QCOM | ||
145 | bool | ||
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index c7ca50a9c232..2e0c0cc0a014 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile | |||
@@ -32,6 +32,7 @@ obj-$(CONFIG_CLKSRC_EFM32) += time-efm32.o | |||
32 | obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o | 32 | obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o |
33 | obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o | 33 | obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o |
34 | obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o | 34 | obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o |
35 | obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o | ||
35 | 36 | ||
36 | obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o | 37 | obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o |
37 | obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o | 38 | obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o |
diff --git a/arch/arm/mach-msm/timer.c b/drivers/clocksource/qcom-timer.c index fd1644987534..e807acf4c665 100644 --- a/arch/arm/mach-msm/timer.c +++ b/drivers/clocksource/qcom-timer.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * | 2 | * |
3 | * Copyright (C) 2007 Google, Inc. | 3 | * Copyright (C) 2007 Google, Inc. |
4 | * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved. | 4 | * Copyright (c) 2009-2012,2014, The Linux Foundation. All rights reserved. |
5 | * | 5 | * |
6 | * This software is licensed under the terms of the GNU General Public | 6 | * This software is licensed under the terms of the GNU General Public |
7 | * License version 2, as published by the Free Software Foundation, and | 7 | * License version 2, as published by the Free Software Foundation, and |
@@ -26,10 +26,6 @@ | |||
26 | #include <linux/of_irq.h> | 26 | #include <linux/of_irq.h> |
27 | #include <linux/sched_clock.h> | 27 | #include <linux/sched_clock.h> |
28 | 28 | ||
29 | #include <asm/mach/time.h> | ||
30 | |||
31 | #include "common.h" | ||
32 | |||
33 | #define TIMER_MATCH_VAL 0x0000 | 29 | #define TIMER_MATCH_VAL 0x0000 |
34 | #define TIMER_COUNT_VAL 0x0004 | 30 | #define TIMER_COUNT_VAL 0x0004 |
35 | #define TIMER_ENABLE 0x0008 | 31 | #define TIMER_ENABLE 0x0008 |
@@ -110,15 +106,6 @@ static notrace cycle_t msm_read_timer_count(struct clocksource *cs) | |||
110 | return readl_relaxed(source_base + TIMER_COUNT_VAL); | 106 | return readl_relaxed(source_base + TIMER_COUNT_VAL); |
111 | } | 107 | } |
112 | 108 | ||
113 | static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) | ||
114 | { | ||
115 | /* | ||
116 | * Shift timer count down by a constant due to unreliable lower bits | ||
117 | * on some targets. | ||
118 | */ | ||
119 | return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; | ||
120 | } | ||
121 | |||
122 | static struct clocksource msm_clocksource = { | 109 | static struct clocksource msm_clocksource = { |
123 | .name = "dg_timer", | 110 | .name = "dg_timer", |
124 | .rating = 300, | 111 | .rating = 300, |
@@ -232,7 +219,7 @@ err: | |||
232 | sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz); | 219 | sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz); |
233 | } | 220 | } |
234 | 221 | ||
235 | #ifdef CONFIG_OF | 222 | #ifdef CONFIG_ARCH_QCOM |
236 | static void __init msm_dt_timer_init(struct device_node *np) | 223 | static void __init msm_dt_timer_init(struct device_node *np) |
237 | { | 224 | { |
238 | u32 freq; | 225 | u32 freq; |
@@ -285,7 +272,7 @@ static void __init msm_dt_timer_init(struct device_node *np) | |||
285 | } | 272 | } |
286 | CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init); | 273 | CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init); |
287 | CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init); | 274 | CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init); |
288 | #endif | 275 | #else |
289 | 276 | ||
290 | static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, | 277 | static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, |
291 | u32 sts) | 278 | u32 sts) |
@@ -305,6 +292,15 @@ static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, | |||
305 | return 0; | 292 | return 0; |
306 | } | 293 | } |
307 | 294 | ||
295 | static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) | ||
296 | { | ||
297 | /* | ||
298 | * Shift timer count down by a constant due to unreliable lower bits | ||
299 | * on some targets. | ||
300 | */ | ||
301 | return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; | ||
302 | } | ||
303 | |||
308 | void __init msm7x01_timer_init(void) | 304 | void __init msm7x01_timer_init(void) |
309 | { | 305 | { |
310 | struct clocksource *cs = &msm_clocksource; | 306 | struct clocksource *cs = &msm_clocksource; |
@@ -331,3 +327,4 @@ void __init qsd8x50_timer_init(void) | |||
331 | return; | 327 | return; |
332 | msm_timer_init(19200000 / 4, 32, 7, false); | 328 | msm_timer_init(19200000 / 4, 32, 7, false); |
333 | } | 329 | } |
330 | #endif | ||
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 903f24d28ba0..2c38d950a1e5 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -192,7 +192,7 @@ config GPIO_MSM_V1 | |||
192 | 192 | ||
193 | config GPIO_MSM_V2 | 193 | config GPIO_MSM_V2 |
194 | tristate "Qualcomm MSM GPIO v2" | 194 | tristate "Qualcomm MSM GPIO v2" |
195 | depends on GPIOLIB && OF && ARCH_MSM | 195 | depends on GPIOLIB && OF && ARCH_QCOM |
196 | help | 196 | help |
197 | Say yes here to support the GPIO interface on ARM v7 based | 197 | Say yes here to support the GPIO interface on ARM v7 based |
198 | Qualcomm MSM chips. Most of the pins on the MSM can be | 198 | Qualcomm MSM chips. Most of the pins on the MSM can be |
diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index c69d1e07a3a6..b6984971ce0c 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig | |||
@@ -3,7 +3,7 @@ config DRM_MSM | |||
3 | tristate "MSM DRM" | 3 | tristate "MSM DRM" |
4 | depends on DRM | 4 | depends on DRM |
5 | depends on MSM_IOMMU | 5 | depends on MSM_IOMMU |
6 | depends on (ARCH_MSM && ARCH_MSM8960) || (ARM && COMPILE_TEST) | 6 | depends on ARCH_MSM8960 || (ARM && COMPILE_TEST) |
7 | select DRM_KMS_HELPER | 7 | select DRM_KMS_HELPER |
8 | select SHMEM | 8 | select SHMEM |
9 | select TMPFS | 9 | select TMPFS |
diff --git a/drivers/irqchip/irq-orion.c b/drivers/irqchip/irq-orion.c index e51d40031884..8e41be62812e 100644 --- a/drivers/irqchip/irq-orion.c +++ b/drivers/irqchip/irq-orion.c | |||
@@ -111,7 +111,8 @@ IRQCHIP_DECLARE(orion_intc, "marvell,orion-intc", orion_irq_init); | |||
111 | static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc) | 111 | static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc) |
112 | { | 112 | { |
113 | struct irq_domain *d = irq_get_handler_data(irq); | 113 | struct irq_domain *d = irq_get_handler_data(irq); |
114 | struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, irq); | 114 | |
115 | struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, 0); | ||
115 | u32 stat = readl_relaxed(gc->reg_base + ORION_BRIDGE_IRQ_CAUSE) & | 116 | u32 stat = readl_relaxed(gc->reg_base + ORION_BRIDGE_IRQ_CAUSE) & |
116 | gc->mask_cache; | 117 | gc->mask_cache; |
117 | 118 | ||
@@ -123,6 +124,19 @@ static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
123 | } | 124 | } |
124 | } | 125 | } |
125 | 126 | ||
127 | /* | ||
128 | * Bridge IRQ_CAUSE is asserted regardless of IRQ_MASK register. | ||
129 | * To avoid interrupt events on stale irqs, we clear them before unmask. | ||
130 | */ | ||
131 | static unsigned int orion_bridge_irq_startup(struct irq_data *d) | ||
132 | { | ||
133 | struct irq_chip_type *ct = irq_data_get_chip_type(d); | ||
134 | |||
135 | ct->chip.irq_ack(d); | ||
136 | ct->chip.irq_unmask(d); | ||
137 | return 0; | ||
138 | } | ||
139 | |||
126 | static int __init orion_bridge_irq_init(struct device_node *np, | 140 | static int __init orion_bridge_irq_init(struct device_node *np, |
127 | struct device_node *parent) | 141 | struct device_node *parent) |
128 | { | 142 | { |
@@ -143,7 +157,7 @@ static int __init orion_bridge_irq_init(struct device_node *np, | |||
143 | } | 157 | } |
144 | 158 | ||
145 | ret = irq_alloc_domain_generic_chips(domain, nrirqs, 1, np->name, | 159 | ret = irq_alloc_domain_generic_chips(domain, nrirqs, 1, np->name, |
146 | handle_level_irq, clr, 0, IRQ_GC_INIT_MASK_CACHE); | 160 | handle_edge_irq, clr, 0, IRQ_GC_INIT_MASK_CACHE); |
147 | if (ret) { | 161 | if (ret) { |
148 | pr_err("%s: unable to alloc irq domain gc\n", np->name); | 162 | pr_err("%s: unable to alloc irq domain gc\n", np->name); |
149 | return ret; | 163 | return ret; |
@@ -176,12 +190,14 @@ static int __init orion_bridge_irq_init(struct device_node *np, | |||
176 | 190 | ||
177 | gc->chip_types[0].regs.ack = ORION_BRIDGE_IRQ_CAUSE; | 191 | gc->chip_types[0].regs.ack = ORION_BRIDGE_IRQ_CAUSE; |
178 | gc->chip_types[0].regs.mask = ORION_BRIDGE_IRQ_MASK; | 192 | gc->chip_types[0].regs.mask = ORION_BRIDGE_IRQ_MASK; |
193 | gc->chip_types[0].chip.irq_startup = orion_bridge_irq_startup; | ||
179 | gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit; | 194 | gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit; |
180 | gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; | 195 | gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; |
181 | gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; | 196 | gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; |
182 | 197 | ||
183 | /* mask all interrupts */ | 198 | /* mask and clear all interrupts */ |
184 | writel(0, gc->reg_base + ORION_BRIDGE_IRQ_MASK); | 199 | writel(0, gc->reg_base + ORION_BRIDGE_IRQ_MASK); |
200 | writel(0, gc->reg_base + ORION_BRIDGE_IRQ_CAUSE); | ||
185 | 201 | ||
186 | irq_set_handler_data(irq, domain); | 202 | irq_set_handler_data(irq, domain); |
187 | irq_set_chained_handler(irq, orion_bridge_irq_handler); | 203 | irq_set_chained_handler(irq, orion_bridge_irq_handler); |
diff --git a/drivers/irqchip/irq-vic.c b/drivers/irqchip/irq-vic.c index 8e21ae0bab46..fd2c980e4cea 100644 --- a/drivers/irqchip/irq-vic.c +++ b/drivers/irqchip/irq-vic.c | |||
@@ -57,6 +57,7 @@ | |||
57 | 57 | ||
58 | /** | 58 | /** |
59 | * struct vic_device - VIC PM device | 59 | * struct vic_device - VIC PM device |
60 | * @parent_irq: The parent IRQ number of the VIC if cascaded, or 0. | ||
60 | * @irq: The IRQ number for the base of the VIC. | 61 | * @irq: The IRQ number for the base of the VIC. |
61 | * @base: The register base for the VIC. | 62 | * @base: The register base for the VIC. |
62 | * @valid_sources: A bitmask of valid interrupts | 63 | * @valid_sources: A bitmask of valid interrupts |
@@ -224,6 +225,17 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs) | |||
224 | return handled; | 225 | return handled; |
225 | } | 226 | } |
226 | 227 | ||
228 | static void vic_handle_irq_cascaded(unsigned int irq, struct irq_desc *desc) | ||
229 | { | ||
230 | u32 stat, hwirq; | ||
231 | struct vic_device *vic = irq_desc_get_handler_data(desc); | ||
232 | |||
233 | while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) { | ||
234 | hwirq = ffs(stat) - 1; | ||
235 | generic_handle_irq(irq_find_mapping(vic->domain, hwirq)); | ||
236 | } | ||
237 | } | ||
238 | |||
227 | /* | 239 | /* |
228 | * Keep iterating over all registered VIC's until there are no pending | 240 | * Keep iterating over all registered VIC's until there are no pending |
229 | * interrupts. | 241 | * interrupts. |
@@ -246,6 +258,7 @@ static struct irq_domain_ops vic_irqdomain_ops = { | |||
246 | /** | 258 | /** |
247 | * vic_register() - Register a VIC. | 259 | * vic_register() - Register a VIC. |
248 | * @base: The base address of the VIC. | 260 | * @base: The base address of the VIC. |
261 | * @parent_irq: The parent IRQ if cascaded, else 0. | ||
249 | * @irq: The base IRQ for the VIC. | 262 | * @irq: The base IRQ for the VIC. |
250 | * @valid_sources: bitmask of valid interrupts | 263 | * @valid_sources: bitmask of valid interrupts |
251 | * @resume_sources: bitmask of interrupts allowed for resume sources. | 264 | * @resume_sources: bitmask of interrupts allowed for resume sources. |
@@ -257,7 +270,8 @@ static struct irq_domain_ops vic_irqdomain_ops = { | |||
257 | * | 270 | * |
258 | * This also configures the IRQ domain for the VIC. | 271 | * This also configures the IRQ domain for the VIC. |
259 | */ | 272 | */ |
260 | static void __init vic_register(void __iomem *base, unsigned int irq, | 273 | static void __init vic_register(void __iomem *base, unsigned int parent_irq, |
274 | unsigned int irq, | ||
261 | u32 valid_sources, u32 resume_sources, | 275 | u32 valid_sources, u32 resume_sources, |
262 | struct device_node *node) | 276 | struct device_node *node) |
263 | { | 277 | { |
@@ -273,15 +287,25 @@ static void __init vic_register(void __iomem *base, unsigned int irq, | |||
273 | v->base = base; | 287 | v->base = base; |
274 | v->valid_sources = valid_sources; | 288 | v->valid_sources = valid_sources; |
275 | v->resume_sources = resume_sources; | 289 | v->resume_sources = resume_sources; |
276 | v->irq = irq; | ||
277 | set_handle_irq(vic_handle_irq); | 290 | set_handle_irq(vic_handle_irq); |
278 | vic_id++; | 291 | vic_id++; |
292 | |||
293 | if (parent_irq) { | ||
294 | irq_set_handler_data(parent_irq, v); | ||
295 | irq_set_chained_handler(parent_irq, vic_handle_irq_cascaded); | ||
296 | } | ||
297 | |||
279 | v->domain = irq_domain_add_simple(node, fls(valid_sources), irq, | 298 | v->domain = irq_domain_add_simple(node, fls(valid_sources), irq, |
280 | &vic_irqdomain_ops, v); | 299 | &vic_irqdomain_ops, v); |
281 | /* create an IRQ mapping for each valid IRQ */ | 300 | /* create an IRQ mapping for each valid IRQ */ |
282 | for (i = 0; i < fls(valid_sources); i++) | 301 | for (i = 0; i < fls(valid_sources); i++) |
283 | if (valid_sources & (1 << i)) | 302 | if (valid_sources & (1 << i)) |
284 | irq_create_mapping(v->domain, i); | 303 | irq_create_mapping(v->domain, i); |
304 | /* If no base IRQ was passed, figure out our allocated base */ | ||
305 | if (irq) | ||
306 | v->irq = irq; | ||
307 | else | ||
308 | v->irq = irq_find_mapping(v->domain, 0); | ||
285 | } | 309 | } |
286 | 310 | ||
287 | static void vic_ack_irq(struct irq_data *d) | 311 | static void vic_ack_irq(struct irq_data *d) |
@@ -409,10 +433,10 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, | |||
409 | writel(32, base + VIC_PL190_DEF_VECT_ADDR); | 433 | writel(32, base + VIC_PL190_DEF_VECT_ADDR); |
410 | } | 434 | } |
411 | 435 | ||
412 | vic_register(base, irq_start, vic_sources, 0, node); | 436 | vic_register(base, 0, irq_start, vic_sources, 0, node); |
413 | } | 437 | } |
414 | 438 | ||
415 | void __init __vic_init(void __iomem *base, int irq_start, | 439 | void __init __vic_init(void __iomem *base, int parent_irq, int irq_start, |
416 | u32 vic_sources, u32 resume_sources, | 440 | u32 vic_sources, u32 resume_sources, |
417 | struct device_node *node) | 441 | struct device_node *node) |
418 | { | 442 | { |
@@ -449,7 +473,7 @@ void __init __vic_init(void __iomem *base, int irq_start, | |||
449 | 473 | ||
450 | vic_init2(base); | 474 | vic_init2(base); |
451 | 475 | ||
452 | vic_register(base, irq_start, vic_sources, resume_sources, node); | 476 | vic_register(base, parent_irq, irq_start, vic_sources, resume_sources, node); |
453 | } | 477 | } |
454 | 478 | ||
455 | /** | 479 | /** |
@@ -462,8 +486,30 @@ void __init __vic_init(void __iomem *base, int irq_start, | |||
462 | void __init vic_init(void __iomem *base, unsigned int irq_start, | 486 | void __init vic_init(void __iomem *base, unsigned int irq_start, |
463 | u32 vic_sources, u32 resume_sources) | 487 | u32 vic_sources, u32 resume_sources) |
464 | { | 488 | { |
465 | __vic_init(base, irq_start, vic_sources, resume_sources, NULL); | 489 | __vic_init(base, 0, irq_start, vic_sources, resume_sources, NULL); |
490 | } | ||
491 | |||
492 | /** | ||
493 | * vic_init_cascaded() - initialise a cascaded vectored interrupt controller | ||
494 | * @base: iomem base address | ||
495 | * @parent_irq: the parent IRQ we're cascaded off | ||
496 | * @irq_start: starting interrupt number, must be muliple of 32 | ||
497 | * @vic_sources: bitmask of interrupt sources to allow | ||
498 | * @resume_sources: bitmask of interrupt sources to allow for resume | ||
499 | * | ||
500 | * This returns the base for the new interrupts or negative on error. | ||
501 | */ | ||
502 | int __init vic_init_cascaded(void __iomem *base, unsigned int parent_irq, | ||
503 | u32 vic_sources, u32 resume_sources) | ||
504 | { | ||
505 | struct vic_device *v; | ||
506 | |||
507 | v = &vic_devices[vic_id]; | ||
508 | __vic_init(base, parent_irq, 0, vic_sources, resume_sources, NULL); | ||
509 | /* Return out acquired base */ | ||
510 | return v->irq; | ||
466 | } | 511 | } |
512 | EXPORT_SYMBOL_GPL(vic_init_cascaded); | ||
467 | 513 | ||
468 | #ifdef CONFIG_OF | 514 | #ifdef CONFIG_OF |
469 | int __init vic_of_init(struct device_node *node, struct device_node *parent) | 515 | int __init vic_of_init(struct device_node *node, struct device_node *parent) |
@@ -485,7 +531,7 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent) | |||
485 | /* | 531 | /* |
486 | * Passing 0 as first IRQ makes the simple domain allocate descriptors | 532 | * Passing 0 as first IRQ makes the simple domain allocate descriptors |
487 | */ | 533 | */ |
488 | __vic_init(regs, 0, interrupt_mask, wakeup_mask, node); | 534 | __vic_init(regs, 0, 0, interrupt_mask, wakeup_mask, node); |
489 | 535 | ||
490 | return 0; | 536 | return 0; |
491 | } | 537 | } |
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index a4989ec6292e..8eb6a36f125a 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c | |||
@@ -746,28 +746,6 @@ static int nand_davinci_probe(struct platform_device *pdev) | |||
746 | goto err_clk_enable; | 746 | goto err_clk_enable; |
747 | } | 747 | } |
748 | 748 | ||
749 | /* | ||
750 | * Setup Async configuration register in case we did not boot from | ||
751 | * NAND and so bootloader did not bother to set it up. | ||
752 | */ | ||
753 | val = davinci_nand_readl(info, A1CR_OFFSET + info->core_chipsel * 4); | ||
754 | |||
755 | /* Extended Wait is not valid and Select Strobe mode is not used */ | ||
756 | val &= ~(ACR_ASIZE_MASK | ACR_EW_MASK | ACR_SS_MASK); | ||
757 | if (info->chip.options & NAND_BUSWIDTH_16) | ||
758 | val |= 0x1; | ||
759 | |||
760 | davinci_nand_writel(info, A1CR_OFFSET + info->core_chipsel * 4, val); | ||
761 | |||
762 | ret = 0; | ||
763 | if (info->timing) | ||
764 | ret = davinci_aemif_setup_timing(info->timing, info->base, | ||
765 | info->core_chipsel); | ||
766 | if (ret < 0) { | ||
767 | dev_dbg(&pdev->dev, "NAND timing values setup fail\n"); | ||
768 | goto err; | ||
769 | } | ||
770 | |||
771 | spin_lock_irq(&davinci_nand_lock); | 749 | spin_lock_irq(&davinci_nand_lock); |
772 | 750 | ||
773 | /* put CSxNAND into NAND mode */ | 751 | /* put CSxNAND into NAND mode */ |
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig index 6d452a78b19c..fa0e4e057b99 100644 --- a/drivers/power/reset/Kconfig +++ b/drivers/power/reset/Kconfig | |||
@@ -22,7 +22,7 @@ config POWER_RESET_GPIO | |||
22 | 22 | ||
23 | config POWER_RESET_MSM | 23 | config POWER_RESET_MSM |
24 | bool "Qualcomm MSM power-off driver" | 24 | bool "Qualcomm MSM power-off driver" |
25 | depends on POWER_RESET && ARCH_MSM | 25 | depends on POWER_RESET && ARCH_QCOM |
26 | help | 26 | help |
27 | Power off and restart support for Qualcomm boards. | 27 | Power off and restart support for Qualcomm boards. |
28 | 28 | ||
diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c index 1ebe67cd1833..7442bc130055 100644 --- a/drivers/sh/clk/cpg.c +++ b/drivers/sh/clk/cpg.c | |||
@@ -36,9 +36,47 @@ static void sh_clk_write(int value, struct clk *clk) | |||
36 | iowrite32(value, clk->mapped_reg); | 36 | iowrite32(value, clk->mapped_reg); |
37 | } | 37 | } |
38 | 38 | ||
39 | static unsigned int r8(const void __iomem *addr) | ||
40 | { | ||
41 | return ioread8(addr); | ||
42 | } | ||
43 | |||
44 | static unsigned int r16(const void __iomem *addr) | ||
45 | { | ||
46 | return ioread16(addr); | ||
47 | } | ||
48 | |||
49 | static unsigned int r32(const void __iomem *addr) | ||
50 | { | ||
51 | return ioread32(addr); | ||
52 | } | ||
53 | |||
39 | static int sh_clk_mstp_enable(struct clk *clk) | 54 | static int sh_clk_mstp_enable(struct clk *clk) |
40 | { | 55 | { |
41 | sh_clk_write(sh_clk_read(clk) & ~(1 << clk->enable_bit), clk); | 56 | sh_clk_write(sh_clk_read(clk) & ~(1 << clk->enable_bit), clk); |
57 | if (clk->status_reg) { | ||
58 | unsigned int (*read)(const void __iomem *addr); | ||
59 | int i; | ||
60 | void __iomem *mapped_status = (phys_addr_t)clk->status_reg - | ||
61 | (phys_addr_t)clk->enable_reg + clk->mapped_reg; | ||
62 | |||
63 | if (clk->flags & CLK_ENABLE_REG_8BIT) | ||
64 | read = r8; | ||
65 | else if (clk->flags & CLK_ENABLE_REG_16BIT) | ||
66 | read = r16; | ||
67 | else | ||
68 | read = r32; | ||
69 | |||
70 | for (i = 1000; | ||
71 | (read(mapped_status) & (1 << clk->enable_bit)) && i; | ||
72 | i--) | ||
73 | cpu_relax(); | ||
74 | if (!i) { | ||
75 | pr_err("cpg: failed to enable %p[%d]\n", | ||
76 | clk->enable_reg, clk->enable_bit); | ||
77 | return -ETIMEDOUT; | ||
78 | } | ||
79 | } | ||
42 | return 0; | 80 | return 0; |
43 | } | 81 | } |
44 | 82 | ||
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index a3815eaed421..ce9b12d38786 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig | |||
@@ -1024,7 +1024,7 @@ config SERIAL_SGI_IOC3 | |||
1024 | 1024 | ||
1025 | config SERIAL_MSM | 1025 | config SERIAL_MSM |
1026 | bool "MSM on-chip serial port support" | 1026 | bool "MSM on-chip serial port support" |
1027 | depends on ARCH_MSM | 1027 | depends on ARCH_MSM || ARCH_QCOM |
1028 | select SERIAL_CORE | 1028 | select SERIAL_CORE |
1029 | 1029 | ||
1030 | config SERIAL_MSM_CONSOLE | 1030 | config SERIAL_MSM_CONSOLE |
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 79d25894343a..f1ff408c4b17 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig | |||
@@ -292,7 +292,7 @@ config DAVINCI_WATCHDOG | |||
292 | 292 | ||
293 | config ORION_WATCHDOG | 293 | config ORION_WATCHDOG |
294 | tristate "Orion watchdog" | 294 | tristate "Orion watchdog" |
295 | depends on ARCH_ORION5X || ARCH_KIRKWOOD || ARCH_DOVE | 295 | depends on ARCH_ORION5X || ARCH_KIRKWOOD || ARCH_DOVE || ARCH_MVEBU |
296 | select WATCHDOG_CORE | 296 | select WATCHDOG_CORE |
297 | help | 297 | help |
298 | Say Y here if to include support for the watchdog timer | 298 | Say Y here if to include support for the watchdog timer |
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c index f7722a424676..15321aa0bb94 100644 --- a/drivers/watchdog/orion_wdt.c +++ b/drivers/watchdog/orion_wdt.c | |||
@@ -19,101 +19,204 @@ | |||
19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
20 | #include <linux/watchdog.h> | 20 | #include <linux/watchdog.h> |
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/interrupt.h> | ||
22 | #include <linux/io.h> | 23 | #include <linux/io.h> |
23 | #include <linux/spinlock.h> | ||
24 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
25 | #include <linux/err.h> | 25 | #include <linux/err.h> |
26 | #include <linux/of.h> | 26 | #include <linux/of.h> |
27 | #include <mach/bridge-regs.h> | 27 | #include <linux/of_device.h> |
28 | |||
29 | /* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */ | ||
30 | #define ORION_RSTOUT_MASK_OFFSET 0x20108 | ||
31 | |||
32 | /* Internal registers can be configured at any 1 MiB aligned address */ | ||
33 | #define INTERNAL_REGS_MASK ~(SZ_1M - 1) | ||
28 | 34 | ||
29 | /* | 35 | /* |
30 | * Watchdog timer block registers. | 36 | * Watchdog timer block registers. |
31 | */ | 37 | */ |
32 | #define TIMER_CTRL 0x0000 | 38 | #define TIMER_CTRL 0x0000 |
33 | #define WDT_EN 0x0010 | 39 | #define TIMER_A370_STATUS 0x04 |
34 | #define WDT_VAL 0x0024 | ||
35 | 40 | ||
36 | #define WDT_MAX_CYCLE_COUNT 0xffffffff | 41 | #define WDT_MAX_CYCLE_COUNT 0xffffffff |
37 | #define WDT_IN_USE 0 | ||
38 | #define WDT_OK_TO_CLOSE 1 | ||
39 | 42 | ||
40 | #define WDT_RESET_OUT_EN BIT(1) | 43 | #define WDT_A370_RATIO_MASK(v) ((v) << 16) |
41 | #define WDT_INT_REQ BIT(3) | 44 | #define WDT_A370_RATIO_SHIFT 5 |
45 | #define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT) | ||
46 | |||
47 | #define WDT_AXP_FIXED_ENABLE_BIT BIT(10) | ||
48 | #define WDT_A370_EXPIRED BIT(31) | ||
42 | 49 | ||
43 | static bool nowayout = WATCHDOG_NOWAYOUT; | 50 | static bool nowayout = WATCHDOG_NOWAYOUT; |
44 | static int heartbeat = -1; /* module parameter (seconds) */ | 51 | static int heartbeat = -1; /* module parameter (seconds) */ |
45 | static unsigned int wdt_max_duration; /* (seconds) */ | ||
46 | static struct clk *clk; | ||
47 | static unsigned int wdt_tclk; | ||
48 | static void __iomem *wdt_reg; | ||
49 | static DEFINE_SPINLOCK(wdt_lock); | ||
50 | 52 | ||
51 | static int orion_wdt_ping(struct watchdog_device *wdt_dev) | 53 | struct orion_watchdog; |
54 | |||
55 | struct orion_watchdog_data { | ||
56 | int wdt_counter_offset; | ||
57 | int wdt_enable_bit; | ||
58 | int rstout_enable_bit; | ||
59 | int (*clock_init)(struct platform_device *, | ||
60 | struct orion_watchdog *); | ||
61 | int (*start)(struct watchdog_device *); | ||
62 | }; | ||
63 | |||
64 | struct orion_watchdog { | ||
65 | struct watchdog_device wdt; | ||
66 | void __iomem *reg; | ||
67 | void __iomem *rstout; | ||
68 | unsigned long clk_rate; | ||
69 | struct clk *clk; | ||
70 | const struct orion_watchdog_data *data; | ||
71 | }; | ||
72 | |||
73 | static int orion_wdt_clock_init(struct platform_device *pdev, | ||
74 | struct orion_watchdog *dev) | ||
52 | { | 75 | { |
53 | spin_lock(&wdt_lock); | 76 | int ret; |
54 | 77 | ||
55 | /* Reload watchdog duration */ | 78 | dev->clk = clk_get(&pdev->dev, NULL); |
56 | writel(wdt_tclk * wdt_dev->timeout, wdt_reg + WDT_VAL); | 79 | if (IS_ERR(dev->clk)) |
80 | return PTR_ERR(dev->clk); | ||
81 | ret = clk_prepare_enable(dev->clk); | ||
82 | if (ret) { | ||
83 | clk_put(dev->clk); | ||
84 | return ret; | ||
85 | } | ||
57 | 86 | ||
58 | spin_unlock(&wdt_lock); | 87 | dev->clk_rate = clk_get_rate(dev->clk); |
59 | return 0; | 88 | return 0; |
60 | } | 89 | } |
61 | 90 | ||
62 | static int orion_wdt_start(struct watchdog_device *wdt_dev) | 91 | static int armada370_wdt_clock_init(struct platform_device *pdev, |
92 | struct orion_watchdog *dev) | ||
63 | { | 93 | { |
64 | u32 reg; | 94 | int ret; |
65 | 95 | ||
66 | spin_lock(&wdt_lock); | 96 | dev->clk = clk_get(&pdev->dev, NULL); |
97 | if (IS_ERR(dev->clk)) | ||
98 | return PTR_ERR(dev->clk); | ||
99 | ret = clk_prepare_enable(dev->clk); | ||
100 | if (ret) { | ||
101 | clk_put(dev->clk); | ||
102 | return ret; | ||
103 | } | ||
104 | |||
105 | /* Setup watchdog input clock */ | ||
106 | atomic_io_modify(dev->reg + TIMER_CTRL, | ||
107 | WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT), | ||
108 | WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT)); | ||
109 | |||
110 | dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO; | ||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | static int armadaxp_wdt_clock_init(struct platform_device *pdev, | ||
115 | struct orion_watchdog *dev) | ||
116 | { | ||
117 | int ret; | ||
118 | |||
119 | dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed"); | ||
120 | if (IS_ERR(dev->clk)) | ||
121 | return PTR_ERR(dev->clk); | ||
122 | ret = clk_prepare_enable(dev->clk); | ||
123 | if (ret) { | ||
124 | clk_put(dev->clk); | ||
125 | return ret; | ||
126 | } | ||
127 | |||
128 | /* Enable the fixed watchdog clock input */ | ||
129 | atomic_io_modify(dev->reg + TIMER_CTRL, | ||
130 | WDT_AXP_FIXED_ENABLE_BIT, | ||
131 | WDT_AXP_FIXED_ENABLE_BIT); | ||
132 | |||
133 | dev->clk_rate = clk_get_rate(dev->clk); | ||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | static int orion_wdt_ping(struct watchdog_device *wdt_dev) | ||
138 | { | ||
139 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); | ||
140 | /* Reload watchdog duration */ | ||
141 | writel(dev->clk_rate * wdt_dev->timeout, | ||
142 | dev->reg + dev->data->wdt_counter_offset); | ||
143 | return 0; | ||
144 | } | ||
145 | |||
146 | static int armada370_start(struct watchdog_device *wdt_dev) | ||
147 | { | ||
148 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); | ||
67 | 149 | ||
68 | /* Set watchdog duration */ | 150 | /* Set watchdog duration */ |
69 | writel(wdt_tclk * wdt_dev->timeout, wdt_reg + WDT_VAL); | 151 | writel(dev->clk_rate * wdt_dev->timeout, |
152 | dev->reg + dev->data->wdt_counter_offset); | ||
70 | 153 | ||
71 | /* Clear watchdog timer interrupt */ | 154 | /* Clear the watchdog expiration bit */ |
72 | writel(~WDT_INT_REQ, BRIDGE_CAUSE); | 155 | atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0); |
73 | 156 | ||
74 | /* Enable watchdog timer */ | 157 | /* Enable watchdog timer */ |
75 | reg = readl(wdt_reg + TIMER_CTRL); | 158 | atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, |
76 | reg |= WDT_EN; | 159 | dev->data->wdt_enable_bit); |
77 | writel(reg, wdt_reg + TIMER_CTRL); | 160 | |
161 | atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, | ||
162 | dev->data->rstout_enable_bit); | ||
163 | return 0; | ||
164 | } | ||
165 | |||
166 | static int orion_start(struct watchdog_device *wdt_dev) | ||
167 | { | ||
168 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); | ||
169 | |||
170 | /* Set watchdog duration */ | ||
171 | writel(dev->clk_rate * wdt_dev->timeout, | ||
172 | dev->reg + dev->data->wdt_counter_offset); | ||
173 | |||
174 | /* Enable watchdog timer */ | ||
175 | atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, | ||
176 | dev->data->wdt_enable_bit); | ||
78 | 177 | ||
79 | /* Enable reset on watchdog */ | 178 | /* Enable reset on watchdog */ |
80 | reg = readl(RSTOUTn_MASK); | 179 | atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, |
81 | reg |= WDT_RESET_OUT_EN; | 180 | dev->data->rstout_enable_bit); |
82 | writel(reg, RSTOUTn_MASK); | ||
83 | 181 | ||
84 | spin_unlock(&wdt_lock); | ||
85 | return 0; | 182 | return 0; |
86 | } | 183 | } |
87 | 184 | ||
88 | static int orion_wdt_stop(struct watchdog_device *wdt_dev) | 185 | static int orion_wdt_start(struct watchdog_device *wdt_dev) |
89 | { | 186 | { |
90 | u32 reg; | 187 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); |
91 | 188 | ||
92 | spin_lock(&wdt_lock); | 189 | /* There are some per-SoC quirks to handle */ |
190 | return dev->data->start(wdt_dev); | ||
191 | } | ||
192 | |||
193 | static int orion_wdt_stop(struct watchdog_device *wdt_dev) | ||
194 | { | ||
195 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); | ||
93 | 196 | ||
94 | /* Disable reset on watchdog */ | 197 | /* Disable reset on watchdog */ |
95 | reg = readl(RSTOUTn_MASK); | 198 | atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0); |
96 | reg &= ~WDT_RESET_OUT_EN; | ||
97 | writel(reg, RSTOUTn_MASK); | ||
98 | 199 | ||
99 | /* Disable watchdog timer */ | 200 | /* Disable watchdog timer */ |
100 | reg = readl(wdt_reg + TIMER_CTRL); | 201 | atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); |
101 | reg &= ~WDT_EN; | ||
102 | writel(reg, wdt_reg + TIMER_CTRL); | ||
103 | 202 | ||
104 | spin_unlock(&wdt_lock); | ||
105 | return 0; | 203 | return 0; |
106 | } | 204 | } |
107 | 205 | ||
108 | static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev) | 206 | static int orion_wdt_enabled(struct orion_watchdog *dev) |
109 | { | 207 | { |
110 | unsigned int time_left; | 208 | bool enabled, running; |
209 | |||
210 | enabled = readl(dev->rstout) & dev->data->rstout_enable_bit; | ||
211 | running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit; | ||
111 | 212 | ||
112 | spin_lock(&wdt_lock); | 213 | return enabled && running; |
113 | time_left = readl(wdt_reg + WDT_VAL) / wdt_tclk; | 214 | } |
114 | spin_unlock(&wdt_lock); | ||
115 | 215 | ||
116 | return time_left; | 216 | static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev) |
217 | { | ||
218 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); | ||
219 | return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate; | ||
117 | } | 220 | } |
118 | 221 | ||
119 | static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev, | 222 | static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev, |
@@ -137,68 +240,188 @@ static const struct watchdog_ops orion_wdt_ops = { | |||
137 | .get_timeleft = orion_wdt_get_timeleft, | 240 | .get_timeleft = orion_wdt_get_timeleft, |
138 | }; | 241 | }; |
139 | 242 | ||
140 | static struct watchdog_device orion_wdt = { | 243 | static irqreturn_t orion_wdt_irq(int irq, void *devid) |
141 | .info = &orion_wdt_info, | 244 | { |
142 | .ops = &orion_wdt_ops, | 245 | panic("Watchdog Timeout"); |
143 | .min_timeout = 1, | 246 | return IRQ_HANDLED; |
247 | } | ||
248 | |||
249 | /* | ||
250 | * The original devicetree binding for this driver specified only | ||
251 | * one memory resource, so in order to keep DT backwards compatibility | ||
252 | * we try to fallback to a hardcoded register address, if the resource | ||
253 | * is missing from the devicetree. | ||
254 | */ | ||
255 | static void __iomem *orion_wdt_ioremap_rstout(struct platform_device *pdev, | ||
256 | phys_addr_t internal_regs) | ||
257 | { | ||
258 | struct resource *res; | ||
259 | phys_addr_t rstout; | ||
260 | |||
261 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | ||
262 | if (res) | ||
263 | return devm_ioremap(&pdev->dev, res->start, | ||
264 | resource_size(res)); | ||
265 | |||
266 | /* This workaround works only for "orion-wdt", DT-enabled */ | ||
267 | if (!of_device_is_compatible(pdev->dev.of_node, "marvell,orion-wdt")) | ||
268 | return NULL; | ||
269 | |||
270 | rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET; | ||
271 | |||
272 | WARN(1, FW_BUG "falling back to harcoded RSTOUT reg 0x%x\n", rstout); | ||
273 | return devm_ioremap(&pdev->dev, rstout, 0x4); | ||
274 | } | ||
275 | |||
276 | static const struct orion_watchdog_data orion_data = { | ||
277 | .rstout_enable_bit = BIT(1), | ||
278 | .wdt_enable_bit = BIT(4), | ||
279 | .wdt_counter_offset = 0x24, | ||
280 | .clock_init = orion_wdt_clock_init, | ||
281 | .start = orion_start, | ||
282 | }; | ||
283 | |||
284 | static const struct orion_watchdog_data armada370_data = { | ||
285 | .rstout_enable_bit = BIT(8), | ||
286 | .wdt_enable_bit = BIT(8), | ||
287 | .wdt_counter_offset = 0x34, | ||
288 | .clock_init = armada370_wdt_clock_init, | ||
289 | .start = armada370_start, | ||
144 | }; | 290 | }; |
145 | 291 | ||
292 | static const struct orion_watchdog_data armadaxp_data = { | ||
293 | .rstout_enable_bit = BIT(8), | ||
294 | .wdt_enable_bit = BIT(8), | ||
295 | .wdt_counter_offset = 0x34, | ||
296 | .clock_init = armadaxp_wdt_clock_init, | ||
297 | .start = armada370_start, | ||
298 | }; | ||
299 | |||
300 | static const struct of_device_id orion_wdt_of_match_table[] = { | ||
301 | { | ||
302 | .compatible = "marvell,orion-wdt", | ||
303 | .data = &orion_data, | ||
304 | }, | ||
305 | { | ||
306 | .compatible = "marvell,armada-370-wdt", | ||
307 | .data = &armada370_data, | ||
308 | }, | ||
309 | { | ||
310 | .compatible = "marvell,armada-xp-wdt", | ||
311 | .data = &armadaxp_data, | ||
312 | }, | ||
313 | {}, | ||
314 | }; | ||
315 | MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table); | ||
316 | |||
146 | static int orion_wdt_probe(struct platform_device *pdev) | 317 | static int orion_wdt_probe(struct platform_device *pdev) |
147 | { | 318 | { |
319 | struct orion_watchdog *dev; | ||
320 | const struct of_device_id *match; | ||
321 | unsigned int wdt_max_duration; /* (seconds) */ | ||
148 | struct resource *res; | 322 | struct resource *res; |
149 | int ret; | 323 | int ret, irq; |
150 | 324 | ||
151 | clk = devm_clk_get(&pdev->dev, NULL); | 325 | dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog), |
152 | if (IS_ERR(clk)) { | 326 | GFP_KERNEL); |
153 | dev_err(&pdev->dev, "Orion Watchdog missing clock\n"); | 327 | if (!dev) |
154 | return -ENODEV; | 328 | return -ENOMEM; |
155 | } | 329 | |
156 | clk_prepare_enable(clk); | 330 | match = of_match_device(orion_wdt_of_match_table, &pdev->dev); |
157 | wdt_tclk = clk_get_rate(clk); | 331 | if (!match) |
332 | /* Default legacy match */ | ||
333 | match = &orion_wdt_of_match_table[0]; | ||
334 | |||
335 | dev->wdt.info = &orion_wdt_info; | ||
336 | dev->wdt.ops = &orion_wdt_ops; | ||
337 | dev->wdt.min_timeout = 1; | ||
338 | dev->data = match->data; | ||
158 | 339 | ||
159 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 340 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
160 | if (!res) | 341 | if (!res) |
161 | return -ENODEV; | 342 | return -ENODEV; |
162 | wdt_reg = devm_ioremap(&pdev->dev, res->start, resource_size(res)); | ||
163 | if (!wdt_reg) | ||
164 | return -ENOMEM; | ||
165 | 343 | ||
166 | wdt_max_duration = WDT_MAX_CYCLE_COUNT / wdt_tclk; | 344 | dev->reg = devm_ioremap(&pdev->dev, res->start, |
345 | resource_size(res)); | ||
346 | if (!dev->reg) | ||
347 | return -ENOMEM; | ||
167 | 348 | ||
168 | orion_wdt.timeout = wdt_max_duration; | 349 | dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start & |
169 | orion_wdt.max_timeout = wdt_max_duration; | 350 | INTERNAL_REGS_MASK); |
170 | watchdog_init_timeout(&orion_wdt, heartbeat, &pdev->dev); | 351 | if (!dev->rstout) |
352 | return -ENODEV; | ||
171 | 353 | ||
172 | watchdog_set_nowayout(&orion_wdt, nowayout); | 354 | ret = dev->data->clock_init(pdev, dev); |
173 | ret = watchdog_register_device(&orion_wdt); | ||
174 | if (ret) { | 355 | if (ret) { |
175 | clk_disable_unprepare(clk); | 356 | dev_err(&pdev->dev, "cannot initialize clock\n"); |
176 | return ret; | 357 | return ret; |
177 | } | 358 | } |
178 | 359 | ||
360 | wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate; | ||
361 | |||
362 | dev->wdt.timeout = wdt_max_duration; | ||
363 | dev->wdt.max_timeout = wdt_max_duration; | ||
364 | watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev); | ||
365 | |||
366 | platform_set_drvdata(pdev, &dev->wdt); | ||
367 | watchdog_set_drvdata(&dev->wdt, dev); | ||
368 | |||
369 | /* | ||
370 | * Let's make sure the watchdog is fully stopped, unless it's | ||
371 | * explicitly enabled. This may be the case if the module was | ||
372 | * removed and re-insterted, or if the bootloader explicitly | ||
373 | * set a running watchdog before booting the kernel. | ||
374 | */ | ||
375 | if (!orion_wdt_enabled(dev)) | ||
376 | orion_wdt_stop(&dev->wdt); | ||
377 | |||
378 | /* Request the IRQ only after the watchdog is disabled */ | ||
379 | irq = platform_get_irq(pdev, 0); | ||
380 | if (irq > 0) { | ||
381 | /* | ||
382 | * Not all supported platforms specify an interrupt for the | ||
383 | * watchdog, so let's make it optional. | ||
384 | */ | ||
385 | ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0, | ||
386 | pdev->name, dev); | ||
387 | if (ret < 0) { | ||
388 | dev_err(&pdev->dev, "failed to request IRQ\n"); | ||
389 | goto disable_clk; | ||
390 | } | ||
391 | } | ||
392 | |||
393 | watchdog_set_nowayout(&dev->wdt, nowayout); | ||
394 | ret = watchdog_register_device(&dev->wdt); | ||
395 | if (ret) | ||
396 | goto disable_clk; | ||
397 | |||
179 | pr_info("Initial timeout %d sec%s\n", | 398 | pr_info("Initial timeout %d sec%s\n", |
180 | orion_wdt.timeout, nowayout ? ", nowayout" : ""); | 399 | dev->wdt.timeout, nowayout ? ", nowayout" : ""); |
181 | return 0; | 400 | return 0; |
401 | |||
402 | disable_clk: | ||
403 | clk_disable_unprepare(dev->clk); | ||
404 | clk_put(dev->clk); | ||
405 | return ret; | ||
182 | } | 406 | } |
183 | 407 | ||
184 | static int orion_wdt_remove(struct platform_device *pdev) | 408 | static int orion_wdt_remove(struct platform_device *pdev) |
185 | { | 409 | { |
186 | watchdog_unregister_device(&orion_wdt); | 410 | struct watchdog_device *wdt_dev = platform_get_drvdata(pdev); |
187 | clk_disable_unprepare(clk); | 411 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); |
412 | |||
413 | watchdog_unregister_device(wdt_dev); | ||
414 | clk_disable_unprepare(dev->clk); | ||
415 | clk_put(dev->clk); | ||
188 | return 0; | 416 | return 0; |
189 | } | 417 | } |
190 | 418 | ||
191 | static void orion_wdt_shutdown(struct platform_device *pdev) | 419 | static void orion_wdt_shutdown(struct platform_device *pdev) |
192 | { | 420 | { |
193 | orion_wdt_stop(&orion_wdt); | 421 | struct watchdog_device *wdt_dev = platform_get_drvdata(pdev); |
422 | orion_wdt_stop(wdt_dev); | ||
194 | } | 423 | } |
195 | 424 | ||
196 | static const struct of_device_id orion_wdt_of_match_table[] = { | ||
197 | { .compatible = "marvell,orion-wdt", }, | ||
198 | {}, | ||
199 | }; | ||
200 | MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table); | ||
201 | |||
202 | static struct platform_driver orion_wdt_driver = { | 425 | static struct platform_driver orion_wdt_driver = { |
203 | .probe = orion_wdt_probe, | 426 | .probe = orion_wdt_probe, |
204 | .remove = orion_wdt_remove, | 427 | .remove = orion_wdt_remove, |
diff --git a/fs/ceph/acl.c b/fs/ceph/acl.c index 4c2d452c4bfc..21887d63dad5 100644 --- a/fs/ceph/acl.c +++ b/fs/ceph/acl.c | |||
@@ -54,11 +54,6 @@ static inline struct posix_acl *ceph_get_cached_acl(struct inode *inode, | |||
54 | return acl; | 54 | return acl; |
55 | } | 55 | } |
56 | 56 | ||
57 | void ceph_forget_all_cached_acls(struct inode *inode) | ||
58 | { | ||
59 | forget_all_cached_acls(inode); | ||
60 | } | ||
61 | |||
62 | struct posix_acl *ceph_get_acl(struct inode *inode, int type) | 57 | struct posix_acl *ceph_get_acl(struct inode *inode, int type) |
63 | { | 58 | { |
64 | int size; | 59 | int size; |
@@ -160,11 +155,7 @@ int ceph_set_acl(struct inode *inode, struct posix_acl *acl, int type) | |||
160 | goto out_dput; | 155 | goto out_dput; |
161 | } | 156 | } |
162 | 157 | ||
163 | if (value) | 158 | ret = __ceph_setxattr(dentry, name, value, size, 0); |
164 | ret = __ceph_setxattr(dentry, name, value, size, 0); | ||
165 | else | ||
166 | ret = __ceph_removexattr(dentry, name); | ||
167 | |||
168 | if (ret) { | 159 | if (ret) { |
169 | if (new_mode != old_mode) { | 160 | if (new_mode != old_mode) { |
170 | newattrs.ia_mode = old_mode; | 161 | newattrs.ia_mode = old_mode; |
diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c index 6da4df84ba30..45eda6d7a40c 100644 --- a/fs/ceph/dir.c +++ b/fs/ceph/dir.c | |||
@@ -100,6 +100,14 @@ static unsigned fpos_off(loff_t p) | |||
100 | return p & 0xffffffff; | 100 | return p & 0xffffffff; |
101 | } | 101 | } |
102 | 102 | ||
103 | static int fpos_cmp(loff_t l, loff_t r) | ||
104 | { | ||
105 | int v = ceph_frag_compare(fpos_frag(l), fpos_frag(r)); | ||
106 | if (v) | ||
107 | return v; | ||
108 | return (int)(fpos_off(l) - fpos_off(r)); | ||
109 | } | ||
110 | |||
103 | /* | 111 | /* |
104 | * When possible, we try to satisfy a readdir by peeking at the | 112 | * When possible, we try to satisfy a readdir by peeking at the |
105 | * dcache. We make this work by carefully ordering dentries on | 113 | * dcache. We make this work by carefully ordering dentries on |
@@ -156,7 +164,7 @@ more: | |||
156 | if (!d_unhashed(dentry) && dentry->d_inode && | 164 | if (!d_unhashed(dentry) && dentry->d_inode && |
157 | ceph_snap(dentry->d_inode) != CEPH_SNAPDIR && | 165 | ceph_snap(dentry->d_inode) != CEPH_SNAPDIR && |
158 | ceph_ino(dentry->d_inode) != CEPH_INO_CEPH && | 166 | ceph_ino(dentry->d_inode) != CEPH_INO_CEPH && |
159 | ctx->pos <= di->offset) | 167 | fpos_cmp(ctx->pos, di->offset) <= 0) |
160 | break; | 168 | break; |
161 | dout(" skipping %p %.*s at %llu (%llu)%s%s\n", dentry, | 169 | dout(" skipping %p %.*s at %llu (%llu)%s%s\n", dentry, |
162 | dentry->d_name.len, dentry->d_name.name, di->offset, | 170 | dentry->d_name.len, dentry->d_name.name, di->offset, |
@@ -695,9 +703,8 @@ static int ceph_mknod(struct inode *dir, struct dentry *dentry, | |||
695 | ceph_mdsc_put_request(req); | 703 | ceph_mdsc_put_request(req); |
696 | 704 | ||
697 | if (!err) | 705 | if (!err) |
698 | err = ceph_init_acl(dentry, dentry->d_inode, dir); | 706 | ceph_init_acl(dentry, dentry->d_inode, dir); |
699 | 707 | else | |
700 | if (err) | ||
701 | d_drop(dentry); | 708 | d_drop(dentry); |
702 | return err; | 709 | return err; |
703 | } | 710 | } |
@@ -735,7 +742,9 @@ static int ceph_symlink(struct inode *dir, struct dentry *dentry, | |||
735 | if (!err && !req->r_reply_info.head->is_dentry) | 742 | if (!err && !req->r_reply_info.head->is_dentry) |
736 | err = ceph_handle_notrace_create(dir, dentry); | 743 | err = ceph_handle_notrace_create(dir, dentry); |
737 | ceph_mdsc_put_request(req); | 744 | ceph_mdsc_put_request(req); |
738 | if (err) | 745 | if (!err) |
746 | ceph_init_acl(dentry, dentry->d_inode, dir); | ||
747 | else | ||
739 | d_drop(dentry); | 748 | d_drop(dentry); |
740 | return err; | 749 | return err; |
741 | } | 750 | } |
@@ -776,7 +785,9 @@ static int ceph_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) | |||
776 | err = ceph_handle_notrace_create(dir, dentry); | 785 | err = ceph_handle_notrace_create(dir, dentry); |
777 | ceph_mdsc_put_request(req); | 786 | ceph_mdsc_put_request(req); |
778 | out: | 787 | out: |
779 | if (err < 0) | 788 | if (!err) |
789 | ceph_init_acl(dentry, dentry->d_inode, dir); | ||
790 | else | ||
780 | d_drop(dentry); | 791 | d_drop(dentry); |
781 | return err; | 792 | return err; |
782 | } | 793 | } |
diff --git a/fs/ceph/file.c b/fs/ceph/file.c index dfd2ce3419f8..09c7afe32e49 100644 --- a/fs/ceph/file.c +++ b/fs/ceph/file.c | |||
@@ -286,6 +286,7 @@ int ceph_atomic_open(struct inode *dir, struct dentry *dentry, | |||
286 | } else { | 286 | } else { |
287 | dout("atomic_open finish_open on dn %p\n", dn); | 287 | dout("atomic_open finish_open on dn %p\n", dn); |
288 | if (req->r_op == CEPH_MDS_OP_CREATE && req->r_reply_info.has_create_ino) { | 288 | if (req->r_op == CEPH_MDS_OP_CREATE && req->r_reply_info.has_create_ino) { |
289 | ceph_init_acl(dentry, dentry->d_inode, dir); | ||
289 | *opened |= FILE_CREATED; | 290 | *opened |= FILE_CREATED; |
290 | } | 291 | } |
291 | err = finish_open(file, dentry, ceph_open, opened); | 292 | err = finish_open(file, dentry, ceph_open, opened); |
diff --git a/fs/ceph/super.c b/fs/ceph/super.c index 2df963f1cf5a..10a4ccbf38da 100644 --- a/fs/ceph/super.c +++ b/fs/ceph/super.c | |||
@@ -144,7 +144,11 @@ enum { | |||
144 | Opt_ino32, | 144 | Opt_ino32, |
145 | Opt_noino32, | 145 | Opt_noino32, |
146 | Opt_fscache, | 146 | Opt_fscache, |
147 | Opt_nofscache | 147 | Opt_nofscache, |
148 | #ifdef CONFIG_CEPH_FS_POSIX_ACL | ||
149 | Opt_acl, | ||
150 | #endif | ||
151 | Opt_noacl | ||
148 | }; | 152 | }; |
149 | 153 | ||
150 | static match_table_t fsopt_tokens = { | 154 | static match_table_t fsopt_tokens = { |
@@ -172,6 +176,10 @@ static match_table_t fsopt_tokens = { | |||
172 | {Opt_noino32, "noino32"}, | 176 | {Opt_noino32, "noino32"}, |
173 | {Opt_fscache, "fsc"}, | 177 | {Opt_fscache, "fsc"}, |
174 | {Opt_nofscache, "nofsc"}, | 178 | {Opt_nofscache, "nofsc"}, |
179 | #ifdef CONFIG_CEPH_FS_POSIX_ACL | ||
180 | {Opt_acl, "acl"}, | ||
181 | #endif | ||
182 | {Opt_noacl, "noacl"}, | ||
175 | {-1, NULL} | 183 | {-1, NULL} |
176 | }; | 184 | }; |
177 | 185 | ||
@@ -271,6 +279,14 @@ static int parse_fsopt_token(char *c, void *private) | |||
271 | case Opt_nofscache: | 279 | case Opt_nofscache: |
272 | fsopt->flags &= ~CEPH_MOUNT_OPT_FSCACHE; | 280 | fsopt->flags &= ~CEPH_MOUNT_OPT_FSCACHE; |
273 | break; | 281 | break; |
282 | #ifdef CONFIG_CEPH_FS_POSIX_ACL | ||
283 | case Opt_acl: | ||
284 | fsopt->sb_flags |= MS_POSIXACL; | ||
285 | break; | ||
286 | #endif | ||
287 | case Opt_noacl: | ||
288 | fsopt->sb_flags &= ~MS_POSIXACL; | ||
289 | break; | ||
274 | default: | 290 | default: |
275 | BUG_ON(token); | 291 | BUG_ON(token); |
276 | } | 292 | } |
@@ -438,6 +454,13 @@ static int ceph_show_options(struct seq_file *m, struct dentry *root) | |||
438 | else | 454 | else |
439 | seq_puts(m, ",nofsc"); | 455 | seq_puts(m, ",nofsc"); |
440 | 456 | ||
457 | #ifdef CONFIG_CEPH_FS_POSIX_ACL | ||
458 | if (fsopt->sb_flags & MS_POSIXACL) | ||
459 | seq_puts(m, ",acl"); | ||
460 | else | ||
461 | seq_puts(m, ",noacl"); | ||
462 | #endif | ||
463 | |||
441 | if (fsopt->wsize) | 464 | if (fsopt->wsize) |
442 | seq_printf(m, ",wsize=%d", fsopt->wsize); | 465 | seq_printf(m, ",wsize=%d", fsopt->wsize); |
443 | if (fsopt->rsize != CEPH_RSIZE_DEFAULT) | 466 | if (fsopt->rsize != CEPH_RSIZE_DEFAULT) |
@@ -819,9 +842,6 @@ static int ceph_set_super(struct super_block *s, void *data) | |||
819 | 842 | ||
820 | s->s_flags = fsc->mount_options->sb_flags; | 843 | s->s_flags = fsc->mount_options->sb_flags; |
821 | s->s_maxbytes = 1ULL << 40; /* temp value until we get mdsmap */ | 844 | s->s_maxbytes = 1ULL << 40; /* temp value until we get mdsmap */ |
822 | #ifdef CONFIG_CEPH_FS_POSIX_ACL | ||
823 | s->s_flags |= MS_POSIXACL; | ||
824 | #endif | ||
825 | 845 | ||
826 | s->s_xattr = ceph_xattr_handlers; | 846 | s->s_xattr = ceph_xattr_handlers; |
827 | s->s_fs_info = fsc; | 847 | s->s_fs_info = fsc; |
@@ -911,6 +931,10 @@ static struct dentry *ceph_mount(struct file_system_type *fs_type, | |||
911 | struct ceph_options *opt = NULL; | 931 | struct ceph_options *opt = NULL; |
912 | 932 | ||
913 | dout("ceph_mount\n"); | 933 | dout("ceph_mount\n"); |
934 | |||
935 | #ifdef CONFIG_CEPH_FS_POSIX_ACL | ||
936 | flags |= MS_POSIXACL; | ||
937 | #endif | ||
914 | err = parse_mount_options(&fsopt, &opt, flags, data, dev_name, &path); | 938 | err = parse_mount_options(&fsopt, &opt, flags, data, dev_name, &path); |
915 | if (err < 0) { | 939 | if (err < 0) { |
916 | res = ERR_PTR(err); | 940 | res = ERR_PTR(err); |
diff --git a/fs/ceph/super.h b/fs/ceph/super.h index 19793b56d0a7..d8801a95b685 100644 --- a/fs/ceph/super.h +++ b/fs/ceph/super.h | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/wait.h> | 13 | #include <linux/wait.h> |
14 | #include <linux/writeback.h> | 14 | #include <linux/writeback.h> |
15 | #include <linux/slab.h> | 15 | #include <linux/slab.h> |
16 | #include <linux/posix_acl.h> | ||
16 | 17 | ||
17 | #include <linux/ceph/libceph.h> | 18 | #include <linux/ceph/libceph.h> |
18 | 19 | ||
@@ -743,7 +744,11 @@ extern const struct xattr_handler *ceph_xattr_handlers[]; | |||
743 | struct posix_acl *ceph_get_acl(struct inode *, int); | 744 | struct posix_acl *ceph_get_acl(struct inode *, int); |
744 | int ceph_set_acl(struct inode *inode, struct posix_acl *acl, int type); | 745 | int ceph_set_acl(struct inode *inode, struct posix_acl *acl, int type); |
745 | int ceph_init_acl(struct dentry *, struct inode *, struct inode *); | 746 | int ceph_init_acl(struct dentry *, struct inode *, struct inode *); |
746 | void ceph_forget_all_cached_acls(struct inode *inode); | 747 | |
748 | static inline void ceph_forget_all_cached_acls(struct inode *inode) | ||
749 | { | ||
750 | forget_all_cached_acls(inode); | ||
751 | } | ||
747 | 752 | ||
748 | #else | 753 | #else |
749 | 754 | ||
diff --git a/fs/ceph/xattr.c b/fs/ceph/xattr.c index 898b6565ad3e..a55ec37378c6 100644 --- a/fs/ceph/xattr.c +++ b/fs/ceph/xattr.c | |||
@@ -12,6 +12,9 @@ | |||
12 | #define XATTR_CEPH_PREFIX "ceph." | 12 | #define XATTR_CEPH_PREFIX "ceph." |
13 | #define XATTR_CEPH_PREFIX_LEN (sizeof (XATTR_CEPH_PREFIX) - 1) | 13 | #define XATTR_CEPH_PREFIX_LEN (sizeof (XATTR_CEPH_PREFIX) - 1) |
14 | 14 | ||
15 | static int __remove_xattr(struct ceph_inode_info *ci, | ||
16 | struct ceph_inode_xattr *xattr); | ||
17 | |||
15 | /* | 18 | /* |
16 | * List of handlers for synthetic system.* attributes. Other | 19 | * List of handlers for synthetic system.* attributes. Other |
17 | * attributes are handled directly. | 20 | * attributes are handled directly. |
@@ -319,8 +322,7 @@ static struct ceph_vxattr *ceph_match_vxattr(struct inode *inode, | |||
319 | static int __set_xattr(struct ceph_inode_info *ci, | 322 | static int __set_xattr(struct ceph_inode_info *ci, |
320 | const char *name, int name_len, | 323 | const char *name, int name_len, |
321 | const char *val, int val_len, | 324 | const char *val, int val_len, |
322 | int dirty, | 325 | int flags, int update_xattr, |
323 | int should_free_name, int should_free_val, | ||
324 | struct ceph_inode_xattr **newxattr) | 326 | struct ceph_inode_xattr **newxattr) |
325 | { | 327 | { |
326 | struct rb_node **p; | 328 | struct rb_node **p; |
@@ -349,12 +351,31 @@ static int __set_xattr(struct ceph_inode_info *ci, | |||
349 | xattr = NULL; | 351 | xattr = NULL; |
350 | } | 352 | } |
351 | 353 | ||
354 | if (update_xattr) { | ||
355 | int err = 0; | ||
356 | if (xattr && (flags & XATTR_CREATE)) | ||
357 | err = -EEXIST; | ||
358 | else if (!xattr && (flags & XATTR_REPLACE)) | ||
359 | err = -ENODATA; | ||
360 | if (err) { | ||
361 | kfree(name); | ||
362 | kfree(val); | ||
363 | return err; | ||
364 | } | ||
365 | if (update_xattr < 0) { | ||
366 | if (xattr) | ||
367 | __remove_xattr(ci, xattr); | ||
368 | kfree(name); | ||
369 | return 0; | ||
370 | } | ||
371 | } | ||
372 | |||
352 | if (!xattr) { | 373 | if (!xattr) { |
353 | new = 1; | 374 | new = 1; |
354 | xattr = *newxattr; | 375 | xattr = *newxattr; |
355 | xattr->name = name; | 376 | xattr->name = name; |
356 | xattr->name_len = name_len; | 377 | xattr->name_len = name_len; |
357 | xattr->should_free_name = should_free_name; | 378 | xattr->should_free_name = update_xattr; |
358 | 379 | ||
359 | ci->i_xattrs.count++; | 380 | ci->i_xattrs.count++; |
360 | dout("__set_xattr count=%d\n", ci->i_xattrs.count); | 381 | dout("__set_xattr count=%d\n", ci->i_xattrs.count); |
@@ -364,7 +385,7 @@ static int __set_xattr(struct ceph_inode_info *ci, | |||
364 | if (xattr->should_free_val) | 385 | if (xattr->should_free_val) |
365 | kfree((void *)xattr->val); | 386 | kfree((void *)xattr->val); |
366 | 387 | ||
367 | if (should_free_name) { | 388 | if (update_xattr) { |
368 | kfree((void *)name); | 389 | kfree((void *)name); |
369 | name = xattr->name; | 390 | name = xattr->name; |
370 | } | 391 | } |
@@ -379,8 +400,8 @@ static int __set_xattr(struct ceph_inode_info *ci, | |||
379 | xattr->val = ""; | 400 | xattr->val = ""; |
380 | 401 | ||
381 | xattr->val_len = val_len; | 402 | xattr->val_len = val_len; |
382 | xattr->dirty = dirty; | 403 | xattr->dirty = update_xattr; |
383 | xattr->should_free_val = (val && should_free_val); | 404 | xattr->should_free_val = (val && update_xattr); |
384 | 405 | ||
385 | if (new) { | 406 | if (new) { |
386 | rb_link_node(&xattr->node, parent, p); | 407 | rb_link_node(&xattr->node, parent, p); |
@@ -442,7 +463,7 @@ static int __remove_xattr(struct ceph_inode_info *ci, | |||
442 | struct ceph_inode_xattr *xattr) | 463 | struct ceph_inode_xattr *xattr) |
443 | { | 464 | { |
444 | if (!xattr) | 465 | if (!xattr) |
445 | return -EOPNOTSUPP; | 466 | return -ENODATA; |
446 | 467 | ||
447 | rb_erase(&xattr->node, &ci->i_xattrs.index); | 468 | rb_erase(&xattr->node, &ci->i_xattrs.index); |
448 | 469 | ||
@@ -588,7 +609,7 @@ start: | |||
588 | p += len; | 609 | p += len; |
589 | 610 | ||
590 | err = __set_xattr(ci, name, namelen, val, len, | 611 | err = __set_xattr(ci, name, namelen, val, len, |
591 | 0, 0, 0, &xattrs[numattr]); | 612 | 0, 0, &xattrs[numattr]); |
592 | 613 | ||
593 | if (err < 0) | 614 | if (err < 0) |
594 | goto bad; | 615 | goto bad; |
@@ -850,6 +871,9 @@ static int ceph_sync_setxattr(struct dentry *dentry, const char *name, | |||
850 | 871 | ||
851 | dout("setxattr value=%.*s\n", (int)size, value); | 872 | dout("setxattr value=%.*s\n", (int)size, value); |
852 | 873 | ||
874 | if (!value) | ||
875 | flags |= CEPH_XATTR_REMOVE; | ||
876 | |||
853 | /* do request */ | 877 | /* do request */ |
854 | req = ceph_mdsc_create_request(mdsc, CEPH_MDS_OP_SETXATTR, | 878 | req = ceph_mdsc_create_request(mdsc, CEPH_MDS_OP_SETXATTR, |
855 | USE_AUTH_MDS); | 879 | USE_AUTH_MDS); |
@@ -892,7 +916,7 @@ int __ceph_setxattr(struct dentry *dentry, const char *name, | |||
892 | struct ceph_inode_info *ci = ceph_inode(inode); | 916 | struct ceph_inode_info *ci = ceph_inode(inode); |
893 | int issued; | 917 | int issued; |
894 | int err; | 918 | int err; |
895 | int dirty; | 919 | int dirty = 0; |
896 | int name_len = strlen(name); | 920 | int name_len = strlen(name); |
897 | int val_len = size; | 921 | int val_len = size; |
898 | char *newname = NULL; | 922 | char *newname = NULL; |
@@ -953,12 +977,14 @@ retry: | |||
953 | goto retry; | 977 | goto retry; |
954 | } | 978 | } |
955 | 979 | ||
956 | err = __set_xattr(ci, newname, name_len, newval, | 980 | err = __set_xattr(ci, newname, name_len, newval, val_len, |
957 | val_len, 1, 1, 1, &xattr); | 981 | flags, value ? 1 : -1, &xattr); |
958 | 982 | ||
959 | dirty = __ceph_mark_dirty_caps(ci, CEPH_CAP_XATTR_EXCL); | 983 | if (!err) { |
960 | ci->i_xattrs.dirty = true; | 984 | dirty = __ceph_mark_dirty_caps(ci, CEPH_CAP_XATTR_EXCL); |
961 | inode->i_ctime = CURRENT_TIME; | 985 | ci->i_xattrs.dirty = true; |
986 | inode->i_ctime = CURRENT_TIME; | ||
987 | } | ||
962 | 988 | ||
963 | spin_unlock(&ci->i_ceph_lock); | 989 | spin_unlock(&ci->i_ceph_lock); |
964 | if (dirty) | 990 | if (dirty) |
diff --git a/fs/cifs/cifsacl.c b/fs/cifs/cifsacl.c index c819b0bd491a..7ff866dbb89e 100644 --- a/fs/cifs/cifsacl.c +++ b/fs/cifs/cifsacl.c | |||
@@ -865,8 +865,8 @@ static int build_sec_desc(struct cifs_ntsd *pntsd, struct cifs_ntsd *pnntsd, | |||
865 | return rc; | 865 | return rc; |
866 | } | 866 | } |
867 | 867 | ||
868 | static struct cifs_ntsd *get_cifs_acl_by_fid(struct cifs_sb_info *cifs_sb, | 868 | struct cifs_ntsd *get_cifs_acl_by_fid(struct cifs_sb_info *cifs_sb, |
869 | __u16 fid, u32 *pacllen) | 869 | const struct cifs_fid *cifsfid, u32 *pacllen) |
870 | { | 870 | { |
871 | struct cifs_ntsd *pntsd = NULL; | 871 | struct cifs_ntsd *pntsd = NULL; |
872 | unsigned int xid; | 872 | unsigned int xid; |
@@ -877,7 +877,8 @@ static struct cifs_ntsd *get_cifs_acl_by_fid(struct cifs_sb_info *cifs_sb, | |||
877 | return ERR_CAST(tlink); | 877 | return ERR_CAST(tlink); |
878 | 878 | ||
879 | xid = get_xid(); | 879 | xid = get_xid(); |
880 | rc = CIFSSMBGetCIFSACL(xid, tlink_tcon(tlink), fid, &pntsd, pacllen); | 880 | rc = CIFSSMBGetCIFSACL(xid, tlink_tcon(tlink), cifsfid->netfid, &pntsd, |
881 | pacllen); | ||
881 | free_xid(xid); | 882 | free_xid(xid); |
882 | 883 | ||
883 | cifs_put_tlink(tlink); | 884 | cifs_put_tlink(tlink); |
@@ -946,7 +947,7 @@ struct cifs_ntsd *get_cifs_acl(struct cifs_sb_info *cifs_sb, | |||
946 | if (!open_file) | 947 | if (!open_file) |
947 | return get_cifs_acl_by_path(cifs_sb, path, pacllen); | 948 | return get_cifs_acl_by_path(cifs_sb, path, pacllen); |
948 | 949 | ||
949 | pntsd = get_cifs_acl_by_fid(cifs_sb, open_file->fid.netfid, pacllen); | 950 | pntsd = get_cifs_acl_by_fid(cifs_sb, &open_file->fid, pacllen); |
950 | cifsFileInfo_put(open_file); | 951 | cifsFileInfo_put(open_file); |
951 | return pntsd; | 952 | return pntsd; |
952 | } | 953 | } |
@@ -1006,19 +1007,31 @@ out: | |||
1006 | /* Translate the CIFS ACL (simlar to NTFS ACL) for a file into mode bits */ | 1007 | /* Translate the CIFS ACL (simlar to NTFS ACL) for a file into mode bits */ |
1007 | int | 1008 | int |
1008 | cifs_acl_to_fattr(struct cifs_sb_info *cifs_sb, struct cifs_fattr *fattr, | 1009 | cifs_acl_to_fattr(struct cifs_sb_info *cifs_sb, struct cifs_fattr *fattr, |
1009 | struct inode *inode, const char *path, const __u16 *pfid) | 1010 | struct inode *inode, const char *path, |
1011 | const struct cifs_fid *pfid) | ||
1010 | { | 1012 | { |
1011 | struct cifs_ntsd *pntsd = NULL; | 1013 | struct cifs_ntsd *pntsd = NULL; |
1012 | u32 acllen = 0; | 1014 | u32 acllen = 0; |
1013 | int rc = 0; | 1015 | int rc = 0; |
1016 | struct tcon_link *tlink = cifs_sb_tlink(cifs_sb); | ||
1017 | struct cifs_tcon *tcon; | ||
1014 | 1018 | ||
1015 | cifs_dbg(NOISY, "converting ACL to mode for %s\n", path); | 1019 | cifs_dbg(NOISY, "converting ACL to mode for %s\n", path); |
1016 | 1020 | ||
1017 | if (pfid) | 1021 | if (IS_ERR(tlink)) |
1018 | pntsd = get_cifs_acl_by_fid(cifs_sb, *pfid, &acllen); | 1022 | return PTR_ERR(tlink); |
1019 | else | 1023 | tcon = tlink_tcon(tlink); |
1020 | pntsd = get_cifs_acl(cifs_sb, inode, path, &acllen); | ||
1021 | 1024 | ||
1025 | if (pfid && (tcon->ses->server->ops->get_acl_by_fid)) | ||
1026 | pntsd = tcon->ses->server->ops->get_acl_by_fid(cifs_sb, pfid, | ||
1027 | &acllen); | ||
1028 | else if (tcon->ses->server->ops->get_acl) | ||
1029 | pntsd = tcon->ses->server->ops->get_acl(cifs_sb, inode, path, | ||
1030 | &acllen); | ||
1031 | else { | ||
1032 | cifs_put_tlink(tlink); | ||
1033 | return -EOPNOTSUPP; | ||
1034 | } | ||
1022 | /* if we can retrieve the ACL, now parse Access Control Entries, ACEs */ | 1035 | /* if we can retrieve the ACL, now parse Access Control Entries, ACEs */ |
1023 | if (IS_ERR(pntsd)) { | 1036 | if (IS_ERR(pntsd)) { |
1024 | rc = PTR_ERR(pntsd); | 1037 | rc = PTR_ERR(pntsd); |
@@ -1030,6 +1043,8 @@ cifs_acl_to_fattr(struct cifs_sb_info *cifs_sb, struct cifs_fattr *fattr, | |||
1030 | cifs_dbg(VFS, "parse sec desc failed rc = %d\n", rc); | 1043 | cifs_dbg(VFS, "parse sec desc failed rc = %d\n", rc); |
1031 | } | 1044 | } |
1032 | 1045 | ||
1046 | cifs_put_tlink(tlink); | ||
1047 | |||
1033 | return rc; | 1048 | return rc; |
1034 | } | 1049 | } |
1035 | 1050 | ||
diff --git a/fs/cifs/cifsglob.h b/fs/cifs/cifsglob.h index 86dc28c7aa5c..cf32f0393369 100644 --- a/fs/cifs/cifsglob.h +++ b/fs/cifs/cifsglob.h | |||
@@ -398,6 +398,8 @@ struct smb_version_operations { | |||
398 | const struct nls_table *, int); | 398 | const struct nls_table *, int); |
399 | struct cifs_ntsd * (*get_acl)(struct cifs_sb_info *, struct inode *, | 399 | struct cifs_ntsd * (*get_acl)(struct cifs_sb_info *, struct inode *, |
400 | const char *, u32 *); | 400 | const char *, u32 *); |
401 | struct cifs_ntsd * (*get_acl_by_fid)(struct cifs_sb_info *, | ||
402 | const struct cifs_fid *, u32 *); | ||
401 | int (*set_acl)(struct cifs_ntsd *, __u32, struct inode *, const char *, | 403 | int (*set_acl)(struct cifs_ntsd *, __u32, struct inode *, const char *, |
402 | int); | 404 | int); |
403 | }; | 405 | }; |
diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h index d00e09dfc452..acc4ee8ed075 100644 --- a/fs/cifs/cifsproto.h +++ b/fs/cifs/cifsproto.h | |||
@@ -151,7 +151,7 @@ extern struct inode *cifs_iget(struct super_block *sb, | |||
151 | 151 | ||
152 | extern int cifs_get_inode_info(struct inode **inode, const char *full_path, | 152 | extern int cifs_get_inode_info(struct inode **inode, const char *full_path, |
153 | FILE_ALL_INFO *data, struct super_block *sb, | 153 | FILE_ALL_INFO *data, struct super_block *sb, |
154 | int xid, const __u16 *fid); | 154 | int xid, const struct cifs_fid *fid); |
155 | extern int cifs_get_inode_info_unix(struct inode **pinode, | 155 | extern int cifs_get_inode_info_unix(struct inode **pinode, |
156 | const unsigned char *search_path, | 156 | const unsigned char *search_path, |
157 | struct super_block *sb, unsigned int xid); | 157 | struct super_block *sb, unsigned int xid); |
@@ -162,11 +162,13 @@ extern int cifs_rename_pending_delete(const char *full_path, | |||
162 | const unsigned int xid); | 162 | const unsigned int xid); |
163 | extern int cifs_acl_to_fattr(struct cifs_sb_info *cifs_sb, | 163 | extern int cifs_acl_to_fattr(struct cifs_sb_info *cifs_sb, |
164 | struct cifs_fattr *fattr, struct inode *inode, | 164 | struct cifs_fattr *fattr, struct inode *inode, |
165 | const char *path, const __u16 *pfid); | 165 | const char *path, const struct cifs_fid *pfid); |
166 | extern int id_mode_to_cifs_acl(struct inode *inode, const char *path, __u64, | 166 | extern int id_mode_to_cifs_acl(struct inode *inode, const char *path, __u64, |
167 | kuid_t, kgid_t); | 167 | kuid_t, kgid_t); |
168 | extern struct cifs_ntsd *get_cifs_acl(struct cifs_sb_info *, struct inode *, | 168 | extern struct cifs_ntsd *get_cifs_acl(struct cifs_sb_info *, struct inode *, |
169 | const char *, u32 *); | 169 | const char *, u32 *); |
170 | extern struct cifs_ntsd *get_cifs_acl_by_fid(struct cifs_sb_info *, | ||
171 | const struct cifs_fid *, u32 *); | ||
170 | extern int set_cifs_acl(struct cifs_ntsd *, __u32, struct inode *, | 172 | extern int set_cifs_acl(struct cifs_ntsd *, __u32, struct inode *, |
171 | const char *, int); | 173 | const char *, int); |
172 | 174 | ||
diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c index d3a6796caa5a..3db0c5fd9a11 100644 --- a/fs/cifs/dir.c +++ b/fs/cifs/dir.c | |||
@@ -378,7 +378,7 @@ cifs_create_get_file_info: | |||
378 | xid); | 378 | xid); |
379 | else { | 379 | else { |
380 | rc = cifs_get_inode_info(&newinode, full_path, buf, inode->i_sb, | 380 | rc = cifs_get_inode_info(&newinode, full_path, buf, inode->i_sb, |
381 | xid, &fid->netfid); | 381 | xid, fid); |
382 | if (newinode) { | 382 | if (newinode) { |
383 | if (server->ops->set_lease_key) | 383 | if (server->ops->set_lease_key) |
384 | server->ops->set_lease_key(newinode, fid); | 384 | server->ops->set_lease_key(newinode, fid); |
diff --git a/fs/cifs/file.c b/fs/cifs/file.c index 755584684f6c..53c15074bb36 100644 --- a/fs/cifs/file.c +++ b/fs/cifs/file.c | |||
@@ -244,7 +244,7 @@ cifs_nt_open(char *full_path, struct inode *inode, struct cifs_sb_info *cifs_sb, | |||
244 | xid); | 244 | xid); |
245 | else | 245 | else |
246 | rc = cifs_get_inode_info(&inode, full_path, buf, inode->i_sb, | 246 | rc = cifs_get_inode_info(&inode, full_path, buf, inode->i_sb, |
247 | xid, &fid->netfid); | 247 | xid, fid); |
248 | 248 | ||
249 | out: | 249 | out: |
250 | kfree(buf); | 250 | kfree(buf); |
@@ -2389,7 +2389,7 @@ cifs_iovec_write(struct file *file, const struct iovec *iov, | |||
2389 | unsigned long nr_segs, loff_t *poffset) | 2389 | unsigned long nr_segs, loff_t *poffset) |
2390 | { | 2390 | { |
2391 | unsigned long nr_pages, i; | 2391 | unsigned long nr_pages, i; |
2392 | size_t copied, len, cur_len; | 2392 | size_t bytes, copied, len, cur_len; |
2393 | ssize_t total_written = 0; | 2393 | ssize_t total_written = 0; |
2394 | loff_t offset; | 2394 | loff_t offset; |
2395 | struct iov_iter it; | 2395 | struct iov_iter it; |
@@ -2444,14 +2444,45 @@ cifs_iovec_write(struct file *file, const struct iovec *iov, | |||
2444 | 2444 | ||
2445 | save_len = cur_len; | 2445 | save_len = cur_len; |
2446 | for (i = 0; i < nr_pages; i++) { | 2446 | for (i = 0; i < nr_pages; i++) { |
2447 | copied = min_t(const size_t, cur_len, PAGE_SIZE); | 2447 | bytes = min_t(const size_t, cur_len, PAGE_SIZE); |
2448 | copied = iov_iter_copy_from_user(wdata->pages[i], &it, | 2448 | copied = iov_iter_copy_from_user(wdata->pages[i], &it, |
2449 | 0, copied); | 2449 | 0, bytes); |
2450 | cur_len -= copied; | 2450 | cur_len -= copied; |
2451 | iov_iter_advance(&it, copied); | 2451 | iov_iter_advance(&it, copied); |
2452 | /* | ||
2453 | * If we didn't copy as much as we expected, then that | ||
2454 | * may mean we trod into an unmapped area. Stop copying | ||
2455 | * at that point. On the next pass through the big | ||
2456 | * loop, we'll likely end up getting a zero-length | ||
2457 | * write and bailing out of it. | ||
2458 | */ | ||
2459 | if (copied < bytes) | ||
2460 | break; | ||
2452 | } | 2461 | } |
2453 | cur_len = save_len - cur_len; | 2462 | cur_len = save_len - cur_len; |
2454 | 2463 | ||
2464 | /* | ||
2465 | * If we have no data to send, then that probably means that | ||
2466 | * the copy above failed altogether. That's most likely because | ||
2467 | * the address in the iovec was bogus. Set the rc to -EFAULT, | ||
2468 | * free anything we allocated and bail out. | ||
2469 | */ | ||
2470 | if (!cur_len) { | ||
2471 | for (i = 0; i < nr_pages; i++) | ||
2472 | put_page(wdata->pages[i]); | ||
2473 | kfree(wdata); | ||
2474 | rc = -EFAULT; | ||
2475 | break; | ||
2476 | } | ||
2477 | |||
2478 | /* | ||
2479 | * i + 1 now represents the number of pages we actually used in | ||
2480 | * the copy phase above. Bring nr_pages down to that, and free | ||
2481 | * any pages that we didn't use. | ||
2482 | */ | ||
2483 | for ( ; nr_pages > i + 1; nr_pages--) | ||
2484 | put_page(wdata->pages[nr_pages - 1]); | ||
2485 | |||
2455 | wdata->sync_mode = WB_SYNC_ALL; | 2486 | wdata->sync_mode = WB_SYNC_ALL; |
2456 | wdata->nr_pages = nr_pages; | 2487 | wdata->nr_pages = nr_pages; |
2457 | wdata->offset = (__u64)offset; | 2488 | wdata->offset = (__u64)offset; |
diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c index be58b8fcdb3c..aadc2b68678b 100644 --- a/fs/cifs/inode.c +++ b/fs/cifs/inode.c | |||
@@ -677,7 +677,7 @@ cgfi_exit: | |||
677 | int | 677 | int |
678 | cifs_get_inode_info(struct inode **inode, const char *full_path, | 678 | cifs_get_inode_info(struct inode **inode, const char *full_path, |
679 | FILE_ALL_INFO *data, struct super_block *sb, int xid, | 679 | FILE_ALL_INFO *data, struct super_block *sb, int xid, |
680 | const __u16 *fid) | 680 | const struct cifs_fid *fid) |
681 | { | 681 | { |
682 | bool validinum = false; | 682 | bool validinum = false; |
683 | __u16 srchflgs; | 683 | __u16 srchflgs; |
diff --git a/fs/cifs/smb1ops.c b/fs/cifs/smb1ops.c index bfd66d84831e..526fb89f9230 100644 --- a/fs/cifs/smb1ops.c +++ b/fs/cifs/smb1ops.c | |||
@@ -1073,6 +1073,7 @@ struct smb_version_operations smb1_operations = { | |||
1073 | #endif /* CIFS_XATTR */ | 1073 | #endif /* CIFS_XATTR */ |
1074 | #ifdef CONFIG_CIFS_ACL | 1074 | #ifdef CONFIG_CIFS_ACL |
1075 | .get_acl = get_cifs_acl, | 1075 | .get_acl = get_cifs_acl, |
1076 | .get_acl_by_fid = get_cifs_acl_by_fid, | ||
1076 | .set_acl = set_cifs_acl, | 1077 | .set_acl = set_cifs_acl, |
1077 | #endif /* CIFS_ACL */ | 1078 | #endif /* CIFS_ACL */ |
1078 | }; | 1079 | }; |
diff --git a/fs/cifs/smb2glob.h b/fs/cifs/smb2glob.h index c38350851b08..bc0bb9c34f72 100644 --- a/fs/cifs/smb2glob.h +++ b/fs/cifs/smb2glob.h | |||
@@ -57,4 +57,7 @@ | |||
57 | #define SMB2_CMACAES_SIZE (16) | 57 | #define SMB2_CMACAES_SIZE (16) |
58 | #define SMB3_SIGNKEY_SIZE (16) | 58 | #define SMB3_SIGNKEY_SIZE (16) |
59 | 59 | ||
60 | /* Maximum buffer size value we can send with 1 credit */ | ||
61 | #define SMB2_MAX_BUFFER_SIZE 65536 | ||
62 | |||
60 | #endif /* _SMB2_GLOB_H */ | 63 | #endif /* _SMB2_GLOB_H */ |
diff --git a/fs/cifs/smb2ops.c b/fs/cifs/smb2ops.c index 757da3e54d3d..192f51a12cf1 100644 --- a/fs/cifs/smb2ops.c +++ b/fs/cifs/smb2ops.c | |||
@@ -182,11 +182,8 @@ smb2_negotiate_wsize(struct cifs_tcon *tcon, struct smb_vol *volume_info) | |||
182 | /* start with specified wsize, or default */ | 182 | /* start with specified wsize, or default */ |
183 | wsize = volume_info->wsize ? volume_info->wsize : CIFS_DEFAULT_IOSIZE; | 183 | wsize = volume_info->wsize ? volume_info->wsize : CIFS_DEFAULT_IOSIZE; |
184 | wsize = min_t(unsigned int, wsize, server->max_write); | 184 | wsize = min_t(unsigned int, wsize, server->max_write); |
185 | /* | 185 | /* set it to the maximum buffer size value we can send with 1 credit */ |
186 | * limit write size to 2 ** 16, because we don't support multicredit | 186 | wsize = min_t(unsigned int, wsize, SMB2_MAX_BUFFER_SIZE); |
187 | * requests now. | ||
188 | */ | ||
189 | wsize = min_t(unsigned int, wsize, 2 << 15); | ||
190 | 187 | ||
191 | return wsize; | 188 | return wsize; |
192 | } | 189 | } |
@@ -200,11 +197,8 @@ smb2_negotiate_rsize(struct cifs_tcon *tcon, struct smb_vol *volume_info) | |||
200 | /* start with specified rsize, or default */ | 197 | /* start with specified rsize, or default */ |
201 | rsize = volume_info->rsize ? volume_info->rsize : CIFS_DEFAULT_IOSIZE; | 198 | rsize = volume_info->rsize ? volume_info->rsize : CIFS_DEFAULT_IOSIZE; |
202 | rsize = min_t(unsigned int, rsize, server->max_read); | 199 | rsize = min_t(unsigned int, rsize, server->max_read); |
203 | /* | 200 | /* set it to the maximum buffer size value we can send with 1 credit */ |
204 | * limit write size to 2 ** 16, because we don't support multicredit | 201 | rsize = min_t(unsigned int, rsize, SMB2_MAX_BUFFER_SIZE); |
205 | * requests now. | ||
206 | */ | ||
207 | rsize = min_t(unsigned int, rsize, 2 << 15); | ||
208 | 202 | ||
209 | return rsize; | 203 | return rsize; |
210 | } | 204 | } |
diff --git a/fs/cifs/smb2pdu.c b/fs/cifs/smb2pdu.c index a3f7a9c3cc69..860344701067 100644 --- a/fs/cifs/smb2pdu.c +++ b/fs/cifs/smb2pdu.c | |||
@@ -413,7 +413,9 @@ SMB2_negotiate(const unsigned int xid, struct cifs_ses *ses) | |||
413 | 413 | ||
414 | /* SMB2 only has an extended negflavor */ | 414 | /* SMB2 only has an extended negflavor */ |
415 | server->negflavor = CIFS_NEGFLAVOR_EXTENDED; | 415 | server->negflavor = CIFS_NEGFLAVOR_EXTENDED; |
416 | server->maxBuf = le32_to_cpu(rsp->MaxTransactSize); | 416 | /* set it to the maximum buffer size value we can send with 1 credit */ |
417 | server->maxBuf = min_t(unsigned int, le32_to_cpu(rsp->MaxTransactSize), | ||
418 | SMB2_MAX_BUFFER_SIZE); | ||
417 | server->max_read = le32_to_cpu(rsp->MaxReadSize); | 419 | server->max_read = le32_to_cpu(rsp->MaxReadSize); |
418 | server->max_write = le32_to_cpu(rsp->MaxWriteSize); | 420 | server->max_write = le32_to_cpu(rsp->MaxWriteSize); |
419 | /* BB Do we need to validate the SecurityMode? */ | 421 | /* BB Do we need to validate the SecurityMode? */ |
diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h index ece55565b9cd..d3a534fdc5ff 100644 --- a/fs/ext4/ext4.h +++ b/fs/ext4/ext4.h | |||
@@ -771,6 +771,8 @@ do { \ | |||
771 | if (EXT4_FITS_IN_INODE(raw_inode, einode, xtime)) \ | 771 | if (EXT4_FITS_IN_INODE(raw_inode, einode, xtime)) \ |
772 | (einode)->xtime.tv_sec = \ | 772 | (einode)->xtime.tv_sec = \ |
773 | (signed)le32_to_cpu((raw_inode)->xtime); \ | 773 | (signed)le32_to_cpu((raw_inode)->xtime); \ |
774 | else \ | ||
775 | (einode)->xtime.tv_sec = 0; \ | ||
774 | if (EXT4_FITS_IN_INODE(raw_inode, einode, xtime ## _extra)) \ | 776 | if (EXT4_FITS_IN_INODE(raw_inode, einode, xtime ## _extra)) \ |
775 | ext4_decode_extra_time(&(einode)->xtime, \ | 777 | ext4_decode_extra_time(&(einode)->xtime, \ |
776 | raw_inode->xtime ## _extra); \ | 778 | raw_inode->xtime ## _extra); \ |
diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c index 10cff4736b11..74bc2d549c58 100644 --- a/fs/ext4/extents.c +++ b/fs/ext4/extents.c | |||
@@ -3906,6 +3906,7 @@ ext4_ext_handle_uninitialized_extents(handle_t *handle, struct inode *inode, | |||
3906 | } else | 3906 | } else |
3907 | err = ret; | 3907 | err = ret; |
3908 | map->m_flags |= EXT4_MAP_MAPPED; | 3908 | map->m_flags |= EXT4_MAP_MAPPED; |
3909 | map->m_pblk = newblock; | ||
3909 | if (allocated > map->m_len) | 3910 | if (allocated > map->m_len) |
3910 | allocated = map->m_len; | 3911 | allocated = map->m_len; |
3911 | map->m_len = allocated; | 3912 | map->m_len = allocated; |
diff --git a/fs/ext4/ioctl.c b/fs/ext4/ioctl.c index 6bea80614d77..a2a837f00407 100644 --- a/fs/ext4/ioctl.c +++ b/fs/ext4/ioctl.c | |||
@@ -140,7 +140,7 @@ static long swap_inode_boot_loader(struct super_block *sb, | |||
140 | handle = ext4_journal_start(inode_bl, EXT4_HT_MOVE_EXTENTS, 2); | 140 | handle = ext4_journal_start(inode_bl, EXT4_HT_MOVE_EXTENTS, 2); |
141 | if (IS_ERR(handle)) { | 141 | if (IS_ERR(handle)) { |
142 | err = -EINVAL; | 142 | err = -EINVAL; |
143 | goto swap_boot_out; | 143 | goto journal_err_out; |
144 | } | 144 | } |
145 | 145 | ||
146 | /* Protect extent tree against block allocations via delalloc */ | 146 | /* Protect extent tree against block allocations via delalloc */ |
@@ -198,6 +198,7 @@ static long swap_inode_boot_loader(struct super_block *sb, | |||
198 | 198 | ||
199 | ext4_double_up_write_data_sem(inode, inode_bl); | 199 | ext4_double_up_write_data_sem(inode, inode_bl); |
200 | 200 | ||
201 | journal_err_out: | ||
201 | ext4_inode_resume_unlocked_dio(inode); | 202 | ext4_inode_resume_unlocked_dio(inode); |
202 | ext4_inode_resume_unlocked_dio(inode_bl); | 203 | ext4_inode_resume_unlocked_dio(inode_bl); |
203 | 204 | ||
diff --git a/fs/ext4/resize.c b/fs/ext4/resize.c index c5adbb318a90..f3b84cd9de56 100644 --- a/fs/ext4/resize.c +++ b/fs/ext4/resize.c | |||
@@ -243,6 +243,7 @@ static int ext4_alloc_group_tables(struct super_block *sb, | |||
243 | ext4_group_t group; | 243 | ext4_group_t group; |
244 | ext4_group_t last_group; | 244 | ext4_group_t last_group; |
245 | unsigned overhead; | 245 | unsigned overhead; |
246 | __u16 uninit_mask = (flexbg_size > 1) ? ~EXT4_BG_BLOCK_UNINIT : ~0; | ||
246 | 247 | ||
247 | BUG_ON(flex_gd->count == 0 || group_data == NULL); | 248 | BUG_ON(flex_gd->count == 0 || group_data == NULL); |
248 | 249 | ||
@@ -266,7 +267,7 @@ next_group: | |||
266 | src_group++; | 267 | src_group++; |
267 | for (; src_group <= last_group; src_group++) { | 268 | for (; src_group <= last_group; src_group++) { |
268 | overhead = ext4_group_overhead_blocks(sb, src_group); | 269 | overhead = ext4_group_overhead_blocks(sb, src_group); |
269 | if (overhead != 0) | 270 | if (overhead == 0) |
270 | last_blk += group_data[src_group - group].blocks_count; | 271 | last_blk += group_data[src_group - group].blocks_count; |
271 | else | 272 | else |
272 | break; | 273 | break; |
@@ -280,8 +281,7 @@ next_group: | |||
280 | group = ext4_get_group_number(sb, start_blk - 1); | 281 | group = ext4_get_group_number(sb, start_blk - 1); |
281 | group -= group_data[0].group; | 282 | group -= group_data[0].group; |
282 | group_data[group].free_blocks_count--; | 283 | group_data[group].free_blocks_count--; |
283 | if (flexbg_size > 1) | 284 | flex_gd->bg_flags[group] &= uninit_mask; |
284 | flex_gd->bg_flags[group] &= ~EXT4_BG_BLOCK_UNINIT; | ||
285 | } | 285 | } |
286 | 286 | ||
287 | /* Allocate inode bitmaps */ | 287 | /* Allocate inode bitmaps */ |
@@ -292,22 +292,30 @@ next_group: | |||
292 | group = ext4_get_group_number(sb, start_blk - 1); | 292 | group = ext4_get_group_number(sb, start_blk - 1); |
293 | group -= group_data[0].group; | 293 | group -= group_data[0].group; |
294 | group_data[group].free_blocks_count--; | 294 | group_data[group].free_blocks_count--; |
295 | if (flexbg_size > 1) | 295 | flex_gd->bg_flags[group] &= uninit_mask; |
296 | flex_gd->bg_flags[group] &= ~EXT4_BG_BLOCK_UNINIT; | ||
297 | } | 296 | } |
298 | 297 | ||
299 | /* Allocate inode tables */ | 298 | /* Allocate inode tables */ |
300 | for (; it_index < flex_gd->count; it_index++) { | 299 | for (; it_index < flex_gd->count; it_index++) { |
301 | if (start_blk + EXT4_SB(sb)->s_itb_per_group > last_blk) | 300 | unsigned int itb = EXT4_SB(sb)->s_itb_per_group; |
301 | ext4_fsblk_t next_group_start; | ||
302 | |||
303 | if (start_blk + itb > last_blk) | ||
302 | goto next_group; | 304 | goto next_group; |
303 | group_data[it_index].inode_table = start_blk; | 305 | group_data[it_index].inode_table = start_blk; |
304 | group = ext4_get_group_number(sb, start_blk - 1); | 306 | group = ext4_get_group_number(sb, start_blk); |
307 | next_group_start = ext4_group_first_block_no(sb, group + 1); | ||
305 | group -= group_data[0].group; | 308 | group -= group_data[0].group; |
306 | group_data[group].free_blocks_count -= | ||
307 | EXT4_SB(sb)->s_itb_per_group; | ||
308 | if (flexbg_size > 1) | ||
309 | flex_gd->bg_flags[group] &= ~EXT4_BG_BLOCK_UNINIT; | ||
310 | 309 | ||
310 | if (start_blk + itb > next_group_start) { | ||
311 | flex_gd->bg_flags[group + 1] &= uninit_mask; | ||
312 | overhead = start_blk + itb - next_group_start; | ||
313 | group_data[group + 1].free_blocks_count -= overhead; | ||
314 | itb -= overhead; | ||
315 | } | ||
316 | |||
317 | group_data[group].free_blocks_count -= itb; | ||
318 | flex_gd->bg_flags[group] &= uninit_mask; | ||
311 | start_blk += EXT4_SB(sb)->s_itb_per_group; | 319 | start_blk += EXT4_SB(sb)->s_itb_per_group; |
312 | } | 320 | } |
313 | 321 | ||
@@ -401,7 +409,7 @@ static int set_flexbg_block_bitmap(struct super_block *sb, handle_t *handle, | |||
401 | start = ext4_group_first_block_no(sb, group); | 409 | start = ext4_group_first_block_no(sb, group); |
402 | group -= flex_gd->groups[0].group; | 410 | group -= flex_gd->groups[0].group; |
403 | 411 | ||
404 | count2 = sb->s_blocksize * 8 - (block - start); | 412 | count2 = EXT4_BLOCKS_PER_GROUP(sb) - (block - start); |
405 | if (count2 > count) | 413 | if (count2 > count) |
406 | count2 = count; | 414 | count2 = count; |
407 | 415 | ||
@@ -620,7 +628,7 @@ handle_ib: | |||
620 | if (err) | 628 | if (err) |
621 | goto out; | 629 | goto out; |
622 | count = group_table_count[j]; | 630 | count = group_table_count[j]; |
623 | start = group_data[i].block_bitmap; | 631 | start = (&group_data[i].block_bitmap)[j]; |
624 | block = start; | 632 | block = start; |
625 | } | 633 | } |
626 | 634 | ||
diff --git a/fs/ext4/super.c b/fs/ext4/super.c index 1f7784de05b6..710fed2377d4 100644 --- a/fs/ext4/super.c +++ b/fs/ext4/super.c | |||
@@ -3695,16 +3695,22 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) | |||
3695 | for (i = 0; i < 4; i++) | 3695 | for (i = 0; i < 4; i++) |
3696 | sbi->s_hash_seed[i] = le32_to_cpu(es->s_hash_seed[i]); | 3696 | sbi->s_hash_seed[i] = le32_to_cpu(es->s_hash_seed[i]); |
3697 | sbi->s_def_hash_version = es->s_def_hash_version; | 3697 | sbi->s_def_hash_version = es->s_def_hash_version; |
3698 | i = le32_to_cpu(es->s_flags); | 3698 | if (EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_DIR_INDEX)) { |
3699 | if (i & EXT2_FLAGS_UNSIGNED_HASH) | 3699 | i = le32_to_cpu(es->s_flags); |
3700 | sbi->s_hash_unsigned = 3; | 3700 | if (i & EXT2_FLAGS_UNSIGNED_HASH) |
3701 | else if ((i & EXT2_FLAGS_SIGNED_HASH) == 0) { | 3701 | sbi->s_hash_unsigned = 3; |
3702 | else if ((i & EXT2_FLAGS_SIGNED_HASH) == 0) { | ||
3702 | #ifdef __CHAR_UNSIGNED__ | 3703 | #ifdef __CHAR_UNSIGNED__ |
3703 | es->s_flags |= cpu_to_le32(EXT2_FLAGS_UNSIGNED_HASH); | 3704 | if (!(sb->s_flags & MS_RDONLY)) |
3704 | sbi->s_hash_unsigned = 3; | 3705 | es->s_flags |= |
3706 | cpu_to_le32(EXT2_FLAGS_UNSIGNED_HASH); | ||
3707 | sbi->s_hash_unsigned = 3; | ||
3705 | #else | 3708 | #else |
3706 | es->s_flags |= cpu_to_le32(EXT2_FLAGS_SIGNED_HASH); | 3709 | if (!(sb->s_flags & MS_RDONLY)) |
3710 | es->s_flags |= | ||
3711 | cpu_to_le32(EXT2_FLAGS_SIGNED_HASH); | ||
3707 | #endif | 3712 | #endif |
3713 | } | ||
3708 | } | 3714 | } |
3709 | 3715 | ||
3710 | /* Handle clustersize */ | 3716 | /* Handle clustersize */ |
diff --git a/fs/fscache/object-list.c b/fs/fscache/object-list.c index e1959efad64f..b5ebc2d7d80d 100644 --- a/fs/fscache/object-list.c +++ b/fs/fscache/object-list.c | |||
@@ -50,6 +50,8 @@ void fscache_objlist_add(struct fscache_object *obj) | |||
50 | struct fscache_object *xobj; | 50 | struct fscache_object *xobj; |
51 | struct rb_node **p = &fscache_object_list.rb_node, *parent = NULL; | 51 | struct rb_node **p = &fscache_object_list.rb_node, *parent = NULL; |
52 | 52 | ||
53 | ASSERT(RB_EMPTY_NODE(&obj->objlist_link)); | ||
54 | |||
53 | write_lock(&fscache_object_list_lock); | 55 | write_lock(&fscache_object_list_lock); |
54 | 56 | ||
55 | while (*p) { | 57 | while (*p) { |
@@ -75,6 +77,9 @@ void fscache_objlist_add(struct fscache_object *obj) | |||
75 | */ | 77 | */ |
76 | void fscache_objlist_remove(struct fscache_object *obj) | 78 | void fscache_objlist_remove(struct fscache_object *obj) |
77 | { | 79 | { |
80 | if (RB_EMPTY_NODE(&obj->objlist_link)) | ||
81 | return; | ||
82 | |||
78 | write_lock(&fscache_object_list_lock); | 83 | write_lock(&fscache_object_list_lock); |
79 | 84 | ||
80 | BUG_ON(RB_EMPTY_ROOT(&fscache_object_list)); | 85 | BUG_ON(RB_EMPTY_ROOT(&fscache_object_list)); |
diff --git a/fs/fscache/object.c b/fs/fscache/object.c index 53d35c504240..d3b4539f1651 100644 --- a/fs/fscache/object.c +++ b/fs/fscache/object.c | |||
@@ -314,6 +314,9 @@ void fscache_object_init(struct fscache_object *object, | |||
314 | object->cache = cache; | 314 | object->cache = cache; |
315 | object->cookie = cookie; | 315 | object->cookie = cookie; |
316 | object->parent = NULL; | 316 | object->parent = NULL; |
317 | #ifdef CONFIG_FSCACHE_OBJECT_LIST | ||
318 | RB_CLEAR_NODE(&object->objlist_link); | ||
319 | #endif | ||
317 | 320 | ||
318 | object->oob_event_mask = 0; | 321 | object->oob_event_mask = 0; |
319 | for (t = object->oob_table; t->events; t++) | 322 | for (t = object->oob_table; t->events; t++) |
diff --git a/fs/jbd2/transaction.c b/fs/jbd2/transaction.c index 8360674c85bc..60bb365f54a5 100644 --- a/fs/jbd2/transaction.c +++ b/fs/jbd2/transaction.c | |||
@@ -514,11 +514,13 @@ int jbd2_journal_start_reserved(handle_t *handle, unsigned int type, | |||
514 | * similarly constrained call sites | 514 | * similarly constrained call sites |
515 | */ | 515 | */ |
516 | ret = start_this_handle(journal, handle, GFP_NOFS); | 516 | ret = start_this_handle(journal, handle, GFP_NOFS); |
517 | if (ret < 0) | 517 | if (ret < 0) { |
518 | jbd2_journal_free_reserved(handle); | 518 | jbd2_journal_free_reserved(handle); |
519 | return ret; | ||
520 | } | ||
519 | handle->h_type = type; | 521 | handle->h_type = type; |
520 | handle->h_line_no = line_no; | 522 | handle->h_line_no = line_no; |
521 | return ret; | 523 | return 0; |
522 | } | 524 | } |
523 | EXPORT_SYMBOL(jbd2_journal_start_reserved); | 525 | EXPORT_SYMBOL(jbd2_journal_start_reserved); |
524 | 526 | ||
diff --git a/fs/reiserfs/do_balan.c b/fs/reiserfs/do_balan.c index 2b7882b508db..9a3c68cf6026 100644 --- a/fs/reiserfs/do_balan.c +++ b/fs/reiserfs/do_balan.c | |||
@@ -324,23 +324,17 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
324 | switch (flag) { | 324 | switch (flag) { |
325 | case M_INSERT: /* insert item into L[0] */ | 325 | case M_INSERT: /* insert item into L[0] */ |
326 | 326 | ||
327 | if (item_pos == tb->lnum[0] - 1 | 327 | if (item_pos == tb->lnum[0] - 1 && tb->lbytes != -1) { |
328 | && tb->lbytes != -1) { | ||
329 | /* part of new item falls into L[0] */ | 328 | /* part of new item falls into L[0] */ |
330 | int new_item_len; | 329 | int new_item_len; |
331 | int version; | 330 | int version; |
332 | 331 | ||
333 | ret_val = | 332 | ret_val = leaf_shift_left(tb, tb->lnum[0] - 1, -1); |
334 | leaf_shift_left(tb, tb->lnum[0] - 1, | ||
335 | -1); | ||
336 | 333 | ||
337 | /* Calculate item length to insert to S[0] */ | 334 | /* Calculate item length to insert to S[0] */ |
338 | new_item_len = | 335 | new_item_len = ih_item_len(ih) - tb->lbytes; |
339 | ih_item_len(ih) - tb->lbytes; | ||
340 | /* Calculate and check item length to insert to L[0] */ | 336 | /* Calculate and check item length to insert to L[0] */ |
341 | put_ih_item_len(ih, | 337 | put_ih_item_len(ih, ih_item_len(ih) - new_item_len); |
342 | ih_item_len(ih) - | ||
343 | new_item_len); | ||
344 | 338 | ||
345 | RFALSE(ih_item_len(ih) <= 0, | 339 | RFALSE(ih_item_len(ih) <= 0, |
346 | "PAP-12080: there is nothing to insert into L[0]: ih_item_len=%d", | 340 | "PAP-12080: there is nothing to insert into L[0]: ih_item_len=%d", |
@@ -349,30 +343,18 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
349 | /* Insert new item into L[0] */ | 343 | /* Insert new item into L[0] */ |
350 | buffer_info_init_left(tb, &bi); | 344 | buffer_info_init_left(tb, &bi); |
351 | leaf_insert_into_buf(&bi, | 345 | leaf_insert_into_buf(&bi, |
352 | n + item_pos - | 346 | n + item_pos - ret_val, ih, body, |
353 | ret_val, ih, body, | 347 | zeros_num > ih_item_len(ih) ? ih_item_len(ih) : zeros_num); |
354 | zeros_num > | ||
355 | ih_item_len(ih) ? | ||
356 | ih_item_len(ih) : | ||
357 | zeros_num); | ||
358 | 348 | ||
359 | version = ih_version(ih); | 349 | version = ih_version(ih); |
360 | 350 | ||
361 | /* Calculate key component, item length and body to insert into S[0] */ | 351 | /* Calculate key component, item length and body to insert into S[0] */ |
362 | set_le_ih_k_offset(ih, | 352 | set_le_ih_k_offset(ih, le_ih_k_offset(ih) + |
363 | le_ih_k_offset(ih) + | 353 | (tb-> lbytes << (is_indirect_le_ih(ih) ? tb->tb_sb-> s_blocksize_bits - UNFM_P_SHIFT : 0))); |
364 | (tb-> | ||
365 | lbytes << | ||
366 | (is_indirect_le_ih | ||
367 | (ih) ? tb->tb_sb-> | ||
368 | s_blocksize_bits - | ||
369 | UNFM_P_SHIFT : | ||
370 | 0))); | ||
371 | 354 | ||
372 | put_ih_item_len(ih, new_item_len); | 355 | put_ih_item_len(ih, new_item_len); |
373 | if (tb->lbytes > zeros_num) { | 356 | if (tb->lbytes > zeros_num) { |
374 | body += | 357 | body += (tb->lbytes - zeros_num); |
375 | (tb->lbytes - zeros_num); | ||
376 | zeros_num = 0; | 358 | zeros_num = 0; |
377 | } else | 359 | } else |
378 | zeros_num -= tb->lbytes; | 360 | zeros_num -= tb->lbytes; |
@@ -383,15 +365,10 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
383 | } else { | 365 | } else { |
384 | /* new item in whole falls into L[0] */ | 366 | /* new item in whole falls into L[0] */ |
385 | /* Shift lnum[0]-1 items to L[0] */ | 367 | /* Shift lnum[0]-1 items to L[0] */ |
386 | ret_val = | 368 | ret_val = leaf_shift_left(tb, tb->lnum[0] - 1, tb->lbytes); |
387 | leaf_shift_left(tb, tb->lnum[0] - 1, | ||
388 | tb->lbytes); | ||
389 | /* Insert new item into L[0] */ | 369 | /* Insert new item into L[0] */ |
390 | buffer_info_init_left(tb, &bi); | 370 | buffer_info_init_left(tb, &bi); |
391 | leaf_insert_into_buf(&bi, | 371 | leaf_insert_into_buf(&bi, n + item_pos - ret_val, ih, body, zeros_num); |
392 | n + item_pos - | ||
393 | ret_val, ih, body, | ||
394 | zeros_num); | ||
395 | tb->insert_size[0] = 0; | 372 | tb->insert_size[0] = 0; |
396 | zeros_num = 0; | 373 | zeros_num = 0; |
397 | } | 374 | } |
@@ -399,264 +376,117 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
399 | 376 | ||
400 | case M_PASTE: /* append item in L[0] */ | 377 | case M_PASTE: /* append item in L[0] */ |
401 | 378 | ||
402 | if (item_pos == tb->lnum[0] - 1 | 379 | if (item_pos == tb->lnum[0] - 1 && tb->lbytes != -1) { |
403 | && tb->lbytes != -1) { | ||
404 | /* we must shift the part of the appended item */ | 380 | /* we must shift the part of the appended item */ |
405 | if (is_direntry_le_ih | 381 | if (is_direntry_le_ih(B_N_PITEM_HEAD(tbS0, item_pos))) { |
406 | (B_N_PITEM_HEAD(tbS0, item_pos))) { | ||
407 | 382 | ||
408 | RFALSE(zeros_num, | 383 | RFALSE(zeros_num, |
409 | "PAP-12090: invalid parameter in case of a directory"); | 384 | "PAP-12090: invalid parameter in case of a directory"); |
410 | /* directory item */ | 385 | /* directory item */ |
411 | if (tb->lbytes > pos_in_item) { | 386 | if (tb->lbytes > pos_in_item) { |
412 | /* new directory entry falls into L[0] */ | 387 | /* new directory entry falls into L[0] */ |
413 | struct item_head | 388 | struct item_head *pasted; |
414 | *pasted; | 389 | int l_pos_in_item = pos_in_item; |
415 | int l_pos_in_item = | ||
416 | pos_in_item; | ||
417 | 390 | ||
418 | /* Shift lnum[0] - 1 items in whole. Shift lbytes - 1 entries from given directory item */ | 391 | /* Shift lnum[0] - 1 items in whole. Shift lbytes - 1 entries from given directory item */ |
419 | ret_val = | 392 | ret_val = leaf_shift_left(tb, tb->lnum[0], tb->lbytes-1); |
420 | leaf_shift_left(tb, | 393 | if (ret_val && !item_pos) { |
421 | tb-> | 394 | pasted = B_N_PITEM_HEAD(tb->L[0], B_NR_ITEMS(tb->L[0]) - 1); |
422 | lnum | 395 | l_pos_in_item += I_ENTRY_COUNT(pasted) - (tb->lbytes -1); |
423 | [0], | ||
424 | tb-> | ||
425 | lbytes | ||
426 | - | ||
427 | 1); | ||
428 | if (ret_val | ||
429 | && !item_pos) { | ||
430 | pasted = | ||
431 | B_N_PITEM_HEAD | ||
432 | (tb->L[0], | ||
433 | B_NR_ITEMS | ||
434 | (tb-> | ||
435 | L[0]) - | ||
436 | 1); | ||
437 | l_pos_in_item += | ||
438 | I_ENTRY_COUNT | ||
439 | (pasted) - | ||
440 | (tb-> | ||
441 | lbytes - | ||
442 | 1); | ||
443 | } | 396 | } |
444 | 397 | ||
445 | /* Append given directory entry to directory item */ | 398 | /* Append given directory entry to directory item */ |
446 | buffer_info_init_left(tb, &bi); | 399 | buffer_info_init_left(tb, &bi); |
447 | leaf_paste_in_buffer | 400 | leaf_paste_in_buffer(&bi, n + item_pos - ret_val, l_pos_in_item, tb->insert_size[0], body, zeros_num); |
448 | (&bi, | ||
449 | n + item_pos - | ||
450 | ret_val, | ||
451 | l_pos_in_item, | ||
452 | tb->insert_size[0], | ||
453 | body, zeros_num); | ||
454 | 401 | ||
455 | /* previous string prepared space for pasting new entry, following string pastes this entry */ | 402 | /* previous string prepared space for pasting new entry, following string pastes this entry */ |
456 | 403 | ||
457 | /* when we have merge directory item, pos_in_item has been changed too */ | 404 | /* when we have merge directory item, pos_in_item has been changed too */ |
458 | 405 | ||
459 | /* paste new directory entry. 1 is entry number */ | 406 | /* paste new directory entry. 1 is entry number */ |
460 | leaf_paste_entries(&bi, | 407 | leaf_paste_entries(&bi, n + item_pos - ret_val, l_pos_in_item, |
461 | n + | 408 | 1, (struct reiserfs_de_head *) body, |
462 | item_pos | 409 | body + DEH_SIZE, tb->insert_size[0]); |
463 | - | ||
464 | ret_val, | ||
465 | l_pos_in_item, | ||
466 | 1, | ||
467 | (struct | ||
468 | reiserfs_de_head | ||
469 | *) | ||
470 | body, | ||
471 | body | ||
472 | + | ||
473 | DEH_SIZE, | ||
474 | tb-> | ||
475 | insert_size | ||
476 | [0] | ||
477 | ); | ||
478 | tb->insert_size[0] = 0; | 410 | tb->insert_size[0] = 0; |
479 | } else { | 411 | } else { |
480 | /* new directory item doesn't fall into L[0] */ | 412 | /* new directory item doesn't fall into L[0] */ |
481 | /* Shift lnum[0]-1 items in whole. Shift lbytes directory entries from directory item number lnum[0] */ | 413 | /* Shift lnum[0]-1 items in whole. Shift lbytes directory entries from directory item number lnum[0] */ |
482 | leaf_shift_left(tb, | 414 | leaf_shift_left(tb, tb->lnum[0], tb->lbytes); |
483 | tb-> | ||
484 | lnum[0], | ||
485 | tb-> | ||
486 | lbytes); | ||
487 | } | 415 | } |
488 | /* Calculate new position to append in item body */ | 416 | /* Calculate new position to append in item body */ |
489 | pos_in_item -= tb->lbytes; | 417 | pos_in_item -= tb->lbytes; |
490 | } else { | 418 | } else { |
491 | /* regular object */ | 419 | /* regular object */ |
492 | RFALSE(tb->lbytes <= 0, | 420 | RFALSE(tb->lbytes <= 0, "PAP-12095: there is nothing to shift to L[0]. lbytes=%d", tb->lbytes); |
493 | "PAP-12095: there is nothing to shift to L[0]. lbytes=%d", | 421 | RFALSE(pos_in_item != ih_item_len(B_N_PITEM_HEAD(tbS0, item_pos)), |
494 | tb->lbytes); | ||
495 | RFALSE(pos_in_item != | ||
496 | ih_item_len | ||
497 | (B_N_PITEM_HEAD | ||
498 | (tbS0, item_pos)), | ||
499 | "PAP-12100: incorrect position to paste: item_len=%d, pos_in_item=%d", | 422 | "PAP-12100: incorrect position to paste: item_len=%d, pos_in_item=%d", |
500 | ih_item_len | 423 | ih_item_len(B_N_PITEM_HEAD(tbS0, item_pos)),pos_in_item); |
501 | (B_N_PITEM_HEAD | ||
502 | (tbS0, item_pos)), | ||
503 | pos_in_item); | ||
504 | 424 | ||
505 | if (tb->lbytes >= pos_in_item) { | 425 | if (tb->lbytes >= pos_in_item) { |
506 | /* appended item will be in L[0] in whole */ | 426 | /* appended item will be in L[0] in whole */ |
507 | int l_n; | 427 | int l_n; |
508 | 428 | ||
509 | /* this bytes number must be appended to the last item of L[h] */ | 429 | /* this bytes number must be appended to the last item of L[h] */ |
510 | l_n = | 430 | l_n = tb->lbytes - pos_in_item; |
511 | tb->lbytes - | ||
512 | pos_in_item; | ||
513 | 431 | ||
514 | /* Calculate new insert_size[0] */ | 432 | /* Calculate new insert_size[0] */ |
515 | tb->insert_size[0] -= | 433 | tb->insert_size[0] -= l_n; |
516 | l_n; | ||
517 | 434 | ||
518 | RFALSE(tb-> | 435 | RFALSE(tb->insert_size[0] <= 0, |
519 | insert_size[0] <= | ||
520 | 0, | ||
521 | "PAP-12105: there is nothing to paste into L[0]. insert_size=%d", | 436 | "PAP-12105: there is nothing to paste into L[0]. insert_size=%d", |
522 | tb-> | 437 | tb->insert_size[0]); |
523 | insert_size[0]); | 438 | ret_val = leaf_shift_left(tb, tb->lnum[0], ih_item_len |
524 | ret_val = | 439 | (B_N_PITEM_HEAD(tbS0, item_pos))); |
525 | leaf_shift_left(tb, | ||
526 | tb-> | ||
527 | lnum | ||
528 | [0], | ||
529 | ih_item_len | ||
530 | (B_N_PITEM_HEAD | ||
531 | (tbS0, | ||
532 | item_pos))); | ||
533 | /* Append to body of item in L[0] */ | 440 | /* Append to body of item in L[0] */ |
534 | buffer_info_init_left(tb, &bi); | 441 | buffer_info_init_left(tb, &bi); |
535 | leaf_paste_in_buffer | 442 | leaf_paste_in_buffer |
536 | (&bi, | 443 | (&bi, n + item_pos - ret_val, ih_item_len |
537 | n + item_pos - | 444 | (B_N_PITEM_HEAD(tb->L[0], n + item_pos - ret_val)), |
538 | ret_val, | 445 | l_n, body, |
539 | ih_item_len | 446 | zeros_num > l_n ? l_n : zeros_num); |
540 | (B_N_PITEM_HEAD | ||
541 | (tb->L[0], | ||
542 | n + item_pos - | ||
543 | ret_val)), l_n, | ||
544 | body, | ||
545 | zeros_num > | ||
546 | l_n ? l_n : | ||
547 | zeros_num); | ||
548 | /* 0-th item in S0 can be only of DIRECT type when l_n != 0 */ | 447 | /* 0-th item in S0 can be only of DIRECT type when l_n != 0 */ |
549 | { | 448 | { |
550 | int version; | 449 | int version; |
551 | int temp_l = | 450 | int temp_l = l_n; |
552 | l_n; | 451 | |
553 | 452 | RFALSE(ih_item_len(B_N_PITEM_HEAD(tbS0, 0)), | |
554 | RFALSE | ||
555 | (ih_item_len | ||
556 | (B_N_PITEM_HEAD | ||
557 | (tbS0, | ||
558 | 0)), | ||
559 | "PAP-12106: item length must be 0"); | 453 | "PAP-12106: item length must be 0"); |
560 | RFALSE | 454 | RFALSE(comp_short_le_keys(B_N_PKEY(tbS0, 0), B_N_PKEY |
561 | (comp_short_le_keys | 455 | (tb->L[0], n + item_pos - ret_val)), |
562 | (B_N_PKEY | ||
563 | (tbS0, 0), | ||
564 | B_N_PKEY | ||
565 | (tb->L[0], | ||
566 | n + | ||
567 | item_pos | ||
568 | - | ||
569 | ret_val)), | ||
570 | "PAP-12107: items must be of the same file"); | 456 | "PAP-12107: items must be of the same file"); |
571 | if (is_indirect_le_ih(B_N_PITEM_HEAD(tb->L[0], n + item_pos - ret_val))) { | 457 | if (is_indirect_le_ih(B_N_PITEM_HEAD(tb->L[0], n + item_pos - ret_val))) { |
572 | temp_l = | 458 | temp_l = l_n << (tb->tb_sb-> s_blocksize_bits - UNFM_P_SHIFT); |
573 | l_n | ||
574 | << | ||
575 | (tb-> | ||
576 | tb_sb-> | ||
577 | s_blocksize_bits | ||
578 | - | ||
579 | UNFM_P_SHIFT); | ||
580 | } | 459 | } |
581 | /* update key of first item in S0 */ | 460 | /* update key of first item in S0 */ |
582 | version = | 461 | version = ih_version(B_N_PITEM_HEAD(tbS0, 0)); |
583 | ih_version | 462 | set_le_key_k_offset(version, B_N_PKEY(tbS0, 0), |
584 | (B_N_PITEM_HEAD | 463 | le_key_k_offset(version,B_N_PKEY(tbS0, 0)) + temp_l); |
585 | (tbS0, 0)); | ||
586 | set_le_key_k_offset | ||
587 | (version, | ||
588 | B_N_PKEY | ||
589 | (tbS0, 0), | ||
590 | le_key_k_offset | ||
591 | (version, | ||
592 | B_N_PKEY | ||
593 | (tbS0, | ||
594 | 0)) + | ||
595 | temp_l); | ||
596 | /* update left delimiting key */ | 464 | /* update left delimiting key */ |
597 | set_le_key_k_offset | 465 | set_le_key_k_offset(version, B_N_PDELIM_KEY(tb->CFL[0], tb->lkey[0]), |
598 | (version, | 466 | le_key_k_offset(version, B_N_PDELIM_KEY(tb->CFL[0], tb->lkey[0])) + temp_l); |
599 | B_N_PDELIM_KEY | ||
600 | (tb-> | ||
601 | CFL[0], | ||
602 | tb-> | ||
603 | lkey[0]), | ||
604 | le_key_k_offset | ||
605 | (version, | ||
606 | B_N_PDELIM_KEY | ||
607 | (tb-> | ||
608 | CFL[0], | ||
609 | tb-> | ||
610 | lkey[0])) | ||
611 | + temp_l); | ||
612 | } | 467 | } |
613 | 468 | ||
614 | /* Calculate new body, position in item and insert_size[0] */ | 469 | /* Calculate new body, position in item and insert_size[0] */ |
615 | if (l_n > zeros_num) { | 470 | if (l_n > zeros_num) { |
616 | body += | 471 | body += (l_n - zeros_num); |
617 | (l_n - | ||
618 | zeros_num); | ||
619 | zeros_num = 0; | 472 | zeros_num = 0; |
620 | } else | 473 | } else |
621 | zeros_num -= | 474 | zeros_num -= l_n; |
622 | l_n; | ||
623 | pos_in_item = 0; | 475 | pos_in_item = 0; |
624 | 476 | ||
625 | RFALSE | 477 | RFALSE(comp_short_le_keys(B_N_PKEY(tbS0, 0), B_N_PKEY(tb->L[0], B_NR_ITEMS(tb->L[0]) - 1)) |
626 | (comp_short_le_keys | 478 | || !op_is_left_mergeable(B_N_PKEY(tbS0, 0), tbS0->b_size) |
627 | (B_N_PKEY(tbS0, 0), | 479 | || !op_is_left_mergeable(B_N_PDELIM_KEY(tb->CFL[0], tb->lkey[0]), tbS0->b_size), |
628 | B_N_PKEY(tb->L[0], | ||
629 | B_NR_ITEMS | ||
630 | (tb-> | ||
631 | L[0]) - | ||
632 | 1)) | ||
633 | || | ||
634 | !op_is_left_mergeable | ||
635 | (B_N_PKEY(tbS0, 0), | ||
636 | tbS0->b_size) | ||
637 | || | ||
638 | !op_is_left_mergeable | ||
639 | (B_N_PDELIM_KEY | ||
640 | (tb->CFL[0], | ||
641 | tb->lkey[0]), | ||
642 | tbS0->b_size), | ||
643 | "PAP-12120: item must be merge-able with left neighboring item"); | 480 | "PAP-12120: item must be merge-able with left neighboring item"); |
644 | } else { /* only part of the appended item will be in L[0] */ | 481 | } else { /* only part of the appended item will be in L[0] */ |
645 | 482 | ||
646 | /* Calculate position in item for append in S[0] */ | 483 | /* Calculate position in item for append in S[0] */ |
647 | pos_in_item -= | 484 | pos_in_item -= tb->lbytes; |
648 | tb->lbytes; | ||
649 | 485 | ||
650 | RFALSE(pos_in_item <= 0, | 486 | RFALSE(pos_in_item <= 0, "PAP-12125: no place for paste. pos_in_item=%d", pos_in_item); |
651 | "PAP-12125: no place for paste. pos_in_item=%d", | ||
652 | pos_in_item); | ||
653 | 487 | ||
654 | /* Shift lnum[0] - 1 items in whole. Shift lbytes - 1 byte from item number lnum[0] */ | 488 | /* Shift lnum[0] - 1 items in whole. Shift lbytes - 1 byte from item number lnum[0] */ |
655 | leaf_shift_left(tb, | 489 | leaf_shift_left(tb, tb->lnum[0], tb->lbytes); |
656 | tb-> | ||
657 | lnum[0], | ||
658 | tb-> | ||
659 | lbytes); | ||
660 | } | 490 | } |
661 | } | 491 | } |
662 | } else { /* appended item will be in L[0] in whole */ | 492 | } else { /* appended item will be in L[0] in whole */ |
@@ -665,52 +495,30 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
665 | 495 | ||
666 | if (!item_pos && op_is_left_mergeable(B_N_PKEY(tbS0, 0), tbS0->b_size)) { /* if we paste into first item of S[0] and it is left mergable */ | 496 | if (!item_pos && op_is_left_mergeable(B_N_PKEY(tbS0, 0), tbS0->b_size)) { /* if we paste into first item of S[0] and it is left mergable */ |
667 | /* then increment pos_in_item by the size of the last item in L[0] */ | 497 | /* then increment pos_in_item by the size of the last item in L[0] */ |
668 | pasted = | 498 | pasted = B_N_PITEM_HEAD(tb->L[0], n - 1); |
669 | B_N_PITEM_HEAD(tb->L[0], | ||
670 | n - 1); | ||
671 | if (is_direntry_le_ih(pasted)) | 499 | if (is_direntry_le_ih(pasted)) |
672 | pos_in_item += | 500 | pos_in_item += ih_entry_count(pasted); |
673 | ih_entry_count | ||
674 | (pasted); | ||
675 | else | 501 | else |
676 | pos_in_item += | 502 | pos_in_item += ih_item_len(pasted); |
677 | ih_item_len(pasted); | ||
678 | } | 503 | } |
679 | 504 | ||
680 | /* Shift lnum[0] - 1 items in whole. Shift lbytes - 1 byte from item number lnum[0] */ | 505 | /* Shift lnum[0] - 1 items in whole. Shift lbytes - 1 byte from item number lnum[0] */ |
681 | ret_val = | 506 | ret_val = leaf_shift_left(tb, tb->lnum[0], tb->lbytes); |
682 | leaf_shift_left(tb, tb->lnum[0], | ||
683 | tb->lbytes); | ||
684 | /* Append to body of item in L[0] */ | 507 | /* Append to body of item in L[0] */ |
685 | buffer_info_init_left(tb, &bi); | 508 | buffer_info_init_left(tb, &bi); |
686 | leaf_paste_in_buffer(&bi, | 509 | leaf_paste_in_buffer(&bi, n + item_pos - ret_val, |
687 | n + item_pos - | ||
688 | ret_val, | ||
689 | pos_in_item, | 510 | pos_in_item, |
690 | tb->insert_size[0], | 511 | tb->insert_size[0], |
691 | body, zeros_num); | 512 | body, zeros_num); |
692 | 513 | ||
693 | /* if appended item is directory, paste entry */ | 514 | /* if appended item is directory, paste entry */ |
694 | pasted = | 515 | pasted = B_N_PITEM_HEAD(tb->L[0], n + item_pos - ret_val); |
695 | B_N_PITEM_HEAD(tb->L[0], | ||
696 | n + item_pos - | ||
697 | ret_val); | ||
698 | if (is_direntry_le_ih(pasted)) | 516 | if (is_direntry_le_ih(pasted)) |
699 | leaf_paste_entries(&bi, | 517 | leaf_paste_entries(&bi, n + item_pos - ret_val, |
700 | n + | 518 | pos_in_item, 1, |
701 | item_pos - | 519 | (struct reiserfs_de_head *) body, |
702 | ret_val, | 520 | body + DEH_SIZE, |
703 | pos_in_item, | 521 | tb->insert_size[0]); |
704 | 1, | ||
705 | (struct | ||
706 | reiserfs_de_head | ||
707 | *)body, | ||
708 | body + | ||
709 | DEH_SIZE, | ||
710 | tb-> | ||
711 | insert_size | ||
712 | [0] | ||
713 | ); | ||
714 | /* if appended item is indirect item, put unformatted node into un list */ | 522 | /* if appended item is indirect item, put unformatted node into un list */ |
715 | if (is_indirect_le_ih(pasted)) | 523 | if (is_indirect_le_ih(pasted)) |
716 | set_ih_free_space(pasted, 0); | 524 | set_ih_free_space(pasted, 0); |
@@ -722,13 +530,7 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
722 | reiserfs_panic(tb->tb_sb, "PAP-12130", | 530 | reiserfs_panic(tb->tb_sb, "PAP-12130", |
723 | "lnum > 0: unexpected mode: " | 531 | "lnum > 0: unexpected mode: " |
724 | " %s(%d)", | 532 | " %s(%d)", |
725 | (flag == | 533 | (flag == M_DELETE) ? "DELETE" : ((flag == M_CUT) ? "CUT" : "UNKNOWN"), flag); |
726 | M_DELETE) ? "DELETE" : ((flag == | ||
727 | M_CUT) | ||
728 | ? "CUT" | ||
729 | : | ||
730 | "UNKNOWN"), | ||
731 | flag); | ||
732 | } | 534 | } |
733 | } else { | 535 | } else { |
734 | /* new item doesn't fall into L[0] */ | 536 | /* new item doesn't fall into L[0] */ |
@@ -748,14 +550,12 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
748 | case M_INSERT: /* insert item */ | 550 | case M_INSERT: /* insert item */ |
749 | if (n - tb->rnum[0] < item_pos) { /* new item or its part falls to R[0] */ | 551 | if (n - tb->rnum[0] < item_pos) { /* new item or its part falls to R[0] */ |
750 | if (item_pos == n - tb->rnum[0] + 1 && tb->rbytes != -1) { /* part of new item falls into R[0] */ | 552 | if (item_pos == n - tb->rnum[0] + 1 && tb->rbytes != -1) { /* part of new item falls into R[0] */ |
751 | loff_t old_key_comp, old_len, | 553 | loff_t old_key_comp, old_len, r_zeros_number; |
752 | r_zeros_number; | ||
753 | const char *r_body; | 554 | const char *r_body; |
754 | int version; | 555 | int version; |
755 | loff_t offset; | 556 | loff_t offset; |
756 | 557 | ||
757 | leaf_shift_right(tb, tb->rnum[0] - 1, | 558 | leaf_shift_right(tb, tb->rnum[0] - 1, -1); |
758 | -1); | ||
759 | 559 | ||
760 | version = ih_version(ih); | 560 | version = ih_version(ih); |
761 | /* Remember key component and item length */ | 561 | /* Remember key component and item length */ |
@@ -763,29 +563,17 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
763 | old_len = ih_item_len(ih); | 563 | old_len = ih_item_len(ih); |
764 | 564 | ||
765 | /* Calculate key component and item length to insert into R[0] */ | 565 | /* Calculate key component and item length to insert into R[0] */ |
766 | offset = | 566 | offset = le_ih_k_offset(ih) + ((old_len - tb->rbytes) << (is_indirect_le_ih(ih) ? tb->tb_sb->s_blocksize_bits - UNFM_P_SHIFT : 0)); |
767 | le_ih_k_offset(ih) + | ||
768 | ((old_len - | ||
769 | tb-> | ||
770 | rbytes) << (is_indirect_le_ih(ih) | ||
771 | ? tb->tb_sb-> | ||
772 | s_blocksize_bits - | ||
773 | UNFM_P_SHIFT : 0)); | ||
774 | set_le_ih_k_offset(ih, offset); | 567 | set_le_ih_k_offset(ih, offset); |
775 | put_ih_item_len(ih, tb->rbytes); | 568 | put_ih_item_len(ih, tb->rbytes); |
776 | /* Insert part of the item into R[0] */ | 569 | /* Insert part of the item into R[0] */ |
777 | buffer_info_init_right(tb, &bi); | 570 | buffer_info_init_right(tb, &bi); |
778 | if ((old_len - tb->rbytes) > zeros_num) { | 571 | if ((old_len - tb->rbytes) > zeros_num) { |
779 | r_zeros_number = 0; | 572 | r_zeros_number = 0; |
780 | r_body = | 573 | r_body = body + (old_len - tb->rbytes) - zeros_num; |
781 | body + (old_len - | ||
782 | tb->rbytes) - | ||
783 | zeros_num; | ||
784 | } else { | 574 | } else { |
785 | r_body = body; | 575 | r_body = body; |
786 | r_zeros_number = | 576 | r_zeros_number = zeros_num - (old_len - tb->rbytes); |
787 | zeros_num - (old_len - | ||
788 | tb->rbytes); | ||
789 | zeros_num -= r_zeros_number; | 577 | zeros_num -= r_zeros_number; |
790 | } | 578 | } |
791 | 579 | ||
@@ -798,25 +586,18 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
798 | 586 | ||
799 | /* Calculate key component and item length to insert into S[0] */ | 587 | /* Calculate key component and item length to insert into S[0] */ |
800 | set_le_ih_k_offset(ih, old_key_comp); | 588 | set_le_ih_k_offset(ih, old_key_comp); |
801 | put_ih_item_len(ih, | 589 | put_ih_item_len(ih, old_len - tb->rbytes); |
802 | old_len - tb->rbytes); | ||
803 | 590 | ||
804 | tb->insert_size[0] -= tb->rbytes; | 591 | tb->insert_size[0] -= tb->rbytes; |
805 | 592 | ||
806 | } else { /* whole new item falls into R[0] */ | 593 | } else { /* whole new item falls into R[0] */ |
807 | 594 | ||
808 | /* Shift rnum[0]-1 items to R[0] */ | 595 | /* Shift rnum[0]-1 items to R[0] */ |
809 | ret_val = | 596 | ret_val = leaf_shift_right(tb, tb->rnum[0] - 1, tb->rbytes); |
810 | leaf_shift_right(tb, | ||
811 | tb->rnum[0] - 1, | ||
812 | tb->rbytes); | ||
813 | /* Insert new item into R[0] */ | 597 | /* Insert new item into R[0] */ |
814 | buffer_info_init_right(tb, &bi); | 598 | buffer_info_init_right(tb, &bi); |
815 | leaf_insert_into_buf(&bi, | 599 | leaf_insert_into_buf(&bi, item_pos - n + tb->rnum[0] - 1, |
816 | item_pos - n + | 600 | ih, body, zeros_num); |
817 | tb->rnum[0] - 1, | ||
818 | ih, body, | ||
819 | zeros_num); | ||
820 | 601 | ||
821 | if (item_pos - n + tb->rnum[0] - 1 == 0) { | 602 | if (item_pos - n + tb->rnum[0] - 1 == 0) { |
822 | replace_key(tb, tb->CFR[0], | 603 | replace_key(tb, tb->CFR[0], |
@@ -841,200 +622,97 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
841 | 622 | ||
842 | RFALSE(zeros_num, | 623 | RFALSE(zeros_num, |
843 | "PAP-12145: invalid parameter in case of a directory"); | 624 | "PAP-12145: invalid parameter in case of a directory"); |
844 | entry_count = | 625 | entry_count = I_ENTRY_COUNT(B_N_PITEM_HEAD |
845 | I_ENTRY_COUNT(B_N_PITEM_HEAD | 626 | (tbS0, item_pos)); |
846 | (tbS0, | ||
847 | item_pos)); | ||
848 | if (entry_count - tb->rbytes < | 627 | if (entry_count - tb->rbytes < |
849 | pos_in_item) | 628 | pos_in_item) |
850 | /* new directory entry falls into R[0] */ | 629 | /* new directory entry falls into R[0] */ |
851 | { | 630 | { |
852 | int paste_entry_position; | 631 | int paste_entry_position; |
853 | 632 | ||
854 | RFALSE(tb->rbytes - 1 >= | 633 | RFALSE(tb->rbytes - 1 >= entry_count || !tb-> insert_size[0], |
855 | entry_count | ||
856 | || !tb-> | ||
857 | insert_size[0], | ||
858 | "PAP-12150: no enough of entries to shift to R[0]: rbytes=%d, entry_count=%d", | 634 | "PAP-12150: no enough of entries to shift to R[0]: rbytes=%d, entry_count=%d", |
859 | tb->rbytes, | 635 | tb->rbytes, entry_count); |
860 | entry_count); | ||
861 | /* Shift rnum[0]-1 items in whole. Shift rbytes-1 directory entries from directory item number rnum[0] */ | 636 | /* Shift rnum[0]-1 items in whole. Shift rbytes-1 directory entries from directory item number rnum[0] */ |
862 | leaf_shift_right(tb, | 637 | leaf_shift_right(tb, tb->rnum[0], tb->rbytes - 1); |
863 | tb-> | ||
864 | rnum | ||
865 | [0], | ||
866 | tb-> | ||
867 | rbytes | ||
868 | - 1); | ||
869 | /* Paste given directory entry to directory item */ | 638 | /* Paste given directory entry to directory item */ |
870 | paste_entry_position = | 639 | paste_entry_position = pos_in_item - entry_count + tb->rbytes - 1; |
871 | pos_in_item - | ||
872 | entry_count + | ||
873 | tb->rbytes - 1; | ||
874 | buffer_info_init_right(tb, &bi); | 640 | buffer_info_init_right(tb, &bi); |
875 | leaf_paste_in_buffer | 641 | leaf_paste_in_buffer(&bi, 0, paste_entry_position, tb->insert_size[0], body, zeros_num); |
876 | (&bi, 0, | ||
877 | paste_entry_position, | ||
878 | tb->insert_size[0], | ||
879 | body, zeros_num); | ||
880 | /* paste entry */ | 642 | /* paste entry */ |
881 | leaf_paste_entries(&bi, | 643 | leaf_paste_entries(&bi, 0, paste_entry_position, 1, |
882 | 0, | 644 | (struct reiserfs_de_head *) body, |
883 | paste_entry_position, | 645 | body + DEH_SIZE, tb->insert_size[0]); |
884 | 1, | 646 | |
885 | (struct | 647 | if (paste_entry_position == 0) { |
886 | reiserfs_de_head | ||
887 | *) | ||
888 | body, | ||
889 | body | ||
890 | + | ||
891 | DEH_SIZE, | ||
892 | tb-> | ||
893 | insert_size | ||
894 | [0] | ||
895 | ); | ||
896 | |||
897 | if (paste_entry_position | ||
898 | == 0) { | ||
899 | /* change delimiting keys */ | 648 | /* change delimiting keys */ |
900 | replace_key(tb, | 649 | replace_key(tb, tb->CFR[0], tb->rkey[0], tb->R[0],0); |
901 | tb-> | ||
902 | CFR | ||
903 | [0], | ||
904 | tb-> | ||
905 | rkey | ||
906 | [0], | ||
907 | tb-> | ||
908 | R | ||
909 | [0], | ||
910 | 0); | ||
911 | } | 650 | } |
912 | 651 | ||
913 | tb->insert_size[0] = 0; | 652 | tb->insert_size[0] = 0; |
914 | pos_in_item++; | 653 | pos_in_item++; |
915 | } else { /* new directory entry doesn't fall into R[0] */ | 654 | } else { /* new directory entry doesn't fall into R[0] */ |
916 | 655 | ||
917 | leaf_shift_right(tb, | 656 | leaf_shift_right(tb, tb->rnum[0], tb->rbytes); |
918 | tb-> | ||
919 | rnum | ||
920 | [0], | ||
921 | tb-> | ||
922 | rbytes); | ||
923 | } | 657 | } |
924 | } else { /* regular object */ | 658 | } else { /* regular object */ |
925 | 659 | ||
926 | int n_shift, n_rem, | 660 | int n_shift, n_rem, r_zeros_number; |
927 | r_zeros_number; | ||
928 | const char *r_body; | 661 | const char *r_body; |
929 | 662 | ||
930 | /* Calculate number of bytes which must be shifted from appended item */ | 663 | /* Calculate number of bytes which must be shifted from appended item */ |
931 | if ((n_shift = | 664 | if ((n_shift = tb->rbytes - tb->insert_size[0]) < 0) |
932 | tb->rbytes - | ||
933 | tb->insert_size[0]) < 0) | ||
934 | n_shift = 0; | 665 | n_shift = 0; |
935 | 666 | ||
936 | RFALSE(pos_in_item != | 667 | RFALSE(pos_in_item != ih_item_len |
937 | ih_item_len | 668 | (B_N_PITEM_HEAD(tbS0, item_pos)), |
938 | (B_N_PITEM_HEAD | ||
939 | (tbS0, item_pos)), | ||
940 | "PAP-12155: invalid position to paste. ih_item_len=%d, pos_in_item=%d", | 669 | "PAP-12155: invalid position to paste. ih_item_len=%d, pos_in_item=%d", |
941 | pos_in_item, | 670 | pos_in_item, ih_item_len |
942 | ih_item_len | 671 | (B_N_PITEM_HEAD(tbS0, item_pos))); |
943 | (B_N_PITEM_HEAD | 672 | |
944 | (tbS0, item_pos))); | 673 | leaf_shift_right(tb, tb->rnum[0], n_shift); |
945 | |||
946 | leaf_shift_right(tb, | ||
947 | tb->rnum[0], | ||
948 | n_shift); | ||
949 | /* Calculate number of bytes which must remain in body after appending to R[0] */ | 674 | /* Calculate number of bytes which must remain in body after appending to R[0] */ |
950 | if ((n_rem = | 675 | if ((n_rem = tb->insert_size[0] - tb->rbytes) < 0) |
951 | tb->insert_size[0] - | ||
952 | tb->rbytes) < 0) | ||
953 | n_rem = 0; | 676 | n_rem = 0; |
954 | 677 | ||
955 | { | 678 | { |
956 | int version; | 679 | int version; |
957 | unsigned long temp_rem = | 680 | unsigned long temp_rem = n_rem; |
958 | n_rem; | 681 | |
959 | 682 | version = ih_version(B_N_PITEM_HEAD(tb->R[0], 0)); | |
960 | version = | 683 | if (is_indirect_le_key(version, B_N_PKEY(tb->R[0], 0))) { |
961 | ih_version | 684 | temp_rem = n_rem << (tb->tb_sb->s_blocksize_bits - UNFM_P_SHIFT); |
962 | (B_N_PITEM_HEAD | ||
963 | (tb->R[0], 0)); | ||
964 | if (is_indirect_le_key | ||
965 | (version, | ||
966 | B_N_PKEY(tb->R[0], | ||
967 | 0))) { | ||
968 | temp_rem = | ||
969 | n_rem << | ||
970 | (tb->tb_sb-> | ||
971 | s_blocksize_bits | ||
972 | - | ||
973 | UNFM_P_SHIFT); | ||
974 | } | 685 | } |
975 | set_le_key_k_offset | 686 | set_le_key_k_offset(version, B_N_PKEY(tb->R[0], 0), |
976 | (version, | 687 | le_key_k_offset(version, B_N_PKEY(tb->R[0], 0)) + temp_rem); |
977 | B_N_PKEY(tb->R[0], | 688 | set_le_key_k_offset(version, B_N_PDELIM_KEY(tb->CFR[0], tb->rkey[0]), |
978 | 0), | 689 | le_key_k_offset(version, B_N_PDELIM_KEY(tb->CFR[0], tb->rkey[0])) + temp_rem); |
979 | le_key_k_offset | ||
980 | (version, | ||
981 | B_N_PKEY(tb->R[0], | ||
982 | 0)) + | ||
983 | temp_rem); | ||
984 | set_le_key_k_offset | ||
985 | (version, | ||
986 | B_N_PDELIM_KEY(tb-> | ||
987 | CFR | ||
988 | [0], | ||
989 | tb-> | ||
990 | rkey | ||
991 | [0]), | ||
992 | le_key_k_offset | ||
993 | (version, | ||
994 | B_N_PDELIM_KEY | ||
995 | (tb->CFR[0], | ||
996 | tb->rkey[0])) + | ||
997 | temp_rem); | ||
998 | } | 690 | } |
999 | /* k_offset (B_N_PKEY(tb->R[0],0)) += n_rem; | 691 | /* k_offset (B_N_PKEY(tb->R[0],0)) += n_rem; |
1000 | k_offset (B_N_PDELIM_KEY(tb->CFR[0],tb->rkey[0])) += n_rem;*/ | 692 | k_offset (B_N_PDELIM_KEY(tb->CFR[0],tb->rkey[0])) += n_rem;*/ |
1001 | do_balance_mark_internal_dirty | 693 | do_balance_mark_internal_dirty(tb, tb->CFR[0], 0); |
1002 | (tb, tb->CFR[0], 0); | ||
1003 | 694 | ||
1004 | /* Append part of body into R[0] */ | 695 | /* Append part of body into R[0] */ |
1005 | buffer_info_init_right(tb, &bi); | 696 | buffer_info_init_right(tb, &bi); |
1006 | if (n_rem > zeros_num) { | 697 | if (n_rem > zeros_num) { |
1007 | r_zeros_number = 0; | 698 | r_zeros_number = 0; |
1008 | r_body = | 699 | r_body = body + n_rem - zeros_num; |
1009 | body + n_rem - | ||
1010 | zeros_num; | ||
1011 | } else { | 700 | } else { |
1012 | r_body = body; | 701 | r_body = body; |
1013 | r_zeros_number = | 702 | r_zeros_number = zeros_num - n_rem; |
1014 | zeros_num - n_rem; | 703 | zeros_num -= r_zeros_number; |
1015 | zeros_num -= | ||
1016 | r_zeros_number; | ||
1017 | } | 704 | } |
1018 | 705 | ||
1019 | leaf_paste_in_buffer(&bi, 0, | 706 | leaf_paste_in_buffer(&bi, 0, n_shift, |
1020 | n_shift, | 707 | tb->insert_size[0] - n_rem, |
1021 | tb-> | 708 | r_body, r_zeros_number); |
1022 | insert_size | 709 | |
1023 | [0] - | 710 | if (is_indirect_le_ih(B_N_PITEM_HEAD(tb->R[0], 0))) { |
1024 | n_rem, | ||
1025 | r_body, | ||
1026 | r_zeros_number); | ||
1027 | |||
1028 | if (is_indirect_le_ih | ||
1029 | (B_N_PITEM_HEAD | ||
1030 | (tb->R[0], 0))) { | ||
1031 | #if 0 | 711 | #if 0 |
1032 | RFALSE(n_rem, | 712 | RFALSE(n_rem, |
1033 | "PAP-12160: paste more than one unformatted node pointer"); | 713 | "PAP-12160: paste more than one unformatted node pointer"); |
1034 | #endif | 714 | #endif |
1035 | set_ih_free_space | 715 | set_ih_free_space(B_N_PITEM_HEAD(tb->R[0], 0), 0); |
1036 | (B_N_PITEM_HEAD | ||
1037 | (tb->R[0], 0), 0); | ||
1038 | } | 716 | } |
1039 | tb->insert_size[0] = n_rem; | 717 | tb->insert_size[0] = n_rem; |
1040 | if (!n_rem) | 718 | if (!n_rem) |
@@ -1044,58 +722,28 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1044 | 722 | ||
1045 | struct item_head *pasted; | 723 | struct item_head *pasted; |
1046 | 724 | ||
1047 | ret_val = | 725 | ret_val = leaf_shift_right(tb, tb->rnum[0], tb->rbytes); |
1048 | leaf_shift_right(tb, tb->rnum[0], | ||
1049 | tb->rbytes); | ||
1050 | /* append item in R[0] */ | 726 | /* append item in R[0] */ |
1051 | if (pos_in_item >= 0) { | 727 | if (pos_in_item >= 0) { |
1052 | buffer_info_init_right(tb, &bi); | 728 | buffer_info_init_right(tb, &bi); |
1053 | leaf_paste_in_buffer(&bi, | 729 | leaf_paste_in_buffer(&bi, item_pos - n + tb->rnum[0], pos_in_item, |
1054 | item_pos - | 730 | tb->insert_size[0], body, zeros_num); |
1055 | n + | ||
1056 | tb-> | ||
1057 | rnum[0], | ||
1058 | pos_in_item, | ||
1059 | tb-> | ||
1060 | insert_size | ||
1061 | [0], body, | ||
1062 | zeros_num); | ||
1063 | } | 731 | } |
1064 | 732 | ||
1065 | /* paste new entry, if item is directory item */ | 733 | /* paste new entry, if item is directory item */ |
1066 | pasted = | 734 | pasted = B_N_PITEM_HEAD(tb->R[0], item_pos - n + tb->rnum[0]); |
1067 | B_N_PITEM_HEAD(tb->R[0], | 735 | if (is_direntry_le_ih(pasted) && pos_in_item >= 0) { |
1068 | item_pos - n + | 736 | leaf_paste_entries(&bi, item_pos - n + tb->rnum[0], |
1069 | tb->rnum[0]); | 737 | pos_in_item, 1, |
1070 | if (is_direntry_le_ih(pasted) | 738 | (struct reiserfs_de_head *) body, |
1071 | && pos_in_item >= 0) { | 739 | body + DEH_SIZE, tb->insert_size[0]); |
1072 | leaf_paste_entries(&bi, | ||
1073 | item_pos - | ||
1074 | n + | ||
1075 | tb->rnum[0], | ||
1076 | pos_in_item, | ||
1077 | 1, | ||
1078 | (struct | ||
1079 | reiserfs_de_head | ||
1080 | *)body, | ||
1081 | body + | ||
1082 | DEH_SIZE, | ||
1083 | tb-> | ||
1084 | insert_size | ||
1085 | [0] | ||
1086 | ); | ||
1087 | if (!pos_in_item) { | 740 | if (!pos_in_item) { |
1088 | 741 | ||
1089 | RFALSE(item_pos - n + | 742 | RFALSE(item_pos - n + tb->rnum[0], |
1090 | tb->rnum[0], | ||
1091 | "PAP-12165: directory item must be first item of node when pasting is in 0th position"); | 743 | "PAP-12165: directory item must be first item of node when pasting is in 0th position"); |
1092 | 744 | ||
1093 | /* update delimiting keys */ | 745 | /* update delimiting keys */ |
1094 | replace_key(tb, | 746 | replace_key(tb, tb->CFR[0], tb->rkey[0], tb->R[0], 0); |
1095 | tb->CFR[0], | ||
1096 | tb->rkey[0], | ||
1097 | tb->R[0], | ||
1098 | 0); | ||
1099 | } | 747 | } |
1100 | } | 748 | } |
1101 | 749 | ||
@@ -1111,22 +759,16 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1111 | default: /* cases d and t */ | 759 | default: /* cases d and t */ |
1112 | reiserfs_panic(tb->tb_sb, "PAP-12175", | 760 | reiserfs_panic(tb->tb_sb, "PAP-12175", |
1113 | "rnum > 0: unexpected mode: %s(%d)", | 761 | "rnum > 0: unexpected mode: %s(%d)", |
1114 | (flag == | 762 | (flag == M_DELETE) ? "DELETE" : ((flag == M_CUT) ? "CUT" : "UNKNOWN"), flag); |
1115 | M_DELETE) ? "DELETE" : ((flag == | ||
1116 | M_CUT) ? "CUT" | ||
1117 | : "UNKNOWN"), | ||
1118 | flag); | ||
1119 | } | 763 | } |
1120 | 764 | ||
1121 | } | 765 | } |
1122 | 766 | ||
1123 | /* tb->rnum[0] > 0 */ | 767 | /* tb->rnum[0] > 0 */ |
1124 | RFALSE(tb->blknum[0] > 3, | 768 | RFALSE(tb->blknum[0] > 3, |
1125 | "PAP-12180: blknum can not be %d. It must be <= 3", | 769 | "PAP-12180: blknum can not be %d. It must be <= 3", tb->blknum[0]); |
1126 | tb->blknum[0]); | ||
1127 | RFALSE(tb->blknum[0] < 0, | 770 | RFALSE(tb->blknum[0] < 0, |
1128 | "PAP-12185: blknum can not be %d. It must be >= 0", | 771 | "PAP-12185: blknum can not be %d. It must be >= 0", tb->blknum[0]); |
1129 | tb->blknum[0]); | ||
1130 | 772 | ||
1131 | /* if while adding to a node we discover that it is possible to split | 773 | /* if while adding to a node we discover that it is possible to split |
1132 | it in two, and merge the left part into the left neighbor and the | 774 | it in two, and merge the left part into the left neighbor and the |
@@ -1177,8 +819,7 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1177 | 819 | ||
1178 | if (n - snum[i] < item_pos) { /* new item or it's part falls to first new node S_new[i] */ | 820 | if (n - snum[i] < item_pos) { /* new item or it's part falls to first new node S_new[i] */ |
1179 | if (item_pos == n - snum[i] + 1 && sbytes[i] != -1) { /* part of new item falls into S_new[i] */ | 821 | if (item_pos == n - snum[i] + 1 && sbytes[i] != -1) { /* part of new item falls into S_new[i] */ |
1180 | int old_key_comp, old_len, | 822 | int old_key_comp, old_len, r_zeros_number; |
1181 | r_zeros_number; | ||
1182 | const char *r_body; | 823 | const char *r_body; |
1183 | int version; | 824 | int version; |
1184 | 825 | ||
@@ -1192,15 +833,8 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1192 | old_len = ih_item_len(ih); | 833 | old_len = ih_item_len(ih); |
1193 | 834 | ||
1194 | /* Calculate key component and item length to insert into S_new[i] */ | 835 | /* Calculate key component and item length to insert into S_new[i] */ |
1195 | set_le_ih_k_offset(ih, | 836 | set_le_ih_k_offset(ih, le_ih_k_offset(ih) + |
1196 | le_ih_k_offset(ih) + | 837 | ((old_len - sbytes[i]) << (is_indirect_le_ih(ih) ? tb->tb_sb-> s_blocksize_bits - UNFM_P_SHIFT : 0))); |
1197 | ((old_len - | ||
1198 | sbytes[i]) << | ||
1199 | (is_indirect_le_ih | ||
1200 | (ih) ? tb->tb_sb-> | ||
1201 | s_blocksize_bits - | ||
1202 | UNFM_P_SHIFT : | ||
1203 | 0))); | ||
1204 | 838 | ||
1205 | put_ih_item_len(ih, sbytes[i]); | 839 | put_ih_item_len(ih, sbytes[i]); |
1206 | 840 | ||
@@ -1209,39 +843,29 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1209 | 843 | ||
1210 | if ((old_len - sbytes[i]) > zeros_num) { | 844 | if ((old_len - sbytes[i]) > zeros_num) { |
1211 | r_zeros_number = 0; | 845 | r_zeros_number = 0; |
1212 | r_body = | 846 | r_body = body + (old_len - sbytes[i]) - zeros_num; |
1213 | body + (old_len - | ||
1214 | sbytes[i]) - | ||
1215 | zeros_num; | ||
1216 | } else { | 847 | } else { |
1217 | r_body = body; | 848 | r_body = body; |
1218 | r_zeros_number = | 849 | r_zeros_number = zeros_num - (old_len - sbytes[i]); |
1219 | zeros_num - (old_len - | ||
1220 | sbytes[i]); | ||
1221 | zeros_num -= r_zeros_number; | 850 | zeros_num -= r_zeros_number; |
1222 | } | 851 | } |
1223 | 852 | ||
1224 | leaf_insert_into_buf(&bi, 0, ih, r_body, | 853 | leaf_insert_into_buf(&bi, 0, ih, r_body, r_zeros_number); |
1225 | r_zeros_number); | ||
1226 | 854 | ||
1227 | /* Calculate key component and item length to insert into S[i] */ | 855 | /* Calculate key component and item length to insert into S[i] */ |
1228 | set_le_ih_k_offset(ih, old_key_comp); | 856 | set_le_ih_k_offset(ih, old_key_comp); |
1229 | put_ih_item_len(ih, | 857 | put_ih_item_len(ih, old_len - sbytes[i]); |
1230 | old_len - sbytes[i]); | ||
1231 | tb->insert_size[0] -= sbytes[i]; | 858 | tb->insert_size[0] -= sbytes[i]; |
1232 | } else { /* whole new item falls into S_new[i] */ | 859 | } else { /* whole new item falls into S_new[i] */ |
1233 | 860 | ||
1234 | /* Shift snum[0] - 1 items to S_new[i] (sbytes[i] of split item) */ | 861 | /* Shift snum[0] - 1 items to S_new[i] (sbytes[i] of split item) */ |
1235 | leaf_move_items(LEAF_FROM_S_TO_SNEW, tb, | 862 | leaf_move_items(LEAF_FROM_S_TO_SNEW, tb, |
1236 | snum[i] - 1, sbytes[i], | 863 | snum[i] - 1, sbytes[i], S_new[i]); |
1237 | S_new[i]); | ||
1238 | 864 | ||
1239 | /* Insert new item into S_new[i] */ | 865 | /* Insert new item into S_new[i] */ |
1240 | buffer_info_init_bh(tb, &bi, S_new[i]); | 866 | buffer_info_init_bh(tb, &bi, S_new[i]); |
1241 | leaf_insert_into_buf(&bi, | 867 | leaf_insert_into_buf(&bi, item_pos - n + snum[i] - 1, |
1242 | item_pos - n + | 868 | ih, body, zeros_num); |
1243 | snum[i] - 1, ih, | ||
1244 | body, zeros_num); | ||
1245 | 869 | ||
1246 | zeros_num = tb->insert_size[0] = 0; | 870 | zeros_num = tb->insert_size[0] = 0; |
1247 | } | 871 | } |
@@ -1268,150 +892,73 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1268 | 892 | ||
1269 | int entry_count; | 893 | int entry_count; |
1270 | 894 | ||
1271 | entry_count = | 895 | entry_count = ih_entry_count(aux_ih); |
1272 | ih_entry_count(aux_ih); | ||
1273 | 896 | ||
1274 | if (entry_count - sbytes[i] < | 897 | if (entry_count - sbytes[i] < pos_in_item && pos_in_item <= entry_count) { |
1275 | pos_in_item | ||
1276 | && pos_in_item <= | ||
1277 | entry_count) { | ||
1278 | /* new directory entry falls into S_new[i] */ | 898 | /* new directory entry falls into S_new[i] */ |
1279 | 899 | ||
1280 | RFALSE(!tb-> | 900 | RFALSE(!tb->insert_size[0], "PAP-12215: insert_size is already 0"); |
1281 | insert_size[0], | 901 | RFALSE(sbytes[i] - 1 >= entry_count, |
1282 | "PAP-12215: insert_size is already 0"); | ||
1283 | RFALSE(sbytes[i] - 1 >= | ||
1284 | entry_count, | ||
1285 | "PAP-12220: there are no so much entries (%d), only %d", | 902 | "PAP-12220: there are no so much entries (%d), only %d", |
1286 | sbytes[i] - 1, | 903 | sbytes[i] - 1, entry_count); |
1287 | entry_count); | ||
1288 | 904 | ||
1289 | /* Shift snum[i]-1 items in whole. Shift sbytes[i] directory entries from directory item number snum[i] */ | 905 | /* Shift snum[i]-1 items in whole. Shift sbytes[i] directory entries from directory item number snum[i] */ |
1290 | leaf_move_items | 906 | leaf_move_items(LEAF_FROM_S_TO_SNEW, tb, snum[i], sbytes[i] - 1, S_new[i]); |
1291 | (LEAF_FROM_S_TO_SNEW, | ||
1292 | tb, snum[i], | ||
1293 | sbytes[i] - 1, | ||
1294 | S_new[i]); | ||
1295 | /* Paste given directory entry to directory item */ | 907 | /* Paste given directory entry to directory item */ |
1296 | buffer_info_init_bh(tb, &bi, S_new[i]); | 908 | buffer_info_init_bh(tb, &bi, S_new[i]); |
1297 | leaf_paste_in_buffer | 909 | leaf_paste_in_buffer(&bi, 0, pos_in_item - entry_count + sbytes[i] - 1, |
1298 | (&bi, 0, | 910 | tb->insert_size[0], body, zeros_num); |
1299 | pos_in_item - | ||
1300 | entry_count + | ||
1301 | sbytes[i] - 1, | ||
1302 | tb->insert_size[0], | ||
1303 | body, zeros_num); | ||
1304 | /* paste new directory entry */ | 911 | /* paste new directory entry */ |
1305 | leaf_paste_entries(&bi, | 912 | leaf_paste_entries(&bi, 0, pos_in_item - entry_count + sbytes[i] - 1, 1, |
1306 | 0, | 913 | (struct reiserfs_de_head *) body, |
1307 | pos_in_item | 914 | body + DEH_SIZE, tb->insert_size[0]); |
1308 | - | ||
1309 | entry_count | ||
1310 | + | ||
1311 | sbytes | ||
1312 | [i] - | ||
1313 | 1, 1, | ||
1314 | (struct | ||
1315 | reiserfs_de_head | ||
1316 | *) | ||
1317 | body, | ||
1318 | body | ||
1319 | + | ||
1320 | DEH_SIZE, | ||
1321 | tb-> | ||
1322 | insert_size | ||
1323 | [0] | ||
1324 | ); | ||
1325 | tb->insert_size[0] = 0; | 915 | tb->insert_size[0] = 0; |
1326 | pos_in_item++; | 916 | pos_in_item++; |
1327 | } else { /* new directory entry doesn't fall into S_new[i] */ | 917 | } else { /* new directory entry doesn't fall into S_new[i] */ |
1328 | leaf_move_items | 918 | leaf_move_items(LEAF_FROM_S_TO_SNEW,tb, snum[i], sbytes[i], S_new[i]); |
1329 | (LEAF_FROM_S_TO_SNEW, | ||
1330 | tb, snum[i], | ||
1331 | sbytes[i], | ||
1332 | S_new[i]); | ||
1333 | } | 919 | } |
1334 | } else { /* regular object */ | 920 | } else { /* regular object */ |
1335 | 921 | ||
1336 | int n_shift, n_rem, | 922 | int n_shift, n_rem, r_zeros_number; |
1337 | r_zeros_number; | ||
1338 | const char *r_body; | 923 | const char *r_body; |
1339 | 924 | ||
1340 | RFALSE(pos_in_item != | 925 | RFALSE(pos_in_item != ih_item_len(B_N_PITEM_HEAD(tbS0, item_pos)) || tb->insert_size[0] <= 0, |
1341 | ih_item_len | ||
1342 | (B_N_PITEM_HEAD | ||
1343 | (tbS0, item_pos)) | ||
1344 | || tb->insert_size[0] <= | ||
1345 | 0, | ||
1346 | "PAP-12225: item too short or insert_size <= 0"); | 926 | "PAP-12225: item too short or insert_size <= 0"); |
1347 | 927 | ||
1348 | /* Calculate number of bytes which must be shifted from appended item */ | 928 | /* Calculate number of bytes which must be shifted from appended item */ |
1349 | n_shift = | 929 | n_shift = sbytes[i] - tb->insert_size[0]; |
1350 | sbytes[i] - | ||
1351 | tb->insert_size[0]; | ||
1352 | if (n_shift < 0) | 930 | if (n_shift < 0) |
1353 | n_shift = 0; | 931 | n_shift = 0; |
1354 | leaf_move_items | 932 | leaf_move_items(LEAF_FROM_S_TO_SNEW, tb, snum[i], n_shift, S_new[i]); |
1355 | (LEAF_FROM_S_TO_SNEW, tb, | ||
1356 | snum[i], n_shift, | ||
1357 | S_new[i]); | ||
1358 | 933 | ||
1359 | /* Calculate number of bytes which must remain in body after append to S_new[i] */ | 934 | /* Calculate number of bytes which must remain in body after append to S_new[i] */ |
1360 | n_rem = | 935 | n_rem = tb->insert_size[0] - sbytes[i]; |
1361 | tb->insert_size[0] - | ||
1362 | sbytes[i]; | ||
1363 | if (n_rem < 0) | 936 | if (n_rem < 0) |
1364 | n_rem = 0; | 937 | n_rem = 0; |
1365 | /* Append part of body into S_new[0] */ | 938 | /* Append part of body into S_new[0] */ |
1366 | buffer_info_init_bh(tb, &bi, S_new[i]); | 939 | buffer_info_init_bh(tb, &bi, S_new[i]); |
1367 | if (n_rem > zeros_num) { | 940 | if (n_rem > zeros_num) { |
1368 | r_zeros_number = 0; | 941 | r_zeros_number = 0; |
1369 | r_body = | 942 | r_body = body + n_rem - zeros_num; |
1370 | body + n_rem - | ||
1371 | zeros_num; | ||
1372 | } else { | 943 | } else { |
1373 | r_body = body; | 944 | r_body = body; |
1374 | r_zeros_number = | 945 | r_zeros_number = zeros_num - n_rem; |
1375 | zeros_num - n_rem; | 946 | zeros_num -= r_zeros_number; |
1376 | zeros_num -= | ||
1377 | r_zeros_number; | ||
1378 | } | 947 | } |
1379 | 948 | ||
1380 | leaf_paste_in_buffer(&bi, 0, | 949 | leaf_paste_in_buffer(&bi, 0, n_shift, |
1381 | n_shift, | 950 | tb->insert_size[0] - n_rem, |
1382 | tb-> | 951 | r_body, r_zeros_number); |
1383 | insert_size | ||
1384 | [0] - | ||
1385 | n_rem, | ||
1386 | r_body, | ||
1387 | r_zeros_number); | ||
1388 | { | 952 | { |
1389 | struct item_head *tmp; | 953 | struct item_head *tmp; |
1390 | 954 | ||
1391 | tmp = | 955 | tmp = B_N_PITEM_HEAD(S_new[i], 0); |
1392 | B_N_PITEM_HEAD(S_new | ||
1393 | [i], | ||
1394 | 0); | ||
1395 | if (is_indirect_le_ih | 956 | if (is_indirect_le_ih |
1396 | (tmp)) { | 957 | (tmp)) { |
1397 | set_ih_free_space | 958 | set_ih_free_space(tmp, 0); |
1398 | (tmp, 0); | 959 | set_le_ih_k_offset(tmp, le_ih_k_offset(tmp) + (n_rem << (tb->tb_sb->s_blocksize_bits - UNFM_P_SHIFT))); |
1399 | set_le_ih_k_offset | ||
1400 | (tmp, | ||
1401 | le_ih_k_offset | ||
1402 | (tmp) + | ||
1403 | (n_rem << | ||
1404 | (tb-> | ||
1405 | tb_sb-> | ||
1406 | s_blocksize_bits | ||
1407 | - | ||
1408 | UNFM_P_SHIFT))); | ||
1409 | } else { | 960 | } else { |
1410 | set_le_ih_k_offset | 961 | set_le_ih_k_offset(tmp, le_ih_k_offset(tmp) + n_rem); |
1411 | (tmp, | ||
1412 | le_ih_k_offset | ||
1413 | (tmp) + | ||
1414 | n_rem); | ||
1415 | } | 962 | } |
1416 | } | 963 | } |
1417 | 964 | ||
@@ -1426,8 +973,7 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1426 | struct item_head *pasted; | 973 | struct item_head *pasted; |
1427 | 974 | ||
1428 | #ifdef CONFIG_REISERFS_CHECK | 975 | #ifdef CONFIG_REISERFS_CHECK |
1429 | struct item_head *ih_check = | 976 | struct item_head *ih_check = B_N_PITEM_HEAD(tbS0, item_pos); |
1430 | B_N_PITEM_HEAD(tbS0, item_pos); | ||
1431 | 977 | ||
1432 | if (!is_direntry_le_ih(ih_check) | 978 | if (!is_direntry_le_ih(ih_check) |
1433 | && (pos_in_item != ih_item_len(ih_check) | 979 | && (pos_in_item != ih_item_len(ih_check) |
@@ -1439,8 +985,7 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1439 | "to ih_item_len"); | 985 | "to ih_item_len"); |
1440 | #endif /* CONFIG_REISERFS_CHECK */ | 986 | #endif /* CONFIG_REISERFS_CHECK */ |
1441 | 987 | ||
1442 | leaf_mi = | 988 | leaf_mi = leaf_move_items(LEAF_FROM_S_TO_SNEW, |
1443 | leaf_move_items(LEAF_FROM_S_TO_SNEW, | ||
1444 | tb, snum[i], | 989 | tb, snum[i], |
1445 | sbytes[i], | 990 | sbytes[i], |
1446 | S_new[i]); | 991 | S_new[i]); |
@@ -1452,30 +997,19 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1452 | /* paste into item */ | 997 | /* paste into item */ |
1453 | buffer_info_init_bh(tb, &bi, S_new[i]); | 998 | buffer_info_init_bh(tb, &bi, S_new[i]); |
1454 | leaf_paste_in_buffer(&bi, | 999 | leaf_paste_in_buffer(&bi, |
1455 | item_pos - n + | 1000 | item_pos - n + snum[i], |
1456 | snum[i], | ||
1457 | pos_in_item, | 1001 | pos_in_item, |
1458 | tb->insert_size[0], | 1002 | tb->insert_size[0], |
1459 | body, zeros_num); | 1003 | body, zeros_num); |
1460 | 1004 | ||
1461 | pasted = | 1005 | pasted = B_N_PITEM_HEAD(S_new[i], item_pos - n + snum[i]); |
1462 | B_N_PITEM_HEAD(S_new[i], | ||
1463 | item_pos - n + | ||
1464 | snum[i]); | ||
1465 | if (is_direntry_le_ih(pasted)) { | 1006 | if (is_direntry_le_ih(pasted)) { |
1466 | leaf_paste_entries(&bi, | 1007 | leaf_paste_entries(&bi, |
1467 | item_pos - | 1008 | item_pos - n + snum[i], |
1468 | n + snum[i], | 1009 | pos_in_item, 1, |
1469 | pos_in_item, | 1010 | (struct reiserfs_de_head *)body, |
1470 | 1, | 1011 | body + DEH_SIZE, |
1471 | (struct | 1012 | tb->insert_size[0] |
1472 | reiserfs_de_head | ||
1473 | *)body, | ||
1474 | body + | ||
1475 | DEH_SIZE, | ||
1476 | tb-> | ||
1477 | insert_size | ||
1478 | [0] | ||
1479 | ); | 1013 | ); |
1480 | } | 1014 | } |
1481 | 1015 | ||
@@ -1495,11 +1029,7 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1495 | default: /* cases d and t */ | 1029 | default: /* cases d and t */ |
1496 | reiserfs_panic(tb->tb_sb, "PAP-12245", | 1030 | reiserfs_panic(tb->tb_sb, "PAP-12245", |
1497 | "blknum > 2: unexpected mode: %s(%d)", | 1031 | "blknum > 2: unexpected mode: %s(%d)", |
1498 | (flag == | 1032 | (flag == M_DELETE) ? "DELETE" : ((flag == M_CUT) ? "CUT" : "UNKNOWN"), flag); |
1499 | M_DELETE) ? "DELETE" : ((flag == | ||
1500 | M_CUT) ? "CUT" | ||
1501 | : "UNKNOWN"), | ||
1502 | flag); | ||
1503 | } | 1033 | } |
1504 | 1034 | ||
1505 | memcpy(insert_key + i, B_N_PKEY(S_new[i], 0), KEY_SIZE); | 1035 | memcpy(insert_key + i, B_N_PKEY(S_new[i], 0), KEY_SIZE); |
@@ -1524,9 +1054,7 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1524 | /* If we insert the first key change the delimiting key */ | 1054 | /* If we insert the first key change the delimiting key */ |
1525 | if (item_pos == 0) { | 1055 | if (item_pos == 0) { |
1526 | if (tb->CFL[0]) /* can be 0 in reiserfsck */ | 1056 | if (tb->CFL[0]) /* can be 0 in reiserfsck */ |
1527 | replace_key(tb, tb->CFL[0], tb->lkey[0], | 1057 | replace_key(tb, tb->CFL[0], tb->lkey[0], tbS0, 0); |
1528 | tbS0, 0); | ||
1529 | |||
1530 | } | 1058 | } |
1531 | break; | 1059 | break; |
1532 | 1060 | ||
@@ -1536,53 +1064,27 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1536 | pasted = B_N_PITEM_HEAD(tbS0, item_pos); | 1064 | pasted = B_N_PITEM_HEAD(tbS0, item_pos); |
1537 | /* when directory, may be new entry already pasted */ | 1065 | /* when directory, may be new entry already pasted */ |
1538 | if (is_direntry_le_ih(pasted)) { | 1066 | if (is_direntry_le_ih(pasted)) { |
1539 | if (pos_in_item >= 0 && | 1067 | if (pos_in_item >= 0 && pos_in_item <= ih_entry_count(pasted)) { |
1540 | pos_in_item <= | ||
1541 | ih_entry_count(pasted)) { | ||
1542 | 1068 | ||
1543 | RFALSE(!tb->insert_size[0], | 1069 | RFALSE(!tb->insert_size[0], |
1544 | "PAP-12260: insert_size is 0 already"); | 1070 | "PAP-12260: insert_size is 0 already"); |
1545 | 1071 | ||
1546 | /* prepare space */ | 1072 | /* prepare space */ |
1547 | buffer_info_init_tbS0(tb, &bi); | 1073 | buffer_info_init_tbS0(tb, &bi); |
1548 | leaf_paste_in_buffer(&bi, | 1074 | leaf_paste_in_buffer(&bi, item_pos, pos_in_item, |
1549 | item_pos, | 1075 | tb->insert_size[0], body, |
1550 | pos_in_item, | ||
1551 | tb-> | ||
1552 | insert_size | ||
1553 | [0], body, | ||
1554 | zeros_num); | 1076 | zeros_num); |
1555 | 1077 | ||
1556 | /* paste entry */ | 1078 | /* paste entry */ |
1557 | leaf_paste_entries(&bi, | 1079 | leaf_paste_entries(&bi, item_pos, pos_in_item, 1, |
1558 | item_pos, | 1080 | (struct reiserfs_de_head *)body, |
1559 | pos_in_item, | 1081 | body + DEH_SIZE, |
1560 | 1, | 1082 | tb->insert_size[0]); |
1561 | (struct | ||
1562 | reiserfs_de_head | ||
1563 | *)body, | ||
1564 | body + | ||
1565 | DEH_SIZE, | ||
1566 | tb-> | ||
1567 | insert_size | ||
1568 | [0] | ||
1569 | ); | ||
1570 | if (!item_pos && !pos_in_item) { | 1083 | if (!item_pos && !pos_in_item) { |
1571 | RFALSE(!tb->CFL[0] | 1084 | RFALSE(!tb->CFL[0] || !tb->L[0], |
1572 | || !tb->L[0], | ||
1573 | "PAP-12270: CFL[0]/L[0] must be specified"); | 1085 | "PAP-12270: CFL[0]/L[0] must be specified"); |
1574 | if (tb->CFL[0]) { | 1086 | if (tb->CFL[0]) |
1575 | replace_key(tb, | 1087 | replace_key(tb, tb->CFL[0], tb->lkey[0], tbS0, 0); |
1576 | tb-> | ||
1577 | CFL | ||
1578 | [0], | ||
1579 | tb-> | ||
1580 | lkey | ||
1581 | [0], | ||
1582 | tbS0, | ||
1583 | 0); | ||
1584 | |||
1585 | } | ||
1586 | } | 1088 | } |
1587 | tb->insert_size[0] = 0; | 1089 | tb->insert_size[0] = 0; |
1588 | } | 1090 | } |
@@ -1593,13 +1095,8 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1593 | "PAP-12275: insert size must not be %d", | 1095 | "PAP-12275: insert size must not be %d", |
1594 | tb->insert_size[0]); | 1096 | tb->insert_size[0]); |
1595 | buffer_info_init_tbS0(tb, &bi); | 1097 | buffer_info_init_tbS0(tb, &bi); |
1596 | leaf_paste_in_buffer(&bi, | 1098 | leaf_paste_in_buffer(&bi, item_pos, pos_in_item, |
1597 | item_pos, | 1099 | tb->insert_size[0], body, zeros_num); |
1598 | pos_in_item, | ||
1599 | tb-> | ||
1600 | insert_size | ||
1601 | [0], body, | ||
1602 | zeros_num); | ||
1603 | 1100 | ||
1604 | if (is_indirect_le_ih(pasted)) { | 1101 | if (is_indirect_le_ih(pasted)) { |
1605 | #if 0 | 1102 | #if 0 |
@@ -1611,8 +1108,7 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1611 | tb-> | 1108 | tb-> |
1612 | insert_size[0]); | 1109 | insert_size[0]); |
1613 | #endif | 1110 | #endif |
1614 | set_ih_free_space | 1111 | set_ih_free_space(pasted, 0); |
1615 | (pasted, 0); | ||
1616 | } | 1112 | } |
1617 | tb->insert_size[0] = 0; | 1113 | tb->insert_size[0] = 0; |
1618 | } | 1114 | } |
@@ -1620,8 +1116,7 @@ static int balance_leaf(struct tree_balance *tb, struct item_head *ih, /* item h | |||
1620 | else { | 1116 | else { |
1621 | if (tb->insert_size[0]) { | 1117 | if (tb->insert_size[0]) { |
1622 | print_cur_tb("12285"); | 1118 | print_cur_tb("12285"); |
1623 | reiserfs_panic(tb-> | 1119 | reiserfs_panic(tb->tb_sb, |
1624 | tb_sb, | ||
1625 | "PAP-12285", | 1120 | "PAP-12285", |
1626 | "insert_size " | 1121 | "insert_size " |
1627 | "must be 0 " | 1122 | "must be 0 " |
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h index 8e4f41d9af4d..34c7bdc06014 100644 --- a/include/asm-generic/pgtable.h +++ b/include/asm-generic/pgtable.h | |||
@@ -701,6 +701,18 @@ static inline pte_t pte_mknuma(pte_t pte) | |||
701 | } | 701 | } |
702 | #endif | 702 | #endif |
703 | 703 | ||
704 | #ifndef ptep_set_numa | ||
705 | static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr, | ||
706 | pte_t *ptep) | ||
707 | { | ||
708 | pte_t ptent = *ptep; | ||
709 | |||
710 | ptent = pte_mknuma(ptent); | ||
711 | set_pte_at(mm, addr, ptep, ptent); | ||
712 | return; | ||
713 | } | ||
714 | #endif | ||
715 | |||
704 | #ifndef pmd_mknuma | 716 | #ifndef pmd_mknuma |
705 | static inline pmd_t pmd_mknuma(pmd_t pmd) | 717 | static inline pmd_t pmd_mknuma(pmd_t pmd) |
706 | { | 718 | { |
@@ -708,6 +720,18 @@ static inline pmd_t pmd_mknuma(pmd_t pmd) | |||
708 | return pmd_clear_flags(pmd, _PAGE_PRESENT); | 720 | return pmd_clear_flags(pmd, _PAGE_PRESENT); |
709 | } | 721 | } |
710 | #endif | 722 | #endif |
723 | |||
724 | #ifndef pmdp_set_numa | ||
725 | static inline void pmdp_set_numa(struct mm_struct *mm, unsigned long addr, | ||
726 | pmd_t *pmdp) | ||
727 | { | ||
728 | pmd_t pmd = *pmdp; | ||
729 | |||
730 | pmd = pmd_mknuma(pmd); | ||
731 | set_pmd_at(mm, addr, pmdp, pmd); | ||
732 | return; | ||
733 | } | ||
734 | #endif | ||
711 | #else | 735 | #else |
712 | extern int pte_numa(pte_t pte); | 736 | extern int pte_numa(pte_t pte); |
713 | extern int pmd_numa(pmd_t pmd); | 737 | extern int pmd_numa(pmd_t pmd); |
@@ -715,6 +739,8 @@ extern pte_t pte_mknonnuma(pte_t pte); | |||
715 | extern pmd_t pmd_mknonnuma(pmd_t pmd); | 739 | extern pmd_t pmd_mknonnuma(pmd_t pmd); |
716 | extern pte_t pte_mknuma(pte_t pte); | 740 | extern pte_t pte_mknuma(pte_t pte); |
717 | extern pmd_t pmd_mknuma(pmd_t pmd); | 741 | extern pmd_t pmd_mknuma(pmd_t pmd); |
742 | extern void ptep_set_numa(struct mm_struct *mm, unsigned long addr, pte_t *ptep); | ||
743 | extern void pmdp_set_numa(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp); | ||
718 | #endif /* CONFIG_ARCH_USES_NUMA_PROT_NONE */ | 744 | #endif /* CONFIG_ARCH_USES_NUMA_PROT_NONE */ |
719 | #else | 745 | #else |
720 | static inline int pmd_numa(pmd_t pmd) | 746 | static inline int pmd_numa(pmd_t pmd) |
@@ -742,10 +768,23 @@ static inline pte_t pte_mknuma(pte_t pte) | |||
742 | return pte; | 768 | return pte; |
743 | } | 769 | } |
744 | 770 | ||
771 | static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr, | ||
772 | pte_t *ptep) | ||
773 | { | ||
774 | return; | ||
775 | } | ||
776 | |||
777 | |||
745 | static inline pmd_t pmd_mknuma(pmd_t pmd) | 778 | static inline pmd_t pmd_mknuma(pmd_t pmd) |
746 | { | 779 | { |
747 | return pmd; | 780 | return pmd; |
748 | } | 781 | } |
782 | |||
783 | static inline void pmdp_set_numa(struct mm_struct *mm, unsigned long addr, | ||
784 | pmd_t *pmdp) | ||
785 | { | ||
786 | return ; | ||
787 | } | ||
749 | #endif /* CONFIG_NUMA_BALANCING */ | 788 | #endif /* CONFIG_NUMA_BALANCING */ |
750 | 789 | ||
751 | #endif /* CONFIG_MMU */ | 790 | #endif /* CONFIG_MMU */ |
diff --git a/include/linux/ceph/ceph_fs.h b/include/linux/ceph/ceph_fs.h index 2623cffc73a1..25bfb0eff772 100644 --- a/include/linux/ceph/ceph_fs.h +++ b/include/linux/ceph/ceph_fs.h | |||
@@ -373,8 +373,9 @@ extern const char *ceph_mds_op_name(int op); | |||
373 | /* | 373 | /* |
374 | * Ceph setxattr request flags. | 374 | * Ceph setxattr request flags. |
375 | */ | 375 | */ |
376 | #define CEPH_XATTR_CREATE 1 | 376 | #define CEPH_XATTR_CREATE (1 << 0) |
377 | #define CEPH_XATTR_REPLACE 2 | 377 | #define CEPH_XATTR_REPLACE (1 << 1) |
378 | #define CEPH_XATTR_REMOVE (1 << 31) | ||
378 | 379 | ||
379 | union ceph_mds_request_args { | 380 | union ceph_mds_request_args { |
380 | struct { | 381 | struct { |
diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h index dfac5ed31120..f886985a28b2 100644 --- a/include/linux/dma-buf.h +++ b/include/linux/dma-buf.h | |||
@@ -171,7 +171,7 @@ struct dma_buf *dma_buf_export_named(void *priv, const struct dma_buf_ops *ops, | |||
171 | size_t size, int flags, const char *); | 171 | size_t size, int flags, const char *); |
172 | 172 | ||
173 | #define dma_buf_export(priv, ops, size, flags) \ | 173 | #define dma_buf_export(priv, ops, size, flags) \ |
174 | dma_buf_export_named(priv, ops, size, flags, __FILE__) | 174 | dma_buf_export_named(priv, ops, size, flags, KBUILD_MODNAME) |
175 | 175 | ||
176 | int dma_buf_fd(struct dma_buf *dmabuf, int flags); | 176 | int dma_buf_fd(struct dma_buf *dmabuf, int flags); |
177 | struct dma_buf *dma_buf_get(int fd); | 177 | struct dma_buf *dma_buf_get(int fd); |
diff --git a/include/linux/irqchip/arm-vic.h b/include/linux/irqchip/arm-vic.h index e3c82dc95756..ba46c794b4e5 100644 --- a/include/linux/irqchip/arm-vic.h +++ b/include/linux/irqchip/arm-vic.h | |||
@@ -29,8 +29,10 @@ | |||
29 | struct device_node; | 29 | struct device_node; |
30 | struct pt_regs; | 30 | struct pt_regs; |
31 | 31 | ||
32 | void __vic_init(void __iomem *base, int irq_start, u32 vic_sources, | 32 | void __vic_init(void __iomem *base, int parent_irq, int irq_start, |
33 | u32 resume_sources, struct device_node *node); | 33 | u32 vic_sources, u32 resume_sources, struct device_node *node); |
34 | void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); | 34 | void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); |
35 | int vic_init_cascaded(void __iomem *base, unsigned int parent_irq, | ||
36 | u32 vic_sources, u32 resume_sources); | ||
35 | 37 | ||
36 | #endif | 38 | #endif |
diff --git a/include/linux/platform_data/clk-integrator.h b/include/linux/platform_data/clk-integrator.h index 280edac9d0a5..addd48cac625 100644 --- a/include/linux/platform_data/clk-integrator.h +++ b/include/linux/platform_data/clk-integrator.h | |||
@@ -1,3 +1,2 @@ | |||
1 | void integrator_clk_init(bool is_cp); | ||
2 | void integrator_impd1_clk_init(void __iomem *base, unsigned int id); | 1 | void integrator_impd1_clk_init(void __iomem *base, unsigned int id); |
3 | void integrator_impd1_clk_exit(unsigned int id); | 2 | void integrator_impd1_clk_exit(unsigned int id); |
diff --git a/include/linux/platform_data/mtd-davinci-aemif.h b/include/linux/platform_data/mtd-davinci-aemif.h index 05b293443097..97948ac2bb9b 100644 --- a/include/linux/platform_data/mtd-davinci-aemif.h +++ b/include/linux/platform_data/mtd-davinci-aemif.h | |||
@@ -10,6 +10,8 @@ | |||
10 | #ifndef _MACH_DAVINCI_AEMIF_H | 10 | #ifndef _MACH_DAVINCI_AEMIF_H |
11 | #define _MACH_DAVINCI_AEMIF_H | 11 | #define _MACH_DAVINCI_AEMIF_H |
12 | 12 | ||
13 | #include <linux/platform_device.h> | ||
14 | |||
13 | #define NRCSR_OFFSET 0x00 | 15 | #define NRCSR_OFFSET 0x00 |
14 | #define AWCCR_OFFSET 0x04 | 16 | #define AWCCR_OFFSET 0x04 |
15 | #define A1CR_OFFSET 0x10 | 17 | #define A1CR_OFFSET 0x10 |
@@ -31,6 +33,5 @@ struct davinci_aemif_timing { | |||
31 | u8 ta; | 33 | u8 ta; |
32 | }; | 34 | }; |
33 | 35 | ||
34 | int davinci_aemif_setup_timing(struct davinci_aemif_timing *t, | 36 | int davinci_aemif_setup(struct platform_device *pdev); |
35 | void __iomem *base, unsigned cs); | ||
36 | #endif | 37 | #endif |
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h index 60c72395ec6b..1f208b2a1ed6 100644 --- a/include/linux/sh_clk.h +++ b/include/linux/sh_clk.h | |||
@@ -52,6 +52,7 @@ struct clk { | |||
52 | unsigned long flags; | 52 | unsigned long flags; |
53 | 53 | ||
54 | void __iomem *enable_reg; | 54 | void __iomem *enable_reg; |
55 | void __iomem *status_reg; | ||
55 | unsigned int enable_bit; | 56 | unsigned int enable_bit; |
56 | void __iomem *mapped_reg; | 57 | void __iomem *mapped_reg; |
57 | 58 | ||
@@ -116,22 +117,26 @@ long clk_round_parent(struct clk *clk, unsigned long target, | |||
116 | unsigned long *best_freq, unsigned long *parent_freq, | 117 | unsigned long *best_freq, unsigned long *parent_freq, |
117 | unsigned int div_min, unsigned int div_max); | 118 | unsigned int div_min, unsigned int div_max); |
118 | 119 | ||
119 | #define SH_CLK_MSTP(_parent, _enable_reg, _enable_bit, _flags) \ | 120 | #define SH_CLK_MSTP(_parent, _enable_reg, _enable_bit, _status_reg, _flags) \ |
120 | { \ | 121 | { \ |
121 | .parent = _parent, \ | 122 | .parent = _parent, \ |
122 | .enable_reg = (void __iomem *)_enable_reg, \ | 123 | .enable_reg = (void __iomem *)_enable_reg, \ |
123 | .enable_bit = _enable_bit, \ | 124 | .enable_bit = _enable_bit, \ |
125 | .status_reg = _status_reg, \ | ||
124 | .flags = _flags, \ | 126 | .flags = _flags, \ |
125 | } | 127 | } |
126 | 128 | ||
127 | #define SH_CLK_MSTP32(_p, _r, _b, _f) \ | 129 | #define SH_CLK_MSTP32(_p, _r, _b, _f) \ |
128 | SH_CLK_MSTP(_p, _r, _b, _f | CLK_ENABLE_REG_32BIT) | 130 | SH_CLK_MSTP(_p, _r, _b, 0, _f | CLK_ENABLE_REG_32BIT) |
129 | 131 | ||
130 | #define SH_CLK_MSTP16(_p, _r, _b, _f) \ | 132 | #define SH_CLK_MSTP32_STS(_p, _r, _b, _s, _f) \ |
131 | SH_CLK_MSTP(_p, _r, _b, _f | CLK_ENABLE_REG_16BIT) | 133 | SH_CLK_MSTP(_p, _r, _b, _s, _f | CLK_ENABLE_REG_32BIT) |
132 | 134 | ||
133 | #define SH_CLK_MSTP8(_p, _r, _b, _f) \ | 135 | #define SH_CLK_MSTP16(_p, _r, _b, _f) \ |
134 | SH_CLK_MSTP(_p, _r, _b, _f | CLK_ENABLE_REG_8BIT) | 136 | SH_CLK_MSTP(_p, _r, _b, 0, _f | CLK_ENABLE_REG_16BIT) |
137 | |||
138 | #define SH_CLK_MSTP8(_p, _r, _b, _f) \ | ||
139 | SH_CLK_MSTP(_p, _r, _b, 0, _f | CLK_ENABLE_REG_8BIT) | ||
135 | 140 | ||
136 | int sh_clk_mstp_register(struct clk *clks, int nr); | 141 | int sh_clk_mstp_register(struct clk *clks, int nr); |
137 | 142 | ||
diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c index b1d255f04135..4dae9cbe9259 100644 --- a/kernel/printk/printk.c +++ b/kernel/printk/printk.c | |||
@@ -1076,7 +1076,6 @@ static int syslog_print_all(char __user *buf, int size, bool clear) | |||
1076 | next_seq = log_next_seq; | 1076 | next_seq = log_next_seq; |
1077 | 1077 | ||
1078 | len = 0; | 1078 | len = 0; |
1079 | prev = 0; | ||
1080 | while (len >= 0 && seq < next_seq) { | 1079 | while (len >= 0 && seq < next_seq) { |
1081 | struct printk_log *msg = log_from_idx(idx); | 1080 | struct printk_log *msg = log_from_idx(idx); |
1082 | int textlen; | 1081 | int textlen; |
@@ -2788,7 +2787,6 @@ bool kmsg_dump_get_buffer(struct kmsg_dumper *dumper, bool syslog, | |||
2788 | next_idx = idx; | 2787 | next_idx = idx; |
2789 | 2788 | ||
2790 | l = 0; | 2789 | l = 0; |
2791 | prev = 0; | ||
2792 | while (seq < dumper->next_seq) { | 2790 | while (seq < dumper->next_seq) { |
2793 | struct printk_log *msg = log_from_idx(idx); | 2791 | struct printk_log *msg = log_from_idx(idx); |
2794 | 2792 | ||
diff --git a/mm/huge_memory.c b/mm/huge_memory.c index 82166bf974e1..da23eb96779f 100644 --- a/mm/huge_memory.c +++ b/mm/huge_memory.c | |||
@@ -1545,6 +1545,7 @@ int change_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd, | |||
1545 | entry = pmd_mknonnuma(entry); | 1545 | entry = pmd_mknonnuma(entry); |
1546 | entry = pmd_modify(entry, newprot); | 1546 | entry = pmd_modify(entry, newprot); |
1547 | ret = HPAGE_PMD_NR; | 1547 | ret = HPAGE_PMD_NR; |
1548 | set_pmd_at(mm, addr, pmd, entry); | ||
1548 | BUG_ON(pmd_write(entry)); | 1549 | BUG_ON(pmd_write(entry)); |
1549 | } else { | 1550 | } else { |
1550 | struct page *page = pmd_page(*pmd); | 1551 | struct page *page = pmd_page(*pmd); |
@@ -1557,16 +1558,10 @@ int change_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd, | |||
1557 | */ | 1558 | */ |
1558 | if (!is_huge_zero_page(page) && | 1559 | if (!is_huge_zero_page(page) && |
1559 | !pmd_numa(*pmd)) { | 1560 | !pmd_numa(*pmd)) { |
1560 | entry = *pmd; | 1561 | pmdp_set_numa(mm, addr, pmd); |
1561 | entry = pmd_mknuma(entry); | ||
1562 | ret = HPAGE_PMD_NR; | 1562 | ret = HPAGE_PMD_NR; |
1563 | } | 1563 | } |
1564 | } | 1564 | } |
1565 | |||
1566 | /* Set PMD if cleared earlier */ | ||
1567 | if (ret == HPAGE_PMD_NR) | ||
1568 | set_pmd_at(mm, addr, pmd, entry); | ||
1569 | |||
1570 | spin_unlock(ptl); | 1565 | spin_unlock(ptl); |
1571 | } | 1566 | } |
1572 | 1567 | ||
diff --git a/mm/mprotect.c b/mm/mprotect.c index 7332c1785744..769a67a15803 100644 --- a/mm/mprotect.c +++ b/mm/mprotect.c | |||
@@ -58,36 +58,27 @@ static unsigned long change_pte_range(struct vm_area_struct *vma, pmd_t *pmd, | |||
58 | if (pte_numa(ptent)) | 58 | if (pte_numa(ptent)) |
59 | ptent = pte_mknonnuma(ptent); | 59 | ptent = pte_mknonnuma(ptent); |
60 | ptent = pte_modify(ptent, newprot); | 60 | ptent = pte_modify(ptent, newprot); |
61 | /* | ||
62 | * Avoid taking write faults for pages we | ||
63 | * know to be dirty. | ||
64 | */ | ||
65 | if (dirty_accountable && pte_dirty(ptent)) | ||
66 | ptent = pte_mkwrite(ptent); | ||
67 | ptep_modify_prot_commit(mm, addr, pte, ptent); | ||
61 | updated = true; | 68 | updated = true; |
62 | } else { | 69 | } else { |
63 | struct page *page; | 70 | struct page *page; |
64 | 71 | ||
65 | ptent = *pte; | ||
66 | page = vm_normal_page(vma, addr, oldpte); | 72 | page = vm_normal_page(vma, addr, oldpte); |
67 | if (page && !PageKsm(page)) { | 73 | if (page && !PageKsm(page)) { |
68 | if (!pte_numa(oldpte)) { | 74 | if (!pte_numa(oldpte)) { |
69 | ptent = pte_mknuma(ptent); | 75 | ptep_set_numa(mm, addr, pte); |
70 | set_pte_at(mm, addr, pte, ptent); | ||
71 | updated = true; | 76 | updated = true; |
72 | } | 77 | } |
73 | } | 78 | } |
74 | } | 79 | } |
75 | |||
76 | /* | ||
77 | * Avoid taking write faults for pages we know to be | ||
78 | * dirty. | ||
79 | */ | ||
80 | if (dirty_accountable && pte_dirty(ptent)) { | ||
81 | ptent = pte_mkwrite(ptent); | ||
82 | updated = true; | ||
83 | } | ||
84 | |||
85 | if (updated) | 80 | if (updated) |
86 | pages++; | 81 | pages++; |
87 | |||
88 | /* Only !prot_numa always clears the pte */ | ||
89 | if (!prot_numa) | ||
90 | ptep_modify_prot_commit(mm, addr, pte, ptent); | ||
91 | } else if (IS_ENABLED(CONFIG_MIGRATION) && !pte_file(oldpte)) { | 82 | } else if (IS_ENABLED(CONFIG_MIGRATION) && !pte_file(oldpte)) { |
92 | swp_entry_t entry = pte_to_swp_entry(oldpte); | 83 | swp_entry_t entry = pte_to_swp_entry(oldpte); |
93 | 84 | ||