2 files changed, 34 insertions, 31 deletions

diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
index 28e7e2060c33..a98ac1bd8f65 100644
--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -65,6 +65,8 @@
 };
 
 &sdhci2 {
+        broken-cd;
+        bus-width = <8>;
         non-removable;
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 35253c947a7c..e2f61f27944e 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -83,7 +83,8 @@
                         compatible = "mrvl,pxav3-mmc";
                         reg = <0xab1000 0x200>;
                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-                        clocks = <&chip CLKID_SDIO1XIN>;
+                        clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
+                        clock-names = "io", "core";
                         status = "disabled";
                 };
 
@@ -348,36 +349,6 @@
                                 interrupt-parent = <&gic>;
                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                         };
-
-                        gpio4: gpio@5000 {
-                                compatible = "snps,dw-apb-gpio";
-                                reg = <0x5000 0x400>;
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                porte: gpio-port@4 {
-                                        compatible = "snps,dw-apb-gpio-port";
-                                        gpio-controller;
-                                        #gpio-cells = <2>;
-                                        snps,nr-gpios = <32>;
-                                        reg = <0>;
-                                };
-                        };
-
-                        gpio5: gpio@c000 {
-                                compatible = "snps,dw-apb-gpio";
-                                reg = <0xc000 0x400>;
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                portf: gpio-port@5 {
-                                        compatible = "snps,dw-apb-gpio-port";
-                                        gpio-controller;
-                                        #gpio-cells = <2>;
-                                        snps,nr-gpios = <32>;
-                                        reg = <0>;
-                                };
-                        };
                 };
 
                 chip: chip-control@ea0000 {
@@ -466,6 +437,21 @@
                         ranges = <0 0xfc0000 0x10000>;
                         interrupt-parent = <&sic>;
 
+                        sm_gpio1: gpio@5000 {
+                                compatible = "snps,dw-apb-gpio";
+                                reg = <0x5000 0x400>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                portf: gpio-port@5 {
+                                        compatible = "snps,dw-apb-gpio-port";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        snps,nr-gpios = <32>;
+                                        reg = <0>;
+                                };
+                        };
+
                         i2c2: i2c@7000 {
                                 compatible = "snps,designware-i2c";
                                 #address-cells = <1>;
@@ -516,6 +502,21 @@
                                 status = "disabled";
                         };
 
+                        sm_gpio0: gpio@c000 {
+                                compatible = "snps,dw-apb-gpio";
+                                reg = <0xc000 0x400>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                porte: gpio-port@4 {
+                                        compatible = "snps,dw-apb-gpio-port";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        snps,nr-gpios = <32>;
+                                        reg = <0>;
+                                };
+                        };
+
                         sysctrl: pin-controller@d000 {
                                 compatible = "marvell,berlin2q-system-ctrl";
                                 reg = <0xd000 0x100>;