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-rw-r--r--arch/arm/Kconfig12
-rw-r--r--arch/arm/Makefile5
-rw-r--r--arch/arm/configs/multi_v7_defconfig9
-rw-r--r--arch/arm/configs/spear3xx_defconfig2
-rw-r--r--arch/arm/configs/spear6xx_defconfig1
-rw-r--r--arch/arm/mach-spear/Kconfig103
-rw-r--r--arch/arm/mach-spear/Makefile24
-rw-r--r--arch/arm/mach-spear/Makefile.boot (renamed from arch/arm/mach-spear13xx/Makefile.boot)0
-rw-r--r--arch/arm/mach-spear/generic.h (renamed from arch/arm/mach-spear13xx/include/mach/generic.h)30
-rw-r--r--arch/arm/mach-spear/headsmp.S (renamed from arch/arm/mach-spear13xx/headsmp.S)0
-rw-r--r--arch/arm/mach-spear/hotplug.c (renamed from arch/arm/mach-spear13xx/hotplug.c)0
-rw-r--r--arch/arm/mach-spear/include/mach/debug-macro.S (renamed from arch/arm/plat-spear/include/plat/debug-macro.S)0
-rw-r--r--arch/arm/mach-spear/include/mach/irqs.h (renamed from arch/arm/mach-spear6xx/include/mach/irqs.h)22
-rw-r--r--arch/arm/mach-spear/include/mach/misc_regs.h (renamed from arch/arm/mach-spear3xx/include/mach/misc_regs.h)2
-rw-r--r--arch/arm/mach-spear/include/mach/spear.h95
-rw-r--r--arch/arm/mach-spear/include/mach/timex.h (renamed from arch/arm/plat-spear/include/plat/timex.h)0
-rw-r--r--arch/arm/mach-spear/include/mach/uncompress.h (renamed from arch/arm/plat-spear/include/plat/uncompress.h)0
-rw-r--r--arch/arm/mach-spear/pl080.c (renamed from arch/arm/plat-spear/pl080.c)0
-rw-r--r--arch/arm/mach-spear/pl080.h (renamed from arch/arm/plat-spear/include/plat/pl080.h)0
-rw-r--r--arch/arm/mach-spear/platsmp.c (renamed from arch/arm/mach-spear13xx/platsmp.c)2
-rw-r--r--arch/arm/mach-spear/restart.c (renamed from arch/arm/plat-spear/restart.c)5
-rw-r--r--arch/arm/mach-spear/spear1310.c (renamed from arch/arm/mach-spear13xx/spear1310.c)4
-rw-r--r--arch/arm/mach-spear/spear1340.c (renamed from arch/arm/mach-spear13xx/spear1340.c)5
-rw-r--r--arch/arm/mach-spear/spear13xx-dma.h (renamed from arch/arm/mach-spear13xx/include/mach/dma.h)0
-rw-r--r--arch/arm/mach-spear/spear13xx.c (renamed from arch/arm/mach-spear13xx/spear13xx.c)9
-rw-r--r--arch/arm/mach-spear/spear300.c (renamed from arch/arm/mach-spear3xx/spear300.c)4
-rw-r--r--arch/arm/mach-spear/spear310.c (renamed from arch/arm/mach-spear3xx/spear310.c)4
-rw-r--r--arch/arm/mach-spear/spear320.c (renamed from arch/arm/mach-spear3xx/spear320.c)7
-rw-r--r--arch/arm/mach-spear/spear3xx.c (renamed from arch/arm/mach-spear3xx/spear3xx.c)17
-rw-r--r--arch/arm/mach-spear/spear6xx.c (renamed from arch/arm/mach-spear6xx/spear6xx.c)25
-rw-r--r--arch/arm/mach-spear/time.c (renamed from arch/arm/plat-spear/time.c)2
-rw-r--r--arch/arm/mach-spear13xx/Kconfig20
-rw-r--r--arch/arm/mach-spear13xx/Makefile10
-rw-r--r--arch/arm/mach-spear13xx/include/mach/debug-macro.S14
-rw-r--r--arch/arm/mach-spear13xx/include/mach/hardware.h1
-rw-r--r--arch/arm/mach-spear13xx/include/mach/irqs.h20
-rw-r--r--arch/arm/mach-spear13xx/include/mach/spear.h54
-rw-r--r--arch/arm/mach-spear13xx/include/mach/timex.h19
-rw-r--r--arch/arm/mach-spear13xx/include/mach/uncompress.h19
-rw-r--r--arch/arm/mach-spear3xx/Kconfig26
-rw-r--r--arch/arm/mach-spear3xx/Makefile15
-rw-r--r--arch/arm/mach-spear3xx/Makefile.boot3
-rw-r--r--arch/arm/mach-spear3xx/include/mach/debug-macro.S14
-rw-r--r--arch/arm/mach-spear3xx/include/mach/generic.h36
-rw-r--r--arch/arm/mach-spear3xx/include/mach/hardware.h1
-rw-r--r--arch/arm/mach-spear3xx/include/mach/irqs.h19
-rw-r--r--arch/arm/mach-spear3xx/include/mach/spear.h60
-rw-r--r--arch/arm/mach-spear3xx/include/mach/timex.h19
-rw-r--r--arch/arm/mach-spear3xx/include/mach/uncompress.h19
-rw-r--r--arch/arm/mach-spear6xx/Kconfig10
-rw-r--r--arch/arm/mach-spear6xx/Makefile6
-rw-r--r--arch/arm/mach-spear6xx/Makefile.boot3
-rw-r--r--arch/arm/mach-spear6xx/include/mach/debug-macro.S14
-rw-r--r--arch/arm/mach-spear6xx/include/mach/generic.h23
-rw-r--r--arch/arm/mach-spear6xx/include/mach/hardware.h1
-rw-r--r--arch/arm/mach-spear6xx/include/mach/misc_regs.h22
-rw-r--r--arch/arm/mach-spear6xx/include/mach/spear.h46
-rw-r--r--arch/arm/mach-spear6xx/include/mach/timex.h19
-rw-r--r--arch/arm/mach-spear6xx/include/mach/uncompress.h19
-rw-r--r--arch/arm/plat-spear/Kconfig47
-rw-r--r--arch/arm/plat-spear/Makefile9
-rw-r--r--drivers/clk/spear/spear1310_clock.c64
-rw-r--r--drivers/clk/spear/spear1340_clock.c63
-rw-r--r--drivers/clk/spear/spear3xx_clock.c60
-rw-r--r--drivers/clk/spear/spear6xx_clock.c31
65 files changed, 430 insertions, 765 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1cacda426a0e..5fa0cc590887 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -933,16 +933,8 @@ config ARCH_NOMADIK
933 help 933 help
934 Support for the Nomadik platform by ST-Ericsson 934 Support for the Nomadik platform by ST-Ericsson
935 935
936config PLAT_SPEAR 936config PLAT_SPEAR_SINGLE
937 bool "ST SPEAr" 937 bool "ST SPEAr"
938 select ARCH_HAS_CPUFREQ
939 select ARCH_REQUIRE_GPIOLIB
940 select ARM_AMBA
941 select CLKDEV_LOOKUP
942 select CLKSRC_MMIO
943 select COMMON_CLK
944 select GENERIC_CLOCKEVENTS
945 select HAVE_CLK
946 help 938 help
947 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). 939 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
948 940
@@ -1104,7 +1096,7 @@ source "arch/arm/plat-samsung/Kconfig"
1104 1096
1105source "arch/arm/mach-socfpga/Kconfig" 1097source "arch/arm/mach-socfpga/Kconfig"
1106 1098
1107source "arch/arm/plat-spear/Kconfig" 1099source "arch/arm/mach-spear/Kconfig"
1108 1100
1109source "arch/arm/mach-s3c24xx/Kconfig" 1101source "arch/arm/mach-s3c24xx/Kconfig"
1110 1102
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index ee4605f400b0..8276536815a8 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -191,9 +191,7 @@ machine-$(CONFIG_ARCH_VT8500) += vt8500
191machine-$(CONFIG_ARCH_W90X900) += w90x900 191machine-$(CONFIG_ARCH_W90X900) += w90x900
192machine-$(CONFIG_FOOTBRIDGE) += footbridge 192machine-$(CONFIG_FOOTBRIDGE) += footbridge
193machine-$(CONFIG_ARCH_SOCFPGA) += socfpga 193machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
194machine-$(CONFIG_ARCH_SPEAR13XX) += spear13xx 194machine-$(CONFIG_PLAT_SPEAR) += spear
195machine-$(CONFIG_ARCH_SPEAR3XX) += spear3xx
196machine-$(CONFIG_MACH_SPEAR600) += spear6xx
197machine-$(CONFIG_ARCH_VIRT) += virt 195machine-$(CONFIG_ARCH_VIRT) += virt
198machine-$(CONFIG_ARCH_ZYNQ) += zynq 196machine-$(CONFIG_ARCH_ZYNQ) += zynq
199machine-$(CONFIG_ARCH_SUNXI) += sunxi 197machine-$(CONFIG_ARCH_SUNXI) += sunxi
@@ -207,7 +205,6 @@ plat-$(CONFIG_PLAT_ORION) += orion
207plat-$(CONFIG_PLAT_PXA) += pxa 205plat-$(CONFIG_PLAT_PXA) += pxa
208plat-$(CONFIG_PLAT_S3C24XX) += samsung 206plat-$(CONFIG_PLAT_S3C24XX) += samsung
209plat-$(CONFIG_PLAT_S5P) += samsung 207plat-$(CONFIG_PLAT_S5P) += samsung
210plat-$(CONFIG_PLAT_SPEAR) += spear
211plat-$(CONFIG_PLAT_VERSATILE) += versatile 208plat-$(CONFIG_PLAT_VERSATILE) += versatile
212 209
213ifeq ($(CONFIG_ARCH_EBSA110),y) 210ifeq ($(CONFIG_ARCH_EBSA110),y)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index e31d442343c8..3bf0c543216a 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -10,6 +10,10 @@ CONFIG_ARCH_SUNXI=y
10# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set 10# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set
11CONFIG_ARCH_ZYNQ=y 11CONFIG_ARCH_ZYNQ=y
12CONFIG_ARM_ERRATA_754322=y 12CONFIG_ARM_ERRATA_754322=y
13CONFIG_PLAT_SPEAR=y
14CONFIG_ARCH_SPEAR13XX=y
15CONFIG_MACH_SPEAR1310=y
16CONFIG_MACH_SPEAR1340=y
13CONFIG_SMP=y 17CONFIG_SMP=y
14CONFIG_ARM_ARCH_TIMER=y 18CONFIG_ARM_ARCH_TIMER=y
15CONFIG_AEABI=y 19CONFIG_AEABI=y
@@ -23,6 +27,7 @@ CONFIG_BLK_DEV_SD=y
23CONFIG_ATA=y 27CONFIG_ATA=y
24CONFIG_SATA_HIGHBANK=y 28CONFIG_SATA_HIGHBANK=y
25CONFIG_SATA_MV=y 29CONFIG_SATA_MV=y
30CONFIG_SATA_AHCI_PLATFORM=y
26CONFIG_NETDEVICES=y 31CONFIG_NETDEVICES=y
27CONFIG_NET_CALXEDA_XGMAC=y 32CONFIG_NET_CALXEDA_XGMAC=y
28CONFIG_SMSC911X=y 33CONFIG_SMSC911X=y
@@ -31,6 +36,7 @@ CONFIG_SERIO_AMBAKMI=y
31CONFIG_SERIAL_8250=y 36CONFIG_SERIAL_8250=y
32CONFIG_SERIAL_8250_CONSOLE=y 37CONFIG_SERIAL_8250_CONSOLE=y
33CONFIG_SERIAL_8250_DW=y 38CONFIG_SERIAL_8250_DW=y
39CONFIG_KEYBOARD_SPEAR=y
34CONFIG_SERIAL_AMBA_PL011=y 40CONFIG_SERIAL_AMBA_PL011=y
35CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 41CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
36CONFIG_SERIAL_OF_PLATFORM=y 42CONFIG_SERIAL_OF_PLATFORM=y
@@ -40,6 +46,7 @@ CONFIG_I2C=y
40CONFIG_I2C_DESIGNWARE_PLATFORM=y 46CONFIG_I2C_DESIGNWARE_PLATFORM=y
41CONFIG_SPI=y 47CONFIG_SPI=y
42CONFIG_SPI_PL022=y 48CONFIG_SPI_PL022=y
49CONFIG_GPIO_PL061=y
43CONFIG_FB=y 50CONFIG_FB=y
44CONFIG_FB_ARMCLCD=y 51CONFIG_FB_ARMCLCD=y
45CONFIG_FRAMEBUFFER_CONSOLE=y 52CONFIG_FRAMEBUFFER_CONSOLE=y
@@ -50,6 +57,7 @@ CONFIG_MMC=y
50CONFIG_MMC_ARMMMCI=y 57CONFIG_MMC_ARMMMCI=y
51CONFIG_MMC_SDHCI=y 58CONFIG_MMC_SDHCI=y
52CONFIG_MMC_SDHCI_PLTFM=y 59CONFIG_MMC_SDHCI_PLTFM=y
60CONFIG_MMC_SDHCI_SPEAR=y
53CONFIG_EDAC=y 61CONFIG_EDAC=y
54CONFIG_EDAC_MM_EDAC=y 62CONFIG_EDAC_MM_EDAC=y
55CONFIG_EDAC_HIGHBANK_MC=y 63CONFIG_EDAC_HIGHBANK_MC=y
@@ -58,3 +66,4 @@ CONFIG_RTC_CLASS=y
58CONFIG_RTC_DRV_PL031=y 66CONFIG_RTC_DRV_PL031=y
59CONFIG_DMADEVICES=y 67CONFIG_DMADEVICES=y
60CONFIG_PL330_DMA=y 68CONFIG_PL330_DMA=y
69CONFIG_DW_DMAC=y
diff --git a/arch/arm/configs/spear3xx_defconfig b/arch/arm/configs/spear3xx_defconfig
index 865980c5f212..7ff23a077f5d 100644
--- a/arch/arm/configs/spear3xx_defconfig
+++ b/arch/arm/configs/spear3xx_defconfig
@@ -6,7 +6,9 @@ CONFIG_MODULES=y
6CONFIG_MODULE_UNLOAD=y 6CONFIG_MODULE_UNLOAD=y
7CONFIG_MODVERSIONS=y 7CONFIG_MODVERSIONS=y
8CONFIG_PARTITION_ADVANCED=y 8CONFIG_PARTITION_ADVANCED=y
9# CONFIG_ARCH_MULTI_V7 is not set
9CONFIG_PLAT_SPEAR=y 10CONFIG_PLAT_SPEAR=y
11CONFIG_ARCH_SPEAR3XX=y
10CONFIG_MACH_SPEAR300=y 12CONFIG_MACH_SPEAR300=y
11CONFIG_MACH_SPEAR310=y 13CONFIG_MACH_SPEAR310=y
12CONFIG_MACH_SPEAR320=y 14CONFIG_MACH_SPEAR320=y
diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig
index a2a1265f86b6..7822980d7d55 100644
--- a/arch/arm/configs/spear6xx_defconfig
+++ b/arch/arm/configs/spear6xx_defconfig
@@ -6,6 +6,7 @@ CONFIG_MODULES=y
6CONFIG_MODULE_UNLOAD=y 6CONFIG_MODULE_UNLOAD=y
7CONFIG_MODVERSIONS=y 7CONFIG_MODVERSIONS=y
8CONFIG_PARTITION_ADVANCED=y 8CONFIG_PARTITION_ADVANCED=y
9# CONFIG_ARCH_MULTI_V7 is not set
9CONFIG_PLAT_SPEAR=y 10CONFIG_PLAT_SPEAR=y
10CONFIG_ARCH_SPEAR6XX=y 11CONFIG_ARCH_SPEAR6XX=y
11CONFIG_BINFMT_MISC=y 12CONFIG_BINFMT_MISC=y
diff --git a/arch/arm/mach-spear/Kconfig b/arch/arm/mach-spear/Kconfig
new file mode 100644
index 000000000000..5412aeb377ac
--- /dev/null
+++ b/arch/arm/mach-spear/Kconfig
@@ -0,0 +1,103 @@
1#
2# SPEAr Platform configuration file
3#
4
5menuconfig PLAT_SPEAR
6 bool "ST SPEAr Family" if ARCH_MULTI_V7 || ARCH_MULTI_V5
7 default PLAT_SPEAR_SINGLE
8 select ARCH_REQUIRE_GPIOLIB
9 select ARM_AMBA
10 select CLKDEV_LOOKUP
11 select CLKSRC_MMIO
12 select COMMON_CLK
13 select GENERIC_CLOCKEVENTS
14 select HAVE_CLK
15
16if PLAT_SPEAR
17
18config ARCH_SPEAR13XX
19 bool "ST SPEAr13xx"
20 depends on ARCH_MULTI_V7 || PLAT_SPEAR_SINGLE
21 select ARCH_HAS_CPUFREQ
22 select ARM_GIC
23 select CPU_V7
24 select GPIO_SPEAR_SPICS
25 select HAVE_SMP
26 select MIGHT_HAVE_CACHE_L2X0
27 select PINCTRL
28 select USE_OF
29 help
30 Supports for ARM's SPEAR13XX family
31
32if ARCH_SPEAR13XX
33
34config MACH_SPEAR1310
35 bool "SPEAr1310 Machine support with Device Tree"
36 select PINCTRL_SPEAR1310
37 help
38 Supports ST SPEAr1310 machine configured via the device-tree
39
40config MACH_SPEAR1340
41 bool "SPEAr1340 Machine support with Device Tree"
42 select PINCTRL_SPEAR1340
43 help
44 Supports ST SPEAr1340 machine configured via the device-tree
45
46endif #ARCH_SPEAR13XX
47
48config ARCH_SPEAR3XX
49 bool "ST SPEAr3xx"
50 depends on ARCH_MULTI_V5 || PLAT_SPEAR_SINGLE
51 depends on !ARCH_SPEAR13XX
52 select ARM_VIC
53 select CPU_ARM926T
54 select PINCTRL
55 select USE_OF
56 help
57 Supports for ARM's SPEAR3XX family
58
59if ARCH_SPEAR3XX
60
61config MACH_SPEAR300
62 bool "SPEAr300 Machine support with Device Tree"
63 select PINCTRL_SPEAR300
64 help
65 Supports ST SPEAr300 machine configured via the device-tree
66
67config MACH_SPEAR310
68 bool "SPEAr310 Machine support with Device Tree"
69 select PINCTRL_SPEAR310
70 help
71 Supports ST SPEAr310 machine configured via the device-tree
72
73config MACH_SPEAR320
74 bool "SPEAr320 Machine support with Device Tree"
75 select PINCTRL_SPEAR320
76 help
77 Supports ST SPEAr320 machine configured via the device-tree
78
79endif
80
81config ARCH_SPEAR6XX
82 bool "ST SPEAr6XX"
83 depends on ARCH_MULTI_V5 || PLAT_SPEAR_SINGLE
84 depends on !ARCH_SPEAR13XX
85 select ARM_VIC
86 select CPU_ARM926T
87 help
88 Supports for ARM's SPEAR6XX family
89
90config MACH_SPEAR600
91 def_bool y
92 depends on ARCH_SPEAR6XX
93 select USE_OF
94 help
95 Supports ST SPEAr600 boards configured via the device-treesource "arch/arm/mach-spear6xx/Kconfig"
96
97config ARCH_SPEAR_AUTO
98 def_bool PLAT_SPEAR_SINGLE
99 depends on !ARCH_SPEAR13XX && !ARCH_SPEAR6XX
100 select ARCH_SPEAR3XX
101
102endif
103
diff --git a/arch/arm/mach-spear/Makefile b/arch/arm/mach-spear/Makefile
new file mode 100644
index 000000000000..dc9ce80508ad
--- /dev/null
+++ b/arch/arm/mach-spear/Makefile
@@ -0,0 +1,24 @@
1#
2# SPEAr Platform specific Makefile
3#
4
5ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
6
7# Common support
8obj-y := restart.o time.o
9
10obj-$(CONFIG_SMP) += headsmp.o platsmp.o
11obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
12
13obj-$(CONFIG_ARCH_SPEAR13XX) += spear13xx.o
14obj-$(CONFIG_MACH_SPEAR1310) += spear1310.o
15obj-$(CONFIG_MACH_SPEAR1340) += spear1340.o
16
17obj-$(CONFIG_ARCH_SPEAR3XX) += spear3xx.o
18obj-$(CONFIG_ARCH_SPEAR3XX) += pl080.o
19obj-$(CONFIG_MACH_SPEAR300) += spear300.o
20obj-$(CONFIG_MACH_SPEAR310) += spear310.o
21obj-$(CONFIG_MACH_SPEAR320) += spear320.o
22
23obj-$(CONFIG_ARCH_SPEAR6XX) += spear6xx.o
24obj-$(CONFIG_ARCH_SPEAR6XX) += pl080.o
diff --git a/arch/arm/mach-spear13xx/Makefile.boot b/arch/arm/mach-spear/Makefile.boot
index 4674a4c221db..4674a4c221db 100644
--- a/arch/arm/mach-spear13xx/Makefile.boot
+++ b/arch/arm/mach-spear/Makefile.boot
diff --git a/arch/arm/mach-spear13xx/include/mach/generic.h b/arch/arm/mach-spear/generic.h
index 633e678e01a3..8ba7e75b648d 100644
--- a/arch/arm/mach-spear13xx/include/mach/generic.h
+++ b/arch/arm/mach-spear/generic.h
@@ -1,9 +1,8 @@
1/* 1/*
2 * arch/arm/mach-spear13xx/include/mach/generic.h 2 * spear machine family generic header file
3 * 3 *
4 * spear13xx machine family generic header file 4 * Copyright (C) 2009-2012 ST Microelectronics
5 * 5 * Rajeev Kumar <rajeev-dlh.kumar@st.com>
6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com> 6 * Viresh Kumar <viresh.linux@gmail.com>
8 * 7 *
9 * This file is licensed under the terms of the GNU General Public 8 * This file is licensed under the terms of the GNU General Public
@@ -15,37 +14,46 @@
15#define __MACH_GENERIC_H 14#define __MACH_GENERIC_H
16 15
17#include <linux/dmaengine.h> 16#include <linux/dmaengine.h>
17#include <linux/amba/pl08x.h>
18#include <linux/init.h>
18#include <asm/mach/time.h> 19#include <asm/mach/time.h>
19 20
20/* Add spear13xx structure declarations here */
21extern void spear13xx_timer_init(void); 21extern void spear13xx_timer_init(void);
22extern void spear3xx_timer_init(void);
22extern struct pl022_ssp_controller pl022_plat_data; 23extern struct pl022_ssp_controller pl022_plat_data;
24extern struct pl08x_platform_data pl080_plat_data;
23extern struct dw_dma_platform_data dmac_plat_data; 25extern struct dw_dma_platform_data dmac_plat_data;
24extern struct dw_dma_slave cf_dma_priv; 26extern struct dw_dma_slave cf_dma_priv;
25extern struct dw_dma_slave nand_read_dma_priv; 27extern struct dw_dma_slave nand_read_dma_priv;
26extern struct dw_dma_slave nand_write_dma_priv; 28extern struct dw_dma_slave nand_write_dma_priv;
29bool dw_dma_filter(struct dma_chan *chan, void *slave);
27 30
28/* Add spear13xx family function declarations here */
29void __init spear_setup_of_timer(void); 31void __init spear_setup_of_timer(void);
32void __init spear3xx_clk_init(void __iomem *misc_base,
33 void __iomem *soc_config_base);
34void __init spear3xx_map_io(void);
35void __init spear3xx_dt_init_irq(void);
36void __init spear6xx_clk_init(void __iomem *misc_base);
30void __init spear13xx_map_io(void); 37void __init spear13xx_map_io(void);
31void __init spear13xx_l2x0_init(void); 38void __init spear13xx_l2x0_init(void);
32bool dw_dma_filter(struct dma_chan *chan, void *slave); 39
33void spear_restart(char, const char *); 40void spear_restart(char, const char *);
41
34void spear13xx_secondary_startup(void); 42void spear13xx_secondary_startup(void);
35void __cpuinit spear13xx_cpu_die(unsigned int cpu); 43void __cpuinit spear13xx_cpu_die(unsigned int cpu);
36 44
37extern struct smp_operations spear13xx_smp_ops; 45extern struct smp_operations spear13xx_smp_ops;
38 46
39#ifdef CONFIG_MACH_SPEAR1310 47#ifdef CONFIG_MACH_SPEAR1310
40void __init spear1310_clk_init(void); 48void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base);
41#else 49#else
42static inline void spear1310_clk_init(void) {} 50static inline void spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base) {}
43#endif 51#endif
44 52
45#ifdef CONFIG_MACH_SPEAR1340 53#ifdef CONFIG_MACH_SPEAR1340
46void __init spear1340_clk_init(void); 54void __init spear1340_clk_init(void __iomem *misc_base);
47#else 55#else
48static inline void spear1340_clk_init(void) {} 56static inline void spear1340_clk_init(void __iomem *misc_base) {}
49#endif 57#endif
50 58
51#endif /* __MACH_GENERIC_H */ 59#endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear13xx/headsmp.S b/arch/arm/mach-spear/headsmp.S
index ed85473a047f..ed85473a047f 100644
--- a/arch/arm/mach-spear13xx/headsmp.S
+++ b/arch/arm/mach-spear/headsmp.S
diff --git a/arch/arm/mach-spear13xx/hotplug.c b/arch/arm/mach-spear/hotplug.c
index a7d2dd11a4f2..a7d2dd11a4f2 100644
--- a/arch/arm/mach-spear13xx/hotplug.c
+++ b/arch/arm/mach-spear/hotplug.c
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/mach-spear/include/mach/debug-macro.S
index 75b05ad0fbad..75b05ad0fbad 100644
--- a/arch/arm/plat-spear/include/plat/debug-macro.S
+++ b/arch/arm/mach-spear/include/mach/debug-macro.S
diff --git a/arch/arm/mach-spear6xx/include/mach/irqs.h b/arch/arm/mach-spear/include/mach/irqs.h
index 37a5c411a866..92da0a8c6bce 100644
--- a/arch/arm/mach-spear6xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear/include/mach/irqs.h
@@ -1,10 +1,9 @@
1/* 1/*
2 * arch/arm/mach-spear6xx/include/mach/irqs.h 2 * IRQ helper macros for spear machine family
3 * 3 *
4 * IRQ helper macros for SPEAr6xx machine family 4 * Copyright (C) 2009-2012 ST Microelectronics
5 * 5 * Rajeev Kumar <rajeev-dlh.kumar@st.com>
6 * Copyright (C) 2009 ST Microelectronics 6 * Viresh Kumar <viresh.linux@gmail.com>
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 * 7 *
9 * This file is licensed under the terms of the GNU General Public 8 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 9 * License version 2. This program is licensed "as is" without any
@@ -14,6 +13,11 @@
14#ifndef __MACH_IRQS_H 13#ifndef __MACH_IRQS_H
15#define __MACH_IRQS_H 14#define __MACH_IRQS_H
16 15
16#ifdef CONFIG_ARCH_SPEAR3XX
17#define NR_IRQS 256
18#endif
19
20#ifdef CONFIG_ARCH_SPEAR6XX
17/* IRQ definitions */ 21/* IRQ definitions */
18/* VIC 1 */ 22/* VIC 1 */
19#define IRQ_VIC_END 64 23#define IRQ_VIC_END 64
@@ -21,5 +25,11 @@
21/* GPIO pins virtual irqs */ 25/* GPIO pins virtual irqs */
22#define VIRTUAL_IRQS 24 26#define VIRTUAL_IRQS 24
23#define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS) 27#define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS)
28#endif
29
30#ifdef CONFIG_ARCH_SPEAR13XX
31#define IRQ_GIC_END 160
32#define NR_IRQS IRQ_GIC_END
33#endif
24 34
25#endif /* __MACH_IRQS_H */ 35#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear/include/mach/misc_regs.h
index 6309bf68d6f8..935639ce59ba 100644
--- a/arch/arm/mach-spear3xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear/include/mach/misc_regs.h
@@ -16,7 +16,7 @@
16 16
17#include <mach/spear.h> 17#include <mach/spear.h>
18 18
19#define MISC_BASE IOMEM(VA_SPEAR3XX_ICM3_MISC_REG_BASE) 19#define MISC_BASE (VA_SPEAR_ICM3_MISC_REG_BASE)
20#define DMA_CHN_CFG (MISC_BASE + 0x0A0) 20#define DMA_CHN_CFG (MISC_BASE + 0x0A0)
21 21
22#endif /* __MACH_MISC_REGS_H */ 22#endif /* __MACH_MISC_REGS_H */
diff --git a/arch/arm/mach-spear/include/mach/spear.h b/arch/arm/mach-spear/include/mach/spear.h
new file mode 100644
index 000000000000..374ddc393df1
--- /dev/null
+++ b/arch/arm/mach-spear/include/mach/spear.h
@@ -0,0 +1,95 @@
1/*
2 * SPEAr3xx/6xx Machine family specific definition
3 *
4 * Copyright (C) 2009,2012 ST Microelectronics
5 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
6 * Viresh Kumar <viresh.linux@gmail.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#ifndef __MACH_SPEAR_H
14#define __MACH_SPEAR_H
15
16#include <asm/memory.h>
17
18#if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX)
19
20/* ICM1 - Low speed connection */
21#define SPEAR_ICM1_2_BASE UL(0xD0000000)
22#define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000)
23#define SPEAR_ICM1_UART_BASE UL(0xD0000000)
24#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE)
25#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
26
27/* ML-1, 2 - Multi Layer CPU Subsystem */
28#define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
29#define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000)
30
31/* ICM3 - Basic Subsystem */
32#define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
33#define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000)
34#define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
35#define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
36#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE)
37#define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000)
38#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE)
39
40/* Debug uart for linux, will be used for debug and uncompress messages */
41#define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE
42#define VA_SPEAR_DBG_UART_BASE VA_SPEAR_ICM1_UART_BASE
43
44/* Sysctl base for spear platform */
45#define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE
46#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE
47#endif /* SPEAR3xx || SPEAR6XX */
48
49/* SPEAr320 Macros */
50#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
51#define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000)
52
53#ifdef CONFIG_ARCH_SPEAR13XX
54
55#define PERIP_GRP2_BASE UL(0xB3000000)
56#define VA_PERIP_GRP2_BASE IOMEM(0xFE000000)
57#define MCIF_SDHCI_BASE UL(0xB3000000)
58#define SYSRAM0_BASE UL(0xB3800000)
59#define VA_SYSRAM0_BASE IOMEM(0xFE800000)
60#define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600)
61
62#define PERIP_GRP1_BASE UL(0xE0000000)
63#define VA_PERIP_GRP1_BASE IOMEM(0xFD000000)
64#define UART_BASE UL(0xE0000000)
65#define VA_UART_BASE IOMEM(0xFD000000)
66#define SSP_BASE UL(0xE0100000)
67#define MISC_BASE UL(0xE0700000)
68#define VA_MISC_BASE IOMEM(0xFD700000)
69
70#define A9SM_AND_MPMC_BASE UL(0xEC000000)
71#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000)
72
73#define SPEAR1310_RAS_BASE UL(0xD8400000)
74#define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000))
75
76/* A9SM peripheral offsets */
77#define A9SM_PERIP_BASE UL(0xEC800000)
78#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000)
79#define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00)
80
81#define L2CC_BASE UL(0xED000000)
82#define VA_L2CC_BASE IOMEM(UL(0xFB000000))
83
84/* others */
85#define DMAC0_BASE UL(0xEA800000)
86#define DMAC1_BASE UL(0xEB000000)
87#define MCIF_CF_BASE UL(0xB2800000)
88
89/* Debug uart for linux, will be used for debug and uncompress messages */
90#define SPEAR_DBG_UART_BASE UART_BASE
91#define VA_SPEAR_DBG_UART_BASE VA_UART_BASE
92
93#endif /* SPEAR13XX */
94
95#endif /* __MACH_SPEAR_H */
diff --git a/arch/arm/plat-spear/include/plat/timex.h b/arch/arm/mach-spear/include/mach/timex.h
index ef95e5b780bd..ef95e5b780bd 100644
--- a/arch/arm/plat-spear/include/plat/timex.h
+++ b/arch/arm/mach-spear/include/mach/timex.h
diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/mach-spear/include/mach/uncompress.h
index 51b2dc93e4da..51b2dc93e4da 100644
--- a/arch/arm/plat-spear/include/plat/uncompress.h
+++ b/arch/arm/mach-spear/include/mach/uncompress.h
diff --git a/arch/arm/plat-spear/pl080.c b/arch/arm/mach-spear/pl080.c
index cfa1199d0f4a..cfa1199d0f4a 100644
--- a/arch/arm/plat-spear/pl080.c
+++ b/arch/arm/mach-spear/pl080.c
diff --git a/arch/arm/plat-spear/include/plat/pl080.h b/arch/arm/mach-spear/pl080.h
index eb6590ded40d..eb6590ded40d 100644
--- a/arch/arm/plat-spear/include/plat/pl080.h
+++ b/arch/arm/mach-spear/pl080.h
diff --git a/arch/arm/mach-spear13xx/platsmp.c b/arch/arm/mach-spear/platsmp.c
index af4ade61cd95..927979e26b4d 100644
--- a/arch/arm/mach-spear13xx/platsmp.c
+++ b/arch/arm/mach-spear/platsmp.c
@@ -19,7 +19,7 @@
19#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
20#include <asm/smp_scu.h> 20#include <asm/smp_scu.h>
21#include <mach/spear.h> 21#include <mach/spear.h>
22#include <mach/generic.h> 22#include "generic.h"
23 23
24static DEFINE_SPINLOCK(boot_lock); 24static DEFINE_SPINLOCK(boot_lock);
25 25
diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/mach-spear/restart.c
index 7d4616d5df11..2b44500bb718 100644
--- a/arch/arm/plat-spear/restart.c
+++ b/arch/arm/mach-spear/restart.c
@@ -14,7 +14,7 @@
14#include <linux/amba/sp810.h> 14#include <linux/amba/sp810.h>
15#include <asm/system_misc.h> 15#include <asm/system_misc.h>
16#include <mach/spear.h> 16#include <mach/spear.h>
17#include <mach/generic.h> 17#include "generic.h"
18 18
19#define SPEAR13XX_SYS_SW_RES (VA_MISC_BASE + 0x204) 19#define SPEAR13XX_SYS_SW_RES (VA_MISC_BASE + 0x204)
20void spear_restart(char mode, const char *cmd) 20void spear_restart(char mode, const char *cmd)
@@ -26,7 +26,8 @@ void spear_restart(char mode, const char *cmd)
26 /* hardware reset, Use on-chip reset capability */ 26 /* hardware reset, Use on-chip reset capability */
27#ifdef CONFIG_ARCH_SPEAR13XX 27#ifdef CONFIG_ARCH_SPEAR13XX
28 writel_relaxed(0x01, SPEAR13XX_SYS_SW_RES); 28 writel_relaxed(0x01, SPEAR13XX_SYS_SW_RES);
29#else 29#endif
30#if defined(CONFIG_ARCH_SPEAR3XX) || defined(CONFIG_ARCH_SPEAR6XX)
30 sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); 31 sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
31#endif 32#endif
32 } 33 }
diff --git a/arch/arm/mach-spear13xx/spear1310.c b/arch/arm/mach-spear/spear1310.c
index 56214d1076ef..ed3b5c287a7b 100644
--- a/arch/arm/mach-spear13xx/spear1310.c
+++ b/arch/arm/mach-spear/spear1310.c
@@ -19,7 +19,7 @@
19#include <linux/pata_arasan_cf_data.h> 19#include <linux/pata_arasan_cf_data.h>
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <asm/mach/map.h> 21#include <asm/mach/map.h>
22#include <mach/generic.h> 22#include "generic.h"
23#include <mach/spear.h> 23#include <mach/spear.h>
24 24
25/* Base addresses */ 25/* Base addresses */
@@ -30,8 +30,6 @@
30 30
31#define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000) 31#define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000)
32#define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000) 32#define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000)
33#define SPEAR1310_RAS_BASE UL(0xD8400000)
34#define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000))
35 33
36static struct arasan_cf_pdata cf_pdata = { 34static struct arasan_cf_pdata cf_pdata = {
37 .cf_if_clk = CF_IF_CLK_166M, 35 .cf_if_clk = CF_IF_CLK_166M,
diff --git a/arch/arm/mach-spear13xx/spear1340.c b/arch/arm/mach-spear/spear1340.c
index 9a28beb2a113..75e38644bbfb 100644
--- a/arch/arm/mach-spear13xx/spear1340.c
+++ b/arch/arm/mach-spear/spear1340.c
@@ -20,10 +20,11 @@
20#include <linux/of_platform.h> 20#include <linux/of_platform.h>
21#include <linux/irqchip.h> 21#include <linux/irqchip.h>
22#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
23#include <mach/dma.h> 23#include "generic.h"
24#include <mach/generic.h>
25#include <mach/spear.h> 24#include <mach/spear.h>
26 25
26#include "spear13xx-dma.h"
27
27/* Base addresses */ 28/* Base addresses */
28#define SPEAR1340_SATA_BASE UL(0xB1000000) 29#define SPEAR1340_SATA_BASE UL(0xB1000000)
29#define SPEAR1340_UART1_BASE UL(0xB4100000) 30#define SPEAR1340_UART1_BASE UL(0xB4100000)
diff --git a/arch/arm/mach-spear13xx/include/mach/dma.h b/arch/arm/mach-spear/spear13xx-dma.h
index d50bdb605925..d50bdb605925 100644
--- a/arch/arm/mach-spear13xx/include/mach/dma.h
+++ b/arch/arm/mach-spear/spear13xx-dma.h
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear/spear13xx.c
index c7d2b4a8d8cc..1b97e8623472 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear/spear13xx.c
@@ -21,10 +21,11 @@
21#include <asm/hardware/cache-l2x0.h> 21#include <asm/hardware/cache-l2x0.h>
22#include <asm/mach/map.h> 22#include <asm/mach/map.h>
23#include <asm/smp_twd.h> 23#include <asm/smp_twd.h>
24#include <mach/dma.h> 24#include "generic.h"
25#include <mach/generic.h>
26#include <mach/spear.h> 25#include <mach/spear.h>
27 26
27#include "spear13xx-dma.h"
28
28/* common dw_dma filter routine to be used by peripherals */ 29/* common dw_dma filter routine to be used by peripherals */
29bool dw_dma_filter(struct dma_chan *chan, void *slave) 30bool dw_dma_filter(struct dma_chan *chan, void *slave)
30{ 31{
@@ -145,9 +146,9 @@ void __init spear13xx_map_io(void)
145static void __init spear13xx_clk_init(void) 146static void __init spear13xx_clk_init(void)
146{ 147{
147 if (of_machine_is_compatible("st,spear1310")) 148 if (of_machine_is_compatible("st,spear1310"))
148 spear1310_clk_init(); 149 spear1310_clk_init(VA_MISC_BASE, VA_SPEAR1310_RAS_BASE);
149 else if (of_machine_is_compatible("st,spear1340")) 150 else if (of_machine_is_compatible("st,spear1340"))
150 spear1340_clk_init(); 151 spear1340_clk_init(VA_MISC_BASE);
151 else 152 else
152 pr_err("%s: Unknown machine\n", __func__); 153 pr_err("%s: Unknown machine\n", __func__);
153} 154}
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear/spear300.c
index bbc9b7e9c62c..bac56e845f7a 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear/spear300.c
@@ -17,7 +17,7 @@
17#include <linux/irqchip.h> 17#include <linux/irqchip.h>
18#include <linux/of_platform.h> 18#include <linux/of_platform.h>
19#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
20#include <mach/generic.h> 20#include "generic.h"
21#include <mach/spear.h> 21#include <mach/spear.h>
22 22
23/* DMAC platform data's slave info */ 23/* DMAC platform data's slave info */
@@ -185,7 +185,7 @@ struct pl08x_channel_data spear300_dma_info[] = {
185static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = { 185static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
186 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, 186 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
187 &pl022_plat_data), 187 &pl022_plat_data),
188 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, 188 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
189 &pl080_plat_data), 189 &pl080_plat_data),
190 {} 190 {}
191}; 191};
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear/spear310.c
index c13a434a8195..6ffbc63d516d 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear/spear310.c
@@ -18,7 +18,7 @@
18#include <linux/irqchip.h> 18#include <linux/irqchip.h>
19#include <linux/of_platform.h> 19#include <linux/of_platform.h>
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <mach/generic.h> 21#include "generic.h"
22#include <mach/spear.h> 22#include <mach/spear.h>
23 23
24#define SPEAR310_UART1_BASE UL(0xB2000000) 24#define SPEAR310_UART1_BASE UL(0xB2000000)
@@ -217,7 +217,7 @@ static struct amba_pl011_data spear310_uart_data[] = {
217static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = { 217static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = {
218 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, 218 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
219 &pl022_plat_data), 219 &pl022_plat_data),
220 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, 220 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
221 &pl080_plat_data), 221 &pl080_plat_data),
222 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL, 222 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL,
223 &spear310_uart_data[0]), 223 &spear310_uart_data[0]),
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear/spear320.c
index e1c77079a3e5..6eb3eec65f96 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear/spear320.c
@@ -19,7 +19,8 @@
19#include <linux/irqchip.h> 19#include <linux/irqchip.h>
20#include <linux/of_platform.h> 20#include <linux/of_platform.h>
21#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
22#include <mach/generic.h> 22#include <asm/mach/map.h>
23#include "generic.h"
23#include <mach/spear.h> 24#include <mach/spear.h>
24 25
25#define SPEAR320_UART1_BASE UL(0xA3000000) 26#define SPEAR320_UART1_BASE UL(0xA3000000)
@@ -222,7 +223,7 @@ static struct amba_pl011_data spear320_uart_data[] = {
222static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = { 223static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = {
223 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, 224 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
224 &pl022_plat_data), 225 &pl022_plat_data),
225 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, 226 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
226 &pl080_plat_data), 227 &pl080_plat_data),
227 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL, 228 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL,
228 &spear320_ssp_data[0]), 229 &spear320_ssp_data[0]),
@@ -253,7 +254,7 @@ static const char * const spear320_dt_board_compat[] = {
253 254
254struct map_desc spear320_io_desc[] __initdata = { 255struct map_desc spear320_io_desc[] __initdata = {
255 { 256 {
256 .virtual = VA_SPEAR320_SOC_CONFIG_BASE, 257 .virtual = (unsigned long)VA_SPEAR320_SOC_CONFIG_BASE,
257 .pfn = __phys_to_pfn(SPEAR320_SOC_CONFIG_BASE), 258 .pfn = __phys_to_pfn(SPEAR320_SOC_CONFIG_BASE),
258 .length = SZ_16M, 259 .length = SZ_16M,
259 .type = MT_DEVICE 260 .type = MT_DEVICE
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear/spear3xx.c
index d2b3937c4014..0227c97797cd 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear/spear3xx.c
@@ -15,10 +15,13 @@
15 15
16#include <linux/amba/pl022.h> 16#include <linux/amba/pl022.h>
17#include <linux/amba/pl080.h> 17#include <linux/amba/pl080.h>
18#include <linux/clk.h>
18#include <linux/io.h> 19#include <linux/io.h>
19#include <plat/pl080.h> 20#include <asm/mach/map.h>
20#include <mach/generic.h> 21#include "pl080.h"
22#include "generic.h"
21#include <mach/spear.h> 23#include <mach/spear.h>
24#include <mach/misc_regs.h>
22 25
23/* ssp device registration */ 26/* ssp device registration */
24struct pl022_ssp_controller pl022_plat_data = { 27struct pl022_ssp_controller pl022_plat_data = {
@@ -65,13 +68,13 @@ struct pl08x_platform_data pl080_plat_data = {
65 */ 68 */
66struct map_desc spear3xx_io_desc[] __initdata = { 69struct map_desc spear3xx_io_desc[] __initdata = {
67 { 70 {
68 .virtual = VA_SPEAR3XX_ICM1_2_BASE, 71 .virtual = (unsigned long)VA_SPEAR_ICM1_2_BASE,
69 .pfn = __phys_to_pfn(SPEAR3XX_ICM1_2_BASE), 72 .pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE),
70 .length = SZ_16M, 73 .length = SZ_16M,
71 .type = MT_DEVICE 74 .type = MT_DEVICE
72 }, { 75 }, {
73 .virtual = VA_SPEAR3XX_ICM3_SMI_CTRL_BASE, 76 .virtual = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE,
74 .pfn = __phys_to_pfn(SPEAR3XX_ICM3_SMI_CTRL_BASE), 77 .pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
75 .length = SZ_16M, 78 .length = SZ_16M,
76 .type = MT_DEVICE 79 .type = MT_DEVICE
77 }, 80 },
@@ -88,7 +91,7 @@ void __init spear3xx_timer_init(void)
88 char pclk_name[] = "pll3_clk"; 91 char pclk_name[] = "pll3_clk";
89 struct clk *gpt_clk, *pclk; 92 struct clk *gpt_clk, *pclk;
90 93
91 spear3xx_clk_init(); 94 spear3xx_clk_init(MISC_BASE, VA_SPEAR320_SOC_CONFIG_BASE);
92 95
93 /* get the system timer clock */ 96 /* get the system timer clock */
94 gpt_clk = clk_get_sys("gpt0", NULL); 97 gpt_clk = clk_get_sys("gpt0", NULL);
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear/spear6xx.c
index 8904d8a52d84..ec8eefbbdfad 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear/spear6xx.c
@@ -24,9 +24,10 @@
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27#include <plat/pl080.h> 27#include "pl080.h"
28#include <mach/generic.h> 28#include "generic.h"
29#include <mach/spear.h> 29#include <mach/spear.h>
30#include <mach/misc_regs.h>
30 31
31/* dmac device registration */ 32/* dmac device registration */
32static struct pl08x_channel_data spear600_dma_info[] = { 33static struct pl08x_channel_data spear600_dma_info[] = {
@@ -321,7 +322,7 @@ static struct pl08x_channel_data spear600_dma_info[] = {
321 }, 322 },
322}; 323};
323 324
324struct pl08x_platform_data pl080_plat_data = { 325static struct pl08x_platform_data spear6xx_pl080_plat_data = {
325 .memcpy_channel = { 326 .memcpy_channel = {
326 .bus_id = "memcpy", 327 .bus_id = "memcpy",
327 .cctl_memcpy = 328 .cctl_memcpy =
@@ -350,18 +351,18 @@ struct pl08x_platform_data pl080_plat_data = {
350 */ 351 */
351struct map_desc spear6xx_io_desc[] __initdata = { 352struct map_desc spear6xx_io_desc[] __initdata = {
352 { 353 {
353 .virtual = VA_SPEAR6XX_ML_CPU_BASE, 354 .virtual = (unsigned long)VA_SPEAR6XX_ML_CPU_BASE,
354 .pfn = __phys_to_pfn(SPEAR6XX_ML_CPU_BASE), 355 .pfn = __phys_to_pfn(SPEAR_ICM3_ML1_2_BASE),
355 .length = 2 * SZ_16M, 356 .length = 2 * SZ_16M,
356 .type = MT_DEVICE 357 .type = MT_DEVICE
357 }, { 358 }, {
358 .virtual = VA_SPEAR6XX_ICM1_BASE, 359 .virtual = (unsigned long)VA_SPEAR_ICM1_2_BASE,
359 .pfn = __phys_to_pfn(SPEAR6XX_ICM1_BASE), 360 .pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE),
360 .length = SZ_16M, 361 .length = SZ_16M,
361 .type = MT_DEVICE 362 .type = MT_DEVICE
362 }, { 363 }, {
363 .virtual = VA_SPEAR6XX_ICM3_SMI_CTRL_BASE, 364 .virtual = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE,
364 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SMI_CTRL_BASE), 365 .pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
365 .length = SZ_16M, 366 .length = SZ_16M,
366 .type = MT_DEVICE 367 .type = MT_DEVICE
367 }, 368 },
@@ -378,7 +379,7 @@ void __init spear6xx_timer_init(void)
378 char pclk_name[] = "pll3_clk"; 379 char pclk_name[] = "pll3_clk";
379 struct clk *gpt_clk, *pclk; 380 struct clk *gpt_clk, *pclk;
380 381
381 spear6xx_clk_init(); 382 spear6xx_clk_init(MISC_BASE);
382 383
383 /* get the system timer clock */ 384 /* get the system timer clock */
384 gpt_clk = clk_get_sys("gpt0", NULL); 385 gpt_clk = clk_get_sys("gpt0", NULL);
@@ -404,8 +405,8 @@ void __init spear6xx_timer_init(void)
404 405
405/* Add auxdata to pass platform data */ 406/* Add auxdata to pass platform data */
406struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = { 407struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = {
407 OF_DEV_AUXDATA("arm,pl080", SPEAR6XX_ICM3_DMA_BASE, NULL, 408 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
408 &pl080_plat_data), 409 &spear6xx_pl080_plat_data),
409 {} 410 {}
410}; 411};
411 412
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/mach-spear/time.c
index bd5c53cd6962..d449673e40f7 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/mach-spear/time.c
@@ -23,7 +23,7 @@
23#include <linux/time.h> 23#include <linux/time.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
26#include <mach/generic.h> 26#include "generic.h"
27 27
28/* 28/*
29 * We would use TIMER0 and TIMER1 as clockevent and clocksource. 29 * We would use TIMER0 and TIMER1 as clockevent and clocksource.
diff --git a/arch/arm/mach-spear13xx/Kconfig b/arch/arm/mach-spear13xx/Kconfig
deleted file mode 100644
index eaadc66d96b3..000000000000
--- a/arch/arm/mach-spear13xx/Kconfig
+++ /dev/null
@@ -1,20 +0,0 @@
1#
2# SPEAr13XX Machine configuration file
3#
4
5if ARCH_SPEAR13XX
6
7menu "SPEAr13xx Implementations"
8config MACH_SPEAR1310
9 bool "SPEAr1310 Machine support with Device Tree"
10 select PINCTRL_SPEAR1310
11 help
12 Supports ST SPEAr1310 machine configured via the device-tree
13
14config MACH_SPEAR1340
15 bool "SPEAr1340 Machine support with Device Tree"
16 select PINCTRL_SPEAR1340
17 help
18 Supports ST SPEAr1340 machine configured via the device-tree
19endmenu
20endif #ARCH_SPEAR13XX
diff --git a/arch/arm/mach-spear13xx/Makefile b/arch/arm/mach-spear13xx/Makefile
deleted file mode 100644
index 3435ea78c15d..000000000000
--- a/arch/arm/mach-spear13xx/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
1#
2# Makefile for SPEAr13XX machine series
3#
4
5obj-$(CONFIG_SMP) += headsmp.o platsmp.o
6obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
7
8obj-$(CONFIG_ARCH_SPEAR13XX) += spear13xx.o
9obj-$(CONFIG_MACH_SPEAR1310) += spear1310.o
10obj-$(CONFIG_MACH_SPEAR1340) += spear1340.o
diff --git a/arch/arm/mach-spear13xx/include/mach/debug-macro.S b/arch/arm/mach-spear13xx/include/mach/debug-macro.S
deleted file mode 100644
index 9e3ae6bfe50d..000000000000
--- a/arch/arm/mach-spear13xx/include/mach/debug-macro.S
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * arch/arm/mach-spear13xx/include/mach/debug-macro.S
3 *
4 * Debugging macro include header spear13xx machine family
5 *
6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-spear13xx/include/mach/hardware.h b/arch/arm/mach-spear13xx/include/mach/hardware.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-spear13xx/include/mach/hardware.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/arm/mach-spear13xx/include/mach/irqs.h b/arch/arm/mach-spear13xx/include/mach/irqs.h
deleted file mode 100644
index 271a62b4cd31..000000000000
--- a/arch/arm/mach-spear13xx/include/mach/irqs.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-spear13xx/include/mach/irqs.h
3 *
4 * IRQ helper macros for spear13xx machine family
5 *
6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_IRQS_H
15#define __MACH_IRQS_H
16
17#define IRQ_GIC_END 160
18#define NR_IRQS IRQ_GIC_END
19
20#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-spear13xx/include/mach/spear.h b/arch/arm/mach-spear13xx/include/mach/spear.h
deleted file mode 100644
index 7cfa6818865a..000000000000
--- a/arch/arm/mach-spear13xx/include/mach/spear.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * arch/arm/mach-spear13xx/include/mach/spear.h
3 *
4 * spear13xx Machine family specific definition
5 *
6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_SPEAR13XX_H
15#define __MACH_SPEAR13XX_H
16
17#include <asm/memory.h>
18
19#define PERIP_GRP2_BASE UL(0xB3000000)
20#define VA_PERIP_GRP2_BASE IOMEM(0xFE000000)
21#define MCIF_SDHCI_BASE UL(0xB3000000)
22#define SYSRAM0_BASE UL(0xB3800000)
23#define VA_SYSRAM0_BASE IOMEM(0xFE800000)
24#define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600)
25
26#define PERIP_GRP1_BASE UL(0xE0000000)
27#define VA_PERIP_GRP1_BASE IOMEM(0xFD000000)
28#define UART_BASE UL(0xE0000000)
29#define VA_UART_BASE IOMEM(0xFD000000)
30#define SSP_BASE UL(0xE0100000)
31#define MISC_BASE UL(0xE0700000)
32#define VA_MISC_BASE IOMEM(0xFD700000)
33
34#define A9SM_AND_MPMC_BASE UL(0xEC000000)
35#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000)
36
37/* A9SM peripheral offsets */
38#define A9SM_PERIP_BASE UL(0xEC800000)
39#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000)
40#define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00)
41
42#define L2CC_BASE UL(0xED000000)
43#define VA_L2CC_BASE IOMEM(UL(0xFB000000))
44
45/* others */
46#define DMAC0_BASE UL(0xEA800000)
47#define DMAC1_BASE UL(0xEB000000)
48#define MCIF_CF_BASE UL(0xB2800000)
49
50/* Debug uart for linux, will be used for debug and uncompress messages */
51#define SPEAR_DBG_UART_BASE UART_BASE
52#define VA_SPEAR_DBG_UART_BASE VA_UART_BASE
53
54#endif /* __MACH_SPEAR13XX_H */
diff --git a/arch/arm/mach-spear13xx/include/mach/timex.h b/arch/arm/mach-spear13xx/include/mach/timex.h
deleted file mode 100644
index 3a58b8284a6a..000000000000
--- a/arch/arm/mach-spear13xx/include/mach/timex.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/timex.h
3 *
4 * SPEAr3XX machine family specific timex definitions
5 *
6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_TIMEX_H
15#define __MACH_TIMEX_H
16
17#include <plat/timex.h>
18
19#endif /* __MACH_TIMEX_H */
diff --git a/arch/arm/mach-spear13xx/include/mach/uncompress.h b/arch/arm/mach-spear13xx/include/mach/uncompress.h
deleted file mode 100644
index 70fe72f05dea..000000000000
--- a/arch/arm/mach-spear13xx/include/mach/uncompress.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear13xx/include/mach/uncompress.h
3 *
4 * Serial port stubs for kernel decompress status messages
5 *
6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_UNCOMPRESS_H
15#define __MACH_UNCOMPRESS_H
16
17#include <plat/uncompress.h>
18
19#endif /* __MACH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-spear3xx/Kconfig b/arch/arm/mach-spear3xx/Kconfig
deleted file mode 100644
index 8bd37291fa4f..000000000000
--- a/arch/arm/mach-spear3xx/Kconfig
+++ /dev/null
@@ -1,26 +0,0 @@
1#
2# SPEAr3XX Machine configuration file
3#
4
5if ARCH_SPEAR3XX
6
7menu "SPEAr3xx Implementations"
8config MACH_SPEAR300
9 bool "SPEAr300 Machine support with Device Tree"
10 select PINCTRL_SPEAR300
11 help
12 Supports ST SPEAr300 machine configured via the device-tree
13
14config MACH_SPEAR310
15 bool "SPEAr310 Machine support with Device Tree"
16 select PINCTRL_SPEAR310
17 help
18 Supports ST SPEAr310 machine configured via the device-tree
19
20config MACH_SPEAR320
21 bool "SPEAr320 Machine support with Device Tree"
22 select PINCTRL_SPEAR320
23 help
24 Supports ST SPEAr320 machine configured via the device-tree
25endmenu
26endif #ARCH_SPEAR3XX
diff --git a/arch/arm/mach-spear3xx/Makefile b/arch/arm/mach-spear3xx/Makefile
deleted file mode 100644
index 8d12faa178fd..000000000000
--- a/arch/arm/mach-spear3xx/Makefile
+++ /dev/null
@@ -1,15 +0,0 @@
1#
2# Makefile for SPEAr3XX machine series
3#
4
5# common files
6obj-$(CONFIG_ARCH_SPEAR3XX) += spear3xx.o
7
8# spear300 specific files
9obj-$(CONFIG_MACH_SPEAR300) += spear300.o
10
11# spear310 specific files
12obj-$(CONFIG_MACH_SPEAR310) += spear310.o
13
14# spear320 specific files
15obj-$(CONFIG_MACH_SPEAR320) += spear320.o
diff --git a/arch/arm/mach-spear3xx/Makefile.boot b/arch/arm/mach-spear3xx/Makefile.boot
deleted file mode 100644
index 4674a4c221db..000000000000
--- a/arch/arm/mach-spear3xx/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
1zreladdr-y += 0x00008000
2params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000
diff --git a/arch/arm/mach-spear3xx/include/mach/debug-macro.S b/arch/arm/mach-spear3xx/include/mach/debug-macro.S
deleted file mode 100644
index 0a6381fad5d9..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/debug-macro.S
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/debug-macro.S
3 *
4 * Debugging macro include header spear3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
deleted file mode 100644
index df310799e416..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/generic.h
3 *
4 * SPEAr3XX machine family generic header file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_GENERIC_H
15#define __MACH_GENERIC_H
16
17#include <linux/amba/pl08x.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/amba/bus.h>
21#include <asm/mach/time.h>
22#include <asm/mach/map.h>
23
24/* Add spear3xx family device structure declarations here */
25extern void spear3xx_timer_init(void);
26extern struct pl022_ssp_controller pl022_plat_data;
27extern struct pl08x_platform_data pl080_plat_data;
28
29/* Add spear3xx family function declarations here */
30void __init spear_setup_of_timer(void);
31void __init spear3xx_clk_init(void);
32void __init spear3xx_map_io(void);
33
34void spear_restart(char, const char *);
35
36#endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/hardware.h b/arch/arm/mach-spear3xx/include/mach/hardware.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/hardware.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h
deleted file mode 100644
index f95e5b2b6686..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/irqs.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/irqs.h
3 *
4 * IRQ helper macros for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_IRQS_H
15#define __MACH_IRQS_H
16
17#define NR_IRQS 256
18
19#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h
deleted file mode 100644
index 8cca95193d4d..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/spear.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/spear.h
3 *
4 * SPEAr3xx Machine family specific definition
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_SPEAR3XX_H
15#define __MACH_SPEAR3XX_H
16
17#include <asm/memory.h>
18
19/* ICM1 - Low speed connection */
20#define SPEAR3XX_ICM1_2_BASE UL(0xD0000000)
21#define VA_SPEAR3XX_ICM1_2_BASE UL(0xFD000000)
22#define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000)
23#define VA_SPEAR3XX_ICM1_UART_BASE (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE)
24#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
25
26/* ML1 - Multi Layer CPU Subsystem */
27#define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000)
28#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
29
30/* ICM3 - Basic Subsystem */
31#define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
32#define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
33#define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000)
34#define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
35#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE)
36#define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
37#define VA_SPEAR3XX_ICM3_MISC_REG_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE)
38
39/* Debug uart for linux, will be used for debug and uncompress messages */
40#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE
41#define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE
42
43/* Sysctl base for spear platform */
44#define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE
45#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
46
47/* SPEAr320 Macros */
48#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
49#define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000)
50#define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE)
51#define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018)
52 #define SPEAR320_UARTX_PCLK_MASK 0x1
53 #define SPEAR320_UART2_PCLK_SHIFT 8
54 #define SPEAR320_UART3_PCLK_SHIFT 9
55 #define SPEAR320_UART4_PCLK_SHIFT 10
56 #define SPEAR320_UART5_PCLK_SHIFT 11
57 #define SPEAR320_UART6_PCLK_SHIFT 12
58 #define SPEAR320_RS485_PCLK_SHIFT 13
59
60#endif /* __MACH_SPEAR3XX_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/timex.h b/arch/arm/mach-spear3xx/include/mach/timex.h
deleted file mode 100644
index 9f5d08bd0c44..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/timex.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/timex.h
3 *
4 * SPEAr3XX machine family specific timex definitions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_TIMEX_H
15#define __MACH_TIMEX_H
16
17#include <plat/timex.h>
18
19#endif /* __MACH_TIMEX_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/uncompress.h b/arch/arm/mach-spear3xx/include/mach/uncompress.h
deleted file mode 100644
index b909b011f7c8..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/uncompress.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/uncompress.h
3 *
4 * Serial port stubs for kernel decompress status messages
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_UNCOMPRESS_H
15#define __MACH_UNCOMPRESS_H
16
17#include <plat/uncompress.h>
18
19#endif /* __MACH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-spear6xx/Kconfig b/arch/arm/mach-spear6xx/Kconfig
deleted file mode 100644
index 339f397dea70..000000000000
--- a/arch/arm/mach-spear6xx/Kconfig
+++ /dev/null
@@ -1,10 +0,0 @@
1#
2# SPEAr6XX Machine configuration file
3#
4
5config MACH_SPEAR600
6 def_bool y
7 depends on ARCH_SPEAR6XX
8 select USE_OF
9 help
10 Supports ST SPEAr600 boards configured via the device-tree
diff --git a/arch/arm/mach-spear6xx/Makefile b/arch/arm/mach-spear6xx/Makefile
deleted file mode 100644
index 898831d93f37..000000000000
--- a/arch/arm/mach-spear6xx/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for SPEAr6XX machine series
3#
4
5# common files
6obj-y += spear6xx.o
diff --git a/arch/arm/mach-spear6xx/Makefile.boot b/arch/arm/mach-spear6xx/Makefile.boot
deleted file mode 100644
index 4674a4c221db..000000000000
--- a/arch/arm/mach-spear6xx/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
1zreladdr-y += 0x00008000
2params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000
diff --git a/arch/arm/mach-spear6xx/include/mach/debug-macro.S b/arch/arm/mach-spear6xx/include/mach/debug-macro.S
deleted file mode 100644
index 0f3ea39edd96..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/debug-macro.S
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/debug-macro.S
3 *
4 * Debugging macro include header for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h
deleted file mode 100644
index 65514b159370..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/generic.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/generic.h
3 *
4 * SPEAr6XX machine family specific generic header file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_GENERIC_H
15#define __MACH_GENERIC_H
16
17#include <linux/init.h>
18
19void __init spear_setup_of_timer(void);
20void spear_restart(char, const char *);
21void __init spear6xx_clk_init(void);
22
23#endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/hardware.h b/arch/arm/mach-spear6xx/include/mach/hardware.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/hardware.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
deleted file mode 100644
index c34acc201d34..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/misc_regs.h
3 *
4 * Miscellaneous registers definitions for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_MISC_REGS_H
15#define __MACH_MISC_REGS_H
16
17#include <mach/spear.h>
18
19#define MISC_BASE IOMEM(VA_SPEAR6XX_ICM3_MISC_REG_BASE)
20#define DMA_CHN_CFG (MISC_BASE + 0x0A0)
21
22#endif /* __MACH_MISC_REGS_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h
deleted file mode 100644
index cb8ed2f4dc85..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/spear.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/spear.h
3 *
4 * SPEAr6xx Machine family specific definition
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_SPEAR6XX_H
15#define __MACH_SPEAR6XX_H
16
17#include <asm/memory.h>
18
19/* ICM1 - Low speed connection */
20#define SPEAR6XX_ICM1_BASE UL(0xD0000000)
21#define VA_SPEAR6XX_ICM1_BASE UL(0xFD000000)
22#define SPEAR6XX_ICM1_UART0_BASE UL(0xD0000000)
23#define VA_SPEAR6XX_ICM1_UART0_BASE (VA_SPEAR6XX_ICM1_2_BASE | SPEAR6XX_ICM1_UART0_BASE)
24
25/* ML-1, 2 - Multi Layer CPU Subsystem */
26#define SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
27#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
28
29/* ICM3 - Basic Subsystem */
30#define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
31#define VA_SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
32#define SPEAR6XX_ICM3_DMA_BASE UL(0xFC400000)
33#define SPEAR6XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
34#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_SYS_CTRL_BASE)
35#define SPEAR6XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
36#define VA_SPEAR6XX_ICM3_MISC_REG_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_MISC_REG_BASE)
37
38/* Debug uart for linux, will be used for debug and uncompress messages */
39#define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE
40#define VA_SPEAR_DBG_UART_BASE VA_SPEAR6XX_ICM1_UART0_BASE
41
42/* Sysctl base for spear platform */
43#define SPEAR_SYS_CTRL_BASE SPEAR6XX_ICM3_SYS_CTRL_BASE
44#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR6XX_ICM3_SYS_CTRL_BASE
45
46#endif /* __MACH_SPEAR6XX_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/timex.h b/arch/arm/mach-spear6xx/include/mach/timex.h
deleted file mode 100644
index ac1c5b005695..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/timex.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/timex.h
3 *
4 * SPEAr6XX machine family specific timex definitions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_TIMEX_H
15#define __MACH_TIMEX_H
16
17#include <plat/timex.h>
18
19#endif /* __MACH_TIMEX_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/uncompress.h b/arch/arm/mach-spear6xx/include/mach/uncompress.h
deleted file mode 100644
index 77f0765e21e1..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/uncompress.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/uncompress.h
3 *
4 * Serial port stubs for kernel decompress status messages
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_UNCOMPRESS_H
15#define __MACH_UNCOMPRESS_H
16
17#include <plat/uncompress.h>
18
19#endif /* __MACH_UNCOMPRESS_H */
diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig
deleted file mode 100644
index 8a08c31b5e20..000000000000
--- a/arch/arm/plat-spear/Kconfig
+++ /dev/null
@@ -1,47 +0,0 @@
1#
2# SPEAr Platform configuration file
3#
4
5if PLAT_SPEAR
6
7choice
8 prompt "ST SPEAr Family"
9 default ARCH_SPEAR3XX
10
11config ARCH_SPEAR13XX
12 bool "ST SPEAr13xx with Device Tree"
13 select ARCH_HAS_CPUFREQ
14 select ARM_GIC
15 select CPU_V7
16 select GPIO_SPEAR_SPICS
17 select HAVE_SMP
18 select MIGHT_HAVE_CACHE_L2X0
19 select PINCTRL
20 select USE_OF
21 help
22 Supports for ARM's SPEAR13XX family
23
24config ARCH_SPEAR3XX
25 bool "ST SPEAr3xx with Device Tree"
26 select ARM_VIC
27 select CPU_ARM926T
28 select PINCTRL
29 select USE_OF
30 help
31 Supports for ARM's SPEAR3XX family
32
33config ARCH_SPEAR6XX
34 bool "SPEAr6XX"
35 select ARM_VIC
36 select CPU_ARM926T
37 help
38 Supports for ARM's SPEAR6XX family
39
40endchoice
41
42# Adding SPEAr machine specific configuration files
43source "arch/arm/mach-spear13xx/Kconfig"
44source "arch/arm/mach-spear3xx/Kconfig"
45source "arch/arm/mach-spear6xx/Kconfig"
46
47endif
diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile
deleted file mode 100644
index 01e88532a5db..000000000000
--- a/arch/arm/plat-spear/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1#
2# SPEAr Platform specific Makefile
3#
4
5# Common support
6obj-y := restart.o time.o
7
8obj-$(CONFIG_ARCH_SPEAR3XX) += pl080.o
9obj-$(CONFIG_ARCH_SPEAR6XX) += pl080.o
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index ed9af4278619..aedbbe12f321 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -17,12 +17,10 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/of_platform.h> 18#include <linux/of_platform.h>
19#include <linux/spinlock_types.h> 19#include <linux/spinlock_types.h>
20#include <mach/spear.h>
21#include "clk.h" 20#include "clk.h"
22 21
23#define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000))
24/* PLL related registers and bit values */ 22/* PLL related registers and bit values */
25#define SPEAR1310_PLL_CFG (VA_MISC_BASE + 0x210) 23#define SPEAR1310_PLL_CFG (misc_base + 0x210)
26 /* PLL_CFG bit values */ 24 /* PLL_CFG bit values */
27 #define SPEAR1310_CLCD_SYNT_CLK_MASK 1 25 #define SPEAR1310_CLCD_SYNT_CLK_MASK 1
28 #define SPEAR1310_CLCD_SYNT_CLK_SHIFT 31 26 #define SPEAR1310_CLCD_SYNT_CLK_SHIFT 31
@@ -35,15 +33,15 @@
35 #define SPEAR1310_PLL2_CLK_SHIFT 22 33 #define SPEAR1310_PLL2_CLK_SHIFT 22
36 #define SPEAR1310_PLL1_CLK_SHIFT 20 34 #define SPEAR1310_PLL1_CLK_SHIFT 20
37 35
38#define SPEAR1310_PLL1_CTR (VA_MISC_BASE + 0x214) 36#define SPEAR1310_PLL1_CTR (misc_base + 0x214)
39#define SPEAR1310_PLL1_FRQ (VA_MISC_BASE + 0x218) 37#define SPEAR1310_PLL1_FRQ (misc_base + 0x218)
40#define SPEAR1310_PLL2_CTR (VA_MISC_BASE + 0x220) 38#define SPEAR1310_PLL2_CTR (misc_base + 0x220)
41#define SPEAR1310_PLL2_FRQ (VA_MISC_BASE + 0x224) 39#define SPEAR1310_PLL2_FRQ (misc_base + 0x224)
42#define SPEAR1310_PLL3_CTR (VA_MISC_BASE + 0x22C) 40#define SPEAR1310_PLL3_CTR (misc_base + 0x22C)
43#define SPEAR1310_PLL3_FRQ (VA_MISC_BASE + 0x230) 41#define SPEAR1310_PLL3_FRQ (misc_base + 0x230)
44#define SPEAR1310_PLL4_CTR (VA_MISC_BASE + 0x238) 42#define SPEAR1310_PLL4_CTR (misc_base + 0x238)
45#define SPEAR1310_PLL4_FRQ (VA_MISC_BASE + 0x23C) 43#define SPEAR1310_PLL4_FRQ (misc_base + 0x23C)
46#define SPEAR1310_PERIP_CLK_CFG (VA_MISC_BASE + 0x244) 44#define SPEAR1310_PERIP_CLK_CFG (misc_base + 0x244)
47 /* PERIP_CLK_CFG bit values */ 45 /* PERIP_CLK_CFG bit values */
48 #define SPEAR1310_GPT_OSC24_VAL 0 46 #define SPEAR1310_GPT_OSC24_VAL 0
49 #define SPEAR1310_GPT_APB_VAL 1 47 #define SPEAR1310_GPT_APB_VAL 1
@@ -65,7 +63,7 @@
65 #define SPEAR1310_C3_CLK_MASK 1 63 #define SPEAR1310_C3_CLK_MASK 1
66 #define SPEAR1310_C3_CLK_SHIFT 1 64 #define SPEAR1310_C3_CLK_SHIFT 1
67 65
68#define SPEAR1310_GMAC_CLK_CFG (VA_MISC_BASE + 0x248) 66#define SPEAR1310_GMAC_CLK_CFG (misc_base + 0x248)
69 #define SPEAR1310_GMAC_PHY_IF_SEL_MASK 3 67 #define SPEAR1310_GMAC_PHY_IF_SEL_MASK 3
70 #define SPEAR1310_GMAC_PHY_IF_SEL_SHIFT 4 68 #define SPEAR1310_GMAC_PHY_IF_SEL_SHIFT 4
71 #define SPEAR1310_GMAC_PHY_CLK_MASK 1 69 #define SPEAR1310_GMAC_PHY_CLK_MASK 1
@@ -73,7 +71,7 @@
73 #define SPEAR1310_GMAC_PHY_INPUT_CLK_MASK 2 71 #define SPEAR1310_GMAC_PHY_INPUT_CLK_MASK 2
74 #define SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT 1 72 #define SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT 1
75 73
76#define SPEAR1310_I2S_CLK_CFG (VA_MISC_BASE + 0x24C) 74#define SPEAR1310_I2S_CLK_CFG (misc_base + 0x24C)
77 /* I2S_CLK_CFG register mask */ 75 /* I2S_CLK_CFG register mask */
78 #define SPEAR1310_I2S_SCLK_X_MASK 0x1F 76 #define SPEAR1310_I2S_SCLK_X_MASK 0x1F
79 #define SPEAR1310_I2S_SCLK_X_SHIFT 27 77 #define SPEAR1310_I2S_SCLK_X_SHIFT 27
@@ -91,21 +89,21 @@
91 #define SPEAR1310_I2S_SRC_CLK_MASK 2 89 #define SPEAR1310_I2S_SRC_CLK_MASK 2
92 #define SPEAR1310_I2S_SRC_CLK_SHIFT 0 90 #define SPEAR1310_I2S_SRC_CLK_SHIFT 0
93 91
94#define SPEAR1310_C3_CLK_SYNT (VA_MISC_BASE + 0x250) 92#define SPEAR1310_C3_CLK_SYNT (misc_base + 0x250)
95#define SPEAR1310_UART_CLK_SYNT (VA_MISC_BASE + 0x254) 93#define SPEAR1310_UART_CLK_SYNT (misc_base + 0x254)
96#define SPEAR1310_GMAC_CLK_SYNT (VA_MISC_BASE + 0x258) 94#define SPEAR1310_GMAC_CLK_SYNT (misc_base + 0x258)
97#define SPEAR1310_SDHCI_CLK_SYNT (VA_MISC_BASE + 0x25C) 95#define SPEAR1310_SDHCI_CLK_SYNT (misc_base + 0x25C)
98#define SPEAR1310_CFXD_CLK_SYNT (VA_MISC_BASE + 0x260) 96#define SPEAR1310_CFXD_CLK_SYNT (misc_base + 0x260)
99#define SPEAR1310_ADC_CLK_SYNT (VA_MISC_BASE + 0x264) 97#define SPEAR1310_ADC_CLK_SYNT (misc_base + 0x264)
100#define SPEAR1310_AMBA_CLK_SYNT (VA_MISC_BASE + 0x268) 98#define SPEAR1310_AMBA_CLK_SYNT (misc_base + 0x268)
101#define SPEAR1310_CLCD_CLK_SYNT (VA_MISC_BASE + 0x270) 99#define SPEAR1310_CLCD_CLK_SYNT (misc_base + 0x270)
102#define SPEAR1310_RAS_CLK_SYNT0 (VA_MISC_BASE + 0x280) 100#define SPEAR1310_RAS_CLK_SYNT0 (misc_base + 0x280)
103#define SPEAR1310_RAS_CLK_SYNT1 (VA_MISC_BASE + 0x288) 101#define SPEAR1310_RAS_CLK_SYNT1 (misc_base + 0x288)
104#define SPEAR1310_RAS_CLK_SYNT2 (VA_MISC_BASE + 0x290) 102#define SPEAR1310_RAS_CLK_SYNT2 (misc_base + 0x290)
105#define SPEAR1310_RAS_CLK_SYNT3 (VA_MISC_BASE + 0x298) 103#define SPEAR1310_RAS_CLK_SYNT3 (misc_base + 0x298)
106 /* Check Fractional synthesizer reg masks */ 104 /* Check Fractional synthesizer reg masks */
107 105
108#define SPEAR1310_PERIP1_CLK_ENB (VA_MISC_BASE + 0x300) 106#define SPEAR1310_PERIP1_CLK_ENB (misc_base + 0x300)
109 /* PERIP1_CLK_ENB register masks */ 107 /* PERIP1_CLK_ENB register masks */
110 #define SPEAR1310_RTC_CLK_ENB 31 108 #define SPEAR1310_RTC_CLK_ENB 31
111 #define SPEAR1310_ADC_CLK_ENB 30 109 #define SPEAR1310_ADC_CLK_ENB 30
@@ -138,7 +136,7 @@
138 #define SPEAR1310_SYSROM_CLK_ENB 1 136 #define SPEAR1310_SYSROM_CLK_ENB 1
139 #define SPEAR1310_BUS_CLK_ENB 0 137 #define SPEAR1310_BUS_CLK_ENB 0
140 138
141#define SPEAR1310_PERIP2_CLK_ENB (VA_MISC_BASE + 0x304) 139#define SPEAR1310_PERIP2_CLK_ENB (misc_base + 0x304)
142 /* PERIP2_CLK_ENB register masks */ 140 /* PERIP2_CLK_ENB register masks */
143 #define SPEAR1310_THSENS_CLK_ENB 8 141 #define SPEAR1310_THSENS_CLK_ENB 8
144 #define SPEAR1310_I2S_REF_PAD_CLK_ENB 7 142 #define SPEAR1310_I2S_REF_PAD_CLK_ENB 7
@@ -150,7 +148,7 @@
150 #define SPEAR1310_DDR_CORE_CLK_ENB 1 148 #define SPEAR1310_DDR_CORE_CLK_ENB 1
151 #define SPEAR1310_DDR_CTRL_CLK_ENB 0 149 #define SPEAR1310_DDR_CTRL_CLK_ENB 0
152 150
153#define SPEAR1310_RAS_CLK_ENB (VA_MISC_BASE + 0x310) 151#define SPEAR1310_RAS_CLK_ENB (misc_base + 0x310)
154 /* RAS_CLK_ENB register masks */ 152 /* RAS_CLK_ENB register masks */
155 #define SPEAR1310_SYNT3_CLK_ENB 17 153 #define SPEAR1310_SYNT3_CLK_ENB 17
156 #define SPEAR1310_SYNT2_CLK_ENB 16 154 #define SPEAR1310_SYNT2_CLK_ENB 16
@@ -172,7 +170,7 @@
172 #define SPEAR1310_ACLK_CLK_ENB 0 170 #define SPEAR1310_ACLK_CLK_ENB 0
173 171
174/* RAS Area Control Register */ 172/* RAS Area Control Register */
175#define SPEAR1310_RAS_CTRL_REG0 (VA_SPEAR1310_RAS_BASE + 0x000) 173#define SPEAR1310_RAS_CTRL_REG0 (ras_base + 0x000)
176 #define SPEAR1310_SSP1_CLK_MASK 3 174 #define SPEAR1310_SSP1_CLK_MASK 3
177 #define SPEAR1310_SSP1_CLK_SHIFT 26 175 #define SPEAR1310_SSP1_CLK_SHIFT 26
178 #define SPEAR1310_TDM_CLK_MASK 1 176 #define SPEAR1310_TDM_CLK_MASK 1
@@ -197,12 +195,12 @@
197 #define SPEAR1310_PCI_CLK_MASK 1 195 #define SPEAR1310_PCI_CLK_MASK 1
198 #define SPEAR1310_PCI_CLK_SHIFT 0 196 #define SPEAR1310_PCI_CLK_SHIFT 0
199 197
200#define SPEAR1310_RAS_CTRL_REG1 (VA_SPEAR1310_RAS_BASE + 0x004) 198#define SPEAR1310_RAS_CTRL_REG1 (ras_base + 0x004)
201 #define SPEAR1310_PHY_CLK_MASK 0x3 199 #define SPEAR1310_PHY_CLK_MASK 0x3
202 #define SPEAR1310_RMII_PHY_CLK_SHIFT 0 200 #define SPEAR1310_RMII_PHY_CLK_SHIFT 0
203 #define SPEAR1310_SMII_RGMII_PHY_CLK_SHIFT 2 201 #define SPEAR1310_SMII_RGMII_PHY_CLK_SHIFT 2
204 202
205#define SPEAR1310_RAS_SW_CLK_CTRL (VA_SPEAR1310_RAS_BASE + 0x0148) 203#define SPEAR1310_RAS_SW_CLK_CTRL (ras_base + 0x0148)
206 #define SPEAR1310_CAN1_CLK_ENB 25 204 #define SPEAR1310_CAN1_CLK_ENB 25
207 #define SPEAR1310_CAN0_CLK_ENB 24 205 #define SPEAR1310_CAN0_CLK_ENB 24
208 #define SPEAR1310_GPT64_CLK_ENB 23 206 #define SPEAR1310_GPT64_CLK_ENB 23
@@ -385,7 +383,7 @@ static const char *ssp1_parents[] = { "ras_apb_clk", "gen_syn1_clk",
385static const char *pci_parents[] = { "ras_pll3_clk", "gen_syn2_clk", }; 383static const char *pci_parents[] = { "ras_pll3_clk", "gen_syn2_clk", };
386static const char *tdm_parents[] = { "ras_pll3_clk", "gen_syn1_clk", }; 384static const char *tdm_parents[] = { "ras_pll3_clk", "gen_syn1_clk", };
387 385
388void __init spear1310_clk_init(void) 386void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base)
389{ 387{
390 struct clk *clk, *clk1; 388 struct clk *clk, *clk1;
391 389
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index 82abea366b78..3ceb4507e95f 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -17,18 +17,17 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/of_platform.h> 18#include <linux/of_platform.h>
19#include <linux/spinlock_types.h> 19#include <linux/spinlock_types.h>
20#include <mach/spear.h>
21#include "clk.h" 20#include "clk.h"
22 21
23/* Clock Configuration Registers */ 22/* Clock Configuration Registers */
24#define SPEAR1340_SYS_CLK_CTRL (VA_MISC_BASE + 0x200) 23#define SPEAR1340_SYS_CLK_CTRL (misc_base + 0x200)
25 #define SPEAR1340_HCLK_SRC_SEL_SHIFT 27 24 #define SPEAR1340_HCLK_SRC_SEL_SHIFT 27
26 #define SPEAR1340_HCLK_SRC_SEL_MASK 1 25 #define SPEAR1340_HCLK_SRC_SEL_MASK 1
27 #define SPEAR1340_SCLK_SRC_SEL_SHIFT 23 26 #define SPEAR1340_SCLK_SRC_SEL_SHIFT 23
28 #define SPEAR1340_SCLK_SRC_SEL_MASK 3 27 #define SPEAR1340_SCLK_SRC_SEL_MASK 3
29 28
30/* PLL related registers and bit values */ 29/* PLL related registers and bit values */
31#define SPEAR1340_PLL_CFG (VA_MISC_BASE + 0x210) 30#define SPEAR1340_PLL_CFG (misc_base + 0x210)
32 /* PLL_CFG bit values */ 31 /* PLL_CFG bit values */
33 #define SPEAR1340_CLCD_SYNT_CLK_MASK 1 32 #define SPEAR1340_CLCD_SYNT_CLK_MASK 1
34 #define SPEAR1340_CLCD_SYNT_CLK_SHIFT 31 33 #define SPEAR1340_CLCD_SYNT_CLK_SHIFT 31
@@ -40,15 +39,15 @@
40 #define SPEAR1340_PLL2_CLK_SHIFT 22 39 #define SPEAR1340_PLL2_CLK_SHIFT 22
41 #define SPEAR1340_PLL1_CLK_SHIFT 20 40 #define SPEAR1340_PLL1_CLK_SHIFT 20
42 41
43#define SPEAR1340_PLL1_CTR (VA_MISC_BASE + 0x214) 42#define SPEAR1340_PLL1_CTR (misc_base + 0x214)
44#define SPEAR1340_PLL1_FRQ (VA_MISC_BASE + 0x218) 43#define SPEAR1340_PLL1_FRQ (misc_base + 0x218)
45#define SPEAR1340_PLL2_CTR (VA_MISC_BASE + 0x220) 44#define SPEAR1340_PLL2_CTR (misc_base + 0x220)
46#define SPEAR1340_PLL2_FRQ (VA_MISC_BASE + 0x224) 45#define SPEAR1340_PLL2_FRQ (misc_base + 0x224)
47#define SPEAR1340_PLL3_CTR (VA_MISC_BASE + 0x22C) 46#define SPEAR1340_PLL3_CTR (misc_base + 0x22C)
48#define SPEAR1340_PLL3_FRQ (VA_MISC_BASE + 0x230) 47#define SPEAR1340_PLL3_FRQ (misc_base + 0x230)
49#define SPEAR1340_PLL4_CTR (VA_MISC_BASE + 0x238) 48#define SPEAR1340_PLL4_CTR (misc_base + 0x238)
50#define SPEAR1340_PLL4_FRQ (VA_MISC_BASE + 0x23C) 49#define SPEAR1340_PLL4_FRQ (misc_base + 0x23C)
51#define SPEAR1340_PERIP_CLK_CFG (VA_MISC_BASE + 0x244) 50#define SPEAR1340_PERIP_CLK_CFG (misc_base + 0x244)
52 /* PERIP_CLK_CFG bit values */ 51 /* PERIP_CLK_CFG bit values */
53 #define SPEAR1340_SPDIF_CLK_MASK 1 52 #define SPEAR1340_SPDIF_CLK_MASK 1
54 #define SPEAR1340_SPDIF_OUT_CLK_SHIFT 15 53 #define SPEAR1340_SPDIF_OUT_CLK_SHIFT 15
@@ -66,13 +65,13 @@
66 #define SPEAR1340_C3_CLK_MASK 1 65 #define SPEAR1340_C3_CLK_MASK 1
67 #define SPEAR1340_C3_CLK_SHIFT 1 66 #define SPEAR1340_C3_CLK_SHIFT 1
68 67
69#define SPEAR1340_GMAC_CLK_CFG (VA_MISC_BASE + 0x248) 68#define SPEAR1340_GMAC_CLK_CFG (misc_base + 0x248)
70 #define SPEAR1340_GMAC_PHY_CLK_MASK 1 69 #define SPEAR1340_GMAC_PHY_CLK_MASK 1
71 #define SPEAR1340_GMAC_PHY_CLK_SHIFT 2 70 #define SPEAR1340_GMAC_PHY_CLK_SHIFT 2
72 #define SPEAR1340_GMAC_PHY_INPUT_CLK_MASK 2 71 #define SPEAR1340_GMAC_PHY_INPUT_CLK_MASK 2
73 #define SPEAR1340_GMAC_PHY_INPUT_CLK_SHIFT 0 72 #define SPEAR1340_GMAC_PHY_INPUT_CLK_SHIFT 0
74 73
75#define SPEAR1340_I2S_CLK_CFG (VA_MISC_BASE + 0x24C) 74#define SPEAR1340_I2S_CLK_CFG (misc_base + 0x24C)
76 /* I2S_CLK_CFG register mask */ 75 /* I2S_CLK_CFG register mask */
77 #define SPEAR1340_I2S_SCLK_X_MASK 0x1F 76 #define SPEAR1340_I2S_SCLK_X_MASK 0x1F
78 #define SPEAR1340_I2S_SCLK_X_SHIFT 27 77 #define SPEAR1340_I2S_SCLK_X_SHIFT 27
@@ -90,21 +89,21 @@
90 #define SPEAR1340_I2S_SRC_CLK_MASK 2 89 #define SPEAR1340_I2S_SRC_CLK_MASK 2
91 #define SPEAR1340_I2S_SRC_CLK_SHIFT 0 90 #define SPEAR1340_I2S_SRC_CLK_SHIFT 0
92 91
93#define SPEAR1340_C3_CLK_SYNT (VA_MISC_BASE + 0x250) 92#define SPEAR1340_C3_CLK_SYNT (misc_base + 0x250)
94#define SPEAR1340_UART0_CLK_SYNT (VA_MISC_BASE + 0x254) 93#define SPEAR1340_UART0_CLK_SYNT (misc_base + 0x254)
95#define SPEAR1340_UART1_CLK_SYNT (VA_MISC_BASE + 0x258) 94#define SPEAR1340_UART1_CLK_SYNT (misc_base + 0x258)
96#define SPEAR1340_GMAC_CLK_SYNT (VA_MISC_BASE + 0x25C) 95#define SPEAR1340_GMAC_CLK_SYNT (misc_base + 0x25C)
97#define SPEAR1340_SDHCI_CLK_SYNT (VA_MISC_BASE + 0x260) 96#define SPEAR1340_SDHCI_CLK_SYNT (misc_base + 0x260)
98#define SPEAR1340_CFXD_CLK_SYNT (VA_MISC_BASE + 0x264) 97#define SPEAR1340_CFXD_CLK_SYNT (misc_base + 0x264)
99#define SPEAR1340_ADC_CLK_SYNT (VA_MISC_BASE + 0x270) 98#define SPEAR1340_ADC_CLK_SYNT (misc_base + 0x270)
100#define SPEAR1340_AMBA_CLK_SYNT (VA_MISC_BASE + 0x274) 99#define SPEAR1340_AMBA_CLK_SYNT (misc_base + 0x274)
101#define SPEAR1340_CLCD_CLK_SYNT (VA_MISC_BASE + 0x27C) 100#define SPEAR1340_CLCD_CLK_SYNT (misc_base + 0x27C)
102#define SPEAR1340_SYS_CLK_SYNT (VA_MISC_BASE + 0x284) 101#define SPEAR1340_SYS_CLK_SYNT (misc_base + 0x284)
103#define SPEAR1340_GEN_CLK_SYNT0 (VA_MISC_BASE + 0x28C) 102#define SPEAR1340_GEN_CLK_SYNT0 (misc_base + 0x28C)
104#define SPEAR1340_GEN_CLK_SYNT1 (VA_MISC_BASE + 0x294) 103#define SPEAR1340_GEN_CLK_SYNT1 (misc_base + 0x294)
105#define SPEAR1340_GEN_CLK_SYNT2 (VA_MISC_BASE + 0x29C) 104#define SPEAR1340_GEN_CLK_SYNT2 (misc_base + 0x29C)
106#define SPEAR1340_GEN_CLK_SYNT3 (VA_MISC_BASE + 0x304) 105#define SPEAR1340_GEN_CLK_SYNT3 (misc_base + 0x304)
107#define SPEAR1340_PERIP1_CLK_ENB (VA_MISC_BASE + 0x30C) 106#define SPEAR1340_PERIP1_CLK_ENB (misc_base + 0x30C)
108 #define SPEAR1340_RTC_CLK_ENB 31 107 #define SPEAR1340_RTC_CLK_ENB 31
109 #define SPEAR1340_ADC_CLK_ENB 30 108 #define SPEAR1340_ADC_CLK_ENB 30
110 #define SPEAR1340_C3_CLK_ENB 29 109 #define SPEAR1340_C3_CLK_ENB 29
@@ -133,7 +132,7 @@
133 #define SPEAR1340_SYSROM_CLK_ENB 1 132 #define SPEAR1340_SYSROM_CLK_ENB 1
134 #define SPEAR1340_BUS_CLK_ENB 0 133 #define SPEAR1340_BUS_CLK_ENB 0
135 134
136#define SPEAR1340_PERIP2_CLK_ENB (VA_MISC_BASE + 0x310) 135#define SPEAR1340_PERIP2_CLK_ENB (misc_base + 0x310)
137 #define SPEAR1340_THSENS_CLK_ENB 8 136 #define SPEAR1340_THSENS_CLK_ENB 8
138 #define SPEAR1340_I2S_REF_PAD_CLK_ENB 7 137 #define SPEAR1340_I2S_REF_PAD_CLK_ENB 7
139 #define SPEAR1340_ACP_CLK_ENB 6 138 #define SPEAR1340_ACP_CLK_ENB 6
@@ -144,7 +143,7 @@
144 #define SPEAR1340_DDR_CORE_CLK_ENB 1 143 #define SPEAR1340_DDR_CORE_CLK_ENB 1
145 #define SPEAR1340_DDR_CTRL_CLK_ENB 0 144 #define SPEAR1340_DDR_CTRL_CLK_ENB 0
146 145
147#define SPEAR1340_PERIP3_CLK_ENB (VA_MISC_BASE + 0x314) 146#define SPEAR1340_PERIP3_CLK_ENB (misc_base + 0x314)
148 #define SPEAR1340_PLGPIO_CLK_ENB 18 147 #define SPEAR1340_PLGPIO_CLK_ENB 18
149 #define SPEAR1340_VIDEO_DEC_CLK_ENB 16 148 #define SPEAR1340_VIDEO_DEC_CLK_ENB 16
150 #define SPEAR1340_VIDEO_ENC_CLK_ENB 15 149 #define SPEAR1340_VIDEO_ENC_CLK_ENB 15
@@ -441,7 +440,7 @@ static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk",
441static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco2div2_clk", 440static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco2div2_clk",
442 "pll2_clk", }; 441 "pll2_clk", };
443 442
444void __init spear1340_clk_init(void) 443void __init spear1340_clk_init(void __iomem *misc_base)
445{ 444{
446 struct clk *clk, *clk1; 445 struct clk *clk, *clk1;
447 446
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index 33d3ac588da7..f9ec43fd1320 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -15,21 +15,20 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/spinlock_types.h> 17#include <linux/spinlock_types.h>
18#include <mach/misc_regs.h>
19#include "clk.h" 18#include "clk.h"
20 19
21static DEFINE_SPINLOCK(_lock); 20static DEFINE_SPINLOCK(_lock);
22 21
23#define PLL1_CTR (MISC_BASE + 0x008) 22#define PLL1_CTR (misc_base + 0x008)
24#define PLL1_FRQ (MISC_BASE + 0x00C) 23#define PLL1_FRQ (misc_base + 0x00C)
25#define PLL2_CTR (MISC_BASE + 0x014) 24#define PLL2_CTR (misc_base + 0x014)
26#define PLL2_FRQ (MISC_BASE + 0x018) 25#define PLL2_FRQ (misc_base + 0x018)
27#define PLL_CLK_CFG (MISC_BASE + 0x020) 26#define PLL_CLK_CFG (misc_base + 0x020)
28 /* PLL_CLK_CFG register masks */ 27 /* PLL_CLK_CFG register masks */
29 #define MCTR_CLK_SHIFT 28 28 #define MCTR_CLK_SHIFT 28
30 #define MCTR_CLK_MASK 3 29 #define MCTR_CLK_MASK 3
31 30
32#define CORE_CLK_CFG (MISC_BASE + 0x024) 31#define CORE_CLK_CFG (misc_base + 0x024)
33 /* CORE CLK CFG register masks */ 32 /* CORE CLK CFG register masks */
34 #define GEN_SYNTH2_3_CLK_SHIFT 18 33 #define GEN_SYNTH2_3_CLK_SHIFT 18
35 #define GEN_SYNTH2_3_CLK_MASK 1 34 #define GEN_SYNTH2_3_CLK_MASK 1
@@ -39,7 +38,7 @@ static DEFINE_SPINLOCK(_lock);
39 #define PCLK_RATIO_SHIFT 8 38 #define PCLK_RATIO_SHIFT 8
40 #define PCLK_RATIO_MASK 2 39 #define PCLK_RATIO_MASK 2
41 40
42#define PERIP_CLK_CFG (MISC_BASE + 0x028) 41#define PERIP_CLK_CFG (misc_base + 0x028)
43 /* PERIP_CLK_CFG register masks */ 42 /* PERIP_CLK_CFG register masks */
44 #define UART_CLK_SHIFT 4 43 #define UART_CLK_SHIFT 4
45 #define UART_CLK_MASK 1 44 #define UART_CLK_MASK 1
@@ -50,7 +49,7 @@ static DEFINE_SPINLOCK(_lock);
50 #define GPT2_CLK_SHIFT 12 49 #define GPT2_CLK_SHIFT 12
51 #define GPT_CLK_MASK 1 50 #define GPT_CLK_MASK 1
52 51
53#define PERIP1_CLK_ENB (MISC_BASE + 0x02C) 52#define PERIP1_CLK_ENB (misc_base + 0x02C)
54 /* PERIP1_CLK_ENB register masks */ 53 /* PERIP1_CLK_ENB register masks */
55 #define UART_CLK_ENB 3 54 #define UART_CLK_ENB 3
56 #define SSP_CLK_ENB 5 55 #define SSP_CLK_ENB 5
@@ -69,7 +68,7 @@ static DEFINE_SPINLOCK(_lock);
69 #define USBH_CLK_ENB 25 68 #define USBH_CLK_ENB 25
70 #define C3_CLK_ENB 31 69 #define C3_CLK_ENB 31
71 70
72#define RAS_CLK_ENB (MISC_BASE + 0x034) 71#define RAS_CLK_ENB (misc_base + 0x034)
73 #define RAS_AHB_CLK_ENB 0 72 #define RAS_AHB_CLK_ENB 0
74 #define RAS_PLL1_CLK_ENB 1 73 #define RAS_PLL1_CLK_ENB 1
75 #define RAS_APB_CLK_ENB 2 74 #define RAS_APB_CLK_ENB 2
@@ -82,20 +81,20 @@ static DEFINE_SPINLOCK(_lock);
82 #define RAS_SYNT2_CLK_ENB 10 81 #define RAS_SYNT2_CLK_ENB 10
83 #define RAS_SYNT3_CLK_ENB 11 82 #define RAS_SYNT3_CLK_ENB 11
84 83
85#define PRSC0_CLK_CFG (MISC_BASE + 0x044) 84#define PRSC0_CLK_CFG (misc_base + 0x044)
86#define PRSC1_CLK_CFG (MISC_BASE + 0x048) 85#define PRSC1_CLK_CFG (misc_base + 0x048)
87#define PRSC2_CLK_CFG (MISC_BASE + 0x04C) 86#define PRSC2_CLK_CFG (misc_base + 0x04C)
88#define AMEM_CLK_CFG (MISC_BASE + 0x050) 87#define AMEM_CLK_CFG (misc_base + 0x050)
89 #define AMEM_CLK_ENB 0 88 #define AMEM_CLK_ENB 0
90 89
91#define CLCD_CLK_SYNT (MISC_BASE + 0x05C) 90#define CLCD_CLK_SYNT (misc_base + 0x05C)
92#define FIRDA_CLK_SYNT (MISC_BASE + 0x060) 91#define FIRDA_CLK_SYNT (misc_base + 0x060)
93#define UART_CLK_SYNT (MISC_BASE + 0x064) 92#define UART_CLK_SYNT (misc_base + 0x064)
94#define GMAC_CLK_SYNT (MISC_BASE + 0x068) 93#define GMAC_CLK_SYNT (misc_base + 0x068)
95#define GEN0_CLK_SYNT (MISC_BASE + 0x06C) 94#define GEN0_CLK_SYNT (misc_base + 0x06C)
96#define GEN1_CLK_SYNT (MISC_BASE + 0x070) 95#define GEN1_CLK_SYNT (misc_base + 0x070)
97#define GEN2_CLK_SYNT (MISC_BASE + 0x074) 96#define GEN2_CLK_SYNT (misc_base + 0x074)
98#define GEN3_CLK_SYNT (MISC_BASE + 0x078) 97#define GEN3_CLK_SYNT (misc_base + 0x078)
99 98
100/* pll rate configuration table, in ascending order of rates */ 99/* pll rate configuration table, in ascending order of rates */
101static struct pll_rate_tbl pll_rtbl[] = { 100static struct pll_rate_tbl pll_rtbl[] = {
@@ -211,6 +210,17 @@ static inline void spear310_clk_init(void) { }
211 210
212/* array of all spear 320 clock lookups */ 211/* array of all spear 320 clock lookups */
213#ifdef CONFIG_MACH_SPEAR320 212#ifdef CONFIG_MACH_SPEAR320
213
214#define SPEAR320_CONTROL_REG (soc_config_base + 0x0000)
215#define SPEAR320_EXT_CTRL_REG (soc_config_base + 0x0018)
216
217 #define SPEAR320_UARTX_PCLK_MASK 0x1
218 #define SPEAR320_UART2_PCLK_SHIFT 8
219 #define SPEAR320_UART3_PCLK_SHIFT 9
220 #define SPEAR320_UART4_PCLK_SHIFT 10
221 #define SPEAR320_UART5_PCLK_SHIFT 11
222 #define SPEAR320_UART6_PCLK_SHIFT 12
223 #define SPEAR320_RS485_PCLK_SHIFT 13
214 #define SMII_PCLK_SHIFT 18 224 #define SMII_PCLK_SHIFT 18
215 #define SMII_PCLK_MASK 2 225 #define SMII_PCLK_MASK 2
216 #define SMII_PCLK_VAL_PAD 0x0 226 #define SMII_PCLK_VAL_PAD 0x0
@@ -235,7 +245,7 @@ static const char *smii0_parents[] = { "smii_125m_pad", "ras_pll2_clk",
235 "ras_syn0_gclk", }; 245 "ras_syn0_gclk", };
236static const char *uartx_parents[] = { "ras_syn1_gclk", "ras_apb_clk", }; 246static const char *uartx_parents[] = { "ras_syn1_gclk", "ras_apb_clk", };
237 247
238static void __init spear320_clk_init(void) 248static void __init spear320_clk_init(void __iomem *soc_config_base)
239{ 249{
240 struct clk *clk; 250 struct clk *clk;
241 251
@@ -362,7 +372,7 @@ static void __init spear320_clk_init(void)
362static inline void spear320_clk_init(void) { } 372static inline void spear320_clk_init(void) { }
363#endif 373#endif
364 374
365void __init spear3xx_clk_init(void) 375void __init spear3xx_clk_init(void __iomem *misc_base, void __iomem *soc_config_base)
366{ 376{
367 struct clk *clk, *clk1; 377 struct clk *clk, *clk1;
368 378
@@ -634,5 +644,5 @@ void __init spear3xx_clk_init(void)
634 else if (of_machine_is_compatible("st,spear310")) 644 else if (of_machine_is_compatible("st,spear310"))
635 spear310_clk_init(); 645 spear310_clk_init();
636 else if (of_machine_is_compatible("st,spear320")) 646 else if (of_machine_is_compatible("st,spear320"))
637 spear320_clk_init(); 647 spear320_clk_init(soc_config_base);
638} 648}
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index e862a333ad30..9406f2426d64 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -13,28 +13,27 @@
13#include <linux/clkdev.h> 13#include <linux/clkdev.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/spinlock_types.h> 15#include <linux/spinlock_types.h>
16#include <mach/misc_regs.h>
17#include "clk.h" 16#include "clk.h"
18 17
19static DEFINE_SPINLOCK(_lock); 18static DEFINE_SPINLOCK(_lock);
20 19
21#define PLL1_CTR (MISC_BASE + 0x008) 20#define PLL1_CTR (misc_base + 0x008)
22#define PLL1_FRQ (MISC_BASE + 0x00C) 21#define PLL1_FRQ (misc_base + 0x00C)
23#define PLL2_CTR (MISC_BASE + 0x014) 22#define PLL2_CTR (misc_base + 0x014)
24#define PLL2_FRQ (MISC_BASE + 0x018) 23#define PLL2_FRQ (misc_base + 0x018)
25#define PLL_CLK_CFG (MISC_BASE + 0x020) 24#define PLL_CLK_CFG (misc_base + 0x020)
26 /* PLL_CLK_CFG register masks */ 25 /* PLL_CLK_CFG register masks */
27 #define MCTR_CLK_SHIFT 28 26 #define MCTR_CLK_SHIFT 28
28 #define MCTR_CLK_MASK 3 27 #define MCTR_CLK_MASK 3
29 28
30#define CORE_CLK_CFG (MISC_BASE + 0x024) 29#define CORE_CLK_CFG (misc_base + 0x024)
31 /* CORE CLK CFG register masks */ 30 /* CORE CLK CFG register masks */
32 #define HCLK_RATIO_SHIFT 10 31 #define HCLK_RATIO_SHIFT 10
33 #define HCLK_RATIO_MASK 2 32 #define HCLK_RATIO_MASK 2
34 #define PCLK_RATIO_SHIFT 8 33 #define PCLK_RATIO_SHIFT 8
35 #define PCLK_RATIO_MASK 2 34 #define PCLK_RATIO_MASK 2
36 35
37#define PERIP_CLK_CFG (MISC_BASE + 0x028) 36#define PERIP_CLK_CFG (misc_base + 0x028)
38 /* PERIP_CLK_CFG register masks */ 37 /* PERIP_CLK_CFG register masks */
39 #define CLCD_CLK_SHIFT 2 38 #define CLCD_CLK_SHIFT 2
40 #define CLCD_CLK_MASK 2 39 #define CLCD_CLK_MASK 2
@@ -48,7 +47,7 @@ static DEFINE_SPINLOCK(_lock);
48 #define GPT3_CLK_SHIFT 12 47 #define GPT3_CLK_SHIFT 12
49 #define GPT_CLK_MASK 1 48 #define GPT_CLK_MASK 1
50 49
51#define PERIP1_CLK_ENB (MISC_BASE + 0x02C) 50#define PERIP1_CLK_ENB (misc_base + 0x02C)
52 /* PERIP1_CLK_ENB register masks */ 51 /* PERIP1_CLK_ENB register masks */
53 #define UART0_CLK_ENB 3 52 #define UART0_CLK_ENB 3
54 #define UART1_CLK_ENB 4 53 #define UART1_CLK_ENB 4
@@ -74,13 +73,13 @@ static DEFINE_SPINLOCK(_lock);
74 #define USBH0_CLK_ENB 25 73 #define USBH0_CLK_ENB 25
75 #define USBH1_CLK_ENB 26 74 #define USBH1_CLK_ENB 26
76 75
77#define PRSC0_CLK_CFG (MISC_BASE + 0x044) 76#define PRSC0_CLK_CFG (misc_base + 0x044)
78#define PRSC1_CLK_CFG (MISC_BASE + 0x048) 77#define PRSC1_CLK_CFG (misc_base + 0x048)
79#define PRSC2_CLK_CFG (MISC_BASE + 0x04C) 78#define PRSC2_CLK_CFG (misc_base + 0x04C)
80 79
81#define CLCD_CLK_SYNT (MISC_BASE + 0x05C) 80#define CLCD_CLK_SYNT (misc_base + 0x05C)
82#define FIRDA_CLK_SYNT (MISC_BASE + 0x060) 81#define FIRDA_CLK_SYNT (misc_base + 0x060)
83#define UART_CLK_SYNT (MISC_BASE + 0x064) 82#define UART_CLK_SYNT (misc_base + 0x064)
84 83
85/* vco rate configuration table, in ascending order of rates */ 84/* vco rate configuration table, in ascending order of rates */
86static struct pll_rate_tbl pll_rtbl[] = { 85static struct pll_rate_tbl pll_rtbl[] = {
@@ -115,7 +114,7 @@ static struct gpt_rate_tbl gpt_rtbl[] = {
115 {.mscale = 1, .nscale = 0}, /* 83 MHz */ 114 {.mscale = 1, .nscale = 0}, /* 83 MHz */
116}; 115};
117 116
118void __init spear6xx_clk_init(void) 117void __init spear6xx_clk_init(void __iomem *misc_base)
119{ 118{
120 struct clk *clk, *clk1; 119 struct clk *clk, *clk1;
121 120
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-15 07:29:48 -0400