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-rw-r--r--arch/avr32/boards/atngw100/setup.c10
-rw-r--r--arch/avr32/boards/atstk1000/atstk1002.c3
-rw-r--r--arch/avr32/boards/atstk1000/atstk1004.c3
-rw-r--r--arch/avr32/include/asm/byteorder.h22
-rw-r--r--arch/avr32/include/asm/io.h8
-rw-r--r--arch/avr32/kernel/process.c3
-rw-r--r--arch/avr32/kernel/setup.c19
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c117
-rw-r--r--arch/avr32/mach-at32ap/clock.c52
-rw-r--r--arch/avr32/mach-at32ap/clock.h8
-rw-r--r--arch/avr32/mach-at32ap/include/mach/at32ap700x.h128
-rw-r--r--arch/avr32/mach-at32ap/include/mach/board.h2
-rw-r--r--arch/avr32/mach-at32ap/include/mach/io.h3
-rw-r--r--arch/avr32/mach-at32ap/include/mach/portmux.h1
-rw-r--r--arch/avr32/mach-at32ap/pdc.c3
-rw-r--r--arch/avr32/mach-at32ap/pio.c22
-rw-r--r--arch/avr32/oprofile/Makefile2
-rw-r--r--arch/avr32/oprofile/backtrace.c81
-rw-r--r--arch/avr32/oprofile/op_model_avr32.c4
19 files changed, 378 insertions, 113 deletions
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index f3085208959f..65db3d266965 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/clk.h> 10#include <linux/clk.h>
11#include <linux/etherdevice.h> 11#include <linux/etherdevice.h>
12#include <linux/gpio.h>
12#include <linux/irq.h> 13#include <linux/irq.h>
13#include <linux/i2c.h> 14#include <linux/i2c.h>
14#include <linux/i2c-gpio.h> 15#include <linux/i2c-gpio.h>
@@ -207,6 +208,15 @@ postcore_initcall(atngw100_init);
207 208
208static int __init atngw100_arch_init(void) 209static int __init atngw100_arch_init(void)
209{ 210{
211 /* PB30 is the otherwise unused jumper on the mainboard, with an
212 * external pullup; the jumper grounds it. Use it however you
213 * like, including letting U-Boot or Linux tweak boot sequences.
214 */
215 at32_select_gpio(GPIO_PIN_PB(30), 0);
216 gpio_request(GPIO_PIN_PB(30), "j15");
217 gpio_direction_input(GPIO_PIN_PB(30));
218 gpio_export(GPIO_PIN_PB(30), false);
219
210 /* set_irq_type() after the arch_initcall for EIC has run, and 220 /* set_irq_type() after the arch_initcall for EIC has run, and
211 * before the I2C subsystem could try using this IRQ. 221 * before the I2C subsystem could try using this IRQ.
212 */ 222 */
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index 4fedbc4488de..32aceec0ae72 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -336,7 +336,8 @@ static int __init atstk1002_init(void)
336 set_hw_addr(at32_add_device_eth(1, &eth_data[1])); 336 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
337#else 337#else
338 at32_add_device_lcdc(0, &atstk1000_lcdc_data, 338 at32_add_device_lcdc(0, &atstk1000_lcdc_data,
339 fbmem_start, fbmem_size, 0); 339 fbmem_start, fbmem_size,
340 ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL);
340#endif 341#endif
341 at32_add_device_usba(0, NULL); 342 at32_add_device_usba(0, NULL);
342#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM 343#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
index d6a2d02f0329..949c13ec51ed 100644
--- a/arch/avr32/boards/atstk1000/atstk1004.c
+++ b/arch/avr32/boards/atstk1000/atstk1004.c
@@ -150,7 +150,8 @@ static int __init atstk1004_init(void)
150 at32_add_device_mci(0, &mci0_data); 150 at32_add_device_mci(0, &mci0_data);
151#endif 151#endif
152 at32_add_device_lcdc(0, &atstk1000_lcdc_data, 152 at32_add_device_lcdc(0, &atstk1000_lcdc_data,
153 fbmem_start, fbmem_size, 0); 153 fbmem_start, fbmem_size,
154 ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL);
154 at32_add_device_usba(0, NULL); 155 at32_add_device_usba(0, NULL);
155#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM 156#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
156 at32_add_device_ssc(0, ATMEL_SSC_TX); 157 at32_add_device_ssc(0, ATMEL_SSC_TX);
diff --git a/arch/avr32/include/asm/byteorder.h b/arch/avr32/include/asm/byteorder.h
index d77b48ba7338..8e3af02076dd 100644
--- a/arch/avr32/include/asm/byteorder.h
+++ b/arch/avr32/include/asm/byteorder.h
@@ -7,6 +7,9 @@
7#include <asm/types.h> 7#include <asm/types.h>
8#include <linux/compiler.h> 8#include <linux/compiler.h>
9 9
10#define __BIG_ENDIAN
11#define __SWAB_64_THRU_32__
12
10#ifdef __CHECKER__ 13#ifdef __CHECKER__
11extern unsigned long __builtin_bswap_32(unsigned long x); 14extern unsigned long __builtin_bswap_32(unsigned long x);
12extern unsigned short __builtin_bswap_16(unsigned short x); 15extern unsigned short __builtin_bswap_16(unsigned short x);
@@ -17,15 +20,18 @@ extern unsigned short __builtin_bswap_16(unsigned short x);
17 * the result. 20 * the result.
18 */ 21 */
19#if !(__GNUC__ == 4 && __GNUC_MINOR__ < 2) 22#if !(__GNUC__ == 4 && __GNUC_MINOR__ < 2)
20#define __arch__swab32(x) __builtin_bswap_32(x) 23static inline __attribute_const__ __u16 __arch_swab16(__u16 val)
21#define __arch__swab16(x) __builtin_bswap_16(x) 24{
22#endif 25 return __builtin_bswap_16(val);
26}
27#define __arch_swab16 __arch_swab16
23 28
24#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) 29static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
25# define __BYTEORDER_HAS_U64__ 30{
26# define __SWAB_64_THRU_32__ 31 return __builtin_bswap_32(val);
32}
33#define __arch_swab32 __arch_swab32
27#endif 34#endif
28 35
29#include <linux/byteorder/big_endian.h> 36#include <linux/byteorder.h>
30
31#endif /* __ASM_AVR32_BYTEORDER_H */ 37#endif /* __ASM_AVR32_BYTEORDER_H */
diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h
index a520f77ead96..22c97ef92201 100644
--- a/arch/avr32/include/asm/io.h
+++ b/arch/avr32/include/asm/io.h
@@ -160,6 +160,14 @@ BUILDIO_IOPORT(l, u32)
160#define readw_relaxed readw 160#define readw_relaxed readw
161#define readl_relaxed readl 161#define readl_relaxed readl
162 162
163#define readb_be __raw_readb
164#define readw_be __raw_readw
165#define readl_be __raw_readl
166
167#define writeb_be __raw_writeb
168#define writew_be __raw_writew
169#define writel_be __raw_writel
170
163#define __BUILD_MEMORY_STRING(bwl, type) \ 171#define __BUILD_MEMORY_STRING(bwl, type) \
164static inline void writes##bwl(volatile void __iomem *addr, \ 172static inline void writes##bwl(volatile void __iomem *addr, \
165 const void *data, unsigned int count) \ 173 const void *data, unsigned int count) \
diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c
index 2c08ac992ac3..134d5302b6dd 100644
--- a/arch/avr32/kernel/process.c
+++ b/arch/avr32/kernel/process.c
@@ -9,6 +9,7 @@
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/kallsyms.h> 10#include <linux/kallsyms.h>
11#include <linux/fs.h> 11#include <linux/fs.h>
12#include <linux/pm.h>
12#include <linux/ptrace.h> 13#include <linux/ptrace.h>
13#include <linux/reboot.h> 14#include <linux/reboot.h>
14#include <linux/tick.h> 15#include <linux/tick.h>
@@ -20,7 +21,7 @@
20 21
21#include <mach/pm.h> 22#include <mach/pm.h>
22 23
23void (*pm_power_off)(void) = NULL; 24void (*pm_power_off)(void);
24EXPORT_SYMBOL(pm_power_off); 25EXPORT_SYMBOL(pm_power_off);
25 26
26/* 27/*
diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
index d8e623c426c1..5c7083916c33 100644
--- a/arch/avr32/kernel/setup.c
+++ b/arch/avr32/kernel/setup.c
@@ -283,6 +283,25 @@ static int __init early_parse_fbmem(char *p)
283} 283}
284early_param("fbmem", early_parse_fbmem); 284early_param("fbmem", early_parse_fbmem);
285 285
286/*
287 * Pick out the memory size. We look for mem=size@start,
288 * where start and size are "size[KkMmGg]"
289 */
290static int __init early_mem(char *p)
291{
292 resource_size_t size, start;
293
294 start = system_ram->start;
295 size = memparse(p, &p);
296 if (*p == '@')
297 start = memparse(p + 1, &p);
298
299 system_ram->start = start;
300 system_ram->end = system_ram->start + size - 1;
301 return 0;
302}
303early_param("mem", early_mem);
304
286static int __init parse_tag_core(struct tag *tag) 305static int __init parse_tag_core(struct tag *tag)
287{ 306{
288 if (tag->hdr.size > 2) { 307 if (tag->hdr.size > 2) {
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index f1b9a3ac2733..5d00bb8d3cc2 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -1405,13 +1405,14 @@ static struct clk atmel_lcdfb0_pixclk = {
1405struct platform_device *__init 1405struct platform_device *__init
1406at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, 1406at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
1407 unsigned long fbmem_start, unsigned long fbmem_len, 1407 unsigned long fbmem_start, unsigned long fbmem_len,
1408 unsigned int pin_config) 1408 u64 pin_mask)
1409{ 1409{
1410 struct platform_device *pdev; 1410 struct platform_device *pdev;
1411 struct atmel_lcdfb_info *info; 1411 struct atmel_lcdfb_info *info;
1412 struct fb_monspecs *monspecs; 1412 struct fb_monspecs *monspecs;
1413 struct fb_videomode *modedb; 1413 struct fb_videomode *modedb;
1414 unsigned int modedb_size; 1414 unsigned int modedb_size;
1415 int i;
1415 1416
1416 /* 1417 /*
1417 * Do a deep copy of the fb data, monspecs and modedb. Make 1418 * Do a deep copy of the fb data, monspecs and modedb. Make
@@ -1433,75 +1434,29 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
1433 case 0: 1434 case 0:
1434 pdev = &atmel_lcdfb0_device; 1435 pdev = &atmel_lcdfb0_device;
1435 1436
1436 switch (pin_config) { 1437 if (pin_mask == 0ULL)
1437 case 0: 1438 /* Default to "full" lcdc control signals and 24bit */
1438 select_peripheral(PC(19), PERIPH_A, 0); /* CC */ 1439 pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL;
1439 select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ 1440
1440 select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ 1441 /* LCDC on port C */
1441 select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ 1442 for (i = 19; i < 32; i++) {
1442 select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ 1443 if (pin_mask & (1ULL << i))
1443 select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ 1444 at32_select_periph(GPIO_PIOC_BASE + i,
1444 select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ 1445 GPIO_PERIPH_A, 0);
1445 select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ 1446 }
1446 select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ 1447
1447 select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ 1448 /* LCDC on port D */
1448 select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ 1449 for (i = 0; i < 18; i++) {
1449 select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ 1450 if (pin_mask & (1ULL << i))
1450 select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ 1451 at32_select_periph(GPIO_PIOD_BASE + i,
1451 select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ 1452 GPIO_PERIPH_A, 0);
1452 select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ 1453 }
1453 select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ 1454
1454 select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ 1455 /* LCDC on port E */
1455 select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ 1456 for (i = 0; i < 19; i++) {
1456 select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ 1457 if (pin_mask & (1ULL << (i + 32)))
1457 select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ 1458 at32_select_periph(GPIO_PIOE_BASE + i,
1458 select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ 1459 GPIO_PERIPH_B, 0);
1459 select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
1460 select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
1461 select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
1462 select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
1463 select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
1464 select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
1465 select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
1466 select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
1467 select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
1468 select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
1469 break;
1470 case 1:
1471 select_peripheral(PE(0), PERIPH_B, 0); /* CC */
1472 select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
1473 select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
1474 select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
1475 select_peripheral(PE(1), PERIPH_B, 0); /* DVAL */
1476 select_peripheral(PE(2), PERIPH_B, 0); /* MODE */
1477 select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
1478 select_peripheral(PE(3), PERIPH_B, 0); /* DATA0 */
1479 select_peripheral(PE(4), PERIPH_B, 0); /* DATA1 */
1480 select_peripheral(PE(5), PERIPH_B, 0); /* DATA2 */
1481 select_peripheral(PE(6), PERIPH_B, 0); /* DATA3 */
1482 select_peripheral(PE(7), PERIPH_B, 0); /* DATA4 */
1483 select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
1484 select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
1485 select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
1486 select_peripheral(PE(8), PERIPH_B, 0); /* DATA8 */
1487 select_peripheral(PE(9), PERIPH_B, 0); /* DATA9 */
1488 select_peripheral(PE(10), PERIPH_B, 0); /* DATA10 */
1489 select_peripheral(PE(11), PERIPH_B, 0); /* DATA11 */
1490 select_peripheral(PE(12), PERIPH_B, 0); /* DATA12 */
1491 select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
1492 select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
1493 select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
1494 select_peripheral(PE(13), PERIPH_B, 0); /* DATA16 */
1495 select_peripheral(PE(14), PERIPH_B, 0); /* DATA17 */
1496 select_peripheral(PE(15), PERIPH_B, 0); /* DATA18 */
1497 select_peripheral(PE(16), PERIPH_B, 0); /* DATA19 */
1498 select_peripheral(PE(17), PERIPH_B, 0); /* DATA20 */
1499 select_peripheral(PE(18), PERIPH_B, 0); /* DATA21 */
1500 select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
1501 select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
1502 break;
1503 default:
1504 goto err_invalid_id;
1505 } 1460 }
1506 1461
1507 clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); 1462 clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
@@ -2125,7 +2080,7 @@ static struct clk gclk4 = {
2125 .index = 4, 2080 .index = 4,
2126}; 2081};
2127 2082
2128struct clk *at32_clock_list[] = { 2083static __initdata struct clk *init_clocks[] = {
2129 &osc32k, 2084 &osc32k,
2130 &osc0, 2085 &osc0,
2131 &osc1, 2086 &osc1,
@@ -2189,7 +2144,6 @@ struct clk *at32_clock_list[] = {
2189 &gclk3, 2144 &gclk3,
2190 &gclk4, 2145 &gclk4,
2191}; 2146};
2192unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
2193 2147
2194void __init setup_platform(void) 2148void __init setup_platform(void)
2195{ 2149{
@@ -2220,14 +2174,19 @@ void __init setup_platform(void)
2220 genclk_init_parent(&abdac0_sample_clk); 2174 genclk_init_parent(&abdac0_sample_clk);
2221 2175
2222 /* 2176 /*
2223 * Turn on all clocks that have at least one user already, and 2177 * Build initial dynamic clock list by registering all clocks
2224 * turn off everything else. We only do this for module 2178 * from the array.
2225 * clocks, and even though it isn't particularly pretty to 2179 * At the same time, turn on all clocks that have at least one
2226 * check the address of the mode function, it should do the 2180 * user already, and turn off everything else. We only do this
2227 * trick... 2181 * for module clocks, and even though it isn't particularly
2182 * pretty to check the address of the mode function, it should
2183 * do the trick...
2228 */ 2184 */
2229 for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { 2185 for (i = 0; i < ARRAY_SIZE(init_clocks); i++) {
2230 struct clk *clk = at32_clock_list[i]; 2186 struct clk *clk = init_clocks[i];
2187
2188 /* first, register clock */
2189 at32_clk_register(clk);
2231 2190
2232 if (clk->users == 0) 2191 if (clk->users == 0)
2233 continue; 2192 continue;
diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
index 6c27ddac5adf..138a00a2a2d0 100644
--- a/arch/avr32/mach-at32ap/clock.c
+++ b/arch/avr32/mach-at32ap/clock.c
@@ -15,24 +15,40 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/string.h> 17#include <linux/string.h>
18#include <linux/list.h>
18 19
19#include <mach/chip.h> 20#include <mach/chip.h>
20 21
21#include "clock.h" 22#include "clock.h"
22 23
24/* at32 clock list */
25static LIST_HEAD(at32_clock_list);
26
23static DEFINE_SPINLOCK(clk_lock); 27static DEFINE_SPINLOCK(clk_lock);
28static DEFINE_SPINLOCK(clk_list_lock);
29
30void at32_clk_register(struct clk *clk)
31{
32 spin_lock(&clk_list_lock);
33 /* add the new item to the end of the list */
34 list_add_tail(&clk->list, &at32_clock_list);
35 spin_unlock(&clk_list_lock);
36}
24 37
25struct clk *clk_get(struct device *dev, const char *id) 38struct clk *clk_get(struct device *dev, const char *id)
26{ 39{
27 int i; 40 struct clk *clk;
28 41
29 for (i = 0; i < at32_nr_clocks; i++) { 42 spin_lock(&clk_list_lock);
30 struct clk *clk = at32_clock_list[i];
31 43
32 if (clk->dev == dev && strcmp(id, clk->name) == 0) 44 list_for_each_entry(clk, &at32_clock_list, list) {
45 if (clk->dev == dev && strcmp(id, clk->name) == 0) {
46 spin_unlock(&clk_list_lock);
33 return clk; 47 return clk;
48 }
34 } 49 }
35 50
51 spin_unlock(&clk_list_lock);
36 return ERR_PTR(-ENOENT); 52 return ERR_PTR(-ENOENT);
37} 53}
38EXPORT_SYMBOL(clk_get); 54EXPORT_SYMBOL(clk_get);
@@ -203,8 +219,8 @@ dump_clock(struct clk *parent, struct clkinf *r)
203 219
204 /* cost of this scan is small, but not linear... */ 220 /* cost of this scan is small, but not linear... */
205 r->nest = nest + NEST_DELTA; 221 r->nest = nest + NEST_DELTA;
206 for (i = 3; i < at32_nr_clocks; i++) { 222
207 clk = at32_clock_list[i]; 223 list_for_each_entry(clk, &at32_clock_list, list) {
208 if (clk->parent == parent) 224 if (clk->parent == parent)
209 dump_clock(clk, r); 225 dump_clock(clk, r);
210 } 226 }
@@ -215,6 +231,7 @@ static int clk_show(struct seq_file *s, void *unused)
215{ 231{
216 struct clkinf r; 232 struct clkinf r;
217 int i; 233 int i;
234 struct clk *clk;
218 235
219 /* show all the power manager registers */ 236 /* show all the power manager registers */
220 seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL)); 237 seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL));
@@ -234,14 +251,25 @@ static int clk_show(struct seq_file *s, void *unused)
234 251
235 seq_printf(s, "\n"); 252 seq_printf(s, "\n");
236 253
237 /* show clock tree as derived from the three oscillators
238 * we "know" are at the head of the list
239 */
240 r.s = s; 254 r.s = s;
241 r.nest = 0; 255 r.nest = 0;
242 dump_clock(at32_clock_list[0], &r); 256 /* protected from changes on the list while dumping */
243 dump_clock(at32_clock_list[1], &r); 257 spin_lock(&clk_list_lock);
244 dump_clock(at32_clock_list[2], &r); 258
259 /* show clock tree as derived from the three oscillators */
260 clk = clk_get(NULL, "osc32k");
261 dump_clock(clk, &r);
262 clk_put(clk);
263
264 clk = clk_get(NULL, "osc0");
265 dump_clock(clk, &r);
266 clk_put(clk);
267
268 clk = clk_get(NULL, "osc1");
269 dump_clock(clk, &r);
270 clk_put(clk);
271
272 spin_unlock(&clk_list_lock);
245 273
246 return 0; 274 return 0;
247} 275}
diff --git a/arch/avr32/mach-at32ap/clock.h b/arch/avr32/mach-at32ap/clock.h
index bb8e1f295835..623bf0e9a1e7 100644
--- a/arch/avr32/mach-at32ap/clock.h
+++ b/arch/avr32/mach-at32ap/clock.h
@@ -12,8 +12,13 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/list.h>
16
17
18void at32_clk_register(struct clk *clk);
15 19
16struct clk { 20struct clk {
21 struct list_head list; /* linking element */
17 const char *name; /* Clock name/function */ 22 const char *name; /* Clock name/function */
18 struct device *dev; /* Device the clock is used by */ 23 struct device *dev; /* Device the clock is used by */
19 struct clk *parent; /* Parent clock, if any */ 24 struct clk *parent; /* Parent clock, if any */
@@ -25,6 +30,3 @@ struct clk {
25 u16 users; /* Enabled if non-zero */ 30 u16 users; /* Enabled if non-zero */
26 u16 index; /* Sibling index */ 31 u16 index; /* Sibling index */
27}; 32};
28
29extern struct clk *at32_clock_list[];
30extern unsigned int at32_nr_clocks;
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
index 1e9852d65cca..a77d372f6f3e 100644
--- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
+++ b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
@@ -83,4 +83,132 @@
83#define HMATRIX_BASE 0xfff00800 83#define HMATRIX_BASE 0xfff00800
84#define SDRAMC_BASE 0xfff03800 84#define SDRAMC_BASE 0xfff03800
85 85
86/* LCDC on port C */
87#define ATMEL_LCDC_PC_CC (1ULL << 19)
88#define ATMEL_LCDC_PC_HSYNC (1ULL << 20)
89#define ATMEL_LCDC_PC_PCLK (1ULL << 21)
90#define ATMEL_LCDC_PC_VSYNC (1ULL << 22)
91#define ATMEL_LCDC_PC_DVAL (1ULL << 23)
92#define ATMEL_LCDC_PC_MODE (1ULL << 24)
93#define ATMEL_LCDC_PC_PWR (1ULL << 25)
94#define ATMEL_LCDC_PC_DATA0 (1ULL << 26)
95#define ATMEL_LCDC_PC_DATA1 (1ULL << 27)
96#define ATMEL_LCDC_PC_DATA2 (1ULL << 28)
97#define ATMEL_LCDC_PC_DATA3 (1ULL << 29)
98#define ATMEL_LCDC_PC_DATA4 (1ULL << 30)
99#define ATMEL_LCDC_PC_DATA5 (1ULL << 31)
100
101/* LCDC on port D */
102#define ATMEL_LCDC_PD_DATA6 (1ULL << 0)
103#define ATMEL_LCDC_PD_DATA7 (1ULL << 1)
104#define ATMEL_LCDC_PD_DATA8 (1ULL << 2)
105#define ATMEL_LCDC_PD_DATA9 (1ULL << 3)
106#define ATMEL_LCDC_PD_DATA10 (1ULL << 4)
107#define ATMEL_LCDC_PD_DATA11 (1ULL << 5)
108#define ATMEL_LCDC_PD_DATA12 (1ULL << 6)
109#define ATMEL_LCDC_PD_DATA13 (1ULL << 7)
110#define ATMEL_LCDC_PD_DATA14 (1ULL << 8)
111#define ATMEL_LCDC_PD_DATA15 (1ULL << 9)
112#define ATMEL_LCDC_PD_DATA16 (1ULL << 10)
113#define ATMEL_LCDC_PD_DATA17 (1ULL << 11)
114#define ATMEL_LCDC_PD_DATA18 (1ULL << 12)
115#define ATMEL_LCDC_PD_DATA19 (1ULL << 13)
116#define ATMEL_LCDC_PD_DATA20 (1ULL << 14)
117#define ATMEL_LCDC_PD_DATA21 (1ULL << 15)
118#define ATMEL_LCDC_PD_DATA22 (1ULL << 16)
119#define ATMEL_LCDC_PD_DATA23 (1ULL << 17)
120
121/* LCDC on port E */
122#define ATMEL_LCDC_PE_CC (1ULL << (32 + 0))
123#define ATMEL_LCDC_PE_DVAL (1ULL << (32 + 1))
124#define ATMEL_LCDC_PE_MODE (1ULL << (32 + 2))
125#define ATMEL_LCDC_PE_DATA0 (1ULL << (32 + 3))
126#define ATMEL_LCDC_PE_DATA1 (1ULL << (32 + 4))
127#define ATMEL_LCDC_PE_DATA2 (1ULL << (32 + 5))
128#define ATMEL_LCDC_PE_DATA3 (1ULL << (32 + 6))
129#define ATMEL_LCDC_PE_DATA4 (1ULL << (32 + 7))
130#define ATMEL_LCDC_PE_DATA8 (1ULL << (32 + 8))
131#define ATMEL_LCDC_PE_DATA9 (1ULL << (32 + 9))
132#define ATMEL_LCDC_PE_DATA10 (1ULL << (32 + 10))
133#define ATMEL_LCDC_PE_DATA11 (1ULL << (32 + 11))
134#define ATMEL_LCDC_PE_DATA12 (1ULL << (32 + 12))
135#define ATMEL_LCDC_PE_DATA16 (1ULL << (32 + 13))
136#define ATMEL_LCDC_PE_DATA17 (1ULL << (32 + 14))
137#define ATMEL_LCDC_PE_DATA18 (1ULL << (32 + 15))
138#define ATMEL_LCDC_PE_DATA19 (1ULL << (32 + 16))
139#define ATMEL_LCDC_PE_DATA20 (1ULL << (32 + 17))
140#define ATMEL_LCDC_PE_DATA21 (1ULL << (32 + 18))
141
142
143#define ATMEL_LCDC(PORT, PIN) (ATMEL_LCDC_##PORT##_##PIN)
144
145
146#define ATMEL_LCDC_PRI_24B_DATA ( \
147 ATMEL_LCDC(PC, DATA0) | ATMEL_LCDC(PC, DATA1) | \
148 ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \
149 ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \
150 ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
151 ATMEL_LCDC(PD, DATA8) | ATMEL_LCDC(PD, DATA9) | \
152 ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \
153 ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) | \
154 ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
155 ATMEL_LCDC(PD, DATA16) | ATMEL_LCDC(PD, DATA17) | \
156 ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) | \
157 ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) | \
158 ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
159
160#define ATMEL_LCDC_ALT_24B_DATA ( \
161 ATMEL_LCDC(PE, DATA0) | ATMEL_LCDC(PE, DATA1) | \
162 ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \
163 ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \
164 ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
165 ATMEL_LCDC(PE, DATA8) | ATMEL_LCDC(PE, DATA9) | \
166 ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \
167 ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) | \
168 ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
169 ATMEL_LCDC(PE, DATA16) | ATMEL_LCDC(PE, DATA17) | \
170 ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) | \
171 ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) | \
172 ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
173
174#define ATMEL_LCDC_PRI_15B_DATA ( \
175 ATMEL_LCDC(PC, DATA0) | ATMEL_LCDC(PC, DATA1) | \
176 ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \
177 ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \
178 ATMEL_LCDC(PD, DATA8) | ATMEL_LCDC(PD, DATA9) | \
179 ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \
180 ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA16) | \
181 ATMEL_LCDC(PD, DATA17) | ATMEL_LCDC(PD, DATA18) | \
182 ATMEL_LCDC(PD, DATA19) | ATMEL_LCDC(PD, DATA20))
183
184#define ATMEL_LCDC_ALT_15B_DATA ( \
185 ATMEL_LCDC(PE, DATA0) | ATMEL_LCDC(PE, DATA1) | \
186 ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \
187 ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \
188 ATMEL_LCDC(PE, DATA8) | ATMEL_LCDC(PE, DATA9) | \
189 ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \
190 ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PE, DATA16) | \
191 ATMEL_LCDC(PE, DATA17) | ATMEL_LCDC(PE, DATA18) | \
192 ATMEL_LCDC(PE, DATA19) | ATMEL_LCDC(PE, DATA20))
193
194#define ATMEL_LCDC_PRI_CONTROL ( \
195 ATMEL_LCDC(PC, CC) | ATMEL_LCDC(PC, DVAL) | \
196 ATMEL_LCDC(PC, MODE) | ATMEL_LCDC(PC, PWR))
197
198#define ATMEL_LCDC_ALT_CONTROL ( \
199 ATMEL_LCDC(PE, CC) | ATMEL_LCDC(PE, DVAL) | \
200 ATMEL_LCDC(PE, MODE) | ATMEL_LCDC(PC, PWR))
201
202#define ATMEL_LCDC_CONTROL ( \
203 ATMEL_LCDC(PC, HSYNC) | ATMEL_LCDC(PC, VSYNC) | \
204 ATMEL_LCDC(PC, PCLK))
205
206#define ATMEL_LCDC_PRI_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_24B_DATA)
207
208#define ATMEL_LCDC_ALT_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_24B_DATA)
209
210#define ATMEL_LCDC_PRI_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_15B_DATA)
211
212#define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)
213
86#endif /* __ASM_ARCH_AT32AP700X_H__ */ 214#endif /* __ASM_ARCH_AT32AP700X_H__ */
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h
index e60e9076544d..c48386d66bc3 100644
--- a/arch/avr32/mach-at32ap/include/mach/board.h
+++ b/arch/avr32/mach-at32ap/include/mach/board.h
@@ -43,7 +43,7 @@ struct atmel_lcdfb_info;
43struct platform_device * 43struct platform_device *
44at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, 44at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
45 unsigned long fbmem_start, unsigned long fbmem_len, 45 unsigned long fbmem_start, unsigned long fbmem_len,
46 unsigned int pin_config); 46 u64 pin_mask);
47 47
48struct usba_platform_data; 48struct usba_platform_data;
49struct platform_device * 49struct platform_device *
diff --git a/arch/avr32/mach-at32ap/include/mach/io.h b/arch/avr32/mach-at32ap/include/mach/io.h
index 4ec6abc68ea3..22ea79b74052 100644
--- a/arch/avr32/mach-at32ap/include/mach/io.h
+++ b/arch/avr32/mach-at32ap/include/mach/io.h
@@ -1,8 +1,7 @@
1#ifndef __ASM_AVR32_ARCH_AT32AP_IO_H 1#ifndef __ASM_AVR32_ARCH_AT32AP_IO_H
2#define __ASM_AVR32_ARCH_AT32AP_IO_H 2#define __ASM_AVR32_ARCH_AT32AP_IO_H
3 3
4/* For "bizarre" halfword swapping */ 4#include <linux/swab.h>
5#include <linux/byteorder/swabb.h>
6 5
7#if defined(CONFIG_AP700X_32_BIT_SMC) 6#if defined(CONFIG_AP700X_32_BIT_SMC)
8# define __swizzle_addr_b(addr) (addr ^ 3UL) 7# define __swizzle_addr_b(addr) (addr ^ 3UL)
diff --git a/arch/avr32/mach-at32ap/include/mach/portmux.h b/arch/avr32/mach-at32ap/include/mach/portmux.h
index b1abe6b4e4ef..4bbf99ec2c43 100644
--- a/arch/avr32/mach-at32ap/include/mach/portmux.h
+++ b/arch/avr32/mach-at32ap/include/mach/portmux.h
@@ -24,6 +24,7 @@
24void at32_select_periph(unsigned int pin, unsigned int periph, 24void at32_select_periph(unsigned int pin, unsigned int periph,
25 unsigned long flags); 25 unsigned long flags);
26void at32_select_gpio(unsigned int pin, unsigned long flags); 26void at32_select_gpio(unsigned int pin, unsigned long flags);
27void at32_deselect_pin(unsigned int pin);
27void at32_reserve_pin(unsigned int pin); 28void at32_reserve_pin(unsigned int pin);
28 29
29#endif /* __ASM_ARCH_PORTMUX_H__ */ 30#endif /* __ASM_ARCH_PORTMUX_H__ */
diff --git a/arch/avr32/mach-at32ap/pdc.c b/arch/avr32/mach-at32ap/pdc.c
index 1040bda4fda7..61ab15aae970 100644
--- a/arch/avr32/mach-at32ap/pdc.c
+++ b/arch/avr32/mach-at32ap/pdc.c
@@ -35,7 +35,6 @@ static int __init pdc_probe(struct platform_device *pdev)
35} 35}
36 36
37static struct platform_driver pdc_driver = { 37static struct platform_driver pdc_driver = {
38 .probe = pdc_probe,
39 .driver = { 38 .driver = {
40 .name = "pdc", 39 .name = "pdc",
41 }, 40 },
@@ -43,6 +42,6 @@ static struct platform_driver pdc_driver = {
43 42
44static int __init pdc_init(void) 43static int __init pdc_init(void)
45{ 44{
46 return platform_driver_register(&pdc_driver); 45 return platform_driver_probe(&pdc_driver, pdc_probe);
47} 46}
48arch_initcall(pdc_init); 47arch_initcall(pdc_init);
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index 405ee6bad4ce..ef2561e15399 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -134,6 +134,25 @@ fail:
134 dump_stack(); 134 dump_stack();
135} 135}
136 136
137/*
138 * Undo a previous pin reservation. Will not affect the hardware
139 * configuration.
140 */
141void at32_deselect_pin(unsigned int pin)
142{
143 struct pio_device *pio;
144 unsigned int pin_index = pin & 0x1f;
145
146 pio = gpio_to_pio(pin);
147 if (unlikely(!pio)) {
148 printk("pio: invalid pin %u\n", pin);
149 dump_stack();
150 return;
151 }
152
153 clear_bit(pin_index, &pio->pinmux_mask);
154}
155
137/* Reserve a pin, preventing anyone else from changing its configuration. */ 156/* Reserve a pin, preventing anyone else from changing its configuration. */
138void __init at32_reserve_pin(unsigned int pin) 157void __init at32_reserve_pin(unsigned int pin)
139{ 158{
@@ -382,7 +401,6 @@ static int __init pio_probe(struct platform_device *pdev)
382} 401}
383 402
384static struct platform_driver pio_driver = { 403static struct platform_driver pio_driver = {
385 .probe = pio_probe,
386 .driver = { 404 .driver = {
387 .name = "pio", 405 .name = "pio",
388 }, 406 },
@@ -390,7 +408,7 @@ static struct platform_driver pio_driver = {
390 408
391static int __init pio_init(void) 409static int __init pio_init(void)
392{ 410{
393 return platform_driver_register(&pio_driver); 411 return platform_driver_probe(&pio_driver, pio_probe);
394} 412}
395postcore_initcall(pio_init); 413postcore_initcall(pio_init);
396 414
diff --git a/arch/avr32/oprofile/Makefile b/arch/avr32/oprofile/Makefile
index 1fe81c3c1e86..e0eb520e0287 100644
--- a/arch/avr32/oprofile/Makefile
+++ b/arch/avr32/oprofile/Makefile
@@ -5,4 +5,4 @@ oprofile-y := $(addprefix ../../../drivers/oprofile/, \
5 event_buffer.o oprofile_files.o \ 5 event_buffer.o oprofile_files.o \
6 oprofilefs.o oprofile_stats.o \ 6 oprofilefs.o oprofile_stats.o \
7 timer_int.o) 7 timer_int.o)
8oprofile-y += op_model_avr32.o 8oprofile-y += op_model_avr32.o backtrace.o
diff --git a/arch/avr32/oprofile/backtrace.c b/arch/avr32/oprofile/backtrace.c
new file mode 100644
index 000000000000..75d9ad6f99cf
--- /dev/null
+++ b/arch/avr32/oprofile/backtrace.c
@@ -0,0 +1,81 @@
1/*
2 * AVR32 specific backtracing code for oprofile
3 *
4 * Copyright 2008 Weinmann GmbH
5 *
6 * Author: Nikolaus Voss <n.voss@weinmann.de>
7 *
8 * Based on i386 oprofile backtrace code by John Levon and David Smith
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15
16#include <linux/oprofile.h>
17#include <linux/sched.h>
18#include <linux/uaccess.h>
19
20/* The first two words of each frame on the stack look like this if we have
21 * frame pointers */
22struct frame_head {
23 unsigned long lr;
24 struct frame_head *fp;
25};
26
27/* copied from arch/avr32/kernel/process.c */
28static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
29{
30 return (p > (unsigned long)tinfo)
31 && (p < (unsigned long)tinfo + THREAD_SIZE - 3);
32}
33
34/* copied from arch/x86/oprofile/backtrace.c */
35static struct frame_head *dump_user_backtrace(struct frame_head *head)
36{
37 struct frame_head bufhead[2];
38
39 /* Also check accessibility of one struct frame_head beyond */
40 if (!access_ok(VERIFY_READ, head, sizeof(bufhead)))
41 return NULL;
42 if (__copy_from_user_inatomic(bufhead, head, sizeof(bufhead)))
43 return NULL;
44
45 oprofile_add_trace(bufhead[0].lr);
46
47 /* frame pointers should strictly progress back up the stack
48 * (towards higher addresses) */
49 if (bufhead[0].fp <= head)
50 return NULL;
51
52 return bufhead[0].fp;
53}
54
55void avr32_backtrace(struct pt_regs * const regs, unsigned int depth)
56{
57 /* Get first frame pointer */
58 struct frame_head *head = (struct frame_head *)(regs->r7);
59
60 if (!user_mode(regs)) {
61#ifdef CONFIG_FRAME_POINTER
62 /*
63 * Traverse the kernel stack from frame to frame up to
64 * "depth" steps.
65 */
66 while (depth-- && valid_stack_ptr(task_thread_info(current),
67 (unsigned long)head)) {
68 oprofile_add_trace(head->lr);
69 if (head->fp <= head)
70 break;
71 head = head->fp;
72 }
73#endif
74 } else {
75 /* Assume we have frame pointers in user mode process */
76 while (depth-- && head)
77 head = dump_user_backtrace(head);
78 }
79}
80
81
diff --git a/arch/avr32/oprofile/op_model_avr32.c b/arch/avr32/oprofile/op_model_avr32.c
index df42325c7f81..a3e9b3c4845a 100644
--- a/arch/avr32/oprofile/op_model_avr32.c
+++ b/arch/avr32/oprofile/op_model_avr32.c
@@ -22,6 +22,8 @@
22#define AVR32_PERFCTR_IRQ_GROUP 0 22#define AVR32_PERFCTR_IRQ_GROUP 0
23#define AVR32_PERFCTR_IRQ_LINE 1 23#define AVR32_PERFCTR_IRQ_LINE 1
24 24
25void avr32_backtrace(struct pt_regs * const regs, unsigned int depth);
26
25enum { PCCNT, PCNT0, PCNT1, NR_counter }; 27enum { PCCNT, PCNT0, PCNT1, NR_counter };
26 28
27struct avr32_perf_counter { 29struct avr32_perf_counter {
@@ -223,6 +225,8 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
223 memcpy(ops, &avr32_perf_counter_ops, 225 memcpy(ops, &avr32_perf_counter_ops,
224 sizeof(struct oprofile_operations)); 226 sizeof(struct oprofile_operations));
225 227
228 ops->backtrace = avr32_backtrace;
229
226 printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n"); 230 printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
227 231
228 return 0; 232 return 0;