diff options
| -rw-r--r-- | drivers/rtc/rtc-s5m.c | 7 | ||||
| -rw-r--r-- | include/linux/mfd/samsung/rtc.h | 10 |
2 files changed, 17 insertions, 0 deletions
diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 22137d4dbadf..3751ef90f93c 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c | |||
| @@ -519,6 +519,13 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) | |||
| 519 | u8 data[2]; | 519 | u8 data[2]; |
| 520 | int ret; | 520 | int ret; |
| 521 | 521 | ||
| 522 | /* UDR update time. Default of 7.32 ms is too long. */ | ||
| 523 | ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON, | ||
| 524 | S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US); | ||
| 525 | if (ret < 0) | ||
| 526 | dev_err(info->dev, "%s: fail to change UDR time: %d\n", | ||
| 527 | __func__, ret); | ||
| 528 | |||
| 522 | /* Set RTC control register : Binary mode, 24hour mode */ | 529 | /* Set RTC control register : Binary mode, 24hour mode */ |
| 523 | data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | 530 | data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); |
| 524 | data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | 531 | data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); |
diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h index 207fcfbde82e..b6401e7661c7 100644 --- a/include/linux/mfd/samsung/rtc.h +++ b/include/linux/mfd/samsung/rtc.h | |||
| @@ -111,6 +111,16 @@ enum s2mps_rtc_reg { | |||
| 111 | #define RTC_TCON_MASK (1 << RTC_TCON_SHIFT) | 111 | #define RTC_TCON_MASK (1 << RTC_TCON_SHIFT) |
| 112 | #define S5M_RTC_TIME_EN_SHIFT 3 | 112 | #define S5M_RTC_TIME_EN_SHIFT 3 |
| 113 | #define S5M_RTC_TIME_EN_MASK (1 << S5M_RTC_TIME_EN_SHIFT) | 113 | #define S5M_RTC_TIME_EN_MASK (1 << S5M_RTC_TIME_EN_SHIFT) |
| 114 | /* | ||
| 115 | * UDR_T field in S5M_RTC_UDR_CON register determines the time needed | ||
| 116 | * for updating alarm and time registers. Default is 7.32 ms. | ||
| 117 | */ | ||
| 118 | #define S5M_RTC_UDR_T_SHIFT 6 | ||
| 119 | #define S5M_RTC_UDR_T_MASK (0x3 << S5M_RTC_UDR_T_SHIFT) | ||
| 120 | #define S5M_RTC_UDR_T_7320_US (0x0 << S5M_RTC_UDR_T_SHIFT) | ||
| 121 | #define S5M_RTC_UDR_T_1830_US (0x1 << S5M_RTC_UDR_T_SHIFT) | ||
| 122 | #define S5M_RTC_UDR_T_3660_US (0x2 << S5M_RTC_UDR_T_SHIFT) | ||
| 123 | #define S5M_RTC_UDR_T_450_US (0x3 << S5M_RTC_UDR_T_SHIFT) | ||
| 114 | 124 | ||
| 115 | /* RTC Hour register */ | 125 | /* RTC Hour register */ |
| 116 | #define HOUR_PM_SHIFT 6 | 126 | #define HOUR_PM_SHIFT 6 |
