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-rw-r--r--drivers/clocksource/sh_tmu.c19
1 files changed, 8 insertions, 11 deletions
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index 36aba9923060..808135768617 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -199,8 +199,12 @@ static cycle_t sh_tmu_clocksource_read(struct clocksource *cs)
199static int sh_tmu_clocksource_enable(struct clocksource *cs) 199static int sh_tmu_clocksource_enable(struct clocksource *cs)
200{ 200{
201 struct sh_tmu_priv *p = cs_to_sh_tmu(cs); 201 struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
202 int ret;
202 203
203 return sh_tmu_enable(p); 204 ret = sh_tmu_enable(p);
205 if (!ret)
206 __clocksource_updatefreq_hz(cs, p->rate);
207 return ret;
204} 208}
205 209
206static void sh_tmu_clocksource_disable(struct clocksource *cs) 210static void sh_tmu_clocksource_disable(struct clocksource *cs)
@@ -221,17 +225,10 @@ static int sh_tmu_register_clocksource(struct sh_tmu_priv *p,
221 cs->mask = CLOCKSOURCE_MASK(32); 225 cs->mask = CLOCKSOURCE_MASK(32);
222 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; 226 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
223 227
224 /* clk_get_rate() needs an enabled clock */
225 clk_enable(p->clk);
226 /* channel will be configured at parent clock / 4 */
227 p->rate = clk_get_rate(p->clk) / 4;
228 clk_disable(p->clk);
229 /* TODO: calculate good shift from rate and counter bit width */
230 cs->shift = 10;
231 cs->mult = clocksource_hz2mult(p->rate, cs->shift);
232
233 dev_info(&p->pdev->dev, "used as clock source\n"); 228 dev_info(&p->pdev->dev, "used as clock source\n");
234 clocksource_register(cs); 229
230 /* Register with dummy 1 Hz value, gets updated in ->enable() */
231 clocksource_register_hz(cs, 1);
235 return 0; 232 return 0;
236} 233}
237 234