diff options
| -rw-r--r-- | drivers/net/ethernet/ibm/emac/mal.c | 5 | ||||
| -rw-r--r-- | drivers/net/ethernet/ibm/emac/mal.h | 20 |
2 files changed, 9 insertions, 16 deletions
diff --git a/drivers/net/ethernet/ibm/emac/mal.c b/drivers/net/ethernet/ibm/emac/mal.c index 9d75fef6396f..63eb959a28aa 100644 --- a/drivers/net/ethernet/ibm/emac/mal.c +++ b/drivers/net/ethernet/ibm/emac/mal.c | |||
| @@ -682,10 +682,7 @@ static int mal_probe(struct platform_device *ofdev) | |||
| 682 | goto fail6; | 682 | goto fail6; |
| 683 | 683 | ||
| 684 | /* Enable all MAL SERR interrupt sources */ | 684 | /* Enable all MAL SERR interrupt sources */ |
| 685 | if (mal->version == 2) | 685 | set_mal_dcrn(mal, MAL_IER, MAL_IER_EVENTS); |
| 686 | set_mal_dcrn(mal, MAL_IER, MAL2_IER_EVENTS); | ||
| 687 | else | ||
| 688 | set_mal_dcrn(mal, MAL_IER, MAL1_IER_EVENTS); | ||
| 689 | 686 | ||
| 690 | /* Enable EOB interrupt */ | 687 | /* Enable EOB interrupt */ |
| 691 | mal_enable_eob_irq(mal); | 688 | mal_enable_eob_irq(mal); |
diff --git a/drivers/net/ethernet/ibm/emac/mal.h b/drivers/net/ethernet/ibm/emac/mal.h index e431a32e3d69..eeade2ea8334 100644 --- a/drivers/net/ethernet/ibm/emac/mal.h +++ b/drivers/net/ethernet/ibm/emac/mal.h | |||
| @@ -95,24 +95,20 @@ | |||
| 95 | 95 | ||
| 96 | 96 | ||
| 97 | #define MAL_IER 0x02 | 97 | #define MAL_IER 0x02 |
| 98 | /* MAL IER bits */ | ||
| 98 | #define MAL_IER_DE 0x00000010 | 99 | #define MAL_IER_DE 0x00000010 |
| 99 | #define MAL_IER_OTE 0x00000004 | 100 | #define MAL_IER_OTE 0x00000004 |
| 100 | #define MAL_IER_OE 0x00000002 | 101 | #define MAL_IER_OE 0x00000002 |
| 101 | #define MAL_IER_PE 0x00000001 | 102 | #define MAL_IER_PE 0x00000001 |
| 102 | /* MAL V1 IER bits */ | ||
| 103 | #define MAL1_IER_NWE 0x00000008 | ||
| 104 | #define MAL1_IER_SOC_EVENTS MAL1_IER_NWE | ||
| 105 | #define MAL1_IER_EVENTS (MAL1_IER_SOC_EVENTS | MAL_IER_DE | \ | ||
| 106 | MAL_IER_OTE | MAL_IER_OE | MAL_IER_PE) | ||
| 107 | 103 | ||
| 108 | /* MAL V2 IER bits */ | 104 | /* PLB read/write/timeout errors */ |
| 109 | #define MAL2_IER_PT 0x00000080 | 105 | #define MAL_IER_PTE 0x00000080 |
| 110 | #define MAL2_IER_PRE 0x00000040 | 106 | #define MAL_IER_PRE 0x00000040 |
| 111 | #define MAL2_IER_PWE 0x00000020 | 107 | #define MAL_IER_PWE 0x00000020 |
| 112 | #define MAL2_IER_SOC_EVENTS (MAL2_IER_PT | MAL2_IER_PRE | MAL2_IER_PWE) | ||
| 113 | #define MAL2_IER_EVENTS (MAL2_IER_SOC_EVENTS | MAL_IER_DE | \ | ||
| 114 | MAL_IER_OTE | MAL_IER_OE | MAL_IER_PE) | ||
| 115 | 108 | ||
| 109 | #define MAL_IER_SOC_EVENTS (MAL_IER_PTE | MAL_IER_PRE | MAL_IER_PWE) | ||
| 110 | #define MAL_IER_EVENTS (MAL_IER_SOC_EVENTS | MAL_IER_DE | \ | ||
| 111 | MAL_IER_OTE | MAL_IER_OE | MAL_IER_PE) | ||
| 116 | 112 | ||
| 117 | #define MAL_TXCASR 0x04 | 113 | #define MAL_TXCASR 0x04 |
| 118 | #define MAL_TXCARR 0x05 | 114 | #define MAL_TXCARR 0x05 |
