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-rw-r--r--Documentation/DocBook/v4l/io.xml3
-rw-r--r--Documentation/DocBook/v4l/vidioc-qbuf.xml40
-rw-r--r--Documentation/DocBook/v4l/vidioc-querybuf.xml7
-rw-r--r--Documentation/DocBook/v4l/vidioc-reqbufs.xml36
-rw-r--r--Documentation/cachetlb.txt24
-rw-r--r--Documentation/dvb/get_dvb_firmware23
-rw-r--r--Documentation/scsi/ChangeLog.megaraid_sas16
-rw-r--r--Documentation/video4linux/CARDLIST.cx238851
-rw-r--r--Documentation/video4linux/CARDLIST.saa71341
-rw-r--r--Documentation/video4linux/CARDLIST.tuner1
-rw-r--r--Documentation/video4linux/README.tlg230047
-rw-r--r--Documentation/video4linux/gspca.txt25
-rw-r--r--Documentation/video4linux/v4l2-framework.txt106
-rw-r--r--Documentation/video4linux/videobuf360
-rw-r--r--MAINTAINERS53
-rw-r--r--arch/arm/include/asm/cacheflush.h10
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c71
-rw-r--r--arch/arm/mach-davinci/dm355.c43
-rw-r--r--arch/arm/mach-davinci/dm365.c102
-rw-r--r--arch/arm/mach-davinci/dm644x.c21
-rw-r--r--arch/arm/mach-davinci/include/mach/dm365.h2
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c8
-rw-r--r--arch/arm/mach-pxa/include/mach/camera.h2
-rw-r--r--arch/parisc/include/asm/cacheflush.h12
-rw-r--r--arch/s390/crypto/aes_s390.c6
-rw-r--r--arch/sh/Kconfig32
-rw-r--r--arch/sh/Kconfig.cpu3
-rw-r--r--arch/sh/Makefile10
-rw-r--r--arch/sh/boards/Kconfig8
-rw-r--r--arch/sh/boards/Makefile1
-rw-r--r--arch/sh/boards/board-magicpanelr2.c74
-rw-r--r--arch/sh/boards/board-polaris.c37
-rw-r--r--arch/sh/boards/board-sh7785lcr.c32
-rw-r--r--arch/sh/boards/board-shmin.c4
-rw-r--r--arch/sh/boards/board-titan.c (renamed from arch/sh/boards/mach-titan/setup.c)24
-rw-r--r--arch/sh/boards/board-urquell.c46
-rw-r--r--arch/sh/boards/mach-ap325rxa/setup.c24
-rw-r--r--arch/sh/boards/mach-cayman/irq.c16
-rw-r--r--arch/sh/boards/mach-dreamcast/irq.c27
-rw-r--r--arch/sh/boards/mach-dreamcast/rtc.c20
-rw-r--r--arch/sh/boards/mach-dreamcast/setup.c18
-rw-r--r--arch/sh/boards/mach-ecovec24/sdram.S59
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c87
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7780mp.c2
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7780rp.c2
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7785rp.c16
-rw-r--r--arch/sh/boards/mach-highlander/psw.c4
-rw-r--r--arch/sh/boards/mach-highlander/setup.c14
-rw-r--r--arch/sh/boards/mach-hp6xx/hp6xx_apm.c2
-rw-r--r--arch/sh/boards/mach-hp6xx/pm.c38
-rw-r--r--arch/sh/boards/mach-hp6xx/setup.c12
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c16
-rw-r--r--arch/sh/boards/mach-landisk/gio.c12
-rw-r--r--arch/sh/boards/mach-landisk/irq.c6
-rw-r--r--arch/sh/boards/mach-landisk/psw.c4
-rw-r--r--arch/sh/boards/mach-landisk/setup.c6
-rw-r--r--arch/sh/boards/mach-lboxre2/setup.c4
-rw-r--r--arch/sh/boards/mach-microdev/io.c4
-rw-r--r--arch/sh/boards/mach-microdev/irq.c10
-rw-r--r--arch/sh/boards/mach-migor/setup.c24
-rw-r--r--arch/sh/boards/mach-r2d/irq.c4
-rw-r--r--arch/sh/boards/mach-r2d/setup.c8
-rw-r--r--arch/sh/boards/mach-rsk/devices-rsk7203.c2
-rw-r--r--arch/sh/boards/mach-sdk7780/irq.c4
-rw-r--r--arch/sh/boards/mach-sdk7780/setup.c29
-rw-r--r--arch/sh/boards/mach-sdk7786/Makefile1
-rw-r--r--arch/sh/boards/mach-sdk7786/fpga.c72
-rw-r--r--arch/sh/boards/mach-sdk7786/irq.c48
-rw-r--r--arch/sh/boards/mach-sdk7786/setup.c189
-rw-r--r--arch/sh/boards/mach-se/7206/io.c2
-rw-r--r--arch/sh/boards/mach-se/7206/irq.c43
-rw-r--r--arch/sh/boards/mach-se/7206/setup.c15
-rw-r--r--arch/sh/boards/mach-se/7343/irq.c45
-rw-r--r--arch/sh/boards/mach-se/7343/setup.c43
-rw-r--r--arch/sh/boards/mach-se/770x/irq.c14
-rw-r--r--arch/sh/boards/mach-se/770x/setup.c15
-rw-r--r--arch/sh/boards/mach-se/7721/irq.c2
-rw-r--r--arch/sh/boards/mach-se/7721/setup.c23
-rw-r--r--arch/sh/boards/mach-se/7722/irq.c10
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c55
-rw-r--r--arch/sh/boards/mach-se/7724/irq.c62
-rw-r--r--arch/sh/boards/mach-se/7724/sdram.S79
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c114
-rw-r--r--arch/sh/boards/mach-se/7780/irq.c18
-rw-r--r--arch/sh/boards/mach-se/7780/setup.c47
-rw-r--r--arch/sh/boards/mach-sh03/rtc.c50
-rw-r--r--arch/sh/boards/mach-sh03/setup.c2
-rw-r--r--arch/sh/boards/mach-sh7763rdp/irq.c10
-rw-r--r--arch/sh/boards/mach-sh7763rdp/setup.c40
-rw-r--r--arch/sh/boards/mach-snapgear/setup.c2
-rw-r--r--arch/sh/boards/mach-systemh/irq.c12
-rw-r--r--arch/sh/boards/mach-titan/Makefile5
-rw-r--r--arch/sh/boards/mach-titan/io.c108
-rw-r--r--arch/sh/boards/mach-x3proto/ilsel.c8
-rw-r--r--arch/sh/boards/mach-x3proto/setup.c2
-rw-r--r--arch/sh/boot/Makefile30
-rw-r--r--arch/sh/boot/compressed/Makefile7
-rw-r--r--arch/sh/boot/compressed/misc.c23
-rw-r--r--arch/sh/cchips/hd6446x/hd64461.c36
-rw-r--r--arch/sh/configs/sdk7786_defconfig1754
-rw-r--r--arch/sh/drivers/dma/dma-pvr2.c10
-rw-r--r--arch/sh/drivers/dma/dma-sh.c31
-rw-r--r--arch/sh/drivers/dma/dmabrg.c22
-rw-r--r--arch/sh/drivers/heartbeat.c22
-rw-r--r--arch/sh/drivers/pci/Makefile5
-rw-r--r--arch/sh/drivers/pci/common.c162
-rw-r--r--arch/sh/drivers/pci/fixups-dreamcast.c2
-rw-r--r--arch/sh/drivers/pci/fixups-r7780rp.c12
-rw-r--r--arch/sh/drivers/pci/fixups-rts7751r2d.c4
-rw-r--r--arch/sh/drivers/pci/fixups-sdk7780.c19
-rw-r--r--arch/sh/drivers/pci/fixups-se7751.c6
-rw-r--r--arch/sh/drivers/pci/ops-sh4.c30
-rw-r--r--arch/sh/drivers/pci/pci-dreamcast.c32
-rw-r--r--arch/sh/drivers/pci/pci-sh4.h18
-rw-r--r--arch/sh/drivers/pci/pci-sh5.c19
-rw-r--r--arch/sh/drivers/pci/pci-sh5.h12
-rw-r--r--arch/sh/drivers/pci/pci-sh7751.c52
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c408
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.h64
-rw-r--r--arch/sh/drivers/pci/pci.c167
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.c205
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.h74
-rw-r--r--arch/sh/drivers/superhyway/ops-sh4-202.c8
-rw-r--r--arch/sh/include/asm/Kbuild4
-rw-r--r--arch/sh/include/asm/addrspace.h18
-rw-r--r--arch/sh/include/asm/alignment.h21
-rw-r--r--arch/sh/include/asm/atomic-grb.h46
-rw-r--r--arch/sh/include/asm/atomic-llsc.h27
-rw-r--r--arch/sh/include/asm/atomic.h73
-rw-r--r--arch/sh/include/asm/cacheflush.h8
-rw-r--r--arch/sh/include/asm/clock.h11
-rw-r--r--arch/sh/include/asm/cmpxchg-grb.h7
-rw-r--r--arch/sh/include/asm/dma-mapping.h2
-rw-r--r--arch/sh/include/asm/dma-sh.h55
-rw-r--r--arch/sh/include/asm/dwarf.h19
-rw-r--r--arch/sh/include/asm/fixmap.h15
-rw-r--r--arch/sh/include/asm/fpu.h35
-rw-r--r--arch/sh/include/asm/hw_breakpoint.h67
-rw-r--r--arch/sh/include/asm/io.h169
-rw-r--r--arch/sh/include/asm/kdebug.h2
-rw-r--r--arch/sh/include/asm/mmu.h49
-rw-r--r--arch/sh/include/asm/mmu_context.h6
-rw-r--r--arch/sh/include/asm/mmu_context_32.h4
-rw-r--r--arch/sh/include/asm/module.h17
-rw-r--r--arch/sh/include/asm/page.h19
-rw-r--r--arch/sh/include/asm/pci.h59
-rw-r--r--arch/sh/include/asm/pgalloc.h32
-rw-r--r--arch/sh/include/asm/pgtable-2level.h23
-rw-r--r--arch/sh/include/asm/pgtable-3level.h56
-rw-r--r--arch/sh/include/asm/pgtable.h26
-rw-r--r--arch/sh/include/asm/pgtable_32.h4
-rw-r--r--arch/sh/include/asm/pgtable_64.h26
-rw-r--r--arch/sh/include/asm/processor.h21
-rw-r--r--arch/sh/include/asm/processor_32.h35
-rw-r--r--arch/sh/include/asm/processor_64.h23
-rw-r--r--arch/sh/include/asm/ptrace.h20
-rw-r--r--arch/sh/include/asm/reboot.h21
-rw-r--r--arch/sh/include/asm/setup.h1
-rw-r--r--arch/sh/include/asm/sh_bios.h15
-rw-r--r--arch/sh/include/asm/suspend.h1
-rw-r--r--arch/sh/include/asm/system.h9
-rw-r--r--arch/sh/include/asm/system_32.h15
-rw-r--r--arch/sh/include/asm/system_64.h10
-rw-r--r--arch/sh/include/asm/thread_info.h10
-rw-r--r--arch/sh/include/asm/tlb.h17
-rw-r--r--arch/sh/include/asm/ubc.h64
-rw-r--r--arch/sh/include/asm/uncached.h18
-rw-r--r--arch/sh/include/asm/vmlinux.lds.h8
-rw-r--r--arch/sh/include/asm/watchdog.h18
-rw-r--r--arch/sh/include/cpu-sh2/cpu/ubc.h32
-rw-r--r--arch/sh/include/cpu-sh2/cpu/watchdog.h4
-rw-r--r--arch/sh/include/cpu-sh3/cpu/dac.h12
-rw-r--r--arch/sh/include/cpu-sh3/cpu/dma.h20
-rw-r--r--arch/sh/include/cpu-sh3/cpu/ubc.h42
-rw-r--r--arch/sh/include/cpu-sh4/cpu/addrspace.h9
-rw-r--r--arch/sh/include/cpu-sh4/cpu/dma-sh4a.h108
-rw-r--r--arch/sh/include/cpu-sh4/cpu/dma.h35
-rw-r--r--arch/sh/include/cpu-sh4/cpu/mmu_context.h4
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sq.h3
-rw-r--r--arch/sh/include/cpu-sh4/cpu/ubc.h64
-rw-r--r--arch/sh/include/mach-common/mach/magicpanelr2.h12
-rw-r--r--arch/sh/include/mach-dreamcast/mach/sysasic.h5
-rw-r--r--arch/sh/include/mach-sdk7786/mach/fpga.h114
-rw-r--r--arch/sh/include/mach-sdk7786/mach/irq.h7
-rw-r--r--arch/sh/include/mach-se/mach/se7343.h52
-rw-r--r--arch/sh/kernel/Makefile8
-rw-r--r--arch/sh/kernel/cpu/Makefile2
-rw-r--r--arch/sh/kernel/cpu/adc.c12
-rw-r--r--arch/sh/kernel/cpu/clock-cpg.c104
-rw-r--r--arch/sh/kernel/cpu/fpu.c84
-rw-r--r--arch/sh/kernel/cpu/init.c125
-rw-r--r--arch/sh/kernel/cpu/irq/intc-sh5.c14
-rw-r--r--arch/sh/kernel/cpu/sh2/clock-sh7619.c6
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7201.c8
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7203.c6
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7206.c8
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c111
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh3.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh7705.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh7706.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh7709.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh7710.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh7712.c6
-rw-r--r--arch/sh/kernel/cpu/sh3/ex.S2
-rw-r--r--arch/sh/kernel/cpu/sh3/probe.c28
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh3.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/clock-sh4-202.c10
-rw-r--r--arch/sh/kernel/cpu/sh4/clock-sh4.c8
-rw-r--r--arch/sh/kernel/cpu/sh4/fpu.c159
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c14
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh4-202.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/sq.c23
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile9
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7366.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c29
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c30
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c19
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7757.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7763.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7770.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7780.c10
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7785.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7786.c184
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-shx3.c10
-rw-r--r--arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c21
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c20
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c39
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c39
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c26
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c20
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c24
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c24
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c26
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c24
-rw-r--r--arch/sh/kernel/cpu/sh4a/smp-shx3.c5
-rw-r--r--arch/sh/kernel/cpu/sh4a/ubc.c133
-rw-r--r--arch/sh/kernel/cpu/sh5/clock-sh5.c8
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S6
-rw-r--r--arch/sh/kernel/cpu/sh5/fpu.c65
-rw-r--r--arch/sh/kernel/cpu/shmobile/pm.c3
-rw-r--r--arch/sh/kernel/cpu/shmobile/sleep.S121
-rw-r--r--arch/sh/kernel/debugtraps.S1
-rw-r--r--arch/sh/kernel/dwarf.c174
-rw-r--r--arch/sh/kernel/early_printk.c85
-rw-r--r--arch/sh/kernel/head_32.S221
-rw-r--r--arch/sh/kernel/head_64.S2
-rw-r--r--arch/sh/kernel/hw_breakpoint.c463
-rw-r--r--arch/sh/kernel/idle.c14
-rw-r--r--arch/sh/kernel/io_trapped.c18
-rw-r--r--arch/sh/kernel/kgdb.c46
-rw-r--r--arch/sh/kernel/machine_kexec.c16
-rw-r--r--arch/sh/kernel/process.c100
-rw-r--r--arch/sh/kernel/process_32.c164
-rw-r--r--arch/sh/kernel/process_64.c27
-rw-r--r--arch/sh/kernel/ptrace_32.c82
-rw-r--r--arch/sh/kernel/ptrace_64.c16
-rw-r--r--arch/sh/kernel/reboot.c98
-rw-r--r--arch/sh/kernel/setup.c12
-rw-r--r--arch/sh/kernel/sh_bios.c129
-rw-r--r--arch/sh/kernel/signal_32.c10
-rw-r--r--arch/sh/kernel/signal_64.c4
-rw-r--r--arch/sh/kernel/smp.c9
-rw-r--r--arch/sh/kernel/traps.c4
-rw-r--r--arch/sh/kernel/traps_32.c181
-rw-r--r--arch/sh/kernel/traps_64.c28
-rw-r--r--arch/sh/kernel/vmlinux.lds.S42
-rw-r--r--arch/sh/math-emu/math.c12
-rw-r--r--arch/sh/mm/Kconfig48
-rw-r--r--arch/sh/mm/Makefile12
-rw-r--r--arch/sh/mm/alignment.c189
-rw-r--r--arch/sh/mm/cache-debugfs.c7
-rw-r--r--arch/sh/mm/cache-sh2.c12
-rw-r--r--arch/sh/mm/cache-sh2a.c20
-rw-r--r--arch/sh/mm/cache-sh3.c6
-rw-r--r--arch/sh/mm/cache-sh4.c27
-rw-r--r--arch/sh/mm/cache-sh7705.c12
-rw-r--r--arch/sh/mm/cache.c13
-rw-r--r--arch/sh/mm/fault_32.c3
-rw-r--r--arch/sh/mm/init.c166
-rw-r--r--arch/sh/mm/ioremap.c (renamed from arch/sh/mm/ioremap_32.c)63
-rw-r--r--arch/sh/mm/ioremap_64.c326
-rw-r--r--arch/sh/mm/ioremap_fixed.c128
-rw-r--r--arch/sh/mm/nommu.c4
-rw-r--r--arch/sh/mm/pgtable.c56
-rw-r--r--arch/sh/mm/pmb.c586
-rw-r--r--arch/sh/mm/tlb-pteaex.c3
-rw-r--r--arch/sh/mm/tlb-sh3.c6
-rw-r--r--arch/sh/mm/tlb-sh4.c13
-rw-r--r--arch/sh/mm/tlb-sh5.c39
-rw-r--r--arch/sh/mm/tlb-urb.c81
-rw-r--r--arch/sh/mm/tlbflush_32.c4
-rw-r--r--arch/sh/mm/tlbflush_64.c2
-rw-r--r--arch/sh/mm/uncached.c34
-rw-r--r--arch/sh/tools/mach-types1
-rw-r--r--arch/x86/mm/kmemcheck/kmemcheck.c2
-rw-r--r--arch/x86/mm/kmemcheck/shadow.c16
-rw-r--r--arch/x86/mm/kmemcheck/shadow.h2
-rw-r--r--crypto/Kconfig10
-rw-r--r--crypto/Makefile1
-rw-r--r--crypto/ablkcipher.c4
-rw-r--r--crypto/aead.c4
-rw-r--r--crypto/aes_generic.c4
-rw-r--r--crypto/algapi.c4
-rw-r--r--crypto/anubis.c22
-rw-r--r--crypto/api.c13
-rw-r--r--crypto/authenc.c10
-rw-r--r--crypto/blowfish.c18
-rw-r--r--crypto/camellia.c616
-rw-r--r--crypto/cast5.c14
-rw-r--r--crypto/cast6.c122
-rw-r--r--crypto/cipher.c2
-rw-r--r--crypto/compress.c4
-rw-r--r--crypto/crc32c.c6
-rw-r--r--crypto/crypto_null.c8
-rw-r--r--crypto/deflate.c20
-rw-r--r--crypto/des_generic.c3
-rw-r--r--crypto/ecb.c2
-rw-r--r--crypto/fcrypt.c6
-rw-r--r--crypto/gcm.c287
-rw-r--r--crypto/md5.c40
-rw-r--r--crypto/pcrypt.c445
-rw-r--r--crypto/testmgr.c84
-rw-r--r--drivers/char/hw_random/Kconfig12
-rw-r--r--drivers/char/hw_random/Makefile1
-rw-r--r--drivers/char/hw_random/nomadik-rng.c103
-rw-r--r--drivers/clocksource/sh_cmt.c32
-rw-r--r--drivers/clocksource/sh_mtu2.c6
-rw-r--r--drivers/clocksource/sh_tmu.c6
-rw-r--r--drivers/crypto/amcc/crypto4xx_core.c2
-rw-r--r--drivers/crypto/geode-aes.c8
-rw-r--r--drivers/crypto/talitos.c2
-rw-r--r--drivers/dma/shdma.c411
-rw-r--r--drivers/dma/shdma.h7
-rw-r--r--drivers/firmware/iscsi_ibft.c8
-rw-r--r--drivers/media/IR/Makefile2
-rw-r--r--drivers/media/IR/ir-functions.c2
-rw-r--r--drivers/media/IR/ir-keymaps.c99
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-rw-r--r--drivers/scsi/megaraid/megaraid_sas.c246
-rw-r--r--drivers/scsi/megaraid/megaraid_sas.h36
-rw-r--r--drivers/scsi/mpt2sas/Kconfig1
-rw-r--r--drivers/scsi/mpt2sas/mpi/mpi2.h16
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-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_scsih.c266
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844 files changed, 51843 insertions, 14828 deletions
diff --git a/Documentation/DocBook/v4l/io.xml b/Documentation/DocBook/v4l/io.xml
index f92f24323b2a..e870330cbf77 100644
--- a/Documentation/DocBook/v4l/io.xml
+++ b/Documentation/DocBook/v4l/io.xml
@@ -589,7 +589,8 @@ number of a video input as in &v4l2-input; field
589 <entry></entry> 589 <entry></entry>
590 <entry>A place holder for future extensions and custom 590 <entry>A place holder for future extensions and custom
591(driver defined) buffer types 591(driver defined) buffer types
592<constant>V4L2_BUF_TYPE_PRIVATE</constant> and higher.</entry> 592<constant>V4L2_BUF_TYPE_PRIVATE</constant> and higher. Applications
593should set this to 0.</entry>
593 </row> 594 </row>
594 </tbody> 595 </tbody>
595 </tgroup> 596 </tgroup>
diff --git a/Documentation/DocBook/v4l/vidioc-qbuf.xml b/Documentation/DocBook/v4l/vidioc-qbuf.xml
index 187081778154..b843bd7b3897 100644
--- a/Documentation/DocBook/v4l/vidioc-qbuf.xml
+++ b/Documentation/DocBook/v4l/vidioc-qbuf.xml
@@ -54,12 +54,10 @@ to enqueue an empty (capturing) or filled (output) buffer in the
54driver's incoming queue. The semantics depend on the selected I/O 54driver's incoming queue. The semantics depend on the selected I/O
55method.</para> 55method.</para>
56 56
57 <para>To enqueue a <link linkend="mmap">memory mapped</link> 57 <para>To enqueue a buffer applications set the <structfield>type</structfield>
58buffer applications set the <structfield>type</structfield> field of a 58field of a &v4l2-buffer; to the same buffer type as was previously used
59&v4l2-buffer; to the same buffer type as previously &v4l2-format; 59with &v4l2-format; <structfield>type</structfield> and &v4l2-requestbuffers;
60<structfield>type</structfield> and &v4l2-requestbuffers; 60<structfield>type</structfield>. Applications must also set the
61<structfield>type</structfield>, the <structfield>memory</structfield>
62field to <constant>V4L2_MEMORY_MMAP</constant> and the
63<structfield>index</structfield> field. Valid index numbers range from 61<structfield>index</structfield> field. Valid index numbers range from
64zero to the number of buffers allocated with &VIDIOC-REQBUFS; 62zero to the number of buffers allocated with &VIDIOC-REQBUFS;
65(&v4l2-requestbuffers; <structfield>count</structfield>) minus one. The 63(&v4l2-requestbuffers; <structfield>count</structfield>) minus one. The
@@ -70,8 +68,19 @@ intended for output (<structfield>type</structfield> is
70<constant>V4L2_BUF_TYPE_VBI_OUTPUT</constant>) applications must also 68<constant>V4L2_BUF_TYPE_VBI_OUTPUT</constant>) applications must also
71initialize the <structfield>bytesused</structfield>, 69initialize the <structfield>bytesused</structfield>,
72<structfield>field</structfield> and 70<structfield>field</structfield> and
73<structfield>timestamp</structfield> fields. See <xref 71<structfield>timestamp</structfield> fields, see <xref
74 linkend="buffer" /> for details. When 72linkend="buffer" /> for details.
73Applications must also set <structfield>flags</structfield> to 0. If a driver
74supports capturing from specific video inputs and you want to specify a video
75input, then <structfield>flags</structfield> should be set to
76<constant>V4L2_BUF_FLAG_INPUT</constant> and the field
77<structfield>input</structfield> must be initialized to the desired input.
78The <structfield>reserved</structfield> field must be set to 0.
79</para>
80
81 <para>To enqueue a <link linkend="mmap">memory mapped</link>
82buffer applications set the <structfield>memory</structfield>
83field to <constant>V4L2_MEMORY_MMAP</constant>. When
75<constant>VIDIOC_QBUF</constant> is called with a pointer to this 84<constant>VIDIOC_QBUF</constant> is called with a pointer to this
76structure the driver sets the 85structure the driver sets the
77<constant>V4L2_BUF_FLAG_MAPPED</constant> and 86<constant>V4L2_BUF_FLAG_MAPPED</constant> and
@@ -81,14 +90,10 @@ structure the driver sets the
81&EINVAL;.</para> 90&EINVAL;.</para>
82 91
83 <para>To enqueue a <link linkend="userp">user pointer</link> 92 <para>To enqueue a <link linkend="userp">user pointer</link>
84buffer applications set the <structfield>type</structfield> field of a 93buffer applications set the <structfield>memory</structfield>
85&v4l2-buffer; to the same buffer type as previously &v4l2-format; 94field to <constant>V4L2_MEMORY_USERPTR</constant>, the
86<structfield>type</structfield> and &v4l2-requestbuffers;
87<structfield>type</structfield>, the <structfield>memory</structfield>
88field to <constant>V4L2_MEMORY_USERPTR</constant> and the
89<structfield>m.userptr</structfield> field to the address of the 95<structfield>m.userptr</structfield> field to the address of the
90buffer and <structfield>length</structfield> to its size. When the 96buffer and <structfield>length</structfield> to its size.
91buffer is intended for output additional fields must be set as above.
92When <constant>VIDIOC_QBUF</constant> is called with a pointer to this 97When <constant>VIDIOC_QBUF</constant> is called with a pointer to this
93structure the driver sets the <constant>V4L2_BUF_FLAG_QUEUED</constant> 98structure the driver sets the <constant>V4L2_BUF_FLAG_QUEUED</constant>
94flag and clears the <constant>V4L2_BUF_FLAG_MAPPED</constant> and 99flag and clears the <constant>V4L2_BUF_FLAG_MAPPED</constant> and
@@ -96,13 +101,14 @@ flag and clears the <constant>V4L2_BUF_FLAG_MAPPED</constant> and
96<structfield>flags</structfield> field, or it returns an error code. 101<structfield>flags</structfield> field, or it returns an error code.
97This ioctl locks the memory pages of the buffer in physical memory, 102This ioctl locks the memory pages of the buffer in physical memory,
98they cannot be swapped out to disk. Buffers remain locked until 103they cannot be swapped out to disk. Buffers remain locked until
99dequeued, until the &VIDIOC-STREAMOFF; or &VIDIOC-REQBUFS; ioctl are 104dequeued, until the &VIDIOC-STREAMOFF; or &VIDIOC-REQBUFS; ioctl is
100called, or until the device is closed.</para> 105called, or until the device is closed.</para>
101 106
102 <para>Applications call the <constant>VIDIOC_DQBUF</constant> 107 <para>Applications call the <constant>VIDIOC_DQBUF</constant>
103ioctl to dequeue a filled (capturing) or displayed (output) buffer 108ioctl to dequeue a filled (capturing) or displayed (output) buffer
104from the driver's outgoing queue. They just set the 109from the driver's outgoing queue. They just set the
105<structfield>type</structfield> and <structfield>memory</structfield> 110<structfield>type</structfield>, <structfield>memory</structfield>
111and <structfield>reserved</structfield>
106fields of a &v4l2-buffer; as above, when <constant>VIDIOC_DQBUF</constant> 112fields of a &v4l2-buffer; as above, when <constant>VIDIOC_DQBUF</constant>
107is called with a pointer to this structure the driver fills the 113is called with a pointer to this structure the driver fills the
108remaining fields or returns an error code.</para> 114remaining fields or returns an error code.</para>
diff --git a/Documentation/DocBook/v4l/vidioc-querybuf.xml b/Documentation/DocBook/v4l/vidioc-querybuf.xml
index d834993e6191..e649805a4908 100644
--- a/Documentation/DocBook/v4l/vidioc-querybuf.xml
+++ b/Documentation/DocBook/v4l/vidioc-querybuf.xml
@@ -54,12 +54,13 @@ buffer at any time after buffers have been allocated with the
54&VIDIOC-REQBUFS; ioctl.</para> 54&VIDIOC-REQBUFS; ioctl.</para>
55 55
56 <para>Applications set the <structfield>type</structfield> field 56 <para>Applications set the <structfield>type</structfield> field
57 of a &v4l2-buffer; to the same buffer type as previously 57 of a &v4l2-buffer; to the same buffer type as was previously used with
58&v4l2-format; <structfield>type</structfield> and &v4l2-requestbuffers; 58&v4l2-format; <structfield>type</structfield> and &v4l2-requestbuffers;
59<structfield>type</structfield>, and the <structfield>index</structfield> 59<structfield>type</structfield>, and the <structfield>index</structfield>
60 field. Valid index numbers range from zero 60 field. Valid index numbers range from zero
61to the number of buffers allocated with &VIDIOC-REQBUFS; 61to the number of buffers allocated with &VIDIOC-REQBUFS;
62 (&v4l2-requestbuffers; <structfield>count</structfield>) minus one. 62 (&v4l2-requestbuffers; <structfield>count</structfield>) minus one.
63The <structfield>reserved</structfield> field should to set to 0.
63After calling <constant>VIDIOC_QUERYBUF</constant> with a pointer to 64After calling <constant>VIDIOC_QUERYBUF</constant> with a pointer to
64 this structure drivers return an error code or fill the rest of 65 this structure drivers return an error code or fill the rest of
65the structure.</para> 66the structure.</para>
@@ -68,8 +69,8 @@ the structure.</para>
68<constant>V4L2_BUF_FLAG_MAPPED</constant>, 69<constant>V4L2_BUF_FLAG_MAPPED</constant>,
69<constant>V4L2_BUF_FLAG_QUEUED</constant> and 70<constant>V4L2_BUF_FLAG_QUEUED</constant> and
70<constant>V4L2_BUF_FLAG_DONE</constant> flags will be valid. The 71<constant>V4L2_BUF_FLAG_DONE</constant> flags will be valid. The
71<structfield>memory</structfield> field will be set to 72<structfield>memory</structfield> field will be set to the current
72<constant>V4L2_MEMORY_MMAP</constant>, the <structfield>m.offset</structfield> 73I/O method, the <structfield>m.offset</structfield>
73contains the offset of the buffer from the start of the device memory, 74contains the offset of the buffer from the start of the device memory,
74the <structfield>length</structfield> field its size. The driver may 75the <structfield>length</structfield> field its size. The driver may
75or may not set the remaining fields and flags, they are meaningless in 76or may not set the remaining fields and flags, they are meaningless in
diff --git a/Documentation/DocBook/v4l/vidioc-reqbufs.xml b/Documentation/DocBook/v4l/vidioc-reqbufs.xml
index bab38084454f..1c0816372074 100644
--- a/Documentation/DocBook/v4l/vidioc-reqbufs.xml
+++ b/Documentation/DocBook/v4l/vidioc-reqbufs.xml
@@ -54,23 +54,23 @@ I/O. Memory mapped buffers are located in device memory and must be
54allocated with this ioctl before they can be mapped into the 54allocated with this ioctl before they can be mapped into the
55application's address space. User buffers are allocated by 55application's address space. User buffers are allocated by
56applications themselves, and this ioctl is merely used to switch the 56applications themselves, and this ioctl is merely used to switch the
57driver into user pointer I/O mode.</para> 57driver into user pointer I/O mode and to setup some internal structures.</para>
58 58
59 <para>To allocate device buffers applications initialize three 59 <para>To allocate device buffers applications initialize all
60fields of a <structname>v4l2_requestbuffers</structname> structure. 60fields of the <structname>v4l2_requestbuffers</structname> structure.
61They set the <structfield>type</structfield> field to the respective 61They set the <structfield>type</structfield> field to the respective
62stream or buffer type, the <structfield>count</structfield> field to 62stream or buffer type, the <structfield>count</structfield> field to
63the desired number of buffers, and <structfield>memory</structfield> 63the desired number of buffers, <structfield>memory</structfield>
64must be set to <constant>V4L2_MEMORY_MMAP</constant>. When the ioctl 64must be set to the requested I/O method and the reserved array
65is called with a pointer to this structure the driver attempts to 65must be zeroed. When the ioctl
66allocate the requested number of buffers and stores the actual number 66is called with a pointer to this structure the driver will attempt to allocate
67the requested number of buffers and it stores the actual number
67allocated in the <structfield>count</structfield> field. It can be 68allocated in the <structfield>count</structfield> field. It can be
68smaller than the number requested, even zero, when the driver runs out 69smaller than the number requested, even zero, when the driver runs out
69of free memory. A larger number is possible when the driver requires 70of free memory. A larger number is also possible when the driver requires
70more buffers to function correctly.<footnote> 71more buffers to function correctly. For example video output requires at least two buffers,
71 <para>For example video output requires at least two buffers,
72one displayed and one filled by the application.</para> 72one displayed and one filled by the application.</para>
73 </footnote> When memory mapping I/O is not supported the ioctl 73 <para>When the I/O method is not supported the ioctl
74returns an &EINVAL;.</para> 74returns an &EINVAL;.</para>
75 75
76 <para>Applications can call <constant>VIDIOC_REQBUFS</constant> 76 <para>Applications can call <constant>VIDIOC_REQBUFS</constant>
@@ -81,14 +81,6 @@ in progress, an implicit &VIDIOC-STREAMOFF;. <!-- mhs: I see no
81reason why munmap()ping one or even all buffers must imply 81reason why munmap()ping one or even all buffers must imply
82streamoff.--></para> 82streamoff.--></para>
83 83
84 <para>To negotiate user pointer I/O, applications initialize only
85the <structfield>type</structfield> field and set
86<structfield>memory</structfield> to
87<constant>V4L2_MEMORY_USERPTR</constant>. When the ioctl is called
88with a pointer to this structure the driver prepares for user pointer
89I/O, when this I/O method is not supported the ioctl returns an
90&EINVAL;.</para>
91
92 <table pgwide="1" frame="none" id="v4l2-requestbuffers"> 84 <table pgwide="1" frame="none" id="v4l2-requestbuffers">
93 <title>struct <structname>v4l2_requestbuffers</structname></title> 85 <title>struct <structname>v4l2_requestbuffers</structname></title>
94 <tgroup cols="3"> 86 <tgroup cols="3">
@@ -97,9 +89,7 @@ I/O, when this I/O method is not supported the ioctl returns an
97 <row> 89 <row>
98 <entry>__u32</entry> 90 <entry>__u32</entry>
99 <entry><structfield>count</structfield></entry> 91 <entry><structfield>count</structfield></entry>
100 <entry>The number of buffers requested or granted. This 92 <entry>The number of buffers requested or granted.</entry>
101field is only used when <structfield>memory</structfield> is set to
102<constant>V4L2_MEMORY_MMAP</constant>.</entry>
103 </row> 93 </row>
104 <row> 94 <row>
105 <entry>&v4l2-buf-type;</entry> 95 <entry>&v4l2-buf-type;</entry>
@@ -120,7 +110,7 @@ as the &v4l2-format; <structfield>type</structfield> field. See <xref
120 <entry><structfield>reserved</structfield>[2]</entry> 110 <entry><structfield>reserved</structfield>[2]</entry>
121 <entry>A place holder for future extensions and custom 111 <entry>A place holder for future extensions and custom
122(driver defined) buffer types <constant>V4L2_BUF_TYPE_PRIVATE</constant> and 112(driver defined) buffer types <constant>V4L2_BUF_TYPE_PRIVATE</constant> and
123higher.</entry> 113higher. This array should be zeroed by applications.</entry>
124 </row> 114 </row>
125 </tbody> 115 </tbody>
126 </tgroup> 116 </tgroup>
diff --git a/Documentation/cachetlb.txt b/Documentation/cachetlb.txt
index da42ab414c48..b231414bb8bc 100644
--- a/Documentation/cachetlb.txt
+++ b/Documentation/cachetlb.txt
@@ -377,3 +377,27 @@ maps this page at its virtual address.
377 All the functionality of flush_icache_page can be implemented in 377 All the functionality of flush_icache_page can be implemented in
378 flush_dcache_page and update_mmu_cache. In 2.7 the hope is to 378 flush_dcache_page and update_mmu_cache. In 2.7 the hope is to
379 remove this interface completely. 379 remove this interface completely.
380
381The final category of APIs is for I/O to deliberately aliased address
382ranges inside the kernel. Such aliases are set up by use of the
383vmap/vmalloc API. Since kernel I/O goes via physical pages, the I/O
384subsystem assumes that the user mapping and kernel offset mapping are
385the only aliases. This isn't true for vmap aliases, so anything in
386the kernel trying to do I/O to vmap areas must manually manage
387coherency. It must do this by flushing the vmap range before doing
388I/O and invalidating it after the I/O returns.
389
390 void flush_kernel_vmap_range(void *vaddr, int size)
391 flushes the kernel cache for a given virtual address range in
392 the vmap area. This is to make sure that any data the kernel
393 modified in the vmap range is made visible to the physical
394 page. The design is to make this area safe to perform I/O on.
395 Note that this API does *not* also flush the offset map alias
396 of the area.
397
398 void invalidate_kernel_vmap_range(void *vaddr, int size) invalidates
399 the cache for a given virtual address range in the vmap area
400 which prevents the processor from making the cache stale by
401 speculatively reading data while the I/O was occurring to the
402 physical pages. This is only necessary for data reads into the
403 vmap area.
diff --git a/Documentation/dvb/get_dvb_firmware b/Documentation/dvb/get_dvb_firmware
index 14b7b5a3bcb9..239cbdbf4d12 100644
--- a/Documentation/dvb/get_dvb_firmware
+++ b/Documentation/dvb/get_dvb_firmware
@@ -26,7 +26,7 @@ use IO::Handle;
26 "dec3000s", "vp7041", "dibusb", "nxt2002", "nxt2004", 26 "dec3000s", "vp7041", "dibusb", "nxt2002", "nxt2004",
27 "or51211", "or51132_qam", "or51132_vsb", "bluebird", 27 "or51211", "or51132_qam", "or51132_vsb", "bluebird",
28 "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718", 28 "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718",
29 "af9015"); 29 "af9015", "ngene");
30 30
31# Check args 31# Check args
32syntax() if (scalar(@ARGV) != 1); 32syntax() if (scalar(@ARGV) != 1);
@@ -39,7 +39,7 @@ for ($i=0; $i < scalar(@components); $i++) {
39 die $@ if $@; 39 die $@ if $@;
40 print STDERR <<EOF; 40 print STDERR <<EOF;
41Firmware(s) $outfile extracted successfully. 41Firmware(s) $outfile extracted successfully.
42Now copy it(they) to either /usr/lib/hotplug/firmware or /lib/firmware 42Now copy it(them) to either /usr/lib/hotplug/firmware or /lib/firmware
43(depending on configuration of firmware hotplug). 43(depending on configuration of firmware hotplug).
44EOF 44EOF
45 exit(0); 45 exit(0);
@@ -549,6 +549,24 @@ sub af9015 {
549 close INFILE; 549 close INFILE;
550} 550}
551 551
552sub ngene {
553 my $url = "http://www.digitaldevices.de/download/";
554 my $file1 = "ngene_15.fw";
555 my $hash1 = "d798d5a757121174f0dbc5f2833c0c85";
556 my $file2 = "ngene_17.fw";
557 my $hash2 = "26b687136e127b8ac24b81e0eeafc20b";
558
559 checkstandard();
560
561 wgetfile($file1, $url . $file1);
562 verify($file1, $hash1);
563
564 wgetfile($file2, $url . $file2);
565 verify($file2, $hash2);
566
567 "$file1, $file2";
568}
569
552# --------------------------------------------------------------- 570# ---------------------------------------------------------------
553# Utilities 571# Utilities
554 572
@@ -667,6 +685,7 @@ sub delzero{
667sub syntax() { 685sub syntax() {
668 print STDERR "syntax: get_dvb_firmware <component>\n"; 686 print STDERR "syntax: get_dvb_firmware <component>\n";
669 print STDERR "Supported components:\n"; 687 print STDERR "Supported components:\n";
688 @components = sort @components;
670 for($i=0; $i < scalar(@components); $i++) { 689 for($i=0; $i < scalar(@components); $i++) {
671 print STDERR "\t" . $components[$i] . "\n"; 690 print STDERR "\t" . $components[$i] . "\n";
672 } 691 }
diff --git a/Documentation/scsi/ChangeLog.megaraid_sas b/Documentation/scsi/ChangeLog.megaraid_sas
index 17ffa0607712..30023568805e 100644
--- a/Documentation/scsi/ChangeLog.megaraid_sas
+++ b/Documentation/scsi/ChangeLog.megaraid_sas
@@ -1,3 +1,19 @@
11 Release Date : Thur. Oct 29, 2009 09:12:45 PST 2009 -
2 (emaild-id:megaraidlinux@lsi.com)
3 Bo Yang
4
52 Current Version : 00.00.04.17.1-rc1
63 Older Version : 00.00.04.12
7
81. Add the pad_0 in mfi frame structure to 0 to fix the
9 context value larger than 32bit value issue.
10
112. Add the logic drive list to the driver. Driver will
12 keep the logic drive list internal after driver load.
13
143. driver fixed the device update issue after get the AEN
15 PD delete/ADD, LD add/delete from FW.
16
11 Release Date : Tues. July 28, 2009 10:12:45 PST 2009 - 171 Release Date : Tues. July 28, 2009 10:12:45 PST 2009 -
2 (emaild-id:megaraidlinux@lsi.com) 18 (emaild-id:megaraidlinux@lsi.com)
3 Bo Yang 19 Bo Yang
diff --git a/Documentation/video4linux/CARDLIST.cx23885 b/Documentation/video4linux/CARDLIST.cx23885
index 7539e8fa1ffd..16ca030e1185 100644
--- a/Documentation/video4linux/CARDLIST.cx23885
+++ b/Documentation/video4linux/CARDLIST.cx23885
@@ -26,3 +26,4 @@
26 25 -> Compro VideoMate E800 [1858:e800] 26 25 -> Compro VideoMate E800 [1858:e800]
27 26 -> Hauppauge WinTV-HVR1290 [0070:8551] 27 26 -> Hauppauge WinTV-HVR1290 [0070:8551]
28 27 -> Mygica X8558 PRO DMB-TH [14f1:8578] 28 27 -> Mygica X8558 PRO DMB-TH [14f1:8578]
29 28 -> LEADTEK WinFast PxTV1200 [107d:6f22]
diff --git a/Documentation/video4linux/CARDLIST.saa7134 b/Documentation/video4linux/CARDLIST.saa7134
index fce1e7eb0474..b4a767060ed7 100644
--- a/Documentation/video4linux/CARDLIST.saa7134
+++ b/Documentation/video4linux/CARDLIST.saa7134
@@ -174,3 +174,4 @@
174173 -> Zolid Hybrid TV Tuner PCI [1131:2004] 174173 -> Zolid Hybrid TV Tuner PCI [1131:2004]
175174 -> Asus Europa Hybrid OEM [1043:4847] 175174 -> Asus Europa Hybrid OEM [1043:4847]
176175 -> Leadtek Winfast DTV1000S [107d:6655] 176175 -> Leadtek Winfast DTV1000S [107d:6655]
177176 -> Beholder BeholdTV 505 RDS [0000:5051]
diff --git a/Documentation/video4linux/CARDLIST.tuner b/Documentation/video4linux/CARDLIST.tuner
index e0d298fe8830..9b2e0dd6017e 100644
--- a/Documentation/video4linux/CARDLIST.tuner
+++ b/Documentation/video4linux/CARDLIST.tuner
@@ -81,3 +81,4 @@ tuner=80 - Philips FQ1216LME MK3 PAL/SECAM w/active loopthrough
81tuner=81 - Partsnic (Daewoo) PTI-5NF05 81tuner=81 - Partsnic (Daewoo) PTI-5NF05
82tuner=82 - Philips CU1216L 82tuner=82 - Philips CU1216L
83tuner=83 - NXP TDA18271 83tuner=83 - NXP TDA18271
84tuner=84 - Sony BTF-Pxn01Z
diff --git a/Documentation/video4linux/README.tlg2300 b/Documentation/video4linux/README.tlg2300
new file mode 100644
index 000000000000..416ccb93d8c9
--- /dev/null
+++ b/Documentation/video4linux/README.tlg2300
@@ -0,0 +1,47 @@
1tlg2300 release notes
2====================
3
4This is a v4l2/dvb device driver for the tlg2300 chip.
5
6
7current status
8==============
9
10video
11 - support mmap and read().(no overlay)
12
13audio
14 - The driver will register a ALSA card for the audio input.
15
16vbi
17 - Works for almost TV norms.
18
19dvb-t
20 - works for DVB-T
21
22FM
23 - Works for radio.
24
25---------------------------------------------------------------------------
26TESTED APPLICATIONS:
27
28-VLC1.0.4 test the video and dvb. The GUI is friendly to use.
29
30-Mplayer test the video.
31
32-Mplayer test the FM. The mplayer should be compiled with --enable-radio and
33 --enable-radio-capture.
34 The command runs as this(The alsa audio registers to card 1):
35 #mplayer radio://103.7/capture/ -radio adevice=hw=1,0:arate=48000 \
36 -rawaudio rate=48000:channels=2
37
38---------------------------------------------------------------------------
39KNOWN PROBLEMS:
40about preemphasis:
41 You can set the preemphasis for radio by the following command:
42 #v4l2-ctl -d /dev/radio0 --set-ctrl=pre_emphasis_settings=1
43
44 "pre_emphasis_settings=1" means that you select the 50us. If you want
45 to select the 75us, please use "pre_emphasis_settings=2"
46
47
diff --git a/Documentation/video4linux/gspca.txt b/Documentation/video4linux/gspca.txt
index 1800a62cf135..181b9e6fd984 100644
--- a/Documentation/video4linux/gspca.txt
+++ b/Documentation/video4linux/gspca.txt
@@ -42,6 +42,7 @@ ov519 041e:4064 Creative Live! VISTA VF0420
42ov519 041e:4067 Creative Live! Cam Video IM (VF0350) 42ov519 041e:4067 Creative Live! Cam Video IM (VF0350)
43ov519 041e:4068 Creative Live! VISTA VF0470 43ov519 041e:4068 Creative Live! VISTA VF0470
44spca561 0458:7004 Genius VideoCAM Express V2 44spca561 0458:7004 Genius VideoCAM Express V2
45sn9c2028 0458:7005 Genius Smart 300, version 2
45sunplus 0458:7006 Genius Dsc 1.3 Smart 46sunplus 0458:7006 Genius Dsc 1.3 Smart
46zc3xx 0458:7007 Genius VideoCam V2 47zc3xx 0458:7007 Genius VideoCam V2
47zc3xx 0458:700c Genius VideoCam V3 48zc3xx 0458:700c Genius VideoCam V3
@@ -109,6 +110,7 @@ sunplus 04a5:3003 Benq DC 1300
109sunplus 04a5:3008 Benq DC 1500 110sunplus 04a5:3008 Benq DC 1500
110sunplus 04a5:300a Benq DC 3410 111sunplus 04a5:300a Benq DC 3410
111spca500 04a5:300c Benq DC 1016 112spca500 04a5:300c Benq DC 1016
113benq 04a5:3035 Benq DC E300
112finepix 04cb:0104 Fujifilm FinePix 4800 114finepix 04cb:0104 Fujifilm FinePix 4800
113finepix 04cb:0109 Fujifilm FinePix A202 115finepix 04cb:0109 Fujifilm FinePix A202
114finepix 04cb:010b Fujifilm FinePix A203 116finepix 04cb:010b Fujifilm FinePix A203
@@ -142,6 +144,7 @@ sunplus 04fc:5360 Sunplus Generic
142spca500 04fc:7333 PalmPixDC85 144spca500 04fc:7333 PalmPixDC85
143sunplus 04fc:ffff Pure DigitalDakota 145sunplus 04fc:ffff Pure DigitalDakota
144spca501 0506:00df 3Com HomeConnect Lite 146spca501 0506:00df 3Com HomeConnect Lite
147sunplus 052b:1507 Megapixel 5 Pretec DC-1007
145sunplus 052b:1513 Megapix V4 148sunplus 052b:1513 Megapix V4
146sunplus 052b:1803 MegaImage VI 149sunplus 052b:1803 MegaImage VI
147tv8532 0545:808b Veo Stingray 150tv8532 0545:808b Veo Stingray
@@ -151,6 +154,7 @@ sunplus 0546:3191 Polaroid Ion 80
151sunplus 0546:3273 Polaroid PDC2030 154sunplus 0546:3273 Polaroid PDC2030
152ov519 054c:0154 Sonny toy4 155ov519 054c:0154 Sonny toy4
153ov519 054c:0155 Sonny toy5 156ov519 054c:0155 Sonny toy5
157cpia1 0553:0002 CPIA CPiA (version1) based cameras
154zc3xx 055f:c005 Mustek Wcam300A 158zc3xx 055f:c005 Mustek Wcam300A
155spca500 055f:c200 Mustek Gsmart 300 159spca500 055f:c200 Mustek Gsmart 300
156sunplus 055f:c211 Kowa Bs888e Microcamera 160sunplus 055f:c211 Kowa Bs888e Microcamera
@@ -188,8 +192,7 @@ spca500 06bd:0404 Agfa CL20
188spca500 06be:0800 Optimedia 192spca500 06be:0800 Optimedia
189sunplus 06d6:0031 Trust 610 LCD PowerC@m Zoom 193sunplus 06d6:0031 Trust 610 LCD PowerC@m Zoom
190spca506 06e1:a190 ADS Instant VCD 194spca506 06e1:a190 ADS Instant VCD
191ov534 06f8:3002 Hercules Blog Webcam 195ov534_9 06f8:3003 Hercules Dualpix HD Weblog
192ov534 06f8:3003 Hercules Dualpix HD Weblog
193sonixj 06f8:3004 Hercules Classic Silver 196sonixj 06f8:3004 Hercules Classic Silver
194sonixj 06f8:3008 Hercules Deluxe Optical Glass 197sonixj 06f8:3008 Hercules Deluxe Optical Glass
195pac7302 06f8:3009 Hercules Classic Link 198pac7302 06f8:3009 Hercules Classic Link
@@ -204,6 +207,7 @@ sunplus 0733:2221 Mercury Digital Pro 3.1p
204sunplus 0733:3261 Concord 3045 spca536a 207sunplus 0733:3261 Concord 3045 spca536a
205sunplus 0733:3281 Cyberpix S550V 208sunplus 0733:3281 Cyberpix S550V
206spca506 0734:043b 3DeMon USB Capture aka 209spca506 0734:043b 3DeMon USB Capture aka
210cpia1 0813:0001 QX3 camera
207ov519 0813:0002 Dual Mode USB Camera Plus 211ov519 0813:0002 Dual Mode USB Camera Plus
208spca500 084d:0003 D-Link DSC-350 212spca500 084d:0003 D-Link DSC-350
209spca500 08ca:0103 Aiptek PocketDV 213spca500 08ca:0103 Aiptek PocketDV
@@ -225,7 +229,8 @@ sunplus 08ca:2050 Medion MD 41437
225sunplus 08ca:2060 Aiptek PocketDV5300 229sunplus 08ca:2060 Aiptek PocketDV5300
226tv8532 0923:010f ICM532 cams 230tv8532 0923:010f ICM532 cams
227mars 093a:050f Mars-Semi Pc-Camera 231mars 093a:050f Mars-Semi Pc-Camera
228mr97310a 093a:010f Sakar Digital no. 77379 232mr97310a 093a:010e All known CIF cams with this ID
233mr97310a 093a:010f All known VGA cams with this ID
229pac207 093a:2460 Qtec Webcam 100 234pac207 093a:2460 Qtec Webcam 100
230pac207 093a:2461 HP Webcam 235pac207 093a:2461 HP Webcam
231pac207 093a:2463 Philips SPC 220 NC 236pac207 093a:2463 Philips SPC 220 NC
@@ -302,6 +307,7 @@ sonixj 0c45:613b Surfer SN-206
302sonixj 0c45:613c Sonix Pccam168 307sonixj 0c45:613c Sonix Pccam168
303sonixj 0c45:6143 Sonix Pccam168 308sonixj 0c45:6143 Sonix Pccam168
304sonixj 0c45:6148 Digitus DA-70811/ZSMC USB PC Camera ZS211/Microdia 309sonixj 0c45:6148 Digitus DA-70811/ZSMC USB PC Camera ZS211/Microdia
310sonixj 0c45:614a Frontech E-Ccam (JIL-2225)
305sn9c20x 0c45:6240 PC Camera (SN9C201 + MT9M001) 311sn9c20x 0c45:6240 PC Camera (SN9C201 + MT9M001)
306sn9c20x 0c45:6242 PC Camera (SN9C201 + MT9M111) 312sn9c20x 0c45:6242 PC Camera (SN9C201 + MT9M111)
307sn9c20x 0c45:6248 PC Camera (SN9C201 + OV9655) 313sn9c20x 0c45:6248 PC Camera (SN9C201 + OV9655)
@@ -324,6 +330,10 @@ sn9c20x 0c45:62b0 PC Camera (SN9C202 + MT9V011/MT9V111/MT9V112)
324sn9c20x 0c45:62b3 PC Camera (SN9C202 + OV9655) 330sn9c20x 0c45:62b3 PC Camera (SN9C202 + OV9655)
325sn9c20x 0c45:62bb PC Camera (SN9C202 + OV7660) 331sn9c20x 0c45:62bb PC Camera (SN9C202 + OV7660)
326sn9c20x 0c45:62bc PC Camera (SN9C202 + HV7131R) 332sn9c20x 0c45:62bc PC Camera (SN9C202 + HV7131R)
333sn9c2028 0c45:8001 Wild Planet Digital Spy Camera
334sn9c2028 0c45:8003 Sakar #11199, #6637x, #67480 keychain cams
335sn9c2028 0c45:8008 Mini-Shotz ms-350
336sn9c2028 0c45:800a Vivitar Vivicam 3350B
327sunplus 0d64:0303 Sunplus FashionCam DXG 337sunplus 0d64:0303 Sunplus FashionCam DXG
328ov519 0e96:c001 TRUST 380 USB2 SPACEC@M 338ov519 0e96:c001 TRUST 380 USB2 SPACEC@M
329etoms 102c:6151 Qcam Sangha CIF 339etoms 102c:6151 Qcam Sangha CIF
@@ -341,10 +351,11 @@ spca501 1776:501c Arowana 300K CMOS Camera
341t613 17a1:0128 TASCORP JPEG Webcam, NGS Cyclops 351t613 17a1:0128 TASCORP JPEG Webcam, NGS Cyclops
342vc032x 17ef:4802 Lenovo Vc0323+MI1310_SOC 352vc032x 17ef:4802 Lenovo Vc0323+MI1310_SOC
343pac207 2001:f115 D-Link DSB-C120 353pac207 2001:f115 D-Link DSB-C120
344sq905c 2770:9050 sq905c 354sq905c 2770:9050 Disney pix micro (CIF)
345sq905c 2770:905c DualCamera 355sq905c 2770:9052 Disney pix micro 2 (VGA)
346sq905 2770:9120 Argus Digital Camera DC1512 356sq905c 2770:905c All 11 known cameras with this ID
347sq905c 2770:913d sq905c 357sq905 2770:9120 All 24 known cameras with this ID
358sq905c 2770:913d All 4 known cameras with this ID
348spca500 2899:012c Toptro Industrial 359spca500 2899:012c Toptro Industrial
349ov519 8020:ef04 ov519 360ov519 8020:ef04 ov519
350spca508 8086:0110 Intel Easy PC Camera 361spca508 8086:0110 Intel Easy PC Camera
diff --git a/Documentation/video4linux/v4l2-framework.txt b/Documentation/video4linux/v4l2-framework.txt
index 74d677c8b036..5155700c206b 100644
--- a/Documentation/video4linux/v4l2-framework.txt
+++ b/Documentation/video4linux/v4l2-framework.txt
@@ -599,99 +599,13 @@ video_device::minor fields.
599video buffer helper functions 599video buffer helper functions
600----------------------------- 600-----------------------------
601 601
602The v4l2 core API provides a standard method for dealing with video 602The v4l2 core API provides a set of standard methods (called "videobuf")
603buffers. Those methods allow a driver to implement read(), mmap() and 603for dealing with video buffers. Those methods allow a driver to implement
604overlay() on a consistent way. 604read(), mmap() and overlay() in a consistent way. There are currently
605 605methods for using video buffers on devices that supports DMA with
606There are currently methods for using video buffers on devices that 606scatter/gather method (videobuf-dma-sg), DMA with linear access
607supports DMA with scatter/gather method (videobuf-dma-sg), DMA with 607(videobuf-dma-contig), and vmalloced buffers, mostly used on USB drivers
608linear access (videobuf-dma-contig), and vmalloced buffers, mostly 608(videobuf-vmalloc).
609used on USB drivers (videobuf-vmalloc). 609
610 610Please see Documentation/video4linux/videobuf for more information on how
611Any driver using videobuf should provide operations (callbacks) for 611to use the videobuf layer.
612four handlers:
613
614ops->buf_setup - calculates the size of the video buffers and avoid they
615 to waste more than some maximum limit of RAM;
616ops->buf_prepare - fills the video buffer structs and calls
617 videobuf_iolock() to alloc and prepare mmaped memory;
618ops->buf_queue - advices the driver that another buffer were
619 requested (by read() or by QBUF);
620ops->buf_release - frees any buffer that were allocated.
621
622In order to use it, the driver need to have a code (generally called at
623interrupt context) that will properly handle the buffer request lists,
624announcing that a new buffer were filled.
625
626The irq handling code should handle the videobuf task lists, in order
627to advice videobuf that a new frame were filled, in order to honor to a
628request. The code is generally like this one:
629 if (list_empty(&dma_q->active))
630 return;
631
632 buf = list_entry(dma_q->active.next, struct vbuffer, vb.queue);
633
634 if (!waitqueue_active(&buf->vb.done))
635 return;
636
637 /* Some logic to handle the buf may be needed here */
638
639 list_del(&buf->vb.queue);
640 do_gettimeofday(&buf->vb.ts);
641 wake_up(&buf->vb.done);
642
643Those are the videobuffer functions used on drivers, implemented on
644videobuf-core:
645
646- Videobuf init functions
647 videobuf_queue_sg_init()
648 Initializes the videobuf infrastructure. This function should be
649 called before any other videobuf function on drivers that uses DMA
650 Scatter/Gather buffers.
651
652 videobuf_queue_dma_contig_init
653 Initializes the videobuf infrastructure. This function should be
654 called before any other videobuf function on drivers that need DMA
655 contiguous buffers.
656
657 videobuf_queue_vmalloc_init()
658 Initializes the videobuf infrastructure. This function should be
659 called before any other videobuf function on USB (and other drivers)
660 that need a vmalloced type of videobuf.
661
662- videobuf_iolock()
663 Prepares the videobuf memory for the proper method (read, mmap, overlay).
664
665- videobuf_queue_is_busy()
666 Checks if a videobuf is streaming.
667
668- videobuf_queue_cancel()
669 Stops video handling.
670
671- videobuf_mmap_free()
672 frees mmap buffers.
673
674- videobuf_stop()
675 Stops video handling, ends mmap and frees mmap and other buffers.
676
677- V4L2 api functions. Those functions correspond to VIDIOC_foo ioctls:
678 videobuf_reqbufs(), videobuf_querybuf(), videobuf_qbuf(),
679 videobuf_dqbuf(), videobuf_streamon(), videobuf_streamoff().
680
681- V4L1 api function (corresponds to VIDIOCMBUF ioctl):
682 videobuf_cgmbuf()
683 This function is used to provide backward compatibility with V4L1
684 API.
685
686- Some help functions for read()/poll() operations:
687 videobuf_read_stream()
688 For continuous stream read()
689 videobuf_read_one()
690 For snapshot read()
691 videobuf_poll_stream()
692 polling help function
693
694The better way to understand it is to take a look at vivi driver. One
695of the main reasons for vivi is to be a videobuf usage example. the
696vivi_thread_tick() does the task that the IRQ callback would do on PCI
697drivers (or the irq callback on USB).
diff --git a/Documentation/video4linux/videobuf b/Documentation/video4linux/videobuf
new file mode 100644
index 000000000000..17a1f9abf260
--- /dev/null
+++ b/Documentation/video4linux/videobuf
@@ -0,0 +1,360 @@
1An introduction to the videobuf layer
2Jonathan Corbet <corbet@lwn.net>
3Current as of 2.6.33
4
5The videobuf layer functions as a sort of glue layer between a V4L2 driver
6and user space. It handles the allocation and management of buffers for
7the storage of video frames. There is a set of functions which can be used
8to implement many of the standard POSIX I/O system calls, including read(),
9poll(), and, happily, mmap(). Another set of functions can be used to
10implement the bulk of the V4L2 ioctl() calls related to streaming I/O,
11including buffer allocation, queueing and dequeueing, and streaming
12control. Using videobuf imposes a few design decisions on the driver
13author, but the payback comes in the form of reduced code in the driver and
14a consistent implementation of the V4L2 user-space API.
15
16Buffer types
17
18Not all video devices use the same kind of buffers. In fact, there are (at
19least) three common variations:
20
21 - Buffers which are scattered in both the physical and (kernel) virtual
22 address spaces. (Almost) all user-space buffers are like this, but it
23 makes great sense to allocate kernel-space buffers this way as well when
24 it is possible. Unfortunately, it is not always possible; working with
25 this kind of buffer normally requires hardware which can do
26 scatter/gather DMA operations.
27
28 - Buffers which are physically scattered, but which are virtually
29 contiguous; buffers allocated with vmalloc(), in other words. These
30 buffers are just as hard to use for DMA operations, but they can be
31 useful in situations where DMA is not available but virtually-contiguous
32 buffers are convenient.
33
34 - Buffers which are physically contiguous. Allocation of this kind of
35 buffer can be unreliable on fragmented systems, but simpler DMA
36 controllers cannot deal with anything else.
37
38Videobuf can work with all three types of buffers, but the driver author
39must pick one at the outset and design the driver around that decision.
40
41[It's worth noting that there's a fourth kind of buffer: "overlay" buffers
42which are located within the system's video memory. The overlay
43functionality is considered to be deprecated for most use, but it still
44shows up occasionally in system-on-chip drivers where the performance
45benefits merit the use of this technique. Overlay buffers can be handled
46as a form of scattered buffer, but there are very few implementations in
47the kernel and a description of this technique is currently beyond the
48scope of this document.]
49
50Data structures, callbacks, and initialization
51
52Depending on which type of buffers are being used, the driver should
53include one of the following files:
54
55 <media/videobuf-dma-sg.h> /* Physically scattered */
56 <media/videobuf-vmalloc.h> /* vmalloc() buffers */
57 <media/videobuf-dma-contig.h> /* Physically contiguous */
58
59The driver's data structure describing a V4L2 device should include a
60struct videobuf_queue instance for the management of the buffer queue,
61along with a list_head for the queue of available buffers. There will also
62need to be an interrupt-safe spinlock which is used to protect (at least)
63the queue.
64
65The next step is to write four simple callbacks to help videobuf deal with
66the management of buffers:
67
68 struct videobuf_queue_ops {
69 int (*buf_setup)(struct videobuf_queue *q,
70 unsigned int *count, unsigned int *size);
71 int (*buf_prepare)(struct videobuf_queue *q,
72 struct videobuf_buffer *vb,
73 enum v4l2_field field);
74 void (*buf_queue)(struct videobuf_queue *q,
75 struct videobuf_buffer *vb);
76 void (*buf_release)(struct videobuf_queue *q,
77 struct videobuf_buffer *vb);
78 };
79
80buf_setup() is called early in the I/O process, when streaming is being
81initiated; its purpose is to tell videobuf about the I/O stream. The count
82parameter will be a suggested number of buffers to use; the driver should
83check it for rationality and adjust it if need be. As a practical rule, a
84minimum of two buffers are needed for proper streaming, and there is
85usually a maximum (which cannot exceed 32) which makes sense for each
86device. The size parameter should be set to the expected (maximum) size
87for each frame of data.
88
89Each buffer (in the form of a struct videobuf_buffer pointer) will be
90passed to buf_prepare(), which should set the buffer's size, width, height,
91and field fields properly. If the buffer's state field is
92VIDEOBUF_NEEDS_INIT, the driver should pass it to:
93
94 int videobuf_iolock(struct videobuf_queue* q, struct videobuf_buffer *vb,
95 struct v4l2_framebuffer *fbuf);
96
97Among other things, this call will usually allocate memory for the buffer.
98Finally, the buf_prepare() function should set the buffer's state to
99VIDEOBUF_PREPARED.
100
101When a buffer is queued for I/O, it is passed to buf_queue(), which should
102put it onto the driver's list of available buffers and set its state to
103VIDEOBUF_QUEUED. Note that this function is called with the queue spinlock
104held; if it tries to acquire it as well things will come to a screeching
105halt. Yes, this is the voice of experience. Note also that videobuf may
106wait on the first buffer in the queue; placing other buffers in front of it
107could again gum up the works. So use list_add_tail() to enqueue buffers.
108
109Finally, buf_release() is called when a buffer is no longer intended to be
110used. The driver should ensure that there is no I/O active on the buffer,
111then pass it to the appropriate free routine(s):
112
113 /* Scatter/gather drivers */
114 int videobuf_dma_unmap(struct videobuf_queue *q,
115 struct videobuf_dmabuf *dma);
116 int videobuf_dma_free(struct videobuf_dmabuf *dma);
117
118 /* vmalloc drivers */
119 void videobuf_vmalloc_free (struct videobuf_buffer *buf);
120
121 /* Contiguous drivers */
122 void videobuf_dma_contig_free(struct videobuf_queue *q,
123 struct videobuf_buffer *buf);
124
125One way to ensure that a buffer is no longer under I/O is to pass it to:
126
127 int videobuf_waiton(struct videobuf_buffer *vb, int non_blocking, int intr);
128
129Here, vb is the buffer, non_blocking indicates whether non-blocking I/O
130should be used (it should be zero in the buf_release() case), and intr
131controls whether an interruptible wait is used.
132
133File operations
134
135At this point, much of the work is done; much of the rest is slipping
136videobuf calls into the implementation of the other driver callbacks. The
137first step is in the open() function, which must initialize the
138videobuf queue. The function to use depends on the type of buffer used:
139
140 void videobuf_queue_sg_init(struct videobuf_queue *q,
141 struct videobuf_queue_ops *ops,
142 struct device *dev,
143 spinlock_t *irqlock,
144 enum v4l2_buf_type type,
145 enum v4l2_field field,
146 unsigned int msize,
147 void *priv);
148
149 void videobuf_queue_vmalloc_init(struct videobuf_queue *q,
150 struct videobuf_queue_ops *ops,
151 struct device *dev,
152 spinlock_t *irqlock,
153 enum v4l2_buf_type type,
154 enum v4l2_field field,
155 unsigned int msize,
156 void *priv);
157
158 void videobuf_queue_dma_contig_init(struct videobuf_queue *q,
159 struct videobuf_queue_ops *ops,
160 struct device *dev,
161 spinlock_t *irqlock,
162 enum v4l2_buf_type type,
163 enum v4l2_field field,
164 unsigned int msize,
165 void *priv);
166
167In each case, the parameters are the same: q is the queue structure for the
168device, ops is the set of callbacks as described above, dev is the device
169structure for this video device, irqlock is an interrupt-safe spinlock to
170protect access to the data structures, type is the buffer type used by the
171device (cameras will use V4L2_BUF_TYPE_VIDEO_CAPTURE, for example), field
172describes which field is being captured (often V4L2_FIELD_NONE for
173progressive devices), msize is the size of any containing structure used
174around struct videobuf_buffer, and priv is a private data pointer which
175shows up in the priv_data field of struct videobuf_queue. Note that these
176are void functions which, evidently, are immune to failure.
177
178V4L2 capture drivers can be written to support either of two APIs: the
179read() system call and the rather more complicated streaming mechanism. As
180a general rule, it is necessary to support both to ensure that all
181applications have a chance of working with the device. Videobuf makes it
182easy to do that with the same code. To implement read(), the driver need
183only make a call to one of:
184
185 ssize_t videobuf_read_one(struct videobuf_queue *q,
186 char __user *data, size_t count,
187 loff_t *ppos, int nonblocking);
188
189 ssize_t videobuf_read_stream(struct videobuf_queue *q,
190 char __user *data, size_t count,
191 loff_t *ppos, int vbihack, int nonblocking);
192
193Either one of these functions will read frame data into data, returning the
194amount actually read; the difference is that videobuf_read_one() will only
195read a single frame, while videobuf_read_stream() will read multiple frames
196if they are needed to satisfy the count requested by the application. A
197typical driver read() implementation will start the capture engine, call
198one of the above functions, then stop the engine before returning (though a
199smarter implementation might leave the engine running for a little while in
200anticipation of another read() call happening in the near future).
201
202The poll() function can usually be implemented with a direct call to:
203
204 unsigned int videobuf_poll_stream(struct file *file,
205 struct videobuf_queue *q,
206 poll_table *wait);
207
208Note that the actual wait queue eventually used will be the one associated
209with the first available buffer.
210
211When streaming I/O is done to kernel-space buffers, the driver must support
212the mmap() system call to enable user space to access the data. In many
213V4L2 drivers, the often-complex mmap() implementation simplifies to a
214single call to:
215
216 int videobuf_mmap_mapper(struct videobuf_queue *q,
217 struct vm_area_struct *vma);
218
219Everything else is handled by the videobuf code.
220
221The release() function requires two separate videobuf calls:
222
223 void videobuf_stop(struct videobuf_queue *q);
224 int videobuf_mmap_free(struct videobuf_queue *q);
225
226The call to videobuf_stop() terminates any I/O in progress - though it is
227still up to the driver to stop the capture engine. The call to
228videobuf_mmap_free() will ensure that all buffers have been unmapped; if
229so, they will all be passed to the buf_release() callback. If buffers
230remain mapped, videobuf_mmap_free() returns an error code instead. The
231purpose is clearly to cause the closing of the file descriptor to fail if
232buffers are still mapped, but every driver in the 2.6.32 kernel cheerfully
233ignores its return value.
234
235ioctl() operations
236
237The V4L2 API includes a very long list of driver callbacks to respond to
238the many ioctl() commands made available to user space. A number of these
239- those associated with streaming I/O - turn almost directly into videobuf
240calls. The relevant helper functions are:
241
242 int videobuf_reqbufs(struct videobuf_queue *q,
243 struct v4l2_requestbuffers *req);
244 int videobuf_querybuf(struct videobuf_queue *q, struct v4l2_buffer *b);
245 int videobuf_qbuf(struct videobuf_queue *q, struct v4l2_buffer *b);
246 int videobuf_dqbuf(struct videobuf_queue *q, struct v4l2_buffer *b,
247 int nonblocking);
248 int videobuf_streamon(struct videobuf_queue *q);
249 int videobuf_streamoff(struct videobuf_queue *q);
250 int videobuf_cgmbuf(struct videobuf_queue *q, struct video_mbuf *mbuf,
251 int count);
252
253So, for example, a VIDIOC_REQBUFS call turns into a call to the driver's
254vidioc_reqbufs() callback which, in turn, usually only needs to locate the
255proper struct videobuf_queue pointer and pass it to videobuf_reqbufs().
256These support functions can replace a great deal of buffer management
257boilerplate in a lot of V4L2 drivers.
258
259The vidioc_streamon() and vidioc_streamoff() functions will be a bit more
260complex, of course, since they will also need to deal with starting and
261stopping the capture engine. videobuf_cgmbuf(), called from the driver's
262vidiocgmbuf() function, only exists if the V4L1 compatibility module has
263been selected with CONFIG_VIDEO_V4L1_COMPAT, so its use must be surrounded
264with #ifdef directives.
265
266Buffer allocation
267
268Thus far, we have talked about buffers, but have not looked at how they are
269allocated. The scatter/gather case is the most complex on this front. For
270allocation, the driver can leave buffer allocation entirely up to the
271videobuf layer; in this case, buffers will be allocated as anonymous
272user-space pages and will be very scattered indeed. If the application is
273using user-space buffers, no allocation is needed; the videobuf layer will
274take care of calling get_user_pages() and filling in the scatterlist array.
275
276If the driver needs to do its own memory allocation, it should be done in
277the vidioc_reqbufs() function, *after* calling videobuf_reqbufs(). The
278first step is a call to:
279
280 struct videobuf_dmabuf *videobuf_to_dma(struct videobuf_buffer *buf);
281
282The returned videobuf_dmabuf structure (defined in
283<media/videobuf-dma-sg.h>) includes a couple of relevant fields:
284
285 struct scatterlist *sglist;
286 int sglen;
287
288The driver must allocate an appropriately-sized scatterlist array and
289populate it with pointers to the pieces of the allocated buffer; sglen
290should be set to the length of the array.
291
292Drivers using the vmalloc() method need not (and cannot) concern themselves
293with buffer allocation at all; videobuf will handle those details. The
294same is normally true of contiguous-DMA drivers as well; videobuf will
295allocate the buffers (with dma_alloc_coherent()) when it sees fit. That
296means that these drivers may be trying to do high-order allocations at any
297time, an operation which is not always guaranteed to work. Some drivers
298play tricks by allocating DMA space at system boot time; videobuf does not
299currently play well with those drivers.
300
301As of 2.6.31, contiguous-DMA drivers can work with a user-supplied buffer,
302as long as that buffer is physically contiguous. Normal user-space
303allocations will not meet that criterion, but buffers obtained from other
304kernel drivers, or those contained within huge pages, will work with these
305drivers.
306
307Filling the buffers
308
309The final part of a videobuf implementation has no direct callback - it's
310the portion of the code which actually puts frame data into the buffers,
311usually in response to interrupts from the device. For all types of
312drivers, this process works approximately as follows:
313
314 - Obtain the next available buffer and make sure that somebody is actually
315 waiting for it.
316
317 - Get a pointer to the memory and put video data there.
318
319 - Mark the buffer as done and wake up the process waiting for it.
320
321Step (1) above is done by looking at the driver-managed list_head structure
322- the one which is filled in the buf_queue() callback. Because starting
323the engine and enqueueing buffers are done in separate steps, it's possible
324for the engine to be running without any buffers available - in the
325vmalloc() case especially. So the driver should be prepared for the list
326to be empty. It is equally possible that nobody is yet interested in the
327buffer; the driver should not remove it from the list or fill it until a
328process is waiting on it. That test can be done by examining the buffer's
329done field (a wait_queue_head_t structure) with waitqueue_active().
330
331A buffer's state should be set to VIDEOBUF_ACTIVE before being mapped for
332DMA; that ensures that the videobuf layer will not try to do anything with
333it while the device is transferring data.
334
335For scatter/gather drivers, the needed memory pointers will be found in the
336scatterlist structure described above. Drivers using the vmalloc() method
337can get a memory pointer with:
338
339 void *videobuf_to_vmalloc(struct videobuf_buffer *buf);
340
341For contiguous DMA drivers, the function to use is:
342
343 dma_addr_t videobuf_to_dma_contig(struct videobuf_buffer *buf);
344
345The contiguous DMA API goes out of its way to hide the kernel-space address
346of the DMA buffer from drivers.
347
348The final step is to set the size field of the relevant videobuf_buffer
349structure to the actual size of the captured image, set state to
350VIDEOBUF_DONE, then call wake_up() on the done queue. At this point, the
351buffer is owned by the videobuf layer and the driver should not touch it
352again.
353
354Developers who are interested in more information can go into the relevant
355header files; there are a few low-level functions declared there which have
356not been talked about here. Also worthwhile is the vivi driver
357(drivers/media/video/vivi.c), which is maintained as an example of how V4L2
358drivers should be written. Vivi only uses the vmalloc() API, but it's good
359enough to get started with. Note also that all of these calls are exported
360GPL-only, so they will not be available to non-GPL kernel modules.
diff --git a/MAINTAINERS b/MAINTAINERS
index 317ed38826d7..2653b44f90da 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -221,6 +221,7 @@ F: drivers/net/acenic*
221 221
222ACER ASPIRE ONE TEMPERATURE AND FAN DRIVER 222ACER ASPIRE ONE TEMPERATURE AND FAN DRIVER
223M: Peter Feuerer <peter@piie.net> 223M: Peter Feuerer <peter@piie.net>
224L: platform-driver-x86@vger.kernel.org
224W: http://piie.net/?section=acerhdf 225W: http://piie.net/?section=acerhdf
225S: Maintained 226S: Maintained
226F: drivers/platform/x86/acerhdf.c 227F: drivers/platform/x86/acerhdf.c
@@ -228,6 +229,7 @@ F: drivers/platform/x86/acerhdf.c
228ACER WMI LAPTOP EXTRAS 229ACER WMI LAPTOP EXTRAS
229M: Carlos Corbacho <carlos@strangeworlds.co.uk> 230M: Carlos Corbacho <carlos@strangeworlds.co.uk>
230L: aceracpi@googlegroups.com (subscribers-only) 231L: aceracpi@googlegroups.com (subscribers-only)
232L: platform-driver-x86@vger.kernel.org
231W: http://code.google.com/p/aceracpi 233W: http://code.google.com/p/aceracpi
232S: Maintained 234S: Maintained
233F: drivers/platform/x86/acer-wmi.c 235F: drivers/platform/x86/acer-wmi.c
@@ -288,7 +290,7 @@ F: drivers/acpi/video.c
288 290
289ACPI WMI DRIVER 291ACPI WMI DRIVER
290M: Carlos Corbacho <carlos@strangeworlds.co.uk> 292M: Carlos Corbacho <carlos@strangeworlds.co.uk>
291L: linux-acpi@vger.kernel.org 293L: platform-driver-x86@vger.kernel.org
292W: http://www.lesswatts.org/projects/acpi/ 294W: http://www.lesswatts.org/projects/acpi/
293S: Maintained 295S: Maintained
294F: drivers/platform/x86/wmi.c 296F: drivers/platform/x86/wmi.c
@@ -968,6 +970,7 @@ ASUS ACPI EXTRAS DRIVER
968M: Corentin Chary <corentincj@iksaif.net> 970M: Corentin Chary <corentincj@iksaif.net>
969M: Karol Kozimor <sziwan@users.sourceforge.net> 971M: Karol Kozimor <sziwan@users.sourceforge.net>
970L: acpi4asus-user@lists.sourceforge.net 972L: acpi4asus-user@lists.sourceforge.net
973L: platform-driver-x86@vger.kernel.org
971W: http://acpi4asus.sf.net 974W: http://acpi4asus.sf.net
972S: Maintained 975S: Maintained
973F: drivers/platform/x86/asus_acpi.c 976F: drivers/platform/x86/asus_acpi.c
@@ -981,6 +984,7 @@ F: drivers/hwmon/asb100.c
981ASUS LAPTOP EXTRAS DRIVER 984ASUS LAPTOP EXTRAS DRIVER
982M: Corentin Chary <corentincj@iksaif.net> 985M: Corentin Chary <corentincj@iksaif.net>
983L: acpi4asus-user@lists.sourceforge.net 986L: acpi4asus-user@lists.sourceforge.net
987L: platform-driver-x86@vger.kernel.org
984W: http://acpi4asus.sf.net 988W: http://acpi4asus.sf.net
985S: Maintained 989S: Maintained
986F: drivers/platform/x86/asus-laptop.c 990F: drivers/platform/x86/asus-laptop.c
@@ -1473,6 +1477,7 @@ F: drivers/scsi/fnic/
1473CMPC ACPI DRIVER 1477CMPC ACPI DRIVER
1474M: Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com> 1478M: Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com>
1475M: Daniel Oliveira Nascimento <don@syst.com.br> 1479M: Daniel Oliveira Nascimento <don@syst.com.br>
1480L: platform-driver-x86@vger.kernel.org
1476S: Supported 1481S: Supported
1477F: drivers/platform/x86/classmate-laptop.c 1482F: drivers/platform/x86/classmate-laptop.c
1478 1483
@@ -1516,6 +1521,7 @@ F: drivers/pci/hotplug/cpcihp_generic.c
1516 1521
1517COMPAL LAPTOP SUPPORT 1522COMPAL LAPTOP SUPPORT
1518M: Cezary Jackiewicz <cezary.jackiewicz@gmail.com> 1523M: Cezary Jackiewicz <cezary.jackiewicz@gmail.com>
1524L: platform-driver-x86@vger.kernel.org
1519S: Maintained 1525S: Maintained
1520F: drivers/platform/x86/compal-laptop.c 1526F: drivers/platform/x86/compal-laptop.c
1521 1527
@@ -1746,6 +1752,7 @@ F: drivers/net/defxx.*
1746 1752
1747DELL LAPTOP DRIVER 1753DELL LAPTOP DRIVER
1748M: Matthew Garrett <mjg59@srcf.ucam.org> 1754M: Matthew Garrett <mjg59@srcf.ucam.org>
1755L: platform-driver-x86@vger.kernel.org
1749S: Maintained 1756S: Maintained
1750F: drivers/platform/x86/dell-laptop.c 1757F: drivers/platform/x86/dell-laptop.c
1751 1758
@@ -2028,6 +2035,7 @@ F: drivers/edac/r82600_edac.c
2028EEEPC LAPTOP EXTRAS DRIVER 2035EEEPC LAPTOP EXTRAS DRIVER
2029M: Corentin Chary <corentincj@iksaif.net> 2036M: Corentin Chary <corentincj@iksaif.net>
2030L: acpi4asus-user@lists.sourceforge.net 2037L: acpi4asus-user@lists.sourceforge.net
2038L: platform-driver-x86@vger.kernel.org
2031W: http://acpi4asus.sf.net 2039W: http://acpi4asus.sf.net
2032S: Maintained 2040S: Maintained
2033F: drivers/platform/x86/eeepc-laptop.c 2041F: drivers/platform/x86/eeepc-laptop.c
@@ -2141,6 +2149,17 @@ S: Supported
2141F: Documentation/fault-injection/ 2149F: Documentation/fault-injection/
2142F: lib/fault-inject.c 2150F: lib/fault-inject.c
2143 2151
2152FCOE SUBSYSTEM (libfc, libfcoe, fcoe)
2153M: Robert Love <robert.w.love@intel.com>
2154L: devel@open-fcoe.org
2155W: www.Open-FCoE.org
2156S: Supported
2157F: drivers/scsi/libfc/
2158F: drivers/scsi/fcoe/
2159F: include/scsi/fc/
2160F: include/scsi/libfc.h
2161F: include/scsi/libfcoe.h
2162
2144FILE LOCKING (flock() and fcntl()/lockf()) 2163FILE LOCKING (flock() and fcntl()/lockf())
2145M: Matthew Wilcox <matthew@wil.cx> 2164M: Matthew Wilcox <matthew@wil.cx>
2146L: linux-fsdevel@vger.kernel.org 2165L: linux-fsdevel@vger.kernel.org
@@ -2295,7 +2314,7 @@ F: arch/frv/
2295 2314
2296FUJITSU LAPTOP EXTRAS 2315FUJITSU LAPTOP EXTRAS
2297M: Jonathan Woithe <jwoithe@physics.adelaide.edu.au> 2316M: Jonathan Woithe <jwoithe@physics.adelaide.edu.au>
2298L: linux-acpi@vger.kernel.org 2317L: platform-driver-x86@vger.kernel.org
2299S: Maintained 2318S: Maintained
2300F: drivers/platform/x86/fujitsu-laptop.c 2319F: drivers/platform/x86/fujitsu-laptop.c
2301 2320
@@ -2399,6 +2418,12 @@ L: virtualization@lists.linux-foundation.org
2399S: Maintained 2418S: Maintained
2400F: drivers/char/virtio_console.c 2419F: drivers/char/virtio_console.c
2401 2420
2421iSCSI BOOT FIRMWARE TABLE (iBFT) DRIVER
2422M: Peter Jones <pjones@redhat.com>
2423M: Konrad Rzeszutek Wilk <konrad@kernel.org>
2424S: Maintained
2425F: drivers/firmware/iscsi_ibft*
2426
2402GSPCA FINEPIX SUBDRIVER 2427GSPCA FINEPIX SUBDRIVER
2403M: Frank Zago <frank@zago.net> 2428M: Frank Zago <frank@zago.net>
2404L: linux-media@vger.kernel.org 2429L: linux-media@vger.kernel.org
@@ -2567,6 +2592,7 @@ F: drivers/net/wireless/hostap/
2567 2592
2568HP COMPAQ TC1100 TABLET WMI EXTRAS DRIVER 2593HP COMPAQ TC1100 TABLET WMI EXTRAS DRIVER
2569M: Carlos Corbacho <carlos@strangeworlds.co.uk> 2594M: Carlos Corbacho <carlos@strangeworlds.co.uk>
2595L: platform-driver-x86@vger.kernel.org
2570S: Odd Fixes 2596S: Odd Fixes
2571F: drivers/platform/x86/tc1100-wmi.c 2597F: drivers/platform/x86/tc1100-wmi.c
2572 2598
@@ -2777,7 +2803,7 @@ F: drivers/video/i810/
2777 2803
2778INTEL MENLOW THERMAL DRIVER 2804INTEL MENLOW THERMAL DRIVER
2779M: Sujith Thomas <sujith.thomas@intel.com> 2805M: Sujith Thomas <sujith.thomas@intel.com>
2780L: linux-acpi@vger.kernel.org 2806L: platform-driver-x86@vger.kernel.org
2781W: http://www.lesswatts.org/projects/acpi/ 2807W: http://www.lesswatts.org/projects/acpi/
2782S: Supported 2808S: Supported
2783F: drivers/platform/x86/intel_menlow.c 2809F: drivers/platform/x86/intel_menlow.c
@@ -3643,6 +3669,7 @@ F: drivers/char/mxser.*
3643 3669
3644MSI LAPTOP SUPPORT 3670MSI LAPTOP SUPPORT
3645M: Lennart Poettering <mzxreary@0pointer.de> 3671M: Lennart Poettering <mzxreary@0pointer.de>
3672L: platform-driver-x86@vger.kernel.org
3646W: https://tango.0pointer.de/mailman/listinfo/s270-linux 3673W: https://tango.0pointer.de/mailman/listinfo/s270-linux
3647W: http://0pointer.de/lennart/tchibo.html 3674W: http://0pointer.de/lennart/tchibo.html
3648S: Maintained 3675S: Maintained
@@ -3650,6 +3677,7 @@ F: drivers/platform/x86/msi-laptop.c
3650 3677
3651MSI WMI SUPPORT 3678MSI WMI SUPPORT
3652M: Anisse Astier <anisse@astier.eu> 3679M: Anisse Astier <anisse@astier.eu>
3680L: platform-driver-x86@vger.kernel.org
3653S: Supported 3681S: Supported
3654F: drivers/platform/x86/msi-wmi.c 3682F: drivers/platform/x86/msi-wmi.c
3655 3683
@@ -4102,6 +4130,7 @@ F: drivers/i2c/busses/i2c-pasemi.c
4102 4130
4103PANASONIC LAPTOP ACPI EXTRAS DRIVER 4131PANASONIC LAPTOP ACPI EXTRAS DRIVER
4104M: Harald Welte <laforge@gnumonks.org> 4132M: Harald Welte <laforge@gnumonks.org>
4133L: platform-driver-x86@vger.kernel.org
4105S: Maintained 4134S: Maintained
4106F: drivers/platform/x86/panasonic-laptop.c 4135F: drivers/platform/x86/panasonic-laptop.c
4107 4136
@@ -4682,6 +4711,13 @@ F: drivers/media/common/saa7146*
4682F: drivers/media/video/*7146* 4711F: drivers/media/video/*7146*
4683F: include/media/*7146* 4712F: include/media/*7146*
4684 4713
4714TLG2300 VIDEO4LINUX-2 DRIVER
4715M: Huang Shijie <shijie8@gmail.com>
4716M: Kang Yong <kangyong@telegent.com>
4717M: Zhang Xiaobing <xbzhang@telegent.com>
4718S: Supported
4719F: drivers/media/video/tlg2300
4720
4685SC1200 WDT DRIVER 4721SC1200 WDT DRIVER
4686M: Zwane Mwaikambo <zwane@arm.linux.org.uk> 4722M: Zwane Mwaikambo <zwane@arm.linux.org.uk>
4687S: Maintained 4723S: Maintained
@@ -5040,7 +5076,7 @@ F: include/linux/ssb/
5040 5076
5041SONY VAIO CONTROL DEVICE DRIVER 5077SONY VAIO CONTROL DEVICE DRIVER
5042M: Mattia Dongili <malattia@linux.it> 5078M: Mattia Dongili <malattia@linux.it>
5043L: linux-acpi@vger.kernel.org 5079L: platform-driver-x86@vger.kernel.org
5044W: http://www.linux.it/~malattia/wiki/index.php/Sony_drivers 5080W: http://www.linux.it/~malattia/wiki/index.php/Sony_drivers
5045S: Maintained 5081S: Maintained
5046F: Documentation/laptops/sony-laptop.txt 5082F: Documentation/laptops/sony-laptop.txt
@@ -5246,6 +5282,7 @@ F: arch/xtensa/
5246THINKPAD ACPI EXTRAS DRIVER 5282THINKPAD ACPI EXTRAS DRIVER
5247M: Henrique de Moraes Holschuh <ibm-acpi@hmh.eng.br> 5283M: Henrique de Moraes Holschuh <ibm-acpi@hmh.eng.br>
5248L: ibm-acpi-devel@lists.sourceforge.net 5284L: ibm-acpi-devel@lists.sourceforge.net
5285L: platform-driver-x86@vger.kernel.org
5249W: http://ibm-acpi.sourceforge.net 5286W: http://ibm-acpi.sourceforge.net
5250W: http://thinkwiki.org/wiki/Ibm-acpi 5287W: http://thinkwiki.org/wiki/Ibm-acpi
5251T: git git://repo.or.cz/linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git 5288T: git git://repo.or.cz/linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git
@@ -5299,10 +5336,12 @@ F: security/tomoyo/
5299 5336
5300TOPSTAR LAPTOP EXTRAS DRIVER 5337TOPSTAR LAPTOP EXTRAS DRIVER
5301M: Herton Ronaldo Krzesinski <herton@mandriva.com.br> 5338M: Herton Ronaldo Krzesinski <herton@mandriva.com.br>
5339L: platform-driver-x86@vger.kernel.org
5302S: Maintained 5340S: Maintained
5303F: drivers/platform/x86/topstar-laptop.c 5341F: drivers/platform/x86/topstar-laptop.c
5304 5342
5305TOSHIBA ACPI EXTRAS DRIVER 5343TOSHIBA ACPI EXTRAS DRIVER
5344L: platform-driver-x86@vger.kernel.org
5306S: Orphan 5345S: Orphan
5307F: drivers/platform/x86/toshiba_acpi.c 5346F: drivers/platform/x86/toshiba_acpi.c
5308 5347
@@ -6030,6 +6069,12 @@ S: Maintained
6030F: Documentation/x86/ 6069F: Documentation/x86/
6031F: arch/x86/ 6070F: arch/x86/
6032 6071
6072X86 PLATFORM DRIVERS
6073M: Matthew Garrett <mjg@redhat.com>
6074L: platform-driver-x86@vger.kernel.org
6075S: Maintained
6076F: drivers/platform/x86
6077
6033XEN HYPERVISOR INTERFACE 6078XEN HYPERVISOR INTERFACE
6034M: Jeremy Fitzhardinge <jeremy@xensource.com> 6079M: Jeremy Fitzhardinge <jeremy@xensource.com>
6035M: Chris Wright <chrisw@sous-sol.org> 6080M: Chris Wright <chrisw@sous-sol.org>
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 8113bb5fb66e..5fe4a2ad7fa3 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -447,6 +447,16 @@ static inline void __flush_icache_all(void)
447 : "r" (0)); 447 : "r" (0));
448#endif 448#endif
449} 449}
450static inline void flush_kernel_vmap_range(void *addr, int size)
451{
452 if ((cache_is_vivt() || cache_is_vipt_aliasing()))
453 __cpuc_flush_dcache_area(addr, (size_t)size);
454}
455static inline void invalidate_kernel_vmap_range(void *addr, int size)
456{
457 if ((cache_is_vivt() || cache_is_vipt_aliasing()))
458 __cpuc_flush_dcache_area(addr, (size_t)size);
459}
450 460
451#define ARCH_HAS_FLUSH_ANON_PAGE 461#define ARCH_HAS_FLUSH_ANON_PAGE
452static inline void flush_anon_page(struct vm_area_struct *vma, 462static inline void flush_anon_page(struct vm_area_struct *vma,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index b476395d2cd4..38e9033d2e86 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -37,6 +37,8 @@
37#include <mach/nand.h> 37#include <mach/nand.h>
38#include <mach/keyscan.h> 38#include <mach/keyscan.h>
39 39
40#include <media/tvp514x.h>
41
40static inline int have_imager(void) 42static inline int have_imager(void)
41{ 43{
42 /* REVISIT when it's supported, trigger via Kconfig */ 44 /* REVISIT when it's supported, trigger via Kconfig */
@@ -306,6 +308,73 @@ static void dm365evm_mmc_configure(void)
306 davinci_cfg_reg(DM365_SD1_DATA0); 308 davinci_cfg_reg(DM365_SD1_DATA0);
307} 309}
308 310
311static struct tvp514x_platform_data tvp5146_pdata = {
312 .clk_polarity = 0,
313 .hs_polarity = 1,
314 .vs_polarity = 1
315};
316
317#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
318/* Inputs available at the TVP5146 */
319static struct v4l2_input tvp5146_inputs[] = {
320 {
321 .index = 0,
322 .name = "Composite",
323 .type = V4L2_INPUT_TYPE_CAMERA,
324 .std = TVP514X_STD_ALL,
325 },
326 {
327 .index = 1,
328 .name = "S-Video",
329 .type = V4L2_INPUT_TYPE_CAMERA,
330 .std = TVP514X_STD_ALL,
331 },
332};
333
334/*
335 * this is the route info for connecting each input to decoder
336 * ouput that goes to vpfe. There is a one to one correspondence
337 * with tvp5146_inputs
338 */
339static struct vpfe_route tvp5146_routes[] = {
340 {
341 .input = INPUT_CVBS_VI2B,
342 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
343 },
344{
345 .input = INPUT_SVIDEO_VI2C_VI1C,
346 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
347 },
348};
349
350static struct vpfe_subdev_info vpfe_sub_devs[] = {
351 {
352 .name = "tvp5146",
353 .grp_id = 0,
354 .num_inputs = ARRAY_SIZE(tvp5146_inputs),
355 .inputs = tvp5146_inputs,
356 .routes = tvp5146_routes,
357 .can_route = 1,
358 .ccdc_if_params = {
359 .if_type = VPFE_BT656,
360 .hdpol = VPFE_PINPOL_POSITIVE,
361 .vdpol = VPFE_PINPOL_POSITIVE,
362 },
363 .board_info = {
364 I2C_BOARD_INFO("tvp5146", 0x5d),
365 .platform_data = &tvp5146_pdata,
366 },
367 },
368};
369
370static struct vpfe_config vpfe_cfg = {
371 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
372 .sub_devs = vpfe_sub_devs,
373 .i2c_adapter_id = 1,
374 .card_name = "DM365 EVM",
375 .ccdc = "ISIF",
376};
377
309static void __init evm_init_i2c(void) 378static void __init evm_init_i2c(void)
310{ 379{
311 davinci_init_i2c(&i2c_pdata); 380 davinci_init_i2c(&i2c_pdata);
@@ -497,6 +566,8 @@ static struct davinci_uart_config uart_config __initdata = {
497 566
498static void __init dm365_evm_map_io(void) 567static void __init dm365_evm_map_io(void)
499{ 568{
569 /* setup input configuration for VPFE input devices */
570 dm365_set_vpfe_config(&vpfe_cfg);
500 dm365_init(); 571 dm365_init();
501} 572}
502 573
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index dedf4d4f3a27..d84e85414d20 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -125,7 +125,6 @@ static struct clk vpss_slave_clk = {
125 .lpsc = DAVINCI_LPSC_VPSSSLV, 125 .lpsc = DAVINCI_LPSC_VPSSSLV,
126}; 126};
127 127
128
129static struct clk clkout1_clk = { 128static struct clk clkout1_clk = {
130 .name = "clkout1", 129 .name = "clkout1",
131 .parent = &pll1_aux_clk, 130 .parent = &pll1_aux_clk,
@@ -665,6 +664,17 @@ static struct platform_device dm355_asp1_device = {
665 .resource = dm355_asp1_resources, 664 .resource = dm355_asp1_resources,
666}; 665};
667 666
667static void dm355_ccdc_setup_pinmux(void)
668{
669 davinci_cfg_reg(DM355_VIN_PCLK);
670 davinci_cfg_reg(DM355_VIN_CAM_WEN);
671 davinci_cfg_reg(DM355_VIN_CAM_VD);
672 davinci_cfg_reg(DM355_VIN_CAM_HD);
673 davinci_cfg_reg(DM355_VIN_YIN_EN);
674 davinci_cfg_reg(DM355_VIN_CINL_EN);
675 davinci_cfg_reg(DM355_VIN_CINH_EN);
676}
677
668static struct resource dm355_vpss_resources[] = { 678static struct resource dm355_vpss_resources[] = {
669 { 679 {
670 /* VPSS BL Base address */ 680 /* VPSS BL Base address */
@@ -701,6 +711,10 @@ static struct resource vpfe_resources[] = {
701 .end = IRQ_VDINT1, 711 .end = IRQ_VDINT1,
702 .flags = IORESOURCE_IRQ, 712 .flags = IORESOURCE_IRQ,
703 }, 713 },
714};
715
716static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
717static struct resource dm355_ccdc_resource[] = {
704 /* CCDC Base address */ 718 /* CCDC Base address */
705 { 719 {
706 .flags = IORESOURCE_MEM, 720 .flags = IORESOURCE_MEM,
@@ -708,8 +722,18 @@ static struct resource vpfe_resources[] = {
708 .end = 0x01c70600 + 0x1ff, 722 .end = 0x01c70600 + 0x1ff,
709 }, 723 },
710}; 724};
725static struct platform_device dm355_ccdc_dev = {
726 .name = "dm355_ccdc",
727 .id = -1,
728 .num_resources = ARRAY_SIZE(dm355_ccdc_resource),
729 .resource = dm355_ccdc_resource,
730 .dev = {
731 .dma_mask = &vpfe_capture_dma_mask,
732 .coherent_dma_mask = DMA_BIT_MASK(32),
733 .platform_data = dm355_ccdc_setup_pinmux,
734 },
735};
711 736
712static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
713static struct platform_device vpfe_capture_dev = { 737static struct platform_device vpfe_capture_dev = {
714 .name = CAPTURE_DRV_NAME, 738 .name = CAPTURE_DRV_NAME,
715 .id = -1, 739 .id = -1,
@@ -857,20 +881,13 @@ static int __init dm355_init_devices(void)
857 if (!cpu_is_davinci_dm355()) 881 if (!cpu_is_davinci_dm355())
858 return 0; 882 return 0;
859 883
884 /* Add ccdc clock aliases */
885 clk_add_alias("master", dm355_ccdc_dev.name, "vpss_master", NULL);
886 clk_add_alias("slave", dm355_ccdc_dev.name, "vpss_master", NULL);
860 davinci_cfg_reg(DM355_INT_EDMA_CC); 887 davinci_cfg_reg(DM355_INT_EDMA_CC);
861 platform_device_register(&dm355_edma_device); 888 platform_device_register(&dm355_edma_device);
862 platform_device_register(&dm355_vpss_device); 889 platform_device_register(&dm355_vpss_device);
863 /* 890 platform_device_register(&dm355_ccdc_dev);
864 * setup Mux configuration for vpfe input and register
865 * vpfe capture platform device
866 */
867 davinci_cfg_reg(DM355_VIN_PCLK);
868 davinci_cfg_reg(DM355_VIN_CAM_WEN);
869 davinci_cfg_reg(DM355_VIN_CAM_VD);
870 davinci_cfg_reg(DM355_VIN_CAM_HD);
871 davinci_cfg_reg(DM355_VIN_YIN_EN);
872 davinci_cfg_reg(DM355_VIN_CINL_EN);
873 davinci_cfg_reg(DM355_VIN_CINH_EN);
874 platform_device_register(&vpfe_capture_dev); 891 platform_device_register(&vpfe_capture_dev);
875 892
876 return 0; 893 return 0;
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index f53735cb922e..ce9da43a628b 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1008,6 +1008,97 @@ void __init dm365_init(void)
1008 davinci_common_init(&davinci_soc_info_dm365); 1008 davinci_common_init(&davinci_soc_info_dm365);
1009} 1009}
1010 1010
1011static struct resource dm365_vpss_resources[] = {
1012 {
1013 /* VPSS ISP5 Base address */
1014 .name = "isp5",
1015 .start = 0x01c70000,
1016 .end = 0x01c70000 + 0xff,
1017 .flags = IORESOURCE_MEM,
1018 },
1019 {
1020 /* VPSS CLK Base address */
1021 .name = "vpss",
1022 .start = 0x01c70200,
1023 .end = 0x01c70200 + 0xff,
1024 .flags = IORESOURCE_MEM,
1025 },
1026};
1027
1028static struct platform_device dm365_vpss_device = {
1029 .name = "vpss",
1030 .id = -1,
1031 .dev.platform_data = "dm365_vpss",
1032 .num_resources = ARRAY_SIZE(dm365_vpss_resources),
1033 .resource = dm365_vpss_resources,
1034};
1035
1036static struct resource vpfe_resources[] = {
1037 {
1038 .start = IRQ_VDINT0,
1039 .end = IRQ_VDINT0,
1040 .flags = IORESOURCE_IRQ,
1041 },
1042 {
1043 .start = IRQ_VDINT1,
1044 .end = IRQ_VDINT1,
1045 .flags = IORESOURCE_IRQ,
1046 },
1047};
1048
1049static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
1050static struct platform_device vpfe_capture_dev = {
1051 .name = CAPTURE_DRV_NAME,
1052 .id = -1,
1053 .num_resources = ARRAY_SIZE(vpfe_resources),
1054 .resource = vpfe_resources,
1055 .dev = {
1056 .dma_mask = &vpfe_capture_dma_mask,
1057 .coherent_dma_mask = DMA_BIT_MASK(32),
1058 },
1059};
1060
1061static void dm365_isif_setup_pinmux(void)
1062{
1063 davinci_cfg_reg(DM365_VIN_CAM_WEN);
1064 davinci_cfg_reg(DM365_VIN_CAM_VD);
1065 davinci_cfg_reg(DM365_VIN_CAM_HD);
1066 davinci_cfg_reg(DM365_VIN_YIN4_7_EN);
1067 davinci_cfg_reg(DM365_VIN_YIN0_3_EN);
1068}
1069
1070static struct resource isif_resource[] = {
1071 /* ISIF Base address */
1072 {
1073 .start = 0x01c71000,
1074 .end = 0x01c71000 + 0x1ff,
1075 .flags = IORESOURCE_MEM,
1076 },
1077 /* ISIF Linearization table 0 */
1078 {
1079 .start = 0x1C7C000,
1080 .end = 0x1C7C000 + 0x2ff,
1081 .flags = IORESOURCE_MEM,
1082 },
1083 /* ISIF Linearization table 1 */
1084 {
1085 .start = 0x1C7C400,
1086 .end = 0x1C7C400 + 0x2ff,
1087 .flags = IORESOURCE_MEM,
1088 },
1089};
1090static struct platform_device dm365_isif_dev = {
1091 .name = "isif",
1092 .id = -1,
1093 .num_resources = ARRAY_SIZE(isif_resource),
1094 .resource = isif_resource,
1095 .dev = {
1096 .dma_mask = &vpfe_capture_dma_mask,
1097 .coherent_dma_mask = DMA_BIT_MASK(32),
1098 .platform_data = dm365_isif_setup_pinmux,
1099 },
1100};
1101
1011static int __init dm365_init_devices(void) 1102static int __init dm365_init_devices(void)
1012{ 1103{
1013 if (!cpu_is_davinci_dm365()) 1104 if (!cpu_is_davinci_dm365())
@@ -1016,7 +1107,16 @@ static int __init dm365_init_devices(void)
1016 davinci_cfg_reg(DM365_INT_EDMA_CC); 1107 davinci_cfg_reg(DM365_INT_EDMA_CC);
1017 platform_device_register(&dm365_edma_device); 1108 platform_device_register(&dm365_edma_device);
1018 platform_device_register(&dm365_emac_device); 1109 platform_device_register(&dm365_emac_device);
1019 1110 /* Add isif clock alias */
1111 clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL);
1112 platform_device_register(&dm365_vpss_device);
1113 platform_device_register(&dm365_isif_dev);
1114 platform_device_register(&vpfe_capture_dev);
1020 return 0; 1115 return 0;
1021} 1116}
1022postcore_initcall(dm365_init_devices); 1117postcore_initcall(dm365_init_devices);
1118
1119void dm365_set_vpfe_config(struct vpfe_config *cfg)
1120{
1121 vpfe_capture_dev.dev.platform_data = cfg;
1122}
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 2cd008156dea..92aeb5600680 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -612,6 +612,11 @@ static struct resource vpfe_resources[] = {
612 .end = IRQ_VDINT1, 612 .end = IRQ_VDINT1,
613 .flags = IORESOURCE_IRQ, 613 .flags = IORESOURCE_IRQ,
614 }, 614 },
615};
616
617static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
618static struct resource dm644x_ccdc_resource[] = {
619 /* CCDC Base address */
615 { 620 {
616 .start = 0x01c70400, 621 .start = 0x01c70400,
617 .end = 0x01c70400 + 0xff, 622 .end = 0x01c70400 + 0xff,
@@ -619,7 +624,17 @@ static struct resource vpfe_resources[] = {
619 }, 624 },
620}; 625};
621 626
622static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); 627static struct platform_device dm644x_ccdc_dev = {
628 .name = "dm644x_ccdc",
629 .id = -1,
630 .num_resources = ARRAY_SIZE(dm644x_ccdc_resource),
631 .resource = dm644x_ccdc_resource,
632 .dev = {
633 .dma_mask = &vpfe_capture_dma_mask,
634 .coherent_dma_mask = DMA_BIT_MASK(32),
635 },
636};
637
623static struct platform_device vpfe_capture_dev = { 638static struct platform_device vpfe_capture_dev = {
624 .name = CAPTURE_DRV_NAME, 639 .name = CAPTURE_DRV_NAME,
625 .id = -1, 640 .id = -1,
@@ -769,9 +784,13 @@ static int __init dm644x_init_devices(void)
769 if (!cpu_is_davinci_dm644x()) 784 if (!cpu_is_davinci_dm644x())
770 return 0; 785 return 0;
771 786
787 /* Add ccdc clock aliases */
788 clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL);
789 clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL);
772 platform_device_register(&dm644x_edma_device); 790 platform_device_register(&dm644x_edma_device);
773 platform_device_register(&dm644x_emac_device); 791 platform_device_register(&dm644x_emac_device);
774 platform_device_register(&dm644x_vpss_device); 792 platform_device_register(&dm644x_vpss_device);
793 platform_device_register(&dm644x_ccdc_dev);
775 platform_device_register(&vpfe_capture_dev); 794 platform_device_register(&vpfe_capture_dev);
776 795
777 return 0; 796 return 0;
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index f1710a30e7ba..9fc5a64a5364 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -18,6 +18,7 @@
18#include <mach/emac.h> 18#include <mach/emac.h>
19#include <mach/asp.h> 19#include <mach/asp.h>
20#include <mach/keyscan.h> 20#include <mach/keyscan.h>
21#include <media/davinci/vpfe_capture.h>
21 22
22#define DM365_EMAC_BASE (0x01D07000) 23#define DM365_EMAC_BASE (0x01D07000)
23#define DM365_EMAC_CNTRL_OFFSET (0x0000) 24#define DM365_EMAC_CNTRL_OFFSET (0x0000)
@@ -36,4 +37,5 @@ void __init dm365_init_asp(struct snd_platform_data *pdata);
36void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); 37void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
37void __init dm365_init_rtc(void); 38void __init dm365_init_rtc(void);
38 39
40void dm365_set_vpfe_config(struct vpfe_config *cfg);
39#endif /* __ASM_ARCH_DM365_H */ 41#endif /* __ASM_ARCH_DM365_H */
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index f93c59634191..9bf33b30a025 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -86,11 +86,19 @@ static struct amba_device cpu8815_amba_gpio[] = {
86 }, 86 },
87}; 87};
88 88
89static struct amba_device cpu8815_amba_rng = {
90 .dev = {
91 .init_name = "rng",
92 },
93 __MEM_4K_RESOURCE(NOMADIK_RNG_BASE),
94};
95
89static struct amba_device *amba_devs[] __initdata = { 96static struct amba_device *amba_devs[] __initdata = {
90 cpu8815_amba_gpio + 0, 97 cpu8815_amba_gpio + 0,
91 cpu8815_amba_gpio + 1, 98 cpu8815_amba_gpio + 1,
92 cpu8815_amba_gpio + 2, 99 cpu8815_amba_gpio + 2,
93 cpu8815_amba_gpio + 3, 100 cpu8815_amba_gpio + 3,
101 &cpu8815_amba_rng
94}; 102};
95 103
96static int __init cpu8815_init(void) 104static int __init cpu8815_init(void)
diff --git a/arch/arm/mach-pxa/include/mach/camera.h b/arch/arm/mach-pxa/include/mach/camera.h
index 31abe6d514b8..6709b1cd7c77 100644
--- a/arch/arm/mach-pxa/include/mach/camera.h
+++ b/arch/arm/mach-pxa/include/mach/camera.h
@@ -35,8 +35,6 @@
35#define PXA_CAMERA_VSP 0x400 35#define PXA_CAMERA_VSP 0x400
36 36
37struct pxacamera_platform_data { 37struct pxacamera_platform_data {
38 int (*init)(struct device *);
39
40 unsigned long flags; 38 unsigned long flags;
41 unsigned long mclk_10khz; 39 unsigned long mclk_10khz;
42}; 40};
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h
index 7a73b615c23d..477277739da5 100644
--- a/arch/parisc/include/asm/cacheflush.h
+++ b/arch/parisc/include/asm/cacheflush.h
@@ -38,6 +38,18 @@ void flush_cache_mm(struct mm_struct *mm);
38 38
39#define flush_kernel_dcache_range(start,size) \ 39#define flush_kernel_dcache_range(start,size) \
40 flush_kernel_dcache_range_asm((start), (start)+(size)); 40 flush_kernel_dcache_range_asm((start), (start)+(size));
41/* vmap range flushes and invalidates. Architecturally, we don't need
42 * the invalidate, because the CPU should refuse to speculate once an
43 * area has been flushed, so invalidate is left empty */
44static inline void flush_kernel_vmap_range(void *vaddr, int size)
45{
46 unsigned long start = (unsigned long)vaddr;
47
48 flush_kernel_dcache_range_asm(start, start + size);
49}
50static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
51{
52}
41 53
42#define flush_cache_vmap(start, end) flush_cache_all() 54#define flush_cache_vmap(start, end) flush_cache_all()
43#define flush_cache_vunmap(start, end) flush_cache_all() 55#define flush_cache_vunmap(start, end) flush_cache_all()
diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c
index 6be4503201ac..58f46734465f 100644
--- a/arch/s390/crypto/aes_s390.c
+++ b/arch/s390/crypto/aes_s390.c
@@ -78,14 +78,14 @@ static int setkey_fallback_cip(struct crypto_tfm *tfm, const u8 *in_key,
78 struct s390_aes_ctx *sctx = crypto_tfm_ctx(tfm); 78 struct s390_aes_ctx *sctx = crypto_tfm_ctx(tfm);
79 int ret; 79 int ret;
80 80
81 sctx->fallback.blk->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK; 81 sctx->fallback.cip->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
82 sctx->fallback.blk->base.crt_flags |= (tfm->crt_flags & 82 sctx->fallback.cip->base.crt_flags |= (tfm->crt_flags &
83 CRYPTO_TFM_REQ_MASK); 83 CRYPTO_TFM_REQ_MASK);
84 84
85 ret = crypto_cipher_setkey(sctx->fallback.cip, in_key, key_len); 85 ret = crypto_cipher_setkey(sctx->fallback.cip, in_key, key_len);
86 if (ret) { 86 if (ret) {
87 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK; 87 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
88 tfm->crt_flags |= (sctx->fallback.blk->base.crt_flags & 88 tfm->crt_flags |= (sctx->fallback.cip->base.crt_flags &
89 CRYPTO_TFM_RES_MASK); 89 CRYPTO_TFM_RES_MASK);
90 } 90 }
91 return ret; 91 return ret;
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 2121fbb2ff4c..05cef5061293 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -13,7 +13,6 @@ config SUPERH
13 select HAVE_LMB 13 select HAVE_LMB
14 select HAVE_OPROFILE 14 select HAVE_OPROFILE
15 select HAVE_GENERIC_DMA_COHERENT 15 select HAVE_GENERIC_DMA_COHERENT
16 select HAVE_IOREMAP_PROT if MMU
17 select HAVE_ARCH_TRACEHOOK 16 select HAVE_ARCH_TRACEHOOK
18 select HAVE_DMA_API_DEBUG 17 select HAVE_DMA_API_DEBUG
19 select HAVE_DMA_ATTRS 18 select HAVE_DMA_ATTRS
@@ -22,6 +21,7 @@ config SUPERH
22 select HAVE_KERNEL_GZIP 21 select HAVE_KERNEL_GZIP
23 select HAVE_KERNEL_BZIP2 22 select HAVE_KERNEL_BZIP2
24 select HAVE_KERNEL_LZMA 23 select HAVE_KERNEL_LZMA
24 select HAVE_KERNEL_LZO
25 select HAVE_SYSCALL_TRACEPOINTS 25 select HAVE_SYSCALL_TRACEPOINTS
26 select RTC_LIB 26 select RTC_LIB
27 select GENERIC_ATOMIC64 27 select GENERIC_ATOMIC64
@@ -35,6 +35,7 @@ config SUPERH32
35 def_bool ARCH = "sh" 35 def_bool ARCH = "sh"
36 select HAVE_KPROBES 36 select HAVE_KPROBES
37 select HAVE_KRETPROBES 37 select HAVE_KRETPROBES
38 select HAVE_IOREMAP_PROT if MMU && !X2TLB
38 select HAVE_FUNCTION_TRACER 39 select HAVE_FUNCTION_TRACER
39 select HAVE_FTRACE_MCOUNT_RECORD 40 select HAVE_FTRACE_MCOUNT_RECORD
40 select HAVE_DYNAMIC_FTRACE 41 select HAVE_DYNAMIC_FTRACE
@@ -42,6 +43,8 @@ config SUPERH32
42 select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE 43 select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE
43 select HAVE_FUNCTION_GRAPH_TRACER 44 select HAVE_FUNCTION_GRAPH_TRACER
44 select HAVE_ARCH_KGDB 45 select HAVE_ARCH_KGDB
46 select HAVE_HW_BREAKPOINT
47 select PERF_EVENTS if HAVE_HW_BREAKPOINT
45 select ARCH_HIBERNATION_POSSIBLE if MMU 48 select ARCH_HIBERNATION_POSSIBLE if MMU
46 49
47config SUPERH64 50config SUPERH64
@@ -78,11 +81,12 @@ config GENERIC_HARDIRQS
78config GENERIC_HARDIRQS_NO__DO_IRQ 81config GENERIC_HARDIRQS_NO__DO_IRQ
79 def_bool y 82 def_bool y
80 83
81config GENERIC_IRQ_PROBE 84config IRQ_PER_CPU
82 def_bool y 85 def_bool y
83 86
84config IRQ_PER_CPU 87config SPARSE_IRQ
85 def_bool y 88 def_bool y
89 depends on SUPERH32
86 90
87config GENERIC_GPIO 91config GENERIC_GPIO
88 def_bool n 92 def_bool n
@@ -548,8 +552,7 @@ config SH_PCLK_FREQ
548 CPU_SUBTYPE_SH7203 || \ 552 CPU_SUBTYPE_SH7203 || \
549 CPU_SUBTYPE_SH7206 || \ 553 CPU_SUBTYPE_SH7206 || \
550 CPU_SUBTYPE_SH7263 || \ 554 CPU_SUBTYPE_SH7263 || \
551 CPU_SUBTYPE_MXG || \ 555 CPU_SUBTYPE_MXG
552 CPU_SUBTYPE_SH7786
553 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 556 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
554 default "66000000" if CPU_SUBTYPE_SH4_202 557 default "66000000" if CPU_SUBTYPE_SH4_202
555 default "50000000" 558 default "50000000"
@@ -563,7 +566,8 @@ config SH_CLK_CPG
563 566
564config SH_CLK_CPG_LEGACY 567config SH_CLK_CPG_LEGACY
565 depends on SH_CLK_CPG 568 depends on SH_CLK_CPG
566 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE 569 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
570 !CPU_SUBTYPE_SH7786
567 571
568config SH_CLK_MD 572config SH_CLK_MD
569 int "CPU Mode Pin Setting" 573 int "CPU Mode Pin Setting"
@@ -725,18 +729,6 @@ config GUSA_RB
725 LLSC, this should be more efficient than the other alternative of 729 LLSC, this should be more efficient than the other alternative of
726 disabling interrupts around the atomic sequence. 730 disabling interrupts around the atomic sequence.
727 731
728config SPARSE_IRQ
729 bool "Support sparse irq numbering"
730 depends on EXPERIMENTAL
731 help
732 This enables support for sparse irqs. This is useful in general
733 as most CPUs have a fairly sparse array of IRQ vectors, which
734 the irq_desc then maps directly on to. Systems with a high
735 number of off-chip IRQs will want to treat this as
736 experimental until they have been independently verified.
737
738 If you don't know what to do here, say N.
739
740endmenu 732endmenu
741 733
742menu "Boot options" 734menu "Boot options"
@@ -822,11 +814,15 @@ config MAPLE
822config PCI 814config PCI
823 bool "PCI support" 815 bool "PCI support"
824 depends on SYS_SUPPORTS_PCI 816 depends on SYS_SUPPORTS_PCI
817 select PCI_DOMAINS
825 help 818 help
826 Find out whether you have a PCI motherboard. PCI is the name of a 819 Find out whether you have a PCI motherboard. PCI is the name of a
827 bus system, i.e. the way the CPU talks to the other stuff inside 820 bus system, i.e. the way the CPU talks to the other stuff inside
828 your box. If you have PCI, say Y, otherwise N. 821 your box. If you have PCI, say Y, otherwise N.
829 822
823config PCI_DOMAINS
824 bool
825
830source "drivers/pci/pcie/Kconfig" 826source "drivers/pci/pcie/Kconfig"
831 827
832source "drivers/pci/Kconfig" 828source "drivers/pci/Kconfig"
diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu
index cd6e3ea598d5..ddf096c7d8bf 100644
--- a/arch/sh/Kconfig.cpu
+++ b/arch/sh/Kconfig.cpu
@@ -68,7 +68,8 @@ config SH_STORE_QUEUES
68 68
69config SPECULATIVE_EXECUTION 69config SPECULATIVE_EXECUTION
70 bool "Speculative subroutine return" 70 bool "Speculative subroutine return"
71 depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL 71 depends on EXPERIMENTAL
72 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7786
72 help 73 help
73 This enables support for a speculative instruction fetch for 74 This enables support for a speculative instruction fetch for
74 subroutine return. There are various pitfalls associated with 75 subroutine return. There are various pitfalls associated with
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index db91925c79d1..588579ac2e35 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -83,6 +83,7 @@ defaultimage-$(CONFIG_SH_AP325RXA) := uImage
83defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE) := uImage 83defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE) := uImage
84defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux 84defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux
85defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux 85defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux
86defaultimage-$(CONFIG_SH_SDK7786) := vmlinux.bin
86 87
87# Set some sensible Kbuild defaults 88# Set some sensible Kbuild defaults
88KBUILD_IMAGE := $(defaultimage-y) 89KBUILD_IMAGE := $(defaultimage-y)
@@ -143,11 +144,11 @@ machdir-$(CONFIG_SH_AP325RXA) += mach-ap325rxa
143machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09 144machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09
144machdir-$(CONFIG_SH_ECOVEC) += mach-ecovec24 145machdir-$(CONFIG_SH_ECOVEC) += mach-ecovec24
145machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780 146machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780
147machdir-$(CONFIG_SH_SDK7786) += mach-sdk7786
146machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto 148machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto
147machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp 149machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp
148machdir-$(CONFIG_SH_SH4202_MICRODEV) += mach-microdev 150machdir-$(CONFIG_SH_SH4202_MICRODEV) += mach-microdev
149machdir-$(CONFIG_SH_LANDISK) += mach-landisk 151machdir-$(CONFIG_SH_LANDISK) += mach-landisk
150machdir-$(CONFIG_SH_TITAN) += mach-titan
151machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2 152machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2
152machdir-$(CONFIG_SH_CAYMAN) += mach-cayman 153machdir-$(CONFIG_SH_CAYMAN) += mach-cayman
153machdir-$(CONFIG_SH_RSK) += mach-rsk 154machdir-$(CONFIG_SH_RSK) += mach-rsk
@@ -203,8 +204,9 @@ endif
203libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) 204libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y)
204libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) 205libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y)
205 206
206BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.srec uImage.bin \ 207BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.lzo \
207 zImage vmlinux.srec romImage 208 uImage.srec uImage.bin zImage vmlinux.bin vmlinux.srec \
209 romImage
208PHONY += $(BOOT_TARGETS) 210PHONY += $(BOOT_TARGETS)
209 211
210all: $(KBUILD_IMAGE) 212all: $(KBUILD_IMAGE)
@@ -225,10 +227,12 @@ define archhelp
225 @echo ' zImage - Compressed kernel image' 227 @echo ' zImage - Compressed kernel image'
226 @echo ' romImage - Compressed ROM image, if supported' 228 @echo ' romImage - Compressed ROM image, if supported'
227 @echo ' vmlinux.srec - Create an ELF S-record' 229 @echo ' vmlinux.srec - Create an ELF S-record'
230 @echo ' vmlinux.bin - Create an uncompressed binary image'
228 @echo '* uImage - Alias to bootable U-Boot image' 231 @echo '* uImage - Alias to bootable U-Boot image'
229 @echo ' uImage.srec - Create an S-record for U-Boot' 232 @echo ' uImage.srec - Create an S-record for U-Boot'
230 @echo ' uImage.bin - Kernel-only image for U-Boot (bin)' 233 @echo ' uImage.bin - Kernel-only image for U-Boot (bin)'
231 @echo '* uImage.gz - Kernel-only image for U-Boot (gzip)' 234 @echo '* uImage.gz - Kernel-only image for U-Boot (gzip)'
232 @echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)' 235 @echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)'
233 @echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)' 236 @echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)'
237 @echo ' uImage.lzo - Kernel-only image for U-Boot (lzo)'
234endef 238endef
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index aedd9deb5de2..938e87d51482 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -150,6 +150,14 @@ config SH_SDK7780
150 Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3 150 Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3
151 evaluation board. 151 evaluation board.
152 152
153config SH_SDK7786
154 bool "SDK7786"
155 depends on CPU_SUBTYPE_SH7786
156 select SYS_SUPPORTS_PCI
157 help
158 Select SDK7786 if configuring for a Renesas Technology Europe
159 SH7786-65nm board.
160
153config SH_HIGHLANDER 161config SH_HIGHLANDER
154 bool "Highlander" 162 bool "Highlander"
155 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 163 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index ce0f26381784..4f90f9b7a922 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_SH_SHMIN) += board-shmin.o
8obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o 8obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
9obj-$(CONFIG_SH_ESPT) += board-espt.o 9obj-$(CONFIG_SH_ESPT) += board-espt.o
10obj-$(CONFIG_SH_POLARIS) += board-polaris.o 10obj-$(CONFIG_SH_POLARIS) += board-polaris.o
11obj-$(CONFIG_SH_TITAN) += board-titan.o
diff --git a/arch/sh/boards/board-magicpanelr2.c b/arch/sh/boards/board-magicpanelr2.c
index 99ffc5f1c0dd..efba450a0518 100644
--- a/arch/sh/boards/board-magicpanelr2.c
+++ b/arch/sh/boards/board-magicpanelr2.c
@@ -23,7 +23,7 @@
23#include <asm/heartbeat.h> 23#include <asm/heartbeat.h>
24#include <cpu/sh7720.h> 24#include <cpu/sh7720.h>
25 25
26#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL) 26#define LAN9115_READY (__raw_readl(0xA8000084UL) & 0x00000001UL)
27 27
28/* Prefer cmdline over RedBoot */ 28/* Prefer cmdline over RedBoot */
29static const char *probes[] = { "cmdlinepart", "RedBoot", NULL }; 29static const char *probes[] = { "cmdlinepart", "RedBoot", NULL };
@@ -60,33 +60,33 @@ static void __init setup_chip_select(void)
60{ 60{
61 /* CS2: LAN (0x08000000 - 0x0bffffff) */ 61 /* CS2: LAN (0x08000000 - 0x0bffffff) */
62 /* no idle cycles, normal space, 8 bit data bus */ 62 /* no idle cycles, normal space, 8 bit data bus */
63 ctrl_outl(0x36db0400, CS2BCR); 63 __raw_writel(0x36db0400, CS2BCR);
64 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 64 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
65 ctrl_outl(0x000003c0, CS2WCR); 65 __raw_writel(0x000003c0, CS2WCR);
66 66
67 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ 67 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */
68 /* no idle cycles, normal space, 8 bit data bus */ 68 /* no idle cycles, normal space, 8 bit data bus */
69 ctrl_outl(0x00000200, CS4BCR); 69 __raw_writel(0x00000200, CS4BCR);
70 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 70 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
71 ctrl_outl(0x00100981, CS4WCR); 71 __raw_writel(0x00100981, CS4WCR);
72 72
73 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */ 73 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */
74 /* no idle cycles, normal space, 8 bit data bus */ 74 /* no idle cycles, normal space, 8 bit data bus */
75 ctrl_outl(0x00000200, CS5ABCR); 75 __raw_writel(0x00000200, CS5ABCR);
76 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 76 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
77 ctrl_outl(0x00100981, CS5AWCR); 77 __raw_writel(0x00100981, CS5AWCR);
78 78
79 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */ 79 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */
80 /* no idle cycles, normal space, 8 bit data bus */ 80 /* no idle cycles, normal space, 8 bit data bus */
81 ctrl_outl(0x00000200, CS5BBCR); 81 __raw_writel(0x00000200, CS5BBCR);
82 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 82 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
83 ctrl_outl(0x00100981, CS5BWCR); 83 __raw_writel(0x00100981, CS5BWCR);
84 84
85 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */ 85 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */
86 /* no idle cycles, normal space, 8 bit data bus */ 86 /* no idle cycles, normal space, 8 bit data bus */
87 ctrl_outl(0x00000200, CS6ABCR); 87 __raw_writel(0x00000200, CS6ABCR);
88 /* (SW:1.5 WR:3 HW:1.5), no ext. wait */ 88 /* (SW:1.5 WR:3 HW:1.5), no ext. wait */
89 ctrl_outl(0x001009C1, CS6AWCR); 89 __raw_writel(0x001009C1, CS6AWCR);
90} 90}
91 91
92static void __init setup_port_multiplexing(void) 92static void __init setup_port_multiplexing(void)
@@ -94,71 +94,71 @@ static void __init setup_port_multiplexing(void)
94 /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5); 94 /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5);
95 * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1); 95 * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1);
96 */ 96 */
97 ctrl_outw(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */ 97 __raw_writew(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */
98 98
99 /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1); 99 /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1);
100 * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0); 100 * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0);
101 */ 101 */
102 ctrl_outw(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */ 102 __raw_writew(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */
103 103
104 /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4); 104 /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4);
105 * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0; 105 * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0;
106 */ 106 */
107 ctrl_outw(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */ 107 __raw_writew(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */
108 108
109 /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4); 109 /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4);
110 * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0); 110 * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0);
111 */ 111 */
112 ctrl_outw(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */ 112 __raw_writew(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */
113 113
114 /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP; 114 /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP;
115 * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM; 115 * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM;
116 */ 116 */
117 ctrl_outw(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */ 117 __raw_writew(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */
118 118
119 /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3; 119 /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3;
120 * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc); 120 * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc);
121 */ 121 */
122 ctrl_outw(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */ 122 __raw_writew(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */
123 123
124 /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2); 124 /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2);
125 * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9); 125 * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9);
126 */ 126 */
127 ctrl_outw(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */ 127 __raw_writew(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */
128 128
129 /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE); 129 /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE);
130 * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR; 130 * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR;
131 */ 131 */
132 ctrl_outw(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */ 132 __raw_writew(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */
133 133
134 /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3; 134 /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3;
135 * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC; 135 * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC;
136 */ 136 */
137 ctrl_outw(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */ 137 __raw_writew(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */
138 138
139 /* K7 (x); K6 (x); K5 (x); K4 (x); 139 /* K7 (x); K6 (x); K5 (x); K4 (x);
140 * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY) 140 * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY)
141 */ 141 */
142 ctrl_outw(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */ 142 __raw_writew(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */
143 143
144 /* L7 TRST; L6 TMS; L5 TDO; L4 TDI; 144 /* L7 TRST; L6 TMS; L5 TDO; L4 TDI;
145 * L3 TCK; L2 (x); L1 (x); L0 (x); 145 * L3 TCK; L2 (x); L1 (x); L0 (x);
146 */ 146 */
147 ctrl_outw(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */ 147 __raw_writew(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */
148 148
149 /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED); 149 /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED);
150 * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL); 150 * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL);
151 * M1 CS5B(CAN3_CS); M0 GPI+(nc); 151 * M1 CS5B(CAN3_CS); M0 GPI+(nc);
152 */ 152 */
153 ctrl_outw(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */ 153 __raw_writew(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */
154 154
155 /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit, 155 /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit,
156 * LAN_RESET=off, BUZZER=off, LCD_BL=off 156 * LAN_RESET=off, BUZZER=off, LCD_BL=off
157 */ 157 */
158#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2 158#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2
159 ctrl_outb(0x30, PORT_PMDR); 159 __raw_writeb(0x30, PORT_PMDR);
160#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3 160#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3
161 ctrl_outb(0xF0, PORT_PMDR); 161 __raw_writeb(0xF0, PORT_PMDR);
162#else 162#else
163#error Unknown revision of PLATFORM_MP_R2 163#error Unknown revision of PLATFORM_MP_R2
164#endif 164#endif
@@ -167,8 +167,8 @@ static void __init setup_port_multiplexing(void)
167 * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ); 167 * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ);
168 * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ) 168 * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ)
169 */ 169 */
170 ctrl_outw(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */ 170 __raw_writew(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */
171 ctrl_outb(0x10, PORT_PPDR); 171 __raw_writeb(0x10, PORT_PPDR);
172 172
173 /* R7 A25; R6 A24; R5 A23; R4 A22; 173 /* R7 A25; R6 A24; R5 A23; R4 A22;
174 * R3 A21; R2 A20; R1 A19; R0 A0; 174 * R3 A21; R2 A20; R1 A19; R0 A0;
@@ -185,22 +185,22 @@ static void __init setup_port_multiplexing(void)
185 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2); 185 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2);
186 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK; 186 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK;
187 */ 187 */
188 ctrl_outw(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */ 188 __raw_writew(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */
189 189
190 /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS; 190 /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS;
191 * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG) 191 * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG)
192 */ 192 */
193 ctrl_outw(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */ 193 __raw_writew(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */
194 194
195 /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT); 195 /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT);
196 * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK; 196 * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK;
197 */ 197 */
198 ctrl_outw(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */ 198 __raw_writew(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */
199 199
200 /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2); 200 /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2);
201 * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT); 201 * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT);
202 */ 202 */
203 ctrl_outw(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */ 203 __raw_writew(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */
204} 204}
205 205
206static void __init mpr2_setup(char **cmdline_p) 206static void __init mpr2_setup(char **cmdline_p)
@@ -209,24 +209,24 @@ static void __init mpr2_setup(char **cmdline_p)
209 * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2, 209 * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2,
210 * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND 210 * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND
211 */ 211 */
212 ctrl_outw(0xAABC, PORT_PSELA); 212 __raw_writew(0xAABC, PORT_PSELA);
213 /* set Pin Select Register B: 213 /* set Pin Select Register B:
214 * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC, 214 * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC,
215 * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved 215 * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved
216 */ 216 */
217 ctrl_outw(0x3C00, PORT_PSELB); 217 __raw_writew(0x3C00, PORT_PSELB);
218 /* set Pin Select Register C: 218 /* set Pin Select Register C:
219 * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved 219 * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved
220 */ 220 */
221 ctrl_outw(0x0000, PORT_PSELC); 221 __raw_writew(0x0000, PORT_PSELC);
222 /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK, 222 /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK,
223 * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved 223 * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved
224 */ 224 */
225 ctrl_outw(0x0000, PORT_PSELD); 225 __raw_writew(0x0000, PORT_PSELD);
226 /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */ 226 /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */
227 ctrl_outw(0x0101, PORT_UTRCTL); 227 __raw_writew(0x0101, PORT_UTRCTL);
228 /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */ 228 /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */
229 ctrl_outw(0xA5C0, PORT_UCLKCR_W); 229 __raw_writew(0xA5C0, PORT_UCLKCR_W);
230 230
231 setup_chip_select(); 231 setup_chip_select();
232 232
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
index 62607eb51004..594866356c24 100644
--- a/arch/sh/boards/board-polaris.c
+++ b/arch/sh/boards/board-polaris.c
@@ -59,15 +59,12 @@ static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
59static struct heartbeat_data heartbeat_data = { 59static struct heartbeat_data heartbeat_data = {
60 .bit_pos = heartbeat_bit_pos, 60 .bit_pos = heartbeat_bit_pos,
61 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 61 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
62 .regsize = 8,
63}; 62};
64 63
65static struct resource heartbeat_resources[] = { 64static struct resource heartbeat_resource = {
66 [0] = { 65 .start = PORT_PCDR,
67 .start = PORT_PCDR, 66 .end = PORT_PCDR,
68 .end = PORT_PCDR, 67 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
69 .flags = IORESOURCE_MEM,
70 },
71}; 68};
72 69
73static struct platform_device heartbeat_device = { 70static struct platform_device heartbeat_device = {
@@ -76,8 +73,8 @@ static struct platform_device heartbeat_device = {
76 .dev = { 73 .dev = {
77 .platform_data = &heartbeat_data, 74 .platform_data = &heartbeat_data,
78 }, 75 },
79 .num_resources = ARRAY_SIZE(heartbeat_resources), 76 .num_resources = 1,
80 .resource = heartbeat_resources, 77 .resource = &heartbeat_resource,
81}; 78};
82 79
83static struct platform_device *polaris_devices[] __initdata = { 80static struct platform_device *polaris_devices[] __initdata = {
@@ -92,15 +89,15 @@ static int __init polaris_initialise(void)
92 printk(KERN_INFO "Configuring Polaris external bus\n"); 89 printk(KERN_INFO "Configuring Polaris external bus\n");
93 90
94 /* Configure area 5 with 2 wait states */ 91 /* Configure area 5 with 2 wait states */
95 wcr = ctrl_inw(WCR2); 92 wcr = __raw_readw(WCR2);
96 wcr &= (~AREA5_WAIT_CTRL); 93 wcr &= (~AREA5_WAIT_CTRL);
97 wcr |= (WAIT_STATES_10 << 10); 94 wcr |= (WAIT_STATES_10 << 10);
98 ctrl_outw(wcr, WCR2); 95 __raw_writew(wcr, WCR2);
99 96
100 /* Configure area 5 for 32-bit access */ 97 /* Configure area 5 for 32-bit access */
101 bcr_mask = ctrl_inw(BCR2); 98 bcr_mask = __raw_readw(BCR2);
102 bcr_mask |= 1 << 10; 99 bcr_mask |= 1 << 10;
103 ctrl_outw(bcr_mask, BCR2); 100 __raw_writew(bcr_mask, BCR2);
104 101
105 return platform_add_devices(polaris_devices, 102 return platform_add_devices(polaris_devices,
106 ARRAY_SIZE(polaris_devices)); 103 ARRAY_SIZE(polaris_devices));
@@ -131,13 +128,13 @@ static struct ipr_desc ipr_irq_desc = {
131static void __init init_polaris_irq(void) 128static void __init init_polaris_irq(void)
132{ 129{
133 /* Disable all interrupts */ 130 /* Disable all interrupts */
134 ctrl_outw(0, BCR_ILCRA); 131 __raw_writew(0, BCR_ILCRA);
135 ctrl_outw(0, BCR_ILCRB); 132 __raw_writew(0, BCR_ILCRB);
136 ctrl_outw(0, BCR_ILCRC); 133 __raw_writew(0, BCR_ILCRC);
137 ctrl_outw(0, BCR_ILCRD); 134 __raw_writew(0, BCR_ILCRD);
138 ctrl_outw(0, BCR_ILCRE); 135 __raw_writew(0, BCR_ILCRE);
139 ctrl_outw(0, BCR_ILCRF); 136 __raw_writew(0, BCR_ILCRF);
140 ctrl_outw(0, BCR_ILCRG); 137 __raw_writew(0, BCR_ILCRG);
141 138
142 register_ipr_controller(&ipr_irq_desc); 139 register_ipr_controller(&ipr_irq_desc);
143} 140}
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index e5a8a2fde39c..fe7e686c94ac 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -21,6 +21,7 @@
21#include <linux/i2c-algo-pca.h> 21#include <linux/i2c-algo-pca.h>
22#include <linux/usb/r8a66597.h> 22#include <linux/usb/r8a66597.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/io.h>
24#include <linux/clk.h> 25#include <linux/clk.h>
25#include <linux/errno.h> 26#include <linux/errno.h>
26#include <mach/sh7785lcr.h> 27#include <mach/sh7785lcr.h>
@@ -32,26 +33,17 @@
32 * NOTE: This board has 2 physical memory maps. 33 * NOTE: This board has 2 physical memory maps.
33 * Please look at include/asm-sh/sh7785lcr.h or hardware manual. 34 * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
34 */ 35 */
35static struct resource heartbeat_resources[] = { 36static struct resource heartbeat_resource = {
36 [0] = { 37 .start = PLD_LEDCR,
37 .start = PLD_LEDCR, 38 .end = PLD_LEDCR,
38 .end = PLD_LEDCR, 39 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
39 .flags = IORESOURCE_MEM,
40 },
41};
42
43static struct heartbeat_data heartbeat_data = {
44 .regsize = 8,
45}; 40};
46 41
47static struct platform_device heartbeat_device = { 42static struct platform_device heartbeat_device = {
48 .name = "heartbeat", 43 .name = "heartbeat",
49 .id = -1, 44 .id = -1,
50 .dev = { 45 .num_resources = 1,
51 .platform_data = &heartbeat_data, 46 .resource = &heartbeat_resource,
52 },
53 .num_resources = ARRAY_SIZE(heartbeat_resources),
54 .resource = heartbeat_resources,
55}; 47};
56 48
57static struct mtd_partition nor_flash_partitions[] = { 49static struct mtd_partition nor_flash_partitions[] = {
@@ -341,8 +333,14 @@ static void __init sh7785lcr_setup(char **cmdline_p)
341 pm_power_off = sh7785lcr_power_off; 333 pm_power_off = sh7785lcr_power_off;
342 334
343 /* sm501 DRAM configuration */ 335 /* sm501 DRAM configuration */
344 sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL; 336 sm501_reg = ioremap_nocache(SM107_REG_ADDR, SM501_DRAM_CONTROL);
345 writel(0x000307c2, sm501_reg); 337 if (!sm501_reg) {
338 printk(KERN_ERR "%s: ioremap error.\n", __func__);
339 return;
340 }
341
342 writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
343 iounmap(sm501_reg);
346} 344}
347 345
348/* Return the board specific boot mode pin configuration */ 346/* Return the board specific boot mode pin configuration */
diff --git a/arch/sh/boards/board-shmin.c b/arch/sh/boards/board-shmin.c
index b1dcbbc89188..325bed53b87e 100644
--- a/arch/sh/boards/board-shmin.c
+++ b/arch/sh/boards/board-shmin.c
@@ -17,8 +17,8 @@
17 17
18static void __init init_shmin_irq(void) 18static void __init init_shmin_irq(void)
19{ 19{
20 ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ 20 __raw_writew(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
21 ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. 21 __raw_writew(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
22 plat_irq_setup_pins(IRQ_MODE_IRQ); 22 plat_irq_setup_pins(IRQ_MODE_IRQ);
23} 23}
24 24
diff --git a/arch/sh/boards/mach-titan/setup.c b/arch/sh/boards/board-titan.c
index 81e7e0f03863..94c36c7bc0b3 100644
--- a/arch/sh/boards/mach-titan/setup.c
+++ b/arch/sh/boards/board-titan.c
@@ -19,26 +19,6 @@ static void __init init_titan_irq(void)
19} 19}
20 20
21static struct sh_machine_vector mv_titan __initmv = { 21static struct sh_machine_vector mv_titan __initmv = {
22 .mv_name = "Titan", 22 .mv_name = "Titan",
23 23 .mv_init_irq = init_titan_irq,
24 .mv_inb = titan_inb,
25 .mv_inw = titan_inw,
26 .mv_inl = titan_inl,
27 .mv_outb = titan_outb,
28 .mv_outw = titan_outw,
29 .mv_outl = titan_outl,
30
31 .mv_inb_p = titan_inb_p,
32 .mv_inw_p = titan_inw,
33 .mv_inl_p = titan_inl,
34 .mv_outb_p = titan_outb_p,
35 .mv_outw_p = titan_outw,
36 .mv_outl_p = titan_outl,
37
38 .mv_insl = titan_insl,
39 .mv_outsl = titan_outsl,
40
41 .mv_ioport_map = titan_ioport_map,
42
43 .mv_init_irq = init_titan_irq,
44}; 24};
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index 36b8bac9b124..a9bd6e3ee10b 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -2,7 +2,7 @@
2 * Renesas Technology Corp. SH7786 Urquell Support. 2 * Renesas Technology Corp. SH7786 Urquell Support.
3 * 3 *
4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> 4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 * Copyright (C) 2009 Paul Mundt 5 * Copyright (C) 2009, 2010 Paul Mundt
6 * 6 *
7 * Based on board-sh7785lcr.c 7 * Based on board-sh7785lcr.c
8 * Copyright (C) 2008 Yoshihiro Shimoda 8 * Copyright (C) 2008 Yoshihiro Shimoda
@@ -19,6 +19,7 @@
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/clk.h>
22#include <mach/urquell.h> 23#include <mach/urquell.h>
23#include <cpu/sh7786.h> 24#include <cpu/sh7786.h>
24#include <asm/heartbeat.h> 25#include <asm/heartbeat.h>
@@ -50,26 +51,17 @@
50 */ 51 */
51 52
52/* HeartBeat */ 53/* HeartBeat */
53static struct resource heartbeat_resources[] = { 54static struct resource heartbeat_resource = {
54 [0] = { 55 .start = BOARDREG(SLEDR),
55 .start = BOARDREG(SLEDR), 56 .end = BOARDREG(SLEDR),
56 .end = BOARDREG(SLEDR), 57 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
57 .flags = IORESOURCE_MEM,
58 },
59};
60
61static struct heartbeat_data heartbeat_data = {
62 .regsize = 16,
63}; 58};
64 59
65static struct platform_device heartbeat_device = { 60static struct platform_device heartbeat_device = {
66 .name = "heartbeat", 61 .name = "heartbeat",
67 .id = -1, 62 .id = -1,
68 .dev = { 63 .num_resources = 1,
69 .platform_data = &heartbeat_data, 64 .resource = &heartbeat_resource,
70 },
71 .num_resources = ARRAY_SIZE(heartbeat_resources),
72 .resource = heartbeat_resources,
73}; 65};
74 66
75/* LAN91C111 */ 67/* LAN91C111 */
@@ -184,6 +176,27 @@ static int urquell_mode_pins(void)
184 return __raw_readw(UBOARDREG(MDSWMR)); 176 return __raw_readw(UBOARDREG(MDSWMR));
185} 177}
186 178
179static int urquell_clk_init(void)
180{
181 struct clk *clk;
182 int ret;
183
184 /*
185 * Only handle the EXTAL case, anyone interfacing a crystal
186 * resonator will need to provide their own input clock.
187 */
188 if (test_mode_pin(MODE_PIN9))
189 return -EINVAL;
190
191 clk = clk_get(NULL, "extal");
192 if (!clk || IS_ERR(clk))
193 return PTR_ERR(clk);
194 ret = clk_set_rate(clk, 33333333);
195 clk_put(clk);
196
197 return ret;
198}
199
187/* Initialize the board */ 200/* Initialize the board */
188static void __init urquell_setup(char **cmdline_p) 201static void __init urquell_setup(char **cmdline_p)
189{ 202{
@@ -200,4 +213,5 @@ static struct sh_machine_vector mv_urquell __initmv = {
200 .mv_setup = urquell_setup, 213 .mv_setup = urquell_setup,
201 .mv_init_irq = urquell_init_irq, 214 .mv_init_irq = urquell_init_irq,
202 .mv_mode_pins = urquell_mode_pins, 215 .mv_mode_pins = urquell_mode_pins,
216 .mv_clk_init = urquell_clk_init,
203}; 217};
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index 1f5fa5c44f6d..57e37e284208 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -159,21 +159,21 @@ static void ap320_wvga_power_on(void *board_data)
159 msleep(100); 159 msleep(100);
160 160
161 /* ASD AP-320/325 LCD ON */ 161 /* ASD AP-320/325 LCD ON */
162 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG); 162 __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
163 163
164 /* backlight */ 164 /* backlight */
165 gpio_set_value(GPIO_PTS3, 0); 165 gpio_set_value(GPIO_PTS3, 0);
166 ctrl_outw(0x100, FPGA_BKLREG); 166 __raw_writew(0x100, FPGA_BKLREG);
167} 167}
168 168
169static void ap320_wvga_power_off(void *board_data) 169static void ap320_wvga_power_off(void *board_data)
170{ 170{
171 /* backlight */ 171 /* backlight */
172 ctrl_outw(0, FPGA_BKLREG); 172 __raw_writew(0, FPGA_BKLREG);
173 gpio_set_value(GPIO_PTS3, 1); 173 gpio_set_value(GPIO_PTS3, 1);
174 174
175 /* ASD AP-320/325 LCD OFF */ 175 /* ASD AP-320/325 LCD OFF */
176 ctrl_outw(0, FPGA_LCDREG); 176 __raw_writew(0, FPGA_LCDREG);
177} 177}
178 178
179static struct sh_mobile_lcdc_info lcdc_info = { 179static struct sh_mobile_lcdc_info lcdc_info = {
@@ -420,7 +420,7 @@ static struct resource sdhi0_cn3_resources[] = {
420 .flags = IORESOURCE_MEM, 420 .flags = IORESOURCE_MEM,
421 }, 421 },
422 [1] = { 422 [1] = {
423 .start = 101, 423 .start = 100,
424 .flags = IORESOURCE_IRQ, 424 .flags = IORESOURCE_IRQ,
425 }, 425 },
426}; 426};
@@ -443,7 +443,7 @@ static struct resource sdhi1_cn7_resources[] = {
443 .flags = IORESOURCE_MEM, 443 .flags = IORESOURCE_MEM,
444 }, 444 },
445 [1] = { 445 [1] = {
446 .start = 24, 446 .start = 23,
447 .flags = IORESOURCE_IRQ, 447 .flags = IORESOURCE_IRQ,
448 }, 448 },
449}; 449};
@@ -471,8 +471,8 @@ static struct i2c_board_info ap325rxa_i2c_camera[] = {
471}; 471};
472 472
473static struct ov772x_camera_info ov7725_info = { 473static struct ov772x_camera_info ov7725_info = {
474 .buswidth = SOCAM_DATAWIDTH_8, 474 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP | \
475 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP, 475 OV772X_FLAG_8BIT,
476 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0), 476 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
477}; 477};
478 478
@@ -595,7 +595,7 @@ static int __init ap325rxa_devices_setup(void)
595 gpio_request(GPIO_PTZ4, NULL); 595 gpio_request(GPIO_PTZ4, NULL);
596 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */ 596 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
597 597
598 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); 598 __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
599 599
600 /* FLCTL */ 600 /* FLCTL */
601 gpio_request(GPIO_FN_FCE, NULL); 601 gpio_request(GPIO_FN_FCE, NULL);
@@ -613,9 +613,9 @@ static int __init ap325rxa_devices_setup(void)
613 gpio_request(GPIO_FN_FWE, NULL); 613 gpio_request(GPIO_FN_FWE, NULL);
614 gpio_request(GPIO_FN_FRB, NULL); 614 gpio_request(GPIO_FN_FRB, NULL);
615 615
616 ctrl_outw(0, PORT_HIZCRC); 616 __raw_writew(0, PORT_HIZCRC);
617 ctrl_outw(0xFFFF, PORT_DRVCRA); 617 __raw_writew(0xFFFF, PORT_DRVCRA);
618 ctrl_outw(0xFFFF, PORT_DRVCRB); 618 __raw_writew(0xFFFF, PORT_DRVCRB);
619 619
620 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); 620 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
621 621
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index 33f770856319..1394b078db36 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -66,9 +66,9 @@ static void enable_cayman_irq(unsigned int irq)
66 reg = EPLD_MASK_BASE + ((irq / 8) << 2); 66 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
67 bit = 1<<(irq % 8); 67 bit = 1<<(irq % 8);
68 local_irq_save(flags); 68 local_irq_save(flags);
69 mask = ctrl_inl(reg); 69 mask = __raw_readl(reg);
70 mask |= bit; 70 mask |= bit;
71 ctrl_outl(mask, reg); 71 __raw_writel(mask, reg);
72 local_irq_restore(flags); 72 local_irq_restore(flags);
73} 73}
74 74
@@ -83,9 +83,9 @@ void disable_cayman_irq(unsigned int irq)
83 reg = EPLD_MASK_BASE + ((irq / 8) << 2); 83 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
84 bit = 1<<(irq % 8); 84 bit = 1<<(irq % 8);
85 local_irq_save(flags); 85 local_irq_save(flags);
86 mask = ctrl_inl(reg); 86 mask = __raw_readl(reg);
87 mask &= ~bit; 87 mask &= ~bit;
88 ctrl_outl(mask, reg); 88 __raw_writel(mask, reg);
89 local_irq_restore(flags); 89 local_irq_restore(flags);
90} 90}
91 91
@@ -109,8 +109,8 @@ int cayman_irq_demux(int evt)
109 unsigned long status; 109 unsigned long status;
110 int i; 110 int i;
111 111
112 status = ctrl_inl(EPLD_STATUS_BASE) & 112 status = __raw_readl(EPLD_STATUS_BASE) &
113 ctrl_inl(EPLD_MASK_BASE) & 0xff; 113 __raw_readl(EPLD_MASK_BASE) & 0xff;
114 if (status == 0) { 114 if (status == 0) {
115 irq = -1; 115 irq = -1;
116 } else { 116 } else {
@@ -126,8 +126,8 @@ int cayman_irq_demux(int evt)
126 unsigned long status; 126 unsigned long status;
127 int i; 127 int i;
128 128
129 status = ctrl_inl(EPLD_STATUS_BASE + 3 * sizeof(u32)) & 129 status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
130 ctrl_inl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff; 130 __raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
131 if (status == 0) { 131 if (status == 0) {
132 irq = -1; 132 irq = -1;
133 } else { 133 } else {
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
index f55fc8e795e9..d932667410ab 100644
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -135,3 +135,30 @@ int systemasic_irq_demux(int irq)
135 /* Not reached */ 135 /* Not reached */
136 return irq; 136 return irq;
137} 137}
138
139void systemasic_irq_init(void)
140{
141 int i, nid = cpu_to_node(boot_cpu_data);
142
143 /* Assign all virtual IRQs to the System ASIC int. handler */
144 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) {
145 unsigned int irq;
146
147 irq = create_irq_nr(i, nid);
148 if (unlikely(irq == 0)) {
149 pr_err("%s: failed hooking irq %d for systemasic\n",
150 __func__, i);
151 return;
152 }
153
154 if (unlikely(irq != i)) {
155 pr_err("%s: got irq %d but wanted %d, bailing.\n",
156 __func__, irq, i);
157 destroy_irq(irq);
158 return;
159 }
160
161 set_irq_chip_and_handler(i, &systemasic_int,
162 handle_level_irq);
163 }
164}
diff --git a/arch/sh/boards/mach-dreamcast/rtc.c b/arch/sh/boards/mach-dreamcast/rtc.c
index a7433685798d..061d65714fcc 100644
--- a/arch/sh/boards/mach-dreamcast/rtc.c
+++ b/arch/sh/boards/mach-dreamcast/rtc.c
@@ -35,11 +35,11 @@ static void aica_rtc_gettimeofday(struct timespec *ts)
35 unsigned long val1, val2; 35 unsigned long val1, val2;
36 36
37 do { 37 do {
38 val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 38 val1 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
39 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 39 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
40 40
41 val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 41 val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
42 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 42 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
43 } while (val1 != val2); 43 } while (val1 != val2);
44 44
45 ts->tv_sec = val1 - TWENTY_YEARS; 45 ts->tv_sec = val1 - TWENTY_YEARS;
@@ -60,14 +60,14 @@ static int aica_rtc_settimeofday(const time_t secs)
60 unsigned long adj = secs + TWENTY_YEARS; 60 unsigned long adj = secs + TWENTY_YEARS;
61 61
62 do { 62 do {
63 ctrl_outl((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H); 63 __raw_writel((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H);
64 ctrl_outl((adj & 0xffff), AICA_RTC_SECS_L); 64 __raw_writel((adj & 0xffff), AICA_RTC_SECS_L);
65 65
66 val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 66 val1 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
67 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 67 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
68 68
69 val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 69 val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
70 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 70 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
71 } while (val1 != val2); 71 } while (val1 != val2);
72 72
73 return 0; 73 return 0;
diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c
index a4b7402d6176..ad1a4db72e04 100644
--- a/arch/sh/boards/mach-dreamcast/setup.c
+++ b/arch/sh/boards/mach-dreamcast/setup.c
@@ -28,25 +28,8 @@
28#include <asm/machvec.h> 28#include <asm/machvec.h>
29#include <mach/sysasic.h> 29#include <mach/sysasic.h>
30 30
31extern struct irq_chip systemasic_int;
32extern void aica_time_init(void);
33extern int systemasic_irq_demux(int);
34
35static void __init dreamcast_setup(char **cmdline_p) 31static void __init dreamcast_setup(char **cmdline_p)
36{ 32{
37 int i;
38
39 /* Mask all hardware events */
40 /* XXX */
41
42 /* Acknowledge any previous events */
43 /* XXX */
44
45 /* Assign all virtual IRQs to the System ASIC int. handler */
46 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
47 set_irq_chip_and_handler(i, &systemasic_int,
48 handle_level_irq);
49
50 board_time_init = aica_time_init; 33 board_time_init = aica_time_init;
51} 34}
52 35
@@ -54,4 +37,5 @@ static struct sh_machine_vector mv_dreamcast __initmv = {
54 .mv_name = "Sega Dreamcast", 37 .mv_name = "Sega Dreamcast",
55 .mv_setup = dreamcast_setup, 38 .mv_setup = dreamcast_setup,
56 .mv_irq_demux = systemasic_irq_demux, 39 .mv_irq_demux = systemasic_irq_demux,
40 .mv_init_irq = systemasic_irq_init,
57}; 41};
diff --git a/arch/sh/boards/mach-ecovec24/sdram.S b/arch/sh/boards/mach-ecovec24/sdram.S
index 833440044407..3963c6f23d52 100644
--- a/arch/sh/boards/mach-ecovec24/sdram.S
+++ b/arch/sh/boards/mach-ecovec24/sdram.S
@@ -37,6 +37,10 @@ ENTRY(ecovec24_sdram_enter_end)
37 .balign 4 37 .balign 4
38ENTRY(ecovec24_sdram_leave_start) 38ENTRY(ecovec24_sdram_leave_start)
39 39
40 mov.l @(SH_SLEEP_MODE, r5), r0
41 tst #SUSP_SH_RSTANDBY, r0
42 bf resume_rstandby
43
40 /* DBSC: put memory in auto-refresh mode */ 44 /* DBSC: put memory in auto-refresh mode */
41 45
42 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */ 46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
@@ -49,4 +53,59 @@ ENTRY(ecovec24_sdram_leave_start)
49 rts 53 rts
50 nop 54 nop
51 55
56resume_rstandby:
57
58 /* DBSC: re-initialize and put in auto-refresh */
59
60 ED 0xFD000108, 0x00000181 /* DBPDCNT0 */
61 ED 0xFD000020, 0x015B0002 /* DBCONF */
62 ED 0xFD000030, 0x03071502 /* DBTR0 */
63 ED 0xFD000034, 0x02020102 /* DBTR1 */
64 ED 0xFD000038, 0x01090405 /* DBTR2 */
65 ED 0xFD00003C, 0x00000002 /* DBTR3 */
66 ED 0xFD000008, 0x00000005 /* DBKIND */
67 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
68 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
69 ED 0xFD000018, 0x00000001 /* DBCKECNT */
70
71 mov #100,r0
72WAIT_400NS:
73 dt r0
74 bf WAIT_400NS
75
76 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
77 ED 0xFD000060, 0x00020000 /* DBMRCNT (EMR2) */
78 ED 0xFD000060, 0x00030000 /* DBMRCNT (EMR3) */
79 ED 0xFD000060, 0x00010004 /* DBMRCNT (EMR) */
80 ED 0xFD000060, 0x00000532 /* DBMRCNT (MRS) */
81 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
82 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
83 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
84 ED 0xFD000060, 0x00000432 /* DBMRCNT (MRS) */
85 ED 0xFD000060, 0x000103c0 /* DBMRCNT (EMR) */
86 ED 0xFD000060, 0x00010040 /* DBMRCNT (EMR) */
87
88 mov #100,r0
89WAIT_400NS_2:
90 dt r0
91 bf WAIT_400NS_2
92
93 ED 0xFD000010, 0x00000001 /* DBEN */
94 ED 0xFD000044, 0x0000050f /* DBRFPDN1 */
95 ED 0xFD000048, 0x236800e6 /* DBRFPDN2 */
96
97 mov.l DUMMY,r0
98 mov.l @r0, r1 /* force single dummy read */
99
100 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
101 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
102 ED 0xFD000108, 0x00000080 /* DBPDCNT0 */
103 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
104
105 rts
106 nop
107
108 .balign 4
109DUMMY: .long 0xac400000
110
52ENTRY(ecovec24_sdram_leave_end) 111ENTRY(ecovec24_sdram_leave_end)
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 5c246289b4f0..39ed8722d11a 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -64,18 +64,16 @@
64 64
65/* Heartbeat */ 65/* Heartbeat */
66static unsigned char led_pos[] = { 0, 1, 2, 3 }; 66static unsigned char led_pos[] = { 0, 1, 2, 3 };
67
67static struct heartbeat_data heartbeat_data = { 68static struct heartbeat_data heartbeat_data = {
68 .regsize = 8,
69 .nr_bits = 4, 69 .nr_bits = 4,
70 .bit_pos = led_pos, 70 .bit_pos = led_pos,
71}; 71};
72 72
73static struct resource heartbeat_resources[] = { 73static struct resource heartbeat_resource = {
74 [0] = { 74 .start = 0xA405012C, /* PTG */
75 .start = 0xA405012C, /* PTG */ 75 .end = 0xA405012E - 1,
76 .end = 0xA405012E - 1, 76 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
77 .flags = IORESOURCE_MEM,
78 },
79}; 77};
80 78
81static struct platform_device heartbeat_device = { 79static struct platform_device heartbeat_device = {
@@ -84,8 +82,8 @@ static struct platform_device heartbeat_device = {
84 .dev = { 82 .dev = {
85 .platform_data = &heartbeat_data, 83 .platform_data = &heartbeat_data,
86 }, 84 },
87 .num_resources = ARRAY_SIZE(heartbeat_resources), 85 .num_resources = 1,
88 .resource = heartbeat_resources, 86 .resource = &heartbeat_resource,
89}; 87};
90 88
91/* MTD */ 89/* MTD */
@@ -455,7 +453,7 @@ static struct resource sdhi0_resources[] = {
455 .flags = IORESOURCE_MEM, 453 .flags = IORESOURCE_MEM,
456 }, 454 },
457 [1] = { 455 [1] = {
458 .start = 101, 456 .start = 100,
459 .flags = IORESOURCE_IRQ, 457 .flags = IORESOURCE_IRQ,
460 }, 458 },
461}; 459};
@@ -491,7 +489,7 @@ static struct resource sdhi1_resources[] = {
491 .flags = IORESOURCE_MEM, 489 .flags = IORESOURCE_MEM,
492 }, 490 },
493 [1] = { 491 [1] = {
494 .start = 24, 492 .start = 23,
495 .flags = IORESOURCE_IRQ, 493 .flags = IORESOURCE_IRQ,
496 }, 494 },
497}; 495};
@@ -698,13 +696,13 @@ static struct platform_device camera_devices[] = {
698#define FCLKBCR 0xa415000c 696#define FCLKBCR 0xa415000c
699static void fsimck_init(struct clk *clk) 697static void fsimck_init(struct clk *clk)
700{ 698{
701 u32 status = ctrl_inl(clk->enable_reg); 699 u32 status = __raw_readl(clk->enable_reg);
702 700
703 /* use external clock */ 701 /* use external clock */
704 status &= ~0x000000ff; 702 status &= ~0x000000ff;
705 status |= 0x00000080; 703 status |= 0x00000080;
706 704
707 ctrl_outl(status, clk->enable_reg); 705 __raw_writel(status, clk->enable_reg);
708} 706}
709 707
710static struct clk_ops fsimck_clk_ops = { 708static struct clk_ops fsimck_clk_ops = {
@@ -753,6 +751,26 @@ static struct platform_device fsi_device = {
753 }, 751 },
754}; 752};
755 753
754/* IrDA */
755static struct resource irda_resources[] = {
756 [0] = {
757 .name = "IrDA",
758 .start = 0xA45D0000,
759 .end = 0xA45D0049,
760 .flags = IORESOURCE_MEM,
761 },
762 [1] = {
763 .start = 20,
764 .flags = IORESOURCE_IRQ,
765 },
766};
767
768static struct platform_device irda_device = {
769 .name = "sh_sir",
770 .num_resources = ARRAY_SIZE(irda_resources),
771 .resource = irda_resources,
772};
773
756static struct platform_device *ecovec_devices[] __initdata = { 774static struct platform_device *ecovec_devices[] __initdata = {
757 &heartbeat_device, 775 &heartbeat_device,
758 &nor_flash_device, 776 &nor_flash_device,
@@ -773,8 +791,10 @@ static struct platform_device *ecovec_devices[] __initdata = {
773 &camera_devices[1], 791 &camera_devices[1],
774 &camera_devices[2], 792 &camera_devices[2],
775 &fsi_device, 793 &fsi_device,
794 &irda_device,
776}; 795};
777 796
797#ifdef CONFIG_I2C
778#define EEPROM_ADDR 0x50 798#define EEPROM_ADDR 0x50
779static u8 mac_read(struct i2c_adapter *a, u8 command) 799static u8 mac_read(struct i2c_adapter *a, u8 command)
780{ 800{
@@ -817,6 +837,12 @@ static void __init sh_eth_init(struct sh_eth_plat_data *pd)
817 msleep(10); 837 msleep(10);
818 } 838 }
819} 839}
840#else
841static void __init sh_eth_init(struct sh_eth_plat_data *pd)
842{
843 pr_err("unable to read sh_eth MAC address\n");
844}
845#endif
820 846
821#define PORT_HIZA 0xA4050158 847#define PORT_HIZA 0xA4050158
822#define IODRIVEA 0xA405018A 848#define IODRIVEA 0xA405018A
@@ -831,7 +857,8 @@ static int __init arch_setup(void)
831 struct clk *clk; 857 struct clk *clk;
832 858
833 /* register board specific self-refresh code */ 859 /* register board specific self-refresh code */
834 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF, 860 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
861 SUSP_SH_RSTANDBY,
835 &ecovec24_sdram_enter_start, 862 &ecovec24_sdram_enter_start,
836 &ecovec24_sdram_enter_end, 863 &ecovec24_sdram_enter_end,
837 &ecovec24_sdram_leave_start, 864 &ecovec24_sdram_leave_start,
@@ -855,7 +882,7 @@ static int __init arch_setup(void)
855 gpio_direction_output(GPIO_PTG1, 0); 882 gpio_direction_output(GPIO_PTG1, 0);
856 gpio_direction_output(GPIO_PTG2, 0); 883 gpio_direction_output(GPIO_PTG2, 0);
857 gpio_direction_output(GPIO_PTG3, 0); 884 gpio_direction_output(GPIO_PTG3, 0);
858 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); 885 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
859 886
860 /* enable SH-Eth */ 887 /* enable SH-Eth */
861 gpio_request(GPIO_PTA1, NULL); 888 gpio_request(GPIO_PTA1, NULL);
@@ -875,16 +902,16 @@ static int __init arch_setup(void)
875 gpio_request(GPIO_FN_LNKSTA, NULL); 902 gpio_request(GPIO_FN_LNKSTA, NULL);
876 903
877 /* enable USB */ 904 /* enable USB */
878 ctrl_outw(0x0000, 0xA4D80000); 905 __raw_writew(0x0000, 0xA4D80000);
879 ctrl_outw(0x0000, 0xA4D90000); 906 __raw_writew(0x0000, 0xA4D90000);
880 gpio_request(GPIO_PTB3, NULL); 907 gpio_request(GPIO_PTB3, NULL);
881 gpio_request(GPIO_PTB4, NULL); 908 gpio_request(GPIO_PTB4, NULL);
882 gpio_request(GPIO_PTB5, NULL); 909 gpio_request(GPIO_PTB5, NULL);
883 gpio_direction_input(GPIO_PTB3); 910 gpio_direction_input(GPIO_PTB3);
884 gpio_direction_output(GPIO_PTB4, 0); 911 gpio_direction_output(GPIO_PTB4, 0);
885 gpio_direction_output(GPIO_PTB5, 0); 912 gpio_direction_output(GPIO_PTB5, 0);
886 ctrl_outw(0x0600, 0xa40501d4); 913 __raw_writew(0x0600, 0xa40501d4);
887 ctrl_outw(0x0600, 0xa4050192); 914 __raw_writew(0x0600, 0xa4050192);
888 915
889 if (gpio_get_value(GPIO_PTB3)) { 916 if (gpio_get_value(GPIO_PTB3)) {
890 printk(KERN_INFO "USB1 function is selected\n"); 917 printk(KERN_INFO "USB1 function is selected\n");
@@ -925,7 +952,7 @@ static int __init arch_setup(void)
925 gpio_request(GPIO_FN_LCDVSYN, NULL); 952 gpio_request(GPIO_FN_LCDVSYN, NULL);
926 gpio_request(GPIO_FN_LCDDON, NULL); 953 gpio_request(GPIO_FN_LCDDON, NULL);
927 gpio_request(GPIO_FN_LCDLCLK, NULL); 954 gpio_request(GPIO_FN_LCDLCLK, NULL);
928 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 955 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
929 956
930 gpio_request(GPIO_PTE6, NULL); 957 gpio_request(GPIO_PTE6, NULL);
931 gpio_request(GPIO_PTU1, NULL); 958 gpio_request(GPIO_PTU1, NULL);
@@ -937,7 +964,7 @@ static int __init arch_setup(void)
937 gpio_direction_output(GPIO_PTA2, 0); 964 gpio_direction_output(GPIO_PTA2, 0);
938 965
939 /* I/O buffer drive ability is high */ 966 /* I/O buffer drive ability is high */
940 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); 967 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
941 968
942 if (gpio_get_value(GPIO_PTE6)) { 969 if (gpio_get_value(GPIO_PTE6)) {
943 /* DVI */ 970 /* DVI */
@@ -1069,7 +1096,7 @@ static int __init arch_setup(void)
1069 gpio_direction_output(GPIO_PTB7, 0); 1096 gpio_direction_output(GPIO_PTB7, 0);
1070 1097
1071 /* I/O buffer drive ability is high for SDHI1 */ 1098 /* I/O buffer drive ability is high for SDHI1 */
1072 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); 1099 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1073#else 1100#else
1074 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ 1101 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1075 gpio_request(GPIO_FN_MSIOF0_TXD, NULL); 1102 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
@@ -1107,6 +1134,11 @@ static int __init arch_setup(void)
1107 gpio_request(GPIO_FN_FSIOBLRCK, NULL); 1134 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1108 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 1135 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1109 1136
1137 /* set SPU2 clock to 83.4 MHz */
1138 clk = clk_get(NULL, "spu_clk");
1139 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1140 clk_put(clk);
1141
1110 /* change parent of FSI B */ 1142 /* change parent of FSI B */
1111 clk = clk_get(NULL, "fsib_clk"); 1143 clk = clk_get(NULL, "fsib_clk");
1112 clk_register(&fsimckb_clk); 1144 clk_register(&fsimckb_clk);
@@ -1123,6 +1155,17 @@ static int __init arch_setup(void)
1123 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 1155 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1124 gpio_direction_input(GPIO_FN_INTC_IRQ1); 1156 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1125 1157
1158 /* set VPU clock to 166 MHz */
1159 clk = clk_get(NULL, "vpu_clk");
1160 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1161 clk_put(clk);
1162
1163 /* enable IrDA */
1164 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1165 gpio_request(GPIO_FN_IRDA_IN, NULL);
1166 gpio_request(GPIO_PTU5, NULL);
1167 gpio_direction_output(GPIO_PTU5, 0);
1168
1126 /* enable I2C device */ 1169 /* enable I2C device */
1127 i2c_register_board_info(0, i2c0_devices, 1170 i2c_register_board_info(0, i2c0_devices,
1128 ARRAY_SIZE(i2c0_devices)); 1171 ARRAY_SIZE(i2c0_devices));
diff --git a/arch/sh/boards/mach-highlander/irq-r7780mp.c b/arch/sh/boards/mach-highlander/irq-r7780mp.c
index 83c28bcd4d2a..9893fd3a1358 100644
--- a/arch/sh/boards/mach-highlander/irq-r7780mp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7780mp.c
@@ -64,7 +64,7 @@ static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
64 64
65unsigned char * __init highlander_plat_irq_setup(void) 65unsigned char * __init highlander_plat_irq_setup(void)
66{ 66{
67 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) { 67 if ((__raw_readw(0xa4000700) & 0xf000) == 0x2000) {
68 printk(KERN_INFO "Using r7780mp interrupt controller.\n"); 68 printk(KERN_INFO "Using r7780mp interrupt controller.\n");
69 register_intc_controller(&intc_desc); 69 register_intc_controller(&intc_desc);
70 return irl2irq; 70 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/irq-r7780rp.c b/arch/sh/boards/mach-highlander/irq-r7780rp.c
index b721e86b5af4..0805b2151452 100644
--- a/arch/sh/boards/mach-highlander/irq-r7780rp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7780rp.c
@@ -57,7 +57,7 @@ static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
57 57
58unsigned char * __init highlander_plat_irq_setup(void) 58unsigned char * __init highlander_plat_irq_setup(void)
59{ 59{
60 if (ctrl_inw(0xa5000600)) { 60 if (__raw_readw(0xa5000600)) {
61 printk(KERN_INFO "Using r7780rp interrupt controller.\n"); 61 printk(KERN_INFO "Using r7780rp interrupt controller.\n");
62 register_intc_controller(&intc_desc); 62 register_intc_controller(&intc_desc);
63 return irl2irq; 63 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/irq-r7785rp.c b/arch/sh/boards/mach-highlander/irq-r7785rp.c
index 3811b060a39b..558b24862776 100644
--- a/arch/sh/boards/mach-highlander/irq-r7785rp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7785rp.c
@@ -66,20 +66,20 @@ static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
66 66
67unsigned char * __init highlander_plat_irq_setup(void) 67unsigned char * __init highlander_plat_irq_setup(void)
68{ 68{
69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) 69 if ((__raw_readw(0xa4000158) & 0xf000) != 0x1000)
70 return NULL; 70 return NULL;
71 71
72 printk(KERN_INFO "Using r7785rp interrupt controller.\n"); 72 printk(KERN_INFO "Using r7785rp interrupt controller.\n");
73 73
74 ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ 74 __raw_writew(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */
75 75
76 /* Setup the FPGA IRL */ 76 /* Setup the FPGA IRL */
77 ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */ 77 __raw_writew(0x0000, PA_IRLPRA); /* FPGA IRLA */
78 ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */ 78 __raw_writew(0xe598, PA_IRLPRB); /* FPGA IRLB */
79 ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ 79 __raw_writew(0x7060, PA_IRLPRC); /* FPGA IRLC */
80 ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ 80 __raw_writew(0x0000, PA_IRLPRD); /* FPGA IRLD */
81 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ 81 __raw_writew(0x4321, PA_IRLPRE); /* FPGA IRLE */
82 ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */ 82 __raw_writew(0xdcba, PA_IRLPRF); /* FPGA IRLF */
83 83
84 register_intc_controller(&intc_desc); 84 register_intc_controller(&intc_desc);
85 return irl2irq; 85 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/psw.c b/arch/sh/boards/mach-highlander/psw.c
index 37b1a2ee71a5..522786318d36 100644
--- a/arch/sh/boards/mach-highlander/psw.c
+++ b/arch/sh/boards/mach-highlander/psw.c
@@ -24,7 +24,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
24 unsigned int l, mask; 24 unsigned int l, mask;
25 int ret = 0; 25 int ret = 0;
26 26
27 l = ctrl_inw(PA_DBSW); 27 l = __raw_readw(PA_DBSW);
28 28
29 /* Nothing to do if there's no state change */ 29 /* Nothing to do if there's no state change */
30 if (psw->state) { 30 if (psw->state) {
@@ -45,7 +45,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
45out: 45out:
46 /* Clear the switch IRQs */ 46 /* Clear the switch IRQs */
47 l |= (0x7 << 12); 47 l |= (0x7 << 12);
48 ctrl_outw(l, PA_DBSW); 48 __raw_writew(l, PA_DBSW);
49 49
50 return IRQ_RETVAL(ret); 50 return IRQ_RETVAL(ret);
51} 51}
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index f663c14d8885..affd66747ba3 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -311,13 +311,13 @@ device_initcall(r7780rp_devices_setup);
311 */ 311 */
312static int ivdr_clk_enable(struct clk *clk) 312static int ivdr_clk_enable(struct clk *clk)
313{ 313{
314 ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); 314 __raw_writew(__raw_readw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
315 return 0; 315 return 0;
316} 316}
317 317
318static void ivdr_clk_disable(struct clk *clk) 318static void ivdr_clk_disable(struct clk *clk)
319{ 319{
320 ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL); 320 __raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
321} 321}
322 322
323static struct clk_ops ivdr_clk_ops = { 323static struct clk_ops ivdr_clk_ops = {
@@ -337,7 +337,7 @@ static struct clk *r7780rp_clocks[] = {
337static void r7780rp_power_off(void) 337static void r7780rp_power_off(void)
338{ 338{
339 if (mach_is_r7780mp() || mach_is_r7785rp()) 339 if (mach_is_r7780mp() || mach_is_r7785rp())
340 ctrl_outw(0x0001, PA_POFF); 340 __raw_writew(0x0001, PA_POFF);
341} 341}
342 342
343/* 343/*
@@ -345,7 +345,7 @@ static void r7780rp_power_off(void)
345 */ 345 */
346static void __init highlander_setup(char **cmdline_p) 346static void __init highlander_setup(char **cmdline_p)
347{ 347{
348 u16 ver = ctrl_inw(PA_VERREG); 348 u16 ver = __raw_readw(PA_VERREG);
349 int i; 349 int i;
350 350
351 printk(KERN_INFO "Renesas Solutions Highlander %s support.\n", 351 printk(KERN_INFO "Renesas Solutions Highlander %s support.\n",
@@ -370,12 +370,12 @@ static void __init highlander_setup(char **cmdline_p)
370 clk_enable(clk); 370 clk_enable(clk);
371 } 371 }
372 372
373 ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */ 373 __raw_writew(0x0000, PA_OBLED); /* Clear LED. */
374 374
375 if (mach_is_r7780rp()) 375 if (mach_is_r7780rp())
376 ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */ 376 __raw_writew(0x0001, PA_SDPOW); /* SD Power ON */
377 377
378 ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */ 378 __raw_writew(__raw_readw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */
379 379
380 pm_power_off = r7780rp_power_off; 380 pm_power_off = r7780rp_power_off;
381} 381}
diff --git a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
index e85212faf40a..b49535c0ddd9 100644
--- a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
+++ b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
@@ -53,7 +53,7 @@ static void hp6x0_apm_get_power_status(struct apm_power_info *info)
53 info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ? 53 info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ?
54 APM_AC_ONLINE : APM_AC_OFFLINE; 54 APM_AC_ONLINE : APM_AC_OFFLINE;
55 55
56 pgdr = ctrl_inb(PGDR); 56 pgdr = __raw_readb(PGDR);
57 if (pgdr & PGDR_MAIN_BATTERY_OUT) { 57 if (pgdr & PGDR_MAIN_BATTERY_OUT) {
58 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT; 58 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
59 info->battery_flag = 0x80; 59 info->battery_flag = 0x80;
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c
index d936c1af7620..4499a3749d40 100644
--- a/arch/sh/boards/mach-hp6xx/pm.c
+++ b/arch/sh/boards/mach-hp6xx/pm.c
@@ -53,17 +53,17 @@ static void pm_enter(void)
53 sh_wdt_write_cnt(0); 53 sh_wdt_write_cnt(0);
54 54
55 /* disable PLL1 */ 55 /* disable PLL1 */
56 frqcr = ctrl_inw(FRQCR); 56 frqcr = __raw_readw(FRQCR);
57 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY); 57 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
58 ctrl_outw(frqcr, FRQCR); 58 __raw_writew(frqcr, FRQCR);
59 59
60 /* enable standby */ 60 /* enable standby */
61 stbcr = ctrl_inb(STBCR); 61 stbcr = __raw_readb(STBCR);
62 ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR); 62 __raw_writeb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
63 63
64 /* set self-refresh */ 64 /* set self-refresh */
65 mcr = ctrl_inw(MCR); 65 mcr = __raw_readw(MCR);
66 ctrl_outw(mcr & ~MCR_RFSH, MCR); 66 __raw_writew(mcr & ~MCR_RFSH, MCR);
67 67
68 /* set interrupt handler */ 68 /* set interrupt handler */
69 asm volatile("stc vbr, %0" : "=r" (vbr_old)); 69 asm volatile("stc vbr, %0" : "=r" (vbr_old));
@@ -73,8 +73,8 @@ static void pm_enter(void)
73 &wakeup_start, &wakeup_end - &wakeup_start); 73 &wakeup_start, &wakeup_end - &wakeup_start);
74 asm volatile("ldc %0, vbr" : : "r" (vbr_new)); 74 asm volatile("ldc %0, vbr" : : "r" (vbr_new));
75 75
76 ctrl_outw(0, RTCNT); 76 __raw_writew(0, RTCNT);
77 ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR); 77 __raw_writew(mcr | MCR_RFSH | MCR_RMODE, MCR);
78 78
79 cpu_sleep(); 79 cpu_sleep();
80 80
@@ -83,14 +83,14 @@ static void pm_enter(void)
83 free_page(vbr_new); 83 free_page(vbr_new);
84 84
85 /* enable PLL1 */ 85 /* enable PLL1 */
86 frqcr = ctrl_inw(FRQCR); 86 frqcr = __raw_readw(FRQCR);
87 frqcr |= FRQCR_PSTBY; 87 frqcr |= FRQCR_PSTBY;
88 ctrl_outw(frqcr, FRQCR); 88 __raw_writew(frqcr, FRQCR);
89 udelay(50); 89 udelay(50);
90 frqcr |= FRQCR_PLLEN; 90 frqcr |= FRQCR_PLLEN;
91 ctrl_outw(frqcr, FRQCR); 91 __raw_writew(frqcr, FRQCR);
92 92
93 ctrl_outb(stbcr, STBCR); 93 __raw_writeb(stbcr, STBCR);
94 94
95 clear_bl_bit(); 95 clear_bl_bit();
96} 96}
@@ -115,21 +115,21 @@ static int hp6x0_pm_enter(suspend_state_t state)
115 outw(hd64461_stbcr, HD64461_STBCR); 115 outw(hd64461_stbcr, HD64461_STBCR);
116#endif 116#endif
117 117
118 ctrl_outb(0x1f, DACR); 118 __raw_writeb(0x1f, DACR);
119 119
120 stbcr = ctrl_inb(STBCR); 120 stbcr = __raw_readb(STBCR);
121 ctrl_outb(0x01, STBCR); 121 __raw_writeb(0x01, STBCR);
122 122
123 stbcr2 = ctrl_inb(STBCR2); 123 stbcr2 = __raw_readb(STBCR2);
124 ctrl_outb(0x7f , STBCR2); 124 __raw_writeb(0x7f , STBCR2);
125 125
126 outw(0xf07f, HD64461_SCPUCR); 126 outw(0xf07f, HD64461_SCPUCR);
127 127
128 pm_enter(); 128 pm_enter();
129 129
130 outw(0, HD64461_SCPUCR); 130 outw(0, HD64461_SCPUCR);
131 ctrl_outb(stbcr, STBCR); 131 __raw_writeb(stbcr, STBCR);
132 ctrl_outb(stbcr2, STBCR2); 132 __raw_writeb(stbcr2, STBCR2);
133 133
134#ifdef CONFIG_HD64461_ENABLER 134#ifdef CONFIG_HD64461_ENABLER
135 hd64461_stbcr = inw(HD64461_STBCR); 135 hd64461_stbcr = inw(HD64461_STBCR);
diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c
index e6dd5e96321e..8c9add5f4cfa 100644
--- a/arch/sh/boards/mach-hp6xx/setup.c
+++ b/arch/sh/boards/mach-hp6xx/setup.c
@@ -149,19 +149,19 @@ static void __init hp6xx_setup(char **cmdline_p)
149 149
150 sh_dac_output(0, DAC_SPEAKER_VOLUME); 150 sh_dac_output(0, DAC_SPEAKER_VOLUME);
151 sh_dac_disable(DAC_SPEAKER_VOLUME); 151 sh_dac_disable(DAC_SPEAKER_VOLUME);
152 v8 = ctrl_inb(DACR); 152 v8 = __raw_readb(DACR);
153 v8 &= ~DACR_DAE; 153 v8 &= ~DACR_DAE;
154 ctrl_outb(v8,DACR); 154 __raw_writeb(v8,DACR);
155 155
156 v8 = ctrl_inb(SCPDR); 156 v8 = __raw_readb(SCPDR);
157 v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y; 157 v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y;
158 v8 &= ~SCPDR_TS_SCAN_ENABLE; 158 v8 &= ~SCPDR_TS_SCAN_ENABLE;
159 ctrl_outb(v8, SCPDR); 159 __raw_writeb(v8, SCPDR);
160 160
161 v = ctrl_inw(SCPCR); 161 v = __raw_readw(SCPCR);
162 v &= ~SCPCR_TS_MASK; 162 v &= ~SCPCR_TS_MASK;
163 v |= SCPCR_TS_ENABLE; 163 v |= SCPCR_TS_ENABLE;
164 ctrl_outw(v, SCPCR); 164 __raw_writew(v, SCPCR);
165} 165}
166device_initcall(hp6xx_devices_setup); 166device_initcall(hp6xx_devices_setup);
167 167
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index 5d7b5d92475e..b2cd0ed8664e 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -282,7 +282,7 @@ static int camera_power(struct device *dev, int mode)
282 * use 1.8 V for VccQ_VIO 282 * use 1.8 V for VccQ_VIO
283 * use 2.85V for VccQ_SR 283 * use 2.85V for VccQ_SR
284 */ 284 */
285 ctrl_outw((ctrl_inw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB); 285 __raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
286 286
287 /* reset clear */ 287 /* reset clear */
288 ret = gpio_request(GPIO_PTB4, NULL); 288 ret = gpio_request(GPIO_PTB4, NULL);
@@ -351,7 +351,7 @@ static struct resource kfr2r09_sh_sdhi0_resources[] = {
351 .flags = IORESOURCE_MEM, 351 .flags = IORESOURCE_MEM,
352 }, 352 },
353 [1] = { 353 [1] = {
354 .start = 101, 354 .start = 100,
355 .flags = IORESOURCE_IRQ, 355 .flags = IORESOURCE_IRQ,
356 }, 356 },
357}; 357};
@@ -492,13 +492,13 @@ static int kfr2r09_usb0_gadget_setup(void)
492 if (kfr2r09_usb0_gadget_i2c_setup() != 0) 492 if (kfr2r09_usb0_gadget_i2c_setup() != 0)
493 return -ENODEV; /* unable to configure using i2c */ 493 return -ENODEV; /* unable to configure using i2c */
494 494
495 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 495 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
496 gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */ 496 gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */
497 gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */ 497 gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */
498 gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */ 498 gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */
499 msleep(20); /* wait 20ms to let the clock settle */ 499 msleep(20); /* wait 20ms to let the clock settle */
500 clk_enable(clk_get(NULL, "usb0")); 500 clk_enable(clk_get(NULL, "usb0"));
501 ctrl_outw(0x0600, 0xa40501d4); 501 __raw_writew(0x0600, 0xa40501d4);
502 502
503 return 0; 503 return 0;
504} 504}
@@ -526,12 +526,12 @@ static int __init kfr2r09_devices_setup(void)
526 gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */ 526 gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */
527 527
528 /* setup NOR flash at CS0 */ 528 /* setup NOR flash at CS0 */
529 ctrl_outl(0x36db0400, BSC_CS0BCR); 529 __raw_writel(0x36db0400, BSC_CS0BCR);
530 ctrl_outl(0x00000500, BSC_CS0WCR); 530 __raw_writel(0x00000500, BSC_CS0WCR);
531 531
532 /* setup NAND flash at CS4 */ 532 /* setup NAND flash at CS4 */
533 ctrl_outl(0x36db0400, BSC_CS4BCR); 533 __raw_writel(0x36db0400, BSC_CS4BCR);
534 ctrl_outl(0x00000500, BSC_CS4WCR); 534 __raw_writel(0x00000500, BSC_CS4WCR);
535 535
536 /* setup KEYSC pins */ 536 /* setup KEYSC pins */
537 gpio_request(GPIO_FN_KEYOUT0, NULL); 537 gpio_request(GPIO_FN_KEYOUT0, NULL);
diff --git a/arch/sh/boards/mach-landisk/gio.c b/arch/sh/boards/mach-landisk/gio.c
index 528013188196..01e6abb769b9 100644
--- a/arch/sh/boards/mach-landisk/gio.c
+++ b/arch/sh/boards/mach-landisk/gio.c
@@ -76,39 +76,39 @@ static long gio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
76 break; 76 break;
77 77
78 case GIODRV_IOCSGIODATA1: /* write byte */ 78 case GIODRV_IOCSGIODATA1: /* write byte */
79 ctrl_outb((unsigned char)(0x0ff & data), addr); 79 __raw_writeb((unsigned char)(0x0ff & data), addr);
80 break; 80 break;
81 81
82 case GIODRV_IOCSGIODATA2: /* write word */ 82 case GIODRV_IOCSGIODATA2: /* write word */
83 if (addr & 0x01) { 83 if (addr & 0x01) {
84 return -EFAULT; 84 return -EFAULT;
85 } 85 }
86 ctrl_outw((unsigned short int)(0x0ffff & data), addr); 86 __raw_writew((unsigned short int)(0x0ffff & data), addr);
87 break; 87 break;
88 88
89 case GIODRV_IOCSGIODATA4: /* write long */ 89 case GIODRV_IOCSGIODATA4: /* write long */
90 if (addr & 0x03) { 90 if (addr & 0x03) {
91 return -EFAULT; 91 return -EFAULT;
92 } 92 }
93 ctrl_outl(data, addr); 93 __raw_writel(data, addr);
94 break; 94 break;
95 95
96 case GIODRV_IOCGGIODATA1: /* read byte */ 96 case GIODRV_IOCGGIODATA1: /* read byte */
97 data = ctrl_inb(addr); 97 data = __raw_readb(addr);
98 break; 98 break;
99 99
100 case GIODRV_IOCGGIODATA2: /* read word */ 100 case GIODRV_IOCGGIODATA2: /* read word */
101 if (addr & 0x01) { 101 if (addr & 0x01) {
102 return -EFAULT; 102 return -EFAULT;
103 } 103 }
104 data = ctrl_inw(addr); 104 data = __raw_readw(addr);
105 break; 105 break;
106 106
107 case GIODRV_IOCGGIODATA4: /* read long */ 107 case GIODRV_IOCGGIODATA4: /* read long */
108 if (addr & 0x03) { 108 if (addr & 0x03) {
109 return -EFAULT; 109 return -EFAULT;
110 } 110 }
111 data = ctrl_inl(addr); 111 data = __raw_readl(addr);
112 break; 112 break;
113 default: 113 default:
114 return -EFAULT; 114 return -EFAULT;
diff --git a/arch/sh/boards/mach-landisk/irq.c b/arch/sh/boards/mach-landisk/irq.c
index 7b284cde1f58..96f38a4187d0 100644
--- a/arch/sh/boards/mach-landisk/irq.c
+++ b/arch/sh/boards/mach-landisk/irq.c
@@ -22,14 +22,14 @@ static void disable_landisk_irq(unsigned int irq)
22{ 22{
23 unsigned char mask = 0xff ^ (0x01 << (irq - 5)); 23 unsigned char mask = 0xff ^ (0x01 << (irq - 5));
24 24
25 ctrl_outb(ctrl_inb(PA_IMASK) & mask, PA_IMASK); 25 __raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK);
26} 26}
27 27
28static void enable_landisk_irq(unsigned int irq) 28static void enable_landisk_irq(unsigned int irq)
29{ 29{
30 unsigned char value = (0x01 << (irq - 5)); 30 unsigned char value = (0x01 << (irq - 5));
31 31
32 ctrl_outb(ctrl_inb(PA_IMASK) | value, PA_IMASK); 32 __raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK);
33} 33}
34 34
35static struct irq_chip landisk_irq_chip __read_mostly = { 35static struct irq_chip landisk_irq_chip __read_mostly = {
@@ -52,5 +52,5 @@ void __init init_landisk_IRQ(void)
52 handle_level_irq, "level"); 52 handle_level_irq, "level");
53 enable_landisk_irq(i); 53 enable_landisk_irq(i);
54 } 54 }
55 ctrl_outb(0x00, PA_PWRINT_CLR); 55 __raw_writeb(0x00, PA_PWRINT_CLR);
56} 56}
diff --git a/arch/sh/boards/mach-landisk/psw.c b/arch/sh/boards/mach-landisk/psw.c
index e6b0efa098d1..bef83522f958 100644
--- a/arch/sh/boards/mach-landisk/psw.c
+++ b/arch/sh/boards/mach-landisk/psw.c
@@ -25,7 +25,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
25 unsigned int sw_value; 25 unsigned int sw_value;
26 int ret = 0; 26 int ret = 0;
27 27
28 sw_value = (0x0ff & (~ctrl_inb(PA_STATUS))); 28 sw_value = (0x0ff & (~__raw_readb(PA_STATUS)));
29 29
30 /* Nothing to do if there's no state change */ 30 /* Nothing to do if there's no state change */
31 if (psw->state) { 31 if (psw->state) {
@@ -42,7 +42,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
42 42
43out: 43out:
44 /* Clear the switch IRQs */ 44 /* Clear the switch IRQs */
45 ctrl_outb(0x00, PA_PWRINT_CLR); 45 __raw_writeb(0x00, PA_PWRINT_CLR);
46 46
47 return IRQ_RETVAL(ret); 47 return IRQ_RETVAL(ret);
48} 48}
diff --git a/arch/sh/boards/mach-landisk/setup.c b/arch/sh/boards/mach-landisk/setup.c
index db22ea2e6d49..50337acc18c5 100644
--- a/arch/sh/boards/mach-landisk/setup.c
+++ b/arch/sh/boards/mach-landisk/setup.c
@@ -25,7 +25,7 @@ void init_landisk_IRQ(void);
25 25
26static void landisk_power_off(void) 26static void landisk_power_off(void)
27{ 27{
28 ctrl_outb(0x01, PA_SHUTDOWN); 28 __raw_writeb(0x01, PA_SHUTDOWN);
29} 29}
30 30
31static struct resource cf_ide_resources[3]; 31static struct resource cf_ide_resources[3];
@@ -63,7 +63,7 @@ static int __init landisk_devices_setup(void)
63 /* open I/O area window */ 63 /* open I/O area window */
64 paddrbase = virt_to_phys((void *)PA_AREA5_IO); 64 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
65 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); 65 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
66 cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); 66 cf_ide_base = ioremap_prot(paddrbase, PAGE_SIZE, pgprot_val(prot));
67 if (!cf_ide_base) { 67 if (!cf_ide_base) {
68 printk("allocate_cf_area : can't open CF I/O window!\n"); 68 printk("allocate_cf_area : can't open CF I/O window!\n");
69 return -ENOMEM; 69 return -ENOMEM;
@@ -88,7 +88,7 @@ __initcall(landisk_devices_setup);
88static void __init landisk_setup(char **cmdline_p) 88static void __init landisk_setup(char **cmdline_p)
89{ 89{
90 /* LED ON */ 90 /* LED ON */
91 ctrl_outb(ctrl_inb(PA_LED) | 0x03, PA_LED); 91 __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
92 92
93 printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n"); 93 printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n");
94 pm_power_off = landisk_power_off; 94 pm_power_off = landisk_power_off;
diff --git a/arch/sh/boards/mach-lboxre2/setup.c b/arch/sh/boards/mach-lboxre2/setup.c
index 2b0b5818e1e4..79b4e0d77b71 100644
--- a/arch/sh/boards/mach-lboxre2/setup.c
+++ b/arch/sh/boards/mach-lboxre2/setup.c
@@ -56,8 +56,8 @@ static int __init lboxre2_devices_setup(void)
56 /* open I/O area window */ 56 /* open I/O area window */
57 paddrbase = virt_to_phys((void*)PA_AREA5_IO); 57 paddrbase = virt_to_phys((void*)PA_AREA5_IO);
58 psize = PAGE_SIZE; 58 psize = PAGE_SIZE;
59 prot = PAGE_KERNEL_PCC( 1 , _PAGE_PCC_IO16); 59 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
60 cf0_io_base = (u32)p3_ioremap(paddrbase, psize, prot.pgprot); 60 cf0_io_base = (u32)ioremap_prot(paddrbase, psize, pgprot_val(prot));
61 if (!cf0_io_base) { 61 if (!cf0_io_base) {
62 printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ ); 62 printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ );
63 return -ENOMEM; 63 return -ENOMEM;
diff --git a/arch/sh/boards/mach-microdev/io.c b/arch/sh/boards/mach-microdev/io.c
index 52dd748211c7..2960c659020e 100644
--- a/arch/sh/boards/mach-microdev/io.c
+++ b/arch/sh/boards/mach-microdev/io.c
@@ -141,10 +141,10 @@ static inline void delay(void)
141#if defined(CONFIG_PCI) 141#if defined(CONFIG_PCI)
142 /* System board present, just make a dummy SRAM access. (CS0 will be 142 /* System board present, just make a dummy SRAM access. (CS0 will be
143 mapped to PCI memory, probably good to avoid it.) */ 143 mapped to PCI memory, probably good to avoid it.) */
144 ctrl_inw(0xa6800000); 144 __raw_readw(0xa6800000);
145#else 145#else
146 /* CS0 will be mapped to flash, ROM etc so safe to access it. */ 146 /* CS0 will be mapped to flash, ROM etc so safe to access it. */
147 ctrl_inw(0xa0000000); 147 __raw_readw(0xa0000000);
148#endif 148#endif
149} 149}
150 150
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
index b551963579c1..a26d16669aa2 100644
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -88,7 +88,7 @@ static void disable_microdev_irq(unsigned int irq)
88 fpgaIrq = fpgaIrqTable[irq].fpgaIrq; 88 fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
89 89
90 /* disable interrupts on the FPGA INTC register */ 90 /* disable interrupts on the FPGA INTC register */
91 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); 91 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
92} 92}
93 93
94static void enable_microdev_irq(unsigned int irq) 94static void enable_microdev_irq(unsigned int irq)
@@ -107,13 +107,13 @@ static void enable_microdev_irq(unsigned int irq)
107 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq); 107 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
108 108
109 /* set priority for the interrupt */ 109 /* set priority for the interrupt */
110 priorities = ctrl_inl(priorityReg); 110 priorities = __raw_readl(priorityReg);
111 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq); 111 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
112 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri); 112 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
113 ctrl_outl(priorities, priorityReg); 113 __raw_writel(priorities, priorityReg);
114 114
115 /* enable interrupts on the FPGA INTC register */ 115 /* enable interrupts on the FPGA INTC register */
116 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); 116 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
117} 117}
118 118
119/* This function sets the desired irq handler to be a MicroDev type */ 119/* This function sets the desired irq handler to be a MicroDev type */
@@ -134,7 +134,7 @@ extern void __init init_microdev_irq(void)
134 int i; 134 int i;
135 135
136 /* disable interrupts on the FPGA INTC register */ 136 /* disable interrupts on the FPGA INTC register */
137 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); 137 __raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG);
138 138
139 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) 139 for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
140 make_microdev_irq(i); 140 make_microdev_irq(i);
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 507c77be476d..be300aaca6fe 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -397,7 +397,7 @@ static struct resource sdhi_cn9_resources[] = {
397 .flags = IORESOURCE_MEM, 397 .flags = IORESOURCE_MEM,
398 }, 398 },
399 [1] = { 399 [1] = {
400 .start = 101, 400 .start = 100,
401 .flags = IORESOURCE_IRQ, 401 .flags = IORESOURCE_IRQ,
402 }, 402 },
403}; 403};
@@ -431,7 +431,7 @@ static struct i2c_board_info migor_i2c_camera[] = {
431}; 431};
432 432
433static struct ov772x_camera_info ov7725_info = { 433static struct ov772x_camera_info ov7725_info = {
434 .buswidth = SOCAM_DATAWIDTH_8, 434 .flags = OV772X_FLAG_8BIT,
435}; 435};
436 436
437static struct soc_camera_link ov7725_link = { 437static struct soc_camera_link ov7725_link = {
@@ -496,28 +496,16 @@ static int __init migor_devices_setup(void)
496 &migor_sdram_enter_end, 496 &migor_sdram_enter_end,
497 &migor_sdram_leave_start, 497 &migor_sdram_leave_start,
498 &migor_sdram_leave_end); 498 &migor_sdram_leave_end);
499#ifdef CONFIG_PM
500 /* Let D11 LED show STATUS0 */ 499 /* Let D11 LED show STATUS0 */
501 gpio_request(GPIO_FN_STATUS0, NULL); 500 gpio_request(GPIO_FN_STATUS0, NULL);
502 501
503 /* Lit D12 LED show PDSTATUS */ 502 /* Lit D12 LED show PDSTATUS */
504 gpio_request(GPIO_FN_PDSTATUS, NULL); 503 gpio_request(GPIO_FN_PDSTATUS, NULL);
505#else
506 /* Lit D11 LED */
507 gpio_request(GPIO_PTJ7, NULL);
508 gpio_direction_output(GPIO_PTJ7, 1);
509 gpio_export(GPIO_PTJ7, 0);
510
511 /* Lit D12 LED */
512 gpio_request(GPIO_PTJ5, NULL);
513 gpio_direction_output(GPIO_PTJ5, 1);
514 gpio_export(GPIO_PTJ5, 0);
515#endif
516 504
517 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */ 505 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
518 gpio_request(GPIO_FN_IRQ0, NULL); 506 gpio_request(GPIO_FN_IRQ0, NULL);
519 ctrl_outl(0x00003400, BSC_CS4BCR); 507 __raw_writel(0x00003400, BSC_CS4BCR);
520 ctrl_outl(0x00110080, BSC_CS4WCR); 508 __raw_writel(0x00110080, BSC_CS4WCR);
521 509
522 /* KEYSC */ 510 /* KEYSC */
523 gpio_request(GPIO_FN_KEYOUT0, NULL); 511 gpio_request(GPIO_FN_KEYOUT0, NULL);
@@ -533,7 +521,7 @@ static int __init migor_devices_setup(void)
533 521
534 /* NAND Flash */ 522 /* NAND Flash */
535 gpio_request(GPIO_FN_CS6A_CE2B, NULL); 523 gpio_request(GPIO_FN_CS6A_CE2B, NULL);
536 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR); 524 __raw_writel((__raw_readl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
537 gpio_request(GPIO_PTA1, NULL); 525 gpio_request(GPIO_PTA1, NULL);
538 gpio_direction_input(GPIO_PTA1); 526 gpio_direction_input(GPIO_PTA1);
539 527
@@ -627,7 +615,7 @@ static int __init migor_devices_setup(void)
627#else 615#else
628 gpio_direction_output(GPIO_PTT0, 1); 616 gpio_direction_output(GPIO_PTT0, 1);
629#endif 617#endif
630 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */ 618 __raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
631 619
632 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20); 620 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
633 621
diff --git a/arch/sh/boards/mach-r2d/irq.c b/arch/sh/boards/mach-r2d/irq.c
index 78d7b27c80da..574f009c3c31 100644
--- a/arch/sh/boards/mach-r2d/irq.c
+++ b/arch/sh/boards/mach-r2d/irq.c
@@ -129,7 +129,7 @@ void __init init_rts7751r2d_IRQ(void)
129{ 129{
130 struct intc_desc *d; 130 struct intc_desc *d;
131 131
132 switch (ctrl_inw(PA_VERREG) & 0xf0) { 132 switch (__raw_readw(PA_VERREG) & 0xf0) {
133#ifdef CONFIG_RTS7751R2D_PLUS 133#ifdef CONFIG_RTS7751R2D_PLUS
134 case 0x10: 134 case 0x10:
135 printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n"); 135 printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n");
@@ -147,7 +147,7 @@ void __init init_rts7751r2d_IRQ(void)
147#endif 147#endif
148 default: 148 default:
149 printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n", 149 printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n",
150 ctrl_inw(PA_VERREG)); 150 __raw_readw(PA_VERREG));
151 return; 151 return;
152 } 152 }
153 153
diff --git a/arch/sh/boards/mach-r2d/setup.c b/arch/sh/boards/mach-r2d/setup.c
index a625ecb93e47..b84df6a3a93c 100644
--- a/arch/sh/boards/mach-r2d/setup.c
+++ b/arch/sh/boards/mach-r2d/setup.c
@@ -70,7 +70,7 @@ static struct spi_board_info spi_bus[] = {
70static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state) 70static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state)
71{ 71{
72 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */ 72 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */
73 ctrl_outw(state == BITBANG_CS_ACTIVE, PA_RTCCE); 73 __raw_writew(state == BITBANG_CS_ACTIVE, PA_RTCCE);
74} 74}
75 75
76static struct sh_spi_info spi_info = { 76static struct sh_spi_info spi_info = {
@@ -262,7 +262,7 @@ __initcall(rts7751r2d_devices_setup);
262 262
263static void rts7751r2d_power_off(void) 263static void rts7751r2d_power_off(void)
264{ 264{
265 ctrl_outw(0x0001, PA_POWOFF); 265 __raw_writew(0x0001, PA_POWOFF);
266} 266}
267 267
268/* 268/*
@@ -271,14 +271,14 @@ static void rts7751r2d_power_off(void)
271static void __init rts7751r2d_setup(char **cmdline_p) 271static void __init rts7751r2d_setup(char **cmdline_p)
272{ 272{
273 void __iomem *sm501_reg; 273 void __iomem *sm501_reg;
274 u16 ver = ctrl_inw(PA_VERREG); 274 u16 ver = __raw_readw(PA_VERREG);
275 275
276 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); 276 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
277 277
278 printk(KERN_INFO "FPGA version:%d (revision:%d)\n", 278 printk(KERN_INFO "FPGA version:%d (revision:%d)\n",
279 (ver >> 4) & 0xf, ver & 0xf); 279 (ver >> 4) & 0xf, ver & 0xf);
280 280
281 ctrl_outw(0x0000, PA_OUTPORT); 281 __raw_writew(0x0000, PA_OUTPORT);
282 pm_power_off = rts7751r2d_power_off; 282 pm_power_off = rts7751r2d_power_off;
283 283
284 /* sm501 dram configuration: 284 /* sm501 dram configuration:
diff --git a/arch/sh/boards/mach-rsk/devices-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c
index c37617e63220..4fa08ba10253 100644
--- a/arch/sh/boards/mach-rsk/devices-rsk7203.c
+++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c
@@ -96,7 +96,7 @@ static int __init rsk7203_devices_setup(void)
96 gpio_request(GPIO_FN_RXD0, NULL); 96 gpio_request(GPIO_FN_RXD0, NULL);
97 97
98 /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */ 98 /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */
99 ctrl_outl(0x36db0400, 0xfffc0008); /* CS1BCR */ 99 __raw_writel(0x36db0400, 0xfffc0008); /* CS1BCR */
100 gpio_request(GPIO_FN_IRQ0_PB, NULL); 100 gpio_request(GPIO_FN_IRQ0_PB, NULL);
101 101
102 return platform_add_devices(rsk7203_devices, 102 return platform_add_devices(rsk7203_devices,
diff --git a/arch/sh/boards/mach-sdk7780/irq.c b/arch/sh/boards/mach-sdk7780/irq.c
index 855558163c58..e5f7564f2511 100644
--- a/arch/sh/boards/mach-sdk7780/irq.c
+++ b/arch/sh/boards/mach-sdk7780/irq.c
@@ -37,9 +37,9 @@ void __init init_sdk7780_IRQ(void)
37{ 37{
38 printk(KERN_INFO "Using SDK7780 interrupt controller.\n"); 38 printk(KERN_INFO "Using SDK7780 interrupt controller.\n");
39 39
40 ctrl_outw(0xFFFF, FPGA_IRQ0MR); 40 __raw_writew(0xFFFF, FPGA_IRQ0MR);
41 /* Setup IRL 0-3 */ 41 /* Setup IRL 0-3 */
42 ctrl_outw(0x0003, FPGA_IMSR); 42 __raw_writew(0x0003, FPGA_IMSR);
43 plat_irq_setup_pins(IRQ_MODE_IRL3210); 43 plat_irq_setup_pins(IRQ_MODE_IRL3210);
44 44
45 register_intc_controller(&fpga_intc_desc); 45 register_intc_controller(&fpga_intc_desc);
diff --git a/arch/sh/boards/mach-sdk7780/setup.c b/arch/sh/boards/mach-sdk7780/setup.c
index aad94a78dc70..4da38db4b5fe 100644
--- a/arch/sh/boards/mach-sdk7780/setup.c
+++ b/arch/sh/boards/mach-sdk7780/setup.c
@@ -20,27 +20,18 @@
20 20
21#define GPIO_PECR 0xFFEA0008 21#define GPIO_PECR 0xFFEA0008
22 22
23//* Heartbeat */ 23/* Heartbeat */
24static struct heartbeat_data heartbeat_data = { 24static struct resource heartbeat_resource = {
25 .regsize = 16, 25 .start = PA_LED,
26}; 26 .end = PA_LED,
27 27 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
28static struct resource heartbeat_resources[] = {
29 [0] = {
30 .start = PA_LED,
31 .end = PA_LED,
32 .flags = IORESOURCE_MEM,
33 },
34}; 28};
35 29
36static struct platform_device heartbeat_device = { 30static struct platform_device heartbeat_device = {
37 .name = "heartbeat", 31 .name = "heartbeat",
38 .id = -1, 32 .id = -1,
39 .dev = { 33 .num_resources = 1,
40 .platform_data = &heartbeat_data, 34 .resource = &heartbeat_resource,
41 },
42 .num_resources = ARRAY_SIZE(heartbeat_resources),
43 .resource = heartbeat_resources,
44}; 35};
45 36
46/* SMC91x */ 37/* SMC91x */
@@ -83,8 +74,8 @@ device_initcall(sdk7780_devices_setup);
83 74
84static void __init sdk7780_setup(char **cmdline_p) 75static void __init sdk7780_setup(char **cmdline_p)
85{ 76{
86 u16 ver = ctrl_inw(FPGA_FPVERR); 77 u16 ver = __raw_readw(FPGA_FPVERR);
87 u16 dateStamp = ctrl_inw(FPGA_FPDATER); 78 u16 dateStamp = __raw_readw(FPGA_FPDATER);
88 79
89 printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n"); 80 printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n");
90 printk(KERN_INFO "Board version: %d (revision %d), " 81 printk(KERN_INFO "Board version: %d (revision %d), "
@@ -94,7 +85,7 @@ static void __init sdk7780_setup(char **cmdline_p)
94 dateStamp); 85 dateStamp);
95 86
96 /* Setup pin mux'ing for PCIC */ 87 /* Setup pin mux'ing for PCIC */
97 ctrl_outw(0x0000, GPIO_PECR); 88 __raw_writew(0x0000, GPIO_PECR);
98} 89}
99 90
100/* 91/*
diff --git a/arch/sh/boards/mach-sdk7786/Makefile b/arch/sh/boards/mach-sdk7786/Makefile
new file mode 100644
index 000000000000..a29f19e85b63
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/Makefile
@@ -0,0 +1 @@
obj-y := setup.o fpga.o irq.o
diff --git a/arch/sh/boards/mach-sdk7786/fpga.c b/arch/sh/boards/mach-sdk7786/fpga.c
new file mode 100644
index 000000000000..3e4ec66a0417
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/fpga.c
@@ -0,0 +1,72 @@
1/*
2 * SDK7786 FPGA Support.
3 *
4 * Copyright (C) 2010 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/bcd.h>
13#include <mach/fpga.h>
14#include <asm/sizes.h>
15
16#define FPGA_REGS_OFFSET 0x03fff800
17#define FPGA_REGS_SIZE 0x490
18
19/*
20 * The FPGA can be mapped in any of the generally available areas,
21 * so we attempt to scan for it using the fixed SRSTR read magic.
22 *
23 * Once the FPGA is located, the rest of the mapping data for the other
24 * components can be determined dynamically from its section mapping
25 * registers.
26 */
27static void __iomem *sdk7786_fpga_probe(void)
28{
29 unsigned long area;
30 void __iomem *base;
31
32 /*
33 * Iterate over all of the areas where the FPGA could be mapped.
34 * The possible range is anywhere from area 0 through 6, area 7
35 * is reserved.
36 */
37 for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) {
38 base = ioremap_nocache(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE);
39 if (!base) {
40 /* Failed to remap this area, move along. */
41 continue;
42 }
43
44 if (ioread16(base + SRSTR) == SRSTR_MAGIC)
45 return base; /* Found it! */
46
47 iounmap(base);
48 }
49
50 return NULL;
51}
52
53void __iomem *sdk7786_fpga_base;
54
55void __init sdk7786_fpga_init(void)
56{
57 u16 version, date;
58
59 sdk7786_fpga_base = sdk7786_fpga_probe();
60 if (unlikely(!sdk7786_fpga_base)) {
61 panic("FPGA detection failed.\n");
62 return;
63 }
64
65 version = fpga_read_reg(FPGAVR);
66 date = fpga_read_reg(FPGADR);
67
68 pr_info("\tFPGA version:\t%d.%d (built on %d/%d/%d)\n",
69 bcd2bin(version >> 8) & 0xf, bcd2bin(version & 0xf),
70 ((date >> 12) & 0xf) + 2000,
71 (date >> 8) & 0xf, bcd2bin(date & 0xff));
72}
diff --git a/arch/sh/boards/mach-sdk7786/irq.c b/arch/sh/boards/mach-sdk7786/irq.c
new file mode 100644
index 000000000000..46943a0da5b7
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/irq.c
@@ -0,0 +1,48 @@
1/*
2 * SDK7786 FPGA IRQ Controller Support.
3 *
4 * Copyright (C) 2010 Matt Fleming
5 * Copyright (C) 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/irq.h>
12#include <mach/fpga.h>
13#include <mach/irq.h>
14
15enum {
16 ATA_IRQ_BIT = 1,
17 SPI_BUSY_BIT = 2,
18 LIRQ5_BIT = 3,
19 LIRQ6_BIT = 4,
20 LIRQ7_BIT = 5,
21 LIRQ8_BIT = 6,
22 KEY_IRQ_BIT = 7,
23 PEN_IRQ_BIT = 8,
24 ETH_IRQ_BIT = 9,
25 RTC_ALARM_BIT = 10,
26 CRYSTAL_FAIL_BIT = 12,
27 ETH_PME_BIT = 14,
28};
29
30void __init sdk7786_init_irq(void)
31{
32 unsigned int tmp;
33
34 /* Enable priority encoding for all IRLs */
35 fpga_write_reg(fpga_read_reg(INTMSR) | 0x0303, INTMSR);
36
37 /* Clear FPGA interrupt status registers */
38 fpga_write_reg(0x0000, INTASR);
39 fpga_write_reg(0x0000, INTBSR);
40
41 /* Unmask FPGA interrupts */
42 tmp = fpga_read_reg(INTAMR);
43 tmp &= ~(1 << ETH_IRQ_BIT);
44 fpga_write_reg(tmp, INTAMR);
45
46 plat_irq_setup_pins(IRQ_MODE_IRL7654_MASK);
47 plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
48}
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
new file mode 100644
index 000000000000..f094ea2ee783
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -0,0 +1,189 @@
1/*
2 * Renesas Technology Europe SDK7786 Support.
3 *
4 * Copyright (C) 2010 Matt Fleming
5 * Copyright (C) 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/io.h>
14#include <linux/smsc911x.h>
15#include <linux/i2c.h>
16#include <linux/irq.h>
17#include <linux/clk.h>
18#include <mach/fpga.h>
19#include <mach/irq.h>
20#include <asm/machvec.h>
21#include <asm/heartbeat.h>
22#include <asm/sizes.h>
23#include <asm/reboot.h>
24
25static struct resource heartbeat_resource = {
26 .start = 0x07fff8b0,
27 .end = 0x07fff8b0 + sizeof(u16) - 1,
28 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
29};
30
31static struct platform_device heartbeat_device = {
32 .name = "heartbeat",
33 .id = -1,
34 .num_resources = 1,
35 .resource = &heartbeat_resource,
36};
37
38static struct resource smsc911x_resources[] = {
39 [0] = {
40 .name = "smsc911x-memory",
41 .start = 0x07ffff00,
42 .end = 0x07ffff00 + SZ_256 - 1,
43 .flags = IORESOURCE_MEM,
44 },
45 [1] = {
46 .name = "smsc911x-irq",
47 .start = evt2irq(0x2c0),
48 .end = evt2irq(0x2c0),
49 .flags = IORESOURCE_IRQ,
50 },
51};
52
53static struct smsc911x_platform_config smsc911x_config = {
54 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
55 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
56 .flags = SMSC911X_USE_32BIT,
57 .phy_interface = PHY_INTERFACE_MODE_MII,
58};
59
60static struct platform_device smsc911x_device = {
61 .name = "smsc911x",
62 .id = -1,
63 .num_resources = ARRAY_SIZE(smsc911x_resources),
64 .resource = smsc911x_resources,
65 .dev = {
66 .platform_data = &smsc911x_config,
67 },
68};
69
70static struct resource smbus_fpga_resource = {
71 .start = 0x07fff9e0,
72 .end = 0x07fff9e0 + SZ_32 - 1,
73 .flags = IORESOURCE_MEM,
74};
75
76static struct platform_device smbus_fpga_device = {
77 .name = "i2c-sdk7786",
78 .id = 0,
79 .num_resources = 1,
80 .resource = &smbus_fpga_resource,
81};
82
83static struct resource smbus_pcie_resource = {
84 .start = 0x07fffc30,
85 .end = 0x07fffc30 + SZ_32 - 1,
86 .flags = IORESOURCE_MEM,
87};
88
89static struct platform_device smbus_pcie_device = {
90 .name = "i2c-sdk7786",
91 .id = 1,
92 .num_resources = 1,
93 .resource = &smbus_pcie_resource,
94};
95
96static struct i2c_board_info __initdata sdk7786_i2c_devices[] = {
97 {
98 I2C_BOARD_INFO("max6900", 0x68),
99 },
100};
101
102static struct platform_device *sh7786_devices[] __initdata = {
103 &heartbeat_device,
104 &smsc911x_device,
105 &smbus_fpga_device,
106 &smbus_pcie_device,
107};
108
109static int sdk7786_i2c_setup(void)
110{
111 unsigned int tmp;
112
113 /*
114 * Hand over I2C control to the FPGA.
115 */
116 tmp = fpga_read_reg(SBCR);
117 tmp &= ~SCBR_I2CCEN;
118 tmp |= SCBR_I2CMEN;
119 fpga_write_reg(tmp, SBCR);
120
121 return i2c_register_board_info(0, sdk7786_i2c_devices,
122 ARRAY_SIZE(sdk7786_i2c_devices));
123}
124
125static int __init sdk7786_devices_setup(void)
126{
127 int ret;
128
129 ret = platform_add_devices(sh7786_devices, ARRAY_SIZE(sh7786_devices));
130 if (unlikely(ret != 0))
131 return ret;
132
133 return sdk7786_i2c_setup();
134}
135__initcall(sdk7786_devices_setup);
136
137static int sdk7786_mode_pins(void)
138{
139 return fpga_read_reg(MODSWR);
140}
141
142static int sdk7786_clk_init(void)
143{
144 struct clk *clk;
145 int ret;
146
147 /*
148 * Only handle the EXTAL case, anyone interfacing a crystal
149 * resonator will need to provide their own input clock.
150 */
151 if (test_mode_pin(MODE_PIN9))
152 return -EINVAL;
153
154 clk = clk_get(NULL, "extal");
155 if (!clk || IS_ERR(clk))
156 return PTR_ERR(clk);
157 ret = clk_set_rate(clk, 33333333);
158 clk_put(clk);
159
160 return ret;
161}
162
163static void sdk7786_restart(char *cmd)
164{
165 fpga_write_reg(0xa5a5, SRSTR);
166}
167
168/* Initialize the board */
169static void __init sdk7786_setup(char **cmdline_p)
170{
171 pr_info("Renesas Technology Europe SDK7786 support:\n");
172
173 sdk7786_fpga_init();
174
175 pr_info("\tPCB revision:\t%d\n", fpga_read_reg(PCBRR) & 0xf);
176
177 machine_ops.restart = sdk7786_restart;
178}
179
180/*
181 * The Machine Vector
182 */
183static struct sh_machine_vector mv_sdk7786 __initmv = {
184 .mv_name = "SDK7786",
185 .mv_setup = sdk7786_setup,
186 .mv_mode_pins = sdk7786_mode_pins,
187 .mv_clk_init = sdk7786_clk_init,
188 .mv_init_irq = sdk7786_init_irq,
189};
diff --git a/arch/sh/boards/mach-se/7206/io.c b/arch/sh/boards/mach-se/7206/io.c
index 180455642a43..adadc77532ee 100644
--- a/arch/sh/boards/mach-se/7206/io.c
+++ b/arch/sh/boards/mach-se/7206/io.c
@@ -16,7 +16,7 @@
16 16
17static inline void delay(void) 17static inline void delay(void)
18{ 18{
19 ctrl_inw(0x20000000); /* P2 ROM Area */ 19 __raw_readw(0x20000000); /* P2 ROM Area */
20} 20}
21 21
22/* MS7750 requires special versions of in*, out* routines, since 22/* MS7750 requires special versions of in*, out* routines, since
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
index aef7f052851a..8d82175d83ab 100644
--- a/arch/sh/boards/mach-se/7206/irq.c
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -32,12 +32,12 @@ static void disable_se7206_irq(unsigned int irq)
32 unsigned short msk0,msk1; 32 unsigned short msk0,msk1;
33 33
34 /* Set the priority in IPR to 0 */ 34 /* Set the priority in IPR to 0 */
35 val = ctrl_inw(INTC_IPR01); 35 val = __raw_readw(INTC_IPR01);
36 val &= mask; 36 val &= mask;
37 ctrl_outw(val, INTC_IPR01); 37 __raw_writew(val, INTC_IPR01);
38 /* FPGA mask set */ 38 /* FPGA mask set */
39 msk0 = ctrl_inw(INTMSK0); 39 msk0 = __raw_readw(INTMSK0);
40 msk1 = ctrl_inw(INTMSK1); 40 msk1 = __raw_readw(INTMSK1);
41 41
42 switch (irq) { 42 switch (irq) {
43 case IRQ0_IRQ: 43 case IRQ0_IRQ:
@@ -51,8 +51,8 @@ static void disable_se7206_irq(unsigned int irq)
51 msk1 |= 0x00ff; 51 msk1 |= 0x00ff;
52 break; 52 break;
53 } 53 }
54 ctrl_outw(msk0, INTMSK0); 54 __raw_writew(msk0, INTMSK0);
55 ctrl_outw(msk1, INTMSK1); 55 __raw_writew(msk1, INTMSK1);
56} 56}
57 57
58static void enable_se7206_irq(unsigned int irq) 58static void enable_se7206_irq(unsigned int irq)
@@ -62,13 +62,13 @@ static void enable_se7206_irq(unsigned int irq)
62 unsigned short msk0,msk1; 62 unsigned short msk0,msk1;
63 63
64 /* Set priority in IPR back to original value */ 64 /* Set priority in IPR back to original value */
65 val = ctrl_inw(INTC_IPR01); 65 val = __raw_readw(INTC_IPR01);
66 val |= value; 66 val |= value;
67 ctrl_outw(val, INTC_IPR01); 67 __raw_writew(val, INTC_IPR01);
68 68
69 /* FPGA mask reset */ 69 /* FPGA mask reset */
70 msk0 = ctrl_inw(INTMSK0); 70 msk0 = __raw_readw(INTMSK0);
71 msk1 = ctrl_inw(INTMSK1); 71 msk1 = __raw_readw(INTMSK1);
72 72
73 switch (irq) { 73 switch (irq) {
74 case IRQ0_IRQ: 74 case IRQ0_IRQ:
@@ -82,19 +82,20 @@ static void enable_se7206_irq(unsigned int irq)
82 msk1 &= ~0x00ff; 82 msk1 &= ~0x00ff;
83 break; 83 break;
84 } 84 }
85 ctrl_outw(msk0, INTMSK0); 85 __raw_writew(msk0, INTMSK0);
86 ctrl_outw(msk1, INTMSK1); 86 __raw_writew(msk1, INTMSK1);
87} 87}
88 88
89static void eoi_se7206_irq(unsigned int irq) 89static void eoi_se7206_irq(unsigned int irq)
90{ 90{
91 unsigned short sts0,sts1; 91 unsigned short sts0,sts1;
92 struct irq_desc *desc = irq_to_desc(irq);
92 93
93 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 94 if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
94 enable_se7206_irq(irq); 95 enable_se7206_irq(irq);
95 /* FPGA isr clear */ 96 /* FPGA isr clear */
96 sts0 = ctrl_inw(INTSTS0); 97 sts0 = __raw_readw(INTSTS0);
97 sts1 = ctrl_inw(INTSTS1); 98 sts1 = __raw_readw(INTSTS1);
98 99
99 switch (irq) { 100 switch (irq) {
100 case IRQ0_IRQ: 101 case IRQ0_IRQ:
@@ -108,8 +109,8 @@ static void eoi_se7206_irq(unsigned int irq)
108 sts1 &= ~0x00ff; 109 sts1 &= ~0x00ff;
109 break; 110 break;
110 } 111 }
111 ctrl_outw(sts0, INTSTS0); 112 __raw_writew(sts0, INTSTS0);
112 ctrl_outw(sts1, INTSTS1); 113 __raw_writew(sts1, INTSTS1);
113} 114}
114 115
115static struct irq_chip se7206_irq_chip __read_mostly = { 116static struct irq_chip se7206_irq_chip __read_mostly = {
@@ -136,11 +137,11 @@ void __init init_se7206_IRQ(void)
136 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ 137 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
137 make_se7206_irq(IRQ1_IRQ); /* ATA */ 138 make_se7206_irq(IRQ1_IRQ); /* ATA */
138 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ 139 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
139 ctrl_outw(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ 140 __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
140 141
141 /* FPGA System register setup*/ 142 /* FPGA System register setup*/
142 ctrl_outw(0x0000,INTSTS0); /* Clear INTSTS0 */ 143 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
143 ctrl_outw(0x0000,INTSTS1); /* Clear INTSTS1 */ 144 __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
144 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ 145 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
145 ctrl_outw(0x0001,INTSEL); 146 __raw_writew(0x0001,INTSEL);
146} 147}
diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c
index f5466384972e..8f5c65d43d1d 100644
--- a/arch/sh/boards/mach-se/7206/setup.c
+++ b/arch/sh/boards/mach-se/7206/setup.c
@@ -50,15 +50,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
50static struct heartbeat_data heartbeat_data = { 50static struct heartbeat_data heartbeat_data = {
51 .bit_pos = heartbeat_bit_pos, 51 .bit_pos = heartbeat_bit_pos,
52 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 52 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
53 .regsize = 32,
54}; 53};
55 54
56static struct resource heartbeat_resources[] = { 55static struct resource heartbeat_resource = {
57 [0] = { 56 .start = PA_LED,
58 .start = PA_LED, 57 .end = PA_LED,
59 .end = PA_LED, 58 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
60 .flags = IORESOURCE_MEM,
61 },
62}; 59};
63 60
64static struct platform_device heartbeat_device = { 61static struct platform_device heartbeat_device = {
@@ -67,8 +64,8 @@ static struct platform_device heartbeat_device = {
67 .dev = { 64 .dev = {
68 .platform_data = &heartbeat_data, 65 .platform_data = &heartbeat_data,
69 }, 66 },
70 .num_resources = ARRAY_SIZE(heartbeat_resources), 67 .num_resources = 1,
71 .resource = heartbeat_resources, 68 .resource = &heartbeat_resource,
72}; 69};
73 70
74static struct platform_device *se7206_devices[] __initdata = { 71static struct platform_device *se7206_devices[] __initdata = {
diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
index 051c29d4eae0..d4305c26e9f7 100644
--- a/arch/sh/boards/mach-se/7343/irq.c
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -16,16 +16,18 @@
16#include <linux/io.h> 16#include <linux/io.h>
17#include <mach-se/mach/se7343.h> 17#include <mach-se/mach/se7343.h>
18 18
19unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, };
20
19static void disable_se7343_irq(unsigned int irq) 21static void disable_se7343_irq(unsigned int irq)
20{ 22{
21 unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; 23 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
22 ctrl_outw(ctrl_inw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK); 24 __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
23} 25}
24 26
25static void enable_se7343_irq(unsigned int irq) 27static void enable_se7343_irq(unsigned int irq)
26{ 28{
27 unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; 29 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
28 ctrl_outw(ctrl_inw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); 30 __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
29} 31}
30 32
31static struct irq_chip se7343_irq_chip __read_mostly = { 33static struct irq_chip se7343_irq_chip __read_mostly = {
@@ -37,19 +39,16 @@ static struct irq_chip se7343_irq_chip __read_mostly = {
37 39
38static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) 40static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
39{ 41{
40 unsigned short intv = ctrl_inw(PA_CPLD_ST); 42 unsigned short intv = __raw_readw(PA_CPLD_ST);
41 struct irq_desc *ext_desc; 43 unsigned int ext_irq = 0;
42 unsigned int ext_irq = SE7343_FPGA_IRQ_BASE;
43 44
44 intv &= (1 << SE7343_FPGA_IRQ_NR) - 1; 45 intv &= (1 << SE7343_FPGA_IRQ_NR) - 1;
45 46
46 while (intv) { 47 for (; intv; intv >>= 1, ext_irq++) {
47 if (intv & 1) { 48 if (!(intv & 1))
48 ext_desc = irq_desc + ext_irq; 49 continue;
49 handle_level_irq(ext_irq, ext_desc); 50
50 } 51 generic_handle_irq(se7343_fpga_irq[ext_irq]);
51 intv >>= 1;
52 ext_irq++;
53 } 52 }
54} 53}
55 54
@@ -58,16 +57,24 @@ static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
58 */ 57 */
59void __init init_7343se_IRQ(void) 58void __init init_7343se_IRQ(void)
60{ 59{
61 int i; 60 int i, irq;
61
62 __raw_writew(0, PA_CPLD_IMSK); /* disable all irqs */
63 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
62 64
63 ctrl_outw(0, PA_CPLD_IMSK); /* disable all irqs */ 65 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
64 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 66 irq = create_irq();
67 if (irq < 0)
68 return;
69 se7343_fpga_irq[i] = irq;
65 70
66 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) 71 set_irq_chip_and_handler_name(se7343_fpga_irq[i],
67 set_irq_chip_and_handler_name(SE7343_FPGA_IRQ_BASE + i,
68 &se7343_irq_chip, 72 &se7343_irq_chip,
69 handle_level_irq, "level"); 73 handle_level_irq, "level");
70 74
75 set_irq_chip_data(se7343_fpga_irq[i], (void *)i);
76 }
77
71 set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux); 78 set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux);
72 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 79 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
73 set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux); 80 set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux);
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
index 4de56f35f419..d2370af56d77 100644
--- a/arch/sh/boards/mach-se/7343/setup.c
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -11,26 +11,17 @@
11#include <asm/irq.h> 11#include <asm/irq.h>
12#include <asm/io.h> 12#include <asm/io.h>
13 13
14static struct resource heartbeat_resources[] = { 14static struct resource heartbeat_resource = {
15 [0] = { 15 .start = PA_LED,
16 .start = PA_LED, 16 .end = PA_LED,
17 .end = PA_LED, 17 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
18 .flags = IORESOURCE_MEM,
19 },
20};
21
22static struct heartbeat_data heartbeat_data = {
23 .regsize = 16,
24}; 18};
25 19
26static struct platform_device heartbeat_device = { 20static struct platform_device heartbeat_device = {
27 .name = "heartbeat", 21 .name = "heartbeat",
28 .id = -1, 22 .id = -1,
29 .dev = { 23 .num_resources = 1,
30 .platform_data = &heartbeat_data, 24 .resource = &heartbeat_resource,
31 },
32 .num_resources = ARRAY_SIZE(heartbeat_resources),
33 .resource = heartbeat_resources,
34}; 25};
35 26
36static struct mtd_partition nor_flash_partitions[] = { 27static struct mtd_partition nor_flash_partitions[] = {
@@ -82,7 +73,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
82 .mapbase = 0x16000000, 73 .mapbase = 0x16000000,
83 .regshift = 1, 74 .regshift = 1,
84 .flags = ST16C2550C_FLAGS, 75 .flags = ST16C2550C_FLAGS,
85 .irq = UARTA_IRQ,
86 .uartclk = 7372800, 76 .uartclk = 7372800,
87 }, 77 },
88 [1] = { 78 [1] = {
@@ -90,7 +80,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
90 .mapbase = 0x17000000, 80 .mapbase = 0x17000000,
91 .regshift = 1, 81 .regshift = 1,
92 .flags = ST16C2550C_FLAGS, 82 .flags = ST16C2550C_FLAGS,
93 .irq = UARTB_IRQ,
94 .uartclk = 7372800, 83 .uartclk = 7372800,
95 }, 84 },
96 { }, 85 { },
@@ -121,7 +110,7 @@ static struct resource usb_resources[] = {
121 .flags = IORESOURCE_MEM, 110 .flags = IORESOURCE_MEM,
122 }, 111 },
123 [2] = { 112 [2] = {
124 .start = USB_IRQ, 113 /* Filled in later */
125 .flags = IORESOURCE_IRQ, 114 .flags = IORESOURCE_IRQ,
126 }, 115 },
127}; 116};
@@ -138,8 +127,8 @@ static struct isp116x_platform_data usb_platform_data = {
138static struct platform_device usb_device = { 127static struct platform_device usb_device = {
139 .name = "isp116x-hcd", 128 .name = "isp116x-hcd",
140 .id = -1, 129 .id = -1,
141 .num_resources = ARRAY_SIZE(usb_resources), 130 .num_resources = ARRAY_SIZE(usb_resources),
142 .resource = usb_resources, 131 .resource = usb_resources,
143 .dev = { 132 .dev = {
144 .platform_data = &usb_platform_data, 133 .platform_data = &usb_platform_data,
145 }, 134 },
@@ -155,6 +144,13 @@ static struct platform_device *sh7343se_platform_devices[] __initdata = {
155 144
156static int __init sh7343se_devices_setup(void) 145static int __init sh7343se_devices_setup(void)
157{ 146{
147 /* Wire-up dynamic vectors */
148 serial_platform_data[0].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTA];
149 serial_platform_data[1].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTB];
150
151 usb_resources[2].start = usb_resources[2].end =
152 se7343_fpga_irq[SE7343_FPGA_IRQ_USB];
153
158 return platform_add_devices(sh7343se_platform_devices, 154 return platform_add_devices(sh7343se_platform_devices,
159 ARRAY_SIZE(sh7343se_platform_devices)); 155 ARRAY_SIZE(sh7343se_platform_devices));
160} 156}
@@ -165,10 +161,10 @@ device_initcall(sh7343se_devices_setup);
165 */ 161 */
166static void __init sh7343se_setup(char **cmdline_p) 162static void __init sh7343se_setup(char **cmdline_p)
167{ 163{
168 ctrl_outw(0xf900, FPGA_OUT); /* FPGA */ 164 __raw_writew(0xf900, FPGA_OUT); /* FPGA */
169 165
170 ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ 166 __raw_writew(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */
171 ctrl_outw(0x0020, PORT_PSELD); 167 __raw_writew(0x0020, PORT_PSELD);
172 168
173 printk(KERN_INFO "MS7343CP01 Setup...done\n"); 169 printk(KERN_INFO "MS7343CP01 Setup...done\n");
174} 170}
@@ -179,6 +175,5 @@ static void __init sh7343se_setup(char **cmdline_p)
179static struct sh_machine_vector mv_7343se __initmv = { 175static struct sh_machine_vector mv_7343se __initmv = {
180 .mv_name = "SolutionEngine 7343", 176 .mv_name = "SolutionEngine 7343",
181 .mv_setup = sh7343se_setup, 177 .mv_setup = sh7343se_setup,
182 .mv_nr_irqs = SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_NR,
183 .mv_init_irq = init_7343se_IRQ, 178 .mv_init_irq = init_7343se_IRQ,
184}; 179};
diff --git a/arch/sh/boards/mach-se/770x/irq.c b/arch/sh/boards/mach-se/770x/irq.c
index ec1fea571b52..1028c17b81bc 100644
--- a/arch/sh/boards/mach-se/770x/irq.c
+++ b/arch/sh/boards/mach-se/770x/irq.c
@@ -96,13 +96,13 @@ static struct ipr_desc ipr_irq_desc = {
96void __init init_se_IRQ(void) 96void __init init_se_IRQ(void)
97{ 97{
98 /* Disable all interrupts */ 98 /* Disable all interrupts */
99 ctrl_outw(0, BCR_ILCRA); 99 __raw_writew(0, BCR_ILCRA);
100 ctrl_outw(0, BCR_ILCRB); 100 __raw_writew(0, BCR_ILCRB);
101 ctrl_outw(0, BCR_ILCRC); 101 __raw_writew(0, BCR_ILCRC);
102 ctrl_outw(0, BCR_ILCRD); 102 __raw_writew(0, BCR_ILCRD);
103 ctrl_outw(0, BCR_ILCRE); 103 __raw_writew(0, BCR_ILCRE);
104 ctrl_outw(0, BCR_ILCRF); 104 __raw_writew(0, BCR_ILCRF);
105 ctrl_outw(0, BCR_ILCRG); 105 __raw_writew(0, BCR_ILCRG);
106 106
107 register_ipr_controller(&ipr_irq_desc); 107 register_ipr_controller(&ipr_irq_desc);
108} 108}
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index 527eb6b12610..66d39d1b0901 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -93,15 +93,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
93static struct heartbeat_data heartbeat_data = { 93static struct heartbeat_data heartbeat_data = {
94 .bit_pos = heartbeat_bit_pos, 94 .bit_pos = heartbeat_bit_pos,
95 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 95 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
96 .regsize = 16,
97}; 96};
98 97
99static struct resource heartbeat_resources[] = { 98static struct resource heartbeat_resource = {
100 [0] = { 99 .start = PA_LED,
101 .start = PA_LED, 100 .end = PA_LED,
102 .end = PA_LED, 101 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
103 .flags = IORESOURCE_MEM,
104 },
105}; 102};
106 103
107static struct platform_device heartbeat_device = { 104static struct platform_device heartbeat_device = {
@@ -110,8 +107,8 @@ static struct platform_device heartbeat_device = {
110 .dev = { 107 .dev = {
111 .platform_data = &heartbeat_data, 108 .platform_data = &heartbeat_data,
112 }, 109 },
113 .num_resources = ARRAY_SIZE(heartbeat_resources), 110 .num_resources = 1,
114 .resource = heartbeat_resources, 111 .resource = &heartbeat_resource,
115}; 112};
116 113
117#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\ 114#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
diff --git a/arch/sh/boards/mach-se/7721/irq.c b/arch/sh/boards/mach-se/7721/irq.c
index b417acc4dad0..d85022ea3f12 100644
--- a/arch/sh/boards/mach-se/7721/irq.c
+++ b/arch/sh/boards/mach-se/7721/irq.c
@@ -38,7 +38,7 @@ static DECLARE_INTC_DESC(intc_desc, "SE7721", vectors,
38void __init init_se7721_IRQ(void) 38void __init init_se7721_IRQ(void)
39{ 39{
40 /* PPCR */ 40 /* PPCR */
41 ctrl_outw(ctrl_inw(0xa4050118) & ~0x00ff, 0xa4050118); 41 __raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118);
42 42
43 register_intc_controller(&intc_desc); 43 register_intc_controller(&intc_desc);
44 intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0); 44 intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0);
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c
index 55af4c36b43a..7416ad7ee53a 100644
--- a/arch/sh/boards/mach-se/7721/setup.c
+++ b/arch/sh/boards/mach-se/7721/setup.c
@@ -23,15 +23,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
23static struct heartbeat_data heartbeat_data = { 23static struct heartbeat_data heartbeat_data = {
24 .bit_pos = heartbeat_bit_pos, 24 .bit_pos = heartbeat_bit_pos,
25 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 25 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
26 .regsize = 16,
27}; 26};
28 27
29static struct resource heartbeat_resources[] = { 28static struct resource heartbeat_resource = {
30 [0] = { 29 .start = PA_LED,
31 .start = PA_LED, 30 .end = PA_LED,
32 .end = PA_LED, 31 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
33 .flags = IORESOURCE_MEM,
34 },
35}; 32};
36 33
37static struct platform_device heartbeat_device = { 34static struct platform_device heartbeat_device = {
@@ -40,8 +37,8 @@ static struct platform_device heartbeat_device = {
40 .dev = { 37 .dev = {
41 .platform_data = &heartbeat_data, 38 .platform_data = &heartbeat_data,
42 }, 39 },
43 .num_resources = ARRAY_SIZE(heartbeat_resources), 40 .num_resources = 1,
44 .resource = heartbeat_resources, 41 .resource = &heartbeat_resource,
45}; 42};
46 43
47static struct resource cf_ide_resources[] = { 44static struct resource cf_ide_resources[] = {
@@ -83,10 +80,10 @@ device_initcall(se7721_devices_setup);
83static void __init se7721_setup(char **cmdline_p) 80static void __init se7721_setup(char **cmdline_p)
84{ 81{
85 /* for USB */ 82 /* for USB */
86 ctrl_outw(0x0000, 0xA405010C); /* PGCR */ 83 __raw_writew(0x0000, 0xA405010C); /* PGCR */
87 ctrl_outw(0x0000, 0xA405010E); /* PHCR */ 84 __raw_writew(0x0000, 0xA405010E); /* PHCR */
88 ctrl_outw(0x00AA, 0xA4050118); /* PPCR */ 85 __raw_writew(0x00AA, 0xA4050118); /* PPCR */
89 ctrl_outw(0x0000, 0xA4050124); /* PSELA */ 86 __raw_writew(0x0000, 0xA4050124); /* PSELA */
90} 87}
91 88
92/* 89/*
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index b221b6842b0d..61605db04ee6 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -21,13 +21,13 @@ unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
21static void disable_se7722_irq(unsigned int irq) 21static void disable_se7722_irq(unsigned int irq)
22{ 22{
23 unsigned int bit = (unsigned int)get_irq_chip_data(irq); 23 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
24 ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK); 24 __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
25} 25}
26 26
27static void enable_se7722_irq(unsigned int irq) 27static void enable_se7722_irq(unsigned int irq)
28{ 28{
29 unsigned int bit = (unsigned int)get_irq_chip_data(irq); 29 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
30 ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK); 30 __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
31} 31}
32 32
33static struct irq_chip se7722_irq_chip __read_mostly = { 33static struct irq_chip se7722_irq_chip __read_mostly = {
@@ -39,7 +39,7 @@ static struct irq_chip se7722_irq_chip __read_mostly = {
39 39
40static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) 40static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
41{ 41{
42 unsigned short intv = ctrl_inw(IRQ01_STS); 42 unsigned short intv = __raw_readw(IRQ01_STS);
43 unsigned int ext_irq = 0; 43 unsigned int ext_irq = 0;
44 44
45 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1; 45 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
@@ -59,8 +59,8 @@ void __init init_se7722_IRQ(void)
59{ 59{
60 int i, irq; 60 int i, irq;
61 61
62 ctrl_outw(0, IRQ01_MASK); /* disable all irqs */ 62 __raw_writew(0, IRQ01_MASK); /* disable all irqs */
63 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 63 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
64 64
65 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) { 65 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
66 irq = create_irq(); 66 irq = create_irq();
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index b1cb9425b600..80a4e571b310 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -25,26 +25,17 @@
25#include <cpu/sh7722.h> 25#include <cpu/sh7722.h>
26 26
27/* Heartbeat */ 27/* Heartbeat */
28static struct heartbeat_data heartbeat_data = { 28static struct resource heartbeat_resource = {
29 .regsize = 16, 29 .start = PA_LED,
30}; 30 .end = PA_LED,
31 31 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
32static struct resource heartbeat_resources[] = {
33 [0] = {
34 .start = PA_LED,
35 .end = PA_LED,
36 .flags = IORESOURCE_MEM,
37 },
38}; 32};
39 33
40static struct platform_device heartbeat_device = { 34static struct platform_device heartbeat_device = {
41 .name = "heartbeat", 35 .name = "heartbeat",
42 .id = -1, 36 .id = -1,
43 .dev = { 37 .num_resources = 1,
44 .platform_data = &heartbeat_data, 38 .resource = &heartbeat_resource,
45 },
46 .num_resources = ARRAY_SIZE(heartbeat_resources),
47 .resource = heartbeat_resources,
48}; 39};
49 40
50/* SMC91x */ 41/* SMC91x */
@@ -165,32 +156,32 @@ device_initcall(se7722_devices_setup);
165 156
166static void __init se7722_setup(char **cmdline_p) 157static void __init se7722_setup(char **cmdline_p)
167{ 158{
168 ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ 159 __raw_writew(0x010D, FPGA_OUT); /* FPGA */
169 160
170 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ 161 __raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
171 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ 162 __raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
172 163
173 /* LCDC I/O */ 164 /* LCDC I/O */
174 ctrl_outw(0x0020, PORT_PSELD); 165 __raw_writew(0x0020, PORT_PSELD);
175 166
176 /* SIOF1*/ 167 /* SIOF1*/
177 ctrl_outw(0x0003, PORT_PSELB); 168 __raw_writew(0x0003, PORT_PSELB);
178 ctrl_outw(0xe000, PORT_PSELC); 169 __raw_writew(0xe000, PORT_PSELC);
179 ctrl_outw(0x0000, PORT_PKCR); 170 __raw_writew(0x0000, PORT_PKCR);
180 171
181 /* LCDC */ 172 /* LCDC */
182 ctrl_outw(0x4020, PORT_PHCR); 173 __raw_writew(0x4020, PORT_PHCR);
183 ctrl_outw(0x0000, PORT_PLCR); 174 __raw_writew(0x0000, PORT_PLCR);
184 ctrl_outw(0x0000, PORT_PMCR); 175 __raw_writew(0x0000, PORT_PMCR);
185 ctrl_outw(0x0002, PORT_PRCR); 176 __raw_writew(0x0002, PORT_PRCR);
186 ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */ 177 __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */
187 178
188 /* KEYSC */ 179 /* KEYSC */
189 ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */ 180 __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
190 ctrl_outw(0x0000, PORT_PYCR); 181 __raw_writew(0x0000, PORT_PYCR);
191 ctrl_outw(0x0000, PORT_PZCR); 182 __raw_writew(0x0000, PORT_PZCR);
192 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); 183 __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
193 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); 184 __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
194} 185}
195 186
196/* 187/*
diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
index f76cf3b49f23..0942be2daef6 100644
--- a/arch/sh/boards/mach-se/7724/irq.c
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -72,14 +72,14 @@ static void disable_se7724_irq(unsigned int irq)
72{ 72{
73 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); 73 struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
74 unsigned int bit = irq - set.base; 74 unsigned int bit = irq - set.base;
75 ctrl_outw(ctrl_inw(set.mraddr) | 0x0001 << bit, set.mraddr); 75 __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr);
76} 76}
77 77
78static void enable_se7724_irq(unsigned int irq) 78static void enable_se7724_irq(unsigned int irq)
79{ 79{
80 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); 80 struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
81 unsigned int bit = irq - set.base; 81 unsigned int bit = irq - set.base;
82 ctrl_outw(ctrl_inw(set.mraddr) & ~(0x0001 << bit), set.mraddr); 82 __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
83} 83}
84 84
85static struct irq_chip se7724_irq_chip __read_mostly = { 85static struct irq_chip se7724_irq_chip __read_mostly = {
@@ -92,19 +92,16 @@ static struct irq_chip se7724_irq_chip __read_mostly = {
92static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc) 92static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
93{ 93{
94 struct fpga_irq set = get_fpga_irq(irq); 94 struct fpga_irq set = get_fpga_irq(irq);
95 unsigned short intv = ctrl_inw(set.sraddr); 95 unsigned short intv = __raw_readw(set.sraddr);
96 struct irq_desc *ext_desc;
97 unsigned int ext_irq = set.base; 96 unsigned int ext_irq = set.base;
98 97
99 intv &= set.mask; 98 intv &= set.mask;
100 99
101 while (intv) { 100 for (; intv; intv >>= 1, ext_irq++) {
102 if (intv & 0x0001) { 101 if (!(intv & 1))
103 ext_desc = irq_desc + ext_irq; 102 continue;
104 handle_level_irq(ext_irq, ext_desc); 103
105 } 104 generic_handle_irq(ext_irq);
106 intv >>= 1;
107 ext_irq++;
108 } 105 }
109} 106}
110 107
@@ -113,20 +110,39 @@ static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
113 */ 110 */
114void __init init_se7724_IRQ(void) 111void __init init_se7724_IRQ(void)
115{ 112{
116 int i; 113 int i, nid = cpu_to_node(boot_cpu_data);
117 114
118 ctrl_outw(0xffff, IRQ0_MR); /* mask all */ 115 __raw_writew(0xffff, IRQ0_MR); /* mask all */
119 ctrl_outw(0xffff, IRQ1_MR); /* mask all */ 116 __raw_writew(0xffff, IRQ1_MR); /* mask all */
120 ctrl_outw(0xffff, IRQ2_MR); /* mask all */ 117 __raw_writew(0xffff, IRQ2_MR); /* mask all */
121 ctrl_outw(0x0000, IRQ0_SR); /* clear irq */ 118 __raw_writew(0x0000, IRQ0_SR); /* clear irq */
122 ctrl_outw(0x0000, IRQ1_SR); /* clear irq */ 119 __raw_writew(0x0000, IRQ1_SR); /* clear irq */
123 ctrl_outw(0x0000, IRQ2_SR); /* clear irq */ 120 __raw_writew(0x0000, IRQ2_SR); /* clear irq */
124 ctrl_outw(0x002a, IRQ_MODE); /* set irq type */ 121 __raw_writew(0x002a, IRQ_MODE); /* set irq type */
125 122
126 for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) 123 for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) {
127 set_irq_chip_and_handler_name(SE7724_FPGA_IRQ_BASE + i, 124 int irq, wanted;
125
126 wanted = SE7724_FPGA_IRQ_BASE + i;
127
128 irq = create_irq_nr(wanted, nid);
129 if (unlikely(irq == 0)) {
130 pr_err("%s: failed hooking irq %d for FPGA\n",
131 __func__, wanted);
132 return;
133 }
134
135 if (unlikely(irq != wanted)) {
136 pr_err("%s: got irq %d but wanted %d, bailing.\n",
137 __func__, irq, wanted);
138 destroy_irq(irq);
139 return;
140 }
141
142 set_irq_chip_and_handler_name(irq,
128 &se7724_irq_chip, 143 &se7724_irq_chip,
129 handle_level_irq, "level"); 144 handle_level_irq, "level");
145 }
130 146
131 set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux); 147 set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux);
132 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 148 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
diff --git a/arch/sh/boards/mach-se/7724/sdram.S b/arch/sh/boards/mach-se/7724/sdram.S
index 9040167d5022..6fa4734d09c7 100644
--- a/arch/sh/boards/mach-se/7724/sdram.S
+++ b/arch/sh/boards/mach-se/7724/sdram.S
@@ -39,6 +39,10 @@ ENTRY(ms7724se_sdram_leave_start)
39 39
40 /* DBSC: put memory in auto-refresh mode */ 40 /* DBSC: put memory in auto-refresh mode */
41 41
42 mov.l @(SH_SLEEP_MODE, r5), r0
43 tst #SUSP_SH_RSTANDBY, r0
44 bf resume_rstandby
45
42 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */ 46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
43 WAIT 1 47 WAIT 1
44 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */ 48 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
@@ -49,4 +53,79 @@ ENTRY(ms7724se_sdram_leave_start)
49 rts 53 rts
50 nop 54 nop
51 55
56resume_rstandby:
57
58 /* CPG: setup clocks before restarting external memory */
59
60 ED 0xA4150024, 0x00004000 /* PLLCR */
61
62 mov.l FRQCRA,r0
63 mov.l @r0,r3
64 mov.l KICK,r1
65 or r1, r3
66 mov.l r3, @r0
67
68 mov.l LSTATS,r0
69 mov #1,r1
70WAIT_LSTATS:
71 mov.l @r0,r3
72 tst r1,r3
73 bf WAIT_LSTATS
74
75 /* DBSC: re-initialize and put in auto-refresh */
76
77 ED 0xFD000108, 0x00000181 /* DBPDCNT0 */
78 ED 0xFD000020, 0x015B0002 /* DBCONF */
79 ED 0xFD000030, 0x03071502 /* DBTR0 */
80 ED 0xFD000034, 0x02020102 /* DBTR1 */
81 ED 0xFD000038, 0x01090405 /* DBTR2 */
82 ED 0xFD00003C, 0x00000002 /* DBTR3 */
83 ED 0xFD000008, 0x00000005 /* DBKIND */
84 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
85 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
86 ED 0xFD000018, 0x00000001 /* DBCKECNT */
87
88 mov #100,r0
89WAIT_400NS:
90 dt r0
91 bf WAIT_400NS
92
93 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
94 ED 0xFD000060, 0x00020000 /* DBMRCNT (EMR2) */
95 ED 0xFD000060, 0x00030000 /* DBMRCNT (EMR3) */
96 ED 0xFD000060, 0x00010004 /* DBMRCNT (EMR) */
97 ED 0xFD000060, 0x00000532 /* DBMRCNT (MRS) */
98 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
99 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
100 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
101 ED 0xFD000060, 0x00000432 /* DBMRCNT (MRS) */
102 ED 0xFD000060, 0x000103c0 /* DBMRCNT (EMR) */
103 ED 0xFD000060, 0x00010040 /* DBMRCNT (EMR) */
104
105 mov #100,r0
106WAIT_400NS_2:
107 dt r0
108 bf WAIT_400NS_2
109
110 ED 0xFD000010, 0x00000001 /* DBEN */
111 ED 0xFD000044, 0x0000050f /* DBRFPDN1 */
112 ED 0xFD000048, 0x236800e6 /* DBRFPDN2 */
113
114 mov.l DUMMY,r0
115 mov.l @r0, r1 /* force single dummy read */
116
117 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
118 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
119 ED 0xFD000108, 0x00000080 /* DBPDCNT0 */
120 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
121
122 rts
123 nop
124
125 .balign 4
126DUMMY: .long 0xac400000
127FRQCRA: .long 0xa4150000
128KICK: .long 0x80000000
129LSTATS: .long 0xa4150060
130
52ENTRY(ms7724se_sdram_leave_end) 131ENTRY(ms7724se_sdram_leave_end)
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 858ecb25d469..66cdbc3c7af9 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -53,26 +53,17 @@
53 */ 53 */
54 54
55/* Heartbeat */ 55/* Heartbeat */
56static struct heartbeat_data heartbeat_data = { 56static struct resource heartbeat_resource = {
57 .regsize = 16, 57 .start = PA_LED,
58}; 58 .end = PA_LED,
59 59 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
60static struct resource heartbeat_resources[] = {
61 [0] = {
62 .start = PA_LED,
63 .end = PA_LED,
64 .flags = IORESOURCE_MEM,
65 },
66}; 60};
67 61
68static struct platform_device heartbeat_device = { 62static struct platform_device heartbeat_device = {
69 .name = "heartbeat", 63 .name = "heartbeat",
70 .id = -1, 64 .id = -1,
71 .dev = { 65 .num_resources = 1,
72 .platform_data = &heartbeat_data, 66 .resource = &heartbeat_resource,
73 },
74 .num_resources = ARRAY_SIZE(heartbeat_resources),
75 .resource = heartbeat_resources,
76}; 67};
77 68
78/* LAN91C111 */ 69/* LAN91C111 */
@@ -265,12 +256,12 @@ static struct platform_device ceu1_device = {
265#define FCLKACR 0xa4150008 256#define FCLKACR 0xa4150008
266static void fsimck_init(struct clk *clk) 257static void fsimck_init(struct clk *clk)
267{ 258{
268 u32 status = ctrl_inl(clk->enable_reg); 259 u32 status = __raw_readl(clk->enable_reg);
269 260
270 /* use external clock */ 261 /* use external clock */
271 status &= ~0x000000ff; 262 status &= ~0x000000ff;
272 status |= 0x00000080; 263 status |= 0x00000080;
273 ctrl_outl(status, clk->enable_reg); 264 __raw_writel(status, clk->enable_reg);
274} 265}
275 266
276static struct clk_ops fsimck_clk_ops = { 267static struct clk_ops fsimck_clk_ops = {
@@ -322,7 +313,7 @@ static struct platform_device fsi_device = {
322/* KEYSC in SoC (Needs SW33-2 set to ON) */ 313/* KEYSC in SoC (Needs SW33-2 set to ON) */
323static struct sh_keysc_info keysc_info = { 314static struct sh_keysc_info keysc_info = {
324 .mode = SH_KEYSC_MODE_1, 315 .mode = SH_KEYSC_MODE_1,
325 .scan_timing = 10, 316 .scan_timing = 3,
326 .delay = 50, 317 .delay = 50,
327 .keycodes = { 318 .keycodes = {
328 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, 319 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
@@ -460,7 +451,7 @@ static struct resource sdhi0_cn7_resources[] = {
460 .flags = IORESOURCE_MEM, 451 .flags = IORESOURCE_MEM,
461 }, 452 },
462 [1] = { 453 [1] = {
463 .start = 101, 454 .start = 100,
464 .flags = IORESOURCE_IRQ, 455 .flags = IORESOURCE_IRQ,
465 }, 456 },
466}; 457};
@@ -483,7 +474,7 @@ static struct resource sdhi1_cn8_resources[] = {
483 .flags = IORESOURCE_MEM, 474 .flags = IORESOURCE_MEM,
484 }, 475 },
485 [1] = { 476 [1] = {
486 .start = 24, 477 .start = 23,
487 .flags = IORESOURCE_IRQ, 478 .flags = IORESOURCE_IRQ,
488 }, 479 },
489}; 480};
@@ -498,6 +489,26 @@ static struct platform_device sdhi1_cn8_device = {
498 }, 489 },
499}; 490};
500 491
492/* IrDA */
493static struct resource irda_resources[] = {
494 [0] = {
495 .name = "IrDA",
496 .start = 0xA45D0000,
497 .end = 0xA45D0049,
498 .flags = IORESOURCE_MEM,
499 },
500 [1] = {
501 .start = 20,
502 .flags = IORESOURCE_IRQ,
503 },
504};
505
506static struct platform_device irda_device = {
507 .name = "sh_sir",
508 .num_resources = ARRAY_SIZE(irda_resources),
509 .resource = irda_resources,
510};
511
501static struct platform_device *ms7724se_devices[] __initdata = { 512static struct platform_device *ms7724se_devices[] __initdata = {
502 &heartbeat_device, 513 &heartbeat_device,
503 &smc91x_eth_device, 514 &smc91x_eth_device,
@@ -512,6 +523,7 @@ static struct platform_device *ms7724se_devices[] __initdata = {
512 &fsi_device, 523 &fsi_device,
513 &sdhi0_cn7_device, 524 &sdhi0_cn7_device,
514 &sdhi1_cn8_device, 525 &sdhi1_cn8_device,
526 &irda_device,
515}; 527};
516 528
517/* I2C device */ 529/* I2C device */
@@ -531,7 +543,7 @@ static int __init sh_eth_is_eeprom_ready(void)
531 int t = 10000; 543 int t = 10000;
532 544
533 while (t--) { 545 while (t--) {
534 if (!ctrl_inw(EEPROM_STAT)) 546 if (!__raw_readw(EEPROM_STAT))
535 return 1; 547 return 1;
536 udelay(1); 548 udelay(1);
537 } 549 }
@@ -551,13 +563,13 @@ static void __init sh_eth_init(void)
551 563
552 /* read MAC addr from EEPROM */ 564 /* read MAC addr from EEPROM */
553 for (i = 0 ; i < 3 ; i++) { 565 for (i = 0 ; i < 3 ; i++) {
554 ctrl_outw(0x0, EEPROM_OP); /* read */ 566 __raw_writew(0x0, EEPROM_OP); /* read */
555 ctrl_outw(i*2, EEPROM_ADR); 567 __raw_writew(i*2, EEPROM_ADR);
556 ctrl_outw(0x1, EEPROM_STRT); 568 __raw_writew(0x1, EEPROM_STRT);
557 if (!sh_eth_is_eeprom_ready()) 569 if (!sh_eth_is_eeprom_ready())
558 return; 570 return;
559 571
560 mac = ctrl_inw(EEPROM_DATA); 572 mac = __raw_readw(EEPROM_DATA);
561 sh_eth_plat.mac_addr[i << 1] = mac & 0xff; 573 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
562 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8; 574 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
563 } 575 }
@@ -594,28 +606,29 @@ arch_initcall(arch_setup);
594 606
595static int __init devices_setup(void) 607static int __init devices_setup(void)
596{ 608{
597 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */ 609 u16 sw = __raw_readw(SW4140); /* select camera, monitor */
598 struct clk *fsia_clk; 610 struct clk *clk;
599 611
600 /* register board specific self-refresh code */ 612 /* register board specific self-refresh code */
601 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF, 613 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
614 SUSP_SH_RSTANDBY,
602 &ms7724se_sdram_enter_start, 615 &ms7724se_sdram_enter_start,
603 &ms7724se_sdram_enter_end, 616 &ms7724se_sdram_enter_end,
604 &ms7724se_sdram_leave_start, 617 &ms7724se_sdram_leave_start,
605 &ms7724se_sdram_leave_end); 618 &ms7724se_sdram_leave_end);
606 /* Reset Release */ 619 /* Reset Release */
607 ctrl_outw(ctrl_inw(FPGA_OUT) & 620 __raw_writew(__raw_readw(FPGA_OUT) &
608 ~((1 << 1) | /* LAN */ 621 ~((1 << 1) | /* LAN */
609 (1 << 6) | /* VIDEO DAC */ 622 (1 << 6) | /* VIDEO DAC */
610 (1 << 7) | /* AK4643 */ 623 (1 << 7) | /* AK4643 */
624 (1 << 8) | /* IrDA */
611 (1 << 12) | /* USB0 */ 625 (1 << 12) | /* USB0 */
612 (1 << 14)), /* RMII */ 626 (1 << 14)), /* RMII */
613 FPGA_OUT); 627 FPGA_OUT);
614 628
615 /* turn on USB clocks, use external clock */ 629 /* turn on USB clocks, use external clock */
616 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 630 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
617 631
618#ifdef CONFIG_PM
619 /* Let LED9 show STATUS2 */ 632 /* Let LED9 show STATUS2 */
620 gpio_request(GPIO_FN_STATUS2, NULL); 633 gpio_request(GPIO_FN_STATUS2, NULL);
621 634
@@ -624,28 +637,12 @@ static int __init devices_setup(void)
624 637
625 /* Lit LED11 show PDSTATUS */ 638 /* Lit LED11 show PDSTATUS */
626 gpio_request(GPIO_FN_PDSTATUS, NULL); 639 gpio_request(GPIO_FN_PDSTATUS, NULL);
627#else
628 /* Lit LED9 */
629 gpio_request(GPIO_PTJ6, NULL);
630 gpio_direction_output(GPIO_PTJ6, 1);
631 gpio_export(GPIO_PTJ6, 0);
632
633 /* Lit LED10 */
634 gpio_request(GPIO_PTJ5, NULL);
635 gpio_direction_output(GPIO_PTJ5, 1);
636 gpio_export(GPIO_PTJ5, 0);
637
638 /* Lit LED11 */
639 gpio_request(GPIO_PTJ7, NULL);
640 gpio_direction_output(GPIO_PTJ7, 1);
641 gpio_export(GPIO_PTJ7, 0);
642#endif
643 640
644 /* enable USB0 port */ 641 /* enable USB0 port */
645 ctrl_outw(0x0600, 0xa40501d4); 642 __raw_writew(0x0600, 0xa40501d4);
646 643
647 /* enable USB1 port */ 644 /* enable USB1 port */
648 ctrl_outw(0x0600, 0xa4050192); 645 __raw_writew(0x0600, 0xa4050192);
649 646
650 /* enable IRQ 0,1,2 */ 647 /* enable IRQ 0,1,2 */
651 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 648 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
@@ -693,7 +690,7 @@ static int __init devices_setup(void)
693 gpio_request(GPIO_FN_LCDVCPWC, NULL); 690 gpio_request(GPIO_FN_LCDVCPWC, NULL);
694 gpio_request(GPIO_FN_LCDRD, NULL); 691 gpio_request(GPIO_FN_LCDRD, NULL);
695 gpio_request(GPIO_FN_LCDLCLK, NULL); 692 gpio_request(GPIO_FN_LCDLCLK, NULL);
696 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 693 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
697 694
698 /* enable CEU0 */ 695 /* enable CEU0 */
699 gpio_request(GPIO_FN_VIO0_D15, NULL); 696 gpio_request(GPIO_FN_VIO0_D15, NULL);
@@ -764,13 +761,18 @@ static int __init devices_setup(void)
764 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 761 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
765 gpio_request(GPIO_FN_FSIIASD, NULL); 762 gpio_request(GPIO_FN_FSIIASD, NULL);
766 763
764 /* set SPU2 clock to 83.4 MHz */
765 clk = clk_get(NULL, "spu_clk");
766 clk_set_rate(clk, clk_round_rate(clk, 83333333));
767 clk_put(clk);
768
767 /* change parent of FSI A */ 769 /* change parent of FSI A */
768 fsia_clk = clk_get(NULL, "fsia_clk"); 770 clk = clk_get(NULL, "fsia_clk");
769 clk_register(&fsimcka_clk); 771 clk_register(&fsimcka_clk);
770 clk_set_parent(fsia_clk, &fsimcka_clk); 772 clk_set_parent(clk, &fsimcka_clk);
771 clk_set_rate(fsia_clk, 11000); 773 clk_set_rate(clk, 11000);
772 clk_set_rate(&fsimcka_clk, 11000); 774 clk_set_rate(&fsimcka_clk, 11000);
773 clk_put(fsia_clk); 775 clk_put(clk);
774 776
775 /* SDHI0 connected to cn7 */ 777 /* SDHI0 connected to cn7 */
776 gpio_request(GPIO_FN_SDHI0CD, NULL); 778 gpio_request(GPIO_FN_SDHI0CD, NULL);
@@ -792,6 +794,10 @@ static int __init devices_setup(void)
792 gpio_request(GPIO_FN_SDHI1CMD, NULL); 794 gpio_request(GPIO_FN_SDHI1CMD, NULL);
793 gpio_request(GPIO_FN_SDHI1CLK, NULL); 795 gpio_request(GPIO_FN_SDHI1CLK, NULL);
794 796
797 /* enable IrDA */
798 gpio_request(GPIO_FN_IRDA_OUT, NULL);
799 gpio_request(GPIO_FN_IRDA_IN, NULL);
800
795 /* 801 /*
796 * enable SH-Eth 802 * enable SH-Eth
797 * 803 *
diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c
index 121744c08714..d5c9edc172a3 100644
--- a/arch/sh/boards/mach-se/7780/irq.c
+++ b/arch/sh/boards/mach-se/7780/irq.c
@@ -24,30 +24,30 @@
24void __init init_se7780_IRQ(void) 24void __init init_se7780_IRQ(void)
25{ 25{
26 /* enable all interrupt at FPGA */ 26 /* enable all interrupt at FPGA */
27 ctrl_outw(0, FPGA_INTMSK1); 27 __raw_writew(0, FPGA_INTMSK1);
28 /* mask SM501 interrupt */ 28 /* mask SM501 interrupt */
29 ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); 29 __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
30 /* enable all interrupt at FPGA */ 30 /* enable all interrupt at FPGA */
31 ctrl_outw(0, FPGA_INTMSK2); 31 __raw_writew(0, FPGA_INTMSK2);
32 32
33 /* set FPGA INTSEL register */ 33 /* set FPGA INTSEL register */
34 /* FPGA + 0x06 */ 34 /* FPGA + 0x06 */
35 ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) | 35 __raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) |
36 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1); 36 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
37 37
38 /* FPGA + 0x08 */ 38 /* FPGA + 0x08 */
39 ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) | 39 __raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
40 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) | 40 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
41 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) | 41 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
42 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2); 42 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
43 43
44 /* FPGA + 0x0A */ 44 /* FPGA + 0x0A */
45 ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); 45 __raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
46 46
47 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */ 47 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
48 48
49 /* ICR1: detect low level(for 2ndcut) */ 49 /* ICR1: detect low level(for 2ndcut) */
50 ctrl_outl(0xAAAA0000, INTC_ICR1); 50 __raw_writel(0xAAAA0000, INTC_ICR1);
51 51
52 /* 52 /*
53 * FPGA PCISEL register initialize 53 * FPGA PCISEL register initialize
@@ -63,6 +63,6 @@ void __init init_se7780_IRQ(void)
63 * INTD || INTD | INTC | -- | INTA 63 * INTD || INTD | INTC | -- | INTA
64 * ------------------------------------- 64 * -------------------------------------
65 */ 65 */
66 ctrl_outw(0x0013, FPGA_PCI_INTSEL1); 66 __raw_writew(0x0013, FPGA_PCI_INTSEL1);
67 ctrl_outw(0xE402, FPGA_PCI_INTSEL2); 67 __raw_writew(0xE402, FPGA_PCI_INTSEL2);
68} 68}
diff --git a/arch/sh/boards/mach-se/7780/setup.c b/arch/sh/boards/mach-se/7780/setup.c
index 1d3a867e94e3..6f7c207138e1 100644
--- a/arch/sh/boards/mach-se/7780/setup.c
+++ b/arch/sh/boards/mach-se/7780/setup.c
@@ -17,26 +17,17 @@
17#include <asm/heartbeat.h> 17#include <asm/heartbeat.h>
18 18
19/* Heartbeat */ 19/* Heartbeat */
20static struct heartbeat_data heartbeat_data = { 20static struct resource heartbeat_resource = {
21 .regsize = 16, 21 .start = PA_LED,
22}; 22 .end = PA_LED,
23 23 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
24static struct resource heartbeat_resources[] = {
25 [0] = {
26 .start = PA_LED,
27 .end = PA_LED,
28 .flags = IORESOURCE_MEM,
29 },
30}; 24};
31 25
32static struct platform_device heartbeat_device = { 26static struct platform_device heartbeat_device = {
33 .name = "heartbeat", 27 .name = "heartbeat",
34 .id = -1, 28 .id = -1,
35 .dev = { 29 .num_resources = 1,
36 .platform_data = &heartbeat_data, 30 .resource = &heartbeat_resource,
37 },
38 .num_resources = ARRAY_SIZE(heartbeat_resources),
39 .resource = heartbeat_resources,
40}; 31};
41 32
42/* SMC91x */ 33/* SMC91x */
@@ -84,14 +75,14 @@ device_initcall(se7780_devices_setup);
84static void __init se7780_setup(char **cmdline_p) 75static void __init se7780_setup(char **cmdline_p)
85{ 76{
86 /* "SH-Linux" on LED Display */ 77 /* "SH-Linux" on LED Display */
87 ctrl_outw( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) ); 78 __raw_writew( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) );
88 ctrl_outw( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) ); 79 __raw_writew( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) );
89 ctrl_outw( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) ); 80 __raw_writew( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) );
90 ctrl_outw( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) ); 81 __raw_writew( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) );
91 ctrl_outw( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) ); 82 __raw_writew( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) );
92 ctrl_outw( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) ); 83 __raw_writew( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) );
93 ctrl_outw( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) ); 84 __raw_writew( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) );
94 ctrl_outw( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) ); 85 __raw_writew( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) );
95 86
96 printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n"); 87 printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n");
97 88
@@ -102,15 +93,15 @@ static void __init se7780_setup(char **cmdline_p)
102 * REQ2/GNT2 -> Serial ATA 93 * REQ2/GNT2 -> Serial ATA
103 * REQ3/GNT3 -> PCI slot 94 * REQ3/GNT3 -> PCI slot
104 */ 95 */
105 ctrl_outw(0x0213, FPGA_REQSEL); 96 __raw_writew(0x0213, FPGA_REQSEL);
106 97
107 /* GPIO setting */ 98 /* GPIO setting */
108 ctrl_outw(0x0000, GPIO_PECR); 99 __raw_writew(0x0000, GPIO_PECR);
109 ctrl_outw(ctrl_inw(GPIO_PHCR)&0xfff3, GPIO_PHCR); 100 __raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR);
110 ctrl_outw(0x0c00, GPIO_PMSELR); 101 __raw_writew(0x0c00, GPIO_PMSELR);
111 102
112 /* iVDR Power ON */ 103 /* iVDR Power ON */
113 ctrl_outw(0x0001, FPGA_IVDRPW); 104 __raw_writew(0x0001, FPGA_IVDRPW);
114} 105}
115 106
116/* 107/*
diff --git a/arch/sh/boards/mach-sh03/rtc.c b/arch/sh/boards/mach-sh03/rtc.c
index a8b9f844ab5b..1b200990500c 100644
--- a/arch/sh/boards/mach-sh03/rtc.c
+++ b/arch/sh/boards/mach-sh03/rtc.c
@@ -44,15 +44,15 @@ unsigned long get_cmos_time(void)
44 spin_lock(&sh03_rtc_lock); 44 spin_lock(&sh03_rtc_lock);
45 again: 45 again:
46 do { 46 do {
47 sec = (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10; 47 sec = (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10;
48 min = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10; 48 min = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10;
49 hour = (ctrl_inb(RTC_HOU1) & 0xf) + (ctrl_inb(RTC_HOU10) & 0xf) * 10; 49 hour = (__raw_readb(RTC_HOU1) & 0xf) + (__raw_readb(RTC_HOU10) & 0xf) * 10;
50 day = (ctrl_inb(RTC_DAY1) & 0xf) + (ctrl_inb(RTC_DAY10) & 0xf) * 10; 50 day = (__raw_readb(RTC_DAY1) & 0xf) + (__raw_readb(RTC_DAY10) & 0xf) * 10;
51 mon = (ctrl_inb(RTC_MON1) & 0xf) + (ctrl_inb(RTC_MON10) & 0xf) * 10; 51 mon = (__raw_readb(RTC_MON1) & 0xf) + (__raw_readb(RTC_MON10) & 0xf) * 10;
52 year = (ctrl_inb(RTC_YEA1) & 0xf) + (ctrl_inb(RTC_YEA10) & 0xf) * 10 52 year = (__raw_readb(RTC_YEA1) & 0xf) + (__raw_readb(RTC_YEA10) & 0xf) * 10
53 + (ctrl_inb(RTC_YEA100 ) & 0xf) * 100 53 + (__raw_readb(RTC_YEA100 ) & 0xf) * 100
54 + (ctrl_inb(RTC_YEA1000) & 0xf) * 1000; 54 + (__raw_readb(RTC_YEA1000) & 0xf) * 1000;
55 } while (sec != (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10); 55 } while (sec != (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10);
56 if (year == 0 || mon < 1 || mon > 12 || day > 31 || day < 1 || 56 if (year == 0 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
57 hour > 23 || min > 59 || sec > 59) { 57 hour > 23 || min > 59 || sec > 59) {
58 printk(KERN_ERR 58 printk(KERN_ERR
@@ -60,16 +60,16 @@ unsigned long get_cmos_time(void)
60 printk("year=%d, mon=%d, day=%d, hour=%d, min=%d, sec=%d\n", 60 printk("year=%d, mon=%d, day=%d, hour=%d, min=%d, sec=%d\n",
61 year, mon, day, hour, min, sec); 61 year, mon, day, hour, min, sec);
62 62
63 ctrl_outb(0, RTC_SEC1); ctrl_outb(0, RTC_SEC10); 63 __raw_writeb(0, RTC_SEC1); __raw_writeb(0, RTC_SEC10);
64 ctrl_outb(0, RTC_MIN1); ctrl_outb(0, RTC_MIN10); 64 __raw_writeb(0, RTC_MIN1); __raw_writeb(0, RTC_MIN10);
65 ctrl_outb(0, RTC_HOU1); ctrl_outb(0, RTC_HOU10); 65 __raw_writeb(0, RTC_HOU1); __raw_writeb(0, RTC_HOU10);
66 ctrl_outb(6, RTC_WEE1); 66 __raw_writeb(6, RTC_WEE1);
67 ctrl_outb(1, RTC_DAY1); ctrl_outb(0, RTC_DAY10); 67 __raw_writeb(1, RTC_DAY1); __raw_writeb(0, RTC_DAY10);
68 ctrl_outb(1, RTC_MON1); ctrl_outb(0, RTC_MON10); 68 __raw_writeb(1, RTC_MON1); __raw_writeb(0, RTC_MON10);
69 ctrl_outb(0, RTC_YEA1); ctrl_outb(0, RTC_YEA10); 69 __raw_writeb(0, RTC_YEA1); __raw_writeb(0, RTC_YEA10);
70 ctrl_outb(0, RTC_YEA100); 70 __raw_writeb(0, RTC_YEA100);
71 ctrl_outb(2, RTC_YEA1000); 71 __raw_writeb(2, RTC_YEA1000);
72 ctrl_outb(0, RTC_CTL); 72 __raw_writeb(0, RTC_CTL);
73 goto again; 73 goto again;
74 } 74 }
75 75
@@ -93,9 +93,9 @@ static int set_rtc_mmss(unsigned long nowtime)
93 /* gets recalled with irq locally disabled */ 93 /* gets recalled with irq locally disabled */
94 spin_lock(&sh03_rtc_lock); 94 spin_lock(&sh03_rtc_lock);
95 for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */ 95 for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
96 if (!(ctrl_inb(RTC_CTL) & RTC_BUSY)) 96 if (!(__raw_readb(RTC_CTL) & RTC_BUSY))
97 break; 97 break;
98 cmos_minutes = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10; 98 cmos_minutes = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10;
99 real_seconds = nowtime % 60; 99 real_seconds = nowtime % 60;
100 real_minutes = nowtime / 60; 100 real_minutes = nowtime / 60;
101 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) 101 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
@@ -103,10 +103,10 @@ static int set_rtc_mmss(unsigned long nowtime)
103 real_minutes %= 60; 103 real_minutes %= 60;
104 104
105 if (abs(real_minutes - cmos_minutes) < 30) { 105 if (abs(real_minutes - cmos_minutes) < 30) {
106 ctrl_outb(real_seconds % 10, RTC_SEC1); 106 __raw_writeb(real_seconds % 10, RTC_SEC1);
107 ctrl_outb(real_seconds / 10, RTC_SEC10); 107 __raw_writeb(real_seconds / 10, RTC_SEC10);
108 ctrl_outb(real_minutes % 10, RTC_MIN1); 108 __raw_writeb(real_minutes % 10, RTC_MIN1);
109 ctrl_outb(real_minutes / 10, RTC_MIN10); 109 __raw_writeb(real_minutes / 10, RTC_MIN10);
110 } else { 110 } else {
111 printk(KERN_WARNING 111 printk(KERN_WARNING
112 "set_rtc_mmss: can't update from %d to %d\n", 112 "set_rtc_mmss: can't update from %d to %d\n",
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index 74cfb4b8b03d..af4a0c012a96 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -82,7 +82,7 @@ static int __init sh03_devices_setup(void)
82 /* open I/O area window */ 82 /* open I/O area window */
83 paddrbase = virt_to_phys((void *)PA_AREA5_IO); 83 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
84 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); 84 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
85 cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); 85 cf_ide_base = ioremap_prot(paddrbase, PAGE_SIZE, pgprot_val(prot));
86 if (!cf_ide_base) { 86 if (!cf_ide_base) {
87 printk("allocate_cf_area : can't open CF I/O window!\n"); 87 printk("allocate_cf_area : can't open CF I/O window!\n");
88 return -ENOMEM; 88 return -ENOMEM;
diff --git a/arch/sh/boards/mach-sh7763rdp/irq.c b/arch/sh/boards/mach-sh7763rdp/irq.c
index d8ebfa7d8c76..add698c8f2b4 100644
--- a/arch/sh/boards/mach-sh7763rdp/irq.c
+++ b/arch/sh/boards/mach-sh7763rdp/irq.c
@@ -28,18 +28,18 @@
28void __init init_sh7763rdp_IRQ(void) 28void __init init_sh7763rdp_IRQ(void)
29{ 29{
30 /* GPIO enabled */ 30 /* GPIO enabled */
31 ctrl_outl(1 << 25, INTC_INT2MSKCR); 31 __raw_writel(1 << 25, INTC_INT2MSKCR);
32 32
33 /* enable GPIO interrupts */ 33 /* enable GPIO interrupts */
34 ctrl_outl((ctrl_inl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000, 34 __raw_writel((__raw_readl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000,
35 INTC_INT2PRI7); 35 INTC_INT2PRI7);
36 36
37 /* USBH enabled */ 37 /* USBH enabled */
38 ctrl_outl(1 << 17, INTC_INT2MSKCR1); 38 __raw_writel(1 << 17, INTC_INT2MSKCR1);
39 39
40 /* GETHER enabled */ 40 /* GETHER enabled */
41 ctrl_outl(1 << 16, INTC_INT2MSKCR1); 41 __raw_writel(1 << 16, INTC_INT2MSKCR1);
42 42
43 /* DMAC enabled */ 43 /* DMAC enabled */
44 ctrl_outl(1 << 8, INTC_INT2MSKCR); 44 __raw_writel(1 << 8, INTC_INT2MSKCR);
45} 45}
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
index 390534a0b35c..f64a6918224c 100644
--- a/arch/sh/boards/mach-sh7763rdp/setup.c
+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
@@ -158,50 +158,50 @@ device_initcall(sh7763rdp_devices_setup);
158static void __init sh7763rdp_setup(char **cmdline_p) 158static void __init sh7763rdp_setup(char **cmdline_p)
159{ 159{
160 /* Board version check */ 160 /* Board version check */
161 if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) 161 if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
162 printk(KERN_INFO "RTE Standard Configuration\n"); 162 printk(KERN_INFO "RTE Standard Configuration\n");
163 else 163 else
164 printk(KERN_INFO "RTA Standard Configuration\n"); 164 printk(KERN_INFO "RTA Standard Configuration\n");
165 165
166 /* USB pin select bits (clear bit 5-2 to 0) */ 166 /* USB pin select bits (clear bit 5-2 to 0) */
167 ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); 167 __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
168 /* USBH setup port I controls to other (clear bits 4-9 to 0) */ 168 /* USBH setup port I controls to other (clear bits 4-9 to 0) */
169 ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR); 169 __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR);
170 170
171 /* Select USB Host controller */ 171 /* Select USB Host controller */
172 ctrl_outw(0x00, USB_USBHSC); 172 __raw_writew(0x00, USB_USBHSC);
173 173
174 /* For LCD */ 174 /* For LCD */
175 /* set PTJ7-1, bits 15-2 of PJCR to 0 */ 175 /* set PTJ7-1, bits 15-2 of PJCR to 0 */
176 ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR); 176 __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR);
177 /* set PTI5, bits 11-10 of PICR to 0 */ 177 /* set PTI5, bits 11-10 of PICR to 0 */
178 ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR); 178 __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR);
179 ctrl_outw(0, PORT_PKCR); 179 __raw_writew(0, PORT_PKCR);
180 ctrl_outw(0, PORT_PLCR); 180 __raw_writew(0, PORT_PLCR);
181 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */ 181 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
182 ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); 182 __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
183 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */ 183 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
184 ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3); 184 __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
185 185
186 /* For HAC */ 186 /* For HAC */
187 /* bit3-0 0100:HAC & SSI1 enable */ 187 /* bit3-0 0100:HAC & SSI1 enable */
188 ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); 188 __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
189 /* bit14 1:SSI_HAC_CLK enable */ 189 /* bit14 1:SSI_HAC_CLK enable */
190 ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4); 190 __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
191 191
192 /* SH-Ether */ 192 /* SH-Ether */
193 ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); 193 __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
194 ctrl_outw(0x0, PORT_PFCR); 194 __raw_writew(0x0, PORT_PFCR);
195 ctrl_outw(0x0, PORT_PFCR); 195 __raw_writew(0x0, PORT_PFCR);
196 ctrl_outw(0x0, PORT_PFCR); 196 __raw_writew(0x0, PORT_PFCR);
197 197
198 /* MMC */ 198 /* MMC */
199 /*selects SCIF and MMC other functions */ 199 /*selects SCIF and MMC other functions */
200 ctrl_outw(0x0001, PORT_PSEL0); 200 __raw_writew(0x0001, PORT_PSEL0);
201 /* MMC clock operates */ 201 /* MMC clock operates */
202 ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1); 202 __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1);
203 ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR); 203 __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR);
204 ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); 204 __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
205} 205}
206 206
207static struct sh_machine_vector mv_sh7763rdp __initmv = { 207static struct sh_machine_vector mv_sh7763rdp __initmv = {
diff --git a/arch/sh/boards/mach-snapgear/setup.c b/arch/sh/boards/mach-snapgear/setup.c
index a3277a23cf14..331745dee379 100644
--- a/arch/sh/boards/mach-snapgear/setup.c
+++ b/arch/sh/boards/mach-snapgear/setup.c
@@ -30,7 +30,7 @@
30 30
31static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id) 31static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
32{ 32{
33 (void)ctrl_inb(0xb8000000); /* dummy read */ 33 (void)__raw_readb(0xb8000000); /* dummy read */
34 34
35 printk("SnapGear: erase switch interrupt!\n"); 35 printk("SnapGear: erase switch interrupt!\n");
36 36
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
index 986a0e71d220..523aea5dc94e 100644
--- a/arch/sh/boards/mach-systemh/irq.c
+++ b/arch/sh/boards/mach-systemh/irq.c
@@ -41,13 +41,13 @@ static void disable_systemh_irq(unsigned int irq)
41 unsigned long val, mask = 0x01 << 1; 41 unsigned long val, mask = 0x01 << 1;
42 42
43 /* Clear the "irq"th bit in the mask and set it in the request */ 43 /* Clear the "irq"th bit in the mask and set it in the request */
44 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 44 val = __raw_readl((unsigned long)systemh_irq_mask_register);
45 val &= ~mask; 45 val &= ~mask;
46 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 46 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
47 47
48 val = ctrl_inl((unsigned long)systemh_irq_request_register); 48 val = __raw_readl((unsigned long)systemh_irq_request_register);
49 val |= mask; 49 val |= mask;
50 ctrl_outl(val, (unsigned long)systemh_irq_request_register); 50 __raw_writel(val, (unsigned long)systemh_irq_request_register);
51 } 51 }
52} 52}
53 53
@@ -57,9 +57,9 @@ static void enable_systemh_irq(unsigned int irq)
57 unsigned long val, mask = 0x01 << 1; 57 unsigned long val, mask = 0x01 << 1;
58 58
59 /* Set "irq"th bit in the mask register */ 59 /* Set "irq"th bit in the mask register */
60 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 60 val = __raw_readl((unsigned long)systemh_irq_mask_register);
61 val |= mask; 61 val |= mask;
62 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 62 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
63 } 63 }
64} 64}
65 65
diff --git a/arch/sh/boards/mach-titan/Makefile b/arch/sh/boards/mach-titan/Makefile
deleted file mode 100644
index 08d753700062..000000000000
--- a/arch/sh/boards/mach-titan/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the Nimble Microsystems TITAN specific parts of the kernel
3#
4
5obj-y := setup.o io.o
diff --git a/arch/sh/boards/mach-titan/io.c b/arch/sh/boards/mach-titan/io.c
deleted file mode 100644
index 0130e9826aca..000000000000
--- a/arch/sh/boards/mach-titan/io.c
+++ /dev/null
@@ -1,108 +0,0 @@
1/*
2 * I/O routines for Titan
3 */
4#include <linux/pci.h>
5#include <asm/machvec.h>
6#include <asm/addrspace.h>
7#include <mach/titan.h>
8#include <asm/io.h>
9
10static inline unsigned int port2adr(unsigned int port)
11{
12 maybebadio((unsigned long)port);
13 return port;
14}
15
16u8 titan_inb(unsigned long port)
17{
18 if (PXSEG(port))
19 return ctrl_inb(port);
20 return ctrl_inw(port2adr(port)) & 0xff;
21}
22
23u8 titan_inb_p(unsigned long port)
24{
25 u8 v;
26
27 if (PXSEG(port))
28 v = ctrl_inb(port);
29 else
30 v = ctrl_inw(port2adr(port)) & 0xff;
31 ctrl_delay();
32 return v;
33}
34
35u16 titan_inw(unsigned long port)
36{
37 if (PXSEG(port))
38 return ctrl_inw(port);
39 else if (port >= 0x2000)
40 return ctrl_inw(port2adr(port));
41 else
42 maybebadio(port);
43 return 0;
44}
45
46u32 titan_inl(unsigned long port)
47{
48 if (PXSEG(port))
49 return ctrl_inl(port);
50 else if (port >= 0x2000)
51 return ctrl_inw(port2adr(port));
52 else
53 maybebadio(port);
54 return 0;
55}
56
57void titan_outb(u8 value, unsigned long port)
58{
59 if (PXSEG(port))
60 ctrl_outb(value, port);
61 else
62 ctrl_outw(value, port2adr(port));
63}
64
65void titan_outb_p(u8 value, unsigned long port)
66{
67 if (PXSEG(port))
68 ctrl_outb(value, port);
69 else
70 ctrl_outw(value, port2adr(port));
71 ctrl_delay();
72}
73
74void titan_outw(u16 value, unsigned long port)
75{
76 if (PXSEG(port))
77 ctrl_outw(value, port);
78 else if (port >= 0x2000)
79 ctrl_outw(value, port2adr(port));
80 else
81 maybebadio(port);
82}
83
84void titan_outl(u32 value, unsigned long port)
85{
86 if (PXSEG(port))
87 ctrl_outl(value, port);
88 else
89 maybebadio(port);
90}
91
92void titan_insl(unsigned long port, void *dst, unsigned long count)
93{
94 maybebadio(port);
95}
96
97void titan_outsl(unsigned long port, const void *src, unsigned long count)
98{
99 maybebadio(port);
100}
101
102void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
103{
104 if (PXSEG(port))
105 return (void __iomem *)port;
106
107 return (void __iomem *)port2adr(port);
108}
diff --git a/arch/sh/boards/mach-x3proto/ilsel.c b/arch/sh/boards/mach-x3proto/ilsel.c
index b5c673c39337..5c9842704c60 100644
--- a/arch/sh/boards/mach-x3proto/ilsel.c
+++ b/arch/sh/boards/mach-x3proto/ilsel.c
@@ -70,10 +70,10 @@ static void __ilsel_enable(ilsel_source_t set, unsigned int bit)
70 pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n", 70 pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n",
71 __func__, bit, addr, shift, set); 71 __func__, bit, addr, shift, set);
72 72
73 tmp = ctrl_inw(addr); 73 tmp = __raw_readw(addr);
74 tmp &= ~(0xf << shift); 74 tmp &= ~(0xf << shift);
75 tmp |= set << shift; 75 tmp |= set << shift;
76 ctrl_outw(tmp, addr); 76 __raw_writew(tmp, addr);
77} 77}
78 78
79/** 79/**
@@ -142,9 +142,9 @@ void ilsel_disable(unsigned int irq)
142 142
143 addr = mk_ilsel_addr(irq); 143 addr = mk_ilsel_addr(irq);
144 144
145 tmp = ctrl_inw(addr); 145 tmp = __raw_readw(addr);
146 tmp &= ~(0xf << mk_ilsel_shift(irq)); 146 tmp &= ~(0xf << mk_ilsel_shift(irq));
147 ctrl_outw(tmp, addr); 147 __raw_writew(tmp, addr);
148 148
149 clear_bit(irq, &ilsel_level_map); 149 clear_bit(irq, &ilsel_level_map);
150} 150}
diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c
index efe4cb9f8a77..e284592fd42a 100644
--- a/arch/sh/boards/mach-x3proto/setup.c
+++ b/arch/sh/boards/mach-x3proto/setup.c
@@ -149,7 +149,7 @@ static void __init x3proto_init_irq(void)
149 plat_irq_setup_pins(IRQ_MODE_IRL3210); 149 plat_irq_setup_pins(IRQ_MODE_IRL3210);
150 150
151 /* Set ICR0.LVLMODE */ 151 /* Set ICR0.LVLMODE */
152 ctrl_outl(ctrl_inl(0xfe410000) | (1 << 21), 0xfe410000); 152 __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000);
153} 153}
154 154
155static struct sh_machine_vector mv_x3proto __initmv = { 155static struct sh_machine_vector mv_x3proto __initmv = {
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index cb8cf5572e79..1ce63624c9b9 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -21,12 +21,15 @@ CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000
21CONFIG_ENTRY_OFFSET ?= 0x00001000 21CONFIG_ENTRY_OFFSET ?= 0x00001000
22 22
23suffix-y := bin 23suffix-y := bin
24suffix-$(CONFIG_KERNEL_GZIP) := gz 24suffix-$(CONFIG_KERNEL_GZIP) := gz
25suffix-$(CONFIG_KERNEL_BZIP2) := bz2 25suffix-$(CONFIG_KERNEL_BZIP2) := bz2
26suffix-$(CONFIG_KERNEL_LZMA) := lzma 26suffix-$(CONFIG_KERNEL_LZMA) := lzma
27 27suffix-$(CONFIG_KERNEL_LZO) := lzo
28targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz uImage.bz2 uImage.lzma uImage.bin 28
29extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma 29targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz \
30 uImage.bz2 uImage.lzma uImage.lzo uImage.bin
31extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \
32 vmlinux.bin.lzo
30subdir- := compressed romimage 33subdir- := compressed romimage
31 34
32$(obj)/zImage: $(obj)/compressed/vmlinux FORCE 35$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
@@ -43,15 +46,8 @@ $(obj)/romImage: $(obj)/romimage/vmlinux FORCE
43$(obj)/romimage/vmlinux: $(obj)/zImage FORCE 46$(obj)/romimage/vmlinux: $(obj)/zImage FORCE
44 $(Q)$(MAKE) $(build)=$(obj)/romimage $@ 47 $(Q)$(MAKE) $(build)=$(obj)/romimage $@
45 48
46KERNEL_MEMORY := 0x00000000 49KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
47ifeq ($(CONFIG_PMB_FIXED),y)
48KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
49 $$[$(CONFIG_MEMORY_START) & 0x1fffffff]') 50 $$[$(CONFIG_MEMORY_START) & 0x1fffffff]')
50endif
51ifeq ($(CONFIG_29BIT),y)
52KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
53 $$[$(CONFIG_MEMORY_START)]')
54endif
55 51
56KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \ 52KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \
57 $$[$(CONFIG_PAGE_OFFSET) + \ 53 $$[$(CONFIG_PAGE_OFFSET) + \
@@ -80,6 +76,9 @@ $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
80$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE 76$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
81 $(call if_changed,lzma) 77 $(call if_changed,lzma)
82 78
79$(obj)/vmlinux.bin.lzo: $(obj)/vmlinux.bin FORCE
80 $(call if_changed,lzo)
81
83$(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2 82$(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2
84 $(call if_changed,uimage,bzip2) 83 $(call if_changed,uimage,bzip2)
85 84
@@ -89,6 +88,9 @@ $(obj)/uImage.gz: $(obj)/vmlinux.bin.gz
89$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma 88$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma
90 $(call if_changed,uimage,lzma) 89 $(call if_changed,uimage,lzma)
91 90
91$(obj)/uImage.lzo: $(obj)/vmlinux.bin.lzo
92 $(call if_changed,uimage,lzo)
93
92$(obj)/uImage.bin: $(obj)/vmlinux.bin 94$(obj)/uImage.bin: $(obj)/vmlinux.bin
93 $(call if_changed,uimage,none) 95 $(call if_changed,uimage,none)
94 96
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index 6182eca5180a..5d660b90943b 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -6,14 +6,11 @@
6 6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 7targets := vmlinux vmlinux.bin vmlinux.bin.gz \
8 vmlinux.bin.bz2 vmlinux.bin.lzma \ 8 vmlinux.bin.bz2 vmlinux.bin.lzma \
9 vmlinux.bin.lzo \
9 head_$(BITS).o misc.o piggy.o 10 head_$(BITS).o misc.o piggy.o
10 11
11OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o 12OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o
12 13
13ifdef CONFIG_SH_STANDARD_BIOS
14OBJECTS += $(obj)/../../kernel/sh_bios.o
15endif
16
17# 14#
18# IMAGE_OFFSET is the load offset of the compression loader 15# IMAGE_OFFSET is the load offset of the compression loader
19# 16#
@@ -47,6 +44,8 @@ $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
47 $(call if_changed,bzip2) 44 $(call if_changed,bzip2)
48$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE 45$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
49 $(call if_changed,lzma) 46 $(call if_changed,lzma)
47$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE
48 $(call if_changed,lzo)
50 49
51OBJCOPYFLAGS += -R .empty_zero_page 50OBJCOPYFLAGS += -R .empty_zero_page
52 51
diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c
index b51b1fc4baae..27140a6b365d 100644
--- a/arch/sh/boot/compressed/misc.c
+++ b/arch/sh/boot/compressed/misc.c
@@ -14,7 +14,6 @@
14#include <asm/uaccess.h> 14#include <asm/uaccess.h>
15#include <asm/addrspace.h> 15#include <asm/addrspace.h>
16#include <asm/page.h> 16#include <asm/page.h>
17#include <asm/sh_bios.h>
18 17
19/* 18/*
20 * gzip declarations 19 * gzip declarations
@@ -62,29 +61,15 @@ static unsigned long free_mem_end_ptr;
62#include "../../../../lib/decompress_unlzma.c" 61#include "../../../../lib/decompress_unlzma.c"
63#endif 62#endif
64 63
65#ifdef CONFIG_SH_STANDARD_BIOS 64#ifdef CONFIG_KERNEL_LZO
66size_t strlen(const char *s) 65#include "../../../../lib/decompress_unlzo.c"
67{ 66#endif
68 int i = 0;
69
70 while (*s++)
71 i++;
72 return i;
73}
74 67
75int puts(const char *s) 68int puts(const char *s)
76{ 69{
77 int len = strlen(s);
78 sh_bios_console_write(s, len);
79 return len;
80}
81#else
82int puts(const char *s)
83{
84 /* This should be updated to use the sh-sci routines */ 70 /* This should be updated to use the sh-sci routines */
85 return 0; 71 return 0;
86} 72}
87#endif
88 73
89void* memset(void* s, int c, size_t n) 74void* memset(void* s, int c, size_t n)
90{ 75{
@@ -132,7 +117,7 @@ void decompress_kernel(void)
132 output_addr = (CONFIG_MEMORY_START + 0x2000); 117 output_addr = (CONFIG_MEMORY_START + 0x2000);
133#else 118#else
134 output_addr = __pa((unsigned long)&_text+PAGE_SIZE); 119 output_addr = __pa((unsigned long)&_text+PAGE_SIZE);
135#ifdef CONFIG_29BIT 120#if defined(CONFIG_29BIT)
136 output_addr |= P2SEG; 121 output_addr |= P2SEG;
137#endif 122#endif
138#endif 123#endif
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index 50aa0c1f76ea..bcb31ae84a51 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -55,25 +55,22 @@ static struct irq_chip hd64461_irq_chip = {
55 55
56static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc) 56static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
57{ 57{
58 unsigned short intv = ctrl_inw(HD64461_NIRR); 58 unsigned short intv = __raw_readw(HD64461_NIRR);
59 struct irq_desc *ext_desc;
60 unsigned int ext_irq = HD64461_IRQBASE; 59 unsigned int ext_irq = HD64461_IRQBASE;
61 60
62 intv &= (1 << HD64461_IRQ_NUM) - 1; 61 intv &= (1 << HD64461_IRQ_NUM) - 1;
63 62
64 while (intv) { 63 for (; intv; intv >>= 1, ext_irq++) {
65 if (intv & 1) { 64 if (!(intv & 1))
66 ext_desc = irq_desc + ext_irq; 65 continue;
67 handle_level_irq(ext_irq, ext_desc); 66
68 } 67 generic_handle_irq(ext_irq);
69 intv >>= 1;
70 ext_irq++;
71 } 68 }
72} 69}
73 70
74int __init setup_hd64461(void) 71int __init setup_hd64461(void)
75{ 72{
76 int i; 73 int i, nid = cpu_to_node(boot_cpu_data);
77 74
78 if (!MACH_HD64461) 75 if (!MACH_HD64461)
79 return 0; 76 return 0;
@@ -90,9 +87,26 @@ int __init setup_hd64461(void)
90 __raw_writew(0xffff, HD64461_NIMR); 87 __raw_writew(0xffff, HD64461_NIMR);
91 88
92 /* IRQ 80 -> 95 belongs to HD64461 */ 89 /* IRQ 80 -> 95 belongs to HD64461 */
93 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) 90 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
91 unsigned int irq;
92
93 irq = create_irq_nr(i, nid);
94 if (unlikely(irq == 0)) {
95 pr_err("%s: failed hooking irq %d for HD64461\n",
96 __func__, i);
97 return -EBUSY;
98 }
99
100 if (unlikely(irq != i)) {
101 pr_err("%s: got irq %d but wanted %d, bailing.\n",
102 __func__, irq, i);
103 destroy_irq(irq);
104 return -EINVAL;
105 }
106
94 set_irq_chip_and_handler(i, &hd64461_irq_chip, 107 set_irq_chip_and_handler(i, &hd64461_irq_chip,
95 handle_level_irq); 108 handle_level_irq);
109 }
96 110
97 set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux); 111 set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
98 set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW); 112 set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
diff --git a/arch/sh/configs/sdk7786_defconfig b/arch/sh/configs/sdk7786_defconfig
new file mode 100644
index 000000000000..9b331eab968e
--- /dev/null
+++ b/arch/sh/configs/sdk7786_defconfig
@@ -0,0 +1,1754 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc7
4# Tue Feb 9 15:27:06 2010
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8# CONFIG_SUPERH64 is not set
9CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_BUG=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
24CONFIG_SYS_SUPPORTS_SMP=y
25CONFIG_SYS_SUPPORTS_NUMA=y
26CONFIG_SYS_SUPPORTS_PCI=y
27CONFIG_SYS_SUPPORTS_TMU=y
28CONFIG_STACKTRACE_SUPPORT=y
29CONFIG_LOCKDEP_SUPPORT=y
30CONFIG_HAVE_LATENCYTOP_SUPPORT=y
31# CONFIG_ARCH_HAS_ILOG2_U32 is not set
32# CONFIG_ARCH_HAS_ILOG2_U64 is not set
33CONFIG_ARCH_NO_VIRT_TO_BUS=y
34CONFIG_ARCH_HAS_DEFAULT_IDLE=y
35CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
36CONFIG_DMA_COHERENT=y
37# CONFIG_DMA_NONCOHERENT is not set
38CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
39CONFIG_CONSTRUCTORS=y
40
41#
42# General setup
43#
44CONFIG_EXPERIMENTAL=y
45CONFIG_BROKEN_ON_SMP=y
46CONFIG_LOCK_KERNEL=y
47CONFIG_INIT_ENV_ARG_LIMIT=32
48CONFIG_LOCALVERSION=""
49CONFIG_LOCALVERSION_AUTO=y
50CONFIG_HAVE_KERNEL_GZIP=y
51CONFIG_HAVE_KERNEL_BZIP2=y
52CONFIG_HAVE_KERNEL_LZMA=y
53CONFIG_HAVE_KERNEL_LZO=y
54CONFIG_KERNEL_GZIP=y
55# CONFIG_KERNEL_BZIP2 is not set
56# CONFIG_KERNEL_LZMA is not set
57# CONFIG_KERNEL_LZO is not set
58CONFIG_SWAP=y
59CONFIG_SYSVIPC=y
60CONFIG_SYSVIPC_SYSCTL=y
61CONFIG_POSIX_MQUEUE=y
62CONFIG_POSIX_MQUEUE_SYSCTL=y
63CONFIG_BSD_PROCESS_ACCT=y
64# CONFIG_BSD_PROCESS_ACCT_V3 is not set
65# CONFIG_TASKSTATS is not set
66# CONFIG_AUDIT is not set
67
68#
69# RCU Subsystem
70#
71CONFIG_TREE_RCU=y
72# CONFIG_TREE_PREEMPT_RCU is not set
73# CONFIG_TINY_RCU is not set
74CONFIG_RCU_TRACE=y
75CONFIG_RCU_FANOUT=32
76# CONFIG_RCU_FANOUT_EXACT is not set
77CONFIG_TREE_RCU_TRACE=y
78CONFIG_IKCONFIG=y
79CONFIG_IKCONFIG_PROC=y
80CONFIG_LOG_BUF_SHIFT=14
81CONFIG_GROUP_SCHED=y
82CONFIG_FAIR_GROUP_SCHED=y
83CONFIG_RT_GROUP_SCHED=y
84CONFIG_USER_SCHED=y
85# CONFIG_CGROUP_SCHED is not set
86CONFIG_CGROUPS=y
87# CONFIG_CGROUP_DEBUG is not set
88CONFIG_CGROUP_NS=y
89CONFIG_CGROUP_FREEZER=y
90CONFIG_CGROUP_DEVICE=y
91# CONFIG_CPUSETS is not set
92CONFIG_CGROUP_CPUACCT=y
93CONFIG_RESOURCE_COUNTERS=y
94CONFIG_CGROUP_MEM_RES_CTLR=y
95# CONFIG_CGROUP_MEM_RES_CTLR_SWAP is not set
96CONFIG_MM_OWNER=y
97# CONFIG_SYSFS_DEPRECATED_V2 is not set
98# CONFIG_RELAY is not set
99CONFIG_NAMESPACES=y
100CONFIG_UTS_NS=y
101CONFIG_IPC_NS=y
102CONFIG_USER_NS=y
103CONFIG_PID_NS=y
104CONFIG_NET_NS=y
105# CONFIG_BLK_DEV_INITRD is not set
106CONFIG_CC_OPTIMIZE_FOR_SIZE=y
107CONFIG_SYSCTL=y
108CONFIG_ANON_INODES=y
109CONFIG_EMBEDDED=y
110CONFIG_UID16=y
111CONFIG_SYSCTL_SYSCALL=y
112CONFIG_KALLSYMS=y
113CONFIG_KALLSYMS_ALL=y
114# CONFIG_KALLSYMS_EXTRA_PASS is not set
115CONFIG_HOTPLUG=y
116CONFIG_PRINTK=y
117CONFIG_BUG=y
118CONFIG_ELF_CORE=y
119CONFIG_BASE_FULL=y
120CONFIG_FUTEX=y
121CONFIG_EPOLL=y
122CONFIG_SIGNALFD=y
123CONFIG_TIMERFD=y
124CONFIG_EVENTFD=y
125CONFIG_SHMEM=y
126CONFIG_AIO=y
127CONFIG_HAVE_PERF_EVENTS=y
128CONFIG_PERF_USE_VMALLOC=y
129
130#
131# Kernel Performance Events And Counters
132#
133CONFIG_PERF_EVENTS=y
134CONFIG_EVENT_PROFILE=y
135# CONFIG_PERF_COUNTERS is not set
136# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
137CONFIG_VM_EVENT_COUNTERS=y
138CONFIG_PCI_QUIRKS=y
139# CONFIG_COMPAT_BRK is not set
140CONFIG_SLAB=y
141# CONFIG_SLUB is not set
142# CONFIG_SLOB is not set
143CONFIG_PROFILING=y
144CONFIG_TRACEPOINTS=y
145# CONFIG_OPROFILE is not set
146CONFIG_HAVE_OPROFILE=y
147# CONFIG_KPROBES is not set
148CONFIG_HAVE_KPROBES=y
149CONFIG_HAVE_KRETPROBES=y
150CONFIG_HAVE_ARCH_TRACEHOOK=y
151CONFIG_HAVE_DMA_ATTRS=y
152CONFIG_HAVE_CLK=y
153CONFIG_HAVE_DMA_API_DEBUG=y
154CONFIG_HAVE_HW_BREAKPOINT=y
155
156#
157# GCOV-based kernel profiling
158#
159# CONFIG_GCOV_KERNEL is not set
160# CONFIG_SLOW_WORK is not set
161CONFIG_HAVE_GENERIC_DMA_COHERENT=y
162CONFIG_SLABINFO=y
163CONFIG_RT_MUTEXES=y
164CONFIG_BASE_SMALL=0
165CONFIG_MODULES=y
166# CONFIG_MODULE_FORCE_LOAD is not set
167CONFIG_MODULE_UNLOAD=y
168# CONFIG_MODULE_FORCE_UNLOAD is not set
169# CONFIG_MODVERSIONS is not set
170# CONFIG_MODULE_SRCVERSION_ALL is not set
171CONFIG_BLOCK=y
172# CONFIG_LBDAF is not set
173# CONFIG_BLK_DEV_BSG is not set
174# CONFIG_BLK_DEV_INTEGRITY is not set
175CONFIG_BLK_CGROUP=y
176# CONFIG_DEBUG_BLK_CGROUP is not set
177
178#
179# IO Schedulers
180#
181CONFIG_IOSCHED_NOOP=y
182CONFIG_IOSCHED_DEADLINE=y
183CONFIG_IOSCHED_CFQ=y
184CONFIG_CFQ_GROUP_IOSCHED=y
185# CONFIG_DEBUG_CFQ_IOSCHED is not set
186# CONFIG_DEFAULT_DEADLINE is not set
187CONFIG_DEFAULT_CFQ=y
188# CONFIG_DEFAULT_NOOP is not set
189CONFIG_DEFAULT_IOSCHED="cfq"
190# CONFIG_INLINE_SPIN_TRYLOCK is not set
191# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
192# CONFIG_INLINE_SPIN_LOCK is not set
193# CONFIG_INLINE_SPIN_LOCK_BH is not set
194# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
195# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
196# CONFIG_INLINE_SPIN_UNLOCK is not set
197# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
198# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
199# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
200# CONFIG_INLINE_READ_TRYLOCK is not set
201# CONFIG_INLINE_READ_LOCK is not set
202# CONFIG_INLINE_READ_LOCK_BH is not set
203# CONFIG_INLINE_READ_LOCK_IRQ is not set
204# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
205# CONFIG_INLINE_READ_UNLOCK is not set
206# CONFIG_INLINE_READ_UNLOCK_BH is not set
207# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
208# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
209# CONFIG_INLINE_WRITE_TRYLOCK is not set
210# CONFIG_INLINE_WRITE_LOCK is not set
211# CONFIG_INLINE_WRITE_LOCK_BH is not set
212# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
213# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
214# CONFIG_INLINE_WRITE_UNLOCK is not set
215# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
216# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
217# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
218# CONFIG_MUTEX_SPIN_ON_OWNER is not set
219CONFIG_FREEZER=y
220
221#
222# System type
223#
224CONFIG_CPU_SH4=y
225CONFIG_CPU_SH4A=y
226CONFIG_CPU_SHX3=y
227# CONFIG_CPU_SUBTYPE_SH7619 is not set
228# CONFIG_CPU_SUBTYPE_SH7201 is not set
229# CONFIG_CPU_SUBTYPE_SH7203 is not set
230# CONFIG_CPU_SUBTYPE_SH7206 is not set
231# CONFIG_CPU_SUBTYPE_SH7263 is not set
232# CONFIG_CPU_SUBTYPE_MXG is not set
233# CONFIG_CPU_SUBTYPE_SH7705 is not set
234# CONFIG_CPU_SUBTYPE_SH7706 is not set
235# CONFIG_CPU_SUBTYPE_SH7707 is not set
236# CONFIG_CPU_SUBTYPE_SH7708 is not set
237# CONFIG_CPU_SUBTYPE_SH7709 is not set
238# CONFIG_CPU_SUBTYPE_SH7710 is not set
239# CONFIG_CPU_SUBTYPE_SH7712 is not set
240# CONFIG_CPU_SUBTYPE_SH7720 is not set
241# CONFIG_CPU_SUBTYPE_SH7721 is not set
242# CONFIG_CPU_SUBTYPE_SH7750 is not set
243# CONFIG_CPU_SUBTYPE_SH7091 is not set
244# CONFIG_CPU_SUBTYPE_SH7750R is not set
245# CONFIG_CPU_SUBTYPE_SH7750S is not set
246# CONFIG_CPU_SUBTYPE_SH7751 is not set
247# CONFIG_CPU_SUBTYPE_SH7751R is not set
248# CONFIG_CPU_SUBTYPE_SH7760 is not set
249# CONFIG_CPU_SUBTYPE_SH4_202 is not set
250# CONFIG_CPU_SUBTYPE_SH7723 is not set
251# CONFIG_CPU_SUBTYPE_SH7724 is not set
252# CONFIG_CPU_SUBTYPE_SH7757 is not set
253# CONFIG_CPU_SUBTYPE_SH7763 is not set
254# CONFIG_CPU_SUBTYPE_SH7770 is not set
255# CONFIG_CPU_SUBTYPE_SH7780 is not set
256# CONFIG_CPU_SUBTYPE_SH7785 is not set
257CONFIG_CPU_SUBTYPE_SH7786=y
258# CONFIG_CPU_SUBTYPE_SHX3 is not set
259# CONFIG_CPU_SUBTYPE_SH7343 is not set
260# CONFIG_CPU_SUBTYPE_SH7722 is not set
261# CONFIG_CPU_SUBTYPE_SH7366 is not set
262
263#
264# Memory management options
265#
266CONFIG_QUICKLIST=y
267CONFIG_MMU=y
268CONFIG_PAGE_OFFSET=0x80000000
269CONFIG_FORCE_MAX_ZONEORDER=11
270CONFIG_MEMORY_START=0x60000000
271CONFIG_MEMORY_SIZE=0x20000000
272# CONFIG_29BIT is not set
273CONFIG_32BIT=y
274CONFIG_PMB=y
275# CONFIG_PMB_LEGACY is not set
276CONFIG_X2TLB=y
277CONFIG_VSYSCALL=y
278# CONFIG_NUMA is not set
279CONFIG_ARCH_FLATMEM_ENABLE=y
280CONFIG_ARCH_SPARSEMEM_ENABLE=y
281CONFIG_ARCH_SPARSEMEM_DEFAULT=y
282CONFIG_MAX_ACTIVE_REGIONS=1
283CONFIG_ARCH_POPULATES_NODE_MAP=y
284CONFIG_ARCH_SELECT_MEMORY_MODEL=y
285CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
286CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
287CONFIG_ARCH_MEMORY_PROBE=y
288CONFIG_IOREMAP_FIXED=y
289CONFIG_PAGE_SIZE_4KB=y
290# CONFIG_PAGE_SIZE_8KB is not set
291# CONFIG_PAGE_SIZE_16KB is not set
292# CONFIG_PAGE_SIZE_64KB is not set
293# CONFIG_HUGETLB_PAGE_SIZE_64K is not set
294# CONFIG_HUGETLB_PAGE_SIZE_256K is not set
295CONFIG_HUGETLB_PAGE_SIZE_1MB=y
296# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
297# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
298# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
299CONFIG_SELECT_MEMORY_MODEL=y
300# CONFIG_FLATMEM_MANUAL is not set
301# CONFIG_DISCONTIGMEM_MANUAL is not set
302CONFIG_SPARSEMEM_MANUAL=y
303CONFIG_SPARSEMEM=y
304CONFIG_HAVE_MEMORY_PRESENT=y
305CONFIG_SPARSEMEM_STATIC=y
306CONFIG_MEMORY_HOTPLUG=y
307CONFIG_MEMORY_HOTPLUG_SPARSE=y
308CONFIG_MEMORY_HOTREMOVE=y
309CONFIG_SPLIT_PTLOCK_CPUS=4
310CONFIG_MIGRATION=y
311# CONFIG_PHYS_ADDR_T_64BIT is not set
312CONFIG_ZONE_DMA_FLAG=0
313CONFIG_NR_QUICK=1
314CONFIG_KSM=y
315CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
316
317#
318# Cache configuration
319#
320CONFIG_CACHE_WRITEBACK=y
321# CONFIG_CACHE_WRITETHROUGH is not set
322# CONFIG_CACHE_OFF is not set
323
324#
325# Processor features
326#
327CONFIG_CPU_LITTLE_ENDIAN=y
328# CONFIG_CPU_BIG_ENDIAN is not set
329CONFIG_SH_FPU=y
330CONFIG_SH_STORE_QUEUES=y
331CONFIG_CPU_HAS_INTEVT=y
332CONFIG_CPU_HAS_SR_RB=y
333CONFIG_CPU_HAS_PTEAEX=y
334CONFIG_CPU_HAS_FPU=y
335
336#
337# Board support
338#
339CONFIG_SH_SDK7786=y
340# CONFIG_SH_URQUELL is not set
341
342#
343# Timer and clock configuration
344#
345CONFIG_SH_TIMER_TMU=y
346CONFIG_SH_CLK_CPG=y
347CONFIG_TICK_ONESHOT=y
348CONFIG_NO_HZ=y
349CONFIG_HIGH_RES_TIMERS=y
350CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
351
352#
353# CPU Frequency scaling
354#
355CONFIG_CPU_FREQ=y
356CONFIG_CPU_FREQ_TABLE=y
357# CONFIG_CPU_FREQ_DEBUG is not set
358CONFIG_CPU_FREQ_STAT=y
359# CONFIG_CPU_FREQ_STAT_DETAILS is not set
360CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
361# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
362# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
363# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
364# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
365CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
366CONFIG_CPU_FREQ_GOV_POWERSAVE=m
367CONFIG_CPU_FREQ_GOV_USERSPACE=m
368CONFIG_CPU_FREQ_GOV_ONDEMAND=m
369CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
370CONFIG_SH_CPU_FREQ=y
371
372#
373# DMA support
374#
375# CONFIG_SH_DMA is not set
376
377#
378# Companion Chips
379#
380
381#
382# Additional SuperH Device Drivers
383#
384CONFIG_HEARTBEAT=y
385# CONFIG_PUSH_SWITCH is not set
386
387#
388# Kernel features
389#
390# CONFIG_HZ_100 is not set
391CONFIG_HZ_250=y
392# CONFIG_HZ_300 is not set
393# CONFIG_HZ_1000 is not set
394CONFIG_HZ=250
395CONFIG_SCHED_HRTICK=y
396CONFIG_KEXEC=y
397# CONFIG_CRASH_DUMP is not set
398CONFIG_SECCOMP=y
399# CONFIG_SMP is not set
400# CONFIG_PREEMPT_NONE is not set
401# CONFIG_PREEMPT_VOLUNTARY is not set
402CONFIG_PREEMPT=y
403CONFIG_GUSA=y
404
405#
406# Boot options
407#
408CONFIG_ZERO_PAGE_OFFSET=0x00001000
409CONFIG_BOOT_LINK_OFFSET=0x00800000
410CONFIG_ENTRY_OFFSET=0x00001000
411CONFIG_CMDLINE_OVERWRITE=y
412# CONFIG_CMDLINE_EXTEND is not set
413CONFIG_CMDLINE="console=ttySC1,115200 earlyprintk=sh-sci.1,115200 root=/dev/sda1 nmi_debug=state,debounce rootdelay=10"
414
415#
416# Bus options
417#
418CONFIG_PCI=y
419CONFIG_PCI_DOMAINS=y
420CONFIG_PCIEPORTBUS=y
421CONFIG_PCIEAER=y
422# CONFIG_PCIE_ECRC is not set
423CONFIG_PCIEAER_INJECT=y
424CONFIG_PCIEASPM=y
425CONFIG_PCIEASPM_DEBUG=y
426# CONFIG_ARCH_SUPPORTS_MSI is not set
427# CONFIG_PCI_LEGACY is not set
428CONFIG_PCI_DEBUG=y
429# CONFIG_PCI_STUB is not set
430# CONFIG_PCI_IOV is not set
431# CONFIG_PCCARD is not set
432# CONFIG_HOTPLUG_PCI is not set
433
434#
435# Executable file formats
436#
437CONFIG_BINFMT_ELF=y
438# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
439# CONFIG_HAVE_AOUT is not set
440CONFIG_BINFMT_MISC=y
441
442#
443# Power management options (EXPERIMENTAL)
444#
445CONFIG_PM=y
446CONFIG_PM_DEBUG=y
447CONFIG_PM_VERBOSE=y
448# CONFIG_HIBERNATION is not set
449CONFIG_PM_RUNTIME=y
450CONFIG_CPU_IDLE=y
451CONFIG_CPU_IDLE_GOV_LADDER=y
452CONFIG_CPU_IDLE_GOV_MENU=y
453CONFIG_NET=y
454
455#
456# Networking options
457#
458CONFIG_PACKET=y
459CONFIG_PACKET_MMAP=y
460CONFIG_UNIX=y
461CONFIG_XFRM=y
462# CONFIG_XFRM_USER is not set
463# CONFIG_XFRM_SUB_POLICY is not set
464# CONFIG_XFRM_MIGRATE is not set
465# CONFIG_XFRM_STATISTICS is not set
466CONFIG_NET_KEY=y
467# CONFIG_NET_KEY_MIGRATE is not set
468CONFIG_INET=y
469# CONFIG_IP_MULTICAST is not set
470# CONFIG_IP_ADVANCED_ROUTER is not set
471CONFIG_IP_FIB_HASH=y
472CONFIG_IP_PNP=y
473CONFIG_IP_PNP_DHCP=y
474# CONFIG_IP_PNP_BOOTP is not set
475# CONFIG_IP_PNP_RARP is not set
476# CONFIG_NET_IPIP is not set
477# CONFIG_NET_IPGRE is not set
478# CONFIG_ARPD is not set
479# CONFIG_SYN_COOKIES is not set
480# CONFIG_INET_AH is not set
481# CONFIG_INET_ESP is not set
482# CONFIG_INET_IPCOMP is not set
483# CONFIG_INET_XFRM_TUNNEL is not set
484# CONFIG_INET_TUNNEL is not set
485CONFIG_INET_XFRM_MODE_TRANSPORT=y
486CONFIG_INET_XFRM_MODE_TUNNEL=y
487CONFIG_INET_XFRM_MODE_BEET=y
488# CONFIG_INET_LRO is not set
489CONFIG_INET_DIAG=y
490CONFIG_INET_TCP_DIAG=y
491# CONFIG_TCP_CONG_ADVANCED is not set
492CONFIG_TCP_CONG_CUBIC=y
493CONFIG_DEFAULT_TCP_CONG="cubic"
494# CONFIG_TCP_MD5SIG is not set
495# CONFIG_IPV6 is not set
496# CONFIG_NETWORK_SECMARK is not set
497# CONFIG_NETFILTER is not set
498# CONFIG_IP_DCCP is not set
499# CONFIG_IP_SCTP is not set
500# CONFIG_RDS is not set
501# CONFIG_TIPC is not set
502# CONFIG_ATM is not set
503# CONFIG_BRIDGE is not set
504# CONFIG_NET_DSA is not set
505# CONFIG_VLAN_8021Q is not set
506# CONFIG_DECNET is not set
507# CONFIG_LLC2 is not set
508# CONFIG_IPX is not set
509# CONFIG_ATALK is not set
510# CONFIG_X25 is not set
511# CONFIG_LAPB is not set
512# CONFIG_ECONET is not set
513# CONFIG_WAN_ROUTER is not set
514# CONFIG_PHONET is not set
515# CONFIG_IEEE802154 is not set
516# CONFIG_NET_SCHED is not set
517# CONFIG_DCB is not set
518
519#
520# Network testing
521#
522# CONFIG_NET_PKTGEN is not set
523# CONFIG_NET_DROP_MONITOR is not set
524# CONFIG_HAMRADIO is not set
525# CONFIG_CAN is not set
526# CONFIG_IRDA is not set
527# CONFIG_BT is not set
528# CONFIG_AF_RXRPC is not set
529CONFIG_WIRELESS=y
530# CONFIG_CFG80211 is not set
531# CONFIG_LIB80211 is not set
532
533#
534# CFG80211 needs to be enabled for MAC80211
535#
536# CONFIG_WIMAX is not set
537# CONFIG_RFKILL is not set
538# CONFIG_NET_9P is not set
539
540#
541# Device Drivers
542#
543
544#
545# Generic Driver Options
546#
547CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
548# CONFIG_DEVTMPFS is not set
549CONFIG_STANDALONE=y
550CONFIG_PREVENT_FIRMWARE_BUILD=y
551# CONFIG_FW_LOADER is not set
552# CONFIG_DEBUG_DRIVER is not set
553# CONFIG_DEBUG_DEVRES is not set
554# CONFIG_SYS_HYPERVISOR is not set
555# CONFIG_CONNECTOR is not set
556# CONFIG_MTD is not set
557# CONFIG_PARPORT is not set
558CONFIG_BLK_DEV=y
559# CONFIG_BLK_CPQ_CISS_DA is not set
560# CONFIG_BLK_DEV_DAC960 is not set
561# CONFIG_BLK_DEV_UMEM is not set
562# CONFIG_BLK_DEV_COW_COMMON is not set
563# CONFIG_BLK_DEV_LOOP is not set
564
565#
566# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
567#
568# CONFIG_BLK_DEV_NBD is not set
569# CONFIG_BLK_DEV_SX8 is not set
570# CONFIG_BLK_DEV_UB is not set
571CONFIG_BLK_DEV_RAM=y
572CONFIG_BLK_DEV_RAM_COUNT=16
573CONFIG_BLK_DEV_RAM_SIZE=4096
574# CONFIG_BLK_DEV_XIP is not set
575# CONFIG_CDROM_PKTCDVD is not set
576# CONFIG_ATA_OVER_ETH is not set
577# CONFIG_BLK_DEV_HD is not set
578CONFIG_MISC_DEVICES=y
579# CONFIG_AD525X_DPOT is not set
580# CONFIG_PHANTOM is not set
581# CONFIG_SGI_IOC4 is not set
582# CONFIG_TIFM_CORE is not set
583# CONFIG_ICS932S401 is not set
584# CONFIG_ENCLOSURE_SERVICES is not set
585# CONFIG_HP_ILO is not set
586# CONFIG_ISL29003 is not set
587# CONFIG_DS1682 is not set
588# CONFIG_TI_DAC7512 is not set
589# CONFIG_C2PORT is not set
590
591#
592# EEPROM support
593#
594# CONFIG_EEPROM_AT24 is not set
595# CONFIG_EEPROM_AT25 is not set
596# CONFIG_EEPROM_LEGACY is not set
597# CONFIG_EEPROM_MAX6875 is not set
598# CONFIG_EEPROM_93CX6 is not set
599# CONFIG_CB710_CORE is not set
600CONFIG_HAVE_IDE=y
601# CONFIG_IDE is not set
602
603#
604# SCSI device support
605#
606# CONFIG_RAID_ATTRS is not set
607CONFIG_SCSI=y
608CONFIG_SCSI_DMA=y
609# CONFIG_SCSI_TGT is not set
610# CONFIG_SCSI_NETLINK is not set
611CONFIG_SCSI_PROC_FS=y
612
613#
614# SCSI support type (disk, tape, CD-ROM)
615#
616CONFIG_BLK_DEV_SD=y
617# CONFIG_CHR_DEV_ST is not set
618# CONFIG_CHR_DEV_OSST is not set
619# CONFIG_BLK_DEV_SR is not set
620# CONFIG_CHR_DEV_SG is not set
621# CONFIG_CHR_DEV_SCH is not set
622# CONFIG_SCSI_MULTI_LUN is not set
623# CONFIG_SCSI_CONSTANTS is not set
624# CONFIG_SCSI_LOGGING is not set
625# CONFIG_SCSI_SCAN_ASYNC is not set
626CONFIG_SCSI_WAIT_SCAN=m
627
628#
629# SCSI Transports
630#
631# CONFIG_SCSI_SPI_ATTRS is not set
632# CONFIG_SCSI_FC_ATTRS is not set
633# CONFIG_SCSI_ISCSI_ATTRS is not set
634# CONFIG_SCSI_SAS_LIBSAS is not set
635# CONFIG_SCSI_SRP_ATTRS is not set
636CONFIG_SCSI_LOWLEVEL=y
637# CONFIG_ISCSI_TCP is not set
638# CONFIG_SCSI_BNX2_ISCSI is not set
639# CONFIG_BE2ISCSI is not set
640# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
641# CONFIG_SCSI_HPSA is not set
642# CONFIG_SCSI_3W_9XXX is not set
643# CONFIG_SCSI_3W_SAS is not set
644# CONFIG_SCSI_ACARD is not set
645# CONFIG_SCSI_AACRAID is not set
646# CONFIG_SCSI_AIC7XXX is not set
647# CONFIG_SCSI_AIC7XXX_OLD is not set
648# CONFIG_SCSI_AIC79XX is not set
649# CONFIG_SCSI_AIC94XX is not set
650# CONFIG_SCSI_MVSAS is not set
651# CONFIG_SCSI_ARCMSR is not set
652# CONFIG_MEGARAID_NEWGEN is not set
653# CONFIG_MEGARAID_LEGACY is not set
654# CONFIG_MEGARAID_SAS is not set
655# CONFIG_SCSI_MPT2SAS is not set
656# CONFIG_SCSI_HPTIOP is not set
657# CONFIG_LIBFC is not set
658# CONFIG_LIBFCOE is not set
659# CONFIG_FCOE is not set
660# CONFIG_SCSI_DMX3191D is not set
661# CONFIG_SCSI_FUTURE_DOMAIN is not set
662# CONFIG_SCSI_IPS is not set
663# CONFIG_SCSI_INITIO is not set
664# CONFIG_SCSI_INIA100 is not set
665# CONFIG_SCSI_STEX is not set
666# CONFIG_SCSI_SYM53C8XX_2 is not set
667# CONFIG_SCSI_IPR is not set
668# CONFIG_SCSI_QLOGIC_1280 is not set
669# CONFIG_SCSI_QLA_FC is not set
670# CONFIG_SCSI_QLA_ISCSI is not set
671# CONFIG_SCSI_LPFC is not set
672# CONFIG_SCSI_DC395x is not set
673# CONFIG_SCSI_DC390T is not set
674# CONFIG_SCSI_NSP32 is not set
675# CONFIG_SCSI_DEBUG is not set
676# CONFIG_SCSI_PMCRAID is not set
677# CONFIG_SCSI_PM8001 is not set
678# CONFIG_SCSI_SRP is not set
679# CONFIG_SCSI_BFA_FC is not set
680# CONFIG_SCSI_DH is not set
681# CONFIG_SCSI_OSD_INITIATOR is not set
682CONFIG_ATA=y
683# CONFIG_ATA_NONSTANDARD is not set
684CONFIG_ATA_VERBOSE_ERROR=y
685CONFIG_SATA_PMP=y
686# CONFIG_SATA_AHCI is not set
687CONFIG_SATA_SIL24=y
688CONFIG_ATA_SFF=y
689# CONFIG_SATA_SVW is not set
690# CONFIG_ATA_PIIX is not set
691# CONFIG_SATA_MV is not set
692# CONFIG_SATA_NV is not set
693# CONFIG_PDC_ADMA is not set
694# CONFIG_SATA_QSTOR is not set
695# CONFIG_SATA_PROMISE is not set
696# CONFIG_SATA_SX4 is not set
697# CONFIG_SATA_SIL is not set
698# CONFIG_SATA_SIS is not set
699# CONFIG_SATA_ULI is not set
700# CONFIG_SATA_VIA is not set
701# CONFIG_SATA_VITESSE is not set
702# CONFIG_SATA_INIC162X is not set
703# CONFIG_PATA_ALI is not set
704# CONFIG_PATA_AMD is not set
705# CONFIG_PATA_ARTOP is not set
706# CONFIG_PATA_ATP867X is not set
707# CONFIG_PATA_ATIIXP is not set
708# CONFIG_PATA_CMD640_PCI is not set
709# CONFIG_PATA_CMD64X is not set
710# CONFIG_PATA_CS5520 is not set
711# CONFIG_PATA_CS5530 is not set
712# CONFIG_PATA_CYPRESS is not set
713# CONFIG_PATA_EFAR is not set
714# CONFIG_ATA_GENERIC is not set
715# CONFIG_PATA_HPT366 is not set
716# CONFIG_PATA_HPT37X is not set
717# CONFIG_PATA_HPT3X2N is not set
718# CONFIG_PATA_HPT3X3 is not set
719# CONFIG_PATA_IT821X is not set
720# CONFIG_PATA_IT8213 is not set
721# CONFIG_PATA_JMICRON is not set
722# CONFIG_PATA_TRIFLEX is not set
723# CONFIG_PATA_MARVELL is not set
724# CONFIG_PATA_MPIIX is not set
725# CONFIG_PATA_OLDPIIX is not set
726# CONFIG_PATA_NETCELL is not set
727# CONFIG_PATA_NINJA32 is not set
728# CONFIG_PATA_NS87410 is not set
729# CONFIG_PATA_NS87415 is not set
730# CONFIG_PATA_OPTI is not set
731# CONFIG_PATA_OPTIDMA is not set
732# CONFIG_PATA_PDC2027X is not set
733# CONFIG_PATA_PDC_OLD is not set
734# CONFIG_PATA_RADISYS is not set
735# CONFIG_PATA_RDC is not set
736# CONFIG_PATA_RZ1000 is not set
737# CONFIG_PATA_SC1200 is not set
738# CONFIG_PATA_SERVERWORKS is not set
739# CONFIG_PATA_SIL680 is not set
740# CONFIG_PATA_SIS is not set
741# CONFIG_PATA_TOSHIBA is not set
742# CONFIG_PATA_VIA is not set
743# CONFIG_PATA_WINBOND is not set
744CONFIG_PATA_PLATFORM=y
745# CONFIG_PATA_SCH is not set
746# CONFIG_MD is not set
747# CONFIG_FUSION is not set
748
749#
750# IEEE 1394 (FireWire) support
751#
752
753#
754# You can enable one or both FireWire driver stacks.
755#
756
757#
758# The newer stack is recommended.
759#
760# CONFIG_FIREWIRE is not set
761# CONFIG_IEEE1394 is not set
762# CONFIG_I2O is not set
763CONFIG_NETDEVICES=y
764# CONFIG_DUMMY is not set
765# CONFIG_BONDING is not set
766# CONFIG_MACVLAN is not set
767# CONFIG_EQUALIZER is not set
768# CONFIG_TUN is not set
769# CONFIG_VETH is not set
770# CONFIG_ARCNET is not set
771CONFIG_PHYLIB=y
772
773#
774# MII PHY device drivers
775#
776# CONFIG_MARVELL_PHY is not set
777# CONFIG_DAVICOM_PHY is not set
778# CONFIG_QSEMI_PHY is not set
779# CONFIG_LXT_PHY is not set
780# CONFIG_CICADA_PHY is not set
781# CONFIG_VITESSE_PHY is not set
782# CONFIG_SMSC_PHY is not set
783# CONFIG_BROADCOM_PHY is not set
784# CONFIG_ICPLUS_PHY is not set
785# CONFIG_REALTEK_PHY is not set
786# CONFIG_NATIONAL_PHY is not set
787# CONFIG_STE10XP is not set
788# CONFIG_LSI_ET1011C_PHY is not set
789# CONFIG_FIXED_PHY is not set
790CONFIG_MDIO_BITBANG=y
791CONFIG_NET_ETHERNET=y
792CONFIG_MII=y
793# CONFIG_AX88796 is not set
794# CONFIG_STNIC is not set
795# CONFIG_HAPPYMEAL is not set
796# CONFIG_SUNGEM is not set
797# CONFIG_CASSINI is not set
798# CONFIG_NET_VENDOR_3COM is not set
799CONFIG_SMC91X=y
800# CONFIG_ENC28J60 is not set
801# CONFIG_ETHOC is not set
802# CONFIG_SMC911X is not set
803CONFIG_SMSC911X=y
804# CONFIG_DNET is not set
805# CONFIG_NET_TULIP is not set
806# CONFIG_HP100 is not set
807# CONFIG_IBM_NEW_EMAC_ZMII is not set
808# CONFIG_IBM_NEW_EMAC_RGMII is not set
809# CONFIG_IBM_NEW_EMAC_TAH is not set
810# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
811# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
812# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
813# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
814# CONFIG_NET_PCI is not set
815# CONFIG_B44 is not set
816# CONFIG_KS8842 is not set
817# CONFIG_KS8851 is not set
818# CONFIG_KS8851_MLL is not set
819# CONFIG_ATL2 is not set
820# CONFIG_NETDEV_1000 is not set
821# CONFIG_NETDEV_10000 is not set
822# CONFIG_TR is not set
823CONFIG_WLAN=y
824# CONFIG_ATMEL is not set
825# CONFIG_PRISM54 is not set
826# CONFIG_USB_ZD1201 is not set
827# CONFIG_HOSTAP is not set
828
829#
830# Enable WiMAX (Networking options) to see the WiMAX drivers
831#
832
833#
834# USB Network Adapters
835#
836# CONFIG_USB_CATC is not set
837# CONFIG_USB_KAWETH is not set
838# CONFIG_USB_PEGASUS is not set
839# CONFIG_USB_RTL8150 is not set
840# CONFIG_USB_USBNET is not set
841# CONFIG_WAN is not set
842# CONFIG_FDDI is not set
843# CONFIG_HIPPI is not set
844# CONFIG_PPP is not set
845# CONFIG_SLIP is not set
846# CONFIG_NET_FC is not set
847# CONFIG_NETCONSOLE is not set
848# CONFIG_NETPOLL is not set
849# CONFIG_NET_POLL_CONTROLLER is not set
850# CONFIG_VMXNET3 is not set
851# CONFIG_ISDN is not set
852# CONFIG_PHONE is not set
853
854#
855# Input device support
856#
857CONFIG_INPUT=y
858# CONFIG_INPUT_FF_MEMLESS is not set
859# CONFIG_INPUT_POLLDEV is not set
860# CONFIG_INPUT_SPARSEKMAP is not set
861
862#
863# Userland interfaces
864#
865CONFIG_INPUT_MOUSEDEV=y
866CONFIG_INPUT_MOUSEDEV_PSAUX=y
867CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
868CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
869# CONFIG_INPUT_JOYDEV is not set
870# CONFIG_INPUT_EVDEV is not set
871# CONFIG_INPUT_EVBUG is not set
872
873#
874# Input Device Drivers
875#
876CONFIG_INPUT_KEYBOARD=y
877# CONFIG_KEYBOARD_ADP5588 is not set
878CONFIG_KEYBOARD_ATKBD=y
879# CONFIG_QT2160 is not set
880# CONFIG_KEYBOARD_LKKBD is not set
881# CONFIG_KEYBOARD_MAX7359 is not set
882# CONFIG_KEYBOARD_NEWTON is not set
883# CONFIG_KEYBOARD_OPENCORES is not set
884# CONFIG_KEYBOARD_STOWAWAY is not set
885# CONFIG_KEYBOARD_SUNKBD is not set
886# CONFIG_KEYBOARD_SH_KEYSC is not set
887# CONFIG_KEYBOARD_XTKBD is not set
888CONFIG_INPUT_MOUSE=y
889CONFIG_MOUSE_PS2=y
890CONFIG_MOUSE_PS2_ALPS=y
891CONFIG_MOUSE_PS2_LOGIPS2PP=y
892CONFIG_MOUSE_PS2_SYNAPTICS=y
893CONFIG_MOUSE_PS2_TRACKPOINT=y
894# CONFIG_MOUSE_PS2_ELANTECH is not set
895# CONFIG_MOUSE_PS2_SENTELIC is not set
896# CONFIG_MOUSE_PS2_TOUCHKIT is not set
897# CONFIG_MOUSE_SERIAL is not set
898# CONFIG_MOUSE_APPLETOUCH is not set
899# CONFIG_MOUSE_BCM5974 is not set
900# CONFIG_MOUSE_VSXXXAA is not set
901# CONFIG_MOUSE_SYNAPTICS_I2C is not set
902# CONFIG_INPUT_JOYSTICK is not set
903# CONFIG_INPUT_TABLET is not set
904# CONFIG_INPUT_TOUCHSCREEN is not set
905# CONFIG_INPUT_MISC is not set
906
907#
908# Hardware I/O ports
909#
910CONFIG_SERIO=y
911CONFIG_SERIO_I8042=y
912CONFIG_SERIO_SERPORT=y
913# CONFIG_SERIO_PCIPS2 is not set
914CONFIG_SERIO_LIBPS2=y
915# CONFIG_SERIO_RAW is not set
916# CONFIG_SERIO_ALTERA_PS2 is not set
917# CONFIG_GAMEPORT is not set
918
919#
920# Character devices
921#
922CONFIG_VT=y
923CONFIG_CONSOLE_TRANSLATIONS=y
924CONFIG_VT_CONSOLE=y
925CONFIG_HW_CONSOLE=y
926# CONFIG_VT_HW_CONSOLE_BINDING is not set
927CONFIG_DEVKMEM=y
928# CONFIG_SERIAL_NONSTANDARD is not set
929# CONFIG_NOZOMI is not set
930
931#
932# Serial drivers
933#
934# CONFIG_SERIAL_8250 is not set
935
936#
937# Non-8250 serial port support
938#
939# CONFIG_SERIAL_MAX3100 is not set
940CONFIG_SERIAL_SH_SCI=y
941CONFIG_SERIAL_SH_SCI_NR_UARTS=6
942CONFIG_SERIAL_SH_SCI_CONSOLE=y
943CONFIG_SERIAL_CORE=y
944CONFIG_SERIAL_CORE_CONSOLE=y
945# CONFIG_SERIAL_JSM is not set
946CONFIG_UNIX98_PTYS=y
947# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
948# CONFIG_LEGACY_PTYS is not set
949# CONFIG_IPMI_HANDLER is not set
950# CONFIG_HW_RANDOM is not set
951# CONFIG_R3964 is not set
952# CONFIG_APPLICOM is not set
953# CONFIG_RAW_DRIVER is not set
954# CONFIG_TCG_TPM is not set
955CONFIG_DEVPORT=y
956CONFIG_I2C=y
957CONFIG_I2C_BOARDINFO=y
958# CONFIG_I2C_COMPAT is not set
959CONFIG_I2C_CHARDEV=y
960CONFIG_I2C_HELPER_AUTO=y
961
962#
963# I2C Hardware Bus support
964#
965
966#
967# PC SMBus host controller drivers
968#
969# CONFIG_I2C_ALI1535 is not set
970# CONFIG_I2C_ALI1563 is not set
971# CONFIG_I2C_ALI15X3 is not set
972# CONFIG_I2C_AMD756 is not set
973# CONFIG_I2C_AMD8111 is not set
974# CONFIG_I2C_I801 is not set
975# CONFIG_I2C_ISCH is not set
976# CONFIG_I2C_PIIX4 is not set
977# CONFIG_I2C_NFORCE2 is not set
978# CONFIG_I2C_SIS5595 is not set
979# CONFIG_I2C_SIS630 is not set
980# CONFIG_I2C_SIS96X is not set
981# CONFIG_I2C_VIA is not set
982# CONFIG_I2C_VIAPRO is not set
983
984#
985# I2C system bus drivers (mostly embedded / system-on-chip)
986#
987# CONFIG_I2C_DESIGNWARE is not set
988# CONFIG_I2C_OCORES is not set
989# CONFIG_I2C_SH_MOBILE is not set
990# CONFIG_I2C_SIMTEC is not set
991
992#
993# External I2C/SMBus adapter drivers
994#
995# CONFIG_I2C_PARPORT_LIGHT is not set
996# CONFIG_I2C_TAOS_EVM is not set
997# CONFIG_I2C_TINY_USB is not set
998
999#
1000# Other I2C/SMBus bus drivers
1001#
1002# CONFIG_I2C_PCA_PLATFORM is not set
1003# CONFIG_I2C_STUB is not set
1004
1005#
1006# Miscellaneous I2C Chip support
1007#
1008# CONFIG_SENSORS_TSL2550 is not set
1009# CONFIG_I2C_DEBUG_CORE is not set
1010# CONFIG_I2C_DEBUG_ALGO is not set
1011# CONFIG_I2C_DEBUG_BUS is not set
1012# CONFIG_I2C_DEBUG_CHIP is not set
1013CONFIG_SPI=y
1014# CONFIG_SPI_DEBUG is not set
1015CONFIG_SPI_MASTER=y
1016
1017#
1018# SPI Master Controller Drivers
1019#
1020# CONFIG_SPI_BITBANG is not set
1021# CONFIG_SPI_SH_MSIOF is not set
1022# CONFIG_SPI_SH_SCI is not set
1023# CONFIG_SPI_XILINX is not set
1024# CONFIG_SPI_DESIGNWARE is not set
1025
1026#
1027# SPI Protocol Masters
1028#
1029# CONFIG_SPI_SPIDEV is not set
1030# CONFIG_SPI_TLE62X0 is not set
1031
1032#
1033# PPS support
1034#
1035# CONFIG_PPS is not set
1036# CONFIG_W1 is not set
1037# CONFIG_POWER_SUPPLY is not set
1038# CONFIG_HWMON is not set
1039# CONFIG_THERMAL is not set
1040CONFIG_WATCHDOG=y
1041# CONFIG_WATCHDOG_NOWAYOUT is not set
1042
1043#
1044# Watchdog Device Drivers
1045#
1046# CONFIG_SOFT_WATCHDOG is not set
1047# CONFIG_ALIM7101_WDT is not set
1048# CONFIG_SH_WDT is not set
1049
1050#
1051# PCI-based Watchdog Cards
1052#
1053# CONFIG_PCIPCWATCHDOG is not set
1054# CONFIG_WDTPCI is not set
1055
1056#
1057# USB-based Watchdog Cards
1058#
1059# CONFIG_USBPCWATCHDOG is not set
1060CONFIG_SSB_POSSIBLE=y
1061
1062#
1063# Sonics Silicon Backplane
1064#
1065# CONFIG_SSB is not set
1066
1067#
1068# Multifunction device drivers
1069#
1070# CONFIG_MFD_CORE is not set
1071# CONFIG_MFD_SM501 is not set
1072# CONFIG_MFD_SH_MOBILE_SDHI is not set
1073# CONFIG_HTC_PASIC3 is not set
1074# CONFIG_TWL4030_CORE is not set
1075# CONFIG_MFD_TMIO is not set
1076# CONFIG_PMIC_DA903X is not set
1077# CONFIG_PMIC_ADP5520 is not set
1078# CONFIG_MFD_WM8400 is not set
1079# CONFIG_MFD_WM831X is not set
1080# CONFIG_MFD_WM8350_I2C is not set
1081# CONFIG_MFD_PCF50633 is not set
1082# CONFIG_MFD_MC13783 is not set
1083# CONFIG_AB3100_CORE is not set
1084# CONFIG_EZX_PCAP is not set
1085# CONFIG_MFD_88PM8607 is not set
1086# CONFIG_AB4500_CORE is not set
1087# CONFIG_REGULATOR is not set
1088# CONFIG_MEDIA_SUPPORT is not set
1089
1090#
1091# Graphics support
1092#
1093CONFIG_VGA_ARB=y
1094# CONFIG_DRM is not set
1095# CONFIG_VGASTATE is not set
1096CONFIG_VIDEO_OUTPUT_CONTROL=m
1097# CONFIG_FB is not set
1098# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1099
1100#
1101# Display device support
1102#
1103# CONFIG_DISPLAY_SUPPORT is not set
1104
1105#
1106# Console display driver support
1107#
1108CONFIG_DUMMY_CONSOLE=y
1109# CONFIG_SOUND is not set
1110CONFIG_HID_SUPPORT=y
1111CONFIG_HID=y
1112# CONFIG_HIDRAW is not set
1113
1114#
1115# USB Input Devices
1116#
1117CONFIG_USB_HID=y
1118# CONFIG_HID_PID is not set
1119# CONFIG_USB_HIDDEV is not set
1120
1121#
1122# Special HID drivers
1123#
1124# CONFIG_HID_A4TECH is not set
1125# CONFIG_HID_APPLE is not set
1126# CONFIG_HID_BELKIN is not set
1127# CONFIG_HID_CHERRY is not set
1128# CONFIG_HID_CHICONY is not set
1129# CONFIG_HID_CYPRESS is not set
1130# CONFIG_HID_DRAGONRISE is not set
1131# CONFIG_HID_EZKEY is not set
1132# CONFIG_HID_KYE is not set
1133# CONFIG_HID_GYRATION is not set
1134# CONFIG_HID_TWINHAN is not set
1135# CONFIG_HID_KENSINGTON is not set
1136# CONFIG_HID_LOGITECH is not set
1137# CONFIG_HID_MICROSOFT is not set
1138# CONFIG_HID_MONTEREY is not set
1139# CONFIG_HID_NTRIG is not set
1140# CONFIG_HID_PANTHERLORD is not set
1141# CONFIG_HID_PETALYNX is not set
1142# CONFIG_HID_SAMSUNG is not set
1143# CONFIG_HID_SONY is not set
1144# CONFIG_HID_SUNPLUS is not set
1145# CONFIG_HID_GREENASIA is not set
1146# CONFIG_HID_SMARTJOYPLUS is not set
1147# CONFIG_HID_TOPSEED is not set
1148# CONFIG_HID_THRUSTMASTER is not set
1149# CONFIG_HID_ZEROPLUS is not set
1150CONFIG_USB_SUPPORT=y
1151CONFIG_USB_ARCH_HAS_HCD=y
1152CONFIG_USB_ARCH_HAS_OHCI=y
1153CONFIG_USB_ARCH_HAS_EHCI=y
1154CONFIG_USB=y
1155# CONFIG_USB_DEBUG is not set
1156# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1157
1158#
1159# Miscellaneous USB options
1160#
1161# CONFIG_USB_DEVICEFS is not set
1162CONFIG_USB_DEVICE_CLASS=y
1163# CONFIG_USB_DYNAMIC_MINORS is not set
1164# CONFIG_USB_SUSPEND is not set
1165# CONFIG_USB_OTG is not set
1166# CONFIG_USB_OTG_WHITELIST is not set
1167# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1168CONFIG_USB_MON=y
1169# CONFIG_USB_WUSB is not set
1170# CONFIG_USB_WUSB_CBAF is not set
1171
1172#
1173# USB Host Controller Drivers
1174#
1175# CONFIG_USB_C67X00_HCD is not set
1176# CONFIG_USB_XHCI_HCD is not set
1177# CONFIG_USB_EHCI_HCD is not set
1178# CONFIG_USB_OXU210HP_HCD is not set
1179# CONFIG_USB_ISP116X_HCD is not set
1180# CONFIG_USB_ISP1760_HCD is not set
1181# CONFIG_USB_ISP1362_HCD is not set
1182CONFIG_USB_OHCI_HCD=y
1183# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1184# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1185CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1186# CONFIG_USB_UHCI_HCD is not set
1187# CONFIG_USB_SL811_HCD is not set
1188# CONFIG_USB_R8A66597_HCD is not set
1189# CONFIG_USB_WHCI_HCD is not set
1190# CONFIG_USB_HWA_HCD is not set
1191# CONFIG_USB_GADGET_MUSB_HDRC is not set
1192
1193#
1194# USB Device Class drivers
1195#
1196# CONFIG_USB_ACM is not set
1197# CONFIG_USB_PRINTER is not set
1198# CONFIG_USB_WDM is not set
1199# CONFIG_USB_TMC is not set
1200
1201#
1202# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1203#
1204
1205#
1206# also be needed; see USB_STORAGE Help for more info
1207#
1208CONFIG_USB_STORAGE=y
1209# CONFIG_USB_STORAGE_DEBUG is not set
1210# CONFIG_USB_STORAGE_DATAFAB is not set
1211# CONFIG_USB_STORAGE_FREECOM is not set
1212# CONFIG_USB_STORAGE_ISD200 is not set
1213# CONFIG_USB_STORAGE_USBAT is not set
1214# CONFIG_USB_STORAGE_SDDR09 is not set
1215# CONFIG_USB_STORAGE_SDDR55 is not set
1216# CONFIG_USB_STORAGE_JUMPSHOT is not set
1217# CONFIG_USB_STORAGE_ALAUDA is not set
1218# CONFIG_USB_STORAGE_ONETOUCH is not set
1219# CONFIG_USB_STORAGE_KARMA is not set
1220# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1221# CONFIG_USB_LIBUSUAL is not set
1222
1223#
1224# USB Imaging devices
1225#
1226# CONFIG_USB_MDC800 is not set
1227# CONFIG_USB_MICROTEK is not set
1228
1229#
1230# USB port drivers
1231#
1232# CONFIG_USB_SERIAL is not set
1233
1234#
1235# USB Miscellaneous drivers
1236#
1237# CONFIG_USB_EMI62 is not set
1238# CONFIG_USB_EMI26 is not set
1239# CONFIG_USB_ADUTUX is not set
1240# CONFIG_USB_SEVSEG is not set
1241# CONFIG_USB_RIO500 is not set
1242# CONFIG_USB_LEGOTOWER is not set
1243# CONFIG_USB_LCD is not set
1244# CONFIG_USB_BERRY_CHARGE is not set
1245# CONFIG_USB_LED is not set
1246# CONFIG_USB_CYPRESS_CY7C63 is not set
1247# CONFIG_USB_CYTHERM is not set
1248# CONFIG_USB_IDMOUSE is not set
1249# CONFIG_USB_FTDI_ELAN is not set
1250# CONFIG_USB_APPLEDISPLAY is not set
1251# CONFIG_USB_LD is not set
1252# CONFIG_USB_TRANCEVIBRATOR is not set
1253# CONFIG_USB_IOWARRIOR is not set
1254# CONFIG_USB_TEST is not set
1255# CONFIG_USB_ISIGHTFW is not set
1256# CONFIG_USB_VST is not set
1257CONFIG_USB_GADGET=y
1258# CONFIG_USB_GADGET_DEBUG is not set
1259# CONFIG_USB_GADGET_DEBUG_FILES is not set
1260# CONFIG_USB_GADGET_DEBUG_FS is not set
1261CONFIG_USB_GADGET_VBUS_DRAW=2
1262CONFIG_USB_GADGET_SELECTED=y
1263# CONFIG_USB_GADGET_AT91 is not set
1264# CONFIG_USB_GADGET_ATMEL_USBA is not set
1265# CONFIG_USB_GADGET_FSL_USB2 is not set
1266# CONFIG_USB_GADGET_LH7A40X is not set
1267# CONFIG_USB_GADGET_OMAP is not set
1268# CONFIG_USB_GADGET_PXA25X is not set
1269# CONFIG_USB_GADGET_R8A66597 is not set
1270# CONFIG_USB_GADGET_PXA27X is not set
1271# CONFIG_USB_GADGET_S3C_HSOTG is not set
1272# CONFIG_USB_GADGET_IMX is not set
1273# CONFIG_USB_GADGET_S3C2410 is not set
1274CONFIG_USB_GADGET_M66592=y
1275CONFIG_USB_M66592=y
1276# CONFIG_USB_GADGET_AMD5536UDC is not set
1277# CONFIG_USB_GADGET_FSL_QE is not set
1278# CONFIG_USB_GADGET_CI13XXX is not set
1279# CONFIG_USB_GADGET_NET2280 is not set
1280# CONFIG_USB_GADGET_GOKU is not set
1281# CONFIG_USB_GADGET_LANGWELL is not set
1282# CONFIG_USB_GADGET_DUMMY_HCD is not set
1283CONFIG_USB_GADGET_DUALSPEED=y
1284# CONFIG_USB_ZERO is not set
1285# CONFIG_USB_AUDIO is not set
1286# CONFIG_USB_ETH is not set
1287# CONFIG_USB_GADGETFS is not set
1288# CONFIG_USB_FILE_STORAGE is not set
1289# CONFIG_USB_MASS_STORAGE is not set
1290# CONFIG_USB_G_SERIAL is not set
1291# CONFIG_USB_MIDI_GADGET is not set
1292# CONFIG_USB_G_PRINTER is not set
1293# CONFIG_USB_CDC_COMPOSITE is not set
1294# CONFIG_USB_G_MULTI is not set
1295
1296#
1297# OTG and related infrastructure
1298#
1299# CONFIG_NOP_USB_XCEIV is not set
1300# CONFIG_UWB is not set
1301# CONFIG_MMC is not set
1302# CONFIG_MEMSTICK is not set
1303# CONFIG_NEW_LEDS is not set
1304# CONFIG_ACCESSIBILITY is not set
1305# CONFIG_INFINIBAND is not set
1306CONFIG_RTC_LIB=y
1307CONFIG_RTC_CLASS=y
1308CONFIG_RTC_HCTOSYS=y
1309CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1310# CONFIG_RTC_DEBUG is not set
1311
1312#
1313# RTC interfaces
1314#
1315CONFIG_RTC_INTF_SYSFS=y
1316CONFIG_RTC_INTF_PROC=y
1317CONFIG_RTC_INTF_DEV=y
1318# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1319# CONFIG_RTC_DRV_TEST is not set
1320
1321#
1322# I2C RTC drivers
1323#
1324# CONFIG_RTC_DRV_DS1307 is not set
1325# CONFIG_RTC_DRV_DS1374 is not set
1326# CONFIG_RTC_DRV_DS1672 is not set
1327CONFIG_RTC_DRV_MAX6900=y
1328# CONFIG_RTC_DRV_RS5C372 is not set
1329# CONFIG_RTC_DRV_ISL1208 is not set
1330# CONFIG_RTC_DRV_X1205 is not set
1331# CONFIG_RTC_DRV_PCF8563 is not set
1332# CONFIG_RTC_DRV_PCF8583 is not set
1333# CONFIG_RTC_DRV_M41T80 is not set
1334# CONFIG_RTC_DRV_BQ32K is not set
1335# CONFIG_RTC_DRV_S35390A is not set
1336# CONFIG_RTC_DRV_FM3130 is not set
1337# CONFIG_RTC_DRV_RX8581 is not set
1338# CONFIG_RTC_DRV_RX8025 is not set
1339
1340#
1341# SPI RTC drivers
1342#
1343# CONFIG_RTC_DRV_M41T94 is not set
1344# CONFIG_RTC_DRV_DS1305 is not set
1345# CONFIG_RTC_DRV_DS1390 is not set
1346# CONFIG_RTC_DRV_MAX6902 is not set
1347# CONFIG_RTC_DRV_R9701 is not set
1348# CONFIG_RTC_DRV_RS5C348 is not set
1349# CONFIG_RTC_DRV_DS3234 is not set
1350# CONFIG_RTC_DRV_PCF2123 is not set
1351
1352#
1353# Platform RTC drivers
1354#
1355# CONFIG_RTC_DRV_DS1286 is not set
1356# CONFIG_RTC_DRV_DS1511 is not set
1357# CONFIG_RTC_DRV_DS1553 is not set
1358# CONFIG_RTC_DRV_DS1742 is not set
1359# CONFIG_RTC_DRV_STK17TA8 is not set
1360# CONFIG_RTC_DRV_M48T86 is not set
1361# CONFIG_RTC_DRV_M48T35 is not set
1362# CONFIG_RTC_DRV_M48T59 is not set
1363# CONFIG_RTC_DRV_MSM6242 is not set
1364# CONFIG_RTC_DRV_BQ4802 is not set
1365# CONFIG_RTC_DRV_RP5C01 is not set
1366# CONFIG_RTC_DRV_V3020 is not set
1367
1368#
1369# on-CPU RTC drivers
1370#
1371CONFIG_RTC_DRV_SH=y
1372# CONFIG_RTC_DRV_GENERIC is not set
1373# CONFIG_DMADEVICES is not set
1374# CONFIG_AUXDISPLAY is not set
1375CONFIG_UIO=m
1376# CONFIG_UIO_CIF is not set
1377# CONFIG_UIO_PDRV is not set
1378# CONFIG_UIO_PDRV_GENIRQ is not set
1379# CONFIG_UIO_SMX is not set
1380# CONFIG_UIO_AEC is not set
1381# CONFIG_UIO_SERCOS3 is not set
1382# CONFIG_UIO_PCI_GENERIC is not set
1383
1384#
1385# TI VLYNQ
1386#
1387# CONFIG_STAGING is not set
1388
1389#
1390# File systems
1391#
1392CONFIG_EXT2_FS=y
1393# CONFIG_EXT2_FS_XATTR is not set
1394# CONFIG_EXT2_FS_XIP is not set
1395CONFIG_EXT3_FS=y
1396# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1397CONFIG_EXT3_FS_XATTR=y
1398# CONFIG_EXT3_FS_POSIX_ACL is not set
1399# CONFIG_EXT3_FS_SECURITY is not set
1400# CONFIG_EXT4_FS is not set
1401CONFIG_JBD=y
1402# CONFIG_JBD_DEBUG is not set
1403CONFIG_FS_MBCACHE=y
1404# CONFIG_REISERFS_FS is not set
1405# CONFIG_JFS_FS is not set
1406# CONFIG_FS_POSIX_ACL is not set
1407# CONFIG_XFS_FS is not set
1408# CONFIG_OCFS2_FS is not set
1409# CONFIG_BTRFS_FS is not set
1410# CONFIG_NILFS2_FS is not set
1411CONFIG_FILE_LOCKING=y
1412CONFIG_FSNOTIFY=y
1413CONFIG_DNOTIFY=y
1414CONFIG_INOTIFY=y
1415CONFIG_INOTIFY_USER=y
1416# CONFIG_QUOTA is not set
1417# CONFIG_AUTOFS_FS is not set
1418# CONFIG_AUTOFS4_FS is not set
1419# CONFIG_FUSE_FS is not set
1420
1421#
1422# Caches
1423#
1424# CONFIG_FSCACHE is not set
1425
1426#
1427# CD-ROM/DVD Filesystems
1428#
1429# CONFIG_ISO9660_FS is not set
1430# CONFIG_UDF_FS is not set
1431
1432#
1433# DOS/FAT/NT Filesystems
1434#
1435# CONFIG_MSDOS_FS is not set
1436# CONFIG_VFAT_FS is not set
1437# CONFIG_NTFS_FS is not set
1438
1439#
1440# Pseudo filesystems
1441#
1442CONFIG_PROC_FS=y
1443CONFIG_PROC_KCORE=y
1444CONFIG_PROC_SYSCTL=y
1445CONFIG_PROC_PAGE_MONITOR=y
1446CONFIG_SYSFS=y
1447CONFIG_TMPFS=y
1448# CONFIG_TMPFS_POSIX_ACL is not set
1449CONFIG_HUGETLBFS=y
1450CONFIG_HUGETLB_PAGE=y
1451# CONFIG_CONFIGFS_FS is not set
1452CONFIG_MISC_FILESYSTEMS=y
1453# CONFIG_ADFS_FS is not set
1454# CONFIG_AFFS_FS is not set
1455# CONFIG_HFS_FS is not set
1456# CONFIG_HFSPLUS_FS is not set
1457# CONFIG_BEFS_FS is not set
1458# CONFIG_BFS_FS is not set
1459# CONFIG_EFS_FS is not set
1460# CONFIG_CRAMFS is not set
1461# CONFIG_SQUASHFS is not set
1462# CONFIG_VXFS_FS is not set
1463# CONFIG_MINIX_FS is not set
1464# CONFIG_OMFS_FS is not set
1465# CONFIG_HPFS_FS is not set
1466# CONFIG_QNX4FS_FS is not set
1467# CONFIG_ROMFS_FS is not set
1468# CONFIG_SYSV_FS is not set
1469# CONFIG_UFS_FS is not set
1470CONFIG_NETWORK_FILESYSTEMS=y
1471CONFIG_NFS_FS=y
1472CONFIG_NFS_V3=y
1473# CONFIG_NFS_V3_ACL is not set
1474# CONFIG_NFS_V4 is not set
1475CONFIG_ROOT_NFS=y
1476# CONFIG_NFSD is not set
1477CONFIG_LOCKD=y
1478CONFIG_LOCKD_V4=y
1479CONFIG_NFS_COMMON=y
1480CONFIG_SUNRPC=y
1481# CONFIG_RPCSEC_GSS_KRB5 is not set
1482# CONFIG_RPCSEC_GSS_SPKM3 is not set
1483# CONFIG_SMB_FS is not set
1484# CONFIG_CIFS is not set
1485# CONFIG_NCP_FS is not set
1486# CONFIG_CODA_FS is not set
1487# CONFIG_AFS_FS is not set
1488
1489#
1490# Partition Types
1491#
1492# CONFIG_PARTITION_ADVANCED is not set
1493CONFIG_MSDOS_PARTITION=y
1494CONFIG_NLS=y
1495CONFIG_NLS_DEFAULT="iso8859-1"
1496# CONFIG_NLS_CODEPAGE_437 is not set
1497# CONFIG_NLS_CODEPAGE_737 is not set
1498# CONFIG_NLS_CODEPAGE_775 is not set
1499# CONFIG_NLS_CODEPAGE_850 is not set
1500# CONFIG_NLS_CODEPAGE_852 is not set
1501# CONFIG_NLS_CODEPAGE_855 is not set
1502# CONFIG_NLS_CODEPAGE_857 is not set
1503# CONFIG_NLS_CODEPAGE_860 is not set
1504# CONFIG_NLS_CODEPAGE_861 is not set
1505# CONFIG_NLS_CODEPAGE_862 is not set
1506# CONFIG_NLS_CODEPAGE_863 is not set
1507# CONFIG_NLS_CODEPAGE_864 is not set
1508# CONFIG_NLS_CODEPAGE_865 is not set
1509# CONFIG_NLS_CODEPAGE_866 is not set
1510# CONFIG_NLS_CODEPAGE_869 is not set
1511# CONFIG_NLS_CODEPAGE_936 is not set
1512# CONFIG_NLS_CODEPAGE_950 is not set
1513# CONFIG_NLS_CODEPAGE_932 is not set
1514# CONFIG_NLS_CODEPAGE_949 is not set
1515# CONFIG_NLS_CODEPAGE_874 is not set
1516# CONFIG_NLS_ISO8859_8 is not set
1517# CONFIG_NLS_CODEPAGE_1250 is not set
1518# CONFIG_NLS_CODEPAGE_1251 is not set
1519# CONFIG_NLS_ASCII is not set
1520# CONFIG_NLS_ISO8859_1 is not set
1521# CONFIG_NLS_ISO8859_2 is not set
1522# CONFIG_NLS_ISO8859_3 is not set
1523# CONFIG_NLS_ISO8859_4 is not set
1524# CONFIG_NLS_ISO8859_5 is not set
1525# CONFIG_NLS_ISO8859_6 is not set
1526# CONFIG_NLS_ISO8859_7 is not set
1527# CONFIG_NLS_ISO8859_9 is not set
1528# CONFIG_NLS_ISO8859_13 is not set
1529# CONFIG_NLS_ISO8859_14 is not set
1530# CONFIG_NLS_ISO8859_15 is not set
1531# CONFIG_NLS_KOI8_R is not set
1532# CONFIG_NLS_KOI8_U is not set
1533# CONFIG_NLS_UTF8 is not set
1534# CONFIG_DLM is not set
1535
1536#
1537# Kernel hacking
1538#
1539CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1540CONFIG_PRINTK_TIME=y
1541CONFIG_ENABLE_WARN_DEPRECATED=y
1542# CONFIG_ENABLE_MUST_CHECK is not set
1543CONFIG_FRAME_WARN=1024
1544CONFIG_MAGIC_SYSRQ=y
1545# CONFIG_STRIP_ASM_SYMS is not set
1546# CONFIG_UNUSED_SYMBOLS is not set
1547CONFIG_DEBUG_FS=y
1548# CONFIG_HEADERS_CHECK is not set
1549CONFIG_DEBUG_KERNEL=y
1550CONFIG_DEBUG_SHIRQ=y
1551CONFIG_DETECT_SOFTLOCKUP=y
1552# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1553CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1554CONFIG_DETECT_HUNG_TASK=y
1555# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1556CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1557CONFIG_SCHED_DEBUG=y
1558# CONFIG_SCHEDSTATS is not set
1559# CONFIG_TIMER_STATS is not set
1560# CONFIG_DEBUG_OBJECTS is not set
1561# CONFIG_DEBUG_SLAB is not set
1562CONFIG_DEBUG_PREEMPT=y
1563# CONFIG_DEBUG_RT_MUTEXES is not set
1564# CONFIG_RT_MUTEX_TESTER is not set
1565# CONFIG_DEBUG_SPINLOCK is not set
1566# CONFIG_DEBUG_MUTEXES is not set
1567# CONFIG_DEBUG_LOCK_ALLOC is not set
1568# CONFIG_PROVE_LOCKING is not set
1569# CONFIG_LOCK_STAT is not set
1570# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1571# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1572CONFIG_STACKTRACE=y
1573# CONFIG_DEBUG_KOBJECT is not set
1574CONFIG_DEBUG_BUGVERBOSE=y
1575# CONFIG_DEBUG_INFO is not set
1576CONFIG_DEBUG_VM=y
1577# CONFIG_DEBUG_WRITECOUNT is not set
1578# CONFIG_DEBUG_MEMORY_INIT is not set
1579# CONFIG_DEBUG_LIST is not set
1580# CONFIG_DEBUG_SG is not set
1581# CONFIG_DEBUG_NOTIFIERS is not set
1582# CONFIG_DEBUG_CREDENTIALS is not set
1583CONFIG_FRAME_POINTER=y
1584# CONFIG_RCU_TORTURE_TEST is not set
1585# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1586# CONFIG_BACKTRACE_SELF_TEST is not set
1587# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1588# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1589# CONFIG_FAULT_INJECTION is not set
1590# CONFIG_LATENCYTOP is not set
1591# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1592# CONFIG_PAGE_POISONING is not set
1593CONFIG_NOP_TRACER=y
1594CONFIG_HAVE_FUNCTION_TRACER=y
1595CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1596CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
1597CONFIG_HAVE_DYNAMIC_FTRACE=y
1598CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1599CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1600CONFIG_RING_BUFFER=y
1601CONFIG_EVENT_TRACING=y
1602CONFIG_CONTEXT_SWITCH_TRACER=y
1603CONFIG_TRACING=y
1604CONFIG_TRACING_SUPPORT=y
1605CONFIG_FTRACE=y
1606# CONFIG_FUNCTION_TRACER is not set
1607# CONFIG_IRQSOFF_TRACER is not set
1608# CONFIG_PREEMPT_TRACER is not set
1609# CONFIG_SCHED_TRACER is not set
1610# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1611# CONFIG_FTRACE_SYSCALLS is not set
1612# CONFIG_BOOT_TRACER is not set
1613CONFIG_BRANCH_PROFILE_NONE=y
1614# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1615# CONFIG_PROFILE_ALL_BRANCHES is not set
1616CONFIG_KSYM_TRACER=y
1617# CONFIG_PROFILE_KSYM_TRACER is not set
1618# CONFIG_STACK_TRACER is not set
1619# CONFIG_KMEMTRACE is not set
1620# CONFIG_WORKQUEUE_TRACER is not set
1621# CONFIG_BLK_DEV_IO_TRACE is not set
1622# CONFIG_RING_BUFFER_BENCHMARK is not set
1623# CONFIG_DYNAMIC_DEBUG is not set
1624# CONFIG_DMA_API_DEBUG is not set
1625# CONFIG_SAMPLES is not set
1626CONFIG_HAVE_ARCH_KGDB=y
1627# CONFIG_KGDB is not set
1628# CONFIG_SH_STANDARD_BIOS is not set
1629# CONFIG_STACK_DEBUG is not set
1630CONFIG_DEBUG_STACK_USAGE=y
1631# CONFIG_4KSTACKS is not set
1632CONFIG_DUMP_CODE=y
1633CONFIG_DWARF_UNWINDER=y
1634# CONFIG_SH_NO_BSS_INIT is not set
1635
1636#
1637# Security options
1638#
1639# CONFIG_KEYS is not set
1640# CONFIG_SECURITY is not set
1641# CONFIG_SECURITYFS is not set
1642# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1643# CONFIG_DEFAULT_SECURITY_SMACK is not set
1644# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1645CONFIG_DEFAULT_SECURITY_DAC=y
1646CONFIG_DEFAULT_SECURITY=""
1647CONFIG_CRYPTO=y
1648
1649#
1650# Crypto core or helper
1651#
1652# CONFIG_CRYPTO_MANAGER is not set
1653# CONFIG_CRYPTO_MANAGER2 is not set
1654# CONFIG_CRYPTO_GF128MUL is not set
1655# CONFIG_CRYPTO_NULL is not set
1656# CONFIG_CRYPTO_CRYPTD is not set
1657# CONFIG_CRYPTO_AUTHENC is not set
1658# CONFIG_CRYPTO_TEST is not set
1659
1660#
1661# Authenticated Encryption with Associated Data
1662#
1663# CONFIG_CRYPTO_CCM is not set
1664# CONFIG_CRYPTO_GCM is not set
1665# CONFIG_CRYPTO_SEQIV is not set
1666
1667#
1668# Block modes
1669#
1670# CONFIG_CRYPTO_CBC is not set
1671# CONFIG_CRYPTO_CTR is not set
1672# CONFIG_CRYPTO_CTS is not set
1673# CONFIG_CRYPTO_ECB is not set
1674# CONFIG_CRYPTO_LRW is not set
1675# CONFIG_CRYPTO_PCBC is not set
1676# CONFIG_CRYPTO_XTS is not set
1677
1678#
1679# Hash modes
1680#
1681# CONFIG_CRYPTO_HMAC is not set
1682# CONFIG_CRYPTO_XCBC is not set
1683# CONFIG_CRYPTO_VMAC is not set
1684
1685#
1686# Digest
1687#
1688# CONFIG_CRYPTO_CRC32C is not set
1689# CONFIG_CRYPTO_GHASH is not set
1690# CONFIG_CRYPTO_MD4 is not set
1691# CONFIG_CRYPTO_MD5 is not set
1692# CONFIG_CRYPTO_MICHAEL_MIC is not set
1693# CONFIG_CRYPTO_RMD128 is not set
1694# CONFIG_CRYPTO_RMD160 is not set
1695# CONFIG_CRYPTO_RMD256 is not set
1696# CONFIG_CRYPTO_RMD320 is not set
1697# CONFIG_CRYPTO_SHA1 is not set
1698# CONFIG_CRYPTO_SHA256 is not set
1699# CONFIG_CRYPTO_SHA512 is not set
1700# CONFIG_CRYPTO_TGR192 is not set
1701# CONFIG_CRYPTO_WP512 is not set
1702
1703#
1704# Ciphers
1705#
1706# CONFIG_CRYPTO_AES is not set
1707# CONFIG_CRYPTO_ANUBIS is not set
1708# CONFIG_CRYPTO_ARC4 is not set
1709# CONFIG_CRYPTO_BLOWFISH is not set
1710# CONFIG_CRYPTO_CAMELLIA is not set
1711# CONFIG_CRYPTO_CAST5 is not set
1712# CONFIG_CRYPTO_CAST6 is not set
1713# CONFIG_CRYPTO_DES is not set
1714# CONFIG_CRYPTO_FCRYPT is not set
1715# CONFIG_CRYPTO_KHAZAD is not set
1716# CONFIG_CRYPTO_SALSA20 is not set
1717# CONFIG_CRYPTO_SEED is not set
1718# CONFIG_CRYPTO_SERPENT is not set
1719# CONFIG_CRYPTO_TEA is not set
1720# CONFIG_CRYPTO_TWOFISH is not set
1721
1722#
1723# Compression
1724#
1725# CONFIG_CRYPTO_DEFLATE is not set
1726# CONFIG_CRYPTO_ZLIB is not set
1727# CONFIG_CRYPTO_LZO is not set
1728
1729#
1730# Random Number Generation
1731#
1732# CONFIG_CRYPTO_ANSI_CPRNG is not set
1733CONFIG_CRYPTO_HW=y
1734# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1735CONFIG_BINARY_PRINTF=y
1736
1737#
1738# Library routines
1739#
1740CONFIG_BITREVERSE=y
1741CONFIG_GENERIC_FIND_LAST_BIT=y
1742# CONFIG_CRC_CCITT is not set
1743# CONFIG_CRC16 is not set
1744# CONFIG_CRC_T10DIF is not set
1745# CONFIG_CRC_ITU_T is not set
1746CONFIG_CRC32=y
1747# CONFIG_CRC7 is not set
1748# CONFIG_LIBCRC32C is not set
1749CONFIG_HAS_IOMEM=y
1750CONFIG_HAS_IOPORT=y
1751CONFIG_HAS_DMA=y
1752CONFIG_HAVE_LMB=y
1753CONFIG_NLATTR=y
1754CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/drivers/dma/dma-pvr2.c b/arch/sh/drivers/dma/dma-pvr2.c
index 391cbe1c2956..3cee58e7f1e5 100644
--- a/arch/sh/drivers/dma/dma-pvr2.c
+++ b/arch/sh/drivers/dma/dma-pvr2.c
@@ -40,10 +40,10 @@ static irqreturn_t pvr2_dma_interrupt(int irq, void *dev_id)
40 40
41static int pvr2_request_dma(struct dma_channel *chan) 41static int pvr2_request_dma(struct dma_channel *chan)
42{ 42{
43 if (ctrl_inl(PVR2_DMA_MODE) != 0) 43 if (__raw_readl(PVR2_DMA_MODE) != 0)
44 return -EBUSY; 44 return -EBUSY;
45 45
46 ctrl_outl(0, PVR2_DMA_LMMODE0); 46 __raw_writel(0, PVR2_DMA_LMMODE0);
47 47
48 return 0; 48 return 0;
49} 49}
@@ -60,9 +60,9 @@ static int pvr2_xfer_dma(struct dma_channel *chan)
60 60
61 xfer_complete = 0; 61 xfer_complete = 0;
62 62
63 ctrl_outl(chan->dar, PVR2_DMA_ADDR); 63 __raw_writel(chan->dar, PVR2_DMA_ADDR);
64 ctrl_outl(chan->count, PVR2_DMA_COUNT); 64 __raw_writel(chan->count, PVR2_DMA_COUNT);
65 ctrl_outl(chan->mode & DMA_MODE_MASK, PVR2_DMA_MODE); 65 __raw_writel(chan->mode & DMA_MODE_MASK, PVR2_DMA_MODE);
66 66
67 return 0; 67 return 0;
68} 68}
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 37fb5b8bbc3f..827208781ed5 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -52,11 +52,14 @@ static inline unsigned int get_dmte_irq(unsigned int chan)
52 * 52 *
53 * iterations to complete the transfer. 53 * iterations to complete the transfer.
54 */ 54 */
55static unsigned int ts_shift[] = TS_SHIFT;
55static inline unsigned int calc_xmit_shift(struct dma_channel *chan) 56static inline unsigned int calc_xmit_shift(struct dma_channel *chan)
56{ 57{
57 u32 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR); 58 u32 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
59 int cnt = ((chcr & CHCR_TS_LOW_MASK) >> CHCR_TS_LOW_SHIFT) |
60 ((chcr & CHCR_TS_HIGH_MASK) >> CHCR_TS_HIGH_SHIFT);
58 61
59 return ts_shift[(chcr & CHCR_TS_MASK)>>CHCR_TS_SHIFT]; 62 return ts_shift[cnt];
60} 63}
61 64
62/* 65/*
@@ -70,13 +73,13 @@ static irqreturn_t dma_tei(int irq, void *dev_id)
70 struct dma_channel *chan = dev_id; 73 struct dma_channel *chan = dev_id;
71 u32 chcr; 74 u32 chcr;
72 75
73 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR); 76 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
74 77
75 if (!(chcr & CHCR_TE)) 78 if (!(chcr & CHCR_TE))
76 return IRQ_NONE; 79 return IRQ_NONE;
77 80
78 chcr &= ~(CHCR_IE | CHCR_DE); 81 chcr &= ~(CHCR_IE | CHCR_DE);
79 ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR)); 82 __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
80 83
81 wake_up(&chan->wait_queue); 84 wake_up(&chan->wait_queue);
82 85
@@ -115,7 +118,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
115 chan->flags &= ~DMA_TEI_CAPABLE; 118 chan->flags &= ~DMA_TEI_CAPABLE;
116 } 119 }
117 120
118 ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR)); 121 __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
119 122
120 chan->flags |= DMA_CONFIGURED; 123 chan->flags |= DMA_CONFIGURED;
121 return 0; 124 return 0;
@@ -126,13 +129,13 @@ static void sh_dmac_enable_dma(struct dma_channel *chan)
126 int irq; 129 int irq;
127 u32 chcr; 130 u32 chcr;
128 131
129 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR); 132 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
130 chcr |= CHCR_DE; 133 chcr |= CHCR_DE;
131 134
132 if (chan->flags & DMA_TEI_CAPABLE) 135 if (chan->flags & DMA_TEI_CAPABLE)
133 chcr |= CHCR_IE; 136 chcr |= CHCR_IE;
134 137
135 ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR)); 138 __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
136 139
137 if (chan->flags & DMA_TEI_CAPABLE) { 140 if (chan->flags & DMA_TEI_CAPABLE) {
138 irq = get_dmte_irq(chan->chan); 141 irq = get_dmte_irq(chan->chan);
@@ -150,9 +153,9 @@ static void sh_dmac_disable_dma(struct dma_channel *chan)
150 disable_irq(irq); 153 disable_irq(irq);
151 } 154 }
152 155
153 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR); 156 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
154 chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE); 157 chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
155 ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR)); 158 __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
156} 159}
157 160
158static int sh_dmac_xfer_dma(struct dma_channel *chan) 161static int sh_dmac_xfer_dma(struct dma_channel *chan)
@@ -183,12 +186,12 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
183 */ 186 */
184 if (chan->sar || (mach_is_dreamcast() && 187 if (chan->sar || (mach_is_dreamcast() &&
185 chan->chan == PVR2_CASCADE_CHAN)) 188 chan->chan == PVR2_CASCADE_CHAN))
186 ctrl_outl(chan->sar, (dma_base_addr[chan->chan]+SAR)); 189 __raw_writel(chan->sar, (dma_base_addr[chan->chan]+SAR));
187 if (chan->dar || (mach_is_dreamcast() && 190 if (chan->dar || (mach_is_dreamcast() &&
188 chan->chan == PVR2_CASCADE_CHAN)) 191 chan->chan == PVR2_CASCADE_CHAN))
189 ctrl_outl(chan->dar, (dma_base_addr[chan->chan] + DAR)); 192 __raw_writel(chan->dar, (dma_base_addr[chan->chan] + DAR));
190 193
191 ctrl_outl(chan->count >> calc_xmit_shift(chan), 194 __raw_writel(chan->count >> calc_xmit_shift(chan),
192 (dma_base_addr[chan->chan] + TCR)); 195 (dma_base_addr[chan->chan] + TCR));
193 196
194 sh_dmac_enable_dma(chan); 197 sh_dmac_enable_dma(chan);
@@ -198,10 +201,10 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
198 201
199static int sh_dmac_get_dma_residue(struct dma_channel *chan) 202static int sh_dmac_get_dma_residue(struct dma_channel *chan)
200{ 203{
201 if (!(ctrl_inl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE)) 204 if (!(__raw_readl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE))
202 return 0; 205 return 0;
203 206
204 return ctrl_inl(dma_base_addr[chan->chan] + TCR) 207 return __raw_readl(dma_base_addr[chan->chan] + TCR)
205 << calc_xmit_shift(chan); 208 << calc_xmit_shift(chan);
206} 209}
207 210
diff --git a/arch/sh/drivers/dma/dmabrg.c b/arch/sh/drivers/dma/dmabrg.c
index 5e22689c2fcf..72622e307613 100644
--- a/arch/sh/drivers/dma/dmabrg.c
+++ b/arch/sh/drivers/dma/dmabrg.c
@@ -86,8 +86,8 @@ static irqreturn_t dmabrg_irq(int irq, void *data)
86 unsigned long dcr; 86 unsigned long dcr;
87 unsigned int i; 87 unsigned int i;
88 88
89 dcr = ctrl_inl(DMABRGCR); 89 dcr = __raw_readl(DMABRGCR);
90 ctrl_outl(dcr & ~0x00ff0003, DMABRGCR); /* ack all */ 90 __raw_writel(dcr & ~0x00ff0003, DMABRGCR); /* ack all */
91 dcr &= dcr >> 8; /* ignore masked */ 91 dcr &= dcr >> 8; /* ignore masked */
92 92
93 /* USB stuff, get it out of the way first */ 93 /* USB stuff, get it out of the way first */
@@ -109,17 +109,17 @@ static irqreturn_t dmabrg_irq(int irq, void *data)
109static void dmabrg_disable_irq(unsigned int dmairq) 109static void dmabrg_disable_irq(unsigned int dmairq)
110{ 110{
111 unsigned long dcr; 111 unsigned long dcr;
112 dcr = ctrl_inl(DMABRGCR); 112 dcr = __raw_readl(DMABRGCR);
113 dcr &= ~(1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8)); 113 dcr &= ~(1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8));
114 ctrl_outl(dcr, DMABRGCR); 114 __raw_writel(dcr, DMABRGCR);
115} 115}
116 116
117static void dmabrg_enable_irq(unsigned int dmairq) 117static void dmabrg_enable_irq(unsigned int dmairq)
118{ 118{
119 unsigned long dcr; 119 unsigned long dcr;
120 dcr = ctrl_inl(DMABRGCR); 120 dcr = __raw_readl(DMABRGCR);
121 dcr |= (1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8)); 121 dcr |= (1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8));
122 ctrl_outl(dcr, DMABRGCR); 122 __raw_writel(dcr, DMABRGCR);
123} 123}
124 124
125int dmabrg_request_irq(unsigned int dmairq, void(*handler)(void*), 125int dmabrg_request_irq(unsigned int dmairq, void(*handler)(void*),
@@ -165,13 +165,13 @@ static int __init dmabrg_init(void)
165 printk(KERN_INFO "DMABRG: DMAC ch0 not reserved!\n"); 165 printk(KERN_INFO "DMABRG: DMAC ch0 not reserved!\n");
166#endif 166#endif
167 167
168 ctrl_outl(0, DMABRGCR); 168 __raw_writel(0, DMABRGCR);
169 ctrl_outl(0, DMACHCR0); 169 __raw_writel(0, DMACHCR0);
170 ctrl_outl(0x94000000, DMARSRA); /* enable DMABRG in DMAC 0 */ 170 __raw_writel(0x94000000, DMARSRA); /* enable DMABRG in DMAC 0 */
171 171
172 /* enable DMABRG mode, enable the DMAC */ 172 /* enable DMABRG mode, enable the DMAC */
173 or = ctrl_inl(DMAOR); 173 or = __raw_readl(DMAOR);
174 ctrl_outl(or | DMAOR_BRG | DMAOR_DMEN, DMAOR); 174 __raw_writel(or | DMAOR_BRG | DMAOR_DMEN, DMAOR);
175 175
176 ret = request_irq(DMABRGI0, dmabrg_irq, IRQF_DISABLED, 176 ret = request_irq(DMABRGI0, dmabrg_irq, IRQF_DISABLED,
177 "DMABRG USB address error", NULL); 177 "DMABRG USB address error", NULL);
diff --git a/arch/sh/drivers/heartbeat.c b/arch/sh/drivers/heartbeat.c
index a9339a6174fc..2acbc793032d 100644
--- a/arch/sh/drivers/heartbeat.c
+++ b/arch/sh/drivers/heartbeat.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Generic heartbeat driver for regular LED banks 2 * Generic heartbeat driver for regular LED banks
3 * 3 *
4 * Copyright (C) 2007 Paul Mundt 4 * Copyright (C) 2007 - 2010 Paul Mundt
5 * 5 *
6 * Most SH reference boards include a number of individual LEDs that can 6 * Most SH reference boards include a number of individual LEDs that can
7 * be independently controlled (either via a pre-defined hardware 7 * be independently controlled (either via a pre-defined hardware
@@ -27,7 +27,7 @@
27#include <asm/heartbeat.h> 27#include <asm/heartbeat.h>
28 28
29#define DRV_NAME "heartbeat" 29#define DRV_NAME "heartbeat"
30#define DRV_VERSION "0.1.1" 30#define DRV_VERSION "0.1.2"
31 31
32static unsigned char default_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 }; 32static unsigned char default_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
33 33
@@ -98,7 +98,7 @@ static int heartbeat_drv_probe(struct platform_device *pdev)
98 return -ENOMEM; 98 return -ENOMEM;
99 } 99 }
100 100
101 hd->base = ioremap_nocache(res->start, res->end - res->start + 1); 101 hd->base = ioremap_nocache(res->start, resource_size(res));
102 if (unlikely(!hd->base)) { 102 if (unlikely(!hd->base)) {
103 dev_err(&pdev->dev, "ioremap failed\n"); 103 dev_err(&pdev->dev, "ioremap failed\n");
104 104
@@ -117,8 +117,20 @@ static int heartbeat_drv_probe(struct platform_device *pdev)
117 for (i = 0; i < hd->nr_bits; i++) 117 for (i = 0; i < hd->nr_bits; i++)
118 hd->mask |= (1 << hd->bit_pos[i]); 118 hd->mask |= (1 << hd->bit_pos[i]);
119 119
120 if (!hd->regsize) 120 if (!hd->regsize) {
121 hd->regsize = 8; /* default access size */ 121 switch (res->flags & IORESOURCE_MEM_TYPE_MASK) {
122 case IORESOURCE_MEM_32BIT:
123 hd->regsize = 32;
124 break;
125 case IORESOURCE_MEM_16BIT:
126 hd->regsize = 16;
127 break;
128 case IORESOURCE_MEM_8BIT:
129 default:
130 hd->regsize = 8;
131 break;
132 }
133 }
122 134
123 setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd); 135 setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd);
124 platform_set_drvdata(pdev, hd); 136 platform_set_drvdata(pdev, hd);
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 08af1f459756..4a59e6890876 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -1,14 +1,14 @@
1# 1#
2# Makefile for the PCI specific kernel interface routines under Linux. 2# Makefile for the PCI specific kernel interface routines under Linux.
3# 3#
4obj-y += pci.o 4obj-y += common.o pci.o
5 5
6obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o 6obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
7obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o 7obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
8obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o 8obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
9obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o 9obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o 10obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o
11obj-$(CONFIG_CPU_SUBTYPE_SH7786) += ops-sh7786.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7786) += pcie-sh7786.o ops-sh7786.o
12obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o 12obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o
13 13
14obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ 14obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
@@ -25,4 +25,3 @@ obj-$(CONFIG_SH_TITAN) += fixups-titan.o
25obj-$(CONFIG_SH_LANDISK) += fixups-landisk.o 25obj-$(CONFIG_SH_LANDISK) += fixups-landisk.o
26obj-$(CONFIG_SH_LBOX_RE2) += fixups-rts7751r2d.o 26obj-$(CONFIG_SH_LBOX_RE2) += fixups-rts7751r2d.o
27obj-$(CONFIG_SH_CAYMAN) += fixups-cayman.o 27obj-$(CONFIG_SH_CAYMAN) += fixups-cayman.o
28obj-$(CONFIG_SH_URQUELL) += pcie-sh7786.o
diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
new file mode 100644
index 000000000000..dbf138199871
--- /dev/null
+++ b/arch/sh/drivers/pci/common.c
@@ -0,0 +1,162 @@
1#include <linux/pci.h>
2#include <linux/interrupt.h>
3#include <linux/timer.h>
4#include <linux/kernel.h>
5
6/*
7 * These functions are used early on before PCI scanning is done
8 * and all of the pci_dev and pci_bus structures have been created.
9 */
10static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
11 int top_bus, int busnr, int devfn)
12{
13 static struct pci_dev dev;
14 static struct pci_bus bus;
15
16 dev.bus = &bus;
17 dev.sysdata = hose;
18 dev.devfn = devfn;
19 bus.number = busnr;
20 bus.sysdata = hose;
21 bus.ops = hose->pci_ops;
22
23 if(busnr != top_bus)
24 /* Fake a parent bus structure. */
25 bus.parent = &bus;
26 else
27 bus.parent = NULL;
28
29 return &dev;
30}
31
32#define EARLY_PCI_OP(rw, size, type) \
33int __init early_##rw##_config_##size(struct pci_channel *hose, \
34 int top_bus, int bus, int devfn, int offset, type value) \
35{ \
36 return pci_##rw##_config_##size( \
37 fake_pci_dev(hose, top_bus, bus, devfn), \
38 offset, value); \
39}
40
41EARLY_PCI_OP(read, byte, u8 *)
42EARLY_PCI_OP(read, word, u16 *)
43EARLY_PCI_OP(read, dword, u32 *)
44EARLY_PCI_OP(write, byte, u8)
45EARLY_PCI_OP(write, word, u16)
46EARLY_PCI_OP(write, dword, u32)
47
48int __init pci_is_66mhz_capable(struct pci_channel *hose,
49 int top_bus, int current_bus)
50{
51 u32 pci_devfn;
52 unsigned short vid;
53 int cap66 = -1;
54 u16 stat;
55
56 printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
57
58 for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
59 if (PCI_FUNC(pci_devfn))
60 continue;
61 if (early_read_config_word(hose, top_bus, current_bus,
62 pci_devfn, PCI_VENDOR_ID, &vid) !=
63 PCIBIOS_SUCCESSFUL)
64 continue;
65 if (vid == 0xffff)
66 continue;
67
68 /* check 66MHz capability */
69 if (cap66 < 0)
70 cap66 = 1;
71 if (cap66) {
72 early_read_config_word(hose, top_bus, current_bus,
73 pci_devfn, PCI_STATUS, &stat);
74 if (!(stat & PCI_STATUS_66MHZ)) {
75 printk(KERN_DEBUG
76 "PCI: %02x:%02x not 66MHz capable.\n",
77 current_bus, pci_devfn);
78 cap66 = 0;
79 break;
80 }
81 }
82 }
83
84 return cap66 > 0;
85}
86
87static void pcibios_enable_err(unsigned long __data)
88{
89 struct pci_channel *hose = (struct pci_channel *)__data;
90
91 del_timer(&hose->err_timer);
92 printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
93 enable_irq(hose->err_irq);
94}
95
96static void pcibios_enable_serr(unsigned long __data)
97{
98 struct pci_channel *hose = (struct pci_channel *)__data;
99
100 del_timer(&hose->serr_timer);
101 printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
102 enable_irq(hose->serr_irq);
103}
104
105void pcibios_enable_timers(struct pci_channel *hose)
106{
107 if (hose->err_irq) {
108 init_timer(&hose->err_timer);
109 hose->err_timer.data = (unsigned long)hose;
110 hose->err_timer.function = pcibios_enable_err;
111 }
112
113 if (hose->serr_irq) {
114 init_timer(&hose->serr_timer);
115 hose->serr_timer.data = (unsigned long)hose;
116 hose->serr_timer.function = pcibios_enable_serr;
117 }
118}
119
120/*
121 * A simple handler for the regular PCI status errors, called from IRQ
122 * context.
123 */
124unsigned int pcibios_handle_status_errors(unsigned long addr,
125 unsigned int status,
126 struct pci_channel *hose)
127{
128 unsigned int cmd = 0;
129
130 if (status & PCI_STATUS_REC_MASTER_ABORT) {
131 printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
132 cmd |= PCI_STATUS_REC_MASTER_ABORT;
133 }
134
135 if (status & PCI_STATUS_REC_TARGET_ABORT) {
136 printk(KERN_DEBUG "PCI: target abort: ");
137 pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
138 PCI_STATUS_SIG_TARGET_ABORT |
139 PCI_STATUS_REC_MASTER_ABORT, 1);
140 printk("\n");
141
142 cmd |= PCI_STATUS_REC_TARGET_ABORT;
143 }
144
145 if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
146 printk(KERN_DEBUG "PCI: parity error detected: ");
147 pcibios_report_status(PCI_STATUS_PARITY |
148 PCI_STATUS_DETECTED_PARITY, 1);
149 printk("\n");
150
151 cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
152
153 /* Now back off of the IRQ for awhile */
154 if (hose->err_irq) {
155 disable_irq_nosync(hose->err_irq);
156 hose->err_timer.expires = jiffies + HZ;
157 add_timer(&hose->err_timer);
158 }
159 }
160
161 return cmd;
162}
diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c
index ed7f489936f1..942ef4f155f5 100644
--- a/arch/sh/drivers/pci/fixups-dreamcast.c
+++ b/arch/sh/drivers/pci/fixups-dreamcast.c
@@ -39,7 +39,7 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev)
39 /* 39 /*
40 * We also assume that dev->devfn == 0 40 * We also assume that dev->devfn == 0
41 */ 41 */
42 dev->resource[1].start = p->io_resource->start + 0x100; 42 dev->resource[1].start = p->resources[0].start + 0x100;
43 dev->resource[1].end = dev->resource[1].start + 0x200 - 1; 43 dev->resource[1].end = dev->resource[1].start + 0x200 - 1;
44 44
45 /* 45 /*
diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c
index 15ca65cb667e..08b2d8658a00 100644
--- a/arch/sh/drivers/pci/fixups-r7780rp.c
+++ b/arch/sh/drivers/pci/fixups-r7780rp.c
@@ -22,15 +22,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
22{ 22{
23 return irq_tab[slot]; 23 return irq_tab[slot];
24} 24}
25
26int pci_fixup_pcic(struct pci_channel *chan)
27{
28 pci_write_reg(chan, 0x000043ff, SH4_PCIINTM);
29 pci_write_reg(chan, 0x00000000, SH7780_PCIIBAR);
30 pci_write_reg(chan, 0x08000000, SH7780_PCICSCR0);
31 pci_write_reg(chan, 0x0000001b, SH7780_PCICSAR0);
32 pci_write_reg(chan, 0xfd000000, SH7780_PCICSCR1);
33 pci_write_reg(chan, 0x0000000f, SH7780_PCICSAR1);
34
35 return 0;
36}
diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c
index 7898f14d6641..e248516118a9 100644
--- a/arch/sh/drivers/pci/fixups-rts7751r2d.c
+++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c
@@ -43,7 +43,7 @@ int pci_fixup_pcic(struct pci_channel *chan)
43{ 43{
44 unsigned long bcr1, mcr; 44 unsigned long bcr1, mcr;
45 45
46 bcr1 = ctrl_inl(SH7751_BCR1); 46 bcr1 = __raw_readl(SH7751_BCR1);
47 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ 47 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
48 pci_write_reg(chan, bcr1, SH4_PCIBCR1); 48 pci_write_reg(chan, bcr1, SH4_PCIBCR1);
49 49
@@ -54,7 +54,7 @@ int pci_fixup_pcic(struct pci_channel *chan)
54 pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1); 54 pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1);
55 pci_write_reg(chan, 0xab000001, SH7751_PCICONF4); 55 pci_write_reg(chan, 0xab000001, SH7751_PCICONF4);
56 56
57 mcr = ctrl_inl(SH7751_MCR); 57 mcr = __raw_readl(SH7751_MCR);
58 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; 58 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
59 pci_write_reg(chan, mcr, SH4_PCIMCR); 59 pci_write_reg(chan, mcr, SH4_PCIMCR);
60 60
diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c
index 250b0edd7365..0930f988ac29 100644
--- a/arch/sh/drivers/pci/fixups-sdk7780.c
+++ b/arch/sh/drivers/pci/fixups-sdk7780.c
@@ -31,22 +31,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
31{ 31{
32 return sdk7780_irq_tab[pin-1][slot]; 32 return sdk7780_irq_tab[pin-1][slot];
33} 33}
34int pci_fixup_pcic(struct pci_channel *chan)
35{
36 /* Enable all interrupts, so we know what to fix */
37 pci_write_reg(chan, 0x0000C3FF, SH7780_PCIIMR);
38
39 /* Set up standard PCI config registers */
40 pci_write_reg(chan, 0x08000000, SH7780_PCIMBAR0); /* PCI */
41 pci_write_reg(chan, 0x08000000, SH4_PCILAR0); /* SHwy */
42 pci_write_reg(chan, 0x07F00001, SH4_PCILSR0); /* size 128M w/ MBAR */
43
44 pci_write_reg(chan, 0x00000000, SH7780_PCIMBAR1);
45 pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
46 pci_write_reg(chan, 0x00000000, SH4_PCILSR1);
47
48 pci_write_reg(chan, 0xAB000801, SH7780_PCIIBAR);
49 pci_write_reg(chan, 0xA5000C01, SH4_PCICR);
50
51 return 0;
52}
diff --git a/arch/sh/drivers/pci/fixups-se7751.c b/arch/sh/drivers/pci/fixups-se7751.c
index 475fa9f0fe2c..a4c7d3a4efca 100644
--- a/arch/sh/drivers/pci/fixups-se7751.c
+++ b/arch/sh/drivers/pci/fixups-se7751.c
@@ -97,12 +97,12 @@ int pci_fixup_pcic(struct pci_channel *chan)
97 * meaning all calls go straight through... use BUG_ON to 97 * meaning all calls go straight through... use BUG_ON to
98 * catch erroneous assumption. 98 * catch erroneous assumption.
99 */ 99 */
100 BUG_ON(chan->mem_resource->start != SH7751_PCI_MEMORY_BASE); 100 BUG_ON(chan->resources[1].start != SH7751_PCI_MEMORY_BASE);
101 101
102 PCIC_WRITE(SH7751_PCIMBR, chan->mem_resource->start); 102 PCIC_WRITE(SH7751_PCIMBR, chan->resources[1].start);
103 103
104 /* Set IOBR for window containing area specified in pci.h */ 104 /* Set IOBR for window containing area specified in pci.h */
105 PCIC_WRITE(SH7751_PCIIOBR, (chan->io_resource->start & SH7751_PCIIOBR_MASK)); 105 PCIC_WRITE(SH7751_PCIIOBR, (chan->resources[0].start & SH7751_PCIIOBR_MASK));
106 106
107 /* All done, may as well say so... */ 107 /* All done, may as well say so... */
108 printk("SH7751 PCI: Finished initialization of the PCI controller\n"); 108 printk("SH7751 PCI: Finished initialization of the PCI controller\n");
diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c
index 78bebebdc99c..0b81999fb88b 100644
--- a/arch/sh/drivers/pci/ops-sh4.c
+++ b/arch/sh/drivers/pci/ops-sh4.c
@@ -16,7 +16,7 @@
16 * Direct access to PCI hardware... 16 * Direct access to PCI hardware...
17 */ 17 */
18#define CONFIG_CMD(bus, devfn, where) \ 18#define CONFIG_CMD(bus, devfn, where) \
19 (P1SEG | (bus->number << 16) | (devfn << 8) | (where & ~3)) 19 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
20 20
21static DEFINE_SPINLOCK(sh4_pci_lock); 21static DEFINE_SPINLOCK(sh4_pci_lock);
22 22
@@ -102,34 +102,6 @@ struct pci_ops sh4_pci_ops = {
102 .write = sh4_pci_write, 102 .write = sh4_pci_write,
103}; 103};
104 104
105/*
106 * Not really related to pci_ops, but it's common and not worth shoving
107 * somewhere else for now..
108 */
109int __init sh4_pci_check_direct(struct pci_channel *chan)
110{
111 /*
112 * Check if configuration works.
113 */
114 unsigned int tmp = pci_read_reg(chan, SH4_PCIPAR);
115
116 pci_write_reg(chan, P1SEG, SH4_PCIPAR);
117
118 if (pci_read_reg(chan, SH4_PCIPAR) == P1SEG) {
119 pci_write_reg(chan, tmp, SH4_PCIPAR);
120 printk(KERN_INFO "PCI: Using configuration type 1\n");
121 request_region(chan->reg_base + SH4_PCIPAR, 8,
122 "PCI conf1");
123 return 0;
124 }
125
126 pci_write_reg(chan, tmp, SH4_PCIPAR);
127
128 printk(KERN_ERR "PCI: %s failed\n", __func__);
129
130 return -EINVAL;
131}
132
133int __attribute__((weak)) pci_fixup_pcic(struct pci_channel *chan) 105int __attribute__((weak)) pci_fixup_pcic(struct pci_channel *chan)
134{ 106{
135 /* Nothing to do. */ 107 /* Nothing to do. */
diff --git a/arch/sh/drivers/pci/pci-dreamcast.c b/arch/sh/drivers/pci/pci-dreamcast.c
index 210f9d4af141..633694193af8 100644
--- a/arch/sh/drivers/pci/pci-dreamcast.c
+++ b/arch/sh/drivers/pci/pci-dreamcast.c
@@ -25,25 +25,25 @@
25#include <asm/irq.h> 25#include <asm/irq.h>
26#include <mach/pci.h> 26#include <mach/pci.h>
27 27
28static struct resource gapspci_io_resource = { 28static struct resource gapspci_resources[] = {
29 .name = "GAPSPCI IO", 29 {
30 .start = GAPSPCI_BBA_CONFIG, 30 .name = "GAPSPCI IO",
31 .end = GAPSPCI_BBA_CONFIG + GAPSPCI_BBA_CONFIG_SIZE - 1, 31 .start = GAPSPCI_BBA_CONFIG,
32 .flags = IORESOURCE_IO, 32 .end = GAPSPCI_BBA_CONFIG + GAPSPCI_BBA_CONFIG_SIZE - 1,
33}; 33 .flags = IORESOURCE_IO,
34 34 }, {
35static struct resource gapspci_mem_resource = { 35 .name = "GAPSPCI mem",
36 .name = "GAPSPCI mem", 36 .start = GAPSPCI_DMA_BASE,
37 .start = GAPSPCI_DMA_BASE, 37 .end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1,
38 .end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1, 38 .flags = IORESOURCE_MEM,
39 .flags = IORESOURCE_MEM, 39 },
40}; 40};
41 41
42static struct pci_channel dreamcast_pci_controller = { 42static struct pci_channel dreamcast_pci_controller = {
43 .pci_ops = &gapspci_pci_ops, 43 .pci_ops = &gapspci_pci_ops,
44 .io_resource = &gapspci_io_resource, 44 .resources = gapspci_resources,
45 .nr_resources = ARRAY_SIZE(gapspci_resources),
45 .io_offset = 0x00000000, 46 .io_offset = 0x00000000,
46 .mem_resource = &gapspci_mem_resource,
47 .mem_offset = 0x00000000, 47 .mem_offset = 0x00000000,
48}; 48};
49 49
@@ -95,8 +95,6 @@ static int __init gapspci_init(void)
95 outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10); 95 outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10);
96 outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14); 96 outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14);
97 97
98 register_pci_controller(&dreamcast_pci_controller); 98 return register_pci_controller(&dreamcast_pci_controller);
99
100 return 0;
101} 99}
102arch_initcall(gapspci_init); 100arch_initcall(gapspci_init);
diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h
index 3d5296cde622..cbf763b3015e 100644
--- a/arch/sh/drivers/pci/pci-sh4.h
+++ b/arch/sh/drivers/pci/pci-sh4.h
@@ -49,6 +49,17 @@
49 #define SH4_PCIINT_MWPD 0x00000002 /* Master Write PERR Detect */ 49 #define SH4_PCIINT_MWPD 0x00000002 /* Master Write PERR Detect */
50 #define SH4_PCIINT_MRPD 0x00000001 /* Master Read PERR Detect */ 50 #define SH4_PCIINT_MRPD 0x00000001 /* Master Read PERR Detect */
51#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */ 51#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */
52 #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
53 #define SH4_PCIINTM_TMTOIM BIT(9) /* Target retry timeout */
54 #define SH4_PCIINTM_MDEIM BIT(8) /* Master function disable error */
55 #define SH4_PCIINTM_APEDIM BIT(7) /* Address parity error detection */
56 #define SH4_PCIINTM_SDIM BIT(6) /* SERR detection */
57 #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
58 #define SH4_PCIINTM_PEDITRM BIT(4) /* PERR detection for target read */
59 #define SH4_PCIINTM_TADIMM BIT(3) /* Target abort for master */
60 #define SH4_PCIINTM_MADIMM BIT(2) /* Master abort for master */
61 #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
62 #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
52#define SH4_PCIALR 0x11C /* Error Address Register */ 63#define SH4_PCIALR 0x11C /* Error Address Register */
53#define SH4_PCICLR 0x120 /* Error Command/Data */ 64#define SH4_PCICLR 0x120 /* Error Command/Data */
54 #define SH4_PCICLR_MPIO 0x80000000 65 #define SH4_PCICLR_MPIO 0x80000000
@@ -61,7 +72,7 @@
61#define SH4_PCIAINT 0x130 /* Arbiter Interrupt Register */ 72#define SH4_PCIAINT 0x130 /* Arbiter Interrupt Register */
62 #define SH4_PCIAINT_MBKN 0x00002000 /* Master Broken Interrupt */ 73 #define SH4_PCIAINT_MBKN 0x00002000 /* Master Broken Interrupt */
63 #define SH4_PCIAINT_TBTO 0x00001000 /* Target Bus Time Out */ 74 #define SH4_PCIAINT_TBTO 0x00001000 /* Target Bus Time Out */
64 #define SH4_PCIAINT_MBTO 0x00001000 /* Master Bus Time Out */ 75 #define SH4_PCIAINT_MBTO 0x00000800 /* Master Bus Time Out */
65 #define SH4_PCIAINT_TABT 0x00000008 /* Target Abort */ 76 #define SH4_PCIAINT_TABT 0x00000008 /* Target Abort */
66 #define SH4_PCIAINT_MABT 0x00000004 /* Master Abort */ 77 #define SH4_PCIAINT_MABT 0x00000004 /* Master Abort */
67 #define SH4_PCIAINT_RDPE 0x00000002 /* Read Data Parity Error */ 78 #define SH4_PCIAINT_RDPE 0x00000002 /* Read Data Parity Error */
@@ -151,7 +162,6 @@
151 162
152/* arch/sh/kernel/drivers/pci/ops-sh4.c */ 163/* arch/sh/kernel/drivers/pci/ops-sh4.c */
153extern struct pci_ops sh4_pci_ops; 164extern struct pci_ops sh4_pci_ops;
154int sh4_pci_check_direct(struct pci_channel *chan);
155int pci_fixup_pcic(struct pci_channel *chan); 165int pci_fixup_pcic(struct pci_channel *chan);
156 166
157struct sh4_pci_address_space { 167struct sh4_pci_address_space {
@@ -167,13 +177,13 @@ struct sh4_pci_address_map {
167static inline void pci_write_reg(struct pci_channel *chan, 177static inline void pci_write_reg(struct pci_channel *chan,
168 unsigned long val, unsigned long reg) 178 unsigned long val, unsigned long reg)
169{ 179{
170 ctrl_outl(val, chan->reg_base + reg); 180 __raw_writel(val, chan->reg_base + reg);
171} 181}
172 182
173static inline unsigned long pci_read_reg(struct pci_channel *chan, 183static inline unsigned long pci_read_reg(struct pci_channel *chan,
174 unsigned long reg) 184 unsigned long reg)
175{ 185{
176 return ctrl_inl(chan->reg_base + reg); 186 return __raw_readl(chan->reg_base + reg);
177} 187}
178 188
179#endif /* __PCI_SH4_H */ 189#endif /* __PCI_SH4_H */
diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c
index 873ed2b44055..0bf296c78795 100644
--- a/arch/sh/drivers/pci/pci-sh5.c
+++ b/arch/sh/drivers/pci/pci-sh5.c
@@ -89,14 +89,13 @@ static irqreturn_t pcish5_serr_irq(int irq, void *dev_id)
89 return IRQ_NONE; 89 return IRQ_NONE;
90} 90}
91 91
92static struct resource sh5_io_resource = { /* place holder */ }; 92static struct resource sh5_pci_resources[2];
93static struct resource sh5_mem_resource = { /* place holder */ };
94 93
95static struct pci_channel sh5pci_controller = { 94static struct pci_channel sh5pci_controller = {
96 .pci_ops = &sh5_pci_ops, 95 .pci_ops = &sh5_pci_ops,
97 .mem_resource = &sh5_mem_resource, 96 .resources = sh5_pci_resources,
97 .nr_resources = ARRAY_SIZE(sh5_pci_resources),
98 .mem_offset = 0x00000000, 98 .mem_offset = 0x00000000,
99 .io_resource = &sh5_io_resource,
100 .io_offset = 0x00000000, 99 .io_offset = 0x00000000,
101}; 100};
102 101
@@ -210,14 +209,12 @@ static int __init sh5pci_init(void)
210 SH5PCI_WRITE(AINTM, ~0); 209 SH5PCI_WRITE(AINTM, ~0);
211 SH5PCI_WRITE(PINTM, ~0); 210 SH5PCI_WRITE(PINTM, ~0);
212 211
213 sh5_io_resource.start = PCI_IO_AREA; 212 sh5_pci_resources[0].start = PCI_IO_AREA;
214 sh5_io_resource.end = PCI_IO_AREA + 0x10000; 213 sh5_pci_resources[0].end = PCI_IO_AREA + 0x10000;
215 214
216 sh5_mem_resource.start = memStart; 215 sh5_pci_resources[1].start = memStart;
217 sh5_mem_resource.end = memStart + memSize; 216 sh5_pci_resources[1].end = memStart + memSize;
218 217
219 register_pci_controller(&sh5pci_controller); 218 return register_pci_controller(&sh5pci_controller);
220
221 return 0;
222} 219}
223arch_initcall(sh5pci_init); 220arch_initcall(sh5pci_init);
diff --git a/arch/sh/drivers/pci/pci-sh5.h b/arch/sh/drivers/pci/pci-sh5.h
index f277628221f3..3f01decb4307 100644
--- a/arch/sh/drivers/pci/pci-sh5.h
+++ b/arch/sh/drivers/pci/pci-sh5.h
@@ -86,14 +86,14 @@ extern unsigned long pcicr_virt;
86/* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */ 86/* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */
87 87
88/* Write I/O functions */ 88/* Write I/O functions */
89#define SH5PCI_WRITE(reg,val) ctrl_outl((u32)(val),PCISH5_ICR_REG(reg)) 89#define SH5PCI_WRITE(reg,val) __raw_writel((u32)(val),PCISH5_ICR_REG(reg))
90#define SH5PCI_WRITE_SHORT(reg,val) ctrl_outw((u16)(val),PCISH5_ICR_REG(reg)) 90#define SH5PCI_WRITE_SHORT(reg,val) __raw_writew((u16)(val),PCISH5_ICR_REG(reg))
91#define SH5PCI_WRITE_BYTE(reg,val) ctrl_outb((u8)(val),PCISH5_ICR_REG(reg)) 91#define SH5PCI_WRITE_BYTE(reg,val) __raw_writeb((u8)(val),PCISH5_ICR_REG(reg))
92 92
93/* Read I/O functions */ 93/* Read I/O functions */
94#define SH5PCI_READ(reg) ctrl_inl(PCISH5_ICR_REG(reg)) 94#define SH5PCI_READ(reg) __raw_readl(PCISH5_ICR_REG(reg))
95#define SH5PCI_READ_SHORT(reg) ctrl_inw(PCISH5_ICR_REG(reg)) 95#define SH5PCI_READ_SHORT(reg) __raw_readw(PCISH5_ICR_REG(reg))
96#define SH5PCI_READ_BYTE(reg) ctrl_inb(PCISH5_ICR_REG(reg)) 96#define SH5PCI_READ_BYTE(reg) __raw_readb(PCISH5_ICR_REG(reg))
97 97
98/* Set PCI config bits */ 98/* Set PCI config bits */
99#define SET_CONFIG_BITS(bus,devfn,where) ((((bus) << 16) | ((devfn) << 8) | ((where) & ~3)) | 0x80000000) 99#define SET_CONFIG_BITS(bus,devfn,where) ((((bus) << 16) | ((devfn) << 8) | ((where) & ~3)) | 0x80000000)
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index 70c1999a0ec4..17811e5d287b 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -44,25 +44,25 @@ static int __init __area_sdram_check(struct pci_channel *chan,
44 return 1; 44 return 1;
45} 45}
46 46
47static struct resource sh7751_io_resource = { 47static struct resource sh7751_pci_resources[] = {
48 .name = "SH7751_IO", 48 {
49 .start = SH7751_PCI_IO_BASE, 49 .name = "SH7751_IO",
50 .end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1, 50 .start = SH7751_PCI_IO_BASE,
51 .flags = IORESOURCE_IO 51 .end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
52}; 52 .flags = IORESOURCE_IO
53 53 }, {
54static struct resource sh7751_mem_resource = { 54 .name = "SH7751_mem",
55 .name = "SH7751_mem", 55 .start = SH7751_PCI_MEMORY_BASE,
56 .start = SH7751_PCI_MEMORY_BASE, 56 .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
57 .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1, 57 .flags = IORESOURCE_MEM
58 .flags = IORESOURCE_MEM 58 },
59}; 59};
60 60
61static struct pci_channel sh7751_pci_controller = { 61static struct pci_channel sh7751_pci_controller = {
62 .pci_ops = &sh4_pci_ops, 62 .pci_ops = &sh4_pci_ops,
63 .mem_resource = &sh7751_mem_resource, 63 .resources = sh7751_pci_resources,
64 .nr_resources = ARRAY_SIZE(sh7751_pci_resources),
64 .mem_offset = 0x00000000, 65 .mem_offset = 0x00000000,
65 .io_resource = &sh7751_io_resource,
66 .io_offset = 0x00000000, 66 .io_offset = 0x00000000,
67 .io_map_base = SH7751_PCI_IO_BASE, 67 .io_map_base = SH7751_PCI_IO_BASE,
68}; 68};
@@ -79,7 +79,6 @@ static int __init sh7751_pci_init(void)
79 struct pci_channel *chan = &sh7751_pci_controller; 79 struct pci_channel *chan = &sh7751_pci_controller;
80 unsigned int id; 80 unsigned int id;
81 u32 word, reg; 81 u32 word, reg;
82 int ret;
83 82
84 printk(KERN_NOTICE "PCI: Starting intialization.\n"); 83 printk(KERN_NOTICE "PCI: Starting intialization.\n");
85 84
@@ -93,13 +92,10 @@ static int __init sh7751_pci_init(void)
93 return -ENODEV; 92 return -ENODEV;
94 } 93 }
95 94
96 if ((ret = sh4_pci_check_direct(chan)) != 0)
97 return ret;
98
99 /* Set the BCR's to enable PCI access */ 95 /* Set the BCR's to enable PCI access */
100 reg = ctrl_inl(SH7751_BCR1); 96 reg = __raw_readl(SH7751_BCR1);
101 reg |= 0x80000; 97 reg |= 0x80000;
102 ctrl_outl(reg, SH7751_BCR1); 98 __raw_writel(reg, SH7751_BCR1);
103 99
104 /* Turn the clocks back on (not done in reset)*/ 100 /* Turn the clocks back on (not done in reset)*/
105 pci_write_reg(chan, 0, SH4_PCICLKR); 101 pci_write_reg(chan, 0, SH4_PCICLKR);
@@ -132,13 +128,13 @@ static int __init sh7751_pci_init(void)
132 /* Set the local 16MB PCI memory space window to 128 /* Set the local 16MB PCI memory space window to
133 * the lowest PCI mapped address 129 * the lowest PCI mapped address
134 */ 130 */
135 word = chan->mem_resource->start & SH4_PCIMBR_MASK; 131 word = chan->resources[1].start & SH4_PCIMBR_MASK;
136 pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word); 132 pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word);
137 pci_write_reg(chan, word , SH4_PCIMBR); 133 pci_write_reg(chan, word , SH4_PCIMBR);
138 134
139 /* Make sure the MSB's of IO window are set to access PCI space 135 /* Make sure the MSB's of IO window are set to access PCI space
140 * correctly */ 136 * correctly */
141 word = chan->io_resource->start & SH4_PCIIOBR_MASK; 137 word = chan->resources[0].start & SH4_PCIIOBR_MASK;
142 pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word); 138 pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word);
143 pci_write_reg(chan, word, SH4_PCIIOBR); 139 pci_write_reg(chan, word, SH4_PCIIOBR);
144 140
@@ -159,13 +155,13 @@ static int __init sh7751_pci_init(void)
159 return -1; 155 return -1;
160 156
161 /* configure the wait control registers */ 157 /* configure the wait control registers */
162 word = ctrl_inl(SH7751_WCR1); 158 word = __raw_readl(SH7751_WCR1);
163 pci_write_reg(chan, word, SH4_PCIWCR1); 159 pci_write_reg(chan, word, SH4_PCIWCR1);
164 word = ctrl_inl(SH7751_WCR2); 160 word = __raw_readl(SH7751_WCR2);
165 pci_write_reg(chan, word, SH4_PCIWCR2); 161 pci_write_reg(chan, word, SH4_PCIWCR2);
166 word = ctrl_inl(SH7751_WCR3); 162 word = __raw_readl(SH7751_WCR3);
167 pci_write_reg(chan, word, SH4_PCIWCR3); 163 pci_write_reg(chan, word, SH4_PCIWCR3);
168 word = ctrl_inl(SH7751_MCR); 164 word = __raw_readl(SH7751_MCR);
169 pci_write_reg(chan, word, SH4_PCIMCR); 165 pci_write_reg(chan, word, SH4_PCIMCR);
170 166
171 /* NOTE: I'm ignoring the PCI error IRQs for now.. 167 /* NOTE: I'm ignoring the PCI error IRQs for now..
@@ -180,8 +176,6 @@ static int __init sh7751_pci_init(void)
180 word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM; 176 word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;
181 pci_write_reg(chan, word, SH4_PCICR); 177 pci_write_reg(chan, word, SH4_PCICR);
182 178
183 register_pci_controller(chan); 179 return register_pci_controller(chan);
184
185 return 0;
186} 180}
187arch_initcall(sh7751_pci_init); 181arch_initcall(sh7751_pci_init);
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 323b92d565fe..ffdcbf10b95e 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Low-Level PCI Support for the SH7780 2 * Low-Level PCI Support for the SH7780
3 * 3 *
4 * Copyright (C) 2005 - 2009 Paul Mundt 4 * Copyright (C) 2005 - 2010 Paul Mundt
5 * 5 *
6 * This file is subject to the terms and conditions of the GNU General Public 6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 7 * License. See the file "COPYING" in the main directory of this archive
@@ -11,52 +11,240 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/interrupt.h>
15#include <linux/timer.h>
16#include <linux/irq.h>
14#include <linux/errno.h> 17#include <linux/errno.h>
15#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/log2.h>
16#include "pci-sh4.h" 20#include "pci-sh4.h"
21#include <asm/mmu.h>
22#include <asm/sizes.h>
17 23
18static struct resource sh7785_io_resource = { 24static struct resource sh7785_pci_resources[] = {
19 .name = "SH7785_IO", 25 {
20 .start = SH7780_PCI_IO_BASE, 26 .name = "PCI IO",
21 .end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1, 27 .start = 0x1000,
22 .flags = IORESOURCE_IO 28 .end = SZ_4M - 1,
23}; 29 .flags = IORESOURCE_IO,
24 30 }, {
25static struct resource sh7785_mem_resource = { 31 .name = "PCI MEM 0",
26 .name = "SH7785_mem", 32 .start = 0xfd000000,
27 .start = SH7780_PCI_MEMORY_BASE, 33 .end = 0xfd000000 + SZ_16M - 1,
28 .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1, 34 .flags = IORESOURCE_MEM,
29 .flags = IORESOURCE_MEM 35 }, {
36 .name = "PCI MEM 1",
37 .start = 0x10000000,
38 .end = 0x10000000 + SZ_64M - 1,
39 .flags = IORESOURCE_MEM,
40 }, {
41 /*
42 * 32-bit only resources must be last.
43 */
44 .name = "PCI MEM 2",
45 .start = 0xc0000000,
46 .end = 0xc0000000 + SZ_512M - 1,
47 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
48 },
30}; 49};
31 50
32static struct pci_channel sh7780_pci_controller = { 51static struct pci_channel sh7780_pci_controller = {
33 .pci_ops = &sh4_pci_ops, 52 .pci_ops = &sh4_pci_ops,
34 .mem_resource = &sh7785_mem_resource, 53 .resources = sh7785_pci_resources,
35 .mem_offset = 0x00000000, 54 .nr_resources = ARRAY_SIZE(sh7785_pci_resources),
36 .io_resource = &sh7785_io_resource, 55 .io_offset = 0,
37 .io_offset = 0x00000000, 56 .mem_offset = 0,
38 .io_map_base = SH7780_PCI_IO_BASE, 57 .io_map_base = 0xfe200000,
58 .serr_irq = evt2irq(0xa00),
59 .err_irq = evt2irq(0xaa0),
39}; 60};
40 61
41static struct sh4_pci_address_map sh7780_pci_map = { 62struct pci_errors {
42 .window0 = { 63 unsigned int mask;
43#if defined(CONFIG_32BIT) 64 const char *str;
44 .base = SH7780_32BIT_DDR_BASE_ADDR, 65} pci_arbiter_errors[] = {
45 .size = 0x40000000, 66 { SH4_PCIAINT_MBKN, "master broken" },
46#else 67 { SH4_PCIAINT_TBTO, "target bus time out" },
47 .base = SH7780_CS0_BASE_ADDR, 68 { SH4_PCIAINT_MBTO, "master bus time out" },
48 .size = 0x20000000, 69 { SH4_PCIAINT_TABT, "target abort" },
49#endif 70 { SH4_PCIAINT_MABT, "master abort" },
50 }, 71 { SH4_PCIAINT_RDPE, "read data parity error" },
72 { SH4_PCIAINT_WDPE, "write data parity error" },
73}, pci_interrupt_errors[] = {
74 { SH4_PCIINT_MLCK, "master lock error" },
75 { SH4_PCIINT_TABT, "target-target abort" },
76 { SH4_PCIINT_TRET, "target retry time out" },
77 { SH4_PCIINT_MFDE, "master function disable erorr" },
78 { SH4_PCIINT_PRTY, "address parity error" },
79 { SH4_PCIINT_SERR, "SERR" },
80 { SH4_PCIINT_TWDP, "data parity error for target write" },
81 { SH4_PCIINT_TRDP, "PERR detected for target read" },
82 { SH4_PCIINT_MTABT, "target abort for master" },
83 { SH4_PCIINT_MMABT, "master abort for master" },
84 { SH4_PCIINT_MWPD, "master write data parity error" },
85 { SH4_PCIINT_MRPD, "master read data parity error" },
51}; 86};
52 87
88static irqreturn_t sh7780_pci_err_irq(int irq, void *dev_id)
89{
90 struct pci_channel *hose = dev_id;
91 unsigned long addr;
92 unsigned int status;
93 unsigned int cmd;
94 int i;
95
96 addr = __raw_readl(hose->reg_base + SH4_PCIALR);
97
98 /*
99 * Handle status errors.
100 */
101 status = __raw_readw(hose->reg_base + PCI_STATUS);
102 if (status & (PCI_STATUS_PARITY |
103 PCI_STATUS_DETECTED_PARITY |
104 PCI_STATUS_SIG_TARGET_ABORT |
105 PCI_STATUS_REC_TARGET_ABORT |
106 PCI_STATUS_REC_MASTER_ABORT)) {
107 cmd = pcibios_handle_status_errors(addr, status, hose);
108 if (likely(cmd))
109 __raw_writew(cmd, hose->reg_base + PCI_STATUS);
110 }
111
112 /*
113 * Handle arbiter errors.
114 */
115 status = __raw_readl(hose->reg_base + SH4_PCIAINT);
116 for (i = cmd = 0; i < ARRAY_SIZE(pci_arbiter_errors); i++) {
117 if (status & pci_arbiter_errors[i].mask) {
118 printk(KERN_DEBUG "PCI: %s, addr=%08lx\n",
119 pci_arbiter_errors[i].str, addr);
120 cmd |= pci_arbiter_errors[i].mask;
121 }
122 }
123 __raw_writel(cmd, hose->reg_base + SH4_PCIAINT);
124
125 /*
126 * Handle the remaining PCI errors.
127 */
128 status = __raw_readl(hose->reg_base + SH4_PCIINT);
129 for (i = cmd = 0; i < ARRAY_SIZE(pci_interrupt_errors); i++) {
130 if (status & pci_interrupt_errors[i].mask) {
131 printk(KERN_DEBUG "PCI: %s, addr=%08lx\n",
132 pci_interrupt_errors[i].str, addr);
133 cmd |= pci_interrupt_errors[i].mask;
134 }
135 }
136 __raw_writel(cmd, hose->reg_base + SH4_PCIINT);
137
138 return IRQ_HANDLED;
139}
140
141static irqreturn_t sh7780_pci_serr_irq(int irq, void *dev_id)
142{
143 struct pci_channel *hose = dev_id;
144
145 printk(KERN_DEBUG "PCI: system error received: ");
146 pcibios_report_status(PCI_STATUS_SIG_SYSTEM_ERROR, 1);
147 printk("\n");
148
149 /* Deassert SERR */
150 __raw_writel(SH4_PCIINTM_SDIM, hose->reg_base + SH4_PCIINTM);
151
152 /* Back off the IRQ for awhile */
153 disable_irq_nosync(irq);
154 hose->serr_timer.expires = jiffies + HZ;
155 add_timer(&hose->serr_timer);
156
157 return IRQ_HANDLED;
158}
159
160static int __init sh7780_pci_setup_irqs(struct pci_channel *hose)
161{
162 int ret;
163
164 /* Clear out PCI arbiter IRQs */
165 __raw_writel(0, hose->reg_base + SH4_PCIAINT);
166
167 /* Clear all error conditions */
168 __raw_writew(PCI_STATUS_DETECTED_PARITY | \
169 PCI_STATUS_SIG_SYSTEM_ERROR | \
170 PCI_STATUS_REC_MASTER_ABORT | \
171 PCI_STATUS_REC_TARGET_ABORT | \
172 PCI_STATUS_SIG_TARGET_ABORT | \
173 PCI_STATUS_PARITY, hose->reg_base + PCI_STATUS);
174
175 ret = request_irq(hose->serr_irq, sh7780_pci_serr_irq, IRQF_DISABLED,
176 "PCI SERR interrupt", hose);
177 if (unlikely(ret)) {
178 printk(KERN_ERR "PCI: Failed hooking SERR IRQ\n");
179 return ret;
180 }
181
182 /*
183 * The PCI ERR IRQ needs to be IRQF_SHARED since all of the power
184 * down IRQ vectors are routed through the ERR IRQ vector. We
185 * only request_irq() once as there is only a single masking
186 * source for multiple events.
187 */
188 ret = request_irq(hose->err_irq, sh7780_pci_err_irq, IRQF_SHARED,
189 "PCI ERR interrupt", hose);
190 if (unlikely(ret)) {
191 free_irq(hose->serr_irq, hose);
192 return ret;
193 }
194
195 /* Unmask all of the arbiter IRQs. */
196 __raw_writel(SH4_PCIAINT_MBKN | SH4_PCIAINT_TBTO | SH4_PCIAINT_MBTO | \
197 SH4_PCIAINT_TABT | SH4_PCIAINT_MABT | SH4_PCIAINT_RDPE | \
198 SH4_PCIAINT_WDPE, hose->reg_base + SH4_PCIAINTM);
199
200 /* Unmask all of the PCI IRQs */
201 __raw_writel(SH4_PCIINTM_TTADIM | SH4_PCIINTM_TMTOIM | \
202 SH4_PCIINTM_MDEIM | SH4_PCIINTM_APEDIM | \
203 SH4_PCIINTM_SDIM | SH4_PCIINTM_DPEITWM | \
204 SH4_PCIINTM_PEDITRM | SH4_PCIINTM_TADIMM | \
205 SH4_PCIINTM_MADIMM | SH4_PCIINTM_MWPDIM | \
206 SH4_PCIINTM_MRDPEIM, hose->reg_base + SH4_PCIINTM);
207
208 return ret;
209}
210
211static inline void __init sh7780_pci_teardown_irqs(struct pci_channel *hose)
212{
213 free_irq(hose->err_irq, hose);
214 free_irq(hose->serr_irq, hose);
215}
216
217static void __init sh7780_pci66_init(struct pci_channel *hose)
218{
219 unsigned int tmp;
220
221 if (!pci_is_66mhz_capable(hose, 0, 0))
222 return;
223
224 /* Enable register access */
225 tmp = __raw_readl(hose->reg_base + SH4_PCICR);
226 tmp |= SH4_PCICR_PREFIX;
227 __raw_writel(tmp, hose->reg_base + SH4_PCICR);
228
229 /* Enable 66MHz operation */
230 tmp = __raw_readw(hose->reg_base + PCI_STATUS);
231 tmp |= PCI_STATUS_66MHZ;
232 __raw_writew(tmp, hose->reg_base + PCI_STATUS);
233
234 /* Done */
235 tmp = __raw_readl(hose->reg_base + SH4_PCICR);
236 tmp |= SH4_PCICR_PREFIX | SH4_PCICR_CFIN;
237 __raw_writel(tmp, hose->reg_base + SH4_PCICR);
238}
239
53static int __init sh7780_pci_init(void) 240static int __init sh7780_pci_init(void)
54{ 241{
55 struct pci_channel *chan = &sh7780_pci_controller; 242 struct pci_channel *chan = &sh7780_pci_controller;
243 phys_addr_t memphys;
244 size_t memsize;
56 unsigned int id; 245 unsigned int id;
57 const char *type = NULL; 246 const char *type;
58 int ret; 247 int ret, i;
59 u32 word;
60 248
61 printk(KERN_NOTICE "PCI: Starting intialization.\n"); 249 printk(KERN_NOTICE "PCI: Starting intialization.\n");
62 250
@@ -65,17 +253,28 @@ static int __init sh7780_pci_init(void)
65 /* Enable CPU access to the PCIC registers. */ 253 /* Enable CPU access to the PCIC registers. */
66 __raw_writel(PCIECR_ENBL, PCIECR); 254 __raw_writel(PCIECR_ENBL, PCIECR);
67 255
68 id = __raw_readw(chan->reg_base + SH7780_PCIVID); 256 /* Reset */
69 if (id != SH7780_VENDOR_ID) { 257 __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST,
258 chan->reg_base + SH4_PCICR);
259
260 /*
261 * Wait for it to come back up. The spec says to allow for up to
262 * 1 second after toggling the reset pin, but in practice 100ms
263 * is more than enough.
264 */
265 mdelay(100);
266
267 id = __raw_readw(chan->reg_base + PCI_VENDOR_ID);
268 if (id != PCI_VENDOR_ID_RENESAS) {
70 printk(KERN_ERR "PCI: Unknown vendor ID 0x%04x.\n", id); 269 printk(KERN_ERR "PCI: Unknown vendor ID 0x%04x.\n", id);
71 return -ENODEV; 270 return -ENODEV;
72 } 271 }
73 272
74 id = __raw_readw(chan->reg_base + SH7780_PCIDID); 273 id = __raw_readw(chan->reg_base + PCI_DEVICE_ID);
75 type = (id == SH7763_DEVICE_ID) ? "SH7763" : 274 type = (id == PCI_DEVICE_ID_RENESAS_SH7763) ? "SH7763" :
76 (id == SH7780_DEVICE_ID) ? "SH7780" : 275 (id == PCI_DEVICE_ID_RENESAS_SH7780) ? "SH7780" :
77 (id == SH7781_DEVICE_ID) ? "SH7781" : 276 (id == PCI_DEVICE_ID_RENESAS_SH7781) ? "SH7781" :
78 (id == SH7785_DEVICE_ID) ? "SH7785" : 277 (id == PCI_DEVICE_ID_RENESAS_SH7785) ? "SH7785" :
79 NULL; 278 NULL;
80 if (unlikely(!type)) { 279 if (unlikely(!type)) {
81 printk(KERN_ERR "PCI: Found an unsupported Renesas host " 280 printk(KERN_ERR "PCI: Found an unsupported Renesas host "
@@ -85,62 +284,119 @@ static int __init sh7780_pci_init(void)
85 284
86 printk(KERN_NOTICE "PCI: Found a Renesas %s host " 285 printk(KERN_NOTICE "PCI: Found a Renesas %s host "
87 "controller, revision %d.\n", type, 286 "controller, revision %d.\n", type,
88 __raw_readb(chan->reg_base + SH7780_PCIRID)); 287 __raw_readb(chan->reg_base + PCI_REVISION_ID));
89 288
90 if ((ret = sh4_pci_check_direct(chan)) != 0) 289 /*
290 * Now throw it in to register initialization mode and
291 * start the real work.
292 */
293 __raw_writel(SH4_PCICR_PREFIX, chan->reg_base + SH4_PCICR);
294
295 memphys = __pa(memory_start);
296 memsize = roundup_pow_of_two(memory_end - memory_start);
297
298 /*
299 * If there's more than 512MB of memory, we need to roll over to
300 * LAR1/LSR1.
301 */
302 if (memsize > SZ_512M) {
303 __raw_writel(memphys + SZ_512M, chan->reg_base + SH4_PCILAR1);
304 __raw_writel((((memsize - SZ_512M) - SZ_1M) & 0x1ff00000) | 1,
305 chan->reg_base + SH4_PCILSR1);
306 memsize = SZ_512M;
307 } else {
308 /*
309 * Otherwise just zero it out and disable it.
310 */
311 __raw_writel(0, chan->reg_base + SH4_PCILAR1);
312 __raw_writel(0, chan->reg_base + SH4_PCILSR1);
313 }
314
315 /*
316 * LAR0/LSR0 covers up to the first 512MB, which is enough to
317 * cover all of lowmem on most platforms.
318 */
319 __raw_writel(memphys, chan->reg_base + SH4_PCILAR0);
320 __raw_writel(((memsize - SZ_1M) & 0x1ff00000) | 1,
321 chan->reg_base + SH4_PCILSR0);
322
323 /*
324 * Hook up the ERR and SERR IRQs.
325 */
326 ret = sh7780_pci_setup_irqs(chan);
327 if (unlikely(ret))
91 return ret; 328 return ret;
92 329
93 /* 330 /*
94 * Set the class and sub-class codes. 331 * Disable the cache snoop controller for non-coherent DMA.
95 */ 332 */
96 __raw_writeb(PCI_CLASS_BRIDGE_HOST >> 8, 333 __raw_writel(0, chan->reg_base + SH7780_PCICSCR0);
97 chan->reg_base + SH7780_PCIBCC); 334 __raw_writel(0, chan->reg_base + SH7780_PCICSAR0);
98 __raw_writeb(PCI_CLASS_BRIDGE_HOST & 0xff, 335 __raw_writel(0, chan->reg_base + SH7780_PCICSCR1);
99 chan->reg_base + SH7780_PCISUB); 336 __raw_writel(0, chan->reg_base + SH7780_PCICSAR1);
100 337
101 /* 338 /*
102 * Set IO and Mem windows to local address 339 * Setup the memory BARs
103 * Make PCI and local address the same for easy 1 to 1 mapping
104 */ 340 */
105 pci_write_reg(chan, sh7780_pci_map.window0.size - 0xfffff, SH4_PCILSR0); 341 for (i = 1; i < chan->nr_resources; i++) {
106 /* Set the values on window 0 PCI config registers */ 342 struct resource *res = chan->resources + i;
107 pci_write_reg(chan, sh7780_pci_map.window0.base, SH4_PCILAR0); 343 resource_size_t size;
108 pci_write_reg(chan, sh7780_pci_map.window0.base, SH7780_PCIMBAR0);
109 344
110 pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM); 345 if (unlikely(res->flags & IORESOURCE_IO))
346 continue;
111 347
112 /* Set up standard PCI config registers */ 348 /*
113 __raw_writew(0xFB00, chan->reg_base + SH7780_PCISTATUS); 349 * Make sure we're in the right physical addressing mode
114 __raw_writew(0x0047, chan->reg_base + SH7780_PCICMD); 350 * for dealing with the resource.
115 __raw_writew(0x1912, chan->reg_base + SH7780_PCISVID); 351 */
116 __raw_writew(0x0001, chan->reg_base + SH7780_PCISID); 352 if ((res->flags & IORESOURCE_MEM_32BIT) && __in_29bit_mode()) {
353 chan->nr_resources--;
354 continue;
355 }
117 356
118 __raw_writeb(0x00, chan->reg_base + SH7780_PCIPIF); 357 size = resource_size(res);
358
359 /*
360 * The MBMR mask is calculated in units of 256kB, which
361 * keeps things pretty simple.
362 */
363 __raw_writel(((roundup_pow_of_two(size) / SZ_256K) - 1) << 18,
364 chan->reg_base + SH7780_PCIMBMR(i - 1));
365 __raw_writel(res->start, chan->reg_base + SH7780_PCIMBR(i - 1));
366 }
119 367
120 /* Apply any last-minute PCIC fixups */ 368 /*
121 pci_fixup_pcic(chan); 369 * And I/O.
370 */
371 __raw_writel(0, chan->reg_base + PCI_BASE_ADDRESS_0);
372 __raw_writel(0, chan->reg_base + SH7780_PCIIOBR);
373 __raw_writel(0, chan->reg_base + SH7780_PCIIOBMR);
122 374
123 pci_write_reg(chan, 0xfd000000, SH7780_PCIMBR0); 375 __raw_writew(PCI_COMMAND_SERR | PCI_COMMAND_WAIT | \
124 pci_write_reg(chan, 0x00fc0000, SH7780_PCIMBMR0); 376 PCI_COMMAND_PARITY | PCI_COMMAND_MASTER | \
377 PCI_COMMAND_MEMORY, chan->reg_base + PCI_COMMAND);
125 378
126#ifdef CONFIG_32BIT 379 /*
127 pci_write_reg(chan, 0xc0000000, SH7780_PCIMBR2); 380 * Initialization mode complete, release the control register and
128 pci_write_reg(chan, 0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); 381 * enable round robin mode to stop device overruns/starvation.
129#endif 382 */
383 __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO,
384 chan->reg_base + SH4_PCICR);
130 385
131 /* Set IOBR for windows containing area specified in pci.h */ 386 ret = register_pci_controller(chan);
132 pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1), 387 if (unlikely(ret))
133 SH7780_PCIIOBR); 388 goto err;
134 pci_write_reg(chan, ((SH7780_PCI_IO_SIZE-1) & (7<<18)),
135 SH7780_PCIIOBMR);
136 389
137 /* SH7780 init done, set central function init complete */ 390 sh7780_pci66_init(chan);
138 /* use round robin mode to stop a device starving/overruning */
139 word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO;
140 pci_write_reg(chan, word, SH4_PCICR);
141 391
142 register_pci_controller(chan); 392 printk(KERN_NOTICE "PCI: Running at %dMHz.\n",
393 (__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ) ?
394 66 : 33);
143 395
144 return 0; 396 return 0;
397
398err:
399 sh7780_pci_teardown_irqs(chan);
400 return ret;
145} 401}
146arch_initcall(sh7780_pci_init); 402arch_initcall(sh7780_pci_init);
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h
index 4a52478c97cf..205dcbefe275 100644
--- a/arch/sh/drivers/pci/pci-sh7780.h
+++ b/arch/sh/drivers/pci/pci-sh7780.h
@@ -12,12 +12,11 @@
12#ifndef _PCI_SH7780_H_ 12#ifndef _PCI_SH7780_H_
13#define _PCI_SH7780_H_ 13#define _PCI_SH7780_H_
14 14
15/* Platform Specific Values */ 15#define PCI_VENDOR_ID_RENESAS 0x1912
16#define SH7780_VENDOR_ID 0x1912 16#define PCI_DEVICE_ID_RENESAS_SH7781 0x0001
17#define SH7781_DEVICE_ID 0x0001 17#define PCI_DEVICE_ID_RENESAS_SH7780 0x0002
18#define SH7780_DEVICE_ID 0x0002 18#define PCI_DEVICE_ID_RENESAS_SH7763 0x0004
19#define SH7763_DEVICE_ID 0x0004 19#define PCI_DEVICE_ID_RENESAS_SH7785 0x0007
20#define SH7785_DEVICE_ID 0x0007
21 20
22/* SH7780 Control Registers */ 21/* SH7780 Control Registers */
23#define PCIECR 0xFE000008 22#define PCIECR 0xFE000008
@@ -27,44 +26,9 @@
27#define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */ 26#define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */
28#define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */ 27#define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */
29 28
30#define SH7780_PCI_MEMORY_BASE 0xFD000000 /* Memory space base addr */
31#define SH7780_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
32
33#define SH7780_PCI_IO_BASE 0xFE200000 /* IO space base address */
34#define SH7780_PCI_IO_SIZE 0x00400000 /* Size of IO window */
35
36#define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */ 29#define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */
37 30
38/* SH7780 PCI Config Registers */ 31/* SH7780 PCI Config Registers */
39#define SH7780_PCIVID 0x000 /* Vendor ID */
40#define SH7780_PCIDID 0x002 /* Device ID */
41#define SH7780_PCICMD 0x004 /* Command */
42#define SH7780_PCISTATUS 0x006 /* Status */
43#define SH7780_PCIRID 0x008 /* Revision ID */
44#define SH7780_PCIPIF 0x009 /* Program Interface */
45#define SH7780_PCISUB 0x00a /* Sub class code */
46#define SH7780_PCIBCC 0x00b /* Base class code */
47#define SH7780_PCICLS 0x00c /* Cache line size */
48#define SH7780_PCILTM 0x00d /* latency timer */
49#define SH7780_PCIHDR 0x00e /* Header type */
50#define SH7780_PCIBIST 0x00f /* BIST */
51#define SH7780_PCIIBAR 0x010 /* IO Base address */
52#define SH7780_PCIMBAR0 0x014 /* Memory base address0 */
53#define SH7780_PCIMBAR1 0x018 /* Memory base address1 */
54#define SH7780_PCISVID 0x02c /* Sub system vendor ID */
55#define SH7780_PCISID 0x02e /* Sub system ID */
56#define SH7780_PCICP 0x034
57#define SH7780_PCIINTLINE 0x03c /* Interrupt line */
58#define SH7780_PCIINTPIN 0x03d /* Interrupt pin */
59#define SH7780_PCIMINGNT 0x03e /* Minumum grand */
60#define SH7780_PCIMAXLAT 0x03f /* Maxmum latency */
61#define SH7780_PCICID 0x040
62#define SH7780_PCINIP 0x041
63#define SH7780_PCIPMC 0x042
64#define SH7780_PCIPMCSR 0x044
65#define SH7780_PCIPMCSR_BSE 0x046
66#define SH7780_PCICDD 0x047
67
68#define SH7780_PCIIR 0x114 /* PCI Interrupt Register */ 32#define SH7780_PCIIR 0x114 /* PCI Interrupt Register */
69#define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */ 33#define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */
70#define SH7780_PCIAIR 0x11C /* Error Address Register */ 34#define SH7780_PCIAIR 0x11C /* Error Address Register */
@@ -76,10 +40,8 @@
76#define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ 40#define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
77#define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ 41#define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */
78 42
79#define SH7780_PCIMBR0 0x1E0 43#define SH7780_PCIMBR(x) (0x1E0 + ((x) * 8))
80#define SH7780_PCIMBMR0 0x1E4 44#define SH7780_PCIMBMR(x) (0x1E4 + ((x) * 8))
81#define SH7780_PCIMBR2 0x1F0
82#define SH7780_PCIMBMR2 0x1F4
83#define SH7780_PCIIOBR 0x1F8 45#define SH7780_PCIIOBR 0x1F8
84#define SH7780_PCIIOBMR 0x1FC 46#define SH7780_PCIIOBMR 0x1FC
85#define SH7780_PCICSCR0 0x210 /* Cache Snoop1 Cnt. Register */ 47#define SH7780_PCICSCR0 0x210 /* Cache Snoop1 Cnt. Register */
@@ -87,16 +49,4 @@
87#define SH7780_PCICSAR0 0x218 /* Cache Snoop1 Addr. Register */ 49#define SH7780_PCICSAR0 0x218 /* Cache Snoop1 Addr. Register */
88#define SH7780_PCICSAR1 0x21C /* Cache Snoop2 Addr. Register */ 50#define SH7780_PCICSAR1 0x21C /* Cache Snoop2 Addr. Register */
89 51
90/* General Memory Config Addresses */
91#define SH7780_CS0_BASE_ADDR 0x0
92#define SH7780_MEM_REGION_SIZE 0x04000000
93#define SH7780_CS1_BASE_ADDR (SH7780_CS0_BASE_ADDR + SH7780_MEM_REGION_SIZE)
94#define SH7780_CS2_BASE_ADDR (SH7780_CS1_BASE_ADDR + SH7780_MEM_REGION_SIZE)
95#define SH7780_CS3_BASE_ADDR (SH7780_CS2_BASE_ADDR + SH7780_MEM_REGION_SIZE)
96#define SH7780_CS4_BASE_ADDR (SH7780_CS3_BASE_ADDR + SH7780_MEM_REGION_SIZE)
97#define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE)
98#define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE)
99
100#define SH7780_32BIT_DDR_BASE_ADDR 0x40000000
101
102#endif /* _PCI_SH7780_H_ */ 52#endif /* _PCI_SH7780_H_ */
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 96213fd172ce..953af139e230 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -33,15 +33,22 @@ static int pci_initialized;
33static void __devinit pcibios_scanbus(struct pci_channel *hose) 33static void __devinit pcibios_scanbus(struct pci_channel *hose)
34{ 34{
35 static int next_busno; 35 static int next_busno;
36 static int need_domain_info;
36 struct pci_bus *bus; 37 struct pci_bus *bus;
37 38
38 bus = pci_scan_bus(next_busno, hose->pci_ops, hose); 39 bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
40 hose->bus = bus;
41
42 need_domain_info = need_domain_info || hose->index;
43 hose->need_domain_info = need_domain_info;
39 if (bus) { 44 if (bus) {
40 next_busno = bus->subordinate + 1; 45 next_busno = bus->subordinate + 1;
41 /* Don't allow 8-bit bus number overflow inside the hose - 46 /* Don't allow 8-bit bus number overflow inside the hose -
42 reserve some space for bridges. */ 47 reserve some space for bridges. */
43 if (next_busno > 224) 48 if (next_busno > 224) {
44 next_busno = 0; 49 next_busno = 0;
50 need_domain_info = 1;
51 }
45 52
46 pci_bus_size_bridges(bus); 53 pci_bus_size_bridges(bus);
47 pci_bus_assign_resources(bus); 54 pci_bus_assign_resources(bus);
@@ -51,10 +58,21 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose)
51 58
52static DEFINE_MUTEX(pci_scan_mutex); 59static DEFINE_MUTEX(pci_scan_mutex);
53 60
54void __devinit register_pci_controller(struct pci_channel *hose) 61int __devinit register_pci_controller(struct pci_channel *hose)
55{ 62{
56 request_resource(&iomem_resource, hose->mem_resource); 63 int i;
57 request_resource(&ioport_resource, hose->io_resource); 64
65 for (i = 0; i < hose->nr_resources; i++) {
66 struct resource *res = hose->resources + i;
67
68 if (res->flags & IORESOURCE_IO) {
69 if (request_resource(&ioport_resource, res) < 0)
70 goto out;
71 } else {
72 if (request_resource(&iomem_resource, res) < 0)
73 goto out;
74 }
75 }
58 76
59 *hose_tail = hose; 77 *hose_tail = hose;
60 hose_tail = &hose->next; 78 hose_tail = &hose->next;
@@ -68,6 +86,11 @@ void __devinit register_pci_controller(struct pci_channel *hose)
68 } 86 }
69 87
70 /* 88 /*
89 * Setup the ERR/PERR and SERR timers, if available.
90 */
91 pcibios_enable_timers(hose);
92
93 /*
71 * Scan the bus if it is register after the PCI subsystem 94 * Scan the bus if it is register after the PCI subsystem
72 * initialization. 95 * initialization.
73 */ 96 */
@@ -76,6 +99,15 @@ void __devinit register_pci_controller(struct pci_channel *hose)
76 pcibios_scanbus(hose); 99 pcibios_scanbus(hose);
77 mutex_unlock(&pci_scan_mutex); 100 mutex_unlock(&pci_scan_mutex);
78 } 101 }
102
103 return 0;
104
105out:
106 for (--i; i >= 0; i--)
107 release_resource(&hose->resources[i]);
108
109 printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
110 return -1;
79} 111}
80 112
81static int __init pcibios_init(void) 113static int __init pcibios_init(void)
@@ -127,11 +159,13 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
127{ 159{
128 struct pci_dev *dev = bus->self; 160 struct pci_dev *dev = bus->self;
129 struct list_head *ln; 161 struct list_head *ln;
130 struct pci_channel *chan = bus->sysdata; 162 struct pci_channel *hose = bus->sysdata;
131 163
132 if (!dev) { 164 if (!dev) {
133 bus->resource[0] = chan->io_resource; 165 int i;
134 bus->resource[1] = chan->mem_resource; 166
167 for (i = 0; i < hose->nr_resources; i++)
168 bus->resource[i] = hose->resources + i;
135 } 169 }
136 170
137 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) { 171 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
@@ -152,30 +186,25 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
152 resource_size_t size, resource_size_t align) 186 resource_size_t size, resource_size_t align)
153{ 187{
154 struct pci_dev *dev = data; 188 struct pci_dev *dev = data;
155 struct pci_channel *chan = dev->sysdata; 189 struct pci_channel *hose = dev->sysdata;
156 resource_size_t start = res->start; 190 resource_size_t start = res->start;
157 191
158 if (res->flags & IORESOURCE_IO) { 192 if (res->flags & IORESOURCE_IO) {
159 if (start < PCIBIOS_MIN_IO + chan->io_resource->start) 193 if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
160 start = PCIBIOS_MIN_IO + chan->io_resource->start; 194 start = PCIBIOS_MIN_IO + hose->resources[0].start;
161 195
162 /* 196 /*
163 * Put everything into 0x00-0xff region modulo 0x400. 197 * Put everything into 0x00-0xff region modulo 0x400.
164 */ 198 */
165 if (start & 0x300) { 199 if (start & 0x300)
166 start = (start + 0x3ff) & ~0x3ff; 200 start = (start + 0x3ff) & ~0x3ff;
167 res->start = start;
168 }
169 } else if (res->flags & IORESOURCE_MEM) {
170 if (start < PCIBIOS_MIN_MEM + chan->mem_resource->start)
171 start = PCIBIOS_MIN_MEM + chan->mem_resource->start;
172 } 201 }
173 202
174 return start; 203 return start;
175} 204}
176 205
177void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 206void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
178 struct resource *res) 207 struct resource *res)
179{ 208{
180 struct pci_channel *hose = dev->sysdata; 209 struct pci_channel *hose = dev->sysdata;
181 unsigned long offset = 0; 210 unsigned long offset = 0;
@@ -189,9 +218,8 @@ void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
189 region->end = res->end - offset; 218 region->end = res->end - offset;
190} 219}
191 220
192void __devinit 221void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
193pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 222 struct pci_bus_region *region)
194 struct pci_bus_region *region)
195{ 223{
196 struct pci_channel *hose = dev->sysdata; 224 struct pci_channel *hose = dev->sysdata;
197 unsigned long offset = 0; 225 unsigned long offset = 0;
@@ -274,6 +302,86 @@ char * __devinit pcibios_setup(char *str)
274 return str; 302 return str;
275} 303}
276 304
305static void __init
306pcibios_bus_report_status_early(struct pci_channel *hose,
307 int top_bus, int current_bus,
308 unsigned int status_mask, int warn)
309{
310 unsigned int pci_devfn;
311 u16 status;
312 int ret;
313
314 for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
315 if (PCI_FUNC(pci_devfn))
316 continue;
317 ret = early_read_config_word(hose, top_bus, current_bus,
318 pci_devfn, PCI_STATUS, &status);
319 if (ret != PCIBIOS_SUCCESSFUL)
320 continue;
321 if (status == 0xffff)
322 continue;
323
324 early_write_config_word(hose, top_bus, current_bus,
325 pci_devfn, PCI_STATUS,
326 status & status_mask);
327 if (warn)
328 printk("(%02x:%02x: %04X) ", current_bus,
329 pci_devfn, status);
330 }
331}
332
333/*
334 * We can't use pci_find_device() here since we are
335 * called from interrupt context.
336 */
337static void __init_refok
338pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
339 int warn)
340{
341 struct pci_dev *dev;
342
343 list_for_each_entry(dev, &bus->devices, bus_list) {
344 u16 status;
345
346 /*
347 * ignore host bridge - we handle
348 * that separately
349 */
350 if (dev->bus->number == 0 && dev->devfn == 0)
351 continue;
352
353 pci_read_config_word(dev, PCI_STATUS, &status);
354 if (status == 0xffff)
355 continue;
356
357 if ((status & status_mask) == 0)
358 continue;
359
360 /* clear the status errors */
361 pci_write_config_word(dev, PCI_STATUS, status & status_mask);
362
363 if (warn)
364 printk("(%s: %04X) ", pci_name(dev), status);
365 }
366
367 list_for_each_entry(dev, &bus->devices, bus_list)
368 if (dev->subordinate)
369 pcibios_bus_report_status(dev->subordinate, status_mask, warn);
370}
371
372void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
373{
374 struct pci_channel *hose;
375
376 for (hose = hose_head; hose; hose = hose->next) {
377 if (unlikely(!hose->bus))
378 pcibios_bus_report_status_early(hose, hose_head->index,
379 hose->index, status_mask, warn);
380 else
381 pcibios_bus_report_status(hose->bus, status_mask, warn);
382 }
383}
384
277int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 385int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
278 enum pci_mmap_state mmap_state, int write_combine) 386 enum pci_mmap_state mmap_state, int write_combine)
279{ 387{
@@ -302,9 +410,15 @@ static void __iomem *ioport_map_pci(struct pci_dev *dev,
302{ 410{
303 struct pci_channel *chan = dev->sysdata; 411 struct pci_channel *chan = dev->sysdata;
304 412
305 if (!chan->io_map_base) 413 if (unlikely(!chan->io_map_base)) {
306 chan->io_map_base = generic_io_base; 414 chan->io_map_base = generic_io_base;
307 415
416 if (pci_domains_supported)
417 panic("To avoid data corruption io_map_base MUST be "
418 "set with multiple PCI domains.");
419 }
420
421
308 return (void __iomem *)(chan->io_map_base + port); 422 return (void __iomem *)(chan->io_map_base + port);
309} 423}
310 424
@@ -321,20 +435,9 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
321 435
322 if (flags & IORESOURCE_IO) 436 if (flags & IORESOURCE_IO)
323 return ioport_map_pci(dev, start, len); 437 return ioport_map_pci(dev, start, len);
324
325 /*
326 * Presently the IORESOURCE_MEM case is a bit special, most
327 * SH7751 style PCI controllers have PCI memory at a fixed
328 * location in the address space where no remapping is desired.
329 * With the IORESOURCE_MEM case more care has to be taken
330 * to inhibit page table mapping for legacy cores, but this is
331 * punted off to __ioremap().
332 * -- PFM.
333 */
334 if (flags & IORESOURCE_MEM) { 438 if (flags & IORESOURCE_MEM) {
335 if (flags & IORESOURCE_CACHEABLE) 439 if (flags & IORESOURCE_CACHEABLE)
336 return ioremap(start, len); 440 return ioremap(start, len);
337
338 return ioremap_nocache(start, len); 441 return ioremap_nocache(start, len);
339 } 442 }
340 443
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index ac37ee879bab..ae91a2dd9183 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Low-Level PCI Express Support for the SH7786 2 * Low-Level PCI Express Support for the SH7786
3 * 3 *
4 * Copyright (C) 2009 Paul Mundt 4 * Copyright (C) 2009 - 2010 Paul Mundt
5 * 5 *
6 * This file is subject to the terms and conditions of the GNU General Public 6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 7 * License. See the file "COPYING" in the main directory of this archive
@@ -30,60 +30,84 @@ static struct sh7786_pcie_hwops {
30 int (*port_init_hw)(struct sh7786_pcie_port *port); 30 int (*port_init_hw)(struct sh7786_pcie_port *port);
31} *sh7786_pcie_hwops; 31} *sh7786_pcie_hwops;
32 32
33static struct resource sh7786_pci_32bit_mem_resources[] = { 33static struct resource sh7786_pci0_resources[] = {
34 { 34 {
35 .name = "pci0_mem", 35 .name = "PCIe0 IO",
36 .start = SH4A_PCIMEM_BASEA, 36 .start = 0xfd000000,
37 .end = SH4A_PCIMEM_BASEA + SZ_64M - 1, 37 .end = 0xfd000000 + SZ_8M - 1,
38 .flags = IORESOURCE_MEM, 38 .flags = IORESOURCE_IO,
39 }, { 39 }, {
40 .name = "pci1_mem", 40 .name = "PCIe0 MEM 0",
41 .start = SH4A_PCIMEM_BASEA1, 41 .start = 0xc0000000,
42 .end = SH4A_PCIMEM_BASEA1 + SZ_64M - 1, 42 .end = 0xc0000000 + SZ_512M - 1,
43 .flags = IORESOURCE_MEM, 43 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
44 }, { 44 }, {
45 .name = "pci2_mem", 45 .name = "PCIe0 MEM 1",
46 .start = SH4A_PCIMEM_BASEA2, 46 .start = 0x10000000,
47 .end = SH4A_PCIMEM_BASEA2 + SZ_64M - 1, 47 .end = 0x10000000 + SZ_64M - 1,
48 .flags = IORESOURCE_MEM, 48 .flags = IORESOURCE_MEM,
49 }, {
50 .name = "PCIe0 MEM 2",
51 .start = 0xfe100000,
52 .end = 0xfe100000 + SZ_1M - 1,
49 }, 53 },
50}; 54};
51 55
52static struct resource sh7786_pci_29bit_mem_resource = { 56static struct resource sh7786_pci1_resources[] = {
53 .start = SH4A_PCIMEM_BASE, 57 {
54 .end = SH4A_PCIMEM_BASE + SZ_64M - 1, 58 .name = "PCIe1 IO",
55 .flags = IORESOURCE_MEM, 59 .start = 0xfd800000,
60 .end = 0xfd800000 + SZ_8M - 1,
61 .flags = IORESOURCE_IO,
62 }, {
63 .name = "PCIe1 MEM 0",
64 .start = 0xa0000000,
65 .end = 0xa0000000 + SZ_512M - 1,
66 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
67 }, {
68 .name = "PCIe1 MEM 1",
69 .start = 0x30000000,
70 .end = 0x30000000 + SZ_256M - 1,
71 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
72 }, {
73 .name = "PCIe1 MEM 2",
74 .start = 0xfe300000,
75 .end = 0xfe300000 + SZ_1M - 1,
76 },
56}; 77};
57 78
58static struct resource sh7786_pci_io_resources[] = { 79static struct resource sh7786_pci2_resources[] = {
59 { 80 {
60 .name = "pci0_io", 81 .name = "PCIe2 IO",
61 .start = SH4A_PCIIO_BASE, 82 .start = 0xfc800000,
62 .end = SH4A_PCIIO_BASE + SZ_8M - 1, 83 .end = 0xfc800000 + SZ_4M - 1,
63 .flags = IORESOURCE_IO,
64 }, { 84 }, {
65 .name = "pci1_io", 85 .name = "PCIe2 MEM 0",
66 .start = SH4A_PCIIO_BASE1, 86 .start = 0x80000000,
67 .end = SH4A_PCIIO_BASE1 + SZ_8M - 1, 87 .end = 0x80000000 + SZ_512M - 1,
68 .flags = IORESOURCE_IO, 88 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
69 }, { 89 }, {
70 .name = "pci2_io", 90 .name = "PCIe2 MEM 1",
71 .start = SH4A_PCIIO_BASE2, 91 .start = 0x20000000,
72 .end = SH4A_PCIIO_BASE2 + SZ_4M - 1, 92 .end = 0x20000000 + SZ_256M - 1,
73 .flags = IORESOURCE_IO, 93 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
94 }, {
95 .name = "PCIe2 MEM 2",
96 .start = 0xfcd00000,
97 .end = 0xfcd00000 + SZ_1M - 1,
74 }, 98 },
75}; 99};
76 100
77extern struct pci_ops sh7786_pci_ops; 101extern struct pci_ops sh7786_pci_ops;
78 102
79#define DEFINE_CONTROLLER(start, idx) \ 103#define DEFINE_CONTROLLER(start, idx) \
80{ \ 104{ \
81 .pci_ops = &sh7786_pci_ops, \ 105 .pci_ops = &sh7786_pci_ops, \
82 .reg_base = start, \ 106 .resources = sh7786_pci##idx##_resources, \
83 /* mem_resource filled in at probe time */ \ 107 .nr_resources = ARRAY_SIZE(sh7786_pci##idx##_resources), \
84 .mem_offset = 0, \ 108 .reg_base = start, \
85 .io_resource = &sh7786_pci_io_resources[idx], \ 109 .mem_offset = 0, \
86 .io_offset = 0, \ 110 .io_offset = 0, \
87} 111}
88 112
89static struct pci_channel sh7786_pci_channels[] = { 113static struct pci_channel sh7786_pci_channels[] = {
@@ -180,7 +204,9 @@ static int pcie_init(struct sh7786_pcie_port *port)
180{ 204{
181 struct pci_channel *chan = port->hose; 205 struct pci_channel *chan = port->hose;
182 unsigned int data; 206 unsigned int data;
183 int ret; 207 phys_addr_t memphys;
208 size_t memsize;
209 int ret, i;
184 210
185 /* Begin initialization */ 211 /* Begin initialization */
186 pci_write_reg(chan, 0, SH4A_PCIETCTLR); 212 pci_write_reg(chan, 0, SH4A_PCIETCTLR);
@@ -203,15 +229,24 @@ static int pcie_init(struct sh7786_pcie_port *port)
203 data |= PCI_CAP_ID_EXP; 229 data |= PCI_CAP_ID_EXP;
204 pci_write_reg(chan, data, SH4A_PCIEEXPCAP0); 230 pci_write_reg(chan, data, SH4A_PCIEEXPCAP0);
205 231
206 /* Enable x4 link width and extended sync. */ 232 /* Enable data link layer active state reporting */
233 pci_write_reg(chan, PCI_EXP_LNKCAP_DLLLARC, SH4A_PCIEEXPCAP3);
234
235 /* Enable extended sync and ASPM L0s support */
207 data = pci_read_reg(chan, SH4A_PCIEEXPCAP4); 236 data = pci_read_reg(chan, SH4A_PCIEEXPCAP4);
208 data &= ~(PCI_EXP_LNKSTA_NLW << 16); 237 data &= ~PCI_EXP_LNKCTL_ASPMC;
209 data |= (1 << 22) | PCI_EXP_LNKCTL_ES; 238 data |= PCI_EXP_LNKCTL_ES | 1;
210 pci_write_reg(chan, data, SH4A_PCIEEXPCAP4); 239 pci_write_reg(chan, data, SH4A_PCIEEXPCAP4);
211 240
241 /* Write out the physical slot number */
242 data = pci_read_reg(chan, SH4A_PCIEEXPCAP5);
243 data &= ~PCI_EXP_SLTCAP_PSN;
244 data |= (port->index + 1) << 19;
245 pci_write_reg(chan, data, SH4A_PCIEEXPCAP5);
246
212 /* Set the completion timer timeout to the maximum 32ms. */ 247 /* Set the completion timer timeout to the maximum 32ms. */
213 data = pci_read_reg(chan, SH4A_PCIETLCTLR); 248 data = pci_read_reg(chan, SH4A_PCIETLCTLR);
214 data &= ~0xffff; 249 data &= ~0x3f00;
215 data |= 0x32 << 8; 250 data |= 0x32 << 8;
216 pci_write_reg(chan, data, SH4A_PCIETLCTLR); 251 pci_write_reg(chan, data, SH4A_PCIETLCTLR);
217 252
@@ -224,6 +259,33 @@ static int pcie_init(struct sh7786_pcie_port *port)
224 data |= (0xff << 16); 259 data |= (0xff << 16);
225 pci_write_reg(chan, data, SH4A_PCIEMACCTLR); 260 pci_write_reg(chan, data, SH4A_PCIEMACCTLR);
226 261
262 memphys = __pa(memory_start);
263 memsize = roundup_pow_of_two(memory_end - memory_start);
264
265 /*
266 * If there's more than 512MB of memory, we need to roll over to
267 * LAR1/LAMR1.
268 */
269 if (memsize > SZ_512M) {
270 __raw_writel(memphys + SZ_512M, chan->reg_base + SH4A_PCIELAR1);
271 __raw_writel(((memsize - SZ_512M) - SZ_256) | 1,
272 chan->reg_base + SH4A_PCIELAMR1);
273 memsize = SZ_512M;
274 } else {
275 /*
276 * Otherwise just zero it out and disable it.
277 */
278 __raw_writel(0, chan->reg_base + SH4A_PCIELAR1);
279 __raw_writel(0, chan->reg_base + SH4A_PCIELAMR1);
280 }
281
282 /*
283 * LAR0/LAMR0 covers up to the first 512MB, which is enough to
284 * cover all of lowmem on most platforms.
285 */
286 __raw_writel(memphys, chan->reg_base + SH4A_PCIELAR0);
287 __raw_writel((memsize - SZ_256) | 1, chan->reg_base + SH4A_PCIELAMR0);
288
227 /* Finish initialization */ 289 /* Finish initialization */
228 data = pci_read_reg(chan, SH4A_PCIETCTLR); 290 data = pci_read_reg(chan, SH4A_PCIETCTLR);
229 data |= 0x1; 291 data |= 0x1;
@@ -243,10 +305,14 @@ static int pcie_init(struct sh7786_pcie_port *port)
243 if (unlikely(ret != 0)) 305 if (unlikely(ret != 0))
244 return -ENODEV; 306 return -ENODEV;
245 307
246 pci_write_reg(chan, 0x00100007, SH4A_PCIEPCICONF1); 308 data = pci_read_reg(chan, SH4A_PCIEPCICONF1);
309 data &= ~(PCI_STATUS_DEVSEL_MASK << 16);
310 data |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
311 (PCI_STATUS_CAP_LIST | PCI_STATUS_DEVSEL_FAST) << 16;
312 pci_write_reg(chan, data, SH4A_PCIEPCICONF1);
313
247 pci_write_reg(chan, 0x80888000, SH4A_PCIETXVC0DCTLR); 314 pci_write_reg(chan, 0x80888000, SH4A_PCIETXVC0DCTLR);
248 pci_write_reg(chan, 0x00222000, SH4A_PCIERXVC0DCTLR); 315 pci_write_reg(chan, 0x00222000, SH4A_PCIERXVC0DCTLR);
249 pci_write_reg(chan, 0x000050A0, SH4A_PCIEEXPCAP2);
250 316
251 wmb(); 317 wmb();
252 318
@@ -254,15 +320,32 @@ static int pcie_init(struct sh7786_pcie_port *port)
254 printk(KERN_NOTICE "PCI: PCIe#%d link width %d\n", 320 printk(KERN_NOTICE "PCI: PCIe#%d link width %d\n",
255 port->index, (data >> 20) & 0x3f); 321 port->index, (data >> 20) & 0x3f);
256 322
257 pci_write_reg(chan, 0x007c0000, SH4A_PCIEPAMR0);
258 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARH0);
259 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARL0);
260 pci_write_reg(chan, 0x80000100, SH4A_PCIEPTCTLR0);
261 323
262 pci_write_reg(chan, 0x03fc0000, SH4A_PCIEPAMR2); 324 for (i = 0; i < chan->nr_resources; i++) {
263 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARH2); 325 struct resource *res = chan->resources + i;
264 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARL2); 326 resource_size_t size;
265 pci_write_reg(chan, 0x80000000, SH4A_PCIEPTCTLR2); 327 u32 enable_mask;
328
329 pci_write_reg(chan, 0x00000000, SH4A_PCIEPTCTLR(i));
330
331 size = resource_size(res);
332
333 /*
334 * The PAMR mask is calculated in units of 256kB, which
335 * keeps things pretty simple.
336 */
337 __raw_writel(((roundup_pow_of_two(size) / SZ_256K) - 1) << 18,
338 chan->reg_base + SH4A_PCIEPAMR(i));
339
340 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARH(i));
341 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARL(i));
342
343 enable_mask = MASK_PARE;
344 if (res->flags & IORESOURCE_IO)
345 enable_mask |= MASK_SPC;
346
347 pci_write_reg(chan, enable_mask, SH4A_PCIEPTCTLR(i));
348 }
266 349
267 return 0; 350 return 0;
268} 351}
@@ -296,9 +379,7 @@ static int __devinit sh7786_pcie_init_hw(struct sh7786_pcie_port *port)
296 if (unlikely(ret < 0)) 379 if (unlikely(ret < 0))
297 return ret; 380 return ret;
298 381
299 register_pci_controller(port->hose); 382 return register_pci_controller(port->hose);
300
301 return 0;
302} 383}
303 384
304static struct sh7786_pcie_hwops sh7786_65nm_pcie_hwops __initdata = { 385static struct sh7786_pcie_hwops sh7786_65nm_pcie_hwops __initdata = {
@@ -332,17 +413,7 @@ static int __init sh7786_pcie_init(void)
332 413
333 port->index = i; 414 port->index = i;
334 port->hose = sh7786_pci_channels + i; 415 port->hose = sh7786_pci_channels + i;
335 port->hose->io_map_base = port->hose->io_resource->start; 416 port->hose->io_map_base = port->hose->resources[0].start;
336
337 /*
338 * Check if we are booting in 29 or 32-bit mode
339 *
340 * 32-bit mode provides each controller with its own
341 * memory window, while 29-bit mode uses a shared one.
342 */
343 port->hose->mem_resource = test_mode_pin(MODE_PIN10) ?
344 &sh7786_pci_32bit_mem_resources[i] :
345 &sh7786_pci_29bit_mem_resource;
346 417
347 ret |= sh7786_pcie_hwops->port_init_hw(port); 418 ret |= sh7786_pcie_hwops->port_init_hw(port);
348 } 419 }
diff --git a/arch/sh/drivers/pci/pcie-sh7786.h b/arch/sh/drivers/pci/pcie-sh7786.h
index c655290a7750..90a6992576b0 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.h
+++ b/arch/sh/drivers/pci/pcie-sh7786.h
@@ -30,47 +30,9 @@
30 * for other(Max Payload Size=4096B,PCIIO_SIZE=8M) 30 * for other(Max Payload Size=4096B,PCIIO_SIZE=8M)
31 */ 31 */
32 32
33/* PCI0-0: PCI I/O space */
34#define SH4A_PCIIO_BASE 0xFD000000 /* PCI I/O for controller 0 */
35#define SH4A_PCIIO_BASE1 0xFD800000 /* PCI I/O for controller 1 (Rev1.14)*/
36#define SH4A_PCIIO_BASE2 0xFC800000 /* PCI I/O for controller 2 (Rev1.171)*/
37
38#define SH4A_PCIIO_SIZE64 0x00010000 /* PLX allows only 64K */
39#define SH4A_PCIIO_SIZE 0x00800000 /* 8M */
40#define SH4A_PCIIO_SIZE2 0x00400000 /* 4M (Rev1.171)*/
41
42/* PCI0-1: PCI memory space 29-bit address */
43#define SH4A_PCIMEM_BASE 0x10000000
44#define SH4A_PCIMEM_SIZE 0x04000000 /* 64M */
45
46/* PCI0-2: PCI memory space 32-bit address */
47#define SH4A_PCIMEM_BASEA 0xC0000000 /* for controller 0 */
48#define SH4A_PCIMEM_BASEA1 0xA0000000 /* for controller 1 (Rev1.14)*/
49#define SH4A_PCIMEM_BASEA2 0x80000000 /* for controller 2 (Rev1.171)*/
50#define SH4A_PCIMEM_SIZEA 0x20000000 /* 512M */
51
52/* PCI0: PCI memory target transfer 32-bit address translation value(Rev1.11T)*/ 33/* PCI0: PCI memory target transfer 32-bit address translation value(Rev1.11T)*/
53#define SH4A_PCIBMSTR_TRANSLATION 0x20000000 34#define SH4A_PCIBMSTR_TRANSLATION 0x20000000
54 35
55#define SH4A_PCI_DEVICE_ID 0x0002
56#define SH4A_PCI_VENDOR_ID 0x1912
57
58// PCI compatible 000-03f
59#define PCI_CMD 0x004
60#define PCI_RID 0x008
61#define PCI_IBAR 0x010
62#define PCI_MBAR0 0x014
63#define PCI_MBAR1 0x018
64
65/* PCI power management/MSI/capablity 040-0ff */
66/* PCIE extended 100-fff */
67
68/* SH7786 device identification */ // Rev1.171
69#define SH4A_PVR (0xFF000030)
70#define SH4A_PVR_SHX3 (0x10400000)
71#define SH4A_PRR (0xFF000044)
72#define SH4A_PRR_SH7786 (0x00000400) // Rev1.171
73
74/* SPVCR0 */ 36/* SPVCR0 */
75#define SH4A_PCIEVCR0 (0x000000) /* R - 0x0000 0000 32 */ 37#define SH4A_PCIEVCR0 (0x000000) /* R - 0x0000 0000 32 */
76#define BITS_TOP_MB (24) 38#define BITS_TOP_MB (24)
@@ -350,23 +312,23 @@
350#define SH4A_PCIECSAR5 (0x0202B4) /* R/W R/W 0x0000 0000 32 */ 312#define SH4A_PCIECSAR5 (0x0202B4) /* R/W R/W 0x0000 0000 32 */
351#define SH4A_PCIESTCTLR5 (0x0202B8) /* R/W R/W 0x0000 0000 32 */ 313#define SH4A_PCIESTCTLR5 (0x0202B8) /* R/W R/W 0x0000 0000 32 */
352 314
353/* PCIEPARL0 */ 315/* PCIEPARL */
354#define SH4A_PCIEPARL0 (0x020400) /* R/W R/W 0x0000 0000 32 */ 316#define SH4A_PCIEPARL(x) (0x020400 + ((x) * 0x20)) /* R/W R/W 0x0000 0000 32 */
355#define BITS_PAL (18) 317#define BITS_PAL (18)
356#define MASK_PAL (0x3fff<<BITS_PAL) 318#define MASK_PAL (0x3fff<<BITS_PAL)
357 319
358/* PCIEPARH0 */ 320/* PCIEPARH */
359#define SH4A_PCIEPARH0 (0x020404) /* R/W R/W 0x0000 0000 32 */ 321#define SH4A_PCIEPARH(x) (0x020404 + ((x) * 0x20)) /* R/W R/W 0x0000 0000 32 */
360#define BITS_PAH (0) 322#define BITS_PAH (0)
361#define MASK_PAH (0xffffffff<<BITS_PAH) 323#define MASK_PAH (0xffffffff<<BITS_PAH)
362 324
363/* PCIEPAMR0 */ 325/* PCIEPAMR */
364#define SH4A_PCIEPAMR0 (0x020408) /* R/W R/W 0x0000 0000 32 */ 326#define SH4A_PCIEPAMR(x) (0x020408 + ((x) * 0x20)) /* R/W R/W 0x0000 0000 32 */
365#define BITS_PAM (18) 327#define BITS_PAM (18)
366#define MASK_PAM (0x3fff<<BITS_PAM) 328#define MASK_PAM (0x3fff<<BITS_PAM)
367 329
368/* PCIEPTCTLR0 */ 330/* PCIEPTCTLR */
369#define SH4A_PCIEPTCTLR0 (0x02040C) /* R/W R/W 0x0000 0000 32 */ 331#define SH4A_PCIEPTCTLR(x) (0x02040C + ((x) * 0x20))
370#define BITS_PARE (31) 332#define BITS_PARE (31)
371#define MASK_PARE (0x1<<BITS_PARE) 333#define MASK_PARE (0x1<<BITS_PARE)
372#define BITS_TC (20) 334#define BITS_TC (20)
@@ -378,26 +340,6 @@
378#define BITS_SPC (8) 340#define BITS_SPC (8)
379#define MASK_SPC (0x1<<BITS_SPC) 341#define MASK_SPC (0x1<<BITS_SPC)
380 342
381#define SH4A_PCIEPARL1 (0x020420) /* R/W R/W 0x0000 0000 32 */
382#define SH4A_PCIEPARH1 (0x020424) /* R/W R/W 0x0000 0000 32 */
383#define SH4A_PCIEPAMR1 (0x020428) /* R/W R/W 0x0000 0000 32 */
384#define SH4A_PCIEPTCTLR1 (0x02042C) /* R/W R/W 0x0000 0000 32 */
385#define SH4A_PCIEPARL2 (0x020440) /* R/W R/W 0x0000 0000 32 */
386#define SH4A_PCIEPARH2 (0x020444) /* R/W R/W 0x0000 0000 32 */
387#define SH4A_PCIEPAMR2 (0x020448) /* R/W R/W 0x0000 0000 32 */
388#define SH4A_PCIEPTCTLR2 (0x02044C) /* R/W R/W 0x0000 0000 32 */
389#define SH4A_PCIEPARL3 (0x020460) /* R/W R/W 0x0000 0000 32 */
390#define SH4A_PCIEPARH3 (0x020464) /* R/W R/W 0x0000 0000 32 */
391#define SH4A_PCIEPAMR3 (0x020468) /* R/W R/W 0x0000 0000 32 */
392#define SH4A_PCIEPTCTLR3 (0x02046C) /* R/W R/W 0x0000 0000 32 */
393#define SH4A_PCIEPARL4 (0x020480) /* R/W R/W 0x0000 0000 32 */
394#define SH4A_PCIEPARH4 (0x020484) /* R/W R/W 0x0000 0000 32 */
395#define SH4A_PCIEPAMR4 (0x020488) /* R/W R/W 0x0000 0000 32 */
396#define SH4A_PCIEPTCTLR4 (0x02048C) /* R/W R/W 0x0000 0000 32 */
397#define SH4A_PCIEPARL5 (0x0204A0) /* R/W R/W 0x0000 0000 32 */
398#define SH4A_PCIEPARH5 (0x0204A4) /* R/W R/W 0x0000 0000 32 */
399#define SH4A_PCIEPAMR5 (0x0204A8) /* R/W R/W 0x0000 0000 32 */
400#define SH4A_PCIEPTCTLR5 (0x0204AC) /* R/W R/W 0x0000 0000 32 */
401#define SH4A_PCIEDMAOR (0x021000) /* R/W R/W 0x0000 0000 32 */ 343#define SH4A_PCIEDMAOR (0x021000) /* R/W R/W 0x0000 0000 32 */
402#define SH4A_PCIEDMSAR0 (0x021100) /* R/W R/W 0x0000 0000 32 */ 344#define SH4A_PCIEDMSAR0 (0x021100) /* R/W R/W 0x0000 0000 32 */
403#define SH4A_PCIEDMSAHR0 (0x021104) /* R/W R/W 0x0000 0000 32 */ 345#define SH4A_PCIEDMSAHR0 (0x021104) /* R/W R/W 0x0000 0000 32 */
diff --git a/arch/sh/drivers/superhyway/ops-sh4-202.c b/arch/sh/drivers/superhyway/ops-sh4-202.c
index 3b14bf860db6..6da62e9475c4 100644
--- a/arch/sh/drivers/superhyway/ops-sh4-202.c
+++ b/arch/sh/drivers/superhyway/ops-sh4-202.c
@@ -134,8 +134,8 @@ static int sh4202_read_vcr(unsigned long base, struct superhyway_vcr_info *vcr)
134 * 134 *
135 * Do not trust the documentation, for it is evil. 135 * Do not trust the documentation, for it is evil.
136 */ 136 */
137 vcrh = ctrl_inl(base); 137 vcrh = __raw_readl(base);
138 vcrl = ctrl_inl(base + sizeof(u32)); 138 vcrl = __raw_readl(base + sizeof(u32));
139 139
140 tmp = ((u64)vcrh << 32) | vcrl; 140 tmp = ((u64)vcrh << 32) | vcrl;
141 memcpy(vcr, &tmp, sizeof(u64)); 141 memcpy(vcr, &tmp, sizeof(u64));
@@ -147,8 +147,8 @@ static int sh4202_write_vcr(unsigned long base, struct superhyway_vcr_info vcr)
147{ 147{
148 u64 tmp = *(u64 *)&vcr; 148 u64 tmp = *(u64 *)&vcr;
149 149
150 ctrl_outl((tmp >> 32) & 0xffffffff, base); 150 __raw_writel((tmp >> 32) & 0xffffffff, base);
151 ctrl_outl(tmp & 0xffffffff, base + sizeof(u32)); 151 __raw_writel(tmp & 0xffffffff, base + sizeof(u32));
152 152
153 return 0; 153 return 0;
154} 154}
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index e121c30f797d..46cb93477bcb 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -1,6 +1,8 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3header-y += cachectl.h cpu-features.h 3header-y += cachectl.h
4header-y += cpu-features.h
5header-y += hw_breakpoint.h
4 6
5unifdef-y += unistd_32.h 7unifdef-y += unistd_32.h
6unifdef-y += unistd_64.h 8unifdef-y += unistd_64.h
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h
index 99d6b3ecbe22..446b3831c214 100644
--- a/arch/sh/include/asm/addrspace.h
+++ b/arch/sh/include/asm/addrspace.h
@@ -28,7 +28,7 @@
28/* Returns the privileged segment base of a given address */ 28/* Returns the privileged segment base of a given address */
29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) 29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
30 30
31#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED) 31#ifdef CONFIG_29BIT
32/* 32/*
33 * Map an address to a certain privileged segment 33 * Map an address to a certain privileged segment
34 */ 34 */
@@ -40,7 +40,15 @@
40 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) 40 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
41#define P4SEGADDR(a) \ 41#define P4SEGADDR(a) \
42 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) 42 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
43#endif /* 29BIT || PMB_FIXED */ 43#else
44/*
45 * These will never work in 32-bit, don't even bother.
46 */
47#define P1SEGADDR(a) __futile_remapping_attempt
48#define P2SEGADDR(a) __futile_remapping_attempt
49#define P3SEGADDR(a) __futile_remapping_attempt
50#define P4SEGADDR(a) __futile_remapping_attempt
51#endif
44#endif /* P1SEG */ 52#endif /* P1SEG */
45 53
46/* Check if an address can be reached in 29 bits */ 54/* Check if an address can be reached in 29 bits */
@@ -57,11 +65,5 @@
57#define P3_ADDR_MAX P4SEG 65#define P3_ADDR_MAX P4SEG
58#endif 66#endif
59 67
60#ifndef __ASSEMBLY__
61#ifdef CONFIG_PMB
62extern int __in_29bit_mode(void);
63#endif /* CONFIG_PMB */
64#endif /* __ASSEMBLY__ */
65
66#endif /* __KERNEL__ */ 68#endif /* __KERNEL__ */
67#endif /* __ASM_SH_ADDRSPACE_H */ 69#endif /* __ASM_SH_ADDRSPACE_H */
diff --git a/arch/sh/include/asm/alignment.h b/arch/sh/include/asm/alignment.h
new file mode 100644
index 000000000000..b12efecf5294
--- /dev/null
+++ b/arch/sh/include/asm/alignment.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_SH_ALIGNMENT_H
2#define __ASM_SH_ALIGNMENT_H
3
4#include <linux/types.h>
5
6extern void inc_unaligned_byte_access(void);
7extern void inc_unaligned_word_access(void);
8extern void inc_unaligned_dword_access(void);
9extern void inc_unaligned_multi_access(void);
10extern void inc_unaligned_user_access(void);
11extern void inc_unaligned_kernel_access(void);
12
13#define UM_WARN (1 << 0)
14#define UM_FIXUP (1 << 1)
15#define UM_SIGNAL (1 << 2)
16
17extern unsigned int unaligned_user_action(void);
18
19extern void unaligned_fixups_notify(struct task_struct *, insn_size_t, struct pt_regs *);
20
21#endif /* __ASM_SH_ALIGNMENT_H */
diff --git a/arch/sh/include/asm/atomic-grb.h b/arch/sh/include/asm/atomic-grb.h
index 4c5b7dbfcedb..a273c88578fc 100644
--- a/arch/sh/include/asm/atomic-grb.h
+++ b/arch/sh/include/asm/atomic-grb.h
@@ -120,50 +120,4 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
120 : "memory" , "r0", "r1"); 120 : "memory" , "r0", "r1");
121} 121}
122 122
123static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
124{
125 int ret;
126
127 __asm__ __volatile__ (
128 " .align 2 \n\t"
129 " mova 1f, r0 \n\t"
130 " nop \n\t"
131 " mov r15, r1 \n\t"
132 " mov #-8, r15 \n\t"
133 " mov.l @%1, %0 \n\t"
134 " cmp/eq %2, %0 \n\t"
135 " bf 1f \n\t"
136 " mov.l %3, @%1 \n\t"
137 "1: mov r1, r15 \n\t"
138 : "=&r" (ret)
139 : "r" (v), "r" (old), "r" (new)
140 : "memory" , "r0", "r1" , "t");
141
142 return ret;
143}
144
145static inline int atomic_add_unless(atomic_t *v, int a, int u)
146{
147 int ret;
148 unsigned long tmp;
149
150 __asm__ __volatile__ (
151 " .align 2 \n\t"
152 " mova 1f, r0 \n\t"
153 " nop \n\t"
154 " mov r15, r1 \n\t"
155 " mov #-12, r15 \n\t"
156 " mov.l @%2, %1 \n\t"
157 " mov %1, %0 \n\t"
158 " cmp/eq %4, %0 \n\t"
159 " bt/s 1f \n\t"
160 " add %3, %1 \n\t"
161 " mov.l %1, @%2 \n\t"
162 "1: mov r1, r15 \n\t"
163 : "=&r" (ret), "=&r" (tmp)
164 : "r" (v), "r" (a), "r" (u)
165 : "memory" , "r0", "r1" , "t");
166
167 return ret != u;
168}
169#endif /* __ASM_SH_ATOMIC_GRB_H */ 123#endif /* __ASM_SH_ATOMIC_GRB_H */
diff --git a/arch/sh/include/asm/atomic-llsc.h b/arch/sh/include/asm/atomic-llsc.h
index b040e1e08610..4b00b78e3f4f 100644
--- a/arch/sh/include/asm/atomic-llsc.h
+++ b/arch/sh/include/asm/atomic-llsc.h
@@ -104,31 +104,4 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
104 : "t"); 104 : "t");
105} 105}
106 106
107#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
108
109/**
110 * atomic_add_unless - add unless the number is a given value
111 * @v: pointer of type atomic_t
112 * @a: the amount to add to v...
113 * @u: ...unless v is equal to u.
114 *
115 * Atomically adds @a to @v, so long as it was not @u.
116 * Returns non-zero if @v was not @u, and zero otherwise.
117 */
118static inline int atomic_add_unless(atomic_t *v, int a, int u)
119{
120 int c, old;
121 c = atomic_read(v);
122 for (;;) {
123 if (unlikely(c == (u)))
124 break;
125 old = atomic_cmpxchg((v), c, c + (a));
126 if (likely(old == c))
127 break;
128 c = old;
129 }
130
131 return c != (u);
132}
133
134#endif /* __ASM_SH_ATOMIC_LLSC_H */ 107#endif /* __ASM_SH_ATOMIC_LLSC_H */
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index b16388d71954..275a448ae8c2 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -25,58 +25,43 @@
25#endif 25#endif
26 26
27#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) 27#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
28#define atomic_dec_return(v) atomic_sub_return(1, (v))
29#define atomic_inc_return(v) atomic_add_return(1, (v))
30#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
31#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
32#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
33#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
28 34
29#define atomic_dec_return(v) atomic_sub_return(1,(v)) 35#define atomic_inc(v) atomic_add(1, (v))
30#define atomic_inc_return(v) atomic_add_return(1,(v)) 36#define atomic_dec(v) atomic_sub(1, (v))
31 37
32/* 38#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
33 * atomic_inc_and_test - increment and test 39#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
40
41/**
42 * atomic_add_unless - add unless the number is a given value
34 * @v: pointer of type atomic_t 43 * @v: pointer of type atomic_t
44 * @a: the amount to add to v...
45 * @u: ...unless v is equal to u.
35 * 46 *
36 * Atomically increments @v by 1 47 * Atomically adds @a to @v, so long as it was not @u.
37 * and returns true if the result is zero, or false for all 48 * Returns non-zero if @v was not @u, and zero otherwise.
38 * other cases.
39 */ 49 */
40#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
41
42#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
43#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
44
45#define atomic_inc(v) atomic_add(1,(v))
46#define atomic_dec(v) atomic_sub(1,(v))
47
48#if !defined(CONFIG_GUSA_RB) && !defined(CONFIG_CPU_SH4A)
49static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
50{
51 int ret;
52 unsigned long flags;
53
54 local_irq_save(flags);
55 ret = v->counter;
56 if (likely(ret == old))
57 v->counter = new;
58 local_irq_restore(flags);
59
60 return ret;
61}
62
63static inline int atomic_add_unless(atomic_t *v, int a, int u) 50static inline int atomic_add_unless(atomic_t *v, int a, int u)
64{ 51{
65 int ret; 52 int c, old;
66 unsigned long flags; 53 c = atomic_read(v);
67 54 for (;;) {
68 local_irq_save(flags); 55 if (unlikely(c == (u)))
69 ret = v->counter; 56 break;
70 if (ret != u) 57 old = atomic_cmpxchg((v), c, c + (a));
71 v->counter += a; 58 if (likely(old == c))
72 local_irq_restore(flags); 59 break;
73 60 c = old;
74 return ret != u; 61 }
62
63 return c != (u);
75} 64}
76#endif /* !CONFIG_GUSA_RB && !CONFIG_CPU_SH4A */
77
78#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
79#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
80 65
81#define smp_mb__before_atomic_dec() smp_mb() 66#define smp_mb__before_atomic_dec() smp_mb()
82#define smp_mb__after_atomic_dec() smp_mb() 67#define smp_mb__after_atomic_dec() smp_mb()
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h
index dda96eb3e7c0..da3ebec921a7 100644
--- a/arch/sh/include/asm/cacheflush.h
+++ b/arch/sh/include/asm/cacheflush.h
@@ -63,6 +63,14 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
63 if (boot_cpu_data.dcache.n_aliases && PageAnon(page)) 63 if (boot_cpu_data.dcache.n_aliases && PageAnon(page))
64 __flush_anon_page(page, vmaddr); 64 __flush_anon_page(page, vmaddr);
65} 65}
66static inline void flush_kernel_vmap_range(void *addr, int size)
67{
68 __flush_wback_region(addr, size);
69}
70static inline void invalidate_kernel_vmap_range(void *addr, int size)
71{
72 __flush_invalidate_region(addr, size);
73}
66 74
67#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE 75#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
68static inline void flush_kernel_dcache_page(struct page *page) 76static inline void flush_kernel_dcache_page(struct page *page)
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index 9fe7d7f8af40..11da4c5beb68 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -146,8 +146,17 @@ int sh_clk_mstp32_register(struct clk *clks, int nr);
146 .flags = _flags, \ 146 .flags = _flags, \
147} 147}
148 148
149struct clk_div4_table {
150 struct clk_div_mult_table *div_mult_table;
151 void (*kick)(struct clk *clk);
152};
153
149int sh_clk_div4_register(struct clk *clks, int nr, 154int sh_clk_div4_register(struct clk *clks, int nr,
150 struct clk_div_mult_table *table); 155 struct clk_div4_table *table);
156int sh_clk_div4_enable_register(struct clk *clks, int nr,
157 struct clk_div4_table *table);
158int sh_clk_div4_reparent_register(struct clk *clks, int nr,
159 struct clk_div4_table *table);
151 160
152#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \ 161#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \
153{ \ 162{ \
diff --git a/arch/sh/include/asm/cmpxchg-grb.h b/arch/sh/include/asm/cmpxchg-grb.h
index e2681abe764f..4676bf57693a 100644
--- a/arch/sh/include/asm/cmpxchg-grb.h
+++ b/arch/sh/include/asm/cmpxchg-grb.h
@@ -57,11 +57,10 @@ static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
57 " mov.l @%1, %0 \n\t" /* load old value */ 57 " mov.l @%1, %0 \n\t" /* load old value */
58 " cmp/eq %0, %2 \n\t" 58 " cmp/eq %0, %2 \n\t"
59 " bf 1f \n\t" /* if not equal */ 59 " bf 1f \n\t" /* if not equal */
60 " mov.l %2, @%1 \n\t" /* store new value */ 60 " mov.l %3, @%1 \n\t" /* store new value */
61 "1: mov r1, r15 \n\t" /* LOGOUT */ 61 "1: mov r1, r15 \n\t" /* LOGOUT */
62 : "=&r" (retval), 62 : "=&r" (retval)
63 "+r" (m) 63 : "r" (m), "r" (old), "r" (new)
64 : "r" (new)
65 : "memory" , "r0", "r1", "t"); 64 : "memory" , "r0", "r1", "t");
66 65
67 return retval; 66 return retval;
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index 87ced133a363..bea3337a426a 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -89,8 +89,6 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
89{ 89{
90 struct dma_map_ops *ops = get_dma_ops(dev); 90 struct dma_map_ops *ops = get_dma_ops(dev);
91 91
92 WARN_ON(irqs_disabled()); /* for portability */
93
94 if (dma_release_from_coherent(dev, get_order(size), vaddr)) 92 if (dma_release_from_coherent(dev, get_order(size), vaddr))
95 return; 93 return;
96 94
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
index 78eed3e0bdf5..e934a2e66651 100644
--- a/arch/sh/include/asm/dma-sh.h
+++ b/arch/sh/include/asm/dma-sh.h
@@ -20,14 +20,14 @@
20 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 20 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
21 defined(CONFIG_CPU_SUBTYPE_SH7785) 21 defined(CONFIG_CPU_SUBTYPE_SH7785)
22#define dmaor_read_reg(n) \ 22#define dmaor_read_reg(n) \
23 (n ? ctrl_inw(SH_DMAC_BASE1 + DMAOR) \ 23 (n ? __raw_readw(SH_DMAC_BASE1 + DMAOR) \
24 : ctrl_inw(SH_DMAC_BASE0 + DMAOR)) 24 : __raw_readw(SH_DMAC_BASE0 + DMAOR))
25#define dmaor_write_reg(n, data) \ 25#define dmaor_write_reg(n, data) \
26 (n ? ctrl_outw(data, SH_DMAC_BASE1 + DMAOR) \ 26 (n ? __raw_writew(data, SH_DMAC_BASE1 + DMAOR) \
27 : ctrl_outw(data, SH_DMAC_BASE0 + DMAOR)) 27 : __raw_writew(data, SH_DMAC_BASE0 + DMAOR))
28#else /* Other CPU */ 28#else /* Other CPU */
29#define dmaor_read_reg(n) ctrl_inw(SH_DMAC_BASE0 + DMAOR) 29#define dmaor_read_reg(n) __raw_readw(SH_DMAC_BASE0 + DMAOR)
30#define dmaor_write_reg(n, data) ctrl_outw(data, SH_DMAC_BASE0 + DMAOR) 30#define dmaor_write_reg(n, data) __raw_writew(data, SH_DMAC_BASE0 + DMAOR)
31#endif 31#endif
32 32
33static int dmte_irq_map[] __maybe_unused = { 33static int dmte_irq_map[] __maybe_unused = {
@@ -64,8 +64,10 @@ static int dmte_irq_map[] __maybe_unused = {
64#define ACK_L 0x00010000 64#define ACK_L 0x00010000
65#define DM_INC 0x00004000 65#define DM_INC 0x00004000
66#define DM_DEC 0x00008000 66#define DM_DEC 0x00008000
67#define DM_FIX 0x0000c000
67#define SM_INC 0x00001000 68#define SM_INC 0x00001000
68#define SM_DEC 0x00002000 69#define SM_DEC 0x00002000
70#define SM_FIX 0x00003000
69#define RS_IN 0x00000200 71#define RS_IN 0x00000200
70#define RS_OUT 0x00000300 72#define RS_OUT 0x00000300
71#define TS_BLK 0x00000040 73#define TS_BLK 0x00000040
@@ -83,7 +85,7 @@ static int dmte_irq_map[] __maybe_unused = {
83 * Define the default configuration for dual address memory-memory transfer. 85 * Define the default configuration for dual address memory-memory transfer.
84 * The 0x400 value represents auto-request, external->external. 86 * The 0x400 value represents auto-request, external->external.
85 */ 87 */
86#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32) 88#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_INDEX2VAL(XMIT_SZ_32BIT))
87 89
88/* DMA base address */ 90/* DMA base address */
89static u32 dma_base_addr[] __maybe_unused = { 91static u32 dma_base_addr[] __maybe_unused = {
@@ -123,10 +125,47 @@ static u32 dma_base_addr[] __maybe_unused = {
123 */ 125 */
124#define SHDMA_MIX_IRQ (1 << 1) 126#define SHDMA_MIX_IRQ (1 << 1)
125#define SHDMA_DMAOR1 (1 << 2) 127#define SHDMA_DMAOR1 (1 << 2)
126#define SHDMA_DMAE1 (1 << 3) 128#define SHDMA_DMAE1 (1 << 3)
129
130enum sh_dmae_slave_chan_id {
131 SHDMA_SLAVE_SCIF0_TX,
132 SHDMA_SLAVE_SCIF0_RX,
133 SHDMA_SLAVE_SCIF1_TX,
134 SHDMA_SLAVE_SCIF1_RX,
135 SHDMA_SLAVE_SCIF2_TX,
136 SHDMA_SLAVE_SCIF2_RX,
137 SHDMA_SLAVE_SCIF3_TX,
138 SHDMA_SLAVE_SCIF3_RX,
139 SHDMA_SLAVE_SCIF4_TX,
140 SHDMA_SLAVE_SCIF4_RX,
141 SHDMA_SLAVE_SCIF5_TX,
142 SHDMA_SLAVE_SCIF5_RX,
143 SHDMA_SLAVE_SIUA_TX,
144 SHDMA_SLAVE_SIUA_RX,
145 SHDMA_SLAVE_SIUB_TX,
146 SHDMA_SLAVE_SIUB_RX,
147 SHDMA_SLAVE_NUMBER, /* Must stay last */
148};
149
150struct sh_dmae_slave_config {
151 enum sh_dmae_slave_chan_id slave_id;
152 dma_addr_t addr;
153 u32 chcr;
154 char mid_rid;
155};
127 156
128struct sh_dmae_pdata { 157struct sh_dmae_pdata {
129 unsigned int mode; 158 unsigned int mode;
159 struct sh_dmae_slave_config *config;
160 int config_num;
161};
162
163struct device;
164
165struct sh_dmae_slave {
166 enum sh_dmae_slave_chan_id slave_id; /* Set by the platform */
167 struct device *dma_dev; /* Set by the platform */
168 struct sh_dmae_slave_config *config; /* Set by the driver */
130}; 169};
131 170
132#endif /* __DMA_SH_H */ 171#endif /* __DMA_SH_H */
diff --git a/arch/sh/include/asm/dwarf.h b/arch/sh/include/asm/dwarf.h
index bdccbbfdc0bd..d62abd1d0c05 100644
--- a/arch/sh/include/asm/dwarf.h
+++ b/arch/sh/include/asm/dwarf.h
@@ -243,16 +243,13 @@ struct dwarf_cie {
243 243
244 unsigned long cie_pointer; 244 unsigned long cie_pointer;
245 245
246 struct list_head link;
247
248 unsigned long flags; 246 unsigned long flags;
249#define DWARF_CIE_Z_AUGMENTATION (1 << 0) 247#define DWARF_CIE_Z_AUGMENTATION (1 << 0)
250 248
251 /* 249 /* linked-list entry if this CIE is from a module */
252 * 'mod' will be non-NULL if this CIE came from a module's 250 struct list_head link;
253 * .eh_frame section. 251
254 */ 252 struct rb_node node;
255 struct module *mod;
256}; 253};
257 254
258/** 255/**
@@ -266,13 +263,11 @@ struct dwarf_fde {
266 unsigned long address_range; 263 unsigned long address_range;
267 unsigned char *instructions; 264 unsigned char *instructions;
268 unsigned char *end; 265 unsigned char *end;
266
267 /* linked-list entry if this FDE is from a module */
269 struct list_head link; 268 struct list_head link;
270 269
271 /* 270 struct rb_node node;
272 * 'mod' will be non-NULL if this FDE came from a module's
273 * .eh_frame section.
274 */
275 struct module *mod;
276}; 271};
277 272
278/** 273/**
diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h
index 5ac1e40a511c..6e7cea453895 100644
--- a/arch/sh/include/asm/fixmap.h
+++ b/arch/sh/include/asm/fixmap.h
@@ -55,16 +55,29 @@ enum fixed_addresses {
55#define FIX_N_COLOURS 8 55#define FIX_N_COLOURS 8
56 FIX_CMAP_BEGIN, 56 FIX_CMAP_BEGIN,
57 FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS) - 1, 57 FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS) - 1,
58 FIX_UNCACHED, 58
59#ifdef CONFIG_HIGHMEM 59#ifdef CONFIG_HIGHMEM
60 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ 60 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
61 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, 61 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
62#endif 62#endif
63
64#ifdef CONFIG_IOREMAP_FIXED
65 /*
66 * FIX_IOREMAP entries are useful for mapping physical address
67 * space before ioremap() is useable, e.g. really early in boot
68 * before kmalloc() is working.
69 */
70#define FIX_N_IOREMAPS 32
71 FIX_IOREMAP_BEGIN,
72 FIX_IOREMAP_END = FIX_IOREMAP_BEGIN + FIX_N_IOREMAPS,
73#endif
74
63 __end_of_fixed_addresses 75 __end_of_fixed_addresses
64}; 76};
65 77
66extern void __set_fixmap(enum fixed_addresses idx, 78extern void __set_fixmap(enum fixed_addresses idx,
67 unsigned long phys, pgprot_t flags); 79 unsigned long phys, pgprot_t flags);
80extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags);
68 81
69#define set_fixmap(idx, phys) \ 82#define set_fixmap(idx, phys) \
70 __set_fixmap(idx, phys, PAGE_KERNEL) 83 __set_fixmap(idx, phys, PAGE_KERNEL)
diff --git a/arch/sh/include/asm/fpu.h b/arch/sh/include/asm/fpu.h
index fb6bbb9b1cc8..06c4281aab65 100644
--- a/arch/sh/include/asm/fpu.h
+++ b/arch/sh/include/asm/fpu.h
@@ -2,8 +2,8 @@
2#define __ASM_SH_FPU_H 2#define __ASM_SH_FPU_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5#include <linux/preempt.h> 5
6#include <asm/ptrace.h> 6struct task_struct;
7 7
8#ifdef CONFIG_SH_FPU 8#ifdef CONFIG_SH_FPU
9static inline void release_fpu(struct pt_regs *regs) 9static inline void release_fpu(struct pt_regs *regs)
@@ -16,22 +16,23 @@ static inline void grab_fpu(struct pt_regs *regs)
16 regs->sr &= ~SR_FD; 16 regs->sr &= ~SR_FD;
17} 17}
18 18
19struct task_struct;
20
21extern void save_fpu(struct task_struct *__tsk); 19extern void save_fpu(struct task_struct *__tsk);
22void fpu_state_restore(struct pt_regs *regs); 20extern void restore_fpu(struct task_struct *__tsk);
21extern void fpu_state_restore(struct pt_regs *regs);
22extern void __fpu_state_restore(void);
23#else 23#else
24 24#define save_fpu(tsk) do { } while (0)
25#define save_fpu(tsk) do { } while (0) 25#define restore_fpu(tsk) do { } while (0)
26#define release_fpu(regs) do { } while (0) 26#define release_fpu(regs) do { } while (0)
27#define grab_fpu(regs) do { } while (0) 27#define grab_fpu(regs) do { } while (0)
28#define fpu_state_restore(regs) do { } while (0) 28#define fpu_state_restore(regs) do { } while (0)
29 29#define __fpu_state_restore(regs) do { } while (0)
30#endif 30#endif
31 31
32struct user_regset; 32struct user_regset;
33 33
34extern int do_fpu_inst(unsigned short, struct pt_regs *); 34extern int do_fpu_inst(unsigned short, struct pt_regs *);
35extern int init_fpu(struct task_struct *);
35 36
36extern int fpregs_get(struct task_struct *target, 37extern int fpregs_get(struct task_struct *target,
37 const struct user_regset *regset, 38 const struct user_regset *regset,
@@ -65,18 +66,6 @@ static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs)
65 preempt_enable(); 66 preempt_enable();
66} 67}
67 68
68static inline int init_fpu(struct task_struct *tsk)
69{
70 if (tsk_used_math(tsk)) {
71 if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current)
72 unlazy_fpu(tsk, task_pt_regs(tsk));
73 return 0;
74 }
75
76 set_stopped_child_used_math(tsk);
77 return 0;
78}
79
80#endif /* __ASSEMBLY__ */ 69#endif /* __ASSEMBLY__ */
81 70
82#endif /* __ASM_SH_FPU_H */ 71#endif /* __ASM_SH_FPU_H */
diff --git a/arch/sh/include/asm/hw_breakpoint.h b/arch/sh/include/asm/hw_breakpoint.h
new file mode 100644
index 000000000000..965dd780d51b
--- /dev/null
+++ b/arch/sh/include/asm/hw_breakpoint.h
@@ -0,0 +1,67 @@
1#ifndef __ASM_SH_HW_BREAKPOINT_H
2#define __ASM_SH_HW_BREAKPOINT_H
3
4#ifdef __KERNEL__
5#define __ARCH_HW_BREAKPOINT_H
6
7#include <linux/kdebug.h>
8#include <linux/types.h>
9
10struct arch_hw_breakpoint {
11 char *name; /* Contains name of the symbol to set bkpt */
12 unsigned long address;
13 u16 len;
14 u16 type;
15};
16
17enum {
18 SH_BREAKPOINT_READ = (1 << 1),
19 SH_BREAKPOINT_WRITE = (1 << 2),
20 SH_BREAKPOINT_RW = SH_BREAKPOINT_READ | SH_BREAKPOINT_WRITE,
21
22 SH_BREAKPOINT_LEN_1 = (1 << 12),
23 SH_BREAKPOINT_LEN_2 = (1 << 13),
24 SH_BREAKPOINT_LEN_4 = SH_BREAKPOINT_LEN_1 | SH_BREAKPOINT_LEN_2,
25 SH_BREAKPOINT_LEN_8 = (1 << 14),
26};
27
28struct sh_ubc {
29 const char *name;
30 unsigned int num_events;
31 unsigned int trap_nr;
32 void (*enable)(struct arch_hw_breakpoint *, int);
33 void (*disable)(struct arch_hw_breakpoint *, int);
34 void (*enable_all)(unsigned long);
35 void (*disable_all)(void);
36 unsigned long (*active_mask)(void);
37 unsigned long (*triggered_mask)(void);
38 void (*clear_triggered_mask)(unsigned long);
39 struct clk *clk; /* optional interface clock / MSTP bit */
40};
41
42struct perf_event;
43struct task_struct;
44struct pmu;
45
46/* Maximum number of UBC channels */
47#define HBP_NUM 2
48
49/* arch/sh/kernel/hw_breakpoint.c */
50extern int arch_check_va_in_userspace(unsigned long va, u16 hbp_len);
51extern int arch_validate_hwbkpt_settings(struct perf_event *bp,
52 struct task_struct *tsk);
53extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
54 unsigned long val, void *data);
55
56int arch_install_hw_breakpoint(struct perf_event *bp);
57void arch_uninstall_hw_breakpoint(struct perf_event *bp);
58void hw_breakpoint_pmu_read(struct perf_event *bp);
59void hw_breakpoint_pmu_unthrottle(struct perf_event *bp);
60
61extern void arch_fill_perf_breakpoint(struct perf_event *bp);
62extern int register_sh_ubc(struct sh_ubc *);
63
64extern struct pmu perf_ops_bp;
65
66#endif /* __KERNEL__ */
67#endif /* __ASM_SH_HW_BREAKPOINT_H */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 026dd659a640..7dab7b23a5ec 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -22,6 +22,7 @@
22 * for old compat code for I/O offseting to SuperIOs, all of which are 22 * for old compat code for I/O offseting to SuperIOs, all of which are
23 * better handled through the machvec ioport mapping routines these days. 23 * better handled through the machvec ioport mapping routines these days.
24 */ 24 */
25#include <linux/errno.h>
25#include <asm/cache.h> 26#include <asm/cache.h>
26#include <asm/system.h> 27#include <asm/system.h>
27#include <asm/addrspace.h> 28#include <asm/addrspace.h>
@@ -79,16 +80,51 @@
79#define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) 80#define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
80#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); }) 81#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); })
81 82
82/* SuperH on-chip I/O functions */ 83/*
83#define ctrl_inb __raw_readb 84 * Legacy SuperH on-chip I/O functions
84#define ctrl_inw __raw_readw 85 *
85#define ctrl_inl __raw_readl 86 * These are all deprecated, all new (and especially cross-platform) code
86#define ctrl_inq __raw_readq 87 * should be using the __raw_xxx() routines directly.
88 */
89static inline u8 __deprecated ctrl_inb(unsigned long addr)
90{
91 return __raw_readb(addr);
92}
93
94static inline u16 __deprecated ctrl_inw(unsigned long addr)
95{
96 return __raw_readw(addr);
97}
98
99static inline u32 __deprecated ctrl_inl(unsigned long addr)
100{
101 return __raw_readl(addr);
102}
103
104static inline u64 __deprecated ctrl_inq(unsigned long addr)
105{
106 return __raw_readq(addr);
107}
108
109static inline void __deprecated ctrl_outb(u8 v, unsigned long addr)
110{
111 __raw_writeb(v, addr);
112}
113
114static inline void __deprecated ctrl_outw(u16 v, unsigned long addr)
115{
116 __raw_writew(v, addr);
117}
87 118
88#define ctrl_outb __raw_writeb 119static inline void __deprecated ctrl_outl(u32 v, unsigned long addr)
89#define ctrl_outw __raw_writew 120{
90#define ctrl_outl __raw_writel 121 __raw_writel(v, addr);
91#define ctrl_outq __raw_writeq 122}
123
124static inline void __deprecated ctrl_outq(u64 v, unsigned long addr)
125{
126 __raw_writeq(v, addr);
127}
92 128
93extern unsigned long generic_io_base; 129extern unsigned long generic_io_base;
94 130
@@ -97,6 +133,28 @@ static inline void ctrl_delay(void)
97 __raw_readw(generic_io_base); 133 __raw_readw(generic_io_base);
98} 134}
99 135
136#define __BUILD_UNCACHED_IO(bwlq, type) \
137static inline type read##bwlq##_uncached(unsigned long addr) \
138{ \
139 type ret; \
140 jump_to_uncached(); \
141 ret = __raw_read##bwlq(addr); \
142 back_to_cached(); \
143 return ret; \
144} \
145 \
146static inline void write##bwlq##_uncached(type v, unsigned long addr) \
147{ \
148 jump_to_uncached(); \
149 __raw_write##bwlq(v, addr); \
150 back_to_cached(); \
151}
152
153__BUILD_UNCACHED_IO(b, u8)
154__BUILD_UNCACHED_IO(w, u16)
155__BUILD_UNCACHED_IO(l, u32)
156__BUILD_UNCACHED_IO(q, u64)
157
100#define __BUILD_MEMORY_STRING(bwlq, type) \ 158#define __BUILD_MEMORY_STRING(bwlq, type) \
101 \ 159 \
102static inline void __raw_writes##bwlq(volatile void __iomem *mem, \ 160static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
@@ -234,28 +292,21 @@ unsigned long long poke_real_address_q(unsigned long long addr,
234 */ 292 */
235#ifdef CONFIG_MMU 293#ifdef CONFIG_MMU
236void __iomem *__ioremap_caller(unsigned long offset, unsigned long size, 294void __iomem *__ioremap_caller(unsigned long offset, unsigned long size,
237 unsigned long flags, void *caller); 295 pgprot_t prot, void *caller);
238void __iounmap(void __iomem *addr); 296void __iounmap(void __iomem *addr);
239 297
240static inline void __iomem * 298static inline void __iomem *
241__ioremap(unsigned long offset, unsigned long size, unsigned long flags) 299__ioremap(unsigned long offset, unsigned long size, pgprot_t prot)
242{ 300{
243 return __ioremap_caller(offset, size, flags, __builtin_return_address(0)); 301 return __ioremap_caller(offset, size, prot, __builtin_return_address(0));
244} 302}
245 303
246static inline void __iomem * 304static inline void __iomem *
247__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) 305__ioremap_29bit(unsigned long offset, unsigned long size, pgprot_t prot)
248{ 306{
249#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB) 307#ifdef CONFIG_29BIT
250 unsigned long last_addr = offset + size - 1; 308 unsigned long last_addr = offset + size - 1;
251#endif
252 void __iomem *ret;
253 309
254 ret = __ioremap_trapped(offset, size);
255 if (ret)
256 return ret;
257
258#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB)
259 /* 310 /*
260 * For P1 and P2 space this is trivial, as everything is already 311 * For P1 and P2 space this is trivial, as everything is already
261 * mapped. Uncached access for P1 addresses are done through P2. 312 * mapped. Uncached access for P1 addresses are done through P2.
@@ -263,7 +314,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
263 * mapping must be done by the PMB or by using page tables. 314 * mapping must be done by the PMB or by using page tables.
264 */ 315 */
265 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { 316 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
266 if (unlikely(flags & _PAGE_CACHABLE)) 317 if (unlikely(pgprot_val(prot) & _PAGE_CACHABLE))
267 return (void __iomem *)P1SEGADDR(offset); 318 return (void __iomem *)P1SEGADDR(offset);
268 319
269 return (void __iomem *)P2SEGADDR(offset); 320 return (void __iomem *)P2SEGADDR(offset);
@@ -274,26 +325,70 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
274 return (void __iomem *)P4SEGADDR(offset); 325 return (void __iomem *)P4SEGADDR(offset);
275#endif 326#endif
276 327
277 return __ioremap(offset, size, flags); 328 return NULL;
329}
330
331static inline void __iomem *
332__ioremap_mode(unsigned long offset, unsigned long size, pgprot_t prot)
333{
334 void __iomem *ret;
335
336 ret = __ioremap_trapped(offset, size);
337 if (ret)
338 return ret;
339
340 ret = __ioremap_29bit(offset, size, prot);
341 if (ret)
342 return ret;
343
344 return __ioremap(offset, size, prot);
278} 345}
279#else 346#else
280#define __ioremap(offset, size, flags) ((void __iomem *)(offset)) 347#define __ioremap(offset, size, prot) ((void __iomem *)(offset))
281#define __ioremap_mode(offset, size, flags) ((void __iomem *)(offset)) 348#define __ioremap_mode(offset, size, prot) ((void __iomem *)(offset))
282#define __iounmap(addr) do { } while (0) 349#define __iounmap(addr) do { } while (0)
283#endif /* CONFIG_MMU */ 350#endif /* CONFIG_MMU */
284 351
285#define ioremap(offset, size) \ 352static inline void __iomem *
286 __ioremap_mode((offset), (size), 0) 353ioremap(unsigned long offset, unsigned long size)
287#define ioremap_nocache(offset, size) \ 354{
288 __ioremap_mode((offset), (size), 0) 355 return __ioremap_mode(offset, size, PAGE_KERNEL_NOCACHE);
289#define ioremap_cache(offset, size) \ 356}
290 __ioremap_mode((offset), (size), _PAGE_CACHABLE) 357
291#define p3_ioremap(offset, size, flags) \ 358static inline void __iomem *
292 __ioremap((offset), (size), (flags)) 359ioremap_cache(unsigned long offset, unsigned long size)
293#define ioremap_prot(offset, size, flags) \ 360{
294 __ioremap_mode((offset), (size), (flags)) 361 return __ioremap_mode(offset, size, PAGE_KERNEL);
295#define iounmap(addr) \ 362}
296 __iounmap((addr)) 363
364#ifdef CONFIG_HAVE_IOREMAP_PROT
365static inline void __iomem *
366ioremap_prot(resource_size_t offset, unsigned long size, unsigned long flags)
367{
368 return __ioremap_mode(offset, size, __pgprot(flags));
369}
370#endif
371
372#ifdef CONFIG_IOREMAP_FIXED
373extern void __iomem *ioremap_fixed(resource_size_t, unsigned long,
374 unsigned long, pgprot_t);
375extern int iounmap_fixed(void __iomem *);
376extern void ioremap_fixed_init(void);
377#else
378static inline void __iomem *
379ioremap_fixed(resource_size_t phys_addr, unsigned long offset,
380 unsigned long size, pgprot_t prot)
381{
382 BUG();
383 return NULL;
384}
385
386static inline void ioremap_fixed_init(void) { }
387static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; }
388#endif
389
390#define ioremap_nocache ioremap
391#define iounmap __iounmap
297 392
298#define maybebadio(port) \ 393#define maybebadio(port) \
299 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ 394 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
diff --git a/arch/sh/include/asm/kdebug.h b/arch/sh/include/asm/kdebug.h
index 985219f9759e..5f6d2e9ccb7c 100644
--- a/arch/sh/include/asm/kdebug.h
+++ b/arch/sh/include/asm/kdebug.h
@@ -6,6 +6,8 @@ enum die_val {
6 DIE_TRAP, 6 DIE_TRAP,
7 DIE_NMI, 7 DIE_NMI,
8 DIE_OOPS, 8 DIE_OOPS,
9 DIE_BREAKPOINT,
10 DIE_SSTEP,
9}; 11};
10 12
11#endif /* __ASM_SH_KDEBUG_H */ 13#endif /* __ASM_SH_KDEBUG_H */
diff --git a/arch/sh/include/asm/mmu.h b/arch/sh/include/asm/mmu.h
index c7426ad9926e..15a05b615ba7 100644
--- a/arch/sh/include/asm/mmu.h
+++ b/arch/sh/include/asm/mmu.h
@@ -11,7 +11,9 @@
11 11
12#define PMB_ADDR 0xf6100000 12#define PMB_ADDR 0xf6100000
13#define PMB_DATA 0xf7100000 13#define PMB_DATA 0xf7100000
14#define PMB_ENTRY_MAX 16 14
15#define NR_PMB_ENTRIES 16
16
15#define PMB_E_MASK 0x0000000f 17#define PMB_E_MASK 0x0000000f
16#define PMB_E_SHIFT 8 18#define PMB_E_SHIFT 8
17 19
@@ -25,11 +27,15 @@
25#define PMB_C 0x00000008 27#define PMB_C 0x00000008
26#define PMB_WT 0x00000001 28#define PMB_WT 0x00000001
27#define PMB_UB 0x00000200 29#define PMB_UB 0x00000200
30#define PMB_CACHE_MASK (PMB_C | PMB_WT | PMB_UB)
28#define PMB_V 0x00000100 31#define PMB_V 0x00000100
29 32
30#define PMB_NO_ENTRY (-1) 33#define PMB_NO_ENTRY (-1)
31 34
32#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
36#include <linux/errno.h>
37#include <linux/threads.h>
38#include <asm/page.h>
33 39
34/* Default "unsigned long" context */ 40/* Default "unsigned long" context */
35typedef unsigned long mm_context_id_t[NR_CPUS]; 41typedef unsigned long mm_context_id_t[NR_CPUS];
@@ -47,29 +53,30 @@ typedef struct {
47#endif 53#endif
48} mm_context_t; 54} mm_context_t;
49 55
50struct pmb_entry; 56#ifdef CONFIG_PMB
51
52struct pmb_entry {
53 unsigned long vpn;
54 unsigned long ppn;
55 unsigned long flags;
56
57 /*
58 * 0 .. NR_PMB_ENTRIES for specific entry selection, or
59 * PMB_NO_ENTRY to search for a free one
60 */
61 int entry;
62
63 struct pmb_entry *next;
64 /* Adjacent entry link for contiguous multi-entry mappings */
65 struct pmb_entry *link;
66};
67
68/* arch/sh/mm/pmb.c */ 57/* arch/sh/mm/pmb.c */
69long pmb_remap(unsigned long virt, unsigned long phys, 58long pmb_remap(unsigned long virt, unsigned long phys,
70 unsigned long size, unsigned long flags); 59 unsigned long size, pgprot_t prot);
71void pmb_unmap(unsigned long addr); 60void pmb_unmap(unsigned long addr);
72int pmb_init(void); 61void pmb_init(void);
62bool __in_29bit_mode(void);
63#else
64static inline long pmb_remap(unsigned long virt, unsigned long phys,
65 unsigned long size, pgprot_t prot)
66{
67 return -EINVAL;
68}
69
70#define pmb_unmap(addr) do { } while (0)
71#define pmb_init(addr) do { } while (0)
72
73#ifdef CONFIG_29BIT
74#define __in_29bit_mode() (1)
75#else
76#define __in_29bit_mode() (0)
77#endif
78
79#endif /* CONFIG_PMB */
73#endif /* __ASSEMBLY__ */ 80#endif /* __ASSEMBLY__ */
74 81
75#endif /* __MMU_H */ 82#endif /* __MMU_H */
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 41080b173a7a..384c7471a374 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -158,7 +158,7 @@ static inline void enable_mmu(void)
158 unsigned int cpu = smp_processor_id(); 158 unsigned int cpu = smp_processor_id();
159 159
160 /* Enable MMU */ 160 /* Enable MMU */
161 ctrl_outl(MMU_CONTROL_INIT, MMUCR); 161 __raw_writel(MMU_CONTROL_INIT, MMUCR);
162 ctrl_barrier(); 162 ctrl_barrier();
163 163
164 if (asid_cache(cpu) == NO_CONTEXT) 164 if (asid_cache(cpu) == NO_CONTEXT)
@@ -171,9 +171,9 @@ static inline void disable_mmu(void)
171{ 171{
172 unsigned long cr; 172 unsigned long cr;
173 173
174 cr = ctrl_inl(MMUCR); 174 cr = __raw_readl(MMUCR);
175 cr &= ~MMU_CONTROL_INIT; 175 cr &= ~MMU_CONTROL_INIT;
176 ctrl_outl(cr, MMUCR); 176 __raw_writel(cr, MMUCR);
177 177
178 ctrl_barrier(); 178 ctrl_barrier();
179} 179}
diff --git a/arch/sh/include/asm/mmu_context_32.h b/arch/sh/include/asm/mmu_context_32.h
index 8ef800c549ab..10e2e17210d2 100644
--- a/arch/sh/include/asm/mmu_context_32.h
+++ b/arch/sh/include/asm/mmu_context_32.h
@@ -49,11 +49,11 @@ static inline unsigned long get_asid(void)
49/* MMU_TTB is used for optimizing the fault handling. */ 49/* MMU_TTB is used for optimizing the fault handling. */
50static inline void set_TTB(pgd_t *pgd) 50static inline void set_TTB(pgd_t *pgd)
51{ 51{
52 ctrl_outl((unsigned long)pgd, MMU_TTB); 52 __raw_writel((unsigned long)pgd, MMU_TTB);
53} 53}
54 54
55static inline pgd_t *get_TTB(void) 55static inline pgd_t *get_TTB(void)
56{ 56{
57 return (pgd_t *)ctrl_inl(MMU_TTB); 57 return (pgd_t *)__raw_readl(MMU_TTB);
58} 58}
59#endif /* __ASM_SH_MMU_CONTEXT_32_H */ 59#endif /* __ASM_SH_MMU_CONTEXT_32_H */
diff --git a/arch/sh/include/asm/module.h b/arch/sh/include/asm/module.h
index 068bf1659750..b7927de86f9f 100644
--- a/arch/sh/include/asm/module.h
+++ b/arch/sh/include/asm/module.h
@@ -1,7 +1,22 @@
1#ifndef _ASM_SH_MODULE_H 1#ifndef _ASM_SH_MODULE_H
2#define _ASM_SH_MODULE_H 2#define _ASM_SH_MODULE_H
3 3
4#include <asm-generic/module.h> 4struct mod_arch_specific {
5#ifdef CONFIG_DWARF_UNWINDER
6 struct list_head fde_list;
7 struct list_head cie_list;
8#endif
9};
10
11#ifdef CONFIG_64BIT
12#define Elf_Shdr Elf64_Shdr
13#define Elf_Sym Elf64_Sym
14#define Elf_Ehdr Elf64_Ehdr
15#else
16#define Elf_Shdr Elf32_Shdr
17#define Elf_Sym Elf32_Sym
18#define Elf_Ehdr Elf32_Ehdr
19#endif
5 20
6#ifdef CONFIG_CPU_LITTLE_ENDIAN 21#ifdef CONFIG_CPU_LITTLE_ENDIAN
7# ifdef CONFIG_CPU_SH2 22# ifdef CONFIG_CPU_SH2
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index 81bffc0d6860..d71feb359304 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -45,6 +45,7 @@
45#endif 45#endif
46 46
47#ifndef __ASSEMBLY__ 47#ifndef __ASSEMBLY__
48#include <asm/uncached.h>
48 49
49extern unsigned long shm_align_mask; 50extern unsigned long shm_align_mask;
50extern unsigned long max_low_pfn, min_low_pfn; 51extern unsigned long max_low_pfn, min_low_pfn;
@@ -56,7 +57,6 @@ pages_do_alias(unsigned long addr1, unsigned long addr2)
56 return (addr1 ^ addr2) & shm_align_mask; 57 return (addr1 ^ addr2) & shm_align_mask;
57} 58}
58 59
59
60#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) 60#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
61extern void copy_page(void *to, void *from); 61extern void copy_page(void *to, void *from);
62 62
@@ -88,7 +88,7 @@ typedef struct { unsigned long pgd; } pgd_t;
88#define __pte(x) ((pte_t) { (x) } ) 88#define __pte(x) ((pte_t) { (x) } )
89#else 89#else
90typedef struct { unsigned long long pte_low; } pte_t; 90typedef struct { unsigned long long pte_low; } pte_t;
91typedef struct { unsigned long pgprot; } pgprot_t; 91typedef struct { unsigned long long pgprot; } pgprot_t;
92typedef struct { unsigned long pgd; } pgd_t; 92typedef struct { unsigned long pgd; } pgd_t;
93#define pte_val(x) ((x).pte_low) 93#define pte_val(x) ((x).pte_low)
94#define __pte(x) ((pte_t) { (x) } ) 94#define __pte(x) ((pte_t) { (x) } )
@@ -127,12 +127,7 @@ typedef struct page *pgtable_t;
127 * is not visible (it is part of the PMB mapping) and so needs to be 127 * is not visible (it is part of the PMB mapping) and so needs to be
128 * added or subtracted as required. 128 * added or subtracted as required.
129 */ 129 */
130#if defined(CONFIG_PMB_FIXED) 130#ifdef CONFIG_PMB
131/* phys = virt - PAGE_OFFSET - (__MEMORY_START & 0xe0000000) */
132#define PMB_OFFSET (PAGE_OFFSET - PXSEG(__MEMORY_START))
133#define __pa(x) ((unsigned long)(x) - PMB_OFFSET)
134#define __va(x) ((void *)((unsigned long)(x) + PMB_OFFSET))
135#elif defined(CONFIG_32BIT)
136#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START) 131#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START)
137#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START)) 132#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START))
138#else 133#else
@@ -140,6 +135,14 @@ typedef struct page *pgtable_t;
140#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) 135#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
141#endif 136#endif
142 137
138#ifdef CONFIG_UNCACHED_MAPPING
139#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + uncached_start)
140#define CAC_ADDR(addr) ((addr) - uncached_start + PAGE_OFFSET)
141#else
142#define UNCAC_ADDR(addr) ((addr))
143#define CAC_ADDR(addr) ((addr))
144#endif
145
143#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 146#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
144#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 147#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
145 148
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 67f3999b544e..1042f7f0a48b 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -15,20 +15,49 @@
15 */ 15 */
16struct pci_channel { 16struct pci_channel {
17 struct pci_channel *next; 17 struct pci_channel *next;
18 struct pci_bus *bus;
18 19
19 struct pci_ops *pci_ops; 20 struct pci_ops *pci_ops;
20 struct resource *io_resource; 21
21 struct resource *mem_resource; 22 struct resource *resources;
23 unsigned int nr_resources;
22 24
23 unsigned long io_offset; 25 unsigned long io_offset;
24 unsigned long mem_offset; 26 unsigned long mem_offset;
25 27
26 unsigned long reg_base; 28 unsigned long reg_base;
27
28 unsigned long io_map_base; 29 unsigned long io_map_base;
30
31 unsigned int index;
32 unsigned int need_domain_info;
33
34 /* Optional error handling */
35 struct timer_list err_timer, serr_timer;
36 unsigned int err_irq, serr_irq;
29}; 37};
30 38
31extern void register_pci_controller(struct pci_channel *hose); 39/* arch/sh/drivers/pci/pci.c */
40extern int register_pci_controller(struct pci_channel *hose);
41extern void pcibios_report_status(unsigned int status_mask, int warn);
42
43/* arch/sh/drivers/pci/common.c */
44extern int early_read_config_byte(struct pci_channel *hose, int top_bus,
45 int bus, int devfn, int offset, u8 *value);
46extern int early_read_config_word(struct pci_channel *hose, int top_bus,
47 int bus, int devfn, int offset, u16 *value);
48extern int early_read_config_dword(struct pci_channel *hose, int top_bus,
49 int bus, int devfn, int offset, u32 *value);
50extern int early_write_config_byte(struct pci_channel *hose, int top_bus,
51 int bus, int devfn, int offset, u8 value);
52extern int early_write_config_word(struct pci_channel *hose, int top_bus,
53 int bus, int devfn, int offset, u16 value);
54extern int early_write_config_dword(struct pci_channel *hose, int top_bus,
55 int bus, int devfn, int offset, u32 value);
56extern void pcibios_enable_timers(struct pci_channel *hose);
57extern unsigned int pcibios_handle_status_errors(unsigned long addr,
58 unsigned int status, struct pci_channel *hose);
59extern int pci_is_66mhz_capable(struct pci_channel *hose,
60 int top_bus, int current_bus);
32 61
33extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM; 62extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;
34 63
@@ -99,20 +128,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
99} 128}
100#endif 129#endif
101 130
102#ifdef CONFIG_SUPERH32
103/*
104 * If we're on an SH7751 or SH7780 PCI controller, PCI memory is mapped
105 * at the end of the address space in a special non-translatable area.
106 */
107#define PCI_MEM_FIXED_START 0xfd000000
108#define PCI_MEM_FIXED_END (PCI_MEM_FIXED_START + 0x01000000)
109
110#define is_pci_memory_fixed_range(s, e) \
111 ((s) >= PCI_MEM_FIXED_START && (e) < PCI_MEM_FIXED_END)
112#else
113#define is_pci_memory_fixed_range(s, e) (0)
114#endif
115
116/* Board-specific fixup routines. */ 131/* Board-specific fixup routines. */
117int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); 132int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
118 133
@@ -122,6 +137,14 @@ extern void pcibios_resource_to_bus(struct pci_dev *dev,
122extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 137extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
123 struct pci_bus_region *region); 138 struct pci_bus_region *region);
124 139
140#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
141
142static inline int pci_proc_domain(struct pci_bus *bus)
143{
144 struct pci_channel *hose = bus->sysdata;
145 return hose->need_domain_info;
146}
147
125/* Chances are this interrupt is wired PC-style ... */ 148/* Chances are this interrupt is wired PC-style ... */
126static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 149static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
127{ 150{
diff --git a/arch/sh/include/asm/pgalloc.h b/arch/sh/include/asm/pgalloc.h
index 63ca37bd9a95..8c00785c60d5 100644
--- a/arch/sh/include/asm/pgalloc.h
+++ b/arch/sh/include/asm/pgalloc.h
@@ -4,8 +4,16 @@
4#include <linux/quicklist.h> 4#include <linux/quicklist.h>
5#include <asm/page.h> 5#include <asm/page.h>
6 6
7#define QUICK_PGD 0 /* We preserve special mappings over free */ 7#define QUICK_PT 0 /* Other page table pages that are zero on free */
8#define QUICK_PT 1 /* Other page table pages that are zero on free */ 8
9extern pgd_t *pgd_alloc(struct mm_struct *);
10extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
11
12#if PAGETABLE_LEVELS > 2
13extern void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd);
14extern pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address);
15extern void pmd_free(struct mm_struct *mm, pmd_t *pmd);
16#endif
9 17
10static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, 18static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
11 pte_t *pte) 19 pte_t *pte)
@@ -20,28 +28,9 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
20} 28}
21#define pmd_pgtable(pmd) pmd_page(pmd) 29#define pmd_pgtable(pmd) pmd_page(pmd)
22 30
23static inline void pgd_ctor(void *x)
24{
25 pgd_t *pgd = x;
26
27 memcpy(pgd + USER_PTRS_PER_PGD,
28 swapper_pg_dir + USER_PTRS_PER_PGD,
29 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
30}
31
32/* 31/*
33 * Allocate and free page tables. 32 * Allocate and free page tables.
34 */ 33 */
35static inline pgd_t *pgd_alloc(struct mm_struct *mm)
36{
37 return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor);
38}
39
40static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
41{
42 quicklist_free(QUICK_PGD, NULL, pgd);
43}
44
45static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, 34static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
46 unsigned long address) 35 unsigned long address)
47{ 36{
@@ -81,7 +70,6 @@ do { \
81 70
82static inline void check_pgt_cache(void) 71static inline void check_pgt_cache(void)
83{ 72{
84 quicklist_trim(QUICK_PGD, NULL, 25, 16);
85 quicklist_trim(QUICK_PT, NULL, 25, 16); 73 quicklist_trim(QUICK_PT, NULL, 25, 16);
86} 74}
87 75
diff --git a/arch/sh/include/asm/pgtable-2level.h b/arch/sh/include/asm/pgtable-2level.h
new file mode 100644
index 000000000000..19bd89db17e7
--- /dev/null
+++ b/arch/sh/include/asm/pgtable-2level.h
@@ -0,0 +1,23 @@
1#ifndef __ASM_SH_PGTABLE_2LEVEL_H
2#define __ASM_SH_PGTABLE_2LEVEL_H
3
4#include <asm-generic/pgtable-nopmd.h>
5
6/*
7 * traditional two-level paging structure
8 */
9#define PAGETABLE_LEVELS 2
10
11/* PTE bits */
12#define PTE_MAGNITUDE 2 /* 32-bit PTEs */
13
14#define PTE_SHIFT PAGE_SHIFT
15#define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE)
16
17/* PGD bits */
18#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS)
19
20#define PTRS_PER_PGD (PAGE_SIZE / (1 << PTE_MAGNITUDE))
21#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
22
23#endif /* __ASM_SH_PGTABLE_2LEVEL_H */
diff --git a/arch/sh/include/asm/pgtable-3level.h b/arch/sh/include/asm/pgtable-3level.h
new file mode 100644
index 000000000000..249a985d9648
--- /dev/null
+++ b/arch/sh/include/asm/pgtable-3level.h
@@ -0,0 +1,56 @@
1#ifndef __ASM_SH_PGTABLE_3LEVEL_H
2#define __ASM_SH_PGTABLE_3LEVEL_H
3
4#include <asm-generic/pgtable-nopud.h>
5
6/*
7 * Some cores need a 3-level page table layout, for example when using
8 * 64-bit PTEs and 4K pages.
9 */
10#define PAGETABLE_LEVELS 3
11
12#define PTE_MAGNITUDE 3 /* 64-bit PTEs on SH-X2 TLB */
13
14/* PGD bits */
15#define PGDIR_SHIFT 30
16
17#define PTRS_PER_PGD 4
18#define USER_PTRS_PER_PGD 2
19
20/* PMD bits */
21#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - PTE_MAGNITUDE))
22#define PMD_SIZE (1UL << PMD_SHIFT)
23#define PMD_MASK (~(PMD_SIZE-1))
24
25#define PTRS_PER_PMD ((1 << PGDIR_SHIFT) / PMD_SIZE)
26
27#define pmd_ERROR(e) \
28 printk("%s:%d: bad pmd %016llx.\n", __FILE__, __LINE__, pmd_val(e))
29
30typedef struct { unsigned long long pmd; } pmd_t;
31#define pmd_val(x) ((x).pmd)
32#define __pmd(x) ((pmd_t) { (x) } )
33
34static inline unsigned long pud_page_vaddr(pud_t pud)
35{
36 return pud_val(pud);
37}
38
39#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
40static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
41{
42 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
43}
44
45#define pud_none(x) (!pud_val(x))
46#define pud_present(x) (pud_val(x))
47#define pud_clear(xp) do { set_pud(xp, __pud(0)); } while (0)
48#define pud_bad(x) (pud_val(x) & ~PAGE_MASK)
49
50/*
51 * (puds are folded into pgds so this doesn't get actually called,
52 * but the define is needed for a generic inline function.)
53 */
54#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
55
56#endif /* __ASM_SH_PGTABLE_3LEVEL_H */
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index ba3046e4f06f..aab76528abb9 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -12,7 +12,11 @@
12#ifndef __ASM_SH_PGTABLE_H 12#ifndef __ASM_SH_PGTABLE_H
13#define __ASM_SH_PGTABLE_H 13#define __ASM_SH_PGTABLE_H
14 14
15#include <asm-generic/pgtable-nopmd.h> 15#ifdef CONFIG_X2TLB
16#include <asm/pgtable-3level.h>
17#else
18#include <asm/pgtable-2level.h>
19#endif
16#include <asm/page.h> 20#include <asm/page.h>
17 21
18#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
@@ -51,28 +55,12 @@ static inline unsigned long long neff_sign_extend(unsigned long val)
51#define NPHYS_SIGN (1LL << (NPHYS - 1)) 55#define NPHYS_SIGN (1LL << (NPHYS - 1))
52#define NPHYS_MASK (-1LL << NPHYS) 56#define NPHYS_MASK (-1LL << NPHYS)
53 57
54/*
55 * traditional two-level paging structure
56 */
57/* PTE bits */
58#if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64)
59# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */
60#else
61# define PTE_MAGNITUDE 2 /* 32-bit PTEs */
62#endif
63#define PTE_SHIFT PAGE_SHIFT
64#define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE)
65
66/* PGD bits */
67#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS)
68#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 58#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
69#define PGDIR_MASK (~(PGDIR_SIZE-1)) 59#define PGDIR_MASK (~(PGDIR_SIZE-1))
70 60
71/* Entries per level */ 61/* Entries per level */
72#define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE)) 62#define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE))
73#define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
74 63
75#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
76#define FIRST_USER_ADDRESS 0 64#define FIRST_USER_ADDRESS 0
77 65
78#define PHYS_ADDR_MASK29 0x1fffffff 66#define PHYS_ADDR_MASK29 0x1fffffff
@@ -153,9 +141,9 @@ typedef pte_t *pte_addr_t;
153#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) 141#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
154 142
155/* 143/*
156 * No page table caches to initialise 144 * Initialise the page table caches
157 */ 145 */
158#define pgtable_cache_init() do { } while (0) 146extern void pgtable_cache_init(void);
159 147
160struct vm_area_struct; 148struct vm_area_struct;
161 149
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index 5003ee86f67b..e172d696e52b 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -71,6 +71,8 @@
71#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ 71#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */
72#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ 72#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */
73 73
74#define _PAGE_EXT_WIRED 0x4000 /* software: Wire TLB entry */
75
74/* Wrapper for extended mode pgprot twiddling */ 76/* Wrapper for extended mode pgprot twiddling */
75#define _PAGE_EXT(x) ((unsigned long long)(x) << 32) 77#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
76 78
@@ -141,12 +143,14 @@ static inline unsigned long copy_ptea_attributes(unsigned long x)
141# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) 143# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
142# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) 144# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
143# endif 145# endif
146# define _PAGE_WIRED (_PAGE_EXT(_PAGE_EXT_WIRED))
144#else 147#else
145# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 148# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
146# define _PAGE_SZHUGE (_PAGE_SZ1) 149# define _PAGE_SZHUGE (_PAGE_SZ1)
147# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) 150# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
148# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) 151# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
149# endif 152# endif
153# define _PAGE_WIRED (0)
150#endif 154#endif
151 155
152/* 156/*
diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h
index 17cdbecc3adc..0ee46776dad6 100644
--- a/arch/sh/include/asm/pgtable_64.h
+++ b/arch/sh/include/asm/pgtable_64.h
@@ -43,11 +43,6 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
43} 43}
44#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 44#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
45 45
46static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
47{
48 pmd_val(*pmdp) = (unsigned long) ptep;
49}
50
51/* 46/*
52 * PGD defines. Top level. 47 * PGD defines. Top level.
53 */ 48 */
@@ -128,8 +123,21 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
128#define _PAGE_DIRTY 0x400 /* software: page accessed in write */ 123#define _PAGE_DIRTY 0x400 /* software: page accessed in write */
129#define _PAGE_ACCESSED 0x800 /* software: page referenced */ 124#define _PAGE_ACCESSED 0x800 /* software: page referenced */
130 125
126/* Wrapper for extended mode pgprot twiddling */
127#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
128
129/*
130 * We can use the sign-extended bits in the PTEL to get 32 bits of
131 * software flags. This works for now because no implementations uses
132 * anything above the PPN field.
133 */
134#define _PAGE_WIRED _PAGE_EXT(0x001) /* software: wire the tlb entry */
135
136#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_FILE | _PAGE_SHARED | \
137 _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED)
138
131/* Mask which drops software flags */ 139/* Mask which drops software flags */
132#define _PAGE_FLAGS_HARDWARE_MASK 0xfffffffffffff3dbLL 140#define _PAGE_FLAGS_HARDWARE_MASK (NEFF_MASK & ~(_PAGE_CLEAR_FLAGS))
133 141
134/* 142/*
135 * HugeTLB support 143 * HugeTLB support
@@ -203,12 +211,6 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
203#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) 211#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
204 212
205/* 213/*
206 * Handling allocation failures during page table setup.
207 */
208extern void __handle_bad_pmd_kernel(pmd_t * pmd);
209#define __handle_bad_pmd(x) __handle_bad_pmd_kernel(x)
210
211/*
212 * PTE level access routines. 214 * PTE level access routines.
213 * 215 *
214 * Note1: 216 * Note1:
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 017e0c1807b2..9605e062840f 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -98,13 +98,34 @@ extern struct sh_cpuinfo cpu_data[];
98 98
99/* Forward decl */ 99/* Forward decl */
100struct seq_operations; 100struct seq_operations;
101struct task_struct;
101 102
102extern struct pt_regs fake_swapper_regs; 103extern struct pt_regs fake_swapper_regs;
103 104
105/* arch/sh/kernel/process.c */
106extern unsigned int xstate_size;
107extern void free_thread_xstate(struct task_struct *);
108extern struct kmem_cache *task_xstate_cachep;
109
110/* arch/sh/mm/alignment.c */
111extern int get_unalign_ctl(struct task_struct *, unsigned long addr);
112extern int set_unalign_ctl(struct task_struct *, unsigned int val);
113
114#define GET_UNALIGN_CTL(tsk, addr) get_unalign_ctl((tsk), (addr))
115#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
116
117/* arch/sh/mm/init.c */
118extern unsigned int mem_init_done;
119
104/* arch/sh/kernel/setup.c */ 120/* arch/sh/kernel/setup.c */
105const char *get_cpu_subtype(struct sh_cpuinfo *c); 121const char *get_cpu_subtype(struct sh_cpuinfo *c);
106extern const struct seq_operations cpuinfo_op; 122extern const struct seq_operations cpuinfo_op;
107 123
124/* thread_struct flags */
125#define SH_THREAD_UAC_NOPRINT (1 << 0)
126#define SH_THREAD_UAC_SIGBUS (1 << 1)
127#define SH_THREAD_UAC_MASK (SH_THREAD_UAC_NOPRINT | SH_THREAD_UAC_SIGBUS)
128
108/* processor boot mode configuration */ 129/* processor boot mode configuration */
109#define MODE_PIN0 (1 << 0) 130#define MODE_PIN0 (1 << 0)
110#define MODE_PIN1 (1 << 1) 131#define MODE_PIN1 (1 << 1)
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 1f3d6fab660c..572b4eb09493 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -14,6 +14,7 @@
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/types.h> 15#include <asm/types.h>
16#include <asm/ptrace.h> 16#include <asm/ptrace.h>
17#include <asm/hw_breakpoint.h>
17 18
18/* 19/*
19 * Default implementation of macro that returns current 20 * Default implementation of macro that returns current
@@ -90,9 +91,9 @@ struct sh_fpu_soft_struct {
90 unsigned long entry_pc; 91 unsigned long entry_pc;
91}; 92};
92 93
93union sh_fpu_union { 94union thread_xstate {
94 struct sh_fpu_hard_struct hard; 95 struct sh_fpu_hard_struct hardfpu;
95 struct sh_fpu_soft_struct soft; 96 struct sh_fpu_soft_struct softfpu;
96}; 97};
97 98
98struct thread_struct { 99struct thread_struct {
@@ -100,38 +101,30 @@ struct thread_struct {
100 unsigned long sp; 101 unsigned long sp;
101 unsigned long pc; 102 unsigned long pc;
102 103
103 /* Hardware debugging registers */ 104 /* Various thread flags, see SH_THREAD_xxx */
104 unsigned long ubc_pc; 105 unsigned long flags;
105 106
106 /* floating point info */ 107 /* Save middle states of ptrace breakpoints */
107 union sh_fpu_union fpu; 108 struct perf_event *ptrace_bps[HBP_NUM];
108 109
109#ifdef CONFIG_SH_DSP 110#ifdef CONFIG_SH_DSP
110 /* Dsp status information */ 111 /* Dsp status information */
111 struct sh_dsp_struct dsp_status; 112 struct sh_dsp_struct dsp_status;
112#endif 113#endif
113};
114 114
115/* Count of active tasks with UBC settings */ 115 /* Extended processor state */
116extern int ubc_usercnt; 116 union thread_xstate *xstate;
117};
117 118
118#define INIT_THREAD { \ 119#define INIT_THREAD { \
119 .sp = sizeof(init_stack) + (long) &init_stack, \ 120 .sp = sizeof(init_stack) + (long) &init_stack, \
121 .flags = 0, \
120} 122}
121 123
122/*
123 * Do necessary setup to start up a newly executed thread.
124 */
125#define start_thread(_regs, new_pc, new_sp) \
126 set_fs(USER_DS); \
127 _regs->pr = 0; \
128 _regs->sr = SR_FD; /* User mode. */ \
129 _regs->pc = new_pc; \
130 _regs->regs[15] = new_sp
131
132/* Forward declaration, a strange C thing */ 124/* Forward declaration, a strange C thing */
133struct task_struct; 125struct task_struct;
134struct mm_struct; 126
127extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp);
135 128
136/* Free all resources held by a thread. */ 129/* Free all resources held by a thread. */
137extern void release_thread(struct task_struct *); 130extern void release_thread(struct task_struct *);
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index 5727d31b0ccf..621bc4618c6b 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -87,26 +87,31 @@ struct sh_fpu_hard_struct {
87 /* long status; * software status information */ 87 /* long status; * software status information */
88}; 88};
89 89
90#if 0
91/* Dummy fpu emulator */ 90/* Dummy fpu emulator */
92struct sh_fpu_soft_struct { 91struct sh_fpu_soft_struct {
93 unsigned long long fp_regs[32]; 92 unsigned long fp_regs[64];
94 unsigned int fpscr; 93 unsigned int fpscr;
95 unsigned char lookahead; 94 unsigned char lookahead;
96 unsigned long entry_pc; 95 unsigned long entry_pc;
97}; 96};
98#endif
99 97
100union sh_fpu_union { 98union thread_xstate {
101 struct sh_fpu_hard_struct hard; 99 struct sh_fpu_hard_struct hardfpu;
102 /* 'hard' itself only produces 32 bit alignment, yet we need 100 struct sh_fpu_soft_struct softfpu;
103 to access it using 64 bit load/store as well. */ 101 /*
102 * The structure definitions only produce 32 bit alignment, yet we need
103 * to access them using 64 bit load/store as well.
104 */
104 unsigned long long alignment_dummy; 105 unsigned long long alignment_dummy;
105}; 106};
106 107
107struct thread_struct { 108struct thread_struct {
108 unsigned long sp; 109 unsigned long sp;
109 unsigned long pc; 110 unsigned long pc;
111
112 /* Various thread flags, see SH_THREAD_xxx */
113 unsigned long flags;
114
110 /* This stores the address of the pt_regs built during a context 115 /* This stores the address of the pt_regs built during a context
111 switch, or of the register save area built for a kernel mode 116 switch, or of the register save area built for a kernel mode
112 exception. It is used for backtracing the stack of a sleeping task 117 exception. It is used for backtracing the stack of a sleeping task
@@ -122,7 +127,7 @@ struct thread_struct {
122 /* Hardware debugging registers may come here */ 127 /* Hardware debugging registers may come here */
123 128
124 /* floating point info */ 129 /* floating point info */
125 union sh_fpu_union fpu; 130 union thread_xstate *xstate;
126}; 131};
127 132
128#define INIT_MMAP \ 133#define INIT_MMAP \
@@ -137,7 +142,7 @@ struct thread_struct {
137 .trap_no = 0, \ 142 .trap_no = 0, \
138 .error_code = 0, \ 143 .error_code = 0, \
139 .address = 0, \ 144 .address = 0, \
140 .fpu = { { { 0, } }, } \ 145 .flags = 0, \
141} 146}
142 147
143/* 148/*
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 1dc12cb44a2d..e11b14ea2c43 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -102,13 +102,15 @@ struct pt_dspregs {
102#define PTRACE_GETDSPREGS 55 /* DSP registers */ 102#define PTRACE_GETDSPREGS 55 /* DSP registers */
103#define PTRACE_SETDSPREGS 56 103#define PTRACE_SETDSPREGS 56
104 104
105#define PT_TEXT_END_ADDR 240 105#define PT_TEXT_END_ADDR 240
106#define PT_TEXT_ADDR 244 /* &(struct user)->start_code */ 106#define PT_TEXT_ADDR 244 /* &(struct user)->start_code */
107#define PT_DATA_ADDR 248 /* &(struct user)->start_data */ 107#define PT_DATA_ADDR 248 /* &(struct user)->start_data */
108#define PT_TEXT_LEN 252 108#define PT_TEXT_LEN 252
109 109
110#ifdef __KERNEL__ 110#ifdef __KERNEL__
111#include <asm/addrspace.h> 111#include <asm/addrspace.h>
112#include <asm/page.h>
113#include <asm/system.h>
112 114
113#define user_mode(regs) (((regs)->sr & 0x40000000)==0) 115#define user_mode(regs) (((regs)->sr & 0x40000000)==0)
114#define instruction_pointer(regs) ((unsigned long)(regs)->pc) 116#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
@@ -124,6 +126,12 @@ struct task_struct;
124extern void user_enable_single_step(struct task_struct *); 126extern void user_enable_single_step(struct task_struct *);
125extern void user_disable_single_step(struct task_struct *); 127extern void user_disable_single_step(struct task_struct *);
126 128
129struct perf_event;
130struct perf_sample_data;
131
132extern void ptrace_triggered(struct perf_event *bp, int nmi,
133 struct perf_sample_data *data, struct pt_regs *regs);
134
127#define task_pt_regs(task) \ 135#define task_pt_regs(task) \
128 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) 136 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1)
129 137
@@ -131,10 +139,8 @@ static inline unsigned long profile_pc(struct pt_regs *regs)
131{ 139{
132 unsigned long pc = instruction_pointer(regs); 140 unsigned long pc = instruction_pointer(regs);
133 141
134#ifdef P2SEG 142 if (virt_addr_uncached(pc))
135 if (pc >= P2SEG && pc < P3SEG) 143 return CAC_ADDR(pc);
136 pc -= 0x20000000;
137#endif
138 144
139 return pc; 145 return pc;
140} 146}
diff --git a/arch/sh/include/asm/reboot.h b/arch/sh/include/asm/reboot.h
new file mode 100644
index 000000000000..b3da0c63fc3d
--- /dev/null
+++ b/arch/sh/include/asm/reboot.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_SH_REBOOT_H
2#define __ASM_SH_REBOOT_H
3
4#include <linux/kdebug.h>
5
6struct pt_regs;
7
8struct machine_ops {
9 void (*restart)(char *cmd);
10 void (*halt)(void);
11 void (*power_off)(void);
12 void (*shutdown)(void);
13 void (*crash_shutdown)(struct pt_regs *);
14};
15
16extern struct machine_ops machine_ops;
17
18/* arch/sh/kernel/machine_kexec.c */
19void native_machine_crash_shutdown(struct pt_regs *regs);
20
21#endif /* __ASM_SH_REBOOT_H */
diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h
index ce3743599b27..4758325bb24a 100644
--- a/arch/sh/include/asm/setup.h
+++ b/arch/sh/include/asm/setup.h
@@ -18,7 +18,6 @@
18/* ... */ 18/* ... */
19#define COMMAND_LINE ((char *) (PARAM+0x100)) 19#define COMMAND_LINE ((char *) (PARAM+0x100))
20 20
21int setup_early_printk(char *);
22void sh_mv_setup(void); 21void sh_mv_setup(void);
23 22
24#endif /* __KERNEL__ */ 23#endif /* __KERNEL__ */
diff --git a/arch/sh/include/asm/sh_bios.h b/arch/sh/include/asm/sh_bios.h
index d9c96d7cf6c7..95714c28422b 100644
--- a/arch/sh/include/asm/sh_bios.h
+++ b/arch/sh/include/asm/sh_bios.h
@@ -1,18 +1,27 @@
1#ifndef __ASM_SH_BIOS_H 1#ifndef __ASM_SH_BIOS_H
2#define __ASM_SH_BIOS_H 2#define __ASM_SH_BIOS_H
3 3
4#ifdef CONFIG_SH_STANDARD_BIOS
5
4/* 6/*
5 * Copyright (C) 2000 Greg Banks, Mitch Davis 7 * Copyright (C) 2000 Greg Banks, Mitch Davis
6 * C API to interface to the standard LinuxSH BIOS 8 * C API to interface to the standard LinuxSH BIOS
7 * usually from within the early stages of kernel boot. 9 * usually from within the early stages of kernel boot.
8 */ 10 */
9
10
11extern void sh_bios_console_write(const char *buf, unsigned int len); 11extern void sh_bios_console_write(const char *buf, unsigned int len);
12extern void sh_bios_char_out(char ch);
13extern void sh_bios_gdb_detach(void); 12extern void sh_bios_gdb_detach(void);
14 13
15extern void sh_bios_get_node_addr(unsigned char *node_addr); 14extern void sh_bios_get_node_addr(unsigned char *node_addr);
16extern void sh_bios_shutdown(unsigned int how); 15extern void sh_bios_shutdown(unsigned int how);
17 16
17extern void sh_bios_vbr_init(void);
18extern void sh_bios_vbr_reload(void);
19
20#else
21
22static inline void sh_bios_vbr_init(void) { }
23static inline void sh_bios_vbr_reload(void) { }
24
25#endif /* CONFIG_SH_STANDARD_BIOS */
26
18#endif /* __ASM_SH_BIOS_H */ 27#endif /* __ASM_SH_BIOS_H */
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h
index fe9c2a1ad047..64eb41a063e8 100644
--- a/arch/sh/include/asm/suspend.h
+++ b/arch/sh/include/asm/suspend.h
@@ -92,5 +92,6 @@ extern unsigned long sh_mobile_sleep_supported;
92#define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */ 92#define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */
93#define SUSP_SH_SF (1 << 4) /* Enable self-refresh */ 93#define SUSP_SH_SF (1 << 4) /* Enable self-refresh */
94#define SUSP_SH_MMU (1 << 5) /* Save/restore MMU and cache */ 94#define SUSP_SH_MMU (1 << 5) /* Save/restore MMU and cache */
95#define SUSP_SH_REGS (1 << 6) /* Save/restore registers */
95 96
96#endif /* _ASM_SH_SUSPEND_H */ 97#endif /* _ASM_SH_SUSPEND_H */
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index c15415b4b169..0bd7a17d5e1a 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -10,7 +10,6 @@
10#include <linux/compiler.h> 10#include <linux/compiler.h>
11#include <linux/linkage.h> 11#include <linux/linkage.h>
12#include <asm/types.h> 12#include <asm/types.h>
13#include <asm/ptrace.h>
14 13
15#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ 14#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
16 15
@@ -32,7 +31,7 @@
32#define mb() __asm__ __volatile__ ("synco": : :"memory") 31#define mb() __asm__ __volatile__ ("synco": : :"memory")
33#define rmb() mb() 32#define rmb() mb()
34#define wmb() __asm__ __volatile__ ("synco": : :"memory") 33#define wmb() __asm__ __volatile__ ("synco": : :"memory")
35#define ctrl_barrier() __icbi(0xa8000000) 34#define ctrl_barrier() __icbi(PAGE_OFFSET)
36#define read_barrier_depends() do { } while(0) 35#define read_barrier_depends() do { } while(0)
37#else 36#else
38#define mb() __asm__ __volatile__ ("": : :"memory") 37#define mb() __asm__ __volatile__ ("": : :"memory")
@@ -114,6 +113,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
114 (unsigned long)_n_, sizeof(*(ptr))); \ 113 (unsigned long)_n_, sizeof(*(ptr))); \
115 }) 114 })
116 115
116struct pt_regs;
117
117extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); 118extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
118void free_initmem(void); 119void free_initmem(void);
119void free_initrd_mem(unsigned long start, unsigned long end); 120void free_initrd_mem(unsigned long start, unsigned long end);
@@ -137,14 +138,14 @@ extern unsigned int instruction_size(unsigned int insn);
137#endif 138#endif
138 139
139extern unsigned long cached_to_uncached; 140extern unsigned long cached_to_uncached;
141extern unsigned long uncached_size;
140 142
141extern struct dentry *sh_debugfs_root; 143extern struct dentry *sh_debugfs_root;
142 144
143void per_cpu_trap_init(void); 145void per_cpu_trap_init(void);
144void default_idle(void); 146void default_idle(void);
145void cpu_idle_wait(void); 147void cpu_idle_wait(void);
146 148void stop_this_cpu(void *);
147asmlinkage void break_point_trap(void);
148 149
149#ifdef CONFIG_SUPERH32 150#ifdef CONFIG_SUPERH32
150#define BUILD_TRAP_HANDLER(name) \ 151#define BUILD_TRAP_HANDLER(name) \
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index 06814f5b59c7..51296b36770e 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -2,6 +2,7 @@
2#define __ASM_SH_SYSTEM_32_H 2#define __ASM_SH_SYSTEM_32_H
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <asm/mmu.h>
5 6
6#ifdef CONFIG_SH_DSP 7#ifdef CONFIG_SH_DSP
7 8
@@ -144,9 +145,6 @@ do { \
144 __restore_dsp(prev); \ 145 __restore_dsp(prev); \
145} while (0) 146} while (0)
146 147
147#define __uses_jump_to_uncached \
148 noinline __attribute__ ((__section__ (".uncached.text")))
149
150/* 148/*
151 * Jump to uncached area. 149 * Jump to uncached area.
152 * When handling TLB or caches, we need to do it from an uncached area. 150 * When handling TLB or caches, we need to do it from an uncached area.
@@ -216,6 +214,17 @@ static inline reg_size_t register_align(void *val)
216int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, 214int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
217 struct mem_access *ma, int); 215 struct mem_access *ma, int);
218 216
217static inline void trigger_address_error(void)
218{
219 if (__in_29bit_mode())
220 __asm__ __volatile__ (
221 "ldc %0, sr\n\t"
222 "mov.l @%1, %0"
223 :
224 : "r" (0x10000000), "r" (0x80000001)
225 );
226}
227
219asmlinkage void do_address_error(struct pt_regs *regs, 228asmlinkage void do_address_error(struct pt_regs *regs,
220 unsigned long writeaccess, 229 unsigned long writeaccess,
221 unsigned long address); 230 unsigned long address);
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h
index ab1dd917ea87..36338646dfc8 100644
--- a/arch/sh/include/asm/system_64.h
+++ b/arch/sh/include/asm/system_64.h
@@ -18,6 +18,7 @@
18/* 18/*
19 * switch_to() should switch tasks to task nr n, first 19 * switch_to() should switch tasks to task nr n, first
20 */ 20 */
21struct thread_struct;
21struct task_struct *sh64_switch_to(struct task_struct *prev, 22struct task_struct *sh64_switch_to(struct task_struct *prev,
22 struct thread_struct *prev_thread, 23 struct thread_struct *prev_thread,
23 struct task_struct *next, 24 struct task_struct *next,
@@ -33,8 +34,6 @@ do { \
33 &next->thread); \ 34 &next->thread); \
34} while (0) 35} while (0)
35 36
36#define __uses_jump_to_uncached
37
38#define jump_to_uncached() do { } while (0) 37#define jump_to_uncached() do { } while (0)
39#define back_to_cached() do { } while (0) 38#define back_to_cached() do { } while (0)
40 39
@@ -48,6 +47,13 @@ static inline reg_size_t register_align(void *val)
48 return (unsigned long long)(signed long long)(signed long)val; 47 return (unsigned long long)(signed long long)(signed long)val;
49} 48}
50 49
50extern void phys_stext(void);
51
52static inline void trigger_address_error(void)
53{
54 phys_stext();
55}
56
51#define SR_BL_LL 0x0000000010000000LL 57#define SR_BL_LL 0x0000000010000000LL
52 58
53static inline void set_bl_bit(void) 59static inline void set_bl_bit(void)
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h
index 1f3d927e2265..55a36fef6875 100644
--- a/arch/sh/include/asm/thread_info.h
+++ b/arch/sh/include/asm/thread_info.h
@@ -93,14 +93,16 @@ static inline struct thread_info *current_thread_info(void)
93 93
94#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) 94#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
95 95
96#else /* THREAD_SHIFT < PAGE_SHIFT */ 96#endif
97
98#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
99 97
100extern struct thread_info *alloc_thread_info(struct task_struct *tsk); 98extern struct thread_info *alloc_thread_info(struct task_struct *tsk);
101extern void free_thread_info(struct thread_info *ti); 99extern void free_thread_info(struct thread_info *ti);
100extern void arch_task_cache_init(void);
101#define arch_task_cache_init arch_task_cache_init
102extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
103extern void init_thread_xstate(void);
102 104
103#endif /* THREAD_SHIFT < PAGE_SHIFT */ 105#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
104 106
105#endif /* __ASSEMBLY__ */ 107#endif /* __ASSEMBLY__ */
106 108
diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h
index da8fe7ab8728..75abb38dffd5 100644
--- a/arch/sh/include/asm/tlb.h
+++ b/arch/sh/include/asm/tlb.h
@@ -11,6 +11,7 @@
11#ifdef CONFIG_MMU 11#ifdef CONFIG_MMU
12#include <asm/pgalloc.h> 12#include <asm/pgalloc.h>
13#include <asm/tlbflush.h> 13#include <asm/tlbflush.h>
14#include <asm/mmu_context.h>
14 15
15/* 16/*
16 * TLB handling. This allows us to remove pages from the page 17 * TLB handling. This allows us to remove pages from the page
@@ -97,6 +98,22 @@ tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
97 98
98#define tlb_migrate_finish(mm) do { } while (0) 99#define tlb_migrate_finish(mm) do { } while (0)
99 100
101#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SUPERH64)
102extern void tlb_wire_entry(struct vm_area_struct *, unsigned long, pte_t);
103extern void tlb_unwire_entry(void);
104#else
105static inline void tlb_wire_entry(struct vm_area_struct *vma ,
106 unsigned long addr, pte_t pte)
107{
108 BUG();
109}
110
111static inline void tlb_unwire_entry(void)
112{
113 BUG();
114}
115#endif
116
100#else /* CONFIG_MMU */ 117#else /* CONFIG_MMU */
101 118
102#define tlb_start_vma(tlb, vma) do { } while (0) 119#define tlb_start_vma(tlb, vma) do { } while (0)
diff --git a/arch/sh/include/asm/ubc.h b/arch/sh/include/asm/ubc.h
deleted file mode 100644
index 9bf961684431..000000000000
--- a/arch/sh/include/asm/ubc.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * include/asm-sh/ubc.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#ifndef __ASM_SH_UBC_H
12#define __ASM_SH_UBC_H
13#ifdef __KERNEL__
14
15#include <cpu/ubc.h>
16
17/* User Break Controller */
18#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
19#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
20#else
21#define UBC_TYPE_SH7729 0
22#endif
23
24#define BAMR_ASID (1 << 2)
25#define BAMR_NONE 0
26#define BAMR_10 0x1
27#define BAMR_12 0x2
28#define BAMR_ALL 0x3
29#define BAMR_16 0x8
30#define BAMR_20 0x9
31
32#define BBR_INST (1 << 4)
33#define BBR_DATA (2 << 4)
34#define BBR_READ (1 << 2)
35#define BBR_WRITE (2 << 2)
36#define BBR_BYTE 0x1
37#define BBR_HALF 0x2
38#define BBR_LONG 0x3
39#define BBR_QUAD (1 << 6) /* SH7750 */
40#define BBR_CPU (1 << 6) /* SH7709A,SH7729 */
41#define BBR_DMA (2 << 6) /* SH7709A,SH7729 */
42
43#define BRCR_CMFA (1 << 15)
44#define BRCR_CMFB (1 << 14)
45
46#if defined CONFIG_CPU_SH2A
47#define BRCR_CMFCA (1 << 15)
48#define BRCR_CMFCB (1 << 14)
49#define BRCR_CMFDA (1 << 13)
50#define BRCR_CMFDB (1 << 12)
51#define BRCR_PCBB (1 << 6) /* 1: after execution */
52#define BRCR_PCBA (1 << 5) /* 1: after execution */
53#define BRCR_PCTE 0
54#else
55#define BRCR_PCTE (1 << 11)
56#define BRCR_PCBA (1 << 10) /* 1: after execution */
57#define BRCR_DBEB (1 << 7)
58#define BRCR_PCBB (1 << 6)
59#define BRCR_SEQ (1 << 3)
60#define BRCR_UBDE (1 << 0)
61#endif
62
63#endif /* __KERNEL__ */
64#endif /* __ASM_SH_UBC_H */
diff --git a/arch/sh/include/asm/uncached.h b/arch/sh/include/asm/uncached.h
new file mode 100644
index 000000000000..e3419f96626a
--- /dev/null
+++ b/arch/sh/include/asm/uncached.h
@@ -0,0 +1,18 @@
1#ifndef __ASM_SH_UNCACHED_H
2#define __ASM_SH_UNCACHED_H
3
4#include <linux/bug.h>
5
6#ifdef CONFIG_UNCACHED_MAPPING
7extern unsigned long uncached_start, uncached_end;
8
9extern int virt_addr_uncached(unsigned long kaddr);
10extern void uncached_init(void);
11extern void uncached_resize(unsigned long size);
12#else
13#define virt_addr_uncached(kaddr) (0)
14#define uncached_init() do { } while (0)
15#define uncached_resize(size) BUG()
16#endif
17
18#endif /* __ASM_SH_UNCACHED_H */
diff --git a/arch/sh/include/asm/vmlinux.lds.h b/arch/sh/include/asm/vmlinux.lds.h
index 244ec4ad9a79..d58ad493b3a6 100644
--- a/arch/sh/include/asm/vmlinux.lds.h
+++ b/arch/sh/include/asm/vmlinux.lds.h
@@ -14,4 +14,12 @@
14#define DWARF_EH_FRAME 14#define DWARF_EH_FRAME
15#endif 15#endif
16 16
17#ifdef CONFIG_SUPERH64
18#define EXTRA_TEXT \
19 *(.text64) \
20 *(.text..SHmedia32)
21#else
22#define EXTRA_TEXT
23#endif
24
17#endif /* __ASM_SH_VMLINUX_LDS_H */ 25#endif /* __ASM_SH_VMLINUX_LDS_H */
diff --git a/arch/sh/include/asm/watchdog.h b/arch/sh/include/asm/watchdog.h
index 19dfff5c8511..85a7aca7fb8f 100644
--- a/arch/sh/include/asm/watchdog.h
+++ b/arch/sh/include/asm/watchdog.h
@@ -70,7 +70,7 @@
70 */ 70 */
71static inline __u32 sh_wdt_read_cnt(void) 71static inline __u32 sh_wdt_read_cnt(void)
72{ 72{
73 return ctrl_inl(WTCNT_R); 73 return __raw_readl(WTCNT_R);
74} 74}
75 75
76/** 76/**
@@ -82,7 +82,7 @@ static inline __u32 sh_wdt_read_cnt(void)
82 */ 82 */
83static inline void sh_wdt_write_cnt(__u32 val) 83static inline void sh_wdt_write_cnt(__u32 val)
84{ 84{
85 ctrl_outl((WTCNT_HIGH << 24) | (__u32)val, WTCNT); 85 __raw_writel((WTCNT_HIGH << 24) | (__u32)val, WTCNT);
86} 86}
87 87
88/** 88/**
@@ -94,7 +94,7 @@ static inline void sh_wdt_write_cnt(__u32 val)
94 */ 94 */
95static inline void sh_wdt_write_bst(__u32 val) 95static inline void sh_wdt_write_bst(__u32 val)
96{ 96{
97 ctrl_outl((WTBST_HIGH << 24) | (__u32)val, WTBST); 97 __raw_writel((WTBST_HIGH << 24) | (__u32)val, WTBST);
98} 98}
99/** 99/**
100 * sh_wdt_read_csr - Read from Control/Status Register 100 * sh_wdt_read_csr - Read from Control/Status Register
@@ -103,7 +103,7 @@ static inline void sh_wdt_write_bst(__u32 val)
103 */ 103 */
104static inline __u32 sh_wdt_read_csr(void) 104static inline __u32 sh_wdt_read_csr(void)
105{ 105{
106 return ctrl_inl(WTCSR_R); 106 return __raw_readl(WTCSR_R);
107} 107}
108 108
109/** 109/**
@@ -115,7 +115,7 @@ static inline __u32 sh_wdt_read_csr(void)
115 */ 115 */
116static inline void sh_wdt_write_csr(__u32 val) 116static inline void sh_wdt_write_csr(__u32 val)
117{ 117{
118 ctrl_outl((WTCSR_HIGH << 24) | (__u32)val, WTCSR); 118 __raw_writel((WTCSR_HIGH << 24) | (__u32)val, WTCSR);
119} 119}
120#else 120#else
121/** 121/**
@@ -124,7 +124,7 @@ static inline void sh_wdt_write_csr(__u32 val)
124 */ 124 */
125static inline __u8 sh_wdt_read_cnt(void) 125static inline __u8 sh_wdt_read_cnt(void)
126{ 126{
127 return ctrl_inb(WTCNT_R); 127 return __raw_readb(WTCNT_R);
128} 128}
129 129
130/** 130/**
@@ -136,7 +136,7 @@ static inline __u8 sh_wdt_read_cnt(void)
136 */ 136 */
137static inline void sh_wdt_write_cnt(__u8 val) 137static inline void sh_wdt_write_cnt(__u8 val)
138{ 138{
139 ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, WTCNT); 139 __raw_writew((WTCNT_HIGH << 8) | (__u16)val, WTCNT);
140} 140}
141 141
142/** 142/**
@@ -146,7 +146,7 @@ static inline void sh_wdt_write_cnt(__u8 val)
146 */ 146 */
147static inline __u8 sh_wdt_read_csr(void) 147static inline __u8 sh_wdt_read_csr(void)
148{ 148{
149 return ctrl_inb(WTCSR_R); 149 return __raw_readb(WTCSR_R);
150} 150}
151 151
152/** 152/**
@@ -158,7 +158,7 @@ static inline __u8 sh_wdt_read_csr(void)
158 */ 158 */
159static inline void sh_wdt_write_csr(__u8 val) 159static inline void sh_wdt_write_csr(__u8 val)
160{ 160{
161 ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR); 161 __raw_writew((WTCSR_HIGH << 8) | (__u16)val, WTCSR);
162} 162}
163#endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */ 163#endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */
164#endif /* __KERNEL__ */ 164#endif /* __KERNEL__ */
diff --git a/arch/sh/include/cpu-sh2/cpu/ubc.h b/arch/sh/include/cpu-sh2/cpu/ubc.h
deleted file mode 100644
index ba0e87f19c7a..000000000000
--- a/arch/sh/include/cpu-sh2/cpu/ubc.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * include/asm-sh/cpu-sh2/ubc.h
3 *
4 * Copyright (C) 2003 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH2_UBC_H
11#define __ASM_CPU_SH2_UBC_H
12
13#define UBC_BARA 0xffffff40
14#define UBC_BAMRA 0xffffff44
15#define UBC_BBRA 0xffffff48
16#define UBC_BARB 0xffffff60
17#define UBC_BAMRB 0xffffff64
18#define UBC_BBRB 0xffffff68
19#define UBC_BDRB 0xffffff70
20#define UBC_BDMRB 0xffffff74
21#define UBC_BRCR 0xffffff78
22
23/*
24 * We don't have any ASID changes to make in the UBC on the SH-2.
25 *
26 * Make these purposely invalid to track misuse.
27 */
28#define UBC_BASRA 0x00000000
29#define UBC_BASRB 0x00000000
30
31#endif /* __ASM_CPU_SH2_UBC_H */
32
diff --git a/arch/sh/include/cpu-sh2/cpu/watchdog.h b/arch/sh/include/cpu-sh2/cpu/watchdog.h
index 393161c9c6d0..1eab8aa63a6d 100644
--- a/arch/sh/include/cpu-sh2/cpu/watchdog.h
+++ b/arch/sh/include/cpu-sh2/cpu/watchdog.h
@@ -44,7 +44,7 @@ static inline __u8 sh_wdt_read_rstcsr(void)
44 /* 44 /*
45 * Same read/write brain-damage as for WTCNT here.. 45 * Same read/write brain-damage as for WTCNT here..
46 */ 46 */
47 return ctrl_inb(RSTCSR_R); 47 return __raw_readb(RSTCSR_R);
48} 48}
49 49
50/** 50/**
@@ -62,7 +62,7 @@ static inline void sh_wdt_write_rstcsr(__u8 val)
62 * we can't presently touch the WOVF bit, since the upper byte 62 * we can't presently touch the WOVF bit, since the upper byte
63 * has to be swapped for this. So just leave it alone.. 63 * has to be swapped for this. So just leave it alone..
64 */ 64 */
65 ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, RSTCSR); 65 __raw_writeb((WTCNT_HIGH << 8) | (__u16)val, RSTCSR);
66} 66}
67 67
68#endif /* __ASM_CPU_SH2_WATCHDOG_H */ 68#endif /* __ASM_CPU_SH2_WATCHDOG_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/dac.h b/arch/sh/include/cpu-sh3/cpu/dac.h
index 05fda8316ebc..98f1d15f0ab5 100644
--- a/arch/sh/include/cpu-sh3/cpu/dac.h
+++ b/arch/sh/include/cpu-sh3/cpu/dac.h
@@ -17,25 +17,25 @@
17static __inline__ void sh_dac_enable(int channel) 17static __inline__ void sh_dac_enable(int channel)
18{ 18{
19 unsigned char v; 19 unsigned char v;
20 v = ctrl_inb(DACR); 20 v = __raw_readb(DACR);
21 if(channel) v |= DACR_DAOE1; 21 if(channel) v |= DACR_DAOE1;
22 else v |= DACR_DAOE0; 22 else v |= DACR_DAOE0;
23 ctrl_outb(v,DACR); 23 __raw_writeb(v,DACR);
24} 24}
25 25
26static __inline__ void sh_dac_disable(int channel) 26static __inline__ void sh_dac_disable(int channel)
27{ 27{
28 unsigned char v; 28 unsigned char v;
29 v = ctrl_inb(DACR); 29 v = __raw_readb(DACR);
30 if(channel) v &= ~DACR_DAOE1; 30 if(channel) v &= ~DACR_DAOE1;
31 else v &= ~DACR_DAOE0; 31 else v &= ~DACR_DAOE0;
32 ctrl_outb(v,DACR); 32 __raw_writeb(v,DACR);
33} 33}
34 34
35static __inline__ void sh_dac_output(u8 value, int channel) 35static __inline__ void sh_dac_output(u8 value, int channel)
36{ 36{
37 if(channel) ctrl_outb(value,DADR1); 37 if(channel) __raw_writeb(value,DADR1);
38 else ctrl_outb(value,DADR0); 38 else __raw_writeb(value,DADR0);
39} 39}
40 40
41#endif /* __ASM_CPU_SH3_DAC_H */ 41#endif /* __ASM_CPU_SH3_DAC_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/dma.h b/arch/sh/include/cpu-sh3/cpu/dma.h
index 0ea15f3f2363..207811a7a650 100644
--- a/arch/sh/include/cpu-sh3/cpu/dma.h
+++ b/arch/sh/include/cpu-sh3/cpu/dma.h
@@ -20,8 +20,10 @@
20#define TS_32 0x00000010 20#define TS_32 0x00000010
21#define TS_128 0x00000018 21#define TS_128 0x00000018
22 22
23#define CHCR_TS_MASK 0x18 23#define CHCR_TS_LOW_MASK 0x18
24#define CHCR_TS_SHIFT 3 24#define CHCR_TS_LOW_SHIFT 3
25#define CHCR_TS_HIGH_MASK 0
26#define CHCR_TS_HIGH_SHIFT 0
25 27
26#define DMAOR_INIT DMAOR_DME 28#define DMAOR_INIT DMAOR_DME
27 29
@@ -36,11 +38,13 @@ enum {
36 XMIT_SZ_128BIT, 38 XMIT_SZ_128BIT,
37}; 39};
38 40
39static unsigned int ts_shift[] __maybe_unused = { 41#define TS_SHIFT { \
40 [XMIT_SZ_8BIT] = 0, 42 [XMIT_SZ_8BIT] = 0, \
41 [XMIT_SZ_16BIT] = 1, 43 [XMIT_SZ_16BIT] = 1, \
42 [XMIT_SZ_32BIT] = 2, 44 [XMIT_SZ_32BIT] = 2, \
43 [XMIT_SZ_128BIT] = 4, 45 [XMIT_SZ_128BIT] = 4, \
44}; 46}
47
48#define TS_INDEX2VAL(i) (((i) & 3) << CHCR_TS_LOW_SHIFT)
45 49
46#endif /* __ASM_CPU_SH3_DMA_H */ 50#endif /* __ASM_CPU_SH3_DMA_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/ubc.h b/arch/sh/include/cpu-sh3/cpu/ubc.h
deleted file mode 100644
index 4e6381d5ff7a..000000000000
--- a/arch/sh/include/cpu-sh3/cpu/ubc.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * include/asm-sh/cpu-sh3/ubc.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#ifndef __ASM_CPU_SH3_UBC_H
12#define __ASM_CPU_SH3_UBC_H
13
14#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \
15 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
16 defined(CONFIG_CPU_SUBTYPE_SH7721)
17#define UBC_BARA 0xa4ffffb0
18#define UBC_BAMRA 0xa4ffffb4
19#define UBC_BBRA 0xa4ffffb8
20#define UBC_BASRA 0xffffffe4
21#define UBC_BARB 0xa4ffffa0
22#define UBC_BAMRB 0xa4ffffa4
23#define UBC_BBRB 0xa4ffffa8
24#define UBC_BASRB 0xffffffe8
25#define UBC_BDRB 0xa4ffff90
26#define UBC_BDMRB 0xa4ffff94
27#define UBC_BRCR 0xa4ffff98
28#else
29#define UBC_BARA 0xffffffb0
30#define UBC_BAMRA 0xffffffb4
31#define UBC_BBRA 0xffffffb8
32#define UBC_BASRA 0xffffffe4
33#define UBC_BARB 0xffffffa0
34#define UBC_BAMRB 0xffffffa4
35#define UBC_BBRB 0xffffffa8
36#define UBC_BASRB 0xffffffe8
37#define UBC_BDRB 0xffffff90
38#define UBC_BDMRB 0xffffff94
39#define UBC_BRCR 0xffffff98
40#endif
41
42#endif /* __ASM_CPU_SH3_UBC_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/addrspace.h b/arch/sh/include/cpu-sh4/cpu/addrspace.h
index a3fa733c1c7d..d51da25da72c 100644
--- a/arch/sh/include/cpu-sh4/cpu/addrspace.h
+++ b/arch/sh/include/cpu-sh4/cpu/addrspace.h
@@ -28,6 +28,15 @@
28#define P4SEG_TLB_DATA 0xf7000000 28#define P4SEG_TLB_DATA 0xf7000000
29#define P4SEG_REG_BASE 0xff000000 29#define P4SEG_REG_BASE 0xff000000
30 30
31#define PA_AREA0 0x00000000
32#define PA_AREA1 0x04000000
33#define PA_AREA2 0x08000000
34#define PA_AREA3 0x0c000000
35#define PA_AREA4 0x10000000
36#define PA_AREA5 0x14000000
37#define PA_AREA6 0x18000000
38#define PA_AREA7 0x1c000000
39
31#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ 40#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
32#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ 41#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
33 42
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
index c4ed660c14cf..e734ea47d8a0 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
@@ -2,22 +2,38 @@
2#define __ASM_SH_CPU_SH4_DMA_SH7780_H 2#define __ASM_SH_CPU_SH4_DMA_SH7780_H
3 3
4#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \ 4#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \
5 defined(CONFIG_CPU_SUBTYPE_SH7722) || \
6 defined(CONFIG_CPU_SUBTYPE_SH7730) 5 defined(CONFIG_CPU_SUBTYPE_SH7730)
7#define DMTE0_IRQ 48 6#define DMTE0_IRQ 48
8#define DMTE4_IRQ 76 7#define DMTE4_IRQ 76
9#define DMAE0_IRQ 78 /* DMA Error IRQ*/ 8#define DMAE0_IRQ 78 /* DMA Error IRQ*/
10#define SH_DMAC_BASE0 0xFE008020 9#define SH_DMAC_BASE0 0xFE008020
11#define SH_DMARS_BASE 0xFE009000 10#define SH_DMARS_BASE0 0xFE009000
11#define CHCR_TS_LOW_MASK 0x00000018
12#define CHCR_TS_LOW_SHIFT 3
13#define CHCR_TS_HIGH_MASK 0
14#define CHCR_TS_HIGH_SHIFT 0
15#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
16#define DMTE0_IRQ 48
17#define DMTE4_IRQ 76
18#define DMAE0_IRQ 78 /* DMA Error IRQ*/
19#define SH_DMAC_BASE0 0xFE008020
20#define SH_DMARS_BASE0 0xFE009000
21#define CHCR_TS_LOW_MASK 0x00000018
22#define CHCR_TS_LOW_SHIFT 3
23#define CHCR_TS_HIGH_MASK 0x00300000
24#define CHCR_TS_HIGH_SHIFT 20
12#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 25#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
13 defined(CONFIG_CPU_SUBTYPE_SH7764) 26 defined(CONFIG_CPU_SUBTYPE_SH7764)
14#define DMTE0_IRQ 34 27#define DMTE0_IRQ 34
15#define DMTE4_IRQ 44 28#define DMTE4_IRQ 44
16#define DMAE0_IRQ 38 29#define DMAE0_IRQ 38
17#define SH_DMAC_BASE0 0xFF608020 30#define SH_DMAC_BASE0 0xFF608020
18#define SH_DMARS_BASE 0xFF609000 31#define SH_DMARS_BASE0 0xFF609000
19#elif defined(CONFIG_CPU_SUBTYPE_SH7723) || \ 32#define CHCR_TS_LOW_MASK 0x00000018
20 defined(CONFIG_CPU_SUBTYPE_SH7724) 33#define CHCR_TS_LOW_SHIFT 3
34#define CHCR_TS_HIGH_MASK 0
35#define CHCR_TS_HIGH_SHIFT 0
36#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
21#define DMTE0_IRQ 48 /* DMAC0A*/ 37#define DMTE0_IRQ 48 /* DMAC0A*/
22#define DMTE4_IRQ 76 /* DMAC0B */ 38#define DMTE4_IRQ 76 /* DMAC0B */
23#define DMTE6_IRQ 40 39#define DMTE6_IRQ 40
@@ -29,7 +45,29 @@
29#define DMAE1_IRQ 74 /* DMA Error IRQ*/ 45#define DMAE1_IRQ 74 /* DMA Error IRQ*/
30#define SH_DMAC_BASE0 0xFE008020 46#define SH_DMAC_BASE0 0xFE008020
31#define SH_DMAC_BASE1 0xFDC08020 47#define SH_DMAC_BASE1 0xFDC08020
32#define SH_DMARS_BASE 0xFDC09000 48#define SH_DMARS_BASE0 0xFDC09000
49#define CHCR_TS_LOW_MASK 0x00000018
50#define CHCR_TS_LOW_SHIFT 3
51#define CHCR_TS_HIGH_MASK 0
52#define CHCR_TS_HIGH_SHIFT 0
53#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
54#define DMTE0_IRQ 48 /* DMAC0A*/
55#define DMTE4_IRQ 76 /* DMAC0B */
56#define DMTE6_IRQ 40
57#define DMTE8_IRQ 42 /* DMAC1A */
58#define DMTE9_IRQ 43
59#define DMTE10_IRQ 72 /* DMAC1B */
60#define DMTE11_IRQ 73
61#define DMAE0_IRQ 78 /* DMA Error IRQ*/
62#define DMAE1_IRQ 74 /* DMA Error IRQ*/
63#define SH_DMAC_BASE0 0xFE008020
64#define SH_DMAC_BASE1 0xFDC08020
65#define SH_DMARS_BASE0 0xFE009000
66#define SH_DMARS_BASE1 0xFDC09000
67#define CHCR_TS_LOW_MASK 0x00000018
68#define CHCR_TS_LOW_SHIFT 3
69#define CHCR_TS_HIGH_MASK 0x00600000
70#define CHCR_TS_HIGH_SHIFT 21
33#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 71#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
34#define DMTE0_IRQ 34 72#define DMTE0_IRQ 34
35#define DMTE4_IRQ 44 73#define DMTE4_IRQ 44
@@ -41,7 +79,11 @@
41#define DMAE0_IRQ 38 /* DMA Error IRQ */ 79#define DMAE0_IRQ 38 /* DMA Error IRQ */
42#define SH_DMAC_BASE0 0xFC808020 80#define SH_DMAC_BASE0 0xFC808020
43#define SH_DMAC_BASE1 0xFC818020 81#define SH_DMAC_BASE1 0xFC818020
44#define SH_DMARS_BASE 0xFC809000 82#define SH_DMARS_BASE0 0xFC809000
83#define CHCR_TS_LOW_MASK 0x00000018
84#define CHCR_TS_LOW_SHIFT 3
85#define CHCR_TS_HIGH_MASK 0
86#define CHCR_TS_HIGH_SHIFT 0
45#else /* SH7785 */ 87#else /* SH7785 */
46#define DMTE0_IRQ 33 88#define DMTE0_IRQ 33
47#define DMTE4_IRQ 37 89#define DMTE4_IRQ 37
@@ -54,18 +96,17 @@
54#define DMAE1_IRQ 58 /* DMA Error IRQ1 */ 96#define DMAE1_IRQ 58 /* DMA Error IRQ1 */
55#define SH_DMAC_BASE0 0xFC808020 97#define SH_DMAC_BASE0 0xFC808020
56#define SH_DMAC_BASE1 0xFCC08020 98#define SH_DMAC_BASE1 0xFCC08020
57#define SH_DMARS_BASE 0xFC809000 99#define SH_DMARS_BASE0 0xFC809000
100#define CHCR_TS_LOW_MASK 0x00000018
101#define CHCR_TS_LOW_SHIFT 3
102#define CHCR_TS_HIGH_MASK 0
103#define CHCR_TS_HIGH_SHIFT 0
58#endif 104#endif
59 105
60#define REQ_HE 0x000000C0 106#define REQ_HE 0x000000C0
61#define REQ_H 0x00000080 107#define REQ_H 0x00000080
62#define REQ_LE 0x00000040 108#define REQ_LE 0x00000040
63#define TM_BURST 0x0000020 109#define TM_BURST 0x00000020
64#define TS_8 0x00000000
65#define TS_16 0x00000008
66#define TS_32 0x00000010
67#define TS_16BLK 0x00000018
68#define TS_32BLK 0x00100000
69 110
70/* 111/*
71 * The SuperH DMAC supports a number of transmit sizes, we list them here, 112 * The SuperH DMAC supports a number of transmit sizes, we list them here,
@@ -74,22 +115,31 @@
74 * Defaults to a 64-bit transfer size. 115 * Defaults to a 64-bit transfer size.
75 */ 116 */
76enum { 117enum {
77 XMIT_SZ_8BIT, 118 XMIT_SZ_8BIT = 0,
78 XMIT_SZ_16BIT, 119 XMIT_SZ_16BIT = 1,
79 XMIT_SZ_32BIT, 120 XMIT_SZ_32BIT = 2,
80 XMIT_SZ_128BIT, 121 XMIT_SZ_64BIT = 7,
81 XMIT_SZ_256BIT, 122 XMIT_SZ_128BIT = 3,
123 XMIT_SZ_256BIT = 4,
124 XMIT_SZ_128BIT_BLK = 0xb,
125 XMIT_SZ_256BIT_BLK = 0xc,
82}; 126};
83 127
84/* 128/*
85 * The DMA count is defined as the number of bytes to transfer. 129 * The DMA count is defined as the number of bytes to transfer.
86 */ 130 */
87static unsigned int ts_shift[] __maybe_unused = { 131#define TS_SHIFT { \
88 [XMIT_SZ_8BIT] = 0, 132 [XMIT_SZ_8BIT] = 0, \
89 [XMIT_SZ_16BIT] = 1, 133 [XMIT_SZ_16BIT] = 1, \
90 [XMIT_SZ_32BIT] = 2, 134 [XMIT_SZ_32BIT] = 2, \
91 [XMIT_SZ_128BIT] = 4, 135 [XMIT_SZ_64BIT] = 3, \
92 [XMIT_SZ_256BIT] = 5, 136 [XMIT_SZ_128BIT] = 4, \
93}; 137 [XMIT_SZ_256BIT] = 5, \
138 [XMIT_SZ_128BIT_BLK] = 4, \
139 [XMIT_SZ_256BIT_BLK] = 5, \
140}
141
142#define TS_INDEX2VAL(i) ((((i) & 3) << CHCR_TS_LOW_SHIFT) | \
143 ((((i) >> 2) & 3) << CHCR_TS_HIGH_SHIFT))
94 144
95#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ 145#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h
index bcb30246e85c..114a369705bc 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma.h
@@ -6,8 +6,6 @@
6#ifdef CONFIG_CPU_SH4A 6#ifdef CONFIG_CPU_SH4A
7 7
8#define DMAOR_INIT (DMAOR_DME) 8#define DMAOR_INIT (DMAOR_DME)
9#define CHCR_TS_MASK 0x18
10#define CHCR_TS_SHIFT 3
11 9
12#include <cpu/dma-sh4a.h> 10#include <cpu/dma-sh4a.h>
13#else /* CONFIG_CPU_SH4A */ 11#else /* CONFIG_CPU_SH4A */
@@ -29,8 +27,10 @@
29#define TS_32 0x00000030 27#define TS_32 0x00000030
30#define TS_64 0x00000000 28#define TS_64 0x00000000
31 29
32#define CHCR_TS_MASK 0x70 30#define CHCR_TS_LOW_MASK 0x70
33#define CHCR_TS_SHIFT 4 31#define CHCR_TS_LOW_SHIFT 4
32#define CHCR_TS_HIGH_MASK 0
33#define CHCR_TS_HIGH_SHIFT 0
34 34
35#define DMAOR_COD 0x00000008 35#define DMAOR_COD 0x00000008
36 36
@@ -41,23 +41,26 @@
41 * Defaults to a 64-bit transfer size. 41 * Defaults to a 64-bit transfer size.
42 */ 42 */
43enum { 43enum {
44 XMIT_SZ_64BIT, 44 XMIT_SZ_8BIT = 1,
45 XMIT_SZ_8BIT, 45 XMIT_SZ_16BIT = 2,
46 XMIT_SZ_16BIT, 46 XMIT_SZ_32BIT = 3,
47 XMIT_SZ_32BIT, 47 XMIT_SZ_64BIT = 0,
48 XMIT_SZ_256BIT, 48 XMIT_SZ_256BIT = 4,
49}; 49};
50 50
51/* 51/*
52 * The DMA count is defined as the number of bytes to transfer. 52 * The DMA count is defined as the number of bytes to transfer.
53 */ 53 */
54static unsigned int ts_shift[] __maybe_unused = { 54#define TS_SHIFT { \
55 [XMIT_SZ_64BIT] = 3, 55 [XMIT_SZ_8BIT] = 0, \
56 [XMIT_SZ_8BIT] = 0, 56 [XMIT_SZ_16BIT] = 1, \
57 [XMIT_SZ_16BIT] = 1, 57 [XMIT_SZ_32BIT] = 2, \
58 [XMIT_SZ_32BIT] = 2, 58 [XMIT_SZ_64BIT] = 3, \
59 [XMIT_SZ_256BIT] = 5, 59 [XMIT_SZ_256BIT] = 5, \
60}; 60}
61
62#define TS_INDEX2VAL(i) (((i) & 7) << CHCR_TS_LOW_SHIFT)
63
61#endif 64#endif
62 65
63#endif /* __ASM_CPU_SH4_DMA_H */ 66#endif /* __ASM_CPU_SH4_DMA_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
index 3ce7ef6c2978..03ea75c5315d 100644
--- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h
+++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
@@ -25,6 +25,10 @@
25 25
26#define MMUCR_TI (1<<2) 26#define MMUCR_TI (1<<2)
27 27
28#define MMUCR_URB 0x00FC0000
29#define MMUCR_URB_SHIFT 18
30#define MMUCR_URB_NENTRIES 64
31
28#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) 32#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
29#define MMUCR_SE (1 << 4) 33#define MMUCR_SE (1 << 4)
30#else 34#else
diff --git a/arch/sh/include/cpu-sh4/cpu/sq.h b/arch/sh/include/cpu-sh4/cpu/sq.h
index 586d6491816a..74716ba2dc3c 100644
--- a/arch/sh/include/cpu-sh4/cpu/sq.h
+++ b/arch/sh/include/cpu-sh4/cpu/sq.h
@@ -12,6 +12,7 @@
12#define __ASM_CPU_SH4_SQ_H 12#define __ASM_CPU_SH4_SQ_H
13 13
14#include <asm/addrspace.h> 14#include <asm/addrspace.h>
15#include <asm/page.h>
15 16
16/* 17/*
17 * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be 18 * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be
@@ -28,7 +29,7 @@
28 29
29/* arch/sh/kernel/cpu/sh4/sq.c */ 30/* arch/sh/kernel/cpu/sh4/sq.c */
30unsigned long sq_remap(unsigned long phys, unsigned int size, 31unsigned long sq_remap(unsigned long phys, unsigned int size,
31 const char *name, unsigned long flags); 32 const char *name, pgprot_t prot);
32void sq_unmap(unsigned long vaddr); 33void sq_unmap(unsigned long vaddr);
33void sq_flush_range(unsigned long start, unsigned int len); 34void sq_flush_range(unsigned long start, unsigned int len);
34 35
diff --git a/arch/sh/include/cpu-sh4/cpu/ubc.h b/arch/sh/include/cpu-sh4/cpu/ubc.h
deleted file mode 100644
index c86e17050935..000000000000
--- a/arch/sh/include/cpu-sh4/cpu/ubc.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * include/asm-sh/cpu-sh4/ubc.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 Paul Mundt
6 * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#ifndef __ASM_CPU_SH4_UBC_H
13#define __ASM_CPU_SH4_UBC_H
14
15#if defined(CONFIG_CPU_SH4A)
16#define UBC_CBR0 0xff200000
17#define UBC_CRR0 0xff200004
18#define UBC_CAR0 0xff200008
19#define UBC_CAMR0 0xff20000c
20#define UBC_CBR1 0xff200020
21#define UBC_CRR1 0xff200024
22#define UBC_CAR1 0xff200028
23#define UBC_CAMR1 0xff20002c
24#define UBC_CDR1 0xff200030
25#define UBC_CDMR1 0xff200034
26#define UBC_CETR1 0xff200038
27#define UBC_CCMFR 0xff200600
28#define UBC_CBCR 0xff200620
29
30/* CBR */
31#define UBC_CBR_AIE (0x01<<30)
32#define UBC_CBR_ID_INST (0x01<<4)
33#define UBC_CBR_RW_READ (0x01<<1)
34#define UBC_CBR_CE (0x01)
35
36#define UBC_CBR_AIV_MASK (0x00FF0000)
37#define UBC_CBR_AIV_SHIFT (16)
38#define UBC_CBR_AIV_SET(asid) (((asid)<<UBC_CBR_AIV_SHIFT) & UBC_CBR_AIV_MASK)
39
40#define UBC_CBR_INIT 0x20000000
41
42/* CRR */
43#define UBC_CRR_RES (0x01<<13)
44#define UBC_CRR_PCB (0x01<<1)
45#define UBC_CRR_BIE (0x01)
46
47#define UBC_CRR_INIT 0x00002000
48
49#else /* CONFIG_CPU_SH4 */
50#define UBC_BARA 0xff200000
51#define UBC_BAMRA 0xff200004
52#define UBC_BBRA 0xff200008
53#define UBC_BASRA 0xff000014
54#define UBC_BARB 0xff20000c
55#define UBC_BAMRB 0xff200010
56#define UBC_BBRB 0xff200014
57#define UBC_BASRB 0xff000018
58#define UBC_BDRB 0xff200018
59#define UBC_BDMRB 0xff20001c
60#define UBC_BRCR 0xff200020
61#endif /* CONFIG_CPU_SH4 */
62
63#endif /* __ASM_CPU_SH4_UBC_H */
64
diff --git a/arch/sh/include/mach-common/mach/magicpanelr2.h b/arch/sh/include/mach-common/mach/magicpanelr2.h
index c644a77ee357..183a2f744251 100644
--- a/arch/sh/include/mach-common/mach/magicpanelr2.h
+++ b/arch/sh/include/mach-common/mach/magicpanelr2.h
@@ -19,12 +19,12 @@
19#include <asm/io_generic.h> 19#include <asm/io_generic.h>
20 20
21 21
22#define SETBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) | mask, reg) 22#define SETBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) | mask, reg)
23#define SETBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) | mask, reg) 23#define SETBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) | mask, reg)
24#define SETBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) | mask, reg) 24#define SETBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) | mask, reg)
25#define CLRBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) & ~mask, reg) 25#define CLRBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) & ~mask, reg)
26#define CLRBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) & ~mask, reg) 26#define CLRBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) & ~mask, reg)
27#define CLRBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) & ~mask, reg) 27#define CLRBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) & ~mask, reg)
28 28
29 29
30#define PA_LED PORT_PADR /* LED */ 30#define PA_LED PORT_PADR /* LED */
diff --git a/arch/sh/include/mach-dreamcast/mach/sysasic.h b/arch/sh/include/mach-dreamcast/mach/sysasic.h
index f33426608a87..58f710e1ebc2 100644
--- a/arch/sh/include/mach-dreamcast/mach/sysasic.h
+++ b/arch/sh/include/mach-dreamcast/mach/sysasic.h
@@ -39,5 +39,10 @@
39 39
40#define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95) 40#define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95)
41 41
42/* arch/sh/boards/mach-dreamcast/irq.c */
43extern int systemasic_irq_demux(int);
44extern void systemasic_irq_init(void);
45extern void aica_time_init(void);
46
42#endif /* __ASM_SH_DREAMCAST_SYSASIC_H */ 47#endif /* __ASM_SH_DREAMCAST_SYSASIC_H */
43 48
diff --git a/arch/sh/include/mach-sdk7786/mach/fpga.h b/arch/sh/include/mach-sdk7786/mach/fpga.h
new file mode 100644
index 000000000000..2120d67dec70
--- /dev/null
+++ b/arch/sh/include/mach-sdk7786/mach/fpga.h
@@ -0,0 +1,114 @@
1#ifndef __MACH_SDK7786_FPGA_H
2#define __MACH_SDK7786_FPGA_H
3
4#include <linux/io.h>
5#include <linux/types.h>
6#include <linux/bitops.h>
7
8#define SRSTR 0x000
9#define SRSTR_MAGIC 0x1971 /* Fixed magical read value */
10
11#define INTASR 0x010
12#define INTAMR 0x020
13#define MODSWR 0x030
14#define INTTESTR 0x040
15#define SYSSR 0x050
16#define NRGPR 0x060
17#define NMISR 0x070
18
19#define NMIMR 0x080
20#define NMIMR_MAN_NMIM BIT(0) /* Manual NMI mask */
21#define NMIMR_AUX_NMIM BIT(1) /* Auxiliary NMI mask */
22
23#define INTBSR 0x090
24#define INTBMR 0x0a0
25#define USRLEDR 0x0b0
26#define MAPSWR 0x0c0
27#define FPGAVR 0x0d0
28#define FPGADR 0x0e0
29#define PCBRR 0x0f0
30#define RSR 0x100
31#define EXTASR 0x110
32#define SPCAR 0x120
33#define INTMSR 0x130
34#define PCIECR 0x140
35#define FAER 0x150
36#define USRGPIR 0x160
37/* 0x170 reserved */
38#define LCLASR 0x180
39
40#define SBCR 0x190
41#define SCBR_I2CMEN BIT(0) /* FPGA I2C master enable */
42#define SCBR_I2CCEN BIT(1) /* CPU I2C master enable */
43
44#define PWRCR 0x1a0
45#define SPCBR 0x1b0
46#define SPICR 0x1c0
47#define SPIDR 0x1d0
48#define I2CCR 0x1e0
49#define I2CDR 0x1f0
50#define FPGACR 0x200
51#define IASELR1 0x210
52#define IASELR2 0x220
53#define IASELR3 0x230
54#define IASELR4 0x240
55#define IASELR5 0x250
56#define IASELR6 0x260
57#define IASELR7 0x270
58#define IASELR8 0x280
59#define IASELR9 0x290
60#define IASELR10 0x2a0
61#define IASELR11 0x2b0
62#define IASELR12 0x2c0
63#define IASELR13 0x2d0
64#define IASELR14 0x2e0
65#define IASELR15 0x2f0
66/* 0x300 reserved */
67#define IBSELR1 0x310
68#define IBSELR2 0x320
69#define IBSELR3 0x330
70#define IBSELR4 0x340
71#define IBSELR5 0x350
72#define IBSELR6 0x360
73#define IBSELR7 0x370
74#define IBSELR8 0x380
75#define IBSELR9 0x390
76#define IBSELR10 0x3a0
77#define IBSELR11 0x3b0
78#define IBSELR12 0x3c0
79#define IBSELR13 0x3d0
80#define IBSELR14 0x3e0
81#define IBSELR15 0x3f0
82#define USRACR 0x400
83#define BEEPR 0x410
84#define USRLCDR 0x420
85#define SMBCR 0x430
86#define SMBDR 0x440
87#define USBCR 0x450
88#define AMSR 0x460
89#define ACCR 0x470
90#define SDIFCR 0x480
91
92/* arch/sh/boards/mach-sdk7786/fpga.c */
93extern void __iomem *sdk7786_fpga_base;
94extern void sdk7786_fpga_init(void);
95
96#define SDK7786_FPGA_REGADDR(reg) (sdk7786_fpga_base + (reg))
97
98/*
99 * A convenience wrapper from register offset to internal I2C address,
100 * when the FPGA is in I2C slave mode.
101 */
102#define SDK7786_FPGA_I2CADDR(reg) ((reg) >> 3)
103
104static inline u16 fpga_read_reg(unsigned int reg)
105{
106 return ioread16(sdk7786_fpga_base + reg);
107}
108
109static inline void fpga_write_reg(u16 val, unsigned int reg)
110{
111 iowrite16(val, sdk7786_fpga_base + reg);
112}
113
114#endif /* __MACH_SDK7786_FPGA_H */
diff --git a/arch/sh/include/mach-sdk7786/mach/irq.h b/arch/sh/include/mach-sdk7786/mach/irq.h
new file mode 100644
index 000000000000..0f584635e6e5
--- /dev/null
+++ b/arch/sh/include/mach-sdk7786/mach/irq.h
@@ -0,0 +1,7 @@
1#ifndef __MACH_SDK7786_IRQ_H
2#define __MACH_SDK7786_IRQ_H
3
4/* arch/sh/boards/mach-sdk7786/irq.c */
5extern void sdk7786_init_irq(void);
6
7#endif /* __MACH_SDK7786_IRQ_H */
diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h
index 749914b400fb..8d8170d6cc43 100644
--- a/arch/sh/include/mach-se/mach/se7343.h
+++ b/arch/sh/include/mach-se/mach/se7343.h
@@ -94,26 +94,26 @@
94 94
95#define PORT_DRVCR 0xA4050180 95#define PORT_DRVCR 0xA4050180
96 96
97#define PORT_PADR 0xA4050120 97#define PORT_PADR 0xA4050120
98#define PORT_PBDR 0xA4050122 98#define PORT_PBDR 0xA4050122
99#define PORT_PCDR 0xA4050124 99#define PORT_PCDR 0xA4050124
100#define PORT_PDDR 0xA4050126 100#define PORT_PDDR 0xA4050126
101#define PORT_PEDR 0xA4050128 101#define PORT_PEDR 0xA4050128
102#define PORT_PFDR 0xA405012A 102#define PORT_PFDR 0xA405012A
103#define PORT_PGDR 0xA405012C 103#define PORT_PGDR 0xA405012C
104#define PORT_PHDR 0xA405012E 104#define PORT_PHDR 0xA405012E
105#define PORT_PJDR 0xA4050130 105#define PORT_PJDR 0xA4050130
106#define PORT_PKDR 0xA4050132 106#define PORT_PKDR 0xA4050132
107#define PORT_PLDR 0xA4050134 107#define PORT_PLDR 0xA4050134
108#define PORT_PMDR 0xA4050136 108#define PORT_PMDR 0xA4050136
109#define PORT_PNDR 0xA4050138 109#define PORT_PNDR 0xA4050138
110#define PORT_PQDR 0xA405013A 110#define PORT_PQDR 0xA405013A
111#define PORT_PRDR 0xA405013C 111#define PORT_PRDR 0xA405013C
112#define PORT_PTDR 0xA4050160 112#define PORT_PTDR 0xA4050160
113#define PORT_PUDR 0xA4050162 113#define PORT_PUDR 0xA4050162
114#define PORT_PVDR 0xA4050164 114#define PORT_PVDR 0xA4050164
115#define PORT_PWDR 0xA4050166 115#define PORT_PWDR 0xA4050166
116#define PORT_PYDR 0xA4050168 116#define PORT_PYDR 0xA4050168
117 117
118#define FPGA_IN 0xb1400000 118#define FPGA_IN 0xb1400000
119#define FPGA_OUT 0xb1400002 119#define FPGA_OUT 0xb1400002
@@ -133,18 +133,10 @@
133#define SE7343_FPGA_IRQ_UARTB 11 133#define SE7343_FPGA_IRQ_UARTB 11
134 134
135#define SE7343_FPGA_IRQ_NR 12 135#define SE7343_FPGA_IRQ_NR 12
136#define SE7343_FPGA_IRQ_BASE 120
137
138#define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3)
139#define MRSHPC_IRQ2 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC2)
140#define MRSHPC_IRQ1 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC1)
141#define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0)
142#define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC)
143#define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB)
144#define UARTA_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTA)
145#define UARTB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTB)
146 136
147/* arch/sh/boards/se/7343/irq.c */ 137/* arch/sh/boards/se/7343/irq.c */
138extern unsigned int se7343_fpga_irq[];
139
148void init_7343se_IRQ(void); 140void init_7343se_IRQ(void);
149 141
150#endif /* __ASM_SH_HITACHI_SE7343_H */ 142#endif /* __ASM_SH_HITACHI_SE7343_H */
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index 0d587da1ef12..02fd3ae8b0ee 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -13,8 +13,9 @@ CFLAGS_REMOVE_return_address.o = -pg
13 13
14obj-y := debugtraps.o dma-nommu.o dumpstack.o \ 14obj-y := debugtraps.o dma-nommu.o dumpstack.o \
15 idle.o io.o io_generic.o irq.o \ 15 idle.o io.o io_generic.o irq.o \
16 irq_$(BITS).o machvec.o nmi_debug.o process_$(BITS).o \ 16 irq_$(BITS).o machvec.o nmi_debug.o process.o \
17 ptrace_$(BITS).o return_address.o \ 17 process_$(BITS).o ptrace_$(BITS).o \
18 reboot.o return_address.o \
18 setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \ 19 setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \
19 syscalls_$(BITS).o time.o topology.o traps.o \ 20 syscalls_$(BITS).o time.o topology.o traps.o \
20 traps_$(BITS).o unwinder.o 21 traps_$(BITS).o unwinder.o
@@ -22,7 +23,7 @@ obj-y := debugtraps.o dma-nommu.o dumpstack.o \
22obj-y += cpu/ 23obj-y += cpu/
23obj-$(CONFIG_VSYSCALL) += vsyscall/ 24obj-$(CONFIG_VSYSCALL) += vsyscall/
24obj-$(CONFIG_SMP) += smp.o 25obj-$(CONFIG_SMP) += smp.o
25obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o early_printk.o 26obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
26obj-$(CONFIG_KGDB) += kgdb.o 27obj-$(CONFIG_KGDB) += kgdb.o
27obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o 28obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
28obj-$(CONFIG_MODULES) += sh_ksyms_$(BITS).o module.o 29obj-$(CONFIG_MODULES) += sh_ksyms_$(BITS).o module.o
@@ -39,6 +40,7 @@ obj-$(CONFIG_HIBERNATION) += swsusp.o
39obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o 40obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
40obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o 41obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
41 42
43obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
42obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o 44obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o
43 45
44EXTRA_CFLAGS += -Werror 46EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index d97c803719ec..0e48bc61c272 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -17,5 +17,7 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
17 17
18obj-$(CONFIG_SH_ADC) += adc.o 18obj-$(CONFIG_SH_ADC) += adc.o
19obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o 19obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o
20obj-$(CONFIG_SH_FPU) += fpu.o
21obj-$(CONFIG_SH_FPU_EMU) += fpu.o
20 22
21obj-y += irq/ init.o clock.o hwblk.o 23obj-y += irq/ init.o clock.o hwblk.o
diff --git a/arch/sh/kernel/cpu/adc.c b/arch/sh/kernel/cpu/adc.c
index da3d6877f93d..d307571d54b6 100644
--- a/arch/sh/kernel/cpu/adc.c
+++ b/arch/sh/kernel/cpu/adc.c
@@ -18,19 +18,19 @@ int adc_single(unsigned int channel)
18 18
19 off = (channel & 0x03) << 2; 19 off = (channel & 0x03) << 2;
20 20
21 csr = ctrl_inb(ADCSR); 21 csr = __raw_readb(ADCSR);
22 csr = channel | ADCSR_ADST | ADCSR_CKS; 22 csr = channel | ADCSR_ADST | ADCSR_CKS;
23 ctrl_outb(csr, ADCSR); 23 __raw_writeb(csr, ADCSR);
24 24
25 do { 25 do {
26 csr = ctrl_inb(ADCSR); 26 csr = __raw_readb(ADCSR);
27 } while ((csr & ADCSR_ADF) == 0); 27 } while ((csr & ADCSR_ADF) == 0);
28 28
29 csr &= ~(ADCSR_ADF | ADCSR_ADST); 29 csr &= ~(ADCSR_ADF | ADCSR_ADST);
30 ctrl_outb(csr, ADCSR); 30 __raw_writeb(csr, ADCSR);
31 31
32 return (((ctrl_inb(ADDRAH + off) << 8) | 32 return (((__raw_readb(ADDRAH + off) << 8) |
33 ctrl_inb(ADDRAL + off)) >> 6); 33 __raw_readb(ADDRAL + off)) >> 6);
34} 34}
35 35
36EXPORT_SYMBOL(adc_single); 36EXPORT_SYMBOL(adc_single);
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index 6dfe2cced3fc..eed5eaff96ba 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -149,7 +149,8 @@ int __init sh_clk_div6_register(struct clk *clks, int nr)
149 149
150static unsigned long sh_clk_div4_recalc(struct clk *clk) 150static unsigned long sh_clk_div4_recalc(struct clk *clk)
151{ 151{
152 struct clk_div_mult_table *table = clk->priv; 152 struct clk_div4_table *d4t = clk->priv;
153 struct clk_div_mult_table *table = d4t->div_mult_table;
153 unsigned int idx; 154 unsigned int idx;
154 155
155 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors, 156 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
@@ -160,17 +161,90 @@ static unsigned long sh_clk_div4_recalc(struct clk *clk)
160 return clk->freq_table[idx].frequency; 161 return clk->freq_table[idx].frequency;
161} 162}
162 163
164static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent)
165{
166 struct clk_div4_table *d4t = clk->priv;
167 struct clk_div_mult_table *table = d4t->div_mult_table;
168 u32 value;
169 int ret;
170
171 if (!strcmp("pll_clk", parent->name))
172 value = __raw_readl(clk->enable_reg) & ~(1 << 7);
173 else
174 value = __raw_readl(clk->enable_reg) | (1 << 7);
175
176 ret = clk_reparent(clk, parent);
177 if (ret < 0)
178 return ret;
179
180 __raw_writel(value, clk->enable_reg);
181
182 /* Rebiuld the frequency table */
183 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
184 table, &clk->arch_flags);
185
186 return 0;
187}
188
189static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate, int algo_id)
190{
191 struct clk_div4_table *d4t = clk->priv;
192 unsigned long value;
193 int idx = clk_rate_table_find(clk, clk->freq_table, rate);
194 if (idx < 0)
195 return idx;
196
197 value = __raw_readl(clk->enable_reg);
198 value &= ~(0xf << clk->enable_bit);
199 value |= (idx << clk->enable_bit);
200 __raw_writel(value, clk->enable_reg);
201
202 if (d4t->kick)
203 d4t->kick(clk);
204
205 return 0;
206}
207
208static int sh_clk_div4_enable(struct clk *clk)
209{
210 __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << 8), clk->enable_reg);
211 return 0;
212}
213
214static void sh_clk_div4_disable(struct clk *clk)
215{
216 __raw_writel(__raw_readl(clk->enable_reg) | (1 << 8), clk->enable_reg);
217}
218
163static struct clk_ops sh_clk_div4_clk_ops = { 219static struct clk_ops sh_clk_div4_clk_ops = {
164 .recalc = sh_clk_div4_recalc, 220 .recalc = sh_clk_div4_recalc,
221 .set_rate = sh_clk_div4_set_rate,
165 .round_rate = sh_clk_div_round_rate, 222 .round_rate = sh_clk_div_round_rate,
166}; 223};
167 224
168int __init sh_clk_div4_register(struct clk *clks, int nr, 225static struct clk_ops sh_clk_div4_enable_clk_ops = {
169 struct clk_div_mult_table *table) 226 .recalc = sh_clk_div4_recalc,
227 .set_rate = sh_clk_div4_set_rate,
228 .round_rate = sh_clk_div_round_rate,
229 .enable = sh_clk_div4_enable,
230 .disable = sh_clk_div4_disable,
231};
232
233static struct clk_ops sh_clk_div4_reparent_clk_ops = {
234 .recalc = sh_clk_div4_recalc,
235 .set_rate = sh_clk_div4_set_rate,
236 .round_rate = sh_clk_div_round_rate,
237 .enable = sh_clk_div4_enable,
238 .disable = sh_clk_div4_disable,
239 .set_parent = sh_clk_div4_set_parent,
240};
241
242static int __init sh_clk_div4_register_ops(struct clk *clks, int nr,
243 struct clk_div4_table *table, struct clk_ops *ops)
170{ 244{
171 struct clk *clkp; 245 struct clk *clkp;
172 void *freq_table; 246 void *freq_table;
173 int nr_divs = table->nr_divisors; 247 int nr_divs = table->div_mult_table->nr_divisors;
174 int freq_table_size = sizeof(struct cpufreq_frequency_table); 248 int freq_table_size = sizeof(struct cpufreq_frequency_table);
175 int ret = 0; 249 int ret = 0;
176 int k; 250 int k;
@@ -185,7 +259,7 @@ int __init sh_clk_div4_register(struct clk *clks, int nr,
185 for (k = 0; !ret && (k < nr); k++) { 259 for (k = 0; !ret && (k < nr); k++) {
186 clkp = clks + k; 260 clkp = clks + k;
187 261
188 clkp->ops = &sh_clk_div4_clk_ops; 262 clkp->ops = ops;
189 clkp->id = -1; 263 clkp->id = -1;
190 clkp->priv = table; 264 clkp->priv = table;
191 265
@@ -198,6 +272,26 @@ int __init sh_clk_div4_register(struct clk *clks, int nr,
198 return ret; 272 return ret;
199} 273}
200 274
275int __init sh_clk_div4_register(struct clk *clks, int nr,
276 struct clk_div4_table *table)
277{
278 return sh_clk_div4_register_ops(clks, nr, table, &sh_clk_div4_clk_ops);
279}
280
281int __init sh_clk_div4_enable_register(struct clk *clks, int nr,
282 struct clk_div4_table *table)
283{
284 return sh_clk_div4_register_ops(clks, nr, table,
285 &sh_clk_div4_enable_clk_ops);
286}
287
288int __init sh_clk_div4_reparent_register(struct clk *clks, int nr,
289 struct clk_div4_table *table)
290{
291 return sh_clk_div4_register_ops(clks, nr, table,
292 &sh_clk_div4_reparent_clk_ops);
293}
294
201#ifdef CONFIG_SH_CLK_CPG_LEGACY 295#ifdef CONFIG_SH_CLK_CPG_LEGACY
202static struct clk master_clk = { 296static struct clk master_clk = {
203 .name = "master_clk", 297 .name = "master_clk",
diff --git a/arch/sh/kernel/cpu/fpu.c b/arch/sh/kernel/cpu/fpu.c
new file mode 100644
index 000000000000..f059ed62cf57
--- /dev/null
+++ b/arch/sh/kernel/cpu/fpu.c
@@ -0,0 +1,84 @@
1#include <linux/sched.h>
2#include <asm/processor.h>
3#include <asm/fpu.h>
4
5int init_fpu(struct task_struct *tsk)
6{
7 if (tsk_used_math(tsk)) {
8 if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current)
9 unlazy_fpu(tsk, task_pt_regs(tsk));
10 return 0;
11 }
12
13 /*
14 * Memory allocation at the first usage of the FPU and other state.
15 */
16 if (!tsk->thread.xstate) {
17 tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
18 GFP_KERNEL);
19 if (!tsk->thread.xstate)
20 return -ENOMEM;
21 }
22
23 if (boot_cpu_data.flags & CPU_HAS_FPU) {
24 struct sh_fpu_hard_struct *fp = &tsk->thread.xstate->hardfpu;
25 memset(fp, 0, xstate_size);
26 fp->fpscr = FPSCR_INIT;
27 } else {
28 struct sh_fpu_soft_struct *fp = &tsk->thread.xstate->softfpu;
29 memset(fp, 0, xstate_size);
30 fp->fpscr = FPSCR_INIT;
31 }
32
33 set_stopped_child_used_math(tsk);
34 return 0;
35}
36
37#ifdef CONFIG_SH_FPU
38void __fpu_state_restore(void)
39{
40 struct task_struct *tsk = current;
41
42 restore_fpu(tsk);
43
44 task_thread_info(tsk)->status |= TS_USEDFPU;
45 tsk->fpu_counter++;
46}
47
48void fpu_state_restore(struct pt_regs *regs)
49{
50 struct task_struct *tsk = current;
51
52 if (unlikely(!user_mode(regs))) {
53 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
54 BUG();
55 return;
56 }
57
58 if (!tsk_used_math(tsk)) {
59 local_irq_enable();
60 /*
61 * does a slab alloc which can sleep
62 */
63 if (init_fpu(tsk)) {
64 /*
65 * ran out of memory!
66 */
67 do_group_exit(SIGKILL);
68 return;
69 }
70 local_irq_disable();
71 }
72
73 grab_fpu(regs);
74
75 __fpu_state_restore();
76}
77
78BUILD_TRAP_HANDLER(fpu_state_restore)
79{
80 TRAP_HANDLER_DECL;
81
82 fpu_state_restore(regs);
83}
84#endif /* CONFIG_SH_FPU */
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 89b4b76c0d76..c736422344eb 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -24,22 +24,32 @@
24#include <asm/elf.h> 24#include <asm/elf.h>
25#include <asm/io.h> 25#include <asm/io.h>
26#include <asm/smp.h> 26#include <asm/smp.h>
27#ifdef CONFIG_SUPERH32 27#include <asm/sh_bios.h>
28#include <asm/ubc.h> 28
29#ifdef CONFIG_SH_FPU
30#define cpu_has_fpu 1
31#else
32#define cpu_has_fpu 0
33#endif
34
35#ifdef CONFIG_SH_DSP
36#define cpu_has_dsp 1
37#else
38#define cpu_has_dsp 0
29#endif 39#endif
30 40
31/* 41/*
32 * Generic wrapper for command line arguments to disable on-chip 42 * Generic wrapper for command line arguments to disable on-chip
33 * peripherals (nofpu, nodsp, and so forth). 43 * peripherals (nofpu, nodsp, and so forth).
34 */ 44 */
35#define onchip_setup(x) \ 45#define onchip_setup(x) \
36static int x##_disabled __initdata = 0; \ 46static int x##_disabled __initdata = !cpu_has_##x; \
37 \ 47 \
38static int __init x##_setup(char *opts) \ 48static int __init x##_setup(char *opts) \
39{ \ 49{ \
40 x##_disabled = 1; \ 50 x##_disabled = 1; \
41 return 1; \ 51 return 1; \
42} \ 52} \
43__setup("no" __stringify(x), x##_setup); 53__setup("no" __stringify(x), x##_setup);
44 54
45onchip_setup(fpu); 55onchip_setup(fpu);
@@ -52,10 +62,10 @@ onchip_setup(dsp);
52static void __init speculative_execution_init(void) 62static void __init speculative_execution_init(void)
53{ 63{
54 /* Clear RABD */ 64 /* Clear RABD */
55 ctrl_outl(ctrl_inl(CPUOPM) & ~CPUOPM_RABD, CPUOPM); 65 __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
56 66
57 /* Flush the update */ 67 /* Flush the update */
58 (void)ctrl_inl(CPUOPM); 68 (void)__raw_readl(CPUOPM);
59 ctrl_barrier(); 69 ctrl_barrier();
60} 70}
61#else 71#else
@@ -89,7 +99,7 @@ static void __init expmask_init(void)
89#endif 99#endif
90 100
91/* 2nd-level cache init */ 101/* 2nd-level cache init */
92void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void) 102void __attribute__ ((weak)) l2_cache_init(void)
93{ 103{
94} 104}
95 105
@@ -97,12 +107,12 @@ void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void)
97 * Generic first-level cache init 107 * Generic first-level cache init
98 */ 108 */
99#ifdef CONFIG_SUPERH32 109#ifdef CONFIG_SUPERH32
100static void __uses_jump_to_uncached cache_init(void) 110static void cache_init(void)
101{ 111{
102 unsigned long ccr, flags; 112 unsigned long ccr, flags;
103 113
104 jump_to_uncached(); 114 jump_to_uncached();
105 ccr = ctrl_inl(CCR); 115 ccr = __raw_readl(CCR);
106 116
107 /* 117 /*
108 * At this point we don't know whether the cache is enabled or not - a 118 * At this point we don't know whether the cache is enabled or not - a
@@ -146,7 +156,7 @@ static void __uses_jump_to_uncached cache_init(void)
146 for (addr = addrstart; 156 for (addr = addrstart;
147 addr < addrstart + waysize; 157 addr < addrstart + waysize;
148 addr += current_cpu_data.dcache.linesz) 158 addr += current_cpu_data.dcache.linesz)
149 ctrl_outl(0, addr); 159 __raw_writel(0, addr);
150 160
151 addrstart += current_cpu_data.dcache.way_incr; 161 addrstart += current_cpu_data.dcache.way_incr;
152 } while (--ways); 162 } while (--ways);
@@ -179,7 +189,7 @@ static void __uses_jump_to_uncached cache_init(void)
179 189
180 l2_cache_init(); 190 l2_cache_init();
181 191
182 ctrl_outl(flags, CCR); 192 __raw_writel(flags, CCR);
183 back_to_cached(); 193 back_to_cached();
184} 194}
185#else 195#else
@@ -207,6 +217,18 @@ static void detect_cache_shape(void)
207 l2_cache_shape = -1; /* No S-cache */ 217 l2_cache_shape = -1; /* No S-cache */
208} 218}
209 219
220static void __init fpu_init(void)
221{
222 /* Disable the FPU */
223 if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) {
224 printk("FPU Disabled\n");
225 current_cpu_data.flags &= ~CPU_HAS_FPU;
226 }
227
228 disable_fpu();
229 clear_used_math();
230}
231
210#ifdef CONFIG_SH_DSP 232#ifdef CONFIG_SH_DSP
211static void __init release_dsp(void) 233static void __init release_dsp(void)
212{ 234{
@@ -244,28 +266,35 @@ static void __init dsp_init(void)
244 if (sr & SR_DSP) 266 if (sr & SR_DSP)
245 current_cpu_data.flags |= CPU_HAS_DSP; 267 current_cpu_data.flags |= CPU_HAS_DSP;
246 268
269 /* Disable the DSP */
270 if (dsp_disabled && (current_cpu_data.flags & CPU_HAS_DSP)) {
271 printk("DSP Disabled\n");
272 current_cpu_data.flags &= ~CPU_HAS_DSP;
273 }
274
247 /* Now that we've determined the DSP status, clear the DSP bit. */ 275 /* Now that we've determined the DSP status, clear the DSP bit. */
248 release_dsp(); 276 release_dsp();
249} 277}
278#else
279static inline void __init dsp_init(void) { }
250#endif /* CONFIG_SH_DSP */ 280#endif /* CONFIG_SH_DSP */
251 281
252/** 282/**
253 * sh_cpu_init 283 * sh_cpu_init
254 * 284 *
255 * This is our initial entry point for each CPU, and is invoked on the boot 285 * This is our initial entry point for each CPU, and is invoked on the
256 * CPU prior to calling start_kernel(). For SMP, a combination of this and 286 * boot CPU prior to calling start_kernel(). For SMP, a combination of
257 * start_secondary() will bring up each processor to a ready state prior 287 * this and start_secondary() will bring up each processor to a ready
258 * to hand forking the idle loop. 288 * state prior to hand forking the idle loop.
259 * 289 *
260 * We do all of the basic processor init here, including setting up the 290 * We do all of the basic processor init here, including setting up
261 * caches, FPU, DSP, kicking the UBC, etc. By the time start_kernel() is 291 * the caches, FPU, DSP, etc. By the time start_kernel() is hit (and
262 * hit (and subsequently platform_setup()) things like determining the 292 * subsequently platform_setup()) things like determining the CPU
263 * CPU subtype and initial configuration will all be done. 293 * subtype and initial configuration will all be done.
264 * 294 *
265 * Each processor family is still responsible for doing its own probing 295 * Each processor family is still responsible for doing its own probing
266 * and cache configuration in detect_cpu_and_cache_system(). 296 * and cache configuration in detect_cpu_and_cache_system().
267 */ 297 */
268
269asmlinkage void __init sh_cpu_init(void) 298asmlinkage void __init sh_cpu_init(void)
270{ 299{
271 current_thread_info()->cpu = hard_smp_processor_id(); 300 current_thread_info()->cpu = hard_smp_processor_id();
@@ -302,18 +331,8 @@ asmlinkage void __init sh_cpu_init(void)
302 detect_cache_shape(); 331 detect_cache_shape();
303 } 332 }
304 333
305 /* Disable the FPU */ 334 fpu_init();
306 if (fpu_disabled) { 335 dsp_init();
307 printk("FPU Disabled\n");
308 current_cpu_data.flags &= ~CPU_HAS_FPU;
309 }
310
311 /* FPU initialization */
312 disable_fpu();
313 if ((current_cpu_data.flags & CPU_HAS_FPU)) {
314 current_thread_info()->status &= ~TS_USEDFPU;
315 clear_used_math();
316 }
317 336
318 /* 337 /*
319 * Initialize the per-CPU ASID cache very early, since the 338 * Initialize the per-CPU ASID cache very early, since the
@@ -321,18 +340,24 @@ asmlinkage void __init sh_cpu_init(void)
321 */ 340 */
322 current_cpu_data.asid_cache = NO_CONTEXT; 341 current_cpu_data.asid_cache = NO_CONTEXT;
323 342
324#ifdef CONFIG_SH_DSP
325 /* Probe for DSP */
326 dsp_init();
327
328 /* Disable the DSP */
329 if (dsp_disabled) {
330 printk("DSP Disabled\n");
331 current_cpu_data.flags &= ~CPU_HAS_DSP;
332 release_dsp();
333 }
334#endif
335
336 speculative_execution_init(); 343 speculative_execution_init();
337 expmask_init(); 344 expmask_init();
345
346 /* Do the rest of the boot processor setup */
347 if (raw_smp_processor_id() == 0) {
348 /* Save off the BIOS VBR, if there is one */
349 sh_bios_vbr_init();
350
351 /*
352 * Setup VBR for boot CPU. Secondary CPUs do this through
353 * start_secondary().
354 */
355 per_cpu_trap_init();
356
357 /*
358 * Boot processor to setup the FP and extended state
359 * context info.
360 */
361 init_thread_xstate();
362 }
338} 363}
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index 06e7e2959b54..96a239583948 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -123,7 +123,7 @@ static void enable_intc_irq(unsigned int irq)
123 bitmask = 1 << (irq - 32); 123 bitmask = 1 << (irq - 32);
124 } 124 }
125 125
126 ctrl_outl(bitmask, reg); 126 __raw_writel(bitmask, reg);
127} 127}
128 128
129static void disable_intc_irq(unsigned int irq) 129static void disable_intc_irq(unsigned int irq)
@@ -139,7 +139,7 @@ static void disable_intc_irq(unsigned int irq)
139 bitmask = 1 << (irq - 32); 139 bitmask = 1 << (irq - 32);
140 } 140 }
141 141
142 ctrl_outl(bitmask, reg); 142 __raw_writel(bitmask, reg);
143} 143}
144 144
145static void mask_and_ack_intc(unsigned int irq) 145static void mask_and_ack_intc(unsigned int irq)
@@ -170,11 +170,11 @@ void __init plat_irq_setup(void)
170 170
171 171
172 /* Disable all interrupts and set all priorities to 0 to avoid trouble */ 172 /* Disable all interrupts and set all priorities to 0 to avoid trouble */
173 ctrl_outl(-1, INTC_INTDSB_0); 173 __raw_writel(-1, INTC_INTDSB_0);
174 ctrl_outl(-1, INTC_INTDSB_1); 174 __raw_writel(-1, INTC_INTDSB_1);
175 175
176 for (reg = INTC_INTPRI_0, i = 0; i < INTC_INTPRI_PREGS; i++, reg += 8) 176 for (reg = INTC_INTPRI_0, i = 0; i < INTC_INTPRI_PREGS; i++, reg += 8)
177 ctrl_outl( NO_PRIORITY, reg); 177 __raw_writel( NO_PRIORITY, reg);
178 178
179 179
180#ifdef CONFIG_SH_CAYMAN 180#ifdef CONFIG_SH_CAYMAN
@@ -199,7 +199,7 @@ void __init plat_irq_setup(void)
199 reg = INTC_ICR_SET; 199 reg = INTC_ICR_SET;
200 i = IRQ_IRL0; 200 i = IRQ_IRL0;
201 } 201 }
202 ctrl_outl(INTC_ICR_IRLM, reg); 202 __raw_writel(INTC_ICR_IRLM, reg);
203 203
204 /* Set interrupt priorities according to platform description */ 204 /* Set interrupt priorities according to platform description */
205 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) { 205 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
@@ -207,7 +207,7 @@ void __init plat_irq_setup(void)
207 ((i % INTC_INTPRI_PPREG) * 4); 207 ((i % INTC_INTPRI_PPREG) * 4);
208 if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) { 208 if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
209 /* Upon the 7th, set Priority Register */ 209 /* Upon the 7th, set Priority Register */
210 ctrl_outl(data, reg); 210 __raw_writel(data, reg);
211 data = 0; 211 data = 0;
212 reg += 8; 212 reg += 8;
213 } 213 }
diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
index 4fe863170e31..0c9f24d7a02f 100644
--- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
@@ -31,7 +31,7 @@ static const int pfc_divisors[] = {1,2,0,4};
31 31
32static void master_clk_init(struct clk *clk) 32static void master_clk_init(struct clk *clk)
33{ 33{
34 clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 7]; 34 clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
35} 35}
36 36
37static struct clk_ops sh7619_master_clk_ops = { 37static struct clk_ops sh7619_master_clk_ops = {
@@ -40,7 +40,7 @@ static struct clk_ops sh7619_master_clk_ops = {
40 40
41static unsigned long module_clk_recalc(struct clk *clk) 41static unsigned long module_clk_recalc(struct clk *clk)
42{ 42{
43 int idx = (ctrl_inw(FREQCR) & 0x0007); 43 int idx = (__raw_readw(FREQCR) & 0x0007);
44 return clk->parent->rate / pfc_divisors[idx]; 44 return clk->parent->rate / pfc_divisors[idx];
45} 45}
46 46
@@ -50,7 +50,7 @@ static struct clk_ops sh7619_module_clk_ops = {
50 50
51static unsigned long bus_clk_recalc(struct clk *clk) 51static unsigned long bus_clk_recalc(struct clk *clk)
52{ 52{
53 return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 7]; 53 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
54} 54}
55 55
56static struct clk_ops sh7619_bus_clk_ops = { 56static struct clk_ops sh7619_bus_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index 7814c76159a7..b26264dc2aef 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
34 34
35static void master_clk_init(struct clk *clk) 35static void master_clk_init(struct clk *clk)
36{ 36{
37 return 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 37 return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
38} 38}
39 39
40static struct clk_ops sh7201_master_clk_ops = { 40static struct clk_ops sh7201_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7201_master_clk_ops = {
43 43
44static unsigned long module_clk_recalc(struct clk *clk) 44static unsigned long module_clk_recalc(struct clk *clk)
45{ 45{
46 int idx = (ctrl_inw(FREQCR) & 0x0007); 46 int idx = (__raw_readw(FREQCR) & 0x0007);
47 return clk->parent->rate / pfc_divisors[idx]; 47 return clk->parent->rate / pfc_divisors[idx];
48} 48}
49 49
@@ -53,7 +53,7 @@ static struct clk_ops sh7201_module_clk_ops = {
53 53
54static unsigned long bus_clk_recalc(struct clk *clk) 54static unsigned long bus_clk_recalc(struct clk *clk)
55{ 55{
56 int idx = (ctrl_inw(FREQCR) & 0x0007); 56 int idx = (__raw_readw(FREQCR) & 0x0007);
57 return clk->parent->rate / pfc_divisors[idx]; 57 return clk->parent->rate / pfc_divisors[idx];
58} 58}
59 59
@@ -63,7 +63,7 @@ static struct clk_ops sh7201_bus_clk_ops = {
63 63
64static unsigned long cpu_clk_recalc(struct clk *clk) 64static unsigned long cpu_clk_recalc(struct clk *clk)
65{ 65{
66 int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007); 66 int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007);
67 return clk->parent->rate / ifc_divisors[idx]; 67 return clk->parent->rate / ifc_divisors[idx];
68} 68}
69 69
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
index 940986965102..7e75d8f79502 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -39,7 +39,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
39 39
40static void master_clk_init(struct clk *clk) 40static void master_clk_init(struct clk *clk)
41{ 41{
42 clk->rate *= pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0003] * PLL2 ; 42 clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ;
43} 43}
44 44
45static struct clk_ops sh7203_master_clk_ops = { 45static struct clk_ops sh7203_master_clk_ops = {
@@ -48,7 +48,7 @@ static struct clk_ops sh7203_master_clk_ops = {
48 48
49static unsigned long module_clk_recalc(struct clk *clk) 49static unsigned long module_clk_recalc(struct clk *clk)
50{ 50{
51 int idx = (ctrl_inw(FREQCR) & 0x0007); 51 int idx = (__raw_readw(FREQCR) & 0x0007);
52 return clk->parent->rate / pfc_divisors[idx]; 52 return clk->parent->rate / pfc_divisors[idx];
53} 53}
54 54
@@ -58,7 +58,7 @@ static struct clk_ops sh7203_module_clk_ops = {
58 58
59static unsigned long bus_clk_recalc(struct clk *clk) 59static unsigned long bus_clk_recalc(struct clk *clk)
60{ 60{
61 int idx = (ctrl_inw(FREQCR) & 0x0007); 61 int idx = (__raw_readw(FREQCR) & 0x0007);
62 return clk->parent->rate / pfc_divisors[idx-2]; 62 return clk->parent->rate / pfc_divisors[idx-2];
63} 63}
64 64
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
index c2268bdeceeb..b27a5e2687ab 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
34 34
35static void master_clk_init(struct clk *clk) 35static void master_clk_init(struct clk *clk)
36{ 36{
37 clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 37 clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
38} 38}
39 39
40static struct clk_ops sh7206_master_clk_ops = { 40static struct clk_ops sh7206_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7206_master_clk_ops = {
43 43
44static unsigned long module_clk_recalc(struct clk *clk) 44static unsigned long module_clk_recalc(struct clk *clk)
45{ 45{
46 int idx = (ctrl_inw(FREQCR) & 0x0007); 46 int idx = (__raw_readw(FREQCR) & 0x0007);
47 return clk->parent->rate / pfc_divisors[idx]; 47 return clk->parent->rate / pfc_divisors[idx];
48} 48}
49 49
@@ -53,7 +53,7 @@ static struct clk_ops sh7206_module_clk_ops = {
53 53
54static unsigned long bus_clk_recalc(struct clk *clk) 54static unsigned long bus_clk_recalc(struct clk *clk)
55{ 55{
56 return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 56 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
57} 57}
58 58
59static struct clk_ops sh7206_bus_clk_ops = { 59static struct clk_ops sh7206_bus_clk_ops = {
@@ -62,7 +62,7 @@ static struct clk_ops sh7206_bus_clk_ops = {
62 62
63static unsigned long cpu_clk_recalc(struct clk *clk) 63static unsigned long cpu_clk_recalc(struct clk *clk)
64{ 64{
65 int idx = (ctrl_inw(FREQCR) & 0x0007); 65 int idx = (__raw_readw(FREQCR) & 0x0007);
66 return clk->parent->rate / ifc_divisors[idx]; 66 return clk->parent->rate / ifc_divisors[idx];
67} 67}
68 68
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index d395ce5740e7..488d24e0cdf0 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -26,8 +26,7 @@
26/* 26/*
27 * Save FPU registers onto task structure. 27 * Save FPU registers onto task structure.
28 */ 28 */
29void 29void save_fpu(struct task_struct *tsk)
30save_fpu(struct task_struct *tsk)
31{ 30{
32 unsigned long dummy; 31 unsigned long dummy;
33 32
@@ -52,7 +51,7 @@ save_fpu(struct task_struct *tsk)
52 "fmov.s fr0, @-%0\n\t" 51 "fmov.s fr0, @-%0\n\t"
53 "lds %3, fpscr\n\t" 52 "lds %3, fpscr\n\t"
54 : "=r" (dummy) 53 : "=r" (dummy)
55 : "0" ((char *)(&tsk->thread.fpu.hard.status)), 54 : "0" ((char *)(&tsk->thread.xstate->hardfpu.status)),
56 "r" (FPSCR_RCHG), 55 "r" (FPSCR_RCHG),
57 "r" (FPSCR_INIT) 56 "r" (FPSCR_INIT)
58 : "memory"); 57 : "memory");
@@ -60,8 +59,7 @@ save_fpu(struct task_struct *tsk)
60 disable_fpu(); 59 disable_fpu();
61} 60}
62 61
63static void 62void restore_fpu(struct task_struct *tsk)
64restore_fpu(struct task_struct *tsk)
65{ 63{
66 unsigned long dummy; 64 unsigned long dummy;
67 65
@@ -85,45 +83,12 @@ restore_fpu(struct task_struct *tsk)
85 "lds.l @%0+, fpscr\n\t" 83 "lds.l @%0+, fpscr\n\t"
86 "lds.l @%0+, fpul\n\t" 84 "lds.l @%0+, fpul\n\t"
87 : "=r" (dummy) 85 : "=r" (dummy)
88 : "0" (&tsk->thread.fpu), "r" (FPSCR_RCHG) 86 : "0" (tsk->thread.xstate), "r" (FPSCR_RCHG)
89 : "memory"); 87 : "memory");
90 disable_fpu(); 88 disable_fpu();
91} 89}
92 90
93/* 91/*
94 * Load the FPU with signalling NANS. This bit pattern we're using
95 * has the property that no matter wether considered as single or as
96 * double precission represents signaling NANS.
97 */
98
99static void
100fpu_init(void)
101{
102 enable_fpu();
103 asm volatile("lds %0, fpul\n\t"
104 "fsts fpul, fr0\n\t"
105 "fsts fpul, fr1\n\t"
106 "fsts fpul, fr2\n\t"
107 "fsts fpul, fr3\n\t"
108 "fsts fpul, fr4\n\t"
109 "fsts fpul, fr5\n\t"
110 "fsts fpul, fr6\n\t"
111 "fsts fpul, fr7\n\t"
112 "fsts fpul, fr8\n\t"
113 "fsts fpul, fr9\n\t"
114 "fsts fpul, fr10\n\t"
115 "fsts fpul, fr11\n\t"
116 "fsts fpul, fr12\n\t"
117 "fsts fpul, fr13\n\t"
118 "fsts fpul, fr14\n\t"
119 "fsts fpul, fr15\n\t"
120 "lds %2, fpscr\n\t"
121 : /* no output */
122 : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT));
123 disable_fpu();
124}
125
126/*
127 * Emulate arithmetic ops on denormalized number for some FPU insns. 92 * Emulate arithmetic ops on denormalized number for some FPU insns.
128 */ 93 */
129 94
@@ -490,9 +455,9 @@ ieee_fpe_handler (struct pt_regs *regs)
490 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ 455 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
491 struct task_struct *tsk = current; 456 struct task_struct *tsk = current;
492 457
493 if ((tsk->thread.fpu.hard.fpscr & FPSCR_FPU_ERROR)) { 458 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_FPU_ERROR)) {
494 /* FPU error */ 459 /* FPU error */
495 denormal_to_double (&tsk->thread.fpu.hard, 460 denormal_to_double (&tsk->thread.xstate->hardfpu,
496 (finsn >> 8) & 0xf); 461 (finsn >> 8) & 0xf);
497 } else 462 } else
498 return 0; 463 return 0;
@@ -507,9 +472,9 @@ ieee_fpe_handler (struct pt_regs *regs)
507 472
508 n = (finsn >> 8) & 0xf; 473 n = (finsn >> 8) & 0xf;
509 m = (finsn >> 4) & 0xf; 474 m = (finsn >> 4) & 0xf;
510 hx = tsk->thread.fpu.hard.fp_regs[n]; 475 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
511 hy = tsk->thread.fpu.hard.fp_regs[m]; 476 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
512 fpscr = tsk->thread.fpu.hard.fpscr; 477 fpscr = tsk->thread.xstate->hardfpu.fpscr;
513 prec = fpscr & (1 << 19); 478 prec = fpscr & (1 << 19);
514 479
515 if ((fpscr & FPSCR_FPU_ERROR) 480 if ((fpscr & FPSCR_FPU_ERROR)
@@ -519,15 +484,15 @@ ieee_fpe_handler (struct pt_regs *regs)
519 484
520 /* FPU error because of denormal */ 485 /* FPU error because of denormal */
521 llx = ((long long) hx << 32) 486 llx = ((long long) hx << 32)
522 | tsk->thread.fpu.hard.fp_regs[n+1]; 487 | tsk->thread.xstate->hardfpu.fp_regs[n+1];
523 lly = ((long long) hy << 32) 488 lly = ((long long) hy << 32)
524 | tsk->thread.fpu.hard.fp_regs[m+1]; 489 | tsk->thread.xstate->hardfpu.fp_regs[m+1];
525 if ((hx & 0x7fffffff) >= 0x00100000) 490 if ((hx & 0x7fffffff) >= 0x00100000)
526 llx = denormal_muld(lly, llx); 491 llx = denormal_muld(lly, llx);
527 else 492 else
528 llx = denormal_muld(llx, lly); 493 llx = denormal_muld(llx, lly);
529 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 494 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
530 tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff; 495 tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
531 } else if ((fpscr & FPSCR_FPU_ERROR) 496 } else if ((fpscr & FPSCR_FPU_ERROR)
532 && (!prec && ((hx & 0x7fffffff) < 0x00800000 497 && (!prec && ((hx & 0x7fffffff) < 0x00800000
533 || (hy & 0x7fffffff) < 0x00800000))) { 498 || (hy & 0x7fffffff) < 0x00800000))) {
@@ -536,7 +501,7 @@ ieee_fpe_handler (struct pt_regs *regs)
536 hx = denormal_mulf(hy, hx); 501 hx = denormal_mulf(hy, hx);
537 else 502 else
538 hx = denormal_mulf(hx, hy); 503 hx = denormal_mulf(hx, hy);
539 tsk->thread.fpu.hard.fp_regs[n] = hx; 504 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
540 } else 505 } else
541 return 0; 506 return 0;
542 507
@@ -550,9 +515,9 @@ ieee_fpe_handler (struct pt_regs *regs)
550 515
551 n = (finsn >> 8) & 0xf; 516 n = (finsn >> 8) & 0xf;
552 m = (finsn >> 4) & 0xf; 517 m = (finsn >> 4) & 0xf;
553 hx = tsk->thread.fpu.hard.fp_regs[n]; 518 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
554 hy = tsk->thread.fpu.hard.fp_regs[m]; 519 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
555 fpscr = tsk->thread.fpu.hard.fpscr; 520 fpscr = tsk->thread.xstate->hardfpu.fpscr;
556 prec = fpscr & (1 << 19); 521 prec = fpscr & (1 << 19);
557 522
558 if ((fpscr & FPSCR_FPU_ERROR) 523 if ((fpscr & FPSCR_FPU_ERROR)
@@ -562,15 +527,15 @@ ieee_fpe_handler (struct pt_regs *regs)
562 527
563 /* FPU error because of denormal */ 528 /* FPU error because of denormal */
564 llx = ((long long) hx << 32) 529 llx = ((long long) hx << 32)
565 | tsk->thread.fpu.hard.fp_regs[n+1]; 530 | tsk->thread.xstate->hardfpu.fp_regs[n+1];
566 lly = ((long long) hy << 32) 531 lly = ((long long) hy << 32)
567 | tsk->thread.fpu.hard.fp_regs[m+1]; 532 | tsk->thread.xstate->hardfpu.fp_regs[m+1];
568 if ((finsn & 0xf00f) == 0xf000) 533 if ((finsn & 0xf00f) == 0xf000)
569 llx = denormal_addd(llx, lly); 534 llx = denormal_addd(llx, lly);
570 else 535 else
571 llx = denormal_addd(llx, lly ^ (1LL << 63)); 536 llx = denormal_addd(llx, lly ^ (1LL << 63));
572 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 537 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
573 tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff; 538 tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
574 } else if ((fpscr & FPSCR_FPU_ERROR) 539 } else if ((fpscr & FPSCR_FPU_ERROR)
575 && (!prec && ((hx & 0x7fffffff) < 0x00800000 540 && (!prec && ((hx & 0x7fffffff) < 0x00800000
576 || (hy & 0x7fffffff) < 0x00800000))) { 541 || (hy & 0x7fffffff) < 0x00800000))) {
@@ -579,7 +544,7 @@ ieee_fpe_handler (struct pt_regs *regs)
579 hx = denormal_addf(hx, hy); 544 hx = denormal_addf(hx, hy);
580 else 545 else
581 hx = denormal_addf(hx, hy ^ 0x80000000); 546 hx = denormal_addf(hx, hy ^ 0x80000000);
582 tsk->thread.fpu.hard.fp_regs[n] = hx; 547 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
583 } else 548 } else
584 return 0; 549 return 0;
585 550
@@ -597,7 +562,7 @@ BUILD_TRAP_HANDLER(fpu_error)
597 562
598 __unlazy_fpu(tsk, regs); 563 __unlazy_fpu(tsk, regs);
599 if (ieee_fpe_handler(regs)) { 564 if (ieee_fpe_handler(regs)) {
600 tsk->thread.fpu.hard.fpscr &= 565 tsk->thread.xstate->hardfpu.fpscr &=
601 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); 566 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
602 grab_fpu(regs); 567 grab_fpu(regs);
603 restore_fpu(tsk); 568 restore_fpu(tsk);
@@ -607,33 +572,3 @@ BUILD_TRAP_HANDLER(fpu_error)
607 572
608 force_sig(SIGFPE, tsk); 573 force_sig(SIGFPE, tsk);
609} 574}
610
611void fpu_state_restore(struct pt_regs *regs)
612{
613 struct task_struct *tsk = current;
614
615 grab_fpu(regs);
616 if (unlikely(!user_mode(regs))) {
617 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
618 BUG();
619 return;
620 }
621
622 if (likely(used_math())) {
623 /* Using the FPU again. */
624 restore_fpu(tsk);
625 } else {
626 /* First time FPU user. */
627 fpu_init();
628 set_used_math();
629 }
630 task_thread_info(tsk)->status |= TS_USEDFPU;
631 tsk->fpu_counter++;
632}
633
634BUILD_TRAP_HANDLER(fpu_state_restore)
635{
636 TRAP_HANDLER_DECL;
637
638 fpu_state_restore(regs);
639}
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh3.c b/arch/sh/kernel/cpu/sh3/clock-sh3.c
index 27b8738f0b09..b78384afac09 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh3.c
@@ -28,7 +28,7 @@ static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
28 28
29static void master_clk_init(struct clk *clk) 29static void master_clk_init(struct clk *clk)
30{ 30{
31 int frqcr = ctrl_inw(FRQCR); 31 int frqcr = __raw_readw(FRQCR);
32 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 32 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
33 33
34 clk->rate *= pfc_divisors[idx]; 34 clk->rate *= pfc_divisors[idx];
@@ -40,7 +40,7 @@ static struct clk_ops sh3_master_clk_ops = {
40 40
41static unsigned long module_clk_recalc(struct clk *clk) 41static unsigned long module_clk_recalc(struct clk *clk)
42{ 42{
43 int frqcr = ctrl_inw(FRQCR); 43 int frqcr = __raw_readw(FRQCR);
44 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 44 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
45 45
46 return clk->parent->rate / pfc_divisors[idx]; 46 return clk->parent->rate / pfc_divisors[idx];
@@ -52,7 +52,7 @@ static struct clk_ops sh3_module_clk_ops = {
52 52
53static unsigned long bus_clk_recalc(struct clk *clk) 53static unsigned long bus_clk_recalc(struct clk *clk)
54{ 54{
55 int frqcr = ctrl_inw(FRQCR); 55 int frqcr = __raw_readw(FRQCR);
56 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); 56 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
57 57
58 return clk->parent->rate / stc_multipliers[idx]; 58 return clk->parent->rate / stc_multipliers[idx];
@@ -64,7 +64,7 @@ static struct clk_ops sh3_bus_clk_ops = {
64 64
65static unsigned long cpu_clk_recalc(struct clk *clk) 65static unsigned long cpu_clk_recalc(struct clk *clk)
66{ 66{
67 int frqcr = ctrl_inw(FRQCR); 67 int frqcr = __raw_readw(FRQCR);
68 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); 68 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
69 69
70 return clk->parent->rate / ifc_divisors[idx]; 70 return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7705.c b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
index 0ca8f2c3646c..0ecea1451c6f 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
@@ -32,7 +32,7 @@ static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
32 32
33static void master_clk_init(struct clk *clk) 33static void master_clk_init(struct clk *clk)
34{ 34{
35 clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0003]; 35 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
36} 36}
37 37
38static struct clk_ops sh7705_master_clk_ops = { 38static struct clk_ops sh7705_master_clk_ops = {
@@ -41,7 +41,7 @@ static struct clk_ops sh7705_master_clk_ops = {
41 41
42static unsigned long module_clk_recalc(struct clk *clk) 42static unsigned long module_clk_recalc(struct clk *clk)
43{ 43{
44 int idx = ctrl_inw(FRQCR) & 0x0003; 44 int idx = __raw_readw(FRQCR) & 0x0003;
45 return clk->parent->rate / pfc_divisors[idx]; 45 return clk->parent->rate / pfc_divisors[idx];
46} 46}
47 47
@@ -51,7 +51,7 @@ static struct clk_ops sh7705_module_clk_ops = {
51 51
52static unsigned long bus_clk_recalc(struct clk *clk) 52static unsigned long bus_clk_recalc(struct clk *clk)
53{ 53{
54 int idx = (ctrl_inw(FRQCR) & 0x0300) >> 8; 54 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
55 return clk->parent->rate / stc_multipliers[idx]; 55 return clk->parent->rate / stc_multipliers[idx];
56} 56}
57 57
@@ -61,7 +61,7 @@ static struct clk_ops sh7705_bus_clk_ops = {
61 61
62static unsigned long cpu_clk_recalc(struct clk *clk) 62static unsigned long cpu_clk_recalc(struct clk *clk)
63{ 63{
64 int idx = (ctrl_inw(FRQCR) & 0x0030) >> 4; 64 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
65 return clk->parent->rate / ifc_divisors[idx]; 65 return clk->parent->rate / ifc_divisors[idx];
66} 66}
67 67
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7706.c b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
index 4bf7887d310a..6f9ff8b57dd6 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7706.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
@@ -24,7 +24,7 @@ static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 };
24 24
25static void master_clk_init(struct clk *clk) 25static void master_clk_init(struct clk *clk)
26{ 26{
27 int frqcr = ctrl_inw(FRQCR); 27 int frqcr = __raw_readw(FRQCR);
28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
29 29
30 clk->rate *= pfc_divisors[idx]; 30 clk->rate *= pfc_divisors[idx];
@@ -36,7 +36,7 @@ static struct clk_ops sh7706_master_clk_ops = {
36 36
37static unsigned long module_clk_recalc(struct clk *clk) 37static unsigned long module_clk_recalc(struct clk *clk)
38{ 38{
39 int frqcr = ctrl_inw(FRQCR); 39 int frqcr = __raw_readw(FRQCR);
40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
41 41
42 return clk->parent->rate / pfc_divisors[idx]; 42 return clk->parent->rate / pfc_divisors[idx];
@@ -48,7 +48,7 @@ static struct clk_ops sh7706_module_clk_ops = {
48 48
49static unsigned long bus_clk_recalc(struct clk *clk) 49static unsigned long bus_clk_recalc(struct clk *clk)
50{ 50{
51 int frqcr = ctrl_inw(FRQCR); 51 int frqcr = __raw_readw(FRQCR);
52 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); 52 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
53 53
54 return clk->parent->rate / stc_multipliers[idx]; 54 return clk->parent->rate / stc_multipliers[idx];
@@ -60,7 +60,7 @@ static struct clk_ops sh7706_bus_clk_ops = {
60 60
61static unsigned long cpu_clk_recalc(struct clk *clk) 61static unsigned long cpu_clk_recalc(struct clk *clk)
62{ 62{
63 int frqcr = ctrl_inw(FRQCR); 63 int frqcr = __raw_readw(FRQCR);
64 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); 64 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
65 65
66 return clk->parent->rate / ifc_divisors[idx]; 66 return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
index e8749505bd2a..f302ba09e681 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
@@ -24,7 +24,7 @@ static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 };
24 24
25static void master_clk_init(struct clk *clk) 25static void master_clk_init(struct clk *clk)
26{ 26{
27 int frqcr = ctrl_inw(FRQCR); 27 int frqcr = __raw_readw(FRQCR);
28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
29 29
30 clk->rate *= pfc_divisors[idx]; 30 clk->rate *= pfc_divisors[idx];
@@ -36,7 +36,7 @@ static struct clk_ops sh7709_master_clk_ops = {
36 36
37static unsigned long module_clk_recalc(struct clk *clk) 37static unsigned long module_clk_recalc(struct clk *clk)
38{ 38{
39 int frqcr = ctrl_inw(FRQCR); 39 int frqcr = __raw_readw(FRQCR);
40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
41 41
42 return clk->parent->rate / pfc_divisors[idx]; 42 return clk->parent->rate / pfc_divisors[idx];
@@ -48,7 +48,7 @@ static struct clk_ops sh7709_module_clk_ops = {
48 48
49static unsigned long bus_clk_recalc(struct clk *clk) 49static unsigned long bus_clk_recalc(struct clk *clk)
50{ 50{
51 int frqcr = ctrl_inw(FRQCR); 51 int frqcr = __raw_readw(FRQCR);
52 int idx = (frqcr & 0x0080) ? 52 int idx = (frqcr & 0x0080) ?
53 ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1; 53 ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1;
54 54
@@ -61,7 +61,7 @@ static struct clk_ops sh7709_bus_clk_ops = {
61 61
62static unsigned long cpu_clk_recalc(struct clk *clk) 62static unsigned long cpu_clk_recalc(struct clk *clk)
63{ 63{
64 int frqcr = ctrl_inw(FRQCR); 64 int frqcr = __raw_readw(FRQCR);
65 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); 65 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
66 66
67 return clk->parent->rate / ifc_divisors[idx]; 67 return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7710.c b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
index 030a58ba18a5..29a87d8946a4 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
@@ -26,7 +26,7 @@ static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 };
26 26
27static void master_clk_init(struct clk *clk) 27static void master_clk_init(struct clk *clk)
28{ 28{
29 clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007]; 29 clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
30} 30}
31 31
32static struct clk_ops sh7710_master_clk_ops = { 32static struct clk_ops sh7710_master_clk_ops = {
@@ -35,7 +35,7 @@ static struct clk_ops sh7710_master_clk_ops = {
35 35
36static unsigned long module_clk_recalc(struct clk *clk) 36static unsigned long module_clk_recalc(struct clk *clk)
37{ 37{
38 int idx = (ctrl_inw(FRQCR) & 0x0007); 38 int idx = (__raw_readw(FRQCR) & 0x0007);
39 return clk->parent->rate / md_table[idx]; 39 return clk->parent->rate / md_table[idx];
40} 40}
41 41
@@ -45,7 +45,7 @@ static struct clk_ops sh7710_module_clk_ops = {
45 45
46static unsigned long bus_clk_recalc(struct clk *clk) 46static unsigned long bus_clk_recalc(struct clk *clk)
47{ 47{
48 int idx = (ctrl_inw(FRQCR) & 0x0700) >> 8; 48 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8;
49 return clk->parent->rate / md_table[idx]; 49 return clk->parent->rate / md_table[idx];
50} 50}
51 51
@@ -55,7 +55,7 @@ static struct clk_ops sh7710_bus_clk_ops = {
55 55
56static unsigned long cpu_clk_recalc(struct clk *clk) 56static unsigned long cpu_clk_recalc(struct clk *clk)
57{ 57{
58 int idx = (ctrl_inw(FRQCR) & 0x0070) >> 4; 58 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4;
59 return clk->parent->rate / md_table[idx]; 59 return clk->parent->rate / md_table[idx];
60} 60}
61 61
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7712.c b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
index 6428ee6c77ed..b0d0c5203996 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7712.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
@@ -23,7 +23,7 @@ static int divisors[] = { 1, 2, 3, 4, 6 };
23 23
24static void master_clk_init(struct clk *clk) 24static void master_clk_init(struct clk *clk)
25{ 25{
26 int frqcr = ctrl_inw(FRQCR); 26 int frqcr = __raw_readw(FRQCR);
27 int idx = (frqcr & 0x0300) >> 8; 27 int idx = (frqcr & 0x0300) >> 8;
28 28
29 clk->rate *= multipliers[idx]; 29 clk->rate *= multipliers[idx];
@@ -35,7 +35,7 @@ static struct clk_ops sh7712_master_clk_ops = {
35 35
36static unsigned long module_clk_recalc(struct clk *clk) 36static unsigned long module_clk_recalc(struct clk *clk)
37{ 37{
38 int frqcr = ctrl_inw(FRQCR); 38 int frqcr = __raw_readw(FRQCR);
39 int idx = frqcr & 0x0007; 39 int idx = frqcr & 0x0007;
40 40
41 return clk->parent->rate / divisors[idx]; 41 return clk->parent->rate / divisors[idx];
@@ -47,7 +47,7 @@ static struct clk_ops sh7712_module_clk_ops = {
47 47
48static unsigned long cpu_clk_recalc(struct clk *clk) 48static unsigned long cpu_clk_recalc(struct clk *clk)
49{ 49{
50 int frqcr = ctrl_inw(FRQCR); 50 int frqcr = __raw_readw(FRQCR);
51 int idx = (frqcr & 0x0030) >> 4; 51 int idx = (frqcr & 0x0030) >> 4;
52 52
53 return clk->parent->rate / divisors[idx]; 53 return clk->parent->rate / divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index 46610c35c232..99b4d020179a 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -49,7 +49,7 @@ ENTRY(exception_handling_table)
49 .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ 49 .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */
50 .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ 50 .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/
51 .long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger 51 .long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger
52 .long break_point_trap /* 1E0 */ 52 .long breakpoint_trap_handler /* 1E0 */
53 53
54 /* 54 /*
55 * Pad the remainder of the table out, exceptions residing in far 55 * Pad the remainder of the table out, exceptions residing in far
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index f9c7df64eb01..295ec4c99e98 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -16,7 +16,7 @@
16#include <asm/cache.h> 16#include <asm/cache.h>
17#include <asm/io.h> 17#include <asm/io.h>
18 18
19int __uses_jump_to_uncached detect_cpu_and_cache_system(void) 19int detect_cpu_and_cache_system(void)
20{ 20{
21 unsigned long addr0, addr1, data0, data1, data2, data3; 21 unsigned long addr0, addr1, data0, data1, data2, data3;
22 22
@@ -30,23 +30,23 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
30 addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12); 30 addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12);
31 31
32 /* First, write back & invalidate */ 32 /* First, write back & invalidate */
33 data0 = ctrl_inl(addr0); 33 data0 = __raw_readl(addr0);
34 ctrl_outl(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0); 34 __raw_writel(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
35 data1 = ctrl_inl(addr1); 35 data1 = __raw_readl(addr1);
36 ctrl_outl(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1); 36 __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
37 37
38 /* Next, check if there's shadow or not */ 38 /* Next, check if there's shadow or not */
39 data0 = ctrl_inl(addr0); 39 data0 = __raw_readl(addr0);
40 data0 ^= SH_CACHE_VALID; 40 data0 ^= SH_CACHE_VALID;
41 ctrl_outl(data0, addr0); 41 __raw_writel(data0, addr0);
42 data1 = ctrl_inl(addr1); 42 data1 = __raw_readl(addr1);
43 data2 = data1 ^ SH_CACHE_VALID; 43 data2 = data1 ^ SH_CACHE_VALID;
44 ctrl_outl(data2, addr1); 44 __raw_writel(data2, addr1);
45 data3 = ctrl_inl(addr0); 45 data3 = __raw_readl(addr0);
46 46
47 /* Lastly, invaliate them. */ 47 /* Lastly, invaliate them. */
48 ctrl_outl(data0&~SH_CACHE_VALID, addr0); 48 __raw_writel(data0&~SH_CACHE_VALID, addr0);
49 ctrl_outl(data2&~SH_CACHE_VALID, addr1); 49 __raw_writel(data2&~SH_CACHE_VALID, addr1);
50 50
51 back_to_cached(); 51 back_to_cached();
52 52
@@ -94,9 +94,9 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
94 boot_cpu_data.dcache.way_incr = (1 << 13); 94 boot_cpu_data.dcache.way_incr = (1 << 13);
95 boot_cpu_data.dcache.entry_mask = 0x1ff0; 95 boot_cpu_data.dcache.entry_mask = 0x1ff0;
96 boot_cpu_data.dcache.sets = 512; 96 boot_cpu_data.dcache.sets = 512;
97 ctrl_outl(CCR_CACHE_32KB, CCR3_REG); 97 __raw_writel(CCR_CACHE_32KB, CCR3_REG);
98#else 98#else
99 ctrl_outl(CCR_CACHE_16KB, CCR3_REG); 99 __raw_writel(CCR_CACHE_16KB, CCR3_REG);
100#endif 100#endif
101#endif 101#endif
102 } 102 }
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
index c98846857855..53be70b98116 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c
@@ -58,7 +58,7 @@ static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
58void __init plat_irq_setup_pins(int mode) 58void __init plat_irq_setup_pins(int mode)
59{ 59{
60 if (mode == IRQ_MODE_IRQ) { 60 if (mode == IRQ_MODE_IRQ) {
61 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); 61 __raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
62 register_intc_controller(&intc_desc_irq0123); 62 register_intc_controller(&intc_desc_irq0123);
63 return; 63 return;
64 } 64 }
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 21421e34e7d5..6b80850294da 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -23,7 +23,7 @@ static int frqcr3_values[] = { 0, 1, 2, 3, 4, 5, 6 };
23 23
24static unsigned long emi_clk_recalc(struct clk *clk) 24static unsigned long emi_clk_recalc(struct clk *clk)
25{ 25{
26 int idx = ctrl_inl(CPG2_FRQCR3) & 0x0007; 26 int idx = __raw_readl(CPG2_FRQCR3) & 0x0007;
27 return clk->parent->rate / frqcr3_divisors[idx]; 27 return clk->parent->rate / frqcr3_divisors[idx];
28} 28}
29 29
@@ -52,7 +52,7 @@ static struct clk sh4202_emi_clk = {
52 52
53static unsigned long femi_clk_recalc(struct clk *clk) 53static unsigned long femi_clk_recalc(struct clk *clk)
54{ 54{
55 int idx = (ctrl_inl(CPG2_FRQCR3) >> 3) & 0x0007; 55 int idx = (__raw_readl(CPG2_FRQCR3) >> 3) & 0x0007;
56 return clk->parent->rate / frqcr3_divisors[idx]; 56 return clk->parent->rate / frqcr3_divisors[idx];
57} 57}
58 58
@@ -92,7 +92,7 @@ static void shoc_clk_init(struct clk *clk)
92 92
93static unsigned long shoc_clk_recalc(struct clk *clk) 93static unsigned long shoc_clk_recalc(struct clk *clk)
94{ 94{
95 int idx = (ctrl_inl(CPG2_FRQCR3) >> 6) & 0x0007; 95 int idx = (__raw_readl(CPG2_FRQCR3) >> 6) & 0x0007;
96 return clk->parent->rate / frqcr3_divisors[idx]; 96 return clk->parent->rate / frqcr3_divisors[idx];
97} 97}
98 98
@@ -122,10 +122,10 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id)
122 122
123 tmp = frqcr3_lookup(clk, rate); 123 tmp = frqcr3_lookup(clk, rate);
124 124
125 frqcr3 = ctrl_inl(CPG2_FRQCR3); 125 frqcr3 = __raw_readl(CPG2_FRQCR3);
126 frqcr3 &= ~(0x0007 << 6); 126 frqcr3 &= ~(0x0007 << 6);
127 frqcr3 |= tmp << 6; 127 frqcr3 |= tmp << 6;
128 ctrl_outl(frqcr3, CPG2_FRQCR3); 128 __raw_writel(frqcr3, CPG2_FRQCR3);
129 129
130 clk->rate = clk->parent->rate / frqcr3_divisors[tmp]; 130 clk->rate = clk->parent->rate / frqcr3_divisors[tmp];
131 131
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4.c b/arch/sh/kernel/cpu/sh4/clock-sh4.c
index 73294d9cd049..5add75c1f539 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4.c
@@ -28,7 +28,7 @@ static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 };
28 28
29static void master_clk_init(struct clk *clk) 29static void master_clk_init(struct clk *clk)
30{ 30{
31 clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0007]; 31 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];
32} 32}
33 33
34static struct clk_ops sh4_master_clk_ops = { 34static struct clk_ops sh4_master_clk_ops = {
@@ -37,7 +37,7 @@ static struct clk_ops sh4_master_clk_ops = {
37 37
38static unsigned long module_clk_recalc(struct clk *clk) 38static unsigned long module_clk_recalc(struct clk *clk)
39{ 39{
40 int idx = (ctrl_inw(FRQCR) & 0x0007); 40 int idx = (__raw_readw(FRQCR) & 0x0007);
41 return clk->parent->rate / pfc_divisors[idx]; 41 return clk->parent->rate / pfc_divisors[idx];
42} 42}
43 43
@@ -47,7 +47,7 @@ static struct clk_ops sh4_module_clk_ops = {
47 47
48static unsigned long bus_clk_recalc(struct clk *clk) 48static unsigned long bus_clk_recalc(struct clk *clk)
49{ 49{
50 int idx = (ctrl_inw(FRQCR) >> 3) & 0x0007; 50 int idx = (__raw_readw(FRQCR) >> 3) & 0x0007;
51 return clk->parent->rate / bfc_divisors[idx]; 51 return clk->parent->rate / bfc_divisors[idx];
52} 52}
53 53
@@ -57,7 +57,7 @@ static struct clk_ops sh4_bus_clk_ops = {
57 57
58static unsigned long cpu_clk_recalc(struct clk *clk) 58static unsigned long cpu_clk_recalc(struct clk *clk)
59{ 59{
60 int idx = (ctrl_inw(FRQCR) >> 6) & 0x0007; 60 int idx = (__raw_readw(FRQCR) >> 6) & 0x0007;
61 return clk->parent->rate / ifc_divisors[idx]; 61 return clk->parent->rate / ifc_divisors[idx];
62} 62}
63 63
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c
index e97857aec8a0..447482d7f65e 100644
--- a/arch/sh/kernel/cpu/sh4/fpu.c
+++ b/arch/sh/kernel/cpu/sh4/fpu.c
@@ -85,14 +85,14 @@ void save_fpu(struct task_struct *tsk)
85 "fmov.s fr1, @-%0\n\t" 85 "fmov.s fr1, @-%0\n\t"
86 "fmov.s fr0, @-%0\n\t" 86 "fmov.s fr0, @-%0\n\t"
87 "lds %3, fpscr\n\t":"=r" (dummy) 87 "lds %3, fpscr\n\t":"=r" (dummy)
88 :"0"((char *)(&tsk->thread.fpu.hard.status)), 88 :"0"((char *)(&tsk->thread.xstate->hardfpu.status)),
89 "r"(FPSCR_RCHG), "r"(FPSCR_INIT) 89 "r"(FPSCR_RCHG), "r"(FPSCR_INIT)
90 :"memory"); 90 :"memory");
91 91
92 disable_fpu(); 92 disable_fpu();
93} 93}
94 94
95static void restore_fpu(struct task_struct *tsk) 95void restore_fpu(struct task_struct *tsk)
96{ 96{
97 unsigned long dummy; 97 unsigned long dummy;
98 98
@@ -135,62 +135,11 @@ static void restore_fpu(struct task_struct *tsk)
135 "lds.l @%0+, fpscr\n\t" 135 "lds.l @%0+, fpscr\n\t"
136 "lds.l @%0+, fpul\n\t" 136 "lds.l @%0+, fpul\n\t"
137 :"=r" (dummy) 137 :"=r" (dummy)
138 :"0"(&tsk->thread.fpu), "r"(FPSCR_RCHG) 138 :"0" (tsk->thread.xstate), "r" (FPSCR_RCHG)
139 :"memory"); 139 :"memory");
140 disable_fpu(); 140 disable_fpu();
141} 141}
142 142
143/*
144 * Load the FPU with signalling NANS. This bit pattern we're using
145 * has the property that no matter wether considered as single or as
146 * double precision represents signaling NANS.
147 */
148
149static void fpu_init(void)
150{
151 enable_fpu();
152 asm volatile ( "lds %0, fpul\n\t"
153 "lds %1, fpscr\n\t"
154 "fsts fpul, fr0\n\t"
155 "fsts fpul, fr1\n\t"
156 "fsts fpul, fr2\n\t"
157 "fsts fpul, fr3\n\t"
158 "fsts fpul, fr4\n\t"
159 "fsts fpul, fr5\n\t"
160 "fsts fpul, fr6\n\t"
161 "fsts fpul, fr7\n\t"
162 "fsts fpul, fr8\n\t"
163 "fsts fpul, fr9\n\t"
164 "fsts fpul, fr10\n\t"
165 "fsts fpul, fr11\n\t"
166 "fsts fpul, fr12\n\t"
167 "fsts fpul, fr13\n\t"
168 "fsts fpul, fr14\n\t"
169 "fsts fpul, fr15\n\t"
170 "frchg\n\t"
171 "fsts fpul, fr0\n\t"
172 "fsts fpul, fr1\n\t"
173 "fsts fpul, fr2\n\t"
174 "fsts fpul, fr3\n\t"
175 "fsts fpul, fr4\n\t"
176 "fsts fpul, fr5\n\t"
177 "fsts fpul, fr6\n\t"
178 "fsts fpul, fr7\n\t"
179 "fsts fpul, fr8\n\t"
180 "fsts fpul, fr9\n\t"
181 "fsts fpul, fr10\n\t"
182 "fsts fpul, fr11\n\t"
183 "fsts fpul, fr12\n\t"
184 "fsts fpul, fr13\n\t"
185 "fsts fpul, fr14\n\t"
186 "fsts fpul, fr15\n\t"
187 "frchg\n\t"
188 "lds %2, fpscr\n\t"
189 : /* no output */
190 :"r" (0), "r"(FPSCR_RCHG), "r"(FPSCR_INIT));
191 disable_fpu();
192}
193
194/** 143/**
195 * denormal_to_double - Given denormalized float number, 144 * denormal_to_double - Given denormalized float number,
196 * store double float 145 * store double float
@@ -282,9 +231,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
282 /* fcnvsd */ 231 /* fcnvsd */
283 struct task_struct *tsk = current; 232 struct task_struct *tsk = current;
284 233
285 if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR)) 234 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR))
286 /* FPU error */ 235 /* FPU error */
287 denormal_to_double(&tsk->thread.fpu.hard, 236 denormal_to_double(&tsk->thread.xstate->hardfpu,
288 (finsn >> 8) & 0xf); 237 (finsn >> 8) & 0xf);
289 else 238 else
290 return 0; 239 return 0;
@@ -300,9 +249,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
300 249
301 n = (finsn >> 8) & 0xf; 250 n = (finsn >> 8) & 0xf;
302 m = (finsn >> 4) & 0xf; 251 m = (finsn >> 4) & 0xf;
303 hx = tsk->thread.fpu.hard.fp_regs[n]; 252 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
304 hy = tsk->thread.fpu.hard.fp_regs[m]; 253 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
305 fpscr = tsk->thread.fpu.hard.fpscr; 254 fpscr = tsk->thread.xstate->hardfpu.fpscr;
306 prec = fpscr & FPSCR_DBL_PRECISION; 255 prec = fpscr & FPSCR_DBL_PRECISION;
307 256
308 if ((fpscr & FPSCR_CAUSE_ERROR) 257 if ((fpscr & FPSCR_CAUSE_ERROR)
@@ -312,18 +261,18 @@ static int ieee_fpe_handler(struct pt_regs *regs)
312 261
313 /* FPU error because of denormal (doubles) */ 262 /* FPU error because of denormal (doubles) */
314 llx = ((long long)hx << 32) 263 llx = ((long long)hx << 32)
315 | tsk->thread.fpu.hard.fp_regs[n + 1]; 264 | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
316 lly = ((long long)hy << 32) 265 lly = ((long long)hy << 32)
317 | tsk->thread.fpu.hard.fp_regs[m + 1]; 266 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
318 llx = float64_mul(llx, lly); 267 llx = float64_mul(llx, lly);
319 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 268 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
320 tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; 269 tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
321 } else if ((fpscr & FPSCR_CAUSE_ERROR) 270 } else if ((fpscr & FPSCR_CAUSE_ERROR)
322 && (!prec && ((hx & 0x7fffffff) < 0x00800000 271 && (!prec && ((hx & 0x7fffffff) < 0x00800000
323 || (hy & 0x7fffffff) < 0x00800000))) { 272 || (hy & 0x7fffffff) < 0x00800000))) {
324 /* FPU error because of denormal (floats) */ 273 /* FPU error because of denormal (floats) */
325 hx = float32_mul(hx, hy); 274 hx = float32_mul(hx, hy);
326 tsk->thread.fpu.hard.fp_regs[n] = hx; 275 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
327 } else 276 } else
328 return 0; 277 return 0;
329 278
@@ -338,9 +287,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
338 287
339 n = (finsn >> 8) & 0xf; 288 n = (finsn >> 8) & 0xf;
340 m = (finsn >> 4) & 0xf; 289 m = (finsn >> 4) & 0xf;
341 hx = tsk->thread.fpu.hard.fp_regs[n]; 290 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
342 hy = tsk->thread.fpu.hard.fp_regs[m]; 291 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
343 fpscr = tsk->thread.fpu.hard.fpscr; 292 fpscr = tsk->thread.xstate->hardfpu.fpscr;
344 prec = fpscr & FPSCR_DBL_PRECISION; 293 prec = fpscr & FPSCR_DBL_PRECISION;
345 294
346 if ((fpscr & FPSCR_CAUSE_ERROR) 295 if ((fpscr & FPSCR_CAUSE_ERROR)
@@ -350,15 +299,15 @@ static int ieee_fpe_handler(struct pt_regs *regs)
350 299
351 /* FPU error because of denormal (doubles) */ 300 /* FPU error because of denormal (doubles) */
352 llx = ((long long)hx << 32) 301 llx = ((long long)hx << 32)
353 | tsk->thread.fpu.hard.fp_regs[n + 1]; 302 | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
354 lly = ((long long)hy << 32) 303 lly = ((long long)hy << 32)
355 | tsk->thread.fpu.hard.fp_regs[m + 1]; 304 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
356 if ((finsn & 0xf00f) == 0xf000) 305 if ((finsn & 0xf00f) == 0xf000)
357 llx = float64_add(llx, lly); 306 llx = float64_add(llx, lly);
358 else 307 else
359 llx = float64_sub(llx, lly); 308 llx = float64_sub(llx, lly);
360 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 309 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
361 tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; 310 tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
362 } else if ((fpscr & FPSCR_CAUSE_ERROR) 311 } else if ((fpscr & FPSCR_CAUSE_ERROR)
363 && (!prec && ((hx & 0x7fffffff) < 0x00800000 312 && (!prec && ((hx & 0x7fffffff) < 0x00800000
364 || (hy & 0x7fffffff) < 0x00800000))) { 313 || (hy & 0x7fffffff) < 0x00800000))) {
@@ -367,7 +316,7 @@ static int ieee_fpe_handler(struct pt_regs *regs)
367 hx = float32_add(hx, hy); 316 hx = float32_add(hx, hy);
368 else 317 else
369 hx = float32_sub(hx, hy); 318 hx = float32_sub(hx, hy);
370 tsk->thread.fpu.hard.fp_regs[n] = hx; 319 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
371 } else 320 } else
372 return 0; 321 return 0;
373 322
@@ -382,9 +331,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
382 331
383 n = (finsn >> 8) & 0xf; 332 n = (finsn >> 8) & 0xf;
384 m = (finsn >> 4) & 0xf; 333 m = (finsn >> 4) & 0xf;
385 hx = tsk->thread.fpu.hard.fp_regs[n]; 334 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
386 hy = tsk->thread.fpu.hard.fp_regs[m]; 335 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
387 fpscr = tsk->thread.fpu.hard.fpscr; 336 fpscr = tsk->thread.xstate->hardfpu.fpscr;
388 prec = fpscr & FPSCR_DBL_PRECISION; 337 prec = fpscr & FPSCR_DBL_PRECISION;
389 338
390 if ((fpscr & FPSCR_CAUSE_ERROR) 339 if ((fpscr & FPSCR_CAUSE_ERROR)
@@ -394,20 +343,20 @@ static int ieee_fpe_handler(struct pt_regs *regs)
394 343
395 /* FPU error because of denormal (doubles) */ 344 /* FPU error because of denormal (doubles) */
396 llx = ((long long)hx << 32) 345 llx = ((long long)hx << 32)
397 | tsk->thread.fpu.hard.fp_regs[n + 1]; 346 | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
398 lly = ((long long)hy << 32) 347 lly = ((long long)hy << 32)
399 | tsk->thread.fpu.hard.fp_regs[m + 1]; 348 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
400 349
401 llx = float64_div(llx, lly); 350 llx = float64_div(llx, lly);
402 351
403 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 352 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
404 tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; 353 tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
405 } else if ((fpscr & FPSCR_CAUSE_ERROR) 354 } else if ((fpscr & FPSCR_CAUSE_ERROR)
406 && (!prec && ((hx & 0x7fffffff) < 0x00800000 355 && (!prec && ((hx & 0x7fffffff) < 0x00800000
407 || (hy & 0x7fffffff) < 0x00800000))) { 356 || (hy & 0x7fffffff) < 0x00800000))) {
408 /* FPU error because of denormal (floats) */ 357 /* FPU error because of denormal (floats) */
409 hx = float32_div(hx, hy); 358 hx = float32_div(hx, hy);
410 tsk->thread.fpu.hard.fp_regs[n] = hx; 359 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
411 } else 360 } else
412 return 0; 361 return 0;
413 362
@@ -420,17 +369,17 @@ static int ieee_fpe_handler(struct pt_regs *regs)
420 unsigned int hx; 369 unsigned int hx;
421 370
422 m = (finsn >> 8) & 0x7; 371 m = (finsn >> 8) & 0x7;
423 hx = tsk->thread.fpu.hard.fp_regs[m]; 372 hx = tsk->thread.xstate->hardfpu.fp_regs[m];
424 373
425 if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR) 374 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR)
426 && ((hx & 0x7fffffff) < 0x00100000)) { 375 && ((hx & 0x7fffffff) < 0x00100000)) {
427 /* subnormal double to float conversion */ 376 /* subnormal double to float conversion */
428 long long llx; 377 long long llx;
429 378
430 llx = ((long long)tsk->thread.fpu.hard.fp_regs[m] << 32) 379 llx = ((long long)tsk->thread.xstate->hardfpu.fp_regs[m] << 32)
431 | tsk->thread.fpu.hard.fp_regs[m + 1]; 380 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
432 381
433 tsk->thread.fpu.hard.fpul = float64_to_float32(llx); 382 tsk->thread.xstate->hardfpu.fpul = float64_to_float32(llx);
434 } else 383 } else
435 return 0; 384 return 0;
436 385
@@ -449,7 +398,7 @@ void float_raise(unsigned int flags)
449int float_rounding_mode(void) 398int float_rounding_mode(void)
450{ 399{
451 struct task_struct *tsk = current; 400 struct task_struct *tsk = current;
452 int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.fpu.hard.fpscr); 401 int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.xstate->hardfpu.fpscr);
453 return roundingMode; 402 return roundingMode;
454} 403}
455 404
@@ -461,16 +410,16 @@ BUILD_TRAP_HANDLER(fpu_error)
461 __unlazy_fpu(tsk, regs); 410 __unlazy_fpu(tsk, regs);
462 fpu_exception_flags = 0; 411 fpu_exception_flags = 0;
463 if (ieee_fpe_handler(regs)) { 412 if (ieee_fpe_handler(regs)) {
464 tsk->thread.fpu.hard.fpscr &= 413 tsk->thread.xstate->hardfpu.fpscr &=
465 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); 414 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
466 tsk->thread.fpu.hard.fpscr |= fpu_exception_flags; 415 tsk->thread.xstate->hardfpu.fpscr |= fpu_exception_flags;
467 /* Set the FPSCR flag as well as cause bits - simply 416 /* Set the FPSCR flag as well as cause bits - simply
468 * replicate the cause */ 417 * replicate the cause */
469 tsk->thread.fpu.hard.fpscr |= (fpu_exception_flags >> 10); 418 tsk->thread.xstate->hardfpu.fpscr |= (fpu_exception_flags >> 10);
470 grab_fpu(regs); 419 grab_fpu(regs);
471 restore_fpu(tsk); 420 restore_fpu(tsk);
472 task_thread_info(tsk)->status |= TS_USEDFPU; 421 task_thread_info(tsk)->status |= TS_USEDFPU;
473 if ((((tsk->thread.fpu.hard.fpscr & FPSCR_ENABLE_MASK) >> 7) & 422 if ((((tsk->thread.xstate->hardfpu.fpscr & FPSCR_ENABLE_MASK) >> 7) &
474 (fpu_exception_flags >> 2)) == 0) { 423 (fpu_exception_flags >> 2)) == 0) {
475 return; 424 return;
476 } 425 }
@@ -478,33 +427,3 @@ BUILD_TRAP_HANDLER(fpu_error)
478 427
479 force_sig(SIGFPE, tsk); 428 force_sig(SIGFPE, tsk);
480} 429}
481
482void fpu_state_restore(struct pt_regs *regs)
483{
484 struct task_struct *tsk = current;
485
486 grab_fpu(regs);
487 if (unlikely(!user_mode(regs))) {
488 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
489 BUG();
490 return;
491 }
492
493 if (likely(used_math())) {
494 /* Using the FPU again. */
495 restore_fpu(tsk);
496 } else {
497 /* First time FPU user. */
498 fpu_init();
499 set_used_math();
500 }
501 task_thread_info(tsk)->status |= TS_USEDFPU;
502 tsk->fpu_counter++;
503}
504
505BUILD_TRAP_HANDLER(fpu_state_restore)
506{
507 TRAP_HANDLER_DECL;
508
509 fpu_state_restore(regs);
510}
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index d36f0c45f55f..822977a06d84 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -28,9 +28,9 @@ int __init detect_cpu_and_cache_system(void)
28 [9] = (1 << 16) 28 [9] = (1 << 16)
29 }; 29 };
30 30
31 pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffffff; 31 pvr = (__raw_readl(CCN_PVR) >> 8) & 0xffffff;
32 prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff; 32 prr = (__raw_readl(CCN_PRR) >> 4) & 0xff;
33 cvr = (ctrl_inl(CCN_CVR)); 33 cvr = (__raw_readl(CCN_CVR));
34 34
35 /* 35 /*
36 * Setup some sane SH-4 defaults for the icache 36 * Setup some sane SH-4 defaults for the icache
@@ -71,11 +71,11 @@ int __init detect_cpu_and_cache_system(void)
71 boot_cpu_data.dcache.ways = 4; 71 boot_cpu_data.dcache.ways = 4;
72 } else { 72 } else {
73 /* And some SH-4 defaults.. */ 73 /* And some SH-4 defaults.. */
74 boot_cpu_data.flags |= CPU_HAS_PTEA; 74 boot_cpu_data.flags |= CPU_HAS_PTEA | CPU_HAS_FPU;
75 boot_cpu_data.family = CPU_FAMILY_SH4; 75 boot_cpu_data.family = CPU_FAMILY_SH4;
76 } 76 }
77 77
78 /* FPU detection works for everyone */ 78 /* FPU detection works for almost everyone */
79 if ((cvr & 0x20000000)) 79 if ((cvr & 0x20000000))
80 boot_cpu_data.flags |= CPU_HAS_FPU; 80 boot_cpu_data.flags |= CPU_HAS_FPU;
81 81
@@ -124,6 +124,7 @@ int __init detect_cpu_and_cache_system(void)
124 boot_cpu_data.type = CPU_SH7785; 124 boot_cpu_data.type = CPU_SH7785;
125 break; 125 break;
126 case 0x4004: 126 case 0x4004:
127 case 0x4005:
127 boot_cpu_data.type = CPU_SH7786; 128 boot_cpu_data.type = CPU_SH7786;
128 boot_cpu_data.flags |= CPU_HAS_PTEAEX | CPU_HAS_L2_CACHE; 129 boot_cpu_data.flags |= CPU_HAS_PTEAEX | CPU_HAS_L2_CACHE;
129 break; 130 break;
@@ -160,6 +161,7 @@ int __init detect_cpu_and_cache_system(void)
160 break; 161 break;
161 case 0x700: 162 case 0x700:
162 boot_cpu_data.type = CPU_SH4_501; 163 boot_cpu_data.type = CPU_SH4_501;
164 boot_cpu_data.flags &= ~CPU_HAS_FPU;
163 boot_cpu_data.icache.ways = 2; 165 boot_cpu_data.icache.ways = 2;
164 boot_cpu_data.dcache.ways = 2; 166 boot_cpu_data.dcache.ways = 2;
165 break; 167 break;
@@ -227,7 +229,7 @@ int __init detect_cpu_and_cache_system(void)
227 * Size calculation is much more sensible 229 * Size calculation is much more sensible
228 * than it is for the L1. 230 * than it is for the L1.
229 * 231 *
230 * Sizes are 128KB, 258KB, 512KB, and 1MB. 232 * Sizes are 128KB, 256KB, 512KB, and 1MB.
231 */ 233 */
232 size = (cvr & 0xf) << 17; 234 size = (cvr & 0xf) << 17;
233 235
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index 4b733715cdb5..b9b7e10ad68f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -198,7 +198,7 @@ void __init plat_irq_setup_pins(int mode)
198{ 198{
199 switch (mode) { 199 switch (mode) {
200 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */ 200 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
201 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 201 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
202 register_intc_controller(&intc_desc_irlm); 202 register_intc_controller(&intc_desc_irlm);
203 break; 203 break;
204 default: 204 default:
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index b2a9df1af64c..ffd79e57254f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -442,7 +442,7 @@ void __init plat_irq_setup_pins(int mode)
442 442
443 switch (mode) { 443 switch (mode) {
444 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */ 444 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
445 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 445 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
446 register_intc_controller(&intc_desc_irlm); 446 register_intc_controller(&intc_desc_irlm);
447 break; 447 break;
448 default: 448 default:
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 5b74cc0b43da..a16eb3656f4b 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -319,7 +319,7 @@ void __init plat_irq_setup_pins(int mode)
319{ 319{
320 switch (mode) { 320 switch (mode) {
321 case IRQ_MODE_IRQ: 321 case IRQ_MODE_IRQ:
322 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 322 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
323 register_intc_controller(&intc_desc_irq); 323 register_intc_controller(&intc_desc_irq);
324 break; 324 break;
325 default: 325 default:
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index 8a8a993f55ea..fc065f9da6e5 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -43,9 +43,9 @@ static unsigned long *sq_bitmap;
43 43
44#define store_queue_barrier() \ 44#define store_queue_barrier() \
45do { \ 45do { \
46 (void)ctrl_inl(P4SEG_STORE_QUE); \ 46 (void)__raw_readl(P4SEG_STORE_QUE); \
47 ctrl_outl(0, P4SEG_STORE_QUE + 0); \ 47 __raw_writel(0, P4SEG_STORE_QUE + 0); \
48 ctrl_outl(0, P4SEG_STORE_QUE + 8); \ 48 __raw_writel(0, P4SEG_STORE_QUE + 8); \
49} while (0); 49} while (0);
50 50
51/** 51/**
@@ -100,7 +100,7 @@ static inline void sq_mapping_list_del(struct sq_mapping *map)
100 spin_unlock_irq(&sq_mapping_lock); 100 spin_unlock_irq(&sq_mapping_lock);
101} 101}
102 102
103static int __sq_remap(struct sq_mapping *map, unsigned long flags) 103static int __sq_remap(struct sq_mapping *map, pgprot_t prot)
104{ 104{
105#if defined(CONFIG_MMU) 105#if defined(CONFIG_MMU)
106 struct vm_struct *vma; 106 struct vm_struct *vma;
@@ -113,7 +113,7 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
113 113
114 if (ioremap_page_range((unsigned long)vma->addr, 114 if (ioremap_page_range((unsigned long)vma->addr,
115 (unsigned long)vma->addr + map->size, 115 (unsigned long)vma->addr + map->size,
116 vma->phys_addr, __pgprot(flags))) { 116 vma->phys_addr, prot)) {
117 vunmap(vma->addr); 117 vunmap(vma->addr);
118 return -EAGAIN; 118 return -EAGAIN;
119 } 119 }
@@ -123,8 +123,8 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
123 * straightforward, as we can just load up each queue's QACR with 123 * straightforward, as we can just load up each queue's QACR with
124 * the physical address appropriately masked. 124 * the physical address appropriately masked.
125 */ 125 */
126 ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0); 126 __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
127 ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1); 127 __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
128#endif 128#endif
129 129
130 return 0; 130 return 0;
@@ -135,14 +135,14 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
135 * @phys: Physical address of mapping. 135 * @phys: Physical address of mapping.
136 * @size: Length of mapping. 136 * @size: Length of mapping.
137 * @name: User invoking mapping. 137 * @name: User invoking mapping.
138 * @flags: Protection flags. 138 * @prot: Protection bits.
139 * 139 *
140 * Remaps the physical address @phys through the next available store queue 140 * Remaps the physical address @phys through the next available store queue
141 * address of @size length. @name is logged at boot time as well as through 141 * address of @size length. @name is logged at boot time as well as through
142 * the sysfs interface. 142 * the sysfs interface.
143 */ 143 */
144unsigned long sq_remap(unsigned long phys, unsigned int size, 144unsigned long sq_remap(unsigned long phys, unsigned int size,
145 const char *name, unsigned long flags) 145 const char *name, pgprot_t prot)
146{ 146{
147 struct sq_mapping *map; 147 struct sq_mapping *map;
148 unsigned long end; 148 unsigned long end;
@@ -177,7 +177,7 @@ unsigned long sq_remap(unsigned long phys, unsigned int size,
177 177
178 map->sq_addr = P4SEG_STORE_QUE + (page << PAGE_SHIFT); 178 map->sq_addr = P4SEG_STORE_QUE + (page << PAGE_SHIFT);
179 179
180 ret = __sq_remap(map, pgprot_val(PAGE_KERNEL_NOCACHE) | flags); 180 ret = __sq_remap(map, prot);
181 if (unlikely(ret != 0)) 181 if (unlikely(ret != 0))
182 goto out; 182 goto out;
183 183
@@ -309,8 +309,7 @@ static ssize_t mapping_store(const char *buf, size_t count)
309 return -EIO; 309 return -EIO;
310 310
311 if (likely(len)) { 311 if (likely(len)) {
312 int ret = sq_remap(base, len, "Userspace", 312 int ret = sq_remap(base, len, "Userspace", PAGE_SHARED);
313 pgprot_val(PAGE_SHARED));
314 if (ret < 0) 313 if (ret < 0)
315 return ret; 314 return ret;
316 } else 315 } else
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 33bab477d2e2..b144e8af89dc 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -41,7 +41,8 @@ pinmux-$(CONFIG_CPU_SUBTYPE_SH7757) := pinmux-sh7757.o
41pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o 41pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o
42pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o 42pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o
43 43
44obj-y += $(clock-y) 44obj-y += $(clock-y)
45obj-$(CONFIG_SMP) += $(smp-y) 45obj-$(CONFIG_SMP) += $(smp-y)
46obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y) 46obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y)
47obj-$(CONFIG_PERF_EVENTS) += perf_event.o 47obj-$(CONFIG_PERF_EVENTS) += perf_event.o
48obj-$(CONFIG_HAVE_HW_BREAKPOINT) += ubc.o
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 0ee3ee861252..2c16df37eda6 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -107,13 +107,17 @@ struct clk *main_clks[] = {
107static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; 107static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
108static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; 108static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
109 109
110static struct clk_div_mult_table div4_table = { 110static struct clk_div_mult_table div4_div_mult_table = {
111 .divisors = divisors, 111 .divisors = divisors,
112 .nr_divisors = ARRAY_SIZE(divisors), 112 .nr_divisors = ARRAY_SIZE(divisors),
113 .multipliers = multipliers, 113 .multipliers = multipliers,
114 .nr_multipliers = ARRAY_SIZE(multipliers), 114 .nr_multipliers = ARRAY_SIZE(multipliers),
115}; 115};
116 116
117static struct clk_div4_table div4_table = {
118 .div_mult_table = &div4_div_mult_table,
119};
120
117enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 121enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
118 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; 122 DIV4_SIUA, DIV4_SIUB, DIV4_NR };
119 123
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index a95ebaba095c..91588d280cd8 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -110,13 +110,17 @@ struct clk *main_clks[] = {
110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; 110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; 111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
112 112
113static struct clk_div_mult_table div4_table = { 113static struct clk_div_mult_table div4_div_mult_table = {
114 .divisors = divisors, 114 .divisors = divisors,
115 .nr_divisors = ARRAY_SIZE(divisors), 115 .nr_divisors = ARRAY_SIZE(divisors),
116 .multipliers = multipliers, 116 .multipliers = multipliers,
117 .nr_multipliers = ARRAY_SIZE(multipliers), 117 .nr_multipliers = ARRAY_SIZE(multipliers),
118}; 118};
119 119
120static struct clk_div4_table div4_table = {
121 .div_mult_table = &div4_div_mult_table,
122};
123
120enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 124enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
121 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; 125 DIV4_SIUA, DIV4_SIUB, DIV4_NR };
122 126
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index ea38b554dc05..15db6d521c5c 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -110,19 +110,22 @@ struct clk *main_clks[] = {
110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; 110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; 111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
112 112
113static struct clk_div_mult_table div4_table = { 113static struct clk_div_mult_table div4_div_mult_table = {
114 .divisors = divisors, 114 .divisors = divisors,
115 .nr_divisors = ARRAY_SIZE(divisors), 115 .nr_divisors = ARRAY_SIZE(divisors),
116 .multipliers = multipliers, 116 .multipliers = multipliers,
117 .nr_multipliers = ARRAY_SIZE(multipliers), 117 .nr_multipliers = ARRAY_SIZE(multipliers),
118}; 118};
119 119
120enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 120static struct clk_div4_table div4_table = {
121 DIV4_SIUA, DIV4_SIUB, DIV4_IRDA, DIV4_NR }; 121 .div_mult_table = &div4_div_mult_table,
122};
122 123
123#define DIV4(_str, _reg, _bit, _mask, _flags) \ 124#define DIV4(_str, _reg, _bit, _mask, _flags) \
124 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags) 125 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
125 126
127enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR };
128
126struct clk div4_clks[DIV4_NR] = { 129struct clk div4_clks[DIV4_NR] = {
127 [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT), 130 [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT),
128 [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT), 131 [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
@@ -130,9 +133,19 @@ struct clk div4_clks[DIV4_NR] = {
130 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT), 133 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
131 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT), 134 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
132 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0), 135 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0),
136};
137
138enum { DIV4_IRDA, DIV4_ENABLE_NR };
139
140struct clk div4_enable_clks[DIV4_ENABLE_NR] = {
141 [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x1fff, 0),
142};
143
144enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR };
145
146struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
133 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0), 147 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0),
134 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), 148 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0),
135 [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x1fff, 0),
136}; 149};
137 150
138struct clk div6_clks[] = { 151struct clk div6_clks[] = {
@@ -189,6 +202,14 @@ int __init arch_clk_init(void)
189 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 202 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
190 203
191 if (!ret) 204 if (!ret)
205 ret = sh_clk_div4_enable_register(div4_enable_clks,
206 DIV4_ENABLE_NR, &div4_table);
207
208 if (!ret)
209 ret = sh_clk_div4_reparent_register(div4_reparent_clks,
210 DIV4_REPARENT_NR, &div4_table);
211
212 if (!ret)
192 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 213 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
193 214
194 if (!ret) 215 if (!ret)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 20a31c2255a8..50babe01fe44 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -110,15 +110,18 @@ struct clk *main_clks[] = {
110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; 110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; 111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
112 112
113static struct clk_div_mult_table div4_table = { 113static struct clk_div_mult_table div4_div_mult_table = {
114 .divisors = divisors, 114 .divisors = divisors,
115 .nr_divisors = ARRAY_SIZE(divisors), 115 .nr_divisors = ARRAY_SIZE(divisors),
116 .multipliers = multipliers, 116 .multipliers = multipliers,
117 .nr_multipliers = ARRAY_SIZE(multipliers), 117 .nr_multipliers = ARRAY_SIZE(multipliers),
118}; 118};
119 119
120enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 120static struct clk_div4_table div4_table = {
121 DIV4_SIUA, DIV4_SIUB, DIV4_IRDA, DIV4_NR }; 121 .div_mult_table = &div4_div_mult_table,
122};
123
124enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR };
122 125
123#define DIV4(_str, _reg, _bit, _mask, _flags) \ 126#define DIV4(_str, _reg, _bit, _mask, _flags) \
124 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags) 127 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
@@ -130,11 +133,20 @@ struct clk div4_clks[DIV4_NR] = {
130 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x0dbf, CLK_ENABLE_ON_INIT), 133 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x0dbf, CLK_ENABLE_ON_INIT),
131 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT), 134 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT),
132 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x0dbf, 0), 135 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x0dbf, 0),
133 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0), 136};
134 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0), 137
138enum { DIV4_IRDA, DIV4_ENABLE_NR };
139
140struct clk div4_enable_clks[DIV4_ENABLE_NR] = {
135 [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x0dbf, 0), 141 [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x0dbf, 0),
136}; 142};
137 143
144enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR };
145
146struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
147 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0),
148 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0),
149};
138struct clk div6_clks[] = { 150struct clk div6_clks[] = {
139 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 151 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
140}; 152};
@@ -216,6 +228,14 @@ int __init arch_clk_init(void)
216 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 228 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
217 229
218 if (!ret) 230 if (!ret)
231 ret = sh_clk_div4_enable_register(div4_enable_clks,
232 DIV4_ENABLE_NR, &div4_table);
233
234 if (!ret)
235 ret = sh_clk_div4_reparent_register(div4_reparent_clks,
236 DIV4_REPARENT_NR, &div4_table);
237
238 if (!ret)
219 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 239 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
220 240
221 if (!ret) 241 if (!ret)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 9db743802f06..6707061fbf54 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -127,13 +127,28 @@ struct clk *main_clks[] = {
127 &div3_clk, 127 &div3_clk,
128}; 128};
129 129
130static void div4_kick(struct clk *clk)
131{
132 unsigned long value;
133
134 /* set KICK bit in FRQCRA to update hardware setting */
135 value = __raw_readl(FRQCRA);
136 value |= (1 << 31);
137 __raw_writel(value, FRQCRA);
138}
139
130static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 }; 140static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 };
131 141
132static struct clk_div_mult_table div4_table = { 142static struct clk_div_mult_table div4_div_mult_table = {
133 .divisors = divisors, 143 .divisors = divisors,
134 .nr_divisors = ARRAY_SIZE(divisors), 144 .nr_divisors = ARRAY_SIZE(divisors),
135}; 145};
136 146
147static struct clk_div4_table div4_table = {
148 .div_mult_table = &div4_div_mult_table,
149 .kick = div4_kick,
150};
151
137enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR }; 152enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR };
138 153
139#define DIV4(_str, _reg, _bit, _mask, _flags) \ 154#define DIV4(_str, _reg, _bit, _mask, _flags) \
@@ -144,7 +159,7 @@ struct clk div4_clks[DIV4_NR] = {
144 [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT), 159 [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT),
145 [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT), 160 [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT),
146 [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0), 161 [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0),
147 [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, 0), 162 [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
148}; 163};
149 164
150struct clk div6_clks[] = { 165struct clk div6_clks[] = {
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index ddc235ca9664..86aae60677dc 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -35,7 +35,7 @@ static struct clk_ops sh7757_master_clk_ops = {
35 35
36static void module_clk_recalc(struct clk *clk) 36static void module_clk_recalc(struct clk *clk)
37{ 37{
38 int idx = ctrl_inl(FRQCR) & 0x0000000f; 38 int idx = __raw_readl(FRQCR) & 0x0000000f;
39 clk->rate = clk->parent->rate / p1fc_divisors[idx]; 39 clk->rate = clk->parent->rate / p1fc_divisors[idx];
40} 40}
41 41
@@ -45,7 +45,7 @@ static struct clk_ops sh7757_module_clk_ops = {
45 45
46static void bus_clk_recalc(struct clk *clk) 46static void bus_clk_recalc(struct clk *clk)
47{ 47{
48 int idx = (ctrl_inl(FRQCR) >> 8) & 0x0000000f; 48 int idx = (__raw_readl(FRQCR) >> 8) & 0x0000000f;
49 clk->rate = clk->parent->rate / bfc_divisors[idx]; 49 clk->rate = clk->parent->rate / bfc_divisors[idx];
50} 50}
51 51
@@ -55,7 +55,7 @@ static struct clk_ops sh7757_bus_clk_ops = {
55 55
56static void cpu_clk_recalc(struct clk *clk) 56static void cpu_clk_recalc(struct clk *clk)
57{ 57{
58 int idx = (ctrl_inl(FRQCR) >> 20) & 0x0000000f; 58 int idx = (__raw_readl(FRQCR) >> 20) & 0x0000000f;
59 clk->rate = clk->parent->rate / ifc_divisors[idx]; 59 clk->rate = clk->parent->rate / ifc_divisors[idx];
60} 60}
61 61
@@ -78,7 +78,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
78 78
79static void shyway_clk_recalc(struct clk *clk) 79static void shyway_clk_recalc(struct clk *clk)
80{ 80{
81 int idx = (ctrl_inl(FRQCR) >> 12) & 0x0000000f; 81 int idx = (__raw_readl(FRQCR) >> 12) & 0x0000000f;
82 clk->rate = clk->parent->rate / sfc_divisors[idx]; 82 clk->rate = clk->parent->rate / sfc_divisors[idx];
83} 83}
84 84
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 370cd47642ef..9f401163e71e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -22,7 +22,7 @@ static int cfc_divisors[] = { 1, 1, 4, 1, 1, 1, 1, 1 };
22 22
23static void master_clk_init(struct clk *clk) 23static void master_clk_init(struct clk *clk)
24{ 24{
25 clk->rate *= p0fc_divisors[(ctrl_inl(FRQCR) >> 4) & 0x07]; 25 clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];
26} 26}
27 27
28static struct clk_ops sh7763_master_clk_ops = { 28static struct clk_ops sh7763_master_clk_ops = {
@@ -31,7 +31,7 @@ static struct clk_ops sh7763_master_clk_ops = {
31 31
32static unsigned long module_clk_recalc(struct clk *clk) 32static unsigned long module_clk_recalc(struct clk *clk)
33{ 33{
34 int idx = ((ctrl_inl(FRQCR) >> 4) & 0x07); 34 int idx = ((__raw_readl(FRQCR) >> 4) & 0x07);
35 return clk->parent->rate / p0fc_divisors[idx]; 35 return clk->parent->rate / p0fc_divisors[idx];
36} 36}
37 37
@@ -41,7 +41,7 @@ static struct clk_ops sh7763_module_clk_ops = {
41 41
42static unsigned long bus_clk_recalc(struct clk *clk) 42static unsigned long bus_clk_recalc(struct clk *clk)
43{ 43{
44 int idx = ((ctrl_inl(FRQCR) >> 16) & 0x07); 44 int idx = ((__raw_readl(FRQCR) >> 16) & 0x07);
45 return clk->parent->rate / bfc_divisors[idx]; 45 return clk->parent->rate / bfc_divisors[idx];
46} 46}
47 47
@@ -68,7 +68,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
68 68
69static unsigned long shyway_clk_recalc(struct clk *clk) 69static unsigned long shyway_clk_recalc(struct clk *clk)
70{ 70{
71 int idx = ((ctrl_inl(FRQCR) >> 20) & 0x07); 71 int idx = ((__raw_readl(FRQCR) >> 20) & 0x07);
72 return clk->parent->rate / cfc_divisors[idx]; 72 return clk->parent->rate / cfc_divisors[idx];
73} 73}
74 74
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
index e0b896769205..9e3354365d40 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
@@ -21,7 +21,7 @@ static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 };
21 21
22static void master_clk_init(struct clk *clk) 22static void master_clk_init(struct clk *clk)
23{ 23{
24 clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> 28) & 0x000f]; 24 clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f];
25} 25}
26 26
27static struct clk_ops sh7770_master_clk_ops = { 27static struct clk_ops sh7770_master_clk_ops = {
@@ -30,7 +30,7 @@ static struct clk_ops sh7770_master_clk_ops = {
30 30
31static unsigned long module_clk_recalc(struct clk *clk) 31static unsigned long module_clk_recalc(struct clk *clk)
32{ 32{
33 int idx = ((ctrl_inl(FRQCR) >> 28) & 0x000f); 33 int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f);
34 return clk->parent->rate / pfc_divisors[idx]; 34 return clk->parent->rate / pfc_divisors[idx];
35} 35}
36 36
@@ -40,7 +40,7 @@ static struct clk_ops sh7770_module_clk_ops = {
40 40
41static unsigned long bus_clk_recalc(struct clk *clk) 41static unsigned long bus_clk_recalc(struct clk *clk)
42{ 42{
43 int idx = (ctrl_inl(FRQCR) & 0x000f); 43 int idx = (__raw_readl(FRQCR) & 0x000f);
44 return clk->parent->rate / bfc_divisors[idx]; 44 return clk->parent->rate / bfc_divisors[idx];
45} 45}
46 46
@@ -50,7 +50,7 @@ static struct clk_ops sh7770_bus_clk_ops = {
50 50
51static unsigned long cpu_clk_recalc(struct clk *clk) 51static unsigned long cpu_clk_recalc(struct clk *clk)
52{ 52{
53 int idx = ((ctrl_inl(FRQCR) >> 24) & 0x000f); 53 int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f);
54 return clk->parent->rate / ifc_divisors[idx]; 54 return clk->parent->rate / ifc_divisors[idx];
55} 55}
56 56
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index a249d823578e..150963a6001e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -22,7 +22,7 @@ static int cfc_divisors[] = { 1, 1, 4, 1, 6, 1, 1, 1 };
22 22
23static void master_clk_init(struct clk *clk) 23static void master_clk_init(struct clk *clk)
24{ 24{
25 clk->rate *= pfc_divisors[ctrl_inl(FRQCR) & 0x0003]; 25 clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003];
26} 26}
27 27
28static struct clk_ops sh7780_master_clk_ops = { 28static struct clk_ops sh7780_master_clk_ops = {
@@ -31,7 +31,7 @@ static struct clk_ops sh7780_master_clk_ops = {
31 31
32static unsigned long module_clk_recalc(struct clk *clk) 32static unsigned long module_clk_recalc(struct clk *clk)
33{ 33{
34 int idx = (ctrl_inl(FRQCR) & 0x0003); 34 int idx = (__raw_readl(FRQCR) & 0x0003);
35 return clk->parent->rate / pfc_divisors[idx]; 35 return clk->parent->rate / pfc_divisors[idx];
36} 36}
37 37
@@ -41,7 +41,7 @@ static struct clk_ops sh7780_module_clk_ops = {
41 41
42static unsigned long bus_clk_recalc(struct clk *clk) 42static unsigned long bus_clk_recalc(struct clk *clk)
43{ 43{
44 int idx = ((ctrl_inl(FRQCR) >> 16) & 0x0007); 44 int idx = ((__raw_readl(FRQCR) >> 16) & 0x0007);
45 return clk->parent->rate / bfc_divisors[idx]; 45 return clk->parent->rate / bfc_divisors[idx];
46} 46}
47 47
@@ -51,7 +51,7 @@ static struct clk_ops sh7780_bus_clk_ops = {
51 51
52static unsigned long cpu_clk_recalc(struct clk *clk) 52static unsigned long cpu_clk_recalc(struct clk *clk)
53{ 53{
54 int idx = ((ctrl_inl(FRQCR) >> 24) & 0x0001); 54 int idx = ((__raw_readl(FRQCR) >> 24) & 0x0001);
55 return clk->parent->rate / ifc_divisors[idx]; 55 return clk->parent->rate / ifc_divisors[idx];
56} 56}
57 57
@@ -74,7 +74,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
74 74
75static unsigned long shyway_clk_recalc(struct clk *clk) 75static unsigned long shyway_clk_recalc(struct clk *clk)
76{ 76{
77 int idx = ((ctrl_inl(FRQCR) >> 20) & 0x0007); 77 int idx = ((__raw_readl(FRQCR) >> 20) & 0x0007);
78 return clk->parent->rate / cfc_divisors[idx]; 78 return clk->parent->rate / cfc_divisors[idx];
79} 79}
80 80
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index 73abfbf2f16d..d997f0a25b10 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -57,11 +57,15 @@ static struct clk *clks[] = {
57static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, 57static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,
58 24, 32, 36, 48 }; 58 24, 32, 36, 48 };
59 59
60static struct clk_div_mult_table div4_table = { 60static struct clk_div_mult_table div4_div_mult_table = {
61 .divisors = div2, 61 .divisors = div2,
62 .nr_divisors = ARRAY_SIZE(div2), 62 .nr_divisors = ARRAY_SIZE(div2),
63}; 63};
64 64
65static struct clk_div4_table div4_table = {
66 .div_mult_table = &div4_div_mult_table,
67};
68
65enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_GA, 69enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_GA,
66 DIV4_DU, DIV4_P, DIV4_NR }; 70 DIV4_DU, DIV4_P, DIV4_NR };
67 71
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index a0e8869071ac..af69fd468703 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -3,11 +3,7 @@
3 * 3 *
4 * SH7786 support for the clock framework 4 * SH7786 support for the clock framework
5 * 5 *
6 * Copyright (C) 2008, 2009 Renesas Solutions Corp. 6 * Copyright (C) 2010 Paul Mundt
7 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 *
9 * Based on SH7785
10 * Copyright (C) 2007 Paul Mundt
11 * 7 *
12 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -15,127 +11,127 @@
15 */ 11 */
16#include <linux/init.h> 12#include <linux/init.h>
17#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/clk.h>
15#include <linux/io.h>
18#include <asm/clock.h> 16#include <asm/clock.h>
19#include <asm/freq.h> 17#include <asm/freq.h>
20#include <asm/io.h>
21
22static int ifc_divisors[] = { 1, 2, 4, 1 };
23static int sfc_divisors[] = { 1, 1, 4, 1 };
24static int bfc_divisors[] = { 1, 1, 1, 1, 1, 12, 16, 1,
25 24, 32, 1, 1, 1, 1, 1, 1 };
26static int mfc_divisors[] = { 1, 1, 4, 1 };
27static int pfc_divisors[] = { 1, 1, 1, 1, 1, 1, 16, 1,
28 24, 32, 1, 48, 1, 1, 1, 1 };
29 18
30static void master_clk_init(struct clk *clk) 19/*
31{ 20 * Default rate for the root input clock, reset this with clk_set_rate()
32 clk->rate *= pfc_divisors[ctrl_inl(FRQMR1) & 0x000f]; 21 * from the platform code.
33} 22 */
34 23static struct clk extal_clk = {
35static struct clk_ops sh7786_master_clk_ops = { 24 .name = "extal",
36 .init = master_clk_init, 25 .id = -1,
26 .rate = 33333333,
37}; 27};
38 28
39static unsigned long module_clk_recalc(struct clk *clk) 29static unsigned long pll_recalc(struct clk *clk)
40{ 30{
41 int idx = (ctrl_inl(FRQMR1) & 0x000f); 31 int multiplier;
42 return clk->parent->rate / pfc_divisors[idx];
43}
44 32
45static struct clk_ops sh7786_module_clk_ops = { 33 /*
46 .recalc = module_clk_recalc, 34 * Clock modes 0, 1, and 2 use an x64 multiplier against PLL1,
47}; 35 * while modes 3, 4, and 5 use an x32.
36 */
37 multiplier = (sh_mv.mv_mode_pins() & 0xf) < 3 ? 64 : 32;
48 38
49static unsigned long bus_clk_recalc(struct clk *clk) 39 return clk->parent->rate * multiplier;
50{
51 int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
52 return clk->parent->rate / bfc_divisors[idx];
53} 40}
54 41
55static struct clk_ops sh7786_bus_clk_ops = { 42static struct clk_ops pll_clk_ops = {
56 .recalc = bus_clk_recalc, 43 .recalc = pll_recalc,
57}; 44};
58 45
59static unsigned long cpu_clk_recalc(struct clk *clk) 46static struct clk pll_clk = {
60{ 47 .name = "pll_clk",
61 int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003); 48 .id = -1,
62 return clk->parent->rate / ifc_divisors[idx]; 49 .ops = &pll_clk_ops,
63} 50 .parent = &extal_clk,
64 51 .flags = CLK_ENABLE_ON_INIT,
65static struct clk_ops sh7786_cpu_clk_ops = {
66 .recalc = cpu_clk_recalc,
67}; 52};
68 53
69static struct clk_ops *sh7786_clk_ops[] = { 54static struct clk *clks[] = {
70 &sh7786_master_clk_ops, 55 &extal_clk,
71 &sh7786_module_clk_ops, 56 &pll_clk,
72 &sh7786_bus_clk_ops,
73 &sh7786_cpu_clk_ops,
74}; 57};
75 58
76void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 59static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,
77{ 60 24, 32, 36, 48 };
78 if (idx < ARRAY_SIZE(sh7786_clk_ops))
79 *ops = sh7786_clk_ops[idx];
80}
81 61
82static unsigned long shyway_clk_recalc(struct clk *clk) 62static struct clk_div_mult_table div4_div_mult_table = {
83{ 63 .divisors = div2,
84 int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003); 64 .nr_divisors = ARRAY_SIZE(div2),
85 return clk->parent->rate / sfc_divisors[idx];
86}
87
88static struct clk_ops sh7786_shyway_clk_ops = {
89 .recalc = shyway_clk_recalc,
90}; 65};
91 66
92static struct clk sh7786_shyway_clk = { 67static struct clk_div4_table div4_table = {
93 .name = "shyway_clk", 68 .div_mult_table = &div4_div_mult_table,
94 .flags = CLK_ENABLE_ON_INIT,
95 .ops = &sh7786_shyway_clk_ops,
96}; 69};
97 70
98static unsigned long ddr_clk_recalc(struct clk *clk) 71enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_DU, DIV4_P, DIV4_NR };
99{
100 int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
101 return clk->parent->rate / mfc_divisors[idx];
102}
103 72
104static struct clk_ops sh7786_ddr_clk_ops = { 73#define DIV4(_str, _bit, _mask, _flags) \
105 .recalc = ddr_clk_recalc, 74 SH_CLK_DIV4(_str, &pll_clk, FRQMR1, _bit, _mask, _flags)
106};
107 75
108static struct clk sh7786_ddr_clk = { 76struct clk div4_clks[DIV4_NR] = {
109 .name = "ddr_clk", 77 [DIV4_P] = DIV4("peripheral_clk", 0, 0x0b40, 0),
110 .flags = CLK_ENABLE_ON_INIT, 78 [DIV4_DU] = DIV4("du_clk", 4, 0x0010, 0),
111 .ops = &sh7786_ddr_clk_ops, 79 [DIV4_DDR] = DIV4("ddr_clk", 12, 0x0002, CLK_ENABLE_ON_INIT),
80 [DIV4_B] = DIV4("bus_clk", 16, 0x0360, CLK_ENABLE_ON_INIT),
81 [DIV4_SH] = DIV4("shyway_clk", 20, 0x0002, CLK_ENABLE_ON_INIT),
82 [DIV4_I] = DIV4("cpu_clk", 28, 0x0006, CLK_ENABLE_ON_INIT),
112}; 83};
113 84
114/* 85#define MSTPCR0 0xffc40030
115 * Additional SH7786-specific on-chip clocks that aren't already part of the 86#define MSTPCR1 0xffc40034
116 * clock framework 87
117 */ 88static struct clk mstp_clks[] = {
118static struct clk *sh7786_onchip_clocks[] = { 89 /* MSTPCR0 */
119 &sh7786_shyway_clk, 90 SH_CLK_MSTP32("scif_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0),
120 &sh7786_ddr_clk, 91 SH_CLK_MSTP32("scif_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0),
92 SH_CLK_MSTP32("scif_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0),
93 SH_CLK_MSTP32("scif_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0),
94 SH_CLK_MSTP32("scif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0),
95 SH_CLK_MSTP32("scif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0),
96 SH_CLK_MSTP32("ssi_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 23, 0),
97 SH_CLK_MSTP32("ssi_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 22, 0),
98 SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0),
99 SH_CLK_MSTP32("ssi_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 20, 0),
100 SH_CLK_MSTP32("hac_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 17, 0),
101 SH_CLK_MSTP32("hac_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 16, 0),
102 SH_CLK_MSTP32("i2c_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 15, 0),
103 SH_CLK_MSTP32("i2c_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 14, 0),
104 SH_CLK_MSTP32("tmu9_11_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 11, 0),
105 SH_CLK_MSTP32("tmu678_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 10, 0),
106 SH_CLK_MSTP32("tmu345_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 9, 0),
107 SH_CLK_MSTP32("tmu012_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 8, 0),
108 SH_CLK_MSTP32("sdif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 5, 0),
109 SH_CLK_MSTP32("sdif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 4, 0),
110 SH_CLK_MSTP32("hspi_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 2, 0),
111
112 /* MSTPCR1 */
113 SH_CLK_MSTP32("usb_fck", -1, NULL, MSTPCR1, 12, 0),
114 SH_CLK_MSTP32("pcie_fck", 2, NULL, MSTPCR1, 10, 0),
115 SH_CLK_MSTP32("pcie_fck", 1, NULL, MSTPCR1, 9, 0),
116 SH_CLK_MSTP32("pcie_fck", 0, NULL, MSTPCR1, 8, 0),
117 SH_CLK_MSTP32("dmac_11_6_fck", -1, NULL, MSTPCR1, 5, 0),
118 SH_CLK_MSTP32("dmac_5_0_fck", -1, NULL, MSTPCR1, 4, 0),
119 SH_CLK_MSTP32("du_fck", -1, NULL, MSTPCR1, 3, 0),
120 SH_CLK_MSTP32("ether_fck", -1, NULL, MSTPCR1, 2, 0),
121}; 121};
122 122
123int __init arch_clk_init(void) 123int __init arch_clk_init(void)
124{ 124{
125 struct clk *clk;
126 int i, ret = 0; 125 int i, ret = 0;
127 126
128 cpg_clk_init(); 127 for (i = 0; i < ARRAY_SIZE(clks); i++)
129 128 ret |= clk_register(clks[i]);
130 clk = clk_get(NULL, "master_clk");
131 for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) {
132 struct clk *clkp = sh7786_onchip_clocks[i];
133
134 clkp->parent = clk;
135 ret |= clk_register(clkp);
136 }
137 129
138 clk_put(clk); 130 if (!ret)
131 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
132 &div4_table);
133 if (!ret)
134 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
139 135
140 return ret; 136 return ret;
141} 137}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 23c27d32d982..e75c57bdfa5e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -33,7 +33,7 @@ static int cfc_divisors[] = { 1, 1, 4, 6 };
33 33
34static void master_clk_init(struct clk *clk) 34static void master_clk_init(struct clk *clk)
35{ 35{
36 clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK]; 36 clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK];
37} 37}
38 38
39static struct clk_ops shx3_master_clk_ops = { 39static struct clk_ops shx3_master_clk_ops = {
@@ -42,7 +42,7 @@ static struct clk_ops shx3_master_clk_ops = {
42 42
43static unsigned long module_clk_recalc(struct clk *clk) 43static unsigned long module_clk_recalc(struct clk *clk)
44{ 44{
45 int idx = ((ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK); 45 int idx = ((__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK);
46 return clk->parent->rate / pfc_divisors[idx]; 46 return clk->parent->rate / pfc_divisors[idx];
47} 47}
48 48
@@ -52,7 +52,7 @@ static struct clk_ops shx3_module_clk_ops = {
52 52
53static unsigned long bus_clk_recalc(struct clk *clk) 53static unsigned long bus_clk_recalc(struct clk *clk)
54{ 54{
55 int idx = ((ctrl_inl(FRQCR) >> BFC_POS) & BFC_MSK); 55 int idx = ((__raw_readl(FRQCR) >> BFC_POS) & BFC_MSK);
56 return clk->parent->rate / bfc_divisors[idx]; 56 return clk->parent->rate / bfc_divisors[idx];
57} 57}
58 58
@@ -62,7 +62,7 @@ static struct clk_ops shx3_bus_clk_ops = {
62 62
63static unsigned long cpu_clk_recalc(struct clk *clk) 63static unsigned long cpu_clk_recalc(struct clk *clk)
64{ 64{
65 int idx = ((ctrl_inl(FRQCR) >> IFC_POS) & IFC_MSK); 65 int idx = ((__raw_readl(FRQCR) >> IFC_POS) & IFC_MSK);
66 return clk->parent->rate / ifc_divisors[idx]; 66 return clk->parent->rate / ifc_divisors[idx];
67} 67}
68 68
@@ -85,7 +85,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
85 85
86static unsigned long shyway_clk_recalc(struct clk *clk) 86static unsigned long shyway_clk_recalc(struct clk *clk)
87{ 87{
88 int idx = ((ctrl_inl(FRQCR) >> CFC_POS) & CFC_MSK); 88 int idx = ((__raw_readl(FRQCR) >> CFC_POS) & CFC_MSK);
89 return clk->parent->rate / cfc_divisors[idx]; 89 return clk->parent->rate / cfc_divisors[idx];
90} 90}
91 91
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
index cb9d07bd59f8..0688a7502f86 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
@@ -278,6 +278,7 @@ enum {
278 HIZA8_LCDC, HIZA8_HIZ, 278 HIZA8_LCDC, HIZA8_HIZ,
279 HIZA7_LCDC, HIZA7_HIZ, 279 HIZA7_LCDC, HIZA7_HIZ,
280 HIZA6_LCDC, HIZA6_HIZ, 280 HIZA6_LCDC, HIZA6_HIZ,
281 HIZB4_SIUA, HIZB4_HIZ,
281 HIZB1_VIO, HIZB1_HIZ, 282 HIZB1_VIO, HIZB1_HIZ,
282 HIZB0_VIO, HIZB0_HIZ, 283 HIZB0_VIO, HIZB0_HIZ,
283 HIZC15_IRQ7, HIZC15_HIZ, 284 HIZC15_IRQ7, HIZC15_HIZ,
@@ -546,7 +547,7 @@ static pinmux_enum_t pinmux_data[] = {
546 PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2, 547 PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2,
547 HIZB0_VIO, FOE_VIO_VD2), 548 HIZB0_VIO, FOE_VIO_VD2),
548 PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2, 549 PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2,
549 HIZB1_VIO, HIZB1_VIO, FCE_VIO_HD2), 550 HIZB1_VIO, FCE_VIO_HD2),
550 PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2, 551 PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2,
551 HIZB1_VIO, FRB_VIO_CLK2), 552 HIZB1_VIO, FRB_VIO_CLK2),
552 553
@@ -658,14 +659,14 @@ static pinmux_enum_t pinmux_data[] = {
658 PINMUX_DATA(SDHICLK_MARK, SDHICLK), 659 PINMUX_DATA(SDHICLK_MARK, SDHICLK),
659 660
660 /* SIU - Port A */ 661 /* SIU - Port A */
661 PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, SIUAOLR_SIOF1_SYNC), 662 PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, HIZB4_SIUA, SIUAOLR_SIOF1_SYNC),
662 PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, SIUAOBT_SIOF1_SCK), 663 PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, HIZB4_SIUA, SIUAOBT_SIOF1_SCK),
663 PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, SIUAISLD_SIOF1_RXD), 664 PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, HIZB4_SIUA, SIUAISLD_SIOF1_RXD),
664 PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, SIUAILR_SIOF1_SS2), 665 PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, HIZB4_SIUA, SIUAILR_SIOF1_SS2),
665 PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, SIUAIBT_SIOF1_SS1), 666 PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, HIZB4_SIUA, SIUAIBT_SIOF1_SS1),
666 PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, SIUAOSLD_SIOF1_TXD), 667 PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, HIZB4_SIUA, SIUAOSLD_SIOF1_TXD),
667 PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, PSB1_SIUMCKA, PTK0), 668 PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, HIZB4_SIUA, PSB1_SIUMCKA, PTK0),
668 PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, PTK0), 669 PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, HIZB4_SIUA, PTK0),
669 670
670 /* SIU - Port B */ 671 /* SIU - Port B */
671 PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR), 672 PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR),
@@ -1612,7 +1613,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1612 0, 0, 1613 0, 0,
1613 0, 0, 1614 0, 0,
1614 0, 0, 1615 0, 0,
1615 0, 0, 1616 HIZB4_SIUA, HIZB4_HIZ,
1616 0, 0, 1617 0, 0,
1617 0, 0, 1618 0, 0,
1618 HIZB1_VIO, HIZB1_HIZ, 1619 HIZB1_VIO, HIZB1_HIZ,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index b5335b5e309c..ef3f97827808 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -446,6 +446,8 @@ void __init plat_early_device_setup(void)
446 446
447enum { 447enum {
448 UNUSED=0, 448 UNUSED=0,
449 ENABLED,
450 DISABLED,
449 451
450 /* interrupt sources */ 452 /* interrupt sources */
451 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 453 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -461,7 +463,6 @@ enum {
461 SCIF0, SCIF1, SCIF2, SIOF0, SIOF1, SIO, 463 SCIF0, SCIF1, SCIF2, SIOF0, SIOF1, SIO,
462 FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, 464 FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
463 I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI, 465 I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI,
464 SDHI0, SDHI1, SDHI2, SDHI3,
465 CMT, TSIF, SIU, TWODG, 466 CMT, TSIF, SIU, TWODG,
466 TMU0, TMU1, TMU2, 467 TMU0, TMU1, TMU2,
467 IRDA, JPU, LCDC, 468 IRDA, JPU, LCDC,
@@ -494,8 +495,8 @@ static struct intc_vect vectors[] __initdata = {
494 INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), 495 INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0),
495 INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20), 496 INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20),
496 INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60), 497 INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60),
497 INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), 498 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
498 INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), 499 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
499 INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), 500 INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20),
500 INTC_VECT(SIU, 0xf80), INTC_VECT(TWODG, 0xfa0), 501 INTC_VECT(SIU, 0xf80), INTC_VECT(TWODG, 0xfa0),
501 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 502 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
@@ -513,7 +514,6 @@ static struct intc_group groups[] __initdata = {
513 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, 514 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI,
514 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), 515 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
515 INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI), 516 INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI),
516 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
517}; 517};
518 518
519static struct intc_mask_reg mask_registers[] __initdata = { 519static struct intc_mask_reg mask_registers[] __initdata = {
@@ -535,7 +535,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
535 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, 535 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
536 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, 536 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
537 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 537 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
538 { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, TWODG, SIU } }, 538 { DISABLED, DISABLED, ENABLED, ENABLED, 0, 0, TWODG, SIU } },
539 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 539 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
540 { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } }, 540 { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } },
541 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ 541 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
@@ -573,9 +573,13 @@ static struct intc_mask_reg ack_registers[] __initdata = {
573 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 573 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
574}; 574};
575 575
576static DECLARE_INTC_DESC_ACK(intc_desc, "sh7722", vectors, groups, 576static struct intc_desc intc_desc __initdata = {
577 mask_registers, prio_registers, sense_registers, 577 .name = "sh7722",
578 ack_registers); 578 .force_enable = ENABLED,
579 .force_disable = DISABLED,
580 .hw = INTC_HW_DESC(vectors, groups, mask_registers,
581 prio_registers, sense_registers, ack_registers),
582};
579 583
580void __init plat_irq_setup(void) 584void __init plat_irq_setup(void)
581{ 585{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 772b9265d0e4..85c61f624702 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -592,14 +592,17 @@ void __init plat_early_device_setup(void)
592#define RAMCR_CACHE_L2FC 0x0002 592#define RAMCR_CACHE_L2FC 0x0002
593#define RAMCR_CACHE_L2E 0x0001 593#define RAMCR_CACHE_L2E 0x0001
594#define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC) 594#define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC)
595void __uses_jump_to_uncached l2_cache_init(void) 595
596void l2_cache_init(void)
596{ 597{
597 /* Enable L2 cache */ 598 /* Enable L2 cache */
598 ctrl_outl(L2_CACHE_ENABLE, RAMCR); 599 __raw_writel(L2_CACHE_ENABLE, RAMCR);
599} 600}
600 601
601enum { 602enum {
602 UNUSED=0, 603 UNUSED=0,
604 ENABLED,
605 DISABLED,
603 606
604 /* interrupt sources */ 607 /* interrupt sources */
605 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 608 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -622,7 +625,6 @@ enum {
622 SCIFA_SCIFA1, 625 SCIFA_SCIFA1,
623 FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I, 626 FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I,
624 I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI, 627 I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI,
625 SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2,
626 CMT_CMTI, 628 CMT_CMTI,
627 TSIF_TSIFI, 629 TSIF_TSIFI,
628 SIU_SIUI, 630 SIU_SIUI,
@@ -630,7 +632,6 @@ enum {
630 TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2, 632 TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2,
631 IRDA_IRDAI, 633 IRDA_IRDAI,
632 ATAPI_ATAPII, 634 ATAPI_ATAPII,
633 SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2,
634 VEU2H1_VEU2HI, 635 VEU2H1_VEU2HI,
635 LCDC_LCDCI, 636 LCDC_LCDCI,
636 TMU1_TUNI0,TMU1_TUNI1,TMU1_TUNI2, 637 TMU1_TUNI0,TMU1_TUNI1,TMU1_TUNI2,
@@ -701,9 +702,9 @@ static struct intc_vect vectors[] __initdata = {
701 INTC_VECT(I2C_WAITI,0xE40), 702 INTC_VECT(I2C_WAITI,0xE40),
702 INTC_VECT(I2C_DTEI,0xE60), 703 INTC_VECT(I2C_DTEI,0xE60),
703 704
704 INTC_VECT(SDHI0_SDHII0,0xE80), 705 INTC_VECT(SDHI0, 0xE80),
705 INTC_VECT(SDHI0_SDHII1,0xEA0), 706 INTC_VECT(SDHI0, 0xEA0),
706 INTC_VECT(SDHI0_SDHII2,0xEC0), 707 INTC_VECT(SDHI0, 0xEC0),
707 708
708 INTC_VECT(CMT_CMTI,0xF00), 709 INTC_VECT(CMT_CMTI,0xF00),
709 INTC_VECT(TSIF_TSIFI,0xF20), 710 INTC_VECT(TSIF_TSIFI,0xF20),
@@ -717,9 +718,9 @@ static struct intc_vect vectors[] __initdata = {
717 INTC_VECT(IRDA_IRDAI,0x480), 718 INTC_VECT(IRDA_IRDAI,0x480),
718 INTC_VECT(ATAPI_ATAPII,0x4A0), 719 INTC_VECT(ATAPI_ATAPII,0x4A0),
719 720
720 INTC_VECT(SDHI1_SDHII0,0x4E0), 721 INTC_VECT(SDHI1, 0x4E0),
721 INTC_VECT(SDHI1_SDHII1,0x500), 722 INTC_VECT(SDHI1, 0x500),
722 INTC_VECT(SDHI1_SDHII2,0x520), 723 INTC_VECT(SDHI1, 0x520),
723 724
724 INTC_VECT(VEU2H1_VEU2HI,0x560), 725 INTC_VECT(VEU2H1_VEU2HI,0x560),
725 INTC_VECT(LCDC_LCDCI,0x580), 726 INTC_VECT(LCDC_LCDCI,0x580),
@@ -738,15 +739,14 @@ static struct intc_group groups[] __initdata = {
738 INTC_GROUP(FLCTL,FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I), 739 INTC_GROUP(FLCTL,FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I),
739 INTC_GROUP(I2C,I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI), 740 INTC_GROUP(I2C,I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI),
740 INTC_GROUP(_2DG, _2DG_TRI,_2DG_INI,_2DG_CEI), 741 INTC_GROUP(_2DG, _2DG_TRI,_2DG_INI,_2DG_CEI),
741 INTC_GROUP(SDHI1, SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2),
742 INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI), 742 INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI),
743 INTC_GROUP(DMAC1B, DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR), 743 INTC_GROUP(DMAC1B, DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR),
744 INTC_GROUP(SDHI0,SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2),
745}; 744};
746 745
747static struct intc_mask_reg mask_registers[] __initdata = { 746static struct intc_mask_reg mask_registers[] __initdata = {
748 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ 747 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
749 { 0, TMU1_TUNI2,TMU1_TUNI1,TMU1_TUNI0,0,SDHI1_SDHII2,SDHI1_SDHII1,SDHI1_SDHII0} }, 748 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
749 0, DISABLED, ENABLED, ENABLED } },
750 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ 750 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
751 { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } }, 751 { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } },
752 { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ 752 { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
@@ -763,7 +763,8 @@ static struct intc_mask_reg mask_registers[] __initdata = {
763 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, 763 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
764 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, 764 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
765 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 765 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
766 { 0,SDHI0_SDHII2,SDHI0_SDHII1,SDHI0_SDHII0,0,0,SCIFA_SCIFA2,SIU_SIUI } }, 766 { 0, DISABLED, ENABLED, ENABLED,
767 0, 0, SCIFA_SCIFA2, SIU_SIUI } },
767 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 768 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
768 { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } }, 769 { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } },
769 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ 770 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
@@ -803,9 +804,13 @@ static struct intc_mask_reg ack_registers[] __initdata = {
803 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 804 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
804}; 805};
805 806
806static DECLARE_INTC_DESC_ACK(intc_desc, "sh7723", vectors, groups, 807static struct intc_desc intc_desc __initdata = {
807 mask_registers, prio_registers, sense_registers, 808 .name = "sh7723",
808 ack_registers); 809 .force_enable = ENABLED,
810 .force_disable = DISABLED,
811 .hw = INTC_HW_DESC(vectors, groups, mask_registers,
812 prio_registers, sense_registers, ack_registers),
813};
809 814
810void __init plat_irq_setup(void) 815void __init plat_irq_setup(void)
811{ 816{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index d32f96c1cc15..31e3451f7e3d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -714,14 +714,17 @@ void __init plat_early_device_setup(void)
714#define RAMCR_CACHE_L2FC 0x0002 714#define RAMCR_CACHE_L2FC 0x0002
715#define RAMCR_CACHE_L2E 0x0001 715#define RAMCR_CACHE_L2E 0x0001
716#define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC) 716#define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC)
717void __uses_jump_to_uncached l2_cache_init(void) 717
718void l2_cache_init(void)
718{ 719{
719 /* Enable L2 cache */ 720 /* Enable L2 cache */
720 ctrl_outl(L2_CACHE_ENABLE, RAMCR); 721 __raw_writel(L2_CACHE_ENABLE, RAMCR);
721} 722}
722 723
723enum { 724enum {
724 UNUSED = 0, 725 UNUSED = 0,
726 ENABLED,
727 DISABLED,
725 728
726 /* interrupt sources */ 729 /* interrupt sources */
727 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 730 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -750,14 +753,12 @@ enum {
750 ETHI, 753 ETHI,
751 I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI, 754 I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI,
752 I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, 755 I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI,
753 SDHI0_SDHII0, SDHI0_SDHII1, SDHI0_SDHII2, SDHI0_SDHII3,
754 CMT, 756 CMT,
755 TSIF, 757 TSIF,
756 FSI, 758 FSI,
757 SCIFA5, 759 SCIFA5,
758 TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2, 760 TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2,
759 IRDA, 761 IRDA,
760 SDHI1_SDHII0, SDHI1_SDHII1, SDHI1_SDHII2,
761 JPU, 762 JPU,
762 _2DDMAC, 763 _2DDMAC,
763 MMC_MMC2I, MMC_MMC3I, 764 MMC_MMC2I, MMC_MMC3I,
@@ -839,10 +840,10 @@ static struct intc_vect vectors[] __initdata = {
839 INTC_VECT(I2C0_WAITI, 0xE40), 840 INTC_VECT(I2C0_WAITI, 0xE40),
840 INTC_VECT(I2C0_DTEI, 0xE60), 841 INTC_VECT(I2C0_DTEI, 0xE60),
841 842
842 INTC_VECT(SDHI0_SDHII0, 0xE80), 843 INTC_VECT(SDHI0, 0xE80),
843 INTC_VECT(SDHI0_SDHII1, 0xEA0), 844 INTC_VECT(SDHI0, 0xEA0),
844 INTC_VECT(SDHI0_SDHII2, 0xEC0), 845 INTC_VECT(SDHI0, 0xEC0),
845 INTC_VECT(SDHI0_SDHII3, 0xEE0), 846 INTC_VECT(SDHI0, 0xEE0),
846 847
847 INTC_VECT(CMT, 0xF00), 848 INTC_VECT(CMT, 0xF00),
848 INTC_VECT(TSIF, 0xF20), 849 INTC_VECT(TSIF, 0xF20),
@@ -855,9 +856,9 @@ static struct intc_vect vectors[] __initdata = {
855 856
856 INTC_VECT(IRDA, 0x480), 857 INTC_VECT(IRDA, 0x480),
857 858
858 INTC_VECT(SDHI1_SDHII0, 0x4E0), 859 INTC_VECT(SDHI1, 0x4E0),
859 INTC_VECT(SDHI1_SDHII1, 0x500), 860 INTC_VECT(SDHI1, 0x500),
860 INTC_VECT(SDHI1_SDHII2, 0x520), 861 INTC_VECT(SDHI1, 0x520),
861 862
862 INTC_VECT(JPU, 0x560), 863 INTC_VECT(JPU, 0x560),
863 INTC_VECT(_2DDMAC, 0x4A0), 864 INTC_VECT(_2DDMAC, 0x4A0),
@@ -883,8 +884,6 @@ static struct intc_group groups[] __initdata = {
883 INTC_GROUP(DMAC0B, DMAC0B_DEI4, DMAC0B_DEI5, DMAC0B_DADERR), 884 INTC_GROUP(DMAC0B, DMAC0B_DEI4, DMAC0B_DEI5, DMAC0B_DADERR),
884 INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI), 885 INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI),
885 INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI), 886 INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI),
886 INTC_GROUP(SDHI0, SDHI0_SDHII0, SDHI0_SDHII1, SDHI0_SDHII2, SDHI0_SDHII3),
887 INTC_GROUP(SDHI1, SDHI1_SDHII0, SDHI1_SDHII1, SDHI1_SDHII2),
888 INTC_GROUP(SPU, SPU_SPUI0, SPU_SPUI1), 887 INTC_GROUP(SPU, SPU_SPUI0, SPU_SPUI1),
889 INTC_GROUP(MMCIF, MMC_MMC2I, MMC_MMC3I), 888 INTC_GROUP(MMCIF, MMC_MMC2I, MMC_MMC3I),
890}; 889};
@@ -892,7 +891,7 @@ static struct intc_group groups[] __initdata = {
892static struct intc_mask_reg mask_registers[] __initdata = { 891static struct intc_mask_reg mask_registers[] __initdata = {
893 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ 892 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
894 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, 893 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
895 0, SDHI1_SDHII2, SDHI1_SDHII1, SDHI1_SDHII0 } }, 894 0, DISABLED, ENABLED, ENABLED } },
896 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ 895 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
897 { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0, 896 { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0,
898 DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } }, 897 DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } },
@@ -914,7 +913,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
914 { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, 913 { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI,
915 I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } }, 914 I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } },
916 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 915 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
917 { SDHI0_SDHII3, SDHI0_SDHII2, SDHI0_SDHII1, SDHI0_SDHII0, 916 { DISABLED, DISABLED, ENABLED, ENABLED,
918 0, 0, SCIFA5, FSI } }, 917 0, 0, SCIFA5, FSI } },
919 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 918 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
920 { 0, 0, 0, CMT, 0, USB1, USB0, 0 } }, 919 { 0, 0, 0, CMT, 0, USB1, USB0, 0 } },
@@ -961,9 +960,13 @@ static struct intc_mask_reg ack_registers[] __initdata = {
961 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 960 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
962}; 961};
963 962
964static DECLARE_INTC_DESC_ACK(intc_desc, "sh7724", vectors, groups, 963static struct intc_desc intc_desc __initdata = {
965 mask_registers, prio_registers, sense_registers, 964 .name = "sh7724",
966 ack_registers); 965 .force_enable = ENABLED,
966 .force_disable = DISABLED,
967 .hw = INTC_HW_DESC(vectors, groups, mask_registers,
968 prio_registers, sense_registers, ack_registers),
969};
967 970
968void __init plat_irq_setup(void) 971void __init plat_irq_setup(void)
969{ 972{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 37e32efbbaa7..e75edf58796a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -487,17 +487,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7757-irl4567", vectors_irl4567,
487void __init plat_irq_setup(void) 487void __init plat_irq_setup(void)
488{ 488{
489 /* disable IRQ3-0 + IRQ7-4 */ 489 /* disable IRQ3-0 + IRQ7-4 */
490 ctrl_outl(0xff000000, INTC_INTMSK0); 490 __raw_writel(0xff000000, INTC_INTMSK0);
491 491
492 /* disable IRL3-0 + IRL7-4 */ 492 /* disable IRL3-0 + IRL7-4 */
493 ctrl_outl(0xc0000000, INTC_INTMSK1); 493 __raw_writel(0xc0000000, INTC_INTMSK1);
494 ctrl_outl(0xfffefffe, INTC_INTMSK2); 494 __raw_writel(0xfffefffe, INTC_INTMSK2);
495 495
496 /* select IRL mode for IRL3-0 + IRL7-4 */ 496 /* select IRL mode for IRL3-0 + IRL7-4 */
497 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 497 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
498 498
499 /* disable holding function, ie enable "SH-4 Mode" */ 499 /* disable holding function, ie enable "SH-4 Mode" */
500 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0); 500 __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
501 501
502 register_intc_controller(&intc_desc); 502 register_intc_controller(&intc_desc);
503} 503}
@@ -507,32 +507,32 @@ void __init plat_irq_setup_pins(int mode)
507 switch (mode) { 507 switch (mode) {
508 case IRQ_MODE_IRQ7654: 508 case IRQ_MODE_IRQ7654:
509 /* select IRQ mode for IRL7-4 */ 509 /* select IRQ mode for IRL7-4 */
510 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0); 510 __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
511 register_intc_controller(&intc_desc_irq4567); 511 register_intc_controller(&intc_desc_irq4567);
512 break; 512 break;
513 case IRQ_MODE_IRQ3210: 513 case IRQ_MODE_IRQ3210:
514 /* select IRQ mode for IRL3-0 */ 514 /* select IRQ mode for IRL3-0 */
515 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0); 515 __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
516 register_intc_controller(&intc_desc_irq0123); 516 register_intc_controller(&intc_desc_irq0123);
517 break; 517 break;
518 case IRQ_MODE_IRL7654: 518 case IRQ_MODE_IRL7654:
519 /* enable IRL7-4 but don't provide any masking */ 519 /* enable IRL7-4 but don't provide any masking */
520 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 520 __raw_writel(0x40000000, INTC_INTMSKCLR1);
521 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 521 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
522 break; 522 break;
523 case IRQ_MODE_IRL3210: 523 case IRQ_MODE_IRL3210:
524 /* enable IRL0-3 but don't provide any masking */ 524 /* enable IRL0-3 but don't provide any masking */
525 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 525 __raw_writel(0x80000000, INTC_INTMSKCLR1);
526 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 526 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
527 break; 527 break;
528 case IRQ_MODE_IRL7654_MASK: 528 case IRQ_MODE_IRL7654_MASK:
529 /* enable IRL7-4 and mask using cpu intc controller */ 529 /* enable IRL7-4 and mask using cpu intc controller */
530 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 530 __raw_writel(0x40000000, INTC_INTMSKCLR1);
531 register_intc_controller(&intc_desc_irl4567); 531 register_intc_controller(&intc_desc_irl4567);
532 break; 532 break;
533 case IRQ_MODE_IRL3210_MASK: 533 case IRQ_MODE_IRL3210_MASK:
534 /* enable IRL0-3 and mask using cpu intc controller */ 534 /* enable IRL0-3 and mask using cpu intc controller */
535 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 535 __raw_writel(0x80000000, INTC_INTMSKCLR1);
536 register_intc_controller(&intc_desc_irl0123); 536 register_intc_controller(&intc_desc_irl0123);
537 break; 537 break;
538 default: 538 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 6aba26fec416..7f6b0a5f7f82 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -538,11 +538,11 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7763-irl3210", irl_vectors,
538void __init plat_irq_setup(void) 538void __init plat_irq_setup(void)
539{ 539{
540 /* disable IRQ7-0 */ 540 /* disable IRQ7-0 */
541 ctrl_outl(0xff000000, INTC_INTMSK0); 541 __raw_writel(0xff000000, INTC_INTMSK0);
542 542
543 /* disable IRL3-0 + IRL7-4 */ 543 /* disable IRL3-0 + IRL7-4 */
544 ctrl_outl(0xc0000000, INTC_INTMSK1); 544 __raw_writel(0xc0000000, INTC_INTMSK1);
545 ctrl_outl(0xfffefffe, INTC_INTMSK2); 545 __raw_writel(0xfffefffe, INTC_INTMSK2);
546 546
547 register_intc_controller(&intc_desc); 547 register_intc_controller(&intc_desc);
548} 548}
@@ -552,27 +552,27 @@ void __init plat_irq_setup_pins(int mode)
552 switch (mode) { 552 switch (mode) {
553 case IRQ_MODE_IRQ: 553 case IRQ_MODE_IRQ:
554 /* select IRQ mode for IRL3-0 + IRL7-4 */ 554 /* select IRQ mode for IRL3-0 + IRL7-4 */
555 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0); 555 __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
556 register_intc_controller(&intc_irq_desc); 556 register_intc_controller(&intc_irq_desc);
557 break; 557 break;
558 case IRQ_MODE_IRL7654: 558 case IRQ_MODE_IRL7654:
559 /* enable IRL7-4 but don't provide any masking */ 559 /* enable IRL7-4 but don't provide any masking */
560 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 560 __raw_writel(0x40000000, INTC_INTMSKCLR1);
561 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 561 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
562 break; 562 break;
563 case IRQ_MODE_IRL3210: 563 case IRQ_MODE_IRL3210:
564 /* enable IRL0-3 but don't provide any masking */ 564 /* enable IRL0-3 but don't provide any masking */
565 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 565 __raw_writel(0x80000000, INTC_INTMSKCLR1);
566 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 566 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
567 break; 567 break;
568 case IRQ_MODE_IRL7654_MASK: 568 case IRQ_MODE_IRL7654_MASK:
569 /* enable IRL7-4 and mask using cpu intc controller */ 569 /* enable IRL7-4 and mask using cpu intc controller */
570 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 570 __raw_writel(0x40000000, INTC_INTMSKCLR1);
571 register_intc_controller(&intc_irl7654_desc); 571 register_intc_controller(&intc_irl7654_desc);
572 break; 572 break;
573 case IRQ_MODE_IRL3210_MASK: 573 case IRQ_MODE_IRL3210_MASK:
574 /* enable IRL0-3 and mask using cpu intc controller */ 574 /* enable IRL0-3 and mask using cpu intc controller */
575 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 575 __raw_writel(0x80000000, INTC_INTMSKCLR1);
576 register_intc_controller(&intc_irl3210_desc); 576 register_intc_controller(&intc_irl3210_desc);
577 break; 577 break;
578 default: 578 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index c1643bc9590d..86d681ecf90e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -694,17 +694,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
694void __init plat_irq_setup(void) 694void __init plat_irq_setup(void)
695{ 695{
696 /* disable IRQ7-0 */ 696 /* disable IRQ7-0 */
697 ctrl_outl(0xff000000, INTC_INTMSK0); 697 __raw_writel(0xff000000, INTC_INTMSK0);
698 698
699 /* disable IRL3-0 + IRL7-4 */ 699 /* disable IRL3-0 + IRL7-4 */
700 ctrl_outl(0xc0000000, INTC_INTMSK1); 700 __raw_writel(0xc0000000, INTC_INTMSK1);
701 ctrl_outl(0xfffefffe, INTC_INTMSK2); 701 __raw_writel(0xfffefffe, INTC_INTMSK2);
702 702
703 /* select IRL mode for IRL3-0 + IRL7-4 */ 703 /* select IRL mode for IRL3-0 + IRL7-4 */
704 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 704 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
705 705
706 /* disable holding function, ie enable "SH-4 Mode" */ 706 /* disable holding function, ie enable "SH-4 Mode" */
707 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0); 707 __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
708 708
709 register_intc_controller(&intc_desc); 709 register_intc_controller(&intc_desc);
710} 710}
@@ -714,27 +714,27 @@ void __init plat_irq_setup_pins(int mode)
714 switch (mode) { 714 switch (mode) {
715 case IRQ_MODE_IRQ: 715 case IRQ_MODE_IRQ:
716 /* select IRQ mode for IRL3-0 + IRL7-4 */ 716 /* select IRQ mode for IRL3-0 + IRL7-4 */
717 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0); 717 __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
718 register_intc_controller(&intc_irq_desc); 718 register_intc_controller(&intc_irq_desc);
719 break; 719 break;
720 case IRQ_MODE_IRL7654: 720 case IRQ_MODE_IRL7654:
721 /* enable IRL7-4 but don't provide any masking */ 721 /* enable IRL7-4 but don't provide any masking */
722 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 722 __raw_writel(0x40000000, INTC_INTMSKCLR1);
723 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 723 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
724 break; 724 break;
725 case IRQ_MODE_IRL3210: 725 case IRQ_MODE_IRL3210:
726 /* enable IRL0-3 but don't provide any masking */ 726 /* enable IRL0-3 but don't provide any masking */
727 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 727 __raw_writel(0x80000000, INTC_INTMSKCLR1);
728 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 728 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
729 break; 729 break;
730 case IRQ_MODE_IRL7654_MASK: 730 case IRQ_MODE_IRL7654_MASK:
731 /* enable IRL7-4 and mask using cpu intc controller */ 731 /* enable IRL7-4 and mask using cpu intc controller */
732 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 732 __raw_writel(0x40000000, INTC_INTMSKCLR1);
733 register_intc_controller(&intc_irl7654_desc); 733 register_intc_controller(&intc_irl7654_desc);
734 break; 734 break;
735 case IRQ_MODE_IRL3210_MASK: 735 case IRQ_MODE_IRL3210_MASK:
736 /* enable IRL0-3 and mask using cpu intc controller */ 736 /* enable IRL0-3 and mask using cpu intc controller */
737 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 737 __raw_writel(0x80000000, INTC_INTMSKCLR1);
738 register_intc_controller(&intc_irl3210_desc); 738 register_intc_controller(&intc_irl3210_desc);
739 break; 739 break;
740 default: 740 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index c310558490d5..f8f21618d785 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -461,17 +461,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
461void __init plat_irq_setup(void) 461void __init plat_irq_setup(void)
462{ 462{
463 /* disable IRQ7-0 */ 463 /* disable IRQ7-0 */
464 ctrl_outl(0xff000000, INTC_INTMSK0); 464 __raw_writel(0xff000000, INTC_INTMSK0);
465 465
466 /* disable IRL3-0 + IRL7-4 */ 466 /* disable IRL3-0 + IRL7-4 */
467 ctrl_outl(0xc0000000, INTC_INTMSK1); 467 __raw_writel(0xc0000000, INTC_INTMSK1);
468 ctrl_outl(0xfffefffe, INTC_INTMSK2); 468 __raw_writel(0xfffefffe, INTC_INTMSK2);
469 469
470 /* select IRL mode for IRL3-0 + IRL7-4 */ 470 /* select IRL mode for IRL3-0 + IRL7-4 */
471 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 471 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
472 472
473 /* disable holding function, ie enable "SH-4 Mode" */ 473 /* disable holding function, ie enable "SH-4 Mode" */
474 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0); 474 __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
475 475
476 register_intc_controller(&intc_desc); 476 register_intc_controller(&intc_desc);
477} 477}
@@ -481,27 +481,27 @@ void __init plat_irq_setup_pins(int mode)
481 switch (mode) { 481 switch (mode) {
482 case IRQ_MODE_IRQ: 482 case IRQ_MODE_IRQ:
483 /* select IRQ mode for IRL3-0 + IRL7-4 */ 483 /* select IRQ mode for IRL3-0 + IRL7-4 */
484 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0); 484 __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
485 register_intc_controller(&intc_irq_desc); 485 register_intc_controller(&intc_irq_desc);
486 break; 486 break;
487 case IRQ_MODE_IRL7654: 487 case IRQ_MODE_IRL7654:
488 /* enable IRL7-4 but don't provide any masking */ 488 /* enable IRL7-4 but don't provide any masking */
489 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 489 __raw_writel(0x40000000, INTC_INTMSKCLR1);
490 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 490 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
491 break; 491 break;
492 case IRQ_MODE_IRL3210: 492 case IRQ_MODE_IRL3210:
493 /* enable IRL0-3 but don't provide any masking */ 493 /* enable IRL0-3 but don't provide any masking */
494 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 494 __raw_writel(0x80000000, INTC_INTMSKCLR1);
495 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 495 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
496 break; 496 break;
497 case IRQ_MODE_IRL7654_MASK: 497 case IRQ_MODE_IRL7654_MASK:
498 /* enable IRL7-4 and mask using cpu intc controller */ 498 /* enable IRL7-4 and mask using cpu intc controller */
499 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 499 __raw_writel(0x40000000, INTC_INTMSKCLR1);
500 register_intc_controller(&intc_irl7654_desc); 500 register_intc_controller(&intc_irl7654_desc);
501 break; 501 break;
502 case IRQ_MODE_IRL3210_MASK: 502 case IRQ_MODE_IRL3210_MASK:
503 /* enable IRL0-3 and mask using cpu intc controller */ 503 /* enable IRL0-3 and mask using cpu intc controller */
504 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 504 __raw_writel(0x80000000, INTC_INTMSKCLR1);
505 register_intc_controller(&intc_irl3210_desc); 505 register_intc_controller(&intc_irl3210_desc);
506 break; 506 break;
507 default: 507 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index f685b9b21999..23448d8c6711 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -541,17 +541,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567,
541void __init plat_irq_setup(void) 541void __init plat_irq_setup(void)
542{ 542{
543 /* disable IRQ3-0 + IRQ7-4 */ 543 /* disable IRQ3-0 + IRQ7-4 */
544 ctrl_outl(0xff000000, INTC_INTMSK0); 544 __raw_writel(0xff000000, INTC_INTMSK0);
545 545
546 /* disable IRL3-0 + IRL7-4 */ 546 /* disable IRL3-0 + IRL7-4 */
547 ctrl_outl(0xc0000000, INTC_INTMSK1); 547 __raw_writel(0xc0000000, INTC_INTMSK1);
548 ctrl_outl(0xfffefffe, INTC_INTMSK2); 548 __raw_writel(0xfffefffe, INTC_INTMSK2);
549 549
550 /* select IRL mode for IRL3-0 + IRL7-4 */ 550 /* select IRL mode for IRL3-0 + IRL7-4 */
551 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 551 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
552 552
553 /* disable holding function, ie enable "SH-4 Mode" */ 553 /* disable holding function, ie enable "SH-4 Mode" */
554 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0); 554 __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
555 555
556 register_intc_controller(&intc_desc); 556 register_intc_controller(&intc_desc);
557} 557}
@@ -561,32 +561,32 @@ void __init plat_irq_setup_pins(int mode)
561 switch (mode) { 561 switch (mode) {
562 case IRQ_MODE_IRQ7654: 562 case IRQ_MODE_IRQ7654:
563 /* select IRQ mode for IRL7-4 */ 563 /* select IRQ mode for IRL7-4 */
564 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0); 564 __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
565 register_intc_controller(&intc_desc_irq4567); 565 register_intc_controller(&intc_desc_irq4567);
566 break; 566 break;
567 case IRQ_MODE_IRQ3210: 567 case IRQ_MODE_IRQ3210:
568 /* select IRQ mode for IRL3-0 */ 568 /* select IRQ mode for IRL3-0 */
569 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0); 569 __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
570 register_intc_controller(&intc_desc_irq0123); 570 register_intc_controller(&intc_desc_irq0123);
571 break; 571 break;
572 case IRQ_MODE_IRL7654: 572 case IRQ_MODE_IRL7654:
573 /* enable IRL7-4 but don't provide any masking */ 573 /* enable IRL7-4 but don't provide any masking */
574 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 574 __raw_writel(0x40000000, INTC_INTMSKCLR1);
575 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 575 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
576 break; 576 break;
577 case IRQ_MODE_IRL3210: 577 case IRQ_MODE_IRL3210:
578 /* enable IRL0-3 but don't provide any masking */ 578 /* enable IRL0-3 but don't provide any masking */
579 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 579 __raw_writel(0x80000000, INTC_INTMSKCLR1);
580 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 580 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
581 break; 581 break;
582 case IRQ_MODE_IRL7654_MASK: 582 case IRQ_MODE_IRL7654_MASK:
583 /* enable IRL7-4 and mask using cpu intc controller */ 583 /* enable IRL7-4 and mask using cpu intc controller */
584 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 584 __raw_writel(0x40000000, INTC_INTMSKCLR1);
585 register_intc_controller(&intc_desc_irl4567); 585 register_intc_controller(&intc_desc_irl4567);
586 break; 586 break;
587 case IRQ_MODE_IRL3210_MASK: 587 case IRQ_MODE_IRL3210_MASK:
588 /* enable IRL0-3 and mask using cpu intc controller */ 588 /* enable IRL0-3 and mask using cpu intc controller */
589 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 589 __raw_writel(0x80000000, INTC_INTMSKCLR1);
590 register_intc_controller(&intc_desc_irl0123); 590 register_intc_controller(&intc_desc_irl0123);
591 break; 591 break;
592 default: 592 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 71673487ace0..7e585320710a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -867,14 +867,14 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567,
867void __init plat_irq_setup(void) 867void __init plat_irq_setup(void)
868{ 868{
869 /* disable IRQ3-0 + IRQ7-4 */ 869 /* disable IRQ3-0 + IRQ7-4 */
870 ctrl_outl(0xff000000, INTC_INTMSK0); 870 __raw_writel(0xff000000, INTC_INTMSK0);
871 871
872 /* disable IRL3-0 + IRL7-4 */ 872 /* disable IRL3-0 + IRL7-4 */
873 ctrl_outl(0xc0000000, INTC_INTMSK1); 873 __raw_writel(0xc0000000, INTC_INTMSK1);
874 ctrl_outl(0xfffefffe, INTC_INTMSK2); 874 __raw_writel(0xfffefffe, INTC_INTMSK2);
875 875
876 /* select IRL mode for IRL3-0 + IRL7-4 */ 876 /* select IRL mode for IRL3-0 + IRL7-4 */
877 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 877 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
878 878
879 register_intc_controller(&intc_desc); 879 register_intc_controller(&intc_desc);
880} 880}
@@ -884,32 +884,32 @@ void __init plat_irq_setup_pins(int mode)
884 switch (mode) { 884 switch (mode) {
885 case IRQ_MODE_IRQ7654: 885 case IRQ_MODE_IRQ7654:
886 /* select IRQ mode for IRL7-4 */ 886 /* select IRQ mode for IRL7-4 */
887 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0); 887 __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
888 register_intc_controller(&intc_desc_irq4567); 888 register_intc_controller(&intc_desc_irq4567);
889 break; 889 break;
890 case IRQ_MODE_IRQ3210: 890 case IRQ_MODE_IRQ3210:
891 /* select IRQ mode for IRL3-0 */ 891 /* select IRQ mode for IRL3-0 */
892 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0); 892 __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
893 register_intc_controller(&intc_desc_irq0123); 893 register_intc_controller(&intc_desc_irq0123);
894 break; 894 break;
895 case IRQ_MODE_IRL7654: 895 case IRQ_MODE_IRL7654:
896 /* enable IRL7-4 but don't provide any masking */ 896 /* enable IRL7-4 but don't provide any masking */
897 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 897 __raw_writel(0x40000000, INTC_INTMSKCLR1);
898 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 898 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
899 break; 899 break;
900 case IRQ_MODE_IRL3210: 900 case IRQ_MODE_IRL3210:
901 /* enable IRL0-3 but don't provide any masking */ 901 /* enable IRL0-3 but don't provide any masking */
902 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 902 __raw_writel(0x80000000, INTC_INTMSKCLR1);
903 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 903 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
904 break; 904 break;
905 case IRQ_MODE_IRL7654_MASK: 905 case IRQ_MODE_IRL7654_MASK:
906 /* enable IRL7-4 and mask using cpu intc controller */ 906 /* enable IRL7-4 and mask using cpu intc controller */
907 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 907 __raw_writel(0x40000000, INTC_INTMSKCLR1);
908 register_intc_controller(&intc_desc_irl4567); 908 register_intc_controller(&intc_desc_irl4567);
909 break; 909 break;
910 case IRQ_MODE_IRL3210_MASK: 910 case IRQ_MODE_IRL3210_MASK:
911 /* enable IRL0-3 and mask using cpu intc controller */ 911 /* enable IRL0-3 and mask using cpu intc controller */
912 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 912 __raw_writel(0x80000000, INTC_INTMSKCLR1);
913 register_intc_controller(&intc_desc_irl0123); 913 register_intc_controller(&intc_desc_irl0123);
914 break; 914 break;
915 default: 915 default:
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
index 5863e0c4d02f..11bf4c1e25c0 100644
--- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -78,7 +78,10 @@ void __init plat_prepare_cpus(unsigned int max_cpus)
78 78
79void plat_start_cpu(unsigned int cpu, unsigned long entry_point) 79void plat_start_cpu(unsigned int cpu, unsigned long entry_point)
80{ 80{
81 __raw_writel(entry_point, RESET_REG(cpu)); 81 if (__in_29bit_mode())
82 __raw_writel(entry_point, RESET_REG(cpu));
83 else
84 __raw_writel(virt_to_phys(entry_point), RESET_REG(cpu));
82 85
83 if (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP)) 86 if (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP))
84 __raw_writel(STBCR_MSTP, STBCR_REG(cpu)); 87 __raw_writel(STBCR_MSTP, STBCR_REG(cpu));
diff --git a/arch/sh/kernel/cpu/sh4a/ubc.c b/arch/sh/kernel/cpu/sh4a/ubc.c
new file mode 100644
index 000000000000..efb2745bcb36
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/ubc.c
@@ -0,0 +1,133 @@
1/*
2 * arch/sh/kernel/cpu/sh4a/ubc.c
3 *
4 * On-chip UBC support for SH-4A CPUs.
5 *
6 * Copyright (C) 2009 - 2010 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/err.h>
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <asm/hw_breakpoint.h>
17
18#define UBC_CBR(idx) (0xff200000 + (0x20 * idx))
19#define UBC_CRR(idx) (0xff200004 + (0x20 * idx))
20#define UBC_CAR(idx) (0xff200008 + (0x20 * idx))
21#define UBC_CAMR(idx) (0xff20000c + (0x20 * idx))
22
23#define UBC_CCMFR 0xff200600
24#define UBC_CBCR 0xff200620
25
26/* CRR */
27#define UBC_CRR_PCB (1 << 1)
28#define UBC_CRR_BIE (1 << 0)
29
30/* CBR */
31#define UBC_CBR_CE (1 << 0)
32
33static struct sh_ubc sh4a_ubc;
34
35static void sh4a_ubc_enable(struct arch_hw_breakpoint *info, int idx)
36{
37 __raw_writel(UBC_CBR_CE | info->len | info->type, UBC_CBR(idx));
38 __raw_writel(info->address, UBC_CAR(idx));
39}
40
41static void sh4a_ubc_disable(struct arch_hw_breakpoint *info, int idx)
42{
43 __raw_writel(0, UBC_CBR(idx));
44 __raw_writel(0, UBC_CAR(idx));
45}
46
47static void sh4a_ubc_enable_all(unsigned long mask)
48{
49 int i;
50
51 for (i = 0; i < sh4a_ubc.num_events; i++)
52 if (mask & (1 << i))
53 __raw_writel(__raw_readl(UBC_CBR(i)) | UBC_CBR_CE,
54 UBC_CBR(i));
55}
56
57static void sh4a_ubc_disable_all(void)
58{
59 int i;
60
61 for (i = 0; i < sh4a_ubc.num_events; i++)
62 __raw_writel(__raw_readl(UBC_CBR(i)) & ~UBC_CBR_CE,
63 UBC_CBR(i));
64}
65
66static unsigned long sh4a_ubc_active_mask(void)
67{
68 unsigned long active = 0;
69 int i;
70
71 for (i = 0; i < sh4a_ubc.num_events; i++)
72 if (__raw_readl(UBC_CBR(i)) & UBC_CBR_CE)
73 active |= (1 << i);
74
75 return active;
76}
77
78static unsigned long sh4a_ubc_triggered_mask(void)
79{
80 return __raw_readl(UBC_CCMFR);
81}
82
83static void sh4a_ubc_clear_triggered_mask(unsigned long mask)
84{
85 __raw_writel(__raw_readl(UBC_CCMFR) & ~mask, UBC_CCMFR);
86}
87
88static struct sh_ubc sh4a_ubc = {
89 .name = "SH-4A",
90 .num_events = 2,
91 .trap_nr = 0x1e0,
92 .enable = sh4a_ubc_enable,
93 .disable = sh4a_ubc_disable,
94 .enable_all = sh4a_ubc_enable_all,
95 .disable_all = sh4a_ubc_disable_all,
96 .active_mask = sh4a_ubc_active_mask,
97 .triggered_mask = sh4a_ubc_triggered_mask,
98 .clear_triggered_mask = sh4a_ubc_clear_triggered_mask,
99};
100
101static int __init sh4a_ubc_init(void)
102{
103 struct clk *ubc_iclk = clk_get(NULL, "ubc0");
104 int i;
105
106 /*
107 * The UBC MSTP bit is optional, as not all platforms will have
108 * it. Just ignore it if we can't find it.
109 */
110 if (IS_ERR(ubc_iclk))
111 ubc_iclk = NULL;
112
113 clk_enable(ubc_iclk);
114
115 __raw_writel(0, UBC_CBCR);
116
117 for (i = 0; i < sh4a_ubc.num_events; i++) {
118 __raw_writel(0, UBC_CAMR(i));
119 __raw_writel(0, UBC_CBR(i));
120
121 __raw_writel(UBC_CRR_BIE | UBC_CRR_PCB, UBC_CRR(i));
122
123 /* dummy read for write posting */
124 (void)__raw_readl(UBC_CRR(i));
125 }
126
127 clk_disable(ubc_iclk);
128
129 sh4a_ubc.clk = ubc_iclk;
130
131 return register_sh_ubc(&sh4a_ubc);
132}
133arch_initcall(sh4a_ubc_init);
diff --git a/arch/sh/kernel/cpu/sh5/clock-sh5.c b/arch/sh/kernel/cpu/sh5/clock-sh5.c
index 7f864ebc51d3..9cfc19b8dbe4 100644
--- a/arch/sh/kernel/cpu/sh5/clock-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/clock-sh5.c
@@ -24,7 +24,7 @@ static unsigned long cprc_base;
24 24
25static void master_clk_init(struct clk *clk) 25static void master_clk_init(struct clk *clk)
26{ 26{
27 int idx = (ctrl_inl(cprc_base + 0x00) >> 6) & 0x0007; 27 int idx = (__raw_readl(cprc_base + 0x00) >> 6) & 0x0007;
28 clk->rate *= ifc_table[idx]; 28 clk->rate *= ifc_table[idx];
29} 29}
30 30
@@ -34,7 +34,7 @@ static struct clk_ops sh5_master_clk_ops = {
34 34
35static unsigned long module_clk_recalc(struct clk *clk) 35static unsigned long module_clk_recalc(struct clk *clk)
36{ 36{
37 int idx = (ctrl_inw(cprc_base) >> 12) & 0x0007; 37 int idx = (__raw_readw(cprc_base) >> 12) & 0x0007;
38 return clk->parent->rate / ifc_table[idx]; 38 return clk->parent->rate / ifc_table[idx];
39} 39}
40 40
@@ -44,7 +44,7 @@ static struct clk_ops sh5_module_clk_ops = {
44 44
45static unsigned long bus_clk_recalc(struct clk *clk) 45static unsigned long bus_clk_recalc(struct clk *clk)
46{ 46{
47 int idx = (ctrl_inw(cprc_base) >> 3) & 0x0007; 47 int idx = (__raw_readw(cprc_base) >> 3) & 0x0007;
48 return clk->parent->rate / ifc_table[idx]; 48 return clk->parent->rate / ifc_table[idx];
49} 49}
50 50
@@ -54,7 +54,7 @@ static struct clk_ops sh5_bus_clk_ops = {
54 54
55static unsigned long cpu_clk_recalc(struct clk *clk) 55static unsigned long cpu_clk_recalc(struct clk *clk)
56{ 56{
57 int idx = (ctrl_inw(cprc_base) & 0x0007); 57 int idx = (__raw_readw(cprc_base) & 0x0007);
58 return clk->parent->rate / ifc_table[idx]; 58 return clk->parent->rate / ifc_table[idx];
59} 59}
60 60
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index 8f13f73cb2cb..6b80295dd7a4 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -187,7 +187,7 @@ trap_jtable:
187 .rept 6 187 .rept 6
188 .long do_exception_error /* 0x880 - 0x920 */ 188 .long do_exception_error /* 0x880 - 0x920 */
189 .endr 189 .endr
190 .long do_software_break_point /* 0x940 */ 190 .long breakpoint_trap_handler /* 0x940 */
191 .long do_exception_error /* 0x960 */ 191 .long do_exception_error /* 0x960 */
192 .long do_single_step /* 0x980 */ 192 .long do_single_step /* 0x980 */
193 193
@@ -1124,7 +1124,7 @@ fpu_error_or_IRQA:
1124 pta its_IRQ, tr0 1124 pta its_IRQ, tr0
1125 beqi/l r4, EVENT_INTERRUPT, tr0 1125 beqi/l r4, EVENT_INTERRUPT, tr0
1126#ifdef CONFIG_SH_FPU 1126#ifdef CONFIG_SH_FPU
1127 movi do_fpu_state_restore, r6 1127 movi fpu_state_restore_trap_handler, r6
1128#else 1128#else
1129 movi do_exception_error, r6 1129 movi do_exception_error, r6
1130#endif 1130#endif
@@ -1135,7 +1135,7 @@ fpu_error_or_IRQB:
1135 pta its_IRQ, tr0 1135 pta its_IRQ, tr0
1136 beqi/l r4, EVENT_INTERRUPT, tr0 1136 beqi/l r4, EVENT_INTERRUPT, tr0
1137#ifdef CONFIG_SH_FPU 1137#ifdef CONFIG_SH_FPU
1138 movi do_fpu_state_restore, r6 1138 movi fpu_state_restore_trap_handler, r6
1139#else 1139#else
1140 movi do_exception_error, r6 1140 movi do_exception_error, r6
1141#endif 1141#endif
diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c
index 4648ccee6c4d..4b3bb35e99f3 100644
--- a/arch/sh/kernel/cpu/sh5/fpu.c
+++ b/arch/sh/kernel/cpu/sh5/fpu.c
@@ -15,24 +15,6 @@
15#include <linux/sched.h> 15#include <linux/sched.h>
16#include <linux/signal.h> 16#include <linux/signal.h>
17#include <asm/processor.h> 17#include <asm/processor.h>
18#include <asm/user.h>
19#include <asm/io.h>
20#include <asm/fpu.h>
21
22/*
23 * Initially load the FPU with signalling NANS. This bit pattern
24 * has the property that no matter whether considered as single or as
25 * double precision, it still represents a signalling NAN.
26 */
27#define sNAN64 0xFFFFFFFFFFFFFFFFULL
28#define sNAN32 0xFFFFFFFFUL
29
30static union sh_fpu_union init_fpuregs = {
31 .hard = {
32 .fp_regs = { [0 ... 63] = sNAN32 },
33 .fpscr = FPSCR_INIT
34 }
35};
36 18
37void save_fpu(struct task_struct *tsk) 19void save_fpu(struct task_struct *tsk)
38{ 20{
@@ -72,12 +54,11 @@ void save_fpu(struct task_struct *tsk)
72 "fgetscr fr63\n\t" 54 "fgetscr fr63\n\t"
73 "fst.s %0, (32*8), fr63\n\t" 55 "fst.s %0, (32*8), fr63\n\t"
74 : /* no output */ 56 : /* no output */
75 : "r" (&tsk->thread.fpu.hard) 57 : "r" (&tsk->thread.xstate->hardfpu)
76 : "memory"); 58 : "memory");
77} 59}
78 60
79static inline void 61void restore_fpu(struct task_struct *tsk)
80fpload(struct sh_fpu_hard_struct *fpregs)
81{ 62{
82 asm volatile("fld.p %0, (0*8), fp0\n\t" 63 asm volatile("fld.p %0, (0*8), fp0\n\t"
83 "fld.p %0, (1*8), fp2\n\t" 64 "fld.p %0, (1*8), fp2\n\t"
@@ -116,16 +97,11 @@ fpload(struct sh_fpu_hard_struct *fpregs)
116 97
117 "fld.p %0, (31*8), fp62\n\t" 98 "fld.p %0, (31*8), fp62\n\t"
118 : /* no output */ 99 : /* no output */
119 : "r" (fpregs) ); 100 : "r" (&tsk->thread.xstate->hardfpu)
120} 101 : "memory");
121
122void fpinit(struct sh_fpu_hard_struct *fpregs)
123{
124 *fpregs = init_fpuregs.hard;
125} 102}
126 103
127asmlinkage void 104asmlinkage void do_fpu_error(unsigned long ex, struct pt_regs *regs)
128do_fpu_error(unsigned long ex, struct pt_regs *regs)
129{ 105{
130 struct task_struct *tsk = current; 106 struct task_struct *tsk = current;
131 107
@@ -133,35 +109,6 @@ do_fpu_error(unsigned long ex, struct pt_regs *regs)
133 109
134 tsk->thread.trap_no = 11; 110 tsk->thread.trap_no = 11;
135 tsk->thread.error_code = 0; 111 tsk->thread.error_code = 0;
136 force_sig(SIGFPE, tsk);
137}
138
139
140asmlinkage void
141do_fpu_state_restore(unsigned long ex, struct pt_regs *regs)
142{
143 void die(const char *str, struct pt_regs *regs, long err);
144
145 if (! user_mode(regs))
146 die("FPU used in kernel", regs, ex);
147 112
148 regs->sr &= ~SR_FD; 113 force_sig(SIGFPE, tsk);
149
150 if (last_task_used_math == current)
151 return;
152
153 enable_fpu();
154 if (last_task_used_math != NULL)
155 /* Other processes fpu state, save away */
156 save_fpu(last_task_used_math);
157
158 last_task_used_math = current;
159 if (used_math()) {
160 fpload(&current->thread.fpu.hard);
161 } else {
162 /* First time FPU user. */
163 fpload(&init_fpuregs.hard);
164 set_used_math();
165 }
166 disable_fpu();
167} 114}
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
index ca029a44743c..e55968712706 100644
--- a/arch/sh/kernel/cpu/shmobile/pm.c
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -33,7 +33,8 @@ ATOMIC_NOTIFIER_HEAD(sh_mobile_post_sleep_notifier_list);
33#define SUSP_MODE_SLEEP (SUSP_SH_SLEEP) 33#define SUSP_MODE_SLEEP (SUSP_SH_SLEEP)
34#define SUSP_MODE_SLEEP_SF (SUSP_SH_SLEEP | SUSP_SH_SF) 34#define SUSP_MODE_SLEEP_SF (SUSP_SH_SLEEP | SUSP_SH_SF)
35#define SUSP_MODE_STANDBY_SF (SUSP_SH_STANDBY | SUSP_SH_SF) 35#define SUSP_MODE_STANDBY_SF (SUSP_SH_STANDBY | SUSP_SH_SF)
36#define SUSP_MODE_RSTANDBY (SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_SF) 36#define SUSP_MODE_RSTANDBY_SF \
37 (SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_REGS | SUSP_SH_SF)
37 /* 38 /*
38 * U-standby mode is unsupported since it needs bootloader hacks 39 * U-standby mode is unsupported since it needs bootloader hacks
39 */ 40 */
diff --git a/arch/sh/kernel/cpu/shmobile/sleep.S b/arch/sh/kernel/cpu/shmobile/sleep.S
index e9dd7fa0abd2..e6aac65f5750 100644
--- a/arch/sh/kernel/cpu/shmobile/sleep.S
+++ b/arch/sh/kernel/cpu/shmobile/sleep.S
@@ -48,8 +48,48 @@ ENTRY(sh_mobile_sleep_enter_start)
48 stc sr, r0 48 stc sr, r0
49 mov.l r0, @(SH_SLEEP_SR, r5) 49 mov.l r0, @(SH_SLEEP_SR, r5)
50 50
51 /* save sp */ 51 /* save general purpose registers to stack if needed */
52 mov.l @(SH_SLEEP_MODE, r5), r0
53 tst #SUSP_SH_REGS, r0
54 bt skip_regs_save
55
56 sts.l pr, @-r15
57 mov.l r14, @-r15
58 mov.l r13, @-r15
59 mov.l r12, @-r15
60 mov.l r11, @-r15
61 mov.l r10, @-r15
62 mov.l r9, @-r15
63 mov.l r8, @-r15
64
65 /* make sure bank0 is selected, save low registers */
66 mov.l rb_bit, r9
67 not r9, r9
68 bsr set_sr
69 mov #0, r10
70
71 bsr save_low_regs
72 nop
73
74 /* switch to bank 1, save low registers */
75 mov.l rb_bit, r10
76 bsr set_sr
77 mov #-1, r9
78
79 bsr save_low_regs
80 nop
81
82 /* switch back to bank 0 */
83 mov.l rb_bit, r9
84 not r9, r9
85 bsr set_sr
86 mov #0, r10
87
88skip_regs_save:
89
90 /* save sp, also set to internal ram */
52 mov.l r15, @(SH_SLEEP_SP, r5) 91 mov.l r15, @(SH_SLEEP_SP, r5)
92 mov r5, r15
53 93
54 /* save stbcr */ 94 /* save stbcr */
55 bsr save_register 95 bsr save_register
@@ -60,7 +100,7 @@ ENTRY(sh_mobile_sleep_enter_start)
60 tst #SUSP_SH_MMU, r0 100 tst #SUSP_SH_MMU, r0
61 bt skip_mmu_save_disable 101 bt skip_mmu_save_disable
62 102
63 /* save mmu state */ 103 /* save mmu state */
64 bsr save_register 104 bsr save_register
65 mov #SH_SLEEP_REG_PTEH, r0 105 mov #SH_SLEEP_REG_PTEH, r0
66 106
@@ -177,6 +217,29 @@ get_register:
177 mov.l @(r0, r5), r0 217 mov.l @(r0, r5), r0
178 rts 218 rts
179 nop 219 nop
220
221set_sr:
222 stc sr, r8
223 and r9, r8
224 or r10, r8
225 ldc r8, sr
226 rts
227 nop
228
229save_low_regs:
230 mov.l r7, @-r15
231 mov.l r6, @-r15
232 mov.l r5, @-r15
233 mov.l r4, @-r15
234 mov.l r3, @-r15
235 mov.l r2, @-r15
236 mov.l r1, @-r15
237 rts
238 mov.l r0, @-r15
239
240 .balign 4
241rb_bit: .long 0x20000000 ! RB=1
242
180ENTRY(sh_mobile_sleep_enter_end) 243ENTRY(sh_mobile_sleep_enter_end)
181 244
182 .balign 4 245 .balign 4
@@ -270,6 +333,40 @@ skip_restore_sf:
270 icbi @r0 333 icbi @r0
271 334
272skip_restore_mmu: 335skip_restore_mmu:
336
337 /* restore general purpose registers if needed */
338 mov.l @(SH_SLEEP_MODE, r5), r0
339 tst #SUSP_SH_REGS, r0
340 bt skip_restore_regs
341
342 /* switch to bank 1, restore low registers */
343 mov.l _rb_bit, r10
344 bsr _set_sr
345 mov #-1, r9
346
347 bsr restore_low_regs
348 nop
349
350 /* switch to bank0, restore low registers */
351 mov.l _rb_bit, r9
352 not r9, r9
353 bsr _set_sr
354 mov #0, r10
355
356 bsr restore_low_regs
357 nop
358
359 /* restore the rest of the registers */
360 mov.l @r15+, r8
361 mov.l @r15+, r9
362 mov.l @r15+, r10
363 mov.l @r15+, r11
364 mov.l @r15+, r12
365 mov.l @r15+, r13
366 mov.l @r15+, r14
367 lds.l @r15+, pr
368
369skip_restore_regs:
273 rte 370 rte
274 nop 371 nop
275 372
@@ -283,6 +380,26 @@ restore_register:
283 rts 380 rts
284 nop 381 nop
285 382
383_set_sr:
384 stc sr, r8
385 and r9, r8
386 or r10, r8
387 ldc r8, sr
388 rts
389 nop
390
391restore_low_regs:
392 mov.l @r15+, r0
393 mov.l @r15+, r1
394 mov.l @r15+, r2
395 mov.l @r15+, r3
396 mov.l @r15+, r4
397 mov.l @r15+, r5
398 mov.l @r15+, r6
399 rts
400 mov.l @r15+, r7
401
286 .balign 4 402 .balign 4
403_rb_bit: .long 0x20000000 ! RB=1
2871: .long ~0x7ff 4041: .long ~0x7ff
288ENTRY(sh_mobile_sleep_resume_end) 405ENTRY(sh_mobile_sleep_resume_end)
diff --git a/arch/sh/kernel/debugtraps.S b/arch/sh/kernel/debugtraps.S
index 591741383ee6..7a1b46fec0f4 100644
--- a/arch/sh/kernel/debugtraps.S
+++ b/arch/sh/kernel/debugtraps.S
@@ -13,7 +13,6 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14 14
15#if !defined(CONFIG_KGDB) 15#if !defined(CONFIG_KGDB)
16#define breakpoint_trap_handler debug_trap_handler
17#define singlestep_trap_handler debug_trap_handler 16#define singlestep_trap_handler debug_trap_handler
18#endif 17#endif
19 18
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c
index e51168064e56..bd1c497280a6 100644
--- a/arch/sh/kernel/dwarf.c
+++ b/arch/sh/kernel/dwarf.c
@@ -39,10 +39,10 @@ static mempool_t *dwarf_frame_pool;
39static struct kmem_cache *dwarf_reg_cachep; 39static struct kmem_cache *dwarf_reg_cachep;
40static mempool_t *dwarf_reg_pool; 40static mempool_t *dwarf_reg_pool;
41 41
42static LIST_HEAD(dwarf_cie_list); 42static struct rb_root cie_root;
43static DEFINE_SPINLOCK(dwarf_cie_lock); 43static DEFINE_SPINLOCK(dwarf_cie_lock);
44 44
45static LIST_HEAD(dwarf_fde_list); 45static struct rb_root fde_root;
46static DEFINE_SPINLOCK(dwarf_fde_lock); 46static DEFINE_SPINLOCK(dwarf_fde_lock);
47 47
48static struct dwarf_cie *cached_cie; 48static struct dwarf_cie *cached_cie;
@@ -301,7 +301,8 @@ static inline int dwarf_entry_len(char *addr, unsigned long *len)
301 */ 301 */
302static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr) 302static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
303{ 303{
304 struct dwarf_cie *cie; 304 struct rb_node **rb_node = &cie_root.rb_node;
305 struct dwarf_cie *cie = NULL;
305 unsigned long flags; 306 unsigned long flags;
306 307
307 spin_lock_irqsave(&dwarf_cie_lock, flags); 308 spin_lock_irqsave(&dwarf_cie_lock, flags);
@@ -315,16 +316,24 @@ static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
315 goto out; 316 goto out;
316 } 317 }
317 318
318 list_for_each_entry(cie, &dwarf_cie_list, link) { 319 while (*rb_node) {
319 if (cie->cie_pointer == cie_ptr) { 320 struct dwarf_cie *cie_tmp;
320 cached_cie = cie; 321
321 break; 322 cie_tmp = rb_entry(*rb_node, struct dwarf_cie, node);
323 BUG_ON(!cie_tmp);
324
325 if (cie_ptr == cie_tmp->cie_pointer) {
326 cie = cie_tmp;
327 cached_cie = cie_tmp;
328 goto out;
329 } else {
330 if (cie_ptr < cie_tmp->cie_pointer)
331 rb_node = &(*rb_node)->rb_left;
332 else
333 rb_node = &(*rb_node)->rb_right;
322 } 334 }
323 } 335 }
324 336
325 /* Couldn't find the entry in the list. */
326 if (&cie->link == &dwarf_cie_list)
327 cie = NULL;
328out: 337out:
329 spin_unlock_irqrestore(&dwarf_cie_lock, flags); 338 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
330 return cie; 339 return cie;
@@ -336,25 +345,34 @@ out:
336 */ 345 */
337struct dwarf_fde *dwarf_lookup_fde(unsigned long pc) 346struct dwarf_fde *dwarf_lookup_fde(unsigned long pc)
338{ 347{
339 struct dwarf_fde *fde; 348 struct rb_node **rb_node = &fde_root.rb_node;
349 struct dwarf_fde *fde = NULL;
340 unsigned long flags; 350 unsigned long flags;
341 351
342 spin_lock_irqsave(&dwarf_fde_lock, flags); 352 spin_lock_irqsave(&dwarf_fde_lock, flags);
343 353
344 list_for_each_entry(fde, &dwarf_fde_list, link) { 354 while (*rb_node) {
345 unsigned long start, end; 355 struct dwarf_fde *fde_tmp;
356 unsigned long tmp_start, tmp_end;
346 357
347 start = fde->initial_location; 358 fde_tmp = rb_entry(*rb_node, struct dwarf_fde, node);
348 end = fde->initial_location + fde->address_range; 359 BUG_ON(!fde_tmp);
349 360
350 if (pc >= start && pc < end) 361 tmp_start = fde_tmp->initial_location;
351 break; 362 tmp_end = fde_tmp->initial_location + fde_tmp->address_range;
352 }
353 363
354 /* Couldn't find the entry in the list. */ 364 if (pc < tmp_start) {
355 if (&fde->link == &dwarf_fde_list) 365 rb_node = &(*rb_node)->rb_left;
356 fde = NULL; 366 } else {
367 if (pc < tmp_end) {
368 fde = fde_tmp;
369 goto out;
370 } else
371 rb_node = &(*rb_node)->rb_right;
372 }
373 }
357 374
375out:
358 spin_unlock_irqrestore(&dwarf_fde_lock, flags); 376 spin_unlock_irqrestore(&dwarf_fde_lock, flags);
359 377
360 return fde; 378 return fde;
@@ -552,8 +570,8 @@ extern void ret_from_irq(void);
552 * on the callstack. Each of the lower (older) stack frames are 570 * on the callstack. Each of the lower (older) stack frames are
553 * linked via the "prev" member. 571 * linked via the "prev" member.
554 */ 572 */
555struct dwarf_frame * dwarf_unwind_stack(unsigned long pc, 573struct dwarf_frame *dwarf_unwind_stack(unsigned long pc,
556 struct dwarf_frame *prev) 574 struct dwarf_frame *prev)
557{ 575{
558 struct dwarf_frame *frame; 576 struct dwarf_frame *frame;
559 struct dwarf_cie *cie; 577 struct dwarf_cie *cie;
@@ -708,6 +726,8 @@ bail:
708static int dwarf_parse_cie(void *entry, void *p, unsigned long len, 726static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
709 unsigned char *end, struct module *mod) 727 unsigned char *end, struct module *mod)
710{ 728{
729 struct rb_node **rb_node = &cie_root.rb_node;
730 struct rb_node *parent;
711 struct dwarf_cie *cie; 731 struct dwarf_cie *cie;
712 unsigned long flags; 732 unsigned long flags;
713 int count; 733 int count;
@@ -802,11 +822,30 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
802 cie->initial_instructions = p; 822 cie->initial_instructions = p;
803 cie->instructions_end = end; 823 cie->instructions_end = end;
804 824
805 cie->mod = mod;
806
807 /* Add to list */ 825 /* Add to list */
808 spin_lock_irqsave(&dwarf_cie_lock, flags); 826 spin_lock_irqsave(&dwarf_cie_lock, flags);
809 list_add_tail(&cie->link, &dwarf_cie_list); 827
828 while (*rb_node) {
829 struct dwarf_cie *cie_tmp;
830
831 cie_tmp = rb_entry(*rb_node, struct dwarf_cie, node);
832
833 parent = *rb_node;
834
835 if (cie->cie_pointer < cie_tmp->cie_pointer)
836 rb_node = &parent->rb_left;
837 else if (cie->cie_pointer >= cie_tmp->cie_pointer)
838 rb_node = &parent->rb_right;
839 else
840 WARN_ON(1);
841 }
842
843 rb_link_node(&cie->node, parent, rb_node);
844 rb_insert_color(&cie->node, &cie_root);
845
846 if (mod != NULL)
847 list_add_tail(&cie->link, &mod->arch.cie_list);
848
810 spin_unlock_irqrestore(&dwarf_cie_lock, flags); 849 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
811 850
812 return 0; 851 return 0;
@@ -816,6 +855,8 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
816 void *start, unsigned long len, 855 void *start, unsigned long len,
817 unsigned char *end, struct module *mod) 856 unsigned char *end, struct module *mod)
818{ 857{
858 struct rb_node **rb_node = &fde_root.rb_node;
859 struct rb_node *parent;
819 struct dwarf_fde *fde; 860 struct dwarf_fde *fde;
820 struct dwarf_cie *cie; 861 struct dwarf_cie *cie;
821 unsigned long flags; 862 unsigned long flags;
@@ -863,11 +904,38 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
863 fde->instructions = p; 904 fde->instructions = p;
864 fde->end = end; 905 fde->end = end;
865 906
866 fde->mod = mod;
867
868 /* Add to list. */ 907 /* Add to list. */
869 spin_lock_irqsave(&dwarf_fde_lock, flags); 908 spin_lock_irqsave(&dwarf_fde_lock, flags);
870 list_add_tail(&fde->link, &dwarf_fde_list); 909
910 while (*rb_node) {
911 struct dwarf_fde *fde_tmp;
912 unsigned long tmp_start, tmp_end;
913 unsigned long start, end;
914
915 fde_tmp = rb_entry(*rb_node, struct dwarf_fde, node);
916
917 start = fde->initial_location;
918 end = fde->initial_location + fde->address_range;
919
920 tmp_start = fde_tmp->initial_location;
921 tmp_end = fde_tmp->initial_location + fde_tmp->address_range;
922
923 parent = *rb_node;
924
925 if (start < tmp_start)
926 rb_node = &parent->rb_left;
927 else if (start >= tmp_end)
928 rb_node = &parent->rb_right;
929 else
930 WARN_ON(1);
931 }
932
933 rb_link_node(&fde->node, parent, rb_node);
934 rb_insert_color(&fde->node, &fde_root);
935
936 if (mod != NULL)
937 list_add_tail(&fde->link, &mod->arch.fde_list);
938
871 spin_unlock_irqrestore(&dwarf_fde_lock, flags); 939 spin_unlock_irqrestore(&dwarf_fde_lock, flags);
872 940
873 return 0; 941 return 0;
@@ -912,19 +980,29 @@ static struct unwinder dwarf_unwinder = {
912 980
913static void dwarf_unwinder_cleanup(void) 981static void dwarf_unwinder_cleanup(void)
914{ 982{
915 struct dwarf_cie *cie, *cie_tmp; 983 struct rb_node **fde_rb_node = &fde_root.rb_node;
916 struct dwarf_fde *fde, *fde_tmp; 984 struct rb_node **cie_rb_node = &cie_root.rb_node;
917 985
918 /* 986 /*
919 * Deallocate all the memory allocated for the DWARF unwinder. 987 * Deallocate all the memory allocated for the DWARF unwinder.
920 * Traverse all the FDE/CIE lists and remove and free all the 988 * Traverse all the FDE/CIE lists and remove and free all the
921 * memory associated with those data structures. 989 * memory associated with those data structures.
922 */ 990 */
923 list_for_each_entry_safe(cie, cie_tmp, &dwarf_cie_list, link) 991 while (*fde_rb_node) {
924 kfree(cie); 992 struct dwarf_fde *fde;
925 993
926 list_for_each_entry_safe(fde, fde_tmp, &dwarf_fde_list, link) 994 fde = rb_entry(*fde_rb_node, struct dwarf_fde, node);
995 rb_erase(*fde_rb_node, &fde_root);
927 kfree(fde); 996 kfree(fde);
997 }
998
999 while (*cie_rb_node) {
1000 struct dwarf_cie *cie;
1001
1002 cie = rb_entry(*cie_rb_node, struct dwarf_cie, node);
1003 rb_erase(*cie_rb_node, &cie_root);
1004 kfree(cie);
1005 }
928 1006
929 kmem_cache_destroy(dwarf_reg_cachep); 1007 kmem_cache_destroy(dwarf_reg_cachep);
930 kmem_cache_destroy(dwarf_frame_cachep); 1008 kmem_cache_destroy(dwarf_frame_cachep);
@@ -1024,6 +1102,8 @@ int module_dwarf_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
1024 1102
1025 /* Did we find the .eh_frame section? */ 1103 /* Did we find the .eh_frame section? */
1026 if (i != hdr->e_shnum) { 1104 if (i != hdr->e_shnum) {
1105 INIT_LIST_HEAD(&me->arch.cie_list);
1106 INIT_LIST_HEAD(&me->arch.fde_list);
1027 err = dwarf_parse_section((char *)start, (char *)end, me); 1107 err = dwarf_parse_section((char *)start, (char *)end, me);
1028 if (err) { 1108 if (err) {
1029 printk(KERN_WARNING "%s: failed to parse DWARF info\n", 1109 printk(KERN_WARNING "%s: failed to parse DWARF info\n",
@@ -1044,38 +1124,26 @@ int module_dwarf_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
1044 */ 1124 */
1045void module_dwarf_cleanup(struct module *mod) 1125void module_dwarf_cleanup(struct module *mod)
1046{ 1126{
1047 struct dwarf_fde *fde; 1127 struct dwarf_fde *fde, *ftmp;
1048 struct dwarf_cie *cie; 1128 struct dwarf_cie *cie, *ctmp;
1049 unsigned long flags; 1129 unsigned long flags;
1050 1130
1051 spin_lock_irqsave(&dwarf_cie_lock, flags); 1131 spin_lock_irqsave(&dwarf_cie_lock, flags);
1052 1132
1053again_cie: 1133 list_for_each_entry_safe(cie, ctmp, &mod->arch.cie_list, link) {
1054 list_for_each_entry(cie, &dwarf_cie_list, link) {
1055 if (cie->mod == mod)
1056 break;
1057 }
1058
1059 if (&cie->link != &dwarf_cie_list) {
1060 list_del(&cie->link); 1134 list_del(&cie->link);
1135 rb_erase(&cie->node, &cie_root);
1061 kfree(cie); 1136 kfree(cie);
1062 goto again_cie;
1063 } 1137 }
1064 1138
1065 spin_unlock_irqrestore(&dwarf_cie_lock, flags); 1139 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
1066 1140
1067 spin_lock_irqsave(&dwarf_fde_lock, flags); 1141 spin_lock_irqsave(&dwarf_fde_lock, flags);
1068 1142
1069again_fde: 1143 list_for_each_entry_safe(fde, ftmp, &mod->arch.fde_list, link) {
1070 list_for_each_entry(fde, &dwarf_fde_list, link) {
1071 if (fde->mod == mod)
1072 break;
1073 }
1074
1075 if (&fde->link != &dwarf_fde_list) {
1076 list_del(&fde->link); 1144 list_del(&fde->link);
1145 rb_erase(&fde->node, &fde_root);
1077 kfree(fde); 1146 kfree(fde);
1078 goto again_fde;
1079 } 1147 }
1080 1148
1081 spin_unlock_irqrestore(&dwarf_fde_lock, flags); 1149 spin_unlock_irqrestore(&dwarf_fde_lock, flags);
@@ -1094,8 +1162,6 @@ again_fde:
1094static int __init dwarf_unwinder_init(void) 1162static int __init dwarf_unwinder_init(void)
1095{ 1163{
1096 int err; 1164 int err;
1097 INIT_LIST_HEAD(&dwarf_cie_list);
1098 INIT_LIST_HEAD(&dwarf_fde_list);
1099 1165
1100 dwarf_frame_cachep = kmem_cache_create("dwarf_frames", 1166 dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
1101 sizeof(struct dwarf_frame), 0, 1167 sizeof(struct dwarf_frame), 0,
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
deleted file mode 100644
index f8bb50c6e050..000000000000
--- a/arch/sh/kernel/early_printk.c
+++ /dev/null
@@ -1,85 +0,0 @@
1/*
2 * arch/sh/kernel/early_printk.c
3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002 M. R. Brown
6 * Copyright (C) 2004 - 2007 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/console.h>
13#include <linux/tty.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/delay.h>
17
18#include <asm/sh_bios.h>
19
20/*
21 * Print a string through the BIOS
22 */
23static void sh_console_write(struct console *co, const char *s,
24 unsigned count)
25{
26 sh_bios_console_write(s, count);
27}
28
29/*
30 * Setup initial baud/bits/parity. We do two things here:
31 * - construct a cflag setting for the first rs_open()
32 * - initialize the serial port
33 * Return non-zero if we didn't find a serial port.
34 */
35static int __init sh_console_setup(struct console *co, char *options)
36{
37 int cflag = CREAD | HUPCL | CLOCAL;
38
39 /*
40 * Now construct a cflag setting.
41 * TODO: this is a totally bogus cflag, as we have
42 * no idea what serial settings the BIOS is using, or
43 * even if its using the serial port at all.
44 */
45 cflag |= B115200 | CS8 | /*no parity*/0;
46
47 co->cflag = cflag;
48
49 return 0;
50}
51
52static struct console bios_console = {
53 .name = "bios",
54 .write = sh_console_write,
55 .setup = sh_console_setup,
56 .flags = CON_PRINTBUFFER,
57 .index = -1,
58};
59
60static struct console *early_console;
61
62static int __init setup_early_printk(char *buf)
63{
64 int keep_early = 0;
65
66 if (!buf)
67 return 0;
68
69 if (strstr(buf, "keep"))
70 keep_early = 1;
71
72 if (!strncmp(buf, "bios", 4))
73 early_console = &bios_console;
74
75 if (likely(early_console)) {
76 if (keep_early)
77 early_console->flags &= ~CON_BOOT;
78 else
79 early_console->flags |= CON_BOOT;
80 register_console(early_console);
81 }
82
83 return 0;
84}
85early_param("earlyprintk", setup_early_printk);
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index 1151ecdffa71..fe0b743881b0 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -3,6 +3,7 @@
3 * arch/sh/kernel/head.S 3 * arch/sh/kernel/head.S
4 * 4 *
5 * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima 5 * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
6 * Copyright (C) 2010 Matt Fleming
6 * 7 *
7 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -13,6 +14,8 @@
13#include <linux/init.h> 14#include <linux/init.h>
14#include <linux/linkage.h> 15#include <linux/linkage.h>
15#include <asm/thread_info.h> 16#include <asm/thread_info.h>
17#include <asm/mmu.h>
18#include <cpu/mmu_context.h>
16 19
17#ifdef CONFIG_CPU_SH4A 20#ifdef CONFIG_CPU_SH4A
18#define SYNCO() synco 21#define SYNCO() synco
@@ -33,7 +36,7 @@ ENTRY(empty_zero_page)
33 .long 1 /* LOADER_TYPE */ 36 .long 1 /* LOADER_TYPE */
34 .long 0x00000000 /* INITRD_START */ 37 .long 0x00000000 /* INITRD_START */
35 .long 0x00000000 /* INITRD_SIZE */ 38 .long 0x00000000 /* INITRD_SIZE */
36#if defined(CONFIG_32BIT) && defined(CONFIG_PMB_FIXED) 39#ifdef CONFIG_32BIT
37 .long 0x53453f00 + 32 /* "SE?" = 32 bit */ 40 .long 0x53453f00 + 32 /* "SE?" = 32 bit */
38#else 41#else
39 .long 0x53453f00 + 29 /* "SE?" = 29 bit */ 42 .long 0x53453f00 + 29 /* "SE?" = 29 bit */
@@ -82,6 +85,209 @@ ENTRY(_stext)
82 ldc r0, r7_bank ! ... and initial thread_info 85 ldc r0, r7_bank ! ... and initial thread_info
83#endif 86#endif
84 87
88#ifdef CONFIG_PMB
89/*
90 * Reconfigure the initial PMB mappings setup by the hardware.
91 *
92 * When we boot in 32-bit MMU mode there are 2 PMB entries already
93 * setup for us.
94 *
95 * Entry VPN PPN V SZ C UB WT
96 * ---------------------------------------------------------------
97 * 0 0x80000000 0x00000000 1 512MB 1 0 1
98 * 1 0xA0000000 0x00000000 1 512MB 0 0 0
99 *
100 * But we reprogram them here because we want complete control over
101 * our address space and the initial mappings may not map PAGE_OFFSET
102 * to __MEMORY_START (or even map all of our RAM).
103 *
104 * Once we've setup cached and uncached mappings we clear the rest of the
105 * PMB entries. This clearing also deals with the fact that PMB entries
106 * can persist across reboots. The PMB could have been left in any state
107 * when the reboot occurred, so to be safe we clear all entries and start
108 * with with a clean slate.
109 *
110 * The uncached mapping is constructed using the smallest possible
111 * mapping with a single unbufferable page. Only the kernel text needs to
112 * be covered via the uncached mapping so that certain functions can be
113 * run uncached.
114 *
115 * Drivers and the like that have previously abused the 1:1 identity
116 * mapping are unsupported in 32-bit mode and must specify their caching
117 * preference when page tables are constructed.
118 *
119 * This frees up the P2 space for more nefarious purposes.
120 *
121 * Register utilization is as follows:
122 *
123 * r0 = PMB_DATA data field
124 * r1 = PMB_DATA address field
125 * r2 = PMB_ADDR data field
126 * r3 = PMB_ADDR address field
127 * r4 = PMB_E_SHIFT
128 * r5 = remaining amount of RAM to map
129 * r6 = PMB mapping size we're trying to use
130 * r7 = cached_to_uncached
131 * r8 = scratch register
132 * r9 = scratch register
133 * r10 = number of PMB entries we've setup
134 */
135
136 mov.l .LMMUCR, r1 /* Flush the TLB */
137 mov.l @r1, r0
138 or #MMUCR_TI, r0
139 mov.l r0, @r1
140
141 mov.l .LMEMORY_SIZE, r5
142
143 mov #PMB_E_SHIFT, r0
144 mov #0x1, r4
145 shld r0, r4
146
147 mov.l .LFIRST_DATA_ENTRY, r0
148 mov.l .LPMB_DATA, r1
149 mov.l .LFIRST_ADDR_ENTRY, r2
150 mov.l .LPMB_ADDR, r3
151
152 /*
153 * First we need to walk the PMB and figure out if there are any
154 * existing mappings that match the initial mappings VPN/PPN.
155 * If these have already been established by the bootloader, we
156 * don't bother setting up new entries here, and let the late PMB
157 * initialization take care of things instead.
158 *
159 * Note that we may need to coalesce and merge entries in order
160 * to reclaim more available PMB slots, which is much more than
161 * we want to do at this early stage.
162 */
163 mov #0, r10
164 mov #NR_PMB_ENTRIES, r9
165
166 mov r1, r7 /* temporary PMB_DATA iter */
167
168.Lvalidate_existing_mappings:
169
170 mov.l @r7, r8
171 and r0, r8
172 cmp/eq r0, r8 /* Check for valid __MEMORY_START mappings */
173 bt .Lpmb_done
174
175 add #1, r10 /* Increment the loop counter */
176 cmp/eq r9, r10
177 bf/s .Lvalidate_existing_mappings
178 add r4, r7 /* Increment to the next PMB_DATA entry */
179
180 /*
181 * If we've fallen through, continue with setting up the initial
182 * mappings.
183 */
184
185 mov r5, r7 /* cached_to_uncached */
186 mov #0, r10
187
188#ifdef CONFIG_UNCACHED_MAPPING
189 /*
190 * Uncached mapping
191 */
192 mov #(PMB_SZ_16M >> 2), r9
193 shll2 r9
194
195 mov #(PMB_UB >> 8), r8
196 shll8 r8
197
198 or r0, r8
199 or r9, r8
200 mov.l r8, @r1
201 mov r2, r8
202 add r7, r8
203 mov.l r8, @r3
204
205 add r4, r1
206 add r4, r3
207 add #1, r10
208#endif
209
210/*
211 * Iterate over all of the available sizes from largest to
212 * smallest for constructing the cached mapping.
213 */
214#define __PMB_ITER_BY_SIZE(size) \
215.L##size: \
216 mov #(size >> 4), r6; \
217 shll16 r6; \
218 shll8 r6; \
219 \
220 cmp/hi r5, r6; \
221 bt 9999f; \
222 \
223 mov #(PMB_SZ_##size##M >> 2), r9; \
224 shll2 r9; \
225 \
226 /* \
227 * Cached mapping \
228 */ \
229 mov #PMB_C, r8; \
230 or r0, r8; \
231 or r9, r8; \
232 mov.l r8, @r1; \
233 mov.l r2, @r3; \
234 \
235 /* Increment to the next PMB_DATA entry */ \
236 add r4, r1; \
237 /* Increment to the next PMB_ADDR entry */ \
238 add r4, r3; \
239 /* Increment number of PMB entries */ \
240 add #1, r10; \
241 \
242 sub r6, r5; \
243 add r6, r0; \
244 add r6, r2; \
245 \
246 bra .L##size; \
2479999:
248
249 __PMB_ITER_BY_SIZE(512)
250 __PMB_ITER_BY_SIZE(128)
251 __PMB_ITER_BY_SIZE(64)
252 __PMB_ITER_BY_SIZE(16)
253
254#ifdef CONFIG_UNCACHED_MAPPING
255 /*
256 * Now that we can access it, update cached_to_uncached and
257 * uncached_size.
258 */
259 mov.l .Lcached_to_uncached, r0
260 mov.l r7, @r0
261
262 mov.l .Luncached_size, r0
263 mov #1, r7
264 shll16 r7
265 shll8 r7
266 mov.l r7, @r0
267#endif
268
269 /*
270 * Clear the remaining PMB entries.
271 *
272 * r3 = entry to begin clearing from
273 * r10 = number of entries we've setup so far
274 */
275 mov #0, r1
276 mov #NR_PMB_ENTRIES, r0
277
278.Lagain:
279 mov.l r1, @r3 /* Clear PMB_ADDR entry */
280 add #1, r10 /* Increment the loop counter */
281 cmp/eq r0, r10
282 bf/s .Lagain
283 add r4, r3 /* Increment to the next PMB_ADDR entry */
284
285 mov.l 6f, r0
286 icbi @r0
287
288.Lpmb_done:
289#endif /* CONFIG_PMB */
290
85#ifndef CONFIG_SH_NO_BSS_INIT 291#ifndef CONFIG_SH_NO_BSS_INIT
86 /* 292 /*
87 * Don't clear BSS if running on slow platforms such as an RTL simulation, 293 * Don't clear BSS if running on slow platforms such as an RTL simulation,
@@ -131,3 +337,16 @@ ENTRY(stack_start)
1315: .long start_kernel 3375: .long start_kernel
1326: .long sh_cpu_init 3386: .long sh_cpu_init
1337: .long init_thread_union 3397: .long init_thread_union
340
341#ifdef CONFIG_PMB
342.LPMB_ADDR: .long PMB_ADDR
343.LPMB_DATA: .long PMB_DATA
344.LFIRST_ADDR_ENTRY: .long PAGE_OFFSET | PMB_V
345.LFIRST_DATA_ENTRY: .long __MEMORY_START | PMB_V
346.LMMUCR: .long MMUCR
347.LMEMORY_SIZE: .long __MEMORY_SIZE
348#ifdef CONFIG_UNCACHED_MAPPING
349.Lcached_to_uncached: .long cached_to_uncached
350.Luncached_size: .long uncached_size
351#endif
352#endif
diff --git a/arch/sh/kernel/head_64.S b/arch/sh/kernel/head_64.S
index 3ea765844c74..defd851abefa 100644
--- a/arch/sh/kernel/head_64.S
+++ b/arch/sh/kernel/head_64.S
@@ -220,7 +220,6 @@ clear_DTLB:
220 add.l r22, r63, r22 /* Sign extend */ 220 add.l r22, r63, r22 /* Sign extend */
221 putcfg r21, 0, r22 /* Set MMUDR[0].PTEH */ 221 putcfg r21, 0, r22 /* Set MMUDR[0].PTEH */
222 222
223#ifdef CONFIG_EARLY_PRINTK
224 /* 223 /*
225 * Setup a DTLB translation for SCIF phys. 224 * Setup a DTLB translation for SCIF phys.
226 */ 225 */
@@ -231,7 +230,6 @@ clear_DTLB:
231 movi 0xfa03, r22 /* 0xfa030000, fixed SCIF virt */ 230 movi 0xfa03, r22 /* 0xfa030000, fixed SCIF virt */
232 shori 0x0003, r22 231 shori 0x0003, r22
233 putcfg r21, 0, r22 /* PTEH last */ 232 putcfg r21, 0, r22 /* PTEH last */
234#endif
235 233
236 /* 234 /*
237 * Set cache behaviours. 235 * Set cache behaviours.
diff --git a/arch/sh/kernel/hw_breakpoint.c b/arch/sh/kernel/hw_breakpoint.c
new file mode 100644
index 000000000000..e2f1753d275c
--- /dev/null
+++ b/arch/sh/kernel/hw_breakpoint.c
@@ -0,0 +1,463 @@
1/*
2 * arch/sh/kernel/hw_breakpoint.c
3 *
4 * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
5 *
6 * Copyright (C) 2009 - 2010 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/perf_event.h>
14#include <linux/hw_breakpoint.h>
15#include <linux/percpu.h>
16#include <linux/kallsyms.h>
17#include <linux/notifier.h>
18#include <linux/kprobes.h>
19#include <linux/kdebug.h>
20#include <linux/io.h>
21#include <linux/clk.h>
22#include <asm/hw_breakpoint.h>
23#include <asm/mmu_context.h>
24#include <asm/ptrace.h>
25
26/*
27 * Stores the breakpoints currently in use on each breakpoint address
28 * register for each cpus
29 */
30static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
31
32/*
33 * A dummy placeholder for early accesses until the CPUs get a chance to
34 * register their UBCs later in the boot process.
35 */
36static struct sh_ubc ubc_dummy = { .num_events = 0 };
37
38static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy;
39
40/*
41 * Install a perf counter breakpoint.
42 *
43 * We seek a free UBC channel and use it for this breakpoint.
44 *
45 * Atomic: we hold the counter->ctx->lock and we only handle variables
46 * and registers local to this cpu.
47 */
48int arch_install_hw_breakpoint(struct perf_event *bp)
49{
50 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
51 int i;
52
53 for (i = 0; i < sh_ubc->num_events; i++) {
54 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
55
56 if (!*slot) {
57 *slot = bp;
58 break;
59 }
60 }
61
62 if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
63 return -EBUSY;
64
65 clk_enable(sh_ubc->clk);
66 sh_ubc->enable(info, i);
67
68 return 0;
69}
70
71/*
72 * Uninstall the breakpoint contained in the given counter.
73 *
74 * First we search the debug address register it uses and then we disable
75 * it.
76 *
77 * Atomic: we hold the counter->ctx->lock and we only handle variables
78 * and registers local to this cpu.
79 */
80void arch_uninstall_hw_breakpoint(struct perf_event *bp)
81{
82 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
83 int i;
84
85 for (i = 0; i < sh_ubc->num_events; i++) {
86 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
87
88 if (*slot == bp) {
89 *slot = NULL;
90 break;
91 }
92 }
93
94 if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
95 return;
96
97 sh_ubc->disable(info, i);
98 clk_disable(sh_ubc->clk);
99}
100
101static int get_hbp_len(u16 hbp_len)
102{
103 unsigned int len_in_bytes = 0;
104
105 switch (hbp_len) {
106 case SH_BREAKPOINT_LEN_1:
107 len_in_bytes = 1;
108 break;
109 case SH_BREAKPOINT_LEN_2:
110 len_in_bytes = 2;
111 break;
112 case SH_BREAKPOINT_LEN_4:
113 len_in_bytes = 4;
114 break;
115 case SH_BREAKPOINT_LEN_8:
116 len_in_bytes = 8;
117 break;
118 }
119 return len_in_bytes;
120}
121
122/*
123 * Check for virtual address in user space.
124 */
125int arch_check_va_in_userspace(unsigned long va, u16 hbp_len)
126{
127 unsigned int len;
128
129 len = get_hbp_len(hbp_len);
130
131 return (va <= TASK_SIZE - len);
132}
133
134/*
135 * Check for virtual address in kernel space.
136 */
137static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len)
138{
139 unsigned int len;
140
141 len = get_hbp_len(hbp_len);
142
143 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
144}
145
146/*
147 * Store a breakpoint's encoded address, length, and type.
148 */
149static int arch_store_info(struct perf_event *bp)
150{
151 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
152
153 /*
154 * User-space requests will always have the address field populated
155 * For kernel-addresses, either the address or symbol name can be
156 * specified.
157 */
158 if (info->name)
159 info->address = (unsigned long)kallsyms_lookup_name(info->name);
160 if (info->address)
161 return 0;
162
163 return -EINVAL;
164}
165
166int arch_bp_generic_fields(int sh_len, int sh_type,
167 int *gen_len, int *gen_type)
168{
169 /* Len */
170 switch (sh_len) {
171 case SH_BREAKPOINT_LEN_1:
172 *gen_len = HW_BREAKPOINT_LEN_1;
173 break;
174 case SH_BREAKPOINT_LEN_2:
175 *gen_len = HW_BREAKPOINT_LEN_2;
176 break;
177 case SH_BREAKPOINT_LEN_4:
178 *gen_len = HW_BREAKPOINT_LEN_4;
179 break;
180 case SH_BREAKPOINT_LEN_8:
181 *gen_len = HW_BREAKPOINT_LEN_8;
182 break;
183 default:
184 return -EINVAL;
185 }
186
187 /* Type */
188 switch (sh_type) {
189 case SH_BREAKPOINT_READ:
190 *gen_type = HW_BREAKPOINT_R;
191 case SH_BREAKPOINT_WRITE:
192 *gen_type = HW_BREAKPOINT_W;
193 break;
194 case SH_BREAKPOINT_RW:
195 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
196 break;
197 default:
198 return -EINVAL;
199 }
200
201 return 0;
202}
203
204static int arch_build_bp_info(struct perf_event *bp)
205{
206 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
207
208 info->address = bp->attr.bp_addr;
209
210 /* Len */
211 switch (bp->attr.bp_len) {
212 case HW_BREAKPOINT_LEN_1:
213 info->len = SH_BREAKPOINT_LEN_1;
214 break;
215 case HW_BREAKPOINT_LEN_2:
216 info->len = SH_BREAKPOINT_LEN_2;
217 break;
218 case HW_BREAKPOINT_LEN_4:
219 info->len = SH_BREAKPOINT_LEN_4;
220 break;
221 case HW_BREAKPOINT_LEN_8:
222 info->len = SH_BREAKPOINT_LEN_8;
223 break;
224 default:
225 return -EINVAL;
226 }
227
228 /* Type */
229 switch (bp->attr.bp_type) {
230 case HW_BREAKPOINT_R:
231 info->type = SH_BREAKPOINT_READ;
232 break;
233 case HW_BREAKPOINT_W:
234 info->type = SH_BREAKPOINT_WRITE;
235 break;
236 case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
237 info->type = SH_BREAKPOINT_RW;
238 break;
239 default:
240 return -EINVAL;
241 }
242
243 return 0;
244}
245
246/*
247 * Validate the arch-specific HW Breakpoint register settings
248 */
249int arch_validate_hwbkpt_settings(struct perf_event *bp,
250 struct task_struct *tsk)
251{
252 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
253 unsigned int align;
254 int ret;
255
256 ret = arch_build_bp_info(bp);
257 if (ret)
258 return ret;
259
260 ret = -EINVAL;
261
262 switch (info->len) {
263 case SH_BREAKPOINT_LEN_1:
264 align = 0;
265 break;
266 case SH_BREAKPOINT_LEN_2:
267 align = 1;
268 break;
269 case SH_BREAKPOINT_LEN_4:
270 align = 3;
271 break;
272 case SH_BREAKPOINT_LEN_8:
273 align = 7;
274 break;
275 default:
276 return ret;
277 }
278
279 ret = arch_store_info(bp);
280
281 if (ret < 0)
282 return ret;
283
284 /*
285 * Check that the low-order bits of the address are appropriate
286 * for the alignment implied by len.
287 */
288 if (info->address & align)
289 return -EINVAL;
290
291 /* Check that the virtual address is in the proper range */
292 if (tsk) {
293 if (!arch_check_va_in_userspace(info->address, info->len))
294 return -EFAULT;
295 } else {
296 if (!arch_check_va_in_kernelspace(info->address, info->len))
297 return -EFAULT;
298 }
299
300 return 0;
301}
302
303/*
304 * Release the user breakpoints used by ptrace
305 */
306void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
307{
308 int i;
309 struct thread_struct *t = &tsk->thread;
310
311 for (i = 0; i < sh_ubc->num_events; i++) {
312 unregister_hw_breakpoint(t->ptrace_bps[i]);
313 t->ptrace_bps[i] = NULL;
314 }
315}
316
317static int __kprobes hw_breakpoint_handler(struct die_args *args)
318{
319 int cpu, i, rc = NOTIFY_STOP;
320 struct perf_event *bp;
321 unsigned int cmf, resume_mask;
322
323 /*
324 * Do an early return if none of the channels triggered.
325 */
326 cmf = sh_ubc->triggered_mask();
327 if (unlikely(!cmf))
328 return NOTIFY_DONE;
329
330 /*
331 * By default, resume all of the active channels.
332 */
333 resume_mask = sh_ubc->active_mask();
334
335 /*
336 * Disable breakpoints during exception handling.
337 */
338 sh_ubc->disable_all();
339
340 cpu = get_cpu();
341 for (i = 0; i < sh_ubc->num_events; i++) {
342 unsigned long event_mask = (1 << i);
343
344 if (likely(!(cmf & event_mask)))
345 continue;
346
347 /*
348 * The counter may be concurrently released but that can only
349 * occur from a call_rcu() path. We can then safely fetch
350 * the breakpoint, use its callback, touch its counter
351 * while we are in an rcu_read_lock() path.
352 */
353 rcu_read_lock();
354
355 bp = per_cpu(bp_per_reg[i], cpu);
356 if (bp)
357 rc = NOTIFY_DONE;
358
359 /*
360 * Reset the condition match flag to denote completion of
361 * exception handling.
362 */
363 sh_ubc->clear_triggered_mask(event_mask);
364
365 /*
366 * bp can be NULL due to concurrent perf counter
367 * removing.
368 */
369 if (!bp) {
370 rcu_read_unlock();
371 break;
372 }
373
374 /*
375 * Don't restore the channel if the breakpoint is from
376 * ptrace, as it always operates in one-shot mode.
377 */
378 if (bp->overflow_handler == ptrace_triggered)
379 resume_mask &= ~(1 << i);
380
381 perf_bp_event(bp, args->regs);
382
383 /* Deliver the signal to userspace */
384 if (arch_check_va_in_userspace(bp->attr.bp_addr,
385 bp->attr.bp_len)) {
386 siginfo_t info;
387
388 info.si_signo = args->signr;
389 info.si_errno = notifier_to_errno(rc);
390 info.si_code = TRAP_HWBKPT;
391
392 force_sig_info(args->signr, &info, current);
393 }
394
395 rcu_read_unlock();
396 }
397
398 if (cmf == 0)
399 rc = NOTIFY_DONE;
400
401 sh_ubc->enable_all(resume_mask);
402
403 put_cpu();
404
405 return rc;
406}
407
408BUILD_TRAP_HANDLER(breakpoint)
409{
410 unsigned long ex = lookup_exception_vector();
411 TRAP_HANDLER_DECL;
412
413 notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP);
414}
415
416/*
417 * Handle debug exception notifications.
418 */
419int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused,
420 unsigned long val, void *data)
421{
422 struct die_args *args = data;
423
424 if (val != DIE_BREAKPOINT)
425 return NOTIFY_DONE;
426
427 /*
428 * If the breakpoint hasn't been triggered by the UBC, it's
429 * probably from a debugger, so don't do anything more here.
430 *
431 * This also permits the UBC interface clock to remain off for
432 * non-UBC breakpoints, as we don't need to check the triggered
433 * or active channel masks.
434 */
435 if (args->trapnr != sh_ubc->trap_nr)
436 return NOTIFY_DONE;
437
438 return hw_breakpoint_handler(data);
439}
440
441void hw_breakpoint_pmu_read(struct perf_event *bp)
442{
443 /* TODO */
444}
445
446void hw_breakpoint_pmu_unthrottle(struct perf_event *bp)
447{
448 /* TODO */
449}
450
451int register_sh_ubc(struct sh_ubc *ubc)
452{
453 /* Bail if it's already assigned */
454 if (sh_ubc != &ubc_dummy)
455 return -EBUSY;
456 sh_ubc = ubc;
457
458 pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name);
459
460 WARN_ON(ubc->num_events > HBP_NUM);
461
462 return 0;
463}
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 6b3d706deac1..0fd7b41f0a22 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -20,10 +20,9 @@
20#include <asm/system.h> 20#include <asm/system.h>
21#include <asm/atomic.h> 21#include <asm/atomic.h>
22 22
23static int hlt_counter;
24void (*pm_idle)(void) = NULL; 23void (*pm_idle)(void) = NULL;
25void (*pm_power_off)(void); 24
26EXPORT_SYMBOL(pm_power_off); 25static int hlt_counter;
27 26
28static int __init nohlt_setup(char *__unused) 27static int __init nohlt_setup(char *__unused)
29{ 28{
@@ -131,6 +130,15 @@ static void do_nothing(void *unused)
131{ 130{
132} 131}
133 132
133void stop_this_cpu(void *unused)
134{
135 local_irq_disable();
136 cpu_clear(smp_processor_id(), cpu_online_map);
137
138 for (;;)
139 cpu_sleep();
140}
141
134/* 142/*
135 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of 143 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
136 * pm_idle and update to new pm_idle value. Required while changing pm_idle 144 * pm_idle and update to new pm_idle value. Required while changing pm_idle
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c
index 69be603aa2d7..4a8bb4eeb8ad 100644
--- a/arch/sh/kernel/io_trapped.c
+++ b/arch/sh/kernel/io_trapped.c
@@ -184,31 +184,31 @@ static unsigned long long copy_word(unsigned long src_addr, int src_len,
184 184
185 switch (src_len) { 185 switch (src_len) {
186 case 1: 186 case 1:
187 tmp = ctrl_inb(src_addr); 187 tmp = __raw_readb(src_addr);
188 break; 188 break;
189 case 2: 189 case 2:
190 tmp = ctrl_inw(src_addr); 190 tmp = __raw_readw(src_addr);
191 break; 191 break;
192 case 4: 192 case 4:
193 tmp = ctrl_inl(src_addr); 193 tmp = __raw_readl(src_addr);
194 break; 194 break;
195 case 8: 195 case 8:
196 tmp = ctrl_inq(src_addr); 196 tmp = __raw_readq(src_addr);
197 break; 197 break;
198 } 198 }
199 199
200 switch (dst_len) { 200 switch (dst_len) {
201 case 1: 201 case 1:
202 ctrl_outb(tmp, dst_addr); 202 __raw_writeb(tmp, dst_addr);
203 break; 203 break;
204 case 2: 204 case 2:
205 ctrl_outw(tmp, dst_addr); 205 __raw_writew(tmp, dst_addr);
206 break; 206 break;
207 case 4: 207 case 4:
208 ctrl_outl(tmp, dst_addr); 208 __raw_writel(tmp, dst_addr);
209 break; 209 break;
210 case 8: 210 case 8:
211 ctrl_outq(tmp, dst_addr); 211 __raw_writeq(tmp, dst_addr);
212 break; 212 break;
213 } 213 }
214 214
@@ -271,6 +271,8 @@ int handle_trapped_io(struct pt_regs *regs, unsigned long address)
271 insn_size_t instruction; 271 insn_size_t instruction;
272 int tmp; 272 int tmp;
273 273
274 if (trapped_io_disable)
275 return 0;
274 if (!lookup_tiop(address)) 276 if (!lookup_tiop(address))
275 return 0; 277 return 0;
276 278
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c
index 3e532d0d4a5c..70c69659b846 100644
--- a/arch/sh/kernel/kgdb.c
+++ b/arch/sh/kernel/kgdb.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SuperH KGDB support 2 * SuperH KGDB support
3 * 3 *
4 * Copyright (C) 2008 Paul Mundt 4 * Copyright (C) 2008 - 2009 Paul Mundt
5 * 5 *
6 * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel. 6 * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel.
7 * 7 *
@@ -251,24 +251,60 @@ BUILD_TRAP_HANDLER(singlestep)
251 local_irq_restore(flags); 251 local_irq_restore(flags);
252} 252}
253 253
254static int __kgdb_notify(struct die_args *args, unsigned long cmd)
255{
256 int ret;
257
258 switch (cmd) {
259 case DIE_BREAKPOINT:
260 /*
261 * This means a user thread is single stepping
262 * a system call which should be ignored
263 */
264 if (test_thread_flag(TIF_SINGLESTEP))
265 return NOTIFY_DONE;
266
267 ret = kgdb_handle_exception(args->trapnr & 0xff, args->signr,
268 args->err, args->regs);
269 if (ret)
270 return NOTIFY_DONE;
271
272 break;
273 }
254 274
255BUILD_TRAP_HANDLER(breakpoint) 275 return NOTIFY_STOP;
276}
277
278static int
279kgdb_notify(struct notifier_block *self, unsigned long cmd, void *ptr)
256{ 280{
257 unsigned long flags; 281 unsigned long flags;
258 TRAP_HANDLER_DECL; 282 int ret;
259 283
260 local_irq_save(flags); 284 local_irq_save(flags);
261 kgdb_handle_exception(vec >> 2, SIGTRAP, 0, regs); 285 ret = __kgdb_notify(ptr, cmd);
262 local_irq_restore(flags); 286 local_irq_restore(flags);
287
288 return ret;
263} 289}
264 290
291static struct notifier_block kgdb_notifier = {
292 .notifier_call = kgdb_notify,
293
294 /*
295 * Lowest-prio notifier priority, we want to be notified last:
296 */
297 .priority = -INT_MAX,
298};
299
265int kgdb_arch_init(void) 300int kgdb_arch_init(void)
266{ 301{
267 return 0; 302 return register_die_notifier(&kgdb_notifier);
268} 303}
269 304
270void kgdb_arch_exit(void) 305void kgdb_arch_exit(void)
271{ 306{
307 unregister_die_notifier(&kgdb_notifier);
272} 308}
273 309
274struct kgdb_arch arch_kgdb_ops = { 310struct kgdb_arch arch_kgdb_ops = {
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index 76f280223ebd..7672141c841b 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -21,6 +21,8 @@
21#include <asm/mmu_context.h> 21#include <asm/mmu_context.h>
22#include <asm/io.h> 22#include <asm/io.h>
23#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
24#include <asm/sh_bios.h>
25#include <asm/reboot.h>
24 26
25typedef void (*relocate_new_kernel_t)(unsigned long indirection_page, 27typedef void (*relocate_new_kernel_t)(unsigned long indirection_page,
26 unsigned long reboot_code_buffer, 28 unsigned long reboot_code_buffer,
@@ -28,15 +30,11 @@ typedef void (*relocate_new_kernel_t)(unsigned long indirection_page,
28 30
29extern const unsigned char relocate_new_kernel[]; 31extern const unsigned char relocate_new_kernel[];
30extern const unsigned int relocate_new_kernel_size; 32extern const unsigned int relocate_new_kernel_size;
31extern void *gdb_vbr_vector;
32extern void *vbr_base; 33extern void *vbr_base;
33 34
34void machine_shutdown(void) 35void native_machine_crash_shutdown(struct pt_regs *regs)
35{
36}
37
38void machine_crash_shutdown(struct pt_regs *regs)
39{ 36{
37 /* Nothing to do for UP, but definitely broken for SMP.. */
40} 38}
41 39
42/* 40/*
@@ -117,11 +115,7 @@ void machine_kexec(struct kimage *image)
117 kexec_info(image); 115 kexec_info(image);
118 flush_cache_all(); 116 flush_cache_all();
119 117
120#if defined(CONFIG_SH_STANDARD_BIOS) 118 sh_bios_vbr_reload();
121 asm volatile("ldc %0, vbr" :
122 : "r" (((unsigned long) gdb_vbr_vector) - 0x100)
123 : "memory");
124#endif
125 119
126 /* now call it */ 120 /* now call it */
127 rnk = (relocate_new_kernel_t) reboot_code_buffer; 121 rnk = (relocate_new_kernel_t) reboot_code_buffer;
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
new file mode 100644
index 000000000000..81add9b9ea6e
--- /dev/null
+++ b/arch/sh/kernel/process.c
@@ -0,0 +1,100 @@
1#include <linux/mm.h>
2#include <linux/kernel.h>
3#include <linux/sched.h>
4
5struct kmem_cache *task_xstate_cachep = NULL;
6unsigned int xstate_size;
7
8int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
9{
10 *dst = *src;
11
12 if (src->thread.xstate) {
13 dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
14 GFP_KERNEL);
15 if (!dst->thread.xstate)
16 return -ENOMEM;
17 memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
18 }
19
20 return 0;
21}
22
23void free_thread_xstate(struct task_struct *tsk)
24{
25 if (tsk->thread.xstate) {
26 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
27 tsk->thread.xstate = NULL;
28 }
29}
30
31#if THREAD_SHIFT < PAGE_SHIFT
32static struct kmem_cache *thread_info_cache;
33
34struct thread_info *alloc_thread_info(struct task_struct *tsk)
35{
36 struct thread_info *ti;
37
38 ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
39 if (unlikely(ti == NULL))
40 return NULL;
41#ifdef CONFIG_DEBUG_STACK_USAGE
42 memset(ti, 0, THREAD_SIZE);
43#endif
44 return ti;
45}
46
47void free_thread_info(struct thread_info *ti)
48{
49 free_thread_xstate(ti->task);
50 kmem_cache_free(thread_info_cache, ti);
51}
52
53void thread_info_cache_init(void)
54{
55 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
56 THREAD_SIZE, SLAB_PANIC, NULL);
57}
58#else
59struct thread_info *alloc_thread_info(struct task_struct *tsk)
60{
61#ifdef CONFIG_DEBUG_STACK_USAGE
62 gfp_t mask = GFP_KERNEL | __GFP_ZERO;
63#else
64 gfp_t mask = GFP_KERNEL;
65#endif
66 return (struct thread_info *)__get_free_pages(mask, THREAD_SIZE_ORDER);
67}
68
69void free_thread_info(struct thread_info *ti)
70{
71 free_thread_xstate(ti->task);
72 free_pages((unsigned long)ti, THREAD_SIZE_ORDER);
73}
74#endif /* THREAD_SHIFT < PAGE_SHIFT */
75
76void arch_task_cache_init(void)
77{
78 if (!xstate_size)
79 return;
80
81 task_xstate_cachep = kmem_cache_create("task_xstate", xstate_size,
82 __alignof__(union thread_xstate),
83 SLAB_PANIC | SLAB_NOTRACK, NULL);
84}
85
86#ifdef CONFIG_SH_FPU_EMU
87# define HAVE_SOFTFP 1
88#else
89# define HAVE_SOFTFP 0
90#endif
91
92void init_thread_xstate(void)
93{
94 if (boot_cpu_data.flags & CPU_HAS_FPU)
95 xstate_size = sizeof(struct sh_fpu_hard_struct);
96 else if (HAVE_SOFTFP)
97 xstate_size = sizeof(struct sh_fpu_soft_struct);
98 else
99 xstate_size = 0;
100}
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index d8af889366a4..3cb88f114d7a 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -16,65 +16,15 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/elfcore.h> 18#include <linux/elfcore.h>
19#include <linux/pm.h>
20#include <linux/kallsyms.h> 19#include <linux/kallsyms.h>
21#include <linux/kexec.h>
22#include <linux/kdebug.h>
23#include <linux/tick.h>
24#include <linux/reboot.h>
25#include <linux/fs.h> 20#include <linux/fs.h>
26#include <linux/ftrace.h> 21#include <linux/ftrace.h>
27#include <linux/preempt.h> 22#include <linux/hw_breakpoint.h>
28#include <asm/uaccess.h> 23#include <asm/uaccess.h>
29#include <asm/mmu_context.h> 24#include <asm/mmu_context.h>
30#include <asm/pgalloc.h>
31#include <asm/system.h> 25#include <asm/system.h>
32#include <asm/ubc.h>
33#include <asm/fpu.h> 26#include <asm/fpu.h>
34#include <asm/syscalls.h> 27#include <asm/syscalls.h>
35#include <asm/watchdog.h>
36
37int ubc_usercnt = 0;
38
39#ifdef CONFIG_32BIT
40static void watchdog_trigger_immediate(void)
41{
42 sh_wdt_write_cnt(0xFF);
43 sh_wdt_write_csr(0xC2);
44}
45
46void machine_restart(char * __unused)
47{
48 local_irq_disable();
49
50 /* Use watchdog timer to trigger reset */
51 watchdog_trigger_immediate();
52
53 while (1)
54 cpu_sleep();
55}
56#else
57void machine_restart(char * __unused)
58{
59 /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */
60 asm volatile("ldc %0, sr\n\t"
61 "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001));
62}
63#endif
64
65void machine_halt(void)
66{
67 local_irq_disable();
68
69 while (1)
70 cpu_sleep();
71}
72
73void machine_power_off(void)
74{
75 if (pm_power_off)
76 pm_power_off();
77}
78 28
79void show_regs(struct pt_regs * regs) 29void show_regs(struct pt_regs * regs)
80{ 30{
@@ -91,7 +41,7 @@ void show_regs(struct pt_regs * regs)
91 printk("PC : %08lx SP : %08lx SR : %08lx ", 41 printk("PC : %08lx SP : %08lx SR : %08lx ",
92 regs->pc, regs->regs[15], regs->sr); 42 regs->pc, regs->regs[15], regs->sr);
93#ifdef CONFIG_MMU 43#ifdef CONFIG_MMU
94 printk("TEA : %08x\n", ctrl_inl(MMU_TEA)); 44 printk("TEA : %08x\n", __raw_readl(MMU_TEA));
95#else 45#else
96 printk("\n"); 46 printk("\n");
97#endif 47#endif
@@ -147,21 +97,34 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
147} 97}
148EXPORT_SYMBOL(kernel_thread); 98EXPORT_SYMBOL(kernel_thread);
149 99
100void start_thread(struct pt_regs *regs, unsigned long new_pc,
101 unsigned long new_sp)
102{
103 set_fs(USER_DS);
104
105 regs->pr = 0;
106 regs->sr = SR_FD;
107 regs->pc = new_pc;
108 regs->regs[15] = new_sp;
109
110 free_thread_xstate(current);
111}
112EXPORT_SYMBOL(start_thread);
113
150/* 114/*
151 * Free current thread data structures etc.. 115 * Free current thread data structures etc..
152 */ 116 */
153void exit_thread(void) 117void exit_thread(void)
154{ 118{
155 if (current->thread.ubc_pc) {
156 current->thread.ubc_pc = 0;
157 ubc_usercnt -= 1;
158 }
159} 119}
160 120
161void flush_thread(void) 121void flush_thread(void)
162{ 122{
163#if defined(CONFIG_SH_FPU)
164 struct task_struct *tsk = current; 123 struct task_struct *tsk = current;
124
125 flush_ptrace_hw_breakpoint(tsk);
126
127#if defined(CONFIG_SH_FPU)
165 /* Forget lazy FPU state */ 128 /* Forget lazy FPU state */
166 clear_fpu(tsk, task_pt_regs(tsk)); 129 clear_fpu(tsk, task_pt_regs(tsk));
167 clear_used_math(); 130 clear_used_math();
@@ -209,11 +172,10 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
209{ 172{
210 struct thread_info *ti = task_thread_info(p); 173 struct thread_info *ti = task_thread_info(p);
211 struct pt_regs *childregs; 174 struct pt_regs *childregs;
175
212#if defined(CONFIG_SH_DSP) 176#if defined(CONFIG_SH_DSP)
213 struct task_struct *tsk = current; 177 struct task_struct *tsk = current;
214#endif
215 178
216#if defined(CONFIG_SH_DSP)
217 if (is_dsp_enabled(tsk)) { 179 if (is_dsp_enabled(tsk)) {
218 /* We can use the __save_dsp or just copy the struct: 180 /* We can use the __save_dsp or just copy the struct:
219 * __save_dsp(p); 181 * __save_dsp(p);
@@ -244,53 +206,11 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
244 p->thread.sp = (unsigned long) childregs; 206 p->thread.sp = (unsigned long) childregs;
245 p->thread.pc = (unsigned long) ret_from_fork; 207 p->thread.pc = (unsigned long) ret_from_fork;
246 208
247 p->thread.ubc_pc = 0; 209 memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
248 210
249 return 0; 211 return 0;
250} 212}
251 213
252/* Tracing by user break controller. */
253static void ubc_set_tracing(int asid, unsigned long pc)
254{
255#if defined(CONFIG_CPU_SH4A)
256 unsigned long val;
257
258 val = (UBC_CBR_ID_INST | UBC_CBR_RW_READ | UBC_CBR_CE);
259 val |= (UBC_CBR_AIE | UBC_CBR_AIV_SET(asid));
260
261 ctrl_outl(val, UBC_CBR0);
262 ctrl_outl(pc, UBC_CAR0);
263 ctrl_outl(0x0, UBC_CAMR0);
264 ctrl_outl(0x0, UBC_CBCR);
265
266 val = (UBC_CRR_RES | UBC_CRR_PCB | UBC_CRR_BIE);
267 ctrl_outl(val, UBC_CRR0);
268
269 /* Read UBC register that we wrote last, for checking update */
270 val = ctrl_inl(UBC_CRR0);
271
272#else /* CONFIG_CPU_SH4A */
273 ctrl_outl(pc, UBC_BARA);
274
275#ifdef CONFIG_MMU
276 ctrl_outb(asid, UBC_BASRA);
277#endif
278
279 ctrl_outl(0, UBC_BAMRA);
280
281 if (current_cpu_data.type == CPU_SH7729 ||
282 current_cpu_data.type == CPU_SH7710 ||
283 current_cpu_data.type == CPU_SH7712 ||
284 current_cpu_data.type == CPU_SH7203){
285 ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA);
286 ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR);
287 } else {
288 ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA);
289 ctrl_outw(BRCR_PCBA, UBC_BRCR);
290 }
291#endif /* CONFIG_CPU_SH4A */
292}
293
294/* 214/*
295 * switch_to(x,y) should switch tasks from x to y. 215 * switch_to(x,y) should switch tasks from x to y.
296 * 216 *
@@ -304,7 +224,7 @@ __switch_to(struct task_struct *prev, struct task_struct *next)
304 224
305 /* we're going to use this soon, after a few expensive things */ 225 /* we're going to use this soon, after a few expensive things */
306 if (next->fpu_counter > 5) 226 if (next->fpu_counter > 5)
307 prefetch(&next_t->fpu.hard); 227 prefetch(next_t->xstate);
308 228
309#ifdef CONFIG_MMU 229#ifdef CONFIG_MMU
310 /* 230 /*
@@ -316,32 +236,13 @@ __switch_to(struct task_struct *prev, struct task_struct *next)
316 : "r" (task_thread_info(next))); 236 : "r" (task_thread_info(next)));
317#endif 237#endif
318 238
319 /* If no tasks are using the UBC, we're done */
320 if (ubc_usercnt == 0)
321 /* If no tasks are using the UBC, we're done */;
322 else if (next->thread.ubc_pc && next->mm) {
323 int asid = 0;
324#ifdef CONFIG_MMU
325 asid |= cpu_asid(smp_processor_id(), next->mm);
326#endif
327 ubc_set_tracing(asid, next->thread.ubc_pc);
328 } else {
329#if defined(CONFIG_CPU_SH4A)
330 ctrl_outl(UBC_CBR_INIT, UBC_CBR0);
331 ctrl_outl(UBC_CRR_INIT, UBC_CRR0);
332#else
333 ctrl_outw(0, UBC_BBRA);
334 ctrl_outw(0, UBC_BBRB);
335#endif
336 }
337
338 /* 239 /*
339 * If the task has used fpu the last 5 timeslices, just do a full 240 * If the task has used fpu the last 5 timeslices, just do a full
340 * restore of the math state immediately to avoid the trap; the 241 * restore of the math state immediately to avoid the trap; the
341 * chances of needing FPU soon are obviously high now 242 * chances of needing FPU soon are obviously high now
342 */ 243 */
343 if (next->fpu_counter > 5) 244 if (next->fpu_counter > 5)
344 fpu_state_restore(task_pt_regs(next)); 245 __fpu_state_restore();
345 246
346 return prev; 247 return prev;
347} 248}
@@ -434,20 +335,3 @@ unsigned long get_wchan(struct task_struct *p)
434 335
435 return pc; 336 return pc;
436} 337}
437
438asmlinkage void break_point_trap(void)
439{
440 /* Clear tracing. */
441#if defined(CONFIG_CPU_SH4A)
442 ctrl_outl(UBC_CBR_INIT, UBC_CBR0);
443 ctrl_outl(UBC_CRR_INIT, UBC_CRR0);
444#else
445 ctrl_outw(0, UBC_BBRA);
446 ctrl_outw(0, UBC_BBRB);
447 ctrl_outl(0, UBC_BRCR);
448#endif
449 current->thread.ubc_pc = 0;
450 ubc_usercnt -= 1;
451
452 force_sig(SIGTRAP, current);
453}
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index ec79faf6f021..c90957a459ac 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -32,30 +32,7 @@
32 32
33struct task_struct *last_task_used_math = NULL; 33struct task_struct *last_task_used_math = NULL;
34 34
35void machine_restart(char * __unused) 35void show_regs(struct pt_regs *regs)
36{
37 extern void phys_stext(void);
38
39 phys_stext();
40}
41
42void machine_halt(void)
43{
44 for (;;);
45}
46
47void machine_power_off(void)
48{
49 __asm__ __volatile__ (
50 "sleep\n\t"
51 "synci\n\t"
52 "nop;nop;nop;nop\n\t"
53 );
54
55 panic("Unexpected wakeup!\n");
56}
57
58void show_regs(struct pt_regs * regs)
59{ 36{
60 unsigned long long ah, al, bh, bl, ch, cl; 37 unsigned long long ah, al, bh, bl, ch, cl;
61 38
@@ -410,7 +387,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
410 regs->sr |= SR_FD; 387 regs->sr |= SR_FD;
411 } 388 }
412 389
413 memcpy(fpu, &tsk->thread.fpu.hard, sizeof(*fpu)); 390 memcpy(fpu, &tsk->thread.xstate->hardfpu, sizeof(*fpu));
414 } 391 }
415 392
416 return fpvalid; 393 return fpvalid;
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index 9be35f348093..c625cdab76dd 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -2,7 +2,7 @@
2 * SuperH process tracing 2 * SuperH process tracing
3 * 3 *
4 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka 4 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
5 * Copyright (C) 2002 - 2008 Paul Mundt 5 * Copyright (C) 2002 - 2009 Paul Mundt
6 * 6 *
7 * Audit support by Yuichi Nakamura <ynakam@hitachisoft.jp> 7 * Audit support by Yuichi Nakamura <ynakam@hitachisoft.jp>
8 * 8 *
@@ -26,6 +26,7 @@
26#include <linux/tracehook.h> 26#include <linux/tracehook.h>
27#include <linux/elf.h> 27#include <linux/elf.h>
28#include <linux/regset.h> 28#include <linux/regset.h>
29#include <linux/hw_breakpoint.h>
29#include <asm/uaccess.h> 30#include <asm/uaccess.h>
30#include <asm/pgtable.h> 31#include <asm/pgtable.h>
31#include <asm/system.h> 32#include <asm/system.h>
@@ -63,33 +64,64 @@ static inline int put_stack_long(struct task_struct *task, int offset,
63 return 0; 64 return 0;
64} 65}
65 66
66void user_enable_single_step(struct task_struct *child) 67void ptrace_triggered(struct perf_event *bp, int nmi,
68 struct perf_sample_data *data, struct pt_regs *regs)
67{ 69{
68 /* Next scheduling will set up UBC */ 70 struct perf_event_attr attr;
69 if (child->thread.ubc_pc == 0) 71
70 ubc_usercnt += 1; 72 /*
73 * Disable the breakpoint request here since ptrace has defined a
74 * one-shot behaviour for breakpoint exceptions.
75 */
76 attr = bp->attr;
77 attr.disabled = true;
78 modify_user_hw_breakpoint(bp, &attr);
79}
80
81static int set_single_step(struct task_struct *tsk, unsigned long addr)
82{
83 struct thread_struct *thread = &tsk->thread;
84 struct perf_event *bp;
85 struct perf_event_attr attr;
86
87 bp = thread->ptrace_bps[0];
88 if (!bp) {
89 hw_breakpoint_init(&attr);
90
91 attr.bp_addr = addr;
92 attr.bp_len = HW_BREAKPOINT_LEN_2;
93 attr.bp_type = HW_BREAKPOINT_R;
94
95 bp = register_user_hw_breakpoint(&attr, ptrace_triggered, tsk);
96 if (IS_ERR(bp))
97 return PTR_ERR(bp);
98
99 thread->ptrace_bps[0] = bp;
100 } else {
101 int err;
102
103 attr = bp->attr;
104 attr.bp_addr = addr;
105 err = modify_user_hw_breakpoint(bp, &attr);
106 if (unlikely(err))
107 return err;
108 }
109
110 return 0;
111}
71 112
72 child->thread.ubc_pc = get_stack_long(child, 113void user_enable_single_step(struct task_struct *child)
73 offsetof(struct pt_regs, pc)); 114{
115 unsigned long pc = get_stack_long(child, offsetof(struct pt_regs, pc));
74 116
75 set_tsk_thread_flag(child, TIF_SINGLESTEP); 117 set_tsk_thread_flag(child, TIF_SINGLESTEP);
118
119 set_single_step(child, pc);
76} 120}
77 121
78void user_disable_single_step(struct task_struct *child) 122void user_disable_single_step(struct task_struct *child)
79{ 123{
80 clear_tsk_thread_flag(child, TIF_SINGLESTEP); 124 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
81
82 /*
83 * Ensure the UBC is not programmed at the next context switch.
84 *
85 * Normally this is not needed but there are sequences such as
86 * singlestep, signal delivery, and continue that leave the
87 * ubc_pc non-zero leading to spurious SIGTRAPs.
88 */
89 if (child->thread.ubc_pc != 0) {
90 ubc_usercnt -= 1;
91 child->thread.ubc_pc = 0;
92 }
93} 125}
94 126
95/* 127/*
@@ -163,10 +195,10 @@ int fpregs_get(struct task_struct *target,
163 195
164 if ((boot_cpu_data.flags & CPU_HAS_FPU)) 196 if ((boot_cpu_data.flags & CPU_HAS_FPU))
165 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 197 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
166 &target->thread.fpu.hard, 0, -1); 198 &target->thread.xstate->hardfpu, 0, -1);
167 199
168 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 200 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
169 &target->thread.fpu.soft, 0, -1); 201 &target->thread.xstate->softfpu, 0, -1);
170} 202}
171 203
172static int fpregs_set(struct task_struct *target, 204static int fpregs_set(struct task_struct *target,
@@ -184,10 +216,10 @@ static int fpregs_set(struct task_struct *target,
184 216
185 if ((boot_cpu_data.flags & CPU_HAS_FPU)) 217 if ((boot_cpu_data.flags & CPU_HAS_FPU))
186 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 218 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
187 &target->thread.fpu.hard, 0, -1); 219 &target->thread.xstate->hardfpu, 0, -1);
188 220
189 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 221 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
190 &target->thread.fpu.soft, 0, -1); 222 &target->thread.xstate->softfpu, 0, -1);
191} 223}
192 224
193static int fpregs_active(struct task_struct *target, 225static int fpregs_active(struct task_struct *target,
@@ -333,7 +365,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
333 else 365 else
334 tmp = 0; 366 tmp = 0;
335 } else 367 } else
336 tmp = ((long *)&child->thread.fpu) 368 tmp = ((long *)child->thread.xstate)
337 [(addr - (long)&dummy->fpu) >> 2]; 369 [(addr - (long)&dummy->fpu) >> 2];
338 } else if (addr == (long) &dummy->u_fpvalid) 370 } else if (addr == (long) &dummy->u_fpvalid)
339 tmp = !!tsk_used_math(child); 371 tmp = !!tsk_used_math(child);
@@ -362,7 +394,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
362 else if (addr >= (long) &dummy->fpu && 394 else if (addr >= (long) &dummy->fpu &&
363 addr < (long) &dummy->u_fpvalid) { 395 addr < (long) &dummy->u_fpvalid) {
364 set_stopped_child_used_math(child); 396 set_stopped_child_used_math(child);
365 ((long *)&child->thread.fpu) 397 ((long *)child->thread.xstate)
366 [(addr - (long)&dummy->fpu) >> 2] = data; 398 [(addr - (long)&dummy->fpu) >> 2] = data;
367 ret = 0; 399 ret = 0;
368 } else if (addr == (long) &dummy->u_fpvalid) { 400 } else if (addr == (long) &dummy->u_fpvalid) {
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index b063eb8b18e3..5fd644da7f02 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -88,7 +88,7 @@ get_fpu_long(struct task_struct *task, unsigned long addr)
88 regs->sr |= SR_FD; 88 regs->sr |= SR_FD;
89 } 89 }
90 90
91 tmp = ((long *)&task->thread.fpu)[addr / sizeof(unsigned long)]; 91 tmp = ((long *)task->thread.xstate)[addr / sizeof(unsigned long)];
92 return tmp; 92 return tmp;
93} 93}
94 94
@@ -114,8 +114,7 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data)
114 regs = (struct pt_regs*)((unsigned char *)task + THREAD_SIZE) - 1; 114 regs = (struct pt_regs*)((unsigned char *)task + THREAD_SIZE) - 1;
115 115
116 if (!tsk_used_math(task)) { 116 if (!tsk_used_math(task)) {
117 fpinit(&task->thread.fpu.hard); 117 init_fpu(task);
118 set_stopped_child_used_math(task);
119 } else if (last_task_used_math == task) { 118 } else if (last_task_used_math == task) {
120 enable_fpu(); 119 enable_fpu();
121 save_fpu(task); 120 save_fpu(task);
@@ -124,7 +123,7 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data)
124 regs->sr |= SR_FD; 123 regs->sr |= SR_FD;
125 } 124 }
126 125
127 ((long *)&task->thread.fpu)[addr / sizeof(unsigned long)] = data; 126 ((long *)task->thread.xstate)[addr / sizeof(unsigned long)] = data;
128 return 0; 127 return 0;
129} 128}
130 129
@@ -226,7 +225,7 @@ int fpregs_get(struct task_struct *target,
226 return ret; 225 return ret;
227 226
228 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 227 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
229 &target->thread.fpu.hard, 0, -1); 228 &target->thread.xstate->hardfpu, 0, -1);
230} 229}
231 230
232static int fpregs_set(struct task_struct *target, 231static int fpregs_set(struct task_struct *target,
@@ -243,7 +242,7 @@ static int fpregs_set(struct task_struct *target,
243 set_stopped_child_used_math(target); 242 set_stopped_child_used_math(target);
244 243
245 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 244 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
246 &target->thread.fpu.hard, 0, -1); 245 &target->thread.xstate->hardfpu, 0, -1);
247} 246}
248 247
249static int fpregs_active(struct task_struct *target, 248static int fpregs_active(struct task_struct *target,
@@ -486,9 +485,10 @@ asmlinkage void do_single_step(unsigned long long vec, struct pt_regs *regs)
486} 485}
487 486
488/* Called with interrupts disabled */ 487/* Called with interrupts disabled */
489asmlinkage void do_software_break_point(unsigned long long vec, 488BUILD_TRAP_HANDLER(breakpoint)
490 struct pt_regs *regs)
491{ 489{
490 TRAP_HANDLER_DECL;
491
492 /* We need to forward step the PC, to counteract the backstep done 492 /* We need to forward step the PC, to counteract the backstep done
493 in signal.c. */ 493 in signal.c. */
494 local_irq_enable(); 494 local_irq_enable();
diff --git a/arch/sh/kernel/reboot.c b/arch/sh/kernel/reboot.c
new file mode 100644
index 000000000000..b1fca66bb92e
--- /dev/null
+++ b/arch/sh/kernel/reboot.c
@@ -0,0 +1,98 @@
1#include <linux/pm.h>
2#include <linux/kexec.h>
3#include <linux/kernel.h>
4#include <linux/reboot.h>
5#include <linux/module.h>
6#ifdef CONFIG_SUPERH32
7#include <asm/watchdog.h>
8#endif
9#include <asm/addrspace.h>
10#include <asm/reboot.h>
11#include <asm/system.h>
12
13void (*pm_power_off)(void);
14EXPORT_SYMBOL(pm_power_off);
15
16#ifdef CONFIG_SUPERH32
17static void watchdog_trigger_immediate(void)
18{
19 sh_wdt_write_cnt(0xFF);
20 sh_wdt_write_csr(0xC2);
21}
22#endif
23
24static void native_machine_restart(char * __unused)
25{
26 local_irq_disable();
27
28 /* Address error with SR.BL=1 first. */
29 trigger_address_error();
30
31#ifdef CONFIG_SUPERH32
32 /* If that fails or is unsupported, go for the watchdog next. */
33 watchdog_trigger_immediate();
34#endif
35
36 /*
37 * Give up and sleep.
38 */
39 while (1)
40 cpu_sleep();
41}
42
43static void native_machine_shutdown(void)
44{
45 smp_send_stop();
46}
47
48static void native_machine_power_off(void)
49{
50 if (pm_power_off)
51 pm_power_off();
52}
53
54static void native_machine_halt(void)
55{
56 /* stop other cpus */
57 machine_shutdown();
58
59 /* stop this cpu */
60 stop_this_cpu(NULL);
61}
62
63struct machine_ops machine_ops = {
64 .power_off = native_machine_power_off,
65 .shutdown = native_machine_shutdown,
66 .restart = native_machine_restart,
67 .halt = native_machine_halt,
68#ifdef CONFIG_KEXEC
69 .crash_shutdown = native_machine_crash_shutdown,
70#endif
71};
72
73void machine_power_off(void)
74{
75 machine_ops.power_off();
76}
77
78void machine_shutdown(void)
79{
80 machine_ops.shutdown();
81}
82
83void machine_restart(char *cmd)
84{
85 machine_ops.restart(cmd);
86}
87
88void machine_halt(void)
89{
90 machine_ops.halt();
91}
92
93#ifdef CONFIG_KEXEC
94void machine_crash_shutdown(struct pt_regs *regs)
95{
96 machine_ops.crash_shutdown(regs);
97}
98#endif
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 8b0e69792cf4..3459e70eed72 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -421,6 +421,8 @@ void __init setup_arch(char **cmdline_p)
421 421
422 parse_early_param(); 422 parse_early_param();
423 423
424 uncached_init();
425
424 plat_early_device_setup(); 426 plat_early_device_setup();
425 427
426 /* Let earlyprintk output early console messages */ 428 /* Let earlyprintk output early console messages */
@@ -449,17 +451,15 @@ void __init setup_arch(char **cmdline_p)
449#ifdef CONFIG_DUMMY_CONSOLE 451#ifdef CONFIG_DUMMY_CONSOLE
450 conswitchp = &dummy_con; 452 conswitchp = &dummy_con;
451#endif 453#endif
454 paging_init();
455 pmb_init();
456
457 ioremap_fixed_init();
452 458
453 /* Perform the machine specific initialisation */ 459 /* Perform the machine specific initialisation */
454 if (likely(sh_mv.mv_setup)) 460 if (likely(sh_mv.mv_setup))
455 sh_mv.mv_setup(cmdline_p); 461 sh_mv.mv_setup(cmdline_p);
456 462
457 paging_init();
458
459#ifdef CONFIG_PMB_ENABLE
460 pmb_init();
461#endif
462
463#ifdef CONFIG_SMP 463#ifdef CONFIG_SMP
464 plat_smp_setup(); 464 plat_smp_setup();
465#endif 465#endif
diff --git a/arch/sh/kernel/sh_bios.c b/arch/sh/kernel/sh_bios.c
index c852f7805728..47475cca068a 100644
--- a/arch/sh/kernel/sh_bios.c
+++ b/arch/sh/kernel/sh_bios.c
@@ -1,19 +1,30 @@
1/* 1/*
2 * linux/arch/sh/kernel/sh_bios.c
3 * C interface for trapping into the standard LinuxSH BIOS. 2 * C interface for trapping into the standard LinuxSH BIOS.
4 * 3 *
5 * Copyright (C) 2000 Greg Banks, Mitch Davis 4 * Copyright (C) 2000 Greg Banks, Mitch Davis
5 * Copyright (C) 1999, 2000 Niibe Yutaka
6 * Copyright (C) 2002 M. R. Brown
7 * Copyright (C) 2004 - 2010 Paul Mundt
6 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
7 */ 12 */
8#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/console.h>
15#include <linux/tty.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/delay.h>
9#include <asm/sh_bios.h> 19#include <asm/sh_bios.h>
10 20
11#define BIOS_CALL_CONSOLE_WRITE 0 21#define BIOS_CALL_CONSOLE_WRITE 0
12#define BIOS_CALL_ETH_NODE_ADDR 10 22#define BIOS_CALL_ETH_NODE_ADDR 10
13#define BIOS_CALL_SHUTDOWN 11 23#define BIOS_CALL_SHUTDOWN 11
14#define BIOS_CALL_CHAR_OUT 0x1f /* TODO: hack */
15#define BIOS_CALL_GDB_DETACH 0xff 24#define BIOS_CALL_GDB_DETACH 0xff
16 25
26void *gdb_vbr_vector = NULL;
27
17static inline long sh_bios_call(long func, long arg0, long arg1, long arg2, 28static inline long sh_bios_call(long func, long arg0, long arg1, long arg2,
18 long arg3) 29 long arg3)
19{ 30{
@@ -23,6 +34,9 @@ static inline long sh_bios_call(long func, long arg0, long arg1, long arg2,
23 register long r6 __asm__("r6") = arg2; 34 register long r6 __asm__("r6") = arg2;
24 register long r7 __asm__("r7") = arg3; 35 register long r7 __asm__("r7") = arg3;
25 36
37 if (!gdb_vbr_vector)
38 return -ENOSYS;
39
26 __asm__ __volatile__("trapa #0x3f":"=z"(r0) 40 __asm__ __volatile__("trapa #0x3f":"=z"(r0)
27 :"0"(r0), "r"(r4), "r"(r5), "r"(r6), "r"(r7) 41 :"0"(r0), "r"(r4), "r"(r5), "r"(r6), "r"(r7)
28 :"memory"); 42 :"memory");
@@ -34,11 +48,6 @@ void sh_bios_console_write(const char *buf, unsigned int len)
34 sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0); 48 sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0);
35} 49}
36 50
37void sh_bios_char_out(char ch)
38{
39 sh_bios_call(BIOS_CALL_CHAR_OUT, ch, 0, 0, 0);
40}
41
42void sh_bios_gdb_detach(void) 51void sh_bios_gdb_detach(void)
43{ 52{
44 sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0); 53 sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0);
@@ -55,3 +64,109 @@ void sh_bios_shutdown(unsigned int how)
55{ 64{
56 sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0); 65 sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0);
57} 66}
67
68/*
69 * Read the old value of the VBR register to initialise the vector
70 * through which debug and BIOS traps are delegated by the Linux trap
71 * handler.
72 */
73void sh_bios_vbr_init(void)
74{
75 unsigned long vbr;
76
77 if (unlikely(gdb_vbr_vector))
78 return;
79
80 __asm__ __volatile__ ("stc vbr, %0" : "=r" (vbr));
81
82 if (vbr) {
83 gdb_vbr_vector = (void *)(vbr + 0x100);
84 printk(KERN_NOTICE "Setting GDB trap vector to %p\n",
85 gdb_vbr_vector);
86 } else
87 printk(KERN_NOTICE "SH-BIOS not detected\n");
88}
89
90/**
91 * sh_bios_vbr_reload - Re-load the system VBR from the BIOS vector.
92 *
93 * This can be used by save/restore code to reinitialize the system VBR
94 * from the fixed BIOS VBR. A no-op if no BIOS VBR is known.
95 */
96void sh_bios_vbr_reload(void)
97{
98 if (gdb_vbr_vector)
99 __asm__ __volatile__ (
100 "ldc %0, vbr"
101 :
102 : "r" (((unsigned long) gdb_vbr_vector) - 0x100)
103 : "memory"
104 );
105}
106
107/*
108 * Print a string through the BIOS
109 */
110static void sh_console_write(struct console *co, const char *s,
111 unsigned count)
112{
113 sh_bios_console_write(s, count);
114}
115
116/*
117 * Setup initial baud/bits/parity. We do two things here:
118 * - construct a cflag setting for the first rs_open()
119 * - initialize the serial port
120 * Return non-zero if we didn't find a serial port.
121 */
122static int __init sh_console_setup(struct console *co, char *options)
123{
124 int cflag = CREAD | HUPCL | CLOCAL;
125
126 /*
127 * Now construct a cflag setting.
128 * TODO: this is a totally bogus cflag, as we have
129 * no idea what serial settings the BIOS is using, or
130 * even if its using the serial port at all.
131 */
132 cflag |= B115200 | CS8 | /*no parity*/0;
133
134 co->cflag = cflag;
135
136 return 0;
137}
138
139static struct console bios_console = {
140 .name = "bios",
141 .write = sh_console_write,
142 .setup = sh_console_setup,
143 .flags = CON_PRINTBUFFER,
144 .index = -1,
145};
146
147static struct console *early_console;
148
149static int __init setup_early_printk(char *buf)
150{
151 int keep_early = 0;
152
153 if (!buf)
154 return 0;
155
156 if (strstr(buf, "keep"))
157 keep_early = 1;
158
159 if (!strncmp(buf, "bios", 4))
160 early_console = &bios_console;
161
162 if (likely(early_console)) {
163 if (keep_early)
164 early_console->flags &= ~CON_BOOT;
165 else
166 early_console->flags |= CON_BOOT;
167 register_console(early_console);
168 }
169
170 return 0;
171}
172early_param("earlyprintk", setup_early_printk);
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index 12815ce01ecd..579cd2ca358d 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -150,7 +150,7 @@ static inline int restore_sigcontext_fpu(struct sigcontext __user *sc)
150 return 0; 150 return 0;
151 151
152 set_used_math(); 152 set_used_math();
153 return __copy_from_user(&tsk->thread.fpu.hard, &sc->sc_fpregs[0], 153 return __copy_from_user(&tsk->thread.xstate->hardfpu, &sc->sc_fpregs[0],
154 sizeof(long)*(16*2+2)); 154 sizeof(long)*(16*2+2));
155} 155}
156 156
@@ -175,7 +175,7 @@ static inline int save_sigcontext_fpu(struct sigcontext __user *sc,
175 clear_used_math(); 175 clear_used_math();
176 176
177 unlazy_fpu(tsk, regs); 177 unlazy_fpu(tsk, regs);
178 return __copy_to_user(&sc->sc_fpregs[0], &tsk->thread.fpu.hard, 178 return __copy_to_user(&sc->sc_fpregs[0], &tsk->thread.xstate->hardfpu,
179 sizeof(long)*(16*2+2)); 179 sizeof(long)*(16*2+2));
180} 180}
181#endif /* CONFIG_SH_FPU */ 181#endif /* CONFIG_SH_FPU */
@@ -528,7 +528,7 @@ handle_syscall_restart(unsigned long save_r0, struct pt_regs *regs,
528 /* fallthrough */ 528 /* fallthrough */
529 case -ERESTARTNOINTR: 529 case -ERESTARTNOINTR:
530 regs->regs[0] = save_r0; 530 regs->regs[0] = save_r0;
531 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); 531 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
532 break; 532 break;
533 } 533 }
534} 534}
@@ -626,9 +626,9 @@ no_signal:
626 regs->regs[0] == -ERESTARTSYS || 626 regs->regs[0] == -ERESTARTSYS ||
627 regs->regs[0] == -ERESTARTNOINTR) { 627 regs->regs[0] == -ERESTARTNOINTR) {
628 regs->regs[0] = save_r0; 628 regs->regs[0] = save_r0;
629 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); 629 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
630 } else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) { 630 } else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) {
631 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); 631 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
632 regs->regs[3] = __NR_restart_syscall; 632 regs->regs[3] = __NR_restart_syscall;
633 } 633 }
634 } 634 }
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index 580e97d46ca5..5a9f1f10ebf4 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -297,7 +297,7 @@ restore_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
297 regs->sr |= SR_FD; 297 regs->sr |= SR_FD;
298 } 298 }
299 299
300 err |= __copy_from_user(&current->thread.fpu.hard, &sc->sc_fpregs[0], 300 err |= __copy_from_user(&current->thread.xstate->hardfpu, &sc->sc_fpregs[0],
301 (sizeof(long long) * 32) + (sizeof(int) * 1)); 301 (sizeof(long long) * 32) + (sizeof(int) * 1));
302 302
303 return err; 303 return err;
@@ -322,7 +322,7 @@ setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
322 regs->sr |= SR_FD; 322 regs->sr |= SR_FD;
323 } 323 }
324 324
325 err |= __copy_to_user(&sc->sc_fpregs[0], &current->thread.fpu.hard, 325 err |= __copy_to_user(&sc->sc_fpregs[0], &current->thread.xstate->hardfpu,
326 (sizeof(long long) * 32) + (sizeof(int) * 1)); 326 (sizeof(long long) * 32) + (sizeof(int) * 1));
327 clear_used_math(); 327 clear_used_math();
328 328
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 983e0792d5f3..e124cf7008df 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -161,15 +161,6 @@ void smp_send_reschedule(int cpu)
161 plat_send_ipi(cpu, SMP_MSG_RESCHEDULE); 161 plat_send_ipi(cpu, SMP_MSG_RESCHEDULE);
162} 162}
163 163
164static void stop_this_cpu(void *unused)
165{
166 cpu_clear(smp_processor_id(), cpu_online_map);
167 local_irq_disable();
168
169 for (;;)
170 cpu_relax();
171}
172
173void smp_send_stop(void) 164void smp_send_stop(void)
174{ 165{
175 smp_call_function(stop_this_cpu, 0, 0); 166 smp_call_function(stop_this_cpu, 0, 0);
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index 7b036339dc92..0830c2a9f712 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -58,7 +58,7 @@ BUILD_TRAP_HANDLER(debug)
58 TRAP_HANDLER_DECL; 58 TRAP_HANDLER_DECL;
59 59
60 /* Rewind */ 60 /* Rewind */
61 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); 61 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
62 62
63 if (notify_die(DIE_TRAP, "debug trap", regs, 0, vec & 0xff, 63 if (notify_die(DIE_TRAP, "debug trap", regs, 0, vec & 0xff,
64 SIGTRAP) == NOTIFY_STOP) 64 SIGTRAP) == NOTIFY_STOP)
@@ -75,7 +75,7 @@ BUILD_TRAP_HANDLER(bug)
75 TRAP_HANDLER_DECL; 75 TRAP_HANDLER_DECL;
76 76
77 /* Rewind */ 77 /* Rewind */
78 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); 78 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
79 79
80 if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff, 80 if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff,
81 SIGTRAP) == NOTIFY_STOP) 81 SIGTRAP) == NOTIFY_STOP)
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 86639beac3a2..c3d86fa71ddf 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -24,11 +24,10 @@
24#include <linux/kdebug.h> 24#include <linux/kdebug.h>
25#include <linux/kexec.h> 25#include <linux/kexec.h>
26#include <linux/limits.h> 26#include <linux/limits.h>
27#include <linux/proc_fs.h>
28#include <linux/seq_file.h>
29#include <linux/sysfs.h> 27#include <linux/sysfs.h>
28#include <linux/uaccess.h>
30#include <asm/system.h> 29#include <asm/system.h>
31#include <asm/uaccess.h> 30#include <asm/alignment.h>
32#include <asm/fpu.h> 31#include <asm/fpu.h>
33#include <asm/kprobes.h> 32#include <asm/kprobes.h>
34 33
@@ -47,73 +46,6 @@
47#define TRAP_ILLEGAL_SLOT_INST 13 46#define TRAP_ILLEGAL_SLOT_INST 13
48#endif 47#endif
49 48
50static unsigned long se_user;
51static unsigned long se_sys;
52static unsigned long se_half;
53static unsigned long se_word;
54static unsigned long se_dword;
55static unsigned long se_multi;
56/* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not
57 valid! */
58static int se_usermode = 3;
59/* 0: no warning 1: print a warning message, disabled by default */
60static int se_kernmode_warn;
61
62#ifdef CONFIG_PROC_FS
63static const char *se_usermode_action[] = {
64 "ignored",
65 "warn",
66 "fixup",
67 "fixup+warn",
68 "signal",
69 "signal+warn"
70};
71
72static int alignment_proc_show(struct seq_file *m, void *v)
73{
74 seq_printf(m, "User:\t\t%lu\n", se_user);
75 seq_printf(m, "System:\t\t%lu\n", se_sys);
76 seq_printf(m, "Half:\t\t%lu\n", se_half);
77 seq_printf(m, "Word:\t\t%lu\n", se_word);
78 seq_printf(m, "DWord:\t\t%lu\n", se_dword);
79 seq_printf(m, "Multi:\t\t%lu\n", se_multi);
80 seq_printf(m, "User faults:\t%i (%s)\n", se_usermode,
81 se_usermode_action[se_usermode]);
82 seq_printf(m, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn,
83 se_kernmode_warn ? "+warn" : "");
84 return 0;
85}
86
87static int alignment_proc_open(struct inode *inode, struct file *file)
88{
89 return single_open(file, alignment_proc_show, NULL);
90}
91
92static ssize_t alignment_proc_write(struct file *file,
93 const char __user *buffer, size_t count, loff_t *pos)
94{
95 int *data = PDE(file->f_path.dentry->d_inode)->data;
96 char mode;
97
98 if (count > 0) {
99 if (get_user(mode, buffer))
100 return -EFAULT;
101 if (mode >= '0' && mode <= '5')
102 *data = mode - '0';
103 }
104 return count;
105}
106
107static const struct file_operations alignment_proc_fops = {
108 .owner = THIS_MODULE,
109 .open = alignment_proc_open,
110 .read = seq_read,
111 .llseek = seq_lseek,
112 .release = single_release,
113 .write = alignment_proc_write,
114};
115#endif
116
117static void dump_mem(const char *str, unsigned long bottom, unsigned long top) 49static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
118{ 50{
119 unsigned long p; 51 unsigned long p;
@@ -265,10 +197,10 @@ static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
265 count = 1<<(instruction&3); 197 count = 1<<(instruction&3);
266 198
267 switch (count) { 199 switch (count) {
268 case 1: se_half += 1; break; 200 case 1: inc_unaligned_byte_access(); break;
269 case 2: se_word += 1; break; 201 case 2: inc_unaligned_word_access(); break;
270 case 4: se_dword += 1; break; 202 case 4: inc_unaligned_dword_access(); break;
271 case 8: se_multi += 1; break; /* ??? */ 203 case 8: inc_unaligned_multi_access(); break;
272 } 204 }
273 205
274 ret = -EFAULT; 206 ret = -EFAULT;
@@ -452,18 +384,8 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
452 rm = regs->regs[index]; 384 rm = regs->regs[index];
453 385
454 /* shout about fixups */ 386 /* shout about fixups */
455 if (!expected) { 387 if (!expected)
456 if (user_mode(regs) && (se_usermode & 1) && printk_ratelimit()) 388 unaligned_fixups_notify(current, instruction, regs);
457 pr_notice("Fixing up unaligned userspace access "
458 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
459 current->comm, task_pid_nr(current),
460 (void *)regs->pc, instruction);
461 else if (se_kernmode_warn && printk_ratelimit())
462 pr_notice("Fixing up unaligned kernel access "
463 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
464 current->comm, task_pid_nr(current),
465 (void *)regs->pc, instruction);
466 }
467 389
468 ret = -EFAULT; 390 ret = -EFAULT;
469 switch (instruction&0xF000) { 391 switch (instruction&0xF000) {
@@ -616,10 +538,10 @@ asmlinkage void do_address_error(struct pt_regs *regs,
616 538
617 if (user_mode(regs)) { 539 if (user_mode(regs)) {
618 int si_code = BUS_ADRERR; 540 int si_code = BUS_ADRERR;
541 unsigned int user_action;
619 542
620 local_irq_enable(); 543 local_irq_enable();
621 544 inc_unaligned_user_access();
622 se_user += 1;
623 545
624 set_fs(USER_DS); 546 set_fs(USER_DS);
625 if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1), 547 if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1),
@@ -630,16 +552,12 @@ asmlinkage void do_address_error(struct pt_regs *regs,
630 set_fs(oldfs); 552 set_fs(oldfs);
631 553
632 /* shout about userspace fixups */ 554 /* shout about userspace fixups */
633 if (se_usermode & 1) 555 unaligned_fixups_notify(current, instruction, regs);
634 printk(KERN_NOTICE "Unaligned userspace access "
635 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
636 current->comm, current->pid, (void *)regs->pc,
637 instruction);
638 556
639 if (se_usermode & 2) 557 user_action = unaligned_user_action();
558 if (user_action & UM_FIXUP)
640 goto fixup; 559 goto fixup;
641 560 if (user_action & UM_SIGNAL)
642 if (se_usermode & 4)
643 goto uspace_segv; 561 goto uspace_segv;
644 else { 562 else {
645 /* ignore */ 563 /* ignore */
@@ -659,7 +577,7 @@ fixup:
659 &user_mem_access, 0); 577 &user_mem_access, 0);
660 set_fs(oldfs); 578 set_fs(oldfs);
661 579
662 if (tmp==0) 580 if (tmp == 0)
663 return; /* sorted */ 581 return; /* sorted */
664uspace_segv: 582uspace_segv:
665 printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned " 583 printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned "
@@ -672,7 +590,7 @@ uspace_segv:
672 info.si_addr = (void __user *)address; 590 info.si_addr = (void __user *)address;
673 force_sig_info(SIGBUS, &info, current); 591 force_sig_info(SIGBUS, &info, current);
674 } else { 592 } else {
675 se_sys += 1; 593 inc_unaligned_kernel_access();
676 594
677 if (regs->pc & 1) 595 if (regs->pc & 1)
678 die("unaligned program counter", regs, error_code); 596 die("unaligned program counter", regs, error_code);
@@ -687,11 +605,7 @@ uspace_segv:
687 die("insn faulting in do_address_error", regs, 0); 605 die("insn faulting in do_address_error", regs, 0);
688 } 606 }
689 607
690 if (se_kernmode_warn) 608 unaligned_fixups_notify(current, instruction, regs);
691 printk(KERN_NOTICE "Unaligned kernel access "
692 "on behalf of \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
693 current->comm, current->pid, (void *)regs->pc,
694 instruction);
695 609
696 handle_unaligned_access(instruction, regs, 610 handle_unaligned_access(instruction, regs,
697 &user_mem_access, 0); 611 &user_mem_access, 0);
@@ -876,35 +790,10 @@ asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
876 die_if_kernel("exception", regs, ex); 790 die_if_kernel("exception", regs, ex);
877} 791}
878 792
879#if defined(CONFIG_SH_STANDARD_BIOS)
880void *gdb_vbr_vector;
881
882static inline void __init gdb_vbr_init(void)
883{
884 register unsigned long vbr;
885
886 /*
887 * Read the old value of the VBR register to initialise
888 * the vector through which debug and BIOS traps are
889 * delegated by the Linux trap handler.
890 */
891 asm volatile("stc vbr, %0" : "=r" (vbr));
892
893 gdb_vbr_vector = (void *)(vbr + 0x100);
894 printk("Setting GDB trap vector to 0x%08lx\n",
895 (unsigned long)gdb_vbr_vector);
896}
897#endif
898
899void __cpuinit per_cpu_trap_init(void) 793void __cpuinit per_cpu_trap_init(void)
900{ 794{
901 extern void *vbr_base; 795 extern void *vbr_base;
902 796
903#ifdef CONFIG_SH_STANDARD_BIOS
904 if (raw_smp_processor_id() == 0)
905 gdb_vbr_init();
906#endif
907
908 /* NOTE: The VBR value should be at P1 797 /* NOTE: The VBR value should be at P1
909 (or P2, virtural "fixed" address space). 798 (or P2, virtural "fixed" address space).
910 It's definitely should not in physical address. */ 799 It's definitely should not in physical address. */
@@ -956,11 +845,8 @@ void __init trap_init(void)
956#endif 845#endif
957 846
958#ifdef TRAP_UBC 847#ifdef TRAP_UBC
959 set_exception_table_vec(TRAP_UBC, break_point_trap); 848 set_exception_table_vec(TRAP_UBC, breakpoint_trap_handler);
960#endif 849#endif
961
962 /* Setup VBR for boot cpu */
963 per_cpu_trap_init();
964} 850}
965 851
966void show_stack(struct task_struct *tsk, unsigned long *sp) 852void show_stack(struct task_struct *tsk, unsigned long *sp)
@@ -985,34 +871,3 @@ void dump_stack(void)
985 show_stack(NULL, NULL); 871 show_stack(NULL, NULL);
986} 872}
987EXPORT_SYMBOL(dump_stack); 873EXPORT_SYMBOL(dump_stack);
988
989#ifdef CONFIG_PROC_FS
990/*
991 * This needs to be done after sysctl_init, otherwise sys/ will be
992 * overwritten. Actually, this shouldn't be in sys/ at all since
993 * it isn't a sysctl, and it doesn't contain sysctl information.
994 * We now locate it in /proc/cpu/alignment instead.
995 */
996static int __init alignment_init(void)
997{
998 struct proc_dir_entry *dir, *res;
999
1000 dir = proc_mkdir("cpu", NULL);
1001 if (!dir)
1002 return -ENOMEM;
1003
1004 res = proc_create_data("alignment", S_IWUSR | S_IRUGO, dir,
1005 &alignment_proc_fops, &se_usermode);
1006 if (!res)
1007 return -ENOMEM;
1008
1009 res = proc_create_data("kernel_alignment", S_IWUSR | S_IRUGO, dir,
1010 &alignment_proc_fops, &se_kernmode_warn);
1011 if (!res)
1012 return -ENOMEM;
1013
1014 return 0;
1015}
1016
1017fs_initcall(alignment_init);
1018#endif
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index d86f5315a0c1..e3f92eb05ffd 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -611,19 +611,19 @@ static int misaligned_fpu_load(struct pt_regs *regs,
611 611
612 switch (width_shift) { 612 switch (width_shift) {
613 case 2: 613 case 2:
614 current->thread.fpu.hard.fp_regs[destreg] = buflo; 614 current->thread.xstate->hardfpu.fp_regs[destreg] = buflo;
615 break; 615 break;
616 case 3: 616 case 3:
617 if (do_paired_load) { 617 if (do_paired_load) {
618 current->thread.fpu.hard.fp_regs[destreg] = buflo; 618 current->thread.xstate->hardfpu.fp_regs[destreg] = buflo;
619 current->thread.fpu.hard.fp_regs[destreg+1] = bufhi; 619 current->thread.xstate->hardfpu.fp_regs[destreg+1] = bufhi;
620 } else { 620 } else {
621#if defined(CONFIG_CPU_LITTLE_ENDIAN) 621#if defined(CONFIG_CPU_LITTLE_ENDIAN)
622 current->thread.fpu.hard.fp_regs[destreg] = bufhi; 622 current->thread.xstate->hardfpu.fp_regs[destreg] = bufhi;
623 current->thread.fpu.hard.fp_regs[destreg+1] = buflo; 623 current->thread.xstate->hardfpu.fp_regs[destreg+1] = buflo;
624#else 624#else
625 current->thread.fpu.hard.fp_regs[destreg] = buflo; 625 current->thread.xstate->hardfpu.fp_regs[destreg] = buflo;
626 current->thread.fpu.hard.fp_regs[destreg+1] = bufhi; 626 current->thread.xstate->hardfpu.fp_regs[destreg+1] = bufhi;
627#endif 627#endif
628 } 628 }
629 break; 629 break;
@@ -681,19 +681,19 @@ static int misaligned_fpu_store(struct pt_regs *regs,
681 681
682 switch (width_shift) { 682 switch (width_shift) {
683 case 2: 683 case 2:
684 buflo = current->thread.fpu.hard.fp_regs[srcreg]; 684 buflo = current->thread.xstate->hardfpu.fp_regs[srcreg];
685 break; 685 break;
686 case 3: 686 case 3:
687 if (do_paired_load) { 687 if (do_paired_load) {
688 buflo = current->thread.fpu.hard.fp_regs[srcreg]; 688 buflo = current->thread.xstate->hardfpu.fp_regs[srcreg];
689 bufhi = current->thread.fpu.hard.fp_regs[srcreg+1]; 689 bufhi = current->thread.xstate->hardfpu.fp_regs[srcreg+1];
690 } else { 690 } else {
691#if defined(CONFIG_CPU_LITTLE_ENDIAN) 691#if defined(CONFIG_CPU_LITTLE_ENDIAN)
692 bufhi = current->thread.fpu.hard.fp_regs[srcreg]; 692 bufhi = current->thread.xstate->hardfpu.fp_regs[srcreg];
693 buflo = current->thread.fpu.hard.fp_regs[srcreg+1]; 693 buflo = current->thread.xstate->hardfpu.fp_regs[srcreg+1];
694#else 694#else
695 buflo = current->thread.fpu.hard.fp_regs[srcreg]; 695 buflo = current->thread.xstate->hardfpu.fp_regs[srcreg];
696 bufhi = current->thread.fpu.hard.fp_regs[srcreg+1]; 696 bufhi = current->thread.xstate->hardfpu.fp_regs[srcreg+1];
697#endif 697#endif
698 } 698 }
699 break; 699 break;
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index a1e4ec24f1f5..7f8a709c3ada 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -3,7 +3,7 @@
3 * Written by Niibe Yutaka and Paul Mundt 3 * Written by Niibe Yutaka and Paul Mundt
4 */ 4 */
5#ifdef CONFIG_SUPERH64 5#ifdef CONFIG_SUPERH64
6#define LOAD_OFFSET CONFIG_PAGE_OFFSET 6#define LOAD_OFFSET PAGE_OFFSET
7OUTPUT_ARCH(sh:sh5) 7OUTPUT_ARCH(sh:sh5)
8#else 8#else
9#define LOAD_OFFSET 0 9#define LOAD_OFFSET 0
@@ -14,17 +14,16 @@ OUTPUT_ARCH(sh)
14#include <asm/cache.h> 14#include <asm/cache.h>
15#include <asm/vmlinux.lds.h> 15#include <asm/vmlinux.lds.h>
16 16
17#ifdef CONFIG_PMB
18 #define MEMORY_OFFSET 0
19#else
20 #define MEMORY_OFFSET __MEMORY_START
21#endif
22
17ENTRY(_start) 23ENTRY(_start)
18SECTIONS 24SECTIONS
19{ 25{
20#ifdef CONFIG_PMB_FIXED 26 . = PAGE_OFFSET + MEMORY_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
21 . = CONFIG_PAGE_OFFSET + (CONFIG_MEMORY_START & 0x1fffffff) +
22 CONFIG_ZERO_PAGE_OFFSET;
23#elif defined(CONFIG_32BIT)
24 . = CONFIG_PAGE_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
25#else
26 . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET;
27#endif
28 27
29 _text = .; /* Text and read-only data */ 28 _text = .; /* Text and read-only data */
30 29
@@ -35,12 +34,7 @@ SECTIONS
35 .text : AT(ADDR(.text) - LOAD_OFFSET) { 34 .text : AT(ADDR(.text) - LOAD_OFFSET) {
36 HEAD_TEXT 35 HEAD_TEXT
37 TEXT_TEXT 36 TEXT_TEXT
38 37 EXTRA_TEXT
39#ifdef CONFIG_SUPERH64
40 *(.text64)
41 *(.text..SHmedia32)
42#endif
43
44 SCHED_TEXT 38 SCHED_TEXT
45 LOCK_TEXT 39 LOCK_TEXT
46 KPROBES_TEXT 40 KPROBES_TEXT
@@ -51,24 +45,12 @@ SECTIONS
51 } = 0x0009 45 } = 0x0009
52 46
53 EXCEPTION_TABLE(16) 47 EXCEPTION_TABLE(16)
54
55 NOTES 48 NOTES
56 RO_DATA(PAGE_SIZE)
57
58 /*
59 * Code which must be executed uncached and the associated data
60 */
61 . = ALIGN(PAGE_SIZE);
62 .uncached : AT(ADDR(.uncached) - LOAD_OFFSET) {
63 __uncached_start = .;
64 *(.uncached.text)
65 *(.uncached.data)
66 __uncached_end = .;
67 }
68 49
50 _sdata = .;
51 RO_DATA(PAGE_SIZE)
69 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) 52 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
70 53 _edata = .;
71 _edata = .; /* End of data section */
72 54
73 DWARF_EH_FRAME 55 DWARF_EH_FRAME
74 56
diff --git a/arch/sh/math-emu/math.c b/arch/sh/math-emu/math.c
index d6c15cae0912..1fcdb1220975 100644
--- a/arch/sh/math-emu/math.c
+++ b/arch/sh/math-emu/math.c
@@ -471,10 +471,10 @@ static int fpu_emulate(u16 code, struct sh_fpu_soft_struct *fregs, struct pt_reg
471 * denormal_to_double - Given denormalized float number, 471 * denormal_to_double - Given denormalized float number,
472 * store double float 472 * store double float
473 * 473 *
474 * @fpu: Pointer to sh_fpu_hard structure 474 * @fpu: Pointer to sh_fpu_soft structure
475 * @n: Index to FP register 475 * @n: Index to FP register
476 */ 476 */
477static void denormal_to_double(struct sh_fpu_hard_struct *fpu, int n) 477static void denormal_to_double(struct sh_fpu_soft_struct *fpu, int n)
478{ 478{
479 unsigned long du, dl; 479 unsigned long du, dl;
480 unsigned long x = fpu->fpul; 480 unsigned long x = fpu->fpul;
@@ -552,11 +552,11 @@ static int ieee_fpe_handler(struct pt_regs *regs)
552 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ 552 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
553 struct task_struct *tsk = current; 553 struct task_struct *tsk = current;
554 554
555 if ((tsk->thread.fpu.hard.fpscr & (1 << 17))) { 555 if ((tsk->thread.xstate->softfpu.fpscr & (1 << 17))) {
556 /* FPU error */ 556 /* FPU error */
557 denormal_to_double (&tsk->thread.fpu.hard, 557 denormal_to_double (&tsk->thread.xstate->softfpu,
558 (finsn >> 8) & 0xf); 558 (finsn >> 8) & 0xf);
559 tsk->thread.fpu.hard.fpscr &= 559 tsk->thread.xstate->softfpu.fpscr &=
560 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); 560 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
561 task_thread_info(tsk)->status |= TS_USEDFPU; 561 task_thread_info(tsk)->status |= TS_USEDFPU;
562 } else { 562 } else {
@@ -617,7 +617,7 @@ static void fpu_init(struct sh_fpu_soft_struct *fpu)
617int do_fpu_inst(unsigned short inst, struct pt_regs *regs) 617int do_fpu_inst(unsigned short inst, struct pt_regs *regs)
618{ 618{
619 struct task_struct *tsk = current; 619 struct task_struct *tsk = current;
620 struct sh_fpu_soft_struct *fpu = &(tsk->thread.fpu.soft); 620 struct sh_fpu_soft_struct *fpu = &(tsk->thread.xstate->softfpu);
621 621
622 if (!(task_thread_info(tsk)->status & TS_USEDFPU)) { 622 if (!(task_thread_info(tsk)->status & TS_USEDFPU)) {
623 /* initialize once. */ 623 /* initialize once. */
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 986a71b88ca3..1445ca6257df 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -75,52 +75,25 @@ config MEMORY_SIZE
75config 29BIT 75config 29BIT
76 def_bool !32BIT 76 def_bool !32BIT
77 depends on SUPERH32 77 depends on SUPERH32
78 select UNCACHED_MAPPING
78 79
79config 32BIT 80config 32BIT
80 bool 81 bool
81 default y if CPU_SH5 82 default y if CPU_SH5
82 83
83config PMB_ENABLE
84 bool "Support 32-bit physical addressing through PMB"
85 depends on MMU && EXPERIMENTAL && CPU_SH4A && !CPU_SH4AL_DSP
86 help
87 If you say Y here, physical addressing will be extended to
88 32-bits through the SH-4A PMB. If this is not set, legacy
89 29-bit physical addressing will be used.
90
91choice
92 prompt "PMB handling type"
93 depends on PMB_ENABLE
94 default PMB_FIXED
95
96config PMB 84config PMB
97 bool "PMB" 85 bool "Support 32-bit physical addressing through PMB"
98 depends on MMU && EXPERIMENTAL && CPU_SH4A && !CPU_SH4AL_DSP 86 depends on MMU && EXPERIMENTAL && CPU_SH4A && !CPU_SH4AL_DSP
87 select 32BIT
88 select UNCACHED_MAPPING
99 help 89 help
100 If you say Y here, physical addressing will be extended to 90 If you say Y here, physical addressing will be extended to
101 32-bits through the SH-4A PMB. If this is not set, legacy 91 32-bits through the SH-4A PMB. If this is not set, legacy
102 29-bit physical addressing will be used. 92 29-bit physical addressing will be used.
103 93
104config PMB_FIXED
105 bool "fixed PMB"
106 depends on MMU && EXPERIMENTAL && CPU_SH4A && !CPU_SH4AL_DSP
107 select 32BIT
108 help
109 If this option is enabled, fixed PMB mappings are inherited
110 from the boot loader, and the kernel does not attempt dynamic
111 management. This is the closest to legacy 29-bit physical mode,
112 and allows systems to support up to 512MiB of system memory.
113
114endchoice
115
116config X2TLB 94config X2TLB
117 bool "Enable extended TLB mode" 95 def_bool y
118 depends on (CPU_SHX2 || CPU_SHX3) && MMU && EXPERIMENTAL 96 depends on (CPU_SHX2 || CPU_SHX3) && MMU
119 help
120 Selecting this option will enable the extended mode of the SH-X2
121 TLB. For legacy SH-X behaviour and interoperability, say N. For
122 all of the fun new features and a willingless to submit bug reports,
123 say Y.
124 97
125config VSYSCALL 98config VSYSCALL
126 bool "Support vsyscall page" 99 bool "Support vsyscall page"
@@ -188,14 +161,19 @@ config ARCH_MEMORY_PROBE
188 def_bool y 161 def_bool y
189 depends on MEMORY_HOTPLUG 162 depends on MEMORY_HOTPLUG
190 163
164config IOREMAP_FIXED
165 def_bool y
166 depends on X2TLB || SUPERH64
167
168config UNCACHED_MAPPING
169 bool
170
191choice 171choice
192 prompt "Kernel page size" 172 prompt "Kernel page size"
193 default PAGE_SIZE_8KB if X2TLB
194 default PAGE_SIZE_4KB 173 default PAGE_SIZE_4KB
195 174
196config PAGE_SIZE_4KB 175config PAGE_SIZE_4KB
197 bool "4kB" 176 bool "4kB"
198 depends on !MMU || !X2TLB
199 help 177 help
200 This is the default page size used by all SuperH CPUs. 178 This is the default page size used by all SuperH CPUs.
201 179
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index 8a70535fa7ce..3dc8a8a63822 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Linux SuperH-specific parts of the memory manager. 2# Makefile for the Linux SuperH-specific parts of the memory manager.
3# 3#
4 4
5obj-y := cache.o init.o consistent.o mmap.o 5obj-y := alignment.o cache.o init.o consistent.o mmap.o
6 6
7cacheops-$(CONFIG_CPU_SH2) := cache-sh2.o 7cacheops-$(CONFIG_CPU_SH2) := cache-sh2.o
8cacheops-$(CONFIG_CPU_SH2A) := cache-sh2a.o 8cacheops-$(CONFIG_CPU_SH2A) := cache-sh2a.o
@@ -15,7 +15,7 @@ obj-y += $(cacheops-y)
15 15
16mmu-y := nommu.o extable_32.o 16mmu-y := nommu.o extable_32.o
17mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o \ 17mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o \
18 ioremap_$(BITS).o kmap.o tlbflush_$(BITS).o 18 ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o
19 19
20obj-y += $(mmu-y) 20obj-y += $(mmu-y)
21obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o 21obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o
@@ -26,15 +26,17 @@ endif
26 26
27ifdef CONFIG_MMU 27ifdef CONFIG_MMU
28tlb-$(CONFIG_CPU_SH3) := tlb-sh3.o 28tlb-$(CONFIG_CPU_SH3) := tlb-sh3.o
29tlb-$(CONFIG_CPU_SH4) := tlb-sh4.o 29tlb-$(CONFIG_CPU_SH4) := tlb-sh4.o tlb-urb.o
30tlb-$(CONFIG_CPU_SH5) := tlb-sh5.o 30tlb-$(CONFIG_CPU_SH5) := tlb-sh5.o
31tlb-$(CONFIG_CPU_HAS_PTEAEX) := tlb-pteaex.o 31tlb-$(CONFIG_CPU_HAS_PTEAEX) := tlb-pteaex.o tlb-urb.o
32obj-y += $(tlb-y) 32obj-y += $(tlb-y)
33endif 33endif
34 34
35obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 35obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
36obj-$(CONFIG_PMB_ENABLE) += pmb.o 36obj-$(CONFIG_PMB) += pmb.o
37obj-$(CONFIG_NUMA) += numa.o 37obj-$(CONFIG_NUMA) += numa.o
38obj-$(CONFIG_IOREMAP_FIXED) += ioremap_fixed.o
39obj-$(CONFIG_UNCACHED_MAPPING) += uncached.o
38 40
39# Special flags for fault_64.o. This puts restrictions on the number of 41# Special flags for fault_64.o. This puts restrictions on the number of
40# caller-save registers that the compiler can target when building this file. 42# caller-save registers that the compiler can target when building this file.
diff --git a/arch/sh/mm/alignment.c b/arch/sh/mm/alignment.c
new file mode 100644
index 000000000000..b2595b8548ee
--- /dev/null
+++ b/arch/sh/mm/alignment.c
@@ -0,0 +1,189 @@
1/*
2 * Alignment access counters and corresponding user-space interfaces.
3 *
4 * Copyright (C) 2009 ST Microelectronics
5 * Copyright (C) 2009 - 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/seq_file.h>
14#include <linux/proc_fs.h>
15#include <linux/uaccess.h>
16#include <asm/alignment.h>
17#include <asm/processor.h>
18
19static unsigned long se_user;
20static unsigned long se_sys;
21static unsigned long se_half;
22static unsigned long se_word;
23static unsigned long se_dword;
24static unsigned long se_multi;
25/* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not
26 valid! */
27static int se_usermode = UM_WARN | UM_FIXUP;
28/* 0: no warning 1: print a warning message, disabled by default */
29static int se_kernmode_warn;
30
31core_param(alignment, se_usermode, int, 0600);
32
33void inc_unaligned_byte_access(void)
34{
35 se_half++;
36}
37
38void inc_unaligned_word_access(void)
39{
40 se_word++;
41}
42
43void inc_unaligned_dword_access(void)
44{
45 se_dword++;
46}
47
48void inc_unaligned_multi_access(void)
49{
50 se_multi++;
51}
52
53void inc_unaligned_user_access(void)
54{
55 se_user++;
56}
57
58void inc_unaligned_kernel_access(void)
59{
60 se_sys++;
61}
62
63/*
64 * This defaults to the global policy which can be set from the command
65 * line, while processes can overload their preferences via prctl().
66 */
67unsigned int unaligned_user_action(void)
68{
69 unsigned int action = se_usermode;
70
71 if (current->thread.flags & SH_THREAD_UAC_SIGBUS) {
72 action &= ~UM_FIXUP;
73 action |= UM_SIGNAL;
74 }
75
76 if (current->thread.flags & SH_THREAD_UAC_NOPRINT)
77 action &= ~UM_WARN;
78
79 return action;
80}
81
82int get_unalign_ctl(struct task_struct *tsk, unsigned long addr)
83{
84 return put_user(tsk->thread.flags & SH_THREAD_UAC_MASK,
85 (unsigned int __user *)addr);
86}
87
88int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
89{
90 tsk->thread.flags = (tsk->thread.flags & ~SH_THREAD_UAC_MASK) |
91 (val & SH_THREAD_UAC_MASK);
92 return 0;
93}
94
95void unaligned_fixups_notify(struct task_struct *tsk, insn_size_t insn,
96 struct pt_regs *regs)
97{
98 if (user_mode(regs) && (se_usermode & UM_WARN) && printk_ratelimit())
99 pr_notice("Fixing up unaligned userspace access "
100 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
101 tsk->comm, task_pid_nr(tsk),
102 (void *)instruction_pointer(regs), insn);
103 else if (se_kernmode_warn && printk_ratelimit())
104 pr_notice("Fixing up unaligned kernel access "
105 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
106 tsk->comm, task_pid_nr(tsk),
107 (void *)instruction_pointer(regs), insn);
108}
109
110static const char *se_usermode_action[] = {
111 "ignored",
112 "warn",
113 "fixup",
114 "fixup+warn",
115 "signal",
116 "signal+warn"
117};
118
119static int alignment_proc_show(struct seq_file *m, void *v)
120{
121 seq_printf(m, "User:\t\t%lu\n", se_user);
122 seq_printf(m, "System:\t\t%lu\n", se_sys);
123 seq_printf(m, "Half:\t\t%lu\n", se_half);
124 seq_printf(m, "Word:\t\t%lu\n", se_word);
125 seq_printf(m, "DWord:\t\t%lu\n", se_dword);
126 seq_printf(m, "Multi:\t\t%lu\n", se_multi);
127 seq_printf(m, "User faults:\t%i (%s)\n", se_usermode,
128 se_usermode_action[se_usermode]);
129 seq_printf(m, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn,
130 se_kernmode_warn ? "+warn" : "");
131 return 0;
132}
133
134static int alignment_proc_open(struct inode *inode, struct file *file)
135{
136 return single_open(file, alignment_proc_show, NULL);
137}
138
139static ssize_t alignment_proc_write(struct file *file,
140 const char __user *buffer, size_t count, loff_t *pos)
141{
142 int *data = PDE(file->f_path.dentry->d_inode)->data;
143 char mode;
144
145 if (count > 0) {
146 if (get_user(mode, buffer))
147 return -EFAULT;
148 if (mode >= '0' && mode <= '5')
149 *data = mode - '0';
150 }
151 return count;
152}
153
154static const struct file_operations alignment_proc_fops = {
155 .owner = THIS_MODULE,
156 .open = alignment_proc_open,
157 .read = seq_read,
158 .llseek = seq_lseek,
159 .release = single_release,
160 .write = alignment_proc_write,
161};
162
163/*
164 * This needs to be done after sysctl_init, otherwise sys/ will be
165 * overwritten. Actually, this shouldn't be in sys/ at all since
166 * it isn't a sysctl, and it doesn't contain sysctl information.
167 * We now locate it in /proc/cpu/alignment instead.
168 */
169static int __init alignment_init(void)
170{
171 struct proc_dir_entry *dir, *res;
172
173 dir = proc_mkdir("cpu", NULL);
174 if (!dir)
175 return -ENOMEM;
176
177 res = proc_create_data("alignment", S_IWUSR | S_IRUGO, dir,
178 &alignment_proc_fops, &se_usermode);
179 if (!res)
180 return -ENOMEM;
181
182 res = proc_create_data("kernel_alignment", S_IWUSR | S_IRUGO, dir,
183 &alignment_proc_fops, &se_kernmode_warn);
184 if (!res)
185 return -ENOMEM;
186
187 return 0;
188}
189fs_initcall(alignment_init);
diff --git a/arch/sh/mm/cache-debugfs.c b/arch/sh/mm/cache-debugfs.c
index 5ba067b26591..690ed010d002 100644
--- a/arch/sh/mm/cache-debugfs.c
+++ b/arch/sh/mm/cache-debugfs.c
@@ -22,8 +22,7 @@ enum cache_type {
22 CACHE_TYPE_UNIFIED, 22 CACHE_TYPE_UNIFIED,
23}; 23};
24 24
25static int __uses_jump_to_uncached cache_seq_show(struct seq_file *file, 25static int cache_seq_show(struct seq_file *file, void *iter)
26 void *iter)
27{ 26{
28 unsigned int cache_type = (unsigned int)file->private; 27 unsigned int cache_type = (unsigned int)file->private;
29 struct cache_info *cache; 28 struct cache_info *cache;
@@ -37,7 +36,7 @@ static int __uses_jump_to_uncached cache_seq_show(struct seq_file *file,
37 */ 36 */
38 jump_to_uncached(); 37 jump_to_uncached();
39 38
40 ccr = ctrl_inl(CCR); 39 ccr = __raw_readl(CCR);
41 if ((ccr & CCR_CACHE_ENABLE) == 0) { 40 if ((ccr & CCR_CACHE_ENABLE) == 0) {
42 back_to_cached(); 41 back_to_cached();
43 42
@@ -90,7 +89,7 @@ static int __uses_jump_to_uncached cache_seq_show(struct seq_file *file,
90 for (addr = addrstart, line = 0; 89 for (addr = addrstart, line = 0;
91 addr < addrstart + waysize; 90 addr < addrstart + waysize;
92 addr += cache->linesz, line++) { 91 addr += cache->linesz, line++) {
93 unsigned long data = ctrl_inl(addr); 92 unsigned long data = __raw_readl(addr);
94 93
95 /* Check the V bit, ignore invalid cachelines */ 94 /* Check the V bit, ignore invalid cachelines */
96 if ((data & 1) == 0) 95 if ((data & 1) == 0)
diff --git a/arch/sh/mm/cache-sh2.c b/arch/sh/mm/cache-sh2.c
index 699a71f46327..defcf719f2e8 100644
--- a/arch/sh/mm/cache-sh2.c
+++ b/arch/sh/mm/cache-sh2.c
@@ -28,10 +28,10 @@ static void sh2__flush_wback_region(void *start, int size)
28 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0); 28 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0);
29 int way; 29 int way;
30 for (way = 0; way < 4; way++) { 30 for (way = 0; way < 4; way++) {
31 unsigned long data = ctrl_inl(addr | (way << 12)); 31 unsigned long data = __raw_readl(addr | (way << 12));
32 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { 32 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
33 data &= ~SH_CACHE_UPDATED; 33 data &= ~SH_CACHE_UPDATED;
34 ctrl_outl(data, addr | (way << 12)); 34 __raw_writel(data, addr | (way << 12));
35 } 35 }
36 } 36 }
37 } 37 }
@@ -47,7 +47,7 @@ static void sh2__flush_purge_region(void *start, int size)
47 & ~(L1_CACHE_BYTES-1); 47 & ~(L1_CACHE_BYTES-1);
48 48
49 for (v = begin; v < end; v+=L1_CACHE_BYTES) 49 for (v = begin; v < end; v+=L1_CACHE_BYTES)
50 ctrl_outl((v & CACHE_PHYSADDR_MASK), 50 __raw_writel((v & CACHE_PHYSADDR_MASK),
51 CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); 51 CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
52} 52}
53 53
@@ -63,9 +63,9 @@ static void sh2__flush_invalidate_region(void *start, int size)
63 local_irq_save(flags); 63 local_irq_save(flags);
64 jump_to_uncached(); 64 jump_to_uncached();
65 65
66 ccr = ctrl_inl(CCR); 66 ccr = __raw_readl(CCR);
67 ccr |= CCR_CACHE_INVALIDATE; 67 ccr |= CCR_CACHE_INVALIDATE;
68 ctrl_outl(ccr, CCR); 68 __raw_writel(ccr, CCR);
69 69
70 back_to_cached(); 70 back_to_cached();
71 local_irq_restore(flags); 71 local_irq_restore(flags);
@@ -78,7 +78,7 @@ static void sh2__flush_invalidate_region(void *start, int size)
78 & ~(L1_CACHE_BYTES-1); 78 & ~(L1_CACHE_BYTES-1);
79 79
80 for (v = begin; v < end; v+=L1_CACHE_BYTES) 80 for (v = begin; v < end; v+=L1_CACHE_BYTES)
81 ctrl_outl((v & CACHE_PHYSADDR_MASK), 81 __raw_writel((v & CACHE_PHYSADDR_MASK),
82 CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); 82 CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
83#endif 83#endif
84} 84}
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c
index 975899d83564..1f51225426a2 100644
--- a/arch/sh/mm/cache-sh2a.c
+++ b/arch/sh/mm/cache-sh2a.c
@@ -32,10 +32,10 @@ static void sh2a__flush_wback_region(void *start, int size)
32 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0); 32 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0);
33 int way; 33 int way;
34 for (way = 0; way < 4; way++) { 34 for (way = 0; way < 4; way++) {
35 unsigned long data = ctrl_inl(addr | (way << 11)); 35 unsigned long data = __raw_readl(addr | (way << 11));
36 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { 36 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
37 data &= ~SH_CACHE_UPDATED; 37 data &= ~SH_CACHE_UPDATED;
38 ctrl_outl(data, addr | (way << 11)); 38 __raw_writel(data, addr | (way << 11));
39 } 39 }
40 } 40 }
41 } 41 }
@@ -58,7 +58,7 @@ static void sh2a__flush_purge_region(void *start, int size)
58 jump_to_uncached(); 58 jump_to_uncached();
59 59
60 for (v = begin; v < end; v+=L1_CACHE_BYTES) { 60 for (v = begin; v < end; v+=L1_CACHE_BYTES) {
61 ctrl_outl((v & CACHE_PHYSADDR_MASK), 61 __raw_writel((v & CACHE_PHYSADDR_MASK),
62 CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); 62 CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
63 } 63 }
64 back_to_cached(); 64 back_to_cached();
@@ -78,17 +78,17 @@ static void sh2a__flush_invalidate_region(void *start, int size)
78 jump_to_uncached(); 78 jump_to_uncached();
79 79
80#ifdef CONFIG_CACHE_WRITEBACK 80#ifdef CONFIG_CACHE_WRITEBACK
81 ctrl_outl(ctrl_inl(CCR) | CCR_OCACHE_INVALIDATE, CCR); 81 __raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
82 /* I-cache invalidate */ 82 /* I-cache invalidate */
83 for (v = begin; v < end; v+=L1_CACHE_BYTES) { 83 for (v = begin; v < end; v+=L1_CACHE_BYTES) {
84 ctrl_outl((v & CACHE_PHYSADDR_MASK), 84 __raw_writel((v & CACHE_PHYSADDR_MASK),
85 CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); 85 CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
86 } 86 }
87#else 87#else
88 for (v = begin; v < end; v+=L1_CACHE_BYTES) { 88 for (v = begin; v < end; v+=L1_CACHE_BYTES) {
89 ctrl_outl((v & CACHE_PHYSADDR_MASK), 89 __raw_writel((v & CACHE_PHYSADDR_MASK),
90 CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); 90 CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
91 ctrl_outl((v & CACHE_PHYSADDR_MASK), 91 __raw_writel((v & CACHE_PHYSADDR_MASK),
92 CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); 92 CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
93 } 93 }
94#endif 94#endif
@@ -115,14 +115,14 @@ static void sh2a_flush_icache_range(void *args)
115 int way; 115 int way;
116 /* O-Cache writeback */ 116 /* O-Cache writeback */
117 for (way = 0; way < 4; way++) { 117 for (way = 0; way < 4; way++) {
118 unsigned long data = ctrl_inl(CACHE_OC_ADDRESS_ARRAY | addr | (way << 11)); 118 unsigned long data = __raw_readl(CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
119 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { 119 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
120 data &= ~SH_CACHE_UPDATED; 120 data &= ~SH_CACHE_UPDATED;
121 ctrl_outl(data, CACHE_OC_ADDRESS_ARRAY | addr | (way << 11)); 121 __raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
122 } 122 }
123 } 123 }
124 /* I-Cache invalidate */ 124 /* I-Cache invalidate */
125 ctrl_outl(addr, 125 __raw_writel(addr,
126 CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008); 126 CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008);
127 } 127 }
128 128
diff --git a/arch/sh/mm/cache-sh3.c b/arch/sh/mm/cache-sh3.c
index faef80c98134..e37523f65195 100644
--- a/arch/sh/mm/cache-sh3.c
+++ b/arch/sh/mm/cache-sh3.c
@@ -50,12 +50,12 @@ static void sh3__flush_wback_region(void *start, int size)
50 p = __pa(v); 50 p = __pa(v);
51 addr = addrstart | (v & current_cpu_data.dcache.entry_mask); 51 addr = addrstart | (v & current_cpu_data.dcache.entry_mask);
52 local_irq_save(flags); 52 local_irq_save(flags);
53 data = ctrl_inl(addr); 53 data = __raw_readl(addr);
54 54
55 if ((data & CACHE_PHYSADDR_MASK) == 55 if ((data & CACHE_PHYSADDR_MASK) ==
56 (p & CACHE_PHYSADDR_MASK)) { 56 (p & CACHE_PHYSADDR_MASK)) {
57 data &= ~SH_CACHE_UPDATED; 57 data &= ~SH_CACHE_UPDATED;
58 ctrl_outl(data, addr); 58 __raw_writel(data, addr);
59 local_irq_restore(flags); 59 local_irq_restore(flags);
60 break; 60 break;
61 } 61 }
@@ -86,7 +86,7 @@ static void sh3__flush_purge_region(void *start, int size)
86 data = (v & 0xfffffc00); /* _Virtual_ address, ~U, ~V */ 86 data = (v & 0xfffffc00); /* _Virtual_ address, ~U, ~V */
87 addr = CACHE_OC_ADDRESS_ARRAY | 87 addr = CACHE_OC_ADDRESS_ARRAY |
88 (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC; 88 (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC;
89 ctrl_outl(data, addr); 89 __raw_writel(data, addr);
90 } 90 }
91} 91}
92 92
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 560ddb6bc8a7..2cfae81914aa 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -36,7 +36,7 @@ static void __flush_cache_one(unsigned long addr, unsigned long phys,
36 * Called from kernel/module.c:sys_init_module and routine for a.out format, 36 * Called from kernel/module.c:sys_init_module and routine for a.out format,
37 * signal handler code and kprobes code 37 * signal handler code and kprobes code
38 */ 38 */
39static void __uses_jump_to_uncached sh4_flush_icache_range(void *args) 39static void sh4_flush_icache_range(void *args)
40{ 40{
41 struct flusher_data *data = args; 41 struct flusher_data *data = args;
42 unsigned long start, end; 42 unsigned long start, end;
@@ -109,6 +109,7 @@ static inline void flush_cache_one(unsigned long start, unsigned long phys)
109static void sh4_flush_dcache_page(void *arg) 109static void sh4_flush_dcache_page(void *arg)
110{ 110{
111 struct page *page = arg; 111 struct page *page = arg;
112 unsigned long addr = (unsigned long)page_address(page);
112#ifndef CONFIG_SMP 113#ifndef CONFIG_SMP
113 struct address_space *mapping = page_mapping(page); 114 struct address_space *mapping = page_mapping(page);
114 115
@@ -116,22 +117,14 @@ static void sh4_flush_dcache_page(void *arg)
116 set_bit(PG_dcache_dirty, &page->flags); 117 set_bit(PG_dcache_dirty, &page->flags);
117 else 118 else
118#endif 119#endif
119 { 120 flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
120 unsigned long phys = page_to_phys(page); 121 (addr & shm_align_mask), page_to_phys(page));
121 unsigned long addr = CACHE_OC_ADDRESS_ARRAY;
122 int i, n;
123
124 /* Loop all the D-cache */
125 n = boot_cpu_data.dcache.n_aliases;
126 for (i = 0; i < n; i++, addr += PAGE_SIZE)
127 flush_cache_one(addr, phys);
128 }
129 122
130 wmb(); 123 wmb();
131} 124}
132 125
133/* TODO: Selective icache invalidation through IC address array.. */ 126/* TODO: Selective icache invalidation through IC address array.. */
134static void __uses_jump_to_uncached flush_icache_all(void) 127static void flush_icache_all(void)
135{ 128{
136 unsigned long flags, ccr; 129 unsigned long flags, ccr;
137 130
@@ -139,9 +132,9 @@ static void __uses_jump_to_uncached flush_icache_all(void)
139 jump_to_uncached(); 132 jump_to_uncached();
140 133
141 /* Flush I-cache */ 134 /* Flush I-cache */
142 ccr = ctrl_inl(CCR); 135 ccr = __raw_readl(CCR);
143 ccr |= CCR_CACHE_ICI; 136 ccr |= CCR_CACHE_ICI;
144 ctrl_outl(ccr, CCR); 137 __raw_writel(ccr, CCR);
145 138
146 /* 139 /*
147 * back_to_cached() will take care of the barrier for us, don't add 140 * back_to_cached() will take care of the barrier for us, don't add
@@ -384,9 +377,9 @@ extern void __weak sh4__flush_region_init(void);
384void __init sh4_cache_init(void) 377void __init sh4_cache_init(void)
385{ 378{
386 printk("PVR=%08x CVR=%08x PRR=%08x\n", 379 printk("PVR=%08x CVR=%08x PRR=%08x\n",
387 ctrl_inl(CCN_PVR), 380 __raw_readl(CCN_PVR),
388 ctrl_inl(CCN_CVR), 381 __raw_readl(CCN_CVR),
389 ctrl_inl(CCN_PRR)); 382 __raw_readl(CCN_PRR));
390 383
391 local_flush_icache_range = sh4_flush_icache_range; 384 local_flush_icache_range = sh4_flush_icache_range;
392 local_flush_dcache_page = sh4_flush_dcache_page; 385 local_flush_dcache_page = sh4_flush_dcache_page;
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index f527fb70fce6..f498da1cce7a 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -48,10 +48,10 @@ static inline void cache_wback_all(void)
48 unsigned long data; 48 unsigned long data;
49 int v = SH_CACHE_UPDATED | SH_CACHE_VALID; 49 int v = SH_CACHE_UPDATED | SH_CACHE_VALID;
50 50
51 data = ctrl_inl(addr); 51 data = __raw_readl(addr);
52 52
53 if ((data & v) == v) 53 if ((data & v) == v)
54 ctrl_outl(data & ~v, addr); 54 __raw_writel(data & ~v, addr);
55 55
56 } 56 }
57 57
@@ -78,7 +78,7 @@ static void sh7705_flush_icache_range(void *args)
78/* 78/*
79 * Writeback&Invalidate the D-cache of the page 79 * Writeback&Invalidate the D-cache of the page
80 */ 80 */
81static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys) 81static void __flush_dcache_page(unsigned long phys)
82{ 82{
83 unsigned long ways, waysize, addrstart; 83 unsigned long ways, waysize, addrstart;
84 unsigned long flags; 84 unsigned long flags;
@@ -115,10 +115,10 @@ static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys)
115 addr += current_cpu_data.dcache.linesz) { 115 addr += current_cpu_data.dcache.linesz) {
116 unsigned long data; 116 unsigned long data;
117 117
118 data = ctrl_inl(addr) & (0x1ffffC00 | SH_CACHE_VALID); 118 data = __raw_readl(addr) & (0x1ffffC00 | SH_CACHE_VALID);
119 if (data == phys) { 119 if (data == phys) {
120 data &= ~(SH_CACHE_VALID | SH_CACHE_UPDATED); 120 data &= ~(SH_CACHE_VALID | SH_CACHE_UPDATED);
121 ctrl_outl(data, addr); 121 __raw_writel(data, addr);
122 } 122 }
123 } 123 }
124 124
@@ -144,7 +144,7 @@ static void sh7705_flush_dcache_page(void *arg)
144 __flush_dcache_page(__pa(page_address(page))); 144 __flush_dcache_page(__pa(page_address(page)));
145} 145}
146 146
147static void __uses_jump_to_uncached sh7705_flush_cache_all(void *args) 147static void sh7705_flush_cache_all(void *args)
148{ 148{
149 unsigned long flags; 149 unsigned long flags;
150 150
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index b8607fa7ae12..0f4095d7ac8b 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -2,7 +2,7 @@
2 * arch/sh/mm/cache.c 2 * arch/sh/mm/cache.c
3 * 3 *
4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
5 * Copyright (C) 2002 - 2009 Paul Mundt 5 * Copyright (C) 2002 - 2010 Paul Mundt
6 * 6 *
7 * Released under the terms of the GNU GPL v2.0. 7 * Released under the terms of the GNU GPL v2.0.
8 */ 8 */
@@ -41,8 +41,17 @@ static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info,
41 int wait) 41 int wait)
42{ 42{
43 preempt_disable(); 43 preempt_disable();
44 smp_call_function(func, info, wait); 44
45 /*
46 * It's possible that this gets called early on when IRQs are
47 * still disabled due to ioremapping by the boot CPU, so don't
48 * even attempt IPIs unless there are other CPUs online.
49 */
50 if (num_online_cpus() > 1)
51 smp_call_function(func, info, wait);
52
45 func(info); 53 func(info);
54
46 preempt_enable(); 55 preempt_enable();
47} 56}
48 57
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index 47530104e0ad..28e22839c665 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -53,6 +53,9 @@ static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
53 if (!pud_present(*pud_k)) 53 if (!pud_present(*pud_k))
54 return NULL; 54 return NULL;
55 55
56 if (!pud_present(*pud))
57 set_pud(pud, *pud_k);
58
56 pmd = pmd_offset(pud, address); 59 pmd = pmd_offset(pud, address);
57 pmd_k = pmd_offset(pud_k, address); 60 pmd_k = pmd_offset(pud_k, address);
58 if (!pmd_present(*pmd_k)) 61 if (!pmd_present(*pmd_k))
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 432acd07e76a..68028e8f26ce 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -21,25 +21,13 @@
21#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
22#include <asm/sections.h> 22#include <asm/sections.h>
23#include <asm/cache.h> 23#include <asm/cache.h>
24#include <asm/sizes.h>
24 25
25DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 26DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
26pgd_t swapper_pg_dir[PTRS_PER_PGD]; 27pgd_t swapper_pg_dir[PTRS_PER_PGD];
27 28
28#ifdef CONFIG_SUPERH32
29/*
30 * Handle trivial transitions between cached and uncached
31 * segments, making use of the 1:1 mapping relationship in
32 * 512MB lowmem.
33 *
34 * This is the offset of the uncached section from its cached alias.
35 * Default value only valid in 29 bit mode, in 32bit mode will be
36 * overridden in pmb_init.
37 */
38unsigned long cached_to_uncached = P2SEG - P1SEG;
39#endif
40
41#ifdef CONFIG_MMU 29#ifdef CONFIG_MMU
42static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) 30static pte_t *__get_pte_phys(unsigned long addr)
43{ 31{
44 pgd_t *pgd; 32 pgd_t *pgd;
45 pud_t *pud; 33 pud_t *pud;
@@ -49,22 +37,30 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
49 pgd = pgd_offset_k(addr); 37 pgd = pgd_offset_k(addr);
50 if (pgd_none(*pgd)) { 38 if (pgd_none(*pgd)) {
51 pgd_ERROR(*pgd); 39 pgd_ERROR(*pgd);
52 return; 40 return NULL;
53 } 41 }
54 42
55 pud = pud_alloc(NULL, pgd, addr); 43 pud = pud_alloc(NULL, pgd, addr);
56 if (unlikely(!pud)) { 44 if (unlikely(!pud)) {
57 pud_ERROR(*pud); 45 pud_ERROR(*pud);
58 return; 46 return NULL;
59 } 47 }
60 48
61 pmd = pmd_alloc(NULL, pud, addr); 49 pmd = pmd_alloc(NULL, pud, addr);
62 if (unlikely(!pmd)) { 50 if (unlikely(!pmd)) {
63 pmd_ERROR(*pmd); 51 pmd_ERROR(*pmd);
64 return; 52 return NULL;
65 } 53 }
66 54
67 pte = pte_offset_kernel(pmd, addr); 55 pte = pte_offset_kernel(pmd, addr);
56 return pte;
57}
58
59static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
60{
61 pte_t *pte;
62
63 pte = __get_pte_phys(addr);
68 if (!pte_none(*pte)) { 64 if (!pte_none(*pte)) {
69 pte_ERROR(*pte); 65 pte_ERROR(*pte);
70 return; 66 return;
@@ -72,23 +68,24 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
72 68
73 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot)); 69 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot));
74 local_flush_tlb_one(get_asid(), addr); 70 local_flush_tlb_one(get_asid(), addr);
71
72 if (pgprot_val(prot) & _PAGE_WIRED)
73 tlb_wire_entry(NULL, addr, *pte);
74}
75
76static void clear_pte_phys(unsigned long addr, pgprot_t prot)
77{
78 pte_t *pte;
79
80 pte = __get_pte_phys(addr);
81
82 if (pgprot_val(prot) & _PAGE_WIRED)
83 tlb_unwire_entry();
84
85 set_pte(pte, pfn_pte(0, __pgprot(0)));
86 local_flush_tlb_one(get_asid(), addr);
75} 87}
76 88
77/*
78 * As a performance optimization, other platforms preserve the fixmap mapping
79 * across a context switch, we don't presently do this, but this could be done
80 * in a similar fashion as to the wired TLB interface that sh64 uses (by way
81 * of the memory mapped UTLB configuration) -- this unfortunately forces us to
82 * give up a TLB entry for each mapping we want to preserve. While this may be
83 * viable for a small number of fixmaps, it's not particularly useful for
84 * everything and needs to be carefully evaluated. (ie, we may want this for
85 * the vsyscall page).
86 *
87 * XXX: Perhaps add a _PAGE_WIRED flag or something similar that we can pass
88 * in at __set_fixmap() time to determine the appropriate behavior to follow.
89 *
90 * -- PFM.
91 */
92void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot) 89void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot)
93{ 90{
94 unsigned long address = __fix_to_virt(idx); 91 unsigned long address = __fix_to_virt(idx);
@@ -101,6 +98,18 @@ void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot)
101 set_pte_phys(address, phys, prot); 98 set_pte_phys(address, phys, prot);
102} 99}
103 100
101void __clear_fixmap(enum fixed_addresses idx, pgprot_t prot)
102{
103 unsigned long address = __fix_to_virt(idx);
104
105 if (idx >= __end_of_fixed_addresses) {
106 BUG();
107 return;
108 }
109
110 clear_pte_phys(address, prot);
111}
112
104void __init page_table_range_init(unsigned long start, unsigned long end, 113void __init page_table_range_init(unsigned long start, unsigned long end,
105 pgd_t *pgd_base) 114 pgd_t *pgd_base)
106{ 115{
@@ -120,7 +129,13 @@ void __init page_table_range_init(unsigned long start, unsigned long end,
120 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) { 129 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
121 pud = (pud_t *)pgd; 130 pud = (pud_t *)pgd;
122 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) { 131 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) {
132#ifdef __PAGETABLE_PMD_FOLDED
123 pmd = (pmd_t *)pud; 133 pmd = (pmd_t *)pud;
134#else
135 pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
136 pud_populate(&init_mm, pud, pmd);
137 pmd += k;
138#endif
124 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) { 139 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) {
125 if (pmd_none(*pmd)) { 140 if (pmd_none(*pmd)) {
126 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); 141 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
@@ -182,9 +197,6 @@ void __init paging_init(void)
182 } 197 }
183 198
184 free_area_init_nodes(max_zone_pfns); 199 free_area_init_nodes(max_zone_pfns);
185
186 /* Set up the uncached fixmap */
187 set_fixmap_nocache(FIX_UNCACHED, __pa(&__uncached_start));
188} 200}
189 201
190/* 202/*
@@ -195,6 +207,8 @@ static void __init iommu_init(void)
195 no_iommu_init(); 207 no_iommu_init();
196} 208}
197 209
210unsigned int mem_init_done = 0;
211
198void __init mem_init(void) 212void __init mem_init(void)
199{ 213{
200 int codesize, datasize, initsize; 214 int codesize, datasize, initsize;
@@ -231,6 +245,8 @@ void __init mem_init(void)
231 memset(empty_zero_page, 0, PAGE_SIZE); 245 memset(empty_zero_page, 0, PAGE_SIZE);
232 __flush_wback_region(empty_zero_page, PAGE_SIZE); 246 __flush_wback_region(empty_zero_page, PAGE_SIZE);
233 247
248 vsyscall_init();
249
234 codesize = (unsigned long) &_etext - (unsigned long) &_text; 250 codesize = (unsigned long) &_etext - (unsigned long) &_text;
235 datasize = (unsigned long) &_edata - (unsigned long) &_etext; 251 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
236 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; 252 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
@@ -243,8 +259,48 @@ void __init mem_init(void)
243 datasize >> 10, 259 datasize >> 10,
244 initsize >> 10); 260 initsize >> 10);
245 261
246 /* Initialize the vDSO */ 262 printk(KERN_INFO "virtual kernel memory layout:\n"
247 vsyscall_init(); 263 " fixmap : 0x%08lx - 0x%08lx (%4ld kB)\n"
264#ifdef CONFIG_HIGHMEM
265 " pkmap : 0x%08lx - 0x%08lx (%4ld kB)\n"
266#endif
267 " vmalloc : 0x%08lx - 0x%08lx (%4ld MB)\n"
268 " lowmem : 0x%08lx - 0x%08lx (%4ld MB) (cached)\n"
269#ifdef CONFIG_UNCACHED_MAPPING
270 " : 0x%08lx - 0x%08lx (%4ld MB) (uncached)\n"
271#endif
272 " .init : 0x%08lx - 0x%08lx (%4ld kB)\n"
273 " .data : 0x%08lx - 0x%08lx (%4ld kB)\n"
274 " .text : 0x%08lx - 0x%08lx (%4ld kB)\n",
275 FIXADDR_START, FIXADDR_TOP,
276 (FIXADDR_TOP - FIXADDR_START) >> 10,
277
278#ifdef CONFIG_HIGHMEM
279 PKMAP_BASE, PKMAP_BASE+LAST_PKMAP*PAGE_SIZE,
280 (LAST_PKMAP*PAGE_SIZE) >> 10,
281#endif
282
283 (unsigned long)VMALLOC_START, VMALLOC_END,
284 (VMALLOC_END - VMALLOC_START) >> 20,
285
286 (unsigned long)memory_start, (unsigned long)high_memory,
287 ((unsigned long)high_memory - (unsigned long)memory_start) >> 20,
288
289#ifdef CONFIG_UNCACHED_MAPPING
290 uncached_start, uncached_end, uncached_size >> 20,
291#endif
292
293 (unsigned long)&__init_begin, (unsigned long)&__init_end,
294 ((unsigned long)&__init_end -
295 (unsigned long)&__init_begin) >> 10,
296
297 (unsigned long)&_etext, (unsigned long)&_edata,
298 ((unsigned long)&_edata - (unsigned long)&_etext) >> 10,
299
300 (unsigned long)&_text, (unsigned long)&_etext,
301 ((unsigned long)&_etext - (unsigned long)&_text) >> 10);
302
303 mem_init_done = 1;
248} 304}
249 305
250void free_initmem(void) 306void free_initmem(void)
@@ -277,35 +333,6 @@ void free_initrd_mem(unsigned long start, unsigned long end)
277} 333}
278#endif 334#endif
279 335
280#if THREAD_SHIFT < PAGE_SHIFT
281static struct kmem_cache *thread_info_cache;
282
283struct thread_info *alloc_thread_info(struct task_struct *tsk)
284{
285 struct thread_info *ti;
286
287 ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
288 if (unlikely(ti == NULL))
289 return NULL;
290#ifdef CONFIG_DEBUG_STACK_USAGE
291 memset(ti, 0, THREAD_SIZE);
292#endif
293 return ti;
294}
295
296void free_thread_info(struct thread_info *ti)
297{
298 kmem_cache_free(thread_info_cache, ti);
299}
300
301void thread_info_cache_init(void)
302{
303 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
304 THREAD_SIZE, 0, NULL);
305 BUG_ON(thread_info_cache == NULL);
306}
307#endif /* THREAD_SHIFT < PAGE_SHIFT */
308
309#ifdef CONFIG_MEMORY_HOTPLUG 336#ifdef CONFIG_MEMORY_HOTPLUG
310int arch_add_memory(int nid, u64 start, u64 size) 337int arch_add_memory(int nid, u64 start, u64 size)
311{ 338{
@@ -336,10 +363,3 @@ EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
336#endif 363#endif
337 364
338#endif /* CONFIG_MEMORY_HOTPLUG */ 365#endif /* CONFIG_MEMORY_HOTPLUG */
339
340#ifdef CONFIG_PMB
341int __in_29bit_mode(void)
342{
343 return !(ctrl_inl(PMB_PASCR) & PASCR_SE);
344}
345#endif /* CONFIG_PMB */
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap.c
index 2141befb4f91..c68d2d7d00a9 100644
--- a/arch/sh/mm/ioremap_32.c
+++ b/arch/sh/mm/ioremap.c
@@ -1,13 +1,13 @@
1/* 1/*
2 * arch/sh/mm/ioremap.c 2 * arch/sh/mm/ioremap.c
3 * 3 *
4 * (C) Copyright 1995 1996 Linus Torvalds
5 * (C) Copyright 2005 - 2010 Paul Mundt
6 *
4 * Re-map IO memory to kernel address space so that we can access it. 7 * Re-map IO memory to kernel address space so that we can access it.
5 * This is needed for high PCI addresses that aren't mapped in the 8 * This is needed for high PCI addresses that aren't mapped in the
6 * 640k-1MB IO memory area on PC's 9 * 640k-1MB IO memory area on PC's
7 * 10 *
8 * (C) Copyright 1995 1996 Linus Torvalds
9 * (C) Copyright 2005, 2006 Paul Mundt
10 *
11 * This file is subject to the terms and conditions of the GNU General 11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of this 12 * Public License. See the file "COPYING" in the main directory of this
13 * archive for more details. 13 * archive for more details.
@@ -33,12 +33,12 @@
33 * have to convert them into an offset in a page-aligned mapping, but the 33 * have to convert them into an offset in a page-aligned mapping, but the
34 * caller shouldn't need to know that small detail. 34 * caller shouldn't need to know that small detail.
35 */ 35 */
36void __iomem *__ioremap_caller(unsigned long phys_addr, unsigned long size, 36void __iomem * __init_refok
37 unsigned long flags, void *caller) 37__ioremap_caller(unsigned long phys_addr, unsigned long size,
38 pgprot_t pgprot, void *caller)
38{ 39{
39 struct vm_struct *area; 40 struct vm_struct *area;
40 unsigned long offset, last_addr, addr, orig_addr; 41 unsigned long offset, last_addr, addr, orig_addr;
41 pgprot_t pgprot;
42 42
43 /* Don't allow wraparound or zero size */ 43 /* Don't allow wraparound or zero size */
44 last_addr = phys_addr + size - 1; 44 last_addr = phys_addr + size - 1;
@@ -46,18 +46,6 @@ void __iomem *__ioremap_caller(unsigned long phys_addr, unsigned long size,
46 return NULL; 46 return NULL;
47 47
48 /* 48 /*
49 * If we're in the fixed PCI memory range, mapping through page
50 * tables is not only pointless, but also fundamentally broken.
51 * Just return the physical address instead.
52 *
53 * For boards that map a small PCI memory aperture somewhere in
54 * P1/P2 space, ioremap() will already do the right thing,
55 * and we'll never get this far.
56 */
57 if (is_pci_memory_fixed_range(phys_addr, size))
58 return (void __iomem *)phys_addr;
59
60 /*
61 * Mappings have to be page-aligned 49 * Mappings have to be page-aligned
62 */ 50 */
63 offset = phys_addr & ~PAGE_MASK; 51 offset = phys_addr & ~PAGE_MASK;
@@ -65,6 +53,12 @@ void __iomem *__ioremap_caller(unsigned long phys_addr, unsigned long size,
65 size = PAGE_ALIGN(last_addr+1) - phys_addr; 53 size = PAGE_ALIGN(last_addr+1) - phys_addr;
66 54
67 /* 55 /*
56 * If we can't yet use the regular approach, go the fixmap route.
57 */
58 if (!mem_init_done)
59 return ioremap_fixed(phys_addr, offset, size, pgprot);
60
61 /*
68 * Ok, go for it.. 62 * Ok, go for it..
69 */ 63 */
70 area = get_vm_area_caller(size, VM_IOREMAP, caller); 64 area = get_vm_area_caller(size, VM_IOREMAP, caller);
@@ -84,8 +78,9 @@ void __iomem *__ioremap_caller(unsigned long phys_addr, unsigned long size,
84 * PMB entries are all pre-faulted. 78 * PMB entries are all pre-faulted.
85 */ 79 */
86 if (unlikely(phys_addr >= P1SEG)) { 80 if (unlikely(phys_addr >= P1SEG)) {
87 unsigned long mapped = pmb_remap(addr, phys_addr, size, flags); 81 unsigned long mapped;
88 82
83 mapped = pmb_remap(addr, phys_addr, size, pgprot);
89 if (likely(mapped)) { 84 if (likely(mapped)) {
90 addr += mapped; 85 addr += mapped;
91 phys_addr += mapped; 86 phys_addr += mapped;
@@ -94,7 +89,6 @@ void __iomem *__ioremap_caller(unsigned long phys_addr, unsigned long size,
94 } 89 }
95#endif 90#endif
96 91
97 pgprot = __pgprot(pgprot_val(PAGE_KERNEL_NOCACHE) | flags);
98 if (likely(size)) 92 if (likely(size))
99 if (ioremap_page_range(addr, addr + size, phys_addr, pgprot)) { 93 if (ioremap_page_range(addr, addr + size, phys_addr, pgprot)) {
100 vunmap((void *)orig_addr); 94 vunmap((void *)orig_addr);
@@ -105,15 +99,38 @@ void __iomem *__ioremap_caller(unsigned long phys_addr, unsigned long size,
105} 99}
106EXPORT_SYMBOL(__ioremap_caller); 100EXPORT_SYMBOL(__ioremap_caller);
107 101
102/*
103 * Simple checks for non-translatable mappings.
104 */
105static inline int iomapping_nontranslatable(unsigned long offset)
106{
107#ifdef CONFIG_29BIT
108 /*
109 * In 29-bit mode this includes the fixed P1/P2 areas, as well as
110 * parts of P3.
111 */
112 if (PXSEG(offset) < P3SEG || offset >= P3_ADDR_MAX)
113 return 1;
114#endif
115
116 return 0;
117}
118
108void __iounmap(void __iomem *addr) 119void __iounmap(void __iomem *addr)
109{ 120{
110 unsigned long vaddr = (unsigned long __force)addr; 121 unsigned long vaddr = (unsigned long __force)addr;
111 unsigned long seg = PXSEG(vaddr);
112 struct vm_struct *p; 122 struct vm_struct *p;
113 123
114 if (seg < P3SEG || vaddr >= P3_ADDR_MAX) 124 /*
125 * Nothing to do if there is no translatable mapping.
126 */
127 if (iomapping_nontranslatable(vaddr))
115 return; 128 return;
116 if (is_pci_memory_fixed_range(vaddr, 0)) 129
130 /*
131 * There's no VMA if it's from an early fixed mapping.
132 */
133 if (iounmap_fixed(addr) == 0)
117 return; 134 return;
118 135
119#ifdef CONFIG_PMB 136#ifdef CONFIG_PMB
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
deleted file mode 100644
index ef434657d428..000000000000
--- a/arch/sh/mm/ioremap_64.c
+++ /dev/null
@@ -1,326 +0,0 @@
1/*
2 * arch/sh/mm/ioremap_64.c
3 *
4 * Copyright (C) 2000, 2001 Paolo Alberelli
5 * Copyright (C) 2003 - 2007 Paul Mundt
6 *
7 * Mostly derived from arch/sh/mm/ioremap.c which, in turn is mostly
8 * derived from arch/i386/mm/ioremap.c .
9 *
10 * (C) Copyright 1995 1996 Linus Torvalds
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive
14 * for more details.
15 */
16#include <linux/vmalloc.h>
17#include <linux/ioport.h>
18#include <linux/module.h>
19#include <linux/mm.h>
20#include <linux/io.h>
21#include <linux/bootmem.h>
22#include <linux/proc_fs.h>
23#include <linux/slab.h>
24#include <asm/page.h>
25#include <asm/pgalloc.h>
26#include <asm/addrspace.h>
27#include <asm/cacheflush.h>
28#include <asm/tlbflush.h>
29#include <asm/mmu.h>
30
31static struct resource shmedia_iomap = {
32 .name = "shmedia_iomap",
33 .start = IOBASE_VADDR + PAGE_SIZE,
34 .end = IOBASE_END - 1,
35};
36
37static void shmedia_mapioaddr(unsigned long pa, unsigned long va,
38 unsigned long flags);
39static void shmedia_unmapioaddr(unsigned long vaddr);
40static void __iomem *shmedia_ioremap(struct resource *res, u32 pa,
41 int sz, unsigned long flags);
42
43/*
44 * We have the same problem as the SPARC, so lets have the same comment:
45 * Our mini-allocator...
46 * Boy this is gross! We need it because we must map I/O for
47 * timers and interrupt controller before the kmalloc is available.
48 */
49
50#define XNMLN 15
51#define XNRES 10
52
53struct xresource {
54 struct resource xres; /* Must be first */
55 int xflag; /* 1 == used */
56 char xname[XNMLN+1];
57};
58
59static struct xresource xresv[XNRES];
60
61static struct xresource *xres_alloc(void)
62{
63 struct xresource *xrp;
64 int n;
65
66 xrp = xresv;
67 for (n = 0; n < XNRES; n++) {
68 if (xrp->xflag == 0) {
69 xrp->xflag = 1;
70 return xrp;
71 }
72 xrp++;
73 }
74 return NULL;
75}
76
77static void xres_free(struct xresource *xrp)
78{
79 xrp->xflag = 0;
80}
81
82static struct resource *shmedia_find_resource(struct resource *root,
83 unsigned long vaddr)
84{
85 struct resource *res;
86
87 for (res = root->child; res; res = res->sibling)
88 if (res->start <= vaddr && res->end >= vaddr)
89 return res;
90
91 return NULL;
92}
93
94static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size,
95 const char *name, unsigned long flags)
96{
97 struct xresource *xres;
98 struct resource *res;
99 char *tack;
100 int tlen;
101
102 if (name == NULL)
103 name = "???";
104
105 xres = xres_alloc();
106 if (xres != 0) {
107 tack = xres->xname;
108 res = &xres->xres;
109 } else {
110 printk_once(KERN_NOTICE "%s: done with statics, "
111 "switching to kmalloc\n", __func__);
112 tlen = strlen(name);
113 tack = kmalloc(sizeof(struct resource) + tlen + 1, GFP_KERNEL);
114 if (!tack)
115 return NULL;
116 memset(tack, 0, sizeof(struct resource));
117 res = (struct resource *) tack;
118 tack += sizeof(struct resource);
119 }
120
121 strncpy(tack, name, XNMLN);
122 tack[XNMLN] = 0;
123 res->name = tack;
124
125 return shmedia_ioremap(res, phys, size, flags);
126}
127
128static void __iomem *shmedia_ioremap(struct resource *res, u32 pa, int sz,
129 unsigned long flags)
130{
131 unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
132 unsigned long round_sz = (offset + sz + PAGE_SIZE-1) & PAGE_MASK;
133 unsigned long va;
134 unsigned int psz;
135
136 if (allocate_resource(&shmedia_iomap, res, round_sz,
137 shmedia_iomap.start, shmedia_iomap.end,
138 PAGE_SIZE, NULL, NULL) != 0) {
139 panic("alloc_io_res(%s): cannot occupy\n",
140 (res->name != NULL) ? res->name : "???");
141 }
142
143 va = res->start;
144 pa &= PAGE_MASK;
145
146 psz = (res->end - res->start + (PAGE_SIZE - 1)) / PAGE_SIZE;
147
148 for (psz = res->end - res->start + 1; psz != 0; psz -= PAGE_SIZE) {
149 shmedia_mapioaddr(pa, va, flags);
150 va += PAGE_SIZE;
151 pa += PAGE_SIZE;
152 }
153
154 return (void __iomem *)(unsigned long)(res->start + offset);
155}
156
157static void shmedia_free_io(struct resource *res)
158{
159 unsigned long len = res->end - res->start + 1;
160
161 BUG_ON((len & (PAGE_SIZE - 1)) != 0);
162
163 while (len) {
164 len -= PAGE_SIZE;
165 shmedia_unmapioaddr(res->start + len);
166 }
167
168 release_resource(res);
169}
170
171static __init_refok void *sh64_get_page(void)
172{
173 void *page;
174
175 if (slab_is_available())
176 page = (void *)get_zeroed_page(GFP_KERNEL);
177 else
178 page = alloc_bootmem_pages(PAGE_SIZE);
179
180 if (!page || ((unsigned long)page & ~PAGE_MASK))
181 panic("sh64_get_page: Out of memory already?\n");
182
183 return page;
184}
185
186static void shmedia_mapioaddr(unsigned long pa, unsigned long va,
187 unsigned long flags)
188{
189 pgd_t *pgdp;
190 pud_t *pudp;
191 pmd_t *pmdp;
192 pte_t *ptep, pte;
193 pgprot_t prot;
194
195 pr_debug("shmedia_mapiopage pa %08lx va %08lx\n", pa, va);
196
197 if (!flags)
198 flags = 1; /* 1 = CB0-1 device */
199
200 pgdp = pgd_offset_k(va);
201 if (pgd_none(*pgdp) || !pgd_present(*pgdp)) {
202 pudp = (pud_t *)sh64_get_page();
203 set_pgd(pgdp, __pgd((unsigned long)pudp | _KERNPG_TABLE));
204 }
205
206 pudp = pud_offset(pgdp, va);
207 if (pud_none(*pudp) || !pud_present(*pudp)) {
208 pmdp = (pmd_t *)sh64_get_page();
209 set_pud(pudp, __pud((unsigned long)pmdp | _KERNPG_TABLE));
210 }
211
212 pmdp = pmd_offset(pudp, va);
213 if (pmd_none(*pmdp) || !pmd_present(*pmdp)) {
214 ptep = (pte_t *)sh64_get_page();
215 set_pmd(pmdp, __pmd((unsigned long)ptep + _PAGE_TABLE));
216 }
217
218 prot = __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE |
219 _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SHARED | flags);
220
221 pte = pfn_pte(pa >> PAGE_SHIFT, prot);
222 ptep = pte_offset_kernel(pmdp, va);
223
224 if (!pte_none(*ptep) &&
225 pte_val(*ptep) != pte_val(pte))
226 pte_ERROR(*ptep);
227
228 set_pte(ptep, pte);
229
230 flush_tlb_kernel_range(va, PAGE_SIZE);
231}
232
233static void shmedia_unmapioaddr(unsigned long vaddr)
234{
235 pgd_t *pgdp;
236 pud_t *pudp;
237 pmd_t *pmdp;
238 pte_t *ptep;
239
240 pgdp = pgd_offset_k(vaddr);
241 if (pgd_none(*pgdp) || pgd_bad(*pgdp))
242 return;
243
244 pudp = pud_offset(pgdp, vaddr);
245 if (pud_none(*pudp) || pud_bad(*pudp))
246 return;
247
248 pmdp = pmd_offset(pudp, vaddr);
249 if (pmd_none(*pmdp) || pmd_bad(*pmdp))
250 return;
251
252 ptep = pte_offset_kernel(pmdp, vaddr);
253
254 if (pte_none(*ptep) || !pte_present(*ptep))
255 return;
256
257 clear_page((void *)ptep);
258 pte_clear(&init_mm, vaddr, ptep);
259}
260
261void __iomem *__ioremap_caller(unsigned long offset, unsigned long size,
262 unsigned long flags, void *caller)
263{
264 char name[14];
265
266 sprintf(name, "phys_%08x", (u32)offset);
267 return shmedia_alloc_io(offset, size, name, flags);
268}
269EXPORT_SYMBOL(__ioremap_caller);
270
271void __iounmap(void __iomem *virtual)
272{
273 unsigned long vaddr = (unsigned long)virtual & PAGE_MASK;
274 struct resource *res;
275 unsigned int psz;
276
277 res = shmedia_find_resource(&shmedia_iomap, vaddr);
278 if (!res) {
279 printk(KERN_ERR "%s: Failed to free 0x%08lx\n",
280 __func__, vaddr);
281 return;
282 }
283
284 psz = (res->end - res->start + (PAGE_SIZE - 1)) / PAGE_SIZE;
285
286 shmedia_free_io(res);
287
288 if ((char *)res >= (char *)xresv &&
289 (char *)res < (char *)&xresv[XNRES]) {
290 xres_free((struct xresource *)res);
291 } else {
292 kfree(res);
293 }
294}
295EXPORT_SYMBOL(__iounmap);
296
297static int
298ioremap_proc_info(char *buf, char **start, off_t fpos, int length, int *eof,
299 void *data)
300{
301 char *p = buf, *e = buf + length;
302 struct resource *r;
303 const char *nm;
304
305 for (r = ((struct resource *)data)->child; r != NULL; r = r->sibling) {
306 if (p + 32 >= e) /* Better than nothing */
307 break;
308 nm = r->name;
309 if (nm == NULL)
310 nm = "???";
311
312 p += sprintf(p, "%08lx-%08lx: %s\n",
313 (unsigned long)r->start,
314 (unsigned long)r->end, nm);
315 }
316
317 return p-buf;
318}
319
320static int __init register_proc_onchip(void)
321{
322 create_proc_read_entry("io_map", 0, 0, ioremap_proc_info,
323 &shmedia_iomap);
324 return 0;
325}
326late_initcall(register_proc_onchip);
diff --git a/arch/sh/mm/ioremap_fixed.c b/arch/sh/mm/ioremap_fixed.c
new file mode 100644
index 000000000000..0b78b1e20ef1
--- /dev/null
+++ b/arch/sh/mm/ioremap_fixed.c
@@ -0,0 +1,128 @@
1/*
2 * Re-map IO memory to kernel address space so that we can access it.
3 *
4 * These functions should only be used when it is necessary to map a
5 * physical address space into the kernel address space before ioremap()
6 * can be used, e.g. early in boot before paging_init().
7 *
8 * Copyright (C) 2009 Matt Fleming
9 */
10
11#include <linux/vmalloc.h>
12#include <linux/ioport.h>
13#include <linux/module.h>
14#include <linux/mm.h>
15#include <linux/io.h>
16#include <linux/bootmem.h>
17#include <linux/proc_fs.h>
18#include <linux/slab.h>
19#include <asm/fixmap.h>
20#include <asm/page.h>
21#include <asm/pgalloc.h>
22#include <asm/addrspace.h>
23#include <asm/cacheflush.h>
24#include <asm/tlbflush.h>
25#include <asm/mmu.h>
26#include <asm/mmu_context.h>
27
28struct ioremap_map {
29 void __iomem *addr;
30 unsigned long size;
31 unsigned long fixmap_addr;
32};
33
34static struct ioremap_map ioremap_maps[FIX_N_IOREMAPS];
35
36void __init ioremap_fixed_init(void)
37{
38 struct ioremap_map *map;
39 int i;
40
41 for (i = 0; i < FIX_N_IOREMAPS; i++) {
42 map = &ioremap_maps[i];
43 map->fixmap_addr = __fix_to_virt(FIX_IOREMAP_BEGIN + i);
44 }
45}
46
47void __init __iomem *
48ioremap_fixed(resource_size_t phys_addr, unsigned long offset,
49 unsigned long size, pgprot_t prot)
50{
51 enum fixed_addresses idx0, idx;
52 struct ioremap_map *map;
53 unsigned int nrpages;
54 int i, slot;
55
56 slot = -1;
57 for (i = 0; i < FIX_N_IOREMAPS; i++) {
58 map = &ioremap_maps[i];
59 if (!map->addr) {
60 map->size = size;
61 slot = i;
62 break;
63 }
64 }
65
66 if (slot < 0)
67 return NULL;
68
69 /*
70 * Mappings have to fit in the FIX_IOREMAP area.
71 */
72 nrpages = size >> PAGE_SHIFT;
73 if (nrpages > FIX_N_IOREMAPS)
74 return NULL;
75
76 /*
77 * Ok, go for it..
78 */
79 idx0 = FIX_IOREMAP_BEGIN + slot;
80 idx = idx0;
81 while (nrpages > 0) {
82 pgprot_val(prot) |= _PAGE_WIRED;
83 __set_fixmap(idx, phys_addr, prot);
84 phys_addr += PAGE_SIZE;
85 idx++;
86 --nrpages;
87 }
88
89 map->addr = (void __iomem *)(offset + map->fixmap_addr);
90 return map->addr;
91}
92
93int iounmap_fixed(void __iomem *addr)
94{
95 enum fixed_addresses idx;
96 struct ioremap_map *map;
97 unsigned int nrpages;
98 int i, slot;
99
100 slot = -1;
101 for (i = 0; i < FIX_N_IOREMAPS; i++) {
102 map = &ioremap_maps[i];
103 if (map->addr == addr) {
104 slot = i;
105 break;
106 }
107 }
108
109 /*
110 * If we don't match, it's not for us.
111 */
112 if (slot < 0)
113 return -EINVAL;
114
115 nrpages = map->size >> PAGE_SHIFT;
116
117 idx = FIX_IOREMAP_BEGIN + slot + nrpages - 1;
118 while (nrpages > 0) {
119 __clear_fixmap(idx, __pgprot(_PAGE_WIRED));
120 --idx;
121 --nrpages;
122 }
123
124 map->size = 0;
125 map->addr = NULL;
126
127 return 0;
128}
diff --git a/arch/sh/mm/nommu.c b/arch/sh/mm/nommu.c
index ac16c05917ef..7694f50c9034 100644
--- a/arch/sh/mm/nommu.c
+++ b/arch/sh/mm/nommu.c
@@ -94,3 +94,7 @@ void __init page_table_range_init(unsigned long start, unsigned long end,
94void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot) 94void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot)
95{ 95{
96} 96}
97
98void pgtable_cache_init(void)
99{
100}
diff --git a/arch/sh/mm/pgtable.c b/arch/sh/mm/pgtable.c
new file mode 100644
index 000000000000..6f21fb1d8726
--- /dev/null
+++ b/arch/sh/mm/pgtable.c
@@ -0,0 +1,56 @@
1#include <linux/mm.h>
2
3#define PGALLOC_GFP GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO
4
5static struct kmem_cache *pgd_cachep;
6#if PAGETABLE_LEVELS > 2
7static struct kmem_cache *pmd_cachep;
8#endif
9
10void pgd_ctor(void *x)
11{
12 pgd_t *pgd = x;
13
14 memcpy(pgd + USER_PTRS_PER_PGD,
15 swapper_pg_dir + USER_PTRS_PER_PGD,
16 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
17}
18
19void pgtable_cache_init(void)
20{
21 pgd_cachep = kmem_cache_create("pgd_cache",
22 PTRS_PER_PGD * (1<<PTE_MAGNITUDE),
23 PAGE_SIZE, SLAB_PANIC, pgd_ctor);
24#if PAGETABLE_LEVELS > 2
25 pmd_cachep = kmem_cache_create("pmd_cache",
26 PTRS_PER_PMD * (1<<PTE_MAGNITUDE),
27 PAGE_SIZE, SLAB_PANIC, NULL);
28#endif
29}
30
31pgd_t *pgd_alloc(struct mm_struct *mm)
32{
33 return kmem_cache_alloc(pgd_cachep, PGALLOC_GFP);
34}
35
36void pgd_free(struct mm_struct *mm, pgd_t *pgd)
37{
38 kmem_cache_free(pgd_cachep, pgd);
39}
40
41#if PAGETABLE_LEVELS > 2
42void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
43{
44 set_pud(pud, __pud((unsigned long)pmd));
45}
46
47pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
48{
49 return kmem_cache_alloc(pmd_cachep, PGALLOC_GFP);
50}
51
52void pmd_free(struct mm_struct *mm, pmd_t *pmd)
53{
54 kmem_cache_free(pmd_cachep, pmd);
55}
56#endif /* PAGETABLE_LEVELS > 2 */
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index 280f6a166035..198bcff5e96f 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -3,11 +3,8 @@
3 * 3 *
4 * Privileged Space Mapping Buffer (PMB) Support. 4 * Privileged Space Mapping Buffer (PMB) Support.
5 * 5 *
6 * Copyright (C) 2005, 2006, 2007 Paul Mundt 6 * Copyright (C) 2005 - 2010 Paul Mundt
7 * 7 * Copyright (C) 2010 Matt Fleming
8 * P1/P2 Section mapping definitions from map32.h, which was:
9 *
10 * Copyright 2003 (c) Lineo Solutions,Inc.
11 * 8 *
12 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive 10 * License. See the file "COPYING" in the main directory of this archive
@@ -24,47 +21,67 @@
24#include <linux/fs.h> 21#include <linux/fs.h>
25#include <linux/seq_file.h> 22#include <linux/seq_file.h>
26#include <linux/err.h> 23#include <linux/err.h>
24#include <linux/io.h>
25#include <linux/spinlock.h>
26#include <linux/rwlock.h>
27#include <asm/sizes.h>
27#include <asm/system.h> 28#include <asm/system.h>
28#include <asm/uaccess.h> 29#include <asm/uaccess.h>
29#include <asm/pgtable.h> 30#include <asm/pgtable.h>
31#include <asm/page.h>
30#include <asm/mmu.h> 32#include <asm/mmu.h>
31#include <asm/io.h>
32#include <asm/mmu_context.h> 33#include <asm/mmu_context.h>
33 34
34#define NR_PMB_ENTRIES 16 35struct pmb_entry;
36
37struct pmb_entry {
38 unsigned long vpn;
39 unsigned long ppn;
40 unsigned long flags;
41 unsigned long size;
35 42
36static void __pmb_unmap(struct pmb_entry *); 43 spinlock_t lock;
44
45 /*
46 * 0 .. NR_PMB_ENTRIES for specific entry selection, or
47 * PMB_NO_ENTRY to search for a free one
48 */
49 int entry;
37 50
51 /* Adjacent entry link for contiguous multi-entry mappings */
52 struct pmb_entry *link;
53};
54
55static void pmb_unmap_entry(struct pmb_entry *, int depth);
56
57static DEFINE_RWLOCK(pmb_rwlock);
38static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES]; 58static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES];
39static unsigned long pmb_map; 59static DECLARE_BITMAP(pmb_map, NR_PMB_ENTRIES);
40 60
41static inline unsigned long mk_pmb_entry(unsigned int entry) 61static __always_inline unsigned long mk_pmb_entry(unsigned int entry)
42{ 62{
43 return (entry & PMB_E_MASK) << PMB_E_SHIFT; 63 return (entry & PMB_E_MASK) << PMB_E_SHIFT;
44} 64}
45 65
46static inline unsigned long mk_pmb_addr(unsigned int entry) 66static __always_inline unsigned long mk_pmb_addr(unsigned int entry)
47{ 67{
48 return mk_pmb_entry(entry) | PMB_ADDR; 68 return mk_pmb_entry(entry) | PMB_ADDR;
49} 69}
50 70
51static inline unsigned long mk_pmb_data(unsigned int entry) 71static __always_inline unsigned long mk_pmb_data(unsigned int entry)
52{ 72{
53 return mk_pmb_entry(entry) | PMB_DATA; 73 return mk_pmb_entry(entry) | PMB_DATA;
54} 74}
55 75
56static int pmb_alloc_entry(void) 76static int pmb_alloc_entry(void)
57{ 77{
58 unsigned int pos; 78 int pos;
59
60repeat:
61 pos = find_first_zero_bit(&pmb_map, NR_PMB_ENTRIES);
62
63 if (unlikely(pos > NR_PMB_ENTRIES))
64 return -ENOSPC;
65 79
66 if (test_and_set_bit(pos, &pmb_map)) 80 pos = find_first_zero_bit(pmb_map, NR_PMB_ENTRIES);
67 goto repeat; 81 if (pos >= 0 && pos < NR_PMB_ENTRIES)
82 __set_bit(pos, pmb_map);
83 else
84 pos = -ENOSPC;
68 85
69 return pos; 86 return pos;
70} 87}
@@ -73,21 +90,34 @@ static struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
73 unsigned long flags, int entry) 90 unsigned long flags, int entry)
74{ 91{
75 struct pmb_entry *pmbe; 92 struct pmb_entry *pmbe;
93 unsigned long irqflags;
94 void *ret = NULL;
76 int pos; 95 int pos;
77 96
97 write_lock_irqsave(&pmb_rwlock, irqflags);
98
78 if (entry == PMB_NO_ENTRY) { 99 if (entry == PMB_NO_ENTRY) {
79 pos = pmb_alloc_entry(); 100 pos = pmb_alloc_entry();
80 if (pos < 0) 101 if (unlikely(pos < 0)) {
81 return ERR_PTR(pos); 102 ret = ERR_PTR(pos);
103 goto out;
104 }
82 } else { 105 } else {
83 if (test_bit(entry, &pmb_map)) 106 if (__test_and_set_bit(entry, pmb_map)) {
84 return ERR_PTR(-ENOSPC); 107 ret = ERR_PTR(-ENOSPC);
108 goto out;
109 }
110
85 pos = entry; 111 pos = entry;
86 } 112 }
87 113
114 write_unlock_irqrestore(&pmb_rwlock, irqflags);
115
88 pmbe = &pmb_entry_list[pos]; 116 pmbe = &pmb_entry_list[pos];
89 if (!pmbe) 117
90 return ERR_PTR(-ENOMEM); 118 memset(pmbe, 0, sizeof(struct pmb_entry));
119
120 spin_lock_init(&pmbe->lock);
91 121
92 pmbe->vpn = vpn; 122 pmbe->vpn = vpn;
93 pmbe->ppn = ppn; 123 pmbe->ppn = ppn;
@@ -95,101 +125,113 @@ static struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
95 pmbe->entry = pos; 125 pmbe->entry = pos;
96 126
97 return pmbe; 127 return pmbe;
128
129out:
130 write_unlock_irqrestore(&pmb_rwlock, irqflags);
131 return ret;
98} 132}
99 133
100static void pmb_free(struct pmb_entry *pmbe) 134static void pmb_free(struct pmb_entry *pmbe)
101{ 135{
102 int pos = pmbe->entry; 136 __clear_bit(pmbe->entry, pmb_map);
103
104 pmbe->vpn = 0;
105 pmbe->ppn = 0;
106 pmbe->flags = 0;
107 pmbe->entry = 0;
108 137
109 clear_bit(pos, &pmb_map); 138 pmbe->entry = PMB_NO_ENTRY;
139 pmbe->link = NULL;
110} 140}
111 141
112/* 142/*
113 * Must be in P2 for __set_pmb_entry() 143 * Ensure that the PMB entries match our cache configuration.
144 *
145 * When we are in 32-bit address extended mode, CCR.CB becomes
146 * invalid, so care must be taken to manually adjust cacheable
147 * translations.
114 */ 148 */
115static void __set_pmb_entry(unsigned long vpn, unsigned long ppn, 149static __always_inline unsigned long pmb_cache_flags(void)
116 unsigned long flags, int pos)
117{ 150{
118 ctrl_outl(vpn | PMB_V, mk_pmb_addr(pos)); 151 unsigned long flags = 0;
119 152
120#ifdef CONFIG_CACHE_WRITETHROUGH 153#if defined(CONFIG_CACHE_WRITETHROUGH)
121 /* 154 flags |= PMB_C | PMB_WT | PMB_UB;
122 * When we are in 32-bit address extended mode, CCR.CB becomes 155#elif defined(CONFIG_CACHE_WRITEBACK)
123 * invalid, so care must be taken to manually adjust cacheable 156 flags |= PMB_C;
124 * translations.
125 */
126 if (likely(flags & PMB_C))
127 flags |= PMB_WT;
128#endif 157#endif
129 158
130 ctrl_outl(ppn | flags | PMB_V, mk_pmb_data(pos)); 159 return flags;
131} 160}
132 161
133static void __uses_jump_to_uncached set_pmb_entry(struct pmb_entry *pmbe) 162/*
163 * Must be run uncached.
164 */
165static void __set_pmb_entry(struct pmb_entry *pmbe)
134{ 166{
135 jump_to_uncached(); 167 writel_uncached(pmbe->vpn | PMB_V, mk_pmb_addr(pmbe->entry));
136 __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, pmbe->entry); 168 writel_uncached(pmbe->ppn | pmbe->flags | PMB_V,
137 back_to_cached(); 169 mk_pmb_data(pmbe->entry));
138} 170}
139 171
140static void __uses_jump_to_uncached clear_pmb_entry(struct pmb_entry *pmbe) 172static void __clear_pmb_entry(struct pmb_entry *pmbe)
141{ 173{
142 unsigned int entry = pmbe->entry; 174 unsigned long addr, data;
143 unsigned long addr; 175 unsigned long addr_val, data_val;
144 176
145 if (unlikely(entry >= NR_PMB_ENTRIES)) 177 addr = mk_pmb_addr(pmbe->entry);
146 return; 178 data = mk_pmb_data(pmbe->entry);
147 179
148 jump_to_uncached(); 180 addr_val = __raw_readl(addr);
181 data_val = __raw_readl(data);
149 182
150 /* Clear V-bit */ 183 /* Clear V-bit */
151 addr = mk_pmb_addr(entry); 184 writel_uncached(addr_val & ~PMB_V, addr);
152 ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr); 185 writel_uncached(data_val & ~PMB_V, data);
186}
153 187
154 addr = mk_pmb_data(entry); 188static void set_pmb_entry(struct pmb_entry *pmbe)
155 ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr); 189{
190 unsigned long flags;
156 191
157 back_to_cached(); 192 spin_lock_irqsave(&pmbe->lock, flags);
193 __set_pmb_entry(pmbe);
194 spin_unlock_irqrestore(&pmbe->lock, flags);
158} 195}
159 196
160
161static struct { 197static struct {
162 unsigned long size; 198 unsigned long size;
163 int flag; 199 int flag;
164} pmb_sizes[] = { 200} pmb_sizes[] = {
165 { .size = 0x20000000, .flag = PMB_SZ_512M, }, 201 { .size = SZ_512M, .flag = PMB_SZ_512M, },
166 { .size = 0x08000000, .flag = PMB_SZ_128M, }, 202 { .size = SZ_128M, .flag = PMB_SZ_128M, },
167 { .size = 0x04000000, .flag = PMB_SZ_64M, }, 203 { .size = SZ_64M, .flag = PMB_SZ_64M, },
168 { .size = 0x01000000, .flag = PMB_SZ_16M, }, 204 { .size = SZ_16M, .flag = PMB_SZ_16M, },
169}; 205};
170 206
171long pmb_remap(unsigned long vaddr, unsigned long phys, 207long pmb_remap(unsigned long vaddr, unsigned long phys,
172 unsigned long size, unsigned long flags) 208 unsigned long size, pgprot_t prot)
173{ 209{
174 struct pmb_entry *pmbp, *pmbe; 210 struct pmb_entry *pmbp, *pmbe;
175 unsigned long wanted; 211 unsigned long wanted;
176 int pmb_flags, i; 212 int pmb_flags, i;
177 long err; 213 long err;
214 u64 flags;
215
216 flags = pgprot_val(prot);
217
218 pmb_flags = PMB_WT | PMB_UB;
178 219
179 /* Convert typical pgprot value to the PMB equivalent */ 220 /* Convert typical pgprot value to the PMB equivalent */
180 if (flags & _PAGE_CACHABLE) { 221 if (flags & _PAGE_CACHABLE) {
181 if (flags & _PAGE_WT) 222 pmb_flags |= PMB_C;
182 pmb_flags = PMB_WT; 223
183 else 224 if ((flags & _PAGE_WT) == 0)
184 pmb_flags = PMB_C; 225 pmb_flags &= ~(PMB_WT | PMB_UB);
185 } else 226 }
186 pmb_flags = PMB_WT | PMB_UB;
187 227
188 pmbp = NULL; 228 pmbp = NULL;
189 wanted = size; 229 wanted = size;
190 230
191again: 231again:
192 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) { 232 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
233 unsigned long flags;
234
193 if (size < pmb_sizes[i].size) 235 if (size < pmb_sizes[i].size)
194 continue; 236 continue;
195 237
@@ -200,18 +242,25 @@ again:
200 goto out; 242 goto out;
201 } 243 }
202 244
203 set_pmb_entry(pmbe); 245 spin_lock_irqsave(&pmbe->lock, flags);
246
247 __set_pmb_entry(pmbe);
204 248
205 phys += pmb_sizes[i].size; 249 phys += pmb_sizes[i].size;
206 vaddr += pmb_sizes[i].size; 250 vaddr += pmb_sizes[i].size;
207 size -= pmb_sizes[i].size; 251 size -= pmb_sizes[i].size;
208 252
253 pmbe->size = pmb_sizes[i].size;
254
209 /* 255 /*
210 * Link adjacent entries that span multiple PMB entries 256 * Link adjacent entries that span multiple PMB entries
211 * for easier tear-down. 257 * for easier tear-down.
212 */ 258 */
213 if (likely(pmbp)) 259 if (likely(pmbp)) {
260 spin_lock(&pmbp->lock);
214 pmbp->link = pmbe; 261 pmbp->link = pmbe;
262 spin_unlock(&pmbp->lock);
263 }
215 264
216 pmbp = pmbe; 265 pmbp = pmbe;
217 266
@@ -221,16 +270,17 @@ again:
221 * pmb_sizes[i].size again. 270 * pmb_sizes[i].size again.
222 */ 271 */
223 i--; 272 i--;
273
274 spin_unlock_irqrestore(&pmbe->lock, flags);
224 } 275 }
225 276
226 if (size >= 0x1000000) 277 if (size >= SZ_16M)
227 goto again; 278 goto again;
228 279
229 return wanted - size; 280 return wanted - size;
230 281
231out: 282out:
232 if (pmbp) 283 pmb_unmap_entry(pmbp, NR_PMB_ENTRIES);
233 __pmb_unmap(pmbp);
234 284
235 return err; 285 return err;
236} 286}
@@ -240,24 +290,52 @@ void pmb_unmap(unsigned long addr)
240 struct pmb_entry *pmbe = NULL; 290 struct pmb_entry *pmbe = NULL;
241 int i; 291 int i;
242 292
293 read_lock(&pmb_rwlock);
294
243 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) { 295 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
244 if (test_bit(i, &pmb_map)) { 296 if (test_bit(i, pmb_map)) {
245 pmbe = &pmb_entry_list[i]; 297 pmbe = &pmb_entry_list[i];
246 if (pmbe->vpn == addr) 298 if (pmbe->vpn == addr)
247 break; 299 break;
248 } 300 }
249 } 301 }
250 302
251 if (unlikely(!pmbe)) 303 read_unlock(&pmb_rwlock);
252 return;
253 304
254 __pmb_unmap(pmbe); 305 pmb_unmap_entry(pmbe, NR_PMB_ENTRIES);
255} 306}
256 307
257static void __pmb_unmap(struct pmb_entry *pmbe) 308static bool pmb_can_merge(struct pmb_entry *a, struct pmb_entry *b)
258{ 309{
259 BUG_ON(!test_bit(pmbe->entry, &pmb_map)); 310 return (b->vpn == (a->vpn + a->size)) &&
311 (b->ppn == (a->ppn + a->size)) &&
312 (b->flags == a->flags);
313}
260 314
315static bool pmb_size_valid(unsigned long size)
316{
317 int i;
318
319 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
320 if (pmb_sizes[i].size == size)
321 return true;
322
323 return false;
324}
325
326static int pmb_size_to_flags(unsigned long size)
327{
328 int i;
329
330 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
331 if (pmb_sizes[i].size == size)
332 return pmb_sizes[i].flag;
333
334 return 0;
335}
336
337static void __pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
338{
261 do { 339 do {
262 struct pmb_entry *pmblink = pmbe; 340 struct pmb_entry *pmblink = pmbe;
263 341
@@ -268,102 +346,312 @@ static void __pmb_unmap(struct pmb_entry *pmbe)
268 * this entry in pmb_alloc() (even if we haven't filled 346 * this entry in pmb_alloc() (even if we haven't filled
269 * it yet). 347 * it yet).
270 * 348 *
271 * Therefore, calling clear_pmb_entry() is safe as no 349 * Therefore, calling __clear_pmb_entry() is safe as no
272 * other mapping can be using that slot. 350 * other mapping can be using that slot.
273 */ 351 */
274 clear_pmb_entry(pmbe); 352 __clear_pmb_entry(pmbe);
275 353
276 pmbe = pmblink->link; 354 pmbe = pmblink->link;
277 355
278 pmb_free(pmblink); 356 pmb_free(pmblink);
279 } while (pmbe); 357 } while (pmbe && --depth);
358}
359
360static void pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
361{
362 unsigned long flags;
363
364 if (unlikely(!pmbe))
365 return;
366
367 write_lock_irqsave(&pmb_rwlock, flags);
368 __pmb_unmap_entry(pmbe, depth);
369 write_unlock_irqrestore(&pmb_rwlock, flags);
370}
371
372static __always_inline unsigned int pmb_ppn_in_range(unsigned long ppn)
373{
374 return ppn >= __pa(memory_start) && ppn < __pa(memory_end);
280} 375}
281 376
282#ifdef CONFIG_PMB 377static void __init pmb_notify(void)
283int __uses_jump_to_uncached pmb_init(void)
284{ 378{
285 unsigned int i; 379 int i;
286 long size, ret;
287 380
288 jump_to_uncached(); 381 pr_info("PMB: boot mappings:\n");
382
383 read_lock(&pmb_rwlock);
384
385 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
386 struct pmb_entry *pmbe;
387
388 if (!test_bit(i, pmb_map))
389 continue;
390
391 pmbe = &pmb_entry_list[i];
392
393 pr_info(" 0x%08lx -> 0x%08lx [ %4ldMB %2scached ]\n",
394 pmbe->vpn >> PAGE_SHIFT, pmbe->ppn >> PAGE_SHIFT,
395 pmbe->size >> 20, (pmbe->flags & PMB_C) ? "" : "un");
396 }
397
398 read_unlock(&pmb_rwlock);
399}
400
401/*
402 * Sync our software copy of the PMB mappings with those in hardware. The
403 * mappings in the hardware PMB were either set up by the bootloader or
404 * very early on by the kernel.
405 */
406static void __init pmb_synchronize(void)
407{
408 struct pmb_entry *pmbp = NULL;
409 int i, j;
289 410
290 /* 411 /*
291 * Insert PMB entries for the P1 and P2 areas so that, after 412 * Run through the initial boot mappings, log the established
292 * we've switched the MMU to 32-bit mode, the semantics of P1 413 * ones, and blow away anything that falls outside of the valid
293 * and P2 are the same as in 29-bit mode, e.g. 414 * PPN range. Specifically, we only care about existing mappings
415 * that impact the cached/uncached sections.
294 * 416 *
295 * P1 - provides a cached window onto physical memory 417 * Note that touching these can be a bit of a minefield; the boot
296 * P2 - provides an uncached window onto physical memory 418 * loader can establish multi-page mappings with the same caching
419 * attributes, so we need to ensure that we aren't modifying a
420 * mapping that we're presently executing from, or may execute
421 * from in the case of straddling page boundaries.
422 *
423 * In the future we will have to tidy up after the boot loader by
424 * jumping between the cached and uncached mappings and tearing
425 * down alternating mappings while executing from the other.
297 */ 426 */
298 size = __MEMORY_START + __MEMORY_SIZE; 427 for (i = 0; i < NR_PMB_ENTRIES; i++) {
428 unsigned long addr, data;
429 unsigned long addr_val, data_val;
430 unsigned long ppn, vpn, flags;
431 unsigned long irqflags;
432 unsigned int size;
433 struct pmb_entry *pmbe;
299 434
300 ret = pmb_remap(P1SEG, 0x00000000, size, PMB_C); 435 addr = mk_pmb_addr(i);
301 BUG_ON(ret != size); 436 data = mk_pmb_data(i);
302 437
303 ret = pmb_remap(P2SEG, 0x00000000, size, PMB_WT | PMB_UB); 438 addr_val = __raw_readl(addr);
304 BUG_ON(ret != size); 439 data_val = __raw_readl(data);
305 440
306 ctrl_outl(0, PMB_IRMCR); 441 /*
442 * Skip over any bogus entries
443 */
444 if (!(data_val & PMB_V) || !(addr_val & PMB_V))
445 continue;
307 446
308 /* PMB.SE and UB[7] */ 447 ppn = data_val & PMB_PFN_MASK;
309 ctrl_outl(PASCR_SE | (1 << 7), PMB_PASCR); 448 vpn = addr_val & PMB_PFN_MASK;
310 449
311 /* Flush out the TLB */ 450 /*
312 i = ctrl_inl(MMUCR); 451 * Only preserve in-range mappings.
313 i |= MMUCR_TI; 452 */
314 ctrl_outl(i, MMUCR); 453 if (!pmb_ppn_in_range(ppn)) {
454 /*
455 * Invalidate anything out of bounds.
456 */
457 writel_uncached(addr_val & ~PMB_V, addr);
458 writel_uncached(data_val & ~PMB_V, data);
459 continue;
460 }
315 461
316 back_to_cached(); 462 /*
463 * Update the caching attributes if necessary
464 */
465 if (data_val & PMB_C) {
466 data_val &= ~PMB_CACHE_MASK;
467 data_val |= pmb_cache_flags();
317 468
318 return 0; 469 writel_uncached(data_val, data);
470 }
471
472 size = data_val & PMB_SZ_MASK;
473 flags = size | (data_val & PMB_CACHE_MASK);
474
475 pmbe = pmb_alloc(vpn, ppn, flags, i);
476 if (IS_ERR(pmbe)) {
477 WARN_ON_ONCE(1);
478 continue;
479 }
480
481 spin_lock_irqsave(&pmbe->lock, irqflags);
482
483 for (j = 0; j < ARRAY_SIZE(pmb_sizes); j++)
484 if (pmb_sizes[j].flag == size)
485 pmbe->size = pmb_sizes[j].size;
486
487 if (pmbp) {
488 spin_lock(&pmbp->lock);
489
490 /*
491 * Compare the previous entry against the current one to
492 * see if the entries span a contiguous mapping. If so,
493 * setup the entry links accordingly. Compound mappings
494 * are later coalesced.
495 */
496 if (pmb_can_merge(pmbp, pmbe))
497 pmbp->link = pmbe;
498
499 spin_unlock(&pmbp->lock);
500 }
501
502 pmbp = pmbe;
503
504 spin_unlock_irqrestore(&pmbe->lock, irqflags);
505 }
506}
507
508static void __init pmb_merge(struct pmb_entry *head)
509{
510 unsigned long span, newsize;
511 struct pmb_entry *tail;
512 int i = 1, depth = 0;
513
514 span = newsize = head->size;
515
516 tail = head->link;
517 while (tail) {
518 span += tail->size;
519
520 if (pmb_size_valid(span)) {
521 newsize = span;
522 depth = i;
523 }
524
525 /* This is the end of the line.. */
526 if (!tail->link)
527 break;
528
529 tail = tail->link;
530 i++;
531 }
532
533 /*
534 * The merged page size must be valid.
535 */
536 if (!pmb_size_valid(newsize))
537 return;
538
539 head->flags &= ~PMB_SZ_MASK;
540 head->flags |= pmb_size_to_flags(newsize);
541
542 head->size = newsize;
543
544 __pmb_unmap_entry(head->link, depth);
545 __set_pmb_entry(head);
319} 546}
320#else 547
321int __uses_jump_to_uncached pmb_init(void) 548static void __init pmb_coalesce(void)
322{ 549{
550 unsigned long flags;
323 int i; 551 int i;
324 unsigned long addr, data;
325 552
326 jump_to_uncached(); 553 write_lock_irqsave(&pmb_rwlock, flags);
327 554
328 for (i = 0; i < PMB_ENTRY_MAX; i++) { 555 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
329 struct pmb_entry *pmbe; 556 struct pmb_entry *pmbe;
330 unsigned long vpn, ppn, flags;
331 557
332 addr = PMB_DATA + (i << PMB_E_SHIFT); 558 if (!test_bit(i, pmb_map))
333 data = ctrl_inl(addr);
334 if (!(data & PMB_V))
335 continue; 559 continue;
336 560
337 if (data & PMB_C) { 561 pmbe = &pmb_entry_list[i];
338#if defined(CONFIG_CACHE_WRITETHROUGH)
339 data |= PMB_WT;
340#elif defined(CONFIG_CACHE_WRITEBACK)
341 data &= ~PMB_WT;
342#else
343 data &= ~(PMB_C | PMB_WT);
344#endif
345 }
346 ctrl_outl(data, addr);
347 562
348 ppn = data & PMB_PFN_MASK; 563 /*
564 * We're only interested in compound mappings
565 */
566 if (!pmbe->link)
567 continue;
349 568
350 flags = data & (PMB_C | PMB_WT | PMB_UB); 569 /*
351 flags |= data & PMB_SZ_MASK; 570 * Nothing to do if it already uses the largest possible
571 * page size.
572 */
573 if (pmbe->size == SZ_512M)
574 continue;
352 575
353 addr = PMB_ADDR + (i << PMB_E_SHIFT); 576 pmb_merge(pmbe);
354 data = ctrl_inl(addr); 577 }
355 578
356 vpn = data & PMB_PFN_MASK; 579 write_unlock_irqrestore(&pmb_rwlock, flags);
580}
357 581
358 pmbe = pmb_alloc(vpn, ppn, flags, i); 582#ifdef CONFIG_UNCACHED_MAPPING
359 WARN_ON(IS_ERR(pmbe)); 583static void __init pmb_resize(void)
584{
585 int i;
586
587 /*
588 * If the uncached mapping was constructed by the kernel, it will
589 * already be a reasonable size.
590 */
591 if (uncached_size == SZ_16M)
592 return;
593
594 read_lock(&pmb_rwlock);
595
596 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
597 struct pmb_entry *pmbe;
598 unsigned long flags;
599
600 if (!test_bit(i, pmb_map))
601 continue;
602
603 pmbe = &pmb_entry_list[i];
604
605 if (pmbe->vpn != uncached_start)
606 continue;
607
608 /*
609 * Found it, now resize it.
610 */
611 spin_lock_irqsave(&pmbe->lock, flags);
612
613 pmbe->size = SZ_16M;
614 pmbe->flags &= ~PMB_SZ_MASK;
615 pmbe->flags |= pmb_size_to_flags(pmbe->size);
616
617 uncached_resize(pmbe->size);
618
619 __set_pmb_entry(pmbe);
620
621 spin_unlock_irqrestore(&pmbe->lock, flags);
360 } 622 }
361 623
362 back_to_cached(); 624 read_lock(&pmb_rwlock);
625}
626#endif
627
628void __init pmb_init(void)
629{
630 /* Synchronize software state */
631 pmb_synchronize();
363 632
364 return 0; 633 /* Attempt to combine compound mappings */
634 pmb_coalesce();
635
636#ifdef CONFIG_UNCACHED_MAPPING
637 /* Resize initial mappings, if necessary */
638 pmb_resize();
639#endif
640
641 /* Log them */
642 pmb_notify();
643
644 writel_uncached(0, PMB_IRMCR);
645
646 /* Flush out the TLB */
647 __raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR);
648 ctrl_barrier();
649}
650
651bool __in_29bit_mode(void)
652{
653 return (__raw_readl(PMB_PASCR) & PASCR_SE) == 0;
365} 654}
366#endif /* CONFIG_PMB */
367 655
368static int pmb_seq_show(struct seq_file *file, void *iter) 656static int pmb_seq_show(struct seq_file *file, void *iter)
369{ 657{
@@ -378,8 +666,8 @@ static int pmb_seq_show(struct seq_file *file, void *iter)
378 unsigned int size; 666 unsigned int size;
379 char *sz_str = NULL; 667 char *sz_str = NULL;
380 668
381 addr = ctrl_inl(mk_pmb_addr(i)); 669 addr = __raw_readl(mk_pmb_addr(i));
382 data = ctrl_inl(mk_pmb_data(i)); 670 data = __raw_readl(mk_pmb_data(i));
383 671
384 size = data & PMB_SZ_MASK; 672 size = data & PMB_SZ_MASK;
385 sz_str = (size == PMB_SZ_16M) ? " 16MB": 673 sz_str = (size == PMB_SZ_16M) ? " 16MB":
@@ -437,14 +725,21 @@ static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state)
437 if (state.event == PM_EVENT_ON && 725 if (state.event == PM_EVENT_ON &&
438 prev_state.event == PM_EVENT_FREEZE) { 726 prev_state.event == PM_EVENT_FREEZE) {
439 struct pmb_entry *pmbe; 727 struct pmb_entry *pmbe;
728
729 read_lock(&pmb_rwlock);
730
440 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) { 731 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
441 if (test_bit(i, &pmb_map)) { 732 if (test_bit(i, pmb_map)) {
442 pmbe = &pmb_entry_list[i]; 733 pmbe = &pmb_entry_list[i];
443 set_pmb_entry(pmbe); 734 set_pmb_entry(pmbe);
444 } 735 }
445 } 736 }
737
738 read_unlock(&pmb_rwlock);
446 } 739 }
740
447 prev_state = state; 741 prev_state = state;
742
448 return 0; 743 return 0;
449} 744}
450 745
@@ -462,6 +757,5 @@ static int __init pmb_sysdev_init(void)
462{ 757{
463 return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver); 758 return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver);
464} 759}
465
466subsys_initcall(pmb_sysdev_init); 760subsys_initcall(pmb_sysdev_init);
467#endif 761#endif
diff --git a/arch/sh/mm/tlb-pteaex.c b/arch/sh/mm/tlb-pteaex.c
index 409b7c2b4b9d..32dc674c550c 100644
--- a/arch/sh/mm/tlb-pteaex.c
+++ b/arch/sh/mm/tlb-pteaex.c
@@ -68,8 +68,7 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
68 * in extended mode, the legacy 8-bit ASID field in address array 1 has 68 * in extended mode, the legacy 8-bit ASID field in address array 1 has
69 * undefined behaviour. 69 * undefined behaviour.
70 */ 70 */
71void __uses_jump_to_uncached local_flush_tlb_one(unsigned long asid, 71void local_flush_tlb_one(unsigned long asid, unsigned long page)
72 unsigned long page)
73{ 72{
74 jump_to_uncached(); 73 jump_to_uncached();
75 __raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT); 74 __raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index ace8e6d2f59d..4f5f7cbdd508 100644
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -41,14 +41,14 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
41 41
42 /* Set PTEH register */ 42 /* Set PTEH register */
43 vpn = (address & MMU_VPN_MASK) | get_asid(); 43 vpn = (address & MMU_VPN_MASK) | get_asid();
44 ctrl_outl(vpn, MMU_PTEH); 44 __raw_writel(vpn, MMU_PTEH);
45 45
46 pteval = pte_val(pte); 46 pteval = pte_val(pte);
47 47
48 /* Set PTEL register */ 48 /* Set PTEL register */
49 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ 49 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
50 /* conveniently, we want all the software flags to be 0 anyway */ 50 /* conveniently, we want all the software flags to be 0 anyway */
51 ctrl_outl(pteval, MMU_PTEL); 51 __raw_writel(pteval, MMU_PTEL);
52 52
53 /* Load the TLB */ 53 /* Load the TLB */
54 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory"); 54 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
@@ -75,5 +75,5 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
75 } 75 }
76 76
77 for (i = 0; i < ways; i++) 77 for (i = 0; i < ways; i++)
78 ctrl_outl(data, addr + (i << 8)); 78 __raw_writel(data, addr + (i << 8));
79} 79}
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index 8cf550e2570f..ccac77f504a8 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -29,7 +29,7 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
29 29
30 /* Set PTEH register */ 30 /* Set PTEH register */
31 vpn = (address & MMU_VPN_MASK) | get_asid(); 31 vpn = (address & MMU_VPN_MASK) | get_asid();
32 ctrl_outl(vpn, MMU_PTEH); 32 __raw_writel(vpn, MMU_PTEH);
33 33
34 pteval = pte.pte_low; 34 pteval = pte.pte_low;
35 35
@@ -41,13 +41,13 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
41 * the protection bits (with the exception of the compat-mode SZ 41 * the protection bits (with the exception of the compat-mode SZ
42 * and PR bits, which are cleared) being written out in PTEL. 42 * and PR bits, which are cleared) being written out in PTEL.
43 */ 43 */
44 ctrl_outl(pte.pte_high, MMU_PTEA); 44 __raw_writel(pte.pte_high, MMU_PTEA);
45#else 45#else
46 if (cpu_data->flags & CPU_HAS_PTEA) { 46 if (cpu_data->flags & CPU_HAS_PTEA) {
47 /* The last 3 bits and the first one of pteval contains 47 /* The last 3 bits and the first one of pteval contains
48 * the PTEA timing control and space attribute bits 48 * the PTEA timing control and space attribute bits
49 */ 49 */
50 ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA); 50 __raw_writel(copy_ptea_attributes(pteval), MMU_PTEA);
51 } 51 }
52#endif 52#endif
53 53
@@ -57,15 +57,14 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
57 pteval |= _PAGE_WT; 57 pteval |= _PAGE_WT;
58#endif 58#endif
59 /* conveniently, we want all the software flags to be 0 anyway */ 59 /* conveniently, we want all the software flags to be 0 anyway */
60 ctrl_outl(pteval, MMU_PTEL); 60 __raw_writel(pteval, MMU_PTEL);
61 61
62 /* Load the TLB */ 62 /* Load the TLB */
63 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory"); 63 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
64 local_irq_restore(flags); 64 local_irq_restore(flags);
65} 65}
66 66
67void __uses_jump_to_uncached local_flush_tlb_one(unsigned long asid, 67void local_flush_tlb_one(unsigned long asid, unsigned long page)
68 unsigned long page)
69{ 68{
70 unsigned long addr, data; 69 unsigned long addr, data;
71 70
@@ -78,6 +77,6 @@ void __uses_jump_to_uncached local_flush_tlb_one(unsigned long asid,
78 addr = MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT; 77 addr = MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT;
79 data = page | asid; /* VALID bit is off */ 78 data = page | asid; /* VALID bit is off */
80 jump_to_uncached(); 79 jump_to_uncached();
81 ctrl_outl(data, addr); 80 __raw_writel(data, addr);
82 back_to_cached(); 81 back_to_cached();
83} 82}
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c
index fdb64e41ec50..f27dbe1c1599 100644
--- a/arch/sh/mm/tlb-sh5.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -143,3 +143,42 @@ void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr,
143 */ 143 */
144void sh64_teardown_tlb_slot(unsigned long long config_addr) 144void sh64_teardown_tlb_slot(unsigned long long config_addr)
145 __attribute__ ((alias("__flush_tlb_slot"))); 145 __attribute__ ((alias("__flush_tlb_slot")));
146
147static int dtlb_entry;
148static unsigned long long dtlb_entries[64];
149
150void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
151{
152 unsigned long long entry;
153 unsigned long paddr, flags;
154
155 BUG_ON(dtlb_entry == ARRAY_SIZE(dtlb_entries));
156
157 local_irq_save(flags);
158
159 entry = sh64_get_wired_dtlb_entry();
160 dtlb_entries[dtlb_entry++] = entry;
161
162 paddr = pte_val(pte) & _PAGE_FLAGS_HARDWARE_MASK;
163 paddr &= ~PAGE_MASK;
164
165 sh64_setup_tlb_slot(entry, addr, get_asid(), paddr);
166
167 local_irq_restore(flags);
168}
169
170void tlb_unwire_entry(void)
171{
172 unsigned long long entry;
173 unsigned long flags;
174
175 BUG_ON(!dtlb_entry);
176
177 local_irq_save(flags);
178 entry = dtlb_entries[dtlb_entry--];
179
180 sh64_teardown_tlb_slot(entry);
181 sh64_put_wired_dtlb_entry(entry);
182
183 local_irq_restore(flags);
184}
diff --git a/arch/sh/mm/tlb-urb.c b/arch/sh/mm/tlb-urb.c
new file mode 100644
index 000000000000..bb5b9098956d
--- /dev/null
+++ b/arch/sh/mm/tlb-urb.c
@@ -0,0 +1,81 @@
1/*
2 * arch/sh/mm/tlb-urb.c
3 *
4 * TLB entry wiring helpers for URB-equipped parts.
5 *
6 * Copyright (C) 2010 Matt Fleming
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/mm.h>
13#include <linux/io.h>
14#include <asm/tlb.h>
15#include <asm/mmu_context.h>
16
17/*
18 * Load the entry for 'addr' into the TLB and wire the entry.
19 */
20void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
21{
22 unsigned long status, flags;
23 int urb;
24
25 local_irq_save(flags);
26
27 /* Load the entry into the TLB */
28 __update_tlb(vma, addr, pte);
29
30 /* ... and wire it up. */
31 status = __raw_readl(MMUCR);
32 urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT;
33 status &= ~MMUCR_URB;
34
35 /*
36 * Make sure we're not trying to wire the last TLB entry slot.
37 */
38 BUG_ON(!--urb);
39
40 urb = urb % MMUCR_URB_NENTRIES;
41
42 status |= (urb << MMUCR_URB_SHIFT);
43 __raw_writel(status, MMUCR);
44 ctrl_barrier();
45
46 local_irq_restore(flags);
47}
48
49/*
50 * Unwire the last wired TLB entry.
51 *
52 * It should also be noted that it is not possible to wire and unwire
53 * TLB entries in an arbitrary order. If you wire TLB entry N, followed
54 * by entry N+1, you must unwire entry N+1 first, then entry N. In this
55 * respect, it works like a stack or LIFO queue.
56 */
57void tlb_unwire_entry(void)
58{
59 unsigned long status, flags;
60 int urb;
61
62 local_irq_save(flags);
63
64 status = __raw_readl(MMUCR);
65 urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT;
66 status &= ~MMUCR_URB;
67
68 /*
69 * Make sure we're not trying to unwire a TLB entry when none
70 * have been wired.
71 */
72 BUG_ON(urb++ == MMUCR_URB_NENTRIES);
73
74 urb = urb % MMUCR_URB_NENTRIES;
75
76 status |= (urb << MMUCR_URB_SHIFT);
77 __raw_writel(status, MMUCR);
78 ctrl_barrier();
79
80 local_irq_restore(flags);
81}
diff --git a/arch/sh/mm/tlbflush_32.c b/arch/sh/mm/tlbflush_32.c
index 6f45c1f8a7fe..004bb3f25b5f 100644
--- a/arch/sh/mm/tlbflush_32.c
+++ b/arch/sh/mm/tlbflush_32.c
@@ -132,9 +132,9 @@ void local_flush_tlb_all(void)
132 * It's same position, bit #2. 132 * It's same position, bit #2.
133 */ 133 */
134 local_irq_save(flags); 134 local_irq_save(flags);
135 status = ctrl_inl(MMUCR); 135 status = __raw_readl(MMUCR);
136 status |= 0x04; 136 status |= 0x04;
137 ctrl_outl(status, MMUCR); 137 __raw_writel(status, MMUCR);
138 ctrl_barrier(); 138 ctrl_barrier();
139 local_irq_restore(flags); 139 local_irq_restore(flags);
140} 140}
diff --git a/arch/sh/mm/tlbflush_64.c b/arch/sh/mm/tlbflush_64.c
index de0b0e881823..706da1d3a67a 100644
--- a/arch/sh/mm/tlbflush_64.c
+++ b/arch/sh/mm/tlbflush_64.c
@@ -36,7 +36,7 @@ extern void die(const char *,struct pt_regs *,long);
36 36
37static inline void print_prots(pgprot_t prot) 37static inline void print_prots(pgprot_t prot)
38{ 38{
39 printk("prot is 0x%08lx\n",pgprot_val(prot)); 39 printk("prot is 0x%016llx\n",pgprot_val(prot));
40 40
41 printk("%s %s %s %s %s\n",PPROT(_PAGE_SHARED),PPROT(_PAGE_READ), 41 printk("%s %s %s %s %s\n",PPROT(_PAGE_SHARED),PPROT(_PAGE_READ),
42 PPROT(_PAGE_EXECUTE),PPROT(_PAGE_WRITE),PPROT(_PAGE_USER)); 42 PPROT(_PAGE_EXECUTE),PPROT(_PAGE_WRITE),PPROT(_PAGE_USER));
diff --git a/arch/sh/mm/uncached.c b/arch/sh/mm/uncached.c
new file mode 100644
index 000000000000..cf20a5c5136a
--- /dev/null
+++ b/arch/sh/mm/uncached.c
@@ -0,0 +1,34 @@
1#include <linux/init.h>
2#include <asm/sizes.h>
3#include <asm/page.h>
4
5/*
6 * This is the offset of the uncached section from its cached alias.
7 *
8 * Legacy platforms handle trivial transitions between cached and
9 * uncached segments by making use of the 1:1 mapping relationship in
10 * 512MB lowmem, others via a special uncached mapping.
11 *
12 * Default value only valid in 29 bit mode, in 32bit mode this will be
13 * updated by the early PMB initialization code.
14 */
15unsigned long cached_to_uncached = SZ_512M;
16unsigned long uncached_size = SZ_512M;
17unsigned long uncached_start, uncached_end;
18
19int virt_addr_uncached(unsigned long kaddr)
20{
21 return (kaddr >= uncached_start) && (kaddr < uncached_end);
22}
23
24void __init uncached_init(void)
25{
26 uncached_start = memory_end;
27 uncached_end = uncached_start + uncached_size;
28}
29
30void __init uncached_resize(unsigned long size)
31{
32 uncached_size = size;
33 uncached_end = uncached_start + uncached_size;
34}
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 6639b25d8d57..b25aa554ee5e 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -32,6 +32,7 @@ DREAMCAST SH_DREAMCAST
32SNAPGEAR SH_SECUREEDGE5410 32SNAPGEAR SH_SECUREEDGE5410
33EDOSK7705 SH_EDOSK7705 33EDOSK7705 SH_EDOSK7705
34EDOSK7760 SH_EDOSK7760 34EDOSK7760 SH_EDOSK7760
35SDK7786 SH_SDK7786
35SH4202_MICRODEV SH_SH4202_MICRODEV 36SH4202_MICRODEV SH_SH4202_MICRODEV
36SH03 SH_SH03 37SH03 SH_SH03
37LANDISK SH_LANDISK 38LANDISK SH_LANDISK
diff --git a/arch/x86/mm/kmemcheck/kmemcheck.c b/arch/x86/mm/kmemcheck/kmemcheck.c
index 8cc183344140..b3b531a4f8e5 100644
--- a/arch/x86/mm/kmemcheck/kmemcheck.c
+++ b/arch/x86/mm/kmemcheck/kmemcheck.c
@@ -337,7 +337,7 @@ bool kmemcheck_is_obj_initialized(unsigned long addr, size_t size)
337 if (!shadow) 337 if (!shadow)
338 return true; 338 return true;
339 339
340 status = kmemcheck_shadow_test(shadow, size); 340 status = kmemcheck_shadow_test_all(shadow, size);
341 341
342 return status == KMEMCHECK_SHADOW_INITIALIZED; 342 return status == KMEMCHECK_SHADOW_INITIALIZED;
343} 343}
diff --git a/arch/x86/mm/kmemcheck/shadow.c b/arch/x86/mm/kmemcheck/shadow.c
index 3f66b82076a3..aec124214d97 100644
--- a/arch/x86/mm/kmemcheck/shadow.c
+++ b/arch/x86/mm/kmemcheck/shadow.c
@@ -125,12 +125,12 @@ void kmemcheck_mark_initialized_pages(struct page *p, unsigned int n)
125 125
126enum kmemcheck_shadow kmemcheck_shadow_test(void *shadow, unsigned int size) 126enum kmemcheck_shadow kmemcheck_shadow_test(void *shadow, unsigned int size)
127{ 127{
128#ifdef CONFIG_KMEMCHECK_PARTIAL_OK
128 uint8_t *x; 129 uint8_t *x;
129 unsigned int i; 130 unsigned int i;
130 131
131 x = shadow; 132 x = shadow;
132 133
133#ifdef CONFIG_KMEMCHECK_PARTIAL_OK
134 /* 134 /*
135 * Make sure _some_ bytes are initialized. Gcc frequently generates 135 * Make sure _some_ bytes are initialized. Gcc frequently generates
136 * code to access neighboring bytes. 136 * code to access neighboring bytes.
@@ -139,13 +139,25 @@ enum kmemcheck_shadow kmemcheck_shadow_test(void *shadow, unsigned int size)
139 if (x[i] == KMEMCHECK_SHADOW_INITIALIZED) 139 if (x[i] == KMEMCHECK_SHADOW_INITIALIZED)
140 return x[i]; 140 return x[i];
141 } 141 }
142
143 return x[0];
142#else 144#else
145 return kmemcheck_shadow_test_all(shadow, size);
146#endif
147}
148
149enum kmemcheck_shadow kmemcheck_shadow_test_all(void *shadow, unsigned int size)
150{
151 uint8_t *x;
152 unsigned int i;
153
154 x = shadow;
155
143 /* All bytes must be initialized. */ 156 /* All bytes must be initialized. */
144 for (i = 0; i < size; ++i) { 157 for (i = 0; i < size; ++i) {
145 if (x[i] != KMEMCHECK_SHADOW_INITIALIZED) 158 if (x[i] != KMEMCHECK_SHADOW_INITIALIZED)
146 return x[i]; 159 return x[i];
147 } 160 }
148#endif
149 161
150 return x[0]; 162 return x[0];
151} 163}
diff --git a/arch/x86/mm/kmemcheck/shadow.h b/arch/x86/mm/kmemcheck/shadow.h
index af46d9ab9d86..ff0b2f70fbcb 100644
--- a/arch/x86/mm/kmemcheck/shadow.h
+++ b/arch/x86/mm/kmemcheck/shadow.h
@@ -11,6 +11,8 @@ enum kmemcheck_shadow {
11void *kmemcheck_shadow_lookup(unsigned long address); 11void *kmemcheck_shadow_lookup(unsigned long address);
12 12
13enum kmemcheck_shadow kmemcheck_shadow_test(void *shadow, unsigned int size); 13enum kmemcheck_shadow kmemcheck_shadow_test(void *shadow, unsigned int size);
14enum kmemcheck_shadow kmemcheck_shadow_test_all(void *shadow,
15 unsigned int size);
14void kmemcheck_shadow_set(void *shadow, unsigned int size); 16void kmemcheck_shadow_set(void *shadow, unsigned int size);
15 17
16#endif 18#endif
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 81c185a6971f..6a2e295ee227 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -114,6 +114,16 @@ config CRYPTO_NULL
114 help 114 help
115 These are 'Null' algorithms, used by IPsec, which do nothing. 115 These are 'Null' algorithms, used by IPsec, which do nothing.
116 116
117config CRYPTO_PCRYPT
118 tristate "Parallel crypto engine (EXPERIMENTAL)"
119 depends on SMP && EXPERIMENTAL
120 select PADATA
121 select CRYPTO_MANAGER
122 select CRYPTO_AEAD
123 help
124 This converts an arbitrary crypto algorithm into a parallel
125 algorithm that executes in kernel threads.
126
117config CRYPTO_WORKQUEUE 127config CRYPTO_WORKQUEUE
118 tristate 128 tristate
119 129
diff --git a/crypto/Makefile b/crypto/Makefile
index 9e8f61908cb5..d7e6441df7fe 100644
--- a/crypto/Makefile
+++ b/crypto/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_CRYPTO_XTS) += xts.o
56obj-$(CONFIG_CRYPTO_CTR) += ctr.o 56obj-$(CONFIG_CRYPTO_CTR) += ctr.o
57obj-$(CONFIG_CRYPTO_GCM) += gcm.o 57obj-$(CONFIG_CRYPTO_GCM) += gcm.o
58obj-$(CONFIG_CRYPTO_CCM) += ccm.o 58obj-$(CONFIG_CRYPTO_CCM) += ccm.o
59obj-$(CONFIG_CRYPTO_PCRYPT) += pcrypt.o
59obj-$(CONFIG_CRYPTO_CRYPTD) += cryptd.o 60obj-$(CONFIG_CRYPTO_CRYPTD) += cryptd.o
60obj-$(CONFIG_CRYPTO_DES) += des_generic.o 61obj-$(CONFIG_CRYPTO_DES) += des_generic.o
61obj-$(CONFIG_CRYPTO_FCRYPT) += fcrypt.o 62obj-$(CONFIG_CRYPTO_FCRYPT) += fcrypt.o
diff --git a/crypto/ablkcipher.c b/crypto/ablkcipher.c
index f6f08336df5d..fe980dae1727 100644
--- a/crypto/ablkcipher.c
+++ b/crypto/ablkcipher.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Asynchronous block chaining cipher operations. 2 * Asynchronous block chaining cipher operations.
3 * 3 *
4 * This is the asynchronous version of blkcipher.c indicating completion 4 * This is the asynchronous version of blkcipher.c indicating completion
5 * via a callback. 5 * via a callback.
6 * 6 *
@@ -8,7 +8,7 @@
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free 10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option) 11 * Software Foundation; either version 2 of the License, or (at your option)
12 * any later version. 12 * any later version.
13 * 13 *
14 */ 14 */
diff --git a/crypto/aead.c b/crypto/aead.c
index 0a55da70845e..6729e8ff68e7 100644
--- a/crypto/aead.c
+++ b/crypto/aead.c
@@ -1,13 +1,13 @@
1/* 1/*
2 * AEAD: Authenticated Encryption with Associated Data 2 * AEAD: Authenticated Encryption with Associated Data
3 * 3 *
4 * This file provides API support for AEAD algorithms. 4 * This file provides API support for AEAD algorithms.
5 * 5 *
6 * Copyright (c) 2007 Herbert Xu <herbert@gondor.apana.org.au> 6 * Copyright (c) 2007 Herbert Xu <herbert@gondor.apana.org.au>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the Free 9 * under the terms of the GNU General Public License as published by the Free
10 * Software Foundation; either version 2 of the License, or (at your option) 10 * Software Foundation; either version 2 of the License, or (at your option)
11 * any later version. 11 * any later version.
12 * 12 *
13 */ 13 */
diff --git a/crypto/aes_generic.c b/crypto/aes_generic.c
index e78b7ee44a74..a68c73dae15a 100644
--- a/crypto/aes_generic.c
+++ b/crypto/aes_generic.c
@@ -1,4 +1,4 @@
1/* 1/*
2 * Cryptographic API. 2 * Cryptographic API.
3 * 3 *
4 * AES Cipher Algorithm. 4 * AES Cipher Algorithm.
@@ -1127,7 +1127,7 @@ EXPORT_SYMBOL_GPL(crypto_il_tab);
1127 1127
1128#define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b) 1128#define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b)
1129 1129
1130#define imix_col(y,x) do { \ 1130#define imix_col(y, x) do { \
1131 u = star_x(x); \ 1131 u = star_x(x); \
1132 v = star_x(u); \ 1132 v = star_x(u); \
1133 w = star_x(v); \ 1133 w = star_x(v); \
diff --git a/crypto/algapi.c b/crypto/algapi.c
index f149b1c8b76d..3e4524e6139b 100644
--- a/crypto/algapi.c
+++ b/crypto/algapi.c
@@ -230,7 +230,7 @@ static struct crypto_larval *__crypto_register_alg(struct crypto_alg *alg)
230 list_add(&alg->cra_list, &crypto_alg_list); 230 list_add(&alg->cra_list, &crypto_alg_list);
231 list_add(&larval->alg.cra_list, &crypto_alg_list); 231 list_add(&larval->alg.cra_list, &crypto_alg_list);
232 232
233out: 233out:
234 return larval; 234 return larval;
235 235
236free_larval: 236free_larval:
@@ -388,7 +388,7 @@ int crypto_unregister_alg(struct crypto_alg *alg)
388{ 388{
389 int ret; 389 int ret;
390 LIST_HEAD(list); 390 LIST_HEAD(list);
391 391
392 down_write(&crypto_alg_sem); 392 down_write(&crypto_alg_sem);
393 ret = crypto_remove_alg(alg, &list); 393 ret = crypto_remove_alg(alg, &list);
394 up_write(&crypto_alg_sem); 394 up_write(&crypto_alg_sem);
diff --git a/crypto/anubis.c b/crypto/anubis.c
index e42c3a8ba4aa..77530d571c96 100644
--- a/crypto/anubis.c
+++ b/crypto/anubis.c
@@ -469,14 +469,13 @@ static int anubis_setkey(struct crypto_tfm *tfm, const u8 *in_key,
469 u32 kappa[ANUBIS_MAX_N]; 469 u32 kappa[ANUBIS_MAX_N];
470 u32 inter[ANUBIS_MAX_N]; 470 u32 inter[ANUBIS_MAX_N];
471 471
472 switch (key_len) 472 switch (key_len) {
473 {
474 case 16: case 20: case 24: case 28: 473 case 16: case 20: case 24: case 28:
475 case 32: case 36: case 40: 474 case 32: case 36: case 40:
476 break; 475 break;
477 default: 476 default:
478 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; 477 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
479 return - EINVAL; 478 return -EINVAL;
480 } 479 }
481 480
482 ctx->key_len = key_len * 8; 481 ctx->key_len = key_len * 8;
@@ -530,23 +529,24 @@ static int anubis_setkey(struct crypto_tfm *tfm, const u8 *in_key,
530 /* 529 /*
531 * compute kappa^{r+1} from kappa^r: 530 * compute kappa^{r+1} from kappa^r:
532 */ 531 */
533 if (r == R) { 532 if (r == R)
534 break; 533 break;
535 }
536 for (i = 0; i < N; i++) { 534 for (i = 0; i < N; i++) {
537 int j = i; 535 int j = i;
538 inter[i] = T0[(kappa[j--] >> 24) ]; 536 inter[i] = T0[(kappa[j--] >> 24) ];
539 if (j < 0) j = N - 1; 537 if (j < 0)
538 j = N - 1;
540 inter[i] ^= T1[(kappa[j--] >> 16) & 0xff]; 539 inter[i] ^= T1[(kappa[j--] >> 16) & 0xff];
541 if (j < 0) j = N - 1; 540 if (j < 0)
541 j = N - 1;
542 inter[i] ^= T2[(kappa[j--] >> 8) & 0xff]; 542 inter[i] ^= T2[(kappa[j--] >> 8) & 0xff];
543 if (j < 0) j = N - 1; 543 if (j < 0)
544 j = N - 1;
544 inter[i] ^= T3[(kappa[j ] ) & 0xff]; 545 inter[i] ^= T3[(kappa[j ] ) & 0xff];
545 } 546 }
546 kappa[0] = inter[0] ^ rc[r]; 547 kappa[0] = inter[0] ^ rc[r];
547 for (i = 1; i < N; i++) { 548 for (i = 1; i < N; i++)
548 kappa[i] = inter[i]; 549 kappa[i] = inter[i];
549 }
550 } 550 }
551 551
552 /* 552 /*
@@ -690,7 +690,7 @@ static struct crypto_alg anubis_alg = {
690static int __init anubis_mod_init(void) 690static int __init anubis_mod_init(void)
691{ 691{
692 int ret = 0; 692 int ret = 0;
693 693
694 ret = crypto_register_alg(&anubis_alg); 694 ret = crypto_register_alg(&anubis_alg);
695 return ret; 695 return ret;
696} 696}
diff --git a/crypto/api.c b/crypto/api.c
index 798526d90538..033a7147e5eb 100644
--- a/crypto/api.c
+++ b/crypto/api.c
@@ -10,7 +10,7 @@
10 * 10 *
11 * This program is free software; you can redistribute it and/or modify it 11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the Free 12 * under the terms of the GNU General Public License as published by the Free
13 * Software Foundation; either version 2 of the License, or (at your option) 13 * Software Foundation; either version 2 of the License, or (at your option)
14 * any later version. 14 * any later version.
15 * 15 *
16 */ 16 */
@@ -288,11 +288,11 @@ static int crypto_init_ops(struct crypto_tfm *tfm, u32 type, u32 mask)
288 288
289 case CRYPTO_ALG_TYPE_COMPRESS: 289 case CRYPTO_ALG_TYPE_COMPRESS:
290 return crypto_init_compress_ops(tfm); 290 return crypto_init_compress_ops(tfm);
291 291
292 default: 292 default:
293 break; 293 break;
294 } 294 }
295 295
296 BUG(); 296 BUG();
297 return -EINVAL; 297 return -EINVAL;
298} 298}
@@ -315,10 +315,9 @@ static void crypto_exit_ops(struct crypto_tfm *tfm)
315 case CRYPTO_ALG_TYPE_COMPRESS: 315 case CRYPTO_ALG_TYPE_COMPRESS:
316 crypto_exit_compress_ops(tfm); 316 crypto_exit_compress_ops(tfm);
317 break; 317 break;
318 318
319 default: 319 default:
320 BUG(); 320 BUG();
321
322 } 321 }
323} 322}
324 323
@@ -593,12 +592,12 @@ int crypto_has_alg(const char *name, u32 type, u32 mask)
593{ 592{
594 int ret = 0; 593 int ret = 0;
595 struct crypto_alg *alg = crypto_alg_mod_lookup(name, type, mask); 594 struct crypto_alg *alg = crypto_alg_mod_lookup(name, type, mask);
596 595
597 if (!IS_ERR(alg)) { 596 if (!IS_ERR(alg)) {
598 crypto_mod_put(alg); 597 crypto_mod_put(alg);
599 ret = 1; 598 ret = 1;
600 } 599 }
601 600
602 return ret; 601 return ret;
603} 602}
604EXPORT_SYMBOL_GPL(crypto_has_alg); 603EXPORT_SYMBOL_GPL(crypto_has_alg);
diff --git a/crypto/authenc.c b/crypto/authenc.c
index 4d6f49a5daeb..18870906ea06 100644
--- a/crypto/authenc.c
+++ b/crypto/authenc.c
@@ -194,7 +194,7 @@ static void authenc_verify_ahash_update_done(struct crypto_async_request *areq,
194 scatterwalk_map_and_copy(ihash, areq_ctx->sg, areq_ctx->cryptlen, 194 scatterwalk_map_and_copy(ihash, areq_ctx->sg, areq_ctx->cryptlen,
195 authsize, 0); 195 authsize, 0);
196 196
197 err = memcmp(ihash, ahreq->result, authsize) ? -EBADMSG: 0; 197 err = memcmp(ihash, ahreq->result, authsize) ? -EBADMSG : 0;
198 if (err) 198 if (err)
199 goto out; 199 goto out;
200 200
@@ -231,7 +231,7 @@ static void authenc_verify_ahash_done(struct crypto_async_request *areq,
231 scatterwalk_map_and_copy(ihash, areq_ctx->sg, areq_ctx->cryptlen, 231 scatterwalk_map_and_copy(ihash, areq_ctx->sg, areq_ctx->cryptlen,
232 authsize, 0); 232 authsize, 0);
233 233
234 err = memcmp(ihash, ahreq->result, authsize) ? -EBADMSG: 0; 234 err = memcmp(ihash, ahreq->result, authsize) ? -EBADMSG : 0;
235 if (err) 235 if (err)
236 goto out; 236 goto out;
237 237
@@ -464,7 +464,7 @@ static int crypto_authenc_verify(struct aead_request *req,
464 ihash = ohash + authsize; 464 ihash = ohash + authsize;
465 scatterwalk_map_and_copy(ihash, areq_ctx->sg, areq_ctx->cryptlen, 465 scatterwalk_map_and_copy(ihash, areq_ctx->sg, areq_ctx->cryptlen,
466 authsize, 0); 466 authsize, 0);
467 return memcmp(ihash, ohash, authsize) ? -EBADMSG: 0; 467 return memcmp(ihash, ohash, authsize) ? -EBADMSG : 0;
468} 468}
469 469
470static int crypto_authenc_iverify(struct aead_request *req, u8 *iv, 470static int crypto_authenc_iverify(struct aead_request *req, u8 *iv,
@@ -557,11 +557,11 @@ static int crypto_authenc_init_tfm(struct crypto_tfm *tfm)
557 557
558 ctx->auth = auth; 558 ctx->auth = auth;
559 ctx->enc = enc; 559 ctx->enc = enc;
560 560
561 tfm->crt_aead.reqsize = max_t(unsigned int, 561 tfm->crt_aead.reqsize = max_t(unsigned int,
562 crypto_ahash_reqsize(auth) + ctx->reqoff + 562 crypto_ahash_reqsize(auth) + ctx->reqoff +
563 sizeof(struct authenc_request_ctx) + 563 sizeof(struct authenc_request_ctx) +
564 sizeof(struct ahash_request), 564 sizeof(struct ahash_request),
565 sizeof(struct skcipher_givcrypt_request) + 565 sizeof(struct skcipher_givcrypt_request) +
566 crypto_ablkcipher_reqsize(enc) + 566 crypto_ablkcipher_reqsize(enc) +
567 crypto_ablkcipher_ivsize(enc)); 567 crypto_ablkcipher_ivsize(enc));
diff --git a/crypto/blowfish.c b/crypto/blowfish.c
index 6f5b48731922..a67d52ee0580 100644
--- a/crypto/blowfish.c
+++ b/crypto/blowfish.c
@@ -1,4 +1,4 @@
1/* 1/*
2 * Cryptographic API. 2 * Cryptographic API.
3 * 3 *
4 * Blowfish Cipher Algorithm, by Bruce Schneier. 4 * Blowfish Cipher Algorithm, by Bruce Schneier.
@@ -299,7 +299,7 @@ static const u32 bf_sbox[256 * 4] = {
299 0xb74e6132, 0xce77e25b, 0x578fdfe3, 0x3ac372e6, 299 0xb74e6132, 0xce77e25b, 0x578fdfe3, 0x3ac372e6,
300}; 300};
301 301
302/* 302/*
303 * Round loop unrolling macros, S is a pointer to a S-Box array 303 * Round loop unrolling macros, S is a pointer to a S-Box array
304 * organized in 4 unsigned longs at a row. 304 * organized in 4 unsigned longs at a row.
305 */ 305 */
@@ -315,7 +315,7 @@ static const u32 bf_sbox[256 * 4] = {
315 315
316/* 316/*
317 * The blowfish encipher, processes 64-bit blocks. 317 * The blowfish encipher, processes 64-bit blocks.
318 * NOTE: This function MUSTN'T respect endianess 318 * NOTE: This function MUSTN'T respect endianess
319 */ 319 */
320static void encrypt_block(struct bf_ctx *bctx, u32 *dst, u32 *src) 320static void encrypt_block(struct bf_ctx *bctx, u32 *dst, u32 *src)
321{ 321{
@@ -395,7 +395,7 @@ static void bf_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
395 out_blk[1] = cpu_to_be32(yl); 395 out_blk[1] = cpu_to_be32(yl);
396} 396}
397 397
398/* 398/*
399 * Calculates the blowfish S and P boxes for encryption and decryption. 399 * Calculates the blowfish S and P boxes for encryption and decryption.
400 */ 400 */
401static int bf_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen) 401static int bf_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
@@ -417,10 +417,10 @@ static int bf_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
417 417
418 /* Actual subkey generation */ 418 /* Actual subkey generation */
419 for (j = 0, i = 0; i < 16 + 2; i++) { 419 for (j = 0, i = 0; i < 16 + 2; i++) {
420 temp = (((u32 )key[j] << 24) | 420 temp = (((u32)key[j] << 24) |
421 ((u32 )key[(j + 1) % keylen] << 16) | 421 ((u32)key[(j + 1) % keylen] << 16) |
422 ((u32 )key[(j + 2) % keylen] << 8) | 422 ((u32)key[(j + 2) % keylen] << 8) |
423 ((u32 )key[(j + 3) % keylen])); 423 ((u32)key[(j + 3) % keylen]));
424 424
425 P[i] = P[i] ^ temp; 425 P[i] = P[i] ^ temp;
426 j = (j + 4) % keylen; 426 j = (j + 4) % keylen;
@@ -444,7 +444,7 @@ static int bf_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
444 S[count + 1] = data[1]; 444 S[count + 1] = data[1];
445 } 445 }
446 } 446 }
447 447
448 /* Bruce says not to bother with the weak key check. */ 448 /* Bruce says not to bother with the weak key check. */
449 return 0; 449 return 0;
450} 450}
diff --git a/crypto/camellia.c b/crypto/camellia.c
index 964635d163f4..64cff46ea5e4 100644
--- a/crypto/camellia.c
+++ b/crypto/camellia.c
@@ -39,271 +39,271 @@
39#include <asm/unaligned.h> 39#include <asm/unaligned.h>
40 40
41static const u32 camellia_sp1110[256] = { 41static const u32 camellia_sp1110[256] = {
42 0x70707000,0x82828200,0x2c2c2c00,0xececec00, 42 0x70707000, 0x82828200, 0x2c2c2c00, 0xececec00,
43 0xb3b3b300,0x27272700,0xc0c0c000,0xe5e5e500, 43 0xb3b3b300, 0x27272700, 0xc0c0c000, 0xe5e5e500,
44 0xe4e4e400,0x85858500,0x57575700,0x35353500, 44 0xe4e4e400, 0x85858500, 0x57575700, 0x35353500,
45 0xeaeaea00,0x0c0c0c00,0xaeaeae00,0x41414100, 45 0xeaeaea00, 0x0c0c0c00, 0xaeaeae00, 0x41414100,
46 0x23232300,0xefefef00,0x6b6b6b00,0x93939300, 46 0x23232300, 0xefefef00, 0x6b6b6b00, 0x93939300,
47 0x45454500,0x19191900,0xa5a5a500,0x21212100, 47 0x45454500, 0x19191900, 0xa5a5a500, 0x21212100,
48 0xededed00,0x0e0e0e00,0x4f4f4f00,0x4e4e4e00, 48 0xededed00, 0x0e0e0e00, 0x4f4f4f00, 0x4e4e4e00,
49 0x1d1d1d00,0x65656500,0x92929200,0xbdbdbd00, 49 0x1d1d1d00, 0x65656500, 0x92929200, 0xbdbdbd00,
50 0x86868600,0xb8b8b800,0xafafaf00,0x8f8f8f00, 50 0x86868600, 0xb8b8b800, 0xafafaf00, 0x8f8f8f00,
51 0x7c7c7c00,0xebebeb00,0x1f1f1f00,0xcecece00, 51 0x7c7c7c00, 0xebebeb00, 0x1f1f1f00, 0xcecece00,
52 0x3e3e3e00,0x30303000,0xdcdcdc00,0x5f5f5f00, 52 0x3e3e3e00, 0x30303000, 0xdcdcdc00, 0x5f5f5f00,
53 0x5e5e5e00,0xc5c5c500,0x0b0b0b00,0x1a1a1a00, 53 0x5e5e5e00, 0xc5c5c500, 0x0b0b0b00, 0x1a1a1a00,
54 0xa6a6a600,0xe1e1e100,0x39393900,0xcacaca00, 54 0xa6a6a600, 0xe1e1e100, 0x39393900, 0xcacaca00,
55 0xd5d5d500,0x47474700,0x5d5d5d00,0x3d3d3d00, 55 0xd5d5d500, 0x47474700, 0x5d5d5d00, 0x3d3d3d00,
56 0xd9d9d900,0x01010100,0x5a5a5a00,0xd6d6d600, 56 0xd9d9d900, 0x01010100, 0x5a5a5a00, 0xd6d6d600,
57 0x51515100,0x56565600,0x6c6c6c00,0x4d4d4d00, 57 0x51515100, 0x56565600, 0x6c6c6c00, 0x4d4d4d00,
58 0x8b8b8b00,0x0d0d0d00,0x9a9a9a00,0x66666600, 58 0x8b8b8b00, 0x0d0d0d00, 0x9a9a9a00, 0x66666600,
59 0xfbfbfb00,0xcccccc00,0xb0b0b000,0x2d2d2d00, 59 0xfbfbfb00, 0xcccccc00, 0xb0b0b000, 0x2d2d2d00,
60 0x74747400,0x12121200,0x2b2b2b00,0x20202000, 60 0x74747400, 0x12121200, 0x2b2b2b00, 0x20202000,
61 0xf0f0f000,0xb1b1b100,0x84848400,0x99999900, 61 0xf0f0f000, 0xb1b1b100, 0x84848400, 0x99999900,
62 0xdfdfdf00,0x4c4c4c00,0xcbcbcb00,0xc2c2c200, 62 0xdfdfdf00, 0x4c4c4c00, 0xcbcbcb00, 0xc2c2c200,
63 0x34343400,0x7e7e7e00,0x76767600,0x05050500, 63 0x34343400, 0x7e7e7e00, 0x76767600, 0x05050500,
64 0x6d6d6d00,0xb7b7b700,0xa9a9a900,0x31313100, 64 0x6d6d6d00, 0xb7b7b700, 0xa9a9a900, 0x31313100,
65 0xd1d1d100,0x17171700,0x04040400,0xd7d7d700, 65 0xd1d1d100, 0x17171700, 0x04040400, 0xd7d7d700,
66 0x14141400,0x58585800,0x3a3a3a00,0x61616100, 66 0x14141400, 0x58585800, 0x3a3a3a00, 0x61616100,
67 0xdedede00,0x1b1b1b00,0x11111100,0x1c1c1c00, 67 0xdedede00, 0x1b1b1b00, 0x11111100, 0x1c1c1c00,
68 0x32323200,0x0f0f0f00,0x9c9c9c00,0x16161600, 68 0x32323200, 0x0f0f0f00, 0x9c9c9c00, 0x16161600,
69 0x53535300,0x18181800,0xf2f2f200,0x22222200, 69 0x53535300, 0x18181800, 0xf2f2f200, 0x22222200,
70 0xfefefe00,0x44444400,0xcfcfcf00,0xb2b2b200, 70 0xfefefe00, 0x44444400, 0xcfcfcf00, 0xb2b2b200,
71 0xc3c3c300,0xb5b5b500,0x7a7a7a00,0x91919100, 71 0xc3c3c300, 0xb5b5b500, 0x7a7a7a00, 0x91919100,
72 0x24242400,0x08080800,0xe8e8e800,0xa8a8a800, 72 0x24242400, 0x08080800, 0xe8e8e800, 0xa8a8a800,
73 0x60606000,0xfcfcfc00,0x69696900,0x50505000, 73 0x60606000, 0xfcfcfc00, 0x69696900, 0x50505000,
74 0xaaaaaa00,0xd0d0d000,0xa0a0a000,0x7d7d7d00, 74 0xaaaaaa00, 0xd0d0d000, 0xa0a0a000, 0x7d7d7d00,
75 0xa1a1a100,0x89898900,0x62626200,0x97979700, 75 0xa1a1a100, 0x89898900, 0x62626200, 0x97979700,
76 0x54545400,0x5b5b5b00,0x1e1e1e00,0x95959500, 76 0x54545400, 0x5b5b5b00, 0x1e1e1e00, 0x95959500,
77 0xe0e0e000,0xffffff00,0x64646400,0xd2d2d200, 77 0xe0e0e000, 0xffffff00, 0x64646400, 0xd2d2d200,
78 0x10101000,0xc4c4c400,0x00000000,0x48484800, 78 0x10101000, 0xc4c4c400, 0x00000000, 0x48484800,
79 0xa3a3a300,0xf7f7f700,0x75757500,0xdbdbdb00, 79 0xa3a3a300, 0xf7f7f700, 0x75757500, 0xdbdbdb00,
80 0x8a8a8a00,0x03030300,0xe6e6e600,0xdadada00, 80 0x8a8a8a00, 0x03030300, 0xe6e6e600, 0xdadada00,
81 0x09090900,0x3f3f3f00,0xdddddd00,0x94949400, 81 0x09090900, 0x3f3f3f00, 0xdddddd00, 0x94949400,
82 0x87878700,0x5c5c5c00,0x83838300,0x02020200, 82 0x87878700, 0x5c5c5c00, 0x83838300, 0x02020200,
83 0xcdcdcd00,0x4a4a4a00,0x90909000,0x33333300, 83 0xcdcdcd00, 0x4a4a4a00, 0x90909000, 0x33333300,
84 0x73737300,0x67676700,0xf6f6f600,0xf3f3f300, 84 0x73737300, 0x67676700, 0xf6f6f600, 0xf3f3f300,
85 0x9d9d9d00,0x7f7f7f00,0xbfbfbf00,0xe2e2e200, 85 0x9d9d9d00, 0x7f7f7f00, 0xbfbfbf00, 0xe2e2e200,
86 0x52525200,0x9b9b9b00,0xd8d8d800,0x26262600, 86 0x52525200, 0x9b9b9b00, 0xd8d8d800, 0x26262600,
87 0xc8c8c800,0x37373700,0xc6c6c600,0x3b3b3b00, 87 0xc8c8c800, 0x37373700, 0xc6c6c600, 0x3b3b3b00,
88 0x81818100,0x96969600,0x6f6f6f00,0x4b4b4b00, 88 0x81818100, 0x96969600, 0x6f6f6f00, 0x4b4b4b00,
89 0x13131300,0xbebebe00,0x63636300,0x2e2e2e00, 89 0x13131300, 0xbebebe00, 0x63636300, 0x2e2e2e00,
90 0xe9e9e900,0x79797900,0xa7a7a700,0x8c8c8c00, 90 0xe9e9e900, 0x79797900, 0xa7a7a700, 0x8c8c8c00,
91 0x9f9f9f00,0x6e6e6e00,0xbcbcbc00,0x8e8e8e00, 91 0x9f9f9f00, 0x6e6e6e00, 0xbcbcbc00, 0x8e8e8e00,
92 0x29292900,0xf5f5f500,0xf9f9f900,0xb6b6b600, 92 0x29292900, 0xf5f5f500, 0xf9f9f900, 0xb6b6b600,
93 0x2f2f2f00,0xfdfdfd00,0xb4b4b400,0x59595900, 93 0x2f2f2f00, 0xfdfdfd00, 0xb4b4b400, 0x59595900,
94 0x78787800,0x98989800,0x06060600,0x6a6a6a00, 94 0x78787800, 0x98989800, 0x06060600, 0x6a6a6a00,
95 0xe7e7e700,0x46464600,0x71717100,0xbababa00, 95 0xe7e7e700, 0x46464600, 0x71717100, 0xbababa00,
96 0xd4d4d400,0x25252500,0xababab00,0x42424200, 96 0xd4d4d400, 0x25252500, 0xababab00, 0x42424200,
97 0x88888800,0xa2a2a200,0x8d8d8d00,0xfafafa00, 97 0x88888800, 0xa2a2a200, 0x8d8d8d00, 0xfafafa00,
98 0x72727200,0x07070700,0xb9b9b900,0x55555500, 98 0x72727200, 0x07070700, 0xb9b9b900, 0x55555500,
99 0xf8f8f800,0xeeeeee00,0xacacac00,0x0a0a0a00, 99 0xf8f8f800, 0xeeeeee00, 0xacacac00, 0x0a0a0a00,
100 0x36363600,0x49494900,0x2a2a2a00,0x68686800, 100 0x36363600, 0x49494900, 0x2a2a2a00, 0x68686800,
101 0x3c3c3c00,0x38383800,0xf1f1f100,0xa4a4a400, 101 0x3c3c3c00, 0x38383800, 0xf1f1f100, 0xa4a4a400,
102 0x40404000,0x28282800,0xd3d3d300,0x7b7b7b00, 102 0x40404000, 0x28282800, 0xd3d3d300, 0x7b7b7b00,
103 0xbbbbbb00,0xc9c9c900,0x43434300,0xc1c1c100, 103 0xbbbbbb00, 0xc9c9c900, 0x43434300, 0xc1c1c100,
104 0x15151500,0xe3e3e300,0xadadad00,0xf4f4f400, 104 0x15151500, 0xe3e3e300, 0xadadad00, 0xf4f4f400,
105 0x77777700,0xc7c7c700,0x80808000,0x9e9e9e00, 105 0x77777700, 0xc7c7c700, 0x80808000, 0x9e9e9e00,
106}; 106};
107 107
108static const u32 camellia_sp0222[256] = { 108static const u32 camellia_sp0222[256] = {
109 0x00e0e0e0,0x00050505,0x00585858,0x00d9d9d9, 109 0x00e0e0e0, 0x00050505, 0x00585858, 0x00d9d9d9,
110 0x00676767,0x004e4e4e,0x00818181,0x00cbcbcb, 110 0x00676767, 0x004e4e4e, 0x00818181, 0x00cbcbcb,
111 0x00c9c9c9,0x000b0b0b,0x00aeaeae,0x006a6a6a, 111 0x00c9c9c9, 0x000b0b0b, 0x00aeaeae, 0x006a6a6a,
112 0x00d5d5d5,0x00181818,0x005d5d5d,0x00828282, 112 0x00d5d5d5, 0x00181818, 0x005d5d5d, 0x00828282,
113 0x00464646,0x00dfdfdf,0x00d6d6d6,0x00272727, 113 0x00464646, 0x00dfdfdf, 0x00d6d6d6, 0x00272727,
114 0x008a8a8a,0x00323232,0x004b4b4b,0x00424242, 114 0x008a8a8a, 0x00323232, 0x004b4b4b, 0x00424242,
115 0x00dbdbdb,0x001c1c1c,0x009e9e9e,0x009c9c9c, 115 0x00dbdbdb, 0x001c1c1c, 0x009e9e9e, 0x009c9c9c,
116 0x003a3a3a,0x00cacaca,0x00252525,0x007b7b7b, 116 0x003a3a3a, 0x00cacaca, 0x00252525, 0x007b7b7b,
117 0x000d0d0d,0x00717171,0x005f5f5f,0x001f1f1f, 117 0x000d0d0d, 0x00717171, 0x005f5f5f, 0x001f1f1f,
118 0x00f8f8f8,0x00d7d7d7,0x003e3e3e,0x009d9d9d, 118 0x00f8f8f8, 0x00d7d7d7, 0x003e3e3e, 0x009d9d9d,
119 0x007c7c7c,0x00606060,0x00b9b9b9,0x00bebebe, 119 0x007c7c7c, 0x00606060, 0x00b9b9b9, 0x00bebebe,
120 0x00bcbcbc,0x008b8b8b,0x00161616,0x00343434, 120 0x00bcbcbc, 0x008b8b8b, 0x00161616, 0x00343434,
121 0x004d4d4d,0x00c3c3c3,0x00727272,0x00959595, 121 0x004d4d4d, 0x00c3c3c3, 0x00727272, 0x00959595,
122 0x00ababab,0x008e8e8e,0x00bababa,0x007a7a7a, 122 0x00ababab, 0x008e8e8e, 0x00bababa, 0x007a7a7a,
123 0x00b3b3b3,0x00020202,0x00b4b4b4,0x00adadad, 123 0x00b3b3b3, 0x00020202, 0x00b4b4b4, 0x00adadad,
124 0x00a2a2a2,0x00acacac,0x00d8d8d8,0x009a9a9a, 124 0x00a2a2a2, 0x00acacac, 0x00d8d8d8, 0x009a9a9a,
125 0x00171717,0x001a1a1a,0x00353535,0x00cccccc, 125 0x00171717, 0x001a1a1a, 0x00353535, 0x00cccccc,
126 0x00f7f7f7,0x00999999,0x00616161,0x005a5a5a, 126 0x00f7f7f7, 0x00999999, 0x00616161, 0x005a5a5a,
127 0x00e8e8e8,0x00242424,0x00565656,0x00404040, 127 0x00e8e8e8, 0x00242424, 0x00565656, 0x00404040,
128 0x00e1e1e1,0x00636363,0x00090909,0x00333333, 128 0x00e1e1e1, 0x00636363, 0x00090909, 0x00333333,
129 0x00bfbfbf,0x00989898,0x00979797,0x00858585, 129 0x00bfbfbf, 0x00989898, 0x00979797, 0x00858585,
130 0x00686868,0x00fcfcfc,0x00ececec,0x000a0a0a, 130 0x00686868, 0x00fcfcfc, 0x00ececec, 0x000a0a0a,
131 0x00dadada,0x006f6f6f,0x00535353,0x00626262, 131 0x00dadada, 0x006f6f6f, 0x00535353, 0x00626262,
132 0x00a3a3a3,0x002e2e2e,0x00080808,0x00afafaf, 132 0x00a3a3a3, 0x002e2e2e, 0x00080808, 0x00afafaf,
133 0x00282828,0x00b0b0b0,0x00747474,0x00c2c2c2, 133 0x00282828, 0x00b0b0b0, 0x00747474, 0x00c2c2c2,
134 0x00bdbdbd,0x00363636,0x00222222,0x00383838, 134 0x00bdbdbd, 0x00363636, 0x00222222, 0x00383838,
135 0x00646464,0x001e1e1e,0x00393939,0x002c2c2c, 135 0x00646464, 0x001e1e1e, 0x00393939, 0x002c2c2c,
136 0x00a6a6a6,0x00303030,0x00e5e5e5,0x00444444, 136 0x00a6a6a6, 0x00303030, 0x00e5e5e5, 0x00444444,
137 0x00fdfdfd,0x00888888,0x009f9f9f,0x00656565, 137 0x00fdfdfd, 0x00888888, 0x009f9f9f, 0x00656565,
138 0x00878787,0x006b6b6b,0x00f4f4f4,0x00232323, 138 0x00878787, 0x006b6b6b, 0x00f4f4f4, 0x00232323,
139 0x00484848,0x00101010,0x00d1d1d1,0x00515151, 139 0x00484848, 0x00101010, 0x00d1d1d1, 0x00515151,
140 0x00c0c0c0,0x00f9f9f9,0x00d2d2d2,0x00a0a0a0, 140 0x00c0c0c0, 0x00f9f9f9, 0x00d2d2d2, 0x00a0a0a0,
141 0x00555555,0x00a1a1a1,0x00414141,0x00fafafa, 141 0x00555555, 0x00a1a1a1, 0x00414141, 0x00fafafa,
142 0x00434343,0x00131313,0x00c4c4c4,0x002f2f2f, 142 0x00434343, 0x00131313, 0x00c4c4c4, 0x002f2f2f,
143 0x00a8a8a8,0x00b6b6b6,0x003c3c3c,0x002b2b2b, 143 0x00a8a8a8, 0x00b6b6b6, 0x003c3c3c, 0x002b2b2b,
144 0x00c1c1c1,0x00ffffff,0x00c8c8c8,0x00a5a5a5, 144 0x00c1c1c1, 0x00ffffff, 0x00c8c8c8, 0x00a5a5a5,
145 0x00202020,0x00898989,0x00000000,0x00909090, 145 0x00202020, 0x00898989, 0x00000000, 0x00909090,
146 0x00474747,0x00efefef,0x00eaeaea,0x00b7b7b7, 146 0x00474747, 0x00efefef, 0x00eaeaea, 0x00b7b7b7,
147 0x00151515,0x00060606,0x00cdcdcd,0x00b5b5b5, 147 0x00151515, 0x00060606, 0x00cdcdcd, 0x00b5b5b5,
148 0x00121212,0x007e7e7e,0x00bbbbbb,0x00292929, 148 0x00121212, 0x007e7e7e, 0x00bbbbbb, 0x00292929,
149 0x000f0f0f,0x00b8b8b8,0x00070707,0x00040404, 149 0x000f0f0f, 0x00b8b8b8, 0x00070707, 0x00040404,
150 0x009b9b9b,0x00949494,0x00212121,0x00666666, 150 0x009b9b9b, 0x00949494, 0x00212121, 0x00666666,
151 0x00e6e6e6,0x00cecece,0x00ededed,0x00e7e7e7, 151 0x00e6e6e6, 0x00cecece, 0x00ededed, 0x00e7e7e7,
152 0x003b3b3b,0x00fefefe,0x007f7f7f,0x00c5c5c5, 152 0x003b3b3b, 0x00fefefe, 0x007f7f7f, 0x00c5c5c5,
153 0x00a4a4a4,0x00373737,0x00b1b1b1,0x004c4c4c, 153 0x00a4a4a4, 0x00373737, 0x00b1b1b1, 0x004c4c4c,
154 0x00919191,0x006e6e6e,0x008d8d8d,0x00767676, 154 0x00919191, 0x006e6e6e, 0x008d8d8d, 0x00767676,
155 0x00030303,0x002d2d2d,0x00dedede,0x00969696, 155 0x00030303, 0x002d2d2d, 0x00dedede, 0x00969696,
156 0x00262626,0x007d7d7d,0x00c6c6c6,0x005c5c5c, 156 0x00262626, 0x007d7d7d, 0x00c6c6c6, 0x005c5c5c,
157 0x00d3d3d3,0x00f2f2f2,0x004f4f4f,0x00191919, 157 0x00d3d3d3, 0x00f2f2f2, 0x004f4f4f, 0x00191919,
158 0x003f3f3f,0x00dcdcdc,0x00797979,0x001d1d1d, 158 0x003f3f3f, 0x00dcdcdc, 0x00797979, 0x001d1d1d,
159 0x00525252,0x00ebebeb,0x00f3f3f3,0x006d6d6d, 159 0x00525252, 0x00ebebeb, 0x00f3f3f3, 0x006d6d6d,
160 0x005e5e5e,0x00fbfbfb,0x00696969,0x00b2b2b2, 160 0x005e5e5e, 0x00fbfbfb, 0x00696969, 0x00b2b2b2,
161 0x00f0f0f0,0x00313131,0x000c0c0c,0x00d4d4d4, 161 0x00f0f0f0, 0x00313131, 0x000c0c0c, 0x00d4d4d4,
162 0x00cfcfcf,0x008c8c8c,0x00e2e2e2,0x00757575, 162 0x00cfcfcf, 0x008c8c8c, 0x00e2e2e2, 0x00757575,
163 0x00a9a9a9,0x004a4a4a,0x00575757,0x00848484, 163 0x00a9a9a9, 0x004a4a4a, 0x00575757, 0x00848484,
164 0x00111111,0x00454545,0x001b1b1b,0x00f5f5f5, 164 0x00111111, 0x00454545, 0x001b1b1b, 0x00f5f5f5,
165 0x00e4e4e4,0x000e0e0e,0x00737373,0x00aaaaaa, 165 0x00e4e4e4, 0x000e0e0e, 0x00737373, 0x00aaaaaa,
166 0x00f1f1f1,0x00dddddd,0x00595959,0x00141414, 166 0x00f1f1f1, 0x00dddddd, 0x00595959, 0x00141414,
167 0x006c6c6c,0x00929292,0x00545454,0x00d0d0d0, 167 0x006c6c6c, 0x00929292, 0x00545454, 0x00d0d0d0,
168 0x00787878,0x00707070,0x00e3e3e3,0x00494949, 168 0x00787878, 0x00707070, 0x00e3e3e3, 0x00494949,
169 0x00808080,0x00505050,0x00a7a7a7,0x00f6f6f6, 169 0x00808080, 0x00505050, 0x00a7a7a7, 0x00f6f6f6,
170 0x00777777,0x00939393,0x00868686,0x00838383, 170 0x00777777, 0x00939393, 0x00868686, 0x00838383,
171 0x002a2a2a,0x00c7c7c7,0x005b5b5b,0x00e9e9e9, 171 0x002a2a2a, 0x00c7c7c7, 0x005b5b5b, 0x00e9e9e9,
172 0x00eeeeee,0x008f8f8f,0x00010101,0x003d3d3d, 172 0x00eeeeee, 0x008f8f8f, 0x00010101, 0x003d3d3d,
173}; 173};
174 174
175static const u32 camellia_sp3033[256] = { 175static const u32 camellia_sp3033[256] = {
176 0x38003838,0x41004141,0x16001616,0x76007676, 176 0x38003838, 0x41004141, 0x16001616, 0x76007676,
177 0xd900d9d9,0x93009393,0x60006060,0xf200f2f2, 177 0xd900d9d9, 0x93009393, 0x60006060, 0xf200f2f2,
178 0x72007272,0xc200c2c2,0xab00abab,0x9a009a9a, 178 0x72007272, 0xc200c2c2, 0xab00abab, 0x9a009a9a,
179 0x75007575,0x06000606,0x57005757,0xa000a0a0, 179 0x75007575, 0x06000606, 0x57005757, 0xa000a0a0,
180 0x91009191,0xf700f7f7,0xb500b5b5,0xc900c9c9, 180 0x91009191, 0xf700f7f7, 0xb500b5b5, 0xc900c9c9,
181 0xa200a2a2,0x8c008c8c,0xd200d2d2,0x90009090, 181 0xa200a2a2, 0x8c008c8c, 0xd200d2d2, 0x90009090,
182 0xf600f6f6,0x07000707,0xa700a7a7,0x27002727, 182 0xf600f6f6, 0x07000707, 0xa700a7a7, 0x27002727,
183 0x8e008e8e,0xb200b2b2,0x49004949,0xde00dede, 183 0x8e008e8e, 0xb200b2b2, 0x49004949, 0xde00dede,
184 0x43004343,0x5c005c5c,0xd700d7d7,0xc700c7c7, 184 0x43004343, 0x5c005c5c, 0xd700d7d7, 0xc700c7c7,
185 0x3e003e3e,0xf500f5f5,0x8f008f8f,0x67006767, 185 0x3e003e3e, 0xf500f5f5, 0x8f008f8f, 0x67006767,
186 0x1f001f1f,0x18001818,0x6e006e6e,0xaf00afaf, 186 0x1f001f1f, 0x18001818, 0x6e006e6e, 0xaf00afaf,
187 0x2f002f2f,0xe200e2e2,0x85008585,0x0d000d0d, 187 0x2f002f2f, 0xe200e2e2, 0x85008585, 0x0d000d0d,
188 0x53005353,0xf000f0f0,0x9c009c9c,0x65006565, 188 0x53005353, 0xf000f0f0, 0x9c009c9c, 0x65006565,
189 0xea00eaea,0xa300a3a3,0xae00aeae,0x9e009e9e, 189 0xea00eaea, 0xa300a3a3, 0xae00aeae, 0x9e009e9e,
190 0xec00ecec,0x80008080,0x2d002d2d,0x6b006b6b, 190 0xec00ecec, 0x80008080, 0x2d002d2d, 0x6b006b6b,
191 0xa800a8a8,0x2b002b2b,0x36003636,0xa600a6a6, 191 0xa800a8a8, 0x2b002b2b, 0x36003636, 0xa600a6a6,
192 0xc500c5c5,0x86008686,0x4d004d4d,0x33003333, 192 0xc500c5c5, 0x86008686, 0x4d004d4d, 0x33003333,
193 0xfd00fdfd,0x66006666,0x58005858,0x96009696, 193 0xfd00fdfd, 0x66006666, 0x58005858, 0x96009696,
194 0x3a003a3a,0x09000909,0x95009595,0x10001010, 194 0x3a003a3a, 0x09000909, 0x95009595, 0x10001010,
195 0x78007878,0xd800d8d8,0x42004242,0xcc00cccc, 195 0x78007878, 0xd800d8d8, 0x42004242, 0xcc00cccc,
196 0xef00efef,0x26002626,0xe500e5e5,0x61006161, 196 0xef00efef, 0x26002626, 0xe500e5e5, 0x61006161,
197 0x1a001a1a,0x3f003f3f,0x3b003b3b,0x82008282, 197 0x1a001a1a, 0x3f003f3f, 0x3b003b3b, 0x82008282,
198 0xb600b6b6,0xdb00dbdb,0xd400d4d4,0x98009898, 198 0xb600b6b6, 0xdb00dbdb, 0xd400d4d4, 0x98009898,
199 0xe800e8e8,0x8b008b8b,0x02000202,0xeb00ebeb, 199 0xe800e8e8, 0x8b008b8b, 0x02000202, 0xeb00ebeb,
200 0x0a000a0a,0x2c002c2c,0x1d001d1d,0xb000b0b0, 200 0x0a000a0a, 0x2c002c2c, 0x1d001d1d, 0xb000b0b0,
201 0x6f006f6f,0x8d008d8d,0x88008888,0x0e000e0e, 201 0x6f006f6f, 0x8d008d8d, 0x88008888, 0x0e000e0e,
202 0x19001919,0x87008787,0x4e004e4e,0x0b000b0b, 202 0x19001919, 0x87008787, 0x4e004e4e, 0x0b000b0b,
203 0xa900a9a9,0x0c000c0c,0x79007979,0x11001111, 203 0xa900a9a9, 0x0c000c0c, 0x79007979, 0x11001111,
204 0x7f007f7f,0x22002222,0xe700e7e7,0x59005959, 204 0x7f007f7f, 0x22002222, 0xe700e7e7, 0x59005959,
205 0xe100e1e1,0xda00dada,0x3d003d3d,0xc800c8c8, 205 0xe100e1e1, 0xda00dada, 0x3d003d3d, 0xc800c8c8,
206 0x12001212,0x04000404,0x74007474,0x54005454, 206 0x12001212, 0x04000404, 0x74007474, 0x54005454,
207 0x30003030,0x7e007e7e,0xb400b4b4,0x28002828, 207 0x30003030, 0x7e007e7e, 0xb400b4b4, 0x28002828,
208 0x55005555,0x68006868,0x50005050,0xbe00bebe, 208 0x55005555, 0x68006868, 0x50005050, 0xbe00bebe,
209 0xd000d0d0,0xc400c4c4,0x31003131,0xcb00cbcb, 209 0xd000d0d0, 0xc400c4c4, 0x31003131, 0xcb00cbcb,
210 0x2a002a2a,0xad00adad,0x0f000f0f,0xca00caca, 210 0x2a002a2a, 0xad00adad, 0x0f000f0f, 0xca00caca,
211 0x70007070,0xff00ffff,0x32003232,0x69006969, 211 0x70007070, 0xff00ffff, 0x32003232, 0x69006969,
212 0x08000808,0x62006262,0x00000000,0x24002424, 212 0x08000808, 0x62006262, 0x00000000, 0x24002424,
213 0xd100d1d1,0xfb00fbfb,0xba00baba,0xed00eded, 213 0xd100d1d1, 0xfb00fbfb, 0xba00baba, 0xed00eded,
214 0x45004545,0x81008181,0x73007373,0x6d006d6d, 214 0x45004545, 0x81008181, 0x73007373, 0x6d006d6d,
215 0x84008484,0x9f009f9f,0xee00eeee,0x4a004a4a, 215 0x84008484, 0x9f009f9f, 0xee00eeee, 0x4a004a4a,
216 0xc300c3c3,0x2e002e2e,0xc100c1c1,0x01000101, 216 0xc300c3c3, 0x2e002e2e, 0xc100c1c1, 0x01000101,
217 0xe600e6e6,0x25002525,0x48004848,0x99009999, 217 0xe600e6e6, 0x25002525, 0x48004848, 0x99009999,
218 0xb900b9b9,0xb300b3b3,0x7b007b7b,0xf900f9f9, 218 0xb900b9b9, 0xb300b3b3, 0x7b007b7b, 0xf900f9f9,
219 0xce00cece,0xbf00bfbf,0xdf00dfdf,0x71007171, 219 0xce00cece, 0xbf00bfbf, 0xdf00dfdf, 0x71007171,
220 0x29002929,0xcd00cdcd,0x6c006c6c,0x13001313, 220 0x29002929, 0xcd00cdcd, 0x6c006c6c, 0x13001313,
221 0x64006464,0x9b009b9b,0x63006363,0x9d009d9d, 221 0x64006464, 0x9b009b9b, 0x63006363, 0x9d009d9d,
222 0xc000c0c0,0x4b004b4b,0xb700b7b7,0xa500a5a5, 222 0xc000c0c0, 0x4b004b4b, 0xb700b7b7, 0xa500a5a5,
223 0x89008989,0x5f005f5f,0xb100b1b1,0x17001717, 223 0x89008989, 0x5f005f5f, 0xb100b1b1, 0x17001717,
224 0xf400f4f4,0xbc00bcbc,0xd300d3d3,0x46004646, 224 0xf400f4f4, 0xbc00bcbc, 0xd300d3d3, 0x46004646,
225 0xcf00cfcf,0x37003737,0x5e005e5e,0x47004747, 225 0xcf00cfcf, 0x37003737, 0x5e005e5e, 0x47004747,
226 0x94009494,0xfa00fafa,0xfc00fcfc,0x5b005b5b, 226 0x94009494, 0xfa00fafa, 0xfc00fcfc, 0x5b005b5b,
227 0x97009797,0xfe00fefe,0x5a005a5a,0xac00acac, 227 0x97009797, 0xfe00fefe, 0x5a005a5a, 0xac00acac,
228 0x3c003c3c,0x4c004c4c,0x03000303,0x35003535, 228 0x3c003c3c, 0x4c004c4c, 0x03000303, 0x35003535,
229 0xf300f3f3,0x23002323,0xb800b8b8,0x5d005d5d, 229 0xf300f3f3, 0x23002323, 0xb800b8b8, 0x5d005d5d,
230 0x6a006a6a,0x92009292,0xd500d5d5,0x21002121, 230 0x6a006a6a, 0x92009292, 0xd500d5d5, 0x21002121,
231 0x44004444,0x51005151,0xc600c6c6,0x7d007d7d, 231 0x44004444, 0x51005151, 0xc600c6c6, 0x7d007d7d,
232 0x39003939,0x83008383,0xdc00dcdc,0xaa00aaaa, 232 0x39003939, 0x83008383, 0xdc00dcdc, 0xaa00aaaa,
233 0x7c007c7c,0x77007777,0x56005656,0x05000505, 233 0x7c007c7c, 0x77007777, 0x56005656, 0x05000505,
234 0x1b001b1b,0xa400a4a4,0x15001515,0x34003434, 234 0x1b001b1b, 0xa400a4a4, 0x15001515, 0x34003434,
235 0x1e001e1e,0x1c001c1c,0xf800f8f8,0x52005252, 235 0x1e001e1e, 0x1c001c1c, 0xf800f8f8, 0x52005252,
236 0x20002020,0x14001414,0xe900e9e9,0xbd00bdbd, 236 0x20002020, 0x14001414, 0xe900e9e9, 0xbd00bdbd,
237 0xdd00dddd,0xe400e4e4,0xa100a1a1,0xe000e0e0, 237 0xdd00dddd, 0xe400e4e4, 0xa100a1a1, 0xe000e0e0,
238 0x8a008a8a,0xf100f1f1,0xd600d6d6,0x7a007a7a, 238 0x8a008a8a, 0xf100f1f1, 0xd600d6d6, 0x7a007a7a,
239 0xbb00bbbb,0xe300e3e3,0x40004040,0x4f004f4f, 239 0xbb00bbbb, 0xe300e3e3, 0x40004040, 0x4f004f4f,
240}; 240};
241 241
242static const u32 camellia_sp4404[256] = { 242static const u32 camellia_sp4404[256] = {
243 0x70700070,0x2c2c002c,0xb3b300b3,0xc0c000c0, 243 0x70700070, 0x2c2c002c, 0xb3b300b3, 0xc0c000c0,
244 0xe4e400e4,0x57570057,0xeaea00ea,0xaeae00ae, 244 0xe4e400e4, 0x57570057, 0xeaea00ea, 0xaeae00ae,
245 0x23230023,0x6b6b006b,0x45450045,0xa5a500a5, 245 0x23230023, 0x6b6b006b, 0x45450045, 0xa5a500a5,
246 0xeded00ed,0x4f4f004f,0x1d1d001d,0x92920092, 246 0xeded00ed, 0x4f4f004f, 0x1d1d001d, 0x92920092,
247 0x86860086,0xafaf00af,0x7c7c007c,0x1f1f001f, 247 0x86860086, 0xafaf00af, 0x7c7c007c, 0x1f1f001f,
248 0x3e3e003e,0xdcdc00dc,0x5e5e005e,0x0b0b000b, 248 0x3e3e003e, 0xdcdc00dc, 0x5e5e005e, 0x0b0b000b,
249 0xa6a600a6,0x39390039,0xd5d500d5,0x5d5d005d, 249 0xa6a600a6, 0x39390039, 0xd5d500d5, 0x5d5d005d,
250 0xd9d900d9,0x5a5a005a,0x51510051,0x6c6c006c, 250 0xd9d900d9, 0x5a5a005a, 0x51510051, 0x6c6c006c,
251 0x8b8b008b,0x9a9a009a,0xfbfb00fb,0xb0b000b0, 251 0x8b8b008b, 0x9a9a009a, 0xfbfb00fb, 0xb0b000b0,
252 0x74740074,0x2b2b002b,0xf0f000f0,0x84840084, 252 0x74740074, 0x2b2b002b, 0xf0f000f0, 0x84840084,
253 0xdfdf00df,0xcbcb00cb,0x34340034,0x76760076, 253 0xdfdf00df, 0xcbcb00cb, 0x34340034, 0x76760076,
254 0x6d6d006d,0xa9a900a9,0xd1d100d1,0x04040004, 254 0x6d6d006d, 0xa9a900a9, 0xd1d100d1, 0x04040004,
255 0x14140014,0x3a3a003a,0xdede00de,0x11110011, 255 0x14140014, 0x3a3a003a, 0xdede00de, 0x11110011,
256 0x32320032,0x9c9c009c,0x53530053,0xf2f200f2, 256 0x32320032, 0x9c9c009c, 0x53530053, 0xf2f200f2,
257 0xfefe00fe,0xcfcf00cf,0xc3c300c3,0x7a7a007a, 257 0xfefe00fe, 0xcfcf00cf, 0xc3c300c3, 0x7a7a007a,
258 0x24240024,0xe8e800e8,0x60600060,0x69690069, 258 0x24240024, 0xe8e800e8, 0x60600060, 0x69690069,
259 0xaaaa00aa,0xa0a000a0,0xa1a100a1,0x62620062, 259 0xaaaa00aa, 0xa0a000a0, 0xa1a100a1, 0x62620062,
260 0x54540054,0x1e1e001e,0xe0e000e0,0x64640064, 260 0x54540054, 0x1e1e001e, 0xe0e000e0, 0x64640064,
261 0x10100010,0x00000000,0xa3a300a3,0x75750075, 261 0x10100010, 0x00000000, 0xa3a300a3, 0x75750075,
262 0x8a8a008a,0xe6e600e6,0x09090009,0xdddd00dd, 262 0x8a8a008a, 0xe6e600e6, 0x09090009, 0xdddd00dd,
263 0x87870087,0x83830083,0xcdcd00cd,0x90900090, 263 0x87870087, 0x83830083, 0xcdcd00cd, 0x90900090,
264 0x73730073,0xf6f600f6,0x9d9d009d,0xbfbf00bf, 264 0x73730073, 0xf6f600f6, 0x9d9d009d, 0xbfbf00bf,
265 0x52520052,0xd8d800d8,0xc8c800c8,0xc6c600c6, 265 0x52520052, 0xd8d800d8, 0xc8c800c8, 0xc6c600c6,
266 0x81810081,0x6f6f006f,0x13130013,0x63630063, 266 0x81810081, 0x6f6f006f, 0x13130013, 0x63630063,
267 0xe9e900e9,0xa7a700a7,0x9f9f009f,0xbcbc00bc, 267 0xe9e900e9, 0xa7a700a7, 0x9f9f009f, 0xbcbc00bc,
268 0x29290029,0xf9f900f9,0x2f2f002f,0xb4b400b4, 268 0x29290029, 0xf9f900f9, 0x2f2f002f, 0xb4b400b4,
269 0x78780078,0x06060006,0xe7e700e7,0x71710071, 269 0x78780078, 0x06060006, 0xe7e700e7, 0x71710071,
270 0xd4d400d4,0xabab00ab,0x88880088,0x8d8d008d, 270 0xd4d400d4, 0xabab00ab, 0x88880088, 0x8d8d008d,
271 0x72720072,0xb9b900b9,0xf8f800f8,0xacac00ac, 271 0x72720072, 0xb9b900b9, 0xf8f800f8, 0xacac00ac,
272 0x36360036,0x2a2a002a,0x3c3c003c,0xf1f100f1, 272 0x36360036, 0x2a2a002a, 0x3c3c003c, 0xf1f100f1,
273 0x40400040,0xd3d300d3,0xbbbb00bb,0x43430043, 273 0x40400040, 0xd3d300d3, 0xbbbb00bb, 0x43430043,
274 0x15150015,0xadad00ad,0x77770077,0x80800080, 274 0x15150015, 0xadad00ad, 0x77770077, 0x80800080,
275 0x82820082,0xecec00ec,0x27270027,0xe5e500e5, 275 0x82820082, 0xecec00ec, 0x27270027, 0xe5e500e5,
276 0x85850085,0x35350035,0x0c0c000c,0x41410041, 276 0x85850085, 0x35350035, 0x0c0c000c, 0x41410041,
277 0xefef00ef,0x93930093,0x19190019,0x21210021, 277 0xefef00ef, 0x93930093, 0x19190019, 0x21210021,
278 0x0e0e000e,0x4e4e004e,0x65650065,0xbdbd00bd, 278 0x0e0e000e, 0x4e4e004e, 0x65650065, 0xbdbd00bd,
279 0xb8b800b8,0x8f8f008f,0xebeb00eb,0xcece00ce, 279 0xb8b800b8, 0x8f8f008f, 0xebeb00eb, 0xcece00ce,
280 0x30300030,0x5f5f005f,0xc5c500c5,0x1a1a001a, 280 0x30300030, 0x5f5f005f, 0xc5c500c5, 0x1a1a001a,
281 0xe1e100e1,0xcaca00ca,0x47470047,0x3d3d003d, 281 0xe1e100e1, 0xcaca00ca, 0x47470047, 0x3d3d003d,
282 0x01010001,0xd6d600d6,0x56560056,0x4d4d004d, 282 0x01010001, 0xd6d600d6, 0x56560056, 0x4d4d004d,
283 0x0d0d000d,0x66660066,0xcccc00cc,0x2d2d002d, 283 0x0d0d000d, 0x66660066, 0xcccc00cc, 0x2d2d002d,
284 0x12120012,0x20200020,0xb1b100b1,0x99990099, 284 0x12120012, 0x20200020, 0xb1b100b1, 0x99990099,
285 0x4c4c004c,0xc2c200c2,0x7e7e007e,0x05050005, 285 0x4c4c004c, 0xc2c200c2, 0x7e7e007e, 0x05050005,
286 0xb7b700b7,0x31310031,0x17170017,0xd7d700d7, 286 0xb7b700b7, 0x31310031, 0x17170017, 0xd7d700d7,
287 0x58580058,0x61610061,0x1b1b001b,0x1c1c001c, 287 0x58580058, 0x61610061, 0x1b1b001b, 0x1c1c001c,
288 0x0f0f000f,0x16160016,0x18180018,0x22220022, 288 0x0f0f000f, 0x16160016, 0x18180018, 0x22220022,
289 0x44440044,0xb2b200b2,0xb5b500b5,0x91910091, 289 0x44440044, 0xb2b200b2, 0xb5b500b5, 0x91910091,
290 0x08080008,0xa8a800a8,0xfcfc00fc,0x50500050, 290 0x08080008, 0xa8a800a8, 0xfcfc00fc, 0x50500050,
291 0xd0d000d0,0x7d7d007d,0x89890089,0x97970097, 291 0xd0d000d0, 0x7d7d007d, 0x89890089, 0x97970097,
292 0x5b5b005b,0x95950095,0xffff00ff,0xd2d200d2, 292 0x5b5b005b, 0x95950095, 0xffff00ff, 0xd2d200d2,
293 0xc4c400c4,0x48480048,0xf7f700f7,0xdbdb00db, 293 0xc4c400c4, 0x48480048, 0xf7f700f7, 0xdbdb00db,
294 0x03030003,0xdada00da,0x3f3f003f,0x94940094, 294 0x03030003, 0xdada00da, 0x3f3f003f, 0x94940094,
295 0x5c5c005c,0x02020002,0x4a4a004a,0x33330033, 295 0x5c5c005c, 0x02020002, 0x4a4a004a, 0x33330033,
296 0x67670067,0xf3f300f3,0x7f7f007f,0xe2e200e2, 296 0x67670067, 0xf3f300f3, 0x7f7f007f, 0xe2e200e2,
297 0x9b9b009b,0x26260026,0x37370037,0x3b3b003b, 297 0x9b9b009b, 0x26260026, 0x37370037, 0x3b3b003b,
298 0x96960096,0x4b4b004b,0xbebe00be,0x2e2e002e, 298 0x96960096, 0x4b4b004b, 0xbebe00be, 0x2e2e002e,
299 0x79790079,0x8c8c008c,0x6e6e006e,0x8e8e008e, 299 0x79790079, 0x8c8c008c, 0x6e6e006e, 0x8e8e008e,
300 0xf5f500f5,0xb6b600b6,0xfdfd00fd,0x59590059, 300 0xf5f500f5, 0xb6b600b6, 0xfdfd00fd, 0x59590059,
301 0x98980098,0x6a6a006a,0x46460046,0xbaba00ba, 301 0x98980098, 0x6a6a006a, 0x46460046, 0xbaba00ba,
302 0x25250025,0x42420042,0xa2a200a2,0xfafa00fa, 302 0x25250025, 0x42420042, 0xa2a200a2, 0xfafa00fa,
303 0x07070007,0x55550055,0xeeee00ee,0x0a0a000a, 303 0x07070007, 0x55550055, 0xeeee00ee, 0x0a0a000a,
304 0x49490049,0x68680068,0x38380038,0xa4a400a4, 304 0x49490049, 0x68680068, 0x38380038, 0xa4a400a4,
305 0x28280028,0x7b7b007b,0xc9c900c9,0xc1c100c1, 305 0x28280028, 0x7b7b007b, 0xc9c900c9, 0xc1c100c1,
306 0xe3e300e3,0xf4f400f4,0xc7c700c7,0x9e9e009e, 306 0xe3e300e3, 0xf4f400f4, 0xc7c700c7, 0x9e9e009e,
307}; 307};
308 308
309 309
@@ -344,7 +344,7 @@ static const u32 camellia_sp4404[256] = {
344 lr = (lr << bits) + (rl >> (32 - bits)); \ 344 lr = (lr << bits) + (rl >> (32 - bits)); \
345 rl = (rl << bits) + (rr >> (32 - bits)); \ 345 rl = (rl << bits) + (rr >> (32 - bits)); \
346 rr = (rr << bits) + (w0 >> (32 - bits)); \ 346 rr = (rr << bits) + (w0 >> (32 - bits)); \
347 } while(0) 347 } while (0)
348 348
349#define ROLDQo32(ll, lr, rl, rr, w0, w1, bits) \ 349#define ROLDQo32(ll, lr, rl, rr, w0, w1, bits) \
350 do { \ 350 do { \
@@ -354,7 +354,7 @@ static const u32 camellia_sp4404[256] = {
354 lr = (rl << (bits - 32)) + (rr >> (64 - bits)); \ 354 lr = (rl << (bits - 32)) + (rr >> (64 - bits)); \
355 rl = (rr << (bits - 32)) + (w0 >> (64 - bits)); \ 355 rl = (rr << (bits - 32)) + (w0 >> (64 - bits)); \
356 rr = (w0 << (bits - 32)) + (w1 >> (64 - bits)); \ 356 rr = (w0 << (bits - 32)) + (w1 >> (64 - bits)); \
357 } while(0) 357 } while (0)
358 358
359#define CAMELLIA_F(xl, xr, kl, kr, yl, yr, il, ir, t0, t1) \ 359#define CAMELLIA_F(xl, xr, kl, kr, yl, yr, il, ir, t0, t1) \
360 do { \ 360 do { \
@@ -373,7 +373,7 @@ static const u32 camellia_sp4404[256] = {
373 yl ^= yr; \ 373 yl ^= yr; \
374 yr = ror32(yr, 8); \ 374 yr = ror32(yr, 8); \
375 yr ^= yl; \ 375 yr ^= yl; \
376 } while(0) 376 } while (0)
377 377
378#define SUBKEY_L(INDEX) (subkey[(INDEX)*2]) 378#define SUBKEY_L(INDEX) (subkey[(INDEX)*2])
379#define SUBKEY_R(INDEX) (subkey[(INDEX)*2 + 1]) 379#define SUBKEY_R(INDEX) (subkey[(INDEX)*2 + 1])
@@ -835,7 +835,7 @@ static void camellia_setup256(const unsigned char *key, u32 *subkey)
835static void camellia_setup192(const unsigned char *key, u32 *subkey) 835static void camellia_setup192(const unsigned char *key, u32 *subkey)
836{ 836{
837 unsigned char kk[32]; 837 unsigned char kk[32];
838 u32 krll, krlr, krrl,krrr; 838 u32 krll, krlr, krrl, krrr;
839 839
840 memcpy(kk, key, 24); 840 memcpy(kk, key, 24);
841 memcpy((unsigned char *)&krll, key+16, 4); 841 memcpy((unsigned char *)&krll, key+16, 4);
@@ -865,7 +865,7 @@ static void camellia_setup192(const unsigned char *key, u32 *subkey)
865 t1 |= lr; \ 865 t1 |= lr; \
866 ll ^= t1; \ 866 ll ^= t1; \
867 rr ^= rol32(t3, 1); \ 867 rr ^= rol32(t3, 1); \
868 } while(0) 868 } while (0)
869 869
870#define CAMELLIA_ROUNDSM(xl, xr, kl, kr, yl, yr, il, ir) \ 870#define CAMELLIA_ROUNDSM(xl, xr, kl, kr, yl, yr, il, ir) \
871 do { \ 871 do { \
@@ -881,12 +881,12 @@ static void camellia_setup192(const unsigned char *key, u32 *subkey)
881 ir ^= il ^ kr; \ 881 ir ^= il ^ kr; \
882 yl ^= ir; \ 882 yl ^= ir; \
883 yr ^= ror32(il, 8) ^ ir; \ 883 yr ^= ror32(il, 8) ^ ir; \
884 } while(0) 884 } while (0)
885 885
886/* max = 24: 128bit encrypt, max = 32: 256bit encrypt */ 886/* max = 24: 128bit encrypt, max = 32: 256bit encrypt */
887static void camellia_do_encrypt(const u32 *subkey, u32 *io, unsigned max) 887static void camellia_do_encrypt(const u32 *subkey, u32 *io, unsigned max)
888{ 888{
889 u32 il,ir,t0,t1; /* temporary variables */ 889 u32 il, ir, t0, t1; /* temporary variables */
890 890
891 /* pre whitening but absorb kw2 */ 891 /* pre whitening but absorb kw2 */
892 io[0] ^= SUBKEY_L(0); 892 io[0] ^= SUBKEY_L(0);
@@ -894,30 +894,30 @@ static void camellia_do_encrypt(const u32 *subkey, u32 *io, unsigned max)
894 894
895 /* main iteration */ 895 /* main iteration */
896#define ROUNDS(i) do { \ 896#define ROUNDS(i) do { \
897 CAMELLIA_ROUNDSM(io[0],io[1], \ 897 CAMELLIA_ROUNDSM(io[0], io[1], \
898 SUBKEY_L(i + 2),SUBKEY_R(i + 2), \ 898 SUBKEY_L(i + 2), SUBKEY_R(i + 2), \
899 io[2],io[3],il,ir); \ 899 io[2], io[3], il, ir); \
900 CAMELLIA_ROUNDSM(io[2],io[3], \ 900 CAMELLIA_ROUNDSM(io[2], io[3], \
901 SUBKEY_L(i + 3),SUBKEY_R(i + 3), \ 901 SUBKEY_L(i + 3), SUBKEY_R(i + 3), \
902 io[0],io[1],il,ir); \ 902 io[0], io[1], il, ir); \
903 CAMELLIA_ROUNDSM(io[0],io[1], \ 903 CAMELLIA_ROUNDSM(io[0], io[1], \
904 SUBKEY_L(i + 4),SUBKEY_R(i + 4), \ 904 SUBKEY_L(i + 4), SUBKEY_R(i + 4), \
905 io[2],io[3],il,ir); \ 905 io[2], io[3], il, ir); \
906 CAMELLIA_ROUNDSM(io[2],io[3], \ 906 CAMELLIA_ROUNDSM(io[2], io[3], \
907 SUBKEY_L(i + 5),SUBKEY_R(i + 5), \ 907 SUBKEY_L(i + 5), SUBKEY_R(i + 5), \
908 io[0],io[1],il,ir); \ 908 io[0], io[1], il, ir); \
909 CAMELLIA_ROUNDSM(io[0],io[1], \ 909 CAMELLIA_ROUNDSM(io[0], io[1], \
910 SUBKEY_L(i + 6),SUBKEY_R(i + 6), \ 910 SUBKEY_L(i + 6), SUBKEY_R(i + 6), \
911 io[2],io[3],il,ir); \ 911 io[2], io[3], il, ir); \
912 CAMELLIA_ROUNDSM(io[2],io[3], \ 912 CAMELLIA_ROUNDSM(io[2], io[3], \
913 SUBKEY_L(i + 7),SUBKEY_R(i + 7), \ 913 SUBKEY_L(i + 7), SUBKEY_R(i + 7), \
914 io[0],io[1],il,ir); \ 914 io[0], io[1], il, ir); \
915} while (0) 915} while (0)
916#define FLS(i) do { \ 916#define FLS(i) do { \
917 CAMELLIA_FLS(io[0],io[1],io[2],io[3], \ 917 CAMELLIA_FLS(io[0], io[1], io[2], io[3], \
918 SUBKEY_L(i + 0),SUBKEY_R(i + 0), \ 918 SUBKEY_L(i + 0), SUBKEY_R(i + 0), \
919 SUBKEY_L(i + 1),SUBKEY_R(i + 1), \ 919 SUBKEY_L(i + 1), SUBKEY_R(i + 1), \
920 t0,t1,il,ir); \ 920 t0, t1, il, ir); \
921} while (0) 921} while (0)
922 922
923 ROUNDS(0); 923 ROUNDS(0);
@@ -941,7 +941,7 @@ static void camellia_do_encrypt(const u32 *subkey, u32 *io, unsigned max)
941 941
942static void camellia_do_decrypt(const u32 *subkey, u32 *io, unsigned i) 942static void camellia_do_decrypt(const u32 *subkey, u32 *io, unsigned i)
943{ 943{
944 u32 il,ir,t0,t1; /* temporary variables */ 944 u32 il, ir, t0, t1; /* temporary variables */
945 945
946 /* pre whitening but absorb kw2 */ 946 /* pre whitening but absorb kw2 */
947 io[0] ^= SUBKEY_L(i); 947 io[0] ^= SUBKEY_L(i);
@@ -949,30 +949,30 @@ static void camellia_do_decrypt(const u32 *subkey, u32 *io, unsigned i)
949 949
950 /* main iteration */ 950 /* main iteration */
951#define ROUNDS(i) do { \ 951#define ROUNDS(i) do { \
952 CAMELLIA_ROUNDSM(io[0],io[1], \ 952 CAMELLIA_ROUNDSM(io[0], io[1], \
953 SUBKEY_L(i + 7),SUBKEY_R(i + 7), \ 953 SUBKEY_L(i + 7), SUBKEY_R(i + 7), \
954 io[2],io[3],il,ir); \ 954 io[2], io[3], il, ir); \
955 CAMELLIA_ROUNDSM(io[2],io[3], \ 955 CAMELLIA_ROUNDSM(io[2], io[3], \
956 SUBKEY_L(i + 6),SUBKEY_R(i + 6), \ 956 SUBKEY_L(i + 6), SUBKEY_R(i + 6), \
957 io[0],io[1],il,ir); \ 957 io[0], io[1], il, ir); \
958 CAMELLIA_ROUNDSM(io[0],io[1], \ 958 CAMELLIA_ROUNDSM(io[0], io[1], \
959 SUBKEY_L(i + 5),SUBKEY_R(i + 5), \ 959 SUBKEY_L(i + 5), SUBKEY_R(i + 5), \
960 io[2],io[3],il,ir); \ 960 io[2], io[3], il, ir); \
961 CAMELLIA_ROUNDSM(io[2],io[3], \ 961 CAMELLIA_ROUNDSM(io[2], io[3], \
962 SUBKEY_L(i + 4),SUBKEY_R(i + 4), \ 962 SUBKEY_L(i + 4), SUBKEY_R(i + 4), \
963 io[0],io[1],il,ir); \ 963 io[0], io[1], il, ir); \
964 CAMELLIA_ROUNDSM(io[0],io[1], \ 964 CAMELLIA_ROUNDSM(io[0], io[1], \
965 SUBKEY_L(i + 3),SUBKEY_R(i + 3), \ 965 SUBKEY_L(i + 3), SUBKEY_R(i + 3), \
966 io[2],io[3],il,ir); \ 966 io[2], io[3], il, ir); \
967 CAMELLIA_ROUNDSM(io[2],io[3], \ 967 CAMELLIA_ROUNDSM(io[2], io[3], \
968 SUBKEY_L(i + 2),SUBKEY_R(i + 2), \ 968 SUBKEY_L(i + 2), SUBKEY_R(i + 2), \
969 io[0],io[1],il,ir); \ 969 io[0], io[1], il, ir); \
970} while (0) 970} while (0)
971#define FLS(i) do { \ 971#define FLS(i) do { \
972 CAMELLIA_FLS(io[0],io[1],io[2],io[3], \ 972 CAMELLIA_FLS(io[0], io[1], io[2], io[3], \
973 SUBKEY_L(i + 1),SUBKEY_R(i + 1), \ 973 SUBKEY_L(i + 1), SUBKEY_R(i + 1), \
974 SUBKEY_L(i + 0),SUBKEY_R(i + 0), \ 974 SUBKEY_L(i + 0), SUBKEY_R(i + 0), \
975 t0,t1,il,ir); \ 975 t0, t1, il, ir); \
976} while (0) 976} while (0)
977 977
978 if (i == 32) { 978 if (i == 32) {
diff --git a/crypto/cast5.c b/crypto/cast5.c
index 8cbe28fa0e0c..a1d2294b50ad 100644
--- a/crypto/cast5.c
+++ b/crypto/cast5.c
@@ -569,12 +569,12 @@ static const u32 sb8[256] = {
569 0xeaee6801, 0x8db2a283, 0xea8bf59e 569 0xeaee6801, 0x8db2a283, 0xea8bf59e
570}; 570};
571 571
572#define F1(D,m,r) ( (I = ((m) + (D))), (I=rol32(I,(r))), \ 572#define F1(D, m, r) ((I = ((m) + (D))), (I = rol32(I, (r))), \
573 (((s1[I >> 24] ^ s2[(I>>16)&0xff]) - s3[(I>>8)&0xff]) + s4[I&0xff]) ) 573 (((s1[I >> 24] ^ s2[(I>>16)&0xff]) - s3[(I>>8)&0xff]) + s4[I&0xff]))
574#define F2(D,m,r) ( (I = ((m) ^ (D))), (I=rol32(I,(r))), \ 574#define F2(D, m, r) ((I = ((m) ^ (D))), (I = rol32(I, (r))), \
575 (((s1[I >> 24] - s2[(I>>16)&0xff]) + s3[(I>>8)&0xff]) ^ s4[I&0xff]) ) 575 (((s1[I >> 24] - s2[(I>>16)&0xff]) + s3[(I>>8)&0xff]) ^ s4[I&0xff]))
576#define F3(D,m,r) ( (I = ((m) - (D))), (I=rol32(I,(r))), \ 576#define F3(D, m, r) ((I = ((m) - (D))), (I = rol32(I, (r))), \
577 (((s1[I >> 24] + s2[(I>>16)&0xff]) ^ s3[(I>>8)&0xff]) - s4[I&0xff]) ) 577 (((s1[I >> 24] + s2[(I>>16)&0xff]) ^ s3[(I>>8)&0xff]) - s4[I&0xff]))
578 578
579 579
580static void cast5_encrypt(struct crypto_tfm *tfm, u8 *outbuf, const u8 *inbuf) 580static void cast5_encrypt(struct crypto_tfm *tfm, u8 *outbuf, const u8 *inbuf)
@@ -694,7 +694,7 @@ static void cast5_decrypt(struct crypto_tfm *tfm, u8 *outbuf, const u8 *inbuf)
694 dst[1] = cpu_to_be32(l); 694 dst[1] = cpu_to_be32(l);
695} 695}
696 696
697static void key_schedule(u32 * x, u32 * z, u32 * k) 697static void key_schedule(u32 *x, u32 *z, u32 *k)
698{ 698{
699 699
700#define xi(i) ((x[(i)/4] >> (8*(3-((i)%4)))) & 0xff) 700#define xi(i) ((x[(i)/4] >> (8*(3-((i)%4)))) & 0xff)
diff --git a/crypto/cast6.c b/crypto/cast6.c
index 007d02beed67..e0c15a6c7c34 100644
--- a/crypto/cast6.c
+++ b/crypto/cast6.c
@@ -11,7 +11,7 @@
11 * under the terms of GNU General Public License as published by the Free 11 * under the terms of GNU General Public License as published by the Free
12 * Software Foundation; either version 2 of the License, or (at your option) 12 * Software Foundation; either version 2 of the License, or (at your option)
13 * any later version. 13 * any later version.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
@@ -35,12 +35,12 @@ struct cast6_ctx {
35 u8 Kr[12][4]; 35 u8 Kr[12][4];
36}; 36};
37 37
38#define F1(D,r,m) ( (I = ((m) + (D))), (I=rol32(I,(r))), \ 38#define F1(D, r, m) ((I = ((m) + (D))), (I = rol32(I, (r))), \
39 (((s1[I >> 24] ^ s2[(I>>16)&0xff]) - s3[(I>>8)&0xff]) + s4[I&0xff]) ) 39 (((s1[I >> 24] ^ s2[(I>>16)&0xff]) - s3[(I>>8)&0xff]) + s4[I&0xff]))
40#define F2(D,r,m) ( (I = ((m) ^ (D))), (I=rol32(I,(r))), \ 40#define F2(D, r, m) ((I = ((m) ^ (D))), (I = rol32(I, (r))), \
41 (((s1[I >> 24] - s2[(I>>16)&0xff]) + s3[(I>>8)&0xff]) ^ s4[I&0xff]) ) 41 (((s1[I >> 24] - s2[(I>>16)&0xff]) + s3[(I>>8)&0xff]) ^ s4[I&0xff]))
42#define F3(D,r,m) ( (I = ((m) - (D))), (I=rol32(I,(r))), \ 42#define F3(D, r, m) ((I = ((m) - (D))), (I = rol32(I, (r))), \
43 (((s1[I >> 24] + s2[(I>>16)&0xff]) ^ s3[(I>>8)&0xff]) - s4[I&0xff]) ) 43 (((s1[I >> 24] + s2[(I>>16)&0xff]) ^ s3[(I>>8)&0xff]) - s4[I&0xff]))
44 44
45static const u32 s1[256] = { 45static const u32 s1[256] = {
46 0x30fb40d4, 0x9fa0ff0b, 0x6beccd2f, 0x3f258c7a, 0x1e213f2f, 46 0x30fb40d4, 0x9fa0ff0b, 0x6beccd2f, 0x3f258c7a, 0x1e213f2f,
@@ -312,7 +312,7 @@ static const u32 s4[256] = {
312 312
313static const u32 Tm[24][8] = { 313static const u32 Tm[24][8] = {
314 { 0x5a827999, 0xc95c653a, 0x383650db, 0xa7103c7c, 0x15ea281d, 314 { 0x5a827999, 0xc95c653a, 0x383650db, 0xa7103c7c, 0x15ea281d,
315 0x84c413be, 0xf39dff5f, 0x6277eb00 } , 315 0x84c413be, 0xf39dff5f, 0x6277eb00 } ,
316 { 0xd151d6a1, 0x402bc242, 0xaf05ade3, 0x1ddf9984, 0x8cb98525, 316 { 0xd151d6a1, 0x402bc242, 0xaf05ade3, 0x1ddf9984, 0x8cb98525,
317 0xfb9370c6, 0x6a6d5c67, 0xd9474808 } , 317 0xfb9370c6, 0x6a6d5c67, 0xd9474808 } ,
318 { 0x482133a9, 0xb6fb1f4a, 0x25d50aeb, 0x94aef68c, 0x0388e22d, 318 { 0x482133a9, 0xb6fb1f4a, 0x25d50aeb, 0x94aef68c, 0x0388e22d,
@@ -369,7 +369,8 @@ static const u8 Tr[4][8] = {
369}; 369};
370 370
371/* forward octave */ 371/* forward octave */
372static void W(u32 *key, unsigned int i) { 372static void W(u32 *key, unsigned int i)
373{
373 u32 I; 374 u32 I;
374 key[6] ^= F1(key[7], Tr[i % 4][0], Tm[i][0]); 375 key[6] ^= F1(key[7], Tr[i % 4][0], Tm[i][0]);
375 key[5] ^= F2(key[6], Tr[i % 4][1], Tm[i][1]); 376 key[5] ^= F2(key[6], Tr[i % 4][1], Tm[i][1]);
@@ -377,7 +378,7 @@ static void W(u32 *key, unsigned int i) {
377 key[3] ^= F1(key[4], Tr[i % 4][3], Tm[i][3]); 378 key[3] ^= F1(key[4], Tr[i % 4][3], Tm[i][3]);
378 key[2] ^= F2(key[3], Tr[i % 4][4], Tm[i][4]); 379 key[2] ^= F2(key[3], Tr[i % 4][4], Tm[i][4]);
379 key[1] ^= F3(key[2], Tr[i % 4][5], Tm[i][5]); 380 key[1] ^= F3(key[2], Tr[i % 4][5], Tm[i][5]);
380 key[0] ^= F1(key[1], Tr[i % 4][6], Tm[i][6]); 381 key[0] ^= F1(key[1], Tr[i % 4][6], Tm[i][6]);
381 key[7] ^= F2(key[0], Tr[i % 4][7], Tm[i][7]); 382 key[7] ^= F2(key[0], Tr[i % 4][7], Tm[i][7]);
382} 383}
383 384
@@ -393,11 +394,11 @@ static int cast6_setkey(struct crypto_tfm *tfm, const u8 *in_key,
393 if (key_len % 4 != 0) { 394 if (key_len % 4 != 0) {
394 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; 395 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
395 return -EINVAL; 396 return -EINVAL;
396 } 397 }
398
399 memset(p_key, 0, 32);
400 memcpy(p_key, in_key, key_len);
397 401
398 memset (p_key, 0, 32);
399 memcpy (p_key, in_key, key_len);
400
401 key[0] = be32_to_cpu(p_key[0]); /* A */ 402 key[0] = be32_to_cpu(p_key[0]); /* A */
402 key[1] = be32_to_cpu(p_key[1]); /* B */ 403 key[1] = be32_to_cpu(p_key[1]); /* B */
403 key[2] = be32_to_cpu(p_key[2]); /* C */ 404 key[2] = be32_to_cpu(p_key[2]); /* C */
@@ -406,18 +407,16 @@ static int cast6_setkey(struct crypto_tfm *tfm, const u8 *in_key,
406 key[5] = be32_to_cpu(p_key[5]); /* F */ 407 key[5] = be32_to_cpu(p_key[5]); /* F */
407 key[6] = be32_to_cpu(p_key[6]); /* G */ 408 key[6] = be32_to_cpu(p_key[6]); /* G */
408 key[7] = be32_to_cpu(p_key[7]); /* H */ 409 key[7] = be32_to_cpu(p_key[7]); /* H */
409
410
411 410
412 for (i = 0; i < 12; i++) { 411 for (i = 0; i < 12; i++) {
413 W (key, 2 * i); 412 W(key, 2 * i);
414 W (key, 2 * i + 1); 413 W(key, 2 * i + 1);
415 414
416 c->Kr[i][0] = key[0] & 0x1f; 415 c->Kr[i][0] = key[0] & 0x1f;
417 c->Kr[i][1] = key[2] & 0x1f; 416 c->Kr[i][1] = key[2] & 0x1f;
418 c->Kr[i][2] = key[4] & 0x1f; 417 c->Kr[i][2] = key[4] & 0x1f;
419 c->Kr[i][3] = key[6] & 0x1f; 418 c->Kr[i][3] = key[6] & 0x1f;
420 419
421 c->Km[i][0] = key[7]; 420 c->Km[i][0] = key[7];
422 c->Km[i][1] = key[5]; 421 c->Km[i][1] = key[5];
423 c->Km[i][2] = key[3]; 422 c->Km[i][2] = key[3];
@@ -428,21 +427,23 @@ static int cast6_setkey(struct crypto_tfm *tfm, const u8 *in_key,
428} 427}
429 428
430/*forward quad round*/ 429/*forward quad round*/
431static void Q (u32 * block, u8 * Kr, u32 * Km) { 430static void Q(u32 *block, u8 *Kr, u32 *Km)
431{
432 u32 I; 432 u32 I;
433 block[2] ^= F1(block[3], Kr[0], Km[0]); 433 block[2] ^= F1(block[3], Kr[0], Km[0]);
434 block[1] ^= F2(block[2], Kr[1], Km[1]); 434 block[1] ^= F2(block[2], Kr[1], Km[1]);
435 block[0] ^= F3(block[1], Kr[2], Km[2]); 435 block[0] ^= F3(block[1], Kr[2], Km[2]);
436 block[3] ^= F1(block[0], Kr[3], Km[3]); 436 block[3] ^= F1(block[0], Kr[3], Km[3]);
437} 437}
438 438
439/*reverse quad round*/ 439/*reverse quad round*/
440static void QBAR (u32 * block, u8 * Kr, u32 * Km) { 440static void QBAR(u32 *block, u8 *Kr, u32 *Km)
441{
441 u32 I; 442 u32 I;
442 block[3] ^= F1(block[0], Kr[3], Km[3]); 443 block[3] ^= F1(block[0], Kr[3], Km[3]);
443 block[0] ^= F3(block[1], Kr[2], Km[2]); 444 block[0] ^= F3(block[1], Kr[2], Km[2]);
444 block[1] ^= F2(block[2], Kr[1], Km[1]); 445 block[1] ^= F2(block[2], Kr[1], Km[1]);
445 block[2] ^= F1(block[3], Kr[0], Km[0]); 446 block[2] ^= F1(block[3], Kr[0], Km[0]);
446} 447}
447 448
448static void cast6_encrypt(struct crypto_tfm *tfm, u8 *outbuf, const u8 *inbuf) 449static void cast6_encrypt(struct crypto_tfm *tfm, u8 *outbuf, const u8 *inbuf)
@@ -451,64 +452,65 @@ static void cast6_encrypt(struct crypto_tfm *tfm, u8 *outbuf, const u8 *inbuf)
451 const __be32 *src = (const __be32 *)inbuf; 452 const __be32 *src = (const __be32 *)inbuf;
452 __be32 *dst = (__be32 *)outbuf; 453 __be32 *dst = (__be32 *)outbuf;
453 u32 block[4]; 454 u32 block[4];
454 u32 * Km; 455 u32 *Km;
455 u8 * Kr; 456 u8 *Kr;
456 457
457 block[0] = be32_to_cpu(src[0]); 458 block[0] = be32_to_cpu(src[0]);
458 block[1] = be32_to_cpu(src[1]); 459 block[1] = be32_to_cpu(src[1]);
459 block[2] = be32_to_cpu(src[2]); 460 block[2] = be32_to_cpu(src[2]);
460 block[3] = be32_to_cpu(src[3]); 461 block[3] = be32_to_cpu(src[3]);
461 462
462 Km = c->Km[0]; Kr = c->Kr[0]; Q (block, Kr, Km); 463 Km = c->Km[0]; Kr = c->Kr[0]; Q(block, Kr, Km);
463 Km = c->Km[1]; Kr = c->Kr[1]; Q (block, Kr, Km); 464 Km = c->Km[1]; Kr = c->Kr[1]; Q(block, Kr, Km);
464 Km = c->Km[2]; Kr = c->Kr[2]; Q (block, Kr, Km); 465 Km = c->Km[2]; Kr = c->Kr[2]; Q(block, Kr, Km);
465 Km = c->Km[3]; Kr = c->Kr[3]; Q (block, Kr, Km); 466 Km = c->Km[3]; Kr = c->Kr[3]; Q(block, Kr, Km);
466 Km = c->Km[4]; Kr = c->Kr[4]; Q (block, Kr, Km); 467 Km = c->Km[4]; Kr = c->Kr[4]; Q(block, Kr, Km);
467 Km = c->Km[5]; Kr = c->Kr[5]; Q (block, Kr, Km); 468 Km = c->Km[5]; Kr = c->Kr[5]; Q(block, Kr, Km);
468 Km = c->Km[6]; Kr = c->Kr[6]; QBAR (block, Kr, Km); 469 Km = c->Km[6]; Kr = c->Kr[6]; QBAR(block, Kr, Km);
469 Km = c->Km[7]; Kr = c->Kr[7]; QBAR (block, Kr, Km); 470 Km = c->Km[7]; Kr = c->Kr[7]; QBAR(block, Kr, Km);
470 Km = c->Km[8]; Kr = c->Kr[8]; QBAR (block, Kr, Km); 471 Km = c->Km[8]; Kr = c->Kr[8]; QBAR(block, Kr, Km);
471 Km = c->Km[9]; Kr = c->Kr[9]; QBAR (block, Kr, Km); 472 Km = c->Km[9]; Kr = c->Kr[9]; QBAR(block, Kr, Km);
472 Km = c->Km[10]; Kr = c->Kr[10]; QBAR (block, Kr, Km); 473 Km = c->Km[10]; Kr = c->Kr[10]; QBAR(block, Kr, Km);
473 Km = c->Km[11]; Kr = c->Kr[11]; QBAR (block, Kr, Km); 474 Km = c->Km[11]; Kr = c->Kr[11]; QBAR(block, Kr, Km);
474 475
475 dst[0] = cpu_to_be32(block[0]); 476 dst[0] = cpu_to_be32(block[0]);
476 dst[1] = cpu_to_be32(block[1]); 477 dst[1] = cpu_to_be32(block[1]);
477 dst[2] = cpu_to_be32(block[2]); 478 dst[2] = cpu_to_be32(block[2]);
478 dst[3] = cpu_to_be32(block[3]); 479 dst[3] = cpu_to_be32(block[3]);
479} 480}
480 481
481static void cast6_decrypt(struct crypto_tfm *tfm, u8 *outbuf, const u8 *inbuf) { 482static void cast6_decrypt(struct crypto_tfm *tfm, u8 *outbuf, const u8 *inbuf)
482 struct cast6_ctx * c = crypto_tfm_ctx(tfm); 483{
484 struct cast6_ctx *c = crypto_tfm_ctx(tfm);
483 const __be32 *src = (const __be32 *)inbuf; 485 const __be32 *src = (const __be32 *)inbuf;
484 __be32 *dst = (__be32 *)outbuf; 486 __be32 *dst = (__be32 *)outbuf;
485 u32 block[4]; 487 u32 block[4];
486 u32 * Km; 488 u32 *Km;
487 u8 * Kr; 489 u8 *Kr;
488 490
489 block[0] = be32_to_cpu(src[0]); 491 block[0] = be32_to_cpu(src[0]);
490 block[1] = be32_to_cpu(src[1]); 492 block[1] = be32_to_cpu(src[1]);
491 block[2] = be32_to_cpu(src[2]); 493 block[2] = be32_to_cpu(src[2]);
492 block[3] = be32_to_cpu(src[3]); 494 block[3] = be32_to_cpu(src[3]);
493 495
494 Km = c->Km[11]; Kr = c->Kr[11]; Q (block, Kr, Km); 496 Km = c->Km[11]; Kr = c->Kr[11]; Q(block, Kr, Km);
495 Km = c->Km[10]; Kr = c->Kr[10]; Q (block, Kr, Km); 497 Km = c->Km[10]; Kr = c->Kr[10]; Q(block, Kr, Km);
496 Km = c->Km[9]; Kr = c->Kr[9]; Q (block, Kr, Km); 498 Km = c->Km[9]; Kr = c->Kr[9]; Q(block, Kr, Km);
497 Km = c->Km[8]; Kr = c->Kr[8]; Q (block, Kr, Km); 499 Km = c->Km[8]; Kr = c->Kr[8]; Q(block, Kr, Km);
498 Km = c->Km[7]; Kr = c->Kr[7]; Q (block, Kr, Km); 500 Km = c->Km[7]; Kr = c->Kr[7]; Q(block, Kr, Km);
499 Km = c->Km[6]; Kr = c->Kr[6]; Q (block, Kr, Km); 501 Km = c->Km[6]; Kr = c->Kr[6]; Q(block, Kr, Km);
500 Km = c->Km[5]; Kr = c->Kr[5]; QBAR (block, Kr, Km); 502 Km = c->Km[5]; Kr = c->Kr[5]; QBAR(block, Kr, Km);
501 Km = c->Km[4]; Kr = c->Kr[4]; QBAR (block, Kr, Km); 503 Km = c->Km[4]; Kr = c->Kr[4]; QBAR(block, Kr, Km);
502 Km = c->Km[3]; Kr = c->Kr[3]; QBAR (block, Kr, Km); 504 Km = c->Km[3]; Kr = c->Kr[3]; QBAR(block, Kr, Km);
503 Km = c->Km[2]; Kr = c->Kr[2]; QBAR (block, Kr, Km); 505 Km = c->Km[2]; Kr = c->Kr[2]; QBAR(block, Kr, Km);
504 Km = c->Km[1]; Kr = c->Kr[1]; QBAR (block, Kr, Km); 506 Km = c->Km[1]; Kr = c->Kr[1]; QBAR(block, Kr, Km);
505 Km = c->Km[0]; Kr = c->Kr[0]; QBAR (block, Kr, Km); 507 Km = c->Km[0]; Kr = c->Kr[0]; QBAR(block, Kr, Km);
506 508
507 dst[0] = cpu_to_be32(block[0]); 509 dst[0] = cpu_to_be32(block[0]);
508 dst[1] = cpu_to_be32(block[1]); 510 dst[1] = cpu_to_be32(block[1]);
509 dst[2] = cpu_to_be32(block[2]); 511 dst[2] = cpu_to_be32(block[2]);
510 dst[3] = cpu_to_be32(block[3]); 512 dst[3] = cpu_to_be32(block[3]);
511} 513}
512 514
513static struct crypto_alg alg = { 515static struct crypto_alg alg = {
514 .cra_name = "cast6", 516 .cra_name = "cast6",
diff --git a/crypto/cipher.c b/crypto/cipher.c
index 9a1a7316eeac..39541e0e537d 100644
--- a/crypto/cipher.c
+++ b/crypto/cipher.c
@@ -8,7 +8,7 @@
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free 10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option) 11 * Software Foundation; either version 2 of the License, or (at your option)
12 * any later version. 12 * any later version.
13 * 13 *
14 */ 14 */
diff --git a/crypto/compress.c b/crypto/compress.c
index 1ee357085d3a..c33f0763a956 100644
--- a/crypto/compress.c
+++ b/crypto/compress.c
@@ -7,7 +7,7 @@
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the Free 9 * under the terms of the GNU General Public License as published by the Free
10 * Software Foundation; either version 2 of the License, or (at your option) 10 * Software Foundation; either version 2 of the License, or (at your option)
11 * any later version. 11 * any later version.
12 * 12 *
13 */ 13 */
@@ -39,7 +39,7 @@ int crypto_init_compress_ops(struct crypto_tfm *tfm)
39 39
40 ops->cot_compress = crypto_compress; 40 ops->cot_compress = crypto_compress;
41 ops->cot_decompress = crypto_decompress; 41 ops->cot_decompress = crypto_decompress;
42 42
43 return 0; 43 return 0;
44} 44}
45 45
diff --git a/crypto/crc32c.c b/crypto/crc32c.c
index 973bc2cfab2e..de9e55c29794 100644
--- a/crypto/crc32c.c
+++ b/crypto/crc32c.c
@@ -1,4 +1,4 @@
1/* 1/*
2 * Cryptographic API. 2 * Cryptographic API.
3 * 3 *
4 * CRC32C chksum 4 * CRC32C chksum
@@ -30,7 +30,7 @@
30 * 30 *
31 * This program is free software; you can redistribute it and/or modify it 31 * This program is free software; you can redistribute it and/or modify it
32 * under the terms of the GNU General Public License as published by the Free 32 * under the terms of the GNU General Public License as published by the Free
33 * Software Foundation; either version 2 of the License, or (at your option) 33 * Software Foundation; either version 2 of the License, or (at your option)
34 * any later version. 34 * any later version.
35 * 35 *
36 */ 36 */
@@ -142,7 +142,7 @@ static u32 crc32c(u32 crc, const u8 *data, unsigned int length)
142} 142}
143 143
144/* 144/*
145 * Steps through buffer one byte at at time, calculates reflected 145 * Steps through buffer one byte at at time, calculates reflected
146 * crc using table. 146 * crc using table.
147 */ 147 */
148 148
diff --git a/crypto/crypto_null.c b/crypto/crypto_null.c
index cb71c9122bc0..07a8a96d46fc 100644
--- a/crypto/crypto_null.c
+++ b/crypto/crypto_null.c
@@ -1,11 +1,11 @@
1/* 1/*
2 * Cryptographic API. 2 * Cryptographic API.
3 * 3 *
4 * Null algorithms, aka Much Ado About Nothing. 4 * Null algorithms, aka Much Ado About Nothing.
5 * 5 *
6 * These are needed for IPsec, and may be useful in general for 6 * These are needed for IPsec, and may be useful in general for
7 * testing & debugging. 7 * testing & debugging.
8 * 8 *
9 * The null cipher is compliant with RFC2410. 9 * The null cipher is compliant with RFC2410.
10 * 10 *
11 * Copyright (c) 2002 James Morris <jmorris@intercode.com.au> 11 * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
@@ -163,7 +163,7 @@ MODULE_ALIAS("cipher_null");
163static int __init crypto_null_mod_init(void) 163static int __init crypto_null_mod_init(void)
164{ 164{
165 int ret = 0; 165 int ret = 0;
166 166
167 ret = crypto_register_alg(&cipher_null); 167 ret = crypto_register_alg(&cipher_null);
168 if (ret < 0) 168 if (ret < 0)
169 goto out; 169 goto out;
@@ -180,7 +180,7 @@ static int __init crypto_null_mod_init(void)
180 if (ret < 0) 180 if (ret < 0)
181 goto out_unregister_digest; 181 goto out_unregister_digest;
182 182
183out: 183out:
184 return ret; 184 return ret;
185 185
186out_unregister_digest: 186out_unregister_digest:
diff --git a/crypto/deflate.c b/crypto/deflate.c
index 9128da44e953..463dc859aa05 100644
--- a/crypto/deflate.c
+++ b/crypto/deflate.c
@@ -1,14 +1,14 @@
1/* 1/*
2 * Cryptographic API. 2 * Cryptographic API.
3 * 3 *
4 * Deflate algorithm (RFC 1951), implemented here primarily for use 4 * Deflate algorithm (RFC 1951), implemented here primarily for use
5 * by IPCOMP (RFC 3173 & RFC 2394). 5 * by IPCOMP (RFC 3173 & RFC 2394).
6 * 6 *
7 * Copyright (c) 2003 James Morris <jmorris@intercode.com.au> 7 * Copyright (c) 2003 James Morris <jmorris@intercode.com.au>
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free 10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option) 11 * Software Foundation; either version 2 of the License, or (at your option)
12 * any later version. 12 * any later version.
13 * 13 *
14 * FIXME: deflate transforms will require up to a total of about 436k of kernel 14 * FIXME: deflate transforms will require up to a total of about 436k of kernel
@@ -49,7 +49,7 @@ static int deflate_comp_init(struct deflate_ctx *ctx)
49 struct z_stream_s *stream = &ctx->comp_stream; 49 struct z_stream_s *stream = &ctx->comp_stream;
50 50
51 stream->workspace = vmalloc(zlib_deflate_workspacesize()); 51 stream->workspace = vmalloc(zlib_deflate_workspacesize());
52 if (!stream->workspace ) { 52 if (!stream->workspace) {
53 ret = -ENOMEM; 53 ret = -ENOMEM;
54 goto out; 54 goto out;
55 } 55 }
@@ -61,7 +61,7 @@ static int deflate_comp_init(struct deflate_ctx *ctx)
61 ret = -EINVAL; 61 ret = -EINVAL;
62 goto out_free; 62 goto out_free;
63 } 63 }
64out: 64out:
65 return ret; 65 return ret;
66out_free: 66out_free:
67 vfree(stream->workspace); 67 vfree(stream->workspace);
@@ -74,7 +74,7 @@ static int deflate_decomp_init(struct deflate_ctx *ctx)
74 struct z_stream_s *stream = &ctx->decomp_stream; 74 struct z_stream_s *stream = &ctx->decomp_stream;
75 75
76 stream->workspace = kzalloc(zlib_inflate_workspacesize(), GFP_KERNEL); 76 stream->workspace = kzalloc(zlib_inflate_workspacesize(), GFP_KERNEL);
77 if (!stream->workspace ) { 77 if (!stream->workspace) {
78 ret = -ENOMEM; 78 ret = -ENOMEM;
79 goto out; 79 goto out;
80 } 80 }
@@ -106,7 +106,7 @@ static int deflate_init(struct crypto_tfm *tfm)
106{ 106{
107 struct deflate_ctx *ctx = crypto_tfm_ctx(tfm); 107 struct deflate_ctx *ctx = crypto_tfm_ctx(tfm);
108 int ret; 108 int ret;
109 109
110 ret = deflate_comp_init(ctx); 110 ret = deflate_comp_init(ctx);
111 if (ret) 111 if (ret)
112 goto out; 112 goto out;
@@ -153,11 +153,11 @@ static int deflate_compress(struct crypto_tfm *tfm, const u8 *src,
153out: 153out:
154 return ret; 154 return ret;
155} 155}
156 156
157static int deflate_decompress(struct crypto_tfm *tfm, const u8 *src, 157static int deflate_decompress(struct crypto_tfm *tfm, const u8 *src,
158 unsigned int slen, u8 *dst, unsigned int *dlen) 158 unsigned int slen, u8 *dst, unsigned int *dlen)
159{ 159{
160 160
161 int ret = 0; 161 int ret = 0;
162 struct deflate_ctx *dctx = crypto_tfm_ctx(tfm); 162 struct deflate_ctx *dctx = crypto_tfm_ctx(tfm);
163 struct z_stream_s *stream = &dctx->decomp_stream; 163 struct z_stream_s *stream = &dctx->decomp_stream;
@@ -182,7 +182,7 @@ static int deflate_decompress(struct crypto_tfm *tfm, const u8 *src,
182 if (ret == Z_OK && !stream->avail_in && stream->avail_out) { 182 if (ret == Z_OK && !stream->avail_in && stream->avail_out) {
183 u8 zerostuff = 0; 183 u8 zerostuff = 0;
184 stream->next_in = &zerostuff; 184 stream->next_in = &zerostuff;
185 stream->avail_in = 1; 185 stream->avail_in = 1;
186 ret = zlib_inflate(stream, Z_FINISH); 186 ret = zlib_inflate(stream, Z_FINISH);
187 } 187 }
188 if (ret != Z_STREAM_END) { 188 if (ret != Z_STREAM_END) {
diff --git a/crypto/des_generic.c b/crypto/des_generic.c
index 5bd3ee345a64..249f903cc453 100644
--- a/crypto/des_generic.c
+++ b/crypto/des_generic.c
@@ -869,8 +869,7 @@ static int des3_ede_setkey(struct crypto_tfm *tfm, const u8 *key,
869 869
870 if (unlikely(!((K[0] ^ K[2]) | (K[1] ^ K[3])) || 870 if (unlikely(!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||
871 !((K[2] ^ K[4]) | (K[3] ^ K[5]))) && 871 !((K[2] ^ K[4]) | (K[3] ^ K[5]))) &&
872 (*flags & CRYPTO_TFM_REQ_WEAK_KEY)) 872 (*flags & CRYPTO_TFM_REQ_WEAK_KEY)) {
873 {
874 *flags |= CRYPTO_TFM_RES_WEAK_KEY; 873 *flags |= CRYPTO_TFM_RES_WEAK_KEY;
875 return -EINVAL; 874 return -EINVAL;
876 } 875 }
diff --git a/crypto/ecb.c b/crypto/ecb.c
index a46838e98a71..935cfef4aa84 100644
--- a/crypto/ecb.c
+++ b/crypto/ecb.c
@@ -55,7 +55,7 @@ static int crypto_ecb_crypt(struct blkcipher_desc *desc,
55 55
56 do { 56 do {
57 fn(crypto_cipher_tfm(tfm), wdst, wsrc); 57 fn(crypto_cipher_tfm(tfm), wdst, wsrc);
58 58
59 wsrc += bsize; 59 wsrc += bsize;
60 wdst += bsize; 60 wdst += bsize;
61 } while ((nbytes -= bsize) >= bsize); 61 } while ((nbytes -= bsize) >= bsize);
diff --git a/crypto/fcrypt.c b/crypto/fcrypt.c
index b82d61f4e26c..c33107e340b6 100644
--- a/crypto/fcrypt.c
+++ b/crypto/fcrypt.c
@@ -60,13 +60,13 @@ do { \
60 u32 t = lo & ((1 << n) - 1); \ 60 u32 t = lo & ((1 << n) - 1); \
61 lo = (lo >> n) | ((hi & ((1 << n) - 1)) << (32 - n)); \ 61 lo = (lo >> n) | ((hi & ((1 << n) - 1)) << (32 - n)); \
62 hi = (hi >> n) | (t << (24-n)); \ 62 hi = (hi >> n) | (t << (24-n)); \
63} while(0) 63} while (0)
64 64
65/* Rotate right one 64 bit number as a 56 bit number */ 65/* Rotate right one 64 bit number as a 56 bit number */
66#define ror56_64(k, n) \ 66#define ror56_64(k, n) \
67do { \ 67do { \
68 k = (k >> n) | ((k & ((1 << n) - 1)) << (56 - n)); \ 68 k = (k >> n) | ((k & ((1 << n) - 1)) << (56 - n)); \
69} while(0) 69} while (0)
70 70
71/* 71/*
72 * Sboxes for Feistel network derived from 72 * Sboxes for Feistel network derived from
@@ -228,7 +228,7 @@ do { \
228 union lc4 { __be32 l; u8 c[4]; } u; \ 228 union lc4 { __be32 l; u8 c[4]; } u; \
229 u.l = sched ^ R; \ 229 u.l = sched ^ R; \
230 L ^= sbox0[u.c[0]] ^ sbox1[u.c[1]] ^ sbox2[u.c[2]] ^ sbox3[u.c[3]]; \ 230 L ^= sbox0[u.c[0]] ^ sbox1[u.c[1]] ^ sbox2[u.c[2]] ^ sbox3[u.c[3]]; \
231} while(0) 231} while (0)
232 232
233/* 233/*
234 * encryptor 234 * encryptor
diff --git a/crypto/gcm.c b/crypto/gcm.c
index c6547130624c..2f5fbba6576c 100644
--- a/crypto/gcm.c
+++ b/crypto/gcm.c
@@ -37,6 +37,19 @@ struct crypto_rfc4106_ctx {
37 u8 nonce[4]; 37 u8 nonce[4];
38}; 38};
39 39
40struct crypto_rfc4543_ctx {
41 struct crypto_aead *child;
42 u8 nonce[4];
43};
44
45struct crypto_rfc4543_req_ctx {
46 u8 auth_tag[16];
47 struct scatterlist cipher[1];
48 struct scatterlist payload[2];
49 struct scatterlist assoc[2];
50 struct aead_request subreq;
51};
52
40struct crypto_gcm_ghash_ctx { 53struct crypto_gcm_ghash_ctx {
41 unsigned int cryptlen; 54 unsigned int cryptlen;
42 struct scatterlist *src; 55 struct scatterlist *src;
@@ -1047,6 +1060,272 @@ static struct crypto_template crypto_rfc4106_tmpl = {
1047 .module = THIS_MODULE, 1060 .module = THIS_MODULE,
1048}; 1061};
1049 1062
1063static inline struct crypto_rfc4543_req_ctx *crypto_rfc4543_reqctx(
1064 struct aead_request *req)
1065{
1066 unsigned long align = crypto_aead_alignmask(crypto_aead_reqtfm(req));
1067
1068 return (void *)PTR_ALIGN((u8 *)aead_request_ctx(req), align + 1);
1069}
1070
1071static int crypto_rfc4543_setkey(struct crypto_aead *parent, const u8 *key,
1072 unsigned int keylen)
1073{
1074 struct crypto_rfc4543_ctx *ctx = crypto_aead_ctx(parent);
1075 struct crypto_aead *child = ctx->child;
1076 int err;
1077
1078 if (keylen < 4)
1079 return -EINVAL;
1080
1081 keylen -= 4;
1082 memcpy(ctx->nonce, key + keylen, 4);
1083
1084 crypto_aead_clear_flags(child, CRYPTO_TFM_REQ_MASK);
1085 crypto_aead_set_flags(child, crypto_aead_get_flags(parent) &
1086 CRYPTO_TFM_REQ_MASK);
1087 err = crypto_aead_setkey(child, key, keylen);
1088 crypto_aead_set_flags(parent, crypto_aead_get_flags(child) &
1089 CRYPTO_TFM_RES_MASK);
1090
1091 return err;
1092}
1093
1094static int crypto_rfc4543_setauthsize(struct crypto_aead *parent,
1095 unsigned int authsize)
1096{
1097 struct crypto_rfc4543_ctx *ctx = crypto_aead_ctx(parent);
1098
1099 if (authsize != 16)
1100 return -EINVAL;
1101
1102 return crypto_aead_setauthsize(ctx->child, authsize);
1103}
1104
1105/* this is the same as crypto_authenc_chain */
1106static void crypto_rfc4543_chain(struct scatterlist *head,
1107 struct scatterlist *sg, int chain)
1108{
1109 if (chain) {
1110 head->length += sg->length;
1111 sg = scatterwalk_sg_next(sg);
1112 }
1113
1114 if (sg)
1115 scatterwalk_sg_chain(head, 2, sg);
1116 else
1117 sg_mark_end(head);
1118}
1119
1120static struct aead_request *crypto_rfc4543_crypt(struct aead_request *req,
1121 int enc)
1122{
1123 struct crypto_aead *aead = crypto_aead_reqtfm(req);
1124 struct crypto_rfc4543_ctx *ctx = crypto_aead_ctx(aead);
1125 struct crypto_rfc4543_req_ctx *rctx = crypto_rfc4543_reqctx(req);
1126 struct aead_request *subreq = &rctx->subreq;
1127 struct scatterlist *dst = req->dst;
1128 struct scatterlist *cipher = rctx->cipher;
1129 struct scatterlist *payload = rctx->payload;
1130 struct scatterlist *assoc = rctx->assoc;
1131 unsigned int authsize = crypto_aead_authsize(aead);
1132 unsigned int assoclen = req->assoclen;
1133 struct page *dstp;
1134 u8 *vdst;
1135 u8 *iv = PTR_ALIGN((u8 *)(rctx + 1) + crypto_aead_reqsize(ctx->child),
1136 crypto_aead_alignmask(ctx->child) + 1);
1137
1138 memcpy(iv, ctx->nonce, 4);
1139 memcpy(iv + 4, req->iv, 8);
1140
1141 /* construct cipher/plaintext */
1142 if (enc)
1143 memset(rctx->auth_tag, 0, authsize);
1144 else
1145 scatterwalk_map_and_copy(rctx->auth_tag, dst,
1146 req->cryptlen - authsize,
1147 authsize, 0);
1148
1149 sg_init_one(cipher, rctx->auth_tag, authsize);
1150
1151 /* construct the aad */
1152 dstp = sg_page(dst);
1153 vdst = PageHighMem(dstp) ? NULL : page_address(dstp) + dst->offset;
1154
1155 sg_init_table(payload, 2);
1156 sg_set_buf(payload, req->iv, 8);
1157 crypto_rfc4543_chain(payload, dst, vdst == req->iv + 8);
1158 assoclen += 8 + req->cryptlen - (enc ? 0 : authsize);
1159
1160 sg_init_table(assoc, 2);
1161 sg_set_page(assoc, sg_page(req->assoc), req->assoc->length,
1162 req->assoc->offset);
1163 crypto_rfc4543_chain(assoc, payload, 0);
1164
1165 aead_request_set_tfm(subreq, ctx->child);
1166 aead_request_set_callback(subreq, req->base.flags, req->base.complete,
1167 req->base.data);
1168 aead_request_set_crypt(subreq, cipher, cipher, enc ? 0 : authsize, iv);
1169 aead_request_set_assoc(subreq, assoc, assoclen);
1170
1171 return subreq;
1172}
1173
1174static int crypto_rfc4543_encrypt(struct aead_request *req)
1175{
1176 struct crypto_aead *aead = crypto_aead_reqtfm(req);
1177 struct crypto_rfc4543_req_ctx *rctx = crypto_rfc4543_reqctx(req);
1178 struct aead_request *subreq;
1179 int err;
1180
1181 subreq = crypto_rfc4543_crypt(req, 1);
1182 err = crypto_aead_encrypt(subreq);
1183 if (err)
1184 return err;
1185
1186 scatterwalk_map_and_copy(rctx->auth_tag, req->dst, req->cryptlen,
1187 crypto_aead_authsize(aead), 1);
1188
1189 return 0;
1190}
1191
1192static int crypto_rfc4543_decrypt(struct aead_request *req)
1193{
1194 req = crypto_rfc4543_crypt(req, 0);
1195
1196 return crypto_aead_decrypt(req);
1197}
1198
1199static int crypto_rfc4543_init_tfm(struct crypto_tfm *tfm)
1200{
1201 struct crypto_instance *inst = (void *)tfm->__crt_alg;
1202 struct crypto_aead_spawn *spawn = crypto_instance_ctx(inst);
1203 struct crypto_rfc4543_ctx *ctx = crypto_tfm_ctx(tfm);
1204 struct crypto_aead *aead;
1205 unsigned long align;
1206
1207 aead = crypto_spawn_aead(spawn);
1208 if (IS_ERR(aead))
1209 return PTR_ERR(aead);
1210
1211 ctx->child = aead;
1212
1213 align = crypto_aead_alignmask(aead);
1214 align &= ~(crypto_tfm_ctx_alignment() - 1);
1215 tfm->crt_aead.reqsize = sizeof(struct crypto_rfc4543_req_ctx) +
1216 ALIGN(crypto_aead_reqsize(aead),
1217 crypto_tfm_ctx_alignment()) +
1218 align + 16;
1219
1220 return 0;
1221}
1222
1223static void crypto_rfc4543_exit_tfm(struct crypto_tfm *tfm)
1224{
1225 struct crypto_rfc4543_ctx *ctx = crypto_tfm_ctx(tfm);
1226
1227 crypto_free_aead(ctx->child);
1228}
1229
1230static struct crypto_instance *crypto_rfc4543_alloc(struct rtattr **tb)
1231{
1232 struct crypto_attr_type *algt;
1233 struct crypto_instance *inst;
1234 struct crypto_aead_spawn *spawn;
1235 struct crypto_alg *alg;
1236 const char *ccm_name;
1237 int err;
1238
1239 algt = crypto_get_attr_type(tb);
1240 err = PTR_ERR(algt);
1241 if (IS_ERR(algt))
1242 return ERR_PTR(err);
1243
1244 if ((algt->type ^ CRYPTO_ALG_TYPE_AEAD) & algt->mask)
1245 return ERR_PTR(-EINVAL);
1246
1247 ccm_name = crypto_attr_alg_name(tb[1]);
1248 err = PTR_ERR(ccm_name);
1249 if (IS_ERR(ccm_name))
1250 return ERR_PTR(err);
1251
1252 inst = kzalloc(sizeof(*inst) + sizeof(*spawn), GFP_KERNEL);
1253 if (!inst)
1254 return ERR_PTR(-ENOMEM);
1255
1256 spawn = crypto_instance_ctx(inst);
1257 crypto_set_aead_spawn(spawn, inst);
1258 err = crypto_grab_aead(spawn, ccm_name, 0,
1259 crypto_requires_sync(algt->type, algt->mask));
1260 if (err)
1261 goto out_free_inst;
1262
1263 alg = crypto_aead_spawn_alg(spawn);
1264
1265 err = -EINVAL;
1266
1267 /* We only support 16-byte blocks. */
1268 if (alg->cra_aead.ivsize != 16)
1269 goto out_drop_alg;
1270
1271 /* Not a stream cipher? */
1272 if (alg->cra_blocksize != 1)
1273 goto out_drop_alg;
1274
1275 err = -ENAMETOOLONG;
1276 if (snprintf(inst->alg.cra_name, CRYPTO_MAX_ALG_NAME,
1277 "rfc4543(%s)", alg->cra_name) >= CRYPTO_MAX_ALG_NAME ||
1278 snprintf(inst->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME,
1279 "rfc4543(%s)", alg->cra_driver_name) >=
1280 CRYPTO_MAX_ALG_NAME)
1281 goto out_drop_alg;
1282
1283 inst->alg.cra_flags = CRYPTO_ALG_TYPE_AEAD;
1284 inst->alg.cra_flags |= alg->cra_flags & CRYPTO_ALG_ASYNC;
1285 inst->alg.cra_priority = alg->cra_priority;
1286 inst->alg.cra_blocksize = 1;
1287 inst->alg.cra_alignmask = alg->cra_alignmask;
1288 inst->alg.cra_type = &crypto_nivaead_type;
1289
1290 inst->alg.cra_aead.ivsize = 8;
1291 inst->alg.cra_aead.maxauthsize = 16;
1292
1293 inst->alg.cra_ctxsize = sizeof(struct crypto_rfc4543_ctx);
1294
1295 inst->alg.cra_init = crypto_rfc4543_init_tfm;
1296 inst->alg.cra_exit = crypto_rfc4543_exit_tfm;
1297
1298 inst->alg.cra_aead.setkey = crypto_rfc4543_setkey;
1299 inst->alg.cra_aead.setauthsize = crypto_rfc4543_setauthsize;
1300 inst->alg.cra_aead.encrypt = crypto_rfc4543_encrypt;
1301 inst->alg.cra_aead.decrypt = crypto_rfc4543_decrypt;
1302
1303 inst->alg.cra_aead.geniv = "seqiv";
1304
1305out:
1306 return inst;
1307
1308out_drop_alg:
1309 crypto_drop_aead(spawn);
1310out_free_inst:
1311 kfree(inst);
1312 inst = ERR_PTR(err);
1313 goto out;
1314}
1315
1316static void crypto_rfc4543_free(struct crypto_instance *inst)
1317{
1318 crypto_drop_spawn(crypto_instance_ctx(inst));
1319 kfree(inst);
1320}
1321
1322static struct crypto_template crypto_rfc4543_tmpl = {
1323 .name = "rfc4543",
1324 .alloc = crypto_rfc4543_alloc,
1325 .free = crypto_rfc4543_free,
1326 .module = THIS_MODULE,
1327};
1328
1050static int __init crypto_gcm_module_init(void) 1329static int __init crypto_gcm_module_init(void)
1051{ 1330{
1052 int err; 1331 int err;
@@ -1067,8 +1346,14 @@ static int __init crypto_gcm_module_init(void)
1067 if (err) 1346 if (err)
1068 goto out_undo_gcm; 1347 goto out_undo_gcm;
1069 1348
1349 err = crypto_register_template(&crypto_rfc4543_tmpl);
1350 if (err)
1351 goto out_undo_rfc4106;
1352
1070 return 0; 1353 return 0;
1071 1354
1355out_undo_rfc4106:
1356 crypto_unregister_template(&crypto_rfc4106_tmpl);
1072out_undo_gcm: 1357out_undo_gcm:
1073 crypto_unregister_template(&crypto_gcm_tmpl); 1358 crypto_unregister_template(&crypto_gcm_tmpl);
1074out_undo_base: 1359out_undo_base:
@@ -1081,6 +1366,7 @@ out:
1081static void __exit crypto_gcm_module_exit(void) 1366static void __exit crypto_gcm_module_exit(void)
1082{ 1367{
1083 kfree(gcm_zeroes); 1368 kfree(gcm_zeroes);
1369 crypto_unregister_template(&crypto_rfc4543_tmpl);
1084 crypto_unregister_template(&crypto_rfc4106_tmpl); 1370 crypto_unregister_template(&crypto_rfc4106_tmpl);
1085 crypto_unregister_template(&crypto_gcm_tmpl); 1371 crypto_unregister_template(&crypto_gcm_tmpl);
1086 crypto_unregister_template(&crypto_gcm_base_tmpl); 1372 crypto_unregister_template(&crypto_gcm_base_tmpl);
@@ -1094,3 +1380,4 @@ MODULE_DESCRIPTION("Galois/Counter Mode");
1094MODULE_AUTHOR("Mikko Herranen <mh1@iki.fi>"); 1380MODULE_AUTHOR("Mikko Herranen <mh1@iki.fi>");
1095MODULE_ALIAS("gcm_base"); 1381MODULE_ALIAS("gcm_base");
1096MODULE_ALIAS("rfc4106"); 1382MODULE_ALIAS("rfc4106");
1383MODULE_ALIAS("rfc4543");
diff --git a/crypto/md5.c b/crypto/md5.c
index 83eb52961750..9fda213a592e 100644
--- a/crypto/md5.c
+++ b/crypto/md5.c
@@ -16,17 +16,13 @@
16 * 16 *
17 */ 17 */
18#include <crypto/internal/hash.h> 18#include <crypto/internal/hash.h>
19#include <crypto/md5.h>
19#include <linux/init.h> 20#include <linux/init.h>
20#include <linux/module.h> 21#include <linux/module.h>
21#include <linux/string.h> 22#include <linux/string.h>
22#include <linux/types.h> 23#include <linux/types.h>
23#include <asm/byteorder.h> 24#include <asm/byteorder.h>
24 25
25#define MD5_DIGEST_SIZE 16
26#define MD5_HMAC_BLOCK_SIZE 64
27#define MD5_BLOCK_WORDS 16
28#define MD5_HASH_WORDS 4
29
30#define F1(x, y, z) (z ^ (x & (y ^ z))) 26#define F1(x, y, z) (z ^ (x & (y ^ z)))
31#define F2(x, y, z) F1(z, x, y) 27#define F2(x, y, z) F1(z, x, y)
32#define F3(x, y, z) (x ^ y ^ z) 28#define F3(x, y, z) (x ^ y ^ z)
@@ -35,12 +31,6 @@
35#define MD5STEP(f, w, x, y, z, in, s) \ 31#define MD5STEP(f, w, x, y, z, in, s) \
36 (w += f(x, y, z) + in, w = (w<<s | w>>(32-s)) + x) 32 (w += f(x, y, z) + in, w = (w<<s | w>>(32-s)) + x)
37 33
38struct md5_ctx {
39 u32 hash[MD5_HASH_WORDS];
40 u32 block[MD5_BLOCK_WORDS];
41 u64 byte_count;
42};
43
44static void md5_transform(u32 *hash, u32 const *in) 34static void md5_transform(u32 *hash, u32 const *in)
45{ 35{
46 u32 a, b, c, d; 36 u32 a, b, c, d;
@@ -141,7 +131,7 @@ static inline void cpu_to_le32_array(u32 *buf, unsigned int words)
141 } 131 }
142} 132}
143 133
144static inline void md5_transform_helper(struct md5_ctx *ctx) 134static inline void md5_transform_helper(struct md5_state *ctx)
145{ 135{
146 le32_to_cpu_array(ctx->block, sizeof(ctx->block) / sizeof(u32)); 136 le32_to_cpu_array(ctx->block, sizeof(ctx->block) / sizeof(u32));
147 md5_transform(ctx->hash, ctx->block); 137 md5_transform(ctx->hash, ctx->block);
@@ -149,7 +139,7 @@ static inline void md5_transform_helper(struct md5_ctx *ctx)
149 139
150static int md5_init(struct shash_desc *desc) 140static int md5_init(struct shash_desc *desc)
151{ 141{
152 struct md5_ctx *mctx = shash_desc_ctx(desc); 142 struct md5_state *mctx = shash_desc_ctx(desc);
153 143
154 mctx->hash[0] = 0x67452301; 144 mctx->hash[0] = 0x67452301;
155 mctx->hash[1] = 0xefcdab89; 145 mctx->hash[1] = 0xefcdab89;
@@ -162,7 +152,7 @@ static int md5_init(struct shash_desc *desc)
162 152
163static int md5_update(struct shash_desc *desc, const u8 *data, unsigned int len) 153static int md5_update(struct shash_desc *desc, const u8 *data, unsigned int len)
164{ 154{
165 struct md5_ctx *mctx = shash_desc_ctx(desc); 155 struct md5_state *mctx = shash_desc_ctx(desc);
166 const u32 avail = sizeof(mctx->block) - (mctx->byte_count & 0x3f); 156 const u32 avail = sizeof(mctx->block) - (mctx->byte_count & 0x3f);
167 157
168 mctx->byte_count += len; 158 mctx->byte_count += len;
@@ -194,7 +184,7 @@ static int md5_update(struct shash_desc *desc, const u8 *data, unsigned int len)
194 184
195static int md5_final(struct shash_desc *desc, u8 *out) 185static int md5_final(struct shash_desc *desc, u8 *out)
196{ 186{
197 struct md5_ctx *mctx = shash_desc_ctx(desc); 187 struct md5_state *mctx = shash_desc_ctx(desc);
198 const unsigned int offset = mctx->byte_count & 0x3f; 188 const unsigned int offset = mctx->byte_count & 0x3f;
199 char *p = (char *)mctx->block + offset; 189 char *p = (char *)mctx->block + offset;
200 int padding = 56 - (offset + 1); 190 int padding = 56 - (offset + 1);
@@ -220,12 +210,30 @@ static int md5_final(struct shash_desc *desc, u8 *out)
220 return 0; 210 return 0;
221} 211}
222 212
213static int md5_export(struct shash_desc *desc, void *out)
214{
215 struct md5_state *ctx = shash_desc_ctx(desc);
216
217 memcpy(out, ctx, sizeof(*ctx));
218 return 0;
219}
220
221static int md5_import(struct shash_desc *desc, const void *in)
222{
223 struct md5_state *ctx = shash_desc_ctx(desc);
224
225 memcpy(ctx, in, sizeof(*ctx));
226 return 0;
227}
228
223static struct shash_alg alg = { 229static struct shash_alg alg = {
224 .digestsize = MD5_DIGEST_SIZE, 230 .digestsize = MD5_DIGEST_SIZE,
225 .init = md5_init, 231 .init = md5_init,
226 .update = md5_update, 232 .update = md5_update,
227 .final = md5_final, 233 .final = md5_final,
228 .descsize = sizeof(struct md5_ctx), 234 .export = md5_export,
235 .import = md5_import,
236 .descsize = sizeof(struct md5_state),
229 .base = { 237 .base = {
230 .cra_name = "md5", 238 .cra_name = "md5",
231 .cra_flags = CRYPTO_ALG_TYPE_SHASH, 239 .cra_flags = CRYPTO_ALG_TYPE_SHASH,
diff --git a/crypto/pcrypt.c b/crypto/pcrypt.c
new file mode 100644
index 000000000000..80201241b698
--- /dev/null
+++ b/crypto/pcrypt.c
@@ -0,0 +1,445 @@
1/*
2 * pcrypt - Parallel crypto wrapper.
3 *
4 * Copyright (C) 2009 secunet Security Networks AG
5 * Copyright (C) 2009 Steffen Klassert <steffen.klassert@secunet.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <crypto/algapi.h>
22#include <crypto/internal/aead.h>
23#include <linux/err.h>
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/slab.h>
27#include <crypto/pcrypt.h>
28
29static struct padata_instance *pcrypt_enc_padata;
30static struct padata_instance *pcrypt_dec_padata;
31static struct workqueue_struct *encwq;
32static struct workqueue_struct *decwq;
33
34struct pcrypt_instance_ctx {
35 struct crypto_spawn spawn;
36 unsigned int tfm_count;
37};
38
39struct pcrypt_aead_ctx {
40 struct crypto_aead *child;
41 unsigned int cb_cpu;
42};
43
44static int pcrypt_do_parallel(struct padata_priv *padata, unsigned int *cb_cpu,
45 struct padata_instance *pinst)
46{
47 unsigned int cpu_index, cpu, i;
48
49 cpu = *cb_cpu;
50
51 if (cpumask_test_cpu(cpu, cpu_active_mask))
52 goto out;
53
54 cpu_index = cpu % cpumask_weight(cpu_active_mask);
55
56 cpu = cpumask_first(cpu_active_mask);
57 for (i = 0; i < cpu_index; i++)
58 cpu = cpumask_next(cpu, cpu_active_mask);
59
60 *cb_cpu = cpu;
61
62out:
63 return padata_do_parallel(pinst, padata, cpu);
64}
65
66static int pcrypt_aead_setkey(struct crypto_aead *parent,
67 const u8 *key, unsigned int keylen)
68{
69 struct pcrypt_aead_ctx *ctx = crypto_aead_ctx(parent);
70
71 return crypto_aead_setkey(ctx->child, key, keylen);
72}
73
74static int pcrypt_aead_setauthsize(struct crypto_aead *parent,
75 unsigned int authsize)
76{
77 struct pcrypt_aead_ctx *ctx = crypto_aead_ctx(parent);
78
79 return crypto_aead_setauthsize(ctx->child, authsize);
80}
81
82static void pcrypt_aead_serial(struct padata_priv *padata)
83{
84 struct pcrypt_request *preq = pcrypt_padata_request(padata);
85 struct aead_request *req = pcrypt_request_ctx(preq);
86
87 aead_request_complete(req->base.data, padata->info);
88}
89
90static void pcrypt_aead_giv_serial(struct padata_priv *padata)
91{
92 struct pcrypt_request *preq = pcrypt_padata_request(padata);
93 struct aead_givcrypt_request *req = pcrypt_request_ctx(preq);
94
95 aead_request_complete(req->areq.base.data, padata->info);
96}
97
98static void pcrypt_aead_done(struct crypto_async_request *areq, int err)
99{
100 struct aead_request *req = areq->data;
101 struct pcrypt_request *preq = aead_request_ctx(req);
102 struct padata_priv *padata = pcrypt_request_padata(preq);
103
104 padata->info = err;
105 req->base.flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
106
107 padata_do_serial(padata);
108}
109
110static void pcrypt_aead_enc(struct padata_priv *padata)
111{
112 struct pcrypt_request *preq = pcrypt_padata_request(padata);
113 struct aead_request *req = pcrypt_request_ctx(preq);
114
115 padata->info = crypto_aead_encrypt(req);
116
117 if (padata->info == -EINPROGRESS)
118 return;
119
120 padata_do_serial(padata);
121}
122
123static int pcrypt_aead_encrypt(struct aead_request *req)
124{
125 int err;
126 struct pcrypt_request *preq = aead_request_ctx(req);
127 struct aead_request *creq = pcrypt_request_ctx(preq);
128 struct padata_priv *padata = pcrypt_request_padata(preq);
129 struct crypto_aead *aead = crypto_aead_reqtfm(req);
130 struct pcrypt_aead_ctx *ctx = crypto_aead_ctx(aead);
131 u32 flags = aead_request_flags(req);
132
133 memset(padata, 0, sizeof(struct padata_priv));
134
135 padata->parallel = pcrypt_aead_enc;
136 padata->serial = pcrypt_aead_serial;
137
138 aead_request_set_tfm(creq, ctx->child);
139 aead_request_set_callback(creq, flags & ~CRYPTO_TFM_REQ_MAY_SLEEP,
140 pcrypt_aead_done, req);
141 aead_request_set_crypt(creq, req->src, req->dst,
142 req->cryptlen, req->iv);
143 aead_request_set_assoc(creq, req->assoc, req->assoclen);
144
145 err = pcrypt_do_parallel(padata, &ctx->cb_cpu, pcrypt_enc_padata);
146 if (err)
147 return err;
148 else
149 err = crypto_aead_encrypt(creq);
150
151 return err;
152}
153
154static void pcrypt_aead_dec(struct padata_priv *padata)
155{
156 struct pcrypt_request *preq = pcrypt_padata_request(padata);
157 struct aead_request *req = pcrypt_request_ctx(preq);
158
159 padata->info = crypto_aead_decrypt(req);
160
161 if (padata->info == -EINPROGRESS)
162 return;
163
164 padata_do_serial(padata);
165}
166
167static int pcrypt_aead_decrypt(struct aead_request *req)
168{
169 int err;
170 struct pcrypt_request *preq = aead_request_ctx(req);
171 struct aead_request *creq = pcrypt_request_ctx(preq);
172 struct padata_priv *padata = pcrypt_request_padata(preq);
173 struct crypto_aead *aead = crypto_aead_reqtfm(req);
174 struct pcrypt_aead_ctx *ctx = crypto_aead_ctx(aead);
175 u32 flags = aead_request_flags(req);
176
177 memset(padata, 0, sizeof(struct padata_priv));
178
179 padata->parallel = pcrypt_aead_dec;
180 padata->serial = pcrypt_aead_serial;
181
182 aead_request_set_tfm(creq, ctx->child);
183 aead_request_set_callback(creq, flags & ~CRYPTO_TFM_REQ_MAY_SLEEP,
184 pcrypt_aead_done, req);
185 aead_request_set_crypt(creq, req->src, req->dst,
186 req->cryptlen, req->iv);
187 aead_request_set_assoc(creq, req->assoc, req->assoclen);
188
189 err = pcrypt_do_parallel(padata, &ctx->cb_cpu, pcrypt_dec_padata);
190 if (err)
191 return err;
192 else
193 err = crypto_aead_decrypt(creq);
194
195 return err;
196}
197
198static void pcrypt_aead_givenc(struct padata_priv *padata)
199{
200 struct pcrypt_request *preq = pcrypt_padata_request(padata);
201 struct aead_givcrypt_request *req = pcrypt_request_ctx(preq);
202
203 padata->info = crypto_aead_givencrypt(req);
204
205 if (padata->info == -EINPROGRESS)
206 return;
207
208 padata_do_serial(padata);
209}
210
211static int pcrypt_aead_givencrypt(struct aead_givcrypt_request *req)
212{
213 int err;
214 struct aead_request *areq = &req->areq;
215 struct pcrypt_request *preq = aead_request_ctx(areq);
216 struct aead_givcrypt_request *creq = pcrypt_request_ctx(preq);
217 struct padata_priv *padata = pcrypt_request_padata(preq);
218 struct crypto_aead *aead = aead_givcrypt_reqtfm(req);
219 struct pcrypt_aead_ctx *ctx = crypto_aead_ctx(aead);
220 u32 flags = aead_request_flags(areq);
221
222 memset(padata, 0, sizeof(struct padata_priv));
223
224 padata->parallel = pcrypt_aead_givenc;
225 padata->serial = pcrypt_aead_giv_serial;
226
227 aead_givcrypt_set_tfm(creq, ctx->child);
228 aead_givcrypt_set_callback(creq, flags & ~CRYPTO_TFM_REQ_MAY_SLEEP,
229 pcrypt_aead_done, areq);
230 aead_givcrypt_set_crypt(creq, areq->src, areq->dst,
231 areq->cryptlen, areq->iv);
232 aead_givcrypt_set_assoc(creq, areq->assoc, areq->assoclen);
233 aead_givcrypt_set_giv(creq, req->giv, req->seq);
234
235 err = pcrypt_do_parallel(padata, &ctx->cb_cpu, pcrypt_enc_padata);
236 if (err)
237 return err;
238 else
239 err = crypto_aead_givencrypt(creq);
240
241 return err;
242}
243
244static int pcrypt_aead_init_tfm(struct crypto_tfm *tfm)
245{
246 int cpu, cpu_index;
247 struct crypto_instance *inst = crypto_tfm_alg_instance(tfm);
248 struct pcrypt_instance_ctx *ictx = crypto_instance_ctx(inst);
249 struct pcrypt_aead_ctx *ctx = crypto_tfm_ctx(tfm);
250 struct crypto_aead *cipher;
251
252 ictx->tfm_count++;
253
254 cpu_index = ictx->tfm_count % cpumask_weight(cpu_active_mask);
255
256 ctx->cb_cpu = cpumask_first(cpu_active_mask);
257 for (cpu = 0; cpu < cpu_index; cpu++)
258 ctx->cb_cpu = cpumask_next(ctx->cb_cpu, cpu_active_mask);
259
260 cipher = crypto_spawn_aead(crypto_instance_ctx(inst));
261
262 if (IS_ERR(cipher))
263 return PTR_ERR(cipher);
264
265 ctx->child = cipher;
266 tfm->crt_aead.reqsize = sizeof(struct pcrypt_request)
267 + sizeof(struct aead_givcrypt_request)
268 + crypto_aead_reqsize(cipher);
269
270 return 0;
271}
272
273static void pcrypt_aead_exit_tfm(struct crypto_tfm *tfm)
274{
275 struct pcrypt_aead_ctx *ctx = crypto_tfm_ctx(tfm);
276
277 crypto_free_aead(ctx->child);
278}
279
280static struct crypto_instance *pcrypt_alloc_instance(struct crypto_alg *alg)
281{
282 struct crypto_instance *inst;
283 struct pcrypt_instance_ctx *ctx;
284 int err;
285
286 inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL);
287 if (!inst) {
288 inst = ERR_PTR(-ENOMEM);
289 goto out;
290 }
291
292 err = -ENAMETOOLONG;
293 if (snprintf(inst->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME,
294 "pcrypt(%s)", alg->cra_driver_name) >= CRYPTO_MAX_ALG_NAME)
295 goto out_free_inst;
296
297 memcpy(inst->alg.cra_name, alg->cra_name, CRYPTO_MAX_ALG_NAME);
298
299 ctx = crypto_instance_ctx(inst);
300 err = crypto_init_spawn(&ctx->spawn, alg, inst,
301 CRYPTO_ALG_TYPE_MASK);
302 if (err)
303 goto out_free_inst;
304
305 inst->alg.cra_priority = alg->cra_priority + 100;
306 inst->alg.cra_blocksize = alg->cra_blocksize;
307 inst->alg.cra_alignmask = alg->cra_alignmask;
308
309out:
310 return inst;
311
312out_free_inst:
313 kfree(inst);
314 inst = ERR_PTR(err);
315 goto out;
316}
317
318static struct crypto_instance *pcrypt_alloc_aead(struct rtattr **tb)
319{
320 struct crypto_instance *inst;
321 struct crypto_alg *alg;
322 struct crypto_attr_type *algt;
323
324 algt = crypto_get_attr_type(tb);
325
326 alg = crypto_get_attr_alg(tb, algt->type,
327 (algt->mask & CRYPTO_ALG_TYPE_MASK));
328 if (IS_ERR(alg))
329 return ERR_CAST(alg);
330
331 inst = pcrypt_alloc_instance(alg);
332 if (IS_ERR(inst))
333 goto out_put_alg;
334
335 inst->alg.cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC;
336 inst->alg.cra_type = &crypto_aead_type;
337
338 inst->alg.cra_aead.ivsize = alg->cra_aead.ivsize;
339 inst->alg.cra_aead.geniv = alg->cra_aead.geniv;
340 inst->alg.cra_aead.maxauthsize = alg->cra_aead.maxauthsize;
341
342 inst->alg.cra_ctxsize = sizeof(struct pcrypt_aead_ctx);
343
344 inst->alg.cra_init = pcrypt_aead_init_tfm;
345 inst->alg.cra_exit = pcrypt_aead_exit_tfm;
346
347 inst->alg.cra_aead.setkey = pcrypt_aead_setkey;
348 inst->alg.cra_aead.setauthsize = pcrypt_aead_setauthsize;
349 inst->alg.cra_aead.encrypt = pcrypt_aead_encrypt;
350 inst->alg.cra_aead.decrypt = pcrypt_aead_decrypt;
351 inst->alg.cra_aead.givencrypt = pcrypt_aead_givencrypt;
352
353out_put_alg:
354 crypto_mod_put(alg);
355 return inst;
356}
357
358static struct crypto_instance *pcrypt_alloc(struct rtattr **tb)
359{
360 struct crypto_attr_type *algt;
361
362 algt = crypto_get_attr_type(tb);
363 if (IS_ERR(algt))
364 return ERR_CAST(algt);
365
366 switch (algt->type & algt->mask & CRYPTO_ALG_TYPE_MASK) {
367 case CRYPTO_ALG_TYPE_AEAD:
368 return pcrypt_alloc_aead(tb);
369 }
370
371 return ERR_PTR(-EINVAL);
372}
373
374static void pcrypt_free(struct crypto_instance *inst)
375{
376 struct pcrypt_instance_ctx *ctx = crypto_instance_ctx(inst);
377
378 crypto_drop_spawn(&ctx->spawn);
379 kfree(inst);
380}
381
382static struct crypto_template pcrypt_tmpl = {
383 .name = "pcrypt",
384 .alloc = pcrypt_alloc,
385 .free = pcrypt_free,
386 .module = THIS_MODULE,
387};
388
389static int __init pcrypt_init(void)
390{
391 encwq = create_workqueue("pencrypt");
392 if (!encwq)
393 goto err;
394
395 decwq = create_workqueue("pdecrypt");
396 if (!decwq)
397 goto err_destroy_encwq;
398
399
400 pcrypt_enc_padata = padata_alloc(cpu_possible_mask, encwq);
401 if (!pcrypt_enc_padata)
402 goto err_destroy_decwq;
403
404 pcrypt_dec_padata = padata_alloc(cpu_possible_mask, decwq);
405 if (!pcrypt_dec_padata)
406 goto err_free_padata;
407
408 padata_start(pcrypt_enc_padata);
409 padata_start(pcrypt_dec_padata);
410
411 return crypto_register_template(&pcrypt_tmpl);
412
413err_free_padata:
414 padata_free(pcrypt_enc_padata);
415
416err_destroy_decwq:
417 destroy_workqueue(decwq);
418
419err_destroy_encwq:
420 destroy_workqueue(encwq);
421
422err:
423 return -ENOMEM;
424}
425
426static void __exit pcrypt_exit(void)
427{
428 padata_stop(pcrypt_enc_padata);
429 padata_stop(pcrypt_dec_padata);
430
431 destroy_workqueue(encwq);
432 destroy_workqueue(decwq);
433
434 padata_free(pcrypt_enc_padata);
435 padata_free(pcrypt_dec_padata);
436
437 crypto_unregister_template(&pcrypt_tmpl);
438}
439
440module_init(pcrypt_init);
441module_exit(pcrypt_exit);
442
443MODULE_LICENSE("GPL");
444MODULE_AUTHOR("Steffen Klassert <steffen.klassert@secunet.com>");
445MODULE_DESCRIPTION("Parallel crypto wrapper");
diff --git a/crypto/testmgr.c b/crypto/testmgr.c
index 7620bfce92f2..c494d7610be1 100644
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -1477,9 +1477,54 @@ static int alg_test_cprng(const struct alg_test_desc *desc, const char *driver,
1477 return err; 1477 return err;
1478} 1478}
1479 1479
1480static int alg_test_null(const struct alg_test_desc *desc,
1481 const char *driver, u32 type, u32 mask)
1482{
1483 return 0;
1484}
1485
1480/* Please keep this list sorted by algorithm name. */ 1486/* Please keep this list sorted by algorithm name. */
1481static const struct alg_test_desc alg_test_descs[] = { 1487static const struct alg_test_desc alg_test_descs[] = {
1482 { 1488 {
1489 .alg = "__driver-cbc-aes-aesni",
1490 .test = alg_test_null,
1491 .suite = {
1492 .cipher = {
1493 .enc = {
1494 .vecs = NULL,
1495 .count = 0
1496 },
1497 .dec = {
1498 .vecs = NULL,
1499 .count = 0
1500 }
1501 }
1502 }
1503 }, {
1504 .alg = "__driver-ecb-aes-aesni",
1505 .test = alg_test_null,
1506 .suite = {
1507 .cipher = {
1508 .enc = {
1509 .vecs = NULL,
1510 .count = 0
1511 },
1512 .dec = {
1513 .vecs = NULL,
1514 .count = 0
1515 }
1516 }
1517 }
1518 }, {
1519 .alg = "__ghash-pclmulqdqni",
1520 .test = alg_test_null,
1521 .suite = {
1522 .hash = {
1523 .vecs = NULL,
1524 .count = 0
1525 }
1526 }
1527 }, {
1483 .alg = "ansi_cprng", 1528 .alg = "ansi_cprng",
1484 .test = alg_test_cprng, 1529 .test = alg_test_cprng,
1485 .fips_allowed = 1, 1530 .fips_allowed = 1,
@@ -1623,6 +1668,30 @@ static const struct alg_test_desc alg_test_descs[] = {
1623 } 1668 }
1624 } 1669 }
1625 }, { 1670 }, {
1671 .alg = "cryptd(__driver-ecb-aes-aesni)",
1672 .test = alg_test_null,
1673 .suite = {
1674 .cipher = {
1675 .enc = {
1676 .vecs = NULL,
1677 .count = 0
1678 },
1679 .dec = {
1680 .vecs = NULL,
1681 .count = 0
1682 }
1683 }
1684 }
1685 }, {
1686 .alg = "cryptd(__ghash-pclmulqdqni)",
1687 .test = alg_test_null,
1688 .suite = {
1689 .hash = {
1690 .vecs = NULL,
1691 .count = 0
1692 }
1693 }
1694 }, {
1626 .alg = "ctr(aes)", 1695 .alg = "ctr(aes)",
1627 .test = alg_test_skcipher, 1696 .test = alg_test_skcipher,
1628 .fips_allowed = 1, 1697 .fips_allowed = 1,
@@ -1669,6 +1738,21 @@ static const struct alg_test_desc alg_test_descs[] = {
1669 } 1738 }
1670 } 1739 }
1671 }, { 1740 }, {
1741 .alg = "ecb(__aes-aesni)",
1742 .test = alg_test_null,
1743 .suite = {
1744 .cipher = {
1745 .enc = {
1746 .vecs = NULL,
1747 .count = 0
1748 },
1749 .dec = {
1750 .vecs = NULL,
1751 .count = 0
1752 }
1753 }
1754 }
1755 }, {
1672 .alg = "ecb(aes)", 1756 .alg = "ecb(aes)",
1673 .test = alg_test_skcipher, 1757 .test = alg_test_skcipher,
1674 .fips_allowed = 1, 1758 .fips_allowed = 1,
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 87060266ef91..6ea1014697d1 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -186,3 +186,15 @@ config HW_RANDOM_MXC_RNGA
186 module will be called mxc-rnga. 186 module will be called mxc-rnga.
187 187
188 If unsure, say Y. 188 If unsure, say Y.
189
190config HW_RANDOM_NOMADIK
191 tristate "ST-Ericsson Nomadik Random Number Generator support"
192 depends on HW_RANDOM && PLAT_NOMADIK
193 ---help---
194 This driver provides kernel-side support for the Random Number
195 Generator hardware found on ST-Ericsson SoCs (8815 and 8500).
196
197 To compile this driver as a module, choose M here: the
198 module will be called nomadik-rng.
199
200 If unsure, say Y.
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index 5eeb1303f0d0..4273308aa1e3 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -18,3 +18,4 @@ obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o
18obj-$(CONFIG_HW_RANDOM_TX4939) += tx4939-rng.o 18obj-$(CONFIG_HW_RANDOM_TX4939) += tx4939-rng.o
19obj-$(CONFIG_HW_RANDOM_MXC_RNGA) += mxc-rnga.o 19obj-$(CONFIG_HW_RANDOM_MXC_RNGA) += mxc-rnga.o
20obj-$(CONFIG_HW_RANDOM_OCTEON) += octeon-rng.o 20obj-$(CONFIG_HW_RANDOM_OCTEON) += octeon-rng.o
21obj-$(CONFIG_HW_RANDOM_NOMADIK) += nomadik-rng.o
diff --git a/drivers/char/hw_random/nomadik-rng.c b/drivers/char/hw_random/nomadik-rng.c
new file mode 100644
index 000000000000..a8b4c4010144
--- /dev/null
+++ b/drivers/char/hw_random/nomadik-rng.c
@@ -0,0 +1,103 @@
1/*
2 * Nomadik RNG support
3 * Copyright 2009 Alessandro Rubini
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/device.h>
15#include <linux/amba/bus.h>
16#include <linux/hw_random.h>
17#include <linux/io.h>
18
19static int nmk_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
20{
21 void __iomem *base = (void __iomem *)rng->priv;
22
23 /*
24 * The register is 32 bits and gives 16 random bits (low half).
25 * A subsequent read will delay the core for 400ns, so we just read
26 * once and accept the very unlikely very small delay, even if wait==0.
27 */
28 *(u16 *)data = __raw_readl(base + 8) & 0xffff;
29 return 2;
30}
31
32/* we have at most one RNG per machine, granted */
33static struct hwrng nmk_rng = {
34 .name = "nomadik",
35 .read = nmk_rng_read,
36};
37
38static int nmk_rng_probe(struct amba_device *dev, struct amba_id *id)
39{
40 void __iomem *base;
41 int ret;
42
43 ret = amba_request_regions(dev, dev->dev.init_name);
44 if (ret)
45 return ret;
46 ret = -ENOMEM;
47 base = ioremap(dev->res.start, resource_size(&dev->res));
48 if (!base)
49 goto out_release;
50 nmk_rng.priv = (unsigned long)base;
51 ret = hwrng_register(&nmk_rng);
52 if (ret)
53 goto out_unmap;
54 return 0;
55
56out_unmap:
57 iounmap(base);
58out_release:
59 amba_release_regions(dev);
60 return ret;
61}
62
63static int nmk_rng_remove(struct amba_device *dev)
64{
65 void __iomem *base = (void __iomem *)nmk_rng.priv;
66 hwrng_unregister(&nmk_rng);
67 iounmap(base);
68 amba_release_regions(dev);
69 return 0;
70}
71
72static struct amba_id nmk_rng_ids[] = {
73 {
74 .id = 0x000805e1,
75 .mask = 0x000fffff, /* top bits are rev and cfg: accept all */
76 },
77 {0, 0},
78};
79
80static struct amba_driver nmk_rng_driver = {
81 .drv = {
82 .owner = THIS_MODULE,
83 .name = "rng",
84 },
85 .probe = nmk_rng_probe,
86 .remove = nmk_rng_remove,
87 .id_table = nmk_rng_ids,
88};
89
90static int __init nmk_rng_init(void)
91{
92 return amba_driver_register(&nmk_rng_driver);
93}
94
95static void __devexit nmk_rng_exit(void)
96{
97 amba_driver_unregister(&nmk_rng_driver);
98}
99
100module_init(nmk_rng_init);
101module_exit(nmk_rng_exit);
102
103MODULE_LICENSE("GPL");
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index 6b3e0c2f33e2..6fe4f7701188 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -603,18 +603,13 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
603 p->irqaction.handler = sh_cmt_interrupt; 603 p->irqaction.handler = sh_cmt_interrupt;
604 p->irqaction.dev_id = p; 604 p->irqaction.dev_id = p;
605 p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; 605 p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL;
606 ret = setup_irq(irq, &p->irqaction);
607 if (ret) {
608 pr_err("sh_cmt: failed to request irq %d\n", irq);
609 goto err1;
610 }
611 606
612 /* get hold of clock */ 607 /* get hold of clock */
613 p->clk = clk_get(&p->pdev->dev, cfg->clk); 608 p->clk = clk_get(&p->pdev->dev, cfg->clk);
614 if (IS_ERR(p->clk)) { 609 if (IS_ERR(p->clk)) {
615 pr_err("sh_cmt: cannot get clock \"%s\"\n", cfg->clk); 610 pr_err("sh_cmt: cannot get clock \"%s\"\n", cfg->clk);
616 ret = PTR_ERR(p->clk); 611 ret = PTR_ERR(p->clk);
617 goto err2; 612 goto err1;
618 } 613 }
619 614
620 if (resource_size(res) == 6) { 615 if (resource_size(res) == 6) {
@@ -627,14 +622,25 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
627 p->clear_bits = ~0xc000; 622 p->clear_bits = ~0xc000;
628 } 623 }
629 624
630 return sh_cmt_register(p, cfg->name, 625 ret = sh_cmt_register(p, cfg->name,
631 cfg->clockevent_rating, 626 cfg->clockevent_rating,
632 cfg->clocksource_rating); 627 cfg->clocksource_rating);
633 err2: 628 if (ret) {
634 remove_irq(irq, &p->irqaction); 629 pr_err("sh_cmt: registration failed\n");
635 err1: 630 goto err1;
631 }
632
633 ret = setup_irq(irq, &p->irqaction);
634 if (ret) {
635 pr_err("sh_cmt: failed to request irq %d\n", irq);
636 goto err1;
637 }
638
639 return 0;
640
641err1:
636 iounmap(p->mapbase); 642 iounmap(p->mapbase);
637 err0: 643err0:
638 return ret; 644 return ret;
639} 645}
640 646
diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
index 973e714d6051..4c8a759e60cd 100644
--- a/drivers/clocksource/sh_mtu2.c
+++ b/drivers/clocksource/sh_mtu2.c
@@ -221,15 +221,15 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_priv *p,
221 ced->cpumask = cpumask_of(0); 221 ced->cpumask = cpumask_of(0);
222 ced->set_mode = sh_mtu2_clock_event_mode; 222 ced->set_mode = sh_mtu2_clock_event_mode;
223 223
224 pr_info("sh_mtu2: %s used for clock events\n", ced->name);
225 clockevents_register_device(ced);
226
224 ret = setup_irq(p->irqaction.irq, &p->irqaction); 227 ret = setup_irq(p->irqaction.irq, &p->irqaction);
225 if (ret) { 228 if (ret) {
226 pr_err("sh_mtu2: failed to request irq %d\n", 229 pr_err("sh_mtu2: failed to request irq %d\n",
227 p->irqaction.irq); 230 p->irqaction.irq);
228 return; 231 return;
229 } 232 }
230
231 pr_info("sh_mtu2: %s used for clock events\n", ced->name);
232 clockevents_register_device(ced);
233} 233}
234 234
235static int sh_mtu2_register(struct sh_mtu2_priv *p, char *name, 235static int sh_mtu2_register(struct sh_mtu2_priv *p, char *name,
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index 93c2322feab7..961f5b5ef6a3 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -323,15 +323,15 @@ static void sh_tmu_register_clockevent(struct sh_tmu_priv *p,
323 ced->set_next_event = sh_tmu_clock_event_next; 323 ced->set_next_event = sh_tmu_clock_event_next;
324 ced->set_mode = sh_tmu_clock_event_mode; 324 ced->set_mode = sh_tmu_clock_event_mode;
325 325
326 pr_info("sh_tmu: %s used for clock events\n", ced->name);
327 clockevents_register_device(ced);
328
326 ret = setup_irq(p->irqaction.irq, &p->irqaction); 329 ret = setup_irq(p->irqaction.irq, &p->irqaction);
327 if (ret) { 330 if (ret) {
328 pr_err("sh_tmu: failed to request irq %d\n", 331 pr_err("sh_tmu: failed to request irq %d\n",
329 p->irqaction.irq); 332 p->irqaction.irq);
330 return; 333 return;
331 } 334 }
332
333 pr_info("sh_tmu: %s used for clock events\n", ced->name);
334 clockevents_register_device(ced);
335} 335}
336 336
337static int sh_tmu_register(struct sh_tmu_priv *p, char *name, 337static int sh_tmu_register(struct sh_tmu_priv *p, char *name,
diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c
index 46e899ac924e..1c3849f6b7a2 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -1274,7 +1274,7 @@ static int __exit crypto4xx_remove(struct of_device *ofdev)
1274 return 0; 1274 return 0;
1275} 1275}
1276 1276
1277static struct of_device_id crypto4xx_match[] = { 1277static const struct of_device_id crypto4xx_match[] = {
1278 { .compatible = "amcc,ppc4xx-crypto",}, 1278 { .compatible = "amcc,ppc4xx-crypto",},
1279 { }, 1279 { },
1280}; 1280};
diff --git a/drivers/crypto/geode-aes.c b/drivers/crypto/geode-aes.c
index 4801162919d9..c7a5a43ba691 100644
--- a/drivers/crypto/geode-aes.c
+++ b/drivers/crypto/geode-aes.c
@@ -135,13 +135,13 @@ static int geode_setkey_cip(struct crypto_tfm *tfm, const u8 *key,
135 /* 135 /*
136 * The requested key size is not supported by HW, do a fallback 136 * The requested key size is not supported by HW, do a fallback
137 */ 137 */
138 op->fallback.blk->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK; 138 op->fallback.cip->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
139 op->fallback.blk->base.crt_flags |= (tfm->crt_flags & CRYPTO_TFM_REQ_MASK); 139 op->fallback.cip->base.crt_flags |= (tfm->crt_flags & CRYPTO_TFM_REQ_MASK);
140 140
141 ret = crypto_cipher_setkey(op->fallback.cip, key, len); 141 ret = crypto_cipher_setkey(op->fallback.cip, key, len);
142 if (ret) { 142 if (ret) {
143 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK; 143 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
144 tfm->crt_flags |= (op->fallback.blk->base.crt_flags & CRYPTO_TFM_RES_MASK); 144 tfm->crt_flags |= (op->fallback.cip->base.crt_flags & CRYPTO_TFM_RES_MASK);
145 } 145 }
146 return ret; 146 return ret;
147} 147}
@@ -263,7 +263,7 @@ static int fallback_init_cip(struct crypto_tfm *tfm)
263 263
264 if (IS_ERR(op->fallback.cip)) { 264 if (IS_ERR(op->fallback.cip)) {
265 printk(KERN_ERR "Error allocating fallback algo %s\n", name); 265 printk(KERN_ERR "Error allocating fallback algo %s\n", name);
266 return PTR_ERR(op->fallback.blk); 266 return PTR_ERR(op->fallback.cip);
267 } 267 }
268 268
269 return 0; 269 return 0;
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index c47ffe8a73ef..fd529d68c5ba 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -1958,7 +1958,7 @@ err_out:
1958 return err; 1958 return err;
1959} 1959}
1960 1960
1961static struct of_device_id talitos_match[] = { 1961static const struct of_device_id talitos_match[] = {
1962 { 1962 {
1963 .compatible = "fsl,sec2.0", 1963 .compatible = "fsl,sec2.0",
1964 }, 1964 },
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index d10cc899c460..b75ce8b84c46 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -48,23 +48,20 @@ enum sh_dmae_desc_status {
48 */ 48 */
49#define RS_DEFAULT (RS_DUAL) 49#define RS_DEFAULT (RS_DUAL)
50 50
51/* A bitmask with bits enough for enum sh_dmae_slave_chan_id */
52static unsigned long sh_dmae_slave_used[BITS_TO_LONGS(SHDMA_SLAVE_NUMBER)];
53
51static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all); 54static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all);
52 55
53#define SH_DMAC_CHAN_BASE(id) (dma_base_addr[id]) 56#define SH_DMAC_CHAN_BASE(id) (dma_base_addr[id])
54static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg) 57static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg)
55{ 58{
56 ctrl_outl(data, (SH_DMAC_CHAN_BASE(sh_dc->id) + reg)); 59 ctrl_outl(data, SH_DMAC_CHAN_BASE(sh_dc->id) + reg);
57} 60}
58 61
59static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg) 62static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg)
60{ 63{
61 return ctrl_inl((SH_DMAC_CHAN_BASE(sh_dc->id) + reg)); 64 return ctrl_inl(SH_DMAC_CHAN_BASE(sh_dc->id) + reg);
62}
63
64static void dmae_init(struct sh_dmae_chan *sh_chan)
65{
66 u32 chcr = RS_DEFAULT; /* default is DUAL mode */
67 sh_dmae_writel(sh_chan, chcr, CHCR);
68} 65}
69 66
70/* 67/*
@@ -95,27 +92,30 @@ static int sh_dmae_rst(int id)
95 return 0; 92 return 0;
96} 93}
97 94
98static int dmae_is_busy(struct sh_dmae_chan *sh_chan) 95static bool dmae_is_busy(struct sh_dmae_chan *sh_chan)
99{ 96{
100 u32 chcr = sh_dmae_readl(sh_chan, CHCR); 97 u32 chcr = sh_dmae_readl(sh_chan, CHCR);
101 if (chcr & CHCR_DE) { 98
102 if (!(chcr & CHCR_TE)) 99 if ((chcr & (CHCR_DE | CHCR_TE)) == CHCR_DE)
103 return -EBUSY; /* working */ 100 return true; /* working */
104 } 101
105 return 0; /* waiting */ 102 return false; /* waiting */
106} 103}
107 104
108static inline unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan) 105static unsigned int ts_shift[] = TS_SHIFT;
106static inline unsigned int calc_xmit_shift(u32 chcr)
109{ 107{
110 u32 chcr = sh_dmae_readl(sh_chan, CHCR); 108 int cnt = ((chcr & CHCR_TS_LOW_MASK) >> CHCR_TS_LOW_SHIFT) |
111 return ts_shift[(chcr & CHCR_TS_MASK) >> CHCR_TS_SHIFT]; 109 ((chcr & CHCR_TS_HIGH_MASK) >> CHCR_TS_HIGH_SHIFT);
110
111 return ts_shift[cnt];
112} 112}
113 113
114static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw) 114static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw)
115{ 115{
116 sh_dmae_writel(sh_chan, hw->sar, SAR); 116 sh_dmae_writel(sh_chan, hw->sar, SAR);
117 sh_dmae_writel(sh_chan, hw->dar, DAR); 117 sh_dmae_writel(sh_chan, hw->dar, DAR);
118 sh_dmae_writel(sh_chan, hw->tcr >> calc_xmit_shift(sh_chan), TCR); 118 sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR);
119} 119}
120 120
121static void dmae_start(struct sh_dmae_chan *sh_chan) 121static void dmae_start(struct sh_dmae_chan *sh_chan)
@@ -123,7 +123,7 @@ static void dmae_start(struct sh_dmae_chan *sh_chan)
123 u32 chcr = sh_dmae_readl(sh_chan, CHCR); 123 u32 chcr = sh_dmae_readl(sh_chan, CHCR);
124 124
125 chcr |= CHCR_DE | CHCR_IE; 125 chcr |= CHCR_DE | CHCR_IE;
126 sh_dmae_writel(sh_chan, chcr, CHCR); 126 sh_dmae_writel(sh_chan, chcr & ~CHCR_TE, CHCR);
127} 127}
128 128
129static void dmae_halt(struct sh_dmae_chan *sh_chan) 129static void dmae_halt(struct sh_dmae_chan *sh_chan)
@@ -134,55 +134,50 @@ static void dmae_halt(struct sh_dmae_chan *sh_chan)
134 sh_dmae_writel(sh_chan, chcr, CHCR); 134 sh_dmae_writel(sh_chan, chcr, CHCR);
135} 135}
136 136
137static void dmae_init(struct sh_dmae_chan *sh_chan)
138{
139 u32 chcr = RS_DEFAULT; /* default is DUAL mode */
140 sh_chan->xmit_shift = calc_xmit_shift(chcr);
141 sh_dmae_writel(sh_chan, chcr, CHCR);
142}
143
137static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val) 144static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val)
138{ 145{
139 int ret = dmae_is_busy(sh_chan);
140 /* When DMA was working, can not set data to CHCR */ 146 /* When DMA was working, can not set data to CHCR */
141 if (ret) 147 if (dmae_is_busy(sh_chan))
142 return ret; 148 return -EBUSY;
143 149
150 sh_chan->xmit_shift = calc_xmit_shift(val);
144 sh_dmae_writel(sh_chan, val, CHCR); 151 sh_dmae_writel(sh_chan, val, CHCR);
152
145 return 0; 153 return 0;
146} 154}
147 155
148#define DMARS1_ADDR 0x04 156#define DMARS_SHIFT 8
149#define DMARS2_ADDR 0x08 157#define DMARS_CHAN_MSK 0x01
150#define DMARS_SHIFT 8
151#define DMARS_CHAN_MSK 0x01
152static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val) 158static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
153{ 159{
154 u32 addr; 160 u32 addr;
155 int shift = 0; 161 int shift = 0;
156 int ret = dmae_is_busy(sh_chan); 162
157 if (ret) 163 if (dmae_is_busy(sh_chan))
158 return ret; 164 return -EBUSY;
159 165
160 if (sh_chan->id & DMARS_CHAN_MSK) 166 if (sh_chan->id & DMARS_CHAN_MSK)
161 shift = DMARS_SHIFT; 167 shift = DMARS_SHIFT;
162 168
163 switch (sh_chan->id) { 169 if (sh_chan->id < 6)
164 /* DMARS0 */ 170 /* DMA0RS0 - DMA0RS2 */
165 case 0: 171 addr = SH_DMARS_BASE0 + (sh_chan->id / 2) * 4;
166 case 1: 172#ifdef SH_DMARS_BASE1
167 addr = SH_DMARS_BASE; 173 else if (sh_chan->id < 12)
168 break; 174 /* DMA1RS0 - DMA1RS2 */
169 /* DMARS1 */ 175 addr = SH_DMARS_BASE1 + ((sh_chan->id - 6) / 2) * 4;
170 case 2: 176#endif
171 case 3: 177 else
172 addr = (SH_DMARS_BASE + DMARS1_ADDR);
173 break;
174 /* DMARS2 */
175 case 4:
176 case 5:
177 addr = (SH_DMARS_BASE + DMARS2_ADDR);
178 break;
179 default:
180 return -EINVAL; 178 return -EINVAL;
181 }
182 179
183 ctrl_outw((val << shift) | 180 ctrl_outw((val << shift) | (ctrl_inw(addr) & (0xFF00 >> shift)), addr);
184 (ctrl_inw(addr) & (shift ? 0xFF00 : 0x00FF)),
185 addr);
186 181
187 return 0; 182 return 0;
188} 183}
@@ -250,10 +245,53 @@ static struct sh_desc *sh_dmae_get_desc(struct sh_dmae_chan *sh_chan)
250 return NULL; 245 return NULL;
251} 246}
252 247
248static struct sh_dmae_slave_config *sh_dmae_find_slave(
249 struct sh_dmae_chan *sh_chan, enum sh_dmae_slave_chan_id slave_id)
250{
251 struct dma_device *dma_dev = sh_chan->common.device;
252 struct sh_dmae_device *shdev = container_of(dma_dev,
253 struct sh_dmae_device, common);
254 struct sh_dmae_pdata *pdata = &shdev->pdata;
255 int i;
256
257 if ((unsigned)slave_id >= SHDMA_SLAVE_NUMBER)
258 return NULL;
259
260 for (i = 0; i < pdata->config_num; i++)
261 if (pdata->config[i].slave_id == slave_id)
262 return pdata->config + i;
263
264 return NULL;
265}
266
253static int sh_dmae_alloc_chan_resources(struct dma_chan *chan) 267static int sh_dmae_alloc_chan_resources(struct dma_chan *chan)
254{ 268{
255 struct sh_dmae_chan *sh_chan = to_sh_chan(chan); 269 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
256 struct sh_desc *desc; 270 struct sh_desc *desc;
271 struct sh_dmae_slave *param = chan->private;
272
273 /*
274 * This relies on the guarantee from dmaengine that alloc_chan_resources
275 * never runs concurrently with itself or free_chan_resources.
276 */
277 if (param) {
278 struct sh_dmae_slave_config *cfg;
279
280 cfg = sh_dmae_find_slave(sh_chan, param->slave_id);
281 if (!cfg)
282 return -EINVAL;
283
284 if (test_and_set_bit(param->slave_id, sh_dmae_slave_used))
285 return -EBUSY;
286
287 param->config = cfg;
288
289 dmae_set_dmars(sh_chan, cfg->mid_rid);
290 dmae_set_chcr(sh_chan, cfg->chcr);
291 } else {
292 if ((sh_dmae_readl(sh_chan, CHCR) & 0x700) != 0x400)
293 dmae_set_chcr(sh_chan, RS_DEFAULT);
294 }
257 295
258 spin_lock_bh(&sh_chan->desc_lock); 296 spin_lock_bh(&sh_chan->desc_lock);
259 while (sh_chan->descs_allocated < NR_DESCS_PER_CHANNEL) { 297 while (sh_chan->descs_allocated < NR_DESCS_PER_CHANNEL) {
@@ -286,10 +324,18 @@ static void sh_dmae_free_chan_resources(struct dma_chan *chan)
286 struct sh_desc *desc, *_desc; 324 struct sh_desc *desc, *_desc;
287 LIST_HEAD(list); 325 LIST_HEAD(list);
288 326
327 dmae_halt(sh_chan);
328
289 /* Prepared and not submitted descriptors can still be on the queue */ 329 /* Prepared and not submitted descriptors can still be on the queue */
290 if (!list_empty(&sh_chan->ld_queue)) 330 if (!list_empty(&sh_chan->ld_queue))
291 sh_dmae_chan_ld_cleanup(sh_chan, true); 331 sh_dmae_chan_ld_cleanup(sh_chan, true);
292 332
333 if (chan->private) {
334 /* The caller is holding dma_list_mutex */
335 struct sh_dmae_slave *param = chan->private;
336 clear_bit(param->slave_id, sh_dmae_slave_used);
337 }
338
293 spin_lock_bh(&sh_chan->desc_lock); 339 spin_lock_bh(&sh_chan->desc_lock);
294 340
295 list_splice_init(&sh_chan->ld_free, &list); 341 list_splice_init(&sh_chan->ld_free, &list);
@@ -301,23 +347,97 @@ static void sh_dmae_free_chan_resources(struct dma_chan *chan)
301 kfree(desc); 347 kfree(desc);
302} 348}
303 349
304static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy( 350/**
305 struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src, 351 * sh_dmae_add_desc - get, set up and return one transfer descriptor
306 size_t len, unsigned long flags) 352 * @sh_chan: DMA channel
353 * @flags: DMA transfer flags
354 * @dest: destination DMA address, incremented when direction equals
355 * DMA_FROM_DEVICE or DMA_BIDIRECTIONAL
356 * @src: source DMA address, incremented when direction equals
357 * DMA_TO_DEVICE or DMA_BIDIRECTIONAL
358 * @len: DMA transfer length
359 * @first: if NULL, set to the current descriptor and cookie set to -EBUSY
360 * @direction: needed for slave DMA to decide which address to keep constant,
361 * equals DMA_BIDIRECTIONAL for MEMCPY
362 * Returns 0 or an error
363 * Locks: called with desc_lock held
364 */
365static struct sh_desc *sh_dmae_add_desc(struct sh_dmae_chan *sh_chan,
366 unsigned long flags, dma_addr_t *dest, dma_addr_t *src, size_t *len,
367 struct sh_desc **first, enum dma_data_direction direction)
307{ 368{
308 struct sh_dmae_chan *sh_chan; 369 struct sh_desc *new;
309 struct sh_desc *first = NULL, *prev = NULL, *new;
310 size_t copy_size; 370 size_t copy_size;
311 LIST_HEAD(tx_list);
312 int chunks = (len + SH_DMA_TCR_MAX) / (SH_DMA_TCR_MAX + 1);
313 371
314 if (!chan) 372 if (!*len)
315 return NULL; 373 return NULL;
316 374
317 if (!len) 375 /* Allocate the link descriptor from the free list */
376 new = sh_dmae_get_desc(sh_chan);
377 if (!new) {
378 dev_err(sh_chan->dev, "No free link descriptor available\n");
318 return NULL; 379 return NULL;
380 }
319 381
320 sh_chan = to_sh_chan(chan); 382 copy_size = min(*len, (size_t)SH_DMA_TCR_MAX + 1);
383
384 new->hw.sar = *src;
385 new->hw.dar = *dest;
386 new->hw.tcr = copy_size;
387
388 if (!*first) {
389 /* First desc */
390 new->async_tx.cookie = -EBUSY;
391 *first = new;
392 } else {
393 /* Other desc - invisible to the user */
394 new->async_tx.cookie = -EINVAL;
395 }
396
397 dev_dbg(sh_chan->dev,
398 "chaining (%u/%u)@%x -> %x with %p, cookie %d, shift %d\n",
399 copy_size, *len, *src, *dest, &new->async_tx,
400 new->async_tx.cookie, sh_chan->xmit_shift);
401
402 new->mark = DESC_PREPARED;
403 new->async_tx.flags = flags;
404 new->direction = direction;
405
406 *len -= copy_size;
407 if (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE)
408 *src += copy_size;
409 if (direction == DMA_BIDIRECTIONAL || direction == DMA_FROM_DEVICE)
410 *dest += copy_size;
411
412 return new;
413}
414
415/*
416 * sh_dmae_prep_sg - prepare transfer descriptors from an SG list
417 *
418 * Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also
419 * converted to scatter-gather to guarantee consistent locking and a correct
420 * list manipulation. For slave DMA direction carries the usual meaning, and,
421 * logically, the SG list is RAM and the addr variable contains slave address,
422 * e.g., the FIFO I/O register. For MEMCPY direction equals DMA_BIDIRECTIONAL
423 * and the SG list contains only one element and points at the source buffer.
424 */
425static struct dma_async_tx_descriptor *sh_dmae_prep_sg(struct sh_dmae_chan *sh_chan,
426 struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
427 enum dma_data_direction direction, unsigned long flags)
428{
429 struct scatterlist *sg;
430 struct sh_desc *first = NULL, *new = NULL /* compiler... */;
431 LIST_HEAD(tx_list);
432 int chunks = 0;
433 int i;
434
435 if (!sg_len)
436 return NULL;
437
438 for_each_sg(sgl, sg, sg_len, i)
439 chunks += (sg_dma_len(sg) + SH_DMA_TCR_MAX) /
440 (SH_DMA_TCR_MAX + 1);
321 441
322 /* Have to lock the whole loop to protect against concurrent release */ 442 /* Have to lock the whole loop to protect against concurrent release */
323 spin_lock_bh(&sh_chan->desc_lock); 443 spin_lock_bh(&sh_chan->desc_lock);
@@ -333,49 +453,32 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy(
333 * only during this function, then they are immediately spliced 453 * only during this function, then they are immediately spliced
334 * back onto the free list in form of a chain 454 * back onto the free list in form of a chain
335 */ 455 */
336 do { 456 for_each_sg(sgl, sg, sg_len, i) {
337 /* Allocate the link descriptor from the free list */ 457 dma_addr_t sg_addr = sg_dma_address(sg);
338 new = sh_dmae_get_desc(sh_chan); 458 size_t len = sg_dma_len(sg);
339 if (!new) { 459
340 dev_err(sh_chan->dev, 460 if (!len)
341 "No free memory for link descriptor\n"); 461 goto err_get_desc;
342 list_for_each_entry(new, &tx_list, node) 462
343 new->mark = DESC_IDLE; 463 do {
344 list_splice(&tx_list, &sh_chan->ld_free); 464 dev_dbg(sh_chan->dev, "Add SG #%d@%p[%d], dma %llx\n",
345 spin_unlock_bh(&sh_chan->desc_lock); 465 i, sg, len, (unsigned long long)sg_addr);
346 return NULL; 466
347 } 467 if (direction == DMA_FROM_DEVICE)
348 468 new = sh_dmae_add_desc(sh_chan, flags,
349 copy_size = min(len, (size_t)SH_DMA_TCR_MAX + 1); 469 &sg_addr, addr, &len, &first,
350 470 direction);
351 new->hw.sar = dma_src; 471 else
352 new->hw.dar = dma_dest; 472 new = sh_dmae_add_desc(sh_chan, flags,
353 new->hw.tcr = copy_size; 473 addr, &sg_addr, &len, &first,
354 if (!first) { 474 direction);
355 /* First desc */ 475 if (!new)
356 new->async_tx.cookie = -EBUSY; 476 goto err_get_desc;
357 first = new; 477
358 } else { 478 new->chunks = chunks--;
359 /* Other desc - invisible to the user */ 479 list_add_tail(&new->node, &tx_list);
360 new->async_tx.cookie = -EINVAL; 480 } while (len);
361 } 481 }
362
363 dev_dbg(sh_chan->dev,
364 "chaining %u of %u with %p, dst %x, cookie %d\n",
365 copy_size, len, &new->async_tx, dma_dest,
366 new->async_tx.cookie);
367
368 new->mark = DESC_PREPARED;
369 new->async_tx.flags = flags;
370 new->chunks = chunks--;
371
372 prev = new;
373 len -= copy_size;
374 dma_src += copy_size;
375 dma_dest += copy_size;
376 /* Insert the link descriptor to the LD ring */
377 list_add_tail(&new->node, &tx_list);
378 } while (len);
379 482
380 if (new != first) 483 if (new != first)
381 new->async_tx.cookie = -ENOSPC; 484 new->async_tx.cookie = -ENOSPC;
@@ -386,6 +489,77 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy(
386 spin_unlock_bh(&sh_chan->desc_lock); 489 spin_unlock_bh(&sh_chan->desc_lock);
387 490
388 return &first->async_tx; 491 return &first->async_tx;
492
493err_get_desc:
494 list_for_each_entry(new, &tx_list, node)
495 new->mark = DESC_IDLE;
496 list_splice(&tx_list, &sh_chan->ld_free);
497
498 spin_unlock_bh(&sh_chan->desc_lock);
499
500 return NULL;
501}
502
503static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy(
504 struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
505 size_t len, unsigned long flags)
506{
507 struct sh_dmae_chan *sh_chan;
508 struct scatterlist sg;
509
510 if (!chan || !len)
511 return NULL;
512
513 chan->private = NULL;
514
515 sh_chan = to_sh_chan(chan);
516
517 sg_init_table(&sg, 1);
518 sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len,
519 offset_in_page(dma_src));
520 sg_dma_address(&sg) = dma_src;
521 sg_dma_len(&sg) = len;
522
523 return sh_dmae_prep_sg(sh_chan, &sg, 1, &dma_dest, DMA_BIDIRECTIONAL,
524 flags);
525}
526
527static struct dma_async_tx_descriptor *sh_dmae_prep_slave_sg(
528 struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
529 enum dma_data_direction direction, unsigned long flags)
530{
531 struct sh_dmae_slave *param;
532 struct sh_dmae_chan *sh_chan;
533
534 if (!chan)
535 return NULL;
536
537 sh_chan = to_sh_chan(chan);
538 param = chan->private;
539
540 /* Someone calling slave DMA on a public channel? */
541 if (!param || !sg_len) {
542 dev_warn(sh_chan->dev, "%s: bad parameter: %p, %d, %d\n",
543 __func__, param, sg_len, param ? param->slave_id : -1);
544 return NULL;
545 }
546
547 /*
548 * if (param != NULL), this is a successfully requested slave channel,
549 * therefore param->config != NULL too.
550 */
551 return sh_dmae_prep_sg(sh_chan, sgl, sg_len, &param->config->addr,
552 direction, flags);
553}
554
555static void sh_dmae_terminate_all(struct dma_chan *chan)
556{
557 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
558
559 if (!chan)
560 return;
561
562 sh_dmae_chan_ld_cleanup(sh_chan, true);
389} 563}
390 564
391static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all) 565static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all)
@@ -419,7 +593,11 @@ static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all
419 cookie = tx->cookie; 593 cookie = tx->cookie;
420 594
421 if (desc->mark == DESC_COMPLETED && desc->chunks == 1) { 595 if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
422 BUG_ON(sh_chan->completed_cookie != desc->cookie - 1); 596 if (sh_chan->completed_cookie != desc->cookie - 1)
597 dev_dbg(sh_chan->dev,
598 "Completing cookie %d, expected %d\n",
599 desc->cookie,
600 sh_chan->completed_cookie + 1);
423 sh_chan->completed_cookie = desc->cookie; 601 sh_chan->completed_cookie = desc->cookie;
424 } 602 }
425 603
@@ -492,7 +670,7 @@ static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan)
492 return; 670 return;
493 } 671 }
494 672
495 /* Find the first un-transfer desciptor */ 673 /* Find the first not transferred desciptor */
496 list_for_each_entry(sd, &sh_chan->ld_queue, node) 674 list_for_each_entry(sd, &sh_chan->ld_queue, node)
497 if (sd->mark == DESC_SUBMITTED) { 675 if (sd->mark == DESC_SUBMITTED) {
498 /* Get the ld start address from ld_queue */ 676 /* Get the ld start address from ld_queue */
@@ -559,7 +737,7 @@ static irqreturn_t sh_dmae_err(int irq, void *data)
559 737
560 /* IRQ Multi */ 738 /* IRQ Multi */
561 if (shdev->pdata.mode & SHDMA_MIX_IRQ) { 739 if (shdev->pdata.mode & SHDMA_MIX_IRQ) {
562 int cnt = 0; 740 int __maybe_unused cnt = 0;
563 switch (irq) { 741 switch (irq) {
564#if defined(DMTE6_IRQ) && defined(DMAE1_IRQ) 742#if defined(DMTE6_IRQ) && defined(DMAE1_IRQ)
565 case DMTE6_IRQ: 743 case DMTE6_IRQ:
@@ -596,11 +774,14 @@ static void dmae_do_tasklet(unsigned long data)
596 struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data; 774 struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data;
597 struct sh_desc *desc; 775 struct sh_desc *desc;
598 u32 sar_buf = sh_dmae_readl(sh_chan, SAR); 776 u32 sar_buf = sh_dmae_readl(sh_chan, SAR);
777 u32 dar_buf = sh_dmae_readl(sh_chan, DAR);
599 778
600 spin_lock(&sh_chan->desc_lock); 779 spin_lock(&sh_chan->desc_lock);
601 list_for_each_entry(desc, &sh_chan->ld_queue, node) { 780 list_for_each_entry(desc, &sh_chan->ld_queue, node) {
602 if ((desc->hw.sar + desc->hw.tcr) == sar_buf && 781 if (desc->mark == DESC_SUBMITTED &&
603 desc->mark == DESC_SUBMITTED) { 782 ((desc->direction == DMA_FROM_DEVICE &&
783 (desc->hw.dar + desc->hw.tcr) == dar_buf) ||
784 (desc->hw.sar + desc->hw.tcr) == sar_buf)) {
604 dev_dbg(sh_chan->dev, "done #%d@%p dst %u\n", 785 dev_dbg(sh_chan->dev, "done #%d@%p dst %u\n",
605 desc->async_tx.cookie, &desc->async_tx, 786 desc->async_tx.cookie, &desc->async_tx,
606 desc->hw.dar); 787 desc->hw.dar);
@@ -673,7 +854,7 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id)
673 } 854 }
674 855
675 snprintf(new_sh_chan->dev_id, sizeof(new_sh_chan->dev_id), 856 snprintf(new_sh_chan->dev_id, sizeof(new_sh_chan->dev_id),
676 "sh-dmae%d", new_sh_chan->id); 857 "sh-dmae%d", new_sh_chan->id);
677 858
678 /* set up channel irq */ 859 /* set up channel irq */
679 err = request_irq(irq, &sh_dmae_interrupt, irqflags, 860 err = request_irq(irq, &sh_dmae_interrupt, irqflags,
@@ -684,11 +865,6 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id)
684 goto err_no_irq; 865 goto err_no_irq;
685 } 866 }
686 867
687 /* CHCR register control function */
688 new_sh_chan->set_chcr = dmae_set_chcr;
689 /* DMARS register control function */
690 new_sh_chan->set_dmars = dmae_set_dmars;
691
692 shdev->chan[id] = new_sh_chan; 868 shdev->chan[id] = new_sh_chan;
693 return 0; 869 return 0;
694 870
@@ -759,12 +935,19 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
759 INIT_LIST_HEAD(&shdev->common.channels); 935 INIT_LIST_HEAD(&shdev->common.channels);
760 936
761 dma_cap_set(DMA_MEMCPY, shdev->common.cap_mask); 937 dma_cap_set(DMA_MEMCPY, shdev->common.cap_mask);
938 dma_cap_set(DMA_SLAVE, shdev->common.cap_mask);
939
762 shdev->common.device_alloc_chan_resources 940 shdev->common.device_alloc_chan_resources
763 = sh_dmae_alloc_chan_resources; 941 = sh_dmae_alloc_chan_resources;
764 shdev->common.device_free_chan_resources = sh_dmae_free_chan_resources; 942 shdev->common.device_free_chan_resources = sh_dmae_free_chan_resources;
765 shdev->common.device_prep_dma_memcpy = sh_dmae_prep_memcpy; 943 shdev->common.device_prep_dma_memcpy = sh_dmae_prep_memcpy;
766 shdev->common.device_is_tx_complete = sh_dmae_is_complete; 944 shdev->common.device_is_tx_complete = sh_dmae_is_complete;
767 shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending; 945 shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending;
946
947 /* Compulsory for DMA_SLAVE fields */
948 shdev->common.device_prep_slave_sg = sh_dmae_prep_slave_sg;
949 shdev->common.device_terminate_all = sh_dmae_terminate_all;
950
768 shdev->common.dev = &pdev->dev; 951 shdev->common.dev = &pdev->dev;
769 /* Default transfer size of 32 bytes requires 32-byte alignment */ 952 /* Default transfer size of 32 bytes requires 32-byte alignment */
770 shdev->common.copy_align = 5; 953 shdev->common.copy_align = 5;
diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h
index 108f1cffb6f5..7e227f3c87c4 100644
--- a/drivers/dma/shdma.h
+++ b/drivers/dma/shdma.h
@@ -29,6 +29,7 @@ struct sh_desc {
29 struct sh_dmae_regs hw; 29 struct sh_dmae_regs hw;
30 struct list_head node; 30 struct list_head node;
31 struct dma_async_tx_descriptor async_tx; 31 struct dma_async_tx_descriptor async_tx;
32 enum dma_data_direction direction;
32 dma_cookie_t cookie; 33 dma_cookie_t cookie;
33 int chunks; 34 int chunks;
34 int mark; 35 int mark;
@@ -45,13 +46,9 @@ struct sh_dmae_chan {
45 struct device *dev; /* Channel device */ 46 struct device *dev; /* Channel device */
46 struct tasklet_struct tasklet; /* Tasklet */ 47 struct tasklet_struct tasklet; /* Tasklet */
47 int descs_allocated; /* desc count */ 48 int descs_allocated; /* desc count */
49 int xmit_shift; /* log_2(bytes_per_xfer) */
48 int id; /* Raw id of this channel */ 50 int id; /* Raw id of this channel */
49 char dev_id[16]; /* unique name per DMAC of channel */ 51 char dev_id[16]; /* unique name per DMAC of channel */
50
51 /* Set chcr */
52 int (*set_chcr)(struct sh_dmae_chan *sh_chan, u32 regs);
53 /* Set DMA resource */
54 int (*set_dmars)(struct sh_dmae_chan *sh_chan, u16 res);
55}; 52};
56 53
57struct sh_dmae_device { 54struct sh_dmae_device {
diff --git a/drivers/firmware/iscsi_ibft.c b/drivers/firmware/iscsi_ibft.c
index 051d1ebbd287..f82bcdae130b 100644
--- a/drivers/firmware/iscsi_ibft.c
+++ b/drivers/firmware/iscsi_ibft.c
@@ -381,7 +381,7 @@ static ssize_t ibft_attr_show_nic(struct ibft_kobject *entry,
381 void *ibft_loc = entry->header; 381 void *ibft_loc = entry->header;
382 char *str = buf; 382 char *str = buf;
383 char *mac; 383 char *mac;
384 int val; 384 __be32 val;
385 385
386 if (!nic) 386 if (!nic)
387 return 0; 387 return 0;
@@ -397,10 +397,8 @@ static ssize_t ibft_attr_show_nic(struct ibft_kobject *entry,
397 str += sprintf_ipaddr(str, nic->ip_addr); 397 str += sprintf_ipaddr(str, nic->ip_addr);
398 break; 398 break;
399 case ibft_eth_subnet_mask: 399 case ibft_eth_subnet_mask:
400 val = ~((1 << (32-nic->subnet_mask_prefix))-1); 400 val = cpu_to_be32(~((1 << (32-nic->subnet_mask_prefix))-1));
401 str += sprintf(str, NIPQUAD_FMT, 401 str += sprintf(str, "%pI4", &val);
402 (u8)(val >> 24), (u8)(val >> 16),
403 (u8)(val >> 8), (u8)(val));
404 break; 402 break;
405 case ibft_eth_origin: 403 case ibft_eth_origin:
406 str += sprintf(str, "%d\n", nic->origin); 404 str += sprintf(str, "%d\n", nic->origin);
diff --git a/drivers/media/IR/Makefile b/drivers/media/IR/Makefile
index df5ddb4bbbf7..171890e7a41d 100644
--- a/drivers/media/IR/Makefile
+++ b/drivers/media/IR/Makefile
@@ -1,5 +1,5 @@
1ir-common-objs := ir-functions.o ir-keymaps.o 1ir-common-objs := ir-functions.o ir-keymaps.o
2ir-core-objs := ir-keytable.o 2ir-core-objs := ir-keytable.o ir-sysfs.o
3 3
4obj-$(CONFIG_IR_CORE) += ir-core.o 4obj-$(CONFIG_IR_CORE) += ir-core.o
5obj-$(CONFIG_VIDEO_IR) += ir-common.o 5obj-$(CONFIG_VIDEO_IR) += ir-common.o
diff --git a/drivers/media/IR/ir-functions.c b/drivers/media/IR/ir-functions.c
index 776a136616d6..ab06919ad5fc 100644
--- a/drivers/media/IR/ir-functions.c
+++ b/drivers/media/IR/ir-functions.c
@@ -52,7 +52,7 @@ static void ir_input_key_event(struct input_dev *dev, struct ir_input_state *ir)
52/* -------------------------------------------------------------------------- */ 52/* -------------------------------------------------------------------------- */
53 53
54int ir_input_init(struct input_dev *dev, struct ir_input_state *ir, 54int ir_input_init(struct input_dev *dev, struct ir_input_state *ir,
55 int ir_type) 55 const u64 ir_type)
56{ 56{
57 ir->ir_type = ir_type; 57 ir->ir_type = ir_type;
58 58
diff --git a/drivers/media/IR/ir-keymaps.c b/drivers/media/IR/ir-keymaps.c
index 9bbe6b1e9871..0efdefe75f32 100644
--- a/drivers/media/IR/ir-keymaps.c
+++ b/drivers/media/IR/ir-keymaps.c
@@ -3393,3 +3393,102 @@ struct ir_scancode_table ir_codes_nec_terratec_cinergy_xs_table = {
3393}; 3393};
3394EXPORT_SYMBOL_GPL(ir_codes_nec_terratec_cinergy_xs_table); 3394EXPORT_SYMBOL_GPL(ir_codes_nec_terratec_cinergy_xs_table);
3395 3395
3396
3397/* Leadtek Winfast TV USB II Deluxe remote
3398 Magnus Alm <magnus.alm@gmail.com>
3399 */
3400static struct ir_scancode ir_codes_winfast_usbii_deluxe[] = {
3401 { 0x62, KEY_0},
3402 { 0x75, KEY_1},
3403 { 0x76, KEY_2},
3404 { 0x77, KEY_3},
3405 { 0x79, KEY_4},
3406 { 0x7a, KEY_5},
3407 { 0x7b, KEY_6},
3408 { 0x7d, KEY_7},
3409 { 0x7e, KEY_8},
3410 { 0x7f, KEY_9},
3411
3412 { 0x38, KEY_CAMERA}, /* SNAPSHOT */
3413 { 0x37, KEY_RECORD}, /* RECORD */
3414 { 0x35, KEY_TIME}, /* TIMESHIFT */
3415
3416 { 0x74, KEY_VOLUMEUP}, /* VOLUMEUP */
3417 { 0x78, KEY_VOLUMEDOWN}, /* VOLUMEDOWN */
3418 { 0x64, KEY_MUTE}, /* MUTE */
3419
3420 { 0x21, KEY_CHANNEL}, /* SURF */
3421 { 0x7c, KEY_CHANNELUP}, /* CHANNELUP */
3422 { 0x60, KEY_CHANNELDOWN}, /* CHANNELDOWN */
3423 { 0x61, KEY_LAST}, /* LAST CHANNEL (RECALL) */
3424
3425 { 0x72, KEY_VIDEO}, /* INPUT MODES (TV/FM) */
3426
3427 { 0x70, KEY_POWER2}, /* TV ON/OFF */
3428
3429 { 0x39, KEY_CYCLEWINDOWS}, /* MINIMIZE (BOSS) */
3430 { 0x3a, KEY_NEW}, /* PIP */
3431 { 0x73, KEY_ZOOM}, /* FULLSECREEN */
3432
3433 { 0x66, KEY_INFO}, /* OSD (DISPLAY) */
3434
3435 { 0x31, KEY_DOT}, /* '.' */
3436 { 0x63, KEY_ENTER}, /* ENTER */
3437
3438};
3439struct ir_scancode_table ir_codes_winfast_usbii_deluxe_table = {
3440 .scan = ir_codes_winfast_usbii_deluxe,
3441 .size = ARRAY_SIZE(ir_codes_winfast_usbii_deluxe),
3442};
3443EXPORT_SYMBOL_GPL(ir_codes_winfast_usbii_deluxe_table);
3444
3445/* Kworld 315U
3446 */
3447static struct ir_scancode ir_codes_kworld_315u[] = {
3448 { 0x6143, KEY_POWER },
3449 { 0x6101, KEY_TUNER }, /* source */
3450 { 0x610b, KEY_ZOOM },
3451 { 0x6103, KEY_POWER2 }, /* shutdown */
3452
3453 { 0x6104, KEY_1 },
3454 { 0x6108, KEY_2 },
3455 { 0x6102, KEY_3 },
3456 { 0x6109, KEY_CHANNELUP },
3457
3458 { 0x610f, KEY_4 },
3459 { 0x6105, KEY_5 },
3460 { 0x6106, KEY_6 },
3461 { 0x6107, KEY_CHANNELDOWN },
3462
3463 { 0x610c, KEY_7 },
3464 { 0x610d, KEY_8 },
3465 { 0x610a, KEY_9 },
3466 { 0x610e, KEY_VOLUMEUP },
3467
3468 { 0x6110, KEY_LAST },
3469 { 0x6111, KEY_0 },
3470 { 0x6112, KEY_ENTER },
3471 { 0x6113, KEY_VOLUMEDOWN },
3472
3473 { 0x6114, KEY_RECORD },
3474 { 0x6115, KEY_STOP },
3475 { 0x6116, KEY_PLAY },
3476 { 0x6117, KEY_MUTE },
3477
3478 { 0x6118, KEY_UP },
3479 { 0x6119, KEY_DOWN },
3480 { 0x611a, KEY_LEFT },
3481 { 0x611b, KEY_RIGHT },
3482
3483 { 0x611c, KEY_RED },
3484 { 0x611d, KEY_GREEN },
3485 { 0x611e, KEY_YELLOW },
3486 { 0x611f, KEY_BLUE },
3487};
3488
3489struct ir_scancode_table ir_codes_kworld_315u_table = {
3490 .scan = ir_codes_kworld_315u,
3491 .size = ARRAY_SIZE(ir_codes_kworld_315u),
3492 .ir_type = IR_TYPE_NEC,
3493};
3494EXPORT_SYMBOL_GPL(ir_codes_kworld_315u_table);
diff --git a/drivers/media/IR/ir-keytable.c b/drivers/media/IR/ir-keytable.c
index b521ed9d6e2e..0903f539bf68 100644
--- a/drivers/media/IR/ir-keytable.c
+++ b/drivers/media/IR/ir-keytable.c
@@ -65,7 +65,7 @@ exit:
65 * In order to reduce the quantity of table resizes, it has a minimum 65 * In order to reduce the quantity of table resizes, it has a minimum
66 * table size of IR_TAB_MIN_SIZE. 66 * table size of IR_TAB_MIN_SIZE.
67 */ 67 */
68int ir_roundup_tablesize(int n_elems) 68static int ir_roundup_tablesize(int n_elems)
69{ 69{
70 size_t size; 70 size_t size;
71 71
@@ -81,7 +81,6 @@ int ir_roundup_tablesize(int n_elems)
81 81
82 return n_elems; 82 return n_elems;
83} 83}
84EXPORT_SYMBOL_GPL(ir_roundup_tablesize);
85 84
86/** 85/**
87 * ir_copy_table() - copies a keytable, discarding the unused entries 86 * ir_copy_table() - copies a keytable, discarding the unused entries
@@ -89,9 +88,11 @@ EXPORT_SYMBOL_GPL(ir_roundup_tablesize);
89 * @origin: origin table 88 * @origin: origin table
90 * 89 *
91 * Copies all entries where the keycode is not KEY_UNKNOWN/KEY_RESERVED 90 * Copies all entries where the keycode is not KEY_UNKNOWN/KEY_RESERVED
91 * Also copies table size and table protocol.
92 * NOTE: It shouldn't copy the lock field
92 */ 93 */
93 94
94int ir_copy_table(struct ir_scancode_table *destin, 95static int ir_copy_table(struct ir_scancode_table *destin,
95 const struct ir_scancode_table *origin) 96 const struct ir_scancode_table *origin)
96{ 97{
97 int i, j = 0; 98 int i, j = 0;
@@ -105,12 +106,12 @@ int ir_copy_table(struct ir_scancode_table *destin,
105 j++; 106 j++;
106 } 107 }
107 destin->size = j; 108 destin->size = j;
109 destin->ir_type = origin->ir_type;
108 110
109 IR_dprintk(1, "Copied %d scancodes to the new keycode table\n", destin->size); 111 IR_dprintk(1, "Copied %d scancodes to the new keycode table\n", destin->size);
110 112
111 return 0; 113 return 0;
112} 114}
113EXPORT_SYMBOL_GPL(ir_copy_table);
114 115
115/** 116/**
116 * ir_getkeycode() - get a keycode at the evdev scancode ->keycode table 117 * ir_getkeycode() - get a keycode at the evdev scancode ->keycode table
@@ -184,18 +185,14 @@ static void ir_delete_key(struct ir_scancode_table *rc_tab, int elem)
184 int newsize = rc_tab->size - 1; 185 int newsize = rc_tab->size - 1;
185 int resize = ir_is_resize_needed(rc_tab, newsize); 186 int resize = ir_is_resize_needed(rc_tab, newsize);
186 struct ir_scancode *oldkeymap = rc_tab->scan; 187 struct ir_scancode *oldkeymap = rc_tab->scan;
187 struct ir_scancode *newkeymap; 188 struct ir_scancode *newkeymap = NULL;
188 189
189 if (resize) { 190 if (resize)
190 newkeymap = kzalloc(ir_roundup_tablesize(newsize) * 191 newkeymap = kzalloc(ir_roundup_tablesize(newsize) *
191 sizeof(*newkeymap), GFP_ATOMIC); 192 sizeof(*newkeymap), GFP_ATOMIC);
192 193
193 /* There's no memory for resize. Keep the old table */ 194 /* There's no memory for resize. Keep the old table */
194 if (!newkeymap) 195 if (!resize || !newkeymap) {
195 resize = 0;
196 }
197
198 if (!resize) {
199 newkeymap = oldkeymap; 196 newkeymap = oldkeymap;
200 197
201 /* We'll modify the live table. Lock it */ 198 /* We'll modify the live table. Lock it */
@@ -399,12 +396,14 @@ EXPORT_SYMBOL_GPL(ir_g_keycode_from_table);
399 * @input_dev: the struct input_dev descriptor of the device 396 * @input_dev: the struct input_dev descriptor of the device
400 * @rc_tab: the struct ir_scancode_table table of scancode/keymap 397 * @rc_tab: the struct ir_scancode_table table of scancode/keymap
401 * 398 *
402 * This routine is used to initialize the input infrastructure to work with 399 * This routine is used to initialize the input infrastructure
403 * an IR. 400 * to work with an IR.
404 * It should be called before registering the IR device. 401 * It will register the input/evdev interface for the device and
402 * register the syfs code for IR class
405 */ 403 */
406int ir_input_register(struct input_dev *input_dev, 404int ir_input_register(struct input_dev *input_dev,
407 struct ir_scancode_table *rc_tab) 405 const struct ir_scancode_table *rc_tab,
406 const struct ir_dev_props *props)
408{ 407{
409 struct ir_input_dev *ir_dev; 408 struct ir_input_dev *ir_dev;
410 struct ir_scancode *keymap = rc_tab->scan; 409 struct ir_scancode *keymap = rc_tab->scan;
@@ -417,19 +416,22 @@ int ir_input_register(struct input_dev *input_dev,
417 if (!ir_dev) 416 if (!ir_dev)
418 return -ENOMEM; 417 return -ENOMEM;
419 418
420 spin_lock_init(&rc_tab->lock); 419 spin_lock_init(&ir_dev->rc_tab.lock);
421 420
422 ir_dev->rc_tab.size = ir_roundup_tablesize(rc_tab->size); 421 ir_dev->rc_tab.size = ir_roundup_tablesize(rc_tab->size);
423 ir_dev->rc_tab.scan = kzalloc(ir_dev->rc_tab.size * 422 ir_dev->rc_tab.scan = kzalloc(ir_dev->rc_tab.size *
424 sizeof(struct ir_scancode), GFP_KERNEL); 423 sizeof(struct ir_scancode), GFP_KERNEL);
425 if (!ir_dev->rc_tab.scan) 424 if (!ir_dev->rc_tab.scan) {
425 kfree(ir_dev);
426 return -ENOMEM; 426 return -ENOMEM;
427 }
427 428
428 IR_dprintk(1, "Allocated space for %d keycode entries (%zd bytes)\n", 429 IR_dprintk(1, "Allocated space for %d keycode entries (%zd bytes)\n",
429 ir_dev->rc_tab.size, 430 ir_dev->rc_tab.size,
430 ir_dev->rc_tab.size * sizeof(ir_dev->rc_tab.scan)); 431 ir_dev->rc_tab.size * sizeof(ir_dev->rc_tab.scan));
431 432
432 ir_copy_table(&ir_dev->rc_tab, rc_tab); 433 ir_copy_table(&ir_dev->rc_tab, rc_tab);
434 ir_dev->props = props;
433 435
434 /* set the bits for the keys */ 436 /* set the bits for the keys */
435 IR_dprintk(1, "key map size: %d\n", rc_tab->size); 437 IR_dprintk(1, "key map size: %d\n", rc_tab->size);
@@ -447,16 +449,31 @@ int ir_input_register(struct input_dev *input_dev,
447 input_set_drvdata(input_dev, ir_dev); 449 input_set_drvdata(input_dev, ir_dev);
448 450
449 rc = input_register_device(input_dev); 451 rc = input_register_device(input_dev);
452 if (rc < 0)
453 goto err;
454
455 rc = ir_register_class(input_dev);
450 if (rc < 0) { 456 if (rc < 0) {
451 kfree(rc_tab->scan); 457 input_unregister_device(input_dev);
452 kfree(ir_dev); 458 goto err;
453 input_set_drvdata(input_dev, NULL);
454 } 459 }
455 460
461 return 0;
462
463err:
464 kfree(rc_tab->scan);
465 kfree(ir_dev);
466 input_set_drvdata(input_dev, NULL);
456 return rc; 467 return rc;
457} 468}
458EXPORT_SYMBOL_GPL(ir_input_register); 469EXPORT_SYMBOL_GPL(ir_input_register);
459 470
471/**
472 * ir_input_unregister() - unregisters IR and frees resources
473 * @input_dev: the struct input_dev descriptor of the device
474
475 * This routine is used to free memory and de-register interfaces.
476 */
460void ir_input_unregister(struct input_dev *dev) 477void ir_input_unregister(struct input_dev *dev)
461{ 478{
462 struct ir_input_dev *ir_dev = input_get_drvdata(dev); 479 struct ir_input_dev *ir_dev = input_get_drvdata(dev);
@@ -472,6 +489,8 @@ void ir_input_unregister(struct input_dev *dev)
472 kfree(rc_tab->scan); 489 kfree(rc_tab->scan);
473 rc_tab->scan = NULL; 490 rc_tab->scan = NULL;
474 491
492 ir_unregister_class(dev);
493
475 kfree(ir_dev); 494 kfree(ir_dev);
476 input_unregister_device(dev); 495 input_unregister_device(dev);
477} 496}
diff --git a/drivers/media/IR/ir-sysfs.c b/drivers/media/IR/ir-sysfs.c
new file mode 100644
index 000000000000..bf5fbcd84238
--- /dev/null
+++ b/drivers/media/IR/ir-sysfs.c
@@ -0,0 +1,211 @@
1/* ir-register.c - handle IR scancode->keycode tables
2 *
3 * Copyright (C) 2009 by Mauro Carvalho Chehab <mchehab@redhat.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/input.h>
16#include <linux/device.h>
17#include <media/ir-core.h>
18
19#define IRRCV_NUM_DEVICES 256
20
21/* bit array to represent IR sysfs device number */
22static unsigned long ir_core_dev_number;
23
24/* class for /sys/class/irrcv */
25static struct class *ir_input_class;
26
27/**
28 * show_protocol() - shows the current IR protocol
29 * @d: the device descriptor
30 * @mattr: the device attribute struct (unused)
31 * @buf: a pointer to the output buffer
32 *
33 * This routine is a callback routine for input read the IR protocol type.
34 * it is trigged by reading /sys/class/irrcv/irrcv?/current_protocol.
35 * It returns the protocol name, as understood by the driver.
36 */
37static ssize_t show_protocol(struct device *d,
38 struct device_attribute *mattr, char *buf)
39{
40 char *s;
41 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
42 u64 ir_type = ir_dev->rc_tab.ir_type;
43
44 IR_dprintk(1, "Current protocol is %lld\n", (long long)ir_type);
45
46 /* FIXME: doesn't support multiple protocols at the same time */
47 if (ir_type == IR_TYPE_UNKNOWN)
48 s = "Unknown";
49 else if (ir_type == IR_TYPE_RC5)
50 s = "RC-5";
51 else if (ir_type == IR_TYPE_PD)
52 s = "Pulse/distance";
53 else if (ir_type == IR_TYPE_NEC)
54 s = "NEC";
55 else
56 s = "Other";
57
58 return sprintf(buf, "%s\n", s);
59}
60
61/**
62 * store_protocol() - shows the current IR protocol
63 * @d: the device descriptor
64 * @mattr: the device attribute struct (unused)
65 * @buf: a pointer to the input buffer
66 * @len: length of the input buffer
67 *
68 * This routine is a callback routine for changing the IR protocol type.
69 * it is trigged by reading /sys/class/irrcv/irrcv?/current_protocol.
70 * It changes the IR the protocol name, if the IR type is recognized
71 * by the driver.
72 * If an unknown protocol name is used, returns -EINVAL.
73 */
74static ssize_t store_protocol(struct device *d,
75 struct device_attribute *mattr,
76 const char *data,
77 size_t len)
78{
79 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
80 u64 ir_type = IR_TYPE_UNKNOWN;
81 int rc = -EINVAL;
82 unsigned long flags;
83 char *buf;
84
85 buf = strsep((char **) &data, "\n");
86
87 if (!strcasecmp(buf, "rc-5"))
88 ir_type = IR_TYPE_RC5;
89 else if (!strcasecmp(buf, "pd"))
90 ir_type = IR_TYPE_PD;
91 else if (!strcasecmp(buf, "nec"))
92 ir_type = IR_TYPE_NEC;
93
94 if (ir_type == IR_TYPE_UNKNOWN) {
95 IR_dprintk(1, "Error setting protocol to %lld\n",
96 (long long)ir_type);
97 return -EINVAL;
98 }
99
100 if (ir_dev->props && ir_dev->props->change_protocol)
101 rc = ir_dev->props->change_protocol(ir_dev->props->priv,
102 ir_type);
103
104 if (rc < 0) {
105 IR_dprintk(1, "Error setting protocol to %lld\n",
106 (long long)ir_type);
107 return -EINVAL;
108 }
109
110 spin_lock_irqsave(&ir_dev->rc_tab.lock, flags);
111 ir_dev->rc_tab.ir_type = ir_type;
112 spin_unlock_irqrestore(&ir_dev->rc_tab.lock, flags);
113
114 IR_dprintk(1, "Current protocol is %lld\n",
115 (long long)ir_type);
116
117 return len;
118}
119
120/*
121 * Static device attribute struct with the sysfs attributes for IR's
122 */
123static DEVICE_ATTR(current_protocol, S_IRUGO | S_IWUSR,
124 show_protocol, store_protocol);
125
126static struct attribute *ir_dev_attrs[] = {
127 &dev_attr_current_protocol.attr,
128 NULL,
129};
130
131/**
132 * ir_register_class() - creates the sysfs for /sys/class/irrcv/irrcv?
133 * @input_dev: the struct input_dev descriptor of the device
134 *
135 * This routine is used to register the syfs code for IR class
136 */
137int ir_register_class(struct input_dev *input_dev)
138{
139 int rc;
140 struct kobject *kobj;
141
142 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
143 int devno = find_first_zero_bit(&ir_core_dev_number,
144 IRRCV_NUM_DEVICES);
145
146 if (unlikely(devno < 0))
147 return devno;
148
149 ir_dev->attr.attrs = ir_dev_attrs;
150 ir_dev->class_dev = device_create(ir_input_class, NULL,
151 input_dev->dev.devt, ir_dev,
152 "irrcv%d", devno);
153 kobj = &ir_dev->class_dev->kobj;
154
155 printk(KERN_WARNING "Creating IR device %s\n", kobject_name(kobj));
156 rc = sysfs_create_group(kobj, &ir_dev->attr);
157 if (unlikely(rc < 0)) {
158 device_destroy(ir_input_class, input_dev->dev.devt);
159 return -ENOMEM;
160 }
161
162 ir_dev->devno = devno;
163 set_bit(devno, &ir_core_dev_number);
164
165 return 0;
166};
167
168/**
169 * ir_unregister_class() - removes the sysfs for sysfs for
170 * /sys/class/irrcv/irrcv?
171 * @input_dev: the struct input_dev descriptor of the device
172 *
173 * This routine is used to unregister the syfs code for IR class
174 */
175void ir_unregister_class(struct input_dev *input_dev)
176{
177 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
178 struct kobject *kobj;
179
180 clear_bit(ir_dev->devno, &ir_core_dev_number);
181
182 kobj = &ir_dev->class_dev->kobj;
183
184 sysfs_remove_group(kobj, &ir_dev->attr);
185 device_destroy(ir_input_class, input_dev->dev.devt);
186
187 kfree(ir_dev->attr.name);
188}
189
190/*
191 * Init/exit code for the module. Basically, creates/removes /sys/class/irrcv
192 */
193
194static int __init ir_core_init(void)
195{
196 ir_input_class = class_create(THIS_MODULE, "irrcv");
197 if (IS_ERR(ir_input_class)) {
198 printk(KERN_ERR "ir_core: unable to register irrcv class\n");
199 return PTR_ERR(ir_input_class);
200 }
201
202 return 0;
203}
204
205static void __exit ir_core_exit(void)
206{
207 class_destroy(ir_input_class);
208}
209
210module_init(ir_core_init);
211module_exit(ir_core_exit);
diff --git a/drivers/media/common/saa7146_fops.c b/drivers/media/common/saa7146_fops.c
index 7364b9642d00..fd8e1f45be36 100644
--- a/drivers/media/common/saa7146_fops.c
+++ b/drivers/media/common/saa7146_fops.c
@@ -423,14 +423,15 @@ static void vv_callback(struct saa7146_dev *dev, unsigned long status)
423 } 423 }
424} 424}
425 425
426int saa7146_vv_devinit(struct saa7146_dev *dev)
427{
428 return v4l2_device_register(&dev->pci->dev, &dev->v4l2_dev);
429}
430EXPORT_SYMBOL_GPL(saa7146_vv_devinit);
431
426int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv) 432int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv)
427{ 433{
428 struct saa7146_vv *vv; 434 struct saa7146_vv *vv;
429 int err;
430
431 err = v4l2_device_register(&dev->pci->dev, &dev->v4l2_dev);
432 if (err)
433 return err;
434 435
435 vv = kzalloc(sizeof(struct saa7146_vv), GFP_KERNEL); 436 vv = kzalloc(sizeof(struct saa7146_vv), GFP_KERNEL);
436 if (vv == NULL) { 437 if (vv == NULL) {
diff --git a/drivers/media/common/tuners/tuner-types.c b/drivers/media/common/tuners/tuner-types.c
index 2b876f3988c1..d9aaaca620c9 100644
--- a/drivers/media/common/tuners/tuner-types.c
+++ b/drivers/media/common/tuners/tuner-types.c
@@ -1337,6 +1337,22 @@ static struct tuner_params tuner_philips_cu1216l_params[] = {
1337 }, 1337 },
1338}; 1338};
1339 1339
1340/* ---------------------- TUNER_SONY_BTF_PXN01Z ------------------------ */
1341
1342static struct tuner_range tuner_sony_btf_pxn01z_ranges[] = {
1343 { 16 * 137.25 /*MHz*/, 0x8e, 0x01, },
1344 { 16 * 367.25 /*MHz*/, 0x8e, 0x02, },
1345 { 16 * 999.99 , 0x8e, 0x04, },
1346};
1347
1348static struct tuner_params tuner_sony_btf_pxn01z_params[] = {
1349 {
1350 .type = TUNER_PARAM_TYPE_NTSC,
1351 .ranges = tuner_sony_btf_pxn01z_ranges,
1352 .count = ARRAY_SIZE(tuner_sony_btf_pxn01z_ranges),
1353 },
1354};
1355
1340/* --------------------------------------------------------------------- */ 1356/* --------------------------------------------------------------------- */
1341 1357
1342struct tunertype tuners[] = { 1358struct tunertype tuners[] = {
@@ -1805,6 +1821,11 @@ struct tunertype tuners[] = {
1805 .name = "NXP TDA18271", 1821 .name = "NXP TDA18271",
1806 /* see tda18271-fe.c for details */ 1822 /* see tda18271-fe.c for details */
1807 }, 1823 },
1824 [TUNER_SONY_BTF_PXN01Z] = {
1825 .name = "Sony BTF-Pxn01Z",
1826 .params = tuner_sony_btf_pxn01z_params,
1827 .count = ARRAY_SIZE(tuner_sony_btf_pxn01z_params),
1828 },
1808}; 1829};
1809EXPORT_SYMBOL(tuners); 1830EXPORT_SYMBOL(tuners);
1810 1831
diff --git a/drivers/media/common/tuners/tuner-xc2028.c b/drivers/media/common/tuners/tuner-xc2028.c
index f270e605da83..be51c294b375 100644
--- a/drivers/media/common/tuners/tuner-xc2028.c
+++ b/drivers/media/common/tuners/tuner-xc2028.c
@@ -917,30 +917,68 @@ static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */,
917 * that xc2028 will be in a safe state. 917 * that xc2028 will be in a safe state.
918 * Maybe this might also be needed for DTV. 918 * Maybe this might also be needed for DTV.
919 */ 919 */
920 if (new_mode == T_ANALOG_TV) 920 if (new_mode == T_ANALOG_TV) {
921 rc = send_seq(priv, {0x00, 0x00}); 921 rc = send_seq(priv, {0x00, 0x00});
922 922
923 /* 923 /* Analog modes require offset = 0 */
924 * Digital modes require an offset to adjust to the 924 } else {
925 * proper frequency. 925 /*
926 * Analog modes require offset = 0 926 * Digital modes require an offset to adjust to the
927 */ 927 * proper frequency. The offset depends on what
928 if (new_mode == T_DIGITAL_TV) { 928 * firmware version is used.
929 /* Sets the offset according with firmware */ 929 */
930
931 /*
932 * Adjust to the center frequency. This is calculated by the
933 * formula: offset = 1.25MHz - BW/2
934 * For DTV 7/8, the firmware uses BW = 8000, so it needs a
935 * further adjustment to get the frequency center on VHF
936 */
930 if (priv->cur_fw.type & DTV6) 937 if (priv->cur_fw.type & DTV6)
931 offset = 1750000; 938 offset = 1750000;
932 else if (priv->cur_fw.type & DTV7) 939 else if (priv->cur_fw.type & DTV7)
933 offset = 2250000; 940 offset = 2250000;
934 else /* DTV8 or DTV78 */ 941 else /* DTV8 or DTV78 */
935 offset = 2750000; 942 offset = 2750000;
943 if ((priv->cur_fw.type & DTV78) && freq < 470000000)
944 offset -= 500000;
936 945
937 /* 946 /*
938 * We must adjust the offset by 500kHz when 947 * xc3028 additional "magic"
939 * tuning a 7MHz VHF channel with DTV78 firmware 948 * Depending on the firmware version, it needs some adjustments
940 * (used in Australia, Italy and Germany) 949 * to properly centralize the frequency. This seems to be
950 * needed to compensate the SCODE table adjustments made by
951 * newer firmwares
941 */ 952 */
942 if ((priv->cur_fw.type & DTV78) && freq < 470000000) 953
943 offset -= 500000; 954#if 1
955 /*
956 * The proper adjustment would be to do it at s-code table.
957 * However, this didn't work, as reported by
958 * Robert Lowery <rglowery@exemail.com.au>
959 */
960
961 if (priv->cur_fw.type & DTV7)
962 offset += 500000;
963
964#else
965 /*
966 * Still need tests for XC3028L (firmware 3.2 or upper)
967 * So, for now, let's just comment the per-firmware
968 * version of this change. Reports with xc3028l working
969 * with and without the lines bellow are welcome
970 */
971
972 if (priv->firm_version < 0x0302) {
973 if (priv->cur_fw.type & DTV7)
974 offset += 500000;
975 } else {
976 if (priv->cur_fw.type & DTV7)
977 offset -= 300000;
978 else if (type != ATSC) /* DVB @6MHz, DTV 8 and DTV 7/8 */
979 offset += 200000;
980 }
981#endif
944 } 982 }
945 983
946 div = (freq - offset + DIV / 2) / DIV; 984 div = (freq - offset + DIV / 2) / DIV;
@@ -1097,17 +1135,24 @@ static int xc2028_set_params(struct dvb_frontend *fe,
1097 1135
1098 /* All S-code tables need a 200kHz shift */ 1136 /* All S-code tables need a 200kHz shift */
1099 if (priv->ctrl.demod) { 1137 if (priv->ctrl.demod) {
1100 demod = priv->ctrl.demod + 200; 1138 demod = priv->ctrl.demod;
1139
1140 /*
1141 * Newer firmwares require a 200 kHz offset only for ATSC
1142 */
1143 if (type == ATSC || priv->firm_version < 0x0302)
1144 demod += 200;
1101 /* 1145 /*
1102 * The DTV7 S-code table needs a 700 kHz shift. 1146 * The DTV7 S-code table needs a 700 kHz shift.
1103 * Thanks to Terry Wu <terrywu2009@gmail.com> for reporting this
1104 * 1147 *
1105 * DTV7 is only used in Australia. Germany or Italy may also 1148 * DTV7 is only used in Australia. Germany or Italy may also
1106 * use this firmware after initialization, but a tune to a UHF 1149 * use this firmware after initialization, but a tune to a UHF
1107 * channel should then cause DTV78 to be used. 1150 * channel should then cause DTV78 to be used.
1151 *
1152 * Unfortunately, on real-field tests, the s-code offset
1153 * didn't work as expected, as reported by
1154 * Robert Lowery <rglowery@exemail.com.au>
1108 */ 1155 */
1109 if (type & DTV7)
1110 demod += 500;
1111 } 1156 }
1112 1157
1113 return generic_set_freq(fe, p->frequency, 1158 return generic_set_freq(fe, p->frequency,
diff --git a/drivers/media/dvb/Kconfig b/drivers/media/dvb/Kconfig
index cf8f65f309da..161ccfd471cb 100644
--- a/drivers/media/dvb/Kconfig
+++ b/drivers/media/dvb/Kconfig
@@ -76,6 +76,10 @@ comment "Supported Mantis Adapters"
76 depends on DVB_CORE && PCI && I2C 76 depends on DVB_CORE && PCI && I2C
77 source "drivers/media/dvb/mantis/Kconfig" 77 source "drivers/media/dvb/mantis/Kconfig"
78 78
79comment "Supported nGene Adapters"
80 depends on DVB_CORE && PCI && I2C
81 source "drivers/media/dvb/ngene/Kconfig"
82
79comment "Supported DVB Frontends" 83comment "Supported DVB Frontends"
80 depends on DVB_CORE 84 depends on DVB_CORE
81source "drivers/media/dvb/frontends/Kconfig" 85source "drivers/media/dvb/frontends/Kconfig"
diff --git a/drivers/media/dvb/Makefile b/drivers/media/dvb/Makefile
index c12922c3659b..a1a08758a6f2 100644
--- a/drivers/media/dvb/Makefile
+++ b/drivers/media/dvb/Makefile
@@ -14,6 +14,7 @@ obj-y := dvb-core/ \
14 siano/ \ 14 siano/ \
15 dm1105/ \ 15 dm1105/ \
16 pt1/ \ 16 pt1/ \
17 mantis/ 17 mantis/ \
18 ngene/
18 19
19obj-$(CONFIG_DVB_FIREDTV) += firewire/ 20obj-$(CONFIG_DVB_FIREDTV) += firewire/
diff --git a/drivers/media/dvb/bt8xx/bt878.c b/drivers/media/dvb/bt8xx/bt878.c
index a24c125331f0..99d62094f908 100644
--- a/drivers/media/dvb/bt8xx/bt878.c
+++ b/drivers/media/dvb/bt8xx/bt878.c
@@ -576,43 +576,30 @@ static struct pci_driver bt878_pci_driver = {
576 .remove = __devexit_p(bt878_remove), 576 .remove = __devexit_p(bt878_remove),
577}; 577};
578 578
579static int bt878_pci_driver_registered;
580
581/*******************************/ 579/*******************************/
582/* Module management functions */ 580/* Module management functions */
583/*******************************/ 581/*******************************/
584 582
585static int bt878_init_module(void) 583static int __init bt878_init_module(void)
586{ 584{
587 bt878_num = 0; 585 bt878_num = 0;
588 bt878_pci_driver_registered = 0;
589 586
590 printk(KERN_INFO "bt878: AUDIO driver version %d.%d.%d loaded\n", 587 printk(KERN_INFO "bt878: AUDIO driver version %d.%d.%d loaded\n",
591 (BT878_VERSION_CODE >> 16) & 0xff, 588 (BT878_VERSION_CODE >> 16) & 0xff,
592 (BT878_VERSION_CODE >> 8) & 0xff, 589 (BT878_VERSION_CODE >> 8) & 0xff,
593 BT878_VERSION_CODE & 0xff); 590 BT878_VERSION_CODE & 0xff);
594/* 591
595 bt878_check_chipset();
596*/
597 /* later we register inside of bt878_find_audio_dma()
598 * because we may want to ignore certain cards */
599 bt878_pci_driver_registered = 1;
600 return pci_register_driver(&bt878_pci_driver); 592 return pci_register_driver(&bt878_pci_driver);
601} 593}
602 594
603static void bt878_cleanup_module(void) 595static void __exit bt878_cleanup_module(void)
604{ 596{
605 if (bt878_pci_driver_registered) { 597 pci_unregister_driver(&bt878_pci_driver);
606 bt878_pci_driver_registered = 0;
607 pci_unregister_driver(&bt878_pci_driver);
608 }
609 return;
610} 598}
611 599
612module_init(bt878_init_module); 600module_init(bt878_init_module);
613module_exit(bt878_cleanup_module); 601module_exit(bt878_cleanup_module);
614 602
615//MODULE_AUTHOR("XXX");
616MODULE_LICENSE("GPL"); 603MODULE_LICENSE("GPL");
617 604
618/* 605/*
diff --git a/drivers/media/dvb/bt8xx/dst.c b/drivers/media/dvb/bt8xx/dst.c
index 91353a6faf1d..8b0cde38984d 100644
--- a/drivers/media/dvb/bt8xx/dst.c
+++ b/drivers/media/dvb/bt8xx/dst.c
@@ -1352,8 +1352,7 @@ static int dst_get_tuna(struct dst_state *state)
1352 return retval; 1352 return retval;
1353 } 1353 }
1354 if ((state->type_flags & DST_TYPE_HAS_VLF) && 1354 if ((state->type_flags & DST_TYPE_HAS_VLF) &&
1355 !(state->dst_type == DST_TYPE_IS_CABLE) && 1355 !(state->dst_type == DST_TYPE_IS_ATSC)) {
1356 !(state->dst_type == DST_TYPE_IS_ATSC)) {
1357 1356
1358 if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[0], 9)) { 1357 if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[0], 9)) {
1359 dprintk(verbose, DST_INFO, 1, "checksum failure ? "); 1358 dprintk(verbose, DST_INFO, 1, "checksum failure ? ");
@@ -1820,8 +1819,13 @@ static struct dvb_frontend_ops dst_dvbc_ops = {
1820 .frequency_max = 858000000, 1819 .frequency_max = 858000000,
1821 .symbol_rate_min = 1000000, 1820 .symbol_rate_min = 1000000,
1822 .symbol_rate_max = 45000000, 1821 .symbol_rate_max = 45000000,
1823 /* . symbol_rate_tolerance = ???,*/ 1822 .caps = FE_CAN_FEC_AUTO |
1824 .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO 1823 FE_CAN_QAM_AUTO |
1824 FE_CAN_QAM_16 |
1825 FE_CAN_QAM_32 |
1826 FE_CAN_QAM_64 |
1827 FE_CAN_QAM_128 |
1828 FE_CAN_QAM_256
1825 }, 1829 },
1826 1830
1827 .release = dst_release, 1831 .release = dst_release,
diff --git a/drivers/media/dvb/dm1105/Kconfig b/drivers/media/dvb/dm1105/Kconfig
index de3eeb0a8d6e..695239227cb7 100644
--- a/drivers/media/dvb/dm1105/Kconfig
+++ b/drivers/media/dvb/dm1105/Kconfig
@@ -8,6 +8,7 @@ config DVB_DM1105
8 select DVB_STB6000 if !DVB_FE_CUSTOMISE 8 select DVB_STB6000 if !DVB_FE_CUSTOMISE
9 select DVB_CX24116 if !DVB_FE_CUSTOMISE 9 select DVB_CX24116 if !DVB_FE_CUSTOMISE
10 select DVB_SI21XX if !DVB_FE_CUSTOMISE 10 select DVB_SI21XX if !DVB_FE_CUSTOMISE
11 select DVB_DS3000 if !DVB_FE_CUSTOMISE
11 select VIDEO_IR 12 select VIDEO_IR
12 help 13 help
13 Support for cards based on the SDMC DM1105 PCI chip like 14 Support for cards based on the SDMC DM1105 PCI chip like
diff --git a/drivers/media/dvb/dm1105/dm1105.c b/drivers/media/dvb/dm1105/dm1105.c
index f0f483ac8b89..383cca378b8c 100644
--- a/drivers/media/dvb/dm1105/dm1105.c
+++ b/drivers/media/dvb/dm1105/dm1105.c
@@ -43,6 +43,7 @@
43#include "si21xx.h" 43#include "si21xx.h"
44#include "cx24116.h" 44#include "cx24116.h"
45#include "z0194a.h" 45#include "z0194a.h"
46#include "ds3000.h"
46 47
47#define UNSET (-1U) 48#define UNSET (-1U)
48 49
@@ -269,7 +270,7 @@ struct infrared {
269 u32 ir_command; 270 u32 ir_command;
270}; 271};
271 272
272struct dm1105dvb { 273struct dm1105_dev {
273 /* pci */ 274 /* pci */
274 struct pci_dev *pdev; 275 struct pci_dev *pdev;
275 u8 __iomem *io_mem; 276 u8 __iomem *io_mem;
@@ -308,31 +309,47 @@ struct dm1105dvb {
308 spinlock_t lock; 309 spinlock_t lock;
309}; 310};
310 311
311#define dm_io_mem(reg) ((unsigned long)(&dm1105dvb->io_mem[reg])) 312#define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
313
314#define dm_readb(reg) inb(dm_io_mem(reg))
315#define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
316
317#define dm_readw(reg) inw(dm_io_mem(reg))
318#define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
319
320#define dm_readl(reg) inl(dm_io_mem(reg))
321#define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
322
323#define dm_andorl(reg, mask, value) \
324 outl((inl(dm_io_mem(reg)) & ~(mask)) |\
325 ((value) & (mask)), (dm_io_mem(reg)))
326
327#define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
328#define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
312 329
313static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap, 330static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
314 struct i2c_msg *msgs, int num) 331 struct i2c_msg *msgs, int num)
315{ 332{
316 struct dm1105dvb *dm1105dvb ; 333 struct dm1105_dev *dev ;
317 334
318 int addr, rc, i, j, k, len, byte, data; 335 int addr, rc, i, j, k, len, byte, data;
319 u8 status; 336 u8 status;
320 337
321 dm1105dvb = i2c_adap->algo_data; 338 dev = i2c_adap->algo_data;
322 for (i = 0; i < num; i++) { 339 for (i = 0; i < num; i++) {
323 outb(0x00, dm_io_mem(DM1105_I2CCTR)); 340 dm_writeb(DM1105_I2CCTR, 0x00);
324 if (msgs[i].flags & I2C_M_RD) { 341 if (msgs[i].flags & I2C_M_RD) {
325 /* read bytes */ 342 /* read bytes */
326 addr = msgs[i].addr << 1; 343 addr = msgs[i].addr << 1;
327 addr |= 1; 344 addr |= 1;
328 outb(addr, dm_io_mem(DM1105_I2CDAT)); 345 dm_writeb(DM1105_I2CDAT, addr);
329 for (byte = 0; byte < msgs[i].len; byte++) 346 for (byte = 0; byte < msgs[i].len; byte++)
330 outb(0, dm_io_mem(DM1105_I2CDAT + byte + 1)); 347 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
331 348
332 outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR)); 349 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
333 for (j = 0; j < 55; j++) { 350 for (j = 0; j < 55; j++) {
334 mdelay(10); 351 mdelay(10);
335 status = inb(dm_io_mem(DM1105_I2CSTS)); 352 status = dm_readb(DM1105_I2CSTS);
336 if ((status & 0xc0) == 0x40) 353 if ((status & 0xc0) == 0x40)
337 break; 354 break;
338 } 355 }
@@ -340,56 +357,54 @@ static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
340 return -1; 357 return -1;
341 358
342 for (byte = 0; byte < msgs[i].len; byte++) { 359 for (byte = 0; byte < msgs[i].len; byte++) {
343 rc = inb(dm_io_mem(DM1105_I2CDAT + byte + 1)); 360 rc = dm_readb(DM1105_I2CDAT + byte + 1);
344 if (rc < 0) 361 if (rc < 0)
345 goto err; 362 goto err;
346 msgs[i].buf[byte] = rc; 363 msgs[i].buf[byte] = rc;
347 } 364 }
348 } else { 365 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
349 if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) { 366 /* prepaired for cx24116 firmware */
350 /* prepaired for cx24116 firmware */ 367 /* Write in small blocks */
351 /* Write in small blocks */ 368 len = msgs[i].len - 1;
352 len = msgs[i].len - 1; 369 k = 1;
353 k = 1; 370 do {
354 do { 371 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
355 outb(msgs[i].addr << 1, dm_io_mem(DM1105_I2CDAT)); 372 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
356 outb(0xf7, dm_io_mem(DM1105_I2CDAT + 1)); 373 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
357 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) { 374 data = msgs[i].buf[k + byte];
358 data = msgs[i].buf[k+byte]; 375 dm_writeb(DM1105_I2CDAT + byte + 2, data);
359 outb(data, dm_io_mem(DM1105_I2CDAT + byte + 2));
360 }
361 outb(0x82 + (len > 48 ? 48 : len), dm_io_mem(DM1105_I2CCTR));
362 for (j = 0; j < 25; j++) {
363 mdelay(10);
364 status = inb(dm_io_mem(DM1105_I2CSTS));
365 if ((status & 0xc0) == 0x40)
366 break;
367 }
368
369 if (j >= 25)
370 return -1;
371
372 k += 48;
373 len -= 48;
374 } while (len > 0);
375 } else {
376 /* write bytes */
377 outb(msgs[i].addr<<1, dm_io_mem(DM1105_I2CDAT));
378 for (byte = 0; byte < msgs[i].len; byte++) {
379 data = msgs[i].buf[byte];
380 outb(data, dm_io_mem(DM1105_I2CDAT + byte + 1));
381 } 376 }
382 outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR)); 377 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
383 for (j = 0; j < 25; j++) { 378 for (j = 0; j < 25; j++) {
384 mdelay(10); 379 mdelay(10);
385 status = inb(dm_io_mem(DM1105_I2CSTS)); 380 status = dm_readb(DM1105_I2CSTS);
386 if ((status & 0xc0) == 0x40) 381 if ((status & 0xc0) == 0x40)
387 break; 382 break;
388 } 383 }
389 384
390 if (j >= 25) 385 if (j >= 25)
391 return -1; 386 return -1;
387
388 k += 48;
389 len -= 48;
390 } while (len > 0);
391 } else {
392 /* write bytes */
393 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
394 for (byte = 0; byte < msgs[i].len; byte++) {
395 data = msgs[i].buf[byte];
396 dm_writeb(DM1105_I2CDAT + byte + 1, data);
392 } 397 }
398 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
399 for (j = 0; j < 25; j++) {
400 mdelay(10);
401 status = dm_readb(DM1105_I2CSTS);
402 if ((status & 0xc0) == 0x40)
403 break;
404 }
405
406 if (j >= 25)
407 return -1;
393 } 408 }
394 } 409 }
395 return num; 410 return num;
@@ -407,22 +422,22 @@ static struct i2c_algorithm dm1105_algo = {
407 .functionality = functionality, 422 .functionality = functionality,
408}; 423};
409 424
410static inline struct dm1105dvb *feed_to_dm1105dvb(struct dvb_demux_feed *feed) 425static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
411{ 426{
412 return container_of(feed->demux, struct dm1105dvb, demux); 427 return container_of(feed->demux, struct dm1105_dev, demux);
413} 428}
414 429
415static inline struct dm1105dvb *frontend_to_dm1105dvb(struct dvb_frontend *fe) 430static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
416{ 431{
417 return container_of(fe->dvb, struct dm1105dvb, dvb_adapter); 432 return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
418} 433}
419 434
420static int dm1105dvb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) 435static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
421{ 436{
422 struct dm1105dvb *dm1105dvb = frontend_to_dm1105dvb(fe); 437 struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
423 u32 lnb_mask, lnb_13v, lnb_18v, lnb_off; 438 u32 lnb_mask, lnb_13v, lnb_18v, lnb_off;
424 439
425 switch (dm1105dvb->boardnr) { 440 switch (dev->boardnr) {
426 case DM1105_BOARD_AXESS_DM05: 441 case DM1105_BOARD_AXESS_DM05:
427 lnb_mask = DM05_LNB_MASK; 442 lnb_mask = DM05_LNB_MASK;
428 lnb_off = DM05_LNB_OFF; 443 lnb_off = DM05_LNB_OFF;
@@ -438,62 +453,67 @@ static int dm1105dvb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t volta
438 lnb_18v = DM1105_LNB_18V; 453 lnb_18v = DM1105_LNB_18V;
439 } 454 }
440 455
441 outl(lnb_mask, dm_io_mem(DM1105_GPIOCTR)); 456 dm_writel(DM1105_GPIOCTR, lnb_mask);
442 if (voltage == SEC_VOLTAGE_18) 457 if (voltage == SEC_VOLTAGE_18)
443 outl(lnb_18v , dm_io_mem(DM1105_GPIOVAL)); 458 dm_writel(DM1105_GPIOVAL, lnb_18v);
444 else if (voltage == SEC_VOLTAGE_13) 459 else if (voltage == SEC_VOLTAGE_13)
445 outl(lnb_13v, dm_io_mem(DM1105_GPIOVAL)); 460 dm_writel(DM1105_GPIOVAL, lnb_13v);
446 else 461 else
447 outl(lnb_off, dm_io_mem(DM1105_GPIOVAL)); 462 dm_writel(DM1105_GPIOVAL, lnb_off);
448 463
449 return 0; 464 return 0;
450} 465}
451 466
452static void dm1105dvb_set_dma_addr(struct dm1105dvb *dm1105dvb) 467static void dm1105_set_dma_addr(struct dm1105_dev *dev)
453{ 468{
454 outl(cpu_to_le32(dm1105dvb->dma_addr), dm_io_mem(DM1105_STADR)); 469 dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
455} 470}
456 471
457static int __devinit dm1105dvb_dma_map(struct dm1105dvb *dm1105dvb) 472static int __devinit dm1105_dma_map(struct dm1105_dev *dev)
458{ 473{
459 dm1105dvb->ts_buf = pci_alloc_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, &dm1105dvb->dma_addr); 474 dev->ts_buf = pci_alloc_consistent(dev->pdev,
475 6 * DM1105_DMA_BYTES,
476 &dev->dma_addr);
460 477
461 return !dm1105dvb->ts_buf; 478 return !dev->ts_buf;
462} 479}
463 480
464static void dm1105dvb_dma_unmap(struct dm1105dvb *dm1105dvb) 481static void dm1105_dma_unmap(struct dm1105_dev *dev)
465{ 482{
466 pci_free_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, dm1105dvb->ts_buf, dm1105dvb->dma_addr); 483 pci_free_consistent(dev->pdev,
484 6 * DM1105_DMA_BYTES,
485 dev->ts_buf,
486 dev->dma_addr);
467} 487}
468 488
469static void dm1105dvb_enable_irqs(struct dm1105dvb *dm1105dvb) 489static void dm1105_enable_irqs(struct dm1105_dev *dev)
470{ 490{
471 outb(INTMAK_ALLMASK, dm_io_mem(DM1105_INTMAK)); 491 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
472 outb(1, dm_io_mem(DM1105_CR)); 492 dm_writeb(DM1105_CR, 1);
473} 493}
474 494
475static void dm1105dvb_disable_irqs(struct dm1105dvb *dm1105dvb) 495static void dm1105_disable_irqs(struct dm1105_dev *dev)
476{ 496{
477 outb(INTMAK_IRM, dm_io_mem(DM1105_INTMAK)); 497 dm_writeb(DM1105_INTMAK, INTMAK_IRM);
478 outb(0, dm_io_mem(DM1105_CR)); 498 dm_writeb(DM1105_CR, 0);
479} 499}
480 500
481static int dm1105dvb_start_feed(struct dvb_demux_feed *f) 501static int dm1105_start_feed(struct dvb_demux_feed *f)
482{ 502{
483 struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f); 503 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
484 504
485 if (dm1105dvb->full_ts_users++ == 0) 505 if (dev->full_ts_users++ == 0)
486 dm1105dvb_enable_irqs(dm1105dvb); 506 dm1105_enable_irqs(dev);
487 507
488 return 0; 508 return 0;
489} 509}
490 510
491static int dm1105dvb_stop_feed(struct dvb_demux_feed *f) 511static int dm1105_stop_feed(struct dvb_demux_feed *f)
492{ 512{
493 struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f); 513 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
494 514
495 if (--dm1105dvb->full_ts_users == 0) 515 if (--dev->full_ts_users == 0)
496 dm1105dvb_disable_irqs(dm1105dvb); 516 dm1105_disable_irqs(dev);
497 517
498 return 0; 518 return 0;
499} 519}
@@ -517,68 +537,64 @@ static void dm1105_emit_key(struct work_struct *work)
517/* work handler */ 537/* work handler */
518static void dm1105_dmx_buffer(struct work_struct *work) 538static void dm1105_dmx_buffer(struct work_struct *work)
519{ 539{
520 struct dm1105dvb *dm1105dvb = 540 struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
521 container_of(work, struct dm1105dvb, work);
522 unsigned int nbpackets; 541 unsigned int nbpackets;
523 u32 oldwrp = dm1105dvb->wrp; 542 u32 oldwrp = dev->wrp;
524 u32 nextwrp = dm1105dvb->nextwrp; 543 u32 nextwrp = dev->nextwrp;
525 544
526 if (!((dm1105dvb->ts_buf[oldwrp] == 0x47) && 545 if (!((dev->ts_buf[oldwrp] == 0x47) &&
527 (dm1105dvb->ts_buf[oldwrp + 188] == 0x47) && 546 (dev->ts_buf[oldwrp + 188] == 0x47) &&
528 (dm1105dvb->ts_buf[oldwrp + 188 * 2] == 0x47))) { 547 (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
529 dm1105dvb->PacketErrorCount++; 548 dev->PacketErrorCount++;
530 /* bad packet found */ 549 /* bad packet found */
531 if ((dm1105dvb->PacketErrorCount >= 2) && 550 if ((dev->PacketErrorCount >= 2) &&
532 (dm1105dvb->dmarst == 0)) { 551 (dev->dmarst == 0)) {
533 outb(1, dm_io_mem(DM1105_RST)); 552 dm_writeb(DM1105_RST, 1);
534 dm1105dvb->wrp = 0; 553 dev->wrp = 0;
535 dm1105dvb->PacketErrorCount = 0; 554 dev->PacketErrorCount = 0;
536 dm1105dvb->dmarst = 0; 555 dev->dmarst = 0;
537 return; 556 return;
538 } 557 }
539 } 558 }
540 559
541 if (nextwrp < oldwrp) { 560 if (nextwrp < oldwrp) {
542 memcpy(dm1105dvb->ts_buf + dm1105dvb->buffer_size, 561 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
543 dm1105dvb->ts_buf, nextwrp); 562 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
544 nbpackets = ((dm1105dvb->buffer_size - oldwrp) + nextwrp) / 188;
545 } else 563 } else
546 nbpackets = (nextwrp - oldwrp) / 188; 564 nbpackets = (nextwrp - oldwrp) / 188;
547 565
548 dm1105dvb->wrp = nextwrp; 566 dev->wrp = nextwrp;
549 dvb_dmx_swfilter_packets(&dm1105dvb->demux, 567 dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
550 &dm1105dvb->ts_buf[oldwrp], nbpackets);
551} 568}
552 569
553static irqreturn_t dm1105dvb_irq(int irq, void *dev_id) 570static irqreturn_t dm1105_irq(int irq, void *dev_id)
554{ 571{
555 struct dm1105dvb *dm1105dvb = dev_id; 572 struct dm1105_dev *dev = dev_id;
556 573
557 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */ 574 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
558 unsigned int intsts = inb(dm_io_mem(DM1105_INTSTS)); 575 unsigned int intsts = dm_readb(DM1105_INTSTS);
559 outb(intsts, dm_io_mem(DM1105_INTSTS)); 576 dm_writeb(DM1105_INTSTS, intsts);
560 577
561 switch (intsts) { 578 switch (intsts) {
562 case INTSTS_TSIRQ: 579 case INTSTS_TSIRQ:
563 case (INTSTS_TSIRQ | INTSTS_IR): 580 case (INTSTS_TSIRQ | INTSTS_IR):
564 dm1105dvb->nextwrp = inl(dm_io_mem(DM1105_WRP)) - 581 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
565 inl(dm_io_mem(DM1105_STADR)); 582 queue_work(dev->wq, &dev->work);
566 queue_work(dm1105dvb->wq, &dm1105dvb->work);
567 break; 583 break;
568 case INTSTS_IR: 584 case INTSTS_IR:
569 dm1105dvb->ir.ir_command = inl(dm_io_mem(DM1105_IRCODE)); 585 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
570 schedule_work(&dm1105dvb->ir.work); 586 schedule_work(&dev->ir.work);
571 break; 587 break;
572 } 588 }
573 589
574 return IRQ_HANDLED; 590 return IRQ_HANDLED;
575} 591}
576 592
577int __devinit dm1105_ir_init(struct dm1105dvb *dm1105) 593int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
578{ 594{
579 struct input_dev *input_dev; 595 struct input_dev *input_dev;
580 struct ir_scancode_table *ir_codes = &ir_codes_dm1105_nec_table; 596 struct ir_scancode_table *ir_codes = &ir_codes_dm1105_nec_table;
581 int ir_type = IR_TYPE_OTHER; 597 u64 ir_type = IR_TYPE_OTHER;
582 int err = -ENOMEM; 598 int err = -ENOMEM;
583 599
584 input_dev = input_allocate_device(); 600 input_dev = input_allocate_device();
@@ -611,51 +627,51 @@ int __devinit dm1105_ir_init(struct dm1105dvb *dm1105)
611 627
612 INIT_WORK(&dm1105->ir.work, dm1105_emit_key); 628 INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
613 629
614 err = ir_input_register(input_dev, ir_codes); 630 err = ir_input_register(input_dev, ir_codes, NULL);
615 631
616 return err; 632 return err;
617} 633}
618 634
619void __devexit dm1105_ir_exit(struct dm1105dvb *dm1105) 635void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
620{ 636{
621 ir_input_unregister(dm1105->ir.input_dev); 637 ir_input_unregister(dm1105->ir.input_dev);
622} 638}
623 639
624static int __devinit dm1105dvb_hw_init(struct dm1105dvb *dm1105dvb) 640static int __devinit dm1105_hw_init(struct dm1105_dev *dev)
625{ 641{
626 dm1105dvb_disable_irqs(dm1105dvb); 642 dm1105_disable_irqs(dev);
627 643
628 outb(0, dm_io_mem(DM1105_HOST_CTR)); 644 dm_writeb(DM1105_HOST_CTR, 0);
629 645
630 /*DATALEN 188,*/ 646 /*DATALEN 188,*/
631 outb(188, dm_io_mem(DM1105_DTALENTH)); 647 dm_writeb(DM1105_DTALENTH, 188);
632 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/ 648 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
633 outw(0xc10a, dm_io_mem(DM1105_TSCTR)); 649 dm_writew(DM1105_TSCTR, 0xc10a);
634 650
635 /* map DMA and set address */ 651 /* map DMA and set address */
636 dm1105dvb_dma_map(dm1105dvb); 652 dm1105_dma_map(dev);
637 dm1105dvb_set_dma_addr(dm1105dvb); 653 dm1105_set_dma_addr(dev);
638 /* big buffer */ 654 /* big buffer */
639 outl(5*DM1105_DMA_BYTES, dm_io_mem(DM1105_RLEN)); 655 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
640 outb(47, dm_io_mem(DM1105_INTCNT)); 656 dm_writeb(DM1105_INTCNT, 47);
641 657
642 /* IR NEC mode enable */ 658 /* IR NEC mode enable */
643 outb((DM1105_IR_EN | DM1105_SYS_CHK), dm_io_mem(DM1105_IRCTR)); 659 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
644 outb(0, dm_io_mem(DM1105_IRMODE)); 660 dm_writeb(DM1105_IRMODE, 0);
645 outw(0, dm_io_mem(DM1105_SYSTEMCODE)); 661 dm_writew(DM1105_SYSTEMCODE, 0);
646 662
647 return 0; 663 return 0;
648} 664}
649 665
650static void dm1105dvb_hw_exit(struct dm1105dvb *dm1105dvb) 666static void dm1105_hw_exit(struct dm1105_dev *dev)
651{ 667{
652 dm1105dvb_disable_irqs(dm1105dvb); 668 dm1105_disable_irqs(dev);
653 669
654 /* IR disable */ 670 /* IR disable */
655 outb(0, dm_io_mem(DM1105_IRCTR)); 671 dm_writeb(DM1105_IRCTR, 0);
656 outb(INTMAK_NONEMASK, dm_io_mem(DM1105_INTMAK)); 672 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
657 673
658 dm1105dvb_dma_unmap(dm1105dvb); 674 dm1105_dma_unmap(dev);
659} 675}
660 676
661static struct stv0299_config sharp_z0194a_config = { 677static struct stv0299_config sharp_z0194a_config = {
@@ -685,70 +701,79 @@ static struct cx24116_config serit_sp2633_config = {
685 .demod_address = 0x55, 701 .demod_address = 0x55,
686}; 702};
687 703
688static int __devinit frontend_init(struct dm1105dvb *dm1105dvb) 704static struct ds3000_config dvbworld_ds3000_config = {
705 .demod_address = 0x68,
706};
707
708static int __devinit frontend_init(struct dm1105_dev *dev)
689{ 709{
690 int ret; 710 int ret;
691 711
692 switch (dm1105dvb->boardnr) { 712 switch (dev->boardnr) {
693 case DM1105_BOARD_DVBWORLD_2004: 713 case DM1105_BOARD_DVBWORLD_2004:
694 dm1105dvb->fe = dvb_attach( 714 dev->fe = dvb_attach(
695 cx24116_attach, &serit_sp2633_config, 715 cx24116_attach, &serit_sp2633_config,
696 &dm1105dvb->i2c_adap); 716 &dev->i2c_adap);
697 if (dm1105dvb->fe) 717 if (dev->fe) {
698 dm1105dvb->fe->ops.set_voltage = dm1105dvb_set_voltage; 718 dev->fe->ops.set_voltage = dm1105_set_voltage;
719 break;
720 }
721
722 dev->fe = dvb_attach(
723 ds3000_attach, &dvbworld_ds3000_config,
724 &dev->i2c_adap);
725 if (dev->fe)
726 dev->fe->ops.set_voltage = dm1105_set_voltage;
699 727
700 break; 728 break;
701 case DM1105_BOARD_DVBWORLD_2002: 729 case DM1105_BOARD_DVBWORLD_2002:
702 case DM1105_BOARD_AXESS_DM05: 730 case DM1105_BOARD_AXESS_DM05:
703 default: 731 default:
704 dm1105dvb->fe = dvb_attach( 732 dev->fe = dvb_attach(
705 stv0299_attach, &sharp_z0194a_config, 733 stv0299_attach, &sharp_z0194a_config,
706 &dm1105dvb->i2c_adap); 734 &dev->i2c_adap);
707 if (dm1105dvb->fe) { 735 if (dev->fe) {
708 dm1105dvb->fe->ops.set_voltage = 736 dev->fe->ops.set_voltage = dm1105_set_voltage;
709 dm1105dvb_set_voltage; 737 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
710 dvb_attach(dvb_pll_attach, dm1105dvb->fe, 0x60, 738 &dev->i2c_adap, DVB_PLL_OPERA1);
711 &dm1105dvb->i2c_adap, DVB_PLL_OPERA1);
712 break; 739 break;
713 } 740 }
714 741
715 dm1105dvb->fe = dvb_attach( 742 dev->fe = dvb_attach(
716 stv0288_attach, &earda_config, 743 stv0288_attach, &earda_config,
717 &dm1105dvb->i2c_adap); 744 &dev->i2c_adap);
718 if (dm1105dvb->fe) { 745 if (dev->fe) {
719 dm1105dvb->fe->ops.set_voltage = 746 dev->fe->ops.set_voltage = dm1105_set_voltage;
720 dm1105dvb_set_voltage; 747 dvb_attach(stb6000_attach, dev->fe, 0x61,
721 dvb_attach(stb6000_attach, dm1105dvb->fe, 0x61, 748 &dev->i2c_adap);
722 &dm1105dvb->i2c_adap);
723 break; 749 break;
724 } 750 }
725 751
726 dm1105dvb->fe = dvb_attach( 752 dev->fe = dvb_attach(
727 si21xx_attach, &serit_config, 753 si21xx_attach, &serit_config,
728 &dm1105dvb->i2c_adap); 754 &dev->i2c_adap);
729 if (dm1105dvb->fe) 755 if (dev->fe)
730 dm1105dvb->fe->ops.set_voltage = 756 dev->fe->ops.set_voltage = dm1105_set_voltage;
731 dm1105dvb_set_voltage;
732 757
733 } 758 }
734 759
735 if (!dm1105dvb->fe) { 760 if (!dev->fe) {
736 dev_err(&dm1105dvb->pdev->dev, "could not attach frontend\n"); 761 dev_err(&dev->pdev->dev, "could not attach frontend\n");
737 return -ENODEV; 762 return -ENODEV;
738 } 763 }
739 764
740 ret = dvb_register_frontend(&dm1105dvb->dvb_adapter, dm1105dvb->fe); 765 ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
741 if (ret < 0) { 766 if (ret < 0) {
742 if (dm1105dvb->fe->ops.release) 767 if (dev->fe->ops.release)
743 dm1105dvb->fe->ops.release(dm1105dvb->fe); 768 dev->fe->ops.release(dev->fe);
744 dm1105dvb->fe = NULL; 769 dev->fe = NULL;
745 return ret; 770 return ret;
746 } 771 }
747 772
748 return 0; 773 return 0;
749} 774}
750 775
751static void __devinit dm1105dvb_read_mac(struct dm1105dvb *dm1105dvb, u8 *mac) 776static void __devinit dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
752{ 777{
753 static u8 command[1] = { 0x28 }; 778 static u8 command[1] = { 0x28 };
754 779
@@ -766,47 +791,47 @@ static void __devinit dm1105dvb_read_mac(struct dm1105dvb *dm1105dvb, u8 *mac)
766 }, 791 },
767 }; 792 };
768 793
769 dm1105_i2c_xfer(&dm1105dvb->i2c_adap, msg , 2); 794 dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
770 dev_info(&dm1105dvb->pdev->dev, "MAC %pM\n", mac); 795 dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
771} 796}
772 797
773static int __devinit dm1105_probe(struct pci_dev *pdev, 798static int __devinit dm1105_probe(struct pci_dev *pdev,
774 const struct pci_device_id *ent) 799 const struct pci_device_id *ent)
775{ 800{
776 struct dm1105dvb *dm1105dvb; 801 struct dm1105_dev *dev;
777 struct dvb_adapter *dvb_adapter; 802 struct dvb_adapter *dvb_adapter;
778 struct dvb_demux *dvbdemux; 803 struct dvb_demux *dvbdemux;
779 struct dmx_demux *dmx; 804 struct dmx_demux *dmx;
780 int ret = -ENOMEM; 805 int ret = -ENOMEM;
781 int i; 806 int i;
782 807
783 dm1105dvb = kzalloc(sizeof(struct dm1105dvb), GFP_KERNEL); 808 dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
784 if (!dm1105dvb) 809 if (!dev)
785 return -ENOMEM; 810 return -ENOMEM;
786 811
787 /* board config */ 812 /* board config */
788 dm1105dvb->nr = dm1105_devcount; 813 dev->nr = dm1105_devcount;
789 dm1105dvb->boardnr = UNSET; 814 dev->boardnr = UNSET;
790 if (card[dm1105dvb->nr] < ARRAY_SIZE(dm1105_boards)) 815 if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
791 dm1105dvb->boardnr = card[dm1105dvb->nr]; 816 dev->boardnr = card[dev->nr];
792 for (i = 0; UNSET == dm1105dvb->boardnr && 817 for (i = 0; UNSET == dev->boardnr &&
793 i < ARRAY_SIZE(dm1105_subids); i++) 818 i < ARRAY_SIZE(dm1105_subids); i++)
794 if (pdev->subsystem_vendor == 819 if (pdev->subsystem_vendor ==
795 dm1105_subids[i].subvendor && 820 dm1105_subids[i].subvendor &&
796 pdev->subsystem_device == 821 pdev->subsystem_device ==
797 dm1105_subids[i].subdevice) 822 dm1105_subids[i].subdevice)
798 dm1105dvb->boardnr = dm1105_subids[i].card; 823 dev->boardnr = dm1105_subids[i].card;
799 824
800 if (UNSET == dm1105dvb->boardnr) { 825 if (UNSET == dev->boardnr) {
801 dm1105dvb->boardnr = DM1105_BOARD_UNKNOWN; 826 dev->boardnr = DM1105_BOARD_UNKNOWN;
802 dm1105_card_list(pdev); 827 dm1105_card_list(pdev);
803 } 828 }
804 829
805 dm1105_devcount++; 830 dm1105_devcount++;
806 dm1105dvb->pdev = pdev; 831 dev->pdev = pdev;
807 dm1105dvb->buffer_size = 5 * DM1105_DMA_BYTES; 832 dev->buffer_size = 5 * DM1105_DMA_BYTES;
808 dm1105dvb->PacketErrorCount = 0; 833 dev->PacketErrorCount = 0;
809 dm1105dvb->dmarst = 0; 834 dev->dmarst = 0;
810 835
811 ret = pci_enable_device(pdev); 836 ret = pci_enable_device(pdev);
812 if (ret < 0) 837 if (ret < 0)
@@ -822,47 +847,47 @@ static int __devinit dm1105_probe(struct pci_dev *pdev,
822 if (ret < 0) 847 if (ret < 0)
823 goto err_pci_disable_device; 848 goto err_pci_disable_device;
824 849
825 dm1105dvb->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0)); 850 dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
826 if (!dm1105dvb->io_mem) { 851 if (!dev->io_mem) {
827 ret = -EIO; 852 ret = -EIO;
828 goto err_pci_release_regions; 853 goto err_pci_release_regions;
829 } 854 }
830 855
831 spin_lock_init(&dm1105dvb->lock); 856 spin_lock_init(&dev->lock);
832 pci_set_drvdata(pdev, dm1105dvb); 857 pci_set_drvdata(pdev, dev);
833 858
834 ret = dm1105dvb_hw_init(dm1105dvb); 859 ret = dm1105_hw_init(dev);
835 if (ret < 0) 860 if (ret < 0)
836 goto err_pci_iounmap; 861 goto err_pci_iounmap;
837 862
838 /* i2c */ 863 /* i2c */
839 i2c_set_adapdata(&dm1105dvb->i2c_adap, dm1105dvb); 864 i2c_set_adapdata(&dev->i2c_adap, dev);
840 strcpy(dm1105dvb->i2c_adap.name, DRIVER_NAME); 865 strcpy(dev->i2c_adap.name, DRIVER_NAME);
841 dm1105dvb->i2c_adap.owner = THIS_MODULE; 866 dev->i2c_adap.owner = THIS_MODULE;
842 dm1105dvb->i2c_adap.class = I2C_CLASS_TV_DIGITAL; 867 dev->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
843 dm1105dvb->i2c_adap.dev.parent = &pdev->dev; 868 dev->i2c_adap.dev.parent = &pdev->dev;
844 dm1105dvb->i2c_adap.algo = &dm1105_algo; 869 dev->i2c_adap.algo = &dm1105_algo;
845 dm1105dvb->i2c_adap.algo_data = dm1105dvb; 870 dev->i2c_adap.algo_data = dev;
846 ret = i2c_add_adapter(&dm1105dvb->i2c_adap); 871 ret = i2c_add_adapter(&dev->i2c_adap);
847 872
848 if (ret < 0) 873 if (ret < 0)
849 goto err_dm1105dvb_hw_exit; 874 goto err_dm1105_hw_exit;
850 875
851 /* dvb */ 876 /* dvb */
852 ret = dvb_register_adapter(&dm1105dvb->dvb_adapter, DRIVER_NAME, 877 ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
853 THIS_MODULE, &pdev->dev, adapter_nr); 878 THIS_MODULE, &pdev->dev, adapter_nr);
854 if (ret < 0) 879 if (ret < 0)
855 goto err_i2c_del_adapter; 880 goto err_i2c_del_adapter;
856 881
857 dvb_adapter = &dm1105dvb->dvb_adapter; 882 dvb_adapter = &dev->dvb_adapter;
858 883
859 dm1105dvb_read_mac(dm1105dvb, dvb_adapter->proposed_mac); 884 dm1105_read_mac(dev, dvb_adapter->proposed_mac);
860 885
861 dvbdemux = &dm1105dvb->demux; 886 dvbdemux = &dev->demux;
862 dvbdemux->filternum = 256; 887 dvbdemux->filternum = 256;
863 dvbdemux->feednum = 256; 888 dvbdemux->feednum = 256;
864 dvbdemux->start_feed = dm1105dvb_start_feed; 889 dvbdemux->start_feed = dm1105_start_feed;
865 dvbdemux->stop_feed = dm1105dvb_stop_feed; 890 dvbdemux->stop_feed = dm1105_stop_feed;
866 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | 891 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
867 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); 892 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
868 ret = dvb_dmx_init(dvbdemux); 893 ret = dvb_dmx_init(dvbdemux);
@@ -870,113 +895,113 @@ static int __devinit dm1105_probe(struct pci_dev *pdev,
870 goto err_dvb_unregister_adapter; 895 goto err_dvb_unregister_adapter;
871 896
872 dmx = &dvbdemux->dmx; 897 dmx = &dvbdemux->dmx;
873 dm1105dvb->dmxdev.filternum = 256; 898 dev->dmxdev.filternum = 256;
874 dm1105dvb->dmxdev.demux = dmx; 899 dev->dmxdev.demux = dmx;
875 dm1105dvb->dmxdev.capabilities = 0; 900 dev->dmxdev.capabilities = 0;
876 901
877 ret = dvb_dmxdev_init(&dm1105dvb->dmxdev, dvb_adapter); 902 ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
878 if (ret < 0) 903 if (ret < 0)
879 goto err_dvb_dmx_release; 904 goto err_dvb_dmx_release;
880 905
881 dm1105dvb->hw_frontend.source = DMX_FRONTEND_0; 906 dev->hw_frontend.source = DMX_FRONTEND_0;
882 907
883 ret = dmx->add_frontend(dmx, &dm1105dvb->hw_frontend); 908 ret = dmx->add_frontend(dmx, &dev->hw_frontend);
884 if (ret < 0) 909 if (ret < 0)
885 goto err_dvb_dmxdev_release; 910 goto err_dvb_dmxdev_release;
886 911
887 dm1105dvb->mem_frontend.source = DMX_MEMORY_FE; 912 dev->mem_frontend.source = DMX_MEMORY_FE;
888 913
889 ret = dmx->add_frontend(dmx, &dm1105dvb->mem_frontend); 914 ret = dmx->add_frontend(dmx, &dev->mem_frontend);
890 if (ret < 0) 915 if (ret < 0)
891 goto err_remove_hw_frontend; 916 goto err_remove_hw_frontend;
892 917
893 ret = dmx->connect_frontend(dmx, &dm1105dvb->hw_frontend); 918 ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
894 if (ret < 0) 919 if (ret < 0)
895 goto err_remove_mem_frontend; 920 goto err_remove_mem_frontend;
896 921
897 ret = frontend_init(dm1105dvb); 922 ret = frontend_init(dev);
898 if (ret < 0) 923 if (ret < 0)
899 goto err_disconnect_frontend; 924 goto err_disconnect_frontend;
900 925
901 dvb_net_init(dvb_adapter, &dm1105dvb->dvbnet, dmx); 926 dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
902 dm1105_ir_init(dm1105dvb); 927 dm1105_ir_init(dev);
903 928
904 INIT_WORK(&dm1105dvb->work, dm1105_dmx_buffer); 929 INIT_WORK(&dev->work, dm1105_dmx_buffer);
905 sprintf(dm1105dvb->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num); 930 sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
906 dm1105dvb->wq = create_singlethread_workqueue(dm1105dvb->wqn); 931 dev->wq = create_singlethread_workqueue(dev->wqn);
907 if (!dm1105dvb->wq) 932 if (!dev->wq)
908 goto err_dvb_net; 933 goto err_dvb_net;
909 934
910 ret = request_irq(pdev->irq, dm1105dvb_irq, IRQF_SHARED, 935 ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
911 DRIVER_NAME, dm1105dvb); 936 DRIVER_NAME, dev);
912 if (ret < 0) 937 if (ret < 0)
913 goto err_workqueue; 938 goto err_workqueue;
914 939
915 return 0; 940 return 0;
916 941
917err_workqueue: 942err_workqueue:
918 destroy_workqueue(dm1105dvb->wq); 943 destroy_workqueue(dev->wq);
919err_dvb_net: 944err_dvb_net:
920 dvb_net_release(&dm1105dvb->dvbnet); 945 dvb_net_release(&dev->dvbnet);
921err_disconnect_frontend: 946err_disconnect_frontend:
922 dmx->disconnect_frontend(dmx); 947 dmx->disconnect_frontend(dmx);
923err_remove_mem_frontend: 948err_remove_mem_frontend:
924 dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend); 949 dmx->remove_frontend(dmx, &dev->mem_frontend);
925err_remove_hw_frontend: 950err_remove_hw_frontend:
926 dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend); 951 dmx->remove_frontend(dmx, &dev->hw_frontend);
927err_dvb_dmxdev_release: 952err_dvb_dmxdev_release:
928 dvb_dmxdev_release(&dm1105dvb->dmxdev); 953 dvb_dmxdev_release(&dev->dmxdev);
929err_dvb_dmx_release: 954err_dvb_dmx_release:
930 dvb_dmx_release(dvbdemux); 955 dvb_dmx_release(dvbdemux);
931err_dvb_unregister_adapter: 956err_dvb_unregister_adapter:
932 dvb_unregister_adapter(dvb_adapter); 957 dvb_unregister_adapter(dvb_adapter);
933err_i2c_del_adapter: 958err_i2c_del_adapter:
934 i2c_del_adapter(&dm1105dvb->i2c_adap); 959 i2c_del_adapter(&dev->i2c_adap);
935err_dm1105dvb_hw_exit: 960err_dm1105_hw_exit:
936 dm1105dvb_hw_exit(dm1105dvb); 961 dm1105_hw_exit(dev);
937err_pci_iounmap: 962err_pci_iounmap:
938 pci_iounmap(pdev, dm1105dvb->io_mem); 963 pci_iounmap(pdev, dev->io_mem);
939err_pci_release_regions: 964err_pci_release_regions:
940 pci_release_regions(pdev); 965 pci_release_regions(pdev);
941err_pci_disable_device: 966err_pci_disable_device:
942 pci_disable_device(pdev); 967 pci_disable_device(pdev);
943err_kfree: 968err_kfree:
944 pci_set_drvdata(pdev, NULL); 969 pci_set_drvdata(pdev, NULL);
945 kfree(dm1105dvb); 970 kfree(dev);
946 return ret; 971 return ret;
947} 972}
948 973
949static void __devexit dm1105_remove(struct pci_dev *pdev) 974static void __devexit dm1105_remove(struct pci_dev *pdev)
950{ 975{
951 struct dm1105dvb *dm1105dvb = pci_get_drvdata(pdev); 976 struct dm1105_dev *dev = pci_get_drvdata(pdev);
952 struct dvb_adapter *dvb_adapter = &dm1105dvb->dvb_adapter; 977 struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
953 struct dvb_demux *dvbdemux = &dm1105dvb->demux; 978 struct dvb_demux *dvbdemux = &dev->demux;
954 struct dmx_demux *dmx = &dvbdemux->dmx; 979 struct dmx_demux *dmx = &dvbdemux->dmx;
955 980
956 dm1105_ir_exit(dm1105dvb); 981 dm1105_ir_exit(dev);
957 dmx->close(dmx); 982 dmx->close(dmx);
958 dvb_net_release(&dm1105dvb->dvbnet); 983 dvb_net_release(&dev->dvbnet);
959 if (dm1105dvb->fe) 984 if (dev->fe)
960 dvb_unregister_frontend(dm1105dvb->fe); 985 dvb_unregister_frontend(dev->fe);
961 986
962 dmx->disconnect_frontend(dmx); 987 dmx->disconnect_frontend(dmx);
963 dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend); 988 dmx->remove_frontend(dmx, &dev->mem_frontend);
964 dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend); 989 dmx->remove_frontend(dmx, &dev->hw_frontend);
965 dvb_dmxdev_release(&dm1105dvb->dmxdev); 990 dvb_dmxdev_release(&dev->dmxdev);
966 dvb_dmx_release(dvbdemux); 991 dvb_dmx_release(dvbdemux);
967 dvb_unregister_adapter(dvb_adapter); 992 dvb_unregister_adapter(dvb_adapter);
968 if (&dm1105dvb->i2c_adap) 993 if (&dev->i2c_adap)
969 i2c_del_adapter(&dm1105dvb->i2c_adap); 994 i2c_del_adapter(&dev->i2c_adap);
970 995
971 dm1105dvb_hw_exit(dm1105dvb); 996 dm1105_hw_exit(dev);
972 synchronize_irq(pdev->irq); 997 synchronize_irq(pdev->irq);
973 free_irq(pdev->irq, dm1105dvb); 998 free_irq(pdev->irq, dev);
974 pci_iounmap(pdev, dm1105dvb->io_mem); 999 pci_iounmap(pdev, dev->io_mem);
975 pci_release_regions(pdev); 1000 pci_release_regions(pdev);
976 pci_disable_device(pdev); 1001 pci_disable_device(pdev);
977 pci_set_drvdata(pdev, NULL); 1002 pci_set_drvdata(pdev, NULL);
978 dm1105_devcount--; 1003 dm1105_devcount--;
979 kfree(dm1105dvb); 1004 kfree(dev);
980} 1005}
981 1006
982static struct pci_device_id dm1105_id_table[] __devinitdata = { 1007static struct pci_device_id dm1105_id_table[] __devinitdata = {
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.c b/drivers/media/dvb/dvb-core/dvb_frontend.c
index 07461222a7f5..55ea260572bf 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.c
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.c
@@ -1199,8 +1199,6 @@ static int dtv_property_process_get(struct dvb_frontend *fe,
1199{ 1199{
1200 int r = 0; 1200 int r = 0;
1201 1201
1202 dtv_property_dump(tvp);
1203
1204 /* Allow the frontend to validate incoming properties */ 1202 /* Allow the frontend to validate incoming properties */
1205 if (fe->ops.get_property) 1203 if (fe->ops.get_property)
1206 r = fe->ops.get_property(fe, tvp); 1204 r = fe->ops.get_property(fe, tvp);
@@ -1323,6 +1321,8 @@ static int dtv_property_process_get(struct dvb_frontend *fe,
1323 r = -1; 1321 r = -1;
1324 } 1322 }
1325 1323
1324 dtv_property_dump(tvp);
1325
1326 return r; 1326 return r;
1327} 1327}
1328 1328
@@ -1488,7 +1488,7 @@ static int dvb_frontend_ioctl(struct inode *inode, struct file *file,
1488 struct dvb_frontend_private *fepriv = fe->frontend_priv; 1488 struct dvb_frontend_private *fepriv = fe->frontend_priv;
1489 int err = -EOPNOTSUPP; 1489 int err = -EOPNOTSUPP;
1490 1490
1491 dprintk ("%s\n", __func__); 1491 dprintk("%s (%d)\n", __func__, _IOC_NR(cmd));
1492 1492
1493 if (fepriv->exit) 1493 if (fepriv->exit)
1494 return -ENODEV; 1494 return -ENODEV;
@@ -1536,8 +1536,7 @@ static int dvb_frontend_ioctl_properties(struct inode *inode, struct file *file,
1536 if ((tvps->num == 0) || (tvps->num > DTV_IOCTL_MAX_MSGS)) 1536 if ((tvps->num == 0) || (tvps->num > DTV_IOCTL_MAX_MSGS))
1537 return -EINVAL; 1537 return -EINVAL;
1538 1538
1539 tvp = (struct dtv_property *) kmalloc(tvps->num * 1539 tvp = kmalloc(tvps->num * sizeof(struct dtv_property), GFP_KERNEL);
1540 sizeof(struct dtv_property), GFP_KERNEL);
1541 if (!tvp) { 1540 if (!tvp) {
1542 err = -ENOMEM; 1541 err = -ENOMEM;
1543 goto out; 1542 goto out;
@@ -1569,8 +1568,7 @@ static int dvb_frontend_ioctl_properties(struct inode *inode, struct file *file,
1569 if ((tvps->num == 0) || (tvps->num > DTV_IOCTL_MAX_MSGS)) 1568 if ((tvps->num == 0) || (tvps->num > DTV_IOCTL_MAX_MSGS))
1570 return -EINVAL; 1569 return -EINVAL;
1571 1570
1572 tvp = (struct dtv_property *) kmalloc(tvps->num * 1571 tvp = kmalloc(tvps->num * sizeof(struct dtv_property), GFP_KERNEL);
1573 sizeof(struct dtv_property), GFP_KERNEL);
1574 if (!tvp) { 1572 if (!tvp) {
1575 err = -ENOMEM; 1573 err = -ENOMEM;
1576 goto out; 1574 goto out;
diff --git a/drivers/media/dvb/dvb-core/dvb_net.c b/drivers/media/dvb/dvb-core/dvb_net.c
index 8b8558fcb042..b11533f76195 100644
--- a/drivers/media/dvb/dvb-core/dvb_net.c
+++ b/drivers/media/dvb/dvb-core/dvb_net.c
@@ -504,6 +504,7 @@ static void dvb_net_ule( struct net_device *dev, const u8 *buf, size_t buf_len )
504 "bytes left in TS. Resyncing.\n", ts_remain); 504 "bytes left in TS. Resyncing.\n", ts_remain);
505 priv->ule_sndu_len = 0; 505 priv->ule_sndu_len = 0;
506 priv->need_pusi = 1; 506 priv->need_pusi = 1;
507 ts += TS_SZ;
507 continue; 508 continue;
508 } 509 }
509 510
diff --git a/drivers/media/dvb/dvb-core/dvb_ringbuffer.c b/drivers/media/dvb/dvb-core/dvb_ringbuffer.c
index 584bbd194dc8..a5712cd7c65f 100644
--- a/drivers/media/dvb/dvb-core/dvb_ringbuffer.c
+++ b/drivers/media/dvb/dvb-core/dvb_ringbuffer.c
@@ -89,6 +89,7 @@ void dvb_ringbuffer_flush(struct dvb_ringbuffer *rbuf)
89 rbuf->pread = rbuf->pwrite; 89 rbuf->pread = rbuf->pwrite;
90 rbuf->error = 0; 90 rbuf->error = 0;
91} 91}
92EXPORT_SYMBOL(dvb_ringbuffer_flush);
92 93
93void dvb_ringbuffer_reset(struct dvb_ringbuffer *rbuf) 94void dvb_ringbuffer_reset(struct dvb_ringbuffer *rbuf)
94{ 95{
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig
index 465295b1d14b..e5f91f16ffa4 100644
--- a/drivers/media/dvb/dvb-usb/Kconfig
+++ b/drivers/media/dvb/dvb-usb/Kconfig
@@ -336,3 +336,11 @@ config DVB_USB_EC168
336 select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE 336 select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE
337 help 337 help
338 Say Y here to support the E3C EC168 DVB-T USB2.0 receiver. 338 Say Y here to support the E3C EC168 DVB-T USB2.0 receiver.
339
340config DVB_USB_AZ6027
341 tristate "Azurewave DVB-S/S2 USB2.0 AZ6027 support"
342 depends on DVB_USB
343 select DVB_STB0899 if !DVB_FE_CUSTOMISE
344 select DVB_STB6100 if !DVB_FE_CUSTOMISE
345 help
346 Say Y here to support the AZ6027 device
diff --git a/drivers/media/dvb/dvb-usb/Makefile b/drivers/media/dvb/dvb-usb/Makefile
index 72c92cb69a22..1a192453b0e7 100644
--- a/drivers/media/dvb/dvb-usb/Makefile
+++ b/drivers/media/dvb/dvb-usb/Makefile
@@ -85,6 +85,9 @@ obj-$(CONFIG_DVB_USB_FRIIO) += dvb-usb-friio.o
85dvb-usb-ec168-objs = ec168.o 85dvb-usb-ec168-objs = ec168.o
86obj-$(CONFIG_DVB_USB_EC168) += dvb-usb-ec168.o 86obj-$(CONFIG_DVB_USB_EC168) += dvb-usb-ec168.o
87 87
88dvb-usb-az6027-objs = az6027.o
89obj-$(CONFIG_DVB_USB_AZ6027) += dvb-usb-az6027.o
90
88EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core/ -Idrivers/media/dvb/frontends/ 91EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core/ -Idrivers/media/dvb/frontends/
89# due to tuner-xc3028 92# due to tuner-xc3028
90EXTRA_CFLAGS += -Idrivers/media/common/tuners 93EXTRA_CFLAGS += -Idrivers/media/common/tuners
diff --git a/drivers/media/dvb/dvb-usb/af9015.c b/drivers/media/dvb/dvb-usb/af9015.c
index 8b60a601fb82..d7975383d31b 100644
--- a/drivers/media/dvb/dvb-usb/af9015.c
+++ b/drivers/media/dvb/dvb-usb/af9015.c
@@ -21,6 +21,8 @@
21 * 21 *
22 */ 22 */
23 23
24#include <linux/hash.h>
25
24#include "af9015.h" 26#include "af9015.h"
25#include "af9013.h" 27#include "af9013.h"
26#include "mt2060.h" 28#include "mt2060.h"
@@ -553,26 +555,45 @@ exit:
553 return ret; 555 return ret;
554} 556}
555 557
556/* dump eeprom */ 558/* hash (and dump) eeprom */
557static int af9015_eeprom_dump(struct dvb_usb_device *d) 559static int af9015_eeprom_hash(struct usb_device *udev)
558{ 560{
559 u8 reg, val; 561 static const unsigned int eeprom_size = 256;
562 unsigned int reg;
563 int ret;
564 u8 val, *eeprom;
565 struct req_t req = {READ_I2C, AF9015_I2C_EEPROM, 0, 0, 1, 1, &val};
560 566
561 for (reg = 0; ; reg++) { 567 eeprom = kmalloc(eeprom_size, GFP_KERNEL);
562 if (reg % 16 == 0) { 568 if (eeprom == NULL)
563 if (reg) 569 return -ENOMEM;
564 deb_info(KERN_CONT "\n"); 570
565 deb_info(KERN_DEBUG "%02x:", reg); 571 for (reg = 0; reg < eeprom_size; reg++) {
566 } 572 req.addr = reg;
567 if (af9015_read_reg_i2c(d, AF9015_I2C_EEPROM, reg, &val) == 0) 573 ret = af9015_rw_udev(udev, &req);
568 deb_info(KERN_CONT " %02x", val); 574 if (ret)
569 else 575 goto free;
570 deb_info(KERN_CONT " --"); 576 eeprom[reg] = val;
571 if (reg == 0xff)
572 break;
573 } 577 }
574 deb_info(KERN_CONT "\n"); 578
575 return 0; 579 if (dvb_usb_af9015_debug & 0x01)
580 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, eeprom,
581 eeprom_size);
582
583 BUG_ON(eeprom_size % 4);
584
585 af9015_config.eeprom_sum = 0;
586 for (reg = 0; reg < eeprom_size / sizeof(u32); reg++) {
587 af9015_config.eeprom_sum *= GOLDEN_RATIO_PRIME_32;
588 af9015_config.eeprom_sum += le32_to_cpu(((u32 *)eeprom)[reg]);
589 }
590
591 deb_info("%s: eeprom sum=%.8x\n", __func__, af9015_config.eeprom_sum);
592
593 ret = 0;
594free:
595 kfree(eeprom);
596 return ret;
576} 597}
577 598
578static int af9015_download_ir_table(struct dvb_usb_device *d) 599static int af9015_download_ir_table(struct dvb_usb_device *d)
@@ -711,12 +732,132 @@ error:
711 return ret; 732 return ret;
712} 733}
713 734
735struct af9015_setup {
736 unsigned int id;
737 struct dvb_usb_rc_key *rc_key_map;
738 unsigned int rc_key_map_size;
739 u8 *ir_table;
740 unsigned int ir_table_size;
741};
742
743static const struct af9015_setup *af9015_setup_match(unsigned int id,
744 const struct af9015_setup *table)
745{
746 for (; table->rc_key_map; table++)
747 if (table->id == id)
748 return table;
749 return NULL;
750}
751
752static const struct af9015_setup af9015_setup_modparam[] = {
753 { AF9015_REMOTE_A_LINK_DTU_M,
754 af9015_rc_keys_a_link, ARRAY_SIZE(af9015_rc_keys_a_link),
755 af9015_ir_table_a_link, ARRAY_SIZE(af9015_ir_table_a_link) },
756 { AF9015_REMOTE_MSI_DIGIVOX_MINI_II_V3,
757 af9015_rc_keys_msi, ARRAY_SIZE(af9015_rc_keys_msi),
758 af9015_ir_table_msi, ARRAY_SIZE(af9015_ir_table_msi) },
759 { AF9015_REMOTE_MYGICTV_U718,
760 af9015_rc_keys_mygictv, ARRAY_SIZE(af9015_rc_keys_mygictv),
761 af9015_ir_table_mygictv, ARRAY_SIZE(af9015_ir_table_mygictv) },
762 { AF9015_REMOTE_DIGITTRADE_DVB_T,
763 af9015_rc_keys_digittrade, ARRAY_SIZE(af9015_rc_keys_digittrade),
764 af9015_ir_table_digittrade, ARRAY_SIZE(af9015_ir_table_digittrade) },
765 { AF9015_REMOTE_AVERMEDIA_KS,
766 af9015_rc_keys_avermedia, ARRAY_SIZE(af9015_rc_keys_avermedia),
767 af9015_ir_table_avermedia_ks, ARRAY_SIZE(af9015_ir_table_avermedia_ks) },
768 { }
769};
770
771/* don't add new entries here anymore, use hashes instead */
772static const struct af9015_setup af9015_setup_usbids[] = {
773 { USB_VID_LEADTEK,
774 af9015_rc_keys_leadtek, ARRAY_SIZE(af9015_rc_keys_leadtek),
775 af9015_ir_table_leadtek, ARRAY_SIZE(af9015_ir_table_leadtek) },
776 { USB_VID_VISIONPLUS,
777 af9015_rc_keys_twinhan, ARRAY_SIZE(af9015_rc_keys_twinhan),
778 af9015_ir_table_twinhan, ARRAY_SIZE(af9015_ir_table_twinhan) },
779 { USB_VID_KWORLD_2, /* TODO: use correct rc keys */
780 af9015_rc_keys_twinhan, ARRAY_SIZE(af9015_rc_keys_twinhan),
781 af9015_ir_table_kworld, ARRAY_SIZE(af9015_ir_table_kworld) },
782 { USB_VID_AVERMEDIA,
783 af9015_rc_keys_avermedia, ARRAY_SIZE(af9015_rc_keys_avermedia),
784 af9015_ir_table_avermedia, ARRAY_SIZE(af9015_ir_table_avermedia) },
785 { USB_VID_MSI_2,
786 af9015_rc_keys_msi_digivox_iii, ARRAY_SIZE(af9015_rc_keys_msi_digivox_iii),
787 af9015_ir_table_msi_digivox_iii, ARRAY_SIZE(af9015_ir_table_msi_digivox_iii) },
788 { }
789};
790
791static const struct af9015_setup af9015_setup_hashes[] = {
792 { 0xb8feb708,
793 af9015_rc_keys_msi, ARRAY_SIZE(af9015_rc_keys_msi),
794 af9015_ir_table_msi, ARRAY_SIZE(af9015_ir_table_msi) },
795 { 0xa3703d00,
796 af9015_rc_keys_a_link, ARRAY_SIZE(af9015_rc_keys_a_link),
797 af9015_ir_table_a_link, ARRAY_SIZE(af9015_ir_table_a_link) },
798 { 0x9b7dc64e,
799 af9015_rc_keys_mygictv, ARRAY_SIZE(af9015_rc_keys_mygictv),
800 af9015_ir_table_mygictv, ARRAY_SIZE(af9015_ir_table_mygictv) },
801 { }
802};
803
804static void af9015_set_remote_config(struct usb_device *udev,
805 struct dvb_usb_device_properties *props)
806{
807 const struct af9015_setup *table = NULL;
808
809 if (dvb_usb_af9015_remote) {
810 /* load remote defined as module param */
811 table = af9015_setup_match(dvb_usb_af9015_remote,
812 af9015_setup_modparam);
813 } else {
814 u16 vendor = le16_to_cpu(udev->descriptor.idVendor);
815
816 table = af9015_setup_match(af9015_config.eeprom_sum,
817 af9015_setup_hashes);
818
819 if (!table && vendor == USB_VID_AFATECH) {
820 /* Check USB manufacturer and product strings and try
821 to determine correct remote in case of chip vendor
822 reference IDs are used.
823 DO NOT ADD ANYTHING NEW HERE. Use hashes instead.
824 */
825 char manufacturer[10];
826 memset(manufacturer, 0, sizeof(manufacturer));
827 usb_string(udev, udev->descriptor.iManufacturer,
828 manufacturer, sizeof(manufacturer));
829 if (!strcmp("MSI", manufacturer)) {
830 /* iManufacturer 1 MSI
831 iProduct 2 MSI K-VOX */
832 table = af9015_setup_match(
833 AF9015_REMOTE_MSI_DIGIVOX_MINI_II_V3,
834 af9015_setup_modparam);
835 } else if (udev->descriptor.idProduct ==
836 cpu_to_le16(USB_PID_TREKSTOR_DVBT)) {
837 table = &(const struct af9015_setup){ 0,
838 af9015_rc_keys_trekstor,
839 ARRAY_SIZE(af9015_rc_keys_trekstor),
840 af9015_ir_table_trekstor,
841 ARRAY_SIZE(af9015_ir_table_trekstor)
842 };
843 }
844 } else if (!table)
845 table = af9015_setup_match(vendor, af9015_setup_usbids);
846 }
847
848 if (table) {
849 props->rc_key_map = table->rc_key_map;
850 props->rc_key_map_size = table->rc_key_map_size;
851 af9015_config.ir_table = table->ir_table;
852 af9015_config.ir_table_size = table->ir_table_size;
853 }
854}
855
714static int af9015_read_config(struct usb_device *udev) 856static int af9015_read_config(struct usb_device *udev)
715{ 857{
716 int ret; 858 int ret;
717 u8 val, i, offset = 0; 859 u8 val, i, offset = 0;
718 struct req_t req = {READ_I2C, AF9015_I2C_EEPROM, 0, 0, 1, 1, &val}; 860 struct req_t req = {READ_I2C, AF9015_I2C_EEPROM, 0, 0, 1, 1, &val};
719 char manufacturer[10];
720 861
721 /* IR remote controller */ 862 /* IR remote controller */
722 req.addr = AF9015_EEPROM_IR_MODE; 863 req.addr = AF9015_EEPROM_IR_MODE;
@@ -728,158 +869,18 @@ static int af9015_read_config(struct usb_device *udev)
728 } 869 }
729 if (ret) 870 if (ret)
730 goto error; 871 goto error;
872
873 ret = af9015_eeprom_hash(udev);
874 if (ret)
875 goto error;
876
731 deb_info("%s: IR mode:%d\n", __func__, val); 877 deb_info("%s: IR mode:%d\n", __func__, val);
732 for (i = 0; i < af9015_properties_count; i++) { 878 for (i = 0; i < af9015_properties_count; i++) {
733 if (val == AF9015_IR_MODE_DISABLED) { 879 if (val == AF9015_IR_MODE_DISABLED) {
734 af9015_properties[i].rc_key_map = NULL; 880 af9015_properties[i].rc_key_map = NULL;
735 af9015_properties[i].rc_key_map_size = 0; 881 af9015_properties[i].rc_key_map_size = 0;
736 } else if (dvb_usb_af9015_remote) { 882 } else
737 /* load remote defined as module param */ 883 af9015_set_remote_config(udev, &af9015_properties[i]);
738 switch (dvb_usb_af9015_remote) {
739 case AF9015_REMOTE_A_LINK_DTU_M:
740 af9015_properties[i].rc_key_map =
741 af9015_rc_keys_a_link;
742 af9015_properties[i].rc_key_map_size =
743 ARRAY_SIZE(af9015_rc_keys_a_link);
744 af9015_config.ir_table = af9015_ir_table_a_link;
745 af9015_config.ir_table_size =
746 ARRAY_SIZE(af9015_ir_table_a_link);
747 break;
748 case AF9015_REMOTE_MSI_DIGIVOX_MINI_II_V3:
749 af9015_properties[i].rc_key_map =
750 af9015_rc_keys_msi;
751 af9015_properties[i].rc_key_map_size =
752 ARRAY_SIZE(af9015_rc_keys_msi);
753 af9015_config.ir_table = af9015_ir_table_msi;
754 af9015_config.ir_table_size =
755 ARRAY_SIZE(af9015_ir_table_msi);
756 break;
757 case AF9015_REMOTE_MYGICTV_U718:
758 af9015_properties[i].rc_key_map =
759 af9015_rc_keys_mygictv;
760 af9015_properties[i].rc_key_map_size =
761 ARRAY_SIZE(af9015_rc_keys_mygictv);
762 af9015_config.ir_table =
763 af9015_ir_table_mygictv;
764 af9015_config.ir_table_size =
765 ARRAY_SIZE(af9015_ir_table_mygictv);
766 break;
767 case AF9015_REMOTE_DIGITTRADE_DVB_T:
768 af9015_properties[i].rc_key_map =
769 af9015_rc_keys_digittrade;
770 af9015_properties[i].rc_key_map_size =
771 ARRAY_SIZE(af9015_rc_keys_digittrade);
772 af9015_config.ir_table =
773 af9015_ir_table_digittrade;
774 af9015_config.ir_table_size =
775 ARRAY_SIZE(af9015_ir_table_digittrade);
776 break;
777 case AF9015_REMOTE_AVERMEDIA_KS:
778 af9015_properties[i].rc_key_map =
779 af9015_rc_keys_avermedia;
780 af9015_properties[i].rc_key_map_size =
781 ARRAY_SIZE(af9015_rc_keys_avermedia);
782 af9015_config.ir_table =
783 af9015_ir_table_avermedia_ks;
784 af9015_config.ir_table_size =
785 ARRAY_SIZE(af9015_ir_table_avermedia_ks);
786 break;
787 }
788 } else {
789 switch (le16_to_cpu(udev->descriptor.idVendor)) {
790 case USB_VID_LEADTEK:
791 af9015_properties[i].rc_key_map =
792 af9015_rc_keys_leadtek;
793 af9015_properties[i].rc_key_map_size =
794 ARRAY_SIZE(af9015_rc_keys_leadtek);
795 af9015_config.ir_table =
796 af9015_ir_table_leadtek;
797 af9015_config.ir_table_size =
798 ARRAY_SIZE(af9015_ir_table_leadtek);
799 break;
800 case USB_VID_VISIONPLUS:
801 af9015_properties[i].rc_key_map =
802 af9015_rc_keys_twinhan;
803 af9015_properties[i].rc_key_map_size =
804 ARRAY_SIZE(af9015_rc_keys_twinhan);
805 af9015_config.ir_table =
806 af9015_ir_table_twinhan;
807 af9015_config.ir_table_size =
808 ARRAY_SIZE(af9015_ir_table_twinhan);
809 break;
810 case USB_VID_KWORLD_2:
811 /* TODO: use correct rc keys */
812 af9015_properties[i].rc_key_map =
813 af9015_rc_keys_twinhan;
814 af9015_properties[i].rc_key_map_size =
815 ARRAY_SIZE(af9015_rc_keys_twinhan);
816 af9015_config.ir_table = af9015_ir_table_kworld;
817 af9015_config.ir_table_size =
818 ARRAY_SIZE(af9015_ir_table_kworld);
819 break;
820 /* Check USB manufacturer and product strings and try
821 to determine correct remote in case of chip vendor
822 reference IDs are used. */
823 case USB_VID_AFATECH:
824 memset(manufacturer, 0, sizeof(manufacturer));
825 usb_string(udev, udev->descriptor.iManufacturer,
826 manufacturer, sizeof(manufacturer));
827 if (!strcmp("Geniatech", manufacturer)) {
828 /* iManufacturer 1 Geniatech
829 iProduct 2 AF9015 */
830 af9015_properties[i].rc_key_map =
831 af9015_rc_keys_mygictv;
832 af9015_properties[i].rc_key_map_size =
833 ARRAY_SIZE(af9015_rc_keys_mygictv);
834 af9015_config.ir_table =
835 af9015_ir_table_mygictv;
836 af9015_config.ir_table_size =
837 ARRAY_SIZE(af9015_ir_table_mygictv);
838 } else if (!strcmp("MSI", manufacturer)) {
839 /* iManufacturer 1 MSI
840 iProduct 2 MSI K-VOX */
841 af9015_properties[i].rc_key_map =
842 af9015_rc_keys_msi;
843 af9015_properties[i].rc_key_map_size =
844 ARRAY_SIZE(af9015_rc_keys_msi);
845 af9015_config.ir_table =
846 af9015_ir_table_msi;
847 af9015_config.ir_table_size =
848 ARRAY_SIZE(af9015_ir_table_msi);
849 } else if (udev->descriptor.idProduct ==
850 cpu_to_le16(USB_PID_TREKSTOR_DVBT)) {
851 af9015_properties[i].rc_key_map =
852 af9015_rc_keys_trekstor;
853 af9015_properties[i].rc_key_map_size =
854 ARRAY_SIZE(af9015_rc_keys_trekstor);
855 af9015_config.ir_table =
856 af9015_ir_table_trekstor;
857 af9015_config.ir_table_size =
858 ARRAY_SIZE(af9015_ir_table_trekstor);
859 }
860 break;
861 case USB_VID_AVERMEDIA:
862 af9015_properties[i].rc_key_map =
863 af9015_rc_keys_avermedia;
864 af9015_properties[i].rc_key_map_size =
865 ARRAY_SIZE(af9015_rc_keys_avermedia);
866 af9015_config.ir_table =
867 af9015_ir_table_avermedia;
868 af9015_config.ir_table_size =
869 ARRAY_SIZE(af9015_ir_table_avermedia);
870 break;
871 case USB_VID_MSI_2:
872 af9015_properties[i].rc_key_map =
873 af9015_rc_keys_msi_digivox_iii;
874 af9015_properties[i].rc_key_map_size =
875 ARRAY_SIZE(af9015_rc_keys_msi_digivox_iii);
876 af9015_config.ir_table =
877 af9015_ir_table_msi_digivox_iii;
878 af9015_config.ir_table_size =
879 ARRAY_SIZE(af9015_ir_table_msi_digivox_iii);
880 break;
881 }
882 }
883 } 884 }
884 885
885 /* TS mode - one or two receivers */ 886 /* TS mode - one or two receivers */
@@ -1001,6 +1002,9 @@ static int af9015_read_config(struct usb_device *udev)
1001 af9015_af9013_config[i].gpio[1] = AF9013_GPIO_LO; 1002 af9015_af9013_config[i].gpio[1] = AF9013_GPIO_LO;
1002 af9015_af9013_config[i].rf_spec_inv = 1; 1003 af9015_af9013_config[i].rf_spec_inv = 1;
1003 break; 1004 break;
1005 case AF9013_TUNER_TDA18218:
1006 warn("tuner NXP TDA18218 not supported yet");
1007 return -ENODEV;
1004 default: 1008 default:
1005 warn("tuner id:%d not supported, please report!", val); 1009 warn("tuner id:%d not supported, please report!", val);
1006 return -ENODEV; 1010 return -ENODEV;
@@ -1125,11 +1129,6 @@ static int af9015_af9013_frontend_attach(struct dvb_usb_adapter *adap)
1125 1129
1126 deb_info("%s: init I2C\n", __func__); 1130 deb_info("%s: init I2C\n", __func__);
1127 ret = af9015_i2c_init(adap->dev); 1131 ret = af9015_i2c_init(adap->dev);
1128
1129 /* dump eeprom (debug) */
1130 ret = af9015_eeprom_dump(adap->dev);
1131 if (ret)
1132 return ret;
1133 } else { 1132 } else {
1134 /* select I2C adapter */ 1133 /* select I2C adapter */
1135 i2c_adap = &state->i2c_adap; 1134 i2c_adap = &state->i2c_adap;
@@ -1295,6 +1294,8 @@ static struct usb_device_id af9015_usb_table[] = {
1295/* 25 */{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_399U_2)}, 1294/* 25 */{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_399U_2)},
1296 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_PC160_T)}, 1295 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_PC160_T)},
1297 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV20)}, 1296 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV20)},
1297 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_TINYTWIN_2)},
1298 {USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV2000DS)},
1298 {0}, 1299 {0},
1299}; 1300};
1300MODULE_DEVICE_TABLE(usb, af9015_usb_table); 1301MODULE_DEVICE_TABLE(usb, af9015_usb_table);
@@ -1381,7 +1382,8 @@ static struct dvb_usb_device_properties af9015_properties[] = {
1381 }, 1382 },
1382 { 1383 {
1383 .name = "DigitalNow TinyTwin DVB-T Receiver", 1384 .name = "DigitalNow TinyTwin DVB-T Receiver",
1384 .cold_ids = {&af9015_usb_table[5], NULL}, 1385 .cold_ids = {&af9015_usb_table[5],
1386 &af9015_usb_table[28], NULL},
1385 .warm_ids = {NULL}, 1387 .warm_ids = {NULL},
1386 }, 1388 },
1387 { 1389 {
@@ -1566,7 +1568,7 @@ static struct dvb_usb_device_properties af9015_properties[] = {
1566 1568
1567 .i2c_algo = &af9015_i2c_algo, 1569 .i2c_algo = &af9015_i2c_algo,
1568 1570
1569 .num_device_descs = 6, /* max 9 */ 1571 .num_device_descs = 7, /* max 9 */
1570 .devices = { 1572 .devices = {
1571 { 1573 {
1572 .name = "AverMedia AVerTV Volar GPS 805 (A805)", 1574 .name = "AverMedia AVerTV Volar GPS 805 (A805)",
@@ -1600,6 +1602,11 @@ static struct dvb_usb_device_properties af9015_properties[] = {
1600 .cold_ids = {&af9015_usb_table[27], NULL}, 1602 .cold_ids = {&af9015_usb_table[27], NULL},
1601 .warm_ids = {NULL}, 1603 .warm_ids = {NULL},
1602 }, 1604 },
1605 {
1606 .name = "Leadtek WinFast DTV2000DS",
1607 .cold_ids = {&af9015_usb_table[29], NULL},
1608 .warm_ids = {NULL},
1609 },
1603 } 1610 }
1604 }, 1611 },
1605}; 1612};
diff --git a/drivers/media/dvb/dvb-usb/af9015.h b/drivers/media/dvb/dvb-usb/af9015.h
index 931c8515830d..ef36b1831490 100644
--- a/drivers/media/dvb/dvb-usb/af9015.h
+++ b/drivers/media/dvb/dvb-usb/af9015.h
@@ -107,6 +107,7 @@ struct af9015_config {
107 u16 mt2060_if1[2]; 107 u16 mt2060_if1[2];
108 u16 firmware_size; 108 u16 firmware_size;
109 u16 firmware_checksum; 109 u16 firmware_checksum;
110 u32 eeprom_sum;
110 u8 *ir_table; 111 u8 *ir_table;
111 u16 ir_table_size; 112 u16 ir_table_size;
112}; 113};
diff --git a/drivers/media/dvb/dvb-usb/az6027.c b/drivers/media/dvb/dvb-usb/az6027.c
new file mode 100644
index 000000000000..d7290b2c0913
--- /dev/null
+++ b/drivers/media/dvb/dvb-usb/az6027.c
@@ -0,0 +1,1151 @@
1/* DVB USB compliant Linux driver for the AZUREWAVE DVB-S/S2 USB2.0 (AZ6027)
2 * receiver.
3 *
4 * Copyright (C) 2009 Adams.Xu <adams.xu@azwave.com.cn>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation, version 2.
9 *
10 * see Documentation/dvb/README.dvb-usb for more information
11 */
12#include "az6027.h"
13
14#include "stb0899_drv.h"
15#include "stb0899_reg.h"
16#include "stb0899_cfg.h"
17
18#include "stb6100.h"
19#include "stb6100_cfg.h"
20#include "dvb_ca_en50221.h"
21
22int dvb_usb_az6027_debug;
23module_param_named(debug, dvb_usb_az6027_debug, int, 0644);
24MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,rc=4 (or-able))." DVB_USB_DEBUG_STATUS);
25
26DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
27
28struct az6027_device_state {
29 struct dvb_ca_en50221 ca;
30 struct mutex ca_mutex;
31 u8 power_state;
32};
33
34static const struct stb0899_s1_reg az6027_stb0899_s1_init_1[] = {
35
36 /* 0x0000000b, SYSREG */
37 { STB0899_DEV_ID , 0x30 },
38 { STB0899_DISCNTRL1 , 0x32 },
39 { STB0899_DISCNTRL2 , 0x80 },
40 { STB0899_DISRX_ST0 , 0x04 },
41 { STB0899_DISRX_ST1 , 0x00 },
42 { STB0899_DISPARITY , 0x00 },
43 { STB0899_DISFIFO , 0x00 },
44 { STB0899_DISSTATUS , 0x20 },
45 { STB0899_DISF22 , 0x99 },
46 { STB0899_DISF22RX , 0xa8 },
47 /* SYSREG ? */
48 { STB0899_ACRPRESC , 0x11 },
49 { STB0899_ACRDIV1 , 0x0a },
50 { STB0899_ACRDIV2 , 0x05 },
51 { STB0899_DACR1 , 0x00 },
52 { STB0899_DACR2 , 0x00 },
53 { STB0899_OUTCFG , 0x00 },
54 { STB0899_MODECFG , 0x00 },
55 { STB0899_IRQSTATUS_3 , 0xfe },
56 { STB0899_IRQSTATUS_2 , 0x03 },
57 { STB0899_IRQSTATUS_1 , 0x7c },
58 { STB0899_IRQSTATUS_0 , 0xf4 },
59 { STB0899_IRQMSK_3 , 0xf3 },
60 { STB0899_IRQMSK_2 , 0xfc },
61 { STB0899_IRQMSK_1 , 0xff },
62 { STB0899_IRQMSK_0 , 0xff },
63 { STB0899_IRQCFG , 0x00 },
64 { STB0899_I2CCFG , 0x88 },
65 { STB0899_I2CRPT , 0x58 },
66 { STB0899_IOPVALUE5 , 0x00 },
67 { STB0899_IOPVALUE4 , 0x33 },
68 { STB0899_IOPVALUE3 , 0x6d },
69 { STB0899_IOPVALUE2 , 0x90 },
70 { STB0899_IOPVALUE1 , 0x60 },
71 { STB0899_IOPVALUE0 , 0x00 },
72 { STB0899_GPIO00CFG , 0x82 },
73 { STB0899_GPIO01CFG , 0x82 },
74 { STB0899_GPIO02CFG , 0x82 },
75 { STB0899_GPIO03CFG , 0x82 },
76 { STB0899_GPIO04CFG , 0x82 },
77 { STB0899_GPIO05CFG , 0x82 },
78 { STB0899_GPIO06CFG , 0x82 },
79 { STB0899_GPIO07CFG , 0x82 },
80 { STB0899_GPIO08CFG , 0x82 },
81 { STB0899_GPIO09CFG , 0x82 },
82 { STB0899_GPIO10CFG , 0x82 },
83 { STB0899_GPIO11CFG , 0x82 },
84 { STB0899_GPIO12CFG , 0x82 },
85 { STB0899_GPIO13CFG , 0x82 },
86 { STB0899_GPIO14CFG , 0x82 },
87 { STB0899_GPIO15CFG , 0x82 },
88 { STB0899_GPIO16CFG , 0x82 },
89 { STB0899_GPIO17CFG , 0x82 },
90 { STB0899_GPIO18CFG , 0x82 },
91 { STB0899_GPIO19CFG , 0x82 },
92 { STB0899_GPIO20CFG , 0x82 },
93 { STB0899_SDATCFG , 0xb8 },
94 { STB0899_SCLTCFG , 0xba },
95 { STB0899_AGCRFCFG , 0x1c }, /* 0x11 */
96 { STB0899_GPIO22 , 0x82 }, /* AGCBB2CFG */
97 { STB0899_GPIO21 , 0x91 }, /* AGCBB1CFG */
98 { STB0899_DIRCLKCFG , 0x82 },
99 { STB0899_CLKOUT27CFG , 0x7e },
100 { STB0899_STDBYCFG , 0x82 },
101 { STB0899_CS0CFG , 0x82 },
102 { STB0899_CS1CFG , 0x82 },
103 { STB0899_DISEQCOCFG , 0x20 },
104 { STB0899_GPIO32CFG , 0x82 },
105 { STB0899_GPIO33CFG , 0x82 },
106 { STB0899_GPIO34CFG , 0x82 },
107 { STB0899_GPIO35CFG , 0x82 },
108 { STB0899_GPIO36CFG , 0x82 },
109 { STB0899_GPIO37CFG , 0x82 },
110 { STB0899_GPIO38CFG , 0x82 },
111 { STB0899_GPIO39CFG , 0x82 },
112 { STB0899_NCOARSE , 0x17 }, /* 0x15 = 27 Mhz Clock, F/3 = 198MHz, F/6 = 99MHz */
113 { STB0899_SYNTCTRL , 0x02 }, /* 0x00 = CLK from CLKI, 0x02 = CLK from XTALI */
114 { STB0899_FILTCTRL , 0x00 },
115 { STB0899_SYSCTRL , 0x01 },
116 { STB0899_STOPCLK1 , 0x20 },
117 { STB0899_STOPCLK2 , 0x00 },
118 { STB0899_INTBUFSTATUS , 0x00 },
119 { STB0899_INTBUFCTRL , 0x0a },
120 { 0xffff , 0xff },
121};
122
123static const struct stb0899_s1_reg az6027_stb0899_s1_init_3[] = {
124 { STB0899_DEMOD , 0x00 },
125 { STB0899_RCOMPC , 0xc9 },
126 { STB0899_AGC1CN , 0x01 },
127 { STB0899_AGC1REF , 0x10 },
128 { STB0899_RTC , 0x23 },
129 { STB0899_TMGCFG , 0x4e },
130 { STB0899_AGC2REF , 0x34 },
131 { STB0899_TLSR , 0x84 },
132 { STB0899_CFD , 0xf7 },
133 { STB0899_ACLC , 0x87 },
134 { STB0899_BCLC , 0x94 },
135 { STB0899_EQON , 0x41 },
136 { STB0899_LDT , 0xf1 },
137 { STB0899_LDT2 , 0xe3 },
138 { STB0899_EQUALREF , 0xb4 },
139 { STB0899_TMGRAMP , 0x10 },
140 { STB0899_TMGTHD , 0x30 },
141 { STB0899_IDCCOMP , 0xfd },
142 { STB0899_QDCCOMP , 0xff },
143 { STB0899_POWERI , 0x0c },
144 { STB0899_POWERQ , 0x0f },
145 { STB0899_RCOMP , 0x6c },
146 { STB0899_AGCIQIN , 0x80 },
147 { STB0899_AGC2I1 , 0x06 },
148 { STB0899_AGC2I2 , 0x00 },
149 { STB0899_TLIR , 0x30 },
150 { STB0899_RTF , 0x7f },
151 { STB0899_DSTATUS , 0x00 },
152 { STB0899_LDI , 0xbc },
153 { STB0899_CFRM , 0xea },
154 { STB0899_CFRL , 0x31 },
155 { STB0899_NIRM , 0x2b },
156 { STB0899_NIRL , 0x80 },
157 { STB0899_ISYMB , 0x1d },
158 { STB0899_QSYMB , 0xa6 },
159 { STB0899_SFRH , 0x2f },
160 { STB0899_SFRM , 0x68 },
161 { STB0899_SFRL , 0x40 },
162 { STB0899_SFRUPH , 0x2f },
163 { STB0899_SFRUPM , 0x68 },
164 { STB0899_SFRUPL , 0x40 },
165 { STB0899_EQUAI1 , 0x02 },
166 { STB0899_EQUAQ1 , 0xff },
167 { STB0899_EQUAI2 , 0x04 },
168 { STB0899_EQUAQ2 , 0x05 },
169 { STB0899_EQUAI3 , 0x02 },
170 { STB0899_EQUAQ3 , 0xfd },
171 { STB0899_EQUAI4 , 0x03 },
172 { STB0899_EQUAQ4 , 0x07 },
173 { STB0899_EQUAI5 , 0x08 },
174 { STB0899_EQUAQ5 , 0xf5 },
175 { STB0899_DSTATUS2 , 0x00 },
176 { STB0899_VSTATUS , 0x00 },
177 { STB0899_VERROR , 0x86 },
178 { STB0899_IQSWAP , 0x2a },
179 { STB0899_ECNT1M , 0x00 },
180 { STB0899_ECNT1L , 0x00 },
181 { STB0899_ECNT2M , 0x00 },
182 { STB0899_ECNT2L , 0x00 },
183 { STB0899_ECNT3M , 0x0a },
184 { STB0899_ECNT3L , 0xad },
185 { STB0899_FECAUTO1 , 0x06 },
186 { STB0899_FECM , 0x01 },
187 { STB0899_VTH12 , 0xb0 },
188 { STB0899_VTH23 , 0x7a },
189 { STB0899_VTH34 , 0x58 },
190 { STB0899_VTH56 , 0x38 },
191 { STB0899_VTH67 , 0x34 },
192 { STB0899_VTH78 , 0x24 },
193 { STB0899_PRVIT , 0xff },
194 { STB0899_VITSYNC , 0x19 },
195 { STB0899_RSULC , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
196 { STB0899_TSULC , 0x42 },
197 { STB0899_RSLLC , 0x41 },
198 { STB0899_TSLPL , 0x12 },
199 { STB0899_TSCFGH , 0x0c },
200 { STB0899_TSCFGM , 0x00 },
201 { STB0899_TSCFGL , 0x00 },
202 { STB0899_TSOUT , 0x69 }, /* 0x0d for CAM */
203 { STB0899_RSSYNCDEL , 0x00 },
204 { STB0899_TSINHDELH , 0x02 },
205 { STB0899_TSINHDELM , 0x00 },
206 { STB0899_TSINHDELL , 0x00 },
207 { STB0899_TSLLSTKM , 0x1b },
208 { STB0899_TSLLSTKL , 0xb3 },
209 { STB0899_TSULSTKM , 0x00 },
210 { STB0899_TSULSTKL , 0x00 },
211 { STB0899_PCKLENUL , 0xbc },
212 { STB0899_PCKLENLL , 0xcc },
213 { STB0899_RSPCKLEN , 0xbd },
214 { STB0899_TSSTATUS , 0x90 },
215 { STB0899_ERRCTRL1 , 0xb6 },
216 { STB0899_ERRCTRL2 , 0x95 },
217 { STB0899_ERRCTRL3 , 0x8d },
218 { STB0899_DMONMSK1 , 0x27 },
219 { STB0899_DMONMSK0 , 0x03 },
220 { STB0899_DEMAPVIT , 0x5c },
221 { STB0899_PLPARM , 0x19 },
222 { STB0899_PDELCTRL , 0x48 },
223 { STB0899_PDELCTRL2 , 0x00 },
224 { STB0899_BBHCTRL1 , 0x00 },
225 { STB0899_BBHCTRL2 , 0x00 },
226 { STB0899_HYSTTHRESH , 0x77 },
227 { STB0899_MATCSTM , 0x00 },
228 { STB0899_MATCSTL , 0x00 },
229 { STB0899_UPLCSTM , 0x00 },
230 { STB0899_UPLCSTL , 0x00 },
231 { STB0899_DFLCSTM , 0x00 },
232 { STB0899_DFLCSTL , 0x00 },
233 { STB0899_SYNCCST , 0x00 },
234 { STB0899_SYNCDCSTM , 0x00 },
235 { STB0899_SYNCDCSTL , 0x00 },
236 { STB0899_ISI_ENTRY , 0x00 },
237 { STB0899_ISI_BIT_EN , 0x00 },
238 { STB0899_MATSTRM , 0xf0 },
239 { STB0899_MATSTRL , 0x02 },
240 { STB0899_UPLSTRM , 0x45 },
241 { STB0899_UPLSTRL , 0x60 },
242 { STB0899_DFLSTRM , 0xe3 },
243 { STB0899_DFLSTRL , 0x00 },
244 { STB0899_SYNCSTR , 0x47 },
245 { STB0899_SYNCDSTRM , 0x05 },
246 { STB0899_SYNCDSTRL , 0x18 },
247 { STB0899_CFGPDELSTATUS1 , 0x19 },
248 { STB0899_CFGPDELSTATUS2 , 0x2b },
249 { STB0899_BBFERRORM , 0x00 },
250 { STB0899_BBFERRORL , 0x01 },
251 { STB0899_UPKTERRORM , 0x00 },
252 { STB0899_UPKTERRORL , 0x00 },
253 { 0xffff , 0xff },
254};
255
256
257
258struct stb0899_config az6027_stb0899_config = {
259 .init_dev = az6027_stb0899_s1_init_1,
260 .init_s2_demod = stb0899_s2_init_2,
261 .init_s1_demod = az6027_stb0899_s1_init_3,
262 .init_s2_fec = stb0899_s2_init_4,
263 .init_tst = stb0899_s1_init_5,
264
265 .demod_address = 0xd0, /* 0x68, 0xd0 >> 1 */
266
267 .xtal_freq = 27000000,
268 .inversion = IQ_SWAP_ON, /* 1 */
269
270 .lo_clk = 76500000,
271 .hi_clk = 99000000,
272
273 .esno_ave = STB0899_DVBS2_ESNO_AVE,
274 .esno_quant = STB0899_DVBS2_ESNO_QUANT,
275 .avframes_coarse = STB0899_DVBS2_AVFRAMES_COARSE,
276 .avframes_fine = STB0899_DVBS2_AVFRAMES_FINE,
277 .miss_threshold = STB0899_DVBS2_MISS_THRESHOLD,
278 .uwp_threshold_acq = STB0899_DVBS2_UWP_THRESHOLD_ACQ,
279 .uwp_threshold_track = STB0899_DVBS2_UWP_THRESHOLD_TRACK,
280 .uwp_threshold_sof = STB0899_DVBS2_UWP_THRESHOLD_SOF,
281 .sof_search_timeout = STB0899_DVBS2_SOF_SEARCH_TIMEOUT,
282
283 .btr_nco_bits = STB0899_DVBS2_BTR_NCO_BITS,
284 .btr_gain_shift_offset = STB0899_DVBS2_BTR_GAIN_SHIFT_OFFSET,
285 .crl_nco_bits = STB0899_DVBS2_CRL_NCO_BITS,
286 .ldpc_max_iter = STB0899_DVBS2_LDPC_MAX_ITER,
287
288 .tuner_get_frequency = stb6100_get_frequency,
289 .tuner_set_frequency = stb6100_set_frequency,
290 .tuner_set_bandwidth = stb6100_set_bandwidth,
291 .tuner_get_bandwidth = stb6100_get_bandwidth,
292 .tuner_set_rfsiggain = NULL,
293};
294
295struct stb6100_config az6027_stb6100_config = {
296 .tuner_address = 0xc0,
297 .refclock = 27000000,
298};
299
300
301/* check for mutex FIXME */
302int az6027_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8 *b, int blen)
303{
304 int ret = -1;
305 if (mutex_lock_interruptible(&d->usb_mutex))
306 return -EAGAIN;
307
308 ret = usb_control_msg(d->udev,
309 usb_rcvctrlpipe(d->udev, 0),
310 req,
311 USB_TYPE_VENDOR | USB_DIR_IN,
312 value,
313 index,
314 b,
315 blen,
316 2000);
317
318 if (ret < 0) {
319 warn("usb in operation failed. (%d)", ret);
320 ret = -EIO;
321 } else
322 ret = 0;
323
324 deb_xfer("in: req. %02x, val: %04x, ind: %04x, buffer: ", req, value, index);
325 debug_dump(b, blen, deb_xfer);
326
327 mutex_unlock(&d->usb_mutex);
328 return ret;
329}
330
331static int az6027_usb_out_op(struct dvb_usb_device *d,
332 u8 req,
333 u16 value,
334 u16 index,
335 u8 *b,
336 int blen)
337{
338 int ret;
339
340 deb_xfer("out: req. %02x, val: %04x, ind: %04x, buffer: ", req, value, index);
341 debug_dump(b, blen, deb_xfer);
342
343 if (mutex_lock_interruptible(&d->usb_mutex))
344 return -EAGAIN;
345
346 ret = usb_control_msg(d->udev,
347 usb_sndctrlpipe(d->udev, 0),
348 req,
349 USB_TYPE_VENDOR | USB_DIR_OUT,
350 value,
351 index,
352 b,
353 blen,
354 2000);
355
356 if (ret != blen) {
357 warn("usb out operation failed. (%d)", ret);
358 mutex_unlock(&d->usb_mutex);
359 return -EIO;
360 } else{
361 mutex_unlock(&d->usb_mutex);
362 return 0;
363 }
364}
365
366static int az6027_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
367{
368 int ret;
369 u8 req;
370 u16 value;
371 u16 index;
372 int blen;
373
374 deb_info("%s %d", __func__, onoff);
375
376 req = 0xBC;
377 value = onoff;
378 index = 0;
379 blen = 0;
380
381 ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
382 if (ret != 0)
383 warn("usb out operation failed. (%d)", ret);
384
385 return ret;
386}
387
388/* keys for the enclosed remote control */
389static struct dvb_usb_rc_key az6027_rc_keys[] = {
390 { 0x01, KEY_1 },
391 { 0x02, KEY_2 },
392};
393
394/* remote control stuff (does not work with my box) */
395static int az6027_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
396{
397 return 0;
398}
399
400/*
401int az6027_power_ctrl(struct dvb_usb_device *d, int onoff)
402{
403 u8 v = onoff;
404 return az6027_usb_out_op(d,0xBC,v,3,NULL,1);
405}
406*/
407
408static int az6027_ci_read_attribute_mem(struct dvb_ca_en50221 *ca,
409 int slot,
410 int address)
411{
412 struct dvb_usb_device *d = (struct dvb_usb_device *)ca->data;
413 struct az6027_device_state *state = (struct az6027_device_state *)d->priv;
414
415 int ret;
416 u8 req;
417 u16 value;
418 u16 index;
419 int blen;
420 u8 b[12];
421
422 if (slot != 0)
423 return -EINVAL;
424
425 mutex_lock(&state->ca_mutex);
426
427 req = 0xC1;
428 value = address;
429 index = 0;
430 blen = 1;
431
432 ret = az6027_usb_in_op(d, req, value, index, b, blen);
433 if (ret < 0) {
434 warn("usb in operation failed. (%d)", ret);
435 ret = -EINVAL;
436 } else {
437 ret = b[0];
438 }
439
440 mutex_unlock(&state->ca_mutex);
441 return ret;
442}
443
444static int az6027_ci_write_attribute_mem(struct dvb_ca_en50221 *ca,
445 int slot,
446 int address,
447 u8 value)
448{
449 struct dvb_usb_device *d = (struct dvb_usb_device *)ca->data;
450 struct az6027_device_state *state = (struct az6027_device_state *)d->priv;
451
452 int ret;
453 u8 req;
454 u16 value1;
455 u16 index;
456 int blen;
457
458 deb_info("%s %d", __func__, slot);
459 if (slot != 0)
460 return -EINVAL;
461
462 mutex_lock(&state->ca_mutex);
463 req = 0xC2;
464 value1 = address;
465 index = value;
466 blen = 0;
467
468 ret = az6027_usb_out_op(d, req, value1, index, NULL, blen);
469 if (ret != 0)
470 warn("usb out operation failed. (%d)", ret);
471
472 mutex_unlock(&state->ca_mutex);
473 return ret;
474}
475
476static int az6027_ci_read_cam_control(struct dvb_ca_en50221 *ca,
477 int slot,
478 u8 address)
479{
480 struct dvb_usb_device *d = (struct dvb_usb_device *)ca->data;
481 struct az6027_device_state *state = (struct az6027_device_state *)d->priv;
482
483 int ret;
484 u8 req;
485 u16 value;
486 u16 index;
487 int blen;
488 u8 b[12];
489
490 if (slot != 0)
491 return -EINVAL;
492
493 mutex_lock(&state->ca_mutex);
494
495 req = 0xC3;
496 value = address;
497 index = 0;
498 blen = 2;
499
500 ret = az6027_usb_in_op(d, req, value, index, b, blen);
501 if (ret < 0) {
502 warn("usb in operation failed. (%d)", ret);
503 ret = -EINVAL;
504 } else {
505 if (b[0] == 0)
506 warn("Read CI IO error");
507
508 ret = b[1];
509 deb_info("read cam data = %x from 0x%x", b[1], value);
510 }
511
512 mutex_unlock(&state->ca_mutex);
513 return ret;
514}
515
516static int az6027_ci_write_cam_control(struct dvb_ca_en50221 *ca,
517 int slot,
518 u8 address,
519 u8 value)
520{
521 struct dvb_usb_device *d = (struct dvb_usb_device *)ca->data;
522 struct az6027_device_state *state = (struct az6027_device_state *)d->priv;
523
524 int ret;
525 u8 req;
526 u16 value1;
527 u16 index;
528 int blen;
529
530 if (slot != 0)
531 return -EINVAL;
532
533 mutex_lock(&state->ca_mutex);
534 req = 0xC4;
535 value1 = address;
536 index = value;
537 blen = 0;
538
539 ret = az6027_usb_out_op(d, req, value1, index, NULL, blen);
540 if (ret != 0) {
541 warn("usb out operation failed. (%d)", ret);
542 goto failed;
543 }
544
545failed:
546 mutex_unlock(&state->ca_mutex);
547 return ret;
548}
549
550static int CI_CamReady(struct dvb_ca_en50221 *ca, int slot)
551{
552 struct dvb_usb_device *d = (struct dvb_usb_device *)ca->data;
553
554 int ret;
555 u8 req;
556 u16 value;
557 u16 index;
558 int blen;
559 u8 b[12];
560
561 req = 0xC8;
562 value = 0;
563 index = 0;
564 blen = 1;
565
566 ret = az6027_usb_in_op(d, req, value, index, b, blen);
567 if (ret < 0) {
568 warn("usb in operation failed. (%d)", ret);
569 ret = -EIO;
570 } else{
571 ret = b[0];
572 }
573 return ret;
574}
575
576static int az6027_ci_slot_reset(struct dvb_ca_en50221 *ca, int slot)
577{
578 struct dvb_usb_device *d = (struct dvb_usb_device *)ca->data;
579 struct az6027_device_state *state = (struct az6027_device_state *)d->priv;
580
581 int ret, i;
582 u8 req;
583 u16 value;
584 u16 index;
585 int blen;
586
587 mutex_lock(&state->ca_mutex);
588
589 req = 0xC6;
590 value = 1;
591 index = 0;
592 blen = 0;
593
594 ret = az6027_usb_out_op(d, req, value, index, NULL, blen);
595 if (ret != 0) {
596 warn("usb out operation failed. (%d)", ret);
597 goto failed;
598 }
599
600 msleep(500);
601 req = 0xC6;
602 value = 0;
603 index = 0;
604 blen = 0;
605
606 ret = az6027_usb_out_op(d, req, value, index, NULL, blen);
607 if (ret != 0) {
608 warn("usb out operation failed. (%d)", ret);
609 goto failed;
610 }
611
612 for (i = 0; i < 15; i++) {
613 msleep(100);
614
615 if (CI_CamReady(ca, slot)) {
616 deb_info("CAM Ready");
617 break;
618 }
619 }
620 msleep(5000);
621
622failed:
623 mutex_unlock(&state->ca_mutex);
624 return ret;
625}
626
627static int az6027_ci_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
628{
629 return 0;
630}
631
632static int az6027_ci_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
633{
634 struct dvb_usb_device *d = (struct dvb_usb_device *)ca->data;
635 struct az6027_device_state *state = (struct az6027_device_state *)d->priv;
636
637 int ret;
638 u8 req;
639 u16 value;
640 u16 index;
641 int blen;
642
643 deb_info("%s", __func__);
644 mutex_lock(&state->ca_mutex);
645 req = 0xC7;
646 value = 1;
647 index = 0;
648 blen = 0;
649
650 ret = az6027_usb_out_op(d, req, value, index, NULL, blen);
651 if (ret != 0) {
652 warn("usb out operation failed. (%d)", ret);
653 goto failed;
654 }
655
656failed:
657 mutex_unlock(&state->ca_mutex);
658 return ret;
659}
660
661static int az6027_ci_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
662{
663 struct dvb_usb_device *d = (struct dvb_usb_device *)ca->data;
664 struct az6027_device_state *state = (struct az6027_device_state *)d->priv;
665 int ret;
666 u8 req;
667 u16 value;
668 u16 index;
669 int blen;
670 u8 b[12];
671
672 mutex_lock(&state->ca_mutex);
673
674 req = 0xC5;
675 value = 0;
676 index = 0;
677 blen = 1;
678
679 ret = az6027_usb_in_op(d, req, value, index, b, blen);
680 if (ret < 0) {
681 warn("usb in operation failed. (%d)", ret);
682 ret = -EIO;
683 } else
684 ret = 0;
685
686 if (b[0] == 0) {
687 ret = 0;
688
689 } else if (b[0] == 1) {
690 ret = DVB_CA_EN50221_POLL_CAM_PRESENT |
691 DVB_CA_EN50221_POLL_CAM_READY;
692 }
693
694 mutex_unlock(&state->ca_mutex);
695 return ret;
696}
697
698
699static void az6027_ci_uninit(struct dvb_usb_device *d)
700{
701 struct az6027_device_state *state;
702
703 deb_info("%s", __func__);
704
705 if (NULL == d)
706 return;
707
708 state = (struct az6027_device_state *)d->priv;
709 if (NULL == state)
710 return;
711
712 if (NULL == state->ca.data)
713 return;
714
715 dvb_ca_en50221_release(&state->ca);
716
717 memset(&state->ca, 0, sizeof(state->ca));
718}
719
720
721static int az6027_ci_init(struct dvb_usb_adapter *a)
722{
723 struct dvb_usb_device *d = a->dev;
724 struct az6027_device_state *state = (struct az6027_device_state *)d->priv;
725 int ret;
726
727 deb_info("%s", __func__);
728
729 mutex_init(&state->ca_mutex);
730
731 state->ca.owner = THIS_MODULE;
732 state->ca.read_attribute_mem = az6027_ci_read_attribute_mem;
733 state->ca.write_attribute_mem = az6027_ci_write_attribute_mem;
734 state->ca.read_cam_control = az6027_ci_read_cam_control;
735 state->ca.write_cam_control = az6027_ci_write_cam_control;
736 state->ca.slot_reset = az6027_ci_slot_reset;
737 state->ca.slot_shutdown = az6027_ci_slot_shutdown;
738 state->ca.slot_ts_enable = az6027_ci_slot_ts_enable;
739 state->ca.poll_slot_status = az6027_ci_poll_slot_status;
740 state->ca.data = d;
741
742 ret = dvb_ca_en50221_init(&a->dvb_adap,
743 &state->ca,
744 0, /* flags */
745 1);/* n_slots */
746 if (ret != 0) {
747 err("Cannot initialize CI: Error %d.", ret);
748 memset(&state->ca, 0, sizeof(state->ca));
749 return ret;
750 }
751
752 deb_info("CI initialized.");
753
754 return 0;
755}
756
757/*
758static int az6027_read_mac_addr(struct dvb_usb_device *d, u8 mac[6])
759{
760 az6027_usb_in_op(d, 0xb7, 6, 0, &mac[0], 6);
761 return 0;
762}
763*/
764
765static int az6027_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
766{
767
768 u8 buf;
769 int ret;
770 struct dvb_usb_adapter *adap = fe->dvb->priv;
771
772 struct i2c_msg i2c_msg = {
773 .addr = 0x99,
774 .flags = 0,
775 .buf = &buf,
776 .len = 1
777 };
778
779 /*
780 * 2 --18v
781 * 1 --13v
782 * 0 --off
783 */
784 switch (voltage) {
785 case SEC_VOLTAGE_13:
786 buf = 1;
787 ret = i2c_transfer(&adap->dev->i2c_adap, &i2c_msg, 1);
788 break;
789
790 case SEC_VOLTAGE_18:
791 buf = 2;
792 ret = i2c_transfer(&adap->dev->i2c_adap, &i2c_msg, 1);
793 break;
794
795 case SEC_VOLTAGE_OFF:
796 buf = 0;
797 ret = i2c_transfer(&adap->dev->i2c_adap, &i2c_msg, 1);
798 break;
799
800 default:
801 return -EINVAL;
802 }
803 return 0;
804}
805
806
807static int az6027_frontend_poweron(struct dvb_usb_adapter *adap)
808{
809 int ret;
810 u8 req;
811 u16 value;
812 u16 index;
813 int blen;
814
815 req = 0xBC;
816 value = 1; /* power on */
817 index = 3;
818 blen = 0;
819
820 ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
821 if (ret != 0)
822 return -EIO;
823
824 return 0;
825}
826static int az6027_frontend_reset(struct dvb_usb_adapter *adap)
827{
828 int ret;
829 u8 req;
830 u16 value;
831 u16 index;
832 int blen;
833
834 /* reset demodulator */
835 req = 0xC0;
836 value = 1; /* high */
837 index = 3;
838 blen = 0;
839
840 ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
841 if (ret != 0)
842 return -EIO;
843
844 req = 0xC0;
845 value = 0; /* low */
846 index = 3;
847 blen = 0;
848 msleep_interruptible(200);
849
850 ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
851 if (ret != 0)
852 return -EIO;
853
854 msleep_interruptible(200);
855
856 req = 0xC0;
857 value = 1; /*high */
858 index = 3;
859 blen = 0;
860
861 ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
862 if (ret != 0)
863 return -EIO;
864
865 msleep_interruptible(200);
866 return 0;
867}
868
869static int az6027_frontend_tsbypass(struct dvb_usb_adapter *adap, int onoff)
870{
871 int ret;
872 u8 req;
873 u16 value;
874 u16 index;
875 int blen;
876
877 /* TS passthrough */
878 req = 0xC7;
879 value = onoff;
880 index = 0;
881 blen = 0;
882
883 ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
884 if (ret != 0)
885 return -EIO;
886
887 return 0;
888}
889
890static int az6027_frontend_attach(struct dvb_usb_adapter *adap)
891{
892
893 az6027_frontend_poweron(adap);
894 az6027_frontend_reset(adap);
895
896 deb_info("adap = %p, dev = %p\n", adap, adap->dev);
897 adap->fe = stb0899_attach(&az6027_stb0899_config, &adap->dev->i2c_adap);
898
899 if (adap->fe) {
900 deb_info("found STB0899 DVB-S/DVB-S2 frontend @0x%02x", az6027_stb0899_config.demod_address);
901 if (stb6100_attach(adap->fe, &az6027_stb6100_config, &adap->dev->i2c_adap)) {
902 deb_info("found STB6100 DVB-S/DVB-S2 frontend @0x%02x", az6027_stb6100_config.tuner_address);
903 adap->fe->ops.set_voltage = az6027_set_voltage;
904 az6027_ci_init(adap);
905 } else {
906 adap->fe = NULL;
907 }
908 } else
909 warn("no front-end attached\n");
910
911 az6027_frontend_tsbypass(adap, 0);
912
913 return 0;
914}
915
916static struct dvb_usb_device_properties az6027_properties;
917
918static void az6027_usb_disconnect(struct usb_interface *intf)
919{
920 struct dvb_usb_device *d = usb_get_intfdata(intf);
921 az6027_ci_uninit(d);
922 dvb_usb_device_exit(intf);
923}
924
925
926static int az6027_usb_probe(struct usb_interface *intf,
927 const struct usb_device_id *id)
928{
929 return dvb_usb_device_init(intf,
930 &az6027_properties,
931 THIS_MODULE,
932 NULL,
933 adapter_nr);
934}
935
936/* I2C */
937static int az6027_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[], int num)
938{
939 struct dvb_usb_device *d = i2c_get_adapdata(adap);
940 int i = 0, j = 0, len = 0;
941 int ret;
942 u16 index;
943 u16 value;
944 int length;
945 u8 req;
946 u8 data[256];
947
948 if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
949 return -EAGAIN;
950
951 if (num > 2)
952 warn("more than 2 i2c messages at a time is not handled yet. TODO.");
953
954 for (i = 0; i < num; i++) {
955
956 if (msg[i].addr == 0x99) {
957 req = 0xBE;
958 index = 0;
959 value = msg[i].buf[0] & 0x00ff;
960 length = 1;
961 az6027_usb_out_op(d, req, value, index, data, length);
962 }
963
964 if (msg[i].addr == 0xd0) {
965 /* write/read request */
966 if (i + 1 < num && (msg[i + 1].flags & I2C_M_RD)) {
967 req = 0xB9;
968 index = (((msg[i].buf[0] << 8) & 0xff00) | (msg[i].buf[1] & 0x00ff));
969 value = msg[i].addr + (msg[i].len << 8);
970 length = msg[i + 1].len + 6;
971 ret = az6027_usb_in_op(d, req, value, index, data, length);
972 len = msg[i + 1].len;
973 for (j = 0; j < len; j++)
974 msg[i + 1].buf[j] = data[j + 5];
975
976 i++;
977 } else {
978
979 if (msg[i].addr == 0xd0) {
980 /* demod 16bit addr */
981 req = 0xBD;
982 index = (((msg[i].buf[0] << 8) & 0xff00) | (msg[i].buf[1] & 0x00ff));
983 value = msg[i].addr + (2 << 8);
984 length = msg[i].len - 2;
985 len = msg[i].len - 2;
986 for (j = 0; j < len; j++)
987 data[j] = msg[i].buf[j + 2];
988
989 }
990 az6027_usb_out_op(d, req, value, index, data, length);
991 }
992 }
993
994 if (msg[i].addr == 0xc0) {
995 if (msg[i].flags & I2C_M_RD) {
996
997 req = 0xB9;
998 index = 0x0;
999 value = msg[i].addr;
1000 length = msg[i].len + 6;
1001 ret = az6027_usb_in_op(d, req, value, index, data, length);
1002 len = msg[i].len;
1003 for (j = 0; j < len; j++)
1004 msg[i].buf[j] = data[j + 5];
1005
1006 } else {
1007
1008 req = 0xBD;
1009 index = msg[i].buf[0] & 0x00FF;
1010 value = msg[i].addr + (1 << 8);
1011 length = msg[i].len - 1;
1012 len = msg[i].len - 1;
1013
1014 for (j = 0; j < len; j++)
1015 data[j] = msg[i].buf[j + 1];
1016
1017 az6027_usb_out_op(d, req, value, index, data, length);
1018 }
1019 }
1020 }
1021 mutex_unlock(&d->i2c_mutex);
1022
1023 return i;
1024}
1025
1026
1027static u32 az6027_i2c_func(struct i2c_adapter *adapter)
1028{
1029 return I2C_FUNC_I2C;
1030}
1031
1032static struct i2c_algorithm az6027_i2c_algo = {
1033 .master_xfer = az6027_i2c_xfer,
1034 .functionality = az6027_i2c_func,
1035};
1036
1037int az6027_identify_state(struct usb_device *udev,
1038 struct dvb_usb_device_properties *props,
1039 struct dvb_usb_device_description **desc,
1040 int *cold)
1041{
1042 u8 b[16];
1043 s16 ret = usb_control_msg(udev,
1044 usb_rcvctrlpipe(udev, 0),
1045 0xb7,
1046 USB_TYPE_VENDOR | USB_DIR_IN,
1047 6,
1048 0,
1049 b,
1050 6,
1051 USB_CTRL_GET_TIMEOUT);
1052
1053 *cold = ret <= 0;
1054
1055 deb_info("cold: %d\n", *cold);
1056 return 0;
1057}
1058
1059
1060static struct usb_device_id az6027_usb_table[] = {
1061 { USB_DEVICE(USB_VID_AZUREWAVE, USB_PID_AZUREWAVE_AZ6027) },
1062 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_DVBS2CI) },
1063 { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_USB2_HDCI) },
1064 { },
1065};
1066
1067MODULE_DEVICE_TABLE(usb, az6027_usb_table);
1068
1069static struct dvb_usb_device_properties az6027_properties = {
1070 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1071 .usb_ctrl = CYPRESS_FX2,
1072 .firmware = "dvb-usb-az6027-03.fw",
1073 .no_reconnect = 1,
1074
1075 .size_of_priv = sizeof(struct az6027_device_state),
1076 .identify_state = az6027_identify_state,
1077 .num_adapters = 1,
1078 .adapter = {
1079 {
1080 .streaming_ctrl = az6027_streaming_ctrl,
1081 .frontend_attach = az6027_frontend_attach,
1082
1083 /* parameter for the MPEG2-data transfer */
1084 .stream = {
1085 .type = USB_BULK,
1086 .count = 10,
1087 .endpoint = 0x02,
1088 .u = {
1089 .bulk = {
1090 .buffersize = 4096,
1091 }
1092 }
1093 },
1094 }
1095 },
1096/*
1097 .power_ctrl = az6027_power_ctrl,
1098 .read_mac_address = az6027_read_mac_addr,
1099 */
1100 .rc_key_map = az6027_rc_keys,
1101 .rc_key_map_size = ARRAY_SIZE(az6027_rc_keys),
1102 .rc_interval = 400,
1103 .rc_query = az6027_rc_query,
1104 .i2c_algo = &az6027_i2c_algo,
1105
1106 .num_device_descs = 1,
1107 .devices = {
1108 {
1109 .name = "AZUREWAVE DVB-S/S2 USB2.0 (AZ6027)",
1110 .cold_ids = { &az6027_usb_table[0], NULL },
1111 .warm_ids = { NULL },
1112 },
1113 { NULL },
1114 }
1115};
1116
1117/* usb specific object needed to register this driver with the usb subsystem */
1118static struct usb_driver az6027_usb_driver = {
1119 .name = "dvb_usb_az6027",
1120 .probe = az6027_usb_probe,
1121 .disconnect = az6027_usb_disconnect,
1122 .id_table = az6027_usb_table,
1123};
1124
1125/* module stuff */
1126static int __init az6027_usb_module_init(void)
1127{
1128 int result;
1129
1130 result = usb_register(&az6027_usb_driver);
1131 if (result) {
1132 err("usb_register failed. (%d)", result);
1133 return result;
1134 }
1135
1136 return 0;
1137}
1138
1139static void __exit az6027_usb_module_exit(void)
1140{
1141 /* deregister this driver from the USB subsystem */
1142 usb_deregister(&az6027_usb_driver);
1143}
1144
1145module_init(az6027_usb_module_init);
1146module_exit(az6027_usb_module_exit);
1147
1148MODULE_AUTHOR("Adams Xu <Adams.xu@azwave.com.cn>");
1149MODULE_DESCRIPTION("Driver for AZUREWAVE DVB-S/S2 USB2.0 (AZ6027)");
1150MODULE_VERSION("1.0");
1151MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/az6027.h b/drivers/media/dvb/dvb-usb/az6027.h
new file mode 100644
index 000000000000..f3afe17f3f3d
--- /dev/null
+++ b/drivers/media/dvb/dvb-usb/az6027.h
@@ -0,0 +1,14 @@
1#ifndef _DVB_USB_VP6027_H_
2#define _DVB_USB_VP6027_H_
3
4#define DVB_USB_LOG_PREFIX "az6027"
5#include "dvb-usb.h"
6
7
8extern int dvb_usb_az6027_debug;
9#define deb_info(args...) dprintk(dvb_usb_az6027_debug, 0x01, args)
10#define deb_xfer(args...) dprintk(dvb_usb_az6027_debug, 0x02, args)
11#define deb_rc(args...) dprintk(dvb_usb_az6027_debug, 0x04, args)
12#define deb_fe(args...) dprintk(dvb_usb_az6027_debug, 0x08, args)
13
14#endif
diff --git a/drivers/media/dvb/dvb-usb/cxusb.c b/drivers/media/dvb/dvb-usb/cxusb.c
index 05fb28e9c69e..a7b8405c291e 100644
--- a/drivers/media/dvb/dvb-usb/cxusb.c
+++ b/drivers/media/dvb/dvb-usb/cxusb.c
@@ -1184,6 +1184,9 @@ static struct atbm8830_config mygica_d689_atbm8830_cfg = {
1184 .osc_clk_freq = 30400, /* in kHz */ 1184 .osc_clk_freq = 30400, /* in kHz */
1185 .if_freq = 0, /* zero IF */ 1185 .if_freq = 0, /* zero IF */
1186 .zif_swap_iq = 1, 1186 .zif_swap_iq = 1,
1187 .agc_min = 0x2E,
1188 .agc_max = 0x90,
1189 .agc_hold_loop = 0,
1187}; 1190};
1188 1191
1189static int cxusb_mygica_d689_frontend_attach(struct dvb_usb_adapter *adap) 1192static int cxusb_mygica_d689_frontend_attach(struct dvb_usb_adapter *adap)
diff --git a/drivers/media/dvb/dvb-usb/dib0700.h b/drivers/media/dvb/dvb-usb/dib0700.h
index 495a90577c5f..83fc24a6c31a 100644
--- a/drivers/media/dvb/dvb-usb/dib0700.h
+++ b/drivers/media/dvb/dvb-usb/dib0700.h
@@ -42,7 +42,6 @@ struct dib0700_state {
42 u16 mt2060_if1[2]; 42 u16 mt2060_if1[2];
43 u8 rc_toggle; 43 u8 rc_toggle;
44 u8 rc_counter; 44 u8 rc_counter;
45 u8 rc_func_version;
46 u8 is_dib7000pc; 45 u8 is_dib7000pc;
47 u8 fw_use_new_i2c_api; 46 u8 fw_use_new_i2c_api;
48 u8 disable_streaming_master_mode; 47 u8 disable_streaming_master_mode;
diff --git a/drivers/media/dvb/dvb-usb/dib0700_core.c b/drivers/media/dvb/dvb-usb/dib0700_core.c
index 0d3c9a9a33be..4f961d2d1817 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_core.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_core.c
@@ -471,14 +471,209 @@ int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
471 return dib0700_ctrl_wr(adap->dev, b, 4); 471 return dib0700_ctrl_wr(adap->dev, b, 4);
472} 472}
473 473
474/* Number of keypresses to ignore before start repeating */
475#define RC_REPEAT_DELAY_V1_20 10
476
477/* This is the structure of the RC response packet starting in firmware 1.20 */
478struct dib0700_rc_response {
479 u8 report_id;
480 u8 data_state;
481 u16 system;
482 u8 data;
483 u8 not_data;
484};
485#define RC_MSG_SIZE_V1_20 6
486
487static void dib0700_rc_urb_completion(struct urb *purb)
488{
489 struct dvb_usb_device *d = purb->context;
490 struct dvb_usb_rc_key *keymap;
491 struct dib0700_state *st;
492 struct dib0700_rc_response poll_reply;
493 u8 *buf;
494 int found = 0;
495 u32 event;
496 int state;
497 int i;
498
499 deb_info("%s()\n", __func__);
500 if (d == NULL)
501 return;
502
503 if (d->rc_input_dev == NULL) {
504 /* This will occur if disable_rc_polling=1 */
505 usb_free_urb(purb);
506 return;
507 }
508
509 keymap = d->props.rc_key_map;
510 st = d->priv;
511 buf = (u8 *)purb->transfer_buffer;
512
513 if (purb->status < 0) {
514 deb_info("discontinuing polling\n");
515 usb_free_urb(purb);
516 return;
517 }
518
519 if (purb->actual_length != RC_MSG_SIZE_V1_20) {
520 deb_info("malformed rc msg size=%d\n", purb->actual_length);
521 goto resubmit;
522 }
523
524 /* Set initial results in case we exit the function early */
525 event = 0;
526 state = REMOTE_NO_KEY_PRESSED;
527
528 deb_data("IR raw %02X %02X %02X %02X %02X %02X (len %d)\n", buf[0],
529 buf[1], buf[2], buf[3], buf[4], buf[5], purb->actual_length);
530
531 switch (dvb_usb_dib0700_ir_proto) {
532 case 0:
533 /* NEC Protocol */
534 poll_reply.report_id = 0;
535 poll_reply.data_state = 1;
536 poll_reply.system = buf[2];
537 poll_reply.data = buf[4];
538 poll_reply.not_data = buf[5];
539
540 /* NEC protocol sends repeat code as 0 0 0 FF */
541 if ((poll_reply.system == 0x00) && (poll_reply.data == 0x00)
542 && (poll_reply.not_data == 0xff)) {
543 poll_reply.data_state = 2;
544 break;
545 }
546 break;
547 default:
548 /* RC5 Protocol */
549 poll_reply.report_id = buf[0];
550 poll_reply.data_state = buf[1];
551 poll_reply.system = (buf[2] << 8) | buf[3];
552 poll_reply.data = buf[4];
553 poll_reply.not_data = buf[5];
554 break;
555 }
556
557 if ((poll_reply.data + poll_reply.not_data) != 0xff) {
558 /* Key failed integrity check */
559 err("key failed integrity check: %04x %02x %02x",
560 poll_reply.system,
561 poll_reply.data, poll_reply.not_data);
562 goto resubmit;
563 }
564
565 deb_data("rid=%02x ds=%02x sm=%04x d=%02x nd=%02x\n",
566 poll_reply.report_id, poll_reply.data_state,
567 poll_reply.system, poll_reply.data, poll_reply.not_data);
568
569 /* Find the key in the map */
570 for (i = 0; i < d->props.rc_key_map_size; i++) {
571 if (rc5_custom(&keymap[i]) == (poll_reply.system & 0xff) &&
572 rc5_data(&keymap[i]) == poll_reply.data) {
573 event = keymap[i].event;
574 found = 1;
575 break;
576 }
577 }
578
579 if (found == 0) {
580 err("Unknown remote controller key: %04x %02x %02x",
581 poll_reply.system, poll_reply.data, poll_reply.not_data);
582 d->last_event = 0;
583 goto resubmit;
584 }
585
586 if (poll_reply.data_state == 1) {
587 /* New key hit */
588 st->rc_counter = 0;
589 event = keymap[i].event;
590 state = REMOTE_KEY_PRESSED;
591 d->last_event = keymap[i].event;
592 } else if (poll_reply.data_state == 2) {
593 /* Key repeated */
594 st->rc_counter++;
595
596 /* prevents unwanted double hits */
597 if (st->rc_counter > RC_REPEAT_DELAY_V1_20) {
598 event = d->last_event;
599 state = REMOTE_KEY_PRESSED;
600 st->rc_counter = RC_REPEAT_DELAY_V1_20;
601 }
602 } else {
603 err("Unknown data state [%d]", poll_reply.data_state);
604 }
605
606 switch (state) {
607 case REMOTE_NO_KEY_PRESSED:
608 break;
609 case REMOTE_KEY_PRESSED:
610 deb_info("key pressed\n");
611 d->last_event = event;
612 case REMOTE_KEY_REPEAT:
613 deb_info("key repeated\n");
614 input_event(d->rc_input_dev, EV_KEY, event, 1);
615 input_sync(d->rc_input_dev);
616 input_event(d->rc_input_dev, EV_KEY, d->last_event, 0);
617 input_sync(d->rc_input_dev);
618 break;
619 default:
620 break;
621 }
622
623resubmit:
624 /* Clean the buffer before we requeue */
625 memset(purb->transfer_buffer, 0, RC_MSG_SIZE_V1_20);
626
627 /* Requeue URB */
628 usb_submit_urb(purb, GFP_ATOMIC);
629}
630
474int dib0700_rc_setup(struct dvb_usb_device *d) 631int dib0700_rc_setup(struct dvb_usb_device *d)
475{ 632{
633 struct dib0700_state *st = d->priv;
476 u8 rc_setup[3] = {REQUEST_SET_RC, dvb_usb_dib0700_ir_proto, 0}; 634 u8 rc_setup[3] = {REQUEST_SET_RC, dvb_usb_dib0700_ir_proto, 0};
477 int i = dib0700_ctrl_wr(d, rc_setup, 3); 635 struct urb *purb;
636 int ret;
637 int i;
638
639 if (d->props.rc_key_map == NULL)
640 return 0;
641
642 /* Set the IR mode */
643 i = dib0700_ctrl_wr(d, rc_setup, 3);
478 if (i<0) { 644 if (i<0) {
479 err("ir protocol setup failed"); 645 err("ir protocol setup failed");
480 return -1; 646 return -1;
481 } 647 }
648
649 if (st->fw_version < 0x10200)
650 return 0;
651
652 /* Starting in firmware 1.20, the RC info is provided on a bulk pipe */
653 purb = usb_alloc_urb(0, GFP_KERNEL);
654 if (purb == NULL) {
655 err("rc usb alloc urb failed\n");
656 return -1;
657 }
658
659 purb->transfer_buffer = kzalloc(RC_MSG_SIZE_V1_20, GFP_KERNEL);
660 if (purb->transfer_buffer == NULL) {
661 err("rc kzalloc failed\n");
662 usb_free_urb(purb);
663 return -1;
664 }
665
666 purb->status = -EINPROGRESS;
667 usb_fill_bulk_urb(purb, d->udev, usb_rcvbulkpipe(d->udev, 1),
668 purb->transfer_buffer, RC_MSG_SIZE_V1_20,
669 dib0700_rc_urb_completion, d);
670
671 ret = usb_submit_urb(purb, GFP_ATOMIC);
672 if (ret != 0) {
673 err("rc submit urb failed\n");
674 return -1;
675 }
676
482 return 0; 677 return 0;
483} 678}
484 679
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c
index 44972d01bbd0..34eab05afc6c 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -472,20 +472,25 @@ static u8 rc_request[] = { REQUEST_POLL_RC, 0 };
472 472
473/* Number of keypresses to ignore before start repeating */ 473/* Number of keypresses to ignore before start repeating */
474#define RC_REPEAT_DELAY 6 474#define RC_REPEAT_DELAY 6
475#define RC_REPEAT_DELAY_V1_20 10
476 475
477 476static int dib0700_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
478
479/* Used by firmware versions < 1.20 (deprecated) */
480static int dib0700_rc_query_legacy(struct dvb_usb_device *d, u32 *event,
481 int *state)
482{ 477{
483 u8 key[4]; 478 u8 key[4];
484 int i; 479 int i;
485 struct dvb_usb_rc_key *keymap = d->props.rc_key_map; 480 struct dvb_usb_rc_key *keymap = d->props.rc_key_map;
486 struct dib0700_state *st = d->priv; 481 struct dib0700_state *st = d->priv;
482
487 *event = 0; 483 *event = 0;
488 *state = REMOTE_NO_KEY_PRESSED; 484 *state = REMOTE_NO_KEY_PRESSED;
485
486 if (st->fw_version >= 0x10200) {
487 /* For 1.20 firmware , We need to keep the RC polling
488 callback so we can reuse the input device setup in
489 dvb-usb-remote.c. However, the actual work is being done
490 in the bulk URB completion handler. */
491 return 0;
492 }
493
489 i=dib0700_ctrl_rd(d,rc_request,2,key,4); 494 i=dib0700_ctrl_rd(d,rc_request,2,key,4);
490 if (i<=0) { 495 if (i<=0) {
491 err("RC Query Failed"); 496 err("RC Query Failed");
@@ -557,149 +562,6 @@ static int dib0700_rc_query_legacy(struct dvb_usb_device *d, u32 *event,
557 return 0; 562 return 0;
558} 563}
559 564
560/* This is the structure of the RC response packet starting in firmware 1.20 */
561struct dib0700_rc_response {
562 u8 report_id;
563 u8 data_state;
564 u16 system;
565 u8 data;
566 u8 not_data;
567};
568
569/* This supports the new IR response format for firmware v1.20 */
570static int dib0700_rc_query_v1_20(struct dvb_usb_device *d, u32 *event,
571 int *state)
572{
573 struct dvb_usb_rc_key *keymap = d->props.rc_key_map;
574 struct dib0700_state *st = d->priv;
575 struct dib0700_rc_response poll_reply;
576 u8 buf[6];
577 int i;
578 int status;
579 int actlen;
580 int found = 0;
581
582 /* Set initial results in case we exit the function early */
583 *event = 0;
584 *state = REMOTE_NO_KEY_PRESSED;
585
586 /* Firmware v1.20 provides RC data via bulk endpoint 1 */
587 status = usb_bulk_msg(d->udev, usb_rcvbulkpipe(d->udev, 1), buf,
588 sizeof(buf), &actlen, 50);
589 if (status < 0) {
590 /* No data available (meaning no key press) */
591 return 0;
592 }
593
594
595 switch (dvb_usb_dib0700_ir_proto) {
596 case 0:
597 poll_reply.report_id = 0;
598 poll_reply.data_state = 1;
599 poll_reply.system = buf[2];
600 poll_reply.data = buf[4];
601 poll_reply.not_data = buf[5];
602
603 /* NEC protocol sends repeat code as 0 0 0 FF */
604 if ((poll_reply.system == 0x00) && (poll_reply.data == 0x00)
605 && (poll_reply.not_data == 0xff)) {
606 poll_reply.data_state = 2;
607 break;
608 }
609 break;
610 default:
611 if (actlen != sizeof(buf)) {
612 /* We didn't get back the 6 byte message we expected */
613 err("Unexpected RC response size [%d]", actlen);
614 return -1;
615 }
616
617 poll_reply.report_id = buf[0];
618 poll_reply.data_state = buf[1];
619 poll_reply.system = (buf[2] << 8) | buf[3];
620 poll_reply.data = buf[4];
621 poll_reply.not_data = buf[5];
622
623 break;
624 }
625
626 if ((poll_reply.data + poll_reply.not_data) != 0xff) {
627 /* Key failed integrity check */
628 err("key failed integrity check: %04x %02x %02x",
629 poll_reply.system,
630 poll_reply.data, poll_reply.not_data);
631 return -1;
632 }
633
634
635 /* Find the key in the map */
636 for (i = 0; i < d->props.rc_key_map_size; i++) {
637 if (rc5_custom(&keymap[i]) == (poll_reply.system & 0xff) &&
638 rc5_data(&keymap[i]) == poll_reply.data) {
639 *event = keymap[i].event;
640 found = 1;
641 break;
642 }
643 }
644
645 if (found == 0) {
646 err("Unknown remote controller key: %04x %02x %02x",
647 poll_reply.system,
648 poll_reply.data, poll_reply.not_data);
649 d->last_event = 0;
650 return 0;
651 }
652
653 if (poll_reply.data_state == 1) {
654 /* New key hit */
655 st->rc_counter = 0;
656 *event = keymap[i].event;
657 *state = REMOTE_KEY_PRESSED;
658 d->last_event = keymap[i].event;
659 } else if (poll_reply.data_state == 2) {
660 /* Key repeated */
661 st->rc_counter++;
662
663 /* prevents unwanted double hits */
664 if (st->rc_counter > RC_REPEAT_DELAY_V1_20) {
665 *event = d->last_event;
666 *state = REMOTE_KEY_PRESSED;
667 st->rc_counter = RC_REPEAT_DELAY_V1_20;
668 }
669 } else {
670 err("Unknown data state [%d]", poll_reply.data_state);
671 }
672
673 return 0;
674}
675
676static int dib0700_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
677{
678 struct dib0700_state *st = d->priv;
679
680 /* Because some people may have improperly named firmware files,
681 let's figure out whether to use the new firmware call or the legacy
682 call based on the firmware version embedded in the file */
683 if (st->rc_func_version == 0) {
684 u32 hwver, romver, ramver, fwtype;
685 int ret = dib0700_get_version(d, &hwver, &romver, &ramver,
686 &fwtype);
687 if (ret < 0) {
688 err("Could not determine version info");
689 return -1;
690 }
691 if (ramver < 0x10200)
692 st->rc_func_version = 1;
693 else
694 st->rc_func_version = 2;
695 }
696
697 if (st->rc_func_version == 2)
698 return dib0700_rc_query_v1_20(d, event, state);
699 else
700 return dib0700_rc_query_legacy(d, event, state);
701}
702
703static struct dvb_usb_rc_key dib0700_rc_keys[] = { 565static struct dvb_usb_rc_key dib0700_rc_keys[] = {
704 /* Key codes for the tiny Pinnacle remote*/ 566 /* Key codes for the tiny Pinnacle remote*/
705 { 0x0700, KEY_MUTE }, 567 { 0x0700, KEY_MUTE },
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index bc3581d58ced..ae8b57acfe05 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -64,6 +64,8 @@
64#define USB_VID_HUMAX_COEX 0x10b9 64#define USB_VID_HUMAX_COEX 0x10b9
65#define USB_VID_774 0x7a69 65#define USB_VID_774 0x7a69
66#define USB_VID_EVOLUTEPC 0x1e59 66#define USB_VID_EVOLUTEPC 0x1e59
67#define USB_VID_AZUREWAVE 0x13d3
68#define USB_VID_TECHNISAT 0x14f7
67 69
68/* Product IDs */ 70/* Product IDs */
69#define USB_PID_ADSTECH_USB2_COLD 0xa333 71#define USB_PID_ADSTECH_USB2_COLD 0xa333
@@ -138,6 +140,7 @@
138#define USB_PID_TWINHAN_VP7021_COLD 0x3207 140#define USB_PID_TWINHAN_VP7021_COLD 0x3207
139#define USB_PID_TWINHAN_VP7021_WARM 0x3208 141#define USB_PID_TWINHAN_VP7021_WARM 0x3208
140#define USB_PID_TINYTWIN 0x3226 142#define USB_PID_TINYTWIN 0x3226
143#define USB_PID_TINYTWIN_2 0xe402
141#define USB_PID_DNTV_TINYUSB2_COLD 0x3223 144#define USB_PID_DNTV_TINYUSB2_COLD 0x3223
142#define USB_PID_DNTV_TINYUSB2_WARM 0x3224 145#define USB_PID_DNTV_TINYUSB2_WARM 0x3224
143#define USB_PID_ULTIMA_TVBOX_COLD 0x8105 146#define USB_PID_ULTIMA_TVBOX_COLD 0x8105
@@ -209,6 +212,7 @@
209#define USB_PID_PINNACLE_PCTV71E 0x022b 212#define USB_PID_PINNACLE_PCTV71E 0x022b
210#define USB_PID_PINNACLE_PCTV72E 0x0236 213#define USB_PID_PINNACLE_PCTV72E 0x0236
211#define USB_PID_PINNACLE_PCTV73E 0x0237 214#define USB_PID_PINNACLE_PCTV73E 0x0237
215#define USB_PID_PINNACLE_PCTV310E 0x3211
212#define USB_PID_PINNACLE_PCTV801E 0x023a 216#define USB_PID_PINNACLE_PCTV801E 0x023a
213#define USB_PID_PINNACLE_PCTV801E_SE 0x023b 217#define USB_PID_PINNACLE_PCTV801E_SE 0x023b
214#define USB_PID_PINNACLE_PCTV73A 0x0243 218#define USB_PID_PINNACLE_PCTV73A 0x0243
@@ -248,6 +252,7 @@
248#define USB_PID_DIGIVOX_MINI_SL_WARM 0xe361 252#define USB_PID_DIGIVOX_MINI_SL_WARM 0xe361
249#define USB_PID_GRANDTEC_DVBT_USB2_COLD 0x0bc6 253#define USB_PID_GRANDTEC_DVBT_USB2_COLD 0x0bc6
250#define USB_PID_GRANDTEC_DVBT_USB2_WARM 0x0bc7 254#define USB_PID_GRANDTEC_DVBT_USB2_WARM 0x0bc7
255#define USB_PID_WINFAST_DTV2000DS 0x6a04
251#define USB_PID_WINFAST_DTV_DONGLE_COLD 0x6025 256#define USB_PID_WINFAST_DTV_DONGLE_COLD 0x6025
252#define USB_PID_WINFAST_DTV_DONGLE_WARM 0x6026 257#define USB_PID_WINFAST_DTV_DONGLE_WARM 0x6026
253#define USB_PID_WINFAST_DTV_DONGLE_STK7700P 0x6f00 258#define USB_PID_WINFAST_DTV_DONGLE_STK7700P 0x6f00
@@ -290,5 +295,7 @@
290#define USB_PID_FRIIO_WHITE 0x0001 295#define USB_PID_FRIIO_WHITE 0x0001
291#define USB_PID_TVWAY_PLUS 0x0002 296#define USB_PID_TVWAY_PLUS 0x0002
292#define USB_PID_SVEON_STV20 0xe39d 297#define USB_PID_SVEON_STV20 0xe39d
293 298#define USB_PID_AZUREWAVE_AZ6027 0x3275
299#define USB_PID_TERRATEC_DVBS2CI 0x3275
300#define USB_PID_TECHNISAT_USB2_HDCI 0x0002
294#endif 301#endif
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-init.c b/drivers/media/dvb/dvb-usb/dvb-usb-init.c
index e331db8c77b2..5d91f70d2d2d 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-init.c
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-init.c
@@ -243,7 +243,7 @@ int dvb_usb_device_init(struct usb_interface *intf,
243 d = kzalloc(sizeof(struct dvb_usb_device),GFP_KERNEL); 243 d = kzalloc(sizeof(struct dvb_usb_device),GFP_KERNEL);
244 if (d == NULL) { 244 if (d == NULL) {
245 err("no memory for 'struct dvb_usb_device'"); 245 err("no memory for 'struct dvb_usb_device'");
246 return ret; 246 return -ENOMEM;
247 } 247 }
248 248
249 d->udev = udev; 249 d->udev = udev;
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-remote.c b/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
index 6b5ded9e7d5d..a03ef7efec9a 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
@@ -107,6 +107,7 @@ static void dvb_usb_read_remote_control(struct work_struct *work)
107 case REMOTE_KEY_REPEAT: 107 case REMOTE_KEY_REPEAT:
108 deb_rc("key repeated\n"); 108 deb_rc("key repeated\n");
109 input_event(d->rc_input_dev, EV_KEY, event, 1); 109 input_event(d->rc_input_dev, EV_KEY, event, 1);
110 input_sync(d->rc_input_dev);
110 input_event(d->rc_input_dev, EV_KEY, d->last_event, 0); 111 input_event(d->rc_input_dev, EV_KEY, d->last_event, 0);
111 input_sync(d->rc_input_dev); 112 input_sync(d->rc_input_dev);
112 break; 113 break;
diff --git a/drivers/media/dvb/dvb-usb/dw2102.c b/drivers/media/dvb/dvb-usb/dw2102.c
index 64132c0cf80d..accc65509b07 100644
--- a/drivers/media/dvb/dvb-usb/dw2102.c
+++ b/drivers/media/dvb/dvb-usb/dw2102.c
@@ -1,6 +1,7 @@
1/* DVB USB framework compliant Linux driver for the 1/* DVB USB framework compliant Linux driver for the
2* DVBWorld DVB-S 2101, 2102, DVB-S2 2104, DVB-C 3101, 2* DVBWorld DVB-S 2101, 2102, DVB-S2 2104, DVB-C 3101,
3* TeVii S600, S630, S650 Cards 3* TeVii S600, S630, S650,
4* Prof 1100, 7500 Cards
4* Copyright (C) 2008,2009 Igor M. Liplianin (liplianin@me.by) 5* Copyright (C) 2008,2009 Igor M. Liplianin (liplianin@me.by)
5* 6*
6* This program is free software; you can redistribute it and/or modify it 7* This program is free software; you can redistribute it and/or modify it
@@ -469,11 +470,13 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
469 int num) 470 int num)
470{ 471{
471 struct dvb_usb_device *d = i2c_get_adapdata(adap); 472 struct dvb_usb_device *d = i2c_get_adapdata(adap);
473 struct usb_device *udev;
472 int ret = 0; 474 int ret = 0;
473 int len, i, j; 475 int len, i, j;
474 476
475 if (!d) 477 if (!d)
476 return -ENODEV; 478 return -ENODEV;
479 udev = d->udev;
477 if (mutex_lock_interruptible(&d->i2c_mutex) < 0) 480 if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
478 return -EAGAIN; 481 return -EAGAIN;
479 482
@@ -488,8 +491,13 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
488 } 491 }
489 case (DW2102_VOLTAGE_CTRL): { 492 case (DW2102_VOLTAGE_CTRL): {
490 u8 obuf[2]; 493 u8 obuf[2];
494
495 obuf[0] = 1;
496 obuf[1] = msg[j].buf[1];/* off-on */
497 ret = dw210x_op_rw(d->udev, 0x8a, 0, 0,
498 obuf, 2, DW210X_WRITE_MSG);
491 obuf[0] = 3; 499 obuf[0] = 3;
492 obuf[1] = msg[j].buf[0]; 500 obuf[1] = msg[j].buf[0];/* 13v-18v */
493 ret = dw210x_op_rw(d->udev, 0x8a, 0, 0, 501 ret = dw210x_op_rw(d->udev, 0x8a, 0, 0,
494 obuf, 2, DW210X_WRITE_MSG); 502 obuf, 2, DW210X_WRITE_MSG);
495 break; 503 break;
@@ -527,6 +535,17 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
527 i += 16; 535 i += 16;
528 len -= 16; 536 len -= 16;
529 } while (len > 0); 537 } while (len > 0);
538 } else if ((udev->descriptor.idProduct == 0x7500)
539 && (j < (num - 1))) {
540 /* write register addr before read */
541 u8 obuf[msg[j].len + 2];
542 obuf[0] = msg[j + 1].len;
543 obuf[1] = (msg[j].addr << 1);
544 memcpy(obuf + 2, msg[j].buf, msg[j].len);
545 ret = dw210x_op_rw(d->udev, 0x92, 0, 0,
546 obuf, msg[j].len + 2,
547 DW210X_WRITE_MSG);
548 break;
530 } else { 549 } else {
531 /* write registers */ 550 /* write registers */
532 u8 obuf[msg[j].len + 2]; 551 u8 obuf[msg[j].len + 2];
@@ -651,18 +670,25 @@ static int s6x0_read_mac_address(struct dvb_usb_device *d, u8 mac[6])
651 670
652static int dw210x_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) 671static int dw210x_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
653{ 672{
654 static u8 command_13v[1] = {0x00}; 673 static u8 command_13v[] = {0x00, 0x01};
655 static u8 command_18v[1] = {0x01}; 674 static u8 command_18v[] = {0x01, 0x01};
656 struct i2c_msg msg[] = { 675 static u8 command_off[] = {0x00, 0x00};
657 {.addr = DW2102_VOLTAGE_CTRL, .flags = 0, 676 struct i2c_msg msg = {
658 .buf = command_13v, .len = 1}, 677 .addr = DW2102_VOLTAGE_CTRL,
678 .flags = 0,
679 .buf = command_off,
680 .len = 2,
659 }; 681 };
660 682
661 struct dvb_usb_adapter *udev_adap = 683 struct dvb_usb_adapter *udev_adap =
662 (struct dvb_usb_adapter *)(fe->dvb->priv); 684 (struct dvb_usb_adapter *)(fe->dvb->priv);
663 if (voltage == SEC_VOLTAGE_18) 685 if (voltage == SEC_VOLTAGE_18)
664 msg[0].buf = command_18v; 686 msg.buf = command_18v;
665 i2c_transfer(&udev_adap->dev->i2c_adap, msg, 1); 687 else if (voltage == SEC_VOLTAGE_13)
688 msg.buf = command_13v;
689
690 i2c_transfer(&udev_adap->dev->i2c_adap, &msg, 1);
691
666 return 0; 692 return 0;
667} 693}
668 694
@@ -735,6 +761,18 @@ static struct stv6110_config dw2104_stv6110_config = {
735 .clk_div = 1, 761 .clk_div = 1,
736}; 762};
737 763
764static struct stv0900_config prof_7500_stv0900_config = {
765 .demod_address = 0x6a,
766 .demod_mode = 0,
767 .xtal = 27000000,
768 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
769 .diseqc_mode = 2,/* 2/3 PWM */
770 .tun1_maddress = 0,/* 0x60 */
771 .tun1_adc = 0,/* 2 Vpp */
772 .path1_mode = 3,
773 .tun1_type = 3,
774};
775
738static int dw2104_frontend_attach(struct dvb_usb_adapter *d) 776static int dw2104_frontend_attach(struct dvb_usb_adapter *d)
739{ 777{
740 struct dvb_tuner_ops *tuner_ops = NULL; 778 struct dvb_tuner_ops *tuner_ops = NULL;
@@ -882,6 +920,19 @@ static int s6x0_frontend_attach(struct dvb_usb_adapter *d)
882 return -EIO; 920 return -EIO;
883} 921}
884 922
923static int prof_7500_frontend_attach(struct dvb_usb_adapter *d)
924{
925 d->fe = dvb_attach(stv0900_attach, &prof_7500_stv0900_config,
926 &d->dev->i2c_adap, 0);
927 if (d->fe == NULL)
928 return -EIO;
929 d->fe->ops.set_voltage = dw210x_set_voltage;
930
931 info("Attached STV0900+STB6100A!\n");
932
933 return 0;
934}
935
885static int dw2102_tuner_attach(struct dvb_usb_adapter *adap) 936static int dw2102_tuner_attach(struct dvb_usb_adapter *adap)
886{ 937{
887 dvb_attach(dvb_pll_attach, adap->fe, 0x60, 938 dvb_attach(dvb_pll_attach, adap->fe, 0x60,
@@ -1073,6 +1124,7 @@ static struct usb_device_id dw2102_table[] = {
1073 {USB_DEVICE(0x9022, USB_PID_TEVII_S630)}, 1124 {USB_DEVICE(0x9022, USB_PID_TEVII_S630)},
1074 {USB_DEVICE(0x3011, USB_PID_PROF_1100)}, 1125 {USB_DEVICE(0x3011, USB_PID_PROF_1100)},
1075 {USB_DEVICE(0x9022, USB_PID_TEVII_S660)}, 1126 {USB_DEVICE(0x9022, USB_PID_TEVII_S660)},
1127 {USB_DEVICE(0x3034, 0x7500)},
1076 { } 1128 { }
1077}; 1129};
1078 1130
@@ -1387,9 +1439,30 @@ static struct dvb_usb_device_properties s6x0_properties = {
1387 } 1439 }
1388}; 1440};
1389 1441
1442struct dvb_usb_device_properties *p7500;
1443static struct dvb_usb_device_description d7500 = {
1444 "Prof 7500 USB DVB-S2",
1445 {&dw2102_table[9], NULL},
1446 {NULL},
1447};
1448
1390static int dw2102_probe(struct usb_interface *intf, 1449static int dw2102_probe(struct usb_interface *intf,
1391 const struct usb_device_id *id) 1450 const struct usb_device_id *id)
1392{ 1451{
1452
1453 p7500 = kzalloc(sizeof(struct dvb_usb_device_properties), GFP_KERNEL);
1454 if (!p7500)
1455 return -ENOMEM;
1456 /* copy default structure */
1457 memcpy(p7500, &s6x0_properties,
1458 sizeof(struct dvb_usb_device_properties));
1459 /* fill only different fields */
1460 p7500->firmware = "dvb-usb-p7500.fw";
1461 p7500->devices[0] = d7500;
1462 p7500->rc_key_map = tbs_rc_keys;
1463 p7500->rc_key_map_size = ARRAY_SIZE(tbs_rc_keys);
1464 p7500->adapter->frontend_attach = prof_7500_frontend_attach;
1465
1393 if (0 == dvb_usb_device_init(intf, &dw2102_properties, 1466 if (0 == dvb_usb_device_init(intf, &dw2102_properties,
1394 THIS_MODULE, NULL, adapter_nr) || 1467 THIS_MODULE, NULL, adapter_nr) ||
1395 0 == dvb_usb_device_init(intf, &dw2104_properties, 1468 0 == dvb_usb_device_init(intf, &dw2104_properties,
@@ -1397,6 +1470,8 @@ static int dw2102_probe(struct usb_interface *intf,
1397 0 == dvb_usb_device_init(intf, &dw3101_properties, 1470 0 == dvb_usb_device_init(intf, &dw3101_properties,
1398 THIS_MODULE, NULL, adapter_nr) || 1471 THIS_MODULE, NULL, adapter_nr) ||
1399 0 == dvb_usb_device_init(intf, &s6x0_properties, 1472 0 == dvb_usb_device_init(intf, &s6x0_properties,
1473 THIS_MODULE, NULL, adapter_nr) ||
1474 0 == dvb_usb_device_init(intf, p7500,
1400 THIS_MODULE, NULL, adapter_nr)) 1475 THIS_MODULE, NULL, adapter_nr))
1401 return 0; 1476 return 0;
1402 1477
@@ -1431,6 +1506,6 @@ MODULE_AUTHOR("Igor M. Liplianin (c) liplianin@me.by");
1431MODULE_DESCRIPTION("Driver for DVBWorld DVB-S 2101, 2102, DVB-S2 2104," 1506MODULE_DESCRIPTION("Driver for DVBWorld DVB-S 2101, 2102, DVB-S2 2104,"
1432 " DVB-C 3101 USB2.0," 1507 " DVB-C 3101 USB2.0,"
1433 " TeVii S600, S630, S650, S660 USB2.0," 1508 " TeVii S600, S630, S650, S660 USB2.0,"
1434 " Prof 1100 USB2.0 devices"); 1509 " Prof 1100, 7500 USB2.0 devices");
1435MODULE_VERSION("0.1"); 1510MODULE_VERSION("0.1");
1436MODULE_LICENSE("GPL"); 1511MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/friio-fe.c b/drivers/media/dvb/dvb-usb/friio-fe.c
index ebb7b9fd115b..d14bd227b502 100644
--- a/drivers/media/dvb/dvb-usb/friio-fe.c
+++ b/drivers/media/dvb/dvb-usb/friio-fe.c
@@ -366,7 +366,7 @@ static u8 init_code[][2] = {
366 {0x76, 0x0C}, 366 {0x76, 0x0C},
367}; 367};
368 368
369const static int init_code_len = sizeof(init_code) / sizeof(u8[2]); 369static const int init_code_len = sizeof(init_code) / sizeof(u8[2]);
370 370
371static int jdvbt90502_init(struct dvb_frontend *fe) 371static int jdvbt90502_init(struct dvb_frontend *fe)
372{ 372{
diff --git a/drivers/media/dvb/dvb-usb/m920x.c b/drivers/media/dvb/dvb-usb/m920x.c
index ef9b7bed13ff..737ffa36ac9c 100644
--- a/drivers/media/dvb/dvb-usb/m920x.c
+++ b/drivers/media/dvb/dvb-usb/m920x.c
@@ -16,6 +16,9 @@
16#include "qt1010.h" 16#include "qt1010.h"
17#include "tda1004x.h" 17#include "tda1004x.h"
18#include "tda827x.h" 18#include "tda827x.h"
19
20#include <media/tuner.h>
21#include "tuner-simple.h"
19#include <asm/unaligned.h> 22#include <asm/unaligned.h>
20 23
21/* debug */ 24/* debug */
@@ -158,11 +161,14 @@ static int m920x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
158 161
159 case 0x93: 162 case 0x93:
160 case 0x92: 163 case 0x92:
164 case 0x83: /* pinnacle PCTV310e */
165 case 0x82:
161 m->rep_count = 0; 166 m->rep_count = 0;
162 *state = REMOTE_KEY_PRESSED; 167 *state = REMOTE_KEY_PRESSED;
163 goto unlock; 168 goto unlock;
164 169
165 case 0x91: 170 case 0x91:
171 case 0x81: /* pinnacle PCTV310e */
166 /* prevent immediate auto-repeat */ 172 /* prevent immediate auto-repeat */
167 if (++m->rep_count > 2) 173 if (++m->rep_count > 2)
168 *state = REMOTE_KEY_REPEAT; 174 *state = REMOTE_KEY_REPEAT;
@@ -546,6 +552,14 @@ static int m920x_tda8275_61_tuner_attach(struct dvb_usb_adapter *adap)
546 return 0; 552 return 0;
547} 553}
548 554
555static int m920x_fmd1216me_tuner_attach(struct dvb_usb_adapter *adap)
556{
557 dvb_attach(simple_tuner_attach, adap->fe,
558 &adap->dev->i2c_adap, 0x61,
559 TUNER_PHILIPS_FMD1216ME_MK3);
560 return 0;
561}
562
549/* device-specific initialization */ 563/* device-specific initialization */
550static struct m920x_inits megasky_rc_init [] = { 564static struct m920x_inits megasky_rc_init [] = {
551 { M9206_RC_INIT2, 0xa8 }, 565 { M9206_RC_INIT2, 0xa8 },
@@ -562,6 +576,18 @@ static struct m920x_inits tvwalkertwin_rc_init [] = {
562 { } /* terminating entry */ 576 { } /* terminating entry */
563}; 577};
564 578
579static struct m920x_inits pinnacle310e_init[] = {
580 /* without these the tuner don't work */
581 { 0xff20, 0x9b },
582 { 0xff22, 0x70 },
583
584 /* rc settings */
585 { 0xff50, 0x80 },
586 { M9206_RC_INIT1, 0x00 },
587 { M9206_RC_INIT2, 0xff },
588 { } /* terminating entry */
589};
590
565/* ir keymaps */ 591/* ir keymaps */
566static struct dvb_usb_rc_key megasky_rc_keys [] = { 592static struct dvb_usb_rc_key megasky_rc_keys [] = {
567 { 0x0012, KEY_POWER }, 593 { 0x0012, KEY_POWER },
@@ -602,11 +628,68 @@ static struct dvb_usb_rc_key tvwalkertwin_rc_keys [] = {
602 { 0x001e, KEY_VOLUMEUP }, 628 { 0x001e, KEY_VOLUMEUP },
603}; 629};
604 630
631static struct dvb_usb_rc_key pinnacle310e_rc_keys[] = {
632 { 0x16, KEY_POWER },
633 { 0x17, KEY_FAVORITES },
634 { 0x0f, KEY_TEXT },
635 { 0x48, KEY_MEDIA }, /* preview */
636 { 0x1c, KEY_EPG },
637 { 0x04, KEY_LIST }, /* record list */
638 { 0x03, KEY_1 },
639 { 0x01, KEY_2 },
640 { 0x06, KEY_3 },
641 { 0x09, KEY_4 },
642 { 0x1d, KEY_5 },
643 { 0x1f, KEY_6 },
644 { 0x0d, KEY_7 },
645 { 0x19, KEY_8 },
646 { 0x1b, KEY_9 },
647 { 0x15, KEY_0 },
648 { 0x0c, KEY_CANCEL },
649 { 0x4a, KEY_CLEAR },
650 { 0x13, KEY_BACK },
651 { 0x00, KEY_TAB },
652 { 0x4b, KEY_UP },
653 { 0x4e, KEY_LEFT },
654 { 0x52, KEY_RIGHT },
655 { 0x51, KEY_DOWN },
656 { 0x4f, KEY_ENTER }, /* could also be KEY_OK */
657 { 0x1e, KEY_VOLUMEUP },
658 { 0x0a, KEY_VOLUMEDOWN },
659 { 0x05, KEY_CHANNELUP },
660 { 0x02, KEY_CHANNELDOWN },
661 { 0x11, KEY_RECORD },
662 { 0x14, KEY_PLAY },
663 { 0x4c, KEY_PAUSE },
664 { 0x1a, KEY_STOP },
665 { 0x40, KEY_REWIND },
666 { 0x12, KEY_FASTFORWARD },
667 { 0x41, KEY_PREVIOUSSONG }, /* Replay */
668 { 0x42, KEY_NEXTSONG }, /* Skip */
669 { 0x54, KEY_CAMERA }, /* Capture */
670/* { 0x50, KEY_SAP }, */ /* Sap */
671 { 0x47, KEY_CYCLEWINDOWS }, /* Pip */
672 { 0x4d, KEY_SCREEN }, /* FullScreen */
673 { 0x08, KEY_SUBTITLE },
674 { 0x0e, KEY_MUTE },
675/* { 0x49, KEY_LR }, */ /* L/R */
676 { 0x07, KEY_SLEEP }, /* Hibernate */
677 { 0x08, KEY_MEDIA }, /* A/V */
678 { 0x0e, KEY_MENU }, /* Recall */
679 { 0x45, KEY_ZOOMIN },
680 { 0x46, KEY_ZOOMOUT },
681 { 0x18, KEY_TV }, /* Red */
682 { 0x53, KEY_VCR }, /* Green */
683 { 0x5e, KEY_SAT }, /* Yellow */
684 { 0x5f, KEY_PLAYER }, /* Blue */
685};
686
605/* DVB USB Driver stuff */ 687/* DVB USB Driver stuff */
606static struct dvb_usb_device_properties megasky_properties; 688static struct dvb_usb_device_properties megasky_properties;
607static struct dvb_usb_device_properties digivox_mini_ii_properties; 689static struct dvb_usb_device_properties digivox_mini_ii_properties;
608static struct dvb_usb_device_properties tvwalkertwin_properties; 690static struct dvb_usb_device_properties tvwalkertwin_properties;
609static struct dvb_usb_device_properties dposh_properties; 691static struct dvb_usb_device_properties dposh_properties;
692static struct dvb_usb_device_properties pinnacle_pctv310e_properties;
610 693
611static int m920x_probe(struct usb_interface *intf, 694static int m920x_probe(struct usb_interface *intf,
612 const struct usb_device_id *id) 695 const struct usb_device_id *id)
@@ -652,6 +735,13 @@ static int m920x_probe(struct usb_interface *intf,
652 goto found; 735 goto found;
653 } 736 }
654 737
738 ret = dvb_usb_device_init(intf, &pinnacle_pctv310e_properties,
739 THIS_MODULE, &d, adapter_nr);
740 if (ret == 0) {
741 rc_init_seq = pinnacle310e_init;
742 goto found;
743 }
744
655 return ret; 745 return ret;
656 } else { 746 } else {
657 /* Another interface on a multi-tuner device */ 747 /* Another interface on a multi-tuner device */
@@ -682,6 +772,7 @@ static struct usb_device_id m920x_table [] = {
682 USB_PID_LIFEVIEW_TV_WALKER_TWIN_WARM) }, 772 USB_PID_LIFEVIEW_TV_WALKER_TWIN_WARM) },
683 { USB_DEVICE(USB_VID_DPOSH, USB_PID_DPOSH_M9206_COLD) }, 773 { USB_DEVICE(USB_VID_DPOSH, USB_PID_DPOSH_M9206_COLD) },
684 { USB_DEVICE(USB_VID_DPOSH, USB_PID_DPOSH_M9206_WARM) }, 774 { USB_DEVICE(USB_VID_DPOSH, USB_PID_DPOSH_M9206_WARM) },
775 { USB_DEVICE(USB_VID_VISIONPLUS, USB_PID_PINNACLE_PCTV310E) },
685 { } /* Terminating entry */ 776 { } /* Terminating entry */
686}; 777};
687MODULE_DEVICE_TABLE (usb, m920x_table); 778MODULE_DEVICE_TABLE (usb, m920x_table);
@@ -895,6 +986,56 @@ static struct dvb_usb_device_properties dposh_properties = {
895 } 986 }
896}; 987};
897 988
989static struct dvb_usb_device_properties pinnacle_pctv310e_properties = {
990 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
991
992 .usb_ctrl = DEVICE_SPECIFIC,
993 .download_firmware = NULL,
994
995 .rc_interval = 100,
996 .rc_key_map = pinnacle310e_rc_keys,
997 .rc_key_map_size = ARRAY_SIZE(pinnacle310e_rc_keys),
998 .rc_query = m920x_rc_query,
999
1000 .size_of_priv = sizeof(struct m920x_state),
1001
1002 .identify_state = m920x_identify_state,
1003 .num_adapters = 1,
1004 .adapter = {{
1005 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
1006 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
1007
1008 .pid_filter_count = 8,
1009 .pid_filter = m920x_pid_filter,
1010 .pid_filter_ctrl = m920x_pid_filter_ctrl,
1011
1012 .frontend_attach = m920x_mt352_frontend_attach,
1013 .tuner_attach = m920x_fmd1216me_tuner_attach,
1014
1015 .stream = {
1016 .type = USB_ISOC,
1017 .count = 5,
1018 .endpoint = 0x84,
1019 .u = {
1020 .isoc = {
1021 .framesperurb = 128,
1022 .framesize = 564,
1023 .interval = 1,
1024 }
1025 }
1026 },
1027 } },
1028 .i2c_algo = &m920x_i2c_algo,
1029
1030 .num_device_descs = 1,
1031 .devices = {
1032 { "Pinnacle PCTV 310e",
1033 { &m920x_table[6], NULL },
1034 { NULL },
1035 }
1036 }
1037};
1038
898static struct usb_driver m920x_driver = { 1039static struct usb_driver m920x_driver = {
899 .name = "dvb_usb_m920x", 1040 .name = "dvb_usb_m920x",
900 .probe = m920x_probe, 1041 .probe = m920x_probe,
diff --git a/drivers/media/dvb/dvb-usb/m920x.h b/drivers/media/dvb/dvb-usb/m920x.h
index 37532890accd..3c061518ffc1 100644
--- a/drivers/media/dvb/dvb-usb/m920x.h
+++ b/drivers/media/dvb/dvb-usb/m920x.h
@@ -18,7 +18,7 @@
18#define M9206_FW 0x30 18#define M9206_FW 0x30
19 19
20#define M9206_MAX_FILTERS 8 20#define M9206_MAX_FILTERS 8
21#define M9206_MAX_ADAPTERS 2 21#define M9206_MAX_ADAPTERS 4
22 22
23/* 23/*
24sequences found in logs: 24sequences found in logs:
diff --git a/drivers/media/dvb/dvb-usb/opera1.c b/drivers/media/dvb/dvb-usb/opera1.c
index d4e230941679..830557696ae6 100644
--- a/drivers/media/dvb/dvb-usb/opera1.c
+++ b/drivers/media/dvb/dvb-usb/opera1.c
@@ -138,7 +138,7 @@ static int opera1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
138 (msg[i].addr<<1)|(msg[i].flags&I2C_M_RD?0x01:0), 138 (msg[i].addr<<1)|(msg[i].flags&I2C_M_RD?0x01:0),
139 msg[i].buf, 139 msg[i].buf,
140 msg[i].len 140 msg[i].len
141 )!= msg[i].len)) { 141 )) != msg[i].len) {
142 break; 142 break;
143 } 143 }
144 if (dvb_usb_opera1_debug & 0x10) 144 if (dvb_usb_opera1_debug & 0x10)
diff --git a/drivers/media/dvb/firewire/firedtv-1394.c b/drivers/media/dvb/firewire/firedtv-1394.c
index 7c5459c27b75..c3e0ec2dcfca 100644
--- a/drivers/media/dvb/firewire/firedtv-1394.c
+++ b/drivers/media/dvb/firewire/firedtv-1394.c
@@ -90,13 +90,14 @@ static inline struct node_entry *node_of(struct firedtv *fdtv)
90 return container_of(fdtv->device, struct unit_directory, device)->ne; 90 return container_of(fdtv->device, struct unit_directory, device)->ne;
91} 91}
92 92
93static int node_lock(struct firedtv *fdtv, u64 addr, __be32 data[]) 93static int node_lock(struct firedtv *fdtv, u64 addr, void *data)
94{ 94{
95 quadlet_t *d = data;
95 int ret; 96 int ret;
96 97
97 ret = hpsb_node_lock(node_of(fdtv), addr, EXTCODE_COMPARE_SWAP, 98 ret = hpsb_node_lock(node_of(fdtv), addr,
98 (__force quadlet_t *)&data[1], (__force quadlet_t)data[0]); 99 EXTCODE_COMPARE_SWAP, &d[1], d[0]);
99 data[0] = data[1]; 100 d[0] = d[1];
100 101
101 return ret; 102 return ret;
102} 103}
@@ -192,9 +193,13 @@ static int node_probe(struct device *dev)
192 int kv_len, err; 193 int kv_len, err;
193 void *kv_str; 194 void *kv_str;
194 195
195 kv_len = (ud->model_name_kv->value.leaf.len - 2) * sizeof(quadlet_t); 196 if (ud->model_name_kv) {
196 kv_str = CSR1212_TEXTUAL_DESCRIPTOR_LEAF_DATA(ud->model_name_kv); 197 kv_len = (ud->model_name_kv->value.leaf.len - 2) * 4;
197 198 kv_str = CSR1212_TEXTUAL_DESCRIPTOR_LEAF_DATA(ud->model_name_kv);
199 } else {
200 kv_len = 0;
201 kv_str = NULL;
202 }
198 fdtv = fdtv_alloc(dev, &fdtv_1394_backend, kv_str, kv_len); 203 fdtv = fdtv_alloc(dev, &fdtv_1394_backend, kv_str, kv_len);
199 if (!fdtv) 204 if (!fdtv)
200 return -ENOMEM; 205 return -ENOMEM;
diff --git a/drivers/media/dvb/firewire/firedtv-avc.c b/drivers/media/dvb/firewire/firedtv-avc.c
index 50c42a4b972b..1b31bebc27d6 100644
--- a/drivers/media/dvb/firewire/firedtv-avc.c
+++ b/drivers/media/dvb/firewire/firedtv-avc.c
@@ -74,7 +74,6 @@
74#define EN50221_TAG_CA_INFO 0x9f8031 74#define EN50221_TAG_CA_INFO 0x9f8031
75 75
76struct avc_command_frame { 76struct avc_command_frame {
77 int length;
78 u8 ctype; 77 u8 ctype;
79 u8 subunit; 78 u8 subunit;
80 u8 opcode; 79 u8 opcode;
@@ -82,13 +81,27 @@ struct avc_command_frame {
82}; 81};
83 82
84struct avc_response_frame { 83struct avc_response_frame {
85 int length;
86 u8 response; 84 u8 response;
87 u8 subunit; 85 u8 subunit;
88 u8 opcode; 86 u8 opcode;
89 u8 operand[509]; 87 u8 operand[509];
90}; 88};
91 89
90#define LAST_OPERAND (509 - 1)
91
92static inline void clear_operands(struct avc_command_frame *c, int from, int to)
93{
94 memset(&c->operand[from], 0, to - from + 1);
95}
96
97static void pad_operands(struct avc_command_frame *c, int from)
98{
99 int to = ALIGN(from, 4);
100
101 if (from <= to && to <= LAST_OPERAND)
102 clear_operands(c, from, to);
103}
104
92#define AVC_DEBUG_READ_DESCRIPTOR 0x0001 105#define AVC_DEBUG_READ_DESCRIPTOR 0x0001
93#define AVC_DEBUG_DSIT 0x0002 106#define AVC_DEBUG_DSIT 0x0002
94#define AVC_DEBUG_DSD 0x0004 107#define AVC_DEBUG_DSD 0x0004
@@ -202,78 +215,65 @@ static void debug_pmt(char *msg, int length)
202 16, 1, msg, length, false); 215 16, 1, msg, length, false);
203} 216}
204 217
205static int __avc_write(struct firedtv *fdtv, 218static int avc_write(struct firedtv *fdtv)
206 const struct avc_command_frame *c, struct avc_response_frame *r)
207{ 219{
208 int err, retry; 220 int err, retry;
209 221
210 if (r) 222 fdtv->avc_reply_received = false;
211 fdtv->avc_reply_received = false;
212 223
213 for (retry = 0; retry < 6; retry++) { 224 for (retry = 0; retry < 6; retry++) {
214 if (unlikely(avc_debug)) 225 if (unlikely(avc_debug))
215 debug_fcp(&c->ctype, c->length); 226 debug_fcp(fdtv->avc_data, fdtv->avc_data_length);
216 227
217 err = fdtv->backend->write(fdtv, FCP_COMMAND_REGISTER, 228 err = fdtv->backend->write(fdtv, FCP_COMMAND_REGISTER,
218 (void *)&c->ctype, c->length); 229 fdtv->avc_data, fdtv->avc_data_length);
219 if (err) { 230 if (err) {
220 fdtv->avc_reply_received = true;
221 dev_err(fdtv->device, "FCP command write failed\n"); 231 dev_err(fdtv->device, "FCP command write failed\n");
232
222 return err; 233 return err;
223 } 234 }
224 235
225 if (!r)
226 return 0;
227
228 /* 236 /*
229 * AV/C specs say that answers should be sent within 150 ms. 237 * AV/C specs say that answers should be sent within 150 ms.
230 * Time out after 200 ms. 238 * Time out after 200 ms.
231 */ 239 */
232 if (wait_event_timeout(fdtv->avc_wait, 240 if (wait_event_timeout(fdtv->avc_wait,
233 fdtv->avc_reply_received, 241 fdtv->avc_reply_received,
234 msecs_to_jiffies(200)) != 0) { 242 msecs_to_jiffies(200)) != 0)
235 r->length = fdtv->response_length;
236 memcpy(&r->response, fdtv->response, r->length);
237
238 return 0; 243 return 0;
239 }
240 } 244 }
241 dev_err(fdtv->device, "FCP response timed out\n"); 245 dev_err(fdtv->device, "FCP response timed out\n");
246
242 return -ETIMEDOUT; 247 return -ETIMEDOUT;
243} 248}
244 249
245static int avc_write(struct firedtv *fdtv, 250static bool is_register_rc(struct avc_response_frame *r)
246 const struct avc_command_frame *c, struct avc_response_frame *r)
247{ 251{
248 int ret; 252 return r->opcode == AVC_OPCODE_VENDOR &&
249 253 r->operand[0] == SFE_VENDOR_DE_COMPANYID_0 &&
250 if (mutex_lock_interruptible(&fdtv->avc_mutex)) 254 r->operand[1] == SFE_VENDOR_DE_COMPANYID_1 &&
251 return -EINTR; 255 r->operand[2] == SFE_VENDOR_DE_COMPANYID_2 &&
252 256 r->operand[3] == SFE_VENDOR_OPCODE_REGISTER_REMOTE_CONTROL;
253 ret = __avc_write(fdtv, c, r);
254
255 mutex_unlock(&fdtv->avc_mutex);
256 return ret;
257} 257}
258 258
259int avc_recv(struct firedtv *fdtv, void *data, size_t length) 259int avc_recv(struct firedtv *fdtv, void *data, size_t length)
260{ 260{
261 struct avc_response_frame *r = 261 struct avc_response_frame *r = data;
262 data - offsetof(struct avc_response_frame, response);
263 262
264 if (unlikely(avc_debug)) 263 if (unlikely(avc_debug))
265 debug_fcp(data, length); 264 debug_fcp(data, length);
266 265
267 if (length >= 8 && 266 if (length >= 8 && is_register_rc(r)) {
268 r->operand[0] == SFE_VENDOR_DE_COMPANYID_0 && 267 switch (r->response) {
269 r->operand[1] == SFE_VENDOR_DE_COMPANYID_1 && 268 case AVC_RESPONSE_CHANGED:
270 r->operand[2] == SFE_VENDOR_DE_COMPANYID_2 && 269 fdtv_handle_rc(fdtv, r->operand[4] << 8 | r->operand[5]);
271 r->operand[3] == SFE_VENDOR_OPCODE_REGISTER_REMOTE_CONTROL) {
272 if (r->response == AVC_RESPONSE_CHANGED) {
273 fdtv_handle_rc(fdtv,
274 r->operand[4] << 8 | r->operand[5]);
275 schedule_work(&fdtv->remote_ctrl_work); 270 schedule_work(&fdtv->remote_ctrl_work);
276 } else if (r->response != AVC_RESPONSE_INTERIM) { 271 break;
272 case AVC_RESPONSE_INTERIM:
273 if (is_register_rc((void *)fdtv->avc_data))
274 goto wake;
275 break;
276 default:
277 dev_info(fdtv->device, 277 dev_info(fdtv->device,
278 "remote control result = %d\n", r->response); 278 "remote control result = %d\n", r->response);
279 } 279 }
@@ -285,9 +285,9 @@ int avc_recv(struct firedtv *fdtv, void *data, size_t length)
285 return -EIO; 285 return -EIO;
286 } 286 }
287 287
288 memcpy(fdtv->response, data, length); 288 memcpy(fdtv->avc_data, data, length);
289 fdtv->response_length = length; 289 fdtv->avc_data_length = length;
290 290wake:
291 fdtv->avc_reply_received = true; 291 fdtv->avc_reply_received = true;
292 wake_up(&fdtv->avc_wait); 292 wake_up(&fdtv->avc_wait);
293 293
@@ -318,10 +318,11 @@ static int add_pid_filter(struct firedtv *fdtv, u8 *operand)
318 * tuning command for setting the relative LNB frequency 318 * tuning command for setting the relative LNB frequency
319 * (not supported by the AVC standard) 319 * (not supported by the AVC standard)
320 */ 320 */
321static void avc_tuner_tuneqpsk(struct firedtv *fdtv, 321static int avc_tuner_tuneqpsk(struct firedtv *fdtv,
322 struct dvb_frontend_parameters *params, 322 struct dvb_frontend_parameters *params)
323 struct avc_command_frame *c)
324{ 323{
324 struct avc_command_frame *c = (void *)fdtv->avc_data;
325
325 c->opcode = AVC_OPCODE_VENDOR; 326 c->opcode = AVC_OPCODE_VENDOR;
326 327
327 c->operand[0] = SFE_VENDOR_DE_COMPANYID_0; 328 c->operand[0] = SFE_VENDOR_DE_COMPANYID_0;
@@ -370,16 +371,18 @@ static void avc_tuner_tuneqpsk(struct firedtv *fdtv,
370 c->operand[13] = 0x1; 371 c->operand[13] = 0x1;
371 c->operand[14] = 0xff; 372 c->operand[14] = 0xff;
372 c->operand[15] = 0xff; 373 c->operand[15] = 0xff;
373 c->length = 20; 374
375 return 16;
374 } else { 376 } else {
375 c->length = 16; 377 return 13;
376 } 378 }
377} 379}
378 380
379static void avc_tuner_dsd_dvb_c(struct firedtv *fdtv, 381static int avc_tuner_dsd_dvb_c(struct firedtv *fdtv,
380 struct dvb_frontend_parameters *params, 382 struct dvb_frontend_parameters *params)
381 struct avc_command_frame *c)
382{ 383{
384 struct avc_command_frame *c = (void *)fdtv->avc_data;
385
383 c->opcode = AVC_OPCODE_DSD; 386 c->opcode = AVC_OPCODE_DSD;
384 387
385 c->operand[0] = 0; /* source plug */ 388 c->operand[0] = 0; /* source plug */
@@ -440,15 +443,14 @@ static void avc_tuner_dsd_dvb_c(struct firedtv *fdtv,
440 c->operand[20] = 0x00; 443 c->operand[20] = 0x00;
441 c->operand[21] = 0x00; 444 c->operand[21] = 0x00;
442 445
443 /* Add PIDs to filter */ 446 return 22 + add_pid_filter(fdtv, &c->operand[22]);
444 c->length = ALIGN(22 + add_pid_filter(fdtv, &c->operand[22]) + 3, 4);
445} 447}
446 448
447static void avc_tuner_dsd_dvb_t(struct firedtv *fdtv, 449static int avc_tuner_dsd_dvb_t(struct firedtv *fdtv,
448 struct dvb_frontend_parameters *params, 450 struct dvb_frontend_parameters *params)
449 struct avc_command_frame *c)
450{ 451{
451 struct dvb_ofdm_parameters *ofdm = &params->u.ofdm; 452 struct dvb_ofdm_parameters *ofdm = &params->u.ofdm;
453 struct avc_command_frame *c = (void *)fdtv->avc_data;
452 454
453 c->opcode = AVC_OPCODE_DSD; 455 c->opcode = AVC_OPCODE_DSD;
454 456
@@ -543,55 +545,58 @@ static void avc_tuner_dsd_dvb_t(struct firedtv *fdtv,
543 c->operand[15] = 0x00; /* network_ID[0] */ 545 c->operand[15] = 0x00; /* network_ID[0] */
544 c->operand[16] = 0x00; /* network_ID[1] */ 546 c->operand[16] = 0x00; /* network_ID[1] */
545 547
546 /* Add PIDs to filter */ 548 return 17 + add_pid_filter(fdtv, &c->operand[17]);
547 c->length = ALIGN(17 + add_pid_filter(fdtv, &c->operand[17]) + 3, 4);
548} 549}
549 550
550int avc_tuner_dsd(struct firedtv *fdtv, 551int avc_tuner_dsd(struct firedtv *fdtv,
551 struct dvb_frontend_parameters *params) 552 struct dvb_frontend_parameters *params)
552{ 553{
553 char buffer[sizeof(struct avc_command_frame)]; 554 struct avc_command_frame *c = (void *)fdtv->avc_data;
554 struct avc_command_frame *c = (void *)buffer; 555 int pos, ret;
555 struct avc_response_frame *r = (void *)buffer; /* FIXME: unused */
556 556
557 memset(c, 0, sizeof(*c)); 557 mutex_lock(&fdtv->avc_mutex);
558 558
559 c->ctype = AVC_CTYPE_CONTROL; 559 c->ctype = AVC_CTYPE_CONTROL;
560 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 560 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
561 561
562 switch (fdtv->type) { 562 switch (fdtv->type) {
563 case FIREDTV_DVB_S: 563 case FIREDTV_DVB_S:
564 case FIREDTV_DVB_S2: avc_tuner_tuneqpsk(fdtv, params, c); break; 564 case FIREDTV_DVB_S2: pos = avc_tuner_tuneqpsk(fdtv, params); break;
565 case FIREDTV_DVB_C: avc_tuner_dsd_dvb_c(fdtv, params, c); break; 565 case FIREDTV_DVB_C: pos = avc_tuner_dsd_dvb_c(fdtv, params); break;
566 case FIREDTV_DVB_T: avc_tuner_dsd_dvb_t(fdtv, params, c); break; 566 case FIREDTV_DVB_T: pos = avc_tuner_dsd_dvb_t(fdtv, params); break;
567 default: 567 default:
568 BUG(); 568 BUG();
569 } 569 }
570 pad_operands(c, pos);
570 571
571 if (avc_write(fdtv, c, r) < 0) 572 fdtv->avc_data_length = ALIGN(3 + pos, 4);
572 return -EIO; 573 ret = avc_write(fdtv);
573
574 msleep(500);
575#if 0 574#if 0
576 /* FIXME: */ 575 /*
577 /* u8 *status was an out-parameter of avc_tuner_dsd, unused by caller */ 576 * FIXME:
577 * u8 *status was an out-parameter of avc_tuner_dsd, unused by caller.
578 * Check for AVC_RESPONSE_ACCEPTED here instead?
579 */
578 if (status) 580 if (status)
579 *status = r->operand[2]; 581 *status = r->operand[2];
580#endif 582#endif
581 return 0; 583 mutex_unlock(&fdtv->avc_mutex);
584
585 if (ret == 0)
586 msleep(500);
587
588 return ret;
582} 589}
583 590
584int avc_tuner_set_pids(struct firedtv *fdtv, unsigned char pidc, u16 pid[]) 591int avc_tuner_set_pids(struct firedtv *fdtv, unsigned char pidc, u16 pid[])
585{ 592{
586 char buffer[sizeof(struct avc_command_frame)]; 593 struct avc_command_frame *c = (void *)fdtv->avc_data;
587 struct avc_command_frame *c = (void *)buffer; 594 int ret, pos, k;
588 struct avc_response_frame *r = (void *)buffer; /* FIXME: unused */
589 int pos, k;
590 595
591 if (pidc > 16 && pidc != 0xff) 596 if (pidc > 16 && pidc != 0xff)
592 return -EINVAL; 597 return -EINVAL;
593 598
594 memset(c, 0, sizeof(*c)); 599 mutex_lock(&fdtv->avc_mutex);
595 600
596 c->ctype = AVC_CTYPE_CONTROL; 601 c->ctype = AVC_CTYPE_CONTROL;
597 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 602 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -614,24 +619,27 @@ int avc_tuner_set_pids(struct firedtv *fdtv, unsigned char pidc, u16 pid[])
614 c->operand[pos++] = 0x00; /* tableID */ 619 c->operand[pos++] = 0x00; /* tableID */
615 c->operand[pos++] = 0x00; /* filter_length */ 620 c->operand[pos++] = 0x00; /* filter_length */
616 } 621 }
622 pad_operands(c, pos);
617 623
618 c->length = ALIGN(3 + pos, 4); 624 fdtv->avc_data_length = ALIGN(3 + pos, 4);
625 ret = avc_write(fdtv);
619 626
620 if (avc_write(fdtv, c, r) < 0) 627 /* FIXME: check response code? */
621 return -EIO;
622 628
623 msleep(50); 629 mutex_unlock(&fdtv->avc_mutex);
624 return 0; 630
631 if (ret == 0)
632 msleep(50);
633
634 return ret;
625} 635}
626 636
627int avc_tuner_get_ts(struct firedtv *fdtv) 637int avc_tuner_get_ts(struct firedtv *fdtv)
628{ 638{
629 char buffer[sizeof(struct avc_command_frame)]; 639 struct avc_command_frame *c = (void *)fdtv->avc_data;
630 struct avc_command_frame *c = (void *)buffer; 640 int ret, sl;
631 struct avc_response_frame *r = (void *)buffer; /* FIXME: unused */
632 int sl;
633 641
634 memset(c, 0, sizeof(*c)); 642 mutex_lock(&fdtv->avc_mutex);
635 643
636 c->ctype = AVC_CTYPE_CONTROL; 644 c->ctype = AVC_CTYPE_CONTROL;
637 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 645 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -646,26 +654,33 @@ int avc_tuner_get_ts(struct firedtv *fdtv)
646 c->operand[4] = 0x00; /* antenna number */ 654 c->operand[4] = 0x00; /* antenna number */
647 c->operand[5] = 0x0; /* system_specific_search_flags */ 655 c->operand[5] = 0x0; /* system_specific_search_flags */
648 c->operand[6] = sl; /* system_specific_multiplex selection_length */ 656 c->operand[6] = sl; /* system_specific_multiplex selection_length */
649 c->operand[7] = 0x00; /* valid_flags [0] */ 657 /*
650 c->operand[8] = 0x00; /* valid_flags [1] */ 658 * operand[7]: valid_flags[0]
651 c->operand[7 + sl] = 0x00; /* nr_of_dsit_sel_specs (always 0) */ 659 * operand[8]: valid_flags[1]
660 * operand[7 + sl]: nr_of_dsit_sel_specs (always 0)
661 */
662 clear_operands(c, 7, 24);
652 663
653 c->length = fdtv->type == FIREDTV_DVB_T ? 24 : 28; 664 fdtv->avc_data_length = fdtv->type == FIREDTV_DVB_T ? 24 : 28;
665 ret = avc_write(fdtv);
654 666
655 if (avc_write(fdtv, c, r) < 0) 667 /* FIXME: check response code? */
656 return -EIO;
657 668
658 msleep(250); 669 mutex_unlock(&fdtv->avc_mutex);
659 return 0; 670
671 if (ret == 0)
672 msleep(250);
673
674 return ret;
660} 675}
661 676
662int avc_identify_subunit(struct firedtv *fdtv) 677int avc_identify_subunit(struct firedtv *fdtv)
663{ 678{
664 char buffer[sizeof(struct avc_command_frame)]; 679 struct avc_command_frame *c = (void *)fdtv->avc_data;
665 struct avc_command_frame *c = (void *)buffer; 680 struct avc_response_frame *r = (void *)fdtv->avc_data;
666 struct avc_response_frame *r = (void *)buffer; 681 int ret;
667 682
668 memset(c, 0, sizeof(*c)); 683 mutex_lock(&fdtv->avc_mutex);
669 684
670 c->ctype = AVC_CTYPE_CONTROL; 685 c->ctype = AVC_CTYPE_CONTROL;
671 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 686 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -678,31 +693,34 @@ int avc_identify_subunit(struct firedtv *fdtv)
678 c->operand[4] = 0x08; /* length lowbyte */ 693 c->operand[4] = 0x08; /* length lowbyte */
679 c->operand[5] = 0x00; /* offset highbyte */ 694 c->operand[5] = 0x00; /* offset highbyte */
680 c->operand[6] = 0x0d; /* offset lowbyte */ 695 c->operand[6] = 0x0d; /* offset lowbyte */
696 clear_operands(c, 7, 8); /* padding */
681 697
682 c->length = 12; 698 fdtv->avc_data_length = 12;
683 699 ret = avc_write(fdtv);
684 if (avc_write(fdtv, c, r) < 0) 700 if (ret < 0)
685 return -EIO; 701 goto out;
686 702
687 if ((r->response != AVC_RESPONSE_STABLE && 703 if ((r->response != AVC_RESPONSE_STABLE &&
688 r->response != AVC_RESPONSE_ACCEPTED) || 704 r->response != AVC_RESPONSE_ACCEPTED) ||
689 (r->operand[3] << 8) + r->operand[4] != 8) { 705 (r->operand[3] << 8) + r->operand[4] != 8) {
690 dev_err(fdtv->device, "cannot read subunit identifier\n"); 706 dev_err(fdtv->device, "cannot read subunit identifier\n");
691 return -EINVAL; 707 ret = -EINVAL;
692 } 708 }
693 return 0; 709out:
710 mutex_unlock(&fdtv->avc_mutex);
711
712 return ret;
694} 713}
695 714
696#define SIZEOF_ANTENNA_INPUT_INFO 22 715#define SIZEOF_ANTENNA_INPUT_INFO 22
697 716
698int avc_tuner_status(struct firedtv *fdtv, struct firedtv_tuner_status *stat) 717int avc_tuner_status(struct firedtv *fdtv, struct firedtv_tuner_status *stat)
699{ 718{
700 char buffer[sizeof(struct avc_command_frame)]; 719 struct avc_command_frame *c = (void *)fdtv->avc_data;
701 struct avc_command_frame *c = (void *)buffer; 720 struct avc_response_frame *r = (void *)fdtv->avc_data;
702 struct avc_response_frame *r = (void *)buffer; 721 int length, ret;
703 int length;
704 722
705 memset(c, 0, sizeof(*c)); 723 mutex_lock(&fdtv->avc_mutex);
706 724
707 c->ctype = AVC_CTYPE_CONTROL; 725 c->ctype = AVC_CTYPE_CONTROL;
708 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 726 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -710,27 +728,30 @@ int avc_tuner_status(struct firedtv *fdtv, struct firedtv_tuner_status *stat)
710 728
711 c->operand[0] = DESCRIPTOR_TUNER_STATUS; 729 c->operand[0] = DESCRIPTOR_TUNER_STATUS;
712 c->operand[1] = 0xff; /* read_result_status */ 730 c->operand[1] = 0xff; /* read_result_status */
713 c->operand[2] = 0x00; /* reserved */ 731 /*
714 c->operand[3] = 0; /* SIZEOF_ANTENNA_INPUT_INFO >> 8; */ 732 * operand[2]: reserved
715 c->operand[4] = 0; /* SIZEOF_ANTENNA_INPUT_INFO & 0xff; */ 733 * operand[3]: SIZEOF_ANTENNA_INPUT_INFO >> 8
716 c->operand[5] = 0x00; 734 * operand[4]: SIZEOF_ANTENNA_INPUT_INFO & 0xff
717 c->operand[6] = 0x00; 735 */
718 736 clear_operands(c, 2, 31);
719 c->length = 12; 737
720 738 fdtv->avc_data_length = 12;
721 if (avc_write(fdtv, c, r) < 0) 739 ret = avc_write(fdtv);
722 return -EIO; 740 if (ret < 0)
741 goto out;
723 742
724 if (r->response != AVC_RESPONSE_STABLE && 743 if (r->response != AVC_RESPONSE_STABLE &&
725 r->response != AVC_RESPONSE_ACCEPTED) { 744 r->response != AVC_RESPONSE_ACCEPTED) {
726 dev_err(fdtv->device, "cannot read tuner status\n"); 745 dev_err(fdtv->device, "cannot read tuner status\n");
727 return -EINVAL; 746 ret = -EINVAL;
747 goto out;
728 } 748 }
729 749
730 length = r->operand[9]; 750 length = r->operand[9];
731 if (r->operand[1] != 0x10 || length != SIZEOF_ANTENNA_INPUT_INFO) { 751 if (r->operand[1] != 0x10 || length != SIZEOF_ANTENNA_INPUT_INFO) {
732 dev_err(fdtv->device, "got invalid tuner status\n"); 752 dev_err(fdtv->device, "got invalid tuner status\n");
733 return -EINVAL; 753 ret = -EINVAL;
754 goto out;
734 } 755 }
735 756
736 stat->active_system = r->operand[10]; 757 stat->active_system = r->operand[10];
@@ -766,20 +787,21 @@ int avc_tuner_status(struct firedtv *fdtv, struct firedtv_tuner_status *stat)
766 stat->ca_dvb_flag = r->operand[31] >> 3 & 1; 787 stat->ca_dvb_flag = r->operand[31] >> 3 & 1;
767 stat->ca_error_flag = r->operand[31] >> 2 & 1; 788 stat->ca_error_flag = r->operand[31] >> 2 & 1;
768 stat->ca_initialization_status = r->operand[31] >> 1 & 1; 789 stat->ca_initialization_status = r->operand[31] >> 1 & 1;
790out:
791 mutex_unlock(&fdtv->avc_mutex);
769 792
770 return 0; 793 return ret;
771} 794}
772 795
773int avc_lnb_control(struct firedtv *fdtv, char voltage, char burst, 796int avc_lnb_control(struct firedtv *fdtv, char voltage, char burst,
774 char conttone, char nrdiseq, 797 char conttone, char nrdiseq,
775 struct dvb_diseqc_master_cmd *diseqcmd) 798 struct dvb_diseqc_master_cmd *diseqcmd)
776{ 799{
777 char buffer[sizeof(struct avc_command_frame)]; 800 struct avc_command_frame *c = (void *)fdtv->avc_data;
778 struct avc_command_frame *c = (void *)buffer; 801 struct avc_response_frame *r = (void *)fdtv->avc_data;
779 struct avc_response_frame *r = (void *)buffer; 802 int pos, j, k, ret;
780 int i, j, k;
781 803
782 memset(c, 0, sizeof(*c)); 804 mutex_lock(&fdtv->avc_mutex);
783 805
784 c->ctype = AVC_CTYPE_CONTROL; 806 c->ctype = AVC_CTYPE_CONTROL;
785 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 807 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -789,41 +811,41 @@ int avc_lnb_control(struct firedtv *fdtv, char voltage, char burst,
789 c->operand[1] = SFE_VENDOR_DE_COMPANYID_1; 811 c->operand[1] = SFE_VENDOR_DE_COMPANYID_1;
790 c->operand[2] = SFE_VENDOR_DE_COMPANYID_2; 812 c->operand[2] = SFE_VENDOR_DE_COMPANYID_2;
791 c->operand[3] = SFE_VENDOR_OPCODE_LNB_CONTROL; 813 c->operand[3] = SFE_VENDOR_OPCODE_LNB_CONTROL;
792
793 c->operand[4] = voltage; 814 c->operand[4] = voltage;
794 c->operand[5] = nrdiseq; 815 c->operand[5] = nrdiseq;
795 816
796 i = 6; 817 pos = 6;
797
798 for (j = 0; j < nrdiseq; j++) { 818 for (j = 0; j < nrdiseq; j++) {
799 c->operand[i++] = diseqcmd[j].msg_len; 819 c->operand[pos++] = diseqcmd[j].msg_len;
800 820
801 for (k = 0; k < diseqcmd[j].msg_len; k++) 821 for (k = 0; k < diseqcmd[j].msg_len; k++)
802 c->operand[i++] = diseqcmd[j].msg[k]; 822 c->operand[pos++] = diseqcmd[j].msg[k];
803 } 823 }
824 c->operand[pos++] = burst;
825 c->operand[pos++] = conttone;
826 pad_operands(c, pos);
804 827
805 c->operand[i++] = burst; 828 fdtv->avc_data_length = ALIGN(3 + pos, 4);
806 c->operand[i++] = conttone; 829 ret = avc_write(fdtv);
807 830 if (ret < 0)
808 c->length = ALIGN(3 + i, 4); 831 goto out;
809
810 if (avc_write(fdtv, c, r) < 0)
811 return -EIO;
812 832
813 if (r->response != AVC_RESPONSE_ACCEPTED) { 833 if (r->response != AVC_RESPONSE_ACCEPTED) {
814 dev_err(fdtv->device, "LNB control failed\n"); 834 dev_err(fdtv->device, "LNB control failed\n");
815 return -EINVAL; 835 ret = -EINVAL;
816 } 836 }
837out:
838 mutex_unlock(&fdtv->avc_mutex);
817 839
818 return 0; 840 return ret;
819} 841}
820 842
821int avc_register_remote_control(struct firedtv *fdtv) 843int avc_register_remote_control(struct firedtv *fdtv)
822{ 844{
823 char buffer[sizeof(struct avc_command_frame)]; 845 struct avc_command_frame *c = (void *)fdtv->avc_data;
824 struct avc_command_frame *c = (void *)buffer; 846 int ret;
825 847
826 memset(c, 0, sizeof(*c)); 848 mutex_lock(&fdtv->avc_mutex);
827 849
828 c->ctype = AVC_CTYPE_NOTIFY; 850 c->ctype = AVC_CTYPE_NOTIFY;
829 c->subunit = AVC_SUBUNIT_TYPE_UNIT | 7; 851 c->subunit = AVC_SUBUNIT_TYPE_UNIT | 7;
@@ -833,10 +855,16 @@ int avc_register_remote_control(struct firedtv *fdtv)
833 c->operand[1] = SFE_VENDOR_DE_COMPANYID_1; 855 c->operand[1] = SFE_VENDOR_DE_COMPANYID_1;
834 c->operand[2] = SFE_VENDOR_DE_COMPANYID_2; 856 c->operand[2] = SFE_VENDOR_DE_COMPANYID_2;
835 c->operand[3] = SFE_VENDOR_OPCODE_REGISTER_REMOTE_CONTROL; 857 c->operand[3] = SFE_VENDOR_OPCODE_REGISTER_REMOTE_CONTROL;
858 c->operand[4] = 0; /* padding */
859
860 fdtv->avc_data_length = 8;
861 ret = avc_write(fdtv);
836 862
837 c->length = 8; 863 /* FIXME: check response code? */
838 864
839 return avc_write(fdtv, c, NULL); 865 mutex_unlock(&fdtv->avc_mutex);
866
867 return ret;
840} 868}
841 869
842void avc_remote_ctrl_work(struct work_struct *work) 870void avc_remote_ctrl_work(struct work_struct *work)
@@ -851,11 +879,10 @@ void avc_remote_ctrl_work(struct work_struct *work)
851#if 0 /* FIXME: unused */ 879#if 0 /* FIXME: unused */
852int avc_tuner_host2ca(struct firedtv *fdtv) 880int avc_tuner_host2ca(struct firedtv *fdtv)
853{ 881{
854 char buffer[sizeof(struct avc_command_frame)]; 882 struct avc_command_frame *c = (void *)fdtv->avc_data;
855 struct avc_command_frame *c = (void *)buffer; 883 int ret;
856 struct avc_response_frame *r = (void *)buffer; /* FIXME: unused */
857 884
858 memset(c, 0, sizeof(*c)); 885 mutex_lock(&fdtv->avc_mutex);
859 886
860 c->ctype = AVC_CTYPE_CONTROL; 887 c->ctype = AVC_CTYPE_CONTROL;
861 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 888 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -867,15 +894,16 @@ int avc_tuner_host2ca(struct firedtv *fdtv)
867 c->operand[3] = SFE_VENDOR_OPCODE_HOST2CA; 894 c->operand[3] = SFE_VENDOR_OPCODE_HOST2CA;
868 c->operand[4] = 0; /* slot */ 895 c->operand[4] = 0; /* slot */
869 c->operand[5] = SFE_VENDOR_TAG_CA_APPLICATION_INFO; /* ca tag */ 896 c->operand[5] = SFE_VENDOR_TAG_CA_APPLICATION_INFO; /* ca tag */
870 c->operand[6] = 0; /* more/last */ 897 clear_operands(c, 6, 8);
871 c->operand[7] = 0; /* length */
872 898
873 c->length = 12; 899 fdtv->avc_data_length = 12;
900 ret = avc_write(fdtv);
874 901
875 if (avc_write(fdtv, c, r) < 0) 902 /* FIXME: check response code? */
876 return -EIO;
877 903
878 return 0; 904 mutex_unlock(&fdtv->avc_mutex);
905
906 return ret;
879} 907}
880#endif 908#endif
881 909
@@ -906,12 +934,11 @@ static int get_ca_object_length(struct avc_response_frame *r)
906 934
907int avc_ca_app_info(struct firedtv *fdtv, char *app_info, unsigned int *len) 935int avc_ca_app_info(struct firedtv *fdtv, char *app_info, unsigned int *len)
908{ 936{
909 char buffer[sizeof(struct avc_command_frame)]; 937 struct avc_command_frame *c = (void *)fdtv->avc_data;
910 struct avc_command_frame *c = (void *)buffer; 938 struct avc_response_frame *r = (void *)fdtv->avc_data;
911 struct avc_response_frame *r = (void *)buffer; 939 int pos, ret;
912 int pos;
913 940
914 memset(c, 0, sizeof(*c)); 941 mutex_lock(&fdtv->avc_mutex);
915 942
916 c->ctype = AVC_CTYPE_STATUS; 943 c->ctype = AVC_CTYPE_STATUS;
917 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 944 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -923,11 +950,12 @@ int avc_ca_app_info(struct firedtv *fdtv, char *app_info, unsigned int *len)
923 c->operand[3] = SFE_VENDOR_OPCODE_CA2HOST; 950 c->operand[3] = SFE_VENDOR_OPCODE_CA2HOST;
924 c->operand[4] = 0; /* slot */ 951 c->operand[4] = 0; /* slot */
925 c->operand[5] = SFE_VENDOR_TAG_CA_APPLICATION_INFO; /* ca tag */ 952 c->operand[5] = SFE_VENDOR_TAG_CA_APPLICATION_INFO; /* ca tag */
953 clear_operands(c, 6, LAST_OPERAND);
926 954
927 c->length = 12; 955 fdtv->avc_data_length = 12;
928 956 ret = avc_write(fdtv);
929 if (avc_write(fdtv, c, r) < 0) 957 if (ret < 0)
930 return -EIO; 958 goto out;
931 959
932 /* FIXME: check response code and validate response data */ 960 /* FIXME: check response code and validate response data */
933 961
@@ -939,18 +967,19 @@ int avc_ca_app_info(struct firedtv *fdtv, char *app_info, unsigned int *len)
939 app_info[4] = 0x01; 967 app_info[4] = 0x01;
940 memcpy(&app_info[5], &r->operand[pos], 5 + r->operand[pos + 4]); 968 memcpy(&app_info[5], &r->operand[pos], 5 + r->operand[pos + 4]);
941 *len = app_info[3] + 4; 969 *len = app_info[3] + 4;
970out:
971 mutex_unlock(&fdtv->avc_mutex);
942 972
943 return 0; 973 return ret;
944} 974}
945 975
946int avc_ca_info(struct firedtv *fdtv, char *app_info, unsigned int *len) 976int avc_ca_info(struct firedtv *fdtv, char *app_info, unsigned int *len)
947{ 977{
948 char buffer[sizeof(struct avc_command_frame)]; 978 struct avc_command_frame *c = (void *)fdtv->avc_data;
949 struct avc_command_frame *c = (void *)buffer; 979 struct avc_response_frame *r = (void *)fdtv->avc_data;
950 struct avc_response_frame *r = (void *)buffer; 980 int pos, ret;
951 int pos;
952 981
953 memset(c, 0, sizeof(*c)); 982 mutex_lock(&fdtv->avc_mutex);
954 983
955 c->ctype = AVC_CTYPE_STATUS; 984 c->ctype = AVC_CTYPE_STATUS;
956 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 985 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -962,11 +991,14 @@ int avc_ca_info(struct firedtv *fdtv, char *app_info, unsigned int *len)
962 c->operand[3] = SFE_VENDOR_OPCODE_CA2HOST; 991 c->operand[3] = SFE_VENDOR_OPCODE_CA2HOST;
963 c->operand[4] = 0; /* slot */ 992 c->operand[4] = 0; /* slot */
964 c->operand[5] = SFE_VENDOR_TAG_CA_APPLICATION_INFO; /* ca tag */ 993 c->operand[5] = SFE_VENDOR_TAG_CA_APPLICATION_INFO; /* ca tag */
994 clear_operands(c, 6, LAST_OPERAND);
965 995
966 c->length = 12; 996 fdtv->avc_data_length = 12;
997 ret = avc_write(fdtv);
998 if (ret < 0)
999 goto out;
967 1000
968 if (avc_write(fdtv, c, r) < 0) 1001 /* FIXME: check response code and validate response data */
969 return -EIO;
970 1002
971 pos = get_ca_object_pos(r); 1003 pos = get_ca_object_pos(r);
972 app_info[0] = (EN50221_TAG_CA_INFO >> 16) & 0xff; 1004 app_info[0] = (EN50221_TAG_CA_INFO >> 16) & 0xff;
@@ -976,17 +1008,18 @@ int avc_ca_info(struct firedtv *fdtv, char *app_info, unsigned int *len)
976 app_info[4] = r->operand[pos + 0]; 1008 app_info[4] = r->operand[pos + 0];
977 app_info[5] = r->operand[pos + 1]; 1009 app_info[5] = r->operand[pos + 1];
978 *len = app_info[3] + 4; 1010 *len = app_info[3] + 4;
1011out:
1012 mutex_unlock(&fdtv->avc_mutex);
979 1013
980 return 0; 1014 return ret;
981} 1015}
982 1016
983int avc_ca_reset(struct firedtv *fdtv) 1017int avc_ca_reset(struct firedtv *fdtv)
984{ 1018{
985 char buffer[sizeof(struct avc_command_frame)]; 1019 struct avc_command_frame *c = (void *)fdtv->avc_data;
986 struct avc_command_frame *c = (void *)buffer; 1020 int ret;
987 struct avc_response_frame *r = (void *)buffer; /* FIXME: unused */
988 1021
989 memset(c, 0, sizeof(*c)); 1022 mutex_lock(&fdtv->avc_mutex);
990 1023
991 c->ctype = AVC_CTYPE_CONTROL; 1024 c->ctype = AVC_CTYPE_CONTROL;
992 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 1025 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -1002,19 +1035,20 @@ int avc_ca_reset(struct firedtv *fdtv)
1002 c->operand[7] = 1; /* length */ 1035 c->operand[7] = 1; /* length */
1003 c->operand[8] = 0; /* force hardware reset */ 1036 c->operand[8] = 0; /* force hardware reset */
1004 1037
1005 c->length = 12; 1038 fdtv->avc_data_length = 12;
1039 ret = avc_write(fdtv);
1006 1040
1007 if (avc_write(fdtv, c, r) < 0) 1041 /* FIXME: check response code? */
1008 return -EIO;
1009 1042
1010 return 0; 1043 mutex_unlock(&fdtv->avc_mutex);
1044
1045 return ret;
1011} 1046}
1012 1047
1013int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length) 1048int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1014{ 1049{
1015 char buffer[sizeof(struct avc_command_frame)]; 1050 struct avc_command_frame *c = (void *)fdtv->avc_data;
1016 struct avc_command_frame *c = (void *)buffer; 1051 struct avc_response_frame *r = (void *)fdtv->avc_data;
1017 struct avc_response_frame *r = (void *)buffer;
1018 int list_management; 1052 int list_management;
1019 int program_info_length; 1053 int program_info_length;
1020 int pmt_cmd_id; 1054 int pmt_cmd_id;
@@ -1022,11 +1056,12 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1022 int write_pos; 1056 int write_pos;
1023 int es_info_length; 1057 int es_info_length;
1024 int crc32_csum; 1058 int crc32_csum;
1059 int ret;
1025 1060
1026 if (unlikely(avc_debug & AVC_DEBUG_APPLICATION_PMT)) 1061 if (unlikely(avc_debug & AVC_DEBUG_APPLICATION_PMT))
1027 debug_pmt(msg, length); 1062 debug_pmt(msg, length);
1028 1063
1029 memset(c, 0, sizeof(*c)); 1064 mutex_lock(&fdtv->avc_mutex);
1030 1065
1031 c->ctype = AVC_CTYPE_CONTROL; 1066 c->ctype = AVC_CTYPE_CONTROL;
1032 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 1067 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -1058,7 +1093,7 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1058 1093
1059 c->operand[12] = 0x02; /* Table id=2 */ 1094 c->operand[12] = 0x02; /* Table id=2 */
1060 c->operand[13] = 0x80; /* Section syntax + length */ 1095 c->operand[13] = 0x80; /* Section syntax + length */
1061 /* c->operand[14] = XXXprogram_info_length + 12; */ 1096
1062 c->operand[15] = msg[1]; /* Program number */ 1097 c->operand[15] = msg[1]; /* Program number */
1063 c->operand[16] = msg[2]; 1098 c->operand[16] = msg[2];
1064 c->operand[17] = 0x01; /* Version number=0 + current/next=1 */ 1099 c->operand[17] = 0x01; /* Version number=0 + current/next=1 */
@@ -1106,12 +1141,7 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1106 write_pos += es_info_length; 1141 write_pos += es_info_length;
1107 } 1142 }
1108 } 1143 }
1109 1144 write_pos += 4; /* CRC */
1110 /* CRC */
1111 c->operand[write_pos++] = 0x00;
1112 c->operand[write_pos++] = 0x00;
1113 c->operand[write_pos++] = 0x00;
1114 c->operand[write_pos++] = 0x00;
1115 1145
1116 c->operand[7] = 0x82; 1146 c->operand[7] = 0x82;
1117 c->operand[8] = (write_pos - 10) >> 8; 1147 c->operand[8] = (write_pos - 10) >> 8;
@@ -1123,28 +1153,31 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1123 c->operand[write_pos - 3] = (crc32_csum >> 16) & 0xff; 1153 c->operand[write_pos - 3] = (crc32_csum >> 16) & 0xff;
1124 c->operand[write_pos - 2] = (crc32_csum >> 8) & 0xff; 1154 c->operand[write_pos - 2] = (crc32_csum >> 8) & 0xff;
1125 c->operand[write_pos - 1] = (crc32_csum >> 0) & 0xff; 1155 c->operand[write_pos - 1] = (crc32_csum >> 0) & 0xff;
1156 pad_operands(c, write_pos);
1126 1157
1127 c->length = ALIGN(3 + write_pos, 4); 1158 fdtv->avc_data_length = ALIGN(3 + write_pos, 4);
1128 1159 ret = avc_write(fdtv);
1129 if (avc_write(fdtv, c, r) < 0) 1160 if (ret < 0)
1130 return -EIO; 1161 goto out;
1131 1162
1132 if (r->response != AVC_RESPONSE_ACCEPTED) { 1163 if (r->response != AVC_RESPONSE_ACCEPTED) {
1133 dev_err(fdtv->device, 1164 dev_err(fdtv->device,
1134 "CA PMT failed with response 0x%x\n", r->response); 1165 "CA PMT failed with response 0x%x\n", r->response);
1135 return -EFAULT; 1166 ret = -EFAULT;
1136 } 1167 }
1168out:
1169 mutex_unlock(&fdtv->avc_mutex);
1137 1170
1138 return 0; 1171 return ret;
1139} 1172}
1140 1173
1141int avc_ca_get_time_date(struct firedtv *fdtv, int *interval) 1174int avc_ca_get_time_date(struct firedtv *fdtv, int *interval)
1142{ 1175{
1143 char buffer[sizeof(struct avc_command_frame)]; 1176 struct avc_command_frame *c = (void *)fdtv->avc_data;
1144 struct avc_command_frame *c = (void *)buffer; 1177 struct avc_response_frame *r = (void *)fdtv->avc_data;
1145 struct avc_response_frame *r = (void *)buffer; 1178 int ret;
1146 1179
1147 memset(c, 0, sizeof(*c)); 1180 mutex_lock(&fdtv->avc_mutex);
1148 1181
1149 c->ctype = AVC_CTYPE_STATUS; 1182 c->ctype = AVC_CTYPE_STATUS;
1150 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 1183 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -1156,28 +1189,28 @@ int avc_ca_get_time_date(struct firedtv *fdtv, int *interval)
1156 c->operand[3] = SFE_VENDOR_OPCODE_CA2HOST; 1189 c->operand[3] = SFE_VENDOR_OPCODE_CA2HOST;
1157 c->operand[4] = 0; /* slot */ 1190 c->operand[4] = 0; /* slot */
1158 c->operand[5] = SFE_VENDOR_TAG_CA_DATE_TIME; /* ca tag */ 1191 c->operand[5] = SFE_VENDOR_TAG_CA_DATE_TIME; /* ca tag */
1159 c->operand[6] = 0; /* more/last */ 1192 clear_operands(c, 6, LAST_OPERAND);
1160 c->operand[7] = 0; /* length */
1161 1193
1162 c->length = 12; 1194 fdtv->avc_data_length = 12;
1163 1195 ret = avc_write(fdtv);
1164 if (avc_write(fdtv, c, r) < 0) 1196 if (ret < 0)
1165 return -EIO; 1197 goto out;
1166 1198
1167 /* FIXME: check response code and validate response data */ 1199 /* FIXME: check response code and validate response data */
1168 1200
1169 *interval = r->operand[get_ca_object_pos(r)]; 1201 *interval = r->operand[get_ca_object_pos(r)];
1202out:
1203 mutex_unlock(&fdtv->avc_mutex);
1170 1204
1171 return 0; 1205 return ret;
1172} 1206}
1173 1207
1174int avc_ca_enter_menu(struct firedtv *fdtv) 1208int avc_ca_enter_menu(struct firedtv *fdtv)
1175{ 1209{
1176 char buffer[sizeof(struct avc_command_frame)]; 1210 struct avc_command_frame *c = (void *)fdtv->avc_data;
1177 struct avc_command_frame *c = (void *)buffer; 1211 int ret;
1178 struct avc_response_frame *r = (void *)buffer; /* FIXME: unused */
1179 1212
1180 memset(c, 0, sizeof(*c)); 1213 mutex_lock(&fdtv->avc_mutex);
1181 1214
1182 c->ctype = AVC_CTYPE_STATUS; 1215 c->ctype = AVC_CTYPE_STATUS;
1183 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 1216 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -1189,24 +1222,25 @@ int avc_ca_enter_menu(struct firedtv *fdtv)
1189 c->operand[3] = SFE_VENDOR_OPCODE_HOST2CA; 1222 c->operand[3] = SFE_VENDOR_OPCODE_HOST2CA;
1190 c->operand[4] = 0; /* slot */ 1223 c->operand[4] = 0; /* slot */
1191 c->operand[5] = SFE_VENDOR_TAG_CA_ENTER_MENU; 1224 c->operand[5] = SFE_VENDOR_TAG_CA_ENTER_MENU;
1192 c->operand[6] = 0; /* more/last */ 1225 clear_operands(c, 6, 8);
1193 c->operand[7] = 0; /* length */
1194 1226
1195 c->length = 12; 1227 fdtv->avc_data_length = 12;
1228 ret = avc_write(fdtv);
1196 1229
1197 if (avc_write(fdtv, c, r) < 0) 1230 /* FIXME: check response code? */
1198 return -EIO;
1199 1231
1200 return 0; 1232 mutex_unlock(&fdtv->avc_mutex);
1233
1234 return ret;
1201} 1235}
1202 1236
1203int avc_ca_get_mmi(struct firedtv *fdtv, char *mmi_object, unsigned int *len) 1237int avc_ca_get_mmi(struct firedtv *fdtv, char *mmi_object, unsigned int *len)
1204{ 1238{
1205 char buffer[sizeof(struct avc_command_frame)]; 1239 struct avc_command_frame *c = (void *)fdtv->avc_data;
1206 struct avc_command_frame *c = (void *)buffer; 1240 struct avc_response_frame *r = (void *)fdtv->avc_data;
1207 struct avc_response_frame *r = (void *)buffer; 1241 int ret;
1208 1242
1209 memset(c, 0, sizeof(*c)); 1243 mutex_lock(&fdtv->avc_mutex);
1210 1244
1211 c->ctype = AVC_CTYPE_STATUS; 1245 c->ctype = AVC_CTYPE_STATUS;
1212 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit; 1246 c->subunit = AVC_SUBUNIT_TYPE_TUNER | fdtv->subunit;
@@ -1218,20 +1252,21 @@ int avc_ca_get_mmi(struct firedtv *fdtv, char *mmi_object, unsigned int *len)
1218 c->operand[3] = SFE_VENDOR_OPCODE_CA2HOST; 1252 c->operand[3] = SFE_VENDOR_OPCODE_CA2HOST;
1219 c->operand[4] = 0; /* slot */ 1253 c->operand[4] = 0; /* slot */
1220 c->operand[5] = SFE_VENDOR_TAG_CA_MMI; 1254 c->operand[5] = SFE_VENDOR_TAG_CA_MMI;
1221 c->operand[6] = 0; /* more/last */ 1255 clear_operands(c, 6, LAST_OPERAND);
1222 c->operand[7] = 0; /* length */
1223 1256
1224 c->length = 12; 1257 fdtv->avc_data_length = 12;
1225 1258 ret = avc_write(fdtv);
1226 if (avc_write(fdtv, c, r) < 0) 1259 if (ret < 0)
1227 return -EIO; 1260 goto out;
1228 1261
1229 /* FIXME: check response code and validate response data */ 1262 /* FIXME: check response code and validate response data */
1230 1263
1231 *len = get_ca_object_length(r); 1264 *len = get_ca_object_length(r);
1232 memcpy(mmi_object, &r->operand[get_ca_object_pos(r)], *len); 1265 memcpy(mmi_object, &r->operand[get_ca_object_pos(r)], *len);
1266out:
1267 mutex_unlock(&fdtv->avc_mutex);
1233 1268
1234 return 0; 1269 return ret;
1235} 1270}
1236 1271
1237#define CMP_OUTPUT_PLUG_CONTROL_REG_0 0xfffff0000904ULL 1272#define CMP_OUTPUT_PLUG_CONTROL_REG_0 0xfffff0000904ULL
@@ -1240,14 +1275,14 @@ static int cmp_read(struct firedtv *fdtv, u64 addr, __be32 *data)
1240{ 1275{
1241 int ret; 1276 int ret;
1242 1277
1243 if (mutex_lock_interruptible(&fdtv->avc_mutex)) 1278 mutex_lock(&fdtv->avc_mutex);
1244 return -EINTR;
1245 1279
1246 ret = fdtv->backend->read(fdtv, addr, data); 1280 ret = fdtv->backend->read(fdtv, addr, data);
1247 if (ret < 0) 1281 if (ret < 0)
1248 dev_err(fdtv->device, "CMP: read I/O error\n"); 1282 dev_err(fdtv->device, "CMP: read I/O error\n");
1249 1283
1250 mutex_unlock(&fdtv->avc_mutex); 1284 mutex_unlock(&fdtv->avc_mutex);
1285
1251 return ret; 1286 return ret;
1252} 1287}
1253 1288
@@ -1255,14 +1290,19 @@ static int cmp_lock(struct firedtv *fdtv, u64 addr, __be32 data[])
1255{ 1290{
1256 int ret; 1291 int ret;
1257 1292
1258 if (mutex_lock_interruptible(&fdtv->avc_mutex)) 1293 mutex_lock(&fdtv->avc_mutex);
1259 return -EINTR; 1294
1295 /* data[] is stack-allocated and should not be DMA-mapped. */
1296 memcpy(fdtv->avc_data, data, 8);
1260 1297
1261 ret = fdtv->backend->lock(fdtv, addr, data); 1298 ret = fdtv->backend->lock(fdtv, addr, fdtv->avc_data);
1262 if (ret < 0) 1299 if (ret < 0)
1263 dev_err(fdtv->device, "CMP: lock I/O error\n"); 1300 dev_err(fdtv->device, "CMP: lock I/O error\n");
1301 else
1302 memcpy(data, fdtv->avc_data, 8);
1264 1303
1265 mutex_unlock(&fdtv->avc_mutex); 1304 mutex_unlock(&fdtv->avc_mutex);
1305
1266 return ret; 1306 return ret;
1267} 1307}
1268 1308
diff --git a/drivers/media/dvb/firewire/firedtv-dvb.c b/drivers/media/dvb/firewire/firedtv-dvb.c
index fc9996c13e13..079e8c5b0475 100644
--- a/drivers/media/dvb/firewire/firedtv-dvb.c
+++ b/drivers/media/dvb/firewire/firedtv-dvb.c
@@ -277,7 +277,6 @@ struct firedtv *fdtv_alloc(struct device *dev,
277 277
278 mutex_init(&fdtv->avc_mutex); 278 mutex_init(&fdtv->avc_mutex);
279 init_waitqueue_head(&fdtv->avc_wait); 279 init_waitqueue_head(&fdtv->avc_wait);
280 fdtv->avc_reply_received = true;
281 mutex_init(&fdtv->demux_mutex); 280 mutex_init(&fdtv->demux_mutex);
282 INIT_WORK(&fdtv->remote_ctrl_work, avc_remote_ctrl_work); 281 INIT_WORK(&fdtv->remote_ctrl_work, avc_remote_ctrl_work);
283 282
diff --git a/drivers/media/dvb/firewire/firedtv-fw.c b/drivers/media/dvb/firewire/firedtv-fw.c
index 6223bf01efe9..7a3de16fba06 100644
--- a/drivers/media/dvb/firewire/firedtv-fw.c
+++ b/drivers/media/dvb/firewire/firedtv-fw.c
@@ -41,7 +41,7 @@ static int node_req(struct firedtv *fdtv, u64 addr, void *data, size_t len,
41 return rcode != RCODE_COMPLETE ? -EIO : 0; 41 return rcode != RCODE_COMPLETE ? -EIO : 0;
42} 42}
43 43
44static int node_lock(struct firedtv *fdtv, u64 addr, __be32 data[]) 44static int node_lock(struct firedtv *fdtv, u64 addr, void *data)
45{ 45{
46 return node_req(fdtv, addr, data, 8, TCODE_LOCK_COMPARE_SWAP); 46 return node_req(fdtv, addr, data, 8, TCODE_LOCK_COMPARE_SWAP);
47} 47}
diff --git a/drivers/media/dvb/firewire/firedtv.h b/drivers/media/dvb/firewire/firedtv.h
index 35080dbb3c66..78cc28f36914 100644
--- a/drivers/media/dvb/firewire/firedtv.h
+++ b/drivers/media/dvb/firewire/firedtv.h
@@ -73,7 +73,7 @@ struct input_dev;
73struct firedtv; 73struct firedtv;
74 74
75struct firedtv_backend { 75struct firedtv_backend {
76 int (*lock)(struct firedtv *fdtv, u64 addr, __be32 data[]); 76 int (*lock)(struct firedtv *fdtv, u64 addr, void *data);
77 int (*read)(struct firedtv *fdtv, u64 addr, void *data); 77 int (*read)(struct firedtv *fdtv, u64 addr, void *data);
78 int (*write)(struct firedtv *fdtv, u64 addr, void *data, size_t len); 78 int (*write)(struct firedtv *fdtv, u64 addr, void *data, size_t len);
79 int (*start_iso)(struct firedtv *fdtv); 79 int (*start_iso)(struct firedtv *fdtv);
@@ -114,8 +114,8 @@ struct firedtv {
114 unsigned long channel_active; 114 unsigned long channel_active;
115 u16 channel_pid[16]; 115 u16 channel_pid[16];
116 116
117 size_t response_length; 117 int avc_data_length;
118 u8 response[512]; 118 u8 avc_data[512];
119}; 119};
120 120
121/* firedtv-1394.c */ 121/* firedtv-1394.c */
diff --git a/drivers/media/dvb/frontends/af9013.h b/drivers/media/dvb/frontends/af9013.h
index 28b90c91c766..e90fa92b1c1d 100644
--- a/drivers/media/dvb/frontends/af9013.h
+++ b/drivers/media/dvb/frontends/af9013.h
@@ -44,6 +44,7 @@ enum af9013_tuner {
44 AF9013_TUNER_MT2060_2 = 147, /* Microtune */ 44 AF9013_TUNER_MT2060_2 = 147, /* Microtune */
45 AF9013_TUNER_TDA18271 = 156, /* NXP */ 45 AF9013_TUNER_TDA18271 = 156, /* NXP */
46 AF9013_TUNER_QT1010A = 162, /* Quantek */ 46 AF9013_TUNER_QT1010A = 162, /* Quantek */
47 AF9013_TUNER_TDA18218 = 179, /* NXP */
47}; 48};
48 49
49/* AF9013/5 GPIOs (mostly guessed) 50/* AF9013/5 GPIOs (mostly guessed)
diff --git a/drivers/media/dvb/frontends/atbm8830.c b/drivers/media/dvb/frontends/atbm8830.c
index 59881a5944eb..43aac2f85c2e 100644
--- a/drivers/media/dvb/frontends/atbm8830.c
+++ b/drivers/media/dvb/frontends/atbm8830.c
@@ -170,6 +170,19 @@ static int is_locked(struct atbm_state *priv, u8 *locked)
170 return 0; 170 return 0;
171} 171}
172 172
173static int set_agc_config(struct atbm_state *priv,
174 u8 min, u8 max, u8 hold_loop)
175{
176 /* no effect if both min and max are zero */
177 if (!min && !max)
178 return 0;
179
180 atbm8830_write_reg(priv, REG_AGC_MIN, min);
181 atbm8830_write_reg(priv, REG_AGC_MAX, max);
182 atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);
183
184 return 0;
185}
173 186
174static int set_static_channel_mode(struct atbm_state *priv) 187static int set_static_channel_mode(struct atbm_state *priv)
175{ 188{
@@ -227,6 +240,9 @@ static int atbm8830_init(struct dvb_frontend *fe)
227 /*Set IF frequency*/ 240 /*Set IF frequency*/
228 set_if_freq(priv, cfg->if_freq); 241 set_if_freq(priv, cfg->if_freq);
229 242
243 /*Set AGC Config*/
244 set_agc_config(priv, cfg->agc_min, cfg->agc_max,
245 cfg->agc_hold_loop);
230 246
231 /*Set static channel mode*/ 247 /*Set static channel mode*/
232 set_static_channel_mode(priv); 248 set_static_channel_mode(priv);
diff --git a/drivers/media/dvb/frontends/dib0090.c b/drivers/media/dvb/frontends/dib0090.c
index 614552709a6f..7eac178f57b2 100644
--- a/drivers/media/dvb/frontends/dib0090.c
+++ b/drivers/media/dvb/frontends/dib0090.c
@@ -283,7 +283,7 @@ static int dib0090_sleep(struct dvb_frontend *fe)
283 return 0; 283 return 0;
284} 284}
285 285
286extern void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast) 286void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast)
287{ 287{
288 struct dib0090_state *state = fe->tuner_priv; 288 struct dib0090_state *state = fe->tuner_priv;
289 if (fast) 289 if (fast)
diff --git a/drivers/media/dvb/frontends/dib8000.c b/drivers/media/dvb/frontends/dib8000.c
index 6f6fa29d9ea4..2aa97dd6a8af 100644
--- a/drivers/media/dvb/frontends/dib8000.c
+++ b/drivers/media/dvb/frontends/dib8000.c
@@ -1999,6 +1999,8 @@ static int dib8000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
1999 struct dib8000_state *state = fe->demodulator_priv; 1999 struct dib8000_state *state = fe->demodulator_priv;
2000 int time, ret; 2000 int time, ret;
2001 2001
2002 fe->dtv_property_cache.delivery_system = SYS_ISDBT;
2003
2002 dib8000_set_output_mode(state, OUTMODE_HIGH_Z); 2004 dib8000_set_output_mode(state, OUTMODE_HIGH_Z);
2003 2005
2004 if (fe->ops.tuner_ops.set_params) 2006 if (fe->ops.tuner_ops.set_params)
diff --git a/drivers/media/dvb/frontends/dibx000_common.c b/drivers/media/dvb/frontends/dibx000_common.c
index e6f3d73db9d3..980e02f1575e 100644
--- a/drivers/media/dvb/frontends/dibx000_common.c
+++ b/drivers/media/dvb/frontends/dibx000_common.c
@@ -174,7 +174,7 @@ void dibx000_exit_i2c_master(struct dibx000_i2c_master *mst)
174EXPORT_SYMBOL(dibx000_exit_i2c_master); 174EXPORT_SYMBOL(dibx000_exit_i2c_master);
175 175
176 176
177u32 systime() 177u32 systime(void)
178{ 178{
179 struct timespec t; 179 struct timespec t;
180 180
diff --git a/drivers/media/dvb/frontends/lnbp21.c b/drivers/media/dvb/frontends/lnbp21.c
index b181bf023ada..13437259eeac 100644
--- a/drivers/media/dvb/frontends/lnbp21.c
+++ b/drivers/media/dvb/frontends/lnbp21.c
@@ -158,7 +158,8 @@ static struct dvb_frontend *lnbx2x_attach(struct dvb_frontend *fe,
158 /* override frontend ops */ 158 /* override frontend ops */
159 fe->ops.set_voltage = lnbp21_set_voltage; 159 fe->ops.set_voltage = lnbp21_set_voltage;
160 fe->ops.enable_high_lnb_voltage = lnbp21_enable_high_lnb_voltage; 160 fe->ops.enable_high_lnb_voltage = lnbp21_enable_high_lnb_voltage;
161 fe->ops.set_tone = lnbp21_set_tone; 161 if (!(override_clear & LNBH24_TEN)) /*22kHz logic controlled by demod*/
162 fe->ops.set_tone = lnbp21_set_tone;
162 printk(KERN_INFO "LNBx2x attached on addr=%x\n", lnbp21->i2c_addr); 163 printk(KERN_INFO "LNBx2x attached on addr=%x\n", lnbp21->i2c_addr);
163 164
164 return fe; 165 return fe;
diff --git a/drivers/media/dvb/frontends/si21xx.c b/drivers/media/dvb/frontends/si21xx.c
index 9552a22ccffb..d21a327db629 100644
--- a/drivers/media/dvb/frontends/si21xx.c
+++ b/drivers/media/dvb/frontends/si21xx.c
@@ -97,8 +97,6 @@
97#define LNB_SUPPLY_CTRL_REG_4 0xce 97#define LNB_SUPPLY_CTRL_REG_4 0xce
98#define LNB_SUPPLY_STATUS_REG 0xcf 98#define LNB_SUPPLY_STATUS_REG 0xcf
99 99
100#define FALSE 0
101#define TRUE 1
102#define FAIL -1 100#define FAIL -1
103#define PASS 0 101#define PASS 0
104 102
@@ -718,7 +716,7 @@ static int si21xx_set_frontend(struct dvb_frontend *fe,
718 int fine_tune_freq; 716 int fine_tune_freq;
719 unsigned char sample_rate = 0; 717 unsigned char sample_rate = 0;
720 /* boolean */ 718 /* boolean */
721 unsigned int inband_interferer_ind; 719 bool inband_interferer_ind;
722 720
723 /* INTERMEDIATE VALUES */ 721 /* INTERMEDIATE VALUES */
724 int icoarse_tune_freq; /* MHz */ 722 int icoarse_tune_freq; /* MHz */
@@ -728,15 +726,8 @@ static int si21xx_set_frontend(struct dvb_frontend *fe,
728 unsigned int x1; 726 unsigned int x1;
729 unsigned int x2; 727 unsigned int x2;
730 int i; 728 int i;
731 unsigned int inband_interferer_div2[ALLOWABLE_FS_COUNT] = { 729 bool inband_interferer_div2[ALLOWABLE_FS_COUNT];
732 FALSE, FALSE, FALSE, FALSE, FALSE, 730 bool inband_interferer_div4[ALLOWABLE_FS_COUNT];
733 FALSE, FALSE, FALSE, FALSE, FALSE
734 };
735 unsigned int inband_interferer_div4[ALLOWABLE_FS_COUNT] = {
736 FALSE, FALSE, FALSE, FALSE, FALSE,
737 FALSE, FALSE, FALSE, FALSE, FALSE
738 };
739
740 int status; 731 int status;
741 732
742 /* allowable sample rates for ADC in MHz */ 733 /* allowable sample rates for ADC in MHz */
@@ -762,7 +753,7 @@ static int si21xx_set_frontend(struct dvb_frontend *fe,
762 } 753 }
763 754
764 for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) 755 for (i = 0; i < ALLOWABLE_FS_COUNT; ++i)
765 inband_interferer_div2[i] = inband_interferer_div4[i] = FALSE; 756 inband_interferer_div2[i] = inband_interferer_div4[i] = false;
766 757
767 if_limit_high = -700000; 758 if_limit_high = -700000;
768 if_limit_low = -100000; 759 if_limit_low = -100000;
@@ -798,7 +789,7 @@ static int si21xx_set_frontend(struct dvb_frontend *fe,
798 789
799 if (((band_low < x1) && (x1 < band_high)) || 790 if (((band_low < x1) && (x1 < band_high)) ||
800 ((band_low < x2) && (x2 < band_high))) 791 ((band_low < x2) && (x2 < band_high)))
801 inband_interferer_div4[i] = TRUE; 792 inband_interferer_div4[i] = true;
802 793
803 } 794 }
804 795
@@ -811,25 +802,28 @@ static int si21xx_set_frontend(struct dvb_frontend *fe,
811 802
812 if (((band_low < x1) && (x1 < band_high)) || 803 if (((band_low < x1) && (x1 < band_high)) ||
813 ((band_low < x2) && (x2 < band_high))) 804 ((band_low < x2) && (x2 < band_high)))
814 inband_interferer_div2[i] = TRUE; 805 inband_interferer_div2[i] = true;
815 } 806 }
816 807
817 inband_interferer_ind = TRUE; 808 inband_interferer_ind = true;
818 for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) 809 for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) {
819 inband_interferer_ind &= inband_interferer_div2[i] | 810 if (inband_interferer_div2[i] || inband_interferer_div4[i]) {
820 inband_interferer_div4[i]; 811 inband_interferer_ind = false;
812 break;
813 }
814 }
821 815
822 if (inband_interferer_ind) { 816 if (inband_interferer_ind) {
823 for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) { 817 for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) {
824 if (inband_interferer_div2[i] == FALSE) { 818 if (!inband_interferer_div2[i]) {
825 sample_rate = (u8) afs[i]; 819 sample_rate = (u8) afs[i];
826 break; 820 break;
827 } 821 }
828 } 822 }
829 } else { 823 } else {
830 for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) { 824 for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) {
831 if ((inband_interferer_div2[i] | 825 if ((inband_interferer_div2[i] ||
832 inband_interferer_div4[i]) == FALSE) { 826 !inband_interferer_div4[i])) {
833 sample_rate = (u8) afs[i]; 827 sample_rate = (u8) afs[i];
834 break; 828 break;
835 } 829 }
diff --git a/drivers/media/dvb/frontends/stv0900.h b/drivers/media/dvb/frontends/stv0900.h
index 29c3fa85c227..e3e35d1ce838 100644
--- a/drivers/media/dvb/frontends/stv0900.h
+++ b/drivers/media/dvb/frontends/stv0900.h
@@ -49,6 +49,8 @@ struct stv0900_config {
49 u8 tun2_maddress; 49 u8 tun2_maddress;
50 u8 tun1_adc;/* 1 for stv6110, 2 for stb6100 */ 50 u8 tun1_adc;/* 1 for stv6110, 2 for stb6100 */
51 u8 tun2_adc; 51 u8 tun2_adc;
52 u8 tun1_type;/* for now 3 for stb6100 auto, else - software */
53 u8 tun2_type;
52 /* Set device param to start dma */ 54 /* Set device param to start dma */
53 int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured); 55 int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured);
54}; 56};
diff --git a/drivers/media/dvb/frontends/stv0900_core.c b/drivers/media/dvb/frontends/stv0900_core.c
index 8762c86044a5..01f8f1f802fd 100644
--- a/drivers/media/dvb/frontends/stv0900_core.c
+++ b/drivers/media/dvb/frontends/stv0900_core.c
@@ -177,7 +177,7 @@ u8 stv0900_read_reg(struct stv0900_internal *intp, u16 reg)
177 return buf; 177 return buf;
178} 178}
179 179
180void extract_mask_pos(u32 label, u8 *mask, u8 *pos) 180static void extract_mask_pos(u32 label, u8 *mask, u8 *pos)
181{ 181{
182 u8 position = 0, i = 0; 182 u8 position = 0, i = 0;
183 183
@@ -218,7 +218,7 @@ u8 stv0900_get_bits(struct stv0900_internal *intp, u32 label)
218 return val; 218 return val;
219} 219}
220 220
221enum fe_stv0900_error stv0900_initialize(struct stv0900_internal *intp) 221static enum fe_stv0900_error stv0900_initialize(struct stv0900_internal *intp)
222{ 222{
223 s32 i; 223 s32 i;
224 224
@@ -282,7 +282,7 @@ enum fe_stv0900_error stv0900_initialize(struct stv0900_internal *intp)
282 return STV0900_NO_ERROR; 282 return STV0900_NO_ERROR;
283} 283}
284 284
285u32 stv0900_get_mclk_freq(struct stv0900_internal *intp, u32 ext_clk) 285static u32 stv0900_get_mclk_freq(struct stv0900_internal *intp, u32 ext_clk)
286{ 286{
287 u32 mclk = 90000000, div = 0, ad_div = 0; 287 u32 mclk = 90000000, div = 0, ad_div = 0;
288 288
@@ -296,7 +296,7 @@ u32 stv0900_get_mclk_freq(struct stv0900_internal *intp, u32 ext_clk)
296 return mclk; 296 return mclk;
297} 297}
298 298
299enum fe_stv0900_error stv0900_set_mclk(struct stv0900_internal *intp, u32 mclk) 299static enum fe_stv0900_error stv0900_set_mclk(struct stv0900_internal *intp, u32 mclk)
300{ 300{
301 u32 m_div, clk_sel; 301 u32 m_div, clk_sel;
302 302
@@ -334,7 +334,7 @@ enum fe_stv0900_error stv0900_set_mclk(struct stv0900_internal *intp, u32 mclk)
334 return STV0900_NO_ERROR; 334 return STV0900_NO_ERROR;
335} 335}
336 336
337u32 stv0900_get_err_count(struct stv0900_internal *intp, int cntr, 337static u32 stv0900_get_err_count(struct stv0900_internal *intp, int cntr,
338 enum fe_stv0900_demod_num demod) 338 enum fe_stv0900_demod_num demod)
339{ 339{
340 u32 lsb, msb, hsb, err_val; 340 u32 lsb, msb, hsb, err_val;
@@ -567,6 +567,46 @@ void stv0900_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth)
567 } 567 }
568} 568}
569 569
570u32 stv0900_get_freq_auto(struct stv0900_internal *intp, int demod)
571{
572 u32 freq, round;
573 /* Formulat :
574 Tuner_Frequency(MHz) = Regs / 64
575 Tuner_granularity(MHz) = Regs / 2048
576 real_Tuner_Frequency = Tuner_Frequency(MHz) - Tuner_granularity(MHz)
577 */
578 freq = (stv0900_get_bits(intp, TUN_RFFREQ2) << 10) +
579 (stv0900_get_bits(intp, TUN_RFFREQ1) << 2) +
580 stv0900_get_bits(intp, TUN_RFFREQ0);
581
582 freq = (freq * 1000) / 64;
583
584 round = (stv0900_get_bits(intp, TUN_RFRESTE1) >> 2) +
585 stv0900_get_bits(intp, TUN_RFRESTE0);
586
587 round = (round * 1000) / 2048;
588
589 return freq + round;
590}
591
592void stv0900_set_tuner_auto(struct stv0900_internal *intp, u32 Frequency,
593 u32 Bandwidth, int demod)
594{
595 u32 tunerFrequency;
596 /* Formulat:
597 Tuner_frequency_reg= Frequency(MHz)*64
598 */
599 tunerFrequency = (Frequency * 64) / 1000;
600
601 stv0900_write_bits(intp, TUN_RFFREQ2, (tunerFrequency >> 10));
602 stv0900_write_bits(intp, TUN_RFFREQ1, (tunerFrequency >> 2) & 0xff);
603 stv0900_write_bits(intp, TUN_RFFREQ0, (tunerFrequency & 0x03));
604 /* Low Pass Filter = BW /2 (MHz)*/
605 stv0900_write_bits(intp, TUN_BW, Bandwidth / 2000000);
606 /* Tuner Write trig */
607 stv0900_write_reg(intp, TNRLD, 1);
608}
609
570static s32 stv0900_get_rf_level(struct stv0900_internal *intp, 610static s32 stv0900_get_rf_level(struct stv0900_internal *intp,
571 const struct stv0900_table *lookup, 611 const struct stv0900_table *lookup,
572 enum fe_stv0900_demod_num demod) 612 enum fe_stv0900_demod_num demod)
@@ -1329,7 +1369,6 @@ static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe,
1329 enum fe_stv0900_error error = STV0900_NO_ERROR; 1369 enum fe_stv0900_error error = STV0900_NO_ERROR;
1330 enum fe_stv0900_error demodError = STV0900_NO_ERROR; 1370 enum fe_stv0900_error demodError = STV0900_NO_ERROR;
1331 struct stv0900_internal *intp = NULL; 1371 struct stv0900_internal *intp = NULL;
1332
1333 int selosci, i; 1372 int selosci, i;
1334 1373
1335 struct stv0900_inode *temp_int = find_inode(state->i2c_adap, 1374 struct stv0900_inode *temp_int = find_inode(state->i2c_adap,
@@ -1345,7 +1384,14 @@ static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe,
1345 } else { 1384 } else {
1346 state->internal = kmalloc(sizeof(struct stv0900_internal), 1385 state->internal = kmalloc(sizeof(struct stv0900_internal),
1347 GFP_KERNEL); 1386 GFP_KERNEL);
1387 if (state->internal == NULL)
1388 return STV0900_INVALID_HANDLE;
1348 temp_int = append_internal(state->internal); 1389 temp_int = append_internal(state->internal);
1390 if (temp_int == NULL) {
1391 kfree(state->internal);
1392 state->internal = NULL;
1393 return STV0900_INVALID_HANDLE;
1394 }
1349 state->internal->dmds_used = 1; 1395 state->internal->dmds_used = 1;
1350 state->internal->i2c_adap = state->i2c_adap; 1396 state->internal->i2c_adap = state->i2c_adap;
1351 state->internal->i2c_addr = state->config->demod_address; 1397 state->internal->i2c_addr = state->config->demod_address;
@@ -1371,11 +1417,6 @@ static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe,
1371 return error; 1417 return error;
1372 } 1418 }
1373 1419
1374 if (state->internal == NULL) {
1375 error = STV0900_INVALID_HANDLE;
1376 return error;
1377 }
1378
1379 intp = state->internal; 1420 intp = state->internal;
1380 1421
1381 intp->demod_mode = p_init->demod_mode; 1422 intp->demod_mode = p_init->demod_mode;
@@ -1404,6 +1445,27 @@ static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe,
1404 stv0900_write_bits(intp, F0900_P1_RST_HWARE, 0); 1445 stv0900_write_bits(intp, F0900_P1_RST_HWARE, 0);
1405 } 1446 }
1406 1447
1448 intp->tuner_type[0] = p_init->tuner1_type;
1449 intp->tuner_type[1] = p_init->tuner2_type;
1450 /* tuner init */
1451 switch (p_init->tuner1_type) {
1452 case 3: /*FE_AUTO_STB6100:*/
1453 stv0900_write_reg(intp, R0900_P1_TNRCFG, 0x3c);
1454 stv0900_write_reg(intp, R0900_P1_TNRCFG2, 0x86);
1455 stv0900_write_reg(intp, R0900_P1_TNRCFG3, 0x18);
1456 stv0900_write_reg(intp, R0900_P1_TNRXTAL, 27); /* 27MHz */
1457 stv0900_write_reg(intp, R0900_P1_TNRSTEPS, 0x05);
1458 stv0900_write_reg(intp, R0900_P1_TNRGAIN, 0x17);
1459 stv0900_write_reg(intp, R0900_P1_TNRADJ, 0x1f);
1460 stv0900_write_reg(intp, R0900_P1_TNRCTL2, 0x0);
1461 stv0900_write_bits(intp, F0900_P1_TUN_TYPE, 3);
1462 break;
1463 /* case FE_SW_TUNER: */
1464 default:
1465 stv0900_write_bits(intp, F0900_P1_TUN_TYPE, 6);
1466 break;
1467 }
1468
1407 stv0900_write_bits(intp, F0900_P1_TUN_MADDRESS, p_init->tun1_maddress); 1469 stv0900_write_bits(intp, F0900_P1_TUN_MADDRESS, p_init->tun1_maddress);
1408 switch (p_init->tuner1_adc) { 1470 switch (p_init->tuner1_adc) {
1409 case 1: 1471 case 1:
@@ -1413,6 +1475,27 @@ static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe,
1413 break; 1475 break;
1414 } 1476 }
1415 1477
1478 stv0900_write_reg(intp, R0900_P1_TNRLD, 1); /* hw tuner */
1479
1480 /* tuner init */
1481 switch (p_init->tuner2_type) {
1482 case 3: /*FE_AUTO_STB6100:*/
1483 stv0900_write_reg(intp, R0900_P2_TNRCFG, 0x3c);
1484 stv0900_write_reg(intp, R0900_P2_TNRCFG2, 0x86);
1485 stv0900_write_reg(intp, R0900_P2_TNRCFG3, 0x18);
1486 stv0900_write_reg(intp, R0900_P2_TNRXTAL, 27); /* 27MHz */
1487 stv0900_write_reg(intp, R0900_P2_TNRSTEPS, 0x05);
1488 stv0900_write_reg(intp, R0900_P2_TNRGAIN, 0x17);
1489 stv0900_write_reg(intp, R0900_P2_TNRADJ, 0x1f);
1490 stv0900_write_reg(intp, R0900_P2_TNRCTL2, 0x0);
1491 stv0900_write_bits(intp, F0900_P2_TUN_TYPE, 3);
1492 break;
1493 /* case FE_SW_TUNER: */
1494 default:
1495 stv0900_write_bits(intp, F0900_P2_TUN_TYPE, 6);
1496 break;
1497 }
1498
1416 stv0900_write_bits(intp, F0900_P2_TUN_MADDRESS, p_init->tun2_maddress); 1499 stv0900_write_bits(intp, F0900_P2_TUN_MADDRESS, p_init->tun2_maddress);
1417 switch (p_init->tuner2_adc) { 1500 switch (p_init->tuner2_adc) {
1418 case 1: 1501 case 1:
@@ -1422,6 +1505,8 @@ static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe,
1422 break; 1505 break;
1423 } 1506 }
1424 1507
1508 stv0900_write_reg(intp, R0900_P2_TNRLD, 1); /* hw tuner */
1509
1425 stv0900_write_bits(intp, F0900_P1_TUN_IQSWAP, p_init->tun1_iq_inv); 1510 stv0900_write_bits(intp, F0900_P1_TUN_IQSWAP, p_init->tun1_iq_inv);
1426 stv0900_write_bits(intp, F0900_P2_TUN_IQSWAP, p_init->tun2_iq_inv); 1511 stv0900_write_bits(intp, F0900_P2_TUN_IQSWAP, p_init->tun2_iq_inv);
1427 stv0900_set_mclk(intp, 135000000); 1512 stv0900_set_mclk(intp, 135000000);
@@ -1824,10 +1909,12 @@ struct dvb_frontend *stv0900_attach(const struct stv0900_config *config,
1824 init_params.tun1_maddress = config->tun1_maddress; 1909 init_params.tun1_maddress = config->tun1_maddress;
1825 init_params.tun1_iq_inv = STV0900_IQ_NORMAL; 1910 init_params.tun1_iq_inv = STV0900_IQ_NORMAL;
1826 init_params.tuner1_adc = config->tun1_adc; 1911 init_params.tuner1_adc = config->tun1_adc;
1912 init_params.tuner1_type = config->tun1_type;
1827 init_params.path2_ts_clock = config->path2_mode; 1913 init_params.path2_ts_clock = config->path2_mode;
1828 init_params.ts_config = config->ts_config_regs; 1914 init_params.ts_config = config->ts_config_regs;
1829 init_params.tun2_maddress = config->tun2_maddress; 1915 init_params.tun2_maddress = config->tun2_maddress;
1830 init_params.tuner2_adc = config->tun2_adc; 1916 init_params.tuner2_adc = config->tun2_adc;
1917 init_params.tuner2_type = config->tun2_type;
1831 init_params.tun2_iq_inv = STV0900_IQ_SWAPPED; 1918 init_params.tun2_iq_inv = STV0900_IQ_SWAPPED;
1832 1919
1833 err_stv0900 = stv0900_init_internal(&state->frontend, 1920 err_stv0900 = stv0900_init_internal(&state->frontend,
diff --git a/drivers/media/dvb/frontends/stv0900_priv.h b/drivers/media/dvb/frontends/stv0900_priv.h
index d8ba8a984abe..b62b0f0a4fef 100644
--- a/drivers/media/dvb/frontends/stv0900_priv.h
+++ b/drivers/media/dvb/frontends/stv0900_priv.h
@@ -247,6 +247,7 @@ struct stv0900_init_params{
247 247
248 u8 tun1_maddress; 248 u8 tun1_maddress;
249 int tuner1_adc; 249 int tuner1_adc;
250 int tuner1_type;
250 251
251 /* IQ from the tuner1 to the demod */ 252 /* IQ from the tuner1 to the demod */
252 enum stv0900_iq_inversion tun1_iq_inv; 253 enum stv0900_iq_inversion tun1_iq_inv;
@@ -254,6 +255,7 @@ struct stv0900_init_params{
254 255
255 u8 tun2_maddress; 256 u8 tun2_maddress;
256 int tuner2_adc; 257 int tuner2_adc;
258 int tuner2_type;
257 259
258 /* IQ from the tuner2 to the demod */ 260 /* IQ from the tuner2 to the demod */
259 enum stv0900_iq_inversion tun2_iq_inv; 261 enum stv0900_iq_inversion tun2_iq_inv;
@@ -309,6 +311,8 @@ struct stv0900_internal{
309 s32 bw[2]; 311 s32 bw[2];
310 s32 symbol_rate[2]; 312 s32 symbol_rate[2];
311 s32 srch_range[2]; 313 s32 srch_range[2];
314 /* for software/auto tuner */
315 int tuner_type[2];
312 316
313 /* algorithm for search Blind, Cold or Warm*/ 317 /* algorithm for search Blind, Cold or Warm*/
314 enum fe_stv0900_search_algo srch_algo[2]; 318 enum fe_stv0900_search_algo srch_algo[2];
@@ -394,4 +398,11 @@ extern enum
394fe_stv0900_tracking_standard stv0900_get_standard(struct dvb_frontend *fe, 398fe_stv0900_tracking_standard stv0900_get_standard(struct dvb_frontend *fe,
395 enum fe_stv0900_demod_num demod); 399 enum fe_stv0900_demod_num demod);
396 400
401extern u32
402stv0900_get_freq_auto(struct stv0900_internal *intp, int demod);
403
404extern void
405stv0900_set_tuner_auto(struct stv0900_internal *intp, u32 Frequency,
406 u32 Bandwidth, int demod);
407
397#endif 408#endif
diff --git a/drivers/media/dvb/frontends/stv0900_reg.h b/drivers/media/dvb/frontends/stv0900_reg.h
index 7b8edf192e97..731afe93a823 100644
--- a/drivers/media/dvb/frontends/stv0900_reg.h
+++ b/drivers/media/dvb/frontends/stv0900_reg.h
@@ -3174,17 +3174,21 @@ extern s32 shiftx(s32 x, int demod, s32 shift);
3174#define R0900_P1_TNRRF1 0xf4e9 3174#define R0900_P1_TNRRF1 0xf4e9
3175#define TNRRF1 REGx(R0900_P1_TNRRF1) 3175#define TNRRF1 REGx(R0900_P1_TNRRF1)
3176#define F0900_P1_TUN_RFFREQ2 0xf4e900ff 3176#define F0900_P1_TUN_RFFREQ2 0xf4e900ff
3177#define TUN_RFFREQ2 FLDx(F0900_P1_TUN_RFFREQ2)
3177 3178
3178/*P1_TNRRF0*/ 3179/*P1_TNRRF0*/
3179#define R0900_P1_TNRRF0 0xf4ea 3180#define R0900_P1_TNRRF0 0xf4ea
3180#define TNRRF0 REGx(R0900_P1_TNRRF0) 3181#define TNRRF0 REGx(R0900_P1_TNRRF0)
3181#define F0900_P1_TUN_RFFREQ1 0xf4ea00ff 3182#define F0900_P1_TUN_RFFREQ1 0xf4ea00ff
3183#define TUN_RFFREQ1 FLDx(F0900_P1_TUN_RFFREQ1)
3182 3184
3183/*P1_TNRBW*/ 3185/*P1_TNRBW*/
3184#define R0900_P1_TNRBW 0xf4eb 3186#define R0900_P1_TNRBW 0xf4eb
3185#define TNRBW REGx(R0900_P1_TNRBW) 3187#define TNRBW REGx(R0900_P1_TNRBW)
3186#define F0900_P1_TUN_RFFREQ0 0xf4eb00c0 3188#define F0900_P1_TUN_RFFREQ0 0xf4eb00c0
3189#define TUN_RFFREQ0 FLDx(F0900_P1_TUN_RFFREQ0)
3187#define F0900_P1_TUN_BW 0xf4eb003f 3190#define F0900_P1_TUN_BW 0xf4eb003f
3191#define TUN_BW FLDx(F0900_P1_TUN_BW)
3188 3192
3189/*P1_TNRADJ*/ 3193/*P1_TNRADJ*/
3190#define R0900_P1_TNRADJ 0xf4ec 3194#define R0900_P1_TNRADJ 0xf4ec
@@ -3234,11 +3238,13 @@ extern s32 shiftx(s32 x, int demod, s32 shift);
3234#define F0900_P1_TUN_I2CLOCKED 0xf4f60010 3238#define F0900_P1_TUN_I2CLOCKED 0xf4f60010
3235#define F0900_P1_TUN_PROGDONE 0xf4f6000c 3239#define F0900_P1_TUN_PROGDONE 0xf4f6000c
3236#define F0900_P1_TUN_RFRESTE1 0xf4f60003 3240#define F0900_P1_TUN_RFRESTE1 0xf4f60003
3241#define TUN_RFRESTE1 FLDx(F0900_P1_TUN_RFRESTE1)
3237 3242
3238/*P1_TNRRESTE*/ 3243/*P1_TNRRESTE*/
3239#define R0900_P1_TNRRESTE 0xf4f7 3244#define R0900_P1_TNRRESTE 0xf4f7
3240#define TNRRESTE REGx(R0900_P1_TNRRESTE) 3245#define TNRRESTE REGx(R0900_P1_TNRRESTE)
3241#define F0900_P1_TUN_RFRESTE0 0xf4f700ff 3246#define F0900_P1_TUN_RFRESTE0 0xf4f700ff
3247#define TUN_RFRESTE0 FLDx(F0900_P1_TUN_RFRESTE0)
3242 3248
3243/*P1_SMAPCOEF7*/ 3249/*P1_SMAPCOEF7*/
3244#define R0900_P1_SMAPCOEF7 0xf500 3250#define R0900_P1_SMAPCOEF7 0xf500
diff --git a/drivers/media/dvb/frontends/stv0900_sw.c b/drivers/media/dvb/frontends/stv0900_sw.c
index b8da87fa637f..ba0709b2d433 100644
--- a/drivers/media/dvb/frontends/stv0900_sw.c
+++ b/drivers/media/dvb/frontends/stv0900_sw.c
@@ -193,7 +193,7 @@ static int stv0900_search_carr_sw_loop(struct stv0900_internal *intp,
193 return lock; 193 return lock;
194} 194}
195 195
196int stv0900_sw_algo(struct stv0900_internal *intp, 196static int stv0900_sw_algo(struct stv0900_internal *intp,
197 enum fe_stv0900_demod_num demod) 197 enum fe_stv0900_demod_num demod)
198{ 198{
199 int lock = FALSE, 199 int lock = FALSE,
@@ -606,7 +606,12 @@ static int stv0900_get_demod_cold_lock(struct dvb_frontend *fe,
606 tuner_freq -= (current_step * currier_step); 606 tuner_freq -= (current_step * currier_step);
607 607
608 if (intp->chip_id <= 0x20) { 608 if (intp->chip_id <= 0x20) {
609 stv0900_set_tuner(fe, tuner_freq, intp->bw[d]); 609 if (intp->tuner_type[d] == 3)
610 stv0900_set_tuner_auto(intp, tuner_freq,
611 intp->bw[d], demod);
612 else
613 stv0900_set_tuner(fe, tuner_freq, intp->bw[d]);
614
610 stv0900_write_reg(intp, DMDISTATE, 0x1c); 615 stv0900_write_reg(intp, DMDISTATE, 0x1c);
611 stv0900_write_reg(intp, CFRINIT1, 0); 616 stv0900_write_reg(intp, CFRINIT1, 0);
612 stv0900_write_reg(intp, CFRINIT0, 0); 617 stv0900_write_reg(intp, CFRINIT0, 0);
@@ -790,7 +795,7 @@ static enum fe_stv0900_fec stv0900_get_vit_fec(struct stv0900_internal *intp,
790 return prate; 795 return prate;
791} 796}
792 797
793void stv0900_set_dvbs1_track_car_loop(struct stv0900_internal *intp, 798static void stv0900_set_dvbs1_track_car_loop(struct stv0900_internal *intp,
794 enum fe_stv0900_demod_num demod, 799 enum fe_stv0900_demod_num demod,
795 u32 srate) 800 u32 srate)
796{ 801{
@@ -976,8 +981,16 @@ static void stv0900_track_optimization(struct dvb_frontend *fe)
976 intp->rolloff) + 10000000; 981 intp->rolloff) + 10000000;
977 982
978 if ((intp->chip_id >= 0x20) || (blind_tun_sw == 1)) { 983 if ((intp->chip_id >= 0x20) || (blind_tun_sw == 1)) {
979 if (intp->srch_algo[demod] != STV0900_WARM_START) 984 if (intp->srch_algo[demod] != STV0900_WARM_START) {
980 stv0900_set_bandwidth(fe, intp->bw[demod]); 985 if (intp->tuner_type[demod] == 3)
986 stv0900_set_tuner_auto(intp,
987 intp->freq[demod],
988 intp->bw[demod],
989 demod);
990 else
991 stv0900_set_bandwidth(fe,
992 intp->bw[demod]);
993 }
981 } 994 }
982 995
983 if ((intp->srch_algo[demod] == STV0900_BLIND_SEARCH) || 996 if ((intp->srch_algo[demod] == STV0900_BLIND_SEARCH) ||
@@ -1202,7 +1215,11 @@ fe_stv0900_signal_type stv0900_get_signal_params(struct dvb_frontend *fe)
1202 } 1215 }
1203 1216
1204 result->standard = stv0900_get_standard(fe, d); 1217 result->standard = stv0900_get_standard(fe, d);
1205 result->frequency = stv0900_get_tuner_freq(fe); 1218 if (intp->tuner_type[demod] == 3)
1219 result->frequency = stv0900_get_freq_auto(intp, d);
1220 else
1221 result->frequency = stv0900_get_tuner_freq(fe);
1222
1206 offsetFreq = stv0900_get_carr_freq(intp, intp->mclk, d) / 1000; 1223 offsetFreq = stv0900_get_carr_freq(intp, intp->mclk, d) / 1000;
1207 result->frequency += offsetFreq; 1224 result->frequency += offsetFreq;
1208 result->symbol_rate = stv0900_get_symbol_rate(intp, intp->mclk, d); 1225 result->symbol_rate = stv0900_get_symbol_rate(intp, intp->mclk, d);
@@ -1213,6 +1230,9 @@ fe_stv0900_signal_type stv0900_get_signal_params(struct dvb_frontend *fe)
1213 result->pilot = stv0900_get_bits(intp, DEMOD_TYPE) & 0x01; 1230 result->pilot = stv0900_get_bits(intp, DEMOD_TYPE) & 0x01;
1214 result->frame_len = ((u32)stv0900_get_bits(intp, DEMOD_TYPE)) >> 1; 1231 result->frame_len = ((u32)stv0900_get_bits(intp, DEMOD_TYPE)) >> 1;
1215 result->rolloff = stv0900_get_bits(intp, ROLLOFF_STATUS); 1232 result->rolloff = stv0900_get_bits(intp, ROLLOFF_STATUS);
1233
1234 dprintk("%s: modcode=0x%x \n", __func__, result->modcode);
1235
1216 switch (result->standard) { 1236 switch (result->standard) {
1217 case STV0900_DVBS2_STANDARD: 1237 case STV0900_DVBS2_STANDARD:
1218 result->spectrum = stv0900_get_bits(intp, SPECINV_DEMOD); 1238 result->spectrum = stv0900_get_bits(intp, SPECINV_DEMOD);
@@ -1239,7 +1259,11 @@ fe_stv0900_signal_type stv0900_get_signal_params(struct dvb_frontend *fe)
1239 if ((intp->srch_algo[d] == STV0900_BLIND_SEARCH) || 1259 if ((intp->srch_algo[d] == STV0900_BLIND_SEARCH) ||
1240 (intp->symbol_rate[d] < 10000000)) { 1260 (intp->symbol_rate[d] < 10000000)) {
1241 offsetFreq = result->frequency - intp->freq[d]; 1261 offsetFreq = result->frequency - intp->freq[d];
1242 intp->freq[d] = stv0900_get_tuner_freq(fe); 1262 if (intp->tuner_type[demod] == 3)
1263 intp->freq[d] = stv0900_get_freq_auto(intp, d);
1264 else
1265 intp->freq[d] = stv0900_get_tuner_freq(fe);
1266
1243 if (ABS(offsetFreq) <= ((intp->srch_range[d] / 2000) + 500)) 1267 if (ABS(offsetFreq) <= ((intp->srch_range[d] / 2000) + 500))
1244 range = STV0900_RANGEOK; 1268 range = STV0900_RANGEOK;
1245 else if (ABS(offsetFreq) <= 1269 else if (ABS(offsetFreq) <=
@@ -1481,7 +1505,12 @@ static u32 stv0900_search_srate_coarse(struct dvb_frontend *fe)
1481 else 1505 else
1482 tuner_freq -= (current_step * currier_step); 1506 tuner_freq -= (current_step * currier_step);
1483 1507
1484 stv0900_set_tuner(fe, tuner_freq, intp->bw[demod]); 1508 if (intp->tuner_type[demod] == 3)
1509 stv0900_set_tuner_auto(intp, tuner_freq,
1510 intp->bw[demod], demod);
1511 else
1512 stv0900_set_tuner(fe, tuner_freq,
1513 intp->bw[demod]);
1485 } 1514 }
1486 } 1515 }
1487 1516
@@ -1608,7 +1637,8 @@ static int stv0900_blind_search_algo(struct dvb_frontend *fe)
1608 1637
1609 agc2_int = stv0900_blind_check_agc2_min_level(intp, demod); 1638 agc2_int = stv0900_blind_check_agc2_min_level(intp, demod);
1610 1639
1611 if (agc2_int > STV0900_BLIND_SEARCH_AGC2_TH) 1640 dprintk("%s agc2_int=%d agc2_th=%d \n", __func__, agc2_int, agc2_th);
1641 if (agc2_int > agc2_th)
1612 return FALSE; 1642 return FALSE;
1613 1643
1614 if (intp->chip_id == 0x10) 1644 if (intp->chip_id == 0x10)
@@ -1875,7 +1905,11 @@ enum fe_stv0900_signal_type stv0900_algo(struct dvb_frontend *fe)
1875 1905
1876 } 1906 }
1877 1907
1878 stv0900_set_tuner(fe, intp->freq[demod], intp->bw[demod]); 1908 if (intp->tuner_type[demod] == 3)
1909 stv0900_set_tuner_auto(intp, intp->freq[demod],
1910 intp->bw[demod], demod);
1911 else
1912 stv0900_set_tuner(fe, intp->freq[demod], intp->bw[demod]);
1879 1913
1880 agc1_power = MAKEWORD(stv0900_get_bits(intp, AGCIQ_VALUE1), 1914 agc1_power = MAKEWORD(stv0900_get_bits(intp, AGCIQ_VALUE1),
1881 stv0900_get_bits(intp, AGCIQ_VALUE0)); 1915 stv0900_get_bits(intp, AGCIQ_VALUE0));
diff --git a/drivers/media/dvb/frontends/stv090x.c b/drivers/media/dvb/frontends/stv090x.c
index 1573466a5c74..c52c3357dc54 100644
--- a/drivers/media/dvb/frontends/stv090x.c
+++ b/drivers/media/dvb/frontends/stv090x.c
@@ -37,7 +37,82 @@
37static unsigned int verbose; 37static unsigned int verbose;
38module_param(verbose, int, 0644); 38module_param(verbose, int, 0644);
39 39
40struct mutex demod_lock; 40/* internal params node */
41struct stv090x_dev {
42 /* pointer for internal params, one for each pair of demods */
43 struct stv090x_internal *internal;
44 struct stv090x_dev *next_dev;
45};
46
47/* first internal params */
48static struct stv090x_dev *stv090x_first_dev;
49
50/* find chip by i2c adapter and i2c address */
51static struct stv090x_dev *find_dev(struct i2c_adapter *i2c_adap,
52 u8 i2c_addr)
53{
54 struct stv090x_dev *temp_dev = stv090x_first_dev;
55
56 /*
57 Search of the last stv0900 chip or
58 find it by i2c adapter and i2c address */
59 while ((temp_dev != NULL) &&
60 ((temp_dev->internal->i2c_adap != i2c_adap) ||
61 (temp_dev->internal->i2c_addr != i2c_addr))) {
62
63 temp_dev = temp_dev->next_dev;
64 }
65
66 return temp_dev;
67}
68
69/* deallocating chip */
70static void remove_dev(struct stv090x_internal *internal)
71{
72 struct stv090x_dev *prev_dev = stv090x_first_dev;
73 struct stv090x_dev *del_dev = find_dev(internal->i2c_adap,
74 internal->i2c_addr);
75
76 if (del_dev != NULL) {
77 if (del_dev == stv090x_first_dev) {
78 stv090x_first_dev = del_dev->next_dev;
79 } else {
80 while (prev_dev->next_dev != del_dev)
81 prev_dev = prev_dev->next_dev;
82
83 prev_dev->next_dev = del_dev->next_dev;
84 }
85
86 kfree(del_dev);
87 }
88}
89
90/* allocating new chip */
91static struct stv090x_dev *append_internal(struct stv090x_internal *internal)
92{
93 struct stv090x_dev *new_dev;
94 struct stv090x_dev *temp_dev;
95
96 new_dev = kmalloc(sizeof(struct stv090x_dev), GFP_KERNEL);
97 if (new_dev != NULL) {
98 new_dev->internal = internal;
99 new_dev->next_dev = NULL;
100
101 /* append to list */
102 if (stv090x_first_dev == NULL) {
103 stv090x_first_dev = new_dev;
104 } else {
105 temp_dev = stv090x_first_dev;
106 while (temp_dev->next_dev != NULL)
107 temp_dev = temp_dev->next_dev;
108
109 temp_dev->next_dev = new_dev;
110 }
111 }
112
113 return new_dev;
114}
115
41 116
42/* DVBS1 and DSS C/N Lookup table */ 117/* DVBS1 and DSS C/N Lookup table */
43static const struct stv090x_tab stv090x_s1cn_tab[] = { 118static const struct stv090x_tab stv090x_s1cn_tab[] = {
@@ -683,6 +758,9 @@ static int stv090x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
683 struct stv090x_state *state = fe->demodulator_priv; 758 struct stv090x_state *state = fe->demodulator_priv;
684 u32 reg; 759 u32 reg;
685 760
761 if (enable)
762 mutex_lock(&state->internal->tuner_lock);
763
686 reg = STV090x_READ_DEMOD(state, I2CRPT); 764 reg = STV090x_READ_DEMOD(state, I2CRPT);
687 if (enable) { 765 if (enable) {
688 dprintk(FE_DEBUG, 1, "Enable Gate"); 766 dprintk(FE_DEBUG, 1, "Enable Gate");
@@ -696,9 +774,14 @@ static int stv090x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
696 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0) 774 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
697 goto err; 775 goto err;
698 } 776 }
777
778 if (!enable)
779 mutex_unlock(&state->internal->tuner_lock);
780
699 return 0; 781 return 0;
700err: 782err:
701 dprintk(FE_ERROR, 1, "I/O error"); 783 dprintk(FE_ERROR, 1, "I/O error");
784 mutex_unlock(&state->internal->tuner_lock);
702 return -1; 785 return -1;
703} 786}
704 787
@@ -755,13 +838,13 @@ static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
755 838
756 if (srate > 60000000) { 839 if (srate > 60000000) {
757 sym = (srate << 4); /* SR * 2^16 / master_clk */ 840 sym = (srate << 4); /* SR * 2^16 / master_clk */
758 sym /= (state->mclk >> 12); 841 sym /= (state->internal->mclk >> 12);
759 } else if (srate > 6000000) { 842 } else if (srate > 6000000) {
760 sym = (srate << 6); 843 sym = (srate << 6);
761 sym /= (state->mclk >> 10); 844 sym /= (state->internal->mclk >> 10);
762 } else { 845 } else {
763 sym = (srate << 9); 846 sym = (srate << 9);
764 sym /= (state->mclk >> 7); 847 sym /= (state->internal->mclk >> 7);
765 } 848 }
766 849
767 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */ 850 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
@@ -782,13 +865,13 @@ static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate
782 srate = 105 * (srate / 100); 865 srate = 105 * (srate / 100);
783 if (srate > 60000000) { 866 if (srate > 60000000) {
784 sym = (srate << 4); /* SR * 2^16 / master_clk */ 867 sym = (srate << 4); /* SR * 2^16 / master_clk */
785 sym /= (state->mclk >> 12); 868 sym /= (state->internal->mclk >> 12);
786 } else if (srate > 6000000) { 869 } else if (srate > 6000000) {
787 sym = (srate << 6); 870 sym = (srate << 6);
788 sym /= (state->mclk >> 10); 871 sym /= (state->internal->mclk >> 10);
789 } else { 872 } else {
790 sym = (srate << 9); 873 sym = (srate << 9);
791 sym /= (state->mclk >> 7); 874 sym /= (state->internal->mclk >> 7);
792 } 875 }
793 876
794 if (sym < 0x7fff) { 877 if (sym < 0x7fff) {
@@ -816,13 +899,13 @@ static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate
816 srate = 95 * (srate / 100); 899 srate = 95 * (srate / 100);
817 if (srate > 60000000) { 900 if (srate > 60000000) {
818 sym = (srate << 4); /* SR * 2^16 / master_clk */ 901 sym = (srate << 4); /* SR * 2^16 / master_clk */
819 sym /= (state->mclk >> 12); 902 sym /= (state->internal->mclk >> 12);
820 } else if (srate > 6000000) { 903 } else if (srate > 6000000) {
821 sym = (srate << 6); 904 sym = (srate << 6);
822 sym /= (state->mclk >> 10); 905 sym /= (state->internal->mclk >> 10);
823 } else { 906 } else {
824 sym = (srate << 9); 907 sym = (srate << 9);
825 sym /= (state->mclk >> 7); 908 sym /= (state->internal->mclk >> 7);
826 } 909 }
827 910
828 if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */ 911 if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */
@@ -1103,21 +1186,21 @@ static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1103 1186
1104 switch (state->demod) { 1187 switch (state->demod) {
1105 case STV090x_DEMODULATOR_0: 1188 case STV090x_DEMODULATOR_0:
1106 mutex_lock(&demod_lock); 1189 mutex_lock(&state->internal->demod_lock);
1107 reg = stv090x_read_reg(state, STV090x_STOPCLK2); 1190 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1108 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable); 1191 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
1109 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) 1192 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1110 goto err; 1193 goto err;
1111 mutex_unlock(&demod_lock); 1194 mutex_unlock(&state->internal->demod_lock);
1112 break; 1195 break;
1113 1196
1114 case STV090x_DEMODULATOR_1: 1197 case STV090x_DEMODULATOR_1:
1115 mutex_lock(&demod_lock); 1198 mutex_lock(&state->internal->demod_lock);
1116 reg = stv090x_read_reg(state, STV090x_STOPCLK2); 1199 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1117 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable); 1200 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
1118 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) 1201 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1119 goto err; 1202 goto err;
1120 mutex_unlock(&demod_lock); 1203 mutex_unlock(&state->internal->demod_lock);
1121 break; 1204 break;
1122 1205
1123 default: 1206 default:
@@ -1126,14 +1209,14 @@ static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1126 } 1209 }
1127 return 0; 1210 return 0;
1128err: 1211err:
1129 mutex_unlock(&demod_lock); 1212 mutex_unlock(&state->internal->demod_lock);
1130 dprintk(FE_ERROR, 1, "I/O error"); 1213 dprintk(FE_ERROR, 1, "I/O error");
1131 return -1; 1214 return -1;
1132} 1215}
1133 1216
1134static int stv090x_dvbs_track_crl(struct stv090x_state *state) 1217static int stv090x_dvbs_track_crl(struct stv090x_state *state)
1135{ 1218{
1136 if (state->dev_ver >= 0x30) { 1219 if (state->internal->dev_ver >= 0x30) {
1137 /* Set ACLC BCLC optimised value vs SR */ 1220 /* Set ACLC BCLC optimised value vs SR */
1138 if (state->srate >= 15000000) { 1221 if (state->srate >= 15000000) {
1139 if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0) 1222 if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
@@ -1215,7 +1298,7 @@ static int stv090x_delivery_search(struct stv090x_state *state)
1215 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0) 1298 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1216 goto err; 1299 goto err;
1217 1300
1218 if (state->dev_ver <= 0x20) { 1301 if (state->internal->dev_ver <= 0x20) {
1219 /* enable S2 carrier loop */ 1302 /* enable S2 carrier loop */
1220 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0) 1303 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1221 goto err; 1304 goto err;
@@ -1246,6 +1329,10 @@ static int stv090x_delivery_search(struct stv090x_state *state)
1246 default: 1329 default:
1247 /* enable DVB-S2 and DVB-S2 in Auto MODE */ 1330 /* enable DVB-S2 and DVB-S2 in Auto MODE */
1248 reg = STV090x_READ_DEMOD(state, DMDCFGMD); 1331 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1332 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1333 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1334 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1335 goto err;
1249 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1); 1336 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1250 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1); 1337 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1251 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) 1338 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
@@ -1257,7 +1344,7 @@ static int stv090x_delivery_search(struct stv090x_state *state)
1257 if (stv090x_dvbs_track_crl(state) < 0) 1344 if (stv090x_dvbs_track_crl(state) < 0)
1258 goto err; 1345 goto err;
1259 1346
1260 if (state->dev_ver <= 0x20) { 1347 if (state->internal->dev_ver <= 0x20) {
1261 /* enable S2 carrier loop */ 1348 /* enable S2 carrier loop */
1262 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0) 1349 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1263 goto err; 1350 goto err;
@@ -1304,7 +1391,7 @@ static int stv090x_start_search(struct stv090x_state *state)
1304 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0) 1391 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1305 goto err; 1392 goto err;
1306 1393
1307 if (state->dev_ver <= 0x20) { 1394 if (state->internal->dev_ver <= 0x20) {
1308 if (state->srate <= 5000000) { 1395 if (state->srate <= 5000000) {
1309 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0) 1396 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
1310 goto err; 1397 goto err;
@@ -1348,7 +1435,7 @@ static int stv090x_start_search(struct stv090x_state *state)
1348 * CFR max = +1MHz 1435 * CFR max = +1MHz
1349 */ 1436 */
1350 freq_abs = 1000 << 16; 1437 freq_abs = 1000 << 16;
1351 freq_abs /= (state->mclk / 1000); 1438 freq_abs /= (state->internal->mclk / 1000);
1352 freq = (s16) freq_abs; 1439 freq = (s16) freq_abs;
1353 } else { 1440 } else {
1354 /* COLD Start 1441 /* COLD Start
@@ -1358,7 +1445,7 @@ static int stv090x_start_search(struct stv090x_state *state)
1358 */ 1445 */
1359 freq_abs = (state->search_range / 2000) + 600; 1446 freq_abs = (state->search_range / 2000) + 600;
1360 freq_abs = freq_abs << 16; 1447 freq_abs = freq_abs << 16;
1361 freq_abs /= (state->mclk / 1000); 1448 freq_abs /= (state->internal->mclk / 1000);
1362 freq = (s16) freq_abs; 1449 freq = (s16) freq_abs;
1363 } 1450 }
1364 1451
@@ -1381,7 +1468,7 @@ static int stv090x_start_search(struct stv090x_state *state)
1381 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0) 1468 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
1382 goto err; 1469 goto err;
1383 1470
1384 if (state->dev_ver >= 0x20) { 1471 if (state->internal->dev_ver >= 0x20) {
1385 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0) 1472 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1386 goto err; 1473 goto err;
1387 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0) 1474 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
@@ -1418,10 +1505,10 @@ static int stv090x_start_search(struct stv090x_state *state)
1418 if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) 1505 if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)
1419 goto err; 1506 goto err;
1420 1507
1421 if (state->dev_ver >= 0x20) { 1508 if (state->internal->dev_ver >= 0x20) {
1422 /*Frequency offset detector setting*/ 1509 /*Frequency offset detector setting*/
1423 if (state->srate < 2000000) { 1510 if (state->srate < 2000000) {
1424 if (state->dev_ver <= 0x20) { 1511 if (state->internal->dev_ver <= 0x20) {
1425 /* Cut 2 */ 1512 /* Cut 2 */
1426 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0) 1513 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
1427 goto err; 1514 goto err;
@@ -1512,7 +1599,7 @@ static int stv090x_get_agc2_min_level(struct stv090x_state *state)
1512 steps = 1; 1599 steps = 1;
1513 1600
1514 dir = 1; 1601 dir = 1;
1515 freq_step = (1000000 * 256) / (state->mclk / 256); 1602 freq_step = (1000000 * 256) / (state->internal->mclk / 256);
1516 freq_init = 0; 1603 freq_init = 0;
1517 1604
1518 for (i = 0; i < steps; i++) { 1605 for (i = 0; i < steps; i++) {
@@ -1583,7 +1670,7 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1583 u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg; 1670 u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
1584 u32 agc2th; 1671 u32 agc2th;
1585 1672
1586 if (state->dev_ver >= 0x30) 1673 if (state->internal->dev_ver >= 0x30)
1587 agc2th = 0x2e00; 1674 agc2th = 0x2e00;
1588 else 1675 else
1589 agc2th = 0x1f00; 1676 agc2th = 0x1f00;
@@ -1619,13 +1706,13 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1619 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0) 1706 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
1620 goto err; 1707 goto err;
1621 1708
1622 if (state->dev_ver >= 0x30) { 1709 if (state->internal->dev_ver >= 0x30) {
1623 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0) 1710 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
1624 goto err; 1711 goto err;
1625 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0) 1712 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0)
1626 goto err; 1713 goto err;
1627 1714
1628 } else if (state->dev_ver >= 0x20) { 1715 } else if (state->internal->dev_ver >= 0x20) {
1629 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0) 1716 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
1630 goto err; 1717 goto err;
1631 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0) 1718 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
@@ -1677,7 +1764,7 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1677 STV090x_READ_DEMOD(state, AGC2I0); 1764 STV090x_READ_DEMOD(state, AGC2I0);
1678 } 1765 }
1679 agc2 /= 10; 1766 agc2 /= 10;
1680 srate_coarse = stv090x_get_srate(state, state->mclk); 1767 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1681 cur_step++; 1768 cur_step++;
1682 dir *= -1; 1769 dir *= -1;
1683 if ((tmg_cpt >= 5) && (agc2 < agc2th) && 1770 if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
@@ -1695,12 +1782,12 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1695 1782
1696 if (state->config->tuner_set_frequency) { 1783 if (state->config->tuner_set_frequency) {
1697 if (state->config->tuner_set_frequency(fe, freq) < 0) 1784 if (state->config->tuner_set_frequency(fe, freq) < 0)
1698 goto err; 1785 goto err_gateoff;
1699 } 1786 }
1700 1787
1701 if (state->config->tuner_set_bandwidth) { 1788 if (state->config->tuner_set_bandwidth) {
1702 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0) 1789 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
1703 goto err; 1790 goto err_gateoff;
1704 } 1791 }
1705 1792
1706 if (stv090x_i2c_gate_ctrl(fe, 0) < 0) 1793 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
@@ -1713,7 +1800,7 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1713 1800
1714 if (state->config->tuner_get_status) { 1801 if (state->config->tuner_get_status) {
1715 if (state->config->tuner_get_status(fe, &reg) < 0) 1802 if (state->config->tuner_get_status(fe, &reg) < 0)
1716 goto err; 1803 goto err_gateoff;
1717 } 1804 }
1718 1805
1719 if (reg) 1806 if (reg)
@@ -1729,9 +1816,12 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1729 if (!tmg_lock) 1816 if (!tmg_lock)
1730 srate_coarse = 0; 1817 srate_coarse = 0;
1731 else 1818 else
1732 srate_coarse = stv090x_get_srate(state, state->mclk); 1819 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1733 1820
1734 return srate_coarse; 1821 return srate_coarse;
1822
1823err_gateoff:
1824 stv090x_i2c_gate_ctrl(fe, 0);
1735err: 1825err:
1736 dprintk(FE_ERROR, 1, "I/O error"); 1826 dprintk(FE_ERROR, 1, "I/O error");
1737 return -1; 1827 return -1;
@@ -1741,7 +1831,7 @@ static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1741{ 1831{
1742 u32 srate_coarse, freq_coarse, sym, reg; 1832 u32 srate_coarse, freq_coarse, sym, reg;
1743 1833
1744 srate_coarse = stv090x_get_srate(state, state->mclk); 1834 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1745 freq_coarse = STV090x_READ_DEMOD(state, CFR2) << 8; 1835 freq_coarse = STV090x_READ_DEMOD(state, CFR2) << 8;
1746 freq_coarse |= STV090x_READ_DEMOD(state, CFR1); 1836 freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
1747 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */ 1837 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
@@ -1767,10 +1857,10 @@ static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1767 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0) 1857 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1768 goto err; 1858 goto err;
1769 1859
1770 if (state->dev_ver >= 0x30) { 1860 if (state->internal->dev_ver >= 0x30) {
1771 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0) 1861 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
1772 goto err; 1862 goto err;
1773 } else if (state->dev_ver >= 0x20) { 1863 } else if (state->internal->dev_ver >= 0x20) {
1774 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0) 1864 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
1775 goto err; 1865 goto err;
1776 } 1866 }
@@ -1778,20 +1868,20 @@ static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1778 if (srate_coarse > 3000000) { 1868 if (srate_coarse > 3000000) {
1779 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */ 1869 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1780 sym = (sym / 1000) * 65536; 1870 sym = (sym / 1000) * 65536;
1781 sym /= (state->mclk / 1000); 1871 sym /= (state->internal->mclk / 1000);
1782 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) 1872 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1783 goto err; 1873 goto err;
1784 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) 1874 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1785 goto err; 1875 goto err;
1786 sym = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */ 1876 sym = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
1787 sym = (sym / 1000) * 65536; 1877 sym = (sym / 1000) * 65536;
1788 sym /= (state->mclk / 1000); 1878 sym /= (state->internal->mclk / 1000);
1789 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0) 1879 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1790 goto err; 1880 goto err;
1791 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0) 1881 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1792 goto err; 1882 goto err;
1793 sym = (srate_coarse / 1000) * 65536; 1883 sym = (srate_coarse / 1000) * 65536;
1794 sym /= (state->mclk / 1000); 1884 sym /= (state->internal->mclk / 1000);
1795 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0) 1885 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1796 goto err; 1886 goto err;
1797 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0) 1887 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
@@ -1799,20 +1889,20 @@ static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1799 } else { 1889 } else {
1800 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */ 1890 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1801 sym = (sym / 100) * 65536; 1891 sym = (sym / 100) * 65536;
1802 sym /= (state->mclk / 100); 1892 sym /= (state->internal->mclk / 100);
1803 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) 1893 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1804 goto err; 1894 goto err;
1805 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) 1895 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1806 goto err; 1896 goto err;
1807 sym = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */ 1897 sym = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
1808 sym = (sym / 100) * 65536; 1898 sym = (sym / 100) * 65536;
1809 sym /= (state->mclk / 100); 1899 sym /= (state->internal->mclk / 100);
1810 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0) 1900 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1811 goto err; 1901 goto err;
1812 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0) 1902 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1813 goto err; 1903 goto err;
1814 sym = (srate_coarse / 100) * 65536; 1904 sym = (srate_coarse / 100) * 65536;
1815 sym /= (state->mclk / 100); 1905 sym /= (state->internal->mclk / 100);
1816 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0) 1906 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1817 goto err; 1907 goto err;
1818 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0) 1908 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
@@ -1874,18 +1964,19 @@ static int stv090x_blind_search(struct stv090x_state *state)
1874 u32 agc2, reg, srate_coarse; 1964 u32 agc2, reg, srate_coarse;
1875 s32 cpt_fail, agc2_ovflw, i; 1965 s32 cpt_fail, agc2_ovflw, i;
1876 u8 k_ref, k_max, k_min; 1966 u8 k_ref, k_max, k_min;
1877 int coarse_fail, lock; 1967 int coarse_fail = 0;
1968 int lock;
1878 1969
1879 k_max = 110; 1970 k_max = 110;
1880 k_min = 10; 1971 k_min = 10;
1881 1972
1882 agc2 = stv090x_get_agc2_min_level(state); 1973 agc2 = stv090x_get_agc2_min_level(state);
1883 1974
1884 if (agc2 > STV090x_SEARCH_AGC2_TH(state->dev_ver)) { 1975 if (agc2 > STV090x_SEARCH_AGC2_TH(state->internal->dev_ver)) {
1885 lock = 0; 1976 lock = 0;
1886 } else { 1977 } else {
1887 1978
1888 if (state->dev_ver <= 0x20) { 1979 if (state->internal->dev_ver <= 0x20) {
1889 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0) 1980 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1890 goto err; 1981 goto err;
1891 } else { 1982 } else {
@@ -1897,7 +1988,7 @@ static int stv090x_blind_search(struct stv090x_state *state)
1897 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0) 1988 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1898 goto err; 1989 goto err;
1899 1990
1900 if (state->dev_ver >= 0x20) { 1991 if (state->internal->dev_ver >= 0x20) {
1901 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0) 1992 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1902 goto err; 1993 goto err;
1903 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0) 1994 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
@@ -1956,7 +2047,7 @@ static int stv090x_chk_tmg(struct stv090x_state *state)
1956 u32 reg; 2047 u32 reg;
1957 s32 tmg_cpt = 0, i; 2048 s32 tmg_cpt = 0, i;
1958 u8 freq, tmg_thh, tmg_thl; 2049 u8 freq, tmg_thh, tmg_thl;
1959 int tmg_lock; 2050 int tmg_lock = 0;
1960 2051
1961 freq = STV090x_READ_DEMOD(state, CARFREQ); 2052 freq = STV090x_READ_DEMOD(state, CARFREQ);
1962 tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE); 2053 tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
@@ -2080,12 +2171,12 @@ static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
2080 2171
2081 if (state->config->tuner_set_frequency) { 2172 if (state->config->tuner_set_frequency) {
2082 if (state->config->tuner_set_frequency(fe, freq) < 0) 2173 if (state->config->tuner_set_frequency(fe, freq) < 0)
2083 goto err; 2174 goto err_gateoff;
2084 } 2175 }
2085 2176
2086 if (state->config->tuner_set_bandwidth) { 2177 if (state->config->tuner_set_bandwidth) {
2087 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0) 2178 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2088 goto err; 2179 goto err_gateoff;
2089 } 2180 }
2090 2181
2091 if (stv090x_i2c_gate_ctrl(fe, 0) < 0) 2182 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
@@ -2098,7 +2189,7 @@ static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
2098 2189
2099 if (state->config->tuner_get_status) { 2190 if (state->config->tuner_get_status) {
2100 if (state->config->tuner_get_status(fe, &reg) < 0) 2191 if (state->config->tuner_get_status(fe, &reg) < 0)
2101 goto err; 2192 goto err_gateoff;
2102 } 2193 }
2103 2194
2104 if (reg) 2195 if (reg)
@@ -2129,6 +2220,8 @@ static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
2129 2220
2130 return lock; 2221 return lock;
2131 2222
2223err_gateoff:
2224 stv090x_i2c_gate_ctrl(fe, 0);
2132err: 2225err:
2133 dprintk(FE_ERROR, 1, "I/O error"); 2226 dprintk(FE_ERROR, 1, "I/O error");
2134 return -1; 2227 return -1;
@@ -2142,13 +2235,13 @@ static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s
2142 car_max = state->search_range / 1000; 2235 car_max = state->search_range / 1000;
2143 car_max += car_max / 10; 2236 car_max += car_max / 10;
2144 car_max = 65536 * (car_max / 2); 2237 car_max = 65536 * (car_max / 2);
2145 car_max /= (state->mclk / 1000); 2238 car_max /= (state->internal->mclk / 1000);
2146 2239
2147 if (car_max > 0x4000) 2240 if (car_max > 0x4000)
2148 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */ 2241 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
2149 2242
2150 inc = srate; 2243 inc = srate;
2151 inc /= state->mclk / 1000; 2244 inc /= state->internal->mclk / 1000;
2152 inc *= 256; 2245 inc *= 256;
2153 inc *= 256; 2246 inc *= 256;
2154 inc /= 1000; 2247 inc /= 1000;
@@ -2209,7 +2302,7 @@ static int stv090x_chk_signal(struct stv090x_state *state)
2209 2302
2210 car_max += (car_max / 10); /* 10% margin */ 2303 car_max += (car_max / 10); /* 10% margin */
2211 car_max = (65536 * car_max / 2); 2304 car_max = (65536 * car_max / 2);
2212 car_max /= state->mclk / 1000; 2305 car_max /= state->internal->mclk / 1000;
2213 2306
2214 if (car_max > 0x4000) 2307 if (car_max > 0x4000)
2215 car_max = 0x4000; 2308 car_max = 0x4000;
@@ -2234,7 +2327,7 @@ static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 tim
2234 car_max = state->search_range / 1000; 2327 car_max = state->search_range / 1000;
2235 car_max += (car_max / 10); 2328 car_max += (car_max / 10);
2236 car_max = (65536 * car_max / 2); 2329 car_max = (65536 * car_max / 2);
2237 car_max /= (state->mclk / 1000); 2330 car_max /= (state->internal->mclk / 1000);
2238 if (car_max > 0x4000) 2331 if (car_max > 0x4000)
2239 car_max = 0x4000; 2332 car_max = 0x4000;
2240 2333
@@ -2304,7 +2397,7 @@ static int stv090x_sw_algo(struct stv090x_state *state)
2304 case STV090x_SEARCH_DVBS1: 2397 case STV090x_SEARCH_DVBS1:
2305 case STV090x_SEARCH_DSS: 2398 case STV090x_SEARCH_DSS:
2306 /* accelerate the frequency detector */ 2399 /* accelerate the frequency detector */
2307 if (state->dev_ver >= 0x20) { 2400 if (state->internal->dev_ver >= 0x20) {
2308 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0) 2401 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
2309 goto err; 2402 goto err;
2310 } 2403 }
@@ -2315,7 +2408,7 @@ static int stv090x_sw_algo(struct stv090x_state *state)
2315 break; 2408 break;
2316 2409
2317 case STV090x_SEARCH_DVBS2: 2410 case STV090x_SEARCH_DVBS2:
2318 if (state->dev_ver >= 0x20) { 2411 if (state->internal->dev_ver >= 0x20) {
2319 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0) 2412 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2320 goto err; 2413 goto err;
2321 } 2414 }
@@ -2328,7 +2421,7 @@ static int stv090x_sw_algo(struct stv090x_state *state)
2328 case STV090x_SEARCH_AUTO: 2421 case STV090x_SEARCH_AUTO:
2329 default: 2422 default:
2330 /* accelerate the frequency detector */ 2423 /* accelerate the frequency detector */
2331 if (state->dev_ver >= 0x20) { 2424 if (state->internal->dev_ver >= 0x20) {
2332 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0) 2425 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
2333 goto err; 2426 goto err;
2334 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0) 2427 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
@@ -2350,7 +2443,7 @@ static int stv090x_sw_algo(struct stv090x_state *state)
2350 /*run the SW search 2 times maximum*/ 2443 /*run the SW search 2 times maximum*/
2351 if (lock || no_signal || (trials == 2)) { 2444 if (lock || no_signal || (trials == 2)) {
2352 /*Check if the demod is not losing lock in DVBS2*/ 2445 /*Check if the demod is not losing lock in DVBS2*/
2353 if (state->dev_ver >= 0x20) { 2446 if (state->internal->dev_ver >= 0x20) {
2354 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0) 2447 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2355 goto err; 2448 goto err;
2356 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0) 2449 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
@@ -2372,7 +2465,7 @@ static int stv090x_sw_algo(struct stv090x_state *state)
2372 /*FALSE lock, The demod is loosing lock */ 2465 /*FALSE lock, The demod is loosing lock */
2373 lock = 0; 2466 lock = 0;
2374 if (trials < 2) { 2467 if (trials < 2) {
2375 if (state->dev_ver >= 0x20) { 2468 if (state->internal->dev_ver >= 0x20) {
2376 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0) 2469 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2377 goto err; 2470 goto err;
2378 } 2471 }
@@ -2422,11 +2515,11 @@ static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
2422 derot |= STV090x_READ_DEMOD(state, CFR0); 2515 derot |= STV090x_READ_DEMOD(state, CFR0);
2423 2516
2424 derot = comp2(derot, 24); 2517 derot = comp2(derot, 24);
2425 int_1 = state->mclk >> 12; 2518 int_1 = mclk >> 12;
2426 int_2 = derot >> 12; 2519 int_2 = derot >> 12;
2427 2520
2428 /* carrier_frequency = MasterClock * Reg / 2^24 */ 2521 /* carrier_frequency = MasterClock * Reg / 2^24 */
2429 tmp_1 = state->mclk % 0x1000; 2522 tmp_1 = mclk % 0x1000;
2430 tmp_2 = derot % 0x1000; 2523 tmp_2 = derot % 0x1000;
2431 2524
2432 derot = (int_1 * int_2) + 2525 derot = (int_1 * int_2) +
@@ -2502,13 +2595,13 @@ static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *st
2502 2595
2503 if (state->config->tuner_get_frequency) { 2596 if (state->config->tuner_get_frequency) {
2504 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0) 2597 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2505 goto err; 2598 goto err_gateoff;
2506 } 2599 }
2507 2600
2508 if (stv090x_i2c_gate_ctrl(fe, 0) < 0) 2601 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2509 goto err; 2602 goto err;
2510 2603
2511 offst_freq = stv090x_get_car_freq(state, state->mclk) / 1000; 2604 offst_freq = stv090x_get_car_freq(state, state->internal->mclk) / 1000;
2512 state->frequency += offst_freq; 2605 state->frequency += offst_freq;
2513 2606
2514 if (stv090x_get_viterbi(state) < 0) 2607 if (stv090x_get_viterbi(state) < 0)
@@ -2530,7 +2623,7 @@ static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *st
2530 2623
2531 if (state->config->tuner_get_frequency) { 2624 if (state->config->tuner_get_frequency) {
2532 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0) 2625 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2533 goto err; 2626 goto err_gateoff;
2534 } 2627 }
2535 2628
2536 if (stv090x_i2c_gate_ctrl(fe, 0) < 0) 2629 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
@@ -2550,6 +2643,9 @@ static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *st
2550 } 2643 }
2551 2644
2552 return STV090x_OUTOFRANGE; 2645 return STV090x_OUTOFRANGE;
2646
2647err_gateoff:
2648 stv090x_i2c_gate_ctrl(fe, 0);
2553err: 2649err:
2554 dprintk(FE_ERROR, 1, "I/O error"); 2650 dprintk(FE_ERROR, 1, "I/O error");
2555 return -1; 2651 return -1;
@@ -2579,7 +2675,7 @@ static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_mod
2579 s32 i; 2675 s32 i;
2580 struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low; 2676 struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
2581 2677
2582 if (state->dev_ver == 0x20) { 2678 if (state->internal->dev_ver == 0x20) {
2583 car_loop = stv090x_s2_crl_cut20; 2679 car_loop = stv090x_s2_crl_cut20;
2584 car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut20; 2680 car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut20;
2585 car_loop_apsk_low = stv090x_s2_apsk_crl_cut20; 2681 car_loop_apsk_low = stv090x_s2_apsk_crl_cut20;
@@ -2700,7 +2796,7 @@ static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
2700 break; 2796 break;
2701 } 2797 }
2702 2798
2703 if (state->dev_ver >= 0x30) { 2799 if (state->internal->dev_ver >= 0x30) {
2704 /* Cut 3.0 and up */ 2800 /* Cut 3.0 and up */
2705 short_crl = stv090x_s2_short_crl_cut30; 2801 short_crl = stv090x_s2_short_crl_cut30;
2706 } else { 2802 } else {
@@ -2732,7 +2828,7 @@ static int stv090x_optimize_track(struct stv090x_state *state)
2732 s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0; 2828 s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
2733 u32 reg; 2829 u32 reg;
2734 2830
2735 srate = stv090x_get_srate(state, state->mclk); 2831 srate = stv090x_get_srate(state, state->internal->mclk);
2736 srate += stv090x_get_tmgoffst(state, srate); 2832 srate += stv090x_get_tmgoffst(state, srate);
2737 2833
2738 switch (state->delsys) { 2834 switch (state->delsys) {
@@ -2751,7 +2847,7 @@ static int stv090x_optimize_track(struct stv090x_state *state)
2751 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) 2847 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2752 goto err; 2848 goto err;
2753 2849
2754 if (state->dev_ver >= 0x30) { 2850 if (state->internal->dev_ver >= 0x30) {
2755 if (stv090x_get_viterbi(state) < 0) 2851 if (stv090x_get_viterbi(state) < 0)
2756 goto err; 2852 goto err;
2757 2853
@@ -2868,7 +2964,7 @@ static int stv090x_optimize_track(struct stv090x_state *state)
2868 goto err; 2964 goto err;
2869 } 2965 }
2870 2966
2871 if (state->dev_ver >= 0x20) { 2967 if (state->internal->dev_ver >= 0x20) {
2872 if ((state->search_mode == STV090x_SEARCH_DVBS1) || 2968 if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
2873 (state->search_mode == STV090x_SEARCH_DSS) || 2969 (state->search_mode == STV090x_SEARCH_DSS) ||
2874 (state->search_mode == STV090x_SEARCH_AUTO)) { 2970 (state->search_mode == STV090x_SEARCH_AUTO)) {
@@ -2890,7 +2986,8 @@ static int stv090x_optimize_track(struct stv090x_state *state)
2890 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0) 2986 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
2891 goto err; 2987 goto err;
2892 2988
2893 if ((state->dev_ver >= 0x20) || (blind_tune == 1) || (state->srate < 10000000)) { 2989 if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1) ||
2990 (state->srate < 10000000)) {
2894 /* update initial carrier freq with the found freq offset */ 2991 /* update initial carrier freq with the found freq offset */
2895 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0) 2992 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2896 goto err; 2993 goto err;
@@ -2898,7 +2995,7 @@ static int stv090x_optimize_track(struct stv090x_state *state)
2898 goto err; 2995 goto err;
2899 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000; 2996 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
2900 2997
2901 if ((state->dev_ver >= 0x20) || (blind_tune == 1)) { 2998 if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1)) {
2902 2999
2903 if (state->algo != STV090x_WARM_SEARCH) { 3000 if (state->algo != STV090x_WARM_SEARCH) {
2904 3001
@@ -2907,7 +3004,7 @@ static int stv090x_optimize_track(struct stv090x_state *state)
2907 3004
2908 if (state->config->tuner_set_bandwidth) { 3005 if (state->config->tuner_set_bandwidth) {
2909 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0) 3006 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2910 goto err; 3007 goto err_gateoff;
2911 } 3008 }
2912 3009
2913 if (stv090x_i2c_gate_ctrl(fe, 0) < 0) 3010 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
@@ -2950,7 +3047,7 @@ static int stv090x_optimize_track(struct stv090x_state *state)
2950 3047
2951 } 3048 }
2952 3049
2953 if (state->dev_ver >= 0x20) { 3050 if (state->internal->dev_ver >= 0x20) {
2954 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0) 3051 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2955 goto err; 3052 goto err;
2956 } 3053 }
@@ -2959,6 +3056,9 @@ static int stv090x_optimize_track(struct stv090x_state *state)
2959 stv090x_set_vit_thtracq(state); 3056 stv090x_set_vit_thtracq(state);
2960 3057
2961 return 0; 3058 return 0;
3059
3060err_gateoff:
3061 stv090x_i2c_gate_ctrl(fe, 0);
2962err: 3062err:
2963 dprintk(FE_ERROR, 1, "I/O error"); 3063 dprintk(FE_ERROR, 1, "I/O error");
2964 return -1; 3064 return -1;
@@ -3026,7 +3126,7 @@ static int stv090x_set_s2rolloff(struct stv090x_state *state)
3026{ 3126{
3027 u32 reg; 3127 u32 reg;
3028 3128
3029 if (state->dev_ver <= 0x20) { 3129 if (state->internal->dev_ver <= 0x20) {
3030 /* rolloff to auto mode if DVBS2 */ 3130 /* rolloff to auto mode if DVBS2 */
3031 reg = STV090x_READ_DEMOD(state, DEMOD); 3131 reg = STV090x_READ_DEMOD(state, DEMOD);
3032 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00); 3132 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
@@ -3062,7 +3162,7 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3062 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */ 3162 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
3063 goto err; 3163 goto err;
3064 3164
3065 if (state->dev_ver >= 0x20) { 3165 if (state->internal->dev_ver >= 0x20) {
3066 if (state->srate > 5000000) { 3166 if (state->srate > 5000000) {
3067 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0) 3167 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
3068 goto err; 3168 goto err;
@@ -3102,7 +3202,7 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3102 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0) 3202 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
3103 goto err; 3203 goto err;
3104 3204
3105 if (state->dev_ver >= 0x20) { 3205 if (state->internal->dev_ver >= 0x20) {
3106 if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0) 3206 if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
3107 goto err; 3207 goto err;
3108 if (state->algo == STV090x_COLD_SEARCH) 3208 if (state->algo == STV090x_COLD_SEARCH)
@@ -3120,9 +3220,11 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3120 if (stv090x_set_srate(state, state->srate) < 0) 3220 if (stv090x_set_srate(state, state->srate) < 0)
3121 goto err; 3221 goto err;
3122 3222
3123 if (stv090x_set_max_srate(state, state->mclk, state->srate) < 0) 3223 if (stv090x_set_max_srate(state, state->internal->mclk,
3224 state->srate) < 0)
3124 goto err; 3225 goto err;
3125 if (stv090x_set_min_srate(state, state->mclk, state->srate) < 0) 3226 if (stv090x_set_min_srate(state, state->internal->mclk,
3227 state->srate) < 0)
3126 goto err; 3228 goto err;
3127 3229
3128 if (state->srate >= 10000000) 3230 if (state->srate >= 10000000)
@@ -3136,18 +3238,21 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3136 goto err; 3238 goto err;
3137 3239
3138 if (state->config->tuner_set_bbgain) { 3240 if (state->config->tuner_set_bbgain) {
3139 if (state->config->tuner_set_bbgain(fe, 10) < 0) /* 10dB */ 3241 reg = state->config->tuner_bbgain;
3140 goto err; 3242 if (reg == 0)
3243 reg = 10; /* default: 10dB */
3244 if (state->config->tuner_set_bbgain(fe, reg) < 0)
3245 goto err_gateoff;
3141 } 3246 }
3142 3247
3143 if (state->config->tuner_set_frequency) { 3248 if (state->config->tuner_set_frequency) {
3144 if (state->config->tuner_set_frequency(fe, state->frequency) < 0) 3249 if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
3145 goto err; 3250 goto err_gateoff;
3146 } 3251 }
3147 3252
3148 if (state->config->tuner_set_bandwidth) { 3253 if (state->config->tuner_set_bandwidth) {
3149 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0) 3254 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
3150 goto err; 3255 goto err_gateoff;
3151 } 3256 }
3152 3257
3153 if (stv090x_i2c_gate_ctrl(fe, 0) < 0) 3258 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
@@ -3155,21 +3260,21 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3155 3260
3156 msleep(50); 3261 msleep(50);
3157 3262
3158 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
3159 goto err;
3160
3161 if (state->config->tuner_get_status) { 3263 if (state->config->tuner_get_status) {
3264 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
3265 goto err;
3162 if (state->config->tuner_get_status(fe, &reg) < 0) 3266 if (state->config->tuner_get_status(fe, &reg) < 0)
3267 goto err_gateoff;
3268 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
3163 goto err; 3269 goto err;
3164 }
3165 3270
3166 if (reg) 3271 if (reg)
3167 dprintk(FE_DEBUG, 1, "Tuner phase locked"); 3272 dprintk(FE_DEBUG, 1, "Tuner phase locked");
3168 else 3273 else {
3169 dprintk(FE_DEBUG, 1, "Tuner unlocked"); 3274 dprintk(FE_DEBUG, 1, "Tuner unlocked");
3170 3275 return STV090x_NOCARRIER;
3171 if (stv090x_i2c_gate_ctrl(fe, 0) < 0) 3276 }
3172 goto err; 3277 }
3173 3278
3174 msleep(10); 3279 msleep(10);
3175 agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1), 3280 agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
@@ -3194,7 +3299,7 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3194 reg = STV090x_READ_DEMOD(state, DEMOD); 3299 reg = STV090x_READ_DEMOD(state, DEMOD);
3195 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion); 3300 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
3196 3301
3197 if (state->dev_ver <= 0x20) { 3302 if (state->internal->dev_ver <= 0x20) {
3198 /* rolloff to auto mode if DVBS2 */ 3303 /* rolloff to auto mode if DVBS2 */
3199 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1); 3304 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
3200 } else { 3305 } else {
@@ -3238,7 +3343,7 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3238 if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */ 3343 if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
3239 stv090x_optimize_track(state); 3344 stv090x_optimize_track(state);
3240 3345
3241 if (state->dev_ver >= 0x20) { 3346 if (state->internal->dev_ver >= 0x20) {
3242 /* >= Cut 2.0 :release TS reset after 3347 /* >= Cut 2.0 :release TS reset after
3243 * demod lock and optimized Tracking 3348 * demod lock and optimized Tracking
3244 */ 3349 */
@@ -3293,6 +3398,8 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3293 } 3398 }
3294 return signal_state; 3399 return signal_state;
3295 3400
3401err_gateoff:
3402 stv090x_i2c_gate_ctrl(fe, 0);
3296err: 3403err:
3297 dprintk(FE_ERROR, 1, "I/O error"); 3404 dprintk(FE_ERROR, 1, "I/O error");
3298 return -1; 3405 return -1;
@@ -3303,6 +3410,9 @@ static enum dvbfe_search stv090x_search(struct dvb_frontend *fe, struct dvb_fron
3303 struct stv090x_state *state = fe->demodulator_priv; 3410 struct stv090x_state *state = fe->demodulator_priv;
3304 struct dtv_frontend_properties *props = &fe->dtv_property_cache; 3411 struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3305 3412
3413 if (p->frequency == 0)
3414 return DVBFE_ALGO_SEARCH_INVALID;
3415
3306 state->delsys = props->delivery_system; 3416 state->delsys = props->delivery_system;
3307 state->frequency = p->frequency; 3417 state->frequency = p->frequency;
3308 state->srate = p->u.qpsk.symbol_rate; 3418 state->srate = p->u.qpsk.symbol_rate;
@@ -3353,7 +3463,8 @@ static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3353 if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) { 3463 if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) {
3354 reg = STV090x_READ_DEMOD(state, TSSTATUS); 3464 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3355 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) { 3465 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3356 *status = FE_HAS_CARRIER | 3466 *status = FE_HAS_SIGNAL |
3467 FE_HAS_CARRIER |
3357 FE_HAS_VITERBI | 3468 FE_HAS_VITERBI |
3358 FE_HAS_SYNC | 3469 FE_HAS_SYNC |
3359 FE_HAS_LOCK; 3470 FE_HAS_LOCK;
@@ -3370,7 +3481,11 @@ static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3370 if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) { 3481 if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
3371 reg = STV090x_READ_DEMOD(state, TSSTATUS); 3482 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3372 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) { 3483 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3373 *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; 3484 *status = FE_HAS_SIGNAL |
3485 FE_HAS_CARRIER |
3486 FE_HAS_VITERBI |
3487 FE_HAS_SYNC |
3488 FE_HAS_LOCK;
3374 } 3489 }
3375 } 3490 }
3376 } 3491 }
@@ -3770,6 +3885,15 @@ static void stv090x_release(struct dvb_frontend *fe)
3770{ 3885{
3771 struct stv090x_state *state = fe->demodulator_priv; 3886 struct stv090x_state *state = fe->demodulator_priv;
3772 3887
3888 state->internal->num_used--;
3889 if (state->internal->num_used <= 0) {
3890
3891 dprintk(FE_ERROR, 1, "Actually removing");
3892
3893 remove_dev(state->internal);
3894 kfree(state->internal);
3895 }
3896
3773 kfree(state); 3897 kfree(state);
3774} 3898}
3775 3899
@@ -3901,10 +4025,10 @@ static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
3901 if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0) 4025 if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
3902 goto err; 4026 goto err;
3903 4027
3904 state->mclk = stv090x_get_mclk(state); 4028 state->internal->mclk = stv090x_get_mclk(state);
3905 4029
3906 /*Set the DiseqC frequency to 22KHz */ 4030 /*Set the DiseqC frequency to 22KHz */
3907 div = state->mclk / 704000; 4031 div = state->internal->mclk / 704000;
3908 if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0) 4032 if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
3909 goto err; 4033 goto err;
3910 if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0) 4034 if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
@@ -3920,7 +4044,7 @@ static int stv090x_set_tspath(struct stv090x_state *state)
3920{ 4044{
3921 u32 reg; 4045 u32 reg;
3922 4046
3923 if (state->dev_ver >= 0x20) { 4047 if (state->internal->dev_ver >= 0x20) {
3924 switch (state->config->ts1_mode) { 4048 switch (state->config->ts1_mode) {
3925 case STV090x_TSMODE_PARALLEL_PUNCTURED: 4049 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3926 case STV090x_TSMODE_DVBCI: 4050 case STV090x_TSMODE_DVBCI:
@@ -4092,6 +4216,71 @@ static int stv090x_set_tspath(struct stv090x_state *state)
4092 default: 4216 default:
4093 break; 4217 break;
4094 } 4218 }
4219
4220 if (state->config->ts1_clk > 0) {
4221 u32 speed;
4222
4223 switch (state->config->ts1_mode) {
4224 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4225 case STV090x_TSMODE_DVBCI:
4226 default:
4227 speed = state->internal->mclk /
4228 (state->config->ts1_clk / 4);
4229 if (speed < 0x08)
4230 speed = 0x08;
4231 if (speed > 0xFF)
4232 speed = 0xFF;
4233 break;
4234 case STV090x_TSMODE_SERIAL_PUNCTURED:
4235 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4236 speed = state->internal->mclk /
4237 (state->config->ts1_clk / 32);
4238 if (speed < 0x20)
4239 speed = 0x20;
4240 if (speed > 0xFF)
4241 speed = 0xFF;
4242 break;
4243 }
4244 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4245 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4246 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4247 goto err;
4248 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
4249 goto err;
4250 }
4251
4252 if (state->config->ts2_clk > 0) {
4253 u32 speed;
4254
4255 switch (state->config->ts2_mode) {
4256 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4257 case STV090x_TSMODE_DVBCI:
4258 default:
4259 speed = state->internal->mclk /
4260 (state->config->ts2_clk / 4);
4261 if (speed < 0x08)
4262 speed = 0x08;
4263 if (speed > 0xFF)
4264 speed = 0xFF;
4265 break;
4266 case STV090x_TSMODE_SERIAL_PUNCTURED:
4267 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4268 speed = state->internal->mclk /
4269 (state->config->ts2_clk / 32);
4270 if (speed < 0x20)
4271 speed = 0x20;
4272 if (speed > 0xFF)
4273 speed = 0xFF;
4274 break;
4275 }
4276 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
4277 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4278 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
4279 goto err;
4280 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0)
4281 goto err;
4282 }
4283
4095 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH); 4284 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4096 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01); 4285 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4097 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) 4286 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
@@ -4120,6 +4309,15 @@ static int stv090x_init(struct dvb_frontend *fe)
4120 const struct stv090x_config *config = state->config; 4309 const struct stv090x_config *config = state->config;
4121 u32 reg; 4310 u32 reg;
4122 4311
4312 if (state->internal->mclk == 0) {
4313 stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
4314 msleep(5);
4315 if (stv090x_write_reg(state, STV090x_SYNTCTRL,
4316 0x20 | config->clk_mode) < 0)
4317 goto err;
4318 stv090x_get_mclk(state);
4319 }
4320
4123 if (stv090x_wakeup(fe) < 0) { 4321 if (stv090x_wakeup(fe) < 0) {
4124 dprintk(FE_ERROR, 1, "Error waking device"); 4322 dprintk(FE_ERROR, 1, "Error waking device");
4125 goto err; 4323 goto err;
@@ -4142,12 +4340,12 @@ static int stv090x_init(struct dvb_frontend *fe)
4142 4340
4143 if (config->tuner_set_mode) { 4341 if (config->tuner_set_mode) {
4144 if (config->tuner_set_mode(fe, TUNER_WAKE) < 0) 4342 if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
4145 goto err; 4343 goto err_gateoff;
4146 } 4344 }
4147 4345
4148 if (config->tuner_init) { 4346 if (config->tuner_init) {
4149 if (config->tuner_init(fe) < 0) 4347 if (config->tuner_init(fe) < 0)
4150 goto err; 4348 goto err_gateoff;
4151 } 4349 }
4152 4350
4153 if (stv090x_i2c_gate_ctrl(fe, 0) < 0) 4351 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
@@ -4157,6 +4355,9 @@ static int stv090x_init(struct dvb_frontend *fe)
4157 goto err; 4355 goto err;
4158 4356
4159 return 0; 4357 return 0;
4358
4359err_gateoff:
4360 stv090x_i2c_gate_ctrl(fe, 0);
4160err: 4361err:
4161 dprintk(FE_ERROR, 1, "I/O error"); 4362 dprintk(FE_ERROR, 1, "I/O error");
4162 return -1; 4363 return -1;
@@ -4188,16 +4389,26 @@ static int stv090x_setup(struct dvb_frontend *fe)
4188 } 4389 }
4189 4390
4190 /* STV090x init */ 4391 /* STV090x init */
4191 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Stop Demod */ 4392
4393 /* Stop Demod */
4394 if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0)
4395 goto err;
4396 if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0)
4192 goto err; 4397 goto err;
4193 4398
4194 msleep(5); 4399 msleep(5);
4195 4400
4196 if (STV090x_WRITE_DEMOD(state, TNRCFG, 0x6c) < 0) /* check register ! (No Tuner Mode) */ 4401 /* Set No Tuner Mode */
4402 if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0)
4403 goto err;
4404 if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0)
4197 goto err; 4405 goto err;
4198 4406
4407 /* I2C repeater OFF */
4199 STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level); 4408 STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
4200 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0) /* repeater OFF */ 4409 if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0)
4410 goto err;
4411 if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0)
4201 goto err; 4412 goto err;
4202 4413
4203 if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */ 4414 if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
@@ -4216,8 +4427,8 @@ static int stv090x_setup(struct dvb_frontend *fe)
4216 goto err; 4427 goto err;
4217 } 4428 }
4218 4429
4219 state->dev_ver = stv090x_read_reg(state, STV090x_MID); 4430 state->internal->dev_ver = stv090x_read_reg(state, STV090x_MID);
4220 if (state->dev_ver >= 0x20) { 4431 if (state->internal->dev_ver >= 0x20) {
4221 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0) 4432 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4222 goto err; 4433 goto err;
4223 4434
@@ -4228,27 +4439,35 @@ static int stv090x_setup(struct dvb_frontend *fe)
4228 goto err; 4439 goto err;
4229 } 4440 }
4230 4441
4231 } else if (state->dev_ver < 0x20) { 4442 } else if (state->internal->dev_ver < 0x20) {
4232 dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!", 4443 dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
4233 state->dev_ver); 4444 state->internal->dev_ver);
4234 4445
4235 goto err; 4446 goto err;
4236 } else if (state->dev_ver > 0x30) { 4447 } else if (state->internal->dev_ver > 0x30) {
4237 /* we shouldn't bail out from here */ 4448 /* we shouldn't bail out from here */
4238 dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!", 4449 dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
4239 state->dev_ver); 4450 state->internal->dev_ver);
4240 } 4451 }
4241 4452
4242 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0) 4453 /* ADC1 range */
4454 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
4455 STV090x_SETFIELD(reg, ADC1_INMODE_FIELD,
4456 (config->adc1_range == STV090x_ADC_1Vpp) ? 0 : 1);
4457 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
4243 goto err; 4458 goto err;
4244 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0) 4459
4460 /* ADC2 range */
4461 reg = stv090x_read_reg(state, STV090x_TSTTNR3);
4462 STV090x_SETFIELD(reg, ADC2_INMODE_FIELD,
4463 (config->adc2_range == STV090x_ADC_1Vpp) ? 0 : 1);
4464 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
4245 goto err; 4465 goto err;
4246 4466
4247 stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */ 4467 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
4248 msleep(5); 4468 goto err;
4249 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) 4469 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
4250 goto err; 4470 goto err;
4251 stv090x_get_mclk(state);
4252 4471
4253 return 0; 4472 return 0;
4254err: 4473err:
@@ -4299,6 +4518,7 @@ struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
4299 enum stv090x_demodulator demod) 4518 enum stv090x_demodulator demod)
4300{ 4519{
4301 struct stv090x_state *state = NULL; 4520 struct stv090x_state *state = NULL;
4521 struct stv090x_dev *temp_int;
4302 4522
4303 state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL); 4523 state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
4304 if (state == NULL) 4524 if (state == NULL)
@@ -4314,8 +4534,32 @@ struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
4314 state->device = config->device; 4534 state->device = config->device;
4315 state->rolloff = STV090x_RO_35; /* default */ 4535 state->rolloff = STV090x_RO_35; /* default */
4316 4536
4317 if (state->demod == STV090x_DEMODULATOR_0) 4537 temp_int = find_dev(state->i2c,
4318 mutex_init(&demod_lock); 4538 state->config->address);
4539
4540 if ((temp_int != NULL) && (state->demod_mode == STV090x_DUAL)) {
4541 state->internal = temp_int->internal;
4542 state->internal->num_used++;
4543 dprintk(FE_INFO, 1, "Found Internal Structure!");
4544 dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
4545 state->device == STV0900 ? "STV0900" : "STV0903",
4546 demod,
4547 state->internal->dev_ver);
4548 return &state->frontend;
4549 } else {
4550 state->internal = kmalloc(sizeof(struct stv090x_internal),
4551 GFP_KERNEL);
4552 temp_int = append_internal(state->internal);
4553 state->internal->num_used = 1;
4554 state->internal->mclk = 0;
4555 state->internal->dev_ver = 0;
4556 state->internal->i2c_adap = state->i2c;
4557 state->internal->i2c_addr = state->config->address;
4558 dprintk(FE_INFO, 1, "Create New Internal Structure!");
4559 }
4560
4561 mutex_init(&state->internal->demod_lock);
4562 mutex_init(&state->internal->tuner_lock);
4319 4563
4320 if (stv090x_sleep(&state->frontend) < 0) { 4564 if (stv090x_sleep(&state->frontend) < 0) {
4321 dprintk(FE_ERROR, 1, "Error putting device to sleep"); 4565 dprintk(FE_ERROR, 1, "Error putting device to sleep");
@@ -4331,10 +4575,10 @@ struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
4331 goto error; 4575 goto error;
4332 } 4576 }
4333 4577
4334 dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x\n", 4578 dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
4335 state->device == STV0900 ? "STV0900" : "STV0903", 4579 state->device == STV0900 ? "STV0900" : "STV0903",
4336 demod, 4580 demod,
4337 state->dev_ver); 4581 state->internal->dev_ver);
4338 4582
4339 return &state->frontend; 4583 return &state->frontend;
4340 4584
diff --git a/drivers/media/dvb/frontends/stv090x.h b/drivers/media/dvb/frontends/stv090x.h
index b133807663ea..30f01a6902ac 100644
--- a/drivers/media/dvb/frontends/stv090x.h
+++ b/drivers/media/dvb/frontends/stv090x.h
@@ -60,6 +60,11 @@ enum stv090x_i2crpt {
60 STV090x_RPTLEVEL_2 = 7, 60 STV090x_RPTLEVEL_2 = 7,
61}; 61};
62 62
63enum stv090x_adc_range {
64 STV090x_ADC_2Vpp = 0,
65 STV090x_ADC_1Vpp = 1
66};
67
63struct stv090x_config { 68struct stv090x_config {
64 enum stv090x_device device; 69 enum stv090x_device device;
65 enum stv090x_mode demod_mode; 70 enum stv090x_mode demod_mode;
@@ -68,13 +73,17 @@ struct stv090x_config {
68 u32 xtal; /* default: 8000000 */ 73 u32 xtal; /* default: 8000000 */
69 u8 address; /* default: 0x68 */ 74 u8 address; /* default: 0x68 */
70 75
71 u32 ref_clk; /* default: 16000000 FIXME to tuner config */
72
73 u8 ts1_mode; 76 u8 ts1_mode;
74 u8 ts2_mode; 77 u8 ts2_mode;
78 u32 ts1_clk;
79 u32 ts2_clk;
75 80
76 enum stv090x_i2crpt repeater_level; 81 enum stv090x_i2crpt repeater_level;
77 82
83 u8 tuner_bbgain; /* default: 10db */
84 enum stv090x_adc_range adc1_range; /* default: 2Vpp */
85 enum stv090x_adc_range adc2_range; /* default: 2Vpp */
86
78 bool diseqc_envelope_mode; 87 bool diseqc_envelope_mode;
79 88
80 int (*tuner_init) (struct dvb_frontend *fe); 89 int (*tuner_init) (struct dvb_frontend *fe);
diff --git a/drivers/media/dvb/frontends/stv090x_priv.h b/drivers/media/dvb/frontends/stv090x_priv.h
index 5921a8d6c89f..5b780c80d496 100644
--- a/drivers/media/dvb/frontends/stv090x_priv.h
+++ b/drivers/media/dvb/frontends/stv090x_priv.h
@@ -230,11 +230,23 @@ struct stv090x_tab {
230 s32 read; 230 s32 read;
231}; 231};
232 232
233struct stv090x_internal {
234 struct i2c_adapter *i2c_adap;
235 u8 i2c_addr;
236
237 struct mutex demod_lock; /* Lock access to shared register */
238 struct mutex tuner_lock; /* Lock access to tuners */
239 s32 mclk; /* Masterclock Divider factor */
240 u32 dev_ver;
241
242 int num_used;
243};
244
233struct stv090x_state { 245struct stv090x_state {
234 enum stv090x_device device; 246 enum stv090x_device device;
235 enum stv090x_demodulator demod; 247 enum stv090x_demodulator demod;
236 enum stv090x_mode demod_mode; 248 enum stv090x_mode demod_mode;
237 u32 dev_ver; 249 struct stv090x_internal *internal;
238 250
239 struct i2c_adapter *i2c; 251 struct i2c_adapter *i2c;
240 const struct stv090x_config *config; 252 const struct stv090x_config *config;
@@ -256,11 +268,8 @@ struct stv090x_state {
256 u32 frequency; 268 u32 frequency;
257 u32 srate; 269 u32 srate;
258 270
259 s32 mclk; /* Masterclock Divider factor */
260 s32 tuner_bw; 271 s32 tuner_bw;
261 272
262 u32 tuner_refclk;
263
264 s32 search_range; 273 s32 search_range;
265 274
266 s32 DemodTimeout; 275 s32 DemodTimeout;
diff --git a/drivers/media/dvb/frontends/stv6110x.c b/drivers/media/dvb/frontends/stv6110x.c
index bcfcb652464c..f931ed07e92d 100644
--- a/drivers/media/dvb/frontends/stv6110x.c
+++ b/drivers/media/dvb/frontends/stv6110x.c
@@ -35,8 +35,6 @@ static unsigned int verbose;
35module_param(verbose, int, 0644); 35module_param(verbose, int, 0644);
36MODULE_PARM_DESC(verbose, "Set Verbosity level"); 36MODULE_PARM_DESC(verbose, "Set Verbosity level");
37 37
38static u8 stv6110x_regs[] = {0x07, 0x11, 0xdc, 0x85, 0x17, 0x01, 0xe6, 0x1e};
39
40static int stv6110x_read_reg(struct stv6110x_state *stv6110x, u8 reg, u8 *data) 38static int stv6110x_read_reg(struct stv6110x_state *stv6110x, u8 reg, u8 *data)
41{ 39{
42 int ret; 40 int ret;
@@ -58,12 +56,23 @@ static int stv6110x_read_reg(struct stv6110x_state *stv6110x, u8 reg, u8 *data)
58 return 0; 56 return 0;
59} 57}
60 58
61static int stv6110x_write_reg(struct stv6110x_state *stv6110x, u8 reg, u8 data) 59static int stv6110x_write_regs(struct stv6110x_state *stv6110x, int start, u8 data[], int len)
62{ 60{
63 int ret; 61 int ret;
64 const struct stv6110x_config *config = stv6110x->config; 62 const struct stv6110x_config *config = stv6110x->config;
65 u8 buf[] = { reg, data }; 63 u8 buf[len + 1];
66 struct i2c_msg msg = { .addr = config->addr, .flags = 0, . buf = buf, .len = 2 }; 64 struct i2c_msg msg = {
65 .addr = config->addr,
66 .flags = 0,
67 .buf = buf,
68 .len = len + 1
69 };
70
71 if (start + len > 8)
72 return -EINVAL;
73
74 buf[0] = start;
75 memcpy(&buf[1], data, len);
67 76
68 ret = i2c_transfer(stv6110x->i2c, &msg, 1); 77 ret = i2c_transfer(stv6110x->i2c, &msg, 1);
69 if (ret != 1) { 78 if (ret != 1) {
@@ -74,18 +83,21 @@ static int stv6110x_write_reg(struct stv6110x_state *stv6110x, u8 reg, u8 data)
74 return 0; 83 return 0;
75} 84}
76 85
86static int stv6110x_write_reg(struct stv6110x_state *stv6110x, u8 reg, u8 data)
87{
88 return stv6110x_write_regs(stv6110x, reg, &data, 1);
89}
90
77static int stv6110x_init(struct dvb_frontend *fe) 91static int stv6110x_init(struct dvb_frontend *fe)
78{ 92{
79 struct stv6110x_state *stv6110x = fe->tuner_priv; 93 struct stv6110x_state *stv6110x = fe->tuner_priv;
80 int ret; 94 int ret;
81 u8 i;
82 95
83 for (i = 0; i < ARRAY_SIZE(stv6110x_regs); i++) { 96 ret = stv6110x_write_regs(stv6110x, 0, stv6110x->regs,
84 ret = stv6110x_write_reg(stv6110x, i, stv6110x_regs[i]); 97 ARRAY_SIZE(stv6110x->regs));
85 if (ret < 0) { 98 if (ret < 0) {
86 dprintk(FE_ERROR, 1, "Initialization failed"); 99 dprintk(FE_ERROR, 1, "Initialization failed");
87 return -1; 100 return -1;
88 }
89 } 101 }
90 102
91 return 0; 103 return 0;
@@ -98,23 +110,23 @@ static int stv6110x_set_frequency(struct dvb_frontend *fe, u32 frequency)
98 s32 pVal, pCalc, rDivOpt = 0, pCalcOpt = 1000; 110 s32 pVal, pCalc, rDivOpt = 0, pCalcOpt = 1000;
99 u8 i; 111 u8 i;
100 112
101 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL1], CTRL1_K, (REFCLOCK_MHz - 16)); 113 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL1], CTRL1_K, (REFCLOCK_MHz - 16));
102 114
103 if (frequency <= 1023000) { 115 if (frequency <= 1023000) {
104 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG1], TNG1_DIV4SEL, 1); 116 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 1);
105 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG1], TNG1_PRESC32_ON, 0); 117 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_PRESC32_ON, 0);
106 pVal = 40; 118 pVal = 40;
107 } else if (frequency <= 1300000) { 119 } else if (frequency <= 1300000) {
108 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG1], TNG1_DIV4SEL, 1); 120 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 1);
109 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG1], TNG1_PRESC32_ON, 1); 121 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_PRESC32_ON, 1);
110 pVal = 40; 122 pVal = 40;
111 } else if (frequency <= 2046000) { 123 } else if (frequency <= 2046000) {
112 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG1], TNG1_DIV4SEL, 0); 124 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 0);
113 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG1], TNG1_PRESC32_ON, 0); 125 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_PRESC32_ON, 0);
114 pVal = 20; 126 pVal = 20;
115 } else { 127 } else {
116 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG1], TNG1_DIV4SEL, 0); 128 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 0);
117 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG1], TNG1_PRESC32_ON, 1); 129 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_PRESC32_ON, 1);
118 pVal = 20; 130 pVal = 20;
119 } 131 }
120 132
@@ -130,21 +142,21 @@ static int stv6110x_set_frequency(struct dvb_frontend *fe, u32 frequency)
130 divider = (frequency * R_DIV(rDivOpt) * pVal) / REFCLOCK_kHz; 142 divider = (frequency * R_DIV(rDivOpt) * pVal) / REFCLOCK_kHz;
131 divider = (divider + 5) / 10; 143 divider = (divider + 5) / 10;
132 144
133 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG1], TNG1_R_DIV, rDivOpt); 145 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_R_DIV, rDivOpt);
134 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG1], TNG1_N_DIV_11_8, MSB(divider)); 146 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_N_DIV_11_8, MSB(divider));
135 STV6110x_SETFIELD(stv6110x_regs[STV6110x_TNG0], TNG0_N_DIV_7_0, LSB(divider)); 147 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG0], TNG0_N_DIV_7_0, LSB(divider));
136 148
137 /* VCO Auto calibration */ 149 /* VCO Auto calibration */
138 STV6110x_SETFIELD(stv6110x_regs[STV6110x_STAT1], STAT1_CALVCO_STRT, 1); 150 STV6110x_SETFIELD(stv6110x->regs[STV6110x_STAT1], STAT1_CALVCO_STRT, 1);
139 151
140 stv6110x_write_reg(stv6110x, STV6110x_CTRL1, stv6110x_regs[STV6110x_CTRL1]); 152 stv6110x_write_reg(stv6110x, STV6110x_CTRL1, stv6110x->regs[STV6110x_CTRL1]);
141 stv6110x_write_reg(stv6110x, STV6110x_TNG1, stv6110x_regs[STV6110x_TNG1]); 153 stv6110x_write_reg(stv6110x, STV6110x_TNG1, stv6110x->regs[STV6110x_TNG1]);
142 stv6110x_write_reg(stv6110x, STV6110x_TNG0, stv6110x_regs[STV6110x_TNG0]); 154 stv6110x_write_reg(stv6110x, STV6110x_TNG0, stv6110x->regs[STV6110x_TNG0]);
143 stv6110x_write_reg(stv6110x, STV6110x_STAT1, stv6110x_regs[STV6110x_STAT1]); 155 stv6110x_write_reg(stv6110x, STV6110x_STAT1, stv6110x->regs[STV6110x_STAT1]);
144 156
145 for (i = 0; i < TRIALS; i++) { 157 for (i = 0; i < TRIALS; i++) {
146 stv6110x_read_reg(stv6110x, STV6110x_STAT1, &stv6110x_regs[STV6110x_STAT1]); 158 stv6110x_read_reg(stv6110x, STV6110x_STAT1, &stv6110x->regs[STV6110x_STAT1]);
147 if (!STV6110x_GETFIELD(STAT1_CALVCO_STRT, stv6110x_regs[STV6110x_STAT1])) 159 if (!STV6110x_GETFIELD(STAT1_CALVCO_STRT, stv6110x->regs[STV6110x_STAT1]))
148 break; 160 break;
149 msleep(1); 161 msleep(1);
150 } 162 }
@@ -156,14 +168,14 @@ static int stv6110x_get_frequency(struct dvb_frontend *fe, u32 *frequency)
156{ 168{
157 struct stv6110x_state *stv6110x = fe->tuner_priv; 169 struct stv6110x_state *stv6110x = fe->tuner_priv;
158 170
159 stv6110x_read_reg(stv6110x, STV6110x_TNG1, &stv6110x_regs[STV6110x_TNG1]); 171 stv6110x_read_reg(stv6110x, STV6110x_TNG1, &stv6110x->regs[STV6110x_TNG1]);
160 stv6110x_read_reg(stv6110x, STV6110x_TNG0, &stv6110x_regs[STV6110x_TNG0]); 172 stv6110x_read_reg(stv6110x, STV6110x_TNG0, &stv6110x->regs[STV6110x_TNG0]);
161 173
162 *frequency = (MAKEWORD16(STV6110x_GETFIELD(TNG1_N_DIV_11_8, stv6110x_regs[STV6110x_TNG1]), 174 *frequency = (MAKEWORD16(STV6110x_GETFIELD(TNG1_N_DIV_11_8, stv6110x->regs[STV6110x_TNG1]),
163 STV6110x_GETFIELD(TNG0_N_DIV_7_0, stv6110x_regs[STV6110x_TNG0]))) * REFCLOCK_kHz; 175 STV6110x_GETFIELD(TNG0_N_DIV_7_0, stv6110x->regs[STV6110x_TNG0]))) * REFCLOCK_kHz;
164 176
165 *frequency /= (1 << (STV6110x_GETFIELD(TNG1_R_DIV, stv6110x_regs[STV6110x_TNG1]) + 177 *frequency /= (1 << (STV6110x_GETFIELD(TNG1_R_DIV, stv6110x->regs[STV6110x_TNG1]) +
166 STV6110x_GETFIELD(TNG1_DIV4SEL, stv6110x_regs[STV6110x_TNG1]))); 178 STV6110x_GETFIELD(TNG1_DIV4SEL, stv6110x->regs[STV6110x_TNG1])));
167 179
168 *frequency >>= 2; 180 *frequency >>= 2;
169 181
@@ -179,27 +191,27 @@ static int stv6110x_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth)
179 halfbw = bandwidth >> 1; 191 halfbw = bandwidth >> 1;
180 192
181 if (halfbw > 36000000) 193 if (halfbw > 36000000)
182 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL3], CTRL3_CF, 31); /* LPF */ 194 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL3], CTRL3_CF, 31); /* LPF */
183 else if (halfbw < 5000000) 195 else if (halfbw < 5000000)
184 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL3], CTRL3_CF, 0); /* LPF */ 196 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL3], CTRL3_CF, 0); /* LPF */
185 else 197 else
186 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL3], CTRL3_CF, ((halfbw / 1000000) - 5)); /* LPF */ 198 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL3], CTRL3_CF, ((halfbw / 1000000) - 5)); /* LPF */
187 199
188 200
189 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL3], CTRL3_RCCLK_OFF, 0x0); /* cal. clk activated */ 201 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL3], CTRL3_RCCLK_OFF, 0x0); /* cal. clk activated */
190 STV6110x_SETFIELD(stv6110x_regs[STV6110x_STAT1], STAT1_CALRC_STRT, 0x1); /* LPF auto cal */ 202 STV6110x_SETFIELD(stv6110x->regs[STV6110x_STAT1], STAT1_CALRC_STRT, 0x1); /* LPF auto cal */
191 203
192 stv6110x_write_reg(stv6110x, STV6110x_CTRL3, stv6110x_regs[STV6110x_CTRL3]); 204 stv6110x_write_reg(stv6110x, STV6110x_CTRL3, stv6110x->regs[STV6110x_CTRL3]);
193 stv6110x_write_reg(stv6110x, STV6110x_STAT1, stv6110x_regs[STV6110x_STAT1]); 205 stv6110x_write_reg(stv6110x, STV6110x_STAT1, stv6110x->regs[STV6110x_STAT1]);
194 206
195 for (i = 0; i < TRIALS; i++) { 207 for (i = 0; i < TRIALS; i++) {
196 stv6110x_read_reg(stv6110x, STV6110x_STAT1, &stv6110x_regs[STV6110x_STAT1]); 208 stv6110x_read_reg(stv6110x, STV6110x_STAT1, &stv6110x->regs[STV6110x_STAT1]);
197 if (!STV6110x_GETFIELD(STAT1_CALRC_STRT, stv6110x_regs[STV6110x_STAT1])) 209 if (!STV6110x_GETFIELD(STAT1_CALRC_STRT, stv6110x->regs[STV6110x_STAT1]))
198 break; 210 break;
199 msleep(1); 211 msleep(1);
200 } 212 }
201 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL3], CTRL3_RCCLK_OFF, 0x1); /* cal. done */ 213 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL3], CTRL3_RCCLK_OFF, 0x1); /* cal. done */
202 stv6110x_write_reg(stv6110x, STV6110x_CTRL3, stv6110x_regs[STV6110x_CTRL3]); 214 stv6110x_write_reg(stv6110x, STV6110x_CTRL3, stv6110x->regs[STV6110x_CTRL3]);
203 215
204 return 0; 216 return 0;
205} 217}
@@ -208,8 +220,8 @@ static int stv6110x_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
208{ 220{
209 struct stv6110x_state *stv6110x = fe->tuner_priv; 221 struct stv6110x_state *stv6110x = fe->tuner_priv;
210 222
211 stv6110x_read_reg(stv6110x, STV6110x_CTRL3, &stv6110x_regs[STV6110x_CTRL3]); 223 stv6110x_read_reg(stv6110x, STV6110x_CTRL3, &stv6110x->regs[STV6110x_CTRL3]);
212 *bandwidth = (STV6110x_GETFIELD(CTRL3_CF, stv6110x_regs[STV6110x_CTRL3]) + 5) * 2000000; 224 *bandwidth = (STV6110x_GETFIELD(CTRL3_CF, stv6110x->regs[STV6110x_CTRL3]) + 5) * 2000000;
213 225
214 return 0; 226 return 0;
215} 227}
@@ -222,20 +234,20 @@ static int stv6110x_set_refclock(struct dvb_frontend *fe, u32 refclock)
222 switch (refclock) { 234 switch (refclock) {
223 default: 235 default:
224 case 1: 236 case 1:
225 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL2], CTRL2_CO_DIV, 0); 237 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL2], CTRL2_CO_DIV, 0);
226 break; 238 break;
227 case 2: 239 case 2:
228 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL2], CTRL2_CO_DIV, 1); 240 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL2], CTRL2_CO_DIV, 1);
229 break; 241 break;
230 case 4: 242 case 4:
231 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL2], CTRL2_CO_DIV, 2); 243 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL2], CTRL2_CO_DIV, 2);
232 break; 244 break;
233 case 8: 245 case 8:
234 case 0: 246 case 0:
235 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL2], CTRL2_CO_DIV, 3); 247 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL2], CTRL2_CO_DIV, 3);
236 break; 248 break;
237 } 249 }
238 stv6110x_write_reg(stv6110x, STV6110x_CTRL2, stv6110x_regs[STV6110x_CTRL2]); 250 stv6110x_write_reg(stv6110x, STV6110x_CTRL2, stv6110x->regs[STV6110x_CTRL2]);
239 251
240 return 0; 252 return 0;
241} 253}
@@ -244,8 +256,8 @@ static int stv6110x_get_bbgain(struct dvb_frontend *fe, u32 *gain)
244{ 256{
245 struct stv6110x_state *stv6110x = fe->tuner_priv; 257 struct stv6110x_state *stv6110x = fe->tuner_priv;
246 258
247 stv6110x_read_reg(stv6110x, STV6110x_CTRL2, &stv6110x_regs[STV6110x_CTRL2]); 259 stv6110x_read_reg(stv6110x, STV6110x_CTRL2, &stv6110x->regs[STV6110x_CTRL2]);
248 *gain = 2 * STV6110x_GETFIELD(CTRL2_BBGAIN, stv6110x_regs[STV6110x_CTRL2]); 260 *gain = 2 * STV6110x_GETFIELD(CTRL2_BBGAIN, stv6110x->regs[STV6110x_CTRL2]);
249 261
250 return 0; 262 return 0;
251} 263}
@@ -254,8 +266,8 @@ static int stv6110x_set_bbgain(struct dvb_frontend *fe, u32 gain)
254{ 266{
255 struct stv6110x_state *stv6110x = fe->tuner_priv; 267 struct stv6110x_state *stv6110x = fe->tuner_priv;
256 268
257 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL2], CTRL2_BBGAIN, gain / 2); 269 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL2], CTRL2_BBGAIN, gain / 2);
258 stv6110x_write_reg(stv6110x, STV6110x_CTRL2, stv6110x_regs[STV6110x_CTRL2]); 270 stv6110x_write_reg(stv6110x, STV6110x_CTRL2, stv6110x->regs[STV6110x_CTRL2]);
259 271
260 return 0; 272 return 0;
261} 273}
@@ -267,19 +279,19 @@ static int stv6110x_set_mode(struct dvb_frontend *fe, enum tuner_mode mode)
267 279
268 switch (mode) { 280 switch (mode) {
269 case TUNER_SLEEP: 281 case TUNER_SLEEP:
270 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL1], CTRL1_SYN, 0); 282 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL1], CTRL1_SYN, 0);
271 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL1], CTRL1_RX, 0); 283 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL1], CTRL1_RX, 0);
272 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL1], CTRL1_LPT, 0); 284 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL1], CTRL1_LPT, 0);
273 break; 285 break;
274 286
275 case TUNER_WAKE: 287 case TUNER_WAKE:
276 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL1], CTRL1_SYN, 1); 288 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL1], CTRL1_SYN, 1);
277 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL1], CTRL1_RX, 1); 289 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL1], CTRL1_RX, 1);
278 STV6110x_SETFIELD(stv6110x_regs[STV6110x_CTRL1], CTRL1_LPT, 1); 290 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL1], CTRL1_LPT, 1);
279 break; 291 break;
280 } 292 }
281 293
282 ret = stv6110x_write_reg(stv6110x, STV6110x_CTRL1, stv6110x_regs[STV6110x_CTRL1]); 294 ret = stv6110x_write_reg(stv6110x, STV6110x_CTRL1, stv6110x->regs[STV6110x_CTRL1]);
283 if (ret < 0) { 295 if (ret < 0) {
284 dprintk(FE_ERROR, 1, "I/O Error"); 296 dprintk(FE_ERROR, 1, "I/O Error");
285 return -EIO; 297 return -EIO;
@@ -297,9 +309,9 @@ static int stv6110x_get_status(struct dvb_frontend *fe, u32 *status)
297{ 309{
298 struct stv6110x_state *stv6110x = fe->tuner_priv; 310 struct stv6110x_state *stv6110x = fe->tuner_priv;
299 311
300 stv6110x_read_reg(stv6110x, STV6110x_STAT1, &stv6110x_regs[STV6110x_STAT1]); 312 stv6110x_read_reg(stv6110x, STV6110x_STAT1, &stv6110x->regs[STV6110x_STAT1]);
301 313
302 if (STV6110x_GETFIELD(STAT1_LOCK, stv6110x_regs[STV6110x_STAT1])) 314 if (STV6110x_GETFIELD(STAT1_LOCK, stv6110x->regs[STV6110x_STAT1]))
303 *status = TUNER_PHASELOCKED; 315 *status = TUNER_PHASELOCKED;
304 else 316 else
305 *status = 0; 317 *status = 0;
@@ -349,6 +361,8 @@ struct stv6110x_devctl *stv6110x_attach(struct dvb_frontend *fe,
349 struct i2c_adapter *i2c) 361 struct i2c_adapter *i2c)
350{ 362{
351 struct stv6110x_state *stv6110x; 363 struct stv6110x_state *stv6110x;
364 u8 default_regs[] = {0x07, 0x11, 0xdc, 0x85, 0x17, 0x01, 0xe6, 0x1e};
365 int ret;
352 366
353 stv6110x = kzalloc(sizeof (struct stv6110x_state), GFP_KERNEL); 367 stv6110x = kzalloc(sizeof (struct stv6110x_state), GFP_KERNEL);
354 if (stv6110x == NULL) 368 if (stv6110x == NULL)
@@ -357,6 +371,44 @@ struct stv6110x_devctl *stv6110x_attach(struct dvb_frontend *fe,
357 stv6110x->i2c = i2c; 371 stv6110x->i2c = i2c;
358 stv6110x->config = config; 372 stv6110x->config = config;
359 stv6110x->devctl = &stv6110x_ctl; 373 stv6110x->devctl = &stv6110x_ctl;
374 memcpy(stv6110x->regs, default_regs, 8);
375
376 /* setup divider */
377 switch (stv6110x->config->clk_div) {
378 default:
379 case 1:
380 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL2], CTRL2_CO_DIV, 0);
381 break;
382 case 2:
383 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL2], CTRL2_CO_DIV, 1);
384 break;
385 case 4:
386 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL2], CTRL2_CO_DIV, 2);
387 break;
388 case 8:
389 case 0:
390 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL2], CTRL2_CO_DIV, 3);
391 break;
392 }
393
394 if (fe->ops.i2c_gate_ctrl) {
395 ret = fe->ops.i2c_gate_ctrl(fe, 1);
396 if (ret < 0)
397 goto error;
398 }
399
400 ret = stv6110x_write_regs(stv6110x, 0, stv6110x->regs,
401 ARRAY_SIZE(stv6110x->regs));
402 if (ret < 0) {
403 dprintk(FE_ERROR, 1, "Initialization failed");
404 goto error;
405 }
406
407 if (fe->ops.i2c_gate_ctrl) {
408 ret = fe->ops.i2c_gate_ctrl(fe, 0);
409 if (ret < 0)
410 goto error;
411 }
360 412
361 fe->tuner_priv = stv6110x; 413 fe->tuner_priv = stv6110x;
362 fe->ops.tuner_ops = stv6110x_ops; 414 fe->ops.tuner_ops = stv6110x_ops;
diff --git a/drivers/media/dvb/frontends/stv6110x.h b/drivers/media/dvb/frontends/stv6110x.h
index a38257080e01..2429ae6d7847 100644
--- a/drivers/media/dvb/frontends/stv6110x.h
+++ b/drivers/media/dvb/frontends/stv6110x.h
@@ -26,6 +26,7 @@
26struct stv6110x_config { 26struct stv6110x_config {
27 u8 addr; 27 u8 addr;
28 u32 refclk; 28 u32 refclk;
29 u8 clk_div; /* divisor value for the output clock */
29}; 30};
30 31
31enum tuner_mode { 32enum tuner_mode {
diff --git a/drivers/media/dvb/frontends/stv6110x_priv.h b/drivers/media/dvb/frontends/stv6110x_priv.h
index 7260da633d49..0ec936a660a7 100644
--- a/drivers/media/dvb/frontends/stv6110x_priv.h
+++ b/drivers/media/dvb/frontends/stv6110x_priv.h
@@ -68,6 +68,7 @@
68struct stv6110x_state { 68struct stv6110x_state {
69 struct i2c_adapter *i2c; 69 struct i2c_adapter *i2c;
70 const struct stv6110x_config *config; 70 const struct stv6110x_config *config;
71 u8 regs[8];
71 72
72 struct stv6110x_devctl *devctl; 73 struct stv6110x_devctl *devctl;
73}; 74};
diff --git a/drivers/media/dvb/frontends/tda665x.c b/drivers/media/dvb/frontends/tda665x.c
index 87d52739c828..c44fefe92d97 100644
--- a/drivers/media/dvb/frontends/tda665x.c
+++ b/drivers/media/dvb/frontends/tda665x.c
@@ -133,7 +133,7 @@ static int tda665x_set_state(struct dvb_frontend *fe,
133 frequency += config->ref_divider >> 1; 133 frequency += config->ref_divider >> 1;
134 frequency /= config->ref_divider; 134 frequency /= config->ref_divider;
135 135
136 buf[0] = (u8) (frequency & 0x7f00) >> 8; 136 buf[0] = (u8) ((frequency & 0x7f00) >> 8);
137 buf[1] = (u8) (frequency & 0x00ff) >> 0; 137 buf[1] = (u8) (frequency & 0x00ff) >> 0;
138 buf[2] = 0x80 | 0x40 | 0x02; 138 buf[2] = 0x80 | 0x40 | 0x02;
139 buf[3] = 0x00; 139 buf[3] = 0x00;
diff --git a/drivers/media/dvb/frontends/tda8261.c b/drivers/media/dvb/frontends/tda8261.c
index 320c3c36d8b2..614afcec05f1 100644
--- a/drivers/media/dvb/frontends/tda8261.c
+++ b/drivers/media/dvb/frontends/tda8261.c
@@ -39,7 +39,7 @@ static int tda8261_read(struct tda8261_state *state, u8 *buf)
39{ 39{
40 const struct tda8261_config *config = state->config; 40 const struct tda8261_config *config = state->config;
41 int err = 0; 41 int err = 0;
42 struct i2c_msg msg = { .addr = config->addr, .flags = I2C_M_RD,.buf = buf, .len = 2 }; 42 struct i2c_msg msg = { .addr = config->addr, .flags = I2C_M_RD,.buf = buf, .len = 1 };
43 43
44 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) 44 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1)
45 printk("%s: read error, err=%d\n", __func__, err); 45 printk("%s: read error, err=%d\n", __func__, err);
diff --git a/drivers/media/dvb/frontends/zl10036.c b/drivers/media/dvb/frontends/zl10036.c
index 4e814ff22b23..34c5de491d2b 100644
--- a/drivers/media/dvb/frontends/zl10036.c
+++ b/drivers/media/dvb/frontends/zl10036.c
@@ -411,7 +411,7 @@ static int zl10036_init_regs(struct zl10036_state *state)
411 state->bf = 0xff; 411 state->bf = 0xff;
412 412
413 if (!state->config->rf_loop_enable) 413 if (!state->config->rf_loop_enable)
414 zl10036_init_tab[1][2] |= 0x01; 414 zl10036_init_tab[1][0] |= 0x01;
415 415
416 deb_info("%s\n", __func__); 416 deb_info("%s\n", __func__);
417 417
diff --git a/drivers/media/dvb/frontends/zl10039.c b/drivers/media/dvb/frontends/zl10039.c
index 11b29cb883e6..c085e58a94bf 100644
--- a/drivers/media/dvb/frontends/zl10039.c
+++ b/drivers/media/dvb/frontends/zl10039.c
@@ -287,7 +287,6 @@ struct dvb_frontend *zl10039_attach(struct dvb_frontend *fe,
287 break; 287 break;
288 default: 288 default:
289 dprintk("Chip ID=%x does not match a known type\n", state->id); 289 dprintk("Chip ID=%x does not match a known type\n", state->id);
290 break;
291 goto error; 290 goto error;
292 } 291 }
293 292
diff --git a/drivers/media/dvb/mantis/mantis_hif.c b/drivers/media/dvb/mantis/mantis_hif.c
index 7477dac628b4..5772ebb3a69e 100644
--- a/drivers/media/dvb/mantis/mantis_hif.c
+++ b/drivers/media/dvb/mantis/mantis_hif.c
@@ -22,8 +22,6 @@
22#include <linux/signal.h> 22#include <linux/signal.h>
23#include <linux/sched.h> 23#include <linux/sched.h>
24 24
25#include <linux/signal.h>
26#include <linux/sched.h>
27#include <linux/interrupt.h> 25#include <linux/interrupt.h>
28 26
29#include "dmxdev.h" 27#include "dmxdev.h"
diff --git a/drivers/media/dvb/mantis/mantis_input.c b/drivers/media/dvb/mantis/mantis_input.c
index 6a9df779441f..4675a3b53c7d 100644
--- a/drivers/media/dvb/mantis/mantis_input.c
+++ b/drivers/media/dvb/mantis/mantis_input.c
@@ -126,7 +126,7 @@ int mantis_input_init(struct mantis_pci *mantis)
126 rc->id.version = 1; 126 rc->id.version = 1;
127 rc->dev = mantis->pdev->dev; 127 rc->dev = mantis->pdev->dev;
128 128
129 err = ir_input_register(rc, &ir_mantis); 129 err = ir_input_register(rc, &ir_mantis, NULL);
130 if (err) { 130 if (err) {
131 dprintk(MANTIS_ERROR, 1, "IR device registration failed, ret = %d", err); 131 dprintk(MANTIS_ERROR, 1, "IR device registration failed, ret = %d", err);
132 input_free_device(rc); 132 input_free_device(rc);
diff --git a/drivers/media/dvb/mantis/mantis_pci.c b/drivers/media/dvb/mantis/mantis_pci.c
index 6c7534af6b44..59feeb84aec7 100644
--- a/drivers/media/dvb/mantis/mantis_pci.c
+++ b/drivers/media/dvb/mantis/mantis_pci.c
@@ -41,11 +41,6 @@
41#include "dvb_frontend.h" 41#include "dvb_frontend.h"
42#include "dvb_net.h" 42#include "dvb_net.h"
43 43
44#include <asm/irq.h>
45#include <linux/signal.h>
46#include <linux/sched.h>
47#include <linux/interrupt.h>
48
49#include "mantis_common.h" 44#include "mantis_common.h"
50#include "mantis_reg.h" 45#include "mantis_reg.h"
51#include "mantis_pci.h" 46#include "mantis_pci.h"
diff --git a/drivers/media/dvb/ngene/Kconfig b/drivers/media/dvb/ngene/Kconfig
new file mode 100644
index 000000000000..3ec8e6fcbb1d
--- /dev/null
+++ b/drivers/media/dvb/ngene/Kconfig
@@ -0,0 +1,9 @@
1config DVB_NGENE
2 tristate "Micronas nGene support"
3 depends on DVB_CORE && PCI && I2C
4 select DVB_LNBP21 if !DVB_FE_CUSTOMISE
5 select DVB_STV6110x if !DVB_FE_CUSTOMISE
6 select DVB_STV090x if !DVB_FE_CUSTOMISE
7 ---help---
8 Support for Micronas PCI express cards with nGene bridge.
9
diff --git a/drivers/media/dvb/ngene/Makefile b/drivers/media/dvb/ngene/Makefile
new file mode 100644
index 000000000000..40435cad4819
--- /dev/null
+++ b/drivers/media/dvb/ngene/Makefile
@@ -0,0 +1,11 @@
1#
2# Makefile for the nGene device driver
3#
4
5ngene-objs := ngene-core.o
6
7obj-$(CONFIG_DVB_NGENE) += ngene.o
8
9EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core/
10EXTRA_CFLAGS += -Idrivers/media/dvb/frontends/
11
diff --git a/drivers/media/dvb/ngene/ngene-core.c b/drivers/media/dvb/ngene/ngene-core.c
new file mode 100644
index 000000000000..0150dfe7cfbb
--- /dev/null
+++ b/drivers/media/dvb/ngene/ngene-core.c
@@ -0,0 +1,2024 @@
1/*
2 * ngene.c: nGene PCIe bridge driver
3 *
4 * Copyright (C) 2005-2007 Micronas
5 *
6 * Copyright (C) 2008-2009 Ralph Metzler <rjkm@metzlerbros.de>
7 * Modifications for new nGene firmware,
8 * support for EEPROM-copying,
9 * support for new dual DVB-S2 card prototype
10 *
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 only, as published by the Free Software Foundation.
15 *
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 * 02110-1301, USA
27 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
28 */
29
30#include <linux/module.h>
31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/slab.h>
34#include <linux/poll.h>
35#include <linux/io.h>
36#include <asm/div64.h>
37#include <linux/pci.h>
38#include <linux/pci_ids.h>
39#include <linux/smp_lock.h>
40#include <linux/timer.h>
41#include <linux/version.h>
42#include <linux/byteorder/generic.h>
43#include <linux/firmware.h>
44#include <linux/vmalloc.h>
45
46#include "ngene.h"
47
48#include "stv6110x.h"
49#include "stv090x.h"
50#include "lnbh24.h"
51
52static int one_adapter = 1;
53module_param(one_adapter, int, 0444);
54MODULE_PARM_DESC(one_adapter, "Use only one adapter.");
55
56
57static int debug;
58module_param(debug, int, 0444);
59MODULE_PARM_DESC(debug, "Print debugging information.");
60
61DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
62
63#define COMMAND_TIMEOUT_WORKAROUND
64
65#define dprintk if (debug) printk
66
67#define DEVICE_NAME "ngene"
68
69#define ngwriteb(dat, adr) writeb((dat), (char *)(dev->iomem + (adr)))
70#define ngwritel(dat, adr) writel((dat), (char *)(dev->iomem + (adr)))
71#define ngwriteb(dat, adr) writeb((dat), (char *)(dev->iomem + (adr)))
72#define ngreadl(adr) readl(dev->iomem + (adr))
73#define ngreadb(adr) readb(dev->iomem + (adr))
74#define ngcpyto(adr, src, count) memcpy_toio((char *) \
75 (dev->iomem + (adr)), (src), (count))
76#define ngcpyfrom(dst, adr, count) memcpy_fromio((dst), (char *) \
77 (dev->iomem + (adr)), (count))
78
79/****************************************************************************/
80/* nGene interrupt handler **************************************************/
81/****************************************************************************/
82
83static void event_tasklet(unsigned long data)
84{
85 struct ngene *dev = (struct ngene *)data;
86
87 while (dev->EventQueueReadIndex != dev->EventQueueWriteIndex) {
88 struct EVENT_BUFFER Event =
89 dev->EventQueue[dev->EventQueueReadIndex];
90 dev->EventQueueReadIndex =
91 (dev->EventQueueReadIndex + 1) & (EVENT_QUEUE_SIZE - 1);
92
93 if ((Event.UARTStatus & 0x01) && (dev->TxEventNotify))
94 dev->TxEventNotify(dev, Event.TimeStamp);
95 if ((Event.UARTStatus & 0x02) && (dev->RxEventNotify))
96 dev->RxEventNotify(dev, Event.TimeStamp,
97 Event.RXCharacter);
98 }
99}
100
101static void demux_tasklet(unsigned long data)
102{
103 struct ngene_channel *chan = (struct ngene_channel *)data;
104 struct SBufferHeader *Cur = chan->nextBuffer;
105
106 spin_lock_irq(&chan->state_lock);
107
108 while (Cur->ngeneBuffer.SR.Flags & 0x80) {
109 if (chan->mode & NGENE_IO_TSOUT) {
110 u32 Flags = chan->DataFormatFlags;
111 if (Cur->ngeneBuffer.SR.Flags & 0x20)
112 Flags |= BEF_OVERFLOW;
113 if (chan->pBufferExchange) {
114 if (!chan->pBufferExchange(chan,
115 Cur->Buffer1,
116 chan->Capture1Length,
117 Cur->ngeneBuffer.SR.
118 Clock, Flags)) {
119 /*
120 We didn't get data
121 Clear in service flag to make sure we
122 get called on next interrupt again.
123 leave fill/empty (0x80) flag alone
124 to avoid hardware running out of
125 buffers during startup, we hold only
126 in run state ( the source may be late
127 delivering data )
128 */
129
130 if (chan->HWState == HWSTATE_RUN) {
131 Cur->ngeneBuffer.SR.Flags &=
132 ~0x40;
133 break;
134 /* Stop proccessing stream */
135 }
136 } else {
137 /* We got a valid buffer,
138 so switch to run state */
139 chan->HWState = HWSTATE_RUN;
140 }
141 } else {
142 printk(KERN_ERR DEVICE_NAME ": OOPS\n");
143 if (chan->HWState == HWSTATE_RUN) {
144 Cur->ngeneBuffer.SR.Flags &= ~0x40;
145 break; /* Stop proccessing stream */
146 }
147 }
148 if (chan->AudioDTOUpdated) {
149 printk(KERN_INFO DEVICE_NAME
150 ": Update AudioDTO = %d\n",
151 chan->AudioDTOValue);
152 Cur->ngeneBuffer.SR.DTOUpdate =
153 chan->AudioDTOValue;
154 chan->AudioDTOUpdated = 0;
155 }
156 } else {
157 if (chan->HWState == HWSTATE_RUN) {
158 u32 Flags = 0;
159 if (Cur->ngeneBuffer.SR.Flags & 0x01)
160 Flags |= BEF_EVEN_FIELD;
161 if (Cur->ngeneBuffer.SR.Flags & 0x20)
162 Flags |= BEF_OVERFLOW;
163 if (chan->pBufferExchange)
164 chan->pBufferExchange(chan,
165 Cur->Buffer1,
166 chan->
167 Capture1Length,
168 Cur->ngeneBuffer.
169 SR.Clock, Flags);
170 if (chan->pBufferExchange2)
171 chan->pBufferExchange2(chan,
172 Cur->Buffer2,
173 chan->
174 Capture2Length,
175 Cur->ngeneBuffer.
176 SR.Clock, Flags);
177 } else if (chan->HWState != HWSTATE_STOP)
178 chan->HWState = HWSTATE_RUN;
179 }
180 Cur->ngeneBuffer.SR.Flags = 0x00;
181 Cur = Cur->Next;
182 }
183 chan->nextBuffer = Cur;
184
185 spin_unlock_irq(&chan->state_lock);
186}
187
188static irqreturn_t irq_handler(int irq, void *dev_id)
189{
190 struct ngene *dev = (struct ngene *)dev_id;
191 u32 icounts = 0;
192 irqreturn_t rc = IRQ_NONE;
193 u32 i = MAX_STREAM;
194 u8 *tmpCmdDoneByte;
195
196 if (dev->BootFirmware) {
197 icounts = ngreadl(NGENE_INT_COUNTS);
198 if (icounts != dev->icounts) {
199 ngwritel(0, FORCE_NMI);
200 dev->cmd_done = 1;
201 wake_up(&dev->cmd_wq);
202 dev->icounts = icounts;
203 rc = IRQ_HANDLED;
204 }
205 return rc;
206 }
207
208 ngwritel(0, FORCE_NMI);
209
210 spin_lock(&dev->cmd_lock);
211 tmpCmdDoneByte = dev->CmdDoneByte;
212 if (tmpCmdDoneByte &&
213 (*tmpCmdDoneByte ||
214 (dev->ngenetohost[0] == 1 && dev->ngenetohost[1] != 0))) {
215 dev->CmdDoneByte = NULL;
216 dev->cmd_done = 1;
217 wake_up(&dev->cmd_wq);
218 rc = IRQ_HANDLED;
219 }
220 spin_unlock(&dev->cmd_lock);
221
222 if (dev->EventBuffer->EventStatus & 0x80) {
223 u8 nextWriteIndex =
224 (dev->EventQueueWriteIndex + 1) &
225 (EVENT_QUEUE_SIZE - 1);
226 if (nextWriteIndex != dev->EventQueueReadIndex) {
227 dev->EventQueue[dev->EventQueueWriteIndex] =
228 *(dev->EventBuffer);
229 dev->EventQueueWriteIndex = nextWriteIndex;
230 } else {
231 printk(KERN_ERR DEVICE_NAME ": event overflow\n");
232 dev->EventQueueOverflowCount += 1;
233 dev->EventQueueOverflowFlag = 1;
234 }
235 dev->EventBuffer->EventStatus &= ~0x80;
236 tasklet_schedule(&dev->event_tasklet);
237 rc = IRQ_HANDLED;
238 }
239
240 while (i > 0) {
241 i--;
242 spin_lock(&dev->channel[i].state_lock);
243 /* if (dev->channel[i].State>=KSSTATE_RUN) { */
244 if (dev->channel[i].nextBuffer) {
245 if ((dev->channel[i].nextBuffer->
246 ngeneBuffer.SR.Flags & 0xC0) == 0x80) {
247 dev->channel[i].nextBuffer->
248 ngeneBuffer.SR.Flags |= 0x40;
249 tasklet_schedule(
250 &dev->channel[i].demux_tasklet);
251 rc = IRQ_HANDLED;
252 }
253 }
254 spin_unlock(&dev->channel[i].state_lock);
255 }
256
257 /* Request might have been processed by a previous call. */
258 return IRQ_HANDLED;
259}
260
261/****************************************************************************/
262/* nGene command interface **************************************************/
263/****************************************************************************/
264
265static void dump_command_io(struct ngene *dev)
266{
267 u8 buf[8], *b;
268
269 ngcpyfrom(buf, HOST_TO_NGENE, 8);
270 printk(KERN_ERR "host_to_ngene (%04x): %02x %02x %02x %02x %02x %02x %02x %02x\n",
271 HOST_TO_NGENE, buf[0], buf[1], buf[2], buf[3],
272 buf[4], buf[5], buf[6], buf[7]);
273
274 ngcpyfrom(buf, NGENE_TO_HOST, 8);
275 printk(KERN_ERR "ngene_to_host (%04x): %02x %02x %02x %02x %02x %02x %02x %02x\n",
276 NGENE_TO_HOST, buf[0], buf[1], buf[2], buf[3],
277 buf[4], buf[5], buf[6], buf[7]);
278
279 b = dev->hosttongene;
280 printk(KERN_ERR "dev->hosttongene (%p): %02x %02x %02x %02x %02x %02x %02x %02x\n",
281 b, b[0], b[1], b[2], b[3], b[4], b[5], b[6], b[7]);
282
283 b = dev->ngenetohost;
284 printk(KERN_ERR "dev->ngenetohost (%p): %02x %02x %02x %02x %02x %02x %02x %02x\n",
285 b, b[0], b[1], b[2], b[3], b[4], b[5], b[6], b[7]);
286}
287
288static int ngene_command_mutex(struct ngene *dev, struct ngene_command *com)
289{
290 int ret;
291 u8 *tmpCmdDoneByte;
292
293 dev->cmd_done = 0;
294
295 if (com->cmd.hdr.Opcode == CMD_FWLOAD_PREPARE) {
296 dev->BootFirmware = 1;
297 dev->icounts = ngreadl(NGENE_INT_COUNTS);
298 ngwritel(0, NGENE_COMMAND);
299 ngwritel(0, NGENE_COMMAND_HI);
300 ngwritel(0, NGENE_STATUS);
301 ngwritel(0, NGENE_STATUS_HI);
302 ngwritel(0, NGENE_EVENT);
303 ngwritel(0, NGENE_EVENT_HI);
304 } else if (com->cmd.hdr.Opcode == CMD_FWLOAD_FINISH) {
305 u64 fwio = dev->PAFWInterfaceBuffer;
306
307 ngwritel(fwio & 0xffffffff, NGENE_COMMAND);
308 ngwritel(fwio >> 32, NGENE_COMMAND_HI);
309 ngwritel((fwio + 256) & 0xffffffff, NGENE_STATUS);
310 ngwritel((fwio + 256) >> 32, NGENE_STATUS_HI);
311 ngwritel((fwio + 512) & 0xffffffff, NGENE_EVENT);
312 ngwritel((fwio + 512) >> 32, NGENE_EVENT_HI);
313 }
314
315 memcpy(dev->FWInterfaceBuffer, com->cmd.raw8, com->in_len + 2);
316
317 if (dev->BootFirmware)
318 ngcpyto(HOST_TO_NGENE, com->cmd.raw8, com->in_len + 2);
319
320 spin_lock_irq(&dev->cmd_lock);
321 tmpCmdDoneByte = dev->ngenetohost + com->out_len;
322 if (!com->out_len)
323 tmpCmdDoneByte++;
324 *tmpCmdDoneByte = 0;
325 dev->ngenetohost[0] = 0;
326 dev->ngenetohost[1] = 0;
327 dev->CmdDoneByte = tmpCmdDoneByte;
328 spin_unlock_irq(&dev->cmd_lock);
329
330 /* Notify 8051. */
331 ngwritel(1, FORCE_INT);
332
333 ret = wait_event_timeout(dev->cmd_wq, dev->cmd_done == 1, 2 * HZ);
334 if (!ret) {
335 /*ngwritel(0, FORCE_NMI);*/
336
337 printk(KERN_ERR DEVICE_NAME
338 ": Command timeout cmd=%02x prev=%02x\n",
339 com->cmd.hdr.Opcode, dev->prev_cmd);
340 dump_command_io(dev);
341 return -1;
342 }
343 if (com->cmd.hdr.Opcode == CMD_FWLOAD_FINISH)
344 dev->BootFirmware = 0;
345
346 dev->prev_cmd = com->cmd.hdr.Opcode;
347
348 if (!com->out_len)
349 return 0;
350
351 memcpy(com->cmd.raw8, dev->ngenetohost, com->out_len);
352
353 return 0;
354}
355
356static int ngene_command(struct ngene *dev, struct ngene_command *com)
357{
358 int result;
359
360 down(&dev->cmd_mutex);
361 result = ngene_command_mutex(dev, com);
362 up(&dev->cmd_mutex);
363 return result;
364}
365
366
367static int ngene_command_i2c_read(struct ngene *dev, u8 adr,
368 u8 *out, u8 outlen, u8 *in, u8 inlen, int flag)
369{
370 struct ngene_command com;
371
372 com.cmd.hdr.Opcode = CMD_I2C_READ;
373 com.cmd.hdr.Length = outlen + 3;
374 com.cmd.I2CRead.Device = adr << 1;
375 memcpy(com.cmd.I2CRead.Data, out, outlen);
376 com.cmd.I2CRead.Data[outlen] = inlen;
377 com.cmd.I2CRead.Data[outlen + 1] = 0;
378 com.in_len = outlen + 3;
379 com.out_len = inlen + 1;
380
381 if (ngene_command(dev, &com) < 0)
382 return -EIO;
383
384 if ((com.cmd.raw8[0] >> 1) != adr)
385 return -EIO;
386
387 if (flag)
388 memcpy(in, com.cmd.raw8, inlen + 1);
389 else
390 memcpy(in, com.cmd.raw8 + 1, inlen);
391 return 0;
392}
393
394static int ngene_command_i2c_write(struct ngene *dev, u8 adr,
395 u8 *out, u8 outlen)
396{
397 struct ngene_command com;
398
399
400 com.cmd.hdr.Opcode = CMD_I2C_WRITE;
401 com.cmd.hdr.Length = outlen + 1;
402 com.cmd.I2CRead.Device = adr << 1;
403 memcpy(com.cmd.I2CRead.Data, out, outlen);
404 com.in_len = outlen + 1;
405 com.out_len = 1;
406
407 if (ngene_command(dev, &com) < 0)
408 return -EIO;
409
410 if (com.cmd.raw8[0] == 1)
411 return -EIO;
412
413 return 0;
414}
415
416static int ngene_command_load_firmware(struct ngene *dev,
417 u8 *ngene_fw, u32 size)
418{
419#define FIRSTCHUNK (1024)
420 u32 cleft;
421 struct ngene_command com;
422
423 com.cmd.hdr.Opcode = CMD_FWLOAD_PREPARE;
424 com.cmd.hdr.Length = 0;
425 com.in_len = 0;
426 com.out_len = 0;
427
428 ngene_command(dev, &com);
429
430 cleft = (size + 3) & ~3;
431 if (cleft > FIRSTCHUNK) {
432 ngcpyto(PROGRAM_SRAM + FIRSTCHUNK, ngene_fw + FIRSTCHUNK,
433 cleft - FIRSTCHUNK);
434 cleft = FIRSTCHUNK;
435 }
436 ngcpyto(DATA_FIFO_AREA, ngene_fw, cleft);
437
438 memset(&com, 0, sizeof(struct ngene_command));
439 com.cmd.hdr.Opcode = CMD_FWLOAD_FINISH;
440 com.cmd.hdr.Length = 4;
441 com.cmd.FWLoadFinish.Address = DATA_FIFO_AREA;
442 com.cmd.FWLoadFinish.Length = (unsigned short)cleft;
443 com.in_len = 4;
444 com.out_len = 0;
445
446 return ngene_command(dev, &com);
447}
448
449
450static int ngene_command_config_buf(struct ngene *dev, u8 config)
451{
452 struct ngene_command com;
453
454 com.cmd.hdr.Opcode = CMD_CONFIGURE_BUFFER;
455 com.cmd.hdr.Length = 1;
456 com.cmd.ConfigureBuffers.config = config;
457 com.in_len = 1;
458 com.out_len = 0;
459
460 if (ngene_command(dev, &com) < 0)
461 return -EIO;
462 return 0;
463}
464
465static int ngene_command_config_free_buf(struct ngene *dev, u8 *config)
466{
467 struct ngene_command com;
468
469 com.cmd.hdr.Opcode = CMD_CONFIGURE_FREE_BUFFER;
470 com.cmd.hdr.Length = 6;
471 memcpy(&com.cmd.ConfigureBuffers.config, config, 6);
472 com.in_len = 6;
473 com.out_len = 0;
474
475 if (ngene_command(dev, &com) < 0)
476 return -EIO;
477
478 return 0;
479}
480
481static int ngene_command_gpio_set(struct ngene *dev, u8 select, u8 level)
482{
483 struct ngene_command com;
484
485 com.cmd.hdr.Opcode = CMD_SET_GPIO_PIN;
486 com.cmd.hdr.Length = 1;
487 com.cmd.SetGpioPin.select = select | (level << 7);
488 com.in_len = 1;
489 com.out_len = 0;
490
491 return ngene_command(dev, &com);
492}
493
494
495/*
496 02000640 is sample on rising edge.
497 02000740 is sample on falling edge.
498 02000040 is ignore "valid" signal
499
500 0: FD_CTL1 Bit 7,6 must be 0,1
501 7 disable(fw controlled)
502 6 0-AUX,1-TS
503 5 0-par,1-ser
504 4 0-lsb/1-msb
505 3,2 reserved
506 1,0 0-no sync, 1-use ext. start, 2-use 0x47, 3-both
507 1: FD_CTL2 has 3-valid must be hi, 2-use valid, 1-edge
508 2: FD_STA is read-only. 0-sync
509 3: FD_INSYNC is number of 47s to trigger "in sync".
510 4: FD_OUTSYNC is number of 47s to trigger "out of sync".
511 5: FD_MAXBYTE1 is low-order of bytes per packet.
512 6: FD_MAXBYTE2 is high-order of bytes per packet.
513 7: Top byte is unused.
514*/
515
516/****************************************************************************/
517
518static u8 TSFeatureDecoderSetup[8 * 4] = {
519 0x42, 0x00, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00,
520 0x40, 0x06, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* DRXH */
521 0x71, 0x07, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* DRXHser */
522 0x72, 0x06, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* S2ser */
523};
524
525/* Set NGENE I2S Config to 16 bit packed */
526static u8 I2SConfiguration[] = {
527 0x00, 0x10, 0x00, 0x00,
528 0x80, 0x10, 0x00, 0x00,
529};
530
531static u8 SPDIFConfiguration[10] = {
532 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
533};
534
535/* Set NGENE I2S Config to transport stream compatible mode */
536
537static u8 TS_I2SConfiguration[4] = { 0x3E, 0x1A, 0x00, 0x00 }; /*3e 18 00 00 ?*/
538
539static u8 TS_I2SOutConfiguration[4] = { 0x80, 0x20, 0x00, 0x00 };
540
541static u8 ITUDecoderSetup[4][16] = {
542 {0x1c, 0x13, 0x01, 0x68, 0x3d, 0x90, 0x14, 0x20, /* SDTV */
543 0x00, 0x00, 0x01, 0xb0, 0x9c, 0x00, 0x00, 0x00},
544 {0x9c, 0x03, 0x23, 0xC0, 0x60, 0x0E, 0x13, 0x00,
545 0x00, 0x00, 0x00, 0x01, 0xB0, 0x00, 0x00, 0x00},
546 {0x9f, 0x00, 0x23, 0xC0, 0x60, 0x0F, 0x13, 0x00, /* HDTV 1080i50 */
547 0x00, 0x00, 0x00, 0x01, 0xB0, 0x00, 0x00, 0x00},
548 {0x9c, 0x01, 0x23, 0xC0, 0x60, 0x0E, 0x13, 0x00, /* HDTV 1080i60 */
549 0x00, 0x00, 0x00, 0x01, 0xB0, 0x00, 0x00, 0x00},
550};
551
552/*
553 * 50 48 60 gleich
554 * 27p50 9f 00 22 80 42 69 18 ...
555 * 27p60 93 00 22 80 82 69 1c ...
556 */
557
558/* Maxbyte to 1144 (for raw data) */
559static u8 ITUFeatureDecoderSetup[8] = {
560 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x04, 0x00
561};
562
563static void FillTSBuffer(void *Buffer, int Length, u32 Flags)
564{
565 u32 *ptr = Buffer;
566
567 memset(Buffer, 0xff, Length);
568 while (Length > 0) {
569 if (Flags & DF_SWAP32)
570 *ptr = 0x471FFF10;
571 else
572 *ptr = 0x10FF1F47;
573 ptr += (188 / 4);
574 Length -= 188;
575 }
576}
577
578
579static void flush_buffers(struct ngene_channel *chan)
580{
581 u8 val;
582
583 do {
584 msleep(1);
585 spin_lock_irq(&chan->state_lock);
586 val = chan->nextBuffer->ngeneBuffer.SR.Flags & 0x80;
587 spin_unlock_irq(&chan->state_lock);
588 } while (val);
589}
590
591static void clear_buffers(struct ngene_channel *chan)
592{
593 struct SBufferHeader *Cur = chan->nextBuffer;
594
595 do {
596 memset(&Cur->ngeneBuffer.SR, 0, sizeof(Cur->ngeneBuffer.SR));
597 if (chan->mode & NGENE_IO_TSOUT)
598 FillTSBuffer(Cur->Buffer1,
599 chan->Capture1Length,
600 chan->DataFormatFlags);
601 Cur = Cur->Next;
602 } while (Cur != chan->nextBuffer);
603
604 if (chan->mode & NGENE_IO_TSOUT) {
605 chan->nextBuffer->ngeneBuffer.SR.DTOUpdate =
606 chan->AudioDTOValue;
607 chan->AudioDTOUpdated = 0;
608
609 Cur = chan->TSIdleBuffer.Head;
610
611 do {
612 memset(&Cur->ngeneBuffer.SR, 0,
613 sizeof(Cur->ngeneBuffer.SR));
614 FillTSBuffer(Cur->Buffer1,
615 chan->Capture1Length,
616 chan->DataFormatFlags);
617 Cur = Cur->Next;
618 } while (Cur != chan->TSIdleBuffer.Head);
619 }
620}
621
622static int ngene_command_stream_control(struct ngene *dev, u8 stream,
623 u8 control, u8 mode, u8 flags)
624{
625 struct ngene_channel *chan = &dev->channel[stream];
626 struct ngene_command com;
627 u16 BsUVI = ((stream & 1) ? 0x9400 : 0x9300);
628 u16 BsSDI = ((stream & 1) ? 0x9600 : 0x9500);
629 u16 BsSPI = ((stream & 1) ? 0x9800 : 0x9700);
630 u16 BsSDO = 0x9B00;
631
632 /* down(&dev->stream_mutex); */
633 while (down_trylock(&dev->stream_mutex)) {
634 printk(KERN_INFO DEVICE_NAME ": SC locked\n");
635 msleep(1);
636 }
637 memset(&com, 0, sizeof(com));
638 com.cmd.hdr.Opcode = CMD_CONTROL;
639 com.cmd.hdr.Length = sizeof(struct FW_STREAM_CONTROL) - 2;
640 com.cmd.StreamControl.Stream = stream | (control ? 8 : 0);
641 if (chan->mode & NGENE_IO_TSOUT)
642 com.cmd.StreamControl.Stream |= 0x07;
643 com.cmd.StreamControl.Control = control |
644 (flags & SFLAG_ORDER_LUMA_CHROMA);
645 com.cmd.StreamControl.Mode = mode;
646 com.in_len = sizeof(struct FW_STREAM_CONTROL);
647 com.out_len = 0;
648
649 dprintk(KERN_INFO DEVICE_NAME
650 ": Stream=%02x, Control=%02x, Mode=%02x\n",
651 com.cmd.StreamControl.Stream, com.cmd.StreamControl.Control,
652 com.cmd.StreamControl.Mode);
653
654 chan->Mode = mode;
655
656 if (!(control & 0x80)) {
657 spin_lock_irq(&chan->state_lock);
658 if (chan->State == KSSTATE_RUN) {
659 chan->State = KSSTATE_ACQUIRE;
660 chan->HWState = HWSTATE_STOP;
661 spin_unlock_irq(&chan->state_lock);
662 if (ngene_command(dev, &com) < 0) {
663 up(&dev->stream_mutex);
664 return -1;
665 }
666 /* clear_buffers(chan); */
667 flush_buffers(chan);
668 up(&dev->stream_mutex);
669 return 0;
670 }
671 spin_unlock_irq(&chan->state_lock);
672 up(&dev->stream_mutex);
673 return 0;
674 }
675
676 if (mode & SMODE_AUDIO_CAPTURE) {
677 com.cmd.StreamControl.CaptureBlockCount =
678 chan->Capture1Length / AUDIO_BLOCK_SIZE;
679 com.cmd.StreamControl.Buffer_Address = chan->RingBuffer.PAHead;
680 } else if (mode & SMODE_TRANSPORT_STREAM) {
681 com.cmd.StreamControl.CaptureBlockCount =
682 chan->Capture1Length / TS_BLOCK_SIZE;
683 com.cmd.StreamControl.MaxLinesPerField =
684 chan->Capture1Length / TS_BLOCK_SIZE;
685 com.cmd.StreamControl.Buffer_Address =
686 chan->TSRingBuffer.PAHead;
687 if (chan->mode & NGENE_IO_TSOUT) {
688 com.cmd.StreamControl.BytesPerVBILine =
689 chan->Capture1Length / TS_BLOCK_SIZE;
690 com.cmd.StreamControl.Stream |= 0x07;
691 }
692 } else {
693 com.cmd.StreamControl.BytesPerVideoLine = chan->nBytesPerLine;
694 com.cmd.StreamControl.MaxLinesPerField = chan->nLines;
695 com.cmd.StreamControl.MinLinesPerField = 100;
696 com.cmd.StreamControl.Buffer_Address = chan->RingBuffer.PAHead;
697
698 if (mode & SMODE_VBI_CAPTURE) {
699 com.cmd.StreamControl.MaxVBILinesPerField =
700 chan->nVBILines;
701 com.cmd.StreamControl.MinVBILinesPerField = 0;
702 com.cmd.StreamControl.BytesPerVBILine =
703 chan->nBytesPerVBILine;
704 }
705 if (flags & SFLAG_COLORBAR)
706 com.cmd.StreamControl.Stream |= 0x04;
707 }
708
709 spin_lock_irq(&chan->state_lock);
710 if (mode & SMODE_AUDIO_CAPTURE) {
711 chan->nextBuffer = chan->RingBuffer.Head;
712 if (mode & SMODE_AUDIO_SPDIF) {
713 com.cmd.StreamControl.SetupDataLen =
714 sizeof(SPDIFConfiguration);
715 com.cmd.StreamControl.SetupDataAddr = BsSPI;
716 memcpy(com.cmd.StreamControl.SetupData,
717 SPDIFConfiguration, sizeof(SPDIFConfiguration));
718 } else {
719 com.cmd.StreamControl.SetupDataLen = 4;
720 com.cmd.StreamControl.SetupDataAddr = BsSDI;
721 memcpy(com.cmd.StreamControl.SetupData,
722 I2SConfiguration +
723 4 * dev->card_info->i2s[stream], 4);
724 }
725 } else if (mode & SMODE_TRANSPORT_STREAM) {
726 chan->nextBuffer = chan->TSRingBuffer.Head;
727 if (stream >= STREAM_AUDIOIN1) {
728 if (chan->mode & NGENE_IO_TSOUT) {
729 com.cmd.StreamControl.SetupDataLen =
730 sizeof(TS_I2SOutConfiguration);
731 com.cmd.StreamControl.SetupDataAddr = BsSDO;
732 memcpy(com.cmd.StreamControl.SetupData,
733 TS_I2SOutConfiguration,
734 sizeof(TS_I2SOutConfiguration));
735 } else {
736 com.cmd.StreamControl.SetupDataLen =
737 sizeof(TS_I2SConfiguration);
738 com.cmd.StreamControl.SetupDataAddr = BsSDI;
739 memcpy(com.cmd.StreamControl.SetupData,
740 TS_I2SConfiguration,
741 sizeof(TS_I2SConfiguration));
742 }
743 } else {
744 com.cmd.StreamControl.SetupDataLen = 8;
745 com.cmd.StreamControl.SetupDataAddr = BsUVI + 0x10;
746 memcpy(com.cmd.StreamControl.SetupData,
747 TSFeatureDecoderSetup +
748 8 * dev->card_info->tsf[stream], 8);
749 }
750 } else {
751 chan->nextBuffer = chan->RingBuffer.Head;
752 com.cmd.StreamControl.SetupDataLen =
753 16 + sizeof(ITUFeatureDecoderSetup);
754 com.cmd.StreamControl.SetupDataAddr = BsUVI;
755 memcpy(com.cmd.StreamControl.SetupData,
756 ITUDecoderSetup[chan->itumode], 16);
757 memcpy(com.cmd.StreamControl.SetupData + 16,
758 ITUFeatureDecoderSetup, sizeof(ITUFeatureDecoderSetup));
759 }
760 clear_buffers(chan);
761 chan->State = KSSTATE_RUN;
762 if (mode & SMODE_TRANSPORT_STREAM)
763 chan->HWState = HWSTATE_RUN;
764 else
765 chan->HWState = HWSTATE_STARTUP;
766 spin_unlock_irq(&chan->state_lock);
767
768 if (ngene_command(dev, &com) < 0) {
769 up(&dev->stream_mutex);
770 return -1;
771 }
772 up(&dev->stream_mutex);
773 return 0;
774}
775
776
777/****************************************************************************/
778/* I2C **********************************************************************/
779/****************************************************************************/
780
781static void ngene_i2c_set_bus(struct ngene *dev, int bus)
782{
783 if (!(dev->card_info->i2c_access & 2))
784 return;
785 if (dev->i2c_current_bus == bus)
786 return;
787
788 switch (bus) {
789 case 0:
790 ngene_command_gpio_set(dev, 3, 0);
791 ngene_command_gpio_set(dev, 2, 1);
792 break;
793
794 case 1:
795 ngene_command_gpio_set(dev, 2, 0);
796 ngene_command_gpio_set(dev, 3, 1);
797 break;
798 }
799 dev->i2c_current_bus = bus;
800}
801
802static int ngene_i2c_master_xfer(struct i2c_adapter *adapter,
803 struct i2c_msg msg[], int num)
804{
805 struct ngene_channel *chan =
806 (struct ngene_channel *)i2c_get_adapdata(adapter);
807 struct ngene *dev = chan->dev;
808
809 down(&dev->i2c_switch_mutex);
810 ngene_i2c_set_bus(dev, chan->number);
811
812 if (num == 2 && msg[1].flags & I2C_M_RD && !(msg[0].flags & I2C_M_RD))
813 if (!ngene_command_i2c_read(dev, msg[0].addr,
814 msg[0].buf, msg[0].len,
815 msg[1].buf, msg[1].len, 0))
816 goto done;
817
818 if (num == 1 && !(msg[0].flags & I2C_M_RD))
819 if (!ngene_command_i2c_write(dev, msg[0].addr,
820 msg[0].buf, msg[0].len))
821 goto done;
822 if (num == 1 && (msg[0].flags & I2C_M_RD))
823 if (!ngene_command_i2c_read(dev, msg[0].addr, 0, 0,
824 msg[0].buf, msg[0].len, 0))
825 goto done;
826
827 up(&dev->i2c_switch_mutex);
828 return -EIO;
829
830done:
831 up(&dev->i2c_switch_mutex);
832 return num;
833}
834
835
836static u32 ngene_i2c_functionality(struct i2c_adapter *adap)
837{
838 return I2C_FUNC_SMBUS_EMUL;
839}
840
841static struct i2c_algorithm ngene_i2c_algo = {
842 .master_xfer = ngene_i2c_master_xfer,
843 .functionality = ngene_i2c_functionality,
844};
845
846static int ngene_i2c_init(struct ngene *dev, int dev_nr)
847{
848 struct i2c_adapter *adap = &(dev->channel[dev_nr].i2c_adapter);
849
850 i2c_set_adapdata(adap, &(dev->channel[dev_nr]));
851 adap->class = I2C_CLASS_TV_DIGITAL | I2C_CLASS_TV_ANALOG;
852
853 strcpy(adap->name, "nGene");
854
855 adap->algo = &ngene_i2c_algo;
856 adap->algo_data = (void *)&(dev->channel[dev_nr]);
857 adap->dev.parent = &dev->pci_dev->dev;
858
859 return i2c_add_adapter(adap);
860}
861
862
863/****************************************************************************/
864/* DVB functions and API interface ******************************************/
865/****************************************************************************/
866
867static void swap_buffer(u32 *p, u32 len)
868{
869 while (len) {
870 *p = swab32(*p);
871 p++;
872 len -= 4;
873 }
874}
875
876
877static void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags)
878{
879 struct ngene_channel *chan = priv;
880
881
882#ifdef COMMAND_TIMEOUT_WORKAROUND
883 if (chan->users > 0)
884#endif
885 dvb_dmx_swfilter(&chan->demux, buf, len);
886 return 0;
887}
888
889u8 fill_ts[188] = { 0x47, 0x1f, 0xff, 0x10 };
890
891static void *tsout_exchange(void *priv, void *buf, u32 len,
892 u32 clock, u32 flags)
893{
894 struct ngene_channel *chan = priv;
895 struct ngene *dev = chan->dev;
896 u32 alen;
897
898 alen = dvb_ringbuffer_avail(&dev->tsout_rbuf);
899 alen -= alen % 188;
900
901 if (alen < len)
902 FillTSBuffer(buf + alen, len - alen, flags);
903 else
904 alen = len;
905 dvb_ringbuffer_read(&dev->tsout_rbuf, buf, alen);
906 if (flags & DF_SWAP32)
907 swap_buffer((u32 *)buf, alen);
908 wake_up_interruptible(&dev->tsout_rbuf.queue);
909 return buf;
910}
911
912
913static void set_transfer(struct ngene_channel *chan, int state)
914{
915 u8 control = 0, mode = 0, flags = 0;
916 struct ngene *dev = chan->dev;
917 int ret;
918
919 /*
920 printk(KERN_INFO DEVICE_NAME ": st %d\n", state);
921 msleep(100);
922 */
923
924 if (state) {
925 if (chan->running) {
926 printk(KERN_INFO DEVICE_NAME ": already running\n");
927 return;
928 }
929 } else {
930 if (!chan->running) {
931 printk(KERN_INFO DEVICE_NAME ": already stopped\n");
932 return;
933 }
934 }
935
936 if (dev->card_info->switch_ctrl)
937 dev->card_info->switch_ctrl(chan, 1, state ^ 1);
938
939 if (state) {
940 spin_lock_irq(&chan->state_lock);
941
942 /* printk(KERN_INFO DEVICE_NAME ": lock=%08x\n",
943 ngreadl(0x9310)); */
944 dvb_ringbuffer_flush(&dev->tsout_rbuf);
945 control = 0x80;
946 if (chan->mode & (NGENE_IO_TSIN | NGENE_IO_TSOUT)) {
947 chan->Capture1Length = 512 * 188;
948 mode = SMODE_TRANSPORT_STREAM;
949 }
950 if (chan->mode & NGENE_IO_TSOUT) {
951 chan->pBufferExchange = tsout_exchange;
952 /* 0x66666666 = 50MHz *2^33 /250MHz */
953 chan->AudioDTOValue = 0x66666666;
954 /* set_dto(chan, 38810700+1000); */
955 /* set_dto(chan, 19392658); */
956 }
957 if (chan->mode & NGENE_IO_TSIN)
958 chan->pBufferExchange = tsin_exchange;
959 /* ngwritel(0, 0x9310); */
960 spin_unlock_irq(&chan->state_lock);
961 } else
962 ;/* printk(KERN_INFO DEVICE_NAME ": lock=%08x\n",
963 ngreadl(0x9310)); */
964
965 ret = ngene_command_stream_control(dev, chan->number,
966 control, mode, flags);
967 if (!ret)
968 chan->running = state;
969 else
970 printk(KERN_ERR DEVICE_NAME ": set_transfer %d failed\n",
971 state);
972 if (!state) {
973 spin_lock_irq(&chan->state_lock);
974 chan->pBufferExchange = 0;
975 dvb_ringbuffer_flush(&dev->tsout_rbuf);
976 spin_unlock_irq(&chan->state_lock);
977 }
978}
979
980static int ngene_start_feed(struct dvb_demux_feed *dvbdmxfeed)
981{
982 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
983 struct ngene_channel *chan = dvbdmx->priv;
984
985 if (chan->users == 0) {
986#ifdef COMMAND_TIMEOUT_WORKAROUND
987 if (!chan->running)
988#endif
989 set_transfer(chan, 1);
990 /* msleep(10); */
991 }
992
993 return ++chan->users;
994}
995
996static int ngene_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
997{
998 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
999 struct ngene_channel *chan = dvbdmx->priv;
1000
1001 if (--chan->users)
1002 return chan->users;
1003
1004#ifndef COMMAND_TIMEOUT_WORKAROUND
1005 set_transfer(chan, 0);
1006#endif
1007
1008 return 0;
1009}
1010
1011
1012
1013static int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
1014 int (*start_feed)(struct dvb_demux_feed *),
1015 int (*stop_feed)(struct dvb_demux_feed *),
1016 void *priv)
1017{
1018 dvbdemux->priv = priv;
1019
1020 dvbdemux->filternum = 256;
1021 dvbdemux->feednum = 256;
1022 dvbdemux->start_feed = start_feed;
1023 dvbdemux->stop_feed = stop_feed;
1024 dvbdemux->write_to_decoder = 0;
1025 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
1026 DMX_SECTION_FILTERING |
1027 DMX_MEMORY_BASED_FILTERING);
1028 return dvb_dmx_init(dvbdemux);
1029}
1030
1031static int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
1032 struct dvb_demux *dvbdemux,
1033 struct dmx_frontend *hw_frontend,
1034 struct dmx_frontend *mem_frontend,
1035 struct dvb_adapter *dvb_adapter)
1036{
1037 int ret;
1038
1039 dmxdev->filternum = 256;
1040 dmxdev->demux = &dvbdemux->dmx;
1041 dmxdev->capabilities = 0;
1042 ret = dvb_dmxdev_init(dmxdev, dvb_adapter);
1043 if (ret < 0)
1044 return ret;
1045
1046 hw_frontend->source = DMX_FRONTEND_0;
1047 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend);
1048 mem_frontend->source = DMX_MEMORY_FE;
1049 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend);
1050 return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend);
1051}
1052
1053
1054/****************************************************************************/
1055/* nGene hardware init and release functions ********************************/
1056/****************************************************************************/
1057
1058static void free_ringbuffer(struct ngene *dev, struct SRingBufferDescriptor *rb)
1059{
1060 struct SBufferHeader *Cur = rb->Head;
1061 u32 j;
1062
1063 if (!Cur)
1064 return;
1065
1066 for (j = 0; j < rb->NumBuffers; j++, Cur = Cur->Next) {
1067 if (Cur->Buffer1)
1068 pci_free_consistent(dev->pci_dev,
1069 rb->Buffer1Length,
1070 Cur->Buffer1,
1071 Cur->scList1->Address);
1072
1073 if (Cur->Buffer2)
1074 pci_free_consistent(dev->pci_dev,
1075 rb->Buffer2Length,
1076 Cur->Buffer2,
1077 Cur->scList2->Address);
1078 }
1079
1080 if (rb->SCListMem)
1081 pci_free_consistent(dev->pci_dev, rb->SCListMemSize,
1082 rb->SCListMem, rb->PASCListMem);
1083
1084 pci_free_consistent(dev->pci_dev, rb->MemSize, rb->Head, rb->PAHead);
1085}
1086
1087static void free_idlebuffer(struct ngene *dev,
1088 struct SRingBufferDescriptor *rb,
1089 struct SRingBufferDescriptor *tb)
1090{
1091 int j;
1092 struct SBufferHeader *Cur = tb->Head;
1093
1094 if (!rb->Head)
1095 return;
1096 free_ringbuffer(dev, rb);
1097 for (j = 0; j < tb->NumBuffers; j++, Cur = Cur->Next) {
1098 Cur->Buffer2 = 0;
1099 Cur->scList2 = 0;
1100 Cur->ngeneBuffer.Address_of_first_entry_2 = 0;
1101 Cur->ngeneBuffer.Number_of_entries_2 = 0;
1102 }
1103}
1104
1105static void free_common_buffers(struct ngene *dev)
1106{
1107 u32 i;
1108 struct ngene_channel *chan;
1109
1110 for (i = STREAM_VIDEOIN1; i < MAX_STREAM; i++) {
1111 chan = &dev->channel[i];
1112 free_idlebuffer(dev, &chan->TSIdleBuffer, &chan->TSRingBuffer);
1113 free_ringbuffer(dev, &chan->RingBuffer);
1114 free_ringbuffer(dev, &chan->TSRingBuffer);
1115 }
1116
1117 if (dev->OverflowBuffer)
1118 pci_free_consistent(dev->pci_dev,
1119 OVERFLOW_BUFFER_SIZE,
1120 dev->OverflowBuffer, dev->PAOverflowBuffer);
1121
1122 if (dev->FWInterfaceBuffer)
1123 pci_free_consistent(dev->pci_dev,
1124 4096,
1125 dev->FWInterfaceBuffer,
1126 dev->PAFWInterfaceBuffer);
1127}
1128
1129/****************************************************************************/
1130/* Ring buffer handling *****************************************************/
1131/****************************************************************************/
1132
1133static int create_ring_buffer(struct pci_dev *pci_dev,
1134 struct SRingBufferDescriptor *descr, u32 NumBuffers)
1135{
1136 dma_addr_t tmp;
1137 struct SBufferHeader *Head;
1138 u32 i;
1139 u32 MemSize = SIZEOF_SBufferHeader * NumBuffers;
1140 u64 PARingBufferHead;
1141 u64 PARingBufferCur;
1142 u64 PARingBufferNext;
1143 struct SBufferHeader *Cur, *Next;
1144
1145 descr->Head = 0;
1146 descr->MemSize = 0;
1147 descr->PAHead = 0;
1148 descr->NumBuffers = 0;
1149
1150 if (MemSize < 4096)
1151 MemSize = 4096;
1152
1153 Head = pci_alloc_consistent(pci_dev, MemSize, &tmp);
1154 PARingBufferHead = tmp;
1155
1156 if (!Head)
1157 return -ENOMEM;
1158
1159 memset(Head, 0, MemSize);
1160
1161 PARingBufferCur = PARingBufferHead;
1162 Cur = Head;
1163
1164 for (i = 0; i < NumBuffers - 1; i++) {
1165 Next = (struct SBufferHeader *)
1166 (((u8 *) Cur) + SIZEOF_SBufferHeader);
1167 PARingBufferNext = PARingBufferCur + SIZEOF_SBufferHeader;
1168 Cur->Next = Next;
1169 Cur->ngeneBuffer.Next = PARingBufferNext;
1170 Cur = Next;
1171 PARingBufferCur = PARingBufferNext;
1172 }
1173 /* Last Buffer points back to first one */
1174 Cur->Next = Head;
1175 Cur->ngeneBuffer.Next = PARingBufferHead;
1176
1177 descr->Head = Head;
1178 descr->MemSize = MemSize;
1179 descr->PAHead = PARingBufferHead;
1180 descr->NumBuffers = NumBuffers;
1181
1182 return 0;
1183}
1184
1185static int AllocateRingBuffers(struct pci_dev *pci_dev,
1186 dma_addr_t of,
1187 struct SRingBufferDescriptor *pRingBuffer,
1188 u32 Buffer1Length, u32 Buffer2Length)
1189{
1190 dma_addr_t tmp;
1191 u32 i, j;
1192 int status = 0;
1193 u32 SCListMemSize = pRingBuffer->NumBuffers
1194 * ((Buffer2Length != 0) ? (NUM_SCATTER_GATHER_ENTRIES * 2) :
1195 NUM_SCATTER_GATHER_ENTRIES)
1196 * sizeof(struct HW_SCATTER_GATHER_ELEMENT);
1197
1198 u64 PASCListMem;
1199 struct HW_SCATTER_GATHER_ELEMENT *SCListEntry;
1200 u64 PASCListEntry;
1201 struct SBufferHeader *Cur;
1202 void *SCListMem;
1203
1204 if (SCListMemSize < 4096)
1205 SCListMemSize = 4096;
1206
1207 SCListMem = pci_alloc_consistent(pci_dev, SCListMemSize, &tmp);
1208
1209 PASCListMem = tmp;
1210 if (SCListMem == NULL)
1211 return -ENOMEM;
1212
1213 memset(SCListMem, 0, SCListMemSize);
1214
1215 pRingBuffer->SCListMem = SCListMem;
1216 pRingBuffer->PASCListMem = PASCListMem;
1217 pRingBuffer->SCListMemSize = SCListMemSize;
1218 pRingBuffer->Buffer1Length = Buffer1Length;
1219 pRingBuffer->Buffer2Length = Buffer2Length;
1220
1221 SCListEntry = SCListMem;
1222 PASCListEntry = PASCListMem;
1223 Cur = pRingBuffer->Head;
1224
1225 for (i = 0; i < pRingBuffer->NumBuffers; i += 1, Cur = Cur->Next) {
1226 u64 PABuffer;
1227
1228 void *Buffer = pci_alloc_consistent(pci_dev, Buffer1Length,
1229 &tmp);
1230 PABuffer = tmp;
1231
1232 if (Buffer == NULL)
1233 return -ENOMEM;
1234
1235 Cur->Buffer1 = Buffer;
1236
1237 SCListEntry->Address = PABuffer;
1238 SCListEntry->Length = Buffer1Length;
1239
1240 Cur->scList1 = SCListEntry;
1241 Cur->ngeneBuffer.Address_of_first_entry_1 = PASCListEntry;
1242 Cur->ngeneBuffer.Number_of_entries_1 =
1243 NUM_SCATTER_GATHER_ENTRIES;
1244
1245 SCListEntry += 1;
1246 PASCListEntry += sizeof(struct HW_SCATTER_GATHER_ELEMENT);
1247
1248#if NUM_SCATTER_GATHER_ENTRIES > 1
1249 for (j = 0; j < NUM_SCATTER_GATHER_ENTRIES - 1; j += 1) {
1250 SCListEntry->Address = of;
1251 SCListEntry->Length = OVERFLOW_BUFFER_SIZE;
1252 SCListEntry += 1;
1253 PASCListEntry +=
1254 sizeof(struct HW_SCATTER_GATHER_ELEMENT);
1255 }
1256#endif
1257
1258 if (!Buffer2Length)
1259 continue;
1260
1261 Buffer = pci_alloc_consistent(pci_dev, Buffer2Length, &tmp);
1262 PABuffer = tmp;
1263
1264 if (Buffer == NULL)
1265 return -ENOMEM;
1266
1267 Cur->Buffer2 = Buffer;
1268
1269 SCListEntry->Address = PABuffer;
1270 SCListEntry->Length = Buffer2Length;
1271
1272 Cur->scList2 = SCListEntry;
1273 Cur->ngeneBuffer.Address_of_first_entry_2 = PASCListEntry;
1274 Cur->ngeneBuffer.Number_of_entries_2 =
1275 NUM_SCATTER_GATHER_ENTRIES;
1276
1277 SCListEntry += 1;
1278 PASCListEntry += sizeof(struct HW_SCATTER_GATHER_ELEMENT);
1279
1280#if NUM_SCATTER_GATHER_ENTRIES > 1
1281 for (j = 0; j < NUM_SCATTER_GATHER_ENTRIES - 1; j++) {
1282 SCListEntry->Address = of;
1283 SCListEntry->Length = OVERFLOW_BUFFER_SIZE;
1284 SCListEntry += 1;
1285 PASCListEntry +=
1286 sizeof(struct HW_SCATTER_GATHER_ELEMENT);
1287 }
1288#endif
1289
1290 }
1291
1292 return status;
1293}
1294
1295static int FillTSIdleBuffer(struct SRingBufferDescriptor *pIdleBuffer,
1296 struct SRingBufferDescriptor *pRingBuffer)
1297{
1298 int status = 0;
1299
1300 /* Copy pointer to scatter gather list in TSRingbuffer
1301 structure for buffer 2
1302 Load number of buffer
1303 */
1304 u32 n = pRingBuffer->NumBuffers;
1305
1306 /* Point to first buffer entry */
1307 struct SBufferHeader *Cur = pRingBuffer->Head;
1308 int i;
1309 /* Loop thru all buffer and set Buffer 2 pointers to TSIdlebuffer */
1310 for (i = 0; i < n; i++) {
1311 Cur->Buffer2 = pIdleBuffer->Head->Buffer1;
1312 Cur->scList2 = pIdleBuffer->Head->scList1;
1313 Cur->ngeneBuffer.Address_of_first_entry_2 =
1314 pIdleBuffer->Head->ngeneBuffer.
1315 Address_of_first_entry_1;
1316 Cur->ngeneBuffer.Number_of_entries_2 =
1317 pIdleBuffer->Head->ngeneBuffer.Number_of_entries_1;
1318 Cur = Cur->Next;
1319 }
1320 return status;
1321}
1322
1323static u32 RingBufferSizes[MAX_STREAM] = {
1324 RING_SIZE_VIDEO,
1325 RING_SIZE_VIDEO,
1326 RING_SIZE_AUDIO,
1327 RING_SIZE_AUDIO,
1328 RING_SIZE_AUDIO,
1329};
1330
1331static u32 Buffer1Sizes[MAX_STREAM] = {
1332 MAX_VIDEO_BUFFER_SIZE,
1333 MAX_VIDEO_BUFFER_SIZE,
1334 MAX_AUDIO_BUFFER_SIZE,
1335 MAX_AUDIO_BUFFER_SIZE,
1336 MAX_AUDIO_BUFFER_SIZE
1337};
1338
1339static u32 Buffer2Sizes[MAX_STREAM] = {
1340 MAX_VBI_BUFFER_SIZE,
1341 MAX_VBI_BUFFER_SIZE,
1342 0,
1343 0,
1344 0
1345};
1346
1347
1348static int AllocCommonBuffers(struct ngene *dev)
1349{
1350 int status = 0, i;
1351
1352 dev->FWInterfaceBuffer = pci_alloc_consistent(dev->pci_dev, 4096,
1353 &dev->PAFWInterfaceBuffer);
1354 if (!dev->FWInterfaceBuffer)
1355 return -ENOMEM;
1356 dev->hosttongene = dev->FWInterfaceBuffer;
1357 dev->ngenetohost = dev->FWInterfaceBuffer + 256;
1358 dev->EventBuffer = dev->FWInterfaceBuffer + 512;
1359
1360 dev->OverflowBuffer = pci_alloc_consistent(dev->pci_dev,
1361 OVERFLOW_BUFFER_SIZE,
1362 &dev->PAOverflowBuffer);
1363 if (!dev->OverflowBuffer)
1364 return -ENOMEM;
1365 memset(dev->OverflowBuffer, 0, OVERFLOW_BUFFER_SIZE);
1366
1367 for (i = STREAM_VIDEOIN1; i < MAX_STREAM; i++) {
1368 int type = dev->card_info->io_type[i];
1369
1370 dev->channel[i].State = KSSTATE_STOP;
1371
1372 if (type & (NGENE_IO_TV | NGENE_IO_HDTV | NGENE_IO_AIN)) {
1373 status = create_ring_buffer(dev->pci_dev,
1374 &dev->channel[i].RingBuffer,
1375 RingBufferSizes[i]);
1376 if (status < 0)
1377 break;
1378
1379 if (type & (NGENE_IO_TV | NGENE_IO_AIN)) {
1380 status = AllocateRingBuffers(dev->pci_dev,
1381 dev->
1382 PAOverflowBuffer,
1383 &dev->channel[i].
1384 RingBuffer,
1385 Buffer1Sizes[i],
1386 Buffer2Sizes[i]);
1387 if (status < 0)
1388 break;
1389 } else if (type & NGENE_IO_HDTV) {
1390 status = AllocateRingBuffers(dev->pci_dev,
1391 dev->
1392 PAOverflowBuffer,
1393 &dev->channel[i].
1394 RingBuffer,
1395 MAX_HDTV_BUFFER_SIZE,
1396 0);
1397 if (status < 0)
1398 break;
1399 }
1400 }
1401
1402 if (type & (NGENE_IO_TSIN | NGENE_IO_TSOUT)) {
1403
1404 status = create_ring_buffer(dev->pci_dev,
1405 &dev->channel[i].
1406 TSRingBuffer, RING_SIZE_TS);
1407 if (status < 0)
1408 break;
1409
1410 status = AllocateRingBuffers(dev->pci_dev,
1411 dev->PAOverflowBuffer,
1412 &dev->channel[i].
1413 TSRingBuffer,
1414 MAX_TS_BUFFER_SIZE, 0);
1415 if (status)
1416 break;
1417 }
1418
1419 if (type & NGENE_IO_TSOUT) {
1420 status = create_ring_buffer(dev->pci_dev,
1421 &dev->channel[i].
1422 TSIdleBuffer, 1);
1423 if (status < 0)
1424 break;
1425 status = AllocateRingBuffers(dev->pci_dev,
1426 dev->PAOverflowBuffer,
1427 &dev->channel[i].
1428 TSIdleBuffer,
1429 MAX_TS_BUFFER_SIZE, 0);
1430 if (status)
1431 break;
1432 FillTSIdleBuffer(&dev->channel[i].TSIdleBuffer,
1433 &dev->channel[i].TSRingBuffer);
1434 }
1435 }
1436 return status;
1437}
1438
1439static void ngene_release_buffers(struct ngene *dev)
1440{
1441 if (dev->iomem)
1442 iounmap(dev->iomem);
1443 free_common_buffers(dev);
1444 vfree(dev->tsout_buf);
1445 vfree(dev->ain_buf);
1446 vfree(dev->vin_buf);
1447 vfree(dev);
1448}
1449
1450static int ngene_get_buffers(struct ngene *dev)
1451{
1452 if (AllocCommonBuffers(dev))
1453 return -ENOMEM;
1454 if (dev->card_info->io_type[4] & NGENE_IO_TSOUT) {
1455 dev->tsout_buf = vmalloc(TSOUT_BUF_SIZE);
1456 if (!dev->tsout_buf)
1457 return -ENOMEM;
1458 dvb_ringbuffer_init(&dev->tsout_rbuf,
1459 dev->tsout_buf, TSOUT_BUF_SIZE);
1460 }
1461 if (dev->card_info->io_type[2] & NGENE_IO_AIN) {
1462 dev->ain_buf = vmalloc(AIN_BUF_SIZE);
1463 if (!dev->ain_buf)
1464 return -ENOMEM;
1465 dvb_ringbuffer_init(&dev->ain_rbuf, dev->ain_buf, AIN_BUF_SIZE);
1466 }
1467 if (dev->card_info->io_type[0] & NGENE_IO_HDTV) {
1468 dev->vin_buf = vmalloc(VIN_BUF_SIZE);
1469 if (!dev->vin_buf)
1470 return -ENOMEM;
1471 dvb_ringbuffer_init(&dev->vin_rbuf, dev->vin_buf, VIN_BUF_SIZE);
1472 }
1473 dev->iomem = ioremap(pci_resource_start(dev->pci_dev, 0),
1474 pci_resource_len(dev->pci_dev, 0));
1475 if (!dev->iomem)
1476 return -ENOMEM;
1477
1478 return 0;
1479}
1480
1481static void ngene_init(struct ngene *dev)
1482{
1483 int i;
1484
1485 tasklet_init(&dev->event_tasklet, event_tasklet, (unsigned long)dev);
1486
1487 memset_io(dev->iomem + 0xc000, 0x00, 0x220);
1488 memset_io(dev->iomem + 0xc400, 0x00, 0x100);
1489
1490 for (i = 0; i < MAX_STREAM; i++) {
1491 dev->channel[i].dev = dev;
1492 dev->channel[i].number = i;
1493 }
1494
1495 dev->fw_interface_version = 0;
1496
1497 ngwritel(0, NGENE_INT_ENABLE);
1498
1499 dev->icounts = ngreadl(NGENE_INT_COUNTS);
1500
1501 dev->device_version = ngreadl(DEV_VER) & 0x0f;
1502 printk(KERN_INFO DEVICE_NAME ": Device version %d\n",
1503 dev->device_version);
1504}
1505
1506static int ngene_load_firm(struct ngene *dev)
1507{
1508 u32 size;
1509 const struct firmware *fw = NULL;
1510 u8 *ngene_fw;
1511 char *fw_name;
1512 int err, version;
1513
1514 version = dev->card_info->fw_version;
1515
1516 switch (version) {
1517 default:
1518 case 15:
1519 version = 15;
1520 size = 23466;
1521 fw_name = "ngene_15.fw";
1522 break;
1523 case 16:
1524 size = 23498;
1525 fw_name = "ngene_16.fw";
1526 break;
1527 case 17:
1528 size = 24446;
1529 fw_name = "ngene_17.fw";
1530 break;
1531 }
1532
1533 if (request_firmware(&fw, fw_name, &dev->pci_dev->dev) < 0) {
1534 printk(KERN_ERR DEVICE_NAME
1535 ": Could not load firmware file %s.\n", fw_name);
1536 printk(KERN_INFO DEVICE_NAME
1537 ": Copy %s to your hotplug directory!\n", fw_name);
1538 return -1;
1539 }
1540 if (size != fw->size) {
1541 printk(KERN_ERR DEVICE_NAME
1542 ": Firmware %s has invalid size!", fw_name);
1543 err = -1;
1544 } else {
1545 printk(KERN_INFO DEVICE_NAME
1546 ": Loading firmware file %s.\n", fw_name);
1547 ngene_fw = (u8 *) fw->data;
1548 err = ngene_command_load_firmware(dev, ngene_fw, size);
1549 }
1550
1551 release_firmware(fw);
1552
1553 return err;
1554}
1555
1556static void ngene_stop(struct ngene *dev)
1557{
1558 down(&dev->cmd_mutex);
1559 i2c_del_adapter(&(dev->channel[0].i2c_adapter));
1560 i2c_del_adapter(&(dev->channel[1].i2c_adapter));
1561 ngwritel(0, NGENE_INT_ENABLE);
1562 ngwritel(0, NGENE_COMMAND);
1563 ngwritel(0, NGENE_COMMAND_HI);
1564 ngwritel(0, NGENE_STATUS);
1565 ngwritel(0, NGENE_STATUS_HI);
1566 ngwritel(0, NGENE_EVENT);
1567 ngwritel(0, NGENE_EVENT_HI);
1568 free_irq(dev->pci_dev->irq, dev);
1569}
1570
1571static int ngene_start(struct ngene *dev)
1572{
1573 int stat;
1574 int i;
1575
1576 pci_set_master(dev->pci_dev);
1577 ngene_init(dev);
1578
1579 stat = request_irq(dev->pci_dev->irq, irq_handler,
1580 IRQF_SHARED, "nGene",
1581 (void *)dev);
1582 if (stat < 0)
1583 return stat;
1584
1585 init_waitqueue_head(&dev->cmd_wq);
1586 init_waitqueue_head(&dev->tx_wq);
1587 init_waitqueue_head(&dev->rx_wq);
1588 sema_init(&dev->cmd_mutex, 1);
1589 sema_init(&dev->stream_mutex, 1);
1590 sema_init(&dev->pll_mutex, 1);
1591 sema_init(&dev->i2c_switch_mutex, 1);
1592 spin_lock_init(&dev->cmd_lock);
1593 for (i = 0; i < MAX_STREAM; i++)
1594 spin_lock_init(&dev->channel[i].state_lock);
1595 ngwritel(1, TIMESTAMPS);
1596
1597 ngwritel(1, NGENE_INT_ENABLE);
1598
1599 stat = ngene_load_firm(dev);
1600 if (stat < 0)
1601 goto fail;
1602
1603 stat = ngene_i2c_init(dev, 0);
1604 if (stat < 0)
1605 goto fail;
1606
1607 stat = ngene_i2c_init(dev, 1);
1608 if (stat < 0)
1609 goto fail;
1610
1611 if (dev->card_info->fw_version == 17) {
1612 u8 tsin4_config[6] = {
1613 3072 / 64, 3072 / 64, 0, 3072 / 64, 3072 / 64, 0};
1614 u8 default_config[6] = {
1615 4096 / 64, 4096 / 64, 0, 2048 / 64, 2048 / 64, 0};
1616 u8 *bconf = default_config;
1617
1618 if (dev->card_info->io_type[3] == NGENE_IO_TSIN)
1619 bconf = tsin4_config;
1620 dprintk(KERN_DEBUG DEVICE_NAME ": FW 17 buffer config\n");
1621 stat = ngene_command_config_free_buf(dev, bconf);
1622 } else {
1623 int bconf = BUFFER_CONFIG_4422;
1624 if (dev->card_info->io_type[3] == NGENE_IO_TSIN)
1625 bconf = BUFFER_CONFIG_3333;
1626 stat = ngene_command_config_buf(dev, bconf);
1627 }
1628 return stat;
1629fail:
1630 ngwritel(0, NGENE_INT_ENABLE);
1631 free_irq(dev->pci_dev->irq, dev);
1632 return stat;
1633}
1634
1635
1636
1637/****************************************************************************/
1638/* Switch control (I2C gates, etc.) *****************************************/
1639/****************************************************************************/
1640
1641
1642/****************************************************************************/
1643/* Demod/tuner attachment ***************************************************/
1644/****************************************************************************/
1645
1646static int tuner_attach_stv6110(struct ngene_channel *chan)
1647{
1648 struct stv090x_config *feconf = (struct stv090x_config *)
1649 chan->dev->card_info->fe_config[chan->number];
1650 struct stv6110x_config *tunerconf = (struct stv6110x_config *)
1651 chan->dev->card_info->tuner_config[chan->number];
1652 struct stv6110x_devctl *ctl;
1653
1654 ctl = dvb_attach(stv6110x_attach, chan->fe, tunerconf,
1655 &chan->i2c_adapter);
1656 if (ctl == NULL) {
1657 printk(KERN_ERR DEVICE_NAME ": No STV6110X found!\n");
1658 return -ENODEV;
1659 }
1660
1661 feconf->tuner_init = ctl->tuner_init;
1662 feconf->tuner_set_mode = ctl->tuner_set_mode;
1663 feconf->tuner_set_frequency = ctl->tuner_set_frequency;
1664 feconf->tuner_get_frequency = ctl->tuner_get_frequency;
1665 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
1666 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth;
1667 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain;
1668 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain;
1669 feconf->tuner_set_refclk = ctl->tuner_set_refclk;
1670 feconf->tuner_get_status = ctl->tuner_get_status;
1671
1672 return 0;
1673}
1674
1675
1676static int demod_attach_stv0900(struct ngene_channel *chan)
1677{
1678 struct stv090x_config *feconf = (struct stv090x_config *)
1679 chan->dev->card_info->fe_config[chan->number];
1680
1681 chan->fe = dvb_attach(stv090x_attach,
1682 feconf,
1683 &chan->i2c_adapter,
1684 chan->number == 0 ? STV090x_DEMODULATOR_0 :
1685 STV090x_DEMODULATOR_1);
1686 if (chan->fe == NULL) {
1687 printk(KERN_ERR DEVICE_NAME ": No STV0900 found!\n");
1688 return -ENODEV;
1689 }
1690
1691 if (!dvb_attach(lnbh24_attach, chan->fe, &chan->i2c_adapter, 0,
1692 0, chan->dev->card_info->lnb[chan->number])) {
1693 printk(KERN_ERR DEVICE_NAME ": No LNBH24 found!\n");
1694 dvb_frontend_detach(chan->fe);
1695 return -ENODEV;
1696 }
1697
1698 return 0;
1699}
1700
1701/****************************************************************************/
1702/****************************************************************************/
1703/****************************************************************************/
1704
1705static void release_channel(struct ngene_channel *chan)
1706{
1707 struct dvb_demux *dvbdemux = &chan->demux;
1708 struct ngene *dev = chan->dev;
1709 struct ngene_info *ni = dev->card_info;
1710 int io = ni->io_type[chan->number];
1711
1712#ifdef COMMAND_TIMEOUT_WORKAROUND
1713 if (chan->running)
1714 set_transfer(chan, 0);
1715#endif
1716
1717 tasklet_kill(&chan->demux_tasklet);
1718
1719 if (io & (NGENE_IO_TSIN | NGENE_IO_TSOUT)) {
1720 if (chan->fe) {
1721 dvb_unregister_frontend(chan->fe);
1722 dvb_frontend_detach(chan->fe);
1723 chan->fe = 0;
1724 }
1725 dvbdemux->dmx.close(&dvbdemux->dmx);
1726 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
1727 &chan->hw_frontend);
1728 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
1729 &chan->mem_frontend);
1730 dvb_dmxdev_release(&chan->dmxdev);
1731 dvb_dmx_release(&chan->demux);
1732
1733 if (chan->number == 0 || !one_adapter)
1734 dvb_unregister_adapter(&dev->adapter[chan->number]);
1735 }
1736}
1737
1738static int init_channel(struct ngene_channel *chan)
1739{
1740 int ret = 0, nr = chan->number;
1741 struct dvb_adapter *adapter = NULL;
1742 struct dvb_demux *dvbdemux = &chan->demux;
1743 struct ngene *dev = chan->dev;
1744 struct ngene_info *ni = dev->card_info;
1745 int io = ni->io_type[nr];
1746
1747 tasklet_init(&chan->demux_tasklet, demux_tasklet, (unsigned long)chan);
1748 chan->users = 0;
1749 chan->type = io;
1750 chan->mode = chan->type; /* for now only one mode */
1751
1752 if (io & (NGENE_IO_TSIN | NGENE_IO_TSOUT)) {
1753 if (nr >= STREAM_AUDIOIN1)
1754 chan->DataFormatFlags = DF_SWAP32;
1755 if (nr == 0 || !one_adapter) {
1756 adapter = &dev->adapter[nr];
1757 ret = dvb_register_adapter(adapter, "nGene",
1758 THIS_MODULE,
1759 &chan->dev->pci_dev->dev,
1760 adapter_nr);
1761 if (ret < 0)
1762 return ret;
1763 } else {
1764 adapter = &dev->adapter[0];
1765 }
1766
1767 ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux",
1768 ngene_start_feed,
1769 ngene_stop_feed, chan);
1770 ret = my_dvb_dmxdev_ts_card_init(&chan->dmxdev, &chan->demux,
1771 &chan->hw_frontend,
1772 &chan->mem_frontend, adapter);
1773 }
1774
1775 if (io & NGENE_IO_TSIN) {
1776 chan->fe = NULL;
1777 if (ni->demod_attach[nr])
1778 ni->demod_attach[nr](chan);
1779 if (chan->fe) {
1780 if (dvb_register_frontend(adapter, chan->fe) < 0) {
1781 if (chan->fe->ops.release)
1782 chan->fe->ops.release(chan->fe);
1783 chan->fe = NULL;
1784 }
1785 }
1786 if (chan->fe && ni->tuner_attach[nr])
1787 if (ni->tuner_attach[nr] (chan) < 0) {
1788 printk(KERN_ERR DEVICE_NAME
1789 ": Tuner attach failed on channel %d!\n",
1790 nr);
1791 }
1792 }
1793 return ret;
1794}
1795
1796static int init_channels(struct ngene *dev)
1797{
1798 int i, j;
1799
1800 for (i = 0; i < MAX_STREAM; i++) {
1801 if (init_channel(&dev->channel[i]) < 0) {
1802 for (j = i - 1; j >= 0; j--)
1803 release_channel(&dev->channel[j]);
1804 return -1;
1805 }
1806 }
1807 return 0;
1808}
1809
1810/****************************************************************************/
1811/* device probe/remove calls ************************************************/
1812/****************************************************************************/
1813
1814static void __devexit ngene_remove(struct pci_dev *pdev)
1815{
1816 struct ngene *dev = (struct ngene *)pci_get_drvdata(pdev);
1817 int i;
1818
1819 tasklet_kill(&dev->event_tasklet);
1820 for (i = MAX_STREAM - 1; i >= 0; i--)
1821 release_channel(&dev->channel[i]);
1822 ngene_stop(dev);
1823 ngene_release_buffers(dev);
1824 pci_set_drvdata(pdev, 0);
1825 pci_disable_device(pdev);
1826}
1827
1828static int __devinit ngene_probe(struct pci_dev *pci_dev,
1829 const struct pci_device_id *id)
1830{
1831 struct ngene *dev;
1832 int stat = 0;
1833
1834 if (pci_enable_device(pci_dev) < 0)
1835 return -ENODEV;
1836
1837 dev = vmalloc(sizeof(struct ngene));
1838 if (dev == NULL) {
1839 stat = -ENOMEM;
1840 goto fail0;
1841 }
1842 memset(dev, 0, sizeof(struct ngene));
1843
1844 dev->pci_dev = pci_dev;
1845 dev->card_info = (struct ngene_info *)id->driver_data;
1846 printk(KERN_INFO DEVICE_NAME ": Found %s\n", dev->card_info->name);
1847
1848 pci_set_drvdata(pci_dev, dev);
1849
1850 /* Alloc buffers and start nGene */
1851 stat = ngene_get_buffers(dev);
1852 if (stat < 0)
1853 goto fail1;
1854 stat = ngene_start(dev);
1855 if (stat < 0)
1856 goto fail1;
1857
1858 dev->i2c_current_bus = -1;
1859
1860 /* Register DVB adapters and devices for both channels */
1861 if (init_channels(dev) < 0)
1862 goto fail2;
1863
1864 return 0;
1865
1866fail2:
1867 ngene_stop(dev);
1868fail1:
1869 ngene_release_buffers(dev);
1870fail0:
1871 pci_disable_device(pci_dev);
1872 pci_set_drvdata(pci_dev, 0);
1873 return stat;
1874}
1875
1876/****************************************************************************/
1877/* Card configs *************************************************************/
1878/****************************************************************************/
1879
1880static struct stv090x_config fe_cineS2 = {
1881 .device = STV0900,
1882 .demod_mode = STV090x_DUAL,
1883 .clk_mode = STV090x_CLK_EXT,
1884
1885 .xtal = 27000000,
1886 .address = 0x68,
1887
1888 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1889 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1890
1891 .repeater_level = STV090x_RPTLEVEL_16,
1892
1893 .adc1_range = STV090x_ADC_1Vpp,
1894 .adc2_range = STV090x_ADC_1Vpp,
1895
1896 .diseqc_envelope_mode = true,
1897};
1898
1899static struct stv6110x_config tuner_cineS2_0 = {
1900 .addr = 0x60,
1901 .refclk = 27000000,
1902 .clk_div = 1,
1903};
1904
1905static struct stv6110x_config tuner_cineS2_1 = {
1906 .addr = 0x63,
1907 .refclk = 27000000,
1908 .clk_div = 1,
1909};
1910
1911static struct ngene_info ngene_info_cineS2 = {
1912 .type = NGENE_SIDEWINDER,
1913 .name = "Linux4Media cineS2 DVB-S2 Twin Tuner",
1914 .io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN},
1915 .demod_attach = {demod_attach_stv0900, demod_attach_stv0900},
1916 .tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110},
1917 .fe_config = {&fe_cineS2, &fe_cineS2},
1918 .tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1},
1919 .lnb = {0x0b, 0x08},
1920 .tsf = {3, 3},
1921 .fw_version = 15,
1922};
1923
1924static struct ngene_info ngene_info_satixs2 = {
1925 .type = NGENE_SIDEWINDER,
1926 .name = "Mystique SaTiX-S2 Dual",
1927 .io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN},
1928 .demod_attach = {demod_attach_stv0900, demod_attach_stv0900},
1929 .tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110},
1930 .fe_config = {&fe_cineS2, &fe_cineS2},
1931 .tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1},
1932 .lnb = {0x0b, 0x08},
1933 .tsf = {3, 3},
1934 .fw_version = 15,
1935};
1936
1937/****************************************************************************/
1938
1939
1940
1941/****************************************************************************/
1942/* PCI Subsystem ID *********************************************************/
1943/****************************************************************************/
1944
1945#define NGENE_ID(_subvend, _subdev, _driverdata) { \
1946 .vendor = NGENE_VID, .device = NGENE_PID, \
1947 .subvendor = _subvend, .subdevice = _subdev, \
1948 .driver_data = (unsigned long) &_driverdata }
1949
1950/****************************************************************************/
1951
1952static const struct pci_device_id ngene_id_tbl[] __devinitdata = {
1953 NGENE_ID(0x18c3, 0xabc3, ngene_info_cineS2),
1954 NGENE_ID(0x18c3, 0xabc4, ngene_info_cineS2),
1955 NGENE_ID(0x18c3, 0xdb01, ngene_info_satixs2),
1956 {0}
1957};
1958MODULE_DEVICE_TABLE(pci, ngene_id_tbl);
1959
1960/****************************************************************************/
1961/* Init/Exit ****************************************************************/
1962/****************************************************************************/
1963
1964static pci_ers_result_t ngene_error_detected(struct pci_dev *dev,
1965 enum pci_channel_state state)
1966{
1967 printk(KERN_ERR DEVICE_NAME ": PCI error\n");
1968 if (state == pci_channel_io_perm_failure)
1969 return PCI_ERS_RESULT_DISCONNECT;
1970 if (state == pci_channel_io_frozen)
1971 return PCI_ERS_RESULT_NEED_RESET;
1972 return PCI_ERS_RESULT_CAN_RECOVER;
1973}
1974
1975static pci_ers_result_t ngene_link_reset(struct pci_dev *dev)
1976{
1977 printk(KERN_INFO DEVICE_NAME ": link reset\n");
1978 return 0;
1979}
1980
1981static pci_ers_result_t ngene_slot_reset(struct pci_dev *dev)
1982{
1983 printk(KERN_INFO DEVICE_NAME ": slot reset\n");
1984 return 0;
1985}
1986
1987static void ngene_resume(struct pci_dev *dev)
1988{
1989 printk(KERN_INFO DEVICE_NAME ": resume\n");
1990}
1991
1992static struct pci_error_handlers ngene_errors = {
1993 .error_detected = ngene_error_detected,
1994 .link_reset = ngene_link_reset,
1995 .slot_reset = ngene_slot_reset,
1996 .resume = ngene_resume,
1997};
1998
1999static struct pci_driver ngene_pci_driver = {
2000 .name = "ngene",
2001 .id_table = ngene_id_tbl,
2002 .probe = ngene_probe,
2003 .remove = __devexit_p(ngene_remove),
2004 .err_handler = &ngene_errors,
2005};
2006
2007static __init int module_init_ngene(void)
2008{
2009 printk(KERN_INFO
2010 "nGene PCIE bridge driver, Copyright (C) 2005-2007 Micronas\n");
2011 return pci_register_driver(&ngene_pci_driver);
2012}
2013
2014static __exit void module_exit_ngene(void)
2015{
2016 pci_unregister_driver(&ngene_pci_driver);
2017}
2018
2019module_init(module_init_ngene);
2020module_exit(module_exit_ngene);
2021
2022MODULE_DESCRIPTION("nGene");
2023MODULE_AUTHOR("Micronas, Ralph Metzler, Manfred Voelkel");
2024MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/ngene/ngene.h b/drivers/media/dvb/ngene/ngene.h
new file mode 100644
index 000000000000..a7eb29846310
--- /dev/null
+++ b/drivers/media/dvb/ngene/ngene.h
@@ -0,0 +1,859 @@
1/*
2 * ngene.h: nGene PCIe bridge driver
3 *
4 * Copyright (C) 2005-2007 Micronas
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 only, as published by the Free Software Foundation.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA
21 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
22 */
23
24#ifndef _NGENE_H_
25#define _NGENE_H_
26
27#include <linux/types.h>
28#include <linux/sched.h>
29#include <linux/interrupt.h>
30#include <linux/i2c.h>
31#include <asm/dma.h>
32#include <linux/scatterlist.h>
33
34#include <linux/dvb/frontend.h>
35
36#include "dmxdev.h"
37#include "dvbdev.h"
38#include "dvb_demux.h"
39#include "dvb_frontend.h"
40#include "dvb_ringbuffer.h"
41
42#define NGENE_VID 0x18c3
43#define NGENE_PID 0x0720
44
45#ifndef VIDEO_CAP_VC1
46#define VIDEO_CAP_AVC 128
47#define VIDEO_CAP_H264 128
48#define VIDEO_CAP_VC1 256
49#define VIDEO_CAP_WMV9 256
50#define VIDEO_CAP_MPEG4 512
51#endif
52
53enum STREAM {
54 STREAM_VIDEOIN1 = 0, /* ITU656 or TS Input */
55 STREAM_VIDEOIN2,
56 STREAM_AUDIOIN1, /* I2S or SPI Input */
57 STREAM_AUDIOIN2,
58 STREAM_AUDIOOUT,
59 MAX_STREAM
60};
61
62enum SMODE_BITS {
63 SMODE_AUDIO_SPDIF = 0x20,
64 SMODE_AVSYNC = 0x10,
65 SMODE_TRANSPORT_STREAM = 0x08,
66 SMODE_AUDIO_CAPTURE = 0x04,
67 SMODE_VBI_CAPTURE = 0x02,
68 SMODE_VIDEO_CAPTURE = 0x01
69};
70
71enum STREAM_FLAG_BITS {
72 SFLAG_CHROMA_FORMAT_2COMP = 0x01, /* Chroma Format : 2's complement */
73 SFLAG_CHROMA_FORMAT_OFFSET = 0x00, /* Chroma Format : Binary offset */
74 SFLAG_ORDER_LUMA_CHROMA = 0x02, /* Byte order: Y,Cb,Y,Cr */
75 SFLAG_ORDER_CHROMA_LUMA = 0x00, /* Byte order: Cb,Y,Cr,Y */
76 SFLAG_COLORBAR = 0x04, /* Select colorbar */
77};
78
79#define PROGRAM_ROM 0x0000
80#define PROGRAM_SRAM 0x1000
81#define PERIPHERALS0 0x8000
82#define PERIPHERALS1 0x9000
83#define SHARED_BUFFER 0xC000
84
85#define HOST_TO_NGENE (SHARED_BUFFER+0x0000)
86#define NGENE_TO_HOST (SHARED_BUFFER+0x0100)
87#define NGENE_COMMAND (SHARED_BUFFER+0x0200)
88#define NGENE_COMMAND_HI (SHARED_BUFFER+0x0204)
89#define NGENE_STATUS (SHARED_BUFFER+0x0208)
90#define NGENE_STATUS_HI (SHARED_BUFFER+0x020C)
91#define NGENE_EVENT (SHARED_BUFFER+0x0210)
92#define NGENE_EVENT_HI (SHARED_BUFFER+0x0214)
93#define VARIABLES (SHARED_BUFFER+0x0210)
94
95#define NGENE_INT_COUNTS (SHARED_BUFFER+0x0260)
96#define NGENE_INT_ENABLE (SHARED_BUFFER+0x0264)
97#define NGENE_VBI_LINE_COUNT (SHARED_BUFFER+0x0268)
98
99#define BUFFER_GP_XMIT (SHARED_BUFFER+0x0800)
100#define BUFFER_GP_RECV (SHARED_BUFFER+0x0900)
101#define EEPROM_AREA (SHARED_BUFFER+0x0A00)
102
103#define SG_V_IN_1 (SHARED_BUFFER+0x0A80)
104#define SG_VBI_1 (SHARED_BUFFER+0x0B00)
105#define SG_A_IN_1 (SHARED_BUFFER+0x0B80)
106#define SG_V_IN_2 (SHARED_BUFFER+0x0C00)
107#define SG_VBI_2 (SHARED_BUFFER+0x0C80)
108#define SG_A_IN_2 (SHARED_BUFFER+0x0D00)
109#define SG_V_OUT (SHARED_BUFFER+0x0D80)
110#define SG_A_OUT2 (SHARED_BUFFER+0x0E00)
111
112#define DATA_A_IN_1 (SHARED_BUFFER+0x0E80)
113#define DATA_A_IN_2 (SHARED_BUFFER+0x0F00)
114#define DATA_A_OUT (SHARED_BUFFER+0x0F80)
115#define DATA_V_IN_1 (SHARED_BUFFER+0x1000)
116#define DATA_V_IN_2 (SHARED_BUFFER+0x2000)
117#define DATA_V_OUT (SHARED_BUFFER+0x3000)
118
119#define DATA_FIFO_AREA (SHARED_BUFFER+0x1000)
120
121#define TIMESTAMPS 0xA000
122#define SCRATCHPAD 0xA080
123#define FORCE_INT 0xA088
124#define FORCE_NMI 0xA090
125#define INT_STATUS 0xA0A0
126
127#define DEV_VER 0x9004
128
129#define FW_DEBUG_DEFAULT (PROGRAM_SRAM+0x00FF)
130
131struct SG_ADDR {
132 u64 start;
133 u64 curr;
134 u16 curr_ptr;
135 u16 elements;
136 u32 pad[3];
137} __attribute__ ((__packed__));
138
139struct SHARED_MEMORY {
140 /* C000 */
141 u32 HostToNgene[64];
142
143 /* C100 */
144 u32 NgeneToHost[64];
145
146 /* C200 */
147 u64 NgeneCommand;
148 u64 NgeneStatus;
149 u64 NgeneEvent;
150
151 /* C210 */
152 u8 pad1[0xc260 - 0xc218];
153
154 /* C260 */
155 u32 IntCounts;
156 u32 IntEnable;
157
158 /* C268 */
159 u8 pad2[0xd000 - 0xc268];
160
161} __attribute__ ((__packed__));
162
163struct BUFFER_STREAM_RESULTS {
164 u32 Clock; /* Stream time in 100ns units */
165 u16 RemainingLines; /* Remaining lines in this field.
166 0 for complete field */
167 u8 FieldCount; /* Video field number */
168 u8 Flags; /* Bit 7 = Done, Bit 6 = seen, Bit 5 = overflow,
169 Bit 0 = FieldID */
170 u16 BlockCount; /* Audio block count (unused) */
171 u8 Reserved[2];
172 u32 DTOUpdate;
173} __attribute__ ((__packed__));
174
175struct HW_SCATTER_GATHER_ELEMENT {
176 u64 Address;
177 u32 Length;
178 u32 Reserved;
179} __attribute__ ((__packed__));
180
181struct BUFFER_HEADER {
182 u64 Next;
183 struct BUFFER_STREAM_RESULTS SR;
184
185 u32 Number_of_entries_1;
186 u32 Reserved5;
187 u64 Address_of_first_entry_1;
188
189 u32 Number_of_entries_2;
190 u32 Reserved7;
191 u64 Address_of_first_entry_2;
192} __attribute__ ((__packed__));
193
194struct EVENT_BUFFER {
195 u32 TimeStamp;
196 u8 GPIOStatus;
197 u8 UARTStatus;
198 u8 RXCharacter;
199 u8 EventStatus;
200 u32 Reserved[2];
201} __attribute__ ((__packed__));
202
203/* Firmware commands. */
204
205enum OPCODES {
206 CMD_NOP = 0,
207 CMD_FWLOAD_PREPARE = 0x01,
208 CMD_FWLOAD_FINISH = 0x02,
209 CMD_I2C_READ = 0x03,
210 CMD_I2C_WRITE = 0x04,
211
212 CMD_I2C_WRITE_NOSTOP = 0x05,
213 CMD_I2C_CONTINUE_WRITE = 0x06,
214 CMD_I2C_CONTINUE_WRITE_NOSTOP = 0x07,
215
216 CMD_DEBUG_OUTPUT = 0x09,
217
218 CMD_CONTROL = 0x10,
219 CMD_CONFIGURE_BUFFER = 0x11,
220 CMD_CONFIGURE_FREE_BUFFER = 0x12,
221
222 CMD_SPI_READ = 0x13,
223 CMD_SPI_WRITE = 0x14,
224
225 CMD_MEM_READ = 0x20,
226 CMD_MEM_WRITE = 0x21,
227 CMD_SFR_READ = 0x22,
228 CMD_SFR_WRITE = 0x23,
229 CMD_IRAM_READ = 0x24,
230 CMD_IRAM_WRITE = 0x25,
231 CMD_SET_GPIO_PIN = 0x26,
232 CMD_SET_GPIO_INT = 0x27,
233 CMD_CONFIGURE_UART = 0x28,
234 CMD_WRITE_UART = 0x29,
235 MAX_CMD
236};
237
238enum RESPONSES {
239 OK = 0,
240 ERROR = 1
241};
242
243struct FW_HEADER {
244 u8 Opcode;
245 u8 Length;
246} __attribute__ ((__packed__));
247
248struct FW_I2C_WRITE {
249 struct FW_HEADER hdr;
250 u8 Device;
251 u8 Data[250];
252} __attribute__ ((__packed__));
253
254struct FW_I2C_CONTINUE_WRITE {
255 struct FW_HEADER hdr;
256 u8 Data[250];
257} __attribute__ ((__packed__));
258
259struct FW_I2C_READ {
260 struct FW_HEADER hdr;
261 u8 Device;
262 u8 Data[252]; /* followed by two bytes of read data count */
263} __attribute__ ((__packed__));
264
265struct FW_SPI_WRITE {
266 struct FW_HEADER hdr;
267 u8 ModeSelect;
268 u8 Data[250];
269} __attribute__ ((__packed__));
270
271struct FW_SPI_READ {
272 struct FW_HEADER hdr;
273 u8 ModeSelect;
274 u8 Data[252]; /* followed by two bytes of read data count */
275} __attribute__ ((__packed__));
276
277struct FW_FWLOAD_PREPARE {
278 struct FW_HEADER hdr;
279} __attribute__ ((__packed__));
280
281struct FW_FWLOAD_FINISH {
282 struct FW_HEADER hdr;
283 u16 Address; /* address of final block */
284 u16 Length;
285} __attribute__ ((__packed__));
286
287/*
288 * Meaning of FW_STREAM_CONTROL::Mode bits:
289 * Bit 7: Loopback PEXin to PEXout using TVOut channel
290 * Bit 6: AVLOOP
291 * Bit 5: Audio select; 0=I2S, 1=SPDIF
292 * Bit 4: AVSYNC
293 * Bit 3: Enable transport stream
294 * Bit 2: Enable audio capture
295 * Bit 1: Enable ITU-Video VBI capture
296 * Bit 0: Enable ITU-Video capture
297 *
298 * Meaning of FW_STREAM_CONTROL::Control bits (see UVI1_CTL)
299 * Bit 7: continuous capture
300 * Bit 6: capture one field
301 * Bit 5: capture one frame
302 * Bit 4: unused
303 * Bit 3: starting field; 0=odd, 1=even
304 * Bit 2: sample size; 0=8-bit, 1=10-bit
305 * Bit 1: data format; 0=UYVY, 1=YUY2
306 * Bit 0: resets buffer pointers
307*/
308
309enum FSC_MODE_BITS {
310 SMODE_LOOPBACK = 0x80,
311 SMODE_AVLOOP = 0x40,
312 _SMODE_AUDIO_SPDIF = 0x20,
313 _SMODE_AVSYNC = 0x10,
314 _SMODE_TRANSPORT_STREAM = 0x08,
315 _SMODE_AUDIO_CAPTURE = 0x04,
316 _SMODE_VBI_CAPTURE = 0x02,
317 _SMODE_VIDEO_CAPTURE = 0x01
318};
319
320
321/* Meaning of FW_STREAM_CONTROL::Stream bits:
322 * Bit 3: Audio sample count: 0 = relative, 1 = absolute
323 * Bit 2: color bar select; 1=color bars, 0=CV3 decoder
324 * Bits 1-0: stream select, UVI1, UVI2, TVOUT
325 */
326
327struct FW_STREAM_CONTROL {
328 struct FW_HEADER hdr;
329 u8 Stream; /* Stream number (UVI1, UVI2, TVOUT) */
330 u8 Control; /* Value written to UVI1_CTL */
331 u8 Mode; /* Controls clock source */
332 u8 SetupDataLen; /* Length of setup data, MSB=1 write
333 backwards */
334 u16 CaptureBlockCount; /* Blocks (a 256 Bytes) to capture per buffer
335 for TS and Audio */
336 u64 Buffer_Address; /* Address of first buffer header */
337 u16 BytesPerVideoLine;
338 u16 MaxLinesPerField;
339 u16 MinLinesPerField;
340 u16 Reserved_1;
341 u16 BytesPerVBILine;
342 u16 MaxVBILinesPerField;
343 u16 MinVBILinesPerField;
344 u16 SetupDataAddr; /* ngene relative address of setup data */
345 u8 SetupData[32]; /* setup data */
346} __attribute__((__packed__));
347
348#define AUDIO_BLOCK_SIZE 256
349#define TS_BLOCK_SIZE 256
350
351struct FW_MEM_READ {
352 struct FW_HEADER hdr;
353 u16 address;
354} __attribute__ ((__packed__));
355
356struct FW_MEM_WRITE {
357 struct FW_HEADER hdr;
358 u16 address;
359 u8 data;
360} __attribute__ ((__packed__));
361
362struct FW_SFR_IRAM_READ {
363 struct FW_HEADER hdr;
364 u8 address;
365} __attribute__ ((__packed__));
366
367struct FW_SFR_IRAM_WRITE {
368 struct FW_HEADER hdr;
369 u8 address;
370 u8 data;
371} __attribute__ ((__packed__));
372
373struct FW_SET_GPIO_PIN {
374 struct FW_HEADER hdr;
375 u8 select;
376} __attribute__ ((__packed__));
377
378struct FW_SET_GPIO_INT {
379 struct FW_HEADER hdr;
380 u8 select;
381} __attribute__ ((__packed__));
382
383struct FW_SET_DEBUGMODE {
384 struct FW_HEADER hdr;
385 u8 debug_flags;
386} __attribute__ ((__packed__));
387
388struct FW_CONFIGURE_BUFFERS {
389 struct FW_HEADER hdr;
390 u8 config;
391} __attribute__ ((__packed__));
392
393enum _BUFFER_CONFIGS {
394 /* 4k UVI1, 4k UVI2, 2k AUD1, 2k AUD2 (standard usage) */
395 BUFFER_CONFIG_4422 = 0,
396 /* 3k UVI1, 3k UVI2, 3k AUD1, 3k AUD2 (4x TS input usage) */
397 BUFFER_CONFIG_3333 = 1,
398 /* 8k UVI1, 0k UVI2, 2k AUD1, 2k I2SOut (HDTV decoder usage) */
399 BUFFER_CONFIG_8022 = 2,
400 BUFFER_CONFIG_FW17 = 255, /* Use new FW 17 command */
401};
402
403struct FW_CONFIGURE_FREE_BUFFERS {
404 struct FW_HEADER hdr;
405 u8 UVI1_BufferLength;
406 u8 UVI2_BufferLength;
407 u8 TVO_BufferLength;
408 u8 AUD1_BufferLength;
409 u8 AUD2_BufferLength;
410 u8 TVA_BufferLength;
411} __attribute__ ((__packed__));
412
413struct FW_CONFIGURE_UART {
414 struct FW_HEADER hdr;
415 u8 UartControl;
416} __attribute__ ((__packed__));
417
418enum _UART_CONFIG {
419 _UART_BAUDRATE_19200 = 0,
420 _UART_BAUDRATE_9600 = 1,
421 _UART_BAUDRATE_4800 = 2,
422 _UART_BAUDRATE_2400 = 3,
423 _UART_RX_ENABLE = 0x40,
424 _UART_TX_ENABLE = 0x80,
425};
426
427struct FW_WRITE_UART {
428 struct FW_HEADER hdr;
429 u8 Data[252];
430} __attribute__ ((__packed__));
431
432
433struct ngene_command {
434 u32 in_len;
435 u32 out_len;
436 union {
437 u32 raw[64];
438 u8 raw8[256];
439 struct FW_HEADER hdr;
440 struct FW_I2C_WRITE I2CWrite;
441 struct FW_I2C_CONTINUE_WRITE I2CContinueWrite;
442 struct FW_I2C_READ I2CRead;
443 struct FW_STREAM_CONTROL StreamControl;
444 struct FW_FWLOAD_PREPARE FWLoadPrepare;
445 struct FW_FWLOAD_FINISH FWLoadFinish;
446 struct FW_MEM_READ MemoryRead;
447 struct FW_MEM_WRITE MemoryWrite;
448 struct FW_SFR_IRAM_READ SfrIramRead;
449 struct FW_SFR_IRAM_WRITE SfrIramWrite;
450 struct FW_SPI_WRITE SPIWrite;
451 struct FW_SPI_READ SPIRead;
452 struct FW_SET_GPIO_PIN SetGpioPin;
453 struct FW_SET_GPIO_INT SetGpioInt;
454 struct FW_SET_DEBUGMODE SetDebugMode;
455 struct FW_CONFIGURE_BUFFERS ConfigureBuffers;
456 struct FW_CONFIGURE_FREE_BUFFERS ConfigureFreeBuffers;
457 struct FW_CONFIGURE_UART ConfigureUart;
458 struct FW_WRITE_UART WriteUart;
459 } cmd;
460} __attribute__ ((__packed__));
461
462#define NGENE_INTERFACE_VERSION 0x103
463#define MAX_VIDEO_BUFFER_SIZE (417792) /* 288*1440 rounded up to next page */
464#define MAX_AUDIO_BUFFER_SIZE (8192) /* Gives room for about 23msec@48KHz */
465#define MAX_VBI_BUFFER_SIZE (28672) /* 1144*18 rounded up to next page */
466#define MAX_TS_BUFFER_SIZE (98304) /* 512*188 rounded up to next page */
467#define MAX_HDTV_BUFFER_SIZE (2080768) /* 541*1920*2 rounded up to next page
468 Max: (1920x1080i60) */
469
470#define OVERFLOW_BUFFER_SIZE (8192)
471
472#define RING_SIZE_VIDEO 4
473#define RING_SIZE_AUDIO 8
474#define RING_SIZE_TS 8
475
476#define NUM_SCATTER_GATHER_ENTRIES 8
477
478#define MAX_DMA_LENGTH (((MAX_VIDEO_BUFFER_SIZE + MAX_VBI_BUFFER_SIZE) * \
479 RING_SIZE_VIDEO * 2) + \
480 (MAX_AUDIO_BUFFER_SIZE * RING_SIZE_AUDIO * 2) + \
481 (MAX_TS_BUFFER_SIZE * RING_SIZE_TS * 4) + \
482 (RING_SIZE_VIDEO * PAGE_SIZE * 2) + \
483 (RING_SIZE_AUDIO * PAGE_SIZE * 2) + \
484 (RING_SIZE_TS * PAGE_SIZE * 4) + \
485 8 * PAGE_SIZE + OVERFLOW_BUFFER_SIZE + PAGE_SIZE)
486
487#define EVENT_QUEUE_SIZE 16
488
489/* Gathers the current state of a single channel. */
490
491struct SBufferHeader {
492 struct BUFFER_HEADER ngeneBuffer; /* Physical descriptor */
493 struct SBufferHeader *Next;
494 void *Buffer1;
495 struct HW_SCATTER_GATHER_ELEMENT *scList1;
496 void *Buffer2;
497 struct HW_SCATTER_GATHER_ELEMENT *scList2;
498};
499
500/* Sizeof SBufferHeader aligned to next 64 Bit boundary (hw restriction) */
501#define SIZEOF_SBufferHeader ((sizeof(struct SBufferHeader) + 63) & ~63)
502
503enum HWSTATE {
504 HWSTATE_STOP,
505 HWSTATE_STARTUP,
506 HWSTATE_RUN,
507 HWSTATE_PAUSE,
508};
509
510enum KSSTATE {
511 KSSTATE_STOP,
512 KSSTATE_ACQUIRE,
513 KSSTATE_PAUSE,
514 KSSTATE_RUN,
515};
516
517struct SRingBufferDescriptor {
518 struct SBufferHeader *Head; /* Points to first buffer in ring buffer
519 structure*/
520 u64 PAHead; /* Physical address of first buffer */
521 u32 MemSize; /* Memory size of allocated ring buffers
522 (needed for freeing) */
523 u32 NumBuffers; /* Number of buffers in the ring */
524 u32 Buffer1Length; /* Allocated length of Buffer 1 */
525 u32 Buffer2Length; /* Allocated length of Buffer 2 */
526 void *SCListMem; /* Memory to hold scatter gather lists for this
527 ring */
528 u64 PASCListMem; /* Physical address .. */
529 u32 SCListMemSize; /* Size of this memory */
530};
531
532enum STREAMMODEFLAGS {
533 StreamMode_NONE = 0, /* Stream not used */
534 StreamMode_ANALOG = 1, /* Analog: Stream 0,1 = Video, 2,3 = Audio */
535 StreamMode_TSIN = 2, /* Transport stream input (all) */
536 StreamMode_HDTV = 4, /* HDTV: Maximum 1920x1080p30,1920x1080i60
537 (only stream 0) */
538 StreamMode_TSOUT = 8, /* Transport stream output (only stream 3) */
539};
540
541
542enum BufferExchangeFlags {
543 BEF_EVEN_FIELD = 0x00000001,
544 BEF_CONTINUATION = 0x00000002,
545 BEF_MORE_DATA = 0x00000004,
546 BEF_OVERFLOW = 0x00000008,
547 DF_SWAP32 = 0x00010000,
548};
549
550typedef void *(IBufferExchange)(void *, void *, u32, u32, u32);
551
552struct MICI_STREAMINFO {
553 IBufferExchange *pExchange;
554 IBufferExchange *pExchangeVBI; /* Secondary (VBI, ancillary) */
555 u8 Stream;
556 u8 Flags;
557 u8 Mode;
558 u8 Reserved;
559 u16 nLinesVideo;
560 u16 nBytesPerLineVideo;
561 u16 nLinesVBI;
562 u16 nBytesPerLineVBI;
563 u32 CaptureLength; /* Used for audio and transport stream */
564};
565
566/****************************************************************************/
567/* STRUCTS ******************************************************************/
568/****************************************************************************/
569
570/* sound hardware definition */
571#define MIXER_ADDR_TVTUNER 0
572#define MIXER_ADDR_LAST 0
573
574struct ngene_channel;
575
576/*struct sound chip*/
577
578struct mychip {
579 struct ngene_channel *chan;
580 struct snd_card *card;
581 struct pci_dev *pci;
582 struct snd_pcm_substream *substream;
583 struct snd_pcm *pcm;
584 unsigned long port;
585 int irq;
586 spinlock_t mixer_lock;
587 spinlock_t lock;
588 int mixer_volume[MIXER_ADDR_LAST + 1][2];
589 int capture_source[MIXER_ADDR_LAST + 1][2];
590};
591
592#ifdef NGENE_V4L
593struct ngene_overlay {
594 int tvnorm;
595 struct v4l2_rect w;
596 enum v4l2_field field;
597 struct v4l2_clip *clips;
598 int nclips;
599 int setup_ok;
600};
601
602struct ngene_tvnorm {
603 int v4l2_id;
604 char *name;
605 u16 swidth, sheight; /* scaled standard width, height */
606 int tuner_norm;
607 int soundstd;
608};
609
610struct ngene_vopen {
611 struct ngene_channel *ch;
612 enum v4l2_priority prio;
613 int width;
614 int height;
615 int depth;
616 struct videobuf_queue vbuf_q;
617 struct videobuf_queue vbi;
618 int fourcc;
619 int picxcount;
620 int resources;
621 enum v4l2_buf_type type;
622 const struct ngene_format *fmt;
623
624 const struct ngene_format *ovfmt;
625 struct ngene_overlay ov;
626};
627#endif
628
629struct ngene_channel {
630 struct device device;
631 struct i2c_adapter i2c_adapter;
632
633 struct ngene *dev;
634 int number;
635 int type;
636 int mode;
637
638 struct dvb_frontend *fe;
639 struct dmxdev dmxdev;
640 struct dvb_demux demux;
641 struct dmx_frontend hw_frontend;
642 struct dmx_frontend mem_frontend;
643 int users;
644 struct video_device *v4l_dev;
645 struct tasklet_struct demux_tasklet;
646
647 struct SBufferHeader *nextBuffer;
648 enum KSSTATE State;
649 enum HWSTATE HWState;
650 u8 Stream;
651 u8 Flags;
652 u8 Mode;
653 IBufferExchange *pBufferExchange;
654 IBufferExchange *pBufferExchange2;
655
656 spinlock_t state_lock;
657 u16 nLines;
658 u16 nBytesPerLine;
659 u16 nVBILines;
660 u16 nBytesPerVBILine;
661 u16 itumode;
662 u32 Capture1Length;
663 u32 Capture2Length;
664 struct SRingBufferDescriptor RingBuffer;
665 struct SRingBufferDescriptor TSRingBuffer;
666 struct SRingBufferDescriptor TSIdleBuffer;
667
668 u32 DataFormatFlags;
669
670 int AudioDTOUpdated;
671 u32 AudioDTOValue;
672
673 int (*set_tone)(struct dvb_frontend *, fe_sec_tone_mode_t);
674 u8 lnbh;
675
676 /* stuff from analog driver */
677
678 int minor;
679 struct mychip *mychip;
680 struct snd_card *soundcard;
681 u8 *evenbuffer;
682 u8 dma_on;
683 int soundstreamon;
684 int audiomute;
685 int soundbuffisallocated;
686 int sndbuffflag;
687 int tun_rdy;
688 int dec_rdy;
689 int tun_dec_rdy;
690 int lastbufferflag;
691
692 struct ngene_tvnorm *tvnorms;
693 int tvnorm_num;
694 int tvnorm;
695
696#ifdef NGENE_V4L
697 int videousers;
698 struct v4l2_prio_state prio;
699 struct ngene_vopen init;
700 int resources;
701 struct v4l2_framebuffer fbuf;
702 struct ngene_buffer *screen; /* overlay */
703 struct list_head capture; /* video capture queue */
704 spinlock_t s_lock;
705 struct semaphore reslock;
706#endif
707
708 int running;
709};
710
711struct ngene;
712
713typedef void (rx_cb_t)(struct ngene *, u32, u8);
714typedef void (tx_cb_t)(struct ngene *, u32);
715
716struct ngene {
717 int nr;
718 struct pci_dev *pci_dev;
719 unsigned char *iomem;
720
721 /*struct i2c_adapter i2c_adapter;*/
722
723 u32 device_version;
724 u32 fw_interface_version;
725 u32 icounts;
726
727 u8 *CmdDoneByte;
728 int BootFirmware;
729 void *OverflowBuffer;
730 dma_addr_t PAOverflowBuffer;
731 void *FWInterfaceBuffer;
732 dma_addr_t PAFWInterfaceBuffer;
733 u8 *ngenetohost;
734 u8 *hosttongene;
735
736 struct EVENT_BUFFER EventQueue[EVENT_QUEUE_SIZE];
737 int EventQueueOverflowCount;
738 int EventQueueOverflowFlag;
739 struct tasklet_struct event_tasklet;
740 struct EVENT_BUFFER *EventBuffer;
741 int EventQueueWriteIndex;
742 int EventQueueReadIndex;
743
744 wait_queue_head_t cmd_wq;
745 int cmd_done;
746 struct semaphore cmd_mutex;
747 struct semaphore stream_mutex;
748 struct semaphore pll_mutex;
749 struct semaphore i2c_switch_mutex;
750 int i2c_current_channel;
751 int i2c_current_bus;
752 spinlock_t cmd_lock;
753
754 struct dvb_adapter adapter[MAX_STREAM];
755 struct ngene_channel channel[MAX_STREAM];
756
757 struct ngene_info *card_info;
758
759 tx_cb_t *TxEventNotify;
760 rx_cb_t *RxEventNotify;
761 int tx_busy;
762 wait_queue_head_t tx_wq;
763 wait_queue_head_t rx_wq;
764#define UART_RBUF_LEN 4096
765 u8 uart_rbuf[UART_RBUF_LEN];
766 int uart_rp, uart_wp;
767
768 u8 *tsout_buf;
769#define TSOUT_BUF_SIZE (512*188*8)
770 struct dvb_ringbuffer tsout_rbuf;
771
772 u8 *ain_buf;
773#define AIN_BUF_SIZE (128*1024)
774 struct dvb_ringbuffer ain_rbuf;
775
776
777 u8 *vin_buf;
778#define VIN_BUF_SIZE (4*1920*1080)
779 struct dvb_ringbuffer vin_rbuf;
780
781 unsigned long exp_val;
782 int prev_cmd;
783};
784
785struct ngene_info {
786 int type;
787#define NGENE_APP 0
788#define NGENE_TERRATEC 1
789#define NGENE_SIDEWINDER 2
790#define NGENE_RACER 3
791#define NGENE_VIPER 4
792#define NGENE_PYTHON 5
793#define NGENE_VBOX_V1 6
794#define NGENE_VBOX_V2 7
795
796 int fw_version;
797 char *name;
798
799 int io_type[MAX_STREAM];
800#define NGENE_IO_NONE 0
801#define NGENE_IO_TV 1
802#define NGENE_IO_HDTV 2
803#define NGENE_IO_TSIN 4
804#define NGENE_IO_TSOUT 8
805#define NGENE_IO_AIN 16
806
807 void *fe_config[4];
808 void *tuner_config[4];
809
810 int (*demod_attach[4])(struct ngene_channel *);
811 int (*tuner_attach[4])(struct ngene_channel *);
812
813 u8 avf[4];
814 u8 msp[4];
815 u8 demoda[4];
816 u8 lnb[4];
817 int i2c_access;
818 u8 ntsc;
819 u8 tsf[4];
820 u8 i2s[4];
821
822 int (*gate_ctrl)(struct dvb_frontend *, int);
823 int (*switch_ctrl)(struct ngene_channel *, int, int);
824};
825
826#ifdef NGENE_V4L
827struct ngene_format{
828 char *name;
829 int fourcc; /* video4linux 2 */
830 int btformat; /* BT848_COLOR_FMT_* */
831 int format;
832 int btswap; /* BT848_COLOR_CTL_* */
833 int depth; /* bit/pixel */
834 int flags;
835 int hshift, vshift; /* for planar modes */
836 int palette;
837};
838
839#define RESOURCE_OVERLAY 1
840#define RESOURCE_VIDEO 2
841#define RESOURCE_VBI 4
842
843struct ngene_buffer {
844 /* common v4l buffer stuff -- must be first */
845 struct videobuf_buffer vb;
846
847 /* ngene specific */
848 const struct ngene_format *fmt;
849 int tvnorm;
850 int btformat;
851 int btswap;
852};
853#endif
854
855
856#endif
857
858/* LocalWords: Endif
859 */
diff --git a/drivers/media/dvb/siano/sms-cards.c b/drivers/media/dvb/siano/sms-cards.c
index 1067b22eb0c6..cff77e2eb557 100644
--- a/drivers/media/dvb/siano/sms-cards.c
+++ b/drivers/media/dvb/siano/sms-cards.c
@@ -62,6 +62,7 @@ static struct sms_board sms_boards[] = {
62 [SMS1XXX_BOARD_HAUPPAUGE_WINDHAM] = { 62 [SMS1XXX_BOARD_HAUPPAUGE_WINDHAM] = {
63 .name = "Hauppauge WinTV MiniStick", 63 .name = "Hauppauge WinTV MiniStick",
64 .type = SMS_NOVA_B0, 64 .type = SMS_NOVA_B0,
65 .fw[DEVICE_MODE_ISDBT_BDA] = "sms1xxx-hcw-55xxx-isdbt-02.fw",
65 .fw[DEVICE_MODE_DVBT_BDA] = "sms1xxx-hcw-55xxx-dvbt-02.fw", 66 .fw[DEVICE_MODE_DVBT_BDA] = "sms1xxx-hcw-55xxx-dvbt-02.fw",
66 .board_cfg.leds_power = 26, 67 .board_cfg.leds_power = 26,
67 .board_cfg.led0 = 27, 68 .board_cfg.led0 = 27,
diff --git a/drivers/media/dvb/siano/smscoreapi.c b/drivers/media/dvb/siano/smscoreapi.c
index ca758bcb48c9..4bfd3451b568 100644
--- a/drivers/media/dvb/siano/smscoreapi.c
+++ b/drivers/media/dvb/siano/smscoreapi.c
@@ -1459,8 +1459,10 @@ int smscore_gpio_configure(struct smscore_device_t *coredev, u8 PinNum,
1459 if (!(coredev->device_flags & SMS_DEVICE_FAMILY2)) { 1459 if (!(coredev->device_flags & SMS_DEVICE_FAMILY2)) {
1460 pMsg->xMsgHeader.msgType = MSG_SMS_GPIO_CONFIG_REQ; 1460 pMsg->xMsgHeader.msgType = MSG_SMS_GPIO_CONFIG_REQ;
1461 if (GetGpioPinParams(PinNum, &TranslatedPinNum, &GroupNum, 1461 if (GetGpioPinParams(PinNum, &TranslatedPinNum, &GroupNum,
1462 &groupCfg) != 0) 1462 &groupCfg) != 0) {
1463 return -EINVAL; 1463 rc = -EINVAL;
1464 goto free;
1465 }
1464 1466
1465 pMsg->msgData[1] = TranslatedPinNum; 1467 pMsg->msgData[1] = TranslatedPinNum;
1466 pMsg->msgData[2] = GroupNum; 1468 pMsg->msgData[2] = GroupNum;
@@ -1490,6 +1492,7 @@ int smscore_gpio_configure(struct smscore_device_t *coredev, u8 PinNum,
1490 else 1492 else
1491 sms_err("smscore_gpio_configure error"); 1493 sms_err("smscore_gpio_configure error");
1492 } 1494 }
1495free:
1493 kfree(buffer); 1496 kfree(buffer);
1494 1497
1495 return rc; 1498 return rc;
diff --git a/drivers/media/dvb/siano/smscoreapi.h b/drivers/media/dvb/siano/smscoreapi.h
index eec18aaf5512..8ecadecaa9d0 100644
--- a/drivers/media/dvb/siano/smscoreapi.h
+++ b/drivers/media/dvb/siano/smscoreapi.h
@@ -212,6 +212,8 @@ struct smscore_device_t {
212#define MSG_SMS_DAB_CHANNEL 607 212#define MSG_SMS_DAB_CHANNEL 607
213#define MSG_SMS_GET_PID_FILTER_LIST_REQ 608 213#define MSG_SMS_GET_PID_FILTER_LIST_REQ 608
214#define MSG_SMS_GET_PID_FILTER_LIST_RES 609 214#define MSG_SMS_GET_PID_FILTER_LIST_RES 609
215#define MSG_SMS_GET_STATISTICS_RES 616
216#define MSG_SMS_GET_STATISTICS_REQ 615
215#define MSG_SMS_HO_PER_SLICES_IND 630 217#define MSG_SMS_HO_PER_SLICES_IND 630
216#define MSG_SMS_SET_ANTENNA_CONFIG_REQ 651 218#define MSG_SMS_SET_ANTENNA_CONFIG_REQ 651
217#define MSG_SMS_SET_ANTENNA_CONFIG_RES 652 219#define MSG_SMS_SET_ANTENNA_CONFIG_RES 652
@@ -339,7 +341,7 @@ struct SmsFirmware_ST {
339 341
340/* Statistics information returned as response for 342/* Statistics information returned as response for
341 * SmsHostApiGetStatistics_Req */ 343 * SmsHostApiGetStatistics_Req */
342struct SMSHOSTLIB_STATISTICS_S { 344struct SMSHOSTLIB_STATISTICS_ST {
343 u32 Reserved; /* Reserved */ 345 u32 Reserved; /* Reserved */
344 346
345 /* Common parameters */ 347 /* Common parameters */
@@ -424,6 +426,79 @@ struct SMSHOSTLIB_STATISTICS_S {
424 u32 ReservedFields[10]; /* Reserved */ 426 u32 ReservedFields[10]; /* Reserved */
425}; 427};
426 428
429struct SmsMsgStatisticsInfo_ST {
430 u32 RequestResult;
431
432 struct SMSHOSTLIB_STATISTICS_ST Stat;
433
434 /* Split the calc of the SNR in DAB */
435 u32 Signal; /* dB */
436 u32 Noise; /* dB */
437
438};
439
440struct SMSHOSTLIB_ISDBT_LAYER_STAT_ST {
441 /* Per-layer information */
442 u32 CodeRate; /* Code Rate from SMSHOSTLIB_CODE_RATE_ET,
443 * 255 means layer does not exist */
444 u32 Constellation; /* Constellation from SMSHOSTLIB_CONSTELLATION_ET,
445 * 255 means layer does not exist */
446 u32 BER; /* Post Viterbi BER [1E-5], 0xFFFFFFFF indicate N/A */
447 u32 BERErrorCount; /* Post Viterbi Error Bits Count */
448 u32 BERBitCount; /* Post Viterbi Total Bits Count */
449 u32 PreBER; /* Pre Viterbi BER [1E-5], 0xFFFFFFFF indicate N/A */
450 u32 TS_PER; /* Transport stream PER [%], 0xFFFFFFFF indicate N/A */
451 u32 ErrorTSPackets; /* Number of erroneous transport-stream packets */
452 u32 TotalTSPackets; /* Total number of transport-stream packets */
453 u32 TILdepthI; /* Time interleaver depth I parameter,
454 * 255 means layer does not exist */
455 u32 NumberOfSegments; /* Number of segments in layer A,
456 * 255 means layer does not exist */
457 u32 TMCCErrors; /* TMCC errors */
458};
459
460struct SMSHOSTLIB_STATISTICS_ISDBT_ST {
461 u32 StatisticsType; /* Enumerator identifying the type of the
462 * structure. Values are the same as
463 * SMSHOSTLIB_DEVICE_MODES_E
464 *
465 * This field MUST always be first in any
466 * statistics structure */
467
468 u32 FullSize; /* Total size of the structure returned by the modem.
469 * If the size requested by the host is smaller than
470 * FullSize, the struct will be truncated */
471
472 /* Common parameters */
473 u32 IsRfLocked; /* 0 - not locked, 1 - locked */
474 u32 IsDemodLocked; /* 0 - not locked, 1 - locked */
475 u32 IsExternalLNAOn; /* 0 - external LNA off, 1 - external LNA on */
476
477 /* Reception quality */
478 s32 SNR; /* dB */
479 s32 RSSI; /* dBm */
480 s32 InBandPwr; /* In band power in dBM */
481 s32 CarrierOffset; /* Carrier Offset in Hz */
482
483 /* Transmission parameters */
484 u32 Frequency; /* Frequency in Hz */
485 u32 Bandwidth; /* Bandwidth in MHz */
486 u32 TransmissionMode; /* ISDB-T transmission mode */
487 u32 ModemState; /* 0 - Acquisition, 1 - Locked */
488 u32 GuardInterval; /* Guard Interval, 1 divided by value */
489 u32 SystemType; /* ISDB-T system type (ISDB-T / ISDB-Tsb) */
490 u32 PartialReception; /* TRUE - partial reception, FALSE otherwise */
491 u32 NumOfLayers; /* Number of ISDB-T layers in the network */
492
493 /* Per-layer information */
494 /* Layers A, B and C */
495 struct SMSHOSTLIB_ISDBT_LAYER_STAT_ST LayerInfo[3];
496 /* Per-layer statistics, see SMSHOSTLIB_ISDBT_LAYER_STAT_ST */
497
498 /* Interface information */
499 u32 SmsToHostTxErrors; /* Total number of transmission errors. */
500};
501
427struct PID_STATISTICS_DATA_S { 502struct PID_STATISTICS_DATA_S {
428 struct PID_BURST_S { 503 struct PID_BURST_S {
429 u32 size; 504 u32 size;
diff --git a/drivers/media/dvb/siano/smsdvb.c b/drivers/media/dvb/siano/smsdvb.c
index 68bf9fbd8fed..5f3939821ca3 100644
--- a/drivers/media/dvb/siano/smsdvb.c
+++ b/drivers/media/dvb/siano/smsdvb.c
@@ -116,6 +116,118 @@ static void sms_board_dvb3_event(struct smsdvb_client_t *client,
116 } 116 }
117} 117}
118 118
119
120static void smsdvb_update_dvb_stats(struct RECEPTION_STATISTICS_S *pReceptionData,
121 struct SMSHOSTLIB_STATISTICS_ST *p)
122{
123 if (sms_dbg & 2) {
124 printk(KERN_DEBUG "Reserved = %d", p->Reserved);
125 printk(KERN_DEBUG "IsRfLocked = %d", p->IsRfLocked);
126 printk(KERN_DEBUG "IsDemodLocked = %d", p->IsDemodLocked);
127 printk(KERN_DEBUG "IsExternalLNAOn = %d", p->IsExternalLNAOn);
128 printk(KERN_DEBUG "SNR = %d", p->SNR);
129 printk(KERN_DEBUG "BER = %d", p->BER);
130 printk(KERN_DEBUG "FIB_CRC = %d", p->FIB_CRC);
131 printk(KERN_DEBUG "TS_PER = %d", p->TS_PER);
132 printk(KERN_DEBUG "MFER = %d", p->MFER);
133 printk(KERN_DEBUG "RSSI = %d", p->RSSI);
134 printk(KERN_DEBUG "InBandPwr = %d", p->InBandPwr);
135 printk(KERN_DEBUG "CarrierOffset = %d", p->CarrierOffset);
136 printk(KERN_DEBUG "Frequency = %d", p->Frequency);
137 printk(KERN_DEBUG "Bandwidth = %d", p->Bandwidth);
138 printk(KERN_DEBUG "TransmissionMode = %d", p->TransmissionMode);
139 printk(KERN_DEBUG "ModemState = %d", p->ModemState);
140 printk(KERN_DEBUG "GuardInterval = %d", p->GuardInterval);
141 printk(KERN_DEBUG "CodeRate = %d", p->CodeRate);
142 printk(KERN_DEBUG "LPCodeRate = %d", p->LPCodeRate);
143 printk(KERN_DEBUG "Hierarchy = %d", p->Hierarchy);
144 printk(KERN_DEBUG "Constellation = %d", p->Constellation);
145 printk(KERN_DEBUG "BurstSize = %d", p->BurstSize);
146 printk(KERN_DEBUG "BurstDuration = %d", p->BurstDuration);
147 printk(KERN_DEBUG "BurstCycleTime = %d", p->BurstCycleTime);
148 printk(KERN_DEBUG "CalculatedBurstCycleTime = %d", p->CalculatedBurstCycleTime);
149 printk(KERN_DEBUG "NumOfRows = %d", p->NumOfRows);
150 printk(KERN_DEBUG "NumOfPaddCols = %d", p->NumOfPaddCols);
151 printk(KERN_DEBUG "NumOfPunctCols = %d", p->NumOfPunctCols);
152 printk(KERN_DEBUG "ErrorTSPackets = %d", p->ErrorTSPackets);
153 printk(KERN_DEBUG "TotalTSPackets = %d", p->TotalTSPackets);
154 printk(KERN_DEBUG "NumOfValidMpeTlbs = %d", p->NumOfValidMpeTlbs);
155 printk(KERN_DEBUG "NumOfInvalidMpeTlbs = %d", p->NumOfInvalidMpeTlbs);
156 printk(KERN_DEBUG "NumOfCorrectedMpeTlbs = %d", p->NumOfCorrectedMpeTlbs);
157 printk(KERN_DEBUG "BERErrorCount = %d", p->BERErrorCount);
158 printk(KERN_DEBUG "BERBitCount = %d", p->BERBitCount);
159 printk(KERN_DEBUG "SmsToHostTxErrors = %d", p->SmsToHostTxErrors);
160 printk(KERN_DEBUG "PreBER = %d", p->PreBER);
161 printk(KERN_DEBUG "CellId = %d", p->CellId);
162 printk(KERN_DEBUG "DvbhSrvIndHP = %d", p->DvbhSrvIndHP);
163 printk(KERN_DEBUG "DvbhSrvIndLP = %d", p->DvbhSrvIndLP);
164 printk(KERN_DEBUG "NumMPEReceived = %d", p->NumMPEReceived);
165 }
166
167 pReceptionData->IsDemodLocked = p->IsDemodLocked;
168
169 pReceptionData->SNR = p->SNR;
170 pReceptionData->BER = p->BER;
171 pReceptionData->BERErrorCount = p->BERErrorCount;
172 pReceptionData->InBandPwr = p->InBandPwr;
173 pReceptionData->ErrorTSPackets = p->ErrorTSPackets;
174};
175
176
177static void smsdvb_update_isdbt_stats(struct RECEPTION_STATISTICS_S *pReceptionData,
178 struct SMSHOSTLIB_STATISTICS_ISDBT_ST *p)
179{
180 int i;
181
182 if (sms_dbg & 2) {
183 printk(KERN_DEBUG "IsRfLocked = %d", p->IsRfLocked);
184 printk(KERN_DEBUG "IsDemodLocked = %d", p->IsDemodLocked);
185 printk(KERN_DEBUG "IsExternalLNAOn = %d", p->IsExternalLNAOn);
186 printk(KERN_DEBUG "SNR = %d", p->SNR);
187 printk(KERN_DEBUG "RSSI = %d", p->RSSI);
188 printk(KERN_DEBUG "InBandPwr = %d", p->InBandPwr);
189 printk(KERN_DEBUG "CarrierOffset = %d", p->CarrierOffset);
190 printk(KERN_DEBUG "Frequency = %d", p->Frequency);
191 printk(KERN_DEBUG "Bandwidth = %d", p->Bandwidth);
192 printk(KERN_DEBUG "TransmissionMode = %d", p->TransmissionMode);
193 printk(KERN_DEBUG "ModemState = %d", p->ModemState);
194 printk(KERN_DEBUG "GuardInterval = %d", p->GuardInterval);
195 printk(KERN_DEBUG "SystemType = %d", p->SystemType);
196 printk(KERN_DEBUG "PartialReception = %d", p->PartialReception);
197 printk(KERN_DEBUG "NumOfLayers = %d", p->NumOfLayers);
198 printk(KERN_DEBUG "SmsToHostTxErrors = %d", p->SmsToHostTxErrors);
199
200 for (i = 0; i < 3; i++) {
201 printk(KERN_DEBUG "%d: CodeRate = %d", i, p->LayerInfo[i].CodeRate);
202 printk(KERN_DEBUG "%d: Constellation = %d", i, p->LayerInfo[i].Constellation);
203 printk(KERN_DEBUG "%d: BER = %d", i, p->LayerInfo[i].BER);
204 printk(KERN_DEBUG "%d: BERErrorCount = %d", i, p->LayerInfo[i].BERErrorCount);
205 printk(KERN_DEBUG "%d: BERBitCount = %d", i, p->LayerInfo[i].BERBitCount);
206 printk(KERN_DEBUG "%d: PreBER = %d", i, p->LayerInfo[i].PreBER);
207 printk(KERN_DEBUG "%d: TS_PER = %d", i, p->LayerInfo[i].TS_PER);
208 printk(KERN_DEBUG "%d: ErrorTSPackets = %d", i, p->LayerInfo[i].ErrorTSPackets);
209 printk(KERN_DEBUG "%d: TotalTSPackets = %d", i, p->LayerInfo[i].TotalTSPackets);
210 printk(KERN_DEBUG "%d: TILdepthI = %d", i, p->LayerInfo[i].TILdepthI);
211 printk(KERN_DEBUG "%d: NumberOfSegments = %d", i, p->LayerInfo[i].NumberOfSegments);
212 printk(KERN_DEBUG "%d: TMCCErrors = %d", i, p->LayerInfo[i].TMCCErrors);
213 }
214 }
215
216 pReceptionData->IsDemodLocked = p->IsDemodLocked;
217
218 pReceptionData->SNR = p->SNR;
219 pReceptionData->InBandPwr = p->InBandPwr;
220
221 pReceptionData->ErrorTSPackets = 0;
222 pReceptionData->BER = 0;
223 pReceptionData->BERErrorCount = 0;
224 for (i = 0; i < 3; i++) {
225 pReceptionData->BER += p->LayerInfo[i].BER;
226 pReceptionData->BERErrorCount += p->LayerInfo[i].BERErrorCount;
227 pReceptionData->ErrorTSPackets += p->LayerInfo[i].ErrorTSPackets;
228 }
229}
230
119static int smsdvb_onresponse(void *context, struct smscore_buffer_t *cb) 231static int smsdvb_onresponse(void *context, struct smscore_buffer_t *cb)
120{ 232{
121 struct smsdvb_client_t *client = (struct smsdvb_client_t *) context; 233 struct smsdvb_client_t *client = (struct smsdvb_client_t *) context;
@@ -134,6 +246,7 @@ static int smsdvb_onresponse(void *context, struct smscore_buffer_t *cb)
134 break; 246 break;
135 247
136 case MSG_SMS_RF_TUNE_RES: 248 case MSG_SMS_RF_TUNE_RES:
249 case MSG_SMS_ISDBT_TUNE_RES:
137 complete(&client->tune_done); 250 complete(&client->tune_done);
138 break; 251 break;
139 252
@@ -217,6 +330,40 @@ static int smsdvb_onresponse(void *context, struct smscore_buffer_t *cb)
217 is_status_update = true; 330 is_status_update = true;
218 break; 331 break;
219 } 332 }
333 case MSG_SMS_GET_STATISTICS_RES: {
334 union {
335 struct SMSHOSTLIB_STATISTICS_ISDBT_ST isdbt;
336 struct SmsMsgStatisticsInfo_ST dvb;
337 } *p = (void *) (phdr + 1);
338 struct RECEPTION_STATISTICS_S *pReceptionData =
339 &client->sms_stat_dvb.ReceptionData;
340
341 sms_info("MSG_SMS_GET_STATISTICS_RES");
342
343 is_status_update = true;
344
345 switch (smscore_get_device_mode(client->coredev)) {
346 case DEVICE_MODE_ISDBT:
347 case DEVICE_MODE_ISDBT_BDA:
348 smsdvb_update_isdbt_stats(pReceptionData, &p->isdbt);
349 break;
350 default:
351 smsdvb_update_dvb_stats(pReceptionData, &p->dvb.Stat);
352 }
353 if (!pReceptionData->IsDemodLocked) {
354 pReceptionData->SNR = 0;
355 pReceptionData->BER = 0;
356 pReceptionData->BERErrorCount = 0;
357 pReceptionData->InBandPwr = 0;
358 pReceptionData->ErrorTSPackets = 0;
359 }
360
361 complete(&client->tune_done);
362 break;
363 }
364 default:
365 sms_info("Unhandled message %d", phdr->msgType);
366
220 } 367 }
221 smscore_putbuffer(client->coredev, cb); 368 smscore_putbuffer(client->coredev, cb);
222 369
@@ -233,10 +380,10 @@ static int smsdvb_onresponse(void *context, struct smscore_buffer_t *cb)
233 DVB3_EVENT_UNC_ERR); 380 DVB3_EVENT_UNC_ERR);
234 381
235 } else { 382 } else {
236 /*client->fe_status = 383 if (client->sms_stat_dvb.ReceptionData.IsRfLocked)
237 (phdr->msgType == MSG_SMS_NO_SIGNAL_IND) ? 384 client->fe_status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
238 0 : FE_HAS_SIGNAL;*/ 385 else
239 client->fe_status = 0; 386 client->fe_status = 0;
240 sms_board_dvb3_event(client, DVB3_EVENT_FE_UNLOCK); 387 sms_board_dvb3_event(client, DVB3_EVENT_FE_UNLOCK);
241 } 388 }
242 } 389 }
@@ -325,6 +472,20 @@ static int smsdvb_sendrequest_and_wait(struct smsdvb_client_t *client,
325 0 : -ETIME; 472 0 : -ETIME;
326} 473}
327 474
475static int smsdvb_send_statistics_request(struct smsdvb_client_t *client)
476{
477 int rc;
478 struct SmsMsgHdr_ST Msg = { MSG_SMS_GET_STATISTICS_REQ,
479 DVBT_BDA_CONTROL_MSG_ID,
480 HIF_TASK,
481 sizeof(struct SmsMsgHdr_ST), 0 };
482
483 rc = smsdvb_sendrequest_and_wait(client, &Msg, sizeof(Msg),
484 &client->tune_done);
485
486 return rc;
487}
488
328static inline int led_feedback(struct smsdvb_client_t *client) 489static inline int led_feedback(struct smsdvb_client_t *client)
329{ 490{
330 if (client->fe_status & FE_HAS_LOCK) 491 if (client->fe_status & FE_HAS_LOCK)
@@ -337,33 +498,43 @@ static inline int led_feedback(struct smsdvb_client_t *client)
337 498
338static int smsdvb_read_status(struct dvb_frontend *fe, fe_status_t *stat) 499static int smsdvb_read_status(struct dvb_frontend *fe, fe_status_t *stat)
339{ 500{
501 int rc;
340 struct smsdvb_client_t *client; 502 struct smsdvb_client_t *client;
341 client = container_of(fe, struct smsdvb_client_t, frontend); 503 client = container_of(fe, struct smsdvb_client_t, frontend);
342 504
505 rc = smsdvb_send_statistics_request(client);
506
343 *stat = client->fe_status; 507 *stat = client->fe_status;
344 508
345 led_feedback(client); 509 led_feedback(client);
346 510
347 return 0; 511 return rc;
348} 512}
349 513
350static int smsdvb_read_ber(struct dvb_frontend *fe, u32 *ber) 514static int smsdvb_read_ber(struct dvb_frontend *fe, u32 *ber)
351{ 515{
516 int rc;
352 struct smsdvb_client_t *client; 517 struct smsdvb_client_t *client;
353 client = container_of(fe, struct smsdvb_client_t, frontend); 518 client = container_of(fe, struct smsdvb_client_t, frontend);
354 519
520 rc = smsdvb_send_statistics_request(client);
521
355 *ber = client->sms_stat_dvb.ReceptionData.BER; 522 *ber = client->sms_stat_dvb.ReceptionData.BER;
356 523
357 led_feedback(client); 524 led_feedback(client);
358 525
359 return 0; 526 return rc;
360} 527}
361 528
362static int smsdvb_read_signal_strength(struct dvb_frontend *fe, u16 *strength) 529static int smsdvb_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
363{ 530{
531 int rc;
532
364 struct smsdvb_client_t *client; 533 struct smsdvb_client_t *client;
365 client = container_of(fe, struct smsdvb_client_t, frontend); 534 client = container_of(fe, struct smsdvb_client_t, frontend);
366 535
536 rc = smsdvb_send_statistics_request(client);
537
367 if (client->sms_stat_dvb.ReceptionData.InBandPwr < -95) 538 if (client->sms_stat_dvb.ReceptionData.InBandPwr < -95)
368 *strength = 0; 539 *strength = 0;
369 else if (client->sms_stat_dvb.ReceptionData.InBandPwr > -29) 540 else if (client->sms_stat_dvb.ReceptionData.InBandPwr > -29)
@@ -375,31 +546,37 @@ static int smsdvb_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
375 546
376 led_feedback(client); 547 led_feedback(client);
377 548
378 return 0; 549 return rc;
379} 550}
380 551
381static int smsdvb_read_snr(struct dvb_frontend *fe, u16 *snr) 552static int smsdvb_read_snr(struct dvb_frontend *fe, u16 *snr)
382{ 553{
554 int rc;
383 struct smsdvb_client_t *client; 555 struct smsdvb_client_t *client;
384 client = container_of(fe, struct smsdvb_client_t, frontend); 556 client = container_of(fe, struct smsdvb_client_t, frontend);
385 557
558 rc = smsdvb_send_statistics_request(client);
559
386 *snr = client->sms_stat_dvb.ReceptionData.SNR; 560 *snr = client->sms_stat_dvb.ReceptionData.SNR;
387 561
388 led_feedback(client); 562 led_feedback(client);
389 563
390 return 0; 564 return rc;
391} 565}
392 566
393static int smsdvb_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 567static int smsdvb_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
394{ 568{
569 int rc;
395 struct smsdvb_client_t *client; 570 struct smsdvb_client_t *client;
396 client = container_of(fe, struct smsdvb_client_t, frontend); 571 client = container_of(fe, struct smsdvb_client_t, frontend);
397 572
573 rc = smsdvb_send_statistics_request(client);
574
398 *ucblocks = client->sms_stat_dvb.ReceptionData.ErrorTSPackets; 575 *ucblocks = client->sms_stat_dvb.ReceptionData.ErrorTSPackets;
399 576
400 led_feedback(client); 577 led_feedback(client);
401 578
402 return 0; 579 return rc;
403} 580}
404 581
405static int smsdvb_get_tune_settings(struct dvb_frontend *fe, 582static int smsdvb_get_tune_settings(struct dvb_frontend *fe,
@@ -413,9 +590,10 @@ static int smsdvb_get_tune_settings(struct dvb_frontend *fe,
413 return 0; 590 return 0;
414} 591}
415 592
416static int smsdvb_set_frontend(struct dvb_frontend *fe, 593static int smsdvb_dvbt_set_frontend(struct dvb_frontend *fe,
417 struct dvb_frontend_parameters *fep) 594 struct dvb_frontend_parameters *p)
418{ 595{
596 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
419 struct smsdvb_client_t *client = 597 struct smsdvb_client_t *client =
420 container_of(fe, struct smsdvb_client_t, frontend); 598 container_of(fe, struct smsdvb_client_t, frontend);
421 599
@@ -429,24 +607,33 @@ static int smsdvb_set_frontend(struct dvb_frontend *fe,
429 client->fe_status = FE_HAS_SIGNAL; 607 client->fe_status = FE_HAS_SIGNAL;
430 client->event_fe_state = -1; 608 client->event_fe_state = -1;
431 client->event_unc_state = -1; 609 client->event_unc_state = -1;
610 fe->dtv_property_cache.delivery_system = SYS_DVBT;
432 611
433 Msg.Msg.msgSrcId = DVBT_BDA_CONTROL_MSG_ID; 612 Msg.Msg.msgSrcId = DVBT_BDA_CONTROL_MSG_ID;
434 Msg.Msg.msgDstId = HIF_TASK; 613 Msg.Msg.msgDstId = HIF_TASK;
435 Msg.Msg.msgFlags = 0; 614 Msg.Msg.msgFlags = 0;
436 Msg.Msg.msgType = MSG_SMS_RF_TUNE_REQ; 615 Msg.Msg.msgType = MSG_SMS_RF_TUNE_REQ;
437 Msg.Msg.msgLength = sizeof(Msg); 616 Msg.Msg.msgLength = sizeof(Msg);
438 Msg.Data[0] = fep->frequency; 617 Msg.Data[0] = c->frequency;
439 Msg.Data[2] = 12000000; 618 Msg.Data[2] = 12000000;
440 619
441 sms_debug("freq %d band %d", 620 sms_info("%s: freq %d band %d", __func__, c->frequency,
442 fep->frequency, fep->u.ofdm.bandwidth); 621 c->bandwidth_hz);
443 622
444 switch (fep->u.ofdm.bandwidth) { 623 switch (c->bandwidth_hz / 1000000) {
445 case BANDWIDTH_8_MHZ: Msg.Data[1] = BW_8_MHZ; break; 624 case 8:
446 case BANDWIDTH_7_MHZ: Msg.Data[1] = BW_7_MHZ; break; 625 Msg.Data[1] = BW_8_MHZ;
447 case BANDWIDTH_6_MHZ: Msg.Data[1] = BW_6_MHZ; break; 626 break;
448 case BANDWIDTH_AUTO: return -EOPNOTSUPP; 627 case 7:
449 default: return -EINVAL; 628 Msg.Data[1] = BW_7_MHZ;
629 break;
630 case 6:
631 Msg.Data[1] = BW_6_MHZ;
632 break;
633 case 0:
634 return -EOPNOTSUPP;
635 default:
636 return -EINVAL;
450 } 637 }
451 /* Disable LNA, if any. An error is returned if no LNA is present */ 638 /* Disable LNA, if any. An error is returned if no LNA is present */
452 ret = sms_board_lna_control(client->coredev, 0); 639 ret = sms_board_lna_control(client->coredev, 0);
@@ -470,6 +657,90 @@ static int smsdvb_set_frontend(struct dvb_frontend *fe,
470 &client->tune_done); 657 &client->tune_done);
471} 658}
472 659
660static int smsdvb_isdbt_set_frontend(struct dvb_frontend *fe,
661 struct dvb_frontend_parameters *p)
662{
663 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
664 struct smsdvb_client_t *client =
665 container_of(fe, struct smsdvb_client_t, frontend);
666
667 struct {
668 struct SmsMsgHdr_ST Msg;
669 u32 Data[4];
670 } Msg;
671
672 fe->dtv_property_cache.delivery_system = SYS_ISDBT;
673
674 Msg.Msg.msgSrcId = DVBT_BDA_CONTROL_MSG_ID;
675 Msg.Msg.msgDstId = HIF_TASK;
676 Msg.Msg.msgFlags = 0;
677 Msg.Msg.msgType = MSG_SMS_ISDBT_TUNE_REQ;
678 Msg.Msg.msgLength = sizeof(Msg);
679
680 if (c->isdbt_sb_segment_idx == -1)
681 c->isdbt_sb_segment_idx = 0;
682
683 switch (c->isdbt_sb_segment_count) {
684 case 3:
685 Msg.Data[1] = BW_ISDBT_3SEG;
686 break;
687 case 1:
688 Msg.Data[1] = BW_ISDBT_1SEG;
689 break;
690 case 0: /* AUTO */
691 switch (c->bandwidth_hz / 1000000) {
692 case 8:
693 case 7:
694 c->isdbt_sb_segment_count = 3;
695 Msg.Data[1] = BW_ISDBT_3SEG;
696 break;
697 case 6:
698 c->isdbt_sb_segment_count = 1;
699 Msg.Data[1] = BW_ISDBT_1SEG;
700 break;
701 default: /* Assumes 6 MHZ bw */
702 c->isdbt_sb_segment_count = 1;
703 c->bandwidth_hz = 6000;
704 Msg.Data[1] = BW_ISDBT_1SEG;
705 break;
706 }
707 break;
708 default:
709 sms_info("Segment count %d not supported", c->isdbt_sb_segment_count);
710 return -EINVAL;
711 }
712
713 Msg.Data[0] = c->frequency;
714 Msg.Data[2] = 12000000;
715 Msg.Data[3] = c->isdbt_sb_segment_idx;
716
717 sms_info("%s: freq %d segwidth %d segindex %d\n", __func__,
718 c->frequency, c->isdbt_sb_segment_count,
719 c->isdbt_sb_segment_idx);
720
721 return smsdvb_sendrequest_and_wait(client, &Msg, sizeof(Msg),
722 &client->tune_done);
723}
724
725static int smsdvb_set_frontend(struct dvb_frontend *fe,
726 struct dvb_frontend_parameters *fep)
727{
728 struct smsdvb_client_t *client =
729 container_of(fe, struct smsdvb_client_t, frontend);
730 struct smscore_device_t *coredev = client->coredev;
731
732 switch (smscore_get_device_mode(coredev)) {
733 case DEVICE_MODE_DVBT:
734 case DEVICE_MODE_DVBT_BDA:
735 return smsdvb_dvbt_set_frontend(fe, fep);
736 case DEVICE_MODE_ISDBT:
737 case DEVICE_MODE_ISDBT_BDA:
738 return smsdvb_isdbt_set_frontend(fe, fep);
739 default:
740 return -EINVAL;
741 }
742}
743
473static int smsdvb_get_frontend(struct dvb_frontend *fe, 744static int smsdvb_get_frontend(struct dvb_frontend *fe,
474 struct dvb_frontend_parameters *fep) 745 struct dvb_frontend_parameters *fep)
475{ 746{
@@ -557,13 +828,6 @@ static int smsdvb_hotplug(struct smscore_device_t *coredev,
557 /* device removal handled by onremove callback */ 828 /* device removal handled by onremove callback */
558 if (!arrival) 829 if (!arrival)
559 return 0; 830 return 0;
560
561 if (smscore_get_device_mode(coredev) != DEVICE_MODE_DVBT_BDA) {
562 sms_err("SMS Device mode is not set for "
563 "DVB operation.");
564 return 0;
565 }
566
567 client = kzalloc(sizeof(struct smsdvb_client_t), GFP_KERNEL); 831 client = kzalloc(sizeof(struct smsdvb_client_t), GFP_KERNEL);
568 if (!client) { 832 if (!client) {
569 sms_err("kmalloc() failed"); 833 sms_err("kmalloc() failed");
diff --git a/drivers/media/dvb/siano/smsir.c b/drivers/media/dvb/siano/smsir.c
index e3d776feeaca..a56eac76e0f0 100644
--- a/drivers/media/dvb/siano/smsir.c
+++ b/drivers/media/dvb/siano/smsir.c
@@ -85,9 +85,9 @@ static struct keyboard_layout_map_t keyboard_layout_maps[] = {
85 { } /* Terminating entry */ 85 { } /* Terminating entry */
86}; 86};
87 87
88u32 ir_pos; 88static u32 ir_pos;
89u32 ir_word; 89static u32 ir_word;
90u32 ir_toggle; 90static u32 ir_toggle;
91 91
92#define RC5_PUSH_BIT(dst, bit, pos) \ 92#define RC5_PUSH_BIT(dst, bit, pos) \
93 { dst <<= 1; dst |= bit; pos++; } 93 { dst <<= 1; dst |= bit; pos++; }
diff --git a/drivers/media/dvb/ttpci/av7110_ir.c b/drivers/media/dvb/ttpci/av7110_ir.c
index 23a1c6380d3f..b070e88d8c6b 100644
--- a/drivers/media/dvb/ttpci/av7110_ir.c
+++ b/drivers/media/dvb/ttpci/av7110_ir.c
@@ -268,8 +268,8 @@ int av7110_check_ir_config(struct av7110 *av7110, int force)
268 268
269 269
270/* /proc/av7110_ir interface */ 270/* /proc/av7110_ir interface */
271static int av7110_ir_write_proc(struct file *file, const char __user *buffer, 271static ssize_t av7110_ir_proc_write(struct file *file, const char __user *buffer,
272 unsigned long count, void *data) 272 size_t count, loff_t *pos)
273{ 273{
274 char *page; 274 char *page;
275 u32 ir_config; 275 u32 ir_config;
@@ -309,6 +309,10 @@ static int av7110_ir_write_proc(struct file *file, const char __user *buffer,
309 return count; 309 return count;
310} 310}
311 311
312static const struct file_operations av7110_ir_proc_fops = {
313 .owner = THIS_MODULE,
314 .write = av7110_ir_proc_write,
315};
312 316
313/* interrupt handler */ 317/* interrupt handler */
314static void ir_handler(struct av7110 *av7110, u32 ircom) 318static void ir_handler(struct av7110 *av7110, u32 ircom)
@@ -368,11 +372,9 @@ int __devinit av7110_ir_init(struct av7110 *av7110)
368 input_dev->timer.data = (unsigned long) &av7110->ir; 372 input_dev->timer.data = (unsigned long) &av7110->ir;
369 373
370 if (av_cnt == 1) { 374 if (av_cnt == 1) {
371 e = create_proc_entry("av7110_ir", S_IFREG | S_IRUGO | S_IWUSR, NULL); 375 e = proc_create("av7110_ir", S_IWUSR, NULL, &av7110_ir_proc_fops);
372 if (e) { 376 if (e)
373 e->write_proc = av7110_ir_write_proc;
374 e->size = 4 + 256 * sizeof(u16); 377 e->size = 4 + 256 * sizeof(u16);
375 }
376 } 378 }
377 379
378 tasklet_init(&av7110->ir.ir_tasklet, av7110_emit_key, (unsigned long) &av7110->ir); 380 tasklet_init(&av7110->ir.ir_tasklet, av7110_emit_key, (unsigned long) &av7110->ir);
diff --git a/drivers/media/dvb/ttpci/budget-ci.c b/drivers/media/dvb/ttpci/budget-ci.c
index 9782e0593733..49c2a817a06f 100644
--- a/drivers/media/dvb/ttpci/budget-ci.c
+++ b/drivers/media/dvb/ttpci/budget-ci.c
@@ -254,7 +254,7 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
254 budget_ci->ir.timer_keyup.function = msp430_ir_keyup; 254 budget_ci->ir.timer_keyup.function = msp430_ir_keyup;
255 budget_ci->ir.timer_keyup.data = (unsigned long) &budget_ci->ir; 255 budget_ci->ir.timer_keyup.data = (unsigned long) &budget_ci->ir;
256 budget_ci->ir.last_raw = 0xffff; /* An impossible value */ 256 budget_ci->ir.last_raw = 0xffff; /* An impossible value */
257 error = ir_input_register(input_dev, ir_codes); 257 error = ir_input_register(input_dev, ir_codes, NULL);
258 if (error) { 258 if (error) {
259 printk(KERN_ERR "budget_ci: could not init driver for IR device (code %d)\n", error); 259 printk(KERN_ERR "budget_ci: could not init driver for IR device (code %d)\n", error);
260 return error; 260 return error;
diff --git a/drivers/media/dvb/ttpci/budget.c b/drivers/media/dvb/ttpci/budget.c
index e48380c48990..9fdf26cc6998 100644
--- a/drivers/media/dvb/ttpci/budget.c
+++ b/drivers/media/dvb/ttpci/budget.c
@@ -433,9 +433,8 @@ static struct stv090x_config tt1600_stv090x_config = {
433 .demod_mode = STV090x_SINGLE, 433 .demod_mode = STV090x_SINGLE,
434 .clk_mode = STV090x_CLK_EXT, 434 .clk_mode = STV090x_CLK_EXT,
435 435
436 .xtal = 27000000, 436 .xtal = 13500000,
437 .address = 0x68, 437 .address = 0x68,
438 .ref_clk = 27000000,
439 438
440 .ts1_mode = STV090x_TSMODE_DVBCI, 439 .ts1_mode = STV090x_TSMODE_DVBCI,
441 .ts2_mode = STV090x_TSMODE_SERIAL_CONTINUOUS, 440 .ts2_mode = STV090x_TSMODE_SERIAL_CONTINUOUS,
@@ -457,6 +456,7 @@ static struct stv090x_config tt1600_stv090x_config = {
457static struct stv6110x_config tt1600_stv6110x_config = { 456static struct stv6110x_config tt1600_stv6110x_config = {
458 .addr = 0x60, 457 .addr = 0x60,
459 .refclk = 27000000, 458 .refclk = 27000000,
459 .clk_div = 2,
460}; 460};
461 461
462static struct isl6423_config tt1600_isl6423_config = { 462static struct isl6423_config tt1600_isl6423_config = {
diff --git a/drivers/media/radio/Kconfig b/drivers/media/radio/Kconfig
index 3f40f375981b..83567b898d09 100644
--- a/drivers/media/radio/Kconfig
+++ b/drivers/media/radio/Kconfig
@@ -417,6 +417,18 @@ config RADIO_TEA5764_XTAL
417 Say Y here if TEA5764 have a 32768 Hz crystal in circuit, say N 417 Say Y here if TEA5764 have a 32768 Hz crystal in circuit, say N
418 here if TEA5764 reference frequency is connected in FREQIN. 418 here if TEA5764 reference frequency is connected in FREQIN.
419 419
420config RADIO_SAA7706H
421 tristate "SAA7706H Car Radio DSP"
422 depends on I2C && VIDEO_V4L2
423 ---help---
424 Say Y here if you want to use the SAA7706H Car radio Digital
425 Signal Processor, found for instance on the Russellville development
426 board. On the russellville the device is connected to internal
427 timberdale I2C bus.
428
429 To compile this driver as a module, choose M here: the
430 module will be called SAA7706H.
431
420config RADIO_TEF6862 432config RADIO_TEF6862
421 tristate "TEF6862 Car Radio Enhanced Selectivity Tuner" 433 tristate "TEF6862 Car Radio Enhanced Selectivity Tuner"
422 depends on I2C && VIDEO_V4L2 434 depends on I2C && VIDEO_V4L2
@@ -429,4 +441,15 @@ config RADIO_TEF6862
429 To compile this driver as a module, choose M here: the 441 To compile this driver as a module, choose M here: the
430 module will be called TEF6862. 442 module will be called TEF6862.
431 443
444config RADIO_TIMBERDALE
445 tristate "Enable the Timberdale radio driver"
446 depends on MFD_TIMBERDALE && VIDEO_V4L2
447 depends on I2C # for RADIO_SAA7706H
448 select RADIO_TEF6862
449 select RADIO_SAA7706H
450 ---help---
451 This is a kind of umbrella driver for the Radio Tuner and DSP
452 found behind the Timberdale FPGA on the Russellville board.
453 Enabling this driver will automatically select the DSP and tuner.
454
432endif # RADIO_ADAPTERS 455endif # RADIO_ADAPTERS
diff --git a/drivers/media/radio/Makefile b/drivers/media/radio/Makefile
index 01922ada6914..f615583b4837 100644
--- a/drivers/media/radio/Makefile
+++ b/drivers/media/radio/Makefile
@@ -23,6 +23,8 @@ obj-$(CONFIG_USB_DSBR) += dsbr100.o
23obj-$(CONFIG_RADIO_SI470X) += si470x/ 23obj-$(CONFIG_RADIO_SI470X) += si470x/
24obj-$(CONFIG_USB_MR800) += radio-mr800.o 24obj-$(CONFIG_USB_MR800) += radio-mr800.o
25obj-$(CONFIG_RADIO_TEA5764) += radio-tea5764.o 25obj-$(CONFIG_RADIO_TEA5764) += radio-tea5764.o
26obj-$(CONFIG_RADIO_SAA7706H) += saa7706h.o
26obj-$(CONFIG_RADIO_TEF6862) += tef6862.o 27obj-$(CONFIG_RADIO_TEF6862) += tef6862.o
28obj-$(CONFIG_RADIO_TIMBERDALE) += radio-timb.o
27 29
28EXTRA_CFLAGS += -Isound 30EXTRA_CFLAGS += -Isound
diff --git a/drivers/media/radio/radio-timb.c b/drivers/media/radio/radio-timb.c
new file mode 100644
index 000000000000..0de457f6e6eb
--- /dev/null
+++ b/drivers/media/radio/radio-timb.c
@@ -0,0 +1,244 @@
1/*
2 * radio-timb.c Timberdale FPGA Radio driver
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#include <linux/version.h>
20#include <linux/io.h>
21#include <media/v4l2-ioctl.h>
22#include <media/v4l2-device.h>
23#include <linux/platform_device.h>
24#include <linux/interrupt.h>
25#include <linux/i2c.h>
26#include <media/timb_radio.h>
27
28#define DRIVER_NAME "timb-radio"
29
30struct timbradio {
31 struct timb_radio_platform_data pdata;
32 struct v4l2_subdev *sd_tuner;
33 struct v4l2_subdev *sd_dsp;
34 struct video_device video_dev;
35 struct v4l2_device v4l2_dev;
36};
37
38
39static int timbradio_vidioc_querycap(struct file *file, void *priv,
40 struct v4l2_capability *v)
41{
42 strlcpy(v->driver, DRIVER_NAME, sizeof(v->driver));
43 strlcpy(v->card, "Timberdale Radio", sizeof(v->card));
44 snprintf(v->bus_info, sizeof(v->bus_info), "platform:"DRIVER_NAME);
45 v->version = KERNEL_VERSION(0, 0, 1);
46 v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO;
47 return 0;
48}
49
50static int timbradio_vidioc_g_tuner(struct file *file, void *priv,
51 struct v4l2_tuner *v)
52{
53 struct timbradio *tr = video_drvdata(file);
54 return v4l2_subdev_call(tr->sd_tuner, tuner, g_tuner, v);
55}
56
57static int timbradio_vidioc_s_tuner(struct file *file, void *priv,
58 struct v4l2_tuner *v)
59{
60 struct timbradio *tr = video_drvdata(file);
61 return v4l2_subdev_call(tr->sd_tuner, tuner, s_tuner, v);
62}
63
64static int timbradio_vidioc_g_input(struct file *filp, void *priv,
65 unsigned int *i)
66{
67 *i = 0;
68 return 0;
69}
70
71static int timbradio_vidioc_s_input(struct file *filp, void *priv,
72 unsigned int i)
73{
74 return i ? -EINVAL : 0;
75}
76
77static int timbradio_vidioc_g_audio(struct file *file, void *priv,
78 struct v4l2_audio *a)
79{
80 a->index = 0;
81 strlcpy(a->name, "Radio", sizeof(a->name));
82 a->capability = V4L2_AUDCAP_STEREO;
83 return 0;
84}
85
86static int timbradio_vidioc_s_audio(struct file *file, void *priv,
87 struct v4l2_audio *a)
88{
89 return a->index ? -EINVAL : 0;
90}
91
92static int timbradio_vidioc_s_frequency(struct file *file, void *priv,
93 struct v4l2_frequency *f)
94{
95 struct timbradio *tr = video_drvdata(file);
96 return v4l2_subdev_call(tr->sd_tuner, tuner, s_frequency, f);
97}
98
99static int timbradio_vidioc_g_frequency(struct file *file, void *priv,
100 struct v4l2_frequency *f)
101{
102 struct timbradio *tr = video_drvdata(file);
103 return v4l2_subdev_call(tr->sd_tuner, tuner, g_frequency, f);
104}
105
106static int timbradio_vidioc_queryctrl(struct file *file, void *priv,
107 struct v4l2_queryctrl *qc)
108{
109 struct timbradio *tr = video_drvdata(file);
110 return v4l2_subdev_call(tr->sd_dsp, core, queryctrl, qc);
111}
112
113static int timbradio_vidioc_g_ctrl(struct file *file, void *priv,
114 struct v4l2_control *ctrl)
115{
116 struct timbradio *tr = video_drvdata(file);
117 return v4l2_subdev_call(tr->sd_dsp, core, g_ctrl, ctrl);
118}
119
120static int timbradio_vidioc_s_ctrl(struct file *file, void *priv,
121 struct v4l2_control *ctrl)
122{
123 struct timbradio *tr = video_drvdata(file);
124 return v4l2_subdev_call(tr->sd_dsp, core, s_ctrl, ctrl);
125}
126
127static const struct v4l2_ioctl_ops timbradio_ioctl_ops = {
128 .vidioc_querycap = timbradio_vidioc_querycap,
129 .vidioc_g_tuner = timbradio_vidioc_g_tuner,
130 .vidioc_s_tuner = timbradio_vidioc_s_tuner,
131 .vidioc_g_frequency = timbradio_vidioc_g_frequency,
132 .vidioc_s_frequency = timbradio_vidioc_s_frequency,
133 .vidioc_g_input = timbradio_vidioc_g_input,
134 .vidioc_s_input = timbradio_vidioc_s_input,
135 .vidioc_g_audio = timbradio_vidioc_g_audio,
136 .vidioc_s_audio = timbradio_vidioc_s_audio,
137 .vidioc_queryctrl = timbradio_vidioc_queryctrl,
138 .vidioc_g_ctrl = timbradio_vidioc_g_ctrl,
139 .vidioc_s_ctrl = timbradio_vidioc_s_ctrl
140};
141
142static const struct v4l2_file_operations timbradio_fops = {
143 .owner = THIS_MODULE,
144 .ioctl = video_ioctl2,
145};
146
147static int __devinit timbradio_probe(struct platform_device *pdev)
148{
149 struct timb_radio_platform_data *pdata = pdev->dev.platform_data;
150 struct timbradio *tr;
151 int err;
152
153 if (!pdata) {
154 dev_err(&pdev->dev, "Platform data missing\n");
155 err = -EINVAL;
156 goto err;
157 }
158
159 tr = kzalloc(sizeof(*tr), GFP_KERNEL);
160 if (!tr) {
161 err = -ENOMEM;
162 goto err;
163 }
164
165 tr->pdata = *pdata;
166
167 strlcpy(tr->video_dev.name, "Timberdale Radio",
168 sizeof(tr->video_dev.name));
169 tr->video_dev.fops = &timbradio_fops;
170 tr->video_dev.ioctl_ops = &timbradio_ioctl_ops;
171 tr->video_dev.release = video_device_release_empty;
172 tr->video_dev.minor = -1;
173
174 strlcpy(tr->v4l2_dev.name, DRIVER_NAME, sizeof(tr->v4l2_dev.name));
175 err = v4l2_device_register(NULL, &tr->v4l2_dev);
176 if (err)
177 goto err_v4l2_dev;
178
179 tr->video_dev.v4l2_dev = &tr->v4l2_dev;
180
181 err = video_register_device(&tr->video_dev, VFL_TYPE_RADIO, -1);
182 if (err) {
183 dev_err(&pdev->dev, "Error reg video\n");
184 goto err_video_req;
185 }
186
187 video_set_drvdata(&tr->video_dev, tr);
188
189 platform_set_drvdata(pdev, tr);
190 return 0;
191
192err_video_req:
193 video_device_release_empty(&tr->video_dev);
194 v4l2_device_unregister(&tr->v4l2_dev);
195err_v4l2_dev:
196 kfree(tr);
197err:
198 dev_err(&pdev->dev, "Failed to register: %d\n", err);
199
200 return err;
201}
202
203static int __devexit timbradio_remove(struct platform_device *pdev)
204{
205 struct timbradio *tr = platform_get_drvdata(pdev);
206
207 video_unregister_device(&tr->video_dev);
208 video_device_release_empty(&tr->video_dev);
209
210 v4l2_device_unregister(&tr->v4l2_dev);
211
212 kfree(tr);
213
214 return 0;
215}
216
217static struct platform_driver timbradio_platform_driver = {
218 .driver = {
219 .name = DRIVER_NAME,
220 .owner = THIS_MODULE,
221 },
222 .probe = timbradio_probe,
223 .remove = timbradio_remove,
224};
225
226/*--------------------------------------------------------------------------*/
227
228static int __init timbradio_init(void)
229{
230 return platform_driver_register(&timbradio_platform_driver);
231}
232
233static void __exit timbradio_exit(void)
234{
235 platform_driver_unregister(&timbradio_platform_driver);
236}
237
238module_init(timbradio_init);
239module_exit(timbradio_exit);
240
241MODULE_DESCRIPTION("Timberdale Radio driver");
242MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
243MODULE_LICENSE("GPL v2");
244MODULE_ALIAS("platform:"DRIVER_NAME);
diff --git a/drivers/media/radio/saa7706h.c b/drivers/media/radio/saa7706h.c
new file mode 100644
index 000000000000..5db5528a8b25
--- /dev/null
+++ b/drivers/media/radio/saa7706h.c
@@ -0,0 +1,451 @@
1/*
2 * saa7706.c Philips SAA7706H Car Radio DSP driver
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/errno.h>
23#include <linux/kernel.h>
24#include <linux/interrupt.h>
25#include <linux/i2c.h>
26#include <media/v4l2-device.h>
27#include <media/v4l2-chip-ident.h>
28
29#define DRIVER_NAME "saa7706h"
30
31/* the I2C memory map looks like this
32
33 $1C00 - $FFFF Not Used
34 $2200 - $3FFF Reserved YRAM (DSP2) space
35 $2000 - $21FF YRAM (DSP2)
36 $1FF0 - $1FFF Hardware Registers
37 $1280 - $1FEF Reserved XRAM (DSP2) space
38 $1000 - $127F XRAM (DSP2)
39 $0FFF DSP CONTROL
40 $0A00 - $0FFE Reserved
41 $0980 - $09FF Reserved YRAM (DSP1) space
42 $0800 - $097F YRAM (DSP1)
43 $0200 - $07FF Not Used
44 $0180 - $01FF Reserved XRAM (DSP1) space
45 $0000 - $017F XRAM (DSP1)
46*/
47
48#define SAA7706H_REG_CTRL 0x0fff
49#define SAA7706H_CTRL_BYP_PLL 0x0001
50#define SAA7706H_CTRL_PLL_DIV_MASK 0x003e
51#define SAA7706H_CTRL_PLL3_62975MHZ 0x003e
52#define SAA7706H_CTRL_DSP_TURBO 0x0040
53#define SAA7706H_CTRL_PC_RESET_DSP1 0x0080
54#define SAA7706H_CTRL_PC_RESET_DSP2 0x0100
55#define SAA7706H_CTRL_DSP1_ROM_EN_MASK 0x0600
56#define SAA7706H_CTRL_DSP1_FUNC_PROM 0x0000
57#define SAA7706H_CTRL_DSP2_ROM_EN_MASK 0x1800
58#define SAA7706H_CTRL_DSP2_FUNC_PROM 0x0000
59#define SAA7706H_CTRL_DIG_SIL_INTERPOL 0x8000
60
61#define SAA7706H_REG_EVALUATION 0x1ff0
62#define SAA7706H_EVAL_DISABLE_CHARGE_PUMP 0x000001
63#define SAA7706H_EVAL_DCS_CLOCK 0x000002
64#define SAA7706H_EVAL_GNDRC1_ENABLE 0x000004
65#define SAA7706H_EVAL_GNDRC2_ENABLE 0x000008
66
67#define SAA7706H_REG_CL_GEN1 0x1ff3
68#define SAA7706H_CL_GEN1_MIN_LOOPGAIN_MASK 0x00000f
69#define SAA7706H_CL_GEN1_LOOPGAIN_MASK 0x0000f0
70#define SAA7706H_CL_GEN1_COARSE_RATION 0xffff00
71
72#define SAA7706H_REG_CL_GEN2 0x1ff4
73#define SAA7706H_CL_GEN2_WSEDGE_FALLING 0x000001
74#define SAA7706H_CL_GEN2_STOP_VCO 0x000002
75#define SAA7706H_CL_GEN2_FRERUN 0x000004
76#define SAA7706H_CL_GEN2_ADAPTIVE 0x000008
77#define SAA7706H_CL_GEN2_FINE_RATIO_MASK 0x0ffff0
78
79#define SAA7706H_REG_CL_GEN4 0x1ff6
80#define SAA7706H_CL_GEN4_BYPASS_PLL1 0x001000
81#define SAA7706H_CL_GEN4_PLL1_DIV_MASK 0x03e000
82#define SAA7706H_CL_GEN4_DSP1_TURBO 0x040000
83
84#define SAA7706H_REG_SEL 0x1ff7
85#define SAA7706H_SEL_DSP2_SRCA_MASK 0x000007
86#define SAA7706H_SEL_DSP2_FMTA_MASK 0x000031
87#define SAA7706H_SEL_DSP2_SRCB_MASK 0x0001c0
88#define SAA7706H_SEL_DSP2_FMTB_MASK 0x000e00
89#define SAA7706H_SEL_DSP1_SRC_MASK 0x003000
90#define SAA7706H_SEL_DSP1_FMT_MASK 0x01c003
91#define SAA7706H_SEL_SPDIF2 0x020000
92#define SAA7706H_SEL_HOST_IO_FMT_MASK 0x1c0000
93#define SAA7706H_SEL_EN_HOST_IO 0x200000
94
95#define SAA7706H_REG_IAC 0x1ff8
96#define SAA7706H_REG_CLK_SET 0x1ff9
97#define SAA7706H_REG_CLK_COEFF 0x1ffa
98#define SAA7706H_REG_INPUT_SENS 0x1ffb
99#define SAA7706H_INPUT_SENS_RDS_VOL_MASK 0x0003f
100#define SAA7706H_INPUT_SENS_FM_VOL_MASK 0x00fc0
101#define SAA7706H_INPUT_SENS_FM_MPX 0x01000
102#define SAA7706H_INPUT_SENS_OFF_FILTER_A_EN 0x02000
103#define SAA7706H_INPUT_SENS_OFF_FILTER_B_EN 0x04000
104#define SAA7706H_REG_PHONE_NAV_AUDIO 0x1ffc
105#define SAA7706H_REG_IO_CONF_DSP2 0x1ffd
106#define SAA7706H_REG_STATUS_DSP2 0x1ffe
107#define SAA7706H_REG_PC_DSP2 0x1fff
108
109#define SAA7706H_DSP1_MOD0 0x0800
110#define SAA7706H_DSP1_ROM_VER 0x097f
111#define SAA7706H_DSP2_MPTR0 0x1000
112
113#define SAA7706H_DSP1_MODPNTR 0x0000
114
115#define SAA7706H_DSP2_XMEM_CONTLLCW 0x113e
116#define SAA7706H_DSP2_XMEM_BUSAMP 0x114a
117#define SAA7706H_DSP2_XMEM_FDACPNTR 0x11f9
118#define SAA7706H_DSP2_XMEM_IIS1PNTR 0x11fb
119
120#define SAA7706H_DSP2_YMEM_PVGA 0x212a
121#define SAA7706H_DSP2_YMEM_PVAT1 0x212b
122#define SAA7706H_DSP2_YMEM_PVAT 0x212c
123#define SAA7706H_DSP2_YMEM_ROM_VER 0x21ff
124
125#define SUPPORTED_DSP1_ROM_VER 0x667
126
127struct saa7706h_state {
128 struct v4l2_subdev sd;
129 unsigned muted;
130};
131
132static inline struct saa7706h_state *to_state(struct v4l2_subdev *sd)
133{
134 return container_of(sd, struct saa7706h_state, sd);
135}
136
137static int saa7706h_i2c_send(struct i2c_client *client, const u8 *data, int len)
138{
139 int err = i2c_master_send(client, data, len);
140 if (err == len)
141 return 0;
142 return err > 0 ? -EIO : err;
143}
144
145static int saa7706h_i2c_transfer(struct i2c_client *client,
146 struct i2c_msg *msgs, int num)
147{
148 int err = i2c_transfer(client->adapter, msgs, num);
149 if (err == num)
150 return 0;
151 return err > 0 ? -EIO : err;
152}
153
154static int saa7706h_set_reg24(struct v4l2_subdev *sd, u16 reg, u32 val)
155{
156 struct i2c_client *client = v4l2_get_subdevdata(sd);
157 u8 buf[5];
158 int pos = 0;
159
160 buf[pos++] = reg >> 8;
161 buf[pos++] = reg;
162 buf[pos++] = val >> 16;
163 buf[pos++] = val >> 8;
164 buf[pos++] = val;
165
166 return saa7706h_i2c_send(client, buf, pos);
167}
168
169static int saa7706h_set_reg24_err(struct v4l2_subdev *sd, u16 reg, u32 val,
170 int *err)
171{
172 return *err ? *err : saa7706h_set_reg24(sd, reg, val);
173}
174
175static int saa7706h_set_reg16(struct v4l2_subdev *sd, u16 reg, u16 val)
176{
177 struct i2c_client *client = v4l2_get_subdevdata(sd);
178 u8 buf[4];
179 int pos = 0;
180
181 buf[pos++] = reg >> 8;
182 buf[pos++] = reg;
183 buf[pos++] = val >> 8;
184 buf[pos++] = val;
185
186 return saa7706h_i2c_send(client, buf, pos);
187}
188
189static int saa7706h_set_reg16_err(struct v4l2_subdev *sd, u16 reg, u16 val,
190 int *err)
191{
192 return *err ? *err : saa7706h_set_reg16(sd, reg, val);
193}
194
195static int saa7706h_get_reg16(struct v4l2_subdev *sd, u16 reg)
196{
197 struct i2c_client *client = v4l2_get_subdevdata(sd);
198 u8 buf[2];
199 int err;
200 u8 regaddr[] = {reg >> 8, reg};
201 struct i2c_msg msg[] = { {client->addr, 0, sizeof(regaddr), regaddr},
202 {client->addr, I2C_M_RD, sizeof(buf), buf} };
203
204 err = saa7706h_i2c_transfer(client, msg, ARRAY_SIZE(msg));
205 if (err)
206 return err;
207
208 return buf[0] << 8 | buf[1];
209}
210
211static int saa7706h_unmute(struct v4l2_subdev *sd)
212{
213 struct saa7706h_state *state = to_state(sd);
214 int err = 0;
215
216 err = saa7706h_set_reg16_err(sd, SAA7706H_REG_CTRL,
217 SAA7706H_CTRL_PLL3_62975MHZ | SAA7706H_CTRL_PC_RESET_DSP1 |
218 SAA7706H_CTRL_PC_RESET_DSP2, &err);
219
220 /* newer versions of the chip requires a small sleep after reset */
221 msleep(1);
222
223 err = saa7706h_set_reg16_err(sd, SAA7706H_REG_CTRL,
224 SAA7706H_CTRL_PLL3_62975MHZ, &err);
225
226 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_EVALUATION, 0, &err);
227
228 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_CL_GEN1, 0x040022, &err);
229
230 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_CL_GEN2,
231 SAA7706H_CL_GEN2_WSEDGE_FALLING, &err);
232
233 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_CL_GEN4, 0x024080, &err);
234
235 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_SEL, 0x200080, &err);
236
237 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_IAC, 0xf4caed, &err);
238
239 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_CLK_SET, 0x124334, &err);
240
241 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_CLK_COEFF, 0x004a1a,
242 &err);
243
244 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_INPUT_SENS, 0x0071c7,
245 &err);
246
247 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_PHONE_NAV_AUDIO,
248 0x0e22ff, &err);
249
250 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_IO_CONF_DSP2, 0x001ff8,
251 &err);
252
253 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_STATUS_DSP2, 0x080003,
254 &err);
255
256 err = saa7706h_set_reg24_err(sd, SAA7706H_REG_PC_DSP2, 0x000004, &err);
257
258 err = saa7706h_set_reg16_err(sd, SAA7706H_DSP1_MOD0, 0x0c6c, &err);
259
260 err = saa7706h_set_reg24_err(sd, SAA7706H_DSP2_MPTR0, 0x000b4b, &err);
261
262 err = saa7706h_set_reg24_err(sd, SAA7706H_DSP1_MODPNTR, 0x000600, &err);
263
264 err = saa7706h_set_reg24_err(sd, SAA7706H_DSP1_MODPNTR, 0x0000c0, &err);
265
266 err = saa7706h_set_reg24_err(sd, SAA7706H_DSP2_XMEM_CONTLLCW, 0x000819,
267 &err);
268
269 err = saa7706h_set_reg24_err(sd, SAA7706H_DSP2_XMEM_CONTLLCW, 0x00085a,
270 &err);
271
272 err = saa7706h_set_reg24_err(sd, SAA7706H_DSP2_XMEM_BUSAMP, 0x7fffff,
273 &err);
274
275 err = saa7706h_set_reg24_err(sd, SAA7706H_DSP2_XMEM_FDACPNTR, 0x2000cb,
276 &err);
277
278 err = saa7706h_set_reg24_err(sd, SAA7706H_DSP2_XMEM_IIS1PNTR, 0x2000cb,
279 &err);
280
281 err = saa7706h_set_reg16_err(sd, SAA7706H_DSP2_YMEM_PVGA, 0x0f80, &err);
282
283 err = saa7706h_set_reg16_err(sd, SAA7706H_DSP2_YMEM_PVAT1, 0x0800,
284 &err);
285
286 err = saa7706h_set_reg16_err(sd, SAA7706H_DSP2_YMEM_PVAT, 0x0800, &err);
287
288 err = saa7706h_set_reg24_err(sd, SAA7706H_DSP2_XMEM_CONTLLCW, 0x000905,
289 &err);
290 if (!err)
291 state->muted = 0;
292 return err;
293}
294
295static int saa7706h_mute(struct v4l2_subdev *sd)
296{
297 struct saa7706h_state *state = to_state(sd);
298 int err;
299
300 err = saa7706h_set_reg16(sd, SAA7706H_REG_CTRL,
301 SAA7706H_CTRL_PLL3_62975MHZ | SAA7706H_CTRL_PC_RESET_DSP1 |
302 SAA7706H_CTRL_PC_RESET_DSP2);
303 if (!err)
304 state->muted = 1;
305 return err;
306}
307
308static int saa7706h_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
309{
310 switch (qc->id) {
311 case V4L2_CID_AUDIO_MUTE:
312 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 1);
313 }
314 return -EINVAL;
315}
316
317static int saa7706h_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
318{
319 struct saa7706h_state *state = to_state(sd);
320
321 switch (ctrl->id) {
322 case V4L2_CID_AUDIO_MUTE:
323 ctrl->value = state->muted;
324 return 0;
325 }
326 return -EINVAL;
327}
328
329static int saa7706h_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
330{
331 switch (ctrl->id) {
332 case V4L2_CID_AUDIO_MUTE:
333 if (ctrl->value)
334 return saa7706h_mute(sd);
335 return saa7706h_unmute(sd);
336 }
337 return -EINVAL;
338}
339
340static int saa7706h_g_chip_ident(struct v4l2_subdev *sd,
341 struct v4l2_dbg_chip_ident *chip)
342{
343 struct i2c_client *client = v4l2_get_subdevdata(sd);
344
345 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_SAA7706H, 0);
346}
347
348static const struct v4l2_subdev_core_ops saa7706h_core_ops = {
349 .g_chip_ident = saa7706h_g_chip_ident,
350 .queryctrl = saa7706h_queryctrl,
351 .g_ctrl = saa7706h_g_ctrl,
352 .s_ctrl = saa7706h_s_ctrl,
353};
354
355static const struct v4l2_subdev_ops saa7706h_ops = {
356 .core = &saa7706h_core_ops,
357};
358
359/*
360 * Generic i2c probe
361 * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
362 */
363
364static int __devinit saa7706h_probe(struct i2c_client *client,
365 const struct i2c_device_id *id)
366{
367 struct saa7706h_state *state;
368 struct v4l2_subdev *sd;
369 int err;
370
371 /* Check if the adapter supports the needed features */
372 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
373 return -EIO;
374
375 v4l_info(client, "chip found @ 0x%02x (%s)\n",
376 client->addr << 1, client->adapter->name);
377
378 state = kmalloc(sizeof(struct saa7706h_state), GFP_KERNEL);
379 if (state == NULL)
380 return -ENOMEM;
381 sd = &state->sd;
382 v4l2_i2c_subdev_init(sd, client, &saa7706h_ops);
383
384 /* check the rom versions */
385 err = saa7706h_get_reg16(sd, SAA7706H_DSP1_ROM_VER);
386 if (err < 0)
387 goto err;
388 if (err != SUPPORTED_DSP1_ROM_VER)
389 v4l2_warn(sd, "Unknown DSP1 ROM code version: 0x%x\n", err);
390
391 state->muted = 1;
392
393 /* startup in a muted state */
394 err = saa7706h_mute(sd);
395 if (err)
396 goto err;
397
398 return 0;
399
400err:
401 v4l2_device_unregister_subdev(sd);
402 kfree(to_state(sd));
403
404 printk(KERN_ERR DRIVER_NAME ": Failed to probe: %d\n", err);
405
406 return err;
407}
408
409static int __devexit saa7706h_remove(struct i2c_client *client)
410{
411 struct v4l2_subdev *sd = i2c_get_clientdata(client);
412
413 saa7706h_mute(sd);
414 v4l2_device_unregister_subdev(sd);
415 kfree(to_state(sd));
416 return 0;
417}
418
419static const struct i2c_device_id saa7706h_id[] = {
420 {DRIVER_NAME, 0},
421 {},
422};
423
424MODULE_DEVICE_TABLE(i2c, saa7706h_id);
425
426static struct i2c_driver saa7706h_driver = {
427 .driver = {
428 .owner = THIS_MODULE,
429 .name = DRIVER_NAME,
430 },
431 .probe = saa7706h_probe,
432 .remove = saa7706h_remove,
433 .id_table = saa7706h_id,
434};
435
436static __init int saa7706h_init(void)
437{
438 return i2c_add_driver(&saa7706h_driver);
439}
440
441static __exit void saa7706h_exit(void)
442{
443 i2c_del_driver(&saa7706h_driver);
444}
445
446module_init(saa7706h_init);
447module_exit(saa7706h_exit);
448
449MODULE_DESCRIPTION("SAA7706H Car Radio DSP driver");
450MODULE_AUTHOR("Mocean Laboratories");
451MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/radio/si470x/radio-si470x-common.c b/drivers/media/radio/si470x/radio-si470x-common.c
index 4da0f150c6e2..47075fc71f11 100644
--- a/drivers/media/radio/si470x/radio-si470x-common.c
+++ b/drivers/media/radio/si470x/radio-si470x-common.c
@@ -724,7 +724,7 @@ static int si470x_vidioc_g_tuner(struct file *file, void *priv,
724 tuner->audmode = V4L2_TUNER_MODE_MONO; 724 tuner->audmode = V4L2_TUNER_MODE_MONO;
725 725
726 /* min is worst, max is best; signal:0..0xffff; rssi: 0..0xff */ 726 /* min is worst, max is best; signal:0..0xffff; rssi: 0..0xff */
727 /* measured in units of db쨉V in 1 db increments (max at ~75 db쨉V) */ 727 /* measured in units of dbµV in 1 db increments (max at ~75 dbµV) */
728 tuner->signal = (radio->registers[STATUSRSSI] & STATUSRSSI_RSSI); 728 tuner->signal = (radio->registers[STATUSRSSI] & STATUSRSSI_RSSI);
729 /* the ideal factor is 0xffff/75 = 873,8 */ 729 /* the ideal factor is 0xffff/75 = 873,8 */
730 tuner->signal = (tuner->signal * 873) + (8 * tuner->signal / 10); 730 tuner->signal = (tuner->signal * 873) + (8 * tuner->signal / 10);
diff --git a/drivers/media/radio/si470x/radio-si470x-usb.c b/drivers/media/radio/si470x/radio-si470x-usb.c
index a96e1b9dd646..6f60841828da 100644
--- a/drivers/media/radio/si470x/radio-si470x-usb.c
+++ b/drivers/media/radio/si470x/radio-si470x-usb.c
@@ -590,8 +590,9 @@ int si470x_fops_release(struct file *file)
590 video_unregister_device(radio->videodev); 590 video_unregister_device(radio->videodev);
591 kfree(radio->int_in_buffer); 591 kfree(radio->int_in_buffer);
592 kfree(radio->buffer); 592 kfree(radio->buffer);
593 mutex_unlock(&radio->disconnect_lock);
593 kfree(radio); 594 kfree(radio);
594 goto unlock; 595 goto done;
595 } 596 }
596 597
597 /* cancel read processes */ 598 /* cancel read processes */
@@ -601,7 +602,6 @@ int si470x_fops_release(struct file *file)
601 retval = si470x_stop(radio); 602 retval = si470x_stop(radio);
602 usb_autopm_put_interface(radio->intf); 603 usb_autopm_put_interface(radio->intf);
603 } 604 }
604unlock:
605 mutex_unlock(&radio->disconnect_lock); 605 mutex_unlock(&radio->disconnect_lock);
606done: 606done:
607 return retval; 607 return retval;
@@ -842,9 +842,11 @@ static void si470x_usb_driver_disconnect(struct usb_interface *intf)
842 kfree(radio->int_in_buffer); 842 kfree(radio->int_in_buffer);
843 video_unregister_device(radio->videodev); 843 video_unregister_device(radio->videodev);
844 kfree(radio->buffer); 844 kfree(radio->buffer);
845 mutex_unlock(&radio->disconnect_lock);
845 kfree(radio); 846 kfree(radio);
847 } else {
848 mutex_unlock(&radio->disconnect_lock);
846 } 849 }
847 mutex_unlock(&radio->disconnect_lock);
848} 850}
849 851
850 852
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index 2f83be766d9f..f8fc8654693d 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -388,6 +388,15 @@ config VIDEO_TVP5150
388 To compile this driver as a module, choose M here: the 388 To compile this driver as a module, choose M here: the
389 module will be called tvp5150. 389 module will be called tvp5150.
390 390
391config VIDEO_TVP7002
392 tristate "Texas Instruments TVP7002 video decoder"
393 depends on VIDEO_V4L2 && I2C
394 ---help---
395 Support for the Texas Instruments TVP7002 video decoder.
396
397 To compile this driver as a module, choose M here: the
398 module will be called tvp7002.
399
391config VIDEO_VPX3220 400config VIDEO_VPX3220
392 tristate "vpx3220a, vpx3216b & vpx3214c video decoders" 401 tristate "vpx3220a, vpx3216b & vpx3214c video decoders"
393 depends on VIDEO_V4L2 && I2C 402 depends on VIDEO_V4L2 && I2C
@@ -548,7 +557,6 @@ config VIDEO_VPSS_SYSTEM
548 depends on ARCH_DAVINCI 557 depends on ARCH_DAVINCI
549 help 558 help
550 Support for vpss system module for video driver 559 Support for vpss system module for video driver
551 default y
552 560
553config VIDEO_VPFE_CAPTURE 561config VIDEO_VPFE_CAPTURE
554 tristate "VPFE Video Capture Driver" 562 tristate "VPFE Video Capture Driver"
@@ -592,6 +600,19 @@ config VIDEO_DM355_CCDC
592 To compile this driver as a module, choose M here: the 600 To compile this driver as a module, choose M here: the
593 module will be called vpfe. 601 module will be called vpfe.
594 602
603config VIDEO_ISIF
604 tristate "ISIF HW module"
605 depends on ARCH_DAVINCI_DM365 && VIDEO_VPFE_CAPTURE
606 select VIDEO_VPSS_SYSTEM
607 default y
608 help
609 Enables ISIF hw module. This is the hardware module for
610 configuring ISIF in VPFE to capture Raw Bayer RGB data from
611 a image sensor or YUV data from a YUV source.
612
613 To compile this driver as a module, choose M here: the
614 module will be called vpfe.
615
595source "drivers/media/video/bt8xx/Kconfig" 616source "drivers/media/video/bt8xx/Kconfig"
596 617
597config VIDEO_PMS 618config VIDEO_PMS
@@ -638,9 +659,14 @@ config VIDEO_W9966
638 information. 659 information.
639 660
640config VIDEO_CPIA 661config VIDEO_CPIA
641 tristate "CPiA Video For Linux" 662 tristate "CPiA Video For Linux (DEPRECATED)"
642 depends on VIDEO_V4L1 663 depends on VIDEO_V4L1
664 default n
643 ---help--- 665 ---help---
666 This driver is DEPRECATED please use the gspca cpia1 module
667 instead. Note that you need atleast version 0.6.4 of libv4l for
668 the cpia1 gspca module.
669
644 This is the video4linux driver for cameras based on Vision's CPiA 670 This is the video4linux driver for cameras based on Vision's CPiA
645 (Colour Processor Interface ASIC), such as the Creative Labs Video 671 (Colour Processor Interface ASIC), such as the Creative Labs Video
646 Blaster Webcam II. If you have one of these cameras, say Y here 672 Blaster Webcam II. If you have one of these cameras, say Y here
@@ -944,6 +970,8 @@ source "drivers/media/video/hdpvr/Kconfig"
944 970
945source "drivers/media/video/em28xx/Kconfig" 971source "drivers/media/video/em28xx/Kconfig"
946 972
973source "drivers/media/video/tlg2300/Kconfig"
974
947source "drivers/media/video/cx231xx/Kconfig" 975source "drivers/media/video/cx231xx/Kconfig"
948 976
949source "drivers/media/video/usbvision/Kconfig" 977source "drivers/media/video/usbvision/Kconfig"
@@ -955,6 +983,7 @@ source "drivers/media/video/et61x251/Kconfig"
955config VIDEO_OVCAMCHIP 983config VIDEO_OVCAMCHIP
956 tristate "OmniVision Camera Chip support (DEPRECATED)" 984 tristate "OmniVision Camera Chip support (DEPRECATED)"
957 depends on I2C && VIDEO_V4L1 985 depends on I2C && VIDEO_V4L1
986 default n
958 ---help--- 987 ---help---
959 This driver is DEPRECATED please use the gspca ov519 module 988 This driver is DEPRECATED please use the gspca ov519 module
960 instead. Note that for the ov511 / ov518 support of the gspca module 989 instead. Note that for the ov511 / ov518 support of the gspca module
@@ -971,6 +1000,7 @@ config VIDEO_OVCAMCHIP
971config USB_W9968CF 1000config USB_W9968CF
972 tristate "USB W996[87]CF JPEG Dual Mode Camera support (DEPRECATED)" 1001 tristate "USB W996[87]CF JPEG Dual Mode Camera support (DEPRECATED)"
973 depends on VIDEO_V4L1 && I2C && VIDEO_OVCAMCHIP 1002 depends on VIDEO_V4L1 && I2C && VIDEO_OVCAMCHIP
1003 default n
974 ---help--- 1004 ---help---
975 This driver is DEPRECATED please use the gspca ov519 module 1005 This driver is DEPRECATED please use the gspca ov519 module
976 instead. Note that for the w9968cf support of the gspca module 1006 instead. Note that for the w9968cf support of the gspca module
@@ -992,6 +1022,7 @@ config USB_W9968CF
992config USB_OV511 1022config USB_OV511
993 tristate "USB OV511 Camera support (DEPRECATED)" 1023 tristate "USB OV511 Camera support (DEPRECATED)"
994 depends on VIDEO_V4L1 1024 depends on VIDEO_V4L1
1025 default n
995 ---help--- 1026 ---help---
996 This driver is DEPRECATED please use the gspca ov519 module 1027 This driver is DEPRECATED please use the gspca ov519 module
997 instead. Note that for the ov511 / ov518 support of the gspca module 1028 instead. Note that for the ov511 / ov518 support of the gspca module
@@ -1020,6 +1051,7 @@ source "drivers/media/video/sn9c102/Kconfig"
1020config USB_STV680 1051config USB_STV680
1021 tristate "USB STV680 (Pencam) Camera support (DEPRECATED)" 1052 tristate "USB STV680 (Pencam) Camera support (DEPRECATED)"
1022 depends on VIDEO_V4L1 1053 depends on VIDEO_V4L1
1054 default n
1023 ---help--- 1055 ---help---
1024 This driver is DEPRECATED please use the gspca stv0680 module 1056 This driver is DEPRECATED please use the gspca stv0680 module
1025 instead. Note that for the gspca stv0680 module you need 1057 instead. Note that for the gspca stv0680 module you need
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index 2af68ee84122..b88b6174a331 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_VIDEO_THS7303) += ths7303.o
56obj-$(CONFIG_VIDEO_VINO) += indycam.o 56obj-$(CONFIG_VIDEO_VINO) += indycam.o
57obj-$(CONFIG_VIDEO_TVP5150) += tvp5150.o 57obj-$(CONFIG_VIDEO_TVP5150) += tvp5150.o
58obj-$(CONFIG_VIDEO_TVP514X) += tvp514x.o 58obj-$(CONFIG_VIDEO_TVP514X) += tvp514x.o
59obj-$(CONFIG_VIDEO_TVP7002) += tvp7002.o
59obj-$(CONFIG_VIDEO_MSP3400) += msp3400.o 60obj-$(CONFIG_VIDEO_MSP3400) += msp3400.o
60obj-$(CONFIG_VIDEO_CS5345) += cs5345.o 61obj-$(CONFIG_VIDEO_CS5345) += cs5345.o
61obj-$(CONFIG_VIDEO_CS53L32A) += cs53l32a.o 62obj-$(CONFIG_VIDEO_CS53L32A) += cs53l32a.o
@@ -99,6 +100,7 @@ obj-$(CONFIG_VIDEO_MEYE) += meye.o
99obj-$(CONFIG_VIDEO_SAA7134) += saa7134/ 100obj-$(CONFIG_VIDEO_SAA7134) += saa7134/
100obj-$(CONFIG_VIDEO_CX88) += cx88/ 101obj-$(CONFIG_VIDEO_CX88) += cx88/
101obj-$(CONFIG_VIDEO_EM28XX) += em28xx/ 102obj-$(CONFIG_VIDEO_EM28XX) += em28xx/
103obj-$(CONFIG_VIDEO_TLG2300) += tlg2300/
102obj-$(CONFIG_VIDEO_CX231XX) += cx231xx/ 104obj-$(CONFIG_VIDEO_CX231XX) += cx231xx/
103obj-$(CONFIG_VIDEO_USBVISION) += usbvision/ 105obj-$(CONFIG_VIDEO_USBVISION) += usbvision/
104obj-$(CONFIG_VIDEO_PVRUSB2) += pvrusb2/ 106obj-$(CONFIG_VIDEO_PVRUSB2) += pvrusb2/
diff --git a/drivers/media/video/bt819.c b/drivers/media/video/bt819.c
index 5bb0f9e71583..547e1a93c421 100644
--- a/drivers/media/video/bt819.c
+++ b/drivers/media/video/bt819.c
@@ -254,7 +254,7 @@ static int bt819_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
254 v4l2_err(sd, "no notify found!\n"); 254 v4l2_err(sd, "no notify found!\n");
255 255
256 if (std & V4L2_STD_NTSC) { 256 if (std & V4L2_STD_NTSC) {
257 v4l2_subdev_notify(sd, BT819_FIFO_RESET_LOW, 0); 257 v4l2_subdev_notify(sd, BT819_FIFO_RESET_LOW, NULL);
258 bt819_setbit(decoder, 0x01, 0, 1); 258 bt819_setbit(decoder, 0x01, 0, 1);
259 bt819_setbit(decoder, 0x01, 1, 0); 259 bt819_setbit(decoder, 0x01, 1, 0);
260 bt819_setbit(decoder, 0x01, 5, 0); 260 bt819_setbit(decoder, 0x01, 5, 0);
@@ -263,7 +263,7 @@ static int bt819_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
263 /* bt819_setbit(decoder, 0x1a, 5, 1); */ 263 /* bt819_setbit(decoder, 0x1a, 5, 1); */
264 timing = &timing_data[1]; 264 timing = &timing_data[1];
265 } else if (std & V4L2_STD_PAL) { 265 } else if (std & V4L2_STD_PAL) {
266 v4l2_subdev_notify(sd, BT819_FIFO_RESET_LOW, 0); 266 v4l2_subdev_notify(sd, BT819_FIFO_RESET_LOW, NULL);
267 bt819_setbit(decoder, 0x01, 0, 1); 267 bt819_setbit(decoder, 0x01, 0, 1);
268 bt819_setbit(decoder, 0x01, 1, 1); 268 bt819_setbit(decoder, 0x01, 1, 1);
269 bt819_setbit(decoder, 0x01, 5, 1); 269 bt819_setbit(decoder, 0x01, 5, 1);
@@ -288,7 +288,7 @@ static int bt819_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
288 bt819_write(decoder, 0x08, (timing->hscale >> 8) & 0xff); 288 bt819_write(decoder, 0x08, (timing->hscale >> 8) & 0xff);
289 bt819_write(decoder, 0x09, timing->hscale & 0xff); 289 bt819_write(decoder, 0x09, timing->hscale & 0xff);
290 decoder->norm = std; 290 decoder->norm = std;
291 v4l2_subdev_notify(sd, BT819_FIFO_RESET_HIGH, 0); 291 v4l2_subdev_notify(sd, BT819_FIFO_RESET_HIGH, NULL);
292 return 0; 292 return 0;
293} 293}
294 294
@@ -306,7 +306,7 @@ static int bt819_s_routing(struct v4l2_subdev *sd,
306 v4l2_err(sd, "no notify found!\n"); 306 v4l2_err(sd, "no notify found!\n");
307 307
308 if (decoder->input != input) { 308 if (decoder->input != input) {
309 v4l2_subdev_notify(sd, BT819_FIFO_RESET_LOW, 0); 309 v4l2_subdev_notify(sd, BT819_FIFO_RESET_LOW, NULL);
310 decoder->input = input; 310 decoder->input = input;
311 /* select mode */ 311 /* select mode */
312 if (decoder->input == 0) { 312 if (decoder->input == 0) {
@@ -316,7 +316,7 @@ static int bt819_s_routing(struct v4l2_subdev *sd,
316 bt819_setbit(decoder, 0x0b, 6, 1); 316 bt819_setbit(decoder, 0x0b, 6, 1);
317 bt819_setbit(decoder, 0x1a, 1, 0); 317 bt819_setbit(decoder, 0x1a, 1, 0);
318 } 318 }
319 v4l2_subdev_notify(sd, BT819_FIFO_RESET_HIGH, 0); 319 v4l2_subdev_notify(sd, BT819_FIFO_RESET_HIGH, NULL);
320 } 320 }
321 return 0; 321 return 0;
322} 322}
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c
index ae08b077fd04..cb46e8fa8aaa 100644
--- a/drivers/media/video/bt8xx/bttv-driver.c
+++ b/drivers/media/video/bt8xx/bttv-driver.c
@@ -81,6 +81,7 @@ static int video_nr[BTTV_MAX] = { [0 ... (BTTV_MAX-1)] = -1 };
81static int radio_nr[BTTV_MAX] = { [0 ... (BTTV_MAX-1)] = -1 }; 81static int radio_nr[BTTV_MAX] = { [0 ... (BTTV_MAX-1)] = -1 };
82static int vbi_nr[BTTV_MAX] = { [0 ... (BTTV_MAX-1)] = -1 }; 82static int vbi_nr[BTTV_MAX] = { [0 ... (BTTV_MAX-1)] = -1 };
83static int debug_latency; 83static int debug_latency;
84static int disable_ir;
84 85
85static unsigned int fdsr; 86static unsigned int fdsr;
86 87
@@ -107,6 +108,7 @@ module_param(bttv_gpio, int, 0644);
107module_param(bttv_debug, int, 0644); 108module_param(bttv_debug, int, 0644);
108module_param(irq_debug, int, 0644); 109module_param(irq_debug, int, 0644);
109module_param(debug_latency, int, 0644); 110module_param(debug_latency, int, 0644);
111module_param(disable_ir, int, 0444);
110 112
111module_param(fdsr, int, 0444); 113module_param(fdsr, int, 0444);
112module_param(gbuffers, int, 0444); 114module_param(gbuffers, int, 0444);
@@ -139,6 +141,7 @@ MODULE_PARM_DESC(bttv_verbose,"verbose startup messages, default is 1 (yes)");
139MODULE_PARM_DESC(bttv_gpio,"log gpio changes, default is 0 (no)"); 141MODULE_PARM_DESC(bttv_gpio,"log gpio changes, default is 0 (no)");
140MODULE_PARM_DESC(bttv_debug,"debug messages, default is 0 (no)"); 142MODULE_PARM_DESC(bttv_debug,"debug messages, default is 0 (no)");
141MODULE_PARM_DESC(irq_debug,"irq handler debug messages, default is 0 (no)"); 143MODULE_PARM_DESC(irq_debug,"irq handler debug messages, default is 0 (no)");
144MODULE_PARM_DESC(disable_ir, "disable infrared remote support");
142MODULE_PARM_DESC(gbuffers,"number of capture buffers. range 2-32, default 8"); 145MODULE_PARM_DESC(gbuffers,"number of capture buffers. range 2-32, default 8");
143MODULE_PARM_DESC(gbufsize,"size of the capture buffers, default is 0x208000"); 146MODULE_PARM_DESC(gbufsize,"size of the capture buffers, default is 0x208000");
144MODULE_PARM_DESC(reset_crop,"reset cropping parameters at open(), default " 147MODULE_PARM_DESC(reset_crop,"reset cropping parameters at open(), default "
@@ -4461,8 +4464,10 @@ static int __devinit bttv_probe(struct pci_dev *dev,
4461 request_modules(btv); 4464 request_modules(btv);
4462 } 4465 }
4463 4466
4464 init_bttv_i2c_ir(btv); 4467 if (!disable_ir) {
4465 bttv_input_init(btv); 4468 init_bttv_i2c_ir(btv);
4469 bttv_input_init(btv);
4470 }
4466 4471
4467 /* everything is fine */ 4472 /* everything is fine */
4468 bttv_num++; 4473 bttv_num++;
diff --git a/drivers/media/video/bt8xx/bttv-input.c b/drivers/media/video/bt8xx/bttv-input.c
index 277a092e1214..b320dbd635aa 100644
--- a/drivers/media/video/bt8xx/bttv-input.c
+++ b/drivers/media/video/bt8xx/bttv-input.c
@@ -247,7 +247,7 @@ int bttv_input_init(struct bttv *btv)
247 struct card_ir *ir; 247 struct card_ir *ir;
248 struct ir_scancode_table *ir_codes = NULL; 248 struct ir_scancode_table *ir_codes = NULL;
249 struct input_dev *input_dev; 249 struct input_dev *input_dev;
250 int ir_type = IR_TYPE_OTHER; 250 u64 ir_type = IR_TYPE_OTHER;
251 int err = -ENOMEM; 251 int err = -ENOMEM;
252 252
253 if (!btv->has_remote) 253 if (!btv->has_remote)
@@ -389,7 +389,7 @@ int bttv_input_init(struct bttv *btv)
389 bttv_ir_start(btv, ir); 389 bttv_ir_start(btv, ir);
390 390
391 /* all done */ 391 /* all done */
392 err = ir_input_register(btv->remote->dev, ir_codes); 392 err = ir_input_register(btv->remote->dev, ir_codes, NULL);
393 if (err) 393 if (err)
394 goto err_out_stop; 394 goto err_out_stop;
395 395
diff --git a/drivers/media/video/cafe_ccic.c b/drivers/media/video/cafe_ccic.c
index 7bb9c1ec7819..cbbf7e80d2cf 100644
--- a/drivers/media/video/cafe_ccic.c
+++ b/drivers/media/video/cafe_ccic.c
@@ -1907,7 +1907,6 @@ static int cafe_pci_probe(struct pci_dev *pdev,
1907 goto out_free; 1907 goto out_free;
1908 1908
1909 mutex_init(&cam->s_mutex); 1909 mutex_init(&cam->s_mutex);
1910 mutex_lock(&cam->s_mutex);
1911 spin_lock_init(&cam->dev_lock); 1910 spin_lock_init(&cam->dev_lock);
1912 cam->state = S_NOTREADY; 1911 cam->state = S_NOTREADY;
1913 cafe_set_config_needed(cam, 1); 1912 cafe_set_config_needed(cam, 1);
@@ -1947,7 +1946,6 @@ static int cafe_pci_probe(struct pci_dev *pdev,
1947 * because the sensor could attach in this call chain, leading to 1946 * because the sensor could attach in this call chain, leading to
1948 * unsightly deadlocks. 1947 * unsightly deadlocks.
1949 */ 1948 */
1950 mutex_unlock(&cam->s_mutex); /* attach can deadlock */
1951 ret = cafe_smbus_setup(cam); 1949 ret = cafe_smbus_setup(cam);
1952 if (ret) 1950 if (ret)
1953 goto out_freeirq; 1951 goto out_freeirq;
@@ -1973,7 +1971,7 @@ static int cafe_pci_probe(struct pci_dev *pdev,
1973 cam->vdev.v4l2_dev = &cam->v4l2_dev; 1971 cam->vdev.v4l2_dev = &cam->v4l2_dev;
1974 ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1); 1972 ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1);
1975 if (ret) 1973 if (ret)
1976 goto out_smbus; 1974 goto out_unlock;
1977 video_set_drvdata(&cam->vdev, cam); 1975 video_set_drvdata(&cam->vdev, cam);
1978 1976
1979 /* 1977 /*
@@ -1988,6 +1986,8 @@ static int cafe_pci_probe(struct pci_dev *pdev,
1988 mutex_unlock(&cam->s_mutex); 1986 mutex_unlock(&cam->s_mutex);
1989 return 0; 1987 return 0;
1990 1988
1989out_unlock:
1990 mutex_unlock(&cam->s_mutex);
1991out_smbus: 1991out_smbus:
1992 cafe_smbus_shutdown(cam); 1992 cafe_smbus_shutdown(cam);
1993out_freeirq: 1993out_freeirq:
diff --git a/drivers/media/video/cpia.c b/drivers/media/video/cpia.c
index 551ddf216a4b..933ae4c8cb9a 100644
--- a/drivers/media/video/cpia.c
+++ b/drivers/media/video/cpia.c
@@ -3737,9 +3737,6 @@ static int cpia_mmap(struct file *file, struct vm_area_struct *vma)
3737 if (size > FRAME_NUM*CPIA_MAX_FRAME_SIZE) 3737 if (size > FRAME_NUM*CPIA_MAX_FRAME_SIZE)
3738 return -EINVAL; 3738 return -EINVAL;
3739 3739
3740 if (!cam || !cam->ops)
3741 return -ENODEV;
3742
3743 /* make this _really_ smp-safe */ 3740 /* make this _really_ smp-safe */
3744 if (mutex_lock_interruptible(&cam->busy_lock)) 3741 if (mutex_lock_interruptible(&cam->busy_lock))
3745 return -EINTR; 3742 return -EINTR;
diff --git a/drivers/media/video/cx18/Kconfig b/drivers/media/video/cx18/Kconfig
index e8a50a611ebc..baf7e91ee0f5 100644
--- a/drivers/media/video/cx18/Kconfig
+++ b/drivers/media/video/cx18/Kconfig
@@ -19,3 +19,14 @@ config VIDEO_CX18
19 19
20 To compile this driver as a module, choose M here: the 20 To compile this driver as a module, choose M here: the
21 module will be called cx18. 21 module will be called cx18.
22
23config VIDEO_CX18_ALSA
24 tristate "Conexant 23418 DMA audio support"
25 depends on VIDEO_CX18 && SND && EXPERIMENTAL
26 select SND_PCM
27 ---help---
28 This is a video4linux driver for direct (DMA) audio on
29 Conexant 23418 based TV cards using ALSA.
30
31 To compile this driver as a module, choose M here: the
32 module will be called cx18-alsa.
diff --git a/drivers/media/video/cx18/Makefile b/drivers/media/video/cx18/Makefile
index f7bf0edf93f9..2fadd9ded340 100644
--- a/drivers/media/video/cx18/Makefile
+++ b/drivers/media/video/cx18/Makefile
@@ -3,8 +3,10 @@ cx18-objs := cx18-driver.o cx18-cards.o cx18-i2c.o cx18-firmware.o cx18-gpio.
3 cx18-mailbox.o cx18-vbi.o cx18-audio.o cx18-video.o cx18-irq.o \ 3 cx18-mailbox.o cx18-vbi.o cx18-audio.o cx18-video.o cx18-irq.o \
4 cx18-av-core.o cx18-av-audio.o cx18-av-firmware.o cx18-av-vbi.o cx18-scb.o \ 4 cx18-av-core.o cx18-av-audio.o cx18-av-firmware.o cx18-av-vbi.o cx18-scb.o \
5 cx18-dvb.o cx18-io.o 5 cx18-dvb.o cx18-io.o
6cx18-alsa-objs := cx18-alsa-main.o cx18-alsa-pcm.o
6 7
7obj-$(CONFIG_VIDEO_CX18) += cx18.o 8obj-$(CONFIG_VIDEO_CX18) += cx18.o
9obj-$(CONFIG_VIDEO_CX18_ALSA) += cx18-alsa.o
8 10
9EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core 11EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core
10EXTRA_CFLAGS += -Idrivers/media/dvb/frontends 12EXTRA_CFLAGS += -Idrivers/media/dvb/frontends
diff --git a/drivers/media/video/cx18/cx18-alsa-main.c b/drivers/media/video/cx18/cx18-alsa-main.c
new file mode 100644
index 000000000000..eb41d7ec65b9
--- /dev/null
+++ b/drivers/media/video/cx18/cx18-alsa-main.c
@@ -0,0 +1,293 @@
1/*
2 * ALSA interface to cx18 PCM capture streams
3 *
4 * Copyright (C) 2009 Andy Walls <awalls@radix.net>
5 * Copyright (C) 2009 Devin Heitmueller <dheitmueller@kernellabs.com>
6 *
7 * Portions of this work were sponsored by ONELAN Limited.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/kernel.h>
28#include <linux/device.h>
29#include <linux/spinlock.h>
30
31#include <media/v4l2-device.h>
32
33#include <sound/core.h>
34#include <sound/initval.h>
35
36#include "cx18-driver.h"
37#include "cx18-version.h"
38#include "cx18-alsa.h"
39#include "cx18-alsa-mixer.h"
40#include "cx18-alsa-pcm.h"
41
42int cx18_alsa_debug;
43
44#define CX18_DEBUG_ALSA_INFO(fmt, arg...) \
45 do { \
46 if (cx18_alsa_debug & 2) \
47 printk(KERN_INFO "%s: " fmt, "cx18-alsa", ## arg); \
48 } while (0);
49
50module_param_named(debug, cx18_alsa_debug, int, 0644);
51MODULE_PARM_DESC(debug,
52 "Debug level (bitmask). Default: 0\n"
53 "\t\t\t 1/0x0001: warning\n"
54 "\t\t\t 2/0x0002: info\n");
55
56MODULE_AUTHOR("Andy Walls");
57MODULE_DESCRIPTION("CX23418 ALSA Interface");
58MODULE_SUPPORTED_DEVICE("CX23418 MPEG2 encoder");
59MODULE_LICENSE("GPL");
60
61MODULE_VERSION(CX18_VERSION);
62
63static inline
64struct snd_cx18_card *to_snd_cx18_card(struct v4l2_device *v4l2_dev)
65{
66 return to_cx18(v4l2_dev)->alsa;
67}
68
69static inline
70struct snd_cx18_card *p_to_snd_cx18_card(struct v4l2_device **v4l2_dev)
71{
72 return container_of(v4l2_dev, struct snd_cx18_card, v4l2_dev);
73}
74
75static void snd_cx18_card_free(struct snd_cx18_card *cxsc)
76{
77 if (cxsc == NULL)
78 return;
79
80 if (cxsc->v4l2_dev != NULL)
81 to_cx18(cxsc->v4l2_dev)->alsa = NULL;
82
83 /* FIXME - take any other stopping actions needed */
84
85 kfree(cxsc);
86}
87
88static void snd_cx18_card_private_free(struct snd_card *sc)
89{
90 if (sc == NULL)
91 return;
92 snd_cx18_card_free(sc->private_data);
93 sc->private_data = NULL;
94 sc->private_free = NULL;
95}
96
97static int snd_cx18_card_create(struct v4l2_device *v4l2_dev,
98 struct snd_card *sc,
99 struct snd_cx18_card **cxsc)
100{
101 *cxsc = kzalloc(sizeof(struct snd_cx18_card), GFP_KERNEL);
102 if (*cxsc == NULL)
103 return -ENOMEM;
104
105 (*cxsc)->v4l2_dev = v4l2_dev;
106 (*cxsc)->sc = sc;
107
108 sc->private_data = *cxsc;
109 sc->private_free = snd_cx18_card_private_free;
110
111 return 0;
112}
113
114static int snd_cx18_card_set_names(struct snd_cx18_card *cxsc)
115{
116 struct cx18 *cx = to_cx18(cxsc->v4l2_dev);
117 struct snd_card *sc = cxsc->sc;
118
119 /* sc->driver is used by alsa-lib's configurator: simple, unique */
120 strlcpy(sc->driver, "CX23418", sizeof(sc->driver));
121
122 /* sc->shortname is a symlink in /proc/asound: CX18-M -> cardN */
123 snprintf(sc->shortname, sizeof(sc->shortname), "CX18-%d",
124 cx->instance);
125
126 /* sc->longname is read from /proc/asound/cards */
127 snprintf(sc->longname, sizeof(sc->longname),
128 "CX23418 #%d %s TV/FM Radio/Line-In Capture",
129 cx->instance, cx->card_name);
130
131 return 0;
132}
133
134static int snd_cx18_init(struct v4l2_device *v4l2_dev)
135{
136 struct cx18 *cx = to_cx18(v4l2_dev);
137 struct snd_card *sc = NULL;
138 struct snd_cx18_card *cxsc;
139 int ret;
140
141 /* Numbrs steps from "Writing an ALSA Driver" by Takashi Iwai */
142
143 /* (1) Check and increment the device index */
144 /* This is a no-op for us. We'll use the cx->instance */
145
146 /* (2) Create a card instance */
147 ret = snd_card_create(SNDRV_DEFAULT_IDX1, /* use first available id */
148 SNDRV_DEFAULT_STR1, /* xid from end of shortname*/
149 THIS_MODULE, 0, &sc);
150 if (ret) {
151 CX18_ALSA_ERR("%s: snd_card_create() failed with err %d\n",
152 __func__, ret);
153 goto err_exit;
154 }
155
156 /* (3) Create a main component */
157 ret = snd_cx18_card_create(v4l2_dev, sc, &cxsc);
158 if (ret) {
159 CX18_ALSA_ERR("%s: snd_cx18_card_create() failed with err %d\n",
160 __func__, ret);
161 goto err_exit_free;
162 }
163
164 /* (4) Set the driver ID and name strings */
165 snd_cx18_card_set_names(cxsc);
166
167
168 ret = snd_cx18_pcm_create(cxsc);
169 if (ret) {
170 CX18_ALSA_ERR("%s: snd_cx18_pcm_create() failed with err %d\n",
171 __func__, ret);
172 goto err_exit_free;
173 }
174 /* FIXME - proc files */
175
176 /* (7) Set the driver data and return 0 */
177 /* We do this out of normal order for PCI drivers to avoid races */
178 cx->alsa = cxsc;
179
180 /* (6) Register the card instance */
181 ret = snd_card_register(sc);
182 if (ret) {
183 cx->alsa = NULL;
184 CX18_ALSA_ERR("%s: snd_card_register() failed with err %d\n",
185 __func__, ret);
186 goto err_exit_free;
187 }
188
189 return 0;
190
191err_exit_free:
192 if (sc != NULL)
193 snd_card_free(sc);
194err_exit:
195 return ret;
196}
197
198int cx18_alsa_load(struct cx18 *cx)
199{
200 struct v4l2_device *v4l2_dev = &cx->v4l2_dev;
201 struct cx18_stream *s;
202
203 if (v4l2_dev == NULL) {
204 printk(KERN_ERR "cx18-alsa: %s: struct v4l2_device * is NULL\n",
205 __func__);
206 return 0;
207 }
208
209 cx = to_cx18(v4l2_dev);
210 if (cx == NULL) {
211 printk(KERN_ERR "cx18-alsa cx is NULL\n");
212 return 0;
213 }
214
215 s = &cx->streams[CX18_ENC_STREAM_TYPE_PCM];
216 if (s->video_dev == NULL) {
217 CX18_DEBUG_ALSA_INFO("%s: PCM stream for card is disabled - "
218 "skipping\n", __func__);
219 return 0;
220 }
221
222 if (cx->alsa != NULL) {
223 CX18_ALSA_ERR("%s: struct snd_cx18_card * already exists\n",
224 __func__);
225 return 0;
226 }
227
228 if (snd_cx18_init(v4l2_dev)) {
229 CX18_ALSA_ERR("%s: failed to create struct snd_cx18_card\n",
230 __func__);
231 } else {
232 CX18_DEBUG_ALSA_INFO("%s: created cx18 ALSA interface instance "
233 "\n", __func__);
234 }
235 return 0;
236}
237
238static int __init cx18_alsa_init(void)
239{
240 printk(KERN_INFO "cx18-alsa: module loading...\n");
241 cx18_ext_init = &cx18_alsa_load;
242 return 0;
243}
244
245static void __exit snd_cx18_exit(struct snd_cx18_card *cxsc)
246{
247 struct cx18 *cx = to_cx18(cxsc->v4l2_dev);
248
249 /* FIXME - pointer checks & shutdown cxsc */
250
251 snd_card_free(cxsc->sc);
252 cx->alsa = NULL;
253}
254
255static int __exit cx18_alsa_exit_callback(struct device *dev, void *data)
256{
257 struct v4l2_device *v4l2_dev = dev_get_drvdata(dev);
258 struct snd_cx18_card *cxsc;
259
260 if (v4l2_dev == NULL) {
261 printk(KERN_ERR "cx18-alsa: %s: struct v4l2_device * is NULL\n",
262 __func__);
263 return 0;
264 }
265
266 cxsc = to_snd_cx18_card(v4l2_dev);
267 if (cxsc == NULL) {
268 CX18_ALSA_WARN("%s: struct snd_cx18_card * is NULL\n",
269 __func__);
270 return 0;
271 }
272
273 snd_cx18_exit(cxsc);
274 return 0;
275}
276
277static void __exit cx18_alsa_exit(void)
278{
279 struct device_driver *drv;
280 int ret;
281
282 printk(KERN_INFO "cx18-alsa: module unloading...\n");
283
284 drv = driver_find("cx18", &pci_bus_type);
285 ret = driver_for_each_device(drv, NULL, NULL, cx18_alsa_exit_callback);
286 put_driver(drv);
287
288 cx18_ext_init = NULL;
289 printk(KERN_INFO "cx18-alsa: module unload complete\n");
290}
291
292module_init(cx18_alsa_init);
293module_exit(cx18_alsa_exit);
diff --git a/drivers/media/video/cx18/cx18-alsa-mixer.c b/drivers/media/video/cx18/cx18-alsa-mixer.c
new file mode 100644
index 000000000000..ef21114309fe
--- /dev/null
+++ b/drivers/media/video/cx18/cx18-alsa-mixer.c
@@ -0,0 +1,175 @@
1/*
2 * ALSA mixer controls for the
3 * ALSA interface to cx18 PCM capture streams
4 *
5 * Copyright (C) 2009 Andy Walls <awalls@radix.net>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
20 * 02111-1307 USA
21 */
22
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/device.h>
26#include <linux/spinlock.h>
27#include <linux/videodev2.h>
28
29#include <media/v4l2-device.h>
30
31#include <sound/core.h>
32#include <sound/control.h>
33#include <sound/tlv.h>
34
35#include "cx18-alsa.h"
36#include "cx18-driver.h"
37
38/*
39 * Note the cx18-av-core volume scale is funny, due to the alignment of the
40 * scale with another chip's range:
41 *
42 * v4l2_control value /512 indicated dB actual dB reg 0x8d4
43 * 0x0000 - 0x01ff 0 -119 -96 228
44 * 0x0200 - 0x02ff 1 -118 -96 228
45 * ...
46 * 0x2c00 - 0x2dff 22 -97 -96 228
47 * 0x2e00 - 0x2fff 23 -96 -96 228
48 * 0x3000 - 0x31ff 24 -95 -95 226
49 * ...
50 * 0xee00 - 0xefff 119 0 0 36
51 * ...
52 * 0xfe00 - 0xffff 127 +8 +8 20
53 */
54static inline int dB_to_cx18_av_vol(int dB)
55{
56 if (dB < -96)
57 dB = -96;
58 else if (dB > 8)
59 dB = 8;
60 return (dB + 119) << 9;
61}
62
63static inline int cx18_av_vol_to_dB(int v)
64{
65 if (v < (23 << 9))
66 v = (23 << 9);
67 else if (v > (127 << 9))
68 v = (127 << 9);
69 return (v >> 9) - 119;
70}
71
72static int snd_cx18_mixer_tv_vol_info(struct snd_kcontrol *kcontrol,
73 struct snd_ctl_elem_info *uinfo)
74{
75 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
76 uinfo->count = 1;
77 /* We're already translating values, just keep this control in dB */
78 uinfo->value.integer.min = -96;
79 uinfo->value.integer.max = 8;
80 uinfo->value.integer.step = 1;
81 return 0;
82}
83
84static int snd_cx18_mixer_tv_vol_get(struct snd_kcontrol *kctl,
85 struct snd_ctl_elem_value *uctl)
86{
87 struct snd_cx18_card *cxsc = snd_kcontrol_chip(kctl);
88 struct cx18 *cx = to_cx18(cxsc->v4l2_dev);
89 struct v4l2_control vctrl;
90 int ret;
91
92 vctrl.id = V4L2_CID_AUDIO_VOLUME;
93 vctrl.value = dB_to_cx18_av_vol(uctl->value.integer.value[0]);
94
95 snd_cx18_lock(cxsc);
96 ret = v4l2_subdev_call(cx->sd_av, core, g_ctrl, &vctrl);
97 snd_cx18_unlock(cxsc);
98
99 if (!ret)
100 uctl->value.integer.value[0] = cx18_av_vol_to_dB(vctrl.value);
101 return ret;
102}
103
104static int snd_cx18_mixer_tv_vol_put(struct snd_kcontrol *kctl,
105 struct snd_ctl_elem_value *uctl)
106{
107 struct snd_cx18_card *cxsc = snd_kcontrol_chip(kctl);
108 struct cx18 *cx = to_cx18(cxsc->v4l2_dev);
109 struct v4l2_control vctrl;
110 int ret;
111
112 vctrl.id = V4L2_CID_AUDIO_VOLUME;
113 vctrl.value = dB_to_cx18_av_vol(uctl->value.integer.value[0]);
114
115 snd_cx18_lock(cxsc);
116
117 /* Fetch current state */
118 ret = v4l2_subdev_call(cx->sd_av, core, g_ctrl, &vctrl);
119
120 if (ret ||
121 (cx18_av_vol_to_dB(vctrl.value) != uctl->value.integer.value[0])) {
122
123 /* Set, if needed */
124 vctrl.value = dB_to_cx18_av_vol(uctl->value.integer.value[0]);
125 ret = v4l2_subdev_call(cx->sd_av, core, s_ctrl, &vctrl);
126 if (!ret)
127 ret = 1; /* Indicate control was changed w/o error */
128 }
129 snd_cx18_unlock(cxsc);
130
131 return ret;
132}
133
134
135/* This is a bit of overkill, the slider is already in dB internally */
136static DECLARE_TLV_DB_SCALE(snd_cx18_mixer_tv_vol_db_scale, -9600, 100, 0);
137
138static struct snd_kcontrol_new snd_cx18_mixer_tv_vol __initdata = {
139 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
140 .name = "Analog TV Capture Volume",
141 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
142 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
143 .info = snd_cx18_mixer_tv_volume_info,
144 .get = snd_cx18_mixer_tv_volume_get,
145 .put = snd_cx18_mixer_tv_volume_put,
146 .tlv.p = snd_cx18_mixer_tv_vol_db_scale
147};
148
149/* FIXME - add mute switch and balance, bass, treble sliders:
150 V4L2_CID_AUDIO_MUTE
151
152 V4L2_CID_AUDIO_BALANCE
153
154 V4L2_CID_AUDIO_BASS
155 V4L2_CID_AUDIO_TREBLE
156*/
157
158/* FIXME - add stereo, lang1, lang2, mono menu */
159/* FIXME - add CS5345 I2S volume for HVR-1600 */
160
161int __init snd_cx18_mixer_create(struct snd_cx18_card *cxsc)
162{
163 struct v4l2_device *v4l2_dev = cxsc->v4l2_dev;
164 struct snd_card *sc = cxsc->sc;
165 int ret;
166
167 strlcpy(sc->mixername, "CX23418 Mixer", sizeof(sc->mixername));
168
169 ret = snd_ctl_add(sc, snd_ctl_new1(snd_cx18_mixer_tv_vol, cxsc));
170 if (ret) {
171 CX18_ALSA_WARN("%s: failed to add %s control, err %d\n",
172 __func__, snd_cx18_mixer_tv_vol.name, ret);
173 }
174 return ret;
175}
diff --git a/drivers/media/video/cx18/cx18-alsa-mixer.h b/drivers/media/video/cx18/cx18-alsa-mixer.h
new file mode 100644
index 000000000000..2d418db000fe
--- /dev/null
+++ b/drivers/media/video/cx18/cx18-alsa-mixer.h
@@ -0,0 +1,23 @@
1/*
2 * ALSA mixer controls for the
3 * ALSA interface to cx18 PCM capture streams
4 *
5 * Copyright (C) 2009 Andy Walls <awalls@radix.net>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
20 * 02111-1307 USA
21 */
22
23int __init snd_cx18_mixer_create(struct snd_cx18_card *cxsc);
diff --git a/drivers/media/video/cx18/cx18-alsa-pcm.c b/drivers/media/video/cx18/cx18-alsa-pcm.c
new file mode 100644
index 000000000000..2bd312daeb1e
--- /dev/null
+++ b/drivers/media/video/cx18/cx18-alsa-pcm.c
@@ -0,0 +1,354 @@
1/*
2 * ALSA PCM device for the
3 * ALSA interface to cx18 PCM capture streams
4 *
5 * Copyright (C) 2009 Andy Walls <awalls@radix.net>
6 * Copyright (C) 2009 Devin Heitmueller <dheitmueller@kernellabs.com>
7 *
8 * Portions of this work were sponsored by ONELAN Limited.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
23 * 02111-1307 USA
24 */
25
26#include <linux/init.h>
27#include <linux/kernel.h>
28#include <linux/vmalloc.h>
29
30#include <media/v4l2-device.h>
31
32#include <sound/core.h>
33#include <sound/pcm.h>
34
35#include "cx18-driver.h"
36#include "cx18-queue.h"
37#include "cx18-streams.h"
38#include "cx18-fileops.h"
39#include "cx18-alsa.h"
40
41static unsigned int pcm_debug;
42module_param(pcm_debug, int, 0644);
43MODULE_PARM_DESC(pcm_debug, "enable debug messages for pcm");
44
45#define dprintk(fmt, arg...) do { \
46 if (pcm_debug) \
47 printk(KERN_INFO "cx18-alsa-pcm %s: " fmt, \
48 __func__, ##arg); \
49 } while (0)
50
51static struct snd_pcm_hardware snd_cx18_hw_capture = {
52 .info = SNDRV_PCM_INFO_BLOCK_TRANSFER |
53 SNDRV_PCM_INFO_MMAP |
54 SNDRV_PCM_INFO_INTERLEAVED |
55 SNDRV_PCM_INFO_MMAP_VALID,
56
57 .formats = SNDRV_PCM_FMTBIT_S16_LE,
58
59 .rates = SNDRV_PCM_RATE_48000,
60
61 .rate_min = 48000,
62 .rate_max = 48000,
63 .channels_min = 2,
64 .channels_max = 2,
65 .buffer_bytes_max = 62720 * 8, /* just about the value in usbaudio.c */
66 .period_bytes_min = 64, /* 12544/2, */
67 .period_bytes_max = 12544,
68 .periods_min = 2,
69 .periods_max = 98, /* 12544, */
70};
71
72void cx18_alsa_announce_pcm_data(struct snd_cx18_card *cxsc, u8 *pcm_data,
73 size_t num_bytes)
74{
75 struct snd_pcm_substream *substream;
76 struct snd_pcm_runtime *runtime;
77 unsigned int oldptr;
78 unsigned int stride;
79 int period_elapsed = 0;
80 int length;
81
82 dprintk("cx18 alsa announce ptr=%p data=%p num_bytes=%zd\n", cxsc,
83 pcm_data, num_bytes);
84
85 substream = cxsc->capture_pcm_substream;
86 if (substream == NULL) {
87 dprintk("substream was NULL\n");
88 return;
89 }
90
91 runtime = substream->runtime;
92 if (runtime == NULL) {
93 dprintk("runtime was NULL\n");
94 return;
95 }
96
97 stride = runtime->frame_bits >> 3;
98 if (stride == 0) {
99 dprintk("stride is zero\n");
100 return;
101 }
102
103 length = num_bytes / stride;
104 if (length == 0) {
105 dprintk("%s: length was zero\n", __func__);
106 return;
107 }
108
109 if (runtime->dma_area == NULL) {
110 dprintk("dma area was NULL - ignoring\n");
111 return;
112 }
113
114 oldptr = cxsc->hwptr_done_capture;
115 if (oldptr + length >= runtime->buffer_size) {
116 unsigned int cnt =
117 runtime->buffer_size - oldptr;
118 memcpy(runtime->dma_area + oldptr * stride, pcm_data,
119 cnt * stride);
120 memcpy(runtime->dma_area, pcm_data + cnt * stride,
121 length * stride - cnt * stride);
122 } else {
123 memcpy(runtime->dma_area + oldptr * stride, pcm_data,
124 length * stride);
125 }
126 snd_pcm_stream_lock(substream);
127
128 cxsc->hwptr_done_capture += length;
129 if (cxsc->hwptr_done_capture >=
130 runtime->buffer_size)
131 cxsc->hwptr_done_capture -=
132 runtime->buffer_size;
133
134 cxsc->capture_transfer_done += length;
135 if (cxsc->capture_transfer_done >=
136 runtime->period_size) {
137 cxsc->capture_transfer_done -=
138 runtime->period_size;
139 period_elapsed = 1;
140 }
141
142 snd_pcm_stream_unlock(substream);
143
144 if (period_elapsed)
145 snd_pcm_period_elapsed(substream);
146}
147
148static int snd_cx18_pcm_capture_open(struct snd_pcm_substream *substream)
149{
150 struct snd_cx18_card *cxsc = snd_pcm_substream_chip(substream);
151 struct snd_pcm_runtime *runtime = substream->runtime;
152 struct v4l2_device *v4l2_dev = cxsc->v4l2_dev;
153 struct cx18 *cx = to_cx18(v4l2_dev);
154 struct cx18_stream *s;
155 struct cx18_open_id item;
156 int ret;
157
158 /* Instruct the cx18 to start sending packets */
159 snd_cx18_lock(cxsc);
160 s = &cx->streams[CX18_ENC_STREAM_TYPE_PCM];
161
162 item.cx = cx;
163 item.type = s->type;
164 item.open_id = cx->open_id++;
165
166 /* See if the stream is available */
167 if (cx18_claim_stream(&item, item.type)) {
168 /* No, it's already in use */
169 snd_cx18_unlock(cxsc);
170 return -EBUSY;
171 }
172
173 if (test_bit(CX18_F_S_STREAMOFF, &s->s_flags) ||
174 test_and_set_bit(CX18_F_S_STREAMING, &s->s_flags)) {
175 /* We're already streaming. No additional action required */
176 snd_cx18_unlock(cxsc);
177 return 0;
178 }
179
180
181 runtime->hw = snd_cx18_hw_capture;
182 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
183 cxsc->capture_pcm_substream = substream;
184 runtime->private_data = cx;
185
186 cx->pcm_announce_callback = cx18_alsa_announce_pcm_data;
187
188 /* Not currently streaming, so start it up */
189 set_bit(CX18_F_S_STREAMING, &s->s_flags);
190 ret = cx18_start_v4l2_encode_stream(s);
191 snd_cx18_unlock(cxsc);
192
193 return 0;
194}
195
196static int snd_cx18_pcm_capture_close(struct snd_pcm_substream *substream)
197{
198 struct snd_cx18_card *cxsc = snd_pcm_substream_chip(substream);
199 struct v4l2_device *v4l2_dev = cxsc->v4l2_dev;
200 struct cx18 *cx = to_cx18(v4l2_dev);
201 struct cx18_stream *s;
202 int ret;
203
204 /* Instruct the cx18 to stop sending packets */
205 snd_cx18_lock(cxsc);
206 s = &cx->streams[CX18_ENC_STREAM_TYPE_PCM];
207 ret = cx18_stop_v4l2_encode_stream(s, 0);
208 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
209
210 cx18_release_stream(s);
211
212 cx->pcm_announce_callback = NULL;
213 snd_cx18_unlock(cxsc);
214
215 return 0;
216}
217
218static int snd_cx18_pcm_ioctl(struct snd_pcm_substream *substream,
219 unsigned int cmd, void *arg)
220{
221 return snd_pcm_lib_ioctl(substream, cmd, arg);
222}
223
224
225static int snd_pcm_alloc_vmalloc_buffer(struct snd_pcm_substream *subs,
226 size_t size)
227{
228 struct snd_pcm_runtime *runtime = subs->runtime;
229
230 dprintk("Allocating vbuffer\n");
231 if (runtime->dma_area) {
232 if (runtime->dma_bytes > size)
233 return 0;
234
235 vfree(runtime->dma_area);
236 }
237 runtime->dma_area = vmalloc(size);
238 if (!runtime->dma_area)
239 return -ENOMEM;
240
241 runtime->dma_bytes = size;
242
243 return 0;
244}
245
246static int snd_cx18_pcm_hw_params(struct snd_pcm_substream *substream,
247 struct snd_pcm_hw_params *params)
248{
249 int ret;
250
251 dprintk("%s called\n", __func__);
252
253 ret = snd_pcm_alloc_vmalloc_buffer(substream,
254 params_buffer_bytes(params));
255 return 0;
256}
257
258static int snd_cx18_pcm_hw_free(struct snd_pcm_substream *substream)
259{
260 struct snd_cx18_card *cxsc = snd_pcm_substream_chip(substream);
261 unsigned long flags;
262
263 spin_lock_irqsave(&cxsc->slock, flags);
264 if (substream->runtime->dma_area) {
265 dprintk("freeing pcm capture region\n");
266 vfree(substream->runtime->dma_area);
267 substream->runtime->dma_area = NULL;
268 }
269 spin_unlock_irqrestore(&cxsc->slock, flags);
270
271 return 0;
272}
273
274static int snd_cx18_pcm_prepare(struct snd_pcm_substream *substream)
275{
276 struct snd_cx18_card *cxsc = snd_pcm_substream_chip(substream);
277
278 cxsc->hwptr_done_capture = 0;
279 cxsc->capture_transfer_done = 0;
280
281 return 0;
282}
283
284static int snd_cx18_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
285{
286 return 0;
287}
288
289static
290snd_pcm_uframes_t snd_cx18_pcm_pointer(struct snd_pcm_substream *substream)
291{
292 unsigned long flags;
293 snd_pcm_uframes_t hwptr_done;
294 struct snd_cx18_card *cxsc = snd_pcm_substream_chip(substream);
295
296 spin_lock_irqsave(&cxsc->slock, flags);
297 hwptr_done = cxsc->hwptr_done_capture;
298 spin_unlock_irqrestore(&cxsc->slock, flags);
299
300 return hwptr_done;
301}
302
303static struct page *snd_pcm_get_vmalloc_page(struct snd_pcm_substream *subs,
304 unsigned long offset)
305{
306 void *pageptr = subs->runtime->dma_area + offset;
307
308 return vmalloc_to_page(pageptr);
309}
310
311static struct snd_pcm_ops snd_cx18_pcm_capture_ops = {
312 .open = snd_cx18_pcm_capture_open,
313 .close = snd_cx18_pcm_capture_close,
314 .ioctl = snd_cx18_pcm_ioctl,
315 .hw_params = snd_cx18_pcm_hw_params,
316 .hw_free = snd_cx18_pcm_hw_free,
317 .prepare = snd_cx18_pcm_prepare,
318 .trigger = snd_cx18_pcm_trigger,
319 .pointer = snd_cx18_pcm_pointer,
320 .page = snd_pcm_get_vmalloc_page,
321};
322
323int snd_cx18_pcm_create(struct snd_cx18_card *cxsc)
324{
325 struct snd_pcm *sp;
326 struct snd_card *sc = cxsc->sc;
327 struct v4l2_device *v4l2_dev = cxsc->v4l2_dev;
328 struct cx18 *cx = to_cx18(v4l2_dev);
329 int ret;
330
331 ret = snd_pcm_new(sc, "CX23418 PCM",
332 0, /* PCM device 0, the only one for this card */
333 0, /* 0 playback substreams */
334 1, /* 1 capture substream */
335 &sp);
336 if (ret) {
337 CX18_ALSA_ERR("%s: snd_cx18_pcm_create() failed with err %d\n",
338 __func__, ret);
339 goto err_exit;
340 }
341
342 spin_lock_init(&cxsc->slock);
343
344 snd_pcm_set_ops(sp, SNDRV_PCM_STREAM_CAPTURE,
345 &snd_cx18_pcm_capture_ops);
346 sp->info_flags = 0;
347 sp->private_data = cxsc;
348 strlcpy(sp->name, cx->card_name, sizeof(sp->name));
349
350 return 0;
351
352err_exit:
353 return ret;
354}
diff --git a/drivers/media/video/cx18/cx18-alsa-pcm.h b/drivers/media/video/cx18/cx18-alsa-pcm.h
new file mode 100644
index 000000000000..325662c647a0
--- /dev/null
+++ b/drivers/media/video/cx18/cx18-alsa-pcm.h
@@ -0,0 +1,27 @@
1/*
2 * ALSA PCM device for the
3 * ALSA interface to cx18 PCM capture streams
4 *
5 * Copyright (C) 2009 Andy Walls <awalls@radix.net>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
20 * 02111-1307 USA
21 */
22
23int __init snd_cx18_pcm_create(struct snd_cx18_card *cxsc);
24
25/* Used by cx18-mailbox to announce the PCM data to the module */
26void cx18_alsa_announce_pcm_data(struct snd_cx18_card *card, u8 *pcm_data,
27 size_t num_bytes);
diff --git a/drivers/media/video/cx18/cx18-alsa.h b/drivers/media/video/cx18/cx18-alsa.h
new file mode 100644
index 000000000000..88a1cde7540b
--- /dev/null
+++ b/drivers/media/video/cx18/cx18-alsa.h
@@ -0,0 +1,75 @@
1/*
2 * ALSA interface to cx18 PCM capture streams
3 *
4 * Copyright (C) 2009 Andy Walls <awalls@radix.net>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
19 * 02111-1307 USA
20 */
21
22struct snd_card;
23
24struct snd_cx18_card {
25 struct v4l2_device *v4l2_dev;
26 struct snd_card *sc;
27 unsigned int capture_transfer_done;
28 unsigned int hwptr_done_capture;
29 struct snd_pcm_substream *capture_pcm_substream;
30 spinlock_t slock;
31};
32
33extern int cx18_alsa_debug;
34
35/*
36 * File operations that manipulate the encoder or video or audio subdevices
37 * need to be serialized. Use the same lock we use for v4l2 file ops.
38 */
39static inline void snd_cx18_lock(struct snd_cx18_card *cxsc)
40{
41 struct cx18 *cx = to_cx18(cxsc->v4l2_dev);
42 mutex_lock(&cx->serialize_lock);
43}
44
45static inline void snd_cx18_unlock(struct snd_cx18_card *cxsc)
46{
47 struct cx18 *cx = to_cx18(cxsc->v4l2_dev);
48 mutex_unlock(&cx->serialize_lock);
49}
50
51#define CX18_ALSA_DBGFLG_WARN (1 << 0)
52#define CX18_ALSA_DBGFLG_WARN (1 << 0)
53#define CX18_ALSA_DBGFLG_INFO (1 << 1)
54
55#define CX18_ALSA_DEBUG(x, type, fmt, args...) \
56 do { \
57 if ((x) & cx18_alsa_debug) \
58 printk(KERN_INFO "%s-alsa: " type ": " fmt, \
59 v4l2_dev->name , ## args); \
60 } while (0)
61
62#define CX18_ALSA_DEBUG_WARN(fmt, args...) \
63 CX18_ALSA_DEBUG(CX18_ALSA_DBGFLG_WARN, "warning", fmt , ## args)
64
65#define CX18_ALSA_DEBUG_INFO(fmt, args...) \
66 CX18_ALSA_DEBUG(CX18_ALSA_DBGFLG_INFO, "info", fmt , ## args)
67
68#define CX18_ALSA_ERR(fmt, args...) \
69 printk(KERN_ERR "%s-alsa: " fmt, v4l2_dev->name , ## args)
70
71#define CX18_ALSA_WARN(fmt, args...) \
72 printk(KERN_WARNING "%s-alsa: " fmt, v4l2_dev->name , ## args)
73
74#define CX18_ALSA_INFO(fmt, args...) \
75 printk(KERN_INFO "%s-alsa: " fmt, v4l2_dev->name , ## args)
diff --git a/drivers/media/video/cx18/cx18-cards.c b/drivers/media/video/cx18/cx18-cards.c
index f11e47a58286..f808fb6fc1c1 100644
--- a/drivers/media/video/cx18/cx18-cards.c
+++ b/drivers/media/video/cx18/cx18-cards.c
@@ -393,7 +393,7 @@ static const struct cx18_card cx18_card_leadtek_pvr2100 = {
393 .gpio_init.direction = 0x7, 393 .gpio_init.direction = 0x7,
394 .gpio_audio_input = { .mask = 0x7, 394 .gpio_audio_input = { .mask = 0x7,
395 .tuner = 0x6, .linein = 0x2, .radio = 0x2 }, 395 .tuner = 0x6, .linein = 0x2, .radio = 0x2 },
396 .xceive_pin = 15, 396 .xceive_pin = 1,
397 .pci_list = cx18_pci_leadtek_pvr2100, 397 .pci_list = cx18_pci_leadtek_pvr2100,
398 .i2c = &cx18_i2c_std, 398 .i2c = &cx18_i2c_std,
399}; 399};
diff --git a/drivers/media/video/cx18/cx18-driver.c b/drivers/media/video/cx18/cx18-driver.c
index 7f65a47f12e1..c95a86ba33b0 100644
--- a/drivers/media/video/cx18/cx18-driver.c
+++ b/drivers/media/video/cx18/cx18-driver.c
@@ -47,6 +47,10 @@
47 setting this to 1 you ensure that radio0 is now also radio1. */ 47 setting this to 1 you ensure that radio0 is now also radio1. */
48int cx18_first_minor; 48int cx18_first_minor;
49 49
50/* Callback for registering extensions */
51int (*cx18_ext_init)(struct cx18 *);
52EXPORT_SYMBOL(cx18_ext_init);
53
50/* add your revision and whatnot here */ 54/* add your revision and whatnot here */
51static struct pci_device_id cx18_pci_tbl[] __devinitdata = { 55static struct pci_device_id cx18_pci_tbl[] __devinitdata = {
52 {PCI_VENDOR_ID_CX, PCI_DEVICE_ID_CX23418, 56 {PCI_VENDOR_ID_CX, PCI_DEVICE_ID_CX23418,
@@ -91,7 +95,7 @@ static int enc_pcm_bufsize = CX18_DEFAULT_ENC_PCM_BUFSIZE;
91 95
92static int enc_ts_bufs = -1; 96static int enc_ts_bufs = -1;
93static int enc_mpg_bufs = -1; 97static int enc_mpg_bufs = -1;
94static int enc_idx_bufs = -1; 98static int enc_idx_bufs = CX18_MAX_FW_MDLS_PER_STREAM;
95static int enc_yuv_bufs = -1; 99static int enc_yuv_bufs = -1;
96static int enc_vbi_bufs = -1; 100static int enc_vbi_bufs = -1;
97static int enc_pcm_bufs = -1; 101static int enc_pcm_bufs = -1;
@@ -196,14 +200,17 @@ MODULE_PARM_DESC(enc_mpg_bufs,
196 "Number of encoder MPG buffers\n" 200 "Number of encoder MPG buffers\n"
197 "\t\t\tDefault is computed from other enc_mpg_* parameters"); 201 "\t\t\tDefault is computed from other enc_mpg_* parameters");
198MODULE_PARM_DESC(enc_idx_buffers, 202MODULE_PARM_DESC(enc_idx_buffers,
199 "Encoder IDX buffer memory (MB). (enc_idx_bufs can override)\n" 203 "(Deprecated) Encoder IDX buffer memory (MB)\n"
200 "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_IDX_BUFFERS)); 204 "\t\t\tIgnored, except 0 disables IDX buffer allocations\n"
205 "\t\t\tDefault: 1 [Enabled]");
201MODULE_PARM_DESC(enc_idx_bufsize, 206MODULE_PARM_DESC(enc_idx_bufsize,
202 "Size of an encoder IDX buffer (kB)\n" 207 "Size of an encoder IDX buffer (kB)\n"
203 "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_IDX_BUFSIZE)); 208 "\t\t\tAllowed values are multiples of 1.5 kB rounded up\n"
209 "\t\t\t(multiples of size required for 64 index entries)\n"
210 "\t\t\tDefault: 2");
204MODULE_PARM_DESC(enc_idx_bufs, 211MODULE_PARM_DESC(enc_idx_bufs,
205 "Number of encoder IDX buffers\n" 212 "Number of encoder IDX buffers\n"
206 "\t\t\tDefault is computed from other enc_idx_* parameters"); 213 "\t\t\tDefault: " __stringify(CX18_MAX_FW_MDLS_PER_STREAM));
207MODULE_PARM_DESC(enc_yuv_buffers, 214MODULE_PARM_DESC(enc_yuv_buffers,
208 "Encoder YUV buffer memory (MB). (enc_yuv_bufs can override)\n" 215 "Encoder YUV buffer memory (MB). (enc_yuv_bufs can override)\n"
209 "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_YUV_BUFFERS)); 216 "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_YUV_BUFFERS));
@@ -231,7 +238,8 @@ MODULE_PARM_DESC(enc_pcm_bufs,
231 "Number of encoder PCM buffers\n" 238 "Number of encoder PCM buffers\n"
232 "\t\t\tDefault is computed from other enc_pcm_* parameters"); 239 "\t\t\tDefault is computed from other enc_pcm_* parameters");
233 240
234MODULE_PARM_DESC(cx18_first_minor, "Set device node number assigned to first card"); 241MODULE_PARM_DESC(cx18_first_minor,
242 "Set device node number assigned to first card");
235 243
236MODULE_AUTHOR("Hans Verkuil"); 244MODULE_AUTHOR("Hans Verkuil");
237MODULE_DESCRIPTION("CX23418 driver"); 245MODULE_DESCRIPTION("CX23418 driver");
@@ -240,6 +248,28 @@ MODULE_LICENSE("GPL");
240 248
241MODULE_VERSION(CX18_VERSION); 249MODULE_VERSION(CX18_VERSION);
242 250
251#if defined(CONFIG_MODULES) && defined(MODULE)
252static void request_module_async(struct work_struct *work)
253{
254 struct cx18 *dev = container_of(work, struct cx18, request_module_wk);
255
256 /* Make sure cx18-alsa module is loaded */
257 request_module("cx18-alsa");
258
259 /* Initialize cx18-alsa for this instance of the cx18 device */
260 if (cx18_ext_init != NULL)
261 cx18_ext_init(dev);
262}
263
264static void request_modules(struct cx18 *dev)
265{
266 INIT_WORK(&dev->request_module_wk, request_module_async);
267 schedule_work(&dev->request_module_wk);
268}
269#else
270#define request_modules(dev)
271#endif /* CONFIG_MODULES */
272
243/* Generic utility functions */ 273/* Generic utility functions */
244int cx18_msleep_timeout(unsigned int msecs, int intr) 274int cx18_msleep_timeout(unsigned int msecs, int intr)
245{ 275{
@@ -501,7 +531,12 @@ static void cx18_process_options(struct cx18 *cx)
501 /* 531 /*
502 * YUV is a special case where the stream_buf_size needs to be 532 * YUV is a special case where the stream_buf_size needs to be
503 * an integral multiple of 33.75 kB (storage for 32 screens 533 * an integral multiple of 33.75 kB (storage for 32 screens
504 * lines to maintain alignment in case of lost buffers 534 * lines to maintain alignment in case of lost buffers).
535 *
536 * IDX is a special case where the stream_buf_size should be
537 * an integral multiple of 1.5 kB (storage for 64 index entries
538 * to maintain alignment in case of lost buffers).
539 *
505 */ 540 */
506 if (i == CX18_ENC_STREAM_TYPE_YUV) { 541 if (i == CX18_ENC_STREAM_TYPE_YUV) {
507 cx->stream_buf_size[i] *= 1024; 542 cx->stream_buf_size[i] *= 1024;
@@ -511,15 +546,24 @@ static void cx18_process_options(struct cx18 *cx)
511 if (cx->stream_buf_size[i] < CX18_UNIT_ENC_YUV_BUFSIZE) 546 if (cx->stream_buf_size[i] < CX18_UNIT_ENC_YUV_BUFSIZE)
512 cx->stream_buf_size[i] = 547 cx->stream_buf_size[i] =
513 CX18_UNIT_ENC_YUV_BUFSIZE; 548 CX18_UNIT_ENC_YUV_BUFSIZE;
549 } else if (i == CX18_ENC_STREAM_TYPE_IDX) {
550 cx->stream_buf_size[i] *= 1024;
551 cx->stream_buf_size[i] -=
552 (cx->stream_buf_size[i] % CX18_UNIT_ENC_IDX_BUFSIZE);
553
554 if (cx->stream_buf_size[i] < CX18_UNIT_ENC_IDX_BUFSIZE)
555 cx->stream_buf_size[i] =
556 CX18_UNIT_ENC_IDX_BUFSIZE;
514 } 557 }
515 /* 558 /*
516 * YUV is a special case where the stream_buf_size is 559 * YUV and IDX are special cases where the stream_buf_size is
517 * now in bytes. 560 * now in bytes.
518 * VBI is a special case where the stream_buf_size is fixed 561 * VBI is a special case where the stream_buf_size is fixed
519 * and already in bytes 562 * and already in bytes
520 */ 563 */
521 if (i == CX18_ENC_STREAM_TYPE_VBI || 564 if (i == CX18_ENC_STREAM_TYPE_VBI ||
522 i == CX18_ENC_STREAM_TYPE_YUV) { 565 i == CX18_ENC_STREAM_TYPE_YUV ||
566 i == CX18_ENC_STREAM_TYPE_IDX) {
523 if (cx->stream_buffers[i] < 0) { 567 if (cx->stream_buffers[i] < 0) {
524 cx->stream_buffers[i] = 568 cx->stream_buffers[i] =
525 cx->options.megabytes[i] * 1024 * 1024 569 cx->options.megabytes[i] * 1024 * 1024
@@ -1032,6 +1076,10 @@ static int __devinit cx18_probe(struct pci_dev *pci_dev,
1032 } 1076 }
1033 1077
1034 CX18_INFO("Initialized card: %s\n", cx->card_name); 1078 CX18_INFO("Initialized card: %s\n", cx->card_name);
1079
1080 /* Load cx18 submodules (cx18-alsa) */
1081 request_modules(cx);
1082
1035 return 0; 1083 return 0;
1036 1084
1037free_streams: 1085free_streams:
@@ -1220,6 +1268,7 @@ static void cx18_remove(struct pci_dev *pci_dev)
1220 kfree(cx); 1268 kfree(cx);
1221} 1269}
1222 1270
1271
1223/* define a pci_driver for card detection */ 1272/* define a pci_driver for card detection */
1224static struct pci_driver cx18_pci_driver = { 1273static struct pci_driver cx18_pci_driver = {
1225 .name = "cx18", 1274 .name = "cx18",
@@ -1230,7 +1279,8 @@ static struct pci_driver cx18_pci_driver = {
1230 1279
1231static int __init module_start(void) 1280static int __init module_start(void)
1232{ 1281{
1233 printk(KERN_INFO "cx18: Start initialization, version %s\n", CX18_VERSION); 1282 printk(KERN_INFO "cx18: Start initialization, version %s\n",
1283 CX18_VERSION);
1234 1284
1235 /* Validate parameters */ 1285 /* Validate parameters */
1236 if (cx18_first_minor < 0 || cx18_first_minor >= CX18_MAX_CARDS) { 1286 if (cx18_first_minor < 0 || cx18_first_minor >= CX18_MAX_CARDS) {
diff --git a/drivers/media/video/cx18/cx18-driver.h b/drivers/media/video/cx18/cx18-driver.h
index e3f7911a7385..23ad6d548dc5 100644
--- a/drivers/media/video/cx18/cx18-driver.h
+++ b/drivers/media/video/cx18/cx18-driver.h
@@ -126,10 +126,22 @@
126#define CX18_625_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 576/32) 126#define CX18_625_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 576/32)
127#define CX18_525_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 480/32) 127#define CX18_525_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 480/32)
128 128
129/* IDX buffer size should be a multiple of the index entry size from the chip */
130struct cx18_enc_idx_entry {
131 __le32 length;
132 __le32 offset_low;
133 __le32 offset_high;
134 __le32 flags;
135 __le32 pts_low;
136 __le32 pts_high;
137} __attribute__ ((packed));
138#define CX18_UNIT_ENC_IDX_BUFSIZE \
139 (sizeof(struct cx18_enc_idx_entry) * V4L2_ENC_IDX_ENTRIES)
140
129/* DMA buffer, default size in kB allocated */ 141/* DMA buffer, default size in kB allocated */
130#define CX18_DEFAULT_ENC_TS_BUFSIZE 32 142#define CX18_DEFAULT_ENC_TS_BUFSIZE 32
131#define CX18_DEFAULT_ENC_MPG_BUFSIZE 32 143#define CX18_DEFAULT_ENC_MPG_BUFSIZE 32
132#define CX18_DEFAULT_ENC_IDX_BUFSIZE 32 144#define CX18_DEFAULT_ENC_IDX_BUFSIZE (CX18_UNIT_ENC_IDX_BUFSIZE * 1 / 1024 + 1)
133#define CX18_DEFAULT_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1) 145#define CX18_DEFAULT_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1)
134#define CX18_DEFAULT_ENC_PCM_BUFSIZE 4 146#define CX18_DEFAULT_ENC_PCM_BUFSIZE 4
135 147
@@ -234,16 +246,8 @@
234#define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args) 246#define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args)
235#define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args) 247#define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args)
236 248
237/* Values for CX18_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
238#define MPEG_FRAME_TYPE_IFRAME 1
239#define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
240#define MPEG_FRAME_TYPE_ALL 7
241
242#define CX18_MAX_PGM_INDEX (400)
243
244extern int cx18_debug; 249extern int cx18_debug;
245 250
246
247struct cx18_options { 251struct cx18_options {
248 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */ 252 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
249 int cardtype; /* force card type on load */ 253 int cardtype; /* force card type on load */
@@ -276,6 +280,18 @@ struct cx18_options {
276#define CX18_SLICED_TYPE_WSS_625 (5) 280#define CX18_SLICED_TYPE_WSS_625 (5)
277#define CX18_SLICED_TYPE_VPS (7) 281#define CX18_SLICED_TYPE_VPS (7)
278 282
283/**
284 * list_entry_is_past_end - check if a previous loop cursor is off list end
285 * @pos: the type * previously used as a loop cursor.
286 * @head: the head for your list.
287 * @member: the name of the list_struct within the struct.
288 *
289 * Check if the entry's list_head is the head of the list, thus it's not a
290 * real entry but was the loop cursor that walked past the end
291 */
292#define list_entry_is_past_end(pos, head, member) \
293 (&pos->member == (head))
294
279struct cx18_buffer { 295struct cx18_buffer {
280 struct list_head list; 296 struct list_head list;
281 dma_addr_t dma_handle; 297 dma_addr_t dma_handle;
@@ -558,6 +574,10 @@ struct cx18 {
558 int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */ 574 int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */
559 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */ 575 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
560 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */ 576 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */
577 struct snd_cx18_card *alsa; /* ALSA interface for PCM capture stream */
578 void (*pcm_announce_callback)(struct snd_cx18_card *card, u8 *pcm_data,
579 size_t num_bytes);
580
561 unsigned long i_flags; /* global cx18 flags */ 581 unsigned long i_flags; /* global cx18 flags */
562 atomic_t ana_capturing; /* count number of active analog capture streams */ 582 atomic_t ana_capturing; /* count number of active analog capture streams */
563 atomic_t tot_capturing; /* total count number of active capture streams */ 583 atomic_t tot_capturing; /* total count number of active capture streams */
@@ -575,12 +595,6 @@ struct cx18 {
575 595
576 struct vbi_info vbi; 596 struct vbi_info vbi;
577 597
578 u32 pgm_info_offset;
579 u32 pgm_info_num;
580 u32 pgm_info_write_idx;
581 u32 pgm_info_read_idx;
582 struct v4l2_enc_idx_entry pgm_info[CX18_MAX_PGM_INDEX];
583
584 u64 mpg_data_received; 598 u64 mpg_data_received;
585 u64 vbi_data_inserted; 599 u64 vbi_data_inserted;
586 600
@@ -623,6 +637,9 @@ struct cx18 {
623 u32 active_input; 637 u32 active_input;
624 v4l2_std_id std; 638 v4l2_std_id std;
625 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */ 639 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
640
641 /* Used for cx18-alsa module loading */
642 struct work_struct request_module_wk;
626}; 643};
627 644
628static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev) 645static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev)
@@ -630,6 +647,9 @@ static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev)
630 return container_of(v4l2_dev, struct cx18, v4l2_dev); 647 return container_of(v4l2_dev, struct cx18, v4l2_dev);
631} 648}
632 649
650/* cx18 extensions to be loaded */
651extern int (*cx18_ext_init)(struct cx18 *);
652
633/* Globals */ 653/* Globals */
634extern int cx18_first_minor; 654extern int cx18_first_minor;
635 655
diff --git a/drivers/media/video/cx18/cx18-dvb.c b/drivers/media/video/cx18/cx18-dvb.c
index 71ad2d1b4c2c..0ae2c2e1eab5 100644
--- a/drivers/media/video/cx18/cx18-dvb.c
+++ b/drivers/media/video/cx18/cx18-dvb.c
@@ -213,10 +213,14 @@ static int cx18_dvb_start_feed(struct dvb_demux_feed *feed)
213{ 213{
214 struct dvb_demux *demux = feed->demux; 214 struct dvb_demux *demux = feed->demux;
215 struct cx18_stream *stream = (struct cx18_stream *) demux->priv; 215 struct cx18_stream *stream = (struct cx18_stream *) demux->priv;
216 struct cx18 *cx = stream->cx; 216 struct cx18 *cx;
217 int ret; 217 int ret;
218 u32 v; 218 u32 v;
219 219
220 if (!stream)
221 return -EINVAL;
222
223 cx = stream->cx;
220 CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n", 224 CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n",
221 feed->pid, feed->index); 225 feed->pid, feed->index);
222 226
@@ -253,12 +257,10 @@ static int cx18_dvb_start_feed(struct dvb_demux_feed *feed)
253 if (!demux->dmx.frontend) 257 if (!demux->dmx.frontend)
254 return -EINVAL; 258 return -EINVAL;
255 259
256 if (!stream)
257 return -EINVAL;
258
259 mutex_lock(&stream->dvb.feedlock); 260 mutex_lock(&stream->dvb.feedlock);
260 if (stream->dvb.feeding++ == 0) { 261 if (stream->dvb.feeding++ == 0) {
261 CX18_DEBUG_INFO("Starting Transport DMA\n"); 262 CX18_DEBUG_INFO("Starting Transport DMA\n");
263 mutex_lock(&cx->serialize_lock);
262 set_bit(CX18_F_S_STREAMING, &stream->s_flags); 264 set_bit(CX18_F_S_STREAMING, &stream->s_flags);
263 ret = cx18_start_v4l2_encode_stream(stream); 265 ret = cx18_start_v4l2_encode_stream(stream);
264 if (ret < 0) { 266 if (ret < 0) {
@@ -267,6 +269,7 @@ static int cx18_dvb_start_feed(struct dvb_demux_feed *feed)
267 if (stream->dvb.feeding == 0) 269 if (stream->dvb.feeding == 0)
268 clear_bit(CX18_F_S_STREAMING, &stream->s_flags); 270 clear_bit(CX18_F_S_STREAMING, &stream->s_flags);
269 } 271 }
272 mutex_unlock(&cx->serialize_lock);
270 } else 273 } else
271 ret = 0; 274 ret = 0;
272 mutex_unlock(&stream->dvb.feedlock); 275 mutex_unlock(&stream->dvb.feedlock);
@@ -279,17 +282,20 @@ static int cx18_dvb_stop_feed(struct dvb_demux_feed *feed)
279{ 282{
280 struct dvb_demux *demux = feed->demux; 283 struct dvb_demux *demux = feed->demux;
281 struct cx18_stream *stream = (struct cx18_stream *)demux->priv; 284 struct cx18_stream *stream = (struct cx18_stream *)demux->priv;
282 struct cx18 *cx = stream->cx; 285 struct cx18 *cx;
283 int ret = -EINVAL; 286 int ret = -EINVAL;
284 287
285 CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n",
286 feed->pid, feed->index);
287
288 if (stream) { 288 if (stream) {
289 cx = stream->cx;
290 CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n",
291 feed->pid, feed->index);
292
289 mutex_lock(&stream->dvb.feedlock); 293 mutex_lock(&stream->dvb.feedlock);
290 if (--stream->dvb.feeding == 0) { 294 if (--stream->dvb.feeding == 0) {
291 CX18_DEBUG_INFO("Stopping Transport DMA\n"); 295 CX18_DEBUG_INFO("Stopping Transport DMA\n");
296 mutex_lock(&cx->serialize_lock);
292 ret = cx18_stop_v4l2_encode_stream(stream, 0); 297 ret = cx18_stop_v4l2_encode_stream(stream, 0);
298 mutex_unlock(&cx->serialize_lock);
293 } else 299 } else
294 ret = 0; 300 ret = 0;
295 mutex_unlock(&stream->dvb.feedlock); 301 mutex_unlock(&stream->dvb.feedlock);
diff --git a/drivers/media/video/cx18/cx18-fileops.c b/drivers/media/video/cx18/cx18-fileops.c
index c0885c69fd89..863ce7758239 100644
--- a/drivers/media/video/cx18/cx18-fileops.c
+++ b/drivers/media/video/cx18/cx18-fileops.c
@@ -37,15 +37,21 @@
37 37
38/* This function tries to claim the stream for a specific file descriptor. 38/* This function tries to claim the stream for a specific file descriptor.
39 If no one else is using this stream then the stream is claimed and 39 If no one else is using this stream then the stream is claimed and
40 associated VBI streams are also automatically claimed. 40 associated VBI and IDX streams are also automatically claimed.
41 Possible error returns: -EBUSY if someone else has claimed 41 Possible error returns: -EBUSY if someone else has claimed
42 the stream or 0 on success. */ 42 the stream or 0 on success. */
43static int cx18_claim_stream(struct cx18_open_id *id, int type) 43int cx18_claim_stream(struct cx18_open_id *id, int type)
44{ 44{
45 struct cx18 *cx = id->cx; 45 struct cx18 *cx = id->cx;
46 struct cx18_stream *s = &cx->streams[type]; 46 struct cx18_stream *s = &cx->streams[type];
47 struct cx18_stream *s_vbi; 47 struct cx18_stream *s_assoc;
48 int vbi_type; 48
49 /* Nothing should ever try to directly claim the IDX stream */
50 if (type == CX18_ENC_STREAM_TYPE_IDX) {
51 CX18_WARN("MPEG Index stream cannot be claimed "
52 "directly, but something tried.\n");
53 return -EINVAL;
54 }
49 55
50 if (test_and_set_bit(CX18_F_S_CLAIMED, &s->s_flags)) { 56 if (test_and_set_bit(CX18_F_S_CLAIMED, &s->s_flags)) {
51 /* someone already claimed this stream */ 57 /* someone already claimed this stream */
@@ -67,32 +73,47 @@ static int cx18_claim_stream(struct cx18_open_id *id, int type)
67 } 73 }
68 s->id = id->open_id; 74 s->id = id->open_id;
69 75
70 /* CX18_ENC_STREAM_TYPE_MPG needs to claim CX18_ENC_STREAM_TYPE_VBI 76 /*
71 (provided VBI insertion is on and sliced VBI is selected), for all 77 * CX18_ENC_STREAM_TYPE_MPG needs to claim:
72 other streams we're done */ 78 * CX18_ENC_STREAM_TYPE_VBI, if VBI insertion is on for sliced VBI, or
73 if (type == CX18_ENC_STREAM_TYPE_MPG && 79 * CX18_ENC_STREAM_TYPE_IDX, if VBI insertion is off for sliced VBI
74 cx->vbi.insert_mpeg && !cx18_raw_vbi(cx)) { 80 * (We don't yet fix up MPEG Index entries for our inserted packets).
75 vbi_type = CX18_ENC_STREAM_TYPE_VBI; 81 *
76 } else { 82 * For all other streams we're done.
83 */
84 if (type != CX18_ENC_STREAM_TYPE_MPG)
77 return 0; 85 return 0;
78 }
79 s_vbi = &cx->streams[vbi_type];
80 86
81 set_bit(CX18_F_S_CLAIMED, &s_vbi->s_flags); 87 s_assoc = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
88 if (cx->vbi.insert_mpeg && !cx18_raw_vbi(cx))
89 s_assoc = &cx->streams[CX18_ENC_STREAM_TYPE_VBI];
90 else if (!cx18_stream_enabled(s_assoc))
91 return 0;
92
93 set_bit(CX18_F_S_CLAIMED, &s_assoc->s_flags);
82 94
83 /* mark that it is used internally */ 95 /* mark that it is used internally */
84 set_bit(CX18_F_S_INTERNAL_USE, &s_vbi->s_flags); 96 set_bit(CX18_F_S_INTERNAL_USE, &s_assoc->s_flags);
85 return 0; 97 return 0;
86} 98}
99EXPORT_SYMBOL(cx18_claim_stream);
87 100
88/* This function releases a previously claimed stream. It will take into 101/* This function releases a previously claimed stream. It will take into
89 account associated VBI streams. */ 102 account associated VBI streams. */
90static void cx18_release_stream(struct cx18_stream *s) 103void cx18_release_stream(struct cx18_stream *s)
91{ 104{
92 struct cx18 *cx = s->cx; 105 struct cx18 *cx = s->cx;
93 struct cx18_stream *s_vbi; 106 struct cx18_stream *s_assoc;
94 107
95 s->id = -1; 108 s->id = -1;
109 if (s->type == CX18_ENC_STREAM_TYPE_IDX) {
110 /*
111 * The IDX stream is only used internally, and can
112 * only be indirectly unclaimed by unclaiming the MPG stream.
113 */
114 return;
115 }
116
96 if (s->type == CX18_ENC_STREAM_TYPE_VBI && 117 if (s->type == CX18_ENC_STREAM_TYPE_VBI &&
97 test_bit(CX18_F_S_INTERNAL_USE, &s->s_flags)) { 118 test_bit(CX18_F_S_INTERNAL_USE, &s->s_flags)) {
98 /* this stream is still in use internally */ 119 /* this stream is still in use internally */
@@ -105,25 +126,36 @@ static void cx18_release_stream(struct cx18_stream *s)
105 126
106 cx18_flush_queues(s); 127 cx18_flush_queues(s);
107 128
108 /* CX18_ENC_STREAM_TYPE_MPG needs to release CX18_ENC_STREAM_TYPE_VBI, 129 /*
109 for all other streams we're done */ 130 * CX18_ENC_STREAM_TYPE_MPG needs to release the
110 if (s->type == CX18_ENC_STREAM_TYPE_MPG) 131 * CX18_ENC_STREAM_TYPE_VBI and/or CX18_ENC_STREAM_TYPE_IDX streams.
111 s_vbi = &cx->streams[CX18_ENC_STREAM_TYPE_VBI]; 132 *
112 else 133 * For all other streams we're done.
134 */
135 if (s->type != CX18_ENC_STREAM_TYPE_MPG)
113 return; 136 return;
114 137
115 /* clear internal use flag */ 138 /* Unclaim the associated MPEG Index stream */
116 if (!test_and_clear_bit(CX18_F_S_INTERNAL_USE, &s_vbi->s_flags)) { 139 s_assoc = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
117 /* was already cleared */ 140 if (test_and_clear_bit(CX18_F_S_INTERNAL_USE, &s_assoc->s_flags)) {
118 return; 141 clear_bit(CX18_F_S_CLAIMED, &s_assoc->s_flags);
142 cx18_flush_queues(s_assoc);
119 } 143 }
120 if (s_vbi->id != -1) { 144
121 /* VBI stream still claimed by a file descriptor */ 145 /* Unclaim the associated VBI stream */
122 return; 146 s_assoc = &cx->streams[CX18_ENC_STREAM_TYPE_VBI];
147 if (test_and_clear_bit(CX18_F_S_INTERNAL_USE, &s_assoc->s_flags)) {
148 if (s_assoc->id == -1) {
149 /*
150 * The VBI stream is not still claimed by a file
151 * descriptor, so completely unclaim it.
152 */
153 clear_bit(CX18_F_S_CLAIMED, &s_assoc->s_flags);
154 cx18_flush_queues(s_assoc);
155 }
123 } 156 }
124 clear_bit(CX18_F_S_CLAIMED, &s_vbi->s_flags);
125 cx18_flush_queues(s_vbi);
126} 157}
158EXPORT_SYMBOL(cx18_release_stream);
127 159
128static void cx18_dualwatch(struct cx18 *cx) 160static void cx18_dualwatch(struct cx18 *cx)
129{ 161{
@@ -177,9 +209,7 @@ static struct cx18_mdl *cx18_get_mdl(struct cx18_stream *s, int non_block,
177 *err = 0; 209 *err = 0;
178 while (1) { 210 while (1) {
179 if (s->type == CX18_ENC_STREAM_TYPE_MPG) { 211 if (s->type == CX18_ENC_STREAM_TYPE_MPG) {
180 /* Process pending program info updates and pending 212 /* Process pending program updates and VBI data */
181 VBI data */
182
183 if (time_after(jiffies, cx->dualwatch_jiffies + msecs_to_jiffies(1000))) { 213 if (time_after(jiffies, cx->dualwatch_jiffies + msecs_to_jiffies(1000))) {
184 cx->dualwatch_jiffies = jiffies; 214 cx->dualwatch_jiffies = jiffies;
185 cx18_dualwatch(cx); 215 cx18_dualwatch(cx);
@@ -362,18 +392,6 @@ static size_t cx18_copy_buf_to_user(struct cx18_stream *s,
362 return len; 392 return len;
363} 393}
364 394
365/**
366 * list_entry_is_past_end - check if a previous loop cursor is off list end
367 * @pos: the type * previously used as a loop cursor.
368 * @head: the head for your list.
369 * @member: the name of the list_struct within the struct.
370 *
371 * Check if the entry's list_head is the head of the list, thus it's not a
372 * real entry but was the loop cursor that walked past the end
373 */
374#define list_entry_is_past_end(pos, head, member) \
375 (&pos->member == (head))
376
377static size_t cx18_copy_mdl_to_user(struct cx18_stream *s, 395static size_t cx18_copy_mdl_to_user(struct cx18_stream *s,
378 struct cx18_mdl *mdl, char __user *ubuf, size_t ucount) 396 struct cx18_mdl *mdl, char __user *ubuf, size_t ucount)
379{ 397{
@@ -498,6 +516,7 @@ int cx18_start_capture(struct cx18_open_id *id)
498 struct cx18 *cx = id->cx; 516 struct cx18 *cx = id->cx;
499 struct cx18_stream *s = &cx->streams[id->type]; 517 struct cx18_stream *s = &cx->streams[id->type];
500 struct cx18_stream *s_vbi; 518 struct cx18_stream *s_vbi;
519 struct cx18_stream *s_idx;
501 520
502 if (s->type == CX18_ENC_STREAM_TYPE_RAD) { 521 if (s->type == CX18_ENC_STREAM_TYPE_RAD) {
503 /* you cannot read from these stream types. */ 522 /* you cannot read from these stream types. */
@@ -516,25 +535,33 @@ int cx18_start_capture(struct cx18_open_id *id)
516 return 0; 535 return 0;
517 } 536 }
518 537
519 /* Start VBI capture if required */ 538 /* Start associated VBI or IDX stream capture if required */
520 s_vbi = &cx->streams[CX18_ENC_STREAM_TYPE_VBI]; 539 s_vbi = &cx->streams[CX18_ENC_STREAM_TYPE_VBI];
521 if (s->type == CX18_ENC_STREAM_TYPE_MPG && 540 s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
522 test_bit(CX18_F_S_INTERNAL_USE, &s_vbi->s_flags) && 541 if (s->type == CX18_ENC_STREAM_TYPE_MPG) {
523 !test_and_set_bit(CX18_F_S_STREAMING, &s_vbi->s_flags)) { 542 /*
524 /* Note: the CX18_ENC_STREAM_TYPE_VBI is claimed 543 * The VBI and IDX streams should have been claimed
525 automatically when the MPG stream is claimed. 544 * automatically, if for internal use, when the MPG stream was
526 We only need to start the VBI capturing. */ 545 * claimed. We only need to start these streams capturing.
527 if (cx18_start_v4l2_encode_stream(s_vbi)) { 546 */
528 CX18_DEBUG_WARN("VBI capture start failed\n"); 547 if (test_bit(CX18_F_S_INTERNAL_USE, &s_idx->s_flags) &&
529 548 !test_and_set_bit(CX18_F_S_STREAMING, &s_idx->s_flags)) {
530 /* Failure, clean up and return an error */ 549 if (cx18_start_v4l2_encode_stream(s_idx)) {
531 clear_bit(CX18_F_S_STREAMING, &s_vbi->s_flags); 550 CX18_DEBUG_WARN("IDX capture start failed\n");
532 clear_bit(CX18_F_S_STREAMING, &s->s_flags); 551 clear_bit(CX18_F_S_STREAMING, &s_idx->s_flags);
533 /* also releases the associated VBI stream */ 552 goto start_failed;
534 cx18_release_stream(s); 553 }
535 return -EIO; 554 CX18_DEBUG_INFO("IDX capture started\n");
555 }
556 if (test_bit(CX18_F_S_INTERNAL_USE, &s_vbi->s_flags) &&
557 !test_and_set_bit(CX18_F_S_STREAMING, &s_vbi->s_flags)) {
558 if (cx18_start_v4l2_encode_stream(s_vbi)) {
559 CX18_DEBUG_WARN("VBI capture start failed\n");
560 clear_bit(CX18_F_S_STREAMING, &s_vbi->s_flags);
561 goto start_failed;
562 }
563 CX18_DEBUG_INFO("VBI insertion started\n");
536 } 564 }
537 CX18_DEBUG_INFO("VBI insertion started\n");
538 } 565 }
539 566
540 /* Tell the card to start capturing */ 567 /* Tell the card to start capturing */
@@ -547,19 +574,29 @@ int cx18_start_capture(struct cx18_open_id *id)
547 return 0; 574 return 0;
548 } 575 }
549 576
550 /* failure, clean up */ 577start_failed:
551 CX18_DEBUG_WARN("Failed to start capturing for stream %s\n", s->name); 578 CX18_DEBUG_WARN("Failed to start capturing for stream %s\n", s->name);
552 579
553 /* Note: the CX18_ENC_STREAM_TYPE_VBI is released 580 /*
554 automatically when the MPG stream is released. 581 * The associated VBI and IDX streams for internal use are released
555 We only need to stop the VBI capturing. */ 582 * automatically when the MPG stream is released. We only need to stop
556 if (s->type == CX18_ENC_STREAM_TYPE_MPG && 583 * the associated stream.
557 test_bit(CX18_F_S_STREAMING, &s_vbi->s_flags)) { 584 */
558 cx18_stop_v4l2_encode_stream(s_vbi, 0); 585 if (s->type == CX18_ENC_STREAM_TYPE_MPG) {
559 clear_bit(CX18_F_S_STREAMING, &s_vbi->s_flags); 586 /* Stop the IDX stream which is always for internal use */
587 if (test_bit(CX18_F_S_STREAMING, &s_idx->s_flags)) {
588 cx18_stop_v4l2_encode_stream(s_idx, 0);
589 clear_bit(CX18_F_S_STREAMING, &s_idx->s_flags);
590 }
591 /* Stop the VBI stream, if only running for internal use */
592 if (test_bit(CX18_F_S_STREAMING, &s_vbi->s_flags) &&
593 !test_bit(CX18_F_S_APPL_IO, &s_vbi->s_flags)) {
594 cx18_stop_v4l2_encode_stream(s_vbi, 0);
595 clear_bit(CX18_F_S_STREAMING, &s_vbi->s_flags);
596 }
560 } 597 }
561 clear_bit(CX18_F_S_STREAMING, &s->s_flags); 598 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
562 cx18_release_stream(s); 599 cx18_release_stream(s); /* Also releases associated streams */
563 return -EIO; 600 return -EIO;
564} 601}
565 602
@@ -618,6 +655,8 @@ void cx18_stop_capture(struct cx18_open_id *id, int gop_end)
618{ 655{
619 struct cx18 *cx = id->cx; 656 struct cx18 *cx = id->cx;
620 struct cx18_stream *s = &cx->streams[id->type]; 657 struct cx18_stream *s = &cx->streams[id->type];
658 struct cx18_stream *s_vbi = &cx->streams[CX18_ENC_STREAM_TYPE_VBI];
659 struct cx18_stream *s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
621 660
622 CX18_DEBUG_IOCTL("close() of %s\n", s->name); 661 CX18_DEBUG_IOCTL("close() of %s\n", s->name);
623 662
@@ -625,17 +664,19 @@ void cx18_stop_capture(struct cx18_open_id *id, int gop_end)
625 664
626 /* Stop capturing */ 665 /* Stop capturing */
627 if (test_bit(CX18_F_S_STREAMING, &s->s_flags)) { 666 if (test_bit(CX18_F_S_STREAMING, &s->s_flags)) {
628 struct cx18_stream *s_vbi =
629 &cx->streams[CX18_ENC_STREAM_TYPE_VBI];
630
631 CX18_DEBUG_INFO("close stopping capture\n"); 667 CX18_DEBUG_INFO("close stopping capture\n");
632 /* Special case: a running VBI capture for VBI insertion 668 if (id->type == CX18_ENC_STREAM_TYPE_MPG) {
633 in the mpeg stream. Need to stop that too. */ 669 /* Stop internal use associated VBI and IDX streams */
634 if (id->type == CX18_ENC_STREAM_TYPE_MPG && 670 if (test_bit(CX18_F_S_STREAMING, &s_vbi->s_flags) &&
635 test_bit(CX18_F_S_STREAMING, &s_vbi->s_flags) && 671 !test_bit(CX18_F_S_APPL_IO, &s_vbi->s_flags)) {
636 !test_bit(CX18_F_S_APPL_IO, &s_vbi->s_flags)) { 672 CX18_DEBUG_INFO("close stopping embedded VBI "
637 CX18_DEBUG_INFO("close stopping embedded VBI capture\n"); 673 "capture\n");
638 cx18_stop_v4l2_encode_stream(s_vbi, 0); 674 cx18_stop_v4l2_encode_stream(s_vbi, 0);
675 }
676 if (test_bit(CX18_F_S_STREAMING, &s_idx->s_flags)) {
677 CX18_DEBUG_INFO("close stopping IDX capture\n");
678 cx18_stop_v4l2_encode_stream(s_idx, 0);
679 }
639 } 680 }
640 if (id->type == CX18_ENC_STREAM_TYPE_VBI && 681 if (id->type == CX18_ENC_STREAM_TYPE_VBI &&
641 test_bit(CX18_F_S_INTERNAL_USE, &s->s_flags)) 682 test_bit(CX18_F_S_INTERNAL_USE, &s->s_flags))
diff --git a/drivers/media/video/cx18/cx18-fileops.h b/drivers/media/video/cx18/cx18-fileops.h
index 92e2d5dab936..5c8fcb884f0a 100644
--- a/drivers/media/video/cx18/cx18-fileops.h
+++ b/drivers/media/video/cx18/cx18-fileops.h
@@ -34,3 +34,6 @@ void cx18_stop_capture(struct cx18_open_id *id, int gop_end);
34void cx18_mute(struct cx18 *cx); 34void cx18_mute(struct cx18 *cx);
35void cx18_unmute(struct cx18 *cx); 35void cx18_unmute(struct cx18 *cx);
36 36
37/* Shared with cx18-alsa module */
38int cx18_claim_stream(struct cx18_open_id *id, int type);
39void cx18_release_stream(struct cx18_stream *s);
diff --git a/drivers/media/video/cx18/cx18-ioctl.c b/drivers/media/video/cx18/cx18-ioctl.c
index 3e4fc192fdec..b81dd0ea8eb9 100644
--- a/drivers/media/video/cx18/cx18-ioctl.c
+++ b/drivers/media/video/cx18/cx18-ioctl.c
@@ -775,10 +775,143 @@ static int cx18_g_sliced_vbi_cap(struct file *file, void *fh,
775 return 0; 775 return 0;
776} 776}
777 777
778static int _cx18_process_idx_data(struct cx18_buffer *buf,
779 struct v4l2_enc_idx *idx)
780{
781 int consumed, remaining;
782 struct v4l2_enc_idx_entry *e_idx;
783 struct cx18_enc_idx_entry *e_buf;
784
785 /* Frame type lookup: 1=I, 2=P, 4=B */
786 const int mapping[8] = {
787 -1, V4L2_ENC_IDX_FRAME_I, V4L2_ENC_IDX_FRAME_P,
788 -1, V4L2_ENC_IDX_FRAME_B, -1, -1, -1
789 };
790
791 /*
792 * Assumption here is that a buf holds an integral number of
793 * struct cx18_enc_idx_entry objects and is properly aligned.
794 * This is enforced by the module options on IDX buffer sizes.
795 */
796 remaining = buf->bytesused - buf->readpos;
797 consumed = 0;
798 e_idx = &idx->entry[idx->entries];
799 e_buf = (struct cx18_enc_idx_entry *) &buf->buf[buf->readpos];
800
801 while (remaining >= sizeof(struct cx18_enc_idx_entry) &&
802 idx->entries < V4L2_ENC_IDX_ENTRIES) {
803
804 e_idx->offset = (((u64) le32_to_cpu(e_buf->offset_high)) << 32)
805 | le32_to_cpu(e_buf->offset_low);
806
807 e_idx->pts = (((u64) (le32_to_cpu(e_buf->pts_high) & 1)) << 32)
808 | le32_to_cpu(e_buf->pts_low);
809
810 e_idx->length = le32_to_cpu(e_buf->length);
811
812 e_idx->flags = mapping[le32_to_cpu(e_buf->flags) & 0x7];
813
814 e_idx->reserved[0] = 0;
815 e_idx->reserved[1] = 0;
816
817 idx->entries++;
818 e_idx = &idx->entry[idx->entries];
819 e_buf++;
820
821 remaining -= sizeof(struct cx18_enc_idx_entry);
822 consumed += sizeof(struct cx18_enc_idx_entry);
823 }
824
825 /* Swallow any partial entries at the end, if there are any */
826 if (remaining > 0 && remaining < sizeof(struct cx18_enc_idx_entry))
827 consumed += remaining;
828
829 buf->readpos += consumed;
830 return consumed;
831}
832
833static int cx18_process_idx_data(struct cx18_stream *s, struct cx18_mdl *mdl,
834 struct v4l2_enc_idx *idx)
835{
836 if (s->type != CX18_ENC_STREAM_TYPE_IDX)
837 return -EINVAL;
838
839 if (mdl->curr_buf == NULL)
840 mdl->curr_buf = list_first_entry(&mdl->buf_list,
841 struct cx18_buffer, list);
842
843 if (list_entry_is_past_end(mdl->curr_buf, &mdl->buf_list, list)) {
844 /*
845 * For some reason we've exhausted the buffers, but the MDL
846 * object still said some data was unread.
847 * Fix that and bail out.
848 */
849 mdl->readpos = mdl->bytesused;
850 return 0;
851 }
852
853 list_for_each_entry_from(mdl->curr_buf, &mdl->buf_list, list) {
854
855 /* Skip any empty buffers in the MDL */
856 if (mdl->curr_buf->readpos >= mdl->curr_buf->bytesused)
857 continue;
858
859 mdl->readpos += _cx18_process_idx_data(mdl->curr_buf, idx);
860
861 /* exit when MDL drained or request satisfied */
862 if (idx->entries >= V4L2_ENC_IDX_ENTRIES ||
863 mdl->curr_buf->readpos < mdl->curr_buf->bytesused ||
864 mdl->readpos >= mdl->bytesused)
865 break;
866 }
867 return 0;
868}
869
778static int cx18_g_enc_index(struct file *file, void *fh, 870static int cx18_g_enc_index(struct file *file, void *fh,
779 struct v4l2_enc_idx *idx) 871 struct v4l2_enc_idx *idx)
780{ 872{
781 return -EINVAL; 873 struct cx18 *cx = ((struct cx18_open_id *)fh)->cx;
874 struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
875 s32 tmp;
876 struct cx18_mdl *mdl;
877
878 if (!cx18_stream_enabled(s)) /* Module options inhibited IDX stream */
879 return -EINVAL;
880
881 /* Compute the best case number of entries we can buffer */
882 tmp = s->buffers -
883 s->bufs_per_mdl * CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN;
884 if (tmp <= 0)
885 tmp = 1;
886 tmp = tmp * s->buf_size / sizeof(struct cx18_enc_idx_entry);
887
888 /* Fill out the header of the return structure */
889 idx->entries = 0;
890 idx->entries_cap = tmp;
891 memset(idx->reserved, 0, sizeof(idx->reserved));
892
893 /* Pull IDX MDLs and buffers from q_full and populate the entries */
894 do {
895 mdl = cx18_dequeue(s, &s->q_full);
896 if (mdl == NULL) /* No more IDX data right now */
897 break;
898
899 /* Extract the Index entry data from the MDL and buffers */
900 cx18_process_idx_data(s, mdl, idx);
901 if (mdl->readpos < mdl->bytesused) {
902 /* We finished with data remaining, push the MDL back */
903 cx18_push(s, mdl, &s->q_full);
904 break;
905 }
906
907 /* We drained this MDL, schedule it to go to the firmware */
908 cx18_enqueue(s, mdl, &s->q_free);
909
910 } while (idx->entries < V4L2_ENC_IDX_ENTRIES);
911
912 /* Tell the work handler to send free IDX MDLs to the firmware */
913 cx18_stream_load_fw_queue(s);
914 return 0;
782} 915}
783 916
784static int cx18_encoder_cmd(struct file *file, void *fh, 917static int cx18_encoder_cmd(struct file *file, void *fh,
diff --git a/drivers/media/video/cx18/cx18-mailbox.c b/drivers/media/video/cx18/cx18-mailbox.c
index f231dd09c720..6dcce297752f 100644
--- a/drivers/media/video/cx18/cx18-mailbox.c
+++ b/drivers/media/video/cx18/cx18-mailbox.c
@@ -29,6 +29,7 @@
29#include "cx18-mailbox.h" 29#include "cx18-mailbox.h"
30#include "cx18-queue.h" 30#include "cx18-queue.h"
31#include "cx18-streams.h" 31#include "cx18-streams.h"
32#include "cx18-alsa-pcm.h" /* FIXME make configurable */
32 33
33static const char *rpu_str[] = { "APU", "CPU", "EPU", "HPU" }; 34static const char *rpu_str[] = { "APU", "CPU", "EPU", "HPU" };
34 35
@@ -157,6 +158,34 @@ static void cx18_mdl_send_to_dvb(struct cx18_stream *s, struct cx18_mdl *mdl)
157 } 158 }
158} 159}
159 160
161
162static void cx18_mdl_send_to_alsa(struct cx18 *cx, struct cx18_stream *s,
163 struct cx18_mdl *mdl)
164{
165 struct cx18_buffer *buf;
166
167 if (mdl->bytesused == 0)
168 return;
169
170 /* We ignore mdl and buf readpos accounting here - it doesn't matter */
171
172 /* The likely case */
173 if (list_is_singular(&mdl->buf_list)) {
174 buf = list_first_entry(&mdl->buf_list, struct cx18_buffer,
175 list);
176 if (buf->bytesused)
177 cx->pcm_announce_callback(cx->alsa, buf->buf,
178 buf->bytesused);
179 return;
180 }
181
182 list_for_each_entry(buf, &mdl->buf_list, list) {
183 if (buf->bytesused == 0)
184 break;
185 cx->pcm_announce_callback(cx->alsa, buf->buf, buf->bytesused);
186 }
187}
188
160static void epu_dma_done(struct cx18 *cx, struct cx18_in_work_order *order) 189static void epu_dma_done(struct cx18 *cx, struct cx18_in_work_order *order)
161{ 190{
162 u32 handle, mdl_ack_count, id; 191 u32 handle, mdl_ack_count, id;
@@ -223,11 +252,21 @@ static void epu_dma_done(struct cx18 *cx, struct cx18_in_work_order *order)
223 CX18_DEBUG_HI_DMA("%s recv bytesused = %d\n", 252 CX18_DEBUG_HI_DMA("%s recv bytesused = %d\n",
224 s->name, mdl->bytesused); 253 s->name, mdl->bytesused);
225 254
226 if (s->type != CX18_ENC_STREAM_TYPE_TS) 255 if (s->type == CX18_ENC_STREAM_TYPE_TS) {
227 cx18_enqueue(s, mdl, &s->q_full);
228 else {
229 cx18_mdl_send_to_dvb(s, mdl); 256 cx18_mdl_send_to_dvb(s, mdl);
230 cx18_enqueue(s, mdl, &s->q_free); 257 cx18_enqueue(s, mdl, &s->q_free);
258 } else if (s->type == CX18_ENC_STREAM_TYPE_PCM) {
259 /* Pass the data to cx18-alsa */
260 if (cx->pcm_announce_callback != NULL) {
261 cx18_mdl_send_to_alsa(cx, s, mdl);
262 cx18_enqueue(s, mdl, &s->q_free);
263 } else {
264 cx18_enqueue(s, mdl, &s->q_full);
265 }
266 } else {
267 cx18_enqueue(s, mdl, &s->q_full);
268 if (s->type == CX18_ENC_STREAM_TYPE_IDX)
269 cx18_stream_rotate_idx_mdls(cx);
231 } 270 }
232 } 271 }
233 /* Put as many MDLs as possible back into fw use */ 272 /* Put as many MDLs as possible back into fw use */
diff --git a/drivers/media/video/cx18/cx18-queue.c b/drivers/media/video/cx18/cx18-queue.c
index 63304823cef5..aefc8c8cf3c1 100644
--- a/drivers/media/video/cx18/cx18-queue.c
+++ b/drivers/media/video/cx18/cx18-queue.c
@@ -419,6 +419,9 @@ void cx18_stream_free(struct cx18_stream *s)
419{ 419{
420 struct cx18_mdl *mdl; 420 struct cx18_mdl *mdl;
421 struct cx18_buffer *buf; 421 struct cx18_buffer *buf;
422 struct cx18 *cx = s->cx;
423
424 CX18_DEBUG_INFO("Deallocating buffers for %s stream\n", s->name);
422 425
423 /* move all buffers to buf_pool and all MDLs to q_idle */ 426 /* move all buffers to buf_pool and all MDLs to q_idle */
424 cx18_unload_queues(s); 427 cx18_unload_queues(s);
diff --git a/drivers/media/video/cx18/cx18-streams.c b/drivers/media/video/cx18/cx18-streams.c
index 987a9308d938..054450f65a60 100644
--- a/drivers/media/video/cx18/cx18-streams.c
+++ b/drivers/media/video/cx18/cx18-streams.c
@@ -319,11 +319,27 @@ void cx18_streams_cleanup(struct cx18 *cx, int unregister)
319 319
320 /* Teardown all streams */ 320 /* Teardown all streams */
321 for (type = 0; type < CX18_MAX_STREAMS; type++) { 321 for (type = 0; type < CX18_MAX_STREAMS; type++) {
322 if (cx->streams[type].dvb.enabled) { 322
323 cx18_dvb_unregister(&cx->streams[type]); 323 /* No struct video_device, but can have buffers allocated */
324 cx->streams[type].dvb.enabled = false; 324 if (type == CX18_ENC_STREAM_TYPE_TS) {
325 if (cx->streams[type].dvb.enabled) {
326 cx18_dvb_unregister(&cx->streams[type]);
327 cx->streams[type].dvb.enabled = false;
328 cx18_stream_free(&cx->streams[type]);
329 }
330 continue;
331 }
332
333 /* No struct video_device, but can have buffers allocated */
334 if (type == CX18_ENC_STREAM_TYPE_IDX) {
335 if (cx->stream_buffers[type] != 0) {
336 cx->stream_buffers[type] = 0;
337 cx18_stream_free(&cx->streams[type]);
338 }
339 continue;
325 } 340 }
326 341
342 /* If struct video_device exists, can have buffers allocated */
327 vdev = cx->streams[type].video_dev; 343 vdev = cx->streams[type].video_dev;
328 344
329 cx->streams[type].video_dev = NULL; 345 cx->streams[type].video_dev = NULL;
@@ -447,6 +463,32 @@ static void cx18_vbi_setup(struct cx18_stream *s)
447 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data); 463 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
448} 464}
449 465
466void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
467{
468 struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
469 struct cx18_mdl *mdl;
470
471 if (!cx18_stream_enabled(s))
472 return;
473
474 /* Return if the firmware is not running low on MDLs */
475 if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
476 CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
477 return;
478
479 /* Return if there are no MDLs to rotate back to the firmware */
480 if (atomic_read(&s->q_full.depth) < 2)
481 return;
482
483 /*
484 * Take the oldest IDX MDL still holding data, and discard its index
485 * entries by scheduling the MDL to go back to the firmware
486 */
487 mdl = cx18_dequeue(s, &s->q_full);
488 if (mdl != NULL)
489 cx18_enqueue(s, mdl, &s->q_free);
490}
491
450static 492static
451struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s, 493struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
452 struct cx18_mdl *mdl) 494 struct cx18_mdl *mdl)
@@ -546,8 +588,9 @@ int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
546 struct cx18 *cx = s->cx; 588 struct cx18 *cx = s->cx;
547 int captype = 0; 589 int captype = 0;
548 struct cx18_api_func_private priv; 590 struct cx18_api_func_private priv;
591 struct cx18_stream *s_idx;
549 592
550 if (s->video_dev == NULL && s->dvb.enabled == 0) 593 if (!cx18_stream_enabled(s))
551 return -EINVAL; 594 return -EINVAL;
552 595
553 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name); 596 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
@@ -561,6 +604,9 @@ int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
561 cx->search_pack_header = 0; 604 cx->search_pack_header = 0;
562 break; 605 break;
563 606
607 case CX18_ENC_STREAM_TYPE_IDX:
608 captype = CAPTURE_CHANNEL_TYPE_INDEX;
609 break;
564 case CX18_ENC_STREAM_TYPE_TS: 610 case CX18_ENC_STREAM_TYPE_TS:
565 captype = CAPTURE_CHANNEL_TYPE_TS; 611 captype = CAPTURE_CHANNEL_TYPE_TS;
566 break; 612 break;
@@ -635,11 +681,13 @@ int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
635 cx18_vbi_setup(s); 681 cx18_vbi_setup(s);
636 682
637 /* 683 /*
638 * assign program index info. 684 * Select to receive I, P, and B frame index entries, if the
639 * Mask 7: select I/P/B, Num_req: 400 max 685 * index stream is enabled. Otherwise disable index entry
640 * FIXME - currently we have this hardcoded as disabled 686 * generation.
641 */ 687 */
642 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 1, 0); 688 s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
689 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
690 s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
643 691
644 /* Call out to the common CX2341x API setup for user controls */ 692 /* Call out to the common CX2341x API setup for user controls */
645 priv.cx = cx; 693 priv.cx = cx;
@@ -697,6 +745,7 @@ int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
697 atomic_inc(&cx->tot_capturing); 745 atomic_inc(&cx->tot_capturing);
698 return 0; 746 return 0;
699} 747}
748EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
700 749
701void cx18_stop_all_captures(struct cx18 *cx) 750void cx18_stop_all_captures(struct cx18 *cx)
702{ 751{
@@ -705,7 +754,7 @@ void cx18_stop_all_captures(struct cx18 *cx)
705 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) { 754 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
706 struct cx18_stream *s = &cx->streams[i]; 755 struct cx18_stream *s = &cx->streams[i];
707 756
708 if (s->video_dev == NULL && s->dvb.enabled == 0) 757 if (!cx18_stream_enabled(s))
709 continue; 758 continue;
710 if (test_bit(CX18_F_S_STREAMING, &s->s_flags)) 759 if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
711 cx18_stop_v4l2_encode_stream(s, 0); 760 cx18_stop_v4l2_encode_stream(s, 0);
@@ -717,7 +766,7 @@ int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
717 struct cx18 *cx = s->cx; 766 struct cx18 *cx = s->cx;
718 unsigned long then; 767 unsigned long then;
719 768
720 if (s->video_dev == NULL && s->dvb.enabled == 0) 769 if (!cx18_stream_enabled(s))
721 return -EINVAL; 770 return -EINVAL;
722 771
723 /* This function assumes that you are allowed to stop the capture 772 /* This function assumes that you are allowed to stop the capture
@@ -762,6 +811,7 @@ int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
762 811
763 return 0; 812 return 0;
764} 813}
814EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
765 815
766u32 cx18_find_handle(struct cx18 *cx) 816u32 cx18_find_handle(struct cx18 *cx)
767{ 817{
@@ -789,7 +839,7 @@ struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
789 s = &cx->streams[i]; 839 s = &cx->streams[i];
790 if (s->handle != handle) 840 if (s->handle != handle)
791 continue; 841 continue;
792 if (s->video_dev || s->dvb.enabled) 842 if (cx18_stream_enabled(s))
793 return s; 843 return s;
794 } 844 }
795 return NULL; 845 return NULL;
diff --git a/drivers/media/video/cx18/cx18-streams.h b/drivers/media/video/cx18/cx18-streams.h
index 4a01db5e5a35..0bff0fa29763 100644
--- a/drivers/media/video/cx18/cx18-streams.h
+++ b/drivers/media/video/cx18/cx18-streams.h
@@ -28,6 +28,16 @@ int cx18_streams_setup(struct cx18 *cx);
28int cx18_streams_register(struct cx18 *cx); 28int cx18_streams_register(struct cx18 *cx);
29void cx18_streams_cleanup(struct cx18 *cx, int unregister); 29void cx18_streams_cleanup(struct cx18 *cx, int unregister);
30 30
31#define CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN (3)
32void cx18_stream_rotate_idx_mdls(struct cx18 *cx);
33
34static inline bool cx18_stream_enabled(struct cx18_stream *s)
35{
36 return s->video_dev || s->dvb.enabled ||
37 (s->type == CX18_ENC_STREAM_TYPE_IDX &&
38 s->cx->stream_buffers[CX18_ENC_STREAM_TYPE_IDX] != 0);
39}
40
31/* Related to submission of mdls to firmware */ 41/* Related to submission of mdls to firmware */
32static inline void cx18_stream_load_fw_queue(struct cx18_stream *s) 42static inline void cx18_stream_load_fw_queue(struct cx18_stream *s)
33{ 43{
diff --git a/drivers/media/video/cx18/cx18-version.h b/drivers/media/video/cx18/cx18-version.h
index 9c0b5bb1b019..3e1aec4bcfde 100644
--- a/drivers/media/video/cx18/cx18-version.h
+++ b/drivers/media/video/cx18/cx18-version.h
@@ -24,7 +24,7 @@
24 24
25#define CX18_DRIVER_NAME "cx18" 25#define CX18_DRIVER_NAME "cx18"
26#define CX18_DRIVER_VERSION_MAJOR 1 26#define CX18_DRIVER_VERSION_MAJOR 1
27#define CX18_DRIVER_VERSION_MINOR 3 27#define CX18_DRIVER_VERSION_MINOR 4
28#define CX18_DRIVER_VERSION_PATCHLEVEL 0 28#define CX18_DRIVER_VERSION_PATCHLEVEL 0
29 29
30#define CX18_VERSION __stringify(CX18_DRIVER_VERSION_MAJOR) "." __stringify(CX18_DRIVER_VERSION_MINOR) "." __stringify(CX18_DRIVER_VERSION_PATCHLEVEL) 30#define CX18_VERSION __stringify(CX18_DRIVER_VERSION_MAJOR) "." __stringify(CX18_DRIVER_VERSION_MINOR) "." __stringify(CX18_DRIVER_VERSION_PATCHLEVEL)
diff --git a/drivers/media/video/cx18/cx23418.h b/drivers/media/video/cx18/cx23418.h
index 868806effdcf..2c00980acfcb 100644
--- a/drivers/media/video/cx18/cx23418.h
+++ b/drivers/media/video/cx18/cx23418.h
@@ -191,7 +191,8 @@
191#define CX18_CPU_SET_MEDIAN_CORING (CPU_CMD_MASK_CAPTURE | 0x000E) 191#define CX18_CPU_SET_MEDIAN_CORING (CPU_CMD_MASK_CAPTURE | 0x000E)
192 192
193/* Description: This command set the picture type mask for index file 193/* Description: This command set the picture type mask for index file
194 IN[0] - 0 = disable index file output 194 IN[0] - Task handle (ignored by firmware)
195 IN[1] - 0 = disable index file output
195 1 = output I picture 196 1 = output I picture
196 2 = P picture 197 2 = P picture
197 4 = B picture 198 4 = B picture
diff --git a/drivers/media/video/cx231xx/cx231xx-dvb.c b/drivers/media/video/cx231xx/cx231xx-dvb.c
index c5082a4e8ced..64e025e2bdf1 100644
--- a/drivers/media/video/cx231xx/cx231xx-dvb.c
+++ b/drivers/media/video/cx231xx/cx231xx-dvb.c
@@ -464,9 +464,9 @@ static int dvb_init(struct cx231xx *dev)
464 /* define general-purpose callback pointer */ 464 /* define general-purpose callback pointer */
465 dvb->frontend->callback = cx231xx_tuner_callback; 465 dvb->frontend->callback = cx231xx_tuner_callback;
466 466
467 if (dvb_attach(xc5000_attach, dev->dvb->frontend, 467 if (!dvb_attach(xc5000_attach, dev->dvb->frontend,
468 &dev->i2c_bus[1].i2c_adap, 468 &dev->i2c_bus[1].i2c_adap,
469 &cnxt_rde250_tunerconfig) < 0) { 469 &cnxt_rde250_tunerconfig)) {
470 result = -EINVAL; 470 result = -EINVAL;
471 goto out_free; 471 goto out_free;
472 } 472 }
@@ -486,9 +486,9 @@ static int dvb_init(struct cx231xx *dev)
486 /* define general-purpose callback pointer */ 486 /* define general-purpose callback pointer */
487 dvb->frontend->callback = cx231xx_tuner_callback; 487 dvb->frontend->callback = cx231xx_tuner_callback;
488 488
489 if (dvb_attach(xc5000_attach, dev->dvb->frontend, 489 if (!dvb_attach(xc5000_attach, dev->dvb->frontend,
490 &dev->i2c_bus[1].i2c_adap, 490 &dev->i2c_bus[1].i2c_adap,
491 &cnxt_rde250_tunerconfig) < 0) { 491 &cnxt_rde250_tunerconfig)) {
492 result = -EINVAL; 492 result = -EINVAL;
493 goto out_free; 493 goto out_free;
494 } 494 }
diff --git a/drivers/media/video/cx231xx/cx231xx-input.c b/drivers/media/video/cx231xx/cx231xx-input.c
index 15826f98b688..c5771db3bfce 100644
--- a/drivers/media/video/cx231xx/cx231xx-input.c
+++ b/drivers/media/video/cx231xx/cx231xx-input.c
@@ -216,7 +216,7 @@ int cx231xx_ir_init(struct cx231xx *dev)
216 cx231xx_ir_start(ir); 216 cx231xx_ir_start(ir);
217 217
218 /* all done */ 218 /* all done */
219 err = ir_input_register(ir->input, dev->board.ir_codes); 219 err = ir_input_register(ir->input, dev->board.ir_codes, NULL);
220 if (err) 220 if (err)
221 goto err_out_stop; 221 goto err_out_stop;
222 222
diff --git a/drivers/media/video/cx23885/cx23885-417.c b/drivers/media/video/cx23885/cx23885-417.c
index 88c0d2481118..2ab97ad7b6fb 100644
--- a/drivers/media/video/cx23885/cx23885-417.c
+++ b/drivers/media/video/cx23885/cx23885-417.c
@@ -681,7 +681,7 @@ static char *cmd_to_str(int cmd)
681 case CX2341X_ENC_SET_VIDEO_ID: 681 case CX2341X_ENC_SET_VIDEO_ID:
682 return "SET_VIDEO_ID"; 682 return "SET_VIDEO_ID";
683 case CX2341X_ENC_SET_PCR_ID: 683 case CX2341X_ENC_SET_PCR_ID:
684 return "SET_PCR_PID"; 684 return "SET_PCR_ID";
685 case CX2341X_ENC_SET_FRAME_RATE: 685 case CX2341X_ENC_SET_FRAME_RATE:
686 return "SET_FRAME_RATE"; 686 return "SET_FRAME_RATE";
687 case CX2341X_ENC_SET_FRAME_SIZE: 687 case CX2341X_ENC_SET_FRAME_SIZE:
@@ -693,7 +693,7 @@ static char *cmd_to_str(int cmd)
693 case CX2341X_ENC_SET_ASPECT_RATIO: 693 case CX2341X_ENC_SET_ASPECT_RATIO:
694 return "SET_ASPECT_RATIO"; 694 return "SET_ASPECT_RATIO";
695 case CX2341X_ENC_SET_DNR_FILTER_MODE: 695 case CX2341X_ENC_SET_DNR_FILTER_MODE:
696 return "SET_DNR_FILTER_PROPS"; 696 return "SET_DNR_FILTER_MODE";
697 case CX2341X_ENC_SET_DNR_FILTER_PROPS: 697 case CX2341X_ENC_SET_DNR_FILTER_PROPS:
698 return "SET_DNR_FILTER_PROPS"; 698 return "SET_DNR_FILTER_PROPS";
699 case CX2341X_ENC_SET_CORING_LEVELS: 699 case CX2341X_ENC_SET_CORING_LEVELS:
diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c
index 1ec48169277d..d639186f645d 100644
--- a/drivers/media/video/cx23885/cx23885-cards.c
+++ b/drivers/media/video/cx23885/cx23885-cards.c
@@ -274,6 +274,31 @@ struct cx23885_board cx23885_boards[] = {
274 .portb = CX23885_MPEG_DVB, 274 .portb = CX23885_MPEG_DVB,
275 .portc = CX23885_MPEG_DVB, 275 .portc = CX23885_MPEG_DVB,
276 }, 276 },
277 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
278 .name = "LEADTEK WinFast PxTV1200",
279 .porta = CX23885_ANALOG_VIDEO,
280 .tuner_type = TUNER_XC2028,
281 .tuner_addr = 0x61,
282 .input = {{
283 .type = CX23885_VMUX_TELEVISION,
284 .vmux = CX25840_VIN2_CH1 |
285 CX25840_VIN5_CH2 |
286 CX25840_NONE0_CH3,
287 }, {
288 .type = CX23885_VMUX_COMPOSITE1,
289 .vmux = CX25840_COMPOSITE1,
290 }, {
291 .type = CX23885_VMUX_SVIDEO,
292 .vmux = CX25840_SVIDEO_LUMA3 |
293 CX25840_SVIDEO_CHROMA4,
294 }, {
295 .type = CX23885_VMUX_COMPONENT,
296 .vmux = CX25840_VIN7_CH1 |
297 CX25840_VIN6_CH2 |
298 CX25840_VIN8_CH3 |
299 CX25840_COMPONENT_ON,
300 } },
301 },
277}; 302};
278const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); 303const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
279 304
@@ -417,6 +442,10 @@ struct cx23885_subid cx23885_subids[] = {
417 .subvendor = 0x14f1, 442 .subvendor = 0x14f1,
418 .subdevice = 0x8578, 443 .subdevice = 0x8578,
419 .card = CX23885_BOARD_MYGICA_X8558PRO, 444 .card = CX23885_BOARD_MYGICA_X8558PRO,
445 }, {
446 .subvendor = 0x107d,
447 .subdevice = 0x6f22,
448 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
420 }, 449 },
421}; 450};
422const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); 451const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
@@ -617,6 +646,7 @@ int cx23885_tuner_callback(void *priv, int component, int command, int arg)
617 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 646 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
618 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 647 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
619 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 648 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
649 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
620 /* Tuner Reset Command */ 650 /* Tuner Reset Command */
621 bitmask = 0x04; 651 bitmask = 0x04;
622 break; 652 break;
@@ -769,6 +799,7 @@ void cx23885_gpio_setup(struct cx23885_dev *dev)
769 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 799 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
770 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 800 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
771 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 801 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
802 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
772 /* GPIO-2 xc3028 tuner reset */ 803 /* GPIO-2 xc3028 tuner reset */
773 804
774 /* The following GPIO's are on the internal AVCore (cx25840) */ 805 /* The following GPIO's are on the internal AVCore (cx25840) */
@@ -1076,6 +1107,7 @@ void cx23885_card_setup(struct cx23885_dev *dev)
1076 case CX23885_BOARD_MYGICA_X8506: 1107 case CX23885_BOARD_MYGICA_X8506:
1077 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 1108 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1078 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1109 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1110 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1079 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, 1111 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1080 &dev->i2c_bus[2].i2c_adap, 1112 &dev->i2c_bus[2].i2c_adap,
1081 "cx25840", "cx25840", 0x88 >> 1, NULL); 1113 "cx25840", "cx25840", 0x88 >> 1, NULL);
diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c
index e45d2df08138..939079d7bbb9 100644
--- a/drivers/media/video/cx23885/cx23885-dvb.c
+++ b/drivers/media/video/cx23885/cx23885-dvb.c
@@ -542,6 +542,9 @@ static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
542 .osc_clk_freq = 30400, /* in kHz */ 542 .osc_clk_freq = 30400, /* in kHz */
543 .if_freq = 0, /* zero IF */ 543 .if_freq = 0, /* zero IF */
544 .zif_swap_iq = 1, 544 .zif_swap_iq = 1,
545 .agc_min = 0x2E,
546 .agc_max = 0xFF,
547 .agc_hold_loop = 0,
545}; 548};
546 549
547static struct max2165_config mygic_x8558pro_max2165_cfg1 = { 550static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
@@ -558,6 +561,9 @@ static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
558 .osc_clk_freq = 30400, /* in kHz */ 561 .osc_clk_freq = 30400, /* in kHz */
559 .if_freq = 0, /* zero IF */ 562 .if_freq = 0, /* zero IF */
560 .zif_swap_iq = 1, 563 .zif_swap_iq = 1,
564 .agc_min = 0x2E,
565 .agc_max = 0xFF,
566 .agc_hold_loop = 0,
561}; 567};
562 568
563static struct max2165_config mygic_x8558pro_max2165_cfg2 = { 569static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
@@ -994,15 +1000,8 @@ static int dvb_register(struct cx23885_tsport *port)
994 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); 1000 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
995 memcpy(port->frontends.adapter.proposed_mac, 1001 memcpy(port->frontends.adapter.proposed_mac,
996 cinfo.port[port->nr - 1].mac, 6); 1002 cinfo.port[port->nr - 1].mac, 6);
997 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=" 1003 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
998 "%02X:%02X:%02X:%02X:%02X:%02X\n", 1004 port->nr, port->frontends.adapter.proposed_mac);
999 port->nr,
1000 port->frontends.adapter.proposed_mac[0],
1001 port->frontends.adapter.proposed_mac[1],
1002 port->frontends.adapter.proposed_mac[2],
1003 port->frontends.adapter.proposed_mac[3],
1004 port->frontends.adapter.proposed_mac[4],
1005 port->frontends.adapter.proposed_mac[5]);
1006 1005
1007 netup_ci_init(port); 1006 netup_ci_init(port);
1008 break; 1007 break;
diff --git a/drivers/media/video/cx23885/cx23885-input.c b/drivers/media/video/cx23885/cx23885-input.c
index 768eec92ccf9..9c6620f86dca 100644
--- a/drivers/media/video/cx23885/cx23885-input.c
+++ b/drivers/media/video/cx23885/cx23885-input.c
@@ -397,7 +397,7 @@ int cx23885_input_init(struct cx23885_dev *dev)
397 dev->ir_input = ir; 397 dev->ir_input = ir;
398 cx23885_input_ir_start(dev); 398 cx23885_input_ir_start(dev);
399 399
400 ret = ir_input_register(ir->dev, ir_codes); 400 ret = ir_input_register(ir->dev, ir_codes, NULL);
401 if (ret) 401 if (ret)
402 goto err_out_stop; 402 goto err_out_stop;
403 403
diff --git a/drivers/media/video/cx23885/cx23885-video.c b/drivers/media/video/cx23885/cx23885-video.c
index 8934d61cf660..2d3ac8b83dc3 100644
--- a/drivers/media/video/cx23885/cx23885-video.c
+++ b/drivers/media/video/cx23885/cx23885-video.c
@@ -36,6 +36,7 @@
36#include <media/v4l2-common.h> 36#include <media/v4l2-common.h>
37#include <media/v4l2-ioctl.h> 37#include <media/v4l2-ioctl.h>
38#include "cx23885-ioctl.h" 38#include "cx23885-ioctl.h"
39#include "tuner-xc2028.h"
39 40
40MODULE_DESCRIPTION("v4l2 driver module for cx23885 based TV cards"); 41MODULE_DESCRIPTION("v4l2 driver module for cx23885 based TV cards");
41MODULE_AUTHOR("Steven Toth <stoth@linuxtv.org>"); 42MODULE_AUTHOR("Steven Toth <stoth@linuxtv.org>");
@@ -1505,6 +1506,18 @@ int cx23885_video_register(struct cx23885_dev *dev)
1505 tun_setup.tuner_callback = cx23885_tuner_callback; 1506 tun_setup.tuner_callback = cx23885_tuner_callback;
1506 1507
1507 v4l2_subdev_call(sd, tuner, s_type_addr, &tun_setup); 1508 v4l2_subdev_call(sd, tuner, s_type_addr, &tun_setup);
1509
1510 if (dev->board == CX23885_BOARD_LEADTEK_WINFAST_PXTV1200) {
1511 struct xc2028_ctrl ctrl = {
1512 .fname = XC2028_DEFAULT_FIRMWARE,
1513 .max_len = 64
1514 };
1515 struct v4l2_priv_tun_config cfg = {
1516 .tuner = dev->tuner_type,
1517 .priv = &ctrl
1518 };
1519 v4l2_subdev_call(sd, tuner, s_config, &cfg);
1520 }
1508 } 1521 }
1509 } 1522 }
1510 1523
diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h
index 08b3f6b136a0..0e3a98d243c5 100644
--- a/drivers/media/video/cx23885/cx23885.h
+++ b/drivers/media/video/cx23885/cx23885.h
@@ -81,6 +81,7 @@
81#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25 81#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
82#define CX23885_BOARD_HAUPPAUGE_HVR1290 26 82#define CX23885_BOARD_HAUPPAUGE_HVR1290 26
83#define CX23885_BOARD_MYGICA_X8558PRO 27 83#define CX23885_BOARD_MYGICA_X8558PRO 27
84#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
84 85
85#define GPIO_0 0x00000001 86#define GPIO_0 0x00000001
86#define GPIO_1 0x00000002 87#define GPIO_1 0x00000002
diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c
index 385ecd58f1c0..f2461cd3de5a 100644
--- a/drivers/media/video/cx25840/cx25840-core.c
+++ b/drivers/media/video/cx25840/cx25840-core.c
@@ -734,10 +734,8 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
734 v4l_dbg(1, cx25840_debug, client, "vid_input 0x%x\n", 734 v4l_dbg(1, cx25840_debug, client, "vid_input 0x%x\n",
735 vid_input); 735 vid_input);
736 reg = vid_input & 0xff; 736 reg = vid_input & 0xff;
737 if ((vid_input & CX25840_SVIDEO_ON) == CX25840_SVIDEO_ON) 737 is_composite = !is_component &&
738 is_composite = 0; 738 ((vid_input & CX25840_SVIDEO_ON) != CX25840_SVIDEO_ON);
739 else if ((vid_input & CX25840_COMPONENT_ON) == 0)
740 is_composite = 1;
741 739
742 v4l_dbg(1, cx25840_debug, client, "mux cfg 0x%x comp=%d\n", 740 v4l_dbg(1, cx25840_debug, client, "mux cfg 0x%x comp=%d\n",
743 reg, is_composite); 741 reg, is_composite);
@@ -1347,30 +1345,59 @@ static int cx25840_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *
1347} 1345}
1348#endif 1346#endif
1349 1347
1348static int cx25840_s_audio_stream(struct v4l2_subdev *sd, int enable)
1349{
1350 struct cx25840_state *state = to_state(sd);
1351 struct i2c_client *client = v4l2_get_subdevdata(sd);
1352 u8 v;
1353
1354 if (is_cx2583x(state) || is_cx2388x(state) || is_cx231xx(state))
1355 return 0;
1356
1357 v4l_dbg(1, cx25840_debug, client, "%s audio output\n",
1358 enable ? "enable" : "disable");
1359
1360 if (enable) {
1361 v = cx25840_read(client, 0x115) | 0x80;
1362 cx25840_write(client, 0x115, v);
1363 v = cx25840_read(client, 0x116) | 0x03;
1364 cx25840_write(client, 0x116, v);
1365 } else {
1366 v = cx25840_read(client, 0x115) & ~(0x80);
1367 cx25840_write(client, 0x115, v);
1368 v = cx25840_read(client, 0x116) & ~(0x03);
1369 cx25840_write(client, 0x116, v);
1370 }
1371 return 0;
1372}
1373
1350static int cx25840_s_stream(struct v4l2_subdev *sd, int enable) 1374static int cx25840_s_stream(struct v4l2_subdev *sd, int enable)
1351{ 1375{
1352 struct cx25840_state *state = to_state(sd); 1376 struct cx25840_state *state = to_state(sd);
1353 struct i2c_client *client = v4l2_get_subdevdata(sd); 1377 struct i2c_client *client = v4l2_get_subdevdata(sd);
1378 u8 v;
1354 1379
1355 v4l_dbg(1, cx25840_debug, client, "%s output\n", 1380 v4l_dbg(1, cx25840_debug, client, "%s video output\n",
1356 enable ? "enable" : "disable"); 1381 enable ? "enable" : "disable");
1357 if (enable) { 1382 if (enable) {
1358 if (is_cx2388x(state) || is_cx231xx(state)) { 1383 if (is_cx2388x(state) || is_cx231xx(state)) {
1359 u8 v = (cx25840_read(client, 0x421) | 0x0b); 1384 v = cx25840_read(client, 0x421) | 0x0b;
1360 cx25840_write(client, 0x421, v); 1385 cx25840_write(client, 0x421, v);
1361 } else { 1386 } else {
1362 cx25840_write(client, 0x115, 1387 v = cx25840_read(client, 0x115) | 0x0c;
1363 is_cx2583x(state) ? 0x0c : 0x8c); 1388 cx25840_write(client, 0x115, v);
1364 cx25840_write(client, 0x116, 1389 v = cx25840_read(client, 0x116) | 0x04;
1365 is_cx2583x(state) ? 0x04 : 0x07); 1390 cx25840_write(client, 0x116, v);
1366 } 1391 }
1367 } else { 1392 } else {
1368 if (is_cx2388x(state) || is_cx231xx(state)) { 1393 if (is_cx2388x(state) || is_cx231xx(state)) {
1369 u8 v = cx25840_read(client, 0x421) & ~(0x0b); 1394 v = cx25840_read(client, 0x421) & ~(0x0b);
1370 cx25840_write(client, 0x421, v); 1395 cx25840_write(client, 0x421, v);
1371 } else { 1396 } else {
1372 cx25840_write(client, 0x115, 0x00); 1397 v = cx25840_read(client, 0x115) & ~(0x0c);
1373 cx25840_write(client, 0x116, 0x00); 1398 cx25840_write(client, 0x115, v);
1399 v = cx25840_read(client, 0x116) & ~(0x04);
1400 cx25840_write(client, 0x116, v);
1374 } 1401 }
1375 } 1402 }
1376 return 0; 1403 return 0;
@@ -1601,6 +1628,7 @@ static const struct v4l2_subdev_tuner_ops cx25840_tuner_ops = {
1601static const struct v4l2_subdev_audio_ops cx25840_audio_ops = { 1628static const struct v4l2_subdev_audio_ops cx25840_audio_ops = {
1602 .s_clock_freq = cx25840_s_clock_freq, 1629 .s_clock_freq = cx25840_s_clock_freq,
1603 .s_routing = cx25840_s_audio_routing, 1630 .s_routing = cx25840_s_audio_routing,
1631 .s_stream = cx25840_s_audio_stream,
1604}; 1632};
1605 1633
1606static const struct v4l2_subdev_video_ops cx25840_video_ops = { 1634static const struct v4l2_subdev_video_ops cx25840_video_ops = {
diff --git a/drivers/media/video/cx88/cx88-alsa.c b/drivers/media/video/cx88/cx88-alsa.c
index 5a67445dd6ed..64b350df78e3 100644
--- a/drivers/media/video/cx88/cx88-alsa.c
+++ b/drivers/media/video/cx88/cx88-alsa.c
@@ -583,16 +583,18 @@ static int snd_cx88_volume_put(struct snd_kcontrol *kcontrol,
583{ 583{
584 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol); 584 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol);
585 struct cx88_core *core=chip->core; 585 struct cx88_core *core=chip->core;
586 int v, b; 586 int left, right, v, b;
587 int changed = 0; 587 int changed = 0;
588 u32 old; 588 u32 old;
589 589
590 b = value->value.integer.value[1] - value->value.integer.value[0]; 590 left = value->value.integer.value[0] & 0x3f;
591 right = value->value.integer.value[1] & 0x3f;
592 b = right - left;
591 if (b < 0) { 593 if (b < 0) {
592 v = 0x3f - value->value.integer.value[0]; 594 v = 0x3f - left;
593 b = (-b) | 0x40; 595 b = (-b) | 0x40;
594 } else { 596 } else {
595 v = 0x3f - value->value.integer.value[1]; 597 v = 0x3f - right;
596 } 598 }
597 /* Do we really know this will always be called with IRQs on? */ 599 /* Do we really know this will always be called with IRQs on? */
598 spin_lock_irq(&chip->reg_lock); 600 spin_lock_irq(&chip->reg_lock);
diff --git a/drivers/media/video/cx88/cx88-cards.c b/drivers/media/video/cx88/cx88-cards.c
index d844f2aaa01d..eaf0ee7de832 100644
--- a/drivers/media/video/cx88/cx88-cards.c
+++ b/drivers/media/video/cx88/cx88-cards.c
@@ -1466,6 +1466,18 @@ static const struct cx88_board cx88_boards[] = {
1466 .audioroute = 8, 1466 .audioroute = 8,
1467 }, 1467 },
1468 }, 1468 },
1469 [CX88_BOARD_SAMSUNG_SMT_7020] = {
1470 .name = "Samsung SMT 7020 DVB-S",
1471 .tuner_type = TUNER_ABSENT,
1472 .radio_type = UNSET,
1473 .tuner_addr = ADDR_UNSET,
1474 .radio_addr = ADDR_UNSET,
1475 .input = { {
1476 .type = CX88_VMUX_DVB,
1477 .vmux = 0,
1478 } },
1479 .mpeg = CX88_MPEG_DVB,
1480 },
1469 [CX88_BOARD_ADSTECH_PTV_390] = { 1481 [CX88_BOARD_ADSTECH_PTV_390] = {
1470 .name = "ADS Tech Instant Video PCI", 1482 .name = "ADS Tech Instant Video PCI",
1471 .tuner_type = TUNER_ABSENT, 1483 .tuner_type = TUNER_ABSENT,
@@ -2355,6 +2367,14 @@ static const struct cx88_subid cx88_subids[] = {
2355 .subvendor = 0x0070, 2367 .subvendor = 0x0070,
2356 .subdevice = 0x1404, 2368 .subdevice = 0x1404,
2357 .card = CX88_BOARD_HAUPPAUGE_HVR3000, 2369 .card = CX88_BOARD_HAUPPAUGE_HVR3000,
2370 }, {
2371 .subvendor = 0x18ac,
2372 .subdevice = 0xdc00,
2373 .card = CX88_BOARD_SAMSUNG_SMT_7020,
2374 }, {
2375 .subvendor = 0x18ac,
2376 .subdevice = 0xdccd,
2377 .card = CX88_BOARD_SAMSUNG_SMT_7020,
2358 },{ 2378 },{
2359 .subvendor = 0x1461, 2379 .subvendor = 0x1461,
2360 .subdevice = 0xc111, /* AverMedia M150-D */ 2380 .subdevice = 0xc111, /* AverMedia M150-D */
@@ -2633,6 +2653,9 @@ static void hauppauge_eeprom(struct cx88_core *core, u8 *eeprom_data)
2633 case 98559: /* WinTV-HVR1100LP (Video no IR, Retail - Low Profile) */ 2653 case 98559: /* WinTV-HVR1100LP (Video no IR, Retail - Low Profile) */
2634 /* known */ 2654 /* known */
2635 break; 2655 break;
2656 case CX88_BOARD_SAMSUNG_SMT_7020:
2657 cx_set(MO_GP0_IO, 0x008989FF);
2658 break;
2636 default: 2659 default:
2637 warn_printk(core, "warning: unknown hauppauge model #%d\n", 2660 warn_printk(core, "warning: unknown hauppauge model #%d\n",
2638 tv.model); 2661 tv.model);
diff --git a/drivers/media/video/cx88/cx88-dvb.c b/drivers/media/video/cx88/cx88-dvb.c
index b14296923250..94ab862f0219 100644
--- a/drivers/media/video/cx88/cx88-dvb.c
+++ b/drivers/media/video/cx88/cx88-dvb.c
@@ -674,6 +674,194 @@ static int cx8802_alloc_frontends(struct cx8802_dev *dev)
674 return 0; 674 return 0;
675} 675}
676 676
677
678
679static u8 samsung_smt_7020_inittab[] = {
680 0x01, 0x15,
681 0x02, 0x00,
682 0x03, 0x00,
683 0x04, 0x7D,
684 0x05, 0x0F,
685 0x06, 0x02,
686 0x07, 0x00,
687 0x08, 0x60,
688
689 0x0A, 0xC2,
690 0x0B, 0x00,
691 0x0C, 0x01,
692 0x0D, 0x81,
693 0x0E, 0x44,
694 0x0F, 0x09,
695 0x10, 0x3C,
696 0x11, 0x84,
697 0x12, 0xDA,
698 0x13, 0x99,
699 0x14, 0x8D,
700 0x15, 0xCE,
701 0x16, 0xE8,
702 0x17, 0x43,
703 0x18, 0x1C,
704 0x19, 0x1B,
705 0x1A, 0x1D,
706
707 0x1C, 0x12,
708 0x1D, 0x00,
709 0x1E, 0x00,
710 0x1F, 0x00,
711 0x20, 0x00,
712 0x21, 0x00,
713 0x22, 0x00,
714 0x23, 0x00,
715
716 0x28, 0x02,
717 0x29, 0x28,
718 0x2A, 0x14,
719 0x2B, 0x0F,
720 0x2C, 0x09,
721 0x2D, 0x05,
722
723 0x31, 0x1F,
724 0x32, 0x19,
725 0x33, 0xFC,
726 0x34, 0x13,
727 0xff, 0xff,
728};
729
730
731static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe,
732 struct dvb_frontend_parameters *params)
733{
734 struct cx8802_dev *dev = fe->dvb->priv;
735 u8 buf[4];
736 u32 div;
737 struct i2c_msg msg = {
738 .addr = 0x61,
739 .flags = 0,
740 .buf = buf,
741 .len = sizeof(buf) };
742
743 div = params->frequency / 125;
744
745 buf[0] = (div >> 8) & 0x7f;
746 buf[1] = div & 0xff;
747 buf[2] = 0x84; /* 0xC4 */
748 buf[3] = 0x00;
749
750 if (params->frequency < 1500000)
751 buf[3] |= 0x10;
752
753 if (fe->ops.i2c_gate_ctrl)
754 fe->ops.i2c_gate_ctrl(fe, 1);
755
756 if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
757 return -EIO;
758
759 return 0;
760}
761
762static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
763 fe_sec_tone_mode_t tone)
764{
765 struct cx8802_dev *dev = fe->dvb->priv;
766 struct cx88_core *core = dev->core;
767
768 cx_set(MO_GP0_IO, 0x0800);
769
770 switch (tone) {
771 case SEC_TONE_ON:
772 cx_set(MO_GP0_IO, 0x08);
773 break;
774 case SEC_TONE_OFF:
775 cx_clear(MO_GP0_IO, 0x08);
776 break;
777 default:
778 return -EINVAL;
779 }
780
781 return 0;
782}
783
784static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
785 fe_sec_voltage_t voltage)
786{
787 struct cx8802_dev *dev = fe->dvb->priv;
788 struct cx88_core *core = dev->core;
789
790 u8 data;
791 struct i2c_msg msg = {
792 .addr = 8,
793 .flags = 0,
794 .buf = &data,
795 .len = sizeof(data) };
796
797 cx_set(MO_GP0_IO, 0x8000);
798
799 switch (voltage) {
800 case SEC_VOLTAGE_OFF:
801 break;
802 case SEC_VOLTAGE_13:
803 data = ISL6421_EN1 | ISL6421_LLC1;
804 cx_clear(MO_GP0_IO, 0x80);
805 break;
806 case SEC_VOLTAGE_18:
807 data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
808 cx_clear(MO_GP0_IO, 0x80);
809 break;
810 default:
811 return -EINVAL;
812 };
813
814 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
815}
816
817static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
818 u32 srate, u32 ratio)
819{
820 u8 aclk = 0;
821 u8 bclk = 0;
822
823 if (srate < 1500000) {
824 aclk = 0xb7;
825 bclk = 0x47;
826 } else if (srate < 3000000) {
827 aclk = 0xb7;
828 bclk = 0x4b;
829 } else if (srate < 7000000) {
830 aclk = 0xb7;
831 bclk = 0x4f;
832 } else if (srate < 14000000) {
833 aclk = 0xb7;
834 bclk = 0x53;
835 } else if (srate < 30000000) {
836 aclk = 0xb6;
837 bclk = 0x53;
838 } else if (srate < 45000000) {
839 aclk = 0xb4;
840 bclk = 0x51;
841 }
842
843 stv0299_writereg(fe, 0x13, aclk);
844 stv0299_writereg(fe, 0x14, bclk);
845 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
846 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
847 stv0299_writereg(fe, 0x21, ratio & 0xf0);
848
849 return 0;
850}
851
852
853static struct stv0299_config samsung_stv0299_config = {
854 .demod_address = 0x68,
855 .inittab = samsung_smt_7020_inittab,
856 .mclk = 88000000UL,
857 .invert = 0,
858 .skip_reinit = 0,
859 .lock_output = STV0299_LOCKOUTPUT_LK,
860 .volt13_op0_op1 = STV0299_VOLT13_OP1,
861 .min_delay_ms = 100,
862 .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
863};
864
677static int dvb_register(struct cx8802_dev *dev) 865static int dvb_register(struct cx8802_dev *dev)
678{ 866{
679 struct cx88_core *core = dev->core; 867 struct cx88_core *core = dev->core;
@@ -1203,6 +1391,32 @@ static int dvb_register(struct cx8802_dev *dev)
1203 } 1391 }
1204 break; 1392 break;
1205 } 1393 }
1394 case CX88_BOARD_SAMSUNG_SMT_7020:
1395 dev->ts_gen_cntrl = 0x08;
1396
1397 cx_set(MO_GP0_IO, 0x0101);
1398
1399 cx_clear(MO_GP0_IO, 0x01);
1400 mdelay(100);
1401 cx_set(MO_GP0_IO, 0x01);
1402 mdelay(200);
1403
1404 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1405 &samsung_stv0299_config,
1406 &dev->core->i2c_adap);
1407 if (fe0->dvb.frontend) {
1408 fe0->dvb.frontend->ops.tuner_ops.set_params =
1409 samsung_smt_7020_tuner_set_params;
1410 fe0->dvb.frontend->tuner_priv =
1411 &dev->core->i2c_adap;
1412 fe0->dvb.frontend->ops.set_voltage =
1413 samsung_smt_7020_set_voltage;
1414 fe0->dvb.frontend->ops.set_tone =
1415 samsung_smt_7020_set_tone;
1416 }
1417
1418 break;
1419
1206 default: 1420 default:
1207 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n", 1421 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
1208 core->name); 1422 core->name);
diff --git a/drivers/media/video/cx88/cx88-input.c b/drivers/media/video/cx88/cx88-input.c
index f9fda18b410c..de180d4d5a21 100644
--- a/drivers/media/video/cx88/cx88-input.c
+++ b/drivers/media/video/cx88/cx88-input.c
@@ -192,7 +192,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
192 struct cx88_IR *ir; 192 struct cx88_IR *ir;
193 struct input_dev *input_dev; 193 struct input_dev *input_dev;
194 struct ir_scancode_table *ir_codes = NULL; 194 struct ir_scancode_table *ir_codes = NULL;
195 int ir_type = IR_TYPE_OTHER; 195 u64 ir_type = IR_TYPE_OTHER;
196 int err = -ENOMEM; 196 int err = -ENOMEM;
197 197
198 ir = kzalloc(sizeof(*ir), GFP_KERNEL); 198 ir = kzalloc(sizeof(*ir), GFP_KERNEL);
@@ -383,7 +383,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
383 cx88_ir_start(core, ir); 383 cx88_ir_start(core, ir);
384 384
385 /* all done */ 385 /* all done */
386 err = ir_input_register(ir->input, ir_codes); 386 err = ir_input_register(ir->input, ir_codes, NULL);
387 if (err) 387 if (err)
388 goto err_out_stop; 388 goto err_out_stop;
389 389
diff --git a/drivers/media/video/cx88/cx88-mpeg.c b/drivers/media/video/cx88/cx88-mpeg.c
index bb5104893411..338af77f7f01 100644
--- a/drivers/media/video/cx88/cx88-mpeg.c
+++ b/drivers/media/video/cx88/cx88-mpeg.c
@@ -110,6 +110,9 @@ static int cx8802_start_dma(struct cx8802_dev *dev,
110 case CX88_BOARD_PCHDTV_HD5500: 110 case CX88_BOARD_PCHDTV_HD5500:
111 cx_write(TS_SOP_STAT, 1<<13); 111 cx_write(TS_SOP_STAT, 1<<13);
112 break; 112 break;
113 case CX88_BOARD_SAMSUNG_SMT_7020:
114 cx_write(TS_SOP_STAT, 0x00);
115 break;
113 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1: 116 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
114 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: 117 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
115 cx_write(MO_PINMUX_IO, 0x88); /* Enable MPEG parallel IO and video signal pins */ 118 cx_write(MO_PINMUX_IO, 0x88); /* Enable MPEG parallel IO and video signal pins */
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h
index b1499bf604ea..48b6c04fb497 100644
--- a/drivers/media/video/cx88/cx88.h
+++ b/drivers/media/video/cx88/cx88.h
@@ -239,6 +239,7 @@ extern struct sram_channel cx88_sram_channels[];
239#define CX88_BOARD_WINFAST_DTV1800H 81 239#define CX88_BOARD_WINFAST_DTV1800H 81
240#define CX88_BOARD_WINFAST_DTV2000H_J 82 240#define CX88_BOARD_WINFAST_DTV2000H_J 82
241#define CX88_BOARD_PROF_7301 83 241#define CX88_BOARD_PROF_7301 83
242#define CX88_BOARD_SAMSUNG_SMT_7020 84
242 243
243enum cx88_itype { 244enum cx88_itype {
244 CX88_VMUX_COMPOSITE1 = 1, 245 CX88_VMUX_COMPOSITE1 = 1,
diff --git a/drivers/media/video/dabusb.c b/drivers/media/video/dabusb.c
index ee43876adb06..9b413a35e048 100644
--- a/drivers/media/video/dabusb.c
+++ b/drivers/media/video/dabusb.c
@@ -913,6 +913,8 @@ static void __exit dabusb_cleanup (void)
913MODULE_AUTHOR( DRIVER_AUTHOR ); 913MODULE_AUTHOR( DRIVER_AUTHOR );
914MODULE_DESCRIPTION( DRIVER_DESC ); 914MODULE_DESCRIPTION( DRIVER_DESC );
915MODULE_LICENSE("GPL"); 915MODULE_LICENSE("GPL");
916MODULE_FIRMWARE("dabusb/firmware.fw");
917MODULE_FIRMWARE("dabusb/bitstream.bin");
916 918
917module_param(buffers, int, 0); 919module_param(buffers, int, 0);
918MODULE_PARM_DESC (buffers, "Number of buffers (default=256)"); 920MODULE_PARM_DESC (buffers, "Number of buffers (default=256)");
diff --git a/drivers/media/video/davinci/Makefile b/drivers/media/video/davinci/Makefile
index 1a8b8f3f182e..a37955745aaa 100644
--- a/drivers/media/video/davinci/Makefile
+++ b/drivers/media/video/davinci/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_VIDEO_VPSS_SYSTEM) += vpss.o
15obj-$(CONFIG_VIDEO_VPFE_CAPTURE) += vpfe_capture.o 15obj-$(CONFIG_VIDEO_VPFE_CAPTURE) += vpfe_capture.o
16obj-$(CONFIG_VIDEO_DM6446_CCDC) += dm644x_ccdc.o 16obj-$(CONFIG_VIDEO_DM6446_CCDC) += dm644x_ccdc.o
17obj-$(CONFIG_VIDEO_DM355_CCDC) += dm355_ccdc.o 17obj-$(CONFIG_VIDEO_DM355_CCDC) += dm355_ccdc.o
18obj-$(CONFIG_VIDEO_ISIF) += isif.o
diff --git a/drivers/media/video/davinci/dm355_ccdc.c b/drivers/media/video/davinci/dm355_ccdc.c
index 314390016370..c29ac88ffd78 100644
--- a/drivers/media/video/davinci/dm355_ccdc.c
+++ b/drivers/media/video/davinci/dm355_ccdc.c
@@ -37,8 +37,12 @@
37#include <linux/platform_device.h> 37#include <linux/platform_device.h>
38#include <linux/uaccess.h> 38#include <linux/uaccess.h>
39#include <linux/videodev2.h> 39#include <linux/videodev2.h>
40#include <linux/clk.h>
41#include <linux/err.h>
42
40#include <media/davinci/dm355_ccdc.h> 43#include <media/davinci/dm355_ccdc.h>
41#include <media/davinci/vpss.h> 44#include <media/davinci/vpss.h>
45
42#include "dm355_ccdc_regs.h" 46#include "dm355_ccdc_regs.h"
43#include "ccdc_hw_device.h" 47#include "ccdc_hw_device.h"
44 48
@@ -46,67 +50,75 @@ MODULE_LICENSE("GPL");
46MODULE_DESCRIPTION("CCDC Driver for DM355"); 50MODULE_DESCRIPTION("CCDC Driver for DM355");
47MODULE_AUTHOR("Texas Instruments"); 51MODULE_AUTHOR("Texas Instruments");
48 52
49static struct device *dev; 53static struct ccdc_oper_config {
50 54 struct device *dev;
51/* Object for CCDC raw mode */ 55 /* CCDC interface type */
52static struct ccdc_params_raw ccdc_hw_params_raw = { 56 enum vpfe_hw_if_type if_type;
53 .pix_fmt = CCDC_PIXFMT_RAW, 57 /* Raw Bayer configuration */
54 .frm_fmt = CCDC_FRMFMT_PROGRESSIVE, 58 struct ccdc_params_raw bayer;
55 .win = CCDC_WIN_VGA, 59 /* YCbCr configuration */
56 .fid_pol = VPFE_PINPOL_POSITIVE, 60 struct ccdc_params_ycbcr ycbcr;
57 .vd_pol = VPFE_PINPOL_POSITIVE, 61 /* Master clock */
58 .hd_pol = VPFE_PINPOL_POSITIVE, 62 struct clk *mclk;
59 .gain = { 63 /* slave clock */
60 .r_ye = 256, 64 struct clk *sclk;
61 .gb_g = 256, 65 /* ccdc base address */
62 .gr_cy = 256, 66 void __iomem *base_addr;
63 .b_mg = 256 67} ccdc_cfg = {
64 }, 68 /* Raw configurations */
65 .config_params = { 69 .bayer = {
66 .datasft = 2, 70 .pix_fmt = CCDC_PIXFMT_RAW,
67 .data_sz = CCDC_DATA_10BITS, 71 .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
68 .mfilt1 = CCDC_NO_MEDIAN_FILTER1, 72 .win = CCDC_WIN_VGA,
69 .mfilt2 = CCDC_NO_MEDIAN_FILTER2, 73 .fid_pol = VPFE_PINPOL_POSITIVE,
70 .alaw = { 74 .vd_pol = VPFE_PINPOL_POSITIVE,
71 .gama_wd = 2, 75 .hd_pol = VPFE_PINPOL_POSITIVE,
76 .gain = {
77 .r_ye = 256,
78 .gb_g = 256,
79 .gr_cy = 256,
80 .b_mg = 256
72 }, 81 },
73 .blk_clamp = { 82 .config_params = {
74 .sample_pixel = 1, 83 .datasft = 2,
75 .dc_sub = 25 84 .mfilt1 = CCDC_NO_MEDIAN_FILTER1,
76 }, 85 .mfilt2 = CCDC_NO_MEDIAN_FILTER2,
77 .col_pat_field0 = { 86 .alaw = {
78 .olop = CCDC_GREEN_BLUE, 87 .gama_wd = 2,
79 .olep = CCDC_BLUE, 88 },
80 .elop = CCDC_RED, 89 .blk_clamp = {
81 .elep = CCDC_GREEN_RED 90 .sample_pixel = 1,
82 }, 91 .dc_sub = 25
83 .col_pat_field1 = { 92 },
84 .olop = CCDC_GREEN_BLUE, 93 .col_pat_field0 = {
85 .olep = CCDC_BLUE, 94 .olop = CCDC_GREEN_BLUE,
86 .elop = CCDC_RED, 95 .olep = CCDC_BLUE,
87 .elep = CCDC_GREEN_RED 96 .elop = CCDC_RED,
97 .elep = CCDC_GREEN_RED
98 },
99 .col_pat_field1 = {
100 .olop = CCDC_GREEN_BLUE,
101 .olep = CCDC_BLUE,
102 .elop = CCDC_RED,
103 .elep = CCDC_GREEN_RED
104 },
88 }, 105 },
89 }, 106 },
107 /* YCbCr configuration */
108 .ycbcr = {
109 .win = CCDC_WIN_PAL,
110 .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
111 .frm_fmt = CCDC_FRMFMT_INTERLACED,
112 .fid_pol = VPFE_PINPOL_POSITIVE,
113 .vd_pol = VPFE_PINPOL_POSITIVE,
114 .hd_pol = VPFE_PINPOL_POSITIVE,
115 .bt656_enable = 1,
116 .pix_order = CCDC_PIXORDER_CBYCRY,
117 .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
118 },
90}; 119};
91 120
92 121
93/* Object for CCDC ycbcr mode */
94static struct ccdc_params_ycbcr ccdc_hw_params_ycbcr = {
95 .win = CCDC_WIN_PAL,
96 .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
97 .frm_fmt = CCDC_FRMFMT_INTERLACED,
98 .fid_pol = VPFE_PINPOL_POSITIVE,
99 .vd_pol = VPFE_PINPOL_POSITIVE,
100 .hd_pol = VPFE_PINPOL_POSITIVE,
101 .bt656_enable = 1,
102 .pix_order = CCDC_PIXORDER_CBYCRY,
103 .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
104};
105
106static enum vpfe_hw_if_type ccdc_if_type;
107static void *__iomem ccdc_base_addr;
108static int ccdc_addr_size;
109
110/* Raw Bayer formats */ 122/* Raw Bayer formats */
111static u32 ccdc_raw_bayer_pix_formats[] = 123static u32 ccdc_raw_bayer_pix_formats[] =
112 {V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16}; 124 {V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16};
@@ -118,18 +130,12 @@ static u32 ccdc_raw_yuv_pix_formats[] =
118/* register access routines */ 130/* register access routines */
119static inline u32 regr(u32 offset) 131static inline u32 regr(u32 offset)
120{ 132{
121 return __raw_readl(ccdc_base_addr + offset); 133 return __raw_readl(ccdc_cfg.base_addr + offset);
122} 134}
123 135
124static inline void regw(u32 val, u32 offset) 136static inline void regw(u32 val, u32 offset)
125{ 137{
126 __raw_writel(val, ccdc_base_addr + offset); 138 __raw_writel(val, ccdc_cfg.base_addr + offset);
127}
128
129static void ccdc_set_ccdc_base(void *addr, int size)
130{
131 ccdc_base_addr = addr;
132 ccdc_addr_size = size;
133} 139}
134 140
135static void ccdc_enable(int en) 141static void ccdc_enable(int en)
@@ -153,12 +159,12 @@ static void ccdc_enable_output_to_sdram(int en)
153static void ccdc_config_gain_offset(void) 159static void ccdc_config_gain_offset(void)
154{ 160{
155 /* configure gain */ 161 /* configure gain */
156 regw(ccdc_hw_params_raw.gain.r_ye, RYEGAIN); 162 regw(ccdc_cfg.bayer.gain.r_ye, RYEGAIN);
157 regw(ccdc_hw_params_raw.gain.gr_cy, GRCYGAIN); 163 regw(ccdc_cfg.bayer.gain.gr_cy, GRCYGAIN);
158 regw(ccdc_hw_params_raw.gain.gb_g, GBGGAIN); 164 regw(ccdc_cfg.bayer.gain.gb_g, GBGGAIN);
159 regw(ccdc_hw_params_raw.gain.b_mg, BMGGAIN); 165 regw(ccdc_cfg.bayer.gain.b_mg, BMGGAIN);
160 /* configure offset */ 166 /* configure offset */
161 regw(ccdc_hw_params_raw.ccdc_offset, OFFSET); 167 regw(ccdc_cfg.bayer.ccdc_offset, OFFSET);
162} 168}
163 169
164/* 170/*
@@ -169,7 +175,7 @@ static int ccdc_restore_defaults(void)
169{ 175{
170 int i; 176 int i;
171 177
172 dev_dbg(dev, "\nstarting ccdc_restore_defaults..."); 178 dev_dbg(ccdc_cfg.dev, "\nstarting ccdc_restore_defaults...");
173 /* set all registers to zero */ 179 /* set all registers to zero */
174 for (i = 0; i <= CCDC_REG_LAST; i += 4) 180 for (i = 0; i <= CCDC_REG_LAST; i += 4)
175 regw(0, i); 181 regw(0, i);
@@ -180,30 +186,29 @@ static int ccdc_restore_defaults(void)
180 regw(CULH_DEFAULT, CULH); 186 regw(CULH_DEFAULT, CULH);
181 regw(CULV_DEFAULT, CULV); 187 regw(CULV_DEFAULT, CULV);
182 /* Set default Gain and Offset */ 188 /* Set default Gain and Offset */
183 ccdc_hw_params_raw.gain.r_ye = GAIN_DEFAULT; 189 ccdc_cfg.bayer.gain.r_ye = GAIN_DEFAULT;
184 ccdc_hw_params_raw.gain.gb_g = GAIN_DEFAULT; 190 ccdc_cfg.bayer.gain.gb_g = GAIN_DEFAULT;
185 ccdc_hw_params_raw.gain.gr_cy = GAIN_DEFAULT; 191 ccdc_cfg.bayer.gain.gr_cy = GAIN_DEFAULT;
186 ccdc_hw_params_raw.gain.b_mg = GAIN_DEFAULT; 192 ccdc_cfg.bayer.gain.b_mg = GAIN_DEFAULT;
187 ccdc_config_gain_offset(); 193 ccdc_config_gain_offset();
188 regw(OUTCLIP_DEFAULT, OUTCLIP); 194 regw(OUTCLIP_DEFAULT, OUTCLIP);
189 regw(LSCCFG2_DEFAULT, LSCCFG2); 195 regw(LSCCFG2_DEFAULT, LSCCFG2);
190 /* select ccdc input */ 196 /* select ccdc input */
191 if (vpss_select_ccdc_source(VPSS_CCDCIN)) { 197 if (vpss_select_ccdc_source(VPSS_CCDCIN)) {
192 dev_dbg(dev, "\ncouldn't select ccdc input source"); 198 dev_dbg(ccdc_cfg.dev, "\ncouldn't select ccdc input source");
193 return -EFAULT; 199 return -EFAULT;
194 } 200 }
195 /* select ccdc clock */ 201 /* select ccdc clock */
196 if (vpss_enable_clock(VPSS_CCDC_CLOCK, 1) < 0) { 202 if (vpss_enable_clock(VPSS_CCDC_CLOCK, 1) < 0) {
197 dev_dbg(dev, "\ncouldn't enable ccdc clock"); 203 dev_dbg(ccdc_cfg.dev, "\ncouldn't enable ccdc clock");
198 return -EFAULT; 204 return -EFAULT;
199 } 205 }
200 dev_dbg(dev, "\nEnd of ccdc_restore_defaults..."); 206 dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_restore_defaults...");
201 return 0; 207 return 0;
202} 208}
203 209
204static int ccdc_open(struct device *device) 210static int ccdc_open(struct device *device)
205{ 211{
206 dev = device;
207 return ccdc_restore_defaults(); 212 return ccdc_restore_defaults();
208} 213}
209 214
@@ -226,7 +231,7 @@ static void ccdc_setwin(struct v4l2_rect *image_win,
226 int vert_start, vert_nr_lines; 231 int vert_start, vert_nr_lines;
227 int mid_img = 0; 232 int mid_img = 0;
228 233
229 dev_dbg(dev, "\nStarting ccdc_setwin..."); 234 dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_setwin...");
230 235
231 /* 236 /*
232 * ppc - per pixel count. indicates how many pixels per cell 237 * ppc - per pixel count. indicates how many pixels per cell
@@ -260,45 +265,46 @@ static void ccdc_setwin(struct v4l2_rect *image_win,
260 regw(vert_start & CCDC_START_VER_ONE_MASK, SLV0); 265 regw(vert_start & CCDC_START_VER_ONE_MASK, SLV0);
261 regw(vert_start & CCDC_START_VER_TWO_MASK, SLV1); 266 regw(vert_start & CCDC_START_VER_TWO_MASK, SLV1);
262 regw(vert_nr_lines & CCDC_NUM_LINES_VER, NLV); 267 regw(vert_nr_lines & CCDC_NUM_LINES_VER, NLV);
263 dev_dbg(dev, "\nEnd of ccdc_setwin..."); 268 dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_setwin...");
264} 269}
265 270
266static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam) 271static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
267{ 272{
268 if (ccdcparam->datasft < CCDC_DATA_NO_SHIFT || 273 if (ccdcparam->datasft < CCDC_DATA_NO_SHIFT ||
269 ccdcparam->datasft > CCDC_DATA_SHIFT_6BIT) { 274 ccdcparam->datasft > CCDC_DATA_SHIFT_6BIT) {
270 dev_dbg(dev, "Invalid value of data shift\n"); 275 dev_dbg(ccdc_cfg.dev, "Invalid value of data shift\n");
271 return -EINVAL; 276 return -EINVAL;
272 } 277 }
273 278
274 if (ccdcparam->mfilt1 < CCDC_NO_MEDIAN_FILTER1 || 279 if (ccdcparam->mfilt1 < CCDC_NO_MEDIAN_FILTER1 ||
275 ccdcparam->mfilt1 > CCDC_MEDIAN_FILTER1) { 280 ccdcparam->mfilt1 > CCDC_MEDIAN_FILTER1) {
276 dev_dbg(dev, "Invalid value of median filter1\n"); 281 dev_dbg(ccdc_cfg.dev, "Invalid value of median filter1\n");
277 return -EINVAL; 282 return -EINVAL;
278 } 283 }
279 284
280 if (ccdcparam->mfilt2 < CCDC_NO_MEDIAN_FILTER2 || 285 if (ccdcparam->mfilt2 < CCDC_NO_MEDIAN_FILTER2 ||
281 ccdcparam->mfilt2 > CCDC_MEDIAN_FILTER2) { 286 ccdcparam->mfilt2 > CCDC_MEDIAN_FILTER2) {
282 dev_dbg(dev, "Invalid value of median filter2\n"); 287 dev_dbg(ccdc_cfg.dev, "Invalid value of median filter2\n");
283 return -EINVAL; 288 return -EINVAL;
284 } 289 }
285 290
286 if ((ccdcparam->med_filt_thres < 0) || 291 if ((ccdcparam->med_filt_thres < 0) ||
287 (ccdcparam->med_filt_thres > CCDC_MED_FILT_THRESH)) { 292 (ccdcparam->med_filt_thres > CCDC_MED_FILT_THRESH)) {
288 dev_dbg(dev, "Invalid value of median filter threshold\n"); 293 dev_dbg(ccdc_cfg.dev,
294 "Invalid value of median filter thresold\n");
289 return -EINVAL; 295 return -EINVAL;
290 } 296 }
291 297
292 if (ccdcparam->data_sz < CCDC_DATA_16BITS || 298 if (ccdcparam->data_sz < CCDC_DATA_16BITS ||
293 ccdcparam->data_sz > CCDC_DATA_8BITS) { 299 ccdcparam->data_sz > CCDC_DATA_8BITS) {
294 dev_dbg(dev, "Invalid value of data size\n"); 300 dev_dbg(ccdc_cfg.dev, "Invalid value of data size\n");
295 return -EINVAL; 301 return -EINVAL;
296 } 302 }
297 303
298 if (ccdcparam->alaw.enable) { 304 if (ccdcparam->alaw.enable) {
299 if (ccdcparam->alaw.gama_wd < CCDC_GAMMA_BITS_13_4 || 305 if (ccdcparam->alaw.gama_wd < CCDC_GAMMA_BITS_13_4 ||
300 ccdcparam->alaw.gama_wd > CCDC_GAMMA_BITS_09_0) { 306 ccdcparam->alaw.gama_wd > CCDC_GAMMA_BITS_09_0) {
301 dev_dbg(dev, "Invalid value of ALAW\n"); 307 dev_dbg(ccdc_cfg.dev, "Invalid value of ALAW\n");
302 return -EINVAL; 308 return -EINVAL;
303 } 309 }
304 } 310 }
@@ -306,12 +312,14 @@ static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
306 if (ccdcparam->blk_clamp.b_clamp_enable) { 312 if (ccdcparam->blk_clamp.b_clamp_enable) {
307 if (ccdcparam->blk_clamp.sample_pixel < CCDC_SAMPLE_1PIXELS || 313 if (ccdcparam->blk_clamp.sample_pixel < CCDC_SAMPLE_1PIXELS ||
308 ccdcparam->blk_clamp.sample_pixel > CCDC_SAMPLE_16PIXELS) { 314 ccdcparam->blk_clamp.sample_pixel > CCDC_SAMPLE_16PIXELS) {
309 dev_dbg(dev, "Invalid value of sample pixel\n"); 315 dev_dbg(ccdc_cfg.dev,
316 "Invalid value of sample pixel\n");
310 return -EINVAL; 317 return -EINVAL;
311 } 318 }
312 if (ccdcparam->blk_clamp.sample_ln < CCDC_SAMPLE_1LINES || 319 if (ccdcparam->blk_clamp.sample_ln < CCDC_SAMPLE_1LINES ||
313 ccdcparam->blk_clamp.sample_ln > CCDC_SAMPLE_16LINES) { 320 ccdcparam->blk_clamp.sample_ln > CCDC_SAMPLE_16LINES) {
314 dev_dbg(dev, "Invalid value of sample lines\n"); 321 dev_dbg(ccdc_cfg.dev,
322 "Invalid value of sample lines\n");
315 return -EINVAL; 323 return -EINVAL;
316 } 324 }
317 } 325 }
@@ -325,18 +333,18 @@ static int ccdc_set_params(void __user *params)
325 int x; 333 int x;
326 334
327 /* only raw module parameters can be set through the IOCTL */ 335 /* only raw module parameters can be set through the IOCTL */
328 if (ccdc_if_type != VPFE_RAW_BAYER) 336 if (ccdc_cfg.if_type != VPFE_RAW_BAYER)
329 return -EINVAL; 337 return -EINVAL;
330 338
331 x = copy_from_user(&ccdc_raw_params, params, sizeof(ccdc_raw_params)); 339 x = copy_from_user(&ccdc_raw_params, params, sizeof(ccdc_raw_params));
332 if (x) { 340 if (x) {
333 dev_dbg(dev, "ccdc_set_params: error in copying ccdc" 341 dev_dbg(ccdc_cfg.dev, "ccdc_set_params: error in copying ccdc"
334 "params, %d\n", x); 342 "params, %d\n", x);
335 return -EFAULT; 343 return -EFAULT;
336 } 344 }
337 345
338 if (!validate_ccdc_param(&ccdc_raw_params)) { 346 if (!validate_ccdc_param(&ccdc_raw_params)) {
339 memcpy(&ccdc_hw_params_raw.config_params, 347 memcpy(&ccdc_cfg.bayer.config_params,
340 &ccdc_raw_params, 348 &ccdc_raw_params,
341 sizeof(ccdc_raw_params)); 349 sizeof(ccdc_raw_params));
342 return 0; 350 return 0;
@@ -347,11 +355,11 @@ static int ccdc_set_params(void __user *params)
347/* This function will configure CCDC for YCbCr video capture */ 355/* This function will configure CCDC for YCbCr video capture */
348static void ccdc_config_ycbcr(void) 356static void ccdc_config_ycbcr(void)
349{ 357{
350 struct ccdc_params_ycbcr *params = &ccdc_hw_params_ycbcr; 358 struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr;
351 u32 temp; 359 u32 temp;
352 360
353 /* first set the CCDC power on defaults values in all registers */ 361 /* first set the CCDC power on defaults values in all registers */
354 dev_dbg(dev, "\nStarting ccdc_config_ycbcr..."); 362 dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_ycbcr...");
355 ccdc_restore_defaults(); 363 ccdc_restore_defaults();
356 364
357 /* configure pixel format & video frame format */ 365 /* configure pixel format & video frame format */
@@ -403,7 +411,7 @@ static void ccdc_config_ycbcr(void)
403 regw(CCDC_SDOFST_FIELD_INTERLEAVED, SDOFST); 411 regw(CCDC_SDOFST_FIELD_INTERLEAVED, SDOFST);
404 } 412 }
405 413
406 dev_dbg(dev, "\nEnd of ccdc_config_ycbcr...\n"); 414 dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_config_ycbcr...\n");
407} 415}
408 416
409/* 417/*
@@ -483,7 +491,7 @@ int ccdc_write_dfc_entry(int index, struct ccdc_vertical_dft *dfc)
483 */ 491 */
484 492
485 if (count) { 493 if (count) {
486 dev_err(dev, "defect table write timeout !!!\n"); 494 dev_err(ccdc_cfg.dev, "defect table write timeout !!!\n");
487 return -1; 495 return -1;
488 } 496 }
489 return 0; 497 return 0;
@@ -605,12 +613,12 @@ static void ccdc_config_color_patterns(struct ccdc_col_pat *pat0,
605/* This function will configure CCDC for Raw mode image capture */ 613/* This function will configure CCDC for Raw mode image capture */
606static int ccdc_config_raw(void) 614static int ccdc_config_raw(void)
607{ 615{
608 struct ccdc_params_raw *params = &ccdc_hw_params_raw; 616 struct ccdc_params_raw *params = &ccdc_cfg.bayer;
609 struct ccdc_config_params_raw *config_params = 617 struct ccdc_config_params_raw *config_params =
610 &ccdc_hw_params_raw.config_params; 618 &ccdc_cfg.bayer.config_params;
611 unsigned int val; 619 unsigned int val;
612 620
613 dev_dbg(dev, "\nStarting ccdc_config_raw..."); 621 dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_raw...");
614 622
615 /* restore power on defaults to register */ 623 /* restore power on defaults to register */
616 ccdc_restore_defaults(); 624 ccdc_restore_defaults();
@@ -659,7 +667,7 @@ static int ccdc_config_raw(void)
659 val |= (config_params->datasft & CCDC_DATASFT_MASK) << 667 val |= (config_params->datasft & CCDC_DATASFT_MASK) <<
660 CCDC_DATASFT_SHIFT; 668 CCDC_DATASFT_SHIFT;
661 regw(val , MODESET); 669 regw(val , MODESET);
662 dev_dbg(dev, "\nWriting 0x%x to MODESET...\n", val); 670 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to MODESET...\n", val);
663 671
664 /* Configure the Median Filter threshold */ 672 /* Configure the Median Filter threshold */
665 regw((config_params->med_filt_thres) & CCDC_MED_FILT_THRESH, MEDFILT); 673 regw((config_params->med_filt_thres) & CCDC_MED_FILT_THRESH, MEDFILT);
@@ -681,7 +689,7 @@ static int ccdc_config_raw(void)
681 (config_params->mfilt2 << CCDC_MFILT2_SHIFT)); 689 (config_params->mfilt2 << CCDC_MFILT2_SHIFT));
682 690
683 regw(val, GAMMAWD); 691 regw(val, GAMMAWD);
684 dev_dbg(dev, "\nWriting 0x%x to GAMMAWD...\n", val); 692 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to GAMMAWD...\n", val);
685 693
686 /* configure video window */ 694 /* configure video window */
687 ccdc_setwin(&params->win, params->frm_fmt, 1); 695 ccdc_setwin(&params->win, params->frm_fmt, 1);
@@ -706,7 +714,7 @@ static int ccdc_config_raw(void)
706 /* Configure the Gain & offset control */ 714 /* Configure the Gain & offset control */
707 ccdc_config_gain_offset(); 715 ccdc_config_gain_offset();
708 716
709 dev_dbg(dev, "\nWriting %x to COLPTN...\n", val); 717 dev_dbg(ccdc_cfg.dev, "\nWriting %x to COLPTN...\n", val);
710 718
711 /* Configure DATAOFST register */ 719 /* Configure DATAOFST register */
712 val = (config_params->data_offset.horz_offset & CCDC_DATAOFST_MASK) << 720 val = (config_params->data_offset.horz_offset & CCDC_DATAOFST_MASK) <<
@@ -726,7 +734,7 @@ static int ccdc_config_raw(void)
726 CCDC_HSIZE_VAL_MASK; 734 CCDC_HSIZE_VAL_MASK;
727 735
728 /* adjust to multiple of 32 */ 736 /* adjust to multiple of 32 */
729 dev_dbg(dev, "\nWriting 0x%x to HSIZE...\n", 737 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n",
730 (((params->win.width) + 31) >> 5) & 738 (((params->win.width) + 31) >> 5) &
731 CCDC_HSIZE_VAL_MASK); 739 CCDC_HSIZE_VAL_MASK);
732 } else { 740 } else {
@@ -734,7 +742,7 @@ static int ccdc_config_raw(void)
734 val |= (((params->win.width * 2) + 31) >> 5) & 742 val |= (((params->win.width * 2) + 31) >> 5) &
735 CCDC_HSIZE_VAL_MASK; 743 CCDC_HSIZE_VAL_MASK;
736 744
737 dev_dbg(dev, "\nWriting 0x%x to HSIZE...\n", 745 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n",
738 (((params->win.width * 2) + 31) >> 5) & 746 (((params->win.width * 2) + 31) >> 5) &
739 CCDC_HSIZE_VAL_MASK); 747 CCDC_HSIZE_VAL_MASK);
740 } 748 }
@@ -745,34 +753,34 @@ static int ccdc_config_raw(void)
745 if (params->image_invert_enable) { 753 if (params->image_invert_enable) {
746 /* For interlace inverse mode */ 754 /* For interlace inverse mode */
747 regw(CCDC_SDOFST_INTERLACE_INVERSE, SDOFST); 755 regw(CCDC_SDOFST_INTERLACE_INVERSE, SDOFST);
748 dev_dbg(dev, "\nWriting %x to SDOFST...\n", 756 dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
749 CCDC_SDOFST_INTERLACE_INVERSE); 757 CCDC_SDOFST_INTERLACE_INVERSE);
750 } else { 758 } else {
751 /* For interlace non inverse mode */ 759 /* For interlace non inverse mode */
752 regw(CCDC_SDOFST_INTERLACE_NORMAL, SDOFST); 760 regw(CCDC_SDOFST_INTERLACE_NORMAL, SDOFST);
753 dev_dbg(dev, "\nWriting %x to SDOFST...\n", 761 dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
754 CCDC_SDOFST_INTERLACE_NORMAL); 762 CCDC_SDOFST_INTERLACE_NORMAL);
755 } 763 }
756 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) { 764 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
757 if (params->image_invert_enable) { 765 if (params->image_invert_enable) {
758 /* For progessive inverse mode */ 766 /* For progessive inverse mode */
759 regw(CCDC_SDOFST_PROGRESSIVE_INVERSE, SDOFST); 767 regw(CCDC_SDOFST_PROGRESSIVE_INVERSE, SDOFST);
760 dev_dbg(dev, "\nWriting %x to SDOFST...\n", 768 dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
761 CCDC_SDOFST_PROGRESSIVE_INVERSE); 769 CCDC_SDOFST_PROGRESSIVE_INVERSE);
762 } else { 770 } else {
763 /* For progessive non inverse mode */ 771 /* For progessive non inverse mode */
764 regw(CCDC_SDOFST_PROGRESSIVE_NORMAL, SDOFST); 772 regw(CCDC_SDOFST_PROGRESSIVE_NORMAL, SDOFST);
765 dev_dbg(dev, "\nWriting %x to SDOFST...\n", 773 dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
766 CCDC_SDOFST_PROGRESSIVE_NORMAL); 774 CCDC_SDOFST_PROGRESSIVE_NORMAL);
767 } 775 }
768 } 776 }
769 dev_dbg(dev, "\nend of ccdc_config_raw..."); 777 dev_dbg(ccdc_cfg.dev, "\nend of ccdc_config_raw...");
770 return 0; 778 return 0;
771} 779}
772 780
773static int ccdc_configure(void) 781static int ccdc_configure(void)
774{ 782{
775 if (ccdc_if_type == VPFE_RAW_BAYER) 783 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
776 return ccdc_config_raw(); 784 return ccdc_config_raw();
777 else 785 else
778 ccdc_config_ycbcr(); 786 ccdc_config_ycbcr();
@@ -781,23 +789,23 @@ static int ccdc_configure(void)
781 789
782static int ccdc_set_buftype(enum ccdc_buftype buf_type) 790static int ccdc_set_buftype(enum ccdc_buftype buf_type)
783{ 791{
784 if (ccdc_if_type == VPFE_RAW_BAYER) 792 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
785 ccdc_hw_params_raw.buf_type = buf_type; 793 ccdc_cfg.bayer.buf_type = buf_type;
786 else 794 else
787 ccdc_hw_params_ycbcr.buf_type = buf_type; 795 ccdc_cfg.ycbcr.buf_type = buf_type;
788 return 0; 796 return 0;
789} 797}
790static enum ccdc_buftype ccdc_get_buftype(void) 798static enum ccdc_buftype ccdc_get_buftype(void)
791{ 799{
792 if (ccdc_if_type == VPFE_RAW_BAYER) 800 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
793 return ccdc_hw_params_raw.buf_type; 801 return ccdc_cfg.bayer.buf_type;
794 return ccdc_hw_params_ycbcr.buf_type; 802 return ccdc_cfg.ycbcr.buf_type;
795} 803}
796 804
797static int ccdc_enum_pix(u32 *pix, int i) 805static int ccdc_enum_pix(u32 *pix, int i)
798{ 806{
799 int ret = -EINVAL; 807 int ret = -EINVAL;
800 if (ccdc_if_type == VPFE_RAW_BAYER) { 808 if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
801 if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) { 809 if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) {
802 *pix = ccdc_raw_bayer_pix_formats[i]; 810 *pix = ccdc_raw_bayer_pix_formats[i];
803 ret = 0; 811 ret = 0;
@@ -813,20 +821,19 @@ static int ccdc_enum_pix(u32 *pix, int i)
813 821
814static int ccdc_set_pixel_format(u32 pixfmt) 822static int ccdc_set_pixel_format(u32 pixfmt)
815{ 823{
816 struct ccdc_a_law *alaw = 824 struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
817 &ccdc_hw_params_raw.config_params.alaw;
818 825
819 if (ccdc_if_type == VPFE_RAW_BAYER) { 826 if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
820 ccdc_hw_params_raw.pix_fmt = CCDC_PIXFMT_RAW; 827 ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
821 if (pixfmt == V4L2_PIX_FMT_SBGGR8) 828 if (pixfmt == V4L2_PIX_FMT_SBGGR8)
822 alaw->enable = 1; 829 alaw->enable = 1;
823 else if (pixfmt != V4L2_PIX_FMT_SBGGR16) 830 else if (pixfmt != V4L2_PIX_FMT_SBGGR16)
824 return -EINVAL; 831 return -EINVAL;
825 } else { 832 } else {
826 if (pixfmt == V4L2_PIX_FMT_YUYV) 833 if (pixfmt == V4L2_PIX_FMT_YUYV)
827 ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_YCBYCR; 834 ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
828 else if (pixfmt == V4L2_PIX_FMT_UYVY) 835 else if (pixfmt == V4L2_PIX_FMT_UYVY)
829 ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_CBYCRY; 836 ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
830 else 837 else
831 return -EINVAL; 838 return -EINVAL;
832 } 839 }
@@ -834,17 +841,16 @@ static int ccdc_set_pixel_format(u32 pixfmt)
834} 841}
835static u32 ccdc_get_pixel_format(void) 842static u32 ccdc_get_pixel_format(void)
836{ 843{
837 struct ccdc_a_law *alaw = 844 struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
838 &ccdc_hw_params_raw.config_params.alaw;
839 u32 pixfmt; 845 u32 pixfmt;
840 846
841 if (ccdc_if_type == VPFE_RAW_BAYER) 847 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
842 if (alaw->enable) 848 if (alaw->enable)
843 pixfmt = V4L2_PIX_FMT_SBGGR8; 849 pixfmt = V4L2_PIX_FMT_SBGGR8;
844 else 850 else
845 pixfmt = V4L2_PIX_FMT_SBGGR16; 851 pixfmt = V4L2_PIX_FMT_SBGGR16;
846 else { 852 else {
847 if (ccdc_hw_params_ycbcr.pix_order == CCDC_PIXORDER_YCBYCR) 853 if (ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
848 pixfmt = V4L2_PIX_FMT_YUYV; 854 pixfmt = V4L2_PIX_FMT_YUYV;
849 else 855 else
850 pixfmt = V4L2_PIX_FMT_UYVY; 856 pixfmt = V4L2_PIX_FMT_UYVY;
@@ -853,53 +859,53 @@ static u32 ccdc_get_pixel_format(void)
853} 859}
854static int ccdc_set_image_window(struct v4l2_rect *win) 860static int ccdc_set_image_window(struct v4l2_rect *win)
855{ 861{
856 if (ccdc_if_type == VPFE_RAW_BAYER) 862 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
857 ccdc_hw_params_raw.win = *win; 863 ccdc_cfg.bayer.win = *win;
858 else 864 else
859 ccdc_hw_params_ycbcr.win = *win; 865 ccdc_cfg.ycbcr.win = *win;
860 return 0; 866 return 0;
861} 867}
862 868
863static void ccdc_get_image_window(struct v4l2_rect *win) 869static void ccdc_get_image_window(struct v4l2_rect *win)
864{ 870{
865 if (ccdc_if_type == VPFE_RAW_BAYER) 871 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
866 *win = ccdc_hw_params_raw.win; 872 *win = ccdc_cfg.bayer.win;
867 else 873 else
868 *win = ccdc_hw_params_ycbcr.win; 874 *win = ccdc_cfg.ycbcr.win;
869} 875}
870 876
871static unsigned int ccdc_get_line_length(void) 877static unsigned int ccdc_get_line_length(void)
872{ 878{
873 struct ccdc_config_params_raw *config_params = 879 struct ccdc_config_params_raw *config_params =
874 &ccdc_hw_params_raw.config_params; 880 &ccdc_cfg.bayer.config_params;
875 unsigned int len; 881 unsigned int len;
876 882
877 if (ccdc_if_type == VPFE_RAW_BAYER) { 883 if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
878 if ((config_params->alaw.enable) || 884 if ((config_params->alaw.enable) ||
879 (config_params->data_sz == CCDC_DATA_8BITS)) 885 (config_params->data_sz == CCDC_DATA_8BITS))
880 len = ccdc_hw_params_raw.win.width; 886 len = ccdc_cfg.bayer.win.width;
881 else 887 else
882 len = ccdc_hw_params_raw.win.width * 2; 888 len = ccdc_cfg.bayer.win.width * 2;
883 } else 889 } else
884 len = ccdc_hw_params_ycbcr.win.width * 2; 890 len = ccdc_cfg.ycbcr.win.width * 2;
885 return ALIGN(len, 32); 891 return ALIGN(len, 32);
886} 892}
887 893
888static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt) 894static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt)
889{ 895{
890 if (ccdc_if_type == VPFE_RAW_BAYER) 896 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
891 ccdc_hw_params_raw.frm_fmt = frm_fmt; 897 ccdc_cfg.bayer.frm_fmt = frm_fmt;
892 else 898 else
893 ccdc_hw_params_ycbcr.frm_fmt = frm_fmt; 899 ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
894 return 0; 900 return 0;
895} 901}
896 902
897static enum ccdc_frmfmt ccdc_get_frame_format(void) 903static enum ccdc_frmfmt ccdc_get_frame_format(void)
898{ 904{
899 if (ccdc_if_type == VPFE_RAW_BAYER) 905 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
900 return ccdc_hw_params_raw.frm_fmt; 906 return ccdc_cfg.bayer.frm_fmt;
901 else 907 else
902 return ccdc_hw_params_ycbcr.frm_fmt; 908 return ccdc_cfg.ycbcr.frm_fmt;
903} 909}
904 910
905static int ccdc_getfid(void) 911static int ccdc_getfid(void)
@@ -916,14 +922,14 @@ static inline void ccdc_setfbaddr(unsigned long addr)
916 922
917static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params) 923static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
918{ 924{
919 ccdc_if_type = params->if_type; 925 ccdc_cfg.if_type = params->if_type;
920 926
921 switch (params->if_type) { 927 switch (params->if_type) {
922 case VPFE_BT656: 928 case VPFE_BT656:
923 case VPFE_YCBCR_SYNC_16: 929 case VPFE_YCBCR_SYNC_16:
924 case VPFE_YCBCR_SYNC_8: 930 case VPFE_YCBCR_SYNC_8:
925 ccdc_hw_params_ycbcr.vd_pol = params->vdpol; 931 ccdc_cfg.ycbcr.vd_pol = params->vdpol;
926 ccdc_hw_params_ycbcr.hd_pol = params->hdpol; 932 ccdc_cfg.ycbcr.hd_pol = params->hdpol;
927 break; 933 break;
928 default: 934 default:
929 /* TODO add support for raw bayer here */ 935 /* TODO add support for raw bayer here */
@@ -938,7 +944,6 @@ static struct ccdc_hw_device ccdc_hw_dev = {
938 .hw_ops = { 944 .hw_ops = {
939 .open = ccdc_open, 945 .open = ccdc_open,
940 .close = ccdc_close, 946 .close = ccdc_close,
941 .set_ccdc_base = ccdc_set_ccdc_base,
942 .enable = ccdc_enable, 947 .enable = ccdc_enable,
943 .enable_out_to_sdram = ccdc_enable_output_to_sdram, 948 .enable_out_to_sdram = ccdc_enable_output_to_sdram,
944 .set_hw_if_params = ccdc_set_hw_if_params, 949 .set_hw_if_params = ccdc_set_hw_if_params,
@@ -959,19 +964,118 @@ static struct ccdc_hw_device ccdc_hw_dev = {
959 }, 964 },
960}; 965};
961 966
962static int __init dm355_ccdc_init(void) 967static int __init dm355_ccdc_probe(struct platform_device *pdev)
963{ 968{
964 printk(KERN_NOTICE "dm355_ccdc_init\n"); 969 void (*setup_pinmux)(void);
965 if (vpfe_register_ccdc_device(&ccdc_hw_dev) < 0) 970 struct resource *res;
966 return -1; 971 int status = 0;
967 printk(KERN_NOTICE "%s is registered with vpfe.\n", 972
968 ccdc_hw_dev.name); 973 /*
974 * first try to register with vpfe. If not correct platform, then we
975 * don't have to iomap
976 */
977 status = vpfe_register_ccdc_device(&ccdc_hw_dev);
978 if (status < 0)
979 return status;
980
981 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
982 if (!res) {
983 status = -ENODEV;
984 goto fail_nores;
985 }
986
987 res = request_mem_region(res->start, resource_size(res), res->name);
988 if (!res) {
989 status = -EBUSY;
990 goto fail_nores;
991 }
992
993 ccdc_cfg.base_addr = ioremap_nocache(res->start, resource_size(res));
994 if (!ccdc_cfg.base_addr) {
995 status = -ENOMEM;
996 goto fail_nomem;
997 }
998
999 /* Get and enable Master clock */
1000 ccdc_cfg.mclk = clk_get(&pdev->dev, "master");
1001 if (IS_ERR(ccdc_cfg.mclk)) {
1002 status = PTR_ERR(ccdc_cfg.mclk);
1003 goto fail_nomap;
1004 }
1005 if (clk_enable(ccdc_cfg.mclk)) {
1006 status = -ENODEV;
1007 goto fail_mclk;
1008 }
1009
1010 /* Get and enable Slave clock */
1011 ccdc_cfg.sclk = clk_get(&pdev->dev, "slave");
1012 if (IS_ERR(ccdc_cfg.sclk)) {
1013 status = PTR_ERR(ccdc_cfg.sclk);
1014 goto fail_mclk;
1015 }
1016 if (clk_enable(ccdc_cfg.sclk)) {
1017 status = -ENODEV;
1018 goto fail_sclk;
1019 }
1020
1021 /* Platform data holds setup_pinmux function ptr */
1022 if (NULL == pdev->dev.platform_data) {
1023 status = -ENODEV;
1024 goto fail_sclk;
1025 }
1026 setup_pinmux = pdev->dev.platform_data;
1027 /*
1028 * setup Mux configuration for ccdc which may be different for
1029 * different SoCs using this CCDC
1030 */
1031 setup_pinmux();
1032 ccdc_cfg.dev = &pdev->dev;
1033 printk(KERN_NOTICE "%s is registered with vpfe.\n", ccdc_hw_dev.name);
969 return 0; 1034 return 0;
1035fail_sclk:
1036 clk_put(ccdc_cfg.sclk);
1037fail_mclk:
1038 clk_put(ccdc_cfg.mclk);
1039fail_nomap:
1040 iounmap(ccdc_cfg.base_addr);
1041fail_nomem:
1042 release_mem_region(res->start, resource_size(res));
1043fail_nores:
1044 vpfe_unregister_ccdc_device(&ccdc_hw_dev);
1045 return status;
970} 1046}
971 1047
972static void __exit dm355_ccdc_exit(void) 1048static int dm355_ccdc_remove(struct platform_device *pdev)
973{ 1049{
1050 struct resource *res;
1051
1052 clk_put(ccdc_cfg.mclk);
1053 clk_put(ccdc_cfg.sclk);
1054 iounmap(ccdc_cfg.base_addr);
1055 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1056 if (res)
1057 release_mem_region(res->start, resource_size(res));
974 vpfe_unregister_ccdc_device(&ccdc_hw_dev); 1058 vpfe_unregister_ccdc_device(&ccdc_hw_dev);
1059 return 0;
1060}
1061
1062static struct platform_driver dm355_ccdc_driver = {
1063 .driver = {
1064 .name = "dm355_ccdc",
1065 .owner = THIS_MODULE,
1066 },
1067 .remove = __devexit_p(dm355_ccdc_remove),
1068 .probe = dm355_ccdc_probe,
1069};
1070
1071static int __init dm355_ccdc_init(void)
1072{
1073 return platform_driver_register(&dm355_ccdc_driver);
1074}
1075
1076static void __exit dm355_ccdc_exit(void)
1077{
1078 platform_driver_unregister(&dm355_ccdc_driver);
975} 1079}
976 1080
977module_init(dm355_ccdc_init); 1081module_init(dm355_ccdc_init);
diff --git a/drivers/media/video/davinci/dm644x_ccdc.c b/drivers/media/video/davinci/dm644x_ccdc.c
index d5fa193f32d2..0c394cade22a 100644
--- a/drivers/media/video/davinci/dm644x_ccdc.c
+++ b/drivers/media/video/davinci/dm644x_ccdc.c
@@ -37,8 +37,12 @@
37#include <linux/platform_device.h> 37#include <linux/platform_device.h>
38#include <linux/uaccess.h> 38#include <linux/uaccess.h>
39#include <linux/videodev2.h> 39#include <linux/videodev2.h>
40#include <linux/clk.h>
41#include <linux/err.h>
42
40#include <media/davinci/dm644x_ccdc.h> 43#include <media/davinci/dm644x_ccdc.h>
41#include <media/davinci/vpss.h> 44#include <media/davinci/vpss.h>
45
42#include "dm644x_ccdc_regs.h" 46#include "dm644x_ccdc_regs.h"
43#include "ccdc_hw_device.h" 47#include "ccdc_hw_device.h"
44 48
@@ -46,32 +50,44 @@ MODULE_LICENSE("GPL");
46MODULE_DESCRIPTION("CCDC Driver for DM6446"); 50MODULE_DESCRIPTION("CCDC Driver for DM6446");
47MODULE_AUTHOR("Texas Instruments"); 51MODULE_AUTHOR("Texas Instruments");
48 52
49static struct device *dev; 53static struct ccdc_oper_config {
50 54 struct device *dev;
51/* Object for CCDC raw mode */ 55 /* CCDC interface type */
52static struct ccdc_params_raw ccdc_hw_params_raw = { 56 enum vpfe_hw_if_type if_type;
53 .pix_fmt = CCDC_PIXFMT_RAW, 57 /* Raw Bayer configuration */
54 .frm_fmt = CCDC_FRMFMT_PROGRESSIVE, 58 struct ccdc_params_raw bayer;
55 .win = CCDC_WIN_VGA, 59 /* YCbCr configuration */
56 .fid_pol = VPFE_PINPOL_POSITIVE, 60 struct ccdc_params_ycbcr ycbcr;
57 .vd_pol = VPFE_PINPOL_POSITIVE, 61 /* Master clock */
58 .hd_pol = VPFE_PINPOL_POSITIVE, 62 struct clk *mclk;
59 .config_params = { 63 /* slave clock */
60 .data_sz = CCDC_DATA_10BITS, 64 struct clk *sclk;
65 /* ccdc base address */
66 void __iomem *base_addr;
67} ccdc_cfg = {
68 /* Raw configurations */
69 .bayer = {
70 .pix_fmt = CCDC_PIXFMT_RAW,
71 .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
72 .win = CCDC_WIN_VGA,
73 .fid_pol = VPFE_PINPOL_POSITIVE,
74 .vd_pol = VPFE_PINPOL_POSITIVE,
75 .hd_pol = VPFE_PINPOL_POSITIVE,
76 .config_params = {
77 .data_sz = CCDC_DATA_10BITS,
78 },
79 },
80 .ycbcr = {
81 .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
82 .frm_fmt = CCDC_FRMFMT_INTERLACED,
83 .win = CCDC_WIN_PAL,
84 .fid_pol = VPFE_PINPOL_POSITIVE,
85 .vd_pol = VPFE_PINPOL_POSITIVE,
86 .hd_pol = VPFE_PINPOL_POSITIVE,
87 .bt656_enable = 1,
88 .pix_order = CCDC_PIXORDER_CBYCRY,
89 .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
61 }, 90 },
62};
63
64/* Object for CCDC ycbcr mode */
65static struct ccdc_params_ycbcr ccdc_hw_params_ycbcr = {
66 .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
67 .frm_fmt = CCDC_FRMFMT_INTERLACED,
68 .win = CCDC_WIN_PAL,
69 .fid_pol = VPFE_PINPOL_POSITIVE,
70 .vd_pol = VPFE_PINPOL_POSITIVE,
71 .hd_pol = VPFE_PINPOL_POSITIVE,
72 .bt656_enable = 1,
73 .pix_order = CCDC_PIXORDER_CBYCRY,
74 .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
75}; 91};
76 92
77#define CCDC_MAX_RAW_YUV_FORMATS 2 93#define CCDC_MAX_RAW_YUV_FORMATS 2
@@ -84,25 +100,15 @@ static u32 ccdc_raw_bayer_pix_formats[] =
84static u32 ccdc_raw_yuv_pix_formats[] = 100static u32 ccdc_raw_yuv_pix_formats[] =
85 {V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV}; 101 {V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV};
86 102
87static void *__iomem ccdc_base_addr;
88static int ccdc_addr_size;
89static enum vpfe_hw_if_type ccdc_if_type;
90
91/* register access routines */ 103/* register access routines */
92static inline u32 regr(u32 offset) 104static inline u32 regr(u32 offset)
93{ 105{
94 return __raw_readl(ccdc_base_addr + offset); 106 return __raw_readl(ccdc_cfg.base_addr + offset);
95} 107}
96 108
97static inline void regw(u32 val, u32 offset) 109static inline void regw(u32 val, u32 offset)
98{ 110{
99 __raw_writel(val, ccdc_base_addr + offset); 111 __raw_writel(val, ccdc_cfg.base_addr + offset);
100}
101
102static void ccdc_set_ccdc_base(void *addr, int size)
103{
104 ccdc_base_addr = addr;
105 ccdc_addr_size = size;
106} 112}
107 113
108static void ccdc_enable(int flag) 114static void ccdc_enable(int flag)
@@ -132,7 +138,7 @@ void ccdc_setwin(struct v4l2_rect *image_win,
132 int vert_start, vert_nr_lines; 138 int vert_start, vert_nr_lines;
133 int val = 0, mid_img = 0; 139 int val = 0, mid_img = 0;
134 140
135 dev_dbg(dev, "\nStarting ccdc_setwin..."); 141 dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_setwin...");
136 /* 142 /*
137 * ppc - per pixel count. indicates how many pixels per cell 143 * ppc - per pixel count. indicates how many pixels per cell
138 * output to SDRAM. example, for ycbcr, it is one y and one c, so 2. 144 * output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
@@ -171,7 +177,7 @@ void ccdc_setwin(struct v4l2_rect *image_win,
171 regw((vert_start << CCDC_VERT_START_SLV0_SHIFT) | vert_start, 177 regw((vert_start << CCDC_VERT_START_SLV0_SHIFT) | vert_start,
172 CCDC_VERT_START); 178 CCDC_VERT_START);
173 regw(vert_nr_lines, CCDC_VERT_LINES); 179 regw(vert_nr_lines, CCDC_VERT_LINES);
174 dev_dbg(dev, "\nEnd of ccdc_setwin..."); 180 dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_setwin...");
175} 181}
176 182
177static void ccdc_readregs(void) 183static void ccdc_readregs(void)
@@ -179,39 +185,39 @@ static void ccdc_readregs(void)
179 unsigned int val = 0; 185 unsigned int val = 0;
180 186
181 val = regr(CCDC_ALAW); 187 val = regr(CCDC_ALAW);
182 dev_notice(dev, "\nReading 0x%x to ALAW...\n", val); 188 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to ALAW...\n", val);
183 val = regr(CCDC_CLAMP); 189 val = regr(CCDC_CLAMP);
184 dev_notice(dev, "\nReading 0x%x to CLAMP...\n", val); 190 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to CLAMP...\n", val);
185 val = regr(CCDC_DCSUB); 191 val = regr(CCDC_DCSUB);
186 dev_notice(dev, "\nReading 0x%x to DCSUB...\n", val); 192 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to DCSUB...\n", val);
187 val = regr(CCDC_BLKCMP); 193 val = regr(CCDC_BLKCMP);
188 dev_notice(dev, "\nReading 0x%x to BLKCMP...\n", val); 194 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to BLKCMP...\n", val);
189 val = regr(CCDC_FPC_ADDR); 195 val = regr(CCDC_FPC_ADDR);
190 dev_notice(dev, "\nReading 0x%x to FPC_ADDR...\n", val); 196 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FPC_ADDR...\n", val);
191 val = regr(CCDC_FPC); 197 val = regr(CCDC_FPC);
192 dev_notice(dev, "\nReading 0x%x to FPC...\n", val); 198 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FPC...\n", val);
193 val = regr(CCDC_FMTCFG); 199 val = regr(CCDC_FMTCFG);
194 dev_notice(dev, "\nReading 0x%x to FMTCFG...\n", val); 200 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FMTCFG...\n", val);
195 val = regr(CCDC_COLPTN); 201 val = regr(CCDC_COLPTN);
196 dev_notice(dev, "\nReading 0x%x to COLPTN...\n", val); 202 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to COLPTN...\n", val);
197 val = regr(CCDC_FMT_HORZ); 203 val = regr(CCDC_FMT_HORZ);
198 dev_notice(dev, "\nReading 0x%x to FMT_HORZ...\n", val); 204 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FMT_HORZ...\n", val);
199 val = regr(CCDC_FMT_VERT); 205 val = regr(CCDC_FMT_VERT);
200 dev_notice(dev, "\nReading 0x%x to FMT_VERT...\n", val); 206 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FMT_VERT...\n", val);
201 val = regr(CCDC_HSIZE_OFF); 207 val = regr(CCDC_HSIZE_OFF);
202 dev_notice(dev, "\nReading 0x%x to HSIZE_OFF...\n", val); 208 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to HSIZE_OFF...\n", val);
203 val = regr(CCDC_SDOFST); 209 val = regr(CCDC_SDOFST);
204 dev_notice(dev, "\nReading 0x%x to SDOFST...\n", val); 210 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to SDOFST...\n", val);
205 val = regr(CCDC_VP_OUT); 211 val = regr(CCDC_VP_OUT);
206 dev_notice(dev, "\nReading 0x%x to VP_OUT...\n", val); 212 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to VP_OUT...\n", val);
207 val = regr(CCDC_SYN_MODE); 213 val = regr(CCDC_SYN_MODE);
208 dev_notice(dev, "\nReading 0x%x to SYN_MODE...\n", val); 214 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to SYN_MODE...\n", val);
209 val = regr(CCDC_HORZ_INFO); 215 val = regr(CCDC_HORZ_INFO);
210 dev_notice(dev, "\nReading 0x%x to HORZ_INFO...\n", val); 216 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to HORZ_INFO...\n", val);
211 val = regr(CCDC_VERT_START); 217 val = regr(CCDC_VERT_START);
212 dev_notice(dev, "\nReading 0x%x to VERT_START...\n", val); 218 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to VERT_START...\n", val);
213 val = regr(CCDC_VERT_LINES); 219 val = regr(CCDC_VERT_LINES);
214 dev_notice(dev, "\nReading 0x%x to VERT_LINES...\n", val); 220 dev_notice(ccdc_cfg.dev, "\nReading 0x%x to VERT_LINES...\n", val);
215} 221}
216 222
217static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam) 223static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
@@ -220,7 +226,7 @@ static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
220 if ((ccdcparam->alaw.gama_wd > CCDC_GAMMA_BITS_09_0) || 226 if ((ccdcparam->alaw.gama_wd > CCDC_GAMMA_BITS_09_0) ||
221 (ccdcparam->alaw.gama_wd < CCDC_GAMMA_BITS_15_6) || 227 (ccdcparam->alaw.gama_wd < CCDC_GAMMA_BITS_15_6) ||
222 (ccdcparam->alaw.gama_wd < ccdcparam->data_sz)) { 228 (ccdcparam->alaw.gama_wd < ccdcparam->data_sz)) {
223 dev_dbg(dev, "\nInvalid data line select"); 229 dev_dbg(ccdc_cfg.dev, "\nInvalid data line select");
224 return -1; 230 return -1;
225 } 231 }
226 } 232 }
@@ -230,7 +236,7 @@ static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
230static int ccdc_update_raw_params(struct ccdc_config_params_raw *raw_params) 236static int ccdc_update_raw_params(struct ccdc_config_params_raw *raw_params)
231{ 237{
232 struct ccdc_config_params_raw *config_params = 238 struct ccdc_config_params_raw *config_params =
233 &ccdc_hw_params_raw.config_params; 239 &ccdc_cfg.bayer.config_params;
234 unsigned int *fpc_virtaddr = NULL; 240 unsigned int *fpc_virtaddr = NULL;
235 unsigned int *fpc_physaddr = NULL; 241 unsigned int *fpc_physaddr = NULL;
236 242
@@ -266,7 +272,7 @@ static int ccdc_update_raw_params(struct ccdc_config_params_raw *raw_params)
266 FP_NUM_BYTES)); 272 FP_NUM_BYTES));
267 273
268 if (fpc_virtaddr == NULL) { 274 if (fpc_virtaddr == NULL) {
269 dev_dbg(dev, 275 dev_dbg(ccdc_cfg.dev,
270 "\nUnable to allocate memory for FPC"); 276 "\nUnable to allocate memory for FPC");
271 return -EFAULT; 277 return -EFAULT;
272 } 278 }
@@ -279,7 +285,7 @@ static int ccdc_update_raw_params(struct ccdc_config_params_raw *raw_params)
279 if (copy_from_user(fpc_virtaddr, 285 if (copy_from_user(fpc_virtaddr,
280 (void __user *)raw_params->fault_pxl.fpc_table_addr, 286 (void __user *)raw_params->fault_pxl.fpc_table_addr,
281 config_params->fault_pxl.fp_num * FP_NUM_BYTES)) { 287 config_params->fault_pxl.fp_num * FP_NUM_BYTES)) {
282 dev_dbg(dev, "\n copy_from_user failed"); 288 dev_dbg(ccdc_cfg.dev, "\n copy_from_user failed");
283 return -EFAULT; 289 return -EFAULT;
284 } 290 }
285 config_params->fault_pxl.fpc_table_addr = (unsigned int)fpc_physaddr; 291 config_params->fault_pxl.fpc_table_addr = (unsigned int)fpc_physaddr;
@@ -289,7 +295,7 @@ static int ccdc_update_raw_params(struct ccdc_config_params_raw *raw_params)
289static int ccdc_close(struct device *dev) 295static int ccdc_close(struct device *dev)
290{ 296{
291 struct ccdc_config_params_raw *config_params = 297 struct ccdc_config_params_raw *config_params =
292 &ccdc_hw_params_raw.config_params; 298 &ccdc_cfg.bayer.config_params;
293 unsigned int *fpc_physaddr = NULL, *fpc_virtaddr = NULL; 299 unsigned int *fpc_physaddr = NULL, *fpc_virtaddr = NULL;
294 300
295 fpc_physaddr = (unsigned int *)config_params->fault_pxl.fpc_table_addr; 301 fpc_physaddr = (unsigned int *)config_params->fault_pxl.fpc_table_addr;
@@ -323,9 +329,8 @@ static void ccdc_restore_defaults(void)
323 329
324static int ccdc_open(struct device *device) 330static int ccdc_open(struct device *device)
325{ 331{
326 dev = device;
327 ccdc_restore_defaults(); 332 ccdc_restore_defaults();
328 if (ccdc_if_type == VPFE_RAW_BAYER) 333 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
329 ccdc_enable_vport(1); 334 ccdc_enable_vport(1);
330 return 0; 335 return 0;
331} 336}
@@ -341,12 +346,12 @@ static int ccdc_set_params(void __user *params)
341 struct ccdc_config_params_raw ccdc_raw_params; 346 struct ccdc_config_params_raw ccdc_raw_params;
342 int x; 347 int x;
343 348
344 if (ccdc_if_type != VPFE_RAW_BAYER) 349 if (ccdc_cfg.if_type != VPFE_RAW_BAYER)
345 return -EINVAL; 350 return -EINVAL;
346 351
347 x = copy_from_user(&ccdc_raw_params, params, sizeof(ccdc_raw_params)); 352 x = copy_from_user(&ccdc_raw_params, params, sizeof(ccdc_raw_params));
348 if (x) { 353 if (x) {
349 dev_dbg(dev, "ccdc_set_params: error in copying" 354 dev_dbg(ccdc_cfg.dev, "ccdc_set_params: error in copying"
350 "ccdc params, %d\n", x); 355 "ccdc params, %d\n", x);
351 return -EFAULT; 356 return -EFAULT;
352 } 357 }
@@ -364,10 +369,10 @@ static int ccdc_set_params(void __user *params)
364 */ 369 */
365void ccdc_config_ycbcr(void) 370void ccdc_config_ycbcr(void)
366{ 371{
367 struct ccdc_params_ycbcr *params = &ccdc_hw_params_ycbcr; 372 struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr;
368 u32 syn_mode; 373 u32 syn_mode;
369 374
370 dev_dbg(dev, "\nStarting ccdc_config_ycbcr..."); 375 dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_ycbcr...");
371 /* 376 /*
372 * first restore the CCDC registers to default values 377 * first restore the CCDC registers to default values
373 * This is important since we assume default values to be set in 378 * This is important since we assume default values to be set in
@@ -428,7 +433,7 @@ void ccdc_config_ycbcr(void)
428 regw(CCDC_SDOFST_FIELD_INTERLEAVED, CCDC_SDOFST); 433 regw(CCDC_SDOFST_FIELD_INTERLEAVED, CCDC_SDOFST);
429 434
430 ccdc_sbl_reset(); 435 ccdc_sbl_reset();
431 dev_dbg(dev, "\nEnd of ccdc_config_ycbcr...\n"); 436 dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_config_ycbcr...\n");
432 ccdc_readregs(); 437 ccdc_readregs();
433} 438}
434 439
@@ -440,9 +445,9 @@ static void ccdc_config_black_clamp(struct ccdc_black_clamp *bclamp)
440 /* configure DCSub */ 445 /* configure DCSub */
441 val = (bclamp->dc_sub) & CCDC_BLK_DC_SUB_MASK; 446 val = (bclamp->dc_sub) & CCDC_BLK_DC_SUB_MASK;
442 regw(val, CCDC_DCSUB); 447 regw(val, CCDC_DCSUB);
443 dev_dbg(dev, "\nWriting 0x%x to DCSUB...\n", val); 448 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to DCSUB...\n", val);
444 regw(CCDC_CLAMP_DEFAULT_VAL, CCDC_CLAMP); 449 regw(CCDC_CLAMP_DEFAULT_VAL, CCDC_CLAMP);
445 dev_dbg(dev, "\nWriting 0x0000 to CLAMP...\n"); 450 dev_dbg(ccdc_cfg.dev, "\nWriting 0x0000 to CLAMP...\n");
446 return; 451 return;
447 } 452 }
448 /* 453 /*
@@ -457,10 +462,10 @@ static void ccdc_config_black_clamp(struct ccdc_black_clamp *bclamp)
457 ((bclamp->sample_pixel & CCDC_BLK_SAMPLE_LN_MASK) << 462 ((bclamp->sample_pixel & CCDC_BLK_SAMPLE_LN_MASK) <<
458 CCDC_BLK_SAMPLE_LN_SHIFT) | CCDC_BLK_CLAMP_ENABLE); 463 CCDC_BLK_SAMPLE_LN_SHIFT) | CCDC_BLK_CLAMP_ENABLE);
459 regw(val, CCDC_CLAMP); 464 regw(val, CCDC_CLAMP);
460 dev_dbg(dev, "\nWriting 0x%x to CLAMP...\n", val); 465 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to CLAMP...\n", val);
461 /* If Black clamping is enable then make dcsub 0 */ 466 /* If Black clamping is enable then make dcsub 0 */
462 regw(CCDC_DCSUB_DEFAULT_VAL, CCDC_DCSUB); 467 regw(CCDC_DCSUB_DEFAULT_VAL, CCDC_DCSUB);
463 dev_dbg(dev, "\nWriting 0x00000000 to DCSUB...\n"); 468 dev_dbg(ccdc_cfg.dev, "\nWriting 0x00000000 to DCSUB...\n");
464} 469}
465 470
466static void ccdc_config_black_compense(struct ccdc_black_compensation *bcomp) 471static void ccdc_config_black_compense(struct ccdc_black_compensation *bcomp)
@@ -490,17 +495,17 @@ static void ccdc_config_fpc(struct ccdc_fault_pixel *fpc)
490 495
491 /* Configure Fault pixel if needed */ 496 /* Configure Fault pixel if needed */
492 regw(fpc->fpc_table_addr, CCDC_FPC_ADDR); 497 regw(fpc->fpc_table_addr, CCDC_FPC_ADDR);
493 dev_dbg(dev, "\nWriting 0x%x to FPC_ADDR...\n", 498 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FPC_ADDR...\n",
494 (fpc->fpc_table_addr)); 499 (fpc->fpc_table_addr));
495 /* Write the FPC params with FPC disable */ 500 /* Write the FPC params with FPC disable */
496 val = fpc->fp_num & CCDC_FPC_FPC_NUM_MASK; 501 val = fpc->fp_num & CCDC_FPC_FPC_NUM_MASK;
497 regw(val, CCDC_FPC); 502 regw(val, CCDC_FPC);
498 503
499 dev_dbg(dev, "\nWriting 0x%x to FPC...\n", val); 504 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FPC...\n", val);
500 /* read the FPC register */ 505 /* read the FPC register */
501 val = regr(CCDC_FPC) | CCDC_FPC_ENABLE; 506 val = regr(CCDC_FPC) | CCDC_FPC_ENABLE;
502 regw(val, CCDC_FPC); 507 regw(val, CCDC_FPC);
503 dev_dbg(dev, "\nWriting 0x%x to FPC...\n", val); 508 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FPC...\n", val);
504} 509}
505 510
506/* 511/*
@@ -509,13 +514,13 @@ static void ccdc_config_fpc(struct ccdc_fault_pixel *fpc)
509 */ 514 */
510void ccdc_config_raw(void) 515void ccdc_config_raw(void)
511{ 516{
512 struct ccdc_params_raw *params = &ccdc_hw_params_raw; 517 struct ccdc_params_raw *params = &ccdc_cfg.bayer;
513 struct ccdc_config_params_raw *config_params = 518 struct ccdc_config_params_raw *config_params =
514 &ccdc_hw_params_raw.config_params; 519 &ccdc_cfg.bayer.config_params;
515 unsigned int syn_mode = 0; 520 unsigned int syn_mode = 0;
516 unsigned int val; 521 unsigned int val;
517 522
518 dev_dbg(dev, "\nStarting ccdc_config_raw..."); 523 dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_raw...");
519 524
520 /* Reset CCDC */ 525 /* Reset CCDC */
521 ccdc_restore_defaults(); 526 ccdc_restore_defaults();
@@ -545,7 +550,7 @@ void ccdc_config_raw(void)
545 val = ((config_params->alaw.gama_wd & 550 val = ((config_params->alaw.gama_wd &
546 CCDC_ALAW_GAMA_WD_MASK) | CCDC_ALAW_ENABLE); 551 CCDC_ALAW_GAMA_WD_MASK) | CCDC_ALAW_ENABLE);
547 regw(val, CCDC_ALAW); 552 regw(val, CCDC_ALAW);
548 dev_dbg(dev, "\nWriting 0x%x to ALAW...\n", val); 553 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to ALAW...\n", val);
549 } 554 }
550 555
551 /* Configure video window */ 556 /* Configure video window */
@@ -582,11 +587,11 @@ void ccdc_config_raw(void)
582 /* Write value in FMTCFG */ 587 /* Write value in FMTCFG */
583 regw(val, CCDC_FMTCFG); 588 regw(val, CCDC_FMTCFG);
584 589
585 dev_dbg(dev, "\nWriting 0x%x to FMTCFG...\n", val); 590 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FMTCFG...\n", val);
586 /* Configure the color pattern according to mt9t001 sensor */ 591 /* Configure the color pattern according to mt9t001 sensor */
587 regw(CCDC_COLPTN_VAL, CCDC_COLPTN); 592 regw(CCDC_COLPTN_VAL, CCDC_COLPTN);
588 593
589 dev_dbg(dev, "\nWriting 0xBB11BB11 to COLPTN...\n"); 594 dev_dbg(ccdc_cfg.dev, "\nWriting 0xBB11BB11 to COLPTN...\n");
590 /* 595 /*
591 * Configure Data formatter(Video port) pixel selection 596 * Configure Data formatter(Video port) pixel selection
592 * (FMT_HORZ, FMT_VERT) 597 * (FMT_HORZ, FMT_VERT)
@@ -596,7 +601,7 @@ void ccdc_config_raw(void)
596 (params->win.width & CCDC_FMT_HORZ_FMTLNH_MASK); 601 (params->win.width & CCDC_FMT_HORZ_FMTLNH_MASK);
597 regw(val, CCDC_FMT_HORZ); 602 regw(val, CCDC_FMT_HORZ);
598 603
599 dev_dbg(dev, "\nWriting 0x%x to FMT_HORZ...\n", val); 604 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FMT_HORZ...\n", val);
600 val = (params->win.top & CCDC_FMT_VERT_FMTSLV_MASK) 605 val = (params->win.top & CCDC_FMT_VERT_FMTSLV_MASK)
601 << CCDC_FMT_VERT_FMTSLV_SHIFT; 606 << CCDC_FMT_VERT_FMTSLV_SHIFT;
602 if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) 607 if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE)
@@ -604,13 +609,13 @@ void ccdc_config_raw(void)
604 else 609 else
605 val |= (params->win.height >> 1) & CCDC_FMT_VERT_FMTLNV_MASK; 610 val |= (params->win.height >> 1) & CCDC_FMT_VERT_FMTLNV_MASK;
606 611
607 dev_dbg(dev, "\nparams->win.height 0x%x ...\n", 612 dev_dbg(ccdc_cfg.dev, "\nparams->win.height 0x%x ...\n",
608 params->win.height); 613 params->win.height);
609 regw(val, CCDC_FMT_VERT); 614 regw(val, CCDC_FMT_VERT);
610 615
611 dev_dbg(dev, "\nWriting 0x%x to FMT_VERT...\n", val); 616 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FMT_VERT...\n", val);
612 617
613 dev_dbg(dev, "\nbelow regw(val, FMT_VERT)..."); 618 dev_dbg(ccdc_cfg.dev, "\nbelow regw(val, FMT_VERT)...");
614 619
615 /* 620 /*
616 * Configure Horizontal offset register. If pack 8 is enabled then 621 * Configure Horizontal offset register. If pack 8 is enabled then
@@ -631,17 +636,17 @@ void ccdc_config_raw(void)
631 if (params->image_invert_enable) { 636 if (params->image_invert_enable) {
632 /* For intelace inverse mode */ 637 /* For intelace inverse mode */
633 regw(CCDC_INTERLACED_IMAGE_INVERT, CCDC_SDOFST); 638 regw(CCDC_INTERLACED_IMAGE_INVERT, CCDC_SDOFST);
634 dev_dbg(dev, "\nWriting 0x4B6D to SDOFST...\n"); 639 dev_dbg(ccdc_cfg.dev, "\nWriting 0x4B6D to SDOFST..\n");
635 } 640 }
636 641
637 else { 642 else {
638 /* For intelace non inverse mode */ 643 /* For intelace non inverse mode */
639 regw(CCDC_INTERLACED_NO_IMAGE_INVERT, CCDC_SDOFST); 644 regw(CCDC_INTERLACED_NO_IMAGE_INVERT, CCDC_SDOFST);
640 dev_dbg(dev, "\nWriting 0x0249 to SDOFST...\n"); 645 dev_dbg(ccdc_cfg.dev, "\nWriting 0x0249 to SDOFST..\n");
641 } 646 }
642 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) { 647 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
643 regw(CCDC_PROGRESSIVE_NO_IMAGE_INVERT, CCDC_SDOFST); 648 regw(CCDC_PROGRESSIVE_NO_IMAGE_INVERT, CCDC_SDOFST);
644 dev_dbg(dev, "\nWriting 0x0000 to SDOFST...\n"); 649 dev_dbg(ccdc_cfg.dev, "\nWriting 0x0000 to SDOFST...\n");
645 } 650 }
646 651
647 /* 652 /*
@@ -662,18 +667,18 @@ void ccdc_config_raw(void)
662 val |= (params->win.left) & CCDC_VP_OUT_HORZ_ST_MASK; 667 val |= (params->win.left) & CCDC_VP_OUT_HORZ_ST_MASK;
663 regw(val, CCDC_VP_OUT); 668 regw(val, CCDC_VP_OUT);
664 669
665 dev_dbg(dev, "\nWriting 0x%x to VP_OUT...\n", val); 670 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to VP_OUT...\n", val);
666 regw(syn_mode, CCDC_SYN_MODE); 671 regw(syn_mode, CCDC_SYN_MODE);
667 dev_dbg(dev, "\nWriting 0x%x to SYN_MODE...\n", syn_mode); 672 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to SYN_MODE...\n", syn_mode);
668 673
669 ccdc_sbl_reset(); 674 ccdc_sbl_reset();
670 dev_dbg(dev, "\nend of ccdc_config_raw..."); 675 dev_dbg(ccdc_cfg.dev, "\nend of ccdc_config_raw...");
671 ccdc_readregs(); 676 ccdc_readregs();
672} 677}
673 678
674static int ccdc_configure(void) 679static int ccdc_configure(void)
675{ 680{
676 if (ccdc_if_type == VPFE_RAW_BAYER) 681 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
677 ccdc_config_raw(); 682 ccdc_config_raw();
678 else 683 else
679 ccdc_config_ycbcr(); 684 ccdc_config_ycbcr();
@@ -682,24 +687,24 @@ static int ccdc_configure(void)
682 687
683static int ccdc_set_buftype(enum ccdc_buftype buf_type) 688static int ccdc_set_buftype(enum ccdc_buftype buf_type)
684{ 689{
685 if (ccdc_if_type == VPFE_RAW_BAYER) 690 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
686 ccdc_hw_params_raw.buf_type = buf_type; 691 ccdc_cfg.bayer.buf_type = buf_type;
687 else 692 else
688 ccdc_hw_params_ycbcr.buf_type = buf_type; 693 ccdc_cfg.ycbcr.buf_type = buf_type;
689 return 0; 694 return 0;
690} 695}
691 696
692static enum ccdc_buftype ccdc_get_buftype(void) 697static enum ccdc_buftype ccdc_get_buftype(void)
693{ 698{
694 if (ccdc_if_type == VPFE_RAW_BAYER) 699 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
695 return ccdc_hw_params_raw.buf_type; 700 return ccdc_cfg.bayer.buf_type;
696 return ccdc_hw_params_ycbcr.buf_type; 701 return ccdc_cfg.ycbcr.buf_type;
697} 702}
698 703
699static int ccdc_enum_pix(u32 *pix, int i) 704static int ccdc_enum_pix(u32 *pix, int i)
700{ 705{
701 int ret = -EINVAL; 706 int ret = -EINVAL;
702 if (ccdc_if_type == VPFE_RAW_BAYER) { 707 if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
703 if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) { 708 if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) {
704 *pix = ccdc_raw_bayer_pix_formats[i]; 709 *pix = ccdc_raw_bayer_pix_formats[i];
705 ret = 0; 710 ret = 0;
@@ -715,17 +720,17 @@ static int ccdc_enum_pix(u32 *pix, int i)
715 720
716static int ccdc_set_pixel_format(u32 pixfmt) 721static int ccdc_set_pixel_format(u32 pixfmt)
717{ 722{
718 if (ccdc_if_type == VPFE_RAW_BAYER) { 723 if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
719 ccdc_hw_params_raw.pix_fmt = CCDC_PIXFMT_RAW; 724 ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
720 if (pixfmt == V4L2_PIX_FMT_SBGGR8) 725 if (pixfmt == V4L2_PIX_FMT_SBGGR8)
721 ccdc_hw_params_raw.config_params.alaw.enable = 1; 726 ccdc_cfg.bayer.config_params.alaw.enable = 1;
722 else if (pixfmt != V4L2_PIX_FMT_SBGGR16) 727 else if (pixfmt != V4L2_PIX_FMT_SBGGR16)
723 return -EINVAL; 728 return -EINVAL;
724 } else { 729 } else {
725 if (pixfmt == V4L2_PIX_FMT_YUYV) 730 if (pixfmt == V4L2_PIX_FMT_YUYV)
726 ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_YCBYCR; 731 ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
727 else if (pixfmt == V4L2_PIX_FMT_UYVY) 732 else if (pixfmt == V4L2_PIX_FMT_UYVY)
728 ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_CBYCRY; 733 ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
729 else 734 else
730 return -EINVAL; 735 return -EINVAL;
731 } 736 }
@@ -734,17 +739,16 @@ static int ccdc_set_pixel_format(u32 pixfmt)
734 739
735static u32 ccdc_get_pixel_format(void) 740static u32 ccdc_get_pixel_format(void)
736{ 741{
737 struct ccdc_a_law *alaw = 742 struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
738 &ccdc_hw_params_raw.config_params.alaw;
739 u32 pixfmt; 743 u32 pixfmt;
740 744
741 if (ccdc_if_type == VPFE_RAW_BAYER) 745 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
742 if (alaw->enable) 746 if (alaw->enable)
743 pixfmt = V4L2_PIX_FMT_SBGGR8; 747 pixfmt = V4L2_PIX_FMT_SBGGR8;
744 else 748 else
745 pixfmt = V4L2_PIX_FMT_SBGGR16; 749 pixfmt = V4L2_PIX_FMT_SBGGR16;
746 else { 750 else {
747 if (ccdc_hw_params_ycbcr.pix_order == CCDC_PIXORDER_YCBYCR) 751 if (ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
748 pixfmt = V4L2_PIX_FMT_YUYV; 752 pixfmt = V4L2_PIX_FMT_YUYV;
749 else 753 else
750 pixfmt = V4L2_PIX_FMT_UYVY; 754 pixfmt = V4L2_PIX_FMT_UYVY;
@@ -754,53 +758,53 @@ static u32 ccdc_get_pixel_format(void)
754 758
755static int ccdc_set_image_window(struct v4l2_rect *win) 759static int ccdc_set_image_window(struct v4l2_rect *win)
756{ 760{
757 if (ccdc_if_type == VPFE_RAW_BAYER) 761 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
758 ccdc_hw_params_raw.win = *win; 762 ccdc_cfg.bayer.win = *win;
759 else 763 else
760 ccdc_hw_params_ycbcr.win = *win; 764 ccdc_cfg.ycbcr.win = *win;
761 return 0; 765 return 0;
762} 766}
763 767
764static void ccdc_get_image_window(struct v4l2_rect *win) 768static void ccdc_get_image_window(struct v4l2_rect *win)
765{ 769{
766 if (ccdc_if_type == VPFE_RAW_BAYER) 770 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
767 *win = ccdc_hw_params_raw.win; 771 *win = ccdc_cfg.bayer.win;
768 else 772 else
769 *win = ccdc_hw_params_ycbcr.win; 773 *win = ccdc_cfg.ycbcr.win;
770} 774}
771 775
772static unsigned int ccdc_get_line_length(void) 776static unsigned int ccdc_get_line_length(void)
773{ 777{
774 struct ccdc_config_params_raw *config_params = 778 struct ccdc_config_params_raw *config_params =
775 &ccdc_hw_params_raw.config_params; 779 &ccdc_cfg.bayer.config_params;
776 unsigned int len; 780 unsigned int len;
777 781
778 if (ccdc_if_type == VPFE_RAW_BAYER) { 782 if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
779 if ((config_params->alaw.enable) || 783 if ((config_params->alaw.enable) ||
780 (config_params->data_sz == CCDC_DATA_8BITS)) 784 (config_params->data_sz == CCDC_DATA_8BITS))
781 len = ccdc_hw_params_raw.win.width; 785 len = ccdc_cfg.bayer.win.width;
782 else 786 else
783 len = ccdc_hw_params_raw.win.width * 2; 787 len = ccdc_cfg.bayer.win.width * 2;
784 } else 788 } else
785 len = ccdc_hw_params_ycbcr.win.width * 2; 789 len = ccdc_cfg.ycbcr.win.width * 2;
786 return ALIGN(len, 32); 790 return ALIGN(len, 32);
787} 791}
788 792
789static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt) 793static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt)
790{ 794{
791 if (ccdc_if_type == VPFE_RAW_BAYER) 795 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
792 ccdc_hw_params_raw.frm_fmt = frm_fmt; 796 ccdc_cfg.bayer.frm_fmt = frm_fmt;
793 else 797 else
794 ccdc_hw_params_ycbcr.frm_fmt = frm_fmt; 798 ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
795 return 0; 799 return 0;
796} 800}
797 801
798static enum ccdc_frmfmt ccdc_get_frame_format(void) 802static enum ccdc_frmfmt ccdc_get_frame_format(void)
799{ 803{
800 if (ccdc_if_type == VPFE_RAW_BAYER) 804 if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
801 return ccdc_hw_params_raw.frm_fmt; 805 return ccdc_cfg.bayer.frm_fmt;
802 else 806 else
803 return ccdc_hw_params_ycbcr.frm_fmt; 807 return ccdc_cfg.ycbcr.frm_fmt;
804} 808}
805 809
806static int ccdc_getfid(void) 810static int ccdc_getfid(void)
@@ -816,14 +820,14 @@ static inline void ccdc_setfbaddr(unsigned long addr)
816 820
817static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params) 821static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
818{ 822{
819 ccdc_if_type = params->if_type; 823 ccdc_cfg.if_type = params->if_type;
820 824
821 switch (params->if_type) { 825 switch (params->if_type) {
822 case VPFE_BT656: 826 case VPFE_BT656:
823 case VPFE_YCBCR_SYNC_16: 827 case VPFE_YCBCR_SYNC_16:
824 case VPFE_YCBCR_SYNC_8: 828 case VPFE_YCBCR_SYNC_8:
825 ccdc_hw_params_ycbcr.vd_pol = params->vdpol; 829 ccdc_cfg.ycbcr.vd_pol = params->vdpol;
826 ccdc_hw_params_ycbcr.hd_pol = params->hdpol; 830 ccdc_cfg.ycbcr.hd_pol = params->hdpol;
827 break; 831 break;
828 default: 832 default:
829 /* TODO add support for raw bayer here */ 833 /* TODO add support for raw bayer here */
@@ -838,7 +842,6 @@ static struct ccdc_hw_device ccdc_hw_dev = {
838 .hw_ops = { 842 .hw_ops = {
839 .open = ccdc_open, 843 .open = ccdc_open,
840 .close = ccdc_close, 844 .close = ccdc_close,
841 .set_ccdc_base = ccdc_set_ccdc_base,
842 .reset = ccdc_sbl_reset, 845 .reset = ccdc_sbl_reset,
843 .enable = ccdc_enable, 846 .enable = ccdc_enable,
844 .set_hw_if_params = ccdc_set_hw_if_params, 847 .set_hw_if_params = ccdc_set_hw_if_params,
@@ -859,19 +862,105 @@ static struct ccdc_hw_device ccdc_hw_dev = {
859 }, 862 },
860}; 863};
861 864
862static int __init dm644x_ccdc_init(void) 865static int __init dm644x_ccdc_probe(struct platform_device *pdev)
863{ 866{
864 printk(KERN_NOTICE "dm644x_ccdc_init\n"); 867 struct resource *res;
865 if (vpfe_register_ccdc_device(&ccdc_hw_dev) < 0) 868 int status = 0;
866 return -1; 869
867 printk(KERN_NOTICE "%s is registered with vpfe.\n", 870 /*
868 ccdc_hw_dev.name); 871 * first try to register with vpfe. If not correct platform, then we
872 * don't have to iomap
873 */
874 status = vpfe_register_ccdc_device(&ccdc_hw_dev);
875 if (status < 0)
876 return status;
877
878 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
879 if (!res) {
880 status = -ENODEV;
881 goto fail_nores;
882 }
883
884 res = request_mem_region(res->start, resource_size(res), res->name);
885 if (!res) {
886 status = -EBUSY;
887 goto fail_nores;
888 }
889
890 ccdc_cfg.base_addr = ioremap_nocache(res->start, resource_size(res));
891 if (!ccdc_cfg.base_addr) {
892 status = -ENOMEM;
893 goto fail_nomem;
894 }
895
896 /* Get and enable Master clock */
897 ccdc_cfg.mclk = clk_get(&pdev->dev, "master");
898 if (IS_ERR(ccdc_cfg.mclk)) {
899 status = PTR_ERR(ccdc_cfg.mclk);
900 goto fail_nomap;
901 }
902 if (clk_enable(ccdc_cfg.mclk)) {
903 status = -ENODEV;
904 goto fail_mclk;
905 }
906
907 /* Get and enable Slave clock */
908 ccdc_cfg.sclk = clk_get(&pdev->dev, "slave");
909 if (IS_ERR(ccdc_cfg.sclk)) {
910 status = PTR_ERR(ccdc_cfg.sclk);
911 goto fail_mclk;
912 }
913 if (clk_enable(ccdc_cfg.sclk)) {
914 status = -ENODEV;
915 goto fail_sclk;
916 }
917 ccdc_cfg.dev = &pdev->dev;
918 printk(KERN_NOTICE "%s is registered with vpfe.\n", ccdc_hw_dev.name);
869 return 0; 919 return 0;
920fail_sclk:
921 clk_put(ccdc_cfg.sclk);
922fail_mclk:
923 clk_put(ccdc_cfg.mclk);
924fail_nomap:
925 iounmap(ccdc_cfg.base_addr);
926fail_nomem:
927 release_mem_region(res->start, resource_size(res));
928fail_nores:
929 vpfe_unregister_ccdc_device(&ccdc_hw_dev);
930 return status;
870} 931}
871 932
872static void __exit dm644x_ccdc_exit(void) 933static int dm644x_ccdc_remove(struct platform_device *pdev)
873{ 934{
935 struct resource *res;
936
937 clk_put(ccdc_cfg.mclk);
938 clk_put(ccdc_cfg.sclk);
939 iounmap(ccdc_cfg.base_addr);
940 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
941 if (res)
942 release_mem_region(res->start, resource_size(res));
874 vpfe_unregister_ccdc_device(&ccdc_hw_dev); 943 vpfe_unregister_ccdc_device(&ccdc_hw_dev);
944 return 0;
945}
946
947static struct platform_driver dm644x_ccdc_driver = {
948 .driver = {
949 .name = "dm644x_ccdc",
950 .owner = THIS_MODULE,
951 },
952 .remove = __devexit_p(dm644x_ccdc_remove),
953 .probe = dm644x_ccdc_probe,
954};
955
956static int __init dm644x_ccdc_init(void)
957{
958 return platform_driver_register(&dm644x_ccdc_driver);
959}
960
961static void __exit dm644x_ccdc_exit(void)
962{
963 platform_driver_unregister(&dm644x_ccdc_driver);
875} 964}
876 965
877module_init(dm644x_ccdc_init); 966module_init(dm644x_ccdc_init);
diff --git a/drivers/media/video/davinci/isif.c b/drivers/media/video/davinci/isif.c
new file mode 100644
index 000000000000..29c29c668596
--- /dev/null
+++ b/drivers/media/video/davinci/isif.c
@@ -0,0 +1,1172 @@
1/*
2 * Copyright (C) 2008-2009 Texas Instruments Inc
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 * Image Sensor Interface (ISIF) driver
19 *
20 * This driver is for configuring the ISIF IP available on DM365 or any other
21 * TI SoCs. This is used for capturing yuv or bayer video or image data
22 * from a decoder or sensor. This IP is similar to the CCDC IP on DM355
23 * and DM6446, but with enhanced or additional ip blocks. The driver
24 * configures the ISIF upon commands from the vpfe bridge driver through
25 * ccdc_hw_device interface.
26 *
27 * TODO: 1) Raw bayer parameter settings and bayer capture
28 * 2) Add support for control ioctl
29 */
30#include <linux/delay.h>
31#include <linux/platform_device.h>
32#include <linux/uaccess.h>
33#include <linux/io.h>
34#include <linux/videodev2.h>
35#include <linux/clk.h>
36#include <linux/err.h>
37
38#include <mach/mux.h>
39
40#include <media/davinci/isif.h>
41#include <media/davinci/vpss.h>
42
43#include "isif_regs.h"
44#include "ccdc_hw_device.h"
45
46/* Defaults for module configuration parameters */
47static struct isif_config_params_raw isif_config_defaults = {
48 .linearize = {
49 .en = 0,
50 .corr_shft = ISIF_NO_SHIFT,
51 .scale_fact = {1, 0},
52 },
53 .df_csc = {
54 .df_or_csc = 0,
55 .csc = {
56 .en = 0,
57 },
58 },
59 .dfc = {
60 .en = 0,
61 },
62 .bclamp = {
63 .en = 0,
64 },
65 .gain_offset = {
66 .gain = {
67 .r_ye = {1, 0},
68 .gr_cy = {1, 0},
69 .gb_g = {1, 0},
70 .b_mg = {1, 0},
71 },
72 },
73 .culling = {
74 .hcpat_odd = 0xff,
75 .hcpat_even = 0xff,
76 .vcpat = 0xff,
77 },
78 .compress = {
79 .alg = ISIF_ALAW,
80 },
81};
82
83/* ISIF operation configuration */
84static struct isif_oper_config {
85 struct device *dev;
86 enum vpfe_hw_if_type if_type;
87 struct isif_ycbcr_config ycbcr;
88 struct isif_params_raw bayer;
89 enum isif_data_pack data_pack;
90 /* Master clock */
91 struct clk *mclk;
92 /* ISIF base address */
93 void __iomem *base_addr;
94 /* ISIF Linear Table 0 */
95 void __iomem *linear_tbl0_addr;
96 /* ISIF Linear Table 1 */
97 void __iomem *linear_tbl1_addr;
98} isif_cfg = {
99 .ycbcr = {
100 .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
101 .frm_fmt = CCDC_FRMFMT_INTERLACED,
102 .win = ISIF_WIN_NTSC,
103 .fid_pol = VPFE_PINPOL_POSITIVE,
104 .vd_pol = VPFE_PINPOL_POSITIVE,
105 .hd_pol = VPFE_PINPOL_POSITIVE,
106 .pix_order = CCDC_PIXORDER_CBYCRY,
107 .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED,
108 },
109 .bayer = {
110 .pix_fmt = CCDC_PIXFMT_RAW,
111 .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
112 .win = ISIF_WIN_VGA,
113 .fid_pol = VPFE_PINPOL_POSITIVE,
114 .vd_pol = VPFE_PINPOL_POSITIVE,
115 .hd_pol = VPFE_PINPOL_POSITIVE,
116 .gain = {
117 .r_ye = {1, 0},
118 .gr_cy = {1, 0},
119 .gb_g = {1, 0},
120 .b_mg = {1, 0},
121 },
122 .cfa_pat = ISIF_CFA_PAT_MOSAIC,
123 .data_msb = ISIF_BIT_MSB_11,
124 .config_params = {
125 .data_shift = ISIF_NO_SHIFT,
126 .col_pat_field0 = {
127 .olop = ISIF_GREEN_BLUE,
128 .olep = ISIF_BLUE,
129 .elop = ISIF_RED,
130 .elep = ISIF_GREEN_RED,
131 },
132 .col_pat_field1 = {
133 .olop = ISIF_GREEN_BLUE,
134 .olep = ISIF_BLUE,
135 .elop = ISIF_RED,
136 .elep = ISIF_GREEN_RED,
137 },
138 .test_pat_gen = 0,
139 },
140 },
141 .data_pack = ISIF_DATA_PACK8,
142};
143
144/* Raw Bayer formats */
145static const u32 isif_raw_bayer_pix_formats[] = {
146 V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16};
147
148/* Raw YUV formats */
149static const u32 isif_raw_yuv_pix_formats[] = {
150 V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV};
151
152/* register access routines */
153static inline u32 regr(u32 offset)
154{
155 return __raw_readl(isif_cfg.base_addr + offset);
156}
157
158static inline void regw(u32 val, u32 offset)
159{
160 __raw_writel(val, isif_cfg.base_addr + offset);
161}
162
163/* reg_modify() - read, modify and write register */
164static inline u32 reg_modify(u32 mask, u32 val, u32 offset)
165{
166 u32 new_val = (regr(offset) & ~mask) | (val & mask);
167
168 regw(new_val, offset);
169 return new_val;
170}
171
172static inline void regw_lin_tbl(u32 val, u32 offset, int i)
173{
174 if (!i)
175 __raw_writel(val, isif_cfg.linear_tbl0_addr + offset);
176 else
177 __raw_writel(val, isif_cfg.linear_tbl1_addr + offset);
178}
179
180static void isif_disable_all_modules(void)
181{
182 /* disable BC */
183 regw(0, CLAMPCFG);
184 /* disable vdfc */
185 regw(0, DFCCTL);
186 /* disable CSC */
187 regw(0, CSCCTL);
188 /* disable linearization */
189 regw(0, LINCFG0);
190 /* disable other modules here as they are supported */
191}
192
193static void isif_enable(int en)
194{
195 if (!en) {
196 /* Before disable isif, disable all ISIF modules */
197 isif_disable_all_modules();
198 /*
199 * wait for next VD. Assume lowest scan rate is 12 Hz. So
200 * 100 msec delay is good enough
201 */
202 msleep(100);
203 }
204 reg_modify(ISIF_SYNCEN_VDHDEN_MASK, en, SYNCEN);
205}
206
207static void isif_enable_output_to_sdram(int en)
208{
209 reg_modify(ISIF_SYNCEN_WEN_MASK, en << ISIF_SYNCEN_WEN_SHIFT, SYNCEN);
210}
211
212static void isif_config_culling(struct isif_cul *cul)
213{
214 u32 val;
215
216 /* Horizontal pattern */
217 val = (cul->hcpat_even << CULL_PAT_EVEN_LINE_SHIFT) | cul->hcpat_odd;
218 regw(val, CULH);
219
220 /* vertical pattern */
221 regw(cul->vcpat, CULV);
222
223 /* LPF */
224 reg_modify(ISIF_LPF_MASK << ISIF_LPF_SHIFT,
225 cul->en_lpf << ISIF_LPF_SHIFT, MODESET);
226}
227
228static void isif_config_gain_offset(void)
229{
230 struct isif_gain_offsets_adj *gain_off_p =
231 &isif_cfg.bayer.config_params.gain_offset;
232 u32 val;
233
234 val = (!!gain_off_p->gain_sdram_en << GAIN_SDRAM_EN_SHIFT) |
235 (!!gain_off_p->gain_ipipe_en << GAIN_IPIPE_EN_SHIFT) |
236 (!!gain_off_p->gain_h3a_en << GAIN_H3A_EN_SHIFT) |
237 (!!gain_off_p->offset_sdram_en << OFST_SDRAM_EN_SHIFT) |
238 (!!gain_off_p->offset_ipipe_en << OFST_IPIPE_EN_SHIFT) |
239 (!!gain_off_p->offset_h3a_en << OFST_H3A_EN_SHIFT);
240
241 reg_modify(GAIN_OFFSET_EN_MASK, val, CGAMMAWD);
242
243 val = (gain_off_p->gain.r_ye.integer << GAIN_INTEGER_SHIFT) |
244 gain_off_p->gain.r_ye.decimal;
245 regw(val, CRGAIN);
246
247 val = (gain_off_p->gain.gr_cy.integer << GAIN_INTEGER_SHIFT) |
248 gain_off_p->gain.gr_cy.decimal;
249 regw(val, CGRGAIN);
250
251 val = (gain_off_p->gain.gb_g.integer << GAIN_INTEGER_SHIFT) |
252 gain_off_p->gain.gb_g.decimal;
253 regw(val, CGBGAIN);
254
255 val = (gain_off_p->gain.b_mg.integer << GAIN_INTEGER_SHIFT) |
256 gain_off_p->gain.b_mg.decimal;
257 regw(val, CBGAIN);
258
259 regw(gain_off_p->offset, COFSTA);
260}
261
262static void isif_restore_defaults(void)
263{
264 enum vpss_ccdc_source_sel source = VPSS_CCDCIN;
265
266 dev_dbg(isif_cfg.dev, "\nstarting isif_restore_defaults...");
267 isif_cfg.bayer.config_params = isif_config_defaults;
268 /* Enable clock to ISIF, IPIPEIF and BL */
269 vpss_enable_clock(VPSS_CCDC_CLOCK, 1);
270 vpss_enable_clock(VPSS_IPIPEIF_CLOCK, 1);
271 vpss_enable_clock(VPSS_BL_CLOCK, 1);
272 /* Set default offset and gain */
273 isif_config_gain_offset();
274 vpss_select_ccdc_source(source);
275 dev_dbg(isif_cfg.dev, "\nEnd of isif_restore_defaults...");
276}
277
278static int isif_open(struct device *device)
279{
280 isif_restore_defaults();
281 return 0;
282}
283
284/* This function will configure the window size to be capture in ISIF reg */
285static void isif_setwin(struct v4l2_rect *image_win,
286 enum ccdc_frmfmt frm_fmt, int ppc)
287{
288 int horz_start, horz_nr_pixels;
289 int vert_start, vert_nr_lines;
290 int mid_img = 0;
291
292 dev_dbg(isif_cfg.dev, "\nStarting isif_setwin...");
293 /*
294 * ppc - per pixel count. indicates how many pixels per cell
295 * output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
296 * raw capture this is 1
297 */
298 horz_start = image_win->left << (ppc - 1);
299 horz_nr_pixels = ((image_win->width) << (ppc - 1)) - 1;
300
301 /* Writing the horizontal info into the registers */
302 regw(horz_start & START_PX_HOR_MASK, SPH);
303 regw(horz_nr_pixels & NUM_PX_HOR_MASK, LNH);
304 vert_start = image_win->top;
305
306 if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
307 vert_nr_lines = (image_win->height >> 1) - 1;
308 vert_start >>= 1;
309 /* To account for VD since line 0 doesn't have any data */
310 vert_start += 1;
311 } else {
312 /* To account for VD since line 0 doesn't have any data */
313 vert_start += 1;
314 vert_nr_lines = image_win->height - 1;
315 /* configure VDINT0 and VDINT1 */
316 mid_img = vert_start + (image_win->height / 2);
317 regw(mid_img, VDINT1);
318 }
319
320 regw(0, VDINT0);
321 regw(vert_start & START_VER_ONE_MASK, SLV0);
322 regw(vert_start & START_VER_TWO_MASK, SLV1);
323 regw(vert_nr_lines & NUM_LINES_VER, LNV);
324}
325
326static void isif_config_bclamp(struct isif_black_clamp *bc)
327{
328 u32 val;
329
330 /*
331 * DC Offset is always added to image data irrespective of bc enable
332 * status
333 */
334 regw(bc->dc_offset, CLDCOFST);
335
336 if (bc->en) {
337 val = bc->bc_mode_color << ISIF_BC_MODE_COLOR_SHIFT;
338
339 /* Enable BC and horizontal clamp caculation paramaters */
340 val = val | 1 | (bc->horz.mode << ISIF_HORZ_BC_MODE_SHIFT);
341
342 regw(val, CLAMPCFG);
343
344 if (bc->horz.mode != ISIF_HORZ_BC_DISABLE) {
345 /*
346 * Window count for calculation
347 * Base window selection
348 * pixel limit
349 * Horizontal size of window
350 * vertical size of the window
351 * Horizontal start position of the window
352 * Vertical start position of the window
353 */
354 val = bc->horz.win_count_calc |
355 ((!!bc->horz.base_win_sel_calc) <<
356 ISIF_HORZ_BC_WIN_SEL_SHIFT) |
357 ((!!bc->horz.clamp_pix_limit) <<
358 ISIF_HORZ_BC_PIX_LIMIT_SHIFT) |
359 (bc->horz.win_h_sz_calc <<
360 ISIF_HORZ_BC_WIN_H_SIZE_SHIFT) |
361 (bc->horz.win_v_sz_calc <<
362 ISIF_HORZ_BC_WIN_V_SIZE_SHIFT);
363 regw(val, CLHWIN0);
364
365 regw(bc->horz.win_start_h_calc, CLHWIN1);
366 regw(bc->horz.win_start_v_calc, CLHWIN2);
367 }
368
369 /* vertical clamp caculation paramaters */
370
371 /* Reset clamp value sel for previous line */
372 val |=
373 (bc->vert.reset_val_sel << ISIF_VERT_BC_RST_VAL_SEL_SHIFT) |
374 (bc->vert.line_ave_coef << ISIF_VERT_BC_LINE_AVE_COEF_SHIFT);
375 regw(val, CLVWIN0);
376
377 /* Optical Black horizontal start position */
378 regw(bc->vert.ob_start_h, CLVWIN1);
379 /* Optical Black vertical start position */
380 regw(bc->vert.ob_start_v, CLVWIN2);
381 /* Optical Black vertical size for calculation */
382 regw(bc->vert.ob_v_sz_calc, CLVWIN3);
383 /* Vertical start position for BC subtraction */
384 regw(bc->vert_start_sub, CLSV);
385 }
386}
387
388static void isif_config_linearization(struct isif_linearize *linearize)
389{
390 u32 val, i;
391
392 if (!linearize->en) {
393 regw(0, LINCFG0);
394 return;
395 }
396
397 /* shift value for correction & enable linearization (set lsb) */
398 val = (linearize->corr_shft << ISIF_LIN_CORRSFT_SHIFT) | 1;
399 regw(val, LINCFG0);
400
401 /* Scale factor */
402 val = ((!!linearize->scale_fact.integer) <<
403 ISIF_LIN_SCALE_FACT_INTEG_SHIFT) |
404 linearize->scale_fact.decimal;
405 regw(val, LINCFG1);
406
407 for (i = 0; i < ISIF_LINEAR_TAB_SIZE; i++) {
408 if (i % 2)
409 regw_lin_tbl(linearize->table[i], ((i >> 1) << 2), 1);
410 else
411 regw_lin_tbl(linearize->table[i], ((i >> 1) << 2), 0);
412 }
413}
414
415static int isif_config_dfc(struct isif_dfc *vdfc)
416{
417 /* initialize retries to loop for max ~ 250 usec */
418 u32 val, count, retries = loops_per_jiffy / (4000/HZ);
419 int i;
420
421 if (!vdfc->en)
422 return 0;
423
424 /* Correction mode */
425 val = (vdfc->corr_mode << ISIF_VDFC_CORR_MOD_SHIFT);
426
427 /* Correct whole line or partial */
428 if (vdfc->corr_whole_line)
429 val |= 1 << ISIF_VDFC_CORR_WHOLE_LN_SHIFT;
430
431 /* level shift value */
432 val |= vdfc->def_level_shift << ISIF_VDFC_LEVEL_SHFT_SHIFT;
433
434 regw(val, DFCCTL);
435
436 /* Defect saturation level */
437 regw(vdfc->def_sat_level, VDFSATLV);
438
439 regw(vdfc->table[0].pos_vert, DFCMEM0);
440 regw(vdfc->table[0].pos_horz, DFCMEM1);
441 if (vdfc->corr_mode == ISIF_VDFC_NORMAL ||
442 vdfc->corr_mode == ISIF_VDFC_HORZ_INTERPOL_IF_SAT) {
443 regw(vdfc->table[0].level_at_pos, DFCMEM2);
444 regw(vdfc->table[0].level_up_pixels, DFCMEM3);
445 regw(vdfc->table[0].level_low_pixels, DFCMEM4);
446 }
447
448 /* set DFCMARST and set DFCMWR */
449 val = regr(DFCMEMCTL) | (1 << ISIF_DFCMEMCTL_DFCMARST_SHIFT) | 1;
450 regw(val, DFCMEMCTL);
451
452 count = retries;
453 while (count && (regr(DFCMEMCTL) & 0x1))
454 count--;
455
456 if (!count) {
457 dev_dbg(isif_cfg.dev, "defect table write timeout !!!\n");
458 return -1;
459 }
460
461 for (i = 1; i < vdfc->num_vdefects; i++) {
462 regw(vdfc->table[i].pos_vert, DFCMEM0);
463 regw(vdfc->table[i].pos_horz, DFCMEM1);
464 if (vdfc->corr_mode == ISIF_VDFC_NORMAL ||
465 vdfc->corr_mode == ISIF_VDFC_HORZ_INTERPOL_IF_SAT) {
466 regw(vdfc->table[i].level_at_pos, DFCMEM2);
467 regw(vdfc->table[i].level_up_pixels, DFCMEM3);
468 regw(vdfc->table[i].level_low_pixels, DFCMEM4);
469 }
470 val = regr(DFCMEMCTL);
471 /* clear DFCMARST and set DFCMWR */
472 val &= ~BIT(ISIF_DFCMEMCTL_DFCMARST_SHIFT);
473 val |= 1;
474 regw(val, DFCMEMCTL);
475
476 count = retries;
477 while (count && (regr(DFCMEMCTL) & 0x1))
478 count--;
479
480 if (!count) {
481 dev_err(isif_cfg.dev,
482 "defect table write timeout !!!\n");
483 return -1;
484 }
485 }
486 if (vdfc->num_vdefects < ISIF_VDFC_TABLE_SIZE) {
487 /* Extra cycle needed */
488 regw(0, DFCMEM0);
489 regw(0x1FFF, DFCMEM1);
490 regw(1, DFCMEMCTL);
491 }
492
493 /* enable VDFC */
494 reg_modify((1 << ISIF_VDFC_EN_SHIFT), (1 << ISIF_VDFC_EN_SHIFT),
495 DFCCTL);
496 return 0;
497}
498
499static void isif_config_csc(struct isif_df_csc *df_csc)
500{
501 u32 val1 = 0, val2 = 0, i;
502
503 if (!df_csc->csc.en) {
504 regw(0, CSCCTL);
505 return;
506 }
507 for (i = 0; i < ISIF_CSC_NUM_COEFF; i++) {
508 if ((i % 2) == 0) {
509 /* CSCM - LSB */
510 val1 = (df_csc->csc.coeff[i].integer <<
511 ISIF_CSC_COEF_INTEG_SHIFT) |
512 df_csc->csc.coeff[i].decimal;
513 } else {
514
515 /* CSCM - MSB */
516 val2 = (df_csc->csc.coeff[i].integer <<
517 ISIF_CSC_COEF_INTEG_SHIFT) |
518 df_csc->csc.coeff[i].decimal;
519 val2 <<= ISIF_CSCM_MSB_SHIFT;
520 val2 |= val1;
521 regw(val2, (CSCM0 + ((i - 1) << 1)));
522 }
523 }
524
525 /* program the active area */
526 regw(df_csc->start_pix, FMTSPH);
527 /*
528 * one extra pixel as required for CSC. Actually number of
529 * pixel - 1 should be configured in this register. So we
530 * need to subtract 1 before writing to FMTSPH, but we will
531 * not do this since csc requires one extra pixel
532 */
533 regw(df_csc->num_pixels, FMTLNH);
534 regw(df_csc->start_line, FMTSLV);
535 /*
536 * one extra line as required for CSC. See reason documented for
537 * num_pixels
538 */
539 regw(df_csc->num_lines, FMTLNV);
540
541 /* Enable CSC */
542 regw(1, CSCCTL);
543}
544
545static int isif_config_raw(void)
546{
547 struct isif_params_raw *params = &isif_cfg.bayer;
548 struct isif_config_params_raw *module_params =
549 &isif_cfg.bayer.config_params;
550 struct vpss_pg_frame_size frame_size;
551 struct vpss_sync_pol sync;
552 u32 val;
553
554 dev_dbg(isif_cfg.dev, "\nStarting isif_config_raw..\n");
555
556 /*
557 * Configure CCDCFG register:-
558 * Set CCD Not to swap input since input is RAW data
559 * Set FID detection function to Latch at V-Sync
560 * Set WENLOG - isif valid area
561 * Set TRGSEL
562 * Set EXTRG
563 * Packed to 8 or 16 bits
564 */
565
566 val = ISIF_YCINSWP_RAW | ISIF_CCDCFG_FIDMD_LATCH_VSYNC |
567 ISIF_CCDCFG_WENLOG_AND | ISIF_CCDCFG_TRGSEL_WEN |
568 ISIF_CCDCFG_EXTRG_DISABLE | isif_cfg.data_pack;
569
570 dev_dbg(isif_cfg.dev, "Writing 0x%x to ...CCDCFG \n", val);
571 regw(val, CCDCFG);
572
573 /*
574 * Configure the vertical sync polarity(MODESET.VDPOL)
575 * Configure the horizontal sync polarity (MODESET.HDPOL)
576 * Configure frame id polarity (MODESET.FLDPOL)
577 * Configure data polarity
578 * Configure External WEN Selection
579 * Configure frame format(progressive or interlace)
580 * Configure pixel format (Input mode)
581 * Configure the data shift
582 */
583
584 val = ISIF_VDHDOUT_INPUT | (params->vd_pol << ISIF_VD_POL_SHIFT) |
585 (params->hd_pol << ISIF_HD_POL_SHIFT) |
586 (params->fid_pol << ISIF_FID_POL_SHIFT) |
587 (ISIF_DATAPOL_NORMAL << ISIF_DATAPOL_SHIFT) |
588 (ISIF_EXWEN_DISABLE << ISIF_EXWEN_SHIFT) |
589 (params->frm_fmt << ISIF_FRM_FMT_SHIFT) |
590 (params->pix_fmt << ISIF_INPUT_SHIFT) |
591 (params->config_params.data_shift << ISIF_DATASFT_SHIFT);
592
593 regw(val, MODESET);
594 dev_dbg(isif_cfg.dev, "Writing 0x%x to MODESET...\n", val);
595
596 /*
597 * Configure GAMMAWD register
598 * CFA pattern setting
599 */
600 val = params->cfa_pat << ISIF_GAMMAWD_CFA_SHIFT;
601
602 /* Gamma msb */
603 if (module_params->compress.alg == ISIF_ALAW)
604 val |= ISIF_ALAW_ENABLE;
605
606 val |= (params->data_msb << ISIF_ALAW_GAMA_WD_SHIFT);
607 regw(val, CGAMMAWD);
608
609 /* Configure DPCM compression settings */
610 if (module_params->compress.alg == ISIF_DPCM) {
611 val = BIT(ISIF_DPCM_EN_SHIFT) |
612 (module_params->compress.pred <<
613 ISIF_DPCM_PREDICTOR_SHIFT);
614 }
615
616 regw(val, MISC);
617
618 /* Configure Gain & Offset */
619 isif_config_gain_offset();
620
621 /* Configure Color pattern */
622 val = (params->config_params.col_pat_field0.olop) |
623 (params->config_params.col_pat_field0.olep << 2) |
624 (params->config_params.col_pat_field0.elop << 4) |
625 (params->config_params.col_pat_field0.elep << 6) |
626 (params->config_params.col_pat_field1.olop << 8) |
627 (params->config_params.col_pat_field1.olep << 10) |
628 (params->config_params.col_pat_field1.elop << 12) |
629 (params->config_params.col_pat_field1.elep << 14);
630 regw(val, CCOLP);
631 dev_dbg(isif_cfg.dev, "Writing %x to CCOLP ...\n", val);
632
633 /* Configure HSIZE register */
634 val = (!!params->horz_flip_en) << ISIF_HSIZE_FLIP_SHIFT;
635
636 /* calculate line offset in 32 bytes based on pack value */
637 if (isif_cfg.data_pack == ISIF_PACK_8BIT)
638 val |= ((params->win.width + 31) >> 5);
639 else if (isif_cfg.data_pack == ISIF_PACK_12BIT)
640 val |= (((params->win.width +
641 (params->win.width >> 2)) + 31) >> 5);
642 else
643 val |= (((params->win.width * 2) + 31) >> 5);
644 regw(val, HSIZE);
645
646 /* Configure SDOFST register */
647 if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) {
648 if (params->image_invert_en) {
649 /* For interlace inverse mode */
650 regw(0x4B6D, SDOFST);
651 dev_dbg(isif_cfg.dev, "Writing 0x4B6D to SDOFST...\n");
652 } else {
653 /* For interlace non inverse mode */
654 regw(0x0B6D, SDOFST);
655 dev_dbg(isif_cfg.dev, "Writing 0x0B6D to SDOFST...\n");
656 }
657 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
658 if (params->image_invert_en) {
659 /* For progressive inverse mode */
660 regw(0x4000, SDOFST);
661 dev_dbg(isif_cfg.dev, "Writing 0x4000 to SDOFST...\n");
662 } else {
663 /* For progressive non inverse mode */
664 regw(0x0000, SDOFST);
665 dev_dbg(isif_cfg.dev, "Writing 0x0000 to SDOFST...\n");
666 }
667 }
668
669 /* Configure video window */
670 isif_setwin(&params->win, params->frm_fmt, 1);
671
672 /* Configure Black Clamp */
673 isif_config_bclamp(&module_params->bclamp);
674
675 /* Configure Vertical Defection Pixel Correction */
676 if (isif_config_dfc(&module_params->dfc) < 0)
677 return -EFAULT;
678
679 if (!module_params->df_csc.df_or_csc)
680 /* Configure Color Space Conversion */
681 isif_config_csc(&module_params->df_csc);
682
683 isif_config_linearization(&module_params->linearize);
684
685 /* Configure Culling */
686 isif_config_culling(&module_params->culling);
687
688 /* Configure horizontal and vertical offsets(DFC,LSC,Gain) */
689 regw(module_params->horz_offset, DATAHOFST);
690 regw(module_params->vert_offset, DATAVOFST);
691
692 /* Setup test pattern if enabled */
693 if (params->config_params.test_pat_gen) {
694 /* Use the HD/VD pol settings from user */
695 sync.ccdpg_hdpol = params->hd_pol;
696 sync.ccdpg_vdpol = params->vd_pol;
697 dm365_vpss_set_sync_pol(sync);
698 frame_size.hlpfr = isif_cfg.bayer.win.width;
699 frame_size.pplen = isif_cfg.bayer.win.height;
700 dm365_vpss_set_pg_frame_size(frame_size);
701 vpss_select_ccdc_source(VPSS_PGLPBK);
702 }
703
704 dev_dbg(isif_cfg.dev, "\nEnd of isif_config_ycbcr...\n");
705 return 0;
706}
707
708static int isif_set_buftype(enum ccdc_buftype buf_type)
709{
710 if (isif_cfg.if_type == VPFE_RAW_BAYER)
711 isif_cfg.bayer.buf_type = buf_type;
712 else
713 isif_cfg.ycbcr.buf_type = buf_type;
714
715 return 0;
716
717}
718static enum ccdc_buftype isif_get_buftype(void)
719{
720 if (isif_cfg.if_type == VPFE_RAW_BAYER)
721 return isif_cfg.bayer.buf_type;
722
723 return isif_cfg.ycbcr.buf_type;
724}
725
726static int isif_enum_pix(u32 *pix, int i)
727{
728 int ret = -EINVAL;
729
730 if (isif_cfg.if_type == VPFE_RAW_BAYER) {
731 if (i < ARRAY_SIZE(isif_raw_bayer_pix_formats)) {
732 *pix = isif_raw_bayer_pix_formats[i];
733 ret = 0;
734 }
735 } else {
736 if (i < ARRAY_SIZE(isif_raw_yuv_pix_formats)) {
737 *pix = isif_raw_yuv_pix_formats[i];
738 ret = 0;
739 }
740 }
741
742 return ret;
743}
744
745static int isif_set_pixel_format(unsigned int pixfmt)
746{
747 if (isif_cfg.if_type == VPFE_RAW_BAYER) {
748 if (pixfmt == V4L2_PIX_FMT_SBGGR8) {
749 if ((isif_cfg.bayer.config_params.compress.alg !=
750 ISIF_ALAW) &&
751 (isif_cfg.bayer.config_params.compress.alg !=
752 ISIF_DPCM)) {
753 dev_dbg(isif_cfg.dev,
754 "Either configure A-Law or DPCM\n");
755 return -EINVAL;
756 }
757 isif_cfg.data_pack = ISIF_PACK_8BIT;
758 } else if (pixfmt == V4L2_PIX_FMT_SBGGR16) {
759 isif_cfg.bayer.config_params.compress.alg =
760 ISIF_NO_COMPRESSION;
761 isif_cfg.data_pack = ISIF_PACK_16BIT;
762 } else
763 return -EINVAL;
764 isif_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
765 } else {
766 if (pixfmt == V4L2_PIX_FMT_YUYV)
767 isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
768 else if (pixfmt == V4L2_PIX_FMT_UYVY)
769 isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
770 else
771 return -EINVAL;
772 isif_cfg.data_pack = ISIF_PACK_8BIT;
773 }
774 return 0;
775}
776
777static u32 isif_get_pixel_format(void)
778{
779 u32 pixfmt;
780
781 if (isif_cfg.if_type == VPFE_RAW_BAYER)
782 if (isif_cfg.bayer.config_params.compress.alg == ISIF_ALAW ||
783 isif_cfg.bayer.config_params.compress.alg == ISIF_DPCM)
784 pixfmt = V4L2_PIX_FMT_SBGGR8;
785 else
786 pixfmt = V4L2_PIX_FMT_SBGGR16;
787 else {
788 if (isif_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
789 pixfmt = V4L2_PIX_FMT_YUYV;
790 else
791 pixfmt = V4L2_PIX_FMT_UYVY;
792 }
793 return pixfmt;
794}
795
796static int isif_set_image_window(struct v4l2_rect *win)
797{
798 if (isif_cfg.if_type == VPFE_RAW_BAYER) {
799 isif_cfg.bayer.win.top = win->top;
800 isif_cfg.bayer.win.left = win->left;
801 isif_cfg.bayer.win.width = win->width;
802 isif_cfg.bayer.win.height = win->height;
803 } else {
804 isif_cfg.ycbcr.win.top = win->top;
805 isif_cfg.ycbcr.win.left = win->left;
806 isif_cfg.ycbcr.win.width = win->width;
807 isif_cfg.ycbcr.win.height = win->height;
808 }
809 return 0;
810}
811
812static void isif_get_image_window(struct v4l2_rect *win)
813{
814 if (isif_cfg.if_type == VPFE_RAW_BAYER)
815 *win = isif_cfg.bayer.win;
816 else
817 *win = isif_cfg.ycbcr.win;
818}
819
820static unsigned int isif_get_line_length(void)
821{
822 unsigned int len;
823
824 if (isif_cfg.if_type == VPFE_RAW_BAYER) {
825 if (isif_cfg.data_pack == ISIF_PACK_8BIT)
826 len = ((isif_cfg.bayer.win.width));
827 else if (isif_cfg.data_pack == ISIF_PACK_12BIT)
828 len = (((isif_cfg.bayer.win.width * 2) +
829 (isif_cfg.bayer.win.width >> 2)));
830 else
831 len = (((isif_cfg.bayer.win.width * 2)));
832 } else
833 len = (((isif_cfg.ycbcr.win.width * 2)));
834 return ALIGN(len, 32);
835}
836
837static int isif_set_frame_format(enum ccdc_frmfmt frm_fmt)
838{
839 if (isif_cfg.if_type == VPFE_RAW_BAYER)
840 isif_cfg.bayer.frm_fmt = frm_fmt;
841 else
842 isif_cfg.ycbcr.frm_fmt = frm_fmt;
843 return 0;
844}
845static enum ccdc_frmfmt isif_get_frame_format(void)
846{
847 if (isif_cfg.if_type == VPFE_RAW_BAYER)
848 return isif_cfg.bayer.frm_fmt;
849 return isif_cfg.ycbcr.frm_fmt;
850}
851
852static int isif_getfid(void)
853{
854 return (regr(MODESET) >> 15) & 0x1;
855}
856
857/* misc operations */
858static void isif_setfbaddr(unsigned long addr)
859{
860 regw((addr >> 21) & 0x07ff, CADU);
861 regw((addr >> 5) & 0x0ffff, CADL);
862}
863
864static int isif_set_hw_if_params(struct vpfe_hw_if_param *params)
865{
866 isif_cfg.if_type = params->if_type;
867
868 switch (params->if_type) {
869 case VPFE_BT656:
870 case VPFE_BT656_10BIT:
871 case VPFE_YCBCR_SYNC_8:
872 isif_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT;
873 isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
874 break;
875 case VPFE_BT1120:
876 case VPFE_YCBCR_SYNC_16:
877 isif_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_16BIT;
878 isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
879 break;
880 case VPFE_RAW_BAYER:
881 isif_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
882 break;
883 default:
884 dev_dbg(isif_cfg.dev, "Invalid interface type\n");
885 return -EINVAL;
886 }
887
888 return 0;
889}
890
891/* This function will configure ISIF for YCbCr parameters. */
892static int isif_config_ycbcr(void)
893{
894 struct isif_ycbcr_config *params = &isif_cfg.ycbcr;
895 struct vpss_pg_frame_size frame_size;
896 u32 modeset = 0, ccdcfg = 0;
897 struct vpss_sync_pol sync;
898
899 dev_dbg(isif_cfg.dev, "\nStarting isif_config_ycbcr...");
900
901 /* configure pixel format or input mode */
902 modeset = modeset | (params->pix_fmt << ISIF_INPUT_SHIFT) |
903 (params->frm_fmt << ISIF_FRM_FMT_SHIFT) |
904 (params->fid_pol << ISIF_FID_POL_SHIFT) |
905 (params->hd_pol << ISIF_HD_POL_SHIFT) |
906 (params->vd_pol << ISIF_VD_POL_SHIFT);
907
908 /* pack the data to 8-bit ISIFCFG */
909 switch (isif_cfg.if_type) {
910 case VPFE_BT656:
911 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
912 dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
913 return -EINVAL;
914 }
915 modeset |= (VPFE_PINPOL_NEGATIVE << ISIF_VD_POL_SHIFT);
916 regw(3, REC656IF);
917 ccdcfg = ccdcfg | ISIF_DATA_PACK8 | ISIF_YCINSWP_YCBCR;
918 break;
919 case VPFE_BT656_10BIT:
920 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
921 dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
922 return -EINVAL;
923 }
924 /* setup BT.656, embedded sync */
925 regw(3, REC656IF);
926 /* enable 10 bit mode in ccdcfg */
927 ccdcfg = ccdcfg | ISIF_DATA_PACK8 | ISIF_YCINSWP_YCBCR |
928 ISIF_BW656_ENABLE;
929 break;
930 case VPFE_BT1120:
931 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_16BIT) {
932 dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
933 return -EINVAL;
934 }
935 regw(3, REC656IF);
936 break;
937
938 case VPFE_YCBCR_SYNC_8:
939 ccdcfg |= ISIF_DATA_PACK8;
940 ccdcfg |= ISIF_YCINSWP_YCBCR;
941 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
942 dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
943 return -EINVAL;
944 }
945 break;
946 case VPFE_YCBCR_SYNC_16:
947 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_16BIT) {
948 dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
949 return -EINVAL;
950 }
951 break;
952 default:
953 /* should never come here */
954 dev_dbg(isif_cfg.dev, "Invalid interface type\n");
955 return -EINVAL;
956 }
957
958 regw(modeset, MODESET);
959
960 /* Set up pix order */
961 ccdcfg |= params->pix_order << ISIF_PIX_ORDER_SHIFT;
962
963 regw(ccdcfg, CCDCFG);
964
965 /* configure video window */
966 if ((isif_cfg.if_type == VPFE_BT1120) ||
967 (isif_cfg.if_type == VPFE_YCBCR_SYNC_16))
968 isif_setwin(&params->win, params->frm_fmt, 1);
969 else
970 isif_setwin(&params->win, params->frm_fmt, 2);
971
972 /*
973 * configure the horizontal line offset
974 * this is done by rounding up width to a multiple of 16 pixels
975 * and multiply by two to account for y:cb:cr 4:2:2 data
976 */
977 regw(((((params->win.width * 2) + 31) & 0xffffffe0) >> 5), HSIZE);
978
979 /* configure the memory line offset */
980 if ((params->frm_fmt == CCDC_FRMFMT_INTERLACED) &&
981 (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED))
982 /* two fields are interleaved in memory */
983 regw(0x00000249, SDOFST);
984
985 /* Setup test pattern if enabled */
986 if (isif_cfg.bayer.config_params.test_pat_gen) {
987 sync.ccdpg_hdpol = params->hd_pol;
988 sync.ccdpg_vdpol = params->vd_pol;
989 dm365_vpss_set_sync_pol(sync);
990 dm365_vpss_set_pg_frame_size(frame_size);
991 }
992 return 0;
993}
994
995static int isif_configure(void)
996{
997 if (isif_cfg.if_type == VPFE_RAW_BAYER)
998 return isif_config_raw();
999 return isif_config_ycbcr();
1000}
1001
1002static int isif_close(struct device *device)
1003{
1004 /* copy defaults to module params */
1005 isif_cfg.bayer.config_params = isif_config_defaults;
1006 return 0;
1007}
1008
1009static struct ccdc_hw_device isif_hw_dev = {
1010 .name = "ISIF",
1011 .owner = THIS_MODULE,
1012 .hw_ops = {
1013 .open = isif_open,
1014 .close = isif_close,
1015 .enable = isif_enable,
1016 .enable_out_to_sdram = isif_enable_output_to_sdram,
1017 .set_hw_if_params = isif_set_hw_if_params,
1018 .configure = isif_configure,
1019 .set_buftype = isif_set_buftype,
1020 .get_buftype = isif_get_buftype,
1021 .enum_pix = isif_enum_pix,
1022 .set_pixel_format = isif_set_pixel_format,
1023 .get_pixel_format = isif_get_pixel_format,
1024 .set_frame_format = isif_set_frame_format,
1025 .get_frame_format = isif_get_frame_format,
1026 .set_image_window = isif_set_image_window,
1027 .get_image_window = isif_get_image_window,
1028 .get_line_length = isif_get_line_length,
1029 .setfbaddr = isif_setfbaddr,
1030 .getfid = isif_getfid,
1031 },
1032};
1033
1034static int __init isif_probe(struct platform_device *pdev)
1035{
1036 void (*setup_pinmux)(void);
1037 struct resource *res;
1038 void *__iomem addr;
1039 int status = 0, i;
1040
1041 /*
1042 * first try to register with vpfe. If not correct platform, then we
1043 * don't have to iomap
1044 */
1045 status = vpfe_register_ccdc_device(&isif_hw_dev);
1046 if (status < 0)
1047 return status;
1048
1049 /* Get and enable Master clock */
1050 isif_cfg.mclk = clk_get(&pdev->dev, "master");
1051 if (IS_ERR(isif_cfg.mclk)) {
1052 status = PTR_ERR(isif_cfg.mclk);
1053 goto fail_mclk;
1054 }
1055 if (clk_enable(isif_cfg.mclk)) {
1056 status = -ENODEV;
1057 goto fail_mclk;
1058 }
1059
1060 /* Platform data holds setup_pinmux function ptr */
1061 if (NULL == pdev->dev.platform_data) {
1062 status = -ENODEV;
1063 goto fail_mclk;
1064 }
1065 setup_pinmux = pdev->dev.platform_data;
1066 /*
1067 * setup Mux configuration for ccdc which may be different for
1068 * different SoCs using this CCDC
1069 */
1070 setup_pinmux();
1071
1072 i = 0;
1073 /* Get the ISIF base address, linearization table0 and table1 addr. */
1074 while (i < 3) {
1075 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1076 if (!res) {
1077 status = -ENODEV;
1078 goto fail_nobase_res;
1079 }
1080 res = request_mem_region(res->start, resource_size(res),
1081 res->name);
1082 if (!res) {
1083 status = -EBUSY;
1084 goto fail_nobase_res;
1085 }
1086 addr = ioremap_nocache(res->start, resource_size(res));
1087 if (!addr) {
1088 status = -ENOMEM;
1089 goto fail_base_iomap;
1090 }
1091 switch (i) {
1092 case 0:
1093 /* ISIF base address */
1094 isif_cfg.base_addr = addr;
1095 break;
1096 case 1:
1097 /* ISIF linear tbl0 address */
1098 isif_cfg.linear_tbl0_addr = addr;
1099 break;
1100 default:
1101 /* ISIF linear tbl0 address */
1102 isif_cfg.linear_tbl1_addr = addr;
1103 break;
1104 }
1105 i++;
1106 }
1107 isif_cfg.dev = &pdev->dev;
1108
1109 printk(KERN_NOTICE "%s is registered with vpfe.\n",
1110 isif_hw_dev.name);
1111 return 0;
1112fail_base_iomap:
1113 release_mem_region(res->start, resource_size(res));
1114 i--;
1115fail_nobase_res:
1116 if (isif_cfg.base_addr)
1117 iounmap(isif_cfg.base_addr);
1118 if (isif_cfg.linear_tbl0_addr)
1119 iounmap(isif_cfg.linear_tbl0_addr);
1120
1121 while (i >= 0) {
1122 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1123 release_mem_region(res->start, resource_size(res));
1124 i--;
1125 }
1126fail_mclk:
1127 clk_put(isif_cfg.mclk);
1128 vpfe_unregister_ccdc_device(&isif_hw_dev);
1129 return status;
1130}
1131
1132static int isif_remove(struct platform_device *pdev)
1133{
1134 struct resource *res;
1135 int i = 0;
1136
1137 iounmap(isif_cfg.base_addr);
1138 iounmap(isif_cfg.linear_tbl0_addr);
1139 iounmap(isif_cfg.linear_tbl1_addr);
1140 while (i < 3) {
1141 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1142 if (res)
1143 release_mem_region(res->start, resource_size(res));
1144 i++;
1145 }
1146 vpfe_unregister_ccdc_device(&isif_hw_dev);
1147 return 0;
1148}
1149
1150static struct platform_driver isif_driver = {
1151 .driver = {
1152 .name = "isif",
1153 .owner = THIS_MODULE,
1154 },
1155 .remove = __devexit_p(isif_remove),
1156 .probe = isif_probe,
1157};
1158
1159static int __init isif_init(void)
1160{
1161 return platform_driver_register(&isif_driver);
1162}
1163
1164static void isif_exit(void)
1165{
1166 platform_driver_unregister(&isif_driver);
1167}
1168
1169module_init(isif_init);
1170module_exit(isif_exit);
1171
1172MODULE_LICENSE("GPL");
diff --git a/drivers/media/video/davinci/isif_regs.h b/drivers/media/video/davinci/isif_regs.h
new file mode 100644
index 000000000000..f7b8893a2957
--- /dev/null
+++ b/drivers/media/video/davinci/isif_regs.h
@@ -0,0 +1,269 @@
1/*
2 * Copyright (C) 2008-2009 Texas Instruments Inc
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18#ifndef _ISIF_REGS_H
19#define _ISIF_REGS_H
20
21/* ISIF registers relative offsets */
22#define SYNCEN 0x00
23#define MODESET 0x04
24#define HDW 0x08
25#define VDW 0x0c
26#define PPLN 0x10
27#define LPFR 0x14
28#define SPH 0x18
29#define LNH 0x1c
30#define SLV0 0x20
31#define SLV1 0x24
32#define LNV 0x28
33#define CULH 0x2c
34#define CULV 0x30
35#define HSIZE 0x34
36#define SDOFST 0x38
37#define CADU 0x3c
38#define CADL 0x40
39#define LINCFG0 0x44
40#define LINCFG1 0x48
41#define CCOLP 0x4c
42#define CRGAIN 0x50
43#define CGRGAIN 0x54
44#define CGBGAIN 0x58
45#define CBGAIN 0x5c
46#define COFSTA 0x60
47#define FLSHCFG0 0x64
48#define FLSHCFG1 0x68
49#define FLSHCFG2 0x6c
50#define VDINT0 0x70
51#define VDINT1 0x74
52#define VDINT2 0x78
53#define MISC 0x7c
54#define CGAMMAWD 0x80
55#define REC656IF 0x84
56#define CCDCFG 0x88
57/*****************************************************
58* Defect Correction registers
59*****************************************************/
60#define DFCCTL 0x8c
61#define VDFSATLV 0x90
62#define DFCMEMCTL 0x94
63#define DFCMEM0 0x98
64#define DFCMEM1 0x9c
65#define DFCMEM2 0xa0
66#define DFCMEM3 0xa4
67#define DFCMEM4 0xa8
68/****************************************************
69* Black Clamp registers
70****************************************************/
71#define CLAMPCFG 0xac
72#define CLDCOFST 0xb0
73#define CLSV 0xb4
74#define CLHWIN0 0xb8
75#define CLHWIN1 0xbc
76#define CLHWIN2 0xc0
77#define CLVRV 0xc4
78#define CLVWIN0 0xc8
79#define CLVWIN1 0xcc
80#define CLVWIN2 0xd0
81#define CLVWIN3 0xd4
82/****************************************************
83* Lense Shading Correction
84****************************************************/
85#define DATAHOFST 0xd8
86#define DATAVOFST 0xdc
87#define LSCHVAL 0xe0
88#define LSCVVAL 0xe4
89#define TWODLSCCFG 0xe8
90#define TWODLSCOFST 0xec
91#define TWODLSCINI 0xf0
92#define TWODLSCGRBU 0xf4
93#define TWODLSCGRBL 0xf8
94#define TWODLSCGROF 0xfc
95#define TWODLSCORBU 0x100
96#define TWODLSCORBL 0x104
97#define TWODLSCOROF 0x108
98#define TWODLSCIRQEN 0x10c
99#define TWODLSCIRQST 0x110
100/****************************************************
101* Data formatter
102****************************************************/
103#define FMTCFG 0x114
104#define FMTPLEN 0x118
105#define FMTSPH 0x11c
106#define FMTLNH 0x120
107#define FMTSLV 0x124
108#define FMTLNV 0x128
109#define FMTRLEN 0x12c
110#define FMTHCNT 0x130
111#define FMTAPTR_BASE 0x134
112/* Below macro for addresses FMTAPTR0 - FMTAPTR15 */
113#define FMTAPTR(i) (FMTAPTR_BASE + (i * 4))
114#define FMTPGMVF0 0x174
115#define FMTPGMVF1 0x178
116#define FMTPGMAPU0 0x17c
117#define FMTPGMAPU1 0x180
118#define FMTPGMAPS0 0x184
119#define FMTPGMAPS1 0x188
120#define FMTPGMAPS2 0x18c
121#define FMTPGMAPS3 0x190
122#define FMTPGMAPS4 0x194
123#define FMTPGMAPS5 0x198
124#define FMTPGMAPS6 0x19c
125#define FMTPGMAPS7 0x1a0
126/************************************************
127* Color Space Converter
128************************************************/
129#define CSCCTL 0x1a4
130#define CSCM0 0x1a8
131#define CSCM1 0x1ac
132#define CSCM2 0x1b0
133#define CSCM3 0x1b4
134#define CSCM4 0x1b8
135#define CSCM5 0x1bc
136#define CSCM6 0x1c0
137#define CSCM7 0x1c4
138#define OBWIN0 0x1c8
139#define OBWIN1 0x1cc
140#define OBWIN2 0x1d0
141#define OBWIN3 0x1d4
142#define OBVAL0 0x1d8
143#define OBVAL1 0x1dc
144#define OBVAL2 0x1e0
145#define OBVAL3 0x1e4
146#define OBVAL4 0x1e8
147#define OBVAL5 0x1ec
148#define OBVAL6 0x1f0
149#define OBVAL7 0x1f4
150#define CLKCTL 0x1f8
151
152/* Masks & Shifts below */
153#define START_PX_HOR_MASK 0x7FFF
154#define NUM_PX_HOR_MASK 0x7FFF
155#define START_VER_ONE_MASK 0x7FFF
156#define START_VER_TWO_MASK 0x7FFF
157#define NUM_LINES_VER 0x7FFF
158
159/* gain - offset masks */
160#define GAIN_INTEGER_SHIFT 9
161#define OFFSET_MASK 0xFFF
162#define GAIN_SDRAM_EN_SHIFT 12
163#define GAIN_IPIPE_EN_SHIFT 13
164#define GAIN_H3A_EN_SHIFT 14
165#define OFST_SDRAM_EN_SHIFT 8
166#define OFST_IPIPE_EN_SHIFT 9
167#define OFST_H3A_EN_SHIFT 10
168#define GAIN_OFFSET_EN_MASK 0x7700
169
170/* Culling */
171#define CULL_PAT_EVEN_LINE_SHIFT 8
172
173/* CCDCFG register */
174#define ISIF_YCINSWP_RAW (0x00 << 4)
175#define ISIF_YCINSWP_YCBCR (0x01 << 4)
176#define ISIF_CCDCFG_FIDMD_LATCH_VSYNC (0x00 << 6)
177#define ISIF_CCDCFG_WENLOG_AND (0x00 << 8)
178#define ISIF_CCDCFG_TRGSEL_WEN (0x00 << 9)
179#define ISIF_CCDCFG_EXTRG_DISABLE (0x00 << 10)
180#define ISIF_LATCH_ON_VSYNC_DISABLE (0x01 << 15)
181#define ISIF_LATCH_ON_VSYNC_ENABLE (0x00 << 15)
182#define ISIF_DATA_PACK_MASK 3
183#define ISIF_DATA_PACK16 0
184#define ISIF_DATA_PACK12 1
185#define ISIF_DATA_PACK8 2
186#define ISIF_PIX_ORDER_SHIFT 11
187#define ISIF_BW656_ENABLE (0x01 << 5)
188
189/* MODESET registers */
190#define ISIF_VDHDOUT_INPUT (0x00 << 0)
191#define ISIF_INPUT_SHIFT 12
192#define ISIF_RAW_INPUT_MODE 0
193#define ISIF_FID_POL_SHIFT 4
194#define ISIF_HD_POL_SHIFT 3
195#define ISIF_VD_POL_SHIFT 2
196#define ISIF_DATAPOL_NORMAL 0
197#define ISIF_DATAPOL_SHIFT 6
198#define ISIF_EXWEN_DISABLE 0
199#define ISIF_EXWEN_SHIFT 5
200#define ISIF_FRM_FMT_SHIFT 7
201#define ISIF_DATASFT_SHIFT 8
202#define ISIF_LPF_SHIFT 14
203#define ISIF_LPF_MASK 1
204
205/* GAMMAWD registers */
206#define ISIF_ALAW_GAMA_WD_MASK 0xF
207#define ISIF_ALAW_GAMA_WD_SHIFT 1
208#define ISIF_ALAW_ENABLE 1
209#define ISIF_GAMMAWD_CFA_SHIFT 5
210
211/* HSIZE registers */
212#define ISIF_HSIZE_FLIP_MASK 1
213#define ISIF_HSIZE_FLIP_SHIFT 12
214
215/* MISC registers */
216#define ISIF_DPCM_EN_SHIFT 12
217#define ISIF_DPCM_PREDICTOR_SHIFT 13
218
219/* Black clamp related */
220#define ISIF_BC_MODE_COLOR_SHIFT 4
221#define ISIF_HORZ_BC_MODE_SHIFT 1
222#define ISIF_HORZ_BC_WIN_SEL_SHIFT 5
223#define ISIF_HORZ_BC_PIX_LIMIT_SHIFT 6
224#define ISIF_HORZ_BC_WIN_H_SIZE_SHIFT 8
225#define ISIF_HORZ_BC_WIN_V_SIZE_SHIFT 12
226#define ISIF_VERT_BC_RST_VAL_SEL_SHIFT 4
227#define ISIF_VERT_BC_LINE_AVE_COEF_SHIFT 8
228
229/* VDFC registers */
230#define ISIF_VDFC_EN_SHIFT 4
231#define ISIF_VDFC_CORR_MOD_SHIFT 5
232#define ISIF_VDFC_CORR_WHOLE_LN_SHIFT 7
233#define ISIF_VDFC_LEVEL_SHFT_SHIFT 8
234#define ISIF_VDFC_POS_MASK 0x1FFF
235#define ISIF_DFCMEMCTL_DFCMARST_SHIFT 2
236
237/* CSC registers */
238#define ISIF_CSC_COEF_INTEG_MASK 7
239#define ISIF_CSC_COEF_DECIMAL_MASK 0x1f
240#define ISIF_CSC_COEF_INTEG_SHIFT 5
241#define ISIF_CSCM_MSB_SHIFT 8
242#define ISIF_DF_CSC_SPH_MASK 0x1FFF
243#define ISIF_DF_CSC_LNH_MASK 0x1FFF
244#define ISIF_DF_CSC_SLV_MASK 0x1FFF
245#define ISIF_DF_CSC_LNV_MASK 0x1FFF
246#define ISIF_DF_NUMLINES 0x7FFF
247#define ISIF_DF_NUMPIX 0x1FFF
248
249/* Offsets for LSC/DFC/Gain */
250#define ISIF_DATA_H_OFFSET_MASK 0x1FFF
251#define ISIF_DATA_V_OFFSET_MASK 0x1FFF
252
253/* Linearization */
254#define ISIF_LIN_CORRSFT_SHIFT 4
255#define ISIF_LIN_SCALE_FACT_INTEG_SHIFT 10
256
257
258/* Pattern registers */
259#define ISIF_PG_EN (1 << 3)
260#define ISIF_SEL_PG_SRC (3 << 4)
261#define ISIF_PG_VD_POL_SHIFT 0
262#define ISIF_PG_HD_POL_SHIFT 1
263
264/*random other junk*/
265#define ISIF_SYNCEN_VDHDEN_MASK (1 << 0)
266#define ISIF_SYNCEN_WEN_MASK (1 << 1)
267#define ISIF_SYNCEN_WEN_SHIFT 1
268
269#endif
diff --git a/drivers/media/video/davinci/vpfe_capture.c b/drivers/media/video/davinci/vpfe_capture.c
index de22bc9faf21..885cd54499cf 100644
--- a/drivers/media/video/davinci/vpfe_capture.c
+++ b/drivers/media/video/davinci/vpfe_capture.c
@@ -107,9 +107,6 @@ struct ccdc_config {
107 int vpfe_probed; 107 int vpfe_probed;
108 /* name of ccdc device */ 108 /* name of ccdc device */
109 char name[32]; 109 char name[32];
110 /* for storing mem maps for CCDC */
111 int ccdc_addr_size;
112 void *__iomem ccdc_addr;
113}; 110};
114 111
115/* data structures */ 112/* data structures */
@@ -229,7 +226,6 @@ int vpfe_register_ccdc_device(struct ccdc_hw_device *dev)
229 BUG_ON(!dev->hw_ops.set_image_window); 226 BUG_ON(!dev->hw_ops.set_image_window);
230 BUG_ON(!dev->hw_ops.get_image_window); 227 BUG_ON(!dev->hw_ops.get_image_window);
231 BUG_ON(!dev->hw_ops.get_line_length); 228 BUG_ON(!dev->hw_ops.get_line_length);
232 BUG_ON(!dev->hw_ops.setfbaddr);
233 BUG_ON(!dev->hw_ops.getfid); 229 BUG_ON(!dev->hw_ops.getfid);
234 230
235 mutex_lock(&ccdc_lock); 231 mutex_lock(&ccdc_lock);
@@ -240,25 +236,23 @@ int vpfe_register_ccdc_device(struct ccdc_hw_device *dev)
240 * walk through it during vpfe probe 236 * walk through it during vpfe probe
241 */ 237 */
242 printk(KERN_ERR "vpfe capture not initialized\n"); 238 printk(KERN_ERR "vpfe capture not initialized\n");
243 ret = -1; 239 ret = -EFAULT;
244 goto unlock; 240 goto unlock;
245 } 241 }
246 242
247 if (strcmp(dev->name, ccdc_cfg->name)) { 243 if (strcmp(dev->name, ccdc_cfg->name)) {
248 /* ignore this ccdc */ 244 /* ignore this ccdc */
249 ret = -1; 245 ret = -EINVAL;
250 goto unlock; 246 goto unlock;
251 } 247 }
252 248
253 if (ccdc_dev) { 249 if (ccdc_dev) {
254 printk(KERN_ERR "ccdc already registered\n"); 250 printk(KERN_ERR "ccdc already registered\n");
255 ret = -1; 251 ret = -EINVAL;
256 goto unlock; 252 goto unlock;
257 } 253 }
258 254
259 ccdc_dev = dev; 255 ccdc_dev = dev;
260 dev->hw_ops.set_ccdc_base(ccdc_cfg->ccdc_addr,
261 ccdc_cfg->ccdc_addr_size);
262unlock: 256unlock:
263 mutex_unlock(&ccdc_lock); 257 mutex_unlock(&ccdc_lock);
264 return ret; 258 return ret;
@@ -1786,61 +1780,6 @@ static struct vpfe_device *vpfe_initialize(void)
1786 return vpfe_dev; 1780 return vpfe_dev;
1787} 1781}
1788 1782
1789static void vpfe_disable_clock(struct vpfe_device *vpfe_dev)
1790{
1791 struct vpfe_config *vpfe_cfg = vpfe_dev->cfg;
1792
1793 clk_disable(vpfe_cfg->vpssclk);
1794 clk_put(vpfe_cfg->vpssclk);
1795 clk_disable(vpfe_cfg->slaveclk);
1796 clk_put(vpfe_cfg->slaveclk);
1797 v4l2_info(vpfe_dev->pdev->driver,
1798 "vpfe vpss master & slave clocks disabled\n");
1799}
1800
1801static int vpfe_enable_clock(struct vpfe_device *vpfe_dev)
1802{
1803 struct vpfe_config *vpfe_cfg = vpfe_dev->cfg;
1804 int ret = -ENOENT;
1805
1806 vpfe_cfg->vpssclk = clk_get(vpfe_dev->pdev, "vpss_master");
1807 if (NULL == vpfe_cfg->vpssclk) {
1808 v4l2_err(vpfe_dev->pdev->driver, "No clock defined for"
1809 "vpss_master\n");
1810 return ret;
1811 }
1812
1813 if (clk_enable(vpfe_cfg->vpssclk)) {
1814 v4l2_err(vpfe_dev->pdev->driver,
1815 "vpfe vpss master clock not enabled\n");
1816 goto out;
1817 }
1818 v4l2_info(vpfe_dev->pdev->driver,
1819 "vpfe vpss master clock enabled\n");
1820
1821 vpfe_cfg->slaveclk = clk_get(vpfe_dev->pdev, "vpss_slave");
1822 if (NULL == vpfe_cfg->slaveclk) {
1823 v4l2_err(vpfe_dev->pdev->driver,
1824 "No clock defined for vpss slave\n");
1825 goto out;
1826 }
1827
1828 if (clk_enable(vpfe_cfg->slaveclk)) {
1829 v4l2_err(vpfe_dev->pdev->driver,
1830 "vpfe vpss slave clock not enabled\n");
1831 goto out;
1832 }
1833 v4l2_info(vpfe_dev->pdev->driver, "vpfe vpss slave clock enabled\n");
1834 return 0;
1835out:
1836 if (vpfe_cfg->vpssclk)
1837 clk_put(vpfe_cfg->vpssclk);
1838 if (vpfe_cfg->slaveclk)
1839 clk_put(vpfe_cfg->slaveclk);
1840
1841 return -1;
1842}
1843
1844/* 1783/*
1845 * vpfe_probe : This function creates device entries by register 1784 * vpfe_probe : This function creates device entries by register
1846 * itself to the V4L2 driver and initializes fields of each 1785 * itself to the V4L2 driver and initializes fields of each
@@ -1870,7 +1809,7 @@ static __init int vpfe_probe(struct platform_device *pdev)
1870 1809
1871 if (NULL == pdev->dev.platform_data) { 1810 if (NULL == pdev->dev.platform_data) {
1872 v4l2_err(pdev->dev.driver, "Unable to get vpfe config\n"); 1811 v4l2_err(pdev->dev.driver, "Unable to get vpfe config\n");
1873 ret = -ENOENT; 1812 ret = -ENODEV;
1874 goto probe_free_dev_mem; 1813 goto probe_free_dev_mem;
1875 } 1814 }
1876 1815
@@ -1884,18 +1823,13 @@ static __init int vpfe_probe(struct platform_device *pdev)
1884 goto probe_free_dev_mem; 1823 goto probe_free_dev_mem;
1885 } 1824 }
1886 1825
1887 /* enable vpss clocks */
1888 ret = vpfe_enable_clock(vpfe_dev);
1889 if (ret)
1890 goto probe_free_dev_mem;
1891
1892 mutex_lock(&ccdc_lock); 1826 mutex_lock(&ccdc_lock);
1893 /* Allocate memory for ccdc configuration */ 1827 /* Allocate memory for ccdc configuration */
1894 ccdc_cfg = kmalloc(sizeof(struct ccdc_config), GFP_KERNEL); 1828 ccdc_cfg = kmalloc(sizeof(struct ccdc_config), GFP_KERNEL);
1895 if (NULL == ccdc_cfg) { 1829 if (NULL == ccdc_cfg) {
1896 v4l2_err(pdev->dev.driver, 1830 v4l2_err(pdev->dev.driver,
1897 "Memory allocation failed for ccdc_cfg\n"); 1831 "Memory allocation failed for ccdc_cfg\n");
1898 goto probe_disable_clock; 1832 goto probe_free_dev_mem;
1899 } 1833 }
1900 1834
1901 strncpy(ccdc_cfg->name, vpfe_cfg->ccdc, 32); 1835 strncpy(ccdc_cfg->name, vpfe_cfg->ccdc, 32);
@@ -1904,61 +1838,34 @@ static __init int vpfe_probe(struct platform_device *pdev)
1904 if (!res1) { 1838 if (!res1) {
1905 v4l2_err(pdev->dev.driver, 1839 v4l2_err(pdev->dev.driver,
1906 "Unable to get interrupt for VINT0\n"); 1840 "Unable to get interrupt for VINT0\n");
1907 ret = -ENOENT; 1841 ret = -ENODEV;
1908 goto probe_disable_clock; 1842 goto probe_free_ccdc_cfg_mem;
1909 } 1843 }
1910 vpfe_dev->ccdc_irq0 = res1->start; 1844 vpfe_dev->ccdc_irq0 = res1->start;
1911 1845
1912 /* Get VINT1 irq resource */ 1846 /* Get VINT1 irq resource */
1913 res1 = platform_get_resource(pdev, 1847 res1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
1914 IORESOURCE_IRQ, 1);
1915 if (!res1) { 1848 if (!res1) {
1916 v4l2_err(pdev->dev.driver, 1849 v4l2_err(pdev->dev.driver,
1917 "Unable to get interrupt for VINT1\n"); 1850 "Unable to get interrupt for VINT1\n");
1918 ret = -ENOENT; 1851 ret = -ENODEV;
1919 goto probe_disable_clock; 1852 goto probe_free_ccdc_cfg_mem;
1920 } 1853 }
1921 vpfe_dev->ccdc_irq1 = res1->start; 1854 vpfe_dev->ccdc_irq1 = res1->start;
1922 1855
1923 /* Get address base of CCDC */
1924 res1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1925 if (!res1) {
1926 v4l2_err(pdev->dev.driver,
1927 "Unable to get register address map\n");
1928 ret = -ENOENT;
1929 goto probe_disable_clock;
1930 }
1931
1932 ccdc_cfg->ccdc_addr_size = res1->end - res1->start + 1;
1933 if (!request_mem_region(res1->start, ccdc_cfg->ccdc_addr_size,
1934 pdev->dev.driver->name)) {
1935 v4l2_err(pdev->dev.driver,
1936 "Failed request_mem_region for ccdc base\n");
1937 ret = -ENXIO;
1938 goto probe_disable_clock;
1939 }
1940 ccdc_cfg->ccdc_addr = ioremap_nocache(res1->start,
1941 ccdc_cfg->ccdc_addr_size);
1942 if (!ccdc_cfg->ccdc_addr) {
1943 v4l2_err(pdev->dev.driver, "Unable to ioremap ccdc addr\n");
1944 ret = -ENXIO;
1945 goto probe_out_release_mem1;
1946 }
1947
1948 ret = request_irq(vpfe_dev->ccdc_irq0, vpfe_isr, IRQF_DISABLED, 1856 ret = request_irq(vpfe_dev->ccdc_irq0, vpfe_isr, IRQF_DISABLED,
1949 "vpfe_capture0", vpfe_dev); 1857 "vpfe_capture0", vpfe_dev);
1950 1858
1951 if (0 != ret) { 1859 if (0 != ret) {
1952 v4l2_err(pdev->dev.driver, "Unable to request interrupt\n"); 1860 v4l2_err(pdev->dev.driver, "Unable to request interrupt\n");
1953 goto probe_out_unmap1; 1861 goto probe_free_ccdc_cfg_mem;
1954 } 1862 }
1955 1863
1956 /* Allocate memory for video device */ 1864 /* Allocate memory for video device */
1957 vfd = video_device_alloc(); 1865 vfd = video_device_alloc();
1958 if (NULL == vfd) { 1866 if (NULL == vfd) {
1959 ret = -ENOMEM; 1867 ret = -ENOMEM;
1960 v4l2_err(pdev->dev.driver, 1868 v4l2_err(pdev->dev.driver, "Unable to alloc video device\n");
1961 "Unable to alloc video device\n");
1962 goto probe_out_release_irq; 1869 goto probe_out_release_irq;
1963 } 1870 }
1964 1871
@@ -2073,12 +1980,7 @@ probe_out_video_release:
2073 video_device_release(vpfe_dev->video_dev); 1980 video_device_release(vpfe_dev->video_dev);
2074probe_out_release_irq: 1981probe_out_release_irq:
2075 free_irq(vpfe_dev->ccdc_irq0, vpfe_dev); 1982 free_irq(vpfe_dev->ccdc_irq0, vpfe_dev);
2076probe_out_unmap1: 1983probe_free_ccdc_cfg_mem:
2077 iounmap(ccdc_cfg->ccdc_addr);
2078probe_out_release_mem1:
2079 release_mem_region(res1->start, res1->end - res1->start + 1);
2080probe_disable_clock:
2081 vpfe_disable_clock(vpfe_dev);
2082 mutex_unlock(&ccdc_lock); 1984 mutex_unlock(&ccdc_lock);
2083 kfree(ccdc_cfg); 1985 kfree(ccdc_cfg);
2084probe_free_dev_mem: 1986probe_free_dev_mem:
@@ -2092,7 +1994,6 @@ probe_free_dev_mem:
2092static int __devexit vpfe_remove(struct platform_device *pdev) 1994static int __devexit vpfe_remove(struct platform_device *pdev)
2093{ 1995{
2094 struct vpfe_device *vpfe_dev = platform_get_drvdata(pdev); 1996 struct vpfe_device *vpfe_dev = platform_get_drvdata(pdev);
2095 struct resource *res;
2096 1997
2097 v4l2_info(pdev->dev.driver, "vpfe_remove\n"); 1998 v4l2_info(pdev->dev.driver, "vpfe_remove\n");
2098 1999
@@ -2100,12 +2001,6 @@ static int __devexit vpfe_remove(struct platform_device *pdev)
2100 kfree(vpfe_dev->sd); 2001 kfree(vpfe_dev->sd);
2101 v4l2_device_unregister(&vpfe_dev->v4l2_dev); 2002 v4l2_device_unregister(&vpfe_dev->v4l2_dev);
2102 video_unregister_device(vpfe_dev->video_dev); 2003 video_unregister_device(vpfe_dev->video_dev);
2103 mutex_lock(&ccdc_lock);
2104 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2105 release_mem_region(res->start, res->end - res->start + 1);
2106 iounmap(ccdc_cfg->ccdc_addr);
2107 mutex_unlock(&ccdc_lock);
2108 vpfe_disable_clock(vpfe_dev);
2109 kfree(vpfe_dev); 2004 kfree(vpfe_dev);
2110 kfree(ccdc_cfg); 2005 kfree(ccdc_cfg);
2111 return 0; 2006 return 0;
diff --git a/drivers/media/video/davinci/vpss.c b/drivers/media/video/davinci/vpss.c
index 7ee72ecd3d81..7918680917d0 100644
--- a/drivers/media/video/davinci/vpss.c
+++ b/drivers/media/video/davinci/vpss.c
@@ -15,7 +15,7 @@
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 * 17 *
18 * common vpss driver for all video drivers. 18 * common vpss system module platform driver for all video drivers.
19 */ 19 */
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/sched.h> 21#include <linux/sched.h>
@@ -35,12 +35,52 @@ MODULE_AUTHOR("Texas Instruments");
35/* DM644x defines */ 35/* DM644x defines */
36#define DM644X_SBL_PCR_VPSS (4) 36#define DM644X_SBL_PCR_VPSS (4)
37 37
38#define DM355_VPSSBL_INTSEL 0x10
39#define DM355_VPSSBL_EVTSEL 0x14
38/* vpss BL register offsets */ 40/* vpss BL register offsets */
39#define DM355_VPSSBL_CCDCMUX 0x1c 41#define DM355_VPSSBL_CCDCMUX 0x1c
40/* vpss CLK register offsets */ 42/* vpss CLK register offsets */
41#define DM355_VPSSCLK_CLKCTRL 0x04 43#define DM355_VPSSCLK_CLKCTRL 0x04
42/* masks and shifts */ 44/* masks and shifts */
43#define VPSS_HSSISEL_SHIFT 4 45#define VPSS_HSSISEL_SHIFT 4
46/*
47 * VDINT0 - vpss_int0, VDINT1 - vpss_int1, H3A - vpss_int4,
48 * IPIPE_INT1_SDR - vpss_int5
49 */
50#define DM355_VPSSBL_INTSEL_DEFAULT 0xff83ff10
51/* VENCINT - vpss_int8 */
52#define DM355_VPSSBL_EVTSEL_DEFAULT 0x4
53
54#define DM365_ISP5_PCCR 0x04
55#define DM365_ISP5_INTSEL1 0x10
56#define DM365_ISP5_INTSEL2 0x14
57#define DM365_ISP5_INTSEL3 0x18
58#define DM365_ISP5_CCDCMUX 0x20
59#define DM365_ISP5_PG_FRAME_SIZE 0x28
60#define DM365_VPBE_CLK_CTRL 0x00
61/*
62 * vpss interrupts. VDINT0 - vpss_int0, VDINT1 - vpss_int1,
63 * AF - vpss_int3
64 */
65#define DM365_ISP5_INTSEL1_DEFAULT 0x0b1f0100
66/* AEW - vpss_int6, RSZ_INT_DMA - vpss_int5 */
67#define DM365_ISP5_INTSEL2_DEFAULT 0x1f0a0f1f
68/* VENC - vpss_int8 */
69#define DM365_ISP5_INTSEL3_DEFAULT 0x00000015
70
71/* masks and shifts for DM365*/
72#define DM365_CCDC_PG_VD_POL_SHIFT 0
73#define DM365_CCDC_PG_HD_POL_SHIFT 1
74
75#define CCD_SRC_SEL_MASK (BIT_MASK(5) | BIT_MASK(4))
76#define CCD_SRC_SEL_SHIFT 4
77
78/* Different SoC platforms supported by this driver */
79enum vpss_platform_type {
80 DM644X,
81 DM355,
82 DM365,
83};
44 84
45/* 85/*
46 * vpss operations. Depends on platform. Not all functions are available 86 * vpss operations. Depends on platform. Not all functions are available
@@ -59,13 +99,9 @@ struct vpss_hw_ops {
59 99
60/* vpss configuration */ 100/* vpss configuration */
61struct vpss_oper_config { 101struct vpss_oper_config {
62 __iomem void *vpss_bl_regs_base; 102 __iomem void *vpss_regs_base0;
63 __iomem void *vpss_regs_base; 103 __iomem void *vpss_regs_base1;
64 struct resource *r1; 104 enum vpss_platform_type platform;
65 resource_size_t len1;
66 struct resource *r2;
67 resource_size_t len2;
68 char vpss_name[32];
69 spinlock_t vpss_lock; 105 spinlock_t vpss_lock;
70 struct vpss_hw_ops hw_ops; 106 struct vpss_hw_ops hw_ops;
71}; 107};
@@ -75,22 +111,46 @@ static struct vpss_oper_config oper_cfg;
75/* register access routines */ 111/* register access routines */
76static inline u32 bl_regr(u32 offset) 112static inline u32 bl_regr(u32 offset)
77{ 113{
78 return __raw_readl(oper_cfg.vpss_bl_regs_base + offset); 114 return __raw_readl(oper_cfg.vpss_regs_base0 + offset);
79} 115}
80 116
81static inline void bl_regw(u32 val, u32 offset) 117static inline void bl_regw(u32 val, u32 offset)
82{ 118{
83 __raw_writel(val, oper_cfg.vpss_bl_regs_base + offset); 119 __raw_writel(val, oper_cfg.vpss_regs_base0 + offset);
84} 120}
85 121
86static inline u32 vpss_regr(u32 offset) 122static inline u32 vpss_regr(u32 offset)
87{ 123{
88 return __raw_readl(oper_cfg.vpss_regs_base + offset); 124 return __raw_readl(oper_cfg.vpss_regs_base1 + offset);
89} 125}
90 126
91static inline void vpss_regw(u32 val, u32 offset) 127static inline void vpss_regw(u32 val, u32 offset)
92{ 128{
93 __raw_writel(val, oper_cfg.vpss_regs_base + offset); 129 __raw_writel(val, oper_cfg.vpss_regs_base1 + offset);
130}
131
132/* For DM365 only */
133static inline u32 isp5_read(u32 offset)
134{
135 return __raw_readl(oper_cfg.vpss_regs_base0 + offset);
136}
137
138/* For DM365 only */
139static inline void isp5_write(u32 val, u32 offset)
140{
141 __raw_writel(val, oper_cfg.vpss_regs_base0 + offset);
142}
143
144static void dm365_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
145{
146 u32 temp = isp5_read(DM365_ISP5_CCDCMUX) & ~CCD_SRC_SEL_MASK;
147
148 /* if we are using pattern generator, enable it */
149 if (src_sel == VPSS_PGLPBK || src_sel == VPSS_CCDCPG)
150 temp |= 0x08;
151
152 temp |= (src_sel << CCD_SRC_SEL_SHIFT);
153 isp5_write(temp, DM365_ISP5_CCDCMUX);
94} 154}
95 155
96static void dm355_select_ccdc_source(enum vpss_ccdc_source_sel src_sel) 156static void dm355_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
@@ -101,9 +161,9 @@ static void dm355_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
101int vpss_select_ccdc_source(enum vpss_ccdc_source_sel src_sel) 161int vpss_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
102{ 162{
103 if (!oper_cfg.hw_ops.select_ccdc_source) 163 if (!oper_cfg.hw_ops.select_ccdc_source)
104 return -1; 164 return -EINVAL;
105 165
106 dm355_select_ccdc_source(src_sel); 166 oper_cfg.hw_ops.select_ccdc_source(src_sel);
107 return 0; 167 return 0;
108} 168}
109EXPORT_SYMBOL(vpss_select_ccdc_source); 169EXPORT_SYMBOL(vpss_select_ccdc_source);
@@ -114,7 +174,7 @@ static int dm644x_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel)
114 174
115 if (wbl_sel < VPSS_PCR_AEW_WBL_0 || 175 if (wbl_sel < VPSS_PCR_AEW_WBL_0 ||
116 wbl_sel > VPSS_PCR_CCDC_WBL_O) 176 wbl_sel > VPSS_PCR_CCDC_WBL_O)
117 return -1; 177 return -EINVAL;
118 178
119 /* writing a 0 clear the overflow */ 179 /* writing a 0 clear the overflow */
120 mask = ~(mask << wbl_sel); 180 mask = ~(mask << wbl_sel);
@@ -126,7 +186,7 @@ static int dm644x_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel)
126int vpss_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel) 186int vpss_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel)
127{ 187{
128 if (!oper_cfg.hw_ops.clear_wbl_overflow) 188 if (!oper_cfg.hw_ops.clear_wbl_overflow)
129 return -1; 189 return -EINVAL;
130 190
131 return oper_cfg.hw_ops.clear_wbl_overflow(wbl_sel); 191 return oper_cfg.hw_ops.clear_wbl_overflow(wbl_sel);
132} 192}
@@ -166,7 +226,7 @@ static int dm355_enable_clock(enum vpss_clock_sel clock_sel, int en)
166 default: 226 default:
167 printk(KERN_ERR "dm355_enable_clock:" 227 printk(KERN_ERR "dm355_enable_clock:"
168 " Invalid selector: %d\n", clock_sel); 228 " Invalid selector: %d\n", clock_sel);
169 return -1; 229 return -EINVAL;
170 } 230 }
171 231
172 spin_lock_irqsave(&oper_cfg.vpss_lock, flags); 232 spin_lock_irqsave(&oper_cfg.vpss_lock, flags);
@@ -181,100 +241,221 @@ static int dm355_enable_clock(enum vpss_clock_sel clock_sel, int en)
181 return 0; 241 return 0;
182} 242}
183 243
244static int dm365_enable_clock(enum vpss_clock_sel clock_sel, int en)
245{
246 unsigned long flags;
247 u32 utemp, mask = 0x1, shift = 0, offset = DM365_ISP5_PCCR;
248 u32 (*read)(u32 offset) = isp5_read;
249 void(*write)(u32 val, u32 offset) = isp5_write;
250
251 switch (clock_sel) {
252 case VPSS_BL_CLOCK:
253 break;
254 case VPSS_CCDC_CLOCK:
255 shift = 1;
256 break;
257 case VPSS_H3A_CLOCK:
258 shift = 2;
259 break;
260 case VPSS_RSZ_CLOCK:
261 shift = 3;
262 break;
263 case VPSS_IPIPE_CLOCK:
264 shift = 4;
265 break;
266 case VPSS_IPIPEIF_CLOCK:
267 shift = 5;
268 break;
269 case VPSS_PCLK_INTERNAL:
270 shift = 6;
271 break;
272 case VPSS_PSYNC_CLOCK_SEL:
273 shift = 7;
274 break;
275 case VPSS_VPBE_CLOCK:
276 read = vpss_regr;
277 write = vpss_regw;
278 offset = DM365_VPBE_CLK_CTRL;
279 break;
280 case VPSS_VENC_CLOCK_SEL:
281 shift = 2;
282 read = vpss_regr;
283 write = vpss_regw;
284 offset = DM365_VPBE_CLK_CTRL;
285 break;
286 case VPSS_LDC_CLOCK:
287 shift = 3;
288 read = vpss_regr;
289 write = vpss_regw;
290 offset = DM365_VPBE_CLK_CTRL;
291 break;
292 case VPSS_FDIF_CLOCK:
293 shift = 4;
294 read = vpss_regr;
295 write = vpss_regw;
296 offset = DM365_VPBE_CLK_CTRL;
297 break;
298 case VPSS_OSD_CLOCK_SEL:
299 shift = 6;
300 read = vpss_regr;
301 write = vpss_regw;
302 offset = DM365_VPBE_CLK_CTRL;
303 break;
304 case VPSS_LDC_CLOCK_SEL:
305 shift = 7;
306 read = vpss_regr;
307 write = vpss_regw;
308 offset = DM365_VPBE_CLK_CTRL;
309 break;
310 default:
311 printk(KERN_ERR "dm365_enable_clock: Invalid selector: %d\n",
312 clock_sel);
313 return -1;
314 }
315
316 spin_lock_irqsave(&oper_cfg.vpss_lock, flags);
317 utemp = read(offset);
318 if (!en) {
319 mask = ~mask;
320 utemp &= (mask << shift);
321 } else
322 utemp |= (mask << shift);
323
324 write(utemp, offset);
325 spin_unlock_irqrestore(&oper_cfg.vpss_lock, flags);
326
327 return 0;
328}
329
184int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en) 330int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en)
185{ 331{
186 if (!oper_cfg.hw_ops.enable_clock) 332 if (!oper_cfg.hw_ops.enable_clock)
187 return -1; 333 return -EINVAL;
188 334
189 return oper_cfg.hw_ops.enable_clock(clock_sel, en); 335 return oper_cfg.hw_ops.enable_clock(clock_sel, en);
190} 336}
191EXPORT_SYMBOL(vpss_enable_clock); 337EXPORT_SYMBOL(vpss_enable_clock);
192 338
339void dm365_vpss_set_sync_pol(struct vpss_sync_pol sync)
340{
341 int val = 0;
342 val = isp5_read(DM365_ISP5_CCDCMUX);
343
344 val |= (sync.ccdpg_hdpol << DM365_CCDC_PG_HD_POL_SHIFT);
345 val |= (sync.ccdpg_vdpol << DM365_CCDC_PG_VD_POL_SHIFT);
346
347 isp5_write(val, DM365_ISP5_CCDCMUX);
348}
349EXPORT_SYMBOL(dm365_vpss_set_sync_pol);
350
351void dm365_vpss_set_pg_frame_size(struct vpss_pg_frame_size frame_size)
352{
353 int current_reg = ((frame_size.hlpfr >> 1) - 1) << 16;
354
355 current_reg |= (frame_size.pplen - 1);
356 isp5_write(current_reg, DM365_ISP5_PG_FRAME_SIZE);
357}
358EXPORT_SYMBOL(dm365_vpss_set_pg_frame_size);
359
193static int __init vpss_probe(struct platform_device *pdev) 360static int __init vpss_probe(struct platform_device *pdev)
194{ 361{
195 int status, dm355 = 0; 362 struct resource *r1, *r2;
363 char *platform_name;
364 int status;
196 365
197 if (!pdev->dev.platform_data) { 366 if (!pdev->dev.platform_data) {
198 dev_err(&pdev->dev, "no platform data\n"); 367 dev_err(&pdev->dev, "no platform data\n");
199 return -ENOENT; 368 return -ENOENT;
200 } 369 }
201 strcpy(oper_cfg.vpss_name, pdev->dev.platform_data);
202 370
203 if (!strcmp(oper_cfg.vpss_name, "dm355_vpss")) 371 platform_name = pdev->dev.platform_data;
204 dm355 = 1; 372 if (!strcmp(platform_name, "dm355_vpss"))
205 else if (strcmp(oper_cfg.vpss_name, "dm644x_vpss")) { 373 oper_cfg.platform = DM355;
374 else if (!strcmp(platform_name, "dm365_vpss"))
375 oper_cfg.platform = DM365;
376 else if (!strcmp(platform_name, "dm644x_vpss"))
377 oper_cfg.platform = DM644X;
378 else {
206 dev_err(&pdev->dev, "vpss driver not supported on" 379 dev_err(&pdev->dev, "vpss driver not supported on"
207 " this platform\n"); 380 " this platform\n");
208 return -ENODEV; 381 return -ENODEV;
209 } 382 }
210 383
211 dev_info(&pdev->dev, "%s vpss probed\n", oper_cfg.vpss_name); 384 dev_info(&pdev->dev, "%s vpss probed\n", platform_name);
212 oper_cfg.r1 = platform_get_resource(pdev, IORESOURCE_MEM, 0); 385 r1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
213 if (!oper_cfg.r1) 386 if (!r1)
214 return -ENOENT; 387 return -ENOENT;
215 388
216 oper_cfg.len1 = oper_cfg.r1->end - oper_cfg.r1->start + 1; 389 r1 = request_mem_region(r1->start, resource_size(r1), r1->name);
217 390 if (!r1)
218 oper_cfg.r1 = request_mem_region(oper_cfg.r1->start, oper_cfg.len1,
219 oper_cfg.r1->name);
220 if (!oper_cfg.r1)
221 return -EBUSY; 391 return -EBUSY;
222 392
223 oper_cfg.vpss_bl_regs_base = ioremap(oper_cfg.r1->start, oper_cfg.len1); 393 oper_cfg.vpss_regs_base0 = ioremap(r1->start, resource_size(r1));
224 if (!oper_cfg.vpss_bl_regs_base) { 394 if (!oper_cfg.vpss_regs_base0) {
225 status = -EBUSY; 395 status = -EBUSY;
226 goto fail1; 396 goto fail1;
227 } 397 }
228 398
229 if (dm355) { 399 if (oper_cfg.platform == DM355 || oper_cfg.platform == DM365) {
230 oper_cfg.r2 = platform_get_resource(pdev, IORESOURCE_MEM, 1); 400 r2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
231 if (!oper_cfg.r2) { 401 if (!r2) {
232 status = -ENOENT; 402 status = -ENOENT;
233 goto fail2; 403 goto fail2;
234 } 404 }
235 oper_cfg.len2 = oper_cfg.r2->end - oper_cfg.r2->start + 1; 405 r2 = request_mem_region(r2->start, resource_size(r2), r2->name);
236 oper_cfg.r2 = request_mem_region(oper_cfg.r2->start, 406 if (!r2) {
237 oper_cfg.len2,
238 oper_cfg.r2->name);
239 if (!oper_cfg.r2) {
240 status = -EBUSY; 407 status = -EBUSY;
241 goto fail2; 408 goto fail2;
242 } 409 }
243 410
244 oper_cfg.vpss_regs_base = ioremap(oper_cfg.r2->start, 411 oper_cfg.vpss_regs_base1 = ioremap(r2->start,
245 oper_cfg.len2); 412 resource_size(r2));
246 if (!oper_cfg.vpss_regs_base) { 413 if (!oper_cfg.vpss_regs_base1) {
247 status = -EBUSY; 414 status = -EBUSY;
248 goto fail3; 415 goto fail3;
249 } 416 }
250 } 417 }
251 418
252 if (dm355) { 419 if (oper_cfg.platform == DM355) {
253 oper_cfg.hw_ops.enable_clock = dm355_enable_clock; 420 oper_cfg.hw_ops.enable_clock = dm355_enable_clock;
254 oper_cfg.hw_ops.select_ccdc_source = dm355_select_ccdc_source; 421 oper_cfg.hw_ops.select_ccdc_source = dm355_select_ccdc_source;
422 /* Setup vpss interrupts */
423 bl_regw(DM355_VPSSBL_INTSEL_DEFAULT, DM355_VPSSBL_INTSEL);
424 bl_regw(DM355_VPSSBL_EVTSEL_DEFAULT, DM355_VPSSBL_EVTSEL);
425 } else if (oper_cfg.platform == DM365) {
426 oper_cfg.hw_ops.enable_clock = dm365_enable_clock;
427 oper_cfg.hw_ops.select_ccdc_source = dm365_select_ccdc_source;
428 /* Setup vpss interrupts */
429 isp5_write(DM365_ISP5_INTSEL1_DEFAULT, DM365_ISP5_INTSEL1);
430 isp5_write(DM365_ISP5_INTSEL2_DEFAULT, DM365_ISP5_INTSEL2);
431 isp5_write(DM365_ISP5_INTSEL3_DEFAULT, DM365_ISP5_INTSEL3);
255 } else 432 } else
256 oper_cfg.hw_ops.clear_wbl_overflow = dm644x_clear_wbl_overflow; 433 oper_cfg.hw_ops.clear_wbl_overflow = dm644x_clear_wbl_overflow;
257 434
258 spin_lock_init(&oper_cfg.vpss_lock); 435 spin_lock_init(&oper_cfg.vpss_lock);
259 dev_info(&pdev->dev, "%s vpss probe success\n", oper_cfg.vpss_name); 436 dev_info(&pdev->dev, "%s vpss probe success\n", platform_name);
260 return 0; 437 return 0;
261 438
262fail3: 439fail3:
263 release_mem_region(oper_cfg.r2->start, oper_cfg.len2); 440 release_mem_region(r2->start, resource_size(r2));
264fail2: 441fail2:
265 iounmap(oper_cfg.vpss_bl_regs_base); 442 iounmap(oper_cfg.vpss_regs_base0);
266fail1: 443fail1:
267 release_mem_region(oper_cfg.r1->start, oper_cfg.len1); 444 release_mem_region(r1->start, resource_size(r1));
268 return status; 445 return status;
269} 446}
270 447
271static int __devexit vpss_remove(struct platform_device *pdev) 448static int __devexit vpss_remove(struct platform_device *pdev)
272{ 449{
273 iounmap(oper_cfg.vpss_bl_regs_base); 450 struct resource *res;
274 release_mem_region(oper_cfg.r1->start, oper_cfg.len1); 451
275 if (!strcmp(oper_cfg.vpss_name, "dm355_vpss")) { 452 iounmap(oper_cfg.vpss_regs_base0);
276 iounmap(oper_cfg.vpss_regs_base); 453 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
277 release_mem_region(oper_cfg.r2->start, oper_cfg.len2); 454 release_mem_region(res->start, resource_size(res));
455 if (oper_cfg.platform == DM355 || oper_cfg.platform == DM365) {
456 iounmap(oper_cfg.vpss_regs_base1);
457 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
458 release_mem_region(res->start, resource_size(res));
278 } 459 }
279 return 0; 460 return 0;
280} 461}
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c
index 25100001ffff..ecbcefb08739 100644
--- a/drivers/media/video/em28xx/em28xx-cards.c
+++ b/drivers/media/video/em28xx/em28xx-cards.c
@@ -232,6 +232,12 @@ static struct em28xx_reg_seq vc211a_enable[] = {
232 { -1, -1, -1, -1}, 232 { -1, -1, -1, -1},
233}; 233};
234 234
235static struct em28xx_reg_seq dikom_dk300_digital[] = {
236 {EM28XX_R08_GPIO, 0x6e, ~EM_GPIO_4, 10},
237 {EM2880_R04_GPO, 0x08, 0xff, 10},
238 { -1, -1, -1, -1},
239};
240
235 241
236/* 242/*
237 * Board definitions 243 * Board definitions
@@ -461,21 +467,30 @@ struct em28xx_board em28xx_boards[] = {
461 .name = "Leadtek Winfast USB II Deluxe", 467 .name = "Leadtek Winfast USB II Deluxe",
462 .valid = EM28XX_BOARD_NOT_VALIDATED, 468 .valid = EM28XX_BOARD_NOT_VALIDATED,
463 .tuner_type = TUNER_PHILIPS_FM1216ME_MK3, 469 .tuner_type = TUNER_PHILIPS_FM1216ME_MK3,
464 .tda9887_conf = TDA9887_PRESENT, 470 .has_ir_i2c = 1,
471 .tvaudio_addr = 0x58,
472 .tda9887_conf = TDA9887_PRESENT |
473 TDA9887_PORT2_ACTIVE |
474 TDA9887_QSS,
465 .decoder = EM28XX_SAA711X, 475 .decoder = EM28XX_SAA711X,
476 .adecoder = EM28XX_TVAUDIO,
466 .input = { { 477 .input = { {
467 .type = EM28XX_VMUX_TELEVISION, 478 .type = EM28XX_VMUX_TELEVISION,
468 .vmux = SAA7115_COMPOSITE2, 479 .vmux = SAA7115_COMPOSITE4,
469 .amux = EM28XX_AMUX_VIDEO, 480 .amux = EM28XX_AMUX_AUX,
470 }, { 481 }, {
471 .type = EM28XX_VMUX_COMPOSITE1, 482 .type = EM28XX_VMUX_COMPOSITE1,
472 .vmux = SAA7115_COMPOSITE0, 483 .vmux = SAA7115_COMPOSITE5,
473 .amux = EM28XX_AMUX_LINE_IN, 484 .amux = EM28XX_AMUX_LINE_IN,
474 }, { 485 }, {
475 .type = EM28XX_VMUX_SVIDEO, 486 .type = EM28XX_VMUX_SVIDEO,
476 .vmux = SAA7115_COMPOSITE0, 487 .vmux = SAA7115_SVIDEO3,
477 .amux = EM28XX_AMUX_LINE_IN, 488 .amux = EM28XX_AMUX_LINE_IN,
478 } }, 489 } },
490 .radio = {
491 .type = EM28XX_RADIO,
492 .amux = EM28XX_AMUX_AUX,
493 }
479 }, 494 },
480 [EM2820_BOARD_VIDEOLOGY_20K14XUSB] = { 495 [EM2820_BOARD_VIDEOLOGY_20K14XUSB] = {
481 .name = "Videology 20K14XUSB USB2.0", 496 .name = "Videology 20K14XUSB USB2.0",
@@ -730,11 +745,12 @@ struct em28xx_board em28xx_boards[] = {
730 745
731 [EM2880_BOARD_TERRATEC_HYBRID_XS_FR] = { 746 [EM2880_BOARD_TERRATEC_HYBRID_XS_FR] = {
732 .name = "Terratec Hybrid XS Secam", 747 .name = "Terratec Hybrid XS Secam",
733 .valid = EM28XX_BOARD_NOT_VALIDATED,
734 .has_msp34xx = 1, 748 .has_msp34xx = 1,
735 .tuner_type = TUNER_XC2028, 749 .tuner_type = TUNER_XC2028,
736 .tuner_gpio = default_tuner_gpio, 750 .tuner_gpio = default_tuner_gpio,
737 .decoder = EM28XX_TVP5150, 751 .decoder = EM28XX_TVP5150,
752 .has_dvb = 1,
753 .dvb_gpio = default_digital,
738 .input = { { 754 .input = { {
739 .type = EM28XX_VMUX_TELEVISION, 755 .type = EM28XX_VMUX_TELEVISION,
740 .vmux = TVP5150_COMPOSITE0, 756 .vmux = TVP5150_COMPOSITE0,
@@ -1265,6 +1281,7 @@ struct em28xx_board em28xx_boards[] = {
1265 .decoder = EM28XX_SAA711X, 1281 .decoder = EM28XX_SAA711X,
1266 .has_dvb = 1, 1282 .has_dvb = 1,
1267 .dvb_gpio = em2882_kworld_315u_digital, 1283 .dvb_gpio = em2882_kworld_315u_digital,
1284 .ir_codes = &ir_codes_kworld_315u_table,
1268 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, 1285 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
1269 .i2c_speed = EM28XX_I2C_CLK_WAIT_ENABLE, 1286 .i2c_speed = EM28XX_I2C_CLK_WAIT_ENABLE,
1270 /* Analog mode - still not ready */ 1287 /* Analog mode - still not ready */
@@ -1431,6 +1448,21 @@ struct em28xx_board em28xx_boards[] = {
1431 .gpio = hauppauge_wintv_hvr_900_analog, 1448 .gpio = hauppauge_wintv_hvr_900_analog,
1432 } }, 1449 } },
1433 }, 1450 },
1451 [EM2882_BOARD_DIKOM_DK300] = {
1452 .name = "Dikom DK300",
1453 .tuner_type = TUNER_XC2028,
1454 .tuner_gpio = default_tuner_gpio,
1455 .decoder = EM28XX_TVP5150,
1456 .mts_firmware = 1,
1457 .has_dvb = 1,
1458 .dvb_gpio = dikom_dk300_digital,
1459 .input = { {
1460 .type = EM28XX_VMUX_TELEVISION,
1461 .vmux = TVP5150_COMPOSITE0,
1462 .amux = EM28XX_AMUX_VIDEO,
1463 .gpio = default_analog,
1464 } },
1465 },
1434 [EM2883_BOARD_KWORLD_HYBRID_330U] = { 1466 [EM2883_BOARD_KWORLD_HYBRID_330U] = {
1435 .name = "Kworld PlusTV HD Hybrid 330", 1467 .name = "Kworld PlusTV HD Hybrid 330",
1436 .tuner_type = TUNER_XC2028, 1468 .tuner_type = TUNER_XC2028,
@@ -1751,6 +1783,7 @@ static struct em28xx_hash_table em28xx_eeprom_hash[] = {
1751 {0xcee44a99, EM2882_BOARD_EVGA_INDTUBE, TUNER_XC2028}, 1783 {0xcee44a99, EM2882_BOARD_EVGA_INDTUBE, TUNER_XC2028},
1752 {0xb8846b20, EM2881_BOARD_PINNACLE_HYBRID_PRO, TUNER_XC2028}, 1784 {0xb8846b20, EM2881_BOARD_PINNACLE_HYBRID_PRO, TUNER_XC2028},
1753 {0x63f653bd, EM2870_BOARD_REDDO_DVB_C_USB_BOX, TUNER_ABSENT}, 1785 {0x63f653bd, EM2870_BOARD_REDDO_DVB_C_USB_BOX, TUNER_ABSENT},
1786 {0x4e913442, EM2882_BOARD_DIKOM_DK300, TUNER_XC2028},
1754}; 1787};
1755 1788
1756/* I2C devicelist hash table for devices with generic USB IDs */ 1789/* I2C devicelist hash table for devices with generic USB IDs */
@@ -2103,6 +2136,7 @@ static void em28xx_setup_xc3028(struct em28xx *dev, struct xc2028_ctrl *ctl)
2103 ctl->demod = XC3028_FE_DEFAULT; 2136 ctl->demod = XC3028_FE_DEFAULT;
2104 break; 2137 break;
2105 case EM2883_BOARD_KWORLD_HYBRID_330U: 2138 case EM2883_BOARD_KWORLD_HYBRID_330U:
2139 case EM2882_BOARD_DIKOM_DK300:
2106 ctl->demod = XC3028_FE_CHINA; 2140 ctl->demod = XC3028_FE_CHINA;
2107 ctl->fname = XC2028_DEFAULT_FIRMWARE; 2141 ctl->fname = XC2028_DEFAULT_FIRMWARE;
2108 break; 2142 break;
@@ -2259,9 +2293,12 @@ static int em28xx_hint_board(struct em28xx *dev)
2259/* ----------------------------------------------------------------------- */ 2293/* ----------------------------------------------------------------------- */
2260void em28xx_register_i2c_ir(struct em28xx *dev) 2294void em28xx_register_i2c_ir(struct em28xx *dev)
2261{ 2295{
2296 /* Leadtek winfast tv USBII deluxe can find a non working IR-device */
2297 /* at address 0x18, so if that address is needed for another board in */
2298 /* the future, please put it after 0x1f. */
2262 struct i2c_board_info info; 2299 struct i2c_board_info info;
2263 const unsigned short addr_list[] = { 2300 const unsigned short addr_list[] = {
2264 0x30, 0x47, I2C_CLIENT_END 2301 0x1f, 0x30, 0x47, I2C_CLIENT_END
2265 }; 2302 };
2266 2303
2267 if (disable_ir) 2304 if (disable_ir)
@@ -2288,6 +2325,10 @@ void em28xx_register_i2c_ir(struct em28xx *dev)
2288 dev->init_data.ir_codes = &ir_codes_rc5_hauppauge_new_table; 2325 dev->init_data.ir_codes = &ir_codes_rc5_hauppauge_new_table;
2289 dev->init_data.get_key = em28xx_get_key_em_haup; 2326 dev->init_data.get_key = em28xx_get_key_em_haup;
2290 dev->init_data.name = "i2c IR (EM2840 Hauppauge)"; 2327 dev->init_data.name = "i2c IR (EM2840 Hauppauge)";
2328 case EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE:
2329 dev->init_data.ir_codes = &ir_codes_winfast_usbii_deluxe_table;;
2330 dev->init_data.get_key = em28xx_get_key_winfast_usbii_deluxe;
2331 dev->init_data.name = "i2c IR (EM2820 Winfast TV USBII Deluxe)";
2291 break; 2332 break;
2292 } 2333 }
2293 2334
@@ -2381,6 +2422,31 @@ void em28xx_card_setup(struct em28xx *dev)
2381 em28xx_gpio_set(dev, dev->board.tuner_gpio); 2422 em28xx_gpio_set(dev, dev->board.tuner_gpio);
2382 em28xx_set_mode(dev, EM28XX_ANALOG_MODE); 2423 em28xx_set_mode(dev, EM28XX_ANALOG_MODE);
2383 break; 2424 break;
2425
2426/*
2427 * The Dikom DK300 is detected as an Kworld VS-DVB-T 323UR.
2428 *
2429 * This occurs because they share identical USB vendor and
2430 * product IDs.
2431 *
2432 * What we do here is look up the EEPROM hash of the Dikom
2433 * and if it is found then we decide that we do not have
2434 * a Kworld and reset the device to the Dikom instead.
2435 *
2436 * This solution is only valid if they do not share eeprom
2437 * hash identities which has not been determined as yet.
2438 */
2439 case EM2882_BOARD_KWORLD_VS_DVBT:
2440 if (!em28xx_hint_board(dev))
2441 em28xx_set_model(dev);
2442
2443 /* In cases where we had to use a board hint, the call to
2444 em28xx_set_mode() in em28xx_pre_card_setup() was a no-op,
2445 so make the call now so the analog GPIOs are set properly
2446 before probing the i2c bus. */
2447 em28xx_gpio_set(dev, dev->board.tuner_gpio);
2448 em28xx_set_mode(dev, EM28XX_ANALOG_MODE);
2449 break;
2384 } 2450 }
2385 2451
2386#if defined(CONFIG_MODULES) && defined(MODULE) 2452#if defined(CONFIG_MODULES) && defined(MODULE)
diff --git a/drivers/media/video/em28xx/em28xx-core.c b/drivers/media/video/em28xx/em28xx-core.c
index b311d4514bdf..5a37eccbd7d6 100644
--- a/drivers/media/video/em28xx/em28xx-core.c
+++ b/drivers/media/video/em28xx/em28xx-core.c
@@ -691,9 +691,15 @@ int em28xx_set_outfmt(struct em28xx *dev)
691 if (em28xx_vbi_supported(dev) == 1) { 691 if (em28xx_vbi_supported(dev) == 1) {
692 vinctrl |= EM28XX_VINCTRL_VBI_RAW; 692 vinctrl |= EM28XX_VINCTRL_VBI_RAW;
693 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00); 693 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
694 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09); 694 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, dev->vbi_width/4);
695 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, 0xb4); 695 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, dev->vbi_height);
696 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, 0x0c); 696 if (dev->norm & V4L2_STD_525_60) {
697 /* NTSC */
698 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
699 } else if (dev->norm & V4L2_STD_625_50) {
700 /* PAL */
701 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x07);
702 }
697 } 703 }
698 704
699 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl); 705 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
@@ -760,6 +766,13 @@ int em28xx_resolution_set(struct em28xx *dev)
760 width = norm_maxw(dev); 766 width = norm_maxw(dev);
761 height = norm_maxh(dev); 767 height = norm_maxh(dev);
762 768
769 /* Properly setup VBI */
770 dev->vbi_width = 720;
771 if (dev->norm & V4L2_STD_525_60)
772 dev->vbi_height = 12;
773 else
774 dev->vbi_height = 18;
775
763 if (!dev->progressive) 776 if (!dev->progressive)
764 height >>= norm_maxh(dev); 777 height >>= norm_maxh(dev);
765 778
diff --git a/drivers/media/video/em28xx/em28xx-dvb.c b/drivers/media/video/em28xx/em28xx-dvb.c
index cc0505eb900f..1b96356b3ab2 100644
--- a/drivers/media/video/em28xx/em28xx-dvb.c
+++ b/drivers/media/video/em28xx/em28xx-dvb.c
@@ -502,7 +502,9 @@ static int dvb_init(struct em28xx *dev)
502 } 502 }
503 break; 503 break;
504 case EM2880_BOARD_TERRATEC_HYBRID_XS: 504 case EM2880_BOARD_TERRATEC_HYBRID_XS:
505 case EM2880_BOARD_TERRATEC_HYBRID_XS_FR:
505 case EM2881_BOARD_PINNACLE_HYBRID_PRO: 506 case EM2881_BOARD_PINNACLE_HYBRID_PRO:
507 case EM2882_BOARD_DIKOM_DK300:
506 dvb->frontend = dvb_attach(zl10353_attach, 508 dvb->frontend = dvb_attach(zl10353_attach,
507 &em28xx_zl10353_xc3028_no_i2c_gate, 509 &em28xx_zl10353_xc3028_no_i2c_gate,
508 &dev->i2c_adap); 510 &dev->i2c_adap);
@@ -606,6 +608,7 @@ static int dvb_fini(struct em28xx *dev)
606 608
607 if (dev->dvb) { 609 if (dev->dvb) {
608 unregister_dvb(dev->dvb); 610 unregister_dvb(dev->dvb);
611 kfree(dev->dvb);
609 dev->dvb = NULL; 612 dev->dvb = NULL;
610 } 613 }
611 614
diff --git a/drivers/media/video/em28xx/em28xx-input.c b/drivers/media/video/em28xx/em28xx-input.c
index af0d935c29be..1fb754e20875 100644
--- a/drivers/media/video/em28xx/em28xx-input.c
+++ b/drivers/media/video/em28xx/em28xx-input.c
@@ -75,6 +75,10 @@ struct em28xx_IR {
75 unsigned int repeat_interval; 75 unsigned int repeat_interval;
76 76
77 int (*get_key)(struct em28xx_IR *, struct em28xx_ir_poll_result *); 77 int (*get_key)(struct em28xx_IR *, struct em28xx_ir_poll_result *);
78
79 /* IR device properties */
80
81 struct ir_dev_props props;
78}; 82};
79 83
80/********************************************************** 84/**********************************************************
@@ -180,6 +184,36 @@ int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
180 return 1; 184 return 1;
181} 185}
182 186
187int em28xx_get_key_winfast_usbii_deluxe(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
188{
189 unsigned char subaddr, keydetect, key;
190
191 struct i2c_msg msg[] = { { .addr = ir->c->addr, .flags = 0, .buf = &subaddr, .len = 1},
192
193 { .addr = ir->c->addr, .flags = I2C_M_RD, .buf = &keydetect, .len = 1} };
194
195 subaddr = 0x10;
196 if (2 != i2c_transfer(ir->c->adapter, msg, 2)) {
197 i2cdprintk("read error\n");
198 return -EIO;
199 }
200 if (keydetect == 0x00)
201 return 0;
202
203 subaddr = 0x00;
204 msg[1].buf = &key;
205 if (2 != i2c_transfer(ir->c->adapter, msg, 2)) {
206 i2cdprintk("read error\n");
207 return -EIO;
208 }
209 if (key == 0x00)
210 return 0;
211
212 *ir_key = key;
213 *ir_raw = key;
214 return 1;
215}
216
183/********************************************************** 217/**********************************************************
184 Poll based get keycode functions 218 Poll based get keycode functions
185 **********************************************************/ 219 **********************************************************/
@@ -336,35 +370,28 @@ static void em28xx_ir_stop(struct em28xx_IR *ir)
336 cancel_delayed_work_sync(&ir->work); 370 cancel_delayed_work_sync(&ir->work);
337} 371}
338 372
339int em28xx_ir_init(struct em28xx *dev) 373int em28xx_ir_change_protocol(void *priv, u64 ir_type)
340{ 374{
341 struct em28xx_IR *ir; 375 int rc = 0;
342 struct input_dev *input_dev; 376 struct em28xx_IR *ir = priv;
343 u8 ir_config; 377 struct em28xx *dev = ir->dev;
344 int err = -ENOMEM; 378 u8 ir_config = EM2874_IR_RC5;
345
346 if (dev->board.ir_codes == NULL) {
347 /* No remote control support */
348 return 0;
349 }
350
351 ir = kzalloc(sizeof(*ir), GFP_KERNEL);
352 input_dev = input_allocate_device();
353 if (!ir || !input_dev)
354 goto err_out_free;
355
356 ir->input = input_dev;
357 ir_config = EM2874_IR_RC5;
358 379
359 /* Adjust xclk based o IR table for RC5/NEC tables */ 380 /* Adjust xclk based o IR table for RC5/NEC tables */
360 if (dev->board.ir_codes->ir_type == IR_TYPE_RC5) { 381
382 dev->board.ir_codes->ir_type = IR_TYPE_OTHER;
383 if (ir_type == IR_TYPE_RC5) {
361 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE; 384 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE;
362 ir->full_code = 1; 385 ir->full_code = 1;
363 } else if (dev->board.ir_codes->ir_type == IR_TYPE_NEC) { 386 } else if (ir_type == IR_TYPE_NEC) {
364 dev->board.xclk &= ~EM28XX_XCLK_IR_RC5_MODE; 387 dev->board.xclk &= ~EM28XX_XCLK_IR_RC5_MODE;
365 ir_config = EM2874_IR_NEC; 388 ir_config = EM2874_IR_NEC;
366 ir->full_code = 1; 389 ir->full_code = 1;
367 } 390 } else
391 rc = -EINVAL;
392
393 dev->board.ir_codes->ir_type = ir_type;
394
368 em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, dev->board.xclk, 395 em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, dev->board.xclk,
369 EM28XX_XCLK_IR_RC5_MODE); 396 EM28XX_XCLK_IR_RC5_MODE);
370 397
@@ -380,9 +407,42 @@ int em28xx_ir_init(struct em28xx *dev)
380 break; 407 break;
381 default: 408 default:
382 printk("Unrecognized em28xx chip id: IR not supported\n"); 409 printk("Unrecognized em28xx chip id: IR not supported\n");
383 goto err_out_free; 410 rc = -EINVAL;
411 }
412
413 return rc;
414}
415
416int em28xx_ir_init(struct em28xx *dev)
417{
418 struct em28xx_IR *ir;
419 struct input_dev *input_dev;
420 int err = -ENOMEM;
421
422 if (dev->board.ir_codes == NULL) {
423 /* No remote control support */
424 return 0;
384 } 425 }
385 426
427 ir = kzalloc(sizeof(*ir), GFP_KERNEL);
428 input_dev = input_allocate_device();
429 if (!ir || !input_dev)
430 goto err_out_free;
431
432 /* record handles to ourself */
433 ir->dev = dev;
434 dev->ir = ir;
435
436 ir->input = input_dev;
437
438 /*
439 * em2874 supports more protocols. For now, let's just announce
440 * the two protocols that were already tested
441 */
442 ir->props.allowed_protos = IR_TYPE_RC5 | IR_TYPE_NEC;
443 ir->props.priv = ir;
444 ir->props.change_protocol = em28xx_ir_change_protocol;
445
386 /* This is how often we ask the chip for IR information */ 446 /* This is how often we ask the chip for IR information */
387 ir->polling = 100; /* ms */ 447 ir->polling = 100; /* ms */
388 448
@@ -393,6 +453,8 @@ int em28xx_ir_init(struct em28xx *dev)
393 usb_make_path(dev->udev, ir->phys, sizeof(ir->phys)); 453 usb_make_path(dev->udev, ir->phys, sizeof(ir->phys));
394 strlcat(ir->phys, "/input0", sizeof(ir->phys)); 454 strlcat(ir->phys, "/input0", sizeof(ir->phys));
395 455
456 /* Set IR protocol */
457 em28xx_ir_change_protocol(ir, dev->board.ir_codes->ir_type);
396 err = ir_input_init(input_dev, &ir->ir, IR_TYPE_OTHER); 458 err = ir_input_init(input_dev, &ir->ir, IR_TYPE_OTHER);
397 if (err < 0) 459 if (err < 0)
398 goto err_out_free; 460 goto err_out_free;
@@ -405,14 +467,13 @@ int em28xx_ir_init(struct em28xx *dev)
405 input_dev->id.product = le16_to_cpu(dev->udev->descriptor.idProduct); 467 input_dev->id.product = le16_to_cpu(dev->udev->descriptor.idProduct);
406 468
407 input_dev->dev.parent = &dev->udev->dev; 469 input_dev->dev.parent = &dev->udev->dev;
408 /* record handles to ourself */ 470
409 ir->dev = dev;
410 dev->ir = ir;
411 471
412 em28xx_ir_start(ir); 472 em28xx_ir_start(ir);
413 473
414 /* all done */ 474 /* all done */
415 err = ir_input_register(ir->input, dev->board.ir_codes); 475 err = ir_input_register(ir->input, dev->board.ir_codes,
476 &ir->props);
416 if (err) 477 if (err)
417 goto err_out_stop; 478 goto err_out_stop;
418 479
diff --git a/drivers/media/video/em28xx/em28xx-reg.h b/drivers/media/video/em28xx/em28xx-reg.h
index 058ac87639ce..91e90559642b 100644
--- a/drivers/media/video/em28xx/em28xx-reg.h
+++ b/drivers/media/video/em28xx/em28xx-reg.h
@@ -173,8 +173,8 @@
173/* em2874 IR config register (0x50) */ 173/* em2874 IR config register (0x50) */
174#define EM2874_IR_NEC 0x00 174#define EM2874_IR_NEC 0x00
175#define EM2874_IR_RC5 0x04 175#define EM2874_IR_RC5 0x04
176#define EM2874_IR_RC5_MODE_0 0x08 176#define EM2874_IR_RC6_MODE_0 0x08
177#define EM2874_IR_RC5_MODE_6A 0x0b 177#define EM2874_IR_RC6_MODE_6A 0x0b
178 178
179/* em2874 Transport Stream Enable Register (0x5f) */ 179/* em2874 Transport Stream Enable Register (0x5f) */
180#define EM2874_TS1_CAPTURE_ENABLE (1 << 0) 180#define EM2874_TS1_CAPTURE_ENABLE (1 << 0)
diff --git a/drivers/media/video/em28xx/em28xx-vbi.c b/drivers/media/video/em28xx/em28xx-vbi.c
index 94943e5a1529..c7dce39823d8 100644
--- a/drivers/media/video/em28xx/em28xx-vbi.c
+++ b/drivers/media/video/em28xx/em28xx-vbi.c
@@ -71,7 +71,11 @@ free_buffer(struct videobuf_queue *vq, struct em28xx_buffer *buf)
71static int 71static int
72vbi_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size) 72vbi_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
73{ 73{
74 *size = 720 * 12 * 2; 74 struct em28xx_fh *fh = q->priv_data;
75 struct em28xx *dev = fh->dev;
76
77 *size = dev->vbi_width * dev->vbi_height * 2;
78
75 if (0 == *count) 79 if (0 == *count)
76 *count = vbibufs; 80 *count = vbibufs;
77 if (*count < 2) 81 if (*count < 2)
@@ -85,19 +89,18 @@ static int
85vbi_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb, 89vbi_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
86 enum v4l2_field field) 90 enum v4l2_field field)
87{ 91{
92 struct em28xx_fh *fh = q->priv_data;
93 struct em28xx *dev = fh->dev;
88 struct em28xx_buffer *buf = container_of(vb, struct em28xx_buffer, vb); 94 struct em28xx_buffer *buf = container_of(vb, struct em28xx_buffer, vb);
89 int rc = 0; 95 int rc = 0;
90 unsigned int size;
91
92 size = 720 * 12 * 2;
93 96
94 buf->vb.size = size; 97 buf->vb.size = dev->vbi_width * dev->vbi_height * 2;
95 98
96 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size) 99 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
97 return -EINVAL; 100 return -EINVAL;
98 101
99 buf->vb.width = 720; 102 buf->vb.width = dev->vbi_width;
100 buf->vb.height = 12; 103 buf->vb.height = dev->vbi_height;
101 buf->vb.field = field; 104 buf->vb.field = field;
102 105
103 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { 106 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c
index 849b18c94037..ac2bd935927e 100644
--- a/drivers/media/video/em28xx/em28xx-video.c
+++ b/drivers/media/video/em28xx/em28xx-video.c
@@ -282,7 +282,7 @@ static void em28xx_copy_vbi(struct em28xx *dev,
282{ 282{
283 void *startwrite, *startread; 283 void *startwrite, *startread;
284 int offset; 284 int offset;
285 int bytesperline = 720; 285 int bytesperline = dev->vbi_width;
286 286
287 if (dev == NULL) { 287 if (dev == NULL) {
288 em28xx_isocdbg("dev is null\n"); 288 em28xx_isocdbg("dev is null\n");
@@ -323,8 +323,8 @@ static void em28xx_copy_vbi(struct em28xx *dev,
323 323
324 /* Make sure the bottom field populates the second half of the frame */ 324 /* Make sure the bottom field populates the second half of the frame */
325 if (buf->top_field == 0) { 325 if (buf->top_field == 0) {
326 startwrite += bytesperline * 0x0c; 326 startwrite += bytesperline * dev->vbi_height;
327 offset += bytesperline * 0x0c; 327 offset += bytesperline * dev->vbi_height;
328 } 328 }
329 329
330 memcpy(startwrite, startread, len); 330 memcpy(startwrite, startread, len);
@@ -578,8 +578,7 @@ static inline int em28xx_isoc_copy_vbi(struct em28xx *dev, struct urb *urb)
578 dev->cur_field = p[2]; 578 dev->cur_field = p[2];
579 } 579 }
580 580
581 /* FIXME: get rid of hard-coded value */ 581 vbi_size = dev->vbi_width * dev->vbi_height;
582 vbi_size = 720 * 0x0c;
583 582
584 if (dev->capture_type == 0) { 583 if (dev->capture_type == 0) {
585 if (dev->vbi_read >= vbi_size) { 584 if (dev->vbi_read >= vbi_size) {
@@ -1850,18 +1849,27 @@ static int vidioc_try_set_sliced_vbi_cap(struct file *file, void *priv,
1850static int vidioc_g_fmt_vbi_cap(struct file *file, void *priv, 1849static int vidioc_g_fmt_vbi_cap(struct file *file, void *priv,
1851 struct v4l2_format *format) 1850 struct v4l2_format *format)
1852{ 1851{
1853 format->fmt.vbi.samples_per_line = 720; 1852 struct em28xx_fh *fh = priv;
1853 struct em28xx *dev = fh->dev;
1854
1855 format->fmt.vbi.samples_per_line = dev->vbi_width;
1854 format->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY; 1856 format->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
1855 format->fmt.vbi.offset = 0; 1857 format->fmt.vbi.offset = 0;
1856 format->fmt.vbi.flags = 0; 1858 format->fmt.vbi.flags = 0;
1859 format->fmt.vbi.sampling_rate = 6750000 * 4 / 2;
1860 format->fmt.vbi.count[0] = dev->vbi_height;
1861 format->fmt.vbi.count[1] = dev->vbi_height;
1857 1862
1858 /* Varies by video standard (NTSC, PAL, etc.) */ 1863 /* Varies by video standard (NTSC, PAL, etc.) */
1859 /* FIXME: hard-coded for NTSC support */ 1864 if (dev->norm & V4L2_STD_525_60) {
1860 format->fmt.vbi.sampling_rate = 6750000 * 4 / 2; /* FIXME: ??? */ 1865 /* NTSC */
1861 format->fmt.vbi.count[0] = 12; 1866 format->fmt.vbi.start[0] = 10;
1862 format->fmt.vbi.count[1] = 12; 1867 format->fmt.vbi.start[1] = 273;
1863 format->fmt.vbi.start[0] = 10; 1868 } else if (dev->norm & V4L2_STD_625_50) {
1864 format->fmt.vbi.start[1] = 273; 1869 /* PAL */
1870 format->fmt.vbi.start[0] = 6;
1871 format->fmt.vbi.start[1] = 318;
1872 }
1865 1873
1866 return 0; 1874 return 0;
1867} 1875}
@@ -1869,18 +1877,27 @@ static int vidioc_g_fmt_vbi_cap(struct file *file, void *priv,
1869static int vidioc_s_fmt_vbi_cap(struct file *file, void *priv, 1877static int vidioc_s_fmt_vbi_cap(struct file *file, void *priv,
1870 struct v4l2_format *format) 1878 struct v4l2_format *format)
1871{ 1879{
1872 format->fmt.vbi.samples_per_line = 720; 1880 struct em28xx_fh *fh = priv;
1881 struct em28xx *dev = fh->dev;
1882
1883 format->fmt.vbi.samples_per_line = dev->vbi_width;
1873 format->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY; 1884 format->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
1874 format->fmt.vbi.offset = 0; 1885 format->fmt.vbi.offset = 0;
1875 format->fmt.vbi.flags = 0; 1886 format->fmt.vbi.flags = 0;
1887 format->fmt.vbi.sampling_rate = 6750000 * 4 / 2;
1888 format->fmt.vbi.count[0] = dev->vbi_height;
1889 format->fmt.vbi.count[1] = dev->vbi_height;
1876 1890
1877 /* Varies by video standard (NTSC, PAL, etc.) */ 1891 /* Varies by video standard (NTSC, PAL, etc.) */
1878 /* FIXME: hard-coded for NTSC support */ 1892 if (dev->norm & V4L2_STD_525_60) {
1879 format->fmt.vbi.sampling_rate = 6750000 * 4 / 2; /* FIXME: ??? */ 1893 /* NTSC */
1880 format->fmt.vbi.count[0] = 12; 1894 format->fmt.vbi.start[0] = 10;
1881 format->fmt.vbi.count[1] = 12; 1895 format->fmt.vbi.start[1] = 273;
1882 format->fmt.vbi.start[0] = 10; 1896 } else if (dev->norm & V4L2_STD_625_50) {
1883 format->fmt.vbi.start[1] = 273; 1897 /* PAL */
1898 format->fmt.vbi.start[0] = 6;
1899 format->fmt.vbi.start[1] = 318;
1900 }
1884 1901
1885 return 0; 1902 return 0;
1886} 1903}
@@ -1922,7 +1939,8 @@ static int vidioc_querybuf(struct file *file, void *priv,
1922 At a minimum, it causes a crash in zvbi since it does 1939 At a minimum, it causes a crash in zvbi since it does
1923 a memcpy based on the source buffer length */ 1940 a memcpy based on the source buffer length */
1924 int result = videobuf_querybuf(&fh->vb_vbiq, b); 1941 int result = videobuf_querybuf(&fh->vb_vbiq, b);
1925 b->length = 17280; 1942 b->length = dev->vbi_width * dev->vbi_height * 2;
1943
1926 return result; 1944 return result;
1927 } 1945 }
1928} 1946}
diff --git a/drivers/media/video/em28xx/em28xx.h b/drivers/media/video/em28xx/em28xx.h
index 80d9b4fa1b97..ba6fe5daff84 100644
--- a/drivers/media/video/em28xx/em28xx.h
+++ b/drivers/media/video/em28xx/em28xx.h
@@ -111,6 +111,7 @@
111#define EM2861_BOARD_GADMEI_UTV330PLUS 72 111#define EM2861_BOARD_GADMEI_UTV330PLUS 72
112#define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73 112#define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73
113#define EM2800_BOARD_VC211A 74 113#define EM2800_BOARD_VC211A 74
114#define EM2882_BOARD_DIKOM_DK300 75
114 115
115/* Limits minimum and default number of buffers */ 116/* Limits minimum and default number of buffers */
116#define EM28XX_MIN_BUF 4 117#define EM28XX_MIN_BUF 4
@@ -552,7 +553,8 @@ struct em28xx {
552 int capture_type; 553 int capture_type;
553 int vbi_read; 554 int vbi_read;
554 unsigned char cur_field; 555 unsigned char cur_field;
555 556 unsigned int vbi_width;
557 unsigned int vbi_height; /* lines per field */
556 558
557 struct work_struct request_module_wk; 559 struct work_struct request_module_wk;
558 560
@@ -693,6 +695,8 @@ int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
693int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); 695int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
694int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key, 696int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
695 u32 *ir_raw); 697 u32 *ir_raw);
698int em28xx_get_key_winfast_usbii_deluxe(struct IR_i2c *ir, u32 *ir_key,
699 u32 *ir_raw);
696void em28xx_register_snapshot_button(struct em28xx *dev); 700void em28xx_register_snapshot_button(struct em28xx *dev);
697void em28xx_deregister_snapshot_button(struct em28xx *dev); 701void em28xx_deregister_snapshot_button(struct em28xx *dev);
698 702
diff --git a/drivers/media/video/et61x251/Kconfig b/drivers/media/video/et61x251/Kconfig
index dcc1a0335440..87981b078fe6 100644
--- a/drivers/media/video/et61x251/Kconfig
+++ b/drivers/media/video/et61x251/Kconfig
@@ -1,7 +1,11 @@
1config USB_ET61X251 1config USB_ET61X251
2 tristate "USB ET61X[12]51 PC Camera Controller support" 2 tristate "USB ET61X[12]51 PC Camera Controller support (DEPRECATED)"
3 depends on VIDEO_V4L2 3 depends on VIDEO_V4L2
4 default n
4 ---help--- 5 ---help---
6 This driver is DEPRECATED please use the gspca zc3xx module
7 instead.
8
5 Say Y here if you want support for cameras based on Etoms ET61X151 9 Say Y here if you want support for cameras based on Etoms ET61X151
6 or ET61X251 PC Camera Controllers. 10 or ET61X251 PC Camera Controllers.
7 11
diff --git a/drivers/media/video/gspca/Kconfig b/drivers/media/video/gspca/Kconfig
index 609d65b0b10d..e0060c1f0544 100644
--- a/drivers/media/video/gspca/Kconfig
+++ b/drivers/media/video/gspca/Kconfig
@@ -21,6 +21,15 @@ source "drivers/media/video/gspca/m5602/Kconfig"
21source "drivers/media/video/gspca/stv06xx/Kconfig" 21source "drivers/media/video/gspca/stv06xx/Kconfig"
22source "drivers/media/video/gspca/gl860/Kconfig" 22source "drivers/media/video/gspca/gl860/Kconfig"
23 23
24config USB_GSPCA_BENQ
25 tristate "Benq USB Camera Driver"
26 depends on VIDEO_V4L2 && USB_GSPCA
27 help
28 Say Y here if you want support for the Benq DC E300 camera.
29
30 To compile this driver as a module, choose M here: the
31 module will be called gspca_benq.
32
24config USB_GSPCA_CONEX 33config USB_GSPCA_CONEX
25 tristate "Conexant Camera Driver" 34 tristate "Conexant Camera Driver"
26 depends on VIDEO_V4L2 && USB_GSPCA 35 depends on VIDEO_V4L2 && USB_GSPCA
@@ -30,6 +39,17 @@ config USB_GSPCA_CONEX
30 To compile this driver as a module, choose M here: the 39 To compile this driver as a module, choose M here: the
31 module will be called gspca_conex. 40 module will be called gspca_conex.
32 41
42config USB_GSPCA_CPIA1
43 tristate "cpia CPiA (version 1) Camera Driver"
44 depends on VIDEO_V4L2 && USB_GSPCA
45 help
46 Say Y here if you want support for USB cameras based on the cpia
47 CPiA chip. Note that you need atleast version 0.6.4 of libv4l for
48 applications to understand the videoformat generated by this driver.
49
50 To compile this driver as a module, choose M here: the
51 module will be called gspca_cpia1.
52
33config USB_GSPCA_ETOMS 53config USB_GSPCA_ETOMS
34 tristate "Etoms USB Camera Driver" 54 tristate "Etoms USB Camera Driver"
35 depends on VIDEO_V4L2 && USB_GSPCA 55 depends on VIDEO_V4L2 && USB_GSPCA
@@ -86,15 +106,25 @@ config USB_GSPCA_OV519
86 module will be called gspca_ov519. 106 module will be called gspca_ov519.
87 107
88config USB_GSPCA_OV534 108config USB_GSPCA_OV534
89 tristate "OV534 USB Camera Driver" 109 tristate "OV534 OV772x USB Camera Driver"
90 depends on VIDEO_V4L2 && USB_GSPCA 110 depends on VIDEO_V4L2 && USB_GSPCA
91 help 111 help
92 Say Y here if you want support for cameras based on the OV534 chip. 112 Say Y here if you want support for cameras based on the OV534 chip
93 (e.g. Sony Playstation EYE) 113 and sensor OV772x (e.g. Sony Playstation EYE)
94 114
95 To compile this driver as a module, choose M here: the 115 To compile this driver as a module, choose M here: the
96 module will be called gspca_ov534. 116 module will be called gspca_ov534.
97 117
118config USB_GSPCA_OV534_9
119 tristate "OV534 OV965x USB Camera Driver"
120 depends on VIDEO_V4L2 && USB_GSPCA
121 help
122 Say Y here if you want support for cameras based on the OV534 chip
123 and sensor OV965x (e.g. Hercules Dualpix)
124
125 To compile this driver as a module, choose M here: the
126 module will be called gspca_ov534_9.
127
98config USB_GSPCA_PAC207 128config USB_GSPCA_PAC207
99 tristate "Pixart PAC207 USB Camera Driver" 129 tristate "Pixart PAC207 USB Camera Driver"
100 depends on VIDEO_V4L2 && USB_GSPCA 130 depends on VIDEO_V4L2 && USB_GSPCA
@@ -122,6 +152,16 @@ config USB_GSPCA_PAC7311
122 To compile this driver as a module, choose M here: the 152 To compile this driver as a module, choose M here: the
123 module will be called gspca_pac7311. 153 module will be called gspca_pac7311.
124 154
155config USB_GSPCA_SN9C2028
156 tristate "SONIX Dual-Mode USB Camera Driver"
157 depends on VIDEO_V4L2 && USB_GSPCA
158 help
159 Say Y here if you want streaming support for Sonix SN9C2028 cameras.
160 These are supported as stillcams in libgphoto2/camlibs/sonix.
161
162 To compile this driver as a module, choose M here: the
163 module will be called gspca_sn9c2028.
164
125config USB_GSPCA_SN9C20X 165config USB_GSPCA_SN9C20X
126 tristate "SN9C20X USB Camera Driver" 166 tristate "SN9C20X USB Camera Driver"
127 depends on VIDEO_V4L2 && USB_GSPCA 167 depends on VIDEO_V4L2 && USB_GSPCA
diff --git a/drivers/media/video/gspca/Makefile b/drivers/media/video/gspca/Makefile
index ff2c7279d82e..6e4cf1ce01c9 100644
--- a/drivers/media/video/gspca/Makefile
+++ b/drivers/media/video/gspca/Makefile
@@ -1,5 +1,7 @@
1obj-$(CONFIG_USB_GSPCA) += gspca_main.o 1obj-$(CONFIG_USB_GSPCA) += gspca_main.o
2obj-$(CONFIG_USB_GSPCA_BENQ) += gspca_benq.o
2obj-$(CONFIG_USB_GSPCA_CONEX) += gspca_conex.o 3obj-$(CONFIG_USB_GSPCA_CONEX) += gspca_conex.o
4obj-$(CONFIG_USB_GSPCA_CPIA1) += gspca_cpia1.o
3obj-$(CONFIG_USB_GSPCA_ETOMS) += gspca_etoms.o 5obj-$(CONFIG_USB_GSPCA_ETOMS) += gspca_etoms.o
4obj-$(CONFIG_USB_GSPCA_FINEPIX) += gspca_finepix.o 6obj-$(CONFIG_USB_GSPCA_FINEPIX) += gspca_finepix.o
5obj-$(CONFIG_USB_GSPCA_JEILINJ) += gspca_jeilinj.o 7obj-$(CONFIG_USB_GSPCA_JEILINJ) += gspca_jeilinj.o
@@ -7,9 +9,11 @@ obj-$(CONFIG_USB_GSPCA_MARS) += gspca_mars.o
7obj-$(CONFIG_USB_GSPCA_MR97310A) += gspca_mr97310a.o 9obj-$(CONFIG_USB_GSPCA_MR97310A) += gspca_mr97310a.o
8obj-$(CONFIG_USB_GSPCA_OV519) += gspca_ov519.o 10obj-$(CONFIG_USB_GSPCA_OV519) += gspca_ov519.o
9obj-$(CONFIG_USB_GSPCA_OV534) += gspca_ov534.o 11obj-$(CONFIG_USB_GSPCA_OV534) += gspca_ov534.o
12obj-$(CONFIG_USB_GSPCA_OV534_9) += gspca_ov534_9.o
10obj-$(CONFIG_USB_GSPCA_PAC207) += gspca_pac207.o 13obj-$(CONFIG_USB_GSPCA_PAC207) += gspca_pac207.o
11obj-$(CONFIG_USB_GSPCA_PAC7302) += gspca_pac7302.o 14obj-$(CONFIG_USB_GSPCA_PAC7302) += gspca_pac7302.o
12obj-$(CONFIG_USB_GSPCA_PAC7311) += gspca_pac7311.o 15obj-$(CONFIG_USB_GSPCA_PAC7311) += gspca_pac7311.o
16obj-$(CONFIG_USB_GSPCA_SN9C2028) += gspca_sn9c2028.o
13obj-$(CONFIG_USB_GSPCA_SN9C20X) += gspca_sn9c20x.o 17obj-$(CONFIG_USB_GSPCA_SN9C20X) += gspca_sn9c20x.o
14obj-$(CONFIG_USB_GSPCA_SONIXB) += gspca_sonixb.o 18obj-$(CONFIG_USB_GSPCA_SONIXB) += gspca_sonixb.o
15obj-$(CONFIG_USB_GSPCA_SONIXJ) += gspca_sonixj.o 19obj-$(CONFIG_USB_GSPCA_SONIXJ) += gspca_sonixj.o
@@ -30,7 +34,9 @@ obj-$(CONFIG_USB_GSPCA_VC032X) += gspca_vc032x.o
30obj-$(CONFIG_USB_GSPCA_ZC3XX) += gspca_zc3xx.o 34obj-$(CONFIG_USB_GSPCA_ZC3XX) += gspca_zc3xx.o
31 35
32gspca_main-objs := gspca.o 36gspca_main-objs := gspca.o
37gspca_benq-objs := benq.o
33gspca_conex-objs := conex.o 38gspca_conex-objs := conex.o
39gspca_cpia1-objs := cpia1.o
34gspca_etoms-objs := etoms.o 40gspca_etoms-objs := etoms.o
35gspca_finepix-objs := finepix.o 41gspca_finepix-objs := finepix.o
36gspca_jeilinj-objs := jeilinj.o 42gspca_jeilinj-objs := jeilinj.o
@@ -38,9 +44,11 @@ gspca_mars-objs := mars.o
38gspca_mr97310a-objs := mr97310a.o 44gspca_mr97310a-objs := mr97310a.o
39gspca_ov519-objs := ov519.o 45gspca_ov519-objs := ov519.o
40gspca_ov534-objs := ov534.o 46gspca_ov534-objs := ov534.o
47gspca_ov534_9-objs := ov534_9.o
41gspca_pac207-objs := pac207.o 48gspca_pac207-objs := pac207.o
42gspca_pac7302-objs := pac7302.o 49gspca_pac7302-objs := pac7302.o
43gspca_pac7311-objs := pac7311.o 50gspca_pac7311-objs := pac7311.o
51gspca_sn9c2028-objs := sn9c2028.o
44gspca_sn9c20x-objs := sn9c20x.o 52gspca_sn9c20x-objs := sn9c20x.o
45gspca_sonixb-objs := sonixb.o 53gspca_sonixb-objs := sonixb.o
46gspca_sonixj-objs := sonixj.o 54gspca_sonixj-objs := sonixj.o
diff --git a/drivers/media/video/gspca/benq.c b/drivers/media/video/gspca/benq.c
new file mode 100644
index 000000000000..43ac4af8d3ed
--- /dev/null
+++ b/drivers/media/video/gspca/benq.c
@@ -0,0 +1,322 @@
1/*
2 * Benq DC E300 subdriver
3 *
4 * Copyright (C) 2009 Jean-Francois Moine (http://moinejf.free.fr)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#define MODULE_NAME "benq"
22
23#include "gspca.h"
24
25MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
26MODULE_DESCRIPTION("Benq DC E300 USB Camera Driver");
27MODULE_LICENSE("GPL");
28
29/* specific webcam descriptor */
30struct sd {
31 struct gspca_dev gspca_dev; /* !! must be the first item */
32};
33
34/* V4L2 controls supported by the driver */
35static const struct ctrl sd_ctrls[] = {
36};
37
38static const struct v4l2_pix_format vga_mode[] = {
39 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
40 .bytesperline = 320,
41 .sizeimage = 320 * 240 * 3 / 8 + 590,
42 .colorspace = V4L2_COLORSPACE_JPEG},
43};
44
45static void sd_isoc_irq(struct urb *urb);
46
47/* -- write a register -- */
48static void reg_w(struct gspca_dev *gspca_dev,
49 u16 value, u16 index)
50{
51 struct usb_device *dev = gspca_dev->dev;
52 int ret;
53
54 if (gspca_dev->usb_err < 0)
55 return;
56 ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
57 0x02,
58 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
59 value,
60 index,
61 NULL,
62 0,
63 500);
64 if (ret < 0) {
65 PDEBUG(D_ERR, "reg_w err %d", ret);
66 gspca_dev->usb_err = ret;
67 }
68}
69
70/* this function is called at probe time */
71static int sd_config(struct gspca_dev *gspca_dev,
72 const struct usb_device_id *id)
73{
74 gspca_dev->cam.cam_mode = vga_mode;
75 gspca_dev->cam.nmodes = ARRAY_SIZE(vga_mode);
76 gspca_dev->cam.no_urb_create = 1;
77 gspca_dev->cam.reverse_alts = 1;
78 return 0;
79}
80
81/* this function is called at probe and resume time */
82static int sd_init(struct gspca_dev *gspca_dev)
83{
84 return 0;
85}
86
87static int sd_isoc_init(struct gspca_dev *gspca_dev)
88{
89 int ret;
90
91 ret = usb_set_interface(gspca_dev->dev, gspca_dev->iface,
92 gspca_dev->nbalt - 1);
93 if (ret < 0) {
94 err("usb_set_interface failed");
95 return ret;
96 }
97/* reg_w(gspca_dev, 0x0003, 0x0002); */
98 return 0;
99}
100
101/* -- start the camera -- */
102static int sd_start(struct gspca_dev *gspca_dev)
103{
104 struct urb *urb;
105 int i, n;
106
107 /* create 4 URBs - 2 on endpoint 0x83 and 2 on 0x082 */
108#if MAX_NURBS < 4
109#error "Not enough URBs in the gspca table"
110#endif
111#define SD_PKT_SZ 64
112#define SD_NPKT 32
113 for (n = 0; n < 4; n++) {
114 urb = usb_alloc_urb(SD_NPKT, GFP_KERNEL);
115 if (!urb) {
116 err("usb_alloc_urb failed");
117 return -ENOMEM;
118 }
119 gspca_dev->urb[n] = urb;
120 urb->transfer_buffer = usb_buffer_alloc(gspca_dev->dev,
121 SD_PKT_SZ * SD_NPKT,
122 GFP_KERNEL,
123 &urb->transfer_dma);
124
125 if (urb->transfer_buffer == NULL) {
126 err("usb_buffer_alloc failed");
127 return -ENOMEM;
128 }
129 urb->dev = gspca_dev->dev;
130 urb->context = gspca_dev;
131 urb->transfer_buffer_length = SD_PKT_SZ * SD_NPKT;
132 urb->pipe = usb_rcvisocpipe(gspca_dev->dev,
133 n & 1 ? 0x82 : 0x83);
134 urb->transfer_flags = URB_ISO_ASAP
135 | URB_NO_TRANSFER_DMA_MAP;
136 urb->interval = 1;
137 urb->complete = sd_isoc_irq;
138 urb->number_of_packets = SD_NPKT;
139 for (i = 0; i < SD_NPKT; i++) {
140 urb->iso_frame_desc[i].length = SD_PKT_SZ;
141 urb->iso_frame_desc[i].offset = SD_PKT_SZ * i;
142 }
143 }
144
145 return gspca_dev->usb_err;
146}
147
148static void sd_stopN(struct gspca_dev *gspca_dev)
149{
150 reg_w(gspca_dev, 0x003c, 0x0003);
151 reg_w(gspca_dev, 0x003c, 0x0004);
152 reg_w(gspca_dev, 0x003c, 0x0005);
153 reg_w(gspca_dev, 0x003c, 0x0006);
154 reg_w(gspca_dev, 0x003c, 0x0007);
155 usb_set_interface(gspca_dev->dev, gspca_dev->iface, gspca_dev->nbalt - 1);
156}
157
158static void sd_pkt_scan(struct gspca_dev *gspca_dev,
159 u8 *data, /* isoc packet */
160 int len) /* iso packet length */
161{
162 /* unused */
163}
164
165/* reception of an URB */
166static void sd_isoc_irq(struct urb *urb)
167{
168 struct gspca_dev *gspca_dev = (struct gspca_dev *) urb->context;
169 struct urb *urb0;
170 u8 *data;
171 int i, st;
172
173 PDEBUG(D_PACK, "sd isoc irq");
174 if (!gspca_dev->streaming)
175 return;
176 if (urb->status != 0) {
177 if (urb->status == -ESHUTDOWN)
178 return; /* disconnection */
179#ifdef CONFIG_PM
180 if (gspca_dev->frozen)
181 return;
182#endif
183 PDEBUG(D_ERR|D_PACK, "urb status: %d", urb->status);
184 return;
185 }
186
187 /* if this is a control URN (ep 0x83), wait */
188 if (urb == gspca_dev->urb[0] || urb == gspca_dev->urb[2])
189 return;
190
191 /* scan both received URBs */
192 if (urb == gspca_dev->urb[1])
193 urb0 = gspca_dev->urb[0];
194 else
195 urb0 = gspca_dev->urb[2];
196 for (i = 0; i < urb->number_of_packets; i++) {
197
198 /* check the packet status and length */
199 if (urb0->iso_frame_desc[i].actual_length != SD_PKT_SZ
200 || urb->iso_frame_desc[i].actual_length != SD_PKT_SZ) {
201 PDEBUG(D_ERR, "ISOC bad lengths %d / %d",
202 urb0->iso_frame_desc[i].actual_length,
203 urb->iso_frame_desc[i].actual_length);
204 gspca_dev->last_packet_type = DISCARD_PACKET;
205 continue;
206 }
207 st = urb0->iso_frame_desc[i].status;
208 if (st == 0)
209 st = urb->iso_frame_desc[i].status;
210 if (st) {
211 PDEBUG(D_ERR,
212 "ISOC data error: [%d] status=%d",
213 i, st);
214 gspca_dev->last_packet_type = DISCARD_PACKET;
215 continue;
216 }
217
218 /*
219 * The images are received in URBs of different endpoints
220 * (0x83 and 0x82).
221 * Image pieces in URBs of ep 0x83 are continuated in URBs of
222 * ep 0x82 of the same index.
223 * The packets in the URBs of endpoint 0x83 start with:
224 * - 80 ba/bb 00 00 = start of image followed by 'ff d8'
225 * - 04 ba/bb oo oo = image piece
226 * where 'oo oo' is the image offset
227 (not cheked)
228 * - (other -> bad frame)
229 * The images are JPEG encoded with full header and
230 * normal ff escape.
231 * The end of image ('ff d9') may occur in any URB.
232 * (not cheked)
233 */
234 data = (u8 *) urb0->transfer_buffer
235 + urb0->iso_frame_desc[i].offset;
236 if (data[0] == 0x80 && (data[1] & 0xfe) == 0xba) {
237
238 /* new image */
239 gspca_frame_add(gspca_dev, LAST_PACKET,
240 NULL, 0);
241 gspca_frame_add(gspca_dev, FIRST_PACKET,
242 data + 4, SD_PKT_SZ - 4);
243 } else if (data[0] == 0x04 && (data[1] & 0xfe) == 0xba) {
244 gspca_frame_add(gspca_dev, INTER_PACKET,
245 data + 4, SD_PKT_SZ - 4);
246 } else {
247 gspca_dev->last_packet_type = DISCARD_PACKET;
248 continue;
249 }
250 data = (u8 *) urb->transfer_buffer
251 + urb->iso_frame_desc[i].offset;
252 gspca_frame_add(gspca_dev, INTER_PACKET,
253 data, SD_PKT_SZ);
254 }
255
256 /* resubmit the URBs */
257 st = usb_submit_urb(urb0, GFP_ATOMIC);
258 if (st < 0)
259 PDEBUG(D_ERR|D_PACK, "usb_submit_urb(0) ret %d", st);
260 st = usb_submit_urb(urb, GFP_ATOMIC);
261 if (st < 0)
262 PDEBUG(D_ERR|D_PACK, "usb_submit_urb() ret %d", st);
263}
264
265/* sub-driver description */
266static const struct sd_desc sd_desc = {
267 .name = MODULE_NAME,
268 .ctrls = sd_ctrls,
269 .nctrls = ARRAY_SIZE(sd_ctrls),
270 .config = sd_config,
271 .init = sd_init,
272 .isoc_init = sd_isoc_init,
273 .start = sd_start,
274 .stopN = sd_stopN,
275 .pkt_scan = sd_pkt_scan,
276};
277
278/* -- module initialisation -- */
279static const __devinitdata struct usb_device_id device_table[] = {
280 {USB_DEVICE(0x04a5, 0x3035)},
281 {}
282};
283MODULE_DEVICE_TABLE(usb, device_table);
284
285/* -- device connect -- */
286static int sd_probe(struct usb_interface *intf,
287 const struct usb_device_id *id)
288{
289 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
290 THIS_MODULE);
291}
292
293static struct usb_driver sd_driver = {
294 .name = MODULE_NAME,
295 .id_table = device_table,
296 .probe = sd_probe,
297 .disconnect = gspca_disconnect,
298#ifdef CONFIG_PM
299 .suspend = gspca_suspend,
300 .resume = gspca_resume,
301#endif
302};
303
304/* -- module insert / remove -- */
305static int __init sd_mod_init(void)
306{
307 int ret;
308
309 ret = usb_register(&sd_driver);
310 if (ret < 0)
311 return ret;
312 info("registered");
313 return 0;
314}
315static void __exit sd_mod_exit(void)
316{
317 usb_deregister(&sd_driver);
318 info("deregistered");
319}
320
321module_init(sd_mod_init);
322module_exit(sd_mod_exit);
diff --git a/drivers/media/video/gspca/coarse_expo_autogain.h b/drivers/media/video/gspca/coarse_expo_autogain.h
new file mode 100644
index 000000000000..1cb9d941eaf6
--- /dev/null
+++ b/drivers/media/video/gspca/coarse_expo_autogain.h
@@ -0,0 +1,116 @@
1/*
2 * Auto gain algorithm for camera's with a coarse exposure control
3 *
4 * Copyright (C) 2010 Hans de Goede <hdegoede@redhat.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/* Autogain + exposure algorithm for cameras with a coarse exposure control
22 (usually this means we can only control the clockdiv to change exposure)
23 As changing the clockdiv so that the fps drops from 30 to 15 fps for
24 example, will lead to a huge exposure change (it effectively doubles),
25 this algorithm normally tries to only adjust the gain (between 40 and
26 80 %) and if that does not help, only then changes exposure. This leads
27 to a much more stable image then using the knee algorithm which at
28 certain points of the knee graph will only try to adjust exposure,
29 which leads to oscilating as one exposure step is huge.
30
31 Note this assumes that the sd struct for the cam in question has
32 exp_too_high_cnt and exp_too_high_cnt int members for use by this function.
33
34 Returns 0 if no changes were made, 1 if the gain and or exposure settings
35 where changed. */
36static int gspca_coarse_grained_expo_autogain(struct gspca_dev *gspca_dev,
37 int avg_lum, int desired_avg_lum, int deadzone)
38{
39 int i, steps, gain, orig_gain, exposure, orig_exposure;
40 int gain_low, gain_high;
41 const struct ctrl *gain_ctrl = NULL;
42 const struct ctrl *exposure_ctrl = NULL;
43 struct sd *sd = (struct sd *) gspca_dev;
44 int retval = 0;
45
46 for (i = 0; i < gspca_dev->sd_desc->nctrls; i++) {
47 if (gspca_dev->ctrl_dis & (1 << i))
48 continue;
49 if (gspca_dev->sd_desc->ctrls[i].qctrl.id == V4L2_CID_GAIN)
50 gain_ctrl = &gspca_dev->sd_desc->ctrls[i];
51 if (gspca_dev->sd_desc->ctrls[i].qctrl.id == V4L2_CID_EXPOSURE)
52 exposure_ctrl = &gspca_dev->sd_desc->ctrls[i];
53 }
54 if (!gain_ctrl || !exposure_ctrl) {
55 PDEBUG(D_ERR, "Error: gspca_coarse_grained_expo_autogain "
56 "called on cam without gain or exposure");
57 return 0;
58 }
59
60 if (gain_ctrl->get(gspca_dev, &gain) ||
61 exposure_ctrl->get(gspca_dev, &exposure))
62 return 0;
63
64 orig_gain = gain;
65 orig_exposure = exposure;
66 gain_low =
67 (gain_ctrl->qctrl.maximum - gain_ctrl->qctrl.minimum) / 5 * 2;
68 gain_low += gain_ctrl->qctrl.minimum;
69 gain_high =
70 (gain_ctrl->qctrl.maximum - gain_ctrl->qctrl.minimum) / 5 * 4;
71 gain_high += gain_ctrl->qctrl.minimum;
72
73 /* If we are of a multiple of deadzone, do multiple steps to reach the
74 desired lumination fast (with the risc of a slight overshoot) */
75 steps = (desired_avg_lum - avg_lum) / deadzone;
76
77 PDEBUG(D_FRAM, "autogain: lum: %d, desired: %d, steps: %d",
78 avg_lum, desired_avg_lum, steps);
79
80 if ((gain + steps) > gain_high &&
81 sd->exposure < exposure_ctrl->qctrl.maximum) {
82 gain = gain_high;
83 sd->exp_too_low_cnt++;
84 } else if ((gain + steps) < gain_low &&
85 sd->exposure > exposure_ctrl->qctrl.minimum) {
86 gain = gain_low;
87 sd->exp_too_high_cnt++;
88 } else {
89 gain += steps;
90 if (gain > gain_ctrl->qctrl.maximum)
91 gain = gain_ctrl->qctrl.maximum;
92 else if (gain < gain_ctrl->qctrl.minimum)
93 gain = gain_ctrl->qctrl.minimum;
94 sd->exp_too_high_cnt = 0;
95 sd->exp_too_low_cnt = 0;
96 }
97
98 if (sd->exp_too_high_cnt > 3) {
99 exposure--;
100 sd->exp_too_high_cnt = 0;
101 } else if (sd->exp_too_low_cnt > 3) {
102 exposure++;
103 sd->exp_too_low_cnt = 0;
104 }
105
106 if (gain != orig_gain) {
107 gain_ctrl->set(gspca_dev, gain);
108 retval = 1;
109 }
110 if (exposure != orig_exposure) {
111 exposure_ctrl->set(gspca_dev, exposure);
112 retval = 1;
113 }
114
115 return retval;
116}
diff --git a/drivers/media/video/gspca/conex.c b/drivers/media/video/gspca/conex.c
index c98b5d69c438..19fe6b24c9a3 100644
--- a/drivers/media/video/gspca/conex.c
+++ b/drivers/media/video/gspca/conex.c
@@ -52,7 +52,7 @@ static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
52static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val); 52static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
53static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val); 53static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
54 54
55static struct ctrl sd_ctrls[] = { 55static const struct ctrl sd_ctrls[] = {
56 { 56 {
57 { 57 {
58 .id = V4L2_CID_BRIGHTNESS, 58 .id = V4L2_CID_BRIGHTNESS,
@@ -1032,7 +1032,7 @@ static int sd_get_jcomp(struct gspca_dev *gspca_dev,
1032} 1032}
1033 1033
1034/* sub-driver description */ 1034/* sub-driver description */
1035static struct sd_desc sd_desc = { 1035static const struct sd_desc sd_desc = {
1036 .name = MODULE_NAME, 1036 .name = MODULE_NAME,
1037 .ctrls = sd_ctrls, 1037 .ctrls = sd_ctrls,
1038 .nctrls = ARRAY_SIZE(sd_ctrls), 1038 .nctrls = ARRAY_SIZE(sd_ctrls),
diff --git a/drivers/media/video/gspca/cpia1.c b/drivers/media/video/gspca/cpia1.c
new file mode 100644
index 000000000000..82945ed5cbe5
--- /dev/null
+++ b/drivers/media/video/gspca/cpia1.c
@@ -0,0 +1,2022 @@
1/*
2 * cpia CPiA (1) gspca driver
3 *
4 * Copyright (C) 2010 Hans de Goede <hdgoede@redhat.com>
5 *
6 * This module is adapted from the in kernel v4l1 cpia driver which is :
7 *
8 * (C) Copyright 1999-2000 Peter Pregler
9 * (C) Copyright 1999-2000 Scott J. Bertin
10 * (C) Copyright 1999-2000 Johannes Erdfelt <johannes@erdfelt.com>
11 * (C) Copyright 2000 STMicroelectronics
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 *
27 */
28
29#define MODULE_NAME "cpia1"
30
31#include "gspca.h"
32
33MODULE_AUTHOR("Hans de Goede <hdgoede@redhat.com>");
34MODULE_DESCRIPTION("Vision CPiA");
35MODULE_LICENSE("GPL");
36
37/* constant value's */
38#define MAGIC_0 0x19
39#define MAGIC_1 0x68
40#define DATA_IN 0xC0
41#define DATA_OUT 0x40
42#define VIDEOSIZE_QCIF 0 /* 176x144 */
43#define VIDEOSIZE_CIF 1 /* 352x288 */
44#define SUBSAMPLE_420 0
45#define SUBSAMPLE_422 1
46#define YUVORDER_YUYV 0
47#define YUVORDER_UYVY 1
48#define NOT_COMPRESSED 0
49#define COMPRESSED 1
50#define NO_DECIMATION 0
51#define DECIMATION_ENAB 1
52#define EOI 0xff /* End Of Image */
53#define EOL 0xfd /* End Of Line */
54#define FRAME_HEADER_SIZE 64
55
56/* Image grab modes */
57#define CPIA_GRAB_SINGLE 0
58#define CPIA_GRAB_CONTINEOUS 1
59
60/* Compression parameters */
61#define CPIA_COMPRESSION_NONE 0
62#define CPIA_COMPRESSION_AUTO 1
63#define CPIA_COMPRESSION_MANUAL 2
64#define CPIA_COMPRESSION_TARGET_QUALITY 0
65#define CPIA_COMPRESSION_TARGET_FRAMERATE 1
66
67/* Return offsets for GetCameraState */
68#define SYSTEMSTATE 0
69#define GRABSTATE 1
70#define STREAMSTATE 2
71#define FATALERROR 3
72#define CMDERROR 4
73#define DEBUGFLAGS 5
74#define VPSTATUS 6
75#define ERRORCODE 7
76
77/* SystemState */
78#define UNINITIALISED_STATE 0
79#define PASS_THROUGH_STATE 1
80#define LO_POWER_STATE 2
81#define HI_POWER_STATE 3
82#define WARM_BOOT_STATE 4
83
84/* GrabState */
85#define GRAB_IDLE 0
86#define GRAB_ACTIVE 1
87#define GRAB_DONE 2
88
89/* StreamState */
90#define STREAM_NOT_READY 0
91#define STREAM_READY 1
92#define STREAM_OPEN 2
93#define STREAM_PAUSED 3
94#define STREAM_FINISHED 4
95
96/* Fatal Error, CmdError, and DebugFlags */
97#define CPIA_FLAG 1
98#define SYSTEM_FLAG 2
99#define INT_CTRL_FLAG 4
100#define PROCESS_FLAG 8
101#define COM_FLAG 16
102#define VP_CTRL_FLAG 32
103#define CAPTURE_FLAG 64
104#define DEBUG_FLAG 128
105
106/* VPStatus */
107#define VP_STATE_OK 0x00
108
109#define VP_STATE_FAILED_VIDEOINIT 0x01
110#define VP_STATE_FAILED_AECACBINIT 0x02
111#define VP_STATE_AEC_MAX 0x04
112#define VP_STATE_ACB_BMAX 0x08
113
114#define VP_STATE_ACB_RMIN 0x10
115#define VP_STATE_ACB_GMIN 0x20
116#define VP_STATE_ACB_RMAX 0x40
117#define VP_STATE_ACB_GMAX 0x80
118
119/* default (minimum) compensation values */
120#define COMP_RED 220
121#define COMP_GREEN1 214
122#define COMP_GREEN2 COMP_GREEN1
123#define COMP_BLUE 230
124
125/* exposure status */
126#define EXPOSURE_VERY_LIGHT 0
127#define EXPOSURE_LIGHT 1
128#define EXPOSURE_NORMAL 2
129#define EXPOSURE_DARK 3
130#define EXPOSURE_VERY_DARK 4
131
132#define CPIA_MODULE_CPIA (0 << 5)
133#define CPIA_MODULE_SYSTEM (1 << 5)
134#define CPIA_MODULE_VP_CTRL (5 << 5)
135#define CPIA_MODULE_CAPTURE (6 << 5)
136#define CPIA_MODULE_DEBUG (7 << 5)
137
138#define INPUT (DATA_IN << 8)
139#define OUTPUT (DATA_OUT << 8)
140
141#define CPIA_COMMAND_GetCPIAVersion (INPUT | CPIA_MODULE_CPIA | 1)
142#define CPIA_COMMAND_GetPnPID (INPUT | CPIA_MODULE_CPIA | 2)
143#define CPIA_COMMAND_GetCameraStatus (INPUT | CPIA_MODULE_CPIA | 3)
144#define CPIA_COMMAND_GotoHiPower (OUTPUT | CPIA_MODULE_CPIA | 4)
145#define CPIA_COMMAND_GotoLoPower (OUTPUT | CPIA_MODULE_CPIA | 5)
146#define CPIA_COMMAND_GotoSuspend (OUTPUT | CPIA_MODULE_CPIA | 7)
147#define CPIA_COMMAND_GotoPassThrough (OUTPUT | CPIA_MODULE_CPIA | 8)
148#define CPIA_COMMAND_ModifyCameraStatus (OUTPUT | CPIA_MODULE_CPIA | 10)
149
150#define CPIA_COMMAND_ReadVCRegs (INPUT | CPIA_MODULE_SYSTEM | 1)
151#define CPIA_COMMAND_WriteVCReg (OUTPUT | CPIA_MODULE_SYSTEM | 2)
152#define CPIA_COMMAND_ReadMCPorts (INPUT | CPIA_MODULE_SYSTEM | 3)
153#define CPIA_COMMAND_WriteMCPort (OUTPUT | CPIA_MODULE_SYSTEM | 4)
154#define CPIA_COMMAND_SetBaudRate (OUTPUT | CPIA_MODULE_SYSTEM | 5)
155#define CPIA_COMMAND_SetECPTiming (OUTPUT | CPIA_MODULE_SYSTEM | 6)
156#define CPIA_COMMAND_ReadIDATA (INPUT | CPIA_MODULE_SYSTEM | 7)
157#define CPIA_COMMAND_WriteIDATA (OUTPUT | CPIA_MODULE_SYSTEM | 8)
158#define CPIA_COMMAND_GenericCall (OUTPUT | CPIA_MODULE_SYSTEM | 9)
159#define CPIA_COMMAND_I2CStart (OUTPUT | CPIA_MODULE_SYSTEM | 10)
160#define CPIA_COMMAND_I2CStop (OUTPUT | CPIA_MODULE_SYSTEM | 11)
161#define CPIA_COMMAND_I2CWrite (OUTPUT | CPIA_MODULE_SYSTEM | 12)
162#define CPIA_COMMAND_I2CRead (INPUT | CPIA_MODULE_SYSTEM | 13)
163
164#define CPIA_COMMAND_GetVPVersion (INPUT | CPIA_MODULE_VP_CTRL | 1)
165#define CPIA_COMMAND_ResetFrameCounter (INPUT | CPIA_MODULE_VP_CTRL | 2)
166#define CPIA_COMMAND_SetColourParams (OUTPUT | CPIA_MODULE_VP_CTRL | 3)
167#define CPIA_COMMAND_SetExposure (OUTPUT | CPIA_MODULE_VP_CTRL | 4)
168#define CPIA_COMMAND_SetColourBalance (OUTPUT | CPIA_MODULE_VP_CTRL | 6)
169#define CPIA_COMMAND_SetSensorFPS (OUTPUT | CPIA_MODULE_VP_CTRL | 7)
170#define CPIA_COMMAND_SetVPDefaults (OUTPUT | CPIA_MODULE_VP_CTRL | 8)
171#define CPIA_COMMAND_SetApcor (OUTPUT | CPIA_MODULE_VP_CTRL | 9)
172#define CPIA_COMMAND_SetFlickerCtrl (OUTPUT | CPIA_MODULE_VP_CTRL | 10)
173#define CPIA_COMMAND_SetVLOffset (OUTPUT | CPIA_MODULE_VP_CTRL | 11)
174#define CPIA_COMMAND_GetColourParams (INPUT | CPIA_MODULE_VP_CTRL | 16)
175#define CPIA_COMMAND_GetColourBalance (INPUT | CPIA_MODULE_VP_CTRL | 17)
176#define CPIA_COMMAND_GetExposure (INPUT | CPIA_MODULE_VP_CTRL | 18)
177#define CPIA_COMMAND_SetSensorMatrix (OUTPUT | CPIA_MODULE_VP_CTRL | 19)
178#define CPIA_COMMAND_ColourBars (OUTPUT | CPIA_MODULE_VP_CTRL | 25)
179#define CPIA_COMMAND_ReadVPRegs (INPUT | CPIA_MODULE_VP_CTRL | 30)
180#define CPIA_COMMAND_WriteVPReg (OUTPUT | CPIA_MODULE_VP_CTRL | 31)
181
182#define CPIA_COMMAND_GrabFrame (OUTPUT | CPIA_MODULE_CAPTURE | 1)
183#define CPIA_COMMAND_UploadFrame (OUTPUT | CPIA_MODULE_CAPTURE | 2)
184#define CPIA_COMMAND_SetGrabMode (OUTPUT | CPIA_MODULE_CAPTURE | 3)
185#define CPIA_COMMAND_InitStreamCap (OUTPUT | CPIA_MODULE_CAPTURE | 4)
186#define CPIA_COMMAND_FiniStreamCap (OUTPUT | CPIA_MODULE_CAPTURE | 5)
187#define CPIA_COMMAND_StartStreamCap (OUTPUT | CPIA_MODULE_CAPTURE | 6)
188#define CPIA_COMMAND_EndStreamCap (OUTPUT | CPIA_MODULE_CAPTURE | 7)
189#define CPIA_COMMAND_SetFormat (OUTPUT | CPIA_MODULE_CAPTURE | 8)
190#define CPIA_COMMAND_SetROI (OUTPUT | CPIA_MODULE_CAPTURE | 9)
191#define CPIA_COMMAND_SetCompression (OUTPUT | CPIA_MODULE_CAPTURE | 10)
192#define CPIA_COMMAND_SetCompressionTarget (OUTPUT | CPIA_MODULE_CAPTURE | 11)
193#define CPIA_COMMAND_SetYUVThresh (OUTPUT | CPIA_MODULE_CAPTURE | 12)
194#define CPIA_COMMAND_SetCompressionParams (OUTPUT | CPIA_MODULE_CAPTURE | 13)
195#define CPIA_COMMAND_DiscardFrame (OUTPUT | CPIA_MODULE_CAPTURE | 14)
196#define CPIA_COMMAND_GrabReset (OUTPUT | CPIA_MODULE_CAPTURE | 15)
197
198#define CPIA_COMMAND_OutputRS232 (OUTPUT | CPIA_MODULE_DEBUG | 1)
199#define CPIA_COMMAND_AbortProcess (OUTPUT | CPIA_MODULE_DEBUG | 4)
200#define CPIA_COMMAND_SetDramPage (OUTPUT | CPIA_MODULE_DEBUG | 5)
201#define CPIA_COMMAND_StartDramUpload (OUTPUT | CPIA_MODULE_DEBUG | 6)
202#define CPIA_COMMAND_StartDummyDtream (OUTPUT | CPIA_MODULE_DEBUG | 8)
203#define CPIA_COMMAND_AbortStream (OUTPUT | CPIA_MODULE_DEBUG | 9)
204#define CPIA_COMMAND_DownloadDRAM (OUTPUT | CPIA_MODULE_DEBUG | 10)
205#define CPIA_COMMAND_Null (OUTPUT | CPIA_MODULE_DEBUG | 11)
206
207#define ROUND_UP_EXP_FOR_FLICKER 15
208
209/* Constants for automatic frame rate adjustment */
210#define MAX_EXP 302
211#define MAX_EXP_102 255
212#define LOW_EXP 140
213#define VERY_LOW_EXP 70
214#define TC 94
215#define EXP_ACC_DARK 50
216#define EXP_ACC_LIGHT 90
217#define HIGH_COMP_102 160
218#define MAX_COMP 239
219#define DARK_TIME 3
220#define LIGHT_TIME 3
221
222#define FIRMWARE_VERSION(x, y) (sd->params.version.firmwareVersion == (x) && \
223 sd->params.version.firmwareRevision == (y))
224
225/* Developer's Guide Table 5 p 3-34
226 * indexed by [mains][sensorFps.baserate][sensorFps.divisor]*/
227static u8 flicker_jumps[2][2][4] =
228{ { { 76, 38, 19, 9 }, { 92, 46, 23, 11 } },
229 { { 64, 32, 16, 8 }, { 76, 38, 19, 9} }
230};
231
232struct cam_params {
233 struct {
234 u8 firmwareVersion;
235 u8 firmwareRevision;
236 u8 vcVersion;
237 u8 vcRevision;
238 } version;
239 struct {
240 u16 vendor;
241 u16 product;
242 u16 deviceRevision;
243 } pnpID;
244 struct {
245 u8 vpVersion;
246 u8 vpRevision;
247 u16 cameraHeadID;
248 } vpVersion;
249 struct {
250 u8 systemState;
251 u8 grabState;
252 u8 streamState;
253 u8 fatalError;
254 u8 cmdError;
255 u8 debugFlags;
256 u8 vpStatus;
257 u8 errorCode;
258 } status;
259 struct {
260 u8 brightness;
261 u8 contrast;
262 u8 saturation;
263 } colourParams;
264 struct {
265 u8 gainMode;
266 u8 expMode;
267 u8 compMode;
268 u8 centreWeight;
269 u8 gain;
270 u8 fineExp;
271 u8 coarseExpLo;
272 u8 coarseExpHi;
273 u8 redComp;
274 u8 green1Comp;
275 u8 green2Comp;
276 u8 blueComp;
277 } exposure;
278 struct {
279 u8 balanceMode;
280 u8 redGain;
281 u8 greenGain;
282 u8 blueGain;
283 } colourBalance;
284 struct {
285 u8 divisor;
286 u8 baserate;
287 } sensorFps;
288 struct {
289 u8 gain1;
290 u8 gain2;
291 u8 gain4;
292 u8 gain8;
293 } apcor;
294 struct {
295 u8 disabled;
296 u8 flickerMode;
297 u8 coarseJump;
298 u8 allowableOverExposure;
299 } flickerControl;
300 struct {
301 u8 gain1;
302 u8 gain2;
303 u8 gain4;
304 u8 gain8;
305 } vlOffset;
306 struct {
307 u8 mode;
308 u8 decimation;
309 } compression;
310 struct {
311 u8 frTargeting;
312 u8 targetFR;
313 u8 targetQ;
314 } compressionTarget;
315 struct {
316 u8 yThreshold;
317 u8 uvThreshold;
318 } yuvThreshold;
319 struct {
320 u8 hysteresis;
321 u8 threshMax;
322 u8 smallStep;
323 u8 largeStep;
324 u8 decimationHysteresis;
325 u8 frDiffStepThresh;
326 u8 qDiffStepThresh;
327 u8 decimationThreshMod;
328 } compressionParams;
329 struct {
330 u8 videoSize; /* CIF/QCIF */
331 u8 subSample;
332 u8 yuvOrder;
333 } format;
334 struct { /* Intel QX3 specific data */
335 u8 qx3_detected; /* a QX3 is present */
336 u8 toplight; /* top light lit , R/W */
337 u8 bottomlight; /* bottom light lit, R/W */
338 u8 button; /* snapshot button pressed (R/O) */
339 u8 cradled; /* microscope is in cradle (R/O) */
340 } qx3;
341 struct {
342 u8 colStart; /* skip first 8*colStart pixels */
343 u8 colEnd; /* finish at 8*colEnd pixels */
344 u8 rowStart; /* skip first 4*rowStart lines */
345 u8 rowEnd; /* finish at 4*rowEnd lines */
346 } roi;
347 u8 ecpTiming;
348 u8 streamStartLine;
349};
350
351/* specific webcam descriptor */
352struct sd {
353 struct gspca_dev gspca_dev; /* !! must be the first item */
354 struct cam_params params; /* camera settings */
355
356 atomic_t cam_exposure;
357 atomic_t fps;
358 int exposure_count;
359 u8 exposure_status;
360 u8 mainsFreq; /* 0 = 50hz, 1 = 60hz */
361 u8 first_frame;
362 u8 freq;
363};
364
365/* V4L2 controls supported by the driver */
366static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
367static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
368static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
369static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
370static int sd_setsaturation(struct gspca_dev *gspca_dev, __s32 val);
371static int sd_getsaturation(struct gspca_dev *gspca_dev, __s32 *val);
372static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
373static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
374static int sd_setcomptarget(struct gspca_dev *gspca_dev, __s32 val);
375static int sd_getcomptarget(struct gspca_dev *gspca_dev, __s32 *val);
376
377static struct ctrl sd_ctrls[] = {
378 {
379 {
380 .id = V4L2_CID_BRIGHTNESS,
381 .type = V4L2_CTRL_TYPE_INTEGER,
382 .name = "Brightness",
383 .minimum = 0,
384 .maximum = 100,
385 .step = 1,
386#define BRIGHTNESS_DEF 50
387 .default_value = BRIGHTNESS_DEF,
388 .flags = 0,
389 },
390 .set = sd_setbrightness,
391 .get = sd_getbrightness,
392 },
393 {
394 {
395 .id = V4L2_CID_CONTRAST,
396 .type = V4L2_CTRL_TYPE_INTEGER,
397 .name = "Contrast",
398 .minimum = 0,
399 .maximum = 96,
400 .step = 8,
401#define CONTRAST_DEF 48
402 .default_value = CONTRAST_DEF,
403 },
404 .set = sd_setcontrast,
405 .get = sd_getcontrast,
406 },
407 {
408 {
409 .id = V4L2_CID_SATURATION,
410 .type = V4L2_CTRL_TYPE_INTEGER,
411 .name = "Saturation",
412 .minimum = 0,
413 .maximum = 100,
414 .step = 1,
415#define SATURATION_DEF 50
416 .default_value = SATURATION_DEF,
417 },
418 .set = sd_setsaturation,
419 .get = sd_getsaturation,
420 },
421 {
422 {
423 .id = V4L2_CID_POWER_LINE_FREQUENCY,
424 .type = V4L2_CTRL_TYPE_MENU,
425 .name = "Light frequency filter",
426 .minimum = 0,
427 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
428 .step = 1,
429#define FREQ_DEF 1
430 .default_value = FREQ_DEF,
431 },
432 .set = sd_setfreq,
433 .get = sd_getfreq,
434 },
435 {
436 {
437#define V4L2_CID_COMP_TARGET V4L2_CID_PRIVATE_BASE
438 .id = V4L2_CID_COMP_TARGET,
439 .type = V4L2_CTRL_TYPE_MENU,
440 .name = "Compression Target",
441 .minimum = 0,
442 .maximum = 1,
443 .step = 1,
444#define COMP_TARGET_DEF CPIA_COMPRESSION_TARGET_QUALITY
445 .default_value = COMP_TARGET_DEF,
446 },
447 .set = sd_setcomptarget,
448 .get = sd_getcomptarget,
449 },
450};
451
452static const struct v4l2_pix_format mode[] = {
453 {160, 120, V4L2_PIX_FMT_CPIA1, V4L2_FIELD_NONE,
454 /* The sizeimage is trial and error, as with low framerates
455 the camera will pad out usb frames, making the image
456 data larger then strictly necessary */
457 .bytesperline = 160,
458 .sizeimage = 65536,
459 .colorspace = V4L2_COLORSPACE_SRGB,
460 .priv = 3},
461 {176, 144, V4L2_PIX_FMT_CPIA1, V4L2_FIELD_NONE,
462 .bytesperline = 172,
463 .sizeimage = 65536,
464 .colorspace = V4L2_COLORSPACE_SRGB,
465 .priv = 2},
466 {320, 240, V4L2_PIX_FMT_CPIA1, V4L2_FIELD_NONE,
467 .bytesperline = 320,
468 .sizeimage = 262144,
469 .colorspace = V4L2_COLORSPACE_SRGB,
470 .priv = 1},
471 {352, 288, V4L2_PIX_FMT_CPIA1, V4L2_FIELD_NONE,
472 .bytesperline = 352,
473 .sizeimage = 262144,
474 .colorspace = V4L2_COLORSPACE_SRGB,
475 .priv = 0},
476};
477
478/**********************************************************************
479 *
480 * General functions
481 *
482 **********************************************************************/
483
484static int cpia_usb_transferCmd(struct gspca_dev *gspca_dev, u8 *command)
485{
486 u8 requesttype;
487 unsigned int pipe;
488 int ret, databytes = command[6] | (command[7] << 8);
489 /* Sometimes we see spurious EPIPE errors */
490 int retries = 3;
491
492 if (command[0] == DATA_IN) {
493 pipe = usb_rcvctrlpipe(gspca_dev->dev, 0);
494 requesttype = USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
495 } else if (command[0] == DATA_OUT) {
496 pipe = usb_sndctrlpipe(gspca_dev->dev, 0);
497 requesttype = USB_TYPE_VENDOR | USB_RECIP_DEVICE;
498 } else {
499 PDEBUG(D_ERR, "Unexpected first byte of command: %x",
500 command[0]);
501 return -EINVAL;
502 }
503
504retry:
505 ret = usb_control_msg(gspca_dev->dev, pipe,
506 command[1],
507 requesttype,
508 command[2] | (command[3] << 8),
509 command[4] | (command[5] << 8),
510 gspca_dev->usb_buf, databytes, 1000);
511
512 if (ret < 0)
513 PDEBUG(D_ERR, "usb_control_msg %02x, error %d", command[1],
514 ret);
515
516 if (ret == -EPIPE && retries > 0) {
517 retries--;
518 goto retry;
519 }
520
521 return (ret < 0) ? ret : 0;
522}
523
524/* send an arbitrary command to the camera */
525static int do_command(struct gspca_dev *gspca_dev, u16 command,
526 u8 a, u8 b, u8 c, u8 d)
527{
528 struct sd *sd = (struct sd *) gspca_dev;
529 int ret, datasize;
530 u8 cmd[8];
531
532 switch (command) {
533 case CPIA_COMMAND_GetCPIAVersion:
534 case CPIA_COMMAND_GetPnPID:
535 case CPIA_COMMAND_GetCameraStatus:
536 case CPIA_COMMAND_GetVPVersion:
537 case CPIA_COMMAND_GetColourParams:
538 case CPIA_COMMAND_GetColourBalance:
539 case CPIA_COMMAND_GetExposure:
540 datasize = 8;
541 break;
542 case CPIA_COMMAND_ReadMCPorts:
543 case CPIA_COMMAND_ReadVCRegs:
544 datasize = 4;
545 break;
546 default:
547 datasize = 0;
548 break;
549 }
550
551 cmd[0] = command >> 8;
552 cmd[1] = command & 0xff;
553 cmd[2] = a;
554 cmd[3] = b;
555 cmd[4] = c;
556 cmd[5] = d;
557 cmd[6] = datasize;
558 cmd[7] = 0;
559
560 ret = cpia_usb_transferCmd(gspca_dev, cmd);
561 if (ret)
562 return ret;
563
564 switch (command) {
565 case CPIA_COMMAND_GetCPIAVersion:
566 sd->params.version.firmwareVersion = gspca_dev->usb_buf[0];
567 sd->params.version.firmwareRevision = gspca_dev->usb_buf[1];
568 sd->params.version.vcVersion = gspca_dev->usb_buf[2];
569 sd->params.version.vcRevision = gspca_dev->usb_buf[3];
570 break;
571 case CPIA_COMMAND_GetPnPID:
572 sd->params.pnpID.vendor =
573 gspca_dev->usb_buf[0] | (gspca_dev->usb_buf[1] << 8);
574 sd->params.pnpID.product =
575 gspca_dev->usb_buf[2] | (gspca_dev->usb_buf[3] << 8);
576 sd->params.pnpID.deviceRevision =
577 gspca_dev->usb_buf[4] | (gspca_dev->usb_buf[5] << 8);
578 break;
579 case CPIA_COMMAND_GetCameraStatus:
580 sd->params.status.systemState = gspca_dev->usb_buf[0];
581 sd->params.status.grabState = gspca_dev->usb_buf[1];
582 sd->params.status.streamState = gspca_dev->usb_buf[2];
583 sd->params.status.fatalError = gspca_dev->usb_buf[3];
584 sd->params.status.cmdError = gspca_dev->usb_buf[4];
585 sd->params.status.debugFlags = gspca_dev->usb_buf[5];
586 sd->params.status.vpStatus = gspca_dev->usb_buf[6];
587 sd->params.status.errorCode = gspca_dev->usb_buf[7];
588 break;
589 case CPIA_COMMAND_GetVPVersion:
590 sd->params.vpVersion.vpVersion = gspca_dev->usb_buf[0];
591 sd->params.vpVersion.vpRevision = gspca_dev->usb_buf[1];
592 sd->params.vpVersion.cameraHeadID =
593 gspca_dev->usb_buf[2] | (gspca_dev->usb_buf[3] << 8);
594 break;
595 case CPIA_COMMAND_GetColourParams:
596 sd->params.colourParams.brightness = gspca_dev->usb_buf[0];
597 sd->params.colourParams.contrast = gspca_dev->usb_buf[1];
598 sd->params.colourParams.saturation = gspca_dev->usb_buf[2];
599 break;
600 case CPIA_COMMAND_GetColourBalance:
601 sd->params.colourBalance.redGain = gspca_dev->usb_buf[0];
602 sd->params.colourBalance.greenGain = gspca_dev->usb_buf[1];
603 sd->params.colourBalance.blueGain = gspca_dev->usb_buf[2];
604 break;
605 case CPIA_COMMAND_GetExposure:
606 sd->params.exposure.gain = gspca_dev->usb_buf[0];
607 sd->params.exposure.fineExp = gspca_dev->usb_buf[1];
608 sd->params.exposure.coarseExpLo = gspca_dev->usb_buf[2];
609 sd->params.exposure.coarseExpHi = gspca_dev->usb_buf[3];
610 sd->params.exposure.redComp = gspca_dev->usb_buf[4];
611 sd->params.exposure.green1Comp = gspca_dev->usb_buf[5];
612 sd->params.exposure.green2Comp = gspca_dev->usb_buf[6];
613 sd->params.exposure.blueComp = gspca_dev->usb_buf[7];
614 break;
615
616 case CPIA_COMMAND_ReadMCPorts:
617 if (!sd->params.qx3.qx3_detected)
618 break;
619 /* test button press */
620 sd->params.qx3.button = ((gspca_dev->usb_buf[1] & 0x02) == 0);
621 if (sd->params.qx3.button) {
622 /* button pressed - unlock the latch */
623 do_command(gspca_dev, CPIA_COMMAND_WriteMCPort,
624 3, 0xDF, 0xDF, 0);
625 do_command(gspca_dev, CPIA_COMMAND_WriteMCPort,
626 3, 0xFF, 0xFF, 0);
627 }
628
629 /* test whether microscope is cradled */
630 sd->params.qx3.cradled = ((gspca_dev->usb_buf[2] & 0x40) == 0);
631 break;
632 }
633
634 return 0;
635}
636
637/* send a command to the camera with an additional data transaction */
638static int do_command_extended(struct gspca_dev *gspca_dev, u16 command,
639 u8 a, u8 b, u8 c, u8 d,
640 u8 e, u8 f, u8 g, u8 h,
641 u8 i, u8 j, u8 k, u8 l)
642{
643 u8 cmd[8];
644
645 cmd[0] = command >> 8;
646 cmd[1] = command & 0xff;
647 cmd[2] = a;
648 cmd[3] = b;
649 cmd[4] = c;
650 cmd[5] = d;
651 cmd[6] = 8;
652 cmd[7] = 0;
653 gspca_dev->usb_buf[0] = e;
654 gspca_dev->usb_buf[1] = f;
655 gspca_dev->usb_buf[2] = g;
656 gspca_dev->usb_buf[3] = h;
657 gspca_dev->usb_buf[4] = i;
658 gspca_dev->usb_buf[5] = j;
659 gspca_dev->usb_buf[6] = k;
660 gspca_dev->usb_buf[7] = l;
661
662 return cpia_usb_transferCmd(gspca_dev, cmd);
663}
664
665/* find_over_exposure
666 * Finds a suitable value of OverExposure for use with SetFlickerCtrl
667 * Some calculation is required because this value changes with the brightness
668 * set with SetColourParameters
669 *
670 * Parameters: Brightness - last brightness value set with SetColourParameters
671 *
672 * Returns: OverExposure value to use with SetFlickerCtrl
673 */
674#define FLICKER_MAX_EXPOSURE 250
675#define FLICKER_ALLOWABLE_OVER_EXPOSURE 146
676#define FLICKER_BRIGHTNESS_CONSTANT 59
677static int find_over_exposure(int brightness)
678{
679 int MaxAllowableOverExposure, OverExposure;
680
681 MaxAllowableOverExposure = FLICKER_MAX_EXPOSURE - brightness -
682 FLICKER_BRIGHTNESS_CONSTANT;
683
684 if (MaxAllowableOverExposure < FLICKER_ALLOWABLE_OVER_EXPOSURE)
685 OverExposure = MaxAllowableOverExposure;
686 else
687 OverExposure = FLICKER_ALLOWABLE_OVER_EXPOSURE;
688
689 return OverExposure;
690}
691#undef FLICKER_MAX_EXPOSURE
692#undef FLICKER_ALLOWABLE_OVER_EXPOSURE
693#undef FLICKER_BRIGHTNESS_CONSTANT
694
695/* initialise cam_data structure */
696static void reset_camera_params(struct gspca_dev *gspca_dev)
697{
698 struct sd *sd = (struct sd *) gspca_dev;
699 struct cam_params *params = &sd->params;
700
701 /* The following parameter values are the defaults from
702 * "Software Developer's Guide for CPiA Cameras". Any changes
703 * to the defaults are noted in comments. */
704 params->colourParams.brightness = BRIGHTNESS_DEF;
705 params->colourParams.contrast = CONTRAST_DEF;
706 params->colourParams.saturation = SATURATION_DEF;
707 params->exposure.gainMode = 4;
708 params->exposure.expMode = 2; /* AEC */
709 params->exposure.compMode = 1;
710 params->exposure.centreWeight = 1;
711 params->exposure.gain = 0;
712 params->exposure.fineExp = 0;
713 params->exposure.coarseExpLo = 185;
714 params->exposure.coarseExpHi = 0;
715 params->exposure.redComp = COMP_RED;
716 params->exposure.green1Comp = COMP_GREEN1;
717 params->exposure.green2Comp = COMP_GREEN2;
718 params->exposure.blueComp = COMP_BLUE;
719 params->colourBalance.balanceMode = 2; /* ACB */
720 params->colourBalance.redGain = 32;
721 params->colourBalance.greenGain = 6;
722 params->colourBalance.blueGain = 92;
723 params->apcor.gain1 = 0x18;
724 params->apcor.gain2 = 0x16;
725 params->apcor.gain4 = 0x24;
726 params->apcor.gain8 = 0x34;
727 params->flickerControl.flickerMode = 0;
728 params->flickerControl.disabled = 1;
729
730 params->flickerControl.coarseJump =
731 flicker_jumps[sd->mainsFreq]
732 [params->sensorFps.baserate]
733 [params->sensorFps.divisor];
734 params->flickerControl.allowableOverExposure =
735 find_over_exposure(params->colourParams.brightness);
736 params->vlOffset.gain1 = 20;
737 params->vlOffset.gain2 = 24;
738 params->vlOffset.gain4 = 26;
739 params->vlOffset.gain8 = 26;
740 params->compressionParams.hysteresis = 3;
741 params->compressionParams.threshMax = 11;
742 params->compressionParams.smallStep = 1;
743 params->compressionParams.largeStep = 3;
744 params->compressionParams.decimationHysteresis = 2;
745 params->compressionParams.frDiffStepThresh = 5;
746 params->compressionParams.qDiffStepThresh = 3;
747 params->compressionParams.decimationThreshMod = 2;
748 /* End of default values from Software Developer's Guide */
749
750 /* Set Sensor FPS to 15fps. This seems better than 30fps
751 * for indoor lighting. */
752 params->sensorFps.divisor = 1;
753 params->sensorFps.baserate = 1;
754
755 params->yuvThreshold.yThreshold = 6; /* From windows driver */
756 params->yuvThreshold.uvThreshold = 6; /* From windows driver */
757
758 params->format.subSample = SUBSAMPLE_420;
759 params->format.yuvOrder = YUVORDER_YUYV;
760
761 params->compression.mode = CPIA_COMPRESSION_AUTO;
762 params->compression.decimation = NO_DECIMATION;
763
764 params->compressionTarget.frTargeting = COMP_TARGET_DEF;
765 params->compressionTarget.targetFR = 15; /* From windows driver */
766 params->compressionTarget.targetQ = 5; /* From windows driver */
767
768 params->qx3.qx3_detected = 0;
769 params->qx3.toplight = 0;
770 params->qx3.bottomlight = 0;
771 params->qx3.button = 0;
772 params->qx3.cradled = 0;
773}
774
775static void printstatus(struct cam_params *params)
776{
777 PDEBUG(D_PROBE, "status: %02x %02x %02x %02x %02x %02x %02x %02x",
778 params->status.systemState, params->status.grabState,
779 params->status.streamState, params->status.fatalError,
780 params->status.cmdError, params->status.debugFlags,
781 params->status.vpStatus, params->status.errorCode);
782}
783
784static int goto_low_power(struct gspca_dev *gspca_dev)
785{
786 struct sd *sd = (struct sd *) gspca_dev;
787 int ret;
788
789 ret = do_command(gspca_dev, CPIA_COMMAND_GotoLoPower, 0, 0, 0, 0);
790 if (ret)
791 return ret;
792
793 do_command(gspca_dev, CPIA_COMMAND_GetCameraStatus, 0, 0, 0, 0);
794 if (ret)
795 return ret;
796
797 if (sd->params.status.systemState != LO_POWER_STATE) {
798 if (sd->params.status.systemState != WARM_BOOT_STATE) {
799 PDEBUG(D_ERR,
800 "unexpected state after lo power cmd: %02x",
801 sd->params.status.systemState);
802 printstatus(&sd->params);
803 }
804 return -EIO;
805 }
806
807 PDEBUG(D_CONF, "camera now in LOW power state");
808 return 0;
809}
810
811static int goto_high_power(struct gspca_dev *gspca_dev)
812{
813 struct sd *sd = (struct sd *) gspca_dev;
814 int ret;
815
816 ret = do_command(gspca_dev, CPIA_COMMAND_GotoHiPower, 0, 0, 0, 0);
817 if (ret)
818 return ret;
819
820 msleep_interruptible(40); /* windows driver does it too */
821
822 if (signal_pending(current))
823 return -EINTR;
824
825 do_command(gspca_dev, CPIA_COMMAND_GetCameraStatus, 0, 0, 0, 0);
826 if (ret)
827 return ret;
828
829 if (sd->params.status.systemState != HI_POWER_STATE) {
830 PDEBUG(D_ERR, "unexpected state after hi power cmd: %02x",
831 sd->params.status.systemState);
832 printstatus(&sd->params);
833 return -EIO;
834 }
835
836 PDEBUG(D_CONF, "camera now in HIGH power state");
837 return 0;
838}
839
840static int get_version_information(struct gspca_dev *gspca_dev)
841{
842 int ret;
843
844 /* GetCPIAVersion */
845 ret = do_command(gspca_dev, CPIA_COMMAND_GetCPIAVersion, 0, 0, 0, 0);
846 if (ret)
847 return ret;
848
849 /* GetPnPID */
850 return do_command(gspca_dev, CPIA_COMMAND_GetPnPID, 0, 0, 0, 0);
851}
852
853static int save_camera_state(struct gspca_dev *gspca_dev)
854{
855 int ret;
856
857 ret = do_command(gspca_dev, CPIA_COMMAND_GetColourBalance, 0, 0, 0, 0);
858 if (ret)
859 return ret;
860
861 return do_command(gspca_dev, CPIA_COMMAND_GetExposure, 0, 0, 0, 0);
862}
863
864int command_setformat(struct gspca_dev *gspca_dev)
865{
866 struct sd *sd = (struct sd *) gspca_dev;
867 int ret;
868
869 ret = do_command(gspca_dev, CPIA_COMMAND_SetFormat,
870 sd->params.format.videoSize,
871 sd->params.format.subSample,
872 sd->params.format.yuvOrder, 0);
873 if (ret)
874 return ret;
875
876 return do_command(gspca_dev, CPIA_COMMAND_SetROI,
877 sd->params.roi.colStart, sd->params.roi.colEnd,
878 sd->params.roi.rowStart, sd->params.roi.rowEnd);
879}
880
881int command_setcolourparams(struct gspca_dev *gspca_dev)
882{
883 struct sd *sd = (struct sd *) gspca_dev;
884 return do_command(gspca_dev, CPIA_COMMAND_SetColourParams,
885 sd->params.colourParams.brightness,
886 sd->params.colourParams.contrast,
887 sd->params.colourParams.saturation, 0);
888}
889
890int command_setapcor(struct gspca_dev *gspca_dev)
891{
892 struct sd *sd = (struct sd *) gspca_dev;
893 return do_command(gspca_dev, CPIA_COMMAND_SetApcor,
894 sd->params.apcor.gain1,
895 sd->params.apcor.gain2,
896 sd->params.apcor.gain4,
897 sd->params.apcor.gain8);
898}
899
900int command_setvloffset(struct gspca_dev *gspca_dev)
901{
902 struct sd *sd = (struct sd *) gspca_dev;
903 return do_command(gspca_dev, CPIA_COMMAND_SetVLOffset,
904 sd->params.vlOffset.gain1,
905 sd->params.vlOffset.gain2,
906 sd->params.vlOffset.gain4,
907 sd->params.vlOffset.gain8);
908}
909
910int command_setexposure(struct gspca_dev *gspca_dev)
911{
912 struct sd *sd = (struct sd *) gspca_dev;
913 int ret;
914
915 ret = do_command_extended(gspca_dev, CPIA_COMMAND_SetExposure,
916 sd->params.exposure.gainMode,
917 1,
918 sd->params.exposure.compMode,
919 sd->params.exposure.centreWeight,
920 sd->params.exposure.gain,
921 sd->params.exposure.fineExp,
922 sd->params.exposure.coarseExpLo,
923 sd->params.exposure.coarseExpHi,
924 sd->params.exposure.redComp,
925 sd->params.exposure.green1Comp,
926 sd->params.exposure.green2Comp,
927 sd->params.exposure.blueComp);
928 if (ret)
929 return ret;
930
931 if (sd->params.exposure.expMode != 1) {
932 ret = do_command_extended(gspca_dev, CPIA_COMMAND_SetExposure,
933 0,
934 sd->params.exposure.expMode,
935 0, 0,
936 sd->params.exposure.gain,
937 sd->params.exposure.fineExp,
938 sd->params.exposure.coarseExpLo,
939 sd->params.exposure.coarseExpHi,
940 0, 0, 0, 0);
941 }
942
943 return ret;
944}
945
946int command_setcolourbalance(struct gspca_dev *gspca_dev)
947{
948 struct sd *sd = (struct sd *) gspca_dev;
949
950 if (sd->params.colourBalance.balanceMode == 1) {
951 int ret;
952
953 ret = do_command(gspca_dev, CPIA_COMMAND_SetColourBalance,
954 1,
955 sd->params.colourBalance.redGain,
956 sd->params.colourBalance.greenGain,
957 sd->params.colourBalance.blueGain);
958 if (ret)
959 return ret;
960
961 return do_command(gspca_dev, CPIA_COMMAND_SetColourBalance,
962 3, 0, 0, 0);
963 }
964 if (sd->params.colourBalance.balanceMode == 2) {
965 return do_command(gspca_dev, CPIA_COMMAND_SetColourBalance,
966 2, 0, 0, 0);
967 }
968 if (sd->params.colourBalance.balanceMode == 3) {
969 return do_command(gspca_dev, CPIA_COMMAND_SetColourBalance,
970 3, 0, 0, 0);
971 }
972
973 return -EINVAL;
974}
975
976int command_setcompressiontarget(struct gspca_dev *gspca_dev)
977{
978 struct sd *sd = (struct sd *) gspca_dev;
979
980 return do_command(gspca_dev, CPIA_COMMAND_SetCompressionTarget,
981 sd->params.compressionTarget.frTargeting,
982 sd->params.compressionTarget.targetFR,
983 sd->params.compressionTarget.targetQ, 0);
984}
985
986int command_setyuvtresh(struct gspca_dev *gspca_dev)
987{
988 struct sd *sd = (struct sd *) gspca_dev;
989
990 return do_command(gspca_dev, CPIA_COMMAND_SetYUVThresh,
991 sd->params.yuvThreshold.yThreshold,
992 sd->params.yuvThreshold.uvThreshold, 0, 0);
993}
994
995int command_setcompressionparams(struct gspca_dev *gspca_dev)
996{
997 struct sd *sd = (struct sd *) gspca_dev;
998
999 return do_command_extended(gspca_dev,
1000 CPIA_COMMAND_SetCompressionParams,
1001 0, 0, 0, 0,
1002 sd->params.compressionParams.hysteresis,
1003 sd->params.compressionParams.threshMax,
1004 sd->params.compressionParams.smallStep,
1005 sd->params.compressionParams.largeStep,
1006 sd->params.compressionParams.decimationHysteresis,
1007 sd->params.compressionParams.frDiffStepThresh,
1008 sd->params.compressionParams.qDiffStepThresh,
1009 sd->params.compressionParams.decimationThreshMod);
1010}
1011
1012int command_setcompression(struct gspca_dev *gspca_dev)
1013{
1014 struct sd *sd = (struct sd *) gspca_dev;
1015
1016 return do_command(gspca_dev, CPIA_COMMAND_SetCompression,
1017 sd->params.compression.mode,
1018 sd->params.compression.decimation, 0, 0);
1019}
1020
1021int command_setsensorfps(struct gspca_dev *gspca_dev)
1022{
1023 struct sd *sd = (struct sd *) gspca_dev;
1024
1025 return do_command(gspca_dev, CPIA_COMMAND_SetSensorFPS,
1026 sd->params.sensorFps.divisor,
1027 sd->params.sensorFps.baserate, 0, 0);
1028}
1029
1030int command_setflickerctrl(struct gspca_dev *gspca_dev)
1031{
1032 struct sd *sd = (struct sd *) gspca_dev;
1033
1034 return do_command(gspca_dev, CPIA_COMMAND_SetFlickerCtrl,
1035 sd->params.flickerControl.flickerMode,
1036 sd->params.flickerControl.coarseJump,
1037 sd->params.flickerControl.allowableOverExposure,
1038 0);
1039}
1040
1041int command_setecptiming(struct gspca_dev *gspca_dev)
1042{
1043 struct sd *sd = (struct sd *) gspca_dev;
1044
1045 return do_command(gspca_dev, CPIA_COMMAND_SetECPTiming,
1046 sd->params.ecpTiming, 0, 0, 0);
1047}
1048
1049int command_pause(struct gspca_dev *gspca_dev)
1050{
1051 return do_command(gspca_dev, CPIA_COMMAND_EndStreamCap, 0, 0, 0, 0);
1052}
1053
1054int command_resume(struct gspca_dev *gspca_dev)
1055{
1056 struct sd *sd = (struct sd *) gspca_dev;
1057
1058 return do_command(gspca_dev, CPIA_COMMAND_InitStreamCap,
1059 0, sd->params.streamStartLine, 0, 0);
1060}
1061
1062int command_setlights(struct gspca_dev *gspca_dev)
1063{
1064 struct sd *sd = (struct sd *) gspca_dev;
1065 int ret, p1, p2;
1066
1067 if (!sd->params.qx3.qx3_detected)
1068 return 0;
1069
1070 p1 = (sd->params.qx3.bottomlight == 0) << 1;
1071 p2 = (sd->params.qx3.toplight == 0) << 3;
1072
1073 ret = do_command(gspca_dev, CPIA_COMMAND_WriteVCReg,
1074 0x90, 0x8F, 0x50, 0);
1075 if (ret)
1076 return ret;
1077
1078 return do_command(gspca_dev, CPIA_COMMAND_WriteMCPort, 2, 0,
1079 p1 | p2 | 0xE0, 0);
1080}
1081
1082static int set_flicker(struct gspca_dev *gspca_dev, int on, int apply)
1083{
1084 /* Everything in here is from the Windows driver */
1085/* define for compgain calculation */
1086#if 0
1087#define COMPGAIN(base, curexp, newexp) \
1088 (u8) ((((float) base - 128.0) * ((float) curexp / (float) newexp)) + 128.5)
1089#define EXP_FROM_COMP(basecomp, curcomp, curexp) \
1090 (u16)((float)curexp * (float)(u8)(curcomp + 128) / \
1091 (float)(u8)(basecomp - 128))
1092#else
1093 /* equivalent functions without floating point math */
1094#define COMPGAIN(base, curexp, newexp) \
1095 (u8)(128 + (((u32)(2*(base-128)*curexp + newexp)) / (2 * newexp)))
1096#define EXP_FROM_COMP(basecomp, curcomp, curexp) \
1097 (u16)(((u32)(curexp * (u8)(curcomp + 128)) / (u8)(basecomp - 128)))
1098#endif
1099
1100 struct sd *sd = (struct sd *) gspca_dev;
1101 int currentexp = sd->params.exposure.coarseExpLo +
1102 sd->params.exposure.coarseExpHi * 256;
1103 int ret, startexp;
1104
1105 if (on) {
1106 int cj = sd->params.flickerControl.coarseJump;
1107 sd->params.flickerControl.flickerMode = 1;
1108 sd->params.flickerControl.disabled = 0;
1109 if (sd->params.exposure.expMode != 2) {
1110 sd->params.exposure.expMode = 2;
1111 sd->exposure_status = EXPOSURE_NORMAL;
1112 }
1113 currentexp = currentexp << sd->params.exposure.gain;
1114 sd->params.exposure.gain = 0;
1115 /* round down current exposure to nearest value */
1116 startexp = (currentexp + ROUND_UP_EXP_FOR_FLICKER) / cj;
1117 if (startexp < 1)
1118 startexp = 1;
1119 startexp = (startexp * cj) - 1;
1120 if (FIRMWARE_VERSION(1, 2))
1121 while (startexp > MAX_EXP_102)
1122 startexp -= cj;
1123 else
1124 while (startexp > MAX_EXP)
1125 startexp -= cj;
1126 sd->params.exposure.coarseExpLo = startexp & 0xff;
1127 sd->params.exposure.coarseExpHi = startexp >> 8;
1128 if (currentexp > startexp) {
1129 if (currentexp > (2 * startexp))
1130 currentexp = 2 * startexp;
1131 sd->params.exposure.redComp =
1132 COMPGAIN(COMP_RED, currentexp, startexp);
1133 sd->params.exposure.green1Comp =
1134 COMPGAIN(COMP_GREEN1, currentexp, startexp);
1135 sd->params.exposure.green2Comp =
1136 COMPGAIN(COMP_GREEN2, currentexp, startexp);
1137 sd->params.exposure.blueComp =
1138 COMPGAIN(COMP_BLUE, currentexp, startexp);
1139 } else {
1140 sd->params.exposure.redComp = COMP_RED;
1141 sd->params.exposure.green1Comp = COMP_GREEN1;
1142 sd->params.exposure.green2Comp = COMP_GREEN2;
1143 sd->params.exposure.blueComp = COMP_BLUE;
1144 }
1145 if (FIRMWARE_VERSION(1, 2))
1146 sd->params.exposure.compMode = 0;
1147 else
1148 sd->params.exposure.compMode = 1;
1149
1150 sd->params.apcor.gain1 = 0x18;
1151 sd->params.apcor.gain2 = 0x18;
1152 sd->params.apcor.gain4 = 0x16;
1153 sd->params.apcor.gain8 = 0x14;
1154 } else {
1155 sd->params.flickerControl.flickerMode = 0;
1156 sd->params.flickerControl.disabled = 1;
1157 /* Average equivalent coarse for each comp channel */
1158 startexp = EXP_FROM_COMP(COMP_RED,
1159 sd->params.exposure.redComp, currentexp);
1160 startexp += EXP_FROM_COMP(COMP_GREEN1,
1161 sd->params.exposure.green1Comp, currentexp);
1162 startexp += EXP_FROM_COMP(COMP_GREEN2,
1163 sd->params.exposure.green2Comp, currentexp);
1164 startexp += EXP_FROM_COMP(COMP_BLUE,
1165 sd->params.exposure.blueComp, currentexp);
1166 startexp = startexp >> 2;
1167 while (startexp > MAX_EXP && sd->params.exposure.gain <
1168 sd->params.exposure.gainMode - 1) {
1169 startexp = startexp >> 1;
1170 ++sd->params.exposure.gain;
1171 }
1172 if (FIRMWARE_VERSION(1, 2) && startexp > MAX_EXP_102)
1173 startexp = MAX_EXP_102;
1174 if (startexp > MAX_EXP)
1175 startexp = MAX_EXP;
1176 sd->params.exposure.coarseExpLo = startexp & 0xff;
1177 sd->params.exposure.coarseExpHi = startexp >> 8;
1178 sd->params.exposure.redComp = COMP_RED;
1179 sd->params.exposure.green1Comp = COMP_GREEN1;
1180 sd->params.exposure.green2Comp = COMP_GREEN2;
1181 sd->params.exposure.blueComp = COMP_BLUE;
1182 sd->params.exposure.compMode = 1;
1183 sd->params.apcor.gain1 = 0x18;
1184 sd->params.apcor.gain2 = 0x16;
1185 sd->params.apcor.gain4 = 0x24;
1186 sd->params.apcor.gain8 = 0x34;
1187 }
1188 sd->params.vlOffset.gain1 = 20;
1189 sd->params.vlOffset.gain2 = 24;
1190 sd->params.vlOffset.gain4 = 26;
1191 sd->params.vlOffset.gain8 = 26;
1192
1193 if (apply) {
1194 ret = command_setexposure(gspca_dev);
1195 if (ret)
1196 return ret;
1197
1198 ret = command_setapcor(gspca_dev);
1199 if (ret)
1200 return ret;
1201
1202 ret = command_setvloffset(gspca_dev);
1203 if (ret)
1204 return ret;
1205
1206 ret = command_setflickerctrl(gspca_dev);
1207 if (ret)
1208 return ret;
1209 }
1210
1211 return 0;
1212#undef EXP_FROM_COMP
1213#undef COMPGAIN
1214}
1215
1216/* monitor the exposure and adjust the sensor frame rate if needed */
1217static void monitor_exposure(struct gspca_dev *gspca_dev)
1218{
1219 struct sd *sd = (struct sd *) gspca_dev;
1220 u8 exp_acc, bcomp, gain, coarseL, cmd[8];
1221 int ret, light_exp, dark_exp, very_dark_exp;
1222 int old_exposure, new_exposure, framerate;
1223 int setfps = 0, setexp = 0, setflicker = 0;
1224
1225 /* get necessary stats and register settings from camera */
1226 /* do_command can't handle this, so do it ourselves */
1227 cmd[0] = CPIA_COMMAND_ReadVPRegs >> 8;
1228 cmd[1] = CPIA_COMMAND_ReadVPRegs & 0xff;
1229 cmd[2] = 30;
1230 cmd[3] = 4;
1231 cmd[4] = 9;
1232 cmd[5] = 8;
1233 cmd[6] = 8;
1234 cmd[7] = 0;
1235 ret = cpia_usb_transferCmd(gspca_dev, cmd);
1236 if (ret) {
1237 PDEBUG(D_ERR, "ReadVPRegs(30,4,9,8) - failed: %d", ret);
1238 return;
1239 }
1240 exp_acc = gspca_dev->usb_buf[0];
1241 bcomp = gspca_dev->usb_buf[1];
1242 gain = gspca_dev->usb_buf[2];
1243 coarseL = gspca_dev->usb_buf[3];
1244
1245 light_exp = sd->params.colourParams.brightness +
1246 TC - 50 + EXP_ACC_LIGHT;
1247 if (light_exp > 255)
1248 light_exp = 255;
1249 dark_exp = sd->params.colourParams.brightness +
1250 TC - 50 - EXP_ACC_DARK;
1251 if (dark_exp < 0)
1252 dark_exp = 0;
1253 very_dark_exp = dark_exp / 2;
1254
1255 old_exposure = sd->params.exposure.coarseExpHi * 256 +
1256 sd->params.exposure.coarseExpLo;
1257
1258 if (!sd->params.flickerControl.disabled) {
1259 /* Flicker control on */
1260 int max_comp = FIRMWARE_VERSION(1, 2) ? MAX_COMP :
1261 HIGH_COMP_102;
1262 bcomp += 128; /* decode */
1263 if (bcomp >= max_comp && exp_acc < dark_exp) {
1264 /* dark */
1265 if (exp_acc < very_dark_exp) {
1266 /* very dark */
1267 if (sd->exposure_status == EXPOSURE_VERY_DARK)
1268 ++sd->exposure_count;
1269 else {
1270 sd->exposure_status =
1271 EXPOSURE_VERY_DARK;
1272 sd->exposure_count = 1;
1273 }
1274 } else {
1275 /* just dark */
1276 if (sd->exposure_status == EXPOSURE_DARK)
1277 ++sd->exposure_count;
1278 else {
1279 sd->exposure_status = EXPOSURE_DARK;
1280 sd->exposure_count = 1;
1281 }
1282 }
1283 } else if (old_exposure <= LOW_EXP || exp_acc > light_exp) {
1284 /* light */
1285 if (old_exposure <= VERY_LOW_EXP) {
1286 /* very light */
1287 if (sd->exposure_status == EXPOSURE_VERY_LIGHT)
1288 ++sd->exposure_count;
1289 else {
1290 sd->exposure_status =
1291 EXPOSURE_VERY_LIGHT;
1292 sd->exposure_count = 1;
1293 }
1294 } else {
1295 /* just light */
1296 if (sd->exposure_status == EXPOSURE_LIGHT)
1297 ++sd->exposure_count;
1298 else {
1299 sd->exposure_status = EXPOSURE_LIGHT;
1300 sd->exposure_count = 1;
1301 }
1302 }
1303 } else {
1304 /* not dark or light */
1305 sd->exposure_status = EXPOSURE_NORMAL;
1306 }
1307 } else {
1308 /* Flicker control off */
1309 if (old_exposure >= MAX_EXP && exp_acc < dark_exp) {
1310 /* dark */
1311 if (exp_acc < very_dark_exp) {
1312 /* very dark */
1313 if (sd->exposure_status == EXPOSURE_VERY_DARK)
1314 ++sd->exposure_count;
1315 else {
1316 sd->exposure_status =
1317 EXPOSURE_VERY_DARK;
1318 sd->exposure_count = 1;
1319 }
1320 } else {
1321 /* just dark */
1322 if (sd->exposure_status == EXPOSURE_DARK)
1323 ++sd->exposure_count;
1324 else {
1325 sd->exposure_status = EXPOSURE_DARK;
1326 sd->exposure_count = 1;
1327 }
1328 }
1329 } else if (old_exposure <= LOW_EXP || exp_acc > light_exp) {
1330 /* light */
1331 if (old_exposure <= VERY_LOW_EXP) {
1332 /* very light */
1333 if (sd->exposure_status == EXPOSURE_VERY_LIGHT)
1334 ++sd->exposure_count;
1335 else {
1336 sd->exposure_status =
1337 EXPOSURE_VERY_LIGHT;
1338 sd->exposure_count = 1;
1339 }
1340 } else {
1341 /* just light */
1342 if (sd->exposure_status == EXPOSURE_LIGHT)
1343 ++sd->exposure_count;
1344 else {
1345 sd->exposure_status = EXPOSURE_LIGHT;
1346 sd->exposure_count = 1;
1347 }
1348 }
1349 } else {
1350 /* not dark or light */
1351 sd->exposure_status = EXPOSURE_NORMAL;
1352 }
1353 }
1354
1355 framerate = atomic_read(&sd->fps);
1356 if (framerate > 30 || framerate < 1)
1357 framerate = 1;
1358
1359 if (!sd->params.flickerControl.disabled) {
1360 /* Flicker control on */
1361 if ((sd->exposure_status == EXPOSURE_VERY_DARK ||
1362 sd->exposure_status == EXPOSURE_DARK) &&
1363 sd->exposure_count >= DARK_TIME * framerate &&
1364 sd->params.sensorFps.divisor < 3) {
1365
1366 /* dark for too long */
1367 ++sd->params.sensorFps.divisor;
1368 setfps = 1;
1369
1370 sd->params.flickerControl.coarseJump =
1371 flicker_jumps[sd->mainsFreq]
1372 [sd->params.sensorFps.baserate]
1373 [sd->params.sensorFps.divisor];
1374 setflicker = 1;
1375
1376 new_exposure = sd->params.flickerControl.coarseJump-1;
1377 while (new_exposure < old_exposure / 2)
1378 new_exposure +=
1379 sd->params.flickerControl.coarseJump;
1380 sd->params.exposure.coarseExpLo = new_exposure & 0xff;
1381 sd->params.exposure.coarseExpHi = new_exposure >> 8;
1382 setexp = 1;
1383 sd->exposure_status = EXPOSURE_NORMAL;
1384 PDEBUG(D_CONF, "Automatically decreasing sensor_fps");
1385
1386 } else if ((sd->exposure_status == EXPOSURE_VERY_LIGHT ||
1387 sd->exposure_status == EXPOSURE_LIGHT) &&
1388 sd->exposure_count >= LIGHT_TIME * framerate &&
1389 sd->params.sensorFps.divisor > 0) {
1390
1391 /* light for too long */
1392 int max_exp = FIRMWARE_VERSION(1, 2) ? MAX_EXP_102 :
1393 MAX_EXP;
1394 --sd->params.sensorFps.divisor;
1395 setfps = 1;
1396
1397 sd->params.flickerControl.coarseJump =
1398 flicker_jumps[sd->mainsFreq]
1399 [sd->params.sensorFps.baserate]
1400 [sd->params.sensorFps.divisor];
1401 setflicker = 1;
1402
1403 new_exposure = sd->params.flickerControl.coarseJump-1;
1404 while (new_exposure < 2 * old_exposure &&
1405 new_exposure +
1406 sd->params.flickerControl.coarseJump < max_exp)
1407 new_exposure +=
1408 sd->params.flickerControl.coarseJump;
1409 sd->params.exposure.coarseExpLo = new_exposure & 0xff;
1410 sd->params.exposure.coarseExpHi = new_exposure >> 8;
1411 setexp = 1;
1412 sd->exposure_status = EXPOSURE_NORMAL;
1413 PDEBUG(D_CONF, "Automatically increasing sensor_fps");
1414 }
1415 } else {
1416 /* Flicker control off */
1417 if ((sd->exposure_status == EXPOSURE_VERY_DARK ||
1418 sd->exposure_status == EXPOSURE_DARK) &&
1419 sd->exposure_count >= DARK_TIME * framerate &&
1420 sd->params.sensorFps.divisor < 3) {
1421
1422 /* dark for too long */
1423 ++sd->params.sensorFps.divisor;
1424 setfps = 1;
1425
1426 if (sd->params.exposure.gain > 0) {
1427 --sd->params.exposure.gain;
1428 setexp = 1;
1429 }
1430 sd->exposure_status = EXPOSURE_NORMAL;
1431 PDEBUG(D_CONF, "Automatically decreasing sensor_fps");
1432
1433 } else if ((sd->exposure_status == EXPOSURE_VERY_LIGHT ||
1434 sd->exposure_status == EXPOSURE_LIGHT) &&
1435 sd->exposure_count >= LIGHT_TIME * framerate &&
1436 sd->params.sensorFps.divisor > 0) {
1437
1438 /* light for too long */
1439 --sd->params.sensorFps.divisor;
1440 setfps = 1;
1441
1442 if (sd->params.exposure.gain <
1443 sd->params.exposure.gainMode - 1) {
1444 ++sd->params.exposure.gain;
1445 setexp = 1;
1446 }
1447 sd->exposure_status = EXPOSURE_NORMAL;
1448 PDEBUG(D_CONF, "Automatically increasing sensor_fps");
1449 }
1450 }
1451
1452 if (setexp)
1453 command_setexposure(gspca_dev);
1454
1455 if (setfps)
1456 command_setsensorfps(gspca_dev);
1457
1458 if (setflicker)
1459 command_setflickerctrl(gspca_dev);
1460}
1461
1462/*-----------------------------------------------------------------*/
1463/* if flicker is switched off, this function switches it back on.It checks,
1464 however, that conditions are suitable before restarting it.
1465 This should only be called for firmware version 1.2.
1466
1467 It also adjust the colour balance when an exposure step is detected - as
1468 long as flicker is running
1469*/
1470static void restart_flicker(struct gspca_dev *gspca_dev)
1471{
1472 struct sd *sd = (struct sd *) gspca_dev;
1473 int cam_exposure, old_exp;
1474
1475 if (!FIRMWARE_VERSION(1, 2))
1476 return;
1477
1478 cam_exposure = atomic_read(&sd->cam_exposure);
1479
1480 if (sd->params.flickerControl.flickerMode == 0 ||
1481 cam_exposure == 0)
1482 return;
1483
1484 old_exp = sd->params.exposure.coarseExpLo +
1485 sd->params.exposure.coarseExpHi*256;
1486 /*
1487 see how far away camera exposure is from a valid
1488 flicker exposure value
1489 */
1490 cam_exposure %= sd->params.flickerControl.coarseJump;
1491 if (!sd->params.flickerControl.disabled &&
1492 cam_exposure <= sd->params.flickerControl.coarseJump - 3) {
1493 /* Flicker control auto-disabled */
1494 sd->params.flickerControl.disabled = 1;
1495 }
1496
1497 if (sd->params.flickerControl.disabled &&
1498 old_exp > sd->params.flickerControl.coarseJump +
1499 ROUND_UP_EXP_FOR_FLICKER) {
1500 /* exposure is now high enough to switch
1501 flicker control back on */
1502 set_flicker(gspca_dev, 1, 1);
1503 }
1504}
1505
1506/* this function is called at probe time */
1507static int sd_config(struct gspca_dev *gspca_dev,
1508 const struct usb_device_id *id)
1509{
1510 struct cam *cam;
1511
1512 reset_camera_params(gspca_dev);
1513
1514 PDEBUG(D_PROBE, "cpia CPiA camera detected (vid/pid 0x%04X:0x%04X)",
1515 id->idVendor, id->idProduct);
1516
1517 cam = &gspca_dev->cam;
1518 cam->cam_mode = mode;
1519 cam->nmodes = ARRAY_SIZE(mode);
1520
1521 sd_setfreq(gspca_dev, FREQ_DEF);
1522
1523 return 0;
1524}
1525
1526/* -- start the camera -- */
1527static int sd_start(struct gspca_dev *gspca_dev)
1528{
1529 struct sd *sd = (struct sd *) gspca_dev;
1530 int priv, ret;
1531
1532 /* Start the camera in low power mode */
1533 if (goto_low_power(gspca_dev)) {
1534 if (sd->params.status.systemState != WARM_BOOT_STATE) {
1535 PDEBUG(D_ERR, "unexpected systemstate: %02x",
1536 sd->params.status.systemState);
1537 printstatus(&sd->params);
1538 return -ENODEV;
1539 }
1540
1541 /* FIXME: this is just dirty trial and error */
1542 ret = goto_high_power(gspca_dev);
1543 if (ret)
1544 return ret;
1545
1546 ret = do_command(gspca_dev, CPIA_COMMAND_DiscardFrame,
1547 0, 0, 0, 0);
1548 if (ret)
1549 return ret;
1550
1551 ret = goto_low_power(gspca_dev);
1552 if (ret)
1553 return ret;
1554 }
1555
1556 /* procedure described in developer's guide p3-28 */
1557
1558 /* Check the firmware version. */
1559 sd->params.version.firmwareVersion = 0;
1560 get_version_information(gspca_dev);
1561 if (sd->params.version.firmwareVersion != 1) {
1562 PDEBUG(D_ERR, "only firmware version 1 is supported (got: %d)",
1563 sd->params.version.firmwareVersion);
1564 return -ENODEV;
1565 }
1566
1567 /* A bug in firmware 1-02 limits gainMode to 2 */
1568 if (sd->params.version.firmwareRevision <= 2 &&
1569 sd->params.exposure.gainMode > 2) {
1570 sd->params.exposure.gainMode = 2;
1571 }
1572
1573 /* set QX3 detected flag */
1574 sd->params.qx3.qx3_detected = (sd->params.pnpID.vendor == 0x0813 &&
1575 sd->params.pnpID.product == 0x0001);
1576
1577 /* The fatal error checking should be done after
1578 * the camera powers up (developer's guide p 3-38) */
1579
1580 /* Set streamState before transition to high power to avoid bug
1581 * in firmware 1-02 */
1582 ret = do_command(gspca_dev, CPIA_COMMAND_ModifyCameraStatus,
1583 STREAMSTATE, 0, STREAM_NOT_READY, 0);
1584 if (ret)
1585 return ret;
1586
1587 /* GotoHiPower */
1588 ret = goto_high_power(gspca_dev);
1589 if (ret)
1590 return ret;
1591
1592 /* Check the camera status */
1593 ret = do_command(gspca_dev, CPIA_COMMAND_GetCameraStatus, 0, 0, 0, 0);
1594 if (ret)
1595 return ret;
1596
1597 if (sd->params.status.fatalError) {
1598 PDEBUG(D_ERR, "fatal_error: %04x, vp_status: %04x",
1599 sd->params.status.fatalError,
1600 sd->params.status.vpStatus);
1601 return -EIO;
1602 }
1603
1604 /* VPVersion can't be retrieved before the camera is in HiPower,
1605 * so get it here instead of in get_version_information. */
1606 ret = do_command(gspca_dev, CPIA_COMMAND_GetVPVersion, 0, 0, 0, 0);
1607 if (ret)
1608 return ret;
1609
1610 /* Determine video mode settings */
1611 sd->params.streamStartLine = 120;
1612
1613 priv = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
1614 if (priv & 0x01) { /* crop */
1615 sd->params.roi.colStart = 2;
1616 sd->params.roi.rowStart = 6;
1617 } else {
1618 sd->params.roi.colStart = 0;
1619 sd->params.roi.rowStart = 0;
1620 }
1621
1622 if (priv & 0x02) { /* quarter */
1623 sd->params.format.videoSize = VIDEOSIZE_QCIF;
1624 sd->params.roi.colStart /= 2;
1625 sd->params.roi.rowStart /= 2;
1626 sd->params.streamStartLine /= 2;
1627 } else
1628 sd->params.format.videoSize = VIDEOSIZE_CIF;
1629
1630 sd->params.roi.colEnd = sd->params.roi.colStart +
1631 (gspca_dev->width >> 3);
1632 sd->params.roi.rowEnd = sd->params.roi.rowStart +
1633 (gspca_dev->height >> 2);
1634
1635 /* And now set the camera to a known state */
1636 ret = do_command(gspca_dev, CPIA_COMMAND_SetGrabMode,
1637 CPIA_GRAB_CONTINEOUS, 0, 0, 0);
1638 if (ret)
1639 return ret;
1640 /* We start with compression disabled, as we need one uncompressed
1641 frame to handle later compressed frames */
1642 ret = do_command(gspca_dev, CPIA_COMMAND_SetCompression,
1643 CPIA_COMPRESSION_NONE,
1644 NO_DECIMATION, 0, 0);
1645 if (ret)
1646 return ret;
1647 ret = command_setcompressiontarget(gspca_dev);
1648 if (ret)
1649 return ret;
1650 ret = command_setcolourparams(gspca_dev);
1651 if (ret)
1652 return ret;
1653 ret = command_setformat(gspca_dev);
1654 if (ret)
1655 return ret;
1656 ret = command_setyuvtresh(gspca_dev);
1657 if (ret)
1658 return ret;
1659 ret = command_setecptiming(gspca_dev);
1660 if (ret)
1661 return ret;
1662 ret = command_setcompressionparams(gspca_dev);
1663 if (ret)
1664 return ret;
1665 ret = command_setexposure(gspca_dev);
1666 if (ret)
1667 return ret;
1668 ret = command_setcolourbalance(gspca_dev);
1669 if (ret)
1670 return ret;
1671 ret = command_setsensorfps(gspca_dev);
1672 if (ret)
1673 return ret;
1674 ret = command_setapcor(gspca_dev);
1675 if (ret)
1676 return ret;
1677 ret = command_setflickerctrl(gspca_dev);
1678 if (ret)
1679 return ret;
1680 ret = command_setvloffset(gspca_dev);
1681 if (ret)
1682 return ret;
1683
1684 /* Start stream */
1685 ret = command_resume(gspca_dev);
1686 if (ret)
1687 return ret;
1688
1689 /* Wait 6 frames before turning compression on for the sensor to get
1690 all settings and AEC/ACB to settle */
1691 sd->first_frame = 6;
1692 sd->exposure_status = EXPOSURE_NORMAL;
1693 sd->exposure_count = 0;
1694 atomic_set(&sd->cam_exposure, 0);
1695 atomic_set(&sd->fps, 0);
1696
1697 return 0;
1698}
1699
1700static void sd_stopN(struct gspca_dev *gspca_dev)
1701{
1702 command_pause(gspca_dev);
1703
1704 /* save camera state for later open (developers guide ch 3.5.3) */
1705 save_camera_state(gspca_dev);
1706
1707 /* GotoLoPower */
1708 goto_low_power(gspca_dev);
1709
1710 /* Update the camera status */
1711 do_command(gspca_dev, CPIA_COMMAND_GetCameraStatus, 0, 0, 0, 0);
1712}
1713
1714/* this function is called at probe and resume time */
1715static int sd_init(struct gspca_dev *gspca_dev)
1716{
1717 struct sd *sd = (struct sd *) gspca_dev;
1718 int ret;
1719
1720 /* Start / Stop the camera to make sure we are talking to
1721 a supported camera, and to get some information from it
1722 to print. */
1723 ret = sd_start(gspca_dev);
1724 if (ret)
1725 return ret;
1726
1727 sd_stopN(gspca_dev);
1728
1729 PDEBUG(D_PROBE, "CPIA Version: %d.%02d (%d.%d)",
1730 sd->params.version.firmwareVersion,
1731 sd->params.version.firmwareRevision,
1732 sd->params.version.vcVersion,
1733 sd->params.version.vcRevision);
1734 PDEBUG(D_PROBE, "CPIA PnP-ID: %04x:%04x:%04x",
1735 sd->params.pnpID.vendor, sd->params.pnpID.product,
1736 sd->params.pnpID.deviceRevision);
1737 PDEBUG(D_PROBE, "VP-Version: %d.%d %04x",
1738 sd->params.vpVersion.vpVersion,
1739 sd->params.vpVersion.vpRevision,
1740 sd->params.vpVersion.cameraHeadID);
1741
1742 return 0;
1743}
1744
1745static void sd_pkt_scan(struct gspca_dev *gspca_dev,
1746 u8 *data,
1747 int len)
1748{
1749 struct sd *sd = (struct sd *) gspca_dev;
1750
1751 /* Check for SOF */
1752 if (len >= 64 &&
1753 data[0] == MAGIC_0 && data[1] == MAGIC_1 &&
1754 data[16] == sd->params.format.videoSize &&
1755 data[17] == sd->params.format.subSample &&
1756 data[18] == sd->params.format.yuvOrder &&
1757 data[24] == sd->params.roi.colStart &&
1758 data[25] == sd->params.roi.colEnd &&
1759 data[26] == sd->params.roi.rowStart &&
1760 data[27] == sd->params.roi.rowEnd) {
1761 struct gspca_frame *frame = gspca_get_i_frame(gspca_dev);
1762
1763 atomic_set(&sd->cam_exposure, data[39] * 2);
1764 atomic_set(&sd->fps, data[41]);
1765
1766 if (frame == NULL) {
1767 gspca_dev->last_packet_type = DISCARD_PACKET;
1768 return;
1769 }
1770
1771 /* Check for proper EOF for last frame */
1772 if ((frame->data_end - frame->data) > 4 &&
1773 frame->data_end[-4] == 0xff &&
1774 frame->data_end[-3] == 0xff &&
1775 frame->data_end[-2] == 0xff &&
1776 frame->data_end[-1] == 0xff)
1777 gspca_frame_add(gspca_dev, LAST_PACKET,
1778 NULL, 0);
1779
1780 gspca_frame_add(gspca_dev, FIRST_PACKET, data, len);
1781 return;
1782 }
1783
1784 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
1785}
1786
1787static void sd_dq_callback(struct gspca_dev *gspca_dev)
1788{
1789 struct sd *sd = (struct sd *) gspca_dev;
1790
1791 /* Set the normal compression settings once we have captured a
1792 few uncompressed frames (and AEC has hopefully settled) */
1793 if (sd->first_frame) {
1794 sd->first_frame--;
1795 if (sd->first_frame == 0)
1796 command_setcompression(gspca_dev);
1797 }
1798
1799 /* Switch flicker control back on if it got turned off */
1800 restart_flicker(gspca_dev);
1801
1802 /* If AEC is enabled, monitor the exposure and
1803 adjust the sensor frame rate if needed */
1804 if (sd->params.exposure.expMode == 2)
1805 monitor_exposure(gspca_dev);
1806
1807 /* Update our knowledge of the camera state */
1808 do_command(gspca_dev, CPIA_COMMAND_GetExposure, 0, 0, 0, 0);
1809 if (sd->params.qx3.qx3_detected)
1810 do_command(gspca_dev, CPIA_COMMAND_ReadMCPorts, 0, 0, 0, 0);
1811}
1812
1813static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
1814{
1815 struct sd *sd = (struct sd *) gspca_dev;
1816 int ret;
1817
1818 sd->params.colourParams.brightness = val;
1819 sd->params.flickerControl.allowableOverExposure =
1820 find_over_exposure(sd->params.colourParams.brightness);
1821 if (gspca_dev->streaming) {
1822 ret = command_setcolourparams(gspca_dev);
1823 if (ret)
1824 return ret;
1825 return command_setflickerctrl(gspca_dev);
1826 }
1827 return 0;
1828}
1829
1830static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
1831{
1832 struct sd *sd = (struct sd *) gspca_dev;
1833
1834 *val = sd->params.colourParams.brightness;
1835 return 0;
1836}
1837
1838static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
1839{
1840 struct sd *sd = (struct sd *) gspca_dev;
1841
1842 sd->params.colourParams.contrast = val;
1843 if (gspca_dev->streaming)
1844 return command_setcolourparams(gspca_dev);
1845
1846 return 0;
1847}
1848
1849static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
1850{
1851 struct sd *sd = (struct sd *) gspca_dev;
1852
1853 *val = sd->params.colourParams.contrast;
1854 return 0;
1855}
1856
1857static int sd_setsaturation(struct gspca_dev *gspca_dev, __s32 val)
1858{
1859 struct sd *sd = (struct sd *) gspca_dev;
1860
1861 sd->params.colourParams.saturation = val;
1862 if (gspca_dev->streaming)
1863 return command_setcolourparams(gspca_dev);
1864
1865 return 0;
1866}
1867
1868static int sd_getsaturation(struct gspca_dev *gspca_dev, __s32 *val)
1869{
1870 struct sd *sd = (struct sd *) gspca_dev;
1871
1872 *val = sd->params.colourParams.saturation;
1873 return 0;
1874}
1875
1876static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
1877{
1878 struct sd *sd = (struct sd *) gspca_dev;
1879 int on;
1880
1881 switch (val) {
1882 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
1883 on = 0;
1884 break;
1885 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
1886 on = 1;
1887 sd->mainsFreq = 0;
1888 break;
1889 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
1890 on = 1;
1891 sd->mainsFreq = 1;
1892 break;
1893 default:
1894 return -EINVAL;
1895 }
1896
1897 sd->freq = val;
1898 sd->params.flickerControl.coarseJump =
1899 flicker_jumps[sd->mainsFreq]
1900 [sd->params.sensorFps.baserate]
1901 [sd->params.sensorFps.divisor];
1902
1903 return set_flicker(gspca_dev, on, gspca_dev->streaming);
1904}
1905
1906static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
1907{
1908 struct sd *sd = (struct sd *) gspca_dev;
1909
1910 *val = sd->freq;
1911 return 0;
1912}
1913
1914static int sd_setcomptarget(struct gspca_dev *gspca_dev, __s32 val)
1915{
1916 struct sd *sd = (struct sd *) gspca_dev;
1917
1918 sd->params.compressionTarget.frTargeting = val;
1919 if (gspca_dev->streaming)
1920 return command_setcompressiontarget(gspca_dev);
1921
1922 return 0;
1923}
1924
1925static int sd_getcomptarget(struct gspca_dev *gspca_dev, __s32 *val)
1926{
1927 struct sd *sd = (struct sd *) gspca_dev;
1928
1929 *val = sd->params.compressionTarget.frTargeting;
1930 return 0;
1931}
1932
1933static int sd_querymenu(struct gspca_dev *gspca_dev,
1934 struct v4l2_querymenu *menu)
1935{
1936 switch (menu->id) {
1937 case V4L2_CID_POWER_LINE_FREQUENCY:
1938 switch (menu->index) {
1939 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
1940 strcpy((char *) menu->name, "NoFliker");
1941 return 0;
1942 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
1943 strcpy((char *) menu->name, "50 Hz");
1944 return 0;
1945 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
1946 strcpy((char *) menu->name, "60 Hz");
1947 return 0;
1948 }
1949 break;
1950 case V4L2_CID_COMP_TARGET:
1951 switch (menu->index) {
1952 case CPIA_COMPRESSION_TARGET_QUALITY:
1953 strcpy((char *) menu->name, "Quality");
1954 return 0;
1955 case CPIA_COMPRESSION_TARGET_FRAMERATE:
1956 strcpy((char *) menu->name, "Framerate");
1957 return 0;
1958 }
1959 break;
1960 }
1961 return -EINVAL;
1962}
1963
1964/* sub-driver description */
1965static const struct sd_desc sd_desc = {
1966 .name = MODULE_NAME,
1967 .ctrls = sd_ctrls,
1968 .nctrls = ARRAY_SIZE(sd_ctrls),
1969 .config = sd_config,
1970 .init = sd_init,
1971 .start = sd_start,
1972 .stopN = sd_stopN,
1973 .dq_callback = sd_dq_callback,
1974 .pkt_scan = sd_pkt_scan,
1975 .querymenu = sd_querymenu,
1976};
1977
1978/* -- module initialisation -- */
1979static const __devinitdata struct usb_device_id device_table[] = {
1980 {USB_DEVICE(0x0553, 0x0002)},
1981 {USB_DEVICE(0x0813, 0x0001)},
1982 {}
1983};
1984MODULE_DEVICE_TABLE(usb, device_table);
1985
1986/* -- device connect -- */
1987static int sd_probe(struct usb_interface *intf,
1988 const struct usb_device_id *id)
1989{
1990 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
1991 THIS_MODULE);
1992}
1993
1994static struct usb_driver sd_driver = {
1995 .name = MODULE_NAME,
1996 .id_table = device_table,
1997 .probe = sd_probe,
1998 .disconnect = gspca_disconnect,
1999#ifdef CONFIG_PM
2000 .suspend = gspca_suspend,
2001 .resume = gspca_resume,
2002#endif
2003};
2004
2005/* -- module insert / remove -- */
2006static int __init sd_mod_init(void)
2007{
2008 int ret;
2009 ret = usb_register(&sd_driver);
2010 if (ret < 0)
2011 return ret;
2012 PDEBUG(D_PROBE, "registered");
2013 return 0;
2014}
2015static void __exit sd_mod_exit(void)
2016{
2017 usb_deregister(&sd_driver);
2018 PDEBUG(D_PROBE, "deregistered");
2019}
2020
2021module_init(sd_mod_init);
2022module_exit(sd_mod_exit);
diff --git a/drivers/media/video/gspca/etoms.c b/drivers/media/video/gspca/etoms.c
index fdf4c0ec5e7a..ecd4d743d2bc 100644
--- a/drivers/media/video/gspca/etoms.c
+++ b/drivers/media/video/gspca/etoms.c
@@ -52,7 +52,7 @@ static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
52static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val); 52static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
53static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val); 53static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);
54 54
55static struct ctrl sd_ctrls[] = { 55static const struct ctrl sd_ctrls[] = {
56 { 56 {
57 { 57 {
58 .id = V4L2_CID_BRIGHTNESS, 58 .id = V4L2_CID_BRIGHTNESS,
@@ -851,7 +851,7 @@ static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)
851} 851}
852 852
853/* sub-driver description */ 853/* sub-driver description */
854static struct sd_desc sd_desc = { 854static const struct sd_desc sd_desc = {
855 .name = MODULE_NAME, 855 .name = MODULE_NAME,
856 .ctrls = sd_ctrls, 856 .ctrls = sd_ctrls,
857 .nctrls = ARRAY_SIZE(sd_ctrls), 857 .nctrls = ARRAY_SIZE(sd_ctrls),
diff --git a/drivers/media/video/gspca/gl860/gl860.c b/drivers/media/video/gspca/gl860/gl860.c
index 4878c8f66543..9e42476c0eaf 100644
--- a/drivers/media/video/gspca/gl860/gl860.c
+++ b/drivers/media/video/gspca/gl860/gl860.c
@@ -161,7 +161,7 @@ static int gl860_build_control_table(struct gspca_dev *gspca_dev)
161 161
162/*==================== sud-driver structure initialisation =================*/ 162/*==================== sud-driver structure initialisation =================*/
163 163
164static struct sd_desc sd_desc_mi1320 = { 164static const struct sd_desc sd_desc_mi1320 = {
165 .name = MODULE_NAME, 165 .name = MODULE_NAME,
166 .ctrls = sd_ctrls_mi1320, 166 .ctrls = sd_ctrls_mi1320,
167 .nctrls = GL860_NCTRLS, 167 .nctrls = GL860_NCTRLS,
@@ -174,7 +174,7 @@ static struct sd_desc sd_desc_mi1320 = {
174 .dq_callback = sd_callback, 174 .dq_callback = sd_callback,
175}; 175};
176 176
177static struct sd_desc sd_desc_mi2020 = { 177static const struct sd_desc sd_desc_mi2020 = {
178 .name = MODULE_NAME, 178 .name = MODULE_NAME,
179 .ctrls = sd_ctrls_mi2020, 179 .ctrls = sd_ctrls_mi2020,
180 .nctrls = GL860_NCTRLS, 180 .nctrls = GL860_NCTRLS,
@@ -187,7 +187,7 @@ static struct sd_desc sd_desc_mi2020 = {
187 .dq_callback = sd_callback, 187 .dq_callback = sd_callback,
188}; 188};
189 189
190static struct sd_desc sd_desc_mi2020b = { 190static const struct sd_desc sd_desc_mi2020b = {
191 .name = MODULE_NAME, 191 .name = MODULE_NAME,
192 .ctrls = sd_ctrls_mi2020b, 192 .ctrls = sd_ctrls_mi2020b,
193 .nctrls = GL860_NCTRLS, 193 .nctrls = GL860_NCTRLS,
@@ -200,7 +200,7 @@ static struct sd_desc sd_desc_mi2020b = {
200 .dq_callback = sd_callback, 200 .dq_callback = sd_callback,
201}; 201};
202 202
203static struct sd_desc sd_desc_ov2640 = { 203static const struct sd_desc sd_desc_ov2640 = {
204 .name = MODULE_NAME, 204 .name = MODULE_NAME,
205 .ctrls = sd_ctrls_ov2640, 205 .ctrls = sd_ctrls_ov2640,
206 .nctrls = GL860_NCTRLS, 206 .nctrls = GL860_NCTRLS,
@@ -213,7 +213,7 @@ static struct sd_desc sd_desc_ov2640 = {
213 .dq_callback = sd_callback, 213 .dq_callback = sd_callback,
214}; 214};
215 215
216static struct sd_desc sd_desc_ov9655 = { 216static const struct sd_desc sd_desc_ov9655 = {
217 .name = MODULE_NAME, 217 .name = MODULE_NAME,
218 .ctrls = sd_ctrls_ov9655, 218 .ctrls = sd_ctrls_ov9655,
219 .nctrls = GL860_NCTRLS, 219 .nctrls = GL860_NCTRLS,
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c
index bd6214d4ab3b..222af479150b 100644
--- a/drivers/media/video/gspca/gspca.c
+++ b/drivers/media/video/gspca/gspca.c
@@ -3,6 +3,9 @@
3 * 3 *
4 * Copyright (C) 2008-2009 Jean-Francois Moine (http://moinejf.free.fr) 4 * Copyright (C) 2008-2009 Jean-Francois Moine (http://moinejf.free.fr)
5 * 5 *
6 * Camera button input handling by Márton Németh
7 * Copyright (C) 2009-2010 Márton Németh <nm127@freemail.hu>
8 *
6 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your 11 * Free Software Foundation; either version 2 of the License, or (at your
@@ -37,6 +40,11 @@
37 40
38#include "gspca.h" 41#include "gspca.h"
39 42
43#ifdef CONFIG_INPUT
44#include <linux/input.h>
45#include <linux/usb/input.h>
46#endif
47
40/* global values */ 48/* global values */
41#define DEF_NURBS 3 /* default number of URBs */ 49#define DEF_NURBS 3 /* default number of URBs */
42#if DEF_NURBS > MAX_NURBS 50#if DEF_NURBS > MAX_NURBS
@@ -47,7 +55,7 @@ MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
47MODULE_DESCRIPTION("GSPCA USB Camera Driver"); 55MODULE_DESCRIPTION("GSPCA USB Camera Driver");
48MODULE_LICENSE("GPL"); 56MODULE_LICENSE("GPL");
49 57
50#define DRIVER_VERSION_NUMBER KERNEL_VERSION(2, 8, 0) 58#define DRIVER_VERSION_NUMBER KERNEL_VERSION(2, 9, 0)
51 59
52#ifdef GSPCA_DEBUG 60#ifdef GSPCA_DEBUG
53int gspca_debug = D_ERR | D_PROBE; 61int gspca_debug = D_ERR | D_PROBE;
@@ -104,15 +112,185 @@ static const struct vm_operations_struct gspca_vm_ops = {
104 .close = gspca_vm_close, 112 .close = gspca_vm_close,
105}; 113};
106 114
115/*
116 * Input and interrupt endpoint handling functions
117 */
118#ifdef CONFIG_INPUT
119static void int_irq(struct urb *urb)
120{
121 struct gspca_dev *gspca_dev = (struct gspca_dev *) urb->context;
122 int ret;
123
124 ret = urb->status;
125 switch (ret) {
126 case 0:
127 if (gspca_dev->sd_desc->int_pkt_scan(gspca_dev,
128 urb->transfer_buffer, urb->actual_length) < 0) {
129 PDEBUG(D_ERR, "Unknown packet received");
130 }
131 break;
132
133 case -ENOENT:
134 case -ECONNRESET:
135 case -ENODEV:
136 case -ESHUTDOWN:
137 /* Stop is requested either by software or hardware is gone,
138 * keep the ret value non-zero and don't resubmit later.
139 */
140 break;
141
142 default:
143 PDEBUG(D_ERR, "URB error %i, resubmitting", urb->status);
144 urb->status = 0;
145 ret = 0;
146 }
147
148 if (ret == 0) {
149 ret = usb_submit_urb(urb, GFP_ATOMIC);
150 if (ret < 0)
151 PDEBUG(D_ERR, "Resubmit URB failed with error %i", ret);
152 }
153}
154
155static int gspca_input_connect(struct gspca_dev *dev)
156{
157 struct input_dev *input_dev;
158 int err = 0;
159
160 dev->input_dev = NULL;
161 if (dev->sd_desc->int_pkt_scan || dev->sd_desc->other_input) {
162 input_dev = input_allocate_device();
163 if (!input_dev)
164 return -ENOMEM;
165
166 usb_make_path(dev->dev, dev->phys, sizeof(dev->phys));
167 strlcat(dev->phys, "/input0", sizeof(dev->phys));
168
169 input_dev->name = dev->sd_desc->name;
170 input_dev->phys = dev->phys;
171
172 usb_to_input_id(dev->dev, &input_dev->id);
173
174 input_dev->evbit[0] = BIT_MASK(EV_KEY);
175 input_dev->keybit[BIT_WORD(KEY_CAMERA)] = BIT_MASK(KEY_CAMERA);
176 input_dev->dev.parent = &dev->dev->dev;
177
178 err = input_register_device(input_dev);
179 if (err) {
180 PDEBUG(D_ERR, "Input device registration failed "
181 "with error %i", err);
182 input_dev->dev.parent = NULL;
183 input_free_device(input_dev);
184 } else {
185 dev->input_dev = input_dev;
186 }
187 }
188
189 return err;
190}
191
192static int alloc_and_submit_int_urb(struct gspca_dev *gspca_dev,
193 struct usb_endpoint_descriptor *ep)
194{
195 unsigned int buffer_len;
196 int interval;
197 struct urb *urb;
198 struct usb_device *dev;
199 void *buffer = NULL;
200 int ret = -EINVAL;
201
202 buffer_len = ep->wMaxPacketSize;
203 interval = ep->bInterval;
204 PDEBUG(D_PROBE, "found int in endpoint: 0x%x, "
205 "buffer_len=%u, interval=%u",
206 ep->bEndpointAddress, buffer_len, interval);
207
208 dev = gspca_dev->dev;
209
210 urb = usb_alloc_urb(0, GFP_KERNEL);
211 if (!urb) {
212 ret = -ENOMEM;
213 goto error;
214 }
215
216 buffer = usb_buffer_alloc(dev, ep->wMaxPacketSize,
217 GFP_KERNEL, &urb->transfer_dma);
218 if (!buffer) {
219 ret = -ENOMEM;
220 goto error_buffer;
221 }
222 usb_fill_int_urb(urb, dev,
223 usb_rcvintpipe(dev, ep->bEndpointAddress),
224 buffer, buffer_len,
225 int_irq, (void *)gspca_dev, interval);
226 gspca_dev->int_urb = urb;
227 ret = usb_submit_urb(urb, GFP_KERNEL);
228 if (ret < 0) {
229 PDEBUG(D_ERR, "submit URB failed with error %i", ret);
230 goto error_submit;
231 }
232 return ret;
233
234error_submit:
235 usb_buffer_free(dev,
236 urb->transfer_buffer_length,
237 urb->transfer_buffer,
238 urb->transfer_dma);
239error_buffer:
240 usb_free_urb(urb);
241error:
242 return ret;
243}
244
245static void gspca_input_create_urb(struct gspca_dev *gspca_dev)
246{
247 struct usb_interface *intf;
248 struct usb_host_interface *intf_desc;
249 struct usb_endpoint_descriptor *ep;
250 int i;
251
252 if (gspca_dev->sd_desc->int_pkt_scan) {
253 intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
254 intf_desc = intf->cur_altsetting;
255 for (i = 0; i < intf_desc->desc.bNumEndpoints; i++) {
256 ep = &intf_desc->endpoint[i].desc;
257 if (usb_endpoint_dir_in(ep) &&
258 usb_endpoint_xfer_int(ep)) {
259
260 alloc_and_submit_int_urb(gspca_dev, ep);
261 break;
262 }
263 }
264 }
265}
266
267static void gspca_input_destroy_urb(struct gspca_dev *gspca_dev)
268{
269 struct urb *urb;
270
271 urb = gspca_dev->int_urb;
272 if (urb) {
273 gspca_dev->int_urb = NULL;
274 usb_kill_urb(urb);
275 usb_buffer_free(gspca_dev->dev,
276 urb->transfer_buffer_length,
277 urb->transfer_buffer,
278 urb->transfer_dma);
279 usb_free_urb(urb);
280 }
281}
282#else
283#define gspca_input_connect(gspca_dev) 0
284#define gspca_input_create_urb(gspca_dev)
285#define gspca_input_destroy_urb(gspca_dev)
286#endif
287
107/* get the current input frame buffer */ 288/* get the current input frame buffer */
108struct gspca_frame *gspca_get_i_frame(struct gspca_dev *gspca_dev) 289struct gspca_frame *gspca_get_i_frame(struct gspca_dev *gspca_dev)
109{ 290{
110 struct gspca_frame *frame; 291 struct gspca_frame *frame;
111 int i;
112 292
113 i = gspca_dev->fr_i; 293 frame = gspca_dev->cur_frame;
114 i = gspca_dev->fr_queue[i];
115 frame = &gspca_dev->frame[i];
116 if ((frame->v4l2_buf.flags & BUF_ALL_FLAGS) 294 if ((frame->v4l2_buf.flags & BUF_ALL_FLAGS)
117 != V4L2_BUF_FLAG_QUEUED) 295 != V4L2_BUF_FLAG_QUEUED)
118 return NULL; 296 return NULL;
@@ -486,11 +664,13 @@ static struct usb_host_endpoint *get_ep(struct gspca_dev *gspca_dev)
486 i, ep->desc.bEndpointAddress); 664 i, ep->desc.bEndpointAddress);
487 gspca_dev->alt = i; /* memorize the current alt setting */ 665 gspca_dev->alt = i; /* memorize the current alt setting */
488 if (gspca_dev->nbalt > 1) { 666 if (gspca_dev->nbalt > 1) {
667 gspca_input_destroy_urb(gspca_dev);
489 ret = usb_set_interface(gspca_dev->dev, gspca_dev->iface, i); 668 ret = usb_set_interface(gspca_dev->dev, gspca_dev->iface, i);
490 if (ret < 0) { 669 if (ret < 0) {
491 err("set alt %d err %d", i, ret); 670 err("set alt %d err %d", i, ret);
492 return NULL; 671 ep = NULL;
493 } 672 }
673 gspca_input_create_urb(gspca_dev);
494 } 674 }
495 return ep; 675 return ep;
496} 676}
@@ -534,26 +714,22 @@ static int create_urbs(struct gspca_dev *gspca_dev,
534 nurbs = 1; 714 nurbs = 1;
535 } 715 }
536 716
537 gspca_dev->nurbs = nurbs;
538 for (n = 0; n < nurbs; n++) { 717 for (n = 0; n < nurbs; n++) {
539 urb = usb_alloc_urb(npkt, GFP_KERNEL); 718 urb = usb_alloc_urb(npkt, GFP_KERNEL);
540 if (!urb) { 719 if (!urb) {
541 err("usb_alloc_urb failed"); 720 err("usb_alloc_urb failed");
542 destroy_urbs(gspca_dev);
543 return -ENOMEM; 721 return -ENOMEM;
544 } 722 }
723 gspca_dev->urb[n] = urb;
545 urb->transfer_buffer = usb_buffer_alloc(gspca_dev->dev, 724 urb->transfer_buffer = usb_buffer_alloc(gspca_dev->dev,
546 bsize, 725 bsize,
547 GFP_KERNEL, 726 GFP_KERNEL,
548 &urb->transfer_dma); 727 &urb->transfer_dma);
549 728
550 if (urb->transfer_buffer == NULL) { 729 if (urb->transfer_buffer == NULL) {
551 usb_free_urb(urb); 730 err("usb_buffer_alloc failed");
552 err("usb_buffer_urb failed");
553 destroy_urbs(gspca_dev);
554 return -ENOMEM; 731 return -ENOMEM;
555 } 732 }
556 gspca_dev->urb[n] = urb;
557 urb->dev = gspca_dev->dev; 733 urb->dev = gspca_dev->dev;
558 urb->context = gspca_dev; 734 urb->context = gspca_dev;
559 urb->transfer_buffer_length = bsize; 735 urb->transfer_buffer_length = bsize;
@@ -585,6 +761,7 @@ static int create_urbs(struct gspca_dev *gspca_dev,
585static int gspca_init_transfer(struct gspca_dev *gspca_dev) 761static int gspca_init_transfer(struct gspca_dev *gspca_dev)
586{ 762{
587 struct usb_host_endpoint *ep; 763 struct usb_host_endpoint *ep;
764 struct urb *urb;
588 int n, ret; 765 int n, ret;
589 766
590 if (mutex_lock_interruptible(&gspca_dev->usb_lock)) 767 if (mutex_lock_interruptible(&gspca_dev->usb_lock))
@@ -595,6 +772,8 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
595 goto out; 772 goto out;
596 } 773 }
597 774
775 gspca_dev->usb_err = 0;
776
598 /* set the higher alternate setting and 777 /* set the higher alternate setting and
599 * loop until urb submit succeeds */ 778 * loop until urb submit succeeds */
600 if (gspca_dev->cam.reverse_alts) 779 if (gspca_dev->cam.reverse_alts)
@@ -613,10 +792,15 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
613 goto out; 792 goto out;
614 } 793 }
615 for (;;) { 794 for (;;) {
616 PDEBUG(D_STREAM, "init transfer alt %d", gspca_dev->alt); 795 if (!gspca_dev->cam.no_urb_create) {
617 ret = create_urbs(gspca_dev, ep); 796 PDEBUG(D_STREAM, "init transfer alt %d",
618 if (ret < 0) 797 gspca_dev->alt);
619 goto out; 798 ret = create_urbs(gspca_dev, ep);
799 if (ret < 0) {
800 destroy_urbs(gspca_dev);
801 goto out;
802 }
803 }
620 804
621 /* clear the bulk endpoint */ 805 /* clear the bulk endpoint */
622 if (gspca_dev->cam.bulk) 806 if (gspca_dev->cam.bulk)
@@ -636,8 +820,11 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
636 break; 820 break;
637 821
638 /* submit the URBs */ 822 /* submit the URBs */
639 for (n = 0; n < gspca_dev->nurbs; n++) { 823 for (n = 0; n < MAX_NURBS; n++) {
640 ret = usb_submit_urb(gspca_dev->urb[n], GFP_KERNEL); 824 urb = gspca_dev->urb[n];
825 if (urb == NULL)
826 break;
827 ret = usb_submit_urb(urb, GFP_KERNEL);
641 if (ret < 0) 828 if (ret < 0)
642 break; 829 break;
643 } 830 }
@@ -694,7 +881,9 @@ static void gspca_stream_off(struct gspca_dev *gspca_dev)
694 if (gspca_dev->sd_desc->stopN) 881 if (gspca_dev->sd_desc->stopN)
695 gspca_dev->sd_desc->stopN(gspca_dev); 882 gspca_dev->sd_desc->stopN(gspca_dev);
696 destroy_urbs(gspca_dev); 883 destroy_urbs(gspca_dev);
884 gspca_input_destroy_urb(gspca_dev);
697 gspca_set_alt0(gspca_dev); 885 gspca_set_alt0(gspca_dev);
886 gspca_input_create_urb(gspca_dev);
698 } 887 }
699 888
700 /* always call stop0 to free the subdriver's resources */ 889 /* always call stop0 to free the subdriver's resources */
@@ -2060,11 +2249,12 @@ int gspca_dev_probe(struct usb_interface *intf,
2060 PDEBUG(D_ERR, "Too many config"); 2249 PDEBUG(D_ERR, "Too many config");
2061 return -ENODEV; 2250 return -ENODEV;
2062 } 2251 }
2252
2253 /* the USB video interface must be the first one */
2063 interface = &intf->cur_altsetting->desc; 2254 interface = &intf->cur_altsetting->desc;
2064 if (interface->bInterfaceNumber > 0) { 2255 if (dev->config->desc.bNumInterfaces != 1 &&
2065 PDEBUG(D_ERR, "intf != 0"); 2256 interface->bInterfaceNumber != 0)
2066 return -ENODEV; 2257 return -ENODEV;
2067 }
2068 2258
2069 /* create the device */ 2259 /* create the device */
2070 if (dev_size < sizeof *gspca_dev) 2260 if (dev_size < sizeof *gspca_dev)
@@ -2096,6 +2286,10 @@ int gspca_dev_probe(struct usb_interface *intf,
2096 goto out; 2286 goto out;
2097 gspca_set_default_mode(gspca_dev); 2287 gspca_set_default_mode(gspca_dev);
2098 2288
2289 ret = gspca_input_connect(gspca_dev);
2290 if (ret)
2291 goto out;
2292
2099 mutex_init(&gspca_dev->usb_lock); 2293 mutex_init(&gspca_dev->usb_lock);
2100 mutex_init(&gspca_dev->read_lock); 2294 mutex_init(&gspca_dev->read_lock);
2101 mutex_init(&gspca_dev->queue_lock); 2295 mutex_init(&gspca_dev->queue_lock);
@@ -2116,8 +2310,15 @@ int gspca_dev_probe(struct usb_interface *intf,
2116 2310
2117 usb_set_intfdata(intf, gspca_dev); 2311 usb_set_intfdata(intf, gspca_dev);
2118 PDEBUG(D_PROBE, "%s created", video_device_node_name(&gspca_dev->vdev)); 2312 PDEBUG(D_PROBE, "%s created", video_device_node_name(&gspca_dev->vdev));
2313
2314 gspca_input_create_urb(gspca_dev);
2315
2119 return 0; 2316 return 0;
2120out: 2317out:
2318#ifdef CONFIG_INPUT
2319 if (gspca_dev->input_dev)
2320 input_unregister_device(gspca_dev->input_dev);
2321#endif
2121 kfree(gspca_dev->usb_buf); 2322 kfree(gspca_dev->usb_buf);
2122 kfree(gspca_dev); 2323 kfree(gspca_dev);
2123 return ret; 2324 return ret;
@@ -2133,6 +2334,9 @@ EXPORT_SYMBOL(gspca_dev_probe);
2133void gspca_disconnect(struct usb_interface *intf) 2334void gspca_disconnect(struct usb_interface *intf)
2134{ 2335{
2135 struct gspca_dev *gspca_dev = usb_get_intfdata(intf); 2336 struct gspca_dev *gspca_dev = usb_get_intfdata(intf);
2337#ifdef CONFIG_INPUT
2338 struct input_dev *input_dev;
2339#endif
2136 2340
2137 PDEBUG(D_PROBE, "%s disconnect", 2341 PDEBUG(D_PROBE, "%s disconnect",
2138 video_device_node_name(&gspca_dev->vdev)); 2342 video_device_node_name(&gspca_dev->vdev));
@@ -2144,6 +2348,15 @@ void gspca_disconnect(struct usb_interface *intf)
2144 wake_up_interruptible(&gspca_dev->wq); 2348 wake_up_interruptible(&gspca_dev->wq);
2145 } 2349 }
2146 2350
2351#ifdef CONFIG_INPUT
2352 gspca_input_destroy_urb(gspca_dev);
2353 input_dev = gspca_dev->input_dev;
2354 if (input_dev) {
2355 gspca_dev->input_dev = NULL;
2356 input_unregister_device(input_dev);
2357 }
2358#endif
2359
2147 /* the device is freed at exit of this function */ 2360 /* the device is freed at exit of this function */
2148 gspca_dev->dev = NULL; 2361 gspca_dev->dev = NULL;
2149 mutex_unlock(&gspca_dev->usb_lock); 2362 mutex_unlock(&gspca_dev->usb_lock);
@@ -2169,6 +2382,7 @@ int gspca_suspend(struct usb_interface *intf, pm_message_t message)
2169 if (gspca_dev->sd_desc->stopN) 2382 if (gspca_dev->sd_desc->stopN)
2170 gspca_dev->sd_desc->stopN(gspca_dev); 2383 gspca_dev->sd_desc->stopN(gspca_dev);
2171 destroy_urbs(gspca_dev); 2384 destroy_urbs(gspca_dev);
2385 gspca_input_destroy_urb(gspca_dev);
2172 gspca_set_alt0(gspca_dev); 2386 gspca_set_alt0(gspca_dev);
2173 if (gspca_dev->sd_desc->stop0) 2387 if (gspca_dev->sd_desc->stop0)
2174 gspca_dev->sd_desc->stop0(gspca_dev); 2388 gspca_dev->sd_desc->stop0(gspca_dev);
@@ -2182,6 +2396,7 @@ int gspca_resume(struct usb_interface *intf)
2182 2396
2183 gspca_dev->frozen = 0; 2397 gspca_dev->frozen = 0;
2184 gspca_dev->sd_desc->init(gspca_dev); 2398 gspca_dev->sd_desc->init(gspca_dev);
2399 gspca_input_create_urb(gspca_dev);
2185 if (gspca_dev->streaming) 2400 if (gspca_dev->streaming)
2186 return gspca_init_transfer(gspca_dev); 2401 return gspca_init_transfer(gspca_dev);
2187 return 0; 2402 return 0;
@@ -2205,6 +2420,8 @@ int gspca_auto_gain_n_exposure(struct gspca_dev *gspca_dev, int avg_lum,
2205 int retval = 0; 2420 int retval = 0;
2206 2421
2207 for (i = 0; i < gspca_dev->sd_desc->nctrls; i++) { 2422 for (i = 0; i < gspca_dev->sd_desc->nctrls; i++) {
2423 if (gspca_dev->ctrl_dis & (1 << i))
2424 continue;
2208 if (gspca_dev->sd_desc->ctrls[i].qctrl.id == V4L2_CID_GAIN) 2425 if (gspca_dev->sd_desc->ctrls[i].qctrl.id == V4L2_CID_GAIN)
2209 gain_ctrl = &gspca_dev->sd_desc->ctrls[i]; 2426 gain_ctrl = &gspca_dev->sd_desc->ctrls[i];
2210 if (gspca_dev->sd_desc->ctrls[i].qctrl.id == V4L2_CID_EXPOSURE) 2427 if (gspca_dev->sd_desc->ctrls[i].qctrl.id == V4L2_CID_EXPOSURE)
diff --git a/drivers/media/video/gspca/gspca.h b/drivers/media/video/gspca/gspca.h
index 59c7941da999..02c696a22be0 100644
--- a/drivers/media/video/gspca/gspca.h
+++ b/drivers/media/video/gspca/gspca.h
@@ -48,26 +48,27 @@ extern int gspca_debug;
48 48
49/* used to list framerates supported by a camera mode (resolution) */ 49/* used to list framerates supported by a camera mode (resolution) */
50struct framerates { 50struct framerates {
51 int *rates; 51 const u8 *rates;
52 int nrates; 52 int nrates;
53}; 53};
54 54
55/* device information - set at probe time */ 55/* device information - set at probe time */
56struct cam { 56struct cam {
57 int bulk_size; /* buffer size when image transfer by bulk */
58 const struct v4l2_pix_format *cam_mode; /* size nmodes */ 57 const struct v4l2_pix_format *cam_mode; /* size nmodes */
59 char nmodes;
60 const struct framerates *mode_framerates; /* must have size nmode, 58 const struct framerates *mode_framerates; /* must have size nmode,
61 * just like cam_mode */ 59 * just like cam_mode */
62 __u8 bulk_nurbs; /* number of URBs in bulk mode 60 u32 bulk_size; /* buffer size when image transfer by bulk */
61 u32 input_flags; /* value for ENUM_INPUT status flags */
62 u8 nmodes; /* size of cam_mode */
63 u8 no_urb_create; /* don't create transfer URBs */
64 u8 bulk_nurbs; /* number of URBs in bulk mode
63 * - cannot be > MAX_NURBS 65 * - cannot be > MAX_NURBS
64 * - when 0 and bulk_size != 0 means 66 * - when 0 and bulk_size != 0 means
65 * 1 URB and submit done by subdriver */ 67 * 1 URB and submit done by subdriver */
66 u8 bulk; /* image transfer by 0:isoc / 1:bulk */ 68 u8 bulk; /* image transfer by 0:isoc / 1:bulk */
67 u8 npkt; /* number of packets in an ISOC message 69 u8 npkt; /* number of packets in an ISOC message
68 * 0 is the default value: 32 packets */ 70 * 0 is the default value: 32 packets */
69 u32 input_flags; /* value for ENUM_INPUT status flags */ 71 u8 reverse_alts; /* Alt settings are in high to low order */
70 char reverse_alts; /* Alt settings are in high to low order */
71}; 72};
72 73
73struct gspca_dev; 74struct gspca_dev;
@@ -90,6 +91,9 @@ typedef int (*cam_qmnu_op) (struct gspca_dev *,
90typedef void (*cam_pkt_op) (struct gspca_dev *gspca_dev, 91typedef void (*cam_pkt_op) (struct gspca_dev *gspca_dev,
91 u8 *data, 92 u8 *data,
92 int len); 93 int len);
94typedef int (*cam_int_pkt_op) (struct gspca_dev *gspca_dev,
95 u8 *data,
96 int len);
93 97
94struct ctrl { 98struct ctrl {
95 struct v4l2_queryctrl qctrl; 99 struct v4l2_queryctrl qctrl;
@@ -125,6 +129,12 @@ struct sd_desc {
125 cam_reg_op get_register; 129 cam_reg_op get_register;
126#endif 130#endif
127 cam_ident_op get_chip_ident; 131 cam_ident_op get_chip_ident;
132#ifdef CONFIG_INPUT
133 cam_int_pkt_op int_pkt_scan;
134 /* other_input makes the gspca core create gspca_dev->input even when
135 int_pkt_scan is NULL, for cams with non interrupt driven buttons */
136 u8 other_input;
137#endif
128}; 138};
129 139
130/* packet types when moving from iso buf to frame buf */ 140/* packet types when moving from iso buf to frame buf */
@@ -147,6 +157,10 @@ struct gspca_dev {
147 struct module *module; /* subdriver handling the device */ 157 struct module *module; /* subdriver handling the device */
148 struct usb_device *dev; 158 struct usb_device *dev;
149 struct file *capt_file; /* file doing video capture */ 159 struct file *capt_file; /* file doing video capture */
160#ifdef CONFIG_INPUT
161 struct input_dev *input_dev;
162 char phys[64]; /* physical device path */
163#endif
150 164
151 struct cam cam; /* device information */ 165 struct cam cam; /* device information */
152 const struct sd_desc *sd_desc; /* subdriver description */ 166 const struct sd_desc *sd_desc; /* subdriver description */
@@ -156,6 +170,9 @@ struct gspca_dev {
156#define USB_BUF_SZ 64 170#define USB_BUF_SZ 64
157 __u8 *usb_buf; /* buffer for USB exchanges */ 171 __u8 *usb_buf; /* buffer for USB exchanges */
158 struct urb *urb[MAX_NURBS]; 172 struct urb *urb[MAX_NURBS];
173#ifdef CONFIG_INPUT
174 struct urb *int_urb;
175#endif
159 176
160 __u8 *frbuf; /* buffer for nframes */ 177 __u8 *frbuf; /* buffer for nframes */
161 struct gspca_frame frame[GSPCA_MAX_FRAMES]; 178 struct gspca_frame frame[GSPCA_MAX_FRAMES];
@@ -187,7 +204,6 @@ struct gspca_dev {
187 char users; /* number of opens */ 204 char users; /* number of opens */
188 char present; /* device connected */ 205 char present; /* device connected */
189 char nbufread; /* number of buffers for read() */ 206 char nbufread; /* number of buffers for read() */
190 char nurbs; /* number of allocated URBs */
191 char memory; /* memory type (V4L2_MEMORY_xxx) */ 207 char memory; /* memory type (V4L2_MEMORY_xxx) */
192 __u8 iface; /* USB interface number */ 208 __u8 iface; /* USB interface number */
193 __u8 alt; /* USB alternate setting */ 209 __u8 alt; /* USB alternate setting */
diff --git a/drivers/media/video/gspca/m5602/m5602_mt9m111.c b/drivers/media/video/gspca/m5602/m5602_mt9m111.c
index 8d071dff6944..c0722fa64606 100644
--- a/drivers/media/video/gspca/m5602/m5602_mt9m111.c
+++ b/drivers/media/video/gspca/m5602/m5602_mt9m111.c
@@ -48,7 +48,7 @@ static struct v4l2_pix_format mt9m111_modes[] = {
48 } 48 }
49}; 49};
50 50
51const static struct ctrl mt9m111_ctrls[] = { 51static const struct ctrl mt9m111_ctrls[] = {
52#define VFLIP_IDX 0 52#define VFLIP_IDX 0
53 { 53 {
54 { 54 {
@@ -171,7 +171,7 @@ int mt9m111_probe(struct sd *sd)
171 return -ENODEV; 171 return -ENODEV;
172 } 172 }
173 173
174 info("Probing for a mt9m111 sensor"); 174 PDEBUG(D_PROBE, "Probing for a mt9m111 sensor");
175 175
176 /* Do the preinit */ 176 /* Do the preinit */
177 for (i = 0; i < ARRAY_SIZE(preinit_mt9m111); i++) { 177 for (i = 0; i < ARRAY_SIZE(preinit_mt9m111); i++) {
diff --git a/drivers/media/video/gspca/m5602/m5602_ov7660.c b/drivers/media/video/gspca/m5602/m5602_ov7660.c
index 2a28b74cb3f9..62c1cbf06666 100644
--- a/drivers/media/video/gspca/m5602/m5602_ov7660.c
+++ b/drivers/media/video/gspca/m5602/m5602_ov7660.c
@@ -33,7 +33,7 @@ static int ov7660_set_hflip(struct gspca_dev *gspca_dev, __s32 val);
33static int ov7660_get_vflip(struct gspca_dev *gspca_dev, __s32 *val); 33static int ov7660_get_vflip(struct gspca_dev *gspca_dev, __s32 *val);
34static int ov7660_set_vflip(struct gspca_dev *gspca_dev, __s32 val); 34static int ov7660_set_vflip(struct gspca_dev *gspca_dev, __s32 val);
35 35
36const static struct ctrl ov7660_ctrls[] = { 36static const struct ctrl ov7660_ctrls[] = {
37#define GAIN_IDX 1 37#define GAIN_IDX 1
38 { 38 {
39 { 39 {
diff --git a/drivers/media/video/gspca/m5602/m5602_ov7660.h b/drivers/media/video/gspca/m5602/m5602_ov7660.h
index f5588ebe667c..4d9dcf29da2e 100644
--- a/drivers/media/video/gspca/m5602/m5602_ov7660.h
+++ b/drivers/media/video/gspca/m5602/m5602_ov7660.h
@@ -94,7 +94,7 @@ int ov7660_start(struct sd *sd);
94int ov7660_stop(struct sd *sd); 94int ov7660_stop(struct sd *sd);
95void ov7660_disconnect(struct sd *sd); 95void ov7660_disconnect(struct sd *sd);
96 96
97const static struct m5602_sensor ov7660 = { 97static const struct m5602_sensor ov7660 = {
98 .name = "ov7660", 98 .name = "ov7660",
99 .i2c_slave_id = 0x42, 99 .i2c_slave_id = 0x42,
100 .i2c_regW = 1, 100 .i2c_regW = 1,
diff --git a/drivers/media/video/gspca/m5602/m5602_ov9650.c b/drivers/media/video/gspca/m5602/m5602_ov9650.c
index 923cdd5f7a6b..069ba0044f8b 100644
--- a/drivers/media/video/gspca/m5602/m5602_ov9650.c
+++ b/drivers/media/video/gspca/m5602/m5602_ov9650.c
@@ -307,7 +307,7 @@ int ov9650_probe(struct sd *sd)
307 return -ENODEV; 307 return -ENODEV;
308 } 308 }
309 309
310 info("Probing for an ov9650 sensor"); 310 PDEBUG(D_PROBE, "Probing for an ov9650 sensor");
311 311
312 /* Run the pre-init before probing the sensor */ 312 /* Run the pre-init before probing the sensor */
313 for (i = 0; i < ARRAY_SIZE(preinit_ov9650) && !err; i++) { 313 for (i = 0; i < ARRAY_SIZE(preinit_ov9650) && !err; i++) {
diff --git a/drivers/media/video/gspca/m5602/m5602_po1030.c b/drivers/media/video/gspca/m5602/m5602_po1030.c
index 8d74d8065b79..925b87d66f40 100644
--- a/drivers/media/video/gspca/m5602/m5602_po1030.c
+++ b/drivers/media/video/gspca/m5602/m5602_po1030.c
@@ -205,7 +205,7 @@ int po1030_probe(struct sd *sd)
205 return -ENODEV; 205 return -ENODEV;
206 } 206 }
207 207
208 info("Probing for a po1030 sensor"); 208 PDEBUG(D_PROBE, "Probing for a po1030 sensor");
209 209
210 /* Run the pre-init to actually probe the unit */ 210 /* Run the pre-init to actually probe the unit */
211 for (i = 0; i < ARRAY_SIZE(preinit_po1030); i++) { 211 for (i = 0; i < ARRAY_SIZE(preinit_po1030); i++) {
diff --git a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
index 1b536f7d30cf..da0a38c78708 100644
--- a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
+++ b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
@@ -248,7 +248,7 @@ int s5k4aa_probe(struct sd *sd)
248 return -ENODEV; 248 return -ENODEV;
249 } 249 }
250 250
251 info("Probing for a s5k4aa sensor"); 251 PDEBUG(D_PROBE, "Probing for a s5k4aa sensor");
252 252
253 /* Preinit the sensor */ 253 /* Preinit the sensor */
254 for (i = 0; i < ARRAY_SIZE(preinit_s5k4aa) && !err; i++) { 254 for (i = 0; i < ARRAY_SIZE(preinit_s5k4aa) && !err; i++) {
diff --git a/drivers/media/video/gspca/m5602/m5602_s5k83a.c b/drivers/media/video/gspca/m5602/m5602_s5k83a.c
index 6b89f33a4ce0..fbd91545497a 100644
--- a/drivers/media/video/gspca/m5602/m5602_s5k83a.c
+++ b/drivers/media/video/gspca/m5602/m5602_s5k83a.c
@@ -143,7 +143,7 @@ int s5k83a_probe(struct sd *sd)
143 return -ENODEV; 143 return -ENODEV;
144 } 144 }
145 145
146 info("Probing for a s5k83a sensor"); 146 PDEBUG(D_PROBE, "Probing for a s5k83a sensor");
147 147
148 /* Preinit the sensor */ 148 /* Preinit the sensor */
149 for (i = 0; i < ARRAY_SIZE(preinit_s5k83a) && !err; i++) { 149 for (i = 0; i < ARRAY_SIZE(preinit_s5k83a) && !err; i++) {
diff --git a/drivers/media/video/gspca/mars.c b/drivers/media/video/gspca/mars.c
index 9cf8d68c71bf..3d9229e22b25 100644
--- a/drivers/media/video/gspca/mars.c
+++ b/drivers/media/video/gspca/mars.c
@@ -54,7 +54,7 @@ static int sd_getgamma(struct gspca_dev *gspca_dev, __s32 *val);
54static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val); 54static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val);
55static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val); 55static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val);
56 56
57static struct ctrl sd_ctrls[] = { 57static const struct ctrl sd_ctrls[] = {
58 { 58 {
59 { 59 {
60 .id = V4L2_CID_BRIGHTNESS, 60 .id = V4L2_CID_BRIGHTNESS,
diff --git a/drivers/media/video/gspca/mr97310a.c b/drivers/media/video/gspca/mr97310a.c
index 9154870e07d2..33744e724eaa 100644
--- a/drivers/media/video/gspca/mr97310a.c
+++ b/drivers/media/video/gspca/mr97310a.c
@@ -57,6 +57,14 @@
57#define MR97310A_GAIN_MAX 31 57#define MR97310A_GAIN_MAX 31
58#define MR97310A_GAIN_DEFAULT 25 58#define MR97310A_GAIN_DEFAULT 25
59 59
60#define MR97310A_CONTRAST_MIN 0
61#define MR97310A_CONTRAST_MAX 31
62#define MR97310A_CONTRAST_DEFAULT 23
63
64#define MR97310A_CS_GAIN_MIN 0
65#define MR97310A_CS_GAIN_MAX 0x7ff
66#define MR97310A_CS_GAIN_DEFAULT 0x110
67
60#define MR97310A_MIN_CLOCKDIV_MIN 3 68#define MR97310A_MIN_CLOCKDIV_MIN 3
61#define MR97310A_MIN_CLOCKDIV_MAX 8 69#define MR97310A_MIN_CLOCKDIV_MAX 8
62#define MR97310A_MIN_CLOCKDIV_DEFAULT 3 70#define MR97310A_MIN_CLOCKDIV_DEFAULT 3
@@ -82,7 +90,8 @@ struct sd {
82 90
83 int brightness; 91 int brightness;
84 u16 exposure; 92 u16 exposure;
85 u8 gain; 93 u32 gain;
94 u8 contrast;
86 u8 min_clockdiv; 95 u8 min_clockdiv;
87}; 96};
88 97
@@ -98,6 +107,8 @@ static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
98static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val); 107static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
99static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val); 108static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val);
100static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val); 109static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val);
110static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
111static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
101static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val); 112static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val);
102static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val); 113static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val);
103static int sd_setmin_clockdiv(struct gspca_dev *gspca_dev, __s32 val); 114static int sd_setmin_clockdiv(struct gspca_dev *gspca_dev, __s32 val);
@@ -105,11 +116,13 @@ static int sd_getmin_clockdiv(struct gspca_dev *gspca_dev, __s32 *val);
105static void setbrightness(struct gspca_dev *gspca_dev); 116static void setbrightness(struct gspca_dev *gspca_dev);
106static void setexposure(struct gspca_dev *gspca_dev); 117static void setexposure(struct gspca_dev *gspca_dev);
107static void setgain(struct gspca_dev *gspca_dev); 118static void setgain(struct gspca_dev *gspca_dev);
119static void setcontrast(struct gspca_dev *gspca_dev);
108 120
109/* V4L2 controls supported by the driver */ 121/* V4L2 controls supported by the driver */
110static struct ctrl sd_ctrls[] = { 122static const struct ctrl sd_ctrls[] = {
111/* Separate brightness control description for Argus QuickClix as it has 123/* Separate brightness control description for Argus QuickClix as it has
112 different limits from the other mr97310a cameras */ 124 * different limits from the other mr97310a cameras, and separate gain
125 * control for Sakar CyberPix camera. */
113 { 126 {
114#define NORM_BRIGHTNESS_IDX 0 127#define NORM_BRIGHTNESS_IDX 0
115 { 128 {
@@ -171,7 +184,37 @@ static struct ctrl sd_ctrls[] = {
171 .get = sd_getgain, 184 .get = sd_getgain,
172 }, 185 },
173 { 186 {
174#define MIN_CLOCKDIV_IDX 4 187#define SAKAR_CS_GAIN_IDX 4
188 {
189 .id = V4L2_CID_GAIN,
190 .type = V4L2_CTRL_TYPE_INTEGER,
191 .name = "Gain",
192 .minimum = MR97310A_CS_GAIN_MIN,
193 .maximum = MR97310A_CS_GAIN_MAX,
194 .step = 1,
195 .default_value = MR97310A_CS_GAIN_DEFAULT,
196 .flags = 0,
197 },
198 .set = sd_setgain,
199 .get = sd_getgain,
200 },
201 {
202#define CONTRAST_IDX 5
203 {
204 .id = V4L2_CID_CONTRAST,
205 .type = V4L2_CTRL_TYPE_INTEGER,
206 .name = "Contrast",
207 .minimum = MR97310A_CONTRAST_MIN,
208 .maximum = MR97310A_CONTRAST_MAX,
209 .step = 1,
210 .default_value = MR97310A_CONTRAST_DEFAULT,
211 .flags = 0,
212 },
213 .set = sd_setcontrast,
214 .get = sd_getcontrast,
215 },
216 {
217#define MIN_CLOCKDIV_IDX 6
175 { 218 {
176 .id = V4L2_CID_PRIVATE_BASE, 219 .id = V4L2_CID_PRIVATE_BASE,
177 .type = V4L2_CTRL_TYPE_INTEGER, 220 .type = V4L2_CTRL_TYPE_INTEGER,
@@ -327,7 +370,6 @@ static int zero_the_pointer(struct gspca_dev *gspca_dev)
327 if (err_code < 0) 370 if (err_code < 0)
328 return err_code; 371 return err_code;
329 372
330 err_code = mr_write(gspca_dev, 1);
331 data[0] = 0x19; 373 data[0] = 0x19;
332 data[1] = 0x51; 374 data[1] = 0x51;
333 err_code = mr_write(gspca_dev, 2); 375 err_code = mr_write(gspca_dev, 2);
@@ -437,6 +479,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
437{ 479{
438 struct sd *sd = (struct sd *) gspca_dev; 480 struct sd *sd = (struct sd *) gspca_dev;
439 struct cam *cam; 481 struct cam *cam;
482 int gain_default = MR97310A_GAIN_DEFAULT;
440 int err_code; 483 int err_code;
441 484
442 cam = &gspca_dev->cam; 485 cam = &gspca_dev->cam;
@@ -460,12 +503,14 @@ static int sd_config(struct gspca_dev *gspca_dev,
460 if (err_code < 0) 503 if (err_code < 0)
461 return err_code; 504 return err_code;
462 505
506 /* Now, the query for sensor type. */
507 err_code = cam_get_response16(gspca_dev, 0x07, 1);
508 if (err_code < 0)
509 return err_code;
510
463 if (id->idProduct == 0x0110 || id->idProduct == 0x010e) { 511 if (id->idProduct == 0x0110 || id->idProduct == 0x010e) {
464 sd->cam_type = CAM_TYPE_CIF; 512 sd->cam_type = CAM_TYPE_CIF;
465 cam->nmodes--; 513 cam->nmodes--;
466 err_code = cam_get_response16(gspca_dev, 0x06, 1);
467 if (err_code < 0)
468 return err_code;
469 /* 514 /*
470 * All but one of the known CIF cameras share the same USB ID, 515 * All but one of the known CIF cameras share the same USB ID,
471 * but two different init routines are in use, and the control 516 * but two different init routines are in use, and the control
@@ -473,12 +518,12 @@ static int sd_config(struct gspca_dev *gspca_dev,
473 * of the two known varieties is connected! 518 * of the two known varieties is connected!
474 * 519 *
475 * A list of known CIF cameras follows. They all report either 520 * A list of known CIF cameras follows. They all report either
476 * 0002 for type 0 or 0003 for type 1. 521 * 0200 for type 0 or 0300 for type 1.
477 * If you have another to report, please do 522 * If you have another to report, please do
478 * 523 *
479 * Name sd->sensor_type reported by 524 * Name sd->sensor_type reported by
480 * 525 *
481 * Sakar Spy-shot 0 T. Kilgore 526 * Sakar 56379 Spy-shot 0 T. Kilgore
482 * Innovage 0 T. Kilgore 527 * Innovage 0 T. Kilgore
483 * Vivitar Mini 0 H. De Goede 528 * Vivitar Mini 0 H. De Goede
484 * Vivitar Mini 0 E. Rodriguez 529 * Vivitar Mini 0 E. Rodriguez
@@ -487,7 +532,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
487 * Philips dig. keych. 1 T. Kilgore 532 * Philips dig. keych. 1 T. Kilgore
488 * Trust Spyc@m 100 1 A. Jacobs 533 * Trust Spyc@m 100 1 A. Jacobs
489 */ 534 */
490 switch (gspca_dev->usb_buf[1]) { 535 switch (gspca_dev->usb_buf[0]) {
491 case 2: 536 case 2:
492 sd->sensor_type = 0; 537 sd->sensor_type = 0;
493 break; 538 break;
@@ -504,20 +549,19 @@ static int sd_config(struct gspca_dev *gspca_dev,
504 } else { 549 } else {
505 sd->cam_type = CAM_TYPE_VGA; 550 sd->cam_type = CAM_TYPE_VGA;
506 551
507 err_code = cam_get_response16(gspca_dev, 0x07, 1);
508 if (err_code < 0)
509 return err_code;
510
511 /* 552 /*
512 * Here is a table of the responses to the previous command 553 * Here is a table of the responses to the query for sensor
513 * from the known MR97310A VGA cameras. 554 * type, from the known MR97310A VGA cameras. Six different
555 * cameras of which five share the same USB ID.
514 * 556 *
515 * Name gspca_dev->usb_buf[] sd->sensor_type 557 * Name gspca_dev->usb_buf[] sd->sensor_type
516 * sd->do_lcd_stop 558 * sd->do_lcd_stop
517 * Aiptek Pencam VGA+ 0300 0 1 559 * Aiptek Pencam VGA+ 0300 0 1
518 * ION digital 0350 0 1 560 * ION digital 0300 0 1
519 * Argus DC-1620 0450 1 0 561 * Argus DC-1620 0450 1 0
520 * Argus QuickClix 0420 1 1 562 * Argus QuickClix 0420 1 1
563 * Sakar 77379 Digital 0350 0 1
564 * Sakar 1638x CyberPix 0120 0 2
521 * 565 *
522 * Based upon these results, we assume default settings 566 * Based upon these results, we assume default settings
523 * and then correct as necessary, as follows. 567 * and then correct as necessary, as follows.
@@ -527,10 +571,12 @@ static int sd_config(struct gspca_dev *gspca_dev,
527 sd->sensor_type = 1; 571 sd->sensor_type = 1;
528 sd->do_lcd_stop = 0; 572 sd->do_lcd_stop = 0;
529 sd->adj_colors = 0; 573 sd->adj_colors = 0;
530 if ((gspca_dev->usb_buf[0] != 0x03) && 574 if (gspca_dev->usb_buf[0] == 0x01) {
575 sd->sensor_type = 2;
576 } else if ((gspca_dev->usb_buf[0] != 0x03) &&
531 (gspca_dev->usb_buf[0] != 0x04)) { 577 (gspca_dev->usb_buf[0] != 0x04)) {
532 PDEBUG(D_ERR, "Unknown VGA Sensor id Byte 0: %02x", 578 PDEBUG(D_ERR, "Unknown VGA Sensor id Byte 0: %02x",
533 gspca_dev->usb_buf[1]); 579 gspca_dev->usb_buf[0]);
534 PDEBUG(D_ERR, "Defaults assumed, may not work"); 580 PDEBUG(D_ERR, "Defaults assumed, may not work");
535 PDEBUG(D_ERR, "Please report this"); 581 PDEBUG(D_ERR, "Please report this");
536 } 582 }
@@ -560,7 +606,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
560 PDEBUG(D_PROBE, "MR97310A VGA camera detected, sensor: %d", 606 PDEBUG(D_PROBE, "MR97310A VGA camera detected, sensor: %d",
561 sd->sensor_type); 607 sd->sensor_type);
562 } 608 }
563 /* Stop streaming as we've started it to probe the sensor type. */ 609 /* Stop streaming as we've started it only to probe the sensor type. */
564 sd_stopN(gspca_dev); 610 sd_stopN(gspca_dev);
565 611
566 if (force_sensor_type != -1) { 612 if (force_sensor_type != -1) {
@@ -574,9 +620,13 @@ static int sd_config(struct gspca_dev *gspca_dev,
574 /* No brightness for sensor_type 0 */ 620 /* No brightness for sensor_type 0 */
575 if (sd->sensor_type == 0) 621 if (sd->sensor_type == 0)
576 gspca_dev->ctrl_dis = (1 << NORM_BRIGHTNESS_IDX) | 622 gspca_dev->ctrl_dis = (1 << NORM_BRIGHTNESS_IDX) |
577 (1 << ARGUS_QC_BRIGHTNESS_IDX); 623 (1 << ARGUS_QC_BRIGHTNESS_IDX) |
624 (1 << CONTRAST_IDX) |
625 (1 << SAKAR_CS_GAIN_IDX);
578 else 626 else
579 gspca_dev->ctrl_dis = (1 << ARGUS_QC_BRIGHTNESS_IDX) | 627 gspca_dev->ctrl_dis = (1 << ARGUS_QC_BRIGHTNESS_IDX) |
628 (1 << CONTRAST_IDX) |
629 (1 << SAKAR_CS_GAIN_IDX) |
580 (1 << MIN_CLOCKDIV_IDX); 630 (1 << MIN_CLOCKDIV_IDX);
581 } else { 631 } else {
582 /* All controls need to be disabled if VGA sensor_type is 0 */ 632 /* All controls need to be disabled if VGA sensor_type is 0 */
@@ -585,17 +635,30 @@ static int sd_config(struct gspca_dev *gspca_dev,
585 (1 << ARGUS_QC_BRIGHTNESS_IDX) | 635 (1 << ARGUS_QC_BRIGHTNESS_IDX) |
586 (1 << EXPOSURE_IDX) | 636 (1 << EXPOSURE_IDX) |
587 (1 << GAIN_IDX) | 637 (1 << GAIN_IDX) |
638 (1 << CONTRAST_IDX) |
639 (1 << SAKAR_CS_GAIN_IDX) |
588 (1 << MIN_CLOCKDIV_IDX); 640 (1 << MIN_CLOCKDIV_IDX);
589 else if (sd->do_lcd_stop) 641 else if (sd->sensor_type == 2) {
642 gspca_dev->ctrl_dis = (1 << NORM_BRIGHTNESS_IDX) |
643 (1 << ARGUS_QC_BRIGHTNESS_IDX) |
644 (1 << GAIN_IDX) |
645 (1 << MIN_CLOCKDIV_IDX);
646 gain_default = MR97310A_CS_GAIN_DEFAULT;
647 } else if (sd->do_lcd_stop)
590 /* Argus QuickClix has different brightness limits */ 648 /* Argus QuickClix has different brightness limits */
591 gspca_dev->ctrl_dis = (1 << NORM_BRIGHTNESS_IDX); 649 gspca_dev->ctrl_dis = (1 << NORM_BRIGHTNESS_IDX) |
650 (1 << CONTRAST_IDX) |
651 (1 << SAKAR_CS_GAIN_IDX);
592 else 652 else
593 gspca_dev->ctrl_dis = (1 << ARGUS_QC_BRIGHTNESS_IDX); 653 gspca_dev->ctrl_dis = (1 << ARGUS_QC_BRIGHTNESS_IDX) |
654 (1 << CONTRAST_IDX) |
655 (1 << SAKAR_CS_GAIN_IDX);
594 } 656 }
595 657
596 sd->brightness = MR97310A_BRIGHTNESS_DEFAULT; 658 sd->brightness = MR97310A_BRIGHTNESS_DEFAULT;
597 sd->exposure = MR97310A_EXPOSURE_DEFAULT; 659 sd->exposure = MR97310A_EXPOSURE_DEFAULT;
598 sd->gain = MR97310A_GAIN_DEFAULT; 660 sd->gain = gain_default;
661 sd->contrast = MR97310A_CONTRAST_DEFAULT;
599 sd->min_clockdiv = MR97310A_MIN_CLOCKDIV_DEFAULT; 662 sd->min_clockdiv = MR97310A_MIN_CLOCKDIV_DEFAULT;
600 663
601 return 0; 664 return 0;
@@ -697,6 +760,12 @@ static int start_cif_cam(struct gspca_dev *gspca_dev)
697 {0x13, 0x00, {0x01}, 1}, 760 {0x13, 0x00, {0x01}, 1},
698 {0, 0, {0}, 0} 761 {0, 0, {0}, 0}
699 }; 762 };
763 /* Without this command the cam won't work with USB-UHCI */
764 gspca_dev->usb_buf[0] = 0x0a;
765 gspca_dev->usb_buf[1] = 0x00;
766 err_code = mr_write(gspca_dev, 2);
767 if (err_code < 0)
768 return err_code;
700 err_code = sensor_write_regs(gspca_dev, cif_sensor1_init_data, 769 err_code = sensor_write_regs(gspca_dev, cif_sensor1_init_data,
701 ARRAY_SIZE(cif_sensor1_init_data)); 770 ARRAY_SIZE(cif_sensor1_init_data));
702 } 771 }
@@ -717,6 +786,10 @@ static int start_vga_cam(struct gspca_dev *gspca_dev)
717 data[5] = 0x00; 786 data[5] = 0x00;
718 data[10] = 0x91; 787 data[10] = 0x91;
719 } 788 }
789 if (sd->sensor_type == 2) {
790 data[5] = 0x00;
791 data[10] = 0x18;
792 }
720 793
721 switch (gspca_dev->width) { 794 switch (gspca_dev->width) {
722 case 160: 795 case 160:
@@ -731,6 +804,10 @@ static int start_vga_cam(struct gspca_dev *gspca_dev)
731 data[4] = 0x78; /* reg 3, V size/4 */ 804 data[4] = 0x78; /* reg 3, V size/4 */
732 data[6] = 0x04; /* reg 5, H start */ 805 data[6] = 0x04; /* reg 5, H start */
733 data[8] = 0x03; /* reg 7, V start */ 806 data[8] = 0x03; /* reg 7, V start */
807 if (sd->sensor_type == 2) {
808 data[6] = 2;
809 data[8] = 1;
810 }
734 if (sd->do_lcd_stop) 811 if (sd->do_lcd_stop)
735 data[8] = 0x04; /* Bayer tile shifted */ 812 data[8] = 0x04; /* Bayer tile shifted */
736 break; 813 break;
@@ -753,7 +830,6 @@ static int start_vga_cam(struct gspca_dev *gspca_dev)
753 return err_code; 830 return err_code;
754 831
755 if (!sd->sensor_type) { 832 if (!sd->sensor_type) {
756 /* The only known sensor_type 0 cam is the Argus DC-1620 */
757 const struct sensor_w_data vga_sensor0_init_data[] = { 833 const struct sensor_w_data vga_sensor0_init_data[] = {
758 {0x01, 0x00, {0x0c, 0x00, 0x04}, 3}, 834 {0x01, 0x00, {0x0c, 0x00, 0x04}, 3},
759 {0x14, 0x00, {0x01, 0xe4, 0x02, 0x84}, 4}, 835 {0x14, 0x00, {0x01, 0xe4, 0x02, 0x84}, 4},
@@ -764,7 +840,7 @@ static int start_vga_cam(struct gspca_dev *gspca_dev)
764 }; 840 };
765 err_code = sensor_write_regs(gspca_dev, vga_sensor0_init_data, 841 err_code = sensor_write_regs(gspca_dev, vga_sensor0_init_data,
766 ARRAY_SIZE(vga_sensor0_init_data)); 842 ARRAY_SIZE(vga_sensor0_init_data));
767 } else { /* sd->sensor_type = 1 */ 843 } else if (sd->sensor_type == 1) {
768 const struct sensor_w_data color_adj[] = { 844 const struct sensor_w_data color_adj[] = {
769 {0x02, 0x00, {0x06, 0x59, 0x0c, 0x16, 0x00, 845 {0x02, 0x00, {0x06, 0x59, 0x0c, 0x16, 0x00,
770 /* adjusted blue, green, red gain correct 846 /* adjusted blue, green, red gain correct
@@ -802,6 +878,48 @@ static int start_vga_cam(struct gspca_dev *gspca_dev)
802 878
803 err_code = sensor_write_regs(gspca_dev, vga_sensor1_init_data, 879 err_code = sensor_write_regs(gspca_dev, vga_sensor1_init_data,
804 ARRAY_SIZE(vga_sensor1_init_data)); 880 ARRAY_SIZE(vga_sensor1_init_data));
881 } else { /* sensor type == 2 */
882 const struct sensor_w_data vga_sensor2_init_data[] = {
883
884 {0x01, 0x00, {0x48}, 1},
885 {0x02, 0x00, {0x22}, 1},
886 /* Reg 3 msb and 4 is lsb of the exposure setting*/
887 {0x05, 0x00, {0x10}, 1},
888 {0x06, 0x00, {0x00}, 1},
889 {0x07, 0x00, {0x00}, 1},
890 {0x08, 0x00, {0x00}, 1},
891 {0x09, 0x00, {0x00}, 1},
892 /* The following are used in the gain control
893 * which is BTW completely borked in the OEM driver
894 * The values for each color go from 0 to 0x7ff
895 *{0x0a, 0x00, {0x01}, 1}, green1 gain msb
896 *{0x0b, 0x00, {0x10}, 1}, green1 gain lsb
897 *{0x0c, 0x00, {0x01}, 1}, red gain msb
898 *{0x0d, 0x00, {0x10}, 1}, red gain lsb
899 *{0x0e, 0x00, {0x01}, 1}, blue gain msb
900 *{0x0f, 0x00, {0x10}, 1}, blue gain lsb
901 *{0x10, 0x00, {0x01}, 1}, green2 gain msb
902 *{0x11, 0x00, {0x10}, 1}, green2 gain lsb
903 */
904 {0x12, 0x00, {0x00}, 1},
905 {0x13, 0x00, {0x04}, 1}, /* weird effect on colors */
906 {0x14, 0x00, {0x00}, 1},
907 {0x15, 0x00, {0x06}, 1},
908 {0x16, 0x00, {0x01}, 1},
909 {0x17, 0x00, {0xe2}, 1}, /* vertical alignment */
910 {0x18, 0x00, {0x02}, 1},
911 {0x19, 0x00, {0x82}, 1}, /* don't mess with */
912 {0x1a, 0x00, {0x00}, 1},
913 {0x1b, 0x00, {0x20}, 1},
914 /* {0x1c, 0x00, {0x17}, 1}, contrast control */
915 {0x1d, 0x00, {0x80}, 1}, /* moving causes a mess */
916 {0x1e, 0x00, {0x08}, 1}, /* moving jams the camera */
917 {0x1f, 0x00, {0x0c}, 1},
918 {0x20, 0x00, {0x00}, 1},
919 {0, 0, {0}, 0}
920 };
921 err_code = sensor_write_regs(gspca_dev, vga_sensor2_init_data,
922 ARRAY_SIZE(vga_sensor2_init_data));
805 } 923 }
806 return err_code; 924 return err_code;
807} 925}
@@ -834,6 +952,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
834 return err_code; 952 return err_code;
835 953
836 setbrightness(gspca_dev); 954 setbrightness(gspca_dev);
955 setcontrast(gspca_dev);
837 setexposure(gspca_dev); 956 setexposure(gspca_dev);
838 setgain(gspca_dev); 957 setgain(gspca_dev);
839 958
@@ -893,7 +1012,7 @@ static void setbrightness(struct gspca_dev *gspca_dev)
893static void setexposure(struct gspca_dev *gspca_dev) 1012static void setexposure(struct gspca_dev *gspca_dev)
894{ 1013{
895 struct sd *sd = (struct sd *) gspca_dev; 1014 struct sd *sd = (struct sd *) gspca_dev;
896 int exposure; 1015 int exposure = MR97310A_EXPOSURE_DEFAULT;
897 u8 buf[2]; 1016 u8 buf[2];
898 1017
899 if (gspca_dev->ctrl_dis & (1 << EXPOSURE_IDX)) 1018 if (gspca_dev->ctrl_dis & (1 << EXPOSURE_IDX))
@@ -905,6 +1024,11 @@ static void setexposure(struct gspca_dev *gspca_dev)
905 exposure = (sd->exposure * 9267) / 10000 + 300; 1024 exposure = (sd->exposure * 9267) / 10000 + 300;
906 sensor_write1(gspca_dev, 3, exposure >> 4); 1025 sensor_write1(gspca_dev, 3, exposure >> 4);
907 sensor_write1(gspca_dev, 4, exposure & 0x0f); 1026 sensor_write1(gspca_dev, 4, exposure & 0x0f);
1027 } else if (sd->sensor_type == 2) {
1028 exposure = sd->exposure;
1029 exposure >>= 3;
1030 sensor_write1(gspca_dev, 3, exposure >> 8);
1031 sensor_write1(gspca_dev, 4, exposure & 0xff);
908 } else { 1032 } else {
909 /* We have both a clock divider and an exposure register. 1033 /* We have both a clock divider and an exposure register.
910 We first calculate the clock divider, as that determines 1034 We first calculate the clock divider, as that determines
@@ -943,17 +1067,34 @@ static void setexposure(struct gspca_dev *gspca_dev)
943static void setgain(struct gspca_dev *gspca_dev) 1067static void setgain(struct gspca_dev *gspca_dev)
944{ 1068{
945 struct sd *sd = (struct sd *) gspca_dev; 1069 struct sd *sd = (struct sd *) gspca_dev;
1070 u8 gainreg;
946 1071
947 if (gspca_dev->ctrl_dis & (1 << GAIN_IDX)) 1072 if ((gspca_dev->ctrl_dis & (1 << GAIN_IDX)) &&
1073 (gspca_dev->ctrl_dis & (1 << SAKAR_CS_GAIN_IDX)))
948 return; 1074 return;
949 1075
950 if (sd->cam_type == CAM_TYPE_CIF && sd->sensor_type == 1) { 1076 if (sd->cam_type == CAM_TYPE_CIF && sd->sensor_type == 1)
951 sensor_write1(gspca_dev, 0x0e, sd->gain); 1077 sensor_write1(gspca_dev, 0x0e, sd->gain);
952 } else { 1078 else if (sd->cam_type == CAM_TYPE_VGA && sd->sensor_type == 2)
1079 for (gainreg = 0x0a; gainreg < 0x11; gainreg += 2) {
1080 sensor_write1(gspca_dev, gainreg, sd->gain >> 8);
1081 sensor_write1(gspca_dev, gainreg + 1, sd->gain & 0xff);
1082 }
1083 else
953 sensor_write1(gspca_dev, 0x10, sd->gain); 1084 sensor_write1(gspca_dev, 0x10, sd->gain);
954 }
955} 1085}
956 1086
1087static void setcontrast(struct gspca_dev *gspca_dev)
1088{
1089 struct sd *sd = (struct sd *) gspca_dev;
1090
1091 if (gspca_dev->ctrl_dis & (1 << CONTRAST_IDX))
1092 return;
1093
1094 sensor_write1(gspca_dev, 0x1c, sd->contrast);
1095}
1096
1097
957static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val) 1098static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
958{ 1099{
959 struct sd *sd = (struct sd *) gspca_dev; 1100 struct sd *sd = (struct sd *) gspca_dev;
@@ -1008,6 +1149,25 @@ static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val)
1008 return 0; 1149 return 0;
1009} 1150}
1010 1151
1152static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
1153{
1154 struct sd *sd = (struct sd *) gspca_dev;
1155
1156 sd->contrast = val;
1157 if (gspca_dev->streaming)
1158 setcontrast(gspca_dev);
1159 return 0;
1160}
1161
1162
1163static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
1164{
1165 struct sd *sd = (struct sd *) gspca_dev;
1166
1167 *val = sd->contrast;
1168 return 0;
1169}
1170
1011static int sd_setmin_clockdiv(struct gspca_dev *gspca_dev, __s32 val) 1171static int sd_setmin_clockdiv(struct gspca_dev *gspca_dev, __s32 val)
1012{ 1172{
1013 struct sd *sd = (struct sd *) gspca_dev; 1173 struct sd *sd = (struct sd *) gspca_dev;
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c
index b4f965731244..bc4ced6c013b 100644
--- a/drivers/media/video/gspca/ov519.c
+++ b/drivers/media/video/gspca/ov519.c
@@ -38,6 +38,7 @@
38 */ 38 */
39#define MODULE_NAME "ov519" 39#define MODULE_NAME "ov519"
40 40
41#include <linux/input.h>
41#include "gspca.h" 42#include "gspca.h"
42 43
43MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>"); 44MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
@@ -70,6 +71,9 @@ struct sd {
70 char invert_led; 71 char invert_led;
71#define BRIDGE_INVERT_LED 8 72#define BRIDGE_INVERT_LED 8
72 73
74 char snapshot_pressed;
75 char snapshot_needs_reset;
76
73 /* Determined by sensor type */ 77 /* Determined by sensor type */
74 __u8 sif; 78 __u8 sif;
75 79
@@ -99,10 +103,12 @@ struct sd {
99#define SEN_OV66308AF 5 103#define SEN_OV66308AF 5
100#define SEN_OV7610 6 104#define SEN_OV7610 6
101#define SEN_OV7620 7 105#define SEN_OV7620 7
102#define SEN_OV7640 8 106#define SEN_OV7620AE 8
103#define SEN_OV7670 9 107#define SEN_OV7640 9
104#define SEN_OV76BE 10 108#define SEN_OV7648 10
105#define SEN_OV8610 11 109#define SEN_OV7670 11
110#define SEN_OV76BE 12
111#define SEN_OV8610 13
106 112
107 u8 sensor_addr; 113 u8 sensor_addr;
108 int sensor_width; 114 int sensor_width;
@@ -139,6 +145,7 @@ static void setautobrightness(struct sd *sd);
139static void setfreq(struct sd *sd); 145static void setfreq(struct sd *sd);
140 146
141static const struct ctrl sd_ctrls[] = { 147static const struct ctrl sd_ctrls[] = {
148#define BRIGHTNESS_IDX 0
142 { 149 {
143 { 150 {
144 .id = V4L2_CID_BRIGHTNESS, 151 .id = V4L2_CID_BRIGHTNESS,
@@ -153,6 +160,7 @@ static const struct ctrl sd_ctrls[] = {
153 .set = sd_setbrightness, 160 .set = sd_setbrightness,
154 .get = sd_getbrightness, 161 .get = sd_getbrightness,
155 }, 162 },
163#define CONTRAST_IDX 1
156 { 164 {
157 { 165 {
158 .id = V4L2_CID_CONTRAST, 166 .id = V4L2_CID_CONTRAST,
@@ -167,6 +175,7 @@ static const struct ctrl sd_ctrls[] = {
167 .set = sd_setcontrast, 175 .set = sd_setcontrast,
168 .get = sd_getcontrast, 176 .get = sd_getcontrast,
169 }, 177 },
178#define COLOR_IDX 2
170 { 179 {
171 { 180 {
172 .id = V4L2_CID_SATURATION, 181 .id = V4L2_CID_SATURATION,
@@ -2554,7 +2563,7 @@ static int ov7xx0_configure(struct sd *sd)
2554 /* I don't know what's different about the 76BE yet. */ 2563 /* I don't know what's different about the 76BE yet. */
2555 if (i2c_r(sd, 0x15) & 1) { 2564 if (i2c_r(sd, 0x15) & 1) {
2556 PDEBUG(D_PROBE, "Sensor is an OV7620AE"); 2565 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2557 sd->sensor = SEN_OV7620; 2566 sd->sensor = SEN_OV7620AE;
2558 } else { 2567 } else {
2559 PDEBUG(D_PROBE, "Sensor is an OV76BE"); 2568 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2560 sd->sensor = SEN_OV76BE; 2569 sd->sensor = SEN_OV76BE;
@@ -2588,7 +2597,7 @@ static int ov7xx0_configure(struct sd *sd)
2588 break; 2597 break;
2589 case 0x48: 2598 case 0x48:
2590 PDEBUG(D_PROBE, "Sensor is an OV7648"); 2599 PDEBUG(D_PROBE, "Sensor is an OV7648");
2591 sd->sensor = SEN_OV7640; /* FIXME */ 2600 sd->sensor = SEN_OV7648;
2592 break; 2601 break;
2593 default: 2602 default:
2594 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low); 2603 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
@@ -2680,6 +2689,36 @@ static void ov51x_led_control(struct sd *sd, int on)
2680 } 2689 }
2681} 2690}
2682 2691
2692static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2693{
2694 struct sd *sd = (struct sd *) gspca_dev;
2695
2696 if (!sd->snapshot_needs_reset)
2697 return;
2698
2699 /* Note it is important that we clear sd->snapshot_needs_reset,
2700 before actually clearing the snapshot state in the bridge
2701 otherwise we might race with the pkt_scan interrupt handler */
2702 sd->snapshot_needs_reset = 0;
2703
2704 switch (sd->bridge) {
2705 case BRIDGE_OV511:
2706 case BRIDGE_OV511PLUS:
2707 reg_w(sd, R51x_SYS_SNAP, 0x02);
2708 reg_w(sd, R51x_SYS_SNAP, 0x00);
2709 break;
2710 case BRIDGE_OV518:
2711 case BRIDGE_OV518PLUS:
2712 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2713 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2714 break;
2715 case BRIDGE_OV519:
2716 reg_w(sd, R51x_SYS_RESET, 0x40);
2717 reg_w(sd, R51x_SYS_RESET, 0x00);
2718 break;
2719 }
2720}
2721
2683static int ov51x_upload_quan_tables(struct sd *sd) 2722static int ov51x_upload_quan_tables(struct sd *sd)
2684{ 2723{
2685 const unsigned char yQuanTable511[] = { 2724 const unsigned char yQuanTable511[] = {
@@ -3115,7 +3154,11 @@ static int sd_config(struct gspca_dev *gspca_dev,
3115 (1 << OV7670_FREQ_IDX); 3154 (1 << OV7670_FREQ_IDX);
3116 } 3155 }
3117 sd->quality = QUALITY_DEF; 3156 sd->quality = QUALITY_DEF;
3118 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670) 3157 if (sd->sensor == SEN_OV7640 ||
3158 sd->sensor == SEN_OV7648)
3159 gspca_dev->ctrl_dis |= (1 << AUTOBRIGHT_IDX) |
3160 (1 << CONTRAST_IDX);
3161 if (sd->sensor == SEN_OV7670)
3119 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX; 3162 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
3120 /* OV8610 Frequency filter control should work but needs testing */ 3163 /* OV8610 Frequency filter control should work but needs testing */
3121 if (sd->sensor == SEN_OV8610) 3164 if (sd->sensor == SEN_OV8610)
@@ -3169,10 +3212,12 @@ static int sd_init(struct gspca_dev *gspca_dev)
3169 return -EIO; 3212 return -EIO;
3170 break; 3213 break;
3171 case SEN_OV7620: 3214 case SEN_OV7620:
3215 case SEN_OV7620AE:
3172 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620))) 3216 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
3173 return -EIO; 3217 return -EIO;
3174 break; 3218 break;
3175 case SEN_OV7640: 3219 case SEN_OV7640:
3220 case SEN_OV7648:
3176 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640))) 3221 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
3177 return -EIO; 3222 return -EIO;
3178 break; 3223 break;
@@ -3246,7 +3291,9 @@ static int ov511_mode_init_regs(struct sd *sd)
3246 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed 3291 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3247 for more sensors we need to do this for them too */ 3292 for more sensors we need to do this for them too */
3248 case SEN_OV7620: 3293 case SEN_OV7620:
3294 case SEN_OV7620AE:
3249 case SEN_OV7640: 3295 case SEN_OV7640:
3296 case SEN_OV7648:
3250 case SEN_OV76BE: 3297 case SEN_OV76BE:
3251 if (sd->gspca_dev.width == 320) 3298 if (sd->gspca_dev.width == 320)
3252 interlaced = 1; 3299 interlaced = 1;
@@ -3377,7 +3424,7 @@ static int ov518_mode_init_regs(struct sd *sd)
3377 3424
3378 if (sd->bridge == BRIDGE_OV518PLUS) { 3425 if (sd->bridge == BRIDGE_OV518PLUS) {
3379 switch (sd->sensor) { 3426 switch (sd->sensor) {
3380 case SEN_OV7620: 3427 case SEN_OV7620AE:
3381 if (sd->gspca_dev.width == 320) { 3428 if (sd->gspca_dev.width == 320) {
3382 reg_w(sd, 0x20, 0x00); 3429 reg_w(sd, 0x20, 0x00);
3383 reg_w(sd, 0x21, 0x19); 3430 reg_w(sd, 0x21, 0x19);
@@ -3386,6 +3433,10 @@ static int ov518_mode_init_regs(struct sd *sd)
3386 reg_w(sd, 0x21, 0x1f); 3433 reg_w(sd, 0x21, 0x1f);
3387 } 3434 }
3388 break; 3435 break;
3436 case SEN_OV7620:
3437 reg_w(sd, 0x20, 0x00);
3438 reg_w(sd, 0x21, 0x19);
3439 break;
3389 default: 3440 default:
3390 reg_w(sd, 0x21, 0x19); 3441 reg_w(sd, 0x21, 0x19);
3391 } 3442 }
@@ -3488,7 +3539,8 @@ static int ov519_mode_init_regs(struct sd *sd)
3488 if (write_regvals(sd, mode_init_519, 3539 if (write_regvals(sd, mode_init_519,
3489 ARRAY_SIZE(mode_init_519))) 3540 ARRAY_SIZE(mode_init_519)))
3490 return -EIO; 3541 return -EIO;
3491 if (sd->sensor == SEN_OV7640) { 3542 if (sd->sensor == SEN_OV7640 ||
3543 sd->sensor == SEN_OV7648) {
3492 /* Select 8-bit input mode */ 3544 /* Select 8-bit input mode */
3493 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10); 3545 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3494 } 3546 }
@@ -3503,6 +3555,9 @@ static int ov519_mode_init_regs(struct sd *sd)
3503 if (sd->sensor == SEN_OV7670 && 3555 if (sd->sensor == SEN_OV7670 &&
3504 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv) 3556 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3505 reg_w(sd, OV519_R12_X_OFFSETL, 0x04); 3557 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3558 else if (sd->sensor == SEN_OV7648 &&
3559 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3560 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3506 else 3561 else
3507 reg_w(sd, OV519_R12_X_OFFSETL, 0x00); 3562 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3508 reg_w(sd, OV519_R13_X_OFFSETH, 0x00); 3563 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
@@ -3520,6 +3575,7 @@ static int ov519_mode_init_regs(struct sd *sd)
3520 sd->clockdiv = 0; 3575 sd->clockdiv = 0;
3521 switch (sd->sensor) { 3576 switch (sd->sensor) {
3522 case SEN_OV7640: 3577 case SEN_OV7640:
3578 case SEN_OV7648:
3523 switch (sd->frame_rate) { 3579 switch (sd->frame_rate) {
3524 default: 3580 default:
3525/* case 30: */ 3581/* case 30: */
@@ -3649,6 +3705,7 @@ static int mode_init_ov_sensor_regs(struct sd *sd)
3649 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ 3705 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3650 break; 3706 break;
3651 case SEN_OV7620: 3707 case SEN_OV7620:
3708 case SEN_OV7620AE:
3652 case SEN_OV76BE: 3709 case SEN_OV76BE:
3653 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); 3710 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3654 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); 3711 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
@@ -3663,13 +3720,16 @@ static int mode_init_ov_sensor_regs(struct sd *sd)
3663 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e); 3720 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3664 break; 3721 break;
3665 case SEN_OV7640: 3722 case SEN_OV7640:
3723 case SEN_OV7648:
3666 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); 3724 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3667 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); 3725 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3668/* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */ 3726 /* Setting this undocumented bit in qvga mode removes a very
3669/* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */ 3727 annoying vertical shaking of the image */
3670/* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */ 3728 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3671/* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */ 3729 /* Unknown */
3672/* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */ 3730 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3731 /* Allow higher automatic gain (to allow higher framerates) */
3732 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3673 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */ 3733 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3674 break; 3734 break;
3675 case SEN_OV7670: 3735 case SEN_OV7670:
@@ -3795,11 +3855,13 @@ static int set_ov_sensor_window(struct sd *sd)
3795 } 3855 }
3796 break; 3856 break;
3797 case SEN_OV7620: 3857 case SEN_OV7620:
3858 case SEN_OV7620AE:
3798 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */ 3859 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
3799 hwebase = 0x2f; 3860 hwebase = 0x2f;
3800 vwsbase = vwebase = 0x05; 3861 vwsbase = vwebase = 0x05;
3801 break; 3862 break;
3802 case SEN_OV7640: 3863 case SEN_OV7640:
3864 case SEN_OV7648:
3803 hwsbase = 0x1a; 3865 hwsbase = 0x1a;
3804 hwebase = 0x1a; 3866 hwebase = 0x1a;
3805 vwsbase = vwebase = 0x03; 3867 vwsbase = vwebase = 0x03;
@@ -3893,6 +3955,12 @@ static int sd_start(struct gspca_dev *gspca_dev)
3893 setautobrightness(sd); 3955 setautobrightness(sd);
3894 setfreq(sd); 3956 setfreq(sd);
3895 3957
3958 /* Force clear snapshot state in case the snapshot button was
3959 pressed while we weren't streaming */
3960 sd->snapshot_needs_reset = 1;
3961 sd_reset_snapshot(gspca_dev);
3962 sd->snapshot_pressed = 0;
3963
3896 ret = ov51x_restart(sd); 3964 ret = ov51x_restart(sd);
3897 if (ret < 0) 3965 if (ret < 0)
3898 goto out; 3966 goto out;
@@ -3919,6 +3987,34 @@ static void sd_stop0(struct gspca_dev *gspca_dev)
3919 w9968cf_stop0(sd); 3987 w9968cf_stop0(sd);
3920} 3988}
3921 3989
3990static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
3991{
3992 struct sd *sd = (struct sd *) gspca_dev;
3993
3994 if (sd->snapshot_pressed != state) {
3995#ifdef CONFIG_INPUT
3996 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
3997 input_sync(gspca_dev->input_dev);
3998#endif
3999 if (state)
4000 sd->snapshot_needs_reset = 1;
4001
4002 sd->snapshot_pressed = state;
4003 } else {
4004 /* On the ov511 / ov519 we need to reset the button state
4005 multiple times, as resetting does not work as long as the
4006 button stays pressed */
4007 switch (sd->bridge) {
4008 case BRIDGE_OV511:
4009 case BRIDGE_OV511PLUS:
4010 case BRIDGE_OV519:
4011 if (state)
4012 sd->snapshot_needs_reset = 1;
4013 break;
4014 }
4015 }
4016}
4017
3922static void ov511_pkt_scan(struct gspca_dev *gspca_dev, 4018static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3923 u8 *in, /* isoc packet */ 4019 u8 *in, /* isoc packet */
3924 int len) /* iso packet length */ 4020 int len) /* iso packet length */
@@ -3940,6 +4036,7 @@ static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3940 */ 4036 */
3941 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) && 4037 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
3942 (in[8] & 0x08)) { 4038 (in[8] & 0x08)) {
4039 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
3943 if (in[8] & 0x80) { 4040 if (in[8] & 0x80) {
3944 /* Frame end */ 4041 /* Frame end */
3945 if ((in[9] + 1) * 8 != gspca_dev->width || 4042 if ((in[9] + 1) * 8 != gspca_dev->width ||
@@ -3977,6 +4074,7 @@ static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
3977 /* A false positive here is likely, until OVT gives me 4074 /* A false positive here is likely, until OVT gives me
3978 * the definitive SOF/EOF format */ 4075 * the definitive SOF/EOF format */
3979 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { 4076 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4077 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
3980 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); 4078 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
3981 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); 4079 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
3982 sd->packet_nr = 0; 4080 sd->packet_nr = 0;
@@ -4024,6 +4122,9 @@ static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4024 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) { 4122 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4025 switch (data[3]) { 4123 switch (data[3]) {
4026 case 0x50: /* start of frame */ 4124 case 0x50: /* start of frame */
4125 /* Don't check the button state here, as the state
4126 usually (always ?) changes at EOF and checking it
4127 here leads to unnecessary snapshot state resets. */
4027#define HDRSZ 16 4128#define HDRSZ 16
4028 data += HDRSZ; 4129 data += HDRSZ;
4029 len -= HDRSZ; 4130 len -= HDRSZ;
@@ -4035,6 +4136,7 @@ static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4035 gspca_dev->last_packet_type = DISCARD_PACKET; 4136 gspca_dev->last_packet_type = DISCARD_PACKET;
4036 return; 4137 return;
4037 case 0x51: /* end of frame */ 4138 case 0x51: /* end of frame */
4139 ov51x_handle_button(gspca_dev, data[11] & 1);
4038 if (data[9] != 0) 4140 if (data[9] != 0)
4039 gspca_dev->last_packet_type = DISCARD_PACKET; 4141 gspca_dev->last_packet_type = DISCARD_PACKET;
4040 gspca_frame_add(gspca_dev, LAST_PACKET, 4142 gspca_frame_add(gspca_dev, LAST_PACKET,
@@ -4103,9 +4205,11 @@ static void setbrightness(struct gspca_dev *gspca_dev)
4103 case SEN_OV6630: 4205 case SEN_OV6630:
4104 case SEN_OV66308AF: 4206 case SEN_OV66308AF:
4105 case SEN_OV7640: 4207 case SEN_OV7640:
4208 case SEN_OV7648:
4106 i2c_w(sd, OV7610_REG_BRT, val); 4209 i2c_w(sd, OV7610_REG_BRT, val);
4107 break; 4210 break;
4108 case SEN_OV7620: 4211 case SEN_OV7620:
4212 case SEN_OV7620AE:
4109 /* 7620 doesn't like manual changes when in auto mode */ 4213 /* 7620 doesn't like manual changes when in auto mode */
4110 if (!sd->autobrightness) 4214 if (!sd->autobrightness)
4111 i2c_w(sd, OV7610_REG_BRT, val); 4215 i2c_w(sd, OV7610_REG_BRT, val);
@@ -4142,7 +4246,8 @@ static void setcontrast(struct gspca_dev *gspca_dev)
4142 i2c_w(sd, 0x64, ctab[val >> 5]); 4246 i2c_w(sd, 0x64, ctab[val >> 5]);
4143 break; 4247 break;
4144 } 4248 }
4145 case SEN_OV7620: { 4249 case SEN_OV7620:
4250 case SEN_OV7620AE: {
4146 static const __u8 ctab[] = { 4251 static const __u8 ctab[] = {
4147 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57, 4252 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4148 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff 4253 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
@@ -4152,10 +4257,6 @@ static void setcontrast(struct gspca_dev *gspca_dev)
4152 i2c_w(sd, 0x64, ctab[val >> 4]); 4257 i2c_w(sd, 0x64, ctab[val >> 4]);
4153 break; 4258 break;
4154 } 4259 }
4155 case SEN_OV7640:
4156 /* Use gain control instead. */
4157 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
4158 break;
4159 case SEN_OV7670: 4260 case SEN_OV7670:
4160 /* check that this isn't just the same as ov7610 */ 4261 /* check that this isn't just the same as ov7610 */
4161 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1); 4262 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
@@ -4179,6 +4280,7 @@ static void setcolors(struct gspca_dev *gspca_dev)
4179 i2c_w(sd, OV7610_REG_SAT, val); 4280 i2c_w(sd, OV7610_REG_SAT, val);
4180 break; 4281 break;
4181 case SEN_OV7620: 4282 case SEN_OV7620:
4283 case SEN_OV7620AE:
4182 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */ 4284 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4183/* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e); 4285/* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4184 if (rc < 0) 4286 if (rc < 0)
@@ -4186,6 +4288,7 @@ static void setcolors(struct gspca_dev *gspca_dev)
4186 i2c_w(sd, OV7610_REG_SAT, val); 4288 i2c_w(sd, OV7610_REG_SAT, val);
4187 break; 4289 break;
4188 case SEN_OV7640: 4290 case SEN_OV7640:
4291 case SEN_OV7648:
4189 i2c_w(sd, OV7610_REG_SAT, val & 0xf0); 4292 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4190 break; 4293 break;
4191 case SEN_OV7670: 4294 case SEN_OV7670:
@@ -4198,7 +4301,8 @@ static void setcolors(struct gspca_dev *gspca_dev)
4198 4301
4199static void setautobrightness(struct sd *sd) 4302static void setautobrightness(struct sd *sd)
4200{ 4303{
4201 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670 || 4304 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7648 ||
4305 sd->sensor == SEN_OV7670 ||
4202 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610) 4306 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4203 return; 4307 return;
4204 4308
@@ -4475,9 +4579,13 @@ static const struct sd_desc sd_desc = {
4475 .stopN = sd_stopN, 4579 .stopN = sd_stopN,
4476 .stop0 = sd_stop0, 4580 .stop0 = sd_stop0,
4477 .pkt_scan = sd_pkt_scan, 4581 .pkt_scan = sd_pkt_scan,
4582 .dq_callback = sd_reset_snapshot,
4478 .querymenu = sd_querymenu, 4583 .querymenu = sd_querymenu,
4479 .get_jcomp = sd_get_jcomp, 4584 .get_jcomp = sd_get_jcomp,
4480 .set_jcomp = sd_set_jcomp, 4585 .set_jcomp = sd_set_jcomp,
4586#ifdef CONFIG_INPUT
4587 .other_input = 1,
4588#endif
4481}; 4589};
4482 4590
4483/* -- module initialisation -- */ 4591/* -- module initialisation -- */
@@ -4494,7 +4602,8 @@ static const __devinitdata struct usb_device_id device_table[] = {
4494 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, 4602 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4495 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 }, 4603 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4496 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 }, 4604 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4497 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 }, 4605 {USB_DEVICE(0x054c, 0x0155),
4606 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4498 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 }, 4607 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4499 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 }, 4608 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4500 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 }, 4609 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
diff --git a/drivers/media/video/gspca/ov534.c b/drivers/media/video/gspca/ov534.c
index 0a6b8f07a69d..957e05e2d08f 100644
--- a/drivers/media/video/gspca/ov534.c
+++ b/drivers/media/video/gspca/ov534.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * ov534 gspca driver 2 * ov534-ov772x gspca driver
3 * 3 *
4 * Copyright (C) 2008 Antonio Ospite <ospite@studenti.unina.it> 4 * Copyright (C) 2008 Antonio Ospite <ospite@studenti.unina.it>
5 * Copyright (C) 2008 Jim Paris <jim@jtan.com> 5 * Copyright (C) 2008 Jim Paris <jim@jtan.com>
@@ -68,12 +68,7 @@ struct sd {
68 s8 sharpness; 68 s8 sharpness;
69 u8 hflip; 69 u8 hflip;
70 u8 vflip; 70 u8 vflip;
71 u8 satur;
72 u8 lightfreq;
73 71
74 u8 sensor;
75#define SENSOR_OV772X 0
76#define SENSOR_OV965X 1
77}; 72};
78 73
79/* V4L2 controls supported by the driver */ 74/* V4L2 controls supported by the driver */
@@ -101,12 +96,8 @@ static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
101static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val); 96static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
102static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val); 97static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
103static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val); 98static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
104static int sd_setsatur(struct gspca_dev *gspca_dev, __s32 val);
105static int sd_getsatur(struct gspca_dev *gspca_dev, __s32 *val);
106static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
107static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
108 99
109static struct ctrl sd_ctrls_ov772x[] = { 100static const struct ctrl sd_ctrls[] = {
110 { /* 0 */ 101 { /* 0 */
111 { 102 {
112 .id = V4L2_CID_BRIGHTNESS, 103 .id = V4L2_CID_BRIGHTNESS,
@@ -115,8 +106,8 @@ static struct ctrl sd_ctrls_ov772x[] = {
115 .minimum = 0, 106 .minimum = 0,
116 .maximum = 255, 107 .maximum = 255,
117 .step = 1, 108 .step = 1,
118#define BRIGHTNESS_77_DEF 20 109#define BRIGHTNESS_DEF 20
119 .default_value = BRIGHTNESS_77_DEF, 110 .default_value = BRIGHTNESS_DEF,
120 }, 111 },
121 .set = sd_setbrightness, 112 .set = sd_setbrightness,
122 .get = sd_getbrightness, 113 .get = sd_getbrightness,
@@ -129,8 +120,8 @@ static struct ctrl sd_ctrls_ov772x[] = {
129 .minimum = 0, 120 .minimum = 0,
130 .maximum = 255, 121 .maximum = 255,
131 .step = 1, 122 .step = 1,
132#define CONTRAST_77_DEF 37 123#define CONTRAST_DEF 37
133 .default_value = CONTRAST_77_DEF, 124 .default_value = CONTRAST_DEF,
134 }, 125 },
135 .set = sd_setcontrast, 126 .set = sd_setcontrast,
136 .get = sd_getcontrast, 127 .get = sd_getcontrast,
@@ -157,8 +148,8 @@ static struct ctrl sd_ctrls_ov772x[] = {
157 .minimum = 0, 148 .minimum = 0,
158 .maximum = 255, 149 .maximum = 255,
159 .step = 1, 150 .step = 1,
160#define EXPO_77_DEF 120 151#define EXPO_DEF 120
161 .default_value = EXPO_77_DEF, 152 .default_value = EXPO_DEF,
162 }, 153 },
163 .set = sd_setexposure, 154 .set = sd_setexposure,
164 .get = sd_getexposure, 155 .get = sd_getexposure,
@@ -213,13 +204,13 @@ static struct ctrl sd_ctrls_ov772x[] = {
213 .minimum = 0, 204 .minimum = 0,
214 .maximum = 1, 205 .maximum = 1,
215 .step = 1, 206 .step = 1,
216#define AUTOGAIN_77_DEF 0 207#define AUTOGAIN_DEF 0
217 .default_value = AUTOGAIN_77_DEF, 208 .default_value = AUTOGAIN_DEF,
218 }, 209 },
219 .set = sd_setautogain, 210 .set = sd_setautogain,
220 .get = sd_getautogain, 211 .get = sd_getautogain,
221 }, 212 },
222#define AWB_77_IDX 8 213#define AWB_IDX 8
223 { /* 8 */ 214 { /* 8 */
224 { 215 {
225 .id = V4L2_CID_AUTO_WHITE_BALANCE, 216 .id = V4L2_CID_AUTO_WHITE_BALANCE,
@@ -242,8 +233,8 @@ static struct ctrl sd_ctrls_ov772x[] = {
242 .minimum = 0, 233 .minimum = 0,
243 .maximum = 63, 234 .maximum = 63,
244 .step = 1, 235 .step = 1,
245#define SHARPNESS_77_DEF 0 236#define SHARPNESS_DEF 0
246 .default_value = SHARPNESS_77_DEF, 237 .default_value = SHARPNESS_DEF,
247 }, 238 },
248 .set = sd_setsharpness, 239 .set = sd_setsharpness,
249 .get = sd_getsharpness, 240 .get = sd_getsharpness,
@@ -277,107 +268,6 @@ static struct ctrl sd_ctrls_ov772x[] = {
277 .get = sd_getvflip, 268 .get = sd_getvflip,
278 }, 269 },
279}; 270};
280static struct ctrl sd_ctrls_ov965x[] = {
281 { /* 0 */
282 {
283 .id = V4L2_CID_BRIGHTNESS,
284 .type = V4L2_CTRL_TYPE_INTEGER,
285 .name = "Brightness",
286 .minimum = 0,
287 .maximum = 15,
288 .step = 1,
289#define BRIGHTNESS_96_DEF 7
290 .default_value = BRIGHTNESS_96_DEF,
291 },
292 .set = sd_setbrightness,
293 .get = sd_getbrightness,
294 },
295 { /* 1 */
296 {
297 .id = V4L2_CID_CONTRAST,
298 .type = V4L2_CTRL_TYPE_INTEGER,
299 .name = "Contrast",
300 .minimum = 0,
301 .maximum = 15,
302 .step = 1,
303#define CONTRAST_96_DEF 3
304 .default_value = CONTRAST_96_DEF,
305 },
306 .set = sd_setcontrast,
307 .get = sd_getcontrast,
308 },
309 { /* 2 */
310 {
311 .id = V4L2_CID_AUTOGAIN,
312 .type = V4L2_CTRL_TYPE_BOOLEAN,
313 .name = "Autogain",
314 .minimum = 0,
315 .maximum = 1,
316 .step = 1,
317#define AUTOGAIN_96_DEF 1
318 .default_value = AUTOGAIN_96_DEF,
319 },
320 .set = sd_setautogain,
321 .get = sd_getautogain,
322 },
323#define EXPO_96_IDX 3
324 { /* 3 */
325 {
326 .id = V4L2_CID_EXPOSURE,
327 .type = V4L2_CTRL_TYPE_INTEGER,
328 .name = "Exposure",
329 .minimum = 0,
330 .maximum = 3,
331 .step = 1,
332#define EXPO_96_DEF 0
333 .default_value = EXPO_96_DEF,
334 },
335 .set = sd_setexposure,
336 .get = sd_getexposure,
337 },
338 { /* 4 */
339 {
340 .id = V4L2_CID_SHARPNESS,
341 .type = V4L2_CTRL_TYPE_INTEGER,
342 .name = "Sharpness",
343 .minimum = -1, /* -1 = auto */
344 .maximum = 4,
345 .step = 1,
346#define SHARPNESS_96_DEF -1
347 .default_value = SHARPNESS_96_DEF,
348 },
349 .set = sd_setsharpness,
350 .get = sd_getsharpness,
351 },
352 { /* 5 */
353 {
354 .id = V4L2_CID_SATURATION,
355 .type = V4L2_CTRL_TYPE_INTEGER,
356 .name = "Saturation",
357 .minimum = 0,
358 .maximum = 4,
359 .step = 1,
360#define SATUR_DEF 2
361 .default_value = SATUR_DEF,
362 },
363 .set = sd_setsatur,
364 .get = sd_getsatur,
365 },
366 {
367 {
368 .id = V4L2_CID_POWER_LINE_FREQUENCY,
369 .type = V4L2_CTRL_TYPE_MENU,
370 .name = "Light frequency filter",
371 .minimum = 0,
372 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
373 .step = 1,
374#define FREQ_DEF 0
375 .default_value = FREQ_DEF,
376 },
377 .set = sd_setfreq,
378 .get = sd_getfreq,
379 },
380};
381 271
382static const struct v4l2_pix_format ov772x_mode[] = { 272static const struct v4l2_pix_format ov772x_mode[] = {
383 {320, 240, V4L2_PIX_FMT_YUYV, V4L2_FIELD_NONE, 273 {320, 240, V4L2_PIX_FMT_YUYV, V4L2_FIELD_NONE,
@@ -392,35 +282,21 @@ static const struct v4l2_pix_format ov772x_mode[] = {
392 .priv = 0}, 282 .priv = 0},
393}; 283};
394 284
395static const struct v4l2_pix_format ov965x_mode[] = { 285static const u8 qvga_rates[] = {125, 100, 75, 60, 50, 40, 30};
396 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 286static const u8 vga_rates[] = {60, 50, 40, 30, 15};
397 .bytesperline = 320, 287
398 .sizeimage = 320 * 240 * 3 / 8 + 590, 288static const struct framerates ov772x_framerates[] = {
399 .colorspace = V4L2_COLORSPACE_JPEG, 289 { /* 320x240 */
400 .priv = 4}, 290 .rates = qvga_rates,
401 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 291 .nrates = ARRAY_SIZE(qvga_rates),
402 .bytesperline = 640, 292 },
403 .sizeimage = 640 * 480 * 3 / 8 + 590, 293 { /* 640x480 */
404 .colorspace = V4L2_COLORSPACE_JPEG, 294 .rates = vga_rates,
405 .priv = 3}, 295 .nrates = ARRAY_SIZE(vga_rates),
406 {800, 600, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 296 },
407 .bytesperline = 800,
408 .sizeimage = 800 * 600 * 3 / 8 + 590,
409 .colorspace = V4L2_COLORSPACE_JPEG,
410 .priv = 2},
411 {1024, 768, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
412 .bytesperline = 1024,
413 .sizeimage = 1024 * 768 * 3 / 8 + 590,
414 .colorspace = V4L2_COLORSPACE_JPEG,
415 .priv = 1},
416 {1280, 1024, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
417 .bytesperline = 1280,
418 .sizeimage = 1280 * 1024 * 3 / 8 + 590,
419 .colorspace = V4L2_COLORSPACE_JPEG,
420 .priv = 0},
421}; 297};
422 298
423static const u8 bridge_init_ov772x[][2] = { 299static const u8 bridge_init[][2] = {
424 { 0xc2, 0x0c }, 300 { 0xc2, 0x0c },
425 { 0x88, 0xf8 }, 301 { 0x88, 0xf8 },
426 { 0xc3, 0x69 }, 302 { 0xc3, 0x69 },
@@ -478,7 +354,7 @@ static const u8 bridge_init_ov772x[][2] = {
478 { 0xc1, 0x3c }, 354 { 0xc1, 0x3c },
479 { 0xc2, 0x0c }, 355 { 0xc2, 0x0c },
480}; 356};
481static const u8 sensor_init_ov772x[][2] = { 357static const u8 sensor_init[][2] = {
482 { 0x12, 0x80 }, 358 { 0x12, 0x80 },
483 { 0x11, 0x01 }, 359 { 0x11, 0x01 },
484/*fixme: better have a delay?*/ 360/*fixme: better have a delay?*/
@@ -571,7 +447,7 @@ static const u8 sensor_init_ov772x[][2] = {
571 { 0x8e, 0x00 }, /* De-noise threshold */ 447 { 0x8e, 0x00 }, /* De-noise threshold */
572 { 0x0c, 0xd0 } 448 { 0x0c, 0xd0 }
573}; 449};
574static const u8 bridge_start_ov772x_vga[][2] = { 450static const u8 bridge_start_vga[][2] = {
575 {0x1c, 0x00}, 451 {0x1c, 0x00},
576 {0x1d, 0x40}, 452 {0x1d, 0x40},
577 {0x1d, 0x02}, 453 {0x1d, 0x02},
@@ -582,7 +458,7 @@ static const u8 bridge_start_ov772x_vga[][2] = {
582 {0xc0, 0x50}, 458 {0xc0, 0x50},
583 {0xc1, 0x3c}, 459 {0xc1, 0x3c},
584}; 460};
585static const u8 sensor_start_ov772x_vga[][2] = { 461static const u8 sensor_start_vga[][2] = {
586 {0x12, 0x00}, 462 {0x12, 0x00},
587 {0x17, 0x26}, 463 {0x17, 0x26},
588 {0x18, 0xa0}, 464 {0x18, 0xa0},
@@ -592,7 +468,7 @@ static const u8 sensor_start_ov772x_vga[][2] = {
592 {0x2c, 0xf0}, 468 {0x2c, 0xf0},
593 {0x65, 0x20}, 469 {0x65, 0x20},
594}; 470};
595static const u8 bridge_start_ov772x_qvga[][2] = { 471static const u8 bridge_start_qvga[][2] = {
596 {0x1c, 0x00}, 472 {0x1c, 0x00},
597 {0x1d, 0x40}, 473 {0x1d, 0x40},
598 {0x1d, 0x02}, 474 {0x1d, 0x02},
@@ -603,7 +479,7 @@ static const u8 bridge_start_ov772x_qvga[][2] = {
603 {0xc0, 0x28}, 479 {0xc0, 0x28},
604 {0xc1, 0x1e}, 480 {0xc1, 0x1e},
605}; 481};
606static const u8 sensor_start_ov772x_qvga[][2] = { 482static const u8 sensor_start_qvga[][2] = {
607 {0x12, 0x40}, 483 {0x12, 0x40},
608 {0x17, 0x3f}, 484 {0x17, 0x3f},
609 {0x18, 0x50}, 485 {0x18, 0x50},
@@ -614,571 +490,6 @@ static const u8 sensor_start_ov772x_qvga[][2] = {
614 {0x65, 0x2f}, 490 {0x65, 0x2f},
615}; 491};
616 492
617static const u8 bridge_init_ov965x[][2] = {
618 {0x88, 0xf8},
619 {0x89, 0xff},
620 {0x76, 0x03},
621 {0x92, 0x03},
622 {0x95, 0x10},
623 {0xe2, 0x00},
624 {0xe7, 0x3e},
625 {0x8d, 0x1c},
626 {0x8e, 0x00},
627 {0x8f, 0x00},
628 {0x1f, 0x00},
629 {0xc3, 0xf9},
630 {0x89, 0xff},
631 {0x88, 0xf8},
632 {0x76, 0x03},
633 {0x92, 0x01},
634 {0x93, 0x18},
635 {0x1c, 0x0a},
636 {0x1d, 0x48},
637 {0xc0, 0x50},
638 {0xc1, 0x3c},
639 {0x34, 0x05},
640 {0xc2, 0x0c},
641 {0xc3, 0xf9},
642 {0x34, 0x05},
643 {0xe7, 0x2e},
644 {0x31, 0xf9},
645 {0x35, 0x02},
646 {0xd9, 0x10},
647 {0x25, 0x42},
648 {0x94, 0x11},
649};
650
651static const u8 sensor_init_ov965x[][2] = {
652 {0x12, 0x80}, /* com7 - SSCB reset */
653 {0x00, 0x00}, /* gain */
654 {0x01, 0x80}, /* blue */
655 {0x02, 0x80}, /* red */
656 {0x03, 0x1b}, /* vref */
657 {0x04, 0x03}, /* com1 - exposure low bits */
658 {0x0b, 0x57}, /* ver */
659 {0x0e, 0x61}, /* com5 */
660 {0x0f, 0x42}, /* com6 */
661 {0x11, 0x00}, /* clkrc */
662 {0x12, 0x02}, /* com7 - 15fps VGA YUYV */
663 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
664 {0x14, 0x28}, /* com9 */
665 {0x16, 0x24}, /* reg16 */
666 {0x17, 0x1d}, /* hstart*/
667 {0x18, 0xbd}, /* hstop */
668 {0x19, 0x01}, /* vstrt */
669 {0x1a, 0x81}, /* vstop*/
670 {0x1e, 0x04}, /* mvfp */
671 {0x24, 0x3c}, /* aew */
672 {0x25, 0x36}, /* aeb */
673 {0x26, 0x71}, /* vpt */
674 {0x27, 0x08}, /* bbias */
675 {0x28, 0x08}, /* gbbias */
676 {0x29, 0x15}, /* gr com */
677 {0x2a, 0x00}, /* exhch */
678 {0x2b, 0x00}, /* exhcl */
679 {0x2c, 0x08}, /* rbias */
680 {0x32, 0xff}, /* href */
681 {0x33, 0x00}, /* chlf */
682 {0x34, 0x3f}, /* aref1 */
683 {0x35, 0x00}, /* aref2 */
684 {0x36, 0xf8}, /* aref3 */
685 {0x38, 0x72}, /* adc2 */
686 {0x39, 0x57}, /* aref4 */
687 {0x3a, 0x80}, /* tslb - yuyv */
688 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
689 {0x3d, 0x99}, /* com13 */
690 {0x3f, 0xc1}, /* edge */
691 {0x40, 0xc0}, /* com15 */
692 {0x41, 0x40}, /* com16 */
693 {0x42, 0xc0}, /* com17 */
694 {0x43, 0x0a}, /* rsvd */
695 {0x44, 0xf0},
696 {0x45, 0x46},
697 {0x46, 0x62},
698 {0x47, 0x2a},
699 {0x48, 0x3c},
700 {0x4a, 0xfc},
701 {0x4b, 0xfc},
702 {0x4c, 0x7f},
703 {0x4d, 0x7f},
704 {0x4e, 0x7f},
705 {0x4f, 0x98}, /* matrix */
706 {0x50, 0x98},
707 {0x51, 0x00},
708 {0x52, 0x28},
709 {0x53, 0x70},
710 {0x54, 0x98},
711 {0x58, 0x1a}, /* matrix coef sign */
712 {0x59, 0x85}, /* AWB control */
713 {0x5a, 0xa9},
714 {0x5b, 0x64},
715 {0x5c, 0x84},
716 {0x5d, 0x53},
717 {0x5e, 0x0e},
718 {0x5f, 0xf0}, /* AWB blue limit */
719 {0x60, 0xf0}, /* AWB red limit */
720 {0x61, 0xf0}, /* AWB green limit */
721 {0x62, 0x00}, /* lcc1 */
722 {0x63, 0x00}, /* lcc2 */
723 {0x64, 0x02}, /* lcc3 */
724 {0x65, 0x16}, /* lcc4 */
725 {0x66, 0x01}, /* lcc5 */
726 {0x69, 0x02}, /* hv */
727 {0x6b, 0x5a}, /* dbvl */
728 {0x6c, 0x04},
729 {0x6d, 0x55},
730 {0x6e, 0x00},
731 {0x6f, 0x9d},
732 {0x70, 0x21}, /* dnsth */
733 {0x71, 0x78},
734 {0x72, 0x00}, /* poidx */
735 {0x73, 0x01}, /* pckdv */
736 {0x74, 0x3a}, /* xindx */
737 {0x75, 0x35}, /* yindx */
738 {0x76, 0x01},
739 {0x77, 0x02},
740 {0x7a, 0x12}, /* gamma curve */
741 {0x7b, 0x08},
742 {0x7c, 0x16},
743 {0x7d, 0x30},
744 {0x7e, 0x5e},
745 {0x7f, 0x72},
746 {0x80, 0x82},
747 {0x81, 0x8e},
748 {0x82, 0x9a},
749 {0x83, 0xa4},
750 {0x84, 0xac},
751 {0x85, 0xb8},
752 {0x86, 0xc3},
753 {0x87, 0xd6},
754 {0x88, 0xe6},
755 {0x89, 0xf2},
756 {0x8a, 0x03},
757 {0x8c, 0x89}, /* com19 */
758 {0x14, 0x28}, /* com9 */
759 {0x90, 0x7d},
760 {0x91, 0x7b},
761 {0x9d, 0x03}, /* lcc6 */
762 {0x9e, 0x04}, /* lcc7 */
763 {0x9f, 0x7a},
764 {0xa0, 0x79},
765 {0xa1, 0x40}, /* aechm */
766 {0xa4, 0x50}, /* com21 */
767 {0xa5, 0x68}, /* com26 */
768 {0xa6, 0x4a}, /* AWB green */
769 {0xa8, 0xc1}, /* refa8 */
770 {0xa9, 0xef}, /* refa9 */
771 {0xaa, 0x92},
772 {0xab, 0x04},
773 {0xac, 0x80}, /* black level control */
774 {0xad, 0x80},
775 {0xae, 0x80},
776 {0xaf, 0x80},
777 {0xb2, 0xf2},
778 {0xb3, 0x20},
779 {0xb4, 0x20}, /* ctrlb4 */
780 {0xb5, 0x00},
781 {0xb6, 0xaf},
782 {0xbb, 0xae},
783 {0xbc, 0x7f}, /* ADC channel offsets */
784 {0xdb, 0x7f},
785 {0xbe, 0x7f},
786 {0xbf, 0x7f},
787 {0xc0, 0xe2},
788 {0xc1, 0xc0},
789 {0xc2, 0x01},
790 {0xc3, 0x4e},
791 {0xc6, 0x85},
792 {0xc7, 0x80}, /* com24 */
793 {0xc9, 0xe0},
794 {0xca, 0xe8},
795 {0xcb, 0xf0},
796 {0xcc, 0xd8},
797 {0xcd, 0xf1},
798 {0x4f, 0x98}, /* matrix */
799 {0x50, 0x98},
800 {0x51, 0x00},
801 {0x52, 0x28},
802 {0x53, 0x70},
803 {0x54, 0x98},
804 {0x58, 0x1a},
805 {0xff, 0x41}, /* read 41, write ff 00 */
806 {0x41, 0x40}, /* com16 */
807
808 {0xc5, 0x03}, /* 60 Hz banding filter */
809 {0x6a, 0x02}, /* 50 Hz banding filter */
810
811 {0x12, 0x62}, /* com7 - 30fps VGA YUV */
812 {0x36, 0xfa}, /* aref3 */
813 {0x69, 0x0a}, /* hv */
814 {0x8c, 0x89}, /* com22 */
815 {0x14, 0x28}, /* com9 */
816 {0x3e, 0x0c},
817 {0x41, 0x40}, /* com16 */
818 {0x72, 0x00},
819 {0x73, 0x00},
820 {0x74, 0x3a},
821 {0x75, 0x35},
822 {0x76, 0x01},
823 {0xc7, 0x80},
824 {0x03, 0x12}, /* vref */
825 {0x17, 0x16}, /* hstart */
826 {0x18, 0x02}, /* hstop */
827 {0x19, 0x01}, /* vstrt */
828 {0x1a, 0x3d}, /* vstop */
829 {0x32, 0xff}, /* href */
830 {0xc0, 0xaa},
831};
832
833static const u8 bridge_init_ov965x_2[][2] = {
834 {0x94, 0xaa},
835 {0xf1, 0x60},
836 {0xe5, 0x04},
837 {0xc0, 0x50},
838 {0xc1, 0x3c},
839 {0x8c, 0x00},
840 {0x8d, 0x1c},
841 {0x34, 0x05},
842
843 {0xc2, 0x0c},
844 {0xc3, 0xf9},
845 {0xda, 0x01},
846 {0x50, 0x00},
847 {0x51, 0xa0},
848 {0x52, 0x3c},
849 {0x53, 0x00},
850 {0x54, 0x00},
851 {0x55, 0x00},
852 {0x57, 0x00},
853 {0x5c, 0x00},
854 {0x5a, 0xa0},
855 {0x5b, 0x78},
856 {0x35, 0x02},
857 {0xd9, 0x10},
858 {0x94, 0x11},
859};
860
861static const u8 sensor_init_ov965x_2[][2] = {
862 {0x3b, 0xc4},
863 {0x1e, 0x04}, /* mvfp */
864 {0x13, 0xe0}, /* com8 */
865 {0x00, 0x00}, /* gain */
866 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
867 {0x11, 0x03}, /* clkrc */
868 {0x6b, 0x5a}, /* dblv */
869 {0x6a, 0x05},
870 {0xc5, 0x07},
871 {0xa2, 0x4b},
872 {0xa3, 0x3e},
873 {0x2d, 0x00},
874 {0xff, 0x42}, /* read 42, write ff 00 */
875 {0x42, 0xc0}, /* com17 */
876 {0x2d, 0x00},
877 {0xff, 0x42}, /* read 42, write ff 00 */
878 {0x42, 0xc1}, /* com17 */
879/* sharpness */
880 {0x3f, 0x01},
881 {0xff, 0x42}, /* read 42, write ff 00 */
882 {0x42, 0xc1}, /* com17 */
883/* saturation */
884 {0x4f, 0x98}, /* matrix */
885 {0x50, 0x98},
886 {0x51, 0x00},
887 {0x52, 0x28},
888 {0x53, 0x70},
889 {0x54, 0x98},
890 {0x58, 0x1a},
891 {0xff, 0x41}, /* read 41, write ff 00 */
892 {0x41, 0x40}, /* com16 */
893/* contrast */
894 {0x56, 0x40},
895/* brightness */
896 {0x55, 0x8f},
897/* expo */
898 {0x10, 0x25}, /* aech - exposure high bits */
899 {0xff, 0x13}, /* read 13, write ff 00 */
900 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
901};
902
903static const u8 sensor_start_ov965x_1_vga[][2] = { /* same for qvga */
904 {0x12, 0x62}, /* com7 - 30fps VGA YUV */
905 {0x36, 0xfa}, /* aref3 */
906 {0x69, 0x0a}, /* hv */
907 {0x8c, 0x89}, /* com22 */
908 {0x14, 0x28}, /* com9 */
909 {0x3e, 0x0c}, /* com14 */
910 {0x41, 0x40}, /* com16 */
911 {0x72, 0x00},
912 {0x73, 0x00},
913 {0x74, 0x3a},
914 {0x75, 0x35},
915 {0x76, 0x01},
916 {0xc7, 0x80}, /* com24 */
917 {0x03, 0x12}, /* vref */
918 {0x17, 0x16}, /* hstart */
919 {0x18, 0x02}, /* hstop */
920 {0x19, 0x01}, /* vstrt */
921 {0x1a, 0x3d}, /* vstop */
922 {0x32, 0xff}, /* href */
923 {0xc0, 0xaa},
924};
925
926static const u8 sensor_start_ov965x_1_svga[][2] = {
927 {0x12, 0x02}, /* com7 - YUYV - VGA 15 full resolution */
928 {0x36, 0xf8}, /* aref3 */
929 {0x69, 0x02}, /* hv */
930 {0x8c, 0x0d}, /* com22 */
931 {0x3e, 0x0c}, /* com14 */
932 {0x41, 0x40}, /* com16 */
933 {0x72, 0x00},
934 {0x73, 0x01},
935 {0x74, 0x3a},
936 {0x75, 0x35},
937 {0x76, 0x01},
938 {0xc7, 0x80}, /* com24 */
939 {0x03, 0x1b}, /* vref */
940 {0x17, 0x1d}, /* hstart */
941 {0x18, 0xbd}, /* hstop */
942 {0x19, 0x01}, /* vstrt */
943 {0x1a, 0x81}, /* vstop */
944 {0x32, 0xff}, /* href */
945 {0xc0, 0xe2},
946};
947
948static const u8 sensor_start_ov965x_1_xga[][2] = {
949 {0x12, 0x02}, /* com7 */
950 {0x36, 0xf8}, /* aref3 */
951 {0x69, 0x02}, /* hv */
952 {0x8c, 0x89}, /* com22 */
953 {0x14, 0x28}, /* com9 */
954 {0x3e, 0x0c}, /* com14 */
955 {0x41, 0x40}, /* com16 */
956 {0x72, 0x00},
957 {0x73, 0x01},
958 {0x74, 0x3a},
959 {0x75, 0x35},
960 {0x76, 0x01},
961 {0xc7, 0x80}, /* com24 */
962 {0x03, 0x1b}, /* vref */
963 {0x17, 0x1d}, /* hstart */
964 {0x18, 0xbd}, /* hstop */
965 {0x19, 0x01}, /* vstrt */
966 {0x1a, 0x81}, /* vstop */
967 {0x32, 0xff}, /* href */
968 {0xc0, 0xe2},
969};
970
971static const u8 sensor_start_ov965x_1_sxga[][2] = {
972 {0x12, 0x02}, /* com7 */
973 {0x36, 0xf8}, /* aref3 */
974 {0x69, 0x02}, /* hv */
975 {0x8c, 0x89}, /* com22 */
976 {0x14, 0x28}, /* com9 */
977 {0x3e, 0x0c}, /* com14 */
978 {0x41, 0x40}, /* com16 */
979 {0x72, 0x00},
980 {0x73, 0x01},
981 {0x74, 0x3a},
982 {0x75, 0x35},
983 {0x76, 0x01},
984 {0xc7, 0x80}, /* com24 */
985 {0x03, 0x1b}, /* vref */
986 {0x17, 0x1d}, /* hstart */
987 {0x18, 0x02}, /* hstop */
988 {0x19, 0x01}, /* vstrt */
989 {0x1a, 0x81}, /* vstop */
990 {0x32, 0xff}, /* href */
991 {0xc0, 0xe2},
992};
993
994static const u8 bridge_start_ov965x_qvga[][2] = {
995 {0x94, 0xaa},
996 {0xf1, 0x60},
997 {0xe5, 0x04},
998 {0xc0, 0x50},
999 {0xc1, 0x3c},
1000 {0x8c, 0x00},
1001 {0x8d, 0x1c},
1002 {0x34, 0x05},
1003
1004 {0xc2, 0x4c},
1005 {0xc3, 0xf9},
1006 {0xda, 0x00},
1007 {0x50, 0x00},
1008 {0x51, 0xa0},
1009 {0x52, 0x78},
1010 {0x53, 0x00},
1011 {0x54, 0x00},
1012 {0x55, 0x00},
1013 {0x57, 0x00},
1014 {0x5c, 0x00},
1015 {0x5a, 0x50},
1016 {0x5b, 0x3c},
1017 {0x35, 0x02},
1018 {0xd9, 0x10},
1019 {0x94, 0x11},
1020};
1021
1022static const u8 bridge_start_ov965x_vga[][2] = {
1023 {0x94, 0xaa},
1024 {0xf1, 0x60},
1025 {0xe5, 0x04},
1026 {0xc0, 0x50},
1027 {0xc1, 0x3c},
1028 {0x8c, 0x00},
1029 {0x8d, 0x1c},
1030 {0x34, 0x05},
1031 {0xc2, 0x0c},
1032 {0xc3, 0xf9},
1033 {0xda, 0x01},
1034 {0x50, 0x00},
1035 {0x51, 0xa0},
1036 {0x52, 0x3c},
1037 {0x53, 0x00},
1038 {0x54, 0x00},
1039 {0x55, 0x00},
1040 {0x57, 0x00},
1041 {0x5c, 0x00},
1042 {0x5a, 0xa0},
1043 {0x5b, 0x78},
1044 {0x35, 0x02},
1045 {0xd9, 0x10},
1046 {0x94, 0x11},
1047};
1048
1049static const u8 bridge_start_ov965x_svga[][2] = {
1050 {0x94, 0xaa},
1051 {0xf1, 0x60},
1052 {0xe5, 0x04},
1053 {0xc0, 0xa0},
1054 {0xc1, 0x80},
1055 {0x8c, 0x00},
1056 {0x8d, 0x1c},
1057 {0x34, 0x05},
1058 {0xc2, 0x4c},
1059 {0xc3, 0xf9},
1060 {0x50, 0x00},
1061 {0x51, 0x40},
1062 {0x52, 0x00},
1063 {0x53, 0x00},
1064 {0x54, 0x00},
1065 {0x55, 0x88},
1066 {0x57, 0x00},
1067 {0x5c, 0x00},
1068 {0x5a, 0xc8},
1069 {0x5b, 0x96},
1070 {0x35, 0x02},
1071 {0xd9, 0x10},
1072 {0xda, 0x00},
1073 {0x94, 0x11},
1074};
1075
1076static const u8 bridge_start_ov965x_xga[][2] = {
1077 {0x94, 0xaa},
1078 {0xf1, 0x60},
1079 {0xe5, 0x04},
1080 {0xc0, 0xa0},
1081 {0xc1, 0x80},
1082 {0x8c, 0x00},
1083 {0x8d, 0x1c},
1084 {0x34, 0x05},
1085 {0xc2, 0x4c},
1086 {0xc3, 0xf9},
1087 {0x50, 0x00},
1088 {0x51, 0x40},
1089 {0x52, 0x00},
1090 {0x53, 0x00},
1091 {0x54, 0x00},
1092 {0x55, 0x88},
1093 {0x57, 0x00},
1094 {0x5c, 0x01},
1095 {0x5a, 0x00},
1096 {0x5b, 0xc0},
1097 {0x35, 0x02},
1098 {0xd9, 0x10},
1099 {0xda, 0x01},
1100 {0x94, 0x11},
1101};
1102
1103static const u8 bridge_start_ov965x_sxga[][2] = {
1104 {0x94, 0xaa},
1105 {0xf1, 0x60},
1106 {0xe5, 0x04},
1107 {0xc0, 0xa0},
1108 {0xc1, 0x80},
1109 {0x8c, 0x00},
1110 {0x8d, 0x1c},
1111 {0x34, 0x05},
1112 {0xc2, 0x0c},
1113 {0xc3, 0xf9},
1114 {0xda, 0x00},
1115 {0x35, 0x02},
1116 {0xd9, 0x10},
1117 {0x94, 0x11},
1118};
1119
1120static const u8 sensor_start_ov965x_2_qvga[][2] = {
1121 {0x3b, 0xe4}, /* com11 - night mode 1/4 frame rate */
1122 {0x1e, 0x04}, /* mvfp */
1123 {0x13, 0xe0}, /* com8 */
1124 {0x00, 0x00},
1125 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
1126 {0x11, 0x01}, /* clkrc */
1127 {0x6b, 0x5a}, /* dblv */
1128 {0x6a, 0x02}, /* 50 Hz banding filter */
1129 {0xc5, 0x03}, /* 60 Hz banding filter */
1130 {0xa2, 0x96}, /* bd50 */
1131 {0xa3, 0x7d}, /* bd60 */
1132
1133 {0xff, 0x13}, /* read 13, write ff 00 */
1134 {0x13, 0xe7},
1135 {0x3a, 0x80}, /* tslb - yuyv */
1136};
1137
1138static const u8 sensor_start_ov965x_2_vga[][2] = {
1139 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
1140 {0x1e, 0x04}, /* mvfp */
1141 {0x13, 0xe0}, /* com8 */
1142 {0x00, 0x00},
1143 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
1144 {0x11, 0x03}, /* clkrc */
1145 {0x6b, 0x5a}, /* dblv */
1146 {0x6a, 0x05}, /* 50 Hz banding filter */
1147 {0xc5, 0x07}, /* 60 Hz banding filter */
1148 {0xa2, 0x4b}, /* bd50 */
1149 {0xa3, 0x3e}, /* bd60 */
1150
1151 {0x2d, 0x00}, /* advfl */
1152};
1153
1154static const u8 sensor_start_ov965x_2_svga[][2] = { /* same for xga */
1155 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
1156 {0x1e, 0x04}, /* mvfp */
1157 {0x13, 0xe0}, /* com8 */
1158 {0x00, 0x00},
1159 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
1160 {0x11, 0x01}, /* clkrc */
1161 {0x6b, 0x5a}, /* dblv */
1162 {0x6a, 0x0c}, /* 50 Hz banding filter */
1163 {0xc5, 0x0f}, /* 60 Hz banding filter */
1164 {0xa2, 0x4e}, /* bd50 */
1165 {0xa3, 0x41}, /* bd60 */
1166};
1167
1168static const u8 sensor_start_ov965x_2_sxga[][2] = {
1169 {0x13, 0xe0}, /* com8 */
1170 {0x00, 0x00},
1171 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
1172 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
1173 {0x1e, 0x04}, /* mvfp */
1174 {0x11, 0x01}, /* clkrc */
1175 {0x6b, 0x5a}, /* dblv */
1176 {0x6a, 0x0c}, /* 50 Hz banding filter */
1177 {0xc5, 0x0f}, /* 60 Hz banding filter */
1178 {0xa2, 0x4e}, /* bd50 */
1179 {0xa3, 0x41}, /* bd60 */
1180};
1181
1182static void ov534_reg_write(struct gspca_dev *gspca_dev, u16 reg, u8 val) 493static void ov534_reg_write(struct gspca_dev *gspca_dev, u16 reg, u8 val)
1183{ 494{
1184 struct usb_device *udev = gspca_dev->dev; 495 struct usb_device *udev = gspca_dev->dev;
@@ -1360,14 +671,14 @@ static void set_frame_rate(struct gspca_dev *gspca_dev)
1360 PDEBUG(D_PROBE, "frame_rate: %d", r->fps); 671 PDEBUG(D_PROBE, "frame_rate: %d", r->fps);
1361} 672}
1362 673
1363static void setbrightness_77(struct gspca_dev *gspca_dev) 674static void setbrightness(struct gspca_dev *gspca_dev)
1364{ 675{
1365 struct sd *sd = (struct sd *) gspca_dev; 676 struct sd *sd = (struct sd *) gspca_dev;
1366 677
1367 sccb_reg_write(gspca_dev, 0x9B, sd->brightness); 678 sccb_reg_write(gspca_dev, 0x9B, sd->brightness);
1368} 679}
1369 680
1370static void setcontrast_77(struct gspca_dev *gspca_dev) 681static void setcontrast(struct gspca_dev *gspca_dev)
1371{ 682{
1372 struct sd *sd = (struct sd *) gspca_dev; 683 struct sd *sd = (struct sd *) gspca_dev;
1373 684
@@ -1401,7 +712,7 @@ static void setgain(struct gspca_dev *gspca_dev)
1401 sccb_reg_write(gspca_dev, 0x00, val); 712 sccb_reg_write(gspca_dev, 0x00, val);
1402} 713}
1403 714
1404static void setexposure_77(struct gspca_dev *gspca_dev) 715static void setexposure(struct gspca_dev *gspca_dev)
1405{ 716{
1406 struct sd *sd = (struct sd *) gspca_dev; 717 struct sd *sd = (struct sd *) gspca_dev;
1407 u8 val; 718 u8 val;
@@ -1432,7 +743,7 @@ static void sethue(struct gspca_dev *gspca_dev)
1432 sccb_reg_write(gspca_dev, 0x01, sd->hue); 743 sccb_reg_write(gspca_dev, 0x01, sd->hue);
1433} 744}
1434 745
1435static void setautogain_77(struct gspca_dev *gspca_dev) 746static void setautogain(struct gspca_dev *gspca_dev)
1436{ 747{
1437 struct sd *sd = (struct sd *) gspca_dev; 748 struct sd *sd = (struct sd *) gspca_dev;
1438 749
@@ -1457,7 +768,7 @@ static void setawb(struct gspca_dev *gspca_dev)
1457 sccb_reg_write(gspca_dev, 0x63, 0xaa); /* AWB off */ 768 sccb_reg_write(gspca_dev, 0x63, 0xaa); /* AWB off */
1458} 769}
1459 770
1460static void setsharpness_77(struct gspca_dev *gspca_dev) 771static void setsharpness(struct gspca_dev *gspca_dev)
1461{ 772{
1462 struct sd *sd = (struct sd *) gspca_dev; 773 struct sd *sd = (struct sd *) gspca_dev;
1463 u8 val; 774 u8 val;
@@ -1491,132 +802,6 @@ static void setvflip(struct gspca_dev *gspca_dev)
1491 sccb_reg_read(gspca_dev, 0x0c) & 0x7f); 802 sccb_reg_read(gspca_dev, 0x0c) & 0x7f);
1492} 803}
1493 804
1494/* ov965x specific controls */
1495static void setbrightness_96(struct gspca_dev *gspca_dev)
1496{
1497 struct sd *sd = (struct sd *) gspca_dev;
1498 u8 val;
1499
1500 val = sd->brightness;
1501 if (val < 8)
1502 val = 15 - val; /* f .. 8 */
1503 else
1504 val = val - 8; /* 0 .. 7 */
1505 sccb_reg_write(gspca_dev, 0x55, /* brtn - brightness adjustment */
1506 0x0f | (val << 4));
1507}
1508
1509static void setcontrast_96(struct gspca_dev *gspca_dev)
1510{
1511 struct sd *sd = (struct sd *) gspca_dev;
1512
1513 sccb_reg_write(gspca_dev, 0x56, /* cnst1 - contrast 1 ctrl coeff */
1514 sd->contrast << 4);
1515}
1516
1517static void setexposure_96(struct gspca_dev *gspca_dev)
1518{
1519 struct sd *sd = (struct sd *) gspca_dev;
1520 u8 val;
1521 static const u8 expo[4] = {0x00, 0x25, 0x38, 0x5e};
1522
1523 sccb_reg_write(gspca_dev, 0x10, /* aec[9:2] */
1524 expo[sd->exposure]);
1525 val = sccb_reg_read(gspca_dev, 0x13); /* com8 */
1526 sccb_reg_write(gspca_dev, 0xff, 0x00);
1527 sccb_reg_write(gspca_dev, 0x13, val);
1528 val = sccb_reg_read(gspca_dev, 0xa1); /* aech */
1529 sccb_reg_write(gspca_dev, 0xff, 0x00);
1530 sccb_reg_write(gspca_dev, 0xa1, val & 0xe0); /* aec[15:10] = 0 */
1531}
1532
1533static void setsharpness_96(struct gspca_dev *gspca_dev)
1534{
1535 struct sd *sd = (struct sd *) gspca_dev;
1536 s8 val;
1537
1538 val = sd->sharpness;
1539 if (val < 0) { /* auto */
1540 val = sccb_reg_read(gspca_dev, 0x42); /* com17 */
1541 sccb_reg_write(gspca_dev, 0xff, 0x00);
1542 sccb_reg_write(gspca_dev, 0x42, val | 0x40);
1543 /* Edge enhancement strength auto adjust */
1544 return;
1545 }
1546 if (val != 0)
1547 val = 1 << (val - 1);
1548 sccb_reg_write(gspca_dev, 0x3f, /* edge - edge enhance. factor */
1549 val);
1550 val = sccb_reg_read(gspca_dev, 0x42); /* com17 */
1551 sccb_reg_write(gspca_dev, 0xff, 0x00);
1552 sccb_reg_write(gspca_dev, 0x42, val & 0xbf);
1553}
1554
1555static void setautogain_96(struct gspca_dev *gspca_dev)
1556{
1557 struct sd *sd = (struct sd *) gspca_dev;
1558 u8 val;
1559
1560/*fixme: should adjust agc/awb/aec by different controls */
1561 val = sd->autogain;
1562 val = sccb_reg_read(gspca_dev, 0x13); /* com8 */
1563 sccb_reg_write(gspca_dev, 0xff, 0x00);
1564 if (sd->autogain)
1565 val |= 0x05; /* agc & aec */
1566 else
1567 val &= 0xfa;
1568 sccb_reg_write(gspca_dev, 0x13, val);
1569}
1570
1571static void setsatur(struct gspca_dev *gspca_dev)
1572{
1573 struct sd *sd = (struct sd *) gspca_dev;
1574 u8 val1, val2, val3;
1575 static const u8 matrix[5][2] = {
1576 {0x14, 0x38},
1577 {0x1e, 0x54},
1578 {0x28, 0x70},
1579 {0x32, 0x8c},
1580 {0x48, 0x90}
1581 };
1582
1583 val1 = matrix[sd->satur][0];
1584 val2 = matrix[sd->satur][1];
1585 val3 = val1 + val2;
1586 sccb_reg_write(gspca_dev, 0x4f, val3); /* matrix coeff */
1587 sccb_reg_write(gspca_dev, 0x50, val3);
1588 sccb_reg_write(gspca_dev, 0x51, 0x00);
1589 sccb_reg_write(gspca_dev, 0x52, val1);
1590 sccb_reg_write(gspca_dev, 0x53, val2);
1591 sccb_reg_write(gspca_dev, 0x54, val3);
1592 sccb_reg_write(gspca_dev, 0x58, 0x1a); /* mtxs - coeff signs */
1593 val1 = sccb_reg_read(gspca_dev, 0x41); /* com16 */
1594 sccb_reg_write(gspca_dev, 0xff, 0x00);
1595 sccb_reg_write(gspca_dev, 0x41, val1);
1596}
1597
1598static void setfreq(struct gspca_dev *gspca_dev)
1599{
1600 struct sd *sd = (struct sd *) gspca_dev;
1601 u8 val;
1602
1603 val = sccb_reg_read(gspca_dev, 0x13); /* com8 */
1604 sccb_reg_write(gspca_dev, 0xff, 0x00);
1605 if (sd->lightfreq == 0) {
1606 sccb_reg_write(gspca_dev, 0x13, val & 0xdf);
1607 return;
1608 }
1609 sccb_reg_write(gspca_dev, 0x13, val | 0x20);
1610
1611 val = sccb_reg_read(gspca_dev, 0x42); /* com17 */
1612 sccb_reg_write(gspca_dev, 0xff, 0x00);
1613 if (sd->lightfreq == 1)
1614 val |= 0x01;
1615 else
1616 val &= 0xfe;
1617 sccb_reg_write(gspca_dev, 0x42, val);
1618}
1619
1620/* this function is called at probe time */ 805/* this function is called at probe time */
1621static int sd_config(struct gspca_dev *gspca_dev, 806static int sd_config(struct gspca_dev *gspca_dev,
1622 const struct usb_device_id *id) 807 const struct usb_device_id *id)
@@ -1624,77 +809,50 @@ static int sd_config(struct gspca_dev *gspca_dev,
1624 struct sd *sd = (struct sd *) gspca_dev; 809 struct sd *sd = (struct sd *) gspca_dev;
1625 struct cam *cam; 810 struct cam *cam;
1626 811
1627 sd->sensor = id->driver_info;
1628
1629 cam = &gspca_dev->cam; 812 cam = &gspca_dev->cam;
1630 813
1631 if (sd->sensor == SENSOR_OV772X) { 814 cam->cam_mode = ov772x_mode;
1632 cam->cam_mode = ov772x_mode; 815 cam->nmodes = ARRAY_SIZE(ov772x_mode);
1633 cam->nmodes = ARRAY_SIZE(ov772x_mode); 816 cam->mode_framerates = ov772x_framerates;
1634 817
1635 cam->bulk = 1; 818 cam->bulk = 1;
1636 cam->bulk_size = 16384; 819 cam->bulk_size = 16384;
1637 cam->bulk_nurbs = 2; 820 cam->bulk_nurbs = 2;
1638 } else { /* ov965x */
1639 cam->cam_mode = ov965x_mode;
1640 cam->nmodes = ARRAY_SIZE(ov965x_mode);
1641 }
1642 821
1643 sd->frame_rate = 30; 822 sd->frame_rate = 30;
1644 823
1645 if (sd->sensor == SENSOR_OV772X) { 824 sd->brightness = BRIGHTNESS_DEF;
1646 sd->brightness = BRIGHTNESS_77_DEF; 825 sd->contrast = CONTRAST_DEF;
1647 sd->contrast = CONTRAST_77_DEF; 826 sd->gain = GAIN_DEF;
1648 sd->gain = GAIN_DEF; 827 sd->exposure = EXPO_DEF;
1649 sd->exposure = EXPO_77_DEF; 828 sd->redblc = RED_BALANCE_DEF;
1650 sd->redblc = RED_BALANCE_DEF; 829 sd->blueblc = BLUE_BALANCE_DEF;
1651 sd->blueblc = BLUE_BALANCE_DEF; 830 sd->hue = HUE_DEF;
1652 sd->hue = HUE_DEF; 831#if AUTOGAIN_DEF != 0
1653#if AUTOGAIN_77_DEF != 0 832 sd->autogain = AUTOGAIN_DEF;
1654 sd->autogain = AUTOGAIN_77_DEF;
1655#else 833#else
1656 gspca_dev->ctrl_inac |= (1 << AWB_77_IDX); 834 gspca_dev->ctrl_inac |= (1 << AWB_IDX);
1657#endif 835#endif
1658#if AWB_DEF != 0 836#if AWB_DEF != 0
1659 sd->awb = AWB_DEF 837 sd->awb = AWB_DEF
1660#endif 838#endif
1661#if SHARPNESS_77_DEF != 0 839#if SHARPNESS_DEF != 0
1662 sd->sharpness = SHARPNESS_77_DEF; 840 sd->sharpness = SHARPNESS_DEF;
1663#endif 841#endif
1664#if HFLIP_DEF != 0 842#if HFLIP_DEF != 0
1665 sd->hflip = HFLIP_DEF; 843 sd->hflip = HFLIP_DEF;
1666#endif 844#endif
1667#if VFLIP_DEF != 0 845#if VFLIP_DEF != 0
1668 sd->vflip = VFLIP_DEF; 846 sd->vflip = VFLIP_DEF;
1669#endif
1670 } else {
1671 sd->brightness = BRIGHTNESS_96_DEF;
1672 sd->contrast = CONTRAST_96_DEF;
1673#if AUTOGAIN_96_DEF != 0
1674 sd->autogain = AUTOGAIN_96_DEF;
1675 gspca_dev->ctrl_inac |= (1 << EXPO_96_IDX);
1676#endif 847#endif
1677#if EXPO_96_DEF != 0 848
1678 sd->exposure = EXPO_96_DEF;
1679#endif
1680#if SHARPNESS_96_DEF != 0
1681 sd->sharpness = SHARPNESS_96_DEF;
1682#endif
1683 sd->satur = SATUR_DEF;
1684 sd->lightfreq = FREQ_DEF;
1685 }
1686 return 0; 849 return 0;
1687} 850}
1688 851
1689/* this function is called at probe and resume time */ 852/* this function is called at probe and resume time */
1690static int sd_init(struct gspca_dev *gspca_dev) 853static int sd_init(struct gspca_dev *gspca_dev)
1691{ 854{
1692 struct sd *sd = (struct sd *) gspca_dev;
1693 u16 sensor_id; 855 u16 sensor_id;
1694 static const u8 sensor_addr[2] = {
1695 0x42, /* 0 SENSOR_OV772X */
1696 0x60, /* 1 SENSOR_OV965X */
1697 };
1698 856
1699 /* reset bridge */ 857 /* reset bridge */
1700 ov534_reg_write(gspca_dev, 0xe7, 0x3a); 858 ov534_reg_write(gspca_dev, 0xe7, 0x3a);
@@ -1702,8 +860,7 @@ static int sd_init(struct gspca_dev *gspca_dev)
1702 msleep(100); 860 msleep(100);
1703 861
1704 /* initialize the sensor address */ 862 /* initialize the sensor address */
1705 ov534_reg_write(gspca_dev, OV534_REG_ADDRESS, 863 ov534_reg_write(gspca_dev, OV534_REG_ADDRESS, 0x42);
1706 sensor_addr[sd->sensor]);
1707 864
1708 /* reset sensor */ 865 /* reset sensor */
1709 sccb_reg_write(gspca_dev, 0x12, 0x80); 866 sccb_reg_write(gspca_dev, 0x12, 0x80);
@@ -1717,64 +874,46 @@ static int sd_init(struct gspca_dev *gspca_dev)
1717 PDEBUG(D_PROBE, "Sensor ID: %04x", sensor_id); 874 PDEBUG(D_PROBE, "Sensor ID: %04x", sensor_id);
1718 875
1719 /* initialize */ 876 /* initialize */
1720 switch (sd->sensor) { 877 reg_w_array(gspca_dev, bridge_init,
1721 case SENSOR_OV772X: 878 ARRAY_SIZE(bridge_init));
1722 reg_w_array(gspca_dev, bridge_init_ov772x, 879 ov534_set_led(gspca_dev, 1);
1723 ARRAY_SIZE(bridge_init_ov772x)); 880 sccb_w_array(gspca_dev, sensor_init,
1724 ov534_set_led(gspca_dev, 1); 881 ARRAY_SIZE(sensor_init));
1725 sccb_w_array(gspca_dev, sensor_init_ov772x, 882 ov534_reg_write(gspca_dev, 0xe0, 0x09);
1726 ARRAY_SIZE(sensor_init_ov772x)); 883 ov534_set_led(gspca_dev, 0);
1727 ov534_reg_write(gspca_dev, 0xe0, 0x09); 884 set_frame_rate(gspca_dev);
1728 ov534_set_led(gspca_dev, 0);
1729 set_frame_rate(gspca_dev);
1730 break;
1731 default:
1732/* case SENSOR_OV965X: */
1733 reg_w_array(gspca_dev, bridge_init_ov965x,
1734 ARRAY_SIZE(bridge_init_ov965x));
1735 sccb_w_array(gspca_dev, sensor_init_ov965x,
1736 ARRAY_SIZE(sensor_init_ov965x));
1737 reg_w_array(gspca_dev, bridge_init_ov965x_2,
1738 ARRAY_SIZE(bridge_init_ov965x_2));
1739 sccb_w_array(gspca_dev, sensor_init_ov965x_2,
1740 ARRAY_SIZE(sensor_init_ov965x_2));
1741 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1742 ov534_reg_write(gspca_dev, 0xe0, 0x01);
1743 ov534_set_led(gspca_dev, 0);
1744 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1745 }
1746 885
1747 return 0; 886 return 0;
1748} 887}
1749 888
1750static int sd_start_ov772x(struct gspca_dev *gspca_dev) 889static int sd_start(struct gspca_dev *gspca_dev)
1751{ 890{
1752 int mode; 891 int mode;
1753 892
1754 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv; 893 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
1755 if (mode != 0) { /* 320x240 */ 894 if (mode != 0) { /* 320x240 */
1756 reg_w_array(gspca_dev, bridge_start_ov772x_qvga, 895 reg_w_array(gspca_dev, bridge_start_qvga,
1757 ARRAY_SIZE(bridge_start_ov772x_qvga)); 896 ARRAY_SIZE(bridge_start_qvga));
1758 sccb_w_array(gspca_dev, sensor_start_ov772x_qvga, 897 sccb_w_array(gspca_dev, sensor_start_qvga,
1759 ARRAY_SIZE(sensor_start_ov772x_qvga)); 898 ARRAY_SIZE(sensor_start_qvga));
1760 } else { /* 640x480 */ 899 } else { /* 640x480 */
1761 reg_w_array(gspca_dev, bridge_start_ov772x_vga, 900 reg_w_array(gspca_dev, bridge_start_vga,
1762 ARRAY_SIZE(bridge_start_ov772x_vga)); 901 ARRAY_SIZE(bridge_start_vga));
1763 sccb_w_array(gspca_dev, sensor_start_ov772x_vga, 902 sccb_w_array(gspca_dev, sensor_start_vga,
1764 ARRAY_SIZE(sensor_start_ov772x_vga)); 903 ARRAY_SIZE(sensor_start_vga));
1765 } 904 }
1766 set_frame_rate(gspca_dev); 905 set_frame_rate(gspca_dev);
1767 906
1768 setautogain_77(gspca_dev); 907 setautogain(gspca_dev);
1769 setawb(gspca_dev); 908 setawb(gspca_dev);
1770 setgain(gspca_dev); 909 setgain(gspca_dev);
1771 setredblc(gspca_dev); 910 setredblc(gspca_dev);
1772 setblueblc(gspca_dev); 911 setblueblc(gspca_dev);
1773 sethue(gspca_dev); 912 sethue(gspca_dev);
1774 setexposure_77(gspca_dev); 913 setexposure(gspca_dev);
1775 setbrightness_77(gspca_dev); 914 setbrightness(gspca_dev);
1776 setcontrast_77(gspca_dev); 915 setcontrast(gspca_dev);
1777 setsharpness_77(gspca_dev); 916 setsharpness(gspca_dev);
1778 setvflip(gspca_dev); 917 setvflip(gspca_dev);
1779 sethflip(gspca_dev); 918 sethflip(gspca_dev);
1780 919
@@ -1783,81 +922,12 @@ static int sd_start_ov772x(struct gspca_dev *gspca_dev)
1783 return 0; 922 return 0;
1784} 923}
1785 924
1786static int sd_start_ov965x(struct gspca_dev *gspca_dev) 925static void sd_stopN(struct gspca_dev *gspca_dev)
1787{
1788 int mode;
1789
1790 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
1791 switch (mode) {
1792 default:
1793/* case 4: * 320x240 */
1794 sccb_w_array(gspca_dev, sensor_start_ov965x_1_vga,
1795 ARRAY_SIZE(sensor_start_ov965x_1_vga));
1796 reg_w_array(gspca_dev, bridge_start_ov965x_qvga,
1797 ARRAY_SIZE(bridge_start_ov965x_qvga));
1798 sccb_w_array(gspca_dev, sensor_start_ov965x_2_qvga,
1799 ARRAY_SIZE(sensor_start_ov965x_2_qvga));
1800 break;
1801 case 3: /* 640x480 */
1802 sccb_w_array(gspca_dev, sensor_start_ov965x_1_vga,
1803 ARRAY_SIZE(sensor_start_ov965x_1_vga));
1804 reg_w_array(gspca_dev, bridge_start_ov965x_vga,
1805 ARRAY_SIZE(bridge_start_ov965x_vga));
1806 sccb_w_array(gspca_dev, sensor_start_ov965x_2_vga,
1807 ARRAY_SIZE(sensor_start_ov965x_2_vga));
1808 break;
1809 case 2: /* 800x600 */
1810 sccb_w_array(gspca_dev, sensor_start_ov965x_1_svga,
1811 ARRAY_SIZE(sensor_start_ov965x_1_svga));
1812 reg_w_array(gspca_dev, bridge_start_ov965x_svga,
1813 ARRAY_SIZE(bridge_start_ov965x_svga));
1814 sccb_w_array(gspca_dev, sensor_start_ov965x_2_svga,
1815 ARRAY_SIZE(sensor_start_ov965x_2_svga));
1816 break;
1817 case 1: /* 1024x768 */
1818 sccb_w_array(gspca_dev, sensor_start_ov965x_1_xga,
1819 ARRAY_SIZE(sensor_start_ov965x_1_xga));
1820 reg_w_array(gspca_dev, bridge_start_ov965x_xga,
1821 ARRAY_SIZE(bridge_start_ov965x_xga));
1822 sccb_w_array(gspca_dev, sensor_start_ov965x_2_svga,
1823 ARRAY_SIZE(sensor_start_ov965x_2_svga));
1824 break;
1825 case 0: /* 1280x1024 */
1826 sccb_w_array(gspca_dev, sensor_start_ov965x_1_sxga,
1827 ARRAY_SIZE(sensor_start_ov965x_1_sxga));
1828 reg_w_array(gspca_dev, bridge_start_ov965x_sxga,
1829 ARRAY_SIZE(bridge_start_ov965x_sxga));
1830 sccb_w_array(gspca_dev, sensor_start_ov965x_2_sxga,
1831 ARRAY_SIZE(sensor_start_ov965x_2_sxga));
1832 break;
1833 }
1834 setfreq(gspca_dev);
1835 setautogain_96(gspca_dev);
1836 setbrightness_96(gspca_dev);
1837 setcontrast_96(gspca_dev);
1838 setexposure_96(gspca_dev);
1839 setsharpness_96(gspca_dev);
1840 setsatur(gspca_dev);
1841
1842 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1843 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1844 ov534_set_led(gspca_dev, 1);
1845 return 0;
1846}
1847
1848static void sd_stopN_ov772x(struct gspca_dev *gspca_dev)
1849{ 926{
1850 ov534_reg_write(gspca_dev, 0xe0, 0x09); 927 ov534_reg_write(gspca_dev, 0xe0, 0x09);
1851 ov534_set_led(gspca_dev, 0); 928 ov534_set_led(gspca_dev, 0);
1852} 929}
1853 930
1854static void sd_stopN_ov965x(struct gspca_dev *gspca_dev)
1855{
1856 ov534_reg_write(gspca_dev, 0xe0, 0x01);
1857 ov534_set_led(gspca_dev, 0);
1858 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1859}
1860
1861/* Values for bmHeaderInfo (Video and Still Image Payload Headers, 2.4.3.3) */ 931/* Values for bmHeaderInfo (Video and Still Image Payload Headers, 2.4.3.3) */
1862#define UVC_STREAM_EOH (1 << 7) 932#define UVC_STREAM_EOH (1 << 7)
1863#define UVC_STREAM_ERR (1 << 6) 933#define UVC_STREAM_ERR (1 << 6)
@@ -1875,11 +945,9 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
1875 __u32 this_pts; 945 __u32 this_pts;
1876 u16 this_fid; 946 u16 this_fid;
1877 int remaining_len = len; 947 int remaining_len = len;
1878 int payload_len;
1879 948
1880 payload_len = gspca_dev->cam.bulk ? 2048 : 2040;
1881 do { 949 do {
1882 len = min(remaining_len, payload_len); 950 len = min(remaining_len, 2048);
1883 951
1884 /* Payloads are prefixed with a UVC-style header. We 952 /* Payloads are prefixed with a UVC-style header. We
1885 consider a frame to start when the FID toggles, or the PTS 953 consider a frame to start when the FID toggles, or the PTS
@@ -1918,7 +986,17 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
1918 data + 12, len - 12); 986 data + 12, len - 12);
1919 /* If this packet is marked as EOF, end the frame */ 987 /* If this packet is marked as EOF, end the frame */
1920 } else if (data[1] & UVC_STREAM_EOF) { 988 } else if (data[1] & UVC_STREAM_EOF) {
989 struct gspca_frame *frame;
990
1921 sd->last_pts = 0; 991 sd->last_pts = 0;
992 frame = gspca_get_i_frame(gspca_dev);
993 if (frame == NULL)
994 goto discard;
995 if (frame->data_end - frame->data + (len - 12) !=
996 gspca_dev->width * gspca_dev->height * 2) {
997 PDEBUG(D_PACK, "wrong sized frame");
998 goto discard;
999 }
1922 gspca_frame_add(gspca_dev, LAST_PACKET, 1000 gspca_frame_add(gspca_dev, LAST_PACKET,
1923 data + 12, len - 12); 1001 data + 12, len - 12);
1924 } else { 1002 } else {
@@ -1965,12 +1043,8 @@ static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val)
1965 struct sd *sd = (struct sd *) gspca_dev; 1043 struct sd *sd = (struct sd *) gspca_dev;
1966 1044
1967 sd->exposure = val; 1045 sd->exposure = val;
1968 if (gspca_dev->streaming) { 1046 if (gspca_dev->streaming)
1969 if (sd->sensor == SENSOR_OV772X) 1047 setexposure(gspca_dev);
1970 setexposure_77(gspca_dev);
1971 else
1972 setexposure_96(gspca_dev);
1973 }
1974 return 0; 1048 return 0;
1975} 1049}
1976 1050
@@ -1987,12 +1061,8 @@ static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
1987 struct sd *sd = (struct sd *) gspca_dev; 1061 struct sd *sd = (struct sd *) gspca_dev;
1988 1062
1989 sd->brightness = val; 1063 sd->brightness = val;
1990 if (gspca_dev->streaming) { 1064 if (gspca_dev->streaming)
1991 if (sd->sensor == SENSOR_OV772X) 1065 setbrightness(gspca_dev);
1992 setbrightness_77(gspca_dev);
1993 else
1994 setbrightness_96(gspca_dev);
1995 }
1996 return 0; 1066 return 0;
1997} 1067}
1998 1068
@@ -2009,12 +1079,8 @@ static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
2009 struct sd *sd = (struct sd *) gspca_dev; 1079 struct sd *sd = (struct sd *) gspca_dev;
2010 1080
2011 sd->contrast = val; 1081 sd->contrast = val;
2012 if (gspca_dev->streaming) { 1082 if (gspca_dev->streaming)
2013 if (sd->sensor == SENSOR_OV772X) 1083 setcontrast(gspca_dev);
2014 setcontrast_77(gspca_dev);
2015 else
2016 setcontrast_96(gspca_dev);
2017 }
2018 return 0; 1084 return 0;
2019} 1085}
2020 1086
@@ -2026,41 +1092,6 @@ static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
2026 return 0; 1092 return 0;
2027} 1093}
2028 1094
2029static int sd_setsatur(struct gspca_dev *gspca_dev, __s32 val)
2030{
2031 struct sd *sd = (struct sd *) gspca_dev;
2032
2033 sd->satur = val;
2034 if (gspca_dev->streaming)
2035 setsatur(gspca_dev);
2036 return 0;
2037}
2038
2039static int sd_getsatur(struct gspca_dev *gspca_dev, __s32 *val)
2040{
2041 struct sd *sd = (struct sd *) gspca_dev;
2042
2043 *val = sd->satur;
2044 return 0;
2045}
2046static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
2047{
2048 struct sd *sd = (struct sd *) gspca_dev;
2049
2050 sd->lightfreq = val;
2051 if (gspca_dev->streaming)
2052 setfreq(gspca_dev);
2053 return 0;
2054}
2055
2056static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
2057{
2058 struct sd *sd = (struct sd *) gspca_dev;
2059
2060 *val = sd->lightfreq;
2061 return 0;
2062}
2063
2064static int sd_setredblc(struct gspca_dev *gspca_dev, __s32 val) 1095static int sd_setredblc(struct gspca_dev *gspca_dev, __s32 val)
2065{ 1096{
2066 struct sd *sd = (struct sd *) gspca_dev; 1097 struct sd *sd = (struct sd *) gspca_dev;
@@ -2122,22 +1153,14 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
2122 sd->autogain = val; 1153 sd->autogain = val;
2123 1154
2124 if (gspca_dev->streaming) { 1155 if (gspca_dev->streaming) {
2125 if (sd->sensor == SENSOR_OV772X) { 1156
2126 1157 /* the auto white balance control works only
2127 /* the auto white balance control works only 1158 * when auto gain is set */
2128 * when auto gain is set */ 1159 if (val)
2129 if (val) 1160 gspca_dev->ctrl_inac &= ~(1 << AWB_IDX);
2130 gspca_dev->ctrl_inac &= ~(1 << AWB_77_IDX); 1161 else
2131 else 1162 gspca_dev->ctrl_inac |= (1 << AWB_IDX);
2132 gspca_dev->ctrl_inac |= (1 << AWB_77_IDX); 1163 setautogain(gspca_dev);
2133 setautogain_77(gspca_dev);
2134 } else {
2135 if (val)
2136 gspca_dev->ctrl_inac |= (1 << EXPO_96_IDX);
2137 else
2138 gspca_dev->ctrl_inac &= ~(1 << EXPO_96_IDX);
2139 setautogain_96(gspca_dev);
2140 }
2141 } 1164 }
2142 return 0; 1165 return 0;
2143} 1166}
@@ -2173,12 +1196,8 @@ static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val)
2173 struct sd *sd = (struct sd *) gspca_dev; 1196 struct sd *sd = (struct sd *) gspca_dev;
2174 1197
2175 sd->sharpness = val; 1198 sd->sharpness = val;
2176 if (gspca_dev->streaming) { 1199 if (gspca_dev->streaming)
2177 if (sd->sensor == SENSOR_OV772X) 1200 setsharpness(gspca_dev);
2178 setsharpness_77(gspca_dev);
2179 else
2180 setsharpness_96(gspca_dev);
2181 }
2182 return 0; 1201 return 0;
2183} 1202}
2184 1203
@@ -2257,7 +1276,7 @@ static int sd_set_streamparm(struct gspca_dev *gspca_dev,
2257 1276
2258 /* Set requested framerate */ 1277 /* Set requested framerate */
2259 sd->frame_rate = tpf->denominator / tpf->numerator; 1278 sd->frame_rate = tpf->denominator / tpf->numerator;
2260 if (gspca_dev->streaming && sd->sensor == SENSOR_OV772X) 1279 if (gspca_dev->streaming)
2261 set_frame_rate(gspca_dev); 1280 set_frame_rate(gspca_dev);
2262 1281
2263 /* Return the actual framerate */ 1282 /* Return the actual framerate */
@@ -2267,57 +1286,23 @@ static int sd_set_streamparm(struct gspca_dev *gspca_dev,
2267 return 0; 1286 return 0;
2268} 1287}
2269 1288
2270static int sd_querymenu(struct gspca_dev *gspca_dev,
2271 struct v4l2_querymenu *menu)
2272{
2273 switch (menu->id) {
2274 case V4L2_CID_POWER_LINE_FREQUENCY:
2275 switch (menu->index) {
2276 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
2277 strcpy((char *) menu->name, "NoFliker");
2278 return 0;
2279 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
2280 strcpy((char *) menu->name, "50 Hz");
2281 return 0;
2282 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
2283 strcpy((char *) menu->name, "60 Hz");
2284 return 0;
2285 }
2286 break;
2287 }
2288 return -EINVAL;
2289}
2290
2291/* sub-driver description */ 1289/* sub-driver description */
2292static const struct sd_desc sd_desc_ov772x = { 1290static const struct sd_desc sd_desc = {
2293 .name = MODULE_NAME, 1291 .name = MODULE_NAME,
2294 .ctrls = sd_ctrls_ov772x, 1292 .ctrls = sd_ctrls,
2295 .nctrls = ARRAY_SIZE(sd_ctrls_ov772x), 1293 .nctrls = ARRAY_SIZE(sd_ctrls),
2296 .config = sd_config, 1294 .config = sd_config,
2297 .init = sd_init, 1295 .init = sd_init,
2298 .start = sd_start_ov772x, 1296 .start = sd_start,
2299 .stopN = sd_stopN_ov772x, 1297 .stopN = sd_stopN,
2300 .pkt_scan = sd_pkt_scan, 1298 .pkt_scan = sd_pkt_scan,
2301 .get_streamparm = sd_get_streamparm, 1299 .get_streamparm = sd_get_streamparm,
2302 .set_streamparm = sd_set_streamparm, 1300 .set_streamparm = sd_set_streamparm,
2303}; 1301};
2304 1302
2305static const struct sd_desc sd_desc_ov965x = {
2306 .name = MODULE_NAME,
2307 .ctrls = sd_ctrls_ov965x,
2308 .nctrls = ARRAY_SIZE(sd_ctrls_ov965x),
2309 .config = sd_config,
2310 .init = sd_init,
2311 .start = sd_start_ov965x,
2312 .stopN = sd_stopN_ov965x,
2313 .pkt_scan = sd_pkt_scan,
2314 .querymenu = sd_querymenu,
2315};
2316
2317/* -- module initialisation -- */ 1303/* -- module initialisation -- */
2318static const __devinitdata struct usb_device_id device_table[] = { 1304static const __devinitdata struct usb_device_id device_table[] = {
2319 {USB_DEVICE(0x06f8, 0x3003), .driver_info = SENSOR_OV965X}, 1305 {USB_DEVICE(0x1415, 0x2000)},
2320 {USB_DEVICE(0x1415, 0x2000), .driver_info = SENSOR_OV772X},
2321 {} 1306 {}
2322}; 1307};
2323 1308
@@ -2326,11 +1311,7 @@ MODULE_DEVICE_TABLE(usb, device_table);
2326/* -- device connect -- */ 1311/* -- device connect -- */
2327static int sd_probe(struct usb_interface *intf, const struct usb_device_id *id) 1312static int sd_probe(struct usb_interface *intf, const struct usb_device_id *id)
2328{ 1313{
2329 return gspca_dev_probe(intf, id, 1314 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
2330 id->driver_info == SENSOR_OV772X
2331 ? &sd_desc_ov772x
2332 : &sd_desc_ov965x,
2333 sizeof(struct sd),
2334 THIS_MODULE); 1315 THIS_MODULE);
2335} 1316}
2336 1317
diff --git a/drivers/media/video/gspca/ov534_9.c b/drivers/media/video/gspca/ov534_9.c
new file mode 100644
index 000000000000..bbe5a030e3b4
--- /dev/null
+++ b/drivers/media/video/gspca/ov534_9.c
@@ -0,0 +1,1477 @@
1/*
2 * ov534-ov965x gspca driver
3 *
4 * Copyright (C) 2009-2010 Jean-Francois Moine http://moinejf.free.fr
5 * Copyright (C) 2008 Antonio Ospite <ospite@studenti.unina.it>
6 * Copyright (C) 2008 Jim Paris <jim@jtan.com>
7 *
8 * Based on a prototype written by Mark Ferrell <majortrips@gmail.com>
9 * USB protocol reverse engineered by Jim Paris <jim@jtan.com>
10 * https://jim.sh/svn/jim/devl/playstation/ps3/eye/test/
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#define MODULE_NAME "ov534_9"
28
29#include "gspca.h"
30
31#define OV534_REG_ADDRESS 0xf1 /* sensor address */
32#define OV534_REG_SUBADDR 0xf2
33#define OV534_REG_WRITE 0xf3
34#define OV534_REG_READ 0xf4
35#define OV534_REG_OPERATION 0xf5
36#define OV534_REG_STATUS 0xf6
37
38#define OV534_OP_WRITE_3 0x37
39#define OV534_OP_WRITE_2 0x33
40#define OV534_OP_READ_2 0xf9
41
42#define CTRL_TIMEOUT 500
43
44MODULE_AUTHOR("Jean-Francois Moine <moinejf@free.fr>");
45MODULE_DESCRIPTION("GSPCA/OV534_9 USB Camera Driver");
46MODULE_LICENSE("GPL");
47
48/* specific webcam descriptor */
49struct sd {
50 struct gspca_dev gspca_dev; /* !! must be the first item */
51 __u32 last_pts;
52 u8 last_fid;
53
54 u8 brightness;
55 u8 contrast;
56 u8 autogain;
57 u8 exposure;
58 s8 sharpness;
59 u8 satur;
60 u8 freq;
61};
62
63/* V4L2 controls supported by the driver */
64static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
65static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
66static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
67static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
68static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
69static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);
70static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val);
71static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val);
72static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val);
73static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val);
74static int sd_setsatur(struct gspca_dev *gspca_dev, __s32 val);
75static int sd_getsatur(struct gspca_dev *gspca_dev, __s32 *val);
76static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
77static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
78
79static const struct ctrl sd_ctrls[] = {
80 { /* 0 */
81 {
82 .id = V4L2_CID_BRIGHTNESS,
83 .type = V4L2_CTRL_TYPE_INTEGER,
84 .name = "Brightness",
85 .minimum = 0,
86 .maximum = 15,
87 .step = 1,
88#define BRIGHTNESS_DEF 7
89 .default_value = BRIGHTNESS_DEF,
90 },
91 .set = sd_setbrightness,
92 .get = sd_getbrightness,
93 },
94 { /* 1 */
95 {
96 .id = V4L2_CID_CONTRAST,
97 .type = V4L2_CTRL_TYPE_INTEGER,
98 .name = "Contrast",
99 .minimum = 0,
100 .maximum = 15,
101 .step = 1,
102#define CONTRAST_DEF 3
103 .default_value = CONTRAST_DEF,
104 },
105 .set = sd_setcontrast,
106 .get = sd_getcontrast,
107 },
108 { /* 2 */
109 {
110 .id = V4L2_CID_AUTOGAIN,
111 .type = V4L2_CTRL_TYPE_BOOLEAN,
112 .name = "Autogain",
113 .minimum = 0,
114 .maximum = 1,
115 .step = 1,
116#define AUTOGAIN_DEF 1
117 .default_value = AUTOGAIN_DEF,
118 },
119 .set = sd_setautogain,
120 .get = sd_getautogain,
121 },
122#define EXPO_IDX 3
123 { /* 3 */
124 {
125 .id = V4L2_CID_EXPOSURE,
126 .type = V4L2_CTRL_TYPE_INTEGER,
127 .name = "Exposure",
128 .minimum = 0,
129 .maximum = 3,
130 .step = 1,
131#define EXPO_DEF 0
132 .default_value = EXPO_DEF,
133 },
134 .set = sd_setexposure,
135 .get = sd_getexposure,
136 },
137 { /* 4 */
138 {
139 .id = V4L2_CID_SHARPNESS,
140 .type = V4L2_CTRL_TYPE_INTEGER,
141 .name = "Sharpness",
142 .minimum = -1, /* -1 = auto */
143 .maximum = 4,
144 .step = 1,
145#define SHARPNESS_DEF -1
146 .default_value = SHARPNESS_DEF,
147 },
148 .set = sd_setsharpness,
149 .get = sd_getsharpness,
150 },
151 { /* 5 */
152 {
153 .id = V4L2_CID_SATURATION,
154 .type = V4L2_CTRL_TYPE_INTEGER,
155 .name = "Saturation",
156 .minimum = 0,
157 .maximum = 4,
158 .step = 1,
159#define SATUR_DEF 2
160 .default_value = SATUR_DEF,
161 },
162 .set = sd_setsatur,
163 .get = sd_getsatur,
164 },
165 {
166 {
167 .id = V4L2_CID_POWER_LINE_FREQUENCY,
168 .type = V4L2_CTRL_TYPE_MENU,
169 .name = "Light frequency filter",
170 .minimum = 0,
171 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
172 .step = 1,
173#define FREQ_DEF 0
174 .default_value = FREQ_DEF,
175 },
176 .set = sd_setfreq,
177 .get = sd_getfreq,
178 },
179};
180
181static const struct v4l2_pix_format ov965x_mode[] = {
182#define QVGA_MODE 0
183 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
184 .bytesperline = 320,
185 .sizeimage = 320 * 240 * 3 / 8 + 590,
186 .colorspace = V4L2_COLORSPACE_JPEG},
187#define VGA_MODE 1
188 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
189 .bytesperline = 640,
190 .sizeimage = 640 * 480 * 3 / 8 + 590,
191 .colorspace = V4L2_COLORSPACE_JPEG},
192#define SVGA_MODE 2
193 {800, 600, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
194 .bytesperline = 800,
195 .sizeimage = 800 * 600 * 3 / 8 + 590,
196 .colorspace = V4L2_COLORSPACE_JPEG},
197#define XGA_MODE 3
198 {1024, 768, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
199 .bytesperline = 1024,
200 .sizeimage = 1024 * 768 * 3 / 8 + 590,
201 .colorspace = V4L2_COLORSPACE_JPEG},
202#define SXGA_MODE 4
203 {1280, 1024, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
204 .bytesperline = 1280,
205 .sizeimage = 1280 * 1024 * 3 / 8 + 590,
206 .colorspace = V4L2_COLORSPACE_JPEG},
207};
208
209static const u8 bridge_init[][2] = {
210 {0x88, 0xf8},
211 {0x89, 0xff},
212 {0x76, 0x03},
213 {0x92, 0x03},
214 {0x95, 0x10},
215 {0xe2, 0x00},
216 {0xe7, 0x3e},
217 {0x8d, 0x1c},
218 {0x8e, 0x00},
219 {0x8f, 0x00},
220 {0x1f, 0x00},
221 {0xc3, 0xf9},
222 {0x89, 0xff},
223 {0x88, 0xf8},
224 {0x76, 0x03},
225 {0x92, 0x01},
226 {0x93, 0x18},
227 {0x1c, 0x0a},
228 {0x1d, 0x48},
229 {0xc0, 0x50},
230 {0xc1, 0x3c},
231 {0x34, 0x05},
232 {0xc2, 0x0c},
233 {0xc3, 0xf9},
234 {0x34, 0x05},
235 {0xe7, 0x2e},
236 {0x31, 0xf9},
237 {0x35, 0x02},
238 {0xd9, 0x10},
239 {0x25, 0x42},
240 {0x94, 0x11},
241};
242
243static const u8 sensor_init[][2] = {
244 {0x12, 0x80}, /* com7 - SSCB reset */
245 {0x00, 0x00}, /* gain */
246 {0x01, 0x80}, /* blue */
247 {0x02, 0x80}, /* red */
248 {0x03, 0x1b}, /* vref */
249 {0x04, 0x03}, /* com1 - exposure low bits */
250 {0x0b, 0x57}, /* ver */
251 {0x0e, 0x61}, /* com5 */
252 {0x0f, 0x42}, /* com6 */
253 {0x11, 0x00}, /* clkrc */
254 {0x12, 0x02}, /* com7 - 15fps VGA YUYV */
255 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
256 {0x14, 0x28}, /* com9 */
257 {0x16, 0x24}, /* reg16 */
258 {0x17, 0x1d}, /* hstart*/
259 {0x18, 0xbd}, /* hstop */
260 {0x19, 0x01}, /* vstrt */
261 {0x1a, 0x81}, /* vstop*/
262 {0x1e, 0x04}, /* mvfp */
263 {0x24, 0x3c}, /* aew */
264 {0x25, 0x36}, /* aeb */
265 {0x26, 0x71}, /* vpt */
266 {0x27, 0x08}, /* bbias */
267 {0x28, 0x08}, /* gbbias */
268 {0x29, 0x15}, /* gr com */
269 {0x2a, 0x00}, /* exhch */
270 {0x2b, 0x00}, /* exhcl */
271 {0x2c, 0x08}, /* rbias */
272 {0x32, 0xff}, /* href */
273 {0x33, 0x00}, /* chlf */
274 {0x34, 0x3f}, /* aref1 */
275 {0x35, 0x00}, /* aref2 */
276 {0x36, 0xf8}, /* aref3 */
277 {0x38, 0x72}, /* adc2 */
278 {0x39, 0x57}, /* aref4 */
279 {0x3a, 0x80}, /* tslb - yuyv */
280 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
281 {0x3d, 0x99}, /* com13 */
282 {0x3f, 0xc1}, /* edge */
283 {0x40, 0xc0}, /* com15 */
284 {0x41, 0x40}, /* com16 */
285 {0x42, 0xc0}, /* com17 */
286 {0x43, 0x0a}, /* rsvd */
287 {0x44, 0xf0},
288 {0x45, 0x46},
289 {0x46, 0x62},
290 {0x47, 0x2a},
291 {0x48, 0x3c},
292 {0x4a, 0xfc},
293 {0x4b, 0xfc},
294 {0x4c, 0x7f},
295 {0x4d, 0x7f},
296 {0x4e, 0x7f},
297 {0x4f, 0x98}, /* matrix */
298 {0x50, 0x98},
299 {0x51, 0x00},
300 {0x52, 0x28},
301 {0x53, 0x70},
302 {0x54, 0x98},
303 {0x58, 0x1a}, /* matrix coef sign */
304 {0x59, 0x85}, /* AWB control */
305 {0x5a, 0xa9},
306 {0x5b, 0x64},
307 {0x5c, 0x84},
308 {0x5d, 0x53},
309 {0x5e, 0x0e},
310 {0x5f, 0xf0}, /* AWB blue limit */
311 {0x60, 0xf0}, /* AWB red limit */
312 {0x61, 0xf0}, /* AWB green limit */
313 {0x62, 0x00}, /* lcc1 */
314 {0x63, 0x00}, /* lcc2 */
315 {0x64, 0x02}, /* lcc3 */
316 {0x65, 0x16}, /* lcc4 */
317 {0x66, 0x01}, /* lcc5 */
318 {0x69, 0x02}, /* hv */
319 {0x6b, 0x5a}, /* dbvl */
320 {0x6c, 0x04},
321 {0x6d, 0x55},
322 {0x6e, 0x00},
323 {0x6f, 0x9d},
324 {0x70, 0x21}, /* dnsth */
325 {0x71, 0x78},
326 {0x72, 0x00}, /* poidx */
327 {0x73, 0x01}, /* pckdv */
328 {0x74, 0x3a}, /* xindx */
329 {0x75, 0x35}, /* yindx */
330 {0x76, 0x01},
331 {0x77, 0x02},
332 {0x7a, 0x12}, /* gamma curve */
333 {0x7b, 0x08},
334 {0x7c, 0x16},
335 {0x7d, 0x30},
336 {0x7e, 0x5e},
337 {0x7f, 0x72},
338 {0x80, 0x82},
339 {0x81, 0x8e},
340 {0x82, 0x9a},
341 {0x83, 0xa4},
342 {0x84, 0xac},
343 {0x85, 0xb8},
344 {0x86, 0xc3},
345 {0x87, 0xd6},
346 {0x88, 0xe6},
347 {0x89, 0xf2},
348 {0x8a, 0x03},
349 {0x8c, 0x89}, /* com19 */
350 {0x14, 0x28}, /* com9 */
351 {0x90, 0x7d},
352 {0x91, 0x7b},
353 {0x9d, 0x03}, /* lcc6 */
354 {0x9e, 0x04}, /* lcc7 */
355 {0x9f, 0x7a},
356 {0xa0, 0x79},
357 {0xa1, 0x40}, /* aechm */
358 {0xa4, 0x50}, /* com21 */
359 {0xa5, 0x68}, /* com26 */
360 {0xa6, 0x4a}, /* AWB green */
361 {0xa8, 0xc1}, /* refa8 */
362 {0xa9, 0xef}, /* refa9 */
363 {0xaa, 0x92},
364 {0xab, 0x04},
365 {0xac, 0x80}, /* black level control */
366 {0xad, 0x80},
367 {0xae, 0x80},
368 {0xaf, 0x80},
369 {0xb2, 0xf2},
370 {0xb3, 0x20},
371 {0xb4, 0x20}, /* ctrlb4 */
372 {0xb5, 0x00},
373 {0xb6, 0xaf},
374 {0xbb, 0xae},
375 {0xbc, 0x7f}, /* ADC channel offsets */
376 {0xdb, 0x7f},
377 {0xbe, 0x7f},
378 {0xbf, 0x7f},
379 {0xc0, 0xe2},
380 {0xc1, 0xc0},
381 {0xc2, 0x01},
382 {0xc3, 0x4e},
383 {0xc6, 0x85},
384 {0xc7, 0x80}, /* com24 */
385 {0xc9, 0xe0},
386 {0xca, 0xe8},
387 {0xcb, 0xf0},
388 {0xcc, 0xd8},
389 {0xcd, 0xf1},
390 {0x4f, 0x98}, /* matrix */
391 {0x50, 0x98},
392 {0x51, 0x00},
393 {0x52, 0x28},
394 {0x53, 0x70},
395 {0x54, 0x98},
396 {0x58, 0x1a},
397 {0xff, 0x41}, /* read 41, write ff 00 */
398 {0x41, 0x40}, /* com16 */
399
400 {0xc5, 0x03}, /* 60 Hz banding filter */
401 {0x6a, 0x02}, /* 50 Hz banding filter */
402
403 {0x12, 0x62}, /* com7 - 30fps VGA YUV */
404 {0x36, 0xfa}, /* aref3 */
405 {0x69, 0x0a}, /* hv */
406 {0x8c, 0x89}, /* com22 */
407 {0x14, 0x28}, /* com9 */
408 {0x3e, 0x0c},
409 {0x41, 0x40}, /* com16 */
410 {0x72, 0x00},
411 {0x73, 0x00},
412 {0x74, 0x3a},
413 {0x75, 0x35},
414 {0x76, 0x01},
415 {0xc7, 0x80},
416 {0x03, 0x12}, /* vref */
417 {0x17, 0x16}, /* hstart */
418 {0x18, 0x02}, /* hstop */
419 {0x19, 0x01}, /* vstrt */
420 {0x1a, 0x3d}, /* vstop */
421 {0x32, 0xff}, /* href */
422 {0xc0, 0xaa},
423};
424
425static const u8 bridge_init_2[][2] = {
426 {0x94, 0xaa},
427 {0xf1, 0x60},
428 {0xe5, 0x04},
429 {0xc0, 0x50},
430 {0xc1, 0x3c},
431 {0x8c, 0x00},
432 {0x8d, 0x1c},
433 {0x34, 0x05},
434
435 {0xc2, 0x0c},
436 {0xc3, 0xf9},
437 {0xda, 0x01},
438 {0x50, 0x00},
439 {0x51, 0xa0},
440 {0x52, 0x3c},
441 {0x53, 0x00},
442 {0x54, 0x00},
443 {0x55, 0x00},
444 {0x57, 0x00},
445 {0x5c, 0x00},
446 {0x5a, 0xa0},
447 {0x5b, 0x78},
448 {0x35, 0x02},
449 {0xd9, 0x10},
450 {0x94, 0x11},
451};
452
453static const u8 sensor_init_2[][2] = {
454 {0x3b, 0xc4},
455 {0x1e, 0x04}, /* mvfp */
456 {0x13, 0xe0}, /* com8 */
457 {0x00, 0x00}, /* gain */
458 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
459 {0x11, 0x03}, /* clkrc */
460 {0x6b, 0x5a}, /* dblv */
461 {0x6a, 0x05},
462 {0xc5, 0x07},
463 {0xa2, 0x4b},
464 {0xa3, 0x3e},
465 {0x2d, 0x00},
466 {0xff, 0x42}, /* read 42, write ff 00 */
467 {0x42, 0xc0}, /* com17 */
468 {0x2d, 0x00},
469 {0xff, 0x42}, /* read 42, write ff 00 */
470 {0x42, 0xc1}, /* com17 */
471/* sharpness */
472 {0x3f, 0x01},
473 {0xff, 0x42}, /* read 42, write ff 00 */
474 {0x42, 0xc1}, /* com17 */
475/* saturation */
476 {0x4f, 0x98}, /* matrix */
477 {0x50, 0x98},
478 {0x51, 0x00},
479 {0x52, 0x28},
480 {0x53, 0x70},
481 {0x54, 0x98},
482 {0x58, 0x1a},
483 {0xff, 0x41}, /* read 41, write ff 00 */
484 {0x41, 0x40}, /* com16 */
485/* contrast */
486 {0x56, 0x40},
487/* brightness */
488 {0x55, 0x8f},
489/* expo */
490 {0x10, 0x25}, /* aech - exposure high bits */
491 {0xff, 0x13}, /* read 13, write ff 00 */
492 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
493};
494
495static const u8 sensor_start_1_vga[][2] = { /* same for qvga */
496 {0x12, 0x62}, /* com7 - 30fps VGA YUV */
497 {0x36, 0xfa}, /* aref3 */
498 {0x69, 0x0a}, /* hv */
499 {0x8c, 0x89}, /* com22 */
500 {0x14, 0x28}, /* com9 */
501 {0x3e, 0x0c}, /* com14 */
502 {0x41, 0x40}, /* com16 */
503 {0x72, 0x00},
504 {0x73, 0x00},
505 {0x74, 0x3a},
506 {0x75, 0x35},
507 {0x76, 0x01},
508 {0xc7, 0x80}, /* com24 */
509 {0x03, 0x12}, /* vref */
510 {0x17, 0x16}, /* hstart */
511 {0x18, 0x02}, /* hstop */
512 {0x19, 0x01}, /* vstrt */
513 {0x1a, 0x3d}, /* vstop */
514 {0x32, 0xff}, /* href */
515 {0xc0, 0xaa},
516};
517
518static const u8 sensor_start_1_svga[][2] = {
519 {0x12, 0x02}, /* com7 - YUYV - VGA 15 full resolution */
520 {0x36, 0xf8}, /* aref3 */
521 {0x69, 0x02}, /* hv */
522 {0x8c, 0x0d}, /* com22 */
523 {0x3e, 0x0c}, /* com14 */
524 {0x41, 0x40}, /* com16 */
525 {0x72, 0x00},
526 {0x73, 0x01},
527 {0x74, 0x3a},
528 {0x75, 0x35},
529 {0x76, 0x01},
530 {0xc7, 0x80}, /* com24 */
531 {0x03, 0x1b}, /* vref */
532 {0x17, 0x1d}, /* hstart */
533 {0x18, 0xbd}, /* hstop */
534 {0x19, 0x01}, /* vstrt */
535 {0x1a, 0x81}, /* vstop */
536 {0x32, 0xff}, /* href */
537 {0xc0, 0xe2},
538};
539
540static const u8 sensor_start_1_xga[][2] = {
541 {0x12, 0x02}, /* com7 */
542 {0x36, 0xf8}, /* aref3 */
543 {0x69, 0x02}, /* hv */
544 {0x8c, 0x89}, /* com22 */
545 {0x14, 0x28}, /* com9 */
546 {0x3e, 0x0c}, /* com14 */
547 {0x41, 0x40}, /* com16 */
548 {0x72, 0x00},
549 {0x73, 0x01},
550 {0x74, 0x3a},
551 {0x75, 0x35},
552 {0x76, 0x01},
553 {0xc7, 0x80}, /* com24 */
554 {0x03, 0x1b}, /* vref */
555 {0x17, 0x1d}, /* hstart */
556 {0x18, 0xbd}, /* hstop */
557 {0x19, 0x01}, /* vstrt */
558 {0x1a, 0x81}, /* vstop */
559 {0x32, 0xff}, /* href */
560 {0xc0, 0xe2},
561};
562
563static const u8 sensor_start_1_sxga[][2] = {
564 {0x12, 0x02}, /* com7 */
565 {0x36, 0xf8}, /* aref3 */
566 {0x69, 0x02}, /* hv */
567 {0x8c, 0x89}, /* com22 */
568 {0x14, 0x28}, /* com9 */
569 {0x3e, 0x0c}, /* com14 */
570 {0x41, 0x40}, /* com16 */
571 {0x72, 0x00},
572 {0x73, 0x01},
573 {0x74, 0x3a},
574 {0x75, 0x35},
575 {0x76, 0x01},
576 {0xc7, 0x80}, /* com24 */
577 {0x03, 0x1b}, /* vref */
578 {0x17, 0x1d}, /* hstart */
579 {0x18, 0x02}, /* hstop */
580 {0x19, 0x01}, /* vstrt */
581 {0x1a, 0x81}, /* vstop */
582 {0x32, 0xff}, /* href */
583 {0xc0, 0xe2},
584};
585
586static const u8 bridge_start_qvga[][2] = {
587 {0x94, 0xaa},
588 {0xf1, 0x60},
589 {0xe5, 0x04},
590 {0xc0, 0x50},
591 {0xc1, 0x3c},
592 {0x8c, 0x00},
593 {0x8d, 0x1c},
594 {0x34, 0x05},
595
596 {0xc2, 0x4c},
597 {0xc3, 0xf9},
598 {0xda, 0x00},
599 {0x50, 0x00},
600 {0x51, 0xa0},
601 {0x52, 0x78},
602 {0x53, 0x00},
603 {0x54, 0x00},
604 {0x55, 0x00},
605 {0x57, 0x00},
606 {0x5c, 0x00},
607 {0x5a, 0x50},
608 {0x5b, 0x3c},
609 {0x35, 0x02},
610 {0xd9, 0x10},
611 {0x94, 0x11},
612};
613
614static const u8 bridge_start_vga[][2] = {
615 {0x94, 0xaa},
616 {0xf1, 0x60},
617 {0xe5, 0x04},
618 {0xc0, 0x50},
619 {0xc1, 0x3c},
620 {0x8c, 0x00},
621 {0x8d, 0x1c},
622 {0x34, 0x05},
623 {0xc2, 0x0c},
624 {0xc3, 0xf9},
625 {0xda, 0x01},
626 {0x50, 0x00},
627 {0x51, 0xa0},
628 {0x52, 0x3c},
629 {0x53, 0x00},
630 {0x54, 0x00},
631 {0x55, 0x00},
632 {0x57, 0x00},
633 {0x5c, 0x00},
634 {0x5a, 0xa0},
635 {0x5b, 0x78},
636 {0x35, 0x02},
637 {0xd9, 0x10},
638 {0x94, 0x11},
639};
640
641static const u8 bridge_start_svga[][2] = {
642 {0x94, 0xaa},
643 {0xf1, 0x60},
644 {0xe5, 0x04},
645 {0xc0, 0xa0},
646 {0xc1, 0x80},
647 {0x8c, 0x00},
648 {0x8d, 0x1c},
649 {0x34, 0x05},
650 {0xc2, 0x4c},
651 {0xc3, 0xf9},
652 {0x50, 0x00},
653 {0x51, 0x40},
654 {0x52, 0x00},
655 {0x53, 0x00},
656 {0x54, 0x00},
657 {0x55, 0x88},
658 {0x57, 0x00},
659 {0x5c, 0x00},
660 {0x5a, 0xc8},
661 {0x5b, 0x96},
662 {0x35, 0x02},
663 {0xd9, 0x10},
664 {0xda, 0x00},
665 {0x94, 0x11},
666};
667
668static const u8 bridge_start_xga[][2] = {
669 {0x94, 0xaa},
670 {0xf1, 0x60},
671 {0xe5, 0x04},
672 {0xc0, 0xa0},
673 {0xc1, 0x80},
674 {0x8c, 0x00},
675 {0x8d, 0x1c},
676 {0x34, 0x05},
677 {0xc2, 0x4c},
678 {0xc3, 0xf9},
679 {0x50, 0x00},
680 {0x51, 0x40},
681 {0x52, 0x00},
682 {0x53, 0x00},
683 {0x54, 0x00},
684 {0x55, 0x88},
685 {0x57, 0x00},
686 {0x5c, 0x01},
687 {0x5a, 0x00},
688 {0x5b, 0xc0},
689 {0x35, 0x02},
690 {0xd9, 0x10},
691 {0xda, 0x01},
692 {0x94, 0x11},
693};
694
695static const u8 bridge_start_sxga[][2] = {
696 {0x94, 0xaa},
697 {0xf1, 0x60},
698 {0xe5, 0x04},
699 {0xc0, 0xa0},
700 {0xc1, 0x80},
701 {0x8c, 0x00},
702 {0x8d, 0x1c},
703 {0x34, 0x05},
704 {0xc2, 0x0c},
705 {0xc3, 0xf9},
706 {0xda, 0x00},
707 {0x35, 0x02},
708 {0xd9, 0x10},
709 {0x94, 0x11},
710};
711
712static const u8 sensor_start_2_qvga[][2] = {
713 {0x3b, 0xe4}, /* com11 - night mode 1/4 frame rate */
714 {0x1e, 0x04}, /* mvfp */
715 {0x13, 0xe0}, /* com8 */
716 {0x00, 0x00},
717 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
718 {0x11, 0x01}, /* clkrc */
719 {0x6b, 0x5a}, /* dblv */
720 {0x6a, 0x02}, /* 50 Hz banding filter */
721 {0xc5, 0x03}, /* 60 Hz banding filter */
722 {0xa2, 0x96}, /* bd50 */
723 {0xa3, 0x7d}, /* bd60 */
724
725 {0xff, 0x13}, /* read 13, write ff 00 */
726 {0x13, 0xe7},
727 {0x3a, 0x80}, /* tslb - yuyv */
728};
729
730static const u8 sensor_start_2_vga[][2] = {
731 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
732 {0x1e, 0x04}, /* mvfp */
733 {0x13, 0xe0}, /* com8 */
734 {0x00, 0x00},
735 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
736 {0x11, 0x03}, /* clkrc */
737 {0x6b, 0x5a}, /* dblv */
738 {0x6a, 0x05}, /* 50 Hz banding filter */
739 {0xc5, 0x07}, /* 60 Hz banding filter */
740 {0xa2, 0x4b}, /* bd50 */
741 {0xa3, 0x3e}, /* bd60 */
742
743 {0x2d, 0x00}, /* advfl */
744};
745
746static const u8 sensor_start_2_svga[][2] = { /* same for xga */
747 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
748 {0x1e, 0x04}, /* mvfp */
749 {0x13, 0xe0}, /* com8 */
750 {0x00, 0x00},
751 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
752 {0x11, 0x01}, /* clkrc */
753 {0x6b, 0x5a}, /* dblv */
754 {0x6a, 0x0c}, /* 50 Hz banding filter */
755 {0xc5, 0x0f}, /* 60 Hz banding filter */
756 {0xa2, 0x4e}, /* bd50 */
757 {0xa3, 0x41}, /* bd60 */
758};
759
760static const u8 sensor_start_2_sxga[][2] = {
761 {0x13, 0xe0}, /* com8 */
762 {0x00, 0x00},
763 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
764 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
765 {0x1e, 0x04}, /* mvfp */
766 {0x11, 0x01}, /* clkrc */
767 {0x6b, 0x5a}, /* dblv */
768 {0x6a, 0x0c}, /* 50 Hz banding filter */
769 {0xc5, 0x0f}, /* 60 Hz banding filter */
770 {0xa2, 0x4e}, /* bd50 */
771 {0xa3, 0x41}, /* bd60 */
772};
773
774static void reg_w_i(struct gspca_dev *gspca_dev, u16 reg, u8 val)
775{
776 struct usb_device *udev = gspca_dev->dev;
777 int ret;
778
779 if (gspca_dev->usb_err < 0)
780 return;
781 gspca_dev->usb_buf[0] = val;
782 ret = usb_control_msg(udev,
783 usb_sndctrlpipe(udev, 0),
784 0x01,
785 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
786 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
787 if (ret < 0) {
788 PDEBUG(D_ERR, "reg_w failed %d", ret);
789 gspca_dev->usb_err = ret;
790 }
791}
792
793static void reg_w(struct gspca_dev *gspca_dev, u16 reg, u8 val)
794{
795 PDEBUG(D_USBO, "reg_w [%04x] = %02x", reg, val);
796 reg_w_i(gspca_dev, reg, val);
797}
798
799static u8 reg_r(struct gspca_dev *gspca_dev, u16 reg)
800{
801 struct usb_device *udev = gspca_dev->dev;
802 int ret;
803
804 if (gspca_dev->usb_err < 0)
805 return 0;
806 ret = usb_control_msg(udev,
807 usb_rcvctrlpipe(udev, 0),
808 0x01,
809 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
810 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
811 PDEBUG(D_USBI, "reg_r [%04x] -> %02x", reg, gspca_dev->usb_buf[0]);
812 if (ret < 0) {
813 PDEBUG(D_ERR, "reg_r err %d", ret);
814 gspca_dev->usb_err = ret;
815 }
816 return gspca_dev->usb_buf[0];
817}
818
819static int sccb_check_status(struct gspca_dev *gspca_dev)
820{
821 u8 data;
822 int i;
823
824 for (i = 0; i < 5; i++) {
825 data = reg_r(gspca_dev, OV534_REG_STATUS);
826
827 switch (data) {
828 case 0x00:
829 return 1;
830 case 0x04:
831 return 0;
832 case 0x03:
833 break;
834 default:
835 PDEBUG(D_USBI|D_USBO,
836 "sccb status 0x%02x, attempt %d/5",
837 data, i + 1);
838 }
839 }
840 return 0;
841}
842
843static void sccb_write(struct gspca_dev *gspca_dev, u8 reg, u8 val)
844{
845 PDEBUG(D_USBO, "sccb_write [%02x] = %02x", reg, val);
846 reg_w_i(gspca_dev, OV534_REG_SUBADDR, reg);
847 reg_w_i(gspca_dev, OV534_REG_WRITE, val);
848 reg_w_i(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_3);
849
850 if (!sccb_check_status(gspca_dev))
851 PDEBUG(D_ERR, "sccb_write failed");
852}
853
854static u8 sccb_read(struct gspca_dev *gspca_dev, u16 reg)
855{
856 reg_w(gspca_dev, OV534_REG_SUBADDR, reg);
857 reg_w(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_2);
858 if (!sccb_check_status(gspca_dev))
859 PDEBUG(D_ERR, "sccb_read failed 1");
860
861 reg_w(gspca_dev, OV534_REG_OPERATION, OV534_OP_READ_2);
862 if (!sccb_check_status(gspca_dev))
863 PDEBUG(D_ERR, "sccb_read failed 2");
864
865 return reg_r(gspca_dev, OV534_REG_READ);
866}
867
868/* output a bridge sequence (reg - val) */
869static void reg_w_array(struct gspca_dev *gspca_dev,
870 const u8 (*data)[2], int len)
871{
872 while (--len >= 0) {
873 reg_w(gspca_dev, (*data)[0], (*data)[1]);
874 data++;
875 }
876}
877
878/* output a sensor sequence (reg - val) */
879static void sccb_w_array(struct gspca_dev *gspca_dev,
880 const u8 (*data)[2], int len)
881{
882 while (--len >= 0) {
883 if ((*data)[0] != 0xff) {
884 sccb_write(gspca_dev, (*data)[0], (*data)[1]);
885 } else {
886 sccb_read(gspca_dev, (*data)[1]);
887 sccb_write(gspca_dev, 0xff, 0x00);
888 }
889 data++;
890 }
891}
892
893/* Two bits control LED: 0x21 bit 7 and 0x23 bit 7.
894 * (direction and output)? */
895static void set_led(struct gspca_dev *gspca_dev, int status)
896{
897 u8 data;
898
899 PDEBUG(D_CONF, "led status: %d", status);
900
901 data = reg_r(gspca_dev, 0x21);
902 data |= 0x80;
903 reg_w(gspca_dev, 0x21, data);
904
905 data = reg_r(gspca_dev, 0x23);
906 if (status)
907 data |= 0x80;
908 else
909 data &= ~0x80;
910
911 reg_w(gspca_dev, 0x23, data);
912
913 if (!status) {
914 data = reg_r(gspca_dev, 0x21);
915 data &= ~0x80;
916 reg_w(gspca_dev, 0x21, data);
917 }
918}
919
920static void setbrightness(struct gspca_dev *gspca_dev)
921{
922 struct sd *sd = (struct sd *) gspca_dev;
923 u8 val;
924
925 val = sd->brightness;
926 if (val < 8)
927 val = 15 - val; /* f .. 8 */
928 else
929 val = val - 8; /* 0 .. 7 */
930 sccb_write(gspca_dev, 0x55, /* brtn - brightness adjustment */
931 0x0f | (val << 4));
932}
933
934static void setcontrast(struct gspca_dev *gspca_dev)
935{
936 struct sd *sd = (struct sd *) gspca_dev;
937
938 sccb_write(gspca_dev, 0x56, /* cnst1 - contrast 1 ctrl coeff */
939 sd->contrast << 4);
940}
941
942static void setautogain(struct gspca_dev *gspca_dev)
943{
944 struct sd *sd = (struct sd *) gspca_dev;
945 u8 val;
946
947/*fixme: should adjust agc/awb/aec by different controls */
948 val = sd->autogain;
949 val = sccb_read(gspca_dev, 0x13); /* com8 */
950 sccb_write(gspca_dev, 0xff, 0x00);
951 if (sd->autogain)
952 val |= 0x05; /* agc & aec */
953 else
954 val &= 0xfa;
955 sccb_write(gspca_dev, 0x13, val);
956}
957
958static void setexposure(struct gspca_dev *gspca_dev)
959{
960 struct sd *sd = (struct sd *) gspca_dev;
961 u8 val;
962 static const u8 expo[4] = {0x00, 0x25, 0x38, 0x5e};
963
964 sccb_write(gspca_dev, 0x10, /* aec[9:2] */
965 expo[sd->exposure]);
966
967 val = sccb_read(gspca_dev, 0x13); /* com8 */
968 sccb_write(gspca_dev, 0xff, 0x00);
969 sccb_write(gspca_dev, 0x13, val);
970
971 val = sccb_read(gspca_dev, 0xa1); /* aech */
972 sccb_write(gspca_dev, 0xff, 0x00);
973 sccb_write(gspca_dev, 0xa1, val & 0xe0); /* aec[15:10] = 0 */
974}
975
976static void setsharpness(struct gspca_dev *gspca_dev)
977{
978 struct sd *sd = (struct sd *) gspca_dev;
979 s8 val;
980
981 val = sd->sharpness;
982 if (val < 0) { /* auto */
983 val = sccb_read(gspca_dev, 0x42); /* com17 */
984 sccb_write(gspca_dev, 0xff, 0x00);
985 sccb_write(gspca_dev, 0x42, val | 0x40);
986 /* Edge enhancement strength auto adjust */
987 return;
988 }
989 if (val != 0)
990 val = 1 << (val - 1);
991 sccb_write(gspca_dev, 0x3f, /* edge - edge enhance. factor */
992 val);
993 val = sccb_read(gspca_dev, 0x42); /* com17 */
994 sccb_write(gspca_dev, 0xff, 0x00);
995 sccb_write(gspca_dev, 0x42, val & 0xbf);
996}
997
998static void setsatur(struct gspca_dev *gspca_dev)
999{
1000 struct sd *sd = (struct sd *) gspca_dev;
1001 u8 val1, val2, val3;
1002 static const u8 matrix[5][2] = {
1003 {0x14, 0x38},
1004 {0x1e, 0x54},
1005 {0x28, 0x70},
1006 {0x32, 0x8c},
1007 {0x48, 0x90}
1008 };
1009
1010 val1 = matrix[sd->satur][0];
1011 val2 = matrix[sd->satur][1];
1012 val3 = val1 + val2;
1013 sccb_write(gspca_dev, 0x4f, val3); /* matrix coeff */
1014 sccb_write(gspca_dev, 0x50, val3);
1015 sccb_write(gspca_dev, 0x51, 0x00);
1016 sccb_write(gspca_dev, 0x52, val1);
1017 sccb_write(gspca_dev, 0x53, val2);
1018 sccb_write(gspca_dev, 0x54, val3);
1019 sccb_write(gspca_dev, 0x58, 0x1a); /* mtxs - coeff signs */
1020
1021 val1 = sccb_read(gspca_dev, 0x41); /* com16 */
1022 sccb_write(gspca_dev, 0xff, 0x00);
1023 sccb_write(gspca_dev, 0x41, val1);
1024}
1025
1026static void setfreq(struct gspca_dev *gspca_dev)
1027{
1028 struct sd *sd = (struct sd *) gspca_dev;
1029 u8 val;
1030
1031 val = sccb_read(gspca_dev, 0x13); /* com8 */
1032 sccb_write(gspca_dev, 0xff, 0x00);
1033 if (sd->freq == 0) {
1034 sccb_write(gspca_dev, 0x13, val & 0xdf);
1035 return;
1036 }
1037 sccb_write(gspca_dev, 0x13, val | 0x20);
1038
1039 val = sccb_read(gspca_dev, 0x42); /* com17 */
1040 sccb_write(gspca_dev, 0xff, 0x00);
1041 if (sd->freq == 1)
1042 val |= 0x01;
1043 else
1044 val &= 0xfe;
1045 sccb_write(gspca_dev, 0x42, val);
1046}
1047
1048/* this function is called at probe time */
1049static int sd_config(struct gspca_dev *gspca_dev,
1050 const struct usb_device_id *id)
1051{
1052 struct sd *sd = (struct sd *) gspca_dev;
1053 struct cam *cam;
1054
1055 cam = &gspca_dev->cam;
1056
1057 cam->cam_mode = ov965x_mode;
1058 cam->nmodes = ARRAY_SIZE(ov965x_mode);
1059
1060 sd->brightness = BRIGHTNESS_DEF;
1061 sd->contrast = CONTRAST_DEF;
1062#if AUTOGAIN_DEF != 0
1063 sd->autogain = AUTOGAIN_DEF;
1064 gspca_dev->ctrl_inac |= (1 << EXPO_IDX);
1065#endif
1066#if EXPO_DEF != 0
1067 sd->exposure = EXPO_DEF;
1068#endif
1069#if SHARPNESS_DEF != 0
1070 sd->sharpness = SHARPNESS_DEF;
1071#endif
1072 sd->satur = SATUR_DEF;
1073 sd->freq = FREQ_DEF;
1074
1075 return 0;
1076}
1077
1078/* this function is called at probe and resume time */
1079static int sd_init(struct gspca_dev *gspca_dev)
1080{
1081 u16 sensor_id;
1082
1083 /* reset bridge */
1084 reg_w(gspca_dev, 0xe7, 0x3a);
1085 reg_w(gspca_dev, 0xe0, 0x08);
1086 msleep(100);
1087
1088 /* initialize the sensor address */
1089 reg_w(gspca_dev, OV534_REG_ADDRESS, 0x60);
1090
1091 /* reset sensor */
1092 sccb_write(gspca_dev, 0x12, 0x80);
1093 msleep(10);
1094
1095 /* probe the sensor */
1096 sccb_read(gspca_dev, 0x0a);
1097 sensor_id = sccb_read(gspca_dev, 0x0a) << 8;
1098 sccb_read(gspca_dev, 0x0b);
1099 sensor_id |= sccb_read(gspca_dev, 0x0b);
1100 PDEBUG(D_PROBE, "Sensor ID: %04x", sensor_id);
1101
1102 /* initialize */
1103 reg_w_array(gspca_dev, bridge_init,
1104 ARRAY_SIZE(bridge_init));
1105 sccb_w_array(gspca_dev, sensor_init,
1106 ARRAY_SIZE(sensor_init));
1107 reg_w_array(gspca_dev, bridge_init_2,
1108 ARRAY_SIZE(bridge_init_2));
1109 sccb_w_array(gspca_dev, sensor_init_2,
1110 ARRAY_SIZE(sensor_init_2));
1111 reg_w(gspca_dev, 0xe0, 0x00);
1112 reg_w(gspca_dev, 0xe0, 0x01);
1113 set_led(gspca_dev, 0);
1114 reg_w(gspca_dev, 0xe0, 0x00);
1115
1116 return gspca_dev->usb_err;
1117}
1118
1119static int sd_start(struct gspca_dev *gspca_dev)
1120{
1121 switch (gspca_dev->curr_mode) {
1122 case QVGA_MODE: /* 320x240 */
1123 sccb_w_array(gspca_dev, sensor_start_1_vga,
1124 ARRAY_SIZE(sensor_start_1_vga));
1125 reg_w_array(gspca_dev, bridge_start_qvga,
1126 ARRAY_SIZE(bridge_start_qvga));
1127 sccb_w_array(gspca_dev, sensor_start_2_qvga,
1128 ARRAY_SIZE(sensor_start_2_qvga));
1129 break;
1130 case VGA_MODE: /* 640x480 */
1131 sccb_w_array(gspca_dev, sensor_start_1_vga,
1132 ARRAY_SIZE(sensor_start_1_vga));
1133 reg_w_array(gspca_dev, bridge_start_vga,
1134 ARRAY_SIZE(bridge_start_vga));
1135 sccb_w_array(gspca_dev, sensor_start_2_vga,
1136 ARRAY_SIZE(sensor_start_2_vga));
1137 break;
1138 case SVGA_MODE: /* 800x600 */
1139 sccb_w_array(gspca_dev, sensor_start_1_svga,
1140 ARRAY_SIZE(sensor_start_1_svga));
1141 reg_w_array(gspca_dev, bridge_start_svga,
1142 ARRAY_SIZE(bridge_start_svga));
1143 sccb_w_array(gspca_dev, sensor_start_2_svga,
1144 ARRAY_SIZE(sensor_start_2_svga));
1145 break;
1146 case XGA_MODE: /* 1024x768 */
1147 sccb_w_array(gspca_dev, sensor_start_1_xga,
1148 ARRAY_SIZE(sensor_start_1_xga));
1149 reg_w_array(gspca_dev, bridge_start_xga,
1150 ARRAY_SIZE(bridge_start_xga));
1151 sccb_w_array(gspca_dev, sensor_start_2_svga,
1152 ARRAY_SIZE(sensor_start_2_svga));
1153 break;
1154 default:
1155/* case SXGA_MODE: * 1280x1024 */
1156 sccb_w_array(gspca_dev, sensor_start_1_sxga,
1157 ARRAY_SIZE(sensor_start_1_sxga));
1158 reg_w_array(gspca_dev, bridge_start_sxga,
1159 ARRAY_SIZE(bridge_start_sxga));
1160 sccb_w_array(gspca_dev, sensor_start_2_sxga,
1161 ARRAY_SIZE(sensor_start_2_sxga));
1162 break;
1163 }
1164 setfreq(gspca_dev);
1165 setautogain(gspca_dev);
1166 setbrightness(gspca_dev);
1167 setcontrast(gspca_dev);
1168 setexposure(gspca_dev);
1169 setsharpness(gspca_dev);
1170 setsatur(gspca_dev);
1171
1172 reg_w(gspca_dev, 0xe0, 0x00);
1173 reg_w(gspca_dev, 0xe0, 0x00);
1174 set_led(gspca_dev, 1);
1175 return gspca_dev->usb_err;
1176}
1177
1178static void sd_stopN(struct gspca_dev *gspca_dev)
1179{
1180 reg_w(gspca_dev, 0xe0, 0x01);
1181 set_led(gspca_dev, 0);
1182 reg_w(gspca_dev, 0xe0, 0x00);
1183}
1184
1185/* Values for bmHeaderInfo (Video and Still Image Payload Headers, 2.4.3.3) */
1186#define UVC_STREAM_EOH (1 << 7)
1187#define UVC_STREAM_ERR (1 << 6)
1188#define UVC_STREAM_STI (1 << 5)
1189#define UVC_STREAM_RES (1 << 4)
1190#define UVC_STREAM_SCR (1 << 3)
1191#define UVC_STREAM_PTS (1 << 2)
1192#define UVC_STREAM_EOF (1 << 1)
1193#define UVC_STREAM_FID (1 << 0)
1194
1195static void sd_pkt_scan(struct gspca_dev *gspca_dev,
1196 u8 *data, int len)
1197{
1198 struct sd *sd = (struct sd *) gspca_dev;
1199 __u32 this_pts;
1200 u8 this_fid;
1201 int remaining_len = len;
1202
1203 do {
1204 len = min(remaining_len, 2040);
1205
1206 /* Payloads are prefixed with a UVC-style header. We
1207 consider a frame to start when the FID toggles, or the PTS
1208 changes. A frame ends when EOF is set, and we've received
1209 the correct number of bytes. */
1210
1211 /* Verify UVC header. Header length is always 12 */
1212 if (data[0] != 12 || len < 12) {
1213 PDEBUG(D_PACK, "bad header");
1214 goto discard;
1215 }
1216
1217 /* Check errors */
1218 if (data[1] & UVC_STREAM_ERR) {
1219 PDEBUG(D_PACK, "payload error");
1220 goto discard;
1221 }
1222
1223 /* Extract PTS and FID */
1224 if (!(data[1] & UVC_STREAM_PTS)) {
1225 PDEBUG(D_PACK, "PTS not present");
1226 goto discard;
1227 }
1228 this_pts = (data[5] << 24) | (data[4] << 16)
1229 | (data[3] << 8) | data[2];
1230 this_fid = data[1] & UVC_STREAM_FID;
1231
1232 /* If PTS or FID has changed, start a new frame. */
1233 if (this_pts != sd->last_pts || this_fid != sd->last_fid) {
1234 if (gspca_dev->last_packet_type == INTER_PACKET)
1235 gspca_frame_add(gspca_dev, LAST_PACKET,
1236 NULL, 0);
1237 sd->last_pts = this_pts;
1238 sd->last_fid = this_fid;
1239 gspca_frame_add(gspca_dev, FIRST_PACKET,
1240 data + 12, len - 12);
1241 /* If this packet is marked as EOF, end the frame */
1242 } else if (data[1] & UVC_STREAM_EOF) {
1243 sd->last_pts = 0;
1244 gspca_frame_add(gspca_dev, LAST_PACKET,
1245 data + 12, len - 12);
1246 } else {
1247
1248 /* Add the data from this payload */
1249 gspca_frame_add(gspca_dev, INTER_PACKET,
1250 data + 12, len - 12);
1251 }
1252
1253 /* Done this payload */
1254 goto scan_next;
1255
1256discard:
1257 /* Discard data until a new frame starts. */
1258 gspca_dev->last_packet_type = DISCARD_PACKET;
1259
1260scan_next:
1261 remaining_len -= len;
1262 data += len;
1263 } while (remaining_len > 0);
1264}
1265
1266/* controls */
1267static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
1268{
1269 struct sd *sd = (struct sd *) gspca_dev;
1270
1271 sd->brightness = val;
1272 if (gspca_dev->streaming)
1273 setbrightness(gspca_dev);
1274 return gspca_dev->usb_err;
1275}
1276
1277static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
1278{
1279 struct sd *sd = (struct sd *) gspca_dev;
1280
1281 *val = sd->brightness;
1282 return 0;
1283}
1284
1285static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
1286{
1287 struct sd *sd = (struct sd *) gspca_dev;
1288
1289 sd->contrast = val;
1290 if (gspca_dev->streaming)
1291 setcontrast(gspca_dev);
1292 return gspca_dev->usb_err;
1293}
1294
1295static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
1296{
1297 struct sd *sd = (struct sd *) gspca_dev;
1298
1299 *val = sd->contrast;
1300 return 0;
1301}
1302
1303static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
1304{
1305 struct sd *sd = (struct sd *) gspca_dev;
1306
1307 sd->autogain = val;
1308
1309 if (gspca_dev->streaming) {
1310 if (val)
1311 gspca_dev->ctrl_inac |= (1 << EXPO_IDX);
1312 else
1313 gspca_dev->ctrl_inac &= ~(1 << EXPO_IDX);
1314 setautogain(gspca_dev);
1315 }
1316 return gspca_dev->usb_err;
1317}
1318
1319static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)
1320{
1321 struct sd *sd = (struct sd *) gspca_dev;
1322
1323 *val = sd->autogain;
1324 return 0;
1325}
1326
1327static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val)
1328{
1329 struct sd *sd = (struct sd *) gspca_dev;
1330
1331 sd->exposure = val;
1332 if (gspca_dev->streaming)
1333 setexposure(gspca_dev);
1334 return gspca_dev->usb_err;
1335}
1336
1337static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val)
1338{
1339 struct sd *sd = (struct sd *) gspca_dev;
1340
1341 *val = sd->exposure;
1342 return 0;
1343}
1344
1345static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val)
1346{
1347 struct sd *sd = (struct sd *) gspca_dev;
1348
1349 sd->sharpness = val;
1350 if (gspca_dev->streaming)
1351 setsharpness(gspca_dev);
1352 return gspca_dev->usb_err;
1353}
1354
1355static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val)
1356{
1357 struct sd *sd = (struct sd *) gspca_dev;
1358
1359 *val = sd->sharpness;
1360 return 0;
1361}
1362
1363static int sd_setsatur(struct gspca_dev *gspca_dev, __s32 val)
1364{
1365 struct sd *sd = (struct sd *) gspca_dev;
1366
1367 sd->satur = val;
1368 if (gspca_dev->streaming)
1369 setsatur(gspca_dev);
1370 return gspca_dev->usb_err;
1371}
1372
1373static int sd_getsatur(struct gspca_dev *gspca_dev, __s32 *val)
1374{
1375 struct sd *sd = (struct sd *) gspca_dev;
1376
1377 *val = sd->satur;
1378 return 0;
1379}
1380static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
1381{
1382 struct sd *sd = (struct sd *) gspca_dev;
1383
1384 sd->freq = val;
1385 if (gspca_dev->streaming)
1386 setfreq(gspca_dev);
1387 return gspca_dev->usb_err;
1388}
1389
1390static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
1391{
1392 struct sd *sd = (struct sd *) gspca_dev;
1393
1394 *val = sd->freq;
1395 return 0;
1396}
1397
1398static int sd_querymenu(struct gspca_dev *gspca_dev,
1399 struct v4l2_querymenu *menu)
1400{
1401 switch (menu->id) {
1402 case V4L2_CID_POWER_LINE_FREQUENCY:
1403 switch (menu->index) {
1404 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
1405 strcpy((char *) menu->name, "NoFliker");
1406 return 0;
1407 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
1408 strcpy((char *) menu->name, "50 Hz");
1409 return 0;
1410 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
1411 strcpy((char *) menu->name, "60 Hz");
1412 return 0;
1413 }
1414 break;
1415 }
1416 return -EINVAL;
1417}
1418
1419/* sub-driver description */
1420static const struct sd_desc sd_desc = {
1421 .name = MODULE_NAME,
1422 .ctrls = sd_ctrls,
1423 .nctrls = ARRAY_SIZE(sd_ctrls),
1424 .config = sd_config,
1425 .init = sd_init,
1426 .start = sd_start,
1427 .stopN = sd_stopN,
1428 .pkt_scan = sd_pkt_scan,
1429 .querymenu = sd_querymenu,
1430};
1431
1432/* -- module initialisation -- */
1433static const __devinitdata struct usb_device_id device_table[] = {
1434 {USB_DEVICE(0x06f8, 0x3003)},
1435 {}
1436};
1437
1438MODULE_DEVICE_TABLE(usb, device_table);
1439
1440/* -- device connect -- */
1441static int sd_probe(struct usb_interface *intf, const struct usb_device_id *id)
1442{
1443 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
1444 THIS_MODULE);
1445}
1446
1447static struct usb_driver sd_driver = {
1448 .name = MODULE_NAME,
1449 .id_table = device_table,
1450 .probe = sd_probe,
1451 .disconnect = gspca_disconnect,
1452#ifdef CONFIG_PM
1453 .suspend = gspca_suspend,
1454 .resume = gspca_resume,
1455#endif
1456};
1457
1458/* -- module insert / remove -- */
1459static int __init sd_mod_init(void)
1460{
1461 int ret;
1462
1463 ret = usb_register(&sd_driver);
1464 if (ret < 0)
1465 return ret;
1466 PDEBUG(D_PROBE, "registered");
1467 return 0;
1468}
1469
1470static void __exit sd_mod_exit(void)
1471{
1472 usb_deregister(&sd_driver);
1473 PDEBUG(D_PROBE, "deregistered");
1474}
1475
1476module_init(sd_mod_init);
1477module_exit(sd_mod_exit);
diff --git a/drivers/media/video/gspca/pac207.c b/drivers/media/video/gspca/pac207.c
index 4706a823add0..0c87c3490b1e 100644
--- a/drivers/media/video/gspca/pac207.c
+++ b/drivers/media/video/gspca/pac207.c
@@ -25,6 +25,7 @@
25 25
26#define MODULE_NAME "pac207" 26#define MODULE_NAME "pac207"
27 27
28#include <linux/input.h>
28#include "gspca.h" 29#include "gspca.h"
29 30
30MODULE_AUTHOR("Hans de Goede <hdgoede@redhat.com>"); 31MODULE_AUTHOR("Hans de Goede <hdgoede@redhat.com>");
@@ -77,7 +78,7 @@ static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);
77static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val); 78static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val);
78static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val); 79static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val);
79 80
80static struct ctrl sd_ctrls[] = { 81static const struct ctrl sd_ctrls[] = {
81#define SD_BRIGHTNESS 0 82#define SD_BRIGHTNESS 0
82 { 83 {
83 { 84 {
@@ -495,6 +496,25 @@ static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)
495 return 0; 496 return 0;
496} 497}
497 498
499#ifdef CONFIG_INPUT
500static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
501 u8 *data, /* interrupt packet data */
502 int len) /* interrput packet length */
503{
504 int ret = -EINVAL;
505
506 if (len == 2 && data[0] == 0x5a && data[1] == 0x5a) {
507 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 1);
508 input_sync(gspca_dev->input_dev);
509 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
510 input_sync(gspca_dev->input_dev);
511 ret = 0;
512 }
513
514 return ret;
515}
516#endif
517
498/* sub-driver description */ 518/* sub-driver description */
499static const struct sd_desc sd_desc = { 519static const struct sd_desc sd_desc = {
500 .name = MODULE_NAME, 520 .name = MODULE_NAME,
@@ -506,6 +526,9 @@ static const struct sd_desc sd_desc = {
506 .stopN = sd_stopN, 526 .stopN = sd_stopN,
507 .dq_callback = pac207_do_auto_gain, 527 .dq_callback = pac207_do_auto_gain,
508 .pkt_scan = sd_pkt_scan, 528 .pkt_scan = sd_pkt_scan,
529#ifdef CONFIG_INPUT
530 .int_pkt_scan = sd_int_pkt_scan,
531#endif
509}; 532};
510 533
511/* -- module initialisation -- */ 534/* -- module initialisation -- */
diff --git a/drivers/media/video/gspca/pac7302.c b/drivers/media/video/gspca/pac7302.c
index de0b66c4b56e..2a68220d1ada 100644
--- a/drivers/media/video/gspca/pac7302.c
+++ b/drivers/media/video/gspca/pac7302.c
@@ -4,7 +4,9 @@
4 * 4 *
5 * V4L2 by Jean-Francois Moine <http://moinejf.free.fr> 5 * V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
6 * 6 *
7 * Separated from Pixart PAC7311 library by Márton Németh <nm127@freemail.hu> 7 * Separated from Pixart PAC7311 library by Márton Németh
8 * Camera button input handling by Márton Németh <nm127@freemail.hu>
9 * Copyright (C) 2009-2010 Márton Németh <nm127@freemail.hu>
8 * 10 *
9 * This program is free software; you can redistribute it and/or modify 11 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 12 * it under the terms of the GNU General Public License as published by
@@ -22,33 +24,26 @@
22 */ 24 */
23 25
24/* Some documentation about various registers as determined by trial and error. 26/* Some documentation about various registers as determined by trial and error.
25 When the register addresses differ between the 7202 and the 7311 the 2
26 different addresses are written as 7302addr/7311addr, when one of the 2
27 addresses is a - sign that register description is not valid for the
28 matching IC.
29 27
30 Register page 1: 28 Register page 1:
31 29
32 Address Description 30 Address Description
33 -/0x08 Unknown compressor related, must always be 8 except when not
34 in 640x480 resolution and page 4 reg 2 <= 3 then set it to 9 !
35 -/0x1b Auto white balance related, bit 0 is AWB enable (inverted)
36 bits 345 seem to toggle per color gains on/off (inverted)
37 0x78 Global control, bit 6 controls the LED (inverted) 31 0x78 Global control, bit 6 controls the LED (inverted)
38 -/0x80 JPEG compression ratio ? Best not touched
39 32
40 Register page 3/4: 33 Register page 3:
41 34
42 Address Description 35 Address Description
43 0x02 Clock divider 2-63, fps =~ 60 / val. Must be a multiple of 3 on 36 0x02 Clock divider 3-63, fps = 90 / val. Must be a multiple of 3 on
44 the 7302, so one of 3, 6, 9, ..., except when between 6 and 12? 37 the 7302, so one of 3, 6, 9, ..., except when between 6 and 12?
45 -/0x0f Master gain 1-245, low value = high gain 38 0x03 Variable framerate ctrl reg2==3: 0 -> ~30 fps, 255 -> ~22fps
46 0x10/- Master gain 0-31 39 0x04 Another var framerate ctrl reg2==3, reg3==0: 0 -> ~30 fps,
47 -/0x10 Another gain 0-15, limited influence (1-2x gain I guess) 40 63 -> ~27 fps, the 2 msb's must always be 1 !!
41 0x05 Another var framerate ctrl reg2==3, reg3==0, reg4==0xc0:
42 1 -> ~30 fps, 2 -> ~20 fps
43 0x0e Exposure bits 0-7, 0-448, 0 = use full frame time
44 0x0f Exposure bit 8, 0-448, 448 = no exposure at all
45 0x10 Master gain 0-31
48 0x21 Bitfield: 0-1 unused, 2-3 vflip/hflip, 4-5 unknown, 6-7 unused 46 0x21 Bitfield: 0-1 unused, 2-3 vflip/hflip, 4-5 unknown, 6-7 unused
49 -/0x27 Seems to toggle various gains on / off, Setting bit 7 seems to
50 completely disable the analog amplification block. Set to 0x68
51 for max gain, 0x14 for minimal gain.
52 47
53 The registers are accessed in the following functions: 48 The registers are accessed in the following functions:
54 49
@@ -68,6 +63,7 @@
68 63
69#define MODULE_NAME "pac7302" 64#define MODULE_NAME "pac7302"
70 65
66#include <linux/input.h>
71#include <media/v4l2-chip-ident.h> 67#include <media/v4l2-chip-ident.h>
72#include "gspca.h" 68#include "gspca.h"
73 69
@@ -86,8 +82,8 @@ struct sd {
86 unsigned char red_balance; 82 unsigned char red_balance;
87 unsigned char blue_balance; 83 unsigned char blue_balance;
88 unsigned char gain; 84 unsigned char gain;
89 unsigned char exposure;
90 unsigned char autogain; 85 unsigned char autogain;
86 unsigned short exposure;
91 __u8 hflip; 87 __u8 hflip;
92 __u8 vflip; 88 __u8 vflip;
93 u8 flags; 89 u8 flags;
@@ -124,8 +120,7 @@ static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val);
124static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val); 120static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val);
125static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val); 121static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val);
126 122
127static struct ctrl sd_ctrls[] = { 123static const struct ctrl sd_ctrls[] = {
128/* This control is pac7302 only */
129 { 124 {
130 { 125 {
131 .id = V4L2_CID_BRIGHTNESS, 126 .id = V4L2_CID_BRIGHTNESS,
@@ -141,7 +136,6 @@ static struct ctrl sd_ctrls[] = {
141 .set = sd_setbrightness, 136 .set = sd_setbrightness,
142 .get = sd_getbrightness, 137 .get = sd_getbrightness,
143 }, 138 },
144/* This control is for both the 7302 and the 7311 */
145 { 139 {
146 { 140 {
147 .id = V4L2_CID_CONTRAST, 141 .id = V4L2_CID_CONTRAST,
@@ -157,7 +151,6 @@ static struct ctrl sd_ctrls[] = {
157 .set = sd_setcontrast, 151 .set = sd_setcontrast,
158 .get = sd_getcontrast, 152 .get = sd_getcontrast,
159 }, 153 },
160/* This control is pac7302 only */
161 { 154 {
162 { 155 {
163 .id = V4L2_CID_SATURATION, 156 .id = V4L2_CID_SATURATION,
@@ -215,7 +208,6 @@ static struct ctrl sd_ctrls[] = {
215 .set = sd_setbluebalance, 208 .set = sd_setbluebalance,
216 .get = sd_getbluebalance, 209 .get = sd_getbluebalance,
217 }, 210 },
218/* All controls below are for both the 7302 and the 7311 */
219 { 211 {
220 { 212 {
221 .id = V4L2_CID_GAIN, 213 .id = V4L2_CID_GAIN,
@@ -238,11 +230,10 @@ static struct ctrl sd_ctrls[] = {
238 .type = V4L2_CTRL_TYPE_INTEGER, 230 .type = V4L2_CTRL_TYPE_INTEGER,
239 .name = "Exposure", 231 .name = "Exposure",
240 .minimum = 0, 232 .minimum = 0,
241#define EXPOSURE_MAX 255 233 .maximum = 1023,
242 .maximum = EXPOSURE_MAX,
243 .step = 1, 234 .step = 1,
244#define EXPOSURE_DEF 16 /* 32 ms / 30 fps */ 235#define EXPOSURE_DEF 66 /* 33 ms / 30 fps */
245#define EXPOSURE_KNEE 50 /* 100 ms / 10 fps */ 236#define EXPOSURE_KNEE 133 /* 66 ms / 15 fps */
246 .default_value = EXPOSURE_DEF, 237 .default_value = EXPOSURE_DEF,
247 }, 238 },
248 .set = sd_setexposure, 239 .set = sd_setexposure,
@@ -301,7 +292,6 @@ static const struct v4l2_pix_format vga_mode[] = {
301}; 292};
302 293
303#define LOAD_PAGE3 255 294#define LOAD_PAGE3 255
304#define LOAD_PAGE4 254
305#define END_OF_SEQUENCE 0 295#define END_OF_SEQUENCE 0
306 296
307/* pac 7302 */ 297/* pac 7302 */
@@ -379,7 +369,7 @@ static const __u8 start_7302[] = {
379#define SKIP 0xaa 369#define SKIP 0xaa
380/* page 3 - the value SKIP says skip the index - see reg_w_page() */ 370/* page 3 - the value SKIP says skip the index - see reg_w_page() */
381static const __u8 page3_7302[] = { 371static const __u8 page3_7302[] = {
382 0x90, 0x40, 0x03, 0x50, 0xc2, 0x01, 0x14, 0x16, 372 0x90, 0x40, 0x03, 0x00, 0xc0, 0x01, 0x14, 0x16,
383 0x14, 0x12, 0x00, 0x00, 0x00, 0x02, 0x33, 0x00, 373 0x14, 0x12, 0x00, 0x00, 0x00, 0x02, 0x33, 0x00,
384 0x0f, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 374 0x0f, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
385 0x00, 0x00, 0x00, 0x47, 0x01, 0xb3, 0x01, 0x00, 375 0x00, 0x00, 0x00, 0x47, 0x01, 0xb3, 0x01, 0x00,
@@ -388,7 +378,7 @@ static const __u8 page3_7302[] = {
388 0xa4, 0xb8, 0xe0, 0x2a, 0xf6, 0x00, 0x00, 0x00, 378 0xa4, 0xb8, 0xe0, 0x2a, 0xf6, 0x00, 0x00, 0x00,
389 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 379 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
390 0x00, 0xfc, 0x00, 0xf2, 0x1f, 0x04, 0x00, 0x00, 380 0x00, 0xfc, 0x00, 0xf2, 0x1f, 0x04, 0x00, 0x00,
391 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x10, 0x00, 0x00, 381 SKIP, 0x00, 0x00, 0xc0, 0xc0, 0x10, 0x00, 0x00,
392 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 382 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
393 0x00, 0x40, 0xff, 0x03, 0x19, 0x00, 0x00, 0x00, 383 0x00, 0x40, 0xff, 0x03, 0x19, 0x00, 0x00, 0x00,
394 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 384 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -401,12 +391,14 @@ static const __u8 page3_7302[] = {
401 0x00 391 0x00
402}; 392};
403 393
404static int reg_w_buf(struct gspca_dev *gspca_dev, 394static void reg_w_buf(struct gspca_dev *gspca_dev,
405 __u8 index, 395 __u8 index,
406 const char *buffer, int len) 396 const char *buffer, int len)
407{ 397{
408 int ret; 398 int ret;
409 399
400 if (gspca_dev->usb_err < 0)
401 return;
410 memcpy(gspca_dev->usb_buf, buffer, len); 402 memcpy(gspca_dev->usb_buf, buffer, len);
411 ret = usb_control_msg(gspca_dev->dev, 403 ret = usb_control_msg(gspca_dev->dev,
412 usb_sndctrlpipe(gspca_dev->dev, 0), 404 usb_sndctrlpipe(gspca_dev->dev, 0),
@@ -415,20 +407,23 @@ static int reg_w_buf(struct gspca_dev *gspca_dev,
415 0, /* value */ 407 0, /* value */
416 index, gspca_dev->usb_buf, len, 408 index, gspca_dev->usb_buf, len,
417 500); 409 500);
418 if (ret < 0) 410 if (ret < 0) {
419 PDEBUG(D_ERR, "reg_w_buf(): " 411 PDEBUG(D_ERR, "reg_w_buf(): "
420 "Failed to write registers to index 0x%x, error %i", 412 "Failed to write registers to index 0x%x, error %i",
421 index, ret); 413 index, ret);
422 return ret; 414 gspca_dev->usb_err = ret;
415 }
423} 416}
424 417
425 418
426static int reg_w(struct gspca_dev *gspca_dev, 419static void reg_w(struct gspca_dev *gspca_dev,
427 __u8 index, 420 __u8 index,
428 __u8 value) 421 __u8 value)
429{ 422{
430 int ret; 423 int ret;
431 424
425 if (gspca_dev->usb_err < 0)
426 return;
432 gspca_dev->usb_buf[0] = value; 427 gspca_dev->usb_buf[0] = value;
433 ret = usb_control_msg(gspca_dev->dev, 428 ret = usb_control_msg(gspca_dev->dev,
434 usb_sndctrlpipe(gspca_dev->dev, 0), 429 usb_sndctrlpipe(gspca_dev->dev, 0),
@@ -436,32 +431,32 @@ static int reg_w(struct gspca_dev *gspca_dev,
436 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 431 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
437 0, index, gspca_dev->usb_buf, 1, 432 0, index, gspca_dev->usb_buf, 1,
438 500); 433 500);
439 if (ret < 0) 434 if (ret < 0) {
440 PDEBUG(D_ERR, "reg_w(): " 435 PDEBUG(D_ERR, "reg_w(): "
441 "Failed to write register to index 0x%x, value 0x%x, error %i", 436 "Failed to write register to index 0x%x, value 0x%x, error %i",
442 index, value, ret); 437 index, value, ret);
443 return ret; 438 gspca_dev->usb_err = ret;
439 }
444} 440}
445 441
446static int reg_w_seq(struct gspca_dev *gspca_dev, 442static void reg_w_seq(struct gspca_dev *gspca_dev,
447 const __u8 *seq, int len) 443 const __u8 *seq, int len)
448{ 444{
449 int ret = 0;
450 while (--len >= 0) { 445 while (--len >= 0) {
451 if (0 <= ret) 446 reg_w(gspca_dev, seq[0], seq[1]);
452 ret = reg_w(gspca_dev, seq[0], seq[1]);
453 seq += 2; 447 seq += 2;
454 } 448 }
455 return ret;
456} 449}
457 450
458/* load the beginning of a page */ 451/* load the beginning of a page */
459static int reg_w_page(struct gspca_dev *gspca_dev, 452static void reg_w_page(struct gspca_dev *gspca_dev,
460 const __u8 *page, int len) 453 const __u8 *page, int len)
461{ 454{
462 int index; 455 int index;
463 int ret = 0; 456 int ret = 0;
464 457
458 if (gspca_dev->usb_err < 0)
459 return;
465 for (index = 0; index < len; index++) { 460 for (index = 0; index < len; index++) {
466 if (page[index] == SKIP) /* skip this index */ 461 if (page[index] == SKIP) /* skip this index */
467 continue; 462 continue;
@@ -477,56 +472,47 @@ static int reg_w_page(struct gspca_dev *gspca_dev,
477 "Failed to write register to index 0x%x, " 472 "Failed to write register to index 0x%x, "
478 "value 0x%x, error %i", 473 "value 0x%x, error %i",
479 index, page[index], ret); 474 index, page[index], ret);
475 gspca_dev->usb_err = ret;
480 break; 476 break;
481 } 477 }
482 } 478 }
483 return ret;
484} 479}
485 480
486/* output a variable sequence */ 481/* output a variable sequence */
487static int reg_w_var(struct gspca_dev *gspca_dev, 482static void reg_w_var(struct gspca_dev *gspca_dev,
488 const __u8 *seq, 483 const __u8 *seq,
489 const __u8 *page3, unsigned int page3_len, 484 const __u8 *page3, unsigned int page3_len)
490 const __u8 *page4, unsigned int page4_len)
491{ 485{
492 int index, len; 486 int index, len;
493 int ret = 0;
494 487
495 for (;;) { 488 for (;;) {
496 index = *seq++; 489 index = *seq++;
497 len = *seq++; 490 len = *seq++;
498 switch (len) { 491 switch (len) {
499 case END_OF_SEQUENCE: 492 case END_OF_SEQUENCE:
500 return ret; 493 return;
501 case LOAD_PAGE4:
502 ret = reg_w_page(gspca_dev, page4, page4_len);
503 break;
504 case LOAD_PAGE3: 494 case LOAD_PAGE3:
505 ret = reg_w_page(gspca_dev, page3, page3_len); 495 reg_w_page(gspca_dev, page3, page3_len);
506 break; 496 break;
507 default: 497 default:
508 if (len > USB_BUF_SZ) { 498 if (len > USB_BUF_SZ) {
509 PDEBUG(D_ERR|D_STREAM, 499 PDEBUG(D_ERR|D_STREAM,
510 "Incorrect variable sequence"); 500 "Incorrect variable sequence");
511 return -EINVAL; 501 return;
512 } 502 }
513 while (len > 0) { 503 while (len > 0) {
514 if (len < 8) { 504 if (len < 8) {
515 ret = reg_w_buf(gspca_dev, 505 reg_w_buf(gspca_dev,
516 index, seq, len); 506 index, seq, len);
517 if (ret < 0)
518 return ret;
519 seq += len; 507 seq += len;
520 break; 508 break;
521 } 509 }
522 ret = reg_w_buf(gspca_dev, index, seq, 8); 510 reg_w_buf(gspca_dev, index, seq, 8);
523 seq += 8; 511 seq += 8;
524 index += 8; 512 index += 8;
525 len -= 8; 513 len -= 8;
526 } 514 }
527 } 515 }
528 if (ret < 0)
529 return ret;
530 } 516 }
531 /* not reached */ 517 /* not reached */
532} 518}
@@ -560,11 +546,10 @@ static int sd_config(struct gspca_dev *gspca_dev,
560} 546}
561 547
562/* This function is used by pac7302 only */ 548/* This function is used by pac7302 only */
563static int setbrightcont(struct gspca_dev *gspca_dev) 549static void setbrightcont(struct gspca_dev *gspca_dev)
564{ 550{
565 struct sd *sd = (struct sd *) gspca_dev; 551 struct sd *sd = (struct sd *) gspca_dev;
566 int i, v; 552 int i, v;
567 int ret;
568 static const __u8 max[10] = 553 static const __u8 max[10] =
569 {0x29, 0x33, 0x42, 0x5a, 0x6e, 0x80, 0x9f, 0xbb, 554 {0x29, 0x33, 0x42, 0x5a, 0x6e, 0x80, 0x9f, 0xbb,
570 0xd4, 0xec}; 555 0xd4, 0xec};
@@ -572,7 +557,7 @@ static int setbrightcont(struct gspca_dev *gspca_dev)
572 {0x35, 0x33, 0x33, 0x2f, 0x2a, 0x25, 0x1e, 0x17, 557 {0x35, 0x33, 0x33, 0x2f, 0x2a, 0x25, 0x1e, 0x17,
573 0x11, 0x0b}; 558 0x11, 0x0b};
574 559
575 ret = reg_w(gspca_dev, 0xff, 0x00); /* page 0 */ 560 reg_w(gspca_dev, 0xff, 0x00); /* page 0 */
576 for (i = 0; i < 10; i++) { 561 for (i = 0; i < 10; i++) {
577 v = max[i]; 562 v = max[i];
578 v += (sd->brightness - BRIGHTNESS_MAX) 563 v += (sd->brightness - BRIGHTNESS_MAX)
@@ -582,136 +567,121 @@ static int setbrightcont(struct gspca_dev *gspca_dev)
582 v = 0; 567 v = 0;
583 else if (v > 0xff) 568 else if (v > 0xff)
584 v = 0xff; 569 v = 0xff;
585 if (0 <= ret) 570 reg_w(gspca_dev, 0xa2 + i, v);
586 ret = reg_w(gspca_dev, 0xa2 + i, v);
587 } 571 }
588 if (0 <= ret) 572 reg_w(gspca_dev, 0xdc, 0x01);
589 ret = reg_w(gspca_dev, 0xdc, 0x01);
590 return ret;
591} 573}
592 574
593/* This function is used by pac7302 only */ 575/* This function is used by pac7302 only */
594static int setcolors(struct gspca_dev *gspca_dev) 576static void setcolors(struct gspca_dev *gspca_dev)
595{ 577{
596 struct sd *sd = (struct sd *) gspca_dev; 578 struct sd *sd = (struct sd *) gspca_dev;
597 int i, v; 579 int i, v;
598 int ret;
599 static const int a[9] = 580 static const int a[9] =
600 {217, -212, 0, -101, 170, -67, -38, -315, 355}; 581 {217, -212, 0, -101, 170, -67, -38, -315, 355};
601 static const int b[9] = 582 static const int b[9] =
602 {19, 106, 0, 19, 106, 1, 19, 106, 1}; 583 {19, 106, 0, 19, 106, 1, 19, 106, 1};
603 584
604 ret = reg_w(gspca_dev, 0xff, 0x03); /* page 3 */ 585 reg_w(gspca_dev, 0xff, 0x03); /* page 3 */
605 if (0 <= ret) 586 reg_w(gspca_dev, 0x11, 0x01);
606 ret = reg_w(gspca_dev, 0x11, 0x01); 587 reg_w(gspca_dev, 0xff, 0x00); /* page 0 */
607 if (0 <= ret)
608 ret = reg_w(gspca_dev, 0xff, 0x00); /* page 0 */
609 for (i = 0; i < 9; i++) { 588 for (i = 0; i < 9; i++) {
610 v = a[i] * sd->colors / COLOR_MAX + b[i]; 589 v = a[i] * sd->colors / COLOR_MAX + b[i];
611 if (0 <= ret) 590 reg_w(gspca_dev, 0x0f + 2 * i, (v >> 8) & 0x07);
612 ret = reg_w(gspca_dev, 0x0f + 2 * i, (v >> 8) & 0x07); 591 reg_w(gspca_dev, 0x0f + 2 * i + 1, v);
613 if (0 <= ret)
614 ret = reg_w(gspca_dev, 0x0f + 2 * i + 1, v);
615 } 592 }
616 if (0 <= ret) 593 reg_w(gspca_dev, 0xdc, 0x01);
617 ret = reg_w(gspca_dev, 0xdc, 0x01);
618 PDEBUG(D_CONF|D_STREAM, "color: %i", sd->colors); 594 PDEBUG(D_CONF|D_STREAM, "color: %i", sd->colors);
619 return ret;
620} 595}
621 596
622static int setwhitebalance(struct gspca_dev *gspca_dev) 597static void setwhitebalance(struct gspca_dev *gspca_dev)
623{ 598{
624 struct sd *sd = (struct sd *) gspca_dev; 599 struct sd *sd = (struct sd *) gspca_dev;
625 int ret;
626 600
627 ret = reg_w(gspca_dev, 0xff, 0x00); /* page 0 */ 601 reg_w(gspca_dev, 0xff, 0x00); /* page 0 */
628 if (0 <= ret) 602 reg_w(gspca_dev, 0xc6, sd->white_balance);
629 ret = reg_w(gspca_dev, 0xc6, sd->white_balance);
630 603
631 if (0 <= ret) 604 reg_w(gspca_dev, 0xdc, 0x01);
632 ret = reg_w(gspca_dev, 0xdc, 0x01);
633 PDEBUG(D_CONF|D_STREAM, "white_balance: %i", sd->white_balance); 605 PDEBUG(D_CONF|D_STREAM, "white_balance: %i", sd->white_balance);
634 return ret;
635} 606}
636 607
637static int setredbalance(struct gspca_dev *gspca_dev) 608static void setredbalance(struct gspca_dev *gspca_dev)
638{ 609{
639 struct sd *sd = (struct sd *) gspca_dev; 610 struct sd *sd = (struct sd *) gspca_dev;
640 int ret;
641 611
642 ret = reg_w(gspca_dev, 0xff, 0x00); /* page 0 */ 612 reg_w(gspca_dev, 0xff, 0x00); /* page 0 */
643 if (0 <= ret) 613 reg_w(gspca_dev, 0xc5, sd->red_balance);
644 ret = reg_w(gspca_dev, 0xc5, sd->red_balance);
645 614
646 if (0 <= ret) 615 reg_w(gspca_dev, 0xdc, 0x01);
647 ret = reg_w(gspca_dev, 0xdc, 0x01);
648 PDEBUG(D_CONF|D_STREAM, "red_balance: %i", sd->red_balance); 616 PDEBUG(D_CONF|D_STREAM, "red_balance: %i", sd->red_balance);
649 return ret;
650} 617}
651 618
652static int setbluebalance(struct gspca_dev *gspca_dev) 619static void setbluebalance(struct gspca_dev *gspca_dev)
653{ 620{
654 struct sd *sd = (struct sd *) gspca_dev; 621 struct sd *sd = (struct sd *) gspca_dev;
655 int ret;
656 622
657 ret = reg_w(gspca_dev, 0xff, 0x00); /* page 0 */ 623 reg_w(gspca_dev, 0xff, 0x00); /* page 0 */
658 if (0 <= ret) 624 reg_w(gspca_dev, 0xc7, sd->blue_balance);
659 ret = reg_w(gspca_dev, 0xc7, sd->blue_balance);
660 625
661 if (0 <= ret) 626 reg_w(gspca_dev, 0xdc, 0x01);
662 ret = reg_w(gspca_dev, 0xdc, 0x01);
663 PDEBUG(D_CONF|D_STREAM, "blue_balance: %i", sd->blue_balance); 627 PDEBUG(D_CONF|D_STREAM, "blue_balance: %i", sd->blue_balance);
664 return ret;
665} 628}
666 629
667static int setgain(struct gspca_dev *gspca_dev) 630static void setgain(struct gspca_dev *gspca_dev)
668{ 631{
669 struct sd *sd = (struct sd *) gspca_dev; 632 struct sd *sd = (struct sd *) gspca_dev;
670 int ret;
671 633
672 ret = reg_w(gspca_dev, 0xff, 0x03); /* page 3 */ 634 reg_w(gspca_dev, 0xff, 0x03); /* page 3 */
673 if (0 <= ret) 635 reg_w(gspca_dev, 0x10, sd->gain >> 3);
674 ret = reg_w(gspca_dev, 0x10, sd->gain >> 3);
675 636
676 /* load registers to sensor (Bit 0, auto clear) */ 637 /* load registers to sensor (Bit 0, auto clear) */
677 if (0 <= ret) 638 reg_w(gspca_dev, 0x11, 0x01);
678 ret = reg_w(gspca_dev, 0x11, 0x01);
679 return ret;
680} 639}
681 640
682static int setexposure(struct gspca_dev *gspca_dev) 641static void setexposure(struct gspca_dev *gspca_dev)
683{ 642{
684 struct sd *sd = (struct sd *) gspca_dev; 643 struct sd *sd = (struct sd *) gspca_dev;
685 int ret; 644 __u8 clockdiv;
686 __u8 reg; 645 __u16 exposure;
687 646
688 /* register 2 of frame 3/4 contains the clock divider configuring the 647 /* register 2 of frame 3 contains the clock divider configuring the
689 no fps according to the formula: 60 / reg. sd->exposure is the 648 no fps according to the formula: 90 / reg. sd->exposure is the
690 desired exposure time in ms. */ 649 desired exposure time in 0.5 ms. */
691 reg = 120 * sd->exposure / 1000; 650 clockdiv = (90 * sd->exposure + 1999) / 2000;
692 if (reg < 2) 651
693 reg = 2; 652 /* Note clockdiv = 3 also works, but when running at 30 fps, depending
694 else if (reg > 63) 653 on the scene being recorded, the camera switches to another
695 reg = 63; 654 quantization table for certain JPEG blocks, and we don't know how
696 655 to decompress these blocks. So we cap the framerate at 15 fps */
697 /* On the pac7302 reg2 MUST be a multiple of 3, so round it to 656 if (clockdiv < 6)
698 the nearest multiple of 3, except when between 6 and 12? */ 657 clockdiv = 6;
699 if (reg < 6 || reg > 12) 658 else if (clockdiv > 63)
700 reg = ((reg + 1) / 3) * 3; 659 clockdiv = 63;
701 ret = reg_w(gspca_dev, 0xff, 0x03); /* page 3 */ 660
702 if (0 <= ret) 661 /* reg2 MUST be a multiple of 3, except when between 6 and 12?
703 ret = reg_w(gspca_dev, 0x02, reg); 662 Always round up, otherwise we cannot get the desired frametime
663 using the partial frame time exposure control */
664 if (clockdiv < 6 || clockdiv > 12)
665 clockdiv = ((clockdiv + 2) / 3) * 3;
666
667 /* frame exposure time in ms = 1000 * clockdiv / 90 ->
668 exposure = (sd->exposure / 2) * 448 / (1000 * clockdiv / 90) */
669 exposure = (sd->exposure * 45 * 448) / (1000 * clockdiv);
670 /* 0 = use full frametime, 448 = no exposure, reverse it */
671 exposure = 448 - exposure;
672
673 reg_w(gspca_dev, 0xff, 0x03); /* page 3 */
674 reg_w(gspca_dev, 0x02, clockdiv);
675 reg_w(gspca_dev, 0x0e, exposure & 0xff);
676 reg_w(gspca_dev, 0x0f, exposure >> 8);
704 677
705 /* load registers to sensor (Bit 0, auto clear) */ 678 /* load registers to sensor (Bit 0, auto clear) */
706 if (0 <= ret) 679 reg_w(gspca_dev, 0x11, 0x01);
707 ret = reg_w(gspca_dev, 0x11, 0x01);
708 return ret;
709} 680}
710 681
711static int sethvflip(struct gspca_dev *gspca_dev) 682static void sethvflip(struct gspca_dev *gspca_dev)
712{ 683{
713 struct sd *sd = (struct sd *) gspca_dev; 684 struct sd *sd = (struct sd *) gspca_dev;
714 int ret;
715 u8 data, hflip, vflip; 685 u8 data, hflip, vflip;
716 686
717 hflip = sd->hflip; 687 hflip = sd->hflip;
@@ -721,48 +691,37 @@ static int sethvflip(struct gspca_dev *gspca_dev)
721 if (sd->flags & FL_VFLIP) 691 if (sd->flags & FL_VFLIP)
722 vflip = !vflip; 692 vflip = !vflip;
723 693
724 ret = reg_w(gspca_dev, 0xff, 0x03); /* page 3 */ 694 reg_w(gspca_dev, 0xff, 0x03); /* page 3 */
725 data = (hflip ? 0x08 : 0x00) | (vflip ? 0x04 : 0x00); 695 data = (hflip ? 0x08 : 0x00) | (vflip ? 0x04 : 0x00);
726 if (0 <= ret) 696 reg_w(gspca_dev, 0x21, data);
727 ret = reg_w(gspca_dev, 0x21, data); 697
728 /* load registers to sensor (Bit 0, auto clear) */ 698 /* load registers to sensor (Bit 0, auto clear) */
729 if (0 <= ret) 699 reg_w(gspca_dev, 0x11, 0x01);
730 ret = reg_w(gspca_dev, 0x11, 0x01);
731 return ret;
732} 700}
733 701
734/* this function is called at probe and resume time for pac7302 */ 702/* this function is called at probe and resume time for pac7302 */
735static int sd_init(struct gspca_dev *gspca_dev) 703static int sd_init(struct gspca_dev *gspca_dev)
736{ 704{
737 return reg_w_seq(gspca_dev, init_7302, sizeof(init_7302)/2); 705 reg_w_seq(gspca_dev, init_7302, sizeof(init_7302)/2);
706 return gspca_dev->usb_err;
738} 707}
739 708
740static int sd_start(struct gspca_dev *gspca_dev) 709static int sd_start(struct gspca_dev *gspca_dev)
741{ 710{
742 struct sd *sd = (struct sd *) gspca_dev; 711 struct sd *sd = (struct sd *) gspca_dev;
743 int ret = 0;
744 712
745 sd->sof_read = 0; 713 sd->sof_read = 0;
746 714
747 ret = reg_w_var(gspca_dev, start_7302, 715 reg_w_var(gspca_dev, start_7302,
748 page3_7302, sizeof(page3_7302), 716 page3_7302, sizeof(page3_7302));
749 NULL, 0); 717 setbrightcont(gspca_dev);
750 if (0 <= ret) 718 setcolors(gspca_dev);
751 ret = setbrightcont(gspca_dev); 719 setwhitebalance(gspca_dev);
752 if (0 <= ret) 720 setredbalance(gspca_dev);
753 ret = setcolors(gspca_dev); 721 setbluebalance(gspca_dev);
754 if (0 <= ret) 722 setgain(gspca_dev);
755 ret = setwhitebalance(gspca_dev); 723 setexposure(gspca_dev);
756 if (0 <= ret) 724 sethvflip(gspca_dev);
757 ret = setredbalance(gspca_dev);
758 if (0 <= ret)
759 ret = setbluebalance(gspca_dev);
760 if (0 <= ret)
761 ret = setgain(gspca_dev);
762 if (0 <= ret)
763 ret = setexposure(gspca_dev);
764 if (0 <= ret)
765 ret = sethvflip(gspca_dev);
766 725
767 /* only resolution 640x480 is supported for pac7302 */ 726 /* only resolution 640x480 is supported for pac7302 */
768 727
@@ -771,34 +730,27 @@ static int sd_start(struct gspca_dev *gspca_dev)
771 atomic_set(&sd->avg_lum, -1); 730 atomic_set(&sd->avg_lum, -1);
772 731
773 /* start stream */ 732 /* start stream */
774 if (0 <= ret) 733 reg_w(gspca_dev, 0xff, 0x01);
775 ret = reg_w(gspca_dev, 0xff, 0x01); 734 reg_w(gspca_dev, 0x78, 0x01);
776 if (0 <= ret)
777 ret = reg_w(gspca_dev, 0x78, 0x01);
778 735
779 return ret; 736 return gspca_dev->usb_err;
780} 737}
781 738
782static void sd_stopN(struct gspca_dev *gspca_dev) 739static void sd_stopN(struct gspca_dev *gspca_dev)
783{ 740{
784 int ret;
785 741
786 /* stop stream */ 742 /* stop stream */
787 ret = reg_w(gspca_dev, 0xff, 0x01); 743 reg_w(gspca_dev, 0xff, 0x01);
788 if (0 <= ret) 744 reg_w(gspca_dev, 0x78, 0x00);
789 ret = reg_w(gspca_dev, 0x78, 0x00);
790} 745}
791 746
792/* called on streamoff with alt 0 and on disconnect for pac7302 */ 747/* called on streamoff with alt 0 and on disconnect for pac7302 */
793static void sd_stop0(struct gspca_dev *gspca_dev) 748static void sd_stop0(struct gspca_dev *gspca_dev)
794{ 749{
795 int ret;
796
797 if (!gspca_dev->present) 750 if (!gspca_dev->present)
798 return; 751 return;
799 ret = reg_w(gspca_dev, 0xff, 0x01); 752 reg_w(gspca_dev, 0xff, 0x01);
800 if (0 <= ret) 753 reg_w(gspca_dev, 0x78, 0x40);
801 ret = reg_w(gspca_dev, 0x78, 0x40);
802} 754}
803 755
804/* Include pac common sof detection functions */ 756/* Include pac common sof detection functions */
@@ -808,22 +760,13 @@ static void do_autogain(struct gspca_dev *gspca_dev)
808{ 760{
809 struct sd *sd = (struct sd *) gspca_dev; 761 struct sd *sd = (struct sd *) gspca_dev;
810 int avg_lum = atomic_read(&sd->avg_lum); 762 int avg_lum = atomic_read(&sd->avg_lum);
811 int desired_lum, deadzone; 763 int desired_lum;
764 const int deadzone = 30;
812 765
813 if (avg_lum == -1) 766 if (avg_lum == -1)
814 return; 767 return;
815 768
816 desired_lum = 270 + sd->brightness * 4; 769 desired_lum = 270 + sd->brightness;
817 /* Hack hack, with the 7202 the first exposure step is
818 pretty large, so if we're about to make the first
819 exposure increase make the deadzone large to avoid
820 oscilating */
821 if (desired_lum > avg_lum && sd->gain == GAIN_DEF &&
822 sd->exposure > EXPOSURE_DEF &&
823 sd->exposure < 42)
824 deadzone = 90;
825 else
826 deadzone = 30;
827 770
828 if (sd->autogain_ignore_frames > 0) 771 if (sd->autogain_ignore_frames > 0)
829 sd->autogain_ignore_frames--; 772 sd->autogain_ignore_frames--;
@@ -947,7 +890,7 @@ static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
947 sd->brightness = val; 890 sd->brightness = val;
948 if (gspca_dev->streaming) 891 if (gspca_dev->streaming)
949 setbrightcont(gspca_dev); 892 setbrightcont(gspca_dev);
950 return 0; 893 return gspca_dev->usb_err;
951} 894}
952 895
953static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val) 896static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
@@ -966,7 +909,7 @@ static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
966 if (gspca_dev->streaming) { 909 if (gspca_dev->streaming) {
967 setbrightcont(gspca_dev); 910 setbrightcont(gspca_dev);
968 } 911 }
969 return 0; 912 return gspca_dev->usb_err;
970} 913}
971 914
972static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val) 915static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
@@ -984,7 +927,7 @@ static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
984 sd->colors = val; 927 sd->colors = val;
985 if (gspca_dev->streaming) 928 if (gspca_dev->streaming)
986 setcolors(gspca_dev); 929 setcolors(gspca_dev);
987 return 0; 930 return gspca_dev->usb_err;
988} 931}
989 932
990static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val) 933static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
@@ -998,14 +941,11 @@ static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
998static int sd_setwhitebalance(struct gspca_dev *gspca_dev, __s32 val) 941static int sd_setwhitebalance(struct gspca_dev *gspca_dev, __s32 val)
999{ 942{
1000 struct sd *sd = (struct sd *) gspca_dev; 943 struct sd *sd = (struct sd *) gspca_dev;
1001 int ret = 0;
1002 944
1003 sd->white_balance = val; 945 sd->white_balance = val;
1004 if (gspca_dev->streaming) 946 if (gspca_dev->streaming)
1005 ret = setwhitebalance(gspca_dev); 947 setwhitebalance(gspca_dev);
1006 if (0 <= ret) 948 return gspca_dev->usb_err;
1007 ret = 0;
1008 return ret;
1009} 949}
1010 950
1011static int sd_getwhitebalance(struct gspca_dev *gspca_dev, __s32 *val) 951static int sd_getwhitebalance(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1019,14 +959,11 @@ static int sd_getwhitebalance(struct gspca_dev *gspca_dev, __s32 *val)
1019static int sd_setredbalance(struct gspca_dev *gspca_dev, __s32 val) 959static int sd_setredbalance(struct gspca_dev *gspca_dev, __s32 val)
1020{ 960{
1021 struct sd *sd = (struct sd *) gspca_dev; 961 struct sd *sd = (struct sd *) gspca_dev;
1022 int ret = 0;
1023 962
1024 sd->red_balance = val; 963 sd->red_balance = val;
1025 if (gspca_dev->streaming) 964 if (gspca_dev->streaming)
1026 ret = setredbalance(gspca_dev); 965 setredbalance(gspca_dev);
1027 if (0 <= ret) 966 return gspca_dev->usb_err;
1028 ret = 0;
1029 return ret;
1030} 967}
1031 968
1032static int sd_getredbalance(struct gspca_dev *gspca_dev, __s32 *val) 969static int sd_getredbalance(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1040,14 +977,11 @@ static int sd_getredbalance(struct gspca_dev *gspca_dev, __s32 *val)
1040static int sd_setbluebalance(struct gspca_dev *gspca_dev, __s32 val) 977static int sd_setbluebalance(struct gspca_dev *gspca_dev, __s32 val)
1041{ 978{
1042 struct sd *sd = (struct sd *) gspca_dev; 979 struct sd *sd = (struct sd *) gspca_dev;
1043 int ret = 0;
1044 980
1045 sd->blue_balance = val; 981 sd->blue_balance = val;
1046 if (gspca_dev->streaming) 982 if (gspca_dev->streaming)
1047 ret = setbluebalance(gspca_dev); 983 setbluebalance(gspca_dev);
1048 if (0 <= ret) 984 return gspca_dev->usb_err;
1049 ret = 0;
1050 return ret;
1051} 985}
1052 986
1053static int sd_getbluebalance(struct gspca_dev *gspca_dev, __s32 *val) 987static int sd_getbluebalance(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1065,7 +999,7 @@ static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val)
1065 sd->gain = val; 999 sd->gain = val;
1066 if (gspca_dev->streaming) 1000 if (gspca_dev->streaming)
1067 setgain(gspca_dev); 1001 setgain(gspca_dev);
1068 return 0; 1002 return gspca_dev->usb_err;
1069} 1003}
1070 1004
1071static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val) 1005static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1083,7 +1017,7 @@ static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val)
1083 sd->exposure = val; 1017 sd->exposure = val;
1084 if (gspca_dev->streaming) 1018 if (gspca_dev->streaming)
1085 setexposure(gspca_dev); 1019 setexposure(gspca_dev);
1086 return 0; 1020 return gspca_dev->usb_err;
1087} 1021}
1088 1022
1089static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val) 1023static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1114,7 +1048,7 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
1114 } 1048 }
1115 } 1049 }
1116 1050
1117 return 0; 1051 return gspca_dev->usb_err;
1118} 1052}
1119 1053
1120static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val) 1054static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1132,7 +1066,7 @@ static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
1132 sd->hflip = val; 1066 sd->hflip = val;
1133 if (gspca_dev->streaming) 1067 if (gspca_dev->streaming)
1134 sethvflip(gspca_dev); 1068 sethvflip(gspca_dev);
1135 return 0; 1069 return gspca_dev->usb_err;
1136} 1070}
1137 1071
1138static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val) 1072static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1150,7 +1084,7 @@ static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
1150 sd->vflip = val; 1084 sd->vflip = val;
1151 if (gspca_dev->streaming) 1085 if (gspca_dev->streaming)
1152 sethvflip(gspca_dev); 1086 sethvflip(gspca_dev);
1153 return 0; 1087 return gspca_dev->usb_err;
1154} 1088}
1155 1089
1156static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val) 1090static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1165,7 +1099,6 @@ static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
1165static int sd_dbg_s_register(struct gspca_dev *gspca_dev, 1099static int sd_dbg_s_register(struct gspca_dev *gspca_dev,
1166 struct v4l2_dbg_register *reg) 1100 struct v4l2_dbg_register *reg)
1167{ 1101{
1168 int ret = -EINVAL;
1169 __u8 index; 1102 __u8 index;
1170 __u8 value; 1103 __u8 value;
1171 1104
@@ -1185,14 +1118,12 @@ static int sd_dbg_s_register(struct gspca_dev *gspca_dev,
1185 /* Note that there shall be no access to other page 1118 /* Note that there shall be no access to other page
1186 by any other function between the page swith and 1119 by any other function between the page swith and
1187 the actual register write */ 1120 the actual register write */
1188 ret = reg_w(gspca_dev, 0xff, 0x00); /* page 0 */ 1121 reg_w(gspca_dev, 0xff, 0x00); /* page 0 */
1189 if (0 <= ret) 1122 reg_w(gspca_dev, index, value);
1190 ret = reg_w(gspca_dev, index, value);
1191 1123
1192 if (0 <= ret) 1124 reg_w(gspca_dev, 0xdc, 0x01);
1193 ret = reg_w(gspca_dev, 0xdc, 0x01);
1194 } 1125 }
1195 return ret; 1126 return gspca_dev->usb_err;
1196} 1127}
1197 1128
1198static int sd_chip_ident(struct gspca_dev *gspca_dev, 1129static int sd_chip_ident(struct gspca_dev *gspca_dev,
@@ -1210,8 +1141,39 @@ static int sd_chip_ident(struct gspca_dev *gspca_dev,
1210} 1141}
1211#endif 1142#endif
1212 1143
1144#ifdef CONFIG_INPUT
1145static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
1146 u8 *data, /* interrupt packet data */
1147 int len) /* interrput packet length */
1148{
1149 int ret = -EINVAL;
1150 u8 data0, data1;
1151
1152 if (len == 2) {
1153 data0 = data[0];
1154 data1 = data[1];
1155 if ((data0 == 0x00 && data1 == 0x11) ||
1156 (data0 == 0x22 && data1 == 0x33) ||
1157 (data0 == 0x44 && data1 == 0x55) ||
1158 (data0 == 0x66 && data1 == 0x77) ||
1159 (data0 == 0x88 && data1 == 0x99) ||
1160 (data0 == 0xaa && data1 == 0xbb) ||
1161 (data0 == 0xcc && data1 == 0xdd) ||
1162 (data0 == 0xee && data1 == 0xff)) {
1163 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 1);
1164 input_sync(gspca_dev->input_dev);
1165 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
1166 input_sync(gspca_dev->input_dev);
1167 ret = 0;
1168 }
1169 }
1170
1171 return ret;
1172}
1173#endif
1174
1213/* sub-driver description for pac7302 */ 1175/* sub-driver description for pac7302 */
1214static struct sd_desc sd_desc = { 1176static const struct sd_desc sd_desc = {
1215 .name = MODULE_NAME, 1177 .name = MODULE_NAME,
1216 .ctrls = sd_ctrls, 1178 .ctrls = sd_ctrls,
1217 .nctrls = ARRAY_SIZE(sd_ctrls), 1179 .nctrls = ARRAY_SIZE(sd_ctrls),
@@ -1226,6 +1188,9 @@ static struct sd_desc sd_desc = {
1226 .set_register = sd_dbg_s_register, 1188 .set_register = sd_dbg_s_register,
1227 .get_chip_ident = sd_chip_ident, 1189 .get_chip_ident = sd_chip_ident,
1228#endif 1190#endif
1191#ifdef CONFIG_INPUT
1192 .int_pkt_scan = sd_int_pkt_scan,
1193#endif
1229}; 1194};
1230 1195
1231/* -- module initialisation -- */ 1196/* -- module initialisation -- */
diff --git a/drivers/media/video/gspca/pac7311.c b/drivers/media/video/gspca/pac7311.c
index 42cfcdfd8f4f..44fed9686729 100644
--- a/drivers/media/video/gspca/pac7311.c
+++ b/drivers/media/video/gspca/pac7311.c
@@ -51,6 +51,7 @@
51 51
52#define MODULE_NAME "pac7311" 52#define MODULE_NAME "pac7311"
53 53
54#include <linux/input.h>
54#include "gspca.h" 55#include "gspca.h"
55 56
56MODULE_AUTHOR("Thomas Kaiser thomas@kaiser-linux.li"); 57MODULE_AUTHOR("Thomas Kaiser thomas@kaiser-linux.li");
@@ -88,7 +89,7 @@ static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val);
88static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val); 89static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val);
89static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val); 90static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val);
90 91
91static struct ctrl sd_ctrls[] = { 92static const struct ctrl sd_ctrls[] = {
92/* This control is for both the 7302 and the 7311 */ 93/* This control is for both the 7302 and the 7311 */
93 { 94 {
94 { 95 {
@@ -200,7 +201,6 @@ static const struct v4l2_pix_format vga_mode[] = {
200 .priv = 0}, 201 .priv = 0},
201}; 202};
202 203
203#define LOAD_PAGE3 255
204#define LOAD_PAGE4 254 204#define LOAD_PAGE4 254
205#define END_OF_SEQUENCE 0 205#define END_OF_SEQUENCE 0
206 206
@@ -259,12 +259,14 @@ static const __u8 page4_7311[] = {
259 0x23, 0x28, 0x04, 0x11, 0x00, 0x00 259 0x23, 0x28, 0x04, 0x11, 0x00, 0x00
260}; 260};
261 261
262static int reg_w_buf(struct gspca_dev *gspca_dev, 262static void reg_w_buf(struct gspca_dev *gspca_dev,
263 __u8 index, 263 __u8 index,
264 const char *buffer, int len) 264 const char *buffer, int len)
265{ 265{
266 int ret; 266 int ret;
267 267
268 if (gspca_dev->usb_err < 0)
269 return;
268 memcpy(gspca_dev->usb_buf, buffer, len); 270 memcpy(gspca_dev->usb_buf, buffer, len);
269 ret = usb_control_msg(gspca_dev->dev, 271 ret = usb_control_msg(gspca_dev->dev,
270 usb_sndctrlpipe(gspca_dev->dev, 0), 272 usb_sndctrlpipe(gspca_dev->dev, 0),
@@ -273,20 +275,23 @@ static int reg_w_buf(struct gspca_dev *gspca_dev,
273 0, /* value */ 275 0, /* value */
274 index, gspca_dev->usb_buf, len, 276 index, gspca_dev->usb_buf, len,
275 500); 277 500);
276 if (ret < 0) 278 if (ret < 0) {
277 PDEBUG(D_ERR, "reg_w_buf(): " 279 PDEBUG(D_ERR, "reg_w_buf(): "
278 "Failed to write registers to index 0x%x, error %i", 280 "Failed to write registers to index 0x%x, error %i",
279 index, ret); 281 index, ret);
280 return ret; 282 gspca_dev->usb_err = ret;
283 }
281} 284}
282 285
283 286
284static int reg_w(struct gspca_dev *gspca_dev, 287static void reg_w(struct gspca_dev *gspca_dev,
285 __u8 index, 288 __u8 index,
286 __u8 value) 289 __u8 value)
287{ 290{
288 int ret; 291 int ret;
289 292
293 if (gspca_dev->usb_err < 0)
294 return;
290 gspca_dev->usb_buf[0] = value; 295 gspca_dev->usb_buf[0] = value;
291 ret = usb_control_msg(gspca_dev->dev, 296 ret = usb_control_msg(gspca_dev->dev,
292 usb_sndctrlpipe(gspca_dev->dev, 0), 297 usb_sndctrlpipe(gspca_dev->dev, 0),
@@ -294,32 +299,32 @@ static int reg_w(struct gspca_dev *gspca_dev,
294 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 299 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
295 0, index, gspca_dev->usb_buf, 1, 300 0, index, gspca_dev->usb_buf, 1,
296 500); 301 500);
297 if (ret < 0) 302 if (ret < 0) {
298 PDEBUG(D_ERR, "reg_w(): " 303 PDEBUG(D_ERR, "reg_w(): "
299 "Failed to write register to index 0x%x, value 0x%x, error %i", 304 "Failed to write register to index 0x%x, value 0x%x, error %i",
300 index, value, ret); 305 index, value, ret);
301 return ret; 306 gspca_dev->usb_err = ret;
307 }
302} 308}
303 309
304static int reg_w_seq(struct gspca_dev *gspca_dev, 310static void reg_w_seq(struct gspca_dev *gspca_dev,
305 const __u8 *seq, int len) 311 const __u8 *seq, int len)
306{ 312{
307 int ret = 0;
308 while (--len >= 0) { 313 while (--len >= 0) {
309 if (0 <= ret) 314 reg_w(gspca_dev, seq[0], seq[1]);
310 ret = reg_w(gspca_dev, seq[0], seq[1]);
311 seq += 2; 315 seq += 2;
312 } 316 }
313 return ret;
314} 317}
315 318
316/* load the beginning of a page */ 319/* load the beginning of a page */
317static int reg_w_page(struct gspca_dev *gspca_dev, 320static void reg_w_page(struct gspca_dev *gspca_dev,
318 const __u8 *page, int len) 321 const __u8 *page, int len)
319{ 322{
320 int index; 323 int index;
321 int ret = 0; 324 int ret = 0;
322 325
326 if (gspca_dev->usb_err < 0)
327 return;
323 for (index = 0; index < len; index++) { 328 for (index = 0; index < len; index++) {
324 if (page[index] == SKIP) /* skip this index */ 329 if (page[index] == SKIP) /* skip this index */
325 continue; 330 continue;
@@ -335,56 +340,47 @@ static int reg_w_page(struct gspca_dev *gspca_dev,
335 "Failed to write register to index 0x%x, " 340 "Failed to write register to index 0x%x, "
336 "value 0x%x, error %i", 341 "value 0x%x, error %i",
337 index, page[index], ret); 342 index, page[index], ret);
343 gspca_dev->usb_err = ret;
338 break; 344 break;
339 } 345 }
340 } 346 }
341 return ret;
342} 347}
343 348
344/* output a variable sequence */ 349/* output a variable sequence */
345static int reg_w_var(struct gspca_dev *gspca_dev, 350static void reg_w_var(struct gspca_dev *gspca_dev,
346 const __u8 *seq, 351 const __u8 *seq,
347 const __u8 *page3, unsigned int page3_len,
348 const __u8 *page4, unsigned int page4_len) 352 const __u8 *page4, unsigned int page4_len)
349{ 353{
350 int index, len; 354 int index, len;
351 int ret = 0;
352 355
353 for (;;) { 356 for (;;) {
354 index = *seq++; 357 index = *seq++;
355 len = *seq++; 358 len = *seq++;
356 switch (len) { 359 switch (len) {
357 case END_OF_SEQUENCE: 360 case END_OF_SEQUENCE:
358 return ret; 361 return;
359 case LOAD_PAGE4: 362 case LOAD_PAGE4:
360 ret = reg_w_page(gspca_dev, page4, page4_len); 363 reg_w_page(gspca_dev, page4, page4_len);
361 break;
362 case LOAD_PAGE3:
363 ret = reg_w_page(gspca_dev, page3, page3_len);
364 break; 364 break;
365 default: 365 default:
366 if (len > USB_BUF_SZ) { 366 if (len > USB_BUF_SZ) {
367 PDEBUG(D_ERR|D_STREAM, 367 PDEBUG(D_ERR|D_STREAM,
368 "Incorrect variable sequence"); 368 "Incorrect variable sequence");
369 return -EINVAL; 369 return;
370 } 370 }
371 while (len > 0) { 371 while (len > 0) {
372 if (len < 8) { 372 if (len < 8) {
373 ret = reg_w_buf(gspca_dev, 373 reg_w_buf(gspca_dev,
374 index, seq, len); 374 index, seq, len);
375 if (ret < 0)
376 return ret;
377 seq += len; 375 seq += len;
378 break; 376 break;
379 } 377 }
380 ret = reg_w_buf(gspca_dev, index, seq, 8); 378 reg_w_buf(gspca_dev, index, seq, 8);
381 seq += 8; 379 seq += 8;
382 index += 8; 380 index += 8;
383 len -= 8; 381 len -= 8;
384 } 382 }
385 } 383 }
386 if (ret < 0)
387 return ret;
388 } 384 }
389 /* not reached */ 385 /* not reached */
390} 386}
@@ -412,46 +408,36 @@ static int sd_config(struct gspca_dev *gspca_dev,
412} 408}
413 409
414/* This function is used by pac7311 only */ 410/* This function is used by pac7311 only */
415static int setcontrast(struct gspca_dev *gspca_dev) 411static void setcontrast(struct gspca_dev *gspca_dev)
416{ 412{
417 struct sd *sd = (struct sd *) gspca_dev; 413 struct sd *sd = (struct sd *) gspca_dev;
418 int ret;
419 414
420 ret = reg_w(gspca_dev, 0xff, 0x04); 415 reg_w(gspca_dev, 0xff, 0x04);
421 if (0 <= ret) 416 reg_w(gspca_dev, 0x10, sd->contrast >> 4);
422 ret = reg_w(gspca_dev, 0x10, sd->contrast >> 4);
423 /* load registers to sensor (Bit 0, auto clear) */ 417 /* load registers to sensor (Bit 0, auto clear) */
424 if (0 <= ret) 418 reg_w(gspca_dev, 0x11, 0x01);
425 ret = reg_w(gspca_dev, 0x11, 0x01);
426 return ret;
427} 419}
428 420
429static int setgain(struct gspca_dev *gspca_dev) 421static void setgain(struct gspca_dev *gspca_dev)
430{ 422{
431 struct sd *sd = (struct sd *) gspca_dev; 423 struct sd *sd = (struct sd *) gspca_dev;
432 int gain = GAIN_MAX - sd->gain; 424 int gain = GAIN_MAX - sd->gain;
433 int ret;
434 425
435 if (gain < 1) 426 if (gain < 1)
436 gain = 1; 427 gain = 1;
437 else if (gain > 245) 428 else if (gain > 245)
438 gain = 245; 429 gain = 245;
439 ret = reg_w(gspca_dev, 0xff, 0x04); /* page 4 */ 430 reg_w(gspca_dev, 0xff, 0x04); /* page 4 */
440 if (0 <= ret) 431 reg_w(gspca_dev, 0x0e, 0x00);
441 ret = reg_w(gspca_dev, 0x0e, 0x00); 432 reg_w(gspca_dev, 0x0f, gain);
442 if (0 <= ret)
443 ret = reg_w(gspca_dev, 0x0f, gain);
444 433
445 /* load registers to sensor (Bit 0, auto clear) */ 434 /* load registers to sensor (Bit 0, auto clear) */
446 if (0 <= ret) 435 reg_w(gspca_dev, 0x11, 0x01);
447 ret = reg_w(gspca_dev, 0x11, 0x01);
448 return ret;
449} 436}
450 437
451static int setexposure(struct gspca_dev *gspca_dev) 438static void setexposure(struct gspca_dev *gspca_dev)
452{ 439{
453 struct sd *sd = (struct sd *) gspca_dev; 440 struct sd *sd = (struct sd *) gspca_dev;
454 int ret;
455 __u8 reg; 441 __u8 reg;
456 442
457 /* register 2 of frame 3/4 contains the clock divider configuring the 443 /* register 2 of frame 3/4 contains the clock divider configuring the
@@ -463,94 +449,72 @@ static int setexposure(struct gspca_dev *gspca_dev)
463 else if (reg > 63) 449 else if (reg > 63)
464 reg = 63; 450 reg = 63;
465 451
466 ret = reg_w(gspca_dev, 0xff, 0x04); /* page 4 */ 452 reg_w(gspca_dev, 0xff, 0x04); /* page 4 */
467 if (0 <= ret) 453 reg_w(gspca_dev, 0x02, reg);
468 ret = reg_w(gspca_dev, 0x02, reg); 454
469 /* Page 1 register 8 must always be 0x08 except when not in 455 /* Page 1 register 8 must always be 0x08 except when not in
470 640x480 mode and Page3/4 reg 2 <= 3 then it must be 9 */ 456 640x480 mode and Page3/4 reg 2 <= 3 then it must be 9 */
471 if (0 <= ret) 457 reg_w(gspca_dev, 0xff, 0x01);
472 ret = reg_w(gspca_dev, 0xff, 0x01);
473 if (gspca_dev->cam.cam_mode[(int)gspca_dev->curr_mode].priv && 458 if (gspca_dev->cam.cam_mode[(int)gspca_dev->curr_mode].priv &&
474 reg <= 3) { 459 reg <= 3) {
475 if (0 <= ret) 460 reg_w(gspca_dev, 0x08, 0x09);
476 ret = reg_w(gspca_dev, 0x08, 0x09);
477 } else { 461 } else {
478 if (0 <= ret) 462 reg_w(gspca_dev, 0x08, 0x08);
479 ret = reg_w(gspca_dev, 0x08, 0x08);
480 } 463 }
481 464
482 /* load registers to sensor (Bit 0, auto clear) */ 465 /* load registers to sensor (Bit 0, auto clear) */
483 if (0 <= ret) 466 reg_w(gspca_dev, 0x11, 0x01);
484 ret = reg_w(gspca_dev, 0x11, 0x01);
485 return ret;
486} 467}
487 468
488static int sethvflip(struct gspca_dev *gspca_dev) 469static void sethvflip(struct gspca_dev *gspca_dev)
489{ 470{
490 struct sd *sd = (struct sd *) gspca_dev; 471 struct sd *sd = (struct sd *) gspca_dev;
491 int ret;
492 __u8 data; 472 __u8 data;
493 473
494 ret = reg_w(gspca_dev, 0xff, 0x04); /* page 4 */ 474 reg_w(gspca_dev, 0xff, 0x04); /* page 4 */
495 data = (sd->hflip ? 0x04 : 0x00) | (sd->vflip ? 0x08 : 0x00); 475 data = (sd->hflip ? 0x04 : 0x00) | (sd->vflip ? 0x08 : 0x00);
496 if (0 <= ret) 476 reg_w(gspca_dev, 0x21, data);
497 ret = reg_w(gspca_dev, 0x21, data); 477
498 /* load registers to sensor (Bit 0, auto clear) */ 478 /* load registers to sensor (Bit 0, auto clear) */
499 if (0 <= ret) 479 reg_w(gspca_dev, 0x11, 0x01);
500 ret = reg_w(gspca_dev, 0x11, 0x01);
501 return ret;
502} 480}
503 481
504/* this function is called at probe and resume time for pac7311 */ 482/* this function is called at probe and resume time for pac7311 */
505static int sd_init(struct gspca_dev *gspca_dev) 483static int sd_init(struct gspca_dev *gspca_dev)
506{ 484{
507 return reg_w_seq(gspca_dev, init_7311, sizeof(init_7311)/2); 485 reg_w_seq(gspca_dev, init_7311, sizeof(init_7311)/2);
486 return gspca_dev->usb_err;
508} 487}
509 488
510static int sd_start(struct gspca_dev *gspca_dev) 489static int sd_start(struct gspca_dev *gspca_dev)
511{ 490{
512 struct sd *sd = (struct sd *) gspca_dev; 491 struct sd *sd = (struct sd *) gspca_dev;
513 int ret;
514 492
515 sd->sof_read = 0; 493 sd->sof_read = 0;
516 494
517 ret = reg_w_var(gspca_dev, start_7311, 495 reg_w_var(gspca_dev, start_7311,
518 NULL, 0,
519 page4_7311, sizeof(page4_7311)); 496 page4_7311, sizeof(page4_7311));
520 if (0 <= ret) 497 setcontrast(gspca_dev);
521 ret = setcontrast(gspca_dev); 498 setgain(gspca_dev);
522 if (0 <= ret) 499 setexposure(gspca_dev);
523 ret = setgain(gspca_dev); 500 sethvflip(gspca_dev);
524 if (0 <= ret)
525 ret = setexposure(gspca_dev);
526 if (0 <= ret)
527 ret = sethvflip(gspca_dev);
528 501
529 /* set correct resolution */ 502 /* set correct resolution */
530 switch (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) { 503 switch (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) {
531 case 2: /* 160x120 pac7311 */ 504 case 2: /* 160x120 pac7311 */
532 if (0 <= ret) 505 reg_w(gspca_dev, 0xff, 0x01);
533 ret = reg_w(gspca_dev, 0xff, 0x01); 506 reg_w(gspca_dev, 0x17, 0x20);
534 if (0 <= ret) 507 reg_w(gspca_dev, 0x87, 0x10);
535 ret = reg_w(gspca_dev, 0x17, 0x20);
536 if (0 <= ret)
537 ret = reg_w(gspca_dev, 0x87, 0x10);
538 break; 508 break;
539 case 1: /* 320x240 pac7311 */ 509 case 1: /* 320x240 pac7311 */
540 if (0 <= ret) 510 reg_w(gspca_dev, 0xff, 0x01);
541 ret = reg_w(gspca_dev, 0xff, 0x01); 511 reg_w(gspca_dev, 0x17, 0x30);
542 if (0 <= ret) 512 reg_w(gspca_dev, 0x87, 0x11);
543 ret = reg_w(gspca_dev, 0x17, 0x30);
544 if (0 <= ret)
545 ret = reg_w(gspca_dev, 0x87, 0x11);
546 break; 513 break;
547 case 0: /* 640x480 */ 514 case 0: /* 640x480 */
548 if (0 <= ret) 515 reg_w(gspca_dev, 0xff, 0x01);
549 ret = reg_w(gspca_dev, 0xff, 0x01); 516 reg_w(gspca_dev, 0x17, 0x00);
550 if (0 <= ret) 517 reg_w(gspca_dev, 0x87, 0x12);
551 ret = reg_w(gspca_dev, 0x17, 0x00);
552 if (0 <= ret)
553 ret = reg_w(gspca_dev, 0x87, 0x12);
554 break; 518 break;
555 } 519 }
556 520
@@ -559,37 +523,24 @@ static int sd_start(struct gspca_dev *gspca_dev)
559 atomic_set(&sd->avg_lum, -1); 523 atomic_set(&sd->avg_lum, -1);
560 524
561 /* start stream */ 525 /* start stream */
562 if (0 <= ret) 526 reg_w(gspca_dev, 0xff, 0x01);
563 ret = reg_w(gspca_dev, 0xff, 0x01); 527 reg_w(gspca_dev, 0x78, 0x05);
564 if (0 <= ret)
565 ret = reg_w(gspca_dev, 0x78, 0x05);
566 528
567 return ret; 529 return gspca_dev->usb_err;
568} 530}
569 531
570static void sd_stopN(struct gspca_dev *gspca_dev) 532static void sd_stopN(struct gspca_dev *gspca_dev)
571{ 533{
572 int ret; 534 reg_w(gspca_dev, 0xff, 0x04);
573 535 reg_w(gspca_dev, 0x27, 0x80);
574 ret = reg_w(gspca_dev, 0xff, 0x04); 536 reg_w(gspca_dev, 0x28, 0xca);
575 if (0 <= ret) 537 reg_w(gspca_dev, 0x29, 0x53);
576 ret = reg_w(gspca_dev, 0x27, 0x80); 538 reg_w(gspca_dev, 0x2a, 0x0e);
577 if (0 <= ret) 539 reg_w(gspca_dev, 0xff, 0x01);
578 ret = reg_w(gspca_dev, 0x28, 0xca); 540 reg_w(gspca_dev, 0x3e, 0x20);
579 if (0 <= ret) 541 reg_w(gspca_dev, 0x78, 0x44); /* Bit_0=start stream, Bit_6=LED */
580 ret = reg_w(gspca_dev, 0x29, 0x53); 542 reg_w(gspca_dev, 0x78, 0x44); /* Bit_0=start stream, Bit_6=LED */
581 if (0 <= ret) 543 reg_w(gspca_dev, 0x78, 0x44); /* Bit_0=start stream, Bit_6=LED */
582 ret = reg_w(gspca_dev, 0x2a, 0x0e);
583 if (0 <= ret)
584 ret = reg_w(gspca_dev, 0xff, 0x01);
585 if (0 <= ret)
586 ret = reg_w(gspca_dev, 0x3e, 0x20);
587 if (0 <= ret)
588 ret = reg_w(gspca_dev, 0x78, 0x44); /* Bit_0=start stream, Bit_6=LED */
589 if (0 <= ret)
590 ret = reg_w(gspca_dev, 0x78, 0x44); /* Bit_0=start stream, Bit_6=LED */
591 if (0 <= ret)
592 ret = reg_w(gspca_dev, 0x78, 0x44); /* Bit_0=start stream, Bit_6=LED */
593} 544}
594 545
595/* called on streamoff with alt 0 and on disconnect for 7311 */ 546/* called on streamoff with alt 0 and on disconnect for 7311 */
@@ -734,7 +685,7 @@ static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
734 if (gspca_dev->streaming) { 685 if (gspca_dev->streaming) {
735 setcontrast(gspca_dev); 686 setcontrast(gspca_dev);
736 } 687 }
737 return 0; 688 return gspca_dev->usb_err;
738} 689}
739 690
740static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val) 691static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
@@ -752,7 +703,7 @@ static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val)
752 sd->gain = val; 703 sd->gain = val;
753 if (gspca_dev->streaming) 704 if (gspca_dev->streaming)
754 setgain(gspca_dev); 705 setgain(gspca_dev);
755 return 0; 706 return gspca_dev->usb_err;
756} 707}
757 708
758static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val) 709static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val)
@@ -770,7 +721,7 @@ static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val)
770 sd->exposure = val; 721 sd->exposure = val;
771 if (gspca_dev->streaming) 722 if (gspca_dev->streaming)
772 setexposure(gspca_dev); 723 setexposure(gspca_dev);
773 return 0; 724 return gspca_dev->usb_err;
774} 725}
775 726
776static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val) 727static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val)
@@ -801,7 +752,7 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
801 } 752 }
802 } 753 }
803 754
804 return 0; 755 return gspca_dev->usb_err;
805} 756}
806 757
807static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val) 758static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)
@@ -819,7 +770,7 @@ static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
819 sd->hflip = val; 770 sd->hflip = val;
820 if (gspca_dev->streaming) 771 if (gspca_dev->streaming)
821 sethvflip(gspca_dev); 772 sethvflip(gspca_dev);
822 return 0; 773 return gspca_dev->usb_err;
823} 774}
824 775
825static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val) 776static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
@@ -837,7 +788,7 @@ static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
837 sd->vflip = val; 788 sd->vflip = val;
838 if (gspca_dev->streaming) 789 if (gspca_dev->streaming)
839 sethvflip(gspca_dev); 790 sethvflip(gspca_dev);
840 return 0; 791 return gspca_dev->usb_err;
841} 792}
842 793
843static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val) 794static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
@@ -848,8 +799,39 @@ static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
848 return 0; 799 return 0;
849} 800}
850 801
802#ifdef CONFIG_INPUT
803static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
804 u8 *data, /* interrupt packet data */
805 int len) /* interrupt packet length */
806{
807 int ret = -EINVAL;
808 u8 data0, data1;
809
810 if (len == 2) {
811 data0 = data[0];
812 data1 = data[1];
813 if ((data0 == 0x00 && data1 == 0x11) ||
814 (data0 == 0x22 && data1 == 0x33) ||
815 (data0 == 0x44 && data1 == 0x55) ||
816 (data0 == 0x66 && data1 == 0x77) ||
817 (data0 == 0x88 && data1 == 0x99) ||
818 (data0 == 0xaa && data1 == 0xbb) ||
819 (data0 == 0xcc && data1 == 0xdd) ||
820 (data0 == 0xee && data1 == 0xff)) {
821 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 1);
822 input_sync(gspca_dev->input_dev);
823 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
824 input_sync(gspca_dev->input_dev);
825 ret = 0;
826 }
827 }
828
829 return ret;
830}
831#endif
832
851/* sub-driver description for pac7311 */ 833/* sub-driver description for pac7311 */
852static struct sd_desc sd_desc = { 834static const struct sd_desc sd_desc = {
853 .name = MODULE_NAME, 835 .name = MODULE_NAME,
854 .ctrls = sd_ctrls, 836 .ctrls = sd_ctrls,
855 .nctrls = ARRAY_SIZE(sd_ctrls), 837 .nctrls = ARRAY_SIZE(sd_ctrls),
@@ -860,6 +842,9 @@ static struct sd_desc sd_desc = {
860 .stop0 = sd_stop0, 842 .stop0 = sd_stop0,
861 .pkt_scan = sd_pkt_scan, 843 .pkt_scan = sd_pkt_scan,
862 .dq_callback = do_autogain, 844 .dq_callback = do_autogain,
845#ifdef CONFIG_INPUT
846 .int_pkt_scan = sd_int_pkt_scan,
847#endif
863}; 848};
864 849
865/* -- module initialisation -- */ 850/* -- module initialisation -- */
diff --git a/drivers/media/video/gspca/pac_common.h b/drivers/media/video/gspca/pac_common.h
index 20f67d9b8c06..8462a7c1a338 100644
--- a/drivers/media/video/gspca/pac_common.h
+++ b/drivers/media/video/gspca/pac_common.h
@@ -24,11 +24,10 @@
24 */ 24 */
25 25
26/* We calculate the autogain at the end of the transfer of a frame, at this 26/* We calculate the autogain at the end of the transfer of a frame, at this
27 moment a frame with the old settings is being transmitted, and a frame is 27 moment a frame with the old settings is being captured and transmitted. So
28 being captured with the old settings. So if we adjust the autogain we must 28 if we adjust the gain or exposure we must ignore atleast the next frame for
29 ignore atleast the 2 next frames for the new settings to come into effect 29 the new settings to come into effect before doing any other adjustments. */
30 before doing any other adjustments */ 30#define PAC_AUTOGAIN_IGNORE_FRAMES 2
31#define PAC_AUTOGAIN_IGNORE_FRAMES 3
32 31
33static const unsigned char pac_sof_marker[5] = 32static const unsigned char pac_sof_marker[5] =
34 { 0xff, 0xff, 0x00, 0xff, 0x96 }; 33 { 0xff, 0xff, 0x00, 0xff, 0x96 };
diff --git a/drivers/media/video/gspca/sn9c2028.c b/drivers/media/video/gspca/sn9c2028.c
new file mode 100644
index 000000000000..dda5fd4aa69e
--- /dev/null
+++ b/drivers/media/video/gspca/sn9c2028.c
@@ -0,0 +1,757 @@
1/*
2 * SN9C2028 library
3 *
4 * Copyright (C) 2009 Theodore Kilgore <kilgota@auburn.edu>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#define MODULE_NAME "sn9c2028"
22
23#include "gspca.h"
24
25MODULE_AUTHOR("Theodore Kilgore");
26MODULE_DESCRIPTION("Sonix SN9C2028 USB Camera Driver");
27MODULE_LICENSE("GPL");
28
29/* specific webcam descriptor */
30struct sd {
31 struct gspca_dev gspca_dev; /* !! must be the first item */
32 u8 sof_read;
33 u16 model;
34};
35
36struct init_command {
37 unsigned char instruction[6];
38 unsigned char to_read; /* length to read. 0 means no reply requested */
39};
40
41/* V4L2 controls supported by the driver */
42static struct ctrl sd_ctrls[] = {
43};
44
45/* How to change the resolution of any of the VGA cams is unknown */
46static const struct v4l2_pix_format vga_mode[] = {
47 {640, 480, V4L2_PIX_FMT_SN9C2028, V4L2_FIELD_NONE,
48 .bytesperline = 640,
49 .sizeimage = 640 * 480 * 3 / 4,
50 .colorspace = V4L2_COLORSPACE_SRGB,
51 .priv = 0},
52};
53
54/* No way to change the resolution of the CIF cams is known */
55static const struct v4l2_pix_format cif_mode[] = {
56 {352, 288, V4L2_PIX_FMT_SN9C2028, V4L2_FIELD_NONE,
57 .bytesperline = 352,
58 .sizeimage = 352 * 288 * 3 / 4,
59 .colorspace = V4L2_COLORSPACE_SRGB,
60 .priv = 0},
61};
62
63/* the bytes to write are in gspca_dev->usb_buf */
64static int sn9c2028_command(struct gspca_dev *gspca_dev, u8 *command)
65{
66 int rc;
67
68 PDEBUG(D_USBO, "sending command %02x%02x%02x%02x%02x%02x", command[0],
69 command[1], command[2], command[3], command[4], command[5]);
70
71 memcpy(gspca_dev->usb_buf, command, 6);
72 rc = usb_control_msg(gspca_dev->dev,
73 usb_sndctrlpipe(gspca_dev->dev, 0),
74 USB_REQ_GET_CONFIGURATION,
75 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
76 2, 0, gspca_dev->usb_buf, 6, 500);
77 if (rc < 0) {
78 PDEBUG(D_ERR, "command write [%02x] error %d",
79 gspca_dev->usb_buf[0], rc);
80 return rc;
81 }
82
83 return 0;
84}
85
86static int sn9c2028_read1(struct gspca_dev *gspca_dev)
87{
88 int rc;
89
90 rc = usb_control_msg(gspca_dev->dev,
91 usb_rcvctrlpipe(gspca_dev->dev, 0),
92 USB_REQ_GET_STATUS,
93 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
94 1, 0, gspca_dev->usb_buf, 1, 500);
95 if (rc != 1) {
96 PDEBUG(D_ERR, "read1 error %d", rc);
97 return (rc < 0) ? rc : -EIO;
98 }
99 PDEBUG(D_USBI, "read1 response %02x", gspca_dev->usb_buf[0]);
100 return gspca_dev->usb_buf[0];
101}
102
103static int sn9c2028_read4(struct gspca_dev *gspca_dev, u8 *reading)
104{
105 int rc;
106 rc = usb_control_msg(gspca_dev->dev,
107 usb_rcvctrlpipe(gspca_dev->dev, 0),
108 USB_REQ_GET_STATUS,
109 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
110 4, 0, gspca_dev->usb_buf, 4, 500);
111 if (rc != 4) {
112 PDEBUG(D_ERR, "read4 error %d", rc);
113 return (rc < 0) ? rc : -EIO;
114 }
115 memcpy(reading, gspca_dev->usb_buf, 4);
116 PDEBUG(D_USBI, "read4 response %02x%02x%02x%02x", reading[0],
117 reading[1], reading[2], reading[3]);
118 return rc;
119}
120
121static int sn9c2028_long_command(struct gspca_dev *gspca_dev, u8 *command)
122{
123 int i, status;
124 __u8 reading[4];
125
126 status = sn9c2028_command(gspca_dev, command);
127 if (status < 0)
128 return status;
129
130 status = -1;
131 for (i = 0; i < 256 && status < 2; i++)
132 status = sn9c2028_read1(gspca_dev);
133 if (status != 2) {
134 PDEBUG(D_ERR, "long command status read error %d", status);
135 return (status < 0) ? status : -EIO;
136 }
137
138 memset(reading, 0, 4);
139 status = sn9c2028_read4(gspca_dev, reading);
140 if (status < 0)
141 return status;
142
143 /* in general, the first byte of the response is the first byte of
144 * the command, or'ed with 8 */
145 status = sn9c2028_read1(gspca_dev);
146 if (status < 0)
147 return status;
148
149 return 0;
150}
151
152static int sn9c2028_short_command(struct gspca_dev *gspca_dev, u8 *command)
153{
154 int err_code;
155
156 err_code = sn9c2028_command(gspca_dev, command);
157 if (err_code < 0)
158 return err_code;
159
160 err_code = sn9c2028_read1(gspca_dev);
161 if (err_code < 0)
162 return err_code;
163
164 return 0;
165}
166
167/* this function is called at probe time */
168static int sd_config(struct gspca_dev *gspca_dev,
169 const struct usb_device_id *id)
170{
171 struct sd *sd = (struct sd *) gspca_dev;
172 struct cam *cam = &gspca_dev->cam;
173
174 PDEBUG(D_PROBE, "SN9C2028 camera detected (vid/pid 0x%04X:0x%04X)",
175 id->idVendor, id->idProduct);
176
177 sd->model = id->idProduct;
178
179 switch (sd->model) {
180 case 0x7005:
181 PDEBUG(D_PROBE, "Genius Smart 300 camera");
182 break;
183 case 0x8000:
184 PDEBUG(D_PROBE, "DC31VC");
185 break;
186 case 0x8001:
187 PDEBUG(D_PROBE, "Spy camera");
188 break;
189 case 0x8003:
190 PDEBUG(D_PROBE, "CIF camera");
191 break;
192 case 0x8008:
193 PDEBUG(D_PROBE, "Mini-Shotz ms-350 camera");
194 break;
195 case 0x800a:
196 PDEBUG(D_PROBE, "Vivitar 3350b type camera");
197 cam->input_flags = V4L2_IN_ST_VFLIP | V4L2_IN_ST_HFLIP;
198 break;
199 }
200
201 switch (sd->model) {
202 case 0x8000:
203 case 0x8001:
204 case 0x8003:
205 cam->cam_mode = cif_mode;
206 cam->nmodes = ARRAY_SIZE(cif_mode);
207 break;
208 default:
209 cam->cam_mode = vga_mode;
210 cam->nmodes = ARRAY_SIZE(vga_mode);
211 }
212 return 0;
213}
214
215/* this function is called at probe and resume time */
216static int sd_init(struct gspca_dev *gspca_dev)
217{
218 int status = -1;
219
220 sn9c2028_read1(gspca_dev);
221 sn9c2028_read1(gspca_dev);
222 status = sn9c2028_read1(gspca_dev);
223
224 return (status < 0) ? status : 0;
225}
226
227static int run_start_commands(struct gspca_dev *gspca_dev,
228 struct init_command *cam_commands, int n)
229{
230 int i, err_code = -1;
231
232 for (i = 0; i < n; i++) {
233 switch (cam_commands[i].to_read) {
234 case 4:
235 err_code = sn9c2028_long_command(gspca_dev,
236 cam_commands[i].instruction);
237 break;
238 case 1:
239 err_code = sn9c2028_short_command(gspca_dev,
240 cam_commands[i].instruction);
241 break;
242 case 0:
243 err_code = sn9c2028_command(gspca_dev,
244 cam_commands[i].instruction);
245 break;
246 }
247 if (err_code < 0)
248 return err_code;
249 }
250 return 0;
251}
252
253static int start_spy_cam(struct gspca_dev *gspca_dev)
254{
255 struct init_command spy_start_commands[] = {
256 {{0x0c, 0x01, 0x00, 0x00, 0x00, 0x00}, 4},
257 {{0x13, 0x20, 0x01, 0x00, 0x00, 0x00}, 4},
258 {{0x13, 0x21, 0x01, 0x00, 0x00, 0x00}, 4},
259 {{0x13, 0x22, 0x01, 0x04, 0x00, 0x00}, 4},
260 {{0x13, 0x23, 0x01, 0x03, 0x00, 0x00}, 4},
261 {{0x13, 0x24, 0x01, 0x00, 0x00, 0x00}, 4},
262 {{0x13, 0x25, 0x01, 0x16, 0x00, 0x00}, 4}, /* width 352 */
263 {{0x13, 0x26, 0x01, 0x12, 0x00, 0x00}, 4}, /* height 288 */
264 /* {{0x13, 0x27, 0x01, 0x28, 0x00, 0x00}, 4}, */
265 {{0x13, 0x27, 0x01, 0x68, 0x00, 0x00}, 4},
266 {{0x13, 0x28, 0x01, 0x09, 0x00, 0x00}, 4}, /* red gain ?*/
267 /* {{0x13, 0x28, 0x01, 0x00, 0x00, 0x00}, 4}, */
268 {{0x13, 0x29, 0x01, 0x00, 0x00, 0x00}, 4},
269 /* {{0x13, 0x29, 0x01, 0x0c, 0x00, 0x00}, 4}, */
270 {{0x13, 0x2a, 0x01, 0x00, 0x00, 0x00}, 4},
271 {{0x13, 0x2b, 0x01, 0x00, 0x00, 0x00}, 4},
272 /* {{0x13, 0x2c, 0x01, 0x02, 0x00, 0x00}, 4}, */
273 {{0x13, 0x2c, 0x01, 0x02, 0x00, 0x00}, 4},
274 {{0x13, 0x2d, 0x01, 0x02, 0x00, 0x00}, 4},
275 /* {{0x13, 0x2e, 0x01, 0x09, 0x00, 0x00}, 4}, */
276 {{0x13, 0x2e, 0x01, 0x09, 0x00, 0x00}, 4},
277 {{0x13, 0x2f, 0x01, 0x07, 0x00, 0x00}, 4},
278 {{0x12, 0x34, 0x01, 0x00, 0x00, 0x00}, 4},
279 {{0x13, 0x34, 0x01, 0xa1, 0x00, 0x00}, 4},
280 {{0x13, 0x35, 0x01, 0x00, 0x00, 0x00}, 4},
281 {{0x11, 0x02, 0x06, 0x00, 0x00, 0x00}, 4},
282 {{0x11, 0x03, 0x13, 0x00, 0x00, 0x00}, 4}, /*don't mess with*/
283 /*{{0x11, 0x04, 0x06, 0x00, 0x00, 0x00}, 4}, observed */
284 {{0x11, 0x04, 0x00, 0x00, 0x00, 0x00}, 4}, /* brighter */
285 /*{{0x11, 0x05, 0x65, 0x00, 0x00, 0x00}, 4}, observed */
286 {{0x11, 0x05, 0x00, 0x00, 0x00, 0x00}, 4}, /* brighter */
287 {{0x11, 0x06, 0xb1, 0x00, 0x00, 0x00}, 4}, /* observed */
288 {{0x11, 0x07, 0x00, 0x00, 0x00, 0x00}, 4},
289 /*{{0x11, 0x08, 0x06, 0x00, 0x00, 0x00}, 4}, observed */
290 {{0x11, 0x08, 0x0b, 0x00, 0x00, 0x00}, 4},
291 {{0x11, 0x09, 0x01, 0x00, 0x00, 0x00}, 4},
292 {{0x11, 0x0a, 0x01, 0x00, 0x00, 0x00}, 4},
293 {{0x11, 0x0b, 0x01, 0x00, 0x00, 0x00}, 4},
294 {{0x11, 0x0c, 0x01, 0x00, 0x00, 0x00}, 4},
295 {{0x11, 0x0d, 0x00, 0x00, 0x00, 0x00}, 4},
296 {{0x11, 0x0e, 0x04, 0x00, 0x00, 0x00}, 4},
297 /* {{0x11, 0x0f, 0x00, 0x00, 0x00, 0x00}, 4}, */
298 /* brightness or gain. 0 is default. 4 is good
299 * indoors at night with incandescent lighting */
300 {{0x11, 0x0f, 0x04, 0x00, 0x00, 0x00}, 4},
301 {{0x11, 0x10, 0x06, 0x00, 0x00, 0x00}, 4}, /*hstart or hoffs*/
302 {{0x11, 0x11, 0x06, 0x00, 0x00, 0x00}, 4},
303 {{0x11, 0x12, 0x00, 0x00, 0x00, 0x00}, 4},
304 {{0x11, 0x14, 0x02, 0x00, 0x00, 0x00}, 4},
305 {{0x11, 0x13, 0x01, 0x00, 0x00, 0x00}, 4},
306 /* {{0x1b, 0x02, 0x06, 0x00, 0x00, 0x00}, 1}, observed */
307 {{0x1b, 0x02, 0x11, 0x00, 0x00, 0x00}, 1}, /* brighter */
308 /* {{0x1b, 0x13, 0x01, 0x00, 0x00, 0x00}, 1}, observed */
309 {{0x1b, 0x13, 0x11, 0x00, 0x00, 0x00}, 1},
310 {{0x20, 0x34, 0xa1, 0x00, 0x00, 0x00}, 1}, /* compresses */
311 /* Camera should start to capture now. */
312 };
313
314 return run_start_commands(gspca_dev, spy_start_commands,
315 ARRAY_SIZE(spy_start_commands));
316}
317
318static int start_cif_cam(struct gspca_dev *gspca_dev)
319{
320 struct init_command cif_start_commands[] = {
321 {{0x0c, 0x01, 0x00, 0x00, 0x00, 0x00}, 4},
322 /* The entire sequence below seems redundant */
323 /* {{0x13, 0x20, 0x01, 0x00, 0x00, 0x00}, 4},
324 {{0x13, 0x21, 0x01, 0x00, 0x00, 0x00}, 4},
325 {{0x13, 0x22, 0x01, 0x06, 0x00, 0x00}, 4},
326 {{0x13, 0x23, 0x01, 0x02, 0x00, 0x00}, 4},
327 {{0x13, 0x24, 0x01, 0x00, 0x00, 0x00}, 4},
328 {{0x13, 0x25, 0x01, 0x16, 0x00, 0x00}, 4}, width?
329 {{0x13, 0x26, 0x01, 0x12, 0x00, 0x00}, 4}, height?
330 {{0x13, 0x27, 0x01, 0x68, 0x00, 0x00}, 4}, subsample?
331 {{0x13, 0x28, 0x01, 0x00, 0x00, 0x00}, 4},
332 {{0x13, 0x29, 0x01, 0x20, 0x00, 0x00}, 4},
333 {{0x13, 0x2a, 0x01, 0x00, 0x00, 0x00}, 4},
334 {{0x13, 0x2b, 0x01, 0x00, 0x00, 0x00}, 4},
335 {{0x13, 0x2c, 0x01, 0x02, 0x00, 0x00}, 4},
336 {{0x13, 0x2d, 0x01, 0x03, 0x00, 0x00}, 4},
337 {{0x13, 0x2e, 0x01, 0x0f, 0x00, 0x00}, 4},
338 {{0x13, 0x2f, 0x01, 0x0c, 0x00, 0x00}, 4},
339 {{0x12, 0x34, 0x01, 0x00, 0x00, 0x00}, 4},
340 {{0x13, 0x34, 0x01, 0xa1, 0x00, 0x00}, 4},
341 {{0x13, 0x35, 0x01, 0x00, 0x00, 0x00}, 4},*/
342 {{0x1b, 0x21, 0x00, 0x00, 0x00, 0x00}, 1},
343 {{0x1b, 0x17, 0x00, 0x00, 0x00, 0x00}, 1},
344 {{0x1b, 0x19, 0x00, 0x00, 0x00, 0x00}, 1},
345 {{0x1b, 0x02, 0x06, 0x00, 0x00, 0x00}, 1},
346 {{0x1b, 0x03, 0x5a, 0x00, 0x00, 0x00}, 1},
347 {{0x1b, 0x04, 0x27, 0x00, 0x00, 0x00}, 1},
348 {{0x1b, 0x05, 0x01, 0x00, 0x00, 0x00}, 1},
349 {{0x1b, 0x12, 0x14, 0x00, 0x00, 0x00}, 1},
350 {{0x1b, 0x13, 0x00, 0x00, 0x00, 0x00}, 1},
351 {{0x1b, 0x14, 0x00, 0x00, 0x00, 0x00}, 1},
352 {{0x1b, 0x15, 0x00, 0x00, 0x00, 0x00}, 1},
353 {{0x1b, 0x16, 0x00, 0x00, 0x00, 0x00}, 1},
354 {{0x1b, 0x77, 0xa2, 0x00, 0x00, 0x00}, 1},
355 {{0x1b, 0x06, 0x0f, 0x00, 0x00, 0x00}, 1},
356 {{0x1b, 0x07, 0x14, 0x00, 0x00, 0x00}, 1},
357 {{0x1b, 0x08, 0x0f, 0x00, 0x00, 0x00}, 1},
358 {{0x1b, 0x09, 0x10, 0x00, 0x00, 0x00}, 1},
359 {{0x1b, 0x0e, 0x00, 0x00, 0x00, 0x00}, 1},
360 {{0x1b, 0x0f, 0x00, 0x00, 0x00, 0x00}, 1},
361 {{0x1b, 0x12, 0x07, 0x00, 0x00, 0x00}, 1},
362 {{0x1b, 0x10, 0x1f, 0x00, 0x00, 0x00}, 1},
363 {{0x1b, 0x11, 0x01, 0x00, 0x00, 0x00}, 1},
364 {{0x13, 0x25, 0x01, 0x16, 0x00, 0x00}, 1}, /* width/8 */
365 {{0x13, 0x26, 0x01, 0x12, 0x00, 0x00}, 1}, /* height/8 */
366 /* {{0x13, 0x27, 0x01, 0x68, 0x00, 0x00}, 4}, subsample?
367 * {{0x13, 0x28, 0x01, 0x1e, 0x00, 0x00}, 4}, does nothing
368 * {{0x13, 0x27, 0x01, 0x20, 0x00, 0x00}, 4}, */
369 /* {{0x13, 0x29, 0x01, 0x22, 0x00, 0x00}, 4},
370 * causes subsampling
371 * but not a change in the resolution setting! */
372 {{0x13, 0x2c, 0x01, 0x02, 0x00, 0x00}, 4},
373 {{0x13, 0x2d, 0x01, 0x01, 0x00, 0x00}, 4},
374 {{0x13, 0x2e, 0x01, 0x08, 0x00, 0x00}, 4},
375 {{0x13, 0x2f, 0x01, 0x06, 0x00, 0x00}, 4},
376 {{0x13, 0x28, 0x01, 0x00, 0x00, 0x00}, 4},
377 {{0x1b, 0x04, 0x6d, 0x00, 0x00, 0x00}, 1},
378 {{0x1b, 0x05, 0x03, 0x00, 0x00, 0x00}, 1},
379 {{0x20, 0x36, 0x06, 0x00, 0x00, 0x00}, 1},
380 {{0x1b, 0x0e, 0x01, 0x00, 0x00, 0x00}, 1},
381 {{0x12, 0x27, 0x01, 0x00, 0x00, 0x00}, 4},
382 {{0x1b, 0x0f, 0x00, 0x00, 0x00, 0x00}, 1},
383 {{0x20, 0x36, 0x05, 0x00, 0x00, 0x00}, 1},
384 {{0x1b, 0x10, 0x0f, 0x00, 0x00, 0x00}, 1},
385 {{0x1b, 0x02, 0x06, 0x00, 0x00, 0x00}, 1},
386 {{0x1b, 0x11, 0x01, 0x00, 0x00, 0x00}, 1},
387 {{0x20, 0x34, 0xa1, 0x00, 0x00, 0x00}, 1},/* use compression */
388 /* Camera should start to capture now. */
389 };
390
391 return run_start_commands(gspca_dev, cif_start_commands,
392 ARRAY_SIZE(cif_start_commands));
393}
394
395static int start_ms350_cam(struct gspca_dev *gspca_dev)
396{
397 struct init_command ms350_start_commands[] = {
398 {{0x0c, 0x01, 0x00, 0x00, 0x00, 0x00}, 4},
399 {{0x16, 0x01, 0x00, 0x00, 0x00, 0x00}, 4},
400 {{0x13, 0x20, 0x01, 0x00, 0x00, 0x00}, 4},
401 {{0x13, 0x21, 0x01, 0x00, 0x00, 0x00}, 4},
402 {{0x13, 0x22, 0x01, 0x04, 0x00, 0x00}, 4},
403 {{0x13, 0x23, 0x01, 0x03, 0x00, 0x00}, 4},
404 {{0x13, 0x24, 0x01, 0x00, 0x00, 0x00}, 4},
405 {{0x13, 0x25, 0x01, 0x16, 0x00, 0x00}, 4},
406 {{0x13, 0x26, 0x01, 0x12, 0x00, 0x00}, 4},
407 {{0x13, 0x27, 0x01, 0x28, 0x00, 0x00}, 4},
408 {{0x13, 0x28, 0x01, 0x09, 0x00, 0x00}, 4},
409 {{0x13, 0x29, 0x01, 0x00, 0x00, 0x00}, 4},
410 {{0x13, 0x2a, 0x01, 0x00, 0x00, 0x00}, 4},
411 {{0x13, 0x2b, 0x01, 0x00, 0x00, 0x00}, 4},
412 {{0x13, 0x2c, 0x01, 0x02, 0x00, 0x00}, 4},
413 {{0x13, 0x2d, 0x01, 0x03, 0x00, 0x00}, 4},
414 {{0x13, 0x2e, 0x01, 0x0f, 0x00, 0x00}, 4},
415 {{0x13, 0x2f, 0x01, 0x0c, 0x00, 0x00}, 4},
416 {{0x12, 0x34, 0x01, 0x00, 0x00, 0x00}, 4},
417 {{0x13, 0x34, 0x01, 0xa1, 0x00, 0x00}, 4},
418 {{0x13, 0x35, 0x01, 0x00, 0x00, 0x00}, 4},
419 {{0x11, 0x00, 0x01, 0x00, 0x00, 0x00}, 4},
420 {{0x11, 0x01, 0x70, 0x00, 0x00, 0x00}, 4},
421 {{0x11, 0x02, 0x05, 0x00, 0x00, 0x00}, 4},
422 {{0x11, 0x03, 0x5d, 0x00, 0x00, 0x00}, 4},
423 {{0x11, 0x04, 0x07, 0x00, 0x00, 0x00}, 4},
424 {{0x11, 0x05, 0x25, 0x00, 0x00, 0x00}, 4},
425 {{0x11, 0x06, 0x00, 0x00, 0x00, 0x00}, 4},
426 {{0x11, 0x07, 0x09, 0x00, 0x00, 0x00}, 4},
427 {{0x11, 0x08, 0x01, 0x00, 0x00, 0x00}, 4},
428 {{0x11, 0x09, 0x00, 0x00, 0x00, 0x00}, 4},
429 {{0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, 4},
430 {{0x11, 0x0b, 0x01, 0x00, 0x00, 0x00}, 4},
431 {{0x11, 0x0c, 0x00, 0x00, 0x00, 0x00}, 4},
432 {{0x11, 0x0d, 0x0c, 0x00, 0x00, 0x00}, 4},
433 {{0x11, 0x0e, 0x01, 0x00, 0x00, 0x00}, 4},
434 {{0x11, 0x0f, 0x00, 0x00, 0x00, 0x00}, 4},
435 {{0x11, 0x10, 0x00, 0x00, 0x00, 0x00}, 4},
436 {{0x11, 0x11, 0x00, 0x00, 0x00, 0x00}, 4},
437 {{0x11, 0x12, 0x00, 0x00, 0x00, 0x00}, 4},
438 {{0x11, 0x13, 0x63, 0x00, 0x00, 0x00}, 4},
439 {{0x11, 0x15, 0x70, 0x00, 0x00, 0x00}, 4},
440 {{0x11, 0x18, 0x00, 0x00, 0x00, 0x00}, 4},
441 {{0x11, 0x11, 0x01, 0x00, 0x00, 0x00}, 4},
442 {{0x13, 0x25, 0x01, 0x28, 0x00, 0x00}, 4}, /* width */
443 {{0x13, 0x26, 0x01, 0x1e, 0x00, 0x00}, 4}, /* height */
444 {{0x13, 0x28, 0x01, 0x09, 0x00, 0x00}, 4}, /* vstart? */
445 {{0x13, 0x27, 0x01, 0x28, 0x00, 0x00}, 4},
446 {{0x13, 0x29, 0x01, 0x40, 0x00, 0x00}, 4}, /* hstart? */
447 {{0x13, 0x2c, 0x01, 0x02, 0x00, 0x00}, 4},
448 {{0x13, 0x2d, 0x01, 0x03, 0x00, 0x00}, 4},
449 {{0x13, 0x2e, 0x01, 0x0f, 0x00, 0x00}, 4},
450 {{0x13, 0x2f, 0x01, 0x0c, 0x00, 0x00}, 4},
451 {{0x1b, 0x02, 0x05, 0x00, 0x00, 0x00}, 1},
452 {{0x1b, 0x11, 0x01, 0x00, 0x00, 0x00}, 1},
453 {{0x20, 0x18, 0x00, 0x00, 0x00, 0x00}, 1},
454 {{0x1b, 0x02, 0x0a, 0x00, 0x00, 0x00}, 1},
455 {{0x1b, 0x11, 0x01, 0x00, 0x00, 0x00}, 0},
456 /* Camera should start to capture now. */
457 };
458
459 return run_start_commands(gspca_dev, ms350_start_commands,
460 ARRAY_SIZE(ms350_start_commands));
461}
462
463static int start_genius_cam(struct gspca_dev *gspca_dev)
464{
465 struct init_command genius_start_commands[] = {
466 {{0x0c, 0x01, 0x00, 0x00, 0x00, 0x00}, 4},
467 {{0x16, 0x01, 0x00, 0x00, 0x00, 0x00}, 4},
468 {{0x10, 0x00, 0x00, 0x00, 0x00, 0x00}, 4},
469 {{0x13, 0x25, 0x01, 0x16, 0x00, 0x00}, 4},
470 {{0x13, 0x26, 0x01, 0x12, 0x00, 0x00}, 4},
471 /* "preliminary" width and height settings */
472 {{0x13, 0x28, 0x01, 0x0e, 0x00, 0x00}, 4},
473 {{0x13, 0x27, 0x01, 0x20, 0x00, 0x00}, 4},
474 {{0x13, 0x29, 0x01, 0x22, 0x00, 0x00}, 4},
475 {{0x13, 0x2c, 0x01, 0x02, 0x00, 0x00}, 4},
476 {{0x13, 0x2d, 0x01, 0x02, 0x00, 0x00}, 4},
477 {{0x13, 0x2e, 0x01, 0x09, 0x00, 0x00}, 4},
478 {{0x13, 0x2f, 0x01, 0x07, 0x00, 0x00}, 4},
479 {{0x11, 0x20, 0x00, 0x00, 0x00, 0x00}, 4},
480 {{0x11, 0x21, 0x2d, 0x00, 0x00, 0x00}, 4},
481 {{0x11, 0x22, 0x00, 0x00, 0x00, 0x00}, 4},
482 {{0x11, 0x23, 0x03, 0x00, 0x00, 0x00}, 4},
483 {{0x11, 0x10, 0x00, 0x00, 0x00, 0x00}, 4},
484 {{0x11, 0x11, 0x64, 0x00, 0x00, 0x00}, 4},
485 {{0x11, 0x12, 0x00, 0x00, 0x00, 0x00}, 4},
486 {{0x11, 0x13, 0x91, 0x00, 0x00, 0x00}, 4},
487 {{0x11, 0x14, 0x01, 0x00, 0x00, 0x00}, 4},
488 {{0x11, 0x15, 0x20, 0x00, 0x00, 0x00}, 4},
489 {{0x11, 0x16, 0x01, 0x00, 0x00, 0x00}, 4},
490 {{0x11, 0x17, 0x60, 0x00, 0x00, 0x00}, 4},
491 {{0x11, 0x20, 0x00, 0x00, 0x00, 0x00}, 4},
492 {{0x11, 0x21, 0x2d, 0x00, 0x00, 0x00}, 4},
493 {{0x11, 0x22, 0x00, 0x00, 0x00, 0x00}, 4},
494 {{0x11, 0x23, 0x03, 0x00, 0x00, 0x00}, 4},
495 {{0x11, 0x25, 0x00, 0x00, 0x00, 0x00}, 4},
496 {{0x11, 0x26, 0x02, 0x00, 0x00, 0x00}, 4},
497 {{0x11, 0x27, 0x88, 0x00, 0x00, 0x00}, 4},
498 {{0x11, 0x30, 0x38, 0x00, 0x00, 0x00}, 4},
499 {{0x11, 0x31, 0x2a, 0x00, 0x00, 0x00}, 4},
500 {{0x11, 0x32, 0x2a, 0x00, 0x00, 0x00}, 4},
501 {{0x11, 0x33, 0x2a, 0x00, 0x00, 0x00}, 4},
502 {{0x11, 0x34, 0x02, 0x00, 0x00, 0x00}, 4},
503 {{0x11, 0x5b, 0x0a, 0x00, 0x00, 0x00}, 4},
504 {{0x13, 0x25, 0x01, 0x28, 0x00, 0x00}, 4}, /* real width */
505 {{0x13, 0x26, 0x01, 0x1e, 0x00, 0x00}, 4}, /* real height */
506 {{0x13, 0x28, 0x01, 0x0e, 0x00, 0x00}, 4},
507 {{0x13, 0x27, 0x01, 0x20, 0x00, 0x00}, 4},
508 {{0x13, 0x29, 0x01, 0x62, 0x00, 0x00}, 4},
509 {{0x13, 0x2c, 0x01, 0x02, 0x00, 0x00}, 4},
510 {{0x13, 0x2d, 0x01, 0x03, 0x00, 0x00}, 4},
511 {{0x13, 0x2e, 0x01, 0x0f, 0x00, 0x00}, 4},
512 {{0x13, 0x2f, 0x01, 0x0c, 0x00, 0x00}, 4},
513 {{0x11, 0x20, 0x00, 0x00, 0x00, 0x00}, 4},
514 {{0x11, 0x21, 0x2a, 0x00, 0x00, 0x00}, 4},
515 {{0x11, 0x22, 0x00, 0x00, 0x00, 0x00}, 4},
516 {{0x11, 0x23, 0x28, 0x00, 0x00, 0x00}, 4},
517 {{0x11, 0x10, 0x00, 0x00, 0x00, 0x00}, 4},
518 {{0x11, 0x11, 0x04, 0x00, 0x00, 0x00}, 4},
519 {{0x11, 0x12, 0x00, 0x00, 0x00, 0x00}, 4},
520 {{0x11, 0x13, 0x03, 0x00, 0x00, 0x00}, 4},
521 {{0x11, 0x14, 0x01, 0x00, 0x00, 0x00}, 4},
522 {{0x11, 0x15, 0xe0, 0x00, 0x00, 0x00}, 4},
523 {{0x11, 0x16, 0x02, 0x00, 0x00, 0x00}, 4},
524 {{0x11, 0x17, 0x80, 0x00, 0x00, 0x00}, 4},
525 {{0x1c, 0x20, 0x00, 0x2a, 0x00, 0x00}, 1},
526 {{0x1c, 0x20, 0x00, 0x2a, 0x00, 0x00}, 1},
527 {{0x20, 0x34, 0xa1, 0x00, 0x00, 0x00}, 0}
528 /* Camera should start to capture now. */
529 };
530
531 return run_start_commands(gspca_dev, genius_start_commands,
532 ARRAY_SIZE(genius_start_commands));
533}
534
535static int start_vivitar_cam(struct gspca_dev *gspca_dev)
536{
537 struct init_command vivitar_start_commands[] = {
538 {{0x0c, 0x01, 0x00, 0x00, 0x00, 0x00}, 4},
539 {{0x13, 0x20, 0x01, 0x00, 0x00, 0x00}, 4},
540 {{0x13, 0x21, 0x01, 0x00, 0x00, 0x00}, 4},
541 {{0x13, 0x22, 0x01, 0x01, 0x00, 0x00}, 4},
542 {{0x13, 0x23, 0x01, 0x01, 0x00, 0x00}, 4},
543 {{0x13, 0x24, 0x01, 0x00, 0x00, 0x00}, 4},
544 {{0x13, 0x25, 0x01, 0x28, 0x00, 0x00}, 4},
545 {{0x13, 0x26, 0x01, 0x1e, 0x00, 0x00}, 4},
546 {{0x13, 0x27, 0x01, 0x20, 0x00, 0x00}, 4},
547 {{0x13, 0x28, 0x01, 0x0a, 0x00, 0x00}, 4},
548 /*
549 * Above is changed from OEM 0x0b. Fixes Bayer tiling.
550 * Presumably gives a vertical shift of one row.
551 */
552 {{0x13, 0x29, 0x01, 0x20, 0x00, 0x00}, 4},
553 /* Above seems to do horizontal shift. */
554 {{0x13, 0x2a, 0x01, 0x00, 0x00, 0x00}, 4},
555 {{0x13, 0x2b, 0x01, 0x00, 0x00, 0x00}, 4},
556 {{0x13, 0x2c, 0x01, 0x02, 0x00, 0x00}, 4},
557 {{0x13, 0x2d, 0x01, 0x03, 0x00, 0x00}, 4},
558 {{0x13, 0x2e, 0x01, 0x0f, 0x00, 0x00}, 4},
559 {{0x13, 0x2f, 0x01, 0x0c, 0x00, 0x00}, 4},
560 /* Above three commands seem to relate to brightness. */
561 {{0x12, 0x34, 0x01, 0x00, 0x00, 0x00}, 4},
562 {{0x13, 0x34, 0x01, 0xa1, 0x00, 0x00}, 4},
563 {{0x13, 0x35, 0x01, 0x00, 0x00, 0x00}, 4},
564 {{0x1b, 0x12, 0x80, 0x00, 0x00, 0x00}, 1},
565 {{0x1b, 0x01, 0x77, 0x00, 0x00, 0x00}, 1},
566 {{0x1b, 0x02, 0x3a, 0x00, 0x00, 0x00}, 1},
567 {{0x1b, 0x12, 0x78, 0x00, 0x00, 0x00}, 1},
568 {{0x1b, 0x13, 0x00, 0x00, 0x00, 0x00}, 1},
569 {{0x1b, 0x14, 0x80, 0x00, 0x00, 0x00}, 1},
570 {{0x1b, 0x15, 0x34, 0x00, 0x00, 0x00}, 1},
571 {{0x1b, 0x1b, 0x04, 0x00, 0x00, 0x00}, 1},
572 {{0x1b, 0x20, 0x44, 0x00, 0x00, 0x00}, 1},
573 {{0x1b, 0x23, 0xee, 0x00, 0x00, 0x00}, 1},
574 {{0x1b, 0x26, 0xa0, 0x00, 0x00, 0x00}, 1},
575 {{0x1b, 0x27, 0x9a, 0x00, 0x00, 0x00}, 1},
576 {{0x1b, 0x28, 0xa0, 0x00, 0x00, 0x00}, 1},
577 {{0x1b, 0x29, 0x30, 0x00, 0x00, 0x00}, 1},
578 {{0x1b, 0x2a, 0x80, 0x00, 0x00, 0x00}, 1},
579 {{0x1b, 0x2b, 0x00, 0x00, 0x00, 0x00}, 1},
580 {{0x1b, 0x2f, 0x3d, 0x00, 0x00, 0x00}, 1},
581 {{0x1b, 0x30, 0x24, 0x00, 0x00, 0x00}, 1},
582 {{0x1b, 0x32, 0x86, 0x00, 0x00, 0x00}, 1},
583 {{0x1b, 0x60, 0xa9, 0x00, 0x00, 0x00}, 1},
584 {{0x1b, 0x61, 0x42, 0x00, 0x00, 0x00}, 1},
585 {{0x1b, 0x65, 0x00, 0x00, 0x00, 0x00}, 1},
586 {{0x1b, 0x69, 0x38, 0x00, 0x00, 0x00}, 1},
587 {{0x1b, 0x6f, 0x88, 0x00, 0x00, 0x00}, 1},
588 {{0x1b, 0x70, 0x0b, 0x00, 0x00, 0x00}, 1},
589 {{0x1b, 0x71, 0x00, 0x00, 0x00, 0x00}, 1},
590 {{0x1b, 0x74, 0x21, 0x00, 0x00, 0x00}, 1},
591 {{0x1b, 0x75, 0x86, 0x00, 0x00, 0x00}, 1},
592 {{0x1b, 0x76, 0x00, 0x00, 0x00, 0x00}, 1},
593 {{0x1b, 0x7d, 0xf3, 0x00, 0x00, 0x00}, 1},
594 {{0x1b, 0x17, 0x1c, 0x00, 0x00, 0x00}, 1},
595 {{0x1b, 0x18, 0xc0, 0x00, 0x00, 0x00}, 1},
596 {{0x1b, 0x19, 0x05, 0x00, 0x00, 0x00}, 1},
597 {{0x1b, 0x1a, 0xf6, 0x00, 0x00, 0x00}, 1},
598 /* {{0x13, 0x25, 0x01, 0x28, 0x00, 0x00}, 4},
599 {{0x13, 0x26, 0x01, 0x1e, 0x00, 0x00}, 4},
600 {{0x13, 0x28, 0x01, 0x0b, 0x00, 0x00}, 4}, */
601 {{0x20, 0x36, 0x06, 0x00, 0x00, 0x00}, 1},
602 {{0x1b, 0x10, 0x26, 0x00, 0x00, 0x00}, 1},
603 {{0x12, 0x27, 0x01, 0x00, 0x00, 0x00}, 4},
604 {{0x1b, 0x76, 0x03, 0x00, 0x00, 0x00}, 1},
605 {{0x20, 0x36, 0x05, 0x00, 0x00, 0x00}, 1},
606 {{0x1b, 0x00, 0x3f, 0x00, 0x00, 0x00}, 1},
607 /* Above is brightness; OEM driver setting is 0x10 */
608 {{0x12, 0x27, 0x01, 0x00, 0x00, 0x00}, 4},
609 {{0x20, 0x29, 0x30, 0x00, 0x00, 0x00}, 1},
610 {{0x20, 0x34, 0xa1, 0x00, 0x00, 0x00}, 1}
611 };
612
613 return run_start_commands(gspca_dev, vivitar_start_commands,
614 ARRAY_SIZE(vivitar_start_commands));
615}
616
617static int sd_start(struct gspca_dev *gspca_dev)
618{
619 struct sd *sd = (struct sd *) gspca_dev;
620 int err_code;
621
622 sd->sof_read = 0;
623
624 switch (sd->model) {
625 case 0x7005:
626 err_code = start_genius_cam(gspca_dev);
627 break;
628 case 0x8001:
629 err_code = start_spy_cam(gspca_dev);
630 break;
631 case 0x8003:
632 err_code = start_cif_cam(gspca_dev);
633 break;
634 case 0x8008:
635 err_code = start_ms350_cam(gspca_dev);
636 break;
637 case 0x800a:
638 err_code = start_vivitar_cam(gspca_dev);
639 break;
640 default:
641 PDEBUG(D_ERR, "Starting unknown camera, please report this");
642 return -ENXIO;
643 }
644
645 return err_code;
646}
647
648static void sd_stopN(struct gspca_dev *gspca_dev)
649{
650 int result;
651 __u8 data[6];
652
653 result = sn9c2028_read1(gspca_dev);
654 if (result < 0)
655 PDEBUG(D_ERR, "Camera Stop read failed");
656
657 memset(data, 0, 6);
658 data[0] = 0x14;
659 result = sn9c2028_command(gspca_dev, data);
660 if (result < 0)
661 PDEBUG(D_ERR, "Camera Stop command failed");
662}
663
664/* Include sn9c2028 sof detection functions */
665#include "sn9c2028.h"
666
667static void sd_pkt_scan(struct gspca_dev *gspca_dev,
668 __u8 *data, /* isoc packet */
669 int len) /* iso packet length */
670{
671 unsigned char *sof;
672
673 sof = sn9c2028_find_sof(gspca_dev, data, len);
674 if (sof) {
675 int n;
676
677 /* finish decoding current frame */
678 n = sof - data;
679 if (n > sizeof sn9c2028_sof_marker)
680 n -= sizeof sn9c2028_sof_marker;
681 else
682 n = 0;
683 gspca_frame_add(gspca_dev, LAST_PACKET, data, n);
684 /* Start next frame. */
685 gspca_frame_add(gspca_dev, FIRST_PACKET,
686 sn9c2028_sof_marker, sizeof sn9c2028_sof_marker);
687 len -= sof - data;
688 data = sof;
689 }
690 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
691}
692
693/* sub-driver description */
694static const struct sd_desc sd_desc = {
695 .name = MODULE_NAME,
696 .ctrls = sd_ctrls,
697 .nctrls = ARRAY_SIZE(sd_ctrls),
698 .config = sd_config,
699 .init = sd_init,
700 .start = sd_start,
701 .stopN = sd_stopN,
702 .pkt_scan = sd_pkt_scan,
703};
704
705/* -- module initialisation -- */
706static const __devinitdata struct usb_device_id device_table[] = {
707 {USB_DEVICE(0x0458, 0x7005)}, /* Genius Smart 300, version 2 */
708 /* The Genius Smart is untested. I can't find an owner ! */
709 /* {USB_DEVICE(0x0c45, 0x8000)}, DC31VC, Don't know this camera */
710 {USB_DEVICE(0x0c45, 0x8001)}, /* Wild Planet digital spy cam */
711 {USB_DEVICE(0x0c45, 0x8003)}, /* Several small CIF cameras */
712 /* {USB_DEVICE(0x0c45, 0x8006)}, Unknown VGA camera */
713 {USB_DEVICE(0x0c45, 0x8008)}, /* Mini-Shotz ms-350 */
714 {USB_DEVICE(0x0c45, 0x800a)}, /* Vivicam 3350B */
715 {}
716};
717MODULE_DEVICE_TABLE(usb, device_table);
718
719/* -- device connect -- */
720static int sd_probe(struct usb_interface *intf,
721 const struct usb_device_id *id)
722{
723 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
724 THIS_MODULE);
725}
726
727static struct usb_driver sd_driver = {
728 .name = MODULE_NAME,
729 .id_table = device_table,
730 .probe = sd_probe,
731 .disconnect = gspca_disconnect,
732#ifdef CONFIG_PM
733 .suspend = gspca_suspend,
734 .resume = gspca_resume,
735#endif
736};
737
738/* -- module insert / remove -- */
739static int __init sd_mod_init(void)
740{
741 int ret;
742
743 ret = usb_register(&sd_driver);
744 if (ret < 0)
745 return ret;
746 PDEBUG(D_PROBE, "registered");
747 return 0;
748}
749
750static void __exit sd_mod_exit(void)
751{
752 usb_deregister(&sd_driver);
753 PDEBUG(D_PROBE, "deregistered");
754}
755
756module_init(sd_mod_init);
757module_exit(sd_mod_exit);
diff --git a/drivers/media/video/gspca/sn9c2028.h b/drivers/media/video/gspca/sn9c2028.h
new file mode 100644
index 000000000000..8fd1d3e05665
--- /dev/null
+++ b/drivers/media/video/gspca/sn9c2028.h
@@ -0,0 +1,51 @@
1/*
2 * SN9C2028 common functions
3 *
4 * Copyright (C) 2009 Theodore Kilgore <kilgota@auburn,edu>
5 *
6 * Based closely upon the file gspca/pac_common.h
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24static const unsigned char sn9c2028_sof_marker[5] =
25 { 0xff, 0xff, 0x00, 0xc4, 0xc4 };
26
27static unsigned char *sn9c2028_find_sof(struct gspca_dev *gspca_dev,
28 unsigned char *m, int len)
29{
30 struct sd *sd = (struct sd *) gspca_dev;
31 int i;
32
33 /* Search for the SOF marker (fixed part) in the header */
34 for (i = 0; i < len; i++) {
35 if (m[i] == sn9c2028_sof_marker[sd->sof_read]) {
36 sd->sof_read++;
37 if (sd->sof_read == sizeof(sn9c2028_sof_marker)) {
38 PDEBUG(D_FRAM,
39 "SOF found, bytes to analyze: %u."
40 " Frame starts at byte #%u",
41 len, i + 1);
42 sd->sof_read = 0;
43 return m + i + 1;
44 }
45 } else {
46 sd->sof_read = 0;
47 }
48 }
49
50 return NULL;
51}
diff --git a/drivers/media/video/gspca/sn9c20x.c b/drivers/media/video/gspca/sn9c20x.c
index 0ca1c06652b1..4a1bc08f82b9 100644
--- a/drivers/media/video/gspca/sn9c20x.c
+++ b/drivers/media/video/gspca/sn9c20x.c
@@ -129,7 +129,7 @@ static int sd_getexposure(struct gspca_dev *gspca_dev, s32 *val);
129static int sd_setautoexposure(struct gspca_dev *gspca_dev, s32 val); 129static int sd_setautoexposure(struct gspca_dev *gspca_dev, s32 val);
130static int sd_getautoexposure(struct gspca_dev *gspca_dev, s32 *val); 130static int sd_getautoexposure(struct gspca_dev *gspca_dev, s32 *val);
131 131
132static struct ctrl sd_ctrls[] = { 132static const struct ctrl sd_ctrls[] = {
133 { 133 {
134#define BRIGHTNESS_IDX 0 134#define BRIGHTNESS_IDX 0
135 { 135 {
@@ -1506,36 +1506,36 @@ static int set_cmatrix(struct gspca_dev *gspca_dev)
1506 struct sd *sd = (struct sd *) gspca_dev; 1506 struct sd *sd = (struct sd *) gspca_dev;
1507 s32 hue_coord, hue_index = 180 + sd->hue; 1507 s32 hue_coord, hue_index = 180 + sd->hue;
1508 u8 cmatrix[21]; 1508 u8 cmatrix[21];
1509 memset(cmatrix, 0, 21);
1510 1509
1510 memset(cmatrix, 0, sizeof cmatrix);
1511 cmatrix[2] = (sd->contrast * 0x25 / 0x100) + 0x26; 1511 cmatrix[2] = (sd->contrast * 0x25 / 0x100) + 0x26;
1512 cmatrix[0] = 0x13 + (cmatrix[2] - 0x26) * 0x13 / 0x25; 1512 cmatrix[0] = 0x13 + (cmatrix[2] - 0x26) * 0x13 / 0x25;
1513 cmatrix[4] = 0x07 + (cmatrix[2] - 0x26) * 0x07 / 0x25; 1513 cmatrix[4] = 0x07 + (cmatrix[2] - 0x26) * 0x07 / 0x25;
1514 cmatrix[18] = sd->brightness - 0x80; 1514 cmatrix[18] = sd->brightness - 0x80;
1515 1515
1516 hue_coord = (hsv_red_x[hue_index] * sd->saturation) >> 8; 1516 hue_coord = (hsv_red_x[hue_index] * sd->saturation) >> 8;
1517 cmatrix[6] = (unsigned char)(hue_coord & 0xff); 1517 cmatrix[6] = hue_coord;
1518 cmatrix[7] = (unsigned char)((hue_coord >> 8) & 0x0f); 1518 cmatrix[7] = (hue_coord >> 8) & 0x0f;
1519 1519
1520 hue_coord = (hsv_red_y[hue_index] * sd->saturation) >> 8; 1520 hue_coord = (hsv_red_y[hue_index] * sd->saturation) >> 8;
1521 cmatrix[8] = (unsigned char)(hue_coord & 0xff); 1521 cmatrix[8] = hue_coord;
1522 cmatrix[9] = (unsigned char)((hue_coord >> 8) & 0x0f); 1522 cmatrix[9] = (hue_coord >> 8) & 0x0f;
1523 1523
1524 hue_coord = (hsv_green_x[hue_index] * sd->saturation) >> 8; 1524 hue_coord = (hsv_green_x[hue_index] * sd->saturation) >> 8;
1525 cmatrix[10] = (unsigned char)(hue_coord & 0xff); 1525 cmatrix[10] = hue_coord;
1526 cmatrix[11] = (unsigned char)((hue_coord >> 8) & 0x0f); 1526 cmatrix[11] = (hue_coord >> 8) & 0x0f;
1527 1527
1528 hue_coord = (hsv_green_y[hue_index] * sd->saturation) >> 8; 1528 hue_coord = (hsv_green_y[hue_index] * sd->saturation) >> 8;
1529 cmatrix[12] = (unsigned char)(hue_coord & 0xff); 1529 cmatrix[12] = hue_coord;
1530 cmatrix[13] = (unsigned char)((hue_coord >> 8) & 0x0f); 1530 cmatrix[13] = (hue_coord >> 8) & 0x0f;
1531 1531
1532 hue_coord = (hsv_blue_x[hue_index] * sd->saturation) >> 8; 1532 hue_coord = (hsv_blue_x[hue_index] * sd->saturation) >> 8;
1533 cmatrix[14] = (unsigned char)(hue_coord & 0xff); 1533 cmatrix[14] = hue_coord;
1534 cmatrix[15] = (unsigned char)((hue_coord >> 8) & 0x0f); 1534 cmatrix[15] = (hue_coord >> 8) & 0x0f;
1535 1535
1536 hue_coord = (hsv_blue_y[hue_index] * sd->saturation) >> 8; 1536 hue_coord = (hsv_blue_y[hue_index] * sd->saturation) >> 8;
1537 cmatrix[16] = (unsigned char)(hue_coord & 0xff); 1537 cmatrix[16] = hue_coord;
1538 cmatrix[17] = (unsigned char)((hue_coord >> 8) & 0x0f); 1538 cmatrix[17] = (hue_coord >> 8) & 0x0f;
1539 1539
1540 return reg_w(gspca_dev, 0x10e1, cmatrix, 21); 1540 return reg_w(gspca_dev, 0x10e1, cmatrix, 21);
1541} 1541}
@@ -2015,6 +2015,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
2015 default: 2015 default:
2016 cam->cam_mode = vga_mode; 2016 cam->cam_mode = vga_mode;
2017 cam->nmodes = ARRAY_SIZE(vga_mode); 2017 cam->nmodes = ARRAY_SIZE(vga_mode);
2018 break;
2018 } 2019 }
2019 2020
2020 sd->old_step = 0; 2021 sd->old_step = 0;
@@ -2319,7 +2320,7 @@ static void do_autogain(struct gspca_dev *gspca_dev, u16 avg_lum)
2319 } 2320 }
2320 } 2321 }
2321 if (avg_lum > MAX_AVG_LUM) { 2322 if (avg_lum > MAX_AVG_LUM) {
2322 if (sd->gain >= 1) { 2323 if (sd->gain > 0) {
2323 sd->gain--; 2324 sd->gain--;
2324 set_gain(gspca_dev); 2325 set_gain(gspca_dev);
2325 } 2326 }
@@ -2347,7 +2348,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
2347{ 2348{
2348 struct sd *sd = (struct sd *) gspca_dev; 2349 struct sd *sd = (struct sd *) gspca_dev;
2349 int avg_lum; 2350 int avg_lum;
2350 static unsigned char frame_header[] = 2351 static u8 frame_header[] =
2351 {0xff, 0xff, 0x00, 0xc4, 0xc4, 0x96}; 2352 {0xff, 0xff, 0x00, 0xc4, 0xc4, 0x96};
2352 if (len == 64 && memcmp(data, frame_header, 6) == 0) { 2353 if (len == 64 && memcmp(data, frame_header, 6) == 0) {
2353 avg_lum = ((data[35] >> 2) & 3) | 2354 avg_lum = ((data[35] >> 2) & 3) |
diff --git a/drivers/media/video/gspca/sonixb.c b/drivers/media/video/gspca/sonixb.c
index ddff2b5ee5c2..785eeb4c2014 100644
--- a/drivers/media/video/gspca/sonixb.c
+++ b/drivers/media/video/gspca/sonixb.c
@@ -42,6 +42,7 @@ Reg Use
42 42
43#define MODULE_NAME "sonixb" 43#define MODULE_NAME "sonixb"
44 44
45#include <linux/input.h>
45#include "gspca.h" 46#include "gspca.h"
46 47
47MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>"); 48MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
@@ -53,9 +54,11 @@ struct sd {
53 struct gspca_dev gspca_dev; /* !! must be the first item */ 54 struct gspca_dev gspca_dev; /* !! must be the first item */
54 atomic_t avg_lum; 55 atomic_t avg_lum;
55 int prev_avg_lum; 56 int prev_avg_lum;
57 int exp_too_low_cnt;
58 int exp_too_high_cnt;
56 59
60 unsigned short exposure;
57 unsigned char gain; 61 unsigned char gain;
58 unsigned char exposure;
59 unsigned char brightness; 62 unsigned char brightness;
60 unsigned char autogain; 63 unsigned char autogain;
61 unsigned char autogain_ignore_frames; 64 unsigned char autogain_ignore_frames;
@@ -73,8 +76,9 @@ struct sd {
73#define SENSOR_OV7630 2 76#define SENSOR_OV7630 2
74#define SENSOR_PAS106 3 77#define SENSOR_PAS106 3
75#define SENSOR_PAS202 4 78#define SENSOR_PAS202 4
76#define SENSOR_TAS5110 5 79#define SENSOR_TAS5110C 5
77#define SENSOR_TAS5130CXX 6 80#define SENSOR_TAS5110D 6
81#define SENSOR_TAS5130CXX 7
78 __u8 reg11; 82 __u8 reg11;
79}; 83};
80 84
@@ -95,13 +99,15 @@ struct sensor_data {
95/* sensor_data flags */ 99/* sensor_data flags */
96#define F_GAIN 0x01 /* has gain */ 100#define F_GAIN 0x01 /* has gain */
97#define F_SIF 0x02 /* sif or vga */ 101#define F_SIF 0x02 /* sif or vga */
102#define F_COARSE_EXPO 0x04 /* exposure control is coarse */
98 103
99/* priv field of struct v4l2_pix_format flags (do not use low nibble!) */ 104/* priv field of struct v4l2_pix_format flags (do not use low nibble!) */
100#define MODE_RAW 0x10 /* raw bayer mode */ 105#define MODE_RAW 0x10 /* raw bayer mode */
101#define MODE_REDUCED_SIF 0x20 /* vga mode (320x240 / 160x120) on sif cam */ 106#define MODE_REDUCED_SIF 0x20 /* vga mode (320x240 / 160x120) on sif cam */
102 107
103/* ctrl_dis helper macros */ 108/* ctrl_dis helper macros */
104#define NO_EXPO ((1 << EXPOSURE_IDX) | (1 << AUTOGAIN_IDX)) 109#define NO_EXPO ((1 << EXPOSURE_IDX) | (1 << COARSE_EXPOSURE_IDX) | \
110 (1 << AUTOGAIN_IDX))
105#define NO_FREQ (1 << FREQ_IDX) 111#define NO_FREQ (1 << FREQ_IDX)
106#define NO_BRIGHTNESS (1 << BRIGHTNESS_IDX) 112#define NO_BRIGHTNESS (1 << BRIGHTNESS_IDX)
107 113
@@ -127,11 +133,10 @@ struct sensor_data {
127} 133}
128 134
129/* We calculate the autogain at the end of the transfer of a frame, at this 135/* We calculate the autogain at the end of the transfer of a frame, at this
130 moment a frame with the old settings is being transmitted, and a frame is 136 moment a frame with the old settings is being captured and transmitted. So
131 being captured with the old settings. So if we adjust the autogain we must 137 if we adjust the gain or exposure we must ignore atleast the next frame for
132 ignore atleast the 2 next frames for the new settings to come into effect 138 the new settings to come into effect before doing any other adjustments. */
133 before doing any other adjustments */ 139#define AUTOGAIN_IGNORE_FRAMES 1
134#define AUTOGAIN_IGNORE_FRAMES 3
135 140
136/* V4L2 controls supported by the driver */ 141/* V4L2 controls supported by the driver */
137static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val); 142static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
@@ -145,7 +150,7 @@ static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);
145static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val); 150static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
146static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val); 151static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
147 152
148static struct ctrl sd_ctrls[] = { 153static const struct ctrl sd_ctrls[] = {
149#define BRIGHTNESS_IDX 0 154#define BRIGHTNESS_IDX 0
150 { 155 {
151 { 156 {
@@ -171,7 +176,7 @@ static struct ctrl sd_ctrls[] = {
171 .maximum = 255, 176 .maximum = 255,
172 .step = 1, 177 .step = 1,
173#define GAIN_DEF 127 178#define GAIN_DEF 127
174#define GAIN_KNEE 200 179#define GAIN_KNEE 230
175 .default_value = GAIN_DEF, 180 .default_value = GAIN_DEF,
176 }, 181 },
177 .set = sd_setgain, 182 .set = sd_setgain,
@@ -183,10 +188,10 @@ static struct ctrl sd_ctrls[] = {
183 .id = V4L2_CID_EXPOSURE, 188 .id = V4L2_CID_EXPOSURE,
184 .type = V4L2_CTRL_TYPE_INTEGER, 189 .type = V4L2_CTRL_TYPE_INTEGER,
185 .name = "Exposure", 190 .name = "Exposure",
186#define EXPOSURE_DEF 16 /* 32 ms / 30 fps */ 191#define EXPOSURE_DEF 66 /* 33 ms / 30 fps (except on PASXXX) */
187#define EXPOSURE_KNEE 50 /* 100 ms / 10 fps */ 192#define EXPOSURE_KNEE 200 /* 100 ms / 10 fps (except on PASXXX) */
188 .minimum = 0, 193 .minimum = 0,
189 .maximum = 255, 194 .maximum = 1023,
190 .step = 1, 195 .step = 1,
191 .default_value = EXPOSURE_DEF, 196 .default_value = EXPOSURE_DEF,
192 .flags = 0, 197 .flags = 0,
@@ -194,7 +199,23 @@ static struct ctrl sd_ctrls[] = {
194 .set = sd_setexposure, 199 .set = sd_setexposure,
195 .get = sd_getexposure, 200 .get = sd_getexposure,
196 }, 201 },
197#define AUTOGAIN_IDX 3 202#define COARSE_EXPOSURE_IDX 3
203 {
204 {
205 .id = V4L2_CID_EXPOSURE,
206 .type = V4L2_CTRL_TYPE_INTEGER,
207 .name = "Exposure",
208#define COARSE_EXPOSURE_DEF 2 /* 30 fps */
209 .minimum = 2,
210 .maximum = 15,
211 .step = 1,
212 .default_value = COARSE_EXPOSURE_DEF,
213 .flags = 0,
214 },
215 .set = sd_setexposure,
216 .get = sd_getexposure,
217 },
218#define AUTOGAIN_IDX 4
198 { 219 {
199 { 220 {
200 .id = V4L2_CID_AUTOGAIN, 221 .id = V4L2_CID_AUTOGAIN,
@@ -210,7 +231,7 @@ static struct ctrl sd_ctrls[] = {
210 .set = sd_setautogain, 231 .set = sd_setautogain,
211 .get = sd_getautogain, 232 .get = sd_getautogain,
212 }, 233 },
213#define FREQ_IDX 4 234#define FREQ_IDX 5
214 { 235 {
215 { 236 {
216 .id = V4L2_CID_POWER_LINE_FREQUENCY, 237 .id = V4L2_CID_POWER_LINE_FREQUENCY,
@@ -219,7 +240,7 @@ static struct ctrl sd_ctrls[] = {
219 .minimum = 0, 240 .minimum = 0,
220 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */ 241 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
221 .step = 1, 242 .step = 1,
222#define FREQ_DEF 1 243#define FREQ_DEF 0
223 .default_value = FREQ_DEF, 244 .default_value = FREQ_DEF,
224 }, 245 },
225 .set = sd_setfreq, 246 .set = sd_setfreq,
@@ -345,7 +366,7 @@ static const __u8 initOv7630[] = {
345}; 366};
346static const __u8 initOv7630_3[] = { 367static const __u8 initOv7630_3[] = {
347 0x44, 0x44, 0x00, 0x1a, 0x20, 0x20, 0x20, 0x80, /* r01 .. r08 */ 368 0x44, 0x44, 0x00, 0x1a, 0x20, 0x20, 0x20, 0x80, /* r01 .. r08 */
348 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, /* r09 .. r10 */ 369 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* r09 .. r10 */
349 0x00, 0x02, 0x01, 0x0a, /* r11 .. r14 */ 370 0x00, 0x02, 0x01, 0x0a, /* r11 .. r14 */
350 0x28, 0x1e, /* H & V sizes r15 .. r16 */ 371 0x28, 0x1e, /* H & V sizes r15 .. r16 */
351 0x68, 0x8f, MCK_INIT1, /* r17 .. r19 */ 372 0x68, 0x8f, MCK_INIT1, /* r17 .. r19 */
@@ -387,6 +408,30 @@ static const __u8 initPas106[] = {
387 0x18, 0x10, 0x02, 0x02, 0x09, 0x07 408 0x18, 0x10, 0x02, 0x02, 0x09, 0x07
388}; 409};
389/* compression 0x86 mckinit1 0x2b */ 410/* compression 0x86 mckinit1 0x2b */
411
412/* "Known" PAS106B registers:
413 0x02 clock divider
414 0x03 Variable framerate bits 4-11
415 0x04 Var framerate bits 0-3, one must leave the 4 msb's at 0 !!
416 The variable framerate control must never be set lower then 300,
417 which sets the framerate at 90 / reg02, otherwise vsync is lost.
418 0x05 Shutter Time Line Offset, this can be used as an exposure control:
419 0 = use full frame time, 255 = no exposure at all
420 Note this may never be larger then "var-framerate control" / 2 - 2.
421 When var-framerate control is < 514, no exposure is reached at the max
422 allowed value for the framerate control value, rather then at 255.
423 0x06 Shutter Time Pixel Offset, like reg05 this influences exposure, but
424 only a very little bit, leave at 0xcd
425 0x07 offset sign bit (bit0 1 > negative offset)
426 0x08 offset
427 0x09 Blue Gain
428 0x0a Green1 Gain
429 0x0b Green2 Gain
430 0x0c Red Gain
431 0x0e Global gain
432 0x13 Write 1 to commit settings to sensor
433*/
434
390static const __u8 pas106_sensor_init[][8] = { 435static const __u8 pas106_sensor_init[][8] = {
391 /* Pixel Clock Divider 6 */ 436 /* Pixel Clock Divider 6 */
392 { 0xa1, 0x40, 0x02, 0x04, 0x00, 0x00, 0x00, 0x14 }, 437 { 0xa1, 0x40, 0x02, 0x04, 0x00, 0x00, 0x00, 0x14 },
@@ -433,37 +478,55 @@ static const __u8 initPas202[] = {
433 0x44, 0x44, 0x21, 0x30, 0x00, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x00, 478 0x44, 0x44, 0x21, 0x30, 0x00, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x00,
434 0x00, 0x00, 479 0x00, 0x00,
435 0x00, 0x00, 0x00, 0x06, 0x03, 0x0a, 480 0x00, 0x00, 0x00, 0x06, 0x03, 0x0a,
436 0x28, 0x1e, 0x28, 0x89, 0x20, 481 0x28, 0x1e, 0x20, 0x89, 0x20,
437 0x00, 0x00, 0x02, 0x03, 0x0f, 0x0c 482 0x00, 0x00, 0x02, 0x03, 0x0f, 0x0c
438}; 483};
484
485/* "Known" PAS202BCB registers:
486 0x02 clock divider
487 0x04 Variable framerate bits 6-11 (*)
488 0x05 Var framerate bits 0-5, one must leave the 2 msb's at 0 !!
489 0x07 Blue Gain
490 0x08 Green Gain
491 0x09 Red Gain
492 0x0b offset sign bit (bit0 1 > negative offset)
493 0x0c offset
494 0x0e Unknown image is slightly brighter when bit 0 is 0, if reg0f is 0 too,
495 leave at 1 otherwise we get a jump in our exposure control
496 0x0f Exposure 0-255, 0 = use full frame time, 255 = no exposure at all
497 0x10 Master gain 0 - 31
498 0x11 write 1 to apply changes
499 (*) The variable framerate control must never be set lower then 500
500 which sets the framerate at 30 / reg02, otherwise vsync is lost.
501*/
439static const __u8 pas202_sensor_init[][8] = { 502static const __u8 pas202_sensor_init[][8] = {
440 {0xa0, 0x40, 0x02, 0x03, 0x00, 0x00, 0x00, 0x10}, 503 /* Set the clock divider to 4 -> 30 / 4 = 7.5 fps, we would like
504 to set it lower, but for some reason the bridge starts missing
505 vsync's then */
506 {0xa0, 0x40, 0x02, 0x04, 0x00, 0x00, 0x00, 0x10},
441 {0xd0, 0x40, 0x04, 0x07, 0x34, 0x00, 0x09, 0x10}, 507 {0xd0, 0x40, 0x04, 0x07, 0x34, 0x00, 0x09, 0x10},
442 {0xd0, 0x40, 0x08, 0x01, 0x00, 0x00, 0x01, 0x10}, 508 {0xd0, 0x40, 0x08, 0x01, 0x00, 0x00, 0x01, 0x10},
443 {0xd0, 0x40, 0x0C, 0x00, 0x0C, 0x00, 0x32, 0x10}, 509 {0xd0, 0x40, 0x0C, 0x00, 0x0C, 0x01, 0x32, 0x10},
444 {0xd0, 0x40, 0x10, 0x00, 0x01, 0x00, 0x63, 0x10}, 510 {0xd0, 0x40, 0x10, 0x00, 0x01, 0x00, 0x63, 0x10},
445 {0xa0, 0x40, 0x15, 0x70, 0x01, 0x00, 0x63, 0x10}, 511 {0xa0, 0x40, 0x15, 0x70, 0x01, 0x00, 0x63, 0x10},
446 {0xa0, 0x40, 0x18, 0x00, 0x01, 0x00, 0x63, 0x10}, 512 {0xa0, 0x40, 0x18, 0x00, 0x01, 0x00, 0x63, 0x10},
447 {0xa0, 0x40, 0x11, 0x01, 0x01, 0x00, 0x63, 0x10}, 513 {0xa0, 0x40, 0x11, 0x01, 0x01, 0x00, 0x63, 0x10},
448 {0xa0, 0x40, 0x03, 0x56, 0x01, 0x00, 0x63, 0x10}, 514 {0xa0, 0x40, 0x03, 0x56, 0x01, 0x00, 0x63, 0x10},
449 {0xa0, 0x40, 0x11, 0x01, 0x01, 0x00, 0x63, 0x10}, 515 {0xa0, 0x40, 0x11, 0x01, 0x01, 0x00, 0x63, 0x10},
450 {0xb0, 0x40, 0x04, 0x07, 0x2a, 0x00, 0x63, 0x10},
451 {0xb0, 0x40, 0x0e, 0x00, 0x3d, 0x00, 0x63, 0x10},
452
453 {0xa0, 0x40, 0x11, 0x01, 0x3d, 0x00, 0x63, 0x16},
454 {0xa0, 0x40, 0x10, 0x08, 0x3d, 0x00, 0x63, 0x15},
455 {0xa0, 0x40, 0x02, 0x04, 0x3d, 0x00, 0x63, 0x16},
456 {0xa0, 0x40, 0x11, 0x01, 0x3d, 0x00, 0x63, 0x16},
457 {0xb0, 0x40, 0x0e, 0x00, 0x31, 0x00, 0x63, 0x16},
458 {0xa0, 0x40, 0x11, 0x01, 0x31, 0x00, 0x63, 0x16},
459 {0xa0, 0x40, 0x10, 0x0e, 0x31, 0x00, 0x63, 0x15},
460 {0xa0, 0x40, 0x11, 0x01, 0x31, 0x00, 0x63, 0x16},
461}; 516};
462 517
463static const __u8 initTas5110[] = { 518static const __u8 initTas5110c[] = {
464 0x44, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x11, 0x00, 0x00, 0x00, 519 0x44, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x11, 0x00, 0x00, 0x00,
465 0x00, 0x00, 520 0x00, 0x00,
466 0x00, 0x01, 0x00, 0x45, 0x09, 0x0a, 521 0x00, 0x00, 0x00, 0x45, 0x09, 0x0a,
522 0x16, 0x12, 0x60, 0x86, 0x2b,
523 0x14, 0x0a, 0x02, 0x02, 0x09, 0x07
524};
525/* Same as above, except a different hstart */
526static const __u8 initTas5110d[] = {
527 0x44, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x11, 0x00, 0x00, 0x00,
528 0x00, 0x00,
529 0x00, 0x00, 0x00, 0x41, 0x09, 0x0a,
467 0x16, 0x12, 0x60, 0x86, 0x2b, 530 0x16, 0x12, 0x60, 0x86, 0x2b,
468 0x14, 0x0a, 0x02, 0x02, 0x09, 0x07 531 0x14, 0x0a, 0x02, 0x02, 0x09, 0x07
469}; 532};
@@ -476,7 +539,7 @@ static const __u8 tas5110_sensor_init[][8] = {
476static const __u8 initTas5130[] = { 539static const __u8 initTas5130[] = {
477 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x11, 0x00, 0x00, 0x00, 540 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x11, 0x00, 0x00, 0x00,
478 0x00, 0x00, 541 0x00, 0x00,
479 0x00, 0x01, 0x00, 0x68, 0x0c, 0x0a, 542 0x00, 0x00, 0x00, 0x68, 0x0c, 0x0a,
480 0x28, 0x1e, 0x60, COMP, MCK_INIT, 543 0x28, 0x1e, 0x60, COMP, MCK_INIT,
481 0x18, 0x10, 0x04, 0x03, 0x11, 0x0c 544 0x18, 0x10, 0x04, 0x03, 0x11, 0x0c
482}; 545};
@@ -493,12 +556,14 @@ SENS(initHv7131, NULL, hv7131_sensor_init, NULL, NULL, 0, NO_EXPO|NO_FREQ, 0),
493SENS(initOv6650, NULL, ov6650_sensor_init, NULL, NULL, F_GAIN|F_SIF, 0, 0x60), 556SENS(initOv6650, NULL, ov6650_sensor_init, NULL, NULL, F_GAIN|F_SIF, 0, 0x60),
494SENS(initOv7630, initOv7630_3, ov7630_sensor_init, NULL, ov7630_sensor_init_3, 557SENS(initOv7630, initOv7630_3, ov7630_sensor_init, NULL, ov7630_sensor_init_3,
495 F_GAIN, 0, 0x21), 558 F_GAIN, 0, 0x21),
496SENS(initPas106, NULL, pas106_sensor_init, NULL, NULL, F_SIF, NO_EXPO|NO_FREQ, 559SENS(initPas106, NULL, pas106_sensor_init, NULL, NULL, F_GAIN|F_SIF, NO_FREQ,
497 0), 560 0),
498SENS(initPas202, initPas202, pas202_sensor_init, NULL, NULL, 0, 561SENS(initPas202, initPas202, pas202_sensor_init, NULL, NULL, F_GAIN,
499 NO_EXPO|NO_FREQ, 0), 562 NO_FREQ, 0),
500SENS(initTas5110, NULL, tas5110_sensor_init, NULL, NULL, F_GAIN|F_SIF, 563SENS(initTas5110c, NULL, tas5110_sensor_init, NULL, NULL,
501 NO_BRIGHTNESS|NO_FREQ, 0), 564 F_GAIN|F_SIF|F_COARSE_EXPO, NO_BRIGHTNESS|NO_FREQ, 0),
565SENS(initTas5110d, NULL, tas5110_sensor_init, NULL, NULL,
566 F_GAIN|F_SIF|F_COARSE_EXPO, NO_BRIGHTNESS|NO_FREQ, 0),
502SENS(initTas5130, NULL, tas5130_sensor_init, NULL, NULL, 0, NO_EXPO|NO_FREQ, 567SENS(initTas5130, NULL, tas5130_sensor_init, NULL, NULL, 0, NO_EXPO|NO_FREQ,
503 0), 568 0),
504}; 569};
@@ -587,42 +652,28 @@ static void setbrightness(struct gspca_dev *gspca_dev)
587 goto err; 652 goto err;
588 break; 653 break;
589 } 654 }
590 case SENSOR_PAS106: { 655 case SENSOR_PAS106:
591 __u8 i2c1[] =
592 {0xa1, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14};
593
594 i2c1[3] = sd->brightness >> 3;
595 i2c1[2] = 0x0e;
596 if (i2c_w(gspca_dev, i2c1) < 0)
597 goto err;
598 i2c1[3] = 0x01;
599 i2c1[2] = 0x13;
600 if (i2c_w(gspca_dev, i2c1) < 0)
601 goto err;
602 break;
603 }
604 case SENSOR_PAS202: { 656 case SENSOR_PAS202: {
605 /* __u8 i2cpexpo1[] = 657 __u8 i2cpbright[] =
606 {0xb0, 0x40, 0x04, 0x07, 0x2a, 0x00, 0x63, 0x16}; */ 658 {0xb0, 0x40, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x16};
607 __u8 i2cpexpo[] = 659 __u8 i2cpdoit[] =
608 {0xb0, 0x40, 0x0e, 0x01, 0xab, 0x00, 0x63, 0x16}; 660 {0xa0, 0x40, 0x11, 0x01, 0x00, 0x00, 0x00, 0x16};
609 __u8 i2cp202[] = 661
610 {0xa0, 0x40, 0x10, 0x0e, 0x31, 0x00, 0x63, 0x15}; 662 /* PAS106 uses reg 7 and 8 instead of b and c */
611 static __u8 i2cpdoit[] = 663 if (sd->sensor == SENSOR_PAS106) {
612 {0xa0, 0x40, 0x11, 0x01, 0x31, 0x00, 0x63, 0x16}; 664 i2cpbright[2] = 7;
613 665 i2cpdoit[2] = 0x13;
614 /* change reg 0x10 */ 666 }
615 i2cpexpo[4] = 0xff - sd->brightness; 667
616/* if(i2c_w(gspca_dev,i2cpexpo1) < 0) 668 if (sd->brightness < 127) {
617 goto err; */ 669 /* change reg 0x0b, signreg */
618/* if(i2c_w(gspca_dev,i2cpdoit) < 0) 670 i2cpbright[3] = 0x01;
619 goto err; */ 671 /* set reg 0x0c, offset */
620 if (i2c_w(gspca_dev, i2cpexpo) < 0) 672 i2cpbright[4] = 127 - sd->brightness;
621 goto err; 673 } else
622 if (i2c_w(gspca_dev, i2cpdoit) < 0) 674 i2cpbright[4] = sd->brightness - 127;
623 goto err; 675
624 i2cp202[3] = sd->brightness >> 3; 676 if (i2c_w(gspca_dev, i2cpbright) < 0)
625 if (i2c_w(gspca_dev, i2cp202) < 0)
626 goto err; 677 goto err;
627 if (i2c_w(gspca_dev, i2cpdoit) < 0) 678 if (i2c_w(gspca_dev, i2cpdoit) < 0)
628 goto err; 679 goto err;
@@ -652,7 +703,8 @@ static void setsensorgain(struct gspca_dev *gspca_dev)
652 703
653 switch (sd->sensor) { 704 switch (sd->sensor) {
654 705
655 case SENSOR_TAS5110: { 706 case SENSOR_TAS5110C:
707 case SENSOR_TAS5110D: {
656 __u8 i2c[] = 708 __u8 i2c[] =
657 {0x30, 0x11, 0x02, 0x20, 0x70, 0x00, 0x00, 0x10}; 709 {0x30, 0x11, 0x02, 0x20, 0x70, 0x00, 0x00, 0x10};
658 710
@@ -674,6 +726,37 @@ static void setsensorgain(struct gspca_dev *gspca_dev)
674 goto err; 726 goto err;
675 break; 727 break;
676 } 728 }
729 case SENSOR_PAS106:
730 case SENSOR_PAS202: {
731 __u8 i2cpgain[] =
732 {0xa0, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00, 0x15};
733 __u8 i2cpcolorgain[] =
734 {0xc0, 0x40, 0x07, 0x00, 0x00, 0x00, 0x00, 0x15};
735 __u8 i2cpdoit[] =
736 {0xa0, 0x40, 0x11, 0x01, 0x00, 0x00, 0x00, 0x16};
737
738 /* PAS106 uses different regs (and has split green gains) */
739 if (sd->sensor == SENSOR_PAS106) {
740 i2cpgain[2] = 0x0e;
741 i2cpcolorgain[0] = 0xd0;
742 i2cpcolorgain[2] = 0x09;
743 i2cpdoit[2] = 0x13;
744 }
745
746 i2cpgain[3] = sd->gain >> 3;
747 i2cpcolorgain[3] = sd->gain >> 4;
748 i2cpcolorgain[4] = sd->gain >> 4;
749 i2cpcolorgain[5] = sd->gain >> 4;
750 i2cpcolorgain[6] = sd->gain >> 4;
751
752 if (i2c_w(gspca_dev, i2cpgain) < 0)
753 goto err;
754 if (i2c_w(gspca_dev, i2cpcolorgain) < 0)
755 goto err;
756 if (i2c_w(gspca_dev, i2cpdoit) < 0)
757 goto err;
758 break;
759 }
677 } 760 }
678 return; 761 return;
679err: 762err:
@@ -684,19 +767,21 @@ static void setgain(struct gspca_dev *gspca_dev)
684{ 767{
685 struct sd *sd = (struct sd *) gspca_dev; 768 struct sd *sd = (struct sd *) gspca_dev;
686 __u8 gain; 769 __u8 gain;
687 __u8 rgb_value; 770 __u8 buf[2] = { 0, 0 };
771
772 if (sensor_data[sd->sensor].flags & F_GAIN) {
773 /* Use the sensor gain to do the actual gain */
774 setsensorgain(gspca_dev);
775 return;
776 }
688 777
689 gain = sd->gain >> 4; 778 gain = sd->gain >> 4;
690 779
691 /* red and blue gain */ 780 /* red and blue gain */
692 rgb_value = gain << 4 | gain; 781 buf[0] = gain << 4 | gain;
693 reg_w(gspca_dev, 0x10, &rgb_value, 1);
694 /* green gain */ 782 /* green gain */
695 rgb_value = gain; 783 buf[1] = gain;
696 reg_w(gspca_dev, 0x11, &rgb_value, 1); 784 reg_w(gspca_dev, 0x10, buf, 2);
697
698 if (sensor_data[sd->sensor].flags & F_GAIN)
699 setsensorgain(gspca_dev);
700} 785}
701 786
702static void setexposure(struct gspca_dev *gspca_dev) 787static void setexposure(struct gspca_dev *gspca_dev)
@@ -704,17 +789,12 @@ static void setexposure(struct gspca_dev *gspca_dev)
704 struct sd *sd = (struct sd *) gspca_dev; 789 struct sd *sd = (struct sd *) gspca_dev;
705 790
706 switch (sd->sensor) { 791 switch (sd->sensor) {
707 case SENSOR_TAS5110: { 792 case SENSOR_TAS5110C:
708 __u8 reg; 793 case SENSOR_TAS5110D: {
709
710 /* register 19's high nibble contains the sn9c10x clock divider 794 /* register 19's high nibble contains the sn9c10x clock divider
711 The high nibble configures the no fps according to the 795 The high nibble configures the no fps according to the
712 formula: 60 / high_nibble. With a maximum of 30 fps */ 796 formula: 60 / high_nibble. With a maximum of 30 fps */
713 reg = 120 * sd->exposure / 1000; 797 __u8 reg = sd->exposure;
714 if (reg < 2)
715 reg = 2;
716 else if (reg > 15)
717 reg = 15;
718 reg = (reg << 4) | 0x0b; 798 reg = (reg << 4) | 0x0b;
719 reg_w(gspca_dev, 0x19, &reg, 1); 799 reg_w(gspca_dev, 0x19, &reg, 1);
720 break; 800 break;
@@ -750,20 +830,21 @@ static void setexposure(struct gspca_dev *gspca_dev)
750 } else 830 } else
751 reg10_max = 0x41; 831 reg10_max = 0x41;
752 832
753 reg11 = (60 * sd->exposure + 999) / 1000; 833 reg11 = (15 * sd->exposure + 999) / 1000;
754 if (reg11 < 1) 834 if (reg11 < 1)
755 reg11 = 1; 835 reg11 = 1;
756 else if (reg11 > 16) 836 else if (reg11 > 16)
757 reg11 = 16; 837 reg11 = 16;
758 838
759 /* In 640x480, if the reg11 has less than 3, the image is 839 /* In 640x480, if the reg11 has less than 4, the image is
760 unstable (not enough bandwidth). */ 840 unstable (the bridge goes into a higher compression mode
761 if (gspca_dev->width == 640 && reg11 < 3) 841 which we have not reverse engineered yet). */
762 reg11 = 3; 842 if (gspca_dev->width == 640 && reg11 < 4)
843 reg11 = 4;
763 844
764 /* frame exposure time in ms = 1000 * reg11 / 30 -> 845 /* frame exposure time in ms = 1000 * reg11 / 30 ->
765 reg10 = sd->exposure * 2 * reg10_max / (1000 * reg11 / 30) */ 846 reg10 = (sd->exposure / 2) * reg10_max / (1000 * reg11 / 30) */
766 reg10 = (sd->exposure * 60 * reg10_max) / (1000 * reg11); 847 reg10 = (sd->exposure * 15 * reg10_max) / (1000 * reg11);
767 848
768 /* Don't allow this to get below 10 when using autogain, the 849 /* Don't allow this to get below 10 when using autogain, the
769 steps become very large (relatively) when below 10 causing 850 steps become very large (relatively) when below 10 causing
@@ -786,10 +867,85 @@ static void setexposure(struct gspca_dev *gspca_dev)
786 if (i2c_w(gspca_dev, i2c) == 0) 867 if (i2c_w(gspca_dev, i2c) == 0)
787 sd->reg11 = reg11; 868 sd->reg11 = reg11;
788 else 869 else
789 PDEBUG(D_ERR, "i2c error exposure"); 870 goto err;
871 break;
872 }
873 case SENSOR_PAS202: {
874 __u8 i2cpframerate[] =
875 {0xb0, 0x40, 0x04, 0x00, 0x00, 0x00, 0x00, 0x16};
876 __u8 i2cpexpo[] =
877 {0xa0, 0x40, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x16};
878 const __u8 i2cpdoit[] =
879 {0xa0, 0x40, 0x11, 0x01, 0x00, 0x00, 0x00, 0x16};
880 int framerate_ctrl;
881
882 /* The exposure knee for the autogain algorithm is 200
883 (100 ms / 10 fps on other sensors), for values below this
884 use the control for setting the partial frame expose time,
885 above that use variable framerate. This way we run at max
886 framerate (640x480@7.5 fps, 320x240@10fps) until the knee
887 is reached. Using the variable framerate control above 200
888 is better then playing around with both clockdiv + partial
889 frame exposure times (like we are doing with the ov chips),
890 as that sometimes leads to jumps in the exposure control,
891 which are bad for auto exposure. */
892 if (sd->exposure < 200) {
893 i2cpexpo[3] = 255 - (sd->exposure * 255) / 200;
894 framerate_ctrl = 500;
895 } else {
896 /* The PAS202's exposure control goes from 0 - 4095,
897 but anything below 500 causes vsync issues, so scale
898 our 200-1023 to 500-4095 */
899 framerate_ctrl = (sd->exposure - 200) * 1000 / 229 +
900 500;
901 }
902
903 i2cpframerate[3] = framerate_ctrl >> 6;
904 i2cpframerate[4] = framerate_ctrl & 0x3f;
905 if (i2c_w(gspca_dev, i2cpframerate) < 0)
906 goto err;
907 if (i2c_w(gspca_dev, i2cpexpo) < 0)
908 goto err;
909 if (i2c_w(gspca_dev, i2cpdoit) < 0)
910 goto err;
911 break;
912 }
913 case SENSOR_PAS106: {
914 __u8 i2cpframerate[] =
915 {0xb1, 0x40, 0x03, 0x00, 0x00, 0x00, 0x00, 0x14};
916 __u8 i2cpexpo[] =
917 {0xa1, 0x40, 0x05, 0x00, 0x00, 0x00, 0x00, 0x14};
918 const __u8 i2cpdoit[] =
919 {0xa1, 0x40, 0x13, 0x01, 0x00, 0x00, 0x00, 0x14};
920 int framerate_ctrl;
921
922 /* For values below 150 use partial frame exposure, above
923 that use framerate ctrl */
924 if (sd->exposure < 150) {
925 i2cpexpo[3] = 150 - sd->exposure;
926 framerate_ctrl = 300;
927 } else {
928 /* The PAS106's exposure control goes from 0 - 4095,
929 but anything below 300 causes vsync issues, so scale
930 our 150-1023 to 300-4095 */
931 framerate_ctrl = (sd->exposure - 150) * 1000 / 230 +
932 300;
933 }
934
935 i2cpframerate[3] = framerate_ctrl >> 4;
936 i2cpframerate[4] = framerate_ctrl & 0x0f;
937 if (i2c_w(gspca_dev, i2cpframerate) < 0)
938 goto err;
939 if (i2c_w(gspca_dev, i2cpexpo) < 0)
940 goto err;
941 if (i2c_w(gspca_dev, i2cpdoit) < 0)
942 goto err;
790 break; 943 break;
791 } 944 }
792 } 945 }
946 return;
947err:
948 PDEBUG(D_ERR, "i2c error exposure");
793} 949}
794 950
795static void setfreq(struct gspca_dev *gspca_dev) 951static void setfreq(struct gspca_dev *gspca_dev)
@@ -823,30 +979,43 @@ static void setfreq(struct gspca_dev *gspca_dev)
823 } 979 }
824} 980}
825 981
982#include "coarse_expo_autogain.h"
983
826static void do_autogain(struct gspca_dev *gspca_dev) 984static void do_autogain(struct gspca_dev *gspca_dev)
827{ 985{
828 int deadzone, desired_avg_lum; 986 int deadzone, desired_avg_lum, result;
829 struct sd *sd = (struct sd *) gspca_dev; 987 struct sd *sd = (struct sd *) gspca_dev;
830 int avg_lum = atomic_read(&sd->avg_lum); 988 int avg_lum = atomic_read(&sd->avg_lum);
831 989
832 if (avg_lum == -1) 990 if (avg_lum == -1 || !sd->autogain)
833 return; 991 return;
834 992
993 if (sd->autogain_ignore_frames > 0) {
994 sd->autogain_ignore_frames--;
995 return;
996 }
997
835 /* SIF / VGA sensors have a different autoexposure area and thus 998 /* SIF / VGA sensors have a different autoexposure area and thus
836 different avg_lum values for the same picture brightness */ 999 different avg_lum values for the same picture brightness */
837 if (sensor_data[sd->sensor].flags & F_SIF) { 1000 if (sensor_data[sd->sensor].flags & F_SIF) {
838 deadzone = 1000; 1001 deadzone = 500;
839 desired_avg_lum = 7000; 1002 /* SIF sensors tend to overexpose, so keep this small */
1003 desired_avg_lum = 5000;
840 } else { 1004 } else {
841 deadzone = 3000; 1005 deadzone = 1500;
842 desired_avg_lum = 23000; 1006 desired_avg_lum = 18000;
843 } 1007 }
844 1008
845 if (sd->autogain_ignore_frames > 0) 1009 if (sensor_data[sd->sensor].flags & F_COARSE_EXPO)
846 sd->autogain_ignore_frames--; 1010 result = gspca_coarse_grained_expo_autogain(gspca_dev, avg_lum,
847 else if (gspca_auto_gain_n_exposure(gspca_dev, avg_lum, 1011 sd->brightness * desired_avg_lum / 127,
848 sd->brightness * desired_avg_lum / 127, 1012 deadzone);
849 deadzone, GAIN_KNEE, EXPOSURE_KNEE)) { 1013 else
1014 result = gspca_auto_gain_n_exposure(gspca_dev, avg_lum,
1015 sd->brightness * desired_avg_lum / 127,
1016 deadzone, GAIN_KNEE, EXPOSURE_KNEE);
1017
1018 if (result) {
850 PDEBUG(D_FRAM, "autogain: gain changed: gain: %d expo: %d", 1019 PDEBUG(D_FRAM, "autogain: gain changed: gain: %d expo: %d",
851 (int)sd->gain, (int)sd->exposure); 1020 (int)sd->gain, (int)sd->exposure);
852 sd->autogain_ignore_frames = AUTOGAIN_IGNORE_FRAMES; 1021 sd->autogain_ignore_frames = AUTOGAIN_IGNORE_FRAMES;
@@ -881,7 +1050,13 @@ static int sd_config(struct gspca_dev *gspca_dev,
881 1050
882 sd->brightness = BRIGHTNESS_DEF; 1051 sd->brightness = BRIGHTNESS_DEF;
883 sd->gain = GAIN_DEF; 1052 sd->gain = GAIN_DEF;
884 sd->exposure = EXPOSURE_DEF; 1053 if (sensor_data[sd->sensor].flags & F_COARSE_EXPO) {
1054 sd->exposure = COARSE_EXPOSURE_DEF;
1055 gspca_dev->ctrl_dis |= (1 << EXPOSURE_IDX);
1056 } else {
1057 sd->exposure = EXPOSURE_DEF;
1058 gspca_dev->ctrl_dis |= (1 << COARSE_EXPOSURE_IDX);
1059 }
885 if (gspca_dev->ctrl_dis & (1 << AUTOGAIN_IDX)) 1060 if (gspca_dev->ctrl_dis & (1 << AUTOGAIN_IDX))
886 sd->autogain = 0; /* Disable do_autogain callback */ 1061 sd->autogain = 0; /* Disable do_autogain callback */
887 else 1062 else
@@ -917,9 +1092,6 @@ static int sd_start(struct gspca_dev *gspca_dev)
917 reg12_19[6] = sn9c10x[0x18 - 1] | (mode << 4); 1092 reg12_19[6] = sn9c10x[0x18 - 1] | (mode << 4);
918 /* Special cases where reg 17 and or 19 value depends on mode */ 1093 /* Special cases where reg 17 and or 19 value depends on mode */
919 switch (sd->sensor) { 1094 switch (sd->sensor) {
920 case SENSOR_PAS202:
921 reg12_19[5] = mode ? 0x24 : 0x20;
922 break;
923 case SENSOR_TAS5130CXX: 1095 case SENSOR_TAS5130CXX:
924 /* probably not mode specific at all most likely the upper 1096 /* probably not mode specific at all most likely the upper
925 nibble of 0x19 is exposure (clock divider) just as with 1097 nibble of 0x19 is exposure (clock divider) just as with
@@ -955,6 +1127,16 @@ static int sd_start(struct gspca_dev *gspca_dev)
955 sensor_data[sd->sensor].sensor_bridge_init_size[ 1127 sensor_data[sd->sensor].sensor_bridge_init_size[
956 sd->bridge]); 1128 sd->bridge]);
957 1129
1130 /* Mode specific sensor setup */
1131 switch (sd->sensor) {
1132 case SENSOR_PAS202: {
1133 const __u8 i2cpclockdiv[] =
1134 {0xa0, 0x40, 0x02, 0x03, 0x00, 0x00, 0x00, 0x10};
1135 /* clockdiv from 4 to 3 (7.5 -> 10 fps) when in low res mode */
1136 if (mode)
1137 i2c_w(gspca_dev, i2cpclockdiv);
1138 }
1139 }
958 /* H_size V_size 0x28, 0x1e -> 640x480. 0x16, 0x12 -> 352x288 */ 1140 /* H_size V_size 0x28, 0x1e -> 640x480. 0x16, 0x12 -> 352x288 */
959 reg_w(gspca_dev, 0x15, &reg12_19[3], 2); 1141 reg_w(gspca_dev, 0x15, &reg12_19[3], 2);
960 /* compression register */ 1142 /* compression register */
@@ -985,6 +1167,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
985 1167
986 sd->frames_to_drop = 0; 1168 sd->frames_to_drop = 0;
987 sd->autogain_ignore_frames = 0; 1169 sd->autogain_ignore_frames = 0;
1170 sd->exp_too_high_cnt = 0;
1171 sd->exp_too_low_cnt = 0;
988 atomic_set(&sd->avg_lum, -1); 1172 atomic_set(&sd->avg_lum, -1);
989 return 0; 1173 return 0;
990} 1174}
@@ -1143,11 +1327,14 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
1143 struct sd *sd = (struct sd *) gspca_dev; 1327 struct sd *sd = (struct sd *) gspca_dev;
1144 1328
1145 sd->autogain = val; 1329 sd->autogain = val;
1330 sd->exp_too_high_cnt = 0;
1331 sd->exp_too_low_cnt = 0;
1332
1146 /* when switching to autogain set defaults to make sure 1333 /* when switching to autogain set defaults to make sure
1147 we are on a valid point of the autogain gain / 1334 we are on a valid point of the autogain gain /
1148 exposure knee graph, and give this change time to 1335 exposure knee graph, and give this change time to
1149 take effect before doing autogain. */ 1336 take effect before doing autogain. */
1150 if (sd->autogain) { 1337 if (sd->autogain && !(sensor_data[sd->sensor].flags & F_COARSE_EXPO)) {
1151 sd->exposure = EXPOSURE_DEF; 1338 sd->exposure = EXPOSURE_DEF;
1152 sd->gain = GAIN_DEF; 1339 sd->gain = GAIN_DEF;
1153 if (gspca_dev->streaming) { 1340 if (gspca_dev->streaming) {
@@ -1207,6 +1394,25 @@ static int sd_querymenu(struct gspca_dev *gspca_dev,
1207 return -EINVAL; 1394 return -EINVAL;
1208} 1395}
1209 1396
1397#ifdef CONFIG_INPUT
1398static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
1399 u8 *data, /* interrupt packet data */
1400 int len) /* interrupt packet length */
1401{
1402 int ret = -EINVAL;
1403
1404 if (len == 1 && data[0] == 1) {
1405 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 1);
1406 input_sync(gspca_dev->input_dev);
1407 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
1408 input_sync(gspca_dev->input_dev);
1409 ret = 0;
1410 }
1411
1412 return ret;
1413}
1414#endif
1415
1210/* sub-driver description */ 1416/* sub-driver description */
1211static const struct sd_desc sd_desc = { 1417static const struct sd_desc sd_desc = {
1212 .name = MODULE_NAME, 1418 .name = MODULE_NAME,
@@ -1219,6 +1425,9 @@ static const struct sd_desc sd_desc = {
1219 .pkt_scan = sd_pkt_scan, 1425 .pkt_scan = sd_pkt_scan,
1220 .querymenu = sd_querymenu, 1426 .querymenu = sd_querymenu,
1221 .dq_callback = do_autogain, 1427 .dq_callback = do_autogain,
1428#ifdef CONFIG_INPUT
1429 .int_pkt_scan = sd_int_pkt_scan,
1430#endif
1222}; 1431};
1223 1432
1224/* -- module initialisation -- */ 1433/* -- module initialisation -- */
@@ -1227,21 +1436,21 @@ static const struct sd_desc sd_desc = {
1227 1436
1228 1437
1229static const struct usb_device_id device_table[] __devinitconst = { 1438static const struct usb_device_id device_table[] __devinitconst = {
1230 {USB_DEVICE(0x0c45, 0x6001), SB(TAS5110, 102)}, /* TAS5110C1B */ 1439 {USB_DEVICE(0x0c45, 0x6001), SB(TAS5110C, 102)}, /* TAS5110C1B */
1231 {USB_DEVICE(0x0c45, 0x6005), SB(TAS5110, 101)}, /* TAS5110C1B */ 1440 {USB_DEVICE(0x0c45, 0x6005), SB(TAS5110C, 101)}, /* TAS5110C1B */
1232#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE 1441#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE
1233 {USB_DEVICE(0x0c45, 0x6007), SB(TAS5110, 101)}, /* TAS5110D */ 1442 {USB_DEVICE(0x0c45, 0x6007), SB(TAS5110D, 101)}, /* TAS5110D */
1443#endif
1234 {USB_DEVICE(0x0c45, 0x6009), SB(PAS106, 101)}, 1444 {USB_DEVICE(0x0c45, 0x6009), SB(PAS106, 101)},
1235 {USB_DEVICE(0x0c45, 0x600d), SB(PAS106, 101)}, 1445 {USB_DEVICE(0x0c45, 0x600d), SB(PAS106, 101)},
1236#endif
1237 {USB_DEVICE(0x0c45, 0x6011), SB(OV6650, 101)}, 1446 {USB_DEVICE(0x0c45, 0x6011), SB(OV6650, 101)},
1238#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE 1447#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE
1239 {USB_DEVICE(0x0c45, 0x6019), SB(OV7630, 101)}, 1448 {USB_DEVICE(0x0c45, 0x6019), SB(OV7630, 101)},
1240 {USB_DEVICE(0x0c45, 0x6024), SB(TAS5130CXX, 102)}, 1449 {USB_DEVICE(0x0c45, 0x6024), SB(TAS5130CXX, 102)},
1241 {USB_DEVICE(0x0c45, 0x6025), SB(TAS5130CXX, 102)}, 1450 {USB_DEVICE(0x0c45, 0x6025), SB(TAS5130CXX, 102)},
1451#endif
1242 {USB_DEVICE(0x0c45, 0x6028), SB(PAS202, 102)}, 1452 {USB_DEVICE(0x0c45, 0x6028), SB(PAS202, 102)},
1243 {USB_DEVICE(0x0c45, 0x6029), SB(PAS106, 102)}, 1453 {USB_DEVICE(0x0c45, 0x6029), SB(PAS106, 102)},
1244#endif
1245 {USB_DEVICE(0x0c45, 0x602c), SB(OV7630, 102)}, 1454 {USB_DEVICE(0x0c45, 0x602c), SB(OV7630, 102)},
1246 {USB_DEVICE(0x0c45, 0x602d), SB(HV7131R, 102)}, 1455 {USB_DEVICE(0x0c45, 0x602d), SB(HV7131R, 102)},
1247#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE 1456#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c
index 0bd36a00dd2a..83d5773d4629 100644
--- a/drivers/media/video/gspca/sonixj.c
+++ b/drivers/media/video/gspca/sonixj.c
@@ -21,6 +21,7 @@
21 21
22#define MODULE_NAME "sonixj" 22#define MODULE_NAME "sonixj"
23 23
24#include <linux/input.h>
24#include "gspca.h" 25#include "gspca.h"
25#include "jpeg.h" 26#include "jpeg.h"
26 27
@@ -45,6 +46,7 @@ struct sd {
45 u8 red; 46 u8 red;
46 u8 gamma; 47 u8 gamma;
47 u8 vflip; /* ov7630/ov7648 only */ 48 u8 vflip; /* ov7630/ov7648 only */
49 u8 sharpness;
48 u8 infrared; /* mt9v111 only */ 50 u8 infrared; /* mt9v111 only */
49 u8 freq; /* ov76xx only */ 51 u8 freq; /* ov76xx only */
50 u8 quality; /* image quality */ 52 u8 quality; /* image quality */
@@ -64,16 +66,17 @@ struct sd {
64#define BRIDGE_SN9C110 2 66#define BRIDGE_SN9C110 2
65#define BRIDGE_SN9C120 3 67#define BRIDGE_SN9C120 3
66 u8 sensor; /* Type of image sensor chip */ 68 u8 sensor; /* Type of image sensor chip */
67#define SENSOR_HV7131R 0 69#define SENSOR_ADCM1700 0
68#define SENSOR_MI0360 1 70#define SENSOR_HV7131R 1
69#define SENSOR_MO4000 2 71#define SENSOR_MI0360 2
70#define SENSOR_MT9V111 3 72#define SENSOR_MO4000 3
71#define SENSOR_OM6802 4 73#define SENSOR_MT9V111 4
72#define SENSOR_OV7630 5 74#define SENSOR_OM6802 5
73#define SENSOR_OV7648 6 75#define SENSOR_OV7630 6
74#define SENSOR_OV7660 7 76#define SENSOR_OV7648 7
75#define SENSOR_PO1030 8 77#define SENSOR_OV7660 8
76#define SENSOR_SP80708 9 78#define SENSOR_PO1030 9
79#define SENSOR_SP80708 10
77 u8 i2c_addr; 80 u8 i2c_addr;
78 81
79 u8 *jpeg_hdr; 82 u8 *jpeg_hdr;
@@ -96,12 +99,14 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
96static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val); 99static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);
97static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val); 100static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
98static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val); 101static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
102static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val);
103static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val);
99static int sd_setinfrared(struct gspca_dev *gspca_dev, __s32 val); 104static int sd_setinfrared(struct gspca_dev *gspca_dev, __s32 val);
100static int sd_getinfrared(struct gspca_dev *gspca_dev, __s32 *val); 105static int sd_getinfrared(struct gspca_dev *gspca_dev, __s32 *val);
101static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val); 106static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
102static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val); 107static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
103 108
104static struct ctrl sd_ctrls[] = { 109static const struct ctrl sd_ctrls[] = {
105#define BRIGHTNESS_IDX 0 110#define BRIGHTNESS_IDX 0
106 { 111 {
107 { 112 {
@@ -225,8 +230,23 @@ static struct ctrl sd_ctrls[] = {
225 .set = sd_setvflip, 230 .set = sd_setvflip,
226 .get = sd_getvflip, 231 .get = sd_getvflip,
227 }, 232 },
233#define SHARPNESS_IDX 8
234 {
235 {
236 .id = V4L2_CID_SHARPNESS,
237 .type = V4L2_CTRL_TYPE_INTEGER,
238 .name = "Sharpness",
239 .minimum = 0,
240 .maximum = 255,
241 .step = 1,
242#define SHARPNESS_DEF 90
243 .default_value = SHARPNESS_DEF,
244 },
245 .set = sd_setsharpness,
246 .get = sd_getsharpness,
247 },
228/* mt9v111 only */ 248/* mt9v111 only */
229#define INFRARED_IDX 8 249#define INFRARED_IDX 9
230 { 250 {
231 { 251 {
232 .id = V4L2_CID_INFRARED, 252 .id = V4L2_CID_INFRARED,
@@ -242,7 +262,7 @@ static struct ctrl sd_ctrls[] = {
242 .get = sd_getinfrared, 262 .get = sd_getinfrared,
243 }, 263 },
244/* ov7630/ov7648/ov7660 only */ 264/* ov7630/ov7648/ov7660 only */
245#define FREQ_IDX 9 265#define FREQ_IDX 10
246 { 266 {
247 { 267 {
248 .id = V4L2_CID_POWER_LINE_FREQUENCY, 268 .id = V4L2_CID_POWER_LINE_FREQUENCY,
@@ -261,28 +281,37 @@ static struct ctrl sd_ctrls[] = {
261 281
262/* table of the disabled controls */ 282/* table of the disabled controls */
263static __u32 ctrl_dis[] = { 283static __u32 ctrl_dis[] = {
284 (1 << INFRARED_IDX) | (1 << VFLIP_IDX) | (1 << FREQ_IDX) |
285 (1 << AUTOGAIN_IDX), /* SENSOR_ADCM1700 0 */
286 (1 << INFRARED_IDX) | (1 << FREQ_IDX),
287 /* SENSOR_HV7131R 1 */
264 (1 << INFRARED_IDX) | (1 << VFLIP_IDX) | (1 << FREQ_IDX), 288 (1 << INFRARED_IDX) | (1 << VFLIP_IDX) | (1 << FREQ_IDX),
265 /* SENSOR_HV7131R 0 */ 289 /* SENSOR_MI0360 2 */
266 (1 << INFRARED_IDX) | (1 << VFLIP_IDX) | (1 << FREQ_IDX), 290 (1 << INFRARED_IDX) | (1 << VFLIP_IDX) | (1 << FREQ_IDX),
267 /* SENSOR_MI0360 1 */ 291 /* SENSOR_MO4000 3 */
268 (1 << INFRARED_IDX) | (1 << VFLIP_IDX) | (1 << FREQ_IDX),
269 /* SENSOR_MO4000 2 */
270 (1 << VFLIP_IDX) | (1 << FREQ_IDX), 292 (1 << VFLIP_IDX) | (1 << FREQ_IDX),
271 /* SENSOR_MT9V111 3 */ 293 /* SENSOR_MT9V111 4 */
272 (1 << INFRARED_IDX) | (1 << VFLIP_IDX) | (1 << FREQ_IDX), 294 (1 << INFRARED_IDX) | (1 << VFLIP_IDX) | (1 << FREQ_IDX),
273 /* SENSOR_OM6802 4 */ 295 /* SENSOR_OM6802 5 */
274 (1 << INFRARED_IDX), 296 (1 << INFRARED_IDX),
275 /* SENSOR_OV7630 5 */ 297 /* SENSOR_OV7630 6 */
276 (1 << INFRARED_IDX), 298 (1 << INFRARED_IDX),
277 /* SENSOR_OV7648 6 */ 299 /* SENSOR_OV7648 7 */
278 (1 << AUTOGAIN_IDX) | (1 << INFRARED_IDX) | (1 << VFLIP_IDX), 300 (1 << AUTOGAIN_IDX) | (1 << INFRARED_IDX) | (1 << VFLIP_IDX),
279 /* SENSOR_OV7660 7 */ 301 /* SENSOR_OV7660 8 */
280 (1 << AUTOGAIN_IDX) | (1 << INFRARED_IDX) | (1 << VFLIP_IDX) | 302 (1 << AUTOGAIN_IDX) | (1 << INFRARED_IDX) | (1 << VFLIP_IDX) |
281 (1 << FREQ_IDX), /* SENSOR_PO1030 8 */ 303 (1 << FREQ_IDX), /* SENSOR_PO1030 9 */
282 (1 << AUTOGAIN_IDX) | (1 << INFRARED_IDX) | (1 << VFLIP_IDX) | 304 (1 << AUTOGAIN_IDX) | (1 << INFRARED_IDX) | (1 << VFLIP_IDX) |
283 (1 << FREQ_IDX), /* SENSOR_SP80708 9 */ 305 (1 << FREQ_IDX), /* SENSOR_SP80708 10 */
284}; 306};
285 307
308static const struct v4l2_pix_format cif_mode[] = {
309 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
310 .bytesperline = 352,
311 .sizeimage = 352 * 288 * 4 / 8 + 590,
312 .colorspace = V4L2_COLORSPACE_JPEG,
313 .priv = 0},
314};
286static const struct v4l2_pix_format vga_mode[] = { 315static const struct v4l2_pix_format vga_mode[] = {
287 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 316 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
288 .bytesperline = 160, 317 .bytesperline = 160,
@@ -302,6 +331,17 @@ static const struct v4l2_pix_format vga_mode[] = {
302 .priv = 0}, 331 .priv = 0},
303}; 332};
304 333
334static const u8 sn_adcm1700[0x1c] = {
335/* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */
336 0x00, 0x43, 0x60, 0x00, 0x1a, 0x00, 0x00, 0x00,
337/* reg8 reg9 rega regb regc regd rege regf */
338 0x80, 0x51, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
339/* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */
340 0x03, 0x00, 0x05, 0x01, 0x05, 0x16, 0x12, 0x42,
341/* reg18 reg19 reg1a reg1b */
342 0x06, 0x00, 0x00, 0x00
343};
344
305/*Data from sn9c102p+hv7131r */ 345/*Data from sn9c102p+hv7131r */
306static const u8 sn_hv7131[0x1c] = { 346static const u8 sn_hv7131[0x1c] = {
307/* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ 347/* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */
@@ -415,6 +455,7 @@ static const u8 sn_sp80708[0x1c] = {
415 455
416/* sequence specific to the sensors - !! index = SENSOR_xxx */ 456/* sequence specific to the sensors - !! index = SENSOR_xxx */
417static const u8 *sn_tb[] = { 457static const u8 *sn_tb[] = {
458 sn_adcm1700,
418 sn_hv7131, 459 sn_hv7131,
419 sn_mi0360, 460 sn_mi0360,
420 sn_mo4000, 461 sn_mo4000,
@@ -432,6 +473,11 @@ static const u8 gamma_def[17] = {
432 0x00, 0x2d, 0x46, 0x5a, 0x6c, 0x7c, 0x8b, 0x99, 473 0x00, 0x2d, 0x46, 0x5a, 0x6c, 0x7c, 0x8b, 0x99,
433 0xa6, 0xb2, 0xbf, 0xca, 0xd5, 0xe0, 0xeb, 0xf5, 0xff 474 0xa6, 0xb2, 0xbf, 0xca, 0xd5, 0xe0, 0xeb, 0xf5, 0xff
434}; 475};
476/* gamma for sensor ADCM1700 */
477static const u8 gamma_spec_0[17] = {
478 0x0f, 0x39, 0x5a, 0x74, 0x86, 0x95, 0xa6, 0xb4,
479 0xbd, 0xc4, 0xcc, 0xd4, 0xd5, 0xde, 0xe4, 0xed, 0xf5
480};
435/* gamma for sensors HV7131R and MT9V111 */ 481/* gamma for sensors HV7131R and MT9V111 */
436static const u8 gamma_spec_1[17] = { 482static const u8 gamma_spec_1[17] = {
437 0x08, 0x3a, 0x52, 0x65, 0x75, 0x83, 0x91, 0x9d, 483 0x08, 0x3a, 0x52, 0x65, 0x75, 0x83, 0x91, 0x9d,
@@ -450,6 +496,42 @@ static const u8 reg84[] = {
450 0x3e, 0x00, 0xcd, 0x0f, 0xf7, 0x0f, /* VR VG VB */ 496 0x3e, 0x00, 0xcd, 0x0f, 0xf7, 0x0f, /* VR VG VB */
451 0x00, 0x00, 0x00 /* YUV offsets */ 497 0x00, 0x00, 0x00 /* YUV offsets */
452}; 498};
499static const u8 adcm1700_sensor_init[][8] = {
500 {0xa0, 0x51, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x10},
501 {0xb0, 0x51, 0x04, 0x08, 0x00, 0x00, 0x00, 0x10}, /* reset */
502 {0xdd, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
503 {0xb0, 0x51, 0x04, 0x00, 0x00, 0x00, 0x00, 0x10},
504 {0xdd, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
505 {0xb0, 0x51, 0x0c, 0xe0, 0x2e, 0x00, 0x00, 0x10},
506 {0xb0, 0x51, 0x10, 0x02, 0x02, 0x00, 0x00, 0x10},
507 {0xb0, 0x51, 0x14, 0x0e, 0x0e, 0x00, 0x00, 0x10},
508 {0xb0, 0x51, 0x1c, 0x00, 0x80, 0x00, 0x00, 0x10},
509 {0xb0, 0x51, 0x20, 0x01, 0x00, 0x00, 0x00, 0x10},
510 {0xdd, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
511 {0xb0, 0x51, 0x04, 0x04, 0x00, 0x00, 0x00, 0x10},
512 {0xdd, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
513 {0xb0, 0x51, 0x04, 0x01, 0x00, 0x00, 0x00, 0x10},
514 {0xa0, 0x51, 0xfe, 0x10, 0x00, 0x00, 0x00, 0x10},
515 {0xb0, 0x51, 0x14, 0x01, 0x00, 0x00, 0x00, 0x10},
516 {0xb0, 0x51, 0x32, 0x00, 0x00, 0x00, 0x00, 0x10},
517 {}
518};
519static const u8 adcm1700_sensor_param1[][8] = {
520 {0xb0, 0x51, 0x26, 0xf9, 0x01, 0x00, 0x00, 0x10}, /* exposure? */
521 {0xd0, 0x51, 0x1e, 0x8e, 0x8e, 0x8e, 0x8e, 0x10},
522
523 {0xa0, 0x51, 0xfe, 0x01, 0x00, 0x00, 0x00, 0x10},
524 {0xb0, 0x51, 0x00, 0x02, 0x00, 0x00, 0x00, 0x10},
525 {0xa0, 0x51, 0xfe, 0x10, 0x00, 0x00, 0x00, 0x10},
526 {0xb0, 0x51, 0x32, 0x00, 0x72, 0x00, 0x00, 0x10},
527 {0xd0, 0x51, 0x1e, 0xbe, 0xd7, 0xe8, 0xbe, 0x10}, /* exposure? */
528
529 {0xa0, 0x51, 0xfe, 0x01, 0x00, 0x00, 0x00, 0x10},
530 {0xb0, 0x51, 0x00, 0x02, 0x00, 0x00, 0x00, 0x10},
531 {0xa0, 0x51, 0xfe, 0x10, 0x00, 0x00, 0x00, 0x10},
532 {0xb0, 0x51, 0x32, 0x00, 0xa2, 0x00, 0x00, 0x10},
533 {}
534};
453static const u8 hv7131r_sensor_init[][8] = { 535static const u8 hv7131r_sensor_init[][8] = {
454 {0xc1, 0x11, 0x01, 0x08, 0x01, 0x00, 0x00, 0x10}, 536 {0xc1, 0x11, 0x01, 0x08, 0x01, 0x00, 0x00, 0x10},
455 {0xb1, 0x11, 0x34, 0x17, 0x7f, 0x00, 0x00, 0x10}, 537 {0xb1, 0x11, 0x34, 0x17, 0x7f, 0x00, 0x00, 0x10},
@@ -986,17 +1068,18 @@ static const u8 sp80708_sensor_param1[][8] = {
986 {} 1068 {}
987}; 1069};
988 1070
989static const u8 (*sensor_init[10])[8] = { 1071static const u8 (*sensor_init[11])[8] = {
990 hv7131r_sensor_init, /* HV7131R 0 */ 1072 adcm1700_sensor_init, /* ADCM1700 0 */
991 mi0360_sensor_init, /* MI0360 1 */ 1073 hv7131r_sensor_init, /* HV7131R 1 */
992 mo4000_sensor_init, /* MO4000 2 */ 1074 mi0360_sensor_init, /* MI0360 2 */
993 mt9v111_sensor_init, /* MT9V111 3 */ 1075 mo4000_sensor_init, /* MO4000 3 */
994 om6802_sensor_init, /* OM6802 4 */ 1076 mt9v111_sensor_init, /* MT9V111 4 */
995 ov7630_sensor_init, /* OV7630 5 */ 1077 om6802_sensor_init, /* OM6802 5 */
996 ov7648_sensor_init, /* OV7648 6 */ 1078 ov7630_sensor_init, /* OV7630 6 */
997 ov7660_sensor_init, /* OV7660 7 */ 1079 ov7648_sensor_init, /* OV7648 7 */
998 po1030_sensor_init, /* PO1030 8 */ 1080 ov7660_sensor_init, /* OV7660 8 */
999 sp80708_sensor_init, /* SP80708 9 */ 1081 po1030_sensor_init, /* PO1030 9 */
1082 sp80708_sensor_init, /* SP80708 10 */
1000}; 1083};
1001 1084
1002/* read <len> bytes to gspca_dev->usb_buf */ 1085/* read <len> bytes to gspca_dev->usb_buf */
@@ -1064,6 +1147,7 @@ static void i2c_w1(struct gspca_dev *gspca_dev, u8 reg, u8 val)
1064 1147
1065 PDEBUG(D_USBO, "i2c_w2 [%02x] = %02x", reg, val); 1148 PDEBUG(D_USBO, "i2c_w2 [%02x] = %02x", reg, val);
1066 switch (sd->sensor) { 1149 switch (sd->sensor) {
1150 case SENSOR_ADCM1700:
1067 case SENSOR_OM6802: /* i2c command = a0 (100 kHz) */ 1151 case SENSOR_OM6802: /* i2c command = a0 (100 kHz) */
1068 gspca_dev->usb_buf[0] = 0x80 | (2 << 4); 1152 gspca_dev->usb_buf[0] = 0x80 | (2 << 4);
1069 break; 1153 break;
@@ -1110,6 +1194,7 @@ static void i2c_r(struct gspca_dev *gspca_dev, u8 reg, int len)
1110 u8 mode[8]; 1194 u8 mode[8];
1111 1195
1112 switch (sd->sensor) { 1196 switch (sd->sensor) {
1197 case SENSOR_ADCM1700:
1113 case SENSOR_OM6802: /* i2c command = 90 (100 kHz) */ 1198 case SENSOR_OM6802: /* i2c command = 90 (100 kHz) */
1114 mode[0] = 0x80 | 0x10; 1199 mode[0] = 0x80 | 0x10;
1115 break; 1200 break;
@@ -1260,7 +1345,8 @@ static void bridge_init(struct gspca_dev *gspca_dev,
1260 {0x00, 0x40, 0x38, 0x30, 0x00, 0x20}; 1345 {0x00, 0x40, 0x38, 0x30, 0x00, 0x20};
1261 static const u8 regd4[] = {0x60, 0x00, 0x00}; 1346 static const u8 regd4[] = {0x60, 0x00, 0x00};
1262 1347
1263 reg_w1(gspca_dev, 0xf1, 0x00); 1348 /* sensor clock already enabled in sd_init */
1349 /* reg_w1(gspca_dev, 0xf1, 0x00); */
1264 reg_w1(gspca_dev, 0x01, sn9c1xx[1]); 1350 reg_w1(gspca_dev, 0x01, sn9c1xx[1]);
1265 1351
1266 /* configure gpio */ 1352 /* configure gpio */
@@ -1284,6 +1370,12 @@ static void bridge_init(struct gspca_dev *gspca_dev,
1284 reg_w(gspca_dev, 0x03, &sn9c1xx[3], 0x0f); 1370 reg_w(gspca_dev, 0x03, &sn9c1xx[3], 0x0f);
1285 1371
1286 switch (sd->sensor) { 1372 switch (sd->sensor) {
1373 case SENSOR_ADCM1700:
1374 reg_w1(gspca_dev, 0x01, 0x43);
1375 reg_w1(gspca_dev, 0x17, 0x62);
1376 reg_w1(gspca_dev, 0x01, 0x42);
1377 reg_w1(gspca_dev, 0x01, 0x42);
1378 break;
1287 case SENSOR_MT9V111: 1379 case SENSOR_MT9V111:
1288 reg_w1(gspca_dev, 0x01, 0x61); 1380 reg_w1(gspca_dev, 0x01, 0x61);
1289 reg_w1(gspca_dev, 0x17, 0x61); 1381 reg_w1(gspca_dev, 0x17, 0x61);
@@ -1357,14 +1449,19 @@ static int sd_config(struct gspca_dev *gspca_dev,
1357 struct sd *sd = (struct sd *) gspca_dev; 1449 struct sd *sd = (struct sd *) gspca_dev;
1358 struct cam *cam; 1450 struct cam *cam;
1359 1451
1360 cam = &gspca_dev->cam;
1361 cam->cam_mode = vga_mode;
1362 cam->nmodes = ARRAY_SIZE(vga_mode);
1363 cam->npkt = 24; /* 24 packets per ISOC message */
1364
1365 sd->bridge = id->driver_info >> 16; 1452 sd->bridge = id->driver_info >> 16;
1366 sd->sensor = id->driver_info; 1453 sd->sensor = id->driver_info;
1367 1454
1455 cam = &gspca_dev->cam;
1456 if (sd->sensor == SENSOR_ADCM1700) {
1457 cam->cam_mode = cif_mode;
1458 cam->nmodes = ARRAY_SIZE(cif_mode);
1459 } else {
1460 cam->cam_mode = vga_mode;
1461 cam->nmodes = ARRAY_SIZE(vga_mode);
1462 }
1463 cam->npkt = 24; /* 24 packets per ISOC message */
1464
1368 sd->brightness = BRIGHTNESS_DEF; 1465 sd->brightness = BRIGHTNESS_DEF;
1369 sd->contrast = CONTRAST_DEF; 1466 sd->contrast = CONTRAST_DEF;
1370 sd->colors = COLOR_DEF; 1467 sd->colors = COLOR_DEF;
@@ -1374,6 +1471,14 @@ static int sd_config(struct gspca_dev *gspca_dev,
1374 sd->autogain = AUTOGAIN_DEF; 1471 sd->autogain = AUTOGAIN_DEF;
1375 sd->ag_cnt = -1; 1472 sd->ag_cnt = -1;
1376 sd->vflip = VFLIP_DEF; 1473 sd->vflip = VFLIP_DEF;
1474 switch (sd->sensor) {
1475 case SENSOR_OM6802:
1476 sd->sharpness = 0x10;
1477 break;
1478 default:
1479 sd->sharpness = SHARPNESS_DEF;
1480 break;
1481 }
1377 sd->infrared = INFRARED_DEF; 1482 sd->infrared = INFRARED_DEF;
1378 sd->freq = FREQ_DEF; 1483 sd->freq = FREQ_DEF;
1379 sd->quality = QUALITY_DEF; 1484 sd->quality = QUALITY_DEF;
@@ -1433,7 +1538,9 @@ static int sd_init(struct gspca_dev *gspca_dev)
1433 break; 1538 break;
1434 } 1539 }
1435 1540
1436 reg_w1(gspca_dev, 0xf1, 0x01); 1541 /* Note we do not disable the sensor clock here (power saving mode),
1542 as that also disables the button on the cam. */
1543 reg_w1(gspca_dev, 0xf1, 0x00);
1437 1544
1438 /* set the i2c address */ 1545 /* set the i2c address */
1439 sn9c1xx = sn_tb[sd->sensor]; 1546 sn9c1xx = sn_tb[sd->sensor];
@@ -1543,6 +1650,10 @@ static void setbrightness(struct gspca_dev *gspca_dev)
1543 1650
1544 k2 = ((int) sd->brightness - 0x8000) >> 10; 1651 k2 = ((int) sd->brightness - 0x8000) >> 10;
1545 switch (sd->sensor) { 1652 switch (sd->sensor) {
1653 case SENSOR_ADCM1700:
1654 if (k2 > 0x1f)
1655 k2 = 0; /* only positive Y offset */
1656 break;
1546 case SENSOR_HV7131R: 1657 case SENSOR_HV7131R:
1547 expo = sd->brightness << 4; 1658 expo = sd->brightness << 4;
1548 if (expo > 0x002dc6c0) 1659 if (expo > 0x002dc6c0)
@@ -1625,6 +1736,9 @@ static void setgamma(struct gspca_dev *gspca_dev)
1625 }; 1736 };
1626 1737
1627 switch (sd->sensor) { 1738 switch (sd->sensor) {
1739 case SENSOR_ADCM1700:
1740 gamma_base = gamma_spec_0;
1741 break;
1628 case SENSOR_HV7131R: 1742 case SENSOR_HV7131R:
1629 case SENSOR_MT9V111: 1743 case SENSOR_MT9V111:
1630 gamma_base = gamma_spec_1; 1744 gamma_base = gamma_spec_1;
@@ -1670,23 +1784,39 @@ static void setautogain(struct gspca_dev *gspca_dev)
1670 sd->ag_cnt = -1; 1784 sd->ag_cnt = -1;
1671} 1785}
1672 1786
1673/* ov7630/ov7648 only */ 1787/* hv7131r/ov7630/ov7648 only */
1674static void setvflip(struct sd *sd) 1788static void setvflip(struct sd *sd)
1675{ 1789{
1676 u8 comn; 1790 u8 comn;
1677 1791
1678 if (sd->gspca_dev.ctrl_dis & (1 << VFLIP_IDX)) 1792 if (sd->gspca_dev.ctrl_dis & (1 << VFLIP_IDX))
1679 return; 1793 return;
1680 if (sd->sensor == SENSOR_OV7630) { 1794 switch (sd->sensor) {
1795 case SENSOR_HV7131R:
1796 comn = 0x18; /* clkdiv = 1, ablcen = 1 */
1797 if (sd->vflip)
1798 comn |= 0x01;
1799 i2c_w1(&sd->gspca_dev, 0x01, comn); /* sctra */
1800 break;
1801 case SENSOR_OV7630:
1681 comn = 0x02; 1802 comn = 0x02;
1682 if (!sd->vflip) 1803 if (!sd->vflip)
1683 comn |= 0x80; 1804 comn |= 0x80;
1684 } else { 1805 i2c_w1(&sd->gspca_dev, 0x75, comn);
1806 break;
1807 default:
1808/* case SENSOR_OV7648: */
1685 comn = 0x06; 1809 comn = 0x06;
1686 if (sd->vflip) 1810 if (sd->vflip)
1687 comn |= 0x80; 1811 comn |= 0x80;
1812 i2c_w1(&sd->gspca_dev, 0x75, comn);
1813 break;
1688 } 1814 }
1689 i2c_w1(&sd->gspca_dev, 0x75, comn); 1815}
1816
1817static void setsharpness(struct sd *sd)
1818{
1819 reg_w1(&sd->gspca_dev, 0x99, sd->sharpness);
1690} 1820}
1691 1821
1692static void setinfrared(struct sd *sd) 1822static void setinfrared(struct sd *sd)
@@ -1804,6 +1934,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
1804 int mode; 1934 int mode;
1805 static const u8 C0[] = { 0x2d, 0x2d, 0x3a, 0x05, 0x04, 0x3f }; 1935 static const u8 C0[] = { 0x2d, 0x2d, 0x3a, 0x05, 0x04, 0x3f };
1806 static const u8 CA[] = { 0x28, 0xd8, 0x14, 0xec }; 1936 static const u8 CA[] = { 0x28, 0xd8, 0x14, 0xec };
1937 static const u8 CA_adcm1700[] =
1938 { 0x14, 0xec, 0x0a, 0xf6 };
1807 static const u8 CE[] = { 0x32, 0xdd, 0x2d, 0xdd }; /* MI0360 */ 1939 static const u8 CE[] = { 0x32, 0xdd, 0x2d, 0xdd }; /* MI0360 */
1808 static const u8 CE_ov76xx[] = 1940 static const u8 CE_ov76xx[] =
1809 { 0x32, 0xdd, 0x32, 0xdd }; 1941 { 0x32, 0xdd, 0x32, 0xdd };
@@ -1824,6 +1956,9 @@ static int sd_start(struct gspca_dev *gspca_dev)
1824 i2c_w_seq(gspca_dev, sensor_init[sd->sensor]); 1956 i2c_w_seq(gspca_dev, sensor_init[sd->sensor]);
1825 1957
1826 switch (sd->sensor) { 1958 switch (sd->sensor) {
1959 case SENSOR_ADCM1700:
1960 reg2 = 0x60;
1961 break;
1827 case SENSOR_OM6802: 1962 case SENSOR_OM6802:
1828 reg2 = 0x71; 1963 reg2 = 0x71;
1829 break; 1964 break;
@@ -1842,17 +1977,28 @@ static int sd_start(struct gspca_dev *gspca_dev)
1842 reg_w1(gspca_dev, 0x12, sn9c1xx[0x12]); 1977 reg_w1(gspca_dev, 0x12, sn9c1xx[0x12]);
1843 reg_w1(gspca_dev, 0x13, sn9c1xx[0x13]); 1978 reg_w1(gspca_dev, 0x13, sn9c1xx[0x13]);
1844 reg_w1(gspca_dev, 0x18, sn9c1xx[0x18]); 1979 reg_w1(gspca_dev, 0x18, sn9c1xx[0x18]);
1845 reg_w1(gspca_dev, 0xd2, 0x6a); /* DC29 */ 1980 if (sd->sensor == SENSOR_ADCM1700) {
1846 reg_w1(gspca_dev, 0xd3, 0x50); 1981 reg_w1(gspca_dev, 0xd2, 0x3a); /* AE_H_SIZE = 116 */
1982 reg_w1(gspca_dev, 0xd3, 0x30); /* AE_V_SIZE = 96 */
1983 } else {
1984 reg_w1(gspca_dev, 0xd2, 0x6a); /* AE_H_SIZE = 212 */
1985 reg_w1(gspca_dev, 0xd3, 0x50); /* AE_V_SIZE = 160 */
1986 }
1847 reg_w1(gspca_dev, 0xc6, 0x00); 1987 reg_w1(gspca_dev, 0xc6, 0x00);
1848 reg_w1(gspca_dev, 0xc7, 0x00); 1988 reg_w1(gspca_dev, 0xc7, 0x00);
1849 reg_w1(gspca_dev, 0xc8, 0x50); 1989 if (sd->sensor == SENSOR_ADCM1700) {
1850 reg_w1(gspca_dev, 0xc9, 0x3c); 1990 reg_w1(gspca_dev, 0xc8, 0x2c); /* AW_H_STOP = 352 */
1991 reg_w1(gspca_dev, 0xc9, 0x24); /* AW_V_STOP = 288 */
1992 } else {
1993 reg_w1(gspca_dev, 0xc8, 0x50); /* AW_H_STOP = 640 */
1994 reg_w1(gspca_dev, 0xc9, 0x3c); /* AW_V_STOP = 480 */
1995 }
1851 reg_w1(gspca_dev, 0x18, sn9c1xx[0x18]); 1996 reg_w1(gspca_dev, 0x18, sn9c1xx[0x18]);
1852 switch (sd->sensor) { 1997 switch (sd->sensor) {
1853 case SENSOR_MT9V111: 1998 case SENSOR_MT9V111:
1854 reg17 = 0xe0; 1999 reg17 = 0xe0;
1855 break; 2000 break;
2001 case SENSOR_ADCM1700:
1856 case SENSOR_OV7630: 2002 case SENSOR_OV7630:
1857 reg17 = 0xe2; 2003 reg17 = 0xe2;
1858 break; 2004 break;
@@ -1870,44 +2016,39 @@ static int sd_start(struct gspca_dev *gspca_dev)
1870 break; 2016 break;
1871 } 2017 }
1872 reg_w1(gspca_dev, 0x17, reg17); 2018 reg_w1(gspca_dev, 0x17, reg17);
1873/* set reg1 was here */ 2019
1874 reg_w1(gspca_dev, 0x05, sn9c1xx[5]); /* red */ 2020 reg_w1(gspca_dev, 0x05, 0x00); /* red */
1875 reg_w1(gspca_dev, 0x07, sn9c1xx[7]); /* green */ 2021 reg_w1(gspca_dev, 0x07, 0x00); /* green */
1876 reg_w1(gspca_dev, 0x06, sn9c1xx[6]); /* blue */ 2022 reg_w1(gspca_dev, 0x06, 0x00); /* blue */
1877 reg_w1(gspca_dev, 0x14, sn9c1xx[0x14]); 2023 reg_w1(gspca_dev, 0x14, sn9c1xx[0x14]);
1878 2024
1879 setgamma(gspca_dev); 2025 setgamma(gspca_dev);
1880 2026
2027/*fixme: 8 times with all zeroes and 1 or 2 times with normal values */
1881 for (i = 0; i < 8; i++) 2028 for (i = 0; i < 8; i++)
1882 reg_w(gspca_dev, 0x84, reg84, sizeof reg84); 2029 reg_w(gspca_dev, 0x84, reg84, sizeof reg84);
1883 switch (sd->sensor) { 2030 switch (sd->sensor) {
2031 case SENSOR_ADCM1700:
2032 case SENSOR_OV7660:
2033 case SENSOR_SP80708:
2034 reg_w1(gspca_dev, 0x9a, 0x05);
2035 break;
1884 case SENSOR_MT9V111: 2036 case SENSOR_MT9V111:
1885 reg_w1(gspca_dev, 0x9a, 0x07); 2037 reg_w1(gspca_dev, 0x9a, 0x07);
1886 reg_w1(gspca_dev, 0x99, 0x59);
1887 break;
1888 case SENSOR_OM6802:
1889 reg_w1(gspca_dev, 0x9a, 0x08);
1890 reg_w1(gspca_dev, 0x99, 0x10);
1891 break; 2038 break;
1892 case SENSOR_OV7648: 2039 case SENSOR_OV7648:
1893 reg_w1(gspca_dev, 0x9a, 0x0a); 2040 reg_w1(gspca_dev, 0x9a, 0x0a);
1894 reg_w1(gspca_dev, 0x99, 0x60);
1895 break;
1896 case SENSOR_OV7660:
1897 case SENSOR_SP80708:
1898 reg_w1(gspca_dev, 0x9a, 0x05);
1899 reg_w1(gspca_dev, 0x99, 0x59);
1900 break; 2041 break;
1901 default: 2042 default:
1902 reg_w1(gspca_dev, 0x9a, 0x08); 2043 reg_w1(gspca_dev, 0x9a, 0x08);
1903 reg_w1(gspca_dev, 0x99, 0x59);
1904 break; 2044 break;
1905 } 2045 }
2046 setsharpness(sd);
1906 2047
1907 reg_w(gspca_dev, 0x84, reg84, sizeof reg84); 2048 reg_w(gspca_dev, 0x84, reg84, sizeof reg84);
1908 reg_w1(gspca_dev, 0x05, sn9c1xx[5]); /* red */ 2049 reg_w1(gspca_dev, 0x05, 0x20); /* red */
1909 reg_w1(gspca_dev, 0x07, sn9c1xx[7]); /* green */ 2050 reg_w1(gspca_dev, 0x07, 0x20); /* green */
1910 reg_w1(gspca_dev, 0x06, sn9c1xx[6]); /* blue */ 2051 reg_w1(gspca_dev, 0x06, 0x20); /* blue */
1911 2052
1912 init = NULL; 2053 init = NULL;
1913 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv; 2054 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
@@ -1917,6 +2058,11 @@ static int sd_start(struct gspca_dev *gspca_dev)
1917 reg1 = 0x06; /* 640x480: clk 24Mhz, video trf enable */ 2058 reg1 = 0x06; /* 640x480: clk 24Mhz, video trf enable */
1918 reg17 = 0x61; /* 0x:20: enable sensor clock */ 2059 reg17 = 0x61; /* 0x:20: enable sensor clock */
1919 switch (sd->sensor) { 2060 switch (sd->sensor) {
2061 case SENSOR_ADCM1700:
2062 init = adcm1700_sensor_param1;
2063 reg1 = 0x46;
2064 reg17 = 0xe2;
2065 break;
1920 case SENSOR_MO4000: 2066 case SENSOR_MO4000:
1921 if (mode) { 2067 if (mode) {
1922/* reg1 = 0x46; * 320 clk 48Mhz 60fp/s */ 2068/* reg1 = 0x46; * 320 clk 48Mhz 60fp/s */
@@ -1940,7 +2086,6 @@ static int sd_start(struct gspca_dev *gspca_dev)
1940 reg17 = 0x64; /* 640 MCKSIZE */ 2086 reg17 = 0x64; /* 640 MCKSIZE */
1941 break; 2087 break;
1942 case SENSOR_OV7630: 2088 case SENSOR_OV7630:
1943 setvflip(sd);
1944 reg17 = 0xe2; 2089 reg17 = 0xe2;
1945 reg1 = 0x44; 2090 reg1 = 0x44;
1946 break; 2091 break;
@@ -1986,8 +2131,12 @@ static int sd_start(struct gspca_dev *gspca_dev)
1986 } 2131 }
1987 2132
1988 reg_w(gspca_dev, 0xc0, C0, 6); 2133 reg_w(gspca_dev, 0xc0, C0, 6);
1989 reg_w(gspca_dev, 0xca, CA, 4); 2134 if (sd->sensor == SENSOR_ADCM1700)
2135 reg_w(gspca_dev, 0xca, CA_adcm1700, 4);
2136 else
2137 reg_w(gspca_dev, 0xca, CA, 4);
1990 switch (sd->sensor) { 2138 switch (sd->sensor) {
2139 case SENSOR_ADCM1700:
1991 case SENSOR_OV7630: 2140 case SENSOR_OV7630:
1992 case SENSOR_OV7648: 2141 case SENSOR_OV7648:
1993 case SENSOR_OV7660: 2142 case SENSOR_OV7660:
@@ -2008,11 +2157,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
2008 reg_w1(gspca_dev, 0x17, reg17); 2157 reg_w1(gspca_dev, 0x17, reg17);
2009 reg_w1(gspca_dev, 0x01, reg1); 2158 reg_w1(gspca_dev, 0x01, reg1);
2010 2159
2011 switch (sd->sensor) { 2160 setvflip(sd);
2012 case SENSOR_OV7630:
2013 setvflip(sd);
2014 break;
2015 }
2016 setbrightness(gspca_dev); 2161 setbrightness(gspca_dev);
2017 setcontrast(gspca_dev); 2162 setcontrast(gspca_dev);
2018 setautogain(gspca_dev); 2163 setautogain(gspca_dev);
@@ -2056,7 +2201,8 @@ static void sd_stopN(struct gspca_dev *gspca_dev)
2056 reg_w1(gspca_dev, 0x17, sn9c1xx[0x17]); 2201 reg_w1(gspca_dev, 0x17, sn9c1xx[0x17]);
2057 reg_w1(gspca_dev, 0x01, sn9c1xx[1]); 2202 reg_w1(gspca_dev, 0x01, sn9c1xx[1]);
2058 reg_w1(gspca_dev, 0x01, data); 2203 reg_w1(gspca_dev, 0x01, data);
2059 reg_w1(gspca_dev, 0xf1, 0x00); 2204 /* Don't disable sensor clock as that disables the button on the cam */
2205 /* reg_w1(gspca_dev, 0xf1, 0x01); */
2060} 2206}
2061 2207
2062static void sd_stop0(struct gspca_dev *gspca_dev) 2208static void sd_stop0(struct gspca_dev *gspca_dev)
@@ -2288,6 +2434,24 @@ static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)
2288 return 0; 2434 return 0;
2289} 2435}
2290 2436
2437static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val)
2438{
2439 struct sd *sd = (struct sd *) gspca_dev;
2440
2441 sd->sharpness = val;
2442 if (gspca_dev->streaming)
2443 setsharpness(sd);
2444 return 0;
2445}
2446
2447static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val)
2448{
2449 struct sd *sd = (struct sd *) gspca_dev;
2450
2451 *val = sd->sharpness;
2452 return 0;
2453}
2454
2291static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val) 2455static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
2292{ 2456{
2293 struct sd *sd = (struct sd *) gspca_dev; 2457 struct sd *sd = (struct sd *) gspca_dev;
@@ -2391,6 +2555,25 @@ static int sd_querymenu(struct gspca_dev *gspca_dev,
2391 return -EINVAL; 2555 return -EINVAL;
2392} 2556}
2393 2557
2558#ifdef CONFIG_INPUT
2559static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
2560 u8 *data, /* interrupt packet data */
2561 int len) /* interrupt packet length */
2562{
2563 int ret = -EINVAL;
2564
2565 if (len == 1 && data[0] == 1) {
2566 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 1);
2567 input_sync(gspca_dev->input_dev);
2568 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
2569 input_sync(gspca_dev->input_dev);
2570 ret = 0;
2571 }
2572
2573 return ret;
2574}
2575#endif
2576
2394/* sub-driver description */ 2577/* sub-driver description */
2395static const struct sd_desc sd_desc = { 2578static const struct sd_desc sd_desc = {
2396 .name = MODULE_NAME, 2579 .name = MODULE_NAME,
@@ -2406,6 +2589,9 @@ static const struct sd_desc sd_desc = {
2406 .get_jcomp = sd_get_jcomp, 2589 .get_jcomp = sd_get_jcomp,
2407 .set_jcomp = sd_set_jcomp, 2590 .set_jcomp = sd_set_jcomp,
2408 .querymenu = sd_querymenu, 2591 .querymenu = sd_querymenu,
2592#ifdef CONFIG_INPUT
2593 .int_pkt_scan = sd_int_pkt_scan,
2594#endif
2409}; 2595};
2410 2596
2411/* -- module initialisation -- */ 2597/* -- module initialisation -- */
@@ -2472,6 +2658,7 @@ static const __devinitdata struct usb_device_id device_table[] = {
2472/* {USB_DEVICE(0x0c45, 0x6142), BS(SN9C120, PO2030N)}, *sn9c120b*/ 2658/* {USB_DEVICE(0x0c45, 0x6142), BS(SN9C120, PO2030N)}, *sn9c120b*/
2473 {USB_DEVICE(0x0c45, 0x6143), BS(SN9C120, SP80708)}, /*sn9c120b*/ 2659 {USB_DEVICE(0x0c45, 0x6143), BS(SN9C120, SP80708)}, /*sn9c120b*/
2474 {USB_DEVICE(0x0c45, 0x6148), BS(SN9C120, OM6802)}, /*sn9c120b*/ 2660 {USB_DEVICE(0x0c45, 0x6148), BS(SN9C120, OM6802)}, /*sn9c120b*/
2661 {USB_DEVICE(0x0c45, 0x614a), BS(SN9C120, ADCM1700)}, /*sn9c120b*/
2475 {} 2662 {}
2476}; 2663};
2477MODULE_DEVICE_TABLE(usb, device_table); 2664MODULE_DEVICE_TABLE(usb, device_table);
diff --git a/drivers/media/video/gspca/spca500.c b/drivers/media/video/gspca/spca500.c
index fe46868a87f2..b866c73c97db 100644
--- a/drivers/media/video/gspca/spca500.c
+++ b/drivers/media/video/gspca/spca500.c
@@ -68,7 +68,7 @@ static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
68static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val); 68static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
69static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val); 69static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
70 70
71static struct ctrl sd_ctrls[] = { 71static const struct ctrl sd_ctrls[] = {
72 { 72 {
73 { 73 {
74 .id = V4L2_CID_BRIGHTNESS, 74 .id = V4L2_CID_BRIGHTNESS,
@@ -1047,7 +1047,7 @@ static int sd_get_jcomp(struct gspca_dev *gspca_dev,
1047} 1047}
1048 1048
1049/* sub-driver description */ 1049/* sub-driver description */
1050static struct sd_desc sd_desc = { 1050static const struct sd_desc sd_desc = {
1051 .name = MODULE_NAME, 1051 .name = MODULE_NAME,
1052 .ctrls = sd_ctrls, 1052 .ctrls = sd_ctrls,
1053 .nctrls = ARRAY_SIZE(sd_ctrls), 1053 .nctrls = ARRAY_SIZE(sd_ctrls),
diff --git a/drivers/media/video/gspca/spca501.c b/drivers/media/video/gspca/spca501.c
index 6761a3048a98..c99333933e32 100644
--- a/drivers/media/video/gspca/spca501.c
+++ b/drivers/media/video/gspca/spca501.c
@@ -59,7 +59,7 @@ static int sd_getblue_balance(struct gspca_dev *gspca_dev, __s32 *val);
59static int sd_setred_balance(struct gspca_dev *gspca_dev, __s32 val); 59static int sd_setred_balance(struct gspca_dev *gspca_dev, __s32 val);
60static int sd_getred_balance(struct gspca_dev *gspca_dev, __s32 *val); 60static int sd_getred_balance(struct gspca_dev *gspca_dev, __s32 *val);
61 61
62static struct ctrl sd_ctrls[] = { 62static const struct ctrl sd_ctrls[] = {
63#define MY_BRIGHTNESS 0 63#define MY_BRIGHTNESS 0
64 { 64 {
65 { 65 {
diff --git a/drivers/media/video/gspca/spca505.c b/drivers/media/video/gspca/spca505.c
index 0f9232ff1281..c576eed73abe 100644
--- a/drivers/media/video/gspca/spca505.c
+++ b/drivers/media/video/gspca/spca505.c
@@ -42,7 +42,7 @@ struct sd {
42static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val); 42static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
43static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val); 43static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
44 44
45static struct ctrl sd_ctrls[] = { 45static const struct ctrl sd_ctrls[] = {
46 { 46 {
47 { 47 {
48 .id = V4L2_CID_BRIGHTNESS, 48 .id = V4L2_CID_BRIGHTNESS,
diff --git a/drivers/media/video/gspca/spca506.c b/drivers/media/video/gspca/spca506.c
index 39257e4e074f..89fec4c500af 100644
--- a/drivers/media/video/gspca/spca506.c
+++ b/drivers/media/video/gspca/spca506.c
@@ -51,7 +51,7 @@ static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
51static int sd_sethue(struct gspca_dev *gspca_dev, __s32 val); 51static int sd_sethue(struct gspca_dev *gspca_dev, __s32 val);
52static int sd_gethue(struct gspca_dev *gspca_dev, __s32 *val); 52static int sd_gethue(struct gspca_dev *gspca_dev, __s32 *val);
53 53
54static struct ctrl sd_ctrls[] = { 54static const struct ctrl sd_ctrls[] = {
55#define SD_BRIGHTNESS 0 55#define SD_BRIGHTNESS 0
56 { 56 {
57 { 57 {
@@ -673,7 +673,7 @@ static int sd_gethue(struct gspca_dev *gspca_dev, __s32 *val)
673} 673}
674 674
675/* sub-driver description */ 675/* sub-driver description */
676static struct sd_desc sd_desc = { 676static const struct sd_desc sd_desc = {
677 .name = MODULE_NAME, 677 .name = MODULE_NAME,
678 .ctrls = sd_ctrls, 678 .ctrls = sd_ctrls,
679 .nctrls = ARRAY_SIZE(sd_ctrls), 679 .nctrls = ARRAY_SIZE(sd_ctrls),
diff --git a/drivers/media/video/gspca/spca508.c b/drivers/media/video/gspca/spca508.c
index 4d8e6cf75d55..15b2eef8a3f6 100644
--- a/drivers/media/video/gspca/spca508.c
+++ b/drivers/media/video/gspca/spca508.c
@@ -45,7 +45,7 @@ struct sd {
45static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val); 45static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
46static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val); 46static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
47 47
48static struct ctrl sd_ctrls[] = { 48static const struct ctrl sd_ctrls[] = {
49 { 49 {
50 { 50 {
51 .id = V4L2_CID_BRIGHTNESS, 51 .id = V4L2_CID_BRIGHTNESS,
diff --git a/drivers/media/video/gspca/spca561.c b/drivers/media/video/gspca/spca561.c
index 58c2f0039af1..dc7f2b0fbc79 100644
--- a/drivers/media/video/gspca/spca561.c
+++ b/drivers/media/video/gspca/spca561.c
@@ -922,7 +922,7 @@ static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val)
922} 922}
923 923
924/* control tables */ 924/* control tables */
925static struct ctrl sd_ctrls_12a[] = { 925static const struct ctrl sd_ctrls_12a[] = {
926 { 926 {
927 { 927 {
928 .id = V4L2_CID_HUE, 928 .id = V4L2_CID_HUE,
@@ -964,7 +964,7 @@ static struct ctrl sd_ctrls_12a[] = {
964 }, 964 },
965}; 965};
966 966
967static struct ctrl sd_ctrls_72a[] = { 967static const struct ctrl sd_ctrls_72a[] = {
968 { 968 {
969 { 969 {
970 .id = V4L2_CID_HUE, 970 .id = V4L2_CID_HUE,
diff --git a/drivers/media/video/gspca/sq905c.c b/drivers/media/video/gspca/sq905c.c
index d70b156872d6..e64662052992 100644
--- a/drivers/media/video/gspca/sq905c.c
+++ b/drivers/media/video/gspca/sq905c.c
@@ -47,6 +47,7 @@ MODULE_LICENSE("GPL");
47 47
48/* Commands. These go in the "value" slot. */ 48/* Commands. These go in the "value" slot. */
49#define SQ905C_CLEAR 0xa0 /* clear everything */ 49#define SQ905C_CLEAR 0xa0 /* clear everything */
50#define SQ905C_GET_ID 0x14f4 /* Read version number */
50#define SQ905C_CAPTURE_LOW 0xa040 /* Starts capture at 160x120 */ 51#define SQ905C_CAPTURE_LOW 0xa040 /* Starts capture at 160x120 */
51#define SQ905C_CAPTURE_MED 0x1440 /* Starts capture at 320x240 */ 52#define SQ905C_CAPTURE_MED 0x1440 /* Starts capture at 320x240 */
52#define SQ905C_CAPTURE_HI 0x2840 /* Starts capture at 320x240 */ 53#define SQ905C_CAPTURE_HI 0x2840 /* Starts capture at 320x240 */
@@ -101,6 +102,26 @@ static int sq905c_command(struct gspca_dev *gspca_dev, u16 command, u16 index)
101 return 0; 102 return 0;
102} 103}
103 104
105static int sq905c_read(struct gspca_dev *gspca_dev, u16 command, u16 index,
106 int size)
107{
108 int ret;
109
110 ret = usb_control_msg(gspca_dev->dev,
111 usb_rcvctrlpipe(gspca_dev->dev, 0),
112 USB_REQ_SYNCH_FRAME, /* request */
113 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
114 command, index, gspca_dev->usb_buf, size,
115 SQ905C_CMD_TIMEOUT);
116 if (ret < 0) {
117 PDEBUG(D_ERR, "%s: usb_control_msg failed (%d)",
118 __func__, ret);
119 return ret;
120 }
121
122 return 0;
123}
124
104/* This function is called as a workqueue function and runs whenever the camera 125/* This function is called as a workqueue function and runs whenever the camera
105 * is streaming data. Because it is a workqueue function it is allowed to sleep 126 * is streaming data. Because it is a workqueue function it is allowed to sleep
106 * so we can use synchronous USB calls. To avoid possible collisions with other 127 * so we can use synchronous USB calls. To avoid possible collisions with other
@@ -183,13 +204,34 @@ static int sd_config(struct gspca_dev *gspca_dev,
183{ 204{
184 struct cam *cam = &gspca_dev->cam; 205 struct cam *cam = &gspca_dev->cam;
185 struct sd *dev = (struct sd *) gspca_dev; 206 struct sd *dev = (struct sd *) gspca_dev;
207 int ret;
186 208
187 PDEBUG(D_PROBE, 209 PDEBUG(D_PROBE,
188 "SQ9050 camera detected" 210 "SQ9050 camera detected"
189 " (vid/pid 0x%04X:0x%04X)", id->idVendor, id->idProduct); 211 " (vid/pid 0x%04X:0x%04X)", id->idVendor, id->idProduct);
212
213 ret = sq905c_command(gspca_dev, SQ905C_GET_ID, 0);
214 if (ret < 0) {
215 PDEBUG(D_ERR, "Get version command failed");
216 return ret;
217 }
218
219 ret = sq905c_read(gspca_dev, 0xf5, 0, 20);
220 if (ret < 0) {
221 PDEBUG(D_ERR, "Reading version command failed");
222 return ret;
223 }
224 /* Note we leave out the usb id and the manufacturing date */
225 PDEBUG(D_PROBE,
226 "SQ9050 ID string: %02x - %02x %02x %02x %02x %02x %02x",
227 gspca_dev->usb_buf[3],
228 gspca_dev->usb_buf[14], gspca_dev->usb_buf[15],
229 gspca_dev->usb_buf[16], gspca_dev->usb_buf[17],
230 gspca_dev->usb_buf[18], gspca_dev->usb_buf[19]);
231
190 cam->cam_mode = sq905c_mode; 232 cam->cam_mode = sq905c_mode;
191 cam->nmodes = 2; 233 cam->nmodes = 2;
192 if (id->idProduct == 0x9050) 234 if (gspca_dev->usb_buf[15] == 0)
193 cam->nmodes = 1; 235 cam->nmodes = 1;
194 /* We don't use the buffer gspca allocates so make it small. */ 236 /* We don't use the buffer gspca allocates so make it small. */
195 cam->bulk_size = 32; 237 cam->bulk_size = 32;
@@ -258,6 +300,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
258static const __devinitdata struct usb_device_id device_table[] = { 300static const __devinitdata struct usb_device_id device_table[] = {
259 {USB_DEVICE(0x2770, 0x905c)}, 301 {USB_DEVICE(0x2770, 0x905c)},
260 {USB_DEVICE(0x2770, 0x9050)}, 302 {USB_DEVICE(0x2770, 0x9050)},
303 {USB_DEVICE(0x2770, 0x9052)},
261 {USB_DEVICE(0x2770, 0x913d)}, 304 {USB_DEVICE(0x2770, 0x913d)},
262 {} 305 {}
263}; 306};
diff --git a/drivers/media/video/gspca/stk014.c b/drivers/media/video/gspca/stk014.c
index 2e2935532d99..0fb534210a2c 100644
--- a/drivers/media/video/gspca/stk014.c
+++ b/drivers/media/video/gspca/stk014.c
@@ -53,7 +53,7 @@ static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
53static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val); 53static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
54static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val); 54static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
55 55
56static struct ctrl sd_ctrls[] = { 56static const struct ctrl sd_ctrls[] = {
57 { 57 {
58 { 58 {
59 .id = V4L2_CID_BRIGHTNESS, 59 .id = V4L2_CID_BRIGHTNESS,
diff --git a/drivers/media/video/gspca/stv0680.c b/drivers/media/video/gspca/stv0680.c
index 2a69d7ccb50d..e50dd7693f74 100644
--- a/drivers/media/video/gspca/stv0680.c
+++ b/drivers/media/video/gspca/stv0680.c
@@ -45,7 +45,7 @@ struct sd {
45}; 45};
46 46
47/* V4L2 controls supported by the driver */ 47/* V4L2 controls supported by the driver */
48static struct ctrl sd_ctrls[] = { 48static const struct ctrl sd_ctrls[] = {
49}; 49};
50 50
51static int stv_sndctrl(struct gspca_dev *gspca_dev, int set, u8 req, u16 val, 51static int stv_sndctrl(struct gspca_dev *gspca_dev, int set, u8 req, u16 val,
@@ -53,24 +53,28 @@ static int stv_sndctrl(struct gspca_dev *gspca_dev, int set, u8 req, u16 val,
53{ 53{
54 int ret = -1; 54 int ret = -1;
55 u8 req_type = 0; 55 u8 req_type = 0;
56 unsigned int pipe = 0;
56 57
57 switch (set) { 58 switch (set) {
58 case 0: /* 0xc1 */ 59 case 0: /* 0xc1 */
59 req_type = USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_ENDPOINT; 60 req_type = USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_ENDPOINT;
61 pipe = usb_rcvctrlpipe(gspca_dev->dev, 0);
60 break; 62 break;
61 case 1: /* 0x41 */ 63 case 1: /* 0x41 */
62 req_type = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_ENDPOINT; 64 req_type = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_ENDPOINT;
65 pipe = usb_sndctrlpipe(gspca_dev->dev, 0);
63 break; 66 break;
64 case 2: /* 0x80 */ 67 case 2: /* 0x80 */
65 req_type = USB_DIR_IN | USB_RECIP_DEVICE; 68 req_type = USB_DIR_IN | USB_RECIP_DEVICE;
69 pipe = usb_rcvctrlpipe(gspca_dev->dev, 0);
66 break; 70 break;
67 case 3: /* 0x40 */ 71 case 3: /* 0x40 */
68 req_type = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; 72 req_type = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
73 pipe = usb_sndctrlpipe(gspca_dev->dev, 0);
69 break; 74 break;
70 } 75 }
71 76
72 ret = usb_control_msg(gspca_dev->dev, 77 ret = usb_control_msg(gspca_dev->dev, pipe,
73 usb_rcvctrlpipe(gspca_dev->dev, 0),
74 req, req_type, 78 req, req_type,
75 val, 0, gspca_dev->usb_buf, size, 500); 79 val, 0, gspca_dev->usb_buf, size, 500);
76 80
@@ -138,6 +142,10 @@ static int sd_config(struct gspca_dev *gspca_dev,
138 struct sd *sd = (struct sd *) gspca_dev; 142 struct sd *sd = (struct sd *) gspca_dev;
139 struct cam *cam = &gspca_dev->cam; 143 struct cam *cam = &gspca_dev->cam;
140 144
145 /* Give the camera some time to settle, otherwise initalization will
146 fail on hotplug, and yes it really needs a full second. */
147 msleep(1000);
148
141 /* ping camera to be sure STV0680 is present */ 149 /* ping camera to be sure STV0680 is present */
142 if (stv_sndctrl(gspca_dev, 0, 0x88, 0x5678, 0x02) != 0x02 || 150 if (stv_sndctrl(gspca_dev, 0, 0x88, 0x5678, 0x02) != 0x02 ||
143 gspca_dev->usb_buf[0] != 0x56 || gspca_dev->usb_buf[1] != 0x78) { 151 gspca_dev->usb_buf[0] != 0x56 || gspca_dev->usb_buf[1] != 0x78) {
@@ -169,6 +177,8 @@ static int sd_config(struct gspca_dev *gspca_dev,
169 PDEBUG(D_PROBE, "Camera supports CIF mode"); 177 PDEBUG(D_PROBE, "Camera supports CIF mode");
170 if (gspca_dev->usb_buf[7] & 0x02) 178 if (gspca_dev->usb_buf[7] & 0x02)
171 PDEBUG(D_PROBE, "Camera supports VGA mode"); 179 PDEBUG(D_PROBE, "Camera supports VGA mode");
180 if (gspca_dev->usb_buf[7] & 0x04)
181 PDEBUG(D_PROBE, "Camera supports QCIF mode");
172 if (gspca_dev->usb_buf[7] & 0x08) 182 if (gspca_dev->usb_buf[7] & 0x08)
173 PDEBUG(D_PROBE, "Camera supports QVGA mode"); 183 PDEBUG(D_PROBE, "Camera supports QVGA mode");
174 184
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx.c b/drivers/media/video/gspca/stv06xx/stv06xx.c
index 5d0241bb1611..af73da34c83f 100644
--- a/drivers/media/video/gspca/stv06xx/stv06xx.c
+++ b/drivers/media/video/gspca/stv06xx/stv06xx.c
@@ -27,6 +27,7 @@
27 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web 27 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
28 */ 28 */
29 29
30#include <linux/input.h>
30#include "stv06xx_sensor.h" 31#include "stv06xx_sensor.h"
31 32
32MODULE_AUTHOR("Erik Andrén"); 33MODULE_AUTHOR("Erik Andrén");
@@ -219,6 +220,7 @@ static void stv06xx_dump_bridge(struct sd *sd)
219 info("Read 0x%x from address 0x%x", data, i); 220 info("Read 0x%x from address 0x%x", data, i);
220 } 221 }
221 222
223 info("Testing stv06xx bridge registers for writability");
222 for (i = 0x1400; i < 0x160f; i++) { 224 for (i = 0x1400; i < 0x160f; i++) {
223 stv06xx_read_bridge(sd, i, &data); 225 stv06xx_read_bridge(sd, i, &data);
224 buf = data; 226 buf = data;
@@ -229,7 +231,7 @@ static void stv06xx_dump_bridge(struct sd *sd)
229 info("Register 0x%x is read/write", i); 231 info("Register 0x%x is read/write", i);
230 else if (data != buf) 232 else if (data != buf)
231 info("Register 0x%x is read/write," 233 info("Register 0x%x is read/write,"
232 "but only partially", i); 234 " but only partially", i);
233 else 235 else
234 info("Register 0x%x is read-only", i); 236 info("Register 0x%x is read-only", i);
235 237
@@ -426,6 +428,29 @@ frame_data:
426 } 428 }
427} 429}
428 430
431#ifdef CONFIG_INPUT
432static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
433 u8 *data, /* interrupt packet data */
434 int len) /* interrupt packet length */
435{
436 int ret = -EINVAL;
437
438 if (len == 1 && data[0] == 0x80) {
439 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 1);
440 input_sync(gspca_dev->input_dev);
441 ret = 0;
442 }
443
444 if (len == 1 && data[0] == 0x88) {
445 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
446 input_sync(gspca_dev->input_dev);
447 ret = 0;
448 }
449
450 return ret;
451}
452#endif
453
429static int stv06xx_config(struct gspca_dev *gspca_dev, 454static int stv06xx_config(struct gspca_dev *gspca_dev,
430 const struct usb_device_id *id); 455 const struct usb_device_id *id);
431 456
@@ -436,7 +461,10 @@ static const struct sd_desc sd_desc = {
436 .init = stv06xx_init, 461 .init = stv06xx_init,
437 .start = stv06xx_start, 462 .start = stv06xx_start,
438 .stopN = stv06xx_stopN, 463 .stopN = stv06xx_stopN,
439 .pkt_scan = stv06xx_pkt_scan 464 .pkt_scan = stv06xx_pkt_scan,
465#ifdef CONFIG_INPUT
466 .int_pkt_scan = sd_int_pkt_scan,
467#endif
440}; 468};
441 469
442/* This function is called at probe time */ 470/* This function is called at probe time */
diff --git a/drivers/media/video/gspca/sunplus.c b/drivers/media/video/gspca/sunplus.c
index 306b7d75b4aa..0c786e00ebcf 100644
--- a/drivers/media/video/gspca/sunplus.c
+++ b/drivers/media/video/gspca/sunplus.c
@@ -67,7 +67,7 @@ static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
67static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val); 67static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
68static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val); 68static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);
69 69
70static struct ctrl sd_ctrls[] = { 70static const struct ctrl sd_ctrls[] = {
71 { 71 {
72 { 72 {
73 .id = V4L2_CID_BRIGHTNESS, 73 .id = V4L2_CID_BRIGHTNESS,
@@ -267,142 +267,6 @@ static const struct cmd spca504A_clicksmart420_open_data[] = {
267 {0x06, 0x0000, 0x0000}, 267 {0x06, 0x0000, 0x0000},
268 {0x00, 0x0004, 0x2880}, 268 {0x00, 0x0004, 0x2880},
269 {0x00, 0x0001, 0x2881}, 269 {0x00, 0x0001, 0x2881},
270/* look like setting a qTable */
271 {0x00, 0x0006, 0x2800},
272 {0x00, 0x0004, 0x2801},
273 {0x00, 0x0004, 0x2802},
274 {0x00, 0x0006, 0x2803},
275 {0x00, 0x000a, 0x2804},
276 {0x00, 0x0010, 0x2805},
277 {0x00, 0x0014, 0x2806},
278 {0x00, 0x0018, 0x2807},
279 {0x00, 0x0005, 0x2808},
280 {0x00, 0x0005, 0x2809},
281 {0x00, 0x0006, 0x280a},
282 {0x00, 0x0008, 0x280b},
283 {0x00, 0x000a, 0x280c},
284 {0x00, 0x0017, 0x280d},
285 {0x00, 0x0018, 0x280e},
286 {0x00, 0x0016, 0x280f},
287
288 {0x00, 0x0006, 0x2810},
289 {0x00, 0x0005, 0x2811},
290 {0x00, 0x0006, 0x2812},
291 {0x00, 0x000a, 0x2813},
292 {0x00, 0x0010, 0x2814},
293 {0x00, 0x0017, 0x2815},
294 {0x00, 0x001c, 0x2816},
295 {0x00, 0x0016, 0x2817},
296 {0x00, 0x0006, 0x2818},
297 {0x00, 0x0007, 0x2819},
298 {0x00, 0x0009, 0x281a},
299 {0x00, 0x000c, 0x281b},
300 {0x00, 0x0014, 0x281c},
301 {0x00, 0x0023, 0x281d},
302 {0x00, 0x0020, 0x281e},
303 {0x00, 0x0019, 0x281f},
304
305 {0x00, 0x0007, 0x2820},
306 {0x00, 0x0009, 0x2821},
307 {0x00, 0x000f, 0x2822},
308 {0x00, 0x0016, 0x2823},
309 {0x00, 0x001b, 0x2824},
310 {0x00, 0x002c, 0x2825},
311 {0x00, 0x0029, 0x2826},
312 {0x00, 0x001f, 0x2827},
313 {0x00, 0x000a, 0x2828},
314 {0x00, 0x000e, 0x2829},
315 {0x00, 0x0016, 0x282a},
316 {0x00, 0x001a, 0x282b},
317 {0x00, 0x0020, 0x282c},
318 {0x00, 0x002a, 0x282d},
319 {0x00, 0x002d, 0x282e},
320 {0x00, 0x0025, 0x282f},
321
322 {0x00, 0x0014, 0x2830},
323 {0x00, 0x001a, 0x2831},
324 {0x00, 0x001f, 0x2832},
325 {0x00, 0x0023, 0x2833},
326 {0x00, 0x0029, 0x2834},
327 {0x00, 0x0030, 0x2835},
328 {0x00, 0x0030, 0x2836},
329 {0x00, 0x0028, 0x2837},
330 {0x00, 0x001d, 0x2838},
331 {0x00, 0x0025, 0x2839},
332 {0x00, 0x0026, 0x283a},
333 {0x00, 0x0027, 0x283b},
334 {0x00, 0x002d, 0x283c},
335 {0x00, 0x0028, 0x283d},
336 {0x00, 0x0029, 0x283e},
337 {0x00, 0x0028, 0x283f},
338
339 {0x00, 0x0007, 0x2840},
340 {0x00, 0x0007, 0x2841},
341 {0x00, 0x000a, 0x2842},
342 {0x00, 0x0013, 0x2843},
343 {0x00, 0x0028, 0x2844},
344 {0x00, 0x0028, 0x2845},
345 {0x00, 0x0028, 0x2846},
346 {0x00, 0x0028, 0x2847},
347 {0x00, 0x0007, 0x2848},
348 {0x00, 0x0008, 0x2849},
349 {0x00, 0x000a, 0x284a},
350 {0x00, 0x001a, 0x284b},
351 {0x00, 0x0028, 0x284c},
352 {0x00, 0x0028, 0x284d},
353 {0x00, 0x0028, 0x284e},
354 {0x00, 0x0028, 0x284f},
355
356 {0x00, 0x000a, 0x2850},
357 {0x00, 0x000a, 0x2851},
358 {0x00, 0x0016, 0x2852},
359 {0x00, 0x0028, 0x2853},
360 {0x00, 0x0028, 0x2854},
361 {0x00, 0x0028, 0x2855},
362 {0x00, 0x0028, 0x2856},
363 {0x00, 0x0028, 0x2857},
364 {0x00, 0x0013, 0x2858},
365 {0x00, 0x001a, 0x2859},
366 {0x00, 0x0028, 0x285a},
367 {0x00, 0x0028, 0x285b},
368 {0x00, 0x0028, 0x285c},
369 {0x00, 0x0028, 0x285d},
370 {0x00, 0x0028, 0x285e},
371 {0x00, 0x0028, 0x285f},
372
373 {0x00, 0x0028, 0x2860},
374 {0x00, 0x0028, 0x2861},
375 {0x00, 0x0028, 0x2862},
376 {0x00, 0x0028, 0x2863},
377 {0x00, 0x0028, 0x2864},
378 {0x00, 0x0028, 0x2865},
379 {0x00, 0x0028, 0x2866},
380 {0x00, 0x0028, 0x2867},
381 {0x00, 0x0028, 0x2868},
382 {0x00, 0x0028, 0x2869},
383 {0x00, 0x0028, 0x286a},
384 {0x00, 0x0028, 0x286b},
385 {0x00, 0x0028, 0x286c},
386 {0x00, 0x0028, 0x286d},
387 {0x00, 0x0028, 0x286e},
388 {0x00, 0x0028, 0x286f},
389
390 {0x00, 0x0028, 0x2870},
391 {0x00, 0x0028, 0x2871},
392 {0x00, 0x0028, 0x2872},
393 {0x00, 0x0028, 0x2873},
394 {0x00, 0x0028, 0x2874},
395 {0x00, 0x0028, 0x2875},
396 {0x00, 0x0028, 0x2876},
397 {0x00, 0x0028, 0x2877},
398 {0x00, 0x0028, 0x2878},
399 {0x00, 0x0028, 0x2879},
400 {0x00, 0x0028, 0x287a},
401 {0x00, 0x0028, 0x287b},
402 {0x00, 0x0028, 0x287c},
403 {0x00, 0x0028, 0x287d},
404 {0x00, 0x0028, 0x287e},
405 {0x00, 0x0028, 0x287f},
406 270
407 {0xa0, 0x0000, 0x0503}, 271 {0xa0, 0x0000, 0x0503},
408}; 272};
@@ -622,6 +486,20 @@ static void spca504_acknowledged_command(struct gspca_dev *gspca_dev,
622 PDEBUG(D_FRAM, "after wait 0x%04x", notdone); 486 PDEBUG(D_FRAM, "after wait 0x%04x", notdone);
623} 487}
624 488
489static void spca504_read_info(struct gspca_dev *gspca_dev)
490{
491 int i;
492 u8 info[6];
493
494 for (i = 0; i < 6; i++)
495 info[i] = reg_r_1(gspca_dev, i);
496 PDEBUG(D_STREAM,
497 "Read info: %d %d %d %d %d %d."
498 " Should be 1,0,2,2,0,0",
499 info[0], info[1], info[2],
500 info[3], info[4], info[5]);
501}
502
625static void spca504A_acknowledged_command(struct gspca_dev *gspca_dev, 503static void spca504A_acknowledged_command(struct gspca_dev *gspca_dev,
626 u8 req, 504 u8 req,
627 u16 idx, u16 val, u16 endcode, u8 count) 505 u16 idx, u16 val, u16 endcode, u8 count)
@@ -881,8 +759,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
881static int sd_init(struct gspca_dev *gspca_dev) 759static int sd_init(struct gspca_dev *gspca_dev)
882{ 760{
883 struct sd *sd = (struct sd *) gspca_dev; 761 struct sd *sd = (struct sd *) gspca_dev;
884 int i;
885 u8 info[6];
886 762
887 switch (sd->bridge) { 763 switch (sd->bridge) {
888 case BRIDGE_SPCA504B: 764 case BRIDGE_SPCA504B:
@@ -924,15 +800,8 @@ static int sd_init(struct gspca_dev *gspca_dev)
924/* case BRIDGE_SPCA504: */ 800/* case BRIDGE_SPCA504: */
925 PDEBUG(D_STREAM, "Opening SPCA504"); 801 PDEBUG(D_STREAM, "Opening SPCA504");
926 if (sd->subtype == AiptekMiniPenCam13) { 802 if (sd->subtype == AiptekMiniPenCam13) {
927 /*****************************/ 803 spca504_read_info(gspca_dev);
928 for (i = 0; i < 6; i++) 804
929 info[i] = reg_r_1(gspca_dev, i);
930 PDEBUG(D_STREAM,
931 "Read info: %d %d %d %d %d %d."
932 " Should be 1,0,2,2,0,0",
933 info[0], info[1], info[2],
934 info[3], info[4], info[5]);
935 /* spca504a aiptek */
936 /* Set AE AWB Banding Type 3-> 50Hz 2-> 60Hz */ 805 /* Set AE AWB Banding Type 3-> 50Hz 2-> 60Hz */
937 spca504A_acknowledged_command(gspca_dev, 0x24, 806 spca504A_acknowledged_command(gspca_dev, 0x24,
938 8, 3, 0x9e, 1); 807 8, 3, 0x9e, 1);
@@ -971,8 +840,6 @@ static int sd_start(struct gspca_dev *gspca_dev)
971{ 840{
972 struct sd *sd = (struct sd *) gspca_dev; 841 struct sd *sd = (struct sd *) gspca_dev;
973 int enable; 842 int enable;
974 int i;
975 u8 info[6];
976 843
977 /* create the JPEG header */ 844 /* create the JPEG header */
978 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL); 845 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL);
@@ -1008,14 +875,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
1008 break; 875 break;
1009 case BRIDGE_SPCA504: 876 case BRIDGE_SPCA504:
1010 if (sd->subtype == AiptekMiniPenCam13) { 877 if (sd->subtype == AiptekMiniPenCam13) {
1011 for (i = 0; i < 6; i++) 878 spca504_read_info(gspca_dev);
1012 info[i] = reg_r_1(gspca_dev, i); 879
1013 PDEBUG(D_STREAM,
1014 "Read info: %d %d %d %d %d %d."
1015 " Should be 1,0,2,2,0,0",
1016 info[0], info[1], info[2],
1017 info[3], info[4], info[5]);
1018 /* spca504a aiptek */
1019 /* Set AE AWB Banding Type 3-> 50Hz 2-> 60Hz */ 880 /* Set AE AWB Banding Type 3-> 50Hz 2-> 60Hz */
1020 spca504A_acknowledged_command(gspca_dev, 0x24, 881 spca504A_acknowledged_command(gspca_dev, 0x24,
1021 8, 3, 0x9e, 1); 882 8, 3, 0x9e, 1);
@@ -1026,13 +887,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
1026 0, 0, 0x9d, 1); 887 0, 0, 0x9d, 1);
1027 } else { 888 } else {
1028 spca504_acknowledged_command(gspca_dev, 0x24, 8, 3); 889 spca504_acknowledged_command(gspca_dev, 0x24, 8, 3);
1029 for (i = 0; i < 6; i++) 890 spca504_read_info(gspca_dev);
1030 info[i] = reg_r_1(gspca_dev, i);
1031 PDEBUG(D_STREAM,
1032 "Read info: %d %d %d %d %d %d."
1033 " Should be 1,0,2,2,0,0",
1034 info[0], info[1], info[2],
1035 info[3], info[4], info[5]);
1036 spca504_acknowledged_command(gspca_dev, 0x24, 8, 3); 891 spca504_acknowledged_command(gspca_dev, 0x24, 8, 3);
1037 spca504_acknowledged_command(gspca_dev, 0x24, 0, 0); 892 spca504_acknowledged_command(gspca_dev, 0x24, 0, 0);
1038 } 893 }
@@ -1336,6 +1191,7 @@ static const __devinitdata struct usb_device_id device_table[] = {
1336 {USB_DEVICE(0x04fc, 0x5330), BS(SPCA533, 0)}, 1191 {USB_DEVICE(0x04fc, 0x5330), BS(SPCA533, 0)},
1337 {USB_DEVICE(0x04fc, 0x5360), BS(SPCA536, 0)}, 1192 {USB_DEVICE(0x04fc, 0x5360), BS(SPCA536, 0)},
1338 {USB_DEVICE(0x04fc, 0xffff), BS(SPCA504B, 0)}, 1193 {USB_DEVICE(0x04fc, 0xffff), BS(SPCA504B, 0)},
1194 {USB_DEVICE(0x052b, 0x1507), BS(SPCA533, MegapixV4)},
1339 {USB_DEVICE(0x052b, 0x1513), BS(SPCA533, MegapixV4)}, 1195 {USB_DEVICE(0x052b, 0x1513), BS(SPCA533, MegapixV4)},
1340 {USB_DEVICE(0x052b, 0x1803), BS(SPCA533, MegaImageVI)}, 1196 {USB_DEVICE(0x052b, 0x1803), BS(SPCA533, MegaImageVI)},
1341 {USB_DEVICE(0x0546, 0x3155), BS(SPCA533, 0)}, 1197 {USB_DEVICE(0x0546, 0x3155), BS(SPCA533, 0)},
diff --git a/drivers/media/video/gspca/t613.c b/drivers/media/video/gspca/t613.c
index 55ef6a744427..668a7536af90 100644
--- a/drivers/media/video/gspca/t613.c
+++ b/drivers/media/video/gspca/t613.c
@@ -52,6 +52,7 @@ struct sd {
52#define SENSOR_OM6802 0 52#define SENSOR_OM6802 0
53#define SENSOR_OTHER 1 53#define SENSOR_OTHER 1
54#define SENSOR_TAS5130A 2 54#define SENSOR_TAS5130A 2
55#define SENSOR_LT168G 3 /* must verify if this is the actual model */
55}; 56};
56 57
57/* V4L2 controls supported by the driver */ 58/* V4L2 controls supported by the driver */
@@ -78,7 +79,7 @@ static int sd_geteffect(struct gspca_dev *gspca_dev, __s32 *val);
78static int sd_querymenu(struct gspca_dev *gspca_dev, 79static int sd_querymenu(struct gspca_dev *gspca_dev,
79 struct v4l2_querymenu *menu); 80 struct v4l2_querymenu *menu);
80 81
81static struct ctrl sd_ctrls[] = { 82static const struct ctrl sd_ctrls[] = {
82 { 83 {
83 { 84 {
84 .id = V4L2_CID_BRIGHTNESS, 85 .id = V4L2_CID_BRIGHTNESS,
@@ -306,6 +307,17 @@ static const u8 n4_tas5130a[] = {
306 0xbe, 0x36, 0xbf, 0xff, 0xc2, 0x88, 0xc5, 0xc8, 307 0xbe, 0x36, 0xbf, 0xff, 0xc2, 0x88, 0xc5, 0xc8,
307 0xc6, 0xda 308 0xc6, 0xda
308}; 309};
310static const u8 n4_lt168g[] = {
311 0x66, 0x01, 0x7f, 0x00, 0x80, 0x7c, 0x81, 0x28,
312 0x83, 0x44, 0x84, 0x20, 0x86, 0x20, 0x8a, 0x70,
313 0x8b, 0x58, 0x8c, 0x88, 0x8d, 0xa0, 0x8e, 0xb3,
314 0x8f, 0x24, 0xa1, 0xb0, 0xa2, 0x38, 0xa5, 0x20,
315 0xa6, 0x4a, 0xa8, 0xe8, 0xaf, 0x38, 0xb0, 0x68,
316 0xb1, 0x44, 0xb2, 0x88, 0xbb, 0x86, 0xbd, 0x40,
317 0xbe, 0x26, 0xc1, 0x05, 0xc2, 0x88, 0xc5, 0xc0,
318 0xda, 0x8e, 0xdb, 0xca, 0xdc, 0xa8, 0xdd, 0x8c,
319 0xde, 0x44, 0xdf, 0x0c, 0xe9, 0x80
320};
309 321
310static const struct additional_sensor_data sensor_data[] = { 322static const struct additional_sensor_data sensor_data[] = {
311 { /* 0: OM6802 */ 323 { /* 0: OM6802 */
@@ -380,6 +392,23 @@ static const struct additional_sensor_data sensor_data[] = {
380 .stream = 392 .stream =
381 {0x0b, 0x04, 0x0a, 0x40}, 393 {0x0b, 0x04, 0x0a, 0x40},
382 }, 394 },
395 { /* 3: LT168G */
396 .n3 = {0x61, 0xc2, 0x65, 0x68, 0x60, 0x00},
397 .n4 = n4_lt168g,
398 .n4sz = sizeof n4_lt168g,
399 .reg80 = 0x7c,
400 .reg8e = 0xb3,
401 .nset8 = {0xa8, 0xf0, 0xc6, 0xba, 0xc0, 0x00},
402 .data1 = {0xc0, 0x38, 0x08, 0x10, 0xc0, 0x30, 0x10, 0x40,
403 0xb0, 0xf4},
404 .data2 = {0x40, 0x80, 0xc0, 0x50, 0xa0, 0xf0, 0x53, 0xa6,
405 0xff},
406 .data3 = {0x40, 0x80, 0xc0, 0x50, 0xa0, 0xf0, 0x53, 0xa6,
407 0xff},
408 .data4 = {0x66, 0x41, 0xa8, 0xf0},
409 .data5 = {0x0c, 0x03, 0xab, 0x4b, 0x81, 0x2b},
410 .stream = {0x0b, 0x04, 0x0a, 0x28},
411 },
383}; 412};
384 413
385#define MAX_EFFECTS 7 414#define MAX_EFFECTS 7
@@ -716,6 +745,10 @@ static int sd_init(struct gspca_dev *gspca_dev)
716 PDEBUG(D_PROBE, "sensor tas5130a"); 745 PDEBUG(D_PROBE, "sensor tas5130a");
717 sd->sensor = SENSOR_TAS5130A; 746 sd->sensor = SENSOR_TAS5130A;
718 break; 747 break;
748 case 0x0802:
749 PDEBUG(D_PROBE, "sensor lt168g");
750 sd->sensor = SENSOR_LT168G;
751 break;
719 case 0x0803: 752 case 0x0803:
720 PDEBUG(D_PROBE, "sensor 'other'"); 753 PDEBUG(D_PROBE, "sensor 'other'");
721 sd->sensor = SENSOR_OTHER; 754 sd->sensor = SENSOR_OTHER;
@@ -758,6 +791,13 @@ static int sd_init(struct gspca_dev *gspca_dev)
758 reg_w_buf(gspca_dev, sensor->n3, sizeof sensor->n3); 791 reg_w_buf(gspca_dev, sensor->n3, sizeof sensor->n3);
759 reg_w_buf(gspca_dev, sensor->n4, sensor->n4sz); 792 reg_w_buf(gspca_dev, sensor->n4, sensor->n4sz);
760 793
794 if (sd->sensor == SENSOR_LT168G) {
795 test_byte = reg_r(gspca_dev, 0x80);
796 PDEBUG(D_STREAM, "Reg 0x%02x = 0x%02x", 0x80,
797 test_byte);
798 reg_w(gspca_dev, 0x6c80);
799 }
800
761 reg_w_ixbuf(gspca_dev, 0xd0, sensor->data1, sizeof sensor->data1); 801 reg_w_ixbuf(gspca_dev, 0xd0, sensor->data1, sizeof sensor->data1);
762 reg_w_ixbuf(gspca_dev, 0xc7, sensor->data2, sizeof sensor->data2); 802 reg_w_ixbuf(gspca_dev, 0xc7, sensor->data2, sizeof sensor->data2);
763 reg_w_ixbuf(gspca_dev, 0xe0, sensor->data3, sizeof sensor->data3); 803 reg_w_ixbuf(gspca_dev, 0xe0, sensor->data3, sizeof sensor->data3);
@@ -782,6 +822,13 @@ static int sd_init(struct gspca_dev *gspca_dev)
782 reg_w_buf(gspca_dev, sensor->nset8, sizeof sensor->nset8); 822 reg_w_buf(gspca_dev, sensor->nset8, sizeof sensor->nset8);
783 reg_w_buf(gspca_dev, sensor->stream, sizeof sensor->stream); 823 reg_w_buf(gspca_dev, sensor->stream, sizeof sensor->stream);
784 824
825 if (sd->sensor == SENSOR_LT168G) {
826 test_byte = reg_r(gspca_dev, 0x80);
827 PDEBUG(D_STREAM, "Reg 0x%02x = 0x%02x", 0x80,
828 test_byte);
829 reg_w(gspca_dev, 0x6c80);
830 }
831
785 reg_w_ixbuf(gspca_dev, 0xd0, sensor->data1, sizeof sensor->data1); 832 reg_w_ixbuf(gspca_dev, 0xd0, sensor->data1, sizeof sensor->data1);
786 reg_w_ixbuf(gspca_dev, 0xc7, sensor->data2, sizeof sensor->data2); 833 reg_w_ixbuf(gspca_dev, 0xc7, sensor->data2, sizeof sensor->data2);
787 reg_w_ixbuf(gspca_dev, 0xe0, sensor->data3, sizeof sensor->data3); 834 reg_w_ixbuf(gspca_dev, 0xe0, sensor->data3, sizeof sensor->data3);
@@ -888,6 +935,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
888 case SENSOR_OM6802: 935 case SENSOR_OM6802:
889 om6802_sensor_init(gspca_dev); 936 om6802_sensor_init(gspca_dev);
890 break; 937 break;
938 case SENSOR_LT168G:
939 break;
891 case SENSOR_OTHER: 940 case SENSOR_OTHER:
892 break; 941 break;
893 default: 942 default:
diff --git a/drivers/media/video/gspca/tv8532.c b/drivers/media/video/gspca/tv8532.c
index b74a3b6489c7..c7b6eb1e04d5 100644
--- a/drivers/media/video/gspca/tv8532.c
+++ b/drivers/media/video/gspca/tv8532.c
@@ -39,7 +39,7 @@ struct sd {
39static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val); 39static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
40static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val); 40static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
41 41
42static struct ctrl sd_ctrls[] = { 42static const struct ctrl sd_ctrls[] = {
43 { 43 {
44 { 44 {
45 .id = V4L2_CID_BRIGHTNESS, 45 .id = V4L2_CID_BRIGHTNESS,
diff --git a/drivers/media/video/gspca/vc032x.c b/drivers/media/video/gspca/vc032x.c
index 71921c878424..4989f9afb46e 100644
--- a/drivers/media/video/gspca/vc032x.c
+++ b/drivers/media/video/gspca/vc032x.c
@@ -32,10 +32,13 @@ MODULE_LICENSE("GPL");
32struct sd { 32struct sd {
33 struct gspca_dev gspca_dev; /* !! must be the first item */ 33 struct gspca_dev gspca_dev; /* !! must be the first item */
34 34
35 u8 brightness;
36 u8 contrast;
37 u8 colors;
35 u8 hflip; 38 u8 hflip;
36 u8 vflip; 39 u8 vflip;
37 u8 lightfreq; 40 u8 lightfreq;
38 u8 sharpness; 41 s8 sharpness;
39 42
40 u8 image_offset; 43 u8 image_offset;
41 44
@@ -52,6 +55,7 @@ struct sd {
52#define SENSOR_OV7670 6 55#define SENSOR_OV7670 6
53#define SENSOR_PO1200 7 56#define SENSOR_PO1200 7
54#define SENSOR_PO3130NC 8 57#define SENSOR_PO3130NC 8
58#define SENSOR_POxxxx 9
55 u8 flags; 59 u8 flags;
56#define FL_SAMSUNG 0x01 /* SamsungQ1 (2 sensors) */ 60#define FL_SAMSUNG 0x01 /* SamsungQ1 (2 sensors) */
57#define FL_HFLIP 0x02 /* mirrored by default */ 61#define FL_HFLIP 0x02 /* mirrored by default */
@@ -59,6 +63,12 @@ struct sd {
59}; 63};
60 64
61/* V4L2 controls supported by the driver */ 65/* V4L2 controls supported by the driver */
66static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
67static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
68static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
69static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
70static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
71static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
62static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val); 72static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
63static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val); 73static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
64static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val); 74static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
@@ -68,9 +78,54 @@ static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
68static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val); 78static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val);
69static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val); 79static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val);
70 80
71static struct ctrl sd_ctrls[] = { 81static const struct ctrl sd_ctrls[] = {
82#define BRIGHTNESS_IDX 0
83 {
84 {
85 .id = V4L2_CID_BRIGHTNESS,
86 .type = V4L2_CTRL_TYPE_INTEGER,
87 .name = "Brightness",
88 .minimum = 0,
89 .maximum = 255,
90 .step = 1,
91#define BRIGHTNESS_DEF 128
92 .default_value = BRIGHTNESS_DEF,
93 },
94 .set = sd_setbrightness,
95 .get = sd_getbrightness,
96 },
97#define CONTRAST_IDX 1
98 {
99 {
100 .id = V4L2_CID_CONTRAST,
101 .type = V4L2_CTRL_TYPE_INTEGER,
102 .name = "Contrast",
103 .minimum = 0,
104 .maximum = 255,
105 .step = 1,
106#define CONTRAST_DEF 127
107 .default_value = CONTRAST_DEF,
108 },
109 .set = sd_setcontrast,
110 .get = sd_getcontrast,
111 },
112#define COLORS_IDX 2
113 {
114 {
115 .id = V4L2_CID_SATURATION,
116 .type = V4L2_CTRL_TYPE_INTEGER,
117 .name = "Saturation",
118 .minimum = 1,
119 .maximum = 127,
120 .step = 1,
121#define COLOR_DEF 63
122 .default_value = COLOR_DEF,
123 },
124 .set = sd_setcolors,
125 .get = sd_getcolors,
126 },
72/* next 2 controls work with some sensors only */ 127/* next 2 controls work with some sensors only */
73#define HFLIP_IDX 0 128#define HFLIP_IDX 3
74 { 129 {
75 { 130 {
76 .id = V4L2_CID_HFLIP, 131 .id = V4L2_CID_HFLIP,
@@ -85,7 +140,7 @@ static struct ctrl sd_ctrls[] = {
85 .set = sd_sethflip, 140 .set = sd_sethflip,
86 .get = sd_gethflip, 141 .get = sd_gethflip,
87 }, 142 },
88#define VFLIP_IDX 1 143#define VFLIP_IDX 4
89 { 144 {
90 { 145 {
91 .id = V4L2_CID_VFLIP, 146 .id = V4L2_CID_VFLIP,
@@ -100,7 +155,7 @@ static struct ctrl sd_ctrls[] = {
100 .set = sd_setvflip, 155 .set = sd_setvflip,
101 .get = sd_getvflip, 156 .get = sd_getvflip,
102 }, 157 },
103#define LIGHTFREQ_IDX 2 158#define LIGHTFREQ_IDX 5
104 { 159 {
105 { 160 {
106 .id = V4L2_CID_POWER_LINE_FREQUENCY, 161 .id = V4L2_CID_POWER_LINE_FREQUENCY,
@@ -115,17 +170,16 @@ static struct ctrl sd_ctrls[] = {
115 .set = sd_setfreq, 170 .set = sd_setfreq,
116 .get = sd_getfreq, 171 .get = sd_getfreq,
117 }, 172 },
118/* po1200 only */ 173#define SHARPNESS_IDX 6
119#define SHARPNESS_IDX 3
120 { 174 {
121 { 175 {
122 .id = V4L2_CID_SHARPNESS, 176 .id = V4L2_CID_SHARPNESS,
123 .type = V4L2_CTRL_TYPE_INTEGER, 177 .type = V4L2_CTRL_TYPE_INTEGER,
124 .name = "Sharpness", 178 .name = "Sharpness",
125 .minimum = 0, 179 .minimum = -1,
126 .maximum = 2, 180 .maximum = 2,
127 .step = 1, 181 .step = 1,
128#define SHARPNESS_DEF 1 182#define SHARPNESS_DEF -1
129 .default_value = SHARPNESS_DEF, 183 .default_value = SHARPNESS_DEF,
130 }, 184 },
131 .set = sd_setsharpness, 185 .set = sd_setsharpness,
@@ -133,6 +187,42 @@ static struct ctrl sd_ctrls[] = {
133 }, 187 },
134}; 188};
135 189
190/* table of the disabled controls */
191static u32 ctrl_dis[] = {
192/* SENSOR_HV7131R 0 */
193 (1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
194 | (1 << HFLIP_IDX) | (1 << VFLIP_IDX) | (1 << LIGHTFREQ_IDX)
195 | (1 << SHARPNESS_IDX),
196/* SENSOR_MI0360 1 */
197 (1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
198 | (1 << HFLIP_IDX) | (1 << VFLIP_IDX) | (1 << LIGHTFREQ_IDX)
199 | (1 << SHARPNESS_IDX),
200/* SENSOR_MI1310_SOC 2 */
201 (1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
202 | (1 << LIGHTFREQ_IDX) | (1 << SHARPNESS_IDX),
203/* SENSOR_MI1320 3 */
204 (1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
205 | (1 << LIGHTFREQ_IDX) | (1 << SHARPNESS_IDX),
206/* SENSOR_MI1320_SOC 4 */
207 (1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
208 | (1 << LIGHTFREQ_IDX) | (1 << SHARPNESS_IDX),
209/* SENSOR_OV7660 5 */
210 (1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
211 | (1 << LIGHTFREQ_IDX) | (1 << SHARPNESS_IDX),
212/* SENSOR_OV7670 6 */
213 (1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
214 | (1 << SHARPNESS_IDX),
215/* SENSOR_PO1200 7 */
216 (1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
217 | (1 << LIGHTFREQ_IDX),
218/* SENSOR_PO3130NC 8 */
219 (1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
220 | (1 << HFLIP_IDX) | (1 << VFLIP_IDX) | (1 << LIGHTFREQ_IDX)
221 | (1 << SHARPNESS_IDX),
222/* SENSOR_POxxxx 9 */
223 (1 << HFLIP_IDX) | (1 << VFLIP_IDX) | (1 << LIGHTFREQ_IDX),
224};
225
136static const struct v4l2_pix_format vc0321_mode[] = { 226static const struct v4l2_pix_format vc0321_mode[] = {
137 {320, 240, V4L2_PIX_FMT_YVYU, V4L2_FIELD_NONE, 227 {320, 240, V4L2_PIX_FMT_YVYU, V4L2_FIELD_NONE,
138 .bytesperline = 320, 228 .bytesperline = 320,
@@ -215,7 +305,7 @@ static const u8 mi0360_initVGA_JPG[][4] = {
215 {0xb3, 0x15, 0x00, 0xcc}, 305 {0xb3, 0x15, 0x00, 0xcc},
216 {0xb3, 0x16, 0x02, 0xcc}, 306 {0xb3, 0x16, 0x02, 0xcc},
217 {0xb3, 0x17, 0x7f, 0xcc}, 307 {0xb3, 0x17, 0x7f, 0xcc},
218 {0xb3, 0x35, 0xdd, 0xcc}, 308 {0xb3, 0x35, 0xdd, 0xcc}, /* i2c add: 5d */
219 {0xb3, 0x34, 0x02, 0xcc}, 309 {0xb3, 0x34, 0x02, 0xcc},
220 {0xb3, 0x00, 0x25, 0xcc}, 310 {0xb3, 0x00, 0x25, 0xcc},
221 {0xbc, 0x00, 0x71, 0xcc}, 311 {0xbc, 0x00, 0x71, 0xcc},
@@ -435,7 +525,7 @@ static const u8 mi1310_socinitVGA_JPG[][4] = {
435 {0xb3, 0x08, 0x01, 0xcc}, 525 {0xb3, 0x08, 0x01, 0xcc},
436 {0xb3, 0x09, 0x0c, 0xcc}, 526 {0xb3, 0x09, 0x0c, 0xcc},
437 {0xb3, 0x34, 0x02, 0xcc}, 527 {0xb3, 0x34, 0x02, 0xcc},
438 {0xb3, 0x35, 0xdd, 0xcc}, 528 {0xb3, 0x35, 0xdd, 0xcc}, /* i2c add: 5d */
439 {0xb3, 0x02, 0x00, 0xcc}, 529 {0xb3, 0x02, 0x00, 0xcc},
440 {0xb3, 0x03, 0x0a, 0xcc}, 530 {0xb3, 0x03, 0x0a, 0xcc},
441 {0xb3, 0x04, 0x05, 0xcc}, 531 {0xb3, 0x04, 0x05, 0xcc},
@@ -860,7 +950,8 @@ static const u8 mi1320_initVGA_data[][4] = {
860 {0xb0, 0x16, 0x03, 0xcc}, {0xb3, 0x05, 0x00, 0xcc}, 950 {0xb0, 0x16, 0x03, 0xcc}, {0xb3, 0x05, 0x00, 0xcc},
861 {0xb3, 0x06, 0x00, 0xcc}, {0xb3, 0x08, 0x01, 0xcc}, 951 {0xb3, 0x06, 0x00, 0xcc}, {0xb3, 0x08, 0x01, 0xcc},
862 {0xb3, 0x09, 0x0c, 0xcc}, {0xb3, 0x34, 0x02, 0xcc}, 952 {0xb3, 0x09, 0x0c, 0xcc}, {0xb3, 0x34, 0x02, 0xcc},
863 {0xb3, 0x35, 0xc8, 0xcc}, {0xb3, 0x02, 0x00, 0xcc}, 953 {0xb3, 0x35, 0xc8, 0xcc}, /* i2c add: 48 */
954 {0xb3, 0x02, 0x00, 0xcc},
864 {0xb3, 0x03, 0x0a, 0xcc}, {0xb3, 0x04, 0x05, 0xcc}, 955 {0xb3, 0x03, 0x0a, 0xcc}, {0xb3, 0x04, 0x05, 0xcc},
865 {0xb3, 0x20, 0x00, 0xcc}, {0xb3, 0x21, 0x00, 0xcc}, 956 {0xb3, 0x20, 0x00, 0xcc}, {0xb3, 0x21, 0x00, 0xcc},
866 {0xb3, 0x22, 0x03, 0xcc}, {0xb3, 0x23, 0xc0, 0xcc}, 957 {0xb3, 0x22, 0x03, 0xcc}, {0xb3, 0x23, 0xc0, 0xcc},
@@ -901,7 +992,8 @@ static const u8 mi1320_initVGA_data[][4] = {
901 {0xc3, 0x01, 0x03, 0xbb}, {0xc4, 0x00, 0x04, 0xbb}, 992 {0xc3, 0x01, 0x03, 0xbb}, {0xc4, 0x00, 0x04, 0xbb},
902 {0xf0, 0x00, 0x00, 0xbb}, {0x05, 0x01, 0x13, 0xbb}, 993 {0xf0, 0x00, 0x00, 0xbb}, {0x05, 0x01, 0x13, 0xbb},
903 {0x06, 0x00, 0x11, 0xbb}, {0x07, 0x00, 0x85, 0xbb}, 994 {0x06, 0x00, 0x11, 0xbb}, {0x07, 0x00, 0x85, 0xbb},
904 {0x08, 0x00, 0x27, 0xbb}, {0x20, 0x01, 0x03, 0xbb}, 995 {0x08, 0x00, 0x27, 0xbb},
996 {0x20, 0x01, 0x00, 0xbb}, /* h/v flips - was 03 */
905 {0x21, 0x80, 0x00, 0xbb}, {0x22, 0x0d, 0x0f, 0xbb}, 997 {0x21, 0x80, 0x00, 0xbb}, {0x22, 0x0d, 0x0f, 0xbb},
906 {0x24, 0x80, 0x00, 0xbb}, {0x59, 0x00, 0xff, 0xbb}, 998 {0x24, 0x80, 0x00, 0xbb}, {0x59, 0x00, 0xff, 0xbb},
907 {0xf0, 0x00, 0x02, 0xbb}, {0x39, 0x03, 0x0d, 0xbb}, 999 {0xf0, 0x00, 0x02, 0xbb}, {0x39, 0x03, 0x0d, 0xbb},
@@ -1012,7 +1104,7 @@ static const u8 mi1320_soc_InitVGA[][4] = {
1012 {0xb3, 0x08, 0x01, 0xcc}, 1104 {0xb3, 0x08, 0x01, 0xcc},
1013 {0xb3, 0x09, 0x0c, 0xcc}, 1105 {0xb3, 0x09, 0x0c, 0xcc},
1014 {0xb3, 0x34, 0x02, 0xcc}, 1106 {0xb3, 0x34, 0x02, 0xcc},
1015 {0xb3, 0x35, 0xc8, 0xcc}, 1107 {0xb3, 0x35, 0xc8, 0xcc}, /* i2c add: 48 */
1016 {0xb3, 0x02, 0x00, 0xcc}, 1108 {0xb3, 0x02, 0x00, 0xcc},
1017 {0xb3, 0x03, 0x0a, 0xcc}, 1109 {0xb3, 0x03, 0x0a, 0xcc},
1018 {0xb3, 0x04, 0x05, 0xcc}, 1110 {0xb3, 0x04, 0x05, 0xcc},
@@ -1359,7 +1451,8 @@ static const u8 po3130_initVGA_data[][4] = {
1359 {0xb3, 0x23, 0xe8, 0xcc}, {0xb8, 0x08, 0xe8, 0xcc}, 1451 {0xb3, 0x23, 0xe8, 0xcc}, {0xb8, 0x08, 0xe8, 0xcc},
1360 {0xb3, 0x14, 0x00, 0xcc}, {0xb3, 0x15, 0x00, 0xcc}, 1452 {0xb3, 0x14, 0x00, 0xcc}, {0xb3, 0x15, 0x00, 0xcc},
1361 {0xb3, 0x16, 0x02, 0xcc}, {0xb3, 0x17, 0x7f, 0xcc}, 1453 {0xb3, 0x16, 0x02, 0xcc}, {0xb3, 0x17, 0x7f, 0xcc},
1362 {0xb3, 0x34, 0x01, 0xcc}, {0xb3, 0x35, 0xf6, 0xcc}, 1454 {0xb3, 0x34, 0x01, 0xcc},
1455 {0xb3, 0x35, 0xf6, 0xcc}, /* i2c add: 76 */
1363 {0xb3, 0x00, 0x27, 0xcc}, {0xbc, 0x00, 0x71, 0xcc}, 1456 {0xb3, 0x00, 0x27, 0xcc}, {0xbc, 0x00, 0x71, 0xcc},
1364 {0xb8, 0x00, 0x21, 0xcc}, {0xb8, 0x27, 0x20, 0xcc}, 1457 {0xb8, 0x00, 0x21, 0xcc}, {0xb8, 0x27, 0x20, 0xcc},
1365 {0xb8, 0x01, 0x79, 0xcc}, {0xb8, 0x81, 0x09, 0xcc}, 1458 {0xb8, 0x01, 0x79, 0xcc}, {0xb8, 0x81, 0x09, 0xcc},
@@ -1561,7 +1654,7 @@ static const u8 hv7131r_initVGA_data[][4] = {
1561 {0xb3, 0x16, 0x02, 0xcc}, 1654 {0xb3, 0x16, 0x02, 0xcc},
1562 {0xb3, 0x17, 0x7f, 0xcc}, 1655 {0xb3, 0x17, 0x7f, 0xcc},
1563 {0xb3, 0x34, 0x01, 0xcc}, 1656 {0xb3, 0x34, 0x01, 0xcc},
1564 {0xb3, 0x35, 0x91, 0xcc}, 1657 {0xb3, 0x35, 0x91, 0xcc}, /* i2c add: 11 */
1565 {0xb3, 0x00, 0x27, 0xcc}, 1658 {0xb3, 0x00, 0x27, 0xcc},
1566 {0xbc, 0x00, 0x73, 0xcc}, 1659 {0xbc, 0x00, 0x73, 0xcc},
1567 {0xb8, 0x00, 0x23, 0xcc}, 1660 {0xb8, 0x00, 0x23, 0xcc},
@@ -1747,7 +1840,8 @@ static const u8 ov7660_initVGA_data[][4] = {
1747 {0xb3, 0x23, 0xe0, 0xcc}, {0xb3, 0x1d, 0x01, 0xcc}, 1840 {0xb3, 0x23, 0xe0, 0xcc}, {0xb3, 0x1d, 0x01, 0xcc},
1748 {0xb3, 0x1f, 0x02, 0xcc}, 1841 {0xb3, 0x1f, 0x02, 0xcc},
1749 {0xb3, 0x34, 0x01, 0xcc}, 1842 {0xb3, 0x34, 0x01, 0xcc},
1750 {0xb3, 0x35, 0xa1, 0xcc}, {0xb3, 0x00, 0x26, 0xcc}, 1843 {0xb3, 0x35, 0xa1, 0xcc}, /* i2c add: 21 */
1844 {0xb3, 0x00, 0x26, 0xcc},
1751 {0xb8, 0x00, 0x33, 0xcc}, /* 13 */ 1845 {0xb8, 0x00, 0x33, 0xcc}, /* 13 */
1752 {0xb8, 0x01, 0x7d, 0xcc}, 1846 {0xb8, 0x01, 0x7d, 0xcc},
1753 {0xbc, 0x00, 0x73, 0xcc}, {0xb8, 0x81, 0x09, 0xcc}, 1847 {0xbc, 0x00, 0x73, 0xcc}, {0xb8, 0x81, 0x09, 0xcc},
@@ -1883,7 +1977,8 @@ static const u8 ov7670_initVGA_JPG[][4] = {
1883 {0x00, 0x00, 0x10, 0xdd}, 1977 {0x00, 0x00, 0x10, 0xdd},
1884 {0xb0, 0x04, 0x02, 0xcc}, {0x00, 0x00, 0x10, 0xdd}, 1978 {0xb0, 0x04, 0x02, 0xcc}, {0x00, 0x00, 0x10, 0xdd},
1885 {0xb3, 0x00, 0x66, 0xcc}, {0xb3, 0x00, 0x67, 0xcc}, 1979 {0xb3, 0x00, 0x66, 0xcc}, {0xb3, 0x00, 0x67, 0xcc},
1886 {0xb3, 0x35, 0xa1, 0xcc}, {0xb3, 0x34, 0x01, 0xcc}, 1980 {0xb3, 0x35, 0xa1, 0xcc}, /* i2c add: 21 */
1981 {0xb3, 0x34, 0x01, 0xcc},
1887 {0xb3, 0x05, 0x01, 0xcc}, {0xb3, 0x06, 0x01, 0xcc}, 1982 {0xb3, 0x05, 0x01, 0xcc}, {0xb3, 0x06, 0x01, 0xcc},
1888 {0xb3, 0x08, 0x01, 0xcc}, {0xb3, 0x09, 0x0c, 0xcc}, 1983 {0xb3, 0x08, 0x01, 0xcc}, {0xb3, 0x09, 0x0c, 0xcc},
1889 {0xb3, 0x02, 0x02, 0xcc}, {0xb3, 0x03, 0x1f, 0xcc}, 1984 {0xb3, 0x02, 0x02, 0xcc}, {0xb3, 0x03, 0x1f, 0xcc},
@@ -2181,7 +2276,7 @@ static const u8 po1200_initVGA_data[][4] = {
2181 {0xb0, 0x54, 0x13, 0xcc}, 2276 {0xb0, 0x54, 0x13, 0xcc},
2182 {0xb3, 0x00, 0x67, 0xcc}, 2277 {0xb3, 0x00, 0x67, 0xcc},
2183 {0xb3, 0x34, 0x01, 0xcc}, 2278 {0xb3, 0x34, 0x01, 0xcc},
2184 {0xb3, 0x35, 0xdc, 0xcc}, 2279 {0xb3, 0x35, 0xdc, 0xcc}, /* i2c add: 5c */
2185 {0x00, 0x03, 0x00, 0xaa}, 2280 {0x00, 0x03, 0x00, 0xaa},
2186 {0x00, 0x12, 0x05, 0xaa}, 2281 {0x00, 0x12, 0x05, 0xaa},
2187 {0x00, 0x13, 0x02, 0xaa}, 2282 {0x00, 0x13, 0x02, 0xaa},
@@ -2408,6 +2503,251 @@ static const u8 po1200_initVGA_data[][4] = {
2408 {0x00, 0xb6, 0x39, 0xaa}, 2503 {0x00, 0xb6, 0x39, 0xaa},
2409 {0x00, 0xb7, 0x24, 0xaa}, 2504 {0x00, 0xb7, 0x24, 0xaa},
2410/*write 89 0400 1415*/ 2505/*write 89 0400 1415*/
2506 {}
2507};
2508
2509static const u8 poxxxx_init_common[][4] = {
2510 {0xb3, 0x00, 0x04, 0xcc},
2511 {0x00, 0x00, 0x10, 0xdd},
2512 {0xb3, 0x00, 0x64, 0xcc},
2513 {0x00, 0x00, 0x10, 0xdd},
2514 {0xb3, 0x00, 0x65, 0xcc},
2515 {0x00, 0x00, 0x10, 0xdd},
2516 {0xb3, 0x00, 0x67, 0xcc},
2517 {0xb0, 0x03, 0x09, 0xcc},
2518 {0xb3, 0x05, 0x00, 0xcc},
2519 {0xb3, 0x06, 0x00, 0xcc},
2520 {0xb3, 0x5c, 0x01, 0xcc},
2521 {0xb3, 0x08, 0x01, 0xcc},
2522 {0xb3, 0x09, 0x0c, 0xcc},
2523 {0xb3, 0x34, 0x01, 0xcc},
2524 {0xb3, 0x35, 0xf6, 0xcc}, /* i2c add: 76 */
2525 {0xb3, 0x02, 0xb0, 0xcc},
2526 {0xb3, 0x03, 0x18, 0xcc},
2527 {0xb3, 0x04, 0x15, 0xcc},
2528 {0xb3, 0x20, 0x00, 0xcc},
2529 {0xb3, 0x21, 0x00, 0xcc},
2530 {0xb3, 0x22, 0x04, 0xcc},
2531 {0xb3, 0x23, 0x00, 0xcc},
2532 {0xb3, 0x14, 0x00, 0xcc},
2533 {0xb3, 0x15, 0x00, 0xcc},
2534 {0xb3, 0x16, 0x04, 0xcc},
2535 {0xb3, 0x17, 0xff, 0xcc},
2536 {0xb3, 0x2c, 0x03, 0xcc},
2537 {0xb3, 0x2d, 0x56, 0xcc},
2538 {0xb3, 0x2e, 0x02, 0xcc},
2539 {0xb3, 0x2f, 0x0a, 0xcc},
2540 {0xb3, 0x40, 0x00, 0xcc},
2541 {0xb3, 0x41, 0x34, 0xcc},
2542 {0xb3, 0x42, 0x01, 0xcc},
2543 {0xb3, 0x43, 0xe0, 0xcc},
2544 {0xbc, 0x00, 0x71, 0xcc},
2545 {0xbc, 0x01, 0x01, 0xcc},
2546 {0xb3, 0x01, 0x41, 0xcc},
2547 {0xb3, 0x4d, 0x00, 0xcc},
2548 {0x00, 0x0b, 0x2a, 0xaa},
2549 {0x00, 0x0e, 0x03, 0xaa},
2550 {0x00, 0x0f, 0xea, 0xaa},
2551 {0x00, 0x12, 0x08, 0xaa},
2552 {0x00, 0x1e, 0x06, 0xaa},
2553 {0x00, 0x21, 0x00, 0xaa},
2554 {0x00, 0x31, 0x1f, 0xaa},
2555 {0x00, 0x33, 0x38, 0xaa},
2556 {0x00, 0x36, 0xc0, 0xaa},
2557 {0x00, 0x37, 0xc8, 0xaa},
2558 {0x00, 0x3b, 0x36, 0xaa},
2559 {0x00, 0x4b, 0xfe, 0xaa},
2560 {0x00, 0x4d, 0x2e, 0xaa},
2561 {0x00, 0x51, 0x1c, 0xaa},
2562 {0x00, 0x52, 0x01, 0xaa},
2563 {0x00, 0x55, 0x0a, 0xaa},
2564 {0x00, 0x56, 0x0a, 0xaa},
2565 {0x00, 0x57, 0x07, 0xaa},
2566 {0x00, 0x58, 0x07, 0xaa},
2567 {0x00, 0x59, 0x04, 0xaa},
2568 {0x00, 0x70, 0x68, 0xaa},
2569 {0x00, 0x71, 0x04, 0xaa},
2570 {0x00, 0x72, 0x10, 0xaa},
2571 {0x00, 0x80, 0x71, 0xaa},
2572 {0x00, 0x81, 0x08, 0xaa},
2573 {0x00, 0x82, 0x00, 0xaa},
2574 {0x00, 0x83, 0x55, 0xaa},
2575 {0x00, 0x84, 0x06, 0xaa},
2576 {0x00, 0x85, 0x06, 0xaa},
2577 {0x00, 0x8b, 0x25, 0xaa},
2578 {0x00, 0x8c, 0x00, 0xaa},
2579 {0x00, 0x8d, 0x86, 0xaa},
2580 {0x00, 0x8e, 0x82, 0xaa},
2581 {0x00, 0x8f, 0x2d, 0xaa},
2582 {0x00, 0x90, 0x8b, 0xaa},
2583 {0x00, 0x91, 0x81, 0xaa},
2584 {0x00, 0x92, 0x81, 0xaa},
2585 {0x00, 0x93, 0x23, 0xaa},
2586 {0x00, 0xa3, 0x2a, 0xaa},
2587 {0x00, 0xa4, 0x03, 0xaa},
2588 {0x00, 0xa5, 0xea, 0xaa},
2589 {0x00, 0xb0, 0x68, 0xaa},
2590 {0x00, 0xbc, 0x04, 0xaa},
2591 {0x00, 0xbe, 0x3b, 0xaa},
2592 {0x00, 0x4e, 0x40, 0xaa},
2593 {0x00, 0x06, 0x04, 0xaa},
2594 {0x00, 0x07, 0x03, 0xaa},
2595 {0x00, 0xcd, 0x18, 0xaa},
2596 {0x00, 0x28, 0x03, 0xaa},
2597 {0x00, 0x29, 0xef, 0xaa},
2598/* reinit on alt 2 (qvga) or alt7 (vga) */
2599 {0xb3, 0x05, 0x00, 0xcc},
2600 {0xb3, 0x06, 0x00, 0xcc},
2601 {0xb8, 0x00, 0x01, 0xcc},
2602
2603 {0x00, 0x1d, 0x85, 0xaa},
2604 {0x00, 0x1e, 0xc6, 0xaa},
2605 {0x00, 0x00, 0x40, 0xdd},
2606 {0x00, 0x1d, 0x05, 0xaa},
2607
2608 {0x00, 0xd6, 0x22, 0xaa}, /* gamma 0 */
2609 {0x00, 0x73, 0x00, 0xaa},
2610 {0x00, 0x74, 0x0a, 0xaa},
2611 {0x00, 0x75, 0x16, 0xaa},
2612 {0x00, 0x76, 0x25, 0xaa},
2613 {0x00, 0x77, 0x34, 0xaa},
2614 {0x00, 0x78, 0x49, 0xaa},
2615 {0x00, 0x79, 0x5a, 0xaa},
2616 {0x00, 0x7a, 0x7f, 0xaa},
2617 {0x00, 0x7b, 0x9b, 0xaa},
2618 {0x00, 0x7c, 0xba, 0xaa},
2619 {0x00, 0x7d, 0xd4, 0xaa},
2620 {0x00, 0x7e, 0xea, 0xaa},
2621
2622 {0x00, 0xd6, 0x62, 0xaa}, /* gamma 1 */
2623 {0x00, 0x73, 0x00, 0xaa},
2624 {0x00, 0x74, 0x0a, 0xaa},
2625 {0x00, 0x75, 0x16, 0xaa},
2626 {0x00, 0x76, 0x25, 0xaa},
2627 {0x00, 0x77, 0x34, 0xaa},
2628 {0x00, 0x78, 0x49, 0xaa},
2629 {0x00, 0x79, 0x5a, 0xaa},
2630 {0x00, 0x7a, 0x7f, 0xaa},
2631 {0x00, 0x7b, 0x9b, 0xaa},
2632 {0x00, 0x7c, 0xba, 0xaa},
2633 {0x00, 0x7d, 0xd4, 0xaa},
2634 {0x00, 0x7e, 0xea, 0xaa},
2635
2636 {0x00, 0xd6, 0xa2, 0xaa}, /* gamma 2 */
2637 {0x00, 0x73, 0x00, 0xaa},
2638 {0x00, 0x74, 0x0a, 0xaa},
2639 {0x00, 0x75, 0x16, 0xaa},
2640 {0x00, 0x76, 0x25, 0xaa},
2641 {0x00, 0x77, 0x34, 0xaa},
2642 {0x00, 0x78, 0x49, 0xaa},
2643 {0x00, 0x79, 0x5a, 0xaa},
2644 {0x00, 0x7a, 0x7f, 0xaa},
2645 {0x00, 0x7b, 0x9b, 0xaa},
2646 {0x00, 0x7c, 0xba, 0xaa},
2647 {0x00, 0x7d, 0xd4, 0xaa},
2648 {0x00, 0x7e, 0xea, 0xaa},
2649
2650 {0x00, 0xaa, 0xff, 0xaa}, /* back light comp */
2651 {0x00, 0xc4, 0x03, 0xaa},
2652 {0x00, 0xc5, 0x19, 0xaa},
2653 {0x00, 0xc6, 0x03, 0xaa},
2654 {0x00, 0xc7, 0x91, 0xaa},
2655 {0x00, 0xc8, 0x01, 0xaa},
2656 {0x00, 0xc9, 0xdd, 0xaa},
2657 {0x00, 0xca, 0x02, 0xaa},
2658 {0x00, 0xcb, 0x37, 0xaa},
2659
2660/* read d1 */
2661 {0x00, 0xd1, 0x3c, 0xaa},
2662 {0x00, 0xb8, 0x28, 0xaa},
2663 {0x00, 0xb9, 0x1e, 0xaa},
2664 {0x00, 0xb6, 0x14, 0xaa},
2665 {0x00, 0xb7, 0x0f, 0xaa},
2666 {0x00, 0x5c, 0x10, 0xaa},
2667 {0x00, 0x5d, 0x18, 0xaa},
2668 {0x00, 0x5e, 0x24, 0xaa},
2669 {0x00, 0x5f, 0x24, 0xaa},
2670 {0x00, 0x86, 0x1a, 0xaa},
2671 {0x00, 0x60, 0x00, 0xaa},
2672 {0x00, 0x61, 0x1b, 0xaa},
2673 {0x00, 0x62, 0x30, 0xaa},
2674 {0x00, 0x63, 0x40, 0xaa},
2675 {0x00, 0x87, 0x1a, 0xaa},
2676 {0x00, 0x64, 0x00, 0xaa},
2677 {0x00, 0x65, 0x08, 0xaa},
2678 {0x00, 0x66, 0x10, 0xaa},
2679 {0x00, 0x67, 0x20, 0xaa},
2680 {0x00, 0x88, 0x10, 0xaa},
2681 {0x00, 0x68, 0x00, 0xaa},
2682 {0x00, 0x69, 0x08, 0xaa},
2683 {0x00, 0x6a, 0x0f, 0xaa},
2684 {0x00, 0x6b, 0x0f, 0xaa},
2685 {0x00, 0x89, 0x07, 0xaa},
2686 {0x00, 0xd5, 0x4c, 0xaa},
2687 {0x00, 0x0a, 0x00, 0xaa},
2688 {0x00, 0x0b, 0x2a, 0xaa},
2689 {0x00, 0x0e, 0x03, 0xaa},
2690 {0x00, 0x0f, 0xea, 0xaa},
2691 {0x00, 0xa2, 0x00, 0xaa},
2692 {0x00, 0xa3, 0x2a, 0xaa},
2693 {0x00, 0xa4, 0x03, 0xaa},
2694 {0x00, 0xa5, 0xea, 0xaa},
2695 {}
2696};
2697static const u8 poxxxx_initVGA[][4] = {
2698 {0x00, 0x20, 0x11, 0xaa},
2699 {0x00, 0x33, 0x38, 0xaa},
2700 {0x00, 0xbb, 0x0d, 0xaa},
2701 {0xb3, 0x22, 0x01, 0xcc},
2702 {0xb3, 0x23, 0xe0, 0xcc},
2703 {0xb3, 0x16, 0x02, 0xcc},
2704 {0xb3, 0x17, 0x7f, 0xcc},
2705 {0xb3, 0x02, 0xb0, 0xcc},
2706 {0xb3, 0x06, 0x00, 0xcc},
2707 {0xb3, 0x5c, 0x01, 0xcc},
2708 {0x00, 0x04, 0x06, 0xaa},
2709 {0x00, 0x05, 0x3f, 0xaa},
2710 {0x00, 0x04, 0x00, 0xdd}, /* delay 1s */
2711 {}
2712};
2713static const u8 poxxxx_initQVGA[][4] = {
2714 {0x00, 0x20, 0x33, 0xaa},
2715 {0x00, 0x33, 0x38, 0xaa},
2716 {0x00, 0xbb, 0x0d, 0xaa},
2717 {0xb3, 0x22, 0x00, 0xcc},
2718 {0xb3, 0x23, 0xf0, 0xcc},
2719 {0xb3, 0x16, 0x01, 0xcc},
2720 {0xb3, 0x17, 0x3f, 0xcc},
2721 {0xb3, 0x02, 0xb0, 0xcc},
2722 {0xb3, 0x06, 0x01, 0xcc},
2723 {0xb3, 0x5c, 0x00, 0xcc},
2724 {0x00, 0x04, 0x06, 0xaa},
2725 {0x00, 0x05, 0x3f, 0xaa},
2726 {0x00, 0x04, 0x00, 0xdd}, /* delay 1s */
2727 {}
2728};
2729static const u8 poxxxx_init_end_1[][4] = {
2730 {0x00, 0x47, 0x25, 0xaa},
2731 {0x00, 0x48, 0x80, 0xaa},
2732 {0x00, 0x49, 0x1f, 0xaa},
2733 {0x00, 0x4a, 0x40, 0xaa},
2734 {0x00, 0x44, 0x40, 0xaa},
2735 {0x00, 0xab, 0x4a, 0xaa},
2736 {0x00, 0xb1, 0x00, 0xaa},
2737 {0x00, 0xb2, 0x04, 0xaa},
2738 {0x00, 0xb3, 0x08, 0xaa},
2739 {0x00, 0xb4, 0x0b, 0xaa},
2740 {0x00, 0xb5, 0x0d, 0xaa},
2741 {0x00, 0x59, 0x7e, 0xaa}, /* sharpness */
2742 {0x00, 0x16, 0x00, 0xaa}, /* white balance */
2743 {0x00, 0x18, 0x00, 0xaa},
2744 {}
2745};
2746static const u8 poxxxx_init_end_2[][4] = {
2747 {0x00, 0x1d, 0x85, 0xaa},
2748 {0x00, 0x1e, 0x06, 0xaa},
2749 {0x00, 0x1d, 0x05, 0xaa},
2750 {}
2411}; 2751};
2412 2752
2413struct sensor_info { 2753struct sensor_info {
@@ -2420,33 +2760,89 @@ struct sensor_info {
2420 u8 op; 2760 u8 op;
2421}; 2761};
2422 2762
2423static const struct sensor_info sensor_info_data[] = { 2763/* probe values */
2424/* sensorId, I2cAdd, IdAdd, VpId, m1, m2, op */ 2764static const struct sensor_info vc0321_probe_data[] = {
2765/* sensorId, I2cAdd, IdAdd, VpId, m1, m2, op */
2766/* 0 OV9640 */
2425 {-1, 0x80 | 0x30, 0x0a, 0x0000, 0x25, 0x24, 0x05}, 2767 {-1, 0x80 | 0x30, 0x0a, 0x0000, 0x25, 0x24, 0x05},
2768/* 1 ICM108T (may respond on IdAdd == 0x83 - tested in vc032x_probe_sensor) */
2426 {-1, 0x80 | 0x20, 0x82, 0x0000, 0x24, 0x25, 0x01}, 2769 {-1, 0x80 | 0x20, 0x82, 0x0000, 0x24, 0x25, 0x01},
2427/* (tested in vc032x_probe_sensor) */ 2770/* 2 PO2130 (may detect PO3130NC - tested in vc032x_probe_sensor)*/
2428/* {-1, 0x80 | 0x20, 0x83, 0x0000, 0x24, 0x25, 0x01}, */ 2771 {-1, 0x80 | 0x76, 0x00, 0x0000, 0x24, 0x25, 0x01},
2429 {SENSOR_PO3130NC, 0x80 | 0x76, 0x00, 0x3130, 0x24, 0x25, 0x01}, 2772/* 3 MI1310 */
2773 {-1, 0x80 | 0x5d, 0x00, 0x0000, 0x24, 0x25, 0x01},
2774/* 4 MI360 - tested in vc032x_probe_sensor */
2775/* {SENSOR_MI0360, 0x80 | 0x5d, 0x00, 0x8243, 0x24, 0x25, 0x01}, */
2776/* 5 7131R */
2777 {SENSOR_HV7131R, 0x80 | 0x11, 0x00, 0x0209, 0x24, 0x25, 0x01},
2778/* 6 OV7649 */
2779 {-1, 0x80 | 0x21, 0x0a, 0x0000, 0x21, 0x20, 0x05},
2780/* 7 PAS302BCW */
2781 {-1, 0x80 | 0x40, 0x00, 0x0000, 0x20, 0x22, 0x05},
2782/* 8 OV7660 */
2783 {SENSOR_OV7660, 0x80 | 0x21, 0x0a, 0x7660, 0x26, 0x26, 0x05},
2784/* 9 PO3130NC - (tested in vc032x_probe_sensor) */
2785/* {SENSOR_PO3130NC, 0x80 | 0x76, 0x00, 0x3130, 0x24, 0x25, 0x01}, */
2786/* 10 PO1030KC */
2787 {-1, 0x80 | 0x6e, 0x00, 0x0000, 0x24, 0x25, 0x01},
2788/* 11 MI1310_SOC */
2430 {SENSOR_MI1310_SOC, 0x80 | 0x5d, 0x00, 0x143a, 0x24, 0x25, 0x01}, 2789 {SENSOR_MI1310_SOC, 0x80 | 0x5d, 0x00, 0x143a, 0x24, 0x25, 0x01},
2431/* (tested in vc032x_probe_sensor) */ 2790/* 12 OV9650 */
2791 {-1, 0x80 | 0x30, 0x0a, 0x0000, 0x25, 0x24, 0x05},
2792/* 13 S5K532 */
2793 {-1, 0x80 | 0x11, 0x39, 0x0000, 0x24, 0x25, 0x01},
2794/* 14 MI360_SOC - ??? */
2795/* 15 PO1200N */
2796 {SENSOR_PO1200, 0x80 | 0x5c, 0x00, 0x1200, 0x67, 0x67, 0x01},
2797/* 16 PO3030K */
2798 {-1, 0x80 | 0x18, 0x00, 0x0000, 0x24, 0x25, 0x01},
2799/* 17 PO2030 */
2800 {-1, 0x80 | 0x6e, 0x00, 0x0000, 0x24, 0x25, 0x01},
2801/* ?? */
2802 {-1, 0x80 | 0x56, 0x01, 0x0000, 0x64, 0x67, 0x01},
2803 {SENSOR_MI1320, 0x80 | 0x48, 0x00, 0x148c, 0x64, 0x65, 0x01},
2804};
2805static const struct sensor_info vc0323_probe_data[] = {
2806/* sensorId, I2cAdd, IdAdd, VpId, m1, m2, op */
2807/* 0 OV9640 */
2808 {-1, 0x80 | 0x30, 0x0a, 0x0000, 0x25, 0x24, 0x05},
2809/* 1 ICM108T (may respond on IdAdd == 0x83 - tested in vc032x_probe_sensor) */
2810 {-1, 0x80 | 0x20, 0x82, 0x0000, 0x24, 0x25, 0x01},
2811/* 2 PO2130 (may detect PO3130NC - tested in vc032x_probe_sensor)*/
2812 {-1, 0x80 | 0x76, 0x00, 0x0000, 0x24, 0x25, 0x01},
2813/* 3 MI1310 */
2814 {-1, 0x80 | 0x5d, 0x00, 0x0000, 0x24, 0x25, 0x01},
2815/* 4 MI360 - tested in vc032x_probe_sensor */
2432/* {SENSOR_MI0360, 0x80 | 0x5d, 0x00, 0x8243, 0x24, 0x25, 0x01}, */ 2816/* {SENSOR_MI0360, 0x80 | 0x5d, 0x00, 0x8243, 0x24, 0x25, 0x01}, */
2817/* 5 7131R */
2433 {SENSOR_HV7131R, 0x80 | 0x11, 0x00, 0x0209, 0x24, 0x25, 0x01}, 2818 {SENSOR_HV7131R, 0x80 | 0x11, 0x00, 0x0209, 0x24, 0x25, 0x01},
2819/* 6 OV7649 */
2434 {-1, 0x80 | 0x21, 0x0a, 0x0000, 0x21, 0x20, 0x05}, 2820 {-1, 0x80 | 0x21, 0x0a, 0x0000, 0x21, 0x20, 0x05},
2821/* 7 PAS302BCW */
2435 {-1, 0x80 | 0x40, 0x00, 0x0000, 0x20, 0x22, 0x05}, 2822 {-1, 0x80 | 0x40, 0x00, 0x0000, 0x20, 0x22, 0x05},
2823/* 8 OV7660 */
2436 {SENSOR_OV7660, 0x80 | 0x21, 0x0a, 0x7660, 0x26, 0x26, 0x05}, 2824 {SENSOR_OV7660, 0x80 | 0x21, 0x0a, 0x7660, 0x26, 0x26, 0x05},
2437/* {SENSOR_PO3130NC, 0x80 | 0x76, 0x00, 0x0000, 0x24, 0x25, 0x01}, */ 2825/* 9 PO3130NC - (tested in vc032x_probe_sensor) */
2826/* {SENSOR_PO3130NC, 0x80 | 0x76, 0x00, 0x3130, 0x24, 0x25, 0x01}, */
2827/* 10 PO1030KC */
2438 {-1, 0x80 | 0x6e, 0x00, 0x0000, 0x24, 0x25, 0x01}, 2828 {-1, 0x80 | 0x6e, 0x00, 0x0000, 0x24, 0x25, 0x01},
2439/* {SENSOR_MI1310_SOC, 0x80 | 0x5d, 0x00, 0x0000, 0x24, 0x25, 0x01}, */ 2829/* 11 MI1310_SOC */
2440/* {-1, 0x80 | 0x30, 0x0a, 0x0000, 0x25, 0x24, 0x05}, */ 2830 {SENSOR_MI1310_SOC, 0x80 | 0x5d, 0x00, 0x143a, 0x24, 0x25, 0x01},
2831/* 12 OV9650 */
2832 {-1, 0x80 | 0x30, 0x0a, 0x0000, 0x25, 0x24, 0x05},
2833/* 13 S5K532 */
2441 {-1, 0x80 | 0x11, 0x39, 0x0000, 0x24, 0x25, 0x01}, 2834 {-1, 0x80 | 0x11, 0x39, 0x0000, 0x24, 0x25, 0x01},
2835/* 14 MI360_SOC - ??? */
2836/* 15 PO1200N */
2442 {SENSOR_PO1200, 0x80 | 0x5c, 0x00, 0x1200, 0x67, 0x67, 0x01}, 2837 {SENSOR_PO1200, 0x80 | 0x5c, 0x00, 0x1200, 0x67, 0x67, 0x01},
2838/* 16 ?? */
2443 {-1, 0x80 | 0x2d, 0x00, 0x0000, 0x65, 0x67, 0x01}, 2839 {-1, 0x80 | 0x2d, 0x00, 0x0000, 0x65, 0x67, 0x01},
2840/* 17 PO2030 */
2444 {-1, 0x80 | 0x6e, 0x00, 0x0000, 0x24, 0x25, 0x01}, 2841 {-1, 0x80 | 0x6e, 0x00, 0x0000, 0x24, 0x25, 0x01},
2842/* ?? */
2445 {-1, 0x80 | 0x56, 0x01, 0x0000, 0x64, 0x67, 0x01}, 2843 {-1, 0x80 | 0x56, 0x01, 0x0000, 0x64, 0x67, 0x01},
2446 {SENSOR_MI1320_SOC, 0x80 | 0x48, 0x00, 0x148c, 0x64, 0x67, 0x01}, 2844 {SENSOR_MI1320_SOC, 0x80 | 0x48, 0x00, 0x148c, 0x64, 0x67, 0x01},
2447/*fixme: previously detected?*/ 2845/*fixme: not in the ms-win probe - may be found before? */
2448 {SENSOR_MI1320, 0x80 | 0x48, 0x00, 0x148c, 0x64, 0x65, 0x01},
2449/*fixme: not in the ms-win probe - may be found before?*/
2450 {SENSOR_OV7670, 0x80 | 0x21, 0x0a, 0x7673, 0x66, 0x67, 0x05}, 2846 {SENSOR_OV7670, 0x80 | 0x21, 0x0a, 0x7673, 0x66, 0x67, 0x05},
2451}; 2847};
2452 2848
@@ -2520,7 +2916,7 @@ static int vc032x_probe_sensor(struct gspca_dev *gspca_dev)
2520{ 2916{
2521 struct sd *sd = (struct sd *) gspca_dev; 2917 struct sd *sd = (struct sd *) gspca_dev;
2522 struct usb_device *dev = gspca_dev->dev; 2918 struct usb_device *dev = gspca_dev->dev;
2523 int i; 2919 int i, n;
2524 u16 value; 2920 u16 value;
2525 const struct sensor_info *ptsensor_info; 2921 const struct sensor_info *ptsensor_info;
2526 2922
@@ -2531,9 +2927,16 @@ static int vc032x_probe_sensor(struct gspca_dev *gspca_dev)
2531 } 2927 }
2532 2928
2533 reg_r(gspca_dev, 0xa1, 0xbfcf, 1); 2929 reg_r(gspca_dev, 0xa1, 0xbfcf, 1);
2534 PDEBUG(D_PROBE, "check sensor header %02x", gspca_dev->usb_buf[0]); 2930 PDEBUG(D_PROBE, "vc032%d check sensor header %02x",
2535 for (i = 0; i < ARRAY_SIZE(sensor_info_data); i++) { 2931 sd->bridge == BRIDGE_VC0321 ? 1 : 3, gspca_dev->usb_buf[0]);
2536 ptsensor_info = &sensor_info_data[i]; 2932 if (sd->bridge == BRIDGE_VC0321) {
2933 ptsensor_info = vc0321_probe_data;
2934 n = ARRAY_SIZE(vc0321_probe_data);
2935 } else {
2936 ptsensor_info = vc0323_probe_data;
2937 n = ARRAY_SIZE(vc0323_probe_data);
2938 }
2939 for (i = 0; i < n; i++) {
2537 reg_w(dev, 0xa0, 0x02, 0xb334); 2940 reg_w(dev, 0xa0, 0x02, 0xb334);
2538 reg_w(dev, 0xa0, ptsensor_info->m1, 0xb300); 2941 reg_w(dev, 0xa0, ptsensor_info->m1, 0xb300);
2539 reg_w(dev, 0xa0, ptsensor_info->m2, 0xb300); 2942 reg_w(dev, 0xa0, ptsensor_info->m2, 0xb300);
@@ -2551,13 +2954,15 @@ static int vc032x_probe_sensor(struct gspca_dev *gspca_dev)
2551 return ptsensor_info->sensorId; 2954 return ptsensor_info->sensorId;
2552 2955
2553 switch (value) { 2956 switch (value) {
2957 case 0x3130:
2958 return SENSOR_PO3130NC;
2554 case 0x7673: 2959 case 0x7673:
2555 return SENSOR_OV7670; 2960 return SENSOR_OV7670;
2556 case 0x8243: 2961 case 0x8243:
2557 return SENSOR_MI0360; 2962 return SENSOR_MI0360;
2558 } 2963 }
2559/*fixme: should return here*/
2560 } 2964 }
2965 ptsensor_info++;
2561 } 2966 }
2562 return -1; 2967 return -1;
2563} 2968}
@@ -2619,7 +3024,7 @@ static void usb_exchange(struct gspca_dev *gspca_dev,
2619 i2c_write(gspca_dev, data[i][0], &data[i][1], 2); 3024 i2c_write(gspca_dev, data[i][0], &data[i][1], 2);
2620 break; 3025 break;
2621 case 0xdd: 3026 case 0xdd:
2622 msleep(data[i][2] + 10); 3027 msleep(data[i][1] * 256 + data[i][2] + 10);
2623 break; 3028 break;
2624 } 3029 }
2625 i++; 3030 i++;
@@ -2646,12 +3051,17 @@ static int sd_config(struct gspca_dev *gspca_dev,
2646 64, /* OV7670 6 */ 3051 64, /* OV7670 6 */
2647 128, /* PO1200 7 */ 3052 128, /* PO1200 7 */
2648 128, /* PO3130NC 8 */ 3053 128, /* PO3130NC 8 */
3054 128, /* POxxxx 9 */
2649 }; 3055 };
2650 3056
2651 cam = &gspca_dev->cam; 3057 cam = &gspca_dev->cam;
2652 sd->bridge = id->driver_info >> 8; 3058 sd->bridge = id->driver_info >> 8;
2653 sd->flags = id->driver_info & 0xff; 3059 sd->flags = id->driver_info & 0xff;
2654 sensor = vc032x_probe_sensor(gspca_dev); 3060 if (id->idVendor == 0x046d &&
3061 (id->idProduct == 0x0892 || id->idProduct == 0x0896))
3062 sensor = SENSOR_POxxxx;
3063 else
3064 sensor = vc032x_probe_sensor(gspca_dev);
2655 switch (sensor) { 3065 switch (sensor) {
2656 case -1: 3066 case -1:
2657 PDEBUG(D_PROBE, "Unknown sensor..."); 3067 PDEBUG(D_PROBE, "Unknown sensor...");
@@ -2684,6 +3094,9 @@ static int sd_config(struct gspca_dev *gspca_dev,
2684 case SENSOR_PO3130NC: 3094 case SENSOR_PO3130NC:
2685 PDEBUG(D_PROBE, "Find Sensor PO3130NC"); 3095 PDEBUG(D_PROBE, "Find Sensor PO3130NC");
2686 break; 3096 break;
3097 case SENSOR_POxxxx:
3098 PDEBUG(D_PROBE, "Sensor POxxxx");
3099 break;
2687 } 3100 }
2688 sd->sensor = sensor; 3101 sd->sensor = sensor;
2689 3102
@@ -2712,28 +3125,19 @@ static int sd_config(struct gspca_dev *gspca_dev,
2712 } 3125 }
2713 cam->npkt = npkt[sd->sensor]; 3126 cam->npkt = npkt[sd->sensor];
2714 3127
3128 sd->brightness = BRIGHTNESS_DEF;
3129 sd->contrast = CONTRAST_DEF;
3130 sd->colors = COLOR_DEF;
2715 sd->hflip = HFLIP_DEF; 3131 sd->hflip = HFLIP_DEF;
2716 sd->vflip = VFLIP_DEF; 3132 sd->vflip = VFLIP_DEF;
2717 if (sd->sensor == SENSOR_OV7670)
2718 sd->flags |= FL_HFLIP | FL_VFLIP;
2719 sd->lightfreq = FREQ_DEF; 3133 sd->lightfreq = FREQ_DEF;
2720 if (sd->sensor != SENSOR_OV7670)
2721 gspca_dev->ctrl_dis = (1 << LIGHTFREQ_IDX);
2722 switch (sd->sensor) {
2723 case SENSOR_MI1310_SOC:
2724 case SENSOR_MI1320_SOC:
2725 case SENSOR_OV7660:
2726 case SENSOR_OV7670:
2727 case SENSOR_PO1200:
2728 break;
2729 default:
2730 gspca_dev->ctrl_dis = (1 << HFLIP_IDX)
2731 | (1 << VFLIP_IDX);
2732 break;
2733 }
2734
2735 sd->sharpness = SHARPNESS_DEF; 3134 sd->sharpness = SHARPNESS_DEF;
2736 3135
3136 gspca_dev->ctrl_dis = ctrl_dis[sd->sensor];
3137
3138 if (sd->sensor == SENSOR_OV7670)
3139 sd->flags |= FL_HFLIP | FL_VFLIP;
3140
2737 if (sd->bridge == BRIDGE_VC0321) { 3141 if (sd->bridge == BRIDGE_VC0321) {
2738 reg_r(gspca_dev, 0x8a, 0, 3); 3142 reg_r(gspca_dev, 0x8a, 0, 3);
2739 reg_w(dev, 0x87, 0x00, 0x0f0f); 3143 reg_w(dev, 0x87, 0x00, 0x0f0f);
@@ -2747,10 +3151,55 @@ static int sd_config(struct gspca_dev *gspca_dev,
2747/* this function is called at probe and resume time */ 3151/* this function is called at probe and resume time */
2748static int sd_init(struct gspca_dev *gspca_dev) 3152static int sd_init(struct gspca_dev *gspca_dev)
2749{ 3153{
3154 struct sd *sd = (struct sd *) gspca_dev;
3155
3156 if (sd->sensor == SENSOR_POxxxx) {
3157 reg_r(gspca_dev, 0xa1, 0xb300, 1);
3158 if (gspca_dev->usb_buf[0] != 0) {
3159 reg_w(gspca_dev->dev, 0xa0, 0x26, 0xb300);
3160 reg_w(gspca_dev->dev, 0xa0, 0x04, 0xb300);
3161 reg_w(gspca_dev->dev, 0xa0, 0x00, 0xb300);
3162 }
3163 }
2750 return 0; 3164 return 0;
2751} 3165}
2752 3166
2753/* some sensors only */ 3167static void setbrightness(struct gspca_dev *gspca_dev)
3168{
3169 struct sd *sd = (struct sd *) gspca_dev;
3170 u8 data;
3171
3172 if (gspca_dev->ctrl_dis & (1 << BRIGHTNESS_IDX))
3173 return;
3174 data = sd->brightness;
3175 if (data >= 0x80)
3176 data &= 0x7f;
3177 else
3178 data = 0xff ^ data;
3179 i2c_write(gspca_dev, 0x98, &data, 1);
3180}
3181
3182static void setcontrast(struct gspca_dev *gspca_dev)
3183{
3184 struct sd *sd = (struct sd *) gspca_dev;
3185
3186 if (gspca_dev->ctrl_dis & (1 << CONTRAST_IDX))
3187 return;
3188 i2c_write(gspca_dev, 0x99, &sd->contrast, 1);
3189}
3190
3191static void setcolors(struct gspca_dev *gspca_dev)
3192{
3193 struct sd *sd = (struct sd *) gspca_dev;
3194 u8 data;
3195
3196 if (gspca_dev->ctrl_dis & (1 << COLORS_IDX))
3197 return;
3198 data = sd->colors - (sd->colors >> 3) - 1;
3199 i2c_write(gspca_dev, 0x94, &data, 1);
3200 i2c_write(gspca_dev, 0x95, &sd->colors, 1);
3201}
3202
2754static void sethvflip(struct gspca_dev *gspca_dev) 3203static void sethvflip(struct gspca_dev *gspca_dev)
2755{ 3204{
2756 struct sd *sd = (struct sd *) gspca_dev; 3205 struct sd *sd = (struct sd *) gspca_dev;
@@ -2764,6 +3213,7 @@ static void sethvflip(struct gspca_dev *gspca_dev)
2764 vflip = !vflip; 3213 vflip = !vflip;
2765 switch (sd->sensor) { 3214 switch (sd->sensor) {
2766 case SENSOR_MI1310_SOC: 3215 case SENSOR_MI1310_SOC:
3216 case SENSOR_MI1320:
2767 case SENSOR_MI1320_SOC: 3217 case SENSOR_MI1320_SOC:
2768 data[0] = data[1] = 0; /* select page 0 */ 3218 data[0] = data[1] = 0; /* select page 0 */
2769 i2c_write(gspca_dev, 0xf0, data, 2); 3219 i2c_write(gspca_dev, 0xf0, data, 2);
@@ -2801,18 +3251,29 @@ static void setlightfreq(struct gspca_dev *gspca_dev)
2801 usb_exchange(gspca_dev, ov7660_freq_tb[sd->lightfreq]); 3251 usb_exchange(gspca_dev, ov7660_freq_tb[sd->lightfreq]);
2802} 3252}
2803 3253
2804/* po1200 only */
2805static void setsharpness(struct gspca_dev *gspca_dev) 3254static void setsharpness(struct gspca_dev *gspca_dev)
2806{ 3255{
2807 struct sd *sd = (struct sd *) gspca_dev; 3256 struct sd *sd = (struct sd *) gspca_dev;
2808 u8 data; 3257 u8 data;
2809 3258
2810 if (sd->sensor != SENSOR_PO1200) 3259 switch (sd->sensor) {
2811 return; 3260 case SENSOR_PO1200:
2812 data = 0; 3261 data = 0;
2813 i2c_write(gspca_dev, 0x03, &data, 1); 3262 i2c_write(gspca_dev, 0x03, &data, 1);
2814 data = 0xb5 + sd->sharpness * 3; 3263 if (sd->sharpness < 0)
2815 i2c_write(gspca_dev, 0x61, &data, 1); 3264 data = 0x6a;
3265 else
3266 data = 0xb5 + sd->sharpness * 3;
3267 i2c_write(gspca_dev, 0x61, &data, 1);
3268 break;
3269 case SENSOR_POxxxx:
3270 if (sd->sharpness < 0)
3271 data = 0x7e; /* def = max */
3272 else
3273 data = 0x60 + sd->sharpness * 0x0f;
3274 i2c_write(gspca_dev, 0x59, &data, 1);
3275 break;
3276 }
2816} 3277}
2817 3278
2818static int sd_start(struct gspca_dev *gspca_dev) 3279static int sd_start(struct gspca_dev *gspca_dev)
@@ -2922,12 +3383,27 @@ static int sd_start(struct gspca_dev *gspca_dev)
2922 usb_exchange(gspca_dev, init); 3383 usb_exchange(gspca_dev, init);
2923 init = po3130_rundata; 3384 init = po3130_rundata;
2924 break; 3385 break;
2925 default: 3386 case SENSOR_PO1200:
2926/* case SENSOR_PO1200: */
2927 GammaT = po1200_gamma; 3387 GammaT = po1200_gamma;
2928 MatrixT = po1200_matrix; 3388 MatrixT = po1200_matrix;
2929 init = po1200_initVGA_data; 3389 init = po1200_initVGA_data;
2930 break; 3390 break;
3391 default:
3392/* case SENSOR_POxxxx: */
3393 usb_exchange(gspca_dev, poxxxx_init_common);
3394 if (mode)
3395 init = poxxxx_initQVGA;
3396 else
3397 init = poxxxx_initVGA;
3398 usb_exchange(gspca_dev, init);
3399 reg_r(gspca_dev, 0x8c, 0x0000, 3);
3400 reg_w(gspca_dev->dev, 0xa0,
3401 gspca_dev->usb_buf[2] & 1 ? 0 : 1,
3402 0xb35c);
3403 msleep(300);
3404/*fixme: i2c read 04 and 05*/
3405 init = poxxxx_init_end_1;
3406 break;
2931 } 3407 }
2932 usb_exchange(gspca_dev, init); 3408 usb_exchange(gspca_dev, init);
2933 if (GammaT && MatrixT) { 3409 if (GammaT && MatrixT) {
@@ -2936,7 +3412,6 @@ static int sd_start(struct gspca_dev *gspca_dev)
2936 put_tab_to_reg(gspca_dev, GammaT, 17, 0xb86c); 3412 put_tab_to_reg(gspca_dev, GammaT, 17, 0xb86c);
2937 put_tab_to_reg(gspca_dev, MatrixT, 9, 0xb82c); 3413 put_tab_to_reg(gspca_dev, MatrixT, 9, 0xb82c);
2938 3414
2939 /* set the led on 0x0892 0x0896 */
2940 switch (sd->sensor) { 3415 switch (sd->sensor) {
2941 case SENSOR_PO1200: 3416 case SENSOR_PO1200:
2942 case SENSOR_HV7131R: 3417 case SENSOR_HV7131R:
@@ -2945,16 +3420,22 @@ static int sd_start(struct gspca_dev *gspca_dev)
2945 case SENSOR_MI1310_SOC: 3420 case SENSOR_MI1310_SOC:
2946 reg_w(gspca_dev->dev, 0x89, 0x058c, 0x0000); 3421 reg_w(gspca_dev->dev, 0x89, 0x058c, 0x0000);
2947 break; 3422 break;
2948 default:
2949 if (!(sd->flags & FL_SAMSUNG))
2950 reg_w(gspca_dev->dev, 0x89, 0xffff, 0xfdff);
2951 break;
2952 } 3423 }
2953 msleep(100); 3424 msleep(100);
2954 setsharpness(gspca_dev); 3425 setsharpness(gspca_dev);
2955 sethvflip(gspca_dev); 3426 sethvflip(gspca_dev);
2956 setlightfreq(gspca_dev); 3427 setlightfreq(gspca_dev);
2957 } 3428 }
3429 if (sd->sensor == SENSOR_POxxxx) {
3430 setcolors(gspca_dev);
3431 setbrightness(gspca_dev);
3432 setcontrast(gspca_dev);
3433
3434 /* led on */
3435 msleep(80);
3436 reg_w(gspca_dev->dev, 0x89, 0xffff, 0xfdff);
3437 usb_exchange(gspca_dev, poxxxx_init_end_2);
3438 }
2958 return 0; 3439 return 0;
2959} 3440}
2960 3441
@@ -2963,10 +3444,17 @@ static void sd_stopN(struct gspca_dev *gspca_dev)
2963 struct usb_device *dev = gspca_dev->dev; 3444 struct usb_device *dev = gspca_dev->dev;
2964 struct sd *sd = (struct sd *) gspca_dev; 3445 struct sd *sd = (struct sd *) gspca_dev;
2965 3446
2966 if (sd->sensor == SENSOR_MI1310_SOC) 3447 switch (sd->sensor) {
3448 case SENSOR_MI1310_SOC:
2967 reg_w(dev, 0x89, 0x058c, 0x00ff); 3449 reg_w(dev, 0x89, 0x058c, 0x00ff);
2968 else if (!(sd->flags & FL_SAMSUNG)) 3450 break;
2969 reg_w(dev, 0x89, 0xffff, 0xffff); 3451 case SENSOR_POxxxx:
3452 return;
3453 default:
3454 if (!(sd->flags & FL_SAMSUNG))
3455 reg_w(dev, 0x89, 0xffff, 0xffff);
3456 break;
3457 }
2970 reg_w(dev, 0xa0, 0x01, 0xb301); 3458 reg_w(dev, 0xa0, 0x01, 0xb301);
2971 reg_w(dev, 0xa0, 0x09, 0xb003); 3459 reg_w(dev, 0xa0, 0x09, 0xb003);
2972} 3460}
@@ -2984,6 +3472,12 @@ static void sd_stop0(struct gspca_dev *gspca_dev)
2984 reg_w(dev, 0x89, 0x058c, 0x00ff); 3472 reg_w(dev, 0x89, 0x058c, 0x00ff);
2985 else if (!(sd->flags & FL_SAMSUNG)) 3473 else if (!(sd->flags & FL_SAMSUNG))
2986 reg_w(dev, 0x89, 0xffff, 0xffff); 3474 reg_w(dev, 0x89, 0xffff, 0xffff);
3475
3476 if (sd->sensor == SENSOR_POxxxx) {
3477 reg_w(dev, 0xa0, 0x26, 0xb300);
3478 reg_w(dev, 0xa0, 0x04, 0xb300);
3479 reg_w(dev, 0xa0, 0x00, 0xb300);
3480 }
2987} 3481}
2988 3482
2989static void sd_pkt_scan(struct gspca_dev *gspca_dev, 3483static void sd_pkt_scan(struct gspca_dev *gspca_dev,
@@ -3020,6 +3514,60 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
3020 gspca_frame_add(gspca_dev, INTER_PACKET, data, len); 3514 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
3021} 3515}
3022 3516
3517static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
3518{
3519 struct sd *sd = (struct sd *) gspca_dev;
3520
3521 sd->brightness = val;
3522 if (gspca_dev->streaming)
3523 setbrightness(gspca_dev);
3524 return 0;
3525}
3526
3527static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
3528{
3529 struct sd *sd = (struct sd *) gspca_dev;
3530
3531 *val = sd->brightness;
3532 return 0;
3533}
3534
3535static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
3536{
3537 struct sd *sd = (struct sd *) gspca_dev;
3538
3539 sd->contrast = val;
3540 if (gspca_dev->streaming)
3541 setcontrast(gspca_dev);
3542 return 0;
3543}
3544
3545static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
3546{
3547 struct sd *sd = (struct sd *) gspca_dev;
3548
3549 *val = sd->contrast;
3550 return 0;
3551}
3552
3553static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
3554{
3555 struct sd *sd = (struct sd *) gspca_dev;
3556
3557 sd->colors = val;
3558 if (gspca_dev->streaming)
3559 setcolors(gspca_dev);
3560 return 0;
3561}
3562
3563static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
3564{
3565 struct sd *sd = (struct sd *) gspca_dev;
3566
3567 *val = sd->colors;
3568 return 0;
3569}
3570
3023static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val) 3571static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
3024{ 3572{
3025 struct sd *sd = (struct sd *) gspca_dev; 3573 struct sd *sd = (struct sd *) gspca_dev;
diff --git a/drivers/media/video/gspca/zc3xx.c b/drivers/media/video/gspca/zc3xx.c
index 1a800fc1c00e..50986da3d912 100644
--- a/drivers/media/video/gspca/zc3xx.c
+++ b/drivers/media/video/gspca/zc3xx.c
@@ -1,9 +1,8 @@
1/* 1/*
2 * Z-Star/Vimicro zc301/zc302p/vc30x library 2 * Z-Star/Vimicro zc301/zc302p/vc30x library
3 * Copyright (C) 2004 2005 2006 Michel Xhaard
4 * mxhaard@magic.fr
5 * 3 *
6 * V4L2 by Jean-Francois Moine <http://moinejf.free.fr> 4 * Copyright (C) 2009-2010 Jean-Francois Moine <http://moinejf.free.fr>
5 * Copyright (C) 2004 2005 2006 Michel Xhaard mxhaard@magic.fr
7 * 6 *
8 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
@@ -22,10 +21,11 @@
22 21
23#define MODULE_NAME "zc3xx" 22#define MODULE_NAME "zc3xx"
24 23
24#include <linux/input.h>
25#include "gspca.h" 25#include "gspca.h"
26#include "jpeg.h" 26#include "jpeg.h"
27 27
28MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>, " 28MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>, "
29 "Serge A. Suchkov <Serge.A.S@tochka.ru>"); 29 "Serge A. Suchkov <Serge.A.S@tochka.ru>");
30MODULE_DESCRIPTION("GSPCA ZC03xx/VC3xx USB Camera Driver"); 30MODULE_DESCRIPTION("GSPCA ZC03xx/VC3xx USB Camera Driver");
31MODULE_LICENSE("GPL"); 31MODULE_LICENSE("GPL");
@@ -39,18 +39,18 @@ static int force_sensor = -1;
39struct sd { 39struct sd {
40 struct gspca_dev gspca_dev; /* !! must be the first item */ 40 struct gspca_dev gspca_dev; /* !! must be the first item */
41 41
42 __u8 brightness; 42 u8 brightness;
43 __u8 contrast; 43 u8 contrast;
44 __u8 gamma; 44 u8 gamma;
45 __u8 autogain; 45 u8 autogain;
46 __u8 lightfreq; 46 u8 lightfreq;
47 __u8 sharpness; 47 u8 sharpness;
48 u8 quality; /* image quality */ 48 u8 quality; /* image quality */
49#define QUALITY_MIN 40 49#define QUALITY_MIN 40
50#define QUALITY_MAX 60 50#define QUALITY_MAX 60
51#define QUALITY_DEF 50 51#define QUALITY_DEF 50
52 52
53 signed char sensor; /* Type of image sensor chip */ 53 u8 sensor; /* Type of image sensor chip */
54/* !! values used in different tables */ 54/* !! values used in different tables */
55#define SENSOR_ADCM2700 0 55#define SENSOR_ADCM2700 0
56#define SENSOR_CS2102 1 56#define SENSOR_CS2102 1
@@ -92,9 +92,8 @@ static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
92static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val); 92static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val);
93static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val); 93static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val);
94 94
95static struct ctrl sd_ctrls[] = { 95static const struct ctrl sd_ctrls[] = {
96#define BRIGHTNESS_IDX 0 96#define BRIGHTNESS_IDX 0
97#define SD_BRIGHTNESS 0
98 { 97 {
99 { 98 {
100 .id = V4L2_CID_BRIGHTNESS, 99 .id = V4L2_CID_BRIGHTNESS,
@@ -103,26 +102,26 @@ static struct ctrl sd_ctrls[] = {
103 .minimum = 0, 102 .minimum = 0,
104 .maximum = 255, 103 .maximum = 255,
105 .step = 1, 104 .step = 1,
106 .default_value = 128, 105#define BRIGHTNESS_DEF 128
106 .default_value = BRIGHTNESS_DEF,
107 }, 107 },
108 .set = sd_setbrightness, 108 .set = sd_setbrightness,
109 .get = sd_getbrightness, 109 .get = sd_getbrightness,
110 }, 110 },
111#define SD_CONTRAST 1
112 { 111 {
113 { 112 {
114 .id = V4L2_CID_CONTRAST, 113 .id = V4L2_CID_CONTRAST,
115 .type = V4L2_CTRL_TYPE_INTEGER, 114 .type = V4L2_CTRL_TYPE_INTEGER,
116 .name = "Contrast", 115 .name = "Contrast",
117 .minimum = 0, 116 .minimum = 0,
118 .maximum = 256, 117 .maximum = 255,
119 .step = 1, 118 .step = 1,
120 .default_value = 128, 119#define CONTRAST_DEF 128
120 .default_value = CONTRAST_DEF,
121 }, 121 },
122 .set = sd_setcontrast, 122 .set = sd_setcontrast,
123 .get = sd_getcontrast, 123 .get = sd_getcontrast,
124 }, 124 },
125#define SD_GAMMA 2
126 { 125 {
127 { 126 {
128 .id = V4L2_CID_GAMMA, 127 .id = V4L2_CID_GAMMA,
@@ -136,7 +135,6 @@ static struct ctrl sd_ctrls[] = {
136 .set = sd_setgamma, 135 .set = sd_setgamma,
137 .get = sd_getgamma, 136 .get = sd_getgamma,
138 }, 137 },
139#define SD_AUTOGAIN 3
140 { 138 {
141 { 139 {
142 .id = V4L2_CID_AUTOGAIN, 140 .id = V4L2_CID_AUTOGAIN,
@@ -145,13 +143,13 @@ static struct ctrl sd_ctrls[] = {
145 .minimum = 0, 143 .minimum = 0,
146 .maximum = 1, 144 .maximum = 1,
147 .step = 1, 145 .step = 1,
148 .default_value = 1, 146#define AUTOGAIN_DEF 1
147 .default_value = AUTOGAIN_DEF,
149 }, 148 },
150 .set = sd_setautogain, 149 .set = sd_setautogain,
151 .get = sd_getautogain, 150 .get = sd_getautogain,
152 }, 151 },
153#define LIGHTFREQ_IDX 4 152#define LIGHTFREQ_IDX 4
154#define SD_FREQ 4
155 { 153 {
156 { 154 {
157 .id = V4L2_CID_POWER_LINE_FREQUENCY, 155 .id = V4L2_CID_POWER_LINE_FREQUENCY,
@@ -160,12 +158,12 @@ static struct ctrl sd_ctrls[] = {
160 .minimum = 0, 158 .minimum = 0,
161 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */ 159 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
162 .step = 1, 160 .step = 1,
163 .default_value = 1, 161#define FREQ_DEF 0
162 .default_value = FREQ_DEF,
164 }, 163 },
165 .set = sd_setfreq, 164 .set = sd_setfreq,
166 .get = sd_getfreq, 165 .get = sd_getfreq,
167 }, 166 },
168#define SD_SHARPNESS 5
169 { 167 {
170 { 168 {
171 .id = V4L2_CID_SHARPNESS, 169 .id = V4L2_CID_SHARPNESS,
@@ -174,7 +172,8 @@ static struct ctrl sd_ctrls[] = {
174 .minimum = 0, 172 .minimum = 0,
175 .maximum = 3, 173 .maximum = 3,
176 .step = 1, 174 .step = 1,
177 .default_value = 2, 175#define SHARPNESS_DEF 2
176 .default_value = SHARPNESS_DEF,
178 }, 177 },
179 .set = sd_setsharpness, 178 .set = sd_setsharpness,
180 .get = sd_getsharpness, 179 .get = sd_getsharpness,
@@ -194,6 +193,19 @@ static const struct v4l2_pix_format vga_mode[] = {
194 .priv = 0}, 193 .priv = 0},
195}; 194};
196 195
196static const struct v4l2_pix_format broken_vga_mode[] = {
197 {320, 232, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
198 .bytesperline = 320,
199 .sizeimage = 320 * 232 * 4 / 8 + 590,
200 .colorspace = V4L2_COLORSPACE_JPEG,
201 .priv = 1},
202 {640, 472, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
203 .bytesperline = 640,
204 .sizeimage = 640 * 472 * 3 / 8 + 590,
205 .colorspace = V4L2_COLORSPACE_JPEG,
206 .priv = 0},
207};
208
197static const struct v4l2_pix_format sif_mode[] = { 209static const struct v4l2_pix_format sif_mode[] = {
198 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 210 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
199 .bytesperline = 176, 211 .bytesperline = 176,
@@ -209,9 +221,9 @@ static const struct v4l2_pix_format sif_mode[] = {
209 221
210/* usb exchanges */ 222/* usb exchanges */
211struct usb_action { 223struct usb_action {
212 __u8 req; 224 u8 req;
213 __u8 val; 225 u8 val;
214 __u16 idx; 226 u16 idx;
215}; 227};
216 228
217static const struct usb_action adcm2700_Initial[] = { 229static const struct usb_action adcm2700_Initial[] = {
@@ -421,7 +433,7 @@ static const struct usb_action adcm2700_NoFliker[] = {
421 {0xaa, 0xfe, 0x0010}, /* 00,fe,10,aa */ 433 {0xaa, 0xfe, 0x0010}, /* 00,fe,10,aa */
422 {} 434 {}
423}; 435};
424static const struct usb_action cs2102_Initial[] = { /* 320x240 */ 436static const struct usb_action cs2102_InitialScale[] = { /* 320x240 */
425 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 437 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
426 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, 438 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT},
427 {0xa0, 0x00, ZC3XX_R010_CMOSSENSORSELECT}, 439 {0xa0, 0x00, ZC3XX_R010_CMOSSENSORSELECT},
@@ -473,7 +485,7 @@ static const struct usb_action cs2102_Initial[] = { /* 320x240 */
473 {} 485 {}
474}; 486};
475 487
476static const struct usb_action cs2102_InitialScale[] = { /* 640x480 */ 488static const struct usb_action cs2102_Initial[] = { /* 640x480 */
477 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 489 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
478 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, 490 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
479 {0xa0, 0x00, ZC3XX_R010_CMOSSENSORSELECT}, 491 {0xa0, 0x00, ZC3XX_R010_CMOSSENSORSELECT},
@@ -524,7 +536,7 @@ static const struct usb_action cs2102_InitialScale[] = { /* 640x480 */
524 {0xa0, 0x00, 0x01ad}, 536 {0xa0, 0x00, 0x01ad},
525 {} 537 {}
526}; 538};
527static const struct usb_action cs2102_50HZ[] = { 539static const struct usb_action cs2102_50HZScale[] = {
528 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, 540 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
529 {0xaa, 0x23, 0x0001}, 541 {0xaa, 0x23, 0x0001},
530 {0xaa, 0x24, 0x005f}, 542 {0xaa, 0x24, 0x005f},
@@ -546,7 +558,7 @@ static const struct usb_action cs2102_50HZ[] = {
546 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, 558 {0xa0, 0xff, ZC3XX_R020_HSYNC_3},
547 {} 559 {}
548}; 560};
549static const struct usb_action cs2102_50HZScale[] = { 561static const struct usb_action cs2102_50HZ[] = {
550 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, 562 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
551 {0xaa, 0x23, 0x0000}, 563 {0xaa, 0x23, 0x0000},
552 {0xaa, 0x24, 0x00af}, 564 {0xaa, 0x24, 0x00af},
@@ -568,7 +580,7 @@ static const struct usb_action cs2102_50HZScale[] = {
568 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, 580 {0xa0, 0xff, ZC3XX_R020_HSYNC_3},
569 {} 581 {}
570}; 582};
571static const struct usb_action cs2102_60HZ[] = { 583static const struct usb_action cs2102_60HZScale[] = {
572 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, 584 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
573 {0xaa, 0x23, 0x0001}, 585 {0xaa, 0x23, 0x0001},
574 {0xaa, 0x24, 0x0055}, 586 {0xaa, 0x24, 0x0055},
@@ -590,7 +602,7 @@ static const struct usb_action cs2102_60HZ[] = {
590 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, 602 {0xa0, 0xff, ZC3XX_R020_HSYNC_3},
591 {} 603 {}
592}; 604};
593static const struct usb_action cs2102_60HZScale[] = { 605static const struct usb_action cs2102_60HZ[] = {
594 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, 606 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
595 {0xaa, 0x23, 0x0000}, 607 {0xaa, 0x23, 0x0000},
596 {0xaa, 0x24, 0x00aa}, 608 {0xaa, 0x24, 0x00aa},
@@ -612,7 +624,7 @@ static const struct usb_action cs2102_60HZScale[] = {
612 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, 624 {0xa0, 0xff, ZC3XX_R020_HSYNC_3},
613 {} 625 {}
614}; 626};
615static const struct usb_action cs2102_NoFliker[] = { 627static const struct usb_action cs2102_NoFlikerScale[] = {
616 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, 628 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
617 {0xaa, 0x23, 0x0001}, 629 {0xaa, 0x23, 0x0001},
618 {0xaa, 0x24, 0x005f}, 630 {0xaa, 0x24, 0x005f},
@@ -634,7 +646,7 @@ static const struct usb_action cs2102_NoFliker[] = {
634 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, 646 {0xa0, 0xff, ZC3XX_R020_HSYNC_3},
635 {} 647 {}
636}; 648};
637static const struct usb_action cs2102_NoFlikerScale[] = { 649static const struct usb_action cs2102_NoFliker[] = {
638 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, 650 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
639 {0xaa, 0x23, 0x0000}, 651 {0xaa, 0x23, 0x0000},
640 {0xaa, 0x24, 0x00af}, 652 {0xaa, 0x24, 0x00af},
@@ -658,7 +670,7 @@ static const struct usb_action cs2102_NoFlikerScale[] = {
658}; 670};
659 671
660/* CS2102_KOCOM */ 672/* CS2102_KOCOM */
661static const struct usb_action cs2102K_Initial[] = { 673static const struct usb_action cs2102K_InitialScale[] = {
662 {0xa0, 0x11, ZC3XX_R002_CLOCKSELECT}, 674 {0xa0, 0x11, ZC3XX_R002_CLOCKSELECT},
663 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, 675 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
664 {0xa0, 0x08, ZC3XX_R010_CMOSSENSORSELECT}, 676 {0xa0, 0x08, ZC3XX_R010_CMOSSENSORSELECT},
@@ -917,7 +929,7 @@ static const struct usb_action cs2102K_Initial[] = {
917 {} 929 {}
918}; 930};
919 931
920static const struct usb_action cs2102K_InitialScale[] = { 932static const struct usb_action cs2102K_Initial[] = {
921 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 933 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
922 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, 934 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
923 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, 935 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
@@ -1495,7 +1507,7 @@ static const struct usb_action gc0305_NoFliker[] = {
1495 {} 1507 {}
1496}; 1508};
1497 1509
1498static const struct usb_action hdcs2020xb_Initial[] = { 1510static const struct usb_action hdcs2020b_InitialScale[] = {
1499 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 1511 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
1500 {0xa0, 0x11, ZC3XX_R002_CLOCKSELECT}, 1512 {0xa0, 0x11, ZC3XX_R002_CLOCKSELECT},
1501 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, /* qtable 0x05 */ 1513 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, /* qtable 0x05 */
@@ -1627,7 +1639,7 @@ static const struct usb_action hdcs2020xb_Initial[] = {
1627 {0xa0, 0x40, ZC3XX_R118_BGAIN}, 1639 {0xa0, 0x40, ZC3XX_R118_BGAIN},
1628 {} 1640 {}
1629}; 1641};
1630static const struct usb_action hdcs2020xb_InitialScale[] = { 1642static const struct usb_action hdcs2020b_Initial[] = {
1631 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 1643 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
1632 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, 1644 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
1633 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, 1645 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
@@ -1819,7 +1831,7 @@ static const struct usb_action hdcs2020b_NoFliker[] = {
1819 {} 1831 {}
1820}; 1832};
1821 1833
1822static const struct usb_action hv7131bxx_Initial[] = { /* 320x240 */ 1834static const struct usb_action hv7131b_InitialScale[] = { /* 320x240 */
1823 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 1835 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
1824 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, 1836 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT},
1825 {0xa0, 0x00, ZC3XX_R010_CMOSSENSORSELECT}, 1837 {0xa0, 0x00, ZC3XX_R010_CMOSSENSORSELECT},
@@ -1866,7 +1878,7 @@ static const struct usb_action hv7131bxx_Initial[] = { /* 320x240 */
1866 {} 1878 {}
1867}; 1879};
1868 1880
1869static const struct usb_action hv7131bxx_InitialScale[] = { /* 640x480*/ 1881static const struct usb_action hv7131b_Initial[] = { /* 640x480*/
1870 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 1882 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
1871 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, 1883 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
1872 {0xa0, 0x00, ZC3XX_R010_CMOSSENSORSELECT}, 1884 {0xa0, 0x00, ZC3XX_R010_CMOSSENSORSELECT},
@@ -2063,7 +2075,7 @@ static const struct usb_action hv7131b_NoFlikerScale[] = { /* 320x240 */
2063 {} 2075 {}
2064}; 2076};
2065 2077
2066static const struct usb_action hv7131cxx_Initial[] = { 2078static const struct usb_action hv7131r_InitialScale[] = {
2067 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 2079 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
2068 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, 2080 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT},
2069 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, 2081 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT},
@@ -2157,7 +2169,7 @@ static const struct usb_action hv7131cxx_Initial[] = {
2157 {} 2169 {}
2158}; 2170};
2159 2171
2160static const struct usb_action hv7131cxx_InitialScale[] = { 2172static const struct usb_action hv7131r_Initial[] = {
2161 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 2173 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
2162 2174
2163 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, /* diff */ 2175 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, /* diff */
@@ -2259,7 +2271,7 @@ static const struct usb_action hv7131cxx_InitialScale[] = {
2259 {} 2271 {}
2260}; 2272};
2261 2273
2262static const struct usb_action icm105axx_Initial[] = { 2274static const struct usb_action icm105a_InitialScale[] = {
2263 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 2275 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
2264 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, 2276 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT},
2265 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, 2277 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
@@ -2436,7 +2448,7 @@ static const struct usb_action icm105axx_Initial[] = {
2436 {} 2448 {}
2437}; 2449};
2438 2450
2439static const struct usb_action icm105axx_InitialScale[] = { 2451static const struct usb_action icm105a_Initial[] = {
2440 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 2452 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
2441 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, 2453 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
2442 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, 2454 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
@@ -2615,7 +2627,7 @@ static const struct usb_action icm105axx_InitialScale[] = {
2615 {0xa0, 0x40, ZC3XX_R118_BGAIN}, 2627 {0xa0, 0x40, ZC3XX_R118_BGAIN},
2616 {} 2628 {}
2617}; 2629};
2618static const struct usb_action icm105a_50HZ[] = { 2630static const struct usb_action icm105a_50HZScale[] = {
2619 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */ 2631 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
2620 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */ 2632 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
2621 {0xaa, 0x0c, 0x0020}, /* 00,0c,20,aa */ 2633 {0xaa, 0x0c, 0x0020}, /* 00,0c,20,aa */
@@ -2646,7 +2658,7 @@ static const struct usb_action icm105a_50HZ[] = {
2646 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */ 2658 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */
2647 {} 2659 {}
2648}; 2660};
2649static const struct usb_action icm105a_50HZScale[] = { 2661static const struct usb_action icm105a_50HZ[] = {
2650 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */ 2662 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
2651 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */ 2663 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
2652 {0xaa, 0x0c, 0x008c}, /* 00,0c,8c,aa */ 2664 {0xaa, 0x0c, 0x008c}, /* 00,0c,8c,aa */
@@ -2679,7 +2691,7 @@ static const struct usb_action icm105a_50HZScale[] = {
2679 {0xa0, 0xc0, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,c0,cc */ 2691 {0xa0, 0xc0, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,c0,cc */
2680 {} 2692 {}
2681}; 2693};
2682static const struct usb_action icm105a_60HZ[] = { 2694static const struct usb_action icm105a_60HZScale[] = {
2683 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */ 2695 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
2684 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */ 2696 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
2685 {0xaa, 0x0c, 0x0004}, /* 00,0c,04,aa */ 2697 {0xaa, 0x0c, 0x0004}, /* 00,0c,04,aa */
@@ -2710,7 +2722,7 @@ static const struct usb_action icm105a_60HZ[] = {
2710 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */ 2722 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */
2711 {} 2723 {}
2712}; 2724};
2713static const struct usb_action icm105a_60HZScale[] = { 2725static const struct usb_action icm105a_60HZ[] = {
2714 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */ 2726 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
2715 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */ 2727 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
2716 {0xaa, 0x0c, 0x0008}, /* 00,0c,08,aa */ 2728 {0xaa, 0x0c, 0x0008}, /* 00,0c,08,aa */
@@ -2743,7 +2755,7 @@ static const struct usb_action icm105a_60HZScale[] = {
2743 {0xa0, 0xc0, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,c0,cc */ 2755 {0xa0, 0xc0, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,c0,cc */
2744 {} 2756 {}
2745}; 2757};
2746static const struct usb_action icm105a_NoFliker[] = { 2758static const struct usb_action icm105a_NoFlikerScale[] = {
2747 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */ 2759 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
2748 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */ 2760 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
2749 {0xaa, 0x0c, 0x0004}, /* 00,0c,04,aa */ 2761 {0xaa, 0x0c, 0x0004}, /* 00,0c,04,aa */
@@ -2774,7 +2786,7 @@ static const struct usb_action icm105a_NoFliker[] = {
2774 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */ 2786 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */
2775 {} 2787 {}
2776}; 2788};
2777static const struct usb_action icm105a_NoFlikerScale[] = { 2789static const struct usb_action icm105a_NoFliker[] = {
2778 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */ 2790 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
2779 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */ 2791 {0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
2780 {0xaa, 0x0c, 0x0004}, /* 00,0c,04,aa */ 2792 {0xaa, 0x0c, 0x0004}, /* 00,0c,04,aa */
@@ -2808,7 +2820,7 @@ static const struct usb_action icm105a_NoFlikerScale[] = {
2808 {} 2820 {}
2809}; 2821};
2810 2822
2811static const struct usb_action MC501CB_InitialScale[] = { 2823static const struct usb_action mc501cb_Initial[] = {
2812 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */ 2824 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */
2813 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, /* 00,02,00,cc */ 2825 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, /* 00,02,00,cc */
2814 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc */ 2826 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc */
@@ -2928,7 +2940,7 @@ static const struct usb_action MC501CB_InitialScale[] = {
2928 {} 2940 {}
2929}; 2941};
2930 2942
2931static const struct usb_action MC501CB_Initial[] = { /* 320x240 */ 2943static const struct usb_action mc501cb_InitialScale[] = { /* 320x240 */
2932 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */ 2944 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */
2933 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, /* 00,02,10,cc */ 2945 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, /* 00,02,10,cc */
2934 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc */ 2946 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc */
@@ -3047,7 +3059,7 @@ static const struct usb_action MC501CB_Initial[] = { /* 320x240 */
3047 {} 3059 {}
3048}; 3060};
3049 3061
3050static const struct usb_action MC501CB_50HZ[] = { 3062static const struct usb_action mc501cb_50HZScale[] = {
3051 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */ 3063 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */
3052 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */ 3064 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */
3053 {0xaa, 0x36, 0x001d}, /* 00,36,1D,aa */ 3065 {0xaa, 0x36, 0x001d}, /* 00,36,1D,aa */
@@ -3064,7 +3076,7 @@ static const struct usb_action MC501CB_50HZ[] = {
3064 {} 3076 {}
3065}; 3077};
3066 3078
3067static const struct usb_action MC501CB_50HZScale[] = { 3079static const struct usb_action mc501cb_50HZ[] = {
3068 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */ 3080 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */
3069 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */ 3081 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */
3070 {0xaa, 0x36, 0x003a}, /* 00,36,3A,aa */ 3082 {0xaa, 0x36, 0x003a}, /* 00,36,3A,aa */
@@ -3081,7 +3093,7 @@ static const struct usb_action MC501CB_50HZScale[] = {
3081 {} 3093 {}
3082}; 3094};
3083 3095
3084static const struct usb_action MC501CB_60HZ[] = { 3096static const struct usb_action mc501cb_60HZScale[] = {
3085 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */ 3097 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */
3086 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */ 3098 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */
3087 {0xaa, 0x36, 0x0018}, /* 00,36,18,aa */ 3099 {0xaa, 0x36, 0x0018}, /* 00,36,18,aa */
@@ -3098,7 +3110,7 @@ static const struct usb_action MC501CB_60HZ[] = {
3098 {} 3110 {}
3099}; 3111};
3100 3112
3101static const struct usb_action MC501CB_60HZScale[] = { 3113static const struct usb_action mc501cb_60HZ[] = {
3102 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */ 3114 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */
3103 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */ 3115 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */
3104 {0xaa, 0x36, 0x0030}, /* 00,36,30,aa */ 3116 {0xaa, 0x36, 0x0030}, /* 00,36,30,aa */
@@ -3115,7 +3127,7 @@ static const struct usb_action MC501CB_60HZScale[] = {
3115 {} 3127 {}
3116}; 3128};
3117 3129
3118static const struct usb_action MC501CB_NoFliker[] = { 3130static const struct usb_action mc501cb_NoFlikerScale[] = {
3119 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */ 3131 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */
3120 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */ 3132 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */
3121 {0xaa, 0x36, 0x0018}, /* 00,36,18,aa */ 3133 {0xaa, 0x36, 0x0018}, /* 00,36,18,aa */
@@ -3132,7 +3144,7 @@ static const struct usb_action MC501CB_NoFliker[] = {
3132 {} 3144 {}
3133}; 3145};
3134 3146
3135static const struct usb_action MC501CB_NoFlikerScale[] = { 3147static const struct usb_action mc501cb_NoFliker[] = {
3136 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */ 3148 {0xaa, 0x03, 0x0003}, /* 00,03,03,aa */
3137 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */ 3149 {0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */
3138 {0xaa, 0x36, 0x0030}, /* 00,36,30,aa */ 3150 {0xaa, 0x36, 0x0030}, /* 00,36,30,aa */
@@ -3144,8 +3156,8 @@ static const struct usb_action MC501CB_NoFlikerScale[] = {
3144 {} 3156 {}
3145}; 3157};
3146 3158
3147/* from zs211.inf - HKR,%OV7620%,Initial - 640x480 */ 3159/* from zs211.inf */
3148static const struct usb_action OV7620_mode0[] = { 3160static const struct usb_action ov7620_Initial[] = { /* 640x480 */
3149 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */ 3161 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */
3150 {0xa0, 0x40, ZC3XX_R002_CLOCKSELECT}, /* 00,02,40,cc */ 3162 {0xa0, 0x40, ZC3XX_R002_CLOCKSELECT}, /* 00,02,40,cc */
3151 {0xa0, 0x00, ZC3XX_R008_CLOCKSETTING}, /* 00,08,00,cc */ 3163 {0xa0, 0x00, ZC3XX_R008_CLOCKSETTING}, /* 00,08,00,cc */
@@ -3214,9 +3226,7 @@ static const struct usb_action OV7620_mode0[] = {
3214 {0xa0, 0x50, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,50,cc */ 3226 {0xa0, 0x50, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,50,cc */
3215 {} 3227 {}
3216}; 3228};
3217 3229static const struct usb_action ov7620_InitialScale[] = { /* 320x240 */
3218/* from zs211.inf - HKR,%OV7620%,InitialScale - 320x240 */
3219static const struct usb_action OV7620_mode1[] = {
3220 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */ 3230 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */
3221 {0xa0, 0x50, ZC3XX_R002_CLOCKSELECT}, /* 00,02,50,cc */ 3231 {0xa0, 0x50, ZC3XX_R002_CLOCKSELECT}, /* 00,02,50,cc */
3222 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, /* 00,08,00,cc */ 3232 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, /* 00,08,00,cc */
@@ -3287,9 +3297,7 @@ static const struct usb_action OV7620_mode1[] = {
3287 {0xa0, 0x50, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,50,cc */ 3297 {0xa0, 0x50, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,50,cc */
3288 {} 3298 {}
3289}; 3299};
3290 3300static const struct usb_action ov7620_50HZ[] = {
3291/* from zs211.inf - HKR,%OV7620%\AE,50HZ */
3292static const struct usb_action OV7620_50HZ[] = {
3293 {0xaa, 0x13, 0x00a3}, /* 00,13,a3,aa */ 3301 {0xaa, 0x13, 0x00a3}, /* 00,13,a3,aa */
3294 {0xdd, 0x00, 0x0100}, /* 00,01,00,dd */ 3302 {0xdd, 0x00, 0x0100}, /* 00,01,00,dd */
3295 {0xaa, 0x2b, 0x0096}, /* 00,2b,96,aa */ 3303 {0xaa, 0x2b, 0x0096}, /* 00,2b,96,aa */
@@ -3307,9 +3315,7 @@ static const struct usb_action OV7620_50HZ[] = {
3307 if mode0 (640x480) */ 3315 if mode0 (640x480) */
3308 {} 3316 {}
3309}; 3317};
3310 3318static const struct usb_action ov7620_60HZ[] = {
3311/* from zs211.inf - HKR,%OV7620%\AE,60HZ */
3312static const struct usb_action OV7620_60HZ[] = {
3313 {0xaa, 0x13, 0x00a3}, /* 00,13,a3,aa */ 3319 {0xaa, 0x13, 0x00a3}, /* 00,13,a3,aa */
3314 /* (bug in zs211.inf) */ 3320 /* (bug in zs211.inf) */
3315 {0xdd, 0x00, 0x0100}, /* 00,01,00,dd */ 3321 {0xdd, 0x00, 0x0100}, /* 00,01,00,dd */
@@ -3331,9 +3337,7 @@ static const struct usb_action OV7620_60HZ[] = {
3331 {0xa1, 0x01, 0x0037}, */ 3337 {0xa1, 0x01, 0x0037}, */
3332 {} 3338 {}
3333}; 3339};
3334 3340static const struct usb_action ov7620_NoFliker[] = {
3335/* from zs211.inf - HKR,%OV7620%\AE,NoFliker */
3336static const struct usb_action OV7620_NoFliker[] = {
3337 {0xaa, 0x13, 0x00a3}, /* 00,13,a3,aa */ 3341 {0xaa, 0x13, 0x00a3}, /* 00,13,a3,aa */
3338 /* (bug in zs211.inf) */ 3342 /* (bug in zs211.inf) */
3339 {0xdd, 0x00, 0x0100}, /* 00,01,00,dd */ 3343 {0xdd, 0x00, 0x0100}, /* 00,01,00,dd */
@@ -3354,7 +3358,7 @@ static const struct usb_action OV7620_NoFliker[] = {
3354 {} 3358 {}
3355}; 3359};
3356 3360
3357static const struct usb_action ov7630c_Initial[] = { 3361static const struct usb_action ov7630c_InitialScale[] = {
3358 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 3362 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
3359 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, 3363 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT},
3360 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 3364 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
@@ -3511,7 +3515,7 @@ static const struct usb_action ov7630c_Initial[] = {
3511 {} 3515 {}
3512}; 3516};
3513 3517
3514static const struct usb_action ov7630c_InitialScale[] = { 3518static const struct usb_action ov7630c_Initial[] = {
3515 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 3519 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
3516 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, 3520 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
3517 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, 3521 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
@@ -3682,7 +3686,7 @@ static const struct usb_action pas106b_Initial_com[] = {
3682 {} 3686 {}
3683}; 3687};
3684 3688
3685static const struct usb_action pas106b_Initial[] = { /* 176x144 */ 3689static const struct usb_action pas106b_InitialScale[] = { /* 176x144 */
3686/* JPEG control */ 3690/* JPEG control */
3687 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, 3691 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
3688/* Sream and Sensor specific */ 3692/* Sream and Sensor specific */
@@ -3800,7 +3804,7 @@ static const struct usb_action pas106b_Initial[] = { /* 176x144 */
3800 {} 3804 {}
3801}; 3805};
3802 3806
3803static const struct usb_action pas106b_InitialScale[] = { /* 352x288 */ 3807static const struct usb_action pas106b_Initial[] = { /* 352x288 */
3804/* JPEG control */ 3808/* JPEG control */
3805 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING}, 3809 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
3806/* Sream and Sensor specific */ 3810/* Sream and Sensor specific */
@@ -3972,10 +3976,10 @@ static const struct usb_action pas106b_NoFliker[] = {
3972 {} 3976 {}
3973}; 3977};
3974 3978
3975/* from usbvm31b.inf */ 3979/* from lvWIMv.inf 046d:08a2/:08aa 2007/06/03 */
3976static const struct usb_action pas202b_Initial[] = { /* 640x480 */ 3980static const struct usb_action pas202b_Initial[] = { /* 640x480 */
3977 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */ 3981 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */
3978 {0xa0, 0x00, ZC3XX_R008_CLOCKSETTING}, /* 00,08,00,cc */ 3982 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
3979 {0xa0, 0x0e, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,0e,cc */ 3983 {0xa0, 0x0e, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,0e,cc */
3980 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, /* 00,02,00,cc */ 3984 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, /* 00,02,00,cc */
3981 {0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH}, /* 00,03,02,cc */ 3985 {0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH}, /* 00,03,02,cc */
@@ -4000,7 +4004,7 @@ static const struct usb_action pas202b_Initial[] = { /* 640x480 */
4000 {0xaa, 0x09, 0x0006}, /* 00,09,06,aa */ 4004 {0xaa, 0x09, 0x0006}, /* 00,09,06,aa */
4001 {0xaa, 0x0a, 0x0001}, /* 00,0a,01,aa */ 4005 {0xaa, 0x0a, 0x0001}, /* 00,0a,01,aa */
4002 {0xaa, 0x0b, 0x0001}, /* 00,0b,01,aa */ 4006 {0xaa, 0x0b, 0x0001}, /* 00,0b,01,aa */
4003 {0xaa, 0x0c, 0x0008}, /* 00,0c,08,aa */ 4007 {0xaa, 0x0c, 0x0006},
4004 {0xaa, 0x0d, 0x0000}, /* 00,0d,00,aa */ 4008 {0xaa, 0x0d, 0x0000}, /* 00,0d,00,aa */
4005 {0xaa, 0x10, 0x0000}, /* 00,10,00,aa */ 4009 {0xaa, 0x10, 0x0000}, /* 00,10,00,aa */
4006 {0xaa, 0x12, 0x0005}, /* 00,12,05,aa */ 4010 {0xaa, 0x12, 0x0005}, /* 00,12,05,aa */
@@ -4019,13 +4023,13 @@ static const struct usb_action pas202b_Initial[] = { /* 640x480 */
4019}; 4023};
4020static const struct usb_action pas202b_InitialScale[] = { /* 320x240 */ 4024static const struct usb_action pas202b_InitialScale[] = { /* 320x240 */
4021 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */ 4025 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */
4022 {0xa0, 0x00, ZC3XX_R008_CLOCKSETTING}, /* 00,08,00,cc */ 4026 {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
4023 {0xa0, 0x0e, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,0e,cc */ 4027 {0xa0, 0x0e, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,0e,cc */
4024 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, /* 00,02,10,cc */ 4028 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, /* 00,02,10,cc */
4025 {0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH}, /* 00,03,02,cc */ 4029 {0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH}, /* 00,03,02,cc */
4026 {0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW}, /* 00,04,80,cc */ 4030 {0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW}, /* 00,04,80,cc */
4027 {0xa0, 0x01, ZC3XX_R005_FRAMEHEIGHTHIGH}, /* 00,05,01,cc */ 4031 {0xa0, 0x01, ZC3XX_R005_FRAMEHEIGHTHIGH}, /* 00,05,01,cc */
4028 {0xa0, 0xd0, ZC3XX_R006_FRAMEHEIGHTLOW}, /* 00,06,d0,cc */ 4032 {0xa0, 0xe0, ZC3XX_R006_FRAMEHEIGHTLOW},
4029 {0xa0, 0x01, ZC3XX_R001_SYSTEMOPERATING}, /* 00,01,01,cc */ 4033 {0xa0, 0x01, ZC3XX_R001_SYSTEMOPERATING}, /* 00,01,01,cc */
4030 {0xa0, 0x03, ZC3XX_R012_VIDEOCONTROLFUNC}, /* 00,12,03,cc */ 4034 {0xa0, 0x03, ZC3XX_R012_VIDEOCONTROLFUNC}, /* 00,12,03,cc */
4031 {0xa0, 0x01, ZC3XX_R012_VIDEOCONTROLFUNC}, /* 00,12,01,cc */ 4035 {0xa0, 0x01, ZC3XX_R012_VIDEOCONTROLFUNC}, /* 00,12,01,cc */
@@ -4035,7 +4039,7 @@ static const struct usb_action pas202b_InitialScale[] = { /* 320x240 */
4035 {0xa0, 0x08, ZC3XX_R11A_FIRSTYLOW}, /* 01,1a,08,cc */ 4039 {0xa0, 0x08, ZC3XX_R11A_FIRSTYLOW}, /* 01,1a,08,cc */
4036 {0xa0, 0x02, ZC3XX_R11C_FIRSTXLOW}, /* 01,1c,02,cc */ 4040 {0xa0, 0x02, ZC3XX_R11C_FIRSTXLOW}, /* 01,1c,02,cc */
4037 {0xa0, 0x01, ZC3XX_R09B_WINHEIGHTHIGH}, /* 00,9b,01,cc */ 4041 {0xa0, 0x01, ZC3XX_R09B_WINHEIGHTHIGH}, /* 00,9b,01,cc */
4038 {0xa0, 0xd8, ZC3XX_R09C_WINHEIGHTLOW}, /* 00,9c,d8,cc */ 4042 {0xa0, 0xe8, ZC3XX_R09C_WINHEIGHTLOW},
4039 {0xa0, 0x02, ZC3XX_R09D_WINWIDTHHIGH}, /* 00,9d,02,cc */ 4043 {0xa0, 0x02, ZC3XX_R09D_WINWIDTHHIGH}, /* 00,9d,02,cc */
4040 {0xa0, 0x88, ZC3XX_R09E_WINWIDTHLOW}, /* 00,9e,88,cc */ 4044 {0xa0, 0x88, ZC3XX_R09E_WINWIDTHLOW}, /* 00,9e,88,cc */
4041 {0xaa, 0x02, 0x0002}, /* 00,02,02,aa */ 4045 {0xaa, 0x02, 0x0002}, /* 00,02,02,aa */
@@ -4044,7 +4048,7 @@ static const struct usb_action pas202b_InitialScale[] = { /* 320x240 */
4044 {0xaa, 0x09, 0x0006}, /* 00,09,06,aa */ 4048 {0xaa, 0x09, 0x0006}, /* 00,09,06,aa */
4045 {0xaa, 0x0a, 0x0001}, /* 00,0a,01,aa */ 4049 {0xaa, 0x0a, 0x0001}, /* 00,0a,01,aa */
4046 {0xaa, 0x0b, 0x0001}, /* 00,0b,01,aa */ 4050 {0xaa, 0x0b, 0x0001}, /* 00,0b,01,aa */
4047 {0xaa, 0x0c, 0x0008}, /* 00,0c,08,aa */ 4051 {0xaa, 0x0c, 0x0006},
4048 {0xaa, 0x0d, 0x0000}, /* 00,0d,00,aa */ 4052 {0xaa, 0x0d, 0x0000}, /* 00,0d,00,aa */
4049 {0xaa, 0x10, 0x0000}, /* 00,10,00,aa */ 4053 {0xaa, 0x10, 0x0000}, /* 00,10,00,aa */
4050 {0xaa, 0x12, 0x0005}, /* 00,12,05,aa */ 4054 {0xaa, 0x12, 0x0005}, /* 00,12,05,aa */
@@ -4059,6 +4063,8 @@ static const struct usb_action pas202b_InitialScale[] = { /* 320x240 */
4059 {0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE}, /* 02,50,08,cc */ 4063 {0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE}, /* 02,50,08,cc */
4060 {0xa0, 0x08, ZC3XX_R301_EEPROMACCESS}, /* 03,01,08,cc */ 4064 {0xa0, 0x08, ZC3XX_R301_EEPROMACCESS}, /* 03,01,08,cc */
4061 {0xa0, 0x70, ZC3XX_R18D_YTARGET}, /* 01,8d,70,cc */ 4065 {0xa0, 0x70, ZC3XX_R18D_YTARGET}, /* 01,8d,70,cc */
4066 {0xa0, 0xff, ZC3XX_R097_WINYSTARTHIGH},
4067 {0xa0, 0xfe, ZC3XX_R098_WINYSTARTLOW},
4062 {} 4068 {}
4063}; 4069};
4064static const struct usb_action pas202b_50HZ[] = { 4070static const struct usb_action pas202b_50HZ[] = {
@@ -4066,22 +4072,22 @@ static const struct usb_action pas202b_50HZ[] = {
4066 {0xa0, 0x20, ZC3XX_R087_EXPTIMEMID}, /* 00,87,20,cc */ 4072 {0xa0, 0x20, ZC3XX_R087_EXPTIMEMID}, /* 00,87,20,cc */
4067 {0xa0, 0x21, ZC3XX_R088_EXPTIMELOW}, /* 00,88,21,cc */ 4073 {0xa0, 0x21, ZC3XX_R088_EXPTIMELOW}, /* 00,88,21,cc */
4068 {0xaa, 0x20, 0x0002}, /* 00,20,02,aa */ 4074 {0xaa, 0x20, 0x0002}, /* 00,20,02,aa */
4069 {0xaa, 0x21, 0x0068}, /* 00,21,68,aa */ 4075 {0xaa, 0x21, 0x001b},
4070 {0xaa, 0x03, 0x0044}, /* 00,03,44,aa */ 4076 {0xaa, 0x03, 0x0044}, /* 00,03,44,aa */
4071 {0xaa, 0x04, 0x0009}, /* 00,04,09,aa */ 4077 {0xaa, 0x04, 0x0008},
4072 {0xaa, 0x05, 0x0028}, /* 00,05,28,aa */ 4078 {0xaa, 0x05, 0x001b},
4073 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */ 4079 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */
4074 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */ 4080 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */
4075 {0xa0, 0x14, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,14,cc */ 4081 {0xa0, 0x1c, ZC3XX_R1A9_DIGITALLIMITDIFF},
4076 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc */ 4082 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc */
4077 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */ 4083 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
4078 {0xa0, 0x07, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,07,cc */ 4084 {0xa0, 0x02, ZC3XX_R191_EXPOSURELIMITMID},
4079 {0xa0, 0xd2, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,d2,cc */ 4085 {0xa0, 0x1b, ZC3XX_R192_EXPOSURELIMITLOW},
4080 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */ 4086 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
4081 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */ 4087 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
4082 {0xa0, 0x4d, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,4d,cc */ 4088 {0xa0, 0x4d, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,4d,cc */
4083 {0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */ 4089 {0xa0, 0x0e, ZC3XX_R18C_AEFREEZE},
4084 {0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */ 4090 {0xa0, 0x1b, ZC3XX_R18F_AEUNFREEZE},
4085 {0xa0, 0x44, ZC3XX_R01D_HSYNC_0}, /* 00,1d,44,cc */ 4091 {0xa0, 0x44, ZC3XX_R01D_HSYNC_0}, /* 00,1d,44,cc */
4086 {0xa0, 0x6f, ZC3XX_R01E_HSYNC_1}, /* 00,1e,6f,cc */ 4092 {0xa0, 0x6f, ZC3XX_R01E_HSYNC_1}, /* 00,1e,6f,cc */
4087 {0xa0, 0xad, ZC3XX_R01F_HSYNC_2}, /* 00,1f,ad,cc */ 4093 {0xa0, 0xad, ZC3XX_R01F_HSYNC_2}, /* 00,1f,ad,cc */
@@ -4094,23 +4100,23 @@ static const struct usb_action pas202b_50HZScale[] = {
4094 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */ 4100 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
4095 {0xa0, 0x20, ZC3XX_R087_EXPTIMEMID}, /* 00,87,20,cc */ 4101 {0xa0, 0x20, ZC3XX_R087_EXPTIMEMID}, /* 00,87,20,cc */
4096 {0xa0, 0x21, ZC3XX_R088_EXPTIMELOW}, /* 00,88,21,cc */ 4102 {0xa0, 0x21, ZC3XX_R088_EXPTIMELOW}, /* 00,88,21,cc */
4097 {0xaa, 0x20, 0x0002}, /* 00,20,02,aa */ 4103 {0xaa, 0x20, 0x0004},
4098 {0xaa, 0x21, 0x006c}, /* 00,21,6c,aa */ 4104 {0xaa, 0x21, 0x003d},
4099 {0xaa, 0x03, 0x0041}, /* 00,03,41,aa */ 4105 {0xaa, 0x03, 0x0041}, /* 00,03,41,aa */
4100 {0xaa, 0x04, 0x0009}, /* 00,04,09,aa */ 4106 {0xaa, 0x04, 0x0010},
4101 {0xaa, 0x05, 0x002c}, /* 00,05,2c,aa */ 4107 {0xaa, 0x05, 0x003d},
4102 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */ 4108 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */
4103 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */ 4109 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */
4104 {0xa0, 0x14, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,14,cc */ 4110 {0xa0, 0x1c, ZC3XX_R1A9_DIGITALLIMITDIFF},
4105 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc */ 4111 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc */
4106 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */ 4112 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
4107 {0xa0, 0x0f, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,0f,cc */ 4113 {0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID},
4108 {0xa0, 0xbe, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,be,cc */ 4114 {0xa0, 0x3d, ZC3XX_R192_EXPOSURELIMITLOW},
4109 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */ 4115 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
4110 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */ 4116 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
4111 {0xa0, 0x9b, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,9b,cc */ 4117 {0xa0, 0x9b, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,9b,cc */
4112 {0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */ 4118 {0xa0, 0x0e, ZC3XX_R18C_AEFREEZE},
4113 {0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */ 4119 {0xa0, 0x1b, ZC3XX_R18F_AEUNFREEZE},
4114 {0xa0, 0x41, ZC3XX_R01D_HSYNC_0}, /* 00,1d,41,cc */ 4120 {0xa0, 0x41, ZC3XX_R01D_HSYNC_0}, /* 00,1d,41,cc */
4115 {0xa0, 0x6f, ZC3XX_R01E_HSYNC_1}, /* 00,1e,6f,cc */ 4121 {0xa0, 0x6f, ZC3XX_R01E_HSYNC_1}, /* 00,1e,6f,cc */
4116 {0xa0, 0xad, ZC3XX_R01F_HSYNC_2}, /* 00,1f,ad,cc */ 4122 {0xa0, 0xad, ZC3XX_R01F_HSYNC_2}, /* 00,1f,ad,cc */
@@ -4130,16 +4136,16 @@ static const struct usb_action pas202b_60HZ[] = {
4130 {0xaa, 0x05, 0x0000}, /* 00,05,00,aa */ 4136 {0xaa, 0x05, 0x0000}, /* 00,05,00,aa */
4131 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */ 4137 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */
4132 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */ 4138 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */
4133 {0xa0, 0x14, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,14,cc */ 4139 {0xa0, 0x1c, ZC3XX_R1A9_DIGITALLIMITDIFF},
4134 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc */ 4140 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc */
4135 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */ 4141 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
4136 {0xa0, 0x07, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,07,cc */ 4142 {0xa0, 0x02, ZC3XX_R191_EXPOSURELIMITMID},
4137 {0xa0, 0xc0, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,c0,cc */ 4143 {0xa0, 0x00, ZC3XX_R192_EXPOSURELIMITLOW},
4138 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */ 4144 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
4139 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */ 4145 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
4140 {0xa0, 0x40, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,40,cc */ 4146 {0xa0, 0x40, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,40,cc */
4141 {0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */ 4147 {0xa0, 0x0e, ZC3XX_R18C_AEFREEZE},
4142 {0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */ 4148 {0xa0, 0x1b, ZC3XX_R18F_AEUNFREEZE},
4143 {0xa0, 0x45, ZC3XX_R01D_HSYNC_0}, /* 00,1d,45,cc */ 4149 {0xa0, 0x45, ZC3XX_R01D_HSYNC_0}, /* 00,1d,45,cc */
4144 {0xa0, 0x8e, ZC3XX_R01E_HSYNC_1}, /* 00,1e,8e,cc */ 4150 {0xa0, 0x8e, ZC3XX_R01E_HSYNC_1}, /* 00,1e,8e,cc */
4145 {0xa0, 0xc1, ZC3XX_R01F_HSYNC_2}, /* 00,1f,c1,cc */ 4151 {0xa0, 0xc1, ZC3XX_R01F_HSYNC_2}, /* 00,1f,c1,cc */
@@ -4152,23 +4158,23 @@ static const struct usb_action pas202b_60HZScale[] = {
4152 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */ 4158 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
4153 {0xa0, 0x20, ZC3XX_R087_EXPTIMEMID}, /* 00,87,20,cc */ 4159 {0xa0, 0x20, ZC3XX_R087_EXPTIMEMID}, /* 00,87,20,cc */
4154 {0xa0, 0x21, ZC3XX_R088_EXPTIMELOW}, /* 00,88,21,cc */ 4160 {0xa0, 0x21, ZC3XX_R088_EXPTIMELOW}, /* 00,88,21,cc */
4155 {0xaa, 0x20, 0x0002}, /* 00,20,02,aa */ 4161 {0xaa, 0x20, 0x0004},
4156 {0xaa, 0x21, 0x0004}, /* 00,21,04,aa */ 4162 {0xaa, 0x21, 0x0008},
4157 {0xaa, 0x03, 0x0042}, /* 00,03,42,aa */ 4163 {0xaa, 0x03, 0x0042}, /* 00,03,42,aa */
4158 {0xaa, 0x04, 0x0008}, /* 00,04,08,aa */ 4164 {0xaa, 0x04, 0x0010},
4159 {0xaa, 0x05, 0x0004}, /* 00,05,04,aa */ 4165 {0xaa, 0x05, 0x0008},
4160 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */ 4166 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */
4161 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */ 4167 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */
4162 {0xa0, 0x14, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,14,cc */ 4168 {0xa0, 0x1c, ZC3XX_R1A9_DIGITALLIMITDIFF},
4163 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc */ 4169 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc */
4164 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */ 4170 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
4165 {0xa0, 0x0f, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,0f,cc */ 4171 {0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID},
4166 {0xa0, 0x9f, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,9f,cc */ 4172 {0xa0, 0x08, ZC3XX_R192_EXPOSURELIMITLOW},
4167 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */ 4173 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
4168 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */ 4174 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
4169 {0xa0, 0x81, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,81,cc */ 4175 {0xa0, 0x81, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,81,cc */
4170 {0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */ 4176 {0xa0, 0x0e, ZC3XX_R18C_AEFREEZE},
4171 {0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */ 4177 {0xa0, 0x1b, ZC3XX_R18F_AEUNFREEZE},
4172 {0xa0, 0x42, ZC3XX_R01D_HSYNC_0}, /* 00,1d,42,cc */ 4178 {0xa0, 0x42, ZC3XX_R01D_HSYNC_0}, /* 00,1d,42,cc */
4173 {0xa0, 0x6f, ZC3XX_R01E_HSYNC_1}, /* 00,1e,6f,cc */ 4179 {0xa0, 0x6f, ZC3XX_R01E_HSYNC_1}, /* 00,1e,6f,cc */
4174 {0xa0, 0xaf, ZC3XX_R01F_HSYNC_2}, /* 00,1f,af,cc */ 4180 {0xa0, 0xaf, ZC3XX_R01F_HSYNC_2}, /* 00,1f,af,cc */
@@ -4182,22 +4188,22 @@ static const struct usb_action pas202b_NoFliker[] = {
4182 {0xa0, 0x20, ZC3XX_R087_EXPTIMEMID}, /* 00,87,20,cc */ 4188 {0xa0, 0x20, ZC3XX_R087_EXPTIMEMID}, /* 00,87,20,cc */
4183 {0xa0, 0x21, ZC3XX_R088_EXPTIMELOW}, /* 00,88,21,cc */ 4189 {0xa0, 0x21, ZC3XX_R088_EXPTIMELOW}, /* 00,88,21,cc */
4184 {0xaa, 0x20, 0x0002}, /* 00,20,02,aa */ 4190 {0xaa, 0x20, 0x0002}, /* 00,20,02,aa */
4185 {0xaa, 0x21, 0x0020}, /* 00,21,20,aa */ 4191 {0xaa, 0x21, 0x0006},
4186 {0xaa, 0x03, 0x0040}, /* 00,03,40,aa */ 4192 {0xaa, 0x03, 0x0040}, /* 00,03,40,aa */
4187 {0xaa, 0x04, 0x0008}, /* 00,04,08,aa */ 4193 {0xaa, 0x04, 0x0008}, /* 00,04,08,aa */
4188 {0xaa, 0x05, 0x0020}, /* 00,05,20,aa */ 4194 {0xaa, 0x05, 0x0006},
4189 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */ 4195 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */
4190 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */ 4196 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */
4191 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */ 4197 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
4192 {0xa0, 0x07, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,07,cc */ 4198 {0xa0, 0x02, ZC3XX_R191_EXPOSURELIMITMID},
4193 {0xa0, 0xf0, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,f0,cc */ 4199 {0xa0, 0x06, ZC3XX_R192_EXPOSURELIMITLOW},
4194 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */ 4200 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
4195 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */ 4201 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
4196 {0xa0, 0x02, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,02,cc */ 4202 {0xa0, 0x01, ZC3XX_R197_ANTIFLICKERLOW},
4197 {0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */ 4203 {0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */
4198 {0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */ 4204 {0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */
4199 {0xa0, 0x00, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,00,cc */ 4205 {0xa0, 0x00, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,00,cc */
4200 {0xa0, 0x00, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,00,cc */ 4206 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP},
4201 {0xa0, 0x40, ZC3XX_R01D_HSYNC_0}, /* 00,1d,40,cc */ 4207 {0xa0, 0x40, ZC3XX_R01D_HSYNC_0}, /* 00,1d,40,cc */
4202 {0xa0, 0x60, ZC3XX_R01E_HSYNC_1}, /* 00,1e,60,cc */ 4208 {0xa0, 0x60, ZC3XX_R01E_HSYNC_1}, /* 00,1e,60,cc */
4203 {0xa0, 0x90, ZC3XX_R01F_HSYNC_2}, /* 00,1f,90,cc */ 4209 {0xa0, 0x90, ZC3XX_R01F_HSYNC_2}, /* 00,1f,90,cc */
@@ -4210,23 +4216,23 @@ static const struct usb_action pas202b_NoFlikerScale[] = {
4210 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */ 4216 {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
4211 {0xa0, 0x20, ZC3XX_R087_EXPTIMEMID}, /* 00,87,20,cc */ 4217 {0xa0, 0x20, ZC3XX_R087_EXPTIMEMID}, /* 00,87,20,cc */
4212 {0xa0, 0x21, ZC3XX_R088_EXPTIMELOW}, /* 00,88,21,cc */ 4218 {0xa0, 0x21, ZC3XX_R088_EXPTIMELOW}, /* 00,88,21,cc */
4213 {0xaa, 0x20, 0x0002}, /* 00,20,02,aa */ 4219 {0xaa, 0x20, 0x0004},
4214 {0xaa, 0x21, 0x0010}, /* 00,21,10,aa */ 4220 {0xaa, 0x21, 0x000c},
4215 {0xaa, 0x03, 0x0040}, /* 00,03,40,aa */ 4221 {0xaa, 0x03, 0x0040}, /* 00,03,40,aa */
4216 {0xaa, 0x04, 0x0008}, /* 00,04,08,aa */ 4222 {0xaa, 0x04, 0x0010},
4217 {0xaa, 0x05, 0x0010}, /* 00,05,10,aa */ 4223 {0xaa, 0x05, 0x000c},
4218 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */ 4224 {0xaa, 0x0e, 0x0001}, /* 00,0e,01,aa */
4219 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */ 4225 {0xaa, 0x0f, 0x0000}, /* 00,0f,00,aa */
4220 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */ 4226 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
4221 {0xa0, 0x0f, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,0f,cc */ 4227 {0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID},
4222 {0xa0, 0xf0, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,f0,cc */ 4228 {0xa0, 0x0c, ZC3XX_R192_EXPOSURELIMITLOW},
4223 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */ 4229 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
4224 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */ 4230 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
4225 {0xa0, 0x02, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,02,cc */ 4231 {0xa0, 0x02, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,02,cc */
4226 {0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */ 4232 {0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */
4227 {0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */ 4233 {0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */
4228 {0xa0, 0x00, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,00,cc */ 4234 {0xa0, 0x00, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,00,cc */
4229 {0xa0, 0x00, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,00,cc */ 4235 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP},
4230 {0xa0, 0x40, ZC3XX_R01D_HSYNC_0}, /* 00,1d,40,cc */ 4236 {0xa0, 0x40, ZC3XX_R01D_HSYNC_0}, /* 00,1d,40,cc */
4231 {0xa0, 0x60, ZC3XX_R01E_HSYNC_1}, /* 00,1e,60,cc */ 4237 {0xa0, 0x60, ZC3XX_R01E_HSYNC_1}, /* 00,1e,60,cc */
4232 {0xa0, 0x90, ZC3XX_R01F_HSYNC_2}, /* 00,1f,90,cc */ 4238 {0xa0, 0x90, ZC3XX_R01F_HSYNC_2}, /* 00,1f,90,cc */
@@ -4713,8 +4719,8 @@ static const struct usb_action pb0330_NoFlikerScale[] = {
4713 {} 4719 {}
4714}; 4720};
4715 4721
4716/* from oem9.inf - HKR,%PO2030%,Initial - 640x480 - (close to CS2102) */ 4722/* from oem9.inf */
4717static const struct usb_action PO2030_mode0[] = { 4723static const struct usb_action po2030_Initial[] = { /* 640x480 */
4718 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */ 4724 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */
4719 {0xa0, 0x04, ZC3XX_R002_CLOCKSELECT}, /* 00,02,04,cc */ 4725 {0xa0, 0x04, ZC3XX_R002_CLOCKSELECT}, /* 00,02,04,cc */
4720 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc */ 4726 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc */
@@ -4790,8 +4796,8 @@ static const struct usb_action PO2030_mode0[] = {
4790 {} 4796 {}
4791}; 4797};
4792 4798
4793/* from oem9.inf - HKR,%PO2030%,InitialScale - 320x240 */ 4799/* from oem9.inf */
4794static const struct usb_action PO2030_mode1[] = { 4800static const struct usb_action po2030_InitialScale[] = { /* 320x240 */
4795 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */ 4801 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc */
4796 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, /* 00,02,10,cc */ 4802 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, /* 00,02,10,cc */
4797 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc */ 4803 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc */
@@ -4867,7 +4873,7 @@ static const struct usb_action PO2030_mode1[] = {
4867 {} 4873 {}
4868}; 4874};
4869 4875
4870static const struct usb_action PO2030_50HZ[] = { 4876static const struct usb_action po2030_50HZ[] = {
4871 {0xaa, 0x8d, 0x0008}, /* 00,8d,08,aa */ 4877 {0xaa, 0x8d, 0x0008}, /* 00,8d,08,aa */
4872 {0xaa, 0x1a, 0x0001}, /* 00,1a,01,aa */ 4878 {0xaa, 0x1a, 0x0001}, /* 00,1a,01,aa */
4873 {0xaa, 0x1b, 0x000a}, /* 00,1b,0a,aa */ 4879 {0xaa, 0x1b, 0x000a}, /* 00,1b,0a,aa */
@@ -4889,7 +4895,7 @@ static const struct usb_action PO2030_50HZ[] = {
4889 {} 4895 {}
4890}; 4896};
4891 4897
4892static const struct usb_action PO2030_60HZ[] = { 4898static const struct usb_action po2030_60HZ[] = {
4893 {0xaa, 0x8d, 0x0008}, /* 00,8d,08,aa */ 4899 {0xaa, 0x8d, 0x0008}, /* 00,8d,08,aa */
4894 {0xaa, 0x1a, 0x0000}, /* 00,1a,00,aa */ 4900 {0xaa, 0x1a, 0x0000}, /* 00,1a,00,aa */
4895 {0xaa, 0x1b, 0x00de}, /* 00,1b,de,aa */ 4901 {0xaa, 0x1b, 0x00de}, /* 00,1b,de,aa */
@@ -4912,7 +4918,7 @@ static const struct usb_action PO2030_60HZ[] = {
4912 {} 4918 {}
4913}; 4919};
4914 4920
4915static const struct usb_action PO2030_NoFliker[] = { 4921static const struct usb_action po2030_NoFliker[] = {
4916 {0xa0, 0x02, ZC3XX_R180_AUTOCORRECTENABLE}, /* 01,80,02,cc */ 4922 {0xa0, 0x02, ZC3XX_R180_AUTOCORRECTENABLE}, /* 01,80,02,cc */
4917 {0xaa, 0x8d, 0x000d}, /* 00,8d,0d,aa */ 4923 {0xaa, 0x8d, 0x000d}, /* 00,8d,0d,aa */
4918 {0xaa, 0x1a, 0x0000}, /* 00,1a,00,aa */ 4924 {0xaa, 0x1a, 0x0000}, /* 00,1a,00,aa */
@@ -4924,7 +4930,7 @@ static const struct usb_action PO2030_NoFliker[] = {
4924}; 4930};
4925 4931
4926/* TEST */ 4932/* TEST */
4927static const struct usb_action tas5130CK_Initial[] = { 4933static const struct usb_action tas5130cK_InitialScale[] = {
4928 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 4934 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
4929 {0xa0, 0x01, 0x003b}, 4935 {0xa0, 0x01, 0x003b},
4930 {0xa0, 0x0e, 0x003a}, 4936 {0xa0, 0x0e, 0x003a},
@@ -5127,7 +5133,7 @@ static const struct usb_action tas5130CK_Initial[] = {
5127 {} 5133 {}
5128}; 5134};
5129 5135
5130static const struct usb_action tas5130CK_InitialScale[] = { 5136static const struct usb_action tas5130cK_Initial[] = {
5131 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, 5137 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
5132 {0xa0, 0x01, 0x003b}, 5138 {0xa0, 0x01, 0x003b},
5133 {0xa0, 0x0e, 0x003a}, 5139 {0xa0, 0x0e, 0x003a},
@@ -5560,7 +5566,7 @@ static const struct usb_action tas5130cxx_NoFlikerScale[] = {
5560 {} 5566 {}
5561}; 5567};
5562 5568
5563static const struct usb_action tas5130c_vf0250_Initial[] = { 5569static const struct usb_action tas5130c_vf0250_InitialScale[] = {
5564 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc, */ 5570 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc, */
5565 {0xa0, 0x02, ZC3XX_R008_CLOCKSETTING}, /* 00,08,02,cc, */ 5571 {0xa0, 0x02, ZC3XX_R008_CLOCKSETTING}, /* 00,08,02,cc, */
5566 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc, */ 5572 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc, */
@@ -5627,7 +5633,7 @@ static const struct usb_action tas5130c_vf0250_Initial[] = {
5627 {} 5633 {}
5628}; 5634};
5629 5635
5630static const struct usb_action tas5130c_vf0250_InitialScale[] = { 5636static const struct usb_action tas5130c_vf0250_Initial[] = {
5631 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc, */ 5637 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc, */
5632 {0xa0, 0x02, ZC3XX_R008_CLOCKSETTING}, /* 00,08,02,cc, */ 5638 {0xa0, 0x02, ZC3XX_R008_CLOCKSETTING}, /* 00,08,02,cc, */
5633 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc, */ 5639 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc, */
@@ -5692,8 +5698,7 @@ static const struct usb_action tas5130c_vf0250_InitialScale[] = {
5692 {0xa0, 0x65, ZC3XX_R118_BGAIN}, /* 01,18,65,cc */ 5698 {0xa0, 0x65, ZC3XX_R118_BGAIN}, /* 01,18,65,cc */
5693 {} 5699 {}
5694}; 5700};
5695/* "50HZ" light frequency banding filter */ 5701static const struct usb_action tas5130c_vf0250_50HZScale[] = {
5696static const struct usb_action tas5130c_vf0250_50HZ[] = {
5697 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5702 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5698 {0xaa, 0x83, 0x0001}, /* 00,83,01,aa */ 5703 {0xaa, 0x83, 0x0001}, /* 00,83,01,aa */
5699 {0xaa, 0x84, 0x00aa}, /* 00,84,aa,aa */ 5704 {0xaa, 0x84, 0x00aa}, /* 00,84,aa,aa */
@@ -5717,8 +5722,7 @@ static const struct usb_action tas5130c_vf0250_50HZ[] = {
5717 {} 5722 {}
5718}; 5723};
5719 5724
5720/* "50HZScale" light frequency banding filter */ 5725static const struct usb_action tas5130c_vf0250_50HZ[] = {
5721static const struct usb_action tas5130c_vf0250_50HZScale[] = {
5722 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5726 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5723 {0xaa, 0x83, 0x0003}, /* 00,83,03,aa */ 5727 {0xaa, 0x83, 0x0003}, /* 00,83,03,aa */
5724 {0xaa, 0x84, 0x0054}, /* 00,84,54,aa */ 5728 {0xaa, 0x84, 0x0054}, /* 00,84,54,aa */
@@ -5742,8 +5746,7 @@ static const struct usb_action tas5130c_vf0250_50HZScale[] = {
5742 {} 5746 {}
5743}; 5747};
5744 5748
5745/* "60HZ" light frequency banding filter */ 5749static const struct usb_action tas5130c_vf0250_60HZScale[] = {
5746static const struct usb_action tas5130c_vf0250_60HZ[] = {
5747 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5750 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5748 {0xaa, 0x83, 0x0001}, /* 00,83,01,aa */ 5751 {0xaa, 0x83, 0x0001}, /* 00,83,01,aa */
5749 {0xaa, 0x84, 0x0062}, /* 00,84,62,aa */ 5752 {0xaa, 0x84, 0x0062}, /* 00,84,62,aa */
@@ -5767,8 +5770,7 @@ static const struct usb_action tas5130c_vf0250_60HZ[] = {
5767 {} 5770 {}
5768}; 5771};
5769 5772
5770/* "60HZScale" light frequency banding ilter */ 5773static const struct usb_action tas5130c_vf0250_60HZ[] = {
5771static const struct usb_action tas5130c_vf0250_60HZScale[] = {
5772 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5774 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5773 {0xaa, 0x83, 0x0002}, /* 00,83,02,aa */ 5775 {0xaa, 0x83, 0x0002}, /* 00,83,02,aa */
5774 {0xaa, 0x84, 0x00c4}, /* 00,84,c4,aa */ 5776 {0xaa, 0x84, 0x00c4}, /* 00,84,c4,aa */
@@ -5792,8 +5794,7 @@ static const struct usb_action tas5130c_vf0250_60HZScale[] = {
5792 {} 5794 {}
5793}; 5795};
5794 5796
5795/* "NoFliker" light frequency banding flter */ 5797static const struct usb_action tas5130c_vf0250_NoFlikerScale[] = {
5796static const struct usb_action tas5130c_vf0250_NoFliker[] = {
5797 {0xa0, 0x0c, ZC3XX_R100_OPERATIONMODE}, /* 01,00,0c,cc, */ 5798 {0xa0, 0x0c, ZC3XX_R100_OPERATIONMODE}, /* 01,00,0c,cc, */
5798 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5799 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5799 {0xaa, 0x83, 0x0000}, /* 00,83,00,aa */ 5800 {0xaa, 0x83, 0x0000}, /* 00,83,00,aa */
@@ -5815,8 +5816,7 @@ static const struct usb_action tas5130c_vf0250_NoFliker[] = {
5815 {} 5816 {}
5816}; 5817};
5817 5818
5818/* "NoFlikerScale" light frequency banding filter */ 5819static const struct usb_action tas5130c_vf0250_NoFliker[] = {
5819static const struct usb_action tas5130c_vf0250_NoFlikerScale[] = {
5820 {0xa0, 0x0c, ZC3XX_R100_OPERATIONMODE}, /* 01,00,0c,cc, */ 5820 {0xa0, 0x0c, ZC3XX_R100_OPERATIONMODE}, /* 01,00,0c,cc, */
5821 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5821 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5822 {0xaa, 0x83, 0x0000}, /* 00,83,00,aa */ 5822 {0xaa, 0x83, 0x0000}, /* 00,83,00,aa */
@@ -5839,7 +5839,7 @@ static const struct usb_action tas5130c_vf0250_NoFlikerScale[] = {
5839}; 5839};
5840 5840
5841static u8 reg_r_i(struct gspca_dev *gspca_dev, 5841static u8 reg_r_i(struct gspca_dev *gspca_dev,
5842 __u16 index) 5842 u16 index)
5843{ 5843{
5844 usb_control_msg(gspca_dev->dev, 5844 usb_control_msg(gspca_dev->dev,
5845 usb_rcvctrlpipe(gspca_dev->dev, 0), 5845 usb_rcvctrlpipe(gspca_dev->dev, 0),
@@ -5852,7 +5852,7 @@ static u8 reg_r_i(struct gspca_dev *gspca_dev,
5852} 5852}
5853 5853
5854static u8 reg_r(struct gspca_dev *gspca_dev, 5854static u8 reg_r(struct gspca_dev *gspca_dev,
5855 __u16 index) 5855 u16 index)
5856{ 5856{
5857 u8 ret; 5857 u8 ret;
5858 5858
@@ -5862,8 +5862,8 @@ static u8 reg_r(struct gspca_dev *gspca_dev,
5862} 5862}
5863 5863
5864static void reg_w_i(struct usb_device *dev, 5864static void reg_w_i(struct usb_device *dev,
5865 __u8 value, 5865 u8 value,
5866 __u16 index) 5866 u16 index)
5867{ 5867{
5868 usb_control_msg(dev, 5868 usb_control_msg(dev,
5869 usb_sndctrlpipe(dev, 0), 5869 usb_sndctrlpipe(dev, 0),
@@ -5874,18 +5874,18 @@ static void reg_w_i(struct usb_device *dev,
5874} 5874}
5875 5875
5876static void reg_w(struct usb_device *dev, 5876static void reg_w(struct usb_device *dev,
5877 __u8 value, 5877 u8 value,
5878 __u16 index) 5878 u16 index)
5879{ 5879{
5880 PDEBUG(D_USBO, "reg w [%04x] = %02x", index, value); 5880 PDEBUG(D_USBO, "reg w [%04x] = %02x", index, value);
5881 reg_w_i(dev, value, index); 5881 reg_w_i(dev, value, index);
5882} 5882}
5883 5883
5884static __u16 i2c_read(struct gspca_dev *gspca_dev, 5884static u16 i2c_read(struct gspca_dev *gspca_dev,
5885 __u8 reg) 5885 u8 reg)
5886{ 5886{
5887 __u8 retbyte; 5887 u8 retbyte;
5888 __u16 retval; 5888 u16 retval;
5889 5889
5890 reg_w_i(gspca_dev->dev, reg, 0x0092); 5890 reg_w_i(gspca_dev->dev, reg, 0x0092);
5891 reg_w_i(gspca_dev->dev, 0x02, 0x0090); /* <- read command */ 5891 reg_w_i(gspca_dev->dev, 0x02, 0x0090); /* <- read command */
@@ -5900,12 +5900,12 @@ static __u16 i2c_read(struct gspca_dev *gspca_dev,
5900 return retval; 5900 return retval;
5901} 5901}
5902 5902
5903static __u8 i2c_write(struct gspca_dev *gspca_dev, 5903static u8 i2c_write(struct gspca_dev *gspca_dev,
5904 __u8 reg, 5904 u8 reg,
5905 __u8 valL, 5905 u8 valL,
5906 __u8 valH) 5906 u8 valH)
5907{ 5907{
5908 __u8 retbyte; 5908 u8 retbyte;
5909 5909
5910 reg_w_i(gspca_dev->dev, reg, 0x92); 5910 reg_w_i(gspca_dev->dev, reg, 0x92);
5911 reg_w_i(gspca_dev->dev, valL, 0x93); 5911 reg_w_i(gspca_dev->dev, valL, 0x93);
@@ -5957,24 +5957,24 @@ static void setmatrix(struct gspca_dev *gspca_dev)
5957{ 5957{
5958 struct sd *sd = (struct sd *) gspca_dev; 5958 struct sd *sd = (struct sd *) gspca_dev;
5959 int i; 5959 int i;
5960 const __u8 *matrix; 5960 const u8 *matrix;
5961 static const u8 adcm2700_matrix[9] = 5961 static const u8 adcm2700_matrix[9] =
5962/* {0x66, 0xed, 0xed, 0xed, 0x66, 0xed, 0xed, 0xed, 0x66}; */ 5962/* {0x66, 0xed, 0xed, 0xed, 0x66, 0xed, 0xed, 0xed, 0x66}; */
5963/*ms-win*/ 5963/*ms-win*/
5964 {0x74, 0xed, 0xed, 0xed, 0x74, 0xed, 0xed, 0xed, 0x74}; 5964 {0x74, 0xed, 0xed, 0xed, 0x74, 0xed, 0xed, 0xed, 0x74};
5965 static const __u8 gc0305_matrix[9] = 5965 static const u8 gc0305_matrix[9] =
5966 {0x50, 0xf8, 0xf8, 0xf8, 0x50, 0xf8, 0xf8, 0xf8, 0x50}; 5966 {0x50, 0xf8, 0xf8, 0xf8, 0x50, 0xf8, 0xf8, 0xf8, 0x50};
5967 static const __u8 ov7620_matrix[9] = 5967 static const u8 ov7620_matrix[9] =
5968 {0x58, 0xf4, 0xf4, 0xf4, 0x58, 0xf4, 0xf4, 0xf4, 0x58}; 5968 {0x58, 0xf4, 0xf4, 0xf4, 0x58, 0xf4, 0xf4, 0xf4, 0x58};
5969 static const __u8 pas202b_matrix[9] = 5969 static const u8 pas202b_matrix[9] =
5970 {0x4c, 0xf5, 0xff, 0xf9, 0x51, 0xf5, 0xfb, 0xed, 0x5f}; 5970 {0x4c, 0xf5, 0xff, 0xf9, 0x51, 0xf5, 0xfb, 0xed, 0x5f};
5971 static const __u8 po2030_matrix[9] = 5971 static const u8 po2030_matrix[9] =
5972 {0x60, 0xf0, 0xf0, 0xf0, 0x60, 0xf0, 0xf0, 0xf0, 0x60}; 5972 {0x60, 0xf0, 0xf0, 0xf0, 0x60, 0xf0, 0xf0, 0xf0, 0x60};
5973 static const u8 tas5130c_matrix[9] = 5973 static const u8 tas5130c_matrix[9] =
5974 {0x68, 0xec, 0xec, 0xec, 0x68, 0xec, 0xec, 0xec, 0x68}; 5974 {0x68, 0xec, 0xec, 0xec, 0x68, 0xec, 0xec, 0xec, 0x68};
5975 static const __u8 vf0250_matrix[9] = 5975 static const u8 vf0250_matrix[9] =
5976 {0x7b, 0xea, 0xea, 0xea, 0x7b, 0xea, 0xea, 0xea, 0x7b}; 5976 {0x7b, 0xea, 0xea, 0xea, 0x7b, 0xea, 0xea, 0xea, 0x7b};
5977 static const __u8 *matrix_tb[SENSOR_MAX] = { 5977 static const u8 *matrix_tb[SENSOR_MAX] = {
5978 adcm2700_matrix, /* SENSOR_ADCM2700 0 */ 5978 adcm2700_matrix, /* SENSOR_ADCM2700 0 */
5979 ov7620_matrix, /* SENSOR_CS2102 1 */ 5979 ov7620_matrix, /* SENSOR_CS2102 1 */
5980 NULL, /* SENSOR_CS2102K 2 */ 5980 NULL, /* SENSOR_CS2102K 2 */
@@ -6006,11 +6006,12 @@ static void setmatrix(struct gspca_dev *gspca_dev)
6006static void setbrightness(struct gspca_dev *gspca_dev) 6006static void setbrightness(struct gspca_dev *gspca_dev)
6007{ 6007{
6008 struct sd *sd = (struct sd *) gspca_dev; 6008 struct sd *sd = (struct sd *) gspca_dev;
6009 __u8 brightness; 6009 u8 brightness;
6010 6010
6011 switch (sd->sensor) { 6011 switch (sd->sensor) {
6012 case SENSOR_GC0305: 6012 case SENSOR_GC0305:
6013 case SENSOR_OV7620: 6013 case SENSOR_OV7620:
6014 case SENSOR_PAS202B:
6014 case SENSOR_PO2030: 6015 case SENSOR_PO2030:
6015 return; 6016 return;
6016 } 6017 }
@@ -6034,7 +6035,7 @@ static void setsharpness(struct gspca_dev *gspca_dev)
6034 struct sd *sd = (struct sd *) gspca_dev; 6035 struct sd *sd = (struct sd *) gspca_dev;
6035 struct usb_device *dev = gspca_dev->dev; 6036 struct usb_device *dev = gspca_dev->dev;
6036 int sharpness; 6037 int sharpness;
6037 static const __u8 sharpness_tb[][2] = { 6038 static const u8 sharpness_tb[][2] = {
6038 {0x02, 0x03}, 6039 {0x02, 0x03},
6039 {0x04, 0x07}, 6040 {0x04, 0x07},
6040 {0x08, 0x0f}, 6041 {0x08, 0x0f},
@@ -6053,118 +6054,69 @@ static void setcontrast(struct gspca_dev *gspca_dev)
6053{ 6054{
6054 struct sd *sd = (struct sd *) gspca_dev; 6055 struct sd *sd = (struct sd *) gspca_dev;
6055 struct usb_device *dev = gspca_dev->dev; 6056 struct usb_device *dev = gspca_dev->dev;
6056 const __u8 *Tgamma, *Tgradient; 6057 const u8 *Tgamma;
6057 int g, i, k; 6058 int g, i, k, adj, gp;
6058 static const __u8 kgamma_tb[16] = /* delta for contrast */ 6059 u8 gr[16];
6060 static const u8 delta_tb[16] = /* delta for contrast */
6059 {0x15, 0x0d, 0x0a, 0x09, 0x08, 0x08, 0x08, 0x08, 6061 {0x15, 0x0d, 0x0a, 0x09, 0x08, 0x08, 0x08, 0x08,
6060 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08}; 6062 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08};
6061 static const __u8 kgrad_tb[16] = 6063 static const u8 gamma_tb[6][16] = {
6062 {0x1b, 0x06, 0x03, 0x02, 0x00, 0x00, 0x00, 0x00,
6063 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x04};
6064 static const __u8 Tgamma_1[16] =
6065 {0x00, 0x00, 0x03, 0x0d, 0x1b, 0x2e, 0x45, 0x5f, 6064 {0x00, 0x00, 0x03, 0x0d, 0x1b, 0x2e, 0x45, 0x5f,
6066 0x79, 0x93, 0xab, 0xc1, 0xd4, 0xe5, 0xf3, 0xff}; 6065 0x79, 0x93, 0xab, 0xc1, 0xd4, 0xe5, 0xf3, 0xff},
6067 static const __u8 Tgradient_1[16] =
6068 {0x00, 0x01, 0x05, 0x0b, 0x10, 0x15, 0x18, 0x1a,
6069 0x1a, 0x18, 0x16, 0x14, 0x12, 0x0f, 0x0d, 0x06};
6070 static const __u8 Tgamma_2[16] =
6071 {0x01, 0x0c, 0x1f, 0x3a, 0x53, 0x6d, 0x85, 0x9c, 6066 {0x01, 0x0c, 0x1f, 0x3a, 0x53, 0x6d, 0x85, 0x9c,
6072 0xb0, 0xc2, 0xd1, 0xde, 0xe9, 0xf2, 0xf9, 0xff}; 6067 0xb0, 0xc2, 0xd1, 0xde, 0xe9, 0xf2, 0xf9, 0xff},
6073 static const __u8 Tgradient_2[16] =
6074 {0x05, 0x0f, 0x16, 0x1a, 0x19, 0x19, 0x17, 0x15,
6075 0x12, 0x10, 0x0e, 0x0b, 0x09, 0x08, 0x06, 0x03};
6076 static const __u8 Tgamma_3[16] =
6077 {0x04, 0x16, 0x30, 0x4e, 0x68, 0x81, 0x98, 0xac, 6068 {0x04, 0x16, 0x30, 0x4e, 0x68, 0x81, 0x98, 0xac,
6078 0xbe, 0xcd, 0xda, 0xe4, 0xed, 0xf5, 0xfb, 0xff}; 6069 0xbe, 0xcd, 0xda, 0xe4, 0xed, 0xf5, 0xfb, 0xff},
6079 static const __u8 Tgradient_3[16] =
6080 {0x0c, 0x16, 0x1b, 0x1c, 0x19, 0x18, 0x15, 0x12,
6081 0x10, 0x0d, 0x0b, 0x09, 0x08, 0x06, 0x05, 0x03};
6082 static const __u8 Tgamma_4[16] =
6083 {0x13, 0x38, 0x59, 0x79, 0x92, 0xa7, 0xb9, 0xc8, 6070 {0x13, 0x38, 0x59, 0x79, 0x92, 0xa7, 0xb9, 0xc8,
6084 0xd4, 0xdf, 0xe7, 0xee, 0xf4, 0xf9, 0xfc, 0xff}; 6071 0xd4, 0xdf, 0xe7, 0xee, 0xf4, 0xf9, 0xfc, 0xff},
6085 static const __u8 Tgradient_4[16] =
6086 {0x26, 0x22, 0x20, 0x1c, 0x16, 0x13, 0x10, 0x0d,
6087 0x0b, 0x09, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02};
6088 static const __u8 Tgamma_5[16] =
6089 {0x20, 0x4b, 0x6e, 0x8d, 0xa3, 0xb5, 0xc5, 0xd2, 6072 {0x20, 0x4b, 0x6e, 0x8d, 0xa3, 0xb5, 0xc5, 0xd2,
6090 0xdc, 0xe5, 0xec, 0xf2, 0xf6, 0xfa, 0xfd, 0xff}; 6073 0xdc, 0xe5, 0xec, 0xf2, 0xf6, 0xfa, 0xfd, 0xff},
6091 static const __u8 Tgradient_5[16] =
6092 {0x37, 0x26, 0x20, 0x1a, 0x14, 0x10, 0x0e, 0x0b,
6093 0x09, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x02};
6094 static const __u8 Tgamma_6[16] = /* ?? was gamma 5 */
6095 {0x24, 0x44, 0x64, 0x84, 0x9d, 0xb2, 0xc4, 0xd3, 6074 {0x24, 0x44, 0x64, 0x84, 0x9d, 0xb2, 0xc4, 0xd3,
6096 0xe0, 0xeb, 0xf4, 0xff, 0xff, 0xff, 0xff, 0xff}; 6075 0xe0, 0xeb, 0xf4, 0xff, 0xff, 0xff, 0xff, 0xff},
6097 static const __u8 Tgradient_6[16] =
6098 {0x18, 0x20, 0x20, 0x1c, 0x16, 0x13, 0x10, 0x0e,
6099 0x0b, 0x09, 0x07, 0x00, 0x00, 0x00, 0x00, 0x01};
6100 static const __u8 *gamma_tb[] = {
6101 NULL, Tgamma_1, Tgamma_2,
6102 Tgamma_3, Tgamma_4, Tgamma_5, Tgamma_6
6103 }; 6076 };
6104 static const __u8 *gradient_tb[] = {
6105 NULL, Tgradient_1, Tgradient_2,
6106 Tgradient_3, Tgradient_4, Tgradient_5, Tgradient_6
6107 };
6108#ifdef GSPCA_DEBUG
6109 __u8 v[16];
6110#endif
6111 6077
6112 Tgamma = gamma_tb[sd->gamma]; 6078 Tgamma = gamma_tb[sd->gamma - 1];
6113 Tgradient = gradient_tb[sd->gamma];
6114 6079
6115 k = (sd->contrast - 128) /* -128 / 128 */ 6080 k = ((int) sd->contrast - 128); /* -128 / 128 */
6116 * Tgamma[0]; 6081 adj = 0;
6117 PDEBUG(D_CONF, "gamma:%d contrast:%d gamma coeff: %d/128", 6082 gp = 0;
6118 sd->gamma, sd->contrast, k);
6119 for (i = 0; i < 16; i++) { 6083 for (i = 0; i < 16; i++) {
6120 g = Tgamma[i] + kgamma_tb[i] * k / 128; 6084 g = Tgamma[i] - delta_tb[i] * k / 128 - adj / 2;
6121 if (g > 0xff) 6085 if (g > 0xff)
6122 g = 0xff; 6086 g = 0xff;
6123 else if (g <= 0) 6087 else if (g <= 0)
6124 g = 1; 6088 g = 1;
6125 reg_w(dev, g, 0x0120 + i); /* gamma */ 6089 reg_w(dev, g, 0x0120 + i); /* gamma */
6126#ifdef GSPCA_DEBUG 6090 if (k > 0)
6127 if (gspca_debug & D_CONF) 6091 adj--;
6128 v[i] = g; 6092 else
6129#endif 6093 adj++;
6130 } 6094
6131 PDEBUG(D_CONF, "tb: %02x %02x %02x %02x %02x %02x %02x %02x", 6095 if (i != 0) {
6132 v[0], v[1], v[2], v[3], v[4], v[5], v[6], v[7]); 6096 if (gp == 0)
6133 PDEBUG(D_CONF, " %02x %02x %02x %02x %02x %02x %02x %02x", 6097 gr[i - 1] = 0;
6134 v[8], v[9], v[10], v[11], v[12], v[13], v[14], v[15]);
6135 for (i = 0; i < 16; i++) {
6136 g = Tgradient[i] - kgrad_tb[i] * k / 128;
6137 if (g > 0xff)
6138 g = 0xff;
6139 else if (g <= 0) {
6140 if (i != 15)
6141 g = 0;
6142 else 6098 else
6143 g = 1; 6099 gr[i - 1] = g - gp;
6144 } 6100 }
6145 reg_w(dev, g, 0x0130 + i); /* gradient */ 6101 gp = g;
6146#ifdef GSPCA_DEBUG
6147 if (gspca_debug & D_CONF)
6148 v[i] = g;
6149#endif
6150 } 6102 }
6151 PDEBUG(D_CONF, " %02x %02x %02x %02x %02x %02x %02x %02x", 6103 gr[15] = gr[14] / 2;
6152 v[0], v[1], v[2], v[3], v[4], v[5], v[6], v[7]); 6104 for (i = 0; i < 16; i++)
6153 PDEBUG(D_CONF, " %02x %02x %02x %02x %02x %02x %02x %02x", 6105 reg_w(dev, gr[i], 0x0130 + i); /* gradient */
6154 v[8], v[9], v[10], v[11], v[12], v[13], v[14], v[15]);
6155} 6106}
6156 6107
6157static void setquality(struct gspca_dev *gspca_dev) 6108static void setquality(struct gspca_dev *gspca_dev)
6158{ 6109{
6159 struct sd *sd = (struct sd *) gspca_dev; 6110 struct sd *sd = (struct sd *) gspca_dev;
6160 struct usb_device *dev = gspca_dev->dev; 6111 struct usb_device *dev = gspca_dev->dev;
6161 __u8 frxt; 6112 u8 frxt;
6162 6113
6163 switch (sd->sensor) { 6114 switch (sd->sensor) {
6164 case SENSOR_ADCM2700: 6115 case SENSOR_ADCM2700:
6165 case SENSOR_GC0305: 6116 case SENSOR_GC0305:
6166 case SENSOR_HV7131B: 6117 case SENSOR_HV7131B:
6167 case SENSOR_OV7620: 6118 case SENSOR_OV7620:
6119 case SENSOR_PAS202B:
6168 case SENSOR_PO2030: 6120 case SENSOR_PO2030:
6169 return; 6121 return;
6170 } 6122 }
@@ -6218,9 +6170,9 @@ static int setlightfreq(struct gspca_dev *gspca_dev)
6218 hdcs2020b_50HZ, hdcs2020b_50HZ, 6170 hdcs2020b_50HZ, hdcs2020b_50HZ,
6219 hdcs2020b_60HZ, hdcs2020b_60HZ}, 6171 hdcs2020b_60HZ, hdcs2020b_60HZ},
6220/* SENSOR_HV7131B 5 */ 6172/* SENSOR_HV7131B 5 */
6221 {hv7131b_NoFlikerScale, hv7131b_NoFliker, 6173 {hv7131b_NoFliker, hv7131b_NoFlikerScale,
6222 hv7131b_50HZScale, hv7131b_50HZ, 6174 hv7131b_50HZ, hv7131b_50HZScale,
6223 hv7131b_60HZScale, hv7131b_60HZ}, 6175 hv7131b_60HZ, hv7131b_60HZScale},
6224/* SENSOR_HV7131C 6 */ 6176/* SENSOR_HV7131C 6 */
6225 {NULL, NULL, 6177 {NULL, NULL,
6226 NULL, NULL, 6178 NULL, NULL,
@@ -6230,17 +6182,17 @@ static int setlightfreq(struct gspca_dev *gspca_dev)
6230 icm105a_50HZ, icm105a_50HZScale, 6182 icm105a_50HZ, icm105a_50HZScale,
6231 icm105a_60HZ, icm105a_60HZScale}, 6183 icm105a_60HZ, icm105a_60HZScale},
6232/* SENSOR_MC501CB 8 */ 6184/* SENSOR_MC501CB 8 */
6233 {MC501CB_NoFliker, MC501CB_NoFlikerScale, 6185 {mc501cb_NoFliker, mc501cb_NoFlikerScale,
6234 MC501CB_50HZ, MC501CB_50HZScale, 6186 mc501cb_50HZ, mc501cb_50HZScale,
6235 MC501CB_60HZ, MC501CB_60HZScale}, 6187 mc501cb_60HZ, mc501cb_60HZScale},
6236/* SENSOR_MI0360SOC 9 */ 6188/* SENSOR_MI0360SOC 9 */
6237 {mi360soc_AENoFlikerScale, mi360soc_AENoFliker, 6189 {mi360soc_AENoFliker, mi360soc_AENoFlikerScale,
6238 mi360soc_AE50HZScale, mi360soc_AE50HZ, 6190 mi360soc_AE50HZ, mi360soc_AE50HZScale,
6239 mi360soc_AE60HZScale, mi360soc_AE60HZ}, 6191 mi360soc_AE60HZ, mi360soc_AE60HZScale},
6240/* SENSOR_OV7620 10 */ 6192/* SENSOR_OV7620 10 */
6241 {OV7620_NoFliker, OV7620_NoFliker, 6193 {ov7620_NoFliker, ov7620_NoFliker,
6242 OV7620_50HZ, OV7620_50HZ, 6194 ov7620_50HZ, ov7620_50HZ,
6243 OV7620_60HZ, OV7620_60HZ}, 6195 ov7620_60HZ, ov7620_60HZ},
6244/* SENSOR_OV7630C 11 */ 6196/* SENSOR_OV7630C 11 */
6245 {NULL, NULL, 6197 {NULL, NULL,
6246 NULL, NULL, 6198 NULL, NULL,
@@ -6258,17 +6210,17 @@ static int setlightfreq(struct gspca_dev *gspca_dev)
6258 pb0330_50HZScale, pb0330_50HZ, 6210 pb0330_50HZScale, pb0330_50HZ,
6259 pb0330_60HZScale, pb0330_60HZ}, 6211 pb0330_60HZScale, pb0330_60HZ},
6260/* SENSOR_PO2030 15 */ 6212/* SENSOR_PO2030 15 */
6261 {PO2030_NoFliker, PO2030_NoFliker, 6213 {po2030_NoFliker, po2030_NoFliker,
6262 PO2030_50HZ, PO2030_50HZ, 6214 po2030_50HZ, po2030_50HZ,
6263 PO2030_60HZ, PO2030_60HZ}, 6215 po2030_60HZ, po2030_60HZ},
6264/* SENSOR_TAS5130CK 16 */ 6216/* SENSOR_TAS5130CK 16 */
6265 {tas5130cxx_NoFlikerScale, tas5130cxx_NoFliker, 6217 {tas5130cxx_NoFliker, tas5130cxx_NoFlikerScale,
6266 tas5130cxx_50HZScale, tas5130cxx_50HZ, 6218 tas5130cxx_50HZ, tas5130cxx_50HZScale,
6267 tas5130cxx_60HZScale, tas5130cxx_60HZ}, 6219 tas5130cxx_60HZ, tas5130cxx_60HZScale},
6268/* SENSOR_TAS5130CXX 17 */ 6220/* SENSOR_TAS5130CXX 17 */
6269 {tas5130cxx_NoFlikerScale, tas5130cxx_NoFliker, 6221 {tas5130cxx_NoFliker, tas5130cxx_NoFlikerScale,
6270 tas5130cxx_50HZScale, tas5130cxx_50HZ, 6222 tas5130cxx_50HZ, tas5130cxx_50HZScale,
6271 tas5130cxx_60HZScale, tas5130cxx_60HZ}, 6223 tas5130cxx_60HZ, tas5130cxx_60HZScale},
6272/* SENSOR_TAS5130C_VF0250 18 */ 6224/* SENSOR_TAS5130C_VF0250 18 */
6273 {tas5130c_vf0250_NoFliker, tas5130c_vf0250_NoFlikerScale, 6225 {tas5130c_vf0250_NoFliker, tas5130c_vf0250_NoFlikerScale,
6274 tas5130c_vf0250_50HZ, tas5130c_vf0250_50HZScale, 6226 tas5130c_vf0250_50HZ, tas5130c_vf0250_50HZScale,
@@ -6277,9 +6229,9 @@ static int setlightfreq(struct gspca_dev *gspca_dev)
6277 6229
6278 i = sd->lightfreq * 2; 6230 i = sd->lightfreq * 2;
6279 mode = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv; 6231 mode = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
6280 if (!mode) 6232 if (mode)
6281 i++; /* 640x480 */ 6233 i++; /* 320x240 */
6282 zc3_freq = freq_tb[(int) sd->sensor][i]; 6234 zc3_freq = freq_tb[sd->sensor][i];
6283 if (zc3_freq != NULL) { 6235 if (zc3_freq != NULL) {
6284 usb_exchange(gspca_dev, zc3_freq); 6236 usb_exchange(gspca_dev, zc3_freq);
6285 switch (sd->sensor) { 6237 switch (sd->sensor) {
@@ -6297,6 +6249,9 @@ static int setlightfreq(struct gspca_dev *gspca_dev)
6297 reg_w(gspca_dev->dev, 0x44, 0x0002); 6249 reg_w(gspca_dev->dev, 0x44, 0x0002);
6298 } 6250 }
6299 break; 6251 break;
6252 case SENSOR_PAS202B:
6253 reg_w(gspca_dev->dev, 0x00, 0x01a7);
6254 break;
6300 } 6255 }
6301 } 6256 }
6302 return 0; 6257 return 0;
@@ -6305,7 +6260,7 @@ static int setlightfreq(struct gspca_dev *gspca_dev)
6305static void setautogain(struct gspca_dev *gspca_dev) 6260static void setautogain(struct gspca_dev *gspca_dev)
6306{ 6261{
6307 struct sd *sd = (struct sd *) gspca_dev; 6262 struct sd *sd = (struct sd *) gspca_dev;
6308 __u8 autoval; 6263 u8 autoval;
6309 6264
6310 if (sd->autogain) 6265 if (sd->autogain)
6311 autoval = 0x42; 6266 autoval = 0x42;
@@ -6333,6 +6288,12 @@ static void send_unknown(struct usb_device *dev, int sensor)
6333 reg_w(dev, 0x02, 0x003b); 6288 reg_w(dev, 0x02, 0x003b);
6334 reg_w(dev, 0x00, 0x0038); 6289 reg_w(dev, 0x00, 0x0038);
6335 break; 6290 break;
6291 case SENSOR_PAS202B:
6292 reg_w(dev, 0x03, 0x003b);
6293 reg_w(dev, 0x0c, 0x003a);
6294 reg_w(dev, 0x0b, 0x0039);
6295 reg_w(dev, 0x0b, 0x0038);
6296 break;
6336 } 6297 }
6337} 6298}
6338 6299
@@ -6349,7 +6310,7 @@ static void start_2wr_probe(struct usb_device *dev, int sensor)
6349 6310
6350static int sif_probe(struct gspca_dev *gspca_dev) 6311static int sif_probe(struct gspca_dev *gspca_dev)
6351{ 6312{
6352 __u16 checkword; 6313 u16 checkword;
6353 6314
6354 start_2wr_probe(gspca_dev->dev, 0x0f); /* PAS106 */ 6315 start_2wr_probe(gspca_dev->dev, 0x0f); /* PAS106 */
6355 reg_w(gspca_dev->dev, 0x08, 0x008d); 6316 reg_w(gspca_dev->dev, 0x08, 0x008d);
@@ -6392,6 +6353,7 @@ static int vga_2wr_probe(struct gspca_dev *gspca_dev)
6392 } 6353 }
6393 6354
6394 start_2wr_probe(dev, 0x08); /* HDCS2020 */ 6355 start_2wr_probe(dev, 0x08); /* HDCS2020 */
6356 i2c_write(gspca_dev, 0x1c, 0x00, 0x00);
6395 i2c_write(gspca_dev, 0x15, 0xaa, 0x00); 6357 i2c_write(gspca_dev, 0x15, 0xaa, 0x00);
6396 retword = i2c_read(gspca_dev, 0x15); 6358 retword = i2c_read(gspca_dev, 0x15);
6397 if (retword != 0) 6359 if (retword != 0)
@@ -6420,8 +6382,10 @@ static int vga_2wr_probe(struct gspca_dev *gspca_dev)
6420 i2c_write(gspca_dev, 0x03, 0xaa, 0x00); 6382 i2c_write(gspca_dev, 0x03, 0xaa, 0x00);
6421 msleep(50); 6383 msleep(50);
6422 retword = i2c_read(gspca_dev, 0x03); 6384 retword = i2c_read(gspca_dev, 0x03);
6423 if (retword != 0) 6385 if (retword != 0) {
6386 send_unknown(dev, SENSOR_PAS202B);
6424 return 0x0e; /* PAS202BCB */ 6387 return 0x0e; /* PAS202BCB */
6388 }
6425 6389
6426 start_2wr_probe(dev, 0x02); /* TAS5130C */ 6390 start_2wr_probe(dev, 0x02); /* TAS5130C */
6427 i2c_write(gspca_dev, 0x01, 0xaa, 0x00); 6391 i2c_write(gspca_dev, 0x01, 0xaa, 0x00);
@@ -6457,8 +6421,8 @@ ov_check:
6457} 6421}
6458 6422
6459struct sensor_by_chipset_revision { 6423struct sensor_by_chipset_revision {
6460 __u16 revision; 6424 u16 revision;
6461 __u8 internal_sensor_id; 6425 u8 internal_sensor_id;
6462}; 6426};
6463static const struct sensor_by_chipset_revision chipset_revision_sensor[] = { 6427static const struct sensor_by_chipset_revision chipset_revision_sensor[] = {
6464 {0xc000, 0x12}, /* TAS5130C */ 6428 {0xc000, 0x12}, /* TAS5130C */
@@ -6467,6 +6431,7 @@ static const struct sensor_by_chipset_revision chipset_revision_sensor[] = {
6467 {0x8001, 0x13}, 6431 {0x8001, 0x13},
6468 {0x8000, 0x14}, /* CS2102K */ 6432 {0x8000, 0x14}, /* CS2102K */
6469 {0x8400, 0x15}, /* TAS5130K */ 6433 {0x8400, 0x15}, /* TAS5130K */
6434 {0xe400, 0x15},
6470}; 6435};
6471 6436
6472static int vga_3wr_probe(struct gspca_dev *gspca_dev) 6437static int vga_3wr_probe(struct gspca_dev *gspca_dev)
@@ -6474,7 +6439,7 @@ static int vga_3wr_probe(struct gspca_dev *gspca_dev)
6474 struct sd *sd = (struct sd *) gspca_dev; 6439 struct sd *sd = (struct sd *) gspca_dev;
6475 struct usb_device *dev = gspca_dev->dev; 6440 struct usb_device *dev = gspca_dev->dev;
6476 int i; 6441 int i;
6477 __u8 retbyte; 6442 u8 retbyte;
6478 u16 retword; 6443 u16 retword;
6479 6444
6480/*fixme: lack of 8b=b3 (11,12)-> 10, 8b=e0 (14,15,16)-> 12 found in gspcav1*/ 6445/*fixme: lack of 8b=b3 (11,12)-> 10, 8b=e0 (14,15,16)-> 12 found in gspcav1*/
@@ -6622,8 +6587,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
6622 struct sd *sd = (struct sd *) gspca_dev; 6587 struct sd *sd = (struct sd *) gspca_dev;
6623 struct cam *cam; 6588 struct cam *cam;
6624 int sensor; 6589 int sensor;
6625 int vga = 1; /* 1: vga, 0: sif */ 6590 static const u8 gamma[SENSOR_MAX] = {
6626 static const __u8 gamma[SENSOR_MAX] = {
6627 4, /* SENSOR_ADCM2700 0 */ 6591 4, /* SENSOR_ADCM2700 0 */
6628 4, /* SENSOR_CS2102 1 */ 6592 4, /* SENSOR_CS2102 1 */
6629 5, /* SENSOR_CS2102K 2 */ 6593 5, /* SENSOR_CS2102K 2 */
@@ -6644,9 +6608,30 @@ static int sd_config(struct gspca_dev *gspca_dev,
6644 3, /* SENSOR_TAS5130CXX 17 */ 6608 3, /* SENSOR_TAS5130CXX 17 */
6645 3, /* SENSOR_TAS5130C_VF0250 18 */ 6609 3, /* SENSOR_TAS5130C_VF0250 18 */
6646 }; 6610 };
6611 static const u8 mode_tb[SENSOR_MAX] = {
6612 2, /* SENSOR_ADCM2700 0 */
6613 1, /* SENSOR_CS2102 1 */
6614 1, /* SENSOR_CS2102K 2 */
6615 1, /* SENSOR_GC0305 3 */
6616 1, /* SENSOR_HDCS2020b 4 */
6617 1, /* SENSOR_HV7131B 5 */
6618 1, /* SENSOR_HV7131C 6 */
6619 1, /* SENSOR_ICM105A 7 */
6620 2, /* SENSOR_MC501CB 8 */
6621 1, /* SENSOR_MI0360SOC 9 */
6622 2, /* SENSOR_OV7620 10 */
6623 1, /* SENSOR_OV7630C 11 */
6624 0, /* SENSOR_PAS106 12 */
6625 1, /* SENSOR_PAS202B 13 */
6626 1, /* SENSOR_PB0330 14 */
6627 1, /* SENSOR_PO2030 15 */
6628 1, /* SENSOR_TAS5130CK 16 */
6629 1, /* SENSOR_TAS5130CXX 17 */
6630 1, /* SENSOR_TAS5130C_VF0250 18 */
6631 };
6647 6632
6648 /* define some sensors from the vendor/product */ 6633 /* define some sensors from the vendor/product */
6649 sd->sharpness = 2; 6634 sd->sharpness = SHARPNESS_DEF;
6650 sd->sensor = id->driver_info; 6635 sd->sensor = id->driver_info;
6651 sensor = zcxx_probeSensor(gspca_dev); 6636 sensor = zcxx_probeSensor(gspca_dev);
6652 if (sensor >= 0) 6637 if (sensor >= 0)
@@ -6671,8 +6656,21 @@ static int sd_config(struct gspca_dev *gspca_dev,
6671 } 6656 }
6672 break; 6657 break;
6673 case 0: 6658 case 0:
6674 PDEBUG(D_PROBE, "Find Sensor HV7131B"); 6659 /* check the sensor type */
6675 sd->sensor = SENSOR_HV7131B; 6660 sensor = i2c_read(gspca_dev, 0x00);
6661 PDEBUG(D_PROBE, "Sensor hv7131 type %d", sensor);
6662 switch (sensor) {
6663 case 0: /* hv7131b */
6664 case 1: /* hv7131e */
6665 PDEBUG(D_PROBE, "Find Sensor HV7131B");
6666 sd->sensor = SENSOR_HV7131B;
6667 break;
6668 default:
6669/* case 2: * hv7131r */
6670 PDEBUG(D_PROBE, "Find Sensor HV7131R(c)");
6671 sd->sensor = SENSOR_HV7131C;
6672 break;
6673 }
6676 break; 6674 break;
6677 case 0x02: 6675 case 0x02:
6678 PDEBUG(D_PROBE, "Sensor TAS5130C"); 6676 PDEBUG(D_PROBE, "Sensor TAS5130C");
@@ -6699,12 +6697,11 @@ static int sd_config(struct gspca_dev *gspca_dev,
6699 case 0x0e: 6697 case 0x0e:
6700 PDEBUG(D_PROBE, "Find Sensor PAS202B"); 6698 PDEBUG(D_PROBE, "Find Sensor PAS202B");
6701 sd->sensor = SENSOR_PAS202B; 6699 sd->sensor = SENSOR_PAS202B;
6702 sd->sharpness = 1; 6700/* sd->sharpness = 1; */
6703 break; 6701 break;
6704 case 0x0f: 6702 case 0x0f:
6705 PDEBUG(D_PROBE, "Find Sensor PAS106"); 6703 PDEBUG(D_PROBE, "Find Sensor PAS106");
6706 sd->sensor = SENSOR_PAS106; 6704 sd->sensor = SENSOR_PAS106;
6707 vga = 0; /* SIF */
6708 break; 6705 break;
6709 case 0x10: 6706 case 0x10:
6710 case 0x12: 6707 case 0x12:
@@ -6770,31 +6767,38 @@ static int sd_config(struct gspca_dev *gspca_dev,
6770 if (sensor < 0x20) { 6767 if (sensor < 0x20) {
6771 if (sensor == -1 || sensor == 0x10 || sensor == 0x12) 6768 if (sensor == -1 || sensor == 0x10 || sensor == 0x12)
6772 reg_w(gspca_dev->dev, 0x02, 0x0010); 6769 reg_w(gspca_dev->dev, 0x02, 0x0010);
6773 else
6774 reg_w(gspca_dev->dev, sensor & 0x0f, 0x0010);
6775 reg_r(gspca_dev, 0x0010); 6770 reg_r(gspca_dev, 0x0010);
6776 } 6771 }
6777 6772
6778 cam = &gspca_dev->cam; 6773 cam = &gspca_dev->cam;
6779/*fixme:test*/ 6774/*fixme:test*/
6780 gspca_dev->nbalt--; 6775 gspca_dev->nbalt--;
6781 if (vga) { 6776 switch (mode_tb[sd->sensor]) {
6782 cam->cam_mode = vga_mode; 6777 case 0:
6783 cam->nmodes = ARRAY_SIZE(vga_mode);
6784 } else {
6785 cam->cam_mode = sif_mode; 6778 cam->cam_mode = sif_mode;
6786 cam->nmodes = ARRAY_SIZE(sif_mode); 6779 cam->nmodes = ARRAY_SIZE(sif_mode);
6780 break;
6781 case 1:
6782 cam->cam_mode = vga_mode;
6783 cam->nmodes = ARRAY_SIZE(vga_mode);
6784 break;
6785 default:
6786/* case 2: */
6787 cam->cam_mode = broken_vga_mode;
6788 cam->nmodes = ARRAY_SIZE(broken_vga_mode);
6789 break;
6787 } 6790 }
6788 sd->brightness = sd_ctrls[SD_BRIGHTNESS].qctrl.default_value; 6791 sd->brightness = BRIGHTNESS_DEF;
6789 sd->contrast = sd_ctrls[SD_CONTRAST].qctrl.default_value; 6792 sd->contrast = CONTRAST_DEF;
6790 sd->gamma = gamma[(int) sd->sensor]; 6793 sd->gamma = gamma[sd->sensor];
6791 sd->autogain = sd_ctrls[SD_AUTOGAIN].qctrl.default_value; 6794 sd->autogain = AUTOGAIN_DEF;
6792 sd->lightfreq = sd_ctrls[SD_FREQ].qctrl.default_value; 6795 sd->lightfreq = FREQ_DEF;
6793 sd->quality = QUALITY_DEF; 6796 sd->quality = QUALITY_DEF;
6794 6797
6795 switch (sd->sensor) { 6798 switch (sd->sensor) {
6796 case SENSOR_GC0305: 6799 case SENSOR_GC0305:
6797 case SENSOR_OV7620: 6800 case SENSOR_OV7620:
6801 case SENSOR_PAS202B:
6798 case SENSOR_PO2030: 6802 case SENSOR_PO2030:
6799 gspca_dev->ctrl_dis = (1 << BRIGHTNESS_IDX); 6803 gspca_dev->ctrl_dis = (1 << BRIGHTNESS_IDX);
6800 break; 6804 break;
@@ -6805,14 +6809,13 @@ static int sd_config(struct gspca_dev *gspca_dev,
6805 break; 6809 break;
6806 } 6810 }
6807 6811
6808 /* switch the led off */
6809 reg_w(gspca_dev->dev, 0x01, 0x0000);
6810 return 0; 6812 return 0;
6811} 6813}
6812 6814
6813/* this function is called at probe and resume time */ 6815/* this function is called at probe and resume time */
6814static int sd_init(struct gspca_dev *gspca_dev) 6816static int sd_init(struct gspca_dev *gspca_dev)
6815{ 6817{
6818 /* switch off the led */
6816 reg_w(gspca_dev->dev, 0x01, 0x0000); 6819 reg_w(gspca_dev->dev, 0x01, 0x0000);
6817 return 0; 6820 return 0;
6818} 6821}
@@ -6821,28 +6824,27 @@ static int sd_start(struct gspca_dev *gspca_dev)
6821{ 6824{
6822 struct sd *sd = (struct sd *) gspca_dev; 6825 struct sd *sd = (struct sd *) gspca_dev;
6823 struct usb_device *dev = gspca_dev->dev; 6826 struct usb_device *dev = gspca_dev->dev;
6824 const struct usb_action *zc3_init;
6825 int mode; 6827 int mode;
6826 static const struct usb_action *init_tb[SENSOR_MAX][2] = { 6828 static const struct usb_action *init_tb[SENSOR_MAX][2] = {
6827 {adcm2700_Initial, adcm2700_InitialScale}, /* 0 */ 6829 {adcm2700_Initial, adcm2700_InitialScale}, /* 0 */
6828 {cs2102_InitialScale, cs2102_Initial}, /* 1 */ 6830 {cs2102_Initial, cs2102_InitialScale}, /* 1 */
6829 {cs2102K_InitialScale, cs2102K_Initial}, /* 2 */ 6831 {cs2102K_Initial, cs2102K_InitialScale}, /* 2 */
6830 {gc0305_Initial, gc0305_InitialScale}, /* 3 */ 6832 {gc0305_Initial, gc0305_InitialScale}, /* 3 */
6831 {hdcs2020xb_InitialScale, hdcs2020xb_Initial}, /* 4 */ 6833 {hdcs2020b_Initial, hdcs2020b_InitialScale}, /* 4 */
6832 {hv7131bxx_InitialScale, hv7131bxx_Initial}, /* 5 */ 6834 {hv7131b_Initial, hv7131b_InitialScale}, /* 5 */
6833 {hv7131cxx_InitialScale, hv7131cxx_Initial}, /* 6 */ 6835 {hv7131r_Initial, hv7131r_InitialScale}, /* 6 */
6834 {icm105axx_InitialScale, icm105axx_Initial}, /* 7 */ 6836 {icm105a_Initial, icm105a_InitialScale}, /* 7 */
6835 {MC501CB_InitialScale, MC501CB_Initial}, /* 8 */ 6837 {mc501cb_Initial, mc501cb_InitialScale}, /* 8 */
6836 {mi0360soc_Initial, mi0360soc_InitialScale}, /* 9 */ 6838 {mi0360soc_Initial, mi0360soc_InitialScale}, /* 9 */
6837 {OV7620_mode0, OV7620_mode1}, /* 10 */ 6839 {ov7620_Initial, ov7620_InitialScale}, /* 10 */
6838 {ov7630c_InitialScale, ov7630c_Initial}, /* 11 */ 6840 {ov7630c_Initial, ov7630c_InitialScale}, /* 11 */
6839 {pas106b_InitialScale, pas106b_Initial}, /* 12 */ 6841 {pas106b_Initial, pas106b_InitialScale}, /* 12 */
6840 {pas202b_Initial, pas202b_InitialScale}, /* 13 */ 6842 {pas202b_Initial, pas202b_InitialScale}, /* 13 */
6841 {pb0330_Initial, pb0330_InitialScale}, /* 14 */ 6843 {pb0330_Initial, pb0330_InitialScale}, /* 14 */
6842 {PO2030_mode0, PO2030_mode1}, /* 15 */ 6844 {po2030_Initial, po2030_InitialScale}, /* 15 */
6843 {tas5130CK_InitialScale, tas5130CK_Initial}, /* 16 */ 6845 {tas5130cK_Initial, tas5130cK_InitialScale}, /* 16 */
6844 {tas5130cxx_Initial, tas5130cxx_InitialScale}, /* 17 */ 6846 {tas5130cxx_Initial, tas5130cxx_InitialScale}, /* 17 */
6845 {tas5130c_vf0250_InitialScale, tas5130c_vf0250_Initial}, 6847 {tas5130c_vf0250_Initial, tas5130c_vf0250_InitialScale},
6846 /* 18 */ 6848 /* 18 */
6847 }; 6849 };
6848 6850
@@ -6854,8 +6856,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
6854 0x21); /* JPEG 422 */ 6856 0x21); /* JPEG 422 */
6855 jpeg_set_qual(sd->jpeg_hdr, sd->quality); 6857 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
6856 6858
6857 mode = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv; 6859 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
6858 zc3_init = init_tb[(int) sd->sensor][mode];
6859 switch (sd->sensor) { 6860 switch (sd->sensor) {
6860 case SENSOR_HV7131C: 6861 case SENSOR_HV7131C:
6861 zcxx_probeSensor(gspca_dev); 6862 zcxx_probeSensor(gspca_dev);
@@ -6864,7 +6865,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
6864 usb_exchange(gspca_dev, pas106b_Initial_com); 6865 usb_exchange(gspca_dev, pas106b_Initial_com);
6865 break; 6866 break;
6866 } 6867 }
6867 usb_exchange(gspca_dev, zc3_init); 6868 usb_exchange(gspca_dev, init_tb[sd->sensor][mode]);
6868 6869
6869 switch (sd->sensor) { 6870 switch (sd->sensor) {
6870 case SENSOR_ADCM2700: 6871 case SENSOR_ADCM2700:
@@ -6883,6 +6884,11 @@ static int sd_start(struct gspca_dev *gspca_dev)
6883 reg_w(dev, 0x02, 0x003b); 6884 reg_w(dev, 0x02, 0x003b);
6884 reg_w(dev, 0x00, 0x0038); 6885 reg_w(dev, 0x00, 0x0038);
6885 break; 6886 break;
6887 case SENSOR_PAS202B:
6888 reg_w(dev, 0x03, 0x003b);
6889 reg_w(dev, 0x0c, 0x003a);
6890 reg_w(dev, 0x0b, 0x0039);
6891 break;
6886 } 6892 }
6887 6893
6888 setmatrix(gspca_dev); 6894 setmatrix(gspca_dev);
@@ -6961,13 +6967,13 @@ static int sd_start(struct gspca_dev *gspca_dev)
6961 switch (sd->sensor) { 6967 switch (sd->sensor) {
6962 case SENSOR_PO2030: 6968 case SENSOR_PO2030:
6963 msleep(50); 6969 msleep(50);
6964 reg_r(gspca_dev, 0x0008);
6965 reg_r(gspca_dev, 0x0007);
6966 /*fall thru*/
6967 case SENSOR_PAS202B:
6968 reg_w(dev, 0x00, 0x0007); /* (from win traces) */ 6970 reg_w(dev, 0x00, 0x0007); /* (from win traces) */
6969 reg_w(dev, 0x02, ZC3XX_R008_CLOCKSETTING); 6971 reg_w(dev, 0x02, ZC3XX_R008_CLOCKSETTING);
6970 break; 6972 break;
6973 case SENSOR_PAS202B:
6974 reg_w(dev, 0x32, 0x0007); /* (from win traces) */
6975 reg_w(dev, 0x02, ZC3XX_R008_CLOCKSETTING);
6976 break;
6971 } 6977 }
6972 return 0; 6978 return 0;
6973} 6979}
@@ -7165,6 +7171,22 @@ static int sd_get_jcomp(struct gspca_dev *gspca_dev,
7165 return 0; 7171 return 0;
7166} 7172}
7167 7173
7174#ifdef CONFIG_INPUT
7175static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
7176 u8 *data, /* interrupt packet data */
7177 int len) /* interrput packet length */
7178{
7179 if (len == 8 && data[4] == 1) {
7180 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 1);
7181 input_sync(gspca_dev->input_dev);
7182 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
7183 input_sync(gspca_dev->input_dev);
7184 }
7185
7186 return 0;
7187}
7188#endif
7189
7168static const struct sd_desc sd_desc = { 7190static const struct sd_desc sd_desc = {
7169 .name = MODULE_NAME, 7191 .name = MODULE_NAME,
7170 .ctrls = sd_ctrls, 7192 .ctrls = sd_ctrls,
@@ -7177,6 +7199,9 @@ static const struct sd_desc sd_desc = {
7177 .querymenu = sd_querymenu, 7199 .querymenu = sd_querymenu,
7178 .get_jcomp = sd_get_jcomp, 7200 .get_jcomp = sd_get_jcomp,
7179 .set_jcomp = sd_set_jcomp, 7201 .set_jcomp = sd_set_jcomp,
7202#ifdef CONFIG_INPUT
7203 .int_pkt_scan = sd_int_pkt_scan,
7204#endif
7180}; 7205};
7181 7206
7182static const __devinitdata struct usb_device_id device_table[] = { 7207static const __devinitdata struct usb_device_id device_table[] = {
diff --git a/drivers/media/video/hdpvr/hdpvr-core.c b/drivers/media/video/hdpvr/hdpvr-core.c
index 51f393d03a46..2fc9865fd486 100644
--- a/drivers/media/video/hdpvr/hdpvr-core.c
+++ b/drivers/media/video/hdpvr/hdpvr-core.c
@@ -39,12 +39,12 @@ int hdpvr_debug;
39module_param(hdpvr_debug, int, S_IRUGO|S_IWUSR); 39module_param(hdpvr_debug, int, S_IRUGO|S_IWUSR);
40MODULE_PARM_DESC(hdpvr_debug, "enable debugging output"); 40MODULE_PARM_DESC(hdpvr_debug, "enable debugging output");
41 41
42uint default_video_input = HDPVR_VIDEO_INPUTS; 42static uint default_video_input = HDPVR_VIDEO_INPUTS;
43module_param(default_video_input, uint, S_IRUGO|S_IWUSR); 43module_param(default_video_input, uint, S_IRUGO|S_IWUSR);
44MODULE_PARM_DESC(default_video_input, "default video input: 0=Component / " 44MODULE_PARM_DESC(default_video_input, "default video input: 0=Component / "
45 "1=S-Video / 2=Composite"); 45 "1=S-Video / 2=Composite");
46 46
47uint default_audio_input = HDPVR_AUDIO_INPUTS; 47static uint default_audio_input = HDPVR_AUDIO_INPUTS;
48module_param(default_audio_input, uint, S_IRUGO|S_IWUSR); 48module_param(default_audio_input, uint, S_IRUGO|S_IWUSR);
49MODULE_PARM_DESC(default_audio_input, "default audio input: 0=RCA back / " 49MODULE_PARM_DESC(default_audio_input, "default audio input: 0=RCA back / "
50 "1=RCA front / 2=S/PDIF"); 50 "1=RCA front / 2=S/PDIF");
@@ -59,6 +59,7 @@ static struct usb_device_id hdpvr_table[] = {
59 { USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID) }, 59 { USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID) },
60 { USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID1) }, 60 { USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID1) },
61 { USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID2) }, 61 { USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID2) },
62 { USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID3) },
62 { } /* Terminating entry */ 63 { } /* Terminating entry */
63}; 64};
64MODULE_DEVICE_TABLE(usb, hdpvr_table); 65MODULE_DEVICE_TABLE(usb, hdpvr_table);
diff --git a/drivers/media/video/hdpvr/hdpvr-video.c b/drivers/media/video/hdpvr/hdpvr-video.c
index fdd782039e9d..196f82de48f0 100644
--- a/drivers/media/video/hdpvr/hdpvr-video.c
+++ b/drivers/media/video/hdpvr/hdpvr-video.c
@@ -302,7 +302,8 @@ static int hdpvr_start_streaming(struct hdpvr_device *dev)
302/* function expects dev->io_mutex to be hold by caller */ 302/* function expects dev->io_mutex to be hold by caller */
303static int hdpvr_stop_streaming(struct hdpvr_device *dev) 303static int hdpvr_stop_streaming(struct hdpvr_device *dev)
304{ 304{
305 uint actual_length, c = 0; 305 int actual_length;
306 uint c = 0;
306 u8 *buf; 307 u8 *buf;
307 308
308 if (dev->status == STATUS_IDLE) 309 if (dev->status == STATUS_IDLE)
@@ -572,7 +573,7 @@ static int vidioc_querycap(struct file *file, void *priv,
572 struct hdpvr_device *dev = video_drvdata(file); 573 struct hdpvr_device *dev = video_drvdata(file);
573 574
574 strcpy(cap->driver, "hdpvr"); 575 strcpy(cap->driver, "hdpvr");
575 strcpy(cap->card, "Haupauge HD PVR"); 576 strcpy(cap->card, "Hauppauge HD PVR");
576 usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); 577 usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info));
577 cap->version = HDPVR_VERSION; 578 cap->version = HDPVR_VERSION;
578 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | 579 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
diff --git a/drivers/media/video/hdpvr/hdpvr.h b/drivers/media/video/hdpvr/hdpvr.h
index 1edd8759121e..49ae25d83d10 100644
--- a/drivers/media/video/hdpvr/hdpvr.h
+++ b/drivers/media/video/hdpvr/hdpvr.h
@@ -30,6 +30,7 @@
30#define HD_PVR_PRODUCT_ID 0x4900 30#define HD_PVR_PRODUCT_ID 0x4900
31#define HD_PVR_PRODUCT_ID1 0x4901 31#define HD_PVR_PRODUCT_ID1 0x4901
32#define HD_PVR_PRODUCT_ID2 0x4902 32#define HD_PVR_PRODUCT_ID2 0x4902
33#define HD_PVR_PRODUCT_ID3 0x4982
33 34
34#define UNSET (-1U) 35#define UNSET (-1U)
35 36
diff --git a/drivers/media/video/hexium_gemini.c b/drivers/media/video/hexium_gemini.c
index 60d992ee2589..e620a3a92f25 100644
--- a/drivers/media/video/hexium_gemini.c
+++ b/drivers/media/video/hexium_gemini.c
@@ -352,9 +352,13 @@ static struct saa7146_ext_vv vv_data;
352static int hexium_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info) 352static int hexium_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
353{ 353{
354 struct hexium *hexium = (struct hexium *) dev->ext_priv; 354 struct hexium *hexium = (struct hexium *) dev->ext_priv;
355 int ret;
355 356
356 DEB_EE((".\n")); 357 DEB_EE((".\n"));
357 358
359 ret = saa7146_vv_devinit(dev);
360 if (ret)
361 return ret;
358 hexium = kzalloc(sizeof(struct hexium), GFP_KERNEL); 362 hexium = kzalloc(sizeof(struct hexium), GFP_KERNEL);
359 if (NULL == hexium) { 363 if (NULL == hexium) {
360 printk("hexium_gemini: not enough kernel memory in hexium_attach().\n"); 364 printk("hexium_gemini: not enough kernel memory in hexium_attach().\n");
@@ -400,9 +404,10 @@ static int hexium_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_d
400 vv_data.ops.vidioc_enum_input = vidioc_enum_input; 404 vv_data.ops.vidioc_enum_input = vidioc_enum_input;
401 vv_data.ops.vidioc_g_input = vidioc_g_input; 405 vv_data.ops.vidioc_g_input = vidioc_g_input;
402 vv_data.ops.vidioc_s_input = vidioc_s_input; 406 vv_data.ops.vidioc_s_input = vidioc_s_input;
403 if (0 != saa7146_register_device(&hexium->video_dev, dev, "hexium gemini", VFL_TYPE_GRABBER)) { 407 ret = saa7146_register_device(&hexium->video_dev, dev, "hexium gemini", VFL_TYPE_GRABBER);
408 if (ret < 0) {
404 printk("hexium_gemini: cannot register capture v4l2 device. skipping.\n"); 409 printk("hexium_gemini: cannot register capture v4l2 device. skipping.\n");
405 return -1; 410 return ret;
406 } 411 }
407 412
408 printk("hexium_gemini: found 'hexium gemini' frame grabber-%d.\n", hexium_num); 413 printk("hexium_gemini: found 'hexium gemini' frame grabber-%d.\n", hexium_num);
diff --git a/drivers/media/video/hexium_orion.c b/drivers/media/video/hexium_orion.c
index 938a1f8f880a..fe596a1c12a8 100644
--- a/drivers/media/video/hexium_orion.c
+++ b/drivers/media/video/hexium_orion.c
@@ -216,6 +216,10 @@ static int hexium_probe(struct saa7146_dev *dev)
216 return -EFAULT; 216 return -EFAULT;
217 } 217 }
218 218
219 err = saa7146_vv_devinit(dev);
220 if (err)
221 return err;
222
219 hexium = kzalloc(sizeof(struct hexium), GFP_KERNEL); 223 hexium = kzalloc(sizeof(struct hexium), GFP_KERNEL);
220 if (NULL == hexium) { 224 if (NULL == hexium) {
221 printk("hexium_orion: hexium_probe: not enough kernel memory.\n"); 225 printk("hexium_orion: hexium_probe: not enough kernel memory.\n");
diff --git a/drivers/media/video/ir-kbd-i2c.c b/drivers/media/video/ir-kbd-i2c.c
index b86e35386cee..da18d698e7f2 100644
--- a/drivers/media/video/ir-kbd-i2c.c
+++ b/drivers/media/video/ir-kbd-i2c.c
@@ -299,7 +299,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
299{ 299{
300 struct ir_scancode_table *ir_codes = NULL; 300 struct ir_scancode_table *ir_codes = NULL;
301 const char *name = NULL; 301 const char *name = NULL;
302 int ir_type = 0; 302 u64 ir_type = 0;
303 struct IR_i2c *ir; 303 struct IR_i2c *ir;
304 struct input_dev *input_dev; 304 struct input_dev *input_dev;
305 struct i2c_adapter *adap = client->adapter; 305 struct i2c_adapter *adap = client->adapter;
@@ -331,6 +331,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
331 ir_codes = &ir_codes_pv951_table; 331 ir_codes = &ir_codes_pv951_table;
332 break; 332 break;
333 case 0x18: 333 case 0x18:
334 case 0x1f:
334 case 0x1a: 335 case 0x1a:
335 name = "Hauppauge"; 336 name = "Hauppauge";
336 ir->get_key = get_key_haup; 337 ir->get_key = get_key_haup;
@@ -446,7 +447,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
446 input_dev->name = ir->name; 447 input_dev->name = ir->name;
447 input_dev->phys = ir->phys; 448 input_dev->phys = ir->phys;
448 449
449 err = ir_input_register(ir->input, ir->ir_codes); 450 err = ir_input_register(ir->input, ir->ir_codes, NULL);
450 if (err) 451 if (err)
451 goto err_out_free; 452 goto err_out_free;
452 453
diff --git a/drivers/media/video/ivtv/ivtv-cards.c b/drivers/media/video/ivtv/ivtv-cards.c
index 79d0fe4990d6..ca1fd3227a93 100644
--- a/drivers/media/video/ivtv/ivtv-cards.c
+++ b/drivers/media/video/ivtv/ivtv-cards.c
@@ -1210,6 +1210,53 @@ static const struct ivtv_card ivtv_card_buffalo = {
1210 .i2c = &ivtv_i2c_std, 1210 .i2c = &ivtv_i2c_std,
1211}; 1211};
1212 1212
1213/* ------------------------------------------------------------------------- */
1214/* Sony Kikyou */
1215
1216static const struct ivtv_card_pci_info ivtv_pci_kikyou[] = {
1217 { PCI_DEVICE_ID_IVTV16, IVTV_PCI_ID_SONY, 0x813d },
1218 { 0, 0, 0 }
1219};
1220
1221static const struct ivtv_card ivtv_card_kikyou = {
1222 .type = IVTV_CARD_KIKYOU,
1223 .name = "Sony VAIO Giga Pocket (ENX Kikyou)",
1224 .v4l2_capabilities = IVTV_CAP_ENCODER,
1225 .hw_video = IVTV_HW_SAA7115,
1226 .hw_audio = IVTV_HW_GPIO,
1227 .hw_audio_ctrl = IVTV_HW_GPIO,
1228 .hw_all = IVTV_HW_GPIO | IVTV_HW_SAA7115 | IVTV_HW_TUNER,
1229 .video_inputs = {
1230 { IVTV_CARD_INPUT_VID_TUNER, 0, IVTV_SAA71XX_COMPOSITE1 },
1231 { IVTV_CARD_INPUT_COMPOSITE1, 1, IVTV_SAA71XX_COMPOSITE1 },
1232 { IVTV_CARD_INPUT_SVIDEO1, 1, IVTV_SAA71XX_SVIDEO1 },
1233 },
1234 .audio_inputs = {
1235 { IVTV_CARD_INPUT_AUD_TUNER, IVTV_GPIO_TUNER },
1236 { IVTV_CARD_INPUT_LINE_IN1, IVTV_GPIO_LINE_IN },
1237 { IVTV_CARD_INPUT_LINE_IN2, IVTV_GPIO_LINE_IN },
1238 },
1239 .gpio_init = { .direction = 0x03e1, .initial_value = 0x0320 },
1240 .gpio_audio_input = { .mask = 0x0060,
1241 .tuner = 0x0020,
1242 .linein = 0x0000,
1243 .radio = 0x0060 },
1244 .gpio_audio_mute = { .mask = 0x0000,
1245 .mute = 0x0000 }, /* 0x200? Disable for now. */
1246 .gpio_audio_mode = { .mask = 0x0080,
1247 .mono = 0x0000,
1248 .stereo = 0x0000, /* SAP */
1249 .lang1 = 0x0080,
1250 .lang2 = 0x0000,
1251 .both = 0x0080 },
1252 .tuners = {
1253 { .std = V4L2_STD_ALL, .tuner = TUNER_SONY_BTF_PXN01Z },
1254 },
1255 .pci_list = ivtv_pci_kikyou,
1256 .i2c = &ivtv_i2c_std,
1257};
1258
1259
1213static const struct ivtv_card *ivtv_card_list[] = { 1260static const struct ivtv_card *ivtv_card_list[] = {
1214 &ivtv_card_pvr250, 1261 &ivtv_card_pvr250,
1215 &ivtv_card_pvr350, 1262 &ivtv_card_pvr350,
@@ -1238,6 +1285,7 @@ static const struct ivtv_card *ivtv_card_list[] = {
1238 &ivtv_card_aver_m104, 1285 &ivtv_card_aver_m104,
1239 &ivtv_card_buffalo, 1286 &ivtv_card_buffalo,
1240 &ivtv_card_aver_ultra1500mce, 1287 &ivtv_card_aver_ultra1500mce,
1288 &ivtv_card_kikyou,
1241 1289
1242 /* Variations of standard cards but with the same PCI IDs. 1290 /* Variations of standard cards but with the same PCI IDs.
1243 These cards must come last in this list. */ 1291 These cards must come last in this list. */
diff --git a/drivers/media/video/ivtv/ivtv-cards.h b/drivers/media/video/ivtv/ivtv-cards.h
index 6148827ec885..78eca992e1fd 100644
--- a/drivers/media/video/ivtv/ivtv-cards.h
+++ b/drivers/media/video/ivtv/ivtv-cards.h
@@ -51,7 +51,8 @@
51#define IVTV_CARD_AVER_M104 24 /* AverMedia M104 miniPCI card */ 51#define IVTV_CARD_AVER_M104 24 /* AverMedia M104 miniPCI card */
52#define IVTV_CARD_BUFFALO_MV5L 25 /* Buffalo PC-MV5L/PCI card */ 52#define IVTV_CARD_BUFFALO_MV5L 25 /* Buffalo PC-MV5L/PCI card */
53#define IVTV_CARD_AVER_ULTRA1500MCE 26 /* AVerMedia UltraTV 1500 MCE */ 53#define IVTV_CARD_AVER_ULTRA1500MCE 26 /* AVerMedia UltraTV 1500 MCE */
54#define IVTV_CARD_LAST 26 54#define IVTV_CARD_KIKYOU 27 /* Sony VAIO Giga Pocket (ENX Kikyou) */
55#define IVTV_CARD_LAST 27
55 56
56/* Variants of existing cards but with the same PCI IDs. The driver 57/* Variants of existing cards but with the same PCI IDs. The driver
57 detects these based on other device information. 58 detects these based on other device information.
@@ -86,6 +87,7 @@
86#define IVTV_PCI_ID_MELCO 0x1154 87#define IVTV_PCI_ID_MELCO 0x1154
87#define IVTV_PCI_ID_GOTVIEW1 0xffac 88#define IVTV_PCI_ID_GOTVIEW1 0xffac
88#define IVTV_PCI_ID_GOTVIEW2 0xffad 89#define IVTV_PCI_ID_GOTVIEW2 0xffad
90#define IVTV_PCI_ID_SONY 0x104d
89 91
90/* hardware flags, no gaps allowed */ 92/* hardware flags, no gaps allowed */
91#define IVTV_HW_CX25840 (1 << 0) 93#define IVTV_HW_CX25840 (1 << 0)
diff --git a/drivers/media/video/ivtv/ivtv-driver.c b/drivers/media/video/ivtv/ivtv-driver.c
index 347c3344f56d..9a250548be4d 100644
--- a/drivers/media/video/ivtv/ivtv-driver.c
+++ b/drivers/media/video/ivtv/ivtv-driver.c
@@ -193,6 +193,7 @@ MODULE_PARM_DESC(cardtype,
193 "\t\t\t25 = AverMedia M104 (not yet working)\n" 193 "\t\t\t25 = AverMedia M104 (not yet working)\n"
194 "\t\t\t26 = Buffalo PC-MV5L/PCI\n" 194 "\t\t\t26 = Buffalo PC-MV5L/PCI\n"
195 "\t\t\t27 = AVerMedia UltraTV 1500 MCE\n" 195 "\t\t\t27 = AVerMedia UltraTV 1500 MCE\n"
196 "\t\t\t28 = Sony VAIO Giga Pocket (ENX Kikyou)\n"
196 "\t\t\t 0 = Autodetect (default)\n" 197 "\t\t\t 0 = Autodetect (default)\n"
197 "\t\t\t-1 = Ignore this card\n\t\t"); 198 "\t\t\t-1 = Ignore this card\n\t\t");
198MODULE_PARM_DESC(pal, "Set PAL standard: BGH, DK, I, M, N, Nc, 60"); 199MODULE_PARM_DESC(pal, "Set PAL standard: BGH, DK, I, M, N, Nc, 60");
diff --git a/drivers/media/video/ivtv/ivtv-firmware.c b/drivers/media/video/ivtv/ivtv-firmware.c
index c1b7ec475c27..a71e8ba306b0 100644
--- a/drivers/media/video/ivtv/ivtv-firmware.c
+++ b/drivers/media/video/ivtv/ivtv-firmware.c
@@ -258,7 +258,7 @@ void ivtv_init_mpeg_decoder(struct ivtv *itv)
258 IVTV_ERR("ivtv_init_mpeg_decoder failed to start playback\n"); 258 IVTV_ERR("ivtv_init_mpeg_decoder failed to start playback\n");
259 return; 259 return;
260 } 260 }
261 ivtv_api_get_data(&itv->dec_mbox, IVTV_MBOX_DMA, data); 261 ivtv_api_get_data(&itv->dec_mbox, IVTV_MBOX_DMA, 2, data);
262 mem_offset = itv->dec_mem + data[1]; 262 mem_offset = itv->dec_mem + data[1];
263 263
264 if ((readbytes = load_fw_direct(IVTV_DECODE_INIT_MPEG_FILENAME, 264 if ((readbytes = load_fw_direct(IVTV_DECODE_INIT_MPEG_FILENAME,
diff --git a/drivers/media/video/ivtv/ivtv-irq.c b/drivers/media/video/ivtv/ivtv-irq.c
index cd9db0bf33bf..12d36ca91d53 100644
--- a/drivers/media/video/ivtv/ivtv-irq.c
+++ b/drivers/media/video/ivtv/ivtv-irq.c
@@ -562,7 +562,7 @@ static void ivtv_irq_enc_dma_complete(struct ivtv *itv)
562 u32 data[CX2341X_MBOX_MAX_DATA]; 562 u32 data[CX2341X_MBOX_MAX_DATA];
563 struct ivtv_stream *s; 563 struct ivtv_stream *s;
564 564
565 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, data); 565 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, 2, data);
566 IVTV_DEBUG_HI_IRQ("ENC DMA COMPLETE %x %d (%d)\n", data[0], data[1], itv->cur_dma_stream); 566 IVTV_DEBUG_HI_IRQ("ENC DMA COMPLETE %x %d (%d)\n", data[0], data[1], itv->cur_dma_stream);
567 567
568 del_timer(&itv->dma_timer); 568 del_timer(&itv->dma_timer);
@@ -638,7 +638,7 @@ static void ivtv_irq_dma_err(struct ivtv *itv)
638 u32 data[CX2341X_MBOX_MAX_DATA]; 638 u32 data[CX2341X_MBOX_MAX_DATA];
639 639
640 del_timer(&itv->dma_timer); 640 del_timer(&itv->dma_timer);
641 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, data); 641 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, 2, data);
642 IVTV_DEBUG_WARN("DMA ERROR %08x %08x %08x %d\n", data[0], data[1], 642 IVTV_DEBUG_WARN("DMA ERROR %08x %08x %08x %d\n", data[0], data[1],
643 read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream); 643 read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream);
644 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); 644 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS);
@@ -669,7 +669,7 @@ static void ivtv_irq_enc_start_cap(struct ivtv *itv)
669 struct ivtv_stream *s; 669 struct ivtv_stream *s;
670 670
671 /* Get DMA destination and size arguments from card */ 671 /* Get DMA destination and size arguments from card */
672 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA, data); 672 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA, 7, data);
673 IVTV_DEBUG_HI_IRQ("ENC START CAP %d: %08x %08x\n", data[0], data[1], data[2]); 673 IVTV_DEBUG_HI_IRQ("ENC START CAP %d: %08x %08x\n", data[0], data[1], data[2]);
674 674
675 if (data[0] > 2 || data[1] == 0 || data[2] == 0) { 675 if (data[0] > 2 || data[1] == 0 || data[2] == 0) {
@@ -713,9 +713,9 @@ static void ivtv_irq_dec_data_req(struct ivtv *itv)
713 struct ivtv_stream *s; 713 struct ivtv_stream *s;
714 714
715 /* YUV or MPG */ 715 /* YUV or MPG */
716 ivtv_api_get_data(&itv->dec_mbox, IVTV_MBOX_DMA, data);
717 716
718 if (test_bit(IVTV_F_I_DEC_YUV, &itv->i_flags)) { 717 if (test_bit(IVTV_F_I_DEC_YUV, &itv->i_flags)) {
718 ivtv_api_get_data(&itv->dec_mbox, IVTV_MBOX_DMA, 2, data);
719 itv->dma_data_req_size = 719 itv->dma_data_req_size =
720 1080 * ((itv->yuv_info.v4l2_src_h + 31) & ~31); 720 1080 * ((itv->yuv_info.v4l2_src_h + 31) & ~31);
721 itv->dma_data_req_offset = data[1]; 721 itv->dma_data_req_offset = data[1];
@@ -724,6 +724,7 @@ static void ivtv_irq_dec_data_req(struct ivtv *itv)
724 s = &itv->streams[IVTV_DEC_STREAM_TYPE_YUV]; 724 s = &itv->streams[IVTV_DEC_STREAM_TYPE_YUV];
725 } 725 }
726 else { 726 else {
727 ivtv_api_get_data(&itv->dec_mbox, IVTV_MBOX_DMA, 3, data);
727 itv->dma_data_req_size = min_t(u32, data[2], 0x10000); 728 itv->dma_data_req_size = min_t(u32, data[2], 0x10000);
728 itv->dma_data_req_offset = data[1]; 729 itv->dma_data_req_offset = data[1];
729 s = &itv->streams[IVTV_DEC_STREAM_TYPE_MPG]; 730 s = &itv->streams[IVTV_DEC_STREAM_TYPE_MPG];
@@ -940,9 +941,10 @@ irqreturn_t ivtv_irq_handler(int irq, void *dev_id)
940 ivtv_dma_enc_start(s); 941 ivtv_dma_enc_start(s);
941 break; 942 break;
942 } 943 }
943 if (i == IVTV_MAX_STREAMS && test_and_clear_bit(IVTV_F_I_UDMA_PENDING, &itv->i_flags)) { 944
945 if (i == IVTV_MAX_STREAMS &&
946 test_bit(IVTV_F_I_UDMA_PENDING, &itv->i_flags))
944 ivtv_udma_start(itv); 947 ivtv_udma_start(itv);
945 }
946 } 948 }
947 949
948 if ((combo & IVTV_IRQ_DMA) && !test_bit(IVTV_F_I_PIO, &itv->i_flags)) { 950 if ((combo & IVTV_IRQ_DMA) && !test_bit(IVTV_F_I_PIO, &itv->i_flags)) {
diff --git a/drivers/media/video/ivtv/ivtv-mailbox.c b/drivers/media/video/ivtv/ivtv-mailbox.c
index 1b5c0ac09a85..84577f6f41a2 100644
--- a/drivers/media/video/ivtv/ivtv-mailbox.c
+++ b/drivers/media/video/ivtv/ivtv-mailbox.c
@@ -369,10 +369,11 @@ int ivtv_vapi(struct ivtv *itv, int cmd, int args, ...)
369} 369}
370 370
371/* This one is for stuff that can't sleep.. irq handlers, etc.. */ 371/* This one is for stuff that can't sleep.. irq handlers, etc.. */
372void ivtv_api_get_data(struct ivtv_mailbox_data *mbdata, int mb, u32 data[]) 372void ivtv_api_get_data(struct ivtv_mailbox_data *mbdata, int mb,
373 int argc, u32 data[])
373{ 374{
375 volatile u32 __iomem *p = mbdata->mbox[mb].data;
374 int i; 376 int i;
375 377 for (i = 0; i < argc; i++, p++)
376 for (i = 0; i < CX2341X_MBOX_MAX_DATA; i++) 378 data[i] = readl(p);
377 data[i] = readl(&mbdata->mbox[mb].data[i]);
378} 379}
diff --git a/drivers/media/video/ivtv/ivtv-mailbox.h b/drivers/media/video/ivtv/ivtv-mailbox.h
index 6ef12091e3f3..8247662c928e 100644
--- a/drivers/media/video/ivtv/ivtv-mailbox.h
+++ b/drivers/media/video/ivtv/ivtv-mailbox.h
@@ -24,7 +24,8 @@
24#define IVTV_MBOX_DMA_END 8 24#define IVTV_MBOX_DMA_END 8
25#define IVTV_MBOX_DMA 9 25#define IVTV_MBOX_DMA 9
26 26
27void ivtv_api_get_data(struct ivtv_mailbox_data *mbox, int mb, u32 data[]); 27void ivtv_api_get_data(struct ivtv_mailbox_data *mbdata, int mb,
28 int argc, u32 data[]);
28int ivtv_api(struct ivtv *itv, int cmd, int args, u32 data[]); 29int ivtv_api(struct ivtv *itv, int cmd, int args, u32 data[]);
29int ivtv_vapi_result(struct ivtv *itv, u32 data[CX2341X_MBOX_MAX_DATA], int cmd, int args, ...); 30int ivtv_vapi_result(struct ivtv *itv, u32 data[CX2341X_MBOX_MAX_DATA], int cmd, int args, ...);
30int ivtv_vapi(struct ivtv *itv, int cmd, int args, ...); 31int ivtv_vapi(struct ivtv *itv, int cmd, int args, ...);
diff --git a/drivers/media/video/ivtv/ivtv-streams.c b/drivers/media/video/ivtv/ivtv-streams.c
index e12c6022373e..1f9387f6ca24 100644
--- a/drivers/media/video/ivtv/ivtv-streams.c
+++ b/drivers/media/video/ivtv/ivtv-streams.c
@@ -577,10 +577,14 @@ int ivtv_start_v4l2_encode_stream(struct ivtv_stream *s)
577 clear_bit(IVTV_F_I_EOS, &itv->i_flags); 577 clear_bit(IVTV_F_I_EOS, &itv->i_flags);
578 578
579 /* Initialize Digitizer for Capture */ 579 /* Initialize Digitizer for Capture */
580 /* Avoid tinny audio problem - ensure audio clocks are going */
581 v4l2_subdev_call(itv->sd_audio, audio, s_stream, 1);
582 /* Avoid unpredictable PCI bus hang - disable video clocks */
580 v4l2_subdev_call(itv->sd_video, video, s_stream, 0); 583 v4l2_subdev_call(itv->sd_video, video, s_stream, 0);
581 ivtv_msleep_timeout(300, 1); 584 ivtv_msleep_timeout(150, 1);
582 ivtv_vapi(itv, CX2341X_ENC_INITIALIZE_INPUT, 0); 585 ivtv_vapi(itv, CX2341X_ENC_INITIALIZE_INPUT, 0);
583 v4l2_subdev_call(itv->sd_video, video, s_stream, 1); 586 v4l2_subdev_call(itv->sd_video, video, s_stream, 1);
587 ivtv_msleep_timeout(150, 1);
584 } 588 }
585 589
586 /* begin_capture */ 590 /* begin_capture */
diff --git a/drivers/media/video/ivtv/ivtv-udma.c b/drivers/media/video/ivtv/ivtv-udma.c
index d07ad6c39024..1daf1dd65bf7 100644
--- a/drivers/media/video/ivtv/ivtv-udma.c
+++ b/drivers/media/video/ivtv/ivtv-udma.c
@@ -213,6 +213,7 @@ void ivtv_udma_start(struct ivtv *itv)
213 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER); 213 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER);
214 set_bit(IVTV_F_I_DMA, &itv->i_flags); 214 set_bit(IVTV_F_I_DMA, &itv->i_flags);
215 set_bit(IVTV_F_I_UDMA, &itv->i_flags); 215 set_bit(IVTV_F_I_UDMA, &itv->i_flags);
216 clear_bit(IVTV_F_I_UDMA_PENDING, &itv->i_flags);
216} 217}
217 218
218void ivtv_udma_prepare(struct ivtv *itv) 219void ivtv_udma_prepare(struct ivtv *itv)
diff --git a/drivers/media/video/mt9v022.c b/drivers/media/video/mt9v022.c
index 91df7ec91fb6..1a34d2993e94 100644
--- a/drivers/media/video/mt9v022.c
+++ b/drivers/media/video/mt9v022.c
@@ -257,19 +257,18 @@ static int mt9v022_set_bus_param(struct soc_camera_device *icd,
257static unsigned long mt9v022_query_bus_param(struct soc_camera_device *icd) 257static unsigned long mt9v022_query_bus_param(struct soc_camera_device *icd)
258{ 258{
259 struct soc_camera_link *icl = to_soc_camera_link(icd); 259 struct soc_camera_link *icl = to_soc_camera_link(icd);
260 unsigned int width_flag; 260 unsigned int flags = SOCAM_MASTER | SOCAM_SLAVE |
261 SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING |
262 SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_LOW |
263 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |
264 SOCAM_DATA_ACTIVE_HIGH;
261 265
262 if (icl->query_bus_param) 266 if (icl->query_bus_param)
263 width_flag = icl->query_bus_param(icl) & 267 flags |= icl->query_bus_param(icl) & SOCAM_DATAWIDTH_MASK;
264 SOCAM_DATAWIDTH_MASK;
265 else 268 else
266 width_flag = SOCAM_DATAWIDTH_10; 269 flags |= SOCAM_DATAWIDTH_10;
267 270
268 return SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | 271 return soc_camera_apply_sensor_flags(icl, flags);
269 SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_LOW |
270 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |
271 SOCAM_DATA_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_SLAVE |
272 width_flag;
273} 272}
274 273
275static int mt9v022_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) 274static int mt9v022_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
diff --git a/drivers/media/video/mxb.c b/drivers/media/video/mxb.c
index c1fc6dc776f5..9f01f14e4aa2 100644
--- a/drivers/media/video/mxb.c
+++ b/drivers/media/video/mxb.c
@@ -169,7 +169,11 @@ static struct saa7146_extension extension;
169static int mxb_probe(struct saa7146_dev *dev) 169static int mxb_probe(struct saa7146_dev *dev)
170{ 170{
171 struct mxb *mxb = NULL; 171 struct mxb *mxb = NULL;
172 int err;
172 173
174 err = saa7146_vv_devinit(dev);
175 if (err)
176 return err;
173 mxb = kzalloc(sizeof(struct mxb), GFP_KERNEL); 177 mxb = kzalloc(sizeof(struct mxb), GFP_KERNEL);
174 if (mxb == NULL) { 178 if (mxb == NULL) {
175 DEB_D(("not enough kernel memory.\n")); 179 DEB_D(("not enough kernel memory.\n"));
@@ -294,7 +298,7 @@ static int mxb_init_done(struct saa7146_dev* dev)
294 /* select tuner-output on saa7111a */ 298 /* select tuner-output on saa7111a */
295 i = 0; 299 i = 0;
296 saa7111a_call(mxb, video, s_routing, SAA7115_COMPOSITE0, 300 saa7111a_call(mxb, video, s_routing, SAA7115_COMPOSITE0,
297 SAA7111_FMT_CCIR | SAA7111_VBI_BYPASS, 0); 301 SAA7111_FMT_CCIR, 0);
298 302
299 /* select a tuner type */ 303 /* select a tuner type */
300 tun_setup.mode_mask = T_ANALOG_TV; 304 tun_setup.mode_mask = T_ANALOG_TV;
@@ -518,8 +522,8 @@ static int vidioc_s_input(struct file *file, void *fh, unsigned int input)
518 return err; 522 return err;
519 523
520 /* switch video in saa7111a */ 524 /* switch video in saa7111a */
521 if (saa7111a_call(mxb, video, s_routing, i, 0, 0)) 525 if (saa7111a_call(mxb, video, s_routing, i, SAA7111_FMT_CCIR, 0))
522 printk(KERN_ERR "VIDIOC_S_INPUT: could not address saa7111a #1.\n"); 526 printk(KERN_ERR "VIDIOC_S_INPUT: could not address saa7111a.\n");
523 527
524 /* switch the audio-source only if necessary */ 528 /* switch the audio-source only if necessary */
525 if (0 == mxb->cur_mute) 529 if (0 == mxb->cur_mute)
diff --git a/drivers/media/video/ov772x.c b/drivers/media/video/ov772x.c
index 3a45e945a528..7f8ece30c77b 100644
--- a/drivers/media/video/ov772x.c
+++ b/drivers/media/video/ov772x.c
@@ -547,7 +547,6 @@ static const struct v4l2_queryctrl ov772x_controls[] = {
547 }, 547 },
548}; 548};
549 549
550
551/* 550/*
552 * general function 551 * general function
553 */ 552 */
@@ -634,7 +633,12 @@ static unsigned long ov772x_query_bus_param(struct soc_camera_device *icd)
634 struct soc_camera_link *icl = to_soc_camera_link(icd); 633 struct soc_camera_link *icl = to_soc_camera_link(icd);
635 unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER | 634 unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
636 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH | 635 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
637 SOCAM_DATA_ACTIVE_HIGH | priv->info->buswidth; 636 SOCAM_DATA_ACTIVE_HIGH;
637
638 if (priv->info->flags & OV772X_FLAG_8BIT)
639 flags |= SOCAM_DATAWIDTH_8;
640 else
641 flags |= SOCAM_DATAWIDTH_10;
638 642
639 return soc_camera_apply_sensor_flags(icl, flags); 643 return soc_camera_apply_sensor_flags(icl, flags);
640} 644}
@@ -1040,15 +1044,6 @@ static int ov772x_video_probe(struct soc_camera_device *icd,
1040 return -ENODEV; 1044 return -ENODEV;
1041 1045
1042 /* 1046 /*
1043 * ov772x only use 8 or 10 bit bus width
1044 */
1045 if (SOCAM_DATAWIDTH_10 != priv->info->buswidth &&
1046 SOCAM_DATAWIDTH_8 != priv->info->buswidth) {
1047 dev_err(&client->dev, "bus width error\n");
1048 return -ENODEV;
1049 }
1050
1051 /*
1052 * check and show product ID and manufacturer ID 1047 * check and show product ID and manufacturer ID
1053 */ 1048 */
1054 pid = i2c_smbus_read_byte_data(client, PID); 1049 pid = i2c_smbus_read_byte_data(client, PID);
@@ -1130,7 +1125,6 @@ static int ov772x_probe(struct i2c_client *client,
1130 const struct i2c_device_id *did) 1125 const struct i2c_device_id *did)
1131{ 1126{
1132 struct ov772x_priv *priv; 1127 struct ov772x_priv *priv;
1133 struct ov772x_camera_info *info;
1134 struct soc_camera_device *icd = client->dev.platform_data; 1128 struct soc_camera_device *icd = client->dev.platform_data;
1135 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 1129 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1136 struct soc_camera_link *icl; 1130 struct soc_camera_link *icl;
@@ -1145,8 +1139,6 @@ static int ov772x_probe(struct i2c_client *client,
1145 if (!icl || !icl->priv) 1139 if (!icl || !icl->priv)
1146 return -EINVAL; 1140 return -EINVAL;
1147 1141
1148 info = icl->priv;
1149
1150 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { 1142 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1151 dev_err(&adapter->dev, 1143 dev_err(&adapter->dev,
1152 "I2C-Adapter doesn't support " 1144 "I2C-Adapter doesn't support "
@@ -1158,7 +1150,7 @@ static int ov772x_probe(struct i2c_client *client,
1158 if (!priv) 1150 if (!priv)
1159 return -ENOMEM; 1151 return -ENOMEM;
1160 1152
1161 priv->info = info; 1153 priv->info = icl->priv;
1162 1154
1163 v4l2_i2c_subdev_init(&priv->subdev, client, &ov772x_subdev_ops); 1155 v4l2_i2c_subdev_init(&priv->subdev, client, &ov772x_subdev_ops);
1164 1156
diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h b/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h
index de5485f506b1..cb4057bb07a0 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h
+++ b/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h
@@ -233,8 +233,9 @@ struct pvr2_hdw {
233 int state_encoder_waitok; /* Encoder pre-wait done */ 233 int state_encoder_waitok; /* Encoder pre-wait done */
234 int state_encoder_runok; /* Encoder has run for >= .25 sec */ 234 int state_encoder_runok; /* Encoder has run for >= .25 sec */
235 int state_decoder_run; /* Decoder is running */ 235 int state_decoder_run; /* Decoder is running */
236 int state_decoder_ready; /* Decoder is stabilized & streamable */
236 int state_usbstream_run; /* FX2 is streaming */ 237 int state_usbstream_run; /* FX2 is streaming */
237 int state_decoder_quiescent; /* Decoder idle for > 50msec */ 238 int state_decoder_quiescent; /* Decoder idle for minimal interval */
238 int state_pipeline_config; /* Pipeline is configured */ 239 int state_pipeline_config; /* Pipeline is configured */
239 int state_pipeline_req; /* Somebody wants to stream */ 240 int state_pipeline_req; /* Somebody wants to stream */
240 int state_pipeline_pause; /* Pipeline must be paused */ 241 int state_pipeline_pause; /* Pipeline must be paused */
@@ -255,9 +256,16 @@ struct pvr2_hdw {
255 void (*state_func)(void *); 256 void (*state_func)(void *);
256 void *state_data; 257 void *state_data;
257 258
258 /* Timer for measuring decoder settling time */ 259 /* Timer for measuring required decoder settling time before we're
260 allowed to fire it up again. */
259 struct timer_list quiescent_timer; 261 struct timer_list quiescent_timer;
260 262
263 /* Timer for measuring decoder stabilization time, which is the
264 amount of time we need to let the decoder run before we can
265 trust its output (otherwise the encoder might see garbage and
266 then fail to start correctly). */
267 struct timer_list decoder_stabilization_timer;
268
261 /* Timer for measuring encoder pre-wait time */ 269 /* Timer for measuring encoder pre-wait time */
262 struct timer_list encoder_wait_timer; 270 struct timer_list encoder_wait_timer;
263 271
diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw.c b/drivers/media/video/pvrusb2/pvrusb2-hdw.c
index 1bbdab08fe0e..712b300f723f 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-hdw.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-hdw.c
@@ -48,11 +48,13 @@
48 before we are allowed to start it running. */ 48 before we are allowed to start it running. */
49#define TIME_MSEC_DECODER_WAIT 50 49#define TIME_MSEC_DECODER_WAIT 50
50 50
51/* This defines a minimum interval that the decoder must be allowed to run
52 before we can safely begin using its streaming output. */
53#define TIME_MSEC_DECODER_STABILIZATION_WAIT 300
54
51/* This defines a minimum interval that the encoder must remain quiet 55/* This defines a minimum interval that the encoder must remain quiet
52 before we are allowed to configure it. I had this originally set to 56 before we are allowed to configure it. */
53 50msec, but Martin Dauskardt <martin.dauskardt@gmx.de> reports that 57#define TIME_MSEC_ENCODER_WAIT 50
54 things work better when it's set to 100msec. */
55#define TIME_MSEC_ENCODER_WAIT 100
56 58
57/* This defines the minimum interval that the encoder must successfully run 59/* This defines the minimum interval that the encoder must successfully run
58 before we consider that the encoder has run at least once since its 60 before we consider that the encoder has run at least once since its
@@ -334,6 +336,7 @@ static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw);
334static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw); 336static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw);
335static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw); 337static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw);
336static void pvr2_hdw_quiescent_timeout(unsigned long); 338static void pvr2_hdw_quiescent_timeout(unsigned long);
339static void pvr2_hdw_decoder_stabilization_timeout(unsigned long);
337static void pvr2_hdw_encoder_wait_timeout(unsigned long); 340static void pvr2_hdw_encoder_wait_timeout(unsigned long);
338static void pvr2_hdw_encoder_run_timeout(unsigned long); 341static void pvr2_hdw_encoder_run_timeout(unsigned long);
339static int pvr2_issue_simple_cmd(struct pvr2_hdw *,u32); 342static int pvr2_issue_simple_cmd(struct pvr2_hdw *,u32);
@@ -1705,6 +1708,7 @@ static int pvr2_decoder_enable(struct pvr2_hdw *hdw,int enablefl)
1705 pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 stream=%s", 1708 pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 stream=%s",
1706 (enablefl ? "on" : "off")); 1709 (enablefl ? "on" : "off"));
1707 v4l2_device_call_all(&hdw->v4l2_dev, 0, video, s_stream, enablefl); 1710 v4l2_device_call_all(&hdw->v4l2_dev, 0, video, s_stream, enablefl);
1711 v4l2_device_call_all(&hdw->v4l2_dev, 0, audio, s_stream, enablefl);
1708 if (hdw->decoder_client_id) { 1712 if (hdw->decoder_client_id) {
1709 /* We get here if the encoder has been noticed. Otherwise 1713 /* We get here if the encoder has been noticed. Otherwise
1710 we'll issue a warning to the user (which should 1714 we'll issue a warning to the user (which should
@@ -2461,6 +2465,11 @@ struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,
2461 hdw->quiescent_timer.data = (unsigned long)hdw; 2465 hdw->quiescent_timer.data = (unsigned long)hdw;
2462 hdw->quiescent_timer.function = pvr2_hdw_quiescent_timeout; 2466 hdw->quiescent_timer.function = pvr2_hdw_quiescent_timeout;
2463 2467
2468 init_timer(&hdw->decoder_stabilization_timer);
2469 hdw->decoder_stabilization_timer.data = (unsigned long)hdw;
2470 hdw->decoder_stabilization_timer.function =
2471 pvr2_hdw_decoder_stabilization_timeout;
2472
2464 init_timer(&hdw->encoder_wait_timer); 2473 init_timer(&hdw->encoder_wait_timer);
2465 hdw->encoder_wait_timer.data = (unsigned long)hdw; 2474 hdw->encoder_wait_timer.data = (unsigned long)hdw;
2466 hdw->encoder_wait_timer.function = pvr2_hdw_encoder_wait_timeout; 2475 hdw->encoder_wait_timer.function = pvr2_hdw_encoder_wait_timeout;
@@ -2674,6 +2683,7 @@ struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,
2674 fail: 2683 fail:
2675 if (hdw) { 2684 if (hdw) {
2676 del_timer_sync(&hdw->quiescent_timer); 2685 del_timer_sync(&hdw->quiescent_timer);
2686 del_timer_sync(&hdw->decoder_stabilization_timer);
2677 del_timer_sync(&hdw->encoder_run_timer); 2687 del_timer_sync(&hdw->encoder_run_timer);
2678 del_timer_sync(&hdw->encoder_wait_timer); 2688 del_timer_sync(&hdw->encoder_wait_timer);
2679 if (hdw->workqueue) { 2689 if (hdw->workqueue) {
@@ -2741,6 +2751,7 @@ void pvr2_hdw_destroy(struct pvr2_hdw *hdw)
2741 hdw->workqueue = NULL; 2751 hdw->workqueue = NULL;
2742 } 2752 }
2743 del_timer_sync(&hdw->quiescent_timer); 2753 del_timer_sync(&hdw->quiescent_timer);
2754 del_timer_sync(&hdw->decoder_stabilization_timer);
2744 del_timer_sync(&hdw->encoder_run_timer); 2755 del_timer_sync(&hdw->encoder_run_timer);
2745 del_timer_sync(&hdw->encoder_wait_timer); 2756 del_timer_sync(&hdw->encoder_wait_timer);
2746 if (hdw->fw_buffer) { 2757 if (hdw->fw_buffer) {
@@ -4452,7 +4463,7 @@ static int state_check_enable_encoder_run(struct pvr2_hdw *hdw)
4452 4463
4453 switch (hdw->pathway_state) { 4464 switch (hdw->pathway_state) {
4454 case PVR2_PATHWAY_ANALOG: 4465 case PVR2_PATHWAY_ANALOG:
4455 if (hdw->state_decoder_run) { 4466 if (hdw->state_decoder_run && hdw->state_decoder_ready) {
4456 /* In analog mode, if the decoder is running, then 4467 /* In analog mode, if the decoder is running, then
4457 run the encoder. */ 4468 run the encoder. */
4458 return !0; 4469 return !0;
@@ -4519,6 +4530,17 @@ static void pvr2_hdw_quiescent_timeout(unsigned long data)
4519} 4530}
4520 4531
4521 4532
4533/* Timeout function for decoder stabilization timer. */
4534static void pvr2_hdw_decoder_stabilization_timeout(unsigned long data)
4535{
4536 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
4537 hdw->state_decoder_ready = !0;
4538 trace_stbit("state_decoder_ready", hdw->state_decoder_ready);
4539 hdw->state_stale = !0;
4540 queue_work(hdw->workqueue, &hdw->workpoll);
4541}
4542
4543
4522/* Timeout function for encoder wait timer. */ 4544/* Timeout function for encoder wait timer. */
4523static void pvr2_hdw_encoder_wait_timeout(unsigned long data) 4545static void pvr2_hdw_encoder_wait_timeout(unsigned long data)
4524{ 4546{
@@ -4557,8 +4579,13 @@ static int state_eval_decoder_run(struct pvr2_hdw *hdw)
4557 } 4579 }
4558 hdw->state_decoder_quiescent = 0; 4580 hdw->state_decoder_quiescent = 0;
4559 hdw->state_decoder_run = 0; 4581 hdw->state_decoder_run = 0;
4560 /* paranoia - solve race if timer just completed */ 4582 /* paranoia - solve race if timer(s) just completed */
4561 del_timer_sync(&hdw->quiescent_timer); 4583 del_timer_sync(&hdw->quiescent_timer);
4584 /* Kill the stabilization timer, in case we're killing the
4585 encoder before the previous stabilization interval has
4586 been properly timed. */
4587 del_timer_sync(&hdw->decoder_stabilization_timer);
4588 hdw->state_decoder_ready = 0;
4562 } else { 4589 } else {
4563 if (!hdw->state_decoder_quiescent) { 4590 if (!hdw->state_decoder_quiescent) {
4564 if (!timer_pending(&hdw->quiescent_timer)) { 4591 if (!timer_pending(&hdw->quiescent_timer)) {
@@ -4596,10 +4623,21 @@ static int state_eval_decoder_run(struct pvr2_hdw *hdw)
4596 if (hdw->flag_decoder_missed) return 0; 4623 if (hdw->flag_decoder_missed) return 0;
4597 if (pvr2_decoder_enable(hdw,!0) < 0) return 0; 4624 if (pvr2_decoder_enable(hdw,!0) < 0) return 0;
4598 hdw->state_decoder_quiescent = 0; 4625 hdw->state_decoder_quiescent = 0;
4626 hdw->state_decoder_ready = 0;
4599 hdw->state_decoder_run = !0; 4627 hdw->state_decoder_run = !0;
4628 if (hdw->decoder_client_id == PVR2_CLIENT_ID_SAA7115) {
4629 hdw->decoder_stabilization_timer.expires =
4630 jiffies +
4631 (HZ * TIME_MSEC_DECODER_STABILIZATION_WAIT /
4632 1000);
4633 add_timer(&hdw->decoder_stabilization_timer);
4634 } else {
4635 hdw->state_decoder_ready = !0;
4636 }
4600 } 4637 }
4601 trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent); 4638 trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent);
4602 trace_stbit("state_decoder_run",hdw->state_decoder_run); 4639 trace_stbit("state_decoder_run",hdw->state_decoder_run);
4640 trace_stbit("state_decoder_ready", hdw->state_decoder_ready);
4603 return !0; 4641 return !0;
4604} 4642}
4605 4643
@@ -4797,7 +4835,8 @@ static unsigned int pvr2_hdw_report_unlocked(struct pvr2_hdw *hdw,int which,
4797 buf,acnt, 4835 buf,acnt,
4798 "worker:%s%s%s%s%s%s%s", 4836 "worker:%s%s%s%s%s%s%s",
4799 (hdw->state_decoder_run ? 4837 (hdw->state_decoder_run ?
4800 " <decode:run>" : 4838 (hdw->state_decoder_ready ?
4839 "<decode:run>" : " <decode:start>") :
4801 (hdw->state_decoder_quiescent ? 4840 (hdw->state_decoder_quiescent ?
4802 "" : " <decode:stop>")), 4841 "" : " <decode:stop>")),
4803 (hdw->state_decoder_quiescent ? 4842 (hdw->state_decoder_quiescent ?
diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw.h b/drivers/media/video/pvrusb2/pvrusb2-hdw.h
index 56e70eae20c1..51d3009ab57f 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-hdw.h
+++ b/drivers/media/video/pvrusb2/pvrusb2-hdw.h
@@ -306,6 +306,7 @@ struct pvr2_hdw_debug_info {
306 int state_encoder_ok; 306 int state_encoder_ok;
307 int state_encoder_run; 307 int state_encoder_run;
308 int state_decoder_run; 308 int state_decoder_run;
309 int state_decoder_ready;
309 int state_usbstream_run; 310 int state_usbstream_run;
310 int state_decoder_quiescent; 311 int state_decoder_quiescent;
311 int state_pipeline_config; 312 int state_pipeline_config;
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c
index 294f860ce2b0..322ac4eecf0a 100644
--- a/drivers/media/video/pxa_camera.c
+++ b/drivers/media/video/pxa_camera.c
@@ -898,18 +898,8 @@ static void recalculate_fifo_timeout(struct pxa_camera_dev *pcdev,
898 898
899static void pxa_camera_activate(struct pxa_camera_dev *pcdev) 899static void pxa_camera_activate(struct pxa_camera_dev *pcdev)
900{ 900{
901 struct pxacamera_platform_data *pdata = pcdev->pdata;
902 struct device *dev = pcdev->soc_host.v4l2_dev.dev;
903 u32 cicr4 = 0; 901 u32 cicr4 = 0;
904 902
905 dev_dbg(dev, "Registered platform device at %p data %p\n",
906 pcdev, pdata);
907
908 if (pdata && pdata->init) {
909 dev_dbg(dev, "%s: Init gpios\n", __func__);
910 pdata->init(dev);
911 }
912
913 /* disable all interrupts */ 903 /* disable all interrupts */
914 __raw_writel(0x3ff, pcdev->base + CICR0); 904 __raw_writel(0x3ff, pcdev->base + CICR0);
915 905
diff --git a/drivers/media/video/rj54n1cb0c.c b/drivers/media/video/rj54n1cb0c.c
index 805226e0d9c1..9277194cd821 100644
--- a/drivers/media/video/rj54n1cb0c.c
+++ b/drivers/media/video/rj54n1cb0c.c
@@ -165,7 +165,7 @@ struct rj54n1_reg_val {
165 u8 val; 165 u8 val;
166}; 166};
167 167
168const static struct rj54n1_reg_val bank_4[] = { 168static const struct rj54n1_reg_val bank_4[] = {
169 {0x417, 0}, 169 {0x417, 0},
170 {0x42c, 0}, 170 {0x42c, 0},
171 {0x42d, 0xf0}, 171 {0x42d, 0xf0},
@@ -186,7 +186,7 @@ const static struct rj54n1_reg_val bank_4[] = {
186 {0x4fe, 2}, 186 {0x4fe, 2},
187}; 187};
188 188
189const static struct rj54n1_reg_val bank_5[] = { 189static const struct rj54n1_reg_val bank_5[] = {
190 {0x514, 0}, 190 {0x514, 0},
191 {0x516, 0}, 191 {0x516, 0},
192 {0x518, 0}, 192 {0x518, 0},
@@ -207,7 +207,7 @@ const static struct rj54n1_reg_val bank_5[] = {
207 {0x5fe, 2}, 207 {0x5fe, 2},
208}; 208};
209 209
210const static struct rj54n1_reg_val bank_7[] = { 210static const struct rj54n1_reg_val bank_7[] = {
211 {0x70a, 0}, 211 {0x70a, 0},
212 {0x714, 0xff}, 212 {0x714, 0xff},
213 {0x715, 0xff}, 213 {0x715, 0xff},
@@ -215,7 +215,7 @@ const static struct rj54n1_reg_val bank_7[] = {
215 {0x7FE, 2}, 215 {0x7FE, 2},
216}; 216};
217 217
218const static struct rj54n1_reg_val bank_8[] = { 218static const struct rj54n1_reg_val bank_8[] = {
219 {0x800, 0x00}, 219 {0x800, 0x00},
220 {0x801, 0x01}, 220 {0x801, 0x01},
221 {0x802, 0x61}, 221 {0x802, 0x61},
@@ -403,12 +403,12 @@ const static struct rj54n1_reg_val bank_8[] = {
403 {0x8FE, 2}, 403 {0x8FE, 2},
404}; 404};
405 405
406const static struct rj54n1_reg_val bank_10[] = { 406static const struct rj54n1_reg_val bank_10[] = {
407 {0x10bf, 0x69} 407 {0x10bf, 0x69}
408}; 408};
409 409
410/* Clock dividers - these are default register values, divider = register + 1 */ 410/* Clock dividers - these are default register values, divider = register + 1 */
411const static struct rj54n1_clock_div clk_div = { 411static const struct rj54n1_clock_div clk_div = {
412 .ratio_tg = 3 /* default: 5 */, 412 .ratio_tg = 3 /* default: 5 */,
413 .ratio_t = 4 /* default: 1 */, 413 .ratio_t = 4 /* default: 1 */,
414 .ratio_r = 4 /* default: 0 */, 414 .ratio_r = 4 /* default: 0 */,
diff --git a/drivers/media/video/saa7115.c b/drivers/media/video/saa7115.c
index 44873a016c2c..c0a7f8a369f4 100644
--- a/drivers/media/video/saa7115.c
+++ b/drivers/media/video/saa7115.c
@@ -104,6 +104,10 @@ static int saa711x_has_reg(const int id, const u8 reg)
104 if (id == V4L2_IDENT_SAA7111) 104 if (id == V4L2_IDENT_SAA7111)
105 return reg < 0x20 && reg != 0x01 && reg != 0x0f && 105 return reg < 0x20 && reg != 0x01 && reg != 0x0f &&
106 (reg < 0x13 || reg > 0x19) && reg != 0x1d && reg != 0x1e; 106 (reg < 0x13 || reg > 0x19) && reg != 0x1d && reg != 0x1e;
107 if (id == V4L2_IDENT_SAA7111A)
108 return reg < 0x20 && reg != 0x01 && reg != 0x0f &&
109 reg != 0x14 && reg != 0x18 && reg != 0x19 &&
110 reg != 0x1d && reg != 0x1e;
107 111
108 /* common for saa7113/4/5/8 */ 112 /* common for saa7113/4/5/8 */
109 if (unlikely((reg >= 0x3b && reg <= 0x3f) || reg == 0x5c || reg == 0x5f || 113 if (unlikely((reg >= 0x3b && reg <= 0x3f) || reg == 0x5c || reg == 0x5f ||
@@ -954,8 +958,7 @@ static void saa711x_set_v4lstd(struct v4l2_subdev *sd, v4l2_std_id std)
954 011 NTSC N (3.58MHz) PAL M (3.58MHz) 958 011 NTSC N (3.58MHz) PAL M (3.58MHz)
955 100 reserved NTSC-Japan (3.58MHz) 959 100 reserved NTSC-Japan (3.58MHz)
956 */ 960 */
957 if (state->ident == V4L2_IDENT_SAA7111 || 961 if (state->ident <= V4L2_IDENT_SAA7113) {
958 state->ident == V4L2_IDENT_SAA7113) {
959 u8 reg = saa711x_read(sd, R_0E_CHROMA_CNTL_1) & 0x8f; 962 u8 reg = saa711x_read(sd, R_0E_CHROMA_CNTL_1) & 0x8f;
960 963
961 if (std == V4L2_STD_PAL_M) { 964 if (std == V4L2_STD_PAL_M) {
@@ -1232,22 +1235,19 @@ static int saa711x_s_routing(struct v4l2_subdev *sd,
1232 u32 input, u32 output, u32 config) 1235 u32 input, u32 output, u32 config)
1233{ 1236{
1234 struct saa711x_state *state = to_state(sd); 1237 struct saa711x_state *state = to_state(sd);
1235 u8 mask = (state->ident == V4L2_IDENT_SAA7111) ? 0xf8 : 0xf0; 1238 u8 mask = (state->ident <= V4L2_IDENT_SAA7111A) ? 0xf8 : 0xf0;
1236 1239
1237 v4l2_dbg(1, debug, sd, "decoder set input %d output %d\n", 1240 v4l2_dbg(1, debug, sd, "decoder set input %d output %d\n",
1238 input, output); 1241 input, output);
1239 1242
1240 /* saa7111/3 does not have these inputs */ 1243 /* saa7111/3 does not have these inputs */
1241 if ((state->ident == V4L2_IDENT_SAA7113 || 1244 if (state->ident <= V4L2_IDENT_SAA7113 &&
1242 state->ident == V4L2_IDENT_SAA7111) &&
1243 (input == SAA7115_COMPOSITE4 || 1245 (input == SAA7115_COMPOSITE4 ||
1244 input == SAA7115_COMPOSITE5)) { 1246 input == SAA7115_COMPOSITE5)) {
1245 return -EINVAL; 1247 return -EINVAL;
1246 } 1248 }
1247 if (input > SAA7115_SVIDEO3) 1249 if (input > SAA7115_SVIDEO3)
1248 return -EINVAL; 1250 return -EINVAL;
1249 if (output > SAA7115_IPORT_ON)
1250 return -EINVAL;
1251 if (state->input == input && state->output == output) 1251 if (state->input == input && state->output == output)
1252 return 0; 1252 return 0;
1253 v4l2_dbg(1, debug, sd, "now setting %s input %s output\n", 1253 v4l2_dbg(1, debug, sd, "now setting %s input %s output\n",
@@ -1256,7 +1256,7 @@ static int saa711x_s_routing(struct v4l2_subdev *sd,
1256 state->input = input; 1256 state->input = input;
1257 1257
1258 /* saa7111 has slightly different input numbering */ 1258 /* saa7111 has slightly different input numbering */
1259 if (state->ident == V4L2_IDENT_SAA7111) { 1259 if (state->ident <= V4L2_IDENT_SAA7111A) {
1260 if (input >= SAA7115_COMPOSITE4) 1260 if (input >= SAA7115_COMPOSITE4)
1261 input -= 2; 1261 input -= 2;
1262 /* saa7111 specific */ 1262 /* saa7111 specific */
@@ -1292,7 +1292,7 @@ static int saa711x_s_gpio(struct v4l2_subdev *sd, u32 val)
1292{ 1292{
1293 struct saa711x_state *state = to_state(sd); 1293 struct saa711x_state *state = to_state(sd);
1294 1294
1295 if (state->ident != V4L2_IDENT_SAA7111) 1295 if (state->ident > V4L2_IDENT_SAA7111A)
1296 return -EINVAL; 1296 return -EINVAL;
1297 saa711x_write(sd, 0x11, (saa711x_read(sd, 0x11) & 0x7f) | 1297 saa711x_write(sd, 0x11, (saa711x_read(sd, 0x11) & 0x7f) |
1298 (val ? 0x80 : 0)); 1298 (val ? 0x80 : 0));
@@ -1596,6 +1596,10 @@ static int saa711x_probe(struct i2c_client *client,
1596 switch (chip_id) { 1596 switch (chip_id) {
1597 case '1': 1597 case '1':
1598 state->ident = V4L2_IDENT_SAA7111; 1598 state->ident = V4L2_IDENT_SAA7111;
1599 if (saa711x_read(sd, R_00_CHIP_VERSION) & 0xf0) {
1600 v4l_info(client, "saa7111a variant found\n");
1601 state->ident = V4L2_IDENT_SAA7111A;
1602 }
1599 break; 1603 break;
1600 case '3': 1604 case '3':
1601 state->ident = V4L2_IDENT_SAA7113; 1605 state->ident = V4L2_IDENT_SAA7113;
@@ -1612,7 +1616,7 @@ static int saa711x_probe(struct i2c_client *client,
1612 default: 1616 default:
1613 state->ident = V4L2_IDENT_SAA7111; 1617 state->ident = V4L2_IDENT_SAA7111;
1614 v4l2_info(sd, "WARNING: Chip is not known - Falling back to saa7111\n"); 1618 v4l2_info(sd, "WARNING: Chip is not known - Falling back to saa7111\n");
1615 1619 break;
1616 } 1620 }
1617 1621
1618 state->audclk_freq = 48000; 1622 state->audclk_freq = 48000;
@@ -1623,6 +1627,7 @@ static int saa711x_probe(struct i2c_client *client,
1623 state->crystal_freq = SAA7115_FREQ_24_576_MHZ; 1627 state->crystal_freq = SAA7115_FREQ_24_576_MHZ;
1624 switch (state->ident) { 1628 switch (state->ident) {
1625 case V4L2_IDENT_SAA7111: 1629 case V4L2_IDENT_SAA7111:
1630 case V4L2_IDENT_SAA7111A:
1626 saa711x_writeregs(sd, saa7111_init); 1631 saa711x_writeregs(sd, saa7111_init);
1627 break; 1632 break;
1628 case V4L2_IDENT_SAA7113: 1633 case V4L2_IDENT_SAA7113:
@@ -1632,7 +1637,7 @@ static int saa711x_probe(struct i2c_client *client,
1632 state->crystal_freq = SAA7115_FREQ_32_11_MHZ; 1637 state->crystal_freq = SAA7115_FREQ_32_11_MHZ;
1633 saa711x_writeregs(sd, saa7115_init_auto_input); 1638 saa711x_writeregs(sd, saa7115_init_auto_input);
1634 } 1639 }
1635 if (state->ident != V4L2_IDENT_SAA7111) 1640 if (state->ident > V4L2_IDENT_SAA7111A)
1636 saa711x_writeregs(sd, saa7115_init_misc); 1641 saa711x_writeregs(sd, saa7115_init_misc);
1637 saa711x_set_v4lstd(sd, V4L2_STD_NTSC); 1642 saa711x_set_v4lstd(sd, V4L2_STD_NTSC);
1638 1643
diff --git a/drivers/media/video/saa7127.c b/drivers/media/video/saa7127.c
index 2fe7a701b954..250ef84cf5ca 100644
--- a/drivers/media/video/saa7127.c
+++ b/drivers/media/video/saa7127.c
@@ -181,7 +181,7 @@ static const struct i2c_reg_value saa7127_init_config_common[] = {
181#define SAA7127_60HZ_DAC_CONTROL 0x15 181#define SAA7127_60HZ_DAC_CONTROL 0x15
182static const struct i2c_reg_value saa7127_init_config_60hz[] = { 182static const struct i2c_reg_value saa7127_init_config_60hz[] = {
183 { SAA7127_REG_BURST_START, 0x19 }, 183 { SAA7127_REG_BURST_START, 0x19 },
184 /* BURST_END is also used as a chip ID in saa7127_detect_client */ 184 /* BURST_END is also used as a chip ID in saa7127_probe */
185 { SAA7127_REG_BURST_END, 0x1d }, 185 { SAA7127_REG_BURST_END, 0x1d },
186 { SAA7127_REG_CHROMA_PHASE, 0xa3 }, 186 { SAA7127_REG_CHROMA_PHASE, 0xa3 },
187 { SAA7127_REG_GAINU, 0x98 }, 187 { SAA7127_REG_GAINU, 0x98 },
@@ -200,10 +200,10 @@ static const struct i2c_reg_value saa7127_init_config_60hz[] = {
200 { 0, 0 } 200 { 0, 0 }
201}; 201};
202 202
203#define SAA7127_50HZ_DAC_CONTROL 0x02 203#define SAA7127_50HZ_PAL_DAC_CONTROL 0x02
204static struct i2c_reg_value saa7127_init_config_50hz[] = { 204static struct i2c_reg_value saa7127_init_config_50hz_pal[] = {
205 { SAA7127_REG_BURST_START, 0x21 }, 205 { SAA7127_REG_BURST_START, 0x21 },
206 /* BURST_END is also used as a chip ID in saa7127_detect_client */ 206 /* BURST_END is also used as a chip ID in saa7127_probe */
207 { SAA7127_REG_BURST_END, 0x1d }, 207 { SAA7127_REG_BURST_END, 0x1d },
208 { SAA7127_REG_CHROMA_PHASE, 0x3f }, 208 { SAA7127_REG_CHROMA_PHASE, 0x3f },
209 { SAA7127_REG_GAINU, 0x7d }, 209 { SAA7127_REG_GAINU, 0x7d },
@@ -222,6 +222,28 @@ static struct i2c_reg_value saa7127_init_config_50hz[] = {
222 { 0, 0 } 222 { 0, 0 }
223}; 223};
224 224
225#define SAA7127_50HZ_SECAM_DAC_CONTROL 0x08
226static struct i2c_reg_value saa7127_init_config_50hz_secam[] = {
227 { SAA7127_REG_BURST_START, 0x21 },
228 /* BURST_END is also used as a chip ID in saa7127_probe */
229 { SAA7127_REG_BURST_END, 0x1d },
230 { SAA7127_REG_CHROMA_PHASE, 0x3f },
231 { SAA7127_REG_GAINU, 0x6a },
232 { SAA7127_REG_GAINV, 0x81 },
233 { SAA7127_REG_BLACK_LEVEL, 0x33 },
234 { SAA7127_REG_BLANKING_LEVEL, 0x35 },
235 { SAA7127_REG_VBI_BLANKING, 0x35 },
236 { SAA7127_REG_DAC_CONTROL, 0x08 },
237 { SAA7127_REG_BURST_AMP, 0x2f },
238 { SAA7127_REG_SUBC3, 0xb2 },
239 { SAA7127_REG_SUBC2, 0x3b },
240 { SAA7127_REG_SUBC1, 0xa3 },
241 { SAA7127_REG_SUBC0, 0x28 },
242 { SAA7127_REG_MULTI, 0x90 },
243 { SAA7127_REG_CLOSED_CAPTION, 0x00 },
244 { 0, 0 }
245};
246
225/* 247/*
226 ********************************************************************** 248 **********************************************************************
227 * 249 *
@@ -463,10 +485,21 @@ static int saa7127_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
463 v4l2_dbg(1, debug, sd, "Selecting 60 Hz video Standard\n"); 485 v4l2_dbg(1, debug, sd, "Selecting 60 Hz video Standard\n");
464 inittab = saa7127_init_config_60hz; 486 inittab = saa7127_init_config_60hz;
465 state->reg_61 = SAA7127_60HZ_DAC_CONTROL; 487 state->reg_61 = SAA7127_60HZ_DAC_CONTROL;
488
489 } else if (state->ident == V4L2_IDENT_SAA7129 &&
490 (std & V4L2_STD_SECAM) &&
491 !(std & (V4L2_STD_625_50 & ~V4L2_STD_SECAM))) {
492
493 /* If and only if SECAM, with a SAA712[89] */
494 v4l2_dbg(1, debug, sd,
495 "Selecting 50 Hz SECAM video Standard\n");
496 inittab = saa7127_init_config_50hz_secam;
497 state->reg_61 = SAA7127_50HZ_SECAM_DAC_CONTROL;
498
466 } else { 499 } else {
467 v4l2_dbg(1, debug, sd, "Selecting 50 Hz video Standard\n"); 500 v4l2_dbg(1, debug, sd, "Selecting 50 Hz PAL video Standard\n");
468 inittab = saa7127_init_config_50hz; 501 inittab = saa7127_init_config_50hz_pal;
469 state->reg_61 = SAA7127_50HZ_DAC_CONTROL; 502 state->reg_61 = SAA7127_50HZ_PAL_DAC_CONTROL;
470 } 503 }
471 504
472 /* Write Table */ 505 /* Write Table */
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c
index 03f572708b85..297833fb3b4a 100644
--- a/drivers/media/video/saa7134/saa7134-cards.c
+++ b/drivers/media/video/saa7134/saa7134-cards.c
@@ -4160,7 +4160,7 @@ struct saa7134_board saa7134_boards[] = {
4160 .amux = LINE2, 4160 .amux = LINE2,
4161 }, 4161 },
4162 }, 4162 },
4163 [SAA7134_BOARD_BEHOLD_505RDS] = { 4163 [SAA7134_BOARD_BEHOLD_505RDS_MK5] = {
4164 /* Beholder Intl. Ltd. 2008 */ 4164 /* Beholder Intl. Ltd. 2008 */
4165 /*Dmitry Belimov <d.belimov@gmail.com> */ 4165 /*Dmitry Belimov <d.belimov@gmail.com> */
4166 .name = "Beholder BeholdTV 505 RDS", 4166 .name = "Beholder BeholdTV 505 RDS",
@@ -5320,6 +5320,41 @@ struct saa7134_board saa7134_boards[] = {
5320 .vmux = 8, 5320 .vmux = 8,
5321 } }, 5321 } },
5322 }, 5322 },
5323 [SAA7134_BOARD_BEHOLD_505RDS_MK3] = {
5324 /* Beholder Intl. Ltd. 2008 */
5325 /*Dmitry Belimov <d.belimov@gmail.com> */
5326 .name = "Beholder BeholdTV 505 RDS",
5327 .audio_clock = 0x00200000,
5328 .tuner_type = TUNER_PHILIPS_FM1216ME_MK3,
5329 .radio_type = UNSET,
5330 .tuner_addr = ADDR_UNSET,
5331 .radio_addr = ADDR_UNSET,
5332 .rds_addr = 0x10,
5333 .tda9887_conf = TDA9887_PRESENT,
5334 .gpiomask = 0x00008000,
5335 .inputs = {{
5336 .name = name_tv,
5337 .vmux = 3,
5338 .amux = LINE2,
5339 .tv = 1,
5340 }, {
5341 .name = name_comp1,
5342 .vmux = 1,
5343 .amux = LINE1,
5344 }, {
5345 .name = name_svideo,
5346 .vmux = 8,
5347 .amux = LINE1,
5348 } },
5349 .mute = {
5350 .name = name_mute,
5351 .amux = LINE1,
5352 },
5353 .radio = {
5354 .name = name_radio,
5355 .amux = LINE2,
5356 },
5357 },
5323 5358
5324}; 5359};
5325 5360
@@ -6235,7 +6270,13 @@ struct pci_device_id saa7134_pci_tbl[] = {
6235 .device = PCI_DEVICE_ID_PHILIPS_SAA7130, 6270 .device = PCI_DEVICE_ID_PHILIPS_SAA7130,
6236 .subvendor = 0x0000, 6271 .subvendor = 0x0000,
6237 .subdevice = 0x505B, 6272 .subdevice = 0x505B,
6238 .driver_data = SAA7134_BOARD_BEHOLD_505RDS, 6273 .driver_data = SAA7134_BOARD_BEHOLD_505RDS_MK5,
6274 }, {
6275 .vendor = PCI_VENDOR_ID_PHILIPS,
6276 .device = PCI_DEVICE_ID_PHILIPS_SAA7130,
6277 .subvendor = 0x0000,
6278 .subdevice = 0x5051,
6279 .driver_data = SAA7134_BOARD_BEHOLD_505RDS_MK3,
6239 },{ 6280 },{
6240 .vendor = PCI_VENDOR_ID_PHILIPS, 6281 .vendor = PCI_VENDOR_ID_PHILIPS,
6241 .device = PCI_DEVICE_ID_PHILIPS_SAA7130, 6282 .device = PCI_DEVICE_ID_PHILIPS_SAA7130,
@@ -6792,7 +6833,8 @@ int saa7134_board_init1(struct saa7134_dev *dev)
6792 case SAA7134_BOARD_BEHOLD_407FM: 6833 case SAA7134_BOARD_BEHOLD_407FM:
6793 case SAA7134_BOARD_BEHOLD_409: 6834 case SAA7134_BOARD_BEHOLD_409:
6794 case SAA7134_BOARD_BEHOLD_505FM: 6835 case SAA7134_BOARD_BEHOLD_505FM:
6795 case SAA7134_BOARD_BEHOLD_505RDS: 6836 case SAA7134_BOARD_BEHOLD_505RDS_MK5:
6837 case SAA7134_BOARD_BEHOLD_505RDS_MK3:
6796 case SAA7134_BOARD_BEHOLD_507_9FM: 6838 case SAA7134_BOARD_BEHOLD_507_9FM:
6797 case SAA7134_BOARD_BEHOLD_507RDS_MK3: 6839 case SAA7134_BOARD_BEHOLD_507RDS_MK3:
6798 case SAA7134_BOARD_BEHOLD_507RDS_MK5: 6840 case SAA7134_BOARD_BEHOLD_507RDS_MK5:
@@ -6953,8 +6995,8 @@ int saa7134_board_init1(struct saa7134_dev *dev)
6953 break; 6995 break;
6954 case SAA7134_BOARD_VIDEOMATE_S350: 6996 case SAA7134_BOARD_VIDEOMATE_S350:
6955 dev->has_remote = SAA7134_REMOTE_GPIO; 6997 dev->has_remote = SAA7134_REMOTE_GPIO;
6956 saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x00008000, 0x00008000); 6998 saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x0000C000, 0x0000C000);
6957 saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x00008000, 0x00008000); 6999 saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x0000C000, 0x0000C000);
6958 break; 7000 break;
6959 } 7001 }
6960 return 0; 7002 return 0;
diff --git a/drivers/media/video/saa7134/saa7134-input.c b/drivers/media/video/saa7134/saa7134-input.c
index f8e985989ca0..9499000f66b6 100644
--- a/drivers/media/video/saa7134/saa7134-input.c
+++ b/drivers/media/video/saa7134/saa7134-input.c
@@ -460,7 +460,7 @@ int saa7134_input_init1(struct saa7134_dev *dev)
460 int polling = 0; 460 int polling = 0;
461 int rc5_gpio = 0; 461 int rc5_gpio = 0;
462 int nec_gpio = 0; 462 int nec_gpio = 0;
463 int ir_type = IR_TYPE_OTHER; 463 u64 ir_type = IR_TYPE_OTHER;
464 int err; 464 int err;
465 465
466 if (dev->has_remote != SAA7134_REMOTE_GPIO) 466 if (dev->has_remote != SAA7134_REMOTE_GPIO)
@@ -568,7 +568,8 @@ int saa7134_input_init1(struct saa7134_dev *dev)
568 case SAA7134_BOARD_BEHOLD_407FM: 568 case SAA7134_BOARD_BEHOLD_407FM:
569 case SAA7134_BOARD_BEHOLD_409: 569 case SAA7134_BOARD_BEHOLD_409:
570 case SAA7134_BOARD_BEHOLD_505FM: 570 case SAA7134_BOARD_BEHOLD_505FM:
571 case SAA7134_BOARD_BEHOLD_505RDS: 571 case SAA7134_BOARD_BEHOLD_505RDS_MK5:
572 case SAA7134_BOARD_BEHOLD_505RDS_MK3:
572 case SAA7134_BOARD_BEHOLD_507_9FM: 573 case SAA7134_BOARD_BEHOLD_507_9FM:
573 case SAA7134_BOARD_BEHOLD_507RDS_MK3: 574 case SAA7134_BOARD_BEHOLD_507RDS_MK3:
574 case SAA7134_BOARD_BEHOLD_507RDS_MK5: 575 case SAA7134_BOARD_BEHOLD_507RDS_MK5:
@@ -728,7 +729,7 @@ int saa7134_input_init1(struct saa7134_dev *dev)
728 dev->remote = ir; 729 dev->remote = ir;
729 saa7134_ir_start(dev, ir); 730 saa7134_ir_start(dev, ir);
730 731
731 err = ir_input_register(ir->dev, ir_codes); 732 err = ir_input_register(ir->dev, ir_codes, NULL);
732 if (err) 733 if (err)
733 goto err_out_stop; 734 goto err_out_stop;
734 735
diff --git a/drivers/media/video/saa7134/saa7134-video.c b/drivers/media/video/saa7134/saa7134-video.c
index cb732640ac4a..31138d3e51bb 100644
--- a/drivers/media/video/saa7134/saa7134-video.c
+++ b/drivers/media/video/saa7134/saa7134-video.c
@@ -205,7 +205,7 @@ static struct saa7134_format formats[] = {
205 205
206#define NORM_525_60 \ 206#define NORM_525_60 \
207 .h_start = 0, \ 207 .h_start = 0, \
208 .h_stop = 703, \ 208 .h_stop = 719, \
209 .video_v_start = 23, \ 209 .video_v_start = 23, \
210 .video_v_stop = 262, \ 210 .video_v_stop = 262, \
211 .vbi_v_start_0 = 10, \ 211 .vbi_v_start_0 = 10, \
diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h
index 53b7e0b8a2fb..bf130967ed17 100644
--- a/drivers/media/video/saa7134/saa7134.h
+++ b/drivers/media/video/saa7134/saa7134.h
@@ -282,7 +282,7 @@ struct saa7134_format {
282#define SAA7134_BOARD_HAUPPAUGE_HVR1120 156 282#define SAA7134_BOARD_HAUPPAUGE_HVR1120 156
283#define SAA7134_BOARD_AVERMEDIA_STUDIO_507UA 157 283#define SAA7134_BOARD_AVERMEDIA_STUDIO_507UA 157
284#define SAA7134_BOARD_AVERMEDIA_CARDBUS_501 158 284#define SAA7134_BOARD_AVERMEDIA_CARDBUS_501 158
285#define SAA7134_BOARD_BEHOLD_505RDS 159 285#define SAA7134_BOARD_BEHOLD_505RDS_MK5 159
286#define SAA7134_BOARD_BEHOLD_507RDS_MK3 160 286#define SAA7134_BOARD_BEHOLD_507RDS_MK3 160
287#define SAA7134_BOARD_BEHOLD_507RDS_MK5 161 287#define SAA7134_BOARD_BEHOLD_507RDS_MK5 161
288#define SAA7134_BOARD_BEHOLD_607FM_MK5 162 288#define SAA7134_BOARD_BEHOLD_607FM_MK5 162
@@ -299,6 +299,7 @@ struct saa7134_format {
299#define SAA7134_BOARD_ZOLID_HYBRID_PCI 173 299#define SAA7134_BOARD_ZOLID_HYBRID_PCI 173
300#define SAA7134_BOARD_ASUS_EUROPA_HYBRID 174 300#define SAA7134_BOARD_ASUS_EUROPA_HYBRID 174
301#define SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S 175 301#define SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S 175
302#define SAA7134_BOARD_BEHOLD_505RDS_MK3 176
302 303
303#define SAA7134_MAXBOARDS 32 304#define SAA7134_MAXBOARDS 32
304#define SAA7134_INPUT_MAX 8 305#define SAA7134_INPUT_MAX 8
diff --git a/drivers/media/video/saa7164/saa7164-api.c b/drivers/media/video/saa7164/saa7164-api.c
index 6f094a96ac81..1d487c150340 100644
--- a/drivers/media/video/saa7164/saa7164-api.c
+++ b/drivers/media/video/saa7164/saa7164-api.c
@@ -523,7 +523,7 @@ int saa7164_api_i2c_write(struct saa7164_i2c *bus, u8 addr, u32 datalen,
523 } 523 }
524 524
525 reglen = saa7164_i2caddr_to_reglen(bus, addr); 525 reglen = saa7164_i2caddr_to_reglen(bus, addr);
526 if (unitid < 0) { 526 if (reglen < 0) {
527 printk(KERN_ERR 527 printk(KERN_ERR
528 "%s() error, cannot translate regaddr to reglen\n", 528 "%s() error, cannot translate regaddr to reglen\n",
529 __func__); 529 __func__);
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c
index f09c7140d6b2..fb88c63188f3 100644
--- a/drivers/media/video/sh_mobile_ceu_camera.c
+++ b/drivers/media/video/sh_mobile_ceu_camera.c
@@ -1748,6 +1748,22 @@ static void sh_mobile_ceu_init_videobuf(struct videobuf_queue *q,
1748 icd); 1748 icd);
1749} 1749}
1750 1750
1751static int sh_mobile_ceu_get_parm(struct soc_camera_device *icd,
1752 struct v4l2_streamparm *parm)
1753{
1754 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1755
1756 return v4l2_subdev_call(sd, video, g_parm, parm);
1757}
1758
1759static int sh_mobile_ceu_set_parm(struct soc_camera_device *icd,
1760 struct v4l2_streamparm *parm)
1761{
1762 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1763
1764 return v4l2_subdev_call(sd, video, s_parm, parm);
1765}
1766
1751static int sh_mobile_ceu_get_ctrl(struct soc_camera_device *icd, 1767static int sh_mobile_ceu_get_ctrl(struct soc_camera_device *icd,
1752 struct v4l2_control *ctrl) 1768 struct v4l2_control *ctrl)
1753{ 1769{
@@ -1808,6 +1824,8 @@ static struct soc_camera_host_ops sh_mobile_ceu_host_ops = {
1808 .try_fmt = sh_mobile_ceu_try_fmt, 1824 .try_fmt = sh_mobile_ceu_try_fmt,
1809 .set_ctrl = sh_mobile_ceu_set_ctrl, 1825 .set_ctrl = sh_mobile_ceu_set_ctrl,
1810 .get_ctrl = sh_mobile_ceu_get_ctrl, 1826 .get_ctrl = sh_mobile_ceu_get_ctrl,
1827 .set_parm = sh_mobile_ceu_set_parm,
1828 .get_parm = sh_mobile_ceu_get_parm,
1811 .reqbufs = sh_mobile_ceu_reqbufs, 1829 .reqbufs = sh_mobile_ceu_reqbufs,
1812 .poll = sh_mobile_ceu_poll, 1830 .poll = sh_mobile_ceu_poll,
1813 .querycap = sh_mobile_ceu_querycap, 1831 .querycap = sh_mobile_ceu_querycap,
diff --git a/drivers/media/video/sn9c102/Kconfig b/drivers/media/video/sn9c102/Kconfig
index f71f272776de..6ebaf2940d06 100644
--- a/drivers/media/video/sn9c102/Kconfig
+++ b/drivers/media/video/sn9c102/Kconfig
@@ -1,7 +1,10 @@
1config USB_SN9C102 1config USB_SN9C102
2 tristate "USB SN9C1xx PC Camera Controller support" 2 tristate "USB SN9C1xx PC Camera Controller support (DEPRECATED)"
3 depends on VIDEO_V4L2 3 depends on VIDEO_V4L2
4 ---help--- 4 ---help---
5 This driver is DEPRECATED please use the gspca sonixb and
6 sonixj modules instead.
7
5 Say Y here if you want support for cameras based on SONiX SN9C101, 8 Say Y here if you want support for cameras based on SONiX SN9C101,
6 SN9C102, SN9C103, SN9C105 and SN9C120 PC Camera Controllers. 9 SN9C102, SN9C103, SN9C105 and SN9C120 PC Camera Controllers.
7 10
diff --git a/drivers/media/video/sn9c102/sn9c102_devtable.h b/drivers/media/video/sn9c102/sn9c102_devtable.h
index 36ee43a9ee95..cc40d6ba9f22 100644
--- a/drivers/media/video/sn9c102/sn9c102_devtable.h
+++ b/drivers/media/video/sn9c102/sn9c102_devtable.h
@@ -45,20 +45,24 @@ static const struct usb_device_id sn9c102_id_table[] = {
45 { SN9C102_USB_DEVICE(0x0c45, 0x6005, BRIDGE_SN9C102), }, 45 { SN9C102_USB_DEVICE(0x0c45, 0x6005, BRIDGE_SN9C102), },
46#endif 46#endif
47 { SN9C102_USB_DEVICE(0x0c45, 0x6007, BRIDGE_SN9C102), }, 47 { SN9C102_USB_DEVICE(0x0c45, 0x6007, BRIDGE_SN9C102), },
48#if !defined CONFIG_USB_GSPCA && !defined CONFIG_USB_GSPCA_MODULE
48 { SN9C102_USB_DEVICE(0x0c45, 0x6009, BRIDGE_SN9C102), }, 49 { SN9C102_USB_DEVICE(0x0c45, 0x6009, BRIDGE_SN9C102), },
49 { SN9C102_USB_DEVICE(0x0c45, 0x600d, BRIDGE_SN9C102), }, 50 { SN9C102_USB_DEVICE(0x0c45, 0x600d, BRIDGE_SN9C102), },
50/* { SN9C102_USB_DEVICE(0x0c45, 0x6011, BRIDGE_SN9C102), }, OV6650 */ 51/* { SN9C102_USB_DEVICE(0x0c45, 0x6011, BRIDGE_SN9C102), }, OV6650 */
52#endif
51 { SN9C102_USB_DEVICE(0x0c45, 0x6019, BRIDGE_SN9C102), }, 53 { SN9C102_USB_DEVICE(0x0c45, 0x6019, BRIDGE_SN9C102), },
52 { SN9C102_USB_DEVICE(0x0c45, 0x6024, BRIDGE_SN9C102), }, 54 { SN9C102_USB_DEVICE(0x0c45, 0x6024, BRIDGE_SN9C102), },
53 { SN9C102_USB_DEVICE(0x0c45, 0x6025, BRIDGE_SN9C102), }, 55 { SN9C102_USB_DEVICE(0x0c45, 0x6025, BRIDGE_SN9C102), },
56#if !defined CONFIG_USB_GSPCA && !defined CONFIG_USB_GSPCA_MODULE
54 { SN9C102_USB_DEVICE(0x0c45, 0x6028, BRIDGE_SN9C102), }, 57 { SN9C102_USB_DEVICE(0x0c45, 0x6028, BRIDGE_SN9C102), },
55 { SN9C102_USB_DEVICE(0x0c45, 0x6029, BRIDGE_SN9C102), }, 58 { SN9C102_USB_DEVICE(0x0c45, 0x6029, BRIDGE_SN9C102), },
59#endif
56 { SN9C102_USB_DEVICE(0x0c45, 0x602a, BRIDGE_SN9C102), }, 60 { SN9C102_USB_DEVICE(0x0c45, 0x602a, BRIDGE_SN9C102), },
57 { SN9C102_USB_DEVICE(0x0c45, 0x602b, BRIDGE_SN9C102), }, 61 { SN9C102_USB_DEVICE(0x0c45, 0x602b, BRIDGE_SN9C102), },
58#if !defined CONFIG_USB_GSPCA && !defined CONFIG_USB_GSPCA_MODULE 62#if !defined CONFIG_USB_GSPCA && !defined CONFIG_USB_GSPCA_MODULE
59 { SN9C102_USB_DEVICE(0x0c45, 0x602c, BRIDGE_SN9C102), }, 63 { SN9C102_USB_DEVICE(0x0c45, 0x602c, BRIDGE_SN9C102), },
60#endif
61/* { SN9C102_USB_DEVICE(0x0c45, 0x602d, BRIDGE_SN9C102), }, HV7131R */ 64/* { SN9C102_USB_DEVICE(0x0c45, 0x602d, BRIDGE_SN9C102), }, HV7131R */
65#endif
62 { SN9C102_USB_DEVICE(0x0c45, 0x602e, BRIDGE_SN9C102), }, 66 { SN9C102_USB_DEVICE(0x0c45, 0x602e, BRIDGE_SN9C102), },
63 { SN9C102_USB_DEVICE(0x0c45, 0x6030, BRIDGE_SN9C102), }, 67 { SN9C102_USB_DEVICE(0x0c45, 0x6030, BRIDGE_SN9C102), },
64 /* SN9C103 */ 68 /* SN9C103 */
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c
index 6b3fbcca7747..80f6bfa2632b 100644
--- a/drivers/media/video/soc_camera.c
+++ b/drivers/media/video/soc_camera.c
@@ -781,6 +781,32 @@ static int soc_camera_s_crop(struct file *file, void *fh,
781 return ret; 781 return ret;
782} 782}
783 783
784static int soc_camera_g_parm(struct file *file, void *fh,
785 struct v4l2_streamparm *a)
786{
787 struct soc_camera_file *icf = file->private_data;
788 struct soc_camera_device *icd = icf->icd;
789 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
790
791 if (ici->ops->get_parm)
792 return ici->ops->get_parm(icd, a);
793
794 return -ENOIOCTLCMD;
795}
796
797static int soc_camera_s_parm(struct file *file, void *fh,
798 struct v4l2_streamparm *a)
799{
800 struct soc_camera_file *icf = file->private_data;
801 struct soc_camera_device *icd = icf->icd;
802 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
803
804 if (ici->ops->set_parm)
805 return ici->ops->set_parm(icd, a);
806
807 return -ENOIOCTLCMD;
808}
809
784static int soc_camera_g_chip_ident(struct file *file, void *fh, 810static int soc_camera_g_chip_ident(struct file *file, void *fh,
785 struct v4l2_dbg_chip_ident *id) 811 struct v4l2_dbg_chip_ident *id)
786{ 812{
@@ -846,10 +872,8 @@ static int soc_camera_init_i2c(struct soc_camera_device *icd,
846 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 872 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
847 struct i2c_adapter *adap = i2c_get_adapter(icl->i2c_adapter_id); 873 struct i2c_adapter *adap = i2c_get_adapter(icl->i2c_adapter_id);
848 struct v4l2_subdev *subdev; 874 struct v4l2_subdev *subdev;
849 int ret;
850 875
851 if (!adap) { 876 if (!adap) {
852 ret = -ENODEV;
853 dev_err(&icd->dev, "Cannot get I2C adapter #%d. No driver?\n", 877 dev_err(&icd->dev, "Cannot get I2C adapter #%d. No driver?\n",
854 icl->i2c_adapter_id); 878 icl->i2c_adapter_id);
855 goto ei2cga; 879 goto ei2cga;
@@ -859,10 +883,8 @@ static int soc_camera_init_i2c(struct soc_camera_device *icd,
859 883
860 subdev = v4l2_i2c_new_subdev_board(&ici->v4l2_dev, adap, 884 subdev = v4l2_i2c_new_subdev_board(&ici->v4l2_dev, adap,
861 icl->module_name, icl->board_info, NULL); 885 icl->module_name, icl->board_info, NULL);
862 if (!subdev) { 886 if (!subdev)
863 ret = -ENOMEM;
864 goto ei2cnd; 887 goto ei2cnd;
865 }
866 888
867 client = subdev->priv; 889 client = subdev->priv;
868 890
@@ -873,7 +895,7 @@ static int soc_camera_init_i2c(struct soc_camera_device *icd,
873ei2cnd: 895ei2cnd:
874 i2c_put_adapter(adap); 896 i2c_put_adapter(adap);
875ei2cga: 897ei2cga:
876 return ret; 898 return -ENODEV;
877} 899}
878 900
879static void soc_camera_free_i2c(struct soc_camera_device *icd) 901static void soc_camera_free_i2c(struct soc_camera_device *icd)
@@ -1260,6 +1282,8 @@ static const struct v4l2_ioctl_ops soc_camera_ioctl_ops = {
1260 .vidioc_cropcap = soc_camera_cropcap, 1282 .vidioc_cropcap = soc_camera_cropcap,
1261 .vidioc_g_crop = soc_camera_g_crop, 1283 .vidioc_g_crop = soc_camera_g_crop,
1262 .vidioc_s_crop = soc_camera_s_crop, 1284 .vidioc_s_crop = soc_camera_s_crop,
1285 .vidioc_g_parm = soc_camera_g_parm,
1286 .vidioc_s_parm = soc_camera_s_parm,
1263 .vidioc_g_chip_ident = soc_camera_g_chip_ident, 1287 .vidioc_g_chip_ident = soc_camera_g_chip_ident,
1264#ifdef CONFIG_VIDEO_ADV_DEBUG 1288#ifdef CONFIG_VIDEO_ADV_DEBUG
1265 .vidioc_g_register = soc_camera_g_register, 1289 .vidioc_g_register = soc_camera_g_register,
diff --git a/drivers/media/video/soc_mediabus.c b/drivers/media/video/soc_mediabus.c
index f8d5c87dc2aa..8b63b6545e76 100644
--- a/drivers/media/video/soc_mediabus.c
+++ b/drivers/media/video/soc_mediabus.c
@@ -24,91 +24,106 @@ static const struct soc_mbus_pixelfmt mbus_fmt[] = {
24 .bits_per_sample = 8, 24 .bits_per_sample = 8,
25 .packing = SOC_MBUS_PACKING_2X8_PADHI, 25 .packing = SOC_MBUS_PACKING_2X8_PADHI,
26 .order = SOC_MBUS_ORDER_LE, 26 .order = SOC_MBUS_ORDER_LE,
27 }, [MBUS_IDX(YVYU8_2X8_LE)] = { 27 },
28 [MBUS_IDX(YVYU8_2X8_LE)] = {
28 .fourcc = V4L2_PIX_FMT_YVYU, 29 .fourcc = V4L2_PIX_FMT_YVYU,
29 .name = "YVYU", 30 .name = "YVYU",
30 .bits_per_sample = 8, 31 .bits_per_sample = 8,
31 .packing = SOC_MBUS_PACKING_2X8_PADHI, 32 .packing = SOC_MBUS_PACKING_2X8_PADHI,
32 .order = SOC_MBUS_ORDER_LE, 33 .order = SOC_MBUS_ORDER_LE,
33 }, [MBUS_IDX(YUYV8_2X8_BE)] = { 34 },
35 [MBUS_IDX(YUYV8_2X8_BE)] = {
34 .fourcc = V4L2_PIX_FMT_UYVY, 36 .fourcc = V4L2_PIX_FMT_UYVY,
35 .name = "UYVY", 37 .name = "UYVY",
36 .bits_per_sample = 8, 38 .bits_per_sample = 8,
37 .packing = SOC_MBUS_PACKING_2X8_PADHI, 39 .packing = SOC_MBUS_PACKING_2X8_PADHI,
38 .order = SOC_MBUS_ORDER_LE, 40 .order = SOC_MBUS_ORDER_LE,
39 }, [MBUS_IDX(YVYU8_2X8_BE)] = { 41 },
42 [MBUS_IDX(YVYU8_2X8_BE)] = {
40 .fourcc = V4L2_PIX_FMT_VYUY, 43 .fourcc = V4L2_PIX_FMT_VYUY,
41 .name = "VYUY", 44 .name = "VYUY",
42 .bits_per_sample = 8, 45 .bits_per_sample = 8,
43 .packing = SOC_MBUS_PACKING_2X8_PADHI, 46 .packing = SOC_MBUS_PACKING_2X8_PADHI,
44 .order = SOC_MBUS_ORDER_LE, 47 .order = SOC_MBUS_ORDER_LE,
45 }, [MBUS_IDX(RGB555_2X8_PADHI_LE)] = { 48 },
49 [MBUS_IDX(RGB555_2X8_PADHI_LE)] = {
46 .fourcc = V4L2_PIX_FMT_RGB555, 50 .fourcc = V4L2_PIX_FMT_RGB555,
47 .name = "RGB555", 51 .name = "RGB555",
48 .bits_per_sample = 8, 52 .bits_per_sample = 8,
49 .packing = SOC_MBUS_PACKING_2X8_PADHI, 53 .packing = SOC_MBUS_PACKING_2X8_PADHI,
50 .order = SOC_MBUS_ORDER_LE, 54 .order = SOC_MBUS_ORDER_LE,
51 }, [MBUS_IDX(RGB555_2X8_PADHI_BE)] = { 55 },
56 [MBUS_IDX(RGB555_2X8_PADHI_BE)] = {
52 .fourcc = V4L2_PIX_FMT_RGB555X, 57 .fourcc = V4L2_PIX_FMT_RGB555X,
53 .name = "RGB555X", 58 .name = "RGB555X",
54 .bits_per_sample = 8, 59 .bits_per_sample = 8,
55 .packing = SOC_MBUS_PACKING_2X8_PADHI, 60 .packing = SOC_MBUS_PACKING_2X8_PADHI,
56 .order = SOC_MBUS_ORDER_LE, 61 .order = SOC_MBUS_ORDER_LE,
57 }, [MBUS_IDX(RGB565_2X8_LE)] = { 62 },
63 [MBUS_IDX(RGB565_2X8_LE)] = {
58 .fourcc = V4L2_PIX_FMT_RGB565, 64 .fourcc = V4L2_PIX_FMT_RGB565,
59 .name = "RGB565", 65 .name = "RGB565",
60 .bits_per_sample = 8, 66 .bits_per_sample = 8,
61 .packing = SOC_MBUS_PACKING_2X8_PADHI, 67 .packing = SOC_MBUS_PACKING_2X8_PADHI,
62 .order = SOC_MBUS_ORDER_LE, 68 .order = SOC_MBUS_ORDER_LE,
63 }, [MBUS_IDX(RGB565_2X8_BE)] = { 69 },
70 [MBUS_IDX(RGB565_2X8_BE)] = {
64 .fourcc = V4L2_PIX_FMT_RGB565X, 71 .fourcc = V4L2_PIX_FMT_RGB565X,
65 .name = "RGB565X", 72 .name = "RGB565X",
66 .bits_per_sample = 8, 73 .bits_per_sample = 8,
67 .packing = SOC_MBUS_PACKING_2X8_PADHI, 74 .packing = SOC_MBUS_PACKING_2X8_PADHI,
68 .order = SOC_MBUS_ORDER_LE, 75 .order = SOC_MBUS_ORDER_LE,
69 }, [MBUS_IDX(SBGGR8_1X8)] = { 76 },
77 [MBUS_IDX(SBGGR8_1X8)] = {
70 .fourcc = V4L2_PIX_FMT_SBGGR8, 78 .fourcc = V4L2_PIX_FMT_SBGGR8,
71 .name = "Bayer 8 BGGR", 79 .name = "Bayer 8 BGGR",
72 .bits_per_sample = 8, 80 .bits_per_sample = 8,
73 .packing = SOC_MBUS_PACKING_NONE, 81 .packing = SOC_MBUS_PACKING_NONE,
74 .order = SOC_MBUS_ORDER_LE, 82 .order = SOC_MBUS_ORDER_LE,
75 }, [MBUS_IDX(SBGGR10_1X10)] = { 83 },
84 [MBUS_IDX(SBGGR10_1X10)] = {
76 .fourcc = V4L2_PIX_FMT_SBGGR10, 85 .fourcc = V4L2_PIX_FMT_SBGGR10,
77 .name = "Bayer 10 BGGR", 86 .name = "Bayer 10 BGGR",
78 .bits_per_sample = 10, 87 .bits_per_sample = 10,
79 .packing = SOC_MBUS_PACKING_EXTEND16, 88 .packing = SOC_MBUS_PACKING_EXTEND16,
80 .order = SOC_MBUS_ORDER_LE, 89 .order = SOC_MBUS_ORDER_LE,
81 }, [MBUS_IDX(GREY8_1X8)] = { 90 },
91 [MBUS_IDX(GREY8_1X8)] = {
82 .fourcc = V4L2_PIX_FMT_GREY, 92 .fourcc = V4L2_PIX_FMT_GREY,
83 .name = "Grey", 93 .name = "Grey",
84 .bits_per_sample = 8, 94 .bits_per_sample = 8,
85 .packing = SOC_MBUS_PACKING_NONE, 95 .packing = SOC_MBUS_PACKING_NONE,
86 .order = SOC_MBUS_ORDER_LE, 96 .order = SOC_MBUS_ORDER_LE,
87 }, [MBUS_IDX(Y10_1X10)] = { 97 },
98 [MBUS_IDX(Y10_1X10)] = {
88 .fourcc = V4L2_PIX_FMT_Y10, 99 .fourcc = V4L2_PIX_FMT_Y10,
89 .name = "Grey 10bit", 100 .name = "Grey 10bit",
90 .bits_per_sample = 10, 101 .bits_per_sample = 10,
91 .packing = SOC_MBUS_PACKING_EXTEND16, 102 .packing = SOC_MBUS_PACKING_EXTEND16,
92 .order = SOC_MBUS_ORDER_LE, 103 .order = SOC_MBUS_ORDER_LE,
93 }, [MBUS_IDX(SBGGR10_2X8_PADHI_LE)] = { 104 },
105 [MBUS_IDX(SBGGR10_2X8_PADHI_LE)] = {
94 .fourcc = V4L2_PIX_FMT_SBGGR10, 106 .fourcc = V4L2_PIX_FMT_SBGGR10,
95 .name = "Bayer 10 BGGR", 107 .name = "Bayer 10 BGGR",
96 .bits_per_sample = 8, 108 .bits_per_sample = 8,
97 .packing = SOC_MBUS_PACKING_2X8_PADHI, 109 .packing = SOC_MBUS_PACKING_2X8_PADHI,
98 .order = SOC_MBUS_ORDER_LE, 110 .order = SOC_MBUS_ORDER_LE,
99 }, [MBUS_IDX(SBGGR10_2X8_PADLO_LE)] = { 111 },
112 [MBUS_IDX(SBGGR10_2X8_PADLO_LE)] = {
100 .fourcc = V4L2_PIX_FMT_SBGGR10, 113 .fourcc = V4L2_PIX_FMT_SBGGR10,
101 .name = "Bayer 10 BGGR", 114 .name = "Bayer 10 BGGR",
102 .bits_per_sample = 8, 115 .bits_per_sample = 8,
103 .packing = SOC_MBUS_PACKING_2X8_PADLO, 116 .packing = SOC_MBUS_PACKING_2X8_PADLO,
104 .order = SOC_MBUS_ORDER_LE, 117 .order = SOC_MBUS_ORDER_LE,
105 }, [MBUS_IDX(SBGGR10_2X8_PADHI_BE)] = { 118 },
119 [MBUS_IDX(SBGGR10_2X8_PADHI_BE)] = {
106 .fourcc = V4L2_PIX_FMT_SBGGR10, 120 .fourcc = V4L2_PIX_FMT_SBGGR10,
107 .name = "Bayer 10 BGGR", 121 .name = "Bayer 10 BGGR",
108 .bits_per_sample = 8, 122 .bits_per_sample = 8,
109 .packing = SOC_MBUS_PACKING_2X8_PADHI, 123 .packing = SOC_MBUS_PACKING_2X8_PADHI,
110 .order = SOC_MBUS_ORDER_BE, 124 .order = SOC_MBUS_ORDER_BE,
111 }, [MBUS_IDX(SBGGR10_2X8_PADLO_BE)] = { 125 },
126 [MBUS_IDX(SBGGR10_2X8_PADLO_BE)] = {
112 .fourcc = V4L2_PIX_FMT_SBGGR10, 127 .fourcc = V4L2_PIX_FMT_SBGGR10,
113 .name = "Bayer 10 BGGR", 128 .name = "Bayer 10 BGGR",
114 .bits_per_sample = 8, 129 .bits_per_sample = 8,
@@ -134,7 +149,8 @@ EXPORT_SYMBOL(soc_mbus_bytes_per_line);
134const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc( 149const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc(
135 enum v4l2_mbus_pixelcode code) 150 enum v4l2_mbus_pixelcode code)
136{ 151{
137 if ((unsigned int)(code - V4L2_MBUS_FMT_FIXED) > ARRAY_SIZE(mbus_fmt)) 152 if (code - V4L2_MBUS_FMT_FIXED > ARRAY_SIZE(mbus_fmt) ||
153 code <= V4L2_MBUS_FMT_FIXED)
138 return NULL; 154 return NULL;
139 return mbus_fmt + code - V4L2_MBUS_FMT_FIXED - 1; 155 return mbus_fmt + code - V4L2_MBUS_FMT_FIXED - 1;
140} 156}
diff --git a/drivers/media/video/tlg2300/Kconfig b/drivers/media/video/tlg2300/Kconfig
new file mode 100644
index 000000000000..2c29ec659b4e
--- /dev/null
+++ b/drivers/media/video/tlg2300/Kconfig
@@ -0,0 +1,16 @@
1config VIDEO_TLG2300
2 tristate "Telegent TLG2300 USB video capture support"
3 depends on VIDEO_DEV && I2C && INPUT && SND && DVB_CORE
4 select VIDEO_TUNER
5 select VIDEO_TVEEPROM
6 select VIDEO_IR
7 select VIDEOBUF_VMALLOC
8 select SND_PCM
9 select VIDEOBUF_DVB
10
11 ---help---
12 This is a video4linux driver for Telegent tlg2300 based TV cards.
13 The driver supports V4L2, DVB-T and radio.
14
15 To compile this driver as a module, choose M here: the
16 module will be called poseidon
diff --git a/drivers/media/video/tlg2300/Makefile b/drivers/media/video/tlg2300/Makefile
new file mode 100644
index 000000000000..81bb7fdd1e3d
--- /dev/null
+++ b/drivers/media/video/tlg2300/Makefile
@@ -0,0 +1,9 @@
1poseidon-objs := pd-video.o pd-alsa.o pd-dvb.o pd-radio.o pd-main.o
2
3obj-$(CONFIG_VIDEO_TLG2300) += poseidon.o
4
5EXTRA_CFLAGS += -Idrivers/media/video
6EXTRA_CFLAGS += -Idrivers/media/common/tuners
7EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core
8EXTRA_CFLAGS += -Idrivers/media/dvb/frontends
9
diff --git a/drivers/media/video/tlg2300/pd-alsa.c b/drivers/media/video/tlg2300/pd-alsa.c
new file mode 100644
index 000000000000..6f42621ad478
--- /dev/null
+++ b/drivers/media/video/tlg2300/pd-alsa.c
@@ -0,0 +1,332 @@
1#include <linux/kernel.h>
2#include <linux/usb.h>
3#include <linux/init.h>
4#include <linux/sound.h>
5#include <linux/spinlock.h>
6#include <linux/soundcard.h>
7#include <linux/slab.h>
8#include <linux/vmalloc.h>
9#include <linux/proc_fs.h>
10#include <linux/module.h>
11#include <sound/core.h>
12#include <sound/pcm.h>
13#include <sound/pcm_params.h>
14#include <sound/info.h>
15#include <sound/initval.h>
16#include <sound/control.h>
17#include <media/v4l2-common.h>
18#include "pd-common.h"
19#include "vendorcmds.h"
20
21static void complete_handler_audio(struct urb *urb);
22#define AUDIO_EP (0x83)
23#define AUDIO_BUF_SIZE (512)
24#define PERIOD_SIZE (1024 * 8)
25#define PERIOD_MIN (4)
26#define PERIOD_MAX PERIOD_MIN
27
28static struct snd_pcm_hardware snd_pd_hw_capture = {
29 .info = SNDRV_PCM_INFO_BLOCK_TRANSFER |
30 SNDRV_PCM_INFO_MMAP |
31 SNDRV_PCM_INFO_INTERLEAVED |
32 SNDRV_PCM_INFO_MMAP_VALID,
33
34 .formats = SNDRV_PCM_FMTBIT_S16_LE,
35 .rates = SNDRV_PCM_RATE_48000,
36
37 .rate_min = 48000,
38 .rate_max = 48000,
39 .channels_min = 2,
40 .channels_max = 2,
41 .buffer_bytes_max = PERIOD_SIZE * PERIOD_MIN,
42 .period_bytes_min = PERIOD_SIZE,
43 .period_bytes_max = PERIOD_SIZE,
44 .periods_min = PERIOD_MIN,
45 .periods_max = PERIOD_MAX,
46 /*
47 .buffer_bytes_max = 62720 * 8,
48 .period_bytes_min = 64,
49 .period_bytes_max = 12544,
50 .periods_min = 2,
51 .periods_max = 98
52 */
53};
54
55static int snd_pd_capture_open(struct snd_pcm_substream *substream)
56{
57 struct poseidon *p = snd_pcm_substream_chip(substream);
58 struct poseidon_audio *pa = &p->audio;
59 struct snd_pcm_runtime *runtime = substream->runtime;
60
61 if (!p)
62 return -ENODEV;
63 pa->users++;
64 pa->card_close = 0;
65 pa->capture_pcm_substream = substream;
66 runtime->private_data = p;
67
68 runtime->hw = snd_pd_hw_capture;
69 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
70 usb_autopm_get_interface(p->interface);
71 kref_get(&p->kref);
72 return 0;
73}
74
75static int snd_pd_pcm_close(struct snd_pcm_substream *substream)
76{
77 struct poseidon *p = snd_pcm_substream_chip(substream);
78 struct poseidon_audio *pa = &p->audio;
79
80 pa->users--;
81 pa->card_close = 1;
82 usb_autopm_put_interface(p->interface);
83 kref_put(&p->kref, poseidon_delete);
84 return 0;
85}
86
87static int snd_pd_hw_capture_params(struct snd_pcm_substream *substream,
88 struct snd_pcm_hw_params *hw_params)
89{
90 struct snd_pcm_runtime *runtime = substream->runtime;
91 unsigned int size;
92
93 size = params_buffer_bytes(hw_params);
94 if (runtime->dma_area) {
95 if (runtime->dma_bytes > size)
96 return 0;
97 vfree(runtime->dma_area);
98 }
99 runtime->dma_area = vmalloc(size);
100 if (!runtime->dma_area)
101 return -ENOMEM;
102 else
103 runtime->dma_bytes = size;
104 return 0;
105}
106
107static int audio_buf_free(struct poseidon *p)
108{
109 struct poseidon_audio *pa = &p->audio;
110 int i;
111
112 for (i = 0; i < AUDIO_BUFS; i++)
113 if (pa->urb_array[i])
114 usb_kill_urb(pa->urb_array[i]);
115 free_all_urb_generic(pa->urb_array, AUDIO_BUFS);
116 logpm();
117 return 0;
118}
119
120static int snd_pd_hw_capture_free(struct snd_pcm_substream *substream)
121{
122 struct poseidon *p = snd_pcm_substream_chip(substream);
123
124 logpm();
125 audio_buf_free(p);
126 return 0;
127}
128
129static int snd_pd_prepare(struct snd_pcm_substream *substream)
130{
131 return 0;
132}
133
134#define AUDIO_TRAILER_SIZE (16)
135static inline void handle_audio_data(struct urb *urb, int *period_elapsed)
136{
137 struct poseidon_audio *pa = urb->context;
138 struct snd_pcm_runtime *runtime = pa->capture_pcm_substream->runtime;
139
140 int stride = runtime->frame_bits >> 3;
141 int len = urb->actual_length / stride;
142 unsigned char *cp = urb->transfer_buffer;
143 unsigned int oldptr = pa->rcv_position;
144
145 if (urb->actual_length == AUDIO_BUF_SIZE - 4)
146 len -= (AUDIO_TRAILER_SIZE / stride);
147
148 /* do the copy */
149 if (oldptr + len >= runtime->buffer_size) {
150 unsigned int cnt = runtime->buffer_size - oldptr;
151
152 memcpy(runtime->dma_area + oldptr * stride, cp, cnt * stride);
153 memcpy(runtime->dma_area, (cp + cnt * stride),
154 (len * stride - cnt * stride));
155 } else
156 memcpy(runtime->dma_area + oldptr * stride, cp, len * stride);
157
158 /* update the statas */
159 snd_pcm_stream_lock(pa->capture_pcm_substream);
160 pa->rcv_position += len;
161 if (pa->rcv_position >= runtime->buffer_size)
162 pa->rcv_position -= runtime->buffer_size;
163
164 pa->copied_position += (len);
165 if (pa->copied_position >= runtime->period_size) {
166 pa->copied_position -= runtime->period_size;
167 *period_elapsed = 1;
168 }
169 snd_pcm_stream_unlock(pa->capture_pcm_substream);
170}
171
172static void complete_handler_audio(struct urb *urb)
173{
174 struct poseidon_audio *pa = urb->context;
175 struct snd_pcm_substream *substream = pa->capture_pcm_substream;
176 int period_elapsed = 0;
177 int ret;
178
179 if (1 == pa->card_close || pa->capture_stream != STREAM_ON)
180 return;
181
182 if (urb->status != 0) {
183 /*if (urb->status == -ESHUTDOWN)*/
184 return;
185 }
186
187 if (substream) {
188 if (urb->actual_length) {
189 handle_audio_data(urb, &period_elapsed);
190 if (period_elapsed)
191 snd_pcm_period_elapsed(substream);
192 }
193 }
194
195 ret = usb_submit_urb(urb, GFP_ATOMIC);
196 if (ret < 0)
197 log("audio urb failed (errcod = %i)", ret);
198 return;
199}
200
201static int fire_audio_urb(struct poseidon *p)
202{
203 int i, ret = 0;
204 struct poseidon_audio *pa = &p->audio;
205
206 alloc_bulk_urbs_generic(pa->urb_array, AUDIO_BUFS,
207 p->udev, AUDIO_EP,
208 AUDIO_BUF_SIZE, GFP_ATOMIC,
209 complete_handler_audio, pa);
210
211 for (i = 0; i < AUDIO_BUFS; i++) {
212 ret = usb_submit_urb(pa->urb_array[i], GFP_KERNEL);
213 if (ret)
214 log("urb err : %d", ret);
215 }
216 log();
217 return ret;
218}
219
220static int snd_pd_capture_trigger(struct snd_pcm_substream *substream, int cmd)
221{
222 struct poseidon *p = snd_pcm_substream_chip(substream);
223 struct poseidon_audio *pa = &p->audio;
224
225 if (debug_mode)
226 log("cmd %d, audio stat : %d\n", cmd, pa->capture_stream);
227
228 switch (cmd) {
229 case SNDRV_PCM_TRIGGER_RESUME:
230 case SNDRV_PCM_TRIGGER_START:
231 if (pa->capture_stream == STREAM_ON)
232 return 0;
233
234 pa->rcv_position = pa->copied_position = 0;
235 pa->capture_stream = STREAM_ON;
236
237 if (in_hibernation(p))
238 return 0;
239 fire_audio_urb(p);
240 return 0;
241
242 case SNDRV_PCM_TRIGGER_SUSPEND:
243 pa->capture_stream = STREAM_SUSPEND;
244 return 0;
245 case SNDRV_PCM_TRIGGER_STOP:
246 pa->capture_stream = STREAM_OFF;
247 return 0;
248 default:
249 return -EINVAL;
250 }
251}
252
253static snd_pcm_uframes_t
254snd_pd_capture_pointer(struct snd_pcm_substream *substream)
255{
256 struct poseidon *p = snd_pcm_substream_chip(substream);
257 struct poseidon_audio *pa = &p->audio;
258 return pa->rcv_position;
259}
260
261static struct page *snd_pcm_pd_get_page(struct snd_pcm_substream *subs,
262 unsigned long offset)
263{
264 void *pageptr = subs->runtime->dma_area + offset;
265 return vmalloc_to_page(pageptr);
266}
267
268static struct snd_pcm_ops pcm_capture_ops = {
269 .open = snd_pd_capture_open,
270 .close = snd_pd_pcm_close,
271 .ioctl = snd_pcm_lib_ioctl,
272 .hw_params = snd_pd_hw_capture_params,
273 .hw_free = snd_pd_hw_capture_free,
274 .prepare = snd_pd_prepare,
275 .trigger = snd_pd_capture_trigger,
276 .pointer = snd_pd_capture_pointer,
277 .page = snd_pcm_pd_get_page,
278};
279
280#ifdef CONFIG_PM
281int pm_alsa_suspend(struct poseidon *p)
282{
283 logpm(p);
284 audio_buf_free(p);
285 return 0;
286}
287
288int pm_alsa_resume(struct poseidon *p)
289{
290 logpm(p);
291 fire_audio_urb(p);
292 return 0;
293}
294#endif
295
296int poseidon_audio_init(struct poseidon *p)
297{
298 struct poseidon_audio *pa = &p->audio;
299 struct snd_card *card;
300 struct snd_pcm *pcm;
301 int ret;
302
303 ret = snd_card_create(-1, "Telegent", THIS_MODULE, 0, &card);
304 if (ret != 0)
305 return ret;
306
307 ret = snd_pcm_new(card, "poseidon audio", 0, 0, 1, &pcm);
308 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &pcm_capture_ops);
309 pcm->info_flags = 0;
310 pcm->private_data = p;
311 strcpy(pcm->name, "poseidon audio capture");
312
313 strcpy(card->driver, "ALSA driver");
314 strcpy(card->shortname, "poseidon Audio");
315 strcpy(card->longname, "poseidon ALSA Audio");
316
317 if (snd_card_register(card)) {
318 snd_card_free(card);
319 return -ENOMEM;
320 }
321 pa->card = card;
322 return 0;
323}
324
325int poseidon_audio_free(struct poseidon *p)
326{
327 struct poseidon_audio *pa = &p->audio;
328
329 if (pa->card)
330 snd_card_free(pa->card);
331 return 0;
332}
diff --git a/drivers/media/video/tlg2300/pd-common.h b/drivers/media/video/tlg2300/pd-common.h
new file mode 100644
index 000000000000..46066bdc73f9
--- /dev/null
+++ b/drivers/media/video/tlg2300/pd-common.h
@@ -0,0 +1,282 @@
1#ifndef PD_COMMON_H
2#define PD_COMMON_H
3
4#include <linux/version.h>
5#include <linux/fs.h>
6#include <linux/wait.h>
7#include <linux/list.h>
8#include <linux/videodev2.h>
9#include <linux/semaphore.h>
10#include <linux/usb.h>
11#include <linux/poll.h>
12#include <media/videobuf-vmalloc.h>
13#include <media/v4l2-device.h>
14
15#include "dvb_frontend.h"
16#include "dvbdev.h"
17#include "dvb_demux.h"
18#include "dmxdev.h"
19
20#define SBUF_NUM 8
21#define MAX_BUFFER_NUM 6
22#define PK_PER_URB 32
23#define ISO_PKT_SIZE 3072
24
25#define POSEIDON_STATE_NONE (0x0000)
26#define POSEIDON_STATE_ANALOG (0x0001)
27#define POSEIDON_STATE_FM (0x0002)
28#define POSEIDON_STATE_DVBT (0x0004)
29#define POSEIDON_STATE_VBI (0x0008)
30#define POSEIDON_STATE_DISCONNECT (0x0080)
31
32#define PM_SUSPEND_DELAY 3
33
34#define V4L_PAL_VBI_LINES 18
35#define V4L_NTSC_VBI_LINES 12
36#define V4L_PAL_VBI_FRAMESIZE (V4L_PAL_VBI_LINES * 1440 * 2)
37#define V4L_NTSC_VBI_FRAMESIZE (V4L_NTSC_VBI_LINES * 1440 * 2)
38
39#define TUNER_FREQ_MIN (45000000)
40#define TUNER_FREQ_MAX (862000000)
41
42struct vbi_data {
43 struct video_device *v_dev;
44 struct video_data *video;
45 struct front_face *front;
46
47 unsigned int copied;
48 unsigned int vbi_size; /* the whole size of two fields */
49 int users;
50};
51
52/*
53 * This is the running context of the video, it is useful for
54 * resume()
55 */
56struct running_context {
57 u32 freq; /* VIDIOC_S_FREQUENCY */
58 int audio_idx; /* VIDIOC_S_TUNER */
59 v4l2_std_id tvnormid; /* VIDIOC_S_STD */
60 int sig_index; /* VIDIOC_S_INPUT */
61 struct v4l2_pix_format pix; /* VIDIOC_S_FMT */
62};
63
64struct video_data {
65 /* v4l2 video device */
66 struct video_device *v_dev;
67
68 /* the working context */
69 struct running_context context;
70
71 /* for data copy */
72 int field_count;
73
74 char *dst;
75 int lines_copied;
76 int prev_left;
77
78 int lines_per_field;
79 int lines_size;
80
81 /* for communication */
82 u8 endpoint_addr;
83 struct urb *urb_array[SBUF_NUM];
84 struct vbi_data *vbi;
85 struct poseidon *pd;
86 struct front_face *front;
87
88 int is_streaming;
89 int users;
90
91 /* for bubble handler */
92 struct work_struct bubble_work;
93};
94
95enum pcm_stream_state {
96 STREAM_OFF,
97 STREAM_ON,
98 STREAM_SUSPEND,
99};
100
101#define AUDIO_BUFS (3)
102#define CAPTURE_STREAM_EN 1
103struct poseidon_audio {
104 struct urb *urb_array[AUDIO_BUFS];
105 unsigned int copied_position;
106 struct snd_pcm_substream *capture_pcm_substream;
107
108 unsigned int rcv_position;
109 struct snd_card *card;
110 int card_close;
111
112 int users;
113 int pm_state;
114 enum pcm_stream_state capture_stream;
115};
116
117struct radio_data {
118 __u32 fm_freq;
119 int users;
120 unsigned int is_radio_streaming;
121 int pre_emphasis;
122 struct video_device *fm_dev;
123};
124
125#define DVB_SBUF_NUM 4
126#define DVB_URB_BUF_SIZE 0x2000
127struct pd_dvb_adapter {
128 struct dvb_adapter dvb_adap;
129 struct dvb_frontend dvb_fe;
130 struct dmxdev dmxdev;
131 struct dvb_demux demux;
132
133 atomic_t users;
134 atomic_t active_feed;
135
136 /* data transfer */
137 s32 is_streaming;
138 struct urb *urb_array[DVB_SBUF_NUM];
139 struct poseidon *pd_device;
140 u8 ep_addr;
141 u8 reserved[3];
142
143 /* data for power resume*/
144 struct dvb_frontend_parameters fe_param;
145
146 /* for channel scanning */
147 int prev_freq;
148 int bandwidth;
149 unsigned long last_jiffies;
150};
151
152struct front_face {
153 /* use this field to distinguish VIDEO and VBI */
154 enum v4l2_buf_type type;
155
156 /* for host */
157 struct videobuf_queue q;
158
159 /* the bridge for host and device */
160 struct videobuf_buffer *curr_frame;
161
162 /* for device */
163 spinlock_t queue_lock;
164 struct list_head active;
165 struct poseidon *pd;
166};
167
168struct poseidon {
169 struct list_head device_list;
170
171 struct mutex lock;
172 struct kref kref;
173
174 /* for V4L2 */
175 struct v4l2_device v4l2_dev;
176
177 /* hardware info */
178 struct usb_device *udev;
179 struct usb_interface *interface;
180 int cur_transfer_mode;
181
182 struct video_data video_data; /* video */
183 struct vbi_data vbi_data; /* vbi */
184 struct poseidon_audio audio; /* audio (alsa) */
185 struct radio_data radio_data; /* FM */
186 struct pd_dvb_adapter dvb_data; /* DVB */
187
188 u32 state;
189 struct file *file_for_stream; /* the active stream*/
190
191#ifdef CONFIG_PM
192 int (*pm_suspend)(struct poseidon *);
193 int (*pm_resume)(struct poseidon *);
194 pm_message_t msg;
195
196 struct work_struct pm_work;
197 u8 portnum;
198#endif
199};
200
201struct poseidon_format {
202 char *name;
203 int fourcc; /* video4linux 2 */
204 int depth; /* bit/pixel */
205 int flags;
206};
207
208struct poseidon_tvnorm {
209 v4l2_std_id v4l2_id;
210 char name[12];
211 u32 tlg_tvnorm;
212};
213
214/* video */
215int pd_video_init(struct poseidon *);
216void pd_video_exit(struct poseidon *);
217int stop_all_video_stream(struct poseidon *);
218
219/* alsa audio */
220int poseidon_audio_init(struct poseidon *);
221int poseidon_audio_free(struct poseidon *);
222#ifdef CONFIG_PM
223int pm_alsa_suspend(struct poseidon *);
224int pm_alsa_resume(struct poseidon *);
225#endif
226
227/* dvb */
228int pd_dvb_usb_device_init(struct poseidon *);
229void pd_dvb_usb_device_exit(struct poseidon *);
230void pd_dvb_usb_device_cleanup(struct poseidon *);
231int pd_dvb_get_adapter_num(struct pd_dvb_adapter *);
232void dvb_stop_streaming(struct pd_dvb_adapter *);
233
234/* FM */
235int poseidon_fm_init(struct poseidon *);
236int poseidon_fm_exit(struct poseidon *);
237struct video_device *vdev_init(struct poseidon *, struct video_device *);
238
239/* vendor command ops */
240int send_set_req(struct poseidon*, u8, s32, s32*);
241int send_get_req(struct poseidon*, u8, s32, void*, s32*, s32);
242s32 set_tuner_mode(struct poseidon*, unsigned char);
243
244/* bulk urb alloc/free */
245int alloc_bulk_urbs_generic(struct urb **urb_array, int num,
246 struct usb_device *udev, u8 ep_addr,
247 int buf_size, gfp_t gfp_flags,
248 usb_complete_t complete_fn, void *context);
249void free_all_urb_generic(struct urb **urb_array, int num);
250
251/* misc */
252void poseidon_delete(struct kref *kref);
253void destroy_video_device(struct video_device **v_dev);
254extern int debug_mode;
255void set_debug_mode(struct video_device *vfd, int debug_mode);
256
257#ifdef CONFIG_PM
258#define in_hibernation(pd) (pd->msg.event == PM_EVENT_FREEZE)
259#else
260#define in_hibernation(pd) (0)
261#endif
262#define get_pm_count(p) (atomic_read(&(p)->interface->pm_usage_cnt))
263
264#define log(a, ...) printk(KERN_DEBUG "\t[ %s : %.3d ] "a"\n", \
265 __func__, __LINE__, ## __VA_ARGS__)
266
267/* for power management */
268#define logpm(pd) do {\
269 if (debug_mode & 0x10)\
270 log();\
271 } while (0)
272
273#define logs(f) do { \
274 if ((debug_mode & 0x4) && \
275 (f)->type == V4L2_BUF_TYPE_VBI_CAPTURE) \
276 log("type : VBI");\
277 \
278 if ((debug_mode & 0x8) && \
279 (f)->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) \
280 log("type : VIDEO");\
281 } while (0)
282#endif
diff --git a/drivers/media/video/tlg2300/pd-dvb.c b/drivers/media/video/tlg2300/pd-dvb.c
new file mode 100644
index 000000000000..4133aee568bf
--- /dev/null
+++ b/drivers/media/video/tlg2300/pd-dvb.c
@@ -0,0 +1,593 @@
1#include "pd-common.h"
2#include <linux/kernel.h>
3#include <linux/usb.h>
4#include <linux/dvb/dmx.h>
5#include <linux/delay.h>
6
7#include "vendorcmds.h"
8#include <linux/sched.h>
9#include <asm/atomic.h>
10
11static void dvb_urb_cleanup(struct pd_dvb_adapter *pd_dvb);
12
13static int dvb_bandwidth[][2] = {
14 { TLG_BW_8, BANDWIDTH_8_MHZ },
15 { TLG_BW_7, BANDWIDTH_7_MHZ },
16 { TLG_BW_6, BANDWIDTH_6_MHZ }
17};
18static int dvb_bandwidth_length = ARRAY_SIZE(dvb_bandwidth);
19
20static s32 dvb_start_streaming(struct pd_dvb_adapter *pd_dvb);
21static int poseidon_check_mode_dvbt(struct poseidon *pd)
22{
23 s32 ret = 0, cmd_status = 0;
24
25 set_current_state(TASK_INTERRUPTIBLE);
26 schedule_timeout(HZ/4);
27
28 ret = usb_set_interface(pd->udev, 0, BULK_ALTERNATE_IFACE);
29 if (ret != 0)
30 return ret;
31
32 ret = set_tuner_mode(pd, TLG_MODE_CAPS_DVB_T);
33 if (ret)
34 return ret;
35
36 /* signal source */
37 ret = send_set_req(pd, SGNL_SRC_SEL, TLG_SIG_SRC_ANTENNA, &cmd_status);
38 if (ret|cmd_status)
39 return ret;
40
41 return 0;
42}
43
44/* acquire :
45 * 1 == open
46 * 0 == release
47 */
48static int poseidon_ts_bus_ctrl(struct dvb_frontend *fe, int acquire)
49{
50 struct poseidon *pd = fe->demodulator_priv;
51 struct pd_dvb_adapter *pd_dvb;
52 int ret = 0;
53
54 if (!pd)
55 return -ENODEV;
56
57 pd_dvb = container_of(fe, struct pd_dvb_adapter, dvb_fe);
58 if (acquire) {
59 mutex_lock(&pd->lock);
60 if (pd->state & POSEIDON_STATE_DISCONNECT) {
61 ret = -ENODEV;
62 goto open_out;
63 }
64
65 if (pd->state && !(pd->state & POSEIDON_STATE_DVBT)) {
66 ret = -EBUSY;
67 goto open_out;
68 }
69
70 usb_autopm_get_interface(pd->interface);
71 if (0 == pd->state) {
72 ret = poseidon_check_mode_dvbt(pd);
73 if (ret < 0) {
74 usb_autopm_put_interface(pd->interface);
75 goto open_out;
76 }
77 pd->state |= POSEIDON_STATE_DVBT;
78 pd_dvb->bandwidth = 0;
79 pd_dvb->prev_freq = 0;
80 }
81 atomic_inc(&pd_dvb->users);
82 kref_get(&pd->kref);
83open_out:
84 mutex_unlock(&pd->lock);
85 } else {
86 dvb_stop_streaming(pd_dvb);
87
88 if (atomic_dec_and_test(&pd_dvb->users)) {
89 mutex_lock(&pd->lock);
90 pd->state &= ~POSEIDON_STATE_DVBT;
91 mutex_unlock(&pd->lock);
92 }
93 kref_put(&pd->kref, poseidon_delete);
94 usb_autopm_put_interface(pd->interface);
95 }
96 return ret;
97}
98
99static void poseidon_fe_release(struct dvb_frontend *fe)
100{
101 struct poseidon *pd = fe->demodulator_priv;
102
103#ifdef CONFIG_PM
104 pd->pm_suspend = NULL;
105 pd->pm_resume = NULL;
106#endif
107}
108
109static s32 poseidon_fe_sleep(struct dvb_frontend *fe)
110{
111 return 0;
112}
113
114/*
115 * return true if we can satisfy the conditions, else return false.
116 */
117static bool check_scan_ok(__u32 freq, int bandwidth,
118 struct pd_dvb_adapter *adapter)
119{
120 if (bandwidth < 0)
121 return false;
122
123 if (adapter->prev_freq == freq
124 && adapter->bandwidth == bandwidth) {
125 long nl = jiffies - adapter->last_jiffies;
126 unsigned int msec ;
127
128 msec = jiffies_to_msecs(abs(nl));
129 return msec > 15000 ? true : false;
130 }
131 return true;
132}
133
134/*
135 * Check if the firmware delays too long for an invalid frequency.
136 */
137static int fw_delay_overflow(struct pd_dvb_adapter *adapter)
138{
139 long nl = jiffies - adapter->last_jiffies;
140 unsigned int msec ;
141
142 msec = jiffies_to_msecs(abs(nl));
143 return msec > 800 ? true : false;
144}
145
146static int poseidon_set_fe(struct dvb_frontend *fe,
147 struct dvb_frontend_parameters *fep)
148{
149 s32 ret = 0, cmd_status = 0;
150 s32 i, bandwidth = -1;
151 struct poseidon *pd = fe->demodulator_priv;
152 struct pd_dvb_adapter *pd_dvb = &pd->dvb_data;
153
154 if (in_hibernation(pd))
155 return -EBUSY;
156
157 mutex_lock(&pd->lock);
158 for (i = 0; i < dvb_bandwidth_length; i++)
159 if (fep->u.ofdm.bandwidth == dvb_bandwidth[i][1])
160 bandwidth = dvb_bandwidth[i][0];
161
162 if (check_scan_ok(fep->frequency, bandwidth, pd_dvb)) {
163 ret = send_set_req(pd, TUNE_FREQ_SELECT,
164 fep->frequency / 1000, &cmd_status);
165 if (ret | cmd_status) {
166 log("error line");
167 goto front_out;
168 }
169
170 ret = send_set_req(pd, DVBT_BANDW_SEL,
171 bandwidth, &cmd_status);
172 if (ret | cmd_status) {
173 log("error line");
174 goto front_out;
175 }
176
177 ret = send_set_req(pd, TAKE_REQUEST, 0, &cmd_status);
178 if (ret | cmd_status) {
179 log("error line");
180 goto front_out;
181 }
182
183 /* save the context for future */
184 memcpy(&pd_dvb->fe_param, fep, sizeof(*fep));
185 pd_dvb->bandwidth = bandwidth;
186 pd_dvb->prev_freq = fep->frequency;
187 pd_dvb->last_jiffies = jiffies;
188 }
189front_out:
190 mutex_unlock(&pd->lock);
191 return ret;
192}
193
194#ifdef CONFIG_PM
195static int pm_dvb_suspend(struct poseidon *pd)
196{
197 struct pd_dvb_adapter *pd_dvb = &pd->dvb_data;
198 dvb_stop_streaming(pd_dvb);
199 dvb_urb_cleanup(pd_dvb);
200 msleep(500);
201 return 0;
202}
203
204static int pm_dvb_resume(struct poseidon *pd)
205{
206 struct pd_dvb_adapter *pd_dvb = &pd->dvb_data;
207
208 poseidon_check_mode_dvbt(pd);
209 msleep(300);
210 poseidon_set_fe(&pd_dvb->dvb_fe, &pd_dvb->fe_param);
211
212 dvb_start_streaming(pd_dvb);
213 return 0;
214}
215#endif
216
217static s32 poseidon_fe_init(struct dvb_frontend *fe)
218{
219 struct poseidon *pd = fe->demodulator_priv;
220 struct pd_dvb_adapter *pd_dvb = &pd->dvb_data;
221
222#ifdef CONFIG_PM
223 pd->pm_suspend = pm_dvb_suspend;
224 pd->pm_resume = pm_dvb_resume;
225#endif
226 memset(&pd_dvb->fe_param, 0,
227 sizeof(struct dvb_frontend_parameters));
228 return 0;
229}
230
231static int poseidon_get_fe(struct dvb_frontend *fe,
232 struct dvb_frontend_parameters *fep)
233{
234 struct poseidon *pd = fe->demodulator_priv;
235 struct pd_dvb_adapter *pd_dvb = &pd->dvb_data;
236
237 memcpy(fep, &pd_dvb->fe_param, sizeof(*fep));
238 return 0;
239}
240
241static int poseidon_fe_get_tune_settings(struct dvb_frontend *fe,
242 struct dvb_frontend_tune_settings *tune)
243{
244 tune->min_delay_ms = 1000;
245 return 0;
246}
247
248static int poseidon_read_status(struct dvb_frontend *fe, fe_status_t *stat)
249{
250 struct poseidon *pd = fe->demodulator_priv;
251 s32 ret = -1, cmd_status;
252 struct tuner_dtv_sig_stat_s status = {};
253
254 if (in_hibernation(pd))
255 return -EBUSY;
256 mutex_lock(&pd->lock);
257
258 ret = send_get_req(pd, TUNER_STATUS, TLG_MODE_DVB_T,
259 &status, &cmd_status, sizeof(status));
260 if (ret | cmd_status) {
261 log("get tuner status error");
262 goto out;
263 }
264
265 if (debug_mode)
266 log("P : %d, L %d, LB :%d", status.sig_present,
267 status.sig_locked, status.sig_lock_busy);
268
269 if (status.sig_lock_busy) {
270 goto out;
271 } else if (status.sig_present || status.sig_locked) {
272 *stat |= FE_HAS_LOCK | FE_HAS_SIGNAL | FE_HAS_CARRIER
273 | FE_HAS_SYNC | FE_HAS_VITERBI;
274 } else {
275 if (fw_delay_overflow(&pd->dvb_data))
276 *stat |= FE_TIMEDOUT;
277 }
278out:
279 mutex_unlock(&pd->lock);
280 return ret;
281}
282
283static int poseidon_read_ber(struct dvb_frontend *fe, u32 *ber)
284{
285 struct poseidon *pd = fe->demodulator_priv;
286 struct tuner_ber_rate_s tlg_ber = {};
287 s32 ret = -1, cmd_status;
288
289 mutex_lock(&pd->lock);
290 ret = send_get_req(pd, TUNER_BER_RATE, 0,
291 &tlg_ber, &cmd_status, sizeof(tlg_ber));
292 if (ret | cmd_status)
293 goto out;
294 *ber = tlg_ber.ber_rate;
295out:
296 mutex_unlock(&pd->lock);
297 return ret;
298}
299
300static s32 poseidon_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
301{
302 struct poseidon *pd = fe->demodulator_priv;
303 struct tuner_dtv_sig_stat_s status = {};
304 s32 ret = 0, cmd_status;
305
306 mutex_lock(&pd->lock);
307 ret = send_get_req(pd, TUNER_STATUS, TLG_MODE_DVB_T,
308 &status, &cmd_status, sizeof(status));
309 if (ret | cmd_status)
310 goto out;
311 if ((status.sig_present || status.sig_locked) && !status.sig_strength)
312 *strength = 0xFFFF;
313 else
314 *strength = status.sig_strength;
315out:
316 mutex_unlock(&pd->lock);
317 return ret;
318}
319
320static int poseidon_read_snr(struct dvb_frontend *fe, u16 *snr)
321{
322 return 0;
323}
324
325static int poseidon_read_unc_blocks(struct dvb_frontend *fe, u32 *unc)
326{
327 *unc = 0;
328 return 0;
329}
330
331static struct dvb_frontend_ops poseidon_frontend_ops = {
332 .info = {
333 .name = "Poseidon DVB-T",
334 .type = FE_OFDM,
335 .frequency_min = 174000000,
336 .frequency_max = 862000000,
337 .frequency_stepsize = 62500,/* FIXME */
338 .caps = FE_CAN_INVERSION_AUTO |
339 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
340 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
341 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
342 FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
343 FE_CAN_GUARD_INTERVAL_AUTO |
344 FE_CAN_RECOVER |
345 FE_CAN_HIERARCHY_AUTO,
346 },
347
348 .release = poseidon_fe_release,
349
350 .init = poseidon_fe_init,
351 .sleep = poseidon_fe_sleep,
352
353 .set_frontend = poseidon_set_fe,
354 .get_frontend = poseidon_get_fe,
355 .get_tune_settings = poseidon_fe_get_tune_settings,
356
357 .read_status = poseidon_read_status,
358 .read_ber = poseidon_read_ber,
359 .read_signal_strength = poseidon_read_signal_strength,
360 .read_snr = poseidon_read_snr,
361 .read_ucblocks = poseidon_read_unc_blocks,
362
363 .ts_bus_ctrl = poseidon_ts_bus_ctrl,
364};
365
366static void dvb_urb_irq(struct urb *urb)
367{
368 struct pd_dvb_adapter *pd_dvb = urb->context;
369 int len = urb->transfer_buffer_length;
370 struct dvb_demux *demux = &pd_dvb->demux;
371 s32 ret;
372
373 if (!pd_dvb->is_streaming || urb->status) {
374 if (urb->status == -EPROTO)
375 goto resend;
376 return;
377 }
378
379 if (urb->actual_length == len)
380 dvb_dmx_swfilter(demux, urb->transfer_buffer, len);
381 else if (urb->actual_length == len - 4) {
382 int offset;
383 u8 *buf = urb->transfer_buffer;
384
385 /*
386 * The packet size is 512,
387 * last packet contains 456 bytes tsp data
388 */
389 for (offset = 456; offset < len; offset += 512) {
390 if (!strncmp(buf + offset, "DVHS", 4)) {
391 dvb_dmx_swfilter(demux, buf, offset);
392 if (len > offset + 52 + 4) {
393 /*16 bytes trailer + 36 bytes padding */
394 buf += offset + 52;
395 len -= offset + 52 + 4;
396 dvb_dmx_swfilter(demux, buf, len);
397 }
398 break;
399 }
400 }
401 }
402
403resend:
404 ret = usb_submit_urb(urb, GFP_ATOMIC);
405 if (ret)
406 log(" usb_submit_urb failed: error %d", ret);
407}
408
409static int dvb_urb_init(struct pd_dvb_adapter *pd_dvb)
410{
411 if (pd_dvb->urb_array[0])
412 return 0;
413
414 alloc_bulk_urbs_generic(pd_dvb->urb_array, DVB_SBUF_NUM,
415 pd_dvb->pd_device->udev, pd_dvb->ep_addr,
416 DVB_URB_BUF_SIZE, GFP_KERNEL,
417 dvb_urb_irq, pd_dvb);
418 return 0;
419}
420
421static void dvb_urb_cleanup(struct pd_dvb_adapter *pd_dvb)
422{
423 free_all_urb_generic(pd_dvb->urb_array, DVB_SBUF_NUM);
424}
425
426static s32 dvb_start_streaming(struct pd_dvb_adapter *pd_dvb)
427{
428 struct poseidon *pd = pd_dvb->pd_device;
429 int ret = 0;
430
431 if (pd->state & POSEIDON_STATE_DISCONNECT)
432 return -ENODEV;
433
434 mutex_lock(&pd->lock);
435 if (!pd_dvb->is_streaming) {
436 s32 i, cmd_status = 0;
437 /*
438 * Once upon a time, there was a difficult bug lying here.
439 * ret = send_set_req(pd, TAKE_REQUEST, 0, &cmd_status);
440 */
441
442 ret = send_set_req(pd, PLAY_SERVICE, 1, &cmd_status);
443 if (ret | cmd_status)
444 goto out;
445
446 ret = dvb_urb_init(pd_dvb);
447 if (ret < 0)
448 goto out;
449
450 pd_dvb->is_streaming = 1;
451 for (i = 0; i < DVB_SBUF_NUM; i++) {
452 ret = usb_submit_urb(pd_dvb->urb_array[i],
453 GFP_KERNEL);
454 if (ret) {
455 log(" submit urb error %d", ret);
456 goto out;
457 }
458 }
459 }
460out:
461 mutex_unlock(&pd->lock);
462 return ret;
463}
464
465void dvb_stop_streaming(struct pd_dvb_adapter *pd_dvb)
466{
467 struct poseidon *pd = pd_dvb->pd_device;
468
469 mutex_lock(&pd->lock);
470 if (pd_dvb->is_streaming) {
471 s32 i, ret, cmd_status = 0;
472
473 pd_dvb->is_streaming = 0;
474
475 for (i = 0; i < DVB_SBUF_NUM; i++)
476 if (pd_dvb->urb_array[i])
477 usb_kill_urb(pd_dvb->urb_array[i]);
478
479 ret = send_set_req(pd, PLAY_SERVICE, TLG_TUNE_PLAY_SVC_STOP,
480 &cmd_status);
481 if (ret | cmd_status)
482 log("error");
483 }
484 mutex_unlock(&pd->lock);
485}
486
487static int pd_start_feed(struct dvb_demux_feed *feed)
488{
489 struct pd_dvb_adapter *pd_dvb = feed->demux->priv;
490 int ret = 0;
491
492 if (!pd_dvb)
493 return -1;
494 if (atomic_inc_return(&pd_dvb->active_feed) == 1)
495 ret = dvb_start_streaming(pd_dvb);
496 return ret;
497}
498
499static int pd_stop_feed(struct dvb_demux_feed *feed)
500{
501 struct pd_dvb_adapter *pd_dvb = feed->demux->priv;
502
503 if (!pd_dvb)
504 return -1;
505 if (atomic_dec_and_test(&pd_dvb->active_feed))
506 dvb_stop_streaming(pd_dvb);
507 return 0;
508}
509
510DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
511int pd_dvb_usb_device_init(struct poseidon *pd)
512{
513 struct pd_dvb_adapter *pd_dvb = &pd->dvb_data;
514 struct dvb_demux *dvbdemux;
515 int ret = 0;
516
517 pd_dvb->ep_addr = 0x82;
518 atomic_set(&pd_dvb->users, 0);
519 atomic_set(&pd_dvb->active_feed, 0);
520 pd_dvb->pd_device = pd;
521
522 ret = dvb_register_adapter(&pd_dvb->dvb_adap,
523 "Poseidon dvbt adapter",
524 THIS_MODULE,
525 NULL /* for hibernation correctly*/,
526 adapter_nr);
527 if (ret < 0)
528 goto error1;
529
530 /* register frontend */
531 pd_dvb->dvb_fe.demodulator_priv = pd;
532 memcpy(&pd_dvb->dvb_fe.ops, &poseidon_frontend_ops,
533 sizeof(struct dvb_frontend_ops));
534 ret = dvb_register_frontend(&pd_dvb->dvb_adap, &pd_dvb->dvb_fe);
535 if (ret < 0)
536 goto error2;
537
538 /* register demux device */
539 dvbdemux = &pd_dvb->demux;
540 dvbdemux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
541 dvbdemux->priv = pd_dvb;
542 dvbdemux->feednum = dvbdemux->filternum = 64;
543 dvbdemux->start_feed = pd_start_feed;
544 dvbdemux->stop_feed = pd_stop_feed;
545 dvbdemux->write_to_decoder = NULL;
546
547 ret = dvb_dmx_init(dvbdemux);
548 if (ret < 0)
549 goto error3;
550
551 pd_dvb->dmxdev.filternum = pd_dvb->demux.filternum;
552 pd_dvb->dmxdev.demux = &pd_dvb->demux.dmx;
553 pd_dvb->dmxdev.capabilities = 0;
554
555 ret = dvb_dmxdev_init(&pd_dvb->dmxdev, &pd_dvb->dvb_adap);
556 if (ret < 0)
557 goto error3;
558 return 0;
559
560error3:
561 dvb_unregister_frontend(&pd_dvb->dvb_fe);
562error2:
563 dvb_unregister_adapter(&pd_dvb->dvb_adap);
564error1:
565 return ret;
566}
567
568void pd_dvb_usb_device_exit(struct poseidon *pd)
569{
570 struct pd_dvb_adapter *pd_dvb = &pd->dvb_data;
571
572 while (atomic_read(&pd_dvb->users) != 0
573 || atomic_read(&pd_dvb->active_feed) != 0) {
574 set_current_state(TASK_INTERRUPTIBLE);
575 schedule_timeout(HZ);
576 }
577 dvb_dmxdev_release(&pd_dvb->dmxdev);
578 dvb_unregister_frontend(&pd_dvb->dvb_fe);
579 dvb_unregister_adapter(&pd_dvb->dvb_adap);
580 pd_dvb_usb_device_cleanup(pd);
581}
582
583void pd_dvb_usb_device_cleanup(struct poseidon *pd)
584{
585 struct pd_dvb_adapter *pd_dvb = &pd->dvb_data;
586
587 dvb_urb_cleanup(pd_dvb);
588}
589
590int pd_dvb_get_adapter_num(struct pd_dvb_adapter *pd_dvb)
591{
592 return pd_dvb->dvb_adap.num;
593}
diff --git a/drivers/media/video/tlg2300/pd-main.c b/drivers/media/video/tlg2300/pd-main.c
new file mode 100644
index 000000000000..2cf0ebf9f28b
--- /dev/null
+++ b/drivers/media/video/tlg2300/pd-main.c
@@ -0,0 +1,539 @@
1/*
2 * device driver for Telegent tlg2300 based TV cards
3 *
4 * Author :
5 * Kang Yong <kangyong@telegent.com>
6 * Zhang Xiaobing <xbzhang@telegent.com>
7 * Huang Shijie <zyziii@telegent.com> or <shijie8@gmail.com>
8 *
9 * (c) 2009 Telegent Systems
10 * (c) 2010 Telegent Systems
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <linux/version.h>
28#include <linux/kernel.h>
29#include <linux/errno.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/module.h>
33#include <linux/kref.h>
34#include <linux/suspend.h>
35#include <linux/usb/quirks.h>
36#include <linux/ctype.h>
37#include <linux/string.h>
38#include <linux/types.h>
39#include <linux/firmware.h>
40#include <linux/smp_lock.h>
41
42#include "vendorcmds.h"
43#include "pd-common.h"
44
45#define VENDOR_ID 0x1B24
46#define PRODUCT_ID 0x4001
47static struct usb_device_id id_table[] = {
48 { USB_DEVICE_AND_INTERFACE_INFO(VENDOR_ID, PRODUCT_ID, 255, 1, 0) },
49 { USB_DEVICE_AND_INTERFACE_INFO(VENDOR_ID, PRODUCT_ID, 255, 1, 1) },
50 { },
51};
52MODULE_DEVICE_TABLE(usb, id_table);
53
54int debug_mode;
55module_param(debug_mode, int, 0644);
56MODULE_PARM_DESC(debug_mode, "0 = disable, 1 = enable, 2 = verbose");
57
58const char *firmware_name = "tlg2300_firmware.bin";
59struct usb_driver poseidon_driver;
60static LIST_HEAD(pd_device_list);
61
62/*
63 * send set request to USB firmware.
64 */
65s32 send_set_req(struct poseidon *pd, u8 cmdid, s32 param, s32 *cmd_status)
66{
67 s32 ret;
68 s8 data[32] = {};
69 u16 lower_16, upper_16;
70
71 if (pd->state & POSEIDON_STATE_DISCONNECT)
72 return -ENODEV;
73
74 mdelay(30);
75
76 if (param == 0) {
77 upper_16 = lower_16 = 0;
78 } else {
79 /* send 32 bit param as two 16 bit param,little endian */
80 lower_16 = (unsigned short)(param & 0xffff);
81 upper_16 = (unsigned short)((param >> 16) & 0xffff);
82 }
83 ret = usb_control_msg(pd->udev,
84 usb_rcvctrlpipe(pd->udev, 0),
85 REQ_SET_CMD | cmdid,
86 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
87 lower_16,
88 upper_16,
89 &data,
90 sizeof(*cmd_status),
91 USB_CTRL_GET_TIMEOUT);
92
93 if (!ret) {
94 return -ENXIO;
95 } else {
96 /* 1st 4 bytes into cmd_status */
97 memcpy((char *)cmd_status, &(data[0]), sizeof(*cmd_status));
98 }
99 return 0;
100}
101
102/*
103 * send get request to Poseidon firmware.
104 */
105s32 send_get_req(struct poseidon *pd, u8 cmdid, s32 param,
106 void *buf, s32 *cmd_status, s32 datalen)
107{
108 s32 ret;
109 s8 data[128] = {};
110 u16 lower_16, upper_16;
111
112 if (pd->state & POSEIDON_STATE_DISCONNECT)
113 return -ENODEV;
114
115 mdelay(30);
116 if (param == 0) {
117 upper_16 = lower_16 = 0;
118 } else {
119 /*send 32 bit param as two 16 bit param, little endian */
120 lower_16 = (unsigned short)(param & 0xffff);
121 upper_16 = (unsigned short)((param >> 16) & 0xffff);
122 }
123 ret = usb_control_msg(pd->udev,
124 usb_rcvctrlpipe(pd->udev, 0),
125 REQ_GET_CMD | cmdid,
126 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
127 lower_16,
128 upper_16,
129 &data,
130 (datalen + sizeof(*cmd_status)),
131 USB_CTRL_GET_TIMEOUT);
132
133 if (ret < 0) {
134 return -ENXIO;
135 } else {
136 /* 1st 4 bytes into cmd_status, remaining data into cmd_data */
137 memcpy((char *)cmd_status, &data[0], sizeof(*cmd_status));
138 memcpy((char *)buf, &data[sizeof(*cmd_status)], datalen);
139 }
140 return 0;
141}
142
143static int pm_notifier_block(struct notifier_block *nb,
144 unsigned long event, void *dummy)
145{
146 struct poseidon *pd = NULL;
147 struct list_head *node, *next;
148
149 switch (event) {
150 case PM_POST_HIBERNATION:
151 list_for_each_safe(node, next, &pd_device_list) {
152 struct usb_device *udev;
153 struct usb_interface *iface;
154 int rc = 0;
155
156 pd = container_of(node, struct poseidon, device_list);
157 udev = pd->udev;
158 iface = pd->interface;
159
160 /* It will cause the system to reload the firmware */
161 rc = usb_lock_device_for_reset(udev, iface);
162 if (rc >= 0) {
163 usb_reset_device(udev);
164 usb_unlock_device(udev);
165 }
166 }
167 break;
168 default:
169 break;
170 }
171 log("event :%ld\n", event);
172 return 0;
173}
174
175static struct notifier_block pm_notifer = {
176 .notifier_call = pm_notifier_block,
177};
178
179int set_tuner_mode(struct poseidon *pd, unsigned char mode)
180{
181 s32 ret, cmd_status;
182
183 if (pd->state & POSEIDON_STATE_DISCONNECT)
184 return -ENODEV;
185
186 ret = send_set_req(pd, TUNE_MODE_SELECT, mode, &cmd_status);
187 if (ret || cmd_status)
188 return -ENXIO;
189 return 0;
190}
191
192void poseidon_delete(struct kref *kref)
193{
194 struct poseidon *pd = container_of(kref, struct poseidon, kref);
195
196 if (!pd)
197 return;
198 list_del_init(&pd->device_list);
199
200 pd_dvb_usb_device_cleanup(pd);
201 /* clean_audio_data(&pd->audio_data);*/
202
203 if (pd->udev) {
204 usb_put_dev(pd->udev);
205 pd->udev = NULL;
206 }
207 if (pd->interface) {
208 usb_put_intf(pd->interface);
209 pd->interface = NULL;
210 }
211 kfree(pd);
212 log();
213}
214
215static int firmware_download(struct usb_device *udev)
216{
217 int ret = 0, actual_length;
218 const struct firmware *fw = NULL;
219 void *fwbuf = NULL;
220 size_t fwlength = 0, offset;
221 size_t max_packet_size;
222
223 ret = request_firmware(&fw, firmware_name, &udev->dev);
224 if (ret) {
225 log("download err : %d", ret);
226 return ret;
227 }
228
229 fwlength = fw->size;
230
231 fwbuf = kzalloc(fwlength, GFP_KERNEL);
232 if (!fwbuf) {
233 ret = -ENOMEM;
234 goto out;
235 }
236 memcpy(fwbuf, fw->data, fwlength);
237
238 max_packet_size = udev->ep_out[0x1]->desc.wMaxPacketSize;
239 log("\t\t download size : %d", (int)max_packet_size);
240
241 for (offset = 0; offset < fwlength; offset += max_packet_size) {
242 actual_length = 0;
243 ret = usb_bulk_msg(udev,
244 usb_sndbulkpipe(udev, 0x01), /* ep 1 */
245 fwbuf + offset,
246 min(max_packet_size, fwlength - offset),
247 &actual_length,
248 HZ * 10);
249 if (ret)
250 break;
251 }
252 kfree(fwbuf);
253out:
254 release_firmware(fw);
255 return ret;
256}
257
258static inline struct poseidon *get_pd(struct usb_interface *intf)
259{
260 return usb_get_intfdata(intf);
261}
262
263#ifdef CONFIG_PM
264/* one-to-one map : poseidon{} <----> usb_device{}'s port */
265static inline void set_map_flags(struct poseidon *pd, struct usb_device *udev)
266{
267 pd->portnum = udev->portnum;
268}
269
270static inline int get_autopm_ref(struct poseidon *pd)
271{
272 return pd->video_data.users + pd->vbi_data.users + pd->audio.users
273 + atomic_read(&pd->dvb_data.users) + pd->radio_data.users;
274}
275
276/* fixup something for poseidon */
277static inline struct poseidon *fixup(struct poseidon *pd)
278{
279 int count;
280
281 /* old udev and interface have gone, so put back reference . */
282 count = get_autopm_ref(pd);
283 log("count : %d, ref count : %d", count, get_pm_count(pd));
284 while (count--)
285 usb_autopm_put_interface(pd->interface);
286 /*usb_autopm_set_interface(pd->interface); */
287
288 usb_put_dev(pd->udev);
289 usb_put_intf(pd->interface);
290 log("event : %d\n", pd->msg.event);
291 return pd;
292}
293
294static struct poseidon *find_old_poseidon(struct usb_device *udev)
295{
296 struct poseidon *pd;
297
298 list_for_each_entry(pd, &pd_device_list, device_list) {
299 if (pd->portnum == udev->portnum && in_hibernation(pd))
300 return fixup(pd);
301 }
302 return NULL;
303}
304
305/* Is the card working now ? */
306static inline int is_working(struct poseidon *pd)
307{
308 return get_pm_count(pd) > 0;
309}
310
311static int poseidon_suspend(struct usb_interface *intf, pm_message_t msg)
312{
313 struct poseidon *pd = get_pd(intf);
314
315 if (!pd)
316 return 0;
317 if (!is_working(pd)) {
318 if (get_pm_count(pd) <= 0 && !in_hibernation(pd)) {
319 pd->msg.event = PM_EVENT_AUTO_SUSPEND;
320 pd->pm_resume = NULL; /* a good guard */
321 printk(KERN_DEBUG "\n\t+ TLG2300 auto suspend +\n\n");
322 }
323 return 0;
324 }
325 pd->msg = msg; /* save it here */
326 logpm(pd);
327 return pd->pm_suspend ? pd->pm_suspend(pd) : 0;
328}
329
330static int poseidon_resume(struct usb_interface *intf)
331{
332 struct poseidon *pd = get_pd(intf);
333
334 if (!pd)
335 return 0;
336 printk(KERN_DEBUG "\n\t ++ TLG2300 resume ++\n\n");
337
338 if (!is_working(pd)) {
339 if (PM_EVENT_AUTO_SUSPEND == pd->msg.event)
340 pd->msg = PMSG_ON;
341 return 0;
342 }
343 if (in_hibernation(pd)) {
344 logpm(pd);
345 return 0;
346 }
347 logpm(pd);
348 return pd->pm_resume ? pd->pm_resume(pd) : 0;
349}
350
351static void hibernation_resume(struct work_struct *w)
352{
353 struct poseidon *pd = container_of(w, struct poseidon, pm_work);
354 int count;
355
356 pd->msg.event = 0; /* clear it here */
357 pd->state &= ~POSEIDON_STATE_DISCONNECT;
358
359 /* set the new interface's reference */
360 count = get_autopm_ref(pd);
361 while (count--)
362 usb_autopm_get_interface(pd->interface);
363
364 /* resume the context */
365 logpm(pd);
366 if (pd->pm_resume)
367 pd->pm_resume(pd);
368}
369#else /* CONFIG_PM is not enabled: */
370static inline struct poseidon *find_old_poseidon(struct usb_device *udev)
371{
372 return NULL;
373}
374
375static inline void set_map_flags(struct poseidon *pd, struct usb_device *udev)
376{
377}
378#endif
379
380static bool check_firmware(struct usb_device *udev, int *down_firmware)
381{
382 void *buf;
383 int ret;
384 struct cmd_firmware_vers_s *cmd_firm;
385
386 buf = kzalloc(sizeof(*cmd_firm) + sizeof(u32), GFP_KERNEL);
387 if (!buf)
388 return -ENOMEM;
389 ret = usb_control_msg(udev,
390 usb_rcvctrlpipe(udev, 0),
391 REQ_GET_CMD | GET_FW_ID,
392 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
393 0,
394 0,
395 buf,
396 sizeof(*cmd_firm) + sizeof(u32),
397 USB_CTRL_GET_TIMEOUT);
398 kfree(buf);
399
400 if (ret < 0) {
401 *down_firmware = 1;
402 return firmware_download(udev);
403 }
404 return ret;
405}
406
407static int poseidon_probe(struct usb_interface *interface,
408 const struct usb_device_id *id)
409{
410 struct usb_device *udev = interface_to_usbdev(interface);
411 struct poseidon *pd = NULL;
412 int ret = 0;
413 int new_one = 0;
414
415 /* download firmware */
416 check_firmware(udev, &ret);
417 if (ret)
418 return 0;
419
420 /* Do I recovery from the hibernate ? */
421 pd = find_old_poseidon(udev);
422 if (!pd) {
423 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
424 if (!pd)
425 return -ENOMEM;
426 kref_init(&pd->kref);
427 set_map_flags(pd, udev);
428 new_one = 1;
429 }
430
431 pd->udev = usb_get_dev(udev);
432 pd->interface = usb_get_intf(interface);
433 usb_set_intfdata(interface, pd);
434
435 if (new_one) {
436 struct device *dev = &interface->dev;
437
438 logpm(pd);
439 mutex_init(&pd->lock);
440
441 /* register v4l2 device */
442 snprintf(pd->v4l2_dev.name, sizeof(pd->v4l2_dev.name), "%s %s",
443 dev->driver->name, dev_name(dev));
444 ret = v4l2_device_register(NULL, &pd->v4l2_dev);
445
446 /* register devices in directory /dev */
447 ret = pd_video_init(pd);
448 poseidon_audio_init(pd);
449 poseidon_fm_init(pd);
450 pd_dvb_usb_device_init(pd);
451
452 INIT_LIST_HEAD(&pd->device_list);
453 list_add_tail(&pd->device_list, &pd_device_list);
454 }
455
456 device_init_wakeup(&udev->dev, 1);
457#ifdef CONFIG_PM
458 pd->udev->autosuspend_disabled = 0;
459 pd->udev->autosuspend_delay = HZ * PM_SUSPEND_DELAY;
460
461 if (in_hibernation(pd)) {
462 INIT_WORK(&pd->pm_work, hibernation_resume);
463 schedule_work(&pd->pm_work);
464 }
465#endif
466 return 0;
467}
468
469static void poseidon_disconnect(struct usb_interface *interface)
470{
471 struct poseidon *pd = get_pd(interface);
472
473 if (!pd)
474 return;
475 logpm(pd);
476 if (in_hibernation(pd))
477 return;
478
479 mutex_lock(&pd->lock);
480 pd->state |= POSEIDON_STATE_DISCONNECT;
481 mutex_unlock(&pd->lock);
482
483 /* stop urb transferring */
484 stop_all_video_stream(pd);
485 dvb_stop_streaming(&pd->dvb_data);
486
487 /*unregister v4l2 device */
488 v4l2_device_unregister(&pd->v4l2_dev);
489
490 lock_kernel();
491 {
492 pd_dvb_usb_device_exit(pd);
493 poseidon_fm_exit(pd);
494
495 poseidon_audio_free(pd);
496 pd_video_exit(pd);
497 }
498 unlock_kernel();
499
500 usb_set_intfdata(interface, NULL);
501 kref_put(&pd->kref, poseidon_delete);
502}
503
504struct usb_driver poseidon_driver = {
505 .name = "poseidon",
506 .probe = poseidon_probe,
507 .disconnect = poseidon_disconnect,
508 .id_table = id_table,
509#ifdef CONFIG_PM
510 .suspend = poseidon_suspend,
511 .resume = poseidon_resume,
512#endif
513 .supports_autosuspend = 1,
514};
515
516static int __init poseidon_init(void)
517{
518 int ret;
519
520 ret = usb_register(&poseidon_driver);
521 if (ret)
522 return ret;
523 register_pm_notifier(&pm_notifer);
524 return ret;
525}
526
527static void __exit poseidon_exit(void)
528{
529 log();
530 unregister_pm_notifier(&pm_notifer);
531 usb_deregister(&poseidon_driver);
532}
533
534module_init(poseidon_init);
535module_exit(poseidon_exit);
536
537MODULE_AUTHOR("Telegent Systems");
538MODULE_DESCRIPTION("For tlg2300-based USB device ");
539MODULE_LICENSE("GPL");
diff --git a/drivers/media/video/tlg2300/pd-radio.c b/drivers/media/video/tlg2300/pd-radio.c
new file mode 100644
index 000000000000..755766b15157
--- /dev/null
+++ b/drivers/media/video/tlg2300/pd-radio.c
@@ -0,0 +1,420 @@
1#include <linux/init.h>
2#include <linux/list.h>
3#include <linux/module.h>
4#include <linux/kernel.h>
5#include <linux/bitmap.h>
6#include <linux/usb.h>
7#include <linux/i2c.h>
8#include <media/v4l2-dev.h>
9#include <linux/version.h>
10#include <linux/mm.h>
11#include <linux/mutex.h>
12#include <media/v4l2-ioctl.h>
13#include <linux/sched.h>
14
15#include "pd-common.h"
16#include "vendorcmds.h"
17
18static int set_frequency(struct poseidon *p, __u32 frequency);
19static int poseidon_fm_close(struct file *filp);
20static int poseidon_fm_open(struct file *filp);
21
22#define TUNER_FREQ_MIN_FM 76000000
23#define TUNER_FREQ_MAX_FM 108000000
24
25#define MAX_PREEMPHASIS (V4L2_PREEMPHASIS_75_uS + 1)
26static int preemphasis[MAX_PREEMPHASIS] = {
27 TLG_TUNE_ASTD_NONE, /* V4L2_PREEMPHASIS_DISABLED */
28 TLG_TUNE_ASTD_FM_EUR, /* V4L2_PREEMPHASIS_50_uS */
29 TLG_TUNE_ASTD_FM_US, /* V4L2_PREEMPHASIS_75_uS */
30};
31
32static int poseidon_check_mode_radio(struct poseidon *p)
33{
34 int ret;
35 u32 status;
36
37 set_current_state(TASK_INTERRUPTIBLE);
38 schedule_timeout(HZ/2);
39 ret = usb_set_interface(p->udev, 0, BULK_ALTERNATE_IFACE);
40 if (ret < 0)
41 goto out;
42
43 ret = set_tuner_mode(p, TLG_MODE_FM_RADIO);
44 if (ret != 0)
45 goto out;
46
47 ret = send_set_req(p, SGNL_SRC_SEL, TLG_SIG_SRC_ANTENNA, &status);
48 ret = send_set_req(p, TUNER_AUD_ANA_STD,
49 p->radio_data.pre_emphasis, &status);
50 ret |= send_set_req(p, TUNER_AUD_MODE,
51 TLG_TUNE_TVAUDIO_MODE_STEREO, &status);
52 ret |= send_set_req(p, AUDIO_SAMPLE_RATE_SEL,
53 ATV_AUDIO_RATE_48K, &status);
54 ret |= send_set_req(p, TUNE_FREQ_SELECT, TUNER_FREQ_MIN_FM, &status);
55out:
56 return ret;
57}
58
59#ifdef CONFIG_PM
60static int pm_fm_suspend(struct poseidon *p)
61{
62 logpm(p);
63 pm_alsa_suspend(p);
64 usb_set_interface(p->udev, 0, 0);
65 msleep(300);
66 return 0;
67}
68
69static int pm_fm_resume(struct poseidon *p)
70{
71 logpm(p);
72 poseidon_check_mode_radio(p);
73 set_frequency(p, p->radio_data.fm_freq);
74 pm_alsa_resume(p);
75 return 0;
76}
77#endif
78
79static int poseidon_fm_open(struct file *filp)
80{
81 struct video_device *vfd = video_devdata(filp);
82 struct poseidon *p = video_get_drvdata(vfd);
83 int ret = 0;
84
85 if (!p)
86 return -1;
87
88 mutex_lock(&p->lock);
89 if (p->state & POSEIDON_STATE_DISCONNECT) {
90 ret = -ENODEV;
91 goto out;
92 }
93
94 if (p->state && !(p->state & POSEIDON_STATE_FM)) {
95 ret = -EBUSY;
96 goto out;
97 }
98
99 usb_autopm_get_interface(p->interface);
100 if (0 == p->state) {
101 /* default pre-emphasis */
102 if (p->radio_data.pre_emphasis == 0)
103 p->radio_data.pre_emphasis = TLG_TUNE_ASTD_FM_EUR;
104 set_debug_mode(vfd, debug_mode);
105
106 ret = poseidon_check_mode_radio(p);
107 if (ret < 0) {
108 usb_autopm_put_interface(p->interface);
109 goto out;
110 }
111 p->state |= POSEIDON_STATE_FM;
112 }
113 p->radio_data.users++;
114 kref_get(&p->kref);
115 filp->private_data = p;
116out:
117 mutex_unlock(&p->lock);
118 return ret;
119}
120
121static int poseidon_fm_close(struct file *filp)
122{
123 struct poseidon *p = filp->private_data;
124 struct radio_data *fm = &p->radio_data;
125 uint32_t status;
126
127 mutex_lock(&p->lock);
128 fm->users--;
129 if (0 == fm->users)
130 p->state &= ~POSEIDON_STATE_FM;
131
132 if (fm->is_radio_streaming && filp == p->file_for_stream) {
133 fm->is_radio_streaming = 0;
134 send_set_req(p, PLAY_SERVICE, TLG_TUNE_PLAY_SVC_STOP, &status);
135 }
136 usb_autopm_put_interface(p->interface);
137 mutex_unlock(&p->lock);
138
139 kref_put(&p->kref, poseidon_delete);
140 filp->private_data = NULL;
141 return 0;
142}
143
144static int vidioc_querycap(struct file *file, void *priv,
145 struct v4l2_capability *v)
146{
147 struct poseidon *p = file->private_data;
148
149 strlcpy(v->driver, "tele-radio", sizeof(v->driver));
150 strlcpy(v->card, "Telegent Poseidon", sizeof(v->card));
151 usb_make_path(p->udev, v->bus_info, sizeof(v->bus_info));
152 v->version = KERNEL_VERSION(0, 0, 1);
153 v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO;
154 return 0;
155}
156
157static const struct v4l2_file_operations poseidon_fm_fops = {
158 .owner = THIS_MODULE,
159 .open = poseidon_fm_open,
160 .release = poseidon_fm_close,
161 .ioctl = video_ioctl2,
162};
163
164int tlg_fm_vidioc_g_tuner(struct file *file, void *priv, struct v4l2_tuner *vt)
165{
166 struct tuner_fm_sig_stat_s fm_stat = {};
167 int ret, status, count = 5;
168 struct poseidon *p = file->private_data;
169
170 if (vt->index != 0)
171 return -EINVAL;
172
173 vt->type = V4L2_TUNER_RADIO;
174 vt->capability = V4L2_TUNER_CAP_STEREO;
175 vt->rangelow = TUNER_FREQ_MIN_FM / 62500;
176 vt->rangehigh = TUNER_FREQ_MAX_FM / 62500;
177 vt->rxsubchans = V4L2_TUNER_SUB_STEREO;
178 vt->audmode = V4L2_TUNER_MODE_STEREO;
179 vt->signal = 0;
180 vt->afc = 0;
181
182 mutex_lock(&p->lock);
183 ret = send_get_req(p, TUNER_STATUS, TLG_MODE_FM_RADIO,
184 &fm_stat, &status, sizeof(fm_stat));
185
186 while (fm_stat.sig_lock_busy && count-- && !ret) {
187 set_current_state(TASK_INTERRUPTIBLE);
188 schedule_timeout(HZ);
189
190 ret = send_get_req(p, TUNER_STATUS, TLG_MODE_FM_RADIO,
191 &fm_stat, &status, sizeof(fm_stat));
192 }
193 mutex_unlock(&p->lock);
194
195 if (ret || status) {
196 vt->signal = 0;
197 } else if ((fm_stat.sig_present || fm_stat.sig_locked)
198 && fm_stat.sig_strength == 0) {
199 vt->signal = 0xffff;
200 } else
201 vt->signal = (fm_stat.sig_strength * 255 / 10) << 8;
202
203 return 0;
204}
205
206int fm_get_freq(struct file *file, void *priv, struct v4l2_frequency *argp)
207{
208 struct poseidon *p = file->private_data;
209
210 argp->frequency = p->radio_data.fm_freq;
211 return 0;
212}
213
214static int set_frequency(struct poseidon *p, __u32 frequency)
215{
216 __u32 freq ;
217 int ret, status;
218
219 mutex_lock(&p->lock);
220
221 ret = send_set_req(p, TUNER_AUD_ANA_STD,
222 p->radio_data.pre_emphasis, &status);
223
224 freq = (frequency * 125) * 500 / 1000;/* kHZ */
225 if (freq < TUNER_FREQ_MIN_FM/1000 || freq > TUNER_FREQ_MAX_FM/1000) {
226 ret = -EINVAL;
227 goto error;
228 }
229
230 ret = send_set_req(p, TUNE_FREQ_SELECT, freq, &status);
231 if (ret < 0)
232 goto error ;
233 ret = send_set_req(p, TAKE_REQUEST, 0, &status);
234
235 set_current_state(TASK_INTERRUPTIBLE);
236 schedule_timeout(HZ/4);
237 if (!p->radio_data.is_radio_streaming) {
238 ret = send_set_req(p, TAKE_REQUEST, 0, &status);
239 ret = send_set_req(p, PLAY_SERVICE,
240 TLG_TUNE_PLAY_SVC_START, &status);
241 p->radio_data.is_radio_streaming = 1;
242 }
243 p->radio_data.fm_freq = frequency;
244error:
245 mutex_unlock(&p->lock);
246 return ret;
247}
248
249int fm_set_freq(struct file *file, void *priv, struct v4l2_frequency *argp)
250{
251 struct poseidon *p = file->private_data;
252
253 p->file_for_stream = file;
254#ifdef CONFIG_PM
255 p->pm_suspend = pm_fm_suspend;
256 p->pm_resume = pm_fm_resume;
257#endif
258 return set_frequency(p, argp->frequency);
259}
260
261int tlg_fm_vidioc_g_ctrl(struct file *file, void *priv,
262 struct v4l2_control *arg)
263{
264 return 0;
265}
266
267int tlg_fm_vidioc_g_exts_ctrl(struct file *file, void *fh,
268 struct v4l2_ext_controls *ctrls)
269{
270 struct poseidon *p = file->private_data;
271 int i;
272
273 if (ctrls->ctrl_class != V4L2_CTRL_CLASS_FM_TX)
274 return -EINVAL;
275
276 for (i = 0; i < ctrls->count; i++) {
277 struct v4l2_ext_control *ctrl = ctrls->controls + i;
278
279 if (ctrl->id != V4L2_CID_TUNE_PREEMPHASIS)
280 continue;
281
282 if (i < MAX_PREEMPHASIS)
283 ctrl->value = p->radio_data.pre_emphasis;
284 }
285 return 0;
286}
287
288int tlg_fm_vidioc_s_exts_ctrl(struct file *file, void *fh,
289 struct v4l2_ext_controls *ctrls)
290{
291 int i;
292
293 if (ctrls->ctrl_class != V4L2_CTRL_CLASS_FM_TX)
294 return -EINVAL;
295
296 for (i = 0; i < ctrls->count; i++) {
297 struct v4l2_ext_control *ctrl = ctrls->controls + i;
298
299 if (ctrl->id != V4L2_CID_TUNE_PREEMPHASIS)
300 continue;
301
302 if (ctrl->value >= 0 && ctrl->value < MAX_PREEMPHASIS) {
303 struct poseidon *p = file->private_data;
304 int pre_emphasis = preemphasis[ctrl->value];
305 u32 status;
306
307 send_set_req(p, TUNER_AUD_ANA_STD,
308 pre_emphasis, &status);
309 p->radio_data.pre_emphasis = pre_emphasis;
310 }
311 }
312 return 0;
313}
314
315int tlg_fm_vidioc_s_ctrl(struct file *file, void *priv,
316 struct v4l2_control *ctrl)
317{
318 return 0;
319}
320
321int tlg_fm_vidioc_queryctrl(struct file *file, void *priv,
322 struct v4l2_queryctrl *ctrl)
323{
324 if (!(ctrl->id & V4L2_CTRL_FLAG_NEXT_CTRL))
325 return -EINVAL;
326
327 ctrl->id &= ~V4L2_CTRL_FLAG_NEXT_CTRL;
328 if (ctrl->id != V4L2_CID_TUNE_PREEMPHASIS) {
329 /* return the next supported control */
330 ctrl->id = V4L2_CID_TUNE_PREEMPHASIS;
331 v4l2_ctrl_query_fill(ctrl, V4L2_PREEMPHASIS_DISABLED,
332 V4L2_PREEMPHASIS_75_uS, 1,
333 V4L2_PREEMPHASIS_50_uS);
334 ctrl->flags = V4L2_CTRL_FLAG_UPDATE;
335 return 0;
336 }
337 return -EINVAL;
338}
339
340int tlg_fm_vidioc_querymenu(struct file *file, void *fh,
341 struct v4l2_querymenu *qmenu)
342{
343 return v4l2_ctrl_query_menu(qmenu, NULL, NULL);
344}
345
346static int vidioc_s_tuner(struct file *file, void *priv, struct v4l2_tuner *vt)
347{
348 return vt->index > 0 ? -EINVAL : 0;
349}
350static int vidioc_s_audio(struct file *file, void *priv, struct v4l2_audio *va)
351{
352 return (va->index != 0) ? -EINVAL : 0;
353}
354
355static int vidioc_g_audio(struct file *file, void *priv, struct v4l2_audio *a)
356{
357 a->index = 0;
358 a->mode = 0;
359 a->capability = V4L2_AUDCAP_STEREO;
360 strcpy(a->name, "Radio");
361 return 0;
362}
363
364static int vidioc_s_input(struct file *filp, void *priv, u32 i)
365{
366 return (i != 0) ? -EINVAL : 0;
367}
368
369static int vidioc_g_input(struct file *filp, void *priv, u32 *i)
370{
371 return (*i != 0) ? -EINVAL : 0;
372}
373
374static const struct v4l2_ioctl_ops poseidon_fm_ioctl_ops = {
375 .vidioc_querycap = vidioc_querycap,
376 .vidioc_g_audio = vidioc_g_audio,
377 .vidioc_s_audio = vidioc_s_audio,
378 .vidioc_g_input = vidioc_g_input,
379 .vidioc_s_input = vidioc_s_input,
380 .vidioc_queryctrl = tlg_fm_vidioc_queryctrl,
381 .vidioc_querymenu = tlg_fm_vidioc_querymenu,
382 .vidioc_g_ctrl = tlg_fm_vidioc_g_ctrl,
383 .vidioc_s_ctrl = tlg_fm_vidioc_s_ctrl,
384 .vidioc_s_ext_ctrls = tlg_fm_vidioc_s_exts_ctrl,
385 .vidioc_g_ext_ctrls = tlg_fm_vidioc_g_exts_ctrl,
386 .vidioc_s_tuner = vidioc_s_tuner,
387 .vidioc_g_tuner = tlg_fm_vidioc_g_tuner,
388 .vidioc_g_frequency = fm_get_freq,
389 .vidioc_s_frequency = fm_set_freq,
390};
391
392static struct video_device poseidon_fm_template = {
393 .name = "Telegent-Radio",
394 .fops = &poseidon_fm_fops,
395 .minor = -1,
396 .release = video_device_release,
397 .ioctl_ops = &poseidon_fm_ioctl_ops,
398};
399
400int poseidon_fm_init(struct poseidon *p)
401{
402 struct video_device *fm_dev;
403
404 fm_dev = vdev_init(p, &poseidon_fm_template);
405 if (fm_dev == NULL)
406 return -1;
407
408 if (video_register_device(fm_dev, VFL_TYPE_RADIO, -1) < 0) {
409 video_device_release(fm_dev);
410 return -1;
411 }
412 p->radio_data.fm_dev = fm_dev;
413 return 0;
414}
415
416int poseidon_fm_exit(struct poseidon *p)
417{
418 destroy_video_device(&p->radio_data.fm_dev);
419 return 0;
420}
diff --git a/drivers/media/video/tlg2300/pd-video.c b/drivers/media/video/tlg2300/pd-video.c
new file mode 100644
index 000000000000..becfba6a3041
--- /dev/null
+++ b/drivers/media/video/tlg2300/pd-video.c
@@ -0,0 +1,1667 @@
1#include <linux/fs.h>
2#include <linux/vmalloc.h>
3#include <linux/videodev2.h>
4#include <linux/usb.h>
5#include <linux/mm.h>
6#include <linux/sched.h>
7
8#include <media/v4l2-ioctl.h>
9#include <media/v4l2-dev.h>
10
11#include "pd-common.h"
12#include "vendorcmds.h"
13
14static int pm_video_suspend(struct poseidon *pd);
15static int pm_video_resume(struct poseidon *pd);
16static void iso_bubble_handler(struct work_struct *w);
17
18int usb_transfer_mode;
19module_param(usb_transfer_mode, int, 0644);
20MODULE_PARM_DESC(usb_transfer_mode, "0 = Bulk, 1 = Isochronous");
21
22static const struct poseidon_format poseidon_formats[] = {
23 { "YUV 422", V4L2_PIX_FMT_YUYV, 16, 0},
24 { "RGB565", V4L2_PIX_FMT_RGB565, 16, 0},
25};
26
27static const struct poseidon_tvnorm poseidon_tvnorms[] = {
28 { V4L2_STD_PAL_D, "PAL-D", TLG_TUNE_VSTD_PAL_D },
29 { V4L2_STD_PAL_B, "PAL-B", TLG_TUNE_VSTD_PAL_B },
30 { V4L2_STD_PAL_G, "PAL-G", TLG_TUNE_VSTD_PAL_G },
31 { V4L2_STD_PAL_H, "PAL-H", TLG_TUNE_VSTD_PAL_H },
32 { V4L2_STD_PAL_I, "PAL-I", TLG_TUNE_VSTD_PAL_I },
33 { V4L2_STD_PAL_M, "PAL-M", TLG_TUNE_VSTD_PAL_M },
34 { V4L2_STD_PAL_N, "PAL-N", TLG_TUNE_VSTD_PAL_N_COMBO },
35 { V4L2_STD_PAL_Nc, "PAL-Nc", TLG_TUNE_VSTD_PAL_N_COMBO },
36 { V4L2_STD_NTSC_M, "NTSC-M", TLG_TUNE_VSTD_NTSC_M },
37 { V4L2_STD_NTSC_M_JP, "NTSC-JP", TLG_TUNE_VSTD_NTSC_M_J },
38 { V4L2_STD_SECAM_B, "SECAM-B", TLG_TUNE_VSTD_SECAM_B },
39 { V4L2_STD_SECAM_D, "SECAM-D", TLG_TUNE_VSTD_SECAM_D },
40 { V4L2_STD_SECAM_G, "SECAM-G", TLG_TUNE_VSTD_SECAM_G },
41 { V4L2_STD_SECAM_H, "SECAM-H", TLG_TUNE_VSTD_SECAM_H },
42 { V4L2_STD_SECAM_K, "SECAM-K", TLG_TUNE_VSTD_SECAM_K },
43 { V4L2_STD_SECAM_K1, "SECAM-K1", TLG_TUNE_VSTD_SECAM_K1 },
44 { V4L2_STD_SECAM_L, "SECAM-L", TLG_TUNE_VSTD_SECAM_L },
45 { V4L2_STD_SECAM_LC, "SECAM-LC", TLG_TUNE_VSTD_SECAM_L1 },
46};
47static const unsigned int POSEIDON_TVNORMS = ARRAY_SIZE(poseidon_tvnorms);
48
49struct pd_audio_mode {
50 u32 tlg_audio_mode;
51 u32 v4l2_audio_sub;
52 u32 v4l2_audio_mode;
53};
54
55static const struct pd_audio_mode pd_audio_modes[] = {
56 { TLG_TUNE_TVAUDIO_MODE_MONO, V4L2_TUNER_SUB_MONO,
57 V4L2_TUNER_MODE_MONO },
58 { TLG_TUNE_TVAUDIO_MODE_STEREO, V4L2_TUNER_SUB_STEREO,
59 V4L2_TUNER_MODE_STEREO },
60 { TLG_TUNE_TVAUDIO_MODE_LANG_A, V4L2_TUNER_SUB_LANG1,
61 V4L2_TUNER_MODE_LANG1 },
62 { TLG_TUNE_TVAUDIO_MODE_LANG_B, V4L2_TUNER_SUB_LANG2,
63 V4L2_TUNER_MODE_LANG2 },
64 { TLG_TUNE_TVAUDIO_MODE_LANG_C, V4L2_TUNER_SUB_LANG1,
65 V4L2_TUNER_MODE_LANG1_LANG2 }
66};
67static const unsigned int POSEIDON_AUDIOMODS = ARRAY_SIZE(pd_audio_modes);
68
69struct pd_input {
70 char *name;
71 uint32_t tlg_src;
72};
73
74static const struct pd_input pd_inputs[] = {
75 { "TV Antenna", TLG_SIG_SRC_ANTENNA },
76 { "TV Cable", TLG_SIG_SRC_CABLE },
77 { "TV SVideo", TLG_SIG_SRC_SVIDEO },
78 { "TV Composite", TLG_SIG_SRC_COMPOSITE }
79};
80static const unsigned int POSEIDON_INPUTS = ARRAY_SIZE(pd_inputs);
81
82struct poseidon_control {
83 struct v4l2_queryctrl v4l2_ctrl;
84 enum cmd_custom_param_id vc_id;
85};
86
87static struct poseidon_control controls[] = {
88 {
89 { V4L2_CID_BRIGHTNESS, V4L2_CTRL_TYPE_INTEGER,
90 "brightness", 0, 10000, 1, 100, 0, },
91 CUST_PARM_ID_BRIGHTNESS_CTRL
92 }, {
93 { V4L2_CID_CONTRAST, V4L2_CTRL_TYPE_INTEGER,
94 "contrast", 0, 10000, 1, 100, 0, },
95 CUST_PARM_ID_CONTRAST_CTRL,
96 }, {
97 { V4L2_CID_HUE, V4L2_CTRL_TYPE_INTEGER,
98 "hue", 0, 10000, 1, 100, 0, },
99 CUST_PARM_ID_HUE_CTRL,
100 }, {
101 { V4L2_CID_SATURATION, V4L2_CTRL_TYPE_INTEGER,
102 "saturation", 0, 10000, 1, 100, 0, },
103 CUST_PARM_ID_SATURATION_CTRL,
104 },
105};
106
107struct video_std_to_audio_std {
108 v4l2_std_id video_std;
109 int audio_std;
110};
111
112static const struct video_std_to_audio_std video_to_audio_map[] = {
113 /* country : { 27, 32, 33, 34, 36, 44, 45, 46, 47, 48, 64,
114 65, 86, 351, 352, 353, 354, 358, 372, 852, 972 } */
115 { (V4L2_STD_PAL_I | V4L2_STD_PAL_B | V4L2_STD_PAL_D |
116 V4L2_STD_SECAM_L | V4L2_STD_SECAM_D), TLG_TUNE_ASTD_NICAM },
117
118 /* country : { 1, 52, 54, 55, 886 } */
119 {V4L2_STD_NTSC_M | V4L2_STD_PAL_N | V4L2_STD_PAL_M, TLG_TUNE_ASTD_BTSC},
120
121 /* country : { 81 } */
122 { V4L2_STD_NTSC_M_JP, TLG_TUNE_ASTD_EIAJ },
123
124 /* other country : TLG_TUNE_ASTD_A2 */
125};
126static const unsigned int map_size = ARRAY_SIZE(video_to_audio_map);
127
128static int get_audio_std(v4l2_std_id v4l2_std)
129{
130 int i = 0;
131
132 for (; i < map_size; i++) {
133 if (v4l2_std & video_to_audio_map[i].video_std)
134 return video_to_audio_map[i].audio_std;
135 }
136 return TLG_TUNE_ASTD_A2;
137}
138
139static int vidioc_querycap(struct file *file, void *fh,
140 struct v4l2_capability *cap)
141{
142 struct front_face *front = fh;
143 struct poseidon *p = front->pd;
144
145 logs(front);
146
147 strcpy(cap->driver, "tele-video");
148 strcpy(cap->card, "Telegent Poseidon");
149 usb_make_path(p->udev, cap->bus_info, sizeof(cap->bus_info));
150 cap->version = KERNEL_VERSION(0, 0, 1);
151 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_TUNER |
152 V4L2_CAP_AUDIO | V4L2_CAP_STREAMING |
153 V4L2_CAP_READWRITE | V4L2_CAP_VBI_CAPTURE;
154 return 0;
155}
156
157/*====================================================================*/
158static void init_copy(struct video_data *video, bool index)
159{
160 struct front_face *front = video->front;
161
162 video->field_count = index;
163 video->lines_copied = 0;
164 video->prev_left = 0 ;
165 video->dst = (char *)videobuf_to_vmalloc(front->curr_frame)
166 + index * video->lines_size;
167 video->vbi->copied = 0; /* set it here */
168}
169
170static bool get_frame(struct front_face *front, int *need_init)
171{
172 struct videobuf_buffer *vb = front->curr_frame;
173
174 if (vb)
175 return true;
176
177 spin_lock(&front->queue_lock);
178 if (!list_empty(&front->active)) {
179 vb = list_entry(front->active.next,
180 struct videobuf_buffer, queue);
181 if (need_init)
182 *need_init = 1;
183 front->curr_frame = vb;
184 list_del_init(&vb->queue);
185 }
186 spin_unlock(&front->queue_lock);
187
188 return !!vb;
189}
190
191/* check if the video's buffer is ready */
192static bool get_video_frame(struct front_face *front, struct video_data *video)
193{
194 int need_init = 0;
195 bool ret = true;
196
197 ret = get_frame(front, &need_init);
198 if (ret && need_init)
199 init_copy(video, 0);
200 return ret;
201}
202
203static void submit_frame(struct front_face *front)
204{
205 struct videobuf_buffer *vb = front->curr_frame;
206
207 if (vb == NULL)
208 return;
209
210 front->curr_frame = NULL;
211 vb->state = VIDEOBUF_DONE;
212 vb->field_count++;
213 do_gettimeofday(&vb->ts);
214
215 wake_up(&vb->done);
216}
217
218/*
219 * A frame is composed of two fields. If we receive all the two fields,
220 * call the submit_frame() to submit the whole frame to applications.
221 */
222static void end_field(struct video_data *video)
223{
224 /* logs(video->front); */
225 if (1 == video->field_count)
226 submit_frame(video->front);
227 else
228 init_copy(video, 1);
229}
230
231static void copy_video_data(struct video_data *video, char *src,
232 unsigned int count)
233{
234#define copy_data(len) \
235 do { \
236 if (++video->lines_copied > video->lines_per_field) \
237 goto overflow; \
238 memcpy(video->dst, src, len);\
239 video->dst += len + video->lines_size; \
240 src += len; \
241 count -= len; \
242 } while (0)
243
244 while (count && count >= video->lines_size) {
245 if (video->prev_left) {
246 copy_data(video->prev_left);
247 video->prev_left = 0;
248 continue;
249 }
250 copy_data(video->lines_size);
251 }
252 if (count && count < video->lines_size) {
253 memcpy(video->dst, src, count);
254
255 video->prev_left = video->lines_size - count;
256 video->dst += count;
257 }
258 return;
259
260overflow:
261 end_field(video);
262}
263
264static void check_trailer(struct video_data *video, char *src, int count)
265{
266 struct vbi_data *vbi = video->vbi;
267 int offset; /* trailer's offset */
268 char *buf;
269
270 offset = (video->context.pix.sizeimage / 2 + vbi->vbi_size / 2)
271 - (vbi->copied + video->lines_size * video->lines_copied);
272 if (video->prev_left)
273 offset -= (video->lines_size - video->prev_left);
274
275 if (offset > count || offset <= 0)
276 goto short_package;
277
278 buf = src + offset;
279
280 /* trailer : (VFHS) + U32 + U32 + field_num */
281 if (!strncmp(buf, "VFHS", 4)) {
282 int field_num = *((u32 *)(buf + 12));
283
284 if ((field_num & 1) ^ video->field_count) {
285 init_copy(video, video->field_count);
286 return;
287 }
288 copy_video_data(video, src, offset);
289 }
290short_package:
291 end_field(video);
292}
293
294/* ========== Check this more carefully! =========== */
295static inline void copy_vbi_data(struct vbi_data *vbi,
296 char *src, unsigned int count)
297{
298 struct front_face *front = vbi->front;
299
300 if (front && get_frame(front, NULL)) {
301 char *buf = videobuf_to_vmalloc(front->curr_frame);
302
303 if (vbi->video->field_count)
304 buf += (vbi->vbi_size / 2);
305 memcpy(buf + vbi->copied, src, count);
306 }
307 vbi->copied += count;
308}
309
310/*
311 * Copy the normal data (VBI or VIDEO) without the trailer.
312 * VBI is not interlaced, while VIDEO is interlaced.
313 */
314static inline void copy_vbi_video_data(struct video_data *video,
315 char *src, unsigned int count)
316{
317 struct vbi_data *vbi = video->vbi;
318 unsigned int vbi_delta = (vbi->vbi_size / 2) - vbi->copied;
319
320 if (vbi_delta >= count) {
321 copy_vbi_data(vbi, src, count);
322 } else {
323 if (vbi_delta) {
324 copy_vbi_data(vbi, src, vbi_delta);
325
326 /* we receive the two fields of the VBI*/
327 if (vbi->front && video->field_count)
328 submit_frame(vbi->front);
329 }
330 copy_video_data(video, src + vbi_delta, count - vbi_delta);
331 }
332}
333
334static void urb_complete_bulk(struct urb *urb)
335{
336 struct front_face *front = urb->context;
337 struct video_data *video = &front->pd->video_data;
338 char *src = (char *)urb->transfer_buffer;
339 int count = urb->actual_length;
340 int ret = 0;
341
342 if (!video->is_streaming || urb->status) {
343 if (urb->status == -EPROTO)
344 goto resend_it;
345 return;
346 }
347 if (!get_video_frame(front, video))
348 goto resend_it;
349
350 if (count == urb->transfer_buffer_length)
351 copy_vbi_video_data(video, src, count);
352 else
353 check_trailer(video, src, count);
354
355resend_it:
356 ret = usb_submit_urb(urb, GFP_ATOMIC);
357 if (ret)
358 log(" submit failed: error %d", ret);
359}
360
361/************************* for ISO *********************/
362#define GET_SUCCESS (0)
363#define GET_TRAILER (1)
364#define GET_TOO_MUCH_BUBBLE (2)
365#define GET_NONE (3)
366static int get_chunk(int start, struct urb *urb,
367 int *head, int *tail, int *bubble_err)
368{
369 struct usb_iso_packet_descriptor *pkt = NULL;
370 int ret = GET_SUCCESS;
371
372 for (*head = *tail = -1; start < urb->number_of_packets; start++) {
373 pkt = &urb->iso_frame_desc[start];
374
375 /* handle the bubble of the Hub */
376 if (-EOVERFLOW == pkt->status) {
377 if (++*bubble_err > urb->number_of_packets / 3)
378 return GET_TOO_MUCH_BUBBLE;
379 continue;
380 }
381
382 /* This is the gap */
383 if (pkt->status || pkt->actual_length <= 0
384 || pkt->actual_length > ISO_PKT_SIZE) {
385 if (*head != -1)
386 break;
387 continue;
388 }
389
390 /* a good isochronous packet */
391 if (pkt->actual_length == ISO_PKT_SIZE) {
392 if (*head == -1)
393 *head = start;
394 *tail = start;
395 continue;
396 }
397
398 /* trailer is here */
399 if (pkt->actual_length < ISO_PKT_SIZE) {
400 if (*head == -1) {
401 *head = start;
402 *tail = start;
403 return GET_TRAILER;
404 }
405 break;
406 }
407 }
408
409 if (*head == -1 && *tail == -1)
410 ret = GET_NONE;
411 return ret;
412}
413
414/*
415 * |__|------|___|-----|_______|
416 * ^ ^
417 * | |
418 * gap gap
419 */
420static void urb_complete_iso(struct urb *urb)
421{
422 struct front_face *front = urb->context;
423 struct video_data *video = &front->pd->video_data;
424 int bubble_err = 0, head = 0, tail = 0;
425 char *src = (char *)urb->transfer_buffer;
426 int ret = 0;
427
428 if (!video->is_streaming)
429 return;
430
431 do {
432 if (!get_video_frame(front, video))
433 goto out;
434
435 switch (get_chunk(head, urb, &head, &tail, &bubble_err)) {
436 case GET_SUCCESS:
437 copy_vbi_video_data(video, src + (head * ISO_PKT_SIZE),
438 (tail - head + 1) * ISO_PKT_SIZE);
439 break;
440 case GET_TRAILER:
441 check_trailer(video, src + (head * ISO_PKT_SIZE),
442 ISO_PKT_SIZE);
443 break;
444 case GET_NONE:
445 goto out;
446 case GET_TOO_MUCH_BUBBLE:
447 log("\t We got too much bubble");
448 schedule_work(&video->bubble_work);
449 return;
450 }
451 } while (head = tail + 1, head < urb->number_of_packets);
452
453out:
454 ret = usb_submit_urb(urb, GFP_ATOMIC);
455 if (ret)
456 log("usb_submit_urb err : %d", ret);
457}
458/*============================= [ end ] =====================*/
459
460static int prepare_iso_urb(struct video_data *video)
461{
462 struct usb_device *udev = video->pd->udev;
463 int i;
464
465 if (video->urb_array[0])
466 return 0;
467
468 for (i = 0; i < SBUF_NUM; i++) {
469 struct urb *urb;
470 void *mem;
471 int j;
472
473 urb = usb_alloc_urb(PK_PER_URB, GFP_KERNEL);
474 if (urb == NULL)
475 goto out;
476
477 video->urb_array[i] = urb;
478 mem = usb_buffer_alloc(udev,
479 ISO_PKT_SIZE * PK_PER_URB,
480 GFP_KERNEL,
481 &urb->transfer_dma);
482
483 urb->complete = urb_complete_iso; /* handler */
484 urb->dev = udev;
485 urb->context = video->front;
486 urb->pipe = usb_rcvisocpipe(udev,
487 video->endpoint_addr);
488 urb->interval = 1;
489 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
490 urb->number_of_packets = PK_PER_URB;
491 urb->transfer_buffer = mem;
492 urb->transfer_buffer_length = PK_PER_URB * ISO_PKT_SIZE;
493
494 for (j = 0; j < PK_PER_URB; j++) {
495 urb->iso_frame_desc[j].offset = ISO_PKT_SIZE * j;
496 urb->iso_frame_desc[j].length = ISO_PKT_SIZE;
497 }
498 }
499 return 0;
500out:
501 for (; i > 0; i--)
502 ;
503 return -ENOMEM;
504}
505
506/* return the succeeded number of the allocation */
507int alloc_bulk_urbs_generic(struct urb **urb_array, int num,
508 struct usb_device *udev, u8 ep_addr,
509 int buf_size, gfp_t gfp_flags,
510 usb_complete_t complete_fn, void *context)
511{
512 struct urb *urb;
513 void *mem;
514 int i;
515
516 for (i = 0; i < num; i++) {
517 urb = usb_alloc_urb(0, gfp_flags);
518 if (urb == NULL)
519 return i;
520
521 mem = usb_buffer_alloc(udev, buf_size, gfp_flags,
522 &urb->transfer_dma);
523 if (mem == NULL)
524 return i;
525
526 usb_fill_bulk_urb(urb, udev, usb_rcvbulkpipe(udev, ep_addr),
527 mem, buf_size, complete_fn, context);
528 urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
529 urb_array[i] = urb;
530 }
531 return i;
532}
533
534void free_all_urb_generic(struct urb **urb_array, int num)
535{
536 int i;
537 struct urb *urb;
538
539 for (i = 0; i < num; i++) {
540 urb = urb_array[i];
541 if (urb) {
542 usb_buffer_free(urb->dev,
543 urb->transfer_buffer_length,
544 urb->transfer_buffer,
545 urb->transfer_dma);
546 usb_free_urb(urb);
547 urb_array[i] = NULL;
548 }
549 }
550}
551
552static int prepare_bulk_urb(struct video_data *video)
553{
554 if (video->urb_array[0])
555 return 0;
556
557 alloc_bulk_urbs_generic(video->urb_array, SBUF_NUM,
558 video->pd->udev, video->endpoint_addr,
559 0x2000, GFP_KERNEL,
560 urb_complete_bulk, video->front);
561 return 0;
562}
563
564/* free the URBs */
565static void free_all_urb(struct video_data *video)
566{
567 free_all_urb_generic(video->urb_array, SBUF_NUM);
568}
569
570static void pd_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
571{
572 videobuf_vmalloc_free(vb);
573 vb->state = VIDEOBUF_NEEDS_INIT;
574}
575
576static void pd_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
577{
578 struct front_face *front = q->priv_data;
579 vb->state = VIDEOBUF_QUEUED;
580 list_add_tail(&vb->queue, &front->active);
581}
582
583static int pd_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
584 enum v4l2_field field)
585{
586 struct front_face *front = q->priv_data;
587 int rc;
588
589 switch (front->type) {
590 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
591 if (VIDEOBUF_NEEDS_INIT == vb->state) {
592 struct v4l2_pix_format *pix;
593
594 pix = &front->pd->video_data.context.pix;
595 vb->size = pix->sizeimage; /* real frame size */
596 vb->width = pix->width;
597 vb->height = pix->height;
598 rc = videobuf_iolock(q, vb, NULL);
599 if (rc < 0)
600 return rc;
601 }
602 break;
603 case V4L2_BUF_TYPE_VBI_CAPTURE:
604 if (VIDEOBUF_NEEDS_INIT == vb->state) {
605 vb->size = front->pd->vbi_data.vbi_size;
606 rc = videobuf_iolock(q, vb, NULL);
607 if (rc < 0)
608 return rc;
609 }
610 break;
611 default:
612 return -EINVAL;
613 }
614 vb->field = field;
615 vb->state = VIDEOBUF_PREPARED;
616 return 0;
617}
618
619int fire_all_urb(struct video_data *video)
620{
621 int i, ret;
622
623 video->is_streaming = 1;
624
625 for (i = 0; i < SBUF_NUM; i++) {
626 ret = usb_submit_urb(video->urb_array[i], GFP_KERNEL);
627 if (ret)
628 log("(%d) failed: error %d", i, ret);
629 }
630 return ret;
631}
632
633static int start_video_stream(struct poseidon *pd)
634{
635 struct video_data *video = &pd->video_data;
636 s32 cmd_status;
637
638 send_set_req(pd, TAKE_REQUEST, 0, &cmd_status);
639 send_set_req(pd, PLAY_SERVICE, TLG_TUNE_PLAY_SVC_START, &cmd_status);
640
641 if (pd->cur_transfer_mode) {
642 prepare_iso_urb(video);
643 INIT_WORK(&video->bubble_work, iso_bubble_handler);
644 } else {
645 /* The bulk mode does not need a bubble handler */
646 prepare_bulk_urb(video);
647 }
648 fire_all_urb(video);
649 return 0;
650}
651
652static int pd_buf_setup(struct videobuf_queue *q, unsigned int *count,
653 unsigned int *size)
654{
655 struct front_face *front = q->priv_data;
656 struct poseidon *pd = front->pd;
657
658 switch (front->type) {
659 default:
660 return -EINVAL;
661 case V4L2_BUF_TYPE_VIDEO_CAPTURE: {
662 struct video_data *video = &pd->video_data;
663 struct v4l2_pix_format *pix = &video->context.pix;
664
665 *size = PAGE_ALIGN(pix->sizeimage);/* page aligned frame size */
666 if (*count < 4)
667 *count = 4;
668 if (1) {
669 /* same in different altersetting */
670 video->endpoint_addr = 0x82;
671 video->vbi = &pd->vbi_data;
672 video->vbi->video = video;
673 video->pd = pd;
674 video->lines_per_field = pix->height / 2;
675 video->lines_size = pix->width * 2;
676 video->front = front;
677 }
678 return start_video_stream(pd);
679 }
680
681 case V4L2_BUF_TYPE_VBI_CAPTURE: {
682 struct vbi_data *vbi = &pd->vbi_data;
683
684 *size = PAGE_ALIGN(vbi->vbi_size);
685 log("size : %d", *size);
686 if (*count == 0)
687 *count = 4;
688 }
689 break;
690 }
691 return 0;
692}
693
694static struct videobuf_queue_ops pd_video_qops = {
695 .buf_setup = pd_buf_setup,
696 .buf_prepare = pd_buf_prepare,
697 .buf_queue = pd_buf_queue,
698 .buf_release = pd_buf_release,
699};
700
701static int vidioc_enum_fmt(struct file *file, void *fh,
702 struct v4l2_fmtdesc *f)
703{
704 if (ARRAY_SIZE(poseidon_formats) <= f->index)
705 return -EINVAL;
706 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
707 f->flags = 0;
708 f->pixelformat = poseidon_formats[f->index].fourcc;
709 strcpy(f->description, poseidon_formats[f->index].name);
710 return 0;
711}
712
713static int vidioc_g_fmt(struct file *file, void *fh, struct v4l2_format *f)
714{
715 struct front_face *front = fh;
716 struct poseidon *pd = front->pd;
717
718 logs(front);
719 f->fmt.pix = pd->video_data.context.pix;
720 return 0;
721}
722
723static int vidioc_try_fmt(struct file *file, void *fh,
724 struct v4l2_format *f)
725{
726 return 0;
727}
728
729/*
730 * VLC calls VIDIOC_S_STD before VIDIOC_S_FMT, while
731 * Mplayer calls them in the reverse order.
732 */
733static int pd_vidioc_s_fmt(struct poseidon *pd, struct v4l2_pix_format *pix)
734{
735 struct video_data *video = &pd->video_data;
736 struct running_context *context = &video->context;
737 struct v4l2_pix_format *pix_def = &context->pix;
738 s32 ret = 0, cmd_status = 0, vid_resol;
739
740 /* set the pixel format to firmware */
741 if (pix->pixelformat == V4L2_PIX_FMT_RGB565) {
742 vid_resol = TLG_TUNER_VID_FORMAT_RGB_565;
743 } else {
744 pix->pixelformat = V4L2_PIX_FMT_YUYV;
745 vid_resol = TLG_TUNER_VID_FORMAT_YUV;
746 }
747 ret = send_set_req(pd, VIDEO_STREAM_FMT_SEL,
748 vid_resol, &cmd_status);
749
750 /* set the resolution to firmware */
751 vid_resol = TLG_TUNE_VID_RES_720;
752 switch (pix->width) {
753 case 704:
754 vid_resol = TLG_TUNE_VID_RES_704;
755 break;
756 default:
757 pix->width = 720;
758 case 720:
759 break;
760 }
761 ret |= send_set_req(pd, VIDEO_ROSOLU_SEL,
762 vid_resol, &cmd_status);
763 if (ret || cmd_status) {
764 mutex_unlock(&pd->lock);
765 return -EBUSY;
766 }
767
768 pix_def->pixelformat = pix->pixelformat; /* save it */
769 pix->height = (context->tvnormid & V4L2_STD_525_60) ? 480 : 576;
770
771 /* Compare with the default setting */
772 if ((pix_def->width != pix->width)
773 || (pix_def->height != pix->height)) {
774 pix_def->width = pix->width;
775 pix_def->height = pix->height;
776 pix_def->bytesperline = pix->width * 2;
777 pix_def->sizeimage = pix->width * pix->height * 2;
778 }
779 *pix = *pix_def;
780
781 return 0;
782}
783
784static int vidioc_s_fmt(struct file *file, void *fh, struct v4l2_format *f)
785{
786 struct front_face *front = fh;
787 struct poseidon *pd = front->pd;
788
789 logs(front);
790 /* stop VBI here */
791 if (V4L2_BUF_TYPE_VIDEO_CAPTURE != f->type)
792 return -EINVAL;
793
794 mutex_lock(&pd->lock);
795 if (pd->file_for_stream == NULL)
796 pd->file_for_stream = file;
797 else if (file != pd->file_for_stream) {
798 mutex_unlock(&pd->lock);
799 return -EINVAL;
800 }
801
802 pd_vidioc_s_fmt(pd, &f->fmt.pix);
803 mutex_unlock(&pd->lock);
804 return 0;
805}
806
807static int vidioc_g_fmt_vbi(struct file *file, void *fh,
808 struct v4l2_format *v4l2_f)
809{
810 struct front_face *front = fh;
811 struct poseidon *pd = front->pd;
812 struct v4l2_vbi_format *vbi_fmt = &v4l2_f->fmt.vbi;
813
814 vbi_fmt->samples_per_line = 720 * 2;
815 vbi_fmt->sampling_rate = 6750000 * 4;
816 vbi_fmt->sample_format = V4L2_PIX_FMT_GREY;
817 vbi_fmt->offset = 64 * 4; /*FIXME: why offset */
818 if (pd->video_data.context.tvnormid & V4L2_STD_525_60) {
819 vbi_fmt->start[0] = 10;
820 vbi_fmt->start[1] = 264;
821 vbi_fmt->count[0] = V4L_NTSC_VBI_LINES;
822 vbi_fmt->count[1] = V4L_NTSC_VBI_LINES;
823 } else {
824 vbi_fmt->start[0] = 6;
825 vbi_fmt->start[1] = 314;
826 vbi_fmt->count[0] = V4L_PAL_VBI_LINES;
827 vbi_fmt->count[1] = V4L_PAL_VBI_LINES;
828 }
829 vbi_fmt->flags = V4L2_VBI_UNSYNC;
830 logs(front);
831 return 0;
832}
833
834static int set_std(struct poseidon *pd, v4l2_std_id *norm)
835{
836 struct video_data *video = &pd->video_data;
837 struct vbi_data *vbi = &pd->vbi_data;
838 struct running_context *context;
839 struct v4l2_pix_format *pix;
840 s32 i, ret = 0, cmd_status, param;
841 int height;
842
843 for (i = 0; i < POSEIDON_TVNORMS; i++) {
844 if (*norm & poseidon_tvnorms[i].v4l2_id) {
845 param = poseidon_tvnorms[i].tlg_tvnorm;
846 log("name : %s", poseidon_tvnorms[i].name);
847 goto found;
848 }
849 }
850 return -EINVAL;
851found:
852 mutex_lock(&pd->lock);
853 ret = send_set_req(pd, VIDEO_STD_SEL, param, &cmd_status);
854 if (ret || cmd_status)
855 goto out;
856
857 /* Set vbi size and check the height of the frame */
858 context = &video->context;
859 context->tvnormid = poseidon_tvnorms[i].v4l2_id;
860 if (context->tvnormid & V4L2_STD_525_60) {
861 vbi->vbi_size = V4L_NTSC_VBI_FRAMESIZE;
862 height = 480;
863 } else {
864 vbi->vbi_size = V4L_PAL_VBI_FRAMESIZE;
865 height = 576;
866 }
867
868 pix = &context->pix;
869 if (pix->height != height) {
870 pix->height = height;
871 pix->sizeimage = pix->width * pix->height * 2;
872 }
873
874out:
875 mutex_unlock(&pd->lock);
876 return ret;
877}
878
879int vidioc_s_std(struct file *file, void *fh, v4l2_std_id *norm)
880{
881 struct front_face *front = fh;
882 logs(front);
883 return set_std(front->pd, norm);
884}
885
886static int vidioc_enum_input(struct file *file, void *fh, struct v4l2_input *in)
887{
888 struct front_face *front = fh;
889
890 if (in->index < 0 || in->index >= POSEIDON_INPUTS)
891 return -EINVAL;
892 strcpy(in->name, pd_inputs[in->index].name);
893 in->type = V4L2_INPUT_TYPE_TUNER;
894
895 /*
896 * the audio input index mixed with this video input,
897 * Poseidon only have one audio/video, set to "0"
898 */
899 in->audioset = 0;
900 in->tuner = 0;
901 in->std = V4L2_STD_ALL;
902 in->status = 0;
903 logs(front);
904 return 0;
905}
906
907static int vidioc_g_input(struct file *file, void *fh, unsigned int *i)
908{
909 struct front_face *front = fh;
910 struct poseidon *pd = front->pd;
911 struct running_context *context = &pd->video_data.context;
912
913 logs(front);
914 *i = context->sig_index;
915 return 0;
916}
917
918/* We can support several inputs */
919static int vidioc_s_input(struct file *file, void *fh, unsigned int i)
920{
921 struct front_face *front = fh;
922 struct poseidon *pd = front->pd;
923 s32 ret, cmd_status;
924
925 if (i < 0 || i >= POSEIDON_INPUTS)
926 return -EINVAL;
927 ret = send_set_req(pd, SGNL_SRC_SEL,
928 pd_inputs[i].tlg_src, &cmd_status);
929 if (ret)
930 return ret;
931
932 pd->video_data.context.sig_index = i;
933 return 0;
934}
935
936static struct poseidon_control *check_control_id(__u32 id)
937{
938 struct poseidon_control *control = &controls[0];
939 int array_size = ARRAY_SIZE(controls);
940
941 for (; control < &controls[array_size]; control++)
942 if (control->v4l2_ctrl.id == id)
943 return control;
944 return NULL;
945}
946
947static int vidioc_queryctrl(struct file *file, void *fh,
948 struct v4l2_queryctrl *a)
949{
950 struct poseidon_control *control = NULL;
951
952 control = check_control_id(a->id);
953 if (!control)
954 return -EINVAL;
955
956 *a = control->v4l2_ctrl;
957 return 0;
958}
959
960static int vidioc_g_ctrl(struct file *file, void *fh, struct v4l2_control *ctrl)
961{
962 struct front_face *front = fh;
963 struct poseidon *pd = front->pd;
964 struct poseidon_control *control = NULL;
965 struct tuner_custom_parameter_s tuner_param;
966 s32 ret = 0, cmd_status;
967
968 control = check_control_id(ctrl->id);
969 if (!control)
970 return -EINVAL;
971
972 mutex_lock(&pd->lock);
973 ret = send_get_req(pd, TUNER_CUSTOM_PARAMETER, control->vc_id,
974 &tuner_param, &cmd_status, sizeof(tuner_param));
975 mutex_unlock(&pd->lock);
976
977 if (ret || cmd_status)
978 return -1;
979
980 ctrl->value = tuner_param.param_value;
981 return 0;
982}
983
984static int vidioc_s_ctrl(struct file *file, void *fh, struct v4l2_control *a)
985{
986 struct tuner_custom_parameter_s param = {0};
987 struct poseidon_control *control = NULL;
988 struct front_face *front = fh;
989 struct poseidon *pd = front->pd;
990 s32 ret = 0, cmd_status, params;
991
992 control = check_control_id(a->id);
993 if (!control)
994 return -EINVAL;
995
996 param.param_value = a->value;
997 param.param_id = control->vc_id;
998 params = *(s32 *)&param; /* temp code */
999
1000 mutex_lock(&pd->lock);
1001 ret = send_set_req(pd, TUNER_CUSTOM_PARAMETER, params, &cmd_status);
1002 ret = send_set_req(pd, TAKE_REQUEST, 0, &cmd_status);
1003 mutex_unlock(&pd->lock);
1004
1005 set_current_state(TASK_INTERRUPTIBLE);
1006 schedule_timeout(HZ/4);
1007 return ret;
1008}
1009
1010/* Audio ioctls */
1011static int vidioc_enumaudio(struct file *file, void *fh, struct v4l2_audio *a)
1012{
1013 if (0 != a->index)
1014 return -EINVAL;
1015 a->capability = V4L2_AUDCAP_STEREO;
1016 strcpy(a->name, "USB audio in");
1017 /*Poseidon have no AVL function.*/
1018 a->mode = 0;
1019 return 0;
1020}
1021
1022int vidioc_g_audio(struct file *file, void *fh, struct v4l2_audio *a)
1023{
1024 a->index = 0;
1025 a->capability = V4L2_AUDCAP_STEREO;
1026 strcpy(a->name, "USB audio in");
1027 a->mode = 0;
1028 return 0;
1029}
1030
1031int vidioc_s_audio(struct file *file, void *fh, struct v4l2_audio *a)
1032{
1033 return (0 == a->index) ? 0 : -EINVAL;
1034}
1035
1036/* Tuner ioctls */
1037static int vidioc_g_tuner(struct file *file, void *fh, struct v4l2_tuner *tuner)
1038{
1039 struct front_face *front = fh;
1040 struct poseidon *pd = front->pd;
1041 struct tuner_atv_sig_stat_s atv_stat;
1042 s32 count = 5, ret, cmd_status;
1043 int index;
1044
1045 if (0 != tuner->index)
1046 return -EINVAL;
1047
1048 mutex_lock(&pd->lock);
1049 ret = send_get_req(pd, TUNER_STATUS, TLG_MODE_ANALOG_TV,
1050 &atv_stat, &cmd_status, sizeof(atv_stat));
1051
1052 while (atv_stat.sig_lock_busy && count-- && !ret) {
1053 set_current_state(TASK_INTERRUPTIBLE);
1054 schedule_timeout(HZ);
1055
1056 ret = send_get_req(pd, TUNER_STATUS, TLG_MODE_ANALOG_TV,
1057 &atv_stat, &cmd_status, sizeof(atv_stat));
1058 }
1059 mutex_unlock(&pd->lock);
1060
1061 if (debug_mode)
1062 log("P:%d,S:%d", atv_stat.sig_present, atv_stat.sig_strength);
1063
1064 if (ret || cmd_status)
1065 tuner->signal = 0;
1066 else if (atv_stat.sig_present && !atv_stat.sig_strength)
1067 tuner->signal = 0xFFFF;
1068 else
1069 tuner->signal = (atv_stat.sig_strength * 255 / 10) << 8;
1070
1071 strcpy(tuner->name, "Telegent Systems");
1072 tuner->type = V4L2_TUNER_ANALOG_TV;
1073 tuner->rangelow = TUNER_FREQ_MIN / 62500;
1074 tuner->rangehigh = TUNER_FREQ_MAX / 62500;
1075 tuner->capability = V4L2_TUNER_CAP_NORM | V4L2_TUNER_CAP_STEREO |
1076 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1077 index = pd->video_data.context.audio_idx;
1078 tuner->rxsubchans = pd_audio_modes[index].v4l2_audio_sub;
1079 tuner->audmode = pd_audio_modes[index].v4l2_audio_mode;
1080 tuner->afc = 0;
1081 logs(front);
1082 return 0;
1083}
1084
1085static int pd_vidioc_s_tuner(struct poseidon *pd, int index)
1086{
1087 s32 ret = 0, cmd_status, param, audiomode;
1088
1089 mutex_lock(&pd->lock);
1090 param = pd_audio_modes[index].tlg_audio_mode;
1091 ret = send_set_req(pd, TUNER_AUD_MODE, param, &cmd_status);
1092 audiomode = get_audio_std(pd->video_data.context.tvnormid);
1093 ret |= send_set_req(pd, TUNER_AUD_ANA_STD, audiomode,
1094 &cmd_status);
1095 if (!ret)
1096 pd->video_data.context.audio_idx = index;
1097 mutex_unlock(&pd->lock);
1098 return ret;
1099}
1100
1101static int vidioc_s_tuner(struct file *file, void *fh, struct v4l2_tuner *a)
1102{
1103 struct front_face *front = fh;
1104 struct poseidon *pd = front->pd;
1105 int index;
1106
1107 if (0 != a->index)
1108 return -EINVAL;
1109 logs(front);
1110 for (index = 0; index < POSEIDON_AUDIOMODS; index++)
1111 if (a->audmode == pd_audio_modes[index].v4l2_audio_mode)
1112 return pd_vidioc_s_tuner(pd, index);
1113 return -EINVAL;
1114}
1115
1116static int vidioc_g_frequency(struct file *file, void *fh,
1117 struct v4l2_frequency *freq)
1118{
1119 struct front_face *front = fh;
1120 struct poseidon *pd = front->pd;
1121 struct running_context *context = &pd->video_data.context;
1122
1123 if (0 != freq->tuner)
1124 return -EINVAL;
1125 freq->frequency = context->freq;
1126 freq->type = V4L2_TUNER_ANALOG_TV;
1127 return 0;
1128}
1129
1130static int set_frequency(struct poseidon *pd, __u32 frequency)
1131{
1132 s32 ret = 0, param, cmd_status;
1133 struct running_context *context = &pd->video_data.context;
1134
1135 param = frequency * 62500 / 1000;
1136 if (param < TUNER_FREQ_MIN/1000 || param > TUNER_FREQ_MAX / 1000)
1137 return -EINVAL;
1138
1139 mutex_lock(&pd->lock);
1140 ret = send_set_req(pd, TUNE_FREQ_SELECT, param, &cmd_status);
1141 ret = send_set_req(pd, TAKE_REQUEST, 0, &cmd_status);
1142
1143 msleep(250); /* wait for a while until the hardware is ready. */
1144 context->freq = frequency;
1145 mutex_unlock(&pd->lock);
1146 return ret;
1147}
1148
1149static int vidioc_s_frequency(struct file *file, void *fh,
1150 struct v4l2_frequency *freq)
1151{
1152 struct front_face *front = fh;
1153 struct poseidon *pd = front->pd;
1154
1155 logs(front);
1156#ifdef CONFIG_PM
1157 pd->pm_suspend = pm_video_suspend;
1158 pd->pm_resume = pm_video_resume;
1159#endif
1160 return set_frequency(pd, freq->frequency);
1161}
1162
1163static int vidioc_reqbufs(struct file *file, void *fh,
1164 struct v4l2_requestbuffers *b)
1165{
1166 struct front_face *front = file->private_data;
1167 logs(front);
1168 return videobuf_reqbufs(&front->q, b);
1169}
1170
1171static int vidioc_querybuf(struct file *file, void *fh, struct v4l2_buffer *b)
1172{
1173 struct front_face *front = file->private_data;
1174 logs(front);
1175 return videobuf_querybuf(&front->q, b);
1176}
1177
1178static int vidioc_qbuf(struct file *file, void *fh, struct v4l2_buffer *b)
1179{
1180 struct front_face *front = file->private_data;
1181 return videobuf_qbuf(&front->q, b);
1182}
1183
1184static int vidioc_dqbuf(struct file *file, void *fh, struct v4l2_buffer *b)
1185{
1186 struct front_face *front = file->private_data;
1187 return videobuf_dqbuf(&front->q, b, file->f_flags & O_NONBLOCK);
1188}
1189
1190/* Just stop the URBs, do not free the URBs */
1191int usb_transfer_stop(struct video_data *video)
1192{
1193 if (video->is_streaming) {
1194 int i;
1195 s32 cmd_status;
1196 struct poseidon *pd = video->pd;
1197
1198 video->is_streaming = 0;
1199 for (i = 0; i < SBUF_NUM; ++i) {
1200 if (video->urb_array[i])
1201 usb_kill_urb(video->urb_array[i]);
1202 }
1203
1204 send_set_req(pd, PLAY_SERVICE, TLG_TUNE_PLAY_SVC_STOP,
1205 &cmd_status);
1206 }
1207 return 0;
1208}
1209
1210int stop_all_video_stream(struct poseidon *pd)
1211{
1212 struct video_data *video = &pd->video_data;
1213 struct vbi_data *vbi = &pd->vbi_data;
1214
1215 mutex_lock(&pd->lock);
1216 if (video->is_streaming) {
1217 struct front_face *front = video->front;
1218
1219 /* stop the URBs */
1220 usb_transfer_stop(video);
1221 free_all_urb(video);
1222
1223 /* stop the host side of VIDEO */
1224 videobuf_stop(&front->q);
1225 videobuf_mmap_free(&front->q);
1226
1227 /* stop the host side of VBI */
1228 front = vbi->front;
1229 if (front) {
1230 videobuf_stop(&front->q);
1231 videobuf_mmap_free(&front->q);
1232 }
1233 }
1234 mutex_unlock(&pd->lock);
1235 return 0;
1236}
1237
1238/*
1239 * The bubbles can seriously damage the video's quality,
1240 * though it occurs in very rare situation.
1241 */
1242static void iso_bubble_handler(struct work_struct *w)
1243{
1244 struct video_data *video;
1245 struct poseidon *pd;
1246
1247 video = container_of(w, struct video_data, bubble_work);
1248 pd = video->pd;
1249
1250 mutex_lock(&pd->lock);
1251 usb_transfer_stop(video);
1252 msleep(500);
1253 start_video_stream(pd);
1254 mutex_unlock(&pd->lock);
1255}
1256
1257
1258static int vidioc_streamon(struct file *file, void *fh,
1259 enum v4l2_buf_type type)
1260{
1261 struct front_face *front = fh;
1262
1263 logs(front);
1264 if (unlikely(type != front->type))
1265 return -EINVAL;
1266 return videobuf_streamon(&front->q);
1267}
1268
1269static int vidioc_streamoff(struct file *file, void *fh,
1270 enum v4l2_buf_type type)
1271{
1272 struct front_face *front = file->private_data;
1273
1274 logs(front);
1275 if (unlikely(type != front->type))
1276 return -EINVAL;
1277 return videobuf_streamoff(&front->q);
1278}
1279
1280/* Set the firmware's default values : need altersetting */
1281static int pd_video_checkmode(struct poseidon *pd)
1282{
1283 s32 ret = 0, cmd_status, audiomode;
1284
1285 set_current_state(TASK_INTERRUPTIBLE);
1286 schedule_timeout(HZ/2);
1287
1288 /* choose the altersetting */
1289 ret = usb_set_interface(pd->udev, 0,
1290 (pd->cur_transfer_mode ?
1291 ISO_3K_BULK_ALTERNATE_IFACE :
1292 BULK_ALTERNATE_IFACE));
1293 if (ret < 0)
1294 goto error;
1295
1296 /* set default parameters for PAL-D , with the VBI enabled*/
1297 ret = set_tuner_mode(pd, TLG_MODE_ANALOG_TV);
1298 ret |= send_set_req(pd, SGNL_SRC_SEL,
1299 TLG_SIG_SRC_ANTENNA, &cmd_status);
1300 ret |= send_set_req(pd, VIDEO_STD_SEL,
1301 TLG_TUNE_VSTD_PAL_D, &cmd_status);
1302 ret |= send_set_req(pd, VIDEO_STREAM_FMT_SEL,
1303 TLG_TUNER_VID_FORMAT_YUV, &cmd_status);
1304 ret |= send_set_req(pd, VIDEO_ROSOLU_SEL,
1305 TLG_TUNE_VID_RES_720, &cmd_status);
1306 ret |= send_set_req(pd, TUNE_FREQ_SELECT, TUNER_FREQ_MIN, &cmd_status);
1307 ret |= send_set_req(pd, VBI_DATA_SEL, 1, &cmd_status);/* enable vbi */
1308
1309 /* set the audio */
1310 audiomode = get_audio_std(pd->video_data.context.tvnormid);
1311 ret |= send_set_req(pd, TUNER_AUD_ANA_STD, audiomode, &cmd_status);
1312 ret |= send_set_req(pd, TUNER_AUD_MODE,
1313 TLG_TUNE_TVAUDIO_MODE_STEREO, &cmd_status);
1314 ret |= send_set_req(pd, AUDIO_SAMPLE_RATE_SEL,
1315 ATV_AUDIO_RATE_48K, &cmd_status);
1316error:
1317 return ret;
1318}
1319
1320#ifdef CONFIG_PM
1321static int pm_video_suspend(struct poseidon *pd)
1322{
1323 /* stop audio */
1324 pm_alsa_suspend(pd);
1325
1326 /* stop and free all the URBs */
1327 usb_transfer_stop(&pd->video_data);
1328 free_all_urb(&pd->video_data);
1329
1330 /* reset the interface */
1331 usb_set_interface(pd->udev, 0, 0);
1332 msleep(300);
1333 return 0;
1334}
1335
1336static int restore_v4l2_context(struct poseidon *pd,
1337 struct running_context *context)
1338{
1339 struct front_face *front = pd->video_data.front;
1340
1341 pd_video_checkmode(pd);
1342
1343 set_std(pd, &context->tvnormid);
1344 vidioc_s_input(NULL, front, context->sig_index);
1345 pd_vidioc_s_tuner(pd, context->audio_idx);
1346 pd_vidioc_s_fmt(pd, &context->pix);
1347 set_frequency(pd, context->freq);
1348 return 0;
1349}
1350
1351static int pm_video_resume(struct poseidon *pd)
1352{
1353 struct video_data *video = &pd->video_data;
1354
1355 /* resume the video */
1356 /* [1] restore the origin V4L2 parameters */
1357 restore_v4l2_context(pd, &video->context);
1358
1359 /* [2] initiate video copy variables */
1360 if (video->front->curr_frame)
1361 init_copy(video, 0);
1362
1363 /* [3] fire urbs */
1364 start_video_stream(pd);
1365
1366 /* resume the audio */
1367 pm_alsa_resume(pd);
1368 return 0;
1369}
1370#endif
1371
1372void set_debug_mode(struct video_device *vfd, int debug_mode)
1373{
1374 vfd->debug = 0;
1375 if (debug_mode & 0x1)
1376 vfd->debug = V4L2_DEBUG_IOCTL;
1377 if (debug_mode & 0x2)
1378 vfd->debug = V4L2_DEBUG_IOCTL | V4L2_DEBUG_IOCTL_ARG;
1379}
1380
1381static void init_video_context(struct running_context *context)
1382{
1383 context->sig_index = 0;
1384 context->audio_idx = 1; /* stereo */
1385 context->tvnormid = V4L2_STD_PAL_D;
1386 context->pix = (struct v4l2_pix_format) {
1387 .width = 720,
1388 .height = 576,
1389 .pixelformat = V4L2_PIX_FMT_YUYV,
1390 .field = V4L2_FIELD_INTERLACED,
1391 .bytesperline = 720 * 2,
1392 .sizeimage = 720 * 576 * 2,
1393 .colorspace = V4L2_COLORSPACE_SMPTE170M,
1394 .priv = 0
1395 };
1396}
1397
1398static int pd_video_open(struct file *file)
1399{
1400 struct video_device *vfd = video_devdata(file);
1401 struct poseidon *pd = video_get_drvdata(vfd);
1402 struct front_face *front = NULL;
1403 int ret = -ENOMEM;
1404
1405 mutex_lock(&pd->lock);
1406 usb_autopm_get_interface(pd->interface);
1407
1408 if (vfd->vfl_type == VFL_TYPE_GRABBER
1409 && !(pd->state & POSEIDON_STATE_ANALOG)) {
1410 front = kzalloc(sizeof(struct front_face), GFP_KERNEL);
1411 if (!front)
1412 goto out;
1413
1414 pd->cur_transfer_mode = usb_transfer_mode;/* bulk or iso */
1415 init_video_context(&pd->video_data.context);
1416
1417 ret = pd_video_checkmode(pd);
1418 if (ret < 0) {
1419 kfree(front);
1420 ret = -1;
1421 goto out;
1422 }
1423
1424 pd->state |= POSEIDON_STATE_ANALOG;
1425 front->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1426 pd->video_data.users++;
1427 set_debug_mode(vfd, debug_mode);
1428
1429 videobuf_queue_vmalloc_init(&front->q, &pd_video_qops,
1430 NULL, &front->queue_lock,
1431 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1432 V4L2_FIELD_INTERLACED,/* video is interlacd */
1433 sizeof(struct videobuf_buffer),/*it's enough*/
1434 front);
1435 } else if (vfd->vfl_type == VFL_TYPE_VBI
1436 && !(pd->state & POSEIDON_STATE_VBI)) {
1437 front = kzalloc(sizeof(struct front_face), GFP_KERNEL);
1438 if (!front)
1439 goto out;
1440
1441 pd->state |= POSEIDON_STATE_VBI;
1442 front->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1443 pd->vbi_data.front = front;
1444 pd->vbi_data.users++;
1445
1446 videobuf_queue_vmalloc_init(&front->q, &pd_video_qops,
1447 NULL, &front->queue_lock,
1448 V4L2_BUF_TYPE_VBI_CAPTURE,
1449 V4L2_FIELD_NONE, /* vbi is NONE mode */
1450 sizeof(struct videobuf_buffer),
1451 front);
1452 } else {
1453 /* maybe add FM support here */
1454 log("other ");
1455 ret = -EINVAL;
1456 goto out;
1457 }
1458
1459 front->pd = pd;
1460 front->curr_frame = NULL;
1461 INIT_LIST_HEAD(&front->active);
1462 spin_lock_init(&front->queue_lock);
1463
1464 file->private_data = front;
1465 kref_get(&pd->kref);
1466
1467 mutex_unlock(&pd->lock);
1468 return 0;
1469out:
1470 usb_autopm_put_interface(pd->interface);
1471 mutex_unlock(&pd->lock);
1472 return ret;
1473}
1474
1475static int pd_video_release(struct file *file)
1476{
1477 struct front_face *front = file->private_data;
1478 struct poseidon *pd = front->pd;
1479 s32 cmd_status = 0;
1480
1481 logs(front);
1482 mutex_lock(&pd->lock);
1483
1484 if (front->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
1485 pd->state &= ~POSEIDON_STATE_ANALOG;
1486
1487 /* stop the device, and free the URBs */
1488 usb_transfer_stop(&pd->video_data);
1489 free_all_urb(&pd->video_data);
1490
1491 /* stop the firmware */
1492 send_set_req(pd, PLAY_SERVICE, TLG_TUNE_PLAY_SVC_STOP,
1493 &cmd_status);
1494
1495 pd->file_for_stream = NULL;
1496 pd->video_data.users--;
1497 } else if (front->type == V4L2_BUF_TYPE_VBI_CAPTURE) {
1498 pd->state &= ~POSEIDON_STATE_VBI;
1499 pd->vbi_data.front = NULL;
1500 pd->vbi_data.users--;
1501 }
1502 videobuf_stop(&front->q);
1503 videobuf_mmap_free(&front->q);
1504
1505 usb_autopm_put_interface(pd->interface);
1506 mutex_unlock(&pd->lock);
1507
1508 kfree(front);
1509 file->private_data = NULL;
1510 kref_put(&pd->kref, poseidon_delete);
1511 return 0;
1512}
1513
1514static int pd_video_mmap(struct file *file, struct vm_area_struct *vma)
1515{
1516 struct front_face *front = file->private_data;
1517 return videobuf_mmap_mapper(&front->q, vma);
1518}
1519
1520unsigned int pd_video_poll(struct file *file, poll_table *table)
1521{
1522 struct front_face *front = file->private_data;
1523 return videobuf_poll_stream(file, &front->q, table);
1524}
1525
1526ssize_t pd_video_read(struct file *file, char __user *buffer,
1527 size_t count, loff_t *ppos)
1528{
1529 struct front_face *front = file->private_data;
1530 return videobuf_read_stream(&front->q, buffer, count, ppos,
1531 0, file->f_flags & O_NONBLOCK);
1532}
1533
1534/* This struct works for both VIDEO and VBI */
1535static const struct v4l2_file_operations pd_video_fops = {
1536 .owner = THIS_MODULE,
1537 .open = pd_video_open,
1538 .release = pd_video_release,
1539 .read = pd_video_read,
1540 .poll = pd_video_poll,
1541 .mmap = pd_video_mmap,
1542 .ioctl = video_ioctl2, /* maybe changed in future */
1543};
1544
1545static const struct v4l2_ioctl_ops pd_video_ioctl_ops = {
1546 .vidioc_querycap = vidioc_querycap,
1547
1548 /* Video format */
1549 .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
1550 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt,
1551 .vidioc_s_fmt_vid_cap = vidioc_s_fmt,
1552 .vidioc_g_fmt_vbi_cap = vidioc_g_fmt_vbi, /* VBI */
1553 .vidioc_try_fmt_vid_cap = vidioc_try_fmt,
1554
1555 /* Input */
1556 .vidioc_g_input = vidioc_g_input,
1557 .vidioc_s_input = vidioc_s_input,
1558 .vidioc_enum_input = vidioc_enum_input,
1559
1560 /* Audio ioctls */
1561 .vidioc_enumaudio = vidioc_enumaudio,
1562 .vidioc_g_audio = vidioc_g_audio,
1563 .vidioc_s_audio = vidioc_s_audio,
1564
1565 /* Tuner ioctls */
1566 .vidioc_g_tuner = vidioc_g_tuner,
1567 .vidioc_s_tuner = vidioc_s_tuner,
1568 .vidioc_s_std = vidioc_s_std,
1569 .vidioc_g_frequency = vidioc_g_frequency,
1570 .vidioc_s_frequency = vidioc_s_frequency,
1571
1572 /* Buffer handlers */
1573 .vidioc_reqbufs = vidioc_reqbufs,
1574 .vidioc_querybuf = vidioc_querybuf,
1575 .vidioc_qbuf = vidioc_qbuf,
1576 .vidioc_dqbuf = vidioc_dqbuf,
1577
1578 /* Stream on/off */
1579 .vidioc_streamon = vidioc_streamon,
1580 .vidioc_streamoff = vidioc_streamoff,
1581
1582 /* Control handling */
1583 .vidioc_queryctrl = vidioc_queryctrl,
1584 .vidioc_g_ctrl = vidioc_g_ctrl,
1585 .vidioc_s_ctrl = vidioc_s_ctrl,
1586};
1587
1588static struct video_device pd_video_template = {
1589 .name = "Telegent-Video",
1590 .fops = &pd_video_fops,
1591 .minor = -1,
1592 .release = video_device_release,
1593 .tvnorms = V4L2_STD_ALL,
1594 .ioctl_ops = &pd_video_ioctl_ops,
1595};
1596
1597struct video_device *vdev_init(struct poseidon *pd, struct video_device *tmp)
1598{
1599 struct video_device *vfd;
1600
1601 vfd = video_device_alloc();
1602 if (vfd == NULL)
1603 return NULL;
1604 *vfd = *tmp;
1605 vfd->minor = -1;
1606 vfd->v4l2_dev = &pd->v4l2_dev;
1607 /*vfd->parent = &(pd->udev->dev); */
1608 vfd->release = video_device_release;
1609 video_set_drvdata(vfd, pd);
1610 return vfd;
1611}
1612
1613void destroy_video_device(struct video_device **v_dev)
1614{
1615 struct video_device *dev = *v_dev;
1616
1617 if (dev == NULL)
1618 return;
1619
1620 if (video_is_registered(dev))
1621 video_unregister_device(dev);
1622 else
1623 video_device_release(dev);
1624 *v_dev = NULL;
1625}
1626
1627void pd_video_exit(struct poseidon *pd)
1628{
1629 struct video_data *video = &pd->video_data;
1630 struct vbi_data *vbi = &pd->vbi_data;
1631
1632 destroy_video_device(&video->v_dev);
1633 destroy_video_device(&vbi->v_dev);
1634 log();
1635}
1636
1637int pd_video_init(struct poseidon *pd)
1638{
1639 struct video_data *video = &pd->video_data;
1640 struct vbi_data *vbi = &pd->vbi_data;
1641 int ret = -ENOMEM;
1642
1643 video->v_dev = vdev_init(pd, &pd_video_template);
1644 if (video->v_dev == NULL)
1645 goto out;
1646
1647 ret = video_register_device(video->v_dev, VFL_TYPE_GRABBER, -1);
1648 if (ret != 0)
1649 goto out;
1650
1651 /* VBI uses the same template as video */
1652 vbi->v_dev = vdev_init(pd, &pd_video_template);
1653 if (vbi->v_dev == NULL) {
1654 ret = -ENOMEM;
1655 goto out;
1656 }
1657 ret = video_register_device(vbi->v_dev, VFL_TYPE_VBI, -1);
1658 if (ret != 0)
1659 goto out;
1660 log("register VIDEO/VBI devices");
1661 return 0;
1662out:
1663 log("VIDEO/VBI devices register failed, : %d", ret);
1664 pd_video_exit(pd);
1665 return ret;
1666}
1667
diff --git a/drivers/media/video/tlg2300/vendorcmds.h b/drivers/media/video/tlg2300/vendorcmds.h
new file mode 100644
index 000000000000..ba6f4ae3b2c2
--- /dev/null
+++ b/drivers/media/video/tlg2300/vendorcmds.h
@@ -0,0 +1,243 @@
1#ifndef VENDOR_CMD_H_
2#define VENDOR_CMD_H_
3
4#define BULK_ALTERNATE_IFACE (2)
5#define ISO_3K_BULK_ALTERNATE_IFACE (1)
6#define REQ_SET_CMD (0X00)
7#define REQ_GET_CMD (0X80)
8
9enum tlg__analog_audio_standard {
10 TLG_TUNE_ASTD_NONE = 0x00000000,
11 TLG_TUNE_ASTD_A2 = 0x00000001,
12 TLG_TUNE_ASTD_NICAM = 0x00000002,
13 TLG_TUNE_ASTD_EIAJ = 0x00000004,
14 TLG_TUNE_ASTD_BTSC = 0x00000008,
15 TLG_TUNE_ASTD_FM_US = 0x00000010,
16 TLG_TUNE_ASTD_FM_EUR = 0x00000020,
17 TLG_TUNE_ASTD_ALL = 0x0000003f
18};
19
20/*
21 * identifiers for Custom Parameter messages.
22 * @typedef cmd_custom_param_id_t
23 */
24enum cmd_custom_param_id {
25 CUST_PARM_ID_NONE = 0x00,
26 CUST_PARM_ID_BRIGHTNESS_CTRL = 0x01,
27 CUST_PARM_ID_CONTRAST_CTRL = 0x02,
28 CUST_PARM_ID_HUE_CTRL = 0x03,
29 CUST_PARM_ID_SATURATION_CTRL = 0x04,
30 CUST_PARM_ID_AUDIO_SNR_THRESHOLD = 0x10,
31 CUST_PARM_ID_AUDIO_AGC_THRESHOLD = 0x11,
32 CUST_PARM_ID_MAX
33};
34
35struct tuner_custom_parameter_s {
36 uint16_t param_id; /* Parameter identifier */
37 uint16_t param_value; /* Parameter value */
38};
39
40struct tuner_ber_rate_s {
41 uint32_t ber_rate; /* BER sample rate in seconds */
42};
43
44struct tuner_atv_sig_stat_s {
45 uint32_t sig_present;
46 uint32_t sig_locked;
47 uint32_t sig_lock_busy;
48 uint32_t sig_strength; /* milliDb */
49 uint32_t tv_audio_chan; /* mono/stereo/sap*/
50 uint32_t mvision_stat; /* macrovision status */
51};
52
53struct tuner_dtv_sig_stat_s {
54 uint32_t sig_present; /* Boolean*/
55 uint32_t sig_locked; /* Boolean */
56 uint32_t sig_lock_busy; /* Boolean (Can this time-out?) */
57 uint32_t sig_strength; /* milliDb*/
58};
59
60struct tuner_fm_sig_stat_s {
61 uint32_t sig_present; /* Boolean*/
62 uint32_t sig_locked; /* Boolean */
63 uint32_t sig_lock_busy; /* Boolean */
64 uint32_t sig_stereo_mono;/* TBD*/
65 uint32_t sig_strength; /* milliDb*/
66};
67
68enum _tag_tlg_tune_srv_cmd {
69 TLG_TUNE_PLAY_SVC_START = 1,
70 TLG_TUNE_PLAY_SVC_STOP
71};
72
73enum _tag_tune_atv_audio_mode_caps {
74 TLG_TUNE_TVAUDIO_MODE_MONO = 0x00000001,
75 TLG_TUNE_TVAUDIO_MODE_STEREO = 0x00000002,
76 TLG_TUNE_TVAUDIO_MODE_LANG_A = 0x00000010,/* Primary language*/
77 TLG_TUNE_TVAUDIO_MODE_LANG_B = 0x00000020,/* 2nd avail language*/
78 TLG_TUNE_TVAUDIO_MODE_LANG_C = 0x00000040
79};
80
81
82enum _tag_tuner_atv_audio_rates {
83 ATV_AUDIO_RATE_NONE = 0x00,/* Audio not supported*/
84 ATV_AUDIO_RATE_32K = 0x01,/* Audio rate = 32 KHz*/
85 ATV_AUDIO_RATE_48K = 0x02, /* Audio rate = 48 KHz*/
86 ATV_AUDIO_RATE_31_25K = 0x04 /* Audio rate = 31.25KHz */
87};
88
89enum _tag_tune_atv_vid_res_caps {
90 TLG_TUNE_VID_RES_NONE = 0x00000000,
91 TLG_TUNE_VID_RES_720 = 0x00000001,
92 TLG_TUNE_VID_RES_704 = 0x00000002,
93 TLG_TUNE_VID_RES_360 = 0x00000004
94};
95
96enum _tag_tuner_analog_video_format {
97 TLG_TUNER_VID_FORMAT_YUV = 0x00000001,
98 TLG_TUNER_VID_FORMAT_YCRCB = 0x00000002,
99 TLG_TUNER_VID_FORMAT_RGB_565 = 0x00000004,
100};
101
102enum tlg_ext_audio_support {
103 TLG_EXT_AUDIO_NONE = 0x00,/* No external audio input supported */
104 TLG_EXT_AUDIO_LR = 0x01/* LR external audio inputs supported*/
105};
106
107enum {
108 TLG_MODE_NONE = 0x00, /* No Mode specified*/
109 TLG_MODE_ANALOG_TV = 0x01, /* Analog Television mode*/
110 TLG_MODE_ANALOG_TV_UNCOMP = 0x01, /* Analog Television mode*/
111 TLG_MODE_ANALOG_TV_COMP = 0x02, /* Analog TV mode (compressed)*/
112 TLG_MODE_FM_RADIO = 0x04, /* FM Radio mode*/
113 TLG_MODE_DVB_T = 0x08, /* Digital TV (DVB-T)*/
114};
115
116enum tlg_signal_sources_t {
117 TLG_SIG_SRC_NONE = 0x00,/* Signal source not specified */
118 TLG_SIG_SRC_ANTENNA = 0x01,/* Signal src is: Antenna */
119 TLG_SIG_SRC_CABLE = 0x02,/* Signal src is: Coax Cable*/
120 TLG_SIG_SRC_SVIDEO = 0x04,/* Signal src is: S_VIDEO */
121 TLG_SIG_SRC_COMPOSITE = 0x08 /* Signal src is: Composite Video */
122};
123
124enum tuner_analog_video_standard {
125 TLG_TUNE_VSTD_NONE = 0x00000000,
126 TLG_TUNE_VSTD_NTSC_M = 0x00000001,
127 TLG_TUNE_VSTD_NTSC_M_J = 0x00000002,/* Japan */
128 TLG_TUNE_VSTD_PAL_B = 0x00000010,
129 TLG_TUNE_VSTD_PAL_D = 0x00000020,
130 TLG_TUNE_VSTD_PAL_G = 0x00000040,
131 TLG_TUNE_VSTD_PAL_H = 0x00000080,
132 TLG_TUNE_VSTD_PAL_I = 0x00000100,
133 TLG_TUNE_VSTD_PAL_M = 0x00000200,
134 TLG_TUNE_VSTD_PAL_N = 0x00000400,
135 TLG_TUNE_VSTD_SECAM_B = 0x00001000,
136 TLG_TUNE_VSTD_SECAM_D = 0x00002000,
137 TLG_TUNE_VSTD_SECAM_G = 0x00004000,
138 TLG_TUNE_VSTD_SECAM_H = 0x00008000,
139 TLG_TUNE_VSTD_SECAM_K = 0x00010000,
140 TLG_TUNE_VSTD_SECAM_K1 = 0x00020000,
141 TLG_TUNE_VSTD_SECAM_L = 0x00040000,
142 TLG_TUNE_VSTD_SECAM_L1 = 0x00080000,
143 TLG_TUNE_VSTD_PAL_N_COMBO = 0x00100000
144};
145
146enum tlg_mode_caps {
147 TLG_MODE_CAPS_NONE = 0x00, /* No Mode specified */
148 TLG_MODE_CAPS_ANALOG_TV_UNCOMP = 0x01, /* Analog TV mode */
149 TLG_MODE_CAPS_ANALOG_TV_COMP = 0x02, /* Analog TV (compressed)*/
150 TLG_MODE_CAPS_FM_RADIO = 0x04, /* FM Radio mode */
151 TLG_MODE_CAPS_DVB_T = 0x08, /* Digital TV (DVB-T) */
152};
153
154enum poseidon_vendor_cmds {
155 LAST_CMD_STAT = 0x00,
156 GET_CHIP_ID = 0x01,
157 GET_FW_ID = 0x02,
158 PRODUCT_CAPS = 0x03,
159
160 TUNE_MODE_CAP_ATV = 0x10,
161 TUNE_MODE_CAP_ATVCOMP = 0X10,
162 TUNE_MODE_CAP_DVBT = 0x10,
163 TUNE_MODE_CAP_FM = 0x10,
164 TUNE_MODE_SELECT = 0x11,
165 TUNE_FREQ_SELECT = 0x12,
166 SGNL_SRC_SEL = 0x13,
167
168 VIDEO_STD_SEL = 0x14,
169 VIDEO_STREAM_FMT_SEL = 0x15,
170 VIDEO_ROSOLU_AVAIL = 0x16,
171 VIDEO_ROSOLU_SEL = 0x17,
172 VIDEO_CONT_PROTECT = 0x20,
173
174 VCR_TIMING_MODSEL = 0x21,
175 EXT_AUDIO_CAP = 0x22,
176 EXT_AUDIO_SEL = 0x23,
177 TEST_PATTERN_SEL = 0x24,
178 VBI_DATA_SEL = 0x25,
179 AUDIO_SAMPLE_RATE_CAP = 0x28,
180 AUDIO_SAMPLE_RATE_SEL = 0x29,
181 TUNER_AUD_MODE = 0x2a,
182 TUNER_AUD_MODE_AVAIL = 0x2b,
183 TUNER_AUD_ANA_STD = 0x2c,
184 TUNER_CUSTOM_PARAMETER = 0x2f,
185
186 DVBT_TUNE_MODE_SEL = 0x30,
187 DVBT_BANDW_CAP = 0x31,
188 DVBT_BANDW_SEL = 0x32,
189 DVBT_GUARD_INTERV_CAP = 0x33,
190 DVBT_GUARD_INTERV_SEL = 0x34,
191 DVBT_MODULATION_CAP = 0x35,
192 DVBT_MODULATION_SEL = 0x36,
193 DVBT_INNER_FEC_RATE_CAP = 0x37,
194 DVBT_INNER_FEC_RATE_SEL = 0x38,
195 DVBT_TRANS_MODE_CAP = 0x39,
196 DVBT_TRANS_MODE_SEL = 0x3a,
197 DVBT_SEARCH_RANG = 0x3c,
198
199 TUNER_SETUP_ANALOG = 0x40,
200 TUNER_SETUP_DIGITAL = 0x41,
201 TUNER_SETUP_FM_RADIO = 0x42,
202 TAKE_REQUEST = 0x43, /* Take effect of the command */
203 PLAY_SERVICE = 0x44, /* Play start or Play stop */
204 TUNER_STATUS = 0x45,
205 TUNE_PROP_DVBT = 0x46,
206 ERR_RATE_STATS = 0x47,
207 TUNER_BER_RATE = 0x48,
208
209 SCAN_CAPS = 0x50,
210 SCAN_SETUP = 0x51,
211 SCAN_SERVICE = 0x52,
212 SCAN_STATS = 0x53,
213
214 PID_SET = 0x58,
215 PID_UNSET = 0x59,
216 PID_LIST = 0x5a,
217
218 IRD_CAP = 0x60,
219 IRD_MODE_SEL = 0x61,
220 IRD_SETUP = 0x62,
221
222 PTM_MODE_CAP = 0x70,
223 PTM_MODE_SEL = 0x71,
224 PTM_SERVICE = 0x72,
225 TUNER_REG_SCRIPT = 0x73,
226 CMD_CHIP_RST = 0x74,
227};
228
229enum tlg_bw {
230 TLG_BW_5 = 5,
231 TLG_BW_6 = 6,
232 TLG_BW_7 = 7,
233 TLG_BW_8 = 8,
234 TLG_BW_12 = 12,
235 TLG_BW_15 = 15
236};
237
238struct cmd_firmware_vers_s {
239 uint8_t fw_rev_major;
240 uint8_t fw_rev_minor;
241 uint16_t fw_patch;
242};
243#endif /* VENDOR_CMD_H_ */
diff --git a/drivers/media/video/tuner-core.c b/drivers/media/video/tuner-core.c
index 5b3eaa16afd2..c4dab6cfd948 100644
--- a/drivers/media/video/tuner-core.c
+++ b/drivers/media/video/tuner-core.c
@@ -1078,6 +1078,7 @@ static int tuner_probe(struct i2c_client *client,
1078 1078
1079 goto register_client; 1079 goto register_client;
1080 } 1080 }
1081 kfree(t);
1081 return -ENODEV; 1082 return -ENODEV;
1082 case 0x42: 1083 case 0x42:
1083 case 0x43: 1084 case 0x43:
diff --git a/drivers/media/video/tveeprom.c b/drivers/media/video/tveeprom.c
index d533ea57e7b1..0a877497b93f 100644
--- a/drivers/media/video/tveeprom.c
+++ b/drivers/media/video/tveeprom.c
@@ -680,10 +680,7 @@ void tveeprom_hauppauge_analog(struct i2c_client *c, struct tveeprom *tvee,
680 tveeprom_info("Hauppauge model %d, rev %s, serial# %d\n", 680 tveeprom_info("Hauppauge model %d, rev %s, serial# %d\n",
681 tvee->model, tvee->rev_str, tvee->serial_number); 681 tvee->model, tvee->rev_str, tvee->serial_number);
682 if (tvee->has_MAC_address == 1) 682 if (tvee->has_MAC_address == 1)
683 tveeprom_info("MAC address is %02X-%02X-%02X-%02X-%02X-%02X\n", 683 tveeprom_info("MAC address is %pM\n", tvee->MAC_address);
684 tvee->MAC_address[0], tvee->MAC_address[1],
685 tvee->MAC_address[2], tvee->MAC_address[3],
686 tvee->MAC_address[4], tvee->MAC_address[5]);
687 tveeprom_info("tuner model is %s (idx %d, type %d)\n", 684 tveeprom_info("tuner model is %s (idx %d, type %d)\n",
688 t_name1, tuner1, tvee->tuner_type); 685 t_name1, tuner1, tvee->tuner_type);
689 tveeprom_info("TV standards%s%s%s%s%s%s%s%s (eeprom 0x%02x)\n", 686 tveeprom_info("TV standards%s%s%s%s%s%s%s%s (eeprom 0x%02x)\n",
diff --git a/drivers/media/video/tvp7002.c b/drivers/media/video/tvp7002.c
new file mode 100644
index 000000000000..5a878bca02d4
--- /dev/null
+++ b/drivers/media/video/tvp7002.c
@@ -0,0 +1,1187 @@
1/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
2 * Digitizer with Horizontal PLL registers
3 *
4 * Copyright (C) 2009 Texas Instruments Inc
5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
6 *
7 * This code is partially based upon the TVP5150 driver
8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
10 * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
11 * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#include <linux/delay.h>
28#include <linux/i2c.h>
29#include <linux/videodev2.h>
30#include <media/tvp7002.h>
31#include <media/v4l2-device.h>
32#include <media/v4l2-chip-ident.h>
33#include <media/v4l2-common.h>
34#include "tvp7002_reg.h"
35
36MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
37MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
38MODULE_LICENSE("GPL");
39
40/* Module Name */
41#define TVP7002_MODULE_NAME "tvp7002"
42
43/* I2C retry attempts */
44#define I2C_RETRY_COUNT (5)
45
46/* End of registers */
47#define TVP7002_EOR 0x5c
48
49/* Read write definition for registers */
50#define TVP7002_READ 0
51#define TVP7002_WRITE 1
52#define TVP7002_RESERVED 2
53
54/* Interlaced vs progressive mask and shift */
55#define TVP7002_IP_SHIFT 5
56#define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT)
57
58/* Shift for CPL and LPF registers */
59#define TVP7002_CL_SHIFT 8
60#define TVP7002_CL_MASK 0x0f
61
62/* Debug functions */
63static int debug;
64module_param(debug, bool, 0644);
65MODULE_PARM_DESC(debug, "Debug level (0-2)");
66
67/* Structure for register values */
68struct i2c_reg_value {
69 u8 reg;
70 u8 value;
71 u8 type;
72};
73
74/*
75 * Register default values (according to tvp7002 datasheet)
76 * In the case of read-only registers, the value (0xff) is
77 * never written. R/W functionality is controlled by the
78 * writable bit in the register struct definition.
79 */
80static const struct i2c_reg_value tvp7002_init_default[] = {
81 { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
82 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
83 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
84 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
85 { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
86 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
87 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
88 { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
89 { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
90 { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
91 { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
92 { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
93 { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
94 { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
95 { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
96 { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
97 { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
98 { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
99 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
100 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
101 { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
102 { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
103 { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
104 { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
105 { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
106 { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
107 { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
108 { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
109 { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
110 { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
111 { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
112 { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
113 { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
114 { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
115 { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
116 { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
117 { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
118 { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
119 { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
120 { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
121 { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
122 { 0x29, 0x08, TVP7002_RESERVED },
123 { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
124 /* PWR_CTL is controlled only by the probe and reset functions */
125 { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
126 { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
127 { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
128 { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
129 { TVP7002_RGB_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
130 { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
131 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
132 { 0x32, 0x18, TVP7002_RESERVED },
133 { 0x33, 0x60, TVP7002_RESERVED },
134 { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
135 { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
136 { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
137 { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
138 { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
139 { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
140 { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
141 { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
142 { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
143 { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
144 { 0x3e, 0x60, TVP7002_RESERVED },
145 { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
146 { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
147 { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
148 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
149 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
150 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
151 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
152 { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
153 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
154 { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
155 { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
156 { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
157 { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
158 { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
159 { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
160 { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
161 { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
162 { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
163 { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
164 { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
165 { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
166 { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
167 { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
168 { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
169 { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
170 { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
171 { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
172 { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
173 { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
174 /* This signals end of register values */
175 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
176};
177
178/* Register parameters for 480P */
179static const struct i2c_reg_value tvp7002_parms_480P[] = {
180 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
181 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0a, TVP7002_WRITE },
182 { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
183 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
184 { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
185 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
186 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
187 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
188 { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
189 { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
190 { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
191 { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
192 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
193 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
194 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
195 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
196 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
197 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
198};
199
200/* Register parameters for 576P */
201static const struct i2c_reg_value tvp7002_parms_576P[] = {
202 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
203 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
204 { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
205 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
206 { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
207 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
208 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
209 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
210 { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
211 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
212 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
213 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
214 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
215 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
216 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
217 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
218 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
219 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
220};
221
222/* Register parameters for 1080I60 */
223static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
224 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
225 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE },
226 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
227 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
228 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
229 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
230 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
231 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
232 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
233 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
234 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
235 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
236 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
237 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
238 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
239 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
240 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
241 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
242};
243
244/* Register parameters for 1080P60 */
245static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
246 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
247 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE },
248 { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
249 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
250 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
251 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
252 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
253 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
254 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
255 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
256 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
257 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
258 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
259 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
260 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
261 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
262 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
263 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
264};
265
266/* Register parameters for 1080I50 */
267static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
268 { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
269 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
270 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
271 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
272 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
273 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
274 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
275 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
276 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
277 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
278 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
279 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
280 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
281 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
282 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
283 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
284 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
285 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
286};
287
288/* Register parameters for 720P60 */
289static const struct i2c_reg_value tvp7002_parms_720P60[] = {
290 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
291 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x02, TVP7002_WRITE },
292 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
293 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
294 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
295 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
296 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
297 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
298 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
299 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
300 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
301 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
302 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
303 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
304 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
305 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
306 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
307 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
308};
309
310/* Register parameters for 720P50 */
311static const struct i2c_reg_value tvp7002_parms_720P50[] = {
312 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
313 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0c, TVP7002_WRITE },
314 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
315 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
316 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
317 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
318 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
319 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
320 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
321 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
322 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
323 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
324 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
325 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
326 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
327 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
328 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
329 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
330};
331
332/* Struct list for available formats */
333static const struct v4l2_fmtdesc tvp7002_fmt_list[] = {
334 {
335 .index = 0,
336 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
337 .flags = 0,
338 .description = "8-bit UYVY 4:2:2 Format",
339 .pixelformat = V4L2_PIX_FMT_UYVY,
340 },
341};
342
343#define NUM_FORMATS ARRAY_SIZE(tvp7002_fmt_list)
344
345/* Preset definition for handling device operation */
346struct tvp7002_preset_definition {
347 u32 preset;
348 const struct i2c_reg_value *p_settings;
349 enum v4l2_colorspace color_space;
350 enum v4l2_field scanmode;
351 u16 progressive;
352 u16 lines_per_frame;
353 u16 cpl_min;
354 u16 cpl_max;
355};
356
357/* Struct list for digital video presets */
358static const struct tvp7002_preset_definition tvp7002_presets[] = {
359 {
360 V4L2_DV_720P60,
361 tvp7002_parms_720P60,
362 V4L2_COLORSPACE_REC709,
363 V4L2_FIELD_NONE,
364 1,
365 0x2EE,
366 135,
367 153
368 },
369 {
370 V4L2_DV_1080I60,
371 tvp7002_parms_1080I60,
372 V4L2_COLORSPACE_REC709,
373 V4L2_FIELD_INTERLACED,
374 0,
375 0x465,
376 181,
377 205
378 },
379 {
380 V4L2_DV_1080I50,
381 tvp7002_parms_1080I50,
382 V4L2_COLORSPACE_REC709,
383 V4L2_FIELD_INTERLACED,
384 0,
385 0x465,
386 217,
387 245
388 },
389 {
390 V4L2_DV_720P50,
391 tvp7002_parms_720P50,
392 V4L2_COLORSPACE_REC709,
393 V4L2_FIELD_NONE,
394 1,
395 0x2EE,
396 163,
397 183
398 },
399 {
400 V4L2_DV_1080P60,
401 tvp7002_parms_1080P60,
402 V4L2_COLORSPACE_REC709,
403 V4L2_FIELD_NONE,
404 1,
405 0x465,
406 90,
407 102
408 },
409 {
410 V4L2_DV_480P59_94,
411 tvp7002_parms_480P,
412 V4L2_COLORSPACE_SMPTE170M,
413 V4L2_FIELD_NONE,
414 1,
415 0x20D,
416 0xffff,
417 0xffff
418 },
419 {
420 V4L2_DV_576P50,
421 tvp7002_parms_576P,
422 V4L2_COLORSPACE_SMPTE170M,
423 V4L2_FIELD_NONE,
424 1,
425 0x271,
426 0xffff,
427 0xffff
428 }
429};
430
431#define NUM_PRESETS ARRAY_SIZE(tvp7002_presets)
432
433/* Device definition */
434struct tvp7002 {
435 struct v4l2_subdev sd;
436 const struct tvp7002_config *pdata;
437
438 int ver;
439 int streaming;
440
441 struct v4l2_pix_format pix;
442 const struct tvp7002_preset_definition *current_preset;
443 u8 gain;
444};
445
446/*
447 * to_tvp7002 - Obtain device handler TVP7002
448 * @sd: ptr to v4l2_subdev struct
449 *
450 * Returns device handler tvp7002.
451 */
452static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
453{
454 return container_of(sd, struct tvp7002, sd);
455}
456
457/*
458 * tvp7002_read - Read a value from a register in an TVP7002
459 * @sd: ptr to v4l2_subdev struct
460 * @reg: TVP7002 register address
461 * @dst: pointer to 8-bit destination
462 *
463 * Returns value read if successful, or non-zero (-1) otherwise.
464 */
465static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
466{
467 struct i2c_client *c = v4l2_get_subdevdata(sd);
468 int retry;
469 int error;
470
471 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
472 error = i2c_smbus_read_byte_data(c, addr);
473
474 if (error >= 0) {
475 *dst = (u8)error;
476 return 0;
477 }
478
479 msleep_interruptible(10);
480 }
481 v4l2_err(sd, "TVP7002 read error %d\n", error);
482 return error;
483}
484
485/*
486 * tvp7002_read_err() - Read a register value with error code
487 * @sd: pointer to standard V4L2 sub-device structure
488 * @reg: destination register
489 * @val: value to be read
490 * @error: pointer to error value
491 *
492 * Read a value in a register and save error value in pointer.
493 * Also update the register table if successful
494 */
495static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
496 u8 *dst, int *err)
497{
498 if (!*err)
499 *err = tvp7002_read(sd, reg, dst);
500}
501
502/*
503 * tvp7002_write() - Write a value to a register in TVP7002
504 * @sd: ptr to v4l2_subdev struct
505 * @addr: TVP7002 register address
506 * @value: value to be written to the register
507 *
508 * Write a value to a register in an TVP7002 decoder device.
509 * Returns zero if successful, or non-zero otherwise.
510 */
511static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
512{
513 struct i2c_client *c;
514 int retry;
515 int error;
516
517 c = v4l2_get_subdevdata(sd);
518
519 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
520 error = i2c_smbus_write_byte_data(c, addr, value);
521
522 if (error >= 0)
523 return 0;
524
525 v4l2_warn(sd, "Write: retry ... %d\n", retry);
526 msleep_interruptible(10);
527 }
528 v4l2_err(sd, "TVP7002 write error %d\n", error);
529 return error;
530}
531
532/*
533 * tvp7002_write_err() - Write a register value with error code
534 * @sd: pointer to standard V4L2 sub-device structure
535 * @reg: destination register
536 * @val: value to be written
537 * @error: pointer to error value
538 *
539 * Write a value in a register and save error value in pointer.
540 * Also update the register table if successful
541 */
542static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
543 u8 val, int *err)
544{
545 if (!*err)
546 *err = tvp7002_write(sd, reg, val);
547}
548
549/*
550 * tvp7002_g_chip_ident() - Get chip identification number
551 * @sd: ptr to v4l2_subdev struct
552 * @chip: ptr to v4l2_dbg_chip_ident struct
553 *
554 * Obtains the chip's identification number.
555 * Returns zero or -EINVAL if read operation fails.
556 */
557static int tvp7002_g_chip_ident(struct v4l2_subdev *sd,
558 struct v4l2_dbg_chip_ident *chip)
559{
560 u8 rev;
561 int error;
562 struct i2c_client *client = v4l2_get_subdevdata(sd);
563
564 error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev);
565
566 if (error < 0)
567 return error;
568
569 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev);
570}
571
572/*
573 * tvp7002_write_inittab() - Write initialization values
574 * @sd: ptr to v4l2_subdev struct
575 * @regs: ptr to i2c_reg_value struct
576 *
577 * Write initialization values.
578 * Returns zero or -EINVAL if read operation fails.
579 */
580static int tvp7002_write_inittab(struct v4l2_subdev *sd,
581 const struct i2c_reg_value *regs)
582{
583 int error = 0;
584
585 /* Initialize the first (defined) registers */
586 while (TVP7002_EOR != regs->reg) {
587 if (TVP7002_WRITE == regs->type)
588 tvp7002_write_err(sd, regs->reg, regs->value, &error);
589 regs++;
590 }
591
592 return error;
593}
594
595/*
596 * tvp7002_s_dv_preset() - Set digital video preset
597 * @sd: ptr to v4l2_subdev struct
598 * @std: ptr to v4l2_dv_preset struct
599 *
600 * Set the digital video preset for a TVP7002 decoder device.
601 * Returns zero when successful or -EINVAL if register access fails.
602 */
603static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,
604 struct v4l2_dv_preset *dv_preset)
605{
606 struct tvp7002 *device = to_tvp7002(sd);
607 u32 preset;
608 int i;
609
610 for (i = 0; i < NUM_PRESETS; i++) {
611 preset = tvp7002_presets[i].preset;
612 if (preset == dv_preset->preset) {
613 device->current_preset = &tvp7002_presets[i];
614 return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
615 }
616 }
617
618 return -EINVAL;
619}
620
621/*
622 * tvp7002_g_ctrl() - Get a control
623 * @sd: ptr to v4l2_subdev struct
624 * @ctrl: ptr to v4l2_control struct
625 *
626 * Get a control for a TVP7002 decoder device.
627 * Returns zero when successful or -EINVAL if register access fails.
628 */
629static int tvp7002_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
630{
631 struct tvp7002 *device = to_tvp7002(sd);
632
633 switch (ctrl->id) {
634 case V4L2_CID_GAIN:
635 ctrl->value = device->gain;
636 return 0;
637 default:
638 return -EINVAL;
639 }
640}
641
642/*
643 * tvp7002_s_ctrl() - Set a control
644 * @sd: ptr to v4l2_subdev struct
645 * @ctrl: ptr to v4l2_control struct
646 *
647 * Set a control in TVP7002 decoder device.
648 * Returns zero when successful or -EINVAL if register access fails.
649 */
650static int tvp7002_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
651{
652 struct tvp7002 *device = to_tvp7002(sd);
653 int error = 0;
654
655 switch (ctrl->id) {
656 case V4L2_CID_GAIN:
657 tvp7002_write_err(sd, TVP7002_R_FINE_GAIN,
658 ctrl->value & 0xff, &error);
659 tvp7002_write_err(sd, TVP7002_G_FINE_GAIN,
660 ctrl->value & 0xff, &error);
661 tvp7002_write_err(sd, TVP7002_B_FINE_GAIN,
662 ctrl->value & 0xff, &error);
663
664 if (error < 0)
665 return error;
666
667 /* Set only after knowing there is no error */
668 device->gain = ctrl->value & 0xff;
669 return 0;
670 default:
671 return -EINVAL;
672 }
673}
674
675/*
676 * tvp7002_queryctrl() - Query a control
677 * @sd: ptr to v4l2_subdev struct
678 * @ctrl: ptr to v4l2_queryctrl struct
679 *
680 * Query a control of a TVP7002 decoder device.
681 * Returns zero when successful or -EINVAL if register read fails.
682 */
683static int tvp7002_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
684{
685 switch (qc->id) {
686 case V4L2_CID_GAIN:
687 /*
688 * Gain is supported [0-255, default=0, step=1]
689 */
690 return v4l2_ctrl_query_fill(qc, 0, 255, 1, 0);
691 default:
692 return -EINVAL;
693 }
694}
695
696/*
697 * tvp7002_try_fmt_cap() - V4L2 decoder interface handler for try_fmt
698 * @sd: pointer to standard V4L2 sub-device structure
699 * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure
700 *
701 * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This
702 * ioctl is used to negotiate the image capture size and pixel format
703 * without actually making it take effect.
704 */
705static int tvp7002_try_fmt_cap(struct v4l2_subdev *sd, struct v4l2_format *f)
706{
707 struct tvp7002 *device = to_tvp7002(sd);
708 struct v4l2_dv_enum_preset e_preset;
709 struct v4l2_pix_format *pix;
710 int error = 0;
711
712 pix = &f->fmt.pix;
713
714 /* Calculate height and width based on current standard */
715 error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset);
716 if (error)
717 return -EINVAL;
718
719 pix->width = e_preset.width;
720 pix->height = e_preset.height;
721 pix->pixelformat = V4L2_PIX_FMT_UYVY;
722 pix->field = device->current_preset->scanmode;
723 pix->bytesperline = pix->width * 2;
724 pix->sizeimage = pix->bytesperline * pix->height;
725 pix->colorspace = device->current_preset->color_space;
726 pix->priv = 0;
727
728 v4l2_dbg(1, debug, sd, "Try FMT: pixelformat - %s, bytesperline - %d"
729 "Width - %d, Height - %d", "8-bit UYVY 4:2:2 Format",
730 pix->bytesperline, pix->width, pix->height);
731 return error;
732}
733
734/*
735 * tvp7002_s_fmt() - V4L2 decoder interface handler for s_fmt
736 * @sd: pointer to standard V4L2 sub-device structure
737 * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure
738 *
739 * If the requested format is supported, configures the HW to use that
740 * format, returns error code if format not supported or HW can't be
741 * correctly configured.
742 */
743static int tvp7002_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
744{
745 struct tvp7002 *decoder = to_tvp7002(sd);
746 int rval;
747
748 rval = tvp7002_try_fmt_cap(sd, f);
749 if (!rval)
750 decoder->pix = f->fmt.pix;
751 return rval;
752}
753
754/*
755 * tvp7002_g_fmt() - V4L2 decoder interface handler for tvp7002_g_fmt
756 * @sd: pointer to standard V4L2 sub-device structure
757 * @f: pointer to standard V4L2 v4l2_format structure
758 *
759 * Returns the decoder's current pixel format in the v4l2_format
760 * parameter.
761 */
762static int tvp7002_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
763{
764 struct tvp7002 *decoder = to_tvp7002(sd);
765
766 f->fmt.pix = decoder->pix;
767
768 v4l2_dbg(1, debug, sd, "Current FMT: bytesperline - %d"
769 "Width - %d, Height - %d",
770 decoder->pix.bytesperline,
771 decoder->pix.width, decoder->pix.height);
772 return 0;
773}
774
775/*
776 * tvp7002_query_dv_preset() - query DV preset
777 * @sd: pointer to standard V4L2 sub-device structure
778 * @std_id: standard V4L2 v4l2_dv_preset
779 *
780 * Returns the current DV preset by TVP7002. If no active input is
781 * detected, returns -EINVAL
782 */
783static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,
784 struct v4l2_dv_preset *qpreset)
785{
786 const struct tvp7002_preset_definition *presets = tvp7002_presets;
787 struct v4l2_dv_enum_preset e_preset;
788 struct tvp7002 *device;
789 u8 progressive;
790 u32 lpfr;
791 u32 cpln;
792 int error = 0;
793 u8 lpf_lsb;
794 u8 lpf_msb;
795 u8 cpl_lsb;
796 u8 cpl_msb;
797 int index;
798
799 device = to_tvp7002(sd);
800
801 /* Read standards from device registers */
802 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
803 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
804
805 if (error < 0)
806 return error;
807
808 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
809 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
810
811 if (error < 0)
812 return error;
813
814 /* Get lines per frame, clocks per line and interlaced/progresive */
815 lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
816 cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
817 progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
818
819 /* Do checking of video modes */
820 for (index = 0; index < NUM_PRESETS; index++, presets++)
821 if (lpfr == presets->lines_per_frame &&
822 progressive == presets->progressive) {
823 if (presets->cpl_min == 0xffff)
824 break;
825 if (cpln >= presets->cpl_min && cpln <= presets->cpl_max)
826 break;
827 }
828
829 if (index == NUM_PRESETS) {
830 v4l2_err(sd, "querystd error, lpf = %x, cpl = %x\n",
831 lpfr, cpln);
832 return -EINVAL;
833 }
834
835 if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
836 return -EINVAL;
837
838 /* Set values in found preset */
839 qpreset->preset = presets->preset;
840
841 /* Update lines per frame and clocks per line info */
842 v4l2_dbg(1, debug, sd, "Current preset: %d %d",
843 e_preset.width, e_preset.height);
844 return 0;
845}
846
847#ifdef CONFIG_VIDEO_ADV_DEBUG
848/*
849 * tvp7002_g_register() - Get the value of a register
850 * @sd: ptr to v4l2_subdev struct
851 * @vreg: ptr to v4l2_dbg_register struct
852 *
853 * Get the value of a TVP7002 decoder device register.
854 * Returns zero when successful, -EINVAL if register read fails or
855 * access to I2C client fails, -EPERM if the call is not allowed
856 * by diabled CAP_SYS_ADMIN.
857 */
858static int tvp7002_g_register(struct v4l2_subdev *sd,
859 struct v4l2_dbg_register *reg)
860{
861 struct i2c_client *client = v4l2_get_subdevdata(sd);
862 u8 val;
863 int ret;
864
865 if (!v4l2_chip_match_i2c_client(client, &reg->match))
866 return -EINVAL;
867 if (!capable(CAP_SYS_ADMIN))
868 return -EPERM;
869
870 ret = tvp7002_read(sd, reg->reg & 0xff, &val);
871 reg->val = val;
872 return ret;
873}
874
875/*
876 * tvp7002_s_register() - set a control
877 * @sd: ptr to v4l2_subdev struct
878 * @ctrl: ptr to v4l2_control struct
879 *
880 * Get the value of a TVP7002 decoder device register.
881 * Returns zero when successful, -EINVAL if register read fails or
882 * -EPERM if call not allowed.
883 */
884static int tvp7002_s_register(struct v4l2_subdev *sd,
885 struct v4l2_dbg_register *reg)
886{
887 struct i2c_client *client = v4l2_get_subdevdata(sd);
888
889 if (!v4l2_chip_match_i2c_client(client, &reg->match))
890 return -EINVAL;
891 if (!capable(CAP_SYS_ADMIN))
892 return -EPERM;
893
894 return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
895}
896#endif
897
898/*
899 * tvp7002_enum_fmt() - Enum supported formats
900 * @sd: pointer to standard V4L2 sub-device structure
901 * @enable: pointer to format struct
902 *
903 * Enumerate supported formats.
904 */
905
906static int tvp7002_enum_fmt(struct v4l2_subdev *sd,
907 struct v4l2_fmtdesc *fmtdesc)
908{
909 /* Check requested format index is within range */
910 if (fmtdesc->index < 0 || fmtdesc->index >= NUM_FORMATS)
911 return -EINVAL;
912 *fmtdesc = tvp7002_fmt_list[fmtdesc->index];
913
914 return 0;
915}
916
917/*
918 * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
919 * @sd: pointer to standard V4L2 sub-device structure
920 * @enable: streaming enable or disable
921 *
922 * Sets streaming to enable or disable, if possible.
923 */
924static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
925{
926 struct tvp7002 *device = to_tvp7002(sd);
927 int error = 0;
928
929 if (device->streaming == enable)
930 return 0;
931
932 if (enable) {
933 /* Set output state on (low impedance means stream on) */
934 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00);
935 device->streaming = enable;
936 } else {
937 /* Set output state off (high impedance means stream off) */
938 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
939 if (error)
940 v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
941
942 device->streaming = enable;
943 }
944
945 return error;
946}
947
948/*
949 * tvp7002_log_status() - Print information about register settings
950 * @sd: ptr to v4l2_subdev struct
951 *
952 * Log register values of a TVP7002 decoder device.
953 * Returns zero or -EINVAL if read operation fails.
954 */
955static int tvp7002_log_status(struct v4l2_subdev *sd)
956{
957 const struct tvp7002_preset_definition *presets = tvp7002_presets;
958 struct tvp7002 *device = to_tvp7002(sd);
959 struct v4l2_dv_enum_preset e_preset;
960 struct v4l2_dv_preset detected;
961 int i;
962
963 detected.preset = V4L2_DV_INVALID;
964 /* Find my current standard*/
965 tvp7002_query_dv_preset(sd, &detected);
966
967 /* Print standard related code values */
968 for (i = 0; i < NUM_PRESETS; i++, presets++)
969 if (presets->preset == detected.preset)
970 break;
971
972 if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset))
973 return -EINVAL;
974
975 v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name);
976 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
977 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
978 if (i == NUM_PRESETS) {
979 v4l2_info(sd, "Detected DV Preset: None\n");
980 } else {
981 if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
982 return -EINVAL;
983 v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name);
984 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
985 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
986 }
987 v4l2_info(sd, "Streaming enabled: %s\n",
988 device->streaming ? "yes" : "no");
989
990 /* Print the current value of the gain control */
991 v4l2_info(sd, "Gain: %u\n", device->gain);
992
993 return 0;
994}
995
996/* V4L2 core operation handlers */
997static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
998 .g_chip_ident = tvp7002_g_chip_ident,
999 .log_status = tvp7002_log_status,
1000 .g_ctrl = tvp7002_g_ctrl,
1001 .s_ctrl = tvp7002_s_ctrl,
1002 .queryctrl = tvp7002_queryctrl,
1003#ifdef CONFIG_VIDEO_ADV_DEBUG
1004 .g_register = tvp7002_g_register,
1005 .s_register = tvp7002_s_register,
1006#endif
1007};
1008
1009/* Specific video subsystem operation handlers */
1010static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
1011 .s_dv_preset = tvp7002_s_dv_preset,
1012 .query_dv_preset = tvp7002_query_dv_preset,
1013 .s_stream = tvp7002_s_stream,
1014 .g_fmt = tvp7002_g_fmt,
1015 .s_fmt = tvp7002_s_fmt,
1016 .enum_fmt = tvp7002_enum_fmt,
1017};
1018
1019/* V4L2 top level operation handlers */
1020static const struct v4l2_subdev_ops tvp7002_ops = {
1021 .core = &tvp7002_core_ops,
1022 .video = &tvp7002_video_ops,
1023};
1024
1025static struct tvp7002 tvp7002_dev = {
1026 .streaming = 0,
1027
1028 .pix = {
1029 .width = 1280,
1030 .height = 720,
1031 .pixelformat = V4L2_PIX_FMT_UYVY,
1032 .field = V4L2_FIELD_NONE,
1033 .bytesperline = 1280 * 2,
1034 .sizeimage = 1280 * 2 * 720,
1035 .colorspace = V4L2_COLORSPACE_REC709,
1036 },
1037
1038 .current_preset = tvp7002_presets,
1039 .gain = 0,
1040};
1041
1042/*
1043 * tvp7002_probe - Probe a TVP7002 device
1044 * @sd: ptr to v4l2_subdev struct
1045 * @ctrl: ptr to i2c_device_id struct
1046 *
1047 * Initialize the TVP7002 device
1048 * Returns zero when successful, -EINVAL if register read fails or
1049 * -EIO if i2c access is not available.
1050 */
1051static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
1052{
1053 struct v4l2_subdev *sd;
1054 struct tvp7002 *device;
1055 struct v4l2_dv_preset preset;
1056 int polarity_a;
1057 int polarity_b;
1058 u8 revision;
1059
1060 int error;
1061
1062 /* Check if the adapter supports the needed features */
1063 if (!i2c_check_functionality(c->adapter,
1064 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
1065 return -EIO;
1066
1067 if (!c->dev.platform_data) {
1068 v4l_err(c, "No platform data!!\n");
1069 return -ENODEV;
1070 }
1071
1072 device = kmalloc(sizeof(struct tvp7002), GFP_KERNEL);
1073
1074 if (!device)
1075 return -ENOMEM;
1076
1077 *device = tvp7002_dev;
1078 sd = &device->sd;
1079 device->pdata = c->dev.platform_data;
1080
1081 /* Tell v4l2 the device is ready */
1082 v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
1083 v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
1084 c->addr, c->adapter->name);
1085
1086 error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
1087 if (error < 0)
1088 goto found_error;
1089
1090 /* Get revision number */
1091 v4l2_info(sd, "Rev. %02x detected.\n", revision);
1092 if (revision != 0x02)
1093 v4l2_info(sd, "Unknown revision detected.\n");
1094
1095 /* Initializes TVP7002 to its default values */
1096 error = tvp7002_write_inittab(sd, tvp7002_init_default);
1097
1098 if (error < 0)
1099 goto found_error;
1100
1101 /* Set polarity information after registers have been set */
1102 polarity_a = 0x20 | device->pdata->hs_polarity << 5
1103 | device->pdata->vs_polarity << 2;
1104 error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
1105 if (error < 0)
1106 goto found_error;
1107
1108 polarity_b = 0x01 | device->pdata->fid_polarity << 2
1109 | device->pdata->sog_polarity << 1
1110 | device->pdata->clk_polarity;
1111 error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
1112 if (error < 0)
1113 goto found_error;
1114
1115 /* Set registers according to default video mode */
1116 preset.preset = device->current_preset->preset;
1117 error = tvp7002_s_dv_preset(sd, &preset);
1118
1119found_error:
1120 if (error < 0)
1121 kfree(device);
1122
1123 return error;
1124}
1125
1126/*
1127 * tvp7002_remove - Remove TVP7002 device support
1128 * @c: ptr to i2c_client struct
1129 *
1130 * Reset the TVP7002 device
1131 * Returns zero.
1132 */
1133static int tvp7002_remove(struct i2c_client *c)
1134{
1135 struct v4l2_subdev *sd = i2c_get_clientdata(c);
1136 struct tvp7002 *device = to_tvp7002(sd);
1137
1138 v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
1139 "on address 0x%x\n", c->addr);
1140
1141 v4l2_device_unregister_subdev(sd);
1142 kfree(device);
1143 return 0;
1144}
1145
1146/* I2C Device ID table */
1147static const struct i2c_device_id tvp7002_id[] = {
1148 { "tvp7002", 0 },
1149 { }
1150};
1151MODULE_DEVICE_TABLE(i2c, tvp7002_id);
1152
1153/* I2C driver data */
1154static struct i2c_driver tvp7002_driver = {
1155 .driver = {
1156 .owner = THIS_MODULE,
1157 .name = TVP7002_MODULE_NAME,
1158 },
1159 .probe = tvp7002_probe,
1160 .remove = tvp7002_remove,
1161 .id_table = tvp7002_id,
1162};
1163
1164/*
1165 * tvp7002_init - Initialize driver via I2C interface
1166 *
1167 * Register the TVP7002 driver.
1168 * Return 0 on success or error code on failure.
1169 */
1170static int __init tvp7002_init(void)
1171{
1172 return i2c_add_driver(&tvp7002_driver);
1173}
1174
1175/*
1176 * tvp7002_exit - Remove driver via I2C interface
1177 *
1178 * Unregister the TVP7002 driver.
1179 * Returns nothing.
1180 */
1181static void __exit tvp7002_exit(void)
1182{
1183 i2c_del_driver(&tvp7002_driver);
1184}
1185
1186module_init(tvp7002_init);
1187module_exit(tvp7002_exit);
diff --git a/drivers/media/video/tvp7002_reg.h b/drivers/media/video/tvp7002_reg.h
new file mode 100644
index 000000000000..0e34ca9bccf3
--- /dev/null
+++ b/drivers/media/video/tvp7002_reg.h
@@ -0,0 +1,150 @@
1/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
2 * Digitizer with Horizontal PLL registers
3 *
4 * Copyright (C) 2009 Texas Instruments Inc
5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
6 *
7 * This code is partially based upon the TVP5150 driver
8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
10 * and the TVP7002 driver in the TI LSP 2.10.00.14
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27/* Naming conventions
28 * ------------------
29 *
30 * FDBK: Feedback
31 * DIV: Divider
32 * CTL: Control
33 * SEL: Select
34 * IN: Input
35 * OUT: Output
36 * R: Red
37 * G: Green
38 * B: Blue
39 * OFF: Offset
40 * THRS: Threshold
41 * DGTL: Digital
42 * LVL: Level
43 * PWR: Power
44 * MVIS: Macrovision
45 * W: Width
46 * H: Height
47 * ALGN: Alignment
48 * CLK: Clocks
49 * TOL: Tolerance
50 * BWTH: Bandwidth
51 * COEF: Coefficient
52 * STAT: Status
53 * AUTO: Automatic
54 * FLD: Field
55 * L: Line
56 */
57
58#define TVP7002_CHIP_REV 0x00
59#define TVP7002_HPLL_FDBK_DIV_MSBS 0x01
60#define TVP7002_HPLL_FDBK_DIV_LSBS 0x02
61#define TVP7002_HPLL_CRTL 0x03
62#define TVP7002_HPLL_PHASE_SEL 0x04
63#define TVP7002_CLAMP_START 0x05
64#define TVP7002_CLAMP_W 0x06
65#define TVP7002_HSYNC_OUT_W 0x07
66#define TVP7002_B_FINE_GAIN 0x08
67#define TVP7002_G_FINE_GAIN 0x09
68#define TVP7002_R_FINE_GAIN 0x0a
69#define TVP7002_B_FINE_OFF_MSBS 0x0b
70#define TVP7002_G_FINE_OFF_MSBS 0x0c
71#define TVP7002_R_FINE_OFF_MSBS 0x0d
72#define TVP7002_SYNC_CTL_1 0x0e
73#define TVP7002_HPLL_AND_CLAMP_CTL 0x0f
74#define TVP7002_SYNC_ON_G_THRS 0x10
75#define TVP7002_SYNC_SEPARATOR_THRS 0x11
76#define TVP7002_HPLL_PRE_COAST 0x12
77#define TVP7002_HPLL_POST_COAST 0x13
78#define TVP7002_SYNC_DETECT_STAT 0x14
79#define TVP7002_OUT_FORMATTER 0x15
80#define TVP7002_MISC_CTL_1 0x16
81#define TVP7002_MISC_CTL_2 0x17
82#define TVP7002_MISC_CTL_3 0x18
83#define TVP7002_IN_MUX_SEL_1 0x19
84#define TVP7002_IN_MUX_SEL_2 0x1a
85#define TVP7002_B_AND_G_COARSE_GAIN 0x1b
86#define TVP7002_R_COARSE_GAIN 0x1c
87#define TVP7002_FINE_OFF_LSBS 0x1d
88#define TVP7002_B_COARSE_OFF 0x1e
89#define TVP7002_G_COARSE_OFF 0x1f
90#define TVP7002_R_COARSE_OFF 0x20
91#define TVP7002_HSOUT_OUT_START 0x21
92#define TVP7002_MISC_CTL_4 0x22
93#define TVP7002_B_DGTL_ALC_OUT_LSBS 0x23
94#define TVP7002_G_DGTL_ALC_OUT_LSBS 0x24
95#define TVP7002_R_DGTL_ALC_OUT_LSBS 0x25
96#define TVP7002_AUTO_LVL_CTL_ENABLE 0x26
97#define TVP7002_DGTL_ALC_OUT_MSBS 0x27
98#define TVP7002_AUTO_LVL_CTL_FILTER 0x28
99/* Reserved 0x29*/
100#define TVP7002_FINE_CLAMP_CTL 0x2a
101#define TVP7002_PWR_CTL 0x2b
102#define TVP7002_ADC_SETUP 0x2c
103#define TVP7002_COARSE_CLAMP_CTL 0x2d
104#define TVP7002_SOG_CLAMP 0x2e
105#define TVP7002_RGB_COARSE_CLAMP_CTL 0x2f
106#define TVP7002_SOG_COARSE_CLAMP_CTL 0x30
107#define TVP7002_ALC_PLACEMENT 0x31
108/* Reserved 0x32 */
109/* Reserved 0x33 */
110#define TVP7002_MVIS_STRIPPER_W 0x34
111#define TVP7002_VSYNC_ALGN 0x35
112#define TVP7002_SYNC_BYPASS 0x36
113#define TVP7002_L_FRAME_STAT_LSBS 0x37
114#define TVP7002_L_FRAME_STAT_MSBS 0x38
115#define TVP7002_CLK_L_STAT_LSBS 0x39
116#define TVP7002_CLK_L_STAT_MSBS 0x3a
117#define TVP7002_HSYNC_W 0x3b
118#define TVP7002_VSYNC_W 0x3c
119#define TVP7002_L_LENGTH_TOL 0x3d
120/* Reserved 0x3e */
121#define TVP7002_VIDEO_BWTH_CTL 0x3f
122#define TVP7002_AVID_START_PIXEL_LSBS 0x40
123#define TVP7002_AVID_START_PIXEL_MSBS 0x41
124#define TVP7002_AVID_STOP_PIXEL_LSBS 0x42
125#define TVP7002_AVID_STOP_PIXEL_MSBS 0x43
126#define TVP7002_VBLK_F_0_START_L_OFF 0x44
127#define TVP7002_VBLK_F_1_START_L_OFF 0x45
128#define TVP7002_VBLK_F_0_DURATION 0x46
129#define TVP7002_VBLK_F_1_DURATION 0x47
130#define TVP7002_FBIT_F_0_START_L_OFF 0x48
131#define TVP7002_FBIT_F_1_START_L_OFF 0x49
132#define TVP7002_YUV_Y_G_COEF_LSBS 0x4a
133#define TVP7002_YUV_Y_G_COEF_MSBS 0x4b
134#define TVP7002_YUV_Y_B_COEF_LSBS 0x4c
135#define TVP7002_YUV_Y_B_COEF_MSBS 0x4d
136#define TVP7002_YUV_Y_R_COEF_LSBS 0x4e
137#define TVP7002_YUV_Y_R_COEF_MSBS 0x4f
138#define TVP7002_YUV_U_G_COEF_LSBS 0x50
139#define TVP7002_YUV_U_G_COEF_MSBS 0x51
140#define TVP7002_YUV_U_B_COEF_LSBS 0x52
141#define TVP7002_YUV_U_B_COEF_MSBS 0x53
142#define TVP7002_YUV_U_R_COEF_LSBS 0x54
143#define TVP7002_YUV_U_R_COEF_MSBS 0x55
144#define TVP7002_YUV_V_G_COEF_LSBS 0x56
145#define TVP7002_YUV_V_G_COEF_MSBS 0x57
146#define TVP7002_YUV_V_B_COEF_LSBS 0x58
147#define TVP7002_YUV_V_B_COEF_MSBS 0x59
148#define TVP7002_YUV_V_R_COEF_LSBS 0x5a
149#define TVP7002_YUV_V_R_COEF_MSBS 0x5b
150
diff --git a/drivers/media/video/tw9910.c b/drivers/media/video/tw9910.c
index 5b801a6e1eea..76be733eabfd 100644
--- a/drivers/media/video/tw9910.c
+++ b/drivers/media/video/tw9910.c
@@ -233,10 +233,10 @@ struct tw9910_hsync_ctrl {
233}; 233};
234 234
235struct tw9910_priv { 235struct tw9910_priv {
236 struct v4l2_subdev subdev; 236 struct v4l2_subdev subdev;
237 struct tw9910_video_info *info; 237 struct tw9910_video_info *info;
238 const struct tw9910_scale_ctrl *scale; 238 const struct tw9910_scale_ctrl *scale;
239 u32 revision; 239 u32 revision;
240}; 240};
241 241
242static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = { 242static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = {
diff --git a/drivers/media/video/usbvision/usbvision-video.c b/drivers/media/video/usbvision/usbvision-video.c
index 1054546db908..7c17ec63c5da 100644
--- a/drivers/media/video/usbvision/usbvision-video.c
+++ b/drivers/media/video/usbvision/usbvision-video.c
@@ -1487,7 +1487,7 @@ static int __devinit usbvision_register_video(struct usb_usbvision *usbvision)
1487 usbvision->vbi = usbvision_vdev_init(usbvision, 1487 usbvision->vbi = usbvision_vdev_init(usbvision,
1488 &usbvision_vbi_template, 1488 &usbvision_vbi_template,
1489 "USBVision VBI"); 1489 "USBVision VBI");
1490 if (usbvision->vdev == NULL) { 1490 if (usbvision->vbi == NULL) {
1491 goto err_exit; 1491 goto err_exit;
1492 } 1492 }
1493 if (video_register_device(usbvision->vbi, 1493 if (video_register_device(usbvision->vbi,
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c
index ec8ef8c5560a..3b2e7800d56f 100644
--- a/drivers/media/video/uvc/uvc_ctrl.c
+++ b/drivers/media/video/uvc/uvc_ctrl.c
@@ -23,9 +23,13 @@
23 23
24#include "uvcvideo.h" 24#include "uvcvideo.h"
25 25
26#define UVC_CTRL_NDATA 2
27#define UVC_CTRL_DATA_CURRENT 0 26#define UVC_CTRL_DATA_CURRENT 0
28#define UVC_CTRL_DATA_BACKUP 1 27#define UVC_CTRL_DATA_BACKUP 1
28#define UVC_CTRL_DATA_MIN 2
29#define UVC_CTRL_DATA_MAX 3
30#define UVC_CTRL_DATA_RES 4
31#define UVC_CTRL_DATA_DEF 5
32#define UVC_CTRL_DATA_LAST 6
29 33
30/* ------------------------------------------------------------------------ 34/* ------------------------------------------------------------------------
31 * Controls 35 * Controls
@@ -755,6 +759,49 @@ struct uvc_control *uvc_find_control(struct uvc_video_chain *chain,
755 return ctrl; 759 return ctrl;
756} 760}
757 761
762static int uvc_ctrl_populate_cache(struct uvc_video_chain *chain,
763 struct uvc_control *ctrl)
764{
765 int ret;
766
767 if (ctrl->info->flags & UVC_CONTROL_GET_DEF) {
768 ret = uvc_query_ctrl(chain->dev, UVC_GET_DEF, ctrl->entity->id,
769 chain->dev->intfnum, ctrl->info->selector,
770 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_DEF),
771 ctrl->info->size);
772 if (ret < 0)
773 return ret;
774 }
775
776 if (ctrl->info->flags & UVC_CONTROL_GET_MIN) {
777 ret = uvc_query_ctrl(chain->dev, UVC_GET_MIN, ctrl->entity->id,
778 chain->dev->intfnum, ctrl->info->selector,
779 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MIN),
780 ctrl->info->size);
781 if (ret < 0)
782 return ret;
783 }
784 if (ctrl->info->flags & UVC_CONTROL_GET_MAX) {
785 ret = uvc_query_ctrl(chain->dev, UVC_GET_MAX, ctrl->entity->id,
786 chain->dev->intfnum, ctrl->info->selector,
787 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MAX),
788 ctrl->info->size);
789 if (ret < 0)
790 return ret;
791 }
792 if (ctrl->info->flags & UVC_CONTROL_GET_RES) {
793 ret = uvc_query_ctrl(chain->dev, UVC_GET_RES, ctrl->entity->id,
794 chain->dev->intfnum, ctrl->info->selector,
795 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES),
796 ctrl->info->size);
797 if (ret < 0)
798 return ret;
799 }
800
801 ctrl->cached = 1;
802 return 0;
803}
804
758int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain, 805int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,
759 struct v4l2_queryctrl *v4l2_ctrl) 806 struct v4l2_queryctrl *v4l2_ctrl)
760{ 807{
@@ -762,17 +809,12 @@ int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,
762 struct uvc_control_mapping *mapping; 809 struct uvc_control_mapping *mapping;
763 struct uvc_menu_info *menu; 810 struct uvc_menu_info *menu;
764 unsigned int i; 811 unsigned int i;
765 __u8 *data;
766 int ret; 812 int ret;
767 813
768 ctrl = uvc_find_control(chain, v4l2_ctrl->id, &mapping); 814 ctrl = uvc_find_control(chain, v4l2_ctrl->id, &mapping);
769 if (ctrl == NULL) 815 if (ctrl == NULL)
770 return -EINVAL; 816 return -EINVAL;
771 817
772 data = kmalloc(ctrl->info->size, GFP_KERNEL);
773 if (data == NULL)
774 return -ENOMEM;
775
776 memset(v4l2_ctrl, 0, sizeof *v4l2_ctrl); 818 memset(v4l2_ctrl, 0, sizeof *v4l2_ctrl);
777 v4l2_ctrl->id = mapping->id; 819 v4l2_ctrl->id = mapping->id;
778 v4l2_ctrl->type = mapping->v4l2_type; 820 v4l2_ctrl->type = mapping->v4l2_type;
@@ -782,14 +824,15 @@ int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,
782 if (!(ctrl->info->flags & UVC_CONTROL_SET_CUR)) 824 if (!(ctrl->info->flags & UVC_CONTROL_SET_CUR))
783 v4l2_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; 825 v4l2_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
784 826
785 if (ctrl->info->flags & UVC_CONTROL_GET_DEF) { 827 if (!ctrl->cached) {
786 ret = uvc_query_ctrl(chain->dev, UVC_GET_DEF, ctrl->entity->id, 828 ret = uvc_ctrl_populate_cache(chain, ctrl);
787 chain->dev->intfnum, ctrl->info->selector,
788 data, ctrl->info->size);
789 if (ret < 0) 829 if (ret < 0)
790 goto out; 830 return ret;
791 v4l2_ctrl->default_value = 831 }
792 mapping->get(mapping, UVC_GET_DEF, data); 832
833 if (ctrl->info->flags & UVC_CONTROL_GET_DEF) {
834 v4l2_ctrl->default_value = mapping->get(mapping, UVC_GET_DEF,
835 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_DEF));
793 } 836 }
794 837
795 switch (mapping->v4l2_type) { 838 switch (mapping->v4l2_type) {
@@ -806,56 +849,37 @@ int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,
806 } 849 }
807 } 850 }
808 851
809 ret = 0; 852 return 0;
810 goto out;
811 853
812 case V4L2_CTRL_TYPE_BOOLEAN: 854 case V4L2_CTRL_TYPE_BOOLEAN:
813 v4l2_ctrl->minimum = 0; 855 v4l2_ctrl->minimum = 0;
814 v4l2_ctrl->maximum = 1; 856 v4l2_ctrl->maximum = 1;
815 v4l2_ctrl->step = 1; 857 v4l2_ctrl->step = 1;
816 ret = 0; 858 return 0;
817 goto out;
818 859
819 case V4L2_CTRL_TYPE_BUTTON: 860 case V4L2_CTRL_TYPE_BUTTON:
820 v4l2_ctrl->minimum = 0; 861 v4l2_ctrl->minimum = 0;
821 v4l2_ctrl->maximum = 0; 862 v4l2_ctrl->maximum = 0;
822 v4l2_ctrl->step = 0; 863 v4l2_ctrl->step = 0;
823 ret = 0; 864 return 0;
824 goto out;
825 865
826 default: 866 default:
827 break; 867 break;
828 } 868 }
829 869
830 if (ctrl->info->flags & UVC_CONTROL_GET_MIN) { 870 if (ctrl->info->flags & UVC_CONTROL_GET_MIN)
831 ret = uvc_query_ctrl(chain->dev, UVC_GET_MIN, ctrl->entity->id, 871 v4l2_ctrl->minimum = mapping->get(mapping, UVC_GET_MIN,
832 chain->dev->intfnum, ctrl->info->selector, 872 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MIN));
833 data, ctrl->info->size);
834 if (ret < 0)
835 goto out;
836 v4l2_ctrl->minimum = mapping->get(mapping, UVC_GET_MIN, data);
837 }
838 if (ctrl->info->flags & UVC_CONTROL_GET_MAX) {
839 ret = uvc_query_ctrl(chain->dev, UVC_GET_MAX, ctrl->entity->id,
840 chain->dev->intfnum, ctrl->info->selector,
841 data, ctrl->info->size);
842 if (ret < 0)
843 goto out;
844 v4l2_ctrl->maximum = mapping->get(mapping, UVC_GET_MAX, data);
845 }
846 if (ctrl->info->flags & UVC_CONTROL_GET_RES) {
847 ret = uvc_query_ctrl(chain->dev, UVC_GET_RES, ctrl->entity->id,
848 chain->dev->intfnum, ctrl->info->selector,
849 data, ctrl->info->size);
850 if (ret < 0)
851 goto out;
852 v4l2_ctrl->step = mapping->get(mapping, UVC_GET_RES, data);
853 }
854 873
855 ret = 0; 874 if (ctrl->info->flags & UVC_CONTROL_GET_MAX)
856out: 875 v4l2_ctrl->maximum = mapping->get(mapping, UVC_GET_MAX,
857 kfree(data); 876 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MAX));
858 return ret; 877
878 if (ctrl->info->flags & UVC_CONTROL_GET_RES)
879 v4l2_ctrl->step = mapping->get(mapping, UVC_GET_RES,
880 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES));
881
882 return 0;
859} 883}
860 884
861 885
@@ -997,19 +1021,57 @@ int uvc_ctrl_set(struct uvc_video_chain *chain,
997{ 1021{
998 struct uvc_control *ctrl; 1022 struct uvc_control *ctrl;
999 struct uvc_control_mapping *mapping; 1023 struct uvc_control_mapping *mapping;
1000 s32 value = xctrl->value; 1024 s32 value;
1025 u32 step;
1026 s32 min;
1027 s32 max;
1001 int ret; 1028 int ret;
1002 1029
1003 ctrl = uvc_find_control(chain, xctrl->id, &mapping); 1030 ctrl = uvc_find_control(chain, xctrl->id, &mapping);
1004 if (ctrl == NULL || (ctrl->info->flags & UVC_CONTROL_SET_CUR) == 0) 1031 if (ctrl == NULL || (ctrl->info->flags & UVC_CONTROL_SET_CUR) == 0)
1005 return -EINVAL; 1032 return -EINVAL;
1006 1033
1007 if (mapping->v4l2_type == V4L2_CTRL_TYPE_MENU) { 1034 /* Clamp out of range values. */
1008 if (value < 0 || value >= mapping->menu_count) 1035 switch (mapping->v4l2_type) {
1009 return -EINVAL; 1036 case V4L2_CTRL_TYPE_INTEGER:
1010 value = mapping->menu_info[value].value; 1037 if (!ctrl->cached) {
1038 ret = uvc_ctrl_populate_cache(chain, ctrl);
1039 if (ret < 0)
1040 return ret;
1041 }
1042
1043 min = mapping->get(mapping, UVC_GET_MIN,
1044 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MIN));
1045 max = mapping->get(mapping, UVC_GET_MAX,
1046 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MAX));
1047 step = mapping->get(mapping, UVC_GET_RES,
1048 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES));
1049
1050 xctrl->value = min + (xctrl->value - min + step/2) / step * step;
1051 xctrl->value = clamp(xctrl->value, min, max);
1052 value = xctrl->value;
1053 break;
1054
1055 case V4L2_CTRL_TYPE_BOOLEAN:
1056 xctrl->value = clamp(xctrl->value, 0, 1);
1057 value = xctrl->value;
1058 break;
1059
1060 case V4L2_CTRL_TYPE_MENU:
1061 if (xctrl->value < 0 || xctrl->value >= mapping->menu_count)
1062 return -ERANGE;
1063 value = mapping->menu_info[xctrl->value].value;
1064 break;
1065
1066 default:
1067 value = xctrl->value;
1068 break;
1011 } 1069 }
1012 1070
1071 /* If the mapping doesn't span the whole UVC control, the current value
1072 * needs to be loaded from the device to perform the read-modify-write
1073 * operation.
1074 */
1013 if (!ctrl->loaded && (ctrl->info->size * 8) != mapping->size) { 1075 if (!ctrl->loaded && (ctrl->info->size * 8) != mapping->size) {
1014 if ((ctrl->info->flags & UVC_CONTROL_GET_CUR) == 0) { 1076 if ((ctrl->info->flags & UVC_CONTROL_GET_CUR) == 0) {
1015 memset(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), 1077 memset(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT),
@@ -1027,6 +1089,7 @@ int uvc_ctrl_set(struct uvc_video_chain *chain,
1027 ctrl->loaded = 1; 1089 ctrl->loaded = 1;
1028 } 1090 }
1029 1091
1092 /* Backup the current value in case we need to rollback later. */
1030 if (!ctrl->dirty) { 1093 if (!ctrl->dirty) {
1031 memcpy(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_BACKUP), 1094 memcpy(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_BACKUP),
1032 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), 1095 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT),
@@ -1080,10 +1143,8 @@ int uvc_xu_ctrl_query(struct uvc_video_chain *chain,
1080 } 1143 }
1081 1144
1082 if (!found) { 1145 if (!found) {
1083 uvc_trace(UVC_TRACE_CONTROL, 1146 uvc_trace(UVC_TRACE_CONTROL, "Control %pUl/%u not found.\n",
1084 "Control " UVC_GUID_FORMAT "/%u not found.\n", 1147 entity->extension.guidExtensionCode, xctrl->selector);
1085 UVC_GUID_ARGS(entity->extension.guidExtensionCode),
1086 xctrl->selector);
1087 return -EINVAL; 1148 return -EINVAL;
1088 } 1149 }
1089 1150
@@ -1159,9 +1220,9 @@ int uvc_ctrl_resume_device(struct uvc_device *dev)
1159 (ctrl->info->flags & UVC_CONTROL_RESTORE) == 0) 1220 (ctrl->info->flags & UVC_CONTROL_RESTORE) == 0)
1160 continue; 1221 continue;
1161 1222
1162 printk(KERN_INFO "restoring control " UVC_GUID_FORMAT 1223 printk(KERN_INFO "restoring control %pUl/%u/%u\n",
1163 "/%u/%u\n", UVC_GUID_ARGS(ctrl->info->entity), 1224 ctrl->info->entity, ctrl->info->index,
1164 ctrl->info->index, ctrl->info->selector); 1225 ctrl->info->selector);
1165 ctrl->dirty = 1; 1226 ctrl->dirty = 1;
1166 } 1227 }
1167 1228
@@ -1215,47 +1276,43 @@ static void uvc_ctrl_add_ctrl(struct uvc_device *dev,
1215 ret = uvc_query_ctrl(dev, UVC_GET_LEN, ctrl->entity->id, 1276 ret = uvc_query_ctrl(dev, UVC_GET_LEN, ctrl->entity->id,
1216 dev->intfnum, info->selector, (__u8 *)&size, 2); 1277 dev->intfnum, info->selector, (__u8 *)&size, 2);
1217 if (ret < 0) { 1278 if (ret < 0) {
1218 uvc_trace(UVC_TRACE_CONTROL, "GET_LEN failed on " 1279 uvc_trace(UVC_TRACE_CONTROL,
1219 "control " UVC_GUID_FORMAT "/%u (%d).\n", 1280 "GET_LEN failed on control %pUl/%u (%d).\n",
1220 UVC_GUID_ARGS(info->entity), info->selector, 1281 info->entity, info->selector, ret);
1221 ret);
1222 return; 1282 return;
1223 } 1283 }
1224 1284
1225 if (info->size != le16_to_cpu(size)) { 1285 if (info->size != le16_to_cpu(size)) {
1226 uvc_trace(UVC_TRACE_CONTROL, "Control " UVC_GUID_FORMAT 1286 uvc_trace(UVC_TRACE_CONTROL, "Control %pUl/%u size "
1227 "/%u size doesn't match user supplied " 1287 "doesn't match user supplied value.\n",
1228 "value.\n", UVC_GUID_ARGS(info->entity), 1288 info->entity, info->selector);
1229 info->selector);
1230 return; 1289 return;
1231 } 1290 }
1232 1291
1233 ret = uvc_query_ctrl(dev, UVC_GET_INFO, ctrl->entity->id, 1292 ret = uvc_query_ctrl(dev, UVC_GET_INFO, ctrl->entity->id,
1234 dev->intfnum, info->selector, &inf, 1); 1293 dev->intfnum, info->selector, &inf, 1);
1235 if (ret < 0) { 1294 if (ret < 0) {
1236 uvc_trace(UVC_TRACE_CONTROL, "GET_INFO failed on " 1295 uvc_trace(UVC_TRACE_CONTROL,
1237 "control " UVC_GUID_FORMAT "/%u (%d).\n", 1296 "GET_INFO failed on control %pUl/%u (%d).\n",
1238 UVC_GUID_ARGS(info->entity), info->selector, 1297 info->entity, info->selector, ret);
1239 ret);
1240 return; 1298 return;
1241 } 1299 }
1242 1300
1243 flags = info->flags; 1301 flags = info->flags;
1244 if (((flags & UVC_CONTROL_GET_CUR) && !(inf & (1 << 0))) || 1302 if (((flags & UVC_CONTROL_GET_CUR) && !(inf & (1 << 0))) ||
1245 ((flags & UVC_CONTROL_SET_CUR) && !(inf & (1 << 1)))) { 1303 ((flags & UVC_CONTROL_SET_CUR) && !(inf & (1 << 1)))) {
1246 uvc_trace(UVC_TRACE_CONTROL, "Control " 1304 uvc_trace(UVC_TRACE_CONTROL, "Control %pUl/%u flags "
1247 UVC_GUID_FORMAT "/%u flags don't match " 1305 "don't match supported operations.\n",
1248 "supported operations.\n", 1306 info->entity, info->selector);
1249 UVC_GUID_ARGS(info->entity), info->selector);
1250 return; 1307 return;
1251 } 1308 }
1252 } 1309 }
1253 1310
1254 ctrl->info = info; 1311 ctrl->info = info;
1255 ctrl->data = kmalloc(ctrl->info->size * UVC_CTRL_NDATA, GFP_KERNEL); 1312 ctrl->data = kmalloc(ctrl->info->size * UVC_CTRL_DATA_LAST, GFP_KERNEL);
1256 uvc_trace(UVC_TRACE_CONTROL, "Added control " UVC_GUID_FORMAT "/%u " 1313 uvc_trace(UVC_TRACE_CONTROL, "Added control %pUl/%u to device %s "
1257 "to device %s entity %u\n", UVC_GUID_ARGS(ctrl->info->entity), 1314 "entity %u\n", ctrl->info->entity, ctrl->info->selector,
1258 ctrl->info->selector, dev->udev->devpath, entity->id); 1315 dev->udev->devpath, entity->id);
1259} 1316}
1260 1317
1261/* 1318/*
@@ -1281,17 +1338,16 @@ int uvc_ctrl_add_info(struct uvc_control_info *info)
1281 continue; 1338 continue;
1282 1339
1283 if (ctrl->selector == info->selector) { 1340 if (ctrl->selector == info->selector) {
1284 uvc_trace(UVC_TRACE_CONTROL, "Control " 1341 uvc_trace(UVC_TRACE_CONTROL,
1285 UVC_GUID_FORMAT "/%u is already defined.\n", 1342 "Control %pUl/%u is already defined.\n",
1286 UVC_GUID_ARGS(info->entity), info->selector); 1343 info->entity, info->selector);
1287 ret = -EEXIST; 1344 ret = -EEXIST;
1288 goto end; 1345 goto end;
1289 } 1346 }
1290 if (ctrl->index == info->index) { 1347 if (ctrl->index == info->index) {
1291 uvc_trace(UVC_TRACE_CONTROL, "Control " 1348 uvc_trace(UVC_TRACE_CONTROL,
1292 UVC_GUID_FORMAT "/%u would overwrite index " 1349 "Control %pUl/%u would overwrite index %d.\n",
1293 "%d.\n", UVC_GUID_ARGS(info->entity), 1350 info->entity, info->selector, info->index);
1294 info->selector, info->index);
1295 ret = -EEXIST; 1351 ret = -EEXIST;
1296 goto end; 1352 goto end;
1297 } 1353 }
@@ -1332,10 +1388,9 @@ int uvc_ctrl_add_mapping(struct uvc_control_mapping *mapping)
1332 continue; 1388 continue;
1333 1389
1334 if (info->size * 8 < mapping->size + mapping->offset) { 1390 if (info->size * 8 < mapping->size + mapping->offset) {
1335 uvc_trace(UVC_TRACE_CONTROL, "Mapping '%s' would " 1391 uvc_trace(UVC_TRACE_CONTROL,
1336 "overflow control " UVC_GUID_FORMAT "/%u\n", 1392 "Mapping '%s' would overflow control %pUl/%u\n",
1337 mapping->name, UVC_GUID_ARGS(info->entity), 1393 mapping->name, info->entity, info->selector);
1338 info->selector);
1339 ret = -EOVERFLOW; 1394 ret = -EOVERFLOW;
1340 goto end; 1395 goto end;
1341 } 1396 }
@@ -1354,9 +1409,9 @@ int uvc_ctrl_add_mapping(struct uvc_control_mapping *mapping)
1354 1409
1355 mapping->ctrl = info; 1410 mapping->ctrl = info;
1356 list_add_tail(&mapping->list, &info->mappings); 1411 list_add_tail(&mapping->list, &info->mappings);
1357 uvc_trace(UVC_TRACE_CONTROL, "Adding mapping %s to control " 1412 uvc_trace(UVC_TRACE_CONTROL,
1358 UVC_GUID_FORMAT "/%u.\n", mapping->name, 1413 "Adding mapping %s to control %pUl/%u.\n",
1359 UVC_GUID_ARGS(info->entity), info->selector); 1414 mapping->name, info->entity, info->selector);
1360 1415
1361 ret = 0; 1416 ret = 0;
1362 break; 1417 break;
@@ -1378,6 +1433,7 @@ uvc_ctrl_prune_entity(struct uvc_device *dev, struct uvc_entity *entity)
1378 struct usb_device_id id; 1433 struct usb_device_id id;
1379 u8 index; 1434 u8 index;
1380 } blacklist[] = { 1435 } blacklist[] = {
1436 { { USB_DEVICE(0x13d3, 0x509b) }, 9 }, /* Gain */
1381 { { USB_DEVICE(0x1c4f, 0x3000) }, 6 }, /* WB Temperature */ 1437 { { USB_DEVICE(0x1c4f, 0x3000) }, 6 }, /* WB Temperature */
1382 { { USB_DEVICE(0x5986, 0x0241) }, 2 }, /* Hue */ 1438 { { USB_DEVICE(0x5986, 0x0241) }, 2 }, /* Hue */
1383 }; 1439 };
diff --git a/drivers/media/video/uvc/uvc_driver.c b/drivers/media/video/uvc/uvc_driver.c
index 391cccca7ffc..a814820a3f6e 100644
--- a/drivers/media/video/uvc/uvc_driver.c
+++ b/drivers/media/video/uvc/uvc_driver.c
@@ -43,8 +43,9 @@
43#define DRIVER_VERSION "v0.1.0" 43#define DRIVER_VERSION "v0.1.0"
44#endif 44#endif
45 45
46unsigned int uvc_clock_param = CLOCK_MONOTONIC;
46unsigned int uvc_no_drop_param; 47unsigned int uvc_no_drop_param;
47static unsigned int uvc_quirks_param; 48static unsigned int uvc_quirks_param = -1;
48unsigned int uvc_trace_param; 49unsigned int uvc_trace_param;
49unsigned int uvc_timeout_param = UVC_CTRL_STREAMING_TIMEOUT; 50unsigned int uvc_timeout_param = UVC_CTRL_STREAMING_TIMEOUT;
50 51
@@ -59,6 +60,11 @@ static struct uvc_format_desc uvc_fmts[] = {
59 .fcc = V4L2_PIX_FMT_YUYV, 60 .fcc = V4L2_PIX_FMT_YUYV,
60 }, 61 },
61 { 62 {
63 .name = "YUV 4:2:2 (YUYV)",
64 .guid = UVC_GUID_FORMAT_YUY2_ISIGHT,
65 .fcc = V4L2_PIX_FMT_YUYV,
66 },
67 {
62 .name = "YUV 4:2:0 (NV12)", 68 .name = "YUV 4:2:0 (NV12)",
63 .guid = UVC_GUID_FORMAT_NV12, 69 .guid = UVC_GUID_FORMAT_NV12,
64 .fcc = V4L2_PIX_FMT_NV12, 70 .fcc = V4L2_PIX_FMT_NV12,
@@ -309,11 +315,10 @@ static int uvc_parse_format(struct uvc_device *dev,
309 sizeof format->name); 315 sizeof format->name);
310 format->fcc = fmtdesc->fcc; 316 format->fcc = fmtdesc->fcc;
311 } else { 317 } else {
312 uvc_printk(KERN_INFO, "Unknown video format " 318 uvc_printk(KERN_INFO, "Unknown video format %pUl\n",
313 UVC_GUID_FORMAT "\n", 319 &buffer[5]);
314 UVC_GUID_ARGS(&buffer[5])); 320 snprintf(format->name, sizeof(format->name), "%pUl\n",
315 snprintf(format->name, sizeof format->name, 321 &buffer[5]);
316 UVC_GUID_FORMAT, UVC_GUID_ARGS(&buffer[5]));
317 format->fcc = 0; 322 format->fcc = 0;
318 } 323 }
319 324
@@ -1750,7 +1755,8 @@ static int uvc_probe(struct usb_interface *intf,
1750 dev->udev = usb_get_dev(udev); 1755 dev->udev = usb_get_dev(udev);
1751 dev->intf = usb_get_intf(intf); 1756 dev->intf = usb_get_intf(intf);
1752 dev->intfnum = intf->cur_altsetting->desc.bInterfaceNumber; 1757 dev->intfnum = intf->cur_altsetting->desc.bInterfaceNumber;
1753 dev->quirks = id->driver_info | uvc_quirks_param; 1758 dev->quirks = (uvc_quirks_param == -1)
1759 ? id->driver_info : uvc_quirks_param;
1754 1760
1755 if (udev->product != NULL) 1761 if (udev->product != NULL)
1756 strlcpy(dev->name, udev->product, sizeof dev->name); 1762 strlcpy(dev->name, udev->product, sizeof dev->name);
@@ -1773,9 +1779,9 @@ static int uvc_probe(struct usb_interface *intf,
1773 le16_to_cpu(udev->descriptor.idVendor), 1779 le16_to_cpu(udev->descriptor.idVendor),
1774 le16_to_cpu(udev->descriptor.idProduct)); 1780 le16_to_cpu(udev->descriptor.idProduct));
1775 1781
1776 if (uvc_quirks_param != 0) { 1782 if (dev->quirks != id->driver_info) {
1777 uvc_printk(KERN_INFO, "Forcing device quirks 0x%x by module " 1783 uvc_printk(KERN_INFO, "Forcing device quirks to 0x%x by module "
1778 "parameter for testing purpose.\n", uvc_quirks_param); 1784 "parameter for testing purpose.\n", dev->quirks);
1779 uvc_printk(KERN_INFO, "Please report required quirks to the " 1785 uvc_printk(KERN_INFO, "Please report required quirks to the "
1780 "linux-uvc-devel mailing list.\n"); 1786 "linux-uvc-devel mailing list.\n");
1781 } 1787 }
@@ -1892,6 +1898,45 @@ static int uvc_reset_resume(struct usb_interface *intf)
1892} 1898}
1893 1899
1894/* ------------------------------------------------------------------------ 1900/* ------------------------------------------------------------------------
1901 * Module parameters
1902 */
1903
1904static int uvc_clock_param_get(char *buffer, struct kernel_param *kp)
1905{
1906 if (uvc_clock_param == CLOCK_MONOTONIC)
1907 return sprintf(buffer, "CLOCK_MONOTONIC");
1908 else
1909 return sprintf(buffer, "CLOCK_REALTIME");
1910}
1911
1912static int uvc_clock_param_set(const char *val, struct kernel_param *kp)
1913{
1914 if (strncasecmp(val, "clock_", strlen("clock_")) == 0)
1915 val += strlen("clock_");
1916
1917 if (strcasecmp(val, "monotonic") == 0)
1918 uvc_clock_param = CLOCK_MONOTONIC;
1919 else if (strcasecmp(val, "realtime") == 0)
1920 uvc_clock_param = CLOCK_REALTIME;
1921 else
1922 return -EINVAL;
1923
1924 return 0;
1925}
1926
1927module_param_call(clock, uvc_clock_param_set, uvc_clock_param_get,
1928 &uvc_clock_param, S_IRUGO|S_IWUSR);
1929MODULE_PARM_DESC(clock, "Video buffers timestamp clock");
1930module_param_named(nodrop, uvc_no_drop_param, uint, S_IRUGO|S_IWUSR);
1931MODULE_PARM_DESC(nodrop, "Don't drop incomplete frames");
1932module_param_named(quirks, uvc_quirks_param, uint, S_IRUGO|S_IWUSR);
1933MODULE_PARM_DESC(quirks, "Forced device quirks");
1934module_param_named(trace, uvc_trace_param, uint, S_IRUGO|S_IWUSR);
1935MODULE_PARM_DESC(trace, "Trace level bitmask");
1936module_param_named(timeout, uvc_timeout_param, uint, S_IRUGO|S_IWUSR);
1937MODULE_PARM_DESC(timeout, "Streaming control requests timeout");
1938
1939/* ------------------------------------------------------------------------
1895 * Driver initialization and cleanup 1940 * Driver initialization and cleanup
1896 */ 1941 */
1897 1942
@@ -2197,15 +2242,6 @@ static void __exit uvc_cleanup(void)
2197module_init(uvc_init); 2242module_init(uvc_init);
2198module_exit(uvc_cleanup); 2243module_exit(uvc_cleanup);
2199 2244
2200module_param_named(nodrop, uvc_no_drop_param, uint, S_IRUGO|S_IWUSR);
2201MODULE_PARM_DESC(nodrop, "Don't drop incomplete frames");
2202module_param_named(quirks, uvc_quirks_param, uint, S_IRUGO|S_IWUSR);
2203MODULE_PARM_DESC(quirks, "Forced device quirks");
2204module_param_named(trace, uvc_trace_param, uint, S_IRUGO|S_IWUSR);
2205MODULE_PARM_DESC(trace, "Trace level bitmask");
2206module_param_named(timeout, uvc_timeout_param, uint, S_IRUGO|S_IWUSR);
2207MODULE_PARM_DESC(timeout, "Streaming control requests timeout");
2208
2209MODULE_AUTHOR(DRIVER_AUTHOR); 2245MODULE_AUTHOR(DRIVER_AUTHOR);
2210MODULE_DESCRIPTION(DRIVER_DESC); 2246MODULE_DESCRIPTION(DRIVER_DESC);
2211MODULE_LICENSE("GPL"); 2247MODULE_LICENSE("GPL");
diff --git a/drivers/media/video/uvc/uvc_queue.c b/drivers/media/video/uvc/uvc_queue.c
index ea11839cba4a..4a925a31b0e0 100644
--- a/drivers/media/video/uvc/uvc_queue.c
+++ b/drivers/media/video/uvc/uvc_queue.c
@@ -502,7 +502,6 @@ struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
502 spin_unlock_irqrestore(&queue->irqlock, flags); 502 spin_unlock_irqrestore(&queue->irqlock, flags);
503 503
504 buf->buf.sequence = queue->sequence++; 504 buf->buf.sequence = queue->sequence++;
505 do_gettimeofday(&buf->buf.timestamp);
506 505
507 wake_up(&buf->wait); 506 wake_up(&buf->wait);
508 return nextbuf; 507 return nextbuf;
diff --git a/drivers/media/video/uvc/uvc_v4l2.c b/drivers/media/video/uvc/uvc_v4l2.c
index 23239a4adefe..43152aa52227 100644
--- a/drivers/media/video/uvc/uvc_v4l2.c
+++ b/drivers/media/video/uvc/uvc_v4l2.c
@@ -539,7 +539,7 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
539 xctrl.id = ctrl->id; 539 xctrl.id = ctrl->id;
540 xctrl.value = ctrl->value; 540 xctrl.value = ctrl->value;
541 541
542 uvc_ctrl_begin(chain); 542 ret = uvc_ctrl_begin(chain);
543 if (ret < 0) 543 if (ret < 0)
544 return ret; 544 return ret;
545 545
@@ -549,6 +549,8 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
549 return ret; 549 return ret;
550 } 550 }
551 ret = uvc_ctrl_commit(chain); 551 ret = uvc_ctrl_commit(chain);
552 if (ret == 0)
553 ctrl->value = xctrl.value;
552 break; 554 break;
553 } 555 }
554 556
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c
index 7dcf534a0cf3..6b0666be370f 100644
--- a/drivers/media/video/uvc/uvc_video.c
+++ b/drivers/media/video/uvc/uvc_video.c
@@ -410,6 +410,8 @@ static int uvc_video_decode_start(struct uvc_streaming *stream,
410 * when the EOF bit is set to force synchronisation on the next packet. 410 * when the EOF bit is set to force synchronisation on the next packet.
411 */ 411 */
412 if (buf->state != UVC_BUF_STATE_ACTIVE) { 412 if (buf->state != UVC_BUF_STATE_ACTIVE) {
413 struct timespec ts;
414
413 if (fid == stream->last_fid) { 415 if (fid == stream->last_fid) {
414 uvc_trace(UVC_TRACE_FRAME, "Dropping payload (out of " 416 uvc_trace(UVC_TRACE_FRAME, "Dropping payload (out of "
415 "sync).\n"); 417 "sync).\n");
@@ -419,6 +421,14 @@ static int uvc_video_decode_start(struct uvc_streaming *stream,
419 return -ENODATA; 421 return -ENODATA;
420 } 422 }
421 423
424 if (uvc_clock_param == CLOCK_MONOTONIC)
425 ktime_get_ts(&ts);
426 else
427 ktime_get_real_ts(&ts);
428
429 buf->buf.timestamp.tv_sec = ts.tv_sec;
430 buf->buf.timestamp.tv_usec = ts.tv_nsec / NSEC_PER_USEC;
431
422 /* TODO: Handle PTS and SCR. */ 432 /* TODO: Handle PTS and SCR. */
423 buf->state = UVC_BUF_STATE_ACTIVE; 433 buf->state = UVC_BUF_STATE_ACTIVE;
424 } 434 }
diff --git a/drivers/media/video/uvc/uvcvideo.h b/drivers/media/video/uvc/uvcvideo.h
index 2337585001ea..2bba059259e6 100644
--- a/drivers/media/video/uvc/uvcvideo.h
+++ b/drivers/media/video/uvc/uvcvideo.h
@@ -113,6 +113,9 @@ struct uvc_xu_control {
113#define UVC_GUID_FORMAT_YUY2 \ 113#define UVC_GUID_FORMAT_YUY2 \
114 { 'Y', 'U', 'Y', '2', 0x00, 0x00, 0x10, 0x00, \ 114 { 'Y', 'U', 'Y', '2', 0x00, 0x00, 0x10, 0x00, \
115 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71} 115 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
116#define UVC_GUID_FORMAT_YUY2_ISIGHT \
117 { 'Y', 'U', 'Y', '2', 0x00, 0x00, 0x10, 0x00, \
118 0x80, 0x00, 0x00, 0x00, 0x00, 0x38, 0x9b, 0x71}
116#define UVC_GUID_FORMAT_NV12 \ 119#define UVC_GUID_FORMAT_NV12 \
117 { 'N', 'V', '1', '2', 0x00, 0x00, 0x10, 0x00, \ 120 { 'N', 'V', '1', '2', 0x00, 0x00, 0x10, 0x00, \
118 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71} 121 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
@@ -149,7 +152,7 @@ struct uvc_xu_control {
149#define UVC_MAX_STATUS_SIZE 16 152#define UVC_MAX_STATUS_SIZE 16
150 153
151#define UVC_CTRL_CONTROL_TIMEOUT 300 154#define UVC_CTRL_CONTROL_TIMEOUT 300
152#define UVC_CTRL_STREAMING_TIMEOUT 3000 155#define UVC_CTRL_STREAMING_TIMEOUT 5000
153 156
154/* Devices quirks */ 157/* Devices quirks */
155#define UVC_QUIRK_STATUS_INTERVAL 0x00000001 158#define UVC_QUIRK_STATUS_INTERVAL 0x00000001
@@ -242,7 +245,8 @@ struct uvc_control {
242 uvc_control_info. */ 245 uvc_control_info. */
243 __u8 dirty : 1, 246 __u8 dirty : 1,
244 loaded : 1, 247 loaded : 1,
245 modified : 1; 248 modified : 1,
249 cached : 1;
246 250
247 __u8 *data; 251 __u8 *data;
248}; 252};
@@ -533,6 +537,7 @@ struct uvc_driver {
533#define UVC_WARN_MINMAX 0 537#define UVC_WARN_MINMAX 0
534#define UVC_WARN_PROBE_DEF 1 538#define UVC_WARN_PROBE_DEF 1
535 539
540extern unsigned int uvc_clock_param;
536extern unsigned int uvc_no_drop_param; 541extern unsigned int uvc_no_drop_param;
537extern unsigned int uvc_trace_param; 542extern unsigned int uvc_trace_param;
538extern unsigned int uvc_timeout_param; 543extern unsigned int uvc_timeout_param;
@@ -552,16 +557,6 @@ extern unsigned int uvc_timeout_param;
552#define uvc_printk(level, msg...) \ 557#define uvc_printk(level, msg...) \
553 printk(level "uvcvideo: " msg) 558 printk(level "uvcvideo: " msg)
554 559
555#define UVC_GUID_FORMAT "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-" \
556 "%02x%02x%02x%02x%02x%02x"
557#define UVC_GUID_ARGS(guid) \
558 (guid)[3], (guid)[2], (guid)[1], (guid)[0], \
559 (guid)[5], (guid)[4], \
560 (guid)[7], (guid)[6], \
561 (guid)[8], (guid)[9], \
562 (guid)[10], (guid)[11], (guid)[12], \
563 (guid)[13], (guid)[14], (guid)[15]
564
565/* -------------------------------------------------------------------------- 560/* --------------------------------------------------------------------------
566 * Internal functions. 561 * Internal functions.
567 */ 562 */
diff --git a/drivers/media/video/v4l2-compat-ioctl32.c b/drivers/media/video/v4l2-compat-ioctl32.c
index c4150bd26337..f77f84bfe714 100644
--- a/drivers/media/video/v4l2-compat-ioctl32.c
+++ b/drivers/media/video/v4l2-compat-ioctl32.c
@@ -288,7 +288,7 @@ static int get_v4l2_window32(struct v4l2_window *kp, struct v4l2_window32 __user
288 288
289static int put_v4l2_window32(struct v4l2_window *kp, struct v4l2_window32 __user *up) 289static int put_v4l2_window32(struct v4l2_window *kp, struct v4l2_window32 __user *up)
290{ 290{
291 if (copy_to_user(&up->w, &kp->w, sizeof(up->w)) || 291 if (copy_to_user(&up->w, &kp->w, sizeof(kp->w)) ||
292 put_user(kp->field, &up->field) || 292 put_user(kp->field, &up->field) ||
293 put_user(kp->chromakey, &up->chromakey) || 293 put_user(kp->chromakey, &up->chromakey) ||
294 put_user(kp->clipcount, &up->clipcount)) 294 put_user(kp->clipcount, &up->clipcount))
@@ -475,6 +475,9 @@ static int get_v4l2_buffer32(struct v4l2_buffer *kp, struct v4l2_buffer32 __user
475 return -EFAULT; 475 return -EFAULT;
476 switch (kp->memory) { 476 switch (kp->memory) {
477 case V4L2_MEMORY_MMAP: 477 case V4L2_MEMORY_MMAP:
478 if (get_user(kp->length, &up->length) ||
479 get_user(kp->m.offset, &up->m.offset))
480 return -EFAULT;
478 break; 481 break;
479 case V4L2_MEMORY_USERPTR: 482 case V4L2_MEMORY_USERPTR:
480 { 483 {
diff --git a/drivers/media/video/videobuf-dma-sg.c b/drivers/media/video/videobuf-dma-sg.c
index fa78555b118b..fcd045e7a1c1 100644
--- a/drivers/media/video/videobuf-dma-sg.c
+++ b/drivers/media/video/videobuf-dma-sg.c
@@ -418,6 +418,8 @@ static void *__videobuf_alloc(size_t size)
418 struct videobuf_buffer *vb; 418 struct videobuf_buffer *vb;
419 419
420 vb = kzalloc(size+sizeof(*mem),GFP_KERNEL); 420 vb = kzalloc(size+sizeof(*mem),GFP_KERNEL);
421 if (!vb)
422 return vb;
421 423
422 mem = vb->priv = ((char *)vb)+size; 424 mem = vb->priv = ((char *)vb)+size;
423 mem->magic=MAGIC_SG_MEM; 425 mem->magic=MAGIC_SG_MEM;
diff --git a/drivers/media/video/videobuf-vmalloc.c b/drivers/media/video/videobuf-vmalloc.c
index d6e6a28fb6b8..136e09383c06 100644
--- a/drivers/media/video/videobuf-vmalloc.c
+++ b/drivers/media/video/videobuf-vmalloc.c
@@ -138,6 +138,8 @@ static void *__videobuf_alloc(size_t size)
138 struct videobuf_buffer *vb; 138 struct videobuf_buffer *vb;
139 139
140 vb = kzalloc(size+sizeof(*mem),GFP_KERNEL); 140 vb = kzalloc(size+sizeof(*mem),GFP_KERNEL);
141 if (!vb)
142 return vb;
141 143
142 mem = vb->priv = ((char *)vb)+size; 144 mem = vb->priv = ((char *)vb)+size;
143 mem->magic=MAGIC_VMAL_MEM; 145 mem->magic=MAGIC_VMAL_MEM;
diff --git a/drivers/media/video/vivi.c b/drivers/media/video/vivi.c
index 37632a064966..cdbe70385c12 100644
--- a/drivers/media/video/vivi.c
+++ b/drivers/media/video/vivi.c
@@ -1371,7 +1371,7 @@ static int __init vivi_create_instance(int inst)
1371 /* Now that everything is fine, let's add it to device list */ 1371 /* Now that everything is fine, let's add it to device list */
1372 list_add_tail(&dev->vivi_devlist, &vivi_devlist); 1372 list_add_tail(&dev->vivi_devlist, &vivi_devlist);
1373 1373
1374 if (video_nr >= 0) 1374 if (video_nr != -1)
1375 video_nr++; 1375 video_nr++;
1376 1376
1377 dev->vfd = vfd; 1377 dev->vfd = vfd;
diff --git a/drivers/media/video/zc0301/Kconfig b/drivers/media/video/zc0301/Kconfig
index edb00293cd59..a7e610e0be9e 100644
--- a/drivers/media/video/zc0301/Kconfig
+++ b/drivers/media/video/zc0301/Kconfig
@@ -1,7 +1,11 @@
1config USB_ZC0301 1config USB_ZC0301
2 tristate "USB ZC0301[P] Image Processor and Control Chip support" 2 tristate "USB ZC0301[P] webcam support (DEPRECATED)"
3 depends on VIDEO_V4L2 3 depends on VIDEO_V4L2
4 default n
4 ---help--- 5 ---help---
6 This driver is DEPRECATED please use the gspca zc3xx module
7 instead.
8
5 Say Y here if you want support for cameras based on the ZC0301 or 9 Say Y here if you want support for cameras based on the ZC0301 or
6 ZC0301P Image Processors and Control Chips. 10 ZC0301P Image Processors and Control Chips.
7 11
diff --git a/drivers/media/video/zoran/zoran_device.c b/drivers/media/video/zoran/zoran_device.c
index f6c2fb4fc3b4..e6ad4b205611 100644
--- a/drivers/media/video/zoran/zoran_device.c
+++ b/drivers/media/video/zoran/zoran_device.c
@@ -1196,7 +1196,8 @@ zoran_reap_stat_com (struct zoran *zr)
1196static void zoran_restart(struct zoran *zr) 1196static void zoran_restart(struct zoran *zr)
1197{ 1197{
1198 /* Now the stat_comm buffer is ready for restart */ 1198 /* Now the stat_comm buffer is ready for restart */
1199 int status = 0, mode; 1199 unsigned int status = 0;
1200 int mode;
1200 1201
1201 if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) { 1202 if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
1202 decoder_call(zr, video, g_input_status, &status); 1203 decoder_call(zr, video, g_input_status, &status);
@@ -1228,7 +1229,7 @@ error_handler (struct zoran *zr,
1228 u32 astat, 1229 u32 astat,
1229 u32 stat) 1230 u32 stat)
1230{ 1231{
1231 int i, j; 1232 int i;
1232 1233
1233 /* This is JPEG error handling part */ 1234 /* This is JPEG error handling part */
1234 if (zr->codec_mode != BUZ_MODE_MOTION_COMPRESS && 1235 if (zr->codec_mode != BUZ_MODE_MOTION_COMPRESS &&
@@ -1279,6 +1280,7 @@ error_handler (struct zoran *zr,
1279 /* Report error */ 1280 /* Report error */
1280 if (zr36067_debug > 1 && zr->num_errors <= 8) { 1281 if (zr36067_debug > 1 && zr->num_errors <= 8) {
1281 long frame; 1282 long frame;
1283 int j;
1282 1284
1283 frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME]; 1285 frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME];
1284 printk(KERN_ERR 1286 printk(KERN_ERR
diff --git a/drivers/media/video/zoran/zoran_driver.c b/drivers/media/video/zoran/zoran_driver.c
index 2ddffed019ee..ec41303544e5 100644
--- a/drivers/media/video/zoran/zoran_driver.c
+++ b/drivers/media/video/zoran/zoran_driver.c
@@ -324,7 +324,7 @@ static int jpg_fbuffer_alloc(struct zoran_fh *fh)
324 /* Allocate fragment table for this buffer */ 324 /* Allocate fragment table for this buffer */
325 325
326 mem = (void *)get_zeroed_page(GFP_KERNEL); 326 mem = (void *)get_zeroed_page(GFP_KERNEL);
327 if (mem == 0) { 327 if (!mem) {
328 dprintk(1, 328 dprintk(1,
329 KERN_ERR 329 KERN_ERR
330 "%s: %s - get_zeroed_page (frag_tab) failed for buffer %d\n", 330 "%s: %s - get_zeroed_page (frag_tab) failed for buffer %d\n",
@@ -1444,7 +1444,7 @@ zoran_set_norm (struct zoran *zr,
1444 } 1444 }
1445 1445
1446 if (norm == V4L2_STD_ALL) { 1446 if (norm == V4L2_STD_ALL) {
1447 int status = 0; 1447 unsigned int status = 0;
1448 v4l2_std_id std = 0; 1448 v4l2_std_id std = 0;
1449 1449
1450 decoder_call(zr, video, querystd, &std); 1450 decoder_call(zr, video, querystd, &std);
diff --git a/drivers/media/video/zr364xx.c b/drivers/media/video/zr364xx.c
index f0eae83e3d89..3d4bac252902 100644
--- a/drivers/media/video/zr364xx.c
+++ b/drivers/media/video/zr364xx.c
@@ -78,6 +78,7 @@
78#define METHOD0 0 78#define METHOD0 0
79#define METHOD1 1 79#define METHOD1 1
80#define METHOD2 2 80#define METHOD2 2
81#define METHOD3 3
81 82
82 83
83/* Module parameters */ 84/* Module parameters */
@@ -114,7 +115,7 @@ static struct usb_device_id device_table[] = {
114 {USB_DEVICE(0x06d6, 0x003b), .driver_info = METHOD0 }, 115 {USB_DEVICE(0x06d6, 0x003b), .driver_info = METHOD0 },
115 {USB_DEVICE(0x0a17, 0x004e), .driver_info = METHOD2 }, 116 {USB_DEVICE(0x0a17, 0x004e), .driver_info = METHOD2 },
116 {USB_DEVICE(0x041e, 0x405d), .driver_info = METHOD2 }, 117 {USB_DEVICE(0x041e, 0x405d), .driver_info = METHOD2 },
117 {USB_DEVICE(0x08ca, 0x2102), .driver_info = METHOD2 }, 118 {USB_DEVICE(0x08ca, 0x2102), .driver_info = METHOD3 },
118 {USB_DEVICE(0x06d6, 0x003d), .driver_info = METHOD0 }, 119 {USB_DEVICE(0x06d6, 0x003d), .driver_info = METHOD0 },
119 {} /* Terminating entry */ 120 {} /* Terminating entry */
120}; 121};
@@ -302,7 +303,7 @@ static message m2[] = {
302}; 303};
303 304
304/* init table */ 305/* init table */
305static message *init[3] = { m0, m1, m2 }; 306static message *init[4] = { m0, m1, m2, m2 };
306 307
307 308
308/* JPEG static data in header (Huffman table, etc) */ 309/* JPEG static data in header (Huffman table, etc) */
@@ -967,6 +968,22 @@ static int zr364xx_vidioc_s_fmt_vid_cap(struct file *file, void *priv,
967 m0d1[0] = mode; 968 m0d1[0] = mode;
968 m1[2].value = 0xf000 + mode; 969 m1[2].value = 0xf000 + mode;
969 m2[1].value = 0xf000 + mode; 970 m2[1].value = 0xf000 + mode;
971
972 /* special case for METHOD3, the modes are different */
973 if (cam->method == METHOD3) {
974 switch (mode) {
975 case 1:
976 m2[1].value = 0xf000 + 4;
977 break;
978 case 2:
979 m2[1].value = 0xf000 + 0;
980 break;
981 default:
982 m2[1].value = 0xf000 + 1;
983 break;
984 }
985 }
986
970 header2[437] = cam->height / 256; 987 header2[437] = cam->height / 256;
971 header2[438] = cam->height % 256; 988 header2[438] = cam->height % 256;
972 header2[439] = cam->width / 256; 989 header2[439] = cam->width / 256;
@@ -1582,6 +1599,22 @@ static int zr364xx_probe(struct usb_interface *intf,
1582 m0d1[0] = mode; 1599 m0d1[0] = mode;
1583 m1[2].value = 0xf000 + mode; 1600 m1[2].value = 0xf000 + mode;
1584 m2[1].value = 0xf000 + mode; 1601 m2[1].value = 0xf000 + mode;
1602
1603 /* special case for METHOD3, the modes are different */
1604 if (cam->method == METHOD3) {
1605 switch (mode) {
1606 case 1:
1607 m2[1].value = 0xf000 + 4;
1608 break;
1609 case 2:
1610 m2[1].value = 0xf000 + 0;
1611 break;
1612 default:
1613 m2[1].value = 0xf000 + 1;
1614 break;
1615 }
1616 }
1617
1585 header2[437] = cam->height / 256; 1618 header2[437] = cam->height / 256;
1586 header2[438] = cam->height % 256; 1619 header2[438] = cam->height % 256;
1587 header2[439] = cam->width / 256; 1620 header2[439] = cam->width / 256;
diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c
index 44d2037e9e56..5382b5a44aff 100644
--- a/drivers/message/fusion/mptbase.c
+++ b/drivers/message/fusion/mptbase.c
@@ -126,8 +126,6 @@ static int mfcounter = 0;
126 * Public data... 126 * Public data...
127 */ 127 */
128 128
129static struct proc_dir_entry *mpt_proc_root_dir;
130
131#define WHOINIT_UNKNOWN 0xAA 129#define WHOINIT_UNKNOWN 0xAA
132 130
133/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ 131/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
@@ -146,6 +144,9 @@ static MPT_EVHANDLER MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
146static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS]; 144static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
147static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS]; 145static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
148 146
147#ifdef CONFIG_PROC_FS
148static struct proc_dir_entry *mpt_proc_root_dir;
149#endif
149 150
150/* 151/*
151 * Driver Callback Index's 152 * Driver Callback Index's
diff --git a/drivers/message/fusion/mptbase.h b/drivers/message/fusion/mptbase.h
index b4948671eb92..9718c8f2e959 100644
--- a/drivers/message/fusion/mptbase.h
+++ b/drivers/message/fusion/mptbase.h
@@ -76,8 +76,8 @@
76#define COPYRIGHT "Copyright (c) 1999-2008 " MODULEAUTHOR 76#define COPYRIGHT "Copyright (c) 1999-2008 " MODULEAUTHOR
77#endif 77#endif
78 78
79#define MPT_LINUX_VERSION_COMMON "3.04.13" 79#define MPT_LINUX_VERSION_COMMON "3.04.14"
80#define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.04.13" 80#define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.04.14"
81#define WHAT_MAGIC_STRING "@" "(" "#" ")" 81#define WHAT_MAGIC_STRING "@" "(" "#" ")"
82 82
83#define show_mptmod_ver(s,ver) \ 83#define show_mptmod_ver(s,ver) \
diff --git a/drivers/message/fusion/mptctl.c b/drivers/message/fusion/mptctl.c
index 352acd05c46b..caa8f568a41c 100644
--- a/drivers/message/fusion/mptctl.c
+++ b/drivers/message/fusion/mptctl.c
@@ -360,8 +360,8 @@ static int mptctl_bus_reset(MPT_ADAPTER *ioc, u8 function)
360 u16 iocstatus; 360 u16 iocstatus;
361 361
362 /* bus reset is only good for SCSI IO, RAID PASSTHRU */ 362 /* bus reset is only good for SCSI IO, RAID PASSTHRU */
363 if (!(function == MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH) || 363 if (!(function == MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
364 (function == MPI_FUNCTION_SCSI_IO_REQUEST)) { 364 function == MPI_FUNCTION_SCSI_IO_REQUEST)) {
365 dtmprintk(ioc, printk(MYIOC_s_WARN_FMT 365 dtmprintk(ioc, printk(MYIOC_s_WARN_FMT
366 "TaskMgmt, not SCSI_IO!!\n", ioc->name)); 366 "TaskMgmt, not SCSI_IO!!\n", ioc->name));
367 return -EPERM; 367 return -EPERM;
diff --git a/drivers/message/fusion/mptfc.c b/drivers/message/fusion/mptfc.c
index ebf6ae024da4..612ab3c51a6b 100644
--- a/drivers/message/fusion/mptfc.c
+++ b/drivers/message/fusion/mptfc.c
@@ -195,29 +195,34 @@ mptfc_block_error_handler(struct scsi_cmnd *SCpnt,
195 unsigned long flags; 195 unsigned long flags;
196 int ready; 196 int ready;
197 MPT_ADAPTER *ioc; 197 MPT_ADAPTER *ioc;
198 int loops = 40; /* seconds */
198 199
199 hd = shost_priv(SCpnt->device->host); 200 hd = shost_priv(SCpnt->device->host);
200 ioc = hd->ioc; 201 ioc = hd->ioc;
201 spin_lock_irqsave(shost->host_lock, flags); 202 spin_lock_irqsave(shost->host_lock, flags);
202 while ((ready = fc_remote_port_chkready(rport) >> 16) == DID_IMM_RETRY) { 203 while ((ready = fc_remote_port_chkready(rport) >> 16) == DID_IMM_RETRY
204 || (loops > 0 && ioc->active == 0)) {
203 spin_unlock_irqrestore(shost->host_lock, flags); 205 spin_unlock_irqrestore(shost->host_lock, flags);
204 dfcprintk (ioc, printk(MYIOC_s_DEBUG_FMT 206 dfcprintk (ioc, printk(MYIOC_s_DEBUG_FMT
205 "mptfc_block_error_handler.%d: %d:%d, port status is " 207 "mptfc_block_error_handler.%d: %d:%d, port status is "
206 "DID_IMM_RETRY, deferring %s recovery.\n", 208 "%x, active flag %d, deferring %s recovery.\n",
207 ioc->name, ioc->sh->host_no, 209 ioc->name, ioc->sh->host_no,
208 SCpnt->device->id, SCpnt->device->lun, caller)); 210 SCpnt->device->id, SCpnt->device->lun,
211 ready, ioc->active, caller));
209 msleep(1000); 212 msleep(1000);
210 spin_lock_irqsave(shost->host_lock, flags); 213 spin_lock_irqsave(shost->host_lock, flags);
214 loops --;
211 } 215 }
212 spin_unlock_irqrestore(shost->host_lock, flags); 216 spin_unlock_irqrestore(shost->host_lock, flags);
213 217
214 if (ready == DID_NO_CONNECT || !SCpnt->device->hostdata) { 218 if (ready == DID_NO_CONNECT || !SCpnt->device->hostdata
219 || ioc->active == 0) {
215 dfcprintk (ioc, printk(MYIOC_s_DEBUG_FMT 220 dfcprintk (ioc, printk(MYIOC_s_DEBUG_FMT
216 "%s.%d: %d:%d, failing recovery, " 221 "%s.%d: %d:%d, failing recovery, "
217 "port state %d, vdevice %p.\n", caller, 222 "port state %x, active %d, vdevice %p.\n", caller,
218 ioc->name, ioc->sh->host_no, 223 ioc->name, ioc->sh->host_no,
219 SCpnt->device->id, SCpnt->device->lun, ready, 224 SCpnt->device->id, SCpnt->device->lun, ready,
220 SCpnt->device->hostdata)); 225 ioc->active, SCpnt->device->hostdata));
221 return FAILED; 226 return FAILED;
222 } 227 }
223 dfcprintk (ioc, printk(MYIOC_s_DEBUG_FMT 228 dfcprintk (ioc, printk(MYIOC_s_DEBUG_FMT
diff --git a/drivers/message/fusion/mptsas.c b/drivers/message/fusion/mptsas.c
index 83873e3d0ce7..c20bbe45da82 100644
--- a/drivers/message/fusion/mptsas.c
+++ b/drivers/message/fusion/mptsas.c
@@ -1075,6 +1075,19 @@ mptsas_target_reset(MPT_ADAPTER *ioc, u8 channel, u8 id)
1075 return 0; 1075 return 0;
1076} 1076}
1077 1077
1078static void
1079mptsas_block_io_sdev(struct scsi_device *sdev, void *data)
1080{
1081 scsi_device_set_state(sdev, SDEV_BLOCK);
1082}
1083
1084static void
1085mptsas_block_io_starget(struct scsi_target *starget)
1086{
1087 if (starget)
1088 starget_for_each_device(starget, NULL, mptsas_block_io_sdev);
1089}
1090
1078/** 1091/**
1079 * mptsas_target_reset_queue 1092 * mptsas_target_reset_queue
1080 * 1093 *
@@ -1098,10 +1111,11 @@ mptsas_target_reset_queue(MPT_ADAPTER *ioc,
1098 id = sas_event_data->TargetID; 1111 id = sas_event_data->TargetID;
1099 channel = sas_event_data->Bus; 1112 channel = sas_event_data->Bus;
1100 1113
1101 if (!(vtarget = mptsas_find_vtarget(ioc, channel, id))) 1114 vtarget = mptsas_find_vtarget(ioc, channel, id);
1102 return; 1115 if (vtarget) {
1103 1116 mptsas_block_io_starget(vtarget->starget);
1104 vtarget->deleted = 1; /* block IO */ 1117 vtarget->deleted = 1; /* block IO */
1118 }
1105 1119
1106 target_reset_list = kzalloc(sizeof(struct mptsas_target_reset_event), 1120 target_reset_list = kzalloc(sizeof(struct mptsas_target_reset_event),
1107 GFP_ATOMIC); 1121 GFP_ATOMIC);
@@ -1868,7 +1882,8 @@ mptsas_qcmd(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
1868 if (ioc->sas_discovery_quiesce_io) 1882 if (ioc->sas_discovery_quiesce_io)
1869 return SCSI_MLQUEUE_HOST_BUSY; 1883 return SCSI_MLQUEUE_HOST_BUSY;
1870 1884
1871// scsi_print_command(SCpnt); 1885 if (ioc->debug_level & MPT_DEBUG_SCSI)
1886 scsi_print_command(SCpnt);
1872 1887
1873 return mptscsih_qcmd(SCpnt,done); 1888 return mptscsih_qcmd(SCpnt,done);
1874} 1889}
@@ -2686,6 +2701,187 @@ mptsas_sas_expander_pg1(MPT_ADAPTER *ioc, struct mptsas_phyinfo *phy_info,
2686 return error; 2701 return error;
2687} 2702}
2688 2703
2704struct rep_manu_request{
2705 u8 smp_frame_type;
2706 u8 function;
2707 u8 reserved;
2708 u8 request_length;
2709};
2710
2711struct rep_manu_reply{
2712 u8 smp_frame_type; /* 0x41 */
2713 u8 function; /* 0x01 */
2714 u8 function_result;
2715 u8 response_length;
2716 u16 expander_change_count;
2717 u8 reserved0[2];
2718 u8 sas_format:1;
2719 u8 reserved1:7;
2720 u8 reserved2[3];
2721 u8 vendor_id[SAS_EXPANDER_VENDOR_ID_LEN];
2722 u8 product_id[SAS_EXPANDER_PRODUCT_ID_LEN];
2723 u8 product_rev[SAS_EXPANDER_PRODUCT_REV_LEN];
2724 u8 component_vendor_id[SAS_EXPANDER_COMPONENT_VENDOR_ID_LEN];
2725 u16 component_id;
2726 u8 component_revision_id;
2727 u8 reserved3;
2728 u8 vendor_specific[8];
2729};
2730
2731/**
2732 * mptsas_exp_repmanufacture_info -
2733 * @ioc: per adapter object
2734 * @sas_address: expander sas address
2735 * @edev: the sas_expander_device object
2736 *
2737 * Fills in the sas_expander_device object when SMP port is created.
2738 *
2739 * Returns 0 for success, non-zero for failure.
2740 */
2741static int
2742mptsas_exp_repmanufacture_info(MPT_ADAPTER *ioc,
2743 u64 sas_address, struct sas_expander_device *edev)
2744{
2745 MPT_FRAME_HDR *mf;
2746 SmpPassthroughRequest_t *smpreq;
2747 SmpPassthroughReply_t *smprep;
2748 struct rep_manu_reply *manufacture_reply;
2749 struct rep_manu_request *manufacture_request;
2750 int ret;
2751 int flagsLength;
2752 unsigned long timeleft;
2753 char *psge;
2754 unsigned long flags;
2755 void *data_out = NULL;
2756 dma_addr_t data_out_dma = 0;
2757 u32 sz;
2758
2759 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
2760 if (ioc->ioc_reset_in_progress) {
2761 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
2762 printk(MYIOC_s_INFO_FMT "%s: host reset in progress!\n",
2763 __func__, ioc->name);
2764 return -EFAULT;
2765 }
2766 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
2767
2768 ret = mutex_lock_interruptible(&ioc->sas_mgmt.mutex);
2769 if (ret)
2770 goto out;
2771
2772 mf = mpt_get_msg_frame(mptsasMgmtCtx, ioc);
2773 if (!mf) {
2774 ret = -ENOMEM;
2775 goto out_unlock;
2776 }
2777
2778 smpreq = (SmpPassthroughRequest_t *)mf;
2779 memset(smpreq, 0, sizeof(*smpreq));
2780
2781 sz = sizeof(struct rep_manu_request) + sizeof(struct rep_manu_reply);
2782
2783 data_out = pci_alloc_consistent(ioc->pcidev, sz, &data_out_dma);
2784 if (!data_out) {
2785 printk(KERN_ERR "Memory allocation failure at %s:%d/%s()!\n",
2786 __FILE__, __LINE__, __func__);
2787 ret = -ENOMEM;
2788 goto put_mf;
2789 }
2790
2791 manufacture_request = data_out;
2792 manufacture_request->smp_frame_type = 0x40;
2793 manufacture_request->function = 1;
2794 manufacture_request->reserved = 0;
2795 manufacture_request->request_length = 0;
2796
2797 smpreq->Function = MPI_FUNCTION_SMP_PASSTHROUGH;
2798 smpreq->PhysicalPort = 0xFF;
2799 *((u64 *)&smpreq->SASAddress) = cpu_to_le64(sas_address);
2800 smpreq->RequestDataLength = sizeof(struct rep_manu_request);
2801
2802 psge = (char *)
2803 (((int *) mf) + (offsetof(SmpPassthroughRequest_t, SGL) / 4));
2804
2805 flagsLength = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
2806 MPI_SGE_FLAGS_SYSTEM_ADDRESS |
2807 MPI_SGE_FLAGS_HOST_TO_IOC |
2808 MPI_SGE_FLAGS_END_OF_BUFFER;
2809 flagsLength = flagsLength << MPI_SGE_FLAGS_SHIFT;
2810 flagsLength |= sizeof(struct rep_manu_request);
2811
2812 ioc->add_sge(psge, flagsLength, data_out_dma);
2813 psge += ioc->SGE_size;
2814
2815 flagsLength = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
2816 MPI_SGE_FLAGS_SYSTEM_ADDRESS |
2817 MPI_SGE_FLAGS_IOC_TO_HOST |
2818 MPI_SGE_FLAGS_END_OF_BUFFER;
2819 flagsLength = flagsLength << MPI_SGE_FLAGS_SHIFT;
2820 flagsLength |= sizeof(struct rep_manu_reply);
2821 ioc->add_sge(psge, flagsLength, data_out_dma +
2822 sizeof(struct rep_manu_request));
2823
2824 INITIALIZE_MGMT_STATUS(ioc->sas_mgmt.status)
2825 mpt_put_msg_frame(mptsasMgmtCtx, ioc, mf);
2826
2827 timeleft = wait_for_completion_timeout(&ioc->sas_mgmt.done, 10 * HZ);
2828 if (!(ioc->sas_mgmt.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
2829 ret = -ETIME;
2830 mpt_free_msg_frame(ioc, mf);
2831 mf = NULL;
2832 if (ioc->sas_mgmt.status & MPT_MGMT_STATUS_DID_IOCRESET)
2833 goto out_free;
2834 if (!timeleft)
2835 mpt_HardResetHandler(ioc, CAN_SLEEP);
2836 goto out_free;
2837 }
2838
2839 mf = NULL;
2840
2841 if (ioc->sas_mgmt.status & MPT_MGMT_STATUS_RF_VALID) {
2842 u8 *tmp;
2843
2844 smprep = (SmpPassthroughReply_t *)ioc->sas_mgmt.reply;
2845 if (le16_to_cpu(smprep->ResponseDataLength) !=
2846 sizeof(struct rep_manu_reply))
2847 goto out_free;
2848
2849 manufacture_reply = data_out + sizeof(struct rep_manu_request);
2850 strncpy(edev->vendor_id, manufacture_reply->vendor_id,
2851 SAS_EXPANDER_VENDOR_ID_LEN);
2852 strncpy(edev->product_id, manufacture_reply->product_id,
2853 SAS_EXPANDER_PRODUCT_ID_LEN);
2854 strncpy(edev->product_rev, manufacture_reply->product_rev,
2855 SAS_EXPANDER_PRODUCT_REV_LEN);
2856 edev->level = manufacture_reply->sas_format;
2857 if (manufacture_reply->sas_format) {
2858 strncpy(edev->component_vendor_id,
2859 manufacture_reply->component_vendor_id,
2860 SAS_EXPANDER_COMPONENT_VENDOR_ID_LEN);
2861 tmp = (u8 *)&manufacture_reply->component_id;
2862 edev->component_id = tmp[0] << 8 | tmp[1];
2863 edev->component_revision_id =
2864 manufacture_reply->component_revision_id;
2865 }
2866 } else {
2867 printk(MYIOC_s_ERR_FMT
2868 "%s: smp passthru reply failed to be returned\n",
2869 ioc->name, __func__);
2870 ret = -ENXIO;
2871 }
2872out_free:
2873 if (data_out_dma)
2874 pci_free_consistent(ioc->pcidev, sz, data_out, data_out_dma);
2875put_mf:
2876 if (mf)
2877 mpt_free_msg_frame(ioc, mf);
2878out_unlock:
2879 CLEAR_MGMT_STATUS(ioc->sas_mgmt.status)
2880 mutex_unlock(&ioc->sas_mgmt.mutex);
2881out:
2882 return ret;
2883 }
2884
2689static void 2885static void
2690mptsas_parse_device_info(struct sas_identify *identify, 2886mptsas_parse_device_info(struct sas_identify *identify,
2691 struct mptsas_devinfo *device_info) 2887 struct mptsas_devinfo *device_info)
@@ -2967,6 +3163,11 @@ static int mptsas_probe_one_phy(struct device *dev,
2967 goto out; 3163 goto out;
2968 } 3164 }
2969 mptsas_set_rphy(ioc, phy_info, rphy); 3165 mptsas_set_rphy(ioc, phy_info, rphy);
3166 if (identify.device_type == SAS_EDGE_EXPANDER_DEVICE ||
3167 identify.device_type == SAS_FANOUT_EXPANDER_DEVICE)
3168 mptsas_exp_repmanufacture_info(ioc,
3169 identify.sas_address,
3170 rphy_to_expander_device(rphy));
2970 } 3171 }
2971 3172
2972 out: 3173 out:
diff --git a/drivers/message/fusion/mptscsih.c b/drivers/message/fusion/mptscsih.c
index 81279b3d694c..4a7d1afcb666 100644
--- a/drivers/message/fusion/mptscsih.c
+++ b/drivers/message/fusion/mptscsih.c
@@ -1438,9 +1438,14 @@ mptscsih_qcmd(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
1438 && (vdevice->vtarget->tflags & MPT_TARGET_FLAGS_Q_YES) 1438 && (vdevice->vtarget->tflags & MPT_TARGET_FLAGS_Q_YES)
1439 && (SCpnt->device->tagged_supported)) { 1439 && (SCpnt->device->tagged_supported)) {
1440 scsictl = scsidir | MPI_SCSIIO_CONTROL_SIMPLEQ; 1440 scsictl = scsidir | MPI_SCSIIO_CONTROL_SIMPLEQ;
1441 } else { 1441 if (SCpnt->request && SCpnt->request->ioprio) {
1442 if (((SCpnt->request->ioprio & 0x7) == 1) ||
1443 !(SCpnt->request->ioprio & 0x7))
1444 scsictl |= MPI_SCSIIO_CONTROL_HEADOFQ;
1445 }
1446 } else
1442 scsictl = scsidir | MPI_SCSIIO_CONTROL_UNTAGGED; 1447 scsictl = scsidir | MPI_SCSIIO_CONTROL_UNTAGGED;
1443 } 1448
1444 1449
1445 /* Use the above information to set up the message frame 1450 /* Use the above information to set up the message frame
1446 */ 1451 */
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 87829789243e..413576a2f313 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -348,6 +348,16 @@ config AB4500_CORE
348 read/write functions for the devices to get access to this chip. 348 read/write functions for the devices to get access to this chip.
349 This chip embeds various other multimedia funtionalities as well. 349 This chip embeds various other multimedia funtionalities as well.
350 350
351config MFD_TIMBERDALE
352 tristate "Support for the Timberdale FPGA"
353 select MFD_CORE
354 depends on PCI && GPIOLIB
355 ---help---
356 This is the core driver for the timberdale FPGA. This device is a
357 multifunction device which exposes numerous platform devices.
358
359 The timberdale FPGA can be found on the Intel Atom development board
360 for in-vehicle infontainment, called Russellville.
351endmenu 361endmenu
352 362
353menu "Multimedia Capabilities Port drivers" 363menu "Multimedia Capabilities Port drivers"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index e09eb4870db6..78295d6a75f7 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -54,5 +54,6 @@ obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o
54obj-$(CONFIG_AB3100_CORE) += ab3100-core.o 54obj-$(CONFIG_AB3100_CORE) += ab3100-core.o
55obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o 55obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o
56obj-$(CONFIG_AB4500_CORE) += ab4500-core.o 56obj-$(CONFIG_AB4500_CORE) += ab4500-core.o
57obj-$(CONFIG_MFD_TIMBERDALE) += timberdale.o
57obj-$(CONFIG_MFD_88PM8607) += 88pm8607.o 58obj-$(CONFIG_MFD_88PM8607) += 88pm8607.o
58obj-$(CONFIG_PMIC_ADP5520) += adp5520.o \ No newline at end of file 59obj-$(CONFIG_PMIC_ADP5520) += adp5520.o
diff --git a/drivers/mfd/timberdale.c b/drivers/mfd/timberdale.c
new file mode 100644
index 000000000000..1ed44d283803
--- /dev/null
+++ b/drivers/mfd/timberdale.c
@@ -0,0 +1,727 @@
1/*
2 * timberdale.c timberdale FPGA MFD driver
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* Supports:
20 * Timberdale FPGA
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/pci.h>
26#include <linux/msi.h>
27#include <linux/mfd/core.h>
28
29#include <linux/timb_gpio.h>
30
31#include <linux/i2c.h>
32#include <linux/i2c-ocores.h>
33#include <linux/i2c/tsc2007.h>
34
35#include <linux/spi/spi.h>
36#include <linux/spi/xilinx_spi.h>
37#include <linux/spi/max7301.h>
38#include <linux/spi/mc33880.h>
39
40#include <media/timb_radio.h>
41
42#include "timberdale.h"
43
44#define DRIVER_NAME "timberdale"
45
46struct timberdale_device {
47 resource_size_t ctl_mapbase;
48 unsigned char __iomem *ctl_membase;
49 struct {
50 u32 major;
51 u32 minor;
52 u32 config;
53 } fw;
54};
55
56/*--------------------------------------------------------------------------*/
57
58static struct tsc2007_platform_data timberdale_tsc2007_platform_data = {
59 .model = 2003,
60 .x_plate_ohms = 100
61};
62
63static struct i2c_board_info timberdale_i2c_board_info[] = {
64 {
65 I2C_BOARD_INFO("tsc2007", 0x48),
66 .platform_data = &timberdale_tsc2007_platform_data,
67 .irq = IRQ_TIMBERDALE_TSC_INT
68 },
69};
70
71static __devinitdata struct ocores_i2c_platform_data
72timberdale_ocores_platform_data = {
73 .regstep = 4,
74 .clock_khz = 62500,
75 .devices = timberdale_i2c_board_info,
76 .num_devices = ARRAY_SIZE(timberdale_i2c_board_info)
77};
78
79const static __devinitconst struct resource timberdale_ocores_resources[] = {
80 {
81 .start = OCORESOFFSET,
82 .end = OCORESEND,
83 .flags = IORESOURCE_MEM,
84 },
85 {
86 .start = IRQ_TIMBERDALE_I2C,
87 .end = IRQ_TIMBERDALE_I2C,
88 .flags = IORESOURCE_IRQ,
89 },
90};
91
92const struct max7301_platform_data timberdale_max7301_platform_data = {
93 .base = 200
94};
95
96const struct mc33880_platform_data timberdale_mc33880_platform_data = {
97 .base = 100
98};
99
100static struct spi_board_info timberdale_spi_16bit_board_info[] = {
101 {
102 .modalias = "max7301",
103 .max_speed_hz = 26000,
104 .chip_select = 2,
105 .mode = SPI_MODE_0,
106 .platform_data = &timberdale_max7301_platform_data
107 },
108};
109
110static struct spi_board_info timberdale_spi_8bit_board_info[] = {
111 {
112 .modalias = "mc33880",
113 .max_speed_hz = 4000,
114 .chip_select = 1,
115 .mode = SPI_MODE_1,
116 .platform_data = &timberdale_mc33880_platform_data
117 },
118};
119
120static __devinitdata struct xspi_platform_data timberdale_xspi_platform_data = {
121 .num_chipselect = 3,
122 .little_endian = true,
123 /* bits per word and devices will be filled in runtime depending
124 * on the HW config
125 */
126};
127
128const static __devinitconst struct resource timberdale_spi_resources[] = {
129 {
130 .start = SPIOFFSET,
131 .end = SPIEND,
132 .flags = IORESOURCE_MEM,
133 },
134 {
135 .start = IRQ_TIMBERDALE_SPI,
136 .end = IRQ_TIMBERDALE_SPI,
137 .flags = IORESOURCE_IRQ,
138 },
139};
140
141const static __devinitconst struct resource timberdale_eth_resources[] = {
142 {
143 .start = ETHOFFSET,
144 .end = ETHEND,
145 .flags = IORESOURCE_MEM,
146 },
147 {
148 .start = IRQ_TIMBERDALE_ETHSW_IF,
149 .end = IRQ_TIMBERDALE_ETHSW_IF,
150 .flags = IORESOURCE_IRQ,
151 },
152};
153
154static __devinitdata struct timbgpio_platform_data
155 timberdale_gpio_platform_data = {
156 .gpio_base = 0,
157 .nr_pins = GPIO_NR_PINS,
158 .irq_base = 200,
159};
160
161const static __devinitconst struct resource timberdale_gpio_resources[] = {
162 {
163 .start = GPIOOFFSET,
164 .end = GPIOEND,
165 .flags = IORESOURCE_MEM,
166 },
167 {
168 .start = IRQ_TIMBERDALE_GPIO,
169 .end = IRQ_TIMBERDALE_GPIO,
170 .flags = IORESOURCE_IRQ,
171 },
172};
173
174const static __devinitconst struct resource timberdale_mlogicore_resources[] = {
175 {
176 .start = MLCOREOFFSET,
177 .end = MLCOREEND,
178 .flags = IORESOURCE_MEM,
179 },
180 {
181 .start = IRQ_TIMBERDALE_MLCORE,
182 .end = IRQ_TIMBERDALE_MLCORE,
183 .flags = IORESOURCE_IRQ,
184 },
185 {
186 .start = IRQ_TIMBERDALE_MLCORE_BUF,
187 .end = IRQ_TIMBERDALE_MLCORE_BUF,
188 .flags = IORESOURCE_IRQ,
189 },
190};
191
192const static __devinitconst struct resource timberdale_uart_resources[] = {
193 {
194 .start = UARTOFFSET,
195 .end = UARTEND,
196 .flags = IORESOURCE_MEM,
197 },
198 {
199 .start = IRQ_TIMBERDALE_UART,
200 .end = IRQ_TIMBERDALE_UART,
201 .flags = IORESOURCE_IRQ,
202 },
203};
204
205const static __devinitconst struct resource timberdale_uartlite_resources[] = {
206 {
207 .start = UARTLITEOFFSET,
208 .end = UARTLITEEND,
209 .flags = IORESOURCE_MEM,
210 },
211 {
212 .start = IRQ_TIMBERDALE_UARTLITE,
213 .end = IRQ_TIMBERDALE_UARTLITE,
214 .flags = IORESOURCE_IRQ,
215 },
216};
217
218const static __devinitconst struct resource timberdale_radio_resources[] = {
219 {
220 .start = RDSOFFSET,
221 .end = RDSEND,
222 .flags = IORESOURCE_MEM,
223 },
224 {
225 .start = IRQ_TIMBERDALE_RDS,
226 .end = IRQ_TIMBERDALE_RDS,
227 .flags = IORESOURCE_IRQ,
228 },
229};
230
231static __devinitdata struct i2c_board_info timberdale_tef6868_i2c_board_info = {
232 I2C_BOARD_INFO("tef6862", 0x60)
233};
234
235static __devinitdata struct i2c_board_info timberdale_saa7706_i2c_board_info = {
236 I2C_BOARD_INFO("saa7706h", 0x1C)
237};
238
239static __devinitdata struct timb_radio_platform_data
240 timberdale_radio_platform_data = {
241 .i2c_adapter = 0,
242 .tuner = {
243 .module_name = "tef6862",
244 .info = &timberdale_tef6868_i2c_board_info
245 },
246 .dsp = {
247 .module_name = "saa7706h",
248 .info = &timberdale_saa7706_i2c_board_info
249 }
250};
251
252const static __devinitconst struct resource timberdale_dma_resources[] = {
253 {
254 .start = DMAOFFSET,
255 .end = DMAEND,
256 .flags = IORESOURCE_MEM,
257 },
258 {
259 .start = IRQ_TIMBERDALE_DMA,
260 .end = IRQ_TIMBERDALE_DMA,
261 .flags = IORESOURCE_IRQ,
262 },
263};
264
265static __devinitdata struct mfd_cell timberdale_cells_bar0_cfg0[] = {
266 {
267 .name = "timb-uart",
268 .num_resources = ARRAY_SIZE(timberdale_uart_resources),
269 .resources = timberdale_uart_resources,
270 },
271 {
272 .name = "timb-gpio",
273 .num_resources = ARRAY_SIZE(timberdale_gpio_resources),
274 .resources = timberdale_gpio_resources,
275 .platform_data = &timberdale_gpio_platform_data,
276 .data_size = sizeof(timberdale_gpio_platform_data),
277 },
278 {
279 .name = "timb-radio",
280 .num_resources = ARRAY_SIZE(timberdale_radio_resources),
281 .resources = timberdale_radio_resources,
282 .platform_data = &timberdale_radio_platform_data,
283 .data_size = sizeof(timberdale_radio_platform_data),
284 },
285 {
286 .name = "xilinx_spi",
287 .num_resources = ARRAY_SIZE(timberdale_spi_resources),
288 .resources = timberdale_spi_resources,
289 .platform_data = &timberdale_xspi_platform_data,
290 .data_size = sizeof(timberdale_xspi_platform_data),
291 },
292 {
293 .name = "ks8842",
294 .num_resources = ARRAY_SIZE(timberdale_eth_resources),
295 .resources = timberdale_eth_resources,
296 },
297 {
298 .name = "timb-dma",
299 .num_resources = ARRAY_SIZE(timberdale_dma_resources),
300 .resources = timberdale_dma_resources,
301 },
302};
303
304static __devinitdata struct mfd_cell timberdale_cells_bar0_cfg1[] = {
305 {
306 .name = "timb-uart",
307 .num_resources = ARRAY_SIZE(timberdale_uart_resources),
308 .resources = timberdale_uart_resources,
309 },
310 {
311 .name = "uartlite",
312 .num_resources = ARRAY_SIZE(timberdale_uartlite_resources),
313 .resources = timberdale_uartlite_resources,
314 },
315 {
316 .name = "timb-gpio",
317 .num_resources = ARRAY_SIZE(timberdale_gpio_resources),
318 .resources = timberdale_gpio_resources,
319 .platform_data = &timberdale_gpio_platform_data,
320 .data_size = sizeof(timberdale_gpio_platform_data),
321 },
322 {
323 .name = "timb-mlogicore",
324 .num_resources = ARRAY_SIZE(timberdale_mlogicore_resources),
325 .resources = timberdale_mlogicore_resources,
326 },
327 {
328 .name = "timb-radio",
329 .num_resources = ARRAY_SIZE(timberdale_radio_resources),
330 .resources = timberdale_radio_resources,
331 .platform_data = &timberdale_radio_platform_data,
332 .data_size = sizeof(timberdale_radio_platform_data),
333 },
334 {
335 .name = "xilinx_spi",
336 .num_resources = ARRAY_SIZE(timberdale_spi_resources),
337 .resources = timberdale_spi_resources,
338 .platform_data = &timberdale_xspi_platform_data,
339 .data_size = sizeof(timberdale_xspi_platform_data),
340 },
341 {
342 .name = "ks8842",
343 .num_resources = ARRAY_SIZE(timberdale_eth_resources),
344 .resources = timberdale_eth_resources,
345 },
346 {
347 .name = "timb-dma",
348 .num_resources = ARRAY_SIZE(timberdale_dma_resources),
349 .resources = timberdale_dma_resources,
350 },
351};
352
353static __devinitdata struct mfd_cell timberdale_cells_bar0_cfg2[] = {
354 {
355 .name = "timb-uart",
356 .num_resources = ARRAY_SIZE(timberdale_uart_resources),
357 .resources = timberdale_uart_resources,
358 },
359 {
360 .name = "timb-gpio",
361 .num_resources = ARRAY_SIZE(timberdale_gpio_resources),
362 .resources = timberdale_gpio_resources,
363 .platform_data = &timberdale_gpio_platform_data,
364 .data_size = sizeof(timberdale_gpio_platform_data),
365 },
366 {
367 .name = "timb-radio",
368 .num_resources = ARRAY_SIZE(timberdale_radio_resources),
369 .resources = timberdale_radio_resources,
370 .platform_data = &timberdale_radio_platform_data,
371 .data_size = sizeof(timberdale_radio_platform_data),
372 },
373 {
374 .name = "xilinx_spi",
375 .num_resources = ARRAY_SIZE(timberdale_spi_resources),
376 .resources = timberdale_spi_resources,
377 .platform_data = &timberdale_xspi_platform_data,
378 .data_size = sizeof(timberdale_xspi_platform_data),
379 },
380 {
381 .name = "timb-dma",
382 .num_resources = ARRAY_SIZE(timberdale_dma_resources),
383 .resources = timberdale_dma_resources,
384 },
385};
386
387static __devinitdata struct mfd_cell timberdale_cells_bar0_cfg3[] = {
388 {
389 .name = "timb-uart",
390 .num_resources = ARRAY_SIZE(timberdale_uart_resources),
391 .resources = timberdale_uart_resources,
392 },
393 {
394 .name = "ocores-i2c",
395 .num_resources = ARRAY_SIZE(timberdale_ocores_resources),
396 .resources = timberdale_ocores_resources,
397 .platform_data = &timberdale_ocores_platform_data,
398 .data_size = sizeof(timberdale_ocores_platform_data),
399 },
400 {
401 .name = "timb-gpio",
402 .num_resources = ARRAY_SIZE(timberdale_gpio_resources),
403 .resources = timberdale_gpio_resources,
404 .platform_data = &timberdale_gpio_platform_data,
405 .data_size = sizeof(timberdale_gpio_platform_data),
406 },
407 {
408 .name = "timb-radio",
409 .num_resources = ARRAY_SIZE(timberdale_radio_resources),
410 .resources = timberdale_radio_resources,
411 .platform_data = &timberdale_radio_platform_data,
412 .data_size = sizeof(timberdale_radio_platform_data),
413 },
414 {
415 .name = "xilinx_spi",
416 .num_resources = ARRAY_SIZE(timberdale_spi_resources),
417 .resources = timberdale_spi_resources,
418 .platform_data = &timberdale_xspi_platform_data,
419 .data_size = sizeof(timberdale_xspi_platform_data),
420 },
421 {
422 .name = "ks8842",
423 .num_resources = ARRAY_SIZE(timberdale_eth_resources),
424 .resources = timberdale_eth_resources,
425 },
426 {
427 .name = "timb-dma",
428 .num_resources = ARRAY_SIZE(timberdale_dma_resources),
429 .resources = timberdale_dma_resources,
430 },
431};
432
433static const __devinitconst struct resource timberdale_sdhc_resources[] = {
434 /* located in bar 1 and bar 2 */
435 {
436 .start = SDHC0OFFSET,
437 .end = SDHC0END,
438 .flags = IORESOURCE_MEM,
439 },
440 {
441 .start = IRQ_TIMBERDALE_SDHC,
442 .end = IRQ_TIMBERDALE_SDHC,
443 .flags = IORESOURCE_IRQ,
444 },
445};
446
447static __devinitdata struct mfd_cell timberdale_cells_bar1[] = {
448 {
449 .name = "sdhci",
450 .num_resources = ARRAY_SIZE(timberdale_sdhc_resources),
451 .resources = timberdale_sdhc_resources,
452 },
453};
454
455static __devinitdata struct mfd_cell timberdale_cells_bar2[] = {
456 {
457 .name = "sdhci",
458 .num_resources = ARRAY_SIZE(timberdale_sdhc_resources),
459 .resources = timberdale_sdhc_resources,
460 },
461};
462
463static ssize_t show_fw_ver(struct device *dev, struct device_attribute *attr,
464 char *buf)
465{
466 struct pci_dev *pdev = to_pci_dev(dev);
467 struct timberdale_device *priv = pci_get_drvdata(pdev);
468
469 return sprintf(buf, "%d.%d.%d\n", priv->fw.major, priv->fw.minor,
470 priv->fw.config);
471}
472
473static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
474
475/*--------------------------------------------------------------------------*/
476
477static int __devinit timb_probe(struct pci_dev *dev,
478 const struct pci_device_id *id)
479{
480 struct timberdale_device *priv;
481 int err, i;
482 resource_size_t mapbase;
483 struct msix_entry *msix_entries = NULL;
484 u8 ip_setup;
485
486 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
487 if (!priv)
488 return -ENOMEM;
489
490 pci_set_drvdata(dev, priv);
491
492 err = pci_enable_device(dev);
493 if (err)
494 goto err_enable;
495
496 mapbase = pci_resource_start(dev, 0);
497 if (!mapbase) {
498 dev_err(&dev->dev, "No resource\n");
499 goto err_start;
500 }
501
502 /* create a resource for the PCI master register */
503 priv->ctl_mapbase = mapbase + CHIPCTLOFFSET;
504 if (!request_mem_region(priv->ctl_mapbase, CHIPCTLSIZE, "timb-ctl")) {
505 dev_err(&dev->dev, "Failed to request ctl mem\n");
506 goto err_request;
507 }
508
509 priv->ctl_membase = ioremap(priv->ctl_mapbase, CHIPCTLSIZE);
510 if (!priv->ctl_membase) {
511 dev_err(&dev->dev, "ioremap failed for ctl mem\n");
512 goto err_ioremap;
513 }
514
515 /* read the HW config */
516 priv->fw.major = ioread32(priv->ctl_membase + TIMB_REV_MAJOR);
517 priv->fw.minor = ioread32(priv->ctl_membase + TIMB_REV_MINOR);
518 priv->fw.config = ioread32(priv->ctl_membase + TIMB_HW_CONFIG);
519
520 if (priv->fw.major > TIMB_SUPPORTED_MAJOR) {
521 dev_err(&dev->dev, "The driver supports an older "
522 "version of the FPGA, please update the driver to "
523 "support %d.%d\n", priv->fw.major, priv->fw.minor);
524 goto err_ioremap;
525 }
526 if (priv->fw.major < TIMB_SUPPORTED_MAJOR ||
527 priv->fw.minor < TIMB_REQUIRED_MINOR) {
528 dev_err(&dev->dev, "The FPGA image is too old (%d.%d), "
529 "please upgrade the FPGA to at least: %d.%d\n",
530 priv->fw.major, priv->fw.minor,
531 TIMB_SUPPORTED_MAJOR, TIMB_REQUIRED_MINOR);
532 goto err_ioremap;
533 }
534
535 msix_entries = kzalloc(TIMBERDALE_NR_IRQS * sizeof(*msix_entries),
536 GFP_KERNEL);
537 if (!msix_entries)
538 goto err_ioremap;
539
540 for (i = 0; i < TIMBERDALE_NR_IRQS; i++)
541 msix_entries[i].entry = i;
542
543 err = pci_enable_msix(dev, msix_entries, TIMBERDALE_NR_IRQS);
544 if (err) {
545 dev_err(&dev->dev,
546 "MSI-X init failed: %d, expected entries: %d\n",
547 err, TIMBERDALE_NR_IRQS);
548 goto err_msix;
549 }
550
551 err = device_create_file(&dev->dev, &dev_attr_fw_ver);
552 if (err)
553 goto err_create_file;
554
555 /* Reset all FPGA PLB peripherals */
556 iowrite32(0x1, priv->ctl_membase + TIMB_SW_RST);
557
558 /* update IRQ offsets in I2C board info */
559 for (i = 0; i < ARRAY_SIZE(timberdale_i2c_board_info); i++)
560 timberdale_i2c_board_info[i].irq =
561 msix_entries[timberdale_i2c_board_info[i].irq].vector;
562
563 /* Update the SPI configuration depending on the HW (8 or 16 bit) */
564 if (priv->fw.config & TIMB_HW_CONFIG_SPI_8BIT) {
565 timberdale_xspi_platform_data.bits_per_word = 8;
566 timberdale_xspi_platform_data.devices =
567 timberdale_spi_8bit_board_info;
568 timberdale_xspi_platform_data.num_devices =
569 ARRAY_SIZE(timberdale_spi_8bit_board_info);
570 } else {
571 timberdale_xspi_platform_data.bits_per_word = 16;
572 timberdale_xspi_platform_data.devices =
573 timberdale_spi_16bit_board_info;
574 timberdale_xspi_platform_data.num_devices =
575 ARRAY_SIZE(timberdale_spi_16bit_board_info);
576 }
577
578 ip_setup = priv->fw.config & TIMB_HW_VER_MASK;
579 switch (ip_setup) {
580 case TIMB_HW_VER0:
581 err = mfd_add_devices(&dev->dev, -1,
582 timberdale_cells_bar0_cfg0,
583 ARRAY_SIZE(timberdale_cells_bar0_cfg0),
584 &dev->resource[0], msix_entries[0].vector);
585 break;
586 case TIMB_HW_VER1:
587 err = mfd_add_devices(&dev->dev, -1,
588 timberdale_cells_bar0_cfg1,
589 ARRAY_SIZE(timberdale_cells_bar0_cfg1),
590 &dev->resource[0], msix_entries[0].vector);
591 break;
592 case TIMB_HW_VER2:
593 err = mfd_add_devices(&dev->dev, -1,
594 timberdale_cells_bar0_cfg2,
595 ARRAY_SIZE(timberdale_cells_bar0_cfg2),
596 &dev->resource[0], msix_entries[0].vector);
597 break;
598 case TIMB_HW_VER3:
599 err = mfd_add_devices(&dev->dev, -1,
600 timberdale_cells_bar0_cfg3,
601 ARRAY_SIZE(timberdale_cells_bar0_cfg3),
602 &dev->resource[0], msix_entries[0].vector);
603 break;
604 default:
605 dev_err(&dev->dev, "Uknown IP setup: %d.%d.%d\n",
606 priv->fw.major, priv->fw.minor, ip_setup);
607 err = -ENODEV;
608 goto err_mfd;
609 break;
610 }
611
612 if (err) {
613 dev_err(&dev->dev, "mfd_add_devices failed: %d\n", err);
614 goto err_mfd;
615 }
616
617 err = mfd_add_devices(&dev->dev, 0,
618 timberdale_cells_bar1, ARRAY_SIZE(timberdale_cells_bar1),
619 &dev->resource[1], msix_entries[0].vector);
620 if (err) {
621 dev_err(&dev->dev, "mfd_add_devices failed: %d\n", err);
622 goto err_mfd2;
623 }
624
625 /* only version 0 and 3 have the iNand routed to SDHCI */
626 if (((priv->fw.config & TIMB_HW_VER_MASK) == TIMB_HW_VER0) ||
627 ((priv->fw.config & TIMB_HW_VER_MASK) == TIMB_HW_VER3)) {
628 err = mfd_add_devices(&dev->dev, 1, timberdale_cells_bar2,
629 ARRAY_SIZE(timberdale_cells_bar2),
630 &dev->resource[2], msix_entries[0].vector);
631 if (err) {
632 dev_err(&dev->dev, "mfd_add_devices failed: %d\n", err);
633 goto err_mfd2;
634 }
635 }
636
637 kfree(msix_entries);
638
639 dev_info(&dev->dev,
640 "Found Timberdale Card. Rev: %d.%d, HW config: 0x%02x\n",
641 priv->fw.major, priv->fw.minor, priv->fw.config);
642
643 return 0;
644
645err_mfd2:
646 mfd_remove_devices(&dev->dev);
647err_mfd:
648 device_remove_file(&dev->dev, &dev_attr_fw_ver);
649err_create_file:
650 pci_disable_msix(dev);
651err_msix:
652 iounmap(priv->ctl_membase);
653err_ioremap:
654 release_mem_region(priv->ctl_mapbase, CHIPCTLSIZE);
655err_request:
656 pci_set_drvdata(dev, NULL);
657err_start:
658 pci_disable_device(dev);
659err_enable:
660 kfree(msix_entries);
661 kfree(priv);
662 pci_set_drvdata(dev, NULL);
663 return -ENODEV;
664}
665
666static void __devexit timb_remove(struct pci_dev *dev)
667{
668 struct timberdale_device *priv = pci_get_drvdata(dev);
669
670 mfd_remove_devices(&dev->dev);
671
672 device_remove_file(&dev->dev, &dev_attr_fw_ver);
673
674 iounmap(priv->ctl_membase);
675 release_mem_region(priv->ctl_mapbase, CHIPCTLSIZE);
676
677 pci_disable_msix(dev);
678 pci_disable_device(dev);
679 pci_set_drvdata(dev, NULL);
680 kfree(priv);
681}
682
683static struct pci_device_id timberdale_pci_tbl[] = {
684 { PCI_DEVICE(PCI_VENDOR_ID_TIMB, PCI_DEVICE_ID_TIMB) },
685 { 0 }
686};
687MODULE_DEVICE_TABLE(pci, timberdale_pci_tbl);
688
689static struct pci_driver timberdale_pci_driver = {
690 .name = DRIVER_NAME,
691 .id_table = timberdale_pci_tbl,
692 .probe = timb_probe,
693 .remove = __devexit_p(timb_remove),
694};
695
696static int __init timberdale_init(void)
697{
698 int err;
699
700 err = pci_register_driver(&timberdale_pci_driver);
701 if (err < 0) {
702 printk(KERN_ERR
703 "Failed to register PCI driver for %s device.\n",
704 timberdale_pci_driver.name);
705 return -ENODEV;
706 }
707
708 printk(KERN_INFO "Driver for %s has been successfully registered.\n",
709 timberdale_pci_driver.name);
710
711 return 0;
712}
713
714static void __exit timberdale_exit(void)
715{
716 pci_unregister_driver(&timberdale_pci_driver);
717
718 printk(KERN_INFO "Driver for %s has been successfully unregistered.\n",
719 timberdale_pci_driver.name);
720}
721
722module_init(timberdale_init);
723module_exit(timberdale_exit);
724
725MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
726MODULE_VERSION(DRV_VERSION);
727MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/timberdale.h b/drivers/mfd/timberdale.h
new file mode 100644
index 000000000000..8d27ffabc25d
--- /dev/null
+++ b/drivers/mfd/timberdale.h
@@ -0,0 +1,130 @@
1/*
2 * timberdale.h timberdale FPGA MFD driver defines
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* Supports:
20 * Timberdale FPGA
21 */
22
23#ifndef MFD_TIMBERDALE_H
24#define MFD_TIMBERDALE_H
25
26#define DRV_VERSION "0.1"
27
28/* This driver only support versions >= 3.8 and < 4.0 */
29#define TIMB_SUPPORTED_MAJOR 3
30
31/* This driver only support minor >= 8 */
32#define TIMB_REQUIRED_MINOR 8
33
34/* Registers of the control area */
35#define TIMB_REV_MAJOR 0x00
36#define TIMB_REV_MINOR 0x04
37#define TIMB_HW_CONFIG 0x08
38#define TIMB_SW_RST 0x40
39
40/* bits in the TIMB_HW_CONFIG register */
41#define TIMB_HW_CONFIG_SPI_8BIT 0x80
42
43#define TIMB_HW_VER_MASK 0x0f
44#define TIMB_HW_VER0 0x00
45#define TIMB_HW_VER1 0x01
46#define TIMB_HW_VER2 0x02
47#define TIMB_HW_VER3 0x03
48
49#define OCORESOFFSET 0x0
50#define OCORESEND 0x1f
51
52#define SPIOFFSET 0x80
53#define SPIEND 0xff
54
55#define UARTLITEOFFSET 0x100
56#define UARTLITEEND 0x10f
57
58#define RDSOFFSET 0x180
59#define RDSEND 0x183
60
61#define ETHOFFSET 0x300
62#define ETHEND 0x3ff
63
64#define GPIOOFFSET 0x400
65#define GPIOEND 0x7ff
66
67#define CHIPCTLOFFSET 0x800
68#define CHIPCTLEND 0x8ff
69#define CHIPCTLSIZE (CHIPCTLEND - CHIPCTLOFFSET)
70
71#define INTCOFFSET 0xc00
72#define INTCEND 0xfff
73#define INTCSIZE (INTCEND - INTCOFFSET)
74
75#define MOSTOFFSET 0x1000
76#define MOSTEND 0x13ff
77
78#define UARTOFFSET 0x1400
79#define UARTEND 0x17ff
80
81#define XIICOFFSET 0x1800
82#define XIICEND 0x19ff
83
84#define I2SOFFSET 0x1C00
85#define I2SEND 0x1fff
86
87#define LOGIWOFFSET 0x30000
88#define LOGIWEND 0x37fff
89
90#define MLCOREOFFSET 0x40000
91#define MLCOREEND 0x43fff
92
93#define DMAOFFSET 0x01000000
94#define DMAEND 0x013fffff
95
96/* SDHC0 is placed in PCI bar 1 */
97#define SDHC0OFFSET 0x00
98#define SDHC0END 0xff
99
100/* SDHC1 is placed in PCI bar 2 */
101#define SDHC1OFFSET 0x00
102#define SDHC1END 0xff
103
104#define PCI_VENDOR_ID_TIMB 0x10ee
105#define PCI_DEVICE_ID_TIMB 0xa123
106
107#define IRQ_TIMBERDALE_INIC 0
108#define IRQ_TIMBERDALE_MLB 1
109#define IRQ_TIMBERDALE_GPIO 2
110#define IRQ_TIMBERDALE_I2C 3
111#define IRQ_TIMBERDALE_UART 4
112#define IRQ_TIMBERDALE_DMA 5
113#define IRQ_TIMBERDALE_I2S 6
114#define IRQ_TIMBERDALE_TSC_INT 7
115#define IRQ_TIMBERDALE_SDHC 8
116#define IRQ_TIMBERDALE_ADV7180 9
117#define IRQ_TIMBERDALE_ETHSW_IF 10
118#define IRQ_TIMBERDALE_SPI 11
119#define IRQ_TIMBERDALE_UARTLITE 12
120#define IRQ_TIMBERDALE_MLCORE 13
121#define IRQ_TIMBERDALE_MLCORE_BUF 14
122#define IRQ_TIMBERDALE_RDS 15
123#define TIMBERDALE_NR_IRQS 16
124
125#define GPIO_PIN_ASCB 8
126#define GPIO_PIN_INIC_RST 14
127#define GPIO_PIN_BT_RST 15
128#define GPIO_NR_PINS 16
129
130#endif
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 677cd53f18c3..bb6465604235 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -457,10 +457,10 @@ config MTD_NAND_NOMADIK
457 457
458config MTD_NAND_SH_FLCTL 458config MTD_NAND_SH_FLCTL
459 tristate "Support for NAND on Renesas SuperH FLCTL" 459 tristate "Support for NAND on Renesas SuperH FLCTL"
460 depends on MTD_NAND && SUPERH && CPU_SUBTYPE_SH7723 460 depends on MTD_NAND && SUPERH
461 help 461 help
462 Several Renesas SuperH CPU has FLCTL. This option enables support 462 Several Renesas SuperH CPU has FLCTL. This option enables support
463 for NAND Flash using FLCTL. This driver support SH7723. 463 for NAND Flash using FLCTL.
464 464
465config MTD_NAND_DAVINCI 465config MTD_NAND_DAVINCI
466 tristate "Support NAND on DaVinci SoC" 466 tristate "Support NAND on DaVinci SoC"
diff --git a/drivers/mtd/nand/sh_flctl.c b/drivers/mtd/nand/sh_flctl.c
index 02bef21f2e4b..1842df8bdd93 100644
--- a/drivers/mtd/nand/sh_flctl.c
+++ b/drivers/mtd/nand/sh_flctl.c
@@ -1,10 +1,10 @@
1/* 1/*
2 * SuperH FLCTL nand controller 2 * SuperH FLCTL nand controller
3 * 3 *
4 * Copyright © 2008 Renesas Solutions Corp. 4 * Copyright (c) 2008 Renesas Solutions Corp.
5 * Copyright © 2008 Atom Create Engineering Co., Ltd. 5 * Copyright (c) 2008 Atom Create Engineering Co., Ltd.
6 * 6 *
7 * Based on fsl_elbc_nand.c, Copyright © 2006-2007 Freescale Semiconductor 7 * Based on fsl_elbc_nand.c, Copyright (c) 2006-2007 Freescale Semiconductor
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -75,6 +75,11 @@ static void start_translation(struct sh_flctl *flctl)
75 writeb(TRSTRT, FLTRCR(flctl)); 75 writeb(TRSTRT, FLTRCR(flctl));
76} 76}
77 77
78static void timeout_error(struct sh_flctl *flctl, const char *str)
79{
80 dev_err(&flctl->pdev->dev, "Timeout occured in %s\n", str);
81}
82
78static void wait_completion(struct sh_flctl *flctl) 83static void wait_completion(struct sh_flctl *flctl)
79{ 84{
80 uint32_t timeout = LOOP_TIMEOUT_MAX; 85 uint32_t timeout = LOOP_TIMEOUT_MAX;
@@ -87,7 +92,7 @@ static void wait_completion(struct sh_flctl *flctl)
87 udelay(1); 92 udelay(1);
88 } 93 }
89 94
90 printk(KERN_ERR "wait_completion(): Timeout occured \n"); 95 timeout_error(flctl, __func__);
91 writeb(0x0, FLTRCR(flctl)); 96 writeb(0x0, FLTRCR(flctl));
92} 97}
93 98
@@ -100,6 +105,8 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr)
100 addr = page_addr; /* ERASE1 */ 105 addr = page_addr; /* ERASE1 */
101 } else if (page_addr != -1) { 106 } else if (page_addr != -1) {
102 /* SEQIN, READ0, etc.. */ 107 /* SEQIN, READ0, etc.. */
108 if (flctl->chip.options & NAND_BUSWIDTH_16)
109 column >>= 1;
103 if (flctl->page_size) { 110 if (flctl->page_size) {
104 addr = column & 0x0FFF; 111 addr = column & 0x0FFF;
105 addr |= (page_addr & 0xff) << 16; 112 addr |= (page_addr & 0xff) << 16;
@@ -132,7 +139,7 @@ static void wait_rfifo_ready(struct sh_flctl *flctl)
132 return; 139 return;
133 udelay(1); 140 udelay(1);
134 } 141 }
135 printk(KERN_ERR "wait_rfifo_ready(): Timeout occured \n"); 142 timeout_error(flctl, __func__);
136} 143}
137 144
138static void wait_wfifo_ready(struct sh_flctl *flctl) 145static void wait_wfifo_ready(struct sh_flctl *flctl)
@@ -146,7 +153,7 @@ static void wait_wfifo_ready(struct sh_flctl *flctl)
146 return; 153 return;
147 udelay(1); 154 udelay(1);
148 } 155 }
149 printk(KERN_ERR "wait_wfifo_ready(): Timeout occured \n"); 156 timeout_error(flctl, __func__);
150} 157}
151 158
152static int wait_recfifo_ready(struct sh_flctl *flctl, int sector_number) 159static int wait_recfifo_ready(struct sh_flctl *flctl, int sector_number)
@@ -198,7 +205,7 @@ static int wait_recfifo_ready(struct sh_flctl *flctl, int sector_number)
198 writel(0, FL4ECCCR(flctl)); 205 writel(0, FL4ECCCR(flctl));
199 } 206 }
200 207
201 printk(KERN_ERR "wait_recfifo_ready(): Timeout occured \n"); 208 timeout_error(flctl, __func__);
202 return 1; /* timeout */ 209 return 1; /* timeout */
203} 210}
204 211
@@ -214,7 +221,7 @@ static void wait_wecfifo_ready(struct sh_flctl *flctl)
214 return; 221 return;
215 udelay(1); 222 udelay(1);
216 } 223 }
217 printk(KERN_ERR "wait_wecfifo_ready(): Timeout occured \n"); 224 timeout_error(flctl, __func__);
218} 225}
219 226
220static void read_datareg(struct sh_flctl *flctl, int offset) 227static void read_datareg(struct sh_flctl *flctl, int offset)
@@ -275,7 +282,7 @@ static void write_fiforeg(struct sh_flctl *flctl, int rlen, int offset)
275static void set_cmd_regs(struct mtd_info *mtd, uint32_t cmd, uint32_t flcmcdr_val) 282static void set_cmd_regs(struct mtd_info *mtd, uint32_t cmd, uint32_t flcmcdr_val)
276{ 283{
277 struct sh_flctl *flctl = mtd_to_flctl(mtd); 284 struct sh_flctl *flctl = mtd_to_flctl(mtd);
278 uint32_t flcmncr_val = readl(FLCMNCR(flctl)); 285 uint32_t flcmncr_val = readl(FLCMNCR(flctl)) & ~SEL_16BIT;
279 uint32_t flcmdcr_val, addr_len_bytes = 0; 286 uint32_t flcmdcr_val, addr_len_bytes = 0;
280 287
281 /* Set SNAND bit if page size is 2048byte */ 288 /* Set SNAND bit if page size is 2048byte */
@@ -297,6 +304,8 @@ static void set_cmd_regs(struct mtd_info *mtd, uint32_t cmd, uint32_t flcmcdr_va
297 case NAND_CMD_READOOB: 304 case NAND_CMD_READOOB:
298 addr_len_bytes = flctl->rw_ADRCNT; 305 addr_len_bytes = flctl->rw_ADRCNT;
299 flcmdcr_val |= CDSRC_E; 306 flcmdcr_val |= CDSRC_E;
307 if (flctl->chip.options & NAND_BUSWIDTH_16)
308 flcmncr_val |= SEL_16BIT;
300 break; 309 break;
301 case NAND_CMD_SEQIN: 310 case NAND_CMD_SEQIN:
302 /* This case is that cmd is READ0 or READ1 or READ00 */ 311 /* This case is that cmd is READ0 or READ1 or READ00 */
@@ -305,6 +314,8 @@ static void set_cmd_regs(struct mtd_info *mtd, uint32_t cmd, uint32_t flcmcdr_va
305 case NAND_CMD_PAGEPROG: 314 case NAND_CMD_PAGEPROG:
306 addr_len_bytes = flctl->rw_ADRCNT; 315 addr_len_bytes = flctl->rw_ADRCNT;
307 flcmdcr_val |= DOCMD2_E | CDSRC_E | SELRW; 316 flcmdcr_val |= DOCMD2_E | CDSRC_E | SELRW;
317 if (flctl->chip.options & NAND_BUSWIDTH_16)
318 flcmncr_val |= SEL_16BIT;
308 break; 319 break;
309 case NAND_CMD_READID: 320 case NAND_CMD_READID:
310 flcmncr_val &= ~SNAND_E; 321 flcmncr_val &= ~SNAND_E;
@@ -523,6 +534,8 @@ static void flctl_cmdfunc(struct mtd_info *mtd, unsigned int command,
523 set_addr(mtd, 0, page_addr); 534 set_addr(mtd, 0, page_addr);
524 535
525 flctl->read_bytes = mtd->writesize + mtd->oobsize; 536 flctl->read_bytes = mtd->writesize + mtd->oobsize;
537 if (flctl->chip.options & NAND_BUSWIDTH_16)
538 column >>= 1;
526 flctl->index += column; 539 flctl->index += column;
527 goto read_normal_exit; 540 goto read_normal_exit;
528 541
@@ -686,6 +699,18 @@ static uint8_t flctl_read_byte(struct mtd_info *mtd)
686 return data; 699 return data;
687} 700}
688 701
702static uint16_t flctl_read_word(struct mtd_info *mtd)
703{
704 struct sh_flctl *flctl = mtd_to_flctl(mtd);
705 int index = flctl->index;
706 uint16_t data;
707 uint16_t *buf = (uint16_t *)&flctl->done_buff[index];
708
709 data = *buf;
710 flctl->index += 2;
711 return data;
712}
713
689static void flctl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) 714static void flctl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
690{ 715{
691 int i; 716 int i;
@@ -769,38 +794,36 @@ static int flctl_chip_init_tail(struct mtd_info *mtd)
769 return 0; 794 return 0;
770} 795}
771 796
772static int __init flctl_probe(struct platform_device *pdev) 797static int __devinit flctl_probe(struct platform_device *pdev)
773{ 798{
774 struct resource *res; 799 struct resource *res;
775 struct sh_flctl *flctl; 800 struct sh_flctl *flctl;
776 struct mtd_info *flctl_mtd; 801 struct mtd_info *flctl_mtd;
777 struct nand_chip *nand; 802 struct nand_chip *nand;
778 struct sh_flctl_platform_data *pdata; 803 struct sh_flctl_platform_data *pdata;
779 int ret; 804 int ret = -ENXIO;
780 805
781 pdata = pdev->dev.platform_data; 806 pdata = pdev->dev.platform_data;
782 if (pdata == NULL) { 807 if (pdata == NULL) {
783 printk(KERN_ERR "sh_flctl platform_data not found.\n"); 808 dev_err(&pdev->dev, "no platform data defined\n");
784 return -ENODEV; 809 return -EINVAL;
785 } 810 }
786 811
787 flctl = kzalloc(sizeof(struct sh_flctl), GFP_KERNEL); 812 flctl = kzalloc(sizeof(struct sh_flctl), GFP_KERNEL);
788 if (!flctl) { 813 if (!flctl) {
789 printk(KERN_ERR "Unable to allocate NAND MTD dev structure.\n"); 814 dev_err(&pdev->dev, "failed to allocate driver data\n");
790 return -ENOMEM; 815 return -ENOMEM;
791 } 816 }
792 817
793 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 818 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
794 if (!res) { 819 if (!res) {
795 printk(KERN_ERR "%s: resource not found.\n", __func__); 820 dev_err(&pdev->dev, "failed to get I/O memory\n");
796 ret = -ENODEV;
797 goto err; 821 goto err;
798 } 822 }
799 823
800 flctl->reg = ioremap(res->start, res->end - res->start + 1); 824 flctl->reg = ioremap(res->start, resource_size(res));
801 if (flctl->reg == NULL) { 825 if (flctl->reg == NULL) {
802 printk(KERN_ERR "%s: ioremap error.\n", __func__); 826 dev_err(&pdev->dev, "failed to remap I/O memory\n");
803 ret = -ENOMEM;
804 goto err; 827 goto err;
805 } 828 }
806 829
@@ -808,6 +831,7 @@ static int __init flctl_probe(struct platform_device *pdev)
808 flctl_mtd = &flctl->mtd; 831 flctl_mtd = &flctl->mtd;
809 nand = &flctl->chip; 832 nand = &flctl->chip;
810 flctl_mtd->priv = nand; 833 flctl_mtd->priv = nand;
834 flctl->pdev = pdev;
811 flctl->hwecc = pdata->has_hwecc; 835 flctl->hwecc = pdata->has_hwecc;
812 836
813 flctl_register_init(flctl, pdata->flcmncr_val); 837 flctl_register_init(flctl, pdata->flcmncr_val);
@@ -825,6 +849,11 @@ static int __init flctl_probe(struct platform_device *pdev)
825 nand->select_chip = flctl_select_chip; 849 nand->select_chip = flctl_select_chip;
826 nand->cmdfunc = flctl_cmdfunc; 850 nand->cmdfunc = flctl_cmdfunc;
827 851
852 if (pdata->flcmncr_val & SEL_16BIT) {
853 nand->options |= NAND_BUSWIDTH_16;
854 nand->read_word = flctl_read_word;
855 }
856
828 ret = nand_scan_ident(flctl_mtd, 1); 857 ret = nand_scan_ident(flctl_mtd, 1);
829 if (ret) 858 if (ret)
830 goto err; 859 goto err;
@@ -846,7 +875,7 @@ err:
846 return ret; 875 return ret;
847} 876}
848 877
849static int __exit flctl_remove(struct platform_device *pdev) 878static int __devexit flctl_remove(struct platform_device *pdev)
850{ 879{
851 struct sh_flctl *flctl = platform_get_drvdata(pdev); 880 struct sh_flctl *flctl = platform_get_drvdata(pdev);
852 881
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index f526e735c5ab..6848f213eb53 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -79,6 +79,7 @@ config DELL_LAPTOP
79 depends on BACKLIGHT_CLASS_DEVICE 79 depends on BACKLIGHT_CLASS_DEVICE
80 depends on RFKILL || RFKILL = n 80 depends on RFKILL || RFKILL = n
81 depends on POWER_SUPPLY 81 depends on POWER_SUPPLY
82 depends on SERIO_I8042
82 default n 83 default n
83 ---help--- 84 ---help---
84 This driver adds support for rfkill and backlight control to Dell 85 This driver adds support for rfkill and backlight control to Dell
diff --git a/drivers/platform/x86/classmate-laptop.c b/drivers/platform/x86/classmate-laptop.c
index ed90082cdf1d..8cb20e45bad6 100644
--- a/drivers/platform/x86/classmate-laptop.c
+++ b/drivers/platform/x86/classmate-laptop.c
@@ -34,6 +34,11 @@ struct cmpc_accel {
34#define CMPC_ACCEL_SENSITIVITY_DEFAULT 5 34#define CMPC_ACCEL_SENSITIVITY_DEFAULT 5
35 35
36 36
37#define CMPC_ACCEL_HID "ACCE0000"
38#define CMPC_TABLET_HID "TBLT0000"
39#define CMPC_BL_HID "IPML200"
40#define CMPC_KEYS_HID "FnBT0000"
41
37/* 42/*
38 * Generic input device code. 43 * Generic input device code.
39 */ 44 */
@@ -282,10 +287,9 @@ static int cmpc_accel_remove(struct acpi_device *acpi, int type)
282} 287}
283 288
284static const struct acpi_device_id cmpc_accel_device_ids[] = { 289static const struct acpi_device_id cmpc_accel_device_ids[] = {
285 {"ACCE0000", 0}, 290 {CMPC_ACCEL_HID, 0},
286 {"", 0} 291 {"", 0}
287}; 292};
288MODULE_DEVICE_TABLE(acpi, cmpc_accel_device_ids);
289 293
290static struct acpi_driver cmpc_accel_acpi_driver = { 294static struct acpi_driver cmpc_accel_acpi_driver = {
291 .owner = THIS_MODULE, 295 .owner = THIS_MODULE,
@@ -366,10 +370,9 @@ static int cmpc_tablet_resume(struct acpi_device *acpi)
366} 370}
367 371
368static const struct acpi_device_id cmpc_tablet_device_ids[] = { 372static const struct acpi_device_id cmpc_tablet_device_ids[] = {
369 {"TBLT0000", 0}, 373 {CMPC_TABLET_HID, 0},
370 {"", 0} 374 {"", 0}
371}; 375};
372MODULE_DEVICE_TABLE(acpi, cmpc_tablet_device_ids);
373 376
374static struct acpi_driver cmpc_tablet_acpi_driver = { 377static struct acpi_driver cmpc_tablet_acpi_driver = {
375 .owner = THIS_MODULE, 378 .owner = THIS_MODULE,
@@ -477,17 +480,16 @@ static int cmpc_bl_remove(struct acpi_device *acpi, int type)
477 return 0; 480 return 0;
478} 481}
479 482
480static const struct acpi_device_id cmpc_device_ids[] = { 483static const struct acpi_device_id cmpc_bl_device_ids[] = {
481 {"IPML200", 0}, 484 {CMPC_BL_HID, 0},
482 {"", 0} 485 {"", 0}
483}; 486};
484MODULE_DEVICE_TABLE(acpi, cmpc_device_ids);
485 487
486static struct acpi_driver cmpc_bl_acpi_driver = { 488static struct acpi_driver cmpc_bl_acpi_driver = {
487 .owner = THIS_MODULE, 489 .owner = THIS_MODULE,
488 .name = "cmpc", 490 .name = "cmpc",
489 .class = "cmpc", 491 .class = "cmpc",
490 .ids = cmpc_device_ids, 492 .ids = cmpc_bl_device_ids,
491 .ops = { 493 .ops = {
492 .add = cmpc_bl_add, 494 .add = cmpc_bl_add,
493 .remove = cmpc_bl_remove 495 .remove = cmpc_bl_remove
@@ -540,10 +542,9 @@ static int cmpc_keys_remove(struct acpi_device *acpi, int type)
540} 542}
541 543
542static const struct acpi_device_id cmpc_keys_device_ids[] = { 544static const struct acpi_device_id cmpc_keys_device_ids[] = {
543 {"FnBT0000", 0}, 545 {CMPC_KEYS_HID, 0},
544 {"", 0} 546 {"", 0}
545}; 547};
546MODULE_DEVICE_TABLE(acpi, cmpc_keys_device_ids);
547 548
548static struct acpi_driver cmpc_keys_acpi_driver = { 549static struct acpi_driver cmpc_keys_acpi_driver = {
549 .owner = THIS_MODULE, 550 .owner = THIS_MODULE,
@@ -607,3 +608,13 @@ static void cmpc_exit(void)
607 608
608module_init(cmpc_init); 609module_init(cmpc_init);
609module_exit(cmpc_exit); 610module_exit(cmpc_exit);
611
612static const struct acpi_device_id cmpc_device_ids[] = {
613 {CMPC_ACCEL_HID, 0},
614 {CMPC_TABLET_HID, 0},
615 {CMPC_BL_HID, 0},
616 {CMPC_KEYS_HID, 0},
617 {"", 0}
618};
619
620MODULE_DEVICE_TABLE(acpi, cmpc_device_ids);
diff --git a/drivers/platform/x86/compal-laptop.c b/drivers/platform/x86/compal-laptop.c
index 1a387e79f719..2740b40aad9b 100644
--- a/drivers/platform/x86/compal-laptop.c
+++ b/drivers/platform/x86/compal-laptop.c
@@ -26,17 +26,8 @@
26/* 26/*
27 * comapl-laptop.c - Compal laptop support. 27 * comapl-laptop.c - Compal laptop support.
28 * 28 *
29 * This driver exports a few files in /sys/devices/platform/compal-laptop/: 29 * The driver registers itself with the rfkill subsystem and
30 * 30 * the Linux backlight control subsystem.
31 * wlan - wlan subsystem state: contains 0 or 1 (rw)
32 *
33 * bluetooth - Bluetooth subsystem state: contains 0 or 1 (rw)
34 *
35 * raw - raw value taken from embedded controller register (ro)
36 *
37 * In addition to these platform device attributes the driver
38 * registers itself in the Linux backlight control subsystem and is
39 * available to userspace under /sys/class/backlight/compal-laptop/.
40 * 31 *
41 * This driver might work on other laptops produced by Compal. If you 32 * This driver might work on other laptops produced by Compal. If you
42 * want to try it you can pass force=1 as argument to the module which 33 * want to try it you can pass force=1 as argument to the module which
@@ -51,6 +42,7 @@
51#include <linux/dmi.h> 42#include <linux/dmi.h>
52#include <linux/backlight.h> 43#include <linux/backlight.h>
53#include <linux/platform_device.h> 44#include <linux/platform_device.h>
45#include <linux/rfkill.h>
54 46
55#define COMPAL_DRIVER_VERSION "0.2.6" 47#define COMPAL_DRIVER_VERSION "0.2.6"
56 48
@@ -63,6 +55,10 @@
63#define WLAN_MASK 0x01 55#define WLAN_MASK 0x01
64#define BT_MASK 0x02 56#define BT_MASK 0x02
65 57
58static struct rfkill *wifi_rfkill;
59static struct rfkill *bt_rfkill;
60static struct platform_device *compal_device;
61
66static int force; 62static int force;
67module_param(force, bool, 0); 63module_param(force, bool, 0);
68MODULE_PARM_DESC(force, "Force driver load, ignore DMI data"); 64MODULE_PARM_DESC(force, "Force driver load, ignore DMI data");
@@ -88,65 +84,75 @@ static int get_lcd_level(void)
88 return (int) result; 84 return (int) result;
89} 85}
90 86
91static int set_wlan_state(int state) 87static int compal_rfkill_set(void *data, bool blocked)
92{ 88{
89 unsigned long radio = (unsigned long) data;
93 u8 result, value; 90 u8 result, value;
94 91
95 ec_read(COMPAL_EC_COMMAND_WIRELESS, &result); 92 ec_read(COMPAL_EC_COMMAND_WIRELESS, &result);
96 93
97 if ((result & KILLSWITCH_MASK) == 0) 94 if (!blocked)
98 return -EINVAL; 95 value = (u8) (result | radio);
99 else { 96 else
100 if (state) 97 value = (u8) (result & ~radio);
101 value = (u8) (result | WLAN_MASK); 98 ec_write(COMPAL_EC_COMMAND_WIRELESS, value);
102 else
103 value = (u8) (result & ~WLAN_MASK);
104 ec_write(COMPAL_EC_COMMAND_WIRELESS, value);
105 }
106 99
107 return 0; 100 return 0;
108} 101}
109 102
110static int set_bluetooth_state(int state) 103static void compal_rfkill_poll(struct rfkill *rfkill, void *data)
111{ 104{
112 u8 result, value; 105 u8 result;
106 bool hw_blocked;
113 107
114 ec_read(COMPAL_EC_COMMAND_WIRELESS, &result); 108 ec_read(COMPAL_EC_COMMAND_WIRELESS, &result);
115 109
116 if ((result & KILLSWITCH_MASK) == 0) 110 hw_blocked = !(result & KILLSWITCH_MASK);
117 return -EINVAL; 111 rfkill_set_hw_state(rfkill, hw_blocked);
118 else {
119 if (state)
120 value = (u8) (result | BT_MASK);
121 else
122 value = (u8) (result & ~BT_MASK);
123 ec_write(COMPAL_EC_COMMAND_WIRELESS, value);
124 }
125
126 return 0;
127} 112}
128 113
129static int get_wireless_state(int *wlan, int *bluetooth) 114static const struct rfkill_ops compal_rfkill_ops = {
115 .poll = compal_rfkill_poll,
116 .set_block = compal_rfkill_set,
117};
118
119static int setup_rfkill(void)
130{ 120{
131 u8 result; 121 int ret;
132 122
133 ec_read(COMPAL_EC_COMMAND_WIRELESS, &result); 123 wifi_rfkill = rfkill_alloc("compal-wifi", &compal_device->dev,
124 RFKILL_TYPE_WLAN, &compal_rfkill_ops,
125 (void *) WLAN_MASK);
126 if (!wifi_rfkill)
127 return -ENOMEM;
134 128
135 if (wlan) { 129 ret = rfkill_register(wifi_rfkill);
136 if ((result & KILLSWITCH_MASK) == 0) 130 if (ret)
137 *wlan = 0; 131 goto err_wifi;
138 else
139 *wlan = result & WLAN_MASK;
140 }
141 132
142 if (bluetooth) { 133 bt_rfkill = rfkill_alloc("compal-bluetooth", &compal_device->dev,
143 if ((result & KILLSWITCH_MASK) == 0) 134 RFKILL_TYPE_BLUETOOTH, &compal_rfkill_ops,
144 *bluetooth = 0; 135 (void *) BT_MASK);
145 else 136 if (!bt_rfkill) {
146 *bluetooth = (result & BT_MASK) >> 1; 137 ret = -ENOMEM;
138 goto err_allocate_bt;
147 } 139 }
140 ret = rfkill_register(bt_rfkill);
141 if (ret)
142 goto err_register_bt;
148 143
149 return 0; 144 return 0;
145
146err_register_bt:
147 rfkill_destroy(bt_rfkill);
148
149err_allocate_bt:
150 rfkill_unregister(wifi_rfkill);
151
152err_wifi:
153 rfkill_destroy(wifi_rfkill);
154
155 return ret;
150} 156}
151 157
152/* Backlight device stuff */ 158/* Backlight device stuff */
@@ -169,86 +175,6 @@ static struct backlight_ops compalbl_ops = {
169 175
170static struct backlight_device *compalbl_device; 176static struct backlight_device *compalbl_device;
171 177
172/* Platform device */
173
174static ssize_t show_wlan(struct device *dev,
175 struct device_attribute *attr, char *buf)
176{
177 int ret, enabled;
178
179 ret = get_wireless_state(&enabled, NULL);
180 if (ret < 0)
181 return ret;
182
183 return sprintf(buf, "%i\n", enabled);
184}
185
186static ssize_t show_raw(struct device *dev,
187 struct device_attribute *attr, char *buf)
188{
189 u8 result;
190
191 ec_read(COMPAL_EC_COMMAND_WIRELESS, &result);
192
193 return sprintf(buf, "%i\n", result);
194}
195
196static ssize_t show_bluetooth(struct device *dev,
197 struct device_attribute *attr, char *buf)
198{
199 int ret, enabled;
200
201 ret = get_wireless_state(NULL, &enabled);
202 if (ret < 0)
203 return ret;
204
205 return sprintf(buf, "%i\n", enabled);
206}
207
208static ssize_t store_wlan_state(struct device *dev,
209 struct device_attribute *attr, const char *buf, size_t count)
210{
211 int state, ret;
212
213 if (sscanf(buf, "%i", &state) != 1 || (state < 0 || state > 1))
214 return -EINVAL;
215
216 ret = set_wlan_state(state);
217 if (ret < 0)
218 return ret;
219
220 return count;
221}
222
223static ssize_t store_bluetooth_state(struct device *dev,
224 struct device_attribute *attr, const char *buf, size_t count)
225{
226 int state, ret;
227
228 if (sscanf(buf, "%i", &state) != 1 || (state < 0 || state > 1))
229 return -EINVAL;
230
231 ret = set_bluetooth_state(state);
232 if (ret < 0)
233 return ret;
234
235 return count;
236}
237
238static DEVICE_ATTR(bluetooth, 0644, show_bluetooth, store_bluetooth_state);
239static DEVICE_ATTR(wlan, 0644, show_wlan, store_wlan_state);
240static DEVICE_ATTR(raw, 0444, show_raw, NULL);
241
242static struct attribute *compal_attributes[] = {
243 &dev_attr_bluetooth.attr,
244 &dev_attr_wlan.attr,
245 &dev_attr_raw.attr,
246 NULL
247};
248
249static struct attribute_group compal_attribute_group = {
250 .attrs = compal_attributes
251};
252 178
253static struct platform_driver compal_driver = { 179static struct platform_driver compal_driver = {
254 .driver = { 180 .driver = {
@@ -257,8 +183,6 @@ static struct platform_driver compal_driver = {
257 } 183 }
258}; 184};
259 185
260static struct platform_device *compal_device;
261
262/* Initialization */ 186/* Initialization */
263 187
264static int dmi_check_cb(const struct dmi_system_id *id) 188static int dmi_check_cb(const struct dmi_system_id *id)
@@ -310,6 +234,47 @@ static struct dmi_system_id __initdata compal_dmi_table[] = {
310 }, 234 },
311 .callback = dmi_check_cb 235 .callback = dmi_check_cb
312 }, 236 },
237 {
238 .ident = "Dell Mini 9",
239 .matches = {
240 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
241 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 910"),
242 },
243 .callback = dmi_check_cb
244 },
245 {
246 .ident = "Dell Mini 10",
247 .matches = {
248 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
249 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1010"),
250 },
251 .callback = dmi_check_cb
252 },
253 {
254 .ident = "Dell Mini 10v",
255 .matches = {
256 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
257 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1011"),
258 },
259 .callback = dmi_check_cb
260 },
261 {
262 .ident = "Dell Inspiron 11z",
263 .matches = {
264 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
265 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1110"),
266 },
267 .callback = dmi_check_cb
268 },
269 {
270 .ident = "Dell Mini 12",
271 .matches = {
272 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
273 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1210"),
274 },
275 .callback = dmi_check_cb
276 },
277
313 { } 278 { }
314}; 279};
315 280
@@ -348,23 +313,21 @@ static int __init compal_init(void)
348 313
349 ret = platform_device_add(compal_device); 314 ret = platform_device_add(compal_device);
350 if (ret) 315 if (ret)
351 goto fail_platform_device1; 316 goto fail_platform_device;
352 317
353 ret = sysfs_create_group(&compal_device->dev.kobj, 318 ret = setup_rfkill();
354 &compal_attribute_group);
355 if (ret) 319 if (ret)
356 goto fail_platform_device2; 320 goto fail_rfkill;
357 321
358 printk(KERN_INFO "compal-laptop: driver "COMPAL_DRIVER_VERSION 322 printk(KERN_INFO "compal-laptop: driver "COMPAL_DRIVER_VERSION
359 " successfully loaded.\n"); 323 " successfully loaded.\n");
360 324
361 return 0; 325 return 0;
362 326
363fail_platform_device2: 327fail_rfkill:
364
365 platform_device_del(compal_device); 328 platform_device_del(compal_device);
366 329
367fail_platform_device1: 330fail_platform_device:
368 331
369 platform_device_put(compal_device); 332 platform_device_put(compal_device);
370 333
@@ -382,10 +345,13 @@ fail_backlight:
382static void __exit compal_cleanup(void) 345static void __exit compal_cleanup(void)
383{ 346{
384 347
385 sysfs_remove_group(&compal_device->dev.kobj, &compal_attribute_group);
386 platform_device_unregister(compal_device); 348 platform_device_unregister(compal_device);
387 platform_driver_unregister(&compal_driver); 349 platform_driver_unregister(&compal_driver);
388 backlight_device_unregister(compalbl_device); 350 backlight_device_unregister(compalbl_device);
351 rfkill_unregister(wifi_rfkill);
352 rfkill_destroy(wifi_rfkill);
353 rfkill_unregister(bt_rfkill);
354 rfkill_destroy(bt_rfkill);
389 355
390 printk(KERN_INFO "compal-laptop: driver unloaded.\n"); 356 printk(KERN_INFO "compal-laptop: driver unloaded.\n");
391} 357}
@@ -403,3 +369,8 @@ MODULE_ALIAS("dmi:*:rnIFL90:rvrREFERENCE:*");
403MODULE_ALIAS("dmi:*:rnIFL91:rvrIFT00:*"); 369MODULE_ALIAS("dmi:*:rnIFL91:rvrIFT00:*");
404MODULE_ALIAS("dmi:*:rnJFL92:rvrIFT00:*"); 370MODULE_ALIAS("dmi:*:rnJFL92:rvrIFT00:*");
405MODULE_ALIAS("dmi:*:rnIFT00:rvrIFT00:*"); 371MODULE_ALIAS("dmi:*:rnIFT00:rvrIFT00:*");
372MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron910:*");
373MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1010:*");
374MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1011:*");
375MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1110:*");
376MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1210:*");
diff --git a/drivers/platform/x86/dell-laptop.c b/drivers/platform/x86/dell-laptop.c
index 3780994dc8f2..b7f4d2705916 100644
--- a/drivers/platform/x86/dell-laptop.c
+++ b/drivers/platform/x86/dell-laptop.c
@@ -22,6 +22,8 @@
22#include <linux/rfkill.h> 22#include <linux/rfkill.h>
23#include <linux/power_supply.h> 23#include <linux/power_supply.h>
24#include <linux/acpi.h> 24#include <linux/acpi.h>
25#include <linux/mm.h>
26#include <linux/i8042.h>
25#include "../../firmware/dcdbas.h" 27#include "../../firmware/dcdbas.h"
26 28
27#define BRIGHTNESS_TOKEN 0x7d 29#define BRIGHTNESS_TOKEN 0x7d
@@ -79,9 +81,73 @@ static const struct dmi_system_id __initdata dell_device_table[] = {
79 DMI_MATCH(DMI_CHASSIS_TYPE, "8"), 81 DMI_MATCH(DMI_CHASSIS_TYPE, "8"),
80 }, 82 },
81 }, 83 },
84 {
85 .ident = "Dell Computer Corporation",
86 .matches = {
87 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
88 DMI_MATCH(DMI_CHASSIS_TYPE, "8"),
89 },
90 },
82 { } 91 { }
83}; 92};
84 93
94static struct dmi_system_id __devinitdata dell_blacklist[] = {
95 /* Supported by compal-laptop */
96 {
97 .ident = "Dell Mini 9",
98 .matches = {
99 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
100 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 910"),
101 },
102 },
103 {
104 .ident = "Dell Mini 10",
105 .matches = {
106 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
107 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1010"),
108 },
109 },
110 {
111 .ident = "Dell Mini 10v",
112 .matches = {
113 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
114 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1011"),
115 },
116 },
117 {
118 .ident = "Dell Inspiron 11z",
119 .matches = {
120 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
121 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1110"),
122 },
123 },
124 {
125 .ident = "Dell Mini 12",
126 .matches = {
127 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
128 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1210"),
129 },
130 },
131 {}
132};
133
134static struct calling_interface_buffer *buffer;
135struct page *bufferpage;
136DEFINE_MUTEX(buffer_mutex);
137
138static int hwswitch_state;
139
140static void get_buffer(void)
141{
142 mutex_lock(&buffer_mutex);
143 memset(buffer, 0, sizeof(struct calling_interface_buffer));
144}
145
146static void release_buffer(void)
147{
148 mutex_unlock(&buffer_mutex);
149}
150
85static void __init parse_da_table(const struct dmi_header *dm) 151static void __init parse_da_table(const struct dmi_header *dm)
86{ 152{
87 /* Final token is a terminator, so we don't want to copy it */ 153 /* Final token is a terminator, so we don't want to copy it */
@@ -160,6 +226,8 @@ dell_send_request(struct calling_interface_buffer *buffer, int class,
160/* Derived from information in DellWirelessCtl.cpp: 226/* Derived from information in DellWirelessCtl.cpp:
161 Class 17, select 11 is radio control. It returns an array of 32-bit values. 227 Class 17, select 11 is radio control. It returns an array of 32-bit values.
162 228
229 Input byte 0 = 0: Wireless information
230
163 result[0]: return code 231 result[0]: return code
164 result[1]: 232 result[1]:
165 Bit 0: Hardware switch supported 233 Bit 0: Hardware switch supported
@@ -180,33 +248,62 @@ dell_send_request(struct calling_interface_buffer *buffer, int class,
180 Bits 20-31: Reserved 248 Bits 20-31: Reserved
181 result[2]: NVRAM size in bytes 249 result[2]: NVRAM size in bytes
182 result[3]: NVRAM format version number 250 result[3]: NVRAM format version number
251
252 Input byte 0 = 2: Wireless switch configuration
253 result[0]: return code
254 result[1]:
255 Bit 0: Wifi controlled by switch
256 Bit 1: Bluetooth controlled by switch
257 Bit 2: WWAN controlled by switch
258 Bits 3-6: Reserved
259 Bit 7: Wireless switch config locked
260 Bit 8: Wifi locator enabled
261 Bits 9-14: Reserved
262 Bit 15: Wifi locator setting locked
263 Bits 16-31: Reserved
183*/ 264*/
184 265
185static int dell_rfkill_set(void *data, bool blocked) 266static int dell_rfkill_set(void *data, bool blocked)
186{ 267{
187 struct calling_interface_buffer buffer;
188 int disable = blocked ? 1 : 0; 268 int disable = blocked ? 1 : 0;
189 unsigned long radio = (unsigned long)data; 269 unsigned long radio = (unsigned long)data;
270 int hwswitch_bit = (unsigned long)data - 1;
271 int ret = 0;
272
273 get_buffer();
274 dell_send_request(buffer, 17, 11);
275
276 /* If the hardware switch controls this radio, and the hardware
277 switch is disabled, don't allow changing the software state */
278 if ((hwswitch_state & BIT(hwswitch_bit)) &&
279 !(buffer->output[1] & BIT(16))) {
280 ret = -EINVAL;
281 goto out;
282 }
190 283
191 memset(&buffer, 0, sizeof(struct calling_interface_buffer)); 284 buffer->input[0] = (1 | (radio<<8) | (disable << 16));
192 buffer.input[0] = (1 | (radio<<8) | (disable << 16)); 285 dell_send_request(buffer, 17, 11);
193 dell_send_request(&buffer, 17, 11);
194 286
195 return 0; 287out:
288 release_buffer();
289 return ret;
196} 290}
197 291
198static void dell_rfkill_query(struct rfkill *rfkill, void *data) 292static void dell_rfkill_query(struct rfkill *rfkill, void *data)
199{ 293{
200 struct calling_interface_buffer buffer;
201 int status; 294 int status;
202 int bit = (unsigned long)data + 16; 295 int bit = (unsigned long)data + 16;
296 int hwswitch_bit = (unsigned long)data - 1;
203 297
204 memset(&buffer, 0, sizeof(struct calling_interface_buffer)); 298 get_buffer();
205 dell_send_request(&buffer, 17, 11); 299 dell_send_request(buffer, 17, 11);
206 status = buffer.output[1]; 300 status = buffer->output[1];
301 release_buffer();
207 302
208 rfkill_set_sw_state(rfkill, !!(status & BIT(bit))); 303 rfkill_set_sw_state(rfkill, !!(status & BIT(bit)));
209 rfkill_set_hw_state(rfkill, !(status & BIT(16))); 304
305 if (hwswitch_state & (BIT(hwswitch_bit)))
306 rfkill_set_hw_state(rfkill, !(status & BIT(16)));
210} 307}
211 308
212static const struct rfkill_ops dell_rfkill_ops = { 309static const struct rfkill_ops dell_rfkill_ops = {
@@ -214,15 +311,36 @@ static const struct rfkill_ops dell_rfkill_ops = {
214 .query = dell_rfkill_query, 311 .query = dell_rfkill_query,
215}; 312};
216 313
314static void dell_update_rfkill(struct work_struct *ignored)
315{
316 if (wifi_rfkill)
317 dell_rfkill_query(wifi_rfkill, (void *)1);
318 if (bluetooth_rfkill)
319 dell_rfkill_query(bluetooth_rfkill, (void *)2);
320 if (wwan_rfkill)
321 dell_rfkill_query(wwan_rfkill, (void *)3);
322}
323static DECLARE_DELAYED_WORK(dell_rfkill_work, dell_update_rfkill);
324
325
217static int __init dell_setup_rfkill(void) 326static int __init dell_setup_rfkill(void)
218{ 327{
219 struct calling_interface_buffer buffer;
220 int status; 328 int status;
221 int ret; 329 int ret;
222 330
223 memset(&buffer, 0, sizeof(struct calling_interface_buffer)); 331 if (dmi_check_system(dell_blacklist)) {
224 dell_send_request(&buffer, 17, 11); 332 printk(KERN_INFO "dell-laptop: Blacklisted hardware detected - "
225 status = buffer.output[1]; 333 "not enabling rfkill\n");
334 return 0;
335 }
336
337 get_buffer();
338 dell_send_request(buffer, 17, 11);
339 status = buffer->output[1];
340 buffer->input[0] = 0x2;
341 dell_send_request(buffer, 17, 11);
342 hwswitch_state = buffer->output[1];
343 release_buffer();
226 344
227 if ((status & (1<<2|1<<8)) == (1<<2|1<<8)) { 345 if ((status & (1<<2|1<<8)) == (1<<2|1<<8)) {
228 wifi_rfkill = rfkill_alloc("dell-wifi", &platform_device->dev, 346 wifi_rfkill = rfkill_alloc("dell-wifi", &platform_device->dev,
@@ -298,39 +416,49 @@ static void dell_cleanup_rfkill(void)
298 416
299static int dell_send_intensity(struct backlight_device *bd) 417static int dell_send_intensity(struct backlight_device *bd)
300{ 418{
301 struct calling_interface_buffer buffer; 419 int ret = 0;
302 420
303 memset(&buffer, 0, sizeof(struct calling_interface_buffer)); 421 get_buffer();
304 buffer.input[0] = find_token_location(BRIGHTNESS_TOKEN); 422 buffer->input[0] = find_token_location(BRIGHTNESS_TOKEN);
305 buffer.input[1] = bd->props.brightness; 423 buffer->input[1] = bd->props.brightness;
306 424
307 if (buffer.input[0] == -1) 425 if (buffer->input[0] == -1) {
308 return -ENODEV; 426 ret = -ENODEV;
427 goto out;
428 }
309 429
310 if (power_supply_is_system_supplied() > 0) 430 if (power_supply_is_system_supplied() > 0)
311 dell_send_request(&buffer, 1, 2); 431 dell_send_request(buffer, 1, 2);
312 else 432 else
313 dell_send_request(&buffer, 1, 1); 433 dell_send_request(buffer, 1, 1);
314 434
435out:
436 release_buffer();
315 return 0; 437 return 0;
316} 438}
317 439
318static int dell_get_intensity(struct backlight_device *bd) 440static int dell_get_intensity(struct backlight_device *bd)
319{ 441{
320 struct calling_interface_buffer buffer; 442 int ret = 0;
321 443
322 memset(&buffer, 0, sizeof(struct calling_interface_buffer)); 444 get_buffer();
323 buffer.input[0] = find_token_location(BRIGHTNESS_TOKEN); 445 buffer->input[0] = find_token_location(BRIGHTNESS_TOKEN);
324 446
325 if (buffer.input[0] == -1) 447 if (buffer->input[0] == -1) {
326 return -ENODEV; 448 ret = -ENODEV;
449 goto out;
450 }
327 451
328 if (power_supply_is_system_supplied() > 0) 452 if (power_supply_is_system_supplied() > 0)
329 dell_send_request(&buffer, 0, 2); 453 dell_send_request(buffer, 0, 2);
330 else 454 else
331 dell_send_request(&buffer, 0, 1); 455 dell_send_request(buffer, 0, 1);
332 456
333 return buffer.output[1]; 457out:
458 release_buffer();
459 if (ret)
460 return ret;
461 return buffer->output[1];
334} 462}
335 463
336static struct backlight_ops dell_ops = { 464static struct backlight_ops dell_ops = {
@@ -338,9 +466,32 @@ static struct backlight_ops dell_ops = {
338 .update_status = dell_send_intensity, 466 .update_status = dell_send_intensity,
339}; 467};
340 468
469bool dell_laptop_i8042_filter(unsigned char data, unsigned char str,
470 struct serio *port)
471{
472 static bool extended;
473
474 if (str & 0x20)
475 return false;
476
477 if (unlikely(data == 0xe0)) {
478 extended = true;
479 return false;
480 } else if (unlikely(extended)) {
481 switch (data) {
482 case 0x8:
483 schedule_delayed_work(&dell_rfkill_work,
484 round_jiffies_relative(HZ));
485 break;
486 }
487 extended = false;
488 }
489
490 return false;
491}
492
341static int __init dell_init(void) 493static int __init dell_init(void)
342{ 494{
343 struct calling_interface_buffer buffer;
344 int max_intensity = 0; 495 int max_intensity = 0;
345 int ret; 496 int ret;
346 497
@@ -366,6 +517,17 @@ static int __init dell_init(void)
366 if (ret) 517 if (ret)
367 goto fail_platform_device2; 518 goto fail_platform_device2;
368 519
520 /*
521 * Allocate buffer below 4GB for SMI data--only 32-bit physical addr
522 * is passed to SMI handler.
523 */
524 bufferpage = alloc_page(GFP_KERNEL | GFP_DMA32);
525
526 if (!bufferpage)
527 goto fail_buffer;
528 buffer = page_address(bufferpage);
529 mutex_init(&buffer_mutex);
530
369 ret = dell_setup_rfkill(); 531 ret = dell_setup_rfkill();
370 532
371 if (ret) { 533 if (ret) {
@@ -373,6 +535,13 @@ static int __init dell_init(void)
373 goto fail_rfkill; 535 goto fail_rfkill;
374 } 536 }
375 537
538 ret = i8042_install_filter(dell_laptop_i8042_filter);
539 if (ret) {
540 printk(KERN_WARNING
541 "dell-laptop: Unable to install key filter\n");
542 goto fail_filter;
543 }
544
376#ifdef CONFIG_ACPI 545#ifdef CONFIG_ACPI
377 /* In the event of an ACPI backlight being available, don't 546 /* In the event of an ACPI backlight being available, don't
378 * register the platform controller. 547 * register the platform controller.
@@ -381,13 +550,13 @@ static int __init dell_init(void)
381 return 0; 550 return 0;
382#endif 551#endif
383 552
384 memset(&buffer, 0, sizeof(struct calling_interface_buffer)); 553 get_buffer();
385 buffer.input[0] = find_token_location(BRIGHTNESS_TOKEN); 554 buffer->input[0] = find_token_location(BRIGHTNESS_TOKEN);
386 555 if (buffer->input[0] != -1) {
387 if (buffer.input[0] != -1) { 556 dell_send_request(buffer, 0, 2);
388 dell_send_request(&buffer, 0, 2); 557 max_intensity = buffer->output[3];
389 max_intensity = buffer.output[3];
390 } 558 }
559 release_buffer();
391 560
392 if (max_intensity) { 561 if (max_intensity) {
393 dell_backlight_device = backlight_device_register( 562 dell_backlight_device = backlight_device_register(
@@ -410,8 +579,12 @@ static int __init dell_init(void)
410 return 0; 579 return 0;
411 580
412fail_backlight: 581fail_backlight:
582 i8042_remove_filter(dell_laptop_i8042_filter);
583fail_filter:
413 dell_cleanup_rfkill(); 584 dell_cleanup_rfkill();
414fail_rfkill: 585fail_rfkill:
586 free_page((unsigned long)bufferpage);
587fail_buffer:
415 platform_device_del(platform_device); 588 platform_device_del(platform_device);
416fail_platform_device2: 589fail_platform_device2:
417 platform_device_put(platform_device); 590 platform_device_put(platform_device);
@@ -424,8 +597,16 @@ fail_platform_driver:
424 597
425static void __exit dell_exit(void) 598static void __exit dell_exit(void)
426{ 599{
600 cancel_delayed_work_sync(&dell_rfkill_work);
601 i8042_remove_filter(dell_laptop_i8042_filter);
427 backlight_device_unregister(dell_backlight_device); 602 backlight_device_unregister(dell_backlight_device);
428 dell_cleanup_rfkill(); 603 dell_cleanup_rfkill();
604 if (platform_device) {
605 platform_device_del(platform_device);
606 platform_driver_unregister(&platform_driver);
607 }
608 kfree(da_tokens);
609 free_page((unsigned long)buffer);
429} 610}
430 611
431module_init(dell_init); 612module_init(dell_init);
@@ -435,3 +616,4 @@ MODULE_AUTHOR("Matthew Garrett <mjg@redhat.com>");
435MODULE_DESCRIPTION("Dell laptop driver"); 616MODULE_DESCRIPTION("Dell laptop driver");
436MODULE_LICENSE("GPL"); 617MODULE_LICENSE("GPL");
437MODULE_ALIAS("dmi:*svnDellInc.:*:ct8:*"); 618MODULE_ALIAS("dmi:*svnDellInc.:*:ct8:*");
619MODULE_ALIAS("dmi:*svnDellComputerCorporation.:*:ct8:*");
diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c
index ad4c414dbfbc..3aa57da8b43b 100644
--- a/drivers/platform/x86/hp-wmi.c
+++ b/drivers/platform/x86/hp-wmi.c
@@ -89,6 +89,7 @@ static struct key_entry hp_wmi_keymap[] = {
89 {KE_KEY, 0x20e6, KEY_PROG1}, 89 {KE_KEY, 0x20e6, KEY_PROG1},
90 {KE_KEY, 0x2142, KEY_MEDIA}, 90 {KE_KEY, 0x2142, KEY_MEDIA},
91 {KE_KEY, 0x213b, KEY_INFO}, 91 {KE_KEY, 0x213b, KEY_INFO},
92 {KE_KEY, 0x2169, KEY_DIRECTION},
92 {KE_KEY, 0x231b, KEY_HELP}, 93 {KE_KEY, 0x231b, KEY_HELP},
93 {KE_END, 0} 94 {KE_END, 0}
94}; 95};
diff --git a/drivers/platform/x86/toshiba_acpi.c b/drivers/platform/x86/toshiba_acpi.c
index 77bf5d8f893a..26c211724acf 100644
--- a/drivers/platform/x86/toshiba_acpi.c
+++ b/drivers/platform/x86/toshiba_acpi.c
@@ -46,6 +46,7 @@
46#include <linux/backlight.h> 46#include <linux/backlight.h>
47#include <linux/platform_device.h> 47#include <linux/platform_device.h>
48#include <linux/rfkill.h> 48#include <linux/rfkill.h>
49#include <linux/input.h>
49 50
50#include <asm/uaccess.h> 51#include <asm/uaccess.h>
51 52
@@ -62,9 +63,10 @@ MODULE_LICENSE("GPL");
62 63
63/* Toshiba ACPI method paths */ 64/* Toshiba ACPI method paths */
64#define METHOD_LCD_BRIGHTNESS "\\_SB_.PCI0.VGA_.LCD_._BCM" 65#define METHOD_LCD_BRIGHTNESS "\\_SB_.PCI0.VGA_.LCD_._BCM"
65#define METHOD_HCI_1 "\\_SB_.VALD.GHCI" 66#define TOSH_INTERFACE_1 "\\_SB_.VALD"
66#define METHOD_HCI_2 "\\_SB_.VALZ.GHCI" 67#define TOSH_INTERFACE_2 "\\_SB_.VALZ"
67#define METHOD_VIDEO_OUT "\\_SB_.VALX.DSSX" 68#define METHOD_VIDEO_OUT "\\_SB_.VALX.DSSX"
69#define GHCI_METHOD ".GHCI"
68 70
69/* Toshiba HCI interface definitions 71/* Toshiba HCI interface definitions
70 * 72 *
@@ -116,6 +118,36 @@ static const struct acpi_device_id toshiba_device_ids[] = {
116}; 118};
117MODULE_DEVICE_TABLE(acpi, toshiba_device_ids); 119MODULE_DEVICE_TABLE(acpi, toshiba_device_ids);
118 120
121struct key_entry {
122 char type;
123 u16 code;
124 u16 keycode;
125};
126
127enum {KE_KEY, KE_END};
128
129static struct key_entry toshiba_acpi_keymap[] = {
130 {KE_KEY, 0x101, KEY_MUTE},
131 {KE_KEY, 0x13b, KEY_COFFEE},
132 {KE_KEY, 0x13c, KEY_BATTERY},
133 {KE_KEY, 0x13d, KEY_SLEEP},
134 {KE_KEY, 0x13e, KEY_SUSPEND},
135 {KE_KEY, 0x13f, KEY_SWITCHVIDEOMODE},
136 {KE_KEY, 0x140, KEY_BRIGHTNESSDOWN},
137 {KE_KEY, 0x141, KEY_BRIGHTNESSUP},
138 {KE_KEY, 0x142, KEY_WLAN},
139 {KE_KEY, 0x143, KEY_PROG1},
140 {KE_KEY, 0xb05, KEY_PROG2},
141 {KE_KEY, 0xb06, KEY_WWW},
142 {KE_KEY, 0xb07, KEY_MAIL},
143 {KE_KEY, 0xb30, KEY_STOP},
144 {KE_KEY, 0xb31, KEY_PREVIOUSSONG},
145 {KE_KEY, 0xb32, KEY_NEXTSONG},
146 {KE_KEY, 0xb33, KEY_PLAYPAUSE},
147 {KE_KEY, 0xb5a, KEY_MEDIA},
148 {KE_END, 0, 0},
149};
150
119/* utility 151/* utility
120 */ 152 */
121 153
@@ -251,6 +283,8 @@ static acpi_status hci_read2(u32 reg, u32 *out1, u32 *out2, u32 *result)
251struct toshiba_acpi_dev { 283struct toshiba_acpi_dev {
252 struct platform_device *p_dev; 284 struct platform_device *p_dev;
253 struct rfkill *bt_rfk; 285 struct rfkill *bt_rfk;
286 struct input_dev *hotkey_dev;
287 acpi_handle handle;
254 288
255 const char *bt_name; 289 const char *bt_name;
256 290
@@ -711,8 +745,159 @@ static struct backlight_ops toshiba_backlight_data = {
711 .update_status = set_lcd_status, 745 .update_status = set_lcd_status,
712}; 746};
713 747
748static struct key_entry *toshiba_acpi_get_entry_by_scancode(int code)
749{
750 struct key_entry *key;
751
752 for (key = toshiba_acpi_keymap; key->type != KE_END; key++)
753 if (code == key->code)
754 return key;
755
756 return NULL;
757}
758
759static struct key_entry *toshiba_acpi_get_entry_by_keycode(int code)
760{
761 struct key_entry *key;
762
763 for (key = toshiba_acpi_keymap; key->type != KE_END; key++)
764 if (code == key->keycode && key->type == KE_KEY)
765 return key;
766
767 return NULL;
768}
769
770static int toshiba_acpi_getkeycode(struct input_dev *dev, int scancode,
771 int *keycode)
772{
773 struct key_entry *key = toshiba_acpi_get_entry_by_scancode(scancode);
774
775 if (key && key->type == KE_KEY) {
776 *keycode = key->keycode;
777 return 0;
778 }
779
780 return -EINVAL;
781}
782
783static int toshiba_acpi_setkeycode(struct input_dev *dev, int scancode,
784 int keycode)
785{
786 struct key_entry *key;
787 int old_keycode;
788
789 if (keycode < 0 || keycode > KEY_MAX)
790 return -EINVAL;
791
792 key = toshiba_acpi_get_entry_by_scancode(scancode);
793 if (key && key->type == KE_KEY) {
794 old_keycode = key->keycode;
795 key->keycode = keycode;
796 set_bit(keycode, dev->keybit);
797 if (!toshiba_acpi_get_entry_by_keycode(old_keycode))
798 clear_bit(old_keycode, dev->keybit);
799 return 0;
800 }
801
802 return -EINVAL;
803}
804
805static void toshiba_acpi_notify(acpi_handle handle, u32 event, void *context)
806{
807 u32 hci_result, value;
808 struct key_entry *key;
809
810 if (event != 0x80)
811 return;
812 do {
813 hci_read1(HCI_SYSTEM_EVENT, &value, &hci_result);
814 if (hci_result == HCI_SUCCESS) {
815 if (value == 0x100)
816 continue;
817 else if (value & 0x80) {
818 key = toshiba_acpi_get_entry_by_scancode
819 (value & ~0x80);
820 if (!key) {
821 printk(MY_INFO "Unknown key %x\n",
822 value & ~0x80);
823 continue;
824 }
825 input_report_key(toshiba_acpi.hotkey_dev,
826 key->keycode, 1);
827 input_sync(toshiba_acpi.hotkey_dev);
828 input_report_key(toshiba_acpi.hotkey_dev,
829 key->keycode, 0);
830 input_sync(toshiba_acpi.hotkey_dev);
831 }
832 } else if (hci_result == HCI_NOT_SUPPORTED) {
833 /* This is a workaround for an unresolved issue on
834 * some machines where system events sporadically
835 * become disabled. */
836 hci_write1(HCI_SYSTEM_EVENT, 1, &hci_result);
837 printk(MY_NOTICE "Re-enabled hotkeys\n");
838 }
839 } while (hci_result != HCI_EMPTY);
840}
841
842static int toshiba_acpi_setup_keyboard(char *device)
843{
844 acpi_status status;
845 acpi_handle handle;
846 int result;
847 const struct key_entry *key;
848
849 status = acpi_get_handle(NULL, device, &handle);
850 if (ACPI_FAILURE(status)) {
851 printk(MY_INFO "Unable to get notification device\n");
852 return -ENODEV;
853 }
854
855 toshiba_acpi.handle = handle;
856
857 status = acpi_evaluate_object(handle, "ENAB", NULL, NULL);
858 if (ACPI_FAILURE(status)) {
859 printk(MY_INFO "Unable to enable hotkeys\n");
860 return -ENODEV;
861 }
862
863 status = acpi_install_notify_handler(handle, ACPI_DEVICE_NOTIFY,
864 toshiba_acpi_notify, NULL);
865 if (ACPI_FAILURE(status)) {
866 printk(MY_INFO "Unable to install hotkey notification\n");
867 return -ENODEV;
868 }
869
870 toshiba_acpi.hotkey_dev = input_allocate_device();
871 if (!toshiba_acpi.hotkey_dev) {
872 printk(MY_INFO "Unable to register input device\n");
873 return -ENOMEM;
874 }
875
876 toshiba_acpi.hotkey_dev->name = "Toshiba input device";
877 toshiba_acpi.hotkey_dev->phys = device;
878 toshiba_acpi.hotkey_dev->id.bustype = BUS_HOST;
879 toshiba_acpi.hotkey_dev->getkeycode = toshiba_acpi_getkeycode;
880 toshiba_acpi.hotkey_dev->setkeycode = toshiba_acpi_setkeycode;
881
882 for (key = toshiba_acpi_keymap; key->type != KE_END; key++) {
883 set_bit(EV_KEY, toshiba_acpi.hotkey_dev->evbit);
884 set_bit(key->keycode, toshiba_acpi.hotkey_dev->keybit);
885 }
886
887 result = input_register_device(toshiba_acpi.hotkey_dev);
888 if (result) {
889 printk(MY_INFO "Unable to register input device\n");
890 return result;
891 }
892
893 return 0;
894}
895
714static void toshiba_acpi_exit(void) 896static void toshiba_acpi_exit(void)
715{ 897{
898 if (toshiba_acpi.hotkey_dev)
899 input_unregister_device(toshiba_acpi.hotkey_dev);
900
716 if (toshiba_acpi.bt_rfk) { 901 if (toshiba_acpi.bt_rfk) {
717 rfkill_unregister(toshiba_acpi.bt_rfk); 902 rfkill_unregister(toshiba_acpi.bt_rfk);
718 rfkill_destroy(toshiba_acpi.bt_rfk); 903 rfkill_destroy(toshiba_acpi.bt_rfk);
@@ -726,6 +911,9 @@ static void toshiba_acpi_exit(void)
726 if (toshiba_proc_dir) 911 if (toshiba_proc_dir)
727 remove_proc_entry(PROC_TOSHIBA, acpi_root_dir); 912 remove_proc_entry(PROC_TOSHIBA, acpi_root_dir);
728 913
914 acpi_remove_notify_handler(toshiba_acpi.handle, ACPI_DEVICE_NOTIFY,
915 toshiba_acpi_notify);
916
729 platform_device_unregister(toshiba_acpi.p_dev); 917 platform_device_unregister(toshiba_acpi.p_dev);
730 918
731 return; 919 return;
@@ -742,11 +930,15 @@ static int __init toshiba_acpi_init(void)
742 return -ENODEV; 930 return -ENODEV;
743 931
744 /* simple device detection: look for HCI method */ 932 /* simple device detection: look for HCI method */
745 if (is_valid_acpi_path(METHOD_HCI_1)) 933 if (is_valid_acpi_path(TOSH_INTERFACE_1 GHCI_METHOD)) {
746 method_hci = METHOD_HCI_1; 934 method_hci = TOSH_INTERFACE_1 GHCI_METHOD;
747 else if (is_valid_acpi_path(METHOD_HCI_2)) 935 if (toshiba_acpi_setup_keyboard(TOSH_INTERFACE_1))
748 method_hci = METHOD_HCI_2; 936 printk(MY_INFO "Unable to activate hotkeys\n");
749 else 937 } else if (is_valid_acpi_path(TOSH_INTERFACE_2 GHCI_METHOD)) {
938 method_hci = TOSH_INTERFACE_2 GHCI_METHOD;
939 if (toshiba_acpi_setup_keyboard(TOSH_INTERFACE_2))
940 printk(MY_INFO "Unable to activate hotkeys\n");
941 } else
750 return -ENODEV; 942 return -ENODEV;
751 943
752 printk(MY_INFO "Toshiba Laptop ACPI Extras version %s\n", 944 printk(MY_INFO "Toshiba Laptop ACPI Extras version %s\n",
diff --git a/drivers/s390/scsi/zfcp_aux.c b/drivers/s390/scsi/zfcp_aux.c
index 9d0c941b7d33..66d6c01fcf3e 100644
--- a/drivers/s390/scsi/zfcp_aux.c
+++ b/drivers/s390/scsi/zfcp_aux.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Module interface and handling of zfcp data structures. 4 * Module interface and handling of zfcp data structures.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2009 6 * Copyright IBM Corporation 2002, 2010
7 */ 7 */
8 8
9/* 9/*
@@ -32,6 +32,7 @@
32#include <linux/seq_file.h> 32#include <linux/seq_file.h>
33#include "zfcp_ext.h" 33#include "zfcp_ext.h"
34#include "zfcp_fc.h" 34#include "zfcp_fc.h"
35#include "zfcp_reqlist.h"
35 36
36#define ZFCP_BUS_ID_SIZE 20 37#define ZFCP_BUS_ID_SIZE 20
37 38
@@ -49,36 +50,6 @@ static struct kmem_cache *zfcp_cache_hw_align(const char *name,
49 return kmem_cache_create(name, size, roundup_pow_of_two(size), 0, NULL); 50 return kmem_cache_create(name, size, roundup_pow_of_two(size), 0, NULL);
50} 51}
51 52
52static int zfcp_reqlist_alloc(struct zfcp_adapter *adapter)
53{
54 int idx;
55
56 adapter->req_list = kcalloc(REQUEST_LIST_SIZE, sizeof(struct list_head),
57 GFP_KERNEL);
58 if (!adapter->req_list)
59 return -ENOMEM;
60
61 for (idx = 0; idx < REQUEST_LIST_SIZE; idx++)
62 INIT_LIST_HEAD(&adapter->req_list[idx]);
63 return 0;
64}
65
66/**
67 * zfcp_reqlist_isempty - is the request list empty
68 * @adapter: pointer to struct zfcp_adapter
69 *
70 * Returns: true if list is empty, false otherwise
71 */
72int zfcp_reqlist_isempty(struct zfcp_adapter *adapter)
73{
74 unsigned int idx;
75
76 for (idx = 0; idx < REQUEST_LIST_SIZE; idx++)
77 if (!list_empty(&adapter->req_list[idx]))
78 return 0;
79 return 1;
80}
81
82static void __init zfcp_init_device_configure(char *busid, u64 wwpn, u64 lun) 53static void __init zfcp_init_device_configure(char *busid, u64 wwpn, u64 lun)
83{ 54{
84 struct ccw_device *cdev; 55 struct ccw_device *cdev;
@@ -110,7 +81,7 @@ static void __init zfcp_init_device_configure(char *busid, u64 wwpn, u64 lun)
110 flush_work(&unit->scsi_work); 81 flush_work(&unit->scsi_work);
111 82
112out_unit: 83out_unit:
113 put_device(&port->sysfs_device); 84 put_device(&port->dev);
114out_port: 85out_port:
115 zfcp_ccw_adapter_put(adapter); 86 zfcp_ccw_adapter_put(adapter);
116out_ccw_device: 87out_ccw_device:
@@ -255,7 +226,7 @@ struct zfcp_unit *zfcp_get_unit_by_lun(struct zfcp_port *port, u64 fcp_lun)
255 read_lock_irqsave(&port->unit_list_lock, flags); 226 read_lock_irqsave(&port->unit_list_lock, flags);
256 list_for_each_entry(unit, &port->unit_list, list) 227 list_for_each_entry(unit, &port->unit_list, list)
257 if (unit->fcp_lun == fcp_lun) { 228 if (unit->fcp_lun == fcp_lun) {
258 if (!get_device(&unit->sysfs_device)) 229 if (!get_device(&unit->dev))
259 unit = NULL; 230 unit = NULL;
260 read_unlock_irqrestore(&port->unit_list_lock, flags); 231 read_unlock_irqrestore(&port->unit_list_lock, flags);
261 return unit; 232 return unit;
@@ -280,7 +251,7 @@ struct zfcp_port *zfcp_get_port_by_wwpn(struct zfcp_adapter *adapter,
280 read_lock_irqsave(&adapter->port_list_lock, flags); 251 read_lock_irqsave(&adapter->port_list_lock, flags);
281 list_for_each_entry(port, &adapter->port_list, list) 252 list_for_each_entry(port, &adapter->port_list, list)
282 if (port->wwpn == wwpn) { 253 if (port->wwpn == wwpn) {
283 if (!get_device(&port->sysfs_device)) 254 if (!get_device(&port->dev))
284 port = NULL; 255 port = NULL;
285 read_unlock_irqrestore(&adapter->port_list_lock, flags); 256 read_unlock_irqrestore(&adapter->port_list_lock, flags);
286 return port; 257 return port;
@@ -298,10 +269,9 @@ struct zfcp_port *zfcp_get_port_by_wwpn(struct zfcp_adapter *adapter,
298 */ 269 */
299static void zfcp_unit_release(struct device *dev) 270static void zfcp_unit_release(struct device *dev)
300{ 271{
301 struct zfcp_unit *unit = container_of(dev, struct zfcp_unit, 272 struct zfcp_unit *unit = container_of(dev, struct zfcp_unit, dev);
302 sysfs_device);
303 273
304 put_device(&unit->port->sysfs_device); 274 put_device(&unit->port->dev);
305 kfree(unit); 275 kfree(unit);
306} 276}
307 277
@@ -318,11 +288,11 @@ struct zfcp_unit *zfcp_unit_enqueue(struct zfcp_port *port, u64 fcp_lun)
318 struct zfcp_unit *unit; 288 struct zfcp_unit *unit;
319 int retval = -ENOMEM; 289 int retval = -ENOMEM;
320 290
321 get_device(&port->sysfs_device); 291 get_device(&port->dev);
322 292
323 unit = zfcp_get_unit_by_lun(port, fcp_lun); 293 unit = zfcp_get_unit_by_lun(port, fcp_lun);
324 if (unit) { 294 if (unit) {
325 put_device(&unit->sysfs_device); 295 put_device(&unit->dev);
326 retval = -EEXIST; 296 retval = -EEXIST;
327 goto err_out; 297 goto err_out;
328 } 298 }
@@ -333,10 +303,10 @@ struct zfcp_unit *zfcp_unit_enqueue(struct zfcp_port *port, u64 fcp_lun)
333 303
334 unit->port = port; 304 unit->port = port;
335 unit->fcp_lun = fcp_lun; 305 unit->fcp_lun = fcp_lun;
336 unit->sysfs_device.parent = &port->sysfs_device; 306 unit->dev.parent = &port->dev;
337 unit->sysfs_device.release = zfcp_unit_release; 307 unit->dev.release = zfcp_unit_release;
338 308
339 if (dev_set_name(&unit->sysfs_device, "0x%016llx", 309 if (dev_set_name(&unit->dev, "0x%016llx",
340 (unsigned long long) fcp_lun)) { 310 (unsigned long long) fcp_lun)) {
341 kfree(unit); 311 kfree(unit);
342 goto err_out; 312 goto err_out;
@@ -353,13 +323,12 @@ struct zfcp_unit *zfcp_unit_enqueue(struct zfcp_port *port, u64 fcp_lun)
353 unit->latencies.cmd.channel.min = 0xFFFFFFFF; 323 unit->latencies.cmd.channel.min = 0xFFFFFFFF;
354 unit->latencies.cmd.fabric.min = 0xFFFFFFFF; 324 unit->latencies.cmd.fabric.min = 0xFFFFFFFF;
355 325
356 if (device_register(&unit->sysfs_device)) { 326 if (device_register(&unit->dev)) {
357 put_device(&unit->sysfs_device); 327 put_device(&unit->dev);
358 goto err_out; 328 goto err_out;
359 } 329 }
360 330
361 if (sysfs_create_group(&unit->sysfs_device.kobj, 331 if (sysfs_create_group(&unit->dev.kobj, &zfcp_sysfs_unit_attrs))
362 &zfcp_sysfs_unit_attrs))
363 goto err_out_put; 332 goto err_out_put;
364 333
365 write_lock_irq(&port->unit_list_lock); 334 write_lock_irq(&port->unit_list_lock);
@@ -371,9 +340,9 @@ struct zfcp_unit *zfcp_unit_enqueue(struct zfcp_port *port, u64 fcp_lun)
371 return unit; 340 return unit;
372 341
373err_out_put: 342err_out_put:
374 device_unregister(&unit->sysfs_device); 343 device_unregister(&unit->dev);
375err_out: 344err_out:
376 put_device(&port->sysfs_device); 345 put_device(&port->dev);
377 return ERR_PTR(retval); 346 return ERR_PTR(retval);
378} 347}
379 348
@@ -539,7 +508,8 @@ struct zfcp_adapter *zfcp_adapter_enqueue(struct ccw_device *ccw_device)
539 if (zfcp_allocate_low_mem_buffers(adapter)) 508 if (zfcp_allocate_low_mem_buffers(adapter))
540 goto failed; 509 goto failed;
541 510
542 if (zfcp_reqlist_alloc(adapter)) 511 adapter->req_list = zfcp_reqlist_alloc();
512 if (!adapter->req_list)
543 goto failed; 513 goto failed;
544 514
545 if (zfcp_dbf_adapter_register(adapter)) 515 if (zfcp_dbf_adapter_register(adapter))
@@ -560,8 +530,6 @@ struct zfcp_adapter *zfcp_adapter_enqueue(struct ccw_device *ccw_device)
560 INIT_LIST_HEAD(&adapter->erp_ready_head); 530 INIT_LIST_HEAD(&adapter->erp_ready_head);
561 INIT_LIST_HEAD(&adapter->erp_running_head); 531 INIT_LIST_HEAD(&adapter->erp_running_head);
562 532
563 spin_lock_init(&adapter->req_list_lock);
564
565 rwlock_init(&adapter->erp_lock); 533 rwlock_init(&adapter->erp_lock);
566 rwlock_init(&adapter->abort_lock); 534 rwlock_init(&adapter->abort_lock);
567 535
@@ -640,8 +608,7 @@ void zfcp_device_unregister(struct device *dev,
640 608
641static void zfcp_port_release(struct device *dev) 609static void zfcp_port_release(struct device *dev)
642{ 610{
643 struct zfcp_port *port = container_of(dev, struct zfcp_port, 611 struct zfcp_port *port = container_of(dev, struct zfcp_port, dev);
644 sysfs_device);
645 612
646 zfcp_ccw_adapter_put(port->adapter); 613 zfcp_ccw_adapter_put(port->adapter);
647 kfree(port); 614 kfree(port);
@@ -669,7 +636,7 @@ struct zfcp_port *zfcp_port_enqueue(struct zfcp_adapter *adapter, u64 wwpn,
669 636
670 port = zfcp_get_port_by_wwpn(adapter, wwpn); 637 port = zfcp_get_port_by_wwpn(adapter, wwpn);
671 if (port) { 638 if (port) {
672 put_device(&port->sysfs_device); 639 put_device(&port->dev);
673 retval = -EEXIST; 640 retval = -EEXIST;
674 goto err_out; 641 goto err_out;
675 } 642 }
@@ -689,22 +656,21 @@ struct zfcp_port *zfcp_port_enqueue(struct zfcp_adapter *adapter, u64 wwpn,
689 port->d_id = d_id; 656 port->d_id = d_id;
690 port->wwpn = wwpn; 657 port->wwpn = wwpn;
691 port->rport_task = RPORT_NONE; 658 port->rport_task = RPORT_NONE;
692 port->sysfs_device.parent = &adapter->ccw_device->dev; 659 port->dev.parent = &adapter->ccw_device->dev;
693 port->sysfs_device.release = zfcp_port_release; 660 port->dev.release = zfcp_port_release;
694 661
695 if (dev_set_name(&port->sysfs_device, "0x%016llx", 662 if (dev_set_name(&port->dev, "0x%016llx", (unsigned long long)wwpn)) {
696 (unsigned long long)wwpn)) {
697 kfree(port); 663 kfree(port);
698 goto err_out; 664 goto err_out;
699 } 665 }
700 retval = -EINVAL; 666 retval = -EINVAL;
701 667
702 if (device_register(&port->sysfs_device)) { 668 if (device_register(&port->dev)) {
703 put_device(&port->sysfs_device); 669 put_device(&port->dev);
704 goto err_out; 670 goto err_out;
705 } 671 }
706 672
707 if (sysfs_create_group(&port->sysfs_device.kobj, 673 if (sysfs_create_group(&port->dev.kobj,
708 &zfcp_sysfs_port_attrs)) 674 &zfcp_sysfs_port_attrs))
709 goto err_out_put; 675 goto err_out_put;
710 676
@@ -717,7 +683,7 @@ struct zfcp_port *zfcp_port_enqueue(struct zfcp_adapter *adapter, u64 wwpn,
717 return port; 683 return port;
718 684
719err_out_put: 685err_out_put:
720 device_unregister(&port->sysfs_device); 686 device_unregister(&port->dev);
721err_out: 687err_out:
722 zfcp_ccw_adapter_put(adapter); 688 zfcp_ccw_adapter_put(adapter);
723 return ERR_PTR(retval); 689 return ERR_PTR(retval);
diff --git a/drivers/s390/scsi/zfcp_ccw.c b/drivers/s390/scsi/zfcp_ccw.c
index c22cb72a5ae8..ce1cc7a11fb4 100644
--- a/drivers/s390/scsi/zfcp_ccw.c
+++ b/drivers/s390/scsi/zfcp_ccw.c
@@ -3,13 +3,14 @@
3 * 3 *
4 * Registration and callback for the s390 common I/O layer. 4 * Registration and callback for the s390 common I/O layer.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2009 6 * Copyright IBM Corporation 2002, 2010
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11 11
12#include "zfcp_ext.h" 12#include "zfcp_ext.h"
13#include "zfcp_reqlist.h"
13 14
14#define ZFCP_MODEL_PRIV 0x4 15#define ZFCP_MODEL_PRIV 0x4
15 16
@@ -122,12 +123,10 @@ static void zfcp_ccw_remove(struct ccw_device *cdev)
122 zfcp_ccw_adapter_put(adapter); /* put from zfcp_ccw_adapter_by_cdev */ 123 zfcp_ccw_adapter_put(adapter); /* put from zfcp_ccw_adapter_by_cdev */
123 124
124 list_for_each_entry_safe(unit, u, &unit_remove_lh, list) 125 list_for_each_entry_safe(unit, u, &unit_remove_lh, list)
125 zfcp_device_unregister(&unit->sysfs_device, 126 zfcp_device_unregister(&unit->dev, &zfcp_sysfs_unit_attrs);
126 &zfcp_sysfs_unit_attrs);
127 127
128 list_for_each_entry_safe(port, p, &port_remove_lh, list) 128 list_for_each_entry_safe(port, p, &port_remove_lh, list)
129 zfcp_device_unregister(&port->sysfs_device, 129 zfcp_device_unregister(&port->dev, &zfcp_sysfs_port_attrs);
130 &zfcp_sysfs_port_attrs);
131 130
132 zfcp_adapter_unregister(adapter); 131 zfcp_adapter_unregister(adapter);
133} 132}
@@ -162,7 +161,7 @@ static int zfcp_ccw_set_online(struct ccw_device *cdev)
162 } 161 }
163 162
164 /* initialize request counter */ 163 /* initialize request counter */
165 BUG_ON(!zfcp_reqlist_isempty(adapter)); 164 BUG_ON(!zfcp_reqlist_isempty(adapter->req_list));
166 adapter->req_no = 0; 165 adapter->req_no = 0;
167 166
168 zfcp_erp_modify_adapter_status(adapter, "ccsonl1", NULL, 167 zfcp_erp_modify_adapter_status(adapter, "ccsonl1", NULL,
diff --git a/drivers/s390/scsi/zfcp_dbf.c b/drivers/s390/scsi/zfcp_dbf.c
index 7369c8911bcf..7a149fd85f6d 100644
--- a/drivers/s390/scsi/zfcp_dbf.c
+++ b/drivers/s390/scsi/zfcp_dbf.c
@@ -140,9 +140,9 @@ void _zfcp_dbf_hba_fsf_response(const char *tag2, int level,
140 memcpy(response->fsf_status_qual, 140 memcpy(response->fsf_status_qual,
141 fsf_status_qual, FSF_STATUS_QUALIFIER_SIZE); 141 fsf_status_qual, FSF_STATUS_QUALIFIER_SIZE);
142 response->fsf_req_status = fsf_req->status; 142 response->fsf_req_status = fsf_req->status;
143 response->sbal_first = fsf_req->queue_req.sbal_first; 143 response->sbal_first = fsf_req->qdio_req.sbal_first;
144 response->sbal_last = fsf_req->queue_req.sbal_last; 144 response->sbal_last = fsf_req->qdio_req.sbal_last;
145 response->sbal_response = fsf_req->queue_req.sbal_response; 145 response->sbal_response = fsf_req->qdio_req.sbal_response;
146 response->pool = fsf_req->pool != NULL; 146 response->pool = fsf_req->pool != NULL;
147 response->erp_action = (unsigned long)fsf_req->erp_action; 147 response->erp_action = (unsigned long)fsf_req->erp_action;
148 148
@@ -576,7 +576,8 @@ void zfcp_dbf_rec_adapter(char *id, void *ref, struct zfcp_dbf *dbf)
576 struct zfcp_adapter *adapter = dbf->adapter; 576 struct zfcp_adapter *adapter = dbf->adapter;
577 577
578 zfcp_dbf_rec_target(id, ref, dbf, &adapter->status, 578 zfcp_dbf_rec_target(id, ref, dbf, &adapter->status,
579 &adapter->erp_counter, 0, 0, 0); 579 &adapter->erp_counter, 0, 0,
580 ZFCP_DBF_INVALID_LUN);
580} 581}
581 582
582/** 583/**
@@ -590,8 +591,8 @@ void zfcp_dbf_rec_port(char *id, void *ref, struct zfcp_port *port)
590 struct zfcp_dbf *dbf = port->adapter->dbf; 591 struct zfcp_dbf *dbf = port->adapter->dbf;
591 592
592 zfcp_dbf_rec_target(id, ref, dbf, &port->status, 593 zfcp_dbf_rec_target(id, ref, dbf, &port->status,
593 &port->erp_counter, port->wwpn, port->d_id, 594 &port->erp_counter, port->wwpn, port->d_id,
594 0); 595 ZFCP_DBF_INVALID_LUN);
595} 596}
596 597
597/** 598/**
@@ -642,10 +643,9 @@ void zfcp_dbf_rec_trigger(char *id2, void *ref, u8 want, u8 need, void *action,
642 r->u.trigger.ps = atomic_read(&port->status); 643 r->u.trigger.ps = atomic_read(&port->status);
643 r->u.trigger.wwpn = port->wwpn; 644 r->u.trigger.wwpn = port->wwpn;
644 } 645 }
645 if (unit) { 646 if (unit)
646 r->u.trigger.us = atomic_read(&unit->status); 647 r->u.trigger.us = atomic_read(&unit->status);
647 r->u.trigger.fcp_lun = unit->fcp_lun; 648 r->u.trigger.fcp_lun = unit ? unit->fcp_lun : ZFCP_DBF_INVALID_LUN;
648 }
649 debug_event(dbf->rec, action ? 1 : 4, r, sizeof(*r)); 649 debug_event(dbf->rec, action ? 1 : 4, r, sizeof(*r));
650 spin_unlock_irqrestore(&dbf->rec_lock, flags); 650 spin_unlock_irqrestore(&dbf->rec_lock, flags);
651} 651}
@@ -668,7 +668,7 @@ void zfcp_dbf_rec_action(char *id2, struct zfcp_erp_action *erp_action)
668 r->u.action.action = (unsigned long)erp_action; 668 r->u.action.action = (unsigned long)erp_action;
669 r->u.action.status = erp_action->status; 669 r->u.action.status = erp_action->status;
670 r->u.action.step = erp_action->step; 670 r->u.action.step = erp_action->step;
671 r->u.action.fsf_req = (unsigned long)erp_action->fsf_req; 671 r->u.action.fsf_req = erp_action->fsf_req_id;
672 debug_event(dbf->rec, 5, r, sizeof(*r)); 672 debug_event(dbf->rec, 5, r, sizeof(*r));
673 spin_unlock_irqrestore(&dbf->rec_lock, flags); 673 spin_unlock_irqrestore(&dbf->rec_lock, flags);
674} 674}
diff --git a/drivers/s390/scsi/zfcp_dbf.h b/drivers/s390/scsi/zfcp_dbf.h
index 8b7fd9a1033e..457e046f2d28 100644
--- a/drivers/s390/scsi/zfcp_dbf.h
+++ b/drivers/s390/scsi/zfcp_dbf.h
@@ -30,6 +30,8 @@
30#define ZFCP_DBF_TAG_SIZE 4 30#define ZFCP_DBF_TAG_SIZE 4
31#define ZFCP_DBF_ID_SIZE 7 31#define ZFCP_DBF_ID_SIZE 7
32 32
33#define ZFCP_DBF_INVALID_LUN 0xFFFFFFFFFFFFFFFFull
34
33struct zfcp_dbf_dump { 35struct zfcp_dbf_dump {
34 u8 tag[ZFCP_DBF_TAG_SIZE]; 36 u8 tag[ZFCP_DBF_TAG_SIZE];
35 u32 total_size; /* size of total dump data */ 37 u32 total_size; /* size of total dump data */
@@ -192,10 +194,10 @@ struct zfcp_dbf_san_record {
192 struct zfcp_dbf_san_record_ct_response ct_resp; 194 struct zfcp_dbf_san_record_ct_response ct_resp;
193 struct zfcp_dbf_san_record_els els; 195 struct zfcp_dbf_san_record_els els;
194 } u; 196 } u;
195#define ZFCP_DBF_SAN_MAX_PAYLOAD 1024
196 u8 payload[32];
197} __attribute__ ((packed)); 197} __attribute__ ((packed));
198 198
199#define ZFCP_DBF_SAN_MAX_PAYLOAD 1024
200
199struct zfcp_dbf_scsi_record { 201struct zfcp_dbf_scsi_record {
200 u8 tag[ZFCP_DBF_TAG_SIZE]; 202 u8 tag[ZFCP_DBF_TAG_SIZE];
201 u8 tag2[ZFCP_DBF_TAG_SIZE]; 203 u8 tag2[ZFCP_DBF_TAG_SIZE];
@@ -301,17 +303,31 @@ void zfcp_dbf_scsi(const char *tag, const char *tag2, int level,
301 303
302/** 304/**
303 * zfcp_dbf_scsi_result - trace event for SCSI command completion 305 * zfcp_dbf_scsi_result - trace event for SCSI command completion
304 * @tag: tag indicating success or failure of SCSI command 306 * @dbf: adapter dbf trace
305 * @level: trace level applicable for this event 307 * @scmd: SCSI command pointer
306 * @adapter: adapter that has been used to issue the SCSI command 308 * @req: FSF request used to issue SCSI command
309 */
310static inline
311void zfcp_dbf_scsi_result(struct zfcp_dbf *dbf, struct scsi_cmnd *scmd,
312 struct zfcp_fsf_req *req)
313{
314 if (scmd->result != 0)
315 zfcp_dbf_scsi("rslt", "erro", 3, dbf, scmd, req, 0);
316 else if (scmd->retries > 0)
317 zfcp_dbf_scsi("rslt", "retr", 4, dbf, scmd, req, 0);
318 else
319 zfcp_dbf_scsi("rslt", "norm", 6, dbf, scmd, req, 0);
320}
321
322/**
323 * zfcp_dbf_scsi_fail_send - trace event for failure to send SCSI command
324 * @dbf: adapter dbf trace
307 * @scmd: SCSI command pointer 325 * @scmd: SCSI command pointer
308 * @fsf_req: request used to issue SCSI command (might be NULL)
309 */ 326 */
310static inline 327static inline
311void zfcp_dbf_scsi_result(const char *tag, int level, struct zfcp_dbf *dbf, 328void zfcp_dbf_scsi_fail_send(struct zfcp_dbf *dbf, struct scsi_cmnd *scmd)
312 struct scsi_cmnd *scmd, struct zfcp_fsf_req *fsf_req)
313{ 329{
314 zfcp_dbf_scsi("rslt", tag, level, dbf, scmd, fsf_req, 0); 330 zfcp_dbf_scsi("rslt", "fail", 4, dbf, scmd, NULL, 0);
315} 331}
316 332
317/** 333/**
diff --git a/drivers/s390/scsi/zfcp_def.h b/drivers/s390/scsi/zfcp_def.h
index e1b5b88e2ddb..7131c7db1f04 100644
--- a/drivers/s390/scsi/zfcp_def.h
+++ b/drivers/s390/scsi/zfcp_def.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Global definitions for the zfcp device driver. 4 * Global definitions for the zfcp device driver.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2009 6 * Copyright IBM Corporation 2002, 2010
7 */ 7 */
8 8
9#ifndef ZFCP_DEF_H 9#ifndef ZFCP_DEF_H
@@ -33,15 +33,13 @@
33#include <scsi/scsi_transport_fc.h> 33#include <scsi/scsi_transport_fc.h>
34#include <scsi/scsi_bsg_fc.h> 34#include <scsi/scsi_bsg_fc.h>
35#include <asm/ccwdev.h> 35#include <asm/ccwdev.h>
36#include <asm/qdio.h>
37#include <asm/debug.h> 36#include <asm/debug.h>
38#include <asm/ebcdic.h> 37#include <asm/ebcdic.h>
39#include <asm/sysinfo.h> 38#include <asm/sysinfo.h>
40#include "zfcp_fsf.h" 39#include "zfcp_fsf.h"
40#include "zfcp_qdio.h"
41 41
42/********************* GENERAL DEFINES *********************************/ 42struct zfcp_reqlist;
43
44#define REQUEST_LIST_SIZE 128
45 43
46/********************* SCSI SPECIFIC DEFINES *********************************/ 44/********************* SCSI SPECIFIC DEFINES *********************************/
47#define ZFCP_SCSI_ER_TIMEOUT (10*HZ) 45#define ZFCP_SCSI_ER_TIMEOUT (10*HZ)
@@ -129,12 +127,6 @@ struct zfcp_adapter_mempool {
129 mempool_t *qtcb_pool; 127 mempool_t *qtcb_pool;
130}; 128};
131 129
132struct zfcp_qdio_queue {
133 struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q];
134 u8 first; /* index of next free bfr in queue */
135 atomic_t count; /* number of free buffers in queue */
136};
137
138struct zfcp_erp_action { 130struct zfcp_erp_action {
139 struct list_head list; 131 struct list_head list;
140 int action; /* requested action code */ 132 int action; /* requested action code */
@@ -143,8 +135,7 @@ struct zfcp_erp_action {
143 struct zfcp_unit *unit; 135 struct zfcp_unit *unit;
144 u32 status; /* recovery status */ 136 u32 status; /* recovery status */
145 u32 step; /* active step of this erp action */ 137 u32 step; /* active step of this erp action */
146 struct zfcp_fsf_req *fsf_req; /* fsf request currently pending 138 unsigned long fsf_req_id;
147 for this action */
148 struct timer_list timer; 139 struct timer_list timer;
149}; 140};
150 141
@@ -167,29 +158,6 @@ struct zfcp_latencies {
167 spinlock_t lock; 158 spinlock_t lock;
168}; 159};
169 160
170/** struct zfcp_qdio - basic QDIO data structure
171 * @resp_q: response queue
172 * @req_q: request queue
173 * @stat_lock: lock to protect req_q_util and req_q_time
174 * @req_q_lock; lock to serialize access to request queue
175 * @req_q_time: time of last fill level change
176 * @req_q_util: used for accounting
177 * @req_q_full: queue full incidents
178 * @req_q_wq: used to wait for SBAL availability
179 * @adapter: adapter used in conjunction with this QDIO structure
180 */
181struct zfcp_qdio {
182 struct zfcp_qdio_queue resp_q;
183 struct zfcp_qdio_queue req_q;
184 spinlock_t stat_lock;
185 spinlock_t req_q_lock;
186 unsigned long long req_q_time;
187 u64 req_q_util;
188 atomic_t req_q_full;
189 wait_queue_head_t req_q_wq;
190 struct zfcp_adapter *adapter;
191};
192
193struct zfcp_adapter { 161struct zfcp_adapter {
194 struct kref ref; 162 struct kref ref;
195 u64 peer_wwnn; /* P2P peer WWNN */ 163 u64 peer_wwnn; /* P2P peer WWNN */
@@ -207,8 +175,7 @@ struct zfcp_adapter {
207 struct list_head port_list; /* remote port list */ 175 struct list_head port_list; /* remote port list */
208 rwlock_t port_list_lock; /* port list lock */ 176 rwlock_t port_list_lock; /* port list lock */
209 unsigned long req_no; /* unique FSF req number */ 177 unsigned long req_no; /* unique FSF req number */
210 struct list_head *req_list; /* list of pending reqs */ 178 struct zfcp_reqlist *req_list;
211 spinlock_t req_list_lock; /* request list lock */
212 u32 fsf_req_seq_no; /* FSF cmnd seq number */ 179 u32 fsf_req_seq_no; /* FSF cmnd seq number */
213 rwlock_t abort_lock; /* Protects against SCSI 180 rwlock_t abort_lock; /* Protects against SCSI
214 stack abort/command 181 stack abort/command
@@ -241,7 +208,7 @@ struct zfcp_adapter {
241}; 208};
242 209
243struct zfcp_port { 210struct zfcp_port {
244 struct device sysfs_device; /* sysfs device */ 211 struct device dev;
245 struct fc_rport *rport; /* rport of fc transport class */ 212 struct fc_rport *rport; /* rport of fc transport class */
246 struct list_head list; /* list of remote ports */ 213 struct list_head list; /* list of remote ports */
247 struct zfcp_adapter *adapter; /* adapter used to access port */ 214 struct zfcp_adapter *adapter; /* adapter used to access port */
@@ -263,7 +230,7 @@ struct zfcp_port {
263}; 230};
264 231
265struct zfcp_unit { 232struct zfcp_unit {
266 struct device sysfs_device; /* sysfs device */ 233 struct device dev;
267 struct list_head list; /* list of logical units */ 234 struct list_head list; /* list of logical units */
268 struct zfcp_port *port; /* remote port of unit */ 235 struct zfcp_port *port; /* remote port of unit */
269 atomic_t status; /* status of this logical unit */ 236 atomic_t status; /* status of this logical unit */
@@ -277,33 +244,11 @@ struct zfcp_unit {
277}; 244};
278 245
279/** 246/**
280 * struct zfcp_queue_req - queue related values for a request
281 * @sbal_number: number of free SBALs
282 * @sbal_first: first SBAL for this request
283 * @sbal_last: last SBAL for this request
284 * @sbal_limit: last possible SBAL for this request
285 * @sbale_curr: current SBALE at creation of this request
286 * @sbal_response: SBAL used in interrupt
287 * @qdio_outb_usage: usage of outbound queue
288 * @qdio_inb_usage: usage of inbound queue
289 */
290struct zfcp_queue_req {
291 u8 sbal_number;
292 u8 sbal_first;
293 u8 sbal_last;
294 u8 sbal_limit;
295 u8 sbale_curr;
296 u8 sbal_response;
297 u16 qdio_outb_usage;
298 u16 qdio_inb_usage;
299};
300
301/**
302 * struct zfcp_fsf_req - basic FSF request structure 247 * struct zfcp_fsf_req - basic FSF request structure
303 * @list: list of FSF requests 248 * @list: list of FSF requests
304 * @req_id: unique request ID 249 * @req_id: unique request ID
305 * @adapter: adapter this request belongs to 250 * @adapter: adapter this request belongs to
306 * @queue_req: queue related values 251 * @qdio_req: qdio queue related values
307 * @completion: used to signal the completion of the request 252 * @completion: used to signal the completion of the request
308 * @status: status of the request 253 * @status: status of the request
309 * @fsf_command: FSF command issued 254 * @fsf_command: FSF command issued
@@ -321,7 +266,7 @@ struct zfcp_fsf_req {
321 struct list_head list; 266 struct list_head list;
322 unsigned long req_id; 267 unsigned long req_id;
323 struct zfcp_adapter *adapter; 268 struct zfcp_adapter *adapter;
324 struct zfcp_queue_req queue_req; 269 struct zfcp_qdio_req qdio_req;
325 struct completion completion; 270 struct completion completion;
326 u32 status; 271 u32 status;
327 u32 fsf_command; 272 u32 fsf_command;
@@ -352,45 +297,4 @@ struct zfcp_data {
352#define ZFCP_SET 0x00000100 297#define ZFCP_SET 0x00000100
353#define ZFCP_CLEAR 0x00000200 298#define ZFCP_CLEAR 0x00000200
354 299
355/*
356 * Helper functions for request ID management.
357 */
358static inline int zfcp_reqlist_hash(unsigned long req_id)
359{
360 return req_id % REQUEST_LIST_SIZE;
361}
362
363static inline void zfcp_reqlist_remove(struct zfcp_adapter *adapter,
364 struct zfcp_fsf_req *fsf_req)
365{
366 list_del(&fsf_req->list);
367}
368
369static inline struct zfcp_fsf_req *
370zfcp_reqlist_find(struct zfcp_adapter *adapter, unsigned long req_id)
371{
372 struct zfcp_fsf_req *request;
373 unsigned int idx;
374
375 idx = zfcp_reqlist_hash(req_id);
376 list_for_each_entry(request, &adapter->req_list[idx], list)
377 if (request->req_id == req_id)
378 return request;
379 return NULL;
380}
381
382static inline struct zfcp_fsf_req *
383zfcp_reqlist_find_safe(struct zfcp_adapter *adapter, struct zfcp_fsf_req *req)
384{
385 struct zfcp_fsf_req *request;
386 unsigned int idx;
387
388 for (idx = 0; idx < REQUEST_LIST_SIZE; idx++) {
389 list_for_each_entry(request, &adapter->req_list[idx], list)
390 if (request == req)
391 return request;
392 }
393 return NULL;
394}
395
396#endif /* ZFCP_DEF_H */ 300#endif /* ZFCP_DEF_H */
diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index b51a11a82e63..0be5e7ea2828 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Error Recovery Procedures (ERP). 4 * Error Recovery Procedures (ERP).
5 * 5 *
6 * Copyright IBM Corporation 2002, 2009 6 * Copyright IBM Corporation 2002, 2010
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
@@ -11,6 +11,7 @@
11 11
12#include <linux/kthread.h> 12#include <linux/kthread.h>
13#include "zfcp_ext.h" 13#include "zfcp_ext.h"
14#include "zfcp_reqlist.h"
14 15
15#define ZFCP_MAX_ERPS 3 16#define ZFCP_MAX_ERPS 3
16 17
@@ -174,7 +175,7 @@ static struct zfcp_erp_action *zfcp_erp_setup_act(int need,
174 175
175 switch (need) { 176 switch (need) {
176 case ZFCP_ERP_ACTION_REOPEN_UNIT: 177 case ZFCP_ERP_ACTION_REOPEN_UNIT:
177 if (!get_device(&unit->sysfs_device)) 178 if (!get_device(&unit->dev))
178 return NULL; 179 return NULL;
179 atomic_set_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &unit->status); 180 atomic_set_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &unit->status);
180 erp_action = &unit->erp_action; 181 erp_action = &unit->erp_action;
@@ -184,7 +185,7 @@ static struct zfcp_erp_action *zfcp_erp_setup_act(int need,
184 185
185 case ZFCP_ERP_ACTION_REOPEN_PORT: 186 case ZFCP_ERP_ACTION_REOPEN_PORT:
186 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED: 187 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
187 if (!get_device(&port->sysfs_device)) 188 if (!get_device(&port->dev))
188 return NULL; 189 return NULL;
189 zfcp_erp_action_dismiss_port(port); 190 zfcp_erp_action_dismiss_port(port);
190 atomic_set_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &port->status); 191 atomic_set_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &port->status);
@@ -478,26 +479,27 @@ static void zfcp_erp_action_to_running(struct zfcp_erp_action *erp_action)
478static void zfcp_erp_strategy_check_fsfreq(struct zfcp_erp_action *act) 479static void zfcp_erp_strategy_check_fsfreq(struct zfcp_erp_action *act)
479{ 480{
480 struct zfcp_adapter *adapter = act->adapter; 481 struct zfcp_adapter *adapter = act->adapter;
482 struct zfcp_fsf_req *req;
481 483
482 if (!act->fsf_req) 484 if (!act->fsf_req_id)
483 return; 485 return;
484 486
485 spin_lock(&adapter->req_list_lock); 487 spin_lock(&adapter->req_list->lock);
486 if (zfcp_reqlist_find_safe(adapter, act->fsf_req) && 488 req = _zfcp_reqlist_find(adapter->req_list, act->fsf_req_id);
487 act->fsf_req->erp_action == act) { 489 if (req && req->erp_action == act) {
488 if (act->status & (ZFCP_STATUS_ERP_DISMISSED | 490 if (act->status & (ZFCP_STATUS_ERP_DISMISSED |
489 ZFCP_STATUS_ERP_TIMEDOUT)) { 491 ZFCP_STATUS_ERP_TIMEDOUT)) {
490 act->fsf_req->status |= ZFCP_STATUS_FSFREQ_DISMISSED; 492 req->status |= ZFCP_STATUS_FSFREQ_DISMISSED;
491 zfcp_dbf_rec_action("erscf_1", act); 493 zfcp_dbf_rec_action("erscf_1", act);
492 act->fsf_req->erp_action = NULL; 494 req->erp_action = NULL;
493 } 495 }
494 if (act->status & ZFCP_STATUS_ERP_TIMEDOUT) 496 if (act->status & ZFCP_STATUS_ERP_TIMEDOUT)
495 zfcp_dbf_rec_action("erscf_2", act); 497 zfcp_dbf_rec_action("erscf_2", act);
496 if (act->fsf_req->status & ZFCP_STATUS_FSFREQ_DISMISSED) 498 if (req->status & ZFCP_STATUS_FSFREQ_DISMISSED)
497 act->fsf_req = NULL; 499 act->fsf_req_id = 0;
498 } else 500 } else
499 act->fsf_req = NULL; 501 act->fsf_req_id = 0;
500 spin_unlock(&adapter->req_list_lock); 502 spin_unlock(&adapter->req_list->lock);
501} 503}
502 504
503/** 505/**
@@ -1179,19 +1181,19 @@ static void zfcp_erp_action_cleanup(struct zfcp_erp_action *act, int result)
1179 switch (act->action) { 1181 switch (act->action) {
1180 case ZFCP_ERP_ACTION_REOPEN_UNIT: 1182 case ZFCP_ERP_ACTION_REOPEN_UNIT:
1181 if ((result == ZFCP_ERP_SUCCEEDED) && !unit->device) { 1183 if ((result == ZFCP_ERP_SUCCEEDED) && !unit->device) {
1182 get_device(&unit->sysfs_device); 1184 get_device(&unit->dev);
1183 if (scsi_queue_work(unit->port->adapter->scsi_host, 1185 if (scsi_queue_work(unit->port->adapter->scsi_host,
1184 &unit->scsi_work) <= 0) 1186 &unit->scsi_work) <= 0)
1185 put_device(&unit->sysfs_device); 1187 put_device(&unit->dev);
1186 } 1188 }
1187 put_device(&unit->sysfs_device); 1189 put_device(&unit->dev);
1188 break; 1190 break;
1189 1191
1190 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED: 1192 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
1191 case ZFCP_ERP_ACTION_REOPEN_PORT: 1193 case ZFCP_ERP_ACTION_REOPEN_PORT:
1192 if (result == ZFCP_ERP_SUCCEEDED) 1194 if (result == ZFCP_ERP_SUCCEEDED)
1193 zfcp_scsi_schedule_rport_register(port); 1195 zfcp_scsi_schedule_rport_register(port);
1194 put_device(&port->sysfs_device); 1196 put_device(&port->dev);
1195 break; 1197 break;
1196 1198
1197 case ZFCP_ERP_ACTION_REOPEN_ADAPTER: 1199 case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
diff --git a/drivers/s390/scsi/zfcp_ext.h b/drivers/s390/scsi/zfcp_ext.h
index 66bdb34143cb..8786a79c7f8f 100644
--- a/drivers/s390/scsi/zfcp_ext.h
+++ b/drivers/s390/scsi/zfcp_ext.h
@@ -21,7 +21,6 @@ extern struct zfcp_adapter *zfcp_adapter_enqueue(struct ccw_device *);
21extern struct zfcp_port *zfcp_port_enqueue(struct zfcp_adapter *, u64, u32, 21extern struct zfcp_port *zfcp_port_enqueue(struct zfcp_adapter *, u64, u32,
22 u32); 22 u32);
23extern struct zfcp_unit *zfcp_unit_enqueue(struct zfcp_port *, u64); 23extern struct zfcp_unit *zfcp_unit_enqueue(struct zfcp_port *, u64);
24extern int zfcp_reqlist_isempty(struct zfcp_adapter *);
25extern void zfcp_sg_free_table(struct scatterlist *, int); 24extern void zfcp_sg_free_table(struct scatterlist *, int);
26extern int zfcp_sg_setup_table(struct scatterlist *, int); 25extern int zfcp_sg_setup_table(struct scatterlist *, int);
27extern void zfcp_device_unregister(struct device *, 26extern void zfcp_device_unregister(struct device *,
@@ -144,13 +143,9 @@ extern void zfcp_fsf_reqid_check(struct zfcp_qdio *, int);
144/* zfcp_qdio.c */ 143/* zfcp_qdio.c */
145extern int zfcp_qdio_setup(struct zfcp_adapter *); 144extern int zfcp_qdio_setup(struct zfcp_adapter *);
146extern void zfcp_qdio_destroy(struct zfcp_qdio *); 145extern void zfcp_qdio_destroy(struct zfcp_qdio *);
147extern int zfcp_qdio_send(struct zfcp_qdio *, struct zfcp_queue_req *); 146extern int zfcp_qdio_send(struct zfcp_qdio *, struct zfcp_qdio_req *);
148extern struct qdio_buffer_element
149 *zfcp_qdio_sbale_req(struct zfcp_qdio *, struct zfcp_queue_req *);
150extern struct qdio_buffer_element
151 *zfcp_qdio_sbale_curr(struct zfcp_qdio *, struct zfcp_queue_req *);
152extern int zfcp_qdio_sbals_from_sg(struct zfcp_qdio *, 147extern int zfcp_qdio_sbals_from_sg(struct zfcp_qdio *,
153 struct zfcp_queue_req *, unsigned long, 148 struct zfcp_qdio_req *, unsigned long,
154 struct scatterlist *, int); 149 struct scatterlist *, int);
155extern int zfcp_qdio_open(struct zfcp_qdio *); 150extern int zfcp_qdio_open(struct zfcp_qdio *);
156extern void zfcp_qdio_close(struct zfcp_qdio *); 151extern void zfcp_qdio_close(struct zfcp_qdio *);
diff --git a/drivers/s390/scsi/zfcp_fc.c b/drivers/s390/scsi/zfcp_fc.c
index 271399f62f1b..5219670f0c99 100644
--- a/drivers/s390/scsi/zfcp_fc.c
+++ b/drivers/s390/scsi/zfcp_fc.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Fibre Channel related functions for the zfcp device driver. 4 * Fibre Channel related functions for the zfcp device driver.
5 * 5 *
6 * Copyright IBM Corporation 2008, 2009 6 * Copyright IBM Corporation 2008, 2010
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
@@ -316,7 +316,7 @@ void zfcp_fc_port_did_lookup(struct work_struct *work)
316 316
317 zfcp_erp_port_reopen(port, 0, "fcgpn_3", NULL); 317 zfcp_erp_port_reopen(port, 0, "fcgpn_3", NULL);
318out: 318out:
319 put_device(&port->sysfs_device); 319 put_device(&port->dev);
320} 320}
321 321
322/** 322/**
@@ -325,9 +325,9 @@ out:
325 */ 325 */
326void zfcp_fc_trigger_did_lookup(struct zfcp_port *port) 326void zfcp_fc_trigger_did_lookup(struct zfcp_port *port)
327{ 327{
328 get_device(&port->sysfs_device); 328 get_device(&port->dev);
329 if (!queue_work(port->adapter->work_queue, &port->gid_pn_work)) 329 if (!queue_work(port->adapter->work_queue, &port->gid_pn_work))
330 put_device(&port->sysfs_device); 330 put_device(&port->dev);
331} 331}
332 332
333/** 333/**
@@ -389,7 +389,7 @@ static void zfcp_fc_adisc_handler(void *data)
389 zfcp_scsi_schedule_rport_register(port); 389 zfcp_scsi_schedule_rport_register(port);
390 out: 390 out:
391 atomic_clear_mask(ZFCP_STATUS_PORT_LINK_TEST, &port->status); 391 atomic_clear_mask(ZFCP_STATUS_PORT_LINK_TEST, &port->status);
392 put_device(&port->sysfs_device); 392 put_device(&port->dev);
393 kmem_cache_free(zfcp_data.adisc_cache, adisc); 393 kmem_cache_free(zfcp_data.adisc_cache, adisc);
394} 394}
395 395
@@ -436,7 +436,7 @@ void zfcp_fc_link_test_work(struct work_struct *work)
436 container_of(work, struct zfcp_port, test_link_work); 436 container_of(work, struct zfcp_port, test_link_work);
437 int retval; 437 int retval;
438 438
439 get_device(&port->sysfs_device); 439 get_device(&port->dev);
440 port->rport_task = RPORT_DEL; 440 port->rport_task = RPORT_DEL;
441 zfcp_scsi_rport_work(&port->rport_work); 441 zfcp_scsi_rport_work(&port->rport_work);
442 442
@@ -455,7 +455,7 @@ void zfcp_fc_link_test_work(struct work_struct *work)
455 zfcp_erp_port_forced_reopen(port, 0, "fcltwk1", NULL); 455 zfcp_erp_port_forced_reopen(port, 0, "fcltwk1", NULL);
456 456
457out: 457out:
458 put_device(&port->sysfs_device); 458 put_device(&port->dev);
459} 459}
460 460
461/** 461/**
@@ -468,9 +468,9 @@ out:
468 */ 468 */
469void zfcp_fc_test_link(struct zfcp_port *port) 469void zfcp_fc_test_link(struct zfcp_port *port)
470{ 470{
471 get_device(&port->sysfs_device); 471 get_device(&port->dev);
472 if (!queue_work(port->adapter->work_queue, &port->test_link_work)) 472 if (!queue_work(port->adapter->work_queue, &port->test_link_work))
473 put_device(&port->sysfs_device); 473 put_device(&port->dev);
474} 474}
475 475
476static void zfcp_free_sg_env(struct zfcp_fc_gpn_ft *gpn_ft, int buf_num) 476static void zfcp_free_sg_env(struct zfcp_fc_gpn_ft *gpn_ft, int buf_num)
@@ -617,8 +617,7 @@ static int zfcp_fc_eval_gpn_ft(struct zfcp_fc_gpn_ft *gpn_ft,
617 617
618 list_for_each_entry_safe(port, tmp, &remove_lh, list) { 618 list_for_each_entry_safe(port, tmp, &remove_lh, list) {
619 zfcp_erp_port_shutdown(port, 0, "fcegpf2", NULL); 619 zfcp_erp_port_shutdown(port, 0, "fcegpf2", NULL);
620 zfcp_device_unregister(&port->sysfs_device, 620 zfcp_device_unregister(&port->dev, &zfcp_sysfs_port_attrs);
621 &zfcp_sysfs_port_attrs);
622 } 621 }
623 622
624 return ret; 623 return ret;
@@ -731,7 +730,7 @@ static int zfcp_fc_exec_els_job(struct fc_bsg_job *job,
731 return -EINVAL; 730 return -EINVAL;
732 731
733 d_id = port->d_id; 732 d_id = port->d_id;
734 put_device(&port->sysfs_device); 733 put_device(&port->dev);
735 } else 734 } else
736 d_id = ntoh24(job->request->rqst_data.h_els.port_id); 735 d_id = ntoh24(job->request->rqst_data.h_els.port_id);
737 736
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c
index e8fb4d9baa8b..6538742b421a 100644
--- a/drivers/s390/scsi/zfcp_fsf.c
+++ b/drivers/s390/scsi/zfcp_fsf.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Implementation of FSF commands. 4 * Implementation of FSF commands.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2009 6 * Copyright IBM Corporation 2002, 2010
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
@@ -14,6 +14,8 @@
14#include "zfcp_ext.h" 14#include "zfcp_ext.h"
15#include "zfcp_fc.h" 15#include "zfcp_fc.h"
16#include "zfcp_dbf.h" 16#include "zfcp_dbf.h"
17#include "zfcp_qdio.h"
18#include "zfcp_reqlist.h"
17 19
18static void zfcp_fsf_request_timeout_handler(unsigned long data) 20static void zfcp_fsf_request_timeout_handler(unsigned long data)
19{ 21{
@@ -393,7 +395,7 @@ static void zfcp_fsf_protstatus_eval(struct zfcp_fsf_req *req)
393 case FSF_PROT_LINK_DOWN: 395 case FSF_PROT_LINK_DOWN:
394 zfcp_fsf_link_down_info_eval(req, "fspse_5", 396 zfcp_fsf_link_down_info_eval(req, "fspse_5",
395 &psq->link_down_info); 397 &psq->link_down_info);
396 /* FIXME: reopening adapter now? better wait for link up */ 398 /* go through reopen to flush pending requests */
397 zfcp_erp_adapter_reopen(adapter, 0, "fspse_6", req); 399 zfcp_erp_adapter_reopen(adapter, 0, "fspse_6", req);
398 break; 400 break;
399 case FSF_PROT_REEST_QUEUE: 401 case FSF_PROT_REEST_QUEUE:
@@ -457,15 +459,10 @@ static void zfcp_fsf_req_complete(struct zfcp_fsf_req *req)
457void zfcp_fsf_req_dismiss_all(struct zfcp_adapter *adapter) 459void zfcp_fsf_req_dismiss_all(struct zfcp_adapter *adapter)
458{ 460{
459 struct zfcp_fsf_req *req, *tmp; 461 struct zfcp_fsf_req *req, *tmp;
460 unsigned long flags;
461 LIST_HEAD(remove_queue); 462 LIST_HEAD(remove_queue);
462 unsigned int i;
463 463
464 BUG_ON(atomic_read(&adapter->status) & ZFCP_STATUS_ADAPTER_QDIOUP); 464 BUG_ON(atomic_read(&adapter->status) & ZFCP_STATUS_ADAPTER_QDIOUP);
465 spin_lock_irqsave(&adapter->req_list_lock, flags); 465 zfcp_reqlist_move(adapter->req_list, &remove_queue);
466 for (i = 0; i < REQUEST_LIST_SIZE; i++)
467 list_splice_init(&adapter->req_list[i], &remove_queue);
468 spin_unlock_irqrestore(&adapter->req_list_lock, flags);
469 466
470 list_for_each_entry_safe(req, tmp, &remove_queue, list) { 467 list_for_each_entry_safe(req, tmp, &remove_queue, list) {
471 list_del(&req->list); 468 list_del(&req->list);
@@ -495,8 +492,6 @@ static int zfcp_fsf_exchange_config_evaluate(struct zfcp_fsf_req *req)
495 fc_host_port_id(shost) = ntoh24(bottom->s_id); 492 fc_host_port_id(shost) = ntoh24(bottom->s_id);
496 fc_host_speed(shost) = bottom->fc_link_speed; 493 fc_host_speed(shost) = bottom->fc_link_speed;
497 fc_host_supported_classes(shost) = FC_COS_CLASS2 | FC_COS_CLASS3; 494 fc_host_supported_classes(shost) = FC_COS_CLASS2 | FC_COS_CLASS3;
498 fc_host_supported_fc4s(shost)[2] = 1; /* FCP */
499 fc_host_active_fc4s(shost)[2] = 1; /* FCP */
500 495
501 adapter->hydra_version = bottom->adapter_type; 496 adapter->hydra_version = bottom->adapter_type;
502 adapter->timer_ticks = bottom->timer_interval; 497 adapter->timer_ticks = bottom->timer_interval;
@@ -619,6 +614,10 @@ static void zfcp_fsf_exchange_port_evaluate(struct zfcp_fsf_req *req)
619 fc_host_permanent_port_name(shost) = fc_host_port_name(shost); 614 fc_host_permanent_port_name(shost) = fc_host_port_name(shost);
620 fc_host_maxframe_size(shost) = bottom->maximum_frame_size; 615 fc_host_maxframe_size(shost) = bottom->maximum_frame_size;
621 fc_host_supported_speeds(shost) = bottom->supported_speed; 616 fc_host_supported_speeds(shost) = bottom->supported_speed;
617 memcpy(fc_host_supported_fc4s(shost), bottom->supported_fc4_types,
618 FC_FC4_LIST_SIZE);
619 memcpy(fc_host_active_fc4s(shost), bottom->active_fc4_types,
620 FC_FC4_LIST_SIZE);
622} 621}
623 622
624static void zfcp_fsf_exchange_port_data_handler(struct zfcp_fsf_req *req) 623static void zfcp_fsf_exchange_port_data_handler(struct zfcp_fsf_req *req)
@@ -725,12 +724,12 @@ static struct zfcp_fsf_req *zfcp_fsf_req_create(struct zfcp_qdio *qdio,
725 req->adapter = adapter; 724 req->adapter = adapter;
726 req->fsf_command = fsf_cmd; 725 req->fsf_command = fsf_cmd;
727 req->req_id = adapter->req_no; 726 req->req_id = adapter->req_no;
728 req->queue_req.sbal_number = 1; 727 req->qdio_req.sbal_number = 1;
729 req->queue_req.sbal_first = req_q->first; 728 req->qdio_req.sbal_first = req_q->first;
730 req->queue_req.sbal_last = req_q->first; 729 req->qdio_req.sbal_last = req_q->first;
731 req->queue_req.sbale_curr = 1; 730 req->qdio_req.sbale_curr = 1;
732 731
733 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 732 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
734 sbale[0].addr = (void *) req->req_id; 733 sbale[0].addr = (void *) req->req_id;
735 sbale[0].flags |= SBAL_FLAGS0_COMMAND; 734 sbale[0].flags |= SBAL_FLAGS0_COMMAND;
736 735
@@ -745,6 +744,7 @@ static struct zfcp_fsf_req *zfcp_fsf_req_create(struct zfcp_qdio *qdio,
745 return ERR_PTR(-ENOMEM); 744 return ERR_PTR(-ENOMEM);
746 } 745 }
747 746
747 req->seq_no = adapter->fsf_req_seq_no;
748 req->qtcb->prefix.req_seq_no = adapter->fsf_req_seq_no; 748 req->qtcb->prefix.req_seq_no = adapter->fsf_req_seq_no;
749 req->qtcb->prefix.req_id = req->req_id; 749 req->qtcb->prefix.req_id = req->req_id;
750 req->qtcb->prefix.ulp_info = 26; 750 req->qtcb->prefix.ulp_info = 26;
@@ -752,8 +752,6 @@ static struct zfcp_fsf_req *zfcp_fsf_req_create(struct zfcp_qdio *qdio,
752 req->qtcb->prefix.qtcb_version = FSF_QTCB_CURRENT_VERSION; 752 req->qtcb->prefix.qtcb_version = FSF_QTCB_CURRENT_VERSION;
753 req->qtcb->header.req_handle = req->req_id; 753 req->qtcb->header.req_handle = req->req_id;
754 req->qtcb->header.fsf_command = req->fsf_command; 754 req->qtcb->header.fsf_command = req->fsf_command;
755 req->seq_no = adapter->fsf_req_seq_no;
756 req->qtcb->prefix.req_seq_no = adapter->fsf_req_seq_no;
757 sbale[1].addr = (void *) req->qtcb; 755 sbale[1].addr = (void *) req->qtcb;
758 sbale[1].length = sizeof(struct fsf_qtcb); 756 sbale[1].length = sizeof(struct fsf_qtcb);
759 } 757 }
@@ -770,25 +768,17 @@ static int zfcp_fsf_req_send(struct zfcp_fsf_req *req)
770{ 768{
771 struct zfcp_adapter *adapter = req->adapter; 769 struct zfcp_adapter *adapter = req->adapter;
772 struct zfcp_qdio *qdio = adapter->qdio; 770 struct zfcp_qdio *qdio = adapter->qdio;
773 unsigned long flags; 771 int with_qtcb = (req->qtcb != NULL);
774 int idx; 772 int req_id = req->req_id;
775 int with_qtcb = (req->qtcb != NULL);
776 773
777 /* put allocated FSF request into hash table */ 774 zfcp_reqlist_add(adapter->req_list, req);
778 spin_lock_irqsave(&adapter->req_list_lock, flags);
779 idx = zfcp_reqlist_hash(req->req_id);
780 list_add_tail(&req->list, &adapter->req_list[idx]);
781 spin_unlock_irqrestore(&adapter->req_list_lock, flags);
782 775
783 req->queue_req.qdio_outb_usage = atomic_read(&qdio->req_q.count); 776 req->qdio_req.qdio_outb_usage = atomic_read(&qdio->req_q.count);
784 req->issued = get_clock(); 777 req->issued = get_clock();
785 if (zfcp_qdio_send(qdio, &req->queue_req)) { 778 if (zfcp_qdio_send(qdio, &req->qdio_req)) {
786 del_timer(&req->timer); 779 del_timer(&req->timer);
787 spin_lock_irqsave(&adapter->req_list_lock, flags);
788 /* lookup request again, list might have changed */ 780 /* lookup request again, list might have changed */
789 if (zfcp_reqlist_find_safe(adapter, req)) 781 zfcp_reqlist_find_rm(adapter->req_list, req_id);
790 zfcp_reqlist_remove(adapter, req);
791 spin_unlock_irqrestore(&adapter->req_list_lock, flags);
792 zfcp_erp_adapter_reopen(adapter, 0, "fsrs__1", req); 782 zfcp_erp_adapter_reopen(adapter, 0, "fsrs__1", req);
793 return -EIO; 783 return -EIO;
794 } 784 }
@@ -826,9 +816,9 @@ int zfcp_fsf_status_read(struct zfcp_qdio *qdio)
826 goto out; 816 goto out;
827 } 817 }
828 818
829 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 819 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
830 sbale[2].flags |= SBAL_FLAGS_LAST_ENTRY; 820 sbale[2].flags |= SBAL_FLAGS_LAST_ENTRY;
831 req->queue_req.sbale_curr = 2; 821 req->qdio_req.sbale_curr = 2;
832 822
833 sr_buf = mempool_alloc(adapter->pool.status_read_data, GFP_ATOMIC); 823 sr_buf = mempool_alloc(adapter->pool.status_read_data, GFP_ATOMIC);
834 if (!sr_buf) { 824 if (!sr_buf) {
@@ -837,7 +827,7 @@ int zfcp_fsf_status_read(struct zfcp_qdio *qdio)
837 } 827 }
838 memset(sr_buf, 0, sizeof(*sr_buf)); 828 memset(sr_buf, 0, sizeof(*sr_buf));
839 req->data = sr_buf; 829 req->data = sr_buf;
840 sbale = zfcp_qdio_sbale_curr(qdio, &req->queue_req); 830 sbale = zfcp_qdio_sbale_curr(qdio, &req->qdio_req);
841 sbale->addr = (void *) sr_buf; 831 sbale->addr = (void *) sr_buf;
842 sbale->length = sizeof(*sr_buf); 832 sbale->length = sizeof(*sr_buf);
843 833
@@ -934,7 +924,7 @@ struct zfcp_fsf_req *zfcp_fsf_abort_fcp_command(unsigned long old_req_id,
934 ZFCP_STATUS_COMMON_UNBLOCKED))) 924 ZFCP_STATUS_COMMON_UNBLOCKED)))
935 goto out_error_free; 925 goto out_error_free;
936 926
937 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 927 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
938 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 928 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
939 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 929 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
940 930
@@ -1029,7 +1019,7 @@ static int zfcp_fsf_setup_ct_els_sbals(struct zfcp_fsf_req *req,
1029{ 1019{
1030 struct zfcp_adapter *adapter = req->adapter; 1020 struct zfcp_adapter *adapter = req->adapter;
1031 struct qdio_buffer_element *sbale = zfcp_qdio_sbale_req(adapter->qdio, 1021 struct qdio_buffer_element *sbale = zfcp_qdio_sbale_req(adapter->qdio,
1032 &req->queue_req); 1022 &req->qdio_req);
1033 u32 feat = adapter->adapter_features; 1023 u32 feat = adapter->adapter_features;
1034 int bytes; 1024 int bytes;
1035 1025
@@ -1047,15 +1037,15 @@ static int zfcp_fsf_setup_ct_els_sbals(struct zfcp_fsf_req *req,
1047 return 0; 1037 return 0;
1048 } 1038 }
1049 1039
1050 bytes = zfcp_qdio_sbals_from_sg(adapter->qdio, &req->queue_req, 1040 bytes = zfcp_qdio_sbals_from_sg(adapter->qdio, &req->qdio_req,
1051 SBAL_FLAGS0_TYPE_WRITE_READ, 1041 SBAL_FLAGS0_TYPE_WRITE_READ,
1052 sg_req, max_sbals); 1042 sg_req, max_sbals);
1053 if (bytes <= 0) 1043 if (bytes <= 0)
1054 return -EIO; 1044 return -EIO;
1055 req->qtcb->bottom.support.req_buf_length = bytes; 1045 req->qtcb->bottom.support.req_buf_length = bytes;
1056 req->queue_req.sbale_curr = ZFCP_LAST_SBALE_PER_SBAL; 1046 req->qdio_req.sbale_curr = ZFCP_LAST_SBALE_PER_SBAL;
1057 1047
1058 bytes = zfcp_qdio_sbals_from_sg(adapter->qdio, &req->queue_req, 1048 bytes = zfcp_qdio_sbals_from_sg(adapter->qdio, &req->qdio_req,
1059 SBAL_FLAGS0_TYPE_WRITE_READ, 1049 SBAL_FLAGS0_TYPE_WRITE_READ,
1060 sg_resp, max_sbals); 1050 sg_resp, max_sbals);
1061 req->qtcb->bottom.support.resp_buf_length = bytes; 1051 req->qtcb->bottom.support.resp_buf_length = bytes;
@@ -1251,7 +1241,7 @@ int zfcp_fsf_exchange_config_data(struct zfcp_erp_action *erp_action)
1251 } 1241 }
1252 1242
1253 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 1243 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
1254 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 1244 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
1255 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 1245 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
1256 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 1246 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
1257 1247
@@ -1262,13 +1252,13 @@ int zfcp_fsf_exchange_config_data(struct zfcp_erp_action *erp_action)
1262 FSF_FEATURE_UPDATE_ALERT; 1252 FSF_FEATURE_UPDATE_ALERT;
1263 req->erp_action = erp_action; 1253 req->erp_action = erp_action;
1264 req->handler = zfcp_fsf_exchange_config_data_handler; 1254 req->handler = zfcp_fsf_exchange_config_data_handler;
1265 erp_action->fsf_req = req; 1255 erp_action->fsf_req_id = req->req_id;
1266 1256
1267 zfcp_fsf_start_erp_timer(req); 1257 zfcp_fsf_start_erp_timer(req);
1268 retval = zfcp_fsf_req_send(req); 1258 retval = zfcp_fsf_req_send(req);
1269 if (retval) { 1259 if (retval) {
1270 zfcp_fsf_req_free(req); 1260 zfcp_fsf_req_free(req);
1271 erp_action->fsf_req = NULL; 1261 erp_action->fsf_req_id = 0;
1272 } 1262 }
1273out: 1263out:
1274 spin_unlock_bh(&qdio->req_q_lock); 1264 spin_unlock_bh(&qdio->req_q_lock);
@@ -1293,7 +1283,7 @@ int zfcp_fsf_exchange_config_data_sync(struct zfcp_qdio *qdio,
1293 goto out_unlock; 1283 goto out_unlock;
1294 } 1284 }
1295 1285
1296 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 1286 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
1297 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 1287 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
1298 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 1288 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
1299 req->handler = zfcp_fsf_exchange_config_data_handler; 1289 req->handler = zfcp_fsf_exchange_config_data_handler;
@@ -1349,19 +1339,19 @@ int zfcp_fsf_exchange_port_data(struct zfcp_erp_action *erp_action)
1349 } 1339 }
1350 1340
1351 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 1341 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
1352 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 1342 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
1353 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 1343 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
1354 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 1344 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
1355 1345
1356 req->handler = zfcp_fsf_exchange_port_data_handler; 1346 req->handler = zfcp_fsf_exchange_port_data_handler;
1357 req->erp_action = erp_action; 1347 req->erp_action = erp_action;
1358 erp_action->fsf_req = req; 1348 erp_action->fsf_req_id = req->req_id;
1359 1349
1360 zfcp_fsf_start_erp_timer(req); 1350 zfcp_fsf_start_erp_timer(req);
1361 retval = zfcp_fsf_req_send(req); 1351 retval = zfcp_fsf_req_send(req);
1362 if (retval) { 1352 if (retval) {
1363 zfcp_fsf_req_free(req); 1353 zfcp_fsf_req_free(req);
1364 erp_action->fsf_req = NULL; 1354 erp_action->fsf_req_id = 0;
1365 } 1355 }
1366out: 1356out:
1367 spin_unlock_bh(&qdio->req_q_lock); 1357 spin_unlock_bh(&qdio->req_q_lock);
@@ -1398,7 +1388,7 @@ int zfcp_fsf_exchange_port_data_sync(struct zfcp_qdio *qdio,
1398 if (data) 1388 if (data)
1399 req->data = data; 1389 req->data = data;
1400 1390
1401 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 1391 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
1402 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 1392 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
1403 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 1393 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
1404 1394
@@ -1484,7 +1474,7 @@ static void zfcp_fsf_open_port_handler(struct zfcp_fsf_req *req)
1484 } 1474 }
1485 1475
1486out: 1476out:
1487 put_device(&port->sysfs_device); 1477 put_device(&port->dev);
1488} 1478}
1489 1479
1490/** 1480/**
@@ -1513,7 +1503,7 @@ int zfcp_fsf_open_port(struct zfcp_erp_action *erp_action)
1513 } 1503 }
1514 1504
1515 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 1505 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
1516 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 1506 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
1517 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 1507 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
1518 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 1508 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
1519 1509
@@ -1521,15 +1511,15 @@ int zfcp_fsf_open_port(struct zfcp_erp_action *erp_action)
1521 hton24(req->qtcb->bottom.support.d_id, port->d_id); 1511 hton24(req->qtcb->bottom.support.d_id, port->d_id);
1522 req->data = port; 1512 req->data = port;
1523 req->erp_action = erp_action; 1513 req->erp_action = erp_action;
1524 erp_action->fsf_req = req; 1514 erp_action->fsf_req_id = req->req_id;
1525 get_device(&port->sysfs_device); 1515 get_device(&port->dev);
1526 1516
1527 zfcp_fsf_start_erp_timer(req); 1517 zfcp_fsf_start_erp_timer(req);
1528 retval = zfcp_fsf_req_send(req); 1518 retval = zfcp_fsf_req_send(req);
1529 if (retval) { 1519 if (retval) {
1530 zfcp_fsf_req_free(req); 1520 zfcp_fsf_req_free(req);
1531 erp_action->fsf_req = NULL; 1521 erp_action->fsf_req_id = 0;
1532 put_device(&port->sysfs_device); 1522 put_device(&port->dev);
1533 } 1523 }
1534out: 1524out:
1535 spin_unlock_bh(&qdio->req_q_lock); 1525 spin_unlock_bh(&qdio->req_q_lock);
@@ -1583,7 +1573,7 @@ int zfcp_fsf_close_port(struct zfcp_erp_action *erp_action)
1583 } 1573 }
1584 1574
1585 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 1575 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
1586 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 1576 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
1587 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 1577 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
1588 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 1578 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
1589 1579
@@ -1591,13 +1581,13 @@ int zfcp_fsf_close_port(struct zfcp_erp_action *erp_action)
1591 req->data = erp_action->port; 1581 req->data = erp_action->port;
1592 req->erp_action = erp_action; 1582 req->erp_action = erp_action;
1593 req->qtcb->header.port_handle = erp_action->port->handle; 1583 req->qtcb->header.port_handle = erp_action->port->handle;
1594 erp_action->fsf_req = req; 1584 erp_action->fsf_req_id = req->req_id;
1595 1585
1596 zfcp_fsf_start_erp_timer(req); 1586 zfcp_fsf_start_erp_timer(req);
1597 retval = zfcp_fsf_req_send(req); 1587 retval = zfcp_fsf_req_send(req);
1598 if (retval) { 1588 if (retval) {
1599 zfcp_fsf_req_free(req); 1589 zfcp_fsf_req_free(req);
1600 erp_action->fsf_req = NULL; 1590 erp_action->fsf_req_id = 0;
1601 } 1591 }
1602out: 1592out:
1603 spin_unlock_bh(&qdio->req_q_lock); 1593 spin_unlock_bh(&qdio->req_q_lock);
@@ -1660,7 +1650,7 @@ int zfcp_fsf_open_wka_port(struct zfcp_fc_wka_port *wka_port)
1660 } 1650 }
1661 1651
1662 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 1652 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
1663 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 1653 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
1664 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 1654 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
1665 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 1655 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
1666 1656
@@ -1715,7 +1705,7 @@ int zfcp_fsf_close_wka_port(struct zfcp_fc_wka_port *wka_port)
1715 } 1705 }
1716 1706
1717 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 1707 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
1718 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 1708 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
1719 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 1709 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
1720 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 1710 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
1721 1711
@@ -1809,7 +1799,7 @@ int zfcp_fsf_close_physical_port(struct zfcp_erp_action *erp_action)
1809 } 1799 }
1810 1800
1811 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 1801 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
1812 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 1802 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
1813 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 1803 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
1814 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 1804 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
1815 1805
@@ -1817,13 +1807,13 @@ int zfcp_fsf_close_physical_port(struct zfcp_erp_action *erp_action)
1817 req->qtcb->header.port_handle = erp_action->port->handle; 1807 req->qtcb->header.port_handle = erp_action->port->handle;
1818 req->erp_action = erp_action; 1808 req->erp_action = erp_action;
1819 req->handler = zfcp_fsf_close_physical_port_handler; 1809 req->handler = zfcp_fsf_close_physical_port_handler;
1820 erp_action->fsf_req = req; 1810 erp_action->fsf_req_id = req->req_id;
1821 1811
1822 zfcp_fsf_start_erp_timer(req); 1812 zfcp_fsf_start_erp_timer(req);
1823 retval = zfcp_fsf_req_send(req); 1813 retval = zfcp_fsf_req_send(req);
1824 if (retval) { 1814 if (retval) {
1825 zfcp_fsf_req_free(req); 1815 zfcp_fsf_req_free(req);
1826 erp_action->fsf_req = NULL; 1816 erp_action->fsf_req_id = 0;
1827 } 1817 }
1828out: 1818out:
1829 spin_unlock_bh(&qdio->req_q_lock); 1819 spin_unlock_bh(&qdio->req_q_lock);
@@ -1982,7 +1972,7 @@ int zfcp_fsf_open_unit(struct zfcp_erp_action *erp_action)
1982 } 1972 }
1983 1973
1984 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 1974 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
1985 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 1975 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
1986 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 1976 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
1987 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 1977 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
1988 1978
@@ -1991,7 +1981,7 @@ int zfcp_fsf_open_unit(struct zfcp_erp_action *erp_action)
1991 req->handler = zfcp_fsf_open_unit_handler; 1981 req->handler = zfcp_fsf_open_unit_handler;
1992 req->data = erp_action->unit; 1982 req->data = erp_action->unit;
1993 req->erp_action = erp_action; 1983 req->erp_action = erp_action;
1994 erp_action->fsf_req = req; 1984 erp_action->fsf_req_id = req->req_id;
1995 1985
1996 if (!(adapter->connection_features & FSF_FEATURE_NPIV_MODE)) 1986 if (!(adapter->connection_features & FSF_FEATURE_NPIV_MODE))
1997 req->qtcb->bottom.support.option = FSF_OPEN_LUN_SUPPRESS_BOXING; 1987 req->qtcb->bottom.support.option = FSF_OPEN_LUN_SUPPRESS_BOXING;
@@ -2000,7 +1990,7 @@ int zfcp_fsf_open_unit(struct zfcp_erp_action *erp_action)
2000 retval = zfcp_fsf_req_send(req); 1990 retval = zfcp_fsf_req_send(req);
2001 if (retval) { 1991 if (retval) {
2002 zfcp_fsf_req_free(req); 1992 zfcp_fsf_req_free(req);
2003 erp_action->fsf_req = NULL; 1993 erp_action->fsf_req_id = 0;
2004 } 1994 }
2005out: 1995out:
2006 spin_unlock_bh(&qdio->req_q_lock); 1996 spin_unlock_bh(&qdio->req_q_lock);
@@ -2068,7 +2058,7 @@ int zfcp_fsf_close_unit(struct zfcp_erp_action *erp_action)
2068 } 2058 }
2069 2059
2070 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 2060 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
2071 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 2061 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
2072 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ; 2062 sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
2073 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 2063 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
2074 2064
@@ -2077,13 +2067,13 @@ int zfcp_fsf_close_unit(struct zfcp_erp_action *erp_action)
2077 req->handler = zfcp_fsf_close_unit_handler; 2067 req->handler = zfcp_fsf_close_unit_handler;
2078 req->data = erp_action->unit; 2068 req->data = erp_action->unit;
2079 req->erp_action = erp_action; 2069 req->erp_action = erp_action;
2080 erp_action->fsf_req = req; 2070 erp_action->fsf_req_id = req->req_id;
2081 2071
2082 zfcp_fsf_start_erp_timer(req); 2072 zfcp_fsf_start_erp_timer(req);
2083 retval = zfcp_fsf_req_send(req); 2073 retval = zfcp_fsf_req_send(req);
2084 if (retval) { 2074 if (retval) {
2085 zfcp_fsf_req_free(req); 2075 zfcp_fsf_req_free(req);
2086 erp_action->fsf_req = NULL; 2076 erp_action->fsf_req_id = 0;
2087 } 2077 }
2088out: 2078out:
2089 spin_unlock_bh(&qdio->req_q_lock); 2079 spin_unlock_bh(&qdio->req_q_lock);
@@ -2111,8 +2101,8 @@ static void zfcp_fsf_req_trace(struct zfcp_fsf_req *req, struct scsi_cmnd *scsi)
2111 blktrc.magic = ZFCP_BLK_DRV_DATA_MAGIC; 2101 blktrc.magic = ZFCP_BLK_DRV_DATA_MAGIC;
2112 if (req->status & ZFCP_STATUS_FSFREQ_ERROR) 2102 if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
2113 blktrc.flags |= ZFCP_BLK_REQ_ERROR; 2103 blktrc.flags |= ZFCP_BLK_REQ_ERROR;
2114 blktrc.inb_usage = req->queue_req.qdio_inb_usage; 2104 blktrc.inb_usage = req->qdio_req.qdio_inb_usage;
2115 blktrc.outb_usage = req->queue_req.qdio_outb_usage; 2105 blktrc.outb_usage = req->qdio_req.qdio_outb_usage;
2116 2106
2117 if (req->adapter->adapter_features & FSF_FEATURE_MEASUREMENT_DATA) { 2107 if (req->adapter->adapter_features & FSF_FEATURE_MEASUREMENT_DATA) {
2118 blktrc.flags |= ZFCP_BLK_LAT_VALID; 2108 blktrc.flags |= ZFCP_BLK_LAT_VALID;
@@ -2169,12 +2159,7 @@ static void zfcp_fsf_send_fcp_command_task_handler(struct zfcp_fsf_req *req)
2169 zfcp_fsf_req_trace(req, scpnt); 2159 zfcp_fsf_req_trace(req, scpnt);
2170 2160
2171skip_fsfstatus: 2161skip_fsfstatus:
2172 if (scpnt->result != 0) 2162 zfcp_dbf_scsi_result(req->adapter->dbf, scpnt, req);
2173 zfcp_dbf_scsi_result("erro", 3, req->adapter->dbf, scpnt, req);
2174 else if (scpnt->retries > 0)
2175 zfcp_dbf_scsi_result("retr", 4, req->adapter->dbf, scpnt, req);
2176 else
2177 zfcp_dbf_scsi_result("norm", 6, req->adapter->dbf, scpnt, req);
2178 2163
2179 scpnt->host_scribble = NULL; 2164 scpnt->host_scribble = NULL;
2180 (scpnt->scsi_done) (scpnt); 2165 (scpnt->scsi_done) (scpnt);
@@ -2274,7 +2259,7 @@ skip_fsfstatus:
2274 else { 2259 else {
2275 zfcp_fsf_send_fcp_command_task_handler(req); 2260 zfcp_fsf_send_fcp_command_task_handler(req);
2276 req->unit = NULL; 2261 req->unit = NULL;
2277 put_device(&unit->sysfs_device); 2262 put_device(&unit->dev);
2278 } 2263 }
2279} 2264}
2280 2265
@@ -2312,7 +2297,7 @@ int zfcp_fsf_send_fcp_command_task(struct zfcp_unit *unit,
2312 } 2297 }
2313 2298
2314 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 2299 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
2315 get_device(&unit->sysfs_device); 2300 get_device(&unit->dev);
2316 req->unit = unit; 2301 req->unit = unit;
2317 req->data = scsi_cmnd; 2302 req->data = scsi_cmnd;
2318 req->handler = zfcp_fsf_send_fcp_command_handler; 2303 req->handler = zfcp_fsf_send_fcp_command_handler;
@@ -2346,11 +2331,11 @@ int zfcp_fsf_send_fcp_command_task(struct zfcp_unit *unit,
2346 fcp_cmnd = (struct fcp_cmnd *) &req->qtcb->bottom.io.fcp_cmnd; 2331 fcp_cmnd = (struct fcp_cmnd *) &req->qtcb->bottom.io.fcp_cmnd;
2347 zfcp_fc_scsi_to_fcp(fcp_cmnd, scsi_cmnd); 2332 zfcp_fc_scsi_to_fcp(fcp_cmnd, scsi_cmnd);
2348 2333
2349 real_bytes = zfcp_qdio_sbals_from_sg(qdio, &req->queue_req, sbtype, 2334 real_bytes = zfcp_qdio_sbals_from_sg(qdio, &req->qdio_req, sbtype,
2350 scsi_sglist(scsi_cmnd), 2335 scsi_sglist(scsi_cmnd),
2351 FSF_MAX_SBALS_PER_REQ); 2336 FSF_MAX_SBALS_PER_REQ);
2352 if (unlikely(real_bytes < 0)) { 2337 if (unlikely(real_bytes < 0)) {
2353 if (req->queue_req.sbal_number >= FSF_MAX_SBALS_PER_REQ) { 2338 if (req->qdio_req.sbal_number >= FSF_MAX_SBALS_PER_REQ) {
2354 dev_err(&adapter->ccw_device->dev, 2339 dev_err(&adapter->ccw_device->dev,
2355 "Oversize data package, unit 0x%016Lx " 2340 "Oversize data package, unit 0x%016Lx "
2356 "on port 0x%016Lx closed\n", 2341 "on port 0x%016Lx closed\n",
@@ -2369,7 +2354,7 @@ int zfcp_fsf_send_fcp_command_task(struct zfcp_unit *unit,
2369 goto out; 2354 goto out;
2370 2355
2371failed_scsi_cmnd: 2356failed_scsi_cmnd:
2372 put_device(&unit->sysfs_device); 2357 put_device(&unit->dev);
2373 zfcp_fsf_req_free(req); 2358 zfcp_fsf_req_free(req);
2374 scsi_cmnd->host_scribble = NULL; 2359 scsi_cmnd->host_scribble = NULL;
2375out: 2360out:
@@ -2415,7 +2400,7 @@ struct zfcp_fsf_req *zfcp_fsf_send_fcp_ctm(struct zfcp_unit *unit, u8 tm_flags)
2415 req->qtcb->bottom.io.service_class = FSF_CLASS_3; 2400 req->qtcb->bottom.io.service_class = FSF_CLASS_3;
2416 req->qtcb->bottom.io.fcp_cmnd_length = FCP_CMND_LEN; 2401 req->qtcb->bottom.io.fcp_cmnd_length = FCP_CMND_LEN;
2417 2402
2418 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 2403 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
2419 sbale[0].flags |= SBAL_FLAGS0_TYPE_WRITE; 2404 sbale[0].flags |= SBAL_FLAGS0_TYPE_WRITE;
2420 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY; 2405 sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
2421 2406
@@ -2478,14 +2463,14 @@ struct zfcp_fsf_req *zfcp_fsf_control_file(struct zfcp_adapter *adapter,
2478 2463
2479 req->handler = zfcp_fsf_control_file_handler; 2464 req->handler = zfcp_fsf_control_file_handler;
2480 2465
2481 sbale = zfcp_qdio_sbale_req(qdio, &req->queue_req); 2466 sbale = zfcp_qdio_sbale_req(qdio, &req->qdio_req);
2482 sbale[0].flags |= direction; 2467 sbale[0].flags |= direction;
2483 2468
2484 bottom = &req->qtcb->bottom.support; 2469 bottom = &req->qtcb->bottom.support;
2485 bottom->operation_subtype = FSF_CFDC_OPERATION_SUBTYPE; 2470 bottom->operation_subtype = FSF_CFDC_OPERATION_SUBTYPE;
2486 bottom->option = fsf_cfdc->option; 2471 bottom->option = fsf_cfdc->option;
2487 2472
2488 bytes = zfcp_qdio_sbals_from_sg(qdio, &req->queue_req, 2473 bytes = zfcp_qdio_sbals_from_sg(qdio, &req->qdio_req,
2489 direction, fsf_cfdc->sg, 2474 direction, fsf_cfdc->sg,
2490 FSF_MAX_SBALS_PER_REQ); 2475 FSF_MAX_SBALS_PER_REQ);
2491 if (bytes != ZFCP_CFDC_MAX_SIZE) { 2476 if (bytes != ZFCP_CFDC_MAX_SIZE) {
@@ -2516,15 +2501,14 @@ void zfcp_fsf_reqid_check(struct zfcp_qdio *qdio, int sbal_idx)
2516 struct qdio_buffer *sbal = qdio->resp_q.sbal[sbal_idx]; 2501 struct qdio_buffer *sbal = qdio->resp_q.sbal[sbal_idx];
2517 struct qdio_buffer_element *sbale; 2502 struct qdio_buffer_element *sbale;
2518 struct zfcp_fsf_req *fsf_req; 2503 struct zfcp_fsf_req *fsf_req;
2519 unsigned long flags, req_id; 2504 unsigned long req_id;
2520 int idx; 2505 int idx;
2521 2506
2522 for (idx = 0; idx < QDIO_MAX_ELEMENTS_PER_BUFFER; idx++) { 2507 for (idx = 0; idx < QDIO_MAX_ELEMENTS_PER_BUFFER; idx++) {
2523 2508
2524 sbale = &sbal->element[idx]; 2509 sbale = &sbal->element[idx];
2525 req_id = (unsigned long) sbale->addr; 2510 req_id = (unsigned long) sbale->addr;
2526 spin_lock_irqsave(&adapter->req_list_lock, flags); 2511 fsf_req = zfcp_reqlist_find_rm(adapter->req_list, req_id);
2527 fsf_req = zfcp_reqlist_find(adapter, req_id);
2528 2512
2529 if (!fsf_req) 2513 if (!fsf_req)
2530 /* 2514 /*
@@ -2534,11 +2518,8 @@ void zfcp_fsf_reqid_check(struct zfcp_qdio *qdio, int sbal_idx)
2534 panic("error: unknown req_id (%lx) on adapter %s.\n", 2518 panic("error: unknown req_id (%lx) on adapter %s.\n",
2535 req_id, dev_name(&adapter->ccw_device->dev)); 2519 req_id, dev_name(&adapter->ccw_device->dev));
2536 2520
2537 list_del(&fsf_req->list); 2521 fsf_req->qdio_req.sbal_response = sbal_idx;
2538 spin_unlock_irqrestore(&adapter->req_list_lock, flags); 2522 fsf_req->qdio_req.qdio_inb_usage =
2539
2540 fsf_req->queue_req.sbal_response = sbal_idx;
2541 fsf_req->queue_req.qdio_inb_usage =
2542 atomic_read(&qdio->resp_q.count); 2523 atomic_read(&qdio->resp_q.count);
2543 zfcp_fsf_req_complete(fsf_req); 2524 zfcp_fsf_req_complete(fsf_req);
2544 2525
diff --git a/drivers/s390/scsi/zfcp_qdio.c b/drivers/s390/scsi/zfcp_qdio.c
index 6c5228b627fc..71b97ff77cf0 100644
--- a/drivers/s390/scsi/zfcp_qdio.c
+++ b/drivers/s390/scsi/zfcp_qdio.c
@@ -10,6 +10,7 @@
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11 11
12#include "zfcp_ext.h" 12#include "zfcp_ext.h"
13#include "zfcp_qdio.h"
13 14
14#define QBUFF_PER_PAGE (PAGE_SIZE / sizeof(struct qdio_buffer)) 15#define QBUFF_PER_PAGE (PAGE_SIZE / sizeof(struct qdio_buffer))
15 16
@@ -28,12 +29,6 @@ static int zfcp_qdio_buffers_enqueue(struct qdio_buffer **sbal)
28 return 0; 29 return 0;
29} 30}
30 31
31static struct qdio_buffer_element *
32zfcp_qdio_sbale(struct zfcp_qdio_queue *q, int sbal_idx, int sbale_idx)
33{
34 return &q->sbal[sbal_idx]->element[sbale_idx];
35}
36
37static void zfcp_qdio_handler_error(struct zfcp_qdio *qdio, char *id) 32static void zfcp_qdio_handler_error(struct zfcp_qdio *qdio, char *id)
38{ 33{
39 struct zfcp_adapter *adapter = qdio->adapter; 34 struct zfcp_adapter *adapter = qdio->adapter;
@@ -106,7 +101,7 @@ static void zfcp_qdio_resp_put_back(struct zfcp_qdio *qdio, int processed)
106 101
107 if (unlikely(retval)) { 102 if (unlikely(retval)) {
108 atomic_set(&queue->count, count); 103 atomic_set(&queue->count, count);
109 /* FIXME: Recover this with an adapter reopen? */ 104 zfcp_erp_adapter_reopen(qdio->adapter, 0, "qdrpb_1", NULL);
110 } else { 105 } else {
111 queue->first += count; 106 queue->first += count;
112 queue->first %= QDIO_MAX_BUFFERS_PER_Q; 107 queue->first %= QDIO_MAX_BUFFERS_PER_Q;
@@ -145,32 +140,8 @@ static void zfcp_qdio_int_resp(struct ccw_device *cdev, unsigned int qdio_err,
145 zfcp_qdio_resp_put_back(qdio, count); 140 zfcp_qdio_resp_put_back(qdio, count);
146} 141}
147 142
148/**
149 * zfcp_qdio_sbale_req - return ptr to SBALE of req_q for a struct zfcp_fsf_req
150 * @qdio: pointer to struct zfcp_qdio
151 * @q_rec: pointer to struct zfcp_queue_rec
152 * Returns: pointer to qdio_buffer_element (SBALE) structure
153 */
154struct qdio_buffer_element *zfcp_qdio_sbale_req(struct zfcp_qdio *qdio,
155 struct zfcp_queue_req *q_req)
156{
157 return zfcp_qdio_sbale(&qdio->req_q, q_req->sbal_last, 0);
158}
159
160/**
161 * zfcp_qdio_sbale_curr - return curr SBALE on req_q for a struct zfcp_fsf_req
162 * @fsf_req: pointer to struct fsf_req
163 * Returns: pointer to qdio_buffer_element (SBALE) structure
164 */
165struct qdio_buffer_element *zfcp_qdio_sbale_curr(struct zfcp_qdio *qdio,
166 struct zfcp_queue_req *q_req)
167{
168 return zfcp_qdio_sbale(&qdio->req_q, q_req->sbal_last,
169 q_req->sbale_curr);
170}
171
172static void zfcp_qdio_sbal_limit(struct zfcp_qdio *qdio, 143static void zfcp_qdio_sbal_limit(struct zfcp_qdio *qdio,
173 struct zfcp_queue_req *q_req, int max_sbals) 144 struct zfcp_qdio_req *q_req, int max_sbals)
174{ 145{
175 int count = atomic_read(&qdio->req_q.count); 146 int count = atomic_read(&qdio->req_q.count);
176 count = min(count, max_sbals); 147 count = min(count, max_sbals);
@@ -179,7 +150,7 @@ static void zfcp_qdio_sbal_limit(struct zfcp_qdio *qdio,
179} 150}
180 151
181static struct qdio_buffer_element * 152static struct qdio_buffer_element *
182zfcp_qdio_sbal_chain(struct zfcp_qdio *qdio, struct zfcp_queue_req *q_req, 153zfcp_qdio_sbal_chain(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req,
183 unsigned long sbtype) 154 unsigned long sbtype)
184{ 155{
185 struct qdio_buffer_element *sbale; 156 struct qdio_buffer_element *sbale;
@@ -214,7 +185,7 @@ zfcp_qdio_sbal_chain(struct zfcp_qdio *qdio, struct zfcp_queue_req *q_req,
214} 185}
215 186
216static struct qdio_buffer_element * 187static struct qdio_buffer_element *
217zfcp_qdio_sbale_next(struct zfcp_qdio *qdio, struct zfcp_queue_req *q_req, 188zfcp_qdio_sbale_next(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req,
218 unsigned int sbtype) 189 unsigned int sbtype)
219{ 190{
220 if (q_req->sbale_curr == ZFCP_LAST_SBALE_PER_SBAL) 191 if (q_req->sbale_curr == ZFCP_LAST_SBALE_PER_SBAL)
@@ -224,7 +195,7 @@ zfcp_qdio_sbale_next(struct zfcp_qdio *qdio, struct zfcp_queue_req *q_req,
224} 195}
225 196
226static void zfcp_qdio_undo_sbals(struct zfcp_qdio *qdio, 197static void zfcp_qdio_undo_sbals(struct zfcp_qdio *qdio,
227 struct zfcp_queue_req *q_req) 198 struct zfcp_qdio_req *q_req)
228{ 199{
229 struct qdio_buffer **sbal = qdio->req_q.sbal; 200 struct qdio_buffer **sbal = qdio->req_q.sbal;
230 int first = q_req->sbal_first; 201 int first = q_req->sbal_first;
@@ -235,7 +206,7 @@ static void zfcp_qdio_undo_sbals(struct zfcp_qdio *qdio,
235} 206}
236 207
237static int zfcp_qdio_fill_sbals(struct zfcp_qdio *qdio, 208static int zfcp_qdio_fill_sbals(struct zfcp_qdio *qdio,
238 struct zfcp_queue_req *q_req, 209 struct zfcp_qdio_req *q_req,
239 unsigned int sbtype, void *start_addr, 210 unsigned int sbtype, void *start_addr,
240 unsigned int total_length) 211 unsigned int total_length)
241{ 212{
@@ -271,8 +242,7 @@ static int zfcp_qdio_fill_sbals(struct zfcp_qdio *qdio,
271 * @max_sbals: upper bound for number of SBALs to be used 242 * @max_sbals: upper bound for number of SBALs to be used
272 * Returns: number of bytes, or error (negativ) 243 * Returns: number of bytes, or error (negativ)
273 */ 244 */
274int zfcp_qdio_sbals_from_sg(struct zfcp_qdio *qdio, 245int zfcp_qdio_sbals_from_sg(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req,
275 struct zfcp_queue_req *q_req,
276 unsigned long sbtype, struct scatterlist *sg, 246 unsigned long sbtype, struct scatterlist *sg,
277 int max_sbals) 247 int max_sbals)
278{ 248{
@@ -304,10 +274,10 @@ int zfcp_qdio_sbals_from_sg(struct zfcp_qdio *qdio,
304/** 274/**
305 * zfcp_qdio_send - set PCI flag in first SBALE and send req to QDIO 275 * zfcp_qdio_send - set PCI flag in first SBALE and send req to QDIO
306 * @qdio: pointer to struct zfcp_qdio 276 * @qdio: pointer to struct zfcp_qdio
307 * @q_req: pointer to struct zfcp_queue_req 277 * @q_req: pointer to struct zfcp_qdio_req
308 * Returns: 0 on success, error otherwise 278 * Returns: 0 on success, error otherwise
309 */ 279 */
310int zfcp_qdio_send(struct zfcp_qdio *qdio, struct zfcp_queue_req *q_req) 280int zfcp_qdio_send(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req)
311{ 281{
312 struct zfcp_qdio_queue *req_q = &qdio->req_q; 282 struct zfcp_qdio_queue *req_q = &qdio->req_q;
313 int first = q_req->sbal_first; 283 int first = q_req->sbal_first;
diff --git a/drivers/s390/scsi/zfcp_qdio.h b/drivers/s390/scsi/zfcp_qdio.h
new file mode 100644
index 000000000000..8cca54631e1e
--- /dev/null
+++ b/drivers/s390/scsi/zfcp_qdio.h
@@ -0,0 +1,109 @@
1/*
2 * zfcp device driver
3 *
4 * Header file for zfcp qdio interface
5 *
6 * Copyright IBM Corporation 2010
7 */
8
9#ifndef ZFCP_QDIO_H
10#define ZFCP_QDIO_H
11
12#include <asm/qdio.h>
13
14/**
15 * struct zfcp_qdio_queue - qdio queue buffer, zfcp index and free count
16 * @sbal: qdio buffers
17 * @first: index of next free buffer in queue
18 * @count: number of free buffers in queue
19 */
20struct zfcp_qdio_queue {
21 struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q];
22 u8 first;
23 atomic_t count;
24};
25
26/**
27 * struct zfcp_qdio - basic qdio data structure
28 * @resp_q: response queue
29 * @req_q: request queue
30 * @stat_lock: lock to protect req_q_util and req_q_time
31 * @req_q_lock: lock to serialize access to request queue
32 * @req_q_time: time of last fill level change
33 * @req_q_util: used for accounting
34 * @req_q_full: queue full incidents
35 * @req_q_wq: used to wait for SBAL availability
36 * @adapter: adapter used in conjunction with this qdio structure
37 */
38struct zfcp_qdio {
39 struct zfcp_qdio_queue resp_q;
40 struct zfcp_qdio_queue req_q;
41 spinlock_t stat_lock;
42 spinlock_t req_q_lock;
43 unsigned long long req_q_time;
44 u64 req_q_util;
45 atomic_t req_q_full;
46 wait_queue_head_t req_q_wq;
47 struct zfcp_adapter *adapter;
48};
49
50/**
51 * struct zfcp_qdio_req - qdio queue related values for a request
52 * @sbal_number: number of free sbals
53 * @sbal_first: first sbal for this request
54 * @sbal_last: last sbal for this request
55 * @sbal_limit: last possible sbal for this request
56 * @sbale_curr: current sbale at creation of this request
57 * @sbal_response: sbal used in interrupt
58 * @qdio_outb_usage: usage of outbound queue
59 * @qdio_inb_usage: usage of inbound queue
60 */
61struct zfcp_qdio_req {
62 u8 sbal_number;
63 u8 sbal_first;
64 u8 sbal_last;
65 u8 sbal_limit;
66 u8 sbale_curr;
67 u8 sbal_response;
68 u16 qdio_outb_usage;
69 u16 qdio_inb_usage;
70};
71
72/**
73 * zfcp_qdio_sbale - return pointer to sbale in qdio queue
74 * @q: queue where to find sbal
75 * @sbal_idx: sbal index in queue
76 * @sbale_idx: sbale index in sbal
77 */
78static inline struct qdio_buffer_element *
79zfcp_qdio_sbale(struct zfcp_qdio_queue *q, int sbal_idx, int sbale_idx)
80{
81 return &q->sbal[sbal_idx]->element[sbale_idx];
82}
83
84/**
85 * zfcp_qdio_sbale_req - return pointer to sbale on req_q for a request
86 * @qdio: pointer to struct zfcp_qdio
87 * @q_rec: pointer to struct zfcp_qdio_req
88 * Returns: pointer to qdio_buffer_element (sbale) structure
89 */
90static inline struct qdio_buffer_element *
91zfcp_qdio_sbale_req(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req)
92{
93 return zfcp_qdio_sbale(&qdio->req_q, q_req->sbal_last, 0);
94}
95
96/**
97 * zfcp_qdio_sbale_curr - return current sbale on req_q for a request
98 * @qdio: pointer to struct zfcp_qdio
99 * @fsf_req: pointer to struct zfcp_fsf_req
100 * Returns: pointer to qdio_buffer_element (sbale) structure
101 */
102static inline struct qdio_buffer_element *
103zfcp_qdio_sbale_curr(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req)
104{
105 return zfcp_qdio_sbale(&qdio->req_q, q_req->sbal_last,
106 q_req->sbale_curr);
107}
108
109#endif /* ZFCP_QDIO_H */
diff --git a/drivers/s390/scsi/zfcp_reqlist.h b/drivers/s390/scsi/zfcp_reqlist.h
new file mode 100644
index 000000000000..a72d1b730aba
--- /dev/null
+++ b/drivers/s390/scsi/zfcp_reqlist.h
@@ -0,0 +1,183 @@
1/*
2 * zfcp device driver
3 *
4 * Data structure and helper functions for tracking pending FSF
5 * requests.
6 *
7 * Copyright IBM Corporation 2009
8 */
9
10#ifndef ZFCP_REQLIST_H
11#define ZFCP_REQLIST_H
12
13/* number of hash buckets */
14#define ZFCP_REQ_LIST_BUCKETS 128
15
16/**
17 * struct zfcp_reqlist - Container for request list (reqlist)
18 * @lock: Spinlock for protecting the hash list
19 * @list: Array of hashbuckets, each is a list of requests in this bucket
20 */
21struct zfcp_reqlist {
22 spinlock_t lock;
23 struct list_head buckets[ZFCP_REQ_LIST_BUCKETS];
24};
25
26static inline int zfcp_reqlist_hash(unsigned long req_id)
27{
28 return req_id % ZFCP_REQ_LIST_BUCKETS;
29}
30
31/**
32 * zfcp_reqlist_alloc - Allocate and initialize reqlist
33 *
34 * Returns pointer to allocated reqlist on success, or NULL on
35 * allocation failure.
36 */
37static inline struct zfcp_reqlist *zfcp_reqlist_alloc(void)
38{
39 unsigned int i;
40 struct zfcp_reqlist *rl;
41
42 rl = kzalloc(sizeof(struct zfcp_reqlist), GFP_KERNEL);
43 if (!rl)
44 return NULL;
45
46 spin_lock_init(&rl->lock);
47
48 for (i = 0; i < ZFCP_REQ_LIST_BUCKETS; i++)
49 INIT_LIST_HEAD(&rl->buckets[i]);
50
51 return rl;
52}
53
54/**
55 * zfcp_reqlist_isempty - Check whether the request list empty
56 * @rl: pointer to reqlist
57 *
58 * Returns: 1 if list is empty, 0 if not
59 */
60static inline int zfcp_reqlist_isempty(struct zfcp_reqlist *rl)
61{
62 unsigned int i;
63
64 for (i = 0; i < ZFCP_REQ_LIST_BUCKETS; i++)
65 if (!list_empty(&rl->buckets[i]))
66 return 0;
67 return 1;
68}
69
70/**
71 * zfcp_reqlist_free - Free allocated memory for reqlist
72 * @rl: The reqlist where to free memory
73 */
74static inline void zfcp_reqlist_free(struct zfcp_reqlist *rl)
75{
76 /* sanity check */
77 BUG_ON(!zfcp_reqlist_isempty(rl));
78
79 kfree(rl);
80}
81
82static inline struct zfcp_fsf_req *
83_zfcp_reqlist_find(struct zfcp_reqlist *rl, unsigned long req_id)
84{
85 struct zfcp_fsf_req *req;
86 unsigned int i;
87
88 i = zfcp_reqlist_hash(req_id);
89 list_for_each_entry(req, &rl->buckets[i], list)
90 if (req->req_id == req_id)
91 return req;
92 return NULL;
93}
94
95/**
96 * zfcp_reqlist_find - Lookup FSF request by its request id
97 * @rl: The reqlist where to lookup the FSF request
98 * @req_id: The request id to look for
99 *
100 * Returns a pointer to the FSF request with the specified request id
101 * or NULL if there is no known FSF request with this id.
102 */
103static inline struct zfcp_fsf_req *
104zfcp_reqlist_find(struct zfcp_reqlist *rl, unsigned long req_id)
105{
106 unsigned long flags;
107 struct zfcp_fsf_req *req;
108
109 spin_lock_irqsave(&rl->lock, flags);
110 req = _zfcp_reqlist_find(rl, req_id);
111 spin_unlock_irqrestore(&rl->lock, flags);
112
113 return req;
114}
115
116/**
117 * zfcp_reqlist_find_rm - Lookup request by id and remove it from reqlist
118 * @rl: reqlist where to search and remove entry
119 * @req_id: The request id of the request to look for
120 *
121 * This functions tries to find the FSF request with the specified
122 * id and then removes it from the reqlist. The reqlist lock is held
123 * during both steps of the operation.
124 *
125 * Returns: Pointer to the FSF request if the request has been found,
126 * NULL if it has not been found.
127 */
128static inline struct zfcp_fsf_req *
129zfcp_reqlist_find_rm(struct zfcp_reqlist *rl, unsigned long req_id)
130{
131 unsigned long flags;
132 struct zfcp_fsf_req *req;
133
134 spin_lock_irqsave(&rl->lock, flags);
135 req = _zfcp_reqlist_find(rl, req_id);
136 if (req)
137 list_del(&req->list);
138 spin_unlock_irqrestore(&rl->lock, flags);
139
140 return req;
141}
142
143/**
144 * zfcp_reqlist_add - Add entry to reqlist
145 * @rl: reqlist where to add the entry
146 * @req: The entry to add
147 *
148 * The request id always increases. As an optimization new requests
149 * are added here with list_add_tail at the end of the bucket lists
150 * while old requests are looked up starting at the beginning of the
151 * lists.
152 */
153static inline void zfcp_reqlist_add(struct zfcp_reqlist *rl,
154 struct zfcp_fsf_req *req)
155{
156 unsigned int i;
157 unsigned long flags;
158
159 i = zfcp_reqlist_hash(req->req_id);
160
161 spin_lock_irqsave(&rl->lock, flags);
162 list_add_tail(&req->list, &rl->buckets[i]);
163 spin_unlock_irqrestore(&rl->lock, flags);
164}
165
166/**
167 * zfcp_reqlist_move - Move all entries from reqlist to simple list
168 * @rl: The zfcp_reqlist where to remove all entries
169 * @list: The list where to move all entries
170 */
171static inline void zfcp_reqlist_move(struct zfcp_reqlist *rl,
172 struct list_head *list)
173{
174 unsigned int i;
175 unsigned long flags;
176
177 spin_lock_irqsave(&rl->lock, flags);
178 for (i = 0; i < ZFCP_REQ_LIST_BUCKETS; i++)
179 list_splice_init(&rl->buckets[i], list);
180 spin_unlock_irqrestore(&rl->lock, flags);
181}
182
183#endif /* ZFCP_REQLIST_H */
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index 8e6fc68d6bd4..c3c4178888af 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Interface to Linux SCSI midlayer. 4 * Interface to Linux SCSI midlayer.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2009 6 * Copyright IBM Corporation 2002, 2010
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
@@ -15,6 +15,7 @@
15#include "zfcp_ext.h" 15#include "zfcp_ext.h"
16#include "zfcp_dbf.h" 16#include "zfcp_dbf.h"
17#include "zfcp_fc.h" 17#include "zfcp_fc.h"
18#include "zfcp_reqlist.h"
18 19
19static unsigned int default_depth = 32; 20static unsigned int default_depth = 32;
20module_param_named(queue_depth, default_depth, uint, 0600); 21module_param_named(queue_depth, default_depth, uint, 0600);
@@ -43,7 +44,7 @@ static void zfcp_scsi_slave_destroy(struct scsi_device *sdpnt)
43{ 44{
44 struct zfcp_unit *unit = (struct zfcp_unit *) sdpnt->hostdata; 45 struct zfcp_unit *unit = (struct zfcp_unit *) sdpnt->hostdata;
45 unit->device = NULL; 46 unit->device = NULL;
46 put_device(&unit->sysfs_device); 47 put_device(&unit->dev);
47} 48}
48 49
49static int zfcp_scsi_slave_configure(struct scsi_device *sdp) 50static int zfcp_scsi_slave_configure(struct scsi_device *sdp)
@@ -59,10 +60,9 @@ static void zfcp_scsi_command_fail(struct scsi_cmnd *scpnt, int result)
59{ 60{
60 struct zfcp_adapter *adapter = 61 struct zfcp_adapter *adapter =
61 (struct zfcp_adapter *) scpnt->device->host->hostdata[0]; 62 (struct zfcp_adapter *) scpnt->device->host->hostdata[0];
63
62 set_host_byte(scpnt, result); 64 set_host_byte(scpnt, result);
63 if ((scpnt->device != NULL) && (scpnt->device->host != NULL)) 65 zfcp_dbf_scsi_fail_send(adapter->dbf, scpnt);
64 zfcp_dbf_scsi_result("fail", 4, adapter->dbf, scpnt, NULL);
65 /* return directly */
66 scpnt->scsi_done(scpnt); 66 scpnt->scsi_done(scpnt);
67} 67}
68 68
@@ -86,18 +86,10 @@ static int zfcp_scsi_queuecommand(struct scsi_cmnd *scpnt,
86 adapter = (struct zfcp_adapter *) scpnt->device->host->hostdata[0]; 86 adapter = (struct zfcp_adapter *) scpnt->device->host->hostdata[0];
87 unit = scpnt->device->hostdata; 87 unit = scpnt->device->hostdata;
88 88
89 BUG_ON(!adapter || (adapter != unit->port->adapter));
90 BUG_ON(!scpnt->scsi_done);
91
92 if (unlikely(!unit)) {
93 zfcp_scsi_command_fail(scpnt, DID_NO_CONNECT);
94 return 0;
95 }
96
97 scsi_result = fc_remote_port_chkready(rport); 89 scsi_result = fc_remote_port_chkready(rport);
98 if (unlikely(scsi_result)) { 90 if (unlikely(scsi_result)) {
99 scpnt->result = scsi_result; 91 scpnt->result = scsi_result;
100 zfcp_dbf_scsi_result("fail", 4, adapter->dbf, scpnt, NULL); 92 zfcp_dbf_scsi_fail_send(adapter->dbf, scpnt);
101 scpnt->scsi_done(scpnt); 93 scpnt->scsi_done(scpnt);
102 return 0; 94 return 0;
103 } 95 }
@@ -189,9 +181,7 @@ static int zfcp_scsi_eh_abort_handler(struct scsi_cmnd *scpnt)
189 /* avoid race condition between late normal completion and abort */ 181 /* avoid race condition between late normal completion and abort */
190 write_lock_irqsave(&adapter->abort_lock, flags); 182 write_lock_irqsave(&adapter->abort_lock, flags);
191 183
192 spin_lock(&adapter->req_list_lock); 184 old_req = zfcp_reqlist_find(adapter->req_list, old_reqid);
193 old_req = zfcp_reqlist_find(adapter, old_reqid);
194 spin_unlock(&adapter->req_list_lock);
195 if (!old_req) { 185 if (!old_req) {
196 write_unlock_irqrestore(&adapter->abort_lock, flags); 186 write_unlock_irqrestore(&adapter->abort_lock, flags);
197 zfcp_dbf_scsi_abort("lte1", adapter->dbf, scpnt, NULL, 187 zfcp_dbf_scsi_abort("lte1", adapter->dbf, scpnt, NULL,
@@ -521,7 +511,7 @@ static void zfcp_scsi_terminate_rport_io(struct fc_rport *rport)
521 511
522 if (port) { 512 if (port) {
523 zfcp_erp_port_reopen(port, 0, "sctrpi1", NULL); 513 zfcp_erp_port_reopen(port, 0, "sctrpi1", NULL);
524 put_device(&port->sysfs_device); 514 put_device(&port->dev);
525 } 515 }
526} 516}
527 517
@@ -563,23 +553,23 @@ static void zfcp_scsi_rport_block(struct zfcp_port *port)
563 553
564void zfcp_scsi_schedule_rport_register(struct zfcp_port *port) 554void zfcp_scsi_schedule_rport_register(struct zfcp_port *port)
565{ 555{
566 get_device(&port->sysfs_device); 556 get_device(&port->dev);
567 port->rport_task = RPORT_ADD; 557 port->rport_task = RPORT_ADD;
568 558
569 if (!queue_work(port->adapter->work_queue, &port->rport_work)) 559 if (!queue_work(port->adapter->work_queue, &port->rport_work))
570 put_device(&port->sysfs_device); 560 put_device(&port->dev);
571} 561}
572 562
573void zfcp_scsi_schedule_rport_block(struct zfcp_port *port) 563void zfcp_scsi_schedule_rport_block(struct zfcp_port *port)
574{ 564{
575 get_device(&port->sysfs_device); 565 get_device(&port->dev);
576 port->rport_task = RPORT_DEL; 566 port->rport_task = RPORT_DEL;
577 567
578 if (port->rport && queue_work(port->adapter->work_queue, 568 if (port->rport && queue_work(port->adapter->work_queue,
579 &port->rport_work)) 569 &port->rport_work))
580 return; 570 return;
581 571
582 put_device(&port->sysfs_device); 572 put_device(&port->dev);
583} 573}
584 574
585void zfcp_scsi_schedule_rports_block(struct zfcp_adapter *adapter) 575void zfcp_scsi_schedule_rports_block(struct zfcp_adapter *adapter)
@@ -608,7 +598,7 @@ void zfcp_scsi_rport_work(struct work_struct *work)
608 } 598 }
609 } 599 }
610 600
611 put_device(&port->sysfs_device); 601 put_device(&port->dev);
612} 602}
613 603
614 604
@@ -626,7 +616,7 @@ void zfcp_scsi_scan(struct work_struct *work)
626 scsilun_to_int((struct scsi_lun *) 616 scsilun_to_int((struct scsi_lun *)
627 &unit->fcp_lun), 0); 617 &unit->fcp_lun), 0);
628 618
629 put_device(&unit->sysfs_device); 619 put_device(&unit->dev);
630} 620}
631 621
632struct fc_function_template zfcp_transport_functions = { 622struct fc_function_template zfcp_transport_functions = {
diff --git a/drivers/s390/scsi/zfcp_sysfs.c b/drivers/s390/scsi/zfcp_sysfs.c
index f539e006683c..a43035d4bd70 100644
--- a/drivers/s390/scsi/zfcp_sysfs.c
+++ b/drivers/s390/scsi/zfcp_sysfs.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * sysfs attributes. 4 * sysfs attributes.
5 * 5 *
6 * Copyright IBM Corporation 2008, 2009 6 * Copyright IBM Corporation 2008, 2010
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
@@ -19,8 +19,7 @@ static ssize_t zfcp_sysfs_##_feat##_##_name##_show(struct device *dev, \
19 struct device_attribute *at,\ 19 struct device_attribute *at,\
20 char *buf) \ 20 char *buf) \
21{ \ 21{ \
22 struct _feat_def *_feat = container_of(dev, struct _feat_def, \ 22 struct _feat_def *_feat = container_of(dev, struct _feat_def, dev); \
23 sysfs_device); \
24 \ 23 \
25 return sprintf(buf, _format, _value); \ 24 return sprintf(buf, _format, _value); \
26} \ 25} \
@@ -87,8 +86,7 @@ static ssize_t zfcp_sysfs_##_feat##_failed_show(struct device *dev, \
87 struct device_attribute *attr, \ 86 struct device_attribute *attr, \
88 char *buf) \ 87 char *buf) \
89{ \ 88{ \
90 struct _feat_def *_feat = container_of(dev, struct _feat_def, \ 89 struct _feat_def *_feat = container_of(dev, struct _feat_def, dev); \
91 sysfs_device); \
92 \ 90 \
93 if (atomic_read(&_feat->status) & ZFCP_STATUS_COMMON_ERP_FAILED) \ 91 if (atomic_read(&_feat->status) & ZFCP_STATUS_COMMON_ERP_FAILED) \
94 return sprintf(buf, "1\n"); \ 92 return sprintf(buf, "1\n"); \
@@ -99,12 +97,11 @@ static ssize_t zfcp_sysfs_##_feat##_failed_store(struct device *dev, \
99 struct device_attribute *attr,\ 97 struct device_attribute *attr,\
100 const char *buf, size_t count)\ 98 const char *buf, size_t count)\
101{ \ 99{ \
102 struct _feat_def *_feat = container_of(dev, struct _feat_def, \ 100 struct _feat_def *_feat = container_of(dev, struct _feat_def, dev); \
103 sysfs_device); \
104 unsigned long val; \ 101 unsigned long val; \
105 int retval = 0; \ 102 int retval = 0; \
106 \ 103 \
107 if (!(_feat && get_device(&_feat->sysfs_device))) \ 104 if (!(_feat && get_device(&_feat->dev))) \
108 return -EBUSY; \ 105 return -EBUSY; \
109 \ 106 \
110 if (strict_strtoul(buf, 0, &val) || val != 0) { \ 107 if (strict_strtoul(buf, 0, &val) || val != 0) { \
@@ -118,7 +115,7 @@ static ssize_t zfcp_sysfs_##_feat##_failed_store(struct device *dev, \
118 _reopen_id, NULL); \ 115 _reopen_id, NULL); \
119 zfcp_erp_wait(_adapter); \ 116 zfcp_erp_wait(_adapter); \
120out: \ 117out: \
121 put_device(&_feat->sysfs_device); \ 118 put_device(&_feat->dev); \
122 return retval ? retval : (ssize_t) count; \ 119 return retval ? retval : (ssize_t) count; \
123} \ 120} \
124static ZFCP_DEV_ATTR(_feat, failed, S_IWUSR | S_IRUGO, \ 121static ZFCP_DEV_ATTR(_feat, failed, S_IWUSR | S_IRUGO, \
@@ -224,10 +221,10 @@ static ssize_t zfcp_sysfs_port_remove_store(struct device *dev,
224 list_del(&port->list); 221 list_del(&port->list);
225 write_unlock_irq(&adapter->port_list_lock); 222 write_unlock_irq(&adapter->port_list_lock);
226 223
227 put_device(&port->sysfs_device); 224 put_device(&port->dev);
228 225
229 zfcp_erp_port_shutdown(port, 0, "syprs_1", NULL); 226 zfcp_erp_port_shutdown(port, 0, "syprs_1", NULL);
230 zfcp_device_unregister(&port->sysfs_device, &zfcp_sysfs_port_attrs); 227 zfcp_device_unregister(&port->dev, &zfcp_sysfs_port_attrs);
231 out: 228 out:
232 zfcp_ccw_adapter_put(adapter); 229 zfcp_ccw_adapter_put(adapter);
233 return retval ? retval : (ssize_t) count; 230 return retval ? retval : (ssize_t) count;
@@ -258,13 +255,12 @@ static ssize_t zfcp_sysfs_unit_add_store(struct device *dev,
258 struct device_attribute *attr, 255 struct device_attribute *attr,
259 const char *buf, size_t count) 256 const char *buf, size_t count)
260{ 257{
261 struct zfcp_port *port = container_of(dev, struct zfcp_port, 258 struct zfcp_port *port = container_of(dev, struct zfcp_port, dev);
262 sysfs_device);
263 struct zfcp_unit *unit; 259 struct zfcp_unit *unit;
264 u64 fcp_lun; 260 u64 fcp_lun;
265 int retval = -EINVAL; 261 int retval = -EINVAL;
266 262
267 if (!(port && get_device(&port->sysfs_device))) 263 if (!(port && get_device(&port->dev)))
268 return -EBUSY; 264 return -EBUSY;
269 265
270 if (strict_strtoull(buf, 0, (unsigned long long *) &fcp_lun)) 266 if (strict_strtoull(buf, 0, (unsigned long long *) &fcp_lun))
@@ -280,7 +276,7 @@ static ssize_t zfcp_sysfs_unit_add_store(struct device *dev,
280 zfcp_erp_wait(unit->port->adapter); 276 zfcp_erp_wait(unit->port->adapter);
281 flush_work(&unit->scsi_work); 277 flush_work(&unit->scsi_work);
282out: 278out:
283 put_device(&port->sysfs_device); 279 put_device(&port->dev);
284 return retval ? retval : (ssize_t) count; 280 return retval ? retval : (ssize_t) count;
285} 281}
286static DEVICE_ATTR(unit_add, S_IWUSR, NULL, zfcp_sysfs_unit_add_store); 282static DEVICE_ATTR(unit_add, S_IWUSR, NULL, zfcp_sysfs_unit_add_store);
@@ -289,13 +285,12 @@ static ssize_t zfcp_sysfs_unit_remove_store(struct device *dev,
289 struct device_attribute *attr, 285 struct device_attribute *attr,
290 const char *buf, size_t count) 286 const char *buf, size_t count)
291{ 287{
292 struct zfcp_port *port = container_of(dev, struct zfcp_port, 288 struct zfcp_port *port = container_of(dev, struct zfcp_port, dev);
293 sysfs_device);
294 struct zfcp_unit *unit; 289 struct zfcp_unit *unit;
295 u64 fcp_lun; 290 u64 fcp_lun;
296 int retval = -EINVAL; 291 int retval = -EINVAL;
297 292
298 if (!(port && get_device(&port->sysfs_device))) 293 if (!(port && get_device(&port->dev)))
299 return -EBUSY; 294 return -EBUSY;
300 295
301 if (strict_strtoull(buf, 0, (unsigned long long *) &fcp_lun)) 296 if (strict_strtoull(buf, 0, (unsigned long long *) &fcp_lun))
@@ -314,12 +309,12 @@ static ssize_t zfcp_sysfs_unit_remove_store(struct device *dev,
314 list_del(&unit->list); 309 list_del(&unit->list);
315 write_unlock_irq(&port->unit_list_lock); 310 write_unlock_irq(&port->unit_list_lock);
316 311
317 put_device(&unit->sysfs_device); 312 put_device(&unit->dev);
318 313
319 zfcp_erp_unit_shutdown(unit, 0, "syurs_1", NULL); 314 zfcp_erp_unit_shutdown(unit, 0, "syurs_1", NULL);
320 zfcp_device_unregister(&unit->sysfs_device, &zfcp_sysfs_unit_attrs); 315 zfcp_device_unregister(&unit->dev, &zfcp_sysfs_unit_attrs);
321out: 316out:
322 put_device(&port->sysfs_device); 317 put_device(&port->dev);
323 return retval ? retval : (ssize_t) count; 318 return retval ? retval : (ssize_t) count;
324} 319}
325static DEVICE_ATTR(unit_remove, S_IWUSR, NULL, zfcp_sysfs_unit_remove_store); 320static DEVICE_ATTR(unit_remove, S_IWUSR, NULL, zfcp_sysfs_unit_remove_store);
diff --git a/drivers/scsi/FlashPoint.c b/drivers/scsi/FlashPoint.c
index b898d382b7b0..e40cdfb7541f 100644
--- a/drivers/scsi/FlashPoint.c
+++ b/drivers/scsi/FlashPoint.c
@@ -3924,7 +3924,7 @@ static void FPT_sinits(struct sccb *p_sccb, unsigned char p_card)
3924{ 3924{
3925 struct sccb_mgr_tar_info *currTar_Info; 3925 struct sccb_mgr_tar_info *currTar_Info;
3926 3926
3927 if ((p_sccb->TargID > MAX_SCSI_TAR) || (p_sccb->Lun > MAX_LUN)) { 3927 if ((p_sccb->TargID >= MAX_SCSI_TAR) || (p_sccb->Lun >= MAX_LUN)) {
3928 return; 3928 return;
3929 } 3929 }
3930 currTar_Info = &FPT_sccbMgrTbl[p_card][p_sccb->TargID]; 3930 currTar_Info = &FPT_sccbMgrTbl[p_card][p_sccb->TargID];
diff --git a/drivers/scsi/be2iscsi/be.h b/drivers/scsi/be2iscsi/be.h
index a93a5040f087..136b49cea791 100644
--- a/drivers/scsi/be2iscsi/be.h
+++ b/drivers/scsi/be2iscsi/be.h
@@ -1,5 +1,5 @@
1/** 1/**
2 * Copyright (C) 2005 - 2009 ServerEngines 2 * Copyright (C) 2005 - 2010 ServerEngines
3 * All rights reserved. 3 * All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -24,6 +24,10 @@
24#define FW_VER_LEN 32 24#define FW_VER_LEN 32
25#define MCC_Q_LEN 128 25#define MCC_Q_LEN 128
26#define MCC_CQ_LEN 256 26#define MCC_CQ_LEN 256
27#define MAX_MCC_CMD 16
28/* BladeEngine Generation numbers */
29#define BE_GEN2 2
30#define BE_GEN3 3
27 31
28struct be_dma_mem { 32struct be_dma_mem {
29 void *va; 33 void *va;
@@ -57,6 +61,11 @@ static inline void *queue_head_node(struct be_queue_info *q)
57 return q->dma_mem.va + q->head * q->entry_size; 61 return q->dma_mem.va + q->head * q->entry_size;
58} 62}
59 63
64static inline void *queue_get_wrb(struct be_queue_info *q, unsigned int wrb_num)
65{
66 return q->dma_mem.va + wrb_num * q->entry_size;
67}
68
60static inline void *queue_tail_node(struct be_queue_info *q) 69static inline void *queue_tail_node(struct be_queue_info *q)
61{ 70{
62 return q->dma_mem.va + q->tail * q->entry_size; 71 return q->dma_mem.va + q->tail * q->entry_size;
@@ -104,15 +113,19 @@ struct be_ctrl_info {
104 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 113 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
105 spinlock_t mcc_cq_lock; 114 spinlock_t mcc_cq_lock;
106 115
107 /* MCC Async callback */ 116 wait_queue_head_t mcc_wait[MAX_MCC_CMD + 1];
108 void (*async_cb) (void *adapter, bool link_up); 117 unsigned int mcc_tag[MAX_MCC_CMD];
109 void *adapter_ctxt; 118 unsigned int mcc_numtag[MAX_MCC_CMD + 1];
119 unsigned short mcc_alloc_index;
120 unsigned short mcc_free_index;
121 unsigned int mcc_tag_available;
110}; 122};
111 123
112#include "be_cmds.h" 124#include "be_cmds.h"
113 125
114#define PAGE_SHIFT_4K 12 126#define PAGE_SHIFT_4K 12
115#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 127#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
128#define mcc_timeout 120000 /* 5s timeout */
116 129
117/* Returns number of pages spanned by the data starting at the given addr */ 130/* Returns number of pages spanned by the data starting at the given addr */
118#define PAGES_4K_SPANNED(_address, size) \ 131#define PAGES_4K_SPANNED(_address, size) \
diff --git a/drivers/scsi/be2iscsi/be_cmds.c b/drivers/scsi/be2iscsi/be_cmds.c
index f008708f1b08..67098578fba4 100644
--- a/drivers/scsi/be2iscsi/be_cmds.c
+++ b/drivers/scsi/be2iscsi/be_cmds.c
@@ -1,5 +1,5 @@
1/** 1/**
2 * Copyright (C) 2005 - 2009 ServerEngines 2 * Copyright (C) 2005 - 2010 ServerEngines
3 * All rights reserved. 3 * All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -19,7 +19,7 @@
19#include "be_mgmt.h" 19#include "be_mgmt.h"
20#include "be_main.h" 20#include "be_main.h"
21 21
22static void be_mcc_notify(struct beiscsi_hba *phba) 22void be_mcc_notify(struct beiscsi_hba *phba)
23{ 23{
24 struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q; 24 struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q;
25 u32 val = 0; 25 u32 val = 0;
@@ -29,6 +29,52 @@ static void be_mcc_notify(struct beiscsi_hba *phba)
29 iowrite32(val, phba->db_va + DB_MCCQ_OFFSET); 29 iowrite32(val, phba->db_va + DB_MCCQ_OFFSET);
30} 30}
31 31
32unsigned int alloc_mcc_tag(struct beiscsi_hba *phba)
33{
34 unsigned int tag = 0;
35 unsigned int num = 0;
36
37mcc_tag_rdy:
38 if (phba->ctrl.mcc_tag_available) {
39 tag = phba->ctrl.mcc_tag[phba->ctrl.mcc_alloc_index];
40 phba->ctrl.mcc_tag[phba->ctrl.mcc_alloc_index] = 0;
41 phba->ctrl.mcc_numtag[tag] = 0;
42 } else {
43 udelay(100);
44 num++;
45 if (num < mcc_timeout)
46 goto mcc_tag_rdy;
47 }
48 if (tag) {
49 phba->ctrl.mcc_tag_available--;
50 if (phba->ctrl.mcc_alloc_index == (MAX_MCC_CMD - 1))
51 phba->ctrl.mcc_alloc_index = 0;
52 else
53 phba->ctrl.mcc_alloc_index++;
54 }
55 return tag;
56}
57
58void free_mcc_tag(struct be_ctrl_info *ctrl, unsigned int tag)
59{
60 spin_lock(&ctrl->mbox_lock);
61 tag = tag & 0x000000FF;
62 ctrl->mcc_tag[ctrl->mcc_free_index] = tag;
63 if (ctrl->mcc_free_index == (MAX_MCC_CMD - 1))
64 ctrl->mcc_free_index = 0;
65 else
66 ctrl->mcc_free_index++;
67 ctrl->mcc_tag_available++;
68 spin_unlock(&ctrl->mbox_lock);
69}
70
71bool is_link_state_evt(u32 trailer)
72{
73 return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) &
74 ASYNC_TRAILER_EVENT_CODE_MASK) ==
75 ASYNC_EVENT_CODE_LINK_STATE);
76}
77
32static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 78static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl)
33{ 79{
34 if (compl->flags != 0) { 80 if (compl->flags != 0) {
@@ -64,12 +110,30 @@ static int be_mcc_compl_process(struct be_ctrl_info *ctrl,
64 return 0; 110 return 0;
65} 111}
66 112
67 113int be_mcc_compl_process_isr(struct be_ctrl_info *ctrl,
68static inline bool is_link_state_evt(u32 trailer) 114 struct be_mcc_compl *compl)
69{ 115{
70 return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 116 u16 compl_status, extd_status;
71 ASYNC_TRAILER_EVENT_CODE_MASK) == 117 unsigned short tag;
72 ASYNC_EVENT_CODE_LINK_STATE); 118
119 be_dws_le_to_cpu(compl, 4);
120
121 compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) &
122 CQE_STATUS_COMPL_MASK;
123 /* The ctrl.mcc_numtag[tag] is filled with
124 * [31] = valid, [30:24] = Rsvd, [23:16] = wrb, [15:8] = extd_status,
125 * [7:0] = compl_status
126 */
127 tag = (compl->tag0 & 0x000000FF);
128 extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) &
129 CQE_STATUS_EXTD_MASK;
130
131 ctrl->mcc_numtag[tag] = 0x80000000;
132 ctrl->mcc_numtag[tag] |= (compl->tag0 & 0x00FF0000);
133 ctrl->mcc_numtag[tag] |= (extd_status & 0x000000FF) << 8;
134 ctrl->mcc_numtag[tag] |= (compl_status & 0x000000FF);
135 wake_up_interruptible(&ctrl->mcc_wait[tag]);
136 return 0;
73} 137}
74 138
75static struct be_mcc_compl *be_mcc_compl_get(struct beiscsi_hba *phba) 139static struct be_mcc_compl *be_mcc_compl_get(struct beiscsi_hba *phba)
@@ -89,7 +153,7 @@ static void be2iscsi_fail_session(struct iscsi_cls_session *cls_session)
89 iscsi_session_failure(cls_session->dd_data, ISCSI_ERR_CONN_FAILED); 153 iscsi_session_failure(cls_session->dd_data, ISCSI_ERR_CONN_FAILED);
90} 154}
91 155
92static void beiscsi_async_link_state_process(struct beiscsi_hba *phba, 156void beiscsi_async_link_state_process(struct beiscsi_hba *phba,
93 struct be_async_event_link_state *evt) 157 struct be_async_event_link_state *evt)
94{ 158{
95 switch (evt->port_link_status) { 159 switch (evt->port_link_status) {
@@ -97,13 +161,13 @@ static void beiscsi_async_link_state_process(struct beiscsi_hba *phba,
97 SE_DEBUG(DBG_LVL_1, "Link Down on Physical Port %d \n", 161 SE_DEBUG(DBG_LVL_1, "Link Down on Physical Port %d \n",
98 evt->physical_port); 162 evt->physical_port);
99 phba->state |= BE_ADAPTER_LINK_DOWN; 163 phba->state |= BE_ADAPTER_LINK_DOWN;
164 iscsi_host_for_each_session(phba->shost,
165 be2iscsi_fail_session);
100 break; 166 break;
101 case ASYNC_EVENT_LINK_UP: 167 case ASYNC_EVENT_LINK_UP:
102 phba->state = BE_ADAPTER_UP; 168 phba->state = BE_ADAPTER_UP;
103 SE_DEBUG(DBG_LVL_1, "Link UP on Physical Port %d \n", 169 SE_DEBUG(DBG_LVL_1, "Link UP on Physical Port %d \n",
104 evt->physical_port); 170 evt->physical_port);
105 iscsi_host_for_each_session(phba->shost,
106 be2iscsi_fail_session);
107 break; 171 break;
108 default: 172 default:
109 SE_DEBUG(DBG_LVL_1, "Unexpected Async Notification %d on" 173 SE_DEBUG(DBG_LVL_1, "Unexpected Async Notification %d on"
@@ -162,7 +226,6 @@ int beiscsi_process_mcc(struct beiscsi_hba *phba)
162/* Wait till no more pending mcc requests are present */ 226/* Wait till no more pending mcc requests are present */
163static int be_mcc_wait_compl(struct beiscsi_hba *phba) 227static int be_mcc_wait_compl(struct beiscsi_hba *phba)
164{ 228{
165#define mcc_timeout 120000 /* 5s timeout */
166 int i, status; 229 int i, status;
167 for (i = 0; i < mcc_timeout; i++) { 230 for (i = 0; i < mcc_timeout; i++) {
168 status = beiscsi_process_mcc(phba); 231 status = beiscsi_process_mcc(phba);
@@ -372,9 +435,10 @@ struct be_mcc_wrb *wrb_from_mccq(struct beiscsi_hba *phba)
372 435
373 BUG_ON(atomic_read(&mccq->used) >= mccq->len); 436 BUG_ON(atomic_read(&mccq->used) >= mccq->len);
374 wrb = queue_head_node(mccq); 437 wrb = queue_head_node(mccq);
438 memset(wrb, 0, sizeof(*wrb));
439 wrb->tag0 = (mccq->head & 0x000000FF) << 16;
375 queue_head_inc(mccq); 440 queue_head_inc(mccq);
376 atomic_inc(&mccq->used); 441 atomic_inc(&mccq->used);
377 memset(wrb, 0, sizeof(*wrb));
378 return wrb; 442 return wrb;
379} 443}
380 444
diff --git a/drivers/scsi/be2iscsi/be_cmds.h b/drivers/scsi/be2iscsi/be_cmds.h
index 5de8acb924cb..49fcc787ee8b 100644
--- a/drivers/scsi/be2iscsi/be_cmds.h
+++ b/drivers/scsi/be2iscsi/be_cmds.h
@@ -1,5 +1,5 @@
1/** 1/**
2 * Copyright (C) 2005 - 2009 ServerEngines 2 * Copyright (C) 2005 - 2010 ServerEngines
3 * All rights reserved. 3 * All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -425,14 +425,20 @@ int beiscsi_cmd_mccq_create(struct beiscsi_hba *phba,
425int be_poll_mcc(struct be_ctrl_info *ctrl); 425int be_poll_mcc(struct be_ctrl_info *ctrl);
426unsigned char mgmt_check_supported_fw(struct be_ctrl_info *ctrl, 426unsigned char mgmt_check_supported_fw(struct be_ctrl_info *ctrl,
427 struct beiscsi_hba *phba); 427 struct beiscsi_hba *phba);
428int be_cmd_get_mac_addr(struct beiscsi_hba *phba, u8 *mac_addr); 428unsigned int be_cmd_get_mac_addr(struct beiscsi_hba *phba);
429 429void free_mcc_tag(struct be_ctrl_info *ctrl, unsigned int tag);
430/*ISCSI Functuions */ 430/*ISCSI Functuions */
431int be_cmd_fw_initialize(struct be_ctrl_info *ctrl); 431int be_cmd_fw_initialize(struct be_ctrl_info *ctrl);
432 432
433struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem); 433struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem);
434struct be_mcc_wrb *wrb_from_mccq(struct beiscsi_hba *phba); 434struct be_mcc_wrb *wrb_from_mccq(struct beiscsi_hba *phba);
435int be_mcc_notify_wait(struct beiscsi_hba *phba); 435int be_mcc_notify_wait(struct beiscsi_hba *phba);
436void be_mcc_notify(struct beiscsi_hba *phba);
437unsigned int alloc_mcc_tag(struct beiscsi_hba *phba);
438void beiscsi_async_link_state_process(struct beiscsi_hba *phba,
439 struct be_async_event_link_state *evt);
440int be_mcc_compl_process_isr(struct be_ctrl_info *ctrl,
441 struct be_mcc_compl *compl);
436 442
437int be_mbox_notify(struct be_ctrl_info *ctrl); 443int be_mbox_notify(struct be_ctrl_info *ctrl);
438 444
@@ -448,6 +454,8 @@ int be_cmd_iscsi_post_sgl_pages(struct be_ctrl_info *ctrl,
448int be_cmd_wrbq_create(struct be_ctrl_info *ctrl, struct be_dma_mem *q_mem, 454int be_cmd_wrbq_create(struct be_ctrl_info *ctrl, struct be_dma_mem *q_mem,
449 struct be_queue_info *wrbq); 455 struct be_queue_info *wrbq);
450 456
457bool is_link_state_evt(u32 trailer);
458
451struct be_default_pdu_context { 459struct be_default_pdu_context {
452 u32 dw[4]; 460 u32 dw[4];
453} __packed; 461} __packed;
diff --git a/drivers/scsi/be2iscsi/be_iscsi.c b/drivers/scsi/be2iscsi/be_iscsi.c
index d587b0362f18..29a3aaf35f9f 100644
--- a/drivers/scsi/be2iscsi/be_iscsi.c
+++ b/drivers/scsi/be2iscsi/be_iscsi.c
@@ -1,5 +1,5 @@
1/** 1/**
2 * Copyright (C) 2005 - 2009 ServerEngines 2 * Copyright (C) 2005 - 2010 ServerEngines
3 * All rights reserved. 3 * All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -101,6 +101,7 @@ void beiscsi_session_destroy(struct iscsi_cls_session *cls_session)
101 struct iscsi_session *sess = cls_session->dd_data; 101 struct iscsi_session *sess = cls_session->dd_data;
102 struct beiscsi_session *beiscsi_sess = sess->dd_data; 102 struct beiscsi_session *beiscsi_sess = sess->dd_data;
103 103
104 SE_DEBUG(DBG_LVL_8, "In beiscsi_session_destroy\n");
104 pci_pool_destroy(beiscsi_sess->bhs_pool); 105 pci_pool_destroy(beiscsi_sess->bhs_pool);
105 iscsi_session_teardown(cls_session); 106 iscsi_session_teardown(cls_session);
106} 107}
@@ -224,6 +225,7 @@ int beiscsi_conn_get_param(struct iscsi_cls_conn *cls_conn,
224 struct beiscsi_conn *beiscsi_conn = conn->dd_data; 225 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
225 int len = 0; 226 int len = 0;
226 227
228 SE_DEBUG(DBG_LVL_8, "In beiscsi_conn_get_param, param= %d\n", param);
227 beiscsi_ep = beiscsi_conn->ep; 229 beiscsi_ep = beiscsi_conn->ep;
228 if (!beiscsi_ep) { 230 if (!beiscsi_ep) {
229 SE_DEBUG(DBG_LVL_1, 231 SE_DEBUG(DBG_LVL_1,
@@ -254,6 +256,7 @@ int beiscsi_set_param(struct iscsi_cls_conn *cls_conn,
254 struct iscsi_session *session = conn->session; 256 struct iscsi_session *session = conn->session;
255 int ret; 257 int ret;
256 258
259 SE_DEBUG(DBG_LVL_8, "In beiscsi_conn_set_param, param= %d\n", param);
257 ret = iscsi_set_param(cls_conn, param, buf, buflen); 260 ret = iscsi_set_param(cls_conn, param, buf, buflen);
258 if (ret) 261 if (ret)
259 return ret; 262 return ret;
@@ -271,8 +274,8 @@ int beiscsi_set_param(struct iscsi_cls_conn *cls_conn,
271 conn->max_recv_dlength = 65536; 274 conn->max_recv_dlength = 65536;
272 break; 275 break;
273 case ISCSI_PARAM_MAX_BURST: 276 case ISCSI_PARAM_MAX_BURST:
274 if (session->first_burst > 262144) 277 if (session->max_burst > 262144)
275 session->first_burst = 262144; 278 session->max_burst = 262144;
276 break; 279 break;
277 default: 280 default:
278 return 0; 281 return 0;
@@ -293,12 +296,41 @@ int beiscsi_get_host_param(struct Scsi_Host *shost,
293 enum iscsi_host_param param, char *buf) 296 enum iscsi_host_param param, char *buf)
294{ 297{
295 struct beiscsi_hba *phba = (struct beiscsi_hba *)iscsi_host_priv(shost); 298 struct beiscsi_hba *phba = (struct beiscsi_hba *)iscsi_host_priv(shost);
299 struct be_cmd_resp_get_mac_addr *resp;
300 struct be_mcc_wrb *wrb;
301 unsigned int tag, wrb_num;
296 int len = 0; 302 int len = 0;
303 unsigned short status, extd_status;
304 struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q;
297 305
306 SE_DEBUG(DBG_LVL_8, "In beiscsi_get_host_param, param= %d\n", param);
298 switch (param) { 307 switch (param) {
299 case ISCSI_HOST_PARAM_HWADDRESS: 308 case ISCSI_HOST_PARAM_HWADDRESS:
300 be_cmd_get_mac_addr(phba, phba->mac_address); 309 tag = be_cmd_get_mac_addr(phba);
301 len = sysfs_format_mac(buf, phba->mac_address, ETH_ALEN); 310 if (!tag) {
311 SE_DEBUG(DBG_LVL_1, "be_cmd_get_mac_addr Failed \n");
312 return -1;
313 } else
314 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
315 phba->ctrl.mcc_numtag[tag]);
316
317 wrb_num = (phba->ctrl.mcc_numtag[tag] & 0x00FF0000) >> 16;
318 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
319 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
320 if (status || extd_status) {
321 SE_DEBUG(DBG_LVL_1, "be_cmd_get_mac_addr Failed"
322 " status = %d extd_status = %d \n",
323 status, extd_status);
324 free_mcc_tag(&phba->ctrl, tag);
325 return -1;
326 } else {
327 wrb = queue_get_wrb(mccq, wrb_num);
328 free_mcc_tag(&phba->ctrl, tag);
329 resp = embedded_payload(wrb);
330 memcpy(phba->mac_address, resp->mac_address, ETH_ALEN);
331 len = sysfs_format_mac(buf, phba->mac_address,
332 ETH_ALEN);
333 }
302 break; 334 break;
303 default: 335 default:
304 return iscsi_host_get_param(shost, param, buf); 336 return iscsi_host_get_param(shost, param, buf);
@@ -378,6 +410,7 @@ int beiscsi_conn_start(struct iscsi_cls_conn *cls_conn)
378 struct beiscsi_endpoint *beiscsi_ep; 410 struct beiscsi_endpoint *beiscsi_ep;
379 struct beiscsi_offload_params params; 411 struct beiscsi_offload_params params;
380 412
413 SE_DEBUG(DBG_LVL_8, "In beiscsi_conn_start\n");
381 memset(&params, 0, sizeof(struct beiscsi_offload_params)); 414 memset(&params, 0, sizeof(struct beiscsi_offload_params));
382 beiscsi_ep = beiscsi_conn->ep; 415 beiscsi_ep = beiscsi_conn->ep;
383 if (!beiscsi_ep) 416 if (!beiscsi_ep)
@@ -422,8 +455,14 @@ static int beiscsi_open_conn(struct iscsi_endpoint *ep,
422{ 455{
423 struct beiscsi_endpoint *beiscsi_ep = ep->dd_data; 456 struct beiscsi_endpoint *beiscsi_ep = ep->dd_data;
424 struct beiscsi_hba *phba = beiscsi_ep->phba; 457 struct beiscsi_hba *phba = beiscsi_ep->phba;
458 struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q;
459 struct be_mcc_wrb *wrb;
460 struct tcp_connect_and_offload_out *ptcpcnct_out;
461 unsigned short status, extd_status;
462 unsigned int tag, wrb_num;
425 int ret = -1; 463 int ret = -1;
426 464
465 SE_DEBUG(DBG_LVL_8, "In beiscsi_open_conn\n");
427 beiscsi_ep->ep_cid = beiscsi_get_cid(phba); 466 beiscsi_ep->ep_cid = beiscsi_get_cid(phba);
428 if (beiscsi_ep->ep_cid == 0xFFFF) { 467 if (beiscsi_ep->ep_cid == 0xFFFF) {
429 SE_DEBUG(DBG_LVL_1, "No free cid available\n"); 468 SE_DEBUG(DBG_LVL_1, "No free cid available\n");
@@ -431,15 +470,44 @@ static int beiscsi_open_conn(struct iscsi_endpoint *ep,
431 } 470 }
432 SE_DEBUG(DBG_LVL_8, "In beiscsi_open_conn, ep_cid=%d ", 471 SE_DEBUG(DBG_LVL_8, "In beiscsi_open_conn, ep_cid=%d ",
433 beiscsi_ep->ep_cid); 472 beiscsi_ep->ep_cid);
434 phba->ep_array[beiscsi_ep->ep_cid] = ep; 473 phba->ep_array[beiscsi_ep->ep_cid -
435 if (beiscsi_ep->ep_cid > 474 phba->fw_config.iscsi_cid_start] = ep;
436 (phba->fw_config.iscsi_cid_start + phba->params.cxns_per_ctrl)) { 475 if (beiscsi_ep->ep_cid > (phba->fw_config.iscsi_cid_start +
476 phba->params.cxns_per_ctrl * 2)) {
437 SE_DEBUG(DBG_LVL_1, "Failed in allocate iscsi cid\n"); 477 SE_DEBUG(DBG_LVL_1, "Failed in allocate iscsi cid\n");
438 return ret; 478 return ret;
439 } 479 }
440 480
441 beiscsi_ep->cid_vld = 0; 481 beiscsi_ep->cid_vld = 0;
442 return mgmt_open_connection(phba, dst_addr, beiscsi_ep); 482 tag = mgmt_open_connection(phba, dst_addr, beiscsi_ep);
483 if (!tag) {
484 SE_DEBUG(DBG_LVL_1,
485 "mgmt_invalidate_connection Failed for cid=%d \n",
486 beiscsi_ep->ep_cid);
487 } else {
488 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
489 phba->ctrl.mcc_numtag[tag]);
490 }
491 wrb_num = (phba->ctrl.mcc_numtag[tag] & 0x00FF0000) >> 16;
492 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
493 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
494 if (status || extd_status) {
495 SE_DEBUG(DBG_LVL_1, "mgmt_open_connection Failed"
496 " status = %d extd_status = %d \n",
497 status, extd_status);
498 free_mcc_tag(&phba->ctrl, tag);
499 return -1;
500 } else {
501 wrb = queue_get_wrb(mccq, wrb_num);
502 free_mcc_tag(&phba->ctrl, tag);
503
504 ptcpcnct_out = embedded_payload(wrb);
505 beiscsi_ep = ep->dd_data;
506 beiscsi_ep->fw_handle = ptcpcnct_out->connection_handle;
507 beiscsi_ep->cid_vld = 1;
508 SE_DEBUG(DBG_LVL_8, "mgmt_open_connection Success\n");
509 }
510 return 0;
443} 511}
444 512
445/** 513/**
@@ -459,14 +527,12 @@ static void beiscsi_put_cid(struct beiscsi_hba *phba, unsigned short cid)
459 * beiscsi_free_ep - free endpoint 527 * beiscsi_free_ep - free endpoint
460 * @ep: pointer to iscsi endpoint structure 528 * @ep: pointer to iscsi endpoint structure
461 */ 529 */
462static void beiscsi_free_ep(struct iscsi_endpoint *ep) 530static void beiscsi_free_ep(struct beiscsi_endpoint *beiscsi_ep)
463{ 531{
464 struct beiscsi_endpoint *beiscsi_ep = ep->dd_data;
465 struct beiscsi_hba *phba = beiscsi_ep->phba; 532 struct beiscsi_hba *phba = beiscsi_ep->phba;
466 533
467 beiscsi_put_cid(phba, beiscsi_ep->ep_cid); 534 beiscsi_put_cid(phba, beiscsi_ep->ep_cid);
468 beiscsi_ep->phba = NULL; 535 beiscsi_ep->phba = NULL;
469 iscsi_destroy_endpoint(ep);
470} 536}
471 537
472/** 538/**
@@ -495,9 +561,9 @@ beiscsi_ep_connect(struct Scsi_Host *shost, struct sockaddr *dst_addr,
495 return ERR_PTR(ret); 561 return ERR_PTR(ret);
496 } 562 }
497 563
498 if (phba->state) { 564 if (phba->state != BE_ADAPTER_UP) {
499 ret = -EBUSY; 565 ret = -EBUSY;
500 SE_DEBUG(DBG_LVL_1, "The Adapet state is Not UP \n"); 566 SE_DEBUG(DBG_LVL_1, "The Adapter state is Not UP \n");
501 return ERR_PTR(ret); 567 return ERR_PTR(ret);
502 } 568 }
503 569
@@ -509,9 +575,9 @@ beiscsi_ep_connect(struct Scsi_Host *shost, struct sockaddr *dst_addr,
509 575
510 beiscsi_ep = ep->dd_data; 576 beiscsi_ep = ep->dd_data;
511 beiscsi_ep->phba = phba; 577 beiscsi_ep->phba = phba;
512 578 beiscsi_ep->openiscsi_ep = ep;
513 if (beiscsi_open_conn(ep, NULL, dst_addr, non_blocking)) { 579 if (beiscsi_open_conn(ep, NULL, dst_addr, non_blocking)) {
514 SE_DEBUG(DBG_LVL_1, "Failed in allocate iscsi cid\n"); 580 SE_DEBUG(DBG_LVL_1, "Failed in beiscsi_open_conn \n");
515 ret = -ENOMEM; 581 ret = -ENOMEM;
516 goto free_ep; 582 goto free_ep;
517 } 583 }
@@ -519,7 +585,7 @@ beiscsi_ep_connect(struct Scsi_Host *shost, struct sockaddr *dst_addr,
519 return ep; 585 return ep;
520 586
521free_ep: 587free_ep:
522 beiscsi_free_ep(ep); 588 beiscsi_free_ep(beiscsi_ep);
523 return ERR_PTR(ret); 589 return ERR_PTR(ret);
524} 590}
525 591
@@ -546,20 +612,22 @@ int beiscsi_ep_poll(struct iscsi_endpoint *ep, int timeout_ms)
546 * @ep: The iscsi endpoint 612 * @ep: The iscsi endpoint
547 * @flag: The type of connection closure 613 * @flag: The type of connection closure
548 */ 614 */
549static int beiscsi_close_conn(struct iscsi_endpoint *ep, int flag) 615static int beiscsi_close_conn(struct beiscsi_endpoint *beiscsi_ep, int flag)
550{ 616{
551 int ret = 0; 617 int ret = 0;
552 struct beiscsi_endpoint *beiscsi_ep = ep->dd_data; 618 unsigned int tag;
553 struct beiscsi_hba *phba = beiscsi_ep->phba; 619 struct beiscsi_hba *phba = beiscsi_ep->phba;
554 620
555 if (MGMT_STATUS_SUCCESS != 621 tag = mgmt_upload_connection(phba, beiscsi_ep->ep_cid, flag);
556 mgmt_upload_connection(phba, beiscsi_ep->ep_cid, 622 if (!tag) {
557 CONNECTION_UPLOAD_GRACEFUL)) {
558 SE_DEBUG(DBG_LVL_8, "upload failed for cid 0x%x", 623 SE_DEBUG(DBG_LVL_8, "upload failed for cid 0x%x",
559 beiscsi_ep->ep_cid); 624 beiscsi_ep->ep_cid);
560 ret = -1; 625 ret = -1;
626 } else {
627 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
628 phba->ctrl.mcc_numtag[tag]);
629 free_mcc_tag(&phba->ctrl, tag);
561 } 630 }
562
563 return ret; 631 return ret;
564} 632}
565 633
@@ -574,19 +642,17 @@ void beiscsi_ep_disconnect(struct iscsi_endpoint *ep)
574 struct beiscsi_conn *beiscsi_conn; 642 struct beiscsi_conn *beiscsi_conn;
575 struct beiscsi_endpoint *beiscsi_ep; 643 struct beiscsi_endpoint *beiscsi_ep;
576 struct beiscsi_hba *phba; 644 struct beiscsi_hba *phba;
577 int flag = 0;
578 645
579 beiscsi_ep = ep->dd_data; 646 beiscsi_ep = ep->dd_data;
580 phba = beiscsi_ep->phba; 647 phba = beiscsi_ep->phba;
581 SE_DEBUG(DBG_LVL_8, "In beiscsi_ep_disconnect\n"); 648 SE_DEBUG(DBG_LVL_8, "In beiscsi_ep_disconnect for ep_cid = %d\n",
649 beiscsi_ep->ep_cid);
582 650
583 if (beiscsi_ep->conn) { 651 if (beiscsi_ep->conn) {
584 beiscsi_conn = beiscsi_ep->conn; 652 beiscsi_conn = beiscsi_ep->conn;
585 iscsi_suspend_queue(beiscsi_conn->conn); 653 iscsi_suspend_queue(beiscsi_conn->conn);
586 beiscsi_close_conn(ep, flag);
587 } 654 }
588 655
589 beiscsi_free_ep(ep);
590} 656}
591 657
592/** 658/**
@@ -619,23 +685,31 @@ void beiscsi_conn_stop(struct iscsi_cls_conn *cls_conn, int flag)
619 struct iscsi_session *session = conn->session; 685 struct iscsi_session *session = conn->session;
620 struct Scsi_Host *shost = iscsi_session_to_shost(session->cls_session); 686 struct Scsi_Host *shost = iscsi_session_to_shost(session->cls_session);
621 struct beiscsi_hba *phba = iscsi_host_priv(shost); 687 struct beiscsi_hba *phba = iscsi_host_priv(shost);
622 unsigned int status; 688 unsigned int tag;
623 unsigned short savecfg_flag = CMD_ISCSI_SESSION_SAVE_CFG_ON_FLASH; 689 unsigned short savecfg_flag = CMD_ISCSI_SESSION_SAVE_CFG_ON_FLASH;
624 690
625 SE_DEBUG(DBG_LVL_8, "In beiscsi_conn_stop\n");
626 beiscsi_ep = beiscsi_conn->ep; 691 beiscsi_ep = beiscsi_conn->ep;
627 if (!beiscsi_ep) { 692 if (!beiscsi_ep) {
628 SE_DEBUG(DBG_LVL_8, "In beiscsi_conn_stop , no beiscsi_ep\n"); 693 SE_DEBUG(DBG_LVL_8, "In beiscsi_conn_stop , no beiscsi_ep\n");
629 return; 694 return;
630 } 695 }
631 status = mgmt_invalidate_connection(phba, beiscsi_ep, 696 SE_DEBUG(DBG_LVL_8, "In beiscsi_conn_stop ep_cid = %d\n",
697 beiscsi_ep->ep_cid);
698 tag = mgmt_invalidate_connection(phba, beiscsi_ep,
632 beiscsi_ep->ep_cid, 1, 699 beiscsi_ep->ep_cid, 1,
633 savecfg_flag); 700 savecfg_flag);
634 if (status != MGMT_STATUS_SUCCESS) { 701 if (!tag) {
635 SE_DEBUG(DBG_LVL_1, 702 SE_DEBUG(DBG_LVL_1,
636 "mgmt_invalidate_connection Failed for cid=%d \n", 703 "mgmt_invalidate_connection Failed for cid=%d \n",
637 beiscsi_ep->ep_cid); 704 beiscsi_ep->ep_cid);
705 } else {
706 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
707 phba->ctrl.mcc_numtag[tag]);
708 free_mcc_tag(&phba->ctrl, tag);
638 } 709 }
710 beiscsi_close_conn(beiscsi_ep, CONNECTION_UPLOAD_GRACEFUL);
711 beiscsi_free_ep(beiscsi_ep);
712 iscsi_destroy_endpoint(beiscsi_ep->openiscsi_ep);
639 beiscsi_unbind_conn_to_cid(phba, beiscsi_ep->ep_cid); 713 beiscsi_unbind_conn_to_cid(phba, beiscsi_ep->ep_cid);
640 iscsi_conn_stop(cls_conn, flag); 714 iscsi_conn_stop(cls_conn, flag);
641} 715}
diff --git a/drivers/scsi/be2iscsi/be_iscsi.h b/drivers/scsi/be2iscsi/be_iscsi.h
index f92ffc5349fb..1f512c28cbf9 100644
--- a/drivers/scsi/be2iscsi/be_iscsi.h
+++ b/drivers/scsi/be2iscsi/be_iscsi.h
@@ -1,5 +1,5 @@
1/** 1/**
2 * Copyright (C) 2005 - 2009 ServerEngines 2 * Copyright (C) 2005 - 2010 ServerEngines
3 * All rights reserved. 3 * All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
diff --git a/drivers/scsi/be2iscsi/be_main.c b/drivers/scsi/be2iscsi/be_main.c
index 1a557fa77888..7c22616ab141 100644
--- a/drivers/scsi/be2iscsi/be_main.c
+++ b/drivers/scsi/be2iscsi/be_main.c
@@ -1,5 +1,5 @@
1/** 1/**
2 * Copyright (C) 2005 - 2009 ServerEngines 2 * Copyright (C) 2005 - 2010 ServerEngines
3 * All rights reserved. 3 * All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -40,7 +40,6 @@
40static unsigned int be_iopoll_budget = 10; 40static unsigned int be_iopoll_budget = 10;
41static unsigned int be_max_phys_size = 64; 41static unsigned int be_max_phys_size = 64;
42static unsigned int enable_msix = 1; 42static unsigned int enable_msix = 1;
43static unsigned int ring_mode;
44 43
45MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table); 44MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
46MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR); 45MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
@@ -62,10 +61,10 @@ static int beiscsi_slave_configure(struct scsi_device *sdev)
62/*------------------- PCI Driver operations and data ----------------- */ 61/*------------------- PCI Driver operations and data ----------------- */
63static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = { 62static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
64 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) }, 63 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
64 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
65 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) }, 65 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
66 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) }, 66 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
67 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) }, 67 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
68 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID4) },
69 { 0 } 68 { 0 }
70}; 69};
71MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table); 70MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
@@ -112,6 +111,7 @@ static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
112 memset(phba, 0, sizeof(*phba)); 111 memset(phba, 0, sizeof(*phba));
113 phba->shost = shost; 112 phba->shost = shost;
114 phba->pcidev = pci_dev_get(pcidev); 113 phba->pcidev = pci_dev_get(pcidev);
114 pci_set_drvdata(pcidev, phba);
115 115
116 if (iscsi_host_add(shost, &phba->pcidev->dev)) 116 if (iscsi_host_add(shost, &phba->pcidev->dev))
117 goto free_devices; 117 goto free_devices;
@@ -143,6 +143,7 @@ static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
143 struct pci_dev *pcidev) 143 struct pci_dev *pcidev)
144{ 144{
145 u8 __iomem *addr; 145 u8 __iomem *addr;
146 int pcicfg_reg;
146 147
147 addr = ioremap_nocache(pci_resource_start(pcidev, 2), 148 addr = ioremap_nocache(pci_resource_start(pcidev, 2),
148 pci_resource_len(pcidev, 2)); 149 pci_resource_len(pcidev, 2));
@@ -159,13 +160,19 @@ static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
159 phba->db_va = addr; 160 phba->db_va = addr;
160 phba->db_pa.u.a64.address = pci_resource_start(pcidev, 4); 161 phba->db_pa.u.a64.address = pci_resource_start(pcidev, 4);
161 162
162 addr = ioremap_nocache(pci_resource_start(pcidev, 1), 163 if (phba->generation == BE_GEN2)
163 pci_resource_len(pcidev, 1)); 164 pcicfg_reg = 1;
165 else
166 pcicfg_reg = 0;
167
168 addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
169 pci_resource_len(pcidev, pcicfg_reg));
170
164 if (addr == NULL) 171 if (addr == NULL)
165 goto pci_map_err; 172 goto pci_map_err;
166 phba->ctrl.pcicfg = addr; 173 phba->ctrl.pcicfg = addr;
167 phba->pci_va = addr; 174 phba->pci_va = addr;
168 phba->pci_pa.u.a64.address = pci_resource_start(pcidev, 1); 175 phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
169 return 0; 176 return 0;
170 177
171pci_map_err: 178pci_map_err:
@@ -230,29 +237,27 @@ static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
230 237
231static void beiscsi_get_params(struct beiscsi_hba *phba) 238static void beiscsi_get_params(struct beiscsi_hba *phba)
232{ 239{
233 phba->params.ios_per_ctrl = BE2_IO_DEPTH; 240 phba->params.ios_per_ctrl = (phba->fw_config.iscsi_icd_count
234 phba->params.cxns_per_ctrl = BE2_MAX_SESSIONS; 241 - (phba->fw_config.iscsi_cid_count
235 phba->params.asyncpdus_per_ctrl = BE2_ASYNCPDUS; 242 + BE2_TMFS
236 phba->params.icds_per_ctrl = BE2_MAX_ICDS / 2; 243 + BE2_NOPOUT_REQ));
244 phba->params.cxns_per_ctrl = phba->fw_config.iscsi_cid_count;
245 phba->params.asyncpdus_per_ctrl = phba->fw_config.iscsi_cid_count;;
246 phba->params.icds_per_ctrl = phba->fw_config.iscsi_icd_count;;
237 phba->params.num_sge_per_io = BE2_SGE; 247 phba->params.num_sge_per_io = BE2_SGE;
238 phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ; 248 phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
239 phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ; 249 phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
240 phba->params.eq_timer = 64; 250 phba->params.eq_timer = 64;
241 phba->params.num_eq_entries = 251 phba->params.num_eq_entries =
242 (((BE2_CMDS_PER_CXN * 2 + BE2_LOGOUTS + BE2_TMFS + BE2_ASYNCPDUS) / 252 (((BE2_CMDS_PER_CXN * 2 + phba->fw_config.iscsi_cid_count * 2
243 512) + 1) * 512; 253 + BE2_TMFS) / 512) + 1) * 512;
244 phba->params.num_eq_entries = (phba->params.num_eq_entries < 1024) 254 phba->params.num_eq_entries = (phba->params.num_eq_entries < 1024)
245 ? 1024 : phba->params.num_eq_entries; 255 ? 1024 : phba->params.num_eq_entries;
246 SE_DEBUG(DBG_LVL_8, "phba->params.num_eq_entries=%d \n", 256 SE_DEBUG(DBG_LVL_8, "phba->params.num_eq_entries=%d \n",
247 phba->params.num_eq_entries); 257 phba->params.num_eq_entries);
248 phba->params.num_cq_entries = 258 phba->params.num_cq_entries =
249 (((BE2_CMDS_PER_CXN * 2 + BE2_LOGOUTS + BE2_TMFS + BE2_ASYNCPDUS) / 259 (((BE2_CMDS_PER_CXN * 2 + phba->fw_config.iscsi_cid_count * 2
250 512) + 1) * 512; 260 + BE2_TMFS) / 512) + 1) * 512;
251 SE_DEBUG(DBG_LVL_8,
252 "phba->params.num_cq_entries=%d BE2_CMDS_PER_CXN=%d"
253 "BE2_LOGOUTS=%d BE2_TMFS=%d BE2_ASYNCPDUS=%d \n",
254 phba->params.num_cq_entries, BE2_CMDS_PER_CXN,
255 BE2_LOGOUTS, BE2_TMFS, BE2_ASYNCPDUS);
256 phba->params.wrbs_per_cxn = 256; 261 phba->params.wrbs_per_cxn = 256;
257} 262}
258 263
@@ -443,7 +448,7 @@ static irqreturn_t be_isr(int irq, void *dev_id)
443 if (phba->todo_mcc_cq) 448 if (phba->todo_mcc_cq)
444 queue_work(phba->wq, &phba->work_cqs); 449 queue_work(phba->wq, &phba->work_cqs);
445 450
446 if ((num_mcceq_processed) && (!num_ioeq_processed)) 451 if ((num_mcceq_processed) && (!num_ioeq_processed))
447 hwi_ring_eq_db(phba, eq->id, 0, 452 hwi_ring_eq_db(phba, eq->id, 0,
448 (num_ioeq_processed + 453 (num_ioeq_processed +
449 num_mcceq_processed) , 1, 1); 454 num_mcceq_processed) , 1, 1);
@@ -561,6 +566,7 @@ beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
561 SE_DEBUG(DBG_LVL_1, "In ISCSI_OP_REJECT\n"); 566 SE_DEBUG(DBG_LVL_1, "In ISCSI_OP_REJECT\n");
562 break; 567 break;
563 case ISCSI_OP_LOGIN_RSP: 568 case ISCSI_OP_LOGIN_RSP:
569 case ISCSI_OP_TEXT_RSP:
564 task = conn->login_task; 570 task = conn->login_task;
565 io_task = task->dd_data; 571 io_task = task->dd_data;
566 login_hdr = (struct iscsi_hdr *)ppdu; 572 login_hdr = (struct iscsi_hdr *)ppdu;
@@ -631,29 +637,29 @@ free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
631 * alloc_wrb_handle - To allocate a wrb handle 637 * alloc_wrb_handle - To allocate a wrb handle
632 * @phba: The hba pointer 638 * @phba: The hba pointer
633 * @cid: The cid to use for allocation 639 * @cid: The cid to use for allocation
634 * @index: index allocation and wrb index
635 * 640 *
636 * This happens under session_lock until submission to chip 641 * This happens under session_lock until submission to chip
637 */ 642 */
638struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid, 643struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
639 int index)
640{ 644{
641 struct hwi_wrb_context *pwrb_context; 645 struct hwi_wrb_context *pwrb_context;
642 struct hwi_controller *phwi_ctrlr; 646 struct hwi_controller *phwi_ctrlr;
643 struct wrb_handle *pwrb_handle; 647 struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
644 648
645 phwi_ctrlr = phba->phwi_ctrlr; 649 phwi_ctrlr = phba->phwi_ctrlr;
646 pwrb_context = &phwi_ctrlr->wrb_context[cid]; 650 pwrb_context = &phwi_ctrlr->wrb_context[cid];
647 if (pwrb_context->wrb_handles_available) { 651 if (pwrb_context->wrb_handles_available >= 2) {
648 pwrb_handle = pwrb_context->pwrb_handle_base[ 652 pwrb_handle = pwrb_context->pwrb_handle_base[
649 pwrb_context->alloc_index]; 653 pwrb_context->alloc_index];
650 pwrb_context->wrb_handles_available--; 654 pwrb_context->wrb_handles_available--;
651 pwrb_handle->nxt_wrb_index = pwrb_handle->wrb_index;
652 if (pwrb_context->alloc_index == 655 if (pwrb_context->alloc_index ==
653 (phba->params.wrbs_per_cxn - 1)) 656 (phba->params.wrbs_per_cxn - 1))
654 pwrb_context->alloc_index = 0; 657 pwrb_context->alloc_index = 0;
655 else 658 else
656 pwrb_context->alloc_index++; 659 pwrb_context->alloc_index++;
660 pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
661 pwrb_context->alloc_index];
662 pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
657 } else 663 } else
658 pwrb_handle = NULL; 664 pwrb_handle = NULL;
659 return pwrb_handle; 665 return pwrb_handle;
@@ -671,9 +677,7 @@ static void
671free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context, 677free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
672 struct wrb_handle *pwrb_handle) 678 struct wrb_handle *pwrb_handle)
673{ 679{
674 if (!ring_mode) 680 pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
675 pwrb_context->pwrb_handle_base[pwrb_context->free_index] =
676 pwrb_handle;
677 pwrb_context->wrb_handles_available++; 681 pwrb_context->wrb_handles_available++;
678 if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1)) 682 if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
679 pwrb_context->free_index = 0; 683 pwrb_context->free_index = 0;
@@ -790,6 +794,7 @@ be_complete_io(struct beiscsi_conn *beiscsi_conn,
790 memcpy(task->sc->sense_buffer, sense, 794 memcpy(task->sc->sense_buffer, sense,
791 min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE)); 795 min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
792 } 796 }
797
793 if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ) { 798 if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ) {
794 if (psol->dw[offsetof(struct amap_sol_cqe, i_res_cnt) / 32] 799 if (psol->dw[offsetof(struct amap_sol_cqe, i_res_cnt) / 32]
795 & SOL_RES_CNT_MASK) 800 & SOL_RES_CNT_MASK)
@@ -811,6 +816,7 @@ be_complete_logout(struct beiscsi_conn *beiscsi_conn,
811 struct iscsi_conn *conn = beiscsi_conn->conn; 816 struct iscsi_conn *conn = beiscsi_conn->conn;
812 817
813 hdr = (struct iscsi_logout_rsp *)task->hdr; 818 hdr = (struct iscsi_logout_rsp *)task->hdr;
819 hdr->opcode = ISCSI_OP_LOGOUT_RSP;
814 hdr->t2wait = 5; 820 hdr->t2wait = 5;
815 hdr->t2retain = 0; 821 hdr->t2retain = 0;
816 hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32] 822 hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
@@ -825,6 +831,9 @@ be_complete_logout(struct beiscsi_conn *beiscsi_conn,
825 & SOL_EXP_CMD_SN_MASK) + 831 & SOL_EXP_CMD_SN_MASK) +
826 ((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd) 832 ((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
827 / 32] & SOL_CMD_WND_MASK) >> 24) - 1); 833 / 32] & SOL_CMD_WND_MASK) >> 24) - 1);
834 hdr->dlength[0] = 0;
835 hdr->dlength[1] = 0;
836 hdr->dlength[2] = 0;
828 hdr->hlength = 0; 837 hdr->hlength = 0;
829 hdr->itt = io_task->libiscsi_itt; 838 hdr->itt = io_task->libiscsi_itt;
830 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0); 839 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
@@ -839,6 +848,7 @@ be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
839 struct beiscsi_io_task *io_task = task->dd_data; 848 struct beiscsi_io_task *io_task = task->dd_data;
840 849
841 hdr = (struct iscsi_tm_rsp *)task->hdr; 850 hdr = (struct iscsi_tm_rsp *)task->hdr;
851 hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
842 hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32] 852 hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
843 & SOL_FLAGS_MASK) >> 24) | 0x80; 853 & SOL_FLAGS_MASK) >> 24) | 0x80;
844 hdr->response = (psol->dw[offsetof(struct amap_sol_cqe, i_resp) / 854 hdr->response = (psol->dw[offsetof(struct amap_sol_cqe, i_resp) /
@@ -859,7 +869,6 @@ hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
859{ 869{
860 struct hwi_wrb_context *pwrb_context; 870 struct hwi_wrb_context *pwrb_context;
861 struct wrb_handle *pwrb_handle = NULL; 871 struct wrb_handle *pwrb_handle = NULL;
862 struct sgl_handle *psgl_handle = NULL;
863 struct hwi_controller *phwi_ctrlr; 872 struct hwi_controller *phwi_ctrlr;
864 struct iscsi_task *task; 873 struct iscsi_task *task;
865 struct beiscsi_io_task *io_task; 874 struct beiscsi_io_task *io_task;
@@ -867,22 +876,14 @@ hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
867 struct iscsi_session *session = conn->session; 876 struct iscsi_session *session = conn->session;
868 877
869 phwi_ctrlr = phba->phwi_ctrlr; 878 phwi_ctrlr = phba->phwi_ctrlr;
870 if (ring_mode) { 879 pwrb_context = &phwi_ctrlr->wrb_context[((psol->
871 psgl_handle = phba->sgl_hndl_array[((psol->
872 dw[offsetof(struct amap_sol_cqe_ring, icd_index) /
873 32] & SOL_ICD_INDEX_MASK) >> 6)];
874 pwrb_context = &phwi_ctrlr->wrb_context[psgl_handle->cid];
875 task = psgl_handle->task;
876 pwrb_handle = NULL;
877 } else {
878 pwrb_context = &phwi_ctrlr->wrb_context[((psol->
879 dw[offsetof(struct amap_sol_cqe, cid) / 32] & 880 dw[offsetof(struct amap_sol_cqe, cid) / 32] &
880 SOL_CID_MASK) >> 6)]; 881 SOL_CID_MASK) >> 6) -
881 pwrb_handle = pwrb_context->pwrb_handle_basestd[((psol-> 882 phba->fw_config.iscsi_cid_start];
883 pwrb_handle = pwrb_context->pwrb_handle_basestd[((psol->
882 dw[offsetof(struct amap_sol_cqe, wrb_index) / 884 dw[offsetof(struct amap_sol_cqe, wrb_index) /
883 32] & SOL_WRB_INDEX_MASK) >> 16)]; 885 32] & SOL_WRB_INDEX_MASK) >> 16)];
884 task = pwrb_handle->pio_handle; 886 task = pwrb_handle->pio_handle;
885 }
886 887
887 io_task = task->dd_data; 888 io_task = task->dd_data;
888 spin_lock(&phba->mgmt_sgl_lock); 889 spin_lock(&phba->mgmt_sgl_lock);
@@ -923,31 +924,23 @@ static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
923 struct iscsi_wrb *pwrb = NULL; 924 struct iscsi_wrb *pwrb = NULL;
924 struct hwi_controller *phwi_ctrlr; 925 struct hwi_controller *phwi_ctrlr;
925 struct iscsi_task *task; 926 struct iscsi_task *task;
926 struct sgl_handle *psgl_handle = NULL;
927 unsigned int type; 927 unsigned int type;
928 struct iscsi_conn *conn = beiscsi_conn->conn; 928 struct iscsi_conn *conn = beiscsi_conn->conn;
929 struct iscsi_session *session = conn->session; 929 struct iscsi_session *session = conn->session;
930 930
931 phwi_ctrlr = phba->phwi_ctrlr; 931 phwi_ctrlr = phba->phwi_ctrlr;
932 if (ring_mode) { 932 pwrb_context = &phwi_ctrlr->wrb_context[((psol->dw[offsetof
933 psgl_handle = phba->sgl_hndl_array[((psol->
934 dw[offsetof(struct amap_sol_cqe_ring, icd_index) /
935 32] & SOL_ICD_INDEX_MASK) >> 6)];
936 task = psgl_handle->task;
937 type = psgl_handle->type;
938 } else {
939 pwrb_context = &phwi_ctrlr->
940 wrb_context[((psol->dw[offsetof
941 (struct amap_sol_cqe, cid) / 32] 933 (struct amap_sol_cqe, cid) / 32]
942 & SOL_CID_MASK) >> 6)]; 934 & SOL_CID_MASK) >> 6) -
943 pwrb_handle = pwrb_context->pwrb_handle_basestd[((psol-> 935 phba->fw_config.iscsi_cid_start];
936 pwrb_handle = pwrb_context->pwrb_handle_basestd[((psol->
944 dw[offsetof(struct amap_sol_cqe, wrb_index) / 937 dw[offsetof(struct amap_sol_cqe, wrb_index) /
945 32] & SOL_WRB_INDEX_MASK) >> 16)]; 938 32] & SOL_WRB_INDEX_MASK) >> 16)];
946 task = pwrb_handle->pio_handle; 939 task = pwrb_handle->pio_handle;
947 pwrb = pwrb_handle->pwrb; 940 pwrb = pwrb_handle->pwrb;
948 type = (pwrb->dw[offsetof(struct amap_iscsi_wrb, type) / 32] & 941 type = (pwrb->dw[offsetof(struct amap_iscsi_wrb, type) / 32] &
949 WRB_TYPE_MASK) >> 28; 942 WRB_TYPE_MASK) >> 28;
950 } 943
951 spin_lock_bh(&session->lock); 944 spin_lock_bh(&session->lock);
952 switch (type) { 945 switch (type) {
953 case HWH_TYPE_IO: 946 case HWH_TYPE_IO:
@@ -978,15 +971,7 @@ static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
978 break; 971 break;
979 972
980 default: 973 default:
981 if (ring_mode) 974 shost_printk(KERN_WARNING, phba->shost,
982 shost_printk(KERN_WARNING, phba->shost,
983 "In hwi_complete_cmd, unknown type = %d"
984 "icd_index 0x%x CID 0x%x\n", type,
985 ((psol->dw[offsetof(struct amap_sol_cqe_ring,
986 icd_index) / 32] & SOL_ICD_INDEX_MASK) >> 6),
987 psgl_handle->cid);
988 else
989 shost_printk(KERN_WARNING, phba->shost,
990 "In hwi_complete_cmd, unknown type = %d" 975 "In hwi_complete_cmd, unknown type = %d"
991 "wrb_index 0x%x CID 0x%x\n", type, 976 "wrb_index 0x%x CID 0x%x\n", type,
992 ((psol->dw[offsetof(struct amap_iscsi_wrb, 977 ((psol->dw[offsetof(struct amap_iscsi_wrb,
@@ -1077,7 +1062,8 @@ hwi_get_async_handle(struct beiscsi_hba *phba,
1077 1062
1078 WARN_ON(!pasync_handle); 1063 WARN_ON(!pasync_handle);
1079 1064
1080 pasync_handle->cri = (unsigned short)beiscsi_conn->beiscsi_conn_cid; 1065 pasync_handle->cri = (unsigned short)beiscsi_conn->beiscsi_conn_cid -
1066 phba->fw_config.iscsi_cid_start;
1081 pasync_handle->is_header = is_header; 1067 pasync_handle->is_header = is_header;
1082 pasync_handle->buffer_len = ((pdpdu_cqe-> 1068 pasync_handle->buffer_len = ((pdpdu_cqe->
1083 dw[offsetof(struct amap_i_t_dpdu_cqe, dpl) / 32] 1069 dw[offsetof(struct amap_i_t_dpdu_cqe, dpl) / 32]
@@ -1327,9 +1313,10 @@ hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1327 } 1313 }
1328 1314
1329 status = beiscsi_process_async_pdu(beiscsi_conn, phba, 1315 status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1330 beiscsi_conn->beiscsi_conn_cid, 1316 (beiscsi_conn->beiscsi_conn_cid -
1331 phdr, hdr_len, pfirst_buffer, 1317 phba->fw_config.iscsi_cid_start),
1332 buf_len); 1318 phdr, hdr_len, pfirst_buffer,
1319 buf_len);
1333 1320
1334 if (status == 0) 1321 if (status == 0)
1335 hwi_free_async_msg(phba, cri); 1322 hwi_free_async_msg(phba, cri);
@@ -1422,6 +1409,48 @@ static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
1422 hwi_post_async_buffers(phba, pasync_handle->is_header); 1409 hwi_post_async_buffers(phba, pasync_handle->is_header);
1423} 1410}
1424 1411
1412static void beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
1413{
1414 struct be_queue_info *mcc_cq;
1415 struct be_mcc_compl *mcc_compl;
1416 unsigned int num_processed = 0;
1417
1418 mcc_cq = &phba->ctrl.mcc_obj.cq;
1419 mcc_compl = queue_tail_node(mcc_cq);
1420 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1421 while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
1422
1423 if (num_processed >= 32) {
1424 hwi_ring_cq_db(phba, mcc_cq->id,
1425 num_processed, 0, 0);
1426 num_processed = 0;
1427 }
1428 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
1429 /* Interpret flags as an async trailer */
1430 if (is_link_state_evt(mcc_compl->flags))
1431 /* Interpret compl as a async link evt */
1432 beiscsi_async_link_state_process(phba,
1433 (struct be_async_event_link_state *) mcc_compl);
1434 else
1435 SE_DEBUG(DBG_LVL_1,
1436 " Unsupported Async Event, flags"
1437 " = 0x%08x \n", mcc_compl->flags);
1438 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
1439 be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
1440 atomic_dec(&phba->ctrl.mcc_obj.q.used);
1441 }
1442
1443 mcc_compl->flags = 0;
1444 queue_tail_inc(mcc_cq);
1445 mcc_compl = queue_tail_node(mcc_cq);
1446 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1447 num_processed++;
1448 }
1449
1450 if (num_processed > 0)
1451 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);
1452
1453}
1425 1454
1426static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq) 1455static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
1427{ 1456{
@@ -1431,7 +1460,8 @@ static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
1431 unsigned int num_processed = 0; 1460 unsigned int num_processed = 0;
1432 unsigned int tot_nump = 0; 1461 unsigned int tot_nump = 0;
1433 struct beiscsi_conn *beiscsi_conn; 1462 struct beiscsi_conn *beiscsi_conn;
1434 struct sgl_handle *psgl_handle = NULL; 1463 struct beiscsi_endpoint *beiscsi_ep;
1464 struct iscsi_endpoint *ep;
1435 struct beiscsi_hba *phba; 1465 struct beiscsi_hba *phba;
1436 1466
1437 cq = pbe_eq->cq; 1467 cq = pbe_eq->cq;
@@ -1442,32 +1472,13 @@ static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
1442 CQE_VALID_MASK) { 1472 CQE_VALID_MASK) {
1443 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe)); 1473 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
1444 1474
1445 if (ring_mode) { 1475 ep = phba->ep_array[(u32) ((sol->
1446 psgl_handle = phba->sgl_hndl_array[((sol-> 1476 dw[offsetof(struct amap_sol_cqe, cid) / 32] &
1447 dw[offsetof(struct amap_sol_cqe_ring, 1477 SOL_CID_MASK) >> 6) -
1448 icd_index) / 32] & SOL_ICD_INDEX_MASK) 1478 phba->fw_config.iscsi_cid_start];
1449 >> 6)];
1450 beiscsi_conn = phba->conn_table[psgl_handle->cid];
1451 if (!beiscsi_conn || !beiscsi_conn->ep) {
1452 shost_printk(KERN_WARNING, phba->shost,
1453 "Connection table empty for cid = %d\n",
1454 psgl_handle->cid);
1455 return 0;
1456 }
1457 1479
1458 } else { 1480 beiscsi_ep = ep->dd_data;
1459 beiscsi_conn = phba->conn_table[(u32) (sol-> 1481 beiscsi_conn = beiscsi_ep->conn;
1460 dw[offsetof(struct amap_sol_cqe, cid) / 32] &
1461 SOL_CID_MASK) >> 6];
1462
1463 if (!beiscsi_conn || !beiscsi_conn->ep) {
1464 shost_printk(KERN_WARNING, phba->shost,
1465 "Connection table empty for cid = %d\n",
1466 (u32)(sol->dw[offsetof(struct amap_sol_cqe,
1467 cid) / 32] & SOL_CID_MASK) >> 6);
1468 return 0;
1469 }
1470 }
1471 1482
1472 if (num_processed >= 32) { 1483 if (num_processed >= 32) {
1473 hwi_ring_cq_db(phba, cq->id, 1484 hwi_ring_cq_db(phba, cq->id,
@@ -1511,21 +1522,13 @@ static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
1511 case CMD_CXN_KILLED_ITT_INVALID: 1522 case CMD_CXN_KILLED_ITT_INVALID:
1512 case CMD_CXN_KILLED_SEQ_OUTOFORDER: 1523 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
1513 case CMD_CXN_KILLED_INVALID_DATASN_RCVD: 1524 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
1514 if (ring_mode) { 1525 SE_DEBUG(DBG_LVL_1,
1515 SE_DEBUG(DBG_LVL_1,
1516 "CQ Error notification for cmd.. "
1517 "code %d cid 0x%x\n",
1518 sol->dw[offsetof(struct amap_sol_cqe, code) /
1519 32] & CQE_CODE_MASK, psgl_handle->cid);
1520 } else {
1521 SE_DEBUG(DBG_LVL_1,
1522 "CQ Error notification for cmd.. " 1526 "CQ Error notification for cmd.. "
1523 "code %d cid 0x%x\n", 1527 "code %d cid 0x%x\n",
1524 sol->dw[offsetof(struct amap_sol_cqe, code) / 1528 sol->dw[offsetof(struct amap_sol_cqe, code) /
1525 32] & CQE_CODE_MASK, 1529 32] & CQE_CODE_MASK,
1526 (sol->dw[offsetof(struct amap_sol_cqe, cid) / 1530 (sol->dw[offsetof(struct amap_sol_cqe, cid) /
1527 32] & SOL_CID_MASK)); 1531 32] & SOL_CID_MASK));
1528 }
1529 break; 1532 break;
1530 case UNSOL_DATA_DIGEST_ERROR_NOTIFY: 1533 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
1531 SE_DEBUG(DBG_LVL_1, 1534 SE_DEBUG(DBG_LVL_1,
@@ -1547,37 +1550,23 @@ static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
1547 case CXN_KILLED_OVER_RUN_RESIDUAL: 1550 case CXN_KILLED_OVER_RUN_RESIDUAL:
1548 case CXN_KILLED_UNDER_RUN_RESIDUAL: 1551 case CXN_KILLED_UNDER_RUN_RESIDUAL:
1549 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN: 1552 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
1550 if (ring_mode) { 1553 SE_DEBUG(DBG_LVL_1, "CQ Error %d, reset CID "
1551 SE_DEBUG(DBG_LVL_1, "CQ Error %d, reset CID "
1552 "0x%x...\n",
1553 sol->dw[offsetof(struct amap_sol_cqe, code) /
1554 32] & CQE_CODE_MASK, psgl_handle->cid);
1555 } else {
1556 SE_DEBUG(DBG_LVL_1, "CQ Error %d, reset CID "
1557 "0x%x...\n", 1554 "0x%x...\n",
1558 sol->dw[offsetof(struct amap_sol_cqe, code) / 1555 sol->dw[offsetof(struct amap_sol_cqe, code) /
1559 32] & CQE_CODE_MASK, 1556 32] & CQE_CODE_MASK,
1560 sol->dw[offsetof(struct amap_sol_cqe, cid) / 1557 (sol->dw[offsetof(struct amap_sol_cqe, cid) /
1561 32] & CQE_CID_MASK); 1558 32] & CQE_CID_MASK));
1562 }
1563 iscsi_conn_failure(beiscsi_conn->conn, 1559 iscsi_conn_failure(beiscsi_conn->conn,
1564 ISCSI_ERR_CONN_FAILED); 1560 ISCSI_ERR_CONN_FAILED);
1565 break; 1561 break;
1566 case CXN_KILLED_RST_SENT: 1562 case CXN_KILLED_RST_SENT:
1567 case CXN_KILLED_RST_RCVD: 1563 case CXN_KILLED_RST_RCVD:
1568 if (ring_mode) { 1564 SE_DEBUG(DBG_LVL_1, "CQ Error %d, reset"
1569 SE_DEBUG(DBG_LVL_1, "CQ Error %d, reset"
1570 "received/sent on CID 0x%x...\n",
1571 sol->dw[offsetof(struct amap_sol_cqe, code) /
1572 32] & CQE_CODE_MASK, psgl_handle->cid);
1573 } else {
1574 SE_DEBUG(DBG_LVL_1, "CQ Error %d, reset"
1575 "received/sent on CID 0x%x...\n", 1565 "received/sent on CID 0x%x...\n",
1576 sol->dw[offsetof(struct amap_sol_cqe, code) / 1566 sol->dw[offsetof(struct amap_sol_cqe, code) /
1577 32] & CQE_CODE_MASK, 1567 32] & CQE_CODE_MASK,
1578 sol->dw[offsetof(struct amap_sol_cqe, cid) / 1568 (sol->dw[offsetof(struct amap_sol_cqe, cid) /
1579 32] & CQE_CID_MASK); 1569 32] & CQE_CID_MASK));
1580 }
1581 iscsi_conn_failure(beiscsi_conn->conn, 1570 iscsi_conn_failure(beiscsi_conn->conn,
1582 ISCSI_ERR_CONN_FAILED); 1571 ISCSI_ERR_CONN_FAILED);
1583 break; 1572 break;
@@ -1586,8 +1575,8 @@ static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
1586 "received on CID 0x%x...\n", 1575 "received on CID 0x%x...\n",
1587 sol->dw[offsetof(struct amap_sol_cqe, code) / 1576 sol->dw[offsetof(struct amap_sol_cqe, code) /
1588 32] & CQE_CODE_MASK, 1577 32] & CQE_CODE_MASK,
1589 sol->dw[offsetof(struct amap_sol_cqe, cid) / 1578 (sol->dw[offsetof(struct amap_sol_cqe, cid) /
1590 32] & CQE_CID_MASK); 1579 32] & CQE_CID_MASK));
1591 break; 1580 break;
1592 } 1581 }
1593 1582
@@ -1604,7 +1593,7 @@ static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
1604 return tot_nump; 1593 return tot_nump;
1605} 1594}
1606 1595
1607static void beiscsi_process_all_cqs(struct work_struct *work) 1596void beiscsi_process_all_cqs(struct work_struct *work)
1608{ 1597{
1609 unsigned long flags; 1598 unsigned long flags;
1610 struct hwi_controller *phwi_ctrlr; 1599 struct hwi_controller *phwi_ctrlr;
@@ -1624,6 +1613,7 @@ static void beiscsi_process_all_cqs(struct work_struct *work)
1624 spin_lock_irqsave(&phba->isr_lock, flags); 1613 spin_lock_irqsave(&phba->isr_lock, flags);
1625 phba->todo_mcc_cq = 0; 1614 phba->todo_mcc_cq = 0;
1626 spin_unlock_irqrestore(&phba->isr_lock, flags); 1615 spin_unlock_irqrestore(&phba->isr_lock, flags);
1616 beiscsi_process_mcc_isr(phba);
1627 } 1617 }
1628 1618
1629 if (phba->todo_cq) { 1619 if (phba->todo_cq) {
@@ -1668,7 +1658,8 @@ hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
1668 io_task->bhs_pa.u.a32.address_hi); 1658 io_task->bhs_pa.u.a32.address_hi);
1669 1659
1670 l_sg = sg; 1660 l_sg = sg;
1671 for (index = 0; (index < num_sg) && (index < 2); index++, sg_next(sg)) { 1661 for (index = 0; (index < num_sg) && (index < 2); index++,
1662 sg = sg_next(sg)) {
1672 if (index == 0) { 1663 if (index == 0) {
1673 sg_len = sg_dma_len(sg); 1664 sg_len = sg_dma_len(sg);
1674 addr = (u64) sg_dma_address(sg); 1665 addr = (u64) sg_dma_address(sg);
@@ -1679,11 +1670,7 @@ hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
1679 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb, 1670 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
1680 sg_len); 1671 sg_len);
1681 sge_len = sg_len; 1672 sge_len = sg_len;
1682 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
1683 1);
1684 } else { 1673 } else {
1685 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
1686 0);
1687 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset, 1674 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
1688 pwrb, sge_len); 1675 pwrb, sge_len);
1689 sg_len = sg_dma_len(sg); 1676 sg_len = sg_dma_len(sg);
@@ -1706,13 +1693,27 @@ hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
1706 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 1693 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
1707 io_task->bhs_pa.u.a32.address_lo); 1694 io_task->bhs_pa.u.a32.address_lo);
1708 1695
1709 if (num_sg == 2) 1696 if (num_sg == 1) {
1710 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb, 1); 1697 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
1698 1);
1699 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
1700 0);
1701 } else if (num_sg == 2) {
1702 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
1703 0);
1704 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
1705 1);
1706 } else {
1707 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
1708 0);
1709 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
1710 0);
1711 }
1711 sg = l_sg; 1712 sg = l_sg;
1712 psgl++; 1713 psgl++;
1713 psgl++; 1714 psgl++;
1714 offset = 0; 1715 offset = 0;
1715 for (index = 0; index < num_sg; index++, sg_next(sg), psgl++) { 1716 for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
1716 sg_len = sg_dma_len(sg); 1717 sg_len = sg_dma_len(sg);
1717 addr = (u64) sg_dma_address(sg); 1718 addr = (u64) sg_dma_address(sg);
1718 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 1719 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
@@ -2048,10 +2049,9 @@ static void beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2048 } 2049 }
2049 idx = 0; 2050 idx = 0;
2050 pwrb = mem_descr_wrb->mem_array[idx].virtual_address; 2051 pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2051 num_cxn_wrb = 2052 num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2052 ((mem_descr_wrb->mem_array[idx].size) / (sizeof(struct iscsi_wrb)) * 2053 ((sizeof(struct iscsi_wrb) *
2053 phba->params.wrbs_per_cxn); 2054 phba->params.wrbs_per_cxn));
2054
2055 for (index = 0; index < phba->params.cxns_per_ctrl; index += 2) { 2055 for (index = 0; index < phba->params.cxns_per_ctrl; index += 2) {
2056 pwrb_context = &phwi_ctrlr->wrb_context[index]; 2056 pwrb_context = &phwi_ctrlr->wrb_context[index];
2057 if (num_cxn_wrb) { 2057 if (num_cxn_wrb) {
@@ -2064,9 +2064,9 @@ static void beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2064 } else { 2064 } else {
2065 idx++; 2065 idx++;
2066 pwrb = mem_descr_wrb->mem_array[idx].virtual_address; 2066 pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2067 num_cxn_wrb = ((mem_descr_wrb->mem_array[idx].size) / 2067 num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2068 (sizeof(struct iscsi_wrb)) * 2068 ((sizeof(struct iscsi_wrb) *
2069 phba->params.wrbs_per_cxn); 2069 phba->params.wrbs_per_cxn));
2070 for (j = 0; j < phba->params.wrbs_per_cxn; j++) { 2070 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2071 pwrb_handle = pwrb_context->pwrb_handle_base[j]; 2071 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2072 pwrb_handle->pwrb = pwrb; 2072 pwrb_handle->pwrb = pwrb;
@@ -2383,7 +2383,7 @@ static int beiscsi_create_cqs(struct beiscsi_hba *phba,
2383 &paddr); 2383 &paddr);
2384 if (!cq_vaddress) 2384 if (!cq_vaddress)
2385 goto create_cq_error; 2385 goto create_cq_error;
2386 ret = be_fill_queue(cq, phba->params.icds_per_ctrl / 2, 2386 ret = be_fill_queue(cq, phba->params.num_cq_entries,
2387 sizeof(struct sol_cqe), cq_vaddress); 2387 sizeof(struct sol_cqe), cq_vaddress);
2388 if (ret) { 2388 if (ret) {
2389 shost_printk(KERN_ERR, phba->shost, 2389 shost_printk(KERN_ERR, phba->shost,
@@ -2634,7 +2634,8 @@ beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
2634 "wrbq create failed."); 2634 "wrbq create failed.");
2635 return status; 2635 return status;
2636 } 2636 }
2637 phwi_ctrlr->wrb_context[i].cid = phwi_context->be_wrbq[i].id; 2637 phwi_ctrlr->wrb_context[i * 2].cid = phwi_context->be_wrbq[i].
2638 id;
2638 } 2639 }
2639 kfree(pwrb_arr); 2640 kfree(pwrb_arr);
2640 return 0; 2641 return 0;
@@ -2803,17 +2804,6 @@ static int hwi_init_port(struct beiscsi_hba *phba)
2803 goto error; 2804 goto error;
2804 } 2805 }
2805 2806
2806 if (phba->fw_config.iscsi_features == 0x1)
2807 ring_mode = 1;
2808 else
2809 ring_mode = 0;
2810 status = mgmt_get_fw_config(ctrl, phba);
2811 if (status != 0) {
2812 shost_printk(KERN_ERR, phba->shost,
2813 "Error getting fw config\n");
2814 goto error;
2815 }
2816
2817 status = beiscsi_create_cqs(phba, phwi_context); 2807 status = beiscsi_create_cqs(phba, phwi_context);
2818 if (status != 0) { 2808 if (status != 0) {
2819 shost_printk(KERN_ERR, phba->shost, "CQ not created\n"); 2809 shost_printk(KERN_ERR, phba->shost, "CQ not created\n");
@@ -2941,17 +2931,6 @@ static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
2941 phba->io_sgl_hndl_avbl = 0; 2931 phba->io_sgl_hndl_avbl = 0;
2942 phba->eh_sgl_hndl_avbl = 0; 2932 phba->eh_sgl_hndl_avbl = 0;
2943 2933
2944 if (ring_mode) {
2945 phba->sgl_hndl_array = kzalloc(sizeof(struct sgl_handle *) *
2946 phba->params.icds_per_ctrl,
2947 GFP_KERNEL);
2948 if (!phba->sgl_hndl_array) {
2949 shost_printk(KERN_ERR, phba->shost,
2950 "Mem Alloc Failed. Failing to load\n");
2951 return -ENOMEM;
2952 }
2953 }
2954
2955 mem_descr_sglh = phba->init_mem; 2934 mem_descr_sglh = phba->init_mem;
2956 mem_descr_sglh += HWI_MEM_SGLH; 2935 mem_descr_sglh += HWI_MEM_SGLH;
2957 if (1 == mem_descr_sglh->num_elements) { 2936 if (1 == mem_descr_sglh->num_elements) {
@@ -2959,8 +2938,6 @@ static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
2959 phba->params.ios_per_ctrl, 2938 phba->params.ios_per_ctrl,
2960 GFP_KERNEL); 2939 GFP_KERNEL);
2961 if (!phba->io_sgl_hndl_base) { 2940 if (!phba->io_sgl_hndl_base) {
2962 if (ring_mode)
2963 kfree(phba->sgl_hndl_array);
2964 shost_printk(KERN_ERR, phba->shost, 2941 shost_printk(KERN_ERR, phba->shost,
2965 "Mem Alloc Failed. Failing to load\n"); 2942 "Mem Alloc Failed. Failing to load\n");
2966 return -ENOMEM; 2943 return -ENOMEM;
@@ -3032,7 +3009,7 @@ static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3032 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0); 3009 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
3033 pfrag += phba->params.num_sge_per_io; 3010 pfrag += phba->params.num_sge_per_io;
3034 psgl_handle->sgl_index = 3011 psgl_handle->sgl_index =
3035 phba->fw_config.iscsi_cid_start + arr_index++; 3012 phba->fw_config.iscsi_icd_start + arr_index++;
3036 } 3013 }
3037 idx++; 3014 idx++;
3038 } 3015 }
@@ -3047,7 +3024,7 @@ static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
3047{ 3024{
3048 int i, new_cid; 3025 int i, new_cid;
3049 3026
3050 phba->cid_array = kmalloc(sizeof(void *) * phba->params.cxns_per_ctrl, 3027 phba->cid_array = kzalloc(sizeof(void *) * phba->params.cxns_per_ctrl,
3051 GFP_KERNEL); 3028 GFP_KERNEL);
3052 if (!phba->cid_array) { 3029 if (!phba->cid_array) {
3053 shost_printk(KERN_ERR, phba->shost, 3030 shost_printk(KERN_ERR, phba->shost,
@@ -3055,7 +3032,7 @@ static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
3055 "hba_setup_cid_tbls\n"); 3032 "hba_setup_cid_tbls\n");
3056 return -ENOMEM; 3033 return -ENOMEM;
3057 } 3034 }
3058 phba->ep_array = kmalloc(sizeof(struct iscsi_endpoint *) * 3035 phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
3059 phba->params.cxns_per_ctrl * 2, GFP_KERNEL); 3036 phba->params.cxns_per_ctrl * 2, GFP_KERNEL);
3060 if (!phba->ep_array) { 3037 if (!phba->ep_array) {
3061 shost_printk(KERN_ERR, phba->shost, 3038 shost_printk(KERN_ERR, phba->shost,
@@ -3064,7 +3041,7 @@ static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
3064 kfree(phba->cid_array); 3041 kfree(phba->cid_array);
3065 return -ENOMEM; 3042 return -ENOMEM;
3066 } 3043 }
3067 new_cid = phba->fw_config.iscsi_icd_start; 3044 new_cid = phba->fw_config.iscsi_cid_start;
3068 for (i = 0; i < phba->params.cxns_per_ctrl; i++) { 3045 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3069 phba->cid_array[i] = new_cid; 3046 phba->cid_array[i] = new_cid;
3070 new_cid += 2; 3047 new_cid += 2;
@@ -3145,8 +3122,6 @@ static int beiscsi_init_port(struct beiscsi_hba *phba)
3145 if (hba_setup_cid_tbls(phba)) { 3122 if (hba_setup_cid_tbls(phba)) {
3146 shost_printk(KERN_ERR, phba->shost, 3123 shost_printk(KERN_ERR, phba->shost,
3147 "Failed in hba_setup_cid_tbls\n"); 3124 "Failed in hba_setup_cid_tbls\n");
3148 if (ring_mode)
3149 kfree(phba->sgl_hndl_array);
3150 kfree(phba->io_sgl_hndl_base); 3125 kfree(phba->io_sgl_hndl_base);
3151 kfree(phba->eh_sgl_hndl_base); 3126 kfree(phba->eh_sgl_hndl_base);
3152 goto do_cleanup_ctrlr; 3127 goto do_cleanup_ctrlr;
@@ -3166,6 +3141,7 @@ static void hwi_purge_eq(struct beiscsi_hba *phba)
3166 struct be_queue_info *eq; 3141 struct be_queue_info *eq;
3167 struct be_eq_entry *eqe = NULL; 3142 struct be_eq_entry *eqe = NULL;
3168 int i, eq_msix; 3143 int i, eq_msix;
3144 unsigned int num_processed;
3169 3145
3170 phwi_ctrlr = phba->phwi_ctrlr; 3146 phwi_ctrlr = phba->phwi_ctrlr;
3171 phwi_context = phwi_ctrlr->phwi_ctxt; 3147 phwi_context = phwi_ctrlr->phwi_ctxt;
@@ -3177,13 +3153,17 @@ static void hwi_purge_eq(struct beiscsi_hba *phba)
3177 for (i = 0; i < (phba->num_cpus + eq_msix); i++) { 3153 for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
3178 eq = &phwi_context->be_eq[i].q; 3154 eq = &phwi_context->be_eq[i].q;
3179 eqe = queue_tail_node(eq); 3155 eqe = queue_tail_node(eq);
3180 3156 num_processed = 0;
3181 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] 3157 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
3182 & EQE_VALID_MASK) { 3158 & EQE_VALID_MASK) {
3183 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0); 3159 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
3184 queue_tail_inc(eq); 3160 queue_tail_inc(eq);
3185 eqe = queue_tail_node(eq); 3161 eqe = queue_tail_node(eq);
3162 num_processed++;
3186 } 3163 }
3164
3165 if (num_processed)
3166 hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
3187 } 3167 }
3188} 3168}
3189 3169
@@ -3195,10 +3175,9 @@ static void beiscsi_clean_port(struct beiscsi_hba *phba)
3195 if (mgmt_status) 3175 if (mgmt_status)
3196 shost_printk(KERN_WARNING, phba->shost, 3176 shost_printk(KERN_WARNING, phba->shost,
3197 "mgmt_epfw_cleanup FAILED \n"); 3177 "mgmt_epfw_cleanup FAILED \n");
3198 hwi_cleanup(phba); 3178
3199 hwi_purge_eq(phba); 3179 hwi_purge_eq(phba);
3200 if (ring_mode) 3180 hwi_cleanup(phba);
3201 kfree(phba->sgl_hndl_array);
3202 kfree(phba->io_sgl_hndl_base); 3181 kfree(phba->io_sgl_hndl_base);
3203 kfree(phba->eh_sgl_hndl_base); 3182 kfree(phba->eh_sgl_hndl_base);
3204 kfree(phba->cid_array); 3183 kfree(phba->cid_array);
@@ -3219,7 +3198,8 @@ beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
3219 * We can always use 0 here because it is reserved by libiscsi for 3198 * We can always use 0 here because it is reserved by libiscsi for
3220 * login/startup related tasks. 3199 * login/startup related tasks.
3221 */ 3200 */
3222 pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid, 0); 3201 pwrb_handle = alloc_wrb_handle(phba, (beiscsi_conn->beiscsi_conn_cid -
3202 phba->fw_config.iscsi_cid_start));
3223 pwrb = (struct iscsi_target_context_update_wrb *)pwrb_handle->pwrb; 3203 pwrb = (struct iscsi_target_context_update_wrb *)pwrb_handle->pwrb;
3224 memset(pwrb, 0, sizeof(*pwrb)); 3204 memset(pwrb, 0, sizeof(*pwrb));
3225 AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, 3205 AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
@@ -3283,8 +3263,7 @@ beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
3283 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_target_context_update_wrb)); 3263 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_target_context_update_wrb));
3284 3264
3285 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK; 3265 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
3286 if (!ring_mode) 3266 doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
3287 doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
3288 << DB_DEF_PDU_WRB_INDEX_SHIFT; 3267 << DB_DEF_PDU_WRB_INDEX_SHIFT;
3289 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT; 3268 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
3290 3269
@@ -3328,8 +3307,9 @@ static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
3328 io_task->bhs_pa.u.a64.address = paddr; 3307 io_task->bhs_pa.u.a64.address = paddr;
3329 io_task->libiscsi_itt = (itt_t)task->itt; 3308 io_task->libiscsi_itt = (itt_t)task->itt;
3330 io_task->pwrb_handle = alloc_wrb_handle(phba, 3309 io_task->pwrb_handle = alloc_wrb_handle(phba,
3331 beiscsi_conn->beiscsi_conn_cid, 3310 beiscsi_conn->beiscsi_conn_cid -
3332 task->itt); 3311 phba->fw_config.iscsi_cid_start
3312 );
3333 io_task->conn = beiscsi_conn; 3313 io_task->conn = beiscsi_conn;
3334 3314
3335 task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr; 3315 task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
@@ -3343,7 +3323,7 @@ static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
3343 goto free_hndls; 3323 goto free_hndls;
3344 } else { 3324 } else {
3345 io_task->scsi_cmnd = NULL; 3325 io_task->scsi_cmnd = NULL;
3346 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) { 3326 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
3347 if (!beiscsi_conn->login_in_progress) { 3327 if (!beiscsi_conn->login_in_progress) {
3348 spin_lock(&phba->mgmt_sgl_lock); 3328 spin_lock(&phba->mgmt_sgl_lock);
3349 io_task->psgl_handle = (struct sgl_handle *) 3329 io_task->psgl_handle = (struct sgl_handle *)
@@ -3370,21 +3350,16 @@ static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
3370 itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle-> 3350 itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
3371 wrb_index << 16) | (unsigned int) 3351 wrb_index << 16) | (unsigned int)
3372 (io_task->psgl_handle->sgl_index)); 3352 (io_task->psgl_handle->sgl_index));
3373 if (ring_mode) { 3353 io_task->pwrb_handle->pio_handle = task;
3374 phba->sgl_hndl_array[io_task->psgl_handle->sgl_index -
3375 phba->fw_config.iscsi_cid_start] =
3376 io_task->psgl_handle;
3377 io_task->psgl_handle->task = task;
3378 io_task->psgl_handle->cid = beiscsi_conn->beiscsi_conn_cid;
3379 } else
3380 io_task->pwrb_handle->pio_handle = task;
3381 3354
3382 io_task->cmd_bhs->iscsi_hdr.itt = itt; 3355 io_task->cmd_bhs->iscsi_hdr.itt = itt;
3383 return 0; 3356 return 0;
3384 3357
3385free_hndls: 3358free_hndls:
3386 phwi_ctrlr = phba->phwi_ctrlr; 3359 phwi_ctrlr = phba->phwi_ctrlr;
3387 pwrb_context = &phwi_ctrlr->wrb_context[beiscsi_conn->beiscsi_conn_cid]; 3360 pwrb_context = &phwi_ctrlr->wrb_context[
3361 beiscsi_conn->beiscsi_conn_cid -
3362 phba->fw_config.iscsi_cid_start];
3388 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle); 3363 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
3389 io_task->pwrb_handle = NULL; 3364 io_task->pwrb_handle = NULL;
3390 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs, 3365 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
@@ -3404,7 +3379,8 @@ static void beiscsi_cleanup_task(struct iscsi_task *task)
3404 struct hwi_controller *phwi_ctrlr; 3379 struct hwi_controller *phwi_ctrlr;
3405 3380
3406 phwi_ctrlr = phba->phwi_ctrlr; 3381 phwi_ctrlr = phba->phwi_ctrlr;
3407 pwrb_context = &phwi_ctrlr->wrb_context[beiscsi_conn->beiscsi_conn_cid]; 3382 pwrb_context = &phwi_ctrlr->wrb_context[beiscsi_conn->beiscsi_conn_cid
3383 - phba->fw_config.iscsi_cid_start];
3408 if (io_task->pwrb_handle) { 3384 if (io_task->pwrb_handle) {
3409 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle); 3385 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
3410 io_task->pwrb_handle = NULL; 3386 io_task->pwrb_handle = NULL;
@@ -3460,18 +3436,12 @@ static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
3460 ISCSI_OPCODE_SCSI_DATA_OUT); 3436 ISCSI_OPCODE_SCSI_DATA_OUT);
3461 AMAP_SET_BITS(struct amap_pdu_data_out, final_bit, 3437 AMAP_SET_BITS(struct amap_pdu_data_out, final_bit,
3462 &io_task->cmd_bhs->iscsi_data_pdu, 1); 3438 &io_task->cmd_bhs->iscsi_data_pdu, 1);
3463 if (ring_mode) 3439 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3464 io_task->psgl_handle->type = INI_WR_CMD; 3440 INI_WR_CMD);
3465 else
3466 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3467 INI_WR_CMD);
3468 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1); 3441 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
3469 } else { 3442 } else {
3470 if (ring_mode) 3443 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3471 io_task->psgl_handle->type = INI_RD_CMD; 3444 INI_RD_CMD);
3472 else
3473 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3474 INI_RD_CMD);
3475 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0); 3445 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
3476 } 3446 }
3477 memcpy(&io_task->cmd_bhs->iscsi_data_pdu. 3447 memcpy(&io_task->cmd_bhs->iscsi_data_pdu.
@@ -3496,8 +3466,7 @@ static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
3496 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb)); 3466 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
3497 3467
3498 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK; 3468 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
3499 if (!ring_mode) 3469 doorbell |= (io_task->pwrb_handle->wrb_index &
3500 doorbell |= (io_task->pwrb_handle->wrb_index &
3501 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT; 3470 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
3502 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT; 3471 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
3503 3472
@@ -3519,49 +3488,46 @@ static int beiscsi_mtask(struct iscsi_task *task)
3519 unsigned int doorbell = 0; 3488 unsigned int doorbell = 0;
3520 unsigned int i, cid; 3489 unsigned int i, cid;
3521 struct iscsi_task *aborted_task; 3490 struct iscsi_task *aborted_task;
3491 unsigned int tag;
3522 3492
3523 cid = beiscsi_conn->beiscsi_conn_cid; 3493 cid = beiscsi_conn->beiscsi_conn_cid;
3524 pwrb = io_task->pwrb_handle->pwrb; 3494 pwrb = io_task->pwrb_handle->pwrb;
3495 memset(pwrb, 0, sizeof(*pwrb));
3525 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 3496 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
3526 be32_to_cpu(task->cmdsn)); 3497 be32_to_cpu(task->cmdsn));
3527 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb, 3498 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
3528 io_task->pwrb_handle->wrb_index); 3499 io_task->pwrb_handle->wrb_index);
3529 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb, 3500 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
3530 io_task->psgl_handle->sgl_index); 3501 io_task->psgl_handle->sgl_index);
3531
3532 switch (task->hdr->opcode & ISCSI_OPCODE_MASK) { 3502 switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
3533 case ISCSI_OP_LOGIN: 3503 case ISCSI_OP_LOGIN:
3534 if (ring_mode) 3504 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3535 io_task->psgl_handle->type = TGT_DM_CMD; 3505 TGT_DM_CMD);
3536 else
3537 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3538 TGT_DM_CMD);
3539 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0); 3506 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
3540 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1); 3507 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
3541 hwi_write_buffer(pwrb, task); 3508 hwi_write_buffer(pwrb, task);
3542 break; 3509 break;
3543 case ISCSI_OP_NOOP_OUT: 3510 case ISCSI_OP_NOOP_OUT:
3544 if (ring_mode) 3511 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3545 io_task->psgl_handle->type = INI_RD_CMD; 3512 INI_RD_CMD);
3513 if (task->hdr->ttt == ISCSI_RESERVED_TAG)
3514 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
3546 else 3515 else
3547 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb, 3516 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 1);
3548 INI_RD_CMD);
3549 hwi_write_buffer(pwrb, task); 3517 hwi_write_buffer(pwrb, task);
3550 break; 3518 break;
3551 case ISCSI_OP_TEXT: 3519 case ISCSI_OP_TEXT:
3552 if (ring_mode) 3520 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3553 io_task->psgl_handle->type = INI_WR_CMD; 3521 TGT_DM_CMD);
3554 else 3522 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
3555 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3556 INI_WR_CMD);
3557 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
3558 hwi_write_buffer(pwrb, task); 3523 hwi_write_buffer(pwrb, task);
3559 break; 3524 break;
3560 case ISCSI_OP_SCSI_TMFUNC: 3525 case ISCSI_OP_SCSI_TMFUNC:
3561 session = conn->session; 3526 session = conn->session;
3562 i = ((struct iscsi_tm *)task->hdr)->rtt; 3527 i = ((struct iscsi_tm *)task->hdr)->rtt;
3563 phwi_ctrlr = phba->phwi_ctrlr; 3528 phwi_ctrlr = phba->phwi_ctrlr;
3564 pwrb_context = &phwi_ctrlr->wrb_context[cid]; 3529 pwrb_context = &phwi_ctrlr->wrb_context[cid -
3530 phba->fw_config.iscsi_cid_start];
3565 pwrb_handle = pwrb_context->pwrb_handle_basestd[be32_to_cpu(i) 3531 pwrb_handle = pwrb_context->pwrb_handle_basestd[be32_to_cpu(i)
3566 >> 16]; 3532 >> 16];
3567 aborted_task = pwrb_handle->pio_handle; 3533 aborted_task = pwrb_handle->pio_handle;
@@ -3572,22 +3538,25 @@ static int beiscsi_mtask(struct iscsi_task *task)
3572 if (!aborted_io_task->scsi_cmnd) 3538 if (!aborted_io_task->scsi_cmnd)
3573 return 0; 3539 return 0;
3574 3540
3575 mgmt_invalidate_icds(phba, 3541 tag = mgmt_invalidate_icds(phba,
3576 aborted_io_task->psgl_handle->sgl_index, 3542 aborted_io_task->psgl_handle->sgl_index,
3577 cid); 3543 cid);
3578 if (ring_mode) 3544 if (!tag) {
3579 io_task->psgl_handle->type = INI_TMF_CMD; 3545 shost_printk(KERN_WARNING, phba->shost,
3580 else 3546 "mgmt_invalidate_icds could not be"
3581 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb, 3547 " submitted\n");
3582 INI_TMF_CMD); 3548 } else {
3549 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
3550 phba->ctrl.mcc_numtag[tag]);
3551 free_mcc_tag(&phba->ctrl, tag);
3552 }
3553 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3554 INI_TMF_CMD);
3583 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0); 3555 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
3584 hwi_write_buffer(pwrb, task); 3556 hwi_write_buffer(pwrb, task);
3585 break; 3557 break;
3586 case ISCSI_OP_LOGOUT: 3558 case ISCSI_OP_LOGOUT:
3587 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0); 3559 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
3588 if (ring_mode)
3589 io_task->psgl_handle->type = HWH_TYPE_LOGOUT;
3590 else
3591 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb, 3560 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
3592 HWH_TYPE_LOGOUT); 3561 HWH_TYPE_LOGOUT);
3593 hwi_write_buffer(pwrb, task); 3562 hwi_write_buffer(pwrb, task);
@@ -3600,14 +3569,13 @@ static int beiscsi_mtask(struct iscsi_task *task)
3600 } 3569 }
3601 3570
3602 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, 3571 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
3603 be32_to_cpu(task->data_count)); 3572 task->data_count);
3604 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb, 3573 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
3605 io_task->pwrb_handle->nxt_wrb_index); 3574 io_task->pwrb_handle->nxt_wrb_index);
3606 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb)); 3575 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
3607 3576
3608 doorbell |= cid & DB_WRB_POST_CID_MASK; 3577 doorbell |= cid & DB_WRB_POST_CID_MASK;
3609 if (!ring_mode) 3578 doorbell |= (io_task->pwrb_handle->wrb_index &
3610 doorbell |= (io_task->pwrb_handle->wrb_index &
3611 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT; 3579 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
3612 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT; 3580 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
3613 iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET); 3581 iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
@@ -3649,7 +3617,6 @@ static int beiscsi_task_xmit(struct iscsi_task *task)
3649 return beiscsi_iotask(task, sg, num_sg, xferlen, writedir); 3617 return beiscsi_iotask(task, sg, num_sg, xferlen, writedir);
3650} 3618}
3651 3619
3652
3653static void beiscsi_remove(struct pci_dev *pcidev) 3620static void beiscsi_remove(struct pci_dev *pcidev)
3654{ 3621{
3655 struct beiscsi_hba *phba = NULL; 3622 struct beiscsi_hba *phba = NULL;
@@ -3734,7 +3701,20 @@ static int __devinit beiscsi_dev_probe(struct pci_dev *pcidev,
3734 } 3701 }
3735 SE_DEBUG(DBG_LVL_8, " phba = %p \n", phba); 3702 SE_DEBUG(DBG_LVL_8, " phba = %p \n", phba);
3736 3703
3737 pci_set_drvdata(pcidev, phba); 3704 switch (pcidev->device) {
3705 case BE_DEVICE_ID1:
3706 case OC_DEVICE_ID1:
3707 case OC_DEVICE_ID2:
3708 phba->generation = BE_GEN2;
3709 break;
3710 case BE_DEVICE_ID2:
3711 case OC_DEVICE_ID3:
3712 phba->generation = BE_GEN3;
3713 break;
3714 default:
3715 phba->generation = 0;
3716 }
3717
3738 if (enable_msix) 3718 if (enable_msix)
3739 num_cpus = find_num_cpus(); 3719 num_cpus = find_num_cpus();
3740 else 3720 else
@@ -3754,7 +3734,15 @@ static int __devinit beiscsi_dev_probe(struct pci_dev *pcidev,
3754 spin_lock_init(&phba->io_sgl_lock); 3734 spin_lock_init(&phba->io_sgl_lock);
3755 spin_lock_init(&phba->mgmt_sgl_lock); 3735 spin_lock_init(&phba->mgmt_sgl_lock);
3756 spin_lock_init(&phba->isr_lock); 3736 spin_lock_init(&phba->isr_lock);
3737 ret = mgmt_get_fw_config(&phba->ctrl, phba);
3738 if (ret != 0) {
3739 shost_printk(KERN_ERR, phba->shost,
3740 "Error getting fw config\n");
3741 goto free_port;
3742 }
3743 phba->shost->max_id = phba->fw_config.iscsi_cid_count;
3757 beiscsi_get_params(phba); 3744 beiscsi_get_params(phba);
3745 phba->shost->can_queue = phba->params.ios_per_ctrl;
3758 ret = beiscsi_init_port(phba); 3746 ret = beiscsi_init_port(phba);
3759 if (ret < 0) { 3747 if (ret < 0) {
3760 shost_printk(KERN_ERR, phba->shost, "beiscsi_dev_probe-" 3748 shost_printk(KERN_ERR, phba->shost, "beiscsi_dev_probe-"
@@ -3762,6 +3750,15 @@ static int __devinit beiscsi_dev_probe(struct pci_dev *pcidev,
3762 goto free_port; 3750 goto free_port;
3763 } 3751 }
3764 3752
3753 for (i = 0; i < MAX_MCC_CMD ; i++) {
3754 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
3755 phba->ctrl.mcc_tag[i] = i + 1;
3756 phba->ctrl.mcc_numtag[i + 1] = 0;
3757 phba->ctrl.mcc_tag_available++;
3758 }
3759
3760 phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
3761
3765 snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_q_irq%u", 3762 snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_q_irq%u",
3766 phba->shost->host_no); 3763 phba->shost->host_no);
3767 phba->wq = create_workqueue(phba->wq_name); 3764 phba->wq = create_workqueue(phba->wq_name);
@@ -3836,7 +3833,7 @@ disable_pci:
3836struct iscsi_transport beiscsi_iscsi_transport = { 3833struct iscsi_transport beiscsi_iscsi_transport = {
3837 .owner = THIS_MODULE, 3834 .owner = THIS_MODULE,
3838 .name = DRV_NAME, 3835 .name = DRV_NAME,
3839 .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | 3836 .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
3840 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD, 3837 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
3841 .param_mask = ISCSI_MAX_RECV_DLENGTH | 3838 .param_mask = ISCSI_MAX_RECV_DLENGTH |
3842 ISCSI_MAX_XMIT_DLENGTH | 3839 ISCSI_MAX_XMIT_DLENGTH |
@@ -3859,7 +3856,7 @@ struct iscsi_transport beiscsi_iscsi_transport = {
3859 ISCSI_USERNAME | ISCSI_PASSWORD | 3856 ISCSI_USERNAME | ISCSI_PASSWORD |
3860 ISCSI_USERNAME_IN | ISCSI_PASSWORD_IN | 3857 ISCSI_USERNAME_IN | ISCSI_PASSWORD_IN |
3861 ISCSI_FAST_ABORT | ISCSI_ABORT_TMO | 3858 ISCSI_FAST_ABORT | ISCSI_ABORT_TMO |
3862 ISCSI_LU_RESET_TMO | ISCSI_TGT_RESET_TMO | 3859 ISCSI_LU_RESET_TMO |
3863 ISCSI_PING_TMO | ISCSI_RECV_TMO | 3860 ISCSI_PING_TMO | ISCSI_RECV_TMO |
3864 ISCSI_IFACE_NAME | ISCSI_INITIATOR_NAME, 3861 ISCSI_IFACE_NAME | ISCSI_INITIATOR_NAME,
3865 .host_param_mask = ISCSI_HOST_HWADDRESS | ISCSI_HOST_IPADDRESS | 3862 .host_param_mask = ISCSI_HOST_HWADDRESS | ISCSI_HOST_IPADDRESS |
@@ -3905,7 +3902,7 @@ static int __init beiscsi_module_init(void)
3905 SE_DEBUG(DBG_LVL_1, 3902 SE_DEBUG(DBG_LVL_1,
3906 "beiscsi_module_init - Unable to register beiscsi" 3903 "beiscsi_module_init - Unable to register beiscsi"
3907 "transport.\n"); 3904 "transport.\n");
3908 ret = -ENOMEM; 3905 return -ENOMEM;
3909 } 3906 }
3910 SE_DEBUG(DBG_LVL_8, "In beiscsi_module_init, tt=%p \n", 3907 SE_DEBUG(DBG_LVL_8, "In beiscsi_module_init, tt=%p \n",
3911 &beiscsi_iscsi_transport); 3908 &beiscsi_iscsi_transport);
@@ -3917,7 +3914,6 @@ static int __init beiscsi_module_init(void)
3917 "beiscsi pci driver.\n"); 3914 "beiscsi pci driver.\n");
3918 goto unregister_iscsi_transport; 3915 goto unregister_iscsi_transport;
3919 } 3916 }
3920 ring_mode = 0;
3921 return 0; 3917 return 0;
3922 3918
3923unregister_iscsi_transport: 3919unregister_iscsi_transport:
diff --git a/drivers/scsi/be2iscsi/be_main.h b/drivers/scsi/be2iscsi/be_main.h
index 25e6b208b771..c53a80ab796c 100644
--- a/drivers/scsi/be2iscsi/be_main.h
+++ b/drivers/scsi/be2iscsi/be_main.h
@@ -1,5 +1,5 @@
1/** 1/**
2 * Copyright (C) 2005 - 2009 ServerEngines 2 * Copyright (C) 2005 - 2010 ServerEngines
3 * All rights reserved. 3 * All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -40,31 +40,29 @@
40#define DRV_DESC BE_NAME " " "Driver" 40#define DRV_DESC BE_NAME " " "Driver"
41 41
42#define BE_VENDOR_ID 0x19A2 42#define BE_VENDOR_ID 0x19A2
43/* DEVICE ID's for BE2 */
43#define BE_DEVICE_ID1 0x212 44#define BE_DEVICE_ID1 0x212
44#define OC_DEVICE_ID1 0x702 45#define OC_DEVICE_ID1 0x702
45#define OC_DEVICE_ID2 0x703 46#define OC_DEVICE_ID2 0x703
47
48/* DEVICE ID's for BE3 */
49#define BE_DEVICE_ID2 0x222
46#define OC_DEVICE_ID3 0x712 50#define OC_DEVICE_ID3 0x712
47#define OC_DEVICE_ID4 0x222
48 51
49#define BE2_MAX_SESSIONS 64 52#define BE2_IO_DEPTH 1024
53#define BE2_MAX_SESSIONS 256
50#define BE2_CMDS_PER_CXN 128 54#define BE2_CMDS_PER_CXN 128
51#define BE2_LOGOUTS BE2_MAX_SESSIONS
52#define BE2_TMFS 16 55#define BE2_TMFS 16
53#define BE2_NOPOUT_REQ 16 56#define BE2_NOPOUT_REQ 16
54#define BE2_ASYNCPDUS BE2_MAX_SESSIONS
55#define BE2_MAX_ICDS 2048
56#define BE2_SGE 32 57#define BE2_SGE 32
57#define BE2_DEFPDU_HDR_SZ 64 58#define BE2_DEFPDU_HDR_SZ 64
58#define BE2_DEFPDU_DATA_SZ 8192 59#define BE2_DEFPDU_DATA_SZ 8192
59#define BE2_IO_DEPTH \
60 (BE2_MAX_ICDS / 2 - (BE2_LOGOUTS + BE2_TMFS + BE2_NOPOUT_REQ))
61 60
62#define MAX_CPUS 31 61#define MAX_CPUS 31
63#define BEISCSI_SGLIST_ELEMENTS BE2_SGE 62#define BEISCSI_SGLIST_ELEMENTS 30
64 63
65#define BEISCSI_MAX_CMNDS 1024 /* Max IO's per Ctrlr sht->can_queue */
66#define BEISCSI_CMD_PER_LUN 128 /* scsi_host->cmd_per_lun */ 64#define BEISCSI_CMD_PER_LUN 128 /* scsi_host->cmd_per_lun */
67#define BEISCSI_MAX_SECTORS 2048 /* scsi_host->max_sectors */ 65#define BEISCSI_MAX_SECTORS 256 /* scsi_host->max_sectors */
68 66
69#define BEISCSI_MAX_CMD_LEN 16 /* scsi_host->max_cmd_len */ 67#define BEISCSI_MAX_CMD_LEN 16 /* scsi_host->max_cmd_len */
70#define BEISCSI_NUM_MAX_LUN 256 /* scsi_host->max_lun */ 68#define BEISCSI_NUM_MAX_LUN 256 /* scsi_host->max_lun */
@@ -330,6 +328,7 @@ struct beiscsi_hba {
330 struct workqueue_struct *wq; /* The actuak work queue */ 328 struct workqueue_struct *wq; /* The actuak work queue */
331 struct work_struct work_cqs; /* The work being queued */ 329 struct work_struct work_cqs; /* The work being queued */
332 struct be_ctrl_info ctrl; 330 struct be_ctrl_info ctrl;
331 unsigned int generation;
333}; 332};
334 333
335struct beiscsi_session { 334struct beiscsi_session {
@@ -656,11 +655,12 @@ struct amap_iscsi_wrb {
656 655
657} __packed; 656} __packed;
658 657
659struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid, 658struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid);
660 int index);
661void 659void
662free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle); 660free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle);
663 661
662void beiscsi_process_all_cqs(struct work_struct *work);
663
664struct pdu_nop_out { 664struct pdu_nop_out {
665 u32 dw[12]; 665 u32 dw[12];
666}; 666};
@@ -802,7 +802,6 @@ struct hwi_controller {
802 struct be_ring default_pdu_hdr; 802 struct be_ring default_pdu_hdr;
803 struct be_ring default_pdu_data; 803 struct be_ring default_pdu_data;
804 struct hwi_context_memory *phwi_ctxt; 804 struct hwi_context_memory *phwi_ctxt;
805 unsigned short cq_errors[CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN];
806}; 805};
807 806
808enum hwh_type_enum { 807enum hwh_type_enum {
diff --git a/drivers/scsi/be2iscsi/be_mgmt.c b/drivers/scsi/be2iscsi/be_mgmt.c
index 79c2bd525a84..317bcd042ced 100644
--- a/drivers/scsi/be2iscsi/be_mgmt.c
+++ b/drivers/scsi/be2iscsi/be_mgmt.c
@@ -1,5 +1,5 @@
1/** 1/**
2 * Copyright (C) 2005 - 2009 ServerEngines 2 * Copyright (C) 2005 - 2010 ServerEngines
3 * All rights reserved. 3 * All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -48,6 +48,14 @@ unsigned char mgmt_get_fw_config(struct be_ctrl_info *ctrl,
48 pfw_cfg->ulp[0].sq_base; 48 pfw_cfg->ulp[0].sq_base;
49 phba->fw_config.iscsi_cid_count = 49 phba->fw_config.iscsi_cid_count =
50 pfw_cfg->ulp[0].sq_count; 50 pfw_cfg->ulp[0].sq_count;
51 if (phba->fw_config.iscsi_cid_count > (BE2_MAX_SESSIONS / 2)) {
52 SE_DEBUG(DBG_LVL_8,
53 "FW reported MAX CXNS as %d \t"
54 "Max Supported = %d.\n",
55 phba->fw_config.iscsi_cid_count,
56 BE2_MAX_SESSIONS);
57 phba->fw_config.iscsi_cid_count = BE2_MAX_SESSIONS / 2;
58 }
51 } else { 59 } else {
52 shost_printk(KERN_WARNING, phba->shost, 60 shost_printk(KERN_WARNING, phba->shost,
53 "Failed in mgmt_get_fw_config \n"); 61 "Failed in mgmt_get_fw_config \n");
@@ -77,6 +85,7 @@ unsigned char mgmt_check_supported_fw(struct be_ctrl_info *ctrl,
77 } 85 }
78 nonemb_cmd.size = sizeof(struct be_mgmt_controller_attributes); 86 nonemb_cmd.size = sizeof(struct be_mgmt_controller_attributes);
79 req = nonemb_cmd.va; 87 req = nonemb_cmd.va;
88 memset(req, 0, sizeof(*req));
80 spin_lock(&ctrl->mbox_lock); 89 spin_lock(&ctrl->mbox_lock);
81 memset(wrb, 0, sizeof(*wrb)); 90 memset(wrb, 0, sizeof(*wrb));
82 be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1); 91 be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1);
@@ -140,10 +149,17 @@ unsigned char mgmt_invalidate_icds(struct beiscsi_hba *phba,
140{ 149{
141 struct be_dma_mem nonemb_cmd; 150 struct be_dma_mem nonemb_cmd;
142 struct be_ctrl_info *ctrl = &phba->ctrl; 151 struct be_ctrl_info *ctrl = &phba->ctrl;
143 struct be_mcc_wrb *wrb = wrb_from_mccq(phba); 152 struct be_mcc_wrb *wrb;
144 struct be_sge *sge = nonembedded_sgl(wrb); 153 struct be_sge *sge;
145 struct invalidate_commands_params_in *req; 154 struct invalidate_commands_params_in *req;
146 int status = 0; 155 unsigned int tag = 0;
156
157 spin_lock(&ctrl->mbox_lock);
158 tag = alloc_mcc_tag(phba);
159 if (!tag) {
160 spin_unlock(&ctrl->mbox_lock);
161 return tag;
162 }
147 163
148 nonemb_cmd.va = pci_alloc_consistent(ctrl->pdev, 164 nonemb_cmd.va = pci_alloc_consistent(ctrl->pdev,
149 sizeof(struct invalidate_commands_params_in), 165 sizeof(struct invalidate_commands_params_in),
@@ -156,8 +172,10 @@ unsigned char mgmt_invalidate_icds(struct beiscsi_hba *phba,
156 } 172 }
157 nonemb_cmd.size = sizeof(struct invalidate_commands_params_in); 173 nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
158 req = nonemb_cmd.va; 174 req = nonemb_cmd.va;
159 spin_lock(&ctrl->mbox_lock); 175 memset(req, 0, sizeof(*req));
160 memset(wrb, 0, sizeof(*wrb)); 176 wrb = wrb_from_mccq(phba);
177 sge = nonembedded_sgl(wrb);
178 wrb->tag0 |= tag;
161 179
162 be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1); 180 be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1);
163 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI, 181 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
@@ -172,14 +190,12 @@ unsigned char mgmt_invalidate_icds(struct beiscsi_hba *phba,
172 sge->pa_lo = cpu_to_le32(nonemb_cmd.dma & 0xFFFFFFFF); 190 sge->pa_lo = cpu_to_le32(nonemb_cmd.dma & 0xFFFFFFFF);
173 sge->len = cpu_to_le32(nonemb_cmd.size); 191 sge->len = cpu_to_le32(nonemb_cmd.size);
174 192
175 status = be_mcc_notify_wait(phba); 193 be_mcc_notify(phba);
176 if (status)
177 SE_DEBUG(DBG_LVL_1, "ICDS Invalidation Failed\n");
178 spin_unlock(&ctrl->mbox_lock); 194 spin_unlock(&ctrl->mbox_lock);
179 if (nonemb_cmd.va) 195 if (nonemb_cmd.va)
180 pci_free_consistent(ctrl->pdev, nonemb_cmd.size, 196 pci_free_consistent(ctrl->pdev, nonemb_cmd.size,
181 nonemb_cmd.va, nonemb_cmd.dma); 197 nonemb_cmd.va, nonemb_cmd.dma);
182 return status; 198 return tag;
183} 199}
184 200
185unsigned char mgmt_invalidate_connection(struct beiscsi_hba *phba, 201unsigned char mgmt_invalidate_connection(struct beiscsi_hba *phba,
@@ -189,13 +205,19 @@ unsigned char mgmt_invalidate_connection(struct beiscsi_hba *phba,
189 unsigned short savecfg_flag) 205 unsigned short savecfg_flag)
190{ 206{
191 struct be_ctrl_info *ctrl = &phba->ctrl; 207 struct be_ctrl_info *ctrl = &phba->ctrl;
192 struct be_mcc_wrb *wrb = wrb_from_mccq(phba); 208 struct be_mcc_wrb *wrb;
193 struct iscsi_invalidate_connection_params_in *req = 209 struct iscsi_invalidate_connection_params_in *req;
194 embedded_payload(wrb); 210 unsigned int tag = 0;
195 int status = 0;
196 211
197 spin_lock(&ctrl->mbox_lock); 212 spin_lock(&ctrl->mbox_lock);
198 memset(wrb, 0, sizeof(*wrb)); 213 tag = alloc_mcc_tag(phba);
214 if (!tag) {
215 spin_unlock(&ctrl->mbox_lock);
216 return tag;
217 }
218 wrb = wrb_from_mccq(phba);
219 wrb->tag0 |= tag;
220 req = embedded_payload(wrb);
199 221
200 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); 222 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
201 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI_INI, 223 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI_INI,
@@ -208,35 +230,37 @@ unsigned char mgmt_invalidate_connection(struct beiscsi_hba *phba,
208 else 230 else
209 req->cleanup_type = CMD_ISCSI_CONNECTION_INVALIDATE; 231 req->cleanup_type = CMD_ISCSI_CONNECTION_INVALIDATE;
210 req->save_cfg = savecfg_flag; 232 req->save_cfg = savecfg_flag;
211 status = be_mcc_notify_wait(phba); 233 be_mcc_notify(phba);
212 if (status)
213 SE_DEBUG(DBG_LVL_1, "Invalidation Failed\n");
214
215 spin_unlock(&ctrl->mbox_lock); 234 spin_unlock(&ctrl->mbox_lock);
216 return status; 235 return tag;
217} 236}
218 237
219unsigned char mgmt_upload_connection(struct beiscsi_hba *phba, 238unsigned char mgmt_upload_connection(struct beiscsi_hba *phba,
220 unsigned short cid, unsigned int upload_flag) 239 unsigned short cid, unsigned int upload_flag)
221{ 240{
222 struct be_ctrl_info *ctrl = &phba->ctrl; 241 struct be_ctrl_info *ctrl = &phba->ctrl;
223 struct be_mcc_wrb *wrb = wrb_from_mccq(phba); 242 struct be_mcc_wrb *wrb;
224 struct tcp_upload_params_in *req = embedded_payload(wrb); 243 struct tcp_upload_params_in *req;
225 int status = 0; 244 unsigned int tag = 0;
226 245
227 spin_lock(&ctrl->mbox_lock); 246 spin_lock(&ctrl->mbox_lock);
228 memset(wrb, 0, sizeof(*wrb)); 247 tag = alloc_mcc_tag(phba);
248 if (!tag) {
249 spin_unlock(&ctrl->mbox_lock);
250 return tag;
251 }
252 wrb = wrb_from_mccq(phba);
253 req = embedded_payload(wrb);
254 wrb->tag0 |= tag;
229 255
230 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); 256 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
231 be_cmd_hdr_prepare(&req->hdr, CMD_COMMON_TCP_UPLOAD, 257 be_cmd_hdr_prepare(&req->hdr, CMD_COMMON_TCP_UPLOAD,
232 OPCODE_COMMON_TCP_UPLOAD, sizeof(*req)); 258 OPCODE_COMMON_TCP_UPLOAD, sizeof(*req));
233 req->id = (unsigned short)cid; 259 req->id = (unsigned short)cid;
234 req->upload_type = (unsigned char)upload_flag; 260 req->upload_type = (unsigned char)upload_flag;
235 status = be_mcc_notify_wait(phba); 261 be_mcc_notify(phba);
236 if (status)
237 SE_DEBUG(DBG_LVL_1, "mgmt_upload_connection Failed\n");
238 spin_unlock(&ctrl->mbox_lock); 262 spin_unlock(&ctrl->mbox_lock);
239 return status; 263 return tag;
240} 264}
241 265
242int mgmt_open_connection(struct beiscsi_hba *phba, 266int mgmt_open_connection(struct beiscsi_hba *phba,
@@ -248,13 +272,13 @@ int mgmt_open_connection(struct beiscsi_hba *phba,
248 struct sockaddr_in *daddr_in = (struct sockaddr_in *)dst_addr; 272 struct sockaddr_in *daddr_in = (struct sockaddr_in *)dst_addr;
249 struct sockaddr_in6 *daddr_in6 = (struct sockaddr_in6 *)dst_addr; 273 struct sockaddr_in6 *daddr_in6 = (struct sockaddr_in6 *)dst_addr;
250 struct be_ctrl_info *ctrl = &phba->ctrl; 274 struct be_ctrl_info *ctrl = &phba->ctrl;
251 struct be_mcc_wrb *wrb = wrb_from_mccq(phba); 275 struct be_mcc_wrb *wrb;
252 struct tcp_connect_and_offload_in *req = embedded_payload(wrb); 276 struct tcp_connect_and_offload_in *req;
253 unsigned short def_hdr_id; 277 unsigned short def_hdr_id;
254 unsigned short def_data_id; 278 unsigned short def_data_id;
255 struct phys_addr template_address = { 0, 0 }; 279 struct phys_addr template_address = { 0, 0 };
256 struct phys_addr *ptemplate_address; 280 struct phys_addr *ptemplate_address;
257 int status = 0; 281 unsigned int tag = 0;
258 unsigned int i; 282 unsigned int i;
259 unsigned short cid = beiscsi_ep->ep_cid; 283 unsigned short cid = beiscsi_ep->ep_cid;
260 284
@@ -266,7 +290,14 @@ int mgmt_open_connection(struct beiscsi_hba *phba,
266 ptemplate_address = &template_address; 290 ptemplate_address = &template_address;
267 ISCSI_GET_PDU_TEMPLATE_ADDRESS(phba, ptemplate_address); 291 ISCSI_GET_PDU_TEMPLATE_ADDRESS(phba, ptemplate_address);
268 spin_lock(&ctrl->mbox_lock); 292 spin_lock(&ctrl->mbox_lock);
269 memset(wrb, 0, sizeof(*wrb)); 293 tag = alloc_mcc_tag(phba);
294 if (!tag) {
295 spin_unlock(&ctrl->mbox_lock);
296 return tag;
297 }
298 wrb = wrb_from_mccq(phba);
299 req = embedded_payload(wrb);
300 wrb->tag0 |= tag;
270 301
271 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); 302 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
272 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI, 303 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
@@ -311,46 +342,36 @@ int mgmt_open_connection(struct beiscsi_hba *phba,
311 req->do_offload = 1; 342 req->do_offload = 1;
312 req->dataout_template_pa.lo = ptemplate_address->lo; 343 req->dataout_template_pa.lo = ptemplate_address->lo;
313 req->dataout_template_pa.hi = ptemplate_address->hi; 344 req->dataout_template_pa.hi = ptemplate_address->hi;
314 status = be_mcc_notify_wait(phba); 345 be_mcc_notify(phba);
315 if (!status) {
316 struct iscsi_endpoint *ep;
317 struct tcp_connect_and_offload_out *ptcpcnct_out =
318 embedded_payload(wrb);
319
320 ep = phba->ep_array[ptcpcnct_out->cid];
321 beiscsi_ep = ep->dd_data;
322 beiscsi_ep->fw_handle = ptcpcnct_out->connection_handle;
323 beiscsi_ep->cid_vld = 1;
324 SE_DEBUG(DBG_LVL_8, "mgmt_open_connection Success\n");
325 } else
326 SE_DEBUG(DBG_LVL_1, "mgmt_open_connection Failed\n");
327 spin_unlock(&ctrl->mbox_lock); 346 spin_unlock(&ctrl->mbox_lock);
328 return status; 347 return tag;
329} 348}
330 349
331int be_cmd_get_mac_addr(struct beiscsi_hba *phba, u8 *mac_addr) 350unsigned int be_cmd_get_mac_addr(struct beiscsi_hba *phba)
332{ 351{
333 struct be_ctrl_info *ctrl = &phba->ctrl; 352 struct be_ctrl_info *ctrl = &phba->ctrl;
334 struct be_mcc_wrb *wrb = wrb_from_mccq(phba); 353 struct be_mcc_wrb *wrb;
335 struct be_cmd_req_get_mac_addr *req = embedded_payload(wrb); 354 struct be_cmd_req_get_mac_addr *req;
336 int status; 355 unsigned int tag = 0;
337 356
338 SE_DEBUG(DBG_LVL_8, "In be_cmd_get_mac_addr\n"); 357 SE_DEBUG(DBG_LVL_8, "In be_cmd_get_mac_addr\n");
339 spin_lock(&ctrl->mbox_lock); 358 spin_lock(&ctrl->mbox_lock);
340 memset(wrb, 0, sizeof(*wrb)); 359 tag = alloc_mcc_tag(phba);
360 if (!tag) {
361 spin_unlock(&ctrl->mbox_lock);
362 return tag;
363 }
364
365 wrb = wrb_from_mccq(phba);
366 req = embedded_payload(wrb);
367 wrb->tag0 |= tag;
341 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); 368 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
342 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI, 369 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
343 OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG, 370 OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG,
344 sizeof(*req)); 371 sizeof(*req));
345 372
346 status = be_mcc_notify_wait(phba); 373 be_mcc_notify(phba);
347 if (!status) {
348 struct be_cmd_resp_get_mac_addr *resp = embedded_payload(wrb);
349
350 memcpy(mac_addr, resp->mac_address, ETH_ALEN);
351 }
352
353 spin_unlock(&ctrl->mbox_lock); 374 spin_unlock(&ctrl->mbox_lock);
354 return status; 375 return tag;
355} 376}
356 377
diff --git a/drivers/scsi/be2iscsi/be_mgmt.h b/drivers/scsi/be2iscsi/be_mgmt.h
index 24eaff923f85..ecead6a5aa56 100644
--- a/drivers/scsi/be2iscsi/be_mgmt.h
+++ b/drivers/scsi/be2iscsi/be_mgmt.h
@@ -1,5 +1,5 @@
1/** 1/**
2 * Copyright (C) 2005 - 2009 ServerEngines 2 * Copyright (C) 2005 - 2010 ServerEngines
3 * All rights reserved. 3 * All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -231,6 +231,7 @@ struct beiscsi_endpoint {
231 struct beiscsi_hba *phba; 231 struct beiscsi_hba *phba;
232 struct beiscsi_sess *sess; 232 struct beiscsi_sess *sess;
233 struct beiscsi_conn *conn; 233 struct beiscsi_conn *conn;
234 struct iscsi_endpoint *openiscsi_ep;
234 unsigned short ip_type; 235 unsigned short ip_type;
235 char dst6_addr[ISCSI_ADDRESS_BUF_LEN]; 236 char dst6_addr[ISCSI_ADDRESS_BUF_LEN];
236 unsigned long dst_addr; 237 unsigned long dst_addr;
@@ -249,7 +250,4 @@ unsigned char mgmt_invalidate_connection(struct beiscsi_hba *phba,
249 unsigned short issue_reset, 250 unsigned short issue_reset,
250 unsigned short savecfg_flag); 251 unsigned short savecfg_flag);
251 252
252unsigned char mgmt_fw_cmd(struct be_ctrl_info *ctrl,
253 struct beiscsi_hba *phba,
254 char *buf, unsigned int len);
255#endif 253#endif
diff --git a/drivers/scsi/bnx2i/bnx2i_iscsi.c b/drivers/scsi/bnx2i/bnx2i_iscsi.c
index 33b2294625bb..1c4d1215769d 100644
--- a/drivers/scsi/bnx2i/bnx2i_iscsi.c
+++ b/drivers/scsi/bnx2i/bnx2i_iscsi.c
@@ -1426,8 +1426,8 @@ static int bnx2i_conn_get_param(struct iscsi_cls_conn *cls_conn,
1426 break; 1426 break;
1427 case ISCSI_PARAM_CONN_ADDRESS: 1427 case ISCSI_PARAM_CONN_ADDRESS:
1428 if (bnx2i_conn->ep) 1428 if (bnx2i_conn->ep)
1429 len = sprintf(buf, NIPQUAD_FMT "\n", 1429 len = sprintf(buf, "%pI4\n",
1430 NIPQUAD(bnx2i_conn->ep->cm_sk->dst_ip)); 1430 &bnx2i_conn->ep->cm_sk->dst_ip);
1431 break; 1431 break;
1432 default: 1432 default:
1433 return iscsi_conn_get_param(cls_conn, param, buf); 1433 return iscsi_conn_get_param(cls_conn, param, buf);
@@ -1990,6 +1990,7 @@ static struct scsi_host_template bnx2i_host_template = {
1990 .eh_abort_handler = iscsi_eh_abort, 1990 .eh_abort_handler = iscsi_eh_abort,
1991 .eh_device_reset_handler = iscsi_eh_device_reset, 1991 .eh_device_reset_handler = iscsi_eh_device_reset,
1992 .eh_target_reset_handler = iscsi_eh_target_reset, 1992 .eh_target_reset_handler = iscsi_eh_target_reset,
1993 .change_queue_depth = iscsi_change_queue_depth,
1993 .can_queue = 1024, 1994 .can_queue = 1024,
1994 .max_sectors = 127, 1995 .max_sectors = 127,
1995 .cmd_per_lun = 32, 1996 .cmd_per_lun = 32,
diff --git a/drivers/scsi/constants.c b/drivers/scsi/constants.c
index 9129bcf117cf..cd05e049d5f6 100644
--- a/drivers/scsi/constants.c
+++ b/drivers/scsi/constants.c
@@ -219,18 +219,15 @@ static void print_opcode_name(unsigned char * cdbp, int cdb_len)
219 break; 219 break;
220 } 220 }
221 sa = (cdbp[8] << 8) + cdbp[9]; 221 sa = (cdbp[8] << 8) + cdbp[9];
222 name = get_sa_name(maint_in_arr, MAINT_IN_SZ, sa); 222 name = get_sa_name(variable_length_arr, VARIABLE_LENGTH_SZ, sa);
223 if (name) { 223 if (name)
224 printk("%s", name); 224 printk("%s", name);
225 if ((cdb_len > 0) && (len != cdb_len)) 225 else
226 printk(", in_cdb_len=%d, ext_len=%d",
227 len, cdb_len);
228 } else {
229 printk("cdb[0]=0x%x, sa=0x%x", cdb0, sa); 226 printk("cdb[0]=0x%x, sa=0x%x", cdb0, sa);
230 if ((cdb_len > 0) && (len != cdb_len)) 227
231 printk(", in_cdb_len=%d, ext_len=%d", 228 if ((cdb_len > 0) && (len != cdb_len))
232 len, cdb_len); 229 printk(", in_cdb_len=%d, ext_len=%d", len, cdb_len);
233 } 230
234 break; 231 break;
235 case MAINTENANCE_IN: 232 case MAINTENANCE_IN:
236 sa = cdbp[1] & 0x1f; 233 sa = cdbp[1] & 0x1f;
@@ -349,6 +346,9 @@ void scsi_print_command(struct scsi_cmnd *cmd)
349{ 346{
350 int k; 347 int k;
351 348
349 if (cmd->cmnd == NULL)
350 return;
351
352 scmd_printk(KERN_INFO, cmd, "CDB: "); 352 scmd_printk(KERN_INFO, cmd, "CDB: ");
353 print_opcode_name(cmd->cmnd, cmd->cmd_len); 353 print_opcode_name(cmd->cmnd, cmd->cmd_len);
354 354
diff --git a/drivers/scsi/cxgb3i/cxgb3i_iscsi.c b/drivers/scsi/cxgb3i/cxgb3i_iscsi.c
index 969c83162cc4..412853c65372 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_iscsi.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_iscsi.c
@@ -591,8 +591,7 @@ static int cxgb3i_conn_bind(struct iscsi_cls_session *cls_session,
591 cxgb3i_conn_max_recv_dlength(conn); 591 cxgb3i_conn_max_recv_dlength(conn);
592 592
593 spin_lock_bh(&conn->session->lock); 593 spin_lock_bh(&conn->session->lock);
594 sprintf(conn->portal_address, NIPQUAD_FMT, 594 sprintf(conn->portal_address, "%pI4", &c3cn->daddr.sin_addr.s_addr);
595 NIPQUAD(c3cn->daddr.sin_addr.s_addr));
596 conn->portal_port = ntohs(c3cn->daddr.sin_port); 595 conn->portal_port = ntohs(c3cn->daddr.sin_port);
597 spin_unlock_bh(&conn->session->lock); 596 spin_unlock_bh(&conn->session->lock);
598 597
@@ -709,6 +708,12 @@ static int cxgb3i_host_set_param(struct Scsi_Host *shost,
709{ 708{
710 struct cxgb3i_hba *hba = iscsi_host_priv(shost); 709 struct cxgb3i_hba *hba = iscsi_host_priv(shost);
711 710
711 if (!hba->ndev) {
712 shost_printk(KERN_ERR, shost, "Could not set host param. "
713 "Netdev for host not set.\n");
714 return -ENODEV;
715 }
716
712 cxgb3i_api_debug("param %d, buf %s.\n", param, buf); 717 cxgb3i_api_debug("param %d, buf %s.\n", param, buf);
713 718
714 switch (param) { 719 switch (param) {
@@ -739,6 +744,12 @@ static int cxgb3i_host_get_param(struct Scsi_Host *shost,
739 struct cxgb3i_hba *hba = iscsi_host_priv(shost); 744 struct cxgb3i_hba *hba = iscsi_host_priv(shost);
740 int len = 0; 745 int len = 0;
741 746
747 if (!hba->ndev) {
748 shost_printk(KERN_ERR, shost, "Could not set host param. "
749 "Netdev for host not set.\n");
750 return -ENODEV;
751 }
752
742 cxgb3i_api_debug("hba %s, param %d.\n", hba->ndev->name, param); 753 cxgb3i_api_debug("hba %s, param %d.\n", hba->ndev->name, param);
743 754
744 switch (param) { 755 switch (param) {
@@ -753,7 +764,7 @@ static int cxgb3i_host_get_param(struct Scsi_Host *shost,
753 __be32 addr; 764 __be32 addr;
754 765
755 addr = cxgb3i_get_private_ipv4addr(hba->ndev); 766 addr = cxgb3i_get_private_ipv4addr(hba->ndev);
756 len = sprintf(buf, NIPQUAD_FMT, NIPQUAD(addr)); 767 len = sprintf(buf, "%pI4", &addr);
757 break; 768 break;
758 } 769 }
759 default: 770 default:
diff --git a/drivers/scsi/cxgb3i/cxgb3i_offload.c b/drivers/scsi/cxgb3i/cxgb3i_offload.c
index 15a00e8b7122..3e08c430ff29 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_offload.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_offload.c
@@ -1675,10 +1675,11 @@ int cxgb3i_c3cn_connect(struct net_device *dev, struct s3_conn *c3cn,
1675 } else 1675 } else
1676 c3cn->saddr.sin_addr.s_addr = sipv4; 1676 c3cn->saddr.sin_addr.s_addr = sipv4;
1677 1677
1678 c3cn_conn_debug("c3cn 0x%p, %u.%u.%u.%u,%u-%u.%u.%u.%u,%u SYN_SENT.\n", 1678 c3cn_conn_debug("c3cn 0x%p, %pI4,%u-%pI4,%u SYN_SENT.\n",
1679 c3cn, NIPQUAD(c3cn->saddr.sin_addr.s_addr), 1679 c3cn,
1680 &c3cn->saddr.sin_addr.s_addr,
1680 ntohs(c3cn->saddr.sin_port), 1681 ntohs(c3cn->saddr.sin_port),
1681 NIPQUAD(c3cn->daddr.sin_addr.s_addr), 1682 &c3cn->daddr.sin_addr.s_addr,
1682 ntohs(c3cn->daddr.sin_port)); 1683 ntohs(c3cn->daddr.sin_port));
1683 1684
1684 c3cn_set_state(c3cn, C3CN_STATE_CONNECTING); 1685 c3cn_set_state(c3cn, C3CN_STATE_CONNECTING);
diff --git a/drivers/scsi/cxgb3i/cxgb3i_pdu.c b/drivers/scsi/cxgb3i/cxgb3i_pdu.c
index 1fe3b0f1f3c9..9c38539557fc 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_pdu.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_pdu.c
@@ -461,10 +461,8 @@ void cxgb3i_conn_pdu_ready(struct s3_conn *c3cn)
461 skb = skb_peek(&c3cn->receive_queue); 461 skb = skb_peek(&c3cn->receive_queue);
462 } 462 }
463 read_unlock(&c3cn->callback_lock); 463 read_unlock(&c3cn->callback_lock);
464 if (c3cn) { 464 c3cn->copied_seq += read;
465 c3cn->copied_seq += read; 465 cxgb3i_c3cn_rx_credits(c3cn, read);
466 cxgb3i_c3cn_rx_credits(c3cn, read);
467 }
468 conn->rxdata_octets += read; 466 conn->rxdata_octets += read;
469 467
470 if (err) { 468 if (err) {
diff --git a/drivers/scsi/device_handler/scsi_dh_alua.c b/drivers/scsi/device_handler/scsi_dh_alua.c
index 4f0d0138f48b..bc9e94f5915e 100644
--- a/drivers/scsi/device_handler/scsi_dh_alua.c
+++ b/drivers/scsi/device_handler/scsi_dh_alua.c
@@ -717,6 +717,8 @@ static const struct scsi_dh_devlist alua_dev_list[] = {
717 {"IBM", "2145" }, 717 {"IBM", "2145" },
718 {"Pillar", "Axiom" }, 718 {"Pillar", "Axiom" },
719 {"Intel", "Multi-Flex"}, 719 {"Intel", "Multi-Flex"},
720 {"NETAPP", "LUN"},
721 {"AIX", "NVDISK"},
720 {NULL, NULL} 722 {NULL, NULL}
721}; 723};
722 724
diff --git a/drivers/scsi/eata.c b/drivers/scsi/eata.c
index c7076ce25e21..3c5abf7cd762 100644
--- a/drivers/scsi/eata.c
+++ b/drivers/scsi/eata.c
@@ -1509,7 +1509,7 @@ static int option_setup(char *str)
1509 char *cur = str; 1509 char *cur = str;
1510 int i = 1; 1510 int i = 1;
1511 1511
1512 while (cur && isdigit(*cur) && i <= MAX_INT_PARAM) { 1512 while (cur && isdigit(*cur) && i < MAX_INT_PARAM) {
1513 ints[i++] = simple_strtoul(cur, NULL, 0); 1513 ints[i++] = simple_strtoul(cur, NULL, 0);
1514 1514
1515 if ((cur = strchr(cur, ',')) != NULL) 1515 if ((cur = strchr(cur, ',')) != NULL)
diff --git a/drivers/scsi/esp_scsi.c b/drivers/scsi/esp_scsi.c
index a680e18b5f3b..e2bc779f86c1 100644
--- a/drivers/scsi/esp_scsi.c
+++ b/drivers/scsi/esp_scsi.c
@@ -1449,9 +1449,6 @@ static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
1449 if (offset > 15) 1449 if (offset > 15)
1450 goto do_reject; 1450 goto do_reject;
1451 1451
1452 if (esp->flags & ESP_FLAG_DISABLE_SYNC)
1453 offset = 0;
1454
1455 if (offset) { 1452 if (offset) {
1456 int one_clock; 1453 int one_clock;
1457 1454
@@ -2405,12 +2402,6 @@ static int esp_slave_configure(struct scsi_device *dev)
2405 struct esp_target_data *tp = &esp->target[dev->id]; 2402 struct esp_target_data *tp = &esp->target[dev->id];
2406 int goal_tags, queue_depth; 2403 int goal_tags, queue_depth;
2407 2404
2408 if (esp->flags & ESP_FLAG_DISABLE_SYNC) {
2409 /* Bypass async domain validation */
2410 dev->ppr = 0;
2411 dev->sdtr = 0;
2412 }
2413
2414 goal_tags = 0; 2405 goal_tags = 0;
2415 2406
2416 if (dev->tagged_supported) { 2407 if (dev->tagged_supported) {
@@ -2660,7 +2651,10 @@ static void esp_set_offset(struct scsi_target *target, int offset)
2660 struct esp *esp = shost_priv(host); 2651 struct esp *esp = shost_priv(host);
2661 struct esp_target_data *tp = &esp->target[target->id]; 2652 struct esp_target_data *tp = &esp->target[target->id];
2662 2653
2663 tp->nego_goal_offset = offset; 2654 if (esp->flags & ESP_FLAG_DISABLE_SYNC)
2655 tp->nego_goal_offset = 0;
2656 else
2657 tp->nego_goal_offset = offset;
2664 tp->flags |= ESP_TGT_CHECK_NEGO; 2658 tp->flags |= ESP_TGT_CHECK_NEGO;
2665} 2659}
2666 2660
diff --git a/drivers/scsi/fnic/fnic.h b/drivers/scsi/fnic/fnic.h
index bb208a6091e7..3966c71d0095 100644
--- a/drivers/scsi/fnic/fnic.h
+++ b/drivers/scsi/fnic/fnic.h
@@ -36,7 +36,7 @@
36 36
37#define DRV_NAME "fnic" 37#define DRV_NAME "fnic"
38#define DRV_DESCRIPTION "Cisco FCoE HBA Driver" 38#define DRV_DESCRIPTION "Cisco FCoE HBA Driver"
39#define DRV_VERSION "1.0.0.1121" 39#define DRV_VERSION "1.4.0.98"
40#define PFX DRV_NAME ": " 40#define PFX DRV_NAME ": "
41#define DFX DRV_NAME "%d: " 41#define DFX DRV_NAME "%d: "
42 42
diff --git a/drivers/scsi/fnic/fnic_main.c b/drivers/scsi/fnic/fnic_main.c
index fe1b1031f7ab..507e26c1c29f 100644
--- a/drivers/scsi/fnic/fnic_main.c
+++ b/drivers/scsi/fnic/fnic_main.c
@@ -620,6 +620,8 @@ static int __devinit fnic_probe(struct pci_dev *pdev,
620 if (fnic->config.flags & VFCF_FIP_CAPABLE) { 620 if (fnic->config.flags & VFCF_FIP_CAPABLE) {
621 shost_printk(KERN_INFO, fnic->lport->host, 621 shost_printk(KERN_INFO, fnic->lport->host,
622 "firmware supports FIP\n"); 622 "firmware supports FIP\n");
623 /* enable directed and multicast */
624 vnic_dev_packet_filter(fnic->vdev, 1, 1, 0, 0, 0);
623 vnic_dev_add_addr(fnic->vdev, FIP_ALL_ENODE_MACS); 625 vnic_dev_add_addr(fnic->vdev, FIP_ALL_ENODE_MACS);
624 vnic_dev_add_addr(fnic->vdev, fnic->ctlr.ctl_src_addr); 626 vnic_dev_add_addr(fnic->vdev, fnic->ctlr.ctl_src_addr);
625 } else { 627 } else {
@@ -698,6 +700,8 @@ static int __devinit fnic_probe(struct pci_dev *pdev,
698 goto err_out_remove_scsi_host; 700 goto err_out_remove_scsi_host;
699 } 701 }
700 702
703 fc_lport_init_stats(lp);
704
701 fc_lport_config(lp); 705 fc_lport_config(lp);
702 706
703 if (fc_set_mfs(lp, fnic->config.maxdatafieldsize + 707 if (fc_set_mfs(lp, fnic->config.maxdatafieldsize +
diff --git a/drivers/scsi/fnic/vnic_devcmd.h b/drivers/scsi/fnic/vnic_devcmd.h
index d62b9061bf12..7c9ccbd4134b 100644
--- a/drivers/scsi/fnic/vnic_devcmd.h
+++ b/drivers/scsi/fnic/vnic_devcmd.h
@@ -94,7 +94,7 @@ enum vnic_devcmd_cmd {
94 CMD_STATS_DUMP = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 4), 94 CMD_STATS_DUMP = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 4),
95 95
96 /* set Rx packet filter: (u32)a0=filters (see CMD_PFILTER_*) */ 96 /* set Rx packet filter: (u32)a0=filters (see CMD_PFILTER_*) */
97 CMD_PACKET_FILTER = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 7), 97 CMD_PACKET_FILTER = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 7),
98 98
99 /* hang detection notification */ 99 /* hang detection notification */
100 CMD_HANG_NOTIFY = _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 8), 100 CMD_HANG_NOTIFY = _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 8),
diff --git a/drivers/scsi/gdth.c b/drivers/scsi/gdth.c
index 9e8fce0f0c1b..ba3c94c9c25f 100644
--- a/drivers/scsi/gdth.c
+++ b/drivers/scsi/gdth.c
@@ -140,40 +140,40 @@
140#include "gdth.h" 140#include "gdth.h"
141 141
142static void gdth_delay(int milliseconds); 142static void gdth_delay(int milliseconds);
143static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs); 143static void gdth_eval_mapping(u32 size, u32 *cyls, int *heads, int *secs);
144static irqreturn_t gdth_interrupt(int irq, void *dev_id); 144static irqreturn_t gdth_interrupt(int irq, void *dev_id);
145static irqreturn_t __gdth_interrupt(gdth_ha_str *ha, 145static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
146 int gdth_from_wait, int* pIndex); 146 int gdth_from_wait, int* pIndex);
147static int gdth_sync_event(gdth_ha_str *ha, int service, unchar index, 147static int gdth_sync_event(gdth_ha_str *ha, int service, u8 index,
148 Scsi_Cmnd *scp); 148 Scsi_Cmnd *scp);
149static int gdth_async_event(gdth_ha_str *ha); 149static int gdth_async_event(gdth_ha_str *ha);
150static void gdth_log_event(gdth_evt_data *dvr, char *buffer); 150static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
151 151
152static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar priority); 152static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 priority);
153static void gdth_next(gdth_ha_str *ha); 153static void gdth_next(gdth_ha_str *ha);
154static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar b); 154static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 b);
155static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp); 155static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp);
156static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source, 156static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source,
157 ushort idx, gdth_evt_data *evt); 157 u16 idx, gdth_evt_data *evt);
158static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr); 158static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
159static void gdth_readapp_event(gdth_ha_str *ha, unchar application, 159static void gdth_readapp_event(gdth_ha_str *ha, u8 application,
160 gdth_evt_str *estr); 160 gdth_evt_str *estr);
161static void gdth_clear_events(void); 161static void gdth_clear_events(void);
162 162
163static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp, 163static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp,
164 char *buffer, ushort count); 164 char *buffer, u16 count);
165static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp); 165static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp);
166static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive); 166static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u16 hdrive);
167 167
168static void gdth_enable_int(gdth_ha_str *ha); 168static void gdth_enable_int(gdth_ha_str *ha);
169static int gdth_test_busy(gdth_ha_str *ha); 169static int gdth_test_busy(gdth_ha_str *ha);
170static int gdth_get_cmd_index(gdth_ha_str *ha); 170static int gdth_get_cmd_index(gdth_ha_str *ha);
171static void gdth_release_event(gdth_ha_str *ha); 171static void gdth_release_event(gdth_ha_str *ha);
172static int gdth_wait(gdth_ha_str *ha, int index,ulong32 time); 172static int gdth_wait(gdth_ha_str *ha, int index,u32 time);
173static int gdth_internal_cmd(gdth_ha_str *ha, unchar service, ushort opcode, 173static int gdth_internal_cmd(gdth_ha_str *ha, u8 service, u16 opcode,
174 ulong32 p1, ulong64 p2,ulong64 p3); 174 u32 p1, u64 p2,u64 p3);
175static int gdth_search_drives(gdth_ha_str *ha); 175static int gdth_search_drives(gdth_ha_str *ha);
176static int gdth_analyse_hdrive(gdth_ha_str *ha, ushort hdrive); 176static int gdth_analyse_hdrive(gdth_ha_str *ha, u16 hdrive);
177 177
178static const char *gdth_ctr_name(gdth_ha_str *ha); 178static const char *gdth_ctr_name(gdth_ha_str *ha);
179 179
@@ -189,7 +189,7 @@ static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp,
189static void gdth_scsi_done(struct scsi_cmnd *scp); 189static void gdth_scsi_done(struct scsi_cmnd *scp);
190 190
191#ifdef DEBUG_GDTH 191#ifdef DEBUG_GDTH
192static unchar DebugState = DEBUG_GDTH; 192static u8 DebugState = DEBUG_GDTH;
193 193
194#ifdef __SERIAL__ 194#ifdef __SERIAL__
195#define MAX_SERBUF 160 195#define MAX_SERBUF 160
@@ -270,30 +270,30 @@ static int ser_printk(const char *fmt, ...)
270#endif 270#endif
271 271
272#ifdef GDTH_STATISTICS 272#ifdef GDTH_STATISTICS
273static ulong32 max_rq=0, max_index=0, max_sg=0; 273static u32 max_rq=0, max_index=0, max_sg=0;
274#ifdef INT_COAL 274#ifdef INT_COAL
275static ulong32 max_int_coal=0; 275static u32 max_int_coal=0;
276#endif 276#endif
277static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0; 277static u32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
278static struct timer_list gdth_timer; 278static struct timer_list gdth_timer;
279#endif 279#endif
280 280
281#define PTR2USHORT(a) (ushort)(ulong)(a) 281#define PTR2USHORT(a) (u16)(unsigned long)(a)
282#define GDTOFFSOF(a,b) (size_t)&(((a*)0)->b) 282#define GDTOFFSOF(a,b) (size_t)&(((a*)0)->b)
283#define INDEX_OK(i,t) ((i)<ARRAY_SIZE(t)) 283#define INDEX_OK(i,t) ((i)<ARRAY_SIZE(t))
284 284
285#define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b)) 285#define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b))
286 286
287#ifdef CONFIG_ISA 287#ifdef CONFIG_ISA
288static unchar gdth_drq_tab[4] = {5,6,7,7}; /* DRQ table */ 288static u8 gdth_drq_tab[4] = {5,6,7,7}; /* DRQ table */
289#endif 289#endif
290#if defined(CONFIG_EISA) || defined(CONFIG_ISA) 290#if defined(CONFIG_EISA) || defined(CONFIG_ISA)
291static unchar gdth_irq_tab[6] = {0,10,11,12,14,0}; /* IRQ table */ 291static u8 gdth_irq_tab[6] = {0,10,11,12,14,0}; /* IRQ table */
292#endif 292#endif
293static unchar gdth_polling; /* polling if TRUE */ 293static u8 gdth_polling; /* polling if TRUE */
294static int gdth_ctr_count = 0; /* controller count */ 294static int gdth_ctr_count = 0; /* controller count */
295static LIST_HEAD(gdth_instances); /* controller list */ 295static LIST_HEAD(gdth_instances); /* controller list */
296static unchar gdth_write_through = FALSE; /* write through */ 296static u8 gdth_write_through = FALSE; /* write through */
297static gdth_evt_str ebuffer[MAX_EVENTS]; /* event buffer */ 297static gdth_evt_str ebuffer[MAX_EVENTS]; /* event buffer */
298static int elastidx; 298static int elastidx;
299static int eoldidx; 299static int eoldidx;
@@ -303,7 +303,7 @@ static int major;
303#define DOU 2 /* OUT data direction */ 303#define DOU 2 /* OUT data direction */
304#define DNO DIN /* no data transfer */ 304#define DNO DIN /* no data transfer */
305#define DUN DIN /* unknown data direction */ 305#define DUN DIN /* unknown data direction */
306static unchar gdth_direction_tab[0x100] = { 306static u8 gdth_direction_tab[0x100] = {
307 DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN, 307 DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
308 DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN, 308 DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
309 DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU, 309 DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
@@ -390,7 +390,7 @@ static gdth_ha_str *gdth_find_ha(int hanum)
390static struct gdth_cmndinfo *gdth_get_cmndinfo(gdth_ha_str *ha) 390static struct gdth_cmndinfo *gdth_get_cmndinfo(gdth_ha_str *ha)
391{ 391{
392 struct gdth_cmndinfo *priv = NULL; 392 struct gdth_cmndinfo *priv = NULL;
393 ulong flags; 393 unsigned long flags;
394 int i; 394 int i;
395 395
396 spin_lock_irqsave(&ha->smp_lock, flags); 396 spin_lock_irqsave(&ha->smp_lock, flags);
@@ -493,7 +493,7 @@ int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
493 return rval; 493 return rval;
494} 494}
495 495
496static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs) 496static void gdth_eval_mapping(u32 size, u32 *cyls, int *heads, int *secs)
497{ 497{
498 *cyls = size /HEADS/SECS; 498 *cyls = size /HEADS/SECS;
499 if (*cyls <= MAXCYLS) { 499 if (*cyls <= MAXCYLS) {
@@ -514,9 +514,9 @@ static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs
514 514
515/* controller search and initialization functions */ 515/* controller search and initialization functions */
516#ifdef CONFIG_EISA 516#ifdef CONFIG_EISA
517static int __init gdth_search_eisa(ushort eisa_adr) 517static int __init gdth_search_eisa(u16 eisa_adr)
518{ 518{
519 ulong32 id; 519 u32 id;
520 520
521 TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr)); 521 TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
522 id = inl(eisa_adr+ID0REG); 522 id = inl(eisa_adr+ID0REG);
@@ -533,13 +533,13 @@ static int __init gdth_search_eisa(ushort eisa_adr)
533#endif /* CONFIG_EISA */ 533#endif /* CONFIG_EISA */
534 534
535#ifdef CONFIG_ISA 535#ifdef CONFIG_ISA
536static int __init gdth_search_isa(ulong32 bios_adr) 536static int __init gdth_search_isa(u32 bios_adr)
537{ 537{
538 void __iomem *addr; 538 void __iomem *addr;
539 ulong32 id; 539 u32 id;
540 540
541 TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr)); 541 TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
542 if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) { 542 if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(u32))) != NULL) {
543 id = readl(addr); 543 id = readl(addr);
544 iounmap(addr); 544 iounmap(addr);
545 if (id == GDT2_ID) /* GDT2000 */ 545 if (id == GDT2_ID) /* GDT2000 */
@@ -551,7 +551,7 @@ static int __init gdth_search_isa(ulong32 bios_adr)
551 551
552#ifdef CONFIG_PCI 552#ifdef CONFIG_PCI
553 553
554static bool gdth_search_vortex(ushort device) 554static bool gdth_search_vortex(u16 device)
555{ 555{
556 if (device <= PCI_DEVICE_ID_VORTEX_GDT6555) 556 if (device <= PCI_DEVICE_ID_VORTEX_GDT6555)
557 return true; 557 return true;
@@ -603,9 +603,9 @@ static void __devexit gdth_pci_remove_one(struct pci_dev *pdev)
603static int __devinit gdth_pci_init_one(struct pci_dev *pdev, 603static int __devinit gdth_pci_init_one(struct pci_dev *pdev,
604 const struct pci_device_id *ent) 604 const struct pci_device_id *ent)
605{ 605{
606 ushort vendor = pdev->vendor; 606 u16 vendor = pdev->vendor;
607 ushort device = pdev->device; 607 u16 device = pdev->device;
608 ulong base0, base1, base2; 608 unsigned long base0, base1, base2;
609 int rc; 609 int rc;
610 gdth_pci_str gdth_pcistr; 610 gdth_pci_str gdth_pcistr;
611 gdth_ha_str *ha = NULL; 611 gdth_ha_str *ha = NULL;
@@ -658,10 +658,10 @@ static int __devinit gdth_pci_init_one(struct pci_dev *pdev,
658#endif /* CONFIG_PCI */ 658#endif /* CONFIG_PCI */
659 659
660#ifdef CONFIG_EISA 660#ifdef CONFIG_EISA
661static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha) 661static int __init gdth_init_eisa(u16 eisa_adr,gdth_ha_str *ha)
662{ 662{
663 ulong32 retries,id; 663 u32 retries,id;
664 unchar prot_ver,eisacf,i,irq_found; 664 u8 prot_ver,eisacf,i,irq_found;
665 665
666 TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr)); 666 TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
667 667
@@ -688,7 +688,7 @@ static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
688 return 0; 688 return 0;
689 } 689 }
690 ha->bmic = eisa_adr; 690 ha->bmic = eisa_adr;
691 ha->brd_phys = (ulong32)eisa_adr >> 12; 691 ha->brd_phys = (u32)eisa_adr >> 12;
692 692
693 outl(0,eisa_adr+MAILBOXREG); 693 outl(0,eisa_adr+MAILBOXREG);
694 outl(0,eisa_adr+MAILBOXREG+4); 694 outl(0,eisa_adr+MAILBOXREG+4);
@@ -752,12 +752,12 @@ static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
752#endif /* CONFIG_EISA */ 752#endif /* CONFIG_EISA */
753 753
754#ifdef CONFIG_ISA 754#ifdef CONFIG_ISA
755static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha) 755static int __init gdth_init_isa(u32 bios_adr,gdth_ha_str *ha)
756{ 756{
757 register gdt2_dpram_str __iomem *dp2_ptr; 757 register gdt2_dpram_str __iomem *dp2_ptr;
758 int i; 758 int i;
759 unchar irq_drq,prot_ver; 759 u8 irq_drq,prot_ver;
760 ulong32 retries; 760 u32 retries;
761 761
762 TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr)); 762 TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
763 763
@@ -812,7 +812,7 @@ static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
812 } 812 }
813 gdth_delay(1); 813 gdth_delay(1);
814 } 814 }
815 prot_ver = (unchar)readl(&dp2_ptr->u.ic.S_Info[0]); 815 prot_ver = (u8)readl(&dp2_ptr->u.ic.S_Info[0]);
816 writeb(0, &dp2_ptr->u.ic.Status); 816 writeb(0, &dp2_ptr->u.ic.Status);
817 writeb(0xff, &dp2_ptr->io.irqdel); 817 writeb(0xff, &dp2_ptr->io.irqdel);
818 if (prot_ver != PROTOCOL_VERSION) { 818 if (prot_ver != PROTOCOL_VERSION) {
@@ -859,9 +859,9 @@ static int __devinit gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
859 register gdt6_dpram_str __iomem *dp6_ptr; 859 register gdt6_dpram_str __iomem *dp6_ptr;
860 register gdt6c_dpram_str __iomem *dp6c_ptr; 860 register gdt6c_dpram_str __iomem *dp6c_ptr;
861 register gdt6m_dpram_str __iomem *dp6m_ptr; 861 register gdt6m_dpram_str __iomem *dp6m_ptr;
862 ulong32 retries; 862 u32 retries;
863 unchar prot_ver; 863 u8 prot_ver;
864 ushort command; 864 u16 command;
865 int i, found = FALSE; 865 int i, found = FALSE;
866 866
867 TRACE(("gdth_init_pci()\n")); 867 TRACE(("gdth_init_pci()\n"));
@@ -871,7 +871,7 @@ static int __devinit gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
871 else 871 else
872 ha->oem_id = OEM_ID_ICP; 872 ha->oem_id = OEM_ID_ICP;
873 ha->brd_phys = (pdev->bus->number << 8) | (pdev->devfn & 0xf8); 873 ha->brd_phys = (pdev->bus->number << 8) | (pdev->devfn & 0xf8);
874 ha->stype = (ulong32)pdev->device; 874 ha->stype = (u32)pdev->device;
875 ha->irq = pdev->irq; 875 ha->irq = pdev->irq;
876 ha->pdev = pdev; 876 ha->pdev = pdev;
877 877
@@ -891,7 +891,7 @@ static int __devinit gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
891 found = FALSE; 891 found = FALSE;
892 for (i = 0xC8000; i < 0xE8000; i += 0x4000) { 892 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
893 iounmap(ha->brd); 893 iounmap(ha->brd);
894 ha->brd = ioremap(i, sizeof(ushort)); 894 ha->brd = ioremap(i, sizeof(u16));
895 if (ha->brd == NULL) { 895 if (ha->brd == NULL) {
896 printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); 896 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
897 return 0; 897 return 0;
@@ -947,7 +947,7 @@ static int __devinit gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
947 } 947 }
948 gdth_delay(1); 948 gdth_delay(1);
949 } 949 }
950 prot_ver = (unchar)readl(&dp6_ptr->u.ic.S_Info[0]); 950 prot_ver = (u8)readl(&dp6_ptr->u.ic.S_Info[0]);
951 writeb(0, &dp6_ptr->u.ic.S_Status); 951 writeb(0, &dp6_ptr->u.ic.S_Status);
952 writeb(0xff, &dp6_ptr->io.irqdel); 952 writeb(0xff, &dp6_ptr->io.irqdel);
953 if (prot_ver != PROTOCOL_VERSION) { 953 if (prot_ver != PROTOCOL_VERSION) {
@@ -1000,7 +1000,7 @@ static int __devinit gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
1000 found = FALSE; 1000 found = FALSE;
1001 for (i = 0xC8000; i < 0xE8000; i += 0x4000) { 1001 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1002 iounmap(ha->brd); 1002 iounmap(ha->brd);
1003 ha->brd = ioremap(i, sizeof(ushort)); 1003 ha->brd = ioremap(i, sizeof(u16));
1004 if (ha->brd == NULL) { 1004 if (ha->brd == NULL) {
1005 printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); 1005 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1006 return 0; 1006 return 0;
@@ -1059,7 +1059,7 @@ static int __devinit gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
1059 } 1059 }
1060 gdth_delay(1); 1060 gdth_delay(1);
1061 } 1061 }
1062 prot_ver = (unchar)readl(&dp6c_ptr->u.ic.S_Info[0]); 1062 prot_ver = (u8)readl(&dp6c_ptr->u.ic.S_Info[0]);
1063 writeb(0, &dp6c_ptr->u.ic.Status); 1063 writeb(0, &dp6c_ptr->u.ic.Status);
1064 if (prot_ver != PROTOCOL_VERSION) { 1064 if (prot_ver != PROTOCOL_VERSION) {
1065 printk("GDT-PCI: Illegal protocol version\n"); 1065 printk("GDT-PCI: Illegal protocol version\n");
@@ -1128,7 +1128,7 @@ static int __devinit gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
1128 found = FALSE; 1128 found = FALSE;
1129 for (i = 0xC8000; i < 0xE8000; i += 0x4000) { 1129 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1130 iounmap(ha->brd); 1130 iounmap(ha->brd);
1131 ha->brd = ioremap(i, sizeof(ushort)); 1131 ha->brd = ioremap(i, sizeof(u16));
1132 if (ha->brd == NULL) { 1132 if (ha->brd == NULL) {
1133 printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); 1133 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1134 return 0; 1134 return 0;
@@ -1180,7 +1180,7 @@ static int __devinit gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
1180 } 1180 }
1181 gdth_delay(1); 1181 gdth_delay(1);
1182 } 1182 }
1183 prot_ver = (unchar)readl(&dp6m_ptr->u.ic.S_Info[0]); 1183 prot_ver = (u8)readl(&dp6m_ptr->u.ic.S_Info[0]);
1184 writeb(0, &dp6m_ptr->u.ic.S_Status); 1184 writeb(0, &dp6m_ptr->u.ic.S_Status);
1185 if (prot_ver != PROTOCOL_VERSION) { 1185 if (prot_ver != PROTOCOL_VERSION) {
1186 printk("GDT-PCI: Illegal protocol version\n"); 1186 printk("GDT-PCI: Illegal protocol version\n");
@@ -1223,7 +1223,7 @@ static int __devinit gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
1223 } 1223 }
1224 gdth_delay(1); 1224 gdth_delay(1);
1225 } 1225 }
1226 prot_ver = (unchar)(readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16); 1226 prot_ver = (u8)(readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1227 writeb(0, &dp6m_ptr->u.ic.S_Status); 1227 writeb(0, &dp6m_ptr->u.ic.S_Status);
1228 if (prot_ver < 0x2b) /* FW < x.43: no 64-bit DMA support */ 1228 if (prot_ver < 0x2b) /* FW < x.43: no 64-bit DMA support */
1229 ha->dma64_support = 0; 1229 ha->dma64_support = 0;
@@ -1239,7 +1239,7 @@ static int __devinit gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
1239 1239
1240static void __devinit gdth_enable_int(gdth_ha_str *ha) 1240static void __devinit gdth_enable_int(gdth_ha_str *ha)
1241{ 1241{
1242 ulong flags; 1242 unsigned long flags;
1243 gdt2_dpram_str __iomem *dp2_ptr; 1243 gdt2_dpram_str __iomem *dp2_ptr;
1244 gdt6_dpram_str __iomem *dp6_ptr; 1244 gdt6_dpram_str __iomem *dp6_ptr;
1245 gdt6m_dpram_str __iomem *dp6m_ptr; 1245 gdt6m_dpram_str __iomem *dp6m_ptr;
@@ -1274,14 +1274,14 @@ static void __devinit gdth_enable_int(gdth_ha_str *ha)
1274} 1274}
1275 1275
1276/* return IStatus if interrupt was from this card else 0 */ 1276/* return IStatus if interrupt was from this card else 0 */
1277static unchar gdth_get_status(gdth_ha_str *ha) 1277static u8 gdth_get_status(gdth_ha_str *ha)
1278{ 1278{
1279 unchar IStatus = 0; 1279 u8 IStatus = 0;
1280 1280
1281 TRACE(("gdth_get_status() irq %d ctr_count %d\n", ha->irq, gdth_ctr_count)); 1281 TRACE(("gdth_get_status() irq %d ctr_count %d\n", ha->irq, gdth_ctr_count));
1282 1282
1283 if (ha->type == GDT_EISA) 1283 if (ha->type == GDT_EISA)
1284 IStatus = inb((ushort)ha->bmic + EDOORREG); 1284 IStatus = inb((u16)ha->bmic + EDOORREG);
1285 else if (ha->type == GDT_ISA) 1285 else if (ha->type == GDT_ISA)
1286 IStatus = 1286 IStatus =
1287 readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index); 1287 readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
@@ -1329,7 +1329,7 @@ static int gdth_get_cmd_index(gdth_ha_str *ha)
1329 if (ha->cmd_tab[i].cmnd == UNUSED_CMND) { 1329 if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1330 ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer; 1330 ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1331 ha->cmd_tab[i].service = ha->pccb->Service; 1331 ha->cmd_tab[i].service = ha->pccb->Service;
1332 ha->pccb->CommandIndex = (ulong32)i+2; 1332 ha->pccb->CommandIndex = (u32)i+2;
1333 return (i+2); 1333 return (i+2);
1334 } 1334 }
1335 } 1335 }
@@ -1362,7 +1362,7 @@ static void gdth_copy_command(gdth_ha_str *ha)
1362 register gdt6c_dpram_str __iomem *dp6c_ptr; 1362 register gdt6c_dpram_str __iomem *dp6c_ptr;
1363 gdt6_dpram_str __iomem *dp6_ptr; 1363 gdt6_dpram_str __iomem *dp6_ptr;
1364 gdt2_dpram_str __iomem *dp2_ptr; 1364 gdt2_dpram_str __iomem *dp2_ptr;
1365 ushort cp_count,dp_offset,cmd_no; 1365 u16 cp_count,dp_offset,cmd_no;
1366 1366
1367 TRACE(("gdth_copy_command() hanum %d\n", ha->hanum)); 1367 TRACE(("gdth_copy_command() hanum %d\n", ha->hanum));
1368 1368
@@ -1386,28 +1386,28 @@ static void gdth_copy_command(gdth_ha_str *ha)
1386 dp2_ptr = ha->brd; 1386 dp2_ptr = ha->brd;
1387 writew(dp_offset + DPMEM_COMMAND_OFFSET, 1387 writew(dp_offset + DPMEM_COMMAND_OFFSET,
1388 &dp2_ptr->u.ic.comm_queue[cmd_no].offset); 1388 &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1389 writew((ushort)cmd_ptr->Service, 1389 writew((u16)cmd_ptr->Service,
1390 &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id); 1390 &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1391 memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); 1391 memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1392 } else if (ha->type == GDT_PCI) { 1392 } else if (ha->type == GDT_PCI) {
1393 dp6_ptr = ha->brd; 1393 dp6_ptr = ha->brd;
1394 writew(dp_offset + DPMEM_COMMAND_OFFSET, 1394 writew(dp_offset + DPMEM_COMMAND_OFFSET,
1395 &dp6_ptr->u.ic.comm_queue[cmd_no].offset); 1395 &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1396 writew((ushort)cmd_ptr->Service, 1396 writew((u16)cmd_ptr->Service,
1397 &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id); 1397 &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1398 memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); 1398 memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1399 } else if (ha->type == GDT_PCINEW) { 1399 } else if (ha->type == GDT_PCINEW) {
1400 dp6c_ptr = ha->brd; 1400 dp6c_ptr = ha->brd;
1401 writew(dp_offset + DPMEM_COMMAND_OFFSET, 1401 writew(dp_offset + DPMEM_COMMAND_OFFSET,
1402 &dp6c_ptr->u.ic.comm_queue[cmd_no].offset); 1402 &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1403 writew((ushort)cmd_ptr->Service, 1403 writew((u16)cmd_ptr->Service,
1404 &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id); 1404 &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1405 memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); 1405 memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1406 } else if (ha->type == GDT_PCIMPR) { 1406 } else if (ha->type == GDT_PCIMPR) {
1407 dp6m_ptr = ha->brd; 1407 dp6m_ptr = ha->brd;
1408 writew(dp_offset + DPMEM_COMMAND_OFFSET, 1408 writew(dp_offset + DPMEM_COMMAND_OFFSET,
1409 &dp6m_ptr->u.ic.comm_queue[cmd_no].offset); 1409 &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1410 writew((ushort)cmd_ptr->Service, 1410 writew((u16)cmd_ptr->Service,
1411 &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id); 1411 &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1412 memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); 1412 memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1413 } 1413 }
@@ -1420,14 +1420,14 @@ static void gdth_release_event(gdth_ha_str *ha)
1420 1420
1421#ifdef GDTH_STATISTICS 1421#ifdef GDTH_STATISTICS
1422 { 1422 {
1423 ulong32 i,j; 1423 u32 i,j;
1424 for (i=0,j=0; j<GDTH_MAXCMDS; ++j) { 1424 for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1425 if (ha->cmd_tab[j].cmnd != UNUSED_CMND) 1425 if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1426 ++i; 1426 ++i;
1427 } 1427 }
1428 if (max_index < i) { 1428 if (max_index < i) {
1429 max_index = i; 1429 max_index = i;
1430 TRACE3(("GDT: max_index = %d\n",(ushort)i)); 1430 TRACE3(("GDT: max_index = %d\n",(u16)i));
1431 } 1431 }
1432 } 1432 }
1433#endif 1433#endif
@@ -1450,7 +1450,7 @@ static void gdth_release_event(gdth_ha_str *ha)
1450 } 1450 }
1451} 1451}
1452 1452
1453static int gdth_wait(gdth_ha_str *ha, int index, ulong32 time) 1453static int gdth_wait(gdth_ha_str *ha, int index, u32 time)
1454{ 1454{
1455 int answer_found = FALSE; 1455 int answer_found = FALSE;
1456 int wait_index = 0; 1456 int wait_index = 0;
@@ -1476,8 +1476,8 @@ static int gdth_wait(gdth_ha_str *ha, int index, ulong32 time)
1476} 1476}
1477 1477
1478 1478
1479static int gdth_internal_cmd(gdth_ha_str *ha, unchar service, ushort opcode, 1479static int gdth_internal_cmd(gdth_ha_str *ha, u8 service, u16 opcode,
1480 ulong32 p1, ulong64 p2, ulong64 p3) 1480 u32 p1, u64 p2, u64 p3)
1481{ 1481{
1482 register gdth_cmd_str *cmd_ptr; 1482 register gdth_cmd_str *cmd_ptr;
1483 int retries,index; 1483 int retries,index;
@@ -1501,35 +1501,35 @@ static int gdth_internal_cmd(gdth_ha_str *ha, unchar service, ushort opcode,
1501 if (service == CACHESERVICE) { 1501 if (service == CACHESERVICE) {
1502 if (opcode == GDT_IOCTL) { 1502 if (opcode == GDT_IOCTL) {
1503 cmd_ptr->u.ioctl.subfunc = p1; 1503 cmd_ptr->u.ioctl.subfunc = p1;
1504 cmd_ptr->u.ioctl.channel = (ulong32)p2; 1504 cmd_ptr->u.ioctl.channel = (u32)p2;
1505 cmd_ptr->u.ioctl.param_size = (ushort)p3; 1505 cmd_ptr->u.ioctl.param_size = (u16)p3;
1506 cmd_ptr->u.ioctl.p_param = ha->scratch_phys; 1506 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1507 } else { 1507 } else {
1508 if (ha->cache_feat & GDT_64BIT) { 1508 if (ha->cache_feat & GDT_64BIT) {
1509 cmd_ptr->u.cache64.DeviceNo = (ushort)p1; 1509 cmd_ptr->u.cache64.DeviceNo = (u16)p1;
1510 cmd_ptr->u.cache64.BlockNo = p2; 1510 cmd_ptr->u.cache64.BlockNo = p2;
1511 } else { 1511 } else {
1512 cmd_ptr->u.cache.DeviceNo = (ushort)p1; 1512 cmd_ptr->u.cache.DeviceNo = (u16)p1;
1513 cmd_ptr->u.cache.BlockNo = (ulong32)p2; 1513 cmd_ptr->u.cache.BlockNo = (u32)p2;
1514 } 1514 }
1515 } 1515 }
1516 } else if (service == SCSIRAWSERVICE) { 1516 } else if (service == SCSIRAWSERVICE) {
1517 if (ha->raw_feat & GDT_64BIT) { 1517 if (ha->raw_feat & GDT_64BIT) {
1518 cmd_ptr->u.raw64.direction = p1; 1518 cmd_ptr->u.raw64.direction = p1;
1519 cmd_ptr->u.raw64.bus = (unchar)p2; 1519 cmd_ptr->u.raw64.bus = (u8)p2;
1520 cmd_ptr->u.raw64.target = (unchar)p3; 1520 cmd_ptr->u.raw64.target = (u8)p3;
1521 cmd_ptr->u.raw64.lun = (unchar)(p3 >> 8); 1521 cmd_ptr->u.raw64.lun = (u8)(p3 >> 8);
1522 } else { 1522 } else {
1523 cmd_ptr->u.raw.direction = p1; 1523 cmd_ptr->u.raw.direction = p1;
1524 cmd_ptr->u.raw.bus = (unchar)p2; 1524 cmd_ptr->u.raw.bus = (u8)p2;
1525 cmd_ptr->u.raw.target = (unchar)p3; 1525 cmd_ptr->u.raw.target = (u8)p3;
1526 cmd_ptr->u.raw.lun = (unchar)(p3 >> 8); 1526 cmd_ptr->u.raw.lun = (u8)(p3 >> 8);
1527 } 1527 }
1528 } else if (service == SCREENSERVICE) { 1528 } else if (service == SCREENSERVICE) {
1529 if (opcode == GDT_REALTIME) { 1529 if (opcode == GDT_REALTIME) {
1530 *(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1; 1530 *(u32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1531 *(ulong32 *)&cmd_ptr->u.screen.su.data[4] = (ulong32)p2; 1531 *(u32 *)&cmd_ptr->u.screen.su.data[4] = (u32)p2;
1532 *(ulong32 *)&cmd_ptr->u.screen.su.data[8] = (ulong32)p3; 1532 *(u32 *)&cmd_ptr->u.screen.su.data[8] = (u32)p3;
1533 } 1533 }
1534 } 1534 }
1535 ha->cmd_len = sizeof(gdth_cmd_str); 1535 ha->cmd_len = sizeof(gdth_cmd_str);
@@ -1555,9 +1555,9 @@ static int gdth_internal_cmd(gdth_ha_str *ha, unchar service, ushort opcode,
1555 1555
1556static int __devinit gdth_search_drives(gdth_ha_str *ha) 1556static int __devinit gdth_search_drives(gdth_ha_str *ha)
1557{ 1557{
1558 ushort cdev_cnt, i; 1558 u16 cdev_cnt, i;
1559 int ok; 1559 int ok;
1560 ulong32 bus_no, drv_cnt, drv_no, j; 1560 u32 bus_no, drv_cnt, drv_no, j;
1561 gdth_getch_str *chn; 1561 gdth_getch_str *chn;
1562 gdth_drlist_str *drl; 1562 gdth_drlist_str *drl;
1563 gdth_iochan_str *ioc; 1563 gdth_iochan_str *ioc;
@@ -1570,8 +1570,8 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1570#endif 1570#endif
1571 1571
1572#ifdef GDTH_RTC 1572#ifdef GDTH_RTC
1573 unchar rtc[12]; 1573 u8 rtc[12];
1574 ulong flags; 1574 unsigned long flags;
1575#endif 1575#endif
1576 1576
1577 TRACE(("gdth_search_drives() hanum %d\n", ha->hanum)); 1577 TRACE(("gdth_search_drives() hanum %d\n", ha->hanum));
@@ -1584,7 +1584,7 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1584 if (ok) 1584 if (ok)
1585 ha->screen_feat = GDT_64BIT; 1585 ha->screen_feat = GDT_64BIT;
1586 } 1586 }
1587 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC)) 1587 if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC))
1588 ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_INIT, 0, 0, 0); 1588 ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_INIT, 0, 0, 0);
1589 if (!ok) { 1589 if (!ok) {
1590 printk("GDT-HA %d: Initialization error screen service (code %d)\n", 1590 printk("GDT-HA %d: Initialization error screen service (code %d)\n",
@@ -1609,11 +1609,11 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1609 rtc[j] = CMOS_READ(j); 1609 rtc[j] = CMOS_READ(j);
1610 } while (rtc[0] != CMOS_READ(0)); 1610 } while (rtc[0] != CMOS_READ(0));
1611 spin_unlock_irqrestore(&rtc_lock, flags); 1611 spin_unlock_irqrestore(&rtc_lock, flags);
1612 TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0], 1612 TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(u32 *)&rtc[0],
1613 *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8])); 1613 *(u32 *)&rtc[4], *(u32 *)&rtc[8]));
1614 /* 3. send to controller firmware */ 1614 /* 3. send to controller firmware */
1615 gdth_internal_cmd(ha, SCREENSERVICE, GDT_REALTIME, *(ulong32 *)&rtc[0], 1615 gdth_internal_cmd(ha, SCREENSERVICE, GDT_REALTIME, *(u32 *)&rtc[0],
1616 *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]); 1616 *(u32 *)&rtc[4], *(u32 *)&rtc[8]);
1617#endif 1617#endif
1618 1618
1619 /* unfreeze all IOs */ 1619 /* unfreeze all IOs */
@@ -1627,7 +1627,7 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1627 if (ok) 1627 if (ok)
1628 ha->cache_feat = GDT_64BIT; 1628 ha->cache_feat = GDT_64BIT;
1629 } 1629 }
1630 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC)) 1630 if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC))
1631 ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_INIT, LINUX_OS, 0, 0); 1631 ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_INIT, LINUX_OS, 0, 0);
1632 if (!ok) { 1632 if (!ok) {
1633 printk("GDT-HA %d: Initialization error cache service (code %d)\n", 1633 printk("GDT-HA %d: Initialization error cache service (code %d)\n",
@@ -1635,7 +1635,7 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1635 return 0; 1635 return 0;
1636 } 1636 }
1637 TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n")); 1637 TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1638 cdev_cnt = (ushort)ha->info; 1638 cdev_cnt = (u16)ha->info;
1639 ha->fw_vers = ha->service; 1639 ha->fw_vers = ha->service;
1640 1640
1641#ifdef INT_COAL 1641#ifdef INT_COAL
@@ -1644,7 +1644,7 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1644 pmod = (gdth_perf_modes *)ha->pscratch; 1644 pmod = (gdth_perf_modes *)ha->pscratch;
1645 pmod->version = 1; 1645 pmod->version = 1;
1646 pmod->st_mode = 1; /* enable one status buffer */ 1646 pmod->st_mode = 1; /* enable one status buffer */
1647 *((ulong64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys; 1647 *((u64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
1648 pmod->st_buff_indx1 = COALINDEX; 1648 pmod->st_buff_indx1 = COALINDEX;
1649 pmod->st_buff_addr2 = 0; 1649 pmod->st_buff_addr2 = 0;
1650 pmod->st_buff_u_addr2 = 0; 1650 pmod->st_buff_u_addr2 = 0;
@@ -1705,7 +1705,7 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1705 else 1705 else
1706 ha->bus_id[bus_no] = 0xff; 1706 ha->bus_id[bus_no] = 0xff;
1707 } 1707 }
1708 ha->bus_cnt = (unchar)bus_no; 1708 ha->bus_cnt = (u8)bus_no;
1709 } 1709 }
1710 TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt)); 1710 TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
1711 1711
@@ -1789,12 +1789,12 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1789 1789
1790 /* logical drives */ 1790 /* logical drives */
1791 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_CNT, 1791 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_CNT,
1792 INVALID_CHANNEL,sizeof(ulong32))) { 1792 INVALID_CHANNEL,sizeof(u32))) {
1793 drv_cnt = *(ulong32 *)ha->pscratch; 1793 drv_cnt = *(u32 *)ha->pscratch;
1794 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_LIST, 1794 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_LIST,
1795 INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) { 1795 INVALID_CHANNEL,drv_cnt * sizeof(u32))) {
1796 for (j = 0; j < drv_cnt; ++j) { 1796 for (j = 0; j < drv_cnt; ++j) {
1797 drv_no = ((ulong32 *)ha->pscratch)[j]; 1797 drv_no = ((u32 *)ha->pscratch)[j];
1798 if (drv_no < MAX_LDRIVES) { 1798 if (drv_no < MAX_LDRIVES) {
1799 ha->hdr[drv_no].is_logdrv = TRUE; 1799 ha->hdr[drv_no].is_logdrv = TRUE;
1800 TRACE2(("Drive %d is log. drive\n",drv_no)); 1800 TRACE2(("Drive %d is log. drive\n",drv_no));
@@ -1838,7 +1838,7 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1838 if (ok) 1838 if (ok)
1839 ha->raw_feat = GDT_64BIT; 1839 ha->raw_feat = GDT_64BIT;
1840 } 1840 }
1841 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC)) 1841 if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC))
1842 ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_INIT, 0, 0, 0); 1842 ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_INIT, 0, 0, 0);
1843 if (!ok) { 1843 if (!ok) {
1844 printk("GDT-HA %d: Initialization error raw service (code %d)\n", 1844 printk("GDT-HA %d: Initialization error raw service (code %d)\n",
@@ -1854,7 +1854,7 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1854 if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_GET_FEAT, 0, 0, 0)) { 1854 if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_GET_FEAT, 0, 0, 0)) {
1855 TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n", 1855 TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
1856 ha->info)); 1856 ha->info));
1857 ha->raw_feat |= (ushort)ha->info; 1857 ha->raw_feat |= (u16)ha->info;
1858 } 1858 }
1859 } 1859 }
1860 1860
@@ -1865,7 +1865,7 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1865 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_GET_FEAT, 0, 0, 0)) { 1865 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_GET_FEAT, 0, 0, 0)) {
1866 TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n", 1866 TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
1867 ha->info)); 1867 ha->info));
1868 ha->cache_feat |= (ushort)ha->info; 1868 ha->cache_feat |= (u16)ha->info;
1869 } 1869 }
1870 } 1870 }
1871 1871
@@ -1923,9 +1923,9 @@ static int __devinit gdth_search_drives(gdth_ha_str *ha)
1923 return 1; 1923 return 1;
1924} 1924}
1925 1925
1926static int gdth_analyse_hdrive(gdth_ha_str *ha, ushort hdrive) 1926static int gdth_analyse_hdrive(gdth_ha_str *ha, u16 hdrive)
1927{ 1927{
1928 ulong32 drv_cyls; 1928 u32 drv_cyls;
1929 int drv_hds, drv_secs; 1929 int drv_hds, drv_secs;
1930 1930
1931 TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n", ha->hanum, hdrive)); 1931 TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n", ha->hanum, hdrive));
@@ -1944,17 +1944,17 @@ static int gdth_analyse_hdrive(gdth_ha_str *ha, ushort hdrive)
1944 } else { 1944 } else {
1945 drv_hds = ha->info2 & 0xff; 1945 drv_hds = ha->info2 & 0xff;
1946 drv_secs = (ha->info2 >> 8) & 0xff; 1946 drv_secs = (ha->info2 >> 8) & 0xff;
1947 drv_cyls = (ulong32)ha->hdr[hdrive].size / drv_hds / drv_secs; 1947 drv_cyls = (u32)ha->hdr[hdrive].size / drv_hds / drv_secs;
1948 } 1948 }
1949 ha->hdr[hdrive].heads = (unchar)drv_hds; 1949 ha->hdr[hdrive].heads = (u8)drv_hds;
1950 ha->hdr[hdrive].secs = (unchar)drv_secs; 1950 ha->hdr[hdrive].secs = (u8)drv_secs;
1951 /* round size */ 1951 /* round size */
1952 ha->hdr[hdrive].size = drv_cyls * drv_hds * drv_secs; 1952 ha->hdr[hdrive].size = drv_cyls * drv_hds * drv_secs;
1953 1953
1954 if (ha->cache_feat & GDT_64BIT) { 1954 if (ha->cache_feat & GDT_64BIT) {
1955 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INFO, hdrive, 0, 0) 1955 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INFO, hdrive, 0, 0)
1956 && ha->info2 != 0) { 1956 && ha->info2 != 0) {
1957 ha->hdr[hdrive].size = ((ulong64)ha->info2 << 32) | ha->info; 1957 ha->hdr[hdrive].size = ((u64)ha->info2 << 32) | ha->info;
1958 } 1958 }
1959 } 1959 }
1960 TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n", 1960 TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
@@ -1964,7 +1964,7 @@ static int gdth_analyse_hdrive(gdth_ha_str *ha, ushort hdrive)
1964 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_DEVTYPE, hdrive, 0, 0)) { 1964 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_DEVTYPE, hdrive, 0, 0)) {
1965 TRACE2(("gdth_search_dr() cache drive %d devtype %d\n", 1965 TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
1966 hdrive,ha->info)); 1966 hdrive,ha->info));
1967 ha->hdr[hdrive].devtype = (ushort)ha->info; 1967 ha->hdr[hdrive].devtype = (u16)ha->info;
1968 } 1968 }
1969 1969
1970 /* cluster info */ 1970 /* cluster info */
@@ -1972,14 +1972,14 @@ static int gdth_analyse_hdrive(gdth_ha_str *ha, ushort hdrive)
1972 TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n", 1972 TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
1973 hdrive,ha->info)); 1973 hdrive,ha->info));
1974 if (!shared_access) 1974 if (!shared_access)
1975 ha->hdr[hdrive].cluster_type = (unchar)ha->info; 1975 ha->hdr[hdrive].cluster_type = (u8)ha->info;
1976 } 1976 }
1977 1977
1978 /* R/W attributes */ 1978 /* R/W attributes */
1979 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_RW_ATTRIBS, hdrive, 0, 0)) { 1979 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_RW_ATTRIBS, hdrive, 0, 0)) {
1980 TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n", 1980 TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
1981 hdrive,ha->info)); 1981 hdrive,ha->info));
1982 ha->hdr[hdrive].rw_attribs = (unchar)ha->info; 1982 ha->hdr[hdrive].rw_attribs = (u8)ha->info;
1983 } 1983 }
1984 1984
1985 return 1; 1985 return 1;
@@ -1988,12 +1988,12 @@ static int gdth_analyse_hdrive(gdth_ha_str *ha, ushort hdrive)
1988 1988
1989/* command queueing/sending functions */ 1989/* command queueing/sending functions */
1990 1990
1991static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar priority) 1991static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 priority)
1992{ 1992{
1993 struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp); 1993 struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
1994 register Scsi_Cmnd *pscp; 1994 register Scsi_Cmnd *pscp;
1995 register Scsi_Cmnd *nscp; 1995 register Scsi_Cmnd *nscp;
1996 ulong flags; 1996 unsigned long flags;
1997 1997
1998 TRACE(("gdth_putq() priority %d\n",priority)); 1998 TRACE(("gdth_putq() priority %d\n",priority));
1999 spin_lock_irqsave(&ha->smp_lock, flags); 1999 spin_lock_irqsave(&ha->smp_lock, flags);
@@ -2023,7 +2023,7 @@ static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar priority)
2023 ++flags; 2023 ++flags;
2024 if (max_rq < flags) { 2024 if (max_rq < flags) {
2025 max_rq = flags; 2025 max_rq = flags;
2026 TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq)); 2026 TRACE3(("GDT: max_rq = %d\n",(u16)max_rq));
2027 } 2027 }
2028#endif 2028#endif
2029} 2029}
@@ -2032,9 +2032,9 @@ static void gdth_next(gdth_ha_str *ha)
2032{ 2032{
2033 register Scsi_Cmnd *pscp; 2033 register Scsi_Cmnd *pscp;
2034 register Scsi_Cmnd *nscp; 2034 register Scsi_Cmnd *nscp;
2035 unchar b, t, l, firsttime; 2035 u8 b, t, l, firsttime;
2036 unchar this_cmd, next_cmd; 2036 u8 this_cmd, next_cmd;
2037 ulong flags = 0; 2037 unsigned long flags = 0;
2038 int cmd_index; 2038 int cmd_index;
2039 2039
2040 TRACE(("gdth_next() hanum %d\n", ha->hanum)); 2040 TRACE(("gdth_next() hanum %d\n", ha->hanum));
@@ -2282,20 +2282,20 @@ static void gdth_next(gdth_ha_str *ha)
2282 * buffers, kmap_atomic() as needed. 2282 * buffers, kmap_atomic() as needed.
2283 */ 2283 */
2284static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp, 2284static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp,
2285 char *buffer, ushort count) 2285 char *buffer, u16 count)
2286{ 2286{
2287 ushort cpcount,i, max_sg = scsi_sg_count(scp); 2287 u16 cpcount,i, max_sg = scsi_sg_count(scp);
2288 ushort cpsum,cpnow; 2288 u16 cpsum,cpnow;
2289 struct scatterlist *sl; 2289 struct scatterlist *sl;
2290 char *address; 2290 char *address;
2291 2291
2292 cpcount = min_t(ushort, count, scsi_bufflen(scp)); 2292 cpcount = min_t(u16, count, scsi_bufflen(scp));
2293 2293
2294 if (cpcount) { 2294 if (cpcount) {
2295 cpsum=0; 2295 cpsum=0;
2296 scsi_for_each_sg(scp, sl, max_sg, i) { 2296 scsi_for_each_sg(scp, sl, max_sg, i) {
2297 unsigned long flags; 2297 unsigned long flags;
2298 cpnow = (ushort)sl->length; 2298 cpnow = (u16)sl->length;
2299 TRACE(("copy_internal() now %d sum %d count %d %d\n", 2299 TRACE(("copy_internal() now %d sum %d count %d %d\n",
2300 cpnow, cpsum, cpcount, scsi_bufflen(scp))); 2300 cpnow, cpsum, cpcount, scsi_bufflen(scp)));
2301 if (cpsum+cpnow > cpcount) 2301 if (cpsum+cpnow > cpcount)
@@ -2325,7 +2325,7 @@ static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp,
2325 2325
2326static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp) 2326static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2327{ 2327{
2328 unchar t; 2328 u8 t;
2329 gdth_inq_data inq; 2329 gdth_inq_data inq;
2330 gdth_rdcap_data rdc; 2330 gdth_rdcap_data rdc;
2331 gdth_sense_data sd; 2331 gdth_sense_data sd;
@@ -2389,7 +2389,7 @@ static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2389 2389
2390 case READ_CAPACITY: 2390 case READ_CAPACITY:
2391 TRACE2(("Read capacity hdrive %d\n",t)); 2391 TRACE2(("Read capacity hdrive %d\n",t));
2392 if (ha->hdr[t].size > (ulong64)0xffffffff) 2392 if (ha->hdr[t].size > (u64)0xffffffff)
2393 rdc.last_block_no = 0xffffffff; 2393 rdc.last_block_no = 0xffffffff;
2394 else 2394 else
2395 rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1); 2395 rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
@@ -2425,12 +2425,12 @@ static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2425 return 0; 2425 return 0;
2426} 2426}
2427 2427
2428static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive) 2428static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u16 hdrive)
2429{ 2429{
2430 register gdth_cmd_str *cmdp; 2430 register gdth_cmd_str *cmdp;
2431 struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp); 2431 struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2432 ulong32 cnt, blockcnt; 2432 u32 cnt, blockcnt;
2433 ulong64 no, blockno; 2433 u64 no, blockno;
2434 int i, cmd_index, read_write, sgcnt, mode64; 2434 int i, cmd_index, read_write, sgcnt, mode64;
2435 2435
2436 cmdp = ha->pccb; 2436 cmdp = ha->pccb;
@@ -2498,17 +2498,17 @@ static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive)
2498 2498
2499 if (read_write) { 2499 if (read_write) {
2500 if (scp->cmd_len == 16) { 2500 if (scp->cmd_len == 16) {
2501 memcpy(&no, &scp->cmnd[2], sizeof(ulong64)); 2501 memcpy(&no, &scp->cmnd[2], sizeof(u64));
2502 blockno = be64_to_cpu(no); 2502 blockno = be64_to_cpu(no);
2503 memcpy(&cnt, &scp->cmnd[10], sizeof(ulong32)); 2503 memcpy(&cnt, &scp->cmnd[10], sizeof(u32));
2504 blockcnt = be32_to_cpu(cnt); 2504 blockcnt = be32_to_cpu(cnt);
2505 } else if (scp->cmd_len == 10) { 2505 } else if (scp->cmd_len == 10) {
2506 memcpy(&no, &scp->cmnd[2], sizeof(ulong32)); 2506 memcpy(&no, &scp->cmnd[2], sizeof(u32));
2507 blockno = be32_to_cpu(no); 2507 blockno = be32_to_cpu(no);
2508 memcpy(&cnt, &scp->cmnd[7], sizeof(ushort)); 2508 memcpy(&cnt, &scp->cmnd[7], sizeof(u16));
2509 blockcnt = be16_to_cpu(cnt); 2509 blockcnt = be16_to_cpu(cnt);
2510 } else { 2510 } else {
2511 memcpy(&no, &scp->cmnd[0], sizeof(ulong32)); 2511 memcpy(&no, &scp->cmnd[0], sizeof(u32));
2512 blockno = be32_to_cpu(no) & 0x001fffffUL; 2512 blockno = be32_to_cpu(no) & 0x001fffffUL;
2513 blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4]; 2513 blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2514 } 2514 }
@@ -2516,7 +2516,7 @@ static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive)
2516 cmdp->u.cache64.BlockNo = blockno; 2516 cmdp->u.cache64.BlockNo = blockno;
2517 cmdp->u.cache64.BlockCnt = blockcnt; 2517 cmdp->u.cache64.BlockCnt = blockcnt;
2518 } else { 2518 } else {
2519 cmdp->u.cache.BlockNo = (ulong32)blockno; 2519 cmdp->u.cache.BlockNo = (u32)blockno;
2520 cmdp->u.cache.BlockCnt = blockcnt; 2520 cmdp->u.cache.BlockCnt = blockcnt;
2521 } 2521 }
2522 2522
@@ -2528,12 +2528,12 @@ static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive)
2528 if (mode64) { 2528 if (mode64) {
2529 struct scatterlist *sl; 2529 struct scatterlist *sl;
2530 2530
2531 cmdp->u.cache64.DestAddr= (ulong64)-1; 2531 cmdp->u.cache64.DestAddr= (u64)-1;
2532 cmdp->u.cache64.sg_canz = sgcnt; 2532 cmdp->u.cache64.sg_canz = sgcnt;
2533 scsi_for_each_sg(scp, sl, sgcnt, i) { 2533 scsi_for_each_sg(scp, sl, sgcnt, i) {
2534 cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl); 2534 cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2535#ifdef GDTH_DMA_STATISTICS 2535#ifdef GDTH_DMA_STATISTICS
2536 if (cmdp->u.cache64.sg_lst[i].sg_ptr > (ulong64)0xffffffff) 2536 if (cmdp->u.cache64.sg_lst[i].sg_ptr > (u64)0xffffffff)
2537 ha->dma64_cnt++; 2537 ha->dma64_cnt++;
2538 else 2538 else
2539 ha->dma32_cnt++; 2539 ha->dma32_cnt++;
@@ -2555,8 +2555,8 @@ static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive)
2555 } 2555 }
2556 2556
2557#ifdef GDTH_STATISTICS 2557#ifdef GDTH_STATISTICS
2558 if (max_sg < (ulong32)sgcnt) { 2558 if (max_sg < (u32)sgcnt) {
2559 max_sg = (ulong32)sgcnt; 2559 max_sg = (u32)sgcnt;
2560 TRACE3(("GDT: max_sg = %d\n",max_sg)); 2560 TRACE3(("GDT: max_sg = %d\n",max_sg));
2561 } 2561 }
2562#endif 2562#endif
@@ -2572,7 +2572,7 @@ static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive)
2572 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n", 2572 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2573 cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt)); 2573 cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2574 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + 2574 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2575 (ushort)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str); 2575 (u16)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2576 } else { 2576 } else {
2577 TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n", 2577 TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2578 cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz, 2578 cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
@@ -2581,7 +2581,7 @@ static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive)
2581 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n", 2581 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2582 cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt)); 2582 cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2583 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + 2583 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2584 (ushort)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str); 2584 (u16)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
2585 } 2585 }
2586 if (ha->cmd_len & 3) 2586 if (ha->cmd_len & 3)
2587 ha->cmd_len += (4 - (ha->cmd_len & 3)); 2587 ha->cmd_len += (4 - (ha->cmd_len & 3));
@@ -2600,15 +2600,15 @@ static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive)
2600 return cmd_index; 2600 return cmd_index;
2601} 2601}
2602 2602
2603static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar b) 2603static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 b)
2604{ 2604{
2605 register gdth_cmd_str *cmdp; 2605 register gdth_cmd_str *cmdp;
2606 ushort i; 2606 u16 i;
2607 dma_addr_t sense_paddr; 2607 dma_addr_t sense_paddr;
2608 int cmd_index, sgcnt, mode64; 2608 int cmd_index, sgcnt, mode64;
2609 unchar t,l; 2609 u8 t,l;
2610 struct page *page; 2610 struct page *page;
2611 ulong offset; 2611 unsigned long offset;
2612 struct gdth_cmndinfo *cmndinfo; 2612 struct gdth_cmndinfo *cmndinfo;
2613 2613
2614 t = scp->device->id; 2614 t = scp->device->id;
@@ -2654,7 +2654,7 @@ static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar b)
2654 2654
2655 } else { 2655 } else {
2656 page = virt_to_page(scp->sense_buffer); 2656 page = virt_to_page(scp->sense_buffer);
2657 offset = (ulong)scp->sense_buffer & ~PAGE_MASK; 2657 offset = (unsigned long)scp->sense_buffer & ~PAGE_MASK;
2658 sense_paddr = pci_map_page(ha->pdev,page,offset, 2658 sense_paddr = pci_map_page(ha->pdev,page,offset,
2659 16,PCI_DMA_FROMDEVICE); 2659 16,PCI_DMA_FROMDEVICE);
2660 2660
@@ -2703,12 +2703,12 @@ static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar b)
2703 if (mode64) { 2703 if (mode64) {
2704 struct scatterlist *sl; 2704 struct scatterlist *sl;
2705 2705
2706 cmdp->u.raw64.sdata = (ulong64)-1; 2706 cmdp->u.raw64.sdata = (u64)-1;
2707 cmdp->u.raw64.sg_ranz = sgcnt; 2707 cmdp->u.raw64.sg_ranz = sgcnt;
2708 scsi_for_each_sg(scp, sl, sgcnt, i) { 2708 scsi_for_each_sg(scp, sl, sgcnt, i) {
2709 cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl); 2709 cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2710#ifdef GDTH_DMA_STATISTICS 2710#ifdef GDTH_DMA_STATISTICS
2711 if (cmdp->u.raw64.sg_lst[i].sg_ptr > (ulong64)0xffffffff) 2711 if (cmdp->u.raw64.sg_lst[i].sg_ptr > (u64)0xffffffff)
2712 ha->dma64_cnt++; 2712 ha->dma64_cnt++;
2713 else 2713 else
2714 ha->dma32_cnt++; 2714 ha->dma32_cnt++;
@@ -2744,7 +2744,7 @@ static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar b)
2744 cmdp->u.raw64.sg_lst[0].sg_len)); 2744 cmdp->u.raw64.sg_lst[0].sg_len));
2745 /* evaluate command size */ 2745 /* evaluate command size */
2746 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + 2746 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
2747 (ushort)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str); 2747 (u16)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
2748 } else { 2748 } else {
2749 TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n", 2749 TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2750 cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz, 2750 cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
@@ -2752,7 +2752,7 @@ static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar b)
2752 cmdp->u.raw.sg_lst[0].sg_len)); 2752 cmdp->u.raw.sg_lst[0].sg_len));
2753 /* evaluate command size */ 2753 /* evaluate command size */
2754 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + 2754 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
2755 (ushort)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str); 2755 (u16)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
2756 } 2756 }
2757 } 2757 }
2758 /* check space */ 2758 /* check space */
@@ -2802,7 +2802,7 @@ static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2802 if (cmdp->OpCode == GDT_IOCTL) { 2802 if (cmdp->OpCode == GDT_IOCTL) {
2803 TRACE2(("IOCTL\n")); 2803 TRACE2(("IOCTL\n"));
2804 ha->cmd_len = 2804 ha->cmd_len =
2805 GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(ulong64); 2805 GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(u64);
2806 } else if (cmdp->Service == CACHESERVICE) { 2806 } else if (cmdp->Service == CACHESERVICE) {
2807 TRACE2(("cache command %d\n",cmdp->OpCode)); 2807 TRACE2(("cache command %d\n",cmdp->OpCode));
2808 if (ha->cache_feat & GDT_64BIT) 2808 if (ha->cache_feat & GDT_64BIT)
@@ -2840,8 +2840,8 @@ static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2840 2840
2841 2841
2842/* Controller event handling functions */ 2842/* Controller event handling functions */
2843static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source, 2843static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source,
2844 ushort idx, gdth_evt_data *evt) 2844 u16 idx, gdth_evt_data *evt)
2845{ 2845{
2846 gdth_evt_str *e; 2846 gdth_evt_str *e;
2847 struct timeval tv; 2847 struct timeval tv;
@@ -2890,7 +2890,7 @@ static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
2890{ 2890{
2891 gdth_evt_str *e; 2891 gdth_evt_str *e;
2892 int eindex; 2892 int eindex;
2893 ulong flags; 2893 unsigned long flags;
2894 2894
2895 TRACE2(("gdth_read_event() handle %d\n", handle)); 2895 TRACE2(("gdth_read_event() handle %d\n", handle));
2896 spin_lock_irqsave(&ha->smp_lock, flags); 2896 spin_lock_irqsave(&ha->smp_lock, flags);
@@ -2919,12 +2919,12 @@ static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
2919} 2919}
2920 2920
2921static void gdth_readapp_event(gdth_ha_str *ha, 2921static void gdth_readapp_event(gdth_ha_str *ha,
2922 unchar application, gdth_evt_str *estr) 2922 u8 application, gdth_evt_str *estr)
2923{ 2923{
2924 gdth_evt_str *e; 2924 gdth_evt_str *e;
2925 int eindex; 2925 int eindex;
2926 ulong flags; 2926 unsigned long flags;
2927 unchar found = FALSE; 2927 u8 found = FALSE;
2928 2928
2929 TRACE2(("gdth_readapp_event() app. %d\n", application)); 2929 TRACE2(("gdth_readapp_event() app. %d\n", application));
2930 spin_lock_irqsave(&ha->smp_lock, flags); 2930 spin_lock_irqsave(&ha->smp_lock, flags);
@@ -2969,9 +2969,9 @@ static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
2969 gdt2_dpram_str __iomem *dp2_ptr; 2969 gdt2_dpram_str __iomem *dp2_ptr;
2970 Scsi_Cmnd *scp; 2970 Scsi_Cmnd *scp;
2971 int rval, i; 2971 int rval, i;
2972 unchar IStatus; 2972 u8 IStatus;
2973 ushort Service; 2973 u16 Service;
2974 ulong flags = 0; 2974 unsigned long flags = 0;
2975#ifdef INT_COAL 2975#ifdef INT_COAL
2976 int coalesced = FALSE; 2976 int coalesced = FALSE;
2977 int next = FALSE; 2977 int next = FALSE;
@@ -3018,7 +3018,7 @@ static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
3018 if (coalesced) { 3018 if (coalesced) {
3019 /* For coalesced requests all status 3019 /* For coalesced requests all status
3020 information is found in the status buffer */ 3020 information is found in the status buffer */
3021 IStatus = (unchar)(pcs->status & 0xff); 3021 IStatus = (u8)(pcs->status & 0xff);
3022 } 3022 }
3023#endif 3023#endif
3024 3024
@@ -3197,7 +3197,7 @@ static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
3197 ++act_int_coal; 3197 ++act_int_coal;
3198 if (act_int_coal > max_int_coal) { 3198 if (act_int_coal > max_int_coal) {
3199 max_int_coal = act_int_coal; 3199 max_int_coal = act_int_coal;
3200 printk("GDT: max_int_coal = %d\n",(ushort)max_int_coal); 3200 printk("GDT: max_int_coal = %d\n",(u16)max_int_coal);
3201 } 3201 }
3202#endif 3202#endif
3203 /* see if there is another status */ 3203 /* see if there is another status */
@@ -3225,12 +3225,12 @@ static irqreturn_t gdth_interrupt(int irq, void *dev_id)
3225 return __gdth_interrupt(ha, false, NULL); 3225 return __gdth_interrupt(ha, false, NULL);
3226} 3226}
3227 3227
3228static int gdth_sync_event(gdth_ha_str *ha, int service, unchar index, 3228static int gdth_sync_event(gdth_ha_str *ha, int service, u8 index,
3229 Scsi_Cmnd *scp) 3229 Scsi_Cmnd *scp)
3230{ 3230{
3231 gdth_msg_str *msg; 3231 gdth_msg_str *msg;
3232 gdth_cmd_str *cmdp; 3232 gdth_cmd_str *cmdp;
3233 unchar b, t; 3233 u8 b, t;
3234 struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp); 3234 struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
3235 3235
3236 cmdp = ha->pccb; 3236 cmdp = ha->pccb;
@@ -3263,7 +3263,7 @@ static int gdth_sync_event(gdth_ha_str *ha, int service, unchar index,
3263 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys; 3263 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
3264 ha->cmd_offs_dpmem = 0; 3264 ha->cmd_offs_dpmem = 0;
3265 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr) 3265 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3266 + sizeof(ulong64); 3266 + sizeof(u64);
3267 ha->cmd_cnt = 0; 3267 ha->cmd_cnt = 0;
3268 gdth_copy_command(ha); 3268 gdth_copy_command(ha);
3269 gdth_release_event(ha); 3269 gdth_release_event(ha);
@@ -3297,7 +3297,7 @@ static int gdth_sync_event(gdth_ha_str *ha, int service, unchar index,
3297 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys; 3297 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
3298 ha->cmd_offs_dpmem = 0; 3298 ha->cmd_offs_dpmem = 0;
3299 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr) 3299 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3300 + sizeof(ulong64); 3300 + sizeof(u64);
3301 ha->cmd_cnt = 0; 3301 ha->cmd_cnt = 0;
3302 gdth_copy_command(ha); 3302 gdth_copy_command(ha);
3303 gdth_release_event(ha); 3303 gdth_release_event(ha);
@@ -3335,7 +3335,7 @@ static int gdth_sync_event(gdth_ha_str *ha, int service, unchar index,
3335 cmndinfo->OpCode)); 3335 cmndinfo->OpCode));
3336 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */ 3336 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3337 if (cmndinfo->OpCode == GDT_CLUST_INFO) { 3337 if (cmndinfo->OpCode == GDT_CLUST_INFO) {
3338 ha->hdr[t].cluster_type = (unchar)ha->info; 3338 ha->hdr[t].cluster_type = (u8)ha->info;
3339 if (!(ha->hdr[t].cluster_type & 3339 if (!(ha->hdr[t].cluster_type &
3340 CLUSTER_MOUNTED)) { 3340 CLUSTER_MOUNTED)) {
3341 /* NOT MOUNTED -> MOUNT */ 3341 /* NOT MOUNTED -> MOUNT */
@@ -3397,7 +3397,7 @@ static int gdth_sync_event(gdth_ha_str *ha, int service, unchar index,
3397 ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED; 3397 ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3398 } 3398 }
3399 memset((char*)scp->sense_buffer,0,16); 3399 memset((char*)scp->sense_buffer,0,16);
3400 if (ha->status == (ushort)S_CACHE_RESERV) { 3400 if (ha->status == (u16)S_CACHE_RESERV) {
3401 scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1); 3401 scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3402 } else { 3402 } else {
3403 scp->sense_buffer[0] = 0x70; 3403 scp->sense_buffer[0] = 0x70;
@@ -3614,16 +3614,16 @@ static int gdth_async_event(gdth_ha_str *ha)
3614 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys; 3614 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
3615 ha->cmd_offs_dpmem = 0; 3615 ha->cmd_offs_dpmem = 0;
3616 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr) 3616 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3617 + sizeof(ulong64); 3617 + sizeof(u64);
3618 ha->cmd_cnt = 0; 3618 ha->cmd_cnt = 0;
3619 gdth_copy_command(ha); 3619 gdth_copy_command(ha);
3620 if (ha->type == GDT_EISA) 3620 if (ha->type == GDT_EISA)
3621 printk("[EISA slot %d] ",(ushort)ha->brd_phys); 3621 printk("[EISA slot %d] ",(u16)ha->brd_phys);
3622 else if (ha->type == GDT_ISA) 3622 else if (ha->type == GDT_ISA)
3623 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys); 3623 printk("[DPMEM 0x%4X] ",(u16)ha->brd_phys);
3624 else 3624 else
3625 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8), 3625 printk("[PCI %d/%d] ",(u16)(ha->brd_phys>>8),
3626 (ushort)((ha->brd_phys>>3)&0x1f)); 3626 (u16)((ha->brd_phys>>3)&0x1f));
3627 gdth_release_event(ha); 3627 gdth_release_event(ha);
3628 } 3628 }
3629 3629
@@ -3640,7 +3640,7 @@ static int gdth_async_event(gdth_ha_str *ha)
3640 ha->dvr.eu.async.service = ha->service; 3640 ha->dvr.eu.async.service = ha->service;
3641 ha->dvr.eu.async.status = ha->status; 3641 ha->dvr.eu.async.status = ha->status;
3642 ha->dvr.eu.async.info = ha->info; 3642 ha->dvr.eu.async.info = ha->info;
3643 *(ulong32 *)ha->dvr.eu.async.scsi_coord = ha->info2; 3643 *(u32 *)ha->dvr.eu.async.scsi_coord = ha->info2;
3644 } 3644 }
3645 gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr ); 3645 gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
3646 gdth_log_event( &ha->dvr, NULL ); 3646 gdth_log_event( &ha->dvr, NULL );
@@ -3648,8 +3648,8 @@ static int gdth_async_event(gdth_ha_str *ha)
3648 /* new host drive from expand? */ 3648 /* new host drive from expand? */
3649 if (ha->service == CACHESERVICE && ha->status == 56) { 3649 if (ha->service == CACHESERVICE && ha->status == 56) {
3650 TRACE2(("gdth_async_event(): new host drive %d created\n", 3650 TRACE2(("gdth_async_event(): new host drive %d created\n",
3651 (ushort)ha->info)); 3651 (u16)ha->info));
3652 /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */ 3652 /* gdth_analyse_hdrive(hanum, (u16)ha->info); */
3653 } 3653 }
3654 } 3654 }
3655 return 1; 3655 return 1;
@@ -3680,13 +3680,13 @@ static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
3680 for (j=0,i=1; i < f[0]; i+=2) { 3680 for (j=0,i=1; i < f[0]; i+=2) {
3681 switch (f[i+1]) { 3681 switch (f[i+1]) {
3682 case 4: 3682 case 4:
3683 stack.b[j++] = *(ulong32*)&dvr->eu.stream[(int)f[i]]; 3683 stack.b[j++] = *(u32*)&dvr->eu.stream[(int)f[i]];
3684 break; 3684 break;
3685 case 2: 3685 case 2:
3686 stack.b[j++] = *(ushort*)&dvr->eu.stream[(int)f[i]]; 3686 stack.b[j++] = *(u16*)&dvr->eu.stream[(int)f[i]];
3687 break; 3687 break;
3688 case 1: 3688 case 1:
3689 stack.b[j++] = *(unchar*)&dvr->eu.stream[(int)f[i]]; 3689 stack.b[j++] = *(u8*)&dvr->eu.stream[(int)f[i]];
3690 break; 3690 break;
3691 default: 3691 default:
3692 break; 3692 break;
@@ -3712,14 +3712,14 @@ static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
3712} 3712}
3713 3713
3714#ifdef GDTH_STATISTICS 3714#ifdef GDTH_STATISTICS
3715static unchar gdth_timer_running; 3715static u8 gdth_timer_running;
3716 3716
3717static void gdth_timeout(ulong data) 3717static void gdth_timeout(unsigned long data)
3718{ 3718{
3719 ulong32 i; 3719 u32 i;
3720 Scsi_Cmnd *nscp; 3720 Scsi_Cmnd *nscp;
3721 gdth_ha_str *ha; 3721 gdth_ha_str *ha;
3722 ulong flags; 3722 unsigned long flags;
3723 3723
3724 if(unlikely(list_empty(&gdth_instances))) { 3724 if(unlikely(list_empty(&gdth_instances))) {
3725 gdth_timer_running = 0; 3725 gdth_timer_running = 0;
@@ -3891,8 +3891,8 @@ static enum blk_eh_timer_return gdth_timed_out(struct scsi_cmnd *scp)
3891{ 3891{
3892 gdth_ha_str *ha = shost_priv(scp->device->host); 3892 gdth_ha_str *ha = shost_priv(scp->device->host);
3893 struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp); 3893 struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
3894 unchar b, t; 3894 u8 b, t;
3895 ulong flags; 3895 unsigned long flags;
3896 enum blk_eh_timer_return retval = BLK_EH_NOT_HANDLED; 3896 enum blk_eh_timer_return retval = BLK_EH_NOT_HANDLED;
3897 3897
3898 TRACE(("%s() cmd 0x%x\n", scp->cmnd[0], __func__)); 3898 TRACE(("%s() cmd 0x%x\n", scp->cmnd[0], __func__));
@@ -3924,9 +3924,9 @@ static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
3924{ 3924{
3925 gdth_ha_str *ha = shost_priv(scp->device->host); 3925 gdth_ha_str *ha = shost_priv(scp->device->host);
3926 int i; 3926 int i;
3927 ulong flags; 3927 unsigned long flags;
3928 Scsi_Cmnd *cmnd; 3928 Scsi_Cmnd *cmnd;
3929 unchar b; 3929 u8 b;
3930 3930
3931 TRACE2(("gdth_eh_bus_reset()\n")); 3931 TRACE2(("gdth_eh_bus_reset()\n"));
3932 3932
@@ -3974,7 +3974,7 @@ static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
3974 3974
3975static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip) 3975static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
3976{ 3976{
3977 unchar b, t; 3977 u8 b, t;
3978 gdth_ha_str *ha = shost_priv(sdev->host); 3978 gdth_ha_str *ha = shost_priv(sdev->host);
3979 struct scsi_device *sd; 3979 struct scsi_device *sd;
3980 unsigned capacity; 3980 unsigned capacity;
@@ -4062,7 +4062,7 @@ static int ioc_event(void __user *arg)
4062{ 4062{
4063 gdth_ioctl_event evt; 4063 gdth_ioctl_event evt;
4064 gdth_ha_str *ha; 4064 gdth_ha_str *ha;
4065 ulong flags; 4065 unsigned long flags;
4066 4066
4067 if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event))) 4067 if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)))
4068 return -EFAULT; 4068 return -EFAULT;
@@ -4098,8 +4098,8 @@ static int ioc_event(void __user *arg)
4098static int ioc_lockdrv(void __user *arg) 4098static int ioc_lockdrv(void __user *arg)
4099{ 4099{
4100 gdth_ioctl_lockdrv ldrv; 4100 gdth_ioctl_lockdrv ldrv;
4101 unchar i, j; 4101 u8 i, j;
4102 ulong flags; 4102 unsigned long flags;
4103 gdth_ha_str *ha; 4103 gdth_ha_str *ha;
4104 4104
4105 if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv))) 4105 if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)))
@@ -4165,7 +4165,7 @@ static int ioc_general(void __user *arg, char *cmnd)
4165{ 4165{
4166 gdth_ioctl_general gen; 4166 gdth_ioctl_general gen;
4167 char *buf = NULL; 4167 char *buf = NULL;
4168 ulong64 paddr; 4168 u64 paddr;
4169 gdth_ha_str *ha; 4169 gdth_ha_str *ha;
4170 int rval; 4170 int rval;
4171 4171
@@ -4194,7 +4194,7 @@ static int ioc_general(void __user *arg, char *cmnd)
4194 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo; 4194 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
4195 /* addresses */ 4195 /* addresses */
4196 if (ha->cache_feat & SCATTER_GATHER) { 4196 if (ha->cache_feat & SCATTER_GATHER) {
4197 gen.command.u.cache64.DestAddr = (ulong64)-1; 4197 gen.command.u.cache64.DestAddr = (u64)-1;
4198 gen.command.u.cache64.sg_canz = 1; 4198 gen.command.u.cache64.sg_canz = 1;
4199 gen.command.u.cache64.sg_lst[0].sg_ptr = paddr; 4199 gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
4200 gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len; 4200 gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
@@ -4207,7 +4207,7 @@ static int ioc_general(void __user *arg, char *cmnd)
4207 if (ha->cache_feat & SCATTER_GATHER) { 4207 if (ha->cache_feat & SCATTER_GATHER) {
4208 gen.command.u.cache.DestAddr = 0xffffffff; 4208 gen.command.u.cache.DestAddr = 0xffffffff;
4209 gen.command.u.cache.sg_canz = 1; 4209 gen.command.u.cache.sg_canz = 1;
4210 gen.command.u.cache.sg_lst[0].sg_ptr = (ulong32)paddr; 4210 gen.command.u.cache.sg_lst[0].sg_ptr = (u32)paddr;
4211 gen.command.u.cache.sg_lst[0].sg_len = gen.data_len; 4211 gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
4212 gen.command.u.cache.sg_lst[1].sg_len = 0; 4212 gen.command.u.cache.sg_lst[1].sg_len = 0;
4213 } else { 4213 } else {
@@ -4230,7 +4230,7 @@ static int ioc_general(void __user *arg, char *cmnd)
4230 gen.command.u.raw64.direction = gen.command.u.raw.direction; 4230 gen.command.u.raw64.direction = gen.command.u.raw.direction;
4231 /* addresses */ 4231 /* addresses */
4232 if (ha->raw_feat & SCATTER_GATHER) { 4232 if (ha->raw_feat & SCATTER_GATHER) {
4233 gen.command.u.raw64.sdata = (ulong64)-1; 4233 gen.command.u.raw64.sdata = (u64)-1;
4234 gen.command.u.raw64.sg_ranz = 1; 4234 gen.command.u.raw64.sg_ranz = 1;
4235 gen.command.u.raw64.sg_lst[0].sg_ptr = paddr; 4235 gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
4236 gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len; 4236 gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
@@ -4244,14 +4244,14 @@ static int ioc_general(void __user *arg, char *cmnd)
4244 if (ha->raw_feat & SCATTER_GATHER) { 4244 if (ha->raw_feat & SCATTER_GATHER) {
4245 gen.command.u.raw.sdata = 0xffffffff; 4245 gen.command.u.raw.sdata = 0xffffffff;
4246 gen.command.u.raw.sg_ranz = 1; 4246 gen.command.u.raw.sg_ranz = 1;
4247 gen.command.u.raw.sg_lst[0].sg_ptr = (ulong32)paddr; 4247 gen.command.u.raw.sg_lst[0].sg_ptr = (u32)paddr;
4248 gen.command.u.raw.sg_lst[0].sg_len = gen.data_len; 4248 gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
4249 gen.command.u.raw.sg_lst[1].sg_len = 0; 4249 gen.command.u.raw.sg_lst[1].sg_len = 0;
4250 } else { 4250 } else {
4251 gen.command.u.raw.sdata = paddr; 4251 gen.command.u.raw.sdata = paddr;
4252 gen.command.u.raw.sg_ranz = 0; 4252 gen.command.u.raw.sg_ranz = 0;
4253 } 4253 }
4254 gen.command.u.raw.sense_data = (ulong32)paddr + gen.data_len; 4254 gen.command.u.raw.sense_data = (u32)paddr + gen.data_len;
4255 } 4255 }
4256 } else { 4256 } else {
4257 gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr); 4257 gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
@@ -4283,7 +4283,7 @@ static int ioc_hdrlist(void __user *arg, char *cmnd)
4283 gdth_ioctl_rescan *rsc; 4283 gdth_ioctl_rescan *rsc;
4284 gdth_cmd_str *cmd; 4284 gdth_cmd_str *cmd;
4285 gdth_ha_str *ha; 4285 gdth_ha_str *ha;
4286 unchar i; 4286 u8 i;
4287 int rc = -ENOMEM; 4287 int rc = -ENOMEM;
4288 u32 cluster_type = 0; 4288 u32 cluster_type = 0;
4289 4289
@@ -4335,11 +4335,11 @@ static int ioc_rescan(void __user *arg, char *cmnd)
4335{ 4335{
4336 gdth_ioctl_rescan *rsc; 4336 gdth_ioctl_rescan *rsc;
4337 gdth_cmd_str *cmd; 4337 gdth_cmd_str *cmd;
4338 ushort i, status, hdr_cnt; 4338 u16 i, status, hdr_cnt;
4339 ulong32 info; 4339 u32 info;
4340 int cyls, hds, secs; 4340 int cyls, hds, secs;
4341 int rc = -ENOMEM; 4341 int rc = -ENOMEM;
4342 ulong flags; 4342 unsigned long flags;
4343 gdth_ha_str *ha; 4343 gdth_ha_str *ha;
4344 4344
4345 rsc = kmalloc(sizeof(*rsc), GFP_KERNEL); 4345 rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
@@ -4367,7 +4367,7 @@ static int ioc_rescan(void __user *arg, char *cmnd)
4367 4367
4368 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info); 4368 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4369 i = 0; 4369 i = 0;
4370 hdr_cnt = (status == S_OK ? (ushort)info : 0); 4370 hdr_cnt = (status == S_OK ? (u16)info : 0);
4371 } else { 4371 } else {
4372 i = rsc->hdr_no; 4372 i = rsc->hdr_no;
4373 hdr_cnt = i + 1; 4373 hdr_cnt = i + 1;
@@ -4418,7 +4418,7 @@ static int ioc_rescan(void __user *arg, char *cmnd)
4418 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info); 4418 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4419 4419
4420 spin_lock_irqsave(&ha->smp_lock, flags); 4420 spin_lock_irqsave(&ha->smp_lock, flags);
4421 ha->hdr[i].devtype = (status == S_OK ? (ushort)info : 0); 4421 ha->hdr[i].devtype = (status == S_OK ? (u16)info : 0);
4422 spin_unlock_irqrestore(&ha->smp_lock, flags); 4422 spin_unlock_irqrestore(&ha->smp_lock, flags);
4423 4423
4424 cmd->Service = CACHESERVICE; 4424 cmd->Service = CACHESERVICE;
@@ -4432,7 +4432,7 @@ static int ioc_rescan(void __user *arg, char *cmnd)
4432 4432
4433 spin_lock_irqsave(&ha->smp_lock, flags); 4433 spin_lock_irqsave(&ha->smp_lock, flags);
4434 ha->hdr[i].cluster_type = 4434 ha->hdr[i].cluster_type =
4435 ((status == S_OK && !shared_access) ? (ushort)info : 0); 4435 ((status == S_OK && !shared_access) ? (u16)info : 0);
4436 spin_unlock_irqrestore(&ha->smp_lock, flags); 4436 spin_unlock_irqrestore(&ha->smp_lock, flags);
4437 rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type; 4437 rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4438 4438
@@ -4446,7 +4446,7 @@ static int ioc_rescan(void __user *arg, char *cmnd)
4446 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info); 4446 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4447 4447
4448 spin_lock_irqsave(&ha->smp_lock, flags); 4448 spin_lock_irqsave(&ha->smp_lock, flags);
4449 ha->hdr[i].rw_attribs = (status == S_OK ? (ushort)info : 0); 4449 ha->hdr[i].rw_attribs = (status == S_OK ? (u16)info : 0);
4450 spin_unlock_irqrestore(&ha->smp_lock, flags); 4450 spin_unlock_irqrestore(&ha->smp_lock, flags);
4451 } 4451 }
4452 4452
@@ -4466,7 +4466,7 @@ static int gdth_ioctl(struct inode *inode, struct file *filep,
4466{ 4466{
4467 gdth_ha_str *ha; 4467 gdth_ha_str *ha;
4468 Scsi_Cmnd *scp; 4468 Scsi_Cmnd *scp;
4469 ulong flags; 4469 unsigned long flags;
4470 char cmnd[MAX_COMMAND_SIZE]; 4470 char cmnd[MAX_COMMAND_SIZE];
4471 void __user *argp = (void __user *)arg; 4471 void __user *argp = (void __user *)arg;
4472 4472
@@ -4495,9 +4495,9 @@ static int gdth_ioctl(struct inode *inode, struct file *filep,
4495 { 4495 {
4496 gdth_ioctl_osvers osv; 4496 gdth_ioctl_osvers osv;
4497 4497
4498 osv.version = (unchar)(LINUX_VERSION_CODE >> 16); 4498 osv.version = (u8)(LINUX_VERSION_CODE >> 16);
4499 osv.subversion = (unchar)(LINUX_VERSION_CODE >> 8); 4499 osv.subversion = (u8)(LINUX_VERSION_CODE >> 8);
4500 osv.revision = (ushort)(LINUX_VERSION_CODE & 0xff); 4500 osv.revision = (u16)(LINUX_VERSION_CODE & 0xff);
4501 if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers))) 4501 if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
4502 return -EFAULT; 4502 return -EFAULT;
4503 break; 4503 break;
@@ -4512,10 +4512,10 @@ static int gdth_ioctl(struct inode *inode, struct file *filep,
4512 return -EFAULT; 4512 return -EFAULT;
4513 4513
4514 if (ha->type == GDT_ISA || ha->type == GDT_EISA) { 4514 if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
4515 ctrt.type = (unchar)((ha->stype>>20) - 0x10); 4515 ctrt.type = (u8)((ha->stype>>20) - 0x10);
4516 } else { 4516 } else {
4517 if (ha->type != GDT_PCIMPR) { 4517 if (ha->type != GDT_PCIMPR) {
4518 ctrt.type = (unchar)((ha->stype<<4) + 6); 4518 ctrt.type = (u8)((ha->stype<<4) + 6);
4519 } else { 4519 } else {
4520 ctrt.type = 4520 ctrt.type =
4521 (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe); 4521 (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
@@ -4546,7 +4546,7 @@ static int gdth_ioctl(struct inode *inode, struct file *filep,
4546 case GDTIOCTL_LOCKCHN: 4546 case GDTIOCTL_LOCKCHN:
4547 { 4547 {
4548 gdth_ioctl_lockchn lchn; 4548 gdth_ioctl_lockchn lchn;
4549 unchar i, j; 4549 u8 i, j;
4550 4550
4551 if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) || 4551 if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
4552 (NULL == (ha = gdth_find_ha(lchn.ionode)))) 4552 (NULL == (ha = gdth_find_ha(lchn.ionode))))
@@ -4670,7 +4670,7 @@ static struct scsi_host_template gdth_template = {
4670}; 4670};
4671 4671
4672#ifdef CONFIG_ISA 4672#ifdef CONFIG_ISA
4673static int __init gdth_isa_probe_one(ulong32 isa_bios) 4673static int __init gdth_isa_probe_one(u32 isa_bios)
4674{ 4674{
4675 struct Scsi_Host *shp; 4675 struct Scsi_Host *shp;
4676 gdth_ha_str *ha; 4676 gdth_ha_str *ha;
@@ -4802,7 +4802,7 @@ static int __init gdth_isa_probe_one(ulong32 isa_bios)
4802#endif /* CONFIG_ISA */ 4802#endif /* CONFIG_ISA */
4803 4803
4804#ifdef CONFIG_EISA 4804#ifdef CONFIG_EISA
4805static int __init gdth_eisa_probe_one(ushort eisa_slot) 4805static int __init gdth_eisa_probe_one(u16 eisa_slot)
4806{ 4806{
4807 struct Scsi_Host *shp; 4807 struct Scsi_Host *shp;
4808 gdth_ha_str *ha; 4808 gdth_ha_str *ha;
@@ -5120,7 +5120,7 @@ static void gdth_remove_one(gdth_ha_str *ha)
5120 scsi_host_put(shp); 5120 scsi_host_put(shp);
5121} 5121}
5122 5122
5123static int gdth_halt(struct notifier_block *nb, ulong event, void *buf) 5123static int gdth_halt(struct notifier_block *nb, unsigned long event, void *buf)
5124{ 5124{
5125 gdth_ha_str *ha; 5125 gdth_ha_str *ha;
5126 5126
@@ -5158,14 +5158,14 @@ static int __init gdth_init(void)
5158 if (probe_eisa_isa) { 5158 if (probe_eisa_isa) {
5159 /* scanning for controllers, at first: ISA controller */ 5159 /* scanning for controllers, at first: ISA controller */
5160#ifdef CONFIG_ISA 5160#ifdef CONFIG_ISA
5161 ulong32 isa_bios; 5161 u32 isa_bios;
5162 for (isa_bios = 0xc8000UL; isa_bios <= 0xd8000UL; 5162 for (isa_bios = 0xc8000UL; isa_bios <= 0xd8000UL;
5163 isa_bios += 0x8000UL) 5163 isa_bios += 0x8000UL)
5164 gdth_isa_probe_one(isa_bios); 5164 gdth_isa_probe_one(isa_bios);
5165#endif 5165#endif
5166#ifdef CONFIG_EISA 5166#ifdef CONFIG_EISA
5167 { 5167 {
5168 ushort eisa_slot; 5168 u16 eisa_slot;
5169 for (eisa_slot = 0x1000; eisa_slot <= 0x8000; 5169 for (eisa_slot = 0x1000; eisa_slot <= 0x8000;
5170 eisa_slot += 0x1000) 5170 eisa_slot += 0x1000)
5171 gdth_eisa_probe_one(eisa_slot); 5171 gdth_eisa_probe_one(eisa_slot);
diff --git a/drivers/scsi/gdth.h b/drivers/scsi/gdth.h
index 1646444e9bd5..120a0625a7b5 100644
--- a/drivers/scsi/gdth.h
+++ b/drivers/scsi/gdth.h
@@ -321,524 +321,524 @@
321 321
322/* screenservice message */ 322/* screenservice message */
323typedef struct { 323typedef struct {
324 ulong32 msg_handle; /* message handle */ 324 u32 msg_handle; /* message handle */
325 ulong32 msg_len; /* size of message */ 325 u32 msg_len; /* size of message */
326 ulong32 msg_alen; /* answer length */ 326 u32 msg_alen; /* answer length */
327 unchar msg_answer; /* answer flag */ 327 u8 msg_answer; /* answer flag */
328 unchar msg_ext; /* more messages */ 328 u8 msg_ext; /* more messages */
329 unchar msg_reserved[2]; 329 u8 msg_reserved[2];
330 char msg_text[MSGLEN+2]; /* the message text */ 330 char msg_text[MSGLEN+2]; /* the message text */
331} PACKED gdth_msg_str; 331} __attribute__((packed)) gdth_msg_str;
332 332
333 333
334/* IOCTL data structures */ 334/* IOCTL data structures */
335 335
336/* Status coalescing buffer for returning multiple requests per interrupt */ 336/* Status coalescing buffer for returning multiple requests per interrupt */
337typedef struct { 337typedef struct {
338 ulong32 status; 338 u32 status;
339 ulong32 ext_status; 339 u32 ext_status;
340 ulong32 info0; 340 u32 info0;
341 ulong32 info1; 341 u32 info1;
342} PACKED gdth_coal_status; 342} __attribute__((packed)) gdth_coal_status;
343 343
344/* performance mode data structure */ 344/* performance mode data structure */
345typedef struct { 345typedef struct {
346 ulong32 version; /* The version of this IOCTL structure. */ 346 u32 version; /* The version of this IOCTL structure. */
347 ulong32 st_mode; /* 0=dis., 1=st_buf_addr1 valid, 2=both */ 347 u32 st_mode; /* 0=dis., 1=st_buf_addr1 valid, 2=both */
348 ulong32 st_buff_addr1; /* physical address of status buffer 1 */ 348 u32 st_buff_addr1; /* physical address of status buffer 1 */
349 ulong32 st_buff_u_addr1; /* reserved for 64 bit addressing */ 349 u32 st_buff_u_addr1; /* reserved for 64 bit addressing */
350 ulong32 st_buff_indx1; /* reserved command idx. for this buffer */ 350 u32 st_buff_indx1; /* reserved command idx. for this buffer */
351 ulong32 st_buff_addr2; /* physical address of status buffer 1 */ 351 u32 st_buff_addr2; /* physical address of status buffer 1 */
352 ulong32 st_buff_u_addr2; /* reserved for 64 bit addressing */ 352 u32 st_buff_u_addr2; /* reserved for 64 bit addressing */
353 ulong32 st_buff_indx2; /* reserved command idx. for this buffer */ 353 u32 st_buff_indx2; /* reserved command idx. for this buffer */
354 ulong32 st_buff_size; /* size of each buffer in bytes */ 354 u32 st_buff_size; /* size of each buffer in bytes */
355 ulong32 cmd_mode; /* 0 = mode disabled, 1 = cmd_buff_addr1 */ 355 u32 cmd_mode; /* 0 = mode disabled, 1 = cmd_buff_addr1 */
356 ulong32 cmd_buff_addr1; /* physical address of cmd buffer 1 */ 356 u32 cmd_buff_addr1; /* physical address of cmd buffer 1 */
357 ulong32 cmd_buff_u_addr1; /* reserved for 64 bit addressing */ 357 u32 cmd_buff_u_addr1; /* reserved for 64 bit addressing */
358 ulong32 cmd_buff_indx1; /* cmd buf addr1 unique identifier */ 358 u32 cmd_buff_indx1; /* cmd buf addr1 unique identifier */
359 ulong32 cmd_buff_addr2; /* physical address of cmd buffer 1 */ 359 u32 cmd_buff_addr2; /* physical address of cmd buffer 1 */
360 ulong32 cmd_buff_u_addr2; /* reserved for 64 bit addressing */ 360 u32 cmd_buff_u_addr2; /* reserved for 64 bit addressing */
361 ulong32 cmd_buff_indx2; /* cmd buf addr1 unique identifier */ 361 u32 cmd_buff_indx2; /* cmd buf addr1 unique identifier */
362 ulong32 cmd_buff_size; /* size of each cmd bufer in bytes */ 362 u32 cmd_buff_size; /* size of each cmd bufer in bytes */
363 ulong32 reserved1; 363 u32 reserved1;
364 ulong32 reserved2; 364 u32 reserved2;
365} PACKED gdth_perf_modes; 365} __attribute__((packed)) gdth_perf_modes;
366 366
367/* SCSI drive info */ 367/* SCSI drive info */
368typedef struct { 368typedef struct {
369 unchar vendor[8]; /* vendor string */ 369 u8 vendor[8]; /* vendor string */
370 unchar product[16]; /* product string */ 370 u8 product[16]; /* product string */
371 unchar revision[4]; /* revision */ 371 u8 revision[4]; /* revision */
372 ulong32 sy_rate; /* current rate for sync. tr. */ 372 u32 sy_rate; /* current rate for sync. tr. */
373 ulong32 sy_max_rate; /* max. rate for sync. tr. */ 373 u32 sy_max_rate; /* max. rate for sync. tr. */
374 ulong32 no_ldrive; /* belongs to this log. drv.*/ 374 u32 no_ldrive; /* belongs to this log. drv.*/
375 ulong32 blkcnt; /* number of blocks */ 375 u32 blkcnt; /* number of blocks */
376 ushort blksize; /* size of block in bytes */ 376 u16 blksize; /* size of block in bytes */
377 unchar available; /* flag: access is available */ 377 u8 available; /* flag: access is available */
378 unchar init; /* medium is initialized */ 378 u8 init; /* medium is initialized */
379 unchar devtype; /* SCSI devicetype */ 379 u8 devtype; /* SCSI devicetype */
380 unchar rm_medium; /* medium is removable */ 380 u8 rm_medium; /* medium is removable */
381 unchar wp_medium; /* medium is write protected */ 381 u8 wp_medium; /* medium is write protected */
382 unchar ansi; /* SCSI I/II or III? */ 382 u8 ansi; /* SCSI I/II or III? */
383 unchar protocol; /* same as ansi */ 383 u8 protocol; /* same as ansi */
384 unchar sync; /* flag: sync. transfer enab. */ 384 u8 sync; /* flag: sync. transfer enab. */
385 unchar disc; /* flag: disconnect enabled */ 385 u8 disc; /* flag: disconnect enabled */
386 unchar queueing; /* flag: command queing enab. */ 386 u8 queueing; /* flag: command queing enab. */
387 unchar cached; /* flag: caching enabled */ 387 u8 cached; /* flag: caching enabled */
388 unchar target_id; /* target ID of device */ 388 u8 target_id; /* target ID of device */
389 unchar lun; /* LUN id of device */ 389 u8 lun; /* LUN id of device */
390 unchar orphan; /* flag: drive fragment */ 390 u8 orphan; /* flag: drive fragment */
391 ulong32 last_error; /* sense key or drive state */ 391 u32 last_error; /* sense key or drive state */
392 ulong32 last_result; /* result of last command */ 392 u32 last_result; /* result of last command */
393 ulong32 check_errors; /* err. in last surface check */ 393 u32 check_errors; /* err. in last surface check */
394 unchar percent; /* progress for surface check */ 394 u8 percent; /* progress for surface check */
395 unchar last_check; /* IOCTRL operation */ 395 u8 last_check; /* IOCTRL operation */
396 unchar res[2]; 396 u8 res[2];
397 ulong32 flags; /* from 1.19/2.19: raw reserv.*/ 397 u32 flags; /* from 1.19/2.19: raw reserv.*/
398 unchar multi_bus; /* multi bus dev? (fibre ch.) */ 398 u8 multi_bus; /* multi bus dev? (fibre ch.) */
399 unchar mb_status; /* status: available? */ 399 u8 mb_status; /* status: available? */
400 unchar res2[2]; 400 u8 res2[2];
401 unchar mb_alt_status; /* status on second bus */ 401 u8 mb_alt_status; /* status on second bus */
402 unchar mb_alt_bid; /* number of second bus */ 402 u8 mb_alt_bid; /* number of second bus */
403 unchar mb_alt_tid; /* target id on second bus */ 403 u8 mb_alt_tid; /* target id on second bus */
404 unchar res3; 404 u8 res3;
405 unchar fc_flag; /* from 1.22/2.22: info valid?*/ 405 u8 fc_flag; /* from 1.22/2.22: info valid?*/
406 unchar res4; 406 u8 res4;
407 ushort fc_frame_size; /* frame size (bytes) */ 407 u16 fc_frame_size; /* frame size (bytes) */
408 char wwn[8]; /* world wide name */ 408 char wwn[8]; /* world wide name */
409} PACKED gdth_diskinfo_str; 409} __attribute__((packed)) gdth_diskinfo_str;
410 410
411/* get SCSI channel count */ 411/* get SCSI channel count */
412typedef struct { 412typedef struct {
413 ulong32 channel_no; /* number of channel */ 413 u32 channel_no; /* number of channel */
414 ulong32 drive_cnt; /* drive count */ 414 u32 drive_cnt; /* drive count */
415 unchar siop_id; /* SCSI processor ID */ 415 u8 siop_id; /* SCSI processor ID */
416 unchar siop_state; /* SCSI processor state */ 416 u8 siop_state; /* SCSI processor state */
417} PACKED gdth_getch_str; 417} __attribute__((packed)) gdth_getch_str;
418 418
419/* get SCSI drive numbers */ 419/* get SCSI drive numbers */
420typedef struct { 420typedef struct {
421 ulong32 sc_no; /* SCSI channel */ 421 u32 sc_no; /* SCSI channel */
422 ulong32 sc_cnt; /* sc_list[] elements */ 422 u32 sc_cnt; /* sc_list[] elements */
423 ulong32 sc_list[MAXID]; /* minor device numbers */ 423 u32 sc_list[MAXID]; /* minor device numbers */
424} PACKED gdth_drlist_str; 424} __attribute__((packed)) gdth_drlist_str;
425 425
426/* get grown/primary defect count */ 426/* get grown/primary defect count */
427typedef struct { 427typedef struct {
428 unchar sddc_type; /* 0x08: grown, 0x10: prim. */ 428 u8 sddc_type; /* 0x08: grown, 0x10: prim. */
429 unchar sddc_format; /* list entry format */ 429 u8 sddc_format; /* list entry format */
430 unchar sddc_len; /* list entry length */ 430 u8 sddc_len; /* list entry length */
431 unchar sddc_res; 431 u8 sddc_res;
432 ulong32 sddc_cnt; /* entry count */ 432 u32 sddc_cnt; /* entry count */
433} PACKED gdth_defcnt_str; 433} __attribute__((packed)) gdth_defcnt_str;
434 434
435/* disk statistics */ 435/* disk statistics */
436typedef struct { 436typedef struct {
437 ulong32 bid; /* SCSI channel */ 437 u32 bid; /* SCSI channel */
438 ulong32 first; /* first SCSI disk */ 438 u32 first; /* first SCSI disk */
439 ulong32 entries; /* number of elements */ 439 u32 entries; /* number of elements */
440 ulong32 count; /* (R) number of init. el. */ 440 u32 count; /* (R) number of init. el. */
441 ulong32 mon_time; /* time stamp */ 441 u32 mon_time; /* time stamp */
442 struct { 442 struct {
443 unchar tid; /* target ID */ 443 u8 tid; /* target ID */
444 unchar lun; /* LUN */ 444 u8 lun; /* LUN */
445 unchar res[2]; 445 u8 res[2];
446 ulong32 blk_size; /* block size in bytes */ 446 u32 blk_size; /* block size in bytes */
447 ulong32 rd_count; /* bytes read */ 447 u32 rd_count; /* bytes read */
448 ulong32 wr_count; /* bytes written */ 448 u32 wr_count; /* bytes written */
449 ulong32 rd_blk_count; /* blocks read */ 449 u32 rd_blk_count; /* blocks read */
450 ulong32 wr_blk_count; /* blocks written */ 450 u32 wr_blk_count; /* blocks written */
451 ulong32 retries; /* retries */ 451 u32 retries; /* retries */
452 ulong32 reassigns; /* reassigns */ 452 u32 reassigns; /* reassigns */
453 } PACKED list[1]; 453 } __attribute__((packed)) list[1];
454} PACKED gdth_dskstat_str; 454} __attribute__((packed)) gdth_dskstat_str;
455 455
456/* IO channel header */ 456/* IO channel header */
457typedef struct { 457typedef struct {
458 ulong32 version; /* version (-1UL: newest) */ 458 u32 version; /* version (-1UL: newest) */
459 unchar list_entries; /* list entry count */ 459 u8 list_entries; /* list entry count */
460 unchar first_chan; /* first channel number */ 460 u8 first_chan; /* first channel number */
461 unchar last_chan; /* last channel number */ 461 u8 last_chan; /* last channel number */
462 unchar chan_count; /* (R) channel count */ 462 u8 chan_count; /* (R) channel count */
463 ulong32 list_offset; /* offset of list[0] */ 463 u32 list_offset; /* offset of list[0] */
464} PACKED gdth_iochan_header; 464} __attribute__((packed)) gdth_iochan_header;
465 465
466/* get IO channel description */ 466/* get IO channel description */
467typedef struct { 467typedef struct {
468 gdth_iochan_header hdr; 468 gdth_iochan_header hdr;
469 struct { 469 struct {
470 ulong32 address; /* channel address */ 470 u32 address; /* channel address */
471 unchar type; /* type (SCSI, FCAL) */ 471 u8 type; /* type (SCSI, FCAL) */
472 unchar local_no; /* local number */ 472 u8 local_no; /* local number */
473 ushort features; /* channel features */ 473 u16 features; /* channel features */
474 } PACKED list[MAXBUS]; 474 } __attribute__((packed)) list[MAXBUS];
475} PACKED gdth_iochan_str; 475} __attribute__((packed)) gdth_iochan_str;
476 476
477/* get raw IO channel description */ 477/* get raw IO channel description */
478typedef struct { 478typedef struct {
479 gdth_iochan_header hdr; 479 gdth_iochan_header hdr;
480 struct { 480 struct {
481 unchar proc_id; /* processor id */ 481 u8 proc_id; /* processor id */
482 unchar proc_defect; /* defect ? */ 482 u8 proc_defect; /* defect ? */
483 unchar reserved[2]; 483 u8 reserved[2];
484 } PACKED list[MAXBUS]; 484 } __attribute__((packed)) list[MAXBUS];
485} PACKED gdth_raw_iochan_str; 485} __attribute__((packed)) gdth_raw_iochan_str;
486 486
487/* array drive component */ 487/* array drive component */
488typedef struct { 488typedef struct {
489 ulong32 al_controller; /* controller ID */ 489 u32 al_controller; /* controller ID */
490 unchar al_cache_drive; /* cache drive number */ 490 u8 al_cache_drive; /* cache drive number */
491 unchar al_status; /* cache drive state */ 491 u8 al_status; /* cache drive state */
492 unchar al_res[2]; 492 u8 al_res[2];
493} PACKED gdth_arraycomp_str; 493} __attribute__((packed)) gdth_arraycomp_str;
494 494
495/* array drive information */ 495/* array drive information */
496typedef struct { 496typedef struct {
497 unchar ai_type; /* array type (RAID0,4,5) */ 497 u8 ai_type; /* array type (RAID0,4,5) */
498 unchar ai_cache_drive_cnt; /* active cachedrives */ 498 u8 ai_cache_drive_cnt; /* active cachedrives */
499 unchar ai_state; /* array drive state */ 499 u8 ai_state; /* array drive state */
500 unchar ai_master_cd; /* master cachedrive */ 500 u8 ai_master_cd; /* master cachedrive */
501 ulong32 ai_master_controller; /* ID of master controller */ 501 u32 ai_master_controller; /* ID of master controller */
502 ulong32 ai_size; /* user capacity [sectors] */ 502 u32 ai_size; /* user capacity [sectors] */
503 ulong32 ai_striping_size; /* striping size [sectors] */ 503 u32 ai_striping_size; /* striping size [sectors] */
504 ulong32 ai_secsize; /* sector size [bytes] */ 504 u32 ai_secsize; /* sector size [bytes] */
505 ulong32 ai_err_info; /* failed cache drive */ 505 u32 ai_err_info; /* failed cache drive */
506 unchar ai_name[8]; /* name of the array drive */ 506 u8 ai_name[8]; /* name of the array drive */
507 unchar ai_controller_cnt; /* number of controllers */ 507 u8 ai_controller_cnt; /* number of controllers */
508 unchar ai_removable; /* flag: removable */ 508 u8 ai_removable; /* flag: removable */
509 unchar ai_write_protected; /* flag: write protected */ 509 u8 ai_write_protected; /* flag: write protected */
510 unchar ai_devtype; /* type: always direct access */ 510 u8 ai_devtype; /* type: always direct access */
511 gdth_arraycomp_str ai_drives[35]; /* drive components: */ 511 gdth_arraycomp_str ai_drives[35]; /* drive components: */
512 unchar ai_drive_entries; /* number of drive components */ 512 u8 ai_drive_entries; /* number of drive components */
513 unchar ai_protected; /* protection flag */ 513 u8 ai_protected; /* protection flag */
514 unchar ai_verify_state; /* state of a parity verify */ 514 u8 ai_verify_state; /* state of a parity verify */
515 unchar ai_ext_state; /* extended array drive state */ 515 u8 ai_ext_state; /* extended array drive state */
516 unchar ai_expand_state; /* array expand state (>=2.18)*/ 516 u8 ai_expand_state; /* array expand state (>=2.18)*/
517 unchar ai_reserved[3]; 517 u8 ai_reserved[3];
518} PACKED gdth_arrayinf_str; 518} __attribute__((packed)) gdth_arrayinf_str;
519 519
520/* get array drive list */ 520/* get array drive list */
521typedef struct { 521typedef struct {
522 ulong32 controller_no; /* controller no. */ 522 u32 controller_no; /* controller no. */
523 unchar cd_handle; /* master cachedrive */ 523 u8 cd_handle; /* master cachedrive */
524 unchar is_arrayd; /* Flag: is array drive? */ 524 u8 is_arrayd; /* Flag: is array drive? */
525 unchar is_master; /* Flag: is array master? */ 525 u8 is_master; /* Flag: is array master? */
526 unchar is_parity; /* Flag: is parity drive? */ 526 u8 is_parity; /* Flag: is parity drive? */
527 unchar is_hotfix; /* Flag: is hotfix drive? */ 527 u8 is_hotfix; /* Flag: is hotfix drive? */
528 unchar res[3]; 528 u8 res[3];
529} PACKED gdth_alist_str; 529} __attribute__((packed)) gdth_alist_str;
530 530
531typedef struct { 531typedef struct {
532 ulong32 entries_avail; /* allocated entries */ 532 u32 entries_avail; /* allocated entries */
533 ulong32 entries_init; /* returned entries */ 533 u32 entries_init; /* returned entries */
534 ulong32 first_entry; /* first entry number */ 534 u32 first_entry; /* first entry number */
535 ulong32 list_offset; /* offset of following list */ 535 u32 list_offset; /* offset of following list */
536 gdth_alist_str list[1]; /* list */ 536 gdth_alist_str list[1]; /* list */
537} PACKED gdth_arcdl_str; 537} __attribute__((packed)) gdth_arcdl_str;
538 538
539/* cache info/config IOCTL */ 539/* cache info/config IOCTL */
540typedef struct { 540typedef struct {
541 ulong32 version; /* firmware version */ 541 u32 version; /* firmware version */
542 ushort state; /* cache state (on/off) */ 542 u16 state; /* cache state (on/off) */
543 ushort strategy; /* cache strategy */ 543 u16 strategy; /* cache strategy */
544 ushort write_back; /* write back state (on/off) */ 544 u16 write_back; /* write back state (on/off) */
545 ushort block_size; /* cache block size */ 545 u16 block_size; /* cache block size */
546} PACKED gdth_cpar_str; 546} __attribute__((packed)) gdth_cpar_str;
547 547
548typedef struct { 548typedef struct {
549 ulong32 csize; /* cache size */ 549 u32 csize; /* cache size */
550 ulong32 read_cnt; /* read/write counter */ 550 u32 read_cnt; /* read/write counter */
551 ulong32 write_cnt; 551 u32 write_cnt;
552 ulong32 tr_hits; /* hits */ 552 u32 tr_hits; /* hits */
553 ulong32 sec_hits; 553 u32 sec_hits;
554 ulong32 sec_miss; /* misses */ 554 u32 sec_miss; /* misses */
555} PACKED gdth_cstat_str; 555} __attribute__((packed)) gdth_cstat_str;
556 556
557typedef struct { 557typedef struct {
558 gdth_cpar_str cpar; 558 gdth_cpar_str cpar;
559 gdth_cstat_str cstat; 559 gdth_cstat_str cstat;
560} PACKED gdth_cinfo_str; 560} __attribute__((packed)) gdth_cinfo_str;
561 561
562/* cache drive info */ 562/* cache drive info */
563typedef struct { 563typedef struct {
564 unchar cd_name[8]; /* cache drive name */ 564 u8 cd_name[8]; /* cache drive name */
565 ulong32 cd_devtype; /* SCSI devicetype */ 565 u32 cd_devtype; /* SCSI devicetype */
566 ulong32 cd_ldcnt; /* number of log. drives */ 566 u32 cd_ldcnt; /* number of log. drives */
567 ulong32 cd_last_error; /* last error */ 567 u32 cd_last_error; /* last error */
568 unchar cd_initialized; /* drive is initialized */ 568 u8 cd_initialized; /* drive is initialized */
569 unchar cd_removable; /* media is removable */ 569 u8 cd_removable; /* media is removable */
570 unchar cd_write_protected; /* write protected */ 570 u8 cd_write_protected; /* write protected */
571 unchar cd_flags; /* Pool Hot Fix? */ 571 u8 cd_flags; /* Pool Hot Fix? */
572 ulong32 ld_blkcnt; /* number of blocks */ 572 u32 ld_blkcnt; /* number of blocks */
573 ulong32 ld_blksize; /* blocksize */ 573 u32 ld_blksize; /* blocksize */
574 ulong32 ld_dcnt; /* number of disks */ 574 u32 ld_dcnt; /* number of disks */
575 ulong32 ld_slave; /* log. drive index */ 575 u32 ld_slave; /* log. drive index */
576 ulong32 ld_dtype; /* type of logical drive */ 576 u32 ld_dtype; /* type of logical drive */
577 ulong32 ld_last_error; /* last error */ 577 u32 ld_last_error; /* last error */
578 unchar ld_name[8]; /* log. drive name */ 578 u8 ld_name[8]; /* log. drive name */
579 unchar ld_error; /* error */ 579 u8 ld_error; /* error */
580} PACKED gdth_cdrinfo_str; 580} __attribute__((packed)) gdth_cdrinfo_str;
581 581
582/* OEM string */ 582/* OEM string */
583typedef struct { 583typedef struct {
584 ulong32 ctl_version; 584 u32 ctl_version;
585 ulong32 file_major_version; 585 u32 file_major_version;
586 ulong32 file_minor_version; 586 u32 file_minor_version;
587 ulong32 buffer_size; 587 u32 buffer_size;
588 ulong32 cpy_count; 588 u32 cpy_count;
589 ulong32 ext_error; 589 u32 ext_error;
590 ulong32 oem_id; 590 u32 oem_id;
591 ulong32 board_id; 591 u32 board_id;
592} PACKED gdth_oem_str_params; 592} __attribute__((packed)) gdth_oem_str_params;
593 593
594typedef struct { 594typedef struct {
595 unchar product_0_1_name[16]; 595 u8 product_0_1_name[16];
596 unchar product_4_5_name[16]; 596 u8 product_4_5_name[16];
597 unchar product_cluster_name[16]; 597 u8 product_cluster_name[16];
598 unchar product_reserved[16]; 598 u8 product_reserved[16];
599 unchar scsi_cluster_target_vendor_id[16]; 599 u8 scsi_cluster_target_vendor_id[16];
600 unchar cluster_raid_fw_name[16]; 600 u8 cluster_raid_fw_name[16];
601 unchar oem_brand_name[16]; 601 u8 oem_brand_name[16];
602 unchar oem_raid_type[16]; 602 u8 oem_raid_type[16];
603 unchar bios_type[13]; 603 u8 bios_type[13];
604 unchar bios_title[50]; 604 u8 bios_title[50];
605 unchar oem_company_name[37]; 605 u8 oem_company_name[37];
606 ulong32 pci_id_1; 606 u32 pci_id_1;
607 ulong32 pci_id_2; 607 u32 pci_id_2;
608 unchar validation_status[80]; 608 u8 validation_status[80];
609 unchar reserved_1[4]; 609 u8 reserved_1[4];
610 unchar scsi_host_drive_inquiry_vendor_id[16]; 610 u8 scsi_host_drive_inquiry_vendor_id[16];
611 unchar library_file_template[16]; 611 u8 library_file_template[16];
612 unchar reserved_2[16]; 612 u8 reserved_2[16];
613 unchar tool_name_1[32]; 613 u8 tool_name_1[32];
614 unchar tool_name_2[32]; 614 u8 tool_name_2[32];
615 unchar tool_name_3[32]; 615 u8 tool_name_3[32];
616 unchar oem_contact_1[84]; 616 u8 oem_contact_1[84];
617 unchar oem_contact_2[84]; 617 u8 oem_contact_2[84];
618 unchar oem_contact_3[84]; 618 u8 oem_contact_3[84];
619} PACKED gdth_oem_str; 619} __attribute__((packed)) gdth_oem_str;
620 620
621typedef struct { 621typedef struct {
622 gdth_oem_str_params params; 622 gdth_oem_str_params params;
623 gdth_oem_str text; 623 gdth_oem_str text;
624} PACKED gdth_oem_str_ioctl; 624} __attribute__((packed)) gdth_oem_str_ioctl;
625 625
626/* board features */ 626/* board features */
627typedef struct { 627typedef struct {
628 unchar chaining; /* Chaining supported */ 628 u8 chaining; /* Chaining supported */
629 unchar striping; /* Striping (RAID-0) supp. */ 629 u8 striping; /* Striping (RAID-0) supp. */
630 unchar mirroring; /* Mirroring (RAID-1) supp. */ 630 u8 mirroring; /* Mirroring (RAID-1) supp. */
631 unchar raid; /* RAID-4/5/10 supported */ 631 u8 raid; /* RAID-4/5/10 supported */
632} PACKED gdth_bfeat_str; 632} __attribute__((packed)) gdth_bfeat_str;
633 633
634/* board info IOCTL */ 634/* board info IOCTL */
635typedef struct { 635typedef struct {
636 ulong32 ser_no; /* serial no. */ 636 u32 ser_no; /* serial no. */
637 unchar oem_id[2]; /* OEM ID */ 637 u8 oem_id[2]; /* OEM ID */
638 ushort ep_flags; /* eprom flags */ 638 u16 ep_flags; /* eprom flags */
639 ulong32 proc_id; /* processor ID */ 639 u32 proc_id; /* processor ID */
640 ulong32 memsize; /* memory size (bytes) */ 640 u32 memsize; /* memory size (bytes) */
641 unchar mem_banks; /* memory banks */ 641 u8 mem_banks; /* memory banks */
642 unchar chan_type; /* channel type */ 642 u8 chan_type; /* channel type */
643 unchar chan_count; /* channel count */ 643 u8 chan_count; /* channel count */
644 unchar rdongle_pres; /* dongle present? */ 644 u8 rdongle_pres; /* dongle present? */
645 ulong32 epr_fw_ver; /* (eprom) firmware version */ 645 u32 epr_fw_ver; /* (eprom) firmware version */
646 ulong32 upd_fw_ver; /* (update) firmware version */ 646 u32 upd_fw_ver; /* (update) firmware version */
647 ulong32 upd_revision; /* update revision */ 647 u32 upd_revision; /* update revision */
648 char type_string[16]; /* controller name */ 648 char type_string[16]; /* controller name */
649 char raid_string[16]; /* RAID firmware name */ 649 char raid_string[16]; /* RAID firmware name */
650 unchar update_pres; /* update present? */ 650 u8 update_pres; /* update present? */
651 unchar xor_pres; /* XOR engine present? */ 651 u8 xor_pres; /* XOR engine present? */
652 unchar prom_type; /* ROM type (eprom/flash) */ 652 u8 prom_type; /* ROM type (eprom/flash) */
653 unchar prom_count; /* number of ROM devices */ 653 u8 prom_count; /* number of ROM devices */
654 ulong32 dup_pres; /* duplexing module present? */ 654 u32 dup_pres; /* duplexing module present? */
655 ulong32 chan_pres; /* number of expansion chn. */ 655 u32 chan_pres; /* number of expansion chn. */
656 ulong32 mem_pres; /* memory expansion inst. ? */ 656 u32 mem_pres; /* memory expansion inst. ? */
657 unchar ft_bus_system; /* fault bus supported? */ 657 u8 ft_bus_system; /* fault bus supported? */
658 unchar subtype_valid; /* board_subtype valid? */ 658 u8 subtype_valid; /* board_subtype valid? */
659 unchar board_subtype; /* subtype/hardware level */ 659 u8 board_subtype; /* subtype/hardware level */
660 unchar ramparity_pres; /* RAM parity check hardware? */ 660 u8 ramparity_pres; /* RAM parity check hardware? */
661} PACKED gdth_binfo_str; 661} __attribute__((packed)) gdth_binfo_str;
662 662
663/* get host drive info */ 663/* get host drive info */
664typedef struct { 664typedef struct {
665 char name[8]; /* host drive name */ 665 char name[8]; /* host drive name */
666 ulong32 size; /* size (sectors) */ 666 u32 size; /* size (sectors) */
667 unchar host_drive; /* host drive number */ 667 u8 host_drive; /* host drive number */
668 unchar log_drive; /* log. drive (master) */ 668 u8 log_drive; /* log. drive (master) */
669 unchar reserved; 669 u8 reserved;
670 unchar rw_attribs; /* r/w attribs */ 670 u8 rw_attribs; /* r/w attribs */
671 ulong32 start_sec; /* start sector */ 671 u32 start_sec; /* start sector */
672} PACKED gdth_hentry_str; 672} __attribute__((packed)) gdth_hentry_str;
673 673
674typedef struct { 674typedef struct {
675 ulong32 entries; /* entry count */ 675 u32 entries; /* entry count */
676 ulong32 offset; /* offset of entries */ 676 u32 offset; /* offset of entries */
677 unchar secs_p_head; /* sectors/head */ 677 u8 secs_p_head; /* sectors/head */
678 unchar heads_p_cyl; /* heads/cylinder */ 678 u8 heads_p_cyl; /* heads/cylinder */
679 unchar reserved; 679 u8 reserved;
680 unchar clust_drvtype; /* cluster drive type */ 680 u8 clust_drvtype; /* cluster drive type */
681 ulong32 location; /* controller number */ 681 u32 location; /* controller number */
682 gdth_hentry_str entry[MAX_HDRIVES]; /* entries */ 682 gdth_hentry_str entry[MAX_HDRIVES]; /* entries */
683} PACKED gdth_hget_str; 683} __attribute__((packed)) gdth_hget_str;
684 684
685 685
686/* DPRAM structures */ 686/* DPRAM structures */
687 687
688/* interface area ISA/PCI */ 688/* interface area ISA/PCI */
689typedef struct { 689typedef struct {
690 unchar S_Cmd_Indx; /* special command */ 690 u8 S_Cmd_Indx; /* special command */
691 unchar volatile S_Status; /* status special command */ 691 u8 volatile S_Status; /* status special command */
692 ushort reserved1; 692 u16 reserved1;
693 ulong32 S_Info[4]; /* add. info special command */ 693 u32 S_Info[4]; /* add. info special command */
694 unchar volatile Sema0; /* command semaphore */ 694 u8 volatile Sema0; /* command semaphore */
695 unchar reserved2[3]; 695 u8 reserved2[3];
696 unchar Cmd_Index; /* command number */ 696 u8 Cmd_Index; /* command number */
697 unchar reserved3[3]; 697 u8 reserved3[3];
698 ushort volatile Status; /* command status */ 698 u16 volatile Status; /* command status */
699 ushort Service; /* service(for async.events) */ 699 u16 Service; /* service(for async.events) */
700 ulong32 Info[2]; /* additional info */ 700 u32 Info[2]; /* additional info */
701 struct { 701 struct {
702 ushort offset; /* command offs. in the DPRAM*/ 702 u16 offset; /* command offs. in the DPRAM*/
703 ushort serv_id; /* service */ 703 u16 serv_id; /* service */
704 } PACKED comm_queue[MAXOFFSETS]; /* command queue */ 704 } __attribute__((packed)) comm_queue[MAXOFFSETS]; /* command queue */
705 ulong32 bios_reserved[2]; 705 u32 bios_reserved[2];
706 unchar gdt_dpr_cmd[1]; /* commands */ 706 u8 gdt_dpr_cmd[1]; /* commands */
707} PACKED gdt_dpr_if; 707} __attribute__((packed)) gdt_dpr_if;
708 708
709/* SRAM structure PCI controllers */ 709/* SRAM structure PCI controllers */
710typedef struct { 710typedef struct {
711 ulong32 magic; /* controller ID from BIOS */ 711 u32 magic; /* controller ID from BIOS */
712 ushort need_deinit; /* switch betw. BIOS/driver */ 712 u16 need_deinit; /* switch betw. BIOS/driver */
713 unchar switch_support; /* see need_deinit */ 713 u8 switch_support; /* see need_deinit */
714 unchar padding[9]; 714 u8 padding[9];
715 unchar os_used[16]; /* OS code per service */ 715 u8 os_used[16]; /* OS code per service */
716 unchar unused[28]; 716 u8 unused[28];
717 unchar fw_magic; /* contr. ID from firmware */ 717 u8 fw_magic; /* contr. ID from firmware */
718} PACKED gdt_pci_sram; 718} __attribute__((packed)) gdt_pci_sram;
719 719
720/* SRAM structure EISA controllers (but NOT GDT3000/3020) */ 720/* SRAM structure EISA controllers (but NOT GDT3000/3020) */
721typedef struct { 721typedef struct {
722 unchar os_used[16]; /* OS code per service */ 722 u8 os_used[16]; /* OS code per service */
723 ushort need_deinit; /* switch betw. BIOS/driver */ 723 u16 need_deinit; /* switch betw. BIOS/driver */
724 unchar switch_support; /* see need_deinit */ 724 u8 switch_support; /* see need_deinit */
725 unchar padding; 725 u8 padding;
726} PACKED gdt_eisa_sram; 726} __attribute__((packed)) gdt_eisa_sram;
727 727
728 728
729/* DPRAM ISA controllers */ 729/* DPRAM ISA controllers */
730typedef struct { 730typedef struct {
731 union { 731 union {
732 struct { 732 struct {
733 unchar bios_used[0x3c00-32]; /* 15KB - 32Bytes BIOS */ 733 u8 bios_used[0x3c00-32]; /* 15KB - 32Bytes BIOS */
734 ulong32 magic; /* controller (EISA) ID */ 734 u32 magic; /* controller (EISA) ID */
735 ushort need_deinit; /* switch betw. BIOS/driver */ 735 u16 need_deinit; /* switch betw. BIOS/driver */
736 unchar switch_support; /* see need_deinit */ 736 u8 switch_support; /* see need_deinit */
737 unchar padding[9]; 737 u8 padding[9];
738 unchar os_used[16]; /* OS code per service */ 738 u8 os_used[16]; /* OS code per service */
739 } PACKED dp_sram; 739 } __attribute__((packed)) dp_sram;
740 unchar bios_area[0x4000]; /* 16KB reserved for BIOS */ 740 u8 bios_area[0x4000]; /* 16KB reserved for BIOS */
741 } bu; 741 } bu;
742 union { 742 union {
743 gdt_dpr_if ic; /* interface area */ 743 gdt_dpr_if ic; /* interface area */
744 unchar if_area[0x3000]; /* 12KB for interface */ 744 u8 if_area[0x3000]; /* 12KB for interface */
745 } u; 745 } u;
746 struct { 746 struct {
747 unchar memlock; /* write protection DPRAM */ 747 u8 memlock; /* write protection DPRAM */
748 unchar event; /* release event */ 748 u8 event; /* release event */
749 unchar irqen; /* board interrupts enable */ 749 u8 irqen; /* board interrupts enable */
750 unchar irqdel; /* acknowledge board int. */ 750 u8 irqdel; /* acknowledge board int. */
751 unchar volatile Sema1; /* status semaphore */ 751 u8 volatile Sema1; /* status semaphore */
752 unchar rq; /* IRQ/DRQ configuration */ 752 u8 rq; /* IRQ/DRQ configuration */
753 } PACKED io; 753 } __attribute__((packed)) io;
754} PACKED gdt2_dpram_str; 754} __attribute__((packed)) gdt2_dpram_str;
755 755
756/* DPRAM PCI controllers */ 756/* DPRAM PCI controllers */
757typedef struct { 757typedef struct {
758 union { 758 union {
759 gdt_dpr_if ic; /* interface area */ 759 gdt_dpr_if ic; /* interface area */
760 unchar if_area[0xff0-sizeof(gdt_pci_sram)]; 760 u8 if_area[0xff0-sizeof(gdt_pci_sram)];
761 } u; 761 } u;
762 gdt_pci_sram gdt6sr; /* SRAM structure */ 762 gdt_pci_sram gdt6sr; /* SRAM structure */
763 struct { 763 struct {
764 unchar unused0[1]; 764 u8 unused0[1];
765 unchar volatile Sema1; /* command semaphore */ 765 u8 volatile Sema1; /* command semaphore */
766 unchar unused1[3]; 766 u8 unused1[3];
767 unchar irqen; /* board interrupts enable */ 767 u8 irqen; /* board interrupts enable */
768 unchar unused2[2]; 768 u8 unused2[2];
769 unchar event; /* release event */ 769 u8 event; /* release event */
770 unchar unused3[3]; 770 u8 unused3[3];
771 unchar irqdel; /* acknowledge board int. */ 771 u8 irqdel; /* acknowledge board int. */
772 unchar unused4[3]; 772 u8 unused4[3];
773 } PACKED io; 773 } __attribute__((packed)) io;
774} PACKED gdt6_dpram_str; 774} __attribute__((packed)) gdt6_dpram_str;
775 775
776/* PLX register structure (new PCI controllers) */ 776/* PLX register structure (new PCI controllers) */
777typedef struct { 777typedef struct {
778 unchar cfg_reg; /* DPRAM cfg.(2:below 1MB,0:anywhere)*/ 778 u8 cfg_reg; /* DPRAM cfg.(2:below 1MB,0:anywhere)*/
779 unchar unused1[0x3f]; 779 u8 unused1[0x3f];
780 unchar volatile sema0_reg; /* command semaphore */ 780 u8 volatile sema0_reg; /* command semaphore */
781 unchar volatile sema1_reg; /* status semaphore */ 781 u8 volatile sema1_reg; /* status semaphore */
782 unchar unused2[2]; 782 u8 unused2[2];
783 ushort volatile status; /* command status */ 783 u16 volatile status; /* command status */
784 ushort service; /* service */ 784 u16 service; /* service */
785 ulong32 info[2]; /* additional info */ 785 u32 info[2]; /* additional info */
786 unchar unused3[0x10]; 786 u8 unused3[0x10];
787 unchar ldoor_reg; /* PCI to local doorbell */ 787 u8 ldoor_reg; /* PCI to local doorbell */
788 unchar unused4[3]; 788 u8 unused4[3];
789 unchar volatile edoor_reg; /* local to PCI doorbell */ 789 u8 volatile edoor_reg; /* local to PCI doorbell */
790 unchar unused5[3]; 790 u8 unused5[3];
791 unchar control0; /* control0 register(unused) */ 791 u8 control0; /* control0 register(unused) */
792 unchar control1; /* board interrupts enable */ 792 u8 control1; /* board interrupts enable */
793 unchar unused6[0x16]; 793 u8 unused6[0x16];
794} PACKED gdt6c_plx_regs; 794} __attribute__((packed)) gdt6c_plx_regs;
795 795
796/* DPRAM new PCI controllers */ 796/* DPRAM new PCI controllers */
797typedef struct { 797typedef struct {
798 union { 798 union {
799 gdt_dpr_if ic; /* interface area */ 799 gdt_dpr_if ic; /* interface area */
800 unchar if_area[0x4000-sizeof(gdt_pci_sram)]; 800 u8 if_area[0x4000-sizeof(gdt_pci_sram)];
801 } u; 801 } u;
802 gdt_pci_sram gdt6sr; /* SRAM structure */ 802 gdt_pci_sram gdt6sr; /* SRAM structure */
803} PACKED gdt6c_dpram_str; 803} __attribute__((packed)) gdt6c_dpram_str;
804 804
805/* i960 register structure (PCI MPR controllers) */ 805/* i960 register structure (PCI MPR controllers) */
806typedef struct { 806typedef struct {
807 unchar unused1[16]; 807 u8 unused1[16];
808 unchar volatile sema0_reg; /* command semaphore */ 808 u8 volatile sema0_reg; /* command semaphore */
809 unchar unused2; 809 u8 unused2;
810 unchar volatile sema1_reg; /* status semaphore */ 810 u8 volatile sema1_reg; /* status semaphore */
811 unchar unused3; 811 u8 unused3;
812 ushort volatile status; /* command status */ 812 u16 volatile status; /* command status */
813 ushort service; /* service */ 813 u16 service; /* service */
814 ulong32 info[2]; /* additional info */ 814 u32 info[2]; /* additional info */
815 unchar ldoor_reg; /* PCI to local doorbell */ 815 u8 ldoor_reg; /* PCI to local doorbell */
816 unchar unused4[11]; 816 u8 unused4[11];
817 unchar volatile edoor_reg; /* local to PCI doorbell */ 817 u8 volatile edoor_reg; /* local to PCI doorbell */
818 unchar unused5[7]; 818 u8 unused5[7];
819 unchar edoor_en_reg; /* board interrupts enable */ 819 u8 edoor_en_reg; /* board interrupts enable */
820 unchar unused6[27]; 820 u8 unused6[27];
821 ulong32 unused7[939]; 821 u32 unused7[939];
822 ulong32 severity; 822 u32 severity;
823 char evt_str[256]; /* event string */ 823 char evt_str[256]; /* event string */
824} PACKED gdt6m_i960_regs; 824} __attribute__((packed)) gdt6m_i960_regs;
825 825
826/* DPRAM PCI MPR controllers */ 826/* DPRAM PCI MPR controllers */
827typedef struct { 827typedef struct {
828 gdt6m_i960_regs i960r; /* 4KB i960 registers */ 828 gdt6m_i960_regs i960r; /* 4KB i960 registers */
829 union { 829 union {
830 gdt_dpr_if ic; /* interface area */ 830 gdt_dpr_if ic; /* interface area */
831 unchar if_area[0x3000-sizeof(gdt_pci_sram)]; 831 u8 if_area[0x3000-sizeof(gdt_pci_sram)];
832 } u; 832 } u;
833 gdt_pci_sram gdt6sr; /* SRAM structure */ 833 gdt_pci_sram gdt6sr; /* SRAM structure */
834} PACKED gdt6m_dpram_str; 834} __attribute__((packed)) gdt6m_dpram_str;
835 835
836 836
837/* PCI resources */ 837/* PCI resources */
838typedef struct { 838typedef struct {
839 struct pci_dev *pdev; 839 struct pci_dev *pdev;
840 ulong dpmem; /* DPRAM address */ 840 unsigned long dpmem; /* DPRAM address */
841 ulong io; /* IO address */ 841 unsigned long io; /* IO address */
842} gdth_pci_str; 842} gdth_pci_str;
843 843
844 844
@@ -846,93 +846,93 @@ typedef struct {
846typedef struct { 846typedef struct {
847 struct Scsi_Host *shost; 847 struct Scsi_Host *shost;
848 struct list_head list; 848 struct list_head list;
849 ushort hanum; 849 u16 hanum;
850 ushort oem_id; /* OEM */ 850 u16 oem_id; /* OEM */
851 ushort type; /* controller class */ 851 u16 type; /* controller class */
852 ulong32 stype; /* subtype (PCI: device ID) */ 852 u32 stype; /* subtype (PCI: device ID) */
853 ushort fw_vers; /* firmware version */ 853 u16 fw_vers; /* firmware version */
854 ushort cache_feat; /* feat. cache serv. (s/g,..)*/ 854 u16 cache_feat; /* feat. cache serv. (s/g,..)*/
855 ushort raw_feat; /* feat. raw service (s/g,..)*/ 855 u16 raw_feat; /* feat. raw service (s/g,..)*/
856 ushort screen_feat; /* feat. raw service (s/g,..)*/ 856 u16 screen_feat; /* feat. raw service (s/g,..)*/
857 ushort bmic; /* BMIC address (EISA) */ 857 u16 bmic; /* BMIC address (EISA) */
858 void __iomem *brd; /* DPRAM address */ 858 void __iomem *brd; /* DPRAM address */
859 ulong32 brd_phys; /* slot number/BIOS address */ 859 u32 brd_phys; /* slot number/BIOS address */
860 gdt6c_plx_regs *plx; /* PLX regs (new PCI contr.) */ 860 gdt6c_plx_regs *plx; /* PLX regs (new PCI contr.) */
861 gdth_cmd_str cmdext; 861 gdth_cmd_str cmdext;
862 gdth_cmd_str *pccb; /* address command structure */ 862 gdth_cmd_str *pccb; /* address command structure */
863 ulong32 ccb_phys; /* phys. address */ 863 u32 ccb_phys; /* phys. address */
864#ifdef INT_COAL 864#ifdef INT_COAL
865 gdth_coal_status *coal_stat; /* buffer for coalescing int.*/ 865 gdth_coal_status *coal_stat; /* buffer for coalescing int.*/
866 ulong64 coal_stat_phys; /* phys. address */ 866 u64 coal_stat_phys; /* phys. address */
867#endif 867#endif
868 char *pscratch; /* scratch (DMA) buffer */ 868 char *pscratch; /* scratch (DMA) buffer */
869 ulong64 scratch_phys; /* phys. address */ 869 u64 scratch_phys; /* phys. address */
870 unchar scratch_busy; /* in use? */ 870 u8 scratch_busy; /* in use? */
871 unchar dma64_support; /* 64-bit DMA supported? */ 871 u8 dma64_support; /* 64-bit DMA supported? */
872 gdth_msg_str *pmsg; /* message buffer */ 872 gdth_msg_str *pmsg; /* message buffer */
873 ulong64 msg_phys; /* phys. address */ 873 u64 msg_phys; /* phys. address */
874 unchar scan_mode; /* current scan mode */ 874 u8 scan_mode; /* current scan mode */
875 unchar irq; /* IRQ */ 875 u8 irq; /* IRQ */
876 unchar drq; /* DRQ (ISA controllers) */ 876 u8 drq; /* DRQ (ISA controllers) */
877 ushort status; /* command status */ 877 u16 status; /* command status */
878 ushort service; /* service/firmware ver./.. */ 878 u16 service; /* service/firmware ver./.. */
879 ulong32 info; 879 u32 info;
880 ulong32 info2; /* additional info */ 880 u32 info2; /* additional info */
881 Scsi_Cmnd *req_first; /* top of request queue */ 881 Scsi_Cmnd *req_first; /* top of request queue */
882 struct { 882 struct {
883 unchar present; /* Flag: host drive present? */ 883 u8 present; /* Flag: host drive present? */
884 unchar is_logdrv; /* Flag: log. drive (master)? */ 884 u8 is_logdrv; /* Flag: log. drive (master)? */
885 unchar is_arraydrv; /* Flag: array drive? */ 885 u8 is_arraydrv; /* Flag: array drive? */
886 unchar is_master; /* Flag: array drive master? */ 886 u8 is_master; /* Flag: array drive master? */
887 unchar is_parity; /* Flag: parity drive? */ 887 u8 is_parity; /* Flag: parity drive? */
888 unchar is_hotfix; /* Flag: hotfix drive? */ 888 u8 is_hotfix; /* Flag: hotfix drive? */
889 unchar master_no; /* number of master drive */ 889 u8 master_no; /* number of master drive */
890 unchar lock; /* drive locked? (hot plug) */ 890 u8 lock; /* drive locked? (hot plug) */
891 unchar heads; /* mapping */ 891 u8 heads; /* mapping */
892 unchar secs; 892 u8 secs;
893 ushort devtype; /* further information */ 893 u16 devtype; /* further information */
894 ulong64 size; /* capacity */ 894 u64 size; /* capacity */
895 unchar ldr_no; /* log. drive no. */ 895 u8 ldr_no; /* log. drive no. */
896 unchar rw_attribs; /* r/w attributes */ 896 u8 rw_attribs; /* r/w attributes */
897 unchar cluster_type; /* cluster properties */ 897 u8 cluster_type; /* cluster properties */
898 unchar media_changed; /* Flag:MOUNT/UNMOUNT occured */ 898 u8 media_changed; /* Flag:MOUNT/UNMOUNT occured */
899 ulong32 start_sec; /* start sector */ 899 u32 start_sec; /* start sector */
900 } hdr[MAX_LDRIVES]; /* host drives */ 900 } hdr[MAX_LDRIVES]; /* host drives */
901 struct { 901 struct {
902 unchar lock; /* channel locked? (hot plug) */ 902 u8 lock; /* channel locked? (hot plug) */
903 unchar pdev_cnt; /* physical device count */ 903 u8 pdev_cnt; /* physical device count */
904 unchar local_no; /* local channel number */ 904 u8 local_no; /* local channel number */
905 unchar io_cnt[MAXID]; /* current IO count */ 905 u8 io_cnt[MAXID]; /* current IO count */
906 ulong32 address; /* channel address */ 906 u32 address; /* channel address */
907 ulong32 id_list[MAXID]; /* IDs of the phys. devices */ 907 u32 id_list[MAXID]; /* IDs of the phys. devices */
908 } raw[MAXBUS]; /* SCSI channels */ 908 } raw[MAXBUS]; /* SCSI channels */
909 struct { 909 struct {
910 Scsi_Cmnd *cmnd; /* pending request */ 910 Scsi_Cmnd *cmnd; /* pending request */
911 ushort service; /* service */ 911 u16 service; /* service */
912 } cmd_tab[GDTH_MAXCMDS]; /* table of pend. requests */ 912 } cmd_tab[GDTH_MAXCMDS]; /* table of pend. requests */
913 struct gdth_cmndinfo { /* per-command private info */ 913 struct gdth_cmndinfo { /* per-command private info */
914 int index; 914 int index;
915 int internal_command; /* don't call scsi_done */ 915 int internal_command; /* don't call scsi_done */
916 gdth_cmd_str *internal_cmd_str; /* crier for internal messages*/ 916 gdth_cmd_str *internal_cmd_str; /* crier for internal messages*/
917 dma_addr_t sense_paddr; /* sense dma-addr */ 917 dma_addr_t sense_paddr; /* sense dma-addr */
918 unchar priority; 918 u8 priority;
919 int timeout_count; /* # of timeout calls */ 919 int timeout_count; /* # of timeout calls */
920 volatile int wait_for_completion; 920 volatile int wait_for_completion;
921 ushort status; 921 u16 status;
922 ulong32 info; 922 u32 info;
923 enum dma_data_direction dma_dir; 923 enum dma_data_direction dma_dir;
924 int phase; /* ???? */ 924 int phase; /* ???? */
925 int OpCode; 925 int OpCode;
926 } cmndinfo[GDTH_MAXCMDS]; /* index==0 is free */ 926 } cmndinfo[GDTH_MAXCMDS]; /* index==0 is free */
927 unchar bus_cnt; /* SCSI bus count */ 927 u8 bus_cnt; /* SCSI bus count */
928 unchar tid_cnt; /* Target ID count */ 928 u8 tid_cnt; /* Target ID count */
929 unchar bus_id[MAXBUS]; /* IOP IDs */ 929 u8 bus_id[MAXBUS]; /* IOP IDs */
930 unchar virt_bus; /* number of virtual bus */ 930 u8 virt_bus; /* number of virtual bus */
931 unchar more_proc; /* more /proc info supported */ 931 u8 more_proc; /* more /proc info supported */
932 ushort cmd_cnt; /* command count in DPRAM */ 932 u16 cmd_cnt; /* command count in DPRAM */
933 ushort cmd_len; /* length of actual command */ 933 u16 cmd_len; /* length of actual command */
934 ushort cmd_offs_dpmem; /* actual offset in DPRAM */ 934 u16 cmd_offs_dpmem; /* actual offset in DPRAM */
935 ushort ic_all_size; /* sizeof DPRAM interf. area */ 935 u16 ic_all_size; /* sizeof DPRAM interf. area */
936 gdth_cpar_str cpar; /* controller cache par. */ 936 gdth_cpar_str cpar; /* controller cache par. */
937 gdth_bfeat_str bfeat; /* controller features */ 937 gdth_bfeat_str bfeat; /* controller features */
938 gdth_binfo_str binfo; /* controller info */ 938 gdth_binfo_str binfo; /* controller info */
@@ -941,7 +941,7 @@ typedef struct {
941 struct pci_dev *pdev; 941 struct pci_dev *pdev;
942 char oem_name[8]; 942 char oem_name[8];
943#ifdef GDTH_DMA_STATISTICS 943#ifdef GDTH_DMA_STATISTICS
944 ulong dma32_cnt, dma64_cnt; /* statistics: DMA buffer */ 944 unsigned long dma32_cnt, dma64_cnt; /* statistics: DMA buffer */
945#endif 945#endif
946 struct scsi_device *sdev; 946 struct scsi_device *sdev;
947} gdth_ha_str; 947} gdth_ha_str;
@@ -953,65 +953,65 @@ static inline struct gdth_cmndinfo *gdth_cmnd_priv(struct scsi_cmnd* cmd)
953 953
954/* INQUIRY data format */ 954/* INQUIRY data format */
955typedef struct { 955typedef struct {
956 unchar type_qual; 956 u8 type_qual;
957 unchar modif_rmb; 957 u8 modif_rmb;
958 unchar version; 958 u8 version;
959 unchar resp_aenc; 959 u8 resp_aenc;
960 unchar add_length; 960 u8 add_length;
961 unchar reserved1; 961 u8 reserved1;
962 unchar reserved2; 962 u8 reserved2;
963 unchar misc; 963 u8 misc;
964 unchar vendor[8]; 964 u8 vendor[8];
965 unchar product[16]; 965 u8 product[16];
966 unchar revision[4]; 966 u8 revision[4];
967} PACKED gdth_inq_data; 967} __attribute__((packed)) gdth_inq_data;
968 968
969/* READ_CAPACITY data format */ 969/* READ_CAPACITY data format */
970typedef struct { 970typedef struct {
971 ulong32 last_block_no; 971 u32 last_block_no;
972 ulong32 block_length; 972 u32 block_length;
973} PACKED gdth_rdcap_data; 973} __attribute__((packed)) gdth_rdcap_data;
974 974
975/* READ_CAPACITY (16) data format */ 975/* READ_CAPACITY (16) data format */
976typedef struct { 976typedef struct {
977 ulong64 last_block_no; 977 u64 last_block_no;
978 ulong32 block_length; 978 u32 block_length;
979} PACKED gdth_rdcap16_data; 979} __attribute__((packed)) gdth_rdcap16_data;
980 980
981/* REQUEST_SENSE data format */ 981/* REQUEST_SENSE data format */
982typedef struct { 982typedef struct {
983 unchar errorcode; 983 u8 errorcode;
984 unchar segno; 984 u8 segno;
985 unchar key; 985 u8 key;
986 ulong32 info; 986 u32 info;
987 unchar add_length; 987 u8 add_length;
988 ulong32 cmd_info; 988 u32 cmd_info;
989 unchar adsc; 989 u8 adsc;
990 unchar adsq; 990 u8 adsq;
991 unchar fruc; 991 u8 fruc;
992 unchar key_spec[3]; 992 u8 key_spec[3];
993} PACKED gdth_sense_data; 993} __attribute__((packed)) gdth_sense_data;
994 994
995/* MODE_SENSE data format */ 995/* MODE_SENSE data format */
996typedef struct { 996typedef struct {
997 struct { 997 struct {
998 unchar data_length; 998 u8 data_length;
999 unchar med_type; 999 u8 med_type;
1000 unchar dev_par; 1000 u8 dev_par;
1001 unchar bd_length; 1001 u8 bd_length;
1002 } PACKED hd; 1002 } __attribute__((packed)) hd;
1003 struct { 1003 struct {
1004 unchar dens_code; 1004 u8 dens_code;
1005 unchar block_count[3]; 1005 u8 block_count[3];
1006 unchar reserved; 1006 u8 reserved;
1007 unchar block_length[3]; 1007 u8 block_length[3];
1008 } PACKED bd; 1008 } __attribute__((packed)) bd;
1009} PACKED gdth_modep_data; 1009} __attribute__((packed)) gdth_modep_data;
1010 1010
1011/* stack frame */ 1011/* stack frame */
1012typedef struct { 1012typedef struct {
1013 ulong b[10]; /* 32/64 bit compiler ! */ 1013 unsigned long b[10]; /* 32/64 bit compiler ! */
1014} PACKED gdth_stackframe; 1014} __attribute__((packed)) gdth_stackframe;
1015 1015
1016 1016
1017/* function prototyping */ 1017/* function prototyping */
diff --git a/drivers/scsi/gdth_ioctl.h b/drivers/scsi/gdth_ioctl.h
index 783fae737f17..b004c6165887 100644
--- a/drivers/scsi/gdth_ioctl.h
+++ b/drivers/scsi/gdth_ioctl.h
@@ -32,109 +32,101 @@
32#define MAX_HDRIVES MAX_LDRIVES /* max. host drive count */ 32#define MAX_HDRIVES MAX_LDRIVES /* max. host drive count */
33#endif 33#endif
34 34
35/* typedefs */
36#ifdef __KERNEL__
37typedef u32 ulong32;
38typedef u64 ulong64;
39#endif
40
41#define PACKED __attribute__((packed))
42
43/* scatter/gather element */ 35/* scatter/gather element */
44typedef struct { 36typedef struct {
45 ulong32 sg_ptr; /* address */ 37 u32 sg_ptr; /* address */
46 ulong32 sg_len; /* length */ 38 u32 sg_len; /* length */
47} PACKED gdth_sg_str; 39} __attribute__((packed)) gdth_sg_str;
48 40
49/* scatter/gather element - 64bit addresses */ 41/* scatter/gather element - 64bit addresses */
50typedef struct { 42typedef struct {
51 ulong64 sg_ptr; /* address */ 43 u64 sg_ptr; /* address */
52 ulong32 sg_len; /* length */ 44 u32 sg_len; /* length */
53} PACKED gdth_sg64_str; 45} __attribute__((packed)) gdth_sg64_str;
54 46
55/* command structure */ 47/* command structure */
56typedef struct { 48typedef struct {
57 ulong32 BoardNode; /* board node (always 0) */ 49 u32 BoardNode; /* board node (always 0) */
58 ulong32 CommandIndex; /* command number */ 50 u32 CommandIndex; /* command number */
59 ushort OpCode; /* the command (READ,..) */ 51 u16 OpCode; /* the command (READ,..) */
60 union { 52 union {
61 struct { 53 struct {
62 ushort DeviceNo; /* number of cache drive */ 54 u16 DeviceNo; /* number of cache drive */
63 ulong32 BlockNo; /* block number */ 55 u32 BlockNo; /* block number */
64 ulong32 BlockCnt; /* block count */ 56 u32 BlockCnt; /* block count */
65 ulong32 DestAddr; /* dest. addr. (if s/g: -1) */ 57 u32 DestAddr; /* dest. addr. (if s/g: -1) */
66 ulong32 sg_canz; /* s/g element count */ 58 u32 sg_canz; /* s/g element count */
67 gdth_sg_str sg_lst[GDTH_MAXSG]; /* s/g list */ 59 gdth_sg_str sg_lst[GDTH_MAXSG]; /* s/g list */
68 } PACKED cache; /* cache service cmd. str. */ 60 } __attribute__((packed)) cache; /* cache service cmd. str. */
69 struct { 61 struct {
70 ushort DeviceNo; /* number of cache drive */ 62 u16 DeviceNo; /* number of cache drive */
71 ulong64 BlockNo; /* block number */ 63 u64 BlockNo; /* block number */
72 ulong32 BlockCnt; /* block count */ 64 u32 BlockCnt; /* block count */
73 ulong64 DestAddr; /* dest. addr. (if s/g: -1) */ 65 u64 DestAddr; /* dest. addr. (if s/g: -1) */
74 ulong32 sg_canz; /* s/g element count */ 66 u32 sg_canz; /* s/g element count */
75 gdth_sg64_str sg_lst[GDTH_MAXSG]; /* s/g list */ 67 gdth_sg64_str sg_lst[GDTH_MAXSG]; /* s/g list */
76 } PACKED cache64; /* cache service cmd. str. */ 68 } __attribute__((packed)) cache64; /* cache service cmd. str. */
77 struct { 69 struct {
78 ushort param_size; /* size of p_param buffer */ 70 u16 param_size; /* size of p_param buffer */
79 ulong32 subfunc; /* IOCTL function */ 71 u32 subfunc; /* IOCTL function */
80 ulong32 channel; /* device */ 72 u32 channel; /* device */
81 ulong64 p_param; /* buffer */ 73 u64 p_param; /* buffer */
82 } PACKED ioctl; /* IOCTL command structure */ 74 } __attribute__((packed)) ioctl; /* IOCTL command structure */
83 struct { 75 struct {
84 ushort reserved; 76 u16 reserved;
85 union { 77 union {
86 struct { 78 struct {
87 ulong32 msg_handle; /* message handle */ 79 u32 msg_handle; /* message handle */
88 ulong64 msg_addr; /* message buffer address */ 80 u64 msg_addr; /* message buffer address */
89 } PACKED msg; 81 } __attribute__((packed)) msg;
90 unchar data[12]; /* buffer for rtc data, ... */ 82 u8 data[12]; /* buffer for rtc data, ... */
91 } su; 83 } su;
92 } PACKED screen; /* screen service cmd. str. */ 84 } __attribute__((packed)) screen; /* screen service cmd. str. */
93 struct { 85 struct {
94 ushort reserved; 86 u16 reserved;
95 ulong32 direction; /* data direction */ 87 u32 direction; /* data direction */
96 ulong32 mdisc_time; /* disc. time (0: no timeout)*/ 88 u32 mdisc_time; /* disc. time (0: no timeout)*/
97 ulong32 mcon_time; /* connect time(0: no to.) */ 89 u32 mcon_time; /* connect time(0: no to.) */
98 ulong32 sdata; /* dest. addr. (if s/g: -1) */ 90 u32 sdata; /* dest. addr. (if s/g: -1) */
99 ulong32 sdlen; /* data length (bytes) */ 91 u32 sdlen; /* data length (bytes) */
100 ulong32 clen; /* SCSI cmd. length(6,10,12) */ 92 u32 clen; /* SCSI cmd. length(6,10,12) */
101 unchar cmd[12]; /* SCSI command */ 93 u8 cmd[12]; /* SCSI command */
102 unchar target; /* target ID */ 94 u8 target; /* target ID */
103 unchar lun; /* LUN */ 95 u8 lun; /* LUN */
104 unchar bus; /* SCSI bus number */ 96 u8 bus; /* SCSI bus number */
105 unchar priority; /* only 0 used */ 97 u8 priority; /* only 0 used */
106 ulong32 sense_len; /* sense data length */ 98 u32 sense_len; /* sense data length */
107 ulong32 sense_data; /* sense data addr. */ 99 u32 sense_data; /* sense data addr. */
108 ulong32 link_p; /* linked cmds (not supp.) */ 100 u32 link_p; /* linked cmds (not supp.) */
109 ulong32 sg_ranz; /* s/g element count */ 101 u32 sg_ranz; /* s/g element count */
110 gdth_sg_str sg_lst[GDTH_MAXSG]; /* s/g list */ 102 gdth_sg_str sg_lst[GDTH_MAXSG]; /* s/g list */
111 } PACKED raw; /* raw service cmd. struct. */ 103 } __attribute__((packed)) raw; /* raw service cmd. struct. */
112 struct { 104 struct {
113 ushort reserved; 105 u16 reserved;
114 ulong32 direction; /* data direction */ 106 u32 direction; /* data direction */
115 ulong32 mdisc_time; /* disc. time (0: no timeout)*/ 107 u32 mdisc_time; /* disc. time (0: no timeout)*/
116 ulong32 mcon_time; /* connect time(0: no to.) */ 108 u32 mcon_time; /* connect time(0: no to.) */
117 ulong64 sdata; /* dest. addr. (if s/g: -1) */ 109 u64 sdata; /* dest. addr. (if s/g: -1) */
118 ulong32 sdlen; /* data length (bytes) */ 110 u32 sdlen; /* data length (bytes) */
119 ulong32 clen; /* SCSI cmd. length(6,..,16) */ 111 u32 clen; /* SCSI cmd. length(6,..,16) */
120 unchar cmd[16]; /* SCSI command */ 112 u8 cmd[16]; /* SCSI command */
121 unchar target; /* target ID */ 113 u8 target; /* target ID */
122 unchar lun; /* LUN */ 114 u8 lun; /* LUN */
123 unchar bus; /* SCSI bus number */ 115 u8 bus; /* SCSI bus number */
124 unchar priority; /* only 0 used */ 116 u8 priority; /* only 0 used */
125 ulong32 sense_len; /* sense data length */ 117 u32 sense_len; /* sense data length */
126 ulong64 sense_data; /* sense data addr. */ 118 u64 sense_data; /* sense data addr. */
127 ulong32 sg_ranz; /* s/g element count */ 119 u32 sg_ranz; /* s/g element count */
128 gdth_sg64_str sg_lst[GDTH_MAXSG]; /* s/g list */ 120 gdth_sg64_str sg_lst[GDTH_MAXSG]; /* s/g list */
129 } PACKED raw64; /* raw service cmd. struct. */ 121 } __attribute__((packed)) raw64; /* raw service cmd. struct. */
130 } u; 122 } u;
131 /* additional variables */ 123 /* additional variables */
132 unchar Service; /* controller service */ 124 u8 Service; /* controller service */
133 unchar reserved; 125 u8 reserved;
134 ushort Status; /* command result */ 126 u16 Status; /* command result */
135 ulong32 Info; /* additional information */ 127 u32 Info; /* additional information */
136 void *RequestBuffer; /* request buffer */ 128 void *RequestBuffer; /* request buffer */
137} PACKED gdth_cmd_str; 129} __attribute__((packed)) gdth_cmd_str;
138 130
139/* controller event structure */ 131/* controller event structure */
140#define ES_ASYNC 1 132#define ES_ASYNC 1
@@ -142,129 +134,129 @@ typedef struct {
142#define ES_TEST 3 134#define ES_TEST 3
143#define ES_SYNC 4 135#define ES_SYNC 4
144typedef struct { 136typedef struct {
145 ushort size; /* size of structure */ 137 u16 size; /* size of structure */
146 union { 138 union {
147 char stream[16]; 139 char stream[16];
148 struct { 140 struct {
149 ushort ionode; 141 u16 ionode;
150 ushort service; 142 u16 service;
151 ulong32 index; 143 u32 index;
152 } PACKED driver; 144 } __attribute__((packed)) driver;
153 struct { 145 struct {
154 ushort ionode; 146 u16 ionode;
155 ushort service; 147 u16 service;
156 ushort status; 148 u16 status;
157 ulong32 info; 149 u32 info;
158 unchar scsi_coord[3]; 150 u8 scsi_coord[3];
159 } PACKED async; 151 } __attribute__((packed)) async;
160 struct { 152 struct {
161 ushort ionode; 153 u16 ionode;
162 ushort service; 154 u16 service;
163 ushort status; 155 u16 status;
164 ulong32 info; 156 u32 info;
165 ushort hostdrive; 157 u16 hostdrive;
166 unchar scsi_coord[3]; 158 u8 scsi_coord[3];
167 unchar sense_key; 159 u8 sense_key;
168 } PACKED sync; 160 } __attribute__((packed)) sync;
169 struct { 161 struct {
170 ulong32 l1, l2, l3, l4; 162 u32 l1, l2, l3, l4;
171 } PACKED test; 163 } __attribute__((packed)) test;
172 } eu; 164 } eu;
173 ulong32 severity; 165 u32 severity;
174 unchar event_string[256]; 166 u8 event_string[256];
175} PACKED gdth_evt_data; 167} __attribute__((packed)) gdth_evt_data;
176 168
177typedef struct { 169typedef struct {
178 ulong32 first_stamp; 170 u32 first_stamp;
179 ulong32 last_stamp; 171 u32 last_stamp;
180 ushort same_count; 172 u16 same_count;
181 ushort event_source; 173 u16 event_source;
182 ushort event_idx; 174 u16 event_idx;
183 unchar application; 175 u8 application;
184 unchar reserved; 176 u8 reserved;
185 gdth_evt_data event_data; 177 gdth_evt_data event_data;
186} PACKED gdth_evt_str; 178} __attribute__((packed)) gdth_evt_str;
187 179
188 180
189#ifdef GDTH_IOCTL_PROC 181#ifdef GDTH_IOCTL_PROC
190/* IOCTL structure (write) */ 182/* IOCTL structure (write) */
191typedef struct { 183typedef struct {
192 ulong32 magic; /* IOCTL magic */ 184 u32 magic; /* IOCTL magic */
193 ushort ioctl; /* IOCTL */ 185 u16 ioctl; /* IOCTL */
194 ushort ionode; /* controller number */ 186 u16 ionode; /* controller number */
195 ushort service; /* controller service */ 187 u16 service; /* controller service */
196 ushort timeout; /* timeout */ 188 u16 timeout; /* timeout */
197 union { 189 union {
198 struct { 190 struct {
199 unchar command[512]; /* controller command */ 191 u8 command[512]; /* controller command */
200 unchar data[1]; /* add. data */ 192 u8 data[1]; /* add. data */
201 } general; 193 } general;
202 struct { 194 struct {
203 unchar lock; /* lock/unlock */ 195 u8 lock; /* lock/unlock */
204 unchar drive_cnt; /* drive count */ 196 u8 drive_cnt; /* drive count */
205 ushort drives[MAX_HDRIVES];/* drives */ 197 u16 drives[MAX_HDRIVES];/* drives */
206 } lockdrv; 198 } lockdrv;
207 struct { 199 struct {
208 unchar lock; /* lock/unlock */ 200 u8 lock; /* lock/unlock */
209 unchar channel; /* channel */ 201 u8 channel; /* channel */
210 } lockchn; 202 } lockchn;
211 struct { 203 struct {
212 int erase; /* erase event ? */ 204 int erase; /* erase event ? */
213 int handle; 205 int handle;
214 unchar evt[EVENT_SIZE]; /* event structure */ 206 u8 evt[EVENT_SIZE]; /* event structure */
215 } event; 207 } event;
216 struct { 208 struct {
217 unchar bus; /* SCSI bus */ 209 u8 bus; /* SCSI bus */
218 unchar target; /* target ID */ 210 u8 target; /* target ID */
219 unchar lun; /* LUN */ 211 u8 lun; /* LUN */
220 unchar cmd_len; /* command length */ 212 u8 cmd_len; /* command length */
221 unchar cmd[12]; /* SCSI command */ 213 u8 cmd[12]; /* SCSI command */
222 } scsi; 214 } scsi;
223 struct { 215 struct {
224 ushort hdr_no; /* host drive number */ 216 u16 hdr_no; /* host drive number */
225 unchar flag; /* old meth./add/remove */ 217 u8 flag; /* old meth./add/remove */
226 } rescan; 218 } rescan;
227 } iu; 219 } iu;
228} gdth_iowr_str; 220} gdth_iowr_str;
229 221
230/* IOCTL structure (read) */ 222/* IOCTL structure (read) */
231typedef struct { 223typedef struct {
232 ulong32 size; /* buffer size */ 224 u32 size; /* buffer size */
233 ulong32 status; /* IOCTL error code */ 225 u32 status; /* IOCTL error code */
234 union { 226 union {
235 struct { 227 struct {
236 unchar data[1]; /* data */ 228 u8 data[1]; /* data */
237 } general; 229 } general;
238 struct { 230 struct {
239 ushort version; /* driver version */ 231 u16 version; /* driver version */
240 } drvers; 232 } drvers;
241 struct { 233 struct {
242 unchar type; /* controller type */ 234 u8 type; /* controller type */
243 ushort info; /* slot etc. */ 235 u16 info; /* slot etc. */
244 ushort oem_id; /* OEM ID */ 236 u16 oem_id; /* OEM ID */
245 ushort bios_ver; /* not used */ 237 u16 bios_ver; /* not used */
246 ushort access; /* not used */ 238 u16 access; /* not used */
247 ushort ext_type; /* extended type */ 239 u16 ext_type; /* extended type */
248 ushort device_id; /* device ID */ 240 u16 device_id; /* device ID */
249 ushort sub_device_id; /* sub device ID */ 241 u16 sub_device_id; /* sub device ID */
250 } ctrtype; 242 } ctrtype;
251 struct { 243 struct {
252 unchar version; /* OS version */ 244 u8 version; /* OS version */
253 unchar subversion; /* OS subversion */ 245 u8 subversion; /* OS subversion */
254 ushort revision; /* revision */ 246 u16 revision; /* revision */
255 } osvers; 247 } osvers;
256 struct { 248 struct {
257 ushort count; /* controller count */ 249 u16 count; /* controller count */
258 } ctrcnt; 250 } ctrcnt;
259 struct { 251 struct {
260 int handle; 252 int handle;
261 unchar evt[EVENT_SIZE]; /* event structure */ 253 u8 evt[EVENT_SIZE]; /* event structure */
262 } event; 254 } event;
263 struct { 255 struct {
264 unchar bus; /* SCSI bus, 0xff: invalid */ 256 u8 bus; /* SCSI bus, 0xff: invalid */
265 unchar target; /* target ID */ 257 u8 target; /* target ID */
266 unchar lun; /* LUN */ 258 u8 lun; /* LUN */
267 unchar cluster_type; /* cluster properties */ 259 u8 cluster_type; /* cluster properties */
268 } hdr_list[MAX_HDRIVES]; /* index is host drive number */ 260 } hdr_list[MAX_HDRIVES]; /* index is host drive number */
269 } iu; 261 } iu;
270} gdth_iord_str; 262} gdth_iord_str;
@@ -272,53 +264,53 @@ typedef struct {
272 264
273/* GDTIOCTL_GENERAL */ 265/* GDTIOCTL_GENERAL */
274typedef struct { 266typedef struct {
275 ushort ionode; /* controller number */ 267 u16 ionode; /* controller number */
276 ushort timeout; /* timeout */ 268 u16 timeout; /* timeout */
277 ulong32 info; /* error info */ 269 u32 info; /* error info */
278 ushort status; /* status */ 270 u16 status; /* status */
279 ulong data_len; /* data buffer size */ 271 unsigned long data_len; /* data buffer size */
280 ulong sense_len; /* sense buffer size */ 272 unsigned long sense_len; /* sense buffer size */
281 gdth_cmd_str command; /* command */ 273 gdth_cmd_str command; /* command */
282} gdth_ioctl_general; 274} gdth_ioctl_general;
283 275
284/* GDTIOCTL_LOCKDRV */ 276/* GDTIOCTL_LOCKDRV */
285typedef struct { 277typedef struct {
286 ushort ionode; /* controller number */ 278 u16 ionode; /* controller number */
287 unchar lock; /* lock/unlock */ 279 u8 lock; /* lock/unlock */
288 unchar drive_cnt; /* drive count */ 280 u8 drive_cnt; /* drive count */
289 ushort drives[MAX_HDRIVES]; /* drives */ 281 u16 drives[MAX_HDRIVES]; /* drives */
290} gdth_ioctl_lockdrv; 282} gdth_ioctl_lockdrv;
291 283
292/* GDTIOCTL_LOCKCHN */ 284/* GDTIOCTL_LOCKCHN */
293typedef struct { 285typedef struct {
294 ushort ionode; /* controller number */ 286 u16 ionode; /* controller number */
295 unchar lock; /* lock/unlock */ 287 u8 lock; /* lock/unlock */
296 unchar channel; /* channel */ 288 u8 channel; /* channel */
297} gdth_ioctl_lockchn; 289} gdth_ioctl_lockchn;
298 290
299/* GDTIOCTL_OSVERS */ 291/* GDTIOCTL_OSVERS */
300typedef struct { 292typedef struct {
301 unchar version; /* OS version */ 293 u8 version; /* OS version */
302 unchar subversion; /* OS subversion */ 294 u8 subversion; /* OS subversion */
303 ushort revision; /* revision */ 295 u16 revision; /* revision */
304} gdth_ioctl_osvers; 296} gdth_ioctl_osvers;
305 297
306/* GDTIOCTL_CTRTYPE */ 298/* GDTIOCTL_CTRTYPE */
307typedef struct { 299typedef struct {
308 ushort ionode; /* controller number */ 300 u16 ionode; /* controller number */
309 unchar type; /* controller type */ 301 u8 type; /* controller type */
310 ushort info; /* slot etc. */ 302 u16 info; /* slot etc. */
311 ushort oem_id; /* OEM ID */ 303 u16 oem_id; /* OEM ID */
312 ushort bios_ver; /* not used */ 304 u16 bios_ver; /* not used */
313 ushort access; /* not used */ 305 u16 access; /* not used */
314 ushort ext_type; /* extended type */ 306 u16 ext_type; /* extended type */
315 ushort device_id; /* device ID */ 307 u16 device_id; /* device ID */
316 ushort sub_device_id; /* sub device ID */ 308 u16 sub_device_id; /* sub device ID */
317} gdth_ioctl_ctrtype; 309} gdth_ioctl_ctrtype;
318 310
319/* GDTIOCTL_EVENT */ 311/* GDTIOCTL_EVENT */
320typedef struct { 312typedef struct {
321 ushort ionode; 313 u16 ionode;
322 int erase; /* erase event? */ 314 int erase; /* erase event? */
323 int handle; /* event handle */ 315 int handle; /* event handle */
324 gdth_evt_str event; 316 gdth_evt_str event;
@@ -326,22 +318,22 @@ typedef struct {
326 318
327/* GDTIOCTL_RESCAN/GDTIOCTL_HDRLIST */ 319/* GDTIOCTL_RESCAN/GDTIOCTL_HDRLIST */
328typedef struct { 320typedef struct {
329 ushort ionode; /* controller number */ 321 u16 ionode; /* controller number */
330 unchar flag; /* add/remove */ 322 u8 flag; /* add/remove */
331 ushort hdr_no; /* drive no. */ 323 u16 hdr_no; /* drive no. */
332 struct { 324 struct {
333 unchar bus; /* SCSI bus */ 325 u8 bus; /* SCSI bus */
334 unchar target; /* target ID */ 326 u8 target; /* target ID */
335 unchar lun; /* LUN */ 327 u8 lun; /* LUN */
336 unchar cluster_type; /* cluster properties */ 328 u8 cluster_type; /* cluster properties */
337 } hdr_list[MAX_HDRIVES]; /* index is host drive number */ 329 } hdr_list[MAX_HDRIVES]; /* index is host drive number */
338} gdth_ioctl_rescan; 330} gdth_ioctl_rescan;
339 331
340/* GDTIOCTL_RESET_BUS/GDTIOCTL_RESET_DRV */ 332/* GDTIOCTL_RESET_BUS/GDTIOCTL_RESET_DRV */
341typedef struct { 333typedef struct {
342 ushort ionode; /* controller number */ 334 u16 ionode; /* controller number */
343 ushort number; /* bus/host drive number */ 335 u16 number; /* bus/host drive number */
344 ushort status; /* status */ 336 u16 status; /* status */
345} gdth_ioctl_reset; 337} gdth_ioctl_reset;
346 338
347#endif 339#endif
diff --git a/drivers/scsi/gdth_proc.c b/drivers/scsi/gdth_proc.c
index 1258da34fbc2..ffb2b21992ba 100644
--- a/drivers/scsi/gdth_proc.c
+++ b/drivers/scsi/gdth_proc.c
@@ -43,7 +43,7 @@ static int gdth_set_asc_info(struct Scsi_Host *host, char *buffer,
43 int i, found; 43 int i, found;
44 gdth_cmd_str gdtcmd; 44 gdth_cmd_str gdtcmd;
45 gdth_cpar_str *pcpar; 45 gdth_cpar_str *pcpar;
46 ulong64 paddr; 46 u64 paddr;
47 47
48 char cmnd[MAX_COMMAND_SIZE]; 48 char cmnd[MAX_COMMAND_SIZE];
49 memset(cmnd, 0xff, 12); 49 memset(cmnd, 0xff, 12);
@@ -156,8 +156,8 @@ static int gdth_get_info(char *buffer,char **start,off_t offset,int length,
156 off_t begin = 0,pos = 0; 156 off_t begin = 0,pos = 0;
157 int id, i, j, k, sec, flag; 157 int id, i, j, k, sec, flag;
158 int no_mdrv = 0, drv_no, is_mirr; 158 int no_mdrv = 0, drv_no, is_mirr;
159 ulong32 cnt; 159 u32 cnt;
160 ulong64 paddr; 160 u64 paddr;
161 int rc = -ENOMEM; 161 int rc = -ENOMEM;
162 162
163 gdth_cmd_str *gdtcmd; 163 gdth_cmd_str *gdtcmd;
@@ -220,14 +220,14 @@ static int gdth_get_info(char *buffer,char **start,off_t offset,int length,
220 220
221 if (ha->more_proc) 221 if (ha->more_proc)
222 sprintf(hrec, "%d.%02d.%02d-%c%03X", 222 sprintf(hrec, "%d.%02d.%02d-%c%03X",
223 (unchar)(ha->binfo.upd_fw_ver>>24), 223 (u8)(ha->binfo.upd_fw_ver>>24),
224 (unchar)(ha->binfo.upd_fw_ver>>16), 224 (u8)(ha->binfo.upd_fw_ver>>16),
225 (unchar)(ha->binfo.upd_fw_ver), 225 (u8)(ha->binfo.upd_fw_ver),
226 ha->bfeat.raid ? 'R':'N', 226 ha->bfeat.raid ? 'R':'N',
227 ha->binfo.upd_revision); 227 ha->binfo.upd_revision);
228 else 228 else
229 sprintf(hrec, "%d.%02d", (unchar)(ha->cpar.version>>8), 229 sprintf(hrec, "%d.%02d", (u8)(ha->cpar.version>>8),
230 (unchar)(ha->cpar.version)); 230 (u8)(ha->cpar.version));
231 231
232 size = sprintf(buffer+len, 232 size = sprintf(buffer+len,
233 " Driver Ver.: \t%-10s\tFirmware Ver.: \t%s\n", 233 " Driver Ver.: \t%-10s\tFirmware Ver.: \t%s\n",
@@ -281,7 +281,7 @@ static int gdth_get_info(char *buffer,char **start,off_t offset,int length,
281 pds->bid = ha->raw[i].local_no; 281 pds->bid = ha->raw[i].local_no;
282 pds->first = 0; 282 pds->first = 0;
283 pds->entries = ha->raw[i].pdev_cnt; 283 pds->entries = ha->raw[i].pdev_cnt;
284 cnt = (3*GDTH_SCRATCH/4 - 5 * sizeof(ulong32)) / 284 cnt = (3*GDTH_SCRATCH/4 - 5 * sizeof(u32)) /
285 sizeof(pds->list[0]); 285 sizeof(pds->list[0]);
286 if (pds->entries > cnt) 286 if (pds->entries > cnt)
287 pds->entries = cnt; 287 pds->entries = cnt;
@@ -604,7 +604,7 @@ static int gdth_get_info(char *buffer,char **start,off_t offset,int length,
604 604
605 size = sprintf(buffer+len, 605 size = sprintf(buffer+len,
606 " Capacity [MB]:\t%-6d \tStart Sector: \t%d\n", 606 " Capacity [MB]:\t%-6d \tStart Sector: \t%d\n",
607 (ulong32)(ha->hdr[i].size/2048), ha->hdr[i].start_sec); 607 (u32)(ha->hdr[i].size/2048), ha->hdr[i].start_sec);
608 len += size; pos = begin + len; 608 len += size; pos = begin + len;
609 if (pos < offset) { 609 if (pos < offset) {
610 len = 0; 610 len = 0;
@@ -664,9 +664,9 @@ free_fail:
664} 664}
665 665
666static char *gdth_ioctl_alloc(gdth_ha_str *ha, int size, int scratch, 666static char *gdth_ioctl_alloc(gdth_ha_str *ha, int size, int scratch,
667 ulong64 *paddr) 667 u64 *paddr)
668{ 668{
669 ulong flags; 669 unsigned long flags;
670 char *ret_val; 670 char *ret_val;
671 671
672 if (size == 0) 672 if (size == 0)
@@ -691,9 +691,9 @@ static char *gdth_ioctl_alloc(gdth_ha_str *ha, int size, int scratch,
691 return ret_val; 691 return ret_val;
692} 692}
693 693
694static void gdth_ioctl_free(gdth_ha_str *ha, int size, char *buf, ulong64 paddr) 694static void gdth_ioctl_free(gdth_ha_str *ha, int size, char *buf, u64 paddr)
695{ 695{
696 ulong flags; 696 unsigned long flags;
697 697
698 if (buf == ha->pscratch) { 698 if (buf == ha->pscratch) {
699 spin_lock_irqsave(&ha->smp_lock, flags); 699 spin_lock_irqsave(&ha->smp_lock, flags);
@@ -705,16 +705,16 @@ static void gdth_ioctl_free(gdth_ha_str *ha, int size, char *buf, ulong64 paddr)
705} 705}
706 706
707#ifdef GDTH_IOCTL_PROC 707#ifdef GDTH_IOCTL_PROC
708static int gdth_ioctl_check_bin(gdth_ha_str *ha, ushort size) 708static int gdth_ioctl_check_bin(gdth_ha_str *ha, u16 size)
709{ 709{
710 ulong flags; 710 unsigned long flags;
711 int ret_val; 711 int ret_val;
712 712
713 spin_lock_irqsave(&ha->smp_lock, flags); 713 spin_lock_irqsave(&ha->smp_lock, flags);
714 714
715 ret_val = FALSE; 715 ret_val = FALSE;
716 if (ha->scratch_busy) { 716 if (ha->scratch_busy) {
717 if (((gdth_iord_str *)ha->pscratch)->size == (ulong32)size) 717 if (((gdth_iord_str *)ha->pscratch)->size == (u32)size)
718 ret_val = TRUE; 718 ret_val = TRUE;
719 } 719 }
720 spin_unlock_irqrestore(&ha->smp_lock, flags); 720 spin_unlock_irqrestore(&ha->smp_lock, flags);
@@ -724,11 +724,11 @@ static int gdth_ioctl_check_bin(gdth_ha_str *ha, ushort size)
724 724
725static void gdth_wait_completion(gdth_ha_str *ha, int busnum, int id) 725static void gdth_wait_completion(gdth_ha_str *ha, int busnum, int id)
726{ 726{
727 ulong flags; 727 unsigned long flags;
728 int i; 728 int i;
729 Scsi_Cmnd *scp; 729 Scsi_Cmnd *scp;
730 struct gdth_cmndinfo *cmndinfo; 730 struct gdth_cmndinfo *cmndinfo;
731 unchar b, t; 731 u8 b, t;
732 732
733 spin_lock_irqsave(&ha->smp_lock, flags); 733 spin_lock_irqsave(&ha->smp_lock, flags);
734 734
@@ -738,8 +738,8 @@ static void gdth_wait_completion(gdth_ha_str *ha, int busnum, int id)
738 738
739 b = scp->device->channel; 739 b = scp->device->channel;
740 t = scp->device->id; 740 t = scp->device->id;
741 if (!SPECIAL_SCP(scp) && t == (unchar)id && 741 if (!SPECIAL_SCP(scp) && t == (u8)id &&
742 b == (unchar)busnum) { 742 b == (u8)busnum) {
743 cmndinfo->wait_for_completion = 0; 743 cmndinfo->wait_for_completion = 0;
744 spin_unlock_irqrestore(&ha->smp_lock, flags); 744 spin_unlock_irqrestore(&ha->smp_lock, flags);
745 while (!cmndinfo->wait_for_completion) 745 while (!cmndinfo->wait_for_completion)
diff --git a/drivers/scsi/gdth_proc.h b/drivers/scsi/gdth_proc.h
index 9b900cc9ebe8..dab15f59f2cc 100644
--- a/drivers/scsi/gdth_proc.h
+++ b/drivers/scsi/gdth_proc.h
@@ -17,8 +17,8 @@ static int gdth_set_asc_info(struct Scsi_Host *host, char *buffer,
17 int length, gdth_ha_str *ha); 17 int length, gdth_ha_str *ha);
18 18
19static char *gdth_ioctl_alloc(gdth_ha_str *ha, int size, int scratch, 19static char *gdth_ioctl_alloc(gdth_ha_str *ha, int size, int scratch,
20 ulong64 *paddr); 20 u64 *paddr);
21static void gdth_ioctl_free(gdth_ha_str *ha, int size, char *buf, ulong64 paddr); 21static void gdth_ioctl_free(gdth_ha_str *ha, int size, char *buf, u64 paddr);
22static void gdth_wait_completion(gdth_ha_str *ha, int busnum, int id); 22static void gdth_wait_completion(gdth_ha_str *ha, int busnum, int id);
23 23
24#endif 24#endif
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c
index bb96fdd58e23..03697ba94251 100644
--- a/drivers/scsi/hpsa.c
+++ b/drivers/scsi/hpsa.c
@@ -52,7 +52,7 @@
52#include "hpsa.h" 52#include "hpsa.h"
53 53
54/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ 54/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
55#define HPSA_DRIVER_VERSION "1.0.0" 55#define HPSA_DRIVER_VERSION "2.0.1-3"
56#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 56#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
57 57
58/* How long to wait (in milliseconds) for board to go into simple mode */ 58/* How long to wait (in milliseconds) for board to go into simple mode */
@@ -77,9 +77,6 @@ MODULE_PARM_DESC(hpsa_allow_any,
77 77
78/* define the PCI info for the cards we can control */ 78/* define the PCI info for the cards we can control */
79static const struct pci_device_id hpsa_pci_device_id[] = { 79static const struct pci_device_id hpsa_pci_device_id[] = {
80 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
81 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
82 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
83 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 80 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 81 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 82 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
@@ -87,6 +84,9 @@ static const struct pci_device_id hpsa_pci_device_id[] = {
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a}, 85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b}, 86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
88#define PCI_DEVICE_ID_HP_CISSF 0x333f
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x333F},
90 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 90 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
91 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 91 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
92 {0,} 92 {0,}
@@ -99,9 +99,6 @@ MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
99 * access = Address of the struct of function pointers 99 * access = Address of the struct of function pointers
100 */ 100 */
101static struct board_type products[] = { 101static struct board_type products[] = {
102 {0x3223103C, "Smart Array P800", &SA5_access},
103 {0x3234103C, "Smart Array P400", &SA5_access},
104 {0x323d103c, "Smart Array P700M", &SA5_access},
105 {0x3241103C, "Smart Array P212", &SA5_access}, 102 {0x3241103C, "Smart Array P212", &SA5_access},
106 {0x3243103C, "Smart Array P410", &SA5_access}, 103 {0x3243103C, "Smart Array P410", &SA5_access},
107 {0x3245103C, "Smart Array P410i", &SA5_access}, 104 {0x3245103C, "Smart Array P410i", &SA5_access},
@@ -109,6 +106,8 @@ static struct board_type products[] = {
109 {0x3249103C, "Smart Array P812", &SA5_access}, 106 {0x3249103C, "Smart Array P812", &SA5_access},
110 {0x324a103C, "Smart Array P712m", &SA5_access}, 107 {0x324a103C, "Smart Array P712m", &SA5_access},
111 {0x324b103C, "Smart Array P711m", &SA5_access}, 108 {0x324b103C, "Smart Array P711m", &SA5_access},
109 {0x3233103C, "StorageWorks P1210m", &SA5_access},
110 {0x333F103C, "StorageWorks P1210m", &SA5_access},
112 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 111 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
113}; 112};
114 113
@@ -126,12 +125,15 @@ static void cmd_free(struct ctlr_info *h, struct CommandList *c);
126static void cmd_special_free(struct ctlr_info *h, struct CommandList *c); 125static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
127static struct CommandList *cmd_alloc(struct ctlr_info *h); 126static struct CommandList *cmd_alloc(struct ctlr_info *h);
128static struct CommandList *cmd_special_alloc(struct ctlr_info *h); 127static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
129static void fill_cmd(struct CommandList *c, __u8 cmd, struct ctlr_info *h, 128static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
130 void *buff, size_t size, __u8 page_code, unsigned char *scsi3addr, 129 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
131 int cmd_type); 130 int cmd_type);
132 131
133static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd, 132static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
134 void (*done)(struct scsi_cmnd *)); 133 void (*done)(struct scsi_cmnd *));
134static void hpsa_scan_start(struct Scsi_Host *);
135static int hpsa_scan_finished(struct Scsi_Host *sh,
136 unsigned long elapsed_time);
135 137
136static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 138static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
137static int hpsa_slave_alloc(struct scsi_device *sdev); 139static int hpsa_slave_alloc(struct scsi_device *sdev);
@@ -150,6 +152,11 @@ static int check_for_unit_attention(struct ctlr_info *h,
150 struct CommandList *c); 152 struct CommandList *c);
151static void check_ioctl_unit_attention(struct ctlr_info *h, 153static void check_ioctl_unit_attention(struct ctlr_info *h,
152 struct CommandList *c); 154 struct CommandList *c);
155/* performant mode helper functions */
156static void calc_bucket_map(int *bucket, int num_buckets,
157 int nsgs, int *bucket_map);
158static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
159static inline u32 next_command(struct ctlr_info *h);
153 160
154static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 161static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
155static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 162static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
@@ -173,10 +180,10 @@ static struct scsi_host_template hpsa_driver_template = {
173 .name = "hpsa", 180 .name = "hpsa",
174 .proc_name = "hpsa", 181 .proc_name = "hpsa",
175 .queuecommand = hpsa_scsi_queue_command, 182 .queuecommand = hpsa_scsi_queue_command,
176 .can_queue = 512, 183 .scan_start = hpsa_scan_start,
184 .scan_finished = hpsa_scan_finished,
177 .this_id = -1, 185 .this_id = -1,
178 .sg_tablesize = MAXSGENTRIES, 186 .sg_tablesize = MAXSGENTRIES,
179 .cmd_per_lun = 512,
180 .use_clustering = ENABLE_CLUSTERING, 187 .use_clustering = ENABLE_CLUSTERING,
181 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 188 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
182 .ioctl = hpsa_ioctl, 189 .ioctl = hpsa_ioctl,
@@ -195,6 +202,12 @@ static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
195 return (struct ctlr_info *) *priv; 202 return (struct ctlr_info *) *priv;
196} 203}
197 204
205static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
206{
207 unsigned long *priv = shost_priv(sh);
208 return (struct ctlr_info *) *priv;
209}
210
198static struct task_struct *hpsa_scan_thread; 211static struct task_struct *hpsa_scan_thread;
199static DEFINE_MUTEX(hpsa_scan_mutex); 212static DEFINE_MUTEX(hpsa_scan_mutex);
200static LIST_HEAD(hpsa_scan_q); 213static LIST_HEAD(hpsa_scan_q);
@@ -312,7 +325,7 @@ static int hpsa_scan_func(__attribute__((unused)) void *data)
312 h->busy_scanning = 1; 325 h->busy_scanning = 1;
313 mutex_unlock(&hpsa_scan_mutex); 326 mutex_unlock(&hpsa_scan_mutex);
314 host_no = h->scsi_host ? h->scsi_host->host_no : -1; 327 host_no = h->scsi_host ? h->scsi_host->host_no : -1;
315 hpsa_update_scsi_devices(h, host_no); 328 hpsa_scan_start(h->scsi_host);
316 complete_all(&h->scan_wait); 329 complete_all(&h->scan_wait);
317 mutex_lock(&hpsa_scan_mutex); 330 mutex_lock(&hpsa_scan_mutex);
318 h->busy_scanning = 0; 331 h->busy_scanning = 0;
@@ -379,8 +392,7 @@ static ssize_t host_store_rescan(struct device *dev,
379{ 392{
380 struct ctlr_info *h; 393 struct ctlr_info *h;
381 struct Scsi_Host *shost = class_to_shost(dev); 394 struct Scsi_Host *shost = class_to_shost(dev);
382 unsigned long *priv = shost_priv(shost); 395 h = shost_to_hba(shost);
383 h = (struct ctlr_info *) *priv;
384 if (add_to_scan_list(h)) { 396 if (add_to_scan_list(h)) {
385 wake_up_process(hpsa_scan_thread); 397 wake_up_process(hpsa_scan_thread);
386 wait_for_completion_interruptible(&h->scan_wait); 398 wait_for_completion_interruptible(&h->scan_wait);
@@ -394,10 +406,44 @@ static inline void addQ(struct hlist_head *list, struct CommandList *c)
394 hlist_add_head(&c->list, list); 406 hlist_add_head(&c->list, list);
395} 407}
396 408
409static inline u32 next_command(struct ctlr_info *h)
410{
411 u32 a;
412
413 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
414 return h->access.command_completed(h);
415
416 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
417 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
418 (h->reply_pool_head)++;
419 h->commands_outstanding--;
420 } else {
421 a = FIFO_EMPTY;
422 }
423 /* Check for wraparound */
424 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
425 h->reply_pool_head = h->reply_pool;
426 h->reply_pool_wraparound ^= 1;
427 }
428 return a;
429}
430
431/* set_performant_mode: Modify the tag for cciss performant
432 * set bit 0 for pull model, bits 3-1 for block fetch
433 * register number
434 */
435static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
436{
437 if (likely(h->transMethod == CFGTBL_Trans_Performant))
438 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
439}
440
397static void enqueue_cmd_and_start_io(struct ctlr_info *h, 441static void enqueue_cmd_and_start_io(struct ctlr_info *h,
398 struct CommandList *c) 442 struct CommandList *c)
399{ 443{
400 unsigned long flags; 444 unsigned long flags;
445
446 set_performant_mode(h, c);
401 spin_lock_irqsave(&h->lock, flags); 447 spin_lock_irqsave(&h->lock, flags);
402 addQ(&h->reqQ, c); 448 addQ(&h->reqQ, c);
403 h->Qdepth++; 449 h->Qdepth++;
@@ -422,6 +468,15 @@ static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
422 return (scsi3addr[3] & 0xC0) == 0x40; 468 return (scsi3addr[3] & 0xC0) == 0x40;
423} 469}
424 470
471static inline int is_scsi_rev_5(struct ctlr_info *h)
472{
473 if (!h->hba_inquiry_data)
474 return 0;
475 if ((h->hba_inquiry_data[2] & 0x07) == 5)
476 return 1;
477 return 0;
478}
479
425static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 480static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
426 "UNKNOWN" 481 "UNKNOWN"
427}; 482};
@@ -431,7 +486,7 @@ static ssize_t raid_level_show(struct device *dev,
431 struct device_attribute *attr, char *buf) 486 struct device_attribute *attr, char *buf)
432{ 487{
433 ssize_t l = 0; 488 ssize_t l = 0;
434 int rlevel; 489 unsigned char rlevel;
435 struct ctlr_info *h; 490 struct ctlr_info *h;
436 struct scsi_device *sdev; 491 struct scsi_device *sdev;
437 struct hpsa_scsi_dev_t *hdev; 492 struct hpsa_scsi_dev_t *hdev;
@@ -455,7 +510,7 @@ static ssize_t raid_level_show(struct device *dev,
455 510
456 rlevel = hdev->raid_level; 511 rlevel = hdev->raid_level;
457 spin_unlock_irqrestore(&h->lock, flags); 512 spin_unlock_irqrestore(&h->lock, flags);
458 if (rlevel < 0 || rlevel > RAID_UNKNOWN) 513 if (rlevel > RAID_UNKNOWN)
459 rlevel = RAID_UNKNOWN; 514 rlevel = RAID_UNKNOWN;
460 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 515 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
461 return l; 516 return l;
@@ -620,6 +675,24 @@ lun_assigned:
620 return 0; 675 return 0;
621} 676}
622 677
678/* Replace an entry from h->dev[] array. */
679static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
680 int entry, struct hpsa_scsi_dev_t *new_entry,
681 struct hpsa_scsi_dev_t *added[], int *nadded,
682 struct hpsa_scsi_dev_t *removed[], int *nremoved)
683{
684 /* assumes h->devlock is held */
685 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
686 removed[*nremoved] = h->dev[entry];
687 (*nremoved)++;
688 h->dev[entry] = new_entry;
689 added[*nadded] = new_entry;
690 (*nadded)++;
691 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
692 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
693 new_entry->target, new_entry->lun);
694}
695
623/* Remove an entry from h->dev[] array. */ 696/* Remove an entry from h->dev[] array. */
624static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry, 697static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
625 struct hpsa_scsi_dev_t *removed[], int *nremoved) 698 struct hpsa_scsi_dev_t *removed[], int *nremoved)
@@ -628,8 +701,7 @@ static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
628 int i; 701 int i;
629 struct hpsa_scsi_dev_t *sd; 702 struct hpsa_scsi_dev_t *sd;
630 703
631 if (entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA) 704 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
632 BUG();
633 705
634 sd = h->dev[entry]; 706 sd = h->dev[entry];
635 removed[*nremoved] = h->dev[entry]; 707 removed[*nremoved] = h->dev[entry];
@@ -722,6 +794,8 @@ static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
722#define DEVICE_CHANGED 1 794#define DEVICE_CHANGED 1
723#define DEVICE_SAME 2 795#define DEVICE_SAME 2
724 for (i = 0; i < haystack_size; i++) { 796 for (i = 0; i < haystack_size; i++) {
797 if (haystack[i] == NULL) /* previously removed. */
798 continue;
725 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 799 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
726 *index = i; 800 *index = i;
727 if (device_is_the_same(needle, haystack[i])) 801 if (device_is_the_same(needle, haystack[i]))
@@ -734,7 +808,7 @@ static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
734 return DEVICE_NOT_FOUND; 808 return DEVICE_NOT_FOUND;
735} 809}
736 810
737static int adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno, 811static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
738 struct hpsa_scsi_dev_t *sd[], int nsds) 812 struct hpsa_scsi_dev_t *sd[], int nsds)
739{ 813{
740 /* sd contains scsi3 addresses and devtypes, and inquiry 814 /* sd contains scsi3 addresses and devtypes, and inquiry
@@ -779,12 +853,12 @@ static int adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
779 continue; /* remove ^^^, hence i not incremented */ 853 continue; /* remove ^^^, hence i not incremented */
780 } else if (device_change == DEVICE_CHANGED) { 854 } else if (device_change == DEVICE_CHANGED) {
781 changes++; 855 changes++;
782 hpsa_scsi_remove_entry(h, hostno, i, 856 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
783 removed, &nremoved); 857 added, &nadded, removed, &nremoved);
784 (void) hpsa_scsi_add_entry(h, hostno, sd[entry], 858 /* Set it to NULL to prevent it from being freed
785 added, &nadded); 859 * at the bottom of hpsa_update_scsi_devices()
786 /* add can't fail, we just removed one. */ 860 */
787 sd[entry] = NULL; /* prevent it from being freed */ 861 sd[entry] = NULL;
788 } 862 }
789 i++; 863 i++;
790 } 864 }
@@ -860,7 +934,6 @@ static int adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
860free_and_out: 934free_and_out:
861 kfree(added); 935 kfree(added);
862 kfree(removed); 936 kfree(removed);
863 return 0;
864} 937}
865 938
866/* 939/*
@@ -900,7 +973,7 @@ static int hpsa_slave_alloc(struct scsi_device *sdev)
900 973
901static void hpsa_slave_destroy(struct scsi_device *sdev) 974static void hpsa_slave_destroy(struct scsi_device *sdev)
902{ 975{
903 return; /* nothing to do. */ 976 /* nothing to do. */
904} 977}
905 978
906static void hpsa_scsi_setup(struct ctlr_info *h) 979static void hpsa_scsi_setup(struct ctlr_info *h)
@@ -908,11 +981,10 @@ static void hpsa_scsi_setup(struct ctlr_info *h)
908 h->ndevices = 0; 981 h->ndevices = 0;
909 h->scsi_host = NULL; 982 h->scsi_host = NULL;
910 spin_lock_init(&h->devlock); 983 spin_lock_init(&h->devlock);
911 return;
912} 984}
913 985
914static void complete_scsi_command(struct CommandList *cp, 986static void complete_scsi_command(struct CommandList *cp,
915 int timeout, __u32 tag) 987 int timeout, u32 tag)
916{ 988{
917 struct scsi_cmnd *cmd; 989 struct scsi_cmnd *cmd;
918 struct ctlr_info *h; 990 struct ctlr_info *h;
@@ -987,7 +1059,6 @@ static void complete_scsi_command(struct CommandList *cp,
987 * required 1059 * required
988 */ 1060 */
989 if ((asc == 0x04) && (ascq == 0x03)) { 1061 if ((asc == 0x04) && (ascq == 0x03)) {
990 cmd->result = DID_NO_CONNECT << 16;
991 dev_warn(&h->pdev->dev, "cp %p " 1062 dev_warn(&h->pdev->dev, "cp %p "
992 "has check condition: unit " 1063 "has check condition: unit "
993 "not ready, manual " 1064 "not ready, manual "
@@ -995,14 +1066,22 @@ static void complete_scsi_command(struct CommandList *cp,
995 break; 1066 break;
996 } 1067 }
997 } 1068 }
998 1069 if (sense_key == ABORTED_COMMAND) {
999 1070 /* Aborted command is retryable */
1071 dev_warn(&h->pdev->dev, "cp %p "
1072 "has check condition: aborted command: "
1073 "ASC: 0x%x, ASCQ: 0x%x\n",
1074 cp, asc, ascq);
1075 cmd->result = DID_SOFT_ERROR << 16;
1076 break;
1077 }
1000 /* Must be some other type of check condition */ 1078 /* Must be some other type of check condition */
1001 dev_warn(&h->pdev->dev, "cp %p has check condition: " 1079 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1002 "unknown type: " 1080 "unknown type: "
1003 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1081 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1004 "Returning result: 0x%x, " 1082 "Returning result: 0x%x, "
1005 "cmd=[%02x %02x %02x %02x %02x " 1083 "cmd=[%02x %02x %02x %02x %02x "
1084 "%02x %02x %02x %02x %02x %02x "
1006 "%02x %02x %02x %02x %02x]\n", 1085 "%02x %02x %02x %02x %02x]\n",
1007 cp, sense_key, asc, ascq, 1086 cp, sense_key, asc, ascq,
1008 cmd->result, 1087 cmd->result,
@@ -1010,7 +1089,10 @@ static void complete_scsi_command(struct CommandList *cp,
1010 cmd->cmnd[2], cmd->cmnd[3], 1089 cmd->cmnd[2], cmd->cmnd[3],
1011 cmd->cmnd[4], cmd->cmnd[5], 1090 cmd->cmnd[4], cmd->cmnd[5],
1012 cmd->cmnd[6], cmd->cmnd[7], 1091 cmd->cmnd[6], cmd->cmnd[7],
1013 cmd->cmnd[8], cmd->cmnd[9]); 1092 cmd->cmnd[8], cmd->cmnd[9],
1093 cmd->cmnd[10], cmd->cmnd[11],
1094 cmd->cmnd[12], cmd->cmnd[13],
1095 cmd->cmnd[14], cmd->cmnd[15]);
1014 break; 1096 break;
1015 } 1097 }
1016 1098
@@ -1086,7 +1168,7 @@ static void complete_scsi_command(struct CommandList *cp,
1086 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp); 1168 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1087 break; 1169 break;
1088 case CMD_UNSOLICITED_ABORT: 1170 case CMD_UNSOLICITED_ABORT:
1089 cmd->result = DID_ABORT << 16; 1171 cmd->result = DID_RESET << 16;
1090 dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited " 1172 dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
1091 "abort\n", cp); 1173 "abort\n", cp);
1092 break; 1174 break;
@@ -1119,9 +1201,11 @@ static int hpsa_scsi_detect(struct ctlr_info *h)
1119 sh->max_cmd_len = MAX_COMMAND_SIZE; 1201 sh->max_cmd_len = MAX_COMMAND_SIZE;
1120 sh->max_lun = HPSA_MAX_LUN; 1202 sh->max_lun = HPSA_MAX_LUN;
1121 sh->max_id = HPSA_MAX_LUN; 1203 sh->max_id = HPSA_MAX_LUN;
1204 sh->can_queue = h->nr_cmds;
1205 sh->cmd_per_lun = h->nr_cmds;
1122 h->scsi_host = sh; 1206 h->scsi_host = sh;
1123 sh->hostdata[0] = (unsigned long) h; 1207 sh->hostdata[0] = (unsigned long) h;
1124 sh->irq = h->intr[SIMPLE_MODE_INT]; 1208 sh->irq = h->intr[PERF_MODE_INT];
1125 sh->unique_id = sh->irq; 1209 sh->unique_id = sh->irq;
1126 error = scsi_add_host(sh, &h->pdev->dev); 1210 error = scsi_add_host(sh, &h->pdev->dev);
1127 if (error) 1211 if (error)
@@ -1133,11 +1217,11 @@ static int hpsa_scsi_detect(struct ctlr_info *h)
1133 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host" 1217 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1134 " failed for controller %d\n", h->ctlr); 1218 " failed for controller %d\n", h->ctlr);
1135 scsi_host_put(sh); 1219 scsi_host_put(sh);
1136 return -1; 1220 return error;
1137 fail: 1221 fail:
1138 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc" 1222 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1139 " failed for controller %d\n", h->ctlr); 1223 " failed for controller %d\n", h->ctlr);
1140 return -1; 1224 return -ENOMEM;
1141} 1225}
1142 1226
1143static void hpsa_pci_unmap(struct pci_dev *pdev, 1227static void hpsa_pci_unmap(struct pci_dev *pdev,
@@ -1160,7 +1244,7 @@ static void hpsa_map_one(struct pci_dev *pdev,
1160 size_t buflen, 1244 size_t buflen,
1161 int data_direction) 1245 int data_direction)
1162{ 1246{
1163 __u64 addr64; 1247 u64 addr64;
1164 1248
1165 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 1249 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1166 cp->Header.SGList = 0; 1250 cp->Header.SGList = 0;
@@ -1168,14 +1252,14 @@ static void hpsa_map_one(struct pci_dev *pdev,
1168 return; 1252 return;
1169 } 1253 }
1170 1254
1171 addr64 = (__u64) pci_map_single(pdev, buf, buflen, data_direction); 1255 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1172 cp->SG[0].Addr.lower = 1256 cp->SG[0].Addr.lower =
1173 (__u32) (addr64 & (__u64) 0x00000000FFFFFFFF); 1257 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1174 cp->SG[0].Addr.upper = 1258 cp->SG[0].Addr.upper =
1175 (__u32) ((addr64 >> 32) & (__u64) 0x00000000FFFFFFFF); 1259 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1176 cp->SG[0].Len = buflen; 1260 cp->SG[0].Len = buflen;
1177 cp->Header.SGList = (__u8) 1; /* no. SGs contig in this cmd */ 1261 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1178 cp->Header.SGTotal = (__u16) 1; /* total sgs in this cmd list */ 1262 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1179} 1263}
1180 1264
1181static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 1265static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
@@ -1274,7 +1358,7 @@ static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1274 1358
1275 if (c == NULL) { /* trouble... */ 1359 if (c == NULL) { /* trouble... */
1276 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1360 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1277 return -1; 1361 return -ENOMEM;
1278 } 1362 }
1279 1363
1280 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD); 1364 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
@@ -1366,9 +1450,8 @@ static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1366 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1450 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1367 return -1; 1451 return -1;
1368 } 1452 }
1369 1453 /* address the controller */
1370 memset(&scsi3addr[0], 0, 8); /* address the controller */ 1454 memset(scsi3addr, 0, sizeof(scsi3addr));
1371
1372 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 1455 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1373 buf, bufsize, 0, scsi3addr, TYPE_CMD); 1456 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1374 if (extended_response) 1457 if (extended_response)
@@ -1409,13 +1492,12 @@ static int hpsa_update_device_info(struct ctlr_info *h,
1409 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device) 1492 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
1410{ 1493{
1411#define OBDR_TAPE_INQ_SIZE 49 1494#define OBDR_TAPE_INQ_SIZE 49
1412 unsigned char *inq_buff = NULL; 1495 unsigned char *inq_buff;
1413 1496
1414 inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 1497 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1415 if (!inq_buff) 1498 if (!inq_buff)
1416 goto bail_out; 1499 goto bail_out;
1417 1500
1418 memset(inq_buff, 0, OBDR_TAPE_INQ_SIZE);
1419 /* Do an inquiry to the device to see what it is. */ 1501 /* Do an inquiry to the device to see what it is. */
1420 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 1502 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1421 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 1503 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
@@ -1485,32 +1567,51 @@ static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1485 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 1567 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1486 */ 1568 */
1487static void figure_bus_target_lun(struct ctlr_info *h, 1569static void figure_bus_target_lun(struct ctlr_info *h,
1488 __u8 *lunaddrbytes, int *bus, int *target, int *lun, 1570 u8 *lunaddrbytes, int *bus, int *target, int *lun,
1489 struct hpsa_scsi_dev_t *device) 1571 struct hpsa_scsi_dev_t *device)
1490{ 1572{
1491 1573 u32 lunid;
1492 __u32 lunid;
1493 1574
1494 if (is_logical_dev_addr_mode(lunaddrbytes)) { 1575 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1495 /* logical device */ 1576 /* logical device */
1496 memcpy(&lunid, lunaddrbytes, sizeof(lunid)); 1577 if (unlikely(is_scsi_rev_5(h))) {
1497 lunid = le32_to_cpu(lunid); 1578 /* p1210m, logical drives lun assignments
1498 1579 * match SCSI REPORT LUNS data.
1499 if (is_msa2xxx(h, device)) { 1580 */
1500 *bus = 1; 1581 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1501 *target = (lunid >> 16) & 0x3fff;
1502 *lun = lunid & 0x00ff;
1503 } else {
1504 *bus = 0; 1582 *bus = 0;
1505 *lun = 0; 1583 *target = 0;
1506 *target = lunid & 0x3fff; 1584 *lun = (lunid & 0x3fff) + 1;
1585 } else {
1586 /* not p1210m... */
1587 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1588 if (is_msa2xxx(h, device)) {
1589 /* msa2xxx way, put logicals on bus 1
1590 * and match target/lun numbers box
1591 * reports.
1592 */
1593 *bus = 1;
1594 *target = (lunid >> 16) & 0x3fff;
1595 *lun = lunid & 0x00ff;
1596 } else {
1597 /* Traditional smart array way. */
1598 *bus = 0;
1599 *lun = 0;
1600 *target = lunid & 0x3fff;
1601 }
1507 } 1602 }
1508 } else { 1603 } else {
1509 /* physical device */ 1604 /* physical device */
1510 if (is_hba_lunid(lunaddrbytes)) 1605 if (is_hba_lunid(lunaddrbytes))
1511 *bus = 3; 1606 if (unlikely(is_scsi_rev_5(h))) {
1607 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1608 *target = 0;
1609 *lun = 0;
1610 return;
1611 } else
1612 *bus = 3; /* traditional smartarray */
1512 else 1613 else
1513 *bus = 2; 1614 *bus = 2; /* physical disk */
1514 *target = -1; 1615 *target = -1;
1515 *lun = -1; /* we will fill these in later. */ 1616 *lun = -1; /* we will fill these in later. */
1516 } 1617 }
@@ -1529,7 +1630,7 @@ static void figure_bus_target_lun(struct ctlr_info *h,
1529 */ 1630 */
1530static int add_msa2xxx_enclosure_device(struct ctlr_info *h, 1631static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1531 struct hpsa_scsi_dev_t *tmpdevice, 1632 struct hpsa_scsi_dev_t *tmpdevice,
1532 struct hpsa_scsi_dev_t *this_device, __u8 *lunaddrbytes, 1633 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
1533 int bus, int target, int lun, unsigned long lunzerobits[], 1634 int bus, int target, int lun, unsigned long lunzerobits[],
1534 int *nmsa2xxx_enclosures) 1635 int *nmsa2xxx_enclosures)
1535{ 1636{
@@ -1550,6 +1651,9 @@ static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1550 if (is_hba_lunid(scsi3addr)) 1651 if (is_hba_lunid(scsi3addr))
1551 return 0; /* Don't add the RAID controller here. */ 1652 return 0; /* Don't add the RAID controller here. */
1552 1653
1654 if (is_scsi_rev_5(h))
1655 return 0; /* p1210m doesn't need to do this. */
1656
1553#define MAX_MSA2XXX_ENCLOSURES 32 1657#define MAX_MSA2XXX_ENCLOSURES 32
1554 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) { 1658 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1555 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX " 1659 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
@@ -1576,18 +1680,14 @@ static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1576 */ 1680 */
1577static int hpsa_gather_lun_info(struct ctlr_info *h, 1681static int hpsa_gather_lun_info(struct ctlr_info *h,
1578 int reportlunsize, 1682 int reportlunsize,
1579 struct ReportLUNdata *physdev, __u32 *nphysicals, 1683 struct ReportLUNdata *physdev, u32 *nphysicals,
1580 struct ReportLUNdata *logdev, __u32 *nlogicals) 1684 struct ReportLUNdata *logdev, u32 *nlogicals)
1581{ 1685{
1582 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) { 1686 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1583 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 1687 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1584 return -1; 1688 return -1;
1585 } 1689 }
1586 memcpy(nphysicals, &physdev->LUNListLength[0], sizeof(*nphysicals)); 1690 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
1587 *nphysicals = be32_to_cpu(*nphysicals) / 8;
1588#ifdef DEBUG
1589 dev_info(&h->pdev->dev, "number of physical luns is %d\n", *nphysicals);
1590#endif
1591 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 1691 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1592 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded." 1692 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1593 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1693 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
@@ -1598,11 +1698,7 @@ static int hpsa_gather_lun_info(struct ctlr_info *h,
1598 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 1698 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1599 return -1; 1699 return -1;
1600 } 1700 }
1601 memcpy(nlogicals, &logdev->LUNListLength[0], sizeof(*nlogicals)); 1701 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
1602 *nlogicals = be32_to_cpu(*nlogicals) / 8;
1603#ifdef DEBUG
1604 dev_info(&h->pdev->dev, "number of logical luns is %d\n", *nlogicals);
1605#endif
1606 /* Reject Logicals in excess of our max capability. */ 1702 /* Reject Logicals in excess of our max capability. */
1607 if (*nlogicals > HPSA_MAX_LUN) { 1703 if (*nlogicals > HPSA_MAX_LUN) {
1608 dev_warn(&h->pdev->dev, 1704 dev_warn(&h->pdev->dev,
@@ -1621,6 +1717,31 @@ static int hpsa_gather_lun_info(struct ctlr_info *h,
1621 return 0; 1717 return 0;
1622} 1718}
1623 1719
1720u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1721 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1722 struct ReportLUNdata *logdev_list)
1723{
1724 /* Helper function, figure out where the LUN ID info is coming from
1725 * given index i, lists of physical and logical devices, where in
1726 * the list the raid controller is supposed to appear (first or last)
1727 */
1728
1729 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1730 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1731
1732 if (i == raid_ctlr_position)
1733 return RAID_CTLR_LUNID;
1734
1735 if (i < logicals_start)
1736 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1737
1738 if (i < last_device)
1739 return &logdev_list->LUN[i - nphysicals -
1740 (raid_ctlr_position == 0)][0];
1741 BUG();
1742 return NULL;
1743}
1744
1624static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) 1745static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1625{ 1746{
1626 /* the idea here is we could get notified 1747 /* the idea here is we could get notified
@@ -1636,14 +1757,15 @@ static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1636 struct ReportLUNdata *physdev_list = NULL; 1757 struct ReportLUNdata *physdev_list = NULL;
1637 struct ReportLUNdata *logdev_list = NULL; 1758 struct ReportLUNdata *logdev_list = NULL;
1638 unsigned char *inq_buff = NULL; 1759 unsigned char *inq_buff = NULL;
1639 __u32 nphysicals = 0; 1760 u32 nphysicals = 0;
1640 __u32 nlogicals = 0; 1761 u32 nlogicals = 0;
1641 __u32 ndev_allocated = 0; 1762 u32 ndev_allocated = 0;
1642 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 1763 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1643 int ncurrent = 0; 1764 int ncurrent = 0;
1644 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8; 1765 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1645 int i, nmsa2xxx_enclosures, ndevs_to_allocate; 1766 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1646 int bus, target, lun; 1767 int bus, target, lun;
1768 int raid_ctlr_position;
1647 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR); 1769 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1648 1770
1649 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA, 1771 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
@@ -1681,23 +1803,22 @@ static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1681 ndev_allocated++; 1803 ndev_allocated++;
1682 } 1804 }
1683 1805
1806 if (unlikely(is_scsi_rev_5(h)))
1807 raid_ctlr_position = 0;
1808 else
1809 raid_ctlr_position = nphysicals + nlogicals;
1810
1684 /* adjust our table of devices */ 1811 /* adjust our table of devices */
1685 nmsa2xxx_enclosures = 0; 1812 nmsa2xxx_enclosures = 0;
1686 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 1813 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
1687 __u8 *lunaddrbytes; 1814 u8 *lunaddrbytes;
1688 1815
1689 /* Figure out where the LUN ID info is coming from */ 1816 /* Figure out where the LUN ID info is coming from */
1690 if (i < nphysicals) 1817 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1691 lunaddrbytes = &physdev_list->LUN[i][0]; 1818 i, nphysicals, nlogicals, physdev_list, logdev_list);
1692 else
1693 if (i < nphysicals + nlogicals)
1694 lunaddrbytes =
1695 &logdev_list->LUN[i-nphysicals][0];
1696 else /* jam in the RAID controller at the end */
1697 lunaddrbytes = RAID_CTLR_LUNID;
1698
1699 /* skip masked physical devices. */ 1819 /* skip masked physical devices. */
1700 if (lunaddrbytes[3] & 0xC0 && i < nphysicals) 1820 if (lunaddrbytes[3] & 0xC0 &&
1821 i < nphysicals + (raid_ctlr_position == 0))
1701 continue; 1822 continue;
1702 1823
1703 /* Get device type, vendor, model, device id */ 1824 /* Get device type, vendor, model, device id */
@@ -1777,7 +1898,6 @@ out:
1777 kfree(inq_buff); 1898 kfree(inq_buff);
1778 kfree(physdev_list); 1899 kfree(physdev_list);
1779 kfree(logdev_list); 1900 kfree(logdev_list);
1780 return;
1781} 1901}
1782 1902
1783/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 1903/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
@@ -1790,7 +1910,7 @@ static int hpsa_scatter_gather(struct pci_dev *pdev,
1790{ 1910{
1791 unsigned int len; 1911 unsigned int len;
1792 struct scatterlist *sg; 1912 struct scatterlist *sg;
1793 __u64 addr64; 1913 u64 addr64;
1794 int use_sg, i; 1914 int use_sg, i;
1795 1915
1796 BUG_ON(scsi_sg_count(cmd) > MAXSGENTRIES); 1916 BUG_ON(scsi_sg_count(cmd) > MAXSGENTRIES);
@@ -1803,20 +1923,20 @@ static int hpsa_scatter_gather(struct pci_dev *pdev,
1803 goto sglist_finished; 1923 goto sglist_finished;
1804 1924
1805 scsi_for_each_sg(cmd, sg, use_sg, i) { 1925 scsi_for_each_sg(cmd, sg, use_sg, i) {
1806 addr64 = (__u64) sg_dma_address(sg); 1926 addr64 = (u64) sg_dma_address(sg);
1807 len = sg_dma_len(sg); 1927 len = sg_dma_len(sg);
1808 cp->SG[i].Addr.lower = 1928 cp->SG[i].Addr.lower =
1809 (__u32) (addr64 & (__u64) 0x00000000FFFFFFFF); 1929 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1810 cp->SG[i].Addr.upper = 1930 cp->SG[i].Addr.upper =
1811 (__u32) ((addr64 >> 32) & (__u64) 0x00000000FFFFFFFF); 1931 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1812 cp->SG[i].Len = len; 1932 cp->SG[i].Len = len;
1813 cp->SG[i].Ext = 0; /* we are not chaining */ 1933 cp->SG[i].Ext = 0; /* we are not chaining */
1814 } 1934 }
1815 1935
1816sglist_finished: 1936sglist_finished:
1817 1937
1818 cp->Header.SGList = (__u8) use_sg; /* no. SGs contig in this cmd */ 1938 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
1819 cp->Header.SGTotal = (__u16) use_sg; /* total sgs in this cmd list */ 1939 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
1820 return 0; 1940 return 0;
1821} 1941}
1822 1942
@@ -1860,7 +1980,8 @@ static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
1860 c->scsi_cmd = cmd; 1980 c->scsi_cmd = cmd;
1861 c->Header.ReplyQueue = 0; /* unused in simple mode */ 1981 c->Header.ReplyQueue = 0; /* unused in simple mode */
1862 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 1982 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
1863 c->Header.Tag.lower = c->busaddr; /* Use k. address of cmd as tag */ 1983 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
1984 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
1864 1985
1865 /* Fill in the request block... */ 1986 /* Fill in the request block... */
1866 1987
@@ -1914,6 +2035,48 @@ static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
1914 return 0; 2035 return 0;
1915} 2036}
1916 2037
2038static void hpsa_scan_start(struct Scsi_Host *sh)
2039{
2040 struct ctlr_info *h = shost_to_hba(sh);
2041 unsigned long flags;
2042
2043 /* wait until any scan already in progress is finished. */
2044 while (1) {
2045 spin_lock_irqsave(&h->scan_lock, flags);
2046 if (h->scan_finished)
2047 break;
2048 spin_unlock_irqrestore(&h->scan_lock, flags);
2049 wait_event(h->scan_wait_queue, h->scan_finished);
2050 /* Note: We don't need to worry about a race between this
2051 * thread and driver unload because the midlayer will
2052 * have incremented the reference count, so unload won't
2053 * happen if we're in here.
2054 */
2055 }
2056 h->scan_finished = 0; /* mark scan as in progress */
2057 spin_unlock_irqrestore(&h->scan_lock, flags);
2058
2059 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2060
2061 spin_lock_irqsave(&h->scan_lock, flags);
2062 h->scan_finished = 1; /* mark scan as finished. */
2063 wake_up_all(&h->scan_wait_queue);
2064 spin_unlock_irqrestore(&h->scan_lock, flags);
2065}
2066
2067static int hpsa_scan_finished(struct Scsi_Host *sh,
2068 unsigned long elapsed_time)
2069{
2070 struct ctlr_info *h = shost_to_hba(sh);
2071 unsigned long flags;
2072 int finished;
2073
2074 spin_lock_irqsave(&h->scan_lock, flags);
2075 finished = h->scan_finished;
2076 spin_unlock_irqrestore(&h->scan_lock, flags);
2077 return finished;
2078}
2079
1917static void hpsa_unregister_scsi(struct ctlr_info *h) 2080static void hpsa_unregister_scsi(struct ctlr_info *h)
1918{ 2081{
1919 /* we are being forcibly unloaded, and may not refuse. */ 2082 /* we are being forcibly unloaded, and may not refuse. */
@@ -1926,7 +2089,6 @@ static int hpsa_register_scsi(struct ctlr_info *h)
1926{ 2089{
1927 int rc; 2090 int rc;
1928 2091
1929 hpsa_update_scsi_devices(h, -1);
1930 rc = hpsa_scsi_detect(h); 2092 rc = hpsa_scsi_detect(h);
1931 if (rc != 0) 2093 if (rc != 0)
1932 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed" 2094 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
@@ -2003,14 +2165,14 @@ static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2003 h = sdev_to_hba(scsicmd->device); 2165 h = sdev_to_hba(scsicmd->device);
2004 if (h == NULL) /* paranoia */ 2166 if (h == NULL) /* paranoia */
2005 return FAILED; 2167 return FAILED;
2006 dev_warn(&h->pdev->dev, "resetting drive\n");
2007
2008 dev = scsicmd->device->hostdata; 2168 dev = scsicmd->device->hostdata;
2009 if (!dev) { 2169 if (!dev) {
2010 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: " 2170 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2011 "device lookup failed.\n"); 2171 "device lookup failed.\n");
2012 return FAILED; 2172 return FAILED;
2013 } 2173 }
2174 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2175 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2014 /* send a reset to the SCSI LUN which the command was sent to */ 2176 /* send a reset to the SCSI LUN which the command was sent to */
2015 rc = hpsa_send_reset(h, dev->scsi3addr); 2177 rc = hpsa_send_reset(h, dev->scsi3addr);
2016 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0) 2178 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
@@ -2053,8 +2215,8 @@ static struct CommandList *cmd_alloc(struct ctlr_info *h)
2053 c->cmdindex = i; 2215 c->cmdindex = i;
2054 2216
2055 INIT_HLIST_NODE(&c->list); 2217 INIT_HLIST_NODE(&c->list);
2056 c->busaddr = (__u32) cmd_dma_handle; 2218 c->busaddr = (u32) cmd_dma_handle;
2057 temp64.val = (__u64) err_dma_handle; 2219 temp64.val = (u64) err_dma_handle;
2058 c->ErrDesc.Addr.lower = temp64.val32.lower; 2220 c->ErrDesc.Addr.lower = temp64.val32.lower;
2059 c->ErrDesc.Addr.upper = temp64.val32.upper; 2221 c->ErrDesc.Addr.upper = temp64.val32.upper;
2060 c->ErrDesc.Len = sizeof(*c->err_info); 2222 c->ErrDesc.Len = sizeof(*c->err_info);
@@ -2091,8 +2253,8 @@ static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2091 memset(c->err_info, 0, sizeof(*c->err_info)); 2253 memset(c->err_info, 0, sizeof(*c->err_info));
2092 2254
2093 INIT_HLIST_NODE(&c->list); 2255 INIT_HLIST_NODE(&c->list);
2094 c->busaddr = (__u32) cmd_dma_handle; 2256 c->busaddr = (u32) cmd_dma_handle;
2095 temp64.val = (__u64) err_dma_handle; 2257 temp64.val = (u64) err_dma_handle;
2096 c->ErrDesc.Addr.lower = temp64.val32.lower; 2258 c->ErrDesc.Addr.lower = temp64.val32.lower;
2097 c->ErrDesc.Addr.upper = temp64.val32.upper; 2259 c->ErrDesc.Addr.upper = temp64.val32.upper;
2098 c->ErrDesc.Len = sizeof(*c->err_info); 2260 c->ErrDesc.Len = sizeof(*c->err_info);
@@ -2125,50 +2287,6 @@ static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2125 2287
2126#ifdef CONFIG_COMPAT 2288#ifdef CONFIG_COMPAT
2127 2289
2128static int do_ioctl(struct scsi_device *dev, int cmd, void *arg)
2129{
2130 int ret;
2131
2132 lock_kernel();
2133 ret = hpsa_ioctl(dev, cmd, arg);
2134 unlock_kernel();
2135 return ret;
2136}
2137
2138static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg);
2139static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2140 int cmd, void *arg);
2141
2142static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2143{
2144 switch (cmd) {
2145 case CCISS_GETPCIINFO:
2146 case CCISS_GETINTINFO:
2147 case CCISS_SETINTINFO:
2148 case CCISS_GETNODENAME:
2149 case CCISS_SETNODENAME:
2150 case CCISS_GETHEARTBEAT:
2151 case CCISS_GETBUSTYPES:
2152 case CCISS_GETFIRMVER:
2153 case CCISS_GETDRIVVER:
2154 case CCISS_REVALIDVOLS:
2155 case CCISS_DEREGDISK:
2156 case CCISS_REGNEWDISK:
2157 case CCISS_REGNEWD:
2158 case CCISS_RESCANDISK:
2159 case CCISS_GETLUNINFO:
2160 return do_ioctl(dev, cmd, arg);
2161
2162 case CCISS_PASSTHRU32:
2163 return hpsa_ioctl32_passthru(dev, cmd, arg);
2164 case CCISS_BIG_PASSTHRU32:
2165 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2166
2167 default:
2168 return -ENOIOCTLCMD;
2169 }
2170}
2171
2172static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg) 2290static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2173{ 2291{
2174 IOCTL32_Command_struct __user *arg32 = 2292 IOCTL32_Command_struct __user *arg32 =
@@ -2193,7 +2311,7 @@ static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2193 if (err) 2311 if (err)
2194 return -EFAULT; 2312 return -EFAULT;
2195 2313
2196 err = do_ioctl(dev, CCISS_PASSTHRU, (void *)p); 2314 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
2197 if (err) 2315 if (err)
2198 return err; 2316 return err;
2199 err |= copy_in_user(&arg32->error_info, &p->error_info, 2317 err |= copy_in_user(&arg32->error_info, &p->error_info,
@@ -2230,7 +2348,7 @@ static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2230 if (err) 2348 if (err)
2231 return -EFAULT; 2349 return -EFAULT;
2232 2350
2233 err = do_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p); 2351 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
2234 if (err) 2352 if (err)
2235 return err; 2353 return err;
2236 err |= copy_in_user(&arg32->error_info, &p->error_info, 2354 err |= copy_in_user(&arg32->error_info, &p->error_info,
@@ -2239,6 +2357,36 @@ static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2239 return -EFAULT; 2357 return -EFAULT;
2240 return err; 2358 return err;
2241} 2359}
2360
2361static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2362{
2363 switch (cmd) {
2364 case CCISS_GETPCIINFO:
2365 case CCISS_GETINTINFO:
2366 case CCISS_SETINTINFO:
2367 case CCISS_GETNODENAME:
2368 case CCISS_SETNODENAME:
2369 case CCISS_GETHEARTBEAT:
2370 case CCISS_GETBUSTYPES:
2371 case CCISS_GETFIRMVER:
2372 case CCISS_GETDRIVVER:
2373 case CCISS_REVALIDVOLS:
2374 case CCISS_DEREGDISK:
2375 case CCISS_REGNEWDISK:
2376 case CCISS_REGNEWD:
2377 case CCISS_RESCANDISK:
2378 case CCISS_GETLUNINFO:
2379 return hpsa_ioctl(dev, cmd, arg);
2380
2381 case CCISS_PASSTHRU32:
2382 return hpsa_ioctl32_passthru(dev, cmd, arg);
2383 case CCISS_BIG_PASSTHRU32:
2384 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2385
2386 default:
2387 return -ENOIOCTLCMD;
2388 }
2389}
2242#endif 2390#endif
2243 2391
2244static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 2392static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
@@ -2378,8 +2526,8 @@ static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2378 BYTE sg_used = 0; 2526 BYTE sg_used = 0;
2379 int status = 0; 2527 int status = 0;
2380 int i; 2528 int i;
2381 __u32 left; 2529 u32 left;
2382 __u32 sz; 2530 u32 sz;
2383 BYTE __user *data_ptr; 2531 BYTE __user *data_ptr;
2384 2532
2385 if (!argp) 2533 if (!argp)
@@ -2527,7 +2675,7 @@ static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2527 case CCISS_DEREGDISK: 2675 case CCISS_DEREGDISK:
2528 case CCISS_REGNEWDISK: 2676 case CCISS_REGNEWDISK:
2529 case CCISS_REGNEWD: 2677 case CCISS_REGNEWD:
2530 hpsa_update_scsi_devices(h, dev->host->host_no); 2678 hpsa_scan_start(h->scsi_host);
2531 return 0; 2679 return 0;
2532 case CCISS_GETPCIINFO: 2680 case CCISS_GETPCIINFO:
2533 return hpsa_getpciinfo_ioctl(h, argp); 2681 return hpsa_getpciinfo_ioctl(h, argp);
@@ -2542,8 +2690,8 @@ static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2542 } 2690 }
2543} 2691}
2544 2692
2545static void fill_cmd(struct CommandList *c, __u8 cmd, struct ctlr_info *h, 2693static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2546 void *buff, size_t size, __u8 page_code, unsigned char *scsi3addr, 2694 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
2547 int cmd_type) 2695 int cmd_type)
2548{ 2696{
2549 int pci_dir = XFER_NONE; 2697 int pci_dir = XFER_NONE;
@@ -2710,19 +2858,20 @@ static inline unsigned long get_next_completion(struct ctlr_info *h)
2710 return h->access.command_completed(h); 2858 return h->access.command_completed(h);
2711} 2859}
2712 2860
2713static inline int interrupt_pending(struct ctlr_info *h) 2861static inline bool interrupt_pending(struct ctlr_info *h)
2714{ 2862{
2715 return h->access.intr_pending(h); 2863 return h->access.intr_pending(h);
2716} 2864}
2717 2865
2718static inline long interrupt_not_for_us(struct ctlr_info *h) 2866static inline long interrupt_not_for_us(struct ctlr_info *h)
2719{ 2867{
2720 return ((h->access.intr_pending(h) == 0) || 2868 return !(h->msi_vector || h->msix_vector) &&
2721 (h->interrupts_enabled == 0)); 2869 ((h->access.intr_pending(h) == 0) ||
2870 (h->interrupts_enabled == 0));
2722} 2871}
2723 2872
2724static inline int bad_tag(struct ctlr_info *h, __u32 tag_index, 2873static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2725 __u32 raw_tag) 2874 u32 raw_tag)
2726{ 2875{
2727 if (unlikely(tag_index >= h->nr_cmds)) { 2876 if (unlikely(tag_index >= h->nr_cmds)) {
2728 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 2877 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
@@ -2731,7 +2880,7 @@ static inline int bad_tag(struct ctlr_info *h, __u32 tag_index,
2731 return 0; 2880 return 0;
2732} 2881}
2733 2882
2734static inline void finish_cmd(struct CommandList *c, __u32 raw_tag) 2883static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
2735{ 2884{
2736 removeQ(c); 2885 removeQ(c);
2737 if (likely(c->cmd_type == CMD_SCSI)) 2886 if (likely(c->cmd_type == CMD_SCSI))
@@ -2740,42 +2889,79 @@ static inline void finish_cmd(struct CommandList *c, __u32 raw_tag)
2740 complete(c->waiting); 2889 complete(c->waiting);
2741} 2890}
2742 2891
2892static inline u32 hpsa_tag_contains_index(u32 tag)
2893{
2894#define DIRECT_LOOKUP_BIT 0x10
2895 return tag & DIRECT_LOOKUP_BIT;
2896}
2897
2898static inline u32 hpsa_tag_to_index(u32 tag)
2899{
2900#define DIRECT_LOOKUP_SHIFT 5
2901 return tag >> DIRECT_LOOKUP_SHIFT;
2902}
2903
2904static inline u32 hpsa_tag_discard_error_bits(u32 tag)
2905{
2906#define HPSA_ERROR_BITS 0x03
2907 return tag & ~HPSA_ERROR_BITS;
2908}
2909
2910/* process completion of an indexed ("direct lookup") command */
2911static inline u32 process_indexed_cmd(struct ctlr_info *h,
2912 u32 raw_tag)
2913{
2914 u32 tag_index;
2915 struct CommandList *c;
2916
2917 tag_index = hpsa_tag_to_index(raw_tag);
2918 if (bad_tag(h, tag_index, raw_tag))
2919 return next_command(h);
2920 c = h->cmd_pool + tag_index;
2921 finish_cmd(c, raw_tag);
2922 return next_command(h);
2923}
2924
2925/* process completion of a non-indexed command */
2926static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
2927 u32 raw_tag)
2928{
2929 u32 tag;
2930 struct CommandList *c = NULL;
2931 struct hlist_node *tmp;
2932
2933 tag = hpsa_tag_discard_error_bits(raw_tag);
2934 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
2935 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
2936 finish_cmd(c, raw_tag);
2937 return next_command(h);
2938 }
2939 }
2940 bad_tag(h, h->nr_cmds + 1, raw_tag);
2941 return next_command(h);
2942}
2943
2743static irqreturn_t do_hpsa_intr(int irq, void *dev_id) 2944static irqreturn_t do_hpsa_intr(int irq, void *dev_id)
2744{ 2945{
2745 struct ctlr_info *h = dev_id; 2946 struct ctlr_info *h = dev_id;
2746 struct CommandList *c;
2747 unsigned long flags; 2947 unsigned long flags;
2748 __u32 raw_tag, tag, tag_index; 2948 u32 raw_tag;
2749 struct hlist_node *tmp;
2750 2949
2751 if (interrupt_not_for_us(h)) 2950 if (interrupt_not_for_us(h))
2752 return IRQ_NONE; 2951 return IRQ_NONE;
2753 spin_lock_irqsave(&h->lock, flags); 2952 spin_lock_irqsave(&h->lock, flags);
2754 while (interrupt_pending(h)) { 2953 raw_tag = get_next_completion(h);
2755 while ((raw_tag = get_next_completion(h)) != FIFO_EMPTY) { 2954 while (raw_tag != FIFO_EMPTY) {
2756 if (likely(HPSA_TAG_CONTAINS_INDEX(raw_tag))) { 2955 if (hpsa_tag_contains_index(raw_tag))
2757 tag_index = HPSA_TAG_TO_INDEX(raw_tag); 2956 raw_tag = process_indexed_cmd(h, raw_tag);
2758 if (bad_tag(h, tag_index, raw_tag)) 2957 else
2759 return IRQ_HANDLED; 2958 raw_tag = process_nonindexed_cmd(h, raw_tag);
2760 c = h->cmd_pool + tag_index;
2761 finish_cmd(c, raw_tag);
2762 continue;
2763 }
2764 tag = HPSA_TAG_DISCARD_ERROR_BITS(raw_tag);
2765 c = NULL;
2766 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
2767 if (c->busaddr == tag) {
2768 finish_cmd(c, raw_tag);
2769 break;
2770 }
2771 }
2772 }
2773 } 2959 }
2774 spin_unlock_irqrestore(&h->lock, flags); 2960 spin_unlock_irqrestore(&h->lock, flags);
2775 return IRQ_HANDLED; 2961 return IRQ_HANDLED;
2776} 2962}
2777 2963
2778/* Send a message CDB to the firmware. */ 2964/* Send a message CDB to the firmwart. */
2779static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 2965static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
2780 unsigned char type) 2966 unsigned char type)
2781{ 2967{
@@ -2841,7 +3027,7 @@ static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
2841 3027
2842 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 3028 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
2843 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 3029 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
2844 if (HPSA_TAG_DISCARD_ERROR_BITS(tag) == paddr32) 3030 if (hpsa_tag_discard_error_bits(tag) == paddr32)
2845 break; 3031 break;
2846 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 3032 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
2847 } 3033 }
@@ -3063,7 +3249,7 @@ static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3063 */ 3249 */
3064 3250
3065static void __devinit hpsa_interrupt_mode(struct ctlr_info *h, 3251static void __devinit hpsa_interrupt_mode(struct ctlr_info *h,
3066 struct pci_dev *pdev, __u32 board_id) 3252 struct pci_dev *pdev, u32 board_id)
3067{ 3253{
3068#ifdef CONFIG_PCI_MSI 3254#ifdef CONFIG_PCI_MSI
3069 int err; 3255 int err;
@@ -3107,22 +3293,22 @@ static void __devinit hpsa_interrupt_mode(struct ctlr_info *h,
3107default_int_mode: 3293default_int_mode:
3108#endif /* CONFIG_PCI_MSI */ 3294#endif /* CONFIG_PCI_MSI */
3109 /* if we get here we're going to use the default interrupt mode */ 3295 /* if we get here we're going to use the default interrupt mode */
3110 h->intr[SIMPLE_MODE_INT] = pdev->irq; 3296 h->intr[PERF_MODE_INT] = pdev->irq;
3111 return;
3112} 3297}
3113 3298
3114static int hpsa_pci_init(struct ctlr_info *h, struct pci_dev *pdev) 3299static int hpsa_pci_init(struct ctlr_info *h, struct pci_dev *pdev)
3115{ 3300{
3116 ushort subsystem_vendor_id, subsystem_device_id, command; 3301 ushort subsystem_vendor_id, subsystem_device_id, command;
3117 __u32 board_id, scratchpad = 0; 3302 u32 board_id, scratchpad = 0;
3118 __u64 cfg_offset; 3303 u64 cfg_offset;
3119 __u32 cfg_base_addr; 3304 u32 cfg_base_addr;
3120 __u64 cfg_base_addr_index; 3305 u64 cfg_base_addr_index;
3306 u32 trans_offset;
3121 int i, prod_index, err; 3307 int i, prod_index, err;
3122 3308
3123 subsystem_vendor_id = pdev->subsystem_vendor; 3309 subsystem_vendor_id = pdev->subsystem_vendor;
3124 subsystem_device_id = pdev->subsystem_device; 3310 subsystem_device_id = pdev->subsystem_device;
3125 board_id = (((__u32) (subsystem_device_id << 16) & 0xffff0000) | 3311 board_id = (((u32) (subsystem_device_id << 16) & 0xffff0000) |
3126 subsystem_vendor_id); 3312 subsystem_vendor_id);
3127 3313
3128 for (i = 0; i < ARRAY_SIZE(products); i++) 3314 for (i = 0; i < ARRAY_SIZE(products); i++)
@@ -3199,7 +3385,7 @@ static int hpsa_pci_init(struct ctlr_info *h, struct pci_dev *pdev)
3199 3385
3200 /* get the address index number */ 3386 /* get the address index number */
3201 cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET); 3387 cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET);
3202 cfg_base_addr &= (__u32) 0x0000ffff; 3388 cfg_base_addr &= (u32) 0x0000ffff;
3203 cfg_base_addr_index = find_PCI_BAR_index(pdev, cfg_base_addr); 3389 cfg_base_addr_index = find_PCI_BAR_index(pdev, cfg_base_addr);
3204 if (cfg_base_addr_index == -1) { 3390 if (cfg_base_addr_index == -1) {
3205 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 3391 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
@@ -3211,11 +3397,14 @@ static int hpsa_pci_init(struct ctlr_info *h, struct pci_dev *pdev)
3211 h->cfgtable = remap_pci_mem(pci_resource_start(pdev, 3397 h->cfgtable = remap_pci_mem(pci_resource_start(pdev,
3212 cfg_base_addr_index) + cfg_offset, 3398 cfg_base_addr_index) + cfg_offset,
3213 sizeof(h->cfgtable)); 3399 sizeof(h->cfgtable));
3214 h->board_id = board_id; 3400 /* Find performant mode table. */
3215 3401 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3216 /* Query controller for max supported commands: */ 3402 h->transtable = remap_pci_mem(pci_resource_start(pdev,
3217 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 3403 cfg_base_addr_index)+cfg_offset+trans_offset,
3404 sizeof(*h->transtable));
3218 3405
3406 h->board_id = board_id;
3407 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
3219 h->product_name = products[prod_index].product_name; 3408 h->product_name = products[prod_index].product_name;
3220 h->access = *(products[prod_index].access); 3409 h->access = *(products[prod_index].access);
3221 /* Allow room for some ioctls */ 3410 /* Allow room for some ioctls */
@@ -3232,7 +3421,7 @@ static int hpsa_pci_init(struct ctlr_info *h, struct pci_dev *pdev)
3232#ifdef CONFIG_X86 3421#ifdef CONFIG_X86
3233 { 3422 {
3234 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 3423 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
3235 __u32 prefetch; 3424 u32 prefetch;
3236 prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); 3425 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3237 prefetch |= 0x100; 3426 prefetch |= 0x100;
3238 writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); 3427 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
@@ -3244,7 +3433,7 @@ static int hpsa_pci_init(struct ctlr_info *h, struct pci_dev *pdev)
3244 * physical memory. 3433 * physical memory.
3245 */ 3434 */
3246 if (board_id == 0x3225103C) { 3435 if (board_id == 0x3225103C) {
3247 __u32 dma_prefetch; 3436 u32 dma_prefetch;
3248 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 3437 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3249 dma_prefetch |= 0x8000; 3438 dma_prefetch |= 0x8000;
3250 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 3439 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
@@ -3286,10 +3475,26 @@ err_out_free_res:
3286 return err; 3475 return err;
3287} 3476}
3288 3477
3478static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3479{
3480 int rc;
3481
3482#define HBA_INQUIRY_BYTE_COUNT 64
3483 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3484 if (!h->hba_inquiry_data)
3485 return;
3486 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3487 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3488 if (rc != 0) {
3489 kfree(h->hba_inquiry_data);
3490 h->hba_inquiry_data = NULL;
3491 }
3492}
3493
3289static int __devinit hpsa_init_one(struct pci_dev *pdev, 3494static int __devinit hpsa_init_one(struct pci_dev *pdev,
3290 const struct pci_device_id *ent) 3495 const struct pci_device_id *ent)
3291{ 3496{
3292 int i; 3497 int i, rc;
3293 int dac; 3498 int dac;
3294 struct ctlr_info *h; 3499 struct ctlr_info *h;
3295 3500
@@ -3314,17 +3519,23 @@ static int __devinit hpsa_init_one(struct pci_dev *pdev,
3314 } 3519 }
3315 } 3520 }
3316 3521
3317 BUILD_BUG_ON(sizeof(struct CommandList) % 8); 3522 /* Command structures must be aligned on a 32-byte boundary because
3523 * the 5 lower bits of the address are used by the hardware. and by
3524 * the driver. See comments in hpsa.h for more info.
3525 */
3526#define COMMANDLIST_ALIGNMENT 32
3527 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
3318 h = kzalloc(sizeof(*h), GFP_KERNEL); 3528 h = kzalloc(sizeof(*h), GFP_KERNEL);
3319 if (!h) 3529 if (!h)
3320 return -1; 3530 return -ENOMEM;
3321 3531
3322 h->busy_initializing = 1; 3532 h->busy_initializing = 1;
3323 INIT_HLIST_HEAD(&h->cmpQ); 3533 INIT_HLIST_HEAD(&h->cmpQ);
3324 INIT_HLIST_HEAD(&h->reqQ); 3534 INIT_HLIST_HEAD(&h->reqQ);
3325 mutex_init(&h->busy_shutting_down); 3535 mutex_init(&h->busy_shutting_down);
3326 init_completion(&h->scan_wait); 3536 init_completion(&h->scan_wait);
3327 if (hpsa_pci_init(h, pdev) != 0) 3537 rc = hpsa_pci_init(h, pdev);
3538 if (rc != 0)
3328 goto clean1; 3539 goto clean1;
3329 3540
3330 sprintf(h->devname, "hpsa%d", number_of_controllers); 3541 sprintf(h->devname, "hpsa%d", number_of_controllers);
@@ -3333,27 +3544,32 @@ static int __devinit hpsa_init_one(struct pci_dev *pdev,
3333 h->pdev = pdev; 3544 h->pdev = pdev;
3334 3545
3335 /* configure PCI DMA stuff */ 3546 /* configure PCI DMA stuff */
3336 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) 3547 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
3548 if (rc == 0) {
3337 dac = 1; 3549 dac = 1;
3338 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) 3550 } else {
3339 dac = 0; 3551 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3340 else { 3552 if (rc == 0) {
3341 dev_err(&pdev->dev, "no suitable DMA available\n"); 3553 dac = 0;
3342 goto clean1; 3554 } else {
3555 dev_err(&pdev->dev, "no suitable DMA available\n");
3556 goto clean1;
3557 }
3343 } 3558 }
3344 3559
3345 /* make sure the board interrupts are off */ 3560 /* make sure the board interrupts are off */
3346 h->access.set_intr_mask(h, HPSA_INTR_OFF); 3561 h->access.set_intr_mask(h, HPSA_INTR_OFF);
3347 if (request_irq(h->intr[SIMPLE_MODE_INT], do_hpsa_intr, 3562 rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr,
3348 IRQF_DISABLED | IRQF_SHARED, h->devname, h)) { 3563 IRQF_DISABLED, h->devname, h);
3564 if (rc) {
3349 dev_err(&pdev->dev, "unable to get irq %d for %s\n", 3565 dev_err(&pdev->dev, "unable to get irq %d for %s\n",
3350 h->intr[SIMPLE_MODE_INT], h->devname); 3566 h->intr[PERF_MODE_INT], h->devname);
3351 goto clean2; 3567 goto clean2;
3352 } 3568 }
3353 3569
3354 dev_info(&pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n", 3570 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
3355 h->devname, pdev->device, pci_name(pdev), 3571 h->devname, pdev->device,
3356 h->intr[SIMPLE_MODE_INT], dac ? "" : " not"); 3572 h->intr[PERF_MODE_INT], dac ? "" : " not");
3357 3573
3358 h->cmd_pool_bits = 3574 h->cmd_pool_bits =
3359 kmalloc(((h->nr_cmds + BITS_PER_LONG - 3575 kmalloc(((h->nr_cmds + BITS_PER_LONG -
@@ -3368,9 +3584,13 @@ static int __devinit hpsa_init_one(struct pci_dev *pdev,
3368 || (h->cmd_pool == NULL) 3584 || (h->cmd_pool == NULL)
3369 || (h->errinfo_pool == NULL)) { 3585 || (h->errinfo_pool == NULL)) {
3370 dev_err(&pdev->dev, "out of memory"); 3586 dev_err(&pdev->dev, "out of memory");
3587 rc = -ENOMEM;
3371 goto clean4; 3588 goto clean4;
3372 } 3589 }
3373 spin_lock_init(&h->lock); 3590 spin_lock_init(&h->lock);
3591 spin_lock_init(&h->scan_lock);
3592 init_waitqueue_head(&h->scan_wait_queue);
3593 h->scan_finished = 1; /* no scan currently in progress */
3374 3594
3375 pci_set_drvdata(pdev, h); 3595 pci_set_drvdata(pdev, h);
3376 memset(h->cmd_pool_bits, 0, 3596 memset(h->cmd_pool_bits, 0,
@@ -3382,6 +3602,8 @@ static int __devinit hpsa_init_one(struct pci_dev *pdev,
3382 /* Turn the interrupts on so we can service requests */ 3602 /* Turn the interrupts on so we can service requests */
3383 h->access.set_intr_mask(h, HPSA_INTR_ON); 3603 h->access.set_intr_mask(h, HPSA_INTR_ON);
3384 3604
3605 hpsa_put_ctlr_into_performant_mode(h);
3606 hpsa_hba_inquiry(h);
3385 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ 3607 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
3386 h->busy_initializing = 0; 3608 h->busy_initializing = 0;
3387 return 1; 3609 return 1;
@@ -3397,12 +3619,12 @@ clean4:
3397 h->nr_cmds * sizeof(struct ErrorInfo), 3619 h->nr_cmds * sizeof(struct ErrorInfo),
3398 h->errinfo_pool, 3620 h->errinfo_pool,
3399 h->errinfo_pool_dhandle); 3621 h->errinfo_pool_dhandle);
3400 free_irq(h->intr[SIMPLE_MODE_INT], h); 3622 free_irq(h->intr[PERF_MODE_INT], h);
3401clean2: 3623clean2:
3402clean1: 3624clean1:
3403 h->busy_initializing = 0; 3625 h->busy_initializing = 0;
3404 kfree(h); 3626 kfree(h);
3405 return -1; 3627 return rc;
3406} 3628}
3407 3629
3408static void hpsa_flush_cache(struct ctlr_info *h) 3630static void hpsa_flush_cache(struct ctlr_info *h)
@@ -3441,7 +3663,7 @@ static void hpsa_shutdown(struct pci_dev *pdev)
3441 */ 3663 */
3442 hpsa_flush_cache(h); 3664 hpsa_flush_cache(h);
3443 h->access.set_intr_mask(h, HPSA_INTR_OFF); 3665 h->access.set_intr_mask(h, HPSA_INTR_OFF);
3444 free_irq(h->intr[2], h); 3666 free_irq(h->intr[PERF_MODE_INT], h);
3445#ifdef CONFIG_PCI_MSI 3667#ifdef CONFIG_PCI_MSI
3446 if (h->msix_vector) 3668 if (h->msix_vector)
3447 pci_disable_msix(h->pdev); 3669 pci_disable_msix(h->pdev);
@@ -3470,7 +3692,11 @@ static void __devexit hpsa_remove_one(struct pci_dev *pdev)
3470 pci_free_consistent(h->pdev, 3692 pci_free_consistent(h->pdev,
3471 h->nr_cmds * sizeof(struct ErrorInfo), 3693 h->nr_cmds * sizeof(struct ErrorInfo),
3472 h->errinfo_pool, h->errinfo_pool_dhandle); 3694 h->errinfo_pool, h->errinfo_pool_dhandle);
3695 pci_free_consistent(h->pdev, h->reply_pool_size,
3696 h->reply_pool, h->reply_pool_dhandle);
3473 kfree(h->cmd_pool_bits); 3697 kfree(h->cmd_pool_bits);
3698 kfree(h->blockFetchTable);
3699 kfree(h->hba_inquiry_data);
3474 /* 3700 /*
3475 * Deliberately omit pci_disable_device(): it does something nasty to 3701 * Deliberately omit pci_disable_device(): it does something nasty to
3476 * Smart Array controllers that pci_enable_device does not undo 3702 * Smart Array controllers that pci_enable_device does not undo
@@ -3502,6 +3728,129 @@ static struct pci_driver hpsa_pci_driver = {
3502 .resume = hpsa_resume, 3728 .resume = hpsa_resume,
3503}; 3729};
3504 3730
3731/* Fill in bucket_map[], given nsgs (the max number of
3732 * scatter gather elements supported) and bucket[],
3733 * which is an array of 8 integers. The bucket[] array
3734 * contains 8 different DMA transfer sizes (in 16
3735 * byte increments) which the controller uses to fetch
3736 * commands. This function fills in bucket_map[], which
3737 * maps a given number of scatter gather elements to one of
3738 * the 8 DMA transfer sizes. The point of it is to allow the
3739 * controller to only do as much DMA as needed to fetch the
3740 * command, with the DMA transfer size encoded in the lower
3741 * bits of the command address.
3742 */
3743static void calc_bucket_map(int bucket[], int num_buckets,
3744 int nsgs, int *bucket_map)
3745{
3746 int i, j, b, size;
3747
3748 /* even a command with 0 SGs requires 4 blocks */
3749#define MINIMUM_TRANSFER_BLOCKS 4
3750#define NUM_BUCKETS 8
3751 /* Note, bucket_map must have nsgs+1 entries. */
3752 for (i = 0; i <= nsgs; i++) {
3753 /* Compute size of a command with i SG entries */
3754 size = i + MINIMUM_TRANSFER_BLOCKS;
3755 b = num_buckets; /* Assume the biggest bucket */
3756 /* Find the bucket that is just big enough */
3757 for (j = 0; j < 8; j++) {
3758 if (bucket[j] >= size) {
3759 b = j;
3760 break;
3761 }
3762 }
3763 /* for a command with i SG entries, use bucket b. */
3764 bucket_map[i] = b;
3765 }
3766}
3767
3768static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
3769{
3770 u32 trans_support;
3771 u64 trans_offset;
3772 /* 5 = 1 s/g entry or 4k
3773 * 6 = 2 s/g entry or 8k
3774 * 8 = 4 s/g entry or 16k
3775 * 10 = 6 s/g entry or 24k
3776 */
3777 int bft[8] = {5, 6, 8, 10, 12, 20, 28, 35}; /* for scatter/gathers */
3778 int i = 0;
3779 int l = 0;
3780 unsigned long register_value;
3781
3782 trans_support = readl(&(h->cfgtable->TransportSupport));
3783 if (!(trans_support & PERFORMANT_MODE))
3784 return;
3785
3786 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
3787 h->max_sg_entries = 32;
3788 /* Performant mode ring buffer and supporting data structures */
3789 h->reply_pool_size = h->max_commands * sizeof(u64);
3790 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
3791 &(h->reply_pool_dhandle));
3792
3793 /* Need a block fetch table for performant mode */
3794 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
3795 sizeof(u32)), GFP_KERNEL);
3796
3797 if ((h->reply_pool == NULL)
3798 || (h->blockFetchTable == NULL))
3799 goto clean_up;
3800
3801 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3802
3803 /* Controller spec: zero out this buffer. */
3804 memset(h->reply_pool, 0, h->reply_pool_size);
3805 h->reply_pool_head = h->reply_pool;
3806
3807 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3808 bft[7] = h->max_sg_entries + 4;
3809 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
3810 for (i = 0; i < 8; i++)
3811 writel(bft[i], &h->transtable->BlockFetch[i]);
3812
3813 /* size of controller ring buffer */
3814 writel(h->max_commands, &h->transtable->RepQSize);
3815 writel(1, &h->transtable->RepQCount);
3816 writel(0, &h->transtable->RepQCtrAddrLow32);
3817 writel(0, &h->transtable->RepQCtrAddrHigh32);
3818 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3819 writel(0, &h->transtable->RepQAddr0High32);
3820 writel(CFGTBL_Trans_Performant,
3821 &(h->cfgtable->HostWrite.TransportRequest));
3822 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3823 /* under certain very rare conditions, this can take awhile.
3824 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3825 * as we enter this code.) */
3826 for (l = 0; l < MAX_CONFIG_WAIT; l++) {
3827 register_value = readl(h->vaddr + SA5_DOORBELL);
3828 if (!(register_value & CFGTBL_ChangeReq))
3829 break;
3830 /* delay and try again */
3831 set_current_state(TASK_INTERRUPTIBLE);
3832 schedule_timeout(10);
3833 }
3834 register_value = readl(&(h->cfgtable->TransportActive));
3835 if (!(register_value & CFGTBL_Trans_Performant)) {
3836 dev_warn(&h->pdev->dev, "unable to get board into"
3837 " performant mode\n");
3838 return;
3839 }
3840
3841 /* Change the access methods to the performant access methods */
3842 h->access = SA5_performant_access;
3843 h->transMethod = CFGTBL_Trans_Performant;
3844
3845 return;
3846
3847clean_up:
3848 if (h->reply_pool)
3849 pci_free_consistent(h->pdev, h->reply_pool_size,
3850 h->reply_pool, h->reply_pool_dhandle);
3851 kfree(h->blockFetchTable);
3852}
3853
3505/* 3854/*
3506 * This is it. Register the PCI driver information for the cards we control 3855 * This is it. Register the PCI driver information for the cards we control
3507 * the OS will call our registered routines when it finds one of our cards. 3856 * the OS will call our registered routines when it finds one of our cards.
diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h
index 6bd1949144b5..a0502b3ac17e 100644
--- a/drivers/scsi/hpsa.h
+++ b/drivers/scsi/hpsa.h
@@ -33,7 +33,7 @@ struct access_method {
33 struct CommandList *c); 33 struct CommandList *c);
34 void (*set_intr_mask)(struct ctlr_info *h, unsigned long val); 34 void (*set_intr_mask)(struct ctlr_info *h, unsigned long val);
35 unsigned long (*fifo_full)(struct ctlr_info *h); 35 unsigned long (*fifo_full)(struct ctlr_info *h);
36 unsigned long (*intr_pending)(struct ctlr_info *h); 36 bool (*intr_pending)(struct ctlr_info *h);
37 unsigned long (*command_completed)(struct ctlr_info *h); 37 unsigned long (*command_completed)(struct ctlr_info *h);
38}; 38};
39 39
@@ -55,19 +55,20 @@ struct ctlr_info {
55 char *product_name; 55 char *product_name;
56 char firm_ver[4]; /* Firmware version */ 56 char firm_ver[4]; /* Firmware version */
57 struct pci_dev *pdev; 57 struct pci_dev *pdev;
58 __u32 board_id; 58 u32 board_id;
59 void __iomem *vaddr; 59 void __iomem *vaddr;
60 unsigned long paddr; 60 unsigned long paddr;
61 int nr_cmds; /* Number of commands allowed on this controller */ 61 int nr_cmds; /* Number of commands allowed on this controller */
62 struct CfgTable __iomem *cfgtable; 62 struct CfgTable __iomem *cfgtable;
63 int max_sg_entries;
63 int interrupts_enabled; 64 int interrupts_enabled;
64 int major; 65 int major;
65 int max_commands; 66 int max_commands;
66 int commands_outstanding; 67 int commands_outstanding;
67 int max_outstanding; /* Debug */ 68 int max_outstanding; /* Debug */
68 int usage_count; /* number of opens all all minor devices */ 69 int usage_count; /* number of opens all all minor devices */
69# define DOORBELL_INT 0 70# define PERF_MODE_INT 0
70# define PERF_MODE_INT 1 71# define DOORBELL_INT 1
71# define SIMPLE_MODE_INT 2 72# define SIMPLE_MODE_INT 2
72# define MEMQ_MODE_INT 3 73# define MEMQ_MODE_INT 3
73 unsigned int intr[4]; 74 unsigned int intr[4];
@@ -93,6 +94,9 @@ struct ctlr_info {
93 int nr_frees; 94 int nr_frees;
94 int busy_initializing; 95 int busy_initializing;
95 int busy_scanning; 96 int busy_scanning;
97 int scan_finished;
98 spinlock_t scan_lock;
99 wait_queue_head_t scan_wait_queue;
96 struct mutex busy_shutting_down; 100 struct mutex busy_shutting_down;
97 struct list_head scan_list; 101 struct list_head scan_list;
98 struct completion scan_wait; 102 struct completion scan_wait;
@@ -102,6 +106,24 @@ struct ctlr_info {
102 int ndevices; /* number of used elements in .dev[] array. */ 106 int ndevices; /* number of used elements in .dev[] array. */
103#define HPSA_MAX_SCSI_DEVS_PER_HBA 256 107#define HPSA_MAX_SCSI_DEVS_PER_HBA 256
104 struct hpsa_scsi_dev_t *dev[HPSA_MAX_SCSI_DEVS_PER_HBA]; 108 struct hpsa_scsi_dev_t *dev[HPSA_MAX_SCSI_DEVS_PER_HBA];
109 /*
110 * Performant mode tables.
111 */
112 u32 trans_support;
113 u32 trans_offset;
114 struct TransTable_struct *transtable;
115 unsigned long transMethod;
116
117 /*
118 * Performant mode completion buffer
119 */
120 u64 *reply_pool;
121 dma_addr_t reply_pool_dhandle;
122 u64 *reply_pool_head;
123 size_t reply_pool_size;
124 unsigned char reply_pool_wraparound;
125 u32 *blockFetchTable;
126 unsigned char *hba_inquiry_data;
105}; 127};
106#define HPSA_ABORT_MSG 0 128#define HPSA_ABORT_MSG 0
107#define HPSA_DEVICE_RESET_MSG 1 129#define HPSA_DEVICE_RESET_MSG 1
@@ -164,9 +186,16 @@ struct ctlr_info {
164#define HPSA_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */ 186#define HPSA_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
165 187
166#define HPSA_ERROR_BIT 0x02 188#define HPSA_ERROR_BIT 0x02
167#define HPSA_TAG_CONTAINS_INDEX(tag) ((tag) & 0x04) 189
168#define HPSA_TAG_TO_INDEX(tag) ((tag) >> 3) 190/* Performant mode flags */
169#define HPSA_TAG_DISCARD_ERROR_BITS(tag) ((tag) & ~3) 191#define SA5_PERF_INTR_PENDING 0x04
192#define SA5_PERF_INTR_OFF 0x05
193#define SA5_OUTDB_STATUS_PERF_BIT 0x01
194#define SA5_OUTDB_CLEAR_PERF_BIT 0x01
195#define SA5_OUTDB_CLEAR 0xA0
196#define SA5_OUTDB_CLEAR_PERF_BIT 0x01
197#define SA5_OUTDB_STATUS 0x9C
198
170 199
171#define HPSA_INTR_ON 1 200#define HPSA_INTR_ON 1
172#define HPSA_INTR_OFF 0 201#define HPSA_INTR_OFF 0
@@ -176,10 +205,8 @@ struct ctlr_info {
176static void SA5_submit_command(struct ctlr_info *h, 205static void SA5_submit_command(struct ctlr_info *h,
177 struct CommandList *c) 206 struct CommandList *c)
178{ 207{
179#ifdef HPSA_DEBUG 208 dev_dbg(&h->pdev->dev, "Sending %x, tag = %x\n", c->busaddr,
180 printk(KERN_WARNING "hpsa: Sending %x - down to controller\n", 209 c->Header.Tag.lower);
181 c->busaddr);
182#endif /* HPSA_DEBUG */
183 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 210 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
184 h->commands_outstanding++; 211 h->commands_outstanding++;
185 if (h->commands_outstanding > h->max_outstanding) 212 if (h->commands_outstanding > h->max_outstanding)
@@ -202,6 +229,52 @@ static void SA5_intr_mask(struct ctlr_info *h, unsigned long val)
202 h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 229 h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
203 } 230 }
204} 231}
232
233static void SA5_performant_intr_mask(struct ctlr_info *h, unsigned long val)
234{
235 if (val) { /* turn on interrupts */
236 h->interrupts_enabled = 1;
237 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
238 } else {
239 h->interrupts_enabled = 0;
240 writel(SA5_PERF_INTR_OFF,
241 h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
242 }
243}
244
245static unsigned long SA5_performant_completed(struct ctlr_info *h)
246{
247 unsigned long register_value = FIFO_EMPTY;
248
249 /* flush the controller write of the reply queue by reading
250 * outbound doorbell status register.
251 */
252 register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
253 /* msi auto clears the interrupt pending bit. */
254 if (!(h->msi_vector || h->msix_vector)) {
255 writel(SA5_OUTDB_CLEAR_PERF_BIT, h->vaddr + SA5_OUTDB_CLEAR);
256 /* Do a read in order to flush the write to the controller
257 * (as per spec.)
258 */
259 register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
260 }
261
262 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
263 register_value = *(h->reply_pool_head);
264 (h->reply_pool_head)++;
265 h->commands_outstanding--;
266 } else {
267 register_value = FIFO_EMPTY;
268 }
269 /* Check for wraparound */
270 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
271 h->reply_pool_head = h->reply_pool;
272 h->reply_pool_wraparound ^= 1;
273 }
274
275 return register_value;
276}
277
205/* 278/*
206 * Returns true if fifo is full. 279 * Returns true if fifo is full.
207 * 280 *
@@ -228,10 +301,10 @@ static unsigned long SA5_completed(struct ctlr_info *h)
228 301
229#ifdef HPSA_DEBUG 302#ifdef HPSA_DEBUG
230 if (register_value != FIFO_EMPTY) 303 if (register_value != FIFO_EMPTY)
231 printk(KERN_INFO "hpsa: Read %lx back from board\n", 304 dev_dbg(&h->pdev->dev, "Read %lx back from board\n",
232 register_value); 305 register_value);
233 else 306 else
234 printk(KERN_INFO "hpsa: FIFO Empty read\n"); 307 dev_dbg(&h->pdev->dev, "hpsa: FIFO Empty read\n");
235#endif 308#endif
236 309
237 return register_value; 310 return register_value;
@@ -239,18 +312,28 @@ static unsigned long SA5_completed(struct ctlr_info *h)
239/* 312/*
240 * Returns true if an interrupt is pending.. 313 * Returns true if an interrupt is pending..
241 */ 314 */
242static unsigned long SA5_intr_pending(struct ctlr_info *h) 315static bool SA5_intr_pending(struct ctlr_info *h)
243{ 316{
244 unsigned long register_value = 317 unsigned long register_value =
245 readl(h->vaddr + SA5_INTR_STATUS); 318 readl(h->vaddr + SA5_INTR_STATUS);
246#ifdef HPSA_DEBUG 319 dev_dbg(&h->pdev->dev, "intr_pending %lx\n", register_value);
247 printk(KERN_INFO "hpsa: intr_pending %lx\n", register_value); 320 return register_value & SA5_INTR_PENDING;
248#endif /* HPSA_DEBUG */
249 if (register_value & SA5_INTR_PENDING)
250 return 1;
251 return 0 ;
252} 321}
253 322
323static bool SA5_performant_intr_pending(struct ctlr_info *h)
324{
325 unsigned long register_value = readl(h->vaddr + SA5_INTR_STATUS);
326
327 if (!register_value)
328 return false;
329
330 if (h->msi_vector || h->msix_vector)
331 return true;
332
333 /* Read outbound doorbell to flush */
334 register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
335 return register_value & SA5_OUTDB_STATUS_PERF_BIT;
336}
254 337
255static struct access_method SA5_access = { 338static struct access_method SA5_access = {
256 SA5_submit_command, 339 SA5_submit_command,
@@ -260,14 +343,19 @@ static struct access_method SA5_access = {
260 SA5_completed, 343 SA5_completed,
261}; 344};
262 345
346static struct access_method SA5_performant_access = {
347 SA5_submit_command,
348 SA5_performant_intr_mask,
349 SA5_fifo_full,
350 SA5_performant_intr_pending,
351 SA5_performant_completed,
352};
353
263struct board_type { 354struct board_type {
264 __u32 board_id; 355 u32 board_id;
265 char *product_name; 356 char *product_name;
266 struct access_method *access; 357 struct access_method *access;
267}; 358};
268 359
269
270/* end of old hpsa_scsi.h file */
271
272#endif /* HPSA_H */ 360#endif /* HPSA_H */
273 361
diff --git a/drivers/scsi/hpsa_cmd.h b/drivers/scsi/hpsa_cmd.h
index 12d71387ed9a..3e0abdf76689 100644
--- a/drivers/scsi/hpsa_cmd.h
+++ b/drivers/scsi/hpsa_cmd.h
@@ -101,19 +101,20 @@
101#define CFGTBL_AccCmds 0x00000001l 101#define CFGTBL_AccCmds 0x00000001l
102 102
103#define CFGTBL_Trans_Simple 0x00000002l 103#define CFGTBL_Trans_Simple 0x00000002l
104#define CFGTBL_Trans_Performant 0x00000004l
104 105
105#define CFGTBL_BusType_Ultra2 0x00000001l 106#define CFGTBL_BusType_Ultra2 0x00000001l
106#define CFGTBL_BusType_Ultra3 0x00000002l 107#define CFGTBL_BusType_Ultra3 0x00000002l
107#define CFGTBL_BusType_Fibre1G 0x00000100l 108#define CFGTBL_BusType_Fibre1G 0x00000100l
108#define CFGTBL_BusType_Fibre2G 0x00000200l 109#define CFGTBL_BusType_Fibre2G 0x00000200l
109struct vals32 { 110struct vals32 {
110 __u32 lower; 111 u32 lower;
111 __u32 upper; 112 u32 upper;
112}; 113};
113 114
114union u64bit { 115union u64bit {
115 struct vals32 val32; 116 struct vals32 val32;
116 __u64 val; 117 u64 val;
117}; 118};
118 119
119/* FIXME this is a per controller value (barf!) */ 120/* FIXME this is a per controller value (barf!) */
@@ -126,34 +127,34 @@ union u64bit {
126 127
127#define HPSA_INQUIRY 0x12 128#define HPSA_INQUIRY 0x12
128struct InquiryData { 129struct InquiryData {
129 __u8 data_byte[36]; 130 u8 data_byte[36];
130}; 131};
131 132
132#define HPSA_REPORT_LOG 0xc2 /* Report Logical LUNs */ 133#define HPSA_REPORT_LOG 0xc2 /* Report Logical LUNs */
133#define HPSA_REPORT_PHYS 0xc3 /* Report Physical LUNs */ 134#define HPSA_REPORT_PHYS 0xc3 /* Report Physical LUNs */
134struct ReportLUNdata { 135struct ReportLUNdata {
135 __u8 LUNListLength[4]; 136 u8 LUNListLength[4];
136 __u32 reserved; 137 u32 reserved;
137 __u8 LUN[HPSA_MAX_LUN][8]; 138 u8 LUN[HPSA_MAX_LUN][8];
138}; 139};
139 140
140struct ReportExtendedLUNdata { 141struct ReportExtendedLUNdata {
141 __u8 LUNListLength[4]; 142 u8 LUNListLength[4];
142 __u8 extended_response_flag; 143 u8 extended_response_flag;
143 __u8 reserved[3]; 144 u8 reserved[3];
144 __u8 LUN[HPSA_MAX_LUN][24]; 145 u8 LUN[HPSA_MAX_LUN][24];
145}; 146};
146 147
147struct SenseSubsystem_info { 148struct SenseSubsystem_info {
148 __u8 reserved[36]; 149 u8 reserved[36];
149 __u8 portname[8]; 150 u8 portname[8];
150 __u8 reserved1[1108]; 151 u8 reserved1[1108];
151}; 152};
152 153
153#define HPSA_READ_CAPACITY 0x25 /* Read Capacity */ 154#define HPSA_READ_CAPACITY 0x25 /* Read Capacity */
154struct ReadCapdata { 155struct ReadCapdata {
155 __u8 total_size[4]; /* Total size in blocks */ 156 u8 total_size[4]; /* Total size in blocks */
156 __u8 block_size[4]; /* Size of blocks in bytes */ 157 u8 block_size[4]; /* Size of blocks in bytes */
157}; 158};
158 159
159#if 0 160#if 0
@@ -174,112 +175,131 @@ struct ReadCapdata {
174/* Command List Structure */ 175/* Command List Structure */
175union SCSI3Addr { 176union SCSI3Addr {
176 struct { 177 struct {
177 __u8 Dev; 178 u8 Dev;
178 __u8 Bus:6; 179 u8 Bus:6;
179 __u8 Mode:2; /* b00 */ 180 u8 Mode:2; /* b00 */
180 } PeripDev; 181 } PeripDev;
181 struct { 182 struct {
182 __u8 DevLSB; 183 u8 DevLSB;
183 __u8 DevMSB:6; 184 u8 DevMSB:6;
184 __u8 Mode:2; /* b01 */ 185 u8 Mode:2; /* b01 */
185 } LogDev; 186 } LogDev;
186 struct { 187 struct {
187 __u8 Dev:5; 188 u8 Dev:5;
188 __u8 Bus:3; 189 u8 Bus:3;
189 __u8 Targ:6; 190 u8 Targ:6;
190 __u8 Mode:2; /* b10 */ 191 u8 Mode:2; /* b10 */
191 } LogUnit; 192 } LogUnit;
192}; 193};
193 194
194struct PhysDevAddr { 195struct PhysDevAddr {
195 __u32 TargetId:24; 196 u32 TargetId:24;
196 __u32 Bus:6; 197 u32 Bus:6;
197 __u32 Mode:2; 198 u32 Mode:2;
198 /* 2 level target device addr */ 199 /* 2 level target device addr */
199 union SCSI3Addr Target[2]; 200 union SCSI3Addr Target[2];
200}; 201};
201 202
202struct LogDevAddr { 203struct LogDevAddr {
203 __u32 VolId:30; 204 u32 VolId:30;
204 __u32 Mode:2; 205 u32 Mode:2;
205 __u8 reserved[4]; 206 u8 reserved[4];
206}; 207};
207 208
208union LUNAddr { 209union LUNAddr {
209 __u8 LunAddrBytes[8]; 210 u8 LunAddrBytes[8];
210 union SCSI3Addr SCSI3Lun[4]; 211 union SCSI3Addr SCSI3Lun[4];
211 struct PhysDevAddr PhysDev; 212 struct PhysDevAddr PhysDev;
212 struct LogDevAddr LogDev; 213 struct LogDevAddr LogDev;
213}; 214};
214 215
215struct CommandListHeader { 216struct CommandListHeader {
216 __u8 ReplyQueue; 217 u8 ReplyQueue;
217 __u8 SGList; 218 u8 SGList;
218 __u16 SGTotal; 219 u16 SGTotal;
219 struct vals32 Tag; 220 struct vals32 Tag;
220 union LUNAddr LUN; 221 union LUNAddr LUN;
221}; 222};
222 223
223struct RequestBlock { 224struct RequestBlock {
224 __u8 CDBLen; 225 u8 CDBLen;
225 struct { 226 struct {
226 __u8 Type:3; 227 u8 Type:3;
227 __u8 Attribute:3; 228 u8 Attribute:3;
228 __u8 Direction:2; 229 u8 Direction:2;
229 } Type; 230 } Type;
230 __u16 Timeout; 231 u16 Timeout;
231 __u8 CDB[16]; 232 u8 CDB[16];
232}; 233};
233 234
234struct ErrDescriptor { 235struct ErrDescriptor {
235 struct vals32 Addr; 236 struct vals32 Addr;
236 __u32 Len; 237 u32 Len;
237}; 238};
238 239
239struct SGDescriptor { 240struct SGDescriptor {
240 struct vals32 Addr; 241 struct vals32 Addr;
241 __u32 Len; 242 u32 Len;
242 __u32 Ext; 243 u32 Ext;
243}; 244};
244 245
245union MoreErrInfo { 246union MoreErrInfo {
246 struct { 247 struct {
247 __u8 Reserved[3]; 248 u8 Reserved[3];
248 __u8 Type; 249 u8 Type;
249 __u32 ErrorInfo; 250 u32 ErrorInfo;
250 } Common_Info; 251 } Common_Info;
251 struct { 252 struct {
252 __u8 Reserved[2]; 253 u8 Reserved[2];
253 __u8 offense_size; /* size of offending entry */ 254 u8 offense_size; /* size of offending entry */
254 __u8 offense_num; /* byte # of offense 0-base */ 255 u8 offense_num; /* byte # of offense 0-base */
255 __u32 offense_value; 256 u32 offense_value;
256 } Invalid_Cmd; 257 } Invalid_Cmd;
257}; 258};
258struct ErrorInfo { 259struct ErrorInfo {
259 __u8 ScsiStatus; 260 u8 ScsiStatus;
260 __u8 SenseLen; 261 u8 SenseLen;
261 __u16 CommandStatus; 262 u16 CommandStatus;
262 __u32 ResidualCnt; 263 u32 ResidualCnt;
263 union MoreErrInfo MoreErrInfo; 264 union MoreErrInfo MoreErrInfo;
264 __u8 SenseInfo[SENSEINFOBYTES]; 265 u8 SenseInfo[SENSEINFOBYTES];
265}; 266};
266/* Command types */ 267/* Command types */
267#define CMD_IOCTL_PEND 0x01 268#define CMD_IOCTL_PEND 0x01
268#define CMD_SCSI 0x03 269#define CMD_SCSI 0x03
269 270
271/* This structure needs to be divisible by 32 for new
272 * indexing method and performant mode.
273 */
274#define PAD32 32
275#define PAD64DIFF 0
276#define USEEXTRA ((sizeof(void *) - 4)/4)
277#define PADSIZE (PAD32 + PAD64DIFF * USEEXTRA)
278
279#define DIRECT_LOOKUP_SHIFT 5
280#define DIRECT_LOOKUP_BIT 0x10
281
282#define HPSA_ERROR_BIT 0x02
270struct ctlr_info; /* defined in hpsa.h */ 283struct ctlr_info; /* defined in hpsa.h */
271/* The size of this structure needs to be divisible by 8 284/* The size of this structure needs to be divisible by 32
272 * od on all architectures, because the controller uses 2 285 * on all architectures because low 5 bits of the addresses
273 * lower bits of the address, and the driver uses 1 lower 286 * are used as follows:
274 * bit (3 bits total.) 287 *
288 * bit 0: to device, used to indicate "performant mode" command
289 * from device, indidcates error status.
290 * bit 1-3: to device, indicates block fetch table entry for
291 * reducing DMA in fetching commands from host memory.
292 * bit 4: used to indicate whether tag is "direct lookup" (index),
293 * or a bus address.
275 */ 294 */
295
276struct CommandList { 296struct CommandList {
277 struct CommandListHeader Header; 297 struct CommandListHeader Header;
278 struct RequestBlock Request; 298 struct RequestBlock Request;
279 struct ErrDescriptor ErrDesc; 299 struct ErrDescriptor ErrDesc;
280 struct SGDescriptor SG[MAXSGENTRIES]; 300 struct SGDescriptor SG[MAXSGENTRIES];
281 /* information associated with the command */ 301 /* information associated with the command */
282 __u32 busaddr; /* physical addr of this record */ 302 u32 busaddr; /* physical addr of this record */
283 struct ErrorInfo *err_info; /* pointer to the allocated mem */ 303 struct ErrorInfo *err_info; /* pointer to the allocated mem */
284 struct ctlr_info *h; 304 struct ctlr_info *h;
285 int cmd_type; 305 int cmd_type;
@@ -291,35 +311,63 @@ struct CommandList {
291 struct completion *waiting; 311 struct completion *waiting;
292 int retry_count; 312 int retry_count;
293 void *scsi_cmd; 313 void *scsi_cmd;
314
315/* on 64 bit architectures, to get this to be 32-byte-aligned
316 * it so happens we need no padding, on 32 bit systems,
317 * we need 8 bytes of padding. This does that.
318 */
319#define COMMANDLIST_PAD ((8 - sizeof(long))/4 * 8)
320 u8 pad[COMMANDLIST_PAD];
321
294}; 322};
295 323
296/* Configuration Table Structure */ 324/* Configuration Table Structure */
297struct HostWrite { 325struct HostWrite {
298 __u32 TransportRequest; 326 u32 TransportRequest;
299 __u32 Reserved; 327 u32 Reserved;
300 __u32 CoalIntDelay; 328 u32 CoalIntDelay;
301 __u32 CoalIntCount; 329 u32 CoalIntCount;
302}; 330};
303 331
332#define SIMPLE_MODE 0x02
333#define PERFORMANT_MODE 0x04
334#define MEMQ_MODE 0x08
335
304struct CfgTable { 336struct CfgTable {
305 __u8 Signature[4]; 337 u8 Signature[4];
306 __u32 SpecValence; 338 u32 SpecValence;
307 __u32 TransportSupport; 339 u32 TransportSupport;
308 __u32 TransportActive; 340 u32 TransportActive;
309 struct HostWrite HostWrite; 341 struct HostWrite HostWrite;
310 __u32 CmdsOutMax; 342 u32 CmdsOutMax;
311 __u32 BusTypes; 343 u32 BusTypes;
312 __u32 Reserved; 344 u32 TransMethodOffset;
313 __u8 ServerName[16]; 345 u8 ServerName[16];
314 __u32 HeartBeat; 346 u32 HeartBeat;
315 __u32 SCSI_Prefetch; 347 u32 SCSI_Prefetch;
348 u32 MaxScatterGatherElements;
349 u32 MaxLogicalUnits;
350 u32 MaxPhysicalDevices;
351 u32 MaxPhysicalDrivesPerLogicalUnit;
352 u32 MaxPerformantModeCommands;
353};
354
355#define NUM_BLOCKFETCH_ENTRIES 8
356struct TransTable_struct {
357 u32 BlockFetch[NUM_BLOCKFETCH_ENTRIES];
358 u32 RepQSize;
359 u32 RepQCount;
360 u32 RepQCtrAddrLow32;
361 u32 RepQCtrAddrHigh32;
362 u32 RepQAddr0Low32;
363 u32 RepQAddr0High32;
316}; 364};
317 365
318struct hpsa_pci_info { 366struct hpsa_pci_info {
319 unsigned char bus; 367 unsigned char bus;
320 unsigned char dev_fn; 368 unsigned char dev_fn;
321 unsigned short domain; 369 unsigned short domain;
322 __u32 board_id; 370 u32 board_id;
323}; 371};
324 372
325#pragma pack() 373#pragma pack()
diff --git a/drivers/scsi/ibmmca.c b/drivers/scsi/ibmmca.c
index 9c1e6a5b5af0..9a4b69d4f4eb 100644
--- a/drivers/scsi/ibmmca.c
+++ b/drivers/scsi/ibmmca.c
@@ -2336,7 +2336,7 @@ static int option_setup(char *str)
2336 char *cur = str; 2336 char *cur = str;
2337 int i = 1; 2337 int i = 1;
2338 2338
2339 while (cur && isdigit(*cur) && i <= IM_MAX_HOSTS) { 2339 while (cur && isdigit(*cur) && i < IM_MAX_HOSTS) {
2340 ints[i++] = simple_strtoul(cur, NULL, 0); 2340 ints[i++] = simple_strtoul(cur, NULL, 0);
2341 if ((cur = strchr(cur, ',')) != NULL) 2341 if ((cur = strchr(cur, ',')) != NULL)
2342 cur++; 2342 cur++;
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index e475b7957c2d..e3a18e0ef276 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -40,7 +40,7 @@
40 * (CRQ), which is just a buffer of 16 byte entries in the receiver's 40 * (CRQ), which is just a buffer of 16 byte entries in the receiver's
41 * Senders cannot access the buffer directly, but send messages by 41 * Senders cannot access the buffer directly, but send messages by
42 * making a hypervisor call and passing in the 16 bytes. The hypervisor 42 * making a hypervisor call and passing in the 16 bytes. The hypervisor
43 * puts the message in the next 16 byte space in round-robbin fashion, 43 * puts the message in the next 16 byte space in round-robin fashion,
44 * turns on the high order bit of the message (the valid bit), and 44 * turns on the high order bit of the message (the valid bit), and
45 * generates an interrupt to the receiver (if interrupts are turned on.) 45 * generates an interrupt to the receiver (if interrupts are turned on.)
46 * The receiver just turns off the valid bit when they have copied out 46 * The receiver just turns off the valid bit when they have copied out
diff --git a/drivers/scsi/iscsi_tcp.c b/drivers/scsi/iscsi_tcp.c
index 517da3fd89d3..8a89ba900588 100644
--- a/drivers/scsi/iscsi_tcp.c
+++ b/drivers/scsi/iscsi_tcp.c
@@ -584,9 +584,10 @@ static void iscsi_sw_tcp_conn_stop(struct iscsi_cls_conn *cls_conn, int flag)
584 struct iscsi_conn *conn = cls_conn->dd_data; 584 struct iscsi_conn *conn = cls_conn->dd_data;
585 struct iscsi_tcp_conn *tcp_conn = conn->dd_data; 585 struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
586 struct iscsi_sw_tcp_conn *tcp_sw_conn = tcp_conn->dd_data; 586 struct iscsi_sw_tcp_conn *tcp_sw_conn = tcp_conn->dd_data;
587 struct socket *sock = tcp_sw_conn->sock;
587 588
588 /* userspace may have goofed up and not bound us */ 589 /* userspace may have goofed up and not bound us */
589 if (!tcp_sw_conn->sock) 590 if (!sock)
590 return; 591 return;
591 /* 592 /*
592 * Make sure our recv side is stopped. 593 * Make sure our recv side is stopped.
@@ -597,6 +598,11 @@ static void iscsi_sw_tcp_conn_stop(struct iscsi_cls_conn *cls_conn, int flag)
597 set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_rx); 598 set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_rx);
598 write_unlock_bh(&tcp_sw_conn->sock->sk->sk_callback_lock); 599 write_unlock_bh(&tcp_sw_conn->sock->sk->sk_callback_lock);
599 600
601 if (sock->sk->sk_sleep && waitqueue_active(sock->sk->sk_sleep)) {
602 sock->sk->sk_err = EIO;
603 wake_up_interruptible(sock->sk->sk_sleep);
604 }
605
600 iscsi_conn_stop(cls_conn, flag); 606 iscsi_conn_stop(cls_conn, flag);
601 iscsi_sw_tcp_release_conn(conn); 607 iscsi_sw_tcp_release_conn(conn);
602} 608}
diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c
index c28a712fd4db..703eb6a88790 100644
--- a/drivers/scsi/libiscsi.c
+++ b/drivers/scsi/libiscsi.c
@@ -1919,10 +1919,11 @@ static int iscsi_has_ping_timed_out(struct iscsi_conn *conn)
1919static enum blk_eh_timer_return iscsi_eh_cmd_timed_out(struct scsi_cmnd *sc) 1919static enum blk_eh_timer_return iscsi_eh_cmd_timed_out(struct scsi_cmnd *sc)
1920{ 1920{
1921 enum blk_eh_timer_return rc = BLK_EH_NOT_HANDLED; 1921 enum blk_eh_timer_return rc = BLK_EH_NOT_HANDLED;
1922 struct iscsi_task *task = NULL; 1922 struct iscsi_task *task = NULL, *running_task;
1923 struct iscsi_cls_session *cls_session; 1923 struct iscsi_cls_session *cls_session;
1924 struct iscsi_session *session; 1924 struct iscsi_session *session;
1925 struct iscsi_conn *conn; 1925 struct iscsi_conn *conn;
1926 int i;
1926 1927
1927 cls_session = starget_to_session(scsi_target(sc->device)); 1928 cls_session = starget_to_session(scsi_target(sc->device));
1928 session = cls_session->dd_data; 1929 session = cls_session->dd_data;
@@ -1947,8 +1948,15 @@ static enum blk_eh_timer_return iscsi_eh_cmd_timed_out(struct scsi_cmnd *sc)
1947 } 1948 }
1948 1949
1949 task = (struct iscsi_task *)sc->SCp.ptr; 1950 task = (struct iscsi_task *)sc->SCp.ptr;
1950 if (!task) 1951 if (!task) {
1952 /*
1953 * Raced with completion. Just reset timer, and let it
1954 * complete normally
1955 */
1956 rc = BLK_EH_RESET_TIMER;
1951 goto done; 1957 goto done;
1958 }
1959
1952 /* 1960 /*
1953 * If we have sent (at least queued to the network layer) a pdu or 1961 * If we have sent (at least queued to the network layer) a pdu or
1954 * recvd one for the task since the last timeout ask for 1962 * recvd one for the task since the last timeout ask for
@@ -1956,10 +1964,10 @@ static enum blk_eh_timer_return iscsi_eh_cmd_timed_out(struct scsi_cmnd *sc)
1956 * we can check if it is the task or connection when we send the 1964 * we can check if it is the task or connection when we send the
1957 * nop as a ping. 1965 * nop as a ping.
1958 */ 1966 */
1959 if (time_after_eq(task->last_xfer, task->last_timeout)) { 1967 if (time_after(task->last_xfer, task->last_timeout)) {
1960 ISCSI_DBG_EH(session, "Command making progress. Asking " 1968 ISCSI_DBG_EH(session, "Command making progress. Asking "
1961 "scsi-ml for more time to complete. " 1969 "scsi-ml for more time to complete. "
1962 "Last data recv at %lu. Last timeout was at " 1970 "Last data xfer at %lu. Last timeout was at "
1963 "%lu\n.", task->last_xfer, task->last_timeout); 1971 "%lu\n.", task->last_xfer, task->last_timeout);
1964 task->have_checked_conn = false; 1972 task->have_checked_conn = false;
1965 rc = BLK_EH_RESET_TIMER; 1973 rc = BLK_EH_RESET_TIMER;
@@ -1977,6 +1985,43 @@ static enum blk_eh_timer_return iscsi_eh_cmd_timed_out(struct scsi_cmnd *sc)
1977 goto done; 1985 goto done;
1978 } 1986 }
1979 1987
1988 for (i = 0; i < conn->session->cmds_max; i++) {
1989 running_task = conn->session->cmds[i];
1990 if (!running_task->sc || running_task == task ||
1991 running_task->state != ISCSI_TASK_RUNNING)
1992 continue;
1993
1994 /*
1995 * Only check if cmds started before this one have made
1996 * progress, or this could never fail
1997 */
1998 if (time_after(running_task->sc->jiffies_at_alloc,
1999 task->sc->jiffies_at_alloc))
2000 continue;
2001
2002 if (time_after(running_task->last_xfer, task->last_timeout)) {
2003 /*
2004 * This task has not made progress, but a task
2005 * started before us has transferred data since
2006 * we started/last-checked. We could be queueing
2007 * too many tasks or the LU is bad.
2008 *
2009 * If the device is bad the cmds ahead of us on
2010 * other devs will complete, and this loop will
2011 * eventually fail starting the scsi eh.
2012 */
2013 ISCSI_DBG_EH(session, "Command has not made progress "
2014 "but commands ahead of it have. "
2015 "Asking scsi-ml for more time to "
2016 "complete. Our last xfer vs running task "
2017 "last xfer %lu/%lu. Last check %lu.\n",
2018 task->last_xfer, running_task->last_xfer,
2019 task->last_timeout);
2020 rc = BLK_EH_RESET_TIMER;
2021 goto done;
2022 }
2023 }
2024
1980 /* Assumes nop timeout is shorter than scsi cmd timeout */ 2025 /* Assumes nop timeout is shorter than scsi cmd timeout */
1981 if (task->have_checked_conn) 2026 if (task->have_checked_conn)
1982 goto done; 2027 goto done;
diff --git a/drivers/scsi/libsrp.c b/drivers/scsi/libsrp.c
index ab19b3b4be52..22775165bf6a 100644
--- a/drivers/scsi/libsrp.c
+++ b/drivers/scsi/libsrp.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * SCSI RDAM Protocol lib functions 2 * SCSI RDMA Protocol lib functions
3 * 3 *
4 * Copyright (C) 2006 FUJITA Tomonori <tomof@acm.org> 4 * Copyright (C) 2006 FUJITA Tomonori <tomof@acm.org>
5 * 5 *
@@ -328,7 +328,7 @@ int srp_transfer_data(struct scsi_cmnd *sc, struct srp_cmd *cmd,
328 int offset, err = 0; 328 int offset, err = 0;
329 u8 format; 329 u8 format;
330 330
331 offset = cmd->add_cdb_len * 4; 331 offset = cmd->add_cdb_len & ~3;
332 332
333 dir = srp_cmd_direction(cmd); 333 dir = srp_cmd_direction(cmd);
334 if (dir == DMA_FROM_DEVICE) 334 if (dir == DMA_FROM_DEVICE)
@@ -366,7 +366,7 @@ static int vscsis_data_length(struct srp_cmd *cmd, enum dma_data_direction dir)
366{ 366{
367 struct srp_direct_buf *md; 367 struct srp_direct_buf *md;
368 struct srp_indirect_buf *id; 368 struct srp_indirect_buf *id;
369 int len = 0, offset = cmd->add_cdb_len * 4; 369 int len = 0, offset = cmd->add_cdb_len & ~3;
370 u8 fmt; 370 u8 fmt;
371 371
372 if (dir == DMA_TO_DEVICE) 372 if (dir == DMA_TO_DEVICE)
@@ -440,6 +440,6 @@ int srp_cmd_queue(struct Scsi_Host *shost, struct srp_cmd *cmd, void *info,
440} 440}
441EXPORT_SYMBOL_GPL(srp_cmd_queue); 441EXPORT_SYMBOL_GPL(srp_cmd_queue);
442 442
443MODULE_DESCRIPTION("SCSI RDAM Protocol lib functions"); 443MODULE_DESCRIPTION("SCSI RDMA Protocol lib functions");
444MODULE_AUTHOR("FUJITA Tomonori"); 444MODULE_AUTHOR("FUJITA Tomonori");
445MODULE_LICENSE("GPL"); 445MODULE_LICENSE("GPL");
diff --git a/drivers/scsi/lpfc/lpfc.h b/drivers/scsi/lpfc/lpfc.h
index 1cc23a69db5e..84b696463a58 100644
--- a/drivers/scsi/lpfc/lpfc.h
+++ b/drivers/scsi/lpfc/lpfc.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2009 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2010 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
@@ -315,6 +315,9 @@ struct lpfc_vport {
315#define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */ 315#define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
316#define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */ 316#define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
317#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */ 317#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
318#define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
319#define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
320#define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
318 321
319 uint32_t ct_flags; 322 uint32_t ct_flags;
320#define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */ 323#define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
@@ -448,6 +451,8 @@ struct unsol_rcv_ct_ctx {
448 uint32_t ctxt_id; 451 uint32_t ctxt_id;
449 uint32_t SID; 452 uint32_t SID;
450 uint32_t oxid; 453 uint32_t oxid;
454 uint32_t flags;
455#define UNSOL_VALID 0x00000001
451}; 456};
452 457
453struct lpfc_hba { 458struct lpfc_hba {
@@ -499,6 +504,10 @@ struct lpfc_hba {
499 (struct lpfc_hba *); 504 (struct lpfc_hba *);
500 void (*lpfc_stop_port) 505 void (*lpfc_stop_port)
501 (struct lpfc_hba *); 506 (struct lpfc_hba *);
507 int (*lpfc_hba_init_link)
508 (struct lpfc_hba *);
509 int (*lpfc_hba_down_link)
510 (struct lpfc_hba *);
502 511
503 512
504 /* SLI4 specific HBA data structure */ 513 /* SLI4 specific HBA data structure */
@@ -613,6 +622,7 @@ struct lpfc_hba {
613 uint32_t cfg_enable_bg; 622 uint32_t cfg_enable_bg;
614 uint32_t cfg_log_verbose; 623 uint32_t cfg_log_verbose;
615 uint32_t cfg_aer_support; 624 uint32_t cfg_aer_support;
625 uint32_t cfg_suppress_link_up;
616 626
617 lpfc_vpd_t vpd; /* vital product data */ 627 lpfc_vpd_t vpd; /* vital product data */
618 628
@@ -790,7 +800,7 @@ struct lpfc_hba {
790 uint16_t vlan_id; 800 uint16_t vlan_id;
791 struct list_head fcf_conn_rec_list; 801 struct list_head fcf_conn_rec_list;
792 802
793 struct mutex ct_event_mutex; /* synchronize access to ct_ev_waiters */ 803 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
794 struct list_head ct_ev_waiters; 804 struct list_head ct_ev_waiters;
795 struct unsol_rcv_ct_ctx ct_ctx[64]; 805 struct unsol_rcv_ct_ctx ct_ctx[64];
796 uint32_t ctx_idx; 806 uint32_t ctx_idx;
diff --git a/drivers/scsi/lpfc/lpfc_attr.c b/drivers/scsi/lpfc/lpfc_attr.c
index 91542f786edf..c992e8328f9e 100644
--- a/drivers/scsi/lpfc/lpfc_attr.c
+++ b/drivers/scsi/lpfc/lpfc_attr.c
@@ -482,6 +482,41 @@ lpfc_link_state_show(struct device *dev, struct device_attribute *attr,
482} 482}
483 483
484/** 484/**
485 * lpfc_link_state_store - Transition the link_state on an HBA port
486 * @dev: class device that is converted into a Scsi_host.
487 * @attr: device attribute, not used.
488 * @buf: one or more lpfc_polling_flags values.
489 * @count: not used.
490 *
491 * Returns:
492 * -EINVAL if the buffer is not "up" or "down"
493 * return from link state change function if non-zero
494 * length of the buf on success
495 **/
496static ssize_t
497lpfc_link_state_store(struct device *dev, struct device_attribute *attr,
498 const char *buf, size_t count)
499{
500 struct Scsi_Host *shost = class_to_shost(dev);
501 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
502 struct lpfc_hba *phba = vport->phba;
503
504 int status = -EINVAL;
505
506 if ((strncmp(buf, "up", sizeof("up") - 1) == 0) &&
507 (phba->link_state == LPFC_LINK_DOWN))
508 status = phba->lpfc_hba_init_link(phba);
509 else if ((strncmp(buf, "down", sizeof("down") - 1) == 0) &&
510 (phba->link_state >= LPFC_LINK_UP))
511 status = phba->lpfc_hba_down_link(phba);
512
513 if (status == 0)
514 return strlen(buf);
515 else
516 return status;
517}
518
519/**
485 * lpfc_num_discovered_ports_show - Return sum of mapped and unmapped vports 520 * lpfc_num_discovered_ports_show - Return sum of mapped and unmapped vports
486 * @dev: class device that is converted into a Scsi_host. 521 * @dev: class device that is converted into a Scsi_host.
487 * @attr: device attribute, not used. 522 * @attr: device attribute, not used.
@@ -1219,7 +1254,7 @@ lpfc_##attr##_show(struct device *dev, struct device_attribute *attr, \
1219 struct Scsi_Host *shost = class_to_shost(dev);\ 1254 struct Scsi_Host *shost = class_to_shost(dev);\
1220 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\ 1255 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\
1221 struct lpfc_hba *phba = vport->phba;\ 1256 struct lpfc_hba *phba = vport->phba;\
1222 int val = 0;\ 1257 uint val = 0;\
1223 val = phba->cfg_##attr;\ 1258 val = phba->cfg_##attr;\
1224 return snprintf(buf, PAGE_SIZE, "%d\n",\ 1259 return snprintf(buf, PAGE_SIZE, "%d\n",\
1225 phba->cfg_##attr);\ 1260 phba->cfg_##attr);\
@@ -1247,7 +1282,7 @@ lpfc_##attr##_show(struct device *dev, struct device_attribute *attr, \
1247 struct Scsi_Host *shost = class_to_shost(dev);\ 1282 struct Scsi_Host *shost = class_to_shost(dev);\
1248 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\ 1283 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\
1249 struct lpfc_hba *phba = vport->phba;\ 1284 struct lpfc_hba *phba = vport->phba;\
1250 int val = 0;\ 1285 uint val = 0;\
1251 val = phba->cfg_##attr;\ 1286 val = phba->cfg_##attr;\
1252 return snprintf(buf, PAGE_SIZE, "%#x\n",\ 1287 return snprintf(buf, PAGE_SIZE, "%#x\n",\
1253 phba->cfg_##attr);\ 1288 phba->cfg_##attr);\
@@ -1274,7 +1309,7 @@ lpfc_##attr##_show(struct device *dev, struct device_attribute *attr, \
1274 **/ 1309 **/
1275#define lpfc_param_init(attr, default, minval, maxval) \ 1310#define lpfc_param_init(attr, default, minval, maxval) \
1276static int \ 1311static int \
1277lpfc_##attr##_init(struct lpfc_hba *phba, int val) \ 1312lpfc_##attr##_init(struct lpfc_hba *phba, uint val) \
1278{ \ 1313{ \
1279 if (val >= minval && val <= maxval) {\ 1314 if (val >= minval && val <= maxval) {\
1280 phba->cfg_##attr = val;\ 1315 phba->cfg_##attr = val;\
@@ -1309,7 +1344,7 @@ lpfc_##attr##_init(struct lpfc_hba *phba, int val) \
1309 **/ 1344 **/
1310#define lpfc_param_set(attr, default, minval, maxval) \ 1345#define lpfc_param_set(attr, default, minval, maxval) \
1311static int \ 1346static int \
1312lpfc_##attr##_set(struct lpfc_hba *phba, int val) \ 1347lpfc_##attr##_set(struct lpfc_hba *phba, uint val) \
1313{ \ 1348{ \
1314 if (val >= minval && val <= maxval) {\ 1349 if (val >= minval && val <= maxval) {\
1315 phba->cfg_##attr = val;\ 1350 phba->cfg_##attr = val;\
@@ -1350,7 +1385,7 @@ lpfc_##attr##_store(struct device *dev, struct device_attribute *attr, \
1350 struct Scsi_Host *shost = class_to_shost(dev);\ 1385 struct Scsi_Host *shost = class_to_shost(dev);\
1351 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\ 1386 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\
1352 struct lpfc_hba *phba = vport->phba;\ 1387 struct lpfc_hba *phba = vport->phba;\
1353 int val=0;\ 1388 uint val = 0;\
1354 if (!isdigit(buf[0]))\ 1389 if (!isdigit(buf[0]))\
1355 return -EINVAL;\ 1390 return -EINVAL;\
1356 if (sscanf(buf, "%i", &val) != 1)\ 1391 if (sscanf(buf, "%i", &val) != 1)\
@@ -1382,7 +1417,7 @@ lpfc_##attr##_show(struct device *dev, struct device_attribute *attr, \
1382{ \ 1417{ \
1383 struct Scsi_Host *shost = class_to_shost(dev);\ 1418 struct Scsi_Host *shost = class_to_shost(dev);\
1384 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\ 1419 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\
1385 int val = 0;\ 1420 uint val = 0;\
1386 val = vport->cfg_##attr;\ 1421 val = vport->cfg_##attr;\
1387 return snprintf(buf, PAGE_SIZE, "%d\n", vport->cfg_##attr);\ 1422 return snprintf(buf, PAGE_SIZE, "%d\n", vport->cfg_##attr);\
1388} 1423}
@@ -1409,7 +1444,7 @@ lpfc_##attr##_show(struct device *dev, struct device_attribute *attr, \
1409{ \ 1444{ \
1410 struct Scsi_Host *shost = class_to_shost(dev);\ 1445 struct Scsi_Host *shost = class_to_shost(dev);\
1411 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\ 1446 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\
1412 int val = 0;\ 1447 uint val = 0;\
1413 val = vport->cfg_##attr;\ 1448 val = vport->cfg_##attr;\
1414 return snprintf(buf, PAGE_SIZE, "%#x\n", vport->cfg_##attr);\ 1449 return snprintf(buf, PAGE_SIZE, "%#x\n", vport->cfg_##attr);\
1415} 1450}
@@ -1434,7 +1469,7 @@ lpfc_##attr##_show(struct device *dev, struct device_attribute *attr, \
1434 **/ 1469 **/
1435#define lpfc_vport_param_init(attr, default, minval, maxval) \ 1470#define lpfc_vport_param_init(attr, default, minval, maxval) \
1436static int \ 1471static int \
1437lpfc_##attr##_init(struct lpfc_vport *vport, int val) \ 1472lpfc_##attr##_init(struct lpfc_vport *vport, uint val) \
1438{ \ 1473{ \
1439 if (val >= minval && val <= maxval) {\ 1474 if (val >= minval && val <= maxval) {\
1440 vport->cfg_##attr = val;\ 1475 vport->cfg_##attr = val;\
@@ -1466,7 +1501,7 @@ lpfc_##attr##_init(struct lpfc_vport *vport, int val) \
1466 **/ 1501 **/
1467#define lpfc_vport_param_set(attr, default, minval, maxval) \ 1502#define lpfc_vport_param_set(attr, default, minval, maxval) \
1468static int \ 1503static int \
1469lpfc_##attr##_set(struct lpfc_vport *vport, int val) \ 1504lpfc_##attr##_set(struct lpfc_vport *vport, uint val) \
1470{ \ 1505{ \
1471 if (val >= minval && val <= maxval) {\ 1506 if (val >= minval && val <= maxval) {\
1472 vport->cfg_##attr = val;\ 1507 vport->cfg_##attr = val;\
@@ -1502,7 +1537,7 @@ lpfc_##attr##_store(struct device *dev, struct device_attribute *attr, \
1502{ \ 1537{ \
1503 struct Scsi_Host *shost = class_to_shost(dev);\ 1538 struct Scsi_Host *shost = class_to_shost(dev);\
1504 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\ 1539 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;\
1505 int val=0;\ 1540 uint val = 0;\
1506 if (!isdigit(buf[0]))\ 1541 if (!isdigit(buf[0]))\
1507 return -EINVAL;\ 1542 return -EINVAL;\
1508 if (sscanf(buf, "%i", &val) != 1)\ 1543 if (sscanf(buf, "%i", &val) != 1)\
@@ -1515,22 +1550,22 @@ lpfc_##attr##_store(struct device *dev, struct device_attribute *attr, \
1515 1550
1516 1551
1517#define LPFC_ATTR(name, defval, minval, maxval, desc) \ 1552#define LPFC_ATTR(name, defval, minval, maxval, desc) \
1518static int lpfc_##name = defval;\ 1553static uint lpfc_##name = defval;\
1519module_param(lpfc_##name, int, 0);\ 1554module_param(lpfc_##name, uint, 0);\
1520MODULE_PARM_DESC(lpfc_##name, desc);\ 1555MODULE_PARM_DESC(lpfc_##name, desc);\
1521lpfc_param_init(name, defval, minval, maxval) 1556lpfc_param_init(name, defval, minval, maxval)
1522 1557
1523#define LPFC_ATTR_R(name, defval, minval, maxval, desc) \ 1558#define LPFC_ATTR_R(name, defval, minval, maxval, desc) \
1524static int lpfc_##name = defval;\ 1559static uint lpfc_##name = defval;\
1525module_param(lpfc_##name, int, 0);\ 1560module_param(lpfc_##name, uint, 0);\
1526MODULE_PARM_DESC(lpfc_##name, desc);\ 1561MODULE_PARM_DESC(lpfc_##name, desc);\
1527lpfc_param_show(name)\ 1562lpfc_param_show(name)\
1528lpfc_param_init(name, defval, minval, maxval)\ 1563lpfc_param_init(name, defval, minval, maxval)\
1529static DEVICE_ATTR(lpfc_##name, S_IRUGO , lpfc_##name##_show, NULL) 1564static DEVICE_ATTR(lpfc_##name, S_IRUGO , lpfc_##name##_show, NULL)
1530 1565
1531#define LPFC_ATTR_RW(name, defval, minval, maxval, desc) \ 1566#define LPFC_ATTR_RW(name, defval, minval, maxval, desc) \
1532static int lpfc_##name = defval;\ 1567static uint lpfc_##name = defval;\
1533module_param(lpfc_##name, int, 0);\ 1568module_param(lpfc_##name, uint, 0);\
1534MODULE_PARM_DESC(lpfc_##name, desc);\ 1569MODULE_PARM_DESC(lpfc_##name, desc);\
1535lpfc_param_show(name)\ 1570lpfc_param_show(name)\
1536lpfc_param_init(name, defval, minval, maxval)\ 1571lpfc_param_init(name, defval, minval, maxval)\
@@ -1540,16 +1575,16 @@ static DEVICE_ATTR(lpfc_##name, S_IRUGO | S_IWUSR,\
1540 lpfc_##name##_show, lpfc_##name##_store) 1575 lpfc_##name##_show, lpfc_##name##_store)
1541 1576
1542#define LPFC_ATTR_HEX_R(name, defval, minval, maxval, desc) \ 1577#define LPFC_ATTR_HEX_R(name, defval, minval, maxval, desc) \
1543static int lpfc_##name = defval;\ 1578static uint lpfc_##name = defval;\
1544module_param(lpfc_##name, int, 0);\ 1579module_param(lpfc_##name, uint, 0);\
1545MODULE_PARM_DESC(lpfc_##name, desc);\ 1580MODULE_PARM_DESC(lpfc_##name, desc);\
1546lpfc_param_hex_show(name)\ 1581lpfc_param_hex_show(name)\
1547lpfc_param_init(name, defval, minval, maxval)\ 1582lpfc_param_init(name, defval, minval, maxval)\
1548static DEVICE_ATTR(lpfc_##name, S_IRUGO , lpfc_##name##_show, NULL) 1583static DEVICE_ATTR(lpfc_##name, S_IRUGO , lpfc_##name##_show, NULL)
1549 1584
1550#define LPFC_ATTR_HEX_RW(name, defval, minval, maxval, desc) \ 1585#define LPFC_ATTR_HEX_RW(name, defval, minval, maxval, desc) \
1551static int lpfc_##name = defval;\ 1586static uint lpfc_##name = defval;\
1552module_param(lpfc_##name, int, 0);\ 1587module_param(lpfc_##name, uint, 0);\
1553MODULE_PARM_DESC(lpfc_##name, desc);\ 1588MODULE_PARM_DESC(lpfc_##name, desc);\
1554lpfc_param_hex_show(name)\ 1589lpfc_param_hex_show(name)\
1555lpfc_param_init(name, defval, minval, maxval)\ 1590lpfc_param_init(name, defval, minval, maxval)\
@@ -1559,22 +1594,22 @@ static DEVICE_ATTR(lpfc_##name, S_IRUGO | S_IWUSR,\
1559 lpfc_##name##_show, lpfc_##name##_store) 1594 lpfc_##name##_show, lpfc_##name##_store)
1560 1595
1561#define LPFC_VPORT_ATTR(name, defval, minval, maxval, desc) \ 1596#define LPFC_VPORT_ATTR(name, defval, minval, maxval, desc) \
1562static int lpfc_##name = defval;\ 1597static uint lpfc_##name = defval;\
1563module_param(lpfc_##name, int, 0);\ 1598module_param(lpfc_##name, uint, 0);\
1564MODULE_PARM_DESC(lpfc_##name, desc);\ 1599MODULE_PARM_DESC(lpfc_##name, desc);\
1565lpfc_vport_param_init(name, defval, minval, maxval) 1600lpfc_vport_param_init(name, defval, minval, maxval)
1566 1601
1567#define LPFC_VPORT_ATTR_R(name, defval, minval, maxval, desc) \ 1602#define LPFC_VPORT_ATTR_R(name, defval, minval, maxval, desc) \
1568static int lpfc_##name = defval;\ 1603static uint lpfc_##name = defval;\
1569module_param(lpfc_##name, int, 0);\ 1604module_param(lpfc_##name, uint, 0);\
1570MODULE_PARM_DESC(lpfc_##name, desc);\ 1605MODULE_PARM_DESC(lpfc_##name, desc);\
1571lpfc_vport_param_show(name)\ 1606lpfc_vport_param_show(name)\
1572lpfc_vport_param_init(name, defval, minval, maxval)\ 1607lpfc_vport_param_init(name, defval, minval, maxval)\
1573static DEVICE_ATTR(lpfc_##name, S_IRUGO , lpfc_##name##_show, NULL) 1608static DEVICE_ATTR(lpfc_##name, S_IRUGO , lpfc_##name##_show, NULL)
1574 1609
1575#define LPFC_VPORT_ATTR_RW(name, defval, minval, maxval, desc) \ 1610#define LPFC_VPORT_ATTR_RW(name, defval, minval, maxval, desc) \
1576static int lpfc_##name = defval;\ 1611static uint lpfc_##name = defval;\
1577module_param(lpfc_##name, int, 0);\ 1612module_param(lpfc_##name, uint, 0);\
1578MODULE_PARM_DESC(lpfc_##name, desc);\ 1613MODULE_PARM_DESC(lpfc_##name, desc);\
1579lpfc_vport_param_show(name)\ 1614lpfc_vport_param_show(name)\
1580lpfc_vport_param_init(name, defval, minval, maxval)\ 1615lpfc_vport_param_init(name, defval, minval, maxval)\
@@ -1584,16 +1619,16 @@ static DEVICE_ATTR(lpfc_##name, S_IRUGO | S_IWUSR,\
1584 lpfc_##name##_show, lpfc_##name##_store) 1619 lpfc_##name##_show, lpfc_##name##_store)
1585 1620
1586#define LPFC_VPORT_ATTR_HEX_R(name, defval, minval, maxval, desc) \ 1621#define LPFC_VPORT_ATTR_HEX_R(name, defval, minval, maxval, desc) \
1587static int lpfc_##name = defval;\ 1622static uint lpfc_##name = defval;\
1588module_param(lpfc_##name, int, 0);\ 1623module_param(lpfc_##name, uint, 0);\
1589MODULE_PARM_DESC(lpfc_##name, desc);\ 1624MODULE_PARM_DESC(lpfc_##name, desc);\
1590lpfc_vport_param_hex_show(name)\ 1625lpfc_vport_param_hex_show(name)\
1591lpfc_vport_param_init(name, defval, minval, maxval)\ 1626lpfc_vport_param_init(name, defval, minval, maxval)\
1592static DEVICE_ATTR(lpfc_##name, S_IRUGO , lpfc_##name##_show, NULL) 1627static DEVICE_ATTR(lpfc_##name, S_IRUGO , lpfc_##name##_show, NULL)
1593 1628
1594#define LPFC_VPORT_ATTR_HEX_RW(name, defval, minval, maxval, desc) \ 1629#define LPFC_VPORT_ATTR_HEX_RW(name, defval, minval, maxval, desc) \
1595static int lpfc_##name = defval;\ 1630static uint lpfc_##name = defval;\
1596module_param(lpfc_##name, int, 0);\ 1631module_param(lpfc_##name, uint, 0);\
1597MODULE_PARM_DESC(lpfc_##name, desc);\ 1632MODULE_PARM_DESC(lpfc_##name, desc);\
1598lpfc_vport_param_hex_show(name)\ 1633lpfc_vport_param_hex_show(name)\
1599lpfc_vport_param_init(name, defval, minval, maxval)\ 1634lpfc_vport_param_init(name, defval, minval, maxval)\
@@ -1614,7 +1649,8 @@ static DEVICE_ATTR(programtype, S_IRUGO, lpfc_programtype_show, NULL);
1614static DEVICE_ATTR(portnum, S_IRUGO, lpfc_vportnum_show, NULL); 1649static DEVICE_ATTR(portnum, S_IRUGO, lpfc_vportnum_show, NULL);
1615static DEVICE_ATTR(fwrev, S_IRUGO, lpfc_fwrev_show, NULL); 1650static DEVICE_ATTR(fwrev, S_IRUGO, lpfc_fwrev_show, NULL);
1616static DEVICE_ATTR(hdw, S_IRUGO, lpfc_hdw_show, NULL); 1651static DEVICE_ATTR(hdw, S_IRUGO, lpfc_hdw_show, NULL);
1617static DEVICE_ATTR(link_state, S_IRUGO, lpfc_link_state_show, NULL); 1652static DEVICE_ATTR(link_state, S_IRUGO | S_IWUSR, lpfc_link_state_show,
1653 lpfc_link_state_store);
1618static DEVICE_ATTR(option_rom_version, S_IRUGO, 1654static DEVICE_ATTR(option_rom_version, S_IRUGO,
1619 lpfc_option_rom_version_show, NULL); 1655 lpfc_option_rom_version_show, NULL);
1620static DEVICE_ATTR(num_discovered_ports, S_IRUGO, 1656static DEVICE_ATTR(num_discovered_ports, S_IRUGO,
@@ -1897,6 +1933,15 @@ static DEVICE_ATTR(lpfc_enable_npiv, S_IRUGO,
1897 lpfc_enable_npiv_show, NULL); 1933 lpfc_enable_npiv_show, NULL);
1898 1934
1899/* 1935/*
1936# lpfc_suppress_link_up: Bring link up at initialization
1937# 0x0 = bring link up (issue MBX_INIT_LINK)
1938# 0x1 = do NOT bring link up at initialization(MBX_INIT_LINK)
1939# 0x2 = never bring up link
1940# Default value is 0.
1941*/
1942LPFC_ATTR_R(suppress_link_up, 0, 0, 2, "Suppress Link Up at initialization");
1943
1944/*
1900# lpfc_nodev_tmo: If set, it will hold all I/O errors on devices that disappear 1945# lpfc_nodev_tmo: If set, it will hold all I/O errors on devices that disappear
1901# until the timer expires. Value range is [0,255]. Default value is 30. 1946# until the timer expires. Value range is [0,255]. Default value is 30.
1902*/ 1947*/
@@ -3114,12 +3159,12 @@ LPFC_ATTR_RW(poll_tmo, 10, 1, 255,
3114/* 3159/*
3115# lpfc_use_msi: Use MSI (Message Signaled Interrupts) in systems that 3160# lpfc_use_msi: Use MSI (Message Signaled Interrupts) in systems that
3116# support this feature 3161# support this feature
3117# 0 = MSI disabled (default) 3162# 0 = MSI disabled
3118# 1 = MSI enabled 3163# 1 = MSI enabled
3119# 2 = MSI-X enabled 3164# 2 = MSI-X enabled (default)
3120# Value range is [0,2]. Default value is 0. 3165# Value range is [0,2]. Default value is 2.
3121*/ 3166*/
3122LPFC_ATTR_R(use_msi, 0, 0, 2, "Use Message Signaled Interrupts (1) or " 3167LPFC_ATTR_R(use_msi, 2, 0, 2, "Use Message Signaled Interrupts (1) or "
3123 "MSI-X (2), if possible"); 3168 "MSI-X (2), if possible");
3124 3169
3125/* 3170/*
@@ -3278,6 +3323,7 @@ struct device_attribute *lpfc_hba_attrs[] = {
3278 &dev_attr_lpfc_prot_sg_seg_cnt, 3323 &dev_attr_lpfc_prot_sg_seg_cnt,
3279 &dev_attr_lpfc_aer_support, 3324 &dev_attr_lpfc_aer_support,
3280 &dev_attr_lpfc_aer_state_cleanup, 3325 &dev_attr_lpfc_aer_state_cleanup,
3326 &dev_attr_lpfc_suppress_link_up,
3281 NULL, 3327 NULL,
3282}; 3328};
3283 3329
@@ -4456,7 +4502,7 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)
4456 lpfc_hba_queue_depth_init(phba, lpfc_hba_queue_depth); 4502 lpfc_hba_queue_depth_init(phba, lpfc_hba_queue_depth);
4457 lpfc_hba_log_verbose_init(phba, lpfc_log_verbose); 4503 lpfc_hba_log_verbose_init(phba, lpfc_log_verbose);
4458 lpfc_aer_support_init(phba, lpfc_aer_support); 4504 lpfc_aer_support_init(phba, lpfc_aer_support);
4459 4505 lpfc_suppress_link_up_init(phba, lpfc_suppress_link_up);
4460 return; 4506 return;
4461} 4507}
4462 4508
diff --git a/drivers/scsi/lpfc/lpfc_bsg.c b/drivers/scsi/lpfc/lpfc_bsg.c
index a5d9048235d9..f3f1bf1a0a71 100644
--- a/drivers/scsi/lpfc/lpfc_bsg.c
+++ b/drivers/scsi/lpfc/lpfc_bsg.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2009 Emulex. All rights reserved. * 4 * Copyright (C) 2009-2010 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -21,6 +21,7 @@
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/mempool.h> 22#include <linux/mempool.h>
23#include <linux/pci.h> 23#include <linux/pci.h>
24#include <linux/delay.h>
24 25
25#include <scsi/scsi.h> 26#include <scsi/scsi.h>
26#include <scsi/scsi_host.h> 27#include <scsi/scsi_host.h>
@@ -33,6 +34,7 @@
33#include "lpfc_sli.h" 34#include "lpfc_sli.h"
34#include "lpfc_sli4.h" 35#include "lpfc_sli4.h"
35#include "lpfc_nl.h" 36#include "lpfc_nl.h"
37#include "lpfc_bsg.h"
36#include "lpfc_disc.h" 38#include "lpfc_disc.h"
37#include "lpfc_scsi.h" 39#include "lpfc_scsi.h"
38#include "lpfc.h" 40#include "lpfc.h"
@@ -41,14 +43,183 @@
41#include "lpfc_vport.h" 43#include "lpfc_vport.h"
42#include "lpfc_version.h" 44#include "lpfc_version.h"
43 45
46struct lpfc_bsg_event {
47 struct list_head node;
48 struct kref kref;
49 wait_queue_head_t wq;
50
51 /* Event type and waiter identifiers */
52 uint32_t type_mask;
53 uint32_t req_id;
54 uint32_t reg_id;
55
56 /* next two flags are here for the auto-delete logic */
57 unsigned long wait_time_stamp;
58 int waiting;
59
60 /* seen and not seen events */
61 struct list_head events_to_get;
62 struct list_head events_to_see;
63
64 /* job waiting for this event to finish */
65 struct fc_bsg_job *set_job;
66};
67
68struct lpfc_bsg_iocb {
69 struct lpfc_iocbq *cmdiocbq;
70 struct lpfc_iocbq *rspiocbq;
71 struct lpfc_dmabuf *bmp;
72 struct lpfc_nodelist *ndlp;
73
74 /* job waiting for this iocb to finish */
75 struct fc_bsg_job *set_job;
76};
77
78struct lpfc_bsg_mbox {
79 LPFC_MBOXQ_t *pmboxq;
80 MAILBOX_t *mb;
81
82 /* job waiting for this mbox command to finish */
83 struct fc_bsg_job *set_job;
84};
85
86#define TYPE_EVT 1
87#define TYPE_IOCB 2
88#define TYPE_MBOX 3
89struct bsg_job_data {
90 uint32_t type;
91 union {
92 struct lpfc_bsg_event *evt;
93 struct lpfc_bsg_iocb iocb;
94 struct lpfc_bsg_mbox mbox;
95 } context_un;
96};
97
98struct event_data {
99 struct list_head node;
100 uint32_t type;
101 uint32_t immed_dat;
102 void *data;
103 uint32_t len;
104};
105
106#define BUF_SZ_4K 4096
107#define SLI_CT_ELX_LOOPBACK 0x10
108
109enum ELX_LOOPBACK_CMD {
110 ELX_LOOPBACK_XRI_SETUP,
111 ELX_LOOPBACK_DATA,
112};
113
114#define ELX_LOOPBACK_HEADER_SZ \
115 (size_t)(&((struct lpfc_sli_ct_request *)NULL)->un)
116
117struct lpfc_dmabufext {
118 struct lpfc_dmabuf dma;
119 uint32_t size;
120 uint32_t flag;
121};
122
123/**
124 * lpfc_bsg_send_mgmt_cmd_cmp - lpfc_bsg_send_mgmt_cmd's completion handler
125 * @phba: Pointer to HBA context object.
126 * @cmdiocbq: Pointer to command iocb.
127 * @rspiocbq: Pointer to response iocb.
128 *
129 * This function is the completion handler for iocbs issued using
130 * lpfc_bsg_send_mgmt_cmd function. This function is called by the
131 * ring event handler function without any lock held. This function
132 * can be called from both worker thread context and interrupt
133 * context. This function also can be called from another thread which
134 * cleans up the SLI layer objects.
135 * This function copies the contents of the response iocb to the
136 * response iocb memory object provided by the caller of
137 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
138 * sleeps for the iocb completion.
139 **/
140static void
141lpfc_bsg_send_mgmt_cmd_cmp(struct lpfc_hba *phba,
142 struct lpfc_iocbq *cmdiocbq,
143 struct lpfc_iocbq *rspiocbq)
144{
145 unsigned long iflags;
146 struct bsg_job_data *dd_data;
147 struct fc_bsg_job *job;
148 IOCB_t *rsp;
149 struct lpfc_dmabuf *bmp;
150 struct lpfc_nodelist *ndlp;
151 struct lpfc_bsg_iocb *iocb;
152 unsigned long flags;
153 int rc = 0;
154
155 spin_lock_irqsave(&phba->ct_ev_lock, flags);
156 dd_data = cmdiocbq->context1;
157 if (!dd_data) {
158 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
159 return;
160 }
161
162 iocb = &dd_data->context_un.iocb;
163 job = iocb->set_job;
164 job->dd_data = NULL; /* so timeout handler does not reply */
165
166 spin_lock_irqsave(&phba->hbalock, iflags);
167 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
168 if (cmdiocbq->context2 && rspiocbq)
169 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
170 &rspiocbq->iocb, sizeof(IOCB_t));
171 spin_unlock_irqrestore(&phba->hbalock, iflags);
172
173 bmp = iocb->bmp;
174 rspiocbq = iocb->rspiocbq;
175 rsp = &rspiocbq->iocb;
176 ndlp = iocb->ndlp;
177
178 pci_unmap_sg(phba->pcidev, job->request_payload.sg_list,
179 job->request_payload.sg_cnt, DMA_TO_DEVICE);
180 pci_unmap_sg(phba->pcidev, job->reply_payload.sg_list,
181 job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
182
183 if (rsp->ulpStatus) {
184 if (rsp->ulpStatus == IOSTAT_LOCAL_REJECT) {
185 switch (rsp->un.ulpWord[4] & 0xff) {
186 case IOERR_SEQUENCE_TIMEOUT:
187 rc = -ETIMEDOUT;
188 break;
189 case IOERR_INVALID_RPI:
190 rc = -EFAULT;
191 break;
192 default:
193 rc = -EACCES;
194 break;
195 }
196 } else
197 rc = -EACCES;
198 } else
199 job->reply->reply_payload_rcv_len =
200 rsp->un.genreq64.bdl.bdeSize;
201
202 lpfc_mbuf_free(phba, bmp->virt, bmp->phys);
203 lpfc_sli_release_iocbq(phba, rspiocbq);
204 lpfc_sli_release_iocbq(phba, cmdiocbq);
205 lpfc_nlp_put(ndlp);
206 kfree(bmp);
207 kfree(dd_data);
208 /* make error code available to userspace */
209 job->reply->result = rc;
210 /* complete the job back to userspace */
211 job->job_done(job);
212 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
213 return;
214}
215
44/** 216/**
45 * lpfc_bsg_rport_ct - send a CT command from a bsg request 217 * lpfc_bsg_send_mgmt_cmd - send a CT command from a bsg request
46 * @job: fc_bsg_job to handle 218 * @job: fc_bsg_job to handle
47 */ 219 **/
48static int 220static int
49lpfc_bsg_rport_ct(struct fc_bsg_job *job) 221lpfc_bsg_send_mgmt_cmd(struct fc_bsg_job *job)
50{ 222{
51 struct Scsi_Host *shost = job->shost;
52 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata; 223 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata;
53 struct lpfc_hba *phba = vport->phba; 224 struct lpfc_hba *phba = vport->phba;
54 struct lpfc_rport_data *rdata = job->rport->dd_data; 225 struct lpfc_rport_data *rdata = job->rport->dd_data;
@@ -65,57 +236,60 @@ lpfc_bsg_rport_ct(struct fc_bsg_job *job)
65 struct scatterlist *sgel = NULL; 236 struct scatterlist *sgel = NULL;
66 int numbde; 237 int numbde;
67 dma_addr_t busaddr; 238 dma_addr_t busaddr;
239 struct bsg_job_data *dd_data;
240 uint32_t creg_val;
68 int rc = 0; 241 int rc = 0;
69 242
70 /* in case no data is transferred */ 243 /* in case no data is transferred */
71 job->reply->reply_payload_rcv_len = 0; 244 job->reply->reply_payload_rcv_len = 0;
72 245
246 /* allocate our bsg tracking structure */
247 dd_data = kmalloc(sizeof(struct bsg_job_data), GFP_KERNEL);
248 if (!dd_data) {
249 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
250 "2733 Failed allocation of dd_data\n");
251 rc = -ENOMEM;
252 goto no_dd_data;
253 }
254
73 if (!lpfc_nlp_get(ndlp)) { 255 if (!lpfc_nlp_get(ndlp)) {
74 job->reply->result = -ENODEV; 256 rc = -ENODEV;
75 return 0; 257 goto no_ndlp;
258 }
259
260 bmp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
261 if (!bmp) {
262 rc = -ENOMEM;
263 goto free_ndlp;
76 } 264 }
77 265
78 if (ndlp->nlp_flag & NLP_ELS_SND_MASK) { 266 if (ndlp->nlp_flag & NLP_ELS_SND_MASK) {
79 rc = -ENODEV; 267 rc = -ENODEV;
80 goto free_ndlp_exit; 268 goto free_bmp;
81 } 269 }
82 270
83 spin_lock_irq(shost->host_lock);
84 cmdiocbq = lpfc_sli_get_iocbq(phba); 271 cmdiocbq = lpfc_sli_get_iocbq(phba);
85 if (!cmdiocbq) { 272 if (!cmdiocbq) {
86 rc = -ENOMEM; 273 rc = -ENOMEM;
87 spin_unlock_irq(shost->host_lock); 274 goto free_bmp;
88 goto free_ndlp_exit;
89 } 275 }
90 cmd = &cmdiocbq->iocb;
91 276
277 cmd = &cmdiocbq->iocb;
92 rspiocbq = lpfc_sli_get_iocbq(phba); 278 rspiocbq = lpfc_sli_get_iocbq(phba);
93 if (!rspiocbq) { 279 if (!rspiocbq) {
94 rc = -ENOMEM; 280 rc = -ENOMEM;
95 goto free_cmdiocbq; 281 goto free_cmdiocbq;
96 } 282 }
97 spin_unlock_irq(shost->host_lock);
98 283
99 rsp = &rspiocbq->iocb; 284 rsp = &rspiocbq->iocb;
100
101 bmp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
102 if (!bmp) {
103 rc = -ENOMEM;
104 spin_lock_irq(shost->host_lock);
105 goto free_rspiocbq;
106 }
107
108 spin_lock_irq(shost->host_lock);
109 bmp->virt = lpfc_mbuf_alloc(phba, 0, &bmp->phys); 285 bmp->virt = lpfc_mbuf_alloc(phba, 0, &bmp->phys);
110 if (!bmp->virt) { 286 if (!bmp->virt) {
111 rc = -ENOMEM; 287 rc = -ENOMEM;
112 goto free_bmp; 288 goto free_rspiocbq;
113 } 289 }
114 spin_unlock_irq(shost->host_lock);
115 290
116 INIT_LIST_HEAD(&bmp->list); 291 INIT_LIST_HEAD(&bmp->list);
117 bpl = (struct ulp_bde64 *) bmp->virt; 292 bpl = (struct ulp_bde64 *) bmp->virt;
118
119 request_nseg = pci_map_sg(phba->pcidev, job->request_payload.sg_list, 293 request_nseg = pci_map_sg(phba->pcidev, job->request_payload.sg_list,
120 job->request_payload.sg_cnt, DMA_TO_DEVICE); 294 job->request_payload.sg_cnt, DMA_TO_DEVICE);
121 for_each_sg(job->request_payload.sg_list, sgel, request_nseg, numbde) { 295 for_each_sg(job->request_payload.sg_list, sgel, request_nseg, numbde) {
@@ -157,78 +331,152 @@ lpfc_bsg_rport_ct(struct fc_bsg_job *job)
157 cmd->ulpContext = ndlp->nlp_rpi; 331 cmd->ulpContext = ndlp->nlp_rpi;
158 cmd->ulpOwner = OWN_CHIP; 332 cmd->ulpOwner = OWN_CHIP;
159 cmdiocbq->vport = phba->pport; 333 cmdiocbq->vport = phba->pport;
160 cmdiocbq->context1 = NULL; 334 cmdiocbq->context3 = bmp;
161 cmdiocbq->context2 = NULL;
162 cmdiocbq->iocb_flag |= LPFC_IO_LIBDFC; 335 cmdiocbq->iocb_flag |= LPFC_IO_LIBDFC;
163
164 timeout = phba->fc_ratov * 2; 336 timeout = phba->fc_ratov * 2;
165 job->dd_data = cmdiocbq; 337 cmd->ulpTimeout = timeout;
166 338
167 rc = lpfc_sli_issue_iocb_wait(phba, LPFC_ELS_RING, cmdiocbq, rspiocbq, 339 cmdiocbq->iocb_cmpl = lpfc_bsg_send_mgmt_cmd_cmp;
168 timeout + LPFC_DRVR_TIMEOUT); 340 cmdiocbq->context1 = dd_data;
169 341 cmdiocbq->context2 = rspiocbq;
170 if (rc != IOCB_TIMEDOUT) { 342 dd_data->type = TYPE_IOCB;
171 pci_unmap_sg(phba->pcidev, job->request_payload.sg_list, 343 dd_data->context_un.iocb.cmdiocbq = cmdiocbq;
172 job->request_payload.sg_cnt, DMA_TO_DEVICE); 344 dd_data->context_un.iocb.rspiocbq = rspiocbq;
173 pci_unmap_sg(phba->pcidev, job->reply_payload.sg_list, 345 dd_data->context_un.iocb.set_job = job;
174 job->reply_payload.sg_cnt, DMA_FROM_DEVICE); 346 dd_data->context_un.iocb.bmp = bmp;
347 dd_data->context_un.iocb.ndlp = ndlp;
348
349 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
350 creg_val = readl(phba->HCregaddr);
351 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
352 writel(creg_val, phba->HCregaddr);
353 readl(phba->HCregaddr); /* flush */
175 } 354 }
176 355
177 if (rc == IOCB_TIMEDOUT) { 356 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, cmdiocbq, 0);
178 lpfc_sli_release_iocbq(phba, rspiocbq);
179 rc = -EACCES;
180 goto free_ndlp_exit;
181 }
182 357
183 if (rc != IOCB_SUCCESS) { 358 if (rc == IOCB_SUCCESS)
184 rc = -EACCES; 359 return 0; /* done for now */
185 goto free_outdmp;
186 }
187 360
188 if (rsp->ulpStatus) { 361 /* iocb failed so cleanup */
189 if (rsp->ulpStatus == IOSTAT_LOCAL_REJECT) { 362 pci_unmap_sg(phba->pcidev, job->request_payload.sg_list,
190 switch (rsp->un.ulpWord[4] & 0xff) { 363 job->request_payload.sg_cnt, DMA_TO_DEVICE);
191 case IOERR_SEQUENCE_TIMEOUT: 364 pci_unmap_sg(phba->pcidev, job->reply_payload.sg_list,
192 rc = -ETIMEDOUT; 365 job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
193 break;
194 case IOERR_INVALID_RPI:
195 rc = -EFAULT;
196 break;
197 default:
198 rc = -EACCES;
199 break;
200 }
201 goto free_outdmp;
202 }
203 } else
204 job->reply->reply_payload_rcv_len =
205 rsp->un.genreq64.bdl.bdeSize;
206 366
207free_outdmp:
208 spin_lock_irq(shost->host_lock);
209 lpfc_mbuf_free(phba, bmp->virt, bmp->phys); 367 lpfc_mbuf_free(phba, bmp->virt, bmp->phys);
210free_bmp: 368
211 kfree(bmp);
212free_rspiocbq: 369free_rspiocbq:
213 lpfc_sli_release_iocbq(phba, rspiocbq); 370 lpfc_sli_release_iocbq(phba, rspiocbq);
214free_cmdiocbq: 371free_cmdiocbq:
215 lpfc_sli_release_iocbq(phba, cmdiocbq); 372 lpfc_sli_release_iocbq(phba, cmdiocbq);
216 spin_unlock_irq(shost->host_lock); 373free_bmp:
217free_ndlp_exit: 374 kfree(bmp);
375free_ndlp:
218 lpfc_nlp_put(ndlp); 376 lpfc_nlp_put(ndlp);
377no_ndlp:
378 kfree(dd_data);
379no_dd_data:
380 /* make error code available to userspace */
381 job->reply->result = rc;
382 job->dd_data = NULL;
383 return rc;
384}
385
386/**
387 * lpfc_bsg_rport_els_cmp - lpfc_bsg_rport_els's completion handler
388 * @phba: Pointer to HBA context object.
389 * @cmdiocbq: Pointer to command iocb.
390 * @rspiocbq: Pointer to response iocb.
391 *
392 * This function is the completion handler for iocbs issued using
393 * lpfc_bsg_rport_els_cmp function. This function is called by the
394 * ring event handler function without any lock held. This function
395 * can be called from both worker thread context and interrupt
396 * context. This function also can be called from other thread which
397 * cleans up the SLI layer objects.
398 * This function copies the contents of the response iocb to the
399 * response iocb memory object provided by the caller of
400 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
401 * sleeps for the iocb completion.
402 **/
403static void
404lpfc_bsg_rport_els_cmp(struct lpfc_hba *phba,
405 struct lpfc_iocbq *cmdiocbq,
406 struct lpfc_iocbq *rspiocbq)
407{
408 struct bsg_job_data *dd_data;
409 struct fc_bsg_job *job;
410 IOCB_t *rsp;
411 struct lpfc_nodelist *ndlp;
412 struct lpfc_dmabuf *pbuflist = NULL;
413 struct fc_bsg_ctels_reply *els_reply;
414 uint8_t *rjt_data;
415 unsigned long flags;
416 int rc = 0;
417
418 spin_lock_irqsave(&phba->ct_ev_lock, flags);
419 dd_data = cmdiocbq->context1;
420 /* normal completion and timeout crossed paths, already done */
421 if (!dd_data) {
422 spin_unlock_irqrestore(&phba->hbalock, flags);
423 return;
424 }
425
426 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
427 if (cmdiocbq->context2 && rspiocbq)
428 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
429 &rspiocbq->iocb, sizeof(IOCB_t));
430
431 job = dd_data->context_un.iocb.set_job;
432 cmdiocbq = dd_data->context_un.iocb.cmdiocbq;
433 rspiocbq = dd_data->context_un.iocb.rspiocbq;
434 rsp = &rspiocbq->iocb;
435 ndlp = dd_data->context_un.iocb.ndlp;
436
437 pci_unmap_sg(phba->pcidev, job->request_payload.sg_list,
438 job->request_payload.sg_cnt, DMA_TO_DEVICE);
439 pci_unmap_sg(phba->pcidev, job->reply_payload.sg_list,
440 job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
219 441
442 if (job->reply->result == -EAGAIN)
443 rc = -EAGAIN;
444 else if (rsp->ulpStatus == IOSTAT_SUCCESS)
445 job->reply->reply_payload_rcv_len =
446 rsp->un.elsreq64.bdl.bdeSize;
447 else if (rsp->ulpStatus == IOSTAT_LS_RJT) {
448 job->reply->reply_payload_rcv_len =
449 sizeof(struct fc_bsg_ctels_reply);
450 /* LS_RJT data returned in word 4 */
451 rjt_data = (uint8_t *)&rsp->un.ulpWord[4];
452 els_reply = &job->reply->reply_data.ctels_reply;
453 els_reply->status = FC_CTELS_STATUS_REJECT;
454 els_reply->rjt_data.action = rjt_data[3];
455 els_reply->rjt_data.reason_code = rjt_data[2];
456 els_reply->rjt_data.reason_explanation = rjt_data[1];
457 els_reply->rjt_data.vendor_unique = rjt_data[0];
458 } else
459 rc = -EIO;
460
461 pbuflist = (struct lpfc_dmabuf *) cmdiocbq->context3;
462 lpfc_mbuf_free(phba, pbuflist->virt, pbuflist->phys);
463 lpfc_sli_release_iocbq(phba, rspiocbq);
464 lpfc_sli_release_iocbq(phba, cmdiocbq);
465 lpfc_nlp_put(ndlp);
466 kfree(dd_data);
220 /* make error code available to userspace */ 467 /* make error code available to userspace */
221 job->reply->result = rc; 468 job->reply->result = rc;
469 job->dd_data = NULL;
222 /* complete the job back to userspace */ 470 /* complete the job back to userspace */
223 job->job_done(job); 471 job->job_done(job);
224 472 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
225 return 0; 473 return;
226} 474}
227 475
228/** 476/**
229 * lpfc_bsg_rport_els - send an ELS command from a bsg request 477 * lpfc_bsg_rport_els - send an ELS command from a bsg request
230 * @job: fc_bsg_job to handle 478 * @job: fc_bsg_job to handle
231 */ 479 **/
232static int 480static int
233lpfc_bsg_rport_els(struct fc_bsg_job *job) 481lpfc_bsg_rport_els(struct fc_bsg_job *job)
234{ 482{
@@ -236,7 +484,6 @@ lpfc_bsg_rport_els(struct fc_bsg_job *job)
236 struct lpfc_hba *phba = vport->phba; 484 struct lpfc_hba *phba = vport->phba;
237 struct lpfc_rport_data *rdata = job->rport->dd_data; 485 struct lpfc_rport_data *rdata = job->rport->dd_data;
238 struct lpfc_nodelist *ndlp = rdata->pnode; 486 struct lpfc_nodelist *ndlp = rdata->pnode;
239
240 uint32_t elscmd; 487 uint32_t elscmd;
241 uint32_t cmdsize; 488 uint32_t cmdsize;
242 uint32_t rspsize; 489 uint32_t rspsize;
@@ -248,20 +495,30 @@ lpfc_bsg_rport_els(struct fc_bsg_job *job)
248 struct lpfc_dmabuf *prsp; 495 struct lpfc_dmabuf *prsp;
249 struct lpfc_dmabuf *pbuflist = NULL; 496 struct lpfc_dmabuf *pbuflist = NULL;
250 struct ulp_bde64 *bpl; 497 struct ulp_bde64 *bpl;
251 int iocb_status;
252 int request_nseg; 498 int request_nseg;
253 int reply_nseg; 499 int reply_nseg;
254 struct scatterlist *sgel = NULL; 500 struct scatterlist *sgel = NULL;
255 int numbde; 501 int numbde;
256 dma_addr_t busaddr; 502 dma_addr_t busaddr;
503 struct bsg_job_data *dd_data;
504 uint32_t creg_val;
257 int rc = 0; 505 int rc = 0;
258 506
259 /* in case no data is transferred */ 507 /* in case no data is transferred */
260 job->reply->reply_payload_rcv_len = 0; 508 job->reply->reply_payload_rcv_len = 0;
261 509
510 /* allocate our bsg tracking structure */
511 dd_data = kmalloc(sizeof(struct bsg_job_data), GFP_KERNEL);
512 if (!dd_data) {
513 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
514 "2735 Failed allocation of dd_data\n");
515 rc = -ENOMEM;
516 goto no_dd_data;
517 }
518
262 if (!lpfc_nlp_get(ndlp)) { 519 if (!lpfc_nlp_get(ndlp)) {
263 rc = -ENODEV; 520 rc = -ENODEV;
264 goto out; 521 goto free_dd_data;
265 } 522 }
266 523
267 elscmd = job->request->rqst_data.r_els.els_code; 524 elscmd = job->request->rqst_data.r_els.els_code;
@@ -271,24 +528,24 @@ lpfc_bsg_rport_els(struct fc_bsg_job *job)
271 if (!rspiocbq) { 528 if (!rspiocbq) {
272 lpfc_nlp_put(ndlp); 529 lpfc_nlp_put(ndlp);
273 rc = -ENOMEM; 530 rc = -ENOMEM;
274 goto out; 531 goto free_dd_data;
275 } 532 }
276 533
277 rsp = &rspiocbq->iocb; 534 rsp = &rspiocbq->iocb;
278 rpi = ndlp->nlp_rpi; 535 rpi = ndlp->nlp_rpi;
279 536
280 cmdiocbq = lpfc_prep_els_iocb(phba->pport, 1, cmdsize, 0, ndlp, 537 cmdiocbq = lpfc_prep_els_iocb(vport, 1, cmdsize, 0, ndlp,
281 ndlp->nlp_DID, elscmd); 538 ndlp->nlp_DID, elscmd);
282
283 if (!cmdiocbq) { 539 if (!cmdiocbq) {
284 lpfc_sli_release_iocbq(phba, rspiocbq); 540 rc = -EIO;
285 return -EIO; 541 goto free_rspiocbq;
286 } 542 }
287 543
288 job->dd_data = cmdiocbq; 544 /* prep els iocb set context1 to the ndlp, context2 to the command
545 * dmabuf, context3 holds the data dmabuf
546 */
289 pcmd = (struct lpfc_dmabuf *) cmdiocbq->context2; 547 pcmd = (struct lpfc_dmabuf *) cmdiocbq->context2;
290 prsp = (struct lpfc_dmabuf *) pcmd->list.next; 548 prsp = (struct lpfc_dmabuf *) pcmd->list.next;
291
292 lpfc_mbuf_free(phba, pcmd->virt, pcmd->phys); 549 lpfc_mbuf_free(phba, pcmd->virt, pcmd->phys);
293 kfree(pcmd); 550 kfree(pcmd);
294 lpfc_mbuf_free(phba, prsp->virt, prsp->phys); 551 lpfc_mbuf_free(phba, prsp->virt, prsp->phys);
@@ -300,7 +557,6 @@ lpfc_bsg_rport_els(struct fc_bsg_job *job)
300 557
301 request_nseg = pci_map_sg(phba->pcidev, job->request_payload.sg_list, 558 request_nseg = pci_map_sg(phba->pcidev, job->request_payload.sg_list,
302 job->request_payload.sg_cnt, DMA_TO_DEVICE); 559 job->request_payload.sg_cnt, DMA_TO_DEVICE);
303
304 for_each_sg(job->request_payload.sg_list, sgel, request_nseg, numbde) { 560 for_each_sg(job->request_payload.sg_list, sgel, request_nseg, numbde) {
305 busaddr = sg_dma_address(sgel); 561 busaddr = sg_dma_address(sgel);
306 bpl->tus.f.bdeFlags = BUFF_TYPE_BDE_64; 562 bpl->tus.f.bdeFlags = BUFF_TYPE_BDE_64;
@@ -322,7 +578,6 @@ lpfc_bsg_rport_els(struct fc_bsg_job *job)
322 bpl->addrHigh = cpu_to_le32(putPaddrHigh(busaddr)); 578 bpl->addrHigh = cpu_to_le32(putPaddrHigh(busaddr));
323 bpl++; 579 bpl++;
324 } 580 }
325
326 cmdiocbq->iocb.un.elsreq64.bdl.bdeSize = 581 cmdiocbq->iocb.un.elsreq64.bdl.bdeSize =
327 (request_nseg + reply_nseg) * sizeof(struct ulp_bde64); 582 (request_nseg + reply_nseg) * sizeof(struct ulp_bde64);
328 cmdiocbq->iocb.ulpContext = rpi; 583 cmdiocbq->iocb.ulpContext = rpi;
@@ -330,102 +585,62 @@ lpfc_bsg_rport_els(struct fc_bsg_job *job)
330 cmdiocbq->context1 = NULL; 585 cmdiocbq->context1 = NULL;
331 cmdiocbq->context2 = NULL; 586 cmdiocbq->context2 = NULL;
332 587
333 iocb_status = lpfc_sli_issue_iocb_wait(phba, LPFC_ELS_RING, cmdiocbq, 588 cmdiocbq->iocb_cmpl = lpfc_bsg_rport_els_cmp;
334 rspiocbq, (phba->fc_ratov * 2) 589 cmdiocbq->context1 = dd_data;
335 + LPFC_DRVR_TIMEOUT); 590 cmdiocbq->context2 = rspiocbq;
336 591 dd_data->type = TYPE_IOCB;
337 /* release the new ndlp once the iocb completes */ 592 dd_data->context_un.iocb.cmdiocbq = cmdiocbq;
338 lpfc_nlp_put(ndlp); 593 dd_data->context_un.iocb.rspiocbq = rspiocbq;
339 if (iocb_status != IOCB_TIMEDOUT) { 594 dd_data->context_un.iocb.set_job = job;
340 pci_unmap_sg(phba->pcidev, job->request_payload.sg_list, 595 dd_data->context_un.iocb.bmp = NULL;;
341 job->request_payload.sg_cnt, DMA_TO_DEVICE); 596 dd_data->context_un.iocb.ndlp = ndlp;
342 pci_unmap_sg(phba->pcidev, job->reply_payload.sg_list, 597
343 job->reply_payload.sg_cnt, DMA_FROM_DEVICE); 598 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
599 creg_val = readl(phba->HCregaddr);
600 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
601 writel(creg_val, phba->HCregaddr);
602 readl(phba->HCregaddr); /* flush */
344 } 603 }
604 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, cmdiocbq, 0);
605 lpfc_nlp_put(ndlp);
606 if (rc == IOCB_SUCCESS)
607 return 0; /* done for now */
345 608
346 if (iocb_status == IOCB_SUCCESS) { 609 pci_unmap_sg(phba->pcidev, job->request_payload.sg_list,
347 if (rsp->ulpStatus == IOSTAT_SUCCESS) { 610 job->request_payload.sg_cnt, DMA_TO_DEVICE);
348 job->reply->reply_payload_rcv_len = 611 pci_unmap_sg(phba->pcidev, job->reply_payload.sg_list,
349 rsp->un.elsreq64.bdl.bdeSize; 612 job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
350 rc = 0; 613
351 } else if (rsp->ulpStatus == IOSTAT_LS_RJT) { 614 lpfc_mbuf_free(phba, pbuflist->virt, pbuflist->phys);
352 struct fc_bsg_ctels_reply *els_reply;
353 /* LS_RJT data returned in word 4 */
354 uint8_t *rjt_data = (uint8_t *)&rsp->un.ulpWord[4];
355
356 els_reply = &job->reply->reply_data.ctels_reply;
357 job->reply->result = 0;
358 els_reply->status = FC_CTELS_STATUS_REJECT;
359 els_reply->rjt_data.action = rjt_data[0];
360 els_reply->rjt_data.reason_code = rjt_data[1];
361 els_reply->rjt_data.reason_explanation = rjt_data[2];
362 els_reply->rjt_data.vendor_unique = rjt_data[3];
363 } else
364 rc = -EIO;
365 } else
366 rc = -EIO;
367 615
368 if (iocb_status != IOCB_TIMEDOUT) 616 lpfc_sli_release_iocbq(phba, cmdiocbq);
369 lpfc_els_free_iocb(phba, cmdiocbq);
370 617
618free_rspiocbq:
371 lpfc_sli_release_iocbq(phba, rspiocbq); 619 lpfc_sli_release_iocbq(phba, rspiocbq);
372 620
373out: 621free_dd_data:
622 kfree(dd_data);
623
624no_dd_data:
374 /* make error code available to userspace */ 625 /* make error code available to userspace */
375 job->reply->result = rc; 626 job->reply->result = rc;
376 /* complete the job back to userspace */ 627 job->dd_data = NULL;
377 job->job_done(job); 628 return rc;
378
379 return 0;
380}
381
382struct lpfc_ct_event {
383 struct list_head node;
384 int ref;
385 wait_queue_head_t wq;
386
387 /* Event type and waiter identifiers */
388 uint32_t type_mask;
389 uint32_t req_id;
390 uint32_t reg_id;
391
392 /* next two flags are here for the auto-delete logic */
393 unsigned long wait_time_stamp;
394 int waiting;
395
396 /* seen and not seen events */
397 struct list_head events_to_get;
398 struct list_head events_to_see;
399};
400
401struct event_data {
402 struct list_head node;
403 uint32_t type;
404 uint32_t immed_dat;
405 void *data;
406 uint32_t len;
407};
408
409static struct lpfc_ct_event *
410lpfc_ct_event_new(int ev_reg_id, uint32_t ev_req_id)
411{
412 struct lpfc_ct_event *evt = kzalloc(sizeof(*evt), GFP_KERNEL);
413 if (!evt)
414 return NULL;
415
416 INIT_LIST_HEAD(&evt->events_to_get);
417 INIT_LIST_HEAD(&evt->events_to_see);
418 evt->req_id = ev_req_id;
419 evt->reg_id = ev_reg_id;
420 evt->wait_time_stamp = jiffies;
421 init_waitqueue_head(&evt->wq);
422
423 return evt;
424} 629}
425 630
631/**
632 * lpfc_bsg_event_free - frees an allocated event structure
633 * @kref: Pointer to a kref.
634 *
635 * Called from kref_put. Back cast the kref into an event structure address.
636 * Free any events to get, delete associated nodes, free any events to see,
637 * free any data then free the event itself.
638 **/
426static void 639static void
427lpfc_ct_event_free(struct lpfc_ct_event *evt) 640lpfc_bsg_event_free(struct kref *kref)
428{ 641{
642 struct lpfc_bsg_event *evt = container_of(kref, struct lpfc_bsg_event,
643 kref);
429 struct event_data *ed; 644 struct event_data *ed;
430 645
431 list_del(&evt->node); 646 list_del(&evt->node);
@@ -447,25 +662,82 @@ lpfc_ct_event_free(struct lpfc_ct_event *evt)
447 kfree(evt); 662 kfree(evt);
448} 663}
449 664
665/**
666 * lpfc_bsg_event_ref - increments the kref for an event
667 * @evt: Pointer to an event structure.
668 **/
450static inline void 669static inline void
451lpfc_ct_event_ref(struct lpfc_ct_event *evt) 670lpfc_bsg_event_ref(struct lpfc_bsg_event *evt)
452{ 671{
453 evt->ref++; 672 kref_get(&evt->kref);
454} 673}
455 674
675/**
676 * lpfc_bsg_event_unref - Uses kref_put to free an event structure
677 * @evt: Pointer to an event structure.
678 **/
456static inline void 679static inline void
457lpfc_ct_event_unref(struct lpfc_ct_event *evt) 680lpfc_bsg_event_unref(struct lpfc_bsg_event *evt)
458{ 681{
459 if (--evt->ref < 0) 682 kref_put(&evt->kref, lpfc_bsg_event_free);
460 lpfc_ct_event_free(evt);
461} 683}
462 684
463#define SLI_CT_ELX_LOOPBACK 0x10 685/**
686 * lpfc_bsg_event_new - allocate and initialize a event structure
687 * @ev_mask: Mask of events.
688 * @ev_reg_id: Event reg id.
689 * @ev_req_id: Event request id.
690 **/
691static struct lpfc_bsg_event *
692lpfc_bsg_event_new(uint32_t ev_mask, int ev_reg_id, uint32_t ev_req_id)
693{
694 struct lpfc_bsg_event *evt = kzalloc(sizeof(*evt), GFP_KERNEL);
464 695
465enum ELX_LOOPBACK_CMD { 696 if (!evt)
466 ELX_LOOPBACK_XRI_SETUP, 697 return NULL;
467 ELX_LOOPBACK_DATA, 698
468}; 699 INIT_LIST_HEAD(&evt->events_to_get);
700 INIT_LIST_HEAD(&evt->events_to_see);
701 evt->type_mask = ev_mask;
702 evt->req_id = ev_req_id;
703 evt->reg_id = ev_reg_id;
704 evt->wait_time_stamp = jiffies;
705 init_waitqueue_head(&evt->wq);
706 kref_init(&evt->kref);
707 return evt;
708}
709
710/**
711 * diag_cmd_data_free - Frees an lpfc dma buffer extension
712 * @phba: Pointer to HBA context object.
713 * @mlist: Pointer to an lpfc dma buffer extension.
714 **/
715static int
716diag_cmd_data_free(struct lpfc_hba *phba, struct lpfc_dmabufext *mlist)
717{
718 struct lpfc_dmabufext *mlast;
719 struct pci_dev *pcidev;
720 struct list_head head, *curr, *next;
721
722 if ((!mlist) || (!lpfc_is_link_up(phba) &&
723 (phba->link_flag & LS_LOOPBACK_MODE))) {
724 return 0;
725 }
726
727 pcidev = phba->pcidev;
728 list_add_tail(&head, &mlist->dma.list);
729
730 list_for_each_safe(curr, next, &head) {
731 mlast = list_entry(curr, struct lpfc_dmabufext , dma.list);
732 if (mlast->dma.virt)
733 dma_free_coherent(&pcidev->dev,
734 mlast->size,
735 mlast->dma.virt,
736 mlast->dma.phys);
737 kfree(mlast);
738 }
739 return 0;
740}
469 741
470/** 742/**
471 * lpfc_bsg_ct_unsol_event - process an unsolicited CT command 743 * lpfc_bsg_ct_unsol_event - process an unsolicited CT command
@@ -474,9 +746,9 @@ enum ELX_LOOPBACK_CMD {
474 * @piocbq: 746 * @piocbq:
475 * 747 *
476 * This function is called when an unsolicited CT command is received. It 748 * This function is called when an unsolicited CT command is received. It
477 * forwards the event to any processes registerd to receive CT events. 749 * forwards the event to any processes registered to receive CT events.
478 */ 750 **/
479void 751int
480lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 752lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
481 struct lpfc_iocbq *piocbq) 753 struct lpfc_iocbq *piocbq)
482{ 754{
@@ -484,7 +756,7 @@ lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
484 uint32_t cmd; 756 uint32_t cmd;
485 uint32_t len; 757 uint32_t len;
486 struct lpfc_dmabuf *dmabuf = NULL; 758 struct lpfc_dmabuf *dmabuf = NULL;
487 struct lpfc_ct_event *evt; 759 struct lpfc_bsg_event *evt;
488 struct event_data *evt_dat = NULL; 760 struct event_data *evt_dat = NULL;
489 struct lpfc_iocbq *iocbq; 761 struct lpfc_iocbq *iocbq;
490 size_t offset = 0; 762 size_t offset = 0;
@@ -496,6 +768,9 @@ lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
496 struct lpfc_dmabuf *bdeBuf2 = piocbq->context3; 768 struct lpfc_dmabuf *bdeBuf2 = piocbq->context3;
497 struct lpfc_hbq_entry *hbqe; 769 struct lpfc_hbq_entry *hbqe;
498 struct lpfc_sli_ct_request *ct_req; 770 struct lpfc_sli_ct_request *ct_req;
771 struct fc_bsg_job *job = NULL;
772 unsigned long flags;
773 int size = 0;
499 774
500 INIT_LIST_HEAD(&head); 775 INIT_LIST_HEAD(&head);
501 list_add_tail(&head, &piocbq->list); 776 list_add_tail(&head, &piocbq->list);
@@ -504,6 +779,10 @@ lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
504 piocbq->iocb.un.cont64[0].tus.f.bdeSize == 0) 779 piocbq->iocb.un.cont64[0].tus.f.bdeSize == 0)
505 goto error_ct_unsol_exit; 780 goto error_ct_unsol_exit;
506 781
782 if (phba->link_state == LPFC_HBA_ERROR ||
783 (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)))
784 goto error_ct_unsol_exit;
785
507 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) 786 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
508 dmabuf = bdeBuf1; 787 dmabuf = bdeBuf1;
509 else { 788 else {
@@ -511,7 +790,8 @@ lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
511 piocbq->iocb.un.cont64[0].addrLow); 790 piocbq->iocb.un.cont64[0].addrLow);
512 dmabuf = lpfc_sli_ringpostbuf_get(phba, pring, dma_addr); 791 dmabuf = lpfc_sli_ringpostbuf_get(phba, pring, dma_addr);
513 } 792 }
514 793 if (dmabuf == NULL)
794 goto error_ct_unsol_exit;
515 ct_req = (struct lpfc_sli_ct_request *)dmabuf->virt; 795 ct_req = (struct lpfc_sli_ct_request *)dmabuf->virt;
516 evt_req_id = ct_req->FsType; 796 evt_req_id = ct_req->FsType;
517 cmd = ct_req->CommandResponse.bits.CmdRsp; 797 cmd = ct_req->CommandResponse.bits.CmdRsp;
@@ -519,24 +799,24 @@ lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
519 if (!(phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) 799 if (!(phba->sli3_options & LPFC_SLI3_HBQ_ENABLED))
520 lpfc_sli_ringpostbuf_put(phba, pring, dmabuf); 800 lpfc_sli_ringpostbuf_put(phba, pring, dmabuf);
521 801
522 mutex_lock(&phba->ct_event_mutex); 802 spin_lock_irqsave(&phba->ct_ev_lock, flags);
523 list_for_each_entry(evt, &phba->ct_ev_waiters, node) { 803 list_for_each_entry(evt, &phba->ct_ev_waiters, node) {
524 if (evt->req_id != evt_req_id) 804 if (!(evt->type_mask & FC_REG_CT_EVENT) ||
805 evt->req_id != evt_req_id)
525 continue; 806 continue;
526 807
527 lpfc_ct_event_ref(evt); 808 lpfc_bsg_event_ref(evt);
528 809 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
529 evt_dat = kzalloc(sizeof(*evt_dat), GFP_KERNEL); 810 evt_dat = kzalloc(sizeof(*evt_dat), GFP_KERNEL);
530 if (!evt_dat) { 811 if (evt_dat == NULL) {
531 lpfc_ct_event_unref(evt); 812 spin_lock_irqsave(&phba->ct_ev_lock, flags);
813 lpfc_bsg_event_unref(evt);
532 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC, 814 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
533 "2614 Memory allocation failed for " 815 "2614 Memory allocation failed for "
534 "CT event\n"); 816 "CT event\n");
535 break; 817 break;
536 } 818 }
537 819
538 mutex_unlock(&phba->ct_event_mutex);
539
540 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) { 820 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
541 /* take accumulated byte count from the last iocbq */ 821 /* take accumulated byte count from the last iocbq */
542 iocbq = list_entry(head.prev, typeof(*iocbq), list); 822 iocbq = list_entry(head.prev, typeof(*iocbq), list);
@@ -550,25 +830,25 @@ lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
550 } 830 }
551 831
552 evt_dat->data = kzalloc(evt_dat->len, GFP_KERNEL); 832 evt_dat->data = kzalloc(evt_dat->len, GFP_KERNEL);
553 if (!evt_dat->data) { 833 if (evt_dat->data == NULL) {
554 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC, 834 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
555 "2615 Memory allocation failed for " 835 "2615 Memory allocation failed for "
556 "CT event data, size %d\n", 836 "CT event data, size %d\n",
557 evt_dat->len); 837 evt_dat->len);
558 kfree(evt_dat); 838 kfree(evt_dat);
559 mutex_lock(&phba->ct_event_mutex); 839 spin_lock_irqsave(&phba->ct_ev_lock, flags);
560 lpfc_ct_event_unref(evt); 840 lpfc_bsg_event_unref(evt);
561 mutex_unlock(&phba->ct_event_mutex); 841 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
562 goto error_ct_unsol_exit; 842 goto error_ct_unsol_exit;
563 } 843 }
564 844
565 list_for_each_entry(iocbq, &head, list) { 845 list_for_each_entry(iocbq, &head, list) {
846 size = 0;
566 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) { 847 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
567 bdeBuf1 = iocbq->context2; 848 bdeBuf1 = iocbq->context2;
568 bdeBuf2 = iocbq->context3; 849 bdeBuf2 = iocbq->context3;
569 } 850 }
570 for (i = 0; i < iocbq->iocb.ulpBdeCount; i++) { 851 for (i = 0; i < iocbq->iocb.ulpBdeCount; i++) {
571 int size = 0;
572 if (phba->sli3_options & 852 if (phba->sli3_options &
573 LPFC_SLI3_HBQ_ENABLED) { 853 LPFC_SLI3_HBQ_ENABLED) {
574 if (i == 0) { 854 if (i == 0) {
@@ -601,9 +881,11 @@ lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
601 iocbq); 881 iocbq);
602 kfree(evt_dat->data); 882 kfree(evt_dat->data);
603 kfree(evt_dat); 883 kfree(evt_dat);
604 mutex_lock(&phba->ct_event_mutex); 884 spin_lock_irqsave(&phba->ct_ev_lock,
605 lpfc_ct_event_unref(evt); 885 flags);
606 mutex_unlock(&phba->ct_event_mutex); 886 lpfc_bsg_event_unref(evt);
887 spin_unlock_irqrestore(
888 &phba->ct_ev_lock, flags);
607 goto error_ct_unsol_exit; 889 goto error_ct_unsol_exit;
608 } 890 }
609 memcpy((char *)(evt_dat->data) + offset, 891 memcpy((char *)(evt_dat->data) + offset,
@@ -616,15 +898,24 @@ lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
616 dmabuf); 898 dmabuf);
617 } else { 899 } else {
618 switch (cmd) { 900 switch (cmd) {
901 case ELX_LOOPBACK_DATA:
902 diag_cmd_data_free(phba,
903 (struct lpfc_dmabufext *)
904 dmabuf);
905 break;
619 case ELX_LOOPBACK_XRI_SETUP: 906 case ELX_LOOPBACK_XRI_SETUP:
620 if (!(phba->sli3_options & 907 if ((phba->sli_rev ==
621 LPFC_SLI3_HBQ_ENABLED)) 908 LPFC_SLI_REV2) ||
909 (phba->sli3_options &
910 LPFC_SLI3_HBQ_ENABLED
911 )) {
912 lpfc_in_buf_free(phba,
913 dmabuf);
914 } else {
622 lpfc_post_buffer(phba, 915 lpfc_post_buffer(phba,
623 pring, 916 pring,
624 1); 917 1);
625 else 918 }
626 lpfc_in_buf_free(phba,
627 dmabuf);
628 break; 919 break;
629 default: 920 default:
630 if (!(phba->sli3_options & 921 if (!(phba->sli3_options &
@@ -638,7 +929,7 @@ lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
638 } 929 }
639 } 930 }
640 931
641 mutex_lock(&phba->ct_event_mutex); 932 spin_lock_irqsave(&phba->ct_ev_lock, flags);
642 if (phba->sli_rev == LPFC_SLI_REV4) { 933 if (phba->sli_rev == LPFC_SLI_REV4) {
643 evt_dat->immed_dat = phba->ctx_idx; 934 evt_dat->immed_dat = phba->ctx_idx;
644 phba->ctx_idx = (phba->ctx_idx + 1) % 64; 935 phba->ctx_idx = (phba->ctx_idx + 1) % 64;
@@ -651,122 +942,144 @@ lpfc_bsg_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
651 942
652 evt_dat->type = FC_REG_CT_EVENT; 943 evt_dat->type = FC_REG_CT_EVENT;
653 list_add(&evt_dat->node, &evt->events_to_see); 944 list_add(&evt_dat->node, &evt->events_to_see);
654 wake_up_interruptible(&evt->wq); 945 if (evt_req_id == SLI_CT_ELX_LOOPBACK) {
655 lpfc_ct_event_unref(evt); 946 wake_up_interruptible(&evt->wq);
656 if (evt_req_id == SLI_CT_ELX_LOOPBACK) 947 lpfc_bsg_event_unref(evt);
657 break; 948 break;
949 }
950
951 list_move(evt->events_to_see.prev, &evt->events_to_get);
952 lpfc_bsg_event_unref(evt);
953
954 job = evt->set_job;
955 evt->set_job = NULL;
956 if (job) {
957 job->reply->reply_payload_rcv_len = size;
958 /* make error code available to userspace */
959 job->reply->result = 0;
960 job->dd_data = NULL;
961 /* complete the job back to userspace */
962 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
963 job->job_done(job);
964 spin_lock_irqsave(&phba->ct_ev_lock, flags);
965 }
658 } 966 }
659 mutex_unlock(&phba->ct_event_mutex); 967 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
660 968
661error_ct_unsol_exit: 969error_ct_unsol_exit:
662 if (!list_empty(&head)) 970 if (!list_empty(&head))
663 list_del(&head); 971 list_del(&head);
664 972 if (evt_req_id == SLI_CT_ELX_LOOPBACK)
665 return; 973 return 0;
974 return 1;
666} 975}
667 976
668/** 977/**
669 * lpfc_bsg_set_event - process a SET_EVENT bsg vendor command 978 * lpfc_bsg_hba_set_event - process a SET_EVENT bsg vendor command
670 * @job: SET_EVENT fc_bsg_job 979 * @job: SET_EVENT fc_bsg_job
671 */ 980 **/
672static int 981static int
673lpfc_bsg_set_event(struct fc_bsg_job *job) 982lpfc_bsg_hba_set_event(struct fc_bsg_job *job)
674{ 983{
675 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata; 984 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata;
676 struct lpfc_hba *phba = vport->phba; 985 struct lpfc_hba *phba = vport->phba;
677 struct set_ct_event *event_req; 986 struct set_ct_event *event_req;
678 struct lpfc_ct_event *evt; 987 struct lpfc_bsg_event *evt;
679 int rc = 0; 988 int rc = 0;
989 struct bsg_job_data *dd_data = NULL;
990 uint32_t ev_mask;
991 unsigned long flags;
680 992
681 if (job->request_len < 993 if (job->request_len <
682 sizeof(struct fc_bsg_request) + sizeof(struct set_ct_event)) { 994 sizeof(struct fc_bsg_request) + sizeof(struct set_ct_event)) {
683 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC, 995 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
684 "2612 Received SET_CT_EVENT below minimum " 996 "2612 Received SET_CT_EVENT below minimum "
685 "size\n"); 997 "size\n");
686 return -EINVAL; 998 rc = -EINVAL;
999 goto job_error;
1000 }
1001
1002 dd_data = kmalloc(sizeof(struct bsg_job_data), GFP_KERNEL);
1003 if (dd_data == NULL) {
1004 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
1005 "2734 Failed allocation of dd_data\n");
1006 rc = -ENOMEM;
1007 goto job_error;
687 } 1008 }
688 1009
689 event_req = (struct set_ct_event *) 1010 event_req = (struct set_ct_event *)
690 job->request->rqst_data.h_vendor.vendor_cmd; 1011 job->request->rqst_data.h_vendor.vendor_cmd;
691 1012 ev_mask = ((uint32_t)(unsigned long)event_req->type_mask &
692 mutex_lock(&phba->ct_event_mutex); 1013 FC_REG_EVENT_MASK);
1014 spin_lock_irqsave(&phba->ct_ev_lock, flags);
693 list_for_each_entry(evt, &phba->ct_ev_waiters, node) { 1015 list_for_each_entry(evt, &phba->ct_ev_waiters, node) {
694 if (evt->reg_id == event_req->ev_reg_id) { 1016 if (evt->reg_id == event_req->ev_reg_id) {
695 lpfc_ct_event_ref(evt); 1017 lpfc_bsg_event_ref(evt);
696 evt->wait_time_stamp = jiffies; 1018 evt->wait_time_stamp = jiffies;
697 break; 1019 break;
698 } 1020 }
699 } 1021 }
700 mutex_unlock(&phba->ct_event_mutex); 1022 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
701 1023
702 if (&evt->node == &phba->ct_ev_waiters) { 1024 if (&evt->node == &phba->ct_ev_waiters) {
703 /* no event waiting struct yet - first call */ 1025 /* no event waiting struct yet - first call */
704 evt = lpfc_ct_event_new(event_req->ev_reg_id, 1026 evt = lpfc_bsg_event_new(ev_mask, event_req->ev_reg_id,
705 event_req->ev_req_id); 1027 event_req->ev_req_id);
706 if (!evt) { 1028 if (!evt) {
707 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC, 1029 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
708 "2617 Failed allocation of event " 1030 "2617 Failed allocation of event "
709 "waiter\n"); 1031 "waiter\n");
710 return -ENOMEM; 1032 rc = -ENOMEM;
1033 goto job_error;
711 } 1034 }
712 1035
713 mutex_lock(&phba->ct_event_mutex); 1036 spin_lock_irqsave(&phba->ct_ev_lock, flags);
714 list_add(&evt->node, &phba->ct_ev_waiters); 1037 list_add(&evt->node, &phba->ct_ev_waiters);
715 lpfc_ct_event_ref(evt); 1038 lpfc_bsg_event_ref(evt);
716 mutex_unlock(&phba->ct_event_mutex); 1039 evt->wait_time_stamp = jiffies;
1040 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
717 } 1041 }
718 1042
1043 spin_lock_irqsave(&phba->ct_ev_lock, flags);
719 evt->waiting = 1; 1044 evt->waiting = 1;
720 if (wait_event_interruptible(evt->wq, 1045 dd_data->type = TYPE_EVT;
721 !list_empty(&evt->events_to_see))) { 1046 dd_data->context_un.evt = evt;
722 mutex_lock(&phba->ct_event_mutex); 1047 evt->set_job = job; /* for unsolicited command */
723 lpfc_ct_event_unref(evt); /* release ref */ 1048 job->dd_data = dd_data; /* for fc transport timeout callback*/
724 lpfc_ct_event_unref(evt); /* delete */ 1049 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
725 mutex_unlock(&phba->ct_event_mutex); 1050 return 0; /* call job done later */
726 rc = -EINTR; 1051
727 goto set_event_out; 1052job_error:
728 } 1053 if (dd_data != NULL)
729 1054 kfree(dd_data);
730 evt->wait_time_stamp = jiffies; 1055
731 evt->waiting = 0; 1056 job->dd_data = NULL;
732 1057 return rc;
733 mutex_lock(&phba->ct_event_mutex);
734 list_move(evt->events_to_see.prev, &evt->events_to_get);
735 lpfc_ct_event_unref(evt); /* release ref */
736 mutex_unlock(&phba->ct_event_mutex);
737
738set_event_out:
739 /* set_event carries no reply payload */
740 job->reply->reply_payload_rcv_len = 0;
741 /* make error code available to userspace */
742 job->reply->result = rc;
743 /* complete the job back to userspace */
744 job->job_done(job);
745
746 return 0;
747} 1058}
748 1059
749/** 1060/**
750 * lpfc_bsg_get_event - process a GET_EVENT bsg vendor command 1061 * lpfc_bsg_hba_get_event - process a GET_EVENT bsg vendor command
751 * @job: GET_EVENT fc_bsg_job 1062 * @job: GET_EVENT fc_bsg_job
752 */ 1063 **/
753static int 1064static int
754lpfc_bsg_get_event(struct fc_bsg_job *job) 1065lpfc_bsg_hba_get_event(struct fc_bsg_job *job)
755{ 1066{
756 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata; 1067 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata;
757 struct lpfc_hba *phba = vport->phba; 1068 struct lpfc_hba *phba = vport->phba;
758 struct get_ct_event *event_req; 1069 struct get_ct_event *event_req;
759 struct get_ct_event_reply *event_reply; 1070 struct get_ct_event_reply *event_reply;
760 struct lpfc_ct_event *evt; 1071 struct lpfc_bsg_event *evt;
761 struct event_data *evt_dat = NULL; 1072 struct event_data *evt_dat = NULL;
762 int rc = 0; 1073 unsigned long flags;
1074 uint32_t rc = 0;
763 1075
764 if (job->request_len < 1076 if (job->request_len <
765 sizeof(struct fc_bsg_request) + sizeof(struct get_ct_event)) { 1077 sizeof(struct fc_bsg_request) + sizeof(struct get_ct_event)) {
766 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC, 1078 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
767 "2613 Received GET_CT_EVENT request below " 1079 "2613 Received GET_CT_EVENT request below "
768 "minimum size\n"); 1080 "minimum size\n");
769 return -EINVAL; 1081 rc = -EINVAL;
1082 goto job_error;
770 } 1083 }
771 1084
772 event_req = (struct get_ct_event *) 1085 event_req = (struct get_ct_event *)
@@ -774,13 +1087,12 @@ lpfc_bsg_get_event(struct fc_bsg_job *job)
774 1087
775 event_reply = (struct get_ct_event_reply *) 1088 event_reply = (struct get_ct_event_reply *)
776 job->reply->reply_data.vendor_reply.vendor_rsp; 1089 job->reply->reply_data.vendor_reply.vendor_rsp;
777 1090 spin_lock_irqsave(&phba->ct_ev_lock, flags);
778 mutex_lock(&phba->ct_event_mutex);
779 list_for_each_entry(evt, &phba->ct_ev_waiters, node) { 1091 list_for_each_entry(evt, &phba->ct_ev_waiters, node) {
780 if (evt->reg_id == event_req->ev_reg_id) { 1092 if (evt->reg_id == event_req->ev_reg_id) {
781 if (list_empty(&evt->events_to_get)) 1093 if (list_empty(&evt->events_to_get))
782 break; 1094 break;
783 lpfc_ct_event_ref(evt); 1095 lpfc_bsg_event_ref(evt);
784 evt->wait_time_stamp = jiffies; 1096 evt->wait_time_stamp = jiffies;
785 evt_dat = list_entry(evt->events_to_get.prev, 1097 evt_dat = list_entry(evt->events_to_get.prev,
786 struct event_data, node); 1098 struct event_data, node);
@@ -788,45 +1100,1539 @@ lpfc_bsg_get_event(struct fc_bsg_job *job)
788 break; 1100 break;
789 } 1101 }
790 } 1102 }
791 mutex_unlock(&phba->ct_event_mutex); 1103 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
792 1104
793 if (!evt_dat) { 1105 /* The app may continue to ask for event data until it gets
1106 * an error indicating that there isn't anymore
1107 */
1108 if (evt_dat == NULL) {
794 job->reply->reply_payload_rcv_len = 0; 1109 job->reply->reply_payload_rcv_len = 0;
795 rc = -ENOENT; 1110 rc = -ENOENT;
796 goto error_get_event_exit; 1111 goto job_error;
797 } 1112 }
798 1113
799 if (evt_dat->len > job->reply_payload.payload_len) { 1114 if (evt_dat->len > job->request_payload.payload_len) {
800 evt_dat->len = job->reply_payload.payload_len; 1115 evt_dat->len = job->request_payload.payload_len;
801 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC, 1116 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
802 "2618 Truncated event data at %d " 1117 "2618 Truncated event data at %d "
803 "bytes\n", 1118 "bytes\n",
804 job->reply_payload.payload_len); 1119 job->request_payload.payload_len);
805 } 1120 }
806 1121
1122 event_reply->type = evt_dat->type;
807 event_reply->immed_data = evt_dat->immed_dat; 1123 event_reply->immed_data = evt_dat->immed_dat;
808
809 if (evt_dat->len > 0) 1124 if (evt_dat->len > 0)
810 job->reply->reply_payload_rcv_len = 1125 job->reply->reply_payload_rcv_len =
811 sg_copy_from_buffer(job->reply_payload.sg_list, 1126 sg_copy_from_buffer(job->request_payload.sg_list,
812 job->reply_payload.sg_cnt, 1127 job->request_payload.sg_cnt,
813 evt_dat->data, evt_dat->len); 1128 evt_dat->data, evt_dat->len);
814 else 1129 else
815 job->reply->reply_payload_rcv_len = 0; 1130 job->reply->reply_payload_rcv_len = 0;
816 rc = 0;
817 1131
818 if (evt_dat) 1132 if (evt_dat) {
819 kfree(evt_dat->data); 1133 kfree(evt_dat->data);
820 kfree(evt_dat); 1134 kfree(evt_dat);
821 mutex_lock(&phba->ct_event_mutex); 1135 }
822 lpfc_ct_event_unref(evt); 1136
823 mutex_unlock(&phba->ct_event_mutex); 1137 spin_lock_irqsave(&phba->ct_ev_lock, flags);
1138 lpfc_bsg_event_unref(evt);
1139 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
1140 job->dd_data = NULL;
1141 job->reply->result = 0;
1142 job->job_done(job);
1143 return 0;
1144
1145job_error:
1146 job->dd_data = NULL;
1147 job->reply->result = rc;
1148 return rc;
1149}
1150
1151/**
1152 * lpfc_issue_ct_rsp_cmp - lpfc_issue_ct_rsp's completion handler
1153 * @phba: Pointer to HBA context object.
1154 * @cmdiocbq: Pointer to command iocb.
1155 * @rspiocbq: Pointer to response iocb.
1156 *
1157 * This function is the completion handler for iocbs issued using
1158 * lpfc_issue_ct_rsp_cmp function. This function is called by the
1159 * ring event handler function without any lock held. This function
1160 * can be called from both worker thread context and interrupt
1161 * context. This function also can be called from other thread which
1162 * cleans up the SLI layer objects.
1163 * This function copy the contents of the response iocb to the
1164 * response iocb memory object provided by the caller of
1165 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
1166 * sleeps for the iocb completion.
1167 **/
1168static void
1169lpfc_issue_ct_rsp_cmp(struct lpfc_hba *phba,
1170 struct lpfc_iocbq *cmdiocbq,
1171 struct lpfc_iocbq *rspiocbq)
1172{
1173 struct bsg_job_data *dd_data;
1174 struct fc_bsg_job *job;
1175 IOCB_t *rsp;
1176 struct lpfc_dmabuf *bmp;
1177 struct lpfc_nodelist *ndlp;
1178 unsigned long flags;
1179 int rc = 0;
1180
1181 spin_lock_irqsave(&phba->ct_ev_lock, flags);
1182 dd_data = cmdiocbq->context1;
1183 /* normal completion and timeout crossed paths, already done */
1184 if (!dd_data) {
1185 spin_unlock_irqrestore(&phba->hbalock, flags);
1186 return;
1187 }
824 1188
825error_get_event_exit: 1189 job = dd_data->context_un.iocb.set_job;
1190 bmp = dd_data->context_un.iocb.bmp;
1191 rsp = &rspiocbq->iocb;
1192 ndlp = dd_data->context_un.iocb.ndlp;
1193
1194 pci_unmap_sg(phba->pcidev, job->request_payload.sg_list,
1195 job->request_payload.sg_cnt, DMA_TO_DEVICE);
1196
1197 if (rsp->ulpStatus) {
1198 if (rsp->ulpStatus == IOSTAT_LOCAL_REJECT) {
1199 switch (rsp->un.ulpWord[4] & 0xff) {
1200 case IOERR_SEQUENCE_TIMEOUT:
1201 rc = -ETIMEDOUT;
1202 break;
1203 case IOERR_INVALID_RPI:
1204 rc = -EFAULT;
1205 break;
1206 default:
1207 rc = -EACCES;
1208 break;
1209 }
1210 } else
1211 rc = -EACCES;
1212 } else
1213 job->reply->reply_payload_rcv_len =
1214 rsp->un.genreq64.bdl.bdeSize;
1215
1216 lpfc_mbuf_free(phba, bmp->virt, bmp->phys);
1217 lpfc_sli_release_iocbq(phba, cmdiocbq);
1218 lpfc_nlp_put(ndlp);
1219 kfree(bmp);
1220 kfree(dd_data);
826 /* make error code available to userspace */ 1221 /* make error code available to userspace */
827 job->reply->result = rc; 1222 job->reply->result = rc;
1223 job->dd_data = NULL;
828 /* complete the job back to userspace */ 1224 /* complete the job back to userspace */
829 job->job_done(job); 1225 job->job_done(job);
1226 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
1227 return;
1228}
1229
1230/**
1231 * lpfc_issue_ct_rsp - issue a ct response
1232 * @phba: Pointer to HBA context object.
1233 * @job: Pointer to the job object.
1234 * @tag: tag index value into the ports context exchange array.
1235 * @bmp: Pointer to a dma buffer descriptor.
1236 * @num_entry: Number of enties in the bde.
1237 **/
1238static int
1239lpfc_issue_ct_rsp(struct lpfc_hba *phba, struct fc_bsg_job *job, uint32_t tag,
1240 struct lpfc_dmabuf *bmp, int num_entry)
1241{
1242 IOCB_t *icmd;
1243 struct lpfc_iocbq *ctiocb = NULL;
1244 int rc = 0;
1245 struct lpfc_nodelist *ndlp = NULL;
1246 struct bsg_job_data *dd_data;
1247 uint32_t creg_val;
1248
1249 /* allocate our bsg tracking structure */
1250 dd_data = kmalloc(sizeof(struct bsg_job_data), GFP_KERNEL);
1251 if (!dd_data) {
1252 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
1253 "2736 Failed allocation of dd_data\n");
1254 rc = -ENOMEM;
1255 goto no_dd_data;
1256 }
1257
1258 /* Allocate buffer for command iocb */
1259 ctiocb = lpfc_sli_get_iocbq(phba);
1260 if (!ctiocb) {
1261 rc = ENOMEM;
1262 goto no_ctiocb;
1263 }
1264
1265 icmd = &ctiocb->iocb;
1266 icmd->un.xseq64.bdl.ulpIoTag32 = 0;
1267 icmd->un.xseq64.bdl.addrHigh = putPaddrHigh(bmp->phys);
1268 icmd->un.xseq64.bdl.addrLow = putPaddrLow(bmp->phys);
1269 icmd->un.xseq64.bdl.bdeFlags = BUFF_TYPE_BLP_64;
1270 icmd->un.xseq64.bdl.bdeSize = (num_entry * sizeof(struct ulp_bde64));
1271 icmd->un.xseq64.w5.hcsw.Fctl = (LS | LA);
1272 icmd->un.xseq64.w5.hcsw.Dfctl = 0;
1273 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_DD_SOL_CTL;
1274 icmd->un.xseq64.w5.hcsw.Type = FC_TYPE_CT;
1275
1276 /* Fill in rest of iocb */
1277 icmd->ulpCommand = CMD_XMIT_SEQUENCE64_CX;
1278 icmd->ulpBdeCount = 1;
1279 icmd->ulpLe = 1;
1280 icmd->ulpClass = CLASS3;
1281 if (phba->sli_rev == LPFC_SLI_REV4) {
1282 /* Do not issue unsol response if oxid not marked as valid */
1283 if (!(phba->ct_ctx[tag].flags & UNSOL_VALID)) {
1284 rc = IOCB_ERROR;
1285 goto issue_ct_rsp_exit;
1286 }
1287 icmd->ulpContext = phba->ct_ctx[tag].oxid;
1288 ndlp = lpfc_findnode_did(phba->pport, phba->ct_ctx[tag].SID);
1289 if (!ndlp) {
1290 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS,
1291 "2721 ndlp null for oxid %x SID %x\n",
1292 icmd->ulpContext,
1293 phba->ct_ctx[tag].SID);
1294 rc = IOCB_ERROR;
1295 goto issue_ct_rsp_exit;
1296 }
1297 icmd->un.ulpWord[3] = ndlp->nlp_rpi;
1298 /* The exchange is done, mark the entry as invalid */
1299 phba->ct_ctx[tag].flags &= ~UNSOL_VALID;
1300 } else
1301 icmd->ulpContext = (ushort) tag;
1302
1303 icmd->ulpTimeout = phba->fc_ratov * 2;
1304
1305 /* Xmit CT response on exchange <xid> */
1306 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
1307 "2722 Xmit CT response on exchange x%x Data: x%x x%x\n",
1308 icmd->ulpContext, icmd->ulpIoTag, phba->link_state);
1309
1310 ctiocb->iocb_cmpl = NULL;
1311 ctiocb->iocb_flag |= LPFC_IO_LIBDFC;
1312 ctiocb->vport = phba->pport;
1313 ctiocb->context3 = bmp;
1314
1315 ctiocb->iocb_cmpl = lpfc_issue_ct_rsp_cmp;
1316 ctiocb->context1 = dd_data;
1317 ctiocb->context2 = NULL;
1318 dd_data->type = TYPE_IOCB;
1319 dd_data->context_un.iocb.cmdiocbq = ctiocb;
1320 dd_data->context_un.iocb.rspiocbq = NULL;
1321 dd_data->context_un.iocb.set_job = job;
1322 dd_data->context_un.iocb.bmp = bmp;
1323 dd_data->context_un.iocb.ndlp = ndlp;
1324
1325 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
1326 creg_val = readl(phba->HCregaddr);
1327 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
1328 writel(creg_val, phba->HCregaddr);
1329 readl(phba->HCregaddr); /* flush */
1330 }
1331
1332 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, ctiocb, 0);
1333
1334 if (rc == IOCB_SUCCESS)
1335 return 0; /* done for now */
1336
1337issue_ct_rsp_exit:
1338 lpfc_sli_release_iocbq(phba, ctiocb);
1339no_ctiocb:
1340 kfree(dd_data);
1341no_dd_data:
1342 return rc;
1343}
1344
1345/**
1346 * lpfc_bsg_send_mgmt_rsp - process a SEND_MGMT_RESP bsg vendor command
1347 * @job: SEND_MGMT_RESP fc_bsg_job
1348 **/
1349static int
1350lpfc_bsg_send_mgmt_rsp(struct fc_bsg_job *job)
1351{
1352 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata;
1353 struct lpfc_hba *phba = vport->phba;
1354 struct send_mgmt_resp *mgmt_resp = (struct send_mgmt_resp *)
1355 job->request->rqst_data.h_vendor.vendor_cmd;
1356 struct ulp_bde64 *bpl;
1357 struct lpfc_dmabuf *bmp = NULL;
1358 struct scatterlist *sgel = NULL;
1359 int request_nseg;
1360 int numbde;
1361 dma_addr_t busaddr;
1362 uint32_t tag = mgmt_resp->tag;
1363 unsigned long reqbfrcnt =
1364 (unsigned long)job->request_payload.payload_len;
1365 int rc = 0;
1366
1367 /* in case no data is transferred */
1368 job->reply->reply_payload_rcv_len = 0;
1369
1370 if (!reqbfrcnt || (reqbfrcnt > (80 * BUF_SZ_4K))) {
1371 rc = -ERANGE;
1372 goto send_mgmt_rsp_exit;
1373 }
1374
1375 bmp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
1376 if (!bmp) {
1377 rc = -ENOMEM;
1378 goto send_mgmt_rsp_exit;
1379 }
1380
1381 bmp->virt = lpfc_mbuf_alloc(phba, 0, &bmp->phys);
1382 if (!bmp->virt) {
1383 rc = -ENOMEM;
1384 goto send_mgmt_rsp_free_bmp;
1385 }
1386
1387 INIT_LIST_HEAD(&bmp->list);
1388 bpl = (struct ulp_bde64 *) bmp->virt;
1389 request_nseg = pci_map_sg(phba->pcidev, job->request_payload.sg_list,
1390 job->request_payload.sg_cnt, DMA_TO_DEVICE);
1391 for_each_sg(job->request_payload.sg_list, sgel, request_nseg, numbde) {
1392 busaddr = sg_dma_address(sgel);
1393 bpl->tus.f.bdeFlags = BUFF_TYPE_BDE_64;
1394 bpl->tus.f.bdeSize = sg_dma_len(sgel);
1395 bpl->tus.w = cpu_to_le32(bpl->tus.w);
1396 bpl->addrLow = cpu_to_le32(putPaddrLow(busaddr));
1397 bpl->addrHigh = cpu_to_le32(putPaddrHigh(busaddr));
1398 bpl++;
1399 }
1400
1401 rc = lpfc_issue_ct_rsp(phba, job, tag, bmp, request_nseg);
1402
1403 if (rc == IOCB_SUCCESS)
1404 return 0; /* done for now */
1405
1406 /* TBD need to handle a timeout */
1407 pci_unmap_sg(phba->pcidev, job->request_payload.sg_list,
1408 job->request_payload.sg_cnt, DMA_TO_DEVICE);
1409 rc = -EACCES;
1410 lpfc_mbuf_free(phba, bmp->virt, bmp->phys);
1411
1412send_mgmt_rsp_free_bmp:
1413 kfree(bmp);
1414send_mgmt_rsp_exit:
1415 /* make error code available to userspace */
1416 job->reply->result = rc;
1417 job->dd_data = NULL;
1418 return rc;
1419}
1420
1421/**
1422 * lpfc_bsg_diag_mode - process a LPFC_BSG_VENDOR_DIAG_MODE bsg vendor command
1423 * @job: LPFC_BSG_VENDOR_DIAG_MODE
1424 *
1425 * This function is responsible for placing a port into diagnostic loopback
1426 * mode in order to perform a diagnostic loopback test.
1427 * All new scsi requests are blocked, a small delay is used to allow the
1428 * scsi requests to complete then the link is brought down. If the link is
1429 * is placed in loopback mode then scsi requests are again allowed
1430 * so the scsi mid-layer doesn't give up on the port.
1431 * All of this is done in-line.
1432 */
1433static int
1434lpfc_bsg_diag_mode(struct fc_bsg_job *job)
1435{
1436 struct Scsi_Host *shost = job->shost;
1437 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata;
1438 struct lpfc_hba *phba = vport->phba;
1439 struct diag_mode_set *loopback_mode;
1440 struct lpfc_sli *psli = &phba->sli;
1441 struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
1442 uint32_t link_flags;
1443 uint32_t timeout;
1444 struct lpfc_vport **vports;
1445 LPFC_MBOXQ_t *pmboxq;
1446 int mbxstatus;
1447 int i = 0;
1448 int rc = 0;
1449
1450 /* no data to return just the return code */
1451 job->reply->reply_payload_rcv_len = 0;
1452
1453 if (job->request_len <
1454 sizeof(struct fc_bsg_request) + sizeof(struct diag_mode_set)) {
1455 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
1456 "2738 Received DIAG MODE request below minimum "
1457 "size\n");
1458 rc = -EINVAL;
1459 goto job_error;
1460 }
1461
1462 loopback_mode = (struct diag_mode_set *)
1463 job->request->rqst_data.h_vendor.vendor_cmd;
1464 link_flags = loopback_mode->type;
1465 timeout = loopback_mode->timeout;
1466
1467 if ((phba->link_state == LPFC_HBA_ERROR) ||
1468 (psli->sli_flag & LPFC_BLOCK_MGMT_IO) ||
1469 (!(psli->sli_flag & LPFC_SLI_ACTIVE))) {
1470 rc = -EACCES;
1471 goto job_error;
1472 }
1473
1474 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1475 if (!pmboxq) {
1476 rc = -ENOMEM;
1477 goto job_error;
1478 }
1479
1480 vports = lpfc_create_vport_work_array(phba);
1481 if (vports) {
1482 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
1483 shost = lpfc_shost_from_vport(vports[i]);
1484 scsi_block_requests(shost);
1485 }
1486
1487 lpfc_destroy_vport_work_array(phba, vports);
1488 } else {
1489 shost = lpfc_shost_from_vport(phba->pport);
1490 scsi_block_requests(shost);
1491 }
1492
1493 while (pring->txcmplq_cnt) {
1494 if (i++ > 500) /* wait up to 5 seconds */
1495 break;
1496
1497 msleep(10);
1498 }
1499
1500 memset((void *)pmboxq, 0, sizeof(LPFC_MBOXQ_t));
1501 pmboxq->u.mb.mbxCommand = MBX_DOWN_LINK;
1502 pmboxq->u.mb.mbxOwner = OWN_HOST;
1503
1504 mbxstatus = lpfc_sli_issue_mbox_wait(phba, pmboxq, LPFC_MBOX_TMO);
1505
1506 if ((mbxstatus == MBX_SUCCESS) && (pmboxq->u.mb.mbxStatus == 0)) {
1507 /* wait for link down before proceeding */
1508 i = 0;
1509 while (phba->link_state != LPFC_LINK_DOWN) {
1510 if (i++ > timeout) {
1511 rc = -ETIMEDOUT;
1512 goto loopback_mode_exit;
1513 }
1514
1515 msleep(10);
1516 }
1517
1518 memset((void *)pmboxq, 0, sizeof(LPFC_MBOXQ_t));
1519 if (link_flags == INTERNAL_LOOP_BACK)
1520 pmboxq->u.mb.un.varInitLnk.link_flags = FLAGS_LOCAL_LB;
1521 else
1522 pmboxq->u.mb.un.varInitLnk.link_flags =
1523 FLAGS_TOPOLOGY_MODE_LOOP;
1524
1525 pmboxq->u.mb.mbxCommand = MBX_INIT_LINK;
1526 pmboxq->u.mb.mbxOwner = OWN_HOST;
1527
1528 mbxstatus = lpfc_sli_issue_mbox_wait(phba, pmboxq,
1529 LPFC_MBOX_TMO);
1530
1531 if ((mbxstatus != MBX_SUCCESS) || (pmboxq->u.mb.mbxStatus))
1532 rc = -ENODEV;
1533 else {
1534 phba->link_flag |= LS_LOOPBACK_MODE;
1535 /* wait for the link attention interrupt */
1536 msleep(100);
1537
1538 i = 0;
1539 while (phba->link_state != LPFC_HBA_READY) {
1540 if (i++ > timeout) {
1541 rc = -ETIMEDOUT;
1542 break;
1543 }
1544
1545 msleep(10);
1546 }
1547 }
1548
1549 } else
1550 rc = -ENODEV;
1551
1552loopback_mode_exit:
1553 vports = lpfc_create_vport_work_array(phba);
1554 if (vports) {
1555 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
1556 shost = lpfc_shost_from_vport(vports[i]);
1557 scsi_unblock_requests(shost);
1558 }
1559 lpfc_destroy_vport_work_array(phba, vports);
1560 } else {
1561 shost = lpfc_shost_from_vport(phba->pport);
1562 scsi_unblock_requests(shost);
1563 }
1564
1565 /*
1566 * Let SLI layer release mboxq if mbox command completed after timeout.
1567 */
1568 if (mbxstatus != MBX_TIMEOUT)
1569 mempool_free(pmboxq, phba->mbox_mem_pool);
1570
1571job_error:
1572 /* make error code available to userspace */
1573 job->reply->result = rc;
1574 /* complete the job back to userspace if no error */
1575 if (rc == 0)
1576 job->job_done(job);
1577 return rc;
1578}
1579
1580/**
1581 * lpfcdiag_loop_self_reg - obtains a remote port login id
1582 * @phba: Pointer to HBA context object
1583 * @rpi: Pointer to a remote port login id
1584 *
1585 * This function obtains a remote port login id so the diag loopback test
1586 * can send and receive its own unsolicited CT command.
1587 **/
1588static int lpfcdiag_loop_self_reg(struct lpfc_hba *phba, uint16_t * rpi)
1589{
1590 LPFC_MBOXQ_t *mbox;
1591 struct lpfc_dmabuf *dmabuff;
1592 int status;
1593
1594 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1595 if (!mbox)
1596 return ENOMEM;
1597
1598 status = lpfc_reg_rpi(phba, 0, phba->pport->fc_myDID,
1599 (uint8_t *)&phba->pport->fc_sparam, mbox, 0);
1600 if (status) {
1601 mempool_free(mbox, phba->mbox_mem_pool);
1602 return ENOMEM;
1603 }
1604
1605 dmabuff = (struct lpfc_dmabuf *) mbox->context1;
1606 mbox->context1 = NULL;
1607 status = lpfc_sli_issue_mbox_wait(phba, mbox, LPFC_MBOX_TMO);
1608
1609 if ((status != MBX_SUCCESS) || (mbox->u.mb.mbxStatus)) {
1610 lpfc_mbuf_free(phba, dmabuff->virt, dmabuff->phys);
1611 kfree(dmabuff);
1612 if (status != MBX_TIMEOUT)
1613 mempool_free(mbox, phba->mbox_mem_pool);
1614 return ENODEV;
1615 }
1616
1617 *rpi = mbox->u.mb.un.varWords[0];
1618
1619 lpfc_mbuf_free(phba, dmabuff->virt, dmabuff->phys);
1620 kfree(dmabuff);
1621 mempool_free(mbox, phba->mbox_mem_pool);
1622 return 0;
1623}
1624
1625/**
1626 * lpfcdiag_loop_self_unreg - unregs from the rpi
1627 * @phba: Pointer to HBA context object
1628 * @rpi: Remote port login id
1629 *
1630 * This function unregisters the rpi obtained in lpfcdiag_loop_self_reg
1631 **/
1632static int lpfcdiag_loop_self_unreg(struct lpfc_hba *phba, uint16_t rpi)
1633{
1634 LPFC_MBOXQ_t *mbox;
1635 int status;
1636
1637 /* Allocate mboxq structure */
1638 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1639 if (mbox == NULL)
1640 return ENOMEM;
1641
1642 lpfc_unreg_login(phba, 0, rpi, mbox);
1643 status = lpfc_sli_issue_mbox_wait(phba, mbox, LPFC_MBOX_TMO);
1644
1645 if ((status != MBX_SUCCESS) || (mbox->u.mb.mbxStatus)) {
1646 if (status != MBX_TIMEOUT)
1647 mempool_free(mbox, phba->mbox_mem_pool);
1648 return EIO;
1649 }
1650
1651 mempool_free(mbox, phba->mbox_mem_pool);
1652 return 0;
1653}
1654
1655/**
1656 * lpfcdiag_loop_get_xri - obtains the transmit and receive ids
1657 * @phba: Pointer to HBA context object
1658 * @rpi: Remote port login id
1659 * @txxri: Pointer to transmit exchange id
1660 * @rxxri: Pointer to response exchabge id
1661 *
1662 * This function obtains the transmit and receive ids required to send
1663 * an unsolicited ct command with a payload. A special lpfc FsType and CmdRsp
1664 * flags are used to the unsolicted response handler is able to process
1665 * the ct command sent on the same port.
1666 **/
1667static int lpfcdiag_loop_get_xri(struct lpfc_hba *phba, uint16_t rpi,
1668 uint16_t *txxri, uint16_t * rxxri)
1669{
1670 struct lpfc_bsg_event *evt;
1671 struct lpfc_iocbq *cmdiocbq, *rspiocbq;
1672 IOCB_t *cmd, *rsp;
1673 struct lpfc_dmabuf *dmabuf;
1674 struct ulp_bde64 *bpl = NULL;
1675 struct lpfc_sli_ct_request *ctreq = NULL;
1676 int ret_val = 0;
1677 unsigned long flags;
1678
1679 *txxri = 0;
1680 *rxxri = 0;
1681 evt = lpfc_bsg_event_new(FC_REG_CT_EVENT, current->pid,
1682 SLI_CT_ELX_LOOPBACK);
1683 if (!evt)
1684 return ENOMEM;
1685
1686 spin_lock_irqsave(&phba->ct_ev_lock, flags);
1687 list_add(&evt->node, &phba->ct_ev_waiters);
1688 lpfc_bsg_event_ref(evt);
1689 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
1690
1691 cmdiocbq = lpfc_sli_get_iocbq(phba);
1692 rspiocbq = lpfc_sli_get_iocbq(phba);
1693
1694 dmabuf = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
1695 if (dmabuf) {
1696 dmabuf->virt = lpfc_mbuf_alloc(phba, 0, &dmabuf->phys);
1697 INIT_LIST_HEAD(&dmabuf->list);
1698 bpl = (struct ulp_bde64 *) dmabuf->virt;
1699 memset(bpl, 0, sizeof(*bpl));
1700 ctreq = (struct lpfc_sli_ct_request *)(bpl + 1);
1701 bpl->addrHigh =
1702 le32_to_cpu(putPaddrHigh(dmabuf->phys + sizeof(*bpl)));
1703 bpl->addrLow =
1704 le32_to_cpu(putPaddrLow(dmabuf->phys + sizeof(*bpl)));
1705 bpl->tus.f.bdeFlags = 0;
1706 bpl->tus.f.bdeSize = ELX_LOOPBACK_HEADER_SZ;
1707 bpl->tus.w = le32_to_cpu(bpl->tus.w);
1708 }
1709
1710 if (cmdiocbq == NULL || rspiocbq == NULL ||
1711 dmabuf == NULL || bpl == NULL || ctreq == NULL) {
1712 ret_val = ENOMEM;
1713 goto err_get_xri_exit;
1714 }
1715
1716 cmd = &cmdiocbq->iocb;
1717 rsp = &rspiocbq->iocb;
1718
1719 memset(ctreq, 0, ELX_LOOPBACK_HEADER_SZ);
1720
1721 ctreq->RevisionId.bits.Revision = SLI_CT_REVISION;
1722 ctreq->RevisionId.bits.InId = 0;
1723 ctreq->FsType = SLI_CT_ELX_LOOPBACK;
1724 ctreq->FsSubType = 0;
1725 ctreq->CommandResponse.bits.CmdRsp = ELX_LOOPBACK_XRI_SETUP;
1726 ctreq->CommandResponse.bits.Size = 0;
1727
1728
1729 cmd->un.xseq64.bdl.addrHigh = putPaddrHigh(dmabuf->phys);
1730 cmd->un.xseq64.bdl.addrLow = putPaddrLow(dmabuf->phys);
1731 cmd->un.xseq64.bdl.bdeFlags = BUFF_TYPE_BLP_64;
1732 cmd->un.xseq64.bdl.bdeSize = sizeof(*bpl);
1733
1734 cmd->un.xseq64.w5.hcsw.Fctl = LA;
1735 cmd->un.xseq64.w5.hcsw.Dfctl = 0;
1736 cmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_DD_UNSOL_CTL;
1737 cmd->un.xseq64.w5.hcsw.Type = FC_TYPE_CT;
1738
1739 cmd->ulpCommand = CMD_XMIT_SEQUENCE64_CR;
1740 cmd->ulpBdeCount = 1;
1741 cmd->ulpLe = 1;
1742 cmd->ulpClass = CLASS3;
1743 cmd->ulpContext = rpi;
1744
1745 cmdiocbq->iocb_flag |= LPFC_IO_LIBDFC;
1746 cmdiocbq->vport = phba->pport;
1747
1748 ret_val = lpfc_sli_issue_iocb_wait(phba, LPFC_ELS_RING, cmdiocbq,
1749 rspiocbq,
1750 (phba->fc_ratov * 2)
1751 + LPFC_DRVR_TIMEOUT);
1752 if (ret_val)
1753 goto err_get_xri_exit;
1754
1755 *txxri = rsp->ulpContext;
1756
1757 evt->waiting = 1;
1758 evt->wait_time_stamp = jiffies;
1759 ret_val = wait_event_interruptible_timeout(
1760 evt->wq, !list_empty(&evt->events_to_see),
1761 ((phba->fc_ratov * 2) + LPFC_DRVR_TIMEOUT) * HZ);
1762 if (list_empty(&evt->events_to_see))
1763 ret_val = (ret_val) ? EINTR : ETIMEDOUT;
1764 else {
1765 ret_val = IOCB_SUCCESS;
1766 spin_lock_irqsave(&phba->ct_ev_lock, flags);
1767 list_move(evt->events_to_see.prev, &evt->events_to_get);
1768 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
1769 *rxxri = (list_entry(evt->events_to_get.prev,
1770 typeof(struct event_data),
1771 node))->immed_dat;
1772 }
1773 evt->waiting = 0;
1774
1775err_get_xri_exit:
1776 spin_lock_irqsave(&phba->ct_ev_lock, flags);
1777 lpfc_bsg_event_unref(evt); /* release ref */
1778 lpfc_bsg_event_unref(evt); /* delete */
1779 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
1780
1781 if (dmabuf) {
1782 if (dmabuf->virt)
1783 lpfc_mbuf_free(phba, dmabuf->virt, dmabuf->phys);
1784 kfree(dmabuf);
1785 }
1786
1787 if (cmdiocbq && (ret_val != IOCB_TIMEDOUT))
1788 lpfc_sli_release_iocbq(phba, cmdiocbq);
1789 if (rspiocbq)
1790 lpfc_sli_release_iocbq(phba, rspiocbq);
1791 return ret_val;
1792}
1793
1794/**
1795 * diag_cmd_data_alloc - fills in a bde struct with dma buffers
1796 * @phba: Pointer to HBA context object
1797 * @bpl: Pointer to 64 bit bde structure
1798 * @size: Number of bytes to process
1799 * @nocopydata: Flag to copy user data into the allocated buffer
1800 *
1801 * This function allocates page size buffers and populates an lpfc_dmabufext.
1802 * If allowed the user data pointed to with indataptr is copied into the kernel
1803 * memory. The chained list of page size buffers is returned.
1804 **/
1805static struct lpfc_dmabufext *
1806diag_cmd_data_alloc(struct lpfc_hba *phba,
1807 struct ulp_bde64 *bpl, uint32_t size,
1808 int nocopydata)
1809{
1810 struct lpfc_dmabufext *mlist = NULL;
1811 struct lpfc_dmabufext *dmp;
1812 int cnt, offset = 0, i = 0;
1813 struct pci_dev *pcidev;
1814
1815 pcidev = phba->pcidev;
1816
1817 while (size) {
1818 /* We get chunks of 4K */
1819 if (size > BUF_SZ_4K)
1820 cnt = BUF_SZ_4K;
1821 else
1822 cnt = size;
1823
1824 /* allocate struct lpfc_dmabufext buffer header */
1825 dmp = kmalloc(sizeof(struct lpfc_dmabufext), GFP_KERNEL);
1826 if (!dmp)
1827 goto out;
1828
1829 INIT_LIST_HEAD(&dmp->dma.list);
1830
1831 /* Queue it to a linked list */
1832 if (mlist)
1833 list_add_tail(&dmp->dma.list, &mlist->dma.list);
1834 else
1835 mlist = dmp;
1836
1837 /* allocate buffer */
1838 dmp->dma.virt = dma_alloc_coherent(&pcidev->dev,
1839 cnt,
1840 &(dmp->dma.phys),
1841 GFP_KERNEL);
1842
1843 if (!dmp->dma.virt)
1844 goto out;
1845
1846 dmp->size = cnt;
1847
1848 if (nocopydata) {
1849 bpl->tus.f.bdeFlags = 0;
1850 pci_dma_sync_single_for_device(phba->pcidev,
1851 dmp->dma.phys, LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
1852
1853 } else {
1854 memset((uint8_t *)dmp->dma.virt, 0, cnt);
1855 bpl->tus.f.bdeFlags = BUFF_TYPE_BDE_64I;
1856 }
1857
1858 /* build buffer ptr list for IOCB */
1859 bpl->addrLow = le32_to_cpu(putPaddrLow(dmp->dma.phys));
1860 bpl->addrHigh = le32_to_cpu(putPaddrHigh(dmp->dma.phys));
1861 bpl->tus.f.bdeSize = (ushort) cnt;
1862 bpl->tus.w = le32_to_cpu(bpl->tus.w);
1863 bpl++;
1864
1865 i++;
1866 offset += cnt;
1867 size -= cnt;
1868 }
1869
1870 mlist->flag = i;
1871 return mlist;
1872out:
1873 diag_cmd_data_free(phba, mlist);
1874 return NULL;
1875}
1876
1877/**
1878 * lpfcdiag_loop_post_rxbufs - post the receive buffers for an unsol CT cmd
1879 * @phba: Pointer to HBA context object
1880 * @rxxri: Receive exchange id
1881 * @len: Number of data bytes
1882 *
1883 * This function allocates and posts a data buffer of sufficient size to recieve
1884 * an unsolicted CT command.
1885 **/
1886static int lpfcdiag_loop_post_rxbufs(struct lpfc_hba *phba, uint16_t rxxri,
1887 size_t len)
1888{
1889 struct lpfc_sli *psli = &phba->sli;
1890 struct lpfc_sli_ring *pring = &psli->ring[LPFC_ELS_RING];
1891 struct lpfc_iocbq *cmdiocbq;
1892 IOCB_t *cmd = NULL;
1893 struct list_head head, *curr, *next;
1894 struct lpfc_dmabuf *rxbmp;
1895 struct lpfc_dmabuf *dmp;
1896 struct lpfc_dmabuf *mp[2] = {NULL, NULL};
1897 struct ulp_bde64 *rxbpl = NULL;
1898 uint32_t num_bde;
1899 struct lpfc_dmabufext *rxbuffer = NULL;
1900 int ret_val = 0;
1901 int i = 0;
1902
1903 cmdiocbq = lpfc_sli_get_iocbq(phba);
1904 rxbmp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
1905 if (rxbmp != NULL) {
1906 rxbmp->virt = lpfc_mbuf_alloc(phba, 0, &rxbmp->phys);
1907 INIT_LIST_HEAD(&rxbmp->list);
1908 rxbpl = (struct ulp_bde64 *) rxbmp->virt;
1909 rxbuffer = diag_cmd_data_alloc(phba, rxbpl, len, 0);
1910 }
1911
1912 if (!cmdiocbq || !rxbmp || !rxbpl || !rxbuffer) {
1913 ret_val = ENOMEM;
1914 goto err_post_rxbufs_exit;
1915 }
1916
1917 /* Queue buffers for the receive exchange */
1918 num_bde = (uint32_t)rxbuffer->flag;
1919 dmp = &rxbuffer->dma;
1920
1921 cmd = &cmdiocbq->iocb;
1922 i = 0;
1923
1924 INIT_LIST_HEAD(&head);
1925 list_add_tail(&head, &dmp->list);
1926 list_for_each_safe(curr, next, &head) {
1927 mp[i] = list_entry(curr, struct lpfc_dmabuf, list);
1928 list_del(curr);
1929
1930 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
1931 mp[i]->buffer_tag = lpfc_sli_get_buffer_tag(phba);
1932 cmd->un.quexri64cx.buff.bde.addrHigh =
1933 putPaddrHigh(mp[i]->phys);
1934 cmd->un.quexri64cx.buff.bde.addrLow =
1935 putPaddrLow(mp[i]->phys);
1936 cmd->un.quexri64cx.buff.bde.tus.f.bdeSize =
1937 ((struct lpfc_dmabufext *)mp[i])->size;
1938 cmd->un.quexri64cx.buff.buffer_tag = mp[i]->buffer_tag;
1939 cmd->ulpCommand = CMD_QUE_XRI64_CX;
1940 cmd->ulpPU = 0;
1941 cmd->ulpLe = 1;
1942 cmd->ulpBdeCount = 1;
1943 cmd->unsli3.que_xri64cx_ext_words.ebde_count = 0;
1944
1945 } else {
1946 cmd->un.cont64[i].addrHigh = putPaddrHigh(mp[i]->phys);
1947 cmd->un.cont64[i].addrLow = putPaddrLow(mp[i]->phys);
1948 cmd->un.cont64[i].tus.f.bdeSize =
1949 ((struct lpfc_dmabufext *)mp[i])->size;
1950 cmd->ulpBdeCount = ++i;
1951
1952 if ((--num_bde > 0) && (i < 2))
1953 continue;
1954
1955 cmd->ulpCommand = CMD_QUE_XRI_BUF64_CX;
1956 cmd->ulpLe = 1;
1957 }
1958
1959 cmd->ulpClass = CLASS3;
1960 cmd->ulpContext = rxxri;
1961
1962 ret_val = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, cmdiocbq, 0);
1963
1964 if (ret_val == IOCB_ERROR) {
1965 diag_cmd_data_free(phba,
1966 (struct lpfc_dmabufext *)mp[0]);
1967 if (mp[1])
1968 diag_cmd_data_free(phba,
1969 (struct lpfc_dmabufext *)mp[1]);
1970 dmp = list_entry(next, struct lpfc_dmabuf, list);
1971 ret_val = EIO;
1972 goto err_post_rxbufs_exit;
1973 }
1974
1975 lpfc_sli_ringpostbuf_put(phba, pring, mp[0]);
1976 if (mp[1]) {
1977 lpfc_sli_ringpostbuf_put(phba, pring, mp[1]);
1978 mp[1] = NULL;
1979 }
1980
1981 /* The iocb was freed by lpfc_sli_issue_iocb */
1982 cmdiocbq = lpfc_sli_get_iocbq(phba);
1983 if (!cmdiocbq) {
1984 dmp = list_entry(next, struct lpfc_dmabuf, list);
1985 ret_val = EIO;
1986 goto err_post_rxbufs_exit;
1987 }
1988
1989 cmd = &cmdiocbq->iocb;
1990 i = 0;
1991 }
1992 list_del(&head);
1993
1994err_post_rxbufs_exit:
1995
1996 if (rxbmp) {
1997 if (rxbmp->virt)
1998 lpfc_mbuf_free(phba, rxbmp->virt, rxbmp->phys);
1999 kfree(rxbmp);
2000 }
2001
2002 if (cmdiocbq)
2003 lpfc_sli_release_iocbq(phba, cmdiocbq);
2004 return ret_val;
2005}
2006
2007/**
2008 * lpfc_bsg_diag_test - with a port in loopback issues a Ct cmd to itself
2009 * @job: LPFC_BSG_VENDOR_DIAG_TEST fc_bsg_job
2010 *
2011 * This function receives a user data buffer to be transmitted and received on
2012 * the same port, the link must be up and in loopback mode prior
2013 * to being called.
2014 * 1. A kernel buffer is allocated to copy the user data into.
2015 * 2. The port registers with "itself".
2016 * 3. The transmit and receive exchange ids are obtained.
2017 * 4. The receive exchange id is posted.
2018 * 5. A new els loopback event is created.
2019 * 6. The command and response iocbs are allocated.
2020 * 7. The cmd iocb FsType is set to elx loopback and the CmdRsp to looppback.
2021 *
2022 * This function is meant to be called n times while the port is in loopback
2023 * so it is the apps responsibility to issue a reset to take the port out
2024 * of loopback mode.
2025 **/
2026static int
2027lpfc_bsg_diag_test(struct fc_bsg_job *job)
2028{
2029 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata;
2030 struct lpfc_hba *phba = vport->phba;
2031 struct diag_mode_test *diag_mode;
2032 struct lpfc_bsg_event *evt;
2033 struct event_data *evdat;
2034 struct lpfc_sli *psli = &phba->sli;
2035 uint32_t size;
2036 uint32_t full_size;
2037 size_t segment_len = 0, segment_offset = 0, current_offset = 0;
2038 uint16_t rpi;
2039 struct lpfc_iocbq *cmdiocbq, *rspiocbq;
2040 IOCB_t *cmd, *rsp;
2041 struct lpfc_sli_ct_request *ctreq;
2042 struct lpfc_dmabuf *txbmp;
2043 struct ulp_bde64 *txbpl = NULL;
2044 struct lpfc_dmabufext *txbuffer = NULL;
2045 struct list_head head;
2046 struct lpfc_dmabuf *curr;
2047 uint16_t txxri, rxxri;
2048 uint32_t num_bde;
2049 uint8_t *ptr = NULL, *rx_databuf = NULL;
2050 int rc = 0;
2051 unsigned long flags;
2052 void *dataout = NULL;
2053 uint32_t total_mem;
2054
2055 /* in case no data is returned return just the return code */
2056 job->reply->reply_payload_rcv_len = 0;
2057
2058 if (job->request_len <
2059 sizeof(struct fc_bsg_request) + sizeof(struct diag_mode_test)) {
2060 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
2061 "2739 Received DIAG TEST request below minimum "
2062 "size\n");
2063 rc = -EINVAL;
2064 goto loopback_test_exit;
2065 }
2066
2067 if (job->request_payload.payload_len !=
2068 job->reply_payload.payload_len) {
2069 rc = -EINVAL;
2070 goto loopback_test_exit;
2071 }
2072
2073 diag_mode = (struct diag_mode_test *)
2074 job->request->rqst_data.h_vendor.vendor_cmd;
2075
2076 if ((phba->link_state == LPFC_HBA_ERROR) ||
2077 (psli->sli_flag & LPFC_BLOCK_MGMT_IO) ||
2078 (!(psli->sli_flag & LPFC_SLI_ACTIVE))) {
2079 rc = -EACCES;
2080 goto loopback_test_exit;
2081 }
2082
2083 if (!lpfc_is_link_up(phba) || !(phba->link_flag & LS_LOOPBACK_MODE)) {
2084 rc = -EACCES;
2085 goto loopback_test_exit;
2086 }
2087
2088 size = job->request_payload.payload_len;
2089 full_size = size + ELX_LOOPBACK_HEADER_SZ; /* plus the header */
2090
2091 if ((size == 0) || (size > 80 * BUF_SZ_4K)) {
2092 rc = -ERANGE;
2093 goto loopback_test_exit;
2094 }
2095
2096 if (size >= BUF_SZ_4K) {
2097 /*
2098 * Allocate memory for ioctl data. If buffer is bigger than 64k,
2099 * then we allocate 64k and re-use that buffer over and over to
2100 * xfer the whole block. This is because Linux kernel has a
2101 * problem allocating more than 120k of kernel space memory. Saw
2102 * problem with GET_FCPTARGETMAPPING...
2103 */
2104 if (size <= (64 * 1024))
2105 total_mem = size;
2106 else
2107 total_mem = 64 * 1024;
2108 } else
2109 /* Allocate memory for ioctl data */
2110 total_mem = BUF_SZ_4K;
2111
2112 dataout = kmalloc(total_mem, GFP_KERNEL);
2113 if (dataout == NULL) {
2114 rc = -ENOMEM;
2115 goto loopback_test_exit;
2116 }
2117
2118 ptr = dataout;
2119 ptr += ELX_LOOPBACK_HEADER_SZ;
2120 sg_copy_to_buffer(job->request_payload.sg_list,
2121 job->request_payload.sg_cnt,
2122 ptr, size);
2123
2124 rc = lpfcdiag_loop_self_reg(phba, &rpi);
2125 if (rc) {
2126 rc = -ENOMEM;
2127 goto loopback_test_exit;
2128 }
2129
2130 rc = lpfcdiag_loop_get_xri(phba, rpi, &txxri, &rxxri);
2131 if (rc) {
2132 lpfcdiag_loop_self_unreg(phba, rpi);
2133 rc = -ENOMEM;
2134 goto loopback_test_exit;
2135 }
2136
2137 rc = lpfcdiag_loop_post_rxbufs(phba, rxxri, full_size);
2138 if (rc) {
2139 lpfcdiag_loop_self_unreg(phba, rpi);
2140 rc = -ENOMEM;
2141 goto loopback_test_exit;
2142 }
2143
2144 evt = lpfc_bsg_event_new(FC_REG_CT_EVENT, current->pid,
2145 SLI_CT_ELX_LOOPBACK);
2146 if (!evt) {
2147 lpfcdiag_loop_self_unreg(phba, rpi);
2148 rc = -ENOMEM;
2149 goto loopback_test_exit;
2150 }
2151
2152 spin_lock_irqsave(&phba->ct_ev_lock, flags);
2153 list_add(&evt->node, &phba->ct_ev_waiters);
2154 lpfc_bsg_event_ref(evt);
2155 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
2156
2157 cmdiocbq = lpfc_sli_get_iocbq(phba);
2158 rspiocbq = lpfc_sli_get_iocbq(phba);
2159 txbmp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
2160
2161 if (txbmp) {
2162 txbmp->virt = lpfc_mbuf_alloc(phba, 0, &txbmp->phys);
2163 INIT_LIST_HEAD(&txbmp->list);
2164 txbpl = (struct ulp_bde64 *) txbmp->virt;
2165 if (txbpl)
2166 txbuffer = diag_cmd_data_alloc(phba,
2167 txbpl, full_size, 0);
2168 }
2169
2170 if (!cmdiocbq || !rspiocbq || !txbmp || !txbpl || !txbuffer) {
2171 rc = -ENOMEM;
2172 goto err_loopback_test_exit;
2173 }
2174
2175 cmd = &cmdiocbq->iocb;
2176 rsp = &rspiocbq->iocb;
2177
2178 INIT_LIST_HEAD(&head);
2179 list_add_tail(&head, &txbuffer->dma.list);
2180 list_for_each_entry(curr, &head, list) {
2181 segment_len = ((struct lpfc_dmabufext *)curr)->size;
2182 if (current_offset == 0) {
2183 ctreq = curr->virt;
2184 memset(ctreq, 0, ELX_LOOPBACK_HEADER_SZ);
2185 ctreq->RevisionId.bits.Revision = SLI_CT_REVISION;
2186 ctreq->RevisionId.bits.InId = 0;
2187 ctreq->FsType = SLI_CT_ELX_LOOPBACK;
2188 ctreq->FsSubType = 0;
2189 ctreq->CommandResponse.bits.CmdRsp = ELX_LOOPBACK_DATA;
2190 ctreq->CommandResponse.bits.Size = size;
2191 segment_offset = ELX_LOOPBACK_HEADER_SZ;
2192 } else
2193 segment_offset = 0;
2194
2195 BUG_ON(segment_offset >= segment_len);
2196 memcpy(curr->virt + segment_offset,
2197 ptr + current_offset,
2198 segment_len - segment_offset);
2199
2200 current_offset += segment_len - segment_offset;
2201 BUG_ON(current_offset > size);
2202 }
2203 list_del(&head);
2204
2205 /* Build the XMIT_SEQUENCE iocb */
2206
2207 num_bde = (uint32_t)txbuffer->flag;
2208
2209 cmd->un.xseq64.bdl.addrHigh = putPaddrHigh(txbmp->phys);
2210 cmd->un.xseq64.bdl.addrLow = putPaddrLow(txbmp->phys);
2211 cmd->un.xseq64.bdl.bdeFlags = BUFF_TYPE_BLP_64;
2212 cmd->un.xseq64.bdl.bdeSize = (num_bde * sizeof(struct ulp_bde64));
2213
2214 cmd->un.xseq64.w5.hcsw.Fctl = (LS | LA);
2215 cmd->un.xseq64.w5.hcsw.Dfctl = 0;
2216 cmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_DD_UNSOL_CTL;
2217 cmd->un.xseq64.w5.hcsw.Type = FC_TYPE_CT;
2218
2219 cmd->ulpCommand = CMD_XMIT_SEQUENCE64_CX;
2220 cmd->ulpBdeCount = 1;
2221 cmd->ulpLe = 1;
2222 cmd->ulpClass = CLASS3;
2223 cmd->ulpContext = txxri;
2224
2225 cmdiocbq->iocb_flag |= LPFC_IO_LIBDFC;
2226 cmdiocbq->vport = phba->pport;
2227
2228 rc = lpfc_sli_issue_iocb_wait(phba, LPFC_ELS_RING, cmdiocbq, rspiocbq,
2229 (phba->fc_ratov * 2) + LPFC_DRVR_TIMEOUT);
2230
2231 if ((rc != IOCB_SUCCESS) || (rsp->ulpStatus != IOCB_SUCCESS)) {
2232 rc = -EIO;
2233 goto err_loopback_test_exit;
2234 }
2235
2236 evt->waiting = 1;
2237 rc = wait_event_interruptible_timeout(
2238 evt->wq, !list_empty(&evt->events_to_see),
2239 ((phba->fc_ratov * 2) + LPFC_DRVR_TIMEOUT) * HZ);
2240 evt->waiting = 0;
2241 if (list_empty(&evt->events_to_see))
2242 rc = (rc) ? -EINTR : -ETIMEDOUT;
2243 else {
2244 spin_lock_irqsave(&phba->ct_ev_lock, flags);
2245 list_move(evt->events_to_see.prev, &evt->events_to_get);
2246 evdat = list_entry(evt->events_to_get.prev,
2247 typeof(*evdat), node);
2248 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
2249 rx_databuf = evdat->data;
2250 if (evdat->len != full_size) {
2251 lpfc_printf_log(phba, KERN_ERR, LOG_LIBDFC,
2252 "1603 Loopback test did not receive expected "
2253 "data length. actual length 0x%x expected "
2254 "length 0x%x\n",
2255 evdat->len, full_size);
2256 rc = -EIO;
2257 } else if (rx_databuf == NULL)
2258 rc = -EIO;
2259 else {
2260 rc = IOCB_SUCCESS;
2261 /* skip over elx loopback header */
2262 rx_databuf += ELX_LOOPBACK_HEADER_SZ;
2263 job->reply->reply_payload_rcv_len =
2264 sg_copy_from_buffer(job->reply_payload.sg_list,
2265 job->reply_payload.sg_cnt,
2266 rx_databuf, size);
2267 job->reply->reply_payload_rcv_len = size;
2268 }
2269 }
2270
2271err_loopback_test_exit:
2272 lpfcdiag_loop_self_unreg(phba, rpi);
2273
2274 spin_lock_irqsave(&phba->ct_ev_lock, flags);
2275 lpfc_bsg_event_unref(evt); /* release ref */
2276 lpfc_bsg_event_unref(evt); /* delete */
2277 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
2278
2279 if (cmdiocbq != NULL)
2280 lpfc_sli_release_iocbq(phba, cmdiocbq);
2281
2282 if (rspiocbq != NULL)
2283 lpfc_sli_release_iocbq(phba, rspiocbq);
2284
2285 if (txbmp != NULL) {
2286 if (txbpl != NULL) {
2287 if (txbuffer != NULL)
2288 diag_cmd_data_free(phba, txbuffer);
2289 lpfc_mbuf_free(phba, txbmp->virt, txbmp->phys);
2290 }
2291 kfree(txbmp);
2292 }
2293
2294loopback_test_exit:
2295 kfree(dataout);
2296 /* make error code available to userspace */
2297 job->reply->result = rc;
2298 job->dd_data = NULL;
2299 /* complete the job back to userspace if no error */
2300 if (rc == 0)
2301 job->job_done(job);
2302 return rc;
2303}
2304
2305/**
2306 * lpfc_bsg_get_dfc_rev - process a GET_DFC_REV bsg vendor command
2307 * @job: GET_DFC_REV fc_bsg_job
2308 **/
2309static int
2310lpfc_bsg_get_dfc_rev(struct fc_bsg_job *job)
2311{
2312 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata;
2313 struct lpfc_hba *phba = vport->phba;
2314 struct get_mgmt_rev *event_req;
2315 struct get_mgmt_rev_reply *event_reply;
2316 int rc = 0;
2317
2318 if (job->request_len <
2319 sizeof(struct fc_bsg_request) + sizeof(struct get_mgmt_rev)) {
2320 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
2321 "2740 Received GET_DFC_REV request below "
2322 "minimum size\n");
2323 rc = -EINVAL;
2324 goto job_error;
2325 }
2326
2327 event_req = (struct get_mgmt_rev *)
2328 job->request->rqst_data.h_vendor.vendor_cmd;
2329
2330 event_reply = (struct get_mgmt_rev_reply *)
2331 job->reply->reply_data.vendor_reply.vendor_rsp;
2332
2333 if (job->reply_len <
2334 sizeof(struct fc_bsg_request) + sizeof(struct get_mgmt_rev_reply)) {
2335 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
2336 "2741 Received GET_DFC_REV reply below "
2337 "minimum size\n");
2338 rc = -EINVAL;
2339 goto job_error;
2340 }
2341
2342 event_reply->info.a_Major = MANAGEMENT_MAJOR_REV;
2343 event_reply->info.a_Minor = MANAGEMENT_MINOR_REV;
2344job_error:
2345 job->reply->result = rc;
2346 if (rc == 0)
2347 job->job_done(job);
2348 return rc;
2349}
2350
2351/**
2352 * lpfc_bsg_wake_mbox_wait - lpfc_bsg_issue_mbox mbox completion handler
2353 * @phba: Pointer to HBA context object.
2354 * @pmboxq: Pointer to mailbox command.
2355 *
2356 * This is completion handler function for mailbox commands issued from
2357 * lpfc_bsg_issue_mbox function. This function is called by the
2358 * mailbox event handler function with no lock held. This function
2359 * will wake up thread waiting on the wait queue pointed by context1
2360 * of the mailbox.
2361 **/
2362void
2363lpfc_bsg_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
2364{
2365 struct bsg_job_data *dd_data;
2366 MAILBOX_t *pmb;
2367 MAILBOX_t *mb;
2368 struct fc_bsg_job *job;
2369 uint32_t size;
2370 unsigned long flags;
2371
2372 spin_lock_irqsave(&phba->ct_ev_lock, flags);
2373 dd_data = pmboxq->context1;
2374 if (!dd_data) {
2375 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
2376 return;
2377 }
2378
2379 pmb = &dd_data->context_un.mbox.pmboxq->u.mb;
2380 mb = dd_data->context_un.mbox.mb;
2381 job = dd_data->context_un.mbox.set_job;
2382 memcpy(mb, pmb, sizeof(*pmb));
2383 size = job->request_payload.payload_len;
2384 job->reply->reply_payload_rcv_len =
2385 sg_copy_from_buffer(job->reply_payload.sg_list,
2386 job->reply_payload.sg_cnt,
2387 mb, size);
2388 job->reply->result = 0;
2389 dd_data->context_un.mbox.set_job = NULL;
2390 job->dd_data = NULL;
2391 job->job_done(job);
2392 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
2393 mempool_free(dd_data->context_un.mbox.pmboxq, phba->mbox_mem_pool);
2394 kfree(mb);
2395 kfree(dd_data);
2396 return;
2397}
2398
2399/**
2400 * lpfc_bsg_check_cmd_access - test for a supported mailbox command
2401 * @phba: Pointer to HBA context object.
2402 * @mb: Pointer to a mailbox object.
2403 * @vport: Pointer to a vport object.
2404 *
2405 * Some commands require the port to be offline, some may not be called from
2406 * the application.
2407 **/
2408static int lpfc_bsg_check_cmd_access(struct lpfc_hba *phba,
2409 MAILBOX_t *mb, struct lpfc_vport *vport)
2410{
2411 /* return negative error values for bsg job */
2412 switch (mb->mbxCommand) {
2413 /* Offline only */
2414 case MBX_INIT_LINK:
2415 case MBX_DOWN_LINK:
2416 case MBX_CONFIG_LINK:
2417 case MBX_CONFIG_RING:
2418 case MBX_RESET_RING:
2419 case MBX_UNREG_LOGIN:
2420 case MBX_CLEAR_LA:
2421 case MBX_DUMP_CONTEXT:
2422 case MBX_RUN_DIAGS:
2423 case MBX_RESTART:
2424 case MBX_SET_MASK:
2425 if (!(vport->fc_flag & FC_OFFLINE_MODE)) {
2426 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
2427 "2743 Command 0x%x is illegal in on-line "
2428 "state\n",
2429 mb->mbxCommand);
2430 return -EPERM;
2431 }
2432 case MBX_WRITE_NV:
2433 case MBX_WRITE_VPARMS:
2434 case MBX_LOAD_SM:
2435 case MBX_READ_NV:
2436 case MBX_READ_CONFIG:
2437 case MBX_READ_RCONFIG:
2438 case MBX_READ_STATUS:
2439 case MBX_READ_XRI:
2440 case MBX_READ_REV:
2441 case MBX_READ_LNK_STAT:
2442 case MBX_DUMP_MEMORY:
2443 case MBX_DOWN_LOAD:
2444 case MBX_UPDATE_CFG:
2445 case MBX_KILL_BOARD:
2446 case MBX_LOAD_AREA:
2447 case MBX_LOAD_EXP_ROM:
2448 case MBX_BEACON:
2449 case MBX_DEL_LD_ENTRY:
2450 case MBX_SET_DEBUG:
2451 case MBX_WRITE_WWN:
2452 case MBX_SLI4_CONFIG:
2453 case MBX_READ_EVENT_LOG_STATUS:
2454 case MBX_WRITE_EVENT_LOG:
2455 case MBX_PORT_CAPABILITIES:
2456 case MBX_PORT_IOV_CONTROL:
2457 break;
2458 case MBX_SET_VARIABLE:
2459 case MBX_RUN_BIU_DIAG64:
2460 case MBX_READ_EVENT_LOG:
2461 case MBX_READ_SPARM64:
2462 case MBX_READ_LA:
2463 case MBX_READ_LA64:
2464 case MBX_REG_LOGIN:
2465 case MBX_REG_LOGIN64:
2466 case MBX_CONFIG_PORT:
2467 case MBX_RUN_BIU_DIAG:
2468 default:
2469 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
2470 "2742 Unknown Command 0x%x\n",
2471 mb->mbxCommand);
2472 return -EPERM;
2473 }
2474
2475 return 0; /* ok */
2476}
2477
2478/**
2479 * lpfc_bsg_issue_mbox - issues a mailbox command on behalf of an app
2480 * @phba: Pointer to HBA context object.
2481 * @mb: Pointer to a mailbox object.
2482 * @vport: Pointer to a vport object.
2483 *
2484 * Allocate a tracking object, mailbox command memory, get a mailbox
2485 * from the mailbox pool, copy the caller mailbox command.
2486 *
2487 * If offline and the sli is active we need to poll for the command (port is
2488 * being reset) and com-plete the job, otherwise issue the mailbox command and
2489 * let our completion handler finish the command.
2490 **/
2491static uint32_t
2492lpfc_bsg_issue_mbox(struct lpfc_hba *phba, struct fc_bsg_job *job,
2493 struct lpfc_vport *vport)
2494{
2495 LPFC_MBOXQ_t *pmboxq;
2496 MAILBOX_t *pmb;
2497 MAILBOX_t *mb;
2498 struct bsg_job_data *dd_data;
2499 uint32_t size;
2500 int rc = 0;
2501
2502 /* allocate our bsg tracking structure */
2503 dd_data = kmalloc(sizeof(struct bsg_job_data), GFP_KERNEL);
2504 if (!dd_data) {
2505 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
2506 "2727 Failed allocation of dd_data\n");
2507 return -ENOMEM;
2508 }
2509
2510 mb = kzalloc(PAGE_SIZE, GFP_KERNEL);
2511 if (!mb) {
2512 kfree(dd_data);
2513 return -ENOMEM;
2514 }
2515
2516 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2517 if (!pmboxq) {
2518 kfree(dd_data);
2519 kfree(mb);
2520 return -ENOMEM;
2521 }
2522
2523 size = job->request_payload.payload_len;
2524 job->reply->reply_payload_rcv_len =
2525 sg_copy_to_buffer(job->request_payload.sg_list,
2526 job->request_payload.sg_cnt,
2527 mb, size);
2528
2529 rc = lpfc_bsg_check_cmd_access(phba, mb, vport);
2530 if (rc != 0) {
2531 kfree(dd_data);
2532 kfree(mb);
2533 mempool_free(pmboxq, phba->mbox_mem_pool);
2534 return rc; /* must be negative */
2535 }
2536
2537 memset(pmboxq, 0, sizeof(LPFC_MBOXQ_t));
2538 pmb = &pmboxq->u.mb;
2539 memcpy(pmb, mb, sizeof(*pmb));
2540 pmb->mbxOwner = OWN_HOST;
2541 pmboxq->context1 = NULL;
2542 pmboxq->vport = vport;
2543
2544 if ((vport->fc_flag & FC_OFFLINE_MODE) ||
2545 (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE))) {
2546 rc = lpfc_sli_issue_mbox(phba, pmboxq, MBX_POLL);
2547 if (rc != MBX_SUCCESS) {
2548 if (rc != MBX_TIMEOUT) {
2549 kfree(dd_data);
2550 kfree(mb);
2551 mempool_free(pmboxq, phba->mbox_mem_pool);
2552 }
2553 return (rc == MBX_TIMEOUT) ? -ETIME : -ENODEV;
2554 }
2555
2556 memcpy(mb, pmb, sizeof(*pmb));
2557 job->reply->reply_payload_rcv_len =
2558 sg_copy_from_buffer(job->reply_payload.sg_list,
2559 job->reply_payload.sg_cnt,
2560 mb, size);
2561 kfree(dd_data);
2562 kfree(mb);
2563 mempool_free(pmboxq, phba->mbox_mem_pool);
2564 /* not waiting mbox already done */
2565 return 0;
2566 }
2567
2568 /* setup wake call as IOCB callback */
2569 pmboxq->mbox_cmpl = lpfc_bsg_wake_mbox_wait;
2570 /* setup context field to pass wait_queue pointer to wake function */
2571 pmboxq->context1 = dd_data;
2572 dd_data->type = TYPE_MBOX;
2573 dd_data->context_un.mbox.pmboxq = pmboxq;
2574 dd_data->context_un.mbox.mb = mb;
2575 dd_data->context_un.mbox.set_job = job;
2576 job->dd_data = dd_data;
2577 rc = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
2578 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
2579 kfree(dd_data);
2580 kfree(mb);
2581 mempool_free(pmboxq, phba->mbox_mem_pool);
2582 return -EIO;
2583 }
2584
2585 return 1;
2586}
2587
2588/**
2589 * lpfc_bsg_mbox_cmd - process an fc bsg LPFC_BSG_VENDOR_MBOX command
2590 * @job: MBOX fc_bsg_job for LPFC_BSG_VENDOR_MBOX.
2591 **/
2592static int
2593lpfc_bsg_mbox_cmd(struct fc_bsg_job *job)
2594{
2595 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata;
2596 struct lpfc_hba *phba = vport->phba;
2597 int rc = 0;
2598
2599 /* in case no data is transferred */
2600 job->reply->reply_payload_rcv_len = 0;
2601 if (job->request_len <
2602 sizeof(struct fc_bsg_request) + sizeof(struct dfc_mbox_req)) {
2603 lpfc_printf_log(phba, KERN_WARNING, LOG_LIBDFC,
2604 "2737 Received MBOX_REQ request below "
2605 "minimum size\n");
2606 rc = -EINVAL;
2607 goto job_error;
2608 }
2609
2610 if (job->request_payload.payload_len != PAGE_SIZE) {
2611 rc = -EINVAL;
2612 goto job_error;
2613 }
2614
2615 if (phba->sli.sli_flag & LPFC_BLOCK_MGMT_IO) {
2616 rc = -EAGAIN;
2617 goto job_error;
2618 }
2619
2620 rc = lpfc_bsg_issue_mbox(phba, job, vport);
2621
2622job_error:
2623 if (rc == 0) {
2624 /* job done */
2625 job->reply->result = 0;
2626 job->dd_data = NULL;
2627 job->job_done(job);
2628 } else if (rc == 1)
2629 /* job submitted, will complete later*/
2630 rc = 0; /* return zero, no error */
2631 else {
2632 /* some error occurred */
2633 job->reply->result = rc;
2634 job->dd_data = NULL;
2635 }
830 2636
831 return rc; 2637 return rc;
832} 2638}
@@ -834,38 +2640,57 @@ error_get_event_exit:
834/** 2640/**
835 * lpfc_bsg_hst_vendor - process a vendor-specific fc_bsg_job 2641 * lpfc_bsg_hst_vendor - process a vendor-specific fc_bsg_job
836 * @job: fc_bsg_job to handle 2642 * @job: fc_bsg_job to handle
837 */ 2643 **/
838static int 2644static int
839lpfc_bsg_hst_vendor(struct fc_bsg_job *job) 2645lpfc_bsg_hst_vendor(struct fc_bsg_job *job)
840{ 2646{
841 int command = job->request->rqst_data.h_vendor.vendor_cmd[0]; 2647 int command = job->request->rqst_data.h_vendor.vendor_cmd[0];
2648 int rc;
842 2649
843 switch (command) { 2650 switch (command) {
844 case LPFC_BSG_VENDOR_SET_CT_EVENT: 2651 case LPFC_BSG_VENDOR_SET_CT_EVENT:
845 return lpfc_bsg_set_event(job); 2652 rc = lpfc_bsg_hba_set_event(job);
846 break; 2653 break;
847
848 case LPFC_BSG_VENDOR_GET_CT_EVENT: 2654 case LPFC_BSG_VENDOR_GET_CT_EVENT:
849 return lpfc_bsg_get_event(job); 2655 rc = lpfc_bsg_hba_get_event(job);
2656 break;
2657 case LPFC_BSG_VENDOR_SEND_MGMT_RESP:
2658 rc = lpfc_bsg_send_mgmt_rsp(job);
2659 break;
2660 case LPFC_BSG_VENDOR_DIAG_MODE:
2661 rc = lpfc_bsg_diag_mode(job);
2662 break;
2663 case LPFC_BSG_VENDOR_DIAG_TEST:
2664 rc = lpfc_bsg_diag_test(job);
2665 break;
2666 case LPFC_BSG_VENDOR_GET_MGMT_REV:
2667 rc = lpfc_bsg_get_dfc_rev(job);
2668 break;
2669 case LPFC_BSG_VENDOR_MBOX:
2670 rc = lpfc_bsg_mbox_cmd(job);
850 break; 2671 break;
851
852 default: 2672 default:
853 return -EINVAL; 2673 rc = -EINVAL;
2674 job->reply->reply_payload_rcv_len = 0;
2675 /* make error code available to userspace */
2676 job->reply->result = rc;
2677 break;
854 } 2678 }
2679
2680 return rc;
855} 2681}
856 2682
857/** 2683/**
858 * lpfc_bsg_request - handle a bsg request from the FC transport 2684 * lpfc_bsg_request - handle a bsg request from the FC transport
859 * @job: fc_bsg_job to handle 2685 * @job: fc_bsg_job to handle
860 */ 2686 **/
861int 2687int
862lpfc_bsg_request(struct fc_bsg_job *job) 2688lpfc_bsg_request(struct fc_bsg_job *job)
863{ 2689{
864 uint32_t msgcode; 2690 uint32_t msgcode;
865 int rc = -EINVAL; 2691 int rc;
866 2692
867 msgcode = job->request->msgcode; 2693 msgcode = job->request->msgcode;
868
869 switch (msgcode) { 2694 switch (msgcode) {
870 case FC_BSG_HST_VENDOR: 2695 case FC_BSG_HST_VENDOR:
871 rc = lpfc_bsg_hst_vendor(job); 2696 rc = lpfc_bsg_hst_vendor(job);
@@ -874,9 +2699,13 @@ lpfc_bsg_request(struct fc_bsg_job *job)
874 rc = lpfc_bsg_rport_els(job); 2699 rc = lpfc_bsg_rport_els(job);
875 break; 2700 break;
876 case FC_BSG_RPT_CT: 2701 case FC_BSG_RPT_CT:
877 rc = lpfc_bsg_rport_ct(job); 2702 rc = lpfc_bsg_send_mgmt_cmd(job);
878 break; 2703 break;
879 default: 2704 default:
2705 rc = -EINVAL;
2706 job->reply->reply_payload_rcv_len = 0;
2707 /* make error code available to userspace */
2708 job->reply->result = rc;
880 break; 2709 break;
881 } 2710 }
882 2711
@@ -889,17 +2718,71 @@ lpfc_bsg_request(struct fc_bsg_job *job)
889 * 2718 *
890 * This function just aborts the job's IOCB. The aborted IOCB will return to 2719 * This function just aborts the job's IOCB. The aborted IOCB will return to
891 * the waiting function which will handle passing the error back to userspace 2720 * the waiting function which will handle passing the error back to userspace
892 */ 2721 **/
893int 2722int
894lpfc_bsg_timeout(struct fc_bsg_job *job) 2723lpfc_bsg_timeout(struct fc_bsg_job *job)
895{ 2724{
896 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata; 2725 struct lpfc_vport *vport = (struct lpfc_vport *)job->shost->hostdata;
897 struct lpfc_hba *phba = vport->phba; 2726 struct lpfc_hba *phba = vport->phba;
898 struct lpfc_iocbq *cmdiocb = (struct lpfc_iocbq *)job->dd_data; 2727 struct lpfc_iocbq *cmdiocb;
2728 struct lpfc_bsg_event *evt;
2729 struct lpfc_bsg_iocb *iocb;
2730 struct lpfc_bsg_mbox *mbox;
899 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING]; 2731 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
2732 struct bsg_job_data *dd_data;
2733 unsigned long flags;
2734
2735 spin_lock_irqsave(&phba->ct_ev_lock, flags);
2736 dd_data = (struct bsg_job_data *)job->dd_data;
2737 /* timeout and completion crossed paths if no dd_data */
2738 if (!dd_data) {
2739 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
2740 return 0;
2741 }
900 2742
901 if (cmdiocb) 2743 switch (dd_data->type) {
2744 case TYPE_IOCB:
2745 iocb = &dd_data->context_un.iocb;
2746 cmdiocb = iocb->cmdiocbq;
2747 /* hint to completion handler that the job timed out */
2748 job->reply->result = -EAGAIN;
2749 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
2750 /* this will call our completion handler */
2751 spin_lock_irq(&phba->hbalock);
902 lpfc_sli_issue_abort_iotag(phba, pring, cmdiocb); 2752 lpfc_sli_issue_abort_iotag(phba, pring, cmdiocb);
2753 spin_unlock_irq(&phba->hbalock);
2754 break;
2755 case TYPE_EVT:
2756 evt = dd_data->context_un.evt;
2757 /* this event has no job anymore */
2758 evt->set_job = NULL;
2759 job->dd_data = NULL;
2760 job->reply->reply_payload_rcv_len = 0;
2761 /* Return -EAGAIN which is our way of signallying the
2762 * app to retry.
2763 */
2764 job->reply->result = -EAGAIN;
2765 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
2766 job->job_done(job);
2767 break;
2768 case TYPE_MBOX:
2769 mbox = &dd_data->context_un.mbox;
2770 /* this mbox has no job anymore */
2771 mbox->set_job = NULL;
2772 job->dd_data = NULL;
2773 job->reply->reply_payload_rcv_len = 0;
2774 job->reply->result = -EAGAIN;
2775 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
2776 job->job_done(job);
2777 break;
2778 default:
2779 spin_unlock_irqrestore(&phba->ct_ev_lock, flags);
2780 break;
2781 }
903 2782
2783 /* scsi transport fc fc_bsg_job_timeout expects a zero return code,
2784 * otherwise an error message will be displayed on the console
2785 * so always return success (zero)
2786 */
904 return 0; 2787 return 0;
905} 2788}
diff --git a/drivers/scsi/lpfc/lpfc_bsg.h b/drivers/scsi/lpfc/lpfc_bsg.h
new file mode 100644
index 000000000000..6c8f87e39b98
--- /dev/null
+++ b/drivers/scsi/lpfc/lpfc_bsg.h
@@ -0,0 +1,98 @@
1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2010 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *******************************************************************/
20/* bsg definitions
21 * No pointers to user data are allowed, all application buffers and sizes will
22 * derived through the bsg interface.
23 *
24 * These are the vendor unique structures passed in using the bsg
25 * FC_BSG_HST_VENDOR message code type.
26 */
27#define LPFC_BSG_VENDOR_SET_CT_EVENT 1
28#define LPFC_BSG_VENDOR_GET_CT_EVENT 2
29#define LPFC_BSG_VENDOR_SEND_MGMT_RESP 3
30#define LPFC_BSG_VENDOR_DIAG_MODE 4
31#define LPFC_BSG_VENDOR_DIAG_TEST 5
32#define LPFC_BSG_VENDOR_GET_MGMT_REV 6
33#define LPFC_BSG_VENDOR_MBOX 7
34
35struct set_ct_event {
36 uint32_t command;
37 uint32_t type_mask;
38 uint32_t ev_req_id;
39 uint32_t ev_reg_id;
40};
41
42struct get_ct_event {
43 uint32_t command;
44 uint32_t ev_reg_id;
45 uint32_t ev_req_id;
46};
47
48struct get_ct_event_reply {
49 uint32_t immed_data;
50 uint32_t type;
51};
52
53struct send_mgmt_resp {
54 uint32_t command;
55 uint32_t tag;
56};
57
58
59#define INTERNAL_LOOP_BACK 0x1 /* adapter short cuts the loop internally */
60#define EXTERNAL_LOOP_BACK 0x2 /* requires an external loopback plug */
61
62struct diag_mode_set {
63 uint32_t command;
64 uint32_t type;
65 uint32_t timeout;
66};
67
68struct diag_mode_test {
69 uint32_t command;
70};
71
72#define LPFC_WWNN_TYPE 0
73#define LPFC_WWPN_TYPE 1
74
75struct get_mgmt_rev {
76 uint32_t command;
77};
78
79#define MANAGEMENT_MAJOR_REV 1
80#define MANAGEMENT_MINOR_REV 0
81
82/* the MgmtRevInfo structure */
83struct MgmtRevInfo {
84 uint32_t a_Major;
85 uint32_t a_Minor;
86};
87
88struct get_mgmt_rev_reply {
89 struct MgmtRevInfo info;
90};
91
92struct dfc_mbox_req {
93 uint32_t command;
94 uint32_t inExtWLen;
95 uint32_t outExtWLen;
96 uint8_t mbOffset;
97};
98
diff --git a/drivers/scsi/lpfc/lpfc_crtn.h b/drivers/scsi/lpfc/lpfc_crtn.h
index 650494d622c1..6f0fb51eb461 100644
--- a/drivers/scsi/lpfc/lpfc_crtn.h
+++ b/drivers/scsi/lpfc/lpfc_crtn.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2008 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2010 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -44,18 +44,26 @@ int lpfc_reg_rpi(struct lpfc_hba *, uint16_t, uint32_t, uint8_t *,
44void lpfc_unreg_login(struct lpfc_hba *, uint16_t, uint32_t, LPFC_MBOXQ_t *); 44void lpfc_unreg_login(struct lpfc_hba *, uint16_t, uint32_t, LPFC_MBOXQ_t *);
45void lpfc_unreg_did(struct lpfc_hba *, uint16_t, uint32_t, LPFC_MBOXQ_t *); 45void lpfc_unreg_did(struct lpfc_hba *, uint16_t, uint32_t, LPFC_MBOXQ_t *);
46void lpfc_reg_vpi(struct lpfc_vport *, LPFC_MBOXQ_t *); 46void lpfc_reg_vpi(struct lpfc_vport *, LPFC_MBOXQ_t *);
47void lpfc_register_new_vport(struct lpfc_hba *, struct lpfc_vport *,
48 struct lpfc_nodelist *);
47void lpfc_unreg_vpi(struct lpfc_hba *, uint16_t, LPFC_MBOXQ_t *); 49void lpfc_unreg_vpi(struct lpfc_hba *, uint16_t, LPFC_MBOXQ_t *);
48void lpfc_init_link(struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t, uint32_t); 50void lpfc_init_link(struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t, uint32_t);
49void lpfc_request_features(struct lpfc_hba *, struct lpfcMboxq *); 51void lpfc_request_features(struct lpfc_hba *, struct lpfcMboxq *);
52void lpfc_supported_pages(struct lpfcMboxq *);
53void lpfc_sli4_params(struct lpfcMboxq *);
54int lpfc_pc_sli4_params_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
50 55
51struct lpfc_vport *lpfc_find_vport_by_did(struct lpfc_hba *, uint32_t); 56struct lpfc_vport *lpfc_find_vport_by_did(struct lpfc_hba *, uint32_t);
52void lpfc_cleanup_rcv_buffers(struct lpfc_vport *); 57void lpfc_cleanup_rcv_buffers(struct lpfc_vport *);
53void lpfc_rcv_seq_check_edtov(struct lpfc_vport *); 58void lpfc_rcv_seq_check_edtov(struct lpfc_vport *);
54void lpfc_cleanup_rpis(struct lpfc_vport *, int); 59void lpfc_cleanup_rpis(struct lpfc_vport *, int);
60void lpfc_cleanup_pending_mbox(struct lpfc_vport *);
55int lpfc_linkdown(struct lpfc_hba *); 61int lpfc_linkdown(struct lpfc_hba *);
56void lpfc_linkdown_port(struct lpfc_vport *); 62void lpfc_linkdown_port(struct lpfc_vport *);
57void lpfc_port_link_failure(struct lpfc_vport *); 63void lpfc_port_link_failure(struct lpfc_vport *);
58void lpfc_mbx_cmpl_read_la(struct lpfc_hba *, LPFC_MBOXQ_t *); 64void lpfc_mbx_cmpl_read_la(struct lpfc_hba *, LPFC_MBOXQ_t *);
65void lpfc_init_vpi_cmpl(struct lpfc_hba *, LPFC_MBOXQ_t *);
66void lpfc_retry_pport_discovery(struct lpfc_hba *);
59 67
60void lpfc_mbx_cmpl_reg_login(struct lpfc_hba *, LPFC_MBOXQ_t *); 68void lpfc_mbx_cmpl_reg_login(struct lpfc_hba *, LPFC_MBOXQ_t *);
61void lpfc_mbx_cmpl_dflt_rpi(struct lpfc_hba *, LPFC_MBOXQ_t *); 69void lpfc_mbx_cmpl_dflt_rpi(struct lpfc_hba *, LPFC_MBOXQ_t *);
@@ -73,6 +81,7 @@ void lpfc_set_disctmo(struct lpfc_vport *);
73int lpfc_can_disctmo(struct lpfc_vport *); 81int lpfc_can_disctmo(struct lpfc_vport *);
74int lpfc_unreg_rpi(struct lpfc_vport *, struct lpfc_nodelist *); 82int lpfc_unreg_rpi(struct lpfc_vport *, struct lpfc_nodelist *);
75void lpfc_unreg_all_rpis(struct lpfc_vport *); 83void lpfc_unreg_all_rpis(struct lpfc_vport *);
84void lpfc_unreg_hba_rpis(struct lpfc_hba *);
76void lpfc_unreg_default_rpis(struct lpfc_vport *); 85void lpfc_unreg_default_rpis(struct lpfc_vport *);
77void lpfc_issue_reg_vpi(struct lpfc_hba *, struct lpfc_vport *); 86void lpfc_issue_reg_vpi(struct lpfc_hba *, struct lpfc_vport *);
78 87
@@ -99,7 +108,7 @@ int lpfc_disc_state_machine(struct lpfc_vport *, struct lpfc_nodelist *, void *,
99 108
100void lpfc_do_scr_ns_plogi(struct lpfc_hba *, struct lpfc_vport *); 109void lpfc_do_scr_ns_plogi(struct lpfc_hba *, struct lpfc_vport *);
101int lpfc_check_sparm(struct lpfc_vport *, struct lpfc_nodelist *, 110int lpfc_check_sparm(struct lpfc_vport *, struct lpfc_nodelist *,
102 struct serv_parm *, uint32_t); 111 struct serv_parm *, uint32_t, int);
103int lpfc_els_abort(struct lpfc_hba *, struct lpfc_nodelist *); 112int lpfc_els_abort(struct lpfc_hba *, struct lpfc_nodelist *);
104void lpfc_more_plogi(struct lpfc_vport *); 113void lpfc_more_plogi(struct lpfc_vport *);
105void lpfc_more_adisc(struct lpfc_vport *); 114void lpfc_more_adisc(struct lpfc_vport *);
@@ -197,6 +206,7 @@ void lpfc_reg_fcfi(struct lpfc_hba *, struct lpfcMboxq *);
197void lpfc_unreg_fcfi(struct lpfcMboxq *, uint16_t); 206void lpfc_unreg_fcfi(struct lpfcMboxq *, uint16_t);
198void lpfc_resume_rpi(struct lpfcMboxq *, struct lpfc_nodelist *); 207void lpfc_resume_rpi(struct lpfcMboxq *, struct lpfc_nodelist *);
199int lpfc_check_pending_fcoe_event(struct lpfc_hba *, uint8_t); 208int lpfc_check_pending_fcoe_event(struct lpfc_hba *, uint8_t);
209void lpfc_issue_init_vpi(struct lpfc_vport *);
200 210
201void lpfc_config_hbq(struct lpfc_hba *, uint32_t, struct lpfc_hbq_init *, 211void lpfc_config_hbq(struct lpfc_hba *, uint32_t, struct lpfc_hbq_init *,
202 uint32_t , LPFC_MBOXQ_t *); 212 uint32_t , LPFC_MBOXQ_t *);
@@ -206,7 +216,11 @@ struct hbq_dmabuf *lpfc_sli4_rb_alloc(struct lpfc_hba *);
206void lpfc_sli4_rb_free(struct lpfc_hba *, struct hbq_dmabuf *); 216void lpfc_sli4_rb_free(struct lpfc_hba *, struct hbq_dmabuf *);
207void lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *, struct fcf_record *, 217void lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *, struct fcf_record *,
208 uint16_t); 218 uint16_t);
219void lpfc_unregister_fcf(struct lpfc_hba *);
220void lpfc_unregister_fcf_rescan(struct lpfc_hba *);
209void lpfc_unregister_unused_fcf(struct lpfc_hba *); 221void lpfc_unregister_unused_fcf(struct lpfc_hba *);
222int lpfc_sli4_redisc_fcf_table(struct lpfc_hba *);
223void lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *);
210 224
211int lpfc_mem_alloc(struct lpfc_hba *, int align); 225int lpfc_mem_alloc(struct lpfc_hba *, int align);
212void lpfc_mem_free(struct lpfc_hba *); 226void lpfc_mem_free(struct lpfc_hba *);
@@ -365,6 +379,8 @@ void lpfc_free_fast_evt(struct lpfc_hba *, struct lpfc_fast_path_event *);
365void lpfc_create_static_vport(struct lpfc_hba *); 379void lpfc_create_static_vport(struct lpfc_hba *);
366void lpfc_stop_hba_timers(struct lpfc_hba *); 380void lpfc_stop_hba_timers(struct lpfc_hba *);
367void lpfc_stop_port(struct lpfc_hba *); 381void lpfc_stop_port(struct lpfc_hba *);
382void __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *);
383void lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *);
368void lpfc_parse_fcoe_conf(struct lpfc_hba *, uint8_t *, uint32_t); 384void lpfc_parse_fcoe_conf(struct lpfc_hba *, uint8_t *, uint32_t);
369int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *, int); 385int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *, int);
370void lpfc_start_fdiscs(struct lpfc_hba *phba); 386void lpfc_start_fdiscs(struct lpfc_hba *phba);
@@ -378,5 +394,5 @@ struct lpfc_vport *lpfc_find_vport_by_vpid(struct lpfc_hba *, uint16_t);
378/* functions to support SGIOv4/bsg interface */ 394/* functions to support SGIOv4/bsg interface */
379int lpfc_bsg_request(struct fc_bsg_job *); 395int lpfc_bsg_request(struct fc_bsg_job *);
380int lpfc_bsg_timeout(struct fc_bsg_job *); 396int lpfc_bsg_timeout(struct fc_bsg_job *);
381void lpfc_bsg_ct_unsol_event(struct lpfc_hba *, struct lpfc_sli_ring *, 397int lpfc_bsg_ct_unsol_event(struct lpfc_hba *, struct lpfc_sli_ring *,
382 struct lpfc_iocbq *); 398 struct lpfc_iocbq *);
diff --git a/drivers/scsi/lpfc/lpfc_ct.c b/drivers/scsi/lpfc/lpfc_ct.c
index 0ebcd9baca79..c7e921973f66 100644
--- a/drivers/scsi/lpfc/lpfc_ct.c
+++ b/drivers/scsi/lpfc/lpfc_ct.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2009 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2010 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -97,7 +97,8 @@ lpfc_ct_unsol_event(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
97 struct list_head head; 97 struct list_head head;
98 struct lpfc_dmabuf *bdeBuf; 98 struct lpfc_dmabuf *bdeBuf;
99 99
100 lpfc_bsg_ct_unsol_event(phba, pring, piocbq); 100 if (lpfc_bsg_ct_unsol_event(phba, pring, piocbq) == 0)
101 return;
101 102
102 if (unlikely(icmd->ulpStatus == IOSTAT_NEED_BUFFER)) { 103 if (unlikely(icmd->ulpStatus == IOSTAT_NEED_BUFFER)) {
103 lpfc_sli_hbqbuf_add_hbqs(phba, LPFC_ELS_HBQ); 104 lpfc_sli_hbqbuf_add_hbqs(phba, LPFC_ELS_HBQ);
@@ -181,7 +182,8 @@ lpfc_sli4_ct_abort_unsol_event(struct lpfc_hba *phba,
181 uint32_t size; 182 uint32_t size;
182 183
183 /* Forward abort event to any process registered to receive ct event */ 184 /* Forward abort event to any process registered to receive ct event */
184 lpfc_bsg_ct_unsol_event(phba, pring, piocbq); 185 if (lpfc_bsg_ct_unsol_event(phba, pring, piocbq) == 0)
186 return;
185 187
186 /* If there is no BDE associated with IOCB, there is nothing to do */ 188 /* If there is no BDE associated with IOCB, there is nothing to do */
187 if (icmd->ulpBdeCount == 0) 189 if (icmd->ulpBdeCount == 0)
@@ -1843,12 +1845,7 @@ lpfc_decode_firmware_rev(struct lpfc_hba *phba, char *fwrevision, int flag)
1843 c = (rev & 0x0000ff00) >> 8; 1845 c = (rev & 0x0000ff00) >> 8;
1844 b4 = (rev & 0x000000ff); 1846 b4 = (rev & 0x000000ff);
1845 1847
1846 if (flag) 1848 sprintf(fwrevision, "%d.%d%d%c%d", b1, b2, b3, c, b4);
1847 sprintf(fwrevision, "%d.%d%d%c%d ", b1,
1848 b2, b3, c, b4);
1849 else
1850 sprintf(fwrevision, "%d.%d%d%c%d ", b1,
1851 b2, b3, c, b4);
1852 } 1849 }
1853 return; 1850 return;
1854} 1851}
diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c
index 2cc39684ce97..08b6634cb994 100644
--- a/drivers/scsi/lpfc/lpfc_els.c
+++ b/drivers/scsi/lpfc/lpfc_els.c
@@ -50,9 +50,6 @@ static int lpfc_issue_els_fdisc(struct lpfc_vport *vport,
50 struct lpfc_nodelist *ndlp, uint8_t retry); 50 struct lpfc_nodelist *ndlp, uint8_t retry);
51static int lpfc_issue_fabric_iocb(struct lpfc_hba *phba, 51static int lpfc_issue_fabric_iocb(struct lpfc_hba *phba,
52 struct lpfc_iocbq *iocb); 52 struct lpfc_iocbq *iocb);
53static void lpfc_register_new_vport(struct lpfc_hba *phba,
54 struct lpfc_vport *vport,
55 struct lpfc_nodelist *ndlp);
56 53
57static int lpfc_max_els_tries = 3; 54static int lpfc_max_els_tries = 3;
58 55
@@ -592,6 +589,15 @@ lpfc_cmpl_els_flogi_fabric(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
592 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 589 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
593 spin_unlock_irq(shost->host_lock); 590 spin_unlock_irq(shost->host_lock);
594 } 591 }
592 /*
593 * If VPI is unreged, driver need to do INIT_VPI
594 * before re-registering
595 */
596 if (phba->sli_rev == LPFC_SLI_REV4) {
597 spin_lock_irq(shost->host_lock);
598 vport->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
599 spin_unlock_irq(shost->host_lock);
600 }
595 } 601 }
596 602
597 if (phba->sli_rev < LPFC_SLI_REV4) { 603 if (phba->sli_rev < LPFC_SLI_REV4) {
@@ -604,10 +610,13 @@ lpfc_cmpl_els_flogi_fabric(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
604 } else { 610 } else {
605 ndlp->nlp_type |= NLP_FABRIC; 611 ndlp->nlp_type |= NLP_FABRIC;
606 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNMAPPED_NODE); 612 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNMAPPED_NODE);
607 if (vport->vpi_state & LPFC_VPI_REGISTERED) { 613 if ((!(vport->fc_flag & FC_VPORT_NEEDS_REG_VPI)) &&
614 (vport->vpi_state & LPFC_VPI_REGISTERED)) {
608 lpfc_start_fdiscs(phba); 615 lpfc_start_fdiscs(phba);
609 lpfc_do_scr_ns_plogi(phba, vport); 616 lpfc_do_scr_ns_plogi(phba, vport);
610 } else 617 } else if (vport->fc_flag & FC_VFI_REGISTERED)
618 lpfc_issue_init_vpi(vport);
619 else
611 lpfc_issue_reg_vfi(vport); 620 lpfc_issue_reg_vfi(vport);
612 } 621 }
613 return 0; 622 return 0;
@@ -804,6 +813,9 @@ lpfc_cmpl_els_flogi(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
804 irsp->ulpTimeout); 813 irsp->ulpTimeout);
805 goto flogifail; 814 goto flogifail;
806 } 815 }
816 spin_lock_irq(shost->host_lock);
817 vport->fc_flag &= ~FC_VPORT_CVL_RCVD;
818 spin_unlock_irq(shost->host_lock);
807 819
808 /* 820 /*
809 * The FLogI succeeded. Sync the data for the CPU before 821 * The FLogI succeeded. Sync the data for the CPU before
@@ -2720,7 +2732,7 @@ lpfc_els_retry(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
2720 if (did == FDMI_DID) 2732 if (did == FDMI_DID)
2721 retry = 1; 2733 retry = 1;
2722 2734
2723 if ((cmd == ELS_CMD_FLOGI) && 2735 if (((cmd == ELS_CMD_FLOGI) || (cmd == ELS_CMD_FDISC)) &&
2724 (phba->fc_topology != TOPOLOGY_LOOP) && 2736 (phba->fc_topology != TOPOLOGY_LOOP) &&
2725 !lpfc_error_lost_link(irsp)) { 2737 !lpfc_error_lost_link(irsp)) {
2726 /* FLOGI retry policy */ 2738 /* FLOGI retry policy */
@@ -4385,7 +4397,7 @@ lpfc_els_rcv_flogi(struct lpfc_vport *vport, struct lpfc_iocbq *cmdiocb,
4385 4397
4386 did = Fabric_DID; 4398 did = Fabric_DID;
4387 4399
4388 if ((lpfc_check_sparm(vport, ndlp, sp, CLASS3))) { 4400 if ((lpfc_check_sparm(vport, ndlp, sp, CLASS3, 1))) {
4389 /* For a FLOGI we accept, then if our portname is greater 4401 /* For a FLOGI we accept, then if our portname is greater
4390 * then the remote portname we initiate Nport login. 4402 * then the remote portname we initiate Nport login.
4391 */ 4403 */
@@ -5915,6 +5927,7 @@ lpfc_cmpl_reg_new_vport(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
5915 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 5927 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
5916 struct lpfc_nodelist *ndlp = (struct lpfc_nodelist *) pmb->context2; 5928 struct lpfc_nodelist *ndlp = (struct lpfc_nodelist *) pmb->context2;
5917 MAILBOX_t *mb = &pmb->u.mb; 5929 MAILBOX_t *mb = &pmb->u.mb;
5930 int rc;
5918 5931
5919 spin_lock_irq(shost->host_lock); 5932 spin_lock_irq(shost->host_lock);
5920 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI; 5933 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
@@ -5936,6 +5949,26 @@ lpfc_cmpl_reg_new_vport(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
5936 spin_unlock_irq(shost->host_lock); 5949 spin_unlock_irq(shost->host_lock);
5937 lpfc_can_disctmo(vport); 5950 lpfc_can_disctmo(vport);
5938 break; 5951 break;
5952 /* If reg_vpi fail with invalid VPI status, re-init VPI */
5953 case 0x20:
5954 spin_lock_irq(shost->host_lock);
5955 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
5956 spin_unlock_irq(shost->host_lock);
5957 lpfc_init_vpi(phba, pmb, vport->vpi);
5958 pmb->vport = vport;
5959 pmb->mbox_cmpl = lpfc_init_vpi_cmpl;
5960 rc = lpfc_sli_issue_mbox(phba, pmb,
5961 MBX_NOWAIT);
5962 if (rc == MBX_NOT_FINISHED) {
5963 lpfc_printf_vlog(vport,
5964 KERN_ERR, LOG_MBOX,
5965 "2732 Failed to issue INIT_VPI"
5966 " mailbox command\n");
5967 } else {
5968 lpfc_nlp_put(ndlp);
5969 return;
5970 }
5971
5939 default: 5972 default:
5940 /* Try to recover from this error */ 5973 /* Try to recover from this error */
5941 lpfc_mbx_unreg_vpi(vport); 5974 lpfc_mbx_unreg_vpi(vport);
@@ -5949,13 +5982,17 @@ lpfc_cmpl_reg_new_vport(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
5949 break; 5982 break;
5950 } 5983 }
5951 } else { 5984 } else {
5985 spin_lock_irq(shost->host_lock);
5952 vport->vpi_state |= LPFC_VPI_REGISTERED; 5986 vport->vpi_state |= LPFC_VPI_REGISTERED;
5953 if (vport == phba->pport) 5987 spin_unlock_irq(shost->host_lock);
5988 if (vport == phba->pport) {
5954 if (phba->sli_rev < LPFC_SLI_REV4) 5989 if (phba->sli_rev < LPFC_SLI_REV4)
5955 lpfc_issue_fabric_reglogin(vport); 5990 lpfc_issue_fabric_reglogin(vport);
5956 else 5991 else {
5957 lpfc_issue_reg_vfi(vport); 5992 lpfc_start_fdiscs(phba);
5958 else 5993 lpfc_do_scr_ns_plogi(phba, vport);
5994 }
5995 } else
5959 lpfc_do_scr_ns_plogi(phba, vport); 5996 lpfc_do_scr_ns_plogi(phba, vport);
5960 } 5997 }
5961 5998
@@ -5977,7 +6014,7 @@ lpfc_cmpl_reg_new_vport(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
5977 * This routine registers the @vport as a new virtual port with a HBA. 6014 * This routine registers the @vport as a new virtual port with a HBA.
5978 * It is done through a registering vpi mailbox command. 6015 * It is done through a registering vpi mailbox command.
5979 **/ 6016 **/
5980static void 6017void
5981lpfc_register_new_vport(struct lpfc_hba *phba, struct lpfc_vport *vport, 6018lpfc_register_new_vport(struct lpfc_hba *phba, struct lpfc_vport *vport,
5982 struct lpfc_nodelist *ndlp) 6019 struct lpfc_nodelist *ndlp)
5983{ 6020{
@@ -6018,6 +6055,78 @@ mbox_err_exit:
6018} 6055}
6019 6056
6020/** 6057/**
6058 * lpfc_retry_pport_discovery - Start timer to retry FLOGI.
6059 * @phba: pointer to lpfc hba data structure.
6060 *
6061 * This routine abort all pending discovery commands and
6062 * start a timer to retry FLOGI for the physical port
6063 * discovery.
6064 **/
6065void
6066lpfc_retry_pport_discovery(struct lpfc_hba *phba)
6067{
6068 struct lpfc_vport **vports;
6069 struct lpfc_nodelist *ndlp;
6070 struct Scsi_Host *shost;
6071 int i;
6072 uint32_t link_state;
6073
6074 /* Treat this failure as linkdown for all vports */
6075 link_state = phba->link_state;
6076 lpfc_linkdown(phba);
6077 phba->link_state = link_state;
6078
6079 vports = lpfc_create_vport_work_array(phba);
6080
6081 if (vports) {
6082 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
6083 ndlp = lpfc_findnode_did(vports[i], Fabric_DID);
6084 if (ndlp)
6085 lpfc_cancel_retry_delay_tmo(vports[i], ndlp);
6086 lpfc_els_flush_cmd(vports[i]);
6087 }
6088 lpfc_destroy_vport_work_array(phba, vports);
6089 }
6090
6091 /* If fabric require FLOGI, then re-instantiate physical login */
6092 ndlp = lpfc_findnode_did(phba->pport, Fabric_DID);
6093 if (!ndlp)
6094 return;
6095
6096
6097 shost = lpfc_shost_from_vport(phba->pport);
6098 mod_timer(&ndlp->nlp_delayfunc, jiffies + HZ);
6099 spin_lock_irq(shost->host_lock);
6100 ndlp->nlp_flag |= NLP_DELAY_TMO;
6101 spin_unlock_irq(shost->host_lock);
6102 ndlp->nlp_last_elscmd = ELS_CMD_FLOGI;
6103 phba->pport->port_state = LPFC_FLOGI;
6104 return;
6105}
6106
6107/**
6108 * lpfc_fabric_login_reqd - Check if FLOGI required.
6109 * @phba: pointer to lpfc hba data structure.
6110 * @cmdiocb: pointer to FDISC command iocb.
6111 * @rspiocb: pointer to FDISC response iocb.
6112 *
6113 * This routine checks if a FLOGI is reguired for FDISC
6114 * to succeed.
6115 **/
6116static int
6117lpfc_fabric_login_reqd(struct lpfc_hba *phba,
6118 struct lpfc_iocbq *cmdiocb,
6119 struct lpfc_iocbq *rspiocb)
6120{
6121
6122 if ((rspiocb->iocb.ulpStatus != IOSTAT_FABRIC_RJT) ||
6123 (rspiocb->iocb.un.ulpWord[4] != RJT_LOGIN_REQUIRED))
6124 return 0;
6125 else
6126 return 1;
6127}
6128
6129/**
6021 * lpfc_cmpl_els_fdisc - Completion function for fdisc iocb command 6130 * lpfc_cmpl_els_fdisc - Completion function for fdisc iocb command
6022 * @phba: pointer to lpfc hba data structure. 6131 * @phba: pointer to lpfc hba data structure.
6023 * @cmdiocb: pointer to lpfc command iocb data structure. 6132 * @cmdiocb: pointer to lpfc command iocb data structure.
@@ -6066,6 +6175,12 @@ lpfc_cmpl_els_fdisc(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
6066 irsp->ulpStatus, irsp->un.ulpWord[4], vport->fc_prevDID); 6175 irsp->ulpStatus, irsp->un.ulpWord[4], vport->fc_prevDID);
6067 6176
6068 if (irsp->ulpStatus) { 6177 if (irsp->ulpStatus) {
6178
6179 if (lpfc_fabric_login_reqd(phba, cmdiocb, rspiocb)) {
6180 lpfc_retry_pport_discovery(phba);
6181 goto out;
6182 }
6183
6069 /* Check for retry */ 6184 /* Check for retry */
6070 if (lpfc_els_retry(phba, cmdiocb, rspiocb)) 6185 if (lpfc_els_retry(phba, cmdiocb, rspiocb))
6071 goto out; 6186 goto out;
@@ -6076,6 +6191,7 @@ lpfc_cmpl_els_fdisc(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
6076 goto fdisc_failed; 6191 goto fdisc_failed;
6077 } 6192 }
6078 spin_lock_irq(shost->host_lock); 6193 spin_lock_irq(shost->host_lock);
6194 vport->fc_flag &= ~FC_VPORT_CVL_RCVD;
6079 vport->fc_flag |= FC_FABRIC; 6195 vport->fc_flag |= FC_FABRIC;
6080 if (vport->phba->fc_topology == TOPOLOGY_LOOP) 6196 if (vport->phba->fc_topology == TOPOLOGY_LOOP)
6081 vport->fc_flag |= FC_PUBLIC_LOOP; 6197 vport->fc_flag |= FC_PUBLIC_LOOP;
@@ -6103,10 +6219,13 @@ lpfc_cmpl_els_fdisc(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
6103 lpfc_mbx_unreg_vpi(vport); 6219 lpfc_mbx_unreg_vpi(vport);
6104 spin_lock_irq(shost->host_lock); 6220 spin_lock_irq(shost->host_lock);
6105 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 6221 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
6222 vport->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
6106 spin_unlock_irq(shost->host_lock); 6223 spin_unlock_irq(shost->host_lock);
6107 } 6224 }
6108 6225
6109 if (vport->fc_flag & FC_VPORT_NEEDS_REG_VPI) 6226 if (vport->fc_flag & FC_VPORT_NEEDS_INIT_VPI)
6227 lpfc_issue_init_vpi(vport);
6228 else if (vport->fc_flag & FC_VPORT_NEEDS_REG_VPI)
6110 lpfc_register_new_vport(phba, vport, ndlp); 6229 lpfc_register_new_vport(phba, vport, ndlp);
6111 else 6230 else
6112 lpfc_do_scr_ns_plogi(phba, vport); 6231 lpfc_do_scr_ns_plogi(phba, vport);
diff --git a/drivers/scsi/lpfc/lpfc_hbadisc.c b/drivers/scsi/lpfc/lpfc_hbadisc.c
index 2445e399fd60..2359d0bfb734 100644
--- a/drivers/scsi/lpfc/lpfc_hbadisc.c
+++ b/drivers/scsi/lpfc/lpfc_hbadisc.c
@@ -525,6 +525,8 @@ lpfc_work_done(struct lpfc_hba *phba)
525 spin_unlock_irq(&phba->hbalock); 525 spin_unlock_irq(&phba->hbalock);
526 lpfc_sli_hbqbuf_add_hbqs(phba, LPFC_ELS_HBQ); 526 lpfc_sli_hbqbuf_add_hbqs(phba, LPFC_ELS_HBQ);
527 } 527 }
528 if (phba->fcf.fcf_flag & FCF_REDISC_EVT)
529 lpfc_sli4_fcf_redisc_event_proc(phba);
528 } 530 }
529 531
530 vports = lpfc_create_vport_work_array(phba); 532 vports = lpfc_create_vport_work_array(phba);
@@ -706,6 +708,8 @@ lpfc_cleanup_rpis(struct lpfc_vport *vport, int remove)
706void 708void
707lpfc_port_link_failure(struct lpfc_vport *vport) 709lpfc_port_link_failure(struct lpfc_vport *vport)
708{ 710{
711 lpfc_vport_set_state(vport, FC_VPORT_LINKDOWN);
712
709 /* Cleanup any outstanding received buffers */ 713 /* Cleanup any outstanding received buffers */
710 lpfc_cleanup_rcv_buffers(vport); 714 lpfc_cleanup_rcv_buffers(vport);
711 715
@@ -752,12 +756,14 @@ lpfc_linkdown(struct lpfc_hba *phba)
752 lpfc_scsi_dev_block(phba); 756 lpfc_scsi_dev_block(phba);
753 757
754 spin_lock_irq(&phba->hbalock); 758 spin_lock_irq(&phba->hbalock);
755 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_DISCOVERED); 759 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
760 spin_unlock_irq(&phba->hbalock);
756 if (phba->link_state > LPFC_LINK_DOWN) { 761 if (phba->link_state > LPFC_LINK_DOWN) {
757 phba->link_state = LPFC_LINK_DOWN; 762 phba->link_state = LPFC_LINK_DOWN;
763 spin_lock_irq(shost->host_lock);
758 phba->pport->fc_flag &= ~FC_LBIT; 764 phba->pport->fc_flag &= ~FC_LBIT;
765 spin_unlock_irq(shost->host_lock);
759 } 766 }
760 spin_unlock_irq(&phba->hbalock);
761 vports = lpfc_create_vport_work_array(phba); 767 vports = lpfc_create_vport_work_array(phba);
762 if (vports != NULL) 768 if (vports != NULL)
763 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 769 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
@@ -1023,7 +1029,7 @@ lpfc_mbx_cmpl_reg_fcfi(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1023 return; 1029 return;
1024 } 1030 }
1025 spin_lock_irqsave(&phba->hbalock, flags); 1031 spin_lock_irqsave(&phba->hbalock, flags);
1026 phba->fcf.fcf_flag |= (FCF_DISCOVERED | FCF_IN_USE); 1032 phba->fcf.fcf_flag |= (FCF_SCAN_DONE | FCF_IN_USE);
1027 phba->hba_flag &= ~FCF_DISC_INPROGRESS; 1033 phba->hba_flag &= ~FCF_DISC_INPROGRESS;
1028 spin_unlock_irqrestore(&phba->hbalock, flags); 1034 spin_unlock_irqrestore(&phba->hbalock, flags);
1029 if (vport->port_state != LPFC_FLOGI) 1035 if (vport->port_state != LPFC_FLOGI)
@@ -1045,25 +1051,23 @@ lpfc_mbx_cmpl_reg_fcfi(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1045static uint32_t 1051static uint32_t
1046lpfc_fab_name_match(uint8_t *fab_name, struct fcf_record *new_fcf_record) 1052lpfc_fab_name_match(uint8_t *fab_name, struct fcf_record *new_fcf_record)
1047{ 1053{
1048 if ((fab_name[0] == 1054 if (fab_name[0] != bf_get(lpfc_fcf_record_fab_name_0, new_fcf_record))
1049 bf_get(lpfc_fcf_record_fab_name_0, new_fcf_record)) && 1055 return 0;
1050 (fab_name[1] == 1056 if (fab_name[1] != bf_get(lpfc_fcf_record_fab_name_1, new_fcf_record))
1051 bf_get(lpfc_fcf_record_fab_name_1, new_fcf_record)) && 1057 return 0;
1052 (fab_name[2] == 1058 if (fab_name[2] != bf_get(lpfc_fcf_record_fab_name_2, new_fcf_record))
1053 bf_get(lpfc_fcf_record_fab_name_2, new_fcf_record)) &&
1054 (fab_name[3] ==
1055 bf_get(lpfc_fcf_record_fab_name_3, new_fcf_record)) &&
1056 (fab_name[4] ==
1057 bf_get(lpfc_fcf_record_fab_name_4, new_fcf_record)) &&
1058 (fab_name[5] ==
1059 bf_get(lpfc_fcf_record_fab_name_5, new_fcf_record)) &&
1060 (fab_name[6] ==
1061 bf_get(lpfc_fcf_record_fab_name_6, new_fcf_record)) &&
1062 (fab_name[7] ==
1063 bf_get(lpfc_fcf_record_fab_name_7, new_fcf_record)))
1064 return 1;
1065 else
1066 return 0; 1059 return 0;
1060 if (fab_name[3] != bf_get(lpfc_fcf_record_fab_name_3, new_fcf_record))
1061 return 0;
1062 if (fab_name[4] != bf_get(lpfc_fcf_record_fab_name_4, new_fcf_record))
1063 return 0;
1064 if (fab_name[5] != bf_get(lpfc_fcf_record_fab_name_5, new_fcf_record))
1065 return 0;
1066 if (fab_name[6] != bf_get(lpfc_fcf_record_fab_name_6, new_fcf_record))
1067 return 0;
1068 if (fab_name[7] != bf_get(lpfc_fcf_record_fab_name_7, new_fcf_record))
1069 return 0;
1070 return 1;
1067} 1071}
1068 1072
1069/** 1073/**
@@ -1078,30 +1082,28 @@ lpfc_fab_name_match(uint8_t *fab_name, struct fcf_record *new_fcf_record)
1078static uint32_t 1082static uint32_t
1079lpfc_sw_name_match(uint8_t *sw_name, struct fcf_record *new_fcf_record) 1083lpfc_sw_name_match(uint8_t *sw_name, struct fcf_record *new_fcf_record)
1080{ 1084{
1081 if ((sw_name[0] == 1085 if (sw_name[0] != bf_get(lpfc_fcf_record_switch_name_0, new_fcf_record))
1082 bf_get(lpfc_fcf_record_switch_name_0, new_fcf_record)) &&
1083 (sw_name[1] ==
1084 bf_get(lpfc_fcf_record_switch_name_1, new_fcf_record)) &&
1085 (sw_name[2] ==
1086 bf_get(lpfc_fcf_record_switch_name_2, new_fcf_record)) &&
1087 (sw_name[3] ==
1088 bf_get(lpfc_fcf_record_switch_name_3, new_fcf_record)) &&
1089 (sw_name[4] ==
1090 bf_get(lpfc_fcf_record_switch_name_4, new_fcf_record)) &&
1091 (sw_name[5] ==
1092 bf_get(lpfc_fcf_record_switch_name_5, new_fcf_record)) &&
1093 (sw_name[6] ==
1094 bf_get(lpfc_fcf_record_switch_name_6, new_fcf_record)) &&
1095 (sw_name[7] ==
1096 bf_get(lpfc_fcf_record_switch_name_7, new_fcf_record)))
1097 return 1;
1098 else
1099 return 0; 1086 return 0;
1087 if (sw_name[1] != bf_get(lpfc_fcf_record_switch_name_1, new_fcf_record))
1088 return 0;
1089 if (sw_name[2] != bf_get(lpfc_fcf_record_switch_name_2, new_fcf_record))
1090 return 0;
1091 if (sw_name[3] != bf_get(lpfc_fcf_record_switch_name_3, new_fcf_record))
1092 return 0;
1093 if (sw_name[4] != bf_get(lpfc_fcf_record_switch_name_4, new_fcf_record))
1094 return 0;
1095 if (sw_name[5] != bf_get(lpfc_fcf_record_switch_name_5, new_fcf_record))
1096 return 0;
1097 if (sw_name[6] != bf_get(lpfc_fcf_record_switch_name_6, new_fcf_record))
1098 return 0;
1099 if (sw_name[7] != bf_get(lpfc_fcf_record_switch_name_7, new_fcf_record))
1100 return 0;
1101 return 1;
1100} 1102}
1101 1103
1102/** 1104/**
1103 * lpfc_mac_addr_match - Check if the fcf mac address match. 1105 * lpfc_mac_addr_match - Check if the fcf mac address match.
1104 * @phba: pointer to lpfc hba data structure. 1106 * @mac_addr: pointer to mac address.
1105 * @new_fcf_record: pointer to fcf record. 1107 * @new_fcf_record: pointer to fcf record.
1106 * 1108 *
1107 * This routine compare the fcf record's mac address with HBA's 1109 * This routine compare the fcf record's mac address with HBA's
@@ -1109,85 +1111,115 @@ lpfc_sw_name_match(uint8_t *sw_name, struct fcf_record *new_fcf_record)
1109 * returns 1 else return 0. 1111 * returns 1 else return 0.
1110 **/ 1112 **/
1111static uint32_t 1113static uint32_t
1112lpfc_mac_addr_match(struct lpfc_hba *phba, struct fcf_record *new_fcf_record) 1114lpfc_mac_addr_match(uint8_t *mac_addr, struct fcf_record *new_fcf_record)
1113{ 1115{
1114 if ((phba->fcf.mac_addr[0] == 1116 if (mac_addr[0] != bf_get(lpfc_fcf_record_mac_0, new_fcf_record))
1115 bf_get(lpfc_fcf_record_mac_0, new_fcf_record)) && 1117 return 0;
1116 (phba->fcf.mac_addr[1] == 1118 if (mac_addr[1] != bf_get(lpfc_fcf_record_mac_1, new_fcf_record))
1117 bf_get(lpfc_fcf_record_mac_1, new_fcf_record)) && 1119 return 0;
1118 (phba->fcf.mac_addr[2] == 1120 if (mac_addr[2] != bf_get(lpfc_fcf_record_mac_2, new_fcf_record))
1119 bf_get(lpfc_fcf_record_mac_2, new_fcf_record)) &&
1120 (phba->fcf.mac_addr[3] ==
1121 bf_get(lpfc_fcf_record_mac_3, new_fcf_record)) &&
1122 (phba->fcf.mac_addr[4] ==
1123 bf_get(lpfc_fcf_record_mac_4, new_fcf_record)) &&
1124 (phba->fcf.mac_addr[5] ==
1125 bf_get(lpfc_fcf_record_mac_5, new_fcf_record)))
1126 return 1;
1127 else
1128 return 0; 1121 return 0;
1122 if (mac_addr[3] != bf_get(lpfc_fcf_record_mac_3, new_fcf_record))
1123 return 0;
1124 if (mac_addr[4] != bf_get(lpfc_fcf_record_mac_4, new_fcf_record))
1125 return 0;
1126 if (mac_addr[5] != bf_get(lpfc_fcf_record_mac_5, new_fcf_record))
1127 return 0;
1128 return 1;
1129}
1130
1131static bool
1132lpfc_vlan_id_match(uint16_t curr_vlan_id, uint16_t new_vlan_id)
1133{
1134 return (curr_vlan_id == new_vlan_id);
1129} 1135}
1130 1136
1131/** 1137/**
1132 * lpfc_copy_fcf_record - Copy fcf information to lpfc_hba. 1138 * lpfc_copy_fcf_record - Copy fcf information to lpfc_hba.
1133 * @phba: pointer to lpfc hba data structure. 1139 * @fcf: pointer to driver fcf record.
1134 * @new_fcf_record: pointer to fcf record. 1140 * @new_fcf_record: pointer to fcf record.
1135 * 1141 *
1136 * This routine copies the FCF information from the FCF 1142 * This routine copies the FCF information from the FCF
1137 * record to lpfc_hba data structure. 1143 * record to lpfc_hba data structure.
1138 **/ 1144 **/
1139static void 1145static void
1140lpfc_copy_fcf_record(struct lpfc_hba *phba, struct fcf_record *new_fcf_record) 1146lpfc_copy_fcf_record(struct lpfc_fcf_rec *fcf_rec,
1147 struct fcf_record *new_fcf_record)
1141{ 1148{
1142 phba->fcf.fabric_name[0] = 1149 /* Fabric name */
1150 fcf_rec->fabric_name[0] =
1143 bf_get(lpfc_fcf_record_fab_name_0, new_fcf_record); 1151 bf_get(lpfc_fcf_record_fab_name_0, new_fcf_record);
1144 phba->fcf.fabric_name[1] = 1152 fcf_rec->fabric_name[1] =
1145 bf_get(lpfc_fcf_record_fab_name_1, new_fcf_record); 1153 bf_get(lpfc_fcf_record_fab_name_1, new_fcf_record);
1146 phba->fcf.fabric_name[2] = 1154 fcf_rec->fabric_name[2] =
1147 bf_get(lpfc_fcf_record_fab_name_2, new_fcf_record); 1155 bf_get(lpfc_fcf_record_fab_name_2, new_fcf_record);
1148 phba->fcf.fabric_name[3] = 1156 fcf_rec->fabric_name[3] =
1149 bf_get(lpfc_fcf_record_fab_name_3, new_fcf_record); 1157 bf_get(lpfc_fcf_record_fab_name_3, new_fcf_record);
1150 phba->fcf.fabric_name[4] = 1158 fcf_rec->fabric_name[4] =
1151 bf_get(lpfc_fcf_record_fab_name_4, new_fcf_record); 1159 bf_get(lpfc_fcf_record_fab_name_4, new_fcf_record);
1152 phba->fcf.fabric_name[5] = 1160 fcf_rec->fabric_name[5] =
1153 bf_get(lpfc_fcf_record_fab_name_5, new_fcf_record); 1161 bf_get(lpfc_fcf_record_fab_name_5, new_fcf_record);
1154 phba->fcf.fabric_name[6] = 1162 fcf_rec->fabric_name[6] =
1155 bf_get(lpfc_fcf_record_fab_name_6, new_fcf_record); 1163 bf_get(lpfc_fcf_record_fab_name_6, new_fcf_record);
1156 phba->fcf.fabric_name[7] = 1164 fcf_rec->fabric_name[7] =
1157 bf_get(lpfc_fcf_record_fab_name_7, new_fcf_record); 1165 bf_get(lpfc_fcf_record_fab_name_7, new_fcf_record);
1158 phba->fcf.mac_addr[0] = 1166 /* Mac address */
1159 bf_get(lpfc_fcf_record_mac_0, new_fcf_record); 1167 fcf_rec->mac_addr[0] = bf_get(lpfc_fcf_record_mac_0, new_fcf_record);
1160 phba->fcf.mac_addr[1] = 1168 fcf_rec->mac_addr[1] = bf_get(lpfc_fcf_record_mac_1, new_fcf_record);
1161 bf_get(lpfc_fcf_record_mac_1, new_fcf_record); 1169 fcf_rec->mac_addr[2] = bf_get(lpfc_fcf_record_mac_2, new_fcf_record);
1162 phba->fcf.mac_addr[2] = 1170 fcf_rec->mac_addr[3] = bf_get(lpfc_fcf_record_mac_3, new_fcf_record);
1163 bf_get(lpfc_fcf_record_mac_2, new_fcf_record); 1171 fcf_rec->mac_addr[4] = bf_get(lpfc_fcf_record_mac_4, new_fcf_record);
1164 phba->fcf.mac_addr[3] = 1172 fcf_rec->mac_addr[5] = bf_get(lpfc_fcf_record_mac_5, new_fcf_record);
1165 bf_get(lpfc_fcf_record_mac_3, new_fcf_record); 1173 /* FCF record index */
1166 phba->fcf.mac_addr[4] = 1174 fcf_rec->fcf_indx = bf_get(lpfc_fcf_record_fcf_index, new_fcf_record);
1167 bf_get(lpfc_fcf_record_mac_4, new_fcf_record); 1175 /* FCF record priority */
1168 phba->fcf.mac_addr[5] = 1176 fcf_rec->priority = new_fcf_record->fip_priority;
1169 bf_get(lpfc_fcf_record_mac_5, new_fcf_record); 1177 /* Switch name */
1170 phba->fcf.fcf_indx = bf_get(lpfc_fcf_record_fcf_index, new_fcf_record); 1178 fcf_rec->switch_name[0] =
1171 phba->fcf.priority = new_fcf_record->fip_priority;
1172 phba->fcf.switch_name[0] =
1173 bf_get(lpfc_fcf_record_switch_name_0, new_fcf_record); 1179 bf_get(lpfc_fcf_record_switch_name_0, new_fcf_record);
1174 phba->fcf.switch_name[1] = 1180 fcf_rec->switch_name[1] =
1175 bf_get(lpfc_fcf_record_switch_name_1, new_fcf_record); 1181 bf_get(lpfc_fcf_record_switch_name_1, new_fcf_record);
1176 phba->fcf.switch_name[2] = 1182 fcf_rec->switch_name[2] =
1177 bf_get(lpfc_fcf_record_switch_name_2, new_fcf_record); 1183 bf_get(lpfc_fcf_record_switch_name_2, new_fcf_record);
1178 phba->fcf.switch_name[3] = 1184 fcf_rec->switch_name[3] =
1179 bf_get(lpfc_fcf_record_switch_name_3, new_fcf_record); 1185 bf_get(lpfc_fcf_record_switch_name_3, new_fcf_record);
1180 phba->fcf.switch_name[4] = 1186 fcf_rec->switch_name[4] =
1181 bf_get(lpfc_fcf_record_switch_name_4, new_fcf_record); 1187 bf_get(lpfc_fcf_record_switch_name_4, new_fcf_record);
1182 phba->fcf.switch_name[5] = 1188 fcf_rec->switch_name[5] =
1183 bf_get(lpfc_fcf_record_switch_name_5, new_fcf_record); 1189 bf_get(lpfc_fcf_record_switch_name_5, new_fcf_record);
1184 phba->fcf.switch_name[6] = 1190 fcf_rec->switch_name[6] =
1185 bf_get(lpfc_fcf_record_switch_name_6, new_fcf_record); 1191 bf_get(lpfc_fcf_record_switch_name_6, new_fcf_record);
1186 phba->fcf.switch_name[7] = 1192 fcf_rec->switch_name[7] =
1187 bf_get(lpfc_fcf_record_switch_name_7, new_fcf_record); 1193 bf_get(lpfc_fcf_record_switch_name_7, new_fcf_record);
1188} 1194}
1189 1195
1190/** 1196/**
1197 * lpfc_update_fcf_record - Update driver fcf record
1198 * @phba: pointer to lpfc hba data structure.
1199 * @fcf_rec: pointer to driver fcf record.
1200 * @new_fcf_record: pointer to hba fcf record.
1201 * @addr_mode: address mode to be set to the driver fcf record.
1202 * @vlan_id: vlan tag to be set to the driver fcf record.
1203 * @flag: flag bits to be set to the driver fcf record.
1204 *
1205 * This routine updates the driver FCF record from the new HBA FCF record
1206 * together with the address mode, vlan_id, and other informations. This
1207 * routine is called with the host lock held.
1208 **/
1209static void
1210__lpfc_update_fcf_record(struct lpfc_hba *phba, struct lpfc_fcf_rec *fcf_rec,
1211 struct fcf_record *new_fcf_record, uint32_t addr_mode,
1212 uint16_t vlan_id, uint32_t flag)
1213{
1214 /* Copy the fields from the HBA's FCF record */
1215 lpfc_copy_fcf_record(fcf_rec, new_fcf_record);
1216 /* Update other fields of driver FCF record */
1217 fcf_rec->addr_mode = addr_mode;
1218 fcf_rec->vlan_id = vlan_id;
1219 fcf_rec->flag |= (flag | RECORD_VALID);
1220}
1221
1222/**
1191 * lpfc_register_fcf - Register the FCF with hba. 1223 * lpfc_register_fcf - Register the FCF with hba.
1192 * @phba: pointer to lpfc hba data structure. 1224 * @phba: pointer to lpfc hba data structure.
1193 * 1225 *
@@ -1212,7 +1244,7 @@ lpfc_register_fcf(struct lpfc_hba *phba)
1212 1244
1213 /* The FCF is already registered, start discovery */ 1245 /* The FCF is already registered, start discovery */
1214 if (phba->fcf.fcf_flag & FCF_REGISTERED) { 1246 if (phba->fcf.fcf_flag & FCF_REGISTERED) {
1215 phba->fcf.fcf_flag |= (FCF_DISCOVERED | FCF_IN_USE); 1247 phba->fcf.fcf_flag |= (FCF_SCAN_DONE | FCF_IN_USE);
1216 phba->hba_flag &= ~FCF_DISC_INPROGRESS; 1248 phba->hba_flag &= ~FCF_DISC_INPROGRESS;
1217 spin_unlock_irqrestore(&phba->hbalock, flags); 1249 spin_unlock_irqrestore(&phba->hbalock, flags);
1218 if (phba->pport->port_state != LPFC_FLOGI) 1250 if (phba->pport->port_state != LPFC_FLOGI)
@@ -1250,6 +1282,7 @@ lpfc_register_fcf(struct lpfc_hba *phba)
1250 * @new_fcf_record: pointer to fcf record. 1282 * @new_fcf_record: pointer to fcf record.
1251 * @boot_flag: Indicates if this record used by boot bios. 1283 * @boot_flag: Indicates if this record used by boot bios.
1252 * @addr_mode: The address mode to be used by this FCF 1284 * @addr_mode: The address mode to be used by this FCF
1285 * @vlan_id: The vlan id to be used as vlan tagging by this FCF.
1253 * 1286 *
1254 * This routine compare the fcf record with connect list obtained from the 1287 * This routine compare the fcf record with connect list obtained from the
1255 * config region to decide if this FCF can be used for SAN discovery. It returns 1288 * config region to decide if this FCF can be used for SAN discovery. It returns
@@ -1323,7 +1356,8 @@ lpfc_match_fcf_conn_list(struct lpfc_hba *phba,
1323 return 1; 1356 return 1;
1324 } 1357 }
1325 1358
1326 list_for_each_entry(conn_entry, &phba->fcf_conn_rec_list, list) { 1359 list_for_each_entry(conn_entry,
1360 &phba->fcf_conn_rec_list, list) {
1327 if (!(conn_entry->conn_rec.flags & FCFCNCT_VALID)) 1361 if (!(conn_entry->conn_rec.flags & FCFCNCT_VALID))
1328 continue; 1362 continue;
1329 1363
@@ -1470,6 +1504,7 @@ lpfc_check_pending_fcoe_event(struct lpfc_hba *phba, uint8_t unreg_fcf)
1470 */ 1504 */
1471 spin_lock_irq(&phba->hbalock); 1505 spin_lock_irq(&phba->hbalock);
1472 phba->hba_flag &= ~FCF_DISC_INPROGRESS; 1506 phba->hba_flag &= ~FCF_DISC_INPROGRESS;
1507 phba->fcf.fcf_flag &= ~FCF_REDISC_FOV;
1473 spin_unlock_irq(&phba->hbalock); 1508 spin_unlock_irq(&phba->hbalock);
1474 } 1509 }
1475 1510
@@ -1524,11 +1559,12 @@ lpfc_mbx_cmpl_read_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1524 uint32_t shdr_status, shdr_add_status; 1559 uint32_t shdr_status, shdr_add_status;
1525 union lpfc_sli4_cfg_shdr *shdr; 1560 union lpfc_sli4_cfg_shdr *shdr;
1526 struct fcf_record *new_fcf_record; 1561 struct fcf_record *new_fcf_record;
1527 int rc;
1528 uint32_t boot_flag, addr_mode; 1562 uint32_t boot_flag, addr_mode;
1529 uint32_t next_fcf_index; 1563 uint32_t next_fcf_index;
1530 unsigned long flags; 1564 struct lpfc_fcf_rec *fcf_rec = NULL;
1565 unsigned long iflags;
1531 uint16_t vlan_id; 1566 uint16_t vlan_id;
1567 int rc;
1532 1568
1533 /* If there is pending FCoE event restart FCF table scan */ 1569 /* If there is pending FCoE event restart FCF table scan */
1534 if (lpfc_check_pending_fcoe_event(phba, 0)) { 1570 if (lpfc_check_pending_fcoe_event(phba, 0)) {
@@ -1583,9 +1619,8 @@ lpfc_mbx_cmpl_read_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1583 sizeof(struct fcf_record)); 1619 sizeof(struct fcf_record));
1584 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr); 1620 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
1585 1621
1586 rc = lpfc_match_fcf_conn_list(phba, new_fcf_record, 1622 rc = lpfc_match_fcf_conn_list(phba, new_fcf_record, &boot_flag,
1587 &boot_flag, &addr_mode, 1623 &addr_mode, &vlan_id);
1588 &vlan_id);
1589 /* 1624 /*
1590 * If the fcf record does not match with connect list entries 1625 * If the fcf record does not match with connect list entries
1591 * read the next entry. 1626 * read the next entry.
@@ -1594,90 +1629,159 @@ lpfc_mbx_cmpl_read_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1594 goto read_next_fcf; 1629 goto read_next_fcf;
1595 /* 1630 /*
1596 * If this is not the first FCF discovery of the HBA, use last 1631 * If this is not the first FCF discovery of the HBA, use last
1597 * FCF record for the discovery. 1632 * FCF record for the discovery. The condition that a rescan
1633 * matches the in-use FCF record: fabric name, switch name, mac
1634 * address, and vlan_id.
1598 */ 1635 */
1599 spin_lock_irqsave(&phba->hbalock, flags); 1636 spin_lock_irqsave(&phba->hbalock, iflags);
1600 if (phba->fcf.fcf_flag & FCF_IN_USE) { 1637 if (phba->fcf.fcf_flag & FCF_IN_USE) {
1601 if (lpfc_fab_name_match(phba->fcf.fabric_name, 1638 if (lpfc_fab_name_match(phba->fcf.current_rec.fabric_name,
1602 new_fcf_record) && 1639 new_fcf_record) &&
1603 lpfc_sw_name_match(phba->fcf.switch_name, 1640 lpfc_sw_name_match(phba->fcf.current_rec.switch_name,
1604 new_fcf_record) && 1641 new_fcf_record) &&
1605 lpfc_mac_addr_match(phba, new_fcf_record)) { 1642 lpfc_mac_addr_match(phba->fcf.current_rec.mac_addr,
1643 new_fcf_record) &&
1644 lpfc_vlan_id_match(phba->fcf.current_rec.vlan_id,
1645 vlan_id)) {
1606 phba->fcf.fcf_flag |= FCF_AVAILABLE; 1646 phba->fcf.fcf_flag |= FCF_AVAILABLE;
1607 spin_unlock_irqrestore(&phba->hbalock, flags); 1647 if (phba->fcf.fcf_flag & FCF_REDISC_PEND)
1648 /* Stop FCF redisc wait timer if pending */
1649 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
1650 else if (phba->fcf.fcf_flag & FCF_REDISC_FOV)
1651 /* If in fast failover, mark it's completed */
1652 phba->fcf.fcf_flag &= ~FCF_REDISC_FOV;
1653 spin_unlock_irqrestore(&phba->hbalock, iflags);
1608 goto out; 1654 goto out;
1609 } 1655 }
1610 spin_unlock_irqrestore(&phba->hbalock, flags); 1656 /*
1611 goto read_next_fcf; 1657 * Read next FCF record from HBA searching for the matching
1658 * with in-use record only if not during the fast failover
1659 * period. In case of fast failover period, it shall try to
1660 * determine whether the FCF record just read should be the
1661 * next candidate.
1662 */
1663 if (!(phba->fcf.fcf_flag & FCF_REDISC_FOV)) {
1664 spin_unlock_irqrestore(&phba->hbalock, iflags);
1665 goto read_next_fcf;
1666 }
1612 } 1667 }
1668 /*
1669 * Update on failover FCF record only if it's in FCF fast-failover
1670 * period; otherwise, update on current FCF record.
1671 */
1672 if (phba->fcf.fcf_flag & FCF_REDISC_FOV) {
1673 /* Fast FCF failover only to the same fabric name */
1674 if (lpfc_fab_name_match(phba->fcf.current_rec.fabric_name,
1675 new_fcf_record))
1676 fcf_rec = &phba->fcf.failover_rec;
1677 else
1678 goto read_next_fcf;
1679 } else
1680 fcf_rec = &phba->fcf.current_rec;
1681
1613 if (phba->fcf.fcf_flag & FCF_AVAILABLE) { 1682 if (phba->fcf.fcf_flag & FCF_AVAILABLE) {
1614 /* 1683 /*
1615 * If the current FCF record does not have boot flag 1684 * If the driver FCF record does not have boot flag
1616 * set and new fcf record has boot flag set, use the 1685 * set and new hba fcf record has boot flag set, use
1617 * new fcf record. 1686 * the new hba fcf record.
1618 */ 1687 */
1619 if (boot_flag && !(phba->fcf.fcf_flag & FCF_BOOT_ENABLE)) { 1688 if (boot_flag && !(fcf_rec->flag & BOOT_ENABLE)) {
1620 /* Use this FCF record */ 1689 /* Choose this FCF record */
1621 lpfc_copy_fcf_record(phba, new_fcf_record); 1690 __lpfc_update_fcf_record(phba, fcf_rec, new_fcf_record,
1622 phba->fcf.addr_mode = addr_mode; 1691 addr_mode, vlan_id, BOOT_ENABLE);
1623 phba->fcf.fcf_flag |= FCF_BOOT_ENABLE; 1692 spin_unlock_irqrestore(&phba->hbalock, iflags);
1624 if (vlan_id != 0xFFFF) {
1625 phba->fcf.fcf_flag |= FCF_VALID_VLAN;
1626 phba->fcf.vlan_id = vlan_id;
1627 }
1628 spin_unlock_irqrestore(&phba->hbalock, flags);
1629 goto read_next_fcf; 1693 goto read_next_fcf;
1630 } 1694 }
1631 /* 1695 /*
1632 * If the current FCF record has boot flag set and the 1696 * If the driver FCF record has boot flag set and the
1633 * new FCF record does not have boot flag, read the next 1697 * new hba FCF record does not have boot flag, read
1634 * FCF record. 1698 * the next FCF record.
1635 */ 1699 */
1636 if (!boot_flag && (phba->fcf.fcf_flag & FCF_BOOT_ENABLE)) { 1700 if (!boot_flag && (fcf_rec->flag & BOOT_ENABLE)) {
1637 spin_unlock_irqrestore(&phba->hbalock, flags); 1701 spin_unlock_irqrestore(&phba->hbalock, iflags);
1638 goto read_next_fcf; 1702 goto read_next_fcf;
1639 } 1703 }
1640 /* 1704 /*
1641 * If there is a record with lower priority value for 1705 * If the new hba FCF record has lower priority value
1642 * the current FCF, use that record. 1706 * than the driver FCF record, use the new record.
1643 */ 1707 */
1644 if (lpfc_fab_name_match(phba->fcf.fabric_name, 1708 if (lpfc_fab_name_match(fcf_rec->fabric_name, new_fcf_record) &&
1645 new_fcf_record) && 1709 (new_fcf_record->fip_priority < fcf_rec->priority)) {
1646 (new_fcf_record->fip_priority < phba->fcf.priority)) { 1710 /* Choose this FCF record */
1647 /* Use this FCF record */ 1711 __lpfc_update_fcf_record(phba, fcf_rec, new_fcf_record,
1648 lpfc_copy_fcf_record(phba, new_fcf_record); 1712 addr_mode, vlan_id, 0);
1649 phba->fcf.addr_mode = addr_mode;
1650 if (vlan_id != 0xFFFF) {
1651 phba->fcf.fcf_flag |= FCF_VALID_VLAN;
1652 phba->fcf.vlan_id = vlan_id;
1653 }
1654 spin_unlock_irqrestore(&phba->hbalock, flags);
1655 goto read_next_fcf;
1656 } 1713 }
1657 spin_unlock_irqrestore(&phba->hbalock, flags); 1714 spin_unlock_irqrestore(&phba->hbalock, iflags);
1658 goto read_next_fcf; 1715 goto read_next_fcf;
1659 } 1716 }
1660 /* 1717 /*
1661 * This is the first available FCF record, use this 1718 * This is the first suitable FCF record, choose this record for
1662 * record. 1719 * initial best-fit FCF.
1663 */ 1720 */
1664 lpfc_copy_fcf_record(phba, new_fcf_record); 1721 if (fcf_rec) {
1665 phba->fcf.addr_mode = addr_mode; 1722 __lpfc_update_fcf_record(phba, fcf_rec, new_fcf_record,
1666 if (boot_flag) 1723 addr_mode, vlan_id, (boot_flag ?
1667 phba->fcf.fcf_flag |= FCF_BOOT_ENABLE; 1724 BOOT_ENABLE : 0));
1668 phba->fcf.fcf_flag |= FCF_AVAILABLE; 1725 phba->fcf.fcf_flag |= FCF_AVAILABLE;
1669 if (vlan_id != 0xFFFF) {
1670 phba->fcf.fcf_flag |= FCF_VALID_VLAN;
1671 phba->fcf.vlan_id = vlan_id;
1672 } 1726 }
1673 spin_unlock_irqrestore(&phba->hbalock, flags); 1727 spin_unlock_irqrestore(&phba->hbalock, iflags);
1674 goto read_next_fcf; 1728 goto read_next_fcf;
1675 1729
1676read_next_fcf: 1730read_next_fcf:
1677 lpfc_sli4_mbox_cmd_free(phba, mboxq); 1731 lpfc_sli4_mbox_cmd_free(phba, mboxq);
1678 if (next_fcf_index == LPFC_FCOE_FCF_NEXT_NONE || next_fcf_index == 0) 1732 if (next_fcf_index == LPFC_FCOE_FCF_NEXT_NONE || next_fcf_index == 0) {
1679 lpfc_register_fcf(phba); 1733 if (phba->fcf.fcf_flag & FCF_REDISC_FOV) {
1680 else 1734 /*
1735 * Case of FCF fast failover scan
1736 */
1737
1738 /*
1739 * It has not found any suitable FCF record, cancel
1740 * FCF scan inprogress, and do nothing
1741 */
1742 if (!(phba->fcf.failover_rec.flag & RECORD_VALID)) {
1743 spin_lock_irqsave(&phba->hbalock, iflags);
1744 phba->hba_flag &= ~FCF_DISC_INPROGRESS;
1745 spin_unlock_irqrestore(&phba->hbalock, iflags);
1746 return;
1747 }
1748 /*
1749 * It has found a suitable FCF record that is not
1750 * the same as in-use FCF record, unregister the
1751 * in-use FCF record, replace the in-use FCF record
1752 * with the new FCF record, mark FCF fast failover
1753 * completed, and then start register the new FCF
1754 * record.
1755 */
1756
1757 /* unregister the current in-use FCF record */
1758 lpfc_unregister_fcf(phba);
1759 /* replace in-use record with the new record */
1760 memcpy(&phba->fcf.current_rec,
1761 &phba->fcf.failover_rec,
1762 sizeof(struct lpfc_fcf_rec));
1763 /* mark the FCF fast failover completed */
1764 spin_lock_irqsave(&phba->hbalock, iflags);
1765 phba->fcf.fcf_flag &= ~FCF_REDISC_FOV;
1766 spin_unlock_irqrestore(&phba->hbalock, iflags);
1767 /* Register to the new FCF record */
1768 lpfc_register_fcf(phba);
1769 } else {
1770 /*
1771 * In case of transaction period to fast FCF failover,
1772 * do nothing when search to the end of the FCF table.
1773 */
1774 if ((phba->fcf.fcf_flag & FCF_REDISC_EVT) ||
1775 (phba->fcf.fcf_flag & FCF_REDISC_PEND))
1776 return;
1777 /*
1778 * Otherwise, initial scan or post linkdown rescan,
1779 * register with the best fit FCF record found so
1780 * far through the scanning process.
1781 */
1782 lpfc_register_fcf(phba);
1783 }
1784 } else
1681 lpfc_sli4_read_fcf_record(phba, next_fcf_index); 1785 lpfc_sli4_read_fcf_record(phba, next_fcf_index);
1682 return; 1786 return;
1683 1787
@@ -1695,10 +1799,13 @@ out:
1695 * 1799 *
1696 * This function handles completion of init vpi mailbox command. 1800 * This function handles completion of init vpi mailbox command.
1697 */ 1801 */
1698static void 1802void
1699lpfc_init_vpi_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) 1803lpfc_init_vpi_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1700{ 1804{
1701 struct lpfc_vport *vport = mboxq->vport; 1805 struct lpfc_vport *vport = mboxq->vport;
1806 struct lpfc_nodelist *ndlp;
1807 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
1808
1702 if (mboxq->u.mb.mbxStatus) { 1809 if (mboxq->u.mb.mbxStatus) {
1703 lpfc_printf_vlog(vport, KERN_ERR, 1810 lpfc_printf_vlog(vport, KERN_ERR,
1704 LOG_MBOX, 1811 LOG_MBOX,
@@ -1708,9 +1815,23 @@ lpfc_init_vpi_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1708 lpfc_vport_set_state(vport, FC_VPORT_FAILED); 1815 lpfc_vport_set_state(vport, FC_VPORT_FAILED);
1709 return; 1816 return;
1710 } 1817 }
1711 spin_lock_irq(&phba->hbalock); 1818 spin_lock_irq(shost->host_lock);
1712 vport->fc_flag &= ~FC_VPORT_NEEDS_INIT_VPI; 1819 vport->fc_flag &= ~FC_VPORT_NEEDS_INIT_VPI;
1713 spin_unlock_irq(&phba->hbalock); 1820 spin_unlock_irq(shost->host_lock);
1821
1822 /* If this port is physical port or FDISC is done, do reg_vpi */
1823 if ((phba->pport == vport) || (vport->port_state == LPFC_FDISC)) {
1824 ndlp = lpfc_findnode_did(vport, Fabric_DID);
1825 if (!ndlp)
1826 lpfc_printf_vlog(vport, KERN_ERR,
1827 LOG_DISCOVERY,
1828 "2731 Cannot find fabric "
1829 "controller node\n");
1830 else
1831 lpfc_register_new_vport(phba, vport, ndlp);
1832 mempool_free(mboxq, phba->mbox_mem_pool);
1833 return;
1834 }
1714 1835
1715 if (phba->link_flag & LS_NPIV_FAB_SUPPORTED) 1836 if (phba->link_flag & LS_NPIV_FAB_SUPPORTED)
1716 lpfc_initial_fdisc(vport); 1837 lpfc_initial_fdisc(vport);
@@ -1719,10 +1840,42 @@ lpfc_init_vpi_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1719 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS, 1840 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS,
1720 "2606 No NPIV Fabric support\n"); 1841 "2606 No NPIV Fabric support\n");
1721 } 1842 }
1843 mempool_free(mboxq, phba->mbox_mem_pool);
1722 return; 1844 return;
1723} 1845}
1724 1846
1725/** 1847/**
1848 * lpfc_issue_init_vpi - Issue init_vpi mailbox command.
1849 * @vport: pointer to lpfc_vport data structure.
1850 *
1851 * This function issue a init_vpi mailbox command to initialize
1852 * VPI for the vport.
1853 */
1854void
1855lpfc_issue_init_vpi(struct lpfc_vport *vport)
1856{
1857 LPFC_MBOXQ_t *mboxq;
1858 int rc;
1859
1860 mboxq = mempool_alloc(vport->phba->mbox_mem_pool, GFP_KERNEL);
1861 if (!mboxq) {
1862 lpfc_printf_vlog(vport, KERN_ERR,
1863 LOG_MBOX, "2607 Failed to allocate "
1864 "init_vpi mailbox\n");
1865 return;
1866 }
1867 lpfc_init_vpi(vport->phba, mboxq, vport->vpi);
1868 mboxq->vport = vport;
1869 mboxq->mbox_cmpl = lpfc_init_vpi_cmpl;
1870 rc = lpfc_sli_issue_mbox(vport->phba, mboxq, MBX_NOWAIT);
1871 if (rc == MBX_NOT_FINISHED) {
1872 lpfc_printf_vlog(vport, KERN_ERR,
1873 LOG_MBOX, "2608 Failed to issue init_vpi mailbox\n");
1874 mempool_free(mboxq, vport->phba->mbox_mem_pool);
1875 }
1876}
1877
1878/**
1726 * lpfc_start_fdiscs - send fdiscs for each vports on this port. 1879 * lpfc_start_fdiscs - send fdiscs for each vports on this port.
1727 * @phba: pointer to lpfc hba data structure. 1880 * @phba: pointer to lpfc hba data structure.
1728 * 1881 *
@@ -1734,8 +1887,6 @@ lpfc_start_fdiscs(struct lpfc_hba *phba)
1734{ 1887{
1735 struct lpfc_vport **vports; 1888 struct lpfc_vport **vports;
1736 int i; 1889 int i;
1737 LPFC_MBOXQ_t *mboxq;
1738 int rc;
1739 1890
1740 vports = lpfc_create_vport_work_array(phba); 1891 vports = lpfc_create_vport_work_array(phba);
1741 if (vports != NULL) { 1892 if (vports != NULL) {
@@ -1754,26 +1905,7 @@ lpfc_start_fdiscs(struct lpfc_hba *phba)
1754 continue; 1905 continue;
1755 } 1906 }
1756 if (vports[i]->fc_flag & FC_VPORT_NEEDS_INIT_VPI) { 1907 if (vports[i]->fc_flag & FC_VPORT_NEEDS_INIT_VPI) {
1757 mboxq = mempool_alloc(phba->mbox_mem_pool, 1908 lpfc_issue_init_vpi(vports[i]);
1758 GFP_KERNEL);
1759 if (!mboxq) {
1760 lpfc_printf_vlog(vports[i], KERN_ERR,
1761 LOG_MBOX, "2607 Failed to allocate "
1762 "init_vpi mailbox\n");
1763 continue;
1764 }
1765 lpfc_init_vpi(phba, mboxq, vports[i]->vpi);
1766 mboxq->vport = vports[i];
1767 mboxq->mbox_cmpl = lpfc_init_vpi_cmpl;
1768 rc = lpfc_sli_issue_mbox(phba, mboxq,
1769 MBX_NOWAIT);
1770 if (rc == MBX_NOT_FINISHED) {
1771 lpfc_printf_vlog(vports[i], KERN_ERR,
1772 LOG_MBOX, "2608 Failed to issue "
1773 "init_vpi mailbox\n");
1774 mempool_free(mboxq,
1775 phba->mbox_mem_pool);
1776 }
1777 continue; 1909 continue;
1778 } 1910 }
1779 if (phba->link_flag & LS_NPIV_FAB_SUPPORTED) 1911 if (phba->link_flag & LS_NPIV_FAB_SUPPORTED)
@@ -1796,6 +1928,7 @@ lpfc_mbx_cmpl_reg_vfi(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1796{ 1928{
1797 struct lpfc_dmabuf *dmabuf = mboxq->context1; 1929 struct lpfc_dmabuf *dmabuf = mboxq->context1;
1798 struct lpfc_vport *vport = mboxq->vport; 1930 struct lpfc_vport *vport = mboxq->vport;
1931 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
1799 1932
1800 if (mboxq->u.mb.mbxStatus) { 1933 if (mboxq->u.mb.mbxStatus) {
1801 lpfc_printf_vlog(vport, KERN_ERR, LOG_MBOX, 1934 lpfc_printf_vlog(vport, KERN_ERR, LOG_MBOX,
@@ -1813,7 +1946,11 @@ lpfc_mbx_cmpl_reg_vfi(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1813 goto fail_free_mem; 1946 goto fail_free_mem;
1814 } 1947 }
1815 /* The VPI is implicitly registered when the VFI is registered */ 1948 /* The VPI is implicitly registered when the VFI is registered */
1949 spin_lock_irq(shost->host_lock);
1816 vport->vpi_state |= LPFC_VPI_REGISTERED; 1950 vport->vpi_state |= LPFC_VPI_REGISTERED;
1951 vport->fc_flag |= FC_VFI_REGISTERED;
1952 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
1953 spin_unlock_irq(shost->host_lock);
1817 1954
1818 if (vport->port_state == LPFC_FABRIC_CFG_LINK) { 1955 if (vport->port_state == LPFC_FABRIC_CFG_LINK) {
1819 lpfc_start_fdiscs(phba); 1956 lpfc_start_fdiscs(phba);
@@ -2050,8 +2187,7 @@ lpfc_mbx_process_link_up(struct lpfc_hba *phba, READ_LA_VAR *la)
2050 return; 2187 return;
2051 } 2188 }
2052 spin_unlock_irq(&phba->hbalock); 2189 spin_unlock_irq(&phba->hbalock);
2053 rc = lpfc_sli4_read_fcf_record(phba, 2190 rc = lpfc_sli4_read_fcf_record(phba, LPFC_FCOE_FCF_GET_FIRST);
2054 LPFC_FCOE_FCF_GET_FIRST);
2055 if (rc) 2191 if (rc)
2056 goto out; 2192 goto out;
2057 } 2193 }
@@ -2139,10 +2275,12 @@ lpfc_mbx_cmpl_read_la(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2139 } 2275 }
2140 2276
2141 phba->fc_eventTag = la->eventTag; 2277 phba->fc_eventTag = la->eventTag;
2278 spin_lock_irq(&phba->hbalock);
2142 if (la->mm) 2279 if (la->mm)
2143 phba->sli.sli_flag |= LPFC_MENLO_MAINT; 2280 phba->sli.sli_flag |= LPFC_MENLO_MAINT;
2144 else 2281 else
2145 phba->sli.sli_flag &= ~LPFC_MENLO_MAINT; 2282 phba->sli.sli_flag &= ~LPFC_MENLO_MAINT;
2283 spin_unlock_irq(&phba->hbalock);
2146 2284
2147 phba->link_events++; 2285 phba->link_events++;
2148 if (la->attType == AT_LINK_UP && (!la->mm)) { 2286 if (la->attType == AT_LINK_UP && (!la->mm)) {
@@ -2271,10 +2409,10 @@ lpfc_mbx_cmpl_unreg_vpi(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2271 mb->mbxStatus); 2409 mb->mbxStatus);
2272 break; 2410 break;
2273 } 2411 }
2274 spin_lock_irq(&phba->hbalock); 2412 spin_lock_irq(shost->host_lock);
2275 vport->vpi_state &= ~LPFC_VPI_REGISTERED; 2413 vport->vpi_state &= ~LPFC_VPI_REGISTERED;
2276 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 2414 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
2277 spin_unlock_irq(&phba->hbalock); 2415 spin_unlock_irq(shost->host_lock);
2278 vport->unreg_vpi_cmpl = VPORT_OK; 2416 vport->unreg_vpi_cmpl = VPORT_OK;
2279 mempool_free(pmb, phba->mbox_mem_pool); 2417 mempool_free(pmb, phba->mbox_mem_pool);
2280 /* 2418 /*
@@ -2332,7 +2470,10 @@ lpfc_mbx_cmpl_reg_vpi(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2332 goto out; 2470 goto out;
2333 } 2471 }
2334 2472
2473 spin_lock_irq(shost->host_lock);
2335 vport->vpi_state |= LPFC_VPI_REGISTERED; 2474 vport->vpi_state |= LPFC_VPI_REGISTERED;
2475 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
2476 spin_unlock_irq(shost->host_lock);
2336 vport->num_disc_nodes = 0; 2477 vport->num_disc_nodes = 0;
2337 /* go thru NPR list and issue ELS PLOGIs */ 2478 /* go thru NPR list and issue ELS PLOGIs */
2338 if (vport->fc_npr_cnt) 2479 if (vport->fc_npr_cnt)
@@ -3218,6 +3359,34 @@ lpfc_unreg_rpi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
3218 return 0; 3359 return 0;
3219} 3360}
3220 3361
3362/**
3363 * lpfc_unreg_hba_rpis - Unregister rpis registered to the hba.
3364 * @phba: pointer to lpfc hba data structure.
3365 *
3366 * This routine is invoked to unregister all the currently registered RPIs
3367 * to the HBA.
3368 **/
3369void
3370lpfc_unreg_hba_rpis(struct lpfc_hba *phba)
3371{
3372 struct lpfc_vport **vports;
3373 struct lpfc_nodelist *ndlp;
3374 struct Scsi_Host *shost;
3375 int i;
3376
3377 vports = lpfc_create_vport_work_array(phba);
3378 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3379 shost = lpfc_shost_from_vport(vports[i]);
3380 spin_lock_irq(shost->host_lock);
3381 list_for_each_entry(ndlp, &vports[i]->fc_nodes, nlp_listp) {
3382 if (ndlp->nlp_flag & NLP_RPI_VALID)
3383 lpfc_unreg_rpi(vports[i], ndlp);
3384 }
3385 spin_unlock_irq(shost->host_lock);
3386 }
3387 lpfc_destroy_vport_work_array(phba, vports);
3388}
3389
3221void 3390void
3222lpfc_unreg_all_rpis(struct lpfc_vport *vport) 3391lpfc_unreg_all_rpis(struct lpfc_vport *vport)
3223{ 3392{
@@ -4448,63 +4617,56 @@ lpfc_unregister_fcfi_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
4448} 4617}
4449 4618
4450/** 4619/**
4451 * lpfc_unregister_unused_fcf - Unregister FCF if all devices are disconnected. 4620 * lpfc_unregister_fcf_prep - Unregister fcf record preparation
4452 * @phba: Pointer to hba context object. 4621 * @phba: Pointer to hba context object.
4453 * 4622 *
4454 * This function check if there are any connected remote port for the FCF and 4623 * This function prepare the HBA for unregistering the currently registered
4455 * if all the devices are disconnected, this function unregister FCFI. 4624 * FCF from the HBA. It performs unregistering, in order, RPIs, VPIs, and
4456 * This function also tries to use another FCF for discovery. 4625 * VFIs.
4457 */ 4626 */
4458void 4627int
4459lpfc_unregister_unused_fcf(struct lpfc_hba *phba) 4628lpfc_unregister_fcf_prep(struct lpfc_hba *phba)
4460{ 4629{
4461 LPFC_MBOXQ_t *mbox; 4630 LPFC_MBOXQ_t *mbox;
4462 int rc;
4463 struct lpfc_vport **vports; 4631 struct lpfc_vport **vports;
4464 int i; 4632 struct lpfc_nodelist *ndlp;
4465 4633 struct Scsi_Host *shost;
4466 spin_lock_irq(&phba->hbalock); 4634 int i, rc;
4467 /*
4468 * If HBA is not running in FIP mode or
4469 * If HBA does not support FCoE or
4470 * If FCF is not registered.
4471 * do nothing.
4472 */
4473 if (!(phba->hba_flag & HBA_FCOE_SUPPORT) ||
4474 !(phba->fcf.fcf_flag & FCF_REGISTERED) ||
4475 (!(phba->hba_flag & HBA_FIP_SUPPORT))) {
4476 spin_unlock_irq(&phba->hbalock);
4477 return;
4478 }
4479 spin_unlock_irq(&phba->hbalock);
4480 4635
4636 /* Unregister RPIs */
4481 if (lpfc_fcf_inuse(phba)) 4637 if (lpfc_fcf_inuse(phba))
4482 return; 4638 lpfc_unreg_hba_rpis(phba);
4483 4639
4484 /* At this point, all discovery is aborted */ 4640 /* At this point, all discovery is aborted */
4485 phba->pport->port_state = LPFC_VPORT_UNKNOWN; 4641 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
4486 4642
4487 /* Unregister VPIs */ 4643 /* Unregister VPIs */
4488 vports = lpfc_create_vport_work_array(phba); 4644 vports = lpfc_create_vport_work_array(phba);
4489 if (vports && 4645 if (vports && (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED))
4490 (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED))
4491 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 4646 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
4647 /* Stop FLOGI/FDISC retries */
4648 ndlp = lpfc_findnode_did(vports[i], Fabric_DID);
4649 if (ndlp)
4650 lpfc_cancel_retry_delay_tmo(vports[i], ndlp);
4492 lpfc_mbx_unreg_vpi(vports[i]); 4651 lpfc_mbx_unreg_vpi(vports[i]);
4493 spin_lock_irq(&phba->hbalock); 4652 shost = lpfc_shost_from_vport(vports[i]);
4653 spin_lock_irq(shost->host_lock);
4494 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; 4654 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
4495 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; 4655 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
4496 spin_unlock_irq(&phba->hbalock); 4656 spin_unlock_irq(shost->host_lock);
4497 } 4657 }
4498 lpfc_destroy_vport_work_array(phba, vports); 4658 lpfc_destroy_vport_work_array(phba, vports);
4499 4659
4660 /* Cleanup any outstanding ELS commands */
4661 lpfc_els_flush_all_cmd(phba);
4662
4500 /* Unregister VFI */ 4663 /* Unregister VFI */
4501 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 4664 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4502 if (!mbox) { 4665 if (!mbox) {
4503 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY|LOG_MBOX, 4666 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY|LOG_MBOX,
4504 "2556 UNREG_VFI mbox allocation failed" 4667 "2556 UNREG_VFI mbox allocation failed"
4505 "HBA state x%x\n", 4668 "HBA state x%x\n", phba->pport->port_state);
4506 phba->pport->port_state); 4669 return -ENOMEM;
4507 return;
4508 } 4670 }
4509 4671
4510 lpfc_unreg_vfi(mbox, phba->pport); 4672 lpfc_unreg_vfi(mbox, phba->pport);
@@ -4514,58 +4676,163 @@ lpfc_unregister_unused_fcf(struct lpfc_hba *phba)
4514 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT); 4676 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
4515 if (rc == MBX_NOT_FINISHED) { 4677 if (rc == MBX_NOT_FINISHED) {
4516 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY|LOG_MBOX, 4678 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY|LOG_MBOX,
4517 "2557 UNREG_VFI issue mbox failed rc x%x " 4679 "2557 UNREG_VFI issue mbox failed rc x%x "
4518 "HBA state x%x\n", 4680 "HBA state x%x\n",
4519 rc, phba->pport->port_state); 4681 rc, phba->pport->port_state);
4520 mempool_free(mbox, phba->mbox_mem_pool); 4682 mempool_free(mbox, phba->mbox_mem_pool);
4521 return; 4683 return -EIO;
4522 } 4684 }
4523 4685
4524 /* Unregister FCF */ 4686 shost = lpfc_shost_from_vport(phba->pport);
4687 spin_lock_irq(shost->host_lock);
4688 phba->pport->fc_flag &= ~FC_VFI_REGISTERED;
4689 spin_unlock_irq(shost->host_lock);
4690
4691 return 0;
4692}
4693
4694/**
4695 * lpfc_sli4_unregister_fcf - Unregister currently registered FCF record
4696 * @phba: Pointer to hba context object.
4697 *
4698 * This function issues synchronous unregister FCF mailbox command to HBA to
4699 * unregister the currently registered FCF record. The driver does not reset
4700 * the driver FCF usage state flags.
4701 *
4702 * Return 0 if successfully issued, none-zero otherwise.
4703 */
4704int
4705lpfc_sli4_unregister_fcf(struct lpfc_hba *phba)
4706{
4707 LPFC_MBOXQ_t *mbox;
4708 int rc;
4709
4525 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 4710 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4526 if (!mbox) { 4711 if (!mbox) {
4527 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY|LOG_MBOX, 4712 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY|LOG_MBOX,
4528 "2551 UNREG_FCFI mbox allocation failed" 4713 "2551 UNREG_FCFI mbox allocation failed"
4529 "HBA state x%x\n", 4714 "HBA state x%x\n", phba->pport->port_state);
4530 phba->pport->port_state); 4715 return -ENOMEM;
4531 return;
4532 } 4716 }
4533
4534 lpfc_unreg_fcfi(mbox, phba->fcf.fcfi); 4717 lpfc_unreg_fcfi(mbox, phba->fcf.fcfi);
4535 mbox->vport = phba->pport; 4718 mbox->vport = phba->pport;
4536 mbox->mbox_cmpl = lpfc_unregister_fcfi_cmpl; 4719 mbox->mbox_cmpl = lpfc_unregister_fcfi_cmpl;
4537 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT); 4720 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
4538 4721
4539 if (rc == MBX_NOT_FINISHED) { 4722 if (rc == MBX_NOT_FINISHED) {
4540 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY|LOG_MBOX, 4723 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4541 "2552 UNREG_FCFI issue mbox failed rc x%x " 4724 "2552 Unregister FCFI command failed rc x%x "
4542 "HBA state x%x\n", 4725 "HBA state x%x\n",
4543 rc, phba->pport->port_state); 4726 rc, phba->pport->port_state);
4544 mempool_free(mbox, phba->mbox_mem_pool); 4727 return -EINVAL;
4728 }
4729 return 0;
4730}
4731
4732/**
4733 * lpfc_unregister_fcf_rescan - Unregister currently registered fcf and rescan
4734 * @phba: Pointer to hba context object.
4735 *
4736 * This function unregisters the currently reigstered FCF. This function
4737 * also tries to find another FCF for discovery by rescan the HBA FCF table.
4738 */
4739void
4740lpfc_unregister_fcf_rescan(struct lpfc_hba *phba)
4741{
4742 int rc;
4743
4744 /* Preparation for unregistering fcf */
4745 rc = lpfc_unregister_fcf_prep(phba);
4746 if (rc) {
4747 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
4748 "2748 Failed to prepare for unregistering "
4749 "HBA's FCF record: rc=%d\n", rc);
4545 return; 4750 return;
4546 } 4751 }
4547 4752
4548 spin_lock_irq(&phba->hbalock); 4753 /* Now, unregister FCF record and reset HBA FCF state */
4549 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_REGISTERED | 4754 rc = lpfc_sli4_unregister_fcf(phba);
4550 FCF_DISCOVERED | FCF_BOOT_ENABLE | FCF_IN_USE | 4755 if (rc)
4551 FCF_VALID_VLAN); 4756 return;
4552 spin_unlock_irq(&phba->hbalock); 4757 /* Reset HBA FCF states after successful unregister FCF */
4758 phba->fcf.fcf_flag = 0;
4553 4759
4554 /* 4760 /*
4555 * If driver is not unloading, check if there is any other 4761 * If driver is not unloading, check if there is any other
4556 * FCF record that can be used for discovery. 4762 * FCF record that can be used for discovery.
4557 */ 4763 */
4558 if ((phba->pport->load_flag & FC_UNLOADING) || 4764 if ((phba->pport->load_flag & FC_UNLOADING) ||
4559 (phba->link_state < LPFC_LINK_UP)) 4765 (phba->link_state < LPFC_LINK_UP))
4560 return; 4766 return;
4561 4767
4562 rc = lpfc_sli4_read_fcf_record(phba, LPFC_FCOE_FCF_GET_FIRST); 4768 rc = lpfc_sli4_read_fcf_record(phba, LPFC_FCOE_FCF_GET_FIRST);
4563 4769
4564 if (rc) 4770 if (rc)
4565 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY|LOG_MBOX, 4771 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY|LOG_MBOX,
4566 "2553 lpfc_unregister_unused_fcf failed to read FCF" 4772 "2553 lpfc_unregister_unused_fcf failed "
4567 " record HBA state x%x\n", 4773 "to read FCF record HBA state x%x\n",
4568 phba->pport->port_state); 4774 phba->pport->port_state);
4775}
4776
4777/**
4778 * lpfc_unregister_fcf - Unregister the currently registered fcf record
4779 * @phba: Pointer to hba context object.
4780 *
4781 * This function just unregisters the currently reigstered FCF. It does not
4782 * try to find another FCF for discovery.
4783 */
4784void
4785lpfc_unregister_fcf(struct lpfc_hba *phba)
4786{
4787 int rc;
4788
4789 /* Preparation for unregistering fcf */
4790 rc = lpfc_unregister_fcf_prep(phba);
4791 if (rc) {
4792 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
4793 "2749 Failed to prepare for unregistering "
4794 "HBA's FCF record: rc=%d\n", rc);
4795 return;
4796 }
4797
4798 /* Now, unregister FCF record and reset HBA FCF state */
4799 rc = lpfc_sli4_unregister_fcf(phba);
4800 if (rc)
4801 return;
4802 /* Set proper HBA FCF states after successful unregister FCF */
4803 spin_lock_irq(&phba->hbalock);
4804 phba->fcf.fcf_flag &= ~FCF_REGISTERED;
4805 spin_unlock_irq(&phba->hbalock);
4806}
4807
4808/**
4809 * lpfc_unregister_unused_fcf - Unregister FCF if all devices are disconnected.
4810 * @phba: Pointer to hba context object.
4811 *
4812 * This function check if there are any connected remote port for the FCF and
4813 * if all the devices are disconnected, this function unregister FCFI.
4814 * This function also tries to use another FCF for discovery.
4815 */
4816void
4817lpfc_unregister_unused_fcf(struct lpfc_hba *phba)
4818{
4819 /*
4820 * If HBA is not running in FIP mode or if HBA does not support
4821 * FCoE or if FCF is not registered, do nothing.
4822 */
4823 spin_lock_irq(&phba->hbalock);
4824 if (!(phba->hba_flag & HBA_FCOE_SUPPORT) ||
4825 !(phba->fcf.fcf_flag & FCF_REGISTERED) ||
4826 !(phba->hba_flag & HBA_FIP_SUPPORT)) {
4827 spin_unlock_irq(&phba->hbalock);
4828 return;
4829 }
4830 spin_unlock_irq(&phba->hbalock);
4831
4832 if (lpfc_fcf_inuse(phba))
4833 return;
4834
4835 lpfc_unregister_fcf_rescan(phba);
4569} 4836}
4570 4837
4571/** 4838/**
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h
index c9faa1d8c3c8..89ff7c09e298 100644
--- a/drivers/scsi/lpfc/lpfc_hw.h
+++ b/drivers/scsi/lpfc/lpfc_hw.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2009 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2010 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -1346,6 +1346,9 @@ typedef struct { /* FireFly BIU registers */
1346#define MBX_HEARTBEAT 0x31 1346#define MBX_HEARTBEAT 0x31
1347#define MBX_WRITE_VPARMS 0x32 1347#define MBX_WRITE_VPARMS 0x32
1348#define MBX_ASYNCEVT_ENABLE 0x33 1348#define MBX_ASYNCEVT_ENABLE 0x33
1349#define MBX_READ_EVENT_LOG_STATUS 0x37
1350#define MBX_READ_EVENT_LOG 0x38
1351#define MBX_WRITE_EVENT_LOG 0x39
1349 1352
1350#define MBX_PORT_CAPABILITIES 0x3B 1353#define MBX_PORT_CAPABILITIES 0x3B
1351#define MBX_PORT_IOV_CONTROL 0x3C 1354#define MBX_PORT_IOV_CONTROL 0x3C
@@ -1465,17 +1468,13 @@ typedef struct { /* FireFly BIU registers */
1465#define CMD_IOCB_LOGENTRY_CN 0x94 1468#define CMD_IOCB_LOGENTRY_CN 0x94
1466#define CMD_IOCB_LOGENTRY_ASYNC_CN 0x96 1469#define CMD_IOCB_LOGENTRY_ASYNC_CN 0x96
1467 1470
1468/* Unhandled Data Security SLI Commands */ 1471/* Data Security SLI Commands */
1469#define DSSCMD_IWRITE64_CR 0xD8 1472#define DSSCMD_IWRITE64_CR 0xF8
1470#define DSSCMD_IWRITE64_CX 0xD9 1473#define DSSCMD_IWRITE64_CX 0xF9
1471#define DSSCMD_IREAD64_CR 0xDA 1474#define DSSCMD_IREAD64_CR 0xFA
1472#define DSSCMD_IREAD64_CX 0xDB 1475#define DSSCMD_IREAD64_CX 0xFB
1473#define DSSCMD_INVALIDATE_DEK 0xDC 1476
1474#define DSSCMD_SET_KEK 0xDD 1477#define CMD_MAX_IOCB_CMD 0xFB
1475#define DSSCMD_GET_KEK_ID 0xDE
1476#define DSSCMD_GEN_XFER 0xDF
1477
1478#define CMD_MAX_IOCB_CMD 0xE6
1479#define CMD_IOCB_MASK 0xff 1478#define CMD_IOCB_MASK 0xff
1480 1479
1481#define MAX_MSG_DATA 28 /* max msg data in CMD_ADAPTER_MSG 1480#define MAX_MSG_DATA 28 /* max msg data in CMD_ADAPTER_MSG
diff --git a/drivers/scsi/lpfc/lpfc_hw4.h b/drivers/scsi/lpfc/lpfc_hw4.h
index 8a2a1c5935c6..820015fbc4d6 100644
--- a/drivers/scsi/lpfc/lpfc_hw4.h
+++ b/drivers/scsi/lpfc/lpfc_hw4.h
@@ -52,35 +52,37 @@ struct dma_address {
52 uint32_t addr_hi; 52 uint32_t addr_hi;
53}; 53};
54 54
55#define LPFC_SLIREV_CONF_WORD 0x58
56struct lpfc_sli_intf { 55struct lpfc_sli_intf {
57 uint32_t word0; 56 uint32_t word0;
58#define lpfc_sli_intf_iftype_MASK 0x00000007 57#define lpfc_sli_intf_valid_SHIFT 29
59#define lpfc_sli_intf_iftype_SHIFT 0 58#define lpfc_sli_intf_valid_MASK 0x00000007
60#define lpfc_sli_intf_iftype_WORD word0 59#define lpfc_sli_intf_valid_WORD word0
61#define lpfc_sli_intf_rev_MASK 0x0000000f
62#define lpfc_sli_intf_rev_SHIFT 4
63#define lpfc_sli_intf_rev_WORD word0
64#define LPFC_SLIREV_CONF_SLI4 4
65#define lpfc_sli_intf_family_MASK 0x000000ff
66#define lpfc_sli_intf_family_SHIFT 8
67#define lpfc_sli_intf_family_WORD word0
68#define lpfc_sli_intf_feat1_MASK 0x000000ff
69#define lpfc_sli_intf_feat1_SHIFT 16
70#define lpfc_sli_intf_feat1_WORD word0
71#define lpfc_sli_intf_feat2_MASK 0x0000001f
72#define lpfc_sli_intf_feat2_SHIFT 24
73#define lpfc_sli_intf_feat2_WORD word0
74#define lpfc_sli_intf_valid_MASK 0x00000007
75#define lpfc_sli_intf_valid_SHIFT 29
76#define lpfc_sli_intf_valid_WORD word0
77#define LPFC_SLI_INTF_VALID 6 60#define LPFC_SLI_INTF_VALID 6
61#define lpfc_sli_intf_featurelevel2_SHIFT 24
62#define lpfc_sli_intf_featurelevel2_MASK 0x0000001F
63#define lpfc_sli_intf_featurelevel2_WORD word0
64#define lpfc_sli_intf_featurelevel1_SHIFT 16
65#define lpfc_sli_intf_featurelevel1_MASK 0x000000FF
66#define lpfc_sli_intf_featurelevel1_WORD word0
67#define LPFC_SLI_INTF_FEATURELEVEL1_1 1
68#define LPFC_SLI_INTF_FEATURELEVEL1_2 2
69#define lpfc_sli_intf_sli_family_SHIFT 8
70#define lpfc_sli_intf_sli_family_MASK 0x000000FF
71#define lpfc_sli_intf_sli_family_WORD word0
72#define LPFC_SLI_INTF_FAMILY_BE2 0
73#define LPFC_SLI_INTF_FAMILY_BE3 1
74#define lpfc_sli_intf_slirev_SHIFT 4
75#define lpfc_sli_intf_slirev_MASK 0x0000000F
76#define lpfc_sli_intf_slirev_WORD word0
77#define LPFC_SLI_INTF_REV_SLI3 3
78#define LPFC_SLI_INTF_REV_SLI4 4
79#define lpfc_sli_intf_if_type_SHIFT 0
80#define lpfc_sli_intf_if_type_MASK 0x00000007
81#define lpfc_sli_intf_if_type_WORD word0
82#define LPFC_SLI_INTF_IF_TYPE_0 0
83#define LPFC_SLI_INTF_IF_TYPE_1 1
78}; 84};
79 85
80#define LPFC_SLI4_BAR0 1
81#define LPFC_SLI4_BAR1 2
82#define LPFC_SLI4_BAR2 4
83
84#define LPFC_SLI4_MBX_EMBED true 86#define LPFC_SLI4_MBX_EMBED true
85#define LPFC_SLI4_MBX_NEMBED false 87#define LPFC_SLI4_MBX_NEMBED false
86 88
@@ -161,6 +163,9 @@ struct lpfc_sli_intf {
161#define LPFC_FP_DEF_IMAX 10000 163#define LPFC_FP_DEF_IMAX 10000
162#define LPFC_SP_DEF_IMAX 10000 164#define LPFC_SP_DEF_IMAX 10000
163 165
166/* PORT_CAPABILITIES constants. */
167#define LPFC_MAX_SUPPORTED_PAGES 8
168
164struct ulp_bde64 { 169struct ulp_bde64 {
165 union ULP_BDE_TUS { 170 union ULP_BDE_TUS {
166 uint32_t w; 171 uint32_t w;
@@ -516,7 +521,7 @@ struct lpfc_register {
516#define LPFC_UERR_STATUS_LO 0x00A0 521#define LPFC_UERR_STATUS_LO 0x00A0
517#define LPFC_UE_MASK_HI 0x00AC 522#define LPFC_UE_MASK_HI 0x00AC
518#define LPFC_UE_MASK_LO 0x00A8 523#define LPFC_UE_MASK_LO 0x00A8
519#define LPFC_SCRATCHPAD 0x0058 524#define LPFC_SLI_INTF 0x0058
520 525
521/* BAR0 Registers */ 526/* BAR0 Registers */
522#define LPFC_HST_STATE 0x00AC 527#define LPFC_HST_STATE 0x00AC
@@ -576,19 +581,6 @@ struct lpfc_register {
576#define LPFC_POST_STAGE_ARMFW_READY 0xC000 581#define LPFC_POST_STAGE_ARMFW_READY 0xC000
577#define LPFC_POST_STAGE_ARMFW_UE 0xF000 582#define LPFC_POST_STAGE_ARMFW_UE 0xF000
578 583
579#define lpfc_scratchpad_slirev_SHIFT 4
580#define lpfc_scratchpad_slirev_MASK 0xF
581#define lpfc_scratchpad_slirev_WORD word0
582#define lpfc_scratchpad_chiptype_SHIFT 8
583#define lpfc_scratchpad_chiptype_MASK 0xFF
584#define lpfc_scratchpad_chiptype_WORD word0
585#define lpfc_scratchpad_featurelevel1_SHIFT 16
586#define lpfc_scratchpad_featurelevel1_MASK 0xFF
587#define lpfc_scratchpad_featurelevel1_WORD word0
588#define lpfc_scratchpad_featurelevel2_SHIFT 24
589#define lpfc_scratchpad_featurelevel2_MASK 0xFF
590#define lpfc_scratchpad_featurelevel2_WORD word0
591
592/* BAR1 Registers */ 584/* BAR1 Registers */
593#define LPFC_IMR_MASK_ALL 0xFFFFFFFF 585#define LPFC_IMR_MASK_ALL 0xFFFFFFFF
594#define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF 586#define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF
@@ -801,6 +793,7 @@ struct mbox_header {
801#define LPFC_MBOX_OPCODE_FCOE_ADD_FCF 0x09 793#define LPFC_MBOX_OPCODE_FCOE_ADD_FCF 0x09
802#define LPFC_MBOX_OPCODE_FCOE_DELETE_FCF 0x0A 794#define LPFC_MBOX_OPCODE_FCOE_DELETE_FCF 0x0A
803#define LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE 0x0B 795#define LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE 0x0B
796#define LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF 0x10
804 797
805/* Mailbox command structures */ 798/* Mailbox command structures */
806struct eq_context { 799struct eq_context {
@@ -1149,10 +1142,7 @@ struct sli4_sge { /* SLI-4 */
1149 this flag !! */ 1142 this flag !! */
1150#define lpfc_sli4_sge_last_MASK 0x00000001 1143#define lpfc_sli4_sge_last_MASK 0x00000001
1151#define lpfc_sli4_sge_last_WORD word2 1144#define lpfc_sli4_sge_last_WORD word2
1152 uint32_t word3; 1145 uint32_t sge_len;
1153#define lpfc_sli4_sge_len_SHIFT 0
1154#define lpfc_sli4_sge_len_MASK 0x0001FFFF
1155#define lpfc_sli4_sge_len_WORD word3
1156}; 1146};
1157 1147
1158struct fcf_record { 1148struct fcf_record {
@@ -1301,6 +1291,19 @@ struct lpfc_mbx_del_fcf_tbl_entry {
1301#define lpfc_mbx_del_fcf_tbl_index_WORD word10 1291#define lpfc_mbx_del_fcf_tbl_index_WORD word10
1302}; 1292};
1303 1293
1294struct lpfc_mbx_redisc_fcf_tbl {
1295 struct mbox_header header;
1296 uint32_t word10;
1297#define lpfc_mbx_redisc_fcf_count_SHIFT 0
1298#define lpfc_mbx_redisc_fcf_count_MASK 0x0000FFFF
1299#define lpfc_mbx_redisc_fcf_count_WORD word10
1300 uint32_t resvd;
1301 uint32_t word12;
1302#define lpfc_mbx_redisc_fcf_index_SHIFT 0
1303#define lpfc_mbx_redisc_fcf_index_MASK 0x0000FFFF
1304#define lpfc_mbx_redisc_fcf_index_WORD word12
1305};
1306
1304struct lpfc_mbx_query_fw_cfg { 1307struct lpfc_mbx_query_fw_cfg {
1305 struct mbox_header header; 1308 struct mbox_header header;
1306 uint32_t config_number; 1309 uint32_t config_number;
@@ -1834,6 +1837,177 @@ struct lpfc_mbx_request_features {
1834#define lpfc_mbx_rq_ftr_rsp_ifip_WORD word3 1837#define lpfc_mbx_rq_ftr_rsp_ifip_WORD word3
1835}; 1838};
1836 1839
1840struct lpfc_mbx_supp_pages {
1841 uint32_t word1;
1842#define qs_SHIFT 0
1843#define qs_MASK 0x00000001
1844#define qs_WORD word1
1845#define wr_SHIFT 1
1846#define wr_MASK 0x00000001
1847#define wr_WORD word1
1848#define pf_SHIFT 8
1849#define pf_MASK 0x000000ff
1850#define pf_WORD word1
1851#define cpn_SHIFT 16
1852#define cpn_MASK 0x000000ff
1853#define cpn_WORD word1
1854 uint32_t word2;
1855#define list_offset_SHIFT 0
1856#define list_offset_MASK 0x000000ff
1857#define list_offset_WORD word2
1858#define next_offset_SHIFT 8
1859#define next_offset_MASK 0x000000ff
1860#define next_offset_WORD word2
1861#define elem_cnt_SHIFT 16
1862#define elem_cnt_MASK 0x000000ff
1863#define elem_cnt_WORD word2
1864 uint32_t word3;
1865#define pn_0_SHIFT 24
1866#define pn_0_MASK 0x000000ff
1867#define pn_0_WORD word3
1868#define pn_1_SHIFT 16
1869#define pn_1_MASK 0x000000ff
1870#define pn_1_WORD word3
1871#define pn_2_SHIFT 8
1872#define pn_2_MASK 0x000000ff
1873#define pn_2_WORD word3
1874#define pn_3_SHIFT 0
1875#define pn_3_MASK 0x000000ff
1876#define pn_3_WORD word3
1877 uint32_t word4;
1878#define pn_4_SHIFT 24
1879#define pn_4_MASK 0x000000ff
1880#define pn_4_WORD word4
1881#define pn_5_SHIFT 16
1882#define pn_5_MASK 0x000000ff
1883#define pn_5_WORD word4
1884#define pn_6_SHIFT 8
1885#define pn_6_MASK 0x000000ff
1886#define pn_6_WORD word4
1887#define pn_7_SHIFT 0
1888#define pn_7_MASK 0x000000ff
1889#define pn_7_WORD word4
1890 uint32_t rsvd[27];
1891#define LPFC_SUPP_PAGES 0
1892#define LPFC_BLOCK_GUARD_PROFILES 1
1893#define LPFC_SLI4_PARAMETERS 2
1894};
1895
1896struct lpfc_mbx_sli4_params {
1897 uint32_t word1;
1898#define qs_SHIFT 0
1899#define qs_MASK 0x00000001
1900#define qs_WORD word1
1901#define wr_SHIFT 1
1902#define wr_MASK 0x00000001
1903#define wr_WORD word1
1904#define pf_SHIFT 8
1905#define pf_MASK 0x000000ff
1906#define pf_WORD word1
1907#define cpn_SHIFT 16
1908#define cpn_MASK 0x000000ff
1909#define cpn_WORD word1
1910 uint32_t word2;
1911#define if_type_SHIFT 0
1912#define if_type_MASK 0x00000007
1913#define if_type_WORD word2
1914#define sli_rev_SHIFT 4
1915#define sli_rev_MASK 0x0000000f
1916#define sli_rev_WORD word2
1917#define sli_family_SHIFT 8
1918#define sli_family_MASK 0x000000ff
1919#define sli_family_WORD word2
1920#define featurelevel_1_SHIFT 16
1921#define featurelevel_1_MASK 0x000000ff
1922#define featurelevel_1_WORD word2
1923#define featurelevel_2_SHIFT 24
1924#define featurelevel_2_MASK 0x0000001f
1925#define featurelevel_2_WORD word2
1926 uint32_t word3;
1927#define fcoe_SHIFT 0
1928#define fcoe_MASK 0x00000001
1929#define fcoe_WORD word3
1930#define fc_SHIFT 1
1931#define fc_MASK 0x00000001
1932#define fc_WORD word3
1933#define nic_SHIFT 2
1934#define nic_MASK 0x00000001
1935#define nic_WORD word3
1936#define iscsi_SHIFT 3
1937#define iscsi_MASK 0x00000001
1938#define iscsi_WORD word3
1939#define rdma_SHIFT 4
1940#define rdma_MASK 0x00000001
1941#define rdma_WORD word3
1942 uint32_t sge_supp_len;
1943 uint32_t word5;
1944#define if_page_sz_SHIFT 0
1945#define if_page_sz_MASK 0x0000ffff
1946#define if_page_sz_WORD word5
1947#define loopbk_scope_SHIFT 24
1948#define loopbk_scope_MASK 0x0000000f
1949#define loopbk_scope_WORD word5
1950#define rq_db_window_SHIFT 28
1951#define rq_db_window_MASK 0x0000000f
1952#define rq_db_window_WORD word5
1953 uint32_t word6;
1954#define eq_pages_SHIFT 0
1955#define eq_pages_MASK 0x0000000f
1956#define eq_pages_WORD word6
1957#define eqe_size_SHIFT 8
1958#define eqe_size_MASK 0x000000ff
1959#define eqe_size_WORD word6
1960 uint32_t word7;
1961#define cq_pages_SHIFT 0
1962#define cq_pages_MASK 0x0000000f
1963#define cq_pages_WORD word7
1964#define cqe_size_SHIFT 8
1965#define cqe_size_MASK 0x000000ff
1966#define cqe_size_WORD word7
1967 uint32_t word8;
1968#define mq_pages_SHIFT 0
1969#define mq_pages_MASK 0x0000000f
1970#define mq_pages_WORD word8
1971#define mqe_size_SHIFT 8
1972#define mqe_size_MASK 0x000000ff
1973#define mqe_size_WORD word8
1974#define mq_elem_cnt_SHIFT 16
1975#define mq_elem_cnt_MASK 0x000000ff
1976#define mq_elem_cnt_WORD word8
1977 uint32_t word9;
1978#define wq_pages_SHIFT 0
1979#define wq_pages_MASK 0x0000ffff
1980#define wq_pages_WORD word9
1981#define wqe_size_SHIFT 8
1982#define wqe_size_MASK 0x000000ff
1983#define wqe_size_WORD word9
1984 uint32_t word10;
1985#define rq_pages_SHIFT 0
1986#define rq_pages_MASK 0x0000ffff
1987#define rq_pages_WORD word10
1988#define rqe_size_SHIFT 8
1989#define rqe_size_MASK 0x000000ff
1990#define rqe_size_WORD word10
1991 uint32_t word11;
1992#define hdr_pages_SHIFT 0
1993#define hdr_pages_MASK 0x0000000f
1994#define hdr_pages_WORD word11
1995#define hdr_size_SHIFT 8
1996#define hdr_size_MASK 0x0000000f
1997#define hdr_size_WORD word11
1998#define hdr_pp_align_SHIFT 16
1999#define hdr_pp_align_MASK 0x0000ffff
2000#define hdr_pp_align_WORD word11
2001 uint32_t word12;
2002#define sgl_pages_SHIFT 0
2003#define sgl_pages_MASK 0x0000000f
2004#define sgl_pages_WORD word12
2005#define sgl_pp_align_SHIFT 16
2006#define sgl_pp_align_MASK 0x0000ffff
2007#define sgl_pp_align_WORD word12
2008 uint32_t rsvd_13_63[51];
2009};
2010
1837/* Mailbox Completion Queue Error Messages */ 2011/* Mailbox Completion Queue Error Messages */
1838#define MB_CQE_STATUS_SUCCESS 0x0 2012#define MB_CQE_STATUS_SUCCESS 0x0
1839#define MB_CQE_STATUS_INSUFFICIENT_PRIVILEGES 0x1 2013#define MB_CQE_STATUS_INSUFFICIENT_PRIVILEGES 0x1
@@ -1863,6 +2037,7 @@ struct lpfc_mqe {
1863 struct lpfc_mbx_read_fcf_tbl read_fcf_tbl; 2037 struct lpfc_mbx_read_fcf_tbl read_fcf_tbl;
1864 struct lpfc_mbx_add_fcf_tbl_entry add_fcf_entry; 2038 struct lpfc_mbx_add_fcf_tbl_entry add_fcf_entry;
1865 struct lpfc_mbx_del_fcf_tbl_entry del_fcf_entry; 2039 struct lpfc_mbx_del_fcf_tbl_entry del_fcf_entry;
2040 struct lpfc_mbx_redisc_fcf_tbl redisc_fcf_tbl;
1866 struct lpfc_mbx_reg_fcfi reg_fcfi; 2041 struct lpfc_mbx_reg_fcfi reg_fcfi;
1867 struct lpfc_mbx_unreg_fcfi unreg_fcfi; 2042 struct lpfc_mbx_unreg_fcfi unreg_fcfi;
1868 struct lpfc_mbx_mq_create mq_create; 2043 struct lpfc_mbx_mq_create mq_create;
@@ -1883,6 +2058,8 @@ struct lpfc_mqe {
1883 struct lpfc_mbx_request_features req_ftrs; 2058 struct lpfc_mbx_request_features req_ftrs;
1884 struct lpfc_mbx_post_hdr_tmpl hdr_tmpl; 2059 struct lpfc_mbx_post_hdr_tmpl hdr_tmpl;
1885 struct lpfc_mbx_query_fw_cfg query_fw_cfg; 2060 struct lpfc_mbx_query_fw_cfg query_fw_cfg;
2061 struct lpfc_mbx_supp_pages supp_pages;
2062 struct lpfc_mbx_sli4_params sli4_params;
1886 struct lpfc_mbx_nop nop; 2063 struct lpfc_mbx_nop nop;
1887 } un; 2064 } un;
1888}; 2065};
@@ -1959,6 +2136,9 @@ struct lpfc_acqe_link {
1959#define LPFC_ASYNC_LINK_FAULT_NONE 0x0 2136#define LPFC_ASYNC_LINK_FAULT_NONE 0x0
1960#define LPFC_ASYNC_LINK_FAULT_LOCAL 0x1 2137#define LPFC_ASYNC_LINK_FAULT_LOCAL 0x1
1961#define LPFC_ASYNC_LINK_FAULT_REMOTE 0x2 2138#define LPFC_ASYNC_LINK_FAULT_REMOTE 0x2
2139#define lpfc_acqe_qos_link_speed_SHIFT 16
2140#define lpfc_acqe_qos_link_speed_MASK 0x0000FFFF
2141#define lpfc_acqe_qos_link_speed_WORD word1
1962 uint32_t event_tag; 2142 uint32_t event_tag;
1963 uint32_t trailer; 2143 uint32_t trailer;
1964}; 2144};
@@ -1976,6 +2156,7 @@ struct lpfc_acqe_fcoe {
1976#define LPFC_FCOE_EVENT_TYPE_FCF_TABLE_FULL 0x2 2156#define LPFC_FCOE_EVENT_TYPE_FCF_TABLE_FULL 0x2
1977#define LPFC_FCOE_EVENT_TYPE_FCF_DEAD 0x3 2157#define LPFC_FCOE_EVENT_TYPE_FCF_DEAD 0x3
1978#define LPFC_FCOE_EVENT_TYPE_CVL 0x4 2158#define LPFC_FCOE_EVENT_TYPE_CVL 0x4
2159#define LPFC_FCOE_EVENT_TYPE_FCF_PARAM_MOD 0x5
1979 uint32_t event_tag; 2160 uint32_t event_tag;
1980 uint32_t trailer; 2161 uint32_t trailer;
1981}; 2162};
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index b8eb1b6e5e77..d29ac7c317d9 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2009 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2010 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
@@ -544,7 +544,7 @@ lpfc_config_port_post(struct lpfc_hba *phba)
544 mempool_free(pmb, phba->mbox_mem_pool); 544 mempool_free(pmb, phba->mbox_mem_pool);
545 return -EIO; 545 return -EIO;
546 } 546 }
547 } else { 547 } else if (phba->cfg_suppress_link_up == 0) {
548 lpfc_init_link(phba, pmb, phba->cfg_topology, 548 lpfc_init_link(phba, pmb, phba->cfg_topology,
549 phba->cfg_link_speed); 549 phba->cfg_link_speed);
550 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 550 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
@@ -603,6 +603,102 @@ lpfc_config_port_post(struct lpfc_hba *phba)
603} 603}
604 604
605/** 605/**
606 * lpfc_hba_init_link - Initialize the FC link
607 * @phba: pointer to lpfc hba data structure.
608 *
609 * This routine will issue the INIT_LINK mailbox command call.
610 * It is available to other drivers through the lpfc_hba data
611 * structure for use as a delayed link up mechanism with the
612 * module parameter lpfc_suppress_link_up.
613 *
614 * Return code
615 * 0 - success
616 * Any other value - error
617 **/
618int
619lpfc_hba_init_link(struct lpfc_hba *phba)
620{
621 struct lpfc_vport *vport = phba->pport;
622 LPFC_MBOXQ_t *pmb;
623 MAILBOX_t *mb;
624 int rc;
625
626 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
627 if (!pmb) {
628 phba->link_state = LPFC_HBA_ERROR;
629 return -ENOMEM;
630 }
631 mb = &pmb->u.mb;
632 pmb->vport = vport;
633
634 lpfc_init_link(phba, pmb, phba->cfg_topology,
635 phba->cfg_link_speed);
636 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
637 lpfc_set_loopback_flag(phba);
638 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
639 if (rc != MBX_SUCCESS) {
640 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
641 "0498 Adapter failed to init, mbxCmd x%x "
642 "INIT_LINK, mbxStatus x%x\n",
643 mb->mbxCommand, mb->mbxStatus);
644 /* Clear all interrupt enable conditions */
645 writel(0, phba->HCregaddr);
646 readl(phba->HCregaddr); /* flush */
647 /* Clear all pending interrupts */
648 writel(0xffffffff, phba->HAregaddr);
649 readl(phba->HAregaddr); /* flush */
650 phba->link_state = LPFC_HBA_ERROR;
651 if (rc != MBX_BUSY)
652 mempool_free(pmb, phba->mbox_mem_pool);
653 return -EIO;
654 }
655 phba->cfg_suppress_link_up = 0;
656
657 return 0;
658}
659
660/**
661 * lpfc_hba_down_link - this routine downs the FC link
662 *
663 * This routine will issue the DOWN_LINK mailbox command call.
664 * It is available to other drivers through the lpfc_hba data
665 * structure for use to stop the link.
666 *
667 * Return code
668 * 0 - success
669 * Any other value - error
670 **/
671int
672lpfc_hba_down_link(struct lpfc_hba *phba)
673{
674 LPFC_MBOXQ_t *pmb;
675 int rc;
676
677 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
678 if (!pmb) {
679 phba->link_state = LPFC_HBA_ERROR;
680 return -ENOMEM;
681 }
682
683 lpfc_printf_log(phba,
684 KERN_ERR, LOG_INIT,
685 "0491 Adapter Link is disabled.\n");
686 lpfc_down_link(phba, pmb);
687 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
688 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
689 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
690 lpfc_printf_log(phba,
691 KERN_ERR, LOG_INIT,
692 "2522 Adapter failed to issue DOWN_LINK"
693 " mbox command rc 0x%x\n", rc);
694
695 mempool_free(pmb, phba->mbox_mem_pool);
696 return -EIO;
697 }
698 return 0;
699}
700
701/**
606 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset 702 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
607 * @phba: pointer to lpfc HBA data structure. 703 * @phba: pointer to lpfc HBA data structure.
608 * 704 *
@@ -2073,6 +2169,44 @@ lpfc_stop_vport_timers(struct lpfc_vport *vport)
2073} 2169}
2074 2170
2075/** 2171/**
2172 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2173 * @phba: pointer to lpfc hba data structure.
2174 *
2175 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2176 * caller of this routine should already hold the host lock.
2177 **/
2178void
2179__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2180{
2181 /* Clear pending FCF rediscovery wait timer */
2182 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2183 /* Now, try to stop the timer */
2184 del_timer(&phba->fcf.redisc_wait);
2185}
2186
2187/**
2188 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2189 * @phba: pointer to lpfc hba data structure.
2190 *
2191 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2192 * checks whether the FCF rediscovery wait timer is pending with the host
2193 * lock held before proceeding with disabling the timer and clearing the
2194 * wait timer pendig flag.
2195 **/
2196void
2197lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2198{
2199 spin_lock_irq(&phba->hbalock);
2200 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2201 /* FCF rediscovery timer already fired or stopped */
2202 spin_unlock_irq(&phba->hbalock);
2203 return;
2204 }
2205 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
2206 spin_unlock_irq(&phba->hbalock);
2207}
2208
2209/**
2076 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA 2210 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
2077 * @phba: pointer to lpfc hba data structure. 2211 * @phba: pointer to lpfc hba data structure.
2078 * 2212 *
@@ -2096,6 +2230,7 @@ lpfc_stop_hba_timers(struct lpfc_hba *phba)
2096 break; 2230 break;
2097 case LPFC_PCI_DEV_OC: 2231 case LPFC_PCI_DEV_OC:
2098 /* Stop any OneConnect device sepcific driver timers */ 2232 /* Stop any OneConnect device sepcific driver timers */
2233 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
2099 break; 2234 break;
2100 default: 2235 default:
2101 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 2236 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
@@ -2228,6 +2363,7 @@ lpfc_offline_prep(struct lpfc_hba * phba)
2228 struct lpfc_vport *vport = phba->pport; 2363 struct lpfc_vport *vport = phba->pport;
2229 struct lpfc_nodelist *ndlp, *next_ndlp; 2364 struct lpfc_nodelist *ndlp, *next_ndlp;
2230 struct lpfc_vport **vports; 2365 struct lpfc_vport **vports;
2366 struct Scsi_Host *shost;
2231 int i; 2367 int i;
2232 2368
2233 if (vport->fc_flag & FC_OFFLINE_MODE) 2369 if (vport->fc_flag & FC_OFFLINE_MODE)
@@ -2241,11 +2377,15 @@ lpfc_offline_prep(struct lpfc_hba * phba)
2241 vports = lpfc_create_vport_work_array(phba); 2377 vports = lpfc_create_vport_work_array(phba);
2242 if (vports != NULL) { 2378 if (vports != NULL) {
2243 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 2379 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
2244 struct Scsi_Host *shost;
2245
2246 if (vports[i]->load_flag & FC_UNLOADING) 2380 if (vports[i]->load_flag & FC_UNLOADING)
2247 continue; 2381 continue;
2382 shost = lpfc_shost_from_vport(vports[i]);
2383 spin_lock_irq(shost->host_lock);
2248 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; 2384 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
2385 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
2386 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
2387 spin_unlock_irq(shost->host_lock);
2388
2249 shost = lpfc_shost_from_vport(vports[i]); 2389 shost = lpfc_shost_from_vport(vports[i]);
2250 list_for_each_entry_safe(ndlp, next_ndlp, 2390 list_for_each_entry_safe(ndlp, next_ndlp,
2251 &vports[i]->fc_nodes, 2391 &vports[i]->fc_nodes,
@@ -2401,7 +2541,8 @@ lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
2401 shost->this_id = -1; 2541 shost->this_id = -1;
2402 shost->max_cmd_len = 16; 2542 shost->max_cmd_len = 16;
2403 if (phba->sli_rev == LPFC_SLI_REV4) { 2543 if (phba->sli_rev == LPFC_SLI_REV4) {
2404 shost->dma_boundary = LPFC_SLI4_MAX_SEGMENT_SIZE; 2544 shost->dma_boundary =
2545 phba->sli4_hba.pc_sli4_params.sge_supp_len;
2405 shost->sg_tablesize = phba->cfg_sg_seg_cnt; 2546 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
2406 } 2547 }
2407 2548
@@ -2650,8 +2791,6 @@ lpfc_stop_port_s4(struct lpfc_hba *phba)
2650 lpfc_stop_hba_timers(phba); 2791 lpfc_stop_hba_timers(phba);
2651 phba->pport->work_port_events = 0; 2792 phba->pport->work_port_events = 0;
2652 phba->sli4_hba.intr_enable = 0; 2793 phba->sli4_hba.intr_enable = 0;
2653 /* Hard clear it for now, shall have more graceful way to wait later */
2654 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2655} 2794}
2656 2795
2657/** 2796/**
@@ -2703,7 +2842,7 @@ lpfc_sli_remove_dflt_fcf(struct lpfc_hba *phba)
2703 del_fcf_record = &mboxq->u.mqe.un.del_fcf_entry; 2842 del_fcf_record = &mboxq->u.mqe.un.del_fcf_entry;
2704 bf_set(lpfc_mbx_del_fcf_tbl_count, del_fcf_record, 1); 2843 bf_set(lpfc_mbx_del_fcf_tbl_count, del_fcf_record, 1);
2705 bf_set(lpfc_mbx_del_fcf_tbl_index, del_fcf_record, 2844 bf_set(lpfc_mbx_del_fcf_tbl_index, del_fcf_record,
2706 phba->fcf.fcf_indx); 2845 phba->fcf.current_rec.fcf_indx);
2707 2846
2708 if (!phba->sli4_hba.intr_enable) 2847 if (!phba->sli4_hba.intr_enable)
2709 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 2848 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
@@ -2727,6 +2866,57 @@ lpfc_sli_remove_dflt_fcf(struct lpfc_hba *phba)
2727} 2866}
2728 2867
2729/** 2868/**
2869 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
2870 * @phba: Pointer to hba for which this call is being executed.
2871 *
2872 * This routine starts the timer waiting for the FCF rediscovery to complete.
2873 **/
2874void
2875lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
2876{
2877 unsigned long fcf_redisc_wait_tmo =
2878 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
2879 /* Start fcf rediscovery wait period timer */
2880 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
2881 spin_lock_irq(&phba->hbalock);
2882 /* Allow action to new fcf asynchronous event */
2883 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
2884 /* Mark the FCF rediscovery pending state */
2885 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
2886 spin_unlock_irq(&phba->hbalock);
2887}
2888
2889/**
2890 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
2891 * @ptr: Map to lpfc_hba data structure pointer.
2892 *
2893 * This routine is invoked when waiting for FCF table rediscover has been
2894 * timed out. If new FCF record(s) has (have) been discovered during the
2895 * wait period, a new FCF event shall be added to the FCOE async event
2896 * list, and then worker thread shall be waked up for processing from the
2897 * worker thread context.
2898 **/
2899void
2900lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
2901{
2902 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
2903
2904 /* Don't send FCF rediscovery event if timer cancelled */
2905 spin_lock_irq(&phba->hbalock);
2906 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2907 spin_unlock_irq(&phba->hbalock);
2908 return;
2909 }
2910 /* Clear FCF rediscovery timer pending flag */
2911 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2912 /* FCF rediscovery event to worker thread */
2913 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
2914 spin_unlock_irq(&phba->hbalock);
2915 /* wake up worker thread */
2916 lpfc_worker_wake_up(phba);
2917}
2918
2919/**
2730 * lpfc_sli4_fw_cfg_check - Read the firmware config and verify FCoE support 2920 * lpfc_sli4_fw_cfg_check - Read the firmware config and verify FCoE support
2731 * @phba: pointer to lpfc hba data structure. 2921 * @phba: pointer to lpfc hba data structure.
2732 * 2922 *
@@ -2978,6 +3168,8 @@ lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
2978 bf_get(lpfc_acqe_link_physical, acqe_link); 3168 bf_get(lpfc_acqe_link_physical, acqe_link);
2979 phba->sli4_hba.link_state.fault = 3169 phba->sli4_hba.link_state.fault =
2980 bf_get(lpfc_acqe_link_fault, acqe_link); 3170 bf_get(lpfc_acqe_link_fault, acqe_link);
3171 phba->sli4_hba.link_state.logical_speed =
3172 bf_get(lpfc_acqe_qos_link_speed, acqe_link);
2981 3173
2982 /* Invoke the lpfc_handle_latt mailbox command callback function */ 3174 /* Invoke the lpfc_handle_latt mailbox command callback function */
2983 lpfc_mbx_cmpl_read_la(phba, pmb); 3175 lpfc_mbx_cmpl_read_la(phba, pmb);
@@ -3007,22 +3199,34 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3007 struct lpfc_nodelist *ndlp; 3199 struct lpfc_nodelist *ndlp;
3008 struct Scsi_Host *shost; 3200 struct Scsi_Host *shost;
3009 uint32_t link_state; 3201 uint32_t link_state;
3202 int active_vlink_present;
3203 struct lpfc_vport **vports;
3204 int i;
3010 3205
3011 phba->fc_eventTag = acqe_fcoe->event_tag; 3206 phba->fc_eventTag = acqe_fcoe->event_tag;
3012 phba->fcoe_eventtag = acqe_fcoe->event_tag; 3207 phba->fcoe_eventtag = acqe_fcoe->event_tag;
3013 switch (event_type) { 3208 switch (event_type) {
3014 case LPFC_FCOE_EVENT_TYPE_NEW_FCF: 3209 case LPFC_FCOE_EVENT_TYPE_NEW_FCF:
3210 case LPFC_FCOE_EVENT_TYPE_FCF_PARAM_MOD:
3015 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY, 3211 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
3016 "2546 New FCF found index 0x%x tag 0x%x\n", 3212 "2546 New FCF found index 0x%x tag 0x%x\n",
3017 acqe_fcoe->index, 3213 acqe_fcoe->index,
3018 acqe_fcoe->event_tag); 3214 acqe_fcoe->event_tag);
3019 /*
3020 * If the current FCF is in discovered state, or
3021 * FCF discovery is in progress do nothing.
3022 */
3023 spin_lock_irq(&phba->hbalock); 3215 spin_lock_irq(&phba->hbalock);
3024 if ((phba->fcf.fcf_flag & FCF_DISCOVERED) || 3216 if ((phba->fcf.fcf_flag & FCF_SCAN_DONE) ||
3025 (phba->hba_flag & FCF_DISC_INPROGRESS)) { 3217 (phba->hba_flag & FCF_DISC_INPROGRESS)) {
3218 /*
3219 * If the current FCF is in discovered state or
3220 * FCF discovery is in progress, do nothing.
3221 */
3222 spin_unlock_irq(&phba->hbalock);
3223 break;
3224 }
3225 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
3226 /*
3227 * If fast FCF failover rescan event is pending,
3228 * do nothing.
3229 */
3026 spin_unlock_irq(&phba->hbalock); 3230 spin_unlock_irq(&phba->hbalock);
3027 break; 3231 break;
3028 } 3232 }
@@ -3049,7 +3253,7 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3049 " tag 0x%x\n", acqe_fcoe->index, 3253 " tag 0x%x\n", acqe_fcoe->index,
3050 acqe_fcoe->event_tag); 3254 acqe_fcoe->event_tag);
3051 /* If the event is not for currently used fcf do nothing */ 3255 /* If the event is not for currently used fcf do nothing */
3052 if (phba->fcf.fcf_indx != acqe_fcoe->index) 3256 if (phba->fcf.current_rec.fcf_indx != acqe_fcoe->index)
3053 break; 3257 break;
3054 /* 3258 /*
3055 * Currently, driver support only one FCF - so treat this as 3259 * Currently, driver support only one FCF - so treat this as
@@ -3074,14 +3278,58 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3074 if (!ndlp) 3278 if (!ndlp)
3075 break; 3279 break;
3076 shost = lpfc_shost_from_vport(vport); 3280 shost = lpfc_shost_from_vport(vport);
3281 if (phba->pport->port_state <= LPFC_FLOGI)
3282 break;
3283 /* If virtual link is not yet instantiated ignore CVL */
3284 if (vport->port_state <= LPFC_FDISC)
3285 break;
3286
3077 lpfc_linkdown_port(vport); 3287 lpfc_linkdown_port(vport);
3078 if (vport->port_type != LPFC_NPIV_PORT) { 3288 lpfc_cleanup_pending_mbox(vport);
3289 spin_lock_irq(shost->host_lock);
3290 vport->fc_flag |= FC_VPORT_CVL_RCVD;
3291 spin_unlock_irq(shost->host_lock);
3292 active_vlink_present = 0;
3293
3294 vports = lpfc_create_vport_work_array(phba);
3295 if (vports) {
3296 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
3297 i++) {
3298 if ((!(vports[i]->fc_flag &
3299 FC_VPORT_CVL_RCVD)) &&
3300 (vports[i]->port_state > LPFC_FDISC)) {
3301 active_vlink_present = 1;
3302 break;
3303 }
3304 }
3305 lpfc_destroy_vport_work_array(phba, vports);
3306 }
3307
3308 if (active_vlink_present) {
3309 /*
3310 * If there are other active VLinks present,
3311 * re-instantiate the Vlink using FDISC.
3312 */
3079 mod_timer(&ndlp->nlp_delayfunc, jiffies + HZ); 3313 mod_timer(&ndlp->nlp_delayfunc, jiffies + HZ);
3080 spin_lock_irq(shost->host_lock); 3314 spin_lock_irq(shost->host_lock);
3081 ndlp->nlp_flag |= NLP_DELAY_TMO; 3315 ndlp->nlp_flag |= NLP_DELAY_TMO;
3082 spin_unlock_irq(shost->host_lock); 3316 spin_unlock_irq(shost->host_lock);
3083 ndlp->nlp_last_elscmd = ELS_CMD_FLOGI; 3317 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
3084 vport->port_state = LPFC_FLOGI; 3318 vport->port_state = LPFC_FDISC;
3319 } else {
3320 /*
3321 * Otherwise, we request port to rediscover
3322 * the entire FCF table for a fast recovery
3323 * from possible case that the current FCF
3324 * is no longer valid.
3325 */
3326 rc = lpfc_sli4_redisc_fcf_table(phba);
3327 if (rc)
3328 /*
3329 * Last resort will be re-try on the
3330 * the current registered FCF entry.
3331 */
3332 lpfc_retry_pport_discovery(phba);
3085 } 3333 }
3086 break; 3334 break;
3087 default: 3335 default:
@@ -3158,6 +3406,34 @@ void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
3158} 3406}
3159 3407
3160/** 3408/**
3409 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
3410 * @phba: pointer to lpfc hba data structure.
3411 *
3412 * This routine is invoked by the worker thread to process FCF table
3413 * rediscovery pending completion event.
3414 **/
3415void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
3416{
3417 int rc;
3418
3419 spin_lock_irq(&phba->hbalock);
3420 /* Clear FCF rediscovery timeout event */
3421 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
3422 /* Clear driver fast failover FCF record flag */
3423 phba->fcf.failover_rec.flag = 0;
3424 /* Set state for FCF fast failover */
3425 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
3426 spin_unlock_irq(&phba->hbalock);
3427
3428 /* Scan FCF table from the first entry to re-discover SAN */
3429 rc = lpfc_sli4_read_fcf_record(phba, LPFC_FCOE_FCF_GET_FIRST);
3430 if (rc)
3431 lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
3432 "2747 Post FCF rediscovery read FCF record "
3433 "failed 0x%x\n", rc);
3434}
3435
3436/**
3161 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table 3437 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
3162 * @phba: pointer to lpfc hba data structure. 3438 * @phba: pointer to lpfc hba data structure.
3163 * @dev_grp: The HBA PCI-Device group number. 3439 * @dev_grp: The HBA PCI-Device group number.
@@ -3442,8 +3718,10 @@ static int
3442lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) 3718lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3443{ 3719{
3444 struct lpfc_sli *psli; 3720 struct lpfc_sli *psli;
3445 int rc; 3721 LPFC_MBOXQ_t *mboxq;
3446 int i, hbq_count; 3722 int rc, i, hbq_count, buf_size, dma_buf_size, max_buf_size;
3723 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
3724 struct lpfc_mqe *mqe;
3447 3725
3448 /* Before proceed, wait for POST done and device ready */ 3726 /* Before proceed, wait for POST done and device ready */
3449 rc = lpfc_sli4_post_status_check(phba); 3727 rc = lpfc_sli4_post_status_check(phba);
@@ -3472,6 +3750,11 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3472 init_timer(&phba->eratt_poll); 3750 init_timer(&phba->eratt_poll);
3473 phba->eratt_poll.function = lpfc_poll_eratt; 3751 phba->eratt_poll.function = lpfc_poll_eratt;
3474 phba->eratt_poll.data = (unsigned long) phba; 3752 phba->eratt_poll.data = (unsigned long) phba;
3753 /* FCF rediscover timer */
3754 init_timer(&phba->fcf.redisc_wait);
3755 phba->fcf.redisc_wait.function = lpfc_sli4_fcf_redisc_wait_tmo;
3756 phba->fcf.redisc_wait.data = (unsigned long)phba;
3757
3475 /* 3758 /*
3476 * We need to do a READ_CONFIG mailbox command here before 3759 * We need to do a READ_CONFIG mailbox command here before
3477 * calling lpfc_get_cfgparam. For VFs this will report the 3760 * calling lpfc_get_cfgparam. For VFs this will report the
@@ -3496,31 +3779,26 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3496 * used to create the sg_dma_buf_pool must be dynamically calculated. 3779 * used to create the sg_dma_buf_pool must be dynamically calculated.
3497 * 2 segments are added since the IOCB needs a command and response bde. 3780 * 2 segments are added since the IOCB needs a command and response bde.
3498 * To insure that the scsi sgl does not cross a 4k page boundary only 3781 * To insure that the scsi sgl does not cross a 4k page boundary only
3499 * sgl sizes of 1k, 2k, 4k, and 8k are supported. 3782 * sgl sizes of must be a power of 2.
3500 * Table of sgl sizes and seg_cnt:
3501 * sgl size, sg_seg_cnt total seg
3502 * 1k 50 52
3503 * 2k 114 116
3504 * 4k 242 244
3505 * 8k 498 500
3506 * cmd(32) + rsp(160) + (52 * sizeof(sli4_sge)) = 1024
3507 * cmd(32) + rsp(160) + (116 * sizeof(sli4_sge)) = 2048
3508 * cmd(32) + rsp(160) + (244 * sizeof(sli4_sge)) = 4096
3509 * cmd(32) + rsp(160) + (500 * sizeof(sli4_sge)) = 8192
3510 */ 3783 */
3511 if (phba->cfg_sg_seg_cnt <= LPFC_DEFAULT_SG_SEG_CNT) 3784 buf_size = (sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp) +
3512 phba->cfg_sg_seg_cnt = 50; 3785 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge)));
3513 else if (phba->cfg_sg_seg_cnt <= 114) 3786 /* Feature Level 1 hardware is limited to 2 pages */
3514 phba->cfg_sg_seg_cnt = 114; 3787 if ((bf_get(lpfc_sli_intf_featurelevel1, &phba->sli4_hba.sli_intf) ==
3515 else if (phba->cfg_sg_seg_cnt <= 242) 3788 LPFC_SLI_INTF_FEATURELEVEL1_1))
3516 phba->cfg_sg_seg_cnt = 242; 3789 max_buf_size = LPFC_SLI4_FL1_MAX_BUF_SIZE;
3517 else 3790 else
3518 phba->cfg_sg_seg_cnt = 498; 3791 max_buf_size = LPFC_SLI4_MAX_BUF_SIZE;
3519 3792 for (dma_buf_size = LPFC_SLI4_MIN_BUF_SIZE;
3520 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) 3793 dma_buf_size < max_buf_size && buf_size > dma_buf_size;
3521 + sizeof(struct fcp_rsp); 3794 dma_buf_size = dma_buf_size << 1)
3522 phba->cfg_sg_dma_buf_size += 3795 ;
3523 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge)); 3796 if (dma_buf_size == max_buf_size)
3797 phba->cfg_sg_seg_cnt = (dma_buf_size -
3798 sizeof(struct fcp_cmnd) - sizeof(struct fcp_rsp) -
3799 (2 * sizeof(struct sli4_sge))) /
3800 sizeof(struct sli4_sge);
3801 phba->cfg_sg_dma_buf_size = dma_buf_size;
3524 3802
3525 /* Initialize buffer queue management fields */ 3803 /* Initialize buffer queue management fields */
3526 hbq_count = lpfc_sli_hbq_count(); 3804 hbq_count = lpfc_sli_hbq_count();
@@ -3638,6 +3916,43 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3638 goto out_free_fcp_eq_hdl; 3916 goto out_free_fcp_eq_hdl;
3639 } 3917 }
3640 3918
3919 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3920 GFP_KERNEL);
3921 if (!mboxq) {
3922 rc = -ENOMEM;
3923 goto out_free_fcp_eq_hdl;
3924 }
3925
3926 /* Get the Supported Pages. It is always available. */
3927 lpfc_supported_pages(mboxq);
3928 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3929 if (unlikely(rc)) {
3930 rc = -EIO;
3931 mempool_free(mboxq, phba->mbox_mem_pool);
3932 goto out_free_fcp_eq_hdl;
3933 }
3934
3935 mqe = &mboxq->u.mqe;
3936 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
3937 LPFC_MAX_SUPPORTED_PAGES);
3938 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
3939 switch (pn_page[i]) {
3940 case LPFC_SLI4_PARAMETERS:
3941 phba->sli4_hba.pc_sli4_params.supported = 1;
3942 break;
3943 default:
3944 break;
3945 }
3946 }
3947
3948 /* Read the port's SLI4 Parameters capabilities if supported. */
3949 if (phba->sli4_hba.pc_sli4_params.supported)
3950 rc = lpfc_pc_sli4_params_get(phba, mboxq);
3951 mempool_free(mboxq, phba->mbox_mem_pool);
3952 if (rc) {
3953 rc = -EIO;
3954 goto out_free_fcp_eq_hdl;
3955 }
3641 return rc; 3956 return rc;
3642 3957
3643out_free_fcp_eq_hdl: 3958out_free_fcp_eq_hdl:
@@ -3733,6 +4048,8 @@ lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
3733int 4048int
3734lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 4049lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
3735{ 4050{
4051 phba->lpfc_hba_init_link = lpfc_hba_init_link;
4052 phba->lpfc_hba_down_link = lpfc_hba_down_link;
3736 switch (dev_grp) { 4053 switch (dev_grp) {
3737 case LPFC_PCI_DEV_LP: 4054 case LPFC_PCI_DEV_LP:
3738 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3; 4055 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
@@ -4291,7 +4608,7 @@ lpfc_hba_alloc(struct pci_dev *pdev)
4291 return NULL; 4608 return NULL;
4292 } 4609 }
4293 4610
4294 mutex_init(&phba->ct_event_mutex); 4611 spin_lock_init(&phba->ct_ev_lock);
4295 INIT_LIST_HEAD(&phba->ct_ev_waiters); 4612 INIT_LIST_HEAD(&phba->ct_ev_waiters);
4296 4613
4297 return phba; 4614 return phba;
@@ -4641,7 +4958,7 @@ lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
4641int 4958int
4642lpfc_sli4_post_status_check(struct lpfc_hba *phba) 4959lpfc_sli4_post_status_check(struct lpfc_hba *phba)
4643{ 4960{
4644 struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg, scratchpad; 4961 struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg;
4645 int i, port_error = -ENODEV; 4962 int i, port_error = -ENODEV;
4646 4963
4647 if (!phba->sli4_hba.STAregaddr) 4964 if (!phba->sli4_hba.STAregaddr)
@@ -4677,14 +4994,21 @@ lpfc_sli4_post_status_check(struct lpfc_hba *phba)
4677 bf_get(lpfc_hst_state_port_status, &sta_reg)); 4994 bf_get(lpfc_hst_state_port_status, &sta_reg));
4678 4995
4679 /* Log device information */ 4996 /* Log device information */
4680 scratchpad.word0 = readl(phba->sli4_hba.SCRATCHPADregaddr); 4997 phba->sli4_hba.sli_intf.word0 = readl(phba->sli4_hba.SLIINTFregaddr);
4681 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4998 if (bf_get(lpfc_sli_intf_valid,
4682 "2534 Device Info: ChipType=0x%x, SliRev=0x%x, " 4999 &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_VALID) {
4683 "FeatureL1=0x%x, FeatureL2=0x%x\n", 5000 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4684 bf_get(lpfc_scratchpad_chiptype, &scratchpad), 5001 "2534 Device Info: ChipType=0x%x, SliRev=0x%x, "
4685 bf_get(lpfc_scratchpad_slirev, &scratchpad), 5002 "FeatureL1=0x%x, FeatureL2=0x%x\n",
4686 bf_get(lpfc_scratchpad_featurelevel1, &scratchpad), 5003 bf_get(lpfc_sli_intf_sli_family,
4687 bf_get(lpfc_scratchpad_featurelevel2, &scratchpad)); 5004 &phba->sli4_hba.sli_intf),
5005 bf_get(lpfc_sli_intf_slirev,
5006 &phba->sli4_hba.sli_intf),
5007 bf_get(lpfc_sli_intf_featurelevel1,
5008 &phba->sli4_hba.sli_intf),
5009 bf_get(lpfc_sli_intf_featurelevel2,
5010 &phba->sli4_hba.sli_intf));
5011 }
4688 phba->sli4_hba.ue_mask_lo = readl(phba->sli4_hba.UEMASKLOregaddr); 5012 phba->sli4_hba.ue_mask_lo = readl(phba->sli4_hba.UEMASKLOregaddr);
4689 phba->sli4_hba.ue_mask_hi = readl(phba->sli4_hba.UEMASKHIregaddr); 5013 phba->sli4_hba.ue_mask_hi = readl(phba->sli4_hba.UEMASKHIregaddr);
4690 /* With uncoverable error, log the error message and return error */ 5014 /* With uncoverable error, log the error message and return error */
@@ -4723,8 +5047,8 @@ lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba)
4723 LPFC_UE_MASK_LO; 5047 LPFC_UE_MASK_LO;
4724 phba->sli4_hba.UEMASKHIregaddr = phba->sli4_hba.conf_regs_memmap_p + 5048 phba->sli4_hba.UEMASKHIregaddr = phba->sli4_hba.conf_regs_memmap_p +
4725 LPFC_UE_MASK_HI; 5049 LPFC_UE_MASK_HI;
4726 phba->sli4_hba.SCRATCHPADregaddr = phba->sli4_hba.conf_regs_memmap_p + 5050 phba->sli4_hba.SLIINTFregaddr = phba->sli4_hba.conf_regs_memmap_p +
4727 LPFC_SCRATCHPAD; 5051 LPFC_SLI_INTF;
4728} 5052}
4729 5053
4730/** 5054/**
@@ -5999,7 +6323,7 @@ lpfc_sli4_fcfi_unreg(struct lpfc_hba *phba, uint16_t fcfi)
5999 spin_lock_irqsave(&phba->hbalock, flags); 6323 spin_lock_irqsave(&phba->hbalock, flags);
6000 /* Mark the FCFI is no longer registered */ 6324 /* Mark the FCFI is no longer registered */
6001 phba->fcf.fcf_flag &= 6325 phba->fcf.fcf_flag &=
6002 ~(FCF_AVAILABLE | FCF_REGISTERED | FCF_DISCOVERED); 6326 ~(FCF_AVAILABLE | FCF_REGISTERED | FCF_SCAN_DONE);
6003 spin_unlock_irqrestore(&phba->hbalock, flags); 6327 spin_unlock_irqrestore(&phba->hbalock, flags);
6004 } 6328 }
6005} 6329}
@@ -6039,16 +6363,20 @@ lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
6039 6363
6040 /* Get the bus address of SLI4 device Bar0, Bar1, and Bar2 and the 6364 /* Get the bus address of SLI4 device Bar0, Bar1, and Bar2 and the
6041 * number of bytes required by each mapping. They are actually 6365 * number of bytes required by each mapping. They are actually
6042 * mapping to the PCI BAR regions 1, 2, and 4 by the SLI4 device. 6366 * mapping to the PCI BAR regions 0 or 1, 2, and 4 by the SLI4 device.
6043 */ 6367 */
6044 phba->pci_bar0_map = pci_resource_start(pdev, LPFC_SLI4_BAR0); 6368 if (pci_resource_start(pdev, 0)) {
6045 bar0map_len = pci_resource_len(pdev, LPFC_SLI4_BAR0); 6369 phba->pci_bar0_map = pci_resource_start(pdev, 0);
6046 6370 bar0map_len = pci_resource_len(pdev, 0);
6047 phba->pci_bar1_map = pci_resource_start(pdev, LPFC_SLI4_BAR1); 6371 } else {
6048 bar1map_len = pci_resource_len(pdev, LPFC_SLI4_BAR1); 6372 phba->pci_bar0_map = pci_resource_start(pdev, 1);
6373 bar0map_len = pci_resource_len(pdev, 1);
6374 }
6375 phba->pci_bar1_map = pci_resource_start(pdev, 2);
6376 bar1map_len = pci_resource_len(pdev, 2);
6049 6377
6050 phba->pci_bar2_map = pci_resource_start(pdev, LPFC_SLI4_BAR2); 6378 phba->pci_bar2_map = pci_resource_start(pdev, 4);
6051 bar2map_len = pci_resource_len(pdev, LPFC_SLI4_BAR2); 6379 bar2map_len = pci_resource_len(pdev, 4);
6052 6380
6053 /* Map SLI4 PCI Config Space Register base to a kernel virtual addr */ 6381 /* Map SLI4 PCI Config Space Register base to a kernel virtual addr */
6054 phba->sli4_hba.conf_regs_memmap_p = 6382 phba->sli4_hba.conf_regs_memmap_p =
@@ -6793,6 +7121,73 @@ lpfc_sli4_hba_unset(struct lpfc_hba *phba)
6793 phba->pport->work_port_events = 0; 7121 phba->pport->work_port_events = 0;
6794} 7122}
6795 7123
7124 /**
7125 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
7126 * @phba: Pointer to HBA context object.
7127 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
7128 *
7129 * This function is called in the SLI4 code path to read the port's
7130 * sli4 capabilities.
7131 *
7132 * This function may be be called from any context that can block-wait
7133 * for the completion. The expectation is that this routine is called
7134 * typically from probe_one or from the online routine.
7135 **/
7136int
7137lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
7138{
7139 int rc;
7140 struct lpfc_mqe *mqe;
7141 struct lpfc_pc_sli4_params *sli4_params;
7142 uint32_t mbox_tmo;
7143
7144 rc = 0;
7145 mqe = &mboxq->u.mqe;
7146
7147 /* Read the port's SLI4 Parameters port capabilities */
7148 lpfc_sli4_params(mboxq);
7149 if (!phba->sli4_hba.intr_enable)
7150 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7151 else {
7152 mbox_tmo = lpfc_mbox_tmo_val(phba, MBX_PORT_CAPABILITIES);
7153 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
7154 }
7155
7156 if (unlikely(rc))
7157 return 1;
7158
7159 sli4_params = &phba->sli4_hba.pc_sli4_params;
7160 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
7161 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
7162 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
7163 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
7164 &mqe->un.sli4_params);
7165 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
7166 &mqe->un.sli4_params);
7167 sli4_params->proto_types = mqe->un.sli4_params.word3;
7168 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
7169 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
7170 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
7171 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
7172 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
7173 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
7174 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
7175 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
7176 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
7177 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
7178 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
7179 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
7180 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
7181 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
7182 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
7183 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
7184 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
7185 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
7186 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
7187 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
7188 return rc;
7189}
7190
6796/** 7191/**
6797 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. 7192 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
6798 * @pdev: pointer to PCI device 7193 * @pdev: pointer to PCI device
@@ -7134,6 +7529,12 @@ lpfc_pci_resume_one_s3(struct pci_dev *pdev)
7134 pci_set_power_state(pdev, PCI_D0); 7529 pci_set_power_state(pdev, PCI_D0);
7135 pci_restore_state(pdev); 7530 pci_restore_state(pdev);
7136 7531
7532 /*
7533 * As the new kernel behavior of pci_restore_state() API call clears
7534 * device saved_state flag, need to save the restored state again.
7535 */
7536 pci_save_state(pdev);
7537
7137 if (pdev->is_busmaster) 7538 if (pdev->is_busmaster)
7138 pci_set_master(pdev); 7539 pci_set_master(pdev);
7139 7540
@@ -7317,6 +7718,13 @@ lpfc_io_slot_reset_s3(struct pci_dev *pdev)
7317 } 7718 }
7318 7719
7319 pci_restore_state(pdev); 7720 pci_restore_state(pdev);
7721
7722 /*
7723 * As the new kernel behavior of pci_restore_state() API call clears
7724 * device saved_state flag, need to save the restored state again.
7725 */
7726 pci_save_state(pdev);
7727
7320 if (pdev->is_busmaster) 7728 if (pdev->is_busmaster)
7321 pci_set_master(pdev); 7729 pci_set_master(pdev);
7322 7730
@@ -7726,6 +8134,13 @@ lpfc_pci_resume_one_s4(struct pci_dev *pdev)
7726 /* Restore device state from PCI config space */ 8134 /* Restore device state from PCI config space */
7727 pci_set_power_state(pdev, PCI_D0); 8135 pci_set_power_state(pdev, PCI_D0);
7728 pci_restore_state(pdev); 8136 pci_restore_state(pdev);
8137
8138 /*
8139 * As the new kernel behavior of pci_restore_state() API call clears
8140 * device saved_state flag, need to save the restored state again.
8141 */
8142 pci_save_state(pdev);
8143
7729 if (pdev->is_busmaster) 8144 if (pdev->is_busmaster)
7730 pci_set_master(pdev); 8145 pci_set_master(pdev);
7731 8146
@@ -7845,11 +8260,11 @@ lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
7845 int rc; 8260 int rc;
7846 struct lpfc_sli_intf intf; 8261 struct lpfc_sli_intf intf;
7847 8262
7848 if (pci_read_config_dword(pdev, LPFC_SLIREV_CONF_WORD, &intf.word0)) 8263 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
7849 return -ENODEV; 8264 return -ENODEV;
7850 8265
7851 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && 8266 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
7852 (bf_get(lpfc_sli_intf_rev, &intf) == LPFC_SLIREV_CONF_SLI4)) 8267 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
7853 rc = lpfc_pci_probe_one_s4(pdev, pid); 8268 rc = lpfc_pci_probe_one_s4(pdev, pid);
7854 else 8269 else
7855 rc = lpfc_pci_probe_one_s3(pdev, pid); 8270 rc = lpfc_pci_probe_one_s3(pdev, pid);
diff --git a/drivers/scsi/lpfc/lpfc_mbox.c b/drivers/scsi/lpfc/lpfc_mbox.c
index a9afd8b94b6a..6c4dce1a30ca 100644
--- a/drivers/scsi/lpfc/lpfc_mbox.c
+++ b/drivers/scsi/lpfc/lpfc_mbox.c
@@ -1707,7 +1707,8 @@ lpfc_sli4_config(struct lpfc_hba *phba, struct lpfcMboxq *mbox,
1707 alloc_len - sizeof(union lpfc_sli4_cfg_shdr); 1707 alloc_len - sizeof(union lpfc_sli4_cfg_shdr);
1708 } 1708 }
1709 /* The sub-header is in DMA memory, which needs endian converstion */ 1709 /* The sub-header is in DMA memory, which needs endian converstion */
1710 lpfc_sli_pcimem_bcopy(cfg_shdr, cfg_shdr, 1710 if (cfg_shdr)
1711 lpfc_sli_pcimem_bcopy(cfg_shdr, cfg_shdr,
1711 sizeof(union lpfc_sli4_cfg_shdr)); 1712 sizeof(union lpfc_sli4_cfg_shdr));
1712 1713
1713 return alloc_len; 1714 return alloc_len;
@@ -1747,6 +1748,65 @@ lpfc_sli4_mbox_opcode_get(struct lpfc_hba *phba, struct lpfcMboxq *mbox)
1747} 1748}
1748 1749
1749/** 1750/**
1751 * lpfc_sli4_mbx_read_fcf_record - Allocate and construct read fcf mbox cmd
1752 * @phba: pointer to lpfc hba data structure.
1753 * @fcf_index: index to fcf table.
1754 *
1755 * This routine routine allocates and constructs non-embedded mailbox command
1756 * for reading a FCF table entry refered by @fcf_index.
1757 *
1758 * Return: pointer to the mailbox command constructed if successful, otherwise
1759 * NULL.
1760 **/
1761int
1762lpfc_sli4_mbx_read_fcf_record(struct lpfc_hba *phba,
1763 struct lpfcMboxq *mboxq,
1764 uint16_t fcf_index)
1765{
1766 void *virt_addr;
1767 dma_addr_t phys_addr;
1768 uint8_t *bytep;
1769 struct lpfc_mbx_sge sge;
1770 uint32_t alloc_len, req_len;
1771 struct lpfc_mbx_read_fcf_tbl *read_fcf;
1772
1773 if (!mboxq)
1774 return -ENOMEM;
1775
1776 req_len = sizeof(struct fcf_record) +
1777 sizeof(union lpfc_sli4_cfg_shdr) + 2 * sizeof(uint32_t);
1778
1779 /* Set up READ_FCF SLI4_CONFIG mailbox-ioctl command */
1780 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
1781 LPFC_MBOX_OPCODE_FCOE_READ_FCF_TABLE, req_len,
1782 LPFC_SLI4_MBX_NEMBED);
1783
1784 if (alloc_len < req_len) {
1785 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
1786 "0291 Allocated DMA memory size (x%x) is "
1787 "less than the requested DMA memory "
1788 "size (x%x)\n", alloc_len, req_len);
1789 return -ENOMEM;
1790 }
1791
1792 /* Get the first SGE entry from the non-embedded DMA memory. This
1793 * routine only uses a single SGE.
1794 */
1795 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
1796 phys_addr = getPaddr(sge.pa_hi, sge.pa_lo);
1797 virt_addr = mboxq->sge_array->addr[0];
1798 read_fcf = (struct lpfc_mbx_read_fcf_tbl *)virt_addr;
1799
1800 /* Set up command fields */
1801 bf_set(lpfc_mbx_read_fcf_tbl_indx, &read_fcf->u.request, fcf_index);
1802 /* Perform necessary endian conversion */
1803 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
1804 lpfc_sli_pcimem_bcopy(bytep, bytep, sizeof(uint32_t));
1805
1806 return 0;
1807}
1808
1809/**
1750 * lpfc_request_features: Configure SLI4 REQUEST_FEATURES mailbox 1810 * lpfc_request_features: Configure SLI4 REQUEST_FEATURES mailbox
1751 * @mboxq: pointer to lpfc mbox command. 1811 * @mboxq: pointer to lpfc mbox command.
1752 * 1812 *
@@ -1946,13 +2006,14 @@ lpfc_reg_fcfi(struct lpfc_hba *phba, struct lpfcMboxq *mbox)
1946 bf_set(lpfc_reg_fcfi_rq_id1, reg_fcfi, REG_FCF_INVALID_QID); 2006 bf_set(lpfc_reg_fcfi_rq_id1, reg_fcfi, REG_FCF_INVALID_QID);
1947 bf_set(lpfc_reg_fcfi_rq_id2, reg_fcfi, REG_FCF_INVALID_QID); 2007 bf_set(lpfc_reg_fcfi_rq_id2, reg_fcfi, REG_FCF_INVALID_QID);
1948 bf_set(lpfc_reg_fcfi_rq_id3, reg_fcfi, REG_FCF_INVALID_QID); 2008 bf_set(lpfc_reg_fcfi_rq_id3, reg_fcfi, REG_FCF_INVALID_QID);
1949 bf_set(lpfc_reg_fcfi_info_index, reg_fcfi, phba->fcf.fcf_indx); 2009 bf_set(lpfc_reg_fcfi_info_index, reg_fcfi,
2010 phba->fcf.current_rec.fcf_indx);
1950 /* reg_fcf addr mode is bit wise inverted value of fcf addr_mode */ 2011 /* reg_fcf addr mode is bit wise inverted value of fcf addr_mode */
1951 bf_set(lpfc_reg_fcfi_mam, reg_fcfi, 2012 bf_set(lpfc_reg_fcfi_mam, reg_fcfi, (~phba->fcf.addr_mode) & 0x3);
1952 (~phba->fcf.addr_mode) & 0x3); 2013 if (phba->fcf.current_rec.vlan_id != 0xFFFF) {
1953 if (phba->fcf.fcf_flag & FCF_VALID_VLAN) {
1954 bf_set(lpfc_reg_fcfi_vv, reg_fcfi, 1); 2014 bf_set(lpfc_reg_fcfi_vv, reg_fcfi, 1);
1955 bf_set(lpfc_reg_fcfi_vlan_tag, reg_fcfi, phba->fcf.vlan_id); 2015 bf_set(lpfc_reg_fcfi_vlan_tag, reg_fcfi,
2016 phba->fcf.current_rec.vlan_id);
1956 } 2017 }
1957} 2018}
1958 2019
@@ -1992,3 +2053,41 @@ lpfc_resume_rpi(struct lpfcMboxq *mbox, struct lpfc_nodelist *ndlp)
1992 bf_set(lpfc_resume_rpi_ii, resume_rpi, RESUME_INDEX_RPI); 2053 bf_set(lpfc_resume_rpi_ii, resume_rpi, RESUME_INDEX_RPI);
1993 resume_rpi->event_tag = ndlp->phba->fc_eventTag; 2054 resume_rpi->event_tag = ndlp->phba->fc_eventTag;
1994} 2055}
2056
2057/**
2058 * lpfc_supported_pages - Initialize the PORT_CAPABILITIES supported pages
2059 * mailbox command.
2060 * @mbox: pointer to lpfc mbox command to initialize.
2061 *
2062 * The PORT_CAPABILITIES supported pages mailbox command is issued to
2063 * retrieve the particular feature pages supported by the port.
2064 **/
2065void
2066lpfc_supported_pages(struct lpfcMboxq *mbox)
2067{
2068 struct lpfc_mbx_supp_pages *supp_pages;
2069
2070 memset(mbox, 0, sizeof(*mbox));
2071 supp_pages = &mbox->u.mqe.un.supp_pages;
2072 bf_set(lpfc_mqe_command, &mbox->u.mqe, MBX_PORT_CAPABILITIES);
2073 bf_set(cpn, supp_pages, LPFC_SUPP_PAGES);
2074}
2075
2076/**
2077 * lpfc_sli4_params - Initialize the PORT_CAPABILITIES SLI4 Params
2078 * mailbox command.
2079 * @mbox: pointer to lpfc mbox command to initialize.
2080 *
2081 * The PORT_CAPABILITIES SLI4 parameters mailbox command is issued to
2082 * retrieve the particular SLI4 features supported by the port.
2083 **/
2084void
2085lpfc_sli4_params(struct lpfcMboxq *mbox)
2086{
2087 struct lpfc_mbx_sli4_params *sli4_params;
2088
2089 memset(mbox, 0, sizeof(*mbox));
2090 sli4_params = &mbox->u.mqe.un.sli4_params;
2091 bf_set(lpfc_mqe_command, &mbox->u.mqe, MBX_PORT_CAPABILITIES);
2092 bf_set(cpn, sli4_params, LPFC_SLI4_PARAMETERS);
2093}
diff --git a/drivers/scsi/lpfc/lpfc_nl.h b/drivers/scsi/lpfc/lpfc_nl.h
index d655ed3eebef..f3cfbe2ce986 100644
--- a/drivers/scsi/lpfc/lpfc_nl.h
+++ b/drivers/scsi/lpfc/lpfc_nl.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2008 Emulex. All rights reserved. * 4 * Copyright (C) 2010 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -177,23 +177,3 @@ struct temp_event {
177 uint32_t data; 177 uint32_t data;
178}; 178};
179 179
180/* bsg definitions */
181#define LPFC_BSG_VENDOR_SET_CT_EVENT 1
182#define LPFC_BSG_VENDOR_GET_CT_EVENT 2
183
184struct set_ct_event {
185 uint32_t command;
186 uint32_t ev_req_id;
187 uint32_t ev_reg_id;
188};
189
190struct get_ct_event {
191 uint32_t command;
192 uint32_t ev_reg_id;
193 uint32_t ev_req_id;
194};
195
196struct get_ct_event_reply {
197 uint32_t immed_data;
198 uint32_t type;
199};
diff --git a/drivers/scsi/lpfc/lpfc_nportdisc.c b/drivers/scsi/lpfc/lpfc_nportdisc.c
index 2ed6af194932..d20ae6b3b3cf 100644
--- a/drivers/scsi/lpfc/lpfc_nportdisc.c
+++ b/drivers/scsi/lpfc/lpfc_nportdisc.c
@@ -62,7 +62,7 @@ lpfc_check_adisc(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
62 62
63int 63int
64lpfc_check_sparm(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, 64lpfc_check_sparm(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
65 struct serv_parm * sp, uint32_t class) 65 struct serv_parm *sp, uint32_t class, int flogi)
66{ 66{
67 volatile struct serv_parm *hsp = &vport->fc_sparam; 67 volatile struct serv_parm *hsp = &vport->fc_sparam;
68 uint16_t hsp_value, ssp_value = 0; 68 uint16_t hsp_value, ssp_value = 0;
@@ -75,49 +75,56 @@ lpfc_check_sparm(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
75 * correcting the byte values. 75 * correcting the byte values.
76 */ 76 */
77 if (sp->cls1.classValid) { 77 if (sp->cls1.classValid) {
78 hsp_value = (hsp->cls1.rcvDataSizeMsb << 8) | 78 if (!flogi) {
79 hsp->cls1.rcvDataSizeLsb; 79 hsp_value = ((hsp->cls1.rcvDataSizeMsb << 8) |
80 ssp_value = (sp->cls1.rcvDataSizeMsb << 8) | 80 hsp->cls1.rcvDataSizeLsb);
81 sp->cls1.rcvDataSizeLsb; 81 ssp_value = ((sp->cls1.rcvDataSizeMsb << 8) |
82 if (!ssp_value) 82 sp->cls1.rcvDataSizeLsb);
83 goto bad_service_param; 83 if (!ssp_value)
84 if (ssp_value > hsp_value) { 84 goto bad_service_param;
85 sp->cls1.rcvDataSizeLsb = hsp->cls1.rcvDataSizeLsb; 85 if (ssp_value > hsp_value) {
86 sp->cls1.rcvDataSizeMsb = hsp->cls1.rcvDataSizeMsb; 86 sp->cls1.rcvDataSizeLsb =
87 hsp->cls1.rcvDataSizeLsb;
88 sp->cls1.rcvDataSizeMsb =
89 hsp->cls1.rcvDataSizeMsb;
90 }
87 } 91 }
88 } else if (class == CLASS1) { 92 } else if (class == CLASS1)
89 goto bad_service_param; 93 goto bad_service_param;
90 }
91
92 if (sp->cls2.classValid) { 94 if (sp->cls2.classValid) {
93 hsp_value = (hsp->cls2.rcvDataSizeMsb << 8) | 95 if (!flogi) {
94 hsp->cls2.rcvDataSizeLsb; 96 hsp_value = ((hsp->cls2.rcvDataSizeMsb << 8) |
95 ssp_value = (sp->cls2.rcvDataSizeMsb << 8) | 97 hsp->cls2.rcvDataSizeLsb);
96 sp->cls2.rcvDataSizeLsb; 98 ssp_value = ((sp->cls2.rcvDataSizeMsb << 8) |
97 if (!ssp_value) 99 sp->cls2.rcvDataSizeLsb);
98 goto bad_service_param; 100 if (!ssp_value)
99 if (ssp_value > hsp_value) { 101 goto bad_service_param;
100 sp->cls2.rcvDataSizeLsb = hsp->cls2.rcvDataSizeLsb; 102 if (ssp_value > hsp_value) {
101 sp->cls2.rcvDataSizeMsb = hsp->cls2.rcvDataSizeMsb; 103 sp->cls2.rcvDataSizeLsb =
104 hsp->cls2.rcvDataSizeLsb;
105 sp->cls2.rcvDataSizeMsb =
106 hsp->cls2.rcvDataSizeMsb;
107 }
102 } 108 }
103 } else if (class == CLASS2) { 109 } else if (class == CLASS2)
104 goto bad_service_param; 110 goto bad_service_param;
105 }
106
107 if (sp->cls3.classValid) { 111 if (sp->cls3.classValid) {
108 hsp_value = (hsp->cls3.rcvDataSizeMsb << 8) | 112 if (!flogi) {
109 hsp->cls3.rcvDataSizeLsb; 113 hsp_value = ((hsp->cls3.rcvDataSizeMsb << 8) |
110 ssp_value = (sp->cls3.rcvDataSizeMsb << 8) | 114 hsp->cls3.rcvDataSizeLsb);
111 sp->cls3.rcvDataSizeLsb; 115 ssp_value = ((sp->cls3.rcvDataSizeMsb << 8) |
112 if (!ssp_value) 116 sp->cls3.rcvDataSizeLsb);
113 goto bad_service_param; 117 if (!ssp_value)
114 if (ssp_value > hsp_value) { 118 goto bad_service_param;
115 sp->cls3.rcvDataSizeLsb = hsp->cls3.rcvDataSizeLsb; 119 if (ssp_value > hsp_value) {
116 sp->cls3.rcvDataSizeMsb = hsp->cls3.rcvDataSizeMsb; 120 sp->cls3.rcvDataSizeLsb =
121 hsp->cls3.rcvDataSizeLsb;
122 sp->cls3.rcvDataSizeMsb =
123 hsp->cls3.rcvDataSizeMsb;
124 }
117 } 125 }
118 } else if (class == CLASS3) { 126 } else if (class == CLASS3)
119 goto bad_service_param; 127 goto bad_service_param;
120 }
121 128
122 /* 129 /*
123 * Preserve the upper four bits of the MSB from the PLOGI response. 130 * Preserve the upper four bits of the MSB from the PLOGI response.
@@ -247,7 +254,7 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
247 int rc; 254 int rc;
248 255
249 memset(&stat, 0, sizeof (struct ls_rjt)); 256 memset(&stat, 0, sizeof (struct ls_rjt));
250 if (vport->port_state <= LPFC_FLOGI) { 257 if (vport->port_state <= LPFC_FDISC) {
251 /* Before responding to PLOGI, check for pt2pt mode. 258 /* Before responding to PLOGI, check for pt2pt mode.
252 * If we are pt2pt, with an outstanding FLOGI, abort 259 * If we are pt2pt, with an outstanding FLOGI, abort
253 * the FLOGI and resend it first. 260 * the FLOGI and resend it first.
@@ -295,7 +302,7 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
295 NULL); 302 NULL);
296 return 0; 303 return 0;
297 } 304 }
298 if ((lpfc_check_sparm(vport, ndlp, sp, CLASS3) == 0)) { 305 if ((lpfc_check_sparm(vport, ndlp, sp, CLASS3, 0) == 0)) {
299 /* Reject this request because invalid parameters */ 306 /* Reject this request because invalid parameters */
300 stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC; 307 stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
301 stat.un.b.lsRjtRsnCodeExp = LSEXP_SPARM_OPTIONS; 308 stat.un.b.lsRjtRsnCodeExp = LSEXP_SPARM_OPTIONS;
@@ -831,7 +838,7 @@ lpfc_cmpl_plogi_plogi_issue(struct lpfc_vport *vport,
831 "0142 PLOGI RSP: Invalid WWN.\n"); 838 "0142 PLOGI RSP: Invalid WWN.\n");
832 goto out; 839 goto out;
833 } 840 }
834 if (!lpfc_check_sparm(vport, ndlp, sp, CLASS3)) 841 if (!lpfc_check_sparm(vport, ndlp, sp, CLASS3, 0))
835 goto out; 842 goto out;
836 /* PLOGI chkparm OK */ 843 /* PLOGI chkparm OK */
837 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS, 844 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
diff --git a/drivers/scsi/lpfc/lpfc_scsi.c b/drivers/scsi/lpfc/lpfc_scsi.c
index a246410ce9df..7f21b47db791 100644
--- a/drivers/scsi/lpfc/lpfc_scsi.c
+++ b/drivers/scsi/lpfc/lpfc_scsi.c
@@ -626,6 +626,7 @@ lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *phba,
626 &phba->sli4_hba.lpfc_abts_scsi_buf_list, list) { 626 &phba->sli4_hba.lpfc_abts_scsi_buf_list, list) {
627 if (psb->cur_iocbq.sli4_xritag == xri) { 627 if (psb->cur_iocbq.sli4_xritag == xri) {
628 list_del(&psb->list); 628 list_del(&psb->list);
629 psb->exch_busy = 0;
629 psb->status = IOSTAT_SUCCESS; 630 psb->status = IOSTAT_SUCCESS;
630 spin_unlock_irqrestore( 631 spin_unlock_irqrestore(
631 &phba->sli4_hba.abts_scsi_buf_list_lock, 632 &phba->sli4_hba.abts_scsi_buf_list_lock,
@@ -688,11 +689,12 @@ lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *phba)
688 list); 689 list);
689 if (status) { 690 if (status) {
690 /* Put this back on the abort scsi list */ 691 /* Put this back on the abort scsi list */
691 psb->status = IOSTAT_LOCAL_REJECT; 692 psb->exch_busy = 1;
692 psb->result = IOERR_ABORT_REQUESTED;
693 rc++; 693 rc++;
694 } else 694 } else {
695 psb->exch_busy = 0;
695 psb->status = IOSTAT_SUCCESS; 696 psb->status = IOSTAT_SUCCESS;
697 }
696 /* Put it back into the SCSI buffer list */ 698 /* Put it back into the SCSI buffer list */
697 lpfc_release_scsi_buf_s4(phba, psb); 699 lpfc_release_scsi_buf_s4(phba, psb);
698 } 700 }
@@ -796,19 +798,17 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)
796 */ 798 */
797 sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_cmd)); 799 sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_cmd));
798 sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_cmd)); 800 sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_cmd));
799 bf_set(lpfc_sli4_sge_len, sgl, sizeof(struct fcp_cmnd));
800 bf_set(lpfc_sli4_sge_last, sgl, 0); 801 bf_set(lpfc_sli4_sge_last, sgl, 0);
801 sgl->word2 = cpu_to_le32(sgl->word2); 802 sgl->word2 = cpu_to_le32(sgl->word2);
802 sgl->word3 = cpu_to_le32(sgl->word3); 803 sgl->sge_len = cpu_to_le32(sizeof(struct fcp_cmnd));
803 sgl++; 804 sgl++;
804 805
805 /* Setup the physical region for the FCP RSP */ 806 /* Setup the physical region for the FCP RSP */
806 sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_rsp)); 807 sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_rsp));
807 sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_rsp)); 808 sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_rsp));
808 bf_set(lpfc_sli4_sge_len, sgl, sizeof(struct fcp_rsp));
809 bf_set(lpfc_sli4_sge_last, sgl, 1); 809 bf_set(lpfc_sli4_sge_last, sgl, 1);
810 sgl->word2 = cpu_to_le32(sgl->word2); 810 sgl->word2 = cpu_to_le32(sgl->word2);
811 sgl->word3 = cpu_to_le32(sgl->word3); 811 sgl->sge_len = cpu_to_le32(sizeof(struct fcp_rsp));
812 812
813 /* 813 /*
814 * Since the IOCB for the FCP I/O is built into this 814 * Since the IOCB for the FCP I/O is built into this
@@ -839,11 +839,12 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)
839 psb->cur_iocbq.sli4_xritag); 839 psb->cur_iocbq.sli4_xritag);
840 if (status) { 840 if (status) {
841 /* Put this back on the abort scsi list */ 841 /* Put this back on the abort scsi list */
842 psb->status = IOSTAT_LOCAL_REJECT; 842 psb->exch_busy = 1;
843 psb->result = IOERR_ABORT_REQUESTED;
844 rc++; 843 rc++;
845 } else 844 } else {
845 psb->exch_busy = 0;
846 psb->status = IOSTAT_SUCCESS; 846 psb->status = IOSTAT_SUCCESS;
847 }
847 /* Put it back into the SCSI buffer list */ 848 /* Put it back into the SCSI buffer list */
848 lpfc_release_scsi_buf_s4(phba, psb); 849 lpfc_release_scsi_buf_s4(phba, psb);
849 break; 850 break;
@@ -857,11 +858,12 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)
857 list); 858 list);
858 if (status) { 859 if (status) {
859 /* Put this back on the abort scsi list */ 860 /* Put this back on the abort scsi list */
860 psb->status = IOSTAT_LOCAL_REJECT; 861 psb->exch_busy = 1;
861 psb->result = IOERR_ABORT_REQUESTED;
862 rc++; 862 rc++;
863 } else 863 } else {
864 psb->exch_busy = 0;
864 psb->status = IOSTAT_SUCCESS; 865 psb->status = IOSTAT_SUCCESS;
866 }
865 /* Put it back into the SCSI buffer list */ 867 /* Put it back into the SCSI buffer list */
866 lpfc_release_scsi_buf_s4(phba, psb); 868 lpfc_release_scsi_buf_s4(phba, psb);
867 } 869 }
@@ -951,8 +953,7 @@ lpfc_release_scsi_buf_s4(struct lpfc_hba *phba, struct lpfc_scsi_buf *psb)
951{ 953{
952 unsigned long iflag = 0; 954 unsigned long iflag = 0;
953 955
954 if (psb->status == IOSTAT_LOCAL_REJECT 956 if (psb->exch_busy) {
955 && psb->result == IOERR_ABORT_REQUESTED) {
956 spin_lock_irqsave(&phba->sli4_hba.abts_scsi_buf_list_lock, 957 spin_lock_irqsave(&phba->sli4_hba.abts_scsi_buf_list_lock,
957 iflag); 958 iflag);
958 psb->pCmd = NULL; 959 psb->pCmd = NULL;
@@ -1869,7 +1870,6 @@ lpfc_scsi_prep_dma_buf_s4(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd)
1869 scsi_for_each_sg(scsi_cmnd, sgel, nseg, num_bde) { 1870 scsi_for_each_sg(scsi_cmnd, sgel, nseg, num_bde) {
1870 physaddr = sg_dma_address(sgel); 1871 physaddr = sg_dma_address(sgel);
1871 dma_len = sg_dma_len(sgel); 1872 dma_len = sg_dma_len(sgel);
1872 bf_set(lpfc_sli4_sge_len, sgl, sg_dma_len(sgel));
1873 sgl->addr_lo = cpu_to_le32(putPaddrLow(physaddr)); 1873 sgl->addr_lo = cpu_to_le32(putPaddrLow(physaddr));
1874 sgl->addr_hi = cpu_to_le32(putPaddrHigh(physaddr)); 1874 sgl->addr_hi = cpu_to_le32(putPaddrHigh(physaddr));
1875 if ((num_bde + 1) == nseg) 1875 if ((num_bde + 1) == nseg)
@@ -1878,7 +1878,7 @@ lpfc_scsi_prep_dma_buf_s4(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd)
1878 bf_set(lpfc_sli4_sge_last, sgl, 0); 1878 bf_set(lpfc_sli4_sge_last, sgl, 0);
1879 bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); 1879 bf_set(lpfc_sli4_sge_offset, sgl, dma_offset);
1880 sgl->word2 = cpu_to_le32(sgl->word2); 1880 sgl->word2 = cpu_to_le32(sgl->word2);
1881 sgl->word3 = cpu_to_le32(sgl->word3); 1881 sgl->sge_len = cpu_to_le32(dma_len);
1882 dma_offset += dma_len; 1882 dma_offset += dma_len;
1883 sgl++; 1883 sgl++;
1884 } 1884 }
@@ -2221,6 +2221,9 @@ lpfc_scsi_cmd_iocb_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *pIocbIn,
2221 2221
2222 lpfc_cmd->result = pIocbOut->iocb.un.ulpWord[4]; 2222 lpfc_cmd->result = pIocbOut->iocb.un.ulpWord[4];
2223 lpfc_cmd->status = pIocbOut->iocb.ulpStatus; 2223 lpfc_cmd->status = pIocbOut->iocb.ulpStatus;
2224 /* pick up SLI4 exhange busy status from HBA */
2225 lpfc_cmd->exch_busy = pIocbOut->iocb_flag & LPFC_EXCHANGE_BUSY;
2226
2224 if (pnode && NLP_CHK_NODE_ACT(pnode)) 2227 if (pnode && NLP_CHK_NODE_ACT(pnode))
2225 atomic_dec(&pnode->cmd_pending); 2228 atomic_dec(&pnode->cmd_pending);
2226 2229
@@ -2637,6 +2640,7 @@ lpfc_scsi_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
2637 } 2640 }
2638 phba->lpfc_get_scsi_buf = lpfc_get_scsi_buf; 2641 phba->lpfc_get_scsi_buf = lpfc_get_scsi_buf;
2639 phba->lpfc_rampdown_queue_depth = lpfc_rampdown_queue_depth; 2642 phba->lpfc_rampdown_queue_depth = lpfc_rampdown_queue_depth;
2643 phba->lpfc_scsi_cmd_iocb_cmpl = lpfc_scsi_cmd_iocb_cmpl;
2640 return 0; 2644 return 0;
2641} 2645}
2642 2646
@@ -2695,6 +2699,13 @@ lpfc_info(struct Scsi_Host *host)
2695 " port %s", 2699 " port %s",
2696 phba->Port); 2700 phba->Port);
2697 } 2701 }
2702 len = strlen(lpfcinfobuf);
2703 if (phba->sli4_hba.link_state.logical_speed) {
2704 snprintf(lpfcinfobuf + len,
2705 384-len,
2706 " Logical Link Speed: %d Mbps",
2707 phba->sli4_hba.link_state.logical_speed * 10);
2708 }
2698 } 2709 }
2699 return lpfcinfobuf; 2710 return lpfcinfobuf;
2700} 2711}
@@ -2990,6 +3001,7 @@ lpfc_abort_handler(struct scsi_cmnd *cmnd)
2990 3001
2991 /* ABTS WQE must go to the same WQ as the WQE to be aborted */ 3002 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
2992 abtsiocb->fcp_wqidx = iocb->fcp_wqidx; 3003 abtsiocb->fcp_wqidx = iocb->fcp_wqidx;
3004 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
2993 3005
2994 if (lpfc_is_link_up(phba)) 3006 if (lpfc_is_link_up(phba))
2995 icmd->ulpCommand = CMD_ABORT_XRI_CN; 3007 icmd->ulpCommand = CMD_ABORT_XRI_CN;
diff --git a/drivers/scsi/lpfc/lpfc_scsi.h b/drivers/scsi/lpfc/lpfc_scsi.h
index 65dfc8bd5b49..5932273870a5 100644
--- a/drivers/scsi/lpfc/lpfc_scsi.h
+++ b/drivers/scsi/lpfc/lpfc_scsi.h
@@ -118,6 +118,7 @@ struct lpfc_scsi_buf {
118 118
119 uint32_t timeout; 119 uint32_t timeout;
120 120
121 uint16_t exch_busy; /* SLI4 hba reported XB on complete WCQE */
121 uint16_t status; /* From IOCB Word 7- ulpStatus */ 122 uint16_t status; /* From IOCB Word 7- ulpStatus */
122 uint32_t result; /* From IOCB Word 4. */ 123 uint32_t result; /* From IOCB Word 4. */
123 124
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index 589549b2bf0e..35e3b96d4e07 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -580,10 +580,7 @@ __lpfc_sli_release_iocbq_s4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
580 else 580 else
581 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_xritag); 581 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_xritag);
582 if (sglq) { 582 if (sglq) {
583 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED 583 if (iocbq->iocb_flag & LPFC_EXCHANGE_BUSY) {
584 && ((iocbq->iocb.ulpStatus == IOSTAT_LOCAL_REJECT)
585 && (iocbq->iocb.un.ulpWord[4]
586 == IOERR_ABORT_REQUESTED))) {
587 spin_lock_irqsave(&phba->sli4_hba.abts_sgl_list_lock, 584 spin_lock_irqsave(&phba->sli4_hba.abts_sgl_list_lock,
588 iflag); 585 iflag);
589 list_add(&sglq->list, 586 list_add(&sglq->list,
@@ -764,10 +761,6 @@ lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
764 case DSSCMD_IWRITE64_CX: 761 case DSSCMD_IWRITE64_CX:
765 case DSSCMD_IREAD64_CR: 762 case DSSCMD_IREAD64_CR:
766 case DSSCMD_IREAD64_CX: 763 case DSSCMD_IREAD64_CX:
767 case DSSCMD_INVALIDATE_DEK:
768 case DSSCMD_SET_KEK:
769 case DSSCMD_GET_KEK_ID:
770 case DSSCMD_GEN_XFER:
771 type = LPFC_SOL_IOCB; 764 type = LPFC_SOL_IOCB;
772 break; 765 break;
773 case CMD_ABORT_XRI_CN: 766 case CMD_ABORT_XRI_CN:
@@ -1717,6 +1710,7 @@ lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
1717 struct lpfc_dmabuf *mp; 1710 struct lpfc_dmabuf *mp;
1718 uint16_t rpi, vpi; 1711 uint16_t rpi, vpi;
1719 int rc; 1712 int rc;
1713 struct lpfc_vport *vport = pmb->vport;
1720 1714
1721 mp = (struct lpfc_dmabuf *) (pmb->context1); 1715 mp = (struct lpfc_dmabuf *) (pmb->context1);
1722 1716
@@ -1745,6 +1739,18 @@ lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
1745 return; 1739 return;
1746 } 1740 }
1747 1741
1742 /* Unreg VPI, if the REG_VPI succeed after VLink failure */
1743 if ((pmb->u.mb.mbxCommand == MBX_REG_VPI) &&
1744 !(phba->pport->load_flag & FC_UNLOADING) &&
1745 !pmb->u.mb.mbxStatus) {
1746 lpfc_unreg_vpi(phba, pmb->u.mb.un.varRegVpi.vpi, pmb);
1747 pmb->vport = vport;
1748 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1749 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
1750 if (rc != MBX_NOT_FINISHED)
1751 return;
1752 }
1753
1748 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG) 1754 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
1749 lpfc_sli4_mbox_cmd_free(phba, pmb); 1755 lpfc_sli4_mbox_cmd_free(phba, pmb);
1750 else 1756 else
@@ -2228,9 +2234,15 @@ lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2228 * All other are passed to the completion callback. 2234 * All other are passed to the completion callback.
2229 */ 2235 */
2230 if (pring->ringno == LPFC_ELS_RING) { 2236 if (pring->ringno == LPFC_ELS_RING) {
2231 if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) { 2237 if ((phba->sli_rev < LPFC_SLI_REV4) &&
2238 (cmdiocbp->iocb_flag &
2239 LPFC_DRIVER_ABORTED)) {
2240 spin_lock_irqsave(&phba->hbalock,
2241 iflag);
2232 cmdiocbp->iocb_flag &= 2242 cmdiocbp->iocb_flag &=
2233 ~LPFC_DRIVER_ABORTED; 2243 ~LPFC_DRIVER_ABORTED;
2244 spin_unlock_irqrestore(&phba->hbalock,
2245 iflag);
2234 saveq->iocb.ulpStatus = 2246 saveq->iocb.ulpStatus =
2235 IOSTAT_LOCAL_REJECT; 2247 IOSTAT_LOCAL_REJECT;
2236 saveq->iocb.un.ulpWord[4] = 2248 saveq->iocb.un.ulpWord[4] =
@@ -2240,7 +2252,47 @@ lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2240 * of DMAing payload, so don't free data 2252 * of DMAing payload, so don't free data
2241 * buffer till after a hbeat. 2253 * buffer till after a hbeat.
2242 */ 2254 */
2255 spin_lock_irqsave(&phba->hbalock,
2256 iflag);
2243 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE; 2257 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
2258 spin_unlock_irqrestore(&phba->hbalock,
2259 iflag);
2260 }
2261 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2262 (saveq->iocb_flag & LPFC_EXCHANGE_BUSY)) {
2263 /* Set cmdiocb flag for the exchange
2264 * busy so sgl (xri) will not be
2265 * released until the abort xri is
2266 * received from hba, clear the
2267 * LPFC_DRIVER_ABORTED bit in case
2268 * it was driver initiated abort.
2269 */
2270 spin_lock_irqsave(&phba->hbalock,
2271 iflag);
2272 cmdiocbp->iocb_flag &=
2273 ~LPFC_DRIVER_ABORTED;
2274 cmdiocbp->iocb_flag |=
2275 LPFC_EXCHANGE_BUSY;
2276 spin_unlock_irqrestore(&phba->hbalock,
2277 iflag);
2278 cmdiocbp->iocb.ulpStatus =
2279 IOSTAT_LOCAL_REJECT;
2280 cmdiocbp->iocb.un.ulpWord[4] =
2281 IOERR_ABORT_REQUESTED;
2282 /*
2283 * For SLI4, irsiocb contains NO_XRI
2284 * in sli_xritag, it shall not affect
2285 * releasing sgl (xri) process.
2286 */
2287 saveq->iocb.ulpStatus =
2288 IOSTAT_LOCAL_REJECT;
2289 saveq->iocb.un.ulpWord[4] =
2290 IOERR_SLI_ABORTED;
2291 spin_lock_irqsave(&phba->hbalock,
2292 iflag);
2293 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
2294 spin_unlock_irqrestore(&phba->hbalock,
2295 iflag);
2244 } 2296 }
2245 } 2297 }
2246 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq); 2298 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
@@ -5687,19 +5739,19 @@ lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
5687 5739
5688 for (i = 0; i < numBdes; i++) { 5740 for (i = 0; i < numBdes; i++) {
5689 /* Should already be byte swapped. */ 5741 /* Should already be byte swapped. */
5690 sgl->addr_hi = bpl->addrHigh; 5742 sgl->addr_hi = bpl->addrHigh;
5691 sgl->addr_lo = bpl->addrLow; 5743 sgl->addr_lo = bpl->addrLow;
5692 /* swap the size field back to the cpu so we 5744
5693 * can assign it to the sgl.
5694 */
5695 bde.tus.w = le32_to_cpu(bpl->tus.w);
5696 bf_set(lpfc_sli4_sge_len, sgl, bde.tus.f.bdeSize);
5697 if ((i+1) == numBdes) 5745 if ((i+1) == numBdes)
5698 bf_set(lpfc_sli4_sge_last, sgl, 1); 5746 bf_set(lpfc_sli4_sge_last, sgl, 1);
5699 else 5747 else
5700 bf_set(lpfc_sli4_sge_last, sgl, 0); 5748 bf_set(lpfc_sli4_sge_last, sgl, 0);
5701 sgl->word2 = cpu_to_le32(sgl->word2); 5749 sgl->word2 = cpu_to_le32(sgl->word2);
5702 sgl->word3 = cpu_to_le32(sgl->word3); 5750 /* swap the size field back to the cpu so we
5751 * can assign it to the sgl.
5752 */
5753 bde.tus.w = le32_to_cpu(bpl->tus.w);
5754 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
5703 bpl++; 5755 bpl++;
5704 sgl++; 5756 sgl++;
5705 } 5757 }
@@ -5712,11 +5764,10 @@ lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
5712 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh); 5764 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
5713 sgl->addr_lo = 5765 sgl->addr_lo =
5714 cpu_to_le32(icmd->un.genreq64.bdl.addrLow); 5766 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
5715 bf_set(lpfc_sli4_sge_len, sgl,
5716 icmd->un.genreq64.bdl.bdeSize);
5717 bf_set(lpfc_sli4_sge_last, sgl, 1); 5767 bf_set(lpfc_sli4_sge_last, sgl, 1);
5718 sgl->word2 = cpu_to_le32(sgl->word2); 5768 sgl->word2 = cpu_to_le32(sgl->word2);
5719 sgl->word3 = cpu_to_le32(sgl->word3); 5769 sgl->sge_len =
5770 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
5720 } 5771 }
5721 return sglq->sli4_xritag; 5772 return sglq->sli4_xritag;
5722} 5773}
@@ -5987,12 +6038,10 @@ lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
5987 else 6038 else
5988 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0); 6039 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0);
5989 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG); 6040 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG);
5990 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
5991 wqe->words[5] = 0; 6041 wqe->words[5] = 0;
5992 bf_set(lpfc_wqe_gen_ct, &wqe->generic, 6042 bf_set(lpfc_wqe_gen_ct, &wqe->generic,
5993 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l)); 6043 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
5994 abort_tag = iocbq->iocb.un.acxri.abortIoTag; 6044 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
5995 wqe->generic.abort_tag = abort_tag;
5996 /* 6045 /*
5997 * The abort handler will send us CMD_ABORT_XRI_CN or 6046 * The abort handler will send us CMD_ABORT_XRI_CN or
5998 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX 6047 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX
@@ -6121,15 +6170,15 @@ __lpfc_sli_issue_iocb_s4(struct lpfc_hba *phba, uint32_t ring_number,
6121 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe)) 6170 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe))
6122 return IOCB_ERROR; 6171 return IOCB_ERROR;
6123 6172
6124 if (piocb->iocb_flag & LPFC_IO_FCP) { 6173 if ((piocb->iocb_flag & LPFC_IO_FCP) ||
6174 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
6125 /* 6175 /*
6126 * For FCP command IOCB, get a new WQ index to distribute 6176 * For FCP command IOCB, get a new WQ index to distribute
6127 * WQE across the WQsr. On the other hand, for abort IOCB, 6177 * WQE across the WQsr. On the other hand, for abort IOCB,
6128 * it carries the same WQ index to the original command 6178 * it carries the same WQ index to the original command
6129 * IOCB. 6179 * IOCB.
6130 */ 6180 */
6131 if ((piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) && 6181 if (piocb->iocb_flag & LPFC_IO_FCP)
6132 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN))
6133 piocb->fcp_wqidx = lpfc_sli4_scmd_to_wqidx_distr(phba); 6182 piocb->fcp_wqidx = lpfc_sli4_scmd_to_wqidx_distr(phba);
6134 if (lpfc_sli4_wq_put(phba->sli4_hba.fcp_wq[piocb->fcp_wqidx], 6183 if (lpfc_sli4_wq_put(phba->sli4_hba.fcp_wq[piocb->fcp_wqidx],
6135 &wqe)) 6184 &wqe))
@@ -7004,7 +7053,14 @@ lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
7004 abort_iocb->iocb.ulpContext != abort_context || 7053 abort_iocb->iocb.ulpContext != abort_context ||
7005 (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0) 7054 (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
7006 spin_unlock_irq(&phba->hbalock); 7055 spin_unlock_irq(&phba->hbalock);
7007 else { 7056 else if (phba->sli_rev < LPFC_SLI_REV4) {
7057 /*
7058 * leave the SLI4 aborted command on the txcmplq
7059 * list and the command complete WCQE's XB bit
7060 * will tell whether the SGL (XRI) can be released
7061 * immediately or to the aborted SGL list for the
7062 * following abort XRI from the HBA.
7063 */
7008 list_del_init(&abort_iocb->list); 7064 list_del_init(&abort_iocb->list);
7009 pring->txcmplq_cnt--; 7065 pring->txcmplq_cnt--;
7010 spin_unlock_irq(&phba->hbalock); 7066 spin_unlock_irq(&phba->hbalock);
@@ -7013,11 +7069,13 @@ lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
7013 * payload, so don't free data buffer till after 7069 * payload, so don't free data buffer till after
7014 * a hbeat. 7070 * a hbeat.
7015 */ 7071 */
7072 spin_lock_irq(&phba->hbalock);
7016 abort_iocb->iocb_flag |= LPFC_DELAY_MEM_FREE; 7073 abort_iocb->iocb_flag |= LPFC_DELAY_MEM_FREE;
7017
7018 abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED; 7074 abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
7075 spin_unlock_irq(&phba->hbalock);
7076
7019 abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT; 7077 abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
7020 abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED; 7078 abort_iocb->iocb.un.ulpWord[4] = IOERR_ABORT_REQUESTED;
7021 (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb); 7079 (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
7022 } 7080 }
7023 } 7081 }
@@ -7106,7 +7164,7 @@ lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
7106 return 0; 7164 return 0;
7107 7165
7108 /* This signals the response to set the correct status 7166 /* This signals the response to set the correct status
7109 * before calling the completion handler. 7167 * before calling the completion handler
7110 */ 7168 */
7111 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED; 7169 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
7112 7170
@@ -7124,6 +7182,8 @@ lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
7124 7182
7125 /* ABTS WQE must go to the same WQ as the WQE to be aborted */ 7183 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
7126 abtsiocbp->fcp_wqidx = cmdiocb->fcp_wqidx; 7184 abtsiocbp->fcp_wqidx = cmdiocb->fcp_wqidx;
7185 if (cmdiocb->iocb_flag & LPFC_IO_FCP)
7186 abtsiocbp->iocb_flag |= LPFC_USE_FCPWQIDX;
7127 7187
7128 if (phba->link_state >= LPFC_LINK_UP) 7188 if (phba->link_state >= LPFC_LINK_UP)
7129 iabt->ulpCommand = CMD_ABORT_XRI_CN; 7189 iabt->ulpCommand = CMD_ABORT_XRI_CN;
@@ -7330,6 +7390,8 @@ lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
7330 7390
7331 /* ABTS WQE must go to the same WQ as the WQE to be aborted */ 7391 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
7332 abtsiocb->fcp_wqidx = iocbq->fcp_wqidx; 7392 abtsiocb->fcp_wqidx = iocbq->fcp_wqidx;
7393 if (iocbq->iocb_flag & LPFC_IO_FCP)
7394 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
7333 7395
7334 if (lpfc_is_link_up(phba)) 7396 if (lpfc_is_link_up(phba))
7335 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN; 7397 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
@@ -8359,11 +8421,24 @@ void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba)
8359 } 8421 }
8360} 8422}
8361 8423
8424/**
8425 * lpfc_sli4_iocb_param_transfer - Transfer pIocbOut and cmpl status to pIocbIn
8426 * @phba: pointer to lpfc hba data structure
8427 * @pIocbIn: pointer to the rspiocbq
8428 * @pIocbOut: pointer to the cmdiocbq
8429 * @wcqe: pointer to the complete wcqe
8430 *
8431 * This routine transfers the fields of a command iocbq to a response iocbq
8432 * by copying all the IOCB fields from command iocbq and transferring the
8433 * completion status information from the complete wcqe.
8434 **/
8362static void 8435static void
8363lpfc_sli4_iocb_param_transfer(struct lpfc_iocbq *pIocbIn, 8436lpfc_sli4_iocb_param_transfer(struct lpfc_hba *phba,
8437 struct lpfc_iocbq *pIocbIn,
8364 struct lpfc_iocbq *pIocbOut, 8438 struct lpfc_iocbq *pIocbOut,
8365 struct lpfc_wcqe_complete *wcqe) 8439 struct lpfc_wcqe_complete *wcqe)
8366{ 8440{
8441 unsigned long iflags;
8367 size_t offset = offsetof(struct lpfc_iocbq, iocb); 8442 size_t offset = offsetof(struct lpfc_iocbq, iocb);
8368 8443
8369 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset, 8444 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset,
@@ -8377,8 +8452,17 @@ lpfc_sli4_iocb_param_transfer(struct lpfc_iocbq *pIocbIn,
8377 wcqe->total_data_placed; 8452 wcqe->total_data_placed;
8378 else 8453 else
8379 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter; 8454 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
8380 else 8455 else {
8381 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter; 8456 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
8457 pIocbIn->iocb.un.genreq64.bdl.bdeSize = wcqe->total_data_placed;
8458 }
8459
8460 /* Pick up HBA exchange busy condition */
8461 if (bf_get(lpfc_wcqe_c_xb, wcqe)) {
8462 spin_lock_irqsave(&phba->hbalock, iflags);
8463 pIocbIn->iocb_flag |= LPFC_EXCHANGE_BUSY;
8464 spin_unlock_irqrestore(&phba->hbalock, iflags);
8465 }
8382} 8466}
8383 8467
8384/** 8468/**
@@ -8419,7 +8503,7 @@ lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *phba,
8419 } 8503 }
8420 8504
8421 /* Fake the irspiocbq and copy necessary response information */ 8505 /* Fake the irspiocbq and copy necessary response information */
8422 lpfc_sli4_iocb_param_transfer(irspiocbq, cmdiocbq, wcqe); 8506 lpfc_sli4_iocb_param_transfer(phba, irspiocbq, cmdiocbq, wcqe);
8423 8507
8424 return irspiocbq; 8508 return irspiocbq;
8425} 8509}
@@ -8849,8 +8933,7 @@ lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe)
8849 int ecount = 0; 8933 int ecount = 0;
8850 uint16_t cqid; 8934 uint16_t cqid;
8851 8935
8852 if (bf_get(lpfc_eqe_major_code, eqe) != 0 || 8936 if (bf_get(lpfc_eqe_major_code, eqe) != 0) {
8853 bf_get(lpfc_eqe_minor_code, eqe) != 0) {
8854 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 8937 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8855 "0359 Not a valid slow-path completion " 8938 "0359 Not a valid slow-path completion "
8856 "event: majorcode=x%x, minorcode=x%x\n", 8939 "event: majorcode=x%x, minorcode=x%x\n",
@@ -8976,7 +9059,7 @@ lpfc_sli4_fp_handle_fcp_wcqe(struct lpfc_hba *phba,
8976 } 9059 }
8977 9060
8978 /* Fake the irspiocb and copy necessary response information */ 9061 /* Fake the irspiocb and copy necessary response information */
8979 lpfc_sli4_iocb_param_transfer(&irspiocbq, cmdiocbq, wcqe); 9062 lpfc_sli4_iocb_param_transfer(phba, &irspiocbq, cmdiocbq, wcqe);
8980 9063
8981 /* Pass the cmd_iocb and the rsp state to the upper layer */ 9064 /* Pass the cmd_iocb and the rsp state to the upper layer */
8982 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq); 9065 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq);
@@ -9082,8 +9165,7 @@ lpfc_sli4_fp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
9082 uint16_t cqid; 9165 uint16_t cqid;
9083 int ecount = 0; 9166 int ecount = 0;
9084 9167
9085 if (unlikely(bf_get(lpfc_eqe_major_code, eqe) != 0) || 9168 if (unlikely(bf_get(lpfc_eqe_major_code, eqe) != 0)) {
9086 unlikely(bf_get(lpfc_eqe_minor_code, eqe) != 0)) {
9087 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 9169 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9088 "0366 Not a valid fast-path completion " 9170 "0366 Not a valid fast-path completion "
9089 "event: majorcode=x%x, minorcode=x%x\n", 9171 "event: majorcode=x%x, minorcode=x%x\n",
@@ -11871,12 +11953,6 @@ lpfc_sli4_read_fcf_record(struct lpfc_hba *phba, uint16_t fcf_index)
11871{ 11953{
11872 int rc = 0, error; 11954 int rc = 0, error;
11873 LPFC_MBOXQ_t *mboxq; 11955 LPFC_MBOXQ_t *mboxq;
11874 void *virt_addr;
11875 dma_addr_t phys_addr;
11876 uint8_t *bytep;
11877 struct lpfc_mbx_sge sge;
11878 uint32_t alloc_len, req_len;
11879 struct lpfc_mbx_read_fcf_tbl *read_fcf;
11880 11956
11881 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag; 11957 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag;
11882 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 11958 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
@@ -11887,43 +11963,19 @@ lpfc_sli4_read_fcf_record(struct lpfc_hba *phba, uint16_t fcf_index)
11887 error = -ENOMEM; 11963 error = -ENOMEM;
11888 goto fail_fcfscan; 11964 goto fail_fcfscan;
11889 } 11965 }
11890 11966 /* Construct the read FCF record mailbox command */
11891 req_len = sizeof(struct fcf_record) + 11967 rc = lpfc_sli4_mbx_read_fcf_record(phba, mboxq, fcf_index);
11892 sizeof(union lpfc_sli4_cfg_shdr) + 2 * sizeof(uint32_t); 11968 if (rc) {
11893 11969 error = -EINVAL;
11894 /* Set up READ_FCF SLI4_CONFIG mailbox-ioctl command */
11895 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
11896 LPFC_MBOX_OPCODE_FCOE_READ_FCF_TABLE, req_len,
11897 LPFC_SLI4_MBX_NEMBED);
11898
11899 if (alloc_len < req_len) {
11900 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11901 "0291 Allocated DMA memory size (x%x) is "
11902 "less than the requested DMA memory "
11903 "size (x%x)\n", alloc_len, req_len);
11904 error = -ENOMEM;
11905 goto fail_fcfscan; 11970 goto fail_fcfscan;
11906 } 11971 }
11907 11972 /* Issue the mailbox command asynchronously */
11908 /* Get the first SGE entry from the non-embedded DMA memory. This
11909 * routine only uses a single SGE.
11910 */
11911 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
11912 phys_addr = getPaddr(sge.pa_hi, sge.pa_lo);
11913 virt_addr = mboxq->sge_array->addr[0];
11914 read_fcf = (struct lpfc_mbx_read_fcf_tbl *)virt_addr;
11915
11916 /* Set up command fields */
11917 bf_set(lpfc_mbx_read_fcf_tbl_indx, &read_fcf->u.request, fcf_index);
11918 /* Perform necessary endian conversion */
11919 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
11920 lpfc_sli_pcimem_bcopy(bytep, bytep, sizeof(uint32_t));
11921 mboxq->vport = phba->pport; 11973 mboxq->vport = phba->pport;
11922 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_record; 11974 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_record;
11923 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT); 11975 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
11924 if (rc == MBX_NOT_FINISHED) { 11976 if (rc == MBX_NOT_FINISHED)
11925 error = -EIO; 11977 error = -EIO;
11926 } else { 11978 else {
11927 spin_lock_irq(&phba->hbalock); 11979 spin_lock_irq(&phba->hbalock);
11928 phba->hba_flag |= FCF_DISC_INPROGRESS; 11980 phba->hba_flag |= FCF_DISC_INPROGRESS;
11929 spin_unlock_irq(&phba->hbalock); 11981 spin_unlock_irq(&phba->hbalock);
@@ -11942,6 +11994,90 @@ fail_fcfscan:
11942} 11994}
11943 11995
11944/** 11996/**
11997 * lpfc_mbx_cmpl_redisc_fcf_table - completion routine for rediscover FCF table
11998 * @phba: pointer to lpfc hba data structure.
11999 *
12000 * This routine is the completion routine for the rediscover FCF table mailbox
12001 * command. If the mailbox command returned failure, it will try to stop the
12002 * FCF rediscover wait timer.
12003 **/
12004void
12005lpfc_mbx_cmpl_redisc_fcf_table(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
12006{
12007 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
12008 uint32_t shdr_status, shdr_add_status;
12009
12010 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
12011
12012 shdr_status = bf_get(lpfc_mbox_hdr_status,
12013 &redisc_fcf->header.cfg_shdr.response);
12014 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
12015 &redisc_fcf->header.cfg_shdr.response);
12016 if (shdr_status || shdr_add_status) {
12017 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
12018 "2746 Requesting for FCF rediscovery failed "
12019 "status x%x add_status x%x\n",
12020 shdr_status, shdr_add_status);
12021 /*
12022 * Request failed, last resort to re-try current
12023 * registered FCF entry
12024 */
12025 lpfc_retry_pport_discovery(phba);
12026 } else
12027 /*
12028 * Start FCF rediscovery wait timer for pending FCF
12029 * before rescan FCF record table.
12030 */
12031 lpfc_fcf_redisc_wait_start_timer(phba);
12032
12033 mempool_free(mbox, phba->mbox_mem_pool);
12034}
12035
12036/**
12037 * lpfc_sli4_redisc_all_fcf - Request to rediscover entire FCF table by port.
12038 * @phba: pointer to lpfc hba data structure.
12039 *
12040 * This routine is invoked to request for rediscovery of the entire FCF table
12041 * by the port.
12042 **/
12043int
12044lpfc_sli4_redisc_fcf_table(struct lpfc_hba *phba)
12045{
12046 LPFC_MBOXQ_t *mbox;
12047 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
12048 int rc, length;
12049
12050 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
12051 if (!mbox) {
12052 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
12053 "2745 Failed to allocate mbox for "
12054 "requesting FCF rediscover.\n");
12055 return -ENOMEM;
12056 }
12057
12058 length = (sizeof(struct lpfc_mbx_redisc_fcf_tbl) -
12059 sizeof(struct lpfc_sli4_cfg_mhdr));
12060 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
12061 LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF,
12062 length, LPFC_SLI4_MBX_EMBED);
12063
12064 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
12065 /* Set count to 0 for invalidating the entire FCF database */
12066 bf_set(lpfc_mbx_redisc_fcf_count, redisc_fcf, 0);
12067
12068 /* Issue the mailbox command asynchronously */
12069 mbox->vport = phba->pport;
12070 mbox->mbox_cmpl = lpfc_mbx_cmpl_redisc_fcf_table;
12071 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
12072
12073 if (rc == MBX_NOT_FINISHED) {
12074 mempool_free(mbox, phba->mbox_mem_pool);
12075 return -EIO;
12076 }
12077 return 0;
12078}
12079
12080/**
11945 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled. 12081 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled.
11946 * @phba: pointer to lpfc hba data structure. 12082 * @phba: pointer to lpfc hba data structure.
11947 * 12083 *
@@ -12069,3 +12205,48 @@ out:
12069 kfree(rgn23_data); 12205 kfree(rgn23_data);
12070 return; 12206 return;
12071} 12207}
12208
12209/**
12210 * lpfc_cleanup_pending_mbox - Free up vport discovery mailbox commands.
12211 * @vport: pointer to vport data structure.
12212 *
12213 * This function iterate through the mailboxq and clean up all REG_LOGIN
12214 * and REG_VPI mailbox commands associated with the vport. This function
12215 * is called when driver want to restart discovery of the vport due to
12216 * a Clear Virtual Link event.
12217 **/
12218void
12219lpfc_cleanup_pending_mbox(struct lpfc_vport *vport)
12220{
12221 struct lpfc_hba *phba = vport->phba;
12222 LPFC_MBOXQ_t *mb, *nextmb;
12223 struct lpfc_dmabuf *mp;
12224
12225 spin_lock_irq(&phba->hbalock);
12226 list_for_each_entry_safe(mb, nextmb, &phba->sli.mboxq, list) {
12227 if (mb->vport != vport)
12228 continue;
12229
12230 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
12231 (mb->u.mb.mbxCommand != MBX_REG_VPI))
12232 continue;
12233
12234 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
12235 mp = (struct lpfc_dmabuf *) (mb->context1);
12236 if (mp) {
12237 __lpfc_mbuf_free(phba, mp->virt, mp->phys);
12238 kfree(mp);
12239 }
12240 }
12241 list_del(&mb->list);
12242 mempool_free(mb, phba->mbox_mem_pool);
12243 }
12244 mb = phba->sli.mbox_active;
12245 if (mb && (mb->vport == vport)) {
12246 if ((mb->u.mb.mbxCommand == MBX_REG_LOGIN64) ||
12247 (mb->u.mb.mbxCommand == MBX_REG_VPI))
12248 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
12249 }
12250 spin_unlock_irq(&phba->hbalock);
12251}
12252
diff --git a/drivers/scsi/lpfc/lpfc_sli.h b/drivers/scsi/lpfc/lpfc_sli.h
index ba38de3c28f1..dfcf5437d1f5 100644
--- a/drivers/scsi/lpfc/lpfc_sli.h
+++ b/drivers/scsi/lpfc/lpfc_sli.h
@@ -53,17 +53,19 @@ struct lpfc_iocbq {
53 53
54 IOCB_t iocb; /* IOCB cmd */ 54 IOCB_t iocb; /* IOCB cmd */
55 uint8_t retry; /* retry counter for IOCB cmd - if needed */ 55 uint8_t retry; /* retry counter for IOCB cmd - if needed */
56 uint8_t iocb_flag; 56 uint16_t iocb_flag;
57#define LPFC_IO_LIBDFC 1 /* libdfc iocb */ 57#define LPFC_IO_LIBDFC 1 /* libdfc iocb */
58#define LPFC_IO_WAKE 2 /* High Priority Queue signal flag */ 58#define LPFC_IO_WAKE 2 /* High Priority Queue signal flag */
59#define LPFC_IO_FCP 4 /* FCP command -- iocbq in scsi_buf */ 59#define LPFC_IO_FCP 4 /* FCP command -- iocbq in scsi_buf */
60#define LPFC_DRIVER_ABORTED 8 /* driver aborted this request */ 60#define LPFC_DRIVER_ABORTED 8 /* driver aborted this request */
61#define LPFC_IO_FABRIC 0x10 /* Iocb send using fabric scheduler */ 61#define LPFC_IO_FABRIC 0x10 /* Iocb send using fabric scheduler */
62#define LPFC_DELAY_MEM_FREE 0x20 /* Defer free'ing of FC data */ 62#define LPFC_DELAY_MEM_FREE 0x20 /* Defer free'ing of FC data */
63#define LPFC_FIP_ELS_ID_MASK 0xc0 /* ELS_ID range 0-3 */ 63#define LPFC_EXCHANGE_BUSY 0x40 /* SLI4 hba reported XB in response */
64#define LPFC_FIP_ELS_ID_SHIFT 6 64#define LPFC_USE_FCPWQIDX 0x80 /* Submit to specified FCPWQ index */
65
66#define LPFC_FIP_ELS_ID_MASK 0xc000 /* ELS_ID range 0-3, non-shifted mask */
67#define LPFC_FIP_ELS_ID_SHIFT 14
65 68
66 uint8_t abort_count;
67 uint8_t rsvd2; 69 uint8_t rsvd2;
68 uint32_t drvrTimeout; /* driver timeout in seconds */ 70 uint32_t drvrTimeout; /* driver timeout in seconds */
69 uint32_t fcp_wqidx; /* index to FCP work queue */ 71 uint32_t fcp_wqidx; /* index to FCP work queue */
diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h
index 44e5f574236b..86308836600f 100644
--- a/drivers/scsi/lpfc/lpfc_sli4.h
+++ b/drivers/scsi/lpfc/lpfc_sli4.h
@@ -22,6 +22,10 @@
22#define LPFC_RELEASE_NOTIFICATION_INTERVAL 32 22#define LPFC_RELEASE_NOTIFICATION_INTERVAL 32
23#define LPFC_GET_QE_REL_INT 32 23#define LPFC_GET_QE_REL_INT 32
24#define LPFC_RPI_LOW_WATER_MARK 10 24#define LPFC_RPI_LOW_WATER_MARK 10
25
26/* Amount of time in seconds for waiting FCF rediscovery to complete */
27#define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */
28
25/* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ 29/* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
26#define LPFC_NEMBED_MBOX_SGL_CNT 254 30#define LPFC_NEMBED_MBOX_SGL_CNT 254
27 31
@@ -126,24 +130,36 @@ struct lpfc_sli4_link {
126 uint8_t status; 130 uint8_t status;
127 uint8_t physical; 131 uint8_t physical;
128 uint8_t fault; 132 uint8_t fault;
133 uint16_t logical_speed;
129}; 134};
130 135
131struct lpfc_fcf { 136struct lpfc_fcf_rec {
132 uint8_t fabric_name[8]; 137 uint8_t fabric_name[8];
133 uint8_t switch_name[8]; 138 uint8_t switch_name[8];
134 uint8_t mac_addr[6]; 139 uint8_t mac_addr[6];
135 uint16_t fcf_indx; 140 uint16_t fcf_indx;
141 uint32_t priority;
142 uint16_t vlan_id;
143 uint32_t addr_mode;
144 uint32_t flag;
145#define BOOT_ENABLE 0x01
146#define RECORD_VALID 0x02
147};
148
149struct lpfc_fcf {
136 uint16_t fcfi; 150 uint16_t fcfi;
137 uint32_t fcf_flag; 151 uint32_t fcf_flag;
138#define FCF_AVAILABLE 0x01 /* FCF available for discovery */ 152#define FCF_AVAILABLE 0x01 /* FCF available for discovery */
139#define FCF_REGISTERED 0x02 /* FCF registered with FW */ 153#define FCF_REGISTERED 0x02 /* FCF registered with FW */
140#define FCF_DISCOVERED 0x04 /* FCF discovery started */ 154#define FCF_SCAN_DONE 0x04 /* FCF table scan done */
141#define FCF_BOOT_ENABLE 0x08 /* Boot bios use this FCF */ 155#define FCF_IN_USE 0x08 /* Atleast one discovery completed */
142#define FCF_IN_USE 0x10 /* Atleast one discovery completed */ 156#define FCF_REDISC_PEND 0x10 /* FCF rediscovery pending */
143#define FCF_VALID_VLAN 0x20 /* Use the vlan id specified */ 157#define FCF_REDISC_EVT 0x20 /* FCF rediscovery event to worker thread */
144 uint32_t priority; 158#define FCF_REDISC_FOV 0x40 /* Post FCF rediscovery fast failover */
145 uint32_t addr_mode; 159 uint32_t addr_mode;
146 uint16_t vlan_id; 160 struct lpfc_fcf_rec current_rec;
161 struct lpfc_fcf_rec failover_rec;
162 struct timer_list redisc_wait;
147}; 163};
148 164
149#define LPFC_REGION23_SIGNATURE "RG23" 165#define LPFC_REGION23_SIGNATURE "RG23"
@@ -248,7 +264,10 @@ struct lpfc_bmbx {
248#define SLI4_CT_VFI 2 264#define SLI4_CT_VFI 2
249#define SLI4_CT_FCFI 3 265#define SLI4_CT_FCFI 3
250 266
251#define LPFC_SLI4_MAX_SEGMENT_SIZE 0x10000 267#define LPFC_SLI4_FL1_MAX_SEGMENT_SIZE 0x10000
268#define LPFC_SLI4_FL1_MAX_BUF_SIZE 0X2000
269#define LPFC_SLI4_MIN_BUF_SIZE 0x400
270#define LPFC_SLI4_MAX_BUF_SIZE 0x20000
252 271
253/* 272/*
254 * SLI4 specific data structures 273 * SLI4 specific data structures
@@ -282,6 +301,42 @@ struct lpfc_fcp_eq_hdl {
282 struct lpfc_hba *phba; 301 struct lpfc_hba *phba;
283}; 302};
284 303
304/* Port Capabilities for SLI4 Parameters */
305struct lpfc_pc_sli4_params {
306 uint32_t supported;
307 uint32_t if_type;
308 uint32_t sli_rev;
309 uint32_t sli_family;
310 uint32_t featurelevel_1;
311 uint32_t featurelevel_2;
312 uint32_t proto_types;
313#define LPFC_SLI4_PROTO_FCOE 0x0000001
314#define LPFC_SLI4_PROTO_FC 0x0000002
315#define LPFC_SLI4_PROTO_NIC 0x0000004
316#define LPFC_SLI4_PROTO_ISCSI 0x0000008
317#define LPFC_SLI4_PROTO_RDMA 0x0000010
318 uint32_t sge_supp_len;
319 uint32_t if_page_sz;
320 uint32_t rq_db_window;
321 uint32_t loopbk_scope;
322 uint32_t eq_pages_max;
323 uint32_t eqe_size;
324 uint32_t cq_pages_max;
325 uint32_t cqe_size;
326 uint32_t mq_pages_max;
327 uint32_t mqe_size;
328 uint32_t mq_elem_cnt;
329 uint32_t wq_pages_max;
330 uint32_t wqe_size;
331 uint32_t rq_pages_max;
332 uint32_t rqe_size;
333 uint32_t hdr_pages_max;
334 uint32_t hdr_size;
335 uint32_t hdr_pp_align;
336 uint32_t sgl_pages_max;
337 uint32_t sgl_pp_align;
338};
339
285/* SLI4 HBA data structure entries */ 340/* SLI4 HBA data structure entries */
286struct lpfc_sli4_hba { 341struct lpfc_sli4_hba {
287 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for 342 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
@@ -295,7 +350,7 @@ struct lpfc_sli4_hba {
295 void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */ 350 void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */
296 void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */ 351 void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */
297 void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */ 352 void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */
298 void __iomem *SCRATCHPADregaddr; /* Address to scratchpad register */ 353 void __iomem *SLIINTFregaddr; /* Address to SLI_INTF register */
299 /* BAR1 FCoE function CSR register memory map */ 354 /* BAR1 FCoE function CSR register memory map */
300 void __iomem *STAregaddr; /* Address to HST_STATE register */ 355 void __iomem *STAregaddr; /* Address to HST_STATE register */
301 void __iomem *ISRregaddr; /* Address to HST_ISR register */ 356 void __iomem *ISRregaddr; /* Address to HST_ISR register */
@@ -310,6 +365,8 @@ struct lpfc_sli4_hba {
310 365
311 uint32_t ue_mask_lo; 366 uint32_t ue_mask_lo;
312 uint32_t ue_mask_hi; 367 uint32_t ue_mask_hi;
368 struct lpfc_register sli_intf;
369 struct lpfc_pc_sli4_params pc_sli4_params;
313 struct msix_entry *msix_entries; 370 struct msix_entry *msix_entries;
314 uint32_t cfg_eqn; 371 uint32_t cfg_eqn;
315 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */ 372 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */
@@ -406,6 +463,8 @@ void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
406void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); 463void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
407void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, 464void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
408 struct lpfc_mbx_sge *); 465 struct lpfc_mbx_sge *);
466int lpfc_sli4_mbx_read_fcf_record(struct lpfc_hba *, struct lpfcMboxq *,
467 uint16_t);
409 468
410void lpfc_sli4_hba_reset(struct lpfc_hba *); 469void lpfc_sli4_hba_reset(struct lpfc_hba *);
411struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t, 470struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
@@ -448,6 +507,7 @@ int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
448void lpfc_sli4_free_rpi(struct lpfc_hba *, int); 507void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
449void lpfc_sli4_remove_rpis(struct lpfc_hba *); 508void lpfc_sli4_remove_rpis(struct lpfc_hba *);
450void lpfc_sli4_async_event_proc(struct lpfc_hba *); 509void lpfc_sli4_async_event_proc(struct lpfc_hba *);
510void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
451int lpfc_sli4_resume_rpi(struct lpfc_nodelist *); 511int lpfc_sli4_resume_rpi(struct lpfc_nodelist *);
452void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); 512void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
453void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); 513void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
diff --git a/drivers/scsi/lpfc/lpfc_version.h b/drivers/scsi/lpfc/lpfc_version.h
index 792f72263f1a..ac276aa46fba 100644
--- a/drivers/scsi/lpfc/lpfc_version.h
+++ b/drivers/scsi/lpfc/lpfc_version.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2009 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2010 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -18,7 +18,7 @@
18 * included with this package. * 18 * included with this package. *
19 *******************************************************************/ 19 *******************************************************************/
20 20
21#define LPFC_DRIVER_VERSION "8.3.7" 21#define LPFC_DRIVER_VERSION "8.3.9"
22#define LPFC_DRIVER_NAME "lpfc" 22#define LPFC_DRIVER_NAME "lpfc"
23#define LPFC_SP_DRIVER_HANDLER_NAME "lpfc:sp" 23#define LPFC_SP_DRIVER_HANDLER_NAME "lpfc:sp"
24#define LPFC_FP_DRIVER_HANDLER_NAME "lpfc:fp" 24#define LPFC_FP_DRIVER_HANDLER_NAME "lpfc:fp"
diff --git a/drivers/scsi/lpfc/lpfc_vport.c b/drivers/scsi/lpfc/lpfc_vport.c
index e3c7fa642306..dc86e873102a 100644
--- a/drivers/scsi/lpfc/lpfc_vport.c
+++ b/drivers/scsi/lpfc/lpfc_vport.c
@@ -389,7 +389,7 @@ lpfc_vport_create(struct fc_vport *fc_vport, bool disable)
389 * by the port. 389 * by the port.
390 */ 390 */
391 if ((phba->sli_rev == LPFC_SLI_REV4) && 391 if ((phba->sli_rev == LPFC_SLI_REV4) &&
392 (pport->vpi_state & LPFC_VPI_REGISTERED)) { 392 (pport->fc_flag & FC_VFI_REGISTERED)) {
393 rc = lpfc_sli4_init_vpi(phba, vpi); 393 rc = lpfc_sli4_init_vpi(phba, vpi);
394 if (rc) { 394 if (rc) {
395 lpfc_printf_log(phba, KERN_ERR, LOG_VPORT, 395 lpfc_printf_log(phba, KERN_ERR, LOG_VPORT,
@@ -505,6 +505,7 @@ enable_vport(struct fc_vport *fc_vport)
505 struct lpfc_vport *vport = *(struct lpfc_vport **)fc_vport->dd_data; 505 struct lpfc_vport *vport = *(struct lpfc_vport **)fc_vport->dd_data;
506 struct lpfc_hba *phba = vport->phba; 506 struct lpfc_hba *phba = vport->phba;
507 struct lpfc_nodelist *ndlp = NULL; 507 struct lpfc_nodelist *ndlp = NULL;
508 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
508 509
509 if ((phba->link_state < LPFC_LINK_UP) || 510 if ((phba->link_state < LPFC_LINK_UP) ||
510 (phba->fc_topology == TOPOLOGY_LOOP)) { 511 (phba->fc_topology == TOPOLOGY_LOOP)) {
@@ -512,10 +513,10 @@ enable_vport(struct fc_vport *fc_vport)
512 return VPORT_OK; 513 return VPORT_OK;
513 } 514 }
514 515
515 spin_lock_irq(&phba->hbalock); 516 spin_lock_irq(shost->host_lock);
516 vport->load_flag |= FC_LOADING; 517 vport->load_flag |= FC_LOADING;
517 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 518 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
518 spin_unlock_irq(&phba->hbalock); 519 spin_unlock_irq(shost->host_lock);
519 520
520 /* Use the Physical nodes Fabric NDLP to determine if the link is 521 /* Use the Physical nodes Fabric NDLP to determine if the link is
521 * up and ready to FDISC. 522 * up and ready to FDISC.
diff --git a/drivers/scsi/mac_esp.c b/drivers/scsi/mac_esp.c
index c24e86f07804..dd808ae942a1 100644
--- a/drivers/scsi/mac_esp.c
+++ b/drivers/scsi/mac_esp.c
@@ -22,7 +22,6 @@
22 22
23#include <asm/irq.h> 23#include <asm/irq.h>
24#include <asm/dma.h> 24#include <asm/dma.h>
25
26#include <asm/macints.h> 25#include <asm/macints.h>
27#include <asm/macintosh.h> 26#include <asm/macintosh.h>
28 27
@@ -279,24 +278,27 @@ static void mac_esp_send_pdma_cmd(struct esp *esp, u32 addr, u32 esp_count,
279 * Programmed IO routines follow. 278 * Programmed IO routines follow.
280 */ 279 */
281 280
282static inline int mac_esp_wait_for_fifo(struct esp *esp) 281static inline unsigned int mac_esp_wait_for_fifo(struct esp *esp)
283{ 282{
284 int i = 500000; 283 int i = 500000;
285 284
286 do { 285 do {
287 if (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) 286 unsigned int fbytes = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
288 return 0; 287
288 if (fbytes)
289 return fbytes;
289 290
290 udelay(2); 291 udelay(2);
291 } while (--i); 292 } while (--i);
292 293
293 printk(KERN_ERR PFX "FIFO is empty (sreg %02x)\n", 294 printk(KERN_ERR PFX "FIFO is empty (sreg %02x)\n",
294 esp_read8(ESP_STATUS)); 295 esp_read8(ESP_STATUS));
295 return 1; 296 return 0;
296} 297}
297 298
298static inline int mac_esp_wait_for_intr(struct esp *esp) 299static inline int mac_esp_wait_for_intr(struct esp *esp)
299{ 300{
301 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
300 int i = 500000; 302 int i = 500000;
301 303
302 do { 304 do {
@@ -308,6 +310,7 @@ static inline int mac_esp_wait_for_intr(struct esp *esp)
308 } while (--i); 310 } while (--i);
309 311
310 printk(KERN_ERR PFX "IRQ timeout (sreg %02x)\n", esp->sreg); 312 printk(KERN_ERR PFX "IRQ timeout (sreg %02x)\n", esp->sreg);
313 mep->error = 1;
311 return 1; 314 return 1;
312} 315}
313 316
@@ -347,11 +350,10 @@ static inline int mac_esp_wait_for_intr(struct esp *esp)
347static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count, 350static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
348 u32 dma_count, int write, u8 cmd) 351 u32 dma_count, int write, u8 cmd)
349{ 352{
350 unsigned long flags;
351 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp); 353 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
352 u8 *fifo = esp->regs + ESP_FDATA * 16; 354 u8 *fifo = esp->regs + ESP_FDATA * 16;
353 355
354 local_irq_save(flags); 356 disable_irq(esp->host->irq);
355 357
356 cmd &= ~ESP_CMD_DMA; 358 cmd &= ~ESP_CMD_DMA;
357 mep->error = 0; 359 mep->error = 0;
@@ -359,11 +361,35 @@ static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
359 if (write) { 361 if (write) {
360 scsi_esp_cmd(esp, cmd); 362 scsi_esp_cmd(esp, cmd);
361 363
362 if (!mac_esp_wait_for_intr(esp)) { 364 while (1) {
363 if (mac_esp_wait_for_fifo(esp)) 365 unsigned int n;
364 esp_count = 0; 366
365 } else { 367 n = mac_esp_wait_for_fifo(esp);
366 esp_count = 0; 368 if (!n)
369 break;
370
371 if (n > esp_count)
372 n = esp_count;
373 esp_count -= n;
374
375 MAC_ESP_PIO_LOOP("%2@,%0@+", n);
376
377 if (!esp_count)
378 break;
379
380 if (mac_esp_wait_for_intr(esp))
381 break;
382
383 if (((esp->sreg & ESP_STAT_PMASK) != ESP_DIP) &&
384 ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP))
385 break;
386
387 esp->ireg = esp_read8(ESP_INTRPT);
388 if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
389 ESP_INTR_BSERV)
390 break;
391
392 scsi_esp_cmd(esp, ESP_CMD_TI);
367 } 393 }
368 } else { 394 } else {
369 scsi_esp_cmd(esp, ESP_CMD_FLUSH); 395 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
@@ -374,47 +400,24 @@ static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
374 MAC_ESP_PIO_LOOP("%0@+,%2@", esp_count); 400 MAC_ESP_PIO_LOOP("%0@+,%2@", esp_count);
375 401
376 scsi_esp_cmd(esp, cmd); 402 scsi_esp_cmd(esp, cmd);
377 }
378
379 while (esp_count) {
380 unsigned int n;
381
382 if (mac_esp_wait_for_intr(esp)) {
383 mep->error = 1;
384 break;
385 }
386
387 if (esp->sreg & ESP_STAT_SPAM) {
388 printk(KERN_ERR PFX "gross error\n");
389 mep->error = 1;
390 break;
391 }
392 403
393 n = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES; 404 while (esp_count) {
394 405 unsigned int n;
395 if (write) {
396 if (n > esp_count)
397 n = esp_count;
398 esp_count -= n;
399
400 MAC_ESP_PIO_LOOP("%2@,%0@+", n);
401 406
402 if ((esp->sreg & ESP_STAT_PMASK) == ESP_STATP) 407 if (mac_esp_wait_for_intr(esp))
403 break; 408 break;
404 409
405 if (esp_count) { 410 if (((esp->sreg & ESP_STAT_PMASK) != ESP_DOP) &&
406 esp->ireg = esp_read8(ESP_INTRPT); 411 ((esp->sreg & ESP_STAT_PMASK) != ESP_MOP))
407 if (esp->ireg & ESP_INTR_DC) 412 break;
408 break;
409 413
410 scsi_esp_cmd(esp, ESP_CMD_TI);
411 }
412 } else {
413 esp->ireg = esp_read8(ESP_INTRPT); 414 esp->ireg = esp_read8(ESP_INTRPT);
414 if (esp->ireg & ESP_INTR_DC) 415 if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
416 ESP_INTR_BSERV)
415 break; 417 break;
416 418
417 n = MAC_ESP_FIFO_SIZE - n; 419 n = MAC_ESP_FIFO_SIZE -
420 (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES);
418 if (n > esp_count) 421 if (n > esp_count)
419 n = esp_count; 422 n = esp_count;
420 423
@@ -429,7 +432,7 @@ static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
429 } 432 }
430 } 433 }
431 434
432 local_irq_restore(flags); 435 enable_irq(esp->host->irq);
433} 436}
434 437
435static int mac_esp_irq_pending(struct esp *esp) 438static int mac_esp_irq_pending(struct esp *esp)
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
index d9b8ca5116bc..409648f5845f 100644
--- a/drivers/scsi/megaraid/megaraid_sas.c
+++ b/drivers/scsi/megaraid/megaraid_sas.c
@@ -10,7 +10,7 @@
10 * 2 of the License, or (at your option) any later version. 10 * 2 of the License, or (at your option) any later version.
11 * 11 *
12 * FILE : megaraid_sas.c 12 * FILE : megaraid_sas.c
13 * Version : v00.00.04.12-rc1 13 * Version : v00.00.04.17.1-rc1
14 * 14 *
15 * Authors: 15 * Authors:
16 * (email-id : megaraidlinux@lsi.com) 16 * (email-id : megaraidlinux@lsi.com)
@@ -843,6 +843,7 @@ megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
843 pthru->lun = scp->device->lun; 843 pthru->lun = scp->device->lun;
844 pthru->cdb_len = scp->cmd_len; 844 pthru->cdb_len = scp->cmd_len;
845 pthru->timeout = 0; 845 pthru->timeout = 0;
846 pthru->pad_0 = 0;
846 pthru->flags = flags; 847 pthru->flags = flags;
847 pthru->data_xfer_len = scsi_bufflen(scp); 848 pthru->data_xfer_len = scsi_bufflen(scp);
848 849
@@ -874,6 +875,12 @@ megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
874 pthru->sge_count = megasas_make_sgl32(instance, scp, 875 pthru->sge_count = megasas_make_sgl32(instance, scp,
875 &pthru->sgl); 876 &pthru->sgl);
876 877
878 if (pthru->sge_count > instance->max_num_sge) {
879 printk(KERN_ERR "megasas: DCDB two many SGE NUM=%x\n",
880 pthru->sge_count);
881 return 0;
882 }
883
877 /* 884 /*
878 * Sense info specific 885 * Sense info specific
879 */ 886 */
@@ -1000,6 +1007,12 @@ megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1000 } else 1007 } else
1001 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl); 1008 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1002 1009
1010 if (ldio->sge_count > instance->max_num_sge) {
1011 printk(KERN_ERR "megasas: build_ld_io: sge_count = %x\n",
1012 ldio->sge_count);
1013 return 0;
1014 }
1015
1003 /* 1016 /*
1004 * Sense info specific 1017 * Sense info specific
1005 */ 1018 */
@@ -2250,6 +2263,7 @@ megasas_get_pd_list(struct megasas_instance *instance)
2250 dcmd->sge_count = 1; 2263 dcmd->sge_count = 1;
2251 dcmd->flags = MFI_FRAME_DIR_READ; 2264 dcmd->flags = MFI_FRAME_DIR_READ;
2252 dcmd->timeout = 0; 2265 dcmd->timeout = 0;
2266 dcmd->pad_0 = 0;
2253 dcmd->data_xfer_len = MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST); 2267 dcmd->data_xfer_len = MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST);
2254 dcmd->opcode = MR_DCMD_PD_LIST_QUERY; 2268 dcmd->opcode = MR_DCMD_PD_LIST_QUERY;
2255 dcmd->sgl.sge32[0].phys_addr = ci_h; 2269 dcmd->sgl.sge32[0].phys_addr = ci_h;
@@ -2294,6 +2308,86 @@ megasas_get_pd_list(struct megasas_instance *instance)
2294 return ret; 2308 return ret;
2295} 2309}
2296 2310
2311/*
2312 * megasas_get_ld_list_info - Returns FW's ld_list structure
2313 * @instance: Adapter soft state
2314 * @ld_list: ld_list structure
2315 *
2316 * Issues an internal command (DCMD) to get the FW's controller PD
2317 * list structure. This information is mainly used to find out SYSTEM
2318 * supported by the FW.
2319 */
2320static int
2321megasas_get_ld_list(struct megasas_instance *instance)
2322{
2323 int ret = 0, ld_index = 0, ids = 0;
2324 struct megasas_cmd *cmd;
2325 struct megasas_dcmd_frame *dcmd;
2326 struct MR_LD_LIST *ci;
2327 dma_addr_t ci_h = 0;
2328
2329 cmd = megasas_get_cmd(instance);
2330
2331 if (!cmd) {
2332 printk(KERN_DEBUG "megasas_get_ld_list: Failed to get cmd\n");
2333 return -ENOMEM;
2334 }
2335
2336 dcmd = &cmd->frame->dcmd;
2337
2338 ci = pci_alloc_consistent(instance->pdev,
2339 sizeof(struct MR_LD_LIST),
2340 &ci_h);
2341
2342 if (!ci) {
2343 printk(KERN_DEBUG "Failed to alloc mem in get_ld_list\n");
2344 megasas_return_cmd(instance, cmd);
2345 return -ENOMEM;
2346 }
2347
2348 memset(ci, 0, sizeof(*ci));
2349 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2350
2351 dcmd->cmd = MFI_CMD_DCMD;
2352 dcmd->cmd_status = 0xFF;
2353 dcmd->sge_count = 1;
2354 dcmd->flags = MFI_FRAME_DIR_READ;
2355 dcmd->timeout = 0;
2356 dcmd->data_xfer_len = sizeof(struct MR_LD_LIST);
2357 dcmd->opcode = MR_DCMD_LD_GET_LIST;
2358 dcmd->sgl.sge32[0].phys_addr = ci_h;
2359 dcmd->sgl.sge32[0].length = sizeof(struct MR_LD_LIST);
2360 dcmd->pad_0 = 0;
2361
2362 if (!megasas_issue_polled(instance, cmd)) {
2363 ret = 0;
2364 } else {
2365 ret = -1;
2366 }
2367
2368 /* the following function will get the instance PD LIST */
2369
2370 if ((ret == 0) && (ci->ldCount < MAX_LOGICAL_DRIVES)) {
2371 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
2372
2373 for (ld_index = 0; ld_index < ci->ldCount; ld_index++) {
2374 if (ci->ldList[ld_index].state != 0) {
2375 ids = ci->ldList[ld_index].ref.targetId;
2376 instance->ld_ids[ids] =
2377 ci->ldList[ld_index].ref.targetId;
2378 }
2379 }
2380 }
2381
2382 pci_free_consistent(instance->pdev,
2383 sizeof(struct MR_LD_LIST),
2384 ci,
2385 ci_h);
2386
2387 megasas_return_cmd(instance, cmd);
2388 return ret;
2389}
2390
2297/** 2391/**
2298 * megasas_get_controller_info - Returns FW's controller structure 2392 * megasas_get_controller_info - Returns FW's controller structure
2299 * @instance: Adapter soft state 2393 * @instance: Adapter soft state
@@ -2339,6 +2433,7 @@ megasas_get_ctrl_info(struct megasas_instance *instance,
2339 dcmd->sge_count = 1; 2433 dcmd->sge_count = 1;
2340 dcmd->flags = MFI_FRAME_DIR_READ; 2434 dcmd->flags = MFI_FRAME_DIR_READ;
2341 dcmd->timeout = 0; 2435 dcmd->timeout = 0;
2436 dcmd->pad_0 = 0;
2342 dcmd->data_xfer_len = sizeof(struct megasas_ctrl_info); 2437 dcmd->data_xfer_len = sizeof(struct megasas_ctrl_info);
2343 dcmd->opcode = MR_DCMD_CTRL_GET_INFO; 2438 dcmd->opcode = MR_DCMD_CTRL_GET_INFO;
2344 dcmd->sgl.sge32[0].phys_addr = ci_h; 2439 dcmd->sgl.sge32[0].phys_addr = ci_h;
@@ -2590,6 +2685,9 @@ static int megasas_init_mfi(struct megasas_instance *instance)
2590 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list))); 2685 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
2591 megasas_get_pd_list(instance); 2686 megasas_get_pd_list(instance);
2592 2687
2688 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
2689 megasas_get_ld_list(instance);
2690
2593 ctrl_info = kmalloc(sizeof(struct megasas_ctrl_info), GFP_KERNEL); 2691 ctrl_info = kmalloc(sizeof(struct megasas_ctrl_info), GFP_KERNEL);
2594 2692
2595 /* 2693 /*
@@ -2714,6 +2812,7 @@ megasas_get_seq_num(struct megasas_instance *instance,
2714 dcmd->sge_count = 1; 2812 dcmd->sge_count = 1;
2715 dcmd->flags = MFI_FRAME_DIR_READ; 2813 dcmd->flags = MFI_FRAME_DIR_READ;
2716 dcmd->timeout = 0; 2814 dcmd->timeout = 0;
2815 dcmd->pad_0 = 0;
2717 dcmd->data_xfer_len = sizeof(struct megasas_evt_log_info); 2816 dcmd->data_xfer_len = sizeof(struct megasas_evt_log_info);
2718 dcmd->opcode = MR_DCMD_CTRL_EVENT_GET_INFO; 2817 dcmd->opcode = MR_DCMD_CTRL_EVENT_GET_INFO;
2719 dcmd->sgl.sge32[0].phys_addr = el_info_h; 2818 dcmd->sgl.sge32[0].phys_addr = el_info_h;
@@ -2828,6 +2927,7 @@ megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
2828 dcmd->sge_count = 1; 2927 dcmd->sge_count = 1;
2829 dcmd->flags = MFI_FRAME_DIR_READ; 2928 dcmd->flags = MFI_FRAME_DIR_READ;
2830 dcmd->timeout = 0; 2929 dcmd->timeout = 0;
2930 dcmd->pad_0 = 0;
2831 dcmd->data_xfer_len = sizeof(struct megasas_evt_detail); 2931 dcmd->data_xfer_len = sizeof(struct megasas_evt_detail);
2832 dcmd->opcode = MR_DCMD_CTRL_EVENT_WAIT; 2932 dcmd->opcode = MR_DCMD_CTRL_EVENT_WAIT;
2833 dcmd->mbox.w[0] = seq_num; 2933 dcmd->mbox.w[0] = seq_num;
@@ -3166,6 +3266,7 @@ static void megasas_flush_cache(struct megasas_instance *instance)
3166 dcmd->sge_count = 0; 3266 dcmd->sge_count = 0;
3167 dcmd->flags = MFI_FRAME_DIR_NONE; 3267 dcmd->flags = MFI_FRAME_DIR_NONE;
3168 dcmd->timeout = 0; 3268 dcmd->timeout = 0;
3269 dcmd->pad_0 = 0;
3169 dcmd->data_xfer_len = 0; 3270 dcmd->data_xfer_len = 0;
3170 dcmd->opcode = MR_DCMD_CTRL_CACHE_FLUSH; 3271 dcmd->opcode = MR_DCMD_CTRL_CACHE_FLUSH;
3171 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE; 3272 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
@@ -3205,6 +3306,7 @@ static void megasas_shutdown_controller(struct megasas_instance *instance,
3205 dcmd->sge_count = 0; 3306 dcmd->sge_count = 0;
3206 dcmd->flags = MFI_FRAME_DIR_NONE; 3307 dcmd->flags = MFI_FRAME_DIR_NONE;
3207 dcmd->timeout = 0; 3308 dcmd->timeout = 0;
3309 dcmd->pad_0 = 0;
3208 dcmd->data_xfer_len = 0; 3310 dcmd->data_xfer_len = 0;
3209 dcmd->opcode = opcode; 3311 dcmd->opcode = opcode;
3210 3312
@@ -3984,6 +4086,7 @@ megasas_aen_polling(struct work_struct *work)
3984 struct Scsi_Host *host; 4086 struct Scsi_Host *host;
3985 struct scsi_device *sdev1; 4087 struct scsi_device *sdev1;
3986 u16 pd_index = 0; 4088 u16 pd_index = 0;
4089 u16 ld_index = 0;
3987 int i, j, doscan = 0; 4090 int i, j, doscan = 0;
3988 u32 seq_num; 4091 u32 seq_num;
3989 int error; 4092 int error;
@@ -3999,8 +4102,124 @@ megasas_aen_polling(struct work_struct *work)
3999 4102
4000 switch (instance->evt_detail->code) { 4103 switch (instance->evt_detail->code) {
4001 case MR_EVT_PD_INSERTED: 4104 case MR_EVT_PD_INSERTED:
4105 if (megasas_get_pd_list(instance) == 0) {
4106 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
4107 for (j = 0;
4108 j < MEGASAS_MAX_DEV_PER_CHANNEL;
4109 j++) {
4110
4111 pd_index =
4112 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
4113
4114 sdev1 =
4115 scsi_device_lookup(host, i, j, 0);
4116
4117 if (instance->pd_list[pd_index].driveState
4118 == MR_PD_STATE_SYSTEM) {
4119 if (!sdev1) {
4120 scsi_add_device(host, i, j, 0);
4121 }
4122
4123 if (sdev1)
4124 scsi_device_put(sdev1);
4125 }
4126 }
4127 }
4128 }
4129 doscan = 0;
4130 break;
4131
4002 case MR_EVT_PD_REMOVED: 4132 case MR_EVT_PD_REMOVED:
4133 if (megasas_get_pd_list(instance) == 0) {
4134 megasas_get_pd_list(instance);
4135 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
4136 for (j = 0;
4137 j < MEGASAS_MAX_DEV_PER_CHANNEL;
4138 j++) {
4139
4140 pd_index =
4141 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
4142
4143 sdev1 =
4144 scsi_device_lookup(host, i, j, 0);
4145
4146 if (instance->pd_list[pd_index].driveState
4147 == MR_PD_STATE_SYSTEM) {
4148 if (sdev1) {
4149 scsi_device_put(sdev1);
4150 }
4151 } else {
4152 if (sdev1) {
4153 scsi_remove_device(sdev1);
4154 scsi_device_put(sdev1);
4155 }
4156 }
4157 }
4158 }
4159 }
4160 doscan = 0;
4161 break;
4162
4163 case MR_EVT_LD_OFFLINE:
4164 case MR_EVT_LD_DELETED:
4165 megasas_get_ld_list(instance);
4166 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
4167 for (j = 0;
4168 j < MEGASAS_MAX_DEV_PER_CHANNEL;
4169 j++) {
4170
4171 ld_index =
4172 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
4173
4174 sdev1 = scsi_device_lookup(host,
4175 i + MEGASAS_MAX_LD_CHANNELS,
4176 j,
4177 0);
4178
4179 if (instance->ld_ids[ld_index] != 0xff) {
4180 if (sdev1) {
4181 scsi_device_put(sdev1);
4182 }
4183 } else {
4184 if (sdev1) {
4185 scsi_remove_device(sdev1);
4186 scsi_device_put(sdev1);
4187 }
4188 }
4189 }
4190 }
4191 doscan = 0;
4192 break;
4193 case MR_EVT_LD_CREATED:
4194 megasas_get_ld_list(instance);
4195 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
4196 for (j = 0;
4197 j < MEGASAS_MAX_DEV_PER_CHANNEL;
4198 j++) {
4199 ld_index =
4200 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
4201
4202 sdev1 = scsi_device_lookup(host,
4203 i+MEGASAS_MAX_LD_CHANNELS,
4204 j, 0);
4205
4206 if (instance->ld_ids[ld_index] !=
4207 0xff) {
4208 if (!sdev1) {
4209 scsi_add_device(host,
4210 i + 2,
4211 j, 0);
4212 }
4213 }
4214 if (sdev1) {
4215 scsi_device_put(sdev1);
4216 }
4217 }
4218 }
4219 doscan = 0;
4220 break;
4003 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED: 4221 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
4222 case MR_EVT_FOREIGN_CFG_IMPORTED:
4004 doscan = 1; 4223 doscan = 1;
4005 break; 4224 break;
4006 default: 4225 default:
@@ -4035,6 +4254,31 @@ megasas_aen_polling(struct work_struct *work)
4035 } 4254 }
4036 } 4255 }
4037 } 4256 }
4257
4258 megasas_get_ld_list(instance);
4259 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
4260 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
4261 ld_index =
4262 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
4263
4264 sdev1 = scsi_device_lookup(host,
4265 i+MEGASAS_MAX_LD_CHANNELS, j, 0);
4266 if (instance->ld_ids[ld_index] != 0xff) {
4267 if (!sdev1) {
4268 scsi_add_device(host,
4269 i+2,
4270 j, 0);
4271 } else {
4272 scsi_device_put(sdev1);
4273 }
4274 } else {
4275 if (sdev1) {
4276 scsi_remove_device(sdev1);
4277 scsi_device_put(sdev1);
4278 }
4279 }
4280 }
4281 }
4038 } 4282 }
4039 4283
4040 if ( instance->aen_cmd != NULL ) { 4284 if ( instance->aen_cmd != NULL ) {
diff --git a/drivers/scsi/megaraid/megaraid_sas.h b/drivers/scsi/megaraid/megaraid_sas.h
index 72b28e436e32..9d8b6bf605aa 100644
--- a/drivers/scsi/megaraid/megaraid_sas.h
+++ b/drivers/scsi/megaraid/megaraid_sas.h
@@ -18,9 +18,9 @@
18/* 18/*
19 * MegaRAID SAS Driver meta data 19 * MegaRAID SAS Driver meta data
20 */ 20 */
21#define MEGASAS_VERSION "00.00.04.12-rc1" 21#define MEGASAS_VERSION "00.00.04.17.1-rc1"
22#define MEGASAS_RELDATE "Sep. 17, 2009" 22#define MEGASAS_RELDATE "Oct. 29, 2009"
23#define MEGASAS_EXT_VERSION "Thu Sep. 17 11:41:51 PST 2009" 23#define MEGASAS_EXT_VERSION "Thu. Oct. 29, 11:41:51 PST 2009"
24 24
25/* 25/*
26 * Device IDs 26 * Device IDs
@@ -117,6 +117,7 @@
117#define MFI_CMD_STP 0x08 117#define MFI_CMD_STP 0x08
118 118
119#define MR_DCMD_CTRL_GET_INFO 0x01010000 119#define MR_DCMD_CTRL_GET_INFO 0x01010000
120#define MR_DCMD_LD_GET_LIST 0x03010000
120 121
121#define MR_DCMD_CTRL_CACHE_FLUSH 0x01101000 122#define MR_DCMD_CTRL_CACHE_FLUSH 0x01101000
122#define MR_FLUSH_CTRL_CACHE 0x01 123#define MR_FLUSH_CTRL_CACHE 0x01
@@ -349,6 +350,32 @@ struct megasas_pd_list {
349 u8 driveState; 350 u8 driveState;
350} __packed; 351} __packed;
351 352
353 /*
354 * defines the logical drive reference structure
355 */
356union MR_LD_REF {
357 struct {
358 u8 targetId;
359 u8 reserved;
360 u16 seqNum;
361 };
362 u32 ref;
363} __packed;
364
365/*
366 * defines the logical drive list structure
367 */
368struct MR_LD_LIST {
369 u32 ldCount;
370 u32 reserved;
371 struct {
372 union MR_LD_REF ref;
373 u8 state;
374 u8 reserved[3];
375 u64 size;
376 } ldList[MAX_LOGICAL_DRIVES];
377} __packed;
378
352/* 379/*
353 * SAS controller properties 380 * SAS controller properties
354 */ 381 */
@@ -637,6 +664,8 @@ struct megasas_ctrl_info {
637#define MEGASAS_MAX_LD 64 664#define MEGASAS_MAX_LD 64
638#define MEGASAS_MAX_PD (MEGASAS_MAX_PD_CHANNELS * \ 665#define MEGASAS_MAX_PD (MEGASAS_MAX_PD_CHANNELS * \
639 MEGASAS_MAX_DEV_PER_CHANNEL) 666 MEGASAS_MAX_DEV_PER_CHANNEL)
667#define MEGASAS_MAX_LD_IDS (MEGASAS_MAX_LD_CHANNELS * \
668 MEGASAS_MAX_DEV_PER_CHANNEL)
640 669
641#define MEGASAS_DBG_LVL 1 670#define MEGASAS_DBG_LVL 1
642 671
@@ -1187,6 +1216,7 @@ struct megasas_instance {
1187 struct megasas_register_set __iomem *reg_set; 1216 struct megasas_register_set __iomem *reg_set;
1188 1217
1189 struct megasas_pd_list pd_list[MEGASAS_MAX_PD]; 1218 struct megasas_pd_list pd_list[MEGASAS_MAX_PD];
1219 u8 ld_ids[MEGASAS_MAX_LD_IDS];
1190 s8 init_id; 1220 s8 init_id;
1191 1221
1192 u16 max_num_sge; 1222 u16 max_num_sge;
diff --git a/drivers/scsi/mpt2sas/Kconfig b/drivers/scsi/mpt2sas/Kconfig
index 70c4c2467dd8..ba8e128de238 100644
--- a/drivers/scsi/mpt2sas/Kconfig
+++ b/drivers/scsi/mpt2sas/Kconfig
@@ -44,6 +44,7 @@ config SCSI_MPT2SAS
44 tristate "LSI MPT Fusion SAS 2.0 Device Driver" 44 tristate "LSI MPT Fusion SAS 2.0 Device Driver"
45 depends on PCI && SCSI 45 depends on PCI && SCSI
46 select SCSI_SAS_ATTRS 46 select SCSI_SAS_ATTRS
47 select RAID_ATTRS
47 ---help--- 48 ---help---
48 This driver supports PCI-Express SAS 6Gb/s Host Adapters. 49 This driver supports PCI-Express SAS 6Gb/s Host Adapters.
49 50
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2.h b/drivers/scsi/mpt2sas/mpi/mpi2.h
index 914168105297..9958d847a88d 100644
--- a/drivers/scsi/mpt2sas/mpi/mpi2.h
+++ b/drivers/scsi/mpt2sas/mpi/mpi2.h
@@ -8,7 +8,7 @@
8 * scatter/gather formats. 8 * scatter/gather formats.
9 * Creation Date: June 21, 2006 9 * Creation Date: June 21, 2006
10 * 10 *
11 * mpi2.h Version: 02.00.13 11 * mpi2.h Version: 02.00.14
12 * 12 *
13 * Version History 13 * Version History
14 * --------------- 14 * ---------------
@@ -53,6 +53,10 @@
53 * bytes reserved. 53 * bytes reserved.
54 * Added RAID Accelerator functionality. 54 * Added RAID Accelerator functionality.
55 * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT. 55 * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
56 * 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT.
57 * Added MSI-x index mask and shift for Reply Post Host
58 * Index register.
59 * Added function code for Host Based Discovery Action.
56 * -------------------------------------------------------------------------- 60 * --------------------------------------------------------------------------
57 */ 61 */
58 62
@@ -78,7 +82,7 @@
78#define MPI2_VERSION_02_00 (0x0200) 82#define MPI2_VERSION_02_00 (0x0200)
79 83
80/* versioning for this MPI header set */ 84/* versioning for this MPI header set */
81#define MPI2_HEADER_VERSION_UNIT (0x0D) 85#define MPI2_HEADER_VERSION_UNIT (0x0E)
82#define MPI2_HEADER_VERSION_DEV (0x00) 86#define MPI2_HEADER_VERSION_DEV (0x00)
83#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00) 87#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
84#define MPI2_HEADER_VERSION_UNIT_SHIFT (8) 88#define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
@@ -232,9 +236,12 @@ typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
232#define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048) 236#define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048)
233 237
234/* 238/*
235 * Offset for the Reply Descriptor Post Queue 239 * Defines for the Reply Descriptor Post Queue
236 */ 240 */
237#define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C) 241#define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C)
242#define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF)
243#define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000)
244#define MPI2_RPHI_MSIX_INDEX_SHIFT (24)
238 245
239/* 246/*
240 * Defines for the HCBSize and address 247 * Defines for the HCBSize and address
@@ -497,12 +504,13 @@ typedef union _MPI2_REPLY_DESCRIPTORS_UNION
497#define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */ 504#define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */
498#define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */ 505#define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */
499#define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator*/ 506#define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator*/
507/* Host Based Discovery Action */
508#define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F)
500 509
501 510
502 511
503/* Doorbell functions */ 512/* Doorbell functions */
504#define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40) 513#define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
505/* #define MPI2_FUNCTION_IO_UNIT_RESET (0x41) */
506#define MPI2_FUNCTION_HANDSHAKE (0x42) 514#define MPI2_FUNCTION_HANDSHAKE (0x42)
507 515
508 516
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h b/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h
index 1611c57a6fdf..cf0ac9f40c97 100644
--- a/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h
@@ -6,7 +6,7 @@
6 * Title: MPI Configuration messages and pages 6 * Title: MPI Configuration messages and pages
7 * Creation Date: November 10, 2006 7 * Creation Date: November 10, 2006
8 * 8 *
9 * mpi2_cnfg.h Version: 02.00.12 9 * mpi2_cnfg.h Version: 02.00.13
10 * 10 *
11 * Version History 11 * Version History
12 * --------------- 12 * ---------------
@@ -107,6 +107,8 @@
107 * to SAS Device Page 0 Flags field. 107 * to SAS Device Page 0 Flags field.
108 * Added PhyInfo defines for power condition. 108 * Added PhyInfo defines for power condition.
109 * Added Ethernet configuration pages. 109 * Added Ethernet configuration pages.
110 * 10-28-09 02.00.13 Added MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY.
111 * Added SAS PHY Page 4 structure and defines.
110 * -------------------------------------------------------------------------- 112 * --------------------------------------------------------------------------
111 */ 113 */
112 114
@@ -712,6 +714,7 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_1
712#define MPI2_IOUNITPAGE1_PAGEVERSION (0x04) 714#define MPI2_IOUNITPAGE1_PAGEVERSION (0x04)
713 715
714/* IO Unit Page 1 Flags defines */ 716/* IO Unit Page 1 Flags defines */
717#define MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY (0x00000800)
715#define MPI2_IOUNITPAGE1_MASK_SATA_WRITE_CACHE (0x00000600) 718#define MPI2_IOUNITPAGE1_MASK_SATA_WRITE_CACHE (0x00000600)
716#define MPI2_IOUNITPAGE1_ENABLE_SATA_WRITE_CACHE (0x00000000) 719#define MPI2_IOUNITPAGE1_ENABLE_SATA_WRITE_CACHE (0x00000000)
717#define MPI2_IOUNITPAGE1_DISABLE_SATA_WRITE_CACHE (0x00000200) 720#define MPI2_IOUNITPAGE1_DISABLE_SATA_WRITE_CACHE (0x00000200)
@@ -2291,6 +2294,26 @@ typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_3 {
2291#define MPI2_SASPHY3_PAGEVERSION (0x00) 2294#define MPI2_SASPHY3_PAGEVERSION (0x00)
2292 2295
2293 2296
2297/* SAS PHY Page 4 */
2298
2299typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_4 {
2300 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
2301 U16 Reserved1; /* 0x08 */
2302 U8 Reserved2; /* 0x0A */
2303 U8 Flags; /* 0x0B */
2304 U8 InitialFrame[28]; /* 0x0C */
2305} MPI2_CONFIG_PAGE_SAS_PHY_4, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_4,
2306 Mpi2SasPhyPage4_t, MPI2_POINTER pMpi2SasPhyPage4_t;
2307
2308#define MPI2_SASPHY4_PAGEVERSION (0x00)
2309
2310/* values for the Flags field */
2311#define MPI2_SASPHY4_FLAGS_FRAME_VALID (0x02)
2312#define MPI2_SASPHY4_FLAGS_SATA_FRAME (0x01)
2313
2314
2315
2316
2294/**************************************************************************** 2317/****************************************************************************
2295* SAS Port Config Pages 2318* SAS Port Config Pages
2296****************************************************************************/ 2319****************************************************************************/
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_history.txt b/drivers/scsi/mpt2sas/mpi/mpi2_history.txt
index 65fcaa31cb30..c4adf76b49d9 100644
--- a/drivers/scsi/mpt2sas/mpi/mpi2_history.txt
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_history.txt
@@ -5,23 +5,24 @@
5 Copyright (c) 2000-2009 LSI Corporation. 5 Copyright (c) 2000-2009 LSI Corporation.
6 6
7 --------------------------------------- 7 ---------------------------------------
8 Header Set Release Version: 02.00.12 8 Header Set Release Version: 02.00.14
9 Header Set Release Date: 05-06-09 9 Header Set Release Date: 10-28-09
10 --------------------------------------- 10 ---------------------------------------
11 11
12 Filename Current version Prior version 12 Filename Current version Prior version
13 ---------- --------------- ------------- 13 ---------- --------------- -------------
14 mpi2.h 02.00.12 02.00.11 14 mpi2.h 02.00.14 02.00.13
15 mpi2_cnfg.h 02.00.11 02.00.10 15 mpi2_cnfg.h 02.00.13 02.00.12
16 mpi2_init.h 02.00.07 02.00.06 16 mpi2_init.h 02.00.08 02.00.07
17 mpi2_ioc.h 02.00.11 02.00.10 17 mpi2_ioc.h 02.00.13 02.00.12
18 mpi2_raid.h 02.00.03 02.00.03 18 mpi2_raid.h 02.00.04 02.00.04
19 mpi2_sas.h 02.00.02 02.00.02 19 mpi2_sas.h 02.00.03 02.00.02
20 mpi2_targ.h 02.00.03 02.00.03 20 mpi2_targ.h 02.00.03 02.00.03
21 mpi2_tool.h 02.00.03 02.00.02 21 mpi2_tool.h 02.00.04 02.00.04
22 mpi2_type.h 02.00.00 02.00.00 22 mpi2_type.h 02.00.00 02.00.00
23 mpi2_ra.h 02.00.00 23 mpi2_ra.h 02.00.00 02.00.00
24 mpi2_history.txt 02.00.11 02.00.12 24 mpi2_hbd.h 02.00.00
25 mpi2_history.txt 02.00.14 02.00.13
25 26
26 27
27 * Date Version Description 28 * Date Version Description
@@ -65,6 +66,11 @@ mpi2.h
65 * MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those 66 * MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
66 * bytes reserved. 67 * bytes reserved.
67 * Added RAID Accelerator functionality. 68 * Added RAID Accelerator functionality.
69 * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
70 * 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT.
71 * Added MSI-x index mask and shift for Reply Post Host
72 * Index register.
73 * Added function code for Host Based Discovery Action.
68 * -------------------------------------------------------------------------- 74 * --------------------------------------------------------------------------
69 75
70mpi2_cnfg.h 76mpi2_cnfg.h
@@ -155,6 +161,15 @@ mpi2_cnfg.h
155 * Added expander reduced functionality data to SAS 161 * Added expander reduced functionality data to SAS
156 * Expander Page 0. 162 * Expander Page 0.
157 * Added SAS PHY Page 2 and SAS PHY Page 3. 163 * Added SAS PHY Page 2 and SAS PHY Page 3.
164 * 07-30-09 02.00.12 Added IO Unit Page 7.
165 * Added new device ids.
166 * Added SAS IO Unit Page 5.
167 * Added partial and slumber power management capable flags
168 * to SAS Device Page 0 Flags field.
169 * Added PhyInfo defines for power condition.
170 * Added Ethernet configuration pages.
171 * 10-28-09 02.00.13 Added MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY.
172 * Added SAS PHY Page 4 structure and defines.
158 * -------------------------------------------------------------------------- 173 * --------------------------------------------------------------------------
159 174
160mpi2_init.h 175mpi2_init.h
@@ -172,6 +187,10 @@ mpi2_init.h
172 * Query Asynchronous Event. 187 * Query Asynchronous Event.
173 * Defined two new bits in the SlotStatus field of the SCSI 188 * Defined two new bits in the SlotStatus field of the SCSI
174 * Enclosure Processor Request and Reply. 189 * Enclosure Processor Request and Reply.
190 * 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
191 * both SCSI IO Error Reply and SCSI Task Management Reply.
192 * Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
193 * Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
175 * -------------------------------------------------------------------------- 194 * --------------------------------------------------------------------------
176 195
177mpi2_ioc.h 196mpi2_ioc.h
@@ -246,6 +265,20 @@ mpi2_ioc.h
246 * Added two new reason codes for SAS Device Status Change 265 * Added two new reason codes for SAS Device Status Change
247 * Event. 266 * Event.
248 * Added new event: SAS PHY Counter. 267 * Added new event: SAS PHY Counter.
268 * 07-30-09 02.00.12 Added GPIO Interrupt event define and structure.
269 * Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
270 * Added new product id family for 2208.
271 * 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
272 * Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
273 * Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
274 * Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
275 * Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
276 * Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
277 * Added Host Based Discovery Phy Event data.
278 * Added defines for ProductID Product field
279 * (MPI2_FW_HEADER_PID_).
280 * Modified values for SAS ProductID Family
281 * (MPI2_FW_HEADER_PID_FAMILY_).
249 * -------------------------------------------------------------------------- 282 * --------------------------------------------------------------------------
250 283
251mpi2_raid.h 284mpi2_raid.h
@@ -256,6 +289,8 @@ mpi2_raid.h
256 * 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that 289 * 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that
257 * the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT 290 * the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT
258 * can be sized by the build environment. 291 * can be sized by the build environment.
292 * 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of
293 * VolumeCreationFlags and marked the old one as obsolete.
259 * -------------------------------------------------------------------------- 294 * --------------------------------------------------------------------------
260 295
261mpi2_sas.h 296mpi2_sas.h
@@ -264,6 +299,8 @@ mpi2_sas.h
264 * Control Request. 299 * Control Request.
265 * 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control 300 * 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
266 * Request. 301 * Request.
302 * 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST
303 * to MPI2_SGE_IO_UNION since it supports chained SGLs.
267 * -------------------------------------------------------------------------- 304 * --------------------------------------------------------------------------
268 305
269mpi2_targ.h 306mpi2_targ.h
@@ -283,6 +320,10 @@ mpi2_tool.h
283 * structures and defines. 320 * structures and defines.
284 * 02-29-08 02.00.02 Modified various names to make them 32-character unique. 321 * 02-29-08 02.00.02 Modified various names to make them 32-character unique.
285 * 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool. 322 * 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool.
323 * 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request
324 * and reply messages.
325 * Added MPI2_DIAG_BUF_TYPE_EXTENDED.
326 * Incremented MPI2_DIAG_BUF_TYPE_COUNT.
286 * -------------------------------------------------------------------------- 327 * --------------------------------------------------------------------------
287 328
288mpi2_type.h 329mpi2_type.h
@@ -293,20 +334,26 @@ mpi2_ra.h
293 * 05-06-09 02.00.00 Initial version. 334 * 05-06-09 02.00.00 Initial version.
294 * -------------------------------------------------------------------------- 335 * --------------------------------------------------------------------------
295 336
337mpi2_hbd.h
338 * 10-28-09 02.00.00 Initial version.
339 * --------------------------------------------------------------------------
340
341
296mpi2_history.txt Parts list history 342mpi2_history.txt Parts list history
297 343
298Filename 02.00.12 344Filename 02.00.14 02.00.13 02.00.12
299---------- -------- 345---------- -------- -------- --------
300mpi2.h 02.00.12 346mpi2.h 02.00.14 02.00.13 02.00.12
301mpi2_cnfg.h 02.00.11 347mpi2_cnfg.h 02.00.13 02.00.12 02.00.11
302mpi2_init.h 02.00.07 348mpi2_init.h 02.00.08 02.00.07 02.00.07
303mpi2_ioc.h 02.00.11 349mpi2_ioc.h 02.00.13 02.00.12 02.00.11
304mpi2_raid.h 02.00.03 350mpi2_raid.h 02.00.04 02.00.04 02.00.03
305mpi2_sas.h 02.00.02 351mpi2_sas.h 02.00.03 02.00.02 02.00.02
306mpi2_targ.h 02.00.03 352mpi2_targ.h 02.00.03 02.00.03 02.00.03
307mpi2_tool.h 02.00.03 353mpi2_tool.h 02.00.04 02.00.04 02.00.03
308mpi2_type.h 02.00.00 354mpi2_type.h 02.00.00 02.00.00 02.00.00
309mpi2_ra.h 02.00.00 355mpi2_ra.h 02.00.00 02.00.00 02.00.00
356mpi2_hbd.h 02.00.00
310 357
311Filename 02.00.11 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06 358Filename 02.00.11 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06
312---------- -------- -------- -------- -------- -------- -------- 359---------- -------- -------- -------- -------- -------- --------
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_init.h b/drivers/scsi/mpt2sas/mpi/mpi2_init.h
index 563e56d2e945..6541945e97c3 100644
--- a/drivers/scsi/mpt2sas/mpi/mpi2_init.h
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_init.h
@@ -6,7 +6,7 @@
6 * Title: MPI SCSI initiator mode messages and structures 6 * Title: MPI SCSI initiator mode messages and structures
7 * Creation Date: June 23, 2006 7 * Creation Date: June 23, 2006
8 * 8 *
9 * mpi2_init.h Version: 02.00.07 9 * mpi2_init.h Version: 02.00.08
10 * 10 *
11 * Version History 11 * Version History
12 * --------------- 12 * ---------------
@@ -27,6 +27,10 @@
27 * Query Asynchronous Event. 27 * Query Asynchronous Event.
28 * Defined two new bits in the SlotStatus field of the SCSI 28 * Defined two new bits in the SlotStatus field of the SCSI
29 * Enclosure Processor Request and Reply. 29 * Enclosure Processor Request and Reply.
30 * 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
31 * both SCSI IO Error Reply and SCSI Task Management Reply.
32 * Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
33 * Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
30 * -------------------------------------------------------------------------- 34 * --------------------------------------------------------------------------
31 */ 35 */
32 36
@@ -254,6 +258,11 @@ typedef struct _MPI2_SCSI_IO_REPLY
254#define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02) 258#define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
255#define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01) 259#define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
256 260
261/* masks and shifts for the ResponseInfo field */
262
263#define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF)
264#define MPI2_SCSI_RI_SHIFT_REASONCODE (0)
265
257#define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF) 266#define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
258 267
259 268
@@ -327,6 +336,7 @@ typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY
327 U16 IOCStatus; /* 0x0E */ 336 U16 IOCStatus; /* 0x0E */
328 U32 IOCLogInfo; /* 0x10 */ 337 U32 IOCLogInfo; /* 0x10 */
329 U32 TerminationCount; /* 0x14 */ 338 U32 TerminationCount; /* 0x14 */
339 U32 ResponseInfo; /* 0x18 */
330} MPI2_SCSI_TASK_MANAGE_REPLY, 340} MPI2_SCSI_TASK_MANAGE_REPLY,
331 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY, 341 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
332 Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t; 342 Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t;
@@ -339,8 +349,20 @@ typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY
339#define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05) 349#define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
340#define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) 350#define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
341#define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) 351#define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
352#define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A)
342#define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) 353#define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
343 354
355/* masks and shifts for the ResponseInfo field */
356
357#define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF)
358#define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0)
359#define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00)
360#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8)
361#define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000)
362#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16)
363#define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000)
364#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24)
365
344 366
345/**************************************************************************** 367/****************************************************************************
346* SCSI Enclosure Processor messages 368* SCSI Enclosure Processor messages
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h b/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h
index ea51ce868690..754938422f6a 100644
--- a/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h
@@ -6,7 +6,7 @@
6 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages 6 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
7 * Creation Date: October 11, 2006 7 * Creation Date: October 11, 2006
8 * 8 *
9 * mpi2_ioc.h Version: 02.00.12 9 * mpi2_ioc.h Version: 02.00.13
10 * 10 *
11 * Version History 11 * Version History
12 * --------------- 12 * ---------------
@@ -87,6 +87,17 @@
87 * 07-30-09 02.00.12 Added GPIO Interrupt event define and structure. 87 * 07-30-09 02.00.12 Added GPIO Interrupt event define and structure.
88 * Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define. 88 * Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
89 * Added new product id family for 2208. 89 * Added new product id family for 2208.
90 * 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
91 * Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
92 * Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
93 * Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
94 * Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
95 * Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
96 * Added Host Based Discovery Phy Event data.
97 * Added defines for ProductID Product field
98 * (MPI2_FW_HEADER_PID_).
99 * Modified values for SAS ProductID Family
100 * (MPI2_FW_HEADER_PID_FAMILY_).
90 * -------------------------------------------------------------------------- 101 * --------------------------------------------------------------------------
91 */ 102 */
92 103
@@ -119,8 +130,10 @@ typedef struct _MPI2_IOC_INIT_REQUEST
119 U16 MsgVersion; /* 0x0C */ 130 U16 MsgVersion; /* 0x0C */
120 U16 HeaderVersion; /* 0x0E */ 131 U16 HeaderVersion; /* 0x0E */
121 U32 Reserved5; /* 0x10 */ 132 U32 Reserved5; /* 0x10 */
122 U32 Reserved6; /* 0x14 */ 133 U16 Reserved6; /* 0x14 */
123 U16 Reserved7; /* 0x18 */ 134 U8 Reserved7; /* 0x16 */
135 U8 HostMSIxVectors; /* 0x17 */
136 U16 Reserved8; /* 0x18 */
124 U16 SystemRequestFrameSize; /* 0x1A */ 137 U16 SystemRequestFrameSize; /* 0x1A */
125 U16 ReplyDescriptorPostQueueDepth; /* 0x1C */ 138 U16 ReplyDescriptorPostQueueDepth; /* 0x1C */
126 U16 ReplyFreeQueueDepth; /* 0x1E */ 139 U16 ReplyFreeQueueDepth; /* 0x1E */
@@ -215,7 +228,7 @@ typedef struct _MPI2_IOC_FACTS_REPLY
215 U8 MaxChainDepth; /* 0x14 */ 228 U8 MaxChainDepth; /* 0x14 */
216 U8 WhoInit; /* 0x15 */ 229 U8 WhoInit; /* 0x15 */
217 U8 NumberOfPorts; /* 0x16 */ 230 U8 NumberOfPorts; /* 0x16 */
218 U8 Reserved2; /* 0x17 */ 231 U8 MaxMSIxVectors; /* 0x17 */
219 U16 RequestCredit; /* 0x18 */ 232 U16 RequestCredit; /* 0x18 */
220 U16 ProductID; /* 0x1A */ 233 U16 ProductID; /* 0x1A */
221 U32 IOCCapabilities; /* 0x1C */ 234 U32 IOCCapabilities; /* 0x1C */
@@ -233,7 +246,8 @@ typedef struct _MPI2_IOC_FACTS_REPLY
233 U8 MaxVolumes; /* 0x37 */ 246 U8 MaxVolumes; /* 0x37 */
234 U16 MaxDevHandle; /* 0x38 */ 247 U16 MaxDevHandle; /* 0x38 */
235 U16 MaxPersistentEntries; /* 0x3A */ 248 U16 MaxPersistentEntries; /* 0x3A */
236 U32 Reserved4; /* 0x3C */ 249 U16 MinDevHandle; /* 0x3C */
250 U16 Reserved4; /* 0x3E */
237} MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY, 251} MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
238 Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t; 252 Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
239 253
@@ -269,6 +283,7 @@ typedef struct _MPI2_IOC_FACTS_REPLY
269/* ProductID field uses MPI2_FW_HEADER_PID_ */ 283/* ProductID field uses MPI2_FW_HEADER_PID_ */
270 284
271/* IOCCapabilities */ 285/* IOCCapabilities */
286#define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY (0x00010000)
272#define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX (0x00008000) 287#define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX (0x00008000)
273#define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR (0x00004000) 288#define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR (0x00004000)
274#define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY (0x00002000) 289#define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY (0x00002000)
@@ -453,6 +468,7 @@ typedef struct _MPI2_EVENT_NOTIFICATION_REPLY
453#define MPI2_EVENT_LOG_ENTRY_ADDED (0x0021) 468#define MPI2_EVENT_LOG_ENTRY_ADDED (0x0021)
454#define MPI2_EVENT_SAS_PHY_COUNTER (0x0022) 469#define MPI2_EVENT_SAS_PHY_COUNTER (0x0022)
455#define MPI2_EVENT_GPIO_INTERRUPT (0x0023) 470#define MPI2_EVENT_GPIO_INTERRUPT (0x0023)
471#define MPI2_EVENT_HOST_BASED_DISCOVERY_PHY (0x0024)
456 472
457 473
458/* Log Entry Added Event data */ 474/* Log Entry Added Event data */
@@ -793,6 +809,7 @@ typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST
793 MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t; 809 MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t;
794 810
795/* values for the ExpStatus field */ 811/* values for the ExpStatus field */
812#define MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER (0x00)
796#define MPI2_EVENT_SAS_TOPO_ES_ADDED (0x01) 813#define MPI2_EVENT_SAS_TOPO_ES_ADDED (0x01)
797#define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02) 814#define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02)
798#define MPI2_EVENT_SAS_TOPO_ES_RESPONDING (0x03) 815#define MPI2_EVENT_SAS_TOPO_ES_RESPONDING (0x03)
@@ -878,6 +895,44 @@ typedef struct _MPI2_EVENT_DATA_SAS_PHY_COUNTER {
878 * */ 895 * */
879 896
880 897
898/* Host Based Discovery Phy Event data */
899
900typedef struct _MPI2_EVENT_HBD_PHY_SAS {
901 U8 Flags; /* 0x00 */
902 U8 NegotiatedLinkRate; /* 0x01 */
903 U8 PhyNum; /* 0x02 */
904 U8 PhysicalPort; /* 0x03 */
905 U32 Reserved1; /* 0x04 */
906 U8 InitialFrame[28]; /* 0x08 */
907} MPI2_EVENT_HBD_PHY_SAS, MPI2_POINTER PTR_MPI2_EVENT_HBD_PHY_SAS,
908 Mpi2EventHbdPhySas_t, MPI2_POINTER pMpi2EventHbdPhySas_t;
909
910/* values for the Flags field */
911#define MPI2_EVENT_HBD_SAS_FLAGS_FRAME_VALID (0x02)
912#define MPI2_EVENT_HBD_SAS_FLAGS_SATA_FRAME (0x01)
913
914/* use MPI2_SAS_NEG_LINK_RATE_ defines from mpi2_cnfg.h for
915 * the NegotiatedLinkRate field */
916
917typedef union _MPI2_EVENT_HBD_DESCRIPTOR {
918 MPI2_EVENT_HBD_PHY_SAS Sas;
919} MPI2_EVENT_HBD_DESCRIPTOR, MPI2_POINTER PTR_MPI2_EVENT_HBD_DESCRIPTOR,
920 Mpi2EventHbdDescriptor_t, MPI2_POINTER pMpi2EventHbdDescriptor_t;
921
922typedef struct _MPI2_EVENT_DATA_HBD_PHY {
923 U8 DescriptorType; /* 0x00 */
924 U8 Reserved1; /* 0x01 */
925 U16 Reserved2; /* 0x02 */
926 U32 Reserved3; /* 0x04 */
927 MPI2_EVENT_HBD_DESCRIPTOR Descriptor; /* 0x08 */
928} MPI2_EVENT_DATA_HBD_PHY, MPI2_POINTER PTR_MPI2_EVENT_DATA_HBD_PHY,
929 Mpi2EventDataHbdPhy_t, MPI2_POINTER pMpi2EventDataMpi2EventDataHbdPhy_t;
930
931/* values for the DescriptorType field */
932#define MPI2_EVENT_HBD_DT_SAS (0x01)
933
934
935
881/**************************************************************************** 936/****************************************************************************
882* EventAck message 937* EventAck message
883****************************************************************************/ 938****************************************************************************/
@@ -1126,13 +1181,17 @@ typedef struct _MPI2_FW_IMAGE_HEADER
1126#define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000) 1181#define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000)
1127#define MPI2_FW_HEADER_PID_TYPE_SAS (0x2000) 1182#define MPI2_FW_HEADER_PID_TYPE_SAS (0x2000)
1128 1183
1129#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00) 1184#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00)
1130#define MPI2_FW_HEADER_PID_PROD_A (0x0000) 1185#define MPI2_FW_HEADER_PID_PROD_A (0x0000)
1186#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00)
1187#define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
1188#define MPI2_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
1189
1131 1190
1132#define MPI2_FW_HEADER_PID_FAMILY_MASK (0x00FF) 1191#define MPI2_FW_HEADER_PID_FAMILY_MASK (0x00FF)
1133/* SAS */ 1192/* SAS */
1134#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0010) 1193#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0013)
1135#define MPI2_FW_HEADER_PID_FAMILY_2208_SAS (0x0011) 1194#define MPI2_FW_HEADER_PID_FAMILY_2208_SAS (0x0014)
1136 1195
1137/* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */ 1196/* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
1138 1197
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_sas.h b/drivers/scsi/mpt2sas/mpi/mpi2_sas.h
index 8a42b136cf53..2d8aeed51392 100644
--- a/drivers/scsi/mpt2sas/mpi/mpi2_sas.h
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_sas.h
@@ -6,7 +6,7 @@
6 * Title: MPI Serial Attached SCSI structures and definitions 6 * Title: MPI Serial Attached SCSI structures and definitions
7 * Creation Date: February 9, 2007 7 * Creation Date: February 9, 2007
8 * 8 *
9 * mpi2.h Version: 02.00.02 9 * mpi2.h Version: 02.00.03
10 * 10 *
11 * Version History 11 * Version History
12 * --------------- 12 * ---------------
@@ -18,6 +18,8 @@
18 * Control Request. 18 * Control Request.
19 * 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control 19 * 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
20 * Request. 20 * Request.
21 * 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST
22 * to MPI2_SGE_IO_UNION since it supports chained SGLs.
21 * -------------------------------------------------------------------------- 23 * --------------------------------------------------------------------------
22 */ 24 */
23 25
@@ -160,7 +162,7 @@ typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST
160 U32 Reserved4; /* 0x14 */ 162 U32 Reserved4; /* 0x14 */
161 U32 DataLength; /* 0x18 */ 163 U32 DataLength; /* 0x18 */
162 U8 CommandFIS[20]; /* 0x1C */ 164 U8 CommandFIS[20]; /* 0x1C */
163 MPI2_SIMPLE_SGE_UNION SGL; /* 0x20 */ 165 MPI2_SGE_IO_UNION SGL; /* 0x20 */
164} MPI2_SATA_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REQUEST, 166} MPI2_SATA_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REQUEST,
165 Mpi2SataPassthroughRequest_t, MPI2_POINTER pMpi2SataPassthroughRequest_t; 167 Mpi2SataPassthroughRequest_t, MPI2_POINTER pMpi2SataPassthroughRequest_t;
166 168
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c
index 89d02401b9ec..88e6eebc3159 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_base.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_base.c
@@ -107,8 +107,7 @@ _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
107 if (ret) 107 if (ret)
108 return ret; 108 return ret;
109 109
110 printk(KERN_INFO "setting logging_level(0x%08x)\n", 110 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
111 mpt2sas_fwfault_debug);
112 list_for_each_entry(ioc, &mpt2sas_ioc_list, list) 111 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
113 ioc->fwfault_debug = mpt2sas_fwfault_debug; 112 ioc->fwfault_debug = mpt2sas_fwfault_debug;
114 return 0; 113 return 0;
@@ -1222,6 +1221,8 @@ mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1222 u32 memap_sz; 1221 u32 memap_sz;
1223 u32 pio_sz; 1222 u32 pio_sz;
1224 int i, r = 0; 1223 int i, r = 0;
1224 u64 pio_chip = 0;
1225 u64 chip_phys = 0;
1225 1226
1226 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", 1227 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
1227 ioc->name, __func__)); 1228 ioc->name, __func__));
@@ -1255,12 +1256,13 @@ mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1255 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) { 1256 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
1256 if (pio_sz) 1257 if (pio_sz)
1257 continue; 1258 continue;
1258 ioc->pio_chip = pci_resource_start(pdev, i); 1259 pio_chip = (u64)pci_resource_start(pdev, i);
1259 pio_sz = pci_resource_len(pdev, i); 1260 pio_sz = pci_resource_len(pdev, i);
1260 } else { 1261 } else {
1261 if (memap_sz) 1262 if (memap_sz)
1262 continue; 1263 continue;
1263 ioc->chip_phys = pci_resource_start(pdev, i); 1264 ioc->chip_phys = pci_resource_start(pdev, i);
1265 chip_phys = (u64)ioc->chip_phys;
1264 memap_sz = pci_resource_len(pdev, i); 1266 memap_sz = pci_resource_len(pdev, i);
1265 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1267 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1266 if (ioc->chip == NULL) { 1268 if (ioc->chip == NULL) {
@@ -1280,10 +1282,10 @@ mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1280 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1282 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1281 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1283 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1282 "IO-APIC enabled"), ioc->pci_irq); 1284 "IO-APIC enabled"), ioc->pci_irq);
1283 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n", 1285 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1284 ioc->name, ioc->chip_phys, ioc->chip, memap_sz); 1286 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1285 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n", 1287 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1286 ioc->name, ioc->pio_chip, pio_sz); 1288 ioc->name, (unsigned long long)pio_chip, pio_sz);
1287 1289
1288 return 0; 1290 return 0;
1289 1291
@@ -3573,6 +3575,8 @@ mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3573 3575
3574 init_waitqueue_head(&ioc->reset_wq); 3576 init_waitqueue_head(&ioc->reset_wq);
3575 3577
3578 ioc->fwfault_debug = mpt2sas_fwfault_debug;
3579
3576 /* base internal command bits */ 3580 /* base internal command bits */
3577 mutex_init(&ioc->base_cmds.mutex); 3581 mutex_init(&ioc->base_cmds.mutex);
3578 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3582 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.h b/drivers/scsi/mpt2sas/mpt2sas_base.h
index bb4f14656afa..e18b0544c38f 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_base.h
+++ b/drivers/scsi/mpt2sas/mpt2sas_base.h
@@ -69,10 +69,10 @@
69#define MPT2SAS_DRIVER_NAME "mpt2sas" 69#define MPT2SAS_DRIVER_NAME "mpt2sas"
70#define MPT2SAS_AUTHOR "LSI Corporation <DL-MPTFusionLinux@lsi.com>" 70#define MPT2SAS_AUTHOR "LSI Corporation <DL-MPTFusionLinux@lsi.com>"
71#define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver" 71#define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
72#define MPT2SAS_DRIVER_VERSION "03.100.03.00" 72#define MPT2SAS_DRIVER_VERSION "04.100.01.00"
73#define MPT2SAS_MAJOR_VERSION 03 73#define MPT2SAS_MAJOR_VERSION 04
74#define MPT2SAS_MINOR_VERSION 100 74#define MPT2SAS_MINOR_VERSION 100
75#define MPT2SAS_BUILD_VERSION 03 75#define MPT2SAS_BUILD_VERSION 01
76#define MPT2SAS_RELEASE_VERSION 00 76#define MPT2SAS_RELEASE_VERSION 00
77 77
78/* 78/*
@@ -323,6 +323,7 @@ struct _sas_device {
323 * @device_info: bitfield provides detailed info about the hidden components 323 * @device_info: bitfield provides detailed info about the hidden components
324 * @num_pds: number of hidden raid components 324 * @num_pds: number of hidden raid components
325 * @responding: used in _scsih_raid_device_mark_responding 325 * @responding: used in _scsih_raid_device_mark_responding
326 * @percent_complete: resync percent complete
326 */ 327 */
327struct _raid_device { 328struct _raid_device {
328 struct list_head list; 329 struct list_head list;
@@ -336,6 +337,7 @@ struct _raid_device {
336 u32 device_info; 337 u32 device_info;
337 u8 num_pds; 338 u8 num_pds;
338 u8 responding; 339 u8 responding;
340 u8 percent_complete;
339}; 341};
340 342
341/** 343/**
@@ -464,7 +466,6 @@ typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
464 * @pdev: pci pdev object 466 * @pdev: pci pdev object
465 * @chip: memory mapped register space 467 * @chip: memory mapped register space
466 * @chip_phys: physical addrss prior to mapping 468 * @chip_phys: physical addrss prior to mapping
467 * @pio_chip: I/O mapped register space
468 * @logging_level: see mpt2sas_debug.h 469 * @logging_level: see mpt2sas_debug.h
469 * @fwfault_debug: debuging FW timeouts 470 * @fwfault_debug: debuging FW timeouts
470 * @ir_firmware: IR firmware present 471 * @ir_firmware: IR firmware present
@@ -587,8 +588,7 @@ struct MPT2SAS_ADAPTER {
587 char tmp_string[MPT_STRING_LENGTH]; 588 char tmp_string[MPT_STRING_LENGTH];
588 struct pci_dev *pdev; 589 struct pci_dev *pdev;
589 Mpi2SystemInterfaceRegs_t __iomem *chip; 590 Mpi2SystemInterfaceRegs_t __iomem *chip;
590 unsigned long chip_phys; 591 resource_size_t chip_phys;
591 unsigned long pio_chip;
592 int logging_level; 592 int logging_level;
593 int fwfault_debug; 593 int fwfault_debug;
594 u8 ir_firmware; 594 u8 ir_firmware;
@@ -853,6 +853,8 @@ int mpt2sas_config_set_iounit_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
853 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 853 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
854int mpt2sas_config_get_sas_iounit_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t 854int mpt2sas_config_get_sas_iounit_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
855 *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, u16 sz); 855 *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, u16 sz);
856int mpt2sas_config_set_sas_iounit_pg1(struct MPT2SAS_ADAPTER *ioc,
857 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, u16 sz);
856int mpt2sas_config_get_ioc_pg8(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t 858int mpt2sas_config_get_ioc_pg8(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
857 *mpi_reply, Mpi2IOCPage8_t *config_page); 859 *mpi_reply, Mpi2IOCPage8_t *config_page);
858int mpt2sas_config_get_expander_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t 860int mpt2sas_config_get_expander_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
diff --git a/drivers/scsi/mpt2sas/mpt2sas_config.c b/drivers/scsi/mpt2sas/mpt2sas_config.c
index 594a389c6526..411c27d7f787 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_config.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_config.c
@@ -324,7 +324,9 @@ _config_request(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigRequest_t
324 if (r != 0) 324 if (r != 0)
325 goto out; 325 goto out;
326 if (mpi_request->Action == 326 if (mpi_request->Action ==
327 MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT) { 327 MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT ||
328 mpi_request->Action ==
329 MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM) {
328 ioc->base_add_sg_single(&mpi_request->PageBufferSGE, 330 ioc->base_add_sg_single(&mpi_request->PageBufferSGE,
329 MPT2_CONFIG_COMMON_WRITE_SGLFLAGS | mem.sz, 331 MPT2_CONFIG_COMMON_WRITE_SGLFLAGS | mem.sz,
330 mem.page_dma); 332 mem.page_dma);
@@ -882,7 +884,7 @@ mpt2sas_config_get_sas_iounit_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
882} 884}
883 885
884/** 886/**
885 * mpt2sas_config_get_sas_iounit_pg1 - obtain sas iounit page 0 887 * mpt2sas_config_get_sas_iounit_pg1 - obtain sas iounit page 1
886 * @ioc: per adapter object 888 * @ioc: per adapter object
887 * @mpi_reply: reply mf payload returned from firmware 889 * @mpi_reply: reply mf payload returned from firmware
888 * @config_page: contents of the config page 890 * @config_page: contents of the config page
@@ -907,7 +909,7 @@ mpt2sas_config_get_sas_iounit_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
907 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 909 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
908 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT; 910 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
909 mpi_request.Header.PageNumber = 1; 911 mpi_request.Header.PageNumber = 1;
910 mpi_request.Header.PageVersion = MPI2_SASIOUNITPAGE0_PAGEVERSION; 912 mpi_request.Header.PageVersion = MPI2_SASIOUNITPAGE1_PAGEVERSION;
911 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE); 913 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
912 r = _config_request(ioc, &mpi_request, mpi_reply, 914 r = _config_request(ioc, &mpi_request, mpi_reply,
913 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0); 915 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
@@ -922,6 +924,49 @@ mpt2sas_config_get_sas_iounit_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
922} 924}
923 925
924/** 926/**
927 * mpt2sas_config_set_sas_iounit_pg1 - send sas iounit page 1
928 * @ioc: per adapter object
929 * @mpi_reply: reply mf payload returned from firmware
930 * @config_page: contents of the config page
931 * @sz: size of buffer passed in config_page
932 * Context: sleep.
933 *
934 * Calling function should call config_get_number_hba_phys prior to
935 * this function, so enough memory is allocated for config_page.
936 *
937 * Returns 0 for success, non-zero for failure.
938 */
939int
940mpt2sas_config_set_sas_iounit_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
941 *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, u16 sz)
942{
943 Mpi2ConfigRequest_t mpi_request;
944 int r;
945
946 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
947 mpi_request.Function = MPI2_FUNCTION_CONFIG;
948 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
949 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
950 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
951 mpi_request.Header.PageNumber = 1;
952 mpi_request.Header.PageVersion = MPI2_SASIOUNITPAGE1_PAGEVERSION;
953 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
954 r = _config_request(ioc, &mpi_request, mpi_reply,
955 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
956 if (r)
957 goto out;
958
959 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT;
960 _config_request(ioc, &mpi_request, mpi_reply,
961 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page, sz);
962 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM;
963 r = _config_request(ioc, &mpi_request, mpi_reply,
964 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page, sz);
965 out:
966 return r;
967}
968
969/**
925 * mpt2sas_config_get_expander_pg0 - obtain expander page 0 970 * mpt2sas_config_get_expander_pg0 - obtain expander page 0
926 * @ioc: per adapter object 971 * @ioc: per adapter object
927 * @mpi_reply: reply mf payload returned from firmware 972 * @mpi_reply: reply mf payload returned from firmware
diff --git a/drivers/scsi/mpt2sas/mpt2sas_ctl.c b/drivers/scsi/mpt2sas/mpt2sas_ctl.c
index 84a124f8e21f..fa9bf83819d5 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_ctl.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_ctl.c
@@ -891,6 +891,7 @@ _ctl_do_mpt_command(struct MPT2SAS_ADAPTER *ioc,
891 891
892 issue_host_reset: 892 issue_host_reset:
893 if (issue_reset) { 893 if (issue_reset) {
894 ret = -ENODATA;
894 if ((mpi_request->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 895 if ((mpi_request->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
895 mpi_request->Function == 896 mpi_request->Function ==
896 MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH)) { 897 MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH)) {
@@ -2202,14 +2203,10 @@ _ctl_compat_mpt_command(struct file *file, unsigned cmd, unsigned long arg)
2202 karg.data_out_size = karg32.data_out_size; 2203 karg.data_out_size = karg32.data_out_size;
2203 karg.max_sense_bytes = karg32.max_sense_bytes; 2204 karg.max_sense_bytes = karg32.max_sense_bytes;
2204 karg.data_sge_offset = karg32.data_sge_offset; 2205 karg.data_sge_offset = karg32.data_sge_offset;
2205 memcpy(&karg.reply_frame_buf_ptr, &karg32.reply_frame_buf_ptr, 2206 karg.reply_frame_buf_ptr = compat_ptr(karg32.reply_frame_buf_ptr);
2206 sizeof(uint32_t)); 2207 karg.data_in_buf_ptr = compat_ptr(karg32.data_in_buf_ptr);
2207 memcpy(&karg.data_in_buf_ptr, &karg32.data_in_buf_ptr, 2208 karg.data_out_buf_ptr = compat_ptr(karg32.data_out_buf_ptr);
2208 sizeof(uint32_t)); 2209 karg.sense_data_ptr = compat_ptr(karg32.sense_data_ptr);
2209 memcpy(&karg.data_out_buf_ptr, &karg32.data_out_buf_ptr,
2210 sizeof(uint32_t));
2211 memcpy(&karg.sense_data_ptr, &karg32.sense_data_ptr,
2212 sizeof(uint32_t));
2213 state = (file->f_flags & O_NONBLOCK) ? NON_BLOCKING : BLOCKING; 2210 state = (file->f_flags & O_NONBLOCK) ? NON_BLOCKING : BLOCKING;
2214 return _ctl_do_mpt_command(ioc, karg, &uarg->mf, state); 2211 return _ctl_do_mpt_command(ioc, karg, &uarg->mf, state);
2215} 2212}
diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
index efabea1a3ce4..c7ec3f174782 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_scsih.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
@@ -52,6 +52,7 @@
52#include <linux/delay.h> 52#include <linux/delay.h>
53#include <linux/pci.h> 53#include <linux/pci.h>
54#include <linux/interrupt.h> 54#include <linux/interrupt.h>
55#include <linux/raid_class.h>
55 56
56#include "mpt2sas_base.h" 57#include "mpt2sas_base.h"
57 58
@@ -133,6 +134,9 @@ struct fw_event_work {
133 void *event_data; 134 void *event_data;
134}; 135};
135 136
137/* raid transport support */
138static struct raid_template *mpt2sas_raid_template;
139
136/** 140/**
137 * struct _scsi_io_transfer - scsi io transfer 141 * struct _scsi_io_transfer - scsi io transfer
138 * @handle: sas device handle (assigned by firmware) 142 * @handle: sas device handle (assigned by firmware)
@@ -1305,7 +1309,6 @@ _scsih_slave_alloc(struct scsi_device *sdev)
1305 struct MPT2SAS_DEVICE *sas_device_priv_data; 1309 struct MPT2SAS_DEVICE *sas_device_priv_data;
1306 struct scsi_target *starget; 1310 struct scsi_target *starget;
1307 struct _raid_device *raid_device; 1311 struct _raid_device *raid_device;
1308 struct _sas_device *sas_device;
1309 unsigned long flags; 1312 unsigned long flags;
1310 1313
1311 sas_device_priv_data = kzalloc(sizeof(struct scsi_device), GFP_KERNEL); 1314 sas_device_priv_data = kzalloc(sizeof(struct scsi_device), GFP_KERNEL);
@@ -1332,21 +1335,8 @@ _scsih_slave_alloc(struct scsi_device *sdev)
1332 if (raid_device) 1335 if (raid_device)
1333 raid_device->sdev = sdev; /* raid is single lun */ 1336 raid_device->sdev = sdev; /* raid is single lun */
1334 spin_unlock_irqrestore(&ioc->raid_device_lock, flags); 1337 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
1335 } else {
1336 /* set TLR bit for SSP devices */
1337 if (!(ioc->facts.IOCCapabilities &
1338 MPI2_IOCFACTS_CAPABILITY_TLR))
1339 goto out;
1340 spin_lock_irqsave(&ioc->sas_device_lock, flags);
1341 sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,
1342 sas_device_priv_data->sas_target->sas_address);
1343 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
1344 if (sas_device && sas_device->device_info &
1345 MPI2_SAS_DEVICE_INFO_SSP_TARGET)
1346 sas_device_priv_data->flags |= MPT_DEVICE_TLR_ON;
1347 } 1338 }
1348 1339
1349 out:
1350 return 0; 1340 return 0;
1351} 1341}
1352 1342
@@ -1419,6 +1409,140 @@ _scsih_display_sata_capabilities(struct MPT2SAS_ADAPTER *ioc,
1419} 1409}
1420 1410
1421/** 1411/**
1412 * _scsih_is_raid - return boolean indicating device is raid volume
1413 * @dev the device struct object
1414 */
1415static int
1416_scsih_is_raid(struct device *dev)
1417{
1418 struct scsi_device *sdev = to_scsi_device(dev);
1419
1420 return (sdev->channel == RAID_CHANNEL) ? 1 : 0;
1421}
1422
1423/**
1424 * _scsih_get_resync - get raid volume resync percent complete
1425 * @dev the device struct object
1426 */
1427static void
1428_scsih_get_resync(struct device *dev)
1429{
1430 struct scsi_device *sdev = to_scsi_device(dev);
1431 struct MPT2SAS_ADAPTER *ioc = shost_priv(sdev->host);
1432 static struct _raid_device *raid_device;
1433 unsigned long flags;
1434 Mpi2RaidVolPage0_t vol_pg0;
1435 Mpi2ConfigReply_t mpi_reply;
1436 u32 volume_status_flags;
1437 u8 percent_complete = 0;
1438
1439 spin_lock_irqsave(&ioc->raid_device_lock, flags);
1440 raid_device = _scsih_raid_device_find_by_id(ioc, sdev->id,
1441 sdev->channel);
1442 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
1443
1444 if (!raid_device)
1445 goto out;
1446
1447 if (mpt2sas_config_get_raid_volume_pg0(ioc, &mpi_reply, &vol_pg0,
1448 MPI2_RAID_VOLUME_PGAD_FORM_HANDLE, raid_device->handle,
1449 sizeof(Mpi2RaidVolPage0_t))) {
1450 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1451 ioc->name, __FILE__, __LINE__, __func__);
1452 goto out;
1453 }
1454
1455 volume_status_flags = le32_to_cpu(vol_pg0.VolumeStatusFlags);
1456 if (volume_status_flags & MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS)
1457 percent_complete = raid_device->percent_complete;
1458 out:
1459 raid_set_resync(mpt2sas_raid_template, dev, percent_complete);
1460}
1461
1462/**
1463 * _scsih_get_state - get raid volume level
1464 * @dev the device struct object
1465 */
1466static void
1467_scsih_get_state(struct device *dev)
1468{
1469 struct scsi_device *sdev = to_scsi_device(dev);
1470 struct MPT2SAS_ADAPTER *ioc = shost_priv(sdev->host);
1471 static struct _raid_device *raid_device;
1472 unsigned long flags;
1473 Mpi2RaidVolPage0_t vol_pg0;
1474 Mpi2ConfigReply_t mpi_reply;
1475 u32 volstate;
1476 enum raid_state state = RAID_STATE_UNKNOWN;
1477
1478 spin_lock_irqsave(&ioc->raid_device_lock, flags);
1479 raid_device = _scsih_raid_device_find_by_id(ioc, sdev->id,
1480 sdev->channel);
1481 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
1482
1483 if (!raid_device)
1484 goto out;
1485
1486 if (mpt2sas_config_get_raid_volume_pg0(ioc, &mpi_reply, &vol_pg0,
1487 MPI2_RAID_VOLUME_PGAD_FORM_HANDLE, raid_device->handle,
1488 sizeof(Mpi2RaidVolPage0_t))) {
1489 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1490 ioc->name, __FILE__, __LINE__, __func__);
1491 goto out;
1492 }
1493
1494 volstate = le32_to_cpu(vol_pg0.VolumeStatusFlags);
1495 if (volstate & MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS) {
1496 state = RAID_STATE_RESYNCING;
1497 goto out;
1498 }
1499
1500 switch (vol_pg0.VolumeState) {
1501 case MPI2_RAID_VOL_STATE_OPTIMAL:
1502 case MPI2_RAID_VOL_STATE_ONLINE:
1503 state = RAID_STATE_ACTIVE;
1504 break;
1505 case MPI2_RAID_VOL_STATE_DEGRADED:
1506 state = RAID_STATE_DEGRADED;
1507 break;
1508 case MPI2_RAID_VOL_STATE_FAILED:
1509 case MPI2_RAID_VOL_STATE_MISSING:
1510 state = RAID_STATE_OFFLINE;
1511 break;
1512 }
1513 out:
1514 raid_set_state(mpt2sas_raid_template, dev, state);
1515}
1516
1517/**
1518 * _scsih_set_level - set raid level
1519 * @sdev: scsi device struct
1520 * @raid_device: raid_device object
1521 */
1522static void
1523_scsih_set_level(struct scsi_device *sdev, struct _raid_device *raid_device)
1524{
1525 enum raid_level level = RAID_LEVEL_UNKNOWN;
1526
1527 switch (raid_device->volume_type) {
1528 case MPI2_RAID_VOL_TYPE_RAID0:
1529 level = RAID_LEVEL_0;
1530 break;
1531 case MPI2_RAID_VOL_TYPE_RAID10:
1532 level = RAID_LEVEL_10;
1533 break;
1534 case MPI2_RAID_VOL_TYPE_RAID1E:
1535 level = RAID_LEVEL_1E;
1536 break;
1537 case MPI2_RAID_VOL_TYPE_RAID1:
1538 level = RAID_LEVEL_1;
1539 break;
1540 }
1541
1542 raid_set_level(mpt2sas_raid_template, &sdev->sdev_gendev, level);
1543}
1544
1545/**
1422 * _scsih_get_volume_capabilities - volume capabilities 1546 * _scsih_get_volume_capabilities - volume capabilities
1423 * @ioc: per adapter object 1547 * @ioc: per adapter object
1424 * @sas_device: the raid_device object 1548 * @sas_device: the raid_device object
@@ -1479,6 +1603,32 @@ _scsih_get_volume_capabilities(struct MPT2SAS_ADAPTER *ioc,
1479} 1603}
1480 1604
1481/** 1605/**
1606 * _scsih_enable_tlr - setting TLR flags
1607 * @ioc: per adapter object
1608 * @sdev: scsi device struct
1609 *
1610 * Enabling Transaction Layer Retries for tape devices when
1611 * vpd page 0x90 is present
1612 *
1613 */
1614static void
1615_scsih_enable_tlr(struct MPT2SAS_ADAPTER *ioc, struct scsi_device *sdev)
1616{
1617 /* only for TAPE */
1618 if (sdev->type != TYPE_TAPE)
1619 return;
1620
1621 if (!(ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR))
1622 return;
1623
1624 sas_enable_tlr(sdev);
1625 sdev_printk(KERN_INFO, sdev, "TLR %s\n",
1626 sas_is_tlr_enabled(sdev) ? "Enabled" : "Disabled");
1627 return;
1628
1629}
1630
1631/**
1482 * _scsih_slave_configure - device configure routine. 1632 * _scsih_slave_configure - device configure routine.
1483 * @sdev: scsi device struct 1633 * @sdev: scsi device struct
1484 * 1634 *
@@ -1574,6 +1724,8 @@ _scsih_slave_configure(struct scsi_device *sdev)
1574 (unsigned long long)raid_device->wwid, 1724 (unsigned long long)raid_device->wwid,
1575 raid_device->num_pds, ds); 1725 raid_device->num_pds, ds);
1576 _scsih_change_queue_depth(sdev, qdepth, SCSI_QDEPTH_DEFAULT); 1726 _scsih_change_queue_depth(sdev, qdepth, SCSI_QDEPTH_DEFAULT);
1727 /* raid transport support */
1728 _scsih_set_level(sdev, raid_device);
1577 return 0; 1729 return 0;
1578 } 1730 }
1579 1731
@@ -1621,8 +1773,10 @@ _scsih_slave_configure(struct scsi_device *sdev)
1621 1773
1622 _scsih_change_queue_depth(sdev, qdepth, SCSI_QDEPTH_DEFAULT); 1774 _scsih_change_queue_depth(sdev, qdepth, SCSI_QDEPTH_DEFAULT);
1623 1775
1624 if (ssp_target) 1776 if (ssp_target) {
1625 sas_read_port_mode_page(sdev); 1777 sas_read_port_mode_page(sdev);
1778 _scsih_enable_tlr(ioc, sdev);
1779 }
1626 return 0; 1780 return 0;
1627} 1781}
1628 1782
@@ -2908,8 +3062,9 @@ _scsih_qcmd(struct scsi_cmnd *scmd, void (*done)(struct scsi_cmnd *))
2908 3062
2909 } else 3063 } else
2910 mpi_control |= MPI2_SCSIIO_CONTROL_SIMPLEQ; 3064 mpi_control |= MPI2_SCSIIO_CONTROL_SIMPLEQ;
2911 3065 /* Make sure Device is not raid volume */
2912 if ((sas_device_priv_data->flags & MPT_DEVICE_TLR_ON)) 3066 if (!_scsih_is_raid(&scmd->device->sdev_gendev) &&
3067 sas_is_tlr_enabled(scmd->device))
2913 mpi_control |= MPI2_SCSIIO_CONTROL_TLR_ON; 3068 mpi_control |= MPI2_SCSIIO_CONTROL_TLR_ON;
2914 3069
2915 smid = mpt2sas_base_get_smid_scsiio(ioc, ioc->scsi_io_cb_idx, scmd); 3070 smid = mpt2sas_base_get_smid_scsiio(ioc, ioc->scsi_io_cb_idx, scmd);
@@ -3298,10 +3453,12 @@ _scsih_io_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply)
3298 le32_to_cpu(mpi_reply->ResponseInfo) & 0xFF; 3453 le32_to_cpu(mpi_reply->ResponseInfo) & 0xFF;
3299 if (!sas_device_priv_data->tlr_snoop_check) { 3454 if (!sas_device_priv_data->tlr_snoop_check) {
3300 sas_device_priv_data->tlr_snoop_check++; 3455 sas_device_priv_data->tlr_snoop_check++;
3301 if ((sas_device_priv_data->flags & MPT_DEVICE_TLR_ON) && 3456 if (!_scsih_is_raid(&scmd->device->sdev_gendev) &&
3302 response_code == MPI2_SCSITASKMGMT_RSP_INVALID_FRAME) 3457 sas_is_tlr_enabled(scmd->device) &&
3303 sas_device_priv_data->flags &= 3458 response_code == MPI2_SCSITASKMGMT_RSP_INVALID_FRAME) {
3304 ~MPT_DEVICE_TLR_ON; 3459 sas_disable_tlr(scmd->device);
3460 sdev_printk(KERN_INFO, scmd->device, "TLR disabled\n");
3461 }
3305 } 3462 }
3306 3463
3307 xfer_cnt = le32_to_cpu(mpi_reply->TransferCount); 3464 xfer_cnt = le32_to_cpu(mpi_reply->TransferCount);
@@ -5170,11 +5327,33 @@ static void
5170_scsih_sas_ir_operation_status_event(struct MPT2SAS_ADAPTER *ioc, 5327_scsih_sas_ir_operation_status_event(struct MPT2SAS_ADAPTER *ioc,
5171 struct fw_event_work *fw_event) 5328 struct fw_event_work *fw_event)
5172{ 5329{
5330 Mpi2EventDataIrOperationStatus_t *event_data = fw_event->event_data;
5331 static struct _raid_device *raid_device;
5332 unsigned long flags;
5333 u16 handle;
5334
5173#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 5335#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
5174 if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK) 5336 if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK)
5175 _scsih_sas_ir_operation_status_event_debug(ioc, 5337 _scsih_sas_ir_operation_status_event_debug(ioc,
5176 fw_event->event_data); 5338 event_data);
5177#endif 5339#endif
5340
5341 /* code added for raid transport support */
5342 if (event_data->RAIDOperation == MPI2_EVENT_IR_RAIDOP_RESYNC) {
5343
5344 handle = le16_to_cpu(event_data->VolDevHandle);
5345
5346 spin_lock_irqsave(&ioc->raid_device_lock, flags);
5347 raid_device = _scsih_raid_device_find_by_handle(ioc, handle);
5348 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
5349
5350 if (!raid_device)
5351 return;
5352
5353 if (event_data->RAIDOperation == MPI2_EVENT_IR_RAIDOP_RESYNC)
5354 raid_device->percent_complete =
5355 event_data->PercentComplete;
5356 }
5178} 5357}
5179 5358
5180/** 5359/**
@@ -5998,6 +6177,8 @@ _scsih_remove(struct pci_dev *pdev)
5998 struct _sas_port *mpt2sas_port; 6177 struct _sas_port *mpt2sas_port;
5999 struct _sas_device *sas_device; 6178 struct _sas_device *sas_device;
6000 struct _sas_node *expander_sibling; 6179 struct _sas_node *expander_sibling;
6180 struct _raid_device *raid_device, *next;
6181 struct MPT2SAS_TARGET *sas_target_priv_data;
6001 struct workqueue_struct *wq; 6182 struct workqueue_struct *wq;
6002 unsigned long flags; 6183 unsigned long flags;
6003 6184
@@ -6011,6 +6192,21 @@ _scsih_remove(struct pci_dev *pdev)
6011 if (wq) 6192 if (wq)
6012 destroy_workqueue(wq); 6193 destroy_workqueue(wq);
6013 6194
6195 /* release all the volumes */
6196 list_for_each_entry_safe(raid_device, next, &ioc->raid_device_list,
6197 list) {
6198 if (raid_device->starget) {
6199 sas_target_priv_data =
6200 raid_device->starget->hostdata;
6201 sas_target_priv_data->deleted = 1;
6202 scsi_remove_target(&raid_device->starget->dev);
6203 }
6204 printk(MPT2SAS_INFO_FMT "removing handle(0x%04x), wwid"
6205 "(0x%016llx)\n", ioc->name, raid_device->handle,
6206 (unsigned long long) raid_device->wwid);
6207 _scsih_raid_device_remove(ioc, raid_device);
6208 }
6209
6014 /* free ports attached to the sas_host */ 6210 /* free ports attached to the sas_host */
6015 retry_again: 6211 retry_again:
6016 list_for_each_entry(mpt2sas_port, 6212 list_for_each_entry(mpt2sas_port,
@@ -6373,6 +6569,13 @@ static struct pci_driver scsih_driver = {
6373#endif 6569#endif
6374}; 6570};
6375 6571
6572/* raid transport support */
6573static struct raid_function_template mpt2sas_raid_functions = {
6574 .cookie = &scsih_driver_template,
6575 .is_raid = _scsih_is_raid,
6576 .get_resync = _scsih_get_resync,
6577 .get_state = _scsih_get_state,
6578};
6376 6579
6377/** 6580/**
6378 * _scsih_init - main entry point for this driver. 6581 * _scsih_init - main entry point for this driver.
@@ -6392,6 +6595,12 @@ _scsih_init(void)
6392 sas_attach_transport(&mpt2sas_transport_functions); 6595 sas_attach_transport(&mpt2sas_transport_functions);
6393 if (!mpt2sas_transport_template) 6596 if (!mpt2sas_transport_template)
6394 return -ENODEV; 6597 return -ENODEV;
6598 /* raid transport support */
6599 mpt2sas_raid_template = raid_class_attach(&mpt2sas_raid_functions);
6600 if (!mpt2sas_raid_template) {
6601 sas_release_transport(mpt2sas_transport_template);
6602 return -ENODEV;
6603 }
6395 6604
6396 mpt2sas_base_initialize_callback_handler(); 6605 mpt2sas_base_initialize_callback_handler();
6397 6606
@@ -6426,8 +6635,11 @@ _scsih_init(void)
6426 mpt2sas_ctl_init(); 6635 mpt2sas_ctl_init();
6427 6636
6428 error = pci_register_driver(&scsih_driver); 6637 error = pci_register_driver(&scsih_driver);
6429 if (error) 6638 if (error) {
6639 /* raid transport support */
6640 raid_class_release(mpt2sas_raid_template);
6430 sas_release_transport(mpt2sas_transport_template); 6641 sas_release_transport(mpt2sas_transport_template);
6642 }
6431 6643
6432 return error; 6644 return error;
6433} 6645}
@@ -6445,7 +6657,8 @@ _scsih_exit(void)
6445 6657
6446 pci_unregister_driver(&scsih_driver); 6658 pci_unregister_driver(&scsih_driver);
6447 6659
6448 sas_release_transport(mpt2sas_transport_template); 6660 mpt2sas_ctl_exit();
6661
6449 mpt2sas_base_release_callback_handler(scsi_io_cb_idx); 6662 mpt2sas_base_release_callback_handler(scsi_io_cb_idx);
6450 mpt2sas_base_release_callback_handler(tm_cb_idx); 6663 mpt2sas_base_release_callback_handler(tm_cb_idx);
6451 mpt2sas_base_release_callback_handler(base_cb_idx); 6664 mpt2sas_base_release_callback_handler(base_cb_idx);
@@ -6457,7 +6670,10 @@ _scsih_exit(void)
6457 mpt2sas_base_release_callback_handler(tm_tr_cb_idx); 6670 mpt2sas_base_release_callback_handler(tm_tr_cb_idx);
6458 mpt2sas_base_release_callback_handler(tm_sas_control_cb_idx); 6671 mpt2sas_base_release_callback_handler(tm_sas_control_cb_idx);
6459 6672
6460 mpt2sas_ctl_exit(); 6673 /* raid transport support */
6674 raid_class_release(mpt2sas_raid_template);
6675 sas_release_transport(mpt2sas_transport_template);
6676
6461} 6677}
6462 6678
6463module_init(_scsih_init); 6679module_init(_scsih_init);
diff --git a/drivers/scsi/mpt2sas/mpt2sas_transport.c b/drivers/scsi/mpt2sas/mpt2sas_transport.c
index 3a82872bad44..789f9ee7f001 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_transport.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_transport.c
@@ -855,6 +855,17 @@ rphy_to_ioc(struct sas_rphy *rphy)
855 return shost_priv(shost); 855 return shost_priv(shost);
856} 856}
857 857
858static struct _sas_phy *
859_transport_find_local_phy(struct MPT2SAS_ADAPTER *ioc, struct sas_phy *phy)
860{
861 int i;
862
863 for (i = 0; i < ioc->sas_hba.num_phys; i++)
864 if (ioc->sas_hba.phy[i].phy == phy)
865 return(&ioc->sas_hba.phy[i]);
866 return NULL;
867}
868
858/** 869/**
859 * _transport_get_linkerrors - 870 * _transport_get_linkerrors -
860 * @phy: The sas phy object 871 * @phy: The sas phy object
@@ -870,14 +881,8 @@ _transport_get_linkerrors(struct sas_phy *phy)
870 struct _sas_phy *mpt2sas_phy; 881 struct _sas_phy *mpt2sas_phy;
871 Mpi2ConfigReply_t mpi_reply; 882 Mpi2ConfigReply_t mpi_reply;
872 Mpi2SasPhyPage1_t phy_pg1; 883 Mpi2SasPhyPage1_t phy_pg1;
873 int i;
874 884
875 for (i = 0, mpt2sas_phy = NULL; i < ioc->sas_hba.num_phys && 885 mpt2sas_phy = _transport_find_local_phy(ioc, phy);
876 !mpt2sas_phy; i++) {
877 if (ioc->sas_hba.phy[i].phy != phy)
878 continue;
879 mpt2sas_phy = &ioc->sas_hba.phy[i];
880 }
881 886
882 if (!mpt2sas_phy) /* this phy not on sas_host */ 887 if (!mpt2sas_phy) /* this phy not on sas_host */
883 return -EINVAL; 888 return -EINVAL;
@@ -971,14 +976,8 @@ _transport_phy_reset(struct sas_phy *phy, int hard_reset)
971 struct _sas_phy *mpt2sas_phy; 976 struct _sas_phy *mpt2sas_phy;
972 Mpi2SasIoUnitControlReply_t mpi_reply; 977 Mpi2SasIoUnitControlReply_t mpi_reply;
973 Mpi2SasIoUnitControlRequest_t mpi_request; 978 Mpi2SasIoUnitControlRequest_t mpi_request;
974 int i;
975 979
976 for (i = 0, mpt2sas_phy = NULL; i < ioc->sas_hba.num_phys && 980 mpt2sas_phy = _transport_find_local_phy(ioc, phy);
977 !mpt2sas_phy; i++) {
978 if (ioc->sas_hba.phy[i].phy != phy)
979 continue;
980 mpt2sas_phy = &ioc->sas_hba.phy[i];
981 }
982 981
983 if (!mpt2sas_phy) /* this phy not on sas_host */ 982 if (!mpt2sas_phy) /* this phy not on sas_host */
984 return -EINVAL; 983 return -EINVAL;
@@ -1006,6 +1005,173 @@ _transport_phy_reset(struct sas_phy *phy, int hard_reset)
1006} 1005}
1007 1006
1008/** 1007/**
1008 * _transport_phy_enable - enable/disable phys
1009 * @phy: The sas phy object
1010 * @enable: enable phy when true
1011 *
1012 * Only support sas_host direct attached phys.
1013 * Returns 0 for success, non-zero for failure.
1014 */
1015static int
1016_transport_phy_enable(struct sas_phy *phy, int enable)
1017{
1018 struct MPT2SAS_ADAPTER *ioc = phy_to_ioc(phy);
1019 struct _sas_phy *mpt2sas_phy;
1020 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
1021 Mpi2ConfigReply_t mpi_reply;
1022 u16 ioc_status;
1023 u16 sz;
1024 int rc = 0;
1025
1026 mpt2sas_phy = _transport_find_local_phy(ioc, phy);
1027
1028 if (!mpt2sas_phy) /* this phy not on sas_host */
1029 return -EINVAL;
1030
1031 /* sas_iounit page 1 */
1032 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (ioc->sas_hba.num_phys *
1033 sizeof(Mpi2SasIOUnit1PhyData_t));
1034 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
1035 if (!sas_iounit_pg1) {
1036 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1037 ioc->name, __FILE__, __LINE__, __func__);
1038 rc = -ENOMEM;
1039 goto out;
1040 }
1041 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
1042 sas_iounit_pg1, sz))) {
1043 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1044 ioc->name, __FILE__, __LINE__, __func__);
1045 rc = -ENXIO;
1046 goto out;
1047 }
1048 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
1049 MPI2_IOCSTATUS_MASK;
1050 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
1051 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1052 ioc->name, __FILE__, __LINE__, __func__);
1053 rc = -EIO;
1054 goto out;
1055 }
1056
1057 if (enable)
1058 sas_iounit_pg1->PhyData[mpt2sas_phy->phy_id].PhyFlags
1059 &= ~MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE;
1060 else
1061 sas_iounit_pg1->PhyData[mpt2sas_phy->phy_id].PhyFlags
1062 |= MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE;
1063
1064 mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1, sz);
1065
1066 out:
1067 kfree(sas_iounit_pg1);
1068 return rc;
1069}
1070
1071/**
1072 * _transport_phy_speed - set phy min/max link rates
1073 * @phy: The sas phy object
1074 * @rates: rates defined in sas_phy_linkrates
1075 *
1076 * Only support sas_host direct attached phys.
1077 * Returns 0 for success, non-zero for failure.
1078 */
1079static int
1080_transport_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
1081{
1082 struct MPT2SAS_ADAPTER *ioc = phy_to_ioc(phy);
1083 struct _sas_phy *mpt2sas_phy;
1084 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
1085 Mpi2SasPhyPage0_t phy_pg0;
1086 Mpi2ConfigReply_t mpi_reply;
1087 u16 ioc_status;
1088 u16 sz;
1089 int i;
1090 int rc = 0;
1091
1092 mpt2sas_phy = _transport_find_local_phy(ioc, phy);
1093
1094 if (!mpt2sas_phy) /* this phy not on sas_host */
1095 return -EINVAL;
1096
1097 if (!rates->minimum_linkrate)
1098 rates->minimum_linkrate = phy->minimum_linkrate;
1099 else if (rates->minimum_linkrate < phy->minimum_linkrate_hw)
1100 rates->minimum_linkrate = phy->minimum_linkrate_hw;
1101
1102 if (!rates->maximum_linkrate)
1103 rates->maximum_linkrate = phy->maximum_linkrate;
1104 else if (rates->maximum_linkrate > phy->maximum_linkrate_hw)
1105 rates->maximum_linkrate = phy->maximum_linkrate_hw;
1106
1107 /* sas_iounit page 1 */
1108 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (ioc->sas_hba.num_phys *
1109 sizeof(Mpi2SasIOUnit1PhyData_t));
1110 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
1111 if (!sas_iounit_pg1) {
1112 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1113 ioc->name, __FILE__, __LINE__, __func__);
1114 rc = -ENOMEM;
1115 goto out;
1116 }
1117 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
1118 sas_iounit_pg1, sz))) {
1119 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1120 ioc->name, __FILE__, __LINE__, __func__);
1121 rc = -ENXIO;
1122 goto out;
1123 }
1124 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
1125 MPI2_IOCSTATUS_MASK;
1126 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
1127 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1128 ioc->name, __FILE__, __LINE__, __func__);
1129 rc = -EIO;
1130 goto out;
1131 }
1132
1133 for (i = 0; i < ioc->sas_hba.num_phys; i++) {
1134 if (mpt2sas_phy->phy_id != i) {
1135 sas_iounit_pg1->PhyData[i].MaxMinLinkRate =
1136 (ioc->sas_hba.phy[i].phy->minimum_linkrate +
1137 (ioc->sas_hba.phy[i].phy->maximum_linkrate << 4));
1138 } else {
1139 sas_iounit_pg1->PhyData[i].MaxMinLinkRate =
1140 (rates->minimum_linkrate +
1141 (rates->maximum_linkrate << 4));
1142 }
1143 }
1144
1145 if (mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
1146 sz)) {
1147 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1148 ioc->name, __FILE__, __LINE__, __func__);
1149 rc = -ENXIO;
1150 goto out;
1151 }
1152
1153 /* link reset */
1154 _transport_phy_reset(phy, 0);
1155
1156 /* read phy page 0, then update the rates in the sas transport phy */
1157 if (!mpt2sas_config_get_phy_pg0(ioc, &mpi_reply, &phy_pg0,
1158 mpt2sas_phy->phy_id)) {
1159 phy->minimum_linkrate = _transport_convert_phy_link_rate(
1160 phy_pg0.ProgrammedLinkRate & MPI2_SAS_PRATE_MIN_RATE_MASK);
1161 phy->maximum_linkrate = _transport_convert_phy_link_rate(
1162 phy_pg0.ProgrammedLinkRate >> 4);
1163 phy->negotiated_linkrate = _transport_convert_phy_link_rate(
1164 phy_pg0.NegotiatedLinkRate &
1165 MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL);
1166 }
1167
1168 out:
1169 kfree(sas_iounit_pg1);
1170 return rc;
1171}
1172
1173
1174/**
1009 * _transport_smp_handler - transport portal for smp passthru 1175 * _transport_smp_handler - transport portal for smp passthru
1010 * @shost: shost object 1176 * @shost: shost object
1011 * @rphy: sas transport rphy object 1177 * @rphy: sas transport rphy object
@@ -1207,6 +1373,8 @@ struct sas_function_template mpt2sas_transport_functions = {
1207 .get_enclosure_identifier = _transport_get_enclosure_identifier, 1373 .get_enclosure_identifier = _transport_get_enclosure_identifier,
1208 .get_bay_identifier = _transport_get_bay_identifier, 1374 .get_bay_identifier = _transport_get_bay_identifier,
1209 .phy_reset = _transport_phy_reset, 1375 .phy_reset = _transport_phy_reset,
1376 .phy_enable = _transport_phy_enable,
1377 .set_phy_speed = _transport_phy_speed,
1210 .smp_handler = _transport_smp_handler, 1378 .smp_handler = _transport_smp_handler,
1211}; 1379};
1212 1380
diff --git a/drivers/scsi/pm8001/pm8001_init.c b/drivers/scsi/pm8001/pm8001_init.c
index c2f1032496cb..f80c1da8f6ca 100644
--- a/drivers/scsi/pm8001/pm8001_init.c
+++ b/drivers/scsi/pm8001/pm8001_init.c
@@ -654,7 +654,7 @@ static int __devinit pm8001_pci_probe(struct pci_dev *pdev,
654 } 654 }
655 chip = &pm8001_chips[ent->driver_data]; 655 chip = &pm8001_chips[ent->driver_data];
656 SHOST_TO_SAS_HA(shost) = 656 SHOST_TO_SAS_HA(shost) =
657 kcalloc(1, sizeof(struct sas_ha_struct), GFP_KERNEL); 657 kzalloc(sizeof(struct sas_ha_struct), GFP_KERNEL);
658 if (!SHOST_TO_SAS_HA(shost)) { 658 if (!SHOST_TO_SAS_HA(shost)) {
659 rc = -ENOMEM; 659 rc = -ENOMEM;
660 goto err_out_free_host; 660 goto err_out_free_host;
diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c
index 8371d917a9a2..49ac4148493b 100644
--- a/drivers/scsi/qla1280.c
+++ b/drivers/scsi/qla1280.c
@@ -1640,8 +1640,10 @@ qla1280_load_firmware_pio(struct scsi_qla_host *ha)
1640 uint16_t mb[MAILBOX_REGISTER_COUNT], i; 1640 uint16_t mb[MAILBOX_REGISTER_COUNT], i;
1641 int err; 1641 int err;
1642 1642
1643 spin_unlock_irq(ha->host->host_lock);
1643 err = request_firmware(&fw, ql1280_board_tbl[ha->devnum].fwname, 1644 err = request_firmware(&fw, ql1280_board_tbl[ha->devnum].fwname,
1644 &ha->pdev->dev); 1645 &ha->pdev->dev);
1646 spin_lock_irq(ha->host->host_lock);
1645 if (err) { 1647 if (err) {
1646 printk(KERN_ERR "Failed to load image \"%s\" err %d\n", 1648 printk(KERN_ERR "Failed to load image \"%s\" err %d\n",
1647 ql1280_board_tbl[ha->devnum].fwname, err); 1649 ql1280_board_tbl[ha->devnum].fwname, err);
@@ -1699,8 +1701,10 @@ qla1280_load_firmware_dma(struct scsi_qla_host *ha)
1699 return -ENOMEM; 1701 return -ENOMEM;
1700#endif 1702#endif
1701 1703
1704 spin_unlock_irq(ha->host->host_lock);
1702 err = request_firmware(&fw, ql1280_board_tbl[ha->devnum].fwname, 1705 err = request_firmware(&fw, ql1280_board_tbl[ha->devnum].fwname,
1703 &ha->pdev->dev); 1706 &ha->pdev->dev);
1707 spin_lock_irq(ha->host->host_lock);
1704 if (err) { 1708 if (err) {
1705 printk(KERN_ERR "Failed to load image \"%s\" err %d\n", 1709 printk(KERN_ERR "Failed to load image \"%s\" err %d\n",
1706 ql1280_board_tbl[ha->devnum].fwname, err); 1710 ql1280_board_tbl[ha->devnum].fwname, err);
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
index 3a9f5b288aee..90d1e062ec4f 100644
--- a/drivers/scsi/qla2xxx/qla_attr.c
+++ b/drivers/scsi/qla2xxx/qla_attr.c
@@ -11,7 +11,9 @@
11#include <linux/delay.h> 11#include <linux/delay.h>
12 12
13static int qla24xx_vport_disable(struct fc_vport *, bool); 13static int qla24xx_vport_disable(struct fc_vport *, bool);
14 14static int qla84xx_reset(scsi_qla_host_t *, struct msg_echo_lb *, struct fc_bsg_job *);
15int qla84xx_reset_chip(scsi_qla_host_t *, uint16_t, uint16_t *);
16static int qla84xx_mgmt_cmd(scsi_qla_host_t *, struct msg_echo_lb *, struct fc_bsg_job *);
15/* SYSFS attributes --------------------------------------------------------- */ 17/* SYSFS attributes --------------------------------------------------------- */
16 18
17static ssize_t 19static ssize_t
@@ -1168,6 +1170,28 @@ qla2x00_total_isp_aborts_show(struct device *dev,
1168} 1170}
1169 1171
1170static ssize_t 1172static ssize_t
1173qla24xx_84xx_fw_version_show(struct device *dev,
1174 struct device_attribute *attr, char *buf)
1175{
1176 int rval = QLA_SUCCESS;
1177 uint16_t status[2] = {0, 0};
1178 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1179 struct qla_hw_data *ha = vha->hw;
1180
1181 if (IS_QLA84XX(ha) && ha->cs84xx) {
1182 if (ha->cs84xx->op_fw_version == 0) {
1183 rval = qla84xx_verify_chip(vha, status);
1184 }
1185
1186 if ((rval == QLA_SUCCESS) && (status[0] == 0))
1187 return snprintf(buf, PAGE_SIZE, "%u\n",
1188 (uint32_t)ha->cs84xx->op_fw_version);
1189 }
1190
1191 return snprintf(buf, PAGE_SIZE, "\n");
1192}
1193
1194static ssize_t
1171qla2x00_mpi_version_show(struct device *dev, struct device_attribute *attr, 1195qla2x00_mpi_version_show(struct device *dev, struct device_attribute *attr,
1172 char *buf) 1196 char *buf)
1173{ 1197{
@@ -1281,6 +1305,8 @@ static DEVICE_ATTR(optrom_fcode_version, S_IRUGO,
1281 qla2x00_optrom_fcode_version_show, NULL); 1305 qla2x00_optrom_fcode_version_show, NULL);
1282static DEVICE_ATTR(optrom_fw_version, S_IRUGO, qla2x00_optrom_fw_version_show, 1306static DEVICE_ATTR(optrom_fw_version, S_IRUGO, qla2x00_optrom_fw_version_show,
1283 NULL); 1307 NULL);
1308static DEVICE_ATTR(84xx_fw_version, S_IRUGO, qla24xx_84xx_fw_version_show,
1309 NULL);
1284static DEVICE_ATTR(total_isp_aborts, S_IRUGO, qla2x00_total_isp_aborts_show, 1310static DEVICE_ATTR(total_isp_aborts, S_IRUGO, qla2x00_total_isp_aborts_show,
1285 NULL); 1311 NULL);
1286static DEVICE_ATTR(mpi_version, S_IRUGO, qla2x00_mpi_version_show, NULL); 1312static DEVICE_ATTR(mpi_version, S_IRUGO, qla2x00_mpi_version_show, NULL);
@@ -1310,6 +1336,7 @@ struct device_attribute *qla2x00_host_attrs[] = {
1310 &dev_attr_optrom_efi_version, 1336 &dev_attr_optrom_efi_version,
1311 &dev_attr_optrom_fcode_version, 1337 &dev_attr_optrom_fcode_version,
1312 &dev_attr_optrom_fw_version, 1338 &dev_attr_optrom_fw_version,
1339 &dev_attr_84xx_fw_version,
1313 &dev_attr_total_isp_aborts, 1340 &dev_attr_total_isp_aborts,
1314 &dev_attr_mpi_version, 1341 &dev_attr_mpi_version,
1315 &dev_attr_phy_version, 1342 &dev_attr_phy_version,
@@ -1504,8 +1531,6 @@ qla2x00_terminate_rport_io(struct fc_rport *rport)
1504 fcport->vha->hw->isp_ops->fabric_logout(fcport->vha, 1531 fcport->vha->hw->isp_ops->fabric_logout(fcport->vha,
1505 fcport->loop_id, fcport->d_id.b.domain, 1532 fcport->loop_id, fcport->d_id.b.domain,
1506 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1533 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1507
1508 qla2x00_abort_fcport_cmds(fcport);
1509} 1534}
1510 1535
1511static int 1536static int
@@ -1795,6 +1820,581 @@ qla24xx_vport_disable(struct fc_vport *fc_vport, bool disable)
1795 return 0; 1820 return 0;
1796} 1821}
1797 1822
1823/* BSG support for ELS/CT pass through */
1824inline srb_t *
1825qla2x00_get_ctx_bsg_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size)
1826{
1827 srb_t *sp;
1828 struct qla_hw_data *ha = vha->hw;
1829 struct srb_bsg_ctx *ctx;
1830
1831 sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
1832 if (!sp)
1833 goto done;
1834 ctx = kzalloc(size, GFP_KERNEL);
1835 if (!ctx) {
1836 mempool_free(sp, ha->srb_mempool);
1837 goto done;
1838 }
1839
1840 memset(sp, 0, sizeof(*sp));
1841 sp->fcport = fcport;
1842 sp->ctx = ctx;
1843done:
1844 return sp;
1845}
1846
1847static int
1848qla2x00_process_els(struct fc_bsg_job *bsg_job)
1849{
1850 struct fc_rport *rport;
1851 fc_port_t *fcport;
1852 struct Scsi_Host *host;
1853 scsi_qla_host_t *vha;
1854 struct qla_hw_data *ha;
1855 srb_t *sp;
1856 const char *type;
1857 int req_sg_cnt, rsp_sg_cnt;
1858 int rval = (DRIVER_ERROR << 16);
1859 uint16_t nextlid = 0;
1860 struct srb_bsg *els;
1861
1862 /* Multiple SG's are not supported for ELS requests */
1863 if (bsg_job->request_payload.sg_cnt > 1 ||
1864 bsg_job->reply_payload.sg_cnt > 1) {
1865 DEBUG2(printk(KERN_INFO
1866 "multiple SG's are not supported for ELS requests"
1867 " [request_sg_cnt: %x reply_sg_cnt: %x]\n",
1868 bsg_job->request_payload.sg_cnt,
1869 bsg_job->reply_payload.sg_cnt));
1870 rval = -EPERM;
1871 goto done;
1872 }
1873
1874 /* ELS request for rport */
1875 if (bsg_job->request->msgcode == FC_BSG_RPT_ELS) {
1876 rport = bsg_job->rport;
1877 fcport = *(fc_port_t **) rport->dd_data;
1878 host = rport_to_shost(rport);
1879 vha = shost_priv(host);
1880 ha = vha->hw;
1881 type = "FC_BSG_RPT_ELS";
1882
1883 /* make sure the rport is logged in,
1884 * if not perform fabric login
1885 */
1886 if (qla2x00_fabric_login(vha, fcport, &nextlid)) {
1887 DEBUG2(qla_printk(KERN_WARNING, ha,
1888 "failed to login port %06X for ELS passthru\n",
1889 fcport->d_id.b24));
1890 rval = -EIO;
1891 goto done;
1892 }
1893 } else {
1894 host = bsg_job->shost;
1895 vha = shost_priv(host);
1896 ha = vha->hw;
1897 type = "FC_BSG_HST_ELS_NOLOGIN";
1898
1899 /* Allocate a dummy fcport structure, since functions
1900 * preparing the IOCB and mailbox command retrieves port
1901 * specific information from fcport structure. For Host based
1902 * ELS commands there will be no fcport structure allocated
1903 */
1904 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1905 if (!fcport) {
1906 rval = -ENOMEM;
1907 goto done;
1908 }
1909
1910 /* Initialize all required fields of fcport */
1911 fcport->vha = vha;
1912 fcport->vp_idx = vha->vp_idx;
1913 fcport->d_id.b.al_pa =
1914 bsg_job->request->rqst_data.h_els.port_id[0];
1915 fcport->d_id.b.area =
1916 bsg_job->request->rqst_data.h_els.port_id[1];
1917 fcport->d_id.b.domain =
1918 bsg_job->request->rqst_data.h_els.port_id[2];
1919 fcport->loop_id =
1920 (fcport->d_id.b.al_pa == 0xFD) ?
1921 NPH_FABRIC_CONTROLLER : NPH_F_PORT;
1922 }
1923
1924 if (!vha->flags.online) {
1925 DEBUG2(qla_printk(KERN_WARNING, ha,
1926 "host not online\n"));
1927 rval = -EIO;
1928 goto done;
1929 }
1930
1931 req_sg_cnt =
1932 dma_map_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list,
1933 bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
1934 if (!req_sg_cnt) {
1935 rval = -ENOMEM;
1936 goto done_free_fcport;
1937 }
1938 rsp_sg_cnt = dma_map_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list,
1939 bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
1940 if (!rsp_sg_cnt) {
1941 rval = -ENOMEM;
1942 goto done_free_fcport;
1943 }
1944
1945 if ((req_sg_cnt != bsg_job->request_payload.sg_cnt) ||
1946 (rsp_sg_cnt != bsg_job->reply_payload.sg_cnt))
1947 {
1948 DEBUG2(printk(KERN_INFO
1949 "dma mapping resulted in different sg counts \
1950 [request_sg_cnt: %x dma_request_sg_cnt: %x\
1951 reply_sg_cnt: %x dma_reply_sg_cnt: %x]\n",
1952 bsg_job->request_payload.sg_cnt, req_sg_cnt,
1953 bsg_job->reply_payload.sg_cnt, rsp_sg_cnt));
1954 rval = -EAGAIN;
1955 goto done_unmap_sg;
1956 }
1957
1958 /* Alloc SRB structure */
1959 sp = qla2x00_get_ctx_bsg_sp(vha, fcport, sizeof(struct srb_bsg));
1960 if (!sp) {
1961 rval = -ENOMEM;
1962 goto done_unmap_sg;
1963 }
1964
1965 els = sp->ctx;
1966 els->ctx.type =
1967 (bsg_job->request->msgcode == FC_BSG_RPT_ELS ?
1968 SRB_ELS_CMD_RPT : SRB_ELS_CMD_HST);
1969 els->bsg_job = bsg_job;
1970
1971 DEBUG2(qla_printk(KERN_INFO, ha,
1972 "scsi(%ld:%x): bsg rqst type: %s els type: %x - loop-id=%x "
1973 "portid=%02x%02x%02x.\n", vha->host_no, sp->handle, type,
1974 bsg_job->request->rqst_data.h_els.command_code,
1975 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area,
1976 fcport->d_id.b.al_pa));
1977
1978 rval = qla2x00_start_sp(sp);
1979 if (rval != QLA_SUCCESS) {
1980 kfree(sp->ctx);
1981 mempool_free(sp, ha->srb_mempool);
1982 rval = -EIO;
1983 goto done_unmap_sg;
1984 }
1985 return rval;
1986
1987done_unmap_sg:
1988 dma_unmap_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list,
1989 bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
1990 dma_unmap_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list,
1991 bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
1992 goto done_free_fcport;
1993
1994done_free_fcport:
1995 if (bsg_job->request->msgcode == FC_BSG_HST_ELS_NOLOGIN)
1996 kfree(fcport);
1997done:
1998 return rval;
1999}
2000
2001static int
2002qla2x00_process_ct(struct fc_bsg_job *bsg_job)
2003{
2004 srb_t *sp;
2005 struct Scsi_Host *host = bsg_job->shost;
2006 scsi_qla_host_t *vha = shost_priv(host);
2007 struct qla_hw_data *ha = vha->hw;
2008 int rval = (DRIVER_ERROR << 16);
2009 int req_sg_cnt, rsp_sg_cnt;
2010 uint16_t loop_id;
2011 struct fc_port *fcport;
2012 char *type = "FC_BSG_HST_CT";
2013 struct srb_bsg *ct;
2014
2015 /* pass through is supported only for ISP 4Gb or higher */
2016 if (!IS_FWI2_CAPABLE(ha)) {
2017 DEBUG2(qla_printk(KERN_INFO, ha,
2018 "scsi(%ld):Firmware is not capable to support FC "
2019 "CT pass thru\n", vha->host_no));
2020 rval = -EPERM;
2021 goto done;
2022 }
2023
2024 req_sg_cnt =
2025 dma_map_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list,
2026 bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
2027 if (!req_sg_cnt) {
2028 rval = -ENOMEM;
2029 goto done;
2030 }
2031
2032 rsp_sg_cnt = dma_map_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list,
2033 bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
2034 if (!rsp_sg_cnt) {
2035 rval = -ENOMEM;
2036 goto done;
2037 }
2038
2039 if ((req_sg_cnt != bsg_job->request_payload.sg_cnt) ||
2040 (rsp_sg_cnt != bsg_job->reply_payload.sg_cnt))
2041 {
2042 DEBUG2(qla_printk(KERN_WARNING, ha,
2043 "dma mapping resulted in different sg counts \
2044 [request_sg_cnt: %x dma_request_sg_cnt: %x\
2045 reply_sg_cnt: %x dma_reply_sg_cnt: %x]\n",
2046 bsg_job->request_payload.sg_cnt, req_sg_cnt,
2047 bsg_job->reply_payload.sg_cnt, rsp_sg_cnt));
2048 rval = -EAGAIN;
2049 goto done_unmap_sg;
2050 }
2051
2052 if (!vha->flags.online) {
2053 DEBUG2(qla_printk(KERN_WARNING, ha,
2054 "host not online\n"));
2055 rval = -EIO;
2056 goto done_unmap_sg;
2057 }
2058
2059 loop_id =
2060 (bsg_job->request->rqst_data.h_ct.preamble_word1 & 0xFF000000)
2061 >> 24;
2062 switch (loop_id) {
2063 case 0xFC:
2064 loop_id = cpu_to_le16(NPH_SNS);
2065 break;
2066 case 0xFA:
2067 loop_id = vha->mgmt_svr_loop_id;
2068 break;
2069 default:
2070 DEBUG2(qla_printk(KERN_INFO, ha,
2071 "Unknown loop id: %x\n", loop_id));
2072 rval = -EINVAL;
2073 goto done_unmap_sg;
2074 }
2075
2076 /* Allocate a dummy fcport structure, since functions preparing the
2077 * IOCB and mailbox command retrieves port specific information
2078 * from fcport structure. For Host based ELS commands there will be
2079 * no fcport structure allocated
2080 */
2081 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
2082 if (!fcport)
2083 {
2084 rval = -ENOMEM;
2085 goto done_unmap_sg;
2086 }
2087
2088 /* Initialize all required fields of fcport */
2089 fcport->vha = vha;
2090 fcport->vp_idx = vha->vp_idx;
2091 fcport->d_id.b.al_pa = bsg_job->request->rqst_data.h_ct.port_id[0];
2092 fcport->d_id.b.area = bsg_job->request->rqst_data.h_ct.port_id[1];
2093 fcport->d_id.b.domain = bsg_job->request->rqst_data.h_ct.port_id[2];
2094 fcport->loop_id = loop_id;
2095
2096 /* Alloc SRB structure */
2097 sp = qla2x00_get_ctx_bsg_sp(vha, fcport, sizeof(struct srb_bsg));
2098 if (!sp) {
2099 rval = -ENOMEM;
2100 goto done_free_fcport;
2101 }
2102
2103 ct = sp->ctx;
2104 ct->ctx.type = SRB_CT_CMD;
2105 ct->bsg_job = bsg_job;
2106
2107 DEBUG2(qla_printk(KERN_INFO, ha,
2108 "scsi(%ld:%x): bsg rqst type: %s els type: %x - loop-id=%x "
2109 "portid=%02x%02x%02x.\n", vha->host_no, sp->handle, type,
2110 (bsg_job->request->rqst_data.h_ct.preamble_word2 >> 16),
2111 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area,
2112 fcport->d_id.b.al_pa));
2113
2114 rval = qla2x00_start_sp(sp);
2115 if (rval != QLA_SUCCESS) {
2116 kfree(sp->ctx);
2117 mempool_free(sp, ha->srb_mempool);
2118 rval = -EIO;
2119 goto done_free_fcport;
2120 }
2121 return rval;
2122
2123done_free_fcport:
2124 kfree(fcport);
2125done_unmap_sg:
2126 dma_unmap_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list,
2127 bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
2128 dma_unmap_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list,
2129 bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
2130done:
2131 return rval;
2132}
2133
2134static int
2135qla2x00_process_vendor_specific(struct fc_bsg_job *bsg_job)
2136{
2137 struct Scsi_Host *host = bsg_job->shost;
2138 scsi_qla_host_t *vha = shost_priv(host);
2139 struct qla_hw_data *ha = vha->hw;
2140 int rval;
2141 uint8_t command_sent;
2142 uint32_t vendor_cmd;
2143 char *type;
2144 struct msg_echo_lb elreq;
2145 uint16_t response[MAILBOX_REGISTER_COUNT];
2146 uint8_t* fw_sts_ptr;
2147 uint8_t *req_data;
2148 dma_addr_t req_data_dma;
2149 uint32_t req_data_len;
2150 uint8_t *rsp_data;
2151 dma_addr_t rsp_data_dma;
2152 uint32_t rsp_data_len;
2153
2154 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
2155 test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
2156 test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
2157 rval = -EBUSY;
2158 goto done;
2159 }
2160
2161 if (!vha->flags.online) {
2162 DEBUG2(qla_printk(KERN_WARNING, ha,
2163 "host not online\n"));
2164 rval = -EIO;
2165 goto done;
2166 }
2167
2168 elreq.req_sg_cnt =
2169 dma_map_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list,
2170 bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
2171 if (!elreq.req_sg_cnt) {
2172 rval = -ENOMEM;
2173 goto done;
2174 }
2175 elreq.rsp_sg_cnt =
2176 dma_map_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list,
2177 bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
2178 if (!elreq.rsp_sg_cnt) {
2179 rval = -ENOMEM;
2180 goto done;
2181 }
2182
2183 if ((elreq.req_sg_cnt != bsg_job->request_payload.sg_cnt) ||
2184 (elreq.rsp_sg_cnt != bsg_job->reply_payload.sg_cnt))
2185 {
2186 DEBUG2(printk(KERN_INFO
2187 "dma mapping resulted in different sg counts \
2188 [request_sg_cnt: %x dma_request_sg_cnt: %x\
2189 reply_sg_cnt: %x dma_reply_sg_cnt: %x]\n",
2190 bsg_job->request_payload.sg_cnt, elreq.req_sg_cnt,
2191 bsg_job->reply_payload.sg_cnt, elreq.rsp_sg_cnt));
2192 rval = -EAGAIN;
2193 goto done_unmap_sg;
2194 }
2195 req_data_len = rsp_data_len = bsg_job->request_payload.payload_len;
2196 req_data = dma_alloc_coherent(&ha->pdev->dev, req_data_len,
2197 &req_data_dma, GFP_KERNEL);
2198
2199 rsp_data = dma_alloc_coherent(&ha->pdev->dev, rsp_data_len,
2200 &rsp_data_dma, GFP_KERNEL);
2201
2202 /* Copy the request buffer in req_data now */
2203 sg_copy_to_buffer(bsg_job->request_payload.sg_list,
2204 bsg_job->request_payload.sg_cnt, req_data,
2205 req_data_len);
2206
2207 elreq.send_dma = req_data_dma;
2208 elreq.rcv_dma = rsp_data_dma;
2209 elreq.transfer_size = req_data_len;
2210
2211 /* Vendor cmd : loopback or ECHO diagnostic
2212 * Options:
2213 * Loopback : Either internal or external loopback
2214 * ECHO: ECHO ELS or Vendor specific FC4 link data
2215 */
2216 vendor_cmd = bsg_job->request->rqst_data.h_vendor.vendor_cmd[0];
2217 elreq.options =
2218 *(((uint32_t *)bsg_job->request->rqst_data.h_vendor.vendor_cmd)
2219 + 1);
2220
2221 switch (bsg_job->request->rqst_data.h_vendor.vendor_cmd[0]) {
2222 case QL_VND_LOOPBACK:
2223 if (ha->current_topology != ISP_CFG_F) {
2224 type = "FC_BSG_HST_VENDOR_LOOPBACK";
2225
2226 DEBUG2(qla_printk(KERN_INFO, ha,
2227 "scsi(%ld) bsg rqst type: %s vendor rqst type: %x options: %x.\n",
2228 vha->host_no, type, vendor_cmd, elreq.options));
2229
2230 command_sent = INT_DEF_LB_LOOPBACK_CMD;
2231 rval = qla2x00_loopback_test(vha, &elreq, response);
2232 if (IS_QLA81XX(ha)) {
2233 if (response[0] == MBS_COMMAND_ERROR && response[1] == MBS_LB_RESET) {
2234 DEBUG2(printk(KERN_ERR "%s(%ld): ABORTing "
2235 "ISP\n", __func__, vha->host_no));
2236 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2237 qla2xxx_wake_dpc(vha);
2238 }
2239 }
2240 } else {
2241 type = "FC_BSG_HST_VENDOR_ECHO_DIAG";
2242 DEBUG2(qla_printk(KERN_INFO, ha,
2243 "scsi(%ld) bsg rqst type: %s vendor rqst type: %x options: %x.\n",
2244 vha->host_no, type, vendor_cmd, elreq.options));
2245
2246 command_sent = INT_DEF_LB_ECHO_CMD;
2247 rval = qla2x00_echo_test(vha, &elreq, response);
2248 }
2249 break;
2250 case QLA84_RESET:
2251 if (!IS_QLA84XX(vha->hw)) {
2252 rval = -EINVAL;
2253 DEBUG16(printk(
2254 "%s(%ld): 8xxx exiting.\n",
2255 __func__, vha->host_no));
2256 return rval;
2257 }
2258 rval = qla84xx_reset(vha, &elreq, bsg_job);
2259 break;
2260 case QLA84_MGMT_CMD:
2261 if (!IS_QLA84XX(vha->hw)) {
2262 rval = -EINVAL;
2263 DEBUG16(printk(
2264 "%s(%ld): 8xxx exiting.\n",
2265 __func__, vha->host_no));
2266 return rval;
2267 }
2268 rval = qla84xx_mgmt_cmd(vha, &elreq, bsg_job);
2269 break;
2270 default:
2271 rval = -ENOSYS;
2272 }
2273
2274 if (rval != QLA_SUCCESS) {
2275 DEBUG2(qla_printk(KERN_WARNING, ha,
2276 "scsi(%ld) Vendor request %s failed\n", vha->host_no, type));
2277 rval = 0;
2278 bsg_job->reply->result = (DID_ERROR << 16);
2279 bsg_job->reply->reply_payload_rcv_len = 0;
2280 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
2281 memcpy( fw_sts_ptr, response, sizeof(response));
2282 fw_sts_ptr += sizeof(response);
2283 *fw_sts_ptr = command_sent;
2284 } else {
2285 DEBUG2(qla_printk(KERN_WARNING, ha,
2286 "scsi(%ld) Vendor request %s completed\n", vha->host_no, type));
2287 rval = bsg_job->reply->result = 0;
2288 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(response) + sizeof(uint8_t);
2289 bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
2290 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
2291 memcpy(fw_sts_ptr, response, sizeof(response));
2292 fw_sts_ptr += sizeof(response);
2293 *fw_sts_ptr = command_sent;
2294 sg_copy_from_buffer(bsg_job->reply_payload.sg_list,
2295 bsg_job->reply_payload.sg_cnt, rsp_data,
2296 rsp_data_len);
2297 }
2298 bsg_job->job_done(bsg_job);
2299
2300done_unmap_sg:
2301
2302 if(req_data)
2303 dma_free_coherent(&ha->pdev->dev, req_data_len,
2304 req_data, req_data_dma);
2305 dma_unmap_sg(&ha->pdev->dev,
2306 bsg_job->request_payload.sg_list,
2307 bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
2308 dma_unmap_sg(&ha->pdev->dev,
2309 bsg_job->reply_payload.sg_list,
2310 bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
2311
2312done:
2313 return rval;
2314}
2315
2316static int
2317qla24xx_bsg_request(struct fc_bsg_job *bsg_job)
2318{
2319 int ret = -EINVAL;
2320
2321 switch (bsg_job->request->msgcode) {
2322 case FC_BSG_RPT_ELS:
2323 case FC_BSG_HST_ELS_NOLOGIN:
2324 ret = qla2x00_process_els(bsg_job);
2325 break;
2326 case FC_BSG_HST_CT:
2327 ret = qla2x00_process_ct(bsg_job);
2328 break;
2329 case FC_BSG_HST_VENDOR:
2330 ret = qla2x00_process_vendor_specific(bsg_job);
2331 break;
2332 case FC_BSG_HST_ADD_RPORT:
2333 case FC_BSG_HST_DEL_RPORT:
2334 case FC_BSG_RPT_CT:
2335 default:
2336 DEBUG2(printk("qla2xxx: unsupported BSG request\n"));
2337 break;
2338 }
2339 return ret;
2340}
2341
2342static int
2343qla24xx_bsg_timeout(struct fc_bsg_job *bsg_job)
2344{
2345 scsi_qla_host_t *vha = shost_priv(bsg_job->shost);
2346 struct qla_hw_data *ha = vha->hw;
2347 srb_t *sp;
2348 int cnt, que;
2349 unsigned long flags;
2350 struct req_que *req;
2351 struct srb_bsg *sp_bsg;
2352
2353 /* find the bsg job from the active list of commands */
2354 spin_lock_irqsave(&ha->hardware_lock, flags);
2355 for (que = 0; que < ha->max_req_queues; que++) {
2356 req = ha->req_q_map[que];
2357 if (!req)
2358 continue;
2359
2360 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++ ) {
2361 sp = req->outstanding_cmds[cnt];
2362
2363 if (sp) {
2364 sp_bsg = (struct srb_bsg*)sp->ctx;
2365
2366 if (((sp_bsg->ctx.type == SRB_CT_CMD) ||
2367 (sp_bsg->ctx.type == SRB_ELS_CMD_RPT)
2368 || ( sp_bsg->ctx.type == SRB_ELS_CMD_HST)) &&
2369 (sp_bsg->bsg_job == bsg_job)) {
2370 if (ha->isp_ops->abort_command(sp)) {
2371 DEBUG2(qla_printk(KERN_INFO, ha,
2372 "scsi(%ld): mbx abort_command failed\n", vha->host_no));
2373 bsg_job->req->errors = bsg_job->reply->result = -EIO;
2374 } else {
2375 DEBUG2(qla_printk(KERN_INFO, ha,
2376 "scsi(%ld): mbx abort_command success\n", vha->host_no));
2377 bsg_job->req->errors = bsg_job->reply->result = 0;
2378 }
2379 goto done;
2380 }
2381 }
2382 }
2383 }
2384 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2385 DEBUG2(qla_printk(KERN_INFO, ha,
2386 "scsi(%ld) SRB not found to abort\n", vha->host_no));
2387 bsg_job->req->errors = bsg_job->reply->result = -ENXIO;
2388 return 0;
2389
2390done:
2391 if (bsg_job->request->msgcode == FC_BSG_HST_CT)
2392 kfree(sp->fcport);
2393 kfree(sp->ctx);
2394 mempool_free(sp, ha->srb_mempool);
2395 return 0;
2396}
2397
1798struct fc_function_template qla2xxx_transport_functions = { 2398struct fc_function_template qla2xxx_transport_functions = {
1799 2399
1800 .show_host_node_name = 1, 2400 .show_host_node_name = 1,
@@ -1838,6 +2438,8 @@ struct fc_function_template qla2xxx_transport_functions = {
1838 .vport_create = qla24xx_vport_create, 2438 .vport_create = qla24xx_vport_create,
1839 .vport_disable = qla24xx_vport_disable, 2439 .vport_disable = qla24xx_vport_disable,
1840 .vport_delete = qla24xx_vport_delete, 2440 .vport_delete = qla24xx_vport_delete,
2441 .bsg_request = qla24xx_bsg_request,
2442 .bsg_timeout = qla24xx_bsg_timeout,
1841}; 2443};
1842 2444
1843struct fc_function_template qla2xxx_transport_vport_functions = { 2445struct fc_function_template qla2xxx_transport_vport_functions = {
@@ -1878,6 +2480,8 @@ struct fc_function_template qla2xxx_transport_vport_functions = {
1878 .dev_loss_tmo_callbk = qla2x00_dev_loss_tmo_callbk, 2480 .dev_loss_tmo_callbk = qla2x00_dev_loss_tmo_callbk,
1879 .terminate_rport_io = qla2x00_terminate_rport_io, 2481 .terminate_rport_io = qla2x00_terminate_rport_io,
1880 .get_fc_host_stats = qla2x00_get_fc_host_stats, 2482 .get_fc_host_stats = qla2x00_get_fc_host_stats,
2483 .bsg_request = qla24xx_bsg_request,
2484 .bsg_timeout = qla24xx_bsg_timeout,
1881}; 2485};
1882 2486
1883void 2487void
@@ -1906,3 +2510,125 @@ qla2x00_init_host_attr(scsi_qla_host_t *vha)
1906 speed = FC_PORTSPEED_1GBIT; 2510 speed = FC_PORTSPEED_1GBIT;
1907 fc_host_supported_speeds(vha->host) = speed; 2511 fc_host_supported_speeds(vha->host) = speed;
1908} 2512}
2513static int
2514qla84xx_reset(scsi_qla_host_t *ha, struct msg_echo_lb *mreq, struct fc_bsg_job *bsg_job)
2515{
2516 int ret = 0;
2517 int cmd;
2518 uint16_t cmd_status;
2519
2520 DEBUG16(printk("%s(%ld): entered.\n", __func__, ha->host_no));
2521
2522 cmd = (*((bsg_job->request->rqst_data.h_vendor.vendor_cmd) + 2))
2523 == A84_RESET_FLAG_ENABLE_DIAG_FW ?
2524 A84_ISSUE_RESET_DIAG_FW : A84_ISSUE_RESET_OP_FW;
2525 ret = qla84xx_reset_chip(ha, cmd == A84_ISSUE_RESET_DIAG_FW,
2526 &cmd_status);
2527 return ret;
2528}
2529
2530static int
2531qla84xx_mgmt_cmd(scsi_qla_host_t *ha, struct msg_echo_lb *mreq, struct fc_bsg_job *bsg_job)
2532{
2533 struct access_chip_84xx *mn;
2534 dma_addr_t mn_dma, mgmt_dma;
2535 void *mgmt_b = NULL;
2536 int ret = 0;
2537 int rsp_hdr_len, len = 0;
2538 struct qla84_msg_mgmt *ql84_mgmt;
2539
2540 ql84_mgmt = (struct qla84_msg_mgmt *) vmalloc(sizeof(struct qla84_msg_mgmt));
2541 ql84_mgmt->cmd =
2542 *((uint16_t *)(bsg_job->request->rqst_data.h_vendor.vendor_cmd + 2));
2543 ql84_mgmt->mgmtp.u.mem.start_addr =
2544 *((uint32_t *)(bsg_job->request->rqst_data.h_vendor.vendor_cmd + 3));
2545 ql84_mgmt->len =
2546 *((uint32_t *)(bsg_job->request->rqst_data.h_vendor.vendor_cmd + 4));
2547 ql84_mgmt->mgmtp.u.config.id =
2548 *((uint32_t *)(bsg_job->request->rqst_data.h_vendor.vendor_cmd + 5));
2549 ql84_mgmt->mgmtp.u.config.param0 =
2550 *((uint32_t *)(bsg_job->request->rqst_data.h_vendor.vendor_cmd + 6));
2551 ql84_mgmt->mgmtp.u.config.param1 =
2552 *((uint32_t *)(bsg_job->request->rqst_data.h_vendor.vendor_cmd + 7));
2553 ql84_mgmt->mgmtp.u.info.type =
2554 *((uint32_t *)(bsg_job->request->rqst_data.h_vendor.vendor_cmd + 8));
2555 ql84_mgmt->mgmtp.u.info.context =
2556 *((uint32_t *)(bsg_job->request->rqst_data.h_vendor.vendor_cmd + 9));
2557
2558 rsp_hdr_len = bsg_job->request_payload.payload_len;
2559
2560 mn = dma_pool_alloc(ha->hw->s_dma_pool, GFP_KERNEL, &mn_dma);
2561 if (mn == NULL) {
2562 DEBUG2(printk(KERN_ERR "%s: dma alloc for fw buffer "
2563 "failed%lu\n", __func__, ha->host_no));
2564 return -ENOMEM;
2565 }
2566
2567 memset(mn, 0, sizeof (struct access_chip_84xx));
2568
2569 mn->entry_type = ACCESS_CHIP_IOCB_TYPE;
2570 mn->entry_count = 1;
2571
2572 switch (ql84_mgmt->cmd) {
2573 case QLA84_MGMT_READ_MEM:
2574 mn->options = cpu_to_le16(ACO_DUMP_MEMORY);
2575 mn->parameter1 = cpu_to_le32(ql84_mgmt->mgmtp.u.mem.start_addr);
2576 break;
2577 case QLA84_MGMT_WRITE_MEM:
2578 mn->options = cpu_to_le16(ACO_LOAD_MEMORY);
2579 mn->parameter1 = cpu_to_le32(ql84_mgmt->mgmtp.u.mem.start_addr);
2580 break;
2581 case QLA84_MGMT_CHNG_CONFIG:
2582 mn->options = cpu_to_le16(ACO_CHANGE_CONFIG_PARAM);
2583 mn->parameter1 = cpu_to_le32(ql84_mgmt->mgmtp.u.config.id);
2584 mn->parameter2 = cpu_to_le32(ql84_mgmt->mgmtp.u.config.param0);
2585 mn->parameter3 = cpu_to_le32(ql84_mgmt->mgmtp.u.config.param1);
2586 break;
2587 case QLA84_MGMT_GET_INFO:
2588 mn->options = cpu_to_le16(ACO_REQUEST_INFO);
2589 mn->parameter1 = cpu_to_le32(ql84_mgmt->mgmtp.u.info.type);
2590 mn->parameter2 = cpu_to_le32(ql84_mgmt->mgmtp.u.info.context);
2591 break;
2592 default:
2593 ret = -EIO;
2594 goto exit_mgmt0;
2595 }
2596
2597 if ((len == ql84_mgmt->len) &&
2598 ql84_mgmt->cmd != QLA84_MGMT_CHNG_CONFIG) {
2599 mgmt_b = dma_alloc_coherent(&ha->hw->pdev->dev, len,
2600 &mgmt_dma, GFP_KERNEL);
2601 if (mgmt_b == NULL) {
2602 DEBUG2(printk(KERN_ERR "%s: dma alloc mgmt_b "
2603 "failed%lu\n", __func__, ha->host_no));
2604 ret = -ENOMEM;
2605 goto exit_mgmt0;
2606 }
2607 mn->total_byte_cnt = cpu_to_le32(ql84_mgmt->len);
2608 mn->dseg_count = cpu_to_le16(1);
2609 mn->dseg_address[0] = cpu_to_le32(LSD(mgmt_dma));
2610 mn->dseg_address[1] = cpu_to_le32(MSD(mgmt_dma));
2611 mn->dseg_length = cpu_to_le32(len);
2612
2613 if (ql84_mgmt->cmd == QLA84_MGMT_WRITE_MEM) {
2614 memcpy(mgmt_b, ql84_mgmt->payload, len);
2615 }
2616 }
2617
2618 ret = qla2x00_issue_iocb(ha, mn, mn_dma, 0);
2619 if ((ret != QLA_SUCCESS) || (ql84_mgmt->cmd == QLA84_MGMT_WRITE_MEM)
2620 || (ql84_mgmt->cmd == QLA84_MGMT_CHNG_CONFIG)) {
2621 if (ret != QLA_SUCCESS)
2622 DEBUG2(printk(KERN_ERR "%s(%lu): failed\n",
2623 __func__, ha->host_no));
2624 } else if ((ql84_mgmt->cmd == QLA84_MGMT_READ_MEM) ||
2625 (ql84_mgmt->cmd == QLA84_MGMT_GET_INFO)) {
2626 }
2627
2628 if (mgmt_b)
2629 dma_free_coherent(&ha->hw->pdev->dev, len, mgmt_b, mgmt_dma);
2630
2631exit_mgmt0:
2632 dma_pool_free(ha->hw->s_dma_pool, mn, mn_dma);
2633 return ret;
2634}
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index 1263d9796e89..afa95614aaf8 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -31,6 +31,7 @@
31#include <scsi/scsi_device.h> 31#include <scsi/scsi_device.h>
32#include <scsi/scsi_cmnd.h> 32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_transport_fc.h> 33#include <scsi/scsi_transport_fc.h>
34#include <scsi/scsi_bsg_fc.h>
34 35
35#define QLA2XXX_DRIVER_NAME "qla2xxx" 36#define QLA2XXX_DRIVER_NAME "qla2xxx"
36 37
@@ -228,6 +229,27 @@ struct srb_logio {
228 uint16_t flags; 229 uint16_t flags;
229}; 230};
230 231
232struct srb_bsg_ctx {
233#define SRB_ELS_CMD_RPT 3
234#define SRB_ELS_CMD_HST 4
235#define SRB_CT_CMD 5
236 uint16_t type;
237};
238
239struct srb_bsg {
240 struct srb_bsg_ctx ctx;
241 struct fc_bsg_job *bsg_job;
242};
243
244struct msg_echo_lb {
245 dma_addr_t send_dma;
246 dma_addr_t rcv_dma;
247 uint16_t req_sg_cnt;
248 uint16_t rsp_sg_cnt;
249 uint16_t options;
250 uint32_t transfer_size;
251};
252
231/* 253/*
232 * ISP I/O Register Set structure definitions. 254 * ISP I/O Register Set structure definitions.
233 */ 255 */
@@ -522,6 +544,8 @@ typedef struct {
522#define MBA_DISCARD_RND_FRAME 0x8048 /* discard RND frame due to error. */ 544#define MBA_DISCARD_RND_FRAME 0x8048 /* discard RND frame due to error. */
523#define MBA_REJECTED_FCP_CMD 0x8049 /* rejected FCP_CMD. */ 545#define MBA_REJECTED_FCP_CMD 0x8049 /* rejected FCP_CMD. */
524 546
547/* ISP mailbox loopback echo diagnostic error code */
548#define MBS_LB_RESET 0x17
525/* 549/*
526 * Firmware options 1, 2, 3. 550 * Firmware options 1, 2, 3.
527 */ 551 */
@@ -2230,6 +2254,13 @@ struct req_que {
2230 int max_q_depth; 2254 int max_q_depth;
2231}; 2255};
2232 2256
2257/* Place holder for FW buffer parameters */
2258struct qlfc_fw {
2259 void *fw_buf;
2260 dma_addr_t fw_dma;
2261 uint32_t len;
2262};
2263
2233/* 2264/*
2234 * Qlogic host adapter specific data structure. 2265 * Qlogic host adapter specific data structure.
2235*/ 2266*/
@@ -2594,6 +2625,7 @@ struct qla_hw_data {
2594 struct qla_statistics qla_stats; 2625 struct qla_statistics qla_stats;
2595 struct isp_operations *isp_ops; 2626 struct isp_operations *isp_ops;
2596 struct workqueue_struct *wq; 2627 struct workqueue_struct *wq;
2628 struct qlfc_fw fw_buf;
2597}; 2629};
2598 2630
2599/* 2631/*
@@ -2766,4 +2798,127 @@ typedef struct scsi_qla_host {
2766 2798
2767#define CMD_SP(Cmnd) ((Cmnd)->SCp.ptr) 2799#define CMD_SP(Cmnd) ((Cmnd)->SCp.ptr)
2768 2800
2801/*
2802 * BSG Vendor specific commands
2803 */
2804
2805#define QL_VND_LOOPBACK 0x01
2806#define QLA84_RESET 0x02
2807#define QLA84_UPDATE_FW 0x03
2808#define QLA84_MGMT_CMD 0x04
2809
2810/* BSG definations for interpreting CommandSent field */
2811#define INT_DEF_LB_LOOPBACK_CMD 0
2812#define INT_DEF_LB_ECHO_CMD 1
2813
2814/* BSG Vendor specific definations */
2815typedef struct _A84_RESET {
2816 uint16_t Flags;
2817 uint16_t Reserved;
2818#define A84_RESET_FLAG_ENABLE_DIAG_FW 1
2819} __attribute__((packed)) A84_RESET, *PA84_RESET;
2820
2821#define A84_ISSUE_WRITE_TYPE_CMD 0
2822#define A84_ISSUE_READ_TYPE_CMD 1
2823#define A84_CLEANUP_CMD 2
2824#define A84_ISSUE_RESET_OP_FW 3
2825#define A84_ISSUE_RESET_DIAG_FW 4
2826#define A84_ISSUE_UPDATE_OPFW_CMD 5
2827#define A84_ISSUE_UPDATE_DIAGFW_CMD 6
2828
2829struct qla84_mgmt_param {
2830 union {
2831 struct {
2832 uint32_t start_addr;
2833 } mem; /* for QLA84_MGMT_READ/WRITE_MEM */
2834 struct {
2835 uint32_t id;
2836#define QLA84_MGMT_CONFIG_ID_UIF 1
2837#define QLA84_MGMT_CONFIG_ID_FCOE_COS 2
2838#define QLA84_MGMT_CONFIG_ID_PAUSE 3
2839#define QLA84_MGMT_CONFIG_ID_TIMEOUTS 4
2840
2841 uint32_t param0;
2842 uint32_t param1;
2843 } config; /* for QLA84_MGMT_CHNG_CONFIG */
2844
2845 struct {
2846 uint32_t type;
2847#define QLA84_MGMT_INFO_CONFIG_LOG_DATA 1 /* Get Config Log Data */
2848#define QLA84_MGMT_INFO_LOG_DATA 2 /* Get Log Data */
2849#define QLA84_MGMT_INFO_PORT_STAT 3 /* Get Port Statistics */
2850#define QLA84_MGMT_INFO_LIF_STAT 4 /* Get LIF Statistics */
2851#define QLA84_MGMT_INFO_ASIC_STAT 5 /* Get ASIC Statistics */
2852#define QLA84_MGMT_INFO_CONFIG_PARAMS 6 /* Get Config Parameters */
2853#define QLA84_MGMT_INFO_PANIC_LOG 7 /* Get Panic Log */
2854
2855 uint32_t context;
2856/*
2857* context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA
2858*/
2859#define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0
2860#define IC_LOG_DATA_LOG_ID_LEARN_LOG 1
2861#define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2
2862#define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3
2863#define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4
2864#define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5
2865#define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6
2866#define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7
2867#define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8
2868#define IC_LOG_DATA_LOG_ID_DCX_LOG 9
2869
2870/*
2871* context definitions for QLA84_MGMT_INFO_PORT_STAT
2872*/
2873#define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0
2874#define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1
2875#define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2
2876#define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3
2877#define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4
2878#define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5
2879
2880
2881/*
2882* context definitions for QLA84_MGMT_INFO_LIF_STAT
2883*/
2884#define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0
2885#define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1
2886#define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2
2887#define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3
2888#define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6
2889
2890 } info; /* for QLA84_MGMT_GET_INFO */
2891 } u;
2892};
2893
2894struct qla84_msg_mgmt {
2895 uint16_t cmd;
2896#define QLA84_MGMT_READ_MEM 0x00
2897#define QLA84_MGMT_WRITE_MEM 0x01
2898#define QLA84_MGMT_CHNG_CONFIG 0x02
2899#define QLA84_MGMT_GET_INFO 0x03
2900 uint16_t rsrvd;
2901 struct qla84_mgmt_param mgmtp;/* parameters for cmd */
2902 uint32_t len; /* bytes in payload following this struct */
2903 uint8_t payload[0]; /* payload for cmd */
2904};
2905
2906struct msg_update_fw {
2907 /*
2908 * diag_fw = 0 operational fw
2909 * otherwise diagnostic fw
2910 * offset, len, fw_len are present to overcome the current limitation
2911 * of 128Kb xfer size. The fw is sent in smaller chunks. Each chunk
2912 * specifies the byte "offset" where it fits in the fw buffer. The
2913 * number of bytes in each chunk is specified in "len". "fw_len"
2914 * is the total size of fw. The first chunk should start at offset = 0.
2915 * When offset+len == fw_len, the fw is written to the HBA.
2916 */
2917 uint32_t diag_fw;
2918 uint32_t offset;/* start offset */
2919 uint32_t len; /* num bytes in cur xfer */
2920 uint32_t fw_len; /* size of fw in bytes */
2921 uint8_t fw_bytes[0];
2922};
2923
2769#endif 2924#endif
diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h
index 66a8da5d7d08..cebf4f1bb7d9 100644
--- a/drivers/scsi/qla2xxx/qla_fw.h
+++ b/drivers/scsi/qla2xxx/qla_fw.h
@@ -627,6 +627,39 @@ struct els_entry_24xx {
627 uint32_t rx_len; /* Data segment 1 length. */ 627 uint32_t rx_len; /* Data segment 1 length. */
628}; 628};
629 629
630struct els_sts_entry_24xx {
631 uint8_t entry_type; /* Entry type. */
632 uint8_t entry_count; /* Entry count. */
633 uint8_t sys_define; /* System Defined. */
634 uint8_t entry_status; /* Entry Status. */
635
636 uint32_t handle; /* System handle. */
637
638 uint16_t comp_status;
639
640 uint16_t nport_handle; /* N_PORT handle. */
641
642 uint16_t reserved_1;
643
644 uint8_t vp_index;
645 uint8_t sof_type;
646
647 uint32_t rx_xchg_address; /* Receive exchange address. */
648 uint16_t reserved_2;
649
650 uint8_t opcode;
651 uint8_t reserved_3;
652
653 uint8_t port_id[3];
654 uint8_t reserved_4;
655
656 uint16_t reserved_5;
657
658 uint16_t control_flags; /* Control flags. */
659 uint32_t total_byte_count;
660 uint32_t error_subcode_1;
661 uint32_t error_subcode_2;
662};
630/* 663/*
631 * ISP queue - Mailbox Command entry structure definition. 664 * ISP queue - Mailbox Command entry structure definition.
632 */ 665 */
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
index 8bc6f53691e9..3a89bc514e2b 100644
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -60,6 +60,8 @@ extern int qla2x00_async_login_done(struct scsi_qla_host *, fc_port_t *,
60extern int qla2x00_async_logout_done(struct scsi_qla_host *, fc_port_t *, 60extern int qla2x00_async_logout_done(struct scsi_qla_host *, fc_port_t *,
61 uint16_t *); 61 uint16_t *);
62 62
63extern fc_port_t *
64qla2x00_alloc_fcport(scsi_qla_host_t *, gfp_t );
63/* 65/*
64 * Global Data in qla_os.c source file. 66 * Global Data in qla_os.c source file.
65 */ 67 */
@@ -76,6 +78,7 @@ extern int ql2xiidmaenable;
76extern int ql2xmaxqueues; 78extern int ql2xmaxqueues;
77extern int ql2xmultique_tag; 79extern int ql2xmultique_tag;
78extern int ql2xfwloadbin; 80extern int ql2xfwloadbin;
81extern int ql2xetsenable;
79 82
80extern int qla2x00_loop_reset(scsi_qla_host_t *); 83extern int qla2x00_loop_reset(scsi_qla_host_t *);
81extern void qla2x00_abort_all_cmds(scsi_qla_host_t *, int); 84extern void qla2x00_abort_all_cmds(scsi_qla_host_t *, int);
@@ -94,7 +97,6 @@ extern int qla2x00_post_uevent_work(struct scsi_qla_host *, u32);
94 97
95extern int qla81xx_restart_mpi_firmware(scsi_qla_host_t *); 98extern int qla81xx_restart_mpi_firmware(scsi_qla_host_t *);
96 99
97extern void qla2x00_abort_fcport_cmds(fc_port_t *);
98extern struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *, 100extern struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *,
99 struct qla_hw_data *); 101 struct qla_hw_data *);
100extern void qla2x00_free_host(struct scsi_qla_host *); 102extern void qla2x00_free_host(struct scsi_qla_host *);
@@ -154,6 +156,7 @@ int qla2x00_marker(struct scsi_qla_host *, struct req_que *, struct rsp_que *,
154int __qla2x00_marker(struct scsi_qla_host *, struct req_que *, struct rsp_que *, 156int __qla2x00_marker(struct scsi_qla_host *, struct req_que *, struct rsp_que *,
155 uint16_t, uint16_t, uint8_t); 157 uint16_t, uint16_t, uint8_t);
156extern int qla2x00_start_sp(srb_t *); 158extern int qla2x00_start_sp(srb_t *);
159extern void qla2x00_ctx_sp_free(srb_t *);
157 160
158/* 161/*
159 * Global Function Prototypes in qla_mbx.c source file. 162 * Global Function Prototypes in qla_mbx.c source file.
@@ -426,6 +429,8 @@ extern void qla2x00_free_sysfs_attr(scsi_qla_host_t *);
426extern void qla2x00_init_host_attr(scsi_qla_host_t *); 429extern void qla2x00_init_host_attr(scsi_qla_host_t *);
427extern void qla2x00_alloc_sysfs_attr(scsi_qla_host_t *); 430extern void qla2x00_alloc_sysfs_attr(scsi_qla_host_t *);
428extern void qla2x00_free_sysfs_attr(scsi_qla_host_t *); 431extern void qla2x00_free_sysfs_attr(scsi_qla_host_t *);
432extern int qla2x00_loopback_test(scsi_qla_host_t *, struct msg_echo_lb *, uint16_t *);
433extern int qla2x00_echo_test(scsi_qla_host_t *, struct msg_echo_lb *, uint16_t *);
429 434
430/* 435/*
431 * Global Function Prototypes in qla_dfs.c source file. 436 * Global Function Prototypes in qla_dfs.c source file.
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index 3f8e8495b743..a67b2bafb882 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -62,7 +62,7 @@ qla2x00_ctx_sp_timeout(unsigned long __data)
62 ctx->free(sp); 62 ctx->free(sp);
63} 63}
64 64
65static void 65void
66qla2x00_ctx_sp_free(srb_t *sp) 66qla2x00_ctx_sp_free(srb_t *sp)
67{ 67{
68 struct srb_ctx *ctx = sp->ctx; 68 struct srb_ctx *ctx = sp->ctx;
@@ -338,6 +338,16 @@ qla2x00_initialize_adapter(scsi_qla_host_t *vha)
338 rval = qla2x00_init_rings(vha); 338 rval = qla2x00_init_rings(vha);
339 ha->flags.chip_reset_done = 1; 339 ha->flags.chip_reset_done = 1;
340 340
341 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
342 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
343 rval = qla84xx_init_chip(vha);
344 if (rval != QLA_SUCCESS) {
345 qla_printk(KERN_ERR, ha,
346 "Unable to initialize ISP84XX.\n");
347 qla84xx_put_chip(vha);
348 }
349 }
350
341 return (rval); 351 return (rval);
342} 352}
343 353
@@ -2216,7 +2226,7 @@ qla2x00_rport_del(void *data)
2216 * 2226 *
2217 * Returns a pointer to the allocated fcport, or NULL, if none available. 2227 * Returns a pointer to the allocated fcport, or NULL, if none available.
2218 */ 2228 */
2219static fc_port_t * 2229fc_port_t *
2220qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 2230qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
2221{ 2231{
2222 fc_port_t *fcport; 2232 fc_port_t *fcport;
@@ -2900,8 +2910,13 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
2900 if (qla2x00_is_reserved_id(vha, loop_id)) 2910 if (qla2x00_is_reserved_id(vha, loop_id))
2901 continue; 2911 continue;
2902 2912
2903 if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha)) 2913 if (atomic_read(&vha->loop_down_timer) ||
2914 LOOP_TRANSITION(vha)) {
2915 atomic_set(&vha->loop_down_timer, 0);
2916 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2917 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2904 break; 2918 break;
2919 }
2905 2920
2906 if (swl != NULL) { 2921 if (swl != NULL) {
2907 if (last_dev) { 2922 if (last_dev) {
@@ -4877,6 +4892,15 @@ qla81xx_nvram_config(scsi_qla_host_t *vha)
4877} 4892}
4878 4893
4879void 4894void
4880qla81xx_update_fw_options(scsi_qla_host_t *ha) 4895qla81xx_update_fw_options(scsi_qla_host_t *vha)
4881{ 4896{
4897 struct qla_hw_data *ha = vha->hw;
4898
4899 if (!ql2xetsenable)
4900 return;
4901
4902 /* Enable ETS Burst. */
4903 memset(ha->fw_options, 0, sizeof(ha->fw_options));
4904 ha->fw_options[2] |= BIT_9;
4905 qla2x00_set_fw_options(vha, ha->fw_options);
4882} 4906}
diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c
index c5ccac0bef76..8299a9891bfe 100644
--- a/drivers/scsi/qla2xxx/qla_iocb.c
+++ b/drivers/scsi/qla2xxx/qla_iocb.c
@@ -1025,6 +1025,119 @@ qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)
1025 /* Implicit: mbx->mbx10 = 0. */ 1025 /* Implicit: mbx->mbx10 = 0. */
1026} 1026}
1027 1027
1028static void
1029qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
1030{
1031 struct fc_bsg_job *bsg_job = ((struct srb_bsg*)sp->ctx)->bsg_job;
1032
1033 els_iocb->entry_type = ELS_IOCB_TYPE;
1034 els_iocb->entry_count = 1;
1035 els_iocb->sys_define = 0;
1036 els_iocb->entry_status = 0;
1037 els_iocb->handle = sp->handle;
1038 els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
1039 els_iocb->tx_dsd_count = __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
1040 els_iocb->vp_index = sp->fcport->vp_idx;
1041 els_iocb->sof_type = EST_SOFI3;
1042 els_iocb->rx_dsd_count = __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
1043
1044 els_iocb->opcode =(((struct srb_bsg*)sp->ctx)->ctx.type == SRB_ELS_CMD_RPT) ?
1045 bsg_job->request->rqst_data.r_els.els_code : bsg_job->request->rqst_data.h_els.command_code;
1046 els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
1047 els_iocb->port_id[1] = sp->fcport->d_id.b.area;
1048 els_iocb->port_id[2] = sp->fcport->d_id.b.domain;
1049 els_iocb->control_flags = 0;
1050 els_iocb->rx_byte_count =
1051 cpu_to_le32(bsg_job->reply_payload.payload_len);
1052 els_iocb->tx_byte_count =
1053 cpu_to_le32(bsg_job->request_payload.payload_len);
1054
1055 els_iocb->tx_address[0] = cpu_to_le32(LSD(sg_dma_address
1056 (bsg_job->request_payload.sg_list)));
1057 els_iocb->tx_address[1] = cpu_to_le32(MSD(sg_dma_address
1058 (bsg_job->request_payload.sg_list)));
1059 els_iocb->tx_len = cpu_to_le32(sg_dma_len
1060 (bsg_job->request_payload.sg_list));
1061
1062 els_iocb->rx_address[0] = cpu_to_le32(LSD(sg_dma_address
1063 (bsg_job->reply_payload.sg_list)));
1064 els_iocb->rx_address[1] = cpu_to_le32(MSD(sg_dma_address
1065 (bsg_job->reply_payload.sg_list)));
1066 els_iocb->rx_len = cpu_to_le32(sg_dma_len
1067 (bsg_job->reply_payload.sg_list));
1068}
1069
1070static void
1071qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
1072{
1073 uint16_t avail_dsds;
1074 uint32_t *cur_dsd;
1075 struct scatterlist *sg;
1076 int index;
1077 uint16_t tot_dsds;
1078 scsi_qla_host_t *vha = sp->fcport->vha;
1079 struct fc_bsg_job *bsg_job = ((struct srb_bsg*)sp->ctx)->bsg_job;
1080 int loop_iterartion = 0;
1081 int cont_iocb_prsnt = 0;
1082 int entry_count = 1;
1083
1084 ct_iocb->entry_type = CT_IOCB_TYPE;
1085 ct_iocb->entry_status = 0;
1086 ct_iocb->sys_define = 0;
1087 ct_iocb->handle = sp->handle;
1088
1089 ct_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
1090 ct_iocb->vp_index = sp->fcport->vp_idx;
1091 ct_iocb->comp_status = __constant_cpu_to_le16(0);
1092
1093 ct_iocb->cmd_dsd_count =
1094 __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
1095 ct_iocb->timeout = 0;
1096 ct_iocb->rsp_dsd_count =
1097 __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
1098 ct_iocb->rsp_byte_count =
1099 cpu_to_le32(bsg_job->reply_payload.payload_len);
1100 ct_iocb->cmd_byte_count =
1101 cpu_to_le32(bsg_job->request_payload.payload_len);
1102 ct_iocb->dseg_0_address[0] = cpu_to_le32(LSD(sg_dma_address
1103 (bsg_job->request_payload.sg_list)));
1104 ct_iocb->dseg_0_address[1] = cpu_to_le32(MSD(sg_dma_address
1105 (bsg_job->request_payload.sg_list)));
1106 ct_iocb->dseg_0_len = cpu_to_le32(sg_dma_len
1107 (bsg_job->request_payload.sg_list));
1108
1109 avail_dsds = 1;
1110 cur_dsd = (uint32_t *)ct_iocb->dseg_1_address;
1111 index = 0;
1112 tot_dsds = bsg_job->reply_payload.sg_cnt;
1113
1114 for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
1115 dma_addr_t sle_dma;
1116 cont_a64_entry_t *cont_pkt;
1117
1118 /* Allocate additional continuation packets? */
1119 if (avail_dsds == 0) {
1120 /*
1121 * Five DSDs are available in the Cont.
1122 * Type 1 IOCB.
1123 */
1124 cont_pkt = qla2x00_prep_cont_type1_iocb(vha);
1125 cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
1126 avail_dsds = 5;
1127 cont_iocb_prsnt = 1;
1128 entry_count++;
1129 }
1130
1131 sle_dma = sg_dma_address(sg);
1132 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
1133 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
1134 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
1135 loop_iterartion++;
1136 avail_dsds--;
1137 }
1138 ct_iocb->entry_count = entry_count;
1139}
1140
1028int 1141int
1029qla2x00_start_sp(srb_t *sp) 1142qla2x00_start_sp(srb_t *sp)
1030{ 1143{
@@ -1052,6 +1165,13 @@ qla2x00_start_sp(srb_t *sp)
1052 qla24xx_logout_iocb(sp, pkt): 1165 qla24xx_logout_iocb(sp, pkt):
1053 qla2x00_logout_iocb(sp, pkt); 1166 qla2x00_logout_iocb(sp, pkt);
1054 break; 1167 break;
1168 case SRB_ELS_CMD_RPT:
1169 case SRB_ELS_CMD_HST:
1170 qla24xx_els_iocb(sp, pkt);
1171 break;
1172 case SRB_CT_CMD:
1173 qla24xx_ct_iocb(sp, pkt);
1174 break;
1055 default: 1175 default:
1056 break; 1176 break;
1057 } 1177 }
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index 6fc63b98818c..ab90329ff2e4 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -8,6 +8,7 @@
8 8
9#include <linux/delay.h> 9#include <linux/delay.h>
10#include <scsi/scsi_tcq.h> 10#include <scsi/scsi_tcq.h>
11#include <scsi/scsi_bsg_fc.h>
11 12
12static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t); 13static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
13static void qla2x00_process_completed_request(struct scsi_qla_host *, 14static void qla2x00_process_completed_request(struct scsi_qla_host *,
@@ -881,7 +882,9 @@ qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
881 index); 882 index);
882 return NULL; 883 return NULL;
883 } 884 }
885
884 req->outstanding_cmds[index] = NULL; 886 req->outstanding_cmds[index] = NULL;
887
885done: 888done:
886 return sp; 889 return sp;
887} 890}
@@ -982,6 +985,100 @@ done_post_logio_done_work:
982} 985}
983 986
984static void 987static void
988qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
989 struct sts_entry_24xx *pkt, int iocb_type)
990{
991 const char func[] = "ELS_CT_IOCB";
992 const char *type;
993 struct qla_hw_data *ha = vha->hw;
994 srb_t *sp;
995 struct srb_bsg *sp_bsg;
996 struct fc_bsg_job *bsg_job;
997 uint16_t comp_status;
998 uint32_t fw_status[3];
999 uint8_t* fw_sts_ptr;
1000
1001 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1002 if (!sp)
1003 return;
1004 sp_bsg = (struct srb_bsg*)sp->ctx;
1005 bsg_job = sp_bsg->bsg_job;
1006
1007 type = NULL;
1008 switch (sp_bsg->ctx.type) {
1009 case SRB_ELS_CMD_RPT:
1010 case SRB_ELS_CMD_HST:
1011 type = "els";
1012 break;
1013 case SRB_CT_CMD:
1014 type = "ct pass-through";
1015 break;
1016 default:
1017 qla_printk(KERN_WARNING, ha,
1018 "%s: Unrecognized SRB: (%p) type=%d.\n", func, sp,
1019 sp_bsg->ctx.type);
1020 return;
1021 }
1022
1023 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
1024 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
1025 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
1026
1027 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1028 * fc payload to the caller
1029 */
1030 bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1031 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
1032
1033 if (comp_status != CS_COMPLETE) {
1034 if (comp_status == CS_DATA_UNDERRUN) {
1035 bsg_job->reply->result = DID_OK << 16;
1036 bsg_job->reply->reply_payload_rcv_len =
1037 le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->total_byte_count);
1038
1039 DEBUG2(qla_printk(KERN_WARNING, ha,
1040 "scsi(%ld:0x%x): ELS-CT pass-through-%s error comp_status-status=0x%x "
1041 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
1042 vha->host_no, sp->handle, type, comp_status, fw_status[1], fw_status[2],
1043 le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->total_byte_count)));
1044 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
1045 memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
1046 }
1047 else {
1048 DEBUG2(qla_printk(KERN_WARNING, ha,
1049 "scsi(%ld:0x%x): ELS-CT pass-through-%s error comp_status-status=0x%x "
1050 "error subcode 1=0x%x error subcode 2=0x%x.\n",
1051 vha->host_no, sp->handle, type, comp_status,
1052 le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1),
1053 le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2)));
1054 bsg_job->reply->result = DID_ERROR << 16;
1055 bsg_job->reply->reply_payload_rcv_len = 0;
1056 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
1057 memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
1058 }
1059 DEBUG2(qla2x00_dump_buffer((uint8_t *)pkt, sizeof(*pkt)));
1060 }
1061 else {
1062 bsg_job->reply->result = DID_OK << 16;;
1063 bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
1064 bsg_job->reply_len = 0;
1065 }
1066
1067 dma_unmap_sg(&ha->pdev->dev,
1068 bsg_job->request_payload.sg_list,
1069 bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
1070 dma_unmap_sg(&ha->pdev->dev,
1071 bsg_job->reply_payload.sg_list,
1072 bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
1073 if ((sp_bsg->ctx.type == SRB_ELS_CMD_HST) ||
1074 (sp_bsg->ctx.type == SRB_CT_CMD))
1075 kfree(sp->fcport);
1076 kfree(sp->ctx);
1077 mempool_free(sp, ha->srb_mempool);
1078 bsg_job->job_done(bsg_job);
1079}
1080
1081static void
985qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, 1082qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
986 struct logio_entry_24xx *logio) 1083 struct logio_entry_24xx *logio)
987{ 1084{
@@ -1749,6 +1846,13 @@ void qla24xx_process_response_queue(struct scsi_qla_host *vha,
1749 qla24xx_logio_entry(vha, rsp->req, 1846 qla24xx_logio_entry(vha, rsp->req,
1750 (struct logio_entry_24xx *)pkt); 1847 (struct logio_entry_24xx *)pkt);
1751 break; 1848 break;
1849 case CT_IOCB_TYPE:
1850 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
1851 clear_bit(MBX_INTERRUPT, &vha->hw->mbx_cmd_flags);
1852 break;
1853 case ELS_IOCB_TYPE:
1854 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
1855 break;
1752 default: 1856 default:
1753 /* Type Not Supported. */ 1857 /* Type Not Supported. */
1754 DEBUG4(printk(KERN_WARNING 1858 DEBUG4(printk(KERN_WARNING
@@ -2049,7 +2153,6 @@ qla24xx_msix_default(int irq, void *dev_id)
2049 set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); 2153 set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
2050 complete(&ha->mbx_intr_comp); 2154 complete(&ha->mbx_intr_comp);
2051 } 2155 }
2052
2053 return IRQ_HANDLED; 2156 return IRQ_HANDLED;
2054} 2157}
2055 2158
@@ -2255,10 +2358,11 @@ qla2x00_free_irqs(scsi_qla_host_t *vha)
2255 2358
2256 if (ha->flags.msix_enabled) 2359 if (ha->flags.msix_enabled)
2257 qla24xx_disable_msix(ha); 2360 qla24xx_disable_msix(ha);
2258 else if (ha->flags.inta_enabled) { 2361 else if (ha->flags.msi_enabled) {
2259 free_irq(ha->pdev->irq, rsp); 2362 free_irq(ha->pdev->irq, rsp);
2260 pci_disable_msi(ha->pdev); 2363 pci_disable_msi(ha->pdev);
2261 } 2364 } else
2365 free_irq(ha->pdev->irq, rsp);
2262} 2366}
2263 2367
2264 2368
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 056e4d4505f3..6e53bdbb1da8 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -3636,6 +3636,157 @@ qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
3636} 3636}
3637 3637
3638int 3638int
3639qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mresp)
3640{
3641 int rval;
3642 mbx_cmd_t mc;
3643 mbx_cmd_t *mcp = &mc;
3644 uint32_t iter_cnt = 0x1;
3645
3646 DEBUG11(printk("scsi(%ld): entered.\n", vha->host_no));
3647
3648 memset(mcp->mb, 0 , sizeof(mcp->mb));
3649 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
3650 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
3651
3652 /* transfer count */
3653 mcp->mb[10] = LSW(mreq->transfer_size);
3654 mcp->mb[11] = MSW(mreq->transfer_size);
3655
3656 /* send data address */
3657 mcp->mb[14] = LSW(mreq->send_dma);
3658 mcp->mb[15] = MSW(mreq->send_dma);
3659 mcp->mb[20] = LSW(MSD(mreq->send_dma));
3660 mcp->mb[21] = MSW(MSD(mreq->send_dma));
3661
3662 /* recieve data address */
3663 mcp->mb[16] = LSW(mreq->rcv_dma);
3664 mcp->mb[17] = MSW(mreq->rcv_dma);
3665 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
3666 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
3667
3668 /* Iteration count */
3669 mcp->mb[18] = LSW(iter_cnt);
3670 mcp->mb[19] = MSW(iter_cnt);
3671
3672 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
3673 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
3674 if (IS_QLA81XX(vha->hw))
3675 mcp->out_mb |= MBX_2;
3676 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
3677
3678 mcp->buf_size = mreq->transfer_size;
3679 mcp->tov = MBX_TOV_SECONDS;
3680 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
3681
3682 rval = qla2x00_mailbox_command(vha, mcp);
3683
3684 if (rval != QLA_SUCCESS) {
3685 DEBUG2(printk(KERN_WARNING
3686 "(%ld): failed=%x mb[0]=0x%x "
3687 "mb[1]=0x%x mb[2]=0x%x mb[3]=0x%x mb[18]=0x%x mb[19]=0x%x. \n", vha->host_no, rval,
3688 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], mcp->mb[18], mcp->mb[19]));
3689 } else {
3690 DEBUG2(printk(KERN_WARNING
3691 "scsi(%ld): done.\n", vha->host_no));
3692 }
3693
3694 /* Copy mailbox information */
3695 memcpy( mresp, mcp->mb, 64);
3696 mresp[3] = mcp->mb[18];
3697 mresp[4] = mcp->mb[19];
3698 return rval;
3699}
3700
3701int
3702qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mresp)
3703{
3704 int rval;
3705 mbx_cmd_t mc;
3706 mbx_cmd_t *mcp = &mc;
3707 struct qla_hw_data *ha = vha->hw;
3708
3709 DEBUG11(printk("scsi(%ld): entered.\n", vha->host_no));
3710
3711 memset(mcp->mb, 0 , sizeof(mcp->mb));
3712 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
3713 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
3714 if (IS_QLA81XX(ha))
3715 mcp->mb[1] |= BIT_15;
3716 mcp->mb[2] = IS_QLA81XX(ha) ? vha->fcoe_fcf_idx : 0;
3717 mcp->mb[16] = LSW(mreq->rcv_dma);
3718 mcp->mb[17] = MSW(mreq->rcv_dma);
3719 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
3720 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
3721
3722 mcp->mb[10] = LSW(mreq->transfer_size);
3723
3724 mcp->mb[14] = LSW(mreq->send_dma);
3725 mcp->mb[15] = MSW(mreq->send_dma);
3726 mcp->mb[20] = LSW(MSD(mreq->send_dma));
3727 mcp->mb[21] = MSW(MSD(mreq->send_dma));
3728
3729 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
3730 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
3731 if (IS_QLA81XX(ha))
3732 mcp->out_mb |= MBX_2;
3733
3734 mcp->in_mb = MBX_0;
3735 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha))
3736 mcp->in_mb |= MBX_1;
3737 if (IS_QLA81XX(ha))
3738 mcp->in_mb |= MBX_3;
3739
3740 mcp->tov = MBX_TOV_SECONDS;
3741 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
3742 mcp->buf_size = mreq->transfer_size;
3743
3744 rval = qla2x00_mailbox_command(vha, mcp);
3745
3746 if (rval != QLA_SUCCESS) {
3747 DEBUG2(printk(KERN_WARNING
3748 "(%ld): failed=%x mb[0]=0x%x mb[1]=0x%x.\n",
3749 vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
3750 } else {
3751 DEBUG2(printk(KERN_WARNING
3752 "scsi(%ld): done.\n", vha->host_no));
3753 }
3754
3755 /* Copy mailbox information */
3756 memcpy( mresp, mcp->mb, 32);
3757 return rval;
3758}
3759int
3760qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic,
3761 uint16_t *cmd_status)
3762{
3763 int rval;
3764 mbx_cmd_t mc;
3765 mbx_cmd_t *mcp = &mc;
3766
3767 DEBUG16(printk("%s(%ld): enable_diag=%d entered.\n", __func__,
3768 ha->host_no, enable_diagnostic));
3769
3770 mcp->mb[0] = MBC_ISP84XX_RESET;
3771 mcp->mb[1] = enable_diagnostic;
3772 mcp->out_mb = MBX_1|MBX_0;
3773 mcp->in_mb = MBX_1|MBX_0;
3774 mcp->tov = MBX_TOV_SECONDS;
3775 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
3776 rval = qla2x00_mailbox_command(ha, mcp);
3777
3778 /* Return mailbox statuses. */
3779 *cmd_status = mcp->mb[0];
3780 if (rval != QLA_SUCCESS)
3781 DEBUG16(printk("%s(%ld): failed=%x.\n", __func__, ha->host_no,
3782 rval));
3783 else
3784 DEBUG16(printk("%s(%ld): done.\n", __func__, ha->host_no));
3785
3786 return rval;
3787}
3788
3789int
3639qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data) 3790qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
3640{ 3791{
3641 int rval; 3792 int rval;
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 8529eb1f3cd4..46720b23028f 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -107,6 +107,12 @@ MODULE_PARM_DESC(ql2xfwloadbin,
107 " 1 -- load firmware from flash.\n" 107 " 1 -- load firmware from flash.\n"
108 " 0 -- use default semantics.\n"); 108 " 0 -- use default semantics.\n");
109 109
110int ql2xetsenable;
111module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
112MODULE_PARM_DESC(ql2xetsenable,
113 "Enables firmware ETS burst."
114 "Default is 0 - skip ETS enablement.");
115
110/* 116/*
111 * SCSI host template entry points 117 * SCSI host template entry points
112 */ 118 */
@@ -682,44 +688,6 @@ qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
682 return (return_status); 688 return (return_status);
683} 689}
684 690
685void
686qla2x00_abort_fcport_cmds(fc_port_t *fcport)
687{
688 int cnt;
689 unsigned long flags;
690 srb_t *sp;
691 scsi_qla_host_t *vha = fcport->vha;
692 struct qla_hw_data *ha = vha->hw;
693 struct req_que *req;
694
695 spin_lock_irqsave(&ha->hardware_lock, flags);
696 req = vha->req;
697 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
698 sp = req->outstanding_cmds[cnt];
699 if (!sp)
700 continue;
701 if (sp->fcport != fcport)
702 continue;
703 if (sp->ctx)
704 continue;
705
706 spin_unlock_irqrestore(&ha->hardware_lock, flags);
707 if (ha->isp_ops->abort_command(sp)) {
708 DEBUG2(qla_printk(KERN_WARNING, ha,
709 "Abort failed -- %lx\n",
710 sp->cmd->serial_number));
711 } else {
712 if (qla2x00_eh_wait_on_command(sp->cmd) !=
713 QLA_SUCCESS)
714 DEBUG2(qla_printk(KERN_WARNING, ha,
715 "Abort failed while waiting -- %lx\n",
716 sp->cmd->serial_number));
717 }
718 spin_lock_irqsave(&ha->hardware_lock, flags);
719 }
720 spin_unlock_irqrestore(&ha->hardware_lock, flags);
721}
722
723/************************************************************************** 691/**************************************************************************
724* qla2xxx_eh_abort 692* qla2xxx_eh_abort
725* 693*
@@ -1095,6 +1063,20 @@ qla2x00_loop_reset(scsi_qla_host_t *vha)
1095 struct fc_port *fcport; 1063 struct fc_port *fcport;
1096 struct qla_hw_data *ha = vha->hw; 1064 struct qla_hw_data *ha = vha->hw;
1097 1065
1066 if (ha->flags.enable_target_reset) {
1067 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1068 if (fcport->port_type != FCT_TARGET)
1069 continue;
1070
1071 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1072 if (ret != QLA_SUCCESS) {
1073 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1074 "target_reset=%d d_id=%x.\n", __func__,
1075 vha->host_no, ret, fcport->d_id.b24));
1076 }
1077 }
1078 }
1079
1098 if (ha->flags.enable_lip_full_login && !IS_QLA81XX(ha)) { 1080 if (ha->flags.enable_lip_full_login && !IS_QLA81XX(ha)) {
1099 ret = qla2x00_full_login_lip(vha); 1081 ret = qla2x00_full_login_lip(vha);
1100 if (ret != QLA_SUCCESS) { 1082 if (ret != QLA_SUCCESS) {
@@ -1117,19 +1099,6 @@ qla2x00_loop_reset(scsi_qla_host_t *vha)
1117 qla2x00_wait_for_loop_ready(vha); 1099 qla2x00_wait_for_loop_ready(vha);
1118 } 1100 }
1119 1101
1120 if (ha->flags.enable_target_reset) {
1121 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1122 if (fcport->port_type != FCT_TARGET)
1123 continue;
1124
1125 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1126 if (ret != QLA_SUCCESS) {
1127 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1128 "target_reset=%d d_id=%x.\n", __func__,
1129 vha->host_no, ret, fcport->d_id.b24));
1130 }
1131 }
1132 }
1133 /* Issue marker command only when we are going to start the I/O */ 1102 /* Issue marker command only when we are going to start the I/O */
1134 vha->marker_needed = 1; 1103 vha->marker_needed = 1;
1135 1104
@@ -1160,8 +1129,19 @@ qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1160 qla2x00_sp_compl(ha, sp); 1129 qla2x00_sp_compl(ha, sp);
1161 } else { 1130 } else {
1162 ctx = sp->ctx; 1131 ctx = sp->ctx;
1163 del_timer_sync(&ctx->timer); 1132 if (ctx->type == SRB_LOGIN_CMD || ctx->type == SRB_LOGOUT_CMD) {
1164 ctx->free(sp); 1133 del_timer_sync(&ctx->timer);
1134 ctx->free(sp);
1135 } else {
1136 struct srb_bsg* sp_bsg = (struct srb_bsg*)sp->ctx;
1137 if (sp_bsg->bsg_job->request->msgcode == FC_BSG_HST_CT)
1138 kfree(sp->fcport);
1139 sp_bsg->bsg_job->req->errors = 0;
1140 sp_bsg->bsg_job->reply->result = res;
1141 sp_bsg->bsg_job->job_done(sp_bsg->bsg_job);
1142 kfree(sp->ctx);
1143 mempool_free(sp, ha->srb_mempool);
1144 }
1165 } 1145 }
1166 } 1146 }
1167 } 1147 }
@@ -1258,7 +1238,7 @@ qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1258 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth); 1238 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1259 break; 1239 break;
1260 default: 1240 default:
1261 return EOPNOTSUPP; 1241 return -EOPNOTSUPP;
1262 } 1242 }
1263 1243
1264 return sdev->queue_depth; 1244 return sdev->queue_depth;
@@ -1818,7 +1798,6 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1818 /* Set EEH reset type to fundamental if required by hba */ 1798 /* Set EEH reset type to fundamental if required by hba */
1819 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) { 1799 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1820 pdev->needs_freset = 1; 1800 pdev->needs_freset = 1;
1821 pci_save_state(pdev);
1822 } 1801 }
1823 1802
1824 /* Configure PCI I/O space */ 1803 /* Configure PCI I/O space */
@@ -1970,11 +1949,15 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1970 host->max_channel = MAX_BUSES - 1; 1949 host->max_channel = MAX_BUSES - 1;
1971 host->max_lun = MAX_LUNS; 1950 host->max_lun = MAX_LUNS;
1972 host->transportt = qla2xxx_transport_template; 1951 host->transportt = qla2xxx_transport_template;
1952 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
1973 1953
1974 /* Set up the irqs */ 1954 /* Set up the irqs */
1975 ret = qla2x00_request_irqs(ha, rsp); 1955 ret = qla2x00_request_irqs(ha, rsp);
1976 if (ret) 1956 if (ret)
1977 goto probe_init_failed; 1957 goto probe_init_failed;
1958
1959 pci_save_state(pdev);
1960
1978 /* Alloc arrays of request and response ring ptrs */ 1961 /* Alloc arrays of request and response ring ptrs */
1979que_init: 1962que_init:
1980 if (!qla2x00_alloc_queues(ha)) { 1963 if (!qla2x00_alloc_queues(ha)) {
@@ -2176,6 +2159,8 @@ qla2x00_remove_one(struct pci_dev *pdev)
2176 kfree(ha); 2159 kfree(ha);
2177 ha = NULL; 2160 ha = NULL;
2178 2161
2162 pci_disable_pcie_error_reporting(pdev);
2163
2179 pci_disable_device(pdev); 2164 pci_disable_device(pdev);
2180 pci_set_drvdata(pdev, NULL); 2165 pci_set_drvdata(pdev, NULL);
2181} 2166}
@@ -3310,6 +3295,7 @@ qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3310 return PCI_ERS_RESULT_CAN_RECOVER; 3295 return PCI_ERS_RESULT_CAN_RECOVER;
3311 case pci_channel_io_frozen: 3296 case pci_channel_io_frozen:
3312 ha->flags.eeh_busy = 1; 3297 ha->flags.eeh_busy = 1;
3298 qla2x00_free_irqs(vha);
3313 pci_disable_device(pdev); 3299 pci_disable_device(pdev);
3314 return PCI_ERS_RESULT_NEED_RESET; 3300 return PCI_ERS_RESULT_NEED_RESET;
3315 case pci_channel_io_perm_failure: 3301 case pci_channel_io_perm_failure:
@@ -3363,10 +3349,24 @@ qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3363 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT; 3349 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
3364 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); 3350 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3365 struct qla_hw_data *ha = base_vha->hw; 3351 struct qla_hw_data *ha = base_vha->hw;
3366 int rc; 3352 struct rsp_que *rsp;
3353 int rc, retries = 10;
3367 3354
3368 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n")); 3355 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3369 3356
3357 /* Workaround: qla2xxx driver which access hardware earlier
3358 * needs error state to be pci_channel_io_online.
3359 * Otherwise mailbox command timesout.
3360 */
3361 pdev->error_state = pci_channel_io_normal;
3362
3363 pci_restore_state(pdev);
3364
3365 /* pci_restore_state() clears the saved_state flag of the device
3366 * save restored state which resets saved_state flag
3367 */
3368 pci_save_state(pdev);
3369
3370 if (ha->mem_only) 3370 if (ha->mem_only)
3371 rc = pci_enable_device_mem(pdev); 3371 rc = pci_enable_device_mem(pdev);
3372 else 3372 else
@@ -3378,27 +3378,23 @@ qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3378 return ret; 3378 return ret;
3379 } 3379 }
3380 3380
3381 rsp = ha->rsp_q_map[0];
3382 if (qla2x00_request_irqs(ha, rsp))
3383 return ret;
3384
3381 if (ha->isp_ops->pci_config(base_vha)) 3385 if (ha->isp_ops->pci_config(base_vha))
3382 return ret; 3386 return ret;
3383 3387
3384#ifdef QL_DEBUG_LEVEL_17 3388 while (ha->flags.mbox_busy && retries--)
3385 { 3389 msleep(1000);
3386 uint8_t b;
3387 uint32_t i;
3388 3390
3389 printk("slot_reset_1: ");
3390 for (i = 0; i < 256; i++) {
3391 pci_read_config_byte(ha->pdev, i, &b);
3392 printk("%s%02x", (i%16) ? " " : "\n", b);
3393 }
3394 printk("\n");
3395 }
3396#endif
3397 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 3391 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3398 if (qla2x00_abort_isp(base_vha) == QLA_SUCCESS) 3392 if (qla2x00_abort_isp(base_vha) == QLA_SUCCESS)
3399 ret = PCI_ERS_RESULT_RECOVERED; 3393 ret = PCI_ERS_RESULT_RECOVERED;
3400 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 3394 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3401 3395
3396 pci_cleanup_aer_uncorrect_error_status(pdev);
3397
3402 DEBUG17(qla_printk(KERN_WARNING, ha, 3398 DEBUG17(qla_printk(KERN_WARNING, ha,
3403 "slot_reset-return:ret=%x\n", ret)); 3399 "slot_reset-return:ret=%x\n", ret));
3404 3400
@@ -3422,8 +3418,6 @@ qla2xxx_pci_resume(struct pci_dev *pdev)
3422 } 3418 }
3423 3419
3424 ha->flags.eeh_busy = 0; 3420 ha->flags.eeh_busy = 0;
3425
3426 pci_cleanup_aer_uncorrect_error_status(pdev);
3427} 3421}
3428 3422
3429static struct pci_error_handlers qla2xxx_err_handler = { 3423static struct pci_error_handlers qla2xxx_err_handler = {
@@ -3536,4 +3530,3 @@ MODULE_FIRMWARE(FW_FILE_ISP2300);
3536MODULE_FIRMWARE(FW_FILE_ISP2322); 3530MODULE_FIRMWARE(FW_FILE_ISP2322);
3537MODULE_FIRMWARE(FW_FILE_ISP24XX); 3531MODULE_FIRMWARE(FW_FILE_ISP24XX);
3538MODULE_FIRMWARE(FW_FILE_ISP25XX); 3532MODULE_FIRMWARE(FW_FILE_ISP25XX);
3539MODULE_FIRMWARE(FW_FILE_ISP81XX);
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
index ed36279a33c1..8d2fc2fa7a6b 100644
--- a/drivers/scsi/qla2xxx/qla_version.h
+++ b/drivers/scsi/qla2xxx/qla_version.h
@@ -7,9 +7,9 @@
7/* 7/*
8 * Driver version 8 * Driver version
9 */ 9 */
10#define QLA2XXX_VERSION "8.03.01-k10" 10#define QLA2XXX_VERSION "8.03.02-k1"
11 11
12#define QLA_DRIVER_MAJOR_VER 8 12#define QLA_DRIVER_MAJOR_VER 8
13#define QLA_DRIVER_MINOR_VER 3 13#define QLA_DRIVER_MINOR_VER 3
14#define QLA_DRIVER_PATCH_VER 1 14#define QLA_DRIVER_PATCH_VER 2
15#define QLA_DRIVER_BETA_VER 0 15#define QLA_DRIVER_BETA_VER 1
diff --git a/drivers/scsi/qla4xxx/ql4_init.c b/drivers/scsi/qla4xxx/ql4_init.c
index af8c3233e8ae..92329a461c68 100644
--- a/drivers/scsi/qla4xxx/ql4_init.c
+++ b/drivers/scsi/qla4xxx/ql4_init.c
@@ -844,10 +844,10 @@ static int qla4xxx_config_nvram(struct scsi_qla_host *ha)
844 DEBUG2(printk("scsi%ld: %s: Get EEProm parameters \n", ha->host_no, 844 DEBUG2(printk("scsi%ld: %s: Get EEProm parameters \n", ha->host_no,
845 __func__)); 845 __func__));
846 if (ql4xxx_lock_flash(ha) != QLA_SUCCESS) 846 if (ql4xxx_lock_flash(ha) != QLA_SUCCESS)
847 return (QLA_ERROR); 847 return QLA_ERROR;
848 if (ql4xxx_lock_nvram(ha) != QLA_SUCCESS) { 848 if (ql4xxx_lock_nvram(ha) != QLA_SUCCESS) {
849 ql4xxx_unlock_flash(ha); 849 ql4xxx_unlock_flash(ha);
850 return (QLA_ERROR); 850 return QLA_ERROR;
851 } 851 }
852 852
853 /* Get EEPRom Parameters from NVRAM and validate */ 853 /* Get EEPRom Parameters from NVRAM and validate */
@@ -858,20 +858,18 @@ static int qla4xxx_config_nvram(struct scsi_qla_host *ha)
858 rd_nvram_word(ha, eeprom_ext_hw_conf_offset(ha)); 858 rd_nvram_word(ha, eeprom_ext_hw_conf_offset(ha));
859 spin_unlock_irqrestore(&ha->hardware_lock, flags); 859 spin_unlock_irqrestore(&ha->hardware_lock, flags);
860 } else { 860 } else {
861 /*
862 * QLogic adapters should always have a valid NVRAM.
863 * If not valid, do not load.
864 */
865 dev_warn(&ha->pdev->dev, 861 dev_warn(&ha->pdev->dev,
866 "scsi%ld: %s: EEProm checksum invalid. " 862 "scsi%ld: %s: EEProm checksum invalid. "
867 "Please update your EEPROM\n", ha->host_no, 863 "Please update your EEPROM\n", ha->host_no,
868 __func__); 864 __func__);
869 865
870 /* set defaults */ 866 /* Attempt to set defaults */
871 if (is_qla4010(ha)) 867 if (is_qla4010(ha))
872 extHwConfig.Asuint32_t = 0x1912; 868 extHwConfig.Asuint32_t = 0x1912;
873 else if (is_qla4022(ha) | is_qla4032(ha)) 869 else if (is_qla4022(ha) | is_qla4032(ha))
874 extHwConfig.Asuint32_t = 0x0023; 870 extHwConfig.Asuint32_t = 0x0023;
871 else
872 return QLA_ERROR;
875 } 873 }
876 DEBUG(printk("scsi%ld: %s: Setting extHwConfig to 0xFFFF%04x\n", 874 DEBUG(printk("scsi%ld: %s: Setting extHwConfig to 0xFFFF%04x\n",
877 ha->host_no, __func__, extHwConfig.Asuint32_t)); 875 ha->host_no, __func__, extHwConfig.Asuint32_t));
@@ -884,7 +882,7 @@ static int qla4xxx_config_nvram(struct scsi_qla_host *ha)
884 ql4xxx_unlock_nvram(ha); 882 ql4xxx_unlock_nvram(ha);
885 ql4xxx_unlock_flash(ha); 883 ql4xxx_unlock_flash(ha);
886 884
887 return (QLA_SUCCESS); 885 return QLA_SUCCESS;
888} 886}
889 887
890static void qla4x00_pci_config(struct scsi_qla_host *ha) 888static void qla4x00_pci_config(struct scsi_qla_host *ha)
diff --git a/drivers/scsi/raid_class.c b/drivers/scsi/raid_class.c
index 8e5c169b03fb..bd88349b8526 100644
--- a/drivers/scsi/raid_class.c
+++ b/drivers/scsi/raid_class.c
@@ -149,6 +149,7 @@ static struct {
149 { RAID_LEVEL_0, "raid0" }, 149 { RAID_LEVEL_0, "raid0" },
150 { RAID_LEVEL_1, "raid1" }, 150 { RAID_LEVEL_1, "raid1" },
151 { RAID_LEVEL_10, "raid10" }, 151 { RAID_LEVEL_10, "raid10" },
152 { RAID_LEVEL_1E, "raid1e" },
152 { RAID_LEVEL_3, "raid3" }, 153 { RAID_LEVEL_3, "raid3" },
153 { RAID_LEVEL_4, "raid4" }, 154 { RAID_LEVEL_4, "raid4" },
154 { RAID_LEVEL_5, "raid5" }, 155 { RAID_LEVEL_5, "raid5" },
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index a60da5555577..513661f45e5f 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -1026,55 +1026,39 @@ static int scsi_vpd_inquiry(struct scsi_device *sdev, unsigned char *buffer,
1026 * responsible for calling kfree() on this pointer when it is no longer 1026 * responsible for calling kfree() on this pointer when it is no longer
1027 * needed. If we cannot retrieve the VPD page this routine returns %NULL. 1027 * needed. If we cannot retrieve the VPD page this routine returns %NULL.
1028 */ 1028 */
1029unsigned char *scsi_get_vpd_page(struct scsi_device *sdev, u8 page) 1029int scsi_get_vpd_page(struct scsi_device *sdev, u8 page, unsigned char *buf,
1030 int buf_len)
1030{ 1031{
1031 int i, result; 1032 int i, result;
1032 unsigned int len;
1033 const unsigned int init_vpd_len = 255;
1034 unsigned char *buf = kmalloc(init_vpd_len, GFP_KERNEL);
1035
1036 if (!buf)
1037 return NULL;
1038 1033
1039 /* Ask for all the pages supported by this device */ 1034 /* Ask for all the pages supported by this device */
1040 result = scsi_vpd_inquiry(sdev, buf, 0, init_vpd_len); 1035 result = scsi_vpd_inquiry(sdev, buf, 0, buf_len);
1041 if (result) 1036 if (result)
1042 goto fail; 1037 goto fail;
1043 1038
1044 /* If the user actually wanted this page, we can skip the rest */ 1039 /* If the user actually wanted this page, we can skip the rest */
1045 if (page == 0) 1040 if (page == 0)
1046 return buf; 1041 return -EINVAL;
1047 1042
1048 for (i = 0; i < buf[3]; i++) 1043 for (i = 0; i < min((int)buf[3], buf_len - 4); i++)
1049 if (buf[i + 4] == page) 1044 if (buf[i + 4] == page)
1050 goto found; 1045 goto found;
1046
1047 if (i < buf[3] && i > buf_len)
1048 /* ran off the end of the buffer, give us benefit of doubt */
1049 goto found;
1051 /* The device claims it doesn't support the requested page */ 1050 /* The device claims it doesn't support the requested page */
1052 goto fail; 1051 goto fail;
1053 1052
1054 found: 1053 found:
1055 result = scsi_vpd_inquiry(sdev, buf, page, 255); 1054 result = scsi_vpd_inquiry(sdev, buf, page, buf_len);
1056 if (result) 1055 if (result)
1057 goto fail; 1056 goto fail;
1058 1057
1059 /* 1058 return 0;
1060 * Some pages are longer than 255 bytes. The actual length of
1061 * the page is returned in the header.
1062 */
1063 len = ((buf[2] << 8) | buf[3]) + 4;
1064 if (len <= init_vpd_len)
1065 return buf;
1066
1067 kfree(buf);
1068 buf = kmalloc(len, GFP_KERNEL);
1069 result = scsi_vpd_inquiry(sdev, buf, page, len);
1070 if (result)
1071 goto fail;
1072
1073 return buf;
1074 1059
1075 fail: 1060 fail:
1076 kfree(buf); 1061 return -EINVAL;
1077 return NULL;
1078} 1062}
1079EXPORT_SYMBOL_GPL(scsi_get_vpd_page); 1063EXPORT_SYMBOL_GPL(scsi_get_vpd_page);
1080 1064
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index c6642423cc67..56977097de9f 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -773,8 +773,14 @@ void scsi_io_completion(struct scsi_cmnd *cmd, unsigned int good_bytes)
773 * we already took a copy of the original into rq->errors which 773 * we already took a copy of the original into rq->errors which
774 * is what gets returned to the user 774 * is what gets returned to the user
775 */ 775 */
776 if (sense_valid && sshdr.sense_key == RECOVERED_ERROR) { 776 if (sense_valid && (sshdr.sense_key == RECOVERED_ERROR)) {
777 if (!(req->cmd_flags & REQ_QUIET)) 777 /* if ATA PASS-THROUGH INFORMATION AVAILABLE skip
778 * print since caller wants ATA registers. Only occurs on
779 * SCSI ATA PASS_THROUGH commands when CK_COND=1
780 */
781 if ((sshdr.asc == 0x0) && (sshdr.ascq == 0x1d))
782 ;
783 else if (!(req->cmd_flags & REQ_QUIET))
778 scsi_print_sense("", cmd); 784 scsi_print_sense("", cmd);
779 result = 0; 785 result = 0;
780 /* BLOCK_PC may have set error */ 786 /* BLOCK_PC may have set error */
diff --git a/drivers/scsi/scsi_sas_internal.h b/drivers/scsi/scsi_sas_internal.h
index 998cb5be6833..6266a5d73d0f 100644
--- a/drivers/scsi/scsi_sas_internal.h
+++ b/drivers/scsi/scsi_sas_internal.h
@@ -5,7 +5,7 @@
5#define SAS_PHY_ATTRS 17 5#define SAS_PHY_ATTRS 17
6#define SAS_PORT_ATTRS 1 6#define SAS_PORT_ATTRS 1
7#define SAS_RPORT_ATTRS 7 7#define SAS_RPORT_ATTRS 7
8#define SAS_END_DEV_ATTRS 3 8#define SAS_END_DEV_ATTRS 5
9#define SAS_EXPANDER_ATTRS 7 9#define SAS_EXPANDER_ATTRS 7
10 10
11struct sas_internal { 11struct sas_internal {
diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c
index 012f73a96880..f697229ae5a9 100644
--- a/drivers/scsi/scsi_scan.c
+++ b/drivers/scsi/scsi_scan.c
@@ -1339,8 +1339,10 @@ static int scsi_report_lun_scan(struct scsi_target *starget, int bflags,
1339 sdev = scsi_alloc_sdev(starget, 0, NULL); 1339 sdev = scsi_alloc_sdev(starget, 0, NULL);
1340 if (!sdev) 1340 if (!sdev)
1341 return 0; 1341 return 0;
1342 if (scsi_device_get(sdev)) 1342 if (scsi_device_get(sdev)) {
1343 __scsi_remove_device(sdev);
1343 return 0; 1344 return 0;
1345 }
1344 } 1346 }
1345 1347
1346 sprintf(devname, "host %d channel %d id %d", 1348 sprintf(devname, "host %d channel %d id %d",
@@ -1907,10 +1909,9 @@ struct scsi_device *scsi_get_host_dev(struct Scsi_Host *shost)
1907 goto out; 1909 goto out;
1908 1910
1909 sdev = scsi_alloc_sdev(starget, 0, NULL); 1911 sdev = scsi_alloc_sdev(starget, 0, NULL);
1910 if (sdev) { 1912 if (sdev)
1911 sdev->sdev_gendev.parent = get_device(&starget->dev);
1912 sdev->borken = 0; 1913 sdev->borken = 0;
1913 } else 1914 else
1914 scsi_target_reap(starget); 1915 scsi_target_reap(starget);
1915 put_device(&starget->dev); 1916 put_device(&starget->dev);
1916 out: 1917 out:
diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c
index c5580805a359..19ec9e2d3f39 100644
--- a/drivers/scsi/scsi_sysfs.c
+++ b/drivers/scsi/scsi_sysfs.c
@@ -880,7 +880,8 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev)
880 struct request_queue *rq = sdev->request_queue; 880 struct request_queue *rq = sdev->request_queue;
881 struct scsi_target *starget = sdev->sdev_target; 881 struct scsi_target *starget = sdev->sdev_target;
882 882
883 if ((error = scsi_device_set_state(sdev, SDEV_RUNNING)) != 0) 883 error = scsi_device_set_state(sdev, SDEV_RUNNING);
884 if (error)
884 return error; 885 return error;
885 886
886 error = scsi_target_add(starget); 887 error = scsi_target_add(starget);
@@ -892,14 +893,14 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev)
892 error = device_add(&sdev->sdev_gendev); 893 error = device_add(&sdev->sdev_gendev);
893 if (error) { 894 if (error) {
894 printk(KERN_INFO "error 1\n"); 895 printk(KERN_INFO "error 1\n");
895 goto out_remove; 896 return error;
896 } 897 }
897 device_enable_async_suspend(&sdev->sdev_dev); 898 device_enable_async_suspend(&sdev->sdev_dev);
898 error = device_add(&sdev->sdev_dev); 899 error = device_add(&sdev->sdev_dev);
899 if (error) { 900 if (error) {
900 printk(KERN_INFO "error 2\n"); 901 printk(KERN_INFO "error 2\n");
901 device_del(&sdev->sdev_gendev); 902 device_del(&sdev->sdev_gendev);
902 goto out_remove; 903 return error;
903 } 904 }
904 transport_add_device(&sdev->sdev_gendev); 905 transport_add_device(&sdev->sdev_gendev);
905 sdev->is_visible = 1; 906 sdev->is_visible = 1;
@@ -914,14 +915,14 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev)
914 else 915 else
915 error = device_create_file(&sdev->sdev_gendev, &dev_attr_queue_depth); 916 error = device_create_file(&sdev->sdev_gendev, &dev_attr_queue_depth);
916 if (error) 917 if (error)
917 goto out_remove; 918 return error;
918 919
919 if (sdev->host->hostt->change_queue_type) 920 if (sdev->host->hostt->change_queue_type)
920 error = device_create_file(&sdev->sdev_gendev, &sdev_attr_queue_type_rw); 921 error = device_create_file(&sdev->sdev_gendev, &sdev_attr_queue_type_rw);
921 else 922 else
922 error = device_create_file(&sdev->sdev_gendev, &dev_attr_queue_type); 923 error = device_create_file(&sdev->sdev_gendev, &dev_attr_queue_type);
923 if (error) 924 if (error)
924 goto out_remove; 925 return error;
925 926
926 error = bsg_register_queue(rq, &sdev->sdev_gendev, NULL, NULL); 927 error = bsg_register_queue(rq, &sdev->sdev_gendev, NULL, NULL);
927 928
@@ -937,16 +938,11 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev)
937 error = device_create_file(&sdev->sdev_gendev, 938 error = device_create_file(&sdev->sdev_gendev,
938 sdev->host->hostt->sdev_attrs[i]); 939 sdev->host->hostt->sdev_attrs[i]);
939 if (error) 940 if (error)
940 goto out_remove; 941 return error;
941 } 942 }
942 } 943 }
943 944
944 return 0;
945
946 out_remove:
947 __scsi_remove_device(sdev);
948 return error; 945 return error;
949
950} 946}
951 947
952void __scsi_remove_device(struct scsi_device *sdev) 948void __scsi_remove_device(struct scsi_device *sdev)
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c
index 653f22a8deb9..79660ee3e211 100644
--- a/drivers/scsi/scsi_transport_fc.c
+++ b/drivers/scsi/scsi_transport_fc.c
@@ -475,7 +475,8 @@ MODULE_PARM_DESC(dev_loss_tmo,
475 "Maximum number of seconds that the FC transport should" 475 "Maximum number of seconds that the FC transport should"
476 " insulate the loss of a remote port. Once this value is" 476 " insulate the loss of a remote port. Once this value is"
477 " exceeded, the scsi target is removed. Value should be" 477 " exceeded, the scsi target is removed. Value should be"
478 " between 1 and SCSI_DEVICE_BLOCK_MAX_TIMEOUT."); 478 " between 1 and SCSI_DEVICE_BLOCK_MAX_TIMEOUT if"
479 " fast_io_fail_tmo is not set.");
479 480
480/* 481/*
481 * Netlink Infrastructure 482 * Netlink Infrastructure
@@ -842,9 +843,17 @@ store_fc_rport_dev_loss_tmo(struct device *dev, struct device_attribute *attr,
842 (rport->port_state == FC_PORTSTATE_NOTPRESENT)) 843 (rport->port_state == FC_PORTSTATE_NOTPRESENT))
843 return -EBUSY; 844 return -EBUSY;
844 val = simple_strtoul(buf, &cp, 0); 845 val = simple_strtoul(buf, &cp, 0);
845 if ((*cp && (*cp != '\n')) || 846 if ((*cp && (*cp != '\n')) || (val < 0))
846 (val < 0) || (val > SCSI_DEVICE_BLOCK_MAX_TIMEOUT))
847 return -EINVAL; 847 return -EINVAL;
848
849 /*
850 * If fast_io_fail is off we have to cap
851 * dev_loss_tmo at SCSI_DEVICE_BLOCK_MAX_TIMEOUT
852 */
853 if (rport->fast_io_fail_tmo == -1 &&
854 val > SCSI_DEVICE_BLOCK_MAX_TIMEOUT)
855 return -EINVAL;
856
848 i->f->set_rport_dev_loss_tmo(rport, val); 857 i->f->set_rport_dev_loss_tmo(rport, val);
849 return count; 858 return count;
850} 859}
@@ -925,9 +934,16 @@ store_fc_rport_fast_io_fail_tmo(struct device *dev,
925 rport->fast_io_fail_tmo = -1; 934 rport->fast_io_fail_tmo = -1;
926 else { 935 else {
927 val = simple_strtoul(buf, &cp, 0); 936 val = simple_strtoul(buf, &cp, 0);
928 if ((*cp && (*cp != '\n')) || 937 if ((*cp && (*cp != '\n')) || (val < 0))
929 (val < 0) || (val >= rport->dev_loss_tmo))
930 return -EINVAL; 938 return -EINVAL;
939 /*
940 * Cap fast_io_fail by dev_loss_tmo or
941 * SCSI_DEVICE_BLOCK_MAX_TIMEOUT.
942 */
943 if ((val >= rport->dev_loss_tmo) ||
944 (val > SCSI_DEVICE_BLOCK_MAX_TIMEOUT))
945 return -EINVAL;
946
931 rport->fast_io_fail_tmo = val; 947 rport->fast_io_fail_tmo = val;
932 } 948 }
933 return count; 949 return count;
diff --git a/drivers/scsi/scsi_transport_sas.c b/drivers/scsi/scsi_transport_sas.c
index f27e52d963d3..927e99cb7225 100644
--- a/drivers/scsi/scsi_transport_sas.c
+++ b/drivers/scsi/scsi_transport_sas.c
@@ -155,6 +155,17 @@ static struct {
155sas_bitfield_name_search(linkspeed, sas_linkspeed_names) 155sas_bitfield_name_search(linkspeed, sas_linkspeed_names)
156sas_bitfield_name_set(linkspeed, sas_linkspeed_names) 156sas_bitfield_name_set(linkspeed, sas_linkspeed_names)
157 157
158static struct sas_end_device *sas_sdev_to_rdev(struct scsi_device *sdev)
159{
160 struct sas_rphy *rphy = target_to_rphy(sdev->sdev_target);
161 struct sas_end_device *rdev;
162
163 BUG_ON(rphy->identify.device_type != SAS_END_DEVICE);
164
165 rdev = rphy_to_end_device(rphy);
166 return rdev;
167}
168
158static void sas_smp_request(struct request_queue *q, struct Scsi_Host *shost, 169static void sas_smp_request(struct request_queue *q, struct Scsi_Host *shost,
159 struct sas_rphy *rphy) 170 struct sas_rphy *rphy)
160{ 171{
@@ -358,6 +369,85 @@ void sas_remove_host(struct Scsi_Host *shost)
358} 369}
359EXPORT_SYMBOL(sas_remove_host); 370EXPORT_SYMBOL(sas_remove_host);
360 371
372/**
373 * sas_tlr_supported - checking TLR bit in vpd 0x90
374 * @sdev: scsi device struct
375 *
376 * Check Transport Layer Retries are supported or not.
377 * If vpd page 0x90 is present, TRL is supported.
378 *
379 */
380unsigned int
381sas_tlr_supported(struct scsi_device *sdev)
382{
383 const int vpd_len = 32;
384 struct sas_end_device *rdev = sas_sdev_to_rdev(sdev);
385 char *buffer = kzalloc(vpd_len, GFP_KERNEL);
386 int ret = 0;
387
388 if (scsi_get_vpd_page(sdev, 0x90, buffer, vpd_len))
389 goto out;
390
391 /*
392 * Magic numbers: the VPD Protocol page (0x90)
393 * has a 4 byte header and then one entry per device port
394 * the TLR bit is at offset 8 on each port entry
395 * if we take the first port, that's at total offset 12
396 */
397 ret = buffer[12] & 0x01;
398
399 out:
400 kfree(buffer);
401 rdev->tlr_supported = ret;
402 return ret;
403
404}
405EXPORT_SYMBOL_GPL(sas_tlr_supported);
406
407/**
408 * sas_disable_tlr - setting TLR flags
409 * @sdev: scsi device struct
410 *
411 * Seting tlr_enabled flag to 0.
412 *
413 */
414void
415sas_disable_tlr(struct scsi_device *sdev)
416{
417 struct sas_end_device *rdev = sas_sdev_to_rdev(sdev);
418
419 rdev->tlr_enabled = 0;
420}
421EXPORT_SYMBOL_GPL(sas_disable_tlr);
422
423/**
424 * sas_enable_tlr - setting TLR flags
425 * @sdev: scsi device struct
426 *
427 * Seting tlr_enabled flag 1.
428 *
429 */
430void sas_enable_tlr(struct scsi_device *sdev)
431{
432 unsigned int tlr_supported = 0;
433 tlr_supported = sas_tlr_supported(sdev);
434
435 if (tlr_supported) {
436 struct sas_end_device *rdev = sas_sdev_to_rdev(sdev);
437
438 rdev->tlr_enabled = 1;
439 }
440
441 return;
442}
443EXPORT_SYMBOL_GPL(sas_enable_tlr);
444
445unsigned int sas_is_tlr_enabled(struct scsi_device *sdev)
446{
447 struct sas_end_device *rdev = sas_sdev_to_rdev(sdev);
448 return rdev->tlr_enabled;
449}
450EXPORT_SYMBOL_GPL(sas_is_tlr_enabled);
361 451
362/* 452/*
363 * SAS Phy attributes 453 * SAS Phy attributes
@@ -1146,15 +1236,10 @@ sas_rphy_simple_attr(identify.phy_identifier, phy_identifier, "%d\n", u8);
1146int sas_read_port_mode_page(struct scsi_device *sdev) 1236int sas_read_port_mode_page(struct scsi_device *sdev)
1147{ 1237{
1148 char *buffer = kzalloc(BUF_SIZE, GFP_KERNEL), *msdata; 1238 char *buffer = kzalloc(BUF_SIZE, GFP_KERNEL), *msdata;
1149 struct sas_rphy *rphy = target_to_rphy(sdev->sdev_target); 1239 struct sas_end_device *rdev = sas_sdev_to_rdev(sdev);
1150 struct sas_end_device *rdev;
1151 struct scsi_mode_data mode_data; 1240 struct scsi_mode_data mode_data;
1152 int res, error; 1241 int res, error;
1153 1242
1154 BUG_ON(rphy->identify.device_type != SAS_END_DEVICE);
1155
1156 rdev = rphy_to_end_device(rphy);
1157
1158 if (!buffer) 1243 if (!buffer)
1159 return -ENOMEM; 1244 return -ENOMEM;
1160 1245
@@ -1207,6 +1292,10 @@ sas_end_dev_simple_attr(I_T_nexus_loss_timeout, I_T_nexus_loss_timeout,
1207 "%d\n", int); 1292 "%d\n", int);
1208sas_end_dev_simple_attr(initiator_response_timeout, initiator_response_timeout, 1293sas_end_dev_simple_attr(initiator_response_timeout, initiator_response_timeout,
1209 "%d\n", int); 1294 "%d\n", int);
1295sas_end_dev_simple_attr(tlr_supported, tlr_supported,
1296 "%d\n", int);
1297sas_end_dev_simple_attr(tlr_enabled, tlr_enabled,
1298 "%d\n", int);
1210 1299
1211static DECLARE_TRANSPORT_CLASS(sas_expander_class, 1300static DECLARE_TRANSPORT_CLASS(sas_expander_class,
1212 "sas_expander", NULL, NULL, NULL); 1301 "sas_expander", NULL, NULL, NULL);
@@ -1733,6 +1822,8 @@ sas_attach_transport(struct sas_function_template *ft)
1733 SETUP_END_DEV_ATTRIBUTE(end_dev_ready_led_meaning); 1822 SETUP_END_DEV_ATTRIBUTE(end_dev_ready_led_meaning);
1734 SETUP_END_DEV_ATTRIBUTE(end_dev_I_T_nexus_loss_timeout); 1823 SETUP_END_DEV_ATTRIBUTE(end_dev_I_T_nexus_loss_timeout);
1735 SETUP_END_DEV_ATTRIBUTE(end_dev_initiator_response_timeout); 1824 SETUP_END_DEV_ATTRIBUTE(end_dev_initiator_response_timeout);
1825 SETUP_END_DEV_ATTRIBUTE(end_dev_tlr_supported);
1826 SETUP_END_DEV_ATTRIBUTE(end_dev_tlr_enabled);
1736 i->end_dev_attrs[count] = NULL; 1827 i->end_dev_attrs[count] = NULL;
1737 1828
1738 count = 0; 1829 count = 0;
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 255da53e5a01..1dd4d8407694 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -1196,19 +1196,10 @@ static int sd_done(struct scsi_cmnd *SCpnt)
1196 SCpnt->result = 0; 1196 SCpnt->result = 0;
1197 memset(SCpnt->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 1197 memset(SCpnt->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1198 break; 1198 break;
1199 case ABORTED_COMMAND: 1199 case ABORTED_COMMAND: /* DIF: Target detected corruption */
1200 if (sshdr.asc == 0x10) { /* DIF: Disk detected corruption */ 1200 case ILLEGAL_REQUEST: /* DIX: Host detected corruption */
1201 scsi_print_result(SCpnt); 1201 if (sshdr.asc == 0x10)
1202 scsi_print_sense("sd", SCpnt);
1203 good_bytes = sd_completed_bytes(SCpnt); 1202 good_bytes = sd_completed_bytes(SCpnt);
1204 }
1205 break;
1206 case ILLEGAL_REQUEST:
1207 if (sshdr.asc == 0x10) { /* DIX: HBA detected corruption */
1208 scsi_print_result(SCpnt);
1209 scsi_print_sense("sd", SCpnt);
1210 good_bytes = sd_completed_bytes(SCpnt);
1211 }
1212 break; 1203 break;
1213 default: 1204 default:
1214 break; 1205 break;
@@ -1218,8 +1209,19 @@ static int sd_done(struct scsi_cmnd *SCpnt)
1218 sd_dif_complete(SCpnt, good_bytes); 1209 sd_dif_complete(SCpnt, good_bytes);
1219 1210
1220 if (scsi_host_dif_capable(sdkp->device->host, sdkp->protection_type) 1211 if (scsi_host_dif_capable(sdkp->device->host, sdkp->protection_type)
1221 == SD_DIF_TYPE2_PROTECTION && SCpnt->cmnd != SCpnt->request->cmd) 1212 == SD_DIF_TYPE2_PROTECTION && SCpnt->cmnd != SCpnt->request->cmd) {
1213
1214 /* We have to print a failed command here as the
1215 * extended CDB gets freed before scsi_io_completion()
1216 * is called.
1217 */
1218 if (result)
1219 scsi_print_command(SCpnt);
1220
1222 mempool_free(SCpnt->cmnd, sd_cdb_pool); 1221 mempool_free(SCpnt->cmnd, sd_cdb_pool);
1222 SCpnt->cmnd = NULL;
1223 SCpnt->cmd_len = 0;
1224 }
1223 1225
1224 return good_bytes; 1226 return good_bytes;
1225} 1227}
@@ -1946,13 +1948,13 @@ static void sd_read_block_limits(struct scsi_disk *sdkp)
1946{ 1948{
1947 struct request_queue *q = sdkp->disk->queue; 1949 struct request_queue *q = sdkp->disk->queue;
1948 unsigned int sector_sz = sdkp->device->sector_size; 1950 unsigned int sector_sz = sdkp->device->sector_size;
1949 char *buffer; 1951 const int vpd_len = 32;
1952 unsigned char *buffer = kmalloc(vpd_len, GFP_KERNEL);
1950 1953
1951 /* Block Limits VPD */ 1954 if (!buffer ||
1952 buffer = scsi_get_vpd_page(sdkp->device, 0xb0); 1955 /* Block Limits VPD */
1953 1956 scsi_get_vpd_page(sdkp->device, 0xb0, buffer, vpd_len))
1954 if (buffer == NULL) 1957 goto out;
1955 return;
1956 1958
1957 blk_queue_io_min(sdkp->disk->queue, 1959 blk_queue_io_min(sdkp->disk->queue,
1958 get_unaligned_be16(&buffer[6]) * sector_sz); 1960 get_unaligned_be16(&buffer[6]) * sector_sz);
@@ -1984,6 +1986,7 @@ static void sd_read_block_limits(struct scsi_disk *sdkp)
1984 get_unaligned_be32(&buffer[32]) & ~(1 << 31); 1986 get_unaligned_be32(&buffer[32]) & ~(1 << 31);
1985 } 1987 }
1986 1988
1989 out:
1987 kfree(buffer); 1990 kfree(buffer);
1988} 1991}
1989 1992
@@ -1993,20 +1996,23 @@ static void sd_read_block_limits(struct scsi_disk *sdkp)
1993 */ 1996 */
1994static void sd_read_block_characteristics(struct scsi_disk *sdkp) 1997static void sd_read_block_characteristics(struct scsi_disk *sdkp)
1995{ 1998{
1996 char *buffer; 1999 unsigned char *buffer;
1997 u16 rot; 2000 u16 rot;
2001 const int vpd_len = 32;
1998 2002
1999 /* Block Device Characteristics VPD */ 2003 buffer = kmalloc(vpd_len, GFP_KERNEL);
2000 buffer = scsi_get_vpd_page(sdkp->device, 0xb1);
2001 2004
2002 if (buffer == NULL) 2005 if (!buffer ||
2003 return; 2006 /* Block Device Characteristics VPD */
2007 scsi_get_vpd_page(sdkp->device, 0xb1, buffer, vpd_len))
2008 goto out;
2004 2009
2005 rot = get_unaligned_be16(&buffer[4]); 2010 rot = get_unaligned_be16(&buffer[4]);
2006 2011
2007 if (rot == 1) 2012 if (rot == 1)
2008 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, sdkp->disk->queue); 2013 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, sdkp->disk->queue);
2009 2014
2015 out:
2010 kfree(buffer); 2016 kfree(buffer);
2011} 2017}
2012 2018
diff --git a/drivers/scsi/ses.c b/drivers/scsi/ses.c
index 55b034b72708..1d7a8780e00c 100644
--- a/drivers/scsi/ses.c
+++ b/drivers/scsi/ses.c
@@ -448,13 +448,17 @@ static void ses_match_to_enclosure(struct enclosure_device *edev,
448 .addr = 0, 448 .addr = 0,
449 }; 449 };
450 450
451 buf = scsi_get_vpd_page(sdev, 0x83); 451 buf = kmalloc(INIT_ALLOC_SIZE, GFP_KERNEL);
452 if (!buf) 452 if (!buf || scsi_get_vpd_page(sdev, 0x83, buf, INIT_ALLOC_SIZE))
453 return; 453 goto free;
454 454
455 ses_enclosure_data_process(edev, to_scsi_device(edev->edev.parent), 0); 455 ses_enclosure_data_process(edev, to_scsi_device(edev->edev.parent), 0);
456 456
457 vpd_len = ((buf[2] << 8) | buf[3]) + 4; 457 vpd_len = ((buf[2] << 8) | buf[3]) + 4;
458 kfree(buf);
459 buf = kmalloc(vpd_len, GFP_KERNEL);
460 if (!buf ||scsi_get_vpd_page(sdev, 0x83, buf, vpd_len))
461 goto free;
458 462
459 desc = buf + 4; 463 desc = buf + 4;
460 while (desc < buf + vpd_len) { 464 while (desc < buf + vpd_len) {
diff --git a/drivers/scsi/u14-34f.c b/drivers/scsi/u14-34f.c
index 54023d41fd15..26e8e0e6b8dd 100644
--- a/drivers/scsi/u14-34f.c
+++ b/drivers/scsi/u14-34f.c
@@ -1070,7 +1070,7 @@ static int option_setup(char *str) {
1070 char *cur = str; 1070 char *cur = str;
1071 int i = 1; 1071 int i = 1;
1072 1072
1073 while (cur && isdigit(*cur) && i <= MAX_INT_PARAM) { 1073 while (cur && isdigit(*cur) && i < MAX_INT_PARAM) {
1074 ints[i++] = simple_strtoul(cur, NULL, 0); 1074 ints[i++] = simple_strtoul(cur, NULL, 0);
1075 1075
1076 if ((cur = strchr(cur, ',')) != NULL) cur++; 1076 if ((cur = strchr(cur, ',')) != NULL) cur++;
diff --git a/drivers/scsi/vmw_pvscsi.c b/drivers/scsi/vmw_pvscsi.c
index d2604c813a20..e4ac5829b637 100644
--- a/drivers/scsi/vmw_pvscsi.c
+++ b/drivers/scsi/vmw_pvscsi.c
@@ -1069,7 +1069,8 @@ static void pvscsi_free_sgls(const struct pvscsi_adapter *adapter)
1069 free_pages((unsigned long)ctx->sgl, get_order(SGL_SIZE)); 1069 free_pages((unsigned long)ctx->sgl, get_order(SGL_SIZE));
1070} 1070}
1071 1071
1072static int pvscsi_setup_msix(const struct pvscsi_adapter *adapter, int *irq) 1072static int pvscsi_setup_msix(const struct pvscsi_adapter *adapter,
1073 unsigned int *irq)
1073{ 1074{
1074 struct msix_entry entry = { 0, PVSCSI_VECTOR_COMPLETION }; 1075 struct msix_entry entry = { 0, PVSCSI_VECTOR_COMPLETION };
1075 int ret; 1076 int ret;
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 0efcded59ae6..f7d2589926d2 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -518,34 +518,6 @@ static inline int sci_rxd_in(struct uart_port *port)
518{ 518{
519 if (port->mapbase == 0xfffffe80) 519 if (port->mapbase == 0xfffffe80)
520 return __raw_readb(SCPDR)&0x01 ? 1 : 0; /* SCI */ 520 return __raw_readb(SCPDR)&0x01 ? 1 : 0; /* SCI */
521 if (port->mapbase == 0xa4000150)
522 return __raw_readb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
523 if (port->mapbase == 0xa4000140)
524 return __raw_readb(SCPDR)&0x04 ? 1 : 0; /* IRDA */
525 return 1;
526}
527#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
528static inline int sci_rxd_in(struct uart_port *port)
529{
530 if (port->mapbase == SCIF0)
531 return __raw_readb(SCPDR)&0x04 ? 1 : 0; /* IRDA */
532 if (port->mapbase == SCIF2)
533 return __raw_readb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
534 return 1;
535}
536#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
537static inline int sci_rxd_in(struct uart_port *port)
538{
539 return sci_in(port,SCxSR)&0x0010 ? 1 : 0;
540}
541#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
542 defined(CONFIG_CPU_SUBTYPE_SH7721)
543static inline int sci_rxd_in(struct uart_port *port)
544{
545 if (port->mapbase == 0xa4430000)
546 return sci_in(port, SCxSR) & 0x0003 ? 1 : 0;
547 else if (port->mapbase == 0xa4438000)
548 return sci_in(port, SCxSR) & 0x0003 ? 1 : 0;
549 return 1; 521 return 1;
550} 522}
551#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ 523#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
@@ -558,207 +530,17 @@ static inline int sci_rxd_in(struct uart_port *port)
558{ 530{
559 if (port->mapbase == 0xffe00000) 531 if (port->mapbase == 0xffe00000)
560 return __raw_readb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */ 532 return __raw_readb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */
561 if (port->mapbase == 0xffe80000)
562 return __raw_readw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
563 return 1;
564}
565#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
566static inline int sci_rxd_in(struct uart_port *port)
567{
568 if (port->mapbase == 0xffe80000)
569 return __raw_readw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
570 return 1; 533 return 1;
571} 534}
572#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
573static inline int sci_rxd_in(struct uart_port *port)
574{
575 if (port->mapbase == 0xfe4b0000)
576 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0;
577 if (port->mapbase == 0xfe4c0000)
578 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0;
579 if (port->mapbase == 0xfe4d0000)
580 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0;
581}
582#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
583static inline int sci_rxd_in(struct uart_port *port)
584{
585 if (port->mapbase == 0xfe600000)
586 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
587 if (port->mapbase == 0xfe610000)
588 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
589 if (port->mapbase == 0xfe620000)
590 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
591 return 1;
592}
593#elif defined(CONFIG_CPU_SUBTYPE_SH7343)
594static inline int sci_rxd_in(struct uart_port *port)
595{
596 if (port->mapbase == 0xffe00000)
597 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
598 if (port->mapbase == 0xffe10000)
599 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
600 if (port->mapbase == 0xffe20000)
601 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
602 if (port->mapbase == 0xffe30000)
603 return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
604 return 1;
605}
606#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
607static inline int sci_rxd_in(struct uart_port *port)
608{
609 if (port->mapbase == 0xffe00000)
610 return __raw_readb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
611 return 1;
612}
613#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
614static inline int sci_rxd_in(struct uart_port *port)
615{
616 if (port->mapbase == 0xffe00000)
617 return __raw_readb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */
618 if (port->mapbase == 0xffe10000)
619 return __raw_readb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */
620 if (port->mapbase == 0xffe20000)
621 return __raw_readb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */
622
623 return 1;
624}
625#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
626static inline int sci_rxd_in(struct uart_port *port)
627{
628 if (port->mapbase == 0xffe00000)
629 return __raw_readb(SCSPTR0) & 0x0008 ? 1 : 0; /* SCIF0 */
630 if (port->mapbase == 0xffe10000)
631 return __raw_readb(SCSPTR1) & 0x0020 ? 1 : 0; /* SCIF1 */
632 if (port->mapbase == 0xffe20000)
633 return __raw_readb(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF2 */
634 if (port->mapbase == 0xa4e30000)
635 return __raw_readb(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF3 */
636 if (port->mapbase == 0xa4e40000)
637 return __raw_readb(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF4 */
638 if (port->mapbase == 0xa4e50000)
639 return __raw_readb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */
640 return 1;
641}
642#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
643# define SCFSR 0x0010
644# define SCASSR 0x0014
645static inline int sci_rxd_in(struct uart_port *port)
646{
647 if (port->type == PORT_SCIF)
648 return __raw_readw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0;
649 if (port->type == PORT_SCIFA)
650 return __raw_readw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0;
651 return 1;
652}
653#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
654static inline int sci_rxd_in(struct uart_port *port)
655{
656 return sci_in(port, SCSPTR)&0x0001 ? 1 : 0; /* SCIF */
657}
658#elif defined(__H8300H__) || defined(__H8300S__) 535#elif defined(__H8300H__) || defined(__H8300S__)
659static inline int sci_rxd_in(struct uart_port *port) 536static inline int sci_rxd_in(struct uart_port *port)
660{ 537{
661 int ch = (port->mapbase - SMR0) >> 3; 538 int ch = (port->mapbase - SMR0) >> 3;
662 return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0; 539 return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0;
663} 540}
664#elif defined(CONFIG_CPU_SUBTYPE_SH7763) 541#else /* default case for non-SCI processors */
665static inline int sci_rxd_in(struct uart_port *port)
666{
667 if (port->mapbase == 0xffe00000)
668 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
669 if (port->mapbase == 0xffe08000)
670 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
671 if (port->mapbase == 0xffe10000)
672 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */
673
674 return 1;
675}
676#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
677static inline int sci_rxd_in(struct uart_port *port)
678{
679 if (port->mapbase == 0xff923000)
680 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
681 if (port->mapbase == 0xff924000)
682 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
683 if (port->mapbase == 0xff925000)
684 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
685 return 1;
686}
687#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
688static inline int sci_rxd_in(struct uart_port *port)
689{
690 if (port->mapbase == 0xffe00000)
691 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
692 if (port->mapbase == 0xffe10000)
693 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
694 return 1;
695}
696#elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \
697 defined(CONFIG_CPU_SUBTYPE_SH7786)
698static inline int sci_rxd_in(struct uart_port *port)
699{
700 if (port->mapbase == 0xffea0000)
701 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
702 if (port->mapbase == 0xffeb0000)
703 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
704 if (port->mapbase == 0xffec0000)
705 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
706 if (port->mapbase == 0xffed0000)
707 return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
708 if (port->mapbase == 0xffee0000)
709 return __raw_readw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */
710 if (port->mapbase == 0xffef0000)
711 return __raw_readw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */
712 return 1;
713}
714#elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \
715 defined(CONFIG_CPU_SUBTYPE_SH7203) || \
716 defined(CONFIG_CPU_SUBTYPE_SH7206) || \
717 defined(CONFIG_CPU_SUBTYPE_SH7263)
718static inline int sci_rxd_in(struct uart_port *port)
719{
720 if (port->mapbase == 0xfffe8000)
721 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
722 if (port->mapbase == 0xfffe8800)
723 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
724 if (port->mapbase == 0xfffe9000)
725 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
726 if (port->mapbase == 0xfffe9800)
727 return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
728#if defined(CONFIG_CPU_SUBTYPE_SH7201)
729 if (port->mapbase == 0xfffeA000)
730 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
731 if (port->mapbase == 0xfffeA800)
732 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
733 if (port->mapbase == 0xfffeB000)
734 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
735 if (port->mapbase == 0xfffeB800)
736 return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
737#endif
738 return 1;
739}
740#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
741static inline int sci_rxd_in(struct uart_port *port)
742{
743 if (port->mapbase == 0xf8400000)
744 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
745 if (port->mapbase == 0xf8410000)
746 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
747 if (port->mapbase == 0xf8420000)
748 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
749 return 1;
750}
751#elif defined(CONFIG_CPU_SUBTYPE_SHX3)
752static inline int sci_rxd_in(struct uart_port *port) 542static inline int sci_rxd_in(struct uart_port *port)
753{ 543{
754 if (port->mapbase == 0xffc30000)
755 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
756 if (port->mapbase == 0xffc40000)
757 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
758 if (port->mapbase == 0xffc50000)
759 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
760 if (port->mapbase == 0xffc60000)
761 return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
762 return 1; 544 return 1;
763} 545}
764#endif 546#endif
diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c
index d5d7f23c19a5..3a5a17db9474 100644
--- a/drivers/sh/intc.c
+++ b/drivers/sh/intc.c
@@ -259,6 +259,43 @@ static void intc_disable(unsigned int irq)
259 } 259 }
260} 260}
261 261
262static void (*intc_enable_noprio_fns[])(unsigned long addr,
263 unsigned long handle,
264 void (*fn)(unsigned long,
265 unsigned long,
266 unsigned long),
267 unsigned int irq) = {
268 [MODE_ENABLE_REG] = intc_mode_field,
269 [MODE_MASK_REG] = intc_mode_zero,
270 [MODE_DUAL_REG] = intc_mode_field,
271 [MODE_PRIO_REG] = intc_mode_field,
272 [MODE_PCLR_REG] = intc_mode_field,
273};
274
275static void intc_enable_disable(struct intc_desc_int *d,
276 unsigned long handle, int do_enable)
277{
278 unsigned long addr;
279 unsigned int cpu;
280 void (*fn)(unsigned long, unsigned long,
281 void (*)(unsigned long, unsigned long, unsigned long),
282 unsigned int);
283
284 if (do_enable) {
285 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) {
286 addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu);
287 fn = intc_enable_noprio_fns[_INTC_MODE(handle)];
288 fn(addr, handle, intc_reg_fns[_INTC_FN(handle)], 0);
289 }
290 } else {
291 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) {
292 addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu);
293 fn = intc_disable_fns[_INTC_MODE(handle)];
294 fn(addr, handle, intc_reg_fns[_INTC_FN(handle)], 0);
295 }
296 }
297}
298
262static int intc_set_wake(unsigned int irq, unsigned int on) 299static int intc_set_wake(unsigned int irq, unsigned int on)
263{ 300{
264 return 0; /* allow wakeup, but setup hardware in intc_suspend() */ 301 return 0; /* allow wakeup, but setup hardware in intc_suspend() */
@@ -400,11 +437,11 @@ static unsigned int __init intc_get_reg(struct intc_desc_int *d,
400static intc_enum __init intc_grp_id(struct intc_desc *desc, 437static intc_enum __init intc_grp_id(struct intc_desc *desc,
401 intc_enum enum_id) 438 intc_enum enum_id)
402{ 439{
403 struct intc_group *g = desc->groups; 440 struct intc_group *g = desc->hw.groups;
404 unsigned int i, j; 441 unsigned int i, j;
405 442
406 for (i = 0; g && enum_id && i < desc->nr_groups; i++) { 443 for (i = 0; g && enum_id && i < desc->hw.nr_groups; i++) {
407 g = desc->groups + i; 444 g = desc->hw.groups + i;
408 445
409 for (j = 0; g->enum_ids[j]; j++) { 446 for (j = 0; g->enum_ids[j]; j++) {
410 if (g->enum_ids[j] != enum_id) 447 if (g->enum_ids[j] != enum_id)
@@ -417,19 +454,21 @@ static intc_enum __init intc_grp_id(struct intc_desc *desc,
417 return 0; 454 return 0;
418} 455}
419 456
420static unsigned int __init intc_mask_data(struct intc_desc *desc, 457static unsigned int __init _intc_mask_data(struct intc_desc *desc,
421 struct intc_desc_int *d, 458 struct intc_desc_int *d,
422 intc_enum enum_id, int do_grps) 459 intc_enum enum_id,
460 unsigned int *reg_idx,
461 unsigned int *fld_idx)
423{ 462{
424 struct intc_mask_reg *mr = desc->mask_regs; 463 struct intc_mask_reg *mr = desc->hw.mask_regs;
425 unsigned int i, j, fn, mode; 464 unsigned int fn, mode;
426 unsigned long reg_e, reg_d; 465 unsigned long reg_e, reg_d;
427 466
428 for (i = 0; mr && enum_id && i < desc->nr_mask_regs; i++) { 467 while (mr && enum_id && *reg_idx < desc->hw.nr_mask_regs) {
429 mr = desc->mask_regs + i; 468 mr = desc->hw.mask_regs + *reg_idx;
430 469
431 for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) { 470 for (; *fld_idx < ARRAY_SIZE(mr->enum_ids); (*fld_idx)++) {
432 if (mr->enum_ids[j] != enum_id) 471 if (mr->enum_ids[*fld_idx] != enum_id)
433 continue; 472 continue;
434 473
435 if (mr->set_reg && mr->clr_reg) { 474 if (mr->set_reg && mr->clr_reg) {
@@ -455,29 +494,49 @@ static unsigned int __init intc_mask_data(struct intc_desc *desc,
455 intc_get_reg(d, reg_e), 494 intc_get_reg(d, reg_e),
456 intc_get_reg(d, reg_d), 495 intc_get_reg(d, reg_d),
457 1, 496 1,
458 (mr->reg_width - 1) - j); 497 (mr->reg_width - 1) - *fld_idx);
459 } 498 }
499
500 *fld_idx = 0;
501 (*reg_idx)++;
460 } 502 }
461 503
504 return 0;
505}
506
507static unsigned int __init intc_mask_data(struct intc_desc *desc,
508 struct intc_desc_int *d,
509 intc_enum enum_id, int do_grps)
510{
511 unsigned int i = 0;
512 unsigned int j = 0;
513 unsigned int ret;
514
515 ret = _intc_mask_data(desc, d, enum_id, &i, &j);
516 if (ret)
517 return ret;
518
462 if (do_grps) 519 if (do_grps)
463 return intc_mask_data(desc, d, intc_grp_id(desc, enum_id), 0); 520 return intc_mask_data(desc, d, intc_grp_id(desc, enum_id), 0);
464 521
465 return 0; 522 return 0;
466} 523}
467 524
468static unsigned int __init intc_prio_data(struct intc_desc *desc, 525static unsigned int __init _intc_prio_data(struct intc_desc *desc,
469 struct intc_desc_int *d, 526 struct intc_desc_int *d,
470 intc_enum enum_id, int do_grps) 527 intc_enum enum_id,
528 unsigned int *reg_idx,
529 unsigned int *fld_idx)
471{ 530{
472 struct intc_prio_reg *pr = desc->prio_regs; 531 struct intc_prio_reg *pr = desc->hw.prio_regs;
473 unsigned int i, j, fn, mode, bit; 532 unsigned int fn, n, mode, bit;
474 unsigned long reg_e, reg_d; 533 unsigned long reg_e, reg_d;
475 534
476 for (i = 0; pr && enum_id && i < desc->nr_prio_regs; i++) { 535 while (pr && enum_id && *reg_idx < desc->hw.nr_prio_regs) {
477 pr = desc->prio_regs + i; 536 pr = desc->hw.prio_regs + *reg_idx;
478 537
479 for (j = 0; j < ARRAY_SIZE(pr->enum_ids); j++) { 538 for (; *fld_idx < ARRAY_SIZE(pr->enum_ids); (*fld_idx)++) {
480 if (pr->enum_ids[j] != enum_id) 539 if (pr->enum_ids[*fld_idx] != enum_id)
481 continue; 540 continue;
482 541
483 if (pr->set_reg && pr->clr_reg) { 542 if (pr->set_reg && pr->clr_reg) {
@@ -495,34 +554,79 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc,
495 } 554 }
496 555
497 fn += (pr->reg_width >> 3) - 1; 556 fn += (pr->reg_width >> 3) - 1;
557 n = *fld_idx + 1;
498 558
499 BUG_ON((j + 1) * pr->field_width > pr->reg_width); 559 BUG_ON(n * pr->field_width > pr->reg_width);
500 560
501 bit = pr->reg_width - ((j + 1) * pr->field_width); 561 bit = pr->reg_width - (n * pr->field_width);
502 562
503 return _INTC_MK(fn, mode, 563 return _INTC_MK(fn, mode,
504 intc_get_reg(d, reg_e), 564 intc_get_reg(d, reg_e),
505 intc_get_reg(d, reg_d), 565 intc_get_reg(d, reg_d),
506 pr->field_width, bit); 566 pr->field_width, bit);
507 } 567 }
568
569 *fld_idx = 0;
570 (*reg_idx)++;
508 } 571 }
509 572
573 return 0;
574}
575
576static unsigned int __init intc_prio_data(struct intc_desc *desc,
577 struct intc_desc_int *d,
578 intc_enum enum_id, int do_grps)
579{
580 unsigned int i = 0;
581 unsigned int j = 0;
582 unsigned int ret;
583
584 ret = _intc_prio_data(desc, d, enum_id, &i, &j);
585 if (ret)
586 return ret;
587
510 if (do_grps) 588 if (do_grps)
511 return intc_prio_data(desc, d, intc_grp_id(desc, enum_id), 0); 589 return intc_prio_data(desc, d, intc_grp_id(desc, enum_id), 0);
512 590
513 return 0; 591 return 0;
514} 592}
515 593
594static void __init intc_enable_disable_enum(struct intc_desc *desc,
595 struct intc_desc_int *d,
596 intc_enum enum_id, int enable)
597{
598 unsigned int i, j, data;
599
600 /* go through and enable/disable all mask bits */
601 i = j = 0;
602 do {
603 data = _intc_mask_data(desc, d, enum_id, &i, &j);
604 if (data)
605 intc_enable_disable(d, data, enable);
606 j++;
607 } while (data);
608
609 /* go through and enable/disable all priority fields */
610 i = j = 0;
611 do {
612 data = _intc_prio_data(desc, d, enum_id, &i, &j);
613 if (data)
614 intc_enable_disable(d, data, enable);
615
616 j++;
617 } while (data);
618}
619
516static unsigned int __init intc_ack_data(struct intc_desc *desc, 620static unsigned int __init intc_ack_data(struct intc_desc *desc,
517 struct intc_desc_int *d, 621 struct intc_desc_int *d,
518 intc_enum enum_id) 622 intc_enum enum_id)
519{ 623{
520 struct intc_mask_reg *mr = desc->ack_regs; 624 struct intc_mask_reg *mr = desc->hw.ack_regs;
521 unsigned int i, j, fn, mode; 625 unsigned int i, j, fn, mode;
522 unsigned long reg_e, reg_d; 626 unsigned long reg_e, reg_d;
523 627
524 for (i = 0; mr && enum_id && i < desc->nr_ack_regs; i++) { 628 for (i = 0; mr && enum_id && i < desc->hw.nr_ack_regs; i++) {
525 mr = desc->ack_regs + i; 629 mr = desc->hw.ack_regs + i;
526 630
527 for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) { 631 for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
528 if (mr->enum_ids[j] != enum_id) 632 if (mr->enum_ids[j] != enum_id)
@@ -549,11 +653,11 @@ static unsigned int __init intc_sense_data(struct intc_desc *desc,
549 struct intc_desc_int *d, 653 struct intc_desc_int *d,
550 intc_enum enum_id) 654 intc_enum enum_id)
551{ 655{
552 struct intc_sense_reg *sr = desc->sense_regs; 656 struct intc_sense_reg *sr = desc->hw.sense_regs;
553 unsigned int i, j, fn, bit; 657 unsigned int i, j, fn, bit;
554 658
555 for (i = 0; sr && enum_id && i < desc->nr_sense_regs; i++) { 659 for (i = 0; sr && enum_id && i < desc->hw.nr_sense_regs; i++) {
556 sr = desc->sense_regs + i; 660 sr = desc->hw.sense_regs + i;
557 661
558 for (j = 0; j < ARRAY_SIZE(sr->enum_ids); j++) { 662 for (j = 0; j < ARRAY_SIZE(sr->enum_ids); j++) {
559 if (sr->enum_ids[j] != enum_id) 663 if (sr->enum_ids[j] != enum_id)
@@ -656,7 +760,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
656 /* irq should be disabled by default */ 760 /* irq should be disabled by default */
657 d->chip.mask(irq); 761 d->chip.mask(irq);
658 762
659 if (desc->ack_regs) 763 if (desc->hw.ack_regs)
660 ack_handle[irq] = intc_ack_data(desc, d, enum_id); 764 ack_handle[irq] = intc_ack_data(desc, d, enum_id);
661} 765}
662 766
@@ -684,6 +788,7 @@ static void intc_redirect_irq(unsigned int irq, struct irq_desc *desc)
684void __init register_intc_controller(struct intc_desc *desc) 788void __init register_intc_controller(struct intc_desc *desc)
685{ 789{
686 unsigned int i, k, smp; 790 unsigned int i, k, smp;
791 struct intc_hw_desc *hw = &desc->hw;
687 struct intc_desc_int *d; 792 struct intc_desc_int *d;
688 793
689 d = kzalloc(sizeof(*d), GFP_NOWAIT); 794 d = kzalloc(sizeof(*d), GFP_NOWAIT);
@@ -691,10 +796,10 @@ void __init register_intc_controller(struct intc_desc *desc)
691 INIT_LIST_HEAD(&d->list); 796 INIT_LIST_HEAD(&d->list);
692 list_add(&d->list, &intc_list); 797 list_add(&d->list, &intc_list);
693 798
694 d->nr_reg = desc->mask_regs ? desc->nr_mask_regs * 2 : 0; 799 d->nr_reg = hw->mask_regs ? hw->nr_mask_regs * 2 : 0;
695 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0; 800 d->nr_reg += hw->prio_regs ? hw->nr_prio_regs * 2 : 0;
696 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0; 801 d->nr_reg += hw->sense_regs ? hw->nr_sense_regs : 0;
697 d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0; 802 d->nr_reg += hw->ack_regs ? hw->nr_ack_regs : 0;
698 803
699 d->reg = kzalloc(d->nr_reg * sizeof(*d->reg), GFP_NOWAIT); 804 d->reg = kzalloc(d->nr_reg * sizeof(*d->reg), GFP_NOWAIT);
700#ifdef CONFIG_SMP 805#ifdef CONFIG_SMP
@@ -702,30 +807,31 @@ void __init register_intc_controller(struct intc_desc *desc)
702#endif 807#endif
703 k = 0; 808 k = 0;
704 809
705 if (desc->mask_regs) { 810 if (hw->mask_regs) {
706 for (i = 0; i < desc->nr_mask_regs; i++) { 811 for (i = 0; i < hw->nr_mask_regs; i++) {
707 smp = IS_SMP(desc->mask_regs[i]); 812 smp = IS_SMP(hw->mask_regs[i]);
708 k += save_reg(d, k, desc->mask_regs[i].set_reg, smp); 813 k += save_reg(d, k, hw->mask_regs[i].set_reg, smp);
709 k += save_reg(d, k, desc->mask_regs[i].clr_reg, smp); 814 k += save_reg(d, k, hw->mask_regs[i].clr_reg, smp);
710 } 815 }
711 } 816 }
712 817
713 if (desc->prio_regs) { 818 if (hw->prio_regs) {
714 d->prio = kzalloc(desc->nr_vectors * sizeof(*d->prio), GFP_NOWAIT); 819 d->prio = kzalloc(hw->nr_vectors * sizeof(*d->prio),
820 GFP_NOWAIT);
715 821
716 for (i = 0; i < desc->nr_prio_regs; i++) { 822 for (i = 0; i < hw->nr_prio_regs; i++) {
717 smp = IS_SMP(desc->prio_regs[i]); 823 smp = IS_SMP(hw->prio_regs[i]);
718 k += save_reg(d, k, desc->prio_regs[i].set_reg, smp); 824 k += save_reg(d, k, hw->prio_regs[i].set_reg, smp);
719 k += save_reg(d, k, desc->prio_regs[i].clr_reg, smp); 825 k += save_reg(d, k, hw->prio_regs[i].clr_reg, smp);
720 } 826 }
721 } 827 }
722 828
723 if (desc->sense_regs) { 829 if (hw->sense_regs) {
724 d->sense = kzalloc(desc->nr_vectors * sizeof(*d->sense), GFP_NOWAIT); 830 d->sense = kzalloc(hw->nr_vectors * sizeof(*d->sense),
831 GFP_NOWAIT);
725 832
726 for (i = 0; i < desc->nr_sense_regs; i++) { 833 for (i = 0; i < hw->nr_sense_regs; i++)
727 k += save_reg(d, k, desc->sense_regs[i].reg, 0); 834 k += save_reg(d, k, hw->sense_regs[i].reg, 0);
728 }
729 } 835 }
730 836
731 d->chip.name = desc->name; 837 d->chip.name = desc->name;
@@ -738,18 +844,26 @@ void __init register_intc_controller(struct intc_desc *desc)
738 d->chip.set_type = intc_set_sense; 844 d->chip.set_type = intc_set_sense;
739 d->chip.set_wake = intc_set_wake; 845 d->chip.set_wake = intc_set_wake;
740 846
741 if (desc->ack_regs) { 847 if (hw->ack_regs) {
742 for (i = 0; i < desc->nr_ack_regs; i++) 848 for (i = 0; i < hw->nr_ack_regs; i++)
743 k += save_reg(d, k, desc->ack_regs[i].set_reg, 0); 849 k += save_reg(d, k, hw->ack_regs[i].set_reg, 0);
744 850
745 d->chip.mask_ack = intc_mask_ack; 851 d->chip.mask_ack = intc_mask_ack;
746 } 852 }
747 853
854 /* disable bits matching force_disable before registering irqs */
855 if (desc->force_disable)
856 intc_enable_disable_enum(desc, d, desc->force_disable, 0);
857
858 /* disable bits matching force_enable before registering irqs */
859 if (desc->force_enable)
860 intc_enable_disable_enum(desc, d, desc->force_enable, 0);
861
748 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */ 862 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
749 863
750 /* register the vectors one by one */ 864 /* register the vectors one by one */
751 for (i = 0; i < desc->nr_vectors; i++) { 865 for (i = 0; i < hw->nr_vectors; i++) {
752 struct intc_vect *vect = desc->vectors + i; 866 struct intc_vect *vect = hw->vectors + i;
753 unsigned int irq = evt2irq(vect->vect); 867 unsigned int irq = evt2irq(vect->vect);
754 struct irq_desc *irq_desc; 868 struct irq_desc *irq_desc;
755 869
@@ -764,8 +878,8 @@ void __init register_intc_controller(struct intc_desc *desc)
764 878
765 intc_register_irq(desc, d, vect->enum_id, irq); 879 intc_register_irq(desc, d, vect->enum_id, irq);
766 880
767 for (k = i + 1; k < desc->nr_vectors; k++) { 881 for (k = i + 1; k < hw->nr_vectors; k++) {
768 struct intc_vect *vect2 = desc->vectors + k; 882 struct intc_vect *vect2 = hw->vectors + k;
769 unsigned int irq2 = evt2irq(vect2->vect); 883 unsigned int irq2 = evt2irq(vect2->vect);
770 884
771 if (vect->enum_id != vect2->enum_id) 885 if (vect->enum_id != vect2->enum_id)
@@ -785,11 +899,15 @@ void __init register_intc_controller(struct intc_desc *desc)
785 vect2->enum_id = 0; 899 vect2->enum_id = 0;
786 900
787 /* redirect this interrupts to the first one */ 901 /* redirect this interrupts to the first one */
788 set_irq_chip_and_handler_name(irq2, &d->chip, 902 set_irq_chip(irq2, &dummy_irq_chip);
789 intc_redirect_irq, "redirect"); 903 set_irq_chained_handler(irq2, intc_redirect_irq);
790 set_irq_data(irq2, (void *)irq); 904 set_irq_data(irq2, (void *)irq);
791 } 905 }
792 } 906 }
907
908 /* enable bits matching force_enable after registering irqs */
909 if (desc->force_enable)
910 intc_enable_disable_enum(desc, d, desc->force_enable, 1);
793} 911}
794 912
795static int intc_suspend(struct sys_device *dev, pm_message_t state) 913static int intc_suspend(struct sys_device *dev, pm_message_t state)
@@ -872,7 +990,7 @@ device_initcall(register_intc_sysdevs);
872/* 990/*
873 * Dynamic IRQ allocation and deallocation 991 * Dynamic IRQ allocation and deallocation
874 */ 992 */
875static unsigned int create_irq_on_node(unsigned int irq_want, int node) 993unsigned int create_irq_nr(unsigned int irq_want, int node)
876{ 994{
877 unsigned int irq = 0, new; 995 unsigned int irq = 0, new;
878 unsigned long flags; 996 unsigned long flags;
@@ -881,24 +999,28 @@ static unsigned int create_irq_on_node(unsigned int irq_want, int node)
881 spin_lock_irqsave(&vector_lock, flags); 999 spin_lock_irqsave(&vector_lock, flags);
882 1000
883 /* 1001 /*
884 * First try the wanted IRQ, then scan. 1002 * First try the wanted IRQ
885 */ 1003 */
886 if (test_and_set_bit(irq_want, intc_irq_map)) { 1004 if (test_and_set_bit(irq_want, intc_irq_map) == 0) {
1005 new = irq_want;
1006 } else {
1007 /* .. then fall back to scanning. */
887 new = find_first_zero_bit(intc_irq_map, nr_irqs); 1008 new = find_first_zero_bit(intc_irq_map, nr_irqs);
888 if (unlikely(new == nr_irqs)) 1009 if (unlikely(new == nr_irqs))
889 goto out_unlock; 1010 goto out_unlock;
890 1011
891 desc = irq_to_desc_alloc_node(new, node);
892 if (unlikely(!desc)) {
893 pr_info("can't get irq_desc for %d\n", new);
894 goto out_unlock;
895 }
896
897 desc = move_irq_desc(desc, node);
898 __set_bit(new, intc_irq_map); 1012 __set_bit(new, intc_irq_map);
899 irq = new;
900 } 1013 }
901 1014
1015 desc = irq_to_desc_alloc_node(new, node);
1016 if (unlikely(!desc)) {
1017 pr_info("can't get irq_desc for %d\n", new);
1018 goto out_unlock;
1019 }
1020
1021 desc = move_irq_desc(desc, node);
1022 irq = new;
1023
902out_unlock: 1024out_unlock:
903 spin_unlock_irqrestore(&vector_lock, flags); 1025 spin_unlock_irqrestore(&vector_lock, flags);
904 1026
@@ -913,7 +1035,7 @@ int create_irq(void)
913 int nid = cpu_to_node(smp_processor_id()); 1035 int nid = cpu_to_node(smp_processor_id());
914 int irq; 1036 int irq;
915 1037
916 irq = create_irq_on_node(NR_IRQS_LEGACY, nid); 1038 irq = create_irq_nr(NR_IRQS_LEGACY, nid);
917 if (irq == 0) 1039 if (irq == 0)
918 irq = -1; 1040 irq = -1;
919 1041
diff --git a/drivers/sh/pfc.c b/drivers/sh/pfc.c
index 082604edc4c2..cf0303acab8e 100644
--- a/drivers/sh/pfc.c
+++ b/drivers/sh/pfc.c
@@ -337,12 +337,39 @@ static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
337 if (!enum_id) 337 if (!enum_id)
338 break; 338 break;
339 339
340 /* first check if this is a function enum */
340 in_range = enum_in_range(enum_id, &gpioc->function); 341 in_range = enum_in_range(enum_id, &gpioc->function);
341 if (!in_range && range) { 342 if (!in_range) {
342 in_range = enum_in_range(enum_id, range); 343 /* not a function enum */
343 344 if (range) {
344 if (in_range && enum_id == range->force) 345 /*
345 continue; 346 * other range exists, so this pin is
347 * a regular GPIO pin that now is being
348 * bound to a specific direction.
349 *
350 * for this case we only allow function enums
351 * and the enums that match the other range.
352 */
353 in_range = enum_in_range(enum_id, range);
354
355 /*
356 * special case pass through for fixed
357 * input-only or output-only pins without
358 * function enum register association.
359 */
360 if (in_range && enum_id == range->force)
361 continue;
362 } else {
363 /*
364 * no other range exists, so this pin
365 * must then be of the function type.
366 *
367 * allow function type pins to select
368 * any combination of function/in/out
369 * in their MARK lists.
370 */
371 in_range = 1;
372 }
346 } 373 }
347 374
348 if (!in_range) 375 if (!in_range)
diff --git a/drivers/staging/go7007/s2250-board.c b/drivers/staging/go7007/s2250-board.c
index 8cf7f2750b3f..c324f6ea002b 100644
--- a/drivers/staging/go7007/s2250-board.c
+++ b/drivers/staging/go7007/s2250-board.c
@@ -159,7 +159,7 @@ static int write_reg(struct i2c_client *client, u8 reg, u8 value)
159 struct go7007 *go = i2c_get_adapdata(client->adapter); 159 struct go7007 *go = i2c_get_adapdata(client->adapter);
160 struct go7007_usb *usb; 160 struct go7007_usb *usb;
161 int rc; 161 int rc;
162 int dev_addr = client->addr; 162 int dev_addr = client->addr << 1; /* firmware wants 8-bit address */
163 u8 *buf; 163 u8 *buf;
164 164
165 if (go == NULL) 165 if (go == NULL)
diff --git a/drivers/video/pvr2fb.c b/drivers/video/pvr2fb.c
index 53f8f1100e81..f9975100d56d 100644
--- a/drivers/video/pvr2fb.c
+++ b/drivers/video/pvr2fb.c
@@ -831,7 +831,7 @@ static int __devinit pvr2fb_common_init(void)
831 printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node); 831 printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node);
832 832
833 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len, 833 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len,
834 fb_info->fix.id, pgprot_val(PAGE_SHARED)); 834 fb_info->fix.id, PAGE_SHARED);
835 835
836 printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n", 836 printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n",
837 fb_info->node, pvr2fb_map); 837 fb_info->node, pvr2fb_map);
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c
index a69830d26f7f..8d7653e56df5 100644
--- a/drivers/video/sh_mobile_lcdcfb.c
+++ b/drivers/video/sh_mobile_lcdcfb.c
@@ -19,6 +19,7 @@
19#include <linux/dma-mapping.h> 19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/vmalloc.h> 21#include <linux/vmalloc.h>
22#include <linux/ioctl.h>
22#include <video/sh_mobile_lcdc.h> 23#include <video/sh_mobile_lcdc.h>
23#include <asm/atomic.h> 24#include <asm/atomic.h>
24 25
@@ -106,6 +107,7 @@ static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
106#define LDRCNTR_SRC 0x00010000 107#define LDRCNTR_SRC 0x00010000
107#define LDRCNTR_MRS 0x00000002 108#define LDRCNTR_MRS 0x00000002
108#define LDRCNTR_MRC 0x00000001 109#define LDRCNTR_MRC 0x00000001
110#define LDSR_MRS 0x00000100
109 111
110struct sh_mobile_lcdc_priv; 112struct sh_mobile_lcdc_priv;
111struct sh_mobile_lcdc_chan { 113struct sh_mobile_lcdc_chan {
@@ -122,8 +124,8 @@ struct sh_mobile_lcdc_chan {
122 struct scatterlist *sglist; 124 struct scatterlist *sglist;
123 unsigned long frame_end; 125 unsigned long frame_end;
124 unsigned long pan_offset; 126 unsigned long pan_offset;
125 unsigned long new_pan_offset;
126 wait_queue_head_t frame_end_wait; 127 wait_queue_head_t frame_end_wait;
128 struct completion vsync_completion;
127}; 129};
128 130
129struct sh_mobile_lcdc_priv { 131struct sh_mobile_lcdc_priv {
@@ -366,19 +368,8 @@ static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
366 } 368 }
367 369
368 /* VSYNC End */ 370 /* VSYNC End */
369 if (ldintr & LDINTR_VES) { 371 if (ldintr & LDINTR_VES)
370 unsigned long ldrcntr = lcdc_read(priv, _LDRCNTR); 372 complete(&ch->vsync_completion);
371 /* Set the source address for the next refresh */
372 lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle +
373 ch->new_pan_offset);
374 if (lcdc_chan_is_sublcd(ch))
375 lcdc_write(ch->lcdc, _LDRCNTR,
376 ldrcntr ^ LDRCNTR_SRS);
377 else
378 lcdc_write(ch->lcdc, _LDRCNTR,
379 ldrcntr ^ LDRCNTR_MRS);
380 ch->pan_offset = ch->new_pan_offset;
381 }
382 } 373 }
383 374
384 return IRQ_HANDLED; 375 return IRQ_HANDLED;
@@ -767,25 +758,69 @@ static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
767 struct fb_info *info) 758 struct fb_info *info)
768{ 759{
769 struct sh_mobile_lcdc_chan *ch = info->par; 760 struct sh_mobile_lcdc_chan *ch = info->par;
761 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
762 unsigned long ldrcntr;
763 unsigned long new_pan_offset;
764
765 new_pan_offset = (var->yoffset * info->fix.line_length) +
766 (var->xoffset * (info->var.bits_per_pixel / 8));
770 767
771 if (info->var.xoffset == var->xoffset && 768 if (new_pan_offset == ch->pan_offset)
772 info->var.yoffset == var->yoffset)
773 return 0; /* No change, do nothing */ 769 return 0; /* No change, do nothing */
774 770
775 ch->new_pan_offset = (var->yoffset * info->fix.line_length) + 771 ldrcntr = lcdc_read(priv, _LDRCNTR);
776 (var->xoffset * (info->var.bits_per_pixel / 8));
777 772
778 if (ch->new_pan_offset != ch->pan_offset) { 773 /* Set the source address for the next refresh */
779 unsigned long ldintr; 774 lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle + new_pan_offset);
780 ldintr = lcdc_read(ch->lcdc, _LDINTR); 775 if (lcdc_chan_is_sublcd(ch))
781 ldintr |= LDINTR_VEE; 776 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
782 lcdc_write(ch->lcdc, _LDINTR, ldintr); 777 else
783 sh_mobile_lcdc_deferred_io_touch(info); 778 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
784 } 779
780 ch->pan_offset = new_pan_offset;
781
782 sh_mobile_lcdc_deferred_io_touch(info);
783
784 return 0;
785}
786
787static int sh_mobile_wait_for_vsync(struct fb_info *info)
788{
789 struct sh_mobile_lcdc_chan *ch = info->par;
790 unsigned long ldintr;
791 int ret;
792
793 /* Enable VSync End interrupt */
794 ldintr = lcdc_read(ch->lcdc, _LDINTR);
795 ldintr |= LDINTR_VEE;
796 lcdc_write(ch->lcdc, _LDINTR, ldintr);
797
798 ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
799 msecs_to_jiffies(100));
800 if (!ret)
801 return -ETIMEDOUT;
785 802
786 return 0; 803 return 0;
787} 804}
788 805
806static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
807 unsigned long arg)
808{
809 int retval;
810
811 switch (cmd) {
812 case FBIO_WAITFORVSYNC:
813 retval = sh_mobile_wait_for_vsync(info);
814 break;
815
816 default:
817 retval = -ENOIOCTLCMD;
818 break;
819 }
820 return retval;
821}
822
823
789static struct fb_ops sh_mobile_lcdc_ops = { 824static struct fb_ops sh_mobile_lcdc_ops = {
790 .owner = THIS_MODULE, 825 .owner = THIS_MODULE,
791 .fb_setcolreg = sh_mobile_lcdc_setcolreg, 826 .fb_setcolreg = sh_mobile_lcdc_setcolreg,
@@ -795,6 +830,7 @@ static struct fb_ops sh_mobile_lcdc_ops = {
795 .fb_copyarea = sh_mobile_lcdc_copyarea, 830 .fb_copyarea = sh_mobile_lcdc_copyarea,
796 .fb_imageblit = sh_mobile_lcdc_imageblit, 831 .fb_imageblit = sh_mobile_lcdc_imageblit,
797 .fb_pan_display = sh_mobile_fb_pan_display, 832 .fb_pan_display = sh_mobile_fb_pan_display,
833 .fb_ioctl = sh_mobile_ioctl,
798}; 834};
799 835
800static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp) 836static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
@@ -962,8 +998,8 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
962 goto err1; 998 goto err1;
963 } 999 }
964 init_waitqueue_head(&priv->ch[i].frame_end_wait); 1000 init_waitqueue_head(&priv->ch[i].frame_end_wait);
1001 init_completion(&priv->ch[i].vsync_completion);
965 priv->ch[j].pan_offset = 0; 1002 priv->ch[j].pan_offset = 0;
966 priv->ch[j].new_pan_offset = 0;
967 1003
968 switch (pdata->ch[i].chan) { 1004 switch (pdata->ch[i].chan) {
969 case LCDC_CHAN_MAINLCD: 1005 case LCDC_CHAN_MAINLCD:
diff --git a/fs/dlm/ast.c b/fs/dlm/ast.c
index dc2ad6008b2d..4314f0d48d85 100644
--- a/fs/dlm/ast.c
+++ b/fs/dlm/ast.c
@@ -2,7 +2,7 @@
2******************************************************************************* 2*******************************************************************************
3** 3**
4** Copyright (C) Sistina Software, Inc. 1997-2003 All rights reserved. 4** Copyright (C) Sistina Software, Inc. 1997-2003 All rights reserved.
5** Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved. 5** Copyright (C) 2004-2010 Red Hat, Inc. All rights reserved.
6** 6**
7** This copyrighted material is made available to anyone wishing to use, 7** This copyrighted material is made available to anyone wishing to use,
8** modify, copy, or redistribute it subject to the terms and conditions 8** modify, copy, or redistribute it subject to the terms and conditions
@@ -33,10 +33,10 @@ void dlm_del_ast(struct dlm_lkb *lkb)
33 spin_unlock(&ast_queue_lock); 33 spin_unlock(&ast_queue_lock);
34} 34}
35 35
36void dlm_add_ast(struct dlm_lkb *lkb, int type, int bastmode) 36void dlm_add_ast(struct dlm_lkb *lkb, int type, int mode)
37{ 37{
38 if (lkb->lkb_flags & DLM_IFL_USER) { 38 if (lkb->lkb_flags & DLM_IFL_USER) {
39 dlm_user_add_ast(lkb, type, bastmode); 39 dlm_user_add_ast(lkb, type, mode);
40 return; 40 return;
41 } 41 }
42 42
@@ -44,10 +44,21 @@ void dlm_add_ast(struct dlm_lkb *lkb, int type, int bastmode)
44 if (!(lkb->lkb_ast_type & (AST_COMP | AST_BAST))) { 44 if (!(lkb->lkb_ast_type & (AST_COMP | AST_BAST))) {
45 kref_get(&lkb->lkb_ref); 45 kref_get(&lkb->lkb_ref);
46 list_add_tail(&lkb->lkb_astqueue, &ast_queue); 46 list_add_tail(&lkb->lkb_astqueue, &ast_queue);
47 lkb->lkb_ast_first = type;
47 } 48 }
49
50 /* sanity check, this should not happen */
51
52 if ((type == AST_COMP) && (lkb->lkb_ast_type & AST_COMP))
53 log_print("repeat cast %d castmode %d lock %x %s",
54 mode, lkb->lkb_castmode,
55 lkb->lkb_id, lkb->lkb_resource->res_name);
56
48 lkb->lkb_ast_type |= type; 57 lkb->lkb_ast_type |= type;
49 if (bastmode) 58 if (type == AST_BAST)
50 lkb->lkb_bastmode = bastmode; 59 lkb->lkb_bastmode = mode;
60 else
61 lkb->lkb_castmode = mode;
51 spin_unlock(&ast_queue_lock); 62 spin_unlock(&ast_queue_lock);
52 63
53 set_bit(WAKE_ASTS, &astd_wakeflags); 64 set_bit(WAKE_ASTS, &astd_wakeflags);
@@ -59,9 +70,9 @@ static void process_asts(void)
59 struct dlm_ls *ls = NULL; 70 struct dlm_ls *ls = NULL;
60 struct dlm_rsb *r = NULL; 71 struct dlm_rsb *r = NULL;
61 struct dlm_lkb *lkb; 72 struct dlm_lkb *lkb;
62 void (*cast) (void *astparam); 73 void (*castfn) (void *astparam);
63 void (*bast) (void *astparam, int mode); 74 void (*bastfn) (void *astparam, int mode);
64 int type = 0, bastmode; 75 int type, first, bastmode, castmode, do_bast, do_cast, last_castmode;
65 76
66repeat: 77repeat:
67 spin_lock(&ast_queue_lock); 78 spin_lock(&ast_queue_lock);
@@ -75,17 +86,48 @@ repeat:
75 list_del(&lkb->lkb_astqueue); 86 list_del(&lkb->lkb_astqueue);
76 type = lkb->lkb_ast_type; 87 type = lkb->lkb_ast_type;
77 lkb->lkb_ast_type = 0; 88 lkb->lkb_ast_type = 0;
89 first = lkb->lkb_ast_first;
90 lkb->lkb_ast_first = 0;
78 bastmode = lkb->lkb_bastmode; 91 bastmode = lkb->lkb_bastmode;
79 92 castmode = lkb->lkb_castmode;
93 castfn = lkb->lkb_astfn;
94 bastfn = lkb->lkb_bastfn;
80 spin_unlock(&ast_queue_lock); 95 spin_unlock(&ast_queue_lock);
81 cast = lkb->lkb_astfn;
82 bast = lkb->lkb_bastfn;
83
84 if ((type & AST_COMP) && cast)
85 cast(lkb->lkb_astparam);
86 96
87 if ((type & AST_BAST) && bast) 97 do_cast = (type & AST_COMP) && castfn;
88 bast(lkb->lkb_astparam, bastmode); 98 do_bast = (type & AST_BAST) && bastfn;
99
100 /* Skip a bast if its blocking mode is compatible with the
101 granted mode of the preceding cast. */
102
103 if (do_bast) {
104 if (first == AST_COMP)
105 last_castmode = castmode;
106 else
107 last_castmode = lkb->lkb_castmode_done;
108 if (dlm_modes_compat(bastmode, last_castmode))
109 do_bast = 0;
110 }
111
112 if (first == AST_COMP) {
113 if (do_cast)
114 castfn(lkb->lkb_astparam);
115 if (do_bast)
116 bastfn(lkb->lkb_astparam, bastmode);
117 } else if (first == AST_BAST) {
118 if (do_bast)
119 bastfn(lkb->lkb_astparam, bastmode);
120 if (do_cast)
121 castfn(lkb->lkb_astparam);
122 } else {
123 log_error(ls, "bad ast_first %d ast_type %d",
124 first, type);
125 }
126
127 if (do_cast)
128 lkb->lkb_castmode_done = castmode;
129 if (do_bast)
130 lkb->lkb_bastmode_done = bastmode;
89 131
90 /* this removes the reference added by dlm_add_ast 132 /* this removes the reference added by dlm_add_ast
91 and may result in the lkb being freed */ 133 and may result in the lkb being freed */
diff --git a/fs/dlm/ast.h b/fs/dlm/ast.h
index 1b5fc5f428fd..bcb1aaba519d 100644
--- a/fs/dlm/ast.h
+++ b/fs/dlm/ast.h
@@ -1,7 +1,7 @@
1/****************************************************************************** 1/******************************************************************************
2******************************************************************************* 2*******************************************************************************
3** 3**
4** Copyright (C) 2005-2008 Red Hat, Inc. All rights reserved. 4** Copyright (C) 2005-2010 Red Hat, Inc. All rights reserved.
5** 5**
6** This copyrighted material is made available to anyone wishing to use, 6** This copyrighted material is made available to anyone wishing to use,
7** modify, copy, or redistribute it subject to the terms and conditions 7** modify, copy, or redistribute it subject to the terms and conditions
@@ -13,7 +13,7 @@
13#ifndef __ASTD_DOT_H__ 13#ifndef __ASTD_DOT_H__
14#define __ASTD_DOT_H__ 14#define __ASTD_DOT_H__
15 15
16void dlm_add_ast(struct dlm_lkb *lkb, int type, int bastmode); 16void dlm_add_ast(struct dlm_lkb *lkb, int type, int mode);
17void dlm_del_ast(struct dlm_lkb *lkb); 17void dlm_del_ast(struct dlm_lkb *lkb);
18 18
19void dlm_astd_wake(void); 19void dlm_astd_wake(void);
diff --git a/fs/dlm/debug_fs.c b/fs/dlm/debug_fs.c
index 375a2359b3bf..29d6139c35fc 100644
--- a/fs/dlm/debug_fs.c
+++ b/fs/dlm/debug_fs.c
@@ -256,7 +256,7 @@ static int print_format3_lock(struct seq_file *s, struct dlm_lkb *lkb,
256 lkb->lkb_status, 256 lkb->lkb_status,
257 lkb->lkb_grmode, 257 lkb->lkb_grmode,
258 lkb->lkb_rqmode, 258 lkb->lkb_rqmode,
259 lkb->lkb_highbast, 259 lkb->lkb_bastmode,
260 rsb_lookup, 260 rsb_lookup,
261 lkb->lkb_wait_type, 261 lkb->lkb_wait_type,
262 lkb->lkb_lvbseq, 262 lkb->lkb_lvbseq,
diff --git a/fs/dlm/dlm_internal.h b/fs/dlm/dlm_internal.h
index 826d3dc6e0ab..f632b58cd222 100644
--- a/fs/dlm/dlm_internal.h
+++ b/fs/dlm/dlm_internal.h
@@ -2,7 +2,7 @@
2******************************************************************************* 2*******************************************************************************
3** 3**
4** Copyright (C) Sistina Software, Inc. 1997-2003 All rights reserved. 4** Copyright (C) Sistina Software, Inc. 1997-2003 All rights reserved.
5** Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved. 5** Copyright (C) 2004-2010 Red Hat, Inc. All rights reserved.
6** 6**
7** This copyrighted material is made available to anyone wishing to use, 7** This copyrighted material is made available to anyone wishing to use,
8** modify, copy, or redistribute it subject to the terms and conditions 8** modify, copy, or redistribute it subject to the terms and conditions
@@ -232,11 +232,17 @@ struct dlm_lkb {
232 int8_t lkb_status; /* granted, waiting, convert */ 232 int8_t lkb_status; /* granted, waiting, convert */
233 int8_t lkb_rqmode; /* requested lock mode */ 233 int8_t lkb_rqmode; /* requested lock mode */
234 int8_t lkb_grmode; /* granted lock mode */ 234 int8_t lkb_grmode; /* granted lock mode */
235 int8_t lkb_bastmode; /* requested mode */
236 int8_t lkb_highbast; /* highest mode bast sent for */ 235 int8_t lkb_highbast; /* highest mode bast sent for */
236
237 int8_t lkb_wait_type; /* type of reply waiting for */ 237 int8_t lkb_wait_type; /* type of reply waiting for */
238 int8_t lkb_wait_count; 238 int8_t lkb_wait_count;
239 int8_t lkb_ast_type; /* type of ast queued for */ 239 int8_t lkb_ast_type; /* type of ast queued for */
240 int8_t lkb_ast_first; /* type of first ast queued */
241
242 int8_t lkb_bastmode; /* req mode of queued bast */
243 int8_t lkb_castmode; /* gr mode of queued cast */
244 int8_t lkb_bastmode_done; /* last delivered bastmode */
245 int8_t lkb_castmode_done; /* last delivered castmode */
240 246
241 struct list_head lkb_idtbl_list; /* lockspace lkbtbl */ 247 struct list_head lkb_idtbl_list; /* lockspace lkbtbl */
242 struct list_head lkb_statequeue; /* rsb g/c/w list */ 248 struct list_head lkb_statequeue; /* rsb g/c/w list */
diff --git a/fs/dlm/lock.c b/fs/dlm/lock.c
index 9c0c1db1e105..46ffd3eeaaf7 100644
--- a/fs/dlm/lock.c
+++ b/fs/dlm/lock.c
@@ -1,7 +1,7 @@
1/****************************************************************************** 1/******************************************************************************
2******************************************************************************* 2*******************************************************************************
3** 3**
4** Copyright (C) 2005-2008 Red Hat, Inc. All rights reserved. 4** Copyright (C) 2005-2010 Red Hat, Inc. All rights reserved.
5** 5**
6** This copyrighted material is made available to anyone wishing to use, 6** This copyrighted material is made available to anyone wishing to use,
7** modify, copy, or redistribute it subject to the terms and conditions 7** modify, copy, or redistribute it subject to the terms and conditions
@@ -307,7 +307,7 @@ static void queue_cast(struct dlm_rsb *r, struct dlm_lkb *lkb, int rv)
307 lkb->lkb_lksb->sb_status = rv; 307 lkb->lkb_lksb->sb_status = rv;
308 lkb->lkb_lksb->sb_flags = lkb->lkb_sbflags; 308 lkb->lkb_lksb->sb_flags = lkb->lkb_sbflags;
309 309
310 dlm_add_ast(lkb, AST_COMP, 0); 310 dlm_add_ast(lkb, AST_COMP, lkb->lkb_grmode);
311} 311}
312 312
313static inline void queue_cast_overlap(struct dlm_rsb *r, struct dlm_lkb *lkb) 313static inline void queue_cast_overlap(struct dlm_rsb *r, struct dlm_lkb *lkb)
@@ -320,10 +320,12 @@ static void queue_bast(struct dlm_rsb *r, struct dlm_lkb *lkb, int rqmode)
320{ 320{
321 lkb->lkb_time_bast = ktime_get(); 321 lkb->lkb_time_bast = ktime_get();
322 322
323 if (is_master_copy(lkb)) 323 if (is_master_copy(lkb)) {
324 lkb->lkb_bastmode = rqmode; /* printed by debugfs */
324 send_bast(r, lkb, rqmode); 325 send_bast(r, lkb, rqmode);
325 else 326 } else {
326 dlm_add_ast(lkb, AST_BAST, rqmode); 327 dlm_add_ast(lkb, AST_BAST, rqmode);
328 }
327} 329}
328 330
329/* 331/*
@@ -2280,20 +2282,30 @@ static int do_request(struct dlm_rsb *r, struct dlm_lkb *lkb)
2280 if (can_be_queued(lkb)) { 2282 if (can_be_queued(lkb)) {
2281 error = -EINPROGRESS; 2283 error = -EINPROGRESS;
2282 add_lkb(r, lkb, DLM_LKSTS_WAITING); 2284 add_lkb(r, lkb, DLM_LKSTS_WAITING);
2283 send_blocking_asts(r, lkb);
2284 add_timeout(lkb); 2285 add_timeout(lkb);
2285 goto out; 2286 goto out;
2286 } 2287 }
2287 2288
2288 error = -EAGAIN; 2289 error = -EAGAIN;
2289 if (force_blocking_asts(lkb))
2290 send_blocking_asts_all(r, lkb);
2291 queue_cast(r, lkb, -EAGAIN); 2290 queue_cast(r, lkb, -EAGAIN);
2292
2293 out: 2291 out:
2294 return error; 2292 return error;
2295} 2293}
2296 2294
2295static void do_request_effects(struct dlm_rsb *r, struct dlm_lkb *lkb,
2296 int error)
2297{
2298 switch (error) {
2299 case -EAGAIN:
2300 if (force_blocking_asts(lkb))
2301 send_blocking_asts_all(r, lkb);
2302 break;
2303 case -EINPROGRESS:
2304 send_blocking_asts(r, lkb);
2305 break;
2306 }
2307}
2308
2297static int do_convert(struct dlm_rsb *r, struct dlm_lkb *lkb) 2309static int do_convert(struct dlm_rsb *r, struct dlm_lkb *lkb)
2298{ 2310{
2299 int error = 0; 2311 int error = 0;
@@ -2304,7 +2316,6 @@ static int do_convert(struct dlm_rsb *r, struct dlm_lkb *lkb)
2304 if (can_be_granted(r, lkb, 1, &deadlk)) { 2316 if (can_be_granted(r, lkb, 1, &deadlk)) {
2305 grant_lock(r, lkb); 2317 grant_lock(r, lkb);
2306 queue_cast(r, lkb, 0); 2318 queue_cast(r, lkb, 0);
2307 grant_pending_locks(r);
2308 goto out; 2319 goto out;
2309 } 2320 }
2310 2321
@@ -2334,7 +2345,6 @@ static int do_convert(struct dlm_rsb *r, struct dlm_lkb *lkb)
2334 if (_can_be_granted(r, lkb, 1)) { 2345 if (_can_be_granted(r, lkb, 1)) {
2335 grant_lock(r, lkb); 2346 grant_lock(r, lkb);
2336 queue_cast(r, lkb, 0); 2347 queue_cast(r, lkb, 0);
2337 grant_pending_locks(r);
2338 goto out; 2348 goto out;
2339 } 2349 }
2340 /* else fall through and move to convert queue */ 2350 /* else fall through and move to convert queue */
@@ -2344,28 +2354,47 @@ static int do_convert(struct dlm_rsb *r, struct dlm_lkb *lkb)
2344 error = -EINPROGRESS; 2354 error = -EINPROGRESS;
2345 del_lkb(r, lkb); 2355 del_lkb(r, lkb);
2346 add_lkb(r, lkb, DLM_LKSTS_CONVERT); 2356 add_lkb(r, lkb, DLM_LKSTS_CONVERT);
2347 send_blocking_asts(r, lkb);
2348 add_timeout(lkb); 2357 add_timeout(lkb);
2349 goto out; 2358 goto out;
2350 } 2359 }
2351 2360
2352 error = -EAGAIN; 2361 error = -EAGAIN;
2353 if (force_blocking_asts(lkb))
2354 send_blocking_asts_all(r, lkb);
2355 queue_cast(r, lkb, -EAGAIN); 2362 queue_cast(r, lkb, -EAGAIN);
2356
2357 out: 2363 out:
2358 return error; 2364 return error;
2359} 2365}
2360 2366
2367static void do_convert_effects(struct dlm_rsb *r, struct dlm_lkb *lkb,
2368 int error)
2369{
2370 switch (error) {
2371 case 0:
2372 grant_pending_locks(r);
2373 /* grant_pending_locks also sends basts */
2374 break;
2375 case -EAGAIN:
2376 if (force_blocking_asts(lkb))
2377 send_blocking_asts_all(r, lkb);
2378 break;
2379 case -EINPROGRESS:
2380 send_blocking_asts(r, lkb);
2381 break;
2382 }
2383}
2384
2361static int do_unlock(struct dlm_rsb *r, struct dlm_lkb *lkb) 2385static int do_unlock(struct dlm_rsb *r, struct dlm_lkb *lkb)
2362{ 2386{
2363 remove_lock(r, lkb); 2387 remove_lock(r, lkb);
2364 queue_cast(r, lkb, -DLM_EUNLOCK); 2388 queue_cast(r, lkb, -DLM_EUNLOCK);
2365 grant_pending_locks(r);
2366 return -DLM_EUNLOCK; 2389 return -DLM_EUNLOCK;
2367} 2390}
2368 2391
2392static void do_unlock_effects(struct dlm_rsb *r, struct dlm_lkb *lkb,
2393 int error)
2394{
2395 grant_pending_locks(r);
2396}
2397
2369/* returns: 0 did nothing, -DLM_ECANCEL canceled lock */ 2398/* returns: 0 did nothing, -DLM_ECANCEL canceled lock */
2370 2399
2371static int do_cancel(struct dlm_rsb *r, struct dlm_lkb *lkb) 2400static int do_cancel(struct dlm_rsb *r, struct dlm_lkb *lkb)
@@ -2375,12 +2404,18 @@ static int do_cancel(struct dlm_rsb *r, struct dlm_lkb *lkb)
2375 error = revert_lock(r, lkb); 2404 error = revert_lock(r, lkb);
2376 if (error) { 2405 if (error) {
2377 queue_cast(r, lkb, -DLM_ECANCEL); 2406 queue_cast(r, lkb, -DLM_ECANCEL);
2378 grant_pending_locks(r);
2379 return -DLM_ECANCEL; 2407 return -DLM_ECANCEL;
2380 } 2408 }
2381 return 0; 2409 return 0;
2382} 2410}
2383 2411
2412static void do_cancel_effects(struct dlm_rsb *r, struct dlm_lkb *lkb,
2413 int error)
2414{
2415 if (error)
2416 grant_pending_locks(r);
2417}
2418
2384/* 2419/*
2385 * Four stage 3 varieties: 2420 * Four stage 3 varieties:
2386 * _request_lock(), _convert_lock(), _unlock_lock(), _cancel_lock() 2421 * _request_lock(), _convert_lock(), _unlock_lock(), _cancel_lock()
@@ -2402,11 +2437,15 @@ static int _request_lock(struct dlm_rsb *r, struct dlm_lkb *lkb)
2402 goto out; 2437 goto out;
2403 } 2438 }
2404 2439
2405 if (is_remote(r)) 2440 if (is_remote(r)) {
2406 /* receive_request() calls do_request() on remote node */ 2441 /* receive_request() calls do_request() on remote node */
2407 error = send_request(r, lkb); 2442 error = send_request(r, lkb);
2408 else 2443 } else {
2409 error = do_request(r, lkb); 2444 error = do_request(r, lkb);
2445 /* for remote locks the request_reply is sent
2446 between do_request and do_request_effects */
2447 do_request_effects(r, lkb, error);
2448 }
2410 out: 2449 out:
2411 return error; 2450 return error;
2412} 2451}
@@ -2417,11 +2456,15 @@ static int _convert_lock(struct dlm_rsb *r, struct dlm_lkb *lkb)
2417{ 2456{
2418 int error; 2457 int error;
2419 2458
2420 if (is_remote(r)) 2459 if (is_remote(r)) {
2421 /* receive_convert() calls do_convert() on remote node */ 2460 /* receive_convert() calls do_convert() on remote node */
2422 error = send_convert(r, lkb); 2461 error = send_convert(r, lkb);
2423 else 2462 } else {
2424 error = do_convert(r, lkb); 2463 error = do_convert(r, lkb);
2464 /* for remote locks the convert_reply is sent
2465 between do_convert and do_convert_effects */
2466 do_convert_effects(r, lkb, error);
2467 }
2425 2468
2426 return error; 2469 return error;
2427} 2470}
@@ -2432,11 +2475,15 @@ static int _unlock_lock(struct dlm_rsb *r, struct dlm_lkb *lkb)
2432{ 2475{
2433 int error; 2476 int error;
2434 2477
2435 if (is_remote(r)) 2478 if (is_remote(r)) {
2436 /* receive_unlock() calls do_unlock() on remote node */ 2479 /* receive_unlock() calls do_unlock() on remote node */
2437 error = send_unlock(r, lkb); 2480 error = send_unlock(r, lkb);
2438 else 2481 } else {
2439 error = do_unlock(r, lkb); 2482 error = do_unlock(r, lkb);
2483 /* for remote locks the unlock_reply is sent
2484 between do_unlock and do_unlock_effects */
2485 do_unlock_effects(r, lkb, error);
2486 }
2440 2487
2441 return error; 2488 return error;
2442} 2489}
@@ -2447,11 +2494,15 @@ static int _cancel_lock(struct dlm_rsb *r, struct dlm_lkb *lkb)
2447{ 2494{
2448 int error; 2495 int error;
2449 2496
2450 if (is_remote(r)) 2497 if (is_remote(r)) {
2451 /* receive_cancel() calls do_cancel() on remote node */ 2498 /* receive_cancel() calls do_cancel() on remote node */
2452 error = send_cancel(r, lkb); 2499 error = send_cancel(r, lkb);
2453 else 2500 } else {
2454 error = do_cancel(r, lkb); 2501 error = do_cancel(r, lkb);
2502 /* for remote locks the cancel_reply is sent
2503 between do_cancel and do_cancel_effects */
2504 do_cancel_effects(r, lkb, error);
2505 }
2455 2506
2456 return error; 2507 return error;
2457} 2508}
@@ -3191,6 +3242,7 @@ static void receive_request(struct dlm_ls *ls, struct dlm_message *ms)
3191 attach_lkb(r, lkb); 3242 attach_lkb(r, lkb);
3192 error = do_request(r, lkb); 3243 error = do_request(r, lkb);
3193 send_request_reply(r, lkb, error); 3244 send_request_reply(r, lkb, error);
3245 do_request_effects(r, lkb, error);
3194 3246
3195 unlock_rsb(r); 3247 unlock_rsb(r);
3196 put_rsb(r); 3248 put_rsb(r);
@@ -3226,15 +3278,19 @@ static void receive_convert(struct dlm_ls *ls, struct dlm_message *ms)
3226 goto out; 3278 goto out;
3227 3279
3228 receive_flags(lkb, ms); 3280 receive_flags(lkb, ms);
3281
3229 error = receive_convert_args(ls, lkb, ms); 3282 error = receive_convert_args(ls, lkb, ms);
3230 if (error) 3283 if (error) {
3231 goto out_reply; 3284 send_convert_reply(r, lkb, error);
3285 goto out;
3286 }
3287
3232 reply = !down_conversion(lkb); 3288 reply = !down_conversion(lkb);
3233 3289
3234 error = do_convert(r, lkb); 3290 error = do_convert(r, lkb);
3235 out_reply:
3236 if (reply) 3291 if (reply)
3237 send_convert_reply(r, lkb, error); 3292 send_convert_reply(r, lkb, error);
3293 do_convert_effects(r, lkb, error);
3238 out: 3294 out:
3239 unlock_rsb(r); 3295 unlock_rsb(r);
3240 put_rsb(r); 3296 put_rsb(r);
@@ -3266,13 +3322,16 @@ static void receive_unlock(struct dlm_ls *ls, struct dlm_message *ms)
3266 goto out; 3322 goto out;
3267 3323
3268 receive_flags(lkb, ms); 3324 receive_flags(lkb, ms);
3325
3269 error = receive_unlock_args(ls, lkb, ms); 3326 error = receive_unlock_args(ls, lkb, ms);
3270 if (error) 3327 if (error) {
3271 goto out_reply; 3328 send_unlock_reply(r, lkb, error);
3329 goto out;
3330 }
3272 3331
3273 error = do_unlock(r, lkb); 3332 error = do_unlock(r, lkb);
3274 out_reply:
3275 send_unlock_reply(r, lkb, error); 3333 send_unlock_reply(r, lkb, error);
3334 do_unlock_effects(r, lkb, error);
3276 out: 3335 out:
3277 unlock_rsb(r); 3336 unlock_rsb(r);
3278 put_rsb(r); 3337 put_rsb(r);
@@ -3307,6 +3366,7 @@ static void receive_cancel(struct dlm_ls *ls, struct dlm_message *ms)
3307 3366
3308 error = do_cancel(r, lkb); 3367 error = do_cancel(r, lkb);
3309 send_cancel_reply(r, lkb, error); 3368 send_cancel_reply(r, lkb, error);
3369 do_cancel_effects(r, lkb, error);
3310 out: 3370 out:
3311 unlock_rsb(r); 3371 unlock_rsb(r);
3312 put_rsb(r); 3372 put_rsb(r);
diff --git a/fs/dlm/lockspace.c b/fs/dlm/lockspace.c
index c010ecfc0d29..26a8bd40400a 100644
--- a/fs/dlm/lockspace.c
+++ b/fs/dlm/lockspace.c
@@ -191,6 +191,18 @@ static int do_uevent(struct dlm_ls *ls, int in)
191 return error; 191 return error;
192} 192}
193 193
194static int dlm_uevent(struct kset *kset, struct kobject *kobj,
195 struct kobj_uevent_env *env)
196{
197 struct dlm_ls *ls = container_of(kobj, struct dlm_ls, ls_kobj);
198
199 add_uevent_var(env, "LOCKSPACE=%s", ls->ls_name);
200 return 0;
201}
202
203static struct kset_uevent_ops dlm_uevent_ops = {
204 .uevent = dlm_uevent,
205};
194 206
195int __init dlm_lockspace_init(void) 207int __init dlm_lockspace_init(void)
196{ 208{
@@ -199,7 +211,7 @@ int __init dlm_lockspace_init(void)
199 INIT_LIST_HEAD(&lslist); 211 INIT_LIST_HEAD(&lslist);
200 spin_lock_init(&lslist_lock); 212 spin_lock_init(&lslist_lock);
201 213
202 dlm_kset = kset_create_and_add("dlm", NULL, kernel_kobj); 214 dlm_kset = kset_create_and_add("dlm", &dlm_uevent_ops, kernel_kobj);
203 if (!dlm_kset) { 215 if (!dlm_kset) {
204 printk(KERN_WARNING "%s: can not create kset\n", __func__); 216 printk(KERN_WARNING "%s: can not create kset\n", __func__);
205 return -ENOMEM; 217 return -ENOMEM;
diff --git a/fs/dlm/user.c b/fs/dlm/user.c
index e73a4bb572aa..a4bfd31ac45b 100644
--- a/fs/dlm/user.c
+++ b/fs/dlm/user.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2006-2009 Red Hat, Inc. All rights reserved. 2 * Copyright (C) 2006-2010 Red Hat, Inc. All rights reserved.
3 * 3 *
4 * This copyrighted material is made available to anyone wishing to use, 4 * This copyrighted material is made available to anyone wishing to use,
5 * modify, copy, or redistribute it subject to the terms and conditions 5 * modify, copy, or redistribute it subject to the terms and conditions
@@ -173,7 +173,7 @@ static int lkb_is_endoflife(struct dlm_lkb *lkb, int sb_status, int type)
173/* we could possibly check if the cancel of an orphan has resulted in the lkb 173/* we could possibly check if the cancel of an orphan has resulted in the lkb
174 being removed and then remove that lkb from the orphans list and free it */ 174 being removed and then remove that lkb from the orphans list and free it */
175 175
176void dlm_user_add_ast(struct dlm_lkb *lkb, int type, int bastmode) 176void dlm_user_add_ast(struct dlm_lkb *lkb, int type, int mode)
177{ 177{
178 struct dlm_ls *ls; 178 struct dlm_ls *ls;
179 struct dlm_user_args *ua; 179 struct dlm_user_args *ua;
@@ -206,8 +206,10 @@ void dlm_user_add_ast(struct dlm_lkb *lkb, int type, int bastmode)
206 206
207 ast_type = lkb->lkb_ast_type; 207 ast_type = lkb->lkb_ast_type;
208 lkb->lkb_ast_type |= type; 208 lkb->lkb_ast_type |= type;
209 if (bastmode) 209 if (type == AST_BAST)
210 lkb->lkb_bastmode = bastmode; 210 lkb->lkb_bastmode = mode;
211 else
212 lkb->lkb_castmode = mode;
211 213
212 if (!ast_type) { 214 if (!ast_type) {
213 kref_get(&lkb->lkb_ref); 215 kref_get(&lkb->lkb_ref);
diff --git a/fs/dlm/user.h b/fs/dlm/user.h
index 1c9686492286..f196091dd7ff 100644
--- a/fs/dlm/user.h
+++ b/fs/dlm/user.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2006-2008 Red Hat, Inc. All rights reserved. 2 * Copyright (C) 2006-2010 Red Hat, Inc. All rights reserved.
3 * 3 *
4 * This copyrighted material is made available to anyone wishing to use, 4 * This copyrighted material is made available to anyone wishing to use,
5 * modify, copy, or redistribute it subject to the terms and conditions 5 * modify, copy, or redistribute it subject to the terms and conditions
@@ -9,7 +9,7 @@
9#ifndef __USER_DOT_H__ 9#ifndef __USER_DOT_H__
10#define __USER_DOT_H__ 10#define __USER_DOT_H__
11 11
12void dlm_user_add_ast(struct dlm_lkb *lkb, int type, int bastmode); 12void dlm_user_add_ast(struct dlm_lkb *lkb, int type, int mode);
13int dlm_user_init(void); 13int dlm_user_init(void);
14void dlm_user_exit(void); 14void dlm_user_exit(void);
15int dlm_device_deregister(struct dlm_ls *ls); 15int dlm_device_deregister(struct dlm_ls *ls);
diff --git a/fs/nfs/Kconfig b/fs/nfs/Kconfig
index 59e5673b4597..a43d07e7b924 100644
--- a/fs/nfs/Kconfig
+++ b/fs/nfs/Kconfig
@@ -95,8 +95,7 @@ config ROOT_NFS
95 Most people say N here. 95 Most people say N here.
96 96
97config NFS_FSCACHE 97config NFS_FSCACHE
98 bool "Provide NFS client caching support (EXPERIMENTAL)" 98 bool "Provide NFS client caching support"
99 depends on EXPERIMENTAL
100 depends on NFS_FS=m && FSCACHE || NFS_FS=y && FSCACHE=y 99 depends on NFS_FS=m && FSCACHE || NFS_FS=y && FSCACHE=y
101 help 100 help
102 Say Y here if you want NFS data to be cached locally on disc through 101 Say Y here if you want NFS data to be cached locally on disc through
diff --git a/fs/xfs/Makefile b/fs/xfs/Makefile
index 56641fe52a23..5c5a366aa332 100644
--- a/fs/xfs/Makefile
+++ b/fs/xfs/Makefile
@@ -16,7 +16,7 @@
16# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 16# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17# 17#
18 18
19EXTRA_CFLAGS += -I$(src) -I$(src)/linux-2.6 -funsigned-char 19EXTRA_CFLAGS += -I$(src) -I$(src)/linux-2.6
20 20
21XFS_LINUX := linux-2.6 21XFS_LINUX := linux-2.6
22 22
diff --git a/fs/xfs/linux-2.6/kmem.c b/fs/xfs/linux-2.6/kmem.c
index 2d3f90afe5f1..bc7405585def 100644
--- a/fs/xfs/linux-2.6/kmem.c
+++ b/fs/xfs/linux-2.6/kmem.c
@@ -16,7 +16,6 @@
16 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 16 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */ 17 */
18#include <linux/mm.h> 18#include <linux/mm.h>
19#include <linux/vmalloc.h>
20#include <linux/highmem.h> 19#include <linux/highmem.h>
21#include <linux/swap.h> 20#include <linux/swap.h>
22#include <linux/blkdev.h> 21#include <linux/blkdev.h>
@@ -24,8 +23,25 @@
24#include "time.h" 23#include "time.h"
25#include "kmem.h" 24#include "kmem.h"
26 25
27#define MAX_VMALLOCS 6 26/*
28#define MAX_SLAB_SIZE 0x20000 27 * Greedy allocation. May fail and may return vmalloced memory.
28 *
29 * Must be freed using kmem_free_large.
30 */
31void *
32kmem_zalloc_greedy(size_t *size, size_t minsize, size_t maxsize)
33{
34 void *ptr;
35 size_t kmsize = maxsize;
36
37 while (!(ptr = kmem_zalloc_large(kmsize))) {
38 if ((kmsize >>= 1) <= minsize)
39 kmsize = minsize;
40 }
41 if (ptr)
42 *size = kmsize;
43 return ptr;
44}
29 45
30void * 46void *
31kmem_alloc(size_t size, unsigned int __nocast flags) 47kmem_alloc(size_t size, unsigned int __nocast flags)
@@ -34,19 +50,8 @@ kmem_alloc(size_t size, unsigned int __nocast flags)
34 gfp_t lflags = kmem_flags_convert(flags); 50 gfp_t lflags = kmem_flags_convert(flags);
35 void *ptr; 51 void *ptr;
36 52
37#ifdef DEBUG
38 if (unlikely(!(flags & KM_LARGE) && (size > PAGE_SIZE))) {
39 printk(KERN_WARNING "Large %s attempt, size=%ld\n",
40 __func__, (long)size);
41 dump_stack();
42 }
43#endif
44
45 do { 53 do {
46 if (size < MAX_SLAB_SIZE || retries > MAX_VMALLOCS) 54 ptr = kmalloc(size, lflags);
47 ptr = kmalloc(size, lflags);
48 else
49 ptr = __vmalloc(size, lflags, PAGE_KERNEL);
50 if (ptr || (flags & (KM_MAYFAIL|KM_NOSLEEP))) 55 if (ptr || (flags & (KM_MAYFAIL|KM_NOSLEEP)))
51 return ptr; 56 return ptr;
52 if (!(++retries % 100)) 57 if (!(++retries % 100))
@@ -68,27 +73,6 @@ kmem_zalloc(size_t size, unsigned int __nocast flags)
68 return ptr; 73 return ptr;
69} 74}
70 75
71void *
72kmem_zalloc_greedy(size_t *size, size_t minsize, size_t maxsize,
73 unsigned int __nocast flags)
74{
75 void *ptr;
76 size_t kmsize = maxsize;
77 unsigned int kmflags = (flags & ~KM_SLEEP) | KM_NOSLEEP;
78
79 while (!(ptr = kmem_zalloc(kmsize, kmflags))) {
80 if ((kmsize <= minsize) && (flags & KM_NOSLEEP))
81 break;
82 if ((kmsize >>= 1) <= minsize) {
83 kmsize = minsize;
84 kmflags = flags;
85 }
86 }
87 if (ptr)
88 *size = kmsize;
89 return ptr;
90}
91
92void 76void
93kmem_free(const void *ptr) 77kmem_free(const void *ptr)
94{ 78{
diff --git a/fs/xfs/linux-2.6/kmem.h b/fs/xfs/linux-2.6/kmem.h
index 179cbd630f69..f7c8f7a9ea6d 100644
--- a/fs/xfs/linux-2.6/kmem.h
+++ b/fs/xfs/linux-2.6/kmem.h
@@ -21,6 +21,7 @@
21#include <linux/slab.h> 21#include <linux/slab.h>
22#include <linux/sched.h> 22#include <linux/sched.h>
23#include <linux/mm.h> 23#include <linux/mm.h>
24#include <linux/vmalloc.h>
24 25
25/* 26/*
26 * General memory allocation interfaces 27 * General memory allocation interfaces
@@ -30,7 +31,6 @@
30#define KM_NOSLEEP 0x0002u 31#define KM_NOSLEEP 0x0002u
31#define KM_NOFS 0x0004u 32#define KM_NOFS 0x0004u
32#define KM_MAYFAIL 0x0008u 33#define KM_MAYFAIL 0x0008u
33#define KM_LARGE 0x0010u
34 34
35/* 35/*
36 * We use a special process flag to avoid recursive callbacks into 36 * We use a special process flag to avoid recursive callbacks into
@@ -42,7 +42,7 @@ kmem_flags_convert(unsigned int __nocast flags)
42{ 42{
43 gfp_t lflags; 43 gfp_t lflags;
44 44
45 BUG_ON(flags & ~(KM_SLEEP|KM_NOSLEEP|KM_NOFS|KM_MAYFAIL|KM_LARGE)); 45 BUG_ON(flags & ~(KM_SLEEP|KM_NOSLEEP|KM_NOFS|KM_MAYFAIL));
46 46
47 if (flags & KM_NOSLEEP) { 47 if (flags & KM_NOSLEEP) {
48 lflags = GFP_ATOMIC | __GFP_NOWARN; 48 lflags = GFP_ATOMIC | __GFP_NOWARN;
@@ -56,10 +56,25 @@ kmem_flags_convert(unsigned int __nocast flags)
56 56
57extern void *kmem_alloc(size_t, unsigned int __nocast); 57extern void *kmem_alloc(size_t, unsigned int __nocast);
58extern void *kmem_zalloc(size_t, unsigned int __nocast); 58extern void *kmem_zalloc(size_t, unsigned int __nocast);
59extern void *kmem_zalloc_greedy(size_t *, size_t, size_t, unsigned int __nocast);
60extern void *kmem_realloc(const void *, size_t, size_t, unsigned int __nocast); 59extern void *kmem_realloc(const void *, size_t, size_t, unsigned int __nocast);
61extern void kmem_free(const void *); 60extern void kmem_free(const void *);
62 61
62static inline void *kmem_zalloc_large(size_t size)
63{
64 void *ptr;
65
66 ptr = vmalloc(size);
67 if (ptr)
68 memset(ptr, 0, size);
69 return ptr;
70}
71static inline void kmem_free_large(void *ptr)
72{
73 vfree(ptr);
74}
75
76extern void *kmem_zalloc_greedy(size_t *, size_t, size_t);
77
63/* 78/*
64 * Zone interfaces 79 * Zone interfaces
65 */ 80 */
diff --git a/fs/xfs/linux-2.6/xfs_acl.c b/fs/xfs/linux-2.6/xfs_acl.c
index 883ca5ab8af5..bf85bbe4a9ae 100644
--- a/fs/xfs/linux-2.6/xfs_acl.c
+++ b/fs/xfs/linux-2.6/xfs_acl.c
@@ -106,7 +106,7 @@ xfs_get_acl(struct inode *inode, int type)
106 struct posix_acl *acl; 106 struct posix_acl *acl;
107 struct xfs_acl *xfs_acl; 107 struct xfs_acl *xfs_acl;
108 int len = sizeof(struct xfs_acl); 108 int len = sizeof(struct xfs_acl);
109 char *ea_name; 109 unsigned char *ea_name;
110 int error; 110 int error;
111 111
112 acl = get_cached_acl(inode, type); 112 acl = get_cached_acl(inode, type);
@@ -133,7 +133,8 @@ xfs_get_acl(struct inode *inode, int type)
133 if (!xfs_acl) 133 if (!xfs_acl)
134 return ERR_PTR(-ENOMEM); 134 return ERR_PTR(-ENOMEM);
135 135
136 error = -xfs_attr_get(ip, ea_name, (char *)xfs_acl, &len, ATTR_ROOT); 136 error = -xfs_attr_get(ip, ea_name, (unsigned char *)xfs_acl,
137 &len, ATTR_ROOT);
137 if (error) { 138 if (error) {
138 /* 139 /*
139 * If the attribute doesn't exist make sure we have a negative 140 * If the attribute doesn't exist make sure we have a negative
@@ -162,7 +163,7 @@ STATIC int
162xfs_set_acl(struct inode *inode, int type, struct posix_acl *acl) 163xfs_set_acl(struct inode *inode, int type, struct posix_acl *acl)
163{ 164{
164 struct xfs_inode *ip = XFS_I(inode); 165 struct xfs_inode *ip = XFS_I(inode);
165 char *ea_name; 166 unsigned char *ea_name;
166 int error; 167 int error;
167 168
168 if (S_ISLNK(inode->i_mode)) 169 if (S_ISLNK(inode->i_mode))
@@ -194,7 +195,7 @@ xfs_set_acl(struct inode *inode, int type, struct posix_acl *acl)
194 (sizeof(struct xfs_acl_entry) * 195 (sizeof(struct xfs_acl_entry) *
195 (XFS_ACL_MAX_ENTRIES - acl->a_count)); 196 (XFS_ACL_MAX_ENTRIES - acl->a_count));
196 197
197 error = -xfs_attr_set(ip, ea_name, (char *)xfs_acl, 198 error = -xfs_attr_set(ip, ea_name, (unsigned char *)xfs_acl,
198 len, ATTR_ROOT); 199 len, ATTR_ROOT);
199 200
200 kfree(xfs_acl); 201 kfree(xfs_acl);
@@ -262,7 +263,7 @@ xfs_set_mode(struct inode *inode, mode_t mode)
262} 263}
263 264
264static int 265static int
265xfs_acl_exists(struct inode *inode, char *name) 266xfs_acl_exists(struct inode *inode, unsigned char *name)
266{ 267{
267 int len = sizeof(struct xfs_acl); 268 int len = sizeof(struct xfs_acl);
268 269
diff --git a/fs/xfs/linux-2.6/xfs_buf.c b/fs/xfs/linux-2.6/xfs_buf.c
index 77b8be81c769..6f76ba85f193 100644
--- a/fs/xfs/linux-2.6/xfs_buf.c
+++ b/fs/xfs/linux-2.6/xfs_buf.c
@@ -33,6 +33,7 @@
33#include <linux/migrate.h> 33#include <linux/migrate.h>
34#include <linux/backing-dev.h> 34#include <linux/backing-dev.h>
35#include <linux/freezer.h> 35#include <linux/freezer.h>
36#include <linux/list_sort.h>
36 37
37#include "xfs_sb.h" 38#include "xfs_sb.h"
38#include "xfs_inum.h" 39#include "xfs_inum.h"
@@ -76,6 +77,27 @@ struct workqueue_struct *xfsconvertd_workqueue;
76#define xfs_buf_deallocate(bp) \ 77#define xfs_buf_deallocate(bp) \
77 kmem_zone_free(xfs_buf_zone, (bp)); 78 kmem_zone_free(xfs_buf_zone, (bp));
78 79
80static inline int
81xfs_buf_is_vmapped(
82 struct xfs_buf *bp)
83{
84 /*
85 * Return true if the buffer is vmapped.
86 *
87 * The XBF_MAPPED flag is set if the buffer should be mapped, but the
88 * code is clever enough to know it doesn't have to map a single page,
89 * so the check has to be both for XBF_MAPPED and bp->b_page_count > 1.
90 */
91 return (bp->b_flags & XBF_MAPPED) && bp->b_page_count > 1;
92}
93
94static inline int
95xfs_buf_vmap_len(
96 struct xfs_buf *bp)
97{
98 return (bp->b_page_count * PAGE_SIZE) - bp->b_offset;
99}
100
79/* 101/*
80 * Page Region interfaces. 102 * Page Region interfaces.
81 * 103 *
@@ -314,7 +336,7 @@ xfs_buf_free(
314 if (bp->b_flags & (_XBF_PAGE_CACHE|_XBF_PAGES)) { 336 if (bp->b_flags & (_XBF_PAGE_CACHE|_XBF_PAGES)) {
315 uint i; 337 uint i;
316 338
317 if ((bp->b_flags & XBF_MAPPED) && (bp->b_page_count > 1)) 339 if (xfs_buf_is_vmapped(bp))
318 free_address(bp->b_addr - bp->b_offset); 340 free_address(bp->b_addr - bp->b_offset);
319 341
320 for (i = 0; i < bp->b_page_count; i++) { 342 for (i = 0; i < bp->b_page_count; i++) {
@@ -1051,22 +1073,30 @@ xfs_buf_ioerror(
1051} 1073}
1052 1074
1053int 1075int
1054xfs_bawrite( 1076xfs_bwrite(
1055 void *mp, 1077 struct xfs_mount *mp,
1056 struct xfs_buf *bp) 1078 struct xfs_buf *bp)
1057{ 1079{
1058 trace_xfs_buf_bawrite(bp, _RET_IP_); 1080 int iowait = (bp->b_flags & XBF_ASYNC) == 0;
1081 int error = 0;
1059 1082
1060 ASSERT(bp->b_bn != XFS_BUF_DADDR_NULL); 1083 bp->b_strat = xfs_bdstrat_cb;
1084 bp->b_mount = mp;
1085 bp->b_flags |= XBF_WRITE;
1086 if (!iowait)
1087 bp->b_flags |= _XBF_RUN_QUEUES;
1061 1088
1062 xfs_buf_delwri_dequeue(bp); 1089 xfs_buf_delwri_dequeue(bp);
1090 xfs_buf_iostrategy(bp);
1063 1091
1064 bp->b_flags &= ~(XBF_READ | XBF_DELWRI | XBF_READ_AHEAD); 1092 if (iowait) {
1065 bp->b_flags |= (XBF_WRITE | XBF_ASYNC | _XBF_RUN_QUEUES); 1093 error = xfs_buf_iowait(bp);
1094 if (error)
1095 xfs_force_shutdown(mp, SHUTDOWN_META_IO_ERROR);
1096 xfs_buf_relse(bp);
1097 }
1066 1098
1067 bp->b_mount = mp; 1099 return error;
1068 bp->b_strat = xfs_bdstrat_cb;
1069 return xfs_bdstrat_cb(bp);
1070} 1100}
1071 1101
1072void 1102void
@@ -1085,6 +1115,126 @@ xfs_bdwrite(
1085 xfs_buf_delwri_queue(bp, 1); 1115 xfs_buf_delwri_queue(bp, 1);
1086} 1116}
1087 1117
1118/*
1119 * Called when we want to stop a buffer from getting written or read.
1120 * We attach the EIO error, muck with its flags, and call biodone
1121 * so that the proper iodone callbacks get called.
1122 */
1123STATIC int
1124xfs_bioerror(
1125 xfs_buf_t *bp)
1126{
1127#ifdef XFSERRORDEBUG
1128 ASSERT(XFS_BUF_ISREAD(bp) || bp->b_iodone);
1129#endif
1130
1131 /*
1132 * No need to wait until the buffer is unpinned, we aren't flushing it.
1133 */
1134 XFS_BUF_ERROR(bp, EIO);
1135
1136 /*
1137 * We're calling biodone, so delete XBF_DONE flag.
1138 */
1139 XFS_BUF_UNREAD(bp);
1140 XFS_BUF_UNDELAYWRITE(bp);
1141 XFS_BUF_UNDONE(bp);
1142 XFS_BUF_STALE(bp);
1143
1144 XFS_BUF_CLR_BDSTRAT_FUNC(bp);
1145 xfs_biodone(bp);
1146
1147 return EIO;
1148}
1149
1150/*
1151 * Same as xfs_bioerror, except that we are releasing the buffer
1152 * here ourselves, and avoiding the biodone call.
1153 * This is meant for userdata errors; metadata bufs come with
1154 * iodone functions attached, so that we can track down errors.
1155 */
1156STATIC int
1157xfs_bioerror_relse(
1158 struct xfs_buf *bp)
1159{
1160 int64_t fl = XFS_BUF_BFLAGS(bp);
1161 /*
1162 * No need to wait until the buffer is unpinned.
1163 * We aren't flushing it.
1164 *
1165 * chunkhold expects B_DONE to be set, whether
1166 * we actually finish the I/O or not. We don't want to
1167 * change that interface.
1168 */
1169 XFS_BUF_UNREAD(bp);
1170 XFS_BUF_UNDELAYWRITE(bp);
1171 XFS_BUF_DONE(bp);
1172 XFS_BUF_STALE(bp);
1173 XFS_BUF_CLR_IODONE_FUNC(bp);
1174 XFS_BUF_CLR_BDSTRAT_FUNC(bp);
1175 if (!(fl & XBF_ASYNC)) {
1176 /*
1177 * Mark b_error and B_ERROR _both_.
1178 * Lot's of chunkcache code assumes that.
1179 * There's no reason to mark error for
1180 * ASYNC buffers.
1181 */
1182 XFS_BUF_ERROR(bp, EIO);
1183 XFS_BUF_FINISH_IOWAIT(bp);
1184 } else {
1185 xfs_buf_relse(bp);
1186 }
1187
1188 return EIO;
1189}
1190
1191
1192/*
1193 * All xfs metadata buffers except log state machine buffers
1194 * get this attached as their b_bdstrat callback function.
1195 * This is so that we can catch a buffer
1196 * after prematurely unpinning it to forcibly shutdown the filesystem.
1197 */
1198int
1199xfs_bdstrat_cb(
1200 struct xfs_buf *bp)
1201{
1202 if (XFS_FORCED_SHUTDOWN(bp->b_mount)) {
1203 trace_xfs_bdstrat_shut(bp, _RET_IP_);
1204 /*
1205 * Metadata write that didn't get logged but
1206 * written delayed anyway. These aren't associated
1207 * with a transaction, and can be ignored.
1208 */
1209 if (!bp->b_iodone && !XFS_BUF_ISREAD(bp))
1210 return xfs_bioerror_relse(bp);
1211 else
1212 return xfs_bioerror(bp);
1213 }
1214
1215 xfs_buf_iorequest(bp);
1216 return 0;
1217}
1218
1219/*
1220 * Wrapper around bdstrat so that we can stop data from going to disk in case
1221 * we are shutting down the filesystem. Typically user data goes thru this
1222 * path; one of the exceptions is the superblock.
1223 */
1224void
1225xfsbdstrat(
1226 struct xfs_mount *mp,
1227 struct xfs_buf *bp)
1228{
1229 if (XFS_FORCED_SHUTDOWN(mp)) {
1230 trace_xfs_bdstrat_shut(bp, _RET_IP_);
1231 xfs_bioerror_relse(bp);
1232 return;
1233 }
1234
1235 xfs_buf_iorequest(bp);
1236}
1237
1088STATIC void 1238STATIC void
1089_xfs_buf_ioend( 1239_xfs_buf_ioend(
1090 xfs_buf_t *bp, 1240 xfs_buf_t *bp,
@@ -1107,6 +1257,9 @@ xfs_buf_bio_end_io(
1107 1257
1108 xfs_buf_ioerror(bp, -error); 1258 xfs_buf_ioerror(bp, -error);
1109 1259
1260 if (!error && xfs_buf_is_vmapped(bp) && (bp->b_flags & XBF_READ))
1261 invalidate_kernel_vmap_range(bp->b_addr, xfs_buf_vmap_len(bp));
1262
1110 do { 1263 do {
1111 struct page *page = bvec->bv_page; 1264 struct page *page = bvec->bv_page;
1112 1265
@@ -1216,6 +1369,10 @@ next_chunk:
1216 1369
1217submit_io: 1370submit_io:
1218 if (likely(bio->bi_size)) { 1371 if (likely(bio->bi_size)) {
1372 if (xfs_buf_is_vmapped(bp)) {
1373 flush_kernel_vmap_range(bp->b_addr,
1374 xfs_buf_vmap_len(bp));
1375 }
1219 submit_bio(rw, bio); 1376 submit_bio(rw, bio);
1220 if (size) 1377 if (size)
1221 goto next_chunk; 1378 goto next_chunk;
@@ -1296,7 +1453,7 @@ xfs_buf_iomove(
1296 xfs_buf_t *bp, /* buffer to process */ 1453 xfs_buf_t *bp, /* buffer to process */
1297 size_t boff, /* starting buffer offset */ 1454 size_t boff, /* starting buffer offset */
1298 size_t bsize, /* length to copy */ 1455 size_t bsize, /* length to copy */
1299 caddr_t data, /* data address */ 1456 void *data, /* data address */
1300 xfs_buf_rw_t mode) /* read/write/zero flag */ 1457 xfs_buf_rw_t mode) /* read/write/zero flag */
1301{ 1458{
1302 size_t bend, cpoff, csize; 1459 size_t bend, cpoff, csize;
@@ -1378,8 +1535,8 @@ xfs_alloc_bufhash(
1378 1535
1379 btp->bt_hashshift = external ? 3 : 8; /* 8 or 256 buckets */ 1536 btp->bt_hashshift = external ? 3 : 8; /* 8 or 256 buckets */
1380 btp->bt_hashmask = (1 << btp->bt_hashshift) - 1; 1537 btp->bt_hashmask = (1 << btp->bt_hashshift) - 1;
1381 btp->bt_hash = kmem_zalloc((1 << btp->bt_hashshift) * 1538 btp->bt_hash = kmem_zalloc_large((1 << btp->bt_hashshift) *
1382 sizeof(xfs_bufhash_t), KM_SLEEP | KM_LARGE); 1539 sizeof(xfs_bufhash_t));
1383 for (i = 0; i < (1 << btp->bt_hashshift); i++) { 1540 for (i = 0; i < (1 << btp->bt_hashshift); i++) {
1384 spin_lock_init(&btp->bt_hash[i].bh_lock); 1541 spin_lock_init(&btp->bt_hash[i].bh_lock);
1385 INIT_LIST_HEAD(&btp->bt_hash[i].bh_list); 1542 INIT_LIST_HEAD(&btp->bt_hash[i].bh_list);
@@ -1390,7 +1547,7 @@ STATIC void
1390xfs_free_bufhash( 1547xfs_free_bufhash(
1391 xfs_buftarg_t *btp) 1548 xfs_buftarg_t *btp)
1392{ 1549{
1393 kmem_free(btp->bt_hash); 1550 kmem_free_large(btp->bt_hash);
1394 btp->bt_hash = NULL; 1551 btp->bt_hash = NULL;
1395} 1552}
1396 1553
@@ -1595,6 +1752,11 @@ xfs_buf_delwri_queue(
1595 list_del(&bp->b_list); 1752 list_del(&bp->b_list);
1596 } 1753 }
1597 1754
1755 if (list_empty(dwq)) {
1756 /* start xfsbufd as it is about to have something to do */
1757 wake_up_process(bp->b_target->bt_task);
1758 }
1759
1598 bp->b_flags |= _XBF_DELWRI_Q; 1760 bp->b_flags |= _XBF_DELWRI_Q;
1599 list_add_tail(&bp->b_list, dwq); 1761 list_add_tail(&bp->b_list, dwq);
1600 bp->b_queuetime = jiffies; 1762 bp->b_queuetime = jiffies;
@@ -1626,6 +1788,35 @@ xfs_buf_delwri_dequeue(
1626 trace_xfs_buf_delwri_dequeue(bp, _RET_IP_); 1788 trace_xfs_buf_delwri_dequeue(bp, _RET_IP_);
1627} 1789}
1628 1790
1791/*
1792 * If a delwri buffer needs to be pushed before it has aged out, then promote
1793 * it to the head of the delwri queue so that it will be flushed on the next
1794 * xfsbufd run. We do this by resetting the queuetime of the buffer to be older
1795 * than the age currently needed to flush the buffer. Hence the next time the
1796 * xfsbufd sees it is guaranteed to be considered old enough to flush.
1797 */
1798void
1799xfs_buf_delwri_promote(
1800 struct xfs_buf *bp)
1801{
1802 struct xfs_buftarg *btp = bp->b_target;
1803 long age = xfs_buf_age_centisecs * msecs_to_jiffies(10) + 1;
1804
1805 ASSERT(bp->b_flags & XBF_DELWRI);
1806 ASSERT(bp->b_flags & _XBF_DELWRI_Q);
1807
1808 /*
1809 * Check the buffer age before locking the delayed write queue as we
1810 * don't need to promote buffers that are already past the flush age.
1811 */
1812 if (bp->b_queuetime < jiffies - age)
1813 return;
1814 bp->b_queuetime = jiffies - age;
1815 spin_lock(&btp->bt_delwrite_lock);
1816 list_move(&bp->b_list, &btp->bt_delwrite_queue);
1817 spin_unlock(&btp->bt_delwrite_lock);
1818}
1819
1629STATIC void 1820STATIC void
1630xfs_buf_runall_queues( 1821xfs_buf_runall_queues(
1631 struct workqueue_struct *queue) 1822 struct workqueue_struct *queue)
@@ -1644,6 +1835,8 @@ xfsbufd_wakeup(
1644 list_for_each_entry(btp, &xfs_buftarg_list, bt_list) { 1835 list_for_each_entry(btp, &xfs_buftarg_list, bt_list) {
1645 if (test_bit(XBT_FORCE_SLEEP, &btp->bt_flags)) 1836 if (test_bit(XBT_FORCE_SLEEP, &btp->bt_flags))
1646 continue; 1837 continue;
1838 if (list_empty(&btp->bt_delwrite_queue))
1839 continue;
1647 set_bit(XBT_FORCE_FLUSH, &btp->bt_flags); 1840 set_bit(XBT_FORCE_FLUSH, &btp->bt_flags);
1648 wake_up_process(btp->bt_task); 1841 wake_up_process(btp->bt_task);
1649 } 1842 }
@@ -1694,20 +1887,53 @@ xfs_buf_delwri_split(
1694 1887
1695} 1888}
1696 1889
1890/*
1891 * Compare function is more complex than it needs to be because
1892 * the return value is only 32 bits and we are doing comparisons
1893 * on 64 bit values
1894 */
1895static int
1896xfs_buf_cmp(
1897 void *priv,
1898 struct list_head *a,
1899 struct list_head *b)
1900{
1901 struct xfs_buf *ap = container_of(a, struct xfs_buf, b_list);
1902 struct xfs_buf *bp = container_of(b, struct xfs_buf, b_list);
1903 xfs_daddr_t diff;
1904
1905 diff = ap->b_bn - bp->b_bn;
1906 if (diff < 0)
1907 return -1;
1908 if (diff > 0)
1909 return 1;
1910 return 0;
1911}
1912
1913void
1914xfs_buf_delwri_sort(
1915 xfs_buftarg_t *target,
1916 struct list_head *list)
1917{
1918 list_sort(NULL, list, xfs_buf_cmp);
1919}
1920
1697STATIC int 1921STATIC int
1698xfsbufd( 1922xfsbufd(
1699 void *data) 1923 void *data)
1700{ 1924{
1701 struct list_head tmp; 1925 xfs_buftarg_t *target = (xfs_buftarg_t *)data;
1702 xfs_buftarg_t *target = (xfs_buftarg_t *)data;
1703 int count;
1704 xfs_buf_t *bp;
1705 1926
1706 current->flags |= PF_MEMALLOC; 1927 current->flags |= PF_MEMALLOC;
1707 1928
1708 set_freezable(); 1929 set_freezable();
1709 1930
1710 do { 1931 do {
1932 long age = xfs_buf_age_centisecs * msecs_to_jiffies(10);
1933 long tout = xfs_buf_timer_centisecs * msecs_to_jiffies(10);
1934 int count = 0;
1935 struct list_head tmp;
1936
1711 if (unlikely(freezing(current))) { 1937 if (unlikely(freezing(current))) {
1712 set_bit(XBT_FORCE_SLEEP, &target->bt_flags); 1938 set_bit(XBT_FORCE_SLEEP, &target->bt_flags);
1713 refrigerator(); 1939 refrigerator();
@@ -1715,17 +1941,16 @@ xfsbufd(
1715 clear_bit(XBT_FORCE_SLEEP, &target->bt_flags); 1941 clear_bit(XBT_FORCE_SLEEP, &target->bt_flags);
1716 } 1942 }
1717 1943
1718 schedule_timeout_interruptible( 1944 /* sleep for a long time if there is nothing to do. */
1719 xfs_buf_timer_centisecs * msecs_to_jiffies(10)); 1945 if (list_empty(&target->bt_delwrite_queue))
1946 tout = MAX_SCHEDULE_TIMEOUT;
1947 schedule_timeout_interruptible(tout);
1720 1948
1721 xfs_buf_delwri_split(target, &tmp, 1949 xfs_buf_delwri_split(target, &tmp, age);
1722 xfs_buf_age_centisecs * msecs_to_jiffies(10)); 1950 list_sort(NULL, &tmp, xfs_buf_cmp);
1723
1724 count = 0;
1725 while (!list_empty(&tmp)) { 1951 while (!list_empty(&tmp)) {
1726 bp = list_entry(tmp.next, xfs_buf_t, b_list); 1952 struct xfs_buf *bp;
1727 ASSERT(target == bp->b_target); 1953 bp = list_first_entry(&tmp, struct xfs_buf, b_list);
1728
1729 list_del_init(&bp->b_list); 1954 list_del_init(&bp->b_list);
1730 xfs_buf_iostrategy(bp); 1955 xfs_buf_iostrategy(bp);
1731 count++; 1956 count++;
@@ -1751,42 +1976,45 @@ xfs_flush_buftarg(
1751 xfs_buftarg_t *target, 1976 xfs_buftarg_t *target,
1752 int wait) 1977 int wait)
1753{ 1978{
1754 struct list_head tmp; 1979 xfs_buf_t *bp;
1755 xfs_buf_t *bp, *n;
1756 int pincount = 0; 1980 int pincount = 0;
1981 LIST_HEAD(tmp_list);
1982 LIST_HEAD(wait_list);
1757 1983
1758 xfs_buf_runall_queues(xfsconvertd_workqueue); 1984 xfs_buf_runall_queues(xfsconvertd_workqueue);
1759 xfs_buf_runall_queues(xfsdatad_workqueue); 1985 xfs_buf_runall_queues(xfsdatad_workqueue);
1760 xfs_buf_runall_queues(xfslogd_workqueue); 1986 xfs_buf_runall_queues(xfslogd_workqueue);
1761 1987
1762 set_bit(XBT_FORCE_FLUSH, &target->bt_flags); 1988 set_bit(XBT_FORCE_FLUSH, &target->bt_flags);
1763 pincount = xfs_buf_delwri_split(target, &tmp, 0); 1989 pincount = xfs_buf_delwri_split(target, &tmp_list, 0);
1764 1990
1765 /* 1991 /*
1766 * Dropped the delayed write list lock, now walk the temporary list 1992 * Dropped the delayed write list lock, now walk the temporary list.
1993 * All I/O is issued async and then if we need to wait for completion
1994 * we do that after issuing all the IO.
1767 */ 1995 */
1768 list_for_each_entry_safe(bp, n, &tmp, b_list) { 1996 list_sort(NULL, &tmp_list, xfs_buf_cmp);
1997 while (!list_empty(&tmp_list)) {
1998 bp = list_first_entry(&tmp_list, struct xfs_buf, b_list);
1769 ASSERT(target == bp->b_target); 1999 ASSERT(target == bp->b_target);
1770 if (wait) 2000 list_del_init(&bp->b_list);
2001 if (wait) {
1771 bp->b_flags &= ~XBF_ASYNC; 2002 bp->b_flags &= ~XBF_ASYNC;
1772 else 2003 list_add(&bp->b_list, &wait_list);
1773 list_del_init(&bp->b_list); 2004 }
1774
1775 xfs_buf_iostrategy(bp); 2005 xfs_buf_iostrategy(bp);
1776 } 2006 }
1777 2007
1778 if (wait) 2008 if (wait) {
2009 /* Expedite and wait for IO to complete. */
1779 blk_run_address_space(target->bt_mapping); 2010 blk_run_address_space(target->bt_mapping);
2011 while (!list_empty(&wait_list)) {
2012 bp = list_first_entry(&wait_list, struct xfs_buf, b_list);
1780 2013
1781 /* 2014 list_del_init(&bp->b_list);
1782 * Remaining list items must be flushed before returning 2015 xfs_iowait(bp);
1783 */ 2016 xfs_buf_relse(bp);
1784 while (!list_empty(&tmp)) { 2017 }
1785 bp = list_entry(tmp.next, xfs_buf_t, b_list);
1786
1787 list_del_init(&bp->b_list);
1788 xfs_iowait(bp);
1789 xfs_buf_relse(bp);
1790 } 2018 }
1791 2019
1792 return pincount; 2020 return pincount;
diff --git a/fs/xfs/linux-2.6/xfs_buf.h b/fs/xfs/linux-2.6/xfs_buf.h
index a34c7b54822d..386e7361e50e 100644
--- a/fs/xfs/linux-2.6/xfs_buf.h
+++ b/fs/xfs/linux-2.6/xfs_buf.h
@@ -232,13 +232,17 @@ extern void xfs_buf_lock(xfs_buf_t *);
232extern void xfs_buf_unlock(xfs_buf_t *); 232extern void xfs_buf_unlock(xfs_buf_t *);
233 233
234/* Buffer Read and Write Routines */ 234/* Buffer Read and Write Routines */
235extern int xfs_bawrite(void *mp, xfs_buf_t *bp); 235extern int xfs_bwrite(struct xfs_mount *mp, struct xfs_buf *bp);
236extern void xfs_bdwrite(void *mp, xfs_buf_t *bp); 236extern void xfs_bdwrite(void *mp, xfs_buf_t *bp);
237
238extern void xfsbdstrat(struct xfs_mount *, struct xfs_buf *);
239extern int xfs_bdstrat_cb(struct xfs_buf *);
240
237extern void xfs_buf_ioend(xfs_buf_t *, int); 241extern void xfs_buf_ioend(xfs_buf_t *, int);
238extern void xfs_buf_ioerror(xfs_buf_t *, int); 242extern void xfs_buf_ioerror(xfs_buf_t *, int);
239extern int xfs_buf_iorequest(xfs_buf_t *); 243extern int xfs_buf_iorequest(xfs_buf_t *);
240extern int xfs_buf_iowait(xfs_buf_t *); 244extern int xfs_buf_iowait(xfs_buf_t *);
241extern void xfs_buf_iomove(xfs_buf_t *, size_t, size_t, xfs_caddr_t, 245extern void xfs_buf_iomove(xfs_buf_t *, size_t, size_t, void *,
242 xfs_buf_rw_t); 246 xfs_buf_rw_t);
243 247
244static inline int xfs_buf_iostrategy(xfs_buf_t *bp) 248static inline int xfs_buf_iostrategy(xfs_buf_t *bp)
@@ -261,6 +265,7 @@ extern int xfs_buf_ispin(xfs_buf_t *);
261 265
262/* Delayed Write Buffer Routines */ 266/* Delayed Write Buffer Routines */
263extern void xfs_buf_delwri_dequeue(xfs_buf_t *); 267extern void xfs_buf_delwri_dequeue(xfs_buf_t *);
268extern void xfs_buf_delwri_promote(xfs_buf_t *);
264 269
265/* Buffer Daemon Setup Routines */ 270/* Buffer Daemon Setup Routines */
266extern int xfs_buf_init(void); 271extern int xfs_buf_init(void);
@@ -270,33 +275,19 @@ extern void xfs_buf_terminate(void);
270 ({ char __b[BDEVNAME_SIZE]; bdevname((target)->bt_bdev, __b); __b; }) 275 ({ char __b[BDEVNAME_SIZE]; bdevname((target)->bt_bdev, __b); __b; })
271 276
272 277
273#define XFS_B_ASYNC XBF_ASYNC
274#define XFS_B_DELWRI XBF_DELWRI
275#define XFS_B_READ XBF_READ
276#define XFS_B_WRITE XBF_WRITE
277#define XFS_B_STALE XBF_STALE
278
279#define XFS_BUF_TRYLOCK XBF_TRYLOCK
280#define XFS_INCORE_TRYLOCK XBF_TRYLOCK
281#define XFS_BUF_LOCK XBF_LOCK
282#define XFS_BUF_MAPPED XBF_MAPPED
283
284#define BUF_BUSY XBF_DONT_BLOCK
285
286#define XFS_BUF_BFLAGS(bp) ((bp)->b_flags) 278#define XFS_BUF_BFLAGS(bp) ((bp)->b_flags)
287#define XFS_BUF_ZEROFLAGS(bp) ((bp)->b_flags &= \ 279#define XFS_BUF_ZEROFLAGS(bp) ((bp)->b_flags &= \
288 ~(XBF_READ|XBF_WRITE|XBF_ASYNC|XBF_DELWRI|XBF_ORDERED)) 280 ~(XBF_READ|XBF_WRITE|XBF_ASYNC|XBF_DELWRI|XBF_ORDERED))
289 281
290#define XFS_BUF_STALE(bp) ((bp)->b_flags |= XFS_B_STALE) 282#define XFS_BUF_STALE(bp) ((bp)->b_flags |= XBF_STALE)
291#define XFS_BUF_UNSTALE(bp) ((bp)->b_flags &= ~XFS_B_STALE) 283#define XFS_BUF_UNSTALE(bp) ((bp)->b_flags &= ~XBF_STALE)
292#define XFS_BUF_ISSTALE(bp) ((bp)->b_flags & XFS_B_STALE) 284#define XFS_BUF_ISSTALE(bp) ((bp)->b_flags & XBF_STALE)
293#define XFS_BUF_SUPER_STALE(bp) do { \ 285#define XFS_BUF_SUPER_STALE(bp) do { \
294 XFS_BUF_STALE(bp); \ 286 XFS_BUF_STALE(bp); \
295 xfs_buf_delwri_dequeue(bp); \ 287 xfs_buf_delwri_dequeue(bp); \
296 XFS_BUF_DONE(bp); \ 288 XFS_BUF_DONE(bp); \
297 } while (0) 289 } while (0)
298 290
299#define XFS_BUF_MANAGE XBF_FS_MANAGED
300#define XFS_BUF_UNMANAGE(bp) ((bp)->b_flags &= ~XBF_FS_MANAGED) 291#define XFS_BUF_UNMANAGE(bp) ((bp)->b_flags &= ~XBF_FS_MANAGED)
301 292
302#define XFS_BUF_DELAYWRITE(bp) ((bp)->b_flags |= XBF_DELWRI) 293#define XFS_BUF_DELAYWRITE(bp) ((bp)->b_flags |= XBF_DELWRI)
@@ -385,31 +376,11 @@ static inline void xfs_buf_relse(xfs_buf_t *bp)
385 376
386#define xfs_biomove(bp, off, len, data, rw) \ 377#define xfs_biomove(bp, off, len, data, rw) \
387 xfs_buf_iomove((bp), (off), (len), (data), \ 378 xfs_buf_iomove((bp), (off), (len), (data), \
388 ((rw) == XFS_B_WRITE) ? XBRW_WRITE : XBRW_READ) 379 ((rw) == XBF_WRITE) ? XBRW_WRITE : XBRW_READ)
389 380
390#define xfs_biozero(bp, off, len) \ 381#define xfs_biozero(bp, off, len) \
391 xfs_buf_iomove((bp), (off), (len), NULL, XBRW_ZERO) 382 xfs_buf_iomove((bp), (off), (len), NULL, XBRW_ZERO)
392 383
393
394static inline int XFS_bwrite(xfs_buf_t *bp)
395{
396 int iowait = (bp->b_flags & XBF_ASYNC) == 0;
397 int error = 0;
398
399 if (!iowait)
400 bp->b_flags |= _XBF_RUN_QUEUES;
401
402 xfs_buf_delwri_dequeue(bp);
403 xfs_buf_iostrategy(bp);
404 if (iowait) {
405 error = xfs_buf_iowait(bp);
406 xfs_buf_relse(bp);
407 }
408 return error;
409}
410
411#define XFS_bdstrat(bp) xfs_buf_iorequest(bp)
412
413#define xfs_iowait(bp) xfs_buf_iowait(bp) 384#define xfs_iowait(bp) xfs_buf_iowait(bp)
414 385
415#define xfs_baread(target, rablkno, ralen) \ 386#define xfs_baread(target, rablkno, ralen) \
@@ -424,6 +395,7 @@ extern void xfs_free_buftarg(struct xfs_mount *, struct xfs_buftarg *);
424extern void xfs_wait_buftarg(xfs_buftarg_t *); 395extern void xfs_wait_buftarg(xfs_buftarg_t *);
425extern int xfs_setsize_buftarg(xfs_buftarg_t *, unsigned int, unsigned int); 396extern int xfs_setsize_buftarg(xfs_buftarg_t *, unsigned int, unsigned int);
426extern int xfs_flush_buftarg(xfs_buftarg_t *, int); 397extern int xfs_flush_buftarg(xfs_buftarg_t *, int);
398
427#ifdef CONFIG_KDB_MODULES 399#ifdef CONFIG_KDB_MODULES
428extern struct list_head *xfs_get_buftarg_list(void); 400extern struct list_head *xfs_get_buftarg_list(void);
429#endif 401#endif
diff --git a/fs/xfs/linux-2.6/xfs_fs_subr.c b/fs/xfs/linux-2.6/xfs_fs_subr.c
index 7501b85fd860..b6918d76bc7b 100644
--- a/fs/xfs/linux-2.6/xfs_fs_subr.c
+++ b/fs/xfs/linux-2.6/xfs_fs_subr.c
@@ -79,7 +79,7 @@ xfs_flush_pages(
79 xfs_iflags_clear(ip, XFS_ITRUNCATED); 79 xfs_iflags_clear(ip, XFS_ITRUNCATED);
80 ret = -filemap_fdatawrite(mapping); 80 ret = -filemap_fdatawrite(mapping);
81 } 81 }
82 if (flags & XFS_B_ASYNC) 82 if (flags & XBF_ASYNC)
83 return ret; 83 return ret;
84 ret2 = xfs_wait_on_pages(ip, first, last); 84 ret2 = xfs_wait_on_pages(ip, first, last);
85 if (!ret) 85 if (!ret)
diff --git a/fs/xfs/linux-2.6/xfs_ioctl.c b/fs/xfs/linux-2.6/xfs_ioctl.c
index a034cf624437..4ea1ee18aded 100644
--- a/fs/xfs/linux-2.6/xfs_ioctl.c
+++ b/fs/xfs/linux-2.6/xfs_ioctl.c
@@ -447,12 +447,12 @@ xfs_attrlist_by_handle(
447int 447int
448xfs_attrmulti_attr_get( 448xfs_attrmulti_attr_get(
449 struct inode *inode, 449 struct inode *inode,
450 char *name, 450 unsigned char *name,
451 char __user *ubuf, 451 unsigned char __user *ubuf,
452 __uint32_t *len, 452 __uint32_t *len,
453 __uint32_t flags) 453 __uint32_t flags)
454{ 454{
455 char *kbuf; 455 unsigned char *kbuf;
456 int error = EFAULT; 456 int error = EFAULT;
457 457
458 if (*len > XATTR_SIZE_MAX) 458 if (*len > XATTR_SIZE_MAX)
@@ -476,12 +476,12 @@ xfs_attrmulti_attr_get(
476int 476int
477xfs_attrmulti_attr_set( 477xfs_attrmulti_attr_set(
478 struct inode *inode, 478 struct inode *inode,
479 char *name, 479 unsigned char *name,
480 const char __user *ubuf, 480 const unsigned char __user *ubuf,
481 __uint32_t len, 481 __uint32_t len,
482 __uint32_t flags) 482 __uint32_t flags)
483{ 483{
484 char *kbuf; 484 unsigned char *kbuf;
485 int error = EFAULT; 485 int error = EFAULT;
486 486
487 if (IS_IMMUTABLE(inode) || IS_APPEND(inode)) 487 if (IS_IMMUTABLE(inode) || IS_APPEND(inode))
@@ -501,7 +501,7 @@ xfs_attrmulti_attr_set(
501int 501int
502xfs_attrmulti_attr_remove( 502xfs_attrmulti_attr_remove(
503 struct inode *inode, 503 struct inode *inode,
504 char *name, 504 unsigned char *name,
505 __uint32_t flags) 505 __uint32_t flags)
506{ 506{
507 if (IS_IMMUTABLE(inode) || IS_APPEND(inode)) 507 if (IS_IMMUTABLE(inode) || IS_APPEND(inode))
@@ -519,7 +519,7 @@ xfs_attrmulti_by_handle(
519 xfs_fsop_attrmulti_handlereq_t am_hreq; 519 xfs_fsop_attrmulti_handlereq_t am_hreq;
520 struct dentry *dentry; 520 struct dentry *dentry;
521 unsigned int i, size; 521 unsigned int i, size;
522 char *attr_name; 522 unsigned char *attr_name;
523 523
524 if (!capable(CAP_SYS_ADMIN)) 524 if (!capable(CAP_SYS_ADMIN))
525 return -XFS_ERROR(EPERM); 525 return -XFS_ERROR(EPERM);
@@ -547,7 +547,7 @@ xfs_attrmulti_by_handle(
547 547
548 error = 0; 548 error = 0;
549 for (i = 0; i < am_hreq.opcount; i++) { 549 for (i = 0; i < am_hreq.opcount; i++) {
550 ops[i].am_error = strncpy_from_user(attr_name, 550 ops[i].am_error = strncpy_from_user((char *)attr_name,
551 ops[i].am_attrname, MAXNAMELEN); 551 ops[i].am_attrname, MAXNAMELEN);
552 if (ops[i].am_error == 0 || ops[i].am_error == MAXNAMELEN) 552 if (ops[i].am_error == 0 || ops[i].am_error == MAXNAMELEN)
553 error = -ERANGE; 553 error = -ERANGE;
@@ -1431,6 +1431,9 @@ xfs_file_ioctl(
1431 if (!capable(CAP_SYS_ADMIN)) 1431 if (!capable(CAP_SYS_ADMIN))
1432 return -EPERM; 1432 return -EPERM;
1433 1433
1434 if (mp->m_flags & XFS_MOUNT_RDONLY)
1435 return -XFS_ERROR(EROFS);
1436
1434 if (copy_from_user(&inout, arg, sizeof(inout))) 1437 if (copy_from_user(&inout, arg, sizeof(inout)))
1435 return -XFS_ERROR(EFAULT); 1438 return -XFS_ERROR(EFAULT);
1436 1439
diff --git a/fs/xfs/linux-2.6/xfs_ioctl.h b/fs/xfs/linux-2.6/xfs_ioctl.h
index 7bd7c6afc1eb..d56173b34a2a 100644
--- a/fs/xfs/linux-2.6/xfs_ioctl.h
+++ b/fs/xfs/linux-2.6/xfs_ioctl.h
@@ -45,23 +45,23 @@ xfs_readlink_by_handle(
45extern int 45extern int
46xfs_attrmulti_attr_get( 46xfs_attrmulti_attr_get(
47 struct inode *inode, 47 struct inode *inode,
48 char *name, 48 unsigned char *name,
49 char __user *ubuf, 49 unsigned char __user *ubuf,
50 __uint32_t *len, 50 __uint32_t *len,
51 __uint32_t flags); 51 __uint32_t flags);
52 52
53extern int 53extern int
54 xfs_attrmulti_attr_set( 54xfs_attrmulti_attr_set(
55 struct inode *inode, 55 struct inode *inode,
56 char *name, 56 unsigned char *name,
57 const char __user *ubuf, 57 const unsigned char __user *ubuf,
58 __uint32_t len, 58 __uint32_t len,
59 __uint32_t flags); 59 __uint32_t flags);
60 60
61extern int 61extern int
62xfs_attrmulti_attr_remove( 62xfs_attrmulti_attr_remove(
63 struct inode *inode, 63 struct inode *inode,
64 char *name, 64 unsigned char *name,
65 __uint32_t flags); 65 __uint32_t flags);
66 66
67extern struct dentry * 67extern struct dentry *
diff --git a/fs/xfs/linux-2.6/xfs_ioctl32.c b/fs/xfs/linux-2.6/xfs_ioctl32.c
index be1527b1670c..0bf6d61f0528 100644
--- a/fs/xfs/linux-2.6/xfs_ioctl32.c
+++ b/fs/xfs/linux-2.6/xfs_ioctl32.c
@@ -411,7 +411,7 @@ xfs_compat_attrmulti_by_handle(
411 compat_xfs_fsop_attrmulti_handlereq_t am_hreq; 411 compat_xfs_fsop_attrmulti_handlereq_t am_hreq;
412 struct dentry *dentry; 412 struct dentry *dentry;
413 unsigned int i, size; 413 unsigned int i, size;
414 char *attr_name; 414 unsigned char *attr_name;
415 415
416 if (!capable(CAP_SYS_ADMIN)) 416 if (!capable(CAP_SYS_ADMIN))
417 return -XFS_ERROR(EPERM); 417 return -XFS_ERROR(EPERM);
@@ -440,7 +440,7 @@ xfs_compat_attrmulti_by_handle(
440 440
441 error = 0; 441 error = 0;
442 for (i = 0; i < am_hreq.opcount; i++) { 442 for (i = 0; i < am_hreq.opcount; i++) {
443 ops[i].am_error = strncpy_from_user(attr_name, 443 ops[i].am_error = strncpy_from_user((char *)attr_name,
444 compat_ptr(ops[i].am_attrname), 444 compat_ptr(ops[i].am_attrname),
445 MAXNAMELEN); 445 MAXNAMELEN);
446 if (ops[i].am_error == 0 || ops[i].am_error == MAXNAMELEN) 446 if (ops[i].am_error == 0 || ops[i].am_error == MAXNAMELEN)
diff --git a/fs/xfs/linux-2.6/xfs_iops.c b/fs/xfs/linux-2.6/xfs_iops.c
index 225946012d0b..e8566bbf0f00 100644
--- a/fs/xfs/linux-2.6/xfs_iops.c
+++ b/fs/xfs/linux-2.6/xfs_iops.c
@@ -140,10 +140,10 @@ xfs_init_security(
140 struct xfs_inode *ip = XFS_I(inode); 140 struct xfs_inode *ip = XFS_I(inode);
141 size_t length; 141 size_t length;
142 void *value; 142 void *value;
143 char *name; 143 unsigned char *name;
144 int error; 144 int error;
145 145
146 error = security_inode_init_security(inode, dir, &name, 146 error = security_inode_init_security(inode, dir, (char **)&name,
147 &value, &length); 147 &value, &length);
148 if (error) { 148 if (error) {
149 if (error == -EOPNOTSUPP) 149 if (error == -EOPNOTSUPP)
diff --git a/fs/xfs/linux-2.6/xfs_lrw.c b/fs/xfs/linux-2.6/xfs_lrw.c
index 0d32457abef1..eac6f80d786d 100644
--- a/fs/xfs/linux-2.6/xfs_lrw.c
+++ b/fs/xfs/linux-2.6/xfs_lrw.c
@@ -630,18 +630,9 @@ start:
630 * by root. This keeps people from modifying setuid and 630 * by root. This keeps people from modifying setuid and
631 * setgid binaries. 631 * setgid binaries.
632 */ 632 */
633 633 error = -file_remove_suid(file);
634 if (((xip->i_d.di_mode & S_ISUID) || 634 if (unlikely(error))
635 ((xip->i_d.di_mode & (S_ISGID | S_IXGRP)) == 635 goto out_unlock_internal;
636 (S_ISGID | S_IXGRP))) &&
637 !capable(CAP_FSETID)) {
638 error = xfs_write_clear_setuid(xip);
639 if (likely(!error))
640 error = -file_remove_suid(file);
641 if (unlikely(error)) {
642 goto out_unlock_internal;
643 }
644 }
645 636
646 /* We can write back this queue in page reclaim */ 637 /* We can write back this queue in page reclaim */
647 current->backing_dev_info = mapping->backing_dev_info; 638 current->backing_dev_info = mapping->backing_dev_info;
@@ -784,53 +775,6 @@ write_retry:
784} 775}
785 776
786/* 777/*
787 * All xfs metadata buffers except log state machine buffers
788 * get this attached as their b_bdstrat callback function.
789 * This is so that we can catch a buffer
790 * after prematurely unpinning it to forcibly shutdown the filesystem.
791 */
792int
793xfs_bdstrat_cb(struct xfs_buf *bp)
794{
795 if (XFS_FORCED_SHUTDOWN(bp->b_mount)) {
796 trace_xfs_bdstrat_shut(bp, _RET_IP_);
797 /*
798 * Metadata write that didn't get logged but
799 * written delayed anyway. These aren't associated
800 * with a transaction, and can be ignored.
801 */
802 if (XFS_BUF_IODONE_FUNC(bp) == NULL &&
803 (XFS_BUF_ISREAD(bp)) == 0)
804 return (xfs_bioerror_relse(bp));
805 else
806 return (xfs_bioerror(bp));
807 }
808
809 xfs_buf_iorequest(bp);
810 return 0;
811}
812
813/*
814 * Wrapper around bdstrat so that we can stop data from going to disk in case
815 * we are shutting down the filesystem. Typically user data goes thru this
816 * path; one of the exceptions is the superblock.
817 */
818void
819xfsbdstrat(
820 struct xfs_mount *mp,
821 struct xfs_buf *bp)
822{
823 ASSERT(mp);
824 if (!XFS_FORCED_SHUTDOWN(mp)) {
825 xfs_buf_iorequest(bp);
826 return;
827 }
828
829 trace_xfs_bdstrat_shut(bp, _RET_IP_);
830 xfs_bioerror_relse(bp);
831}
832
833/*
834 * If the underlying (data/log/rt) device is readonly, there are some 778 * If the underlying (data/log/rt) device is readonly, there are some
835 * operations that cannot proceed. 779 * operations that cannot proceed.
836 */ 780 */
diff --git a/fs/xfs/linux-2.6/xfs_lrw.h b/fs/xfs/linux-2.6/xfs_lrw.h
index d1f7789c7ffb..342ae8c0d011 100644
--- a/fs/xfs/linux-2.6/xfs_lrw.h
+++ b/fs/xfs/linux-2.6/xfs_lrw.h
@@ -22,9 +22,6 @@ struct xfs_mount;
22struct xfs_inode; 22struct xfs_inode;
23struct xfs_buf; 23struct xfs_buf;
24 24
25/* errors from xfsbdstrat() must be extracted from the buffer */
26extern void xfsbdstrat(struct xfs_mount *, struct xfs_buf *);
27extern int xfs_bdstrat_cb(struct xfs_buf *);
28extern int xfs_dev_is_read_only(struct xfs_mount *, char *); 25extern int xfs_dev_is_read_only(struct xfs_mount *, char *);
29 26
30extern int xfs_zero_eof(struct xfs_inode *, xfs_off_t, xfs_fsize_t); 27extern int xfs_zero_eof(struct xfs_inode *, xfs_off_t, xfs_fsize_t);
diff --git a/fs/xfs/linux-2.6/xfs_super.c b/fs/xfs/linux-2.6/xfs_super.c
index 77414db10dc2..25ea2408118f 100644
--- a/fs/xfs/linux-2.6/xfs_super.c
+++ b/fs/xfs/linux-2.6/xfs_super.c
@@ -877,12 +877,11 @@ xfsaild(
877{ 877{
878 struct xfs_ail *ailp = data; 878 struct xfs_ail *ailp = data;
879 xfs_lsn_t last_pushed_lsn = 0; 879 xfs_lsn_t last_pushed_lsn = 0;
880 long tout = 0; 880 long tout = 0; /* milliseconds */
881 881
882 while (!kthread_should_stop()) { 882 while (!kthread_should_stop()) {
883 if (tout) 883 schedule_timeout_interruptible(tout ?
884 schedule_timeout_interruptible(msecs_to_jiffies(tout)); 884 msecs_to_jiffies(tout) : MAX_SCHEDULE_TIMEOUT);
885 tout = 1000;
886 885
887 /* swsusp */ 886 /* swsusp */
888 try_to_freeze(); 887 try_to_freeze();
@@ -1022,12 +1021,45 @@ xfs_fs_dirty_inode(
1022 XFS_I(inode)->i_update_core = 1; 1021 XFS_I(inode)->i_update_core = 1;
1023} 1022}
1024 1023
1025/* 1024STATIC int
1026 * Attempt to flush the inode, this will actually fail 1025xfs_log_inode(
1027 * if the inode is pinned, but we dirty the inode again 1026 struct xfs_inode *ip)
1028 * at the point when it is unpinned after a log write, 1027{
1029 * since this is when the inode itself becomes flushable. 1028 struct xfs_mount *mp = ip->i_mount;
1030 */ 1029 struct xfs_trans *tp;
1030 int error;
1031
1032 xfs_iunlock(ip, XFS_ILOCK_SHARED);
1033 tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS);
1034 error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0);
1035
1036 if (error) {
1037 xfs_trans_cancel(tp, 0);
1038 /* we need to return with the lock hold shared */
1039 xfs_ilock(ip, XFS_ILOCK_SHARED);
1040 return error;
1041 }
1042
1043 xfs_ilock(ip, XFS_ILOCK_EXCL);
1044
1045 /*
1046 * Note - it's possible that we might have pushed ourselves out of the
1047 * way during trans_reserve which would flush the inode. But there's
1048 * no guarantee that the inode buffer has actually gone out yet (it's
1049 * delwri). Plus the buffer could be pinned anyway if it's part of
1050 * an inode in another recent transaction. So we play it safe and
1051 * fire off the transaction anyway.
1052 */
1053 xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL);
1054 xfs_trans_ihold(tp, ip);
1055 xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
1056 xfs_trans_set_sync(tp);
1057 error = xfs_trans_commit(tp, 0);
1058 xfs_ilock_demote(ip, XFS_ILOCK_EXCL);
1059
1060 return error;
1061}
1062
1031STATIC int 1063STATIC int
1032xfs_fs_write_inode( 1064xfs_fs_write_inode(
1033 struct inode *inode, 1065 struct inode *inode,
@@ -1035,7 +1067,7 @@ xfs_fs_write_inode(
1035{ 1067{
1036 struct xfs_inode *ip = XFS_I(inode); 1068 struct xfs_inode *ip = XFS_I(inode);
1037 struct xfs_mount *mp = ip->i_mount; 1069 struct xfs_mount *mp = ip->i_mount;
1038 int error = 0; 1070 int error = EAGAIN;
1039 1071
1040 xfs_itrace_entry(ip); 1072 xfs_itrace_entry(ip);
1041 1073
@@ -1046,35 +1078,55 @@ xfs_fs_write_inode(
1046 error = xfs_wait_on_pages(ip, 0, -1); 1078 error = xfs_wait_on_pages(ip, 0, -1);
1047 if (error) 1079 if (error)
1048 goto out; 1080 goto out;
1049 }
1050
1051 /*
1052 * Bypass inodes which have already been cleaned by
1053 * the inode flush clustering code inside xfs_iflush
1054 */
1055 if (xfs_inode_clean(ip))
1056 goto out;
1057 1081
1058 /* 1082 /*
1059 * We make this non-blocking if the inode is contended, return 1083 * Make sure the inode has hit stable storage. By using the
1060 * EAGAIN to indicate to the caller that they did not succeed. 1084 * log and the fsync transactions we reduce the IOs we have
1061 * This prevents the flush path from blocking on inodes inside 1085 * to do here from two (log and inode) to just the log.
1062 * another operation right now, they get caught later by xfs_sync. 1086 *
1063 */ 1087 * Note: We still need to do a delwri write of the inode after
1064 if (sync) { 1088 * this to flush it to the backing buffer so that bulkstat
1089 * works properly if this is the first time the inode has been
1090 * written. Because we hold the ilock atomically over the
1091 * transaction commit and the inode flush we are guaranteed
1092 * that the inode is not pinned when it returns. If the flush
1093 * lock is already held, then the inode has already been
1094 * flushed once and we don't need to flush it again. Hence
1095 * the code will only flush the inode if it isn't already
1096 * being flushed.
1097 */
1065 xfs_ilock(ip, XFS_ILOCK_SHARED); 1098 xfs_ilock(ip, XFS_ILOCK_SHARED);
1066 xfs_iflock(ip); 1099 if (ip->i_update_core) {
1067 1100 error = xfs_log_inode(ip);
1068 error = xfs_iflush(ip, XFS_IFLUSH_SYNC); 1101 if (error)
1102 goto out_unlock;
1103 }
1069 } else { 1104 } else {
1070 error = EAGAIN; 1105 /*
1106 * We make this non-blocking if the inode is contended, return
1107 * EAGAIN to indicate to the caller that they did not succeed.
1108 * This prevents the flush path from blocking on inodes inside
1109 * another operation right now, they get caught later by xfs_sync.
1110 */
1071 if (!xfs_ilock_nowait(ip, XFS_ILOCK_SHARED)) 1111 if (!xfs_ilock_nowait(ip, XFS_ILOCK_SHARED))
1072 goto out; 1112 goto out;
1073 if (xfs_ipincount(ip) || !xfs_iflock_nowait(ip)) 1113 }
1074 goto out_unlock;
1075 1114
1076 error = xfs_iflush(ip, XFS_IFLUSH_ASYNC_NOBLOCK); 1115 if (xfs_ipincount(ip) || !xfs_iflock_nowait(ip))
1116 goto out_unlock;
1117
1118 /*
1119 * Now we have the flush lock and the inode is not pinned, we can check
1120 * if the inode is really clean as we know that there are no pending
1121 * transaction completions, it is not waiting on the delayed write
1122 * queue and there is no IO in progress.
1123 */
1124 if (xfs_inode_clean(ip)) {
1125 xfs_ifunlock(ip);
1126 error = 0;
1127 goto out_unlock;
1077 } 1128 }
1129 error = xfs_iflush(ip, 0);
1078 1130
1079 out_unlock: 1131 out_unlock:
1080 xfs_iunlock(ip, XFS_ILOCK_SHARED); 1132 xfs_iunlock(ip, XFS_ILOCK_SHARED);
@@ -1257,6 +1309,29 @@ xfs_fs_statfs(
1257 return 0; 1309 return 0;
1258} 1310}
1259 1311
1312STATIC void
1313xfs_save_resvblks(struct xfs_mount *mp)
1314{
1315 __uint64_t resblks = 0;
1316
1317 mp->m_resblks_save = mp->m_resblks;
1318 xfs_reserve_blocks(mp, &resblks, NULL);
1319}
1320
1321STATIC void
1322xfs_restore_resvblks(struct xfs_mount *mp)
1323{
1324 __uint64_t resblks;
1325
1326 if (mp->m_resblks_save) {
1327 resblks = mp->m_resblks_save;
1328 mp->m_resblks_save = 0;
1329 } else
1330 resblks = xfs_default_resblks(mp);
1331
1332 xfs_reserve_blocks(mp, &resblks, NULL);
1333}
1334
1260STATIC int 1335STATIC int
1261xfs_fs_remount( 1336xfs_fs_remount(
1262 struct super_block *sb, 1337 struct super_block *sb,
@@ -1336,11 +1411,27 @@ xfs_fs_remount(
1336 } 1411 }
1337 mp->m_update_flags = 0; 1412 mp->m_update_flags = 0;
1338 } 1413 }
1414
1415 /*
1416 * Fill out the reserve pool if it is empty. Use the stashed
1417 * value if it is non-zero, otherwise go with the default.
1418 */
1419 xfs_restore_resvblks(mp);
1339 } 1420 }
1340 1421
1341 /* rw -> ro */ 1422 /* rw -> ro */
1342 if (!(mp->m_flags & XFS_MOUNT_RDONLY) && (*flags & MS_RDONLY)) { 1423 if (!(mp->m_flags & XFS_MOUNT_RDONLY) && (*flags & MS_RDONLY)) {
1424 /*
1425 * After we have synced the data but before we sync the
1426 * metadata, we need to free up the reserve block pool so that
1427 * the used block count in the superblock on disk is correct at
1428 * the end of the remount. Stash the current reserve pool size
1429 * so that if we get remounted rw, we can return it to the same
1430 * size.
1431 */
1432
1343 xfs_quiesce_data(mp); 1433 xfs_quiesce_data(mp);
1434 xfs_save_resvblks(mp);
1344 xfs_quiesce_attr(mp); 1435 xfs_quiesce_attr(mp);
1345 mp->m_flags |= XFS_MOUNT_RDONLY; 1436 mp->m_flags |= XFS_MOUNT_RDONLY;
1346 } 1437 }
@@ -1359,11 +1450,22 @@ xfs_fs_freeze(
1359{ 1450{
1360 struct xfs_mount *mp = XFS_M(sb); 1451 struct xfs_mount *mp = XFS_M(sb);
1361 1452
1453 xfs_save_resvblks(mp);
1362 xfs_quiesce_attr(mp); 1454 xfs_quiesce_attr(mp);
1363 return -xfs_fs_log_dummy(mp); 1455 return -xfs_fs_log_dummy(mp);
1364} 1456}
1365 1457
1366STATIC int 1458STATIC int
1459xfs_fs_unfreeze(
1460 struct super_block *sb)
1461{
1462 struct xfs_mount *mp = XFS_M(sb);
1463
1464 xfs_restore_resvblks(mp);
1465 return 0;
1466}
1467
1468STATIC int
1367xfs_fs_show_options( 1469xfs_fs_show_options(
1368 struct seq_file *m, 1470 struct seq_file *m,
1369 struct vfsmount *mnt) 1471 struct vfsmount *mnt)
@@ -1585,6 +1687,7 @@ static const struct super_operations xfs_super_operations = {
1585 .put_super = xfs_fs_put_super, 1687 .put_super = xfs_fs_put_super,
1586 .sync_fs = xfs_fs_sync_fs, 1688 .sync_fs = xfs_fs_sync_fs,
1587 .freeze_fs = xfs_fs_freeze, 1689 .freeze_fs = xfs_fs_freeze,
1690 .unfreeze_fs = xfs_fs_unfreeze,
1588 .statfs = xfs_fs_statfs, 1691 .statfs = xfs_fs_statfs,
1589 .remount_fs = xfs_fs_remount, 1692 .remount_fs = xfs_fs_remount,
1590 .show_options = xfs_fs_show_options, 1693 .show_options = xfs_fs_show_options,
diff --git a/fs/xfs/linux-2.6/xfs_sync.c b/fs/xfs/linux-2.6/xfs_sync.c
index 1f5e4bb5e970..a9f6d20aff41 100644
--- a/fs/xfs/linux-2.6/xfs_sync.c
+++ b/fs/xfs/linux-2.6/xfs_sync.c
@@ -90,14 +90,13 @@ xfs_inode_ag_lookup(
90STATIC int 90STATIC int
91xfs_inode_ag_walk( 91xfs_inode_ag_walk(
92 struct xfs_mount *mp, 92 struct xfs_mount *mp,
93 xfs_agnumber_t ag, 93 struct xfs_perag *pag,
94 int (*execute)(struct xfs_inode *ip, 94 int (*execute)(struct xfs_inode *ip,
95 struct xfs_perag *pag, int flags), 95 struct xfs_perag *pag, int flags),
96 int flags, 96 int flags,
97 int tag, 97 int tag,
98 int exclusive) 98 int exclusive)
99{ 99{
100 struct xfs_perag *pag = &mp->m_perag[ag];
101 uint32_t first_index; 100 uint32_t first_index;
102 int last_error = 0; 101 int last_error = 0;
103 int skipped; 102 int skipped;
@@ -141,8 +140,6 @@ restart:
141 delay(1); 140 delay(1);
142 goto restart; 141 goto restart;
143 } 142 }
144
145 xfs_put_perag(mp, pag);
146 return last_error; 143 return last_error;
147} 144}
148 145
@@ -160,10 +157,16 @@ xfs_inode_ag_iterator(
160 xfs_agnumber_t ag; 157 xfs_agnumber_t ag;
161 158
162 for (ag = 0; ag < mp->m_sb.sb_agcount; ag++) { 159 for (ag = 0; ag < mp->m_sb.sb_agcount; ag++) {
163 if (!mp->m_perag[ag].pag_ici_init) 160 struct xfs_perag *pag;
161
162 pag = xfs_perag_get(mp, ag);
163 if (!pag->pag_ici_init) {
164 xfs_perag_put(pag);
164 continue; 165 continue;
165 error = xfs_inode_ag_walk(mp, ag, execute, flags, tag, 166 }
167 error = xfs_inode_ag_walk(mp, pag, execute, flags, tag,
166 exclusive); 168 exclusive);
169 xfs_perag_put(pag);
167 if (error) { 170 if (error) {
168 last_error = error; 171 last_error = error;
169 if (error == EFSCORRUPTED) 172 if (error == EFSCORRUPTED)
@@ -231,7 +234,7 @@ xfs_sync_inode_data(
231 } 234 }
232 235
233 error = xfs_flush_pages(ip, 0, -1, (flags & SYNC_WAIT) ? 236 error = xfs_flush_pages(ip, 0, -1, (flags & SYNC_WAIT) ?
234 0 : XFS_B_ASYNC, FI_NONE); 237 0 : XBF_ASYNC, FI_NONE);
235 xfs_iunlock(ip, XFS_IOLOCK_SHARED); 238 xfs_iunlock(ip, XFS_IOLOCK_SHARED);
236 239
237 out_wait: 240 out_wait:
@@ -267,8 +270,7 @@ xfs_sync_inode_attr(
267 goto out_unlock; 270 goto out_unlock;
268 } 271 }
269 272
270 error = xfs_iflush(ip, (flags & SYNC_WAIT) ? 273 error = xfs_iflush(ip, flags);
271 XFS_IFLUSH_SYNC : XFS_IFLUSH_DELWRI);
272 274
273 out_unlock: 275 out_unlock:
274 xfs_iunlock(ip, XFS_ILOCK_SHARED); 276 xfs_iunlock(ip, XFS_ILOCK_SHARED);
@@ -293,10 +295,7 @@ xfs_sync_data(
293 if (error) 295 if (error)
294 return XFS_ERROR(error); 296 return XFS_ERROR(error);
295 297
296 xfs_log_force(mp, 0, 298 xfs_log_force(mp, (flags & SYNC_WAIT) ? XFS_LOG_SYNC : 0);
297 (flags & SYNC_WAIT) ?
298 XFS_LOG_FORCE | XFS_LOG_SYNC :
299 XFS_LOG_FORCE);
300 return 0; 299 return 0;
301} 300}
302 301
@@ -322,10 +321,6 @@ xfs_commit_dummy_trans(
322 struct xfs_inode *ip = mp->m_rootip; 321 struct xfs_inode *ip = mp->m_rootip;
323 struct xfs_trans *tp; 322 struct xfs_trans *tp;
324 int error; 323 int error;
325 int log_flags = XFS_LOG_FORCE;
326
327 if (flags & SYNC_WAIT)
328 log_flags |= XFS_LOG_SYNC;
329 324
330 /* 325 /*
331 * Put a dummy transaction in the log to tell recovery 326 * Put a dummy transaction in the log to tell recovery
@@ -347,11 +342,11 @@ xfs_commit_dummy_trans(
347 xfs_iunlock(ip, XFS_ILOCK_EXCL); 342 xfs_iunlock(ip, XFS_ILOCK_EXCL);
348 343
349 /* the log force ensures this transaction is pushed to disk */ 344 /* the log force ensures this transaction is pushed to disk */
350 xfs_log_force(mp, 0, log_flags); 345 xfs_log_force(mp, (flags & SYNC_WAIT) ? XFS_LOG_SYNC : 0);
351 return error; 346 return error;
352} 347}
353 348
354int 349STATIC int
355xfs_sync_fsdata( 350xfs_sync_fsdata(
356 struct xfs_mount *mp, 351 struct xfs_mount *mp,
357 int flags) 352 int flags)
@@ -367,7 +362,7 @@ xfs_sync_fsdata(
367 if (flags & SYNC_TRYLOCK) { 362 if (flags & SYNC_TRYLOCK) {
368 ASSERT(!(flags & SYNC_WAIT)); 363 ASSERT(!(flags & SYNC_WAIT));
369 364
370 bp = xfs_getsb(mp, XFS_BUF_TRYLOCK); 365 bp = xfs_getsb(mp, XBF_TRYLOCK);
371 if (!bp) 366 if (!bp)
372 goto out; 367 goto out;
373 368
@@ -387,7 +382,7 @@ xfs_sync_fsdata(
387 * become pinned in between there and here. 382 * become pinned in between there and here.
388 */ 383 */
389 if (XFS_BUF_ISPINNED(bp)) 384 if (XFS_BUF_ISPINNED(bp))
390 xfs_log_force(mp, 0, XFS_LOG_FORCE); 385 xfs_log_force(mp, 0);
391 } 386 }
392 387
393 388
@@ -448,9 +443,6 @@ xfs_quiesce_data(
448 xfs_sync_data(mp, SYNC_WAIT); 443 xfs_sync_data(mp, SYNC_WAIT);
449 xfs_qm_sync(mp, SYNC_WAIT); 444 xfs_qm_sync(mp, SYNC_WAIT);
450 445
451 /* drop inode references pinned by filestreams */
452 xfs_filestream_flush(mp);
453
454 /* write superblock and hoover up shutdown errors */ 446 /* write superblock and hoover up shutdown errors */
455 error = xfs_sync_fsdata(mp, SYNC_WAIT); 447 error = xfs_sync_fsdata(mp, SYNC_WAIT);
456 448
@@ -467,16 +459,18 @@ xfs_quiesce_fs(
467{ 459{
468 int count = 0, pincount; 460 int count = 0, pincount;
469 461
462 xfs_reclaim_inodes(mp, 0);
470 xfs_flush_buftarg(mp->m_ddev_targp, 0); 463 xfs_flush_buftarg(mp->m_ddev_targp, 0);
471 xfs_reclaim_inodes(mp, XFS_IFLUSH_DELWRI_ELSE_ASYNC);
472 464
473 /* 465 /*
474 * This loop must run at least twice. The first instance of the loop 466 * This loop must run at least twice. The first instance of the loop
475 * will flush most meta data but that will generate more meta data 467 * will flush most meta data but that will generate more meta data
476 * (typically directory updates). Which then must be flushed and 468 * (typically directory updates). Which then must be flushed and
477 * logged before we can write the unmount record. 469 * logged before we can write the unmount record. We also so sync
470 * reclaim of inodes to catch any that the above delwri flush skipped.
478 */ 471 */
479 do { 472 do {
473 xfs_reclaim_inodes(mp, SYNC_WAIT);
480 xfs_sync_attr(mp, SYNC_WAIT); 474 xfs_sync_attr(mp, SYNC_WAIT);
481 pincount = xfs_flush_buftarg(mp->m_ddev_targp, 1); 475 pincount = xfs_flush_buftarg(mp->m_ddev_targp, 1);
482 if (!pincount) { 476 if (!pincount) {
@@ -575,7 +569,7 @@ xfs_flush_inodes(
575 igrab(inode); 569 igrab(inode);
576 xfs_syncd_queue_work(ip->i_mount, inode, xfs_flush_inodes_work, &completion); 570 xfs_syncd_queue_work(ip->i_mount, inode, xfs_flush_inodes_work, &completion);
577 wait_for_completion(&completion); 571 wait_for_completion(&completion);
578 xfs_log_force(ip->i_mount, (xfs_lsn_t)0, XFS_LOG_FORCE|XFS_LOG_SYNC); 572 xfs_log_force(ip->i_mount, XFS_LOG_SYNC);
579} 573}
580 574
581/* 575/*
@@ -591,8 +585,8 @@ xfs_sync_worker(
591 int error; 585 int error;
592 586
593 if (!(mp->m_flags & XFS_MOUNT_RDONLY)) { 587 if (!(mp->m_flags & XFS_MOUNT_RDONLY)) {
594 xfs_log_force(mp, (xfs_lsn_t)0, XFS_LOG_FORCE); 588 xfs_log_force(mp, 0);
595 xfs_reclaim_inodes(mp, XFS_IFLUSH_DELWRI_ELSE_ASYNC); 589 xfs_reclaim_inodes(mp, 0);
596 /* dgc: errors ignored here */ 590 /* dgc: errors ignored here */
597 error = xfs_qm_sync(mp, SYNC_TRYLOCK); 591 error = xfs_qm_sync(mp, SYNC_TRYLOCK);
598 error = xfs_sync_fsdata(mp, SYNC_TRYLOCK); 592 error = xfs_sync_fsdata(mp, SYNC_TRYLOCK);
@@ -690,16 +684,17 @@ void
690xfs_inode_set_reclaim_tag( 684xfs_inode_set_reclaim_tag(
691 xfs_inode_t *ip) 685 xfs_inode_t *ip)
692{ 686{
693 xfs_mount_t *mp = ip->i_mount; 687 struct xfs_mount *mp = ip->i_mount;
694 xfs_perag_t *pag = xfs_get_perag(mp, ip->i_ino); 688 struct xfs_perag *pag;
695 689
690 pag = xfs_perag_get(mp, XFS_INO_TO_AGNO(mp, ip->i_ino));
696 read_lock(&pag->pag_ici_lock); 691 read_lock(&pag->pag_ici_lock);
697 spin_lock(&ip->i_flags_lock); 692 spin_lock(&ip->i_flags_lock);
698 __xfs_inode_set_reclaim_tag(pag, ip); 693 __xfs_inode_set_reclaim_tag(pag, ip);
699 __xfs_iflags_set(ip, XFS_IRECLAIMABLE); 694 __xfs_iflags_set(ip, XFS_IRECLAIMABLE);
700 spin_unlock(&ip->i_flags_lock); 695 spin_unlock(&ip->i_flags_lock);
701 read_unlock(&pag->pag_ici_lock); 696 read_unlock(&pag->pag_ici_lock);
702 xfs_put_perag(mp, pag); 697 xfs_perag_put(pag);
703} 698}
704 699
705void 700void
@@ -712,12 +707,64 @@ __xfs_inode_clear_reclaim_tag(
712 XFS_INO_TO_AGINO(mp, ip->i_ino), XFS_ICI_RECLAIM_TAG); 707 XFS_INO_TO_AGINO(mp, ip->i_ino), XFS_ICI_RECLAIM_TAG);
713} 708}
714 709
710/*
711 * Inodes in different states need to be treated differently, and the return
712 * value of xfs_iflush is not sufficient to get this right. The following table
713 * lists the inode states and the reclaim actions necessary for non-blocking
714 * reclaim:
715 *
716 *
717 * inode state iflush ret required action
718 * --------------- ---------- ---------------
719 * bad - reclaim
720 * shutdown EIO unpin and reclaim
721 * clean, unpinned 0 reclaim
722 * stale, unpinned 0 reclaim
723 * clean, pinned(*) 0 requeue
724 * stale, pinned EAGAIN requeue
725 * dirty, delwri ok 0 requeue
726 * dirty, delwri blocked EAGAIN requeue
727 * dirty, sync flush 0 reclaim
728 *
729 * (*) dgc: I don't think the clean, pinned state is possible but it gets
730 * handled anyway given the order of checks implemented.
731 *
732 * As can be seen from the table, the return value of xfs_iflush() is not
733 * sufficient to correctly decide the reclaim action here. The checks in
734 * xfs_iflush() might look like duplicates, but they are not.
735 *
736 * Also, because we get the flush lock first, we know that any inode that has
737 * been flushed delwri has had the flush completed by the time we check that
738 * the inode is clean. The clean inode check needs to be done before flushing
739 * the inode delwri otherwise we would loop forever requeuing clean inodes as
740 * we cannot tell apart a successful delwri flush and a clean inode from the
741 * return value of xfs_iflush().
742 *
743 * Note that because the inode is flushed delayed write by background
744 * writeback, the flush lock may already be held here and waiting on it can
745 * result in very long latencies. Hence for sync reclaims, where we wait on the
746 * flush lock, the caller should push out delayed write inodes first before
747 * trying to reclaim them to minimise the amount of time spent waiting. For
748 * background relaim, we just requeue the inode for the next pass.
749 *
750 * Hence the order of actions after gaining the locks should be:
751 * bad => reclaim
752 * shutdown => unpin and reclaim
753 * pinned, delwri => requeue
754 * pinned, sync => unpin
755 * stale => reclaim
756 * clean => reclaim
757 * dirty, delwri => flush and requeue
758 * dirty, sync => flush, wait and reclaim
759 */
715STATIC int 760STATIC int
716xfs_reclaim_inode( 761xfs_reclaim_inode(
717 struct xfs_inode *ip, 762 struct xfs_inode *ip,
718 struct xfs_perag *pag, 763 struct xfs_perag *pag,
719 int sync_mode) 764 int sync_mode)
720{ 765{
766 int error = 0;
767
721 /* 768 /*
722 * The radix tree lock here protects a thread in xfs_iget from racing 769 * The radix tree lock here protects a thread in xfs_iget from racing
723 * with us starting reclaim on the inode. Once we have the 770 * with us starting reclaim on the inode. Once we have the
@@ -735,33 +782,70 @@ xfs_reclaim_inode(
735 spin_unlock(&ip->i_flags_lock); 782 spin_unlock(&ip->i_flags_lock);
736 write_unlock(&pag->pag_ici_lock); 783 write_unlock(&pag->pag_ici_lock);
737 784
738 /*
739 * If the inode is still dirty, then flush it out. If the inode
740 * is not in the AIL, then it will be OK to flush it delwri as
741 * long as xfs_iflush() does not keep any references to the inode.
742 * We leave that decision up to xfs_iflush() since it has the
743 * knowledge of whether it's OK to simply do a delwri flush of
744 * the inode or whether we need to wait until the inode is
745 * pulled from the AIL.
746 * We get the flush lock regardless, though, just to make sure
747 * we don't free it while it is being flushed.
748 */
749 xfs_ilock(ip, XFS_ILOCK_EXCL); 785 xfs_ilock(ip, XFS_ILOCK_EXCL);
750 xfs_iflock(ip); 786 if (!xfs_iflock_nowait(ip)) {
787 if (!(sync_mode & SYNC_WAIT))
788 goto out;
789 xfs_iflock(ip);
790 }
791
792 if (is_bad_inode(VFS_I(ip)))
793 goto reclaim;
794 if (XFS_FORCED_SHUTDOWN(ip->i_mount)) {
795 xfs_iunpin_wait(ip);
796 goto reclaim;
797 }
798 if (xfs_ipincount(ip)) {
799 if (!(sync_mode & SYNC_WAIT)) {
800 xfs_ifunlock(ip);
801 goto out;
802 }
803 xfs_iunpin_wait(ip);
804 }
805 if (xfs_iflags_test(ip, XFS_ISTALE))
806 goto reclaim;
807 if (xfs_inode_clean(ip))
808 goto reclaim;
809
810 /* Now we have an inode that needs flushing */
811 error = xfs_iflush(ip, sync_mode);
812 if (sync_mode & SYNC_WAIT) {
813 xfs_iflock(ip);
814 goto reclaim;
815 }
751 816
752 /* 817 /*
753 * In the case of a forced shutdown we rely on xfs_iflush() to 818 * When we have to flush an inode but don't have SYNC_WAIT set, we
754 * wait for the inode to be unpinned before returning an error. 819 * flush the inode out using a delwri buffer and wait for the next
820 * call into reclaim to find it in a clean state instead of waiting for
821 * it now. We also don't return errors here - if the error is transient
822 * then the next reclaim pass will flush the inode, and if the error
823 * is permanent then the next sync reclaim will relcaim the inode and
824 * pass on the error.
755 */ 825 */
756 if (!is_bad_inode(VFS_I(ip)) && xfs_iflush(ip, sync_mode) == 0) { 826 if (error && !XFS_FORCED_SHUTDOWN(ip->i_mount)) {
757 /* synchronize with xfs_iflush_done */ 827 xfs_fs_cmn_err(CE_WARN, ip->i_mount,
758 xfs_iflock(ip); 828 "inode 0x%llx background reclaim flush failed with %d",
759 xfs_ifunlock(ip); 829 (long long)ip->i_ino, error);
760 } 830 }
831out:
832 xfs_iflags_clear(ip, XFS_IRECLAIM);
833 xfs_iunlock(ip, XFS_ILOCK_EXCL);
834 /*
835 * We could return EAGAIN here to make reclaim rescan the inode tree in
836 * a short while. However, this just burns CPU time scanning the tree
837 * waiting for IO to complete and xfssyncd never goes back to the idle
838 * state. Instead, return 0 to let the next scheduled background reclaim
839 * attempt to reclaim the inode again.
840 */
841 return 0;
761 842
843reclaim:
844 xfs_ifunlock(ip);
762 xfs_iunlock(ip, XFS_ILOCK_EXCL); 845 xfs_iunlock(ip, XFS_ILOCK_EXCL);
763 xfs_ireclaim(ip); 846 xfs_ireclaim(ip);
764 return 0; 847 return error;
848
765} 849}
766 850
767int 851int
diff --git a/fs/xfs/linux-2.6/xfs_sync.h b/fs/xfs/linux-2.6/xfs_sync.h
index ea932b43335d..d480c346cabb 100644
--- a/fs/xfs/linux-2.6/xfs_sync.h
+++ b/fs/xfs/linux-2.6/xfs_sync.h
@@ -37,7 +37,6 @@ void xfs_syncd_stop(struct xfs_mount *mp);
37 37
38int xfs_sync_attr(struct xfs_mount *mp, int flags); 38int xfs_sync_attr(struct xfs_mount *mp, int flags);
39int xfs_sync_data(struct xfs_mount *mp, int flags); 39int xfs_sync_data(struct xfs_mount *mp, int flags);
40int xfs_sync_fsdata(struct xfs_mount *mp, int flags);
41 40
42int xfs_quiesce_data(struct xfs_mount *mp); 41int xfs_quiesce_data(struct xfs_mount *mp);
43void xfs_quiesce_attr(struct xfs_mount *mp); 42void xfs_quiesce_attr(struct xfs_mount *mp);
diff --git a/fs/xfs/linux-2.6/xfs_trace.h b/fs/xfs/linux-2.6/xfs_trace.h
index c22a608321a3..a4574dcf5065 100644
--- a/fs/xfs/linux-2.6/xfs_trace.h
+++ b/fs/xfs/linux-2.6/xfs_trace.h
@@ -78,6 +78,33 @@ DECLARE_EVENT_CLASS(xfs_attr_list_class,
78 ) 78 )
79) 79)
80 80
81#define DEFINE_PERAG_REF_EVENT(name) \
82TRACE_EVENT(name, \
83 TP_PROTO(struct xfs_mount *mp, xfs_agnumber_t agno, int refcount, \
84 unsigned long caller_ip), \
85 TP_ARGS(mp, agno, refcount, caller_ip), \
86 TP_STRUCT__entry( \
87 __field(dev_t, dev) \
88 __field(xfs_agnumber_t, agno) \
89 __field(int, refcount) \
90 __field(unsigned long, caller_ip) \
91 ), \
92 TP_fast_assign( \
93 __entry->dev = mp->m_super->s_dev; \
94 __entry->agno = agno; \
95 __entry->refcount = refcount; \
96 __entry->caller_ip = caller_ip; \
97 ), \
98 TP_printk("dev %d:%d agno %u refcount %d caller %pf", \
99 MAJOR(__entry->dev), MINOR(__entry->dev), \
100 __entry->agno, \
101 __entry->refcount, \
102 (char *)__entry->caller_ip) \
103);
104
105DEFINE_PERAG_REF_EVENT(xfs_perag_get)
106DEFINE_PERAG_REF_EVENT(xfs_perag_put)
107
81#define DEFINE_ATTR_LIST_EVENT(name) \ 108#define DEFINE_ATTR_LIST_EVENT(name) \
82DEFINE_EVENT(xfs_attr_list_class, name, \ 109DEFINE_EVENT(xfs_attr_list_class, name, \
83 TP_PROTO(struct xfs_attr_list_context *ctx), \ 110 TP_PROTO(struct xfs_attr_list_context *ctx), \
@@ -456,6 +483,7 @@ DEFINE_BUF_ITEM_EVENT(xfs_buf_item_unlock);
456DEFINE_BUF_ITEM_EVENT(xfs_buf_item_unlock_stale); 483DEFINE_BUF_ITEM_EVENT(xfs_buf_item_unlock_stale);
457DEFINE_BUF_ITEM_EVENT(xfs_buf_item_committed); 484DEFINE_BUF_ITEM_EVENT(xfs_buf_item_committed);
458DEFINE_BUF_ITEM_EVENT(xfs_buf_item_push); 485DEFINE_BUF_ITEM_EVENT(xfs_buf_item_push);
486DEFINE_BUF_ITEM_EVENT(xfs_buf_item_pushbuf);
459DEFINE_BUF_ITEM_EVENT(xfs_trans_get_buf); 487DEFINE_BUF_ITEM_EVENT(xfs_trans_get_buf);
460DEFINE_BUF_ITEM_EVENT(xfs_trans_get_buf_recur); 488DEFINE_BUF_ITEM_EVENT(xfs_trans_get_buf_recur);
461DEFINE_BUF_ITEM_EVENT(xfs_trans_getsb); 489DEFINE_BUF_ITEM_EVENT(xfs_trans_getsb);
@@ -1414,6 +1442,59 @@ TRACE_EVENT(xfs_dir2_leafn_moveents,
1414 __entry->count) 1442 __entry->count)
1415); 1443);
1416 1444
1445#define XFS_SWAPEXT_INODES \
1446 { 0, "target" }, \
1447 { 1, "temp" }
1448
1449#define XFS_INODE_FORMAT_STR \
1450 { 0, "invalid" }, \
1451 { 1, "local" }, \
1452 { 2, "extent" }, \
1453 { 3, "btree" }
1454
1455DECLARE_EVENT_CLASS(xfs_swap_extent_class,
1456 TP_PROTO(struct xfs_inode *ip, int which),
1457 TP_ARGS(ip, which),
1458 TP_STRUCT__entry(
1459 __field(dev_t, dev)
1460 __field(int, which)
1461 __field(xfs_ino_t, ino)
1462 __field(int, format)
1463 __field(int, nex)
1464 __field(int, max_nex)
1465 __field(int, broot_size)
1466 __field(int, fork_off)
1467 ),
1468 TP_fast_assign(
1469 __entry->dev = VFS_I(ip)->i_sb->s_dev;
1470 __entry->which = which;
1471 __entry->ino = ip->i_ino;
1472 __entry->format = ip->i_d.di_format;
1473 __entry->nex = ip->i_d.di_nextents;
1474 __entry->max_nex = ip->i_df.if_ext_max;
1475 __entry->broot_size = ip->i_df.if_broot_bytes;
1476 __entry->fork_off = XFS_IFORK_BOFF(ip);
1477 ),
1478 TP_printk("dev %d:%d ino 0x%llx (%s), %s format, num_extents %d, "
1479 "Max in-fork extents %d, broot size %d, fork offset %d",
1480 MAJOR(__entry->dev), MINOR(__entry->dev),
1481 __entry->ino,
1482 __print_symbolic(__entry->which, XFS_SWAPEXT_INODES),
1483 __print_symbolic(__entry->format, XFS_INODE_FORMAT_STR),
1484 __entry->nex,
1485 __entry->max_nex,
1486 __entry->broot_size,
1487 __entry->fork_off)
1488)
1489
1490#define DEFINE_SWAPEXT_EVENT(name) \
1491DEFINE_EVENT(xfs_swap_extent_class, name, \
1492 TP_PROTO(struct xfs_inode *ip, int which), \
1493 TP_ARGS(ip, which))
1494
1495DEFINE_SWAPEXT_EVENT(xfs_swap_extent_before);
1496DEFINE_SWAPEXT_EVENT(xfs_swap_extent_after);
1497
1417#endif /* _TRACE_XFS_H */ 1498#endif /* _TRACE_XFS_H */
1418 1499
1419#undef TRACE_INCLUDE_PATH 1500#undef TRACE_INCLUDE_PATH
diff --git a/fs/xfs/linux-2.6/xfs_xattr.c b/fs/xfs/linux-2.6/xfs_xattr.c
index 0b1878857fc3..fa01b9daba6b 100644
--- a/fs/xfs/linux-2.6/xfs_xattr.c
+++ b/fs/xfs/linux-2.6/xfs_xattr.c
@@ -45,7 +45,7 @@ xfs_xattr_get(struct dentry *dentry, const char *name,
45 value = NULL; 45 value = NULL;
46 } 46 }
47 47
48 error = -xfs_attr_get(ip, name, value, &asize, xflags); 48 error = -xfs_attr_get(ip, (unsigned char *)name, value, &asize, xflags);
49 if (error) 49 if (error)
50 return error; 50 return error;
51 return asize; 51 return asize;
@@ -67,8 +67,9 @@ xfs_xattr_set(struct dentry *dentry, const char *name, const void *value,
67 xflags |= ATTR_REPLACE; 67 xflags |= ATTR_REPLACE;
68 68
69 if (!value) 69 if (!value)
70 return -xfs_attr_remove(ip, name, xflags); 70 return -xfs_attr_remove(ip, (unsigned char *)name, xflags);
71 return -xfs_attr_set(ip, name, (void *)value, size, xflags); 71 return -xfs_attr_set(ip, (unsigned char *)name,
72 (void *)value, size, xflags);
72} 73}
73 74
74static struct xattr_handler xfs_xattr_user_handler = { 75static struct xattr_handler xfs_xattr_user_handler = {
@@ -124,8 +125,13 @@ static const char *xfs_xattr_prefix(int flags)
124} 125}
125 126
126static int 127static int
127xfs_xattr_put_listent(struct xfs_attr_list_context *context, int flags, 128xfs_xattr_put_listent(
128 char *name, int namelen, int valuelen, char *value) 129 struct xfs_attr_list_context *context,
130 int flags,
131 unsigned char *name,
132 int namelen,
133 int valuelen,
134 unsigned char *value)
129{ 135{
130 unsigned int prefix_len = xfs_xattr_prefix_len(flags); 136 unsigned int prefix_len = xfs_xattr_prefix_len(flags);
131 char *offset; 137 char *offset;
@@ -148,7 +154,7 @@ xfs_xattr_put_listent(struct xfs_attr_list_context *context, int flags,
148 offset = (char *)context->alist + context->count; 154 offset = (char *)context->alist + context->count;
149 strncpy(offset, xfs_xattr_prefix(flags), prefix_len); 155 strncpy(offset, xfs_xattr_prefix(flags), prefix_len);
150 offset += prefix_len; 156 offset += prefix_len;
151 strncpy(offset, name, namelen); /* real name */ 157 strncpy(offset, (char *)name, namelen); /* real name */
152 offset += namelen; 158 offset += namelen;
153 *offset = '\0'; 159 *offset = '\0';
154 context->count += prefix_len + namelen + 1; 160 context->count += prefix_len + namelen + 1;
@@ -156,8 +162,13 @@ xfs_xattr_put_listent(struct xfs_attr_list_context *context, int flags,
156} 162}
157 163
158static int 164static int
159xfs_xattr_put_listent_sizes(struct xfs_attr_list_context *context, int flags, 165xfs_xattr_put_listent_sizes(
160 char *name, int namelen, int valuelen, char *value) 166 struct xfs_attr_list_context *context,
167 int flags,
168 unsigned char *name,
169 int namelen,
170 int valuelen,
171 unsigned char *value)
161{ 172{
162 context->count += xfs_xattr_prefix_len(flags) + namelen + 1; 173 context->count += xfs_xattr_prefix_len(flags) + namelen + 1;
163 return 0; 174 return 0;
diff --git a/fs/xfs/quota/xfs_dquot.c b/fs/xfs/quota/xfs_dquot.c
index d7c7eea09fc2..5f79dd78626b 100644
--- a/fs/xfs/quota/xfs_dquot.c
+++ b/fs/xfs/quota/xfs_dquot.c
@@ -1187,7 +1187,7 @@ xfs_qm_dqflush(
1187 * block, nada. 1187 * block, nada.
1188 */ 1188 */
1189 if (!XFS_DQ_IS_DIRTY(dqp) || 1189 if (!XFS_DQ_IS_DIRTY(dqp) ||
1190 (!(flags & XFS_QMOPT_SYNC) && atomic_read(&dqp->q_pincount) > 0)) { 1190 (!(flags & SYNC_WAIT) && atomic_read(&dqp->q_pincount) > 0)) {
1191 xfs_dqfunlock(dqp); 1191 xfs_dqfunlock(dqp);
1192 return 0; 1192 return 0;
1193 } 1193 }
@@ -1248,23 +1248,20 @@ xfs_qm_dqflush(
1248 */ 1248 */
1249 if (XFS_BUF_ISPINNED(bp)) { 1249 if (XFS_BUF_ISPINNED(bp)) {
1250 trace_xfs_dqflush_force(dqp); 1250 trace_xfs_dqflush_force(dqp);
1251 xfs_log_force(mp, (xfs_lsn_t)0, XFS_LOG_FORCE); 1251 xfs_log_force(mp, 0);
1252 } 1252 }
1253 1253
1254 if (flags & XFS_QMOPT_DELWRI) { 1254 if (flags & SYNC_WAIT)
1255 xfs_bdwrite(mp, bp);
1256 } else if (flags & XFS_QMOPT_ASYNC) {
1257 error = xfs_bawrite(mp, bp);
1258 } else {
1259 error = xfs_bwrite(mp, bp); 1255 error = xfs_bwrite(mp, bp);
1260 } 1256 else
1257 xfs_bdwrite(mp, bp);
1261 1258
1262 trace_xfs_dqflush_done(dqp); 1259 trace_xfs_dqflush_done(dqp);
1263 1260
1264 /* 1261 /*
1265 * dqp is still locked, but caller is free to unlock it now. 1262 * dqp is still locked, but caller is free to unlock it now.
1266 */ 1263 */
1267 return (error); 1264 return error;
1268 1265
1269} 1266}
1270 1267
@@ -1445,7 +1442,7 @@ xfs_qm_dqpurge(
1445 * We don't care about getting disk errors here. We need 1442 * We don't care about getting disk errors here. We need
1446 * to purge this dquot anyway, so we go ahead regardless. 1443 * to purge this dquot anyway, so we go ahead regardless.
1447 */ 1444 */
1448 error = xfs_qm_dqflush(dqp, XFS_QMOPT_SYNC); 1445 error = xfs_qm_dqflush(dqp, SYNC_WAIT);
1449 if (error) 1446 if (error)
1450 xfs_fs_cmn_err(CE_WARN, mp, 1447 xfs_fs_cmn_err(CE_WARN, mp,
1451 "xfs_qm_dqpurge: dquot %p flush failed", dqp); 1448 "xfs_qm_dqpurge: dquot %p flush failed", dqp);
@@ -1529,25 +1526,17 @@ xfs_qm_dqflock_pushbuf_wait(
1529 * the flush lock when the I/O completes. 1526 * the flush lock when the I/O completes.
1530 */ 1527 */
1531 bp = xfs_incore(dqp->q_mount->m_ddev_targp, dqp->q_blkno, 1528 bp = xfs_incore(dqp->q_mount->m_ddev_targp, dqp->q_blkno,
1532 XFS_QI_DQCHUNKLEN(dqp->q_mount), 1529 XFS_QI_DQCHUNKLEN(dqp->q_mount), XBF_TRYLOCK);
1533 XFS_INCORE_TRYLOCK); 1530 if (!bp)
1534 if (bp != NULL) { 1531 goto out_lock;
1535 if (XFS_BUF_ISDELAYWRITE(bp)) { 1532
1536 int error; 1533 if (XFS_BUF_ISDELAYWRITE(bp)) {
1537 if (XFS_BUF_ISPINNED(bp)) { 1534 if (XFS_BUF_ISPINNED(bp))
1538 xfs_log_force(dqp->q_mount, 1535 xfs_log_force(dqp->q_mount, 0);
1539 (xfs_lsn_t)0, 1536 xfs_buf_delwri_promote(bp);
1540 XFS_LOG_FORCE); 1537 wake_up_process(bp->b_target->bt_task);
1541 }
1542 error = xfs_bawrite(dqp->q_mount, bp);
1543 if (error)
1544 xfs_fs_cmn_err(CE_WARN, dqp->q_mount,
1545 "xfs_qm_dqflock_pushbuf_wait: "
1546 "pushbuf error %d on dqp %p, bp %p",
1547 error, dqp, bp);
1548 } else {
1549 xfs_buf_relse(bp);
1550 }
1551 } 1538 }
1539 xfs_buf_relse(bp);
1540out_lock:
1552 xfs_dqflock(dqp); 1541 xfs_dqflock(dqp);
1553} 1542}
diff --git a/fs/xfs/quota/xfs_dquot_item.c b/fs/xfs/quota/xfs_dquot_item.c
index d0d4a9a0bbd7..4e4ee9a57194 100644
--- a/fs/xfs/quota/xfs_dquot_item.c
+++ b/fs/xfs/quota/xfs_dquot_item.c
@@ -74,11 +74,11 @@ xfs_qm_dquot_logitem_format(
74 74
75 logvec->i_addr = (xfs_caddr_t)&logitem->qli_format; 75 logvec->i_addr = (xfs_caddr_t)&logitem->qli_format;
76 logvec->i_len = sizeof(xfs_dq_logformat_t); 76 logvec->i_len = sizeof(xfs_dq_logformat_t);
77 XLOG_VEC_SET_TYPE(logvec, XLOG_REG_TYPE_QFORMAT); 77 logvec->i_type = XLOG_REG_TYPE_QFORMAT;
78 logvec++; 78 logvec++;
79 logvec->i_addr = (xfs_caddr_t)&logitem->qli_dquot->q_core; 79 logvec->i_addr = (xfs_caddr_t)&logitem->qli_dquot->q_core;
80 logvec->i_len = sizeof(xfs_disk_dquot_t); 80 logvec->i_len = sizeof(xfs_disk_dquot_t);
81 XLOG_VEC_SET_TYPE(logvec, XLOG_REG_TYPE_DQUOT); 81 logvec->i_type = XLOG_REG_TYPE_DQUOT;
82 82
83 ASSERT(2 == logitem->qli_item.li_desc->lid_size); 83 ASSERT(2 == logitem->qli_item.li_desc->lid_size);
84 logitem->qli_format.qlf_size = 2; 84 logitem->qli_format.qlf_size = 2;
@@ -153,7 +153,7 @@ xfs_qm_dquot_logitem_push(
153 * lock without sleeping, then there must not have been 153 * lock without sleeping, then there must not have been
154 * anyone in the process of flushing the dquot. 154 * anyone in the process of flushing the dquot.
155 */ 155 */
156 error = xfs_qm_dqflush(dqp, XFS_QMOPT_DELWRI); 156 error = xfs_qm_dqflush(dqp, 0);
157 if (error) 157 if (error)
158 xfs_fs_cmn_err(CE_WARN, dqp->q_mount, 158 xfs_fs_cmn_err(CE_WARN, dqp->q_mount,
159 "xfs_qm_dquot_logitem_push: push error %d on dqp %p", 159 "xfs_qm_dquot_logitem_push: push error %d on dqp %p",
@@ -190,7 +190,7 @@ xfs_qm_dqunpin_wait(
190 /* 190 /*
191 * Give the log a push so we don't wait here too long. 191 * Give the log a push so we don't wait here too long.
192 */ 192 */
193 xfs_log_force(dqp->q_mount, (xfs_lsn_t)0, XFS_LOG_FORCE); 193 xfs_log_force(dqp->q_mount, 0);
194 wait_event(dqp->q_pinwait, (atomic_read(&dqp->q_pincount) == 0)); 194 wait_event(dqp->q_pinwait, (atomic_read(&dqp->q_pincount) == 0));
195} 195}
196 196
@@ -212,68 +212,31 @@ xfs_qm_dquot_logitem_pushbuf(
212 xfs_dquot_t *dqp; 212 xfs_dquot_t *dqp;
213 xfs_mount_t *mp; 213 xfs_mount_t *mp;
214 xfs_buf_t *bp; 214 xfs_buf_t *bp;
215 uint dopush;
216 215
217 dqp = qip->qli_dquot; 216 dqp = qip->qli_dquot;
218 ASSERT(XFS_DQ_IS_LOCKED(dqp)); 217 ASSERT(XFS_DQ_IS_LOCKED(dqp));
219 218
220 /* 219 /*
221 * The qli_pushbuf_flag keeps others from
222 * trying to duplicate our effort.
223 */
224 ASSERT(qip->qli_pushbuf_flag != 0);
225 ASSERT(qip->qli_push_owner == current_pid());
226
227 /*
228 * If flushlock isn't locked anymore, chances are that the 220 * If flushlock isn't locked anymore, chances are that the
229 * inode flush completed and the inode was taken off the AIL. 221 * inode flush completed and the inode was taken off the AIL.
230 * So, just get out. 222 * So, just get out.
231 */ 223 */
232 if (completion_done(&dqp->q_flush) || 224 if (completion_done(&dqp->q_flush) ||
233 ((qip->qli_item.li_flags & XFS_LI_IN_AIL) == 0)) { 225 ((qip->qli_item.li_flags & XFS_LI_IN_AIL) == 0)) {
234 qip->qli_pushbuf_flag = 0;
235 xfs_dqunlock(dqp); 226 xfs_dqunlock(dqp);
236 return; 227 return;
237 } 228 }
238 mp = dqp->q_mount; 229 mp = dqp->q_mount;
239 bp = xfs_incore(mp->m_ddev_targp, qip->qli_format.qlf_blkno, 230 bp = xfs_incore(mp->m_ddev_targp, qip->qli_format.qlf_blkno,
240 XFS_QI_DQCHUNKLEN(mp), 231 XFS_QI_DQCHUNKLEN(mp), XBF_TRYLOCK);
241 XFS_INCORE_TRYLOCK); 232 xfs_dqunlock(dqp);
242 if (bp != NULL) { 233 if (!bp)
243 if (XFS_BUF_ISDELAYWRITE(bp)) {
244 dopush = ((qip->qli_item.li_flags & XFS_LI_IN_AIL) &&
245 !completion_done(&dqp->q_flush));
246 qip->qli_pushbuf_flag = 0;
247 xfs_dqunlock(dqp);
248
249 if (XFS_BUF_ISPINNED(bp)) {
250 xfs_log_force(mp, (xfs_lsn_t)0,
251 XFS_LOG_FORCE);
252 }
253 if (dopush) {
254 int error;
255#ifdef XFSRACEDEBUG
256 delay_for_intr();
257 delay(300);
258#endif
259 error = xfs_bawrite(mp, bp);
260 if (error)
261 xfs_fs_cmn_err(CE_WARN, mp,
262 "xfs_qm_dquot_logitem_pushbuf: pushbuf error %d on qip %p, bp %p",
263 error, qip, bp);
264 } else {
265 xfs_buf_relse(bp);
266 }
267 } else {
268 qip->qli_pushbuf_flag = 0;
269 xfs_dqunlock(dqp);
270 xfs_buf_relse(bp);
271 }
272 return; 234 return;
273 } 235 if (XFS_BUF_ISDELAYWRITE(bp))
236 xfs_buf_delwri_promote(bp);
237 xfs_buf_relse(bp);
238 return;
274 239
275 qip->qli_pushbuf_flag = 0;
276 xfs_dqunlock(dqp);
277} 240}
278 241
279/* 242/*
@@ -291,50 +254,24 @@ xfs_qm_dquot_logitem_trylock(
291 xfs_dq_logitem_t *qip) 254 xfs_dq_logitem_t *qip)
292{ 255{
293 xfs_dquot_t *dqp; 256 xfs_dquot_t *dqp;
294 uint retval;
295 257
296 dqp = qip->qli_dquot; 258 dqp = qip->qli_dquot;
297 if (atomic_read(&dqp->q_pincount) > 0) 259 if (atomic_read(&dqp->q_pincount) > 0)
298 return (XFS_ITEM_PINNED); 260 return XFS_ITEM_PINNED;
299 261
300 if (! xfs_qm_dqlock_nowait(dqp)) 262 if (! xfs_qm_dqlock_nowait(dqp))
301 return (XFS_ITEM_LOCKED); 263 return XFS_ITEM_LOCKED;
302 264
303 retval = XFS_ITEM_SUCCESS;
304 if (!xfs_dqflock_nowait(dqp)) { 265 if (!xfs_dqflock_nowait(dqp)) {
305 /* 266 /*
306 * The dquot is already being flushed. It may have been 267 * dquot has already been flushed to the backing buffer,
307 * flushed delayed write, however, and we don't want to 268 * leave it locked, pushbuf routine will unlock it.
308 * get stuck waiting for that to complete. So, we want to check
309 * to see if we can lock the dquot's buffer without sleeping.
310 * If we can and it is marked for delayed write, then we
311 * hold it and send it out from the push routine. We don't
312 * want to do that now since we might sleep in the device
313 * strategy routine. We also don't want to grab the buffer lock
314 * here because we'd like not to call into the buffer cache
315 * while holding the AIL lock.
316 * Make sure to only return PUSHBUF if we set pushbuf_flag
317 * ourselves. If someone else is doing it then we don't
318 * want to go to the push routine and duplicate their efforts.
319 */ 269 */
320 if (qip->qli_pushbuf_flag == 0) { 270 return XFS_ITEM_PUSHBUF;
321 qip->qli_pushbuf_flag = 1;
322 ASSERT(qip->qli_format.qlf_blkno == dqp->q_blkno);
323#ifdef DEBUG
324 qip->qli_push_owner = current_pid();
325#endif
326 /*
327 * The dquot is left locked.
328 */
329 retval = XFS_ITEM_PUSHBUF;
330 } else {
331 retval = XFS_ITEM_FLUSHING;
332 xfs_dqunlock_nonotify(dqp);
333 }
334 } 271 }
335 272
336 ASSERT(qip->qli_item.li_flags & XFS_LI_IN_AIL); 273 ASSERT(qip->qli_item.li_flags & XFS_LI_IN_AIL);
337 return (retval); 274 return XFS_ITEM_SUCCESS;
338} 275}
339 276
340 277
@@ -467,7 +404,7 @@ xfs_qm_qoff_logitem_format(xfs_qoff_logitem_t *qf,
467 404
468 log_vector->i_addr = (xfs_caddr_t)&(qf->qql_format); 405 log_vector->i_addr = (xfs_caddr_t)&(qf->qql_format);
469 log_vector->i_len = sizeof(xfs_qoff_logitem_t); 406 log_vector->i_len = sizeof(xfs_qoff_logitem_t);
470 XLOG_VEC_SET_TYPE(log_vector, XLOG_REG_TYPE_QUOTAOFF); 407 log_vector->i_type = XLOG_REG_TYPE_QUOTAOFF;
471 qf->qql_format.qf_size = 1; 408 qf->qql_format.qf_size = 1;
472} 409}
473 410
diff --git a/fs/xfs/quota/xfs_dquot_item.h b/fs/xfs/quota/xfs_dquot_item.h
index 5a632531f843..5acae2ada70b 100644
--- a/fs/xfs/quota/xfs_dquot_item.h
+++ b/fs/xfs/quota/xfs_dquot_item.h
@@ -27,10 +27,6 @@ typedef struct xfs_dq_logitem {
27 xfs_log_item_t qli_item; /* common portion */ 27 xfs_log_item_t qli_item; /* common portion */
28 struct xfs_dquot *qli_dquot; /* dquot ptr */ 28 struct xfs_dquot *qli_dquot; /* dquot ptr */
29 xfs_lsn_t qli_flush_lsn; /* lsn at last flush */ 29 xfs_lsn_t qli_flush_lsn; /* lsn at last flush */
30 unsigned short qli_pushbuf_flag; /* 1 bit used in push_ail */
31#ifdef DEBUG
32 uint64_t qli_push_owner;
33#endif
34 xfs_dq_logformat_t qli_format; /* logged structure */ 30 xfs_dq_logformat_t qli_format; /* logged structure */
35} xfs_dq_logitem_t; 31} xfs_dq_logitem_t;
36 32
diff --git a/fs/xfs/quota/xfs_qm.c b/fs/xfs/quota/xfs_qm.c
index 9e627a8b5b0e..417e61e3d9dd 100644
--- a/fs/xfs/quota/xfs_qm.c
+++ b/fs/xfs/quota/xfs_qm.c
@@ -118,9 +118,14 @@ xfs_Gqm_init(void)
118 */ 118 */
119 udqhash = kmem_zalloc_greedy(&hsize, 119 udqhash = kmem_zalloc_greedy(&hsize,
120 XFS_QM_HASHSIZE_LOW * sizeof(xfs_dqhash_t), 120 XFS_QM_HASHSIZE_LOW * sizeof(xfs_dqhash_t),
121 XFS_QM_HASHSIZE_HIGH * sizeof(xfs_dqhash_t), 121 XFS_QM_HASHSIZE_HIGH * sizeof(xfs_dqhash_t));
122 KM_SLEEP | KM_MAYFAIL | KM_LARGE); 122 if (!udqhash)
123 gdqhash = kmem_zalloc(hsize, KM_SLEEP | KM_LARGE); 123 goto out;
124
125 gdqhash = kmem_zalloc_large(hsize);
126 if (!gdqhash)
127 goto out_free_udqhash;
128
124 hsize /= sizeof(xfs_dqhash_t); 129 hsize /= sizeof(xfs_dqhash_t);
125 ndquot = hsize << 8; 130 ndquot = hsize << 8;
126 131
@@ -170,6 +175,11 @@ xfs_Gqm_init(void)
170 mutex_init(&qcheck_lock); 175 mutex_init(&qcheck_lock);
171#endif 176#endif
172 return xqm; 177 return xqm;
178
179 out_free_udqhash:
180 kmem_free_large(udqhash);
181 out:
182 return NULL;
173} 183}
174 184
175/* 185/*
@@ -189,8 +199,8 @@ xfs_qm_destroy(
189 xfs_qm_list_destroy(&(xqm->qm_usr_dqhtable[i])); 199 xfs_qm_list_destroy(&(xqm->qm_usr_dqhtable[i]));
190 xfs_qm_list_destroy(&(xqm->qm_grp_dqhtable[i])); 200 xfs_qm_list_destroy(&(xqm->qm_grp_dqhtable[i]));
191 } 201 }
192 kmem_free(xqm->qm_usr_dqhtable); 202 kmem_free_large(xqm->qm_usr_dqhtable);
193 kmem_free(xqm->qm_grp_dqhtable); 203 kmem_free_large(xqm->qm_grp_dqhtable);
194 xqm->qm_usr_dqhtable = NULL; 204 xqm->qm_usr_dqhtable = NULL;
195 xqm->qm_grp_dqhtable = NULL; 205 xqm->qm_grp_dqhtable = NULL;
196 xqm->qm_dqhashmask = 0; 206 xqm->qm_dqhashmask = 0;
@@ -219,8 +229,12 @@ xfs_qm_hold_quotafs_ref(
219 */ 229 */
220 mutex_lock(&xfs_Gqm_lock); 230 mutex_lock(&xfs_Gqm_lock);
221 231
222 if (xfs_Gqm == NULL) 232 if (!xfs_Gqm) {
223 xfs_Gqm = xfs_Gqm_init(); 233 xfs_Gqm = xfs_Gqm_init();
234 if (!xfs_Gqm)
235 return ENOMEM;
236 }
237
224 /* 238 /*
225 * We can keep a list of all filesystems with quotas mounted for 239 * We can keep a list of all filesystems with quotas mounted for
226 * debugging and statistical purposes, but ... 240 * debugging and statistical purposes, but ...
@@ -436,7 +450,7 @@ xfs_qm_unmount_quotas(
436STATIC int 450STATIC int
437xfs_qm_dqflush_all( 451xfs_qm_dqflush_all(
438 xfs_mount_t *mp, 452 xfs_mount_t *mp,
439 int flags) 453 int sync_mode)
440{ 454{
441 int recl; 455 int recl;
442 xfs_dquot_t *dqp; 456 xfs_dquot_t *dqp;
@@ -472,7 +486,7 @@ again:
472 * across a disk write. 486 * across a disk write.
473 */ 487 */
474 xfs_qm_mplist_unlock(mp); 488 xfs_qm_mplist_unlock(mp);
475 error = xfs_qm_dqflush(dqp, flags); 489 error = xfs_qm_dqflush(dqp, sync_mode);
476 xfs_dqunlock(dqp); 490 xfs_dqunlock(dqp);
477 if (error) 491 if (error)
478 return error; 492 return error;
@@ -912,13 +926,11 @@ xfs_qm_sync(
912{ 926{
913 int recl, restarts; 927 int recl, restarts;
914 xfs_dquot_t *dqp; 928 xfs_dquot_t *dqp;
915 uint flush_flags;
916 int error; 929 int error;
917 930
918 if (!XFS_IS_QUOTA_RUNNING(mp) || !XFS_IS_QUOTA_ON(mp)) 931 if (!XFS_IS_QUOTA_RUNNING(mp) || !XFS_IS_QUOTA_ON(mp))
919 return 0; 932 return 0;
920 933
921 flush_flags = (flags & SYNC_WAIT) ? XFS_QMOPT_SYNC : XFS_QMOPT_DELWRI;
922 restarts = 0; 934 restarts = 0;
923 935
924 again: 936 again:
@@ -978,7 +990,7 @@ xfs_qm_sync(
978 * across a disk write 990 * across a disk write
979 */ 991 */
980 xfs_qm_mplist_unlock(mp); 992 xfs_qm_mplist_unlock(mp);
981 error = xfs_qm_dqflush(dqp, flush_flags); 993 error = xfs_qm_dqflush(dqp, flags);
982 xfs_dqunlock(dqp); 994 xfs_dqunlock(dqp);
983 if (error && XFS_FORCED_SHUTDOWN(mp)) 995 if (error && XFS_FORCED_SHUTDOWN(mp))
984 return 0; /* Need to prevent umount failure */ 996 return 0; /* Need to prevent umount failure */
@@ -1782,7 +1794,7 @@ xfs_qm_quotacheck(
1782 * successfully. 1794 * successfully.
1783 */ 1795 */
1784 if (!error) 1796 if (!error)
1785 error = xfs_qm_dqflush_all(mp, XFS_QMOPT_DELWRI); 1797 error = xfs_qm_dqflush_all(mp, 0);
1786 1798
1787 /* 1799 /*
1788 * We can get this error if we couldn't do a dquot allocation inside 1800 * We can get this error if we couldn't do a dquot allocation inside
@@ -2004,7 +2016,7 @@ xfs_qm_shake_freelist(
2004 * We flush it delayed write, so don't bother 2016 * We flush it delayed write, so don't bother
2005 * releasing the mplock. 2017 * releasing the mplock.
2006 */ 2018 */
2007 error = xfs_qm_dqflush(dqp, XFS_QMOPT_DELWRI); 2019 error = xfs_qm_dqflush(dqp, 0);
2008 if (error) { 2020 if (error) {
2009 xfs_fs_cmn_err(CE_WARN, dqp->q_mount, 2021 xfs_fs_cmn_err(CE_WARN, dqp->q_mount,
2010 "xfs_qm_dqflush_all: dquot %p flush failed", dqp); 2022 "xfs_qm_dqflush_all: dquot %p flush failed", dqp);
@@ -2187,7 +2199,7 @@ xfs_qm_dqreclaim_one(void)
2187 * We flush it delayed write, so don't bother 2199 * We flush it delayed write, so don't bother
2188 * releasing the freelist lock. 2200 * releasing the freelist lock.
2189 */ 2201 */
2190 error = xfs_qm_dqflush(dqp, XFS_QMOPT_DELWRI); 2202 error = xfs_qm_dqflush(dqp, 0);
2191 if (error) { 2203 if (error) {
2192 xfs_fs_cmn_err(CE_WARN, dqp->q_mount, 2204 xfs_fs_cmn_err(CE_WARN, dqp->q_mount,
2193 "xfs_qm_dqreclaim: dquot %p flush failed", dqp); 2205 "xfs_qm_dqreclaim: dquot %p flush failed", dqp);
diff --git a/fs/xfs/quota/xfs_qm_bhv.c b/fs/xfs/quota/xfs_qm_bhv.c
index a5346630dfae..97b410c12794 100644
--- a/fs/xfs/quota/xfs_qm_bhv.c
+++ b/fs/xfs/quota/xfs_qm_bhv.c
@@ -59,7 +59,7 @@ xfs_fill_statvfs_from_dquot(
59 be64_to_cpu(dp->d_blk_hardlimit); 59 be64_to_cpu(dp->d_blk_hardlimit);
60 if (limit && statp->f_blocks > limit) { 60 if (limit && statp->f_blocks > limit) {
61 statp->f_blocks = limit; 61 statp->f_blocks = limit;
62 statp->f_bfree = 62 statp->f_bfree = statp->f_bavail =
63 (statp->f_blocks > be64_to_cpu(dp->d_bcount)) ? 63 (statp->f_blocks > be64_to_cpu(dp->d_bcount)) ?
64 (statp->f_blocks - be64_to_cpu(dp->d_bcount)) : 0; 64 (statp->f_blocks - be64_to_cpu(dp->d_bcount)) : 0;
65 } 65 }
diff --git a/fs/xfs/quota/xfs_qm_syscalls.c b/fs/xfs/quota/xfs_qm_syscalls.c
index 873e07e29074..5d0ee8d492db 100644
--- a/fs/xfs/quota/xfs_qm_syscalls.c
+++ b/fs/xfs/quota/xfs_qm_syscalls.c
@@ -1192,9 +1192,9 @@ xfs_qm_internalqcheck(
1192 if (! XFS_IS_QUOTA_ON(mp)) 1192 if (! XFS_IS_QUOTA_ON(mp))
1193 return XFS_ERROR(ESRCH); 1193 return XFS_ERROR(ESRCH);
1194 1194
1195 xfs_log_force(mp, (xfs_lsn_t)0, XFS_LOG_FORCE | XFS_LOG_SYNC); 1195 xfs_log_force(mp, XFS_LOG_SYNC);
1196 XFS_bflush(mp->m_ddev_targp); 1196 XFS_bflush(mp->m_ddev_targp);
1197 xfs_log_force(mp, (xfs_lsn_t)0, XFS_LOG_FORCE | XFS_LOG_SYNC); 1197 xfs_log_force(mp, XFS_LOG_SYNC);
1198 XFS_bflush(mp->m_ddev_targp); 1198 XFS_bflush(mp->m_ddev_targp);
1199 1199
1200 mutex_lock(&qcheck_lock); 1200 mutex_lock(&qcheck_lock);
diff --git a/fs/xfs/quota/xfs_trans_dquot.c b/fs/xfs/quota/xfs_trans_dquot.c
index 97ac9640be98..c3ab75cb1d9a 100644
--- a/fs/xfs/quota/xfs_trans_dquot.c
+++ b/fs/xfs/quota/xfs_trans_dquot.c
@@ -589,12 +589,18 @@ xfs_trans_unreserve_and_mod_dquots(
589 } 589 }
590} 590}
591 591
592STATIC int 592STATIC void
593xfs_quota_error(uint flags) 593xfs_quota_warn(
594 struct xfs_mount *mp,
595 struct xfs_dquot *dqp,
596 int type)
594{ 597{
595 if (flags & XFS_QMOPT_ENOSPC) 598 /* no warnings for project quotas - we just return ENOSPC later */
596 return ENOSPC; 599 if (dqp->dq_flags & XFS_DQ_PROJ)
597 return EDQUOT; 600 return;
601 quota_send_warning((dqp->dq_flags & XFS_DQ_USER) ? USRQUOTA : GRPQUOTA,
602 be32_to_cpu(dqp->q_core.d_id), mp->m_super->s_dev,
603 type);
598} 604}
599 605
600/* 606/*
@@ -612,7 +618,6 @@ xfs_trans_dqresv(
612 long ninos, 618 long ninos,
613 uint flags) 619 uint flags)
614{ 620{
615 int error;
616 xfs_qcnt_t hardlimit; 621 xfs_qcnt_t hardlimit;
617 xfs_qcnt_t softlimit; 622 xfs_qcnt_t softlimit;
618 time_t timer; 623 time_t timer;
@@ -649,7 +654,6 @@ xfs_trans_dqresv(
649 warnlimit = XFS_QI_RTBWARNLIMIT(dqp->q_mount); 654 warnlimit = XFS_QI_RTBWARNLIMIT(dqp->q_mount);
650 resbcountp = &dqp->q_res_rtbcount; 655 resbcountp = &dqp->q_res_rtbcount;
651 } 656 }
652 error = 0;
653 657
654 if ((flags & XFS_QMOPT_FORCE_RES) == 0 && 658 if ((flags & XFS_QMOPT_FORCE_RES) == 0 &&
655 dqp->q_core.d_id && 659 dqp->q_core.d_id &&
@@ -667,18 +671,20 @@ xfs_trans_dqresv(
667 * nblks. 671 * nblks.
668 */ 672 */
669 if (hardlimit > 0ULL && 673 if (hardlimit > 0ULL &&
670 (hardlimit <= nblks + *resbcountp)) { 674 hardlimit <= nblks + *resbcountp) {
671 error = xfs_quota_error(flags); 675 xfs_quota_warn(mp, dqp, QUOTA_NL_BHARDWARN);
672 goto error_return; 676 goto error_return;
673 } 677 }
674
675 if (softlimit > 0ULL && 678 if (softlimit > 0ULL &&
676 (softlimit <= nblks + *resbcountp)) { 679 softlimit <= nblks + *resbcountp) {
677 if ((timer != 0 && get_seconds() > timer) || 680 if ((timer != 0 && get_seconds() > timer) ||
678 (warns != 0 && warns >= warnlimit)) { 681 (warns != 0 && warns >= warnlimit)) {
679 error = xfs_quota_error(flags); 682 xfs_quota_warn(mp, dqp,
683 QUOTA_NL_BSOFTLONGWARN);
680 goto error_return; 684 goto error_return;
681 } 685 }
686
687 xfs_quota_warn(mp, dqp, QUOTA_NL_BSOFTWARN);
682 } 688 }
683 } 689 }
684 if (ninos > 0) { 690 if (ninos > 0) {
@@ -692,15 +698,19 @@ xfs_trans_dqresv(
692 softlimit = be64_to_cpu(dqp->q_core.d_ino_softlimit); 698 softlimit = be64_to_cpu(dqp->q_core.d_ino_softlimit);
693 if (!softlimit) 699 if (!softlimit)
694 softlimit = q->qi_isoftlimit; 700 softlimit = q->qi_isoftlimit;
701
695 if (hardlimit > 0ULL && count >= hardlimit) { 702 if (hardlimit > 0ULL && count >= hardlimit) {
696 error = xfs_quota_error(flags); 703 xfs_quota_warn(mp, dqp, QUOTA_NL_IHARDWARN);
697 goto error_return; 704 goto error_return;
698 } else if (softlimit > 0ULL && count >= softlimit) { 705 }
699 if ((timer != 0 && get_seconds() > timer) || 706 if (softlimit > 0ULL && count >= softlimit) {
707 if ((timer != 0 && get_seconds() > timer) ||
700 (warns != 0 && warns >= warnlimit)) { 708 (warns != 0 && warns >= warnlimit)) {
701 error = xfs_quota_error(flags); 709 xfs_quota_warn(mp, dqp,
710 QUOTA_NL_ISOFTLONGWARN);
702 goto error_return; 711 goto error_return;
703 } 712 }
713 xfs_quota_warn(mp, dqp, QUOTA_NL_ISOFTWARN);
704 } 714 }
705 } 715 }
706 } 716 }
@@ -736,9 +746,14 @@ xfs_trans_dqresv(
736 ASSERT(dqp->q_res_rtbcount >= be64_to_cpu(dqp->q_core.d_rtbcount)); 746 ASSERT(dqp->q_res_rtbcount >= be64_to_cpu(dqp->q_core.d_rtbcount));
737 ASSERT(dqp->q_res_icount >= be64_to_cpu(dqp->q_core.d_icount)); 747 ASSERT(dqp->q_res_icount >= be64_to_cpu(dqp->q_core.d_icount));
738 748
749 xfs_dqunlock(dqp);
750 return 0;
751
739error_return: 752error_return:
740 xfs_dqunlock(dqp); 753 xfs_dqunlock(dqp);
741 return error; 754 if (flags & XFS_QMOPT_ENOSPC)
755 return ENOSPC;
756 return EDQUOT;
742} 757}
743 758
744 759
diff --git a/fs/xfs/xfs_acl.h b/fs/xfs/xfs_acl.h
index 00fd357c3e46..d13eeba2c8f8 100644
--- a/fs/xfs/xfs_acl.h
+++ b/fs/xfs/xfs_acl.h
@@ -36,8 +36,8 @@ struct xfs_acl {
36}; 36};
37 37
38/* On-disk XFS extended attribute names */ 38/* On-disk XFS extended attribute names */
39#define SGI_ACL_FILE "SGI_ACL_FILE" 39#define SGI_ACL_FILE (unsigned char *)"SGI_ACL_FILE"
40#define SGI_ACL_DEFAULT "SGI_ACL_DEFAULT" 40#define SGI_ACL_DEFAULT (unsigned char *)"SGI_ACL_DEFAULT"
41#define SGI_ACL_FILE_SIZE (sizeof(SGI_ACL_FILE)-1) 41#define SGI_ACL_FILE_SIZE (sizeof(SGI_ACL_FILE)-1)
42#define SGI_ACL_DEFAULT_SIZE (sizeof(SGI_ACL_DEFAULT)-1) 42#define SGI_ACL_DEFAULT_SIZE (sizeof(SGI_ACL_DEFAULT)-1)
43 43
diff --git a/fs/xfs/xfs_ag.h b/fs/xfs/xfs_ag.h
index 6702bd865811..b1a5a1ff88ea 100644
--- a/fs/xfs/xfs_ag.h
+++ b/fs/xfs/xfs_ag.h
@@ -187,17 +187,13 @@ typedef struct xfs_perag_busy {
187/* 187/*
188 * Per-ag incore structure, copies of information in agf and agi, 188 * Per-ag incore structure, copies of information in agf and agi,
189 * to improve the performance of allocation group selection. 189 * to improve the performance of allocation group selection.
190 *
191 * pick sizes which fit in allocation buckets well
192 */ 190 */
193#if (BITS_PER_LONG == 32)
194#define XFS_PAGB_NUM_SLOTS 84
195#elif (BITS_PER_LONG == 64)
196#define XFS_PAGB_NUM_SLOTS 128 191#define XFS_PAGB_NUM_SLOTS 128
197#endif
198 192
199typedef struct xfs_perag 193typedef struct xfs_perag {
200{ 194 struct xfs_mount *pag_mount; /* owner filesystem */
195 xfs_agnumber_t pag_agno; /* AG this structure belongs to */
196 atomic_t pag_ref; /* perag reference count */
201 char pagf_init; /* this agf's entry is initialized */ 197 char pagf_init; /* this agf's entry is initialized */
202 char pagi_init; /* this agi's entry is initialized */ 198 char pagi_init; /* this agi's entry is initialized */
203 char pagf_metadata; /* the agf is preferred to be metadata */ 199 char pagf_metadata; /* the agf is preferred to be metadata */
@@ -210,8 +206,6 @@ typedef struct xfs_perag
210 __uint32_t pagf_btreeblks; /* # of blocks held in AGF btrees */ 206 __uint32_t pagf_btreeblks; /* # of blocks held in AGF btrees */
211 xfs_agino_t pagi_freecount; /* number of free inodes */ 207 xfs_agino_t pagi_freecount; /* number of free inodes */
212 xfs_agino_t pagi_count; /* number of allocated inodes */ 208 xfs_agino_t pagi_count; /* number of allocated inodes */
213 int pagb_count; /* pagb slots in use */
214 xfs_perag_busy_t *pagb_list; /* unstable blocks */
215 209
216 /* 210 /*
217 * Inode allocation search lookup optimisation. 211 * Inode allocation search lookup optimisation.
@@ -230,6 +224,8 @@ typedef struct xfs_perag
230 rwlock_t pag_ici_lock; /* incore inode lock */ 224 rwlock_t pag_ici_lock; /* incore inode lock */
231 struct radix_tree_root pag_ici_root; /* incore inode cache root */ 225 struct radix_tree_root pag_ici_root; /* incore inode cache root */
232#endif 226#endif
227 int pagb_count; /* pagb slots in use */
228 xfs_perag_busy_t pagb_list[XFS_PAGB_NUM_SLOTS]; /* unstable blocks */
233} xfs_perag_t; 229} xfs_perag_t;
234 230
235/* 231/*
diff --git a/fs/xfs/xfs_alloc.c b/fs/xfs/xfs_alloc.c
index 275b1f4f9430..94cddbfb2560 100644
--- a/fs/xfs/xfs_alloc.c
+++ b/fs/xfs/xfs_alloc.c
@@ -1662,11 +1662,13 @@ xfs_free_ag_extent(
1662 xfs_agf_t *agf; 1662 xfs_agf_t *agf;
1663 xfs_perag_t *pag; /* per allocation group data */ 1663 xfs_perag_t *pag; /* per allocation group data */
1664 1664
1665 pag = xfs_perag_get(mp, agno);
1666 pag->pagf_freeblks += len;
1667 xfs_perag_put(pag);
1668
1665 agf = XFS_BUF_TO_AGF(agbp); 1669 agf = XFS_BUF_TO_AGF(agbp);
1666 pag = &mp->m_perag[agno];
1667 be32_add_cpu(&agf->agf_freeblks, len); 1670 be32_add_cpu(&agf->agf_freeblks, len);
1668 xfs_trans_agblocks_delta(tp, len); 1671 xfs_trans_agblocks_delta(tp, len);
1669 pag->pagf_freeblks += len;
1670 XFS_WANT_CORRUPTED_GOTO( 1672 XFS_WANT_CORRUPTED_GOTO(
1671 be32_to_cpu(agf->agf_freeblks) <= 1673 be32_to_cpu(agf->agf_freeblks) <=
1672 be32_to_cpu(agf->agf_length), 1674 be32_to_cpu(agf->agf_length),
@@ -1969,10 +1971,12 @@ xfs_alloc_get_freelist(
1969 xfs_trans_brelse(tp, agflbp); 1971 xfs_trans_brelse(tp, agflbp);
1970 if (be32_to_cpu(agf->agf_flfirst) == XFS_AGFL_SIZE(mp)) 1972 if (be32_to_cpu(agf->agf_flfirst) == XFS_AGFL_SIZE(mp))
1971 agf->agf_flfirst = 0; 1973 agf->agf_flfirst = 0;
1972 pag = &mp->m_perag[be32_to_cpu(agf->agf_seqno)]; 1974
1975 pag = xfs_perag_get(mp, be32_to_cpu(agf->agf_seqno));
1973 be32_add_cpu(&agf->agf_flcount, -1); 1976 be32_add_cpu(&agf->agf_flcount, -1);
1974 xfs_trans_agflist_delta(tp, -1); 1977 xfs_trans_agflist_delta(tp, -1);
1975 pag->pagf_flcount--; 1978 pag->pagf_flcount--;
1979 xfs_perag_put(pag);
1976 1980
1977 logflags = XFS_AGF_FLFIRST | XFS_AGF_FLCOUNT; 1981 logflags = XFS_AGF_FLFIRST | XFS_AGF_FLCOUNT;
1978 if (btreeblk) { 1982 if (btreeblk) {
@@ -2078,7 +2082,8 @@ xfs_alloc_put_freelist(
2078 be32_add_cpu(&agf->agf_fllast, 1); 2082 be32_add_cpu(&agf->agf_fllast, 1);
2079 if (be32_to_cpu(agf->agf_fllast) == XFS_AGFL_SIZE(mp)) 2083 if (be32_to_cpu(agf->agf_fllast) == XFS_AGFL_SIZE(mp))
2080 agf->agf_fllast = 0; 2084 agf->agf_fllast = 0;
2081 pag = &mp->m_perag[be32_to_cpu(agf->agf_seqno)]; 2085
2086 pag = xfs_perag_get(mp, be32_to_cpu(agf->agf_seqno));
2082 be32_add_cpu(&agf->agf_flcount, 1); 2087 be32_add_cpu(&agf->agf_flcount, 1);
2083 xfs_trans_agflist_delta(tp, 1); 2088 xfs_trans_agflist_delta(tp, 1);
2084 pag->pagf_flcount++; 2089 pag->pagf_flcount++;
@@ -2089,6 +2094,7 @@ xfs_alloc_put_freelist(
2089 pag->pagf_btreeblks--; 2094 pag->pagf_btreeblks--;
2090 logflags |= XFS_AGF_BTREEBLKS; 2095 logflags |= XFS_AGF_BTREEBLKS;
2091 } 2096 }
2097 xfs_perag_put(pag);
2092 2098
2093 xfs_alloc_log_agf(tp, agbp, logflags); 2099 xfs_alloc_log_agf(tp, agbp, logflags);
2094 2100
@@ -2152,7 +2158,6 @@ xfs_read_agf(
2152 xfs_trans_brelse(tp, *bpp); 2158 xfs_trans_brelse(tp, *bpp);
2153 return XFS_ERROR(EFSCORRUPTED); 2159 return XFS_ERROR(EFSCORRUPTED);
2154 } 2160 }
2155
2156 XFS_BUF_SET_VTYPE_REF(*bpp, B_FS_AGF, XFS_AGF_REF); 2161 XFS_BUF_SET_VTYPE_REF(*bpp, B_FS_AGF, XFS_AGF_REF);
2157 return 0; 2162 return 0;
2158} 2163}
@@ -2175,7 +2180,7 @@ xfs_alloc_read_agf(
2175 ASSERT(agno != NULLAGNUMBER); 2180 ASSERT(agno != NULLAGNUMBER);
2176 2181
2177 error = xfs_read_agf(mp, tp, agno, 2182 error = xfs_read_agf(mp, tp, agno,
2178 (flags & XFS_ALLOC_FLAG_TRYLOCK) ? XFS_BUF_TRYLOCK : 0, 2183 (flags & XFS_ALLOC_FLAG_TRYLOCK) ? XBF_TRYLOCK : 0,
2179 bpp); 2184 bpp);
2180 if (error) 2185 if (error)
2181 return error; 2186 return error;
@@ -2184,7 +2189,7 @@ xfs_alloc_read_agf(
2184 ASSERT(!XFS_BUF_GETERROR(*bpp)); 2189 ASSERT(!XFS_BUF_GETERROR(*bpp));
2185 2190
2186 agf = XFS_BUF_TO_AGF(*bpp); 2191 agf = XFS_BUF_TO_AGF(*bpp);
2187 pag = &mp->m_perag[agno]; 2192 pag = xfs_perag_get(mp, agno);
2188 if (!pag->pagf_init) { 2193 if (!pag->pagf_init) {
2189 pag->pagf_freeblks = be32_to_cpu(agf->agf_freeblks); 2194 pag->pagf_freeblks = be32_to_cpu(agf->agf_freeblks);
2190 pag->pagf_btreeblks = be32_to_cpu(agf->agf_btreeblks); 2195 pag->pagf_btreeblks = be32_to_cpu(agf->agf_btreeblks);
@@ -2195,8 +2200,8 @@ xfs_alloc_read_agf(
2195 pag->pagf_levels[XFS_BTNUM_CNTi] = 2200 pag->pagf_levels[XFS_BTNUM_CNTi] =
2196 be32_to_cpu(agf->agf_levels[XFS_BTNUM_CNTi]); 2201 be32_to_cpu(agf->agf_levels[XFS_BTNUM_CNTi]);
2197 spin_lock_init(&pag->pagb_lock); 2202 spin_lock_init(&pag->pagb_lock);
2198 pag->pagb_list = kmem_zalloc(XFS_PAGB_NUM_SLOTS * 2203 pag->pagb_count = 0;
2199 sizeof(xfs_perag_busy_t), KM_SLEEP); 2204 memset(pag->pagb_list, 0, sizeof(pag->pagb_list));
2200 pag->pagf_init = 1; 2205 pag->pagf_init = 1;
2201 } 2206 }
2202#ifdef DEBUG 2207#ifdef DEBUG
@@ -2211,6 +2216,7 @@ xfs_alloc_read_agf(
2211 be32_to_cpu(agf->agf_levels[XFS_BTNUM_CNTi])); 2216 be32_to_cpu(agf->agf_levels[XFS_BTNUM_CNTi]));
2212 } 2217 }
2213#endif 2218#endif
2219 xfs_perag_put(pag);
2214 return 0; 2220 return 0;
2215} 2221}
2216 2222
@@ -2270,8 +2276,7 @@ xfs_alloc_vextent(
2270 * These three force us into a single a.g. 2276 * These three force us into a single a.g.
2271 */ 2277 */
2272 args->agno = XFS_FSB_TO_AGNO(mp, args->fsbno); 2278 args->agno = XFS_FSB_TO_AGNO(mp, args->fsbno);
2273 down_read(&mp->m_peraglock); 2279 args->pag = xfs_perag_get(mp, args->agno);
2274 args->pag = &mp->m_perag[args->agno];
2275 args->minleft = 0; 2280 args->minleft = 0;
2276 error = xfs_alloc_fix_freelist(args, 0); 2281 error = xfs_alloc_fix_freelist(args, 0);
2277 args->minleft = minleft; 2282 args->minleft = minleft;
@@ -2280,14 +2285,12 @@ xfs_alloc_vextent(
2280 goto error0; 2285 goto error0;
2281 } 2286 }
2282 if (!args->agbp) { 2287 if (!args->agbp) {
2283 up_read(&mp->m_peraglock);
2284 trace_xfs_alloc_vextent_noagbp(args); 2288 trace_xfs_alloc_vextent_noagbp(args);
2285 break; 2289 break;
2286 } 2290 }
2287 args->agbno = XFS_FSB_TO_AGBNO(mp, args->fsbno); 2291 args->agbno = XFS_FSB_TO_AGBNO(mp, args->fsbno);
2288 if ((error = xfs_alloc_ag_vextent(args))) 2292 if ((error = xfs_alloc_ag_vextent(args)))
2289 goto error0; 2293 goto error0;
2290 up_read(&mp->m_peraglock);
2291 break; 2294 break;
2292 case XFS_ALLOCTYPE_START_BNO: 2295 case XFS_ALLOCTYPE_START_BNO:
2293 /* 2296 /*
@@ -2339,9 +2342,8 @@ xfs_alloc_vextent(
2339 * Loop over allocation groups twice; first time with 2342 * Loop over allocation groups twice; first time with
2340 * trylock set, second time without. 2343 * trylock set, second time without.
2341 */ 2344 */
2342 down_read(&mp->m_peraglock);
2343 for (;;) { 2345 for (;;) {
2344 args->pag = &mp->m_perag[args->agno]; 2346 args->pag = xfs_perag_get(mp, args->agno);
2345 if (no_min) args->minleft = 0; 2347 if (no_min) args->minleft = 0;
2346 error = xfs_alloc_fix_freelist(args, flags); 2348 error = xfs_alloc_fix_freelist(args, flags);
2347 args->minleft = minleft; 2349 args->minleft = minleft;
@@ -2400,8 +2402,8 @@ xfs_alloc_vextent(
2400 } 2402 }
2401 } 2403 }
2402 } 2404 }
2405 xfs_perag_put(args->pag);
2403 } 2406 }
2404 up_read(&mp->m_peraglock);
2405 if (bump_rotor || (type == XFS_ALLOCTYPE_ANY_AG)) { 2407 if (bump_rotor || (type == XFS_ALLOCTYPE_ANY_AG)) {
2406 if (args->agno == sagno) 2408 if (args->agno == sagno)
2407 mp->m_agfrotor = (mp->m_agfrotor + 1) % 2409 mp->m_agfrotor = (mp->m_agfrotor + 1) %
@@ -2427,9 +2429,10 @@ xfs_alloc_vextent(
2427 args->len); 2429 args->len);
2428#endif 2430#endif
2429 } 2431 }
2432 xfs_perag_put(args->pag);
2430 return 0; 2433 return 0;
2431error0: 2434error0:
2432 up_read(&mp->m_peraglock); 2435 xfs_perag_put(args->pag);
2433 return error; 2436 return error;
2434} 2437}
2435 2438
@@ -2454,8 +2457,7 @@ xfs_free_extent(
2454 args.agno = XFS_FSB_TO_AGNO(args.mp, bno); 2457 args.agno = XFS_FSB_TO_AGNO(args.mp, bno);
2455 ASSERT(args.agno < args.mp->m_sb.sb_agcount); 2458 ASSERT(args.agno < args.mp->m_sb.sb_agcount);
2456 args.agbno = XFS_FSB_TO_AGBNO(args.mp, bno); 2459 args.agbno = XFS_FSB_TO_AGBNO(args.mp, bno);
2457 down_read(&args.mp->m_peraglock); 2460 args.pag = xfs_perag_get(args.mp, args.agno);
2458 args.pag = &args.mp->m_perag[args.agno];
2459 if ((error = xfs_alloc_fix_freelist(&args, XFS_ALLOC_FLAG_FREEING))) 2461 if ((error = xfs_alloc_fix_freelist(&args, XFS_ALLOC_FLAG_FREEING)))
2460 goto error0; 2462 goto error0;
2461#ifdef DEBUG 2463#ifdef DEBUG
@@ -2465,7 +2467,7 @@ xfs_free_extent(
2465#endif 2467#endif
2466 error = xfs_free_ag_extent(tp, args.agbp, args.agno, args.agbno, len, 0); 2468 error = xfs_free_ag_extent(tp, args.agbp, args.agno, args.agbno, len, 0);
2467error0: 2469error0:
2468 up_read(&args.mp->m_peraglock); 2470 xfs_perag_put(args.pag);
2469 return error; 2471 return error;
2470} 2472}
2471 2473
@@ -2486,15 +2488,15 @@ xfs_alloc_mark_busy(xfs_trans_t *tp,
2486 xfs_agblock_t bno, 2488 xfs_agblock_t bno,
2487 xfs_extlen_t len) 2489 xfs_extlen_t len)
2488{ 2490{
2489 xfs_mount_t *mp;
2490 xfs_perag_busy_t *bsy; 2491 xfs_perag_busy_t *bsy;
2492 struct xfs_perag *pag;
2491 int n; 2493 int n;
2492 2494
2493 mp = tp->t_mountp; 2495 pag = xfs_perag_get(tp->t_mountp, agno);
2494 spin_lock(&mp->m_perag[agno].pagb_lock); 2496 spin_lock(&pag->pagb_lock);
2495 2497
2496 /* search pagb_list for an open slot */ 2498 /* search pagb_list for an open slot */
2497 for (bsy = mp->m_perag[agno].pagb_list, n = 0; 2499 for (bsy = pag->pagb_list, n = 0;
2498 n < XFS_PAGB_NUM_SLOTS; 2500 n < XFS_PAGB_NUM_SLOTS;
2499 bsy++, n++) { 2501 bsy++, n++) {
2500 if (bsy->busy_tp == NULL) { 2502 if (bsy->busy_tp == NULL) {
@@ -2502,11 +2504,11 @@ xfs_alloc_mark_busy(xfs_trans_t *tp,
2502 } 2504 }
2503 } 2505 }
2504 2506
2505 trace_xfs_alloc_busy(mp, agno, bno, len, n); 2507 trace_xfs_alloc_busy(tp->t_mountp, agno, bno, len, n);
2506 2508
2507 if (n < XFS_PAGB_NUM_SLOTS) { 2509 if (n < XFS_PAGB_NUM_SLOTS) {
2508 bsy = &mp->m_perag[agno].pagb_list[n]; 2510 bsy = &pag->pagb_list[n];
2509 mp->m_perag[agno].pagb_count++; 2511 pag->pagb_count++;
2510 bsy->busy_start = bno; 2512 bsy->busy_start = bno;
2511 bsy->busy_length = len; 2513 bsy->busy_length = len;
2512 bsy->busy_tp = tp; 2514 bsy->busy_tp = tp;
@@ -2521,7 +2523,8 @@ xfs_alloc_mark_busy(xfs_trans_t *tp,
2521 xfs_trans_set_sync(tp); 2523 xfs_trans_set_sync(tp);
2522 } 2524 }
2523 2525
2524 spin_unlock(&mp->m_perag[agno].pagb_lock); 2526 spin_unlock(&pag->pagb_lock);
2527 xfs_perag_put(pag);
2525} 2528}
2526 2529
2527void 2530void
@@ -2529,24 +2532,23 @@ xfs_alloc_clear_busy(xfs_trans_t *tp,
2529 xfs_agnumber_t agno, 2532 xfs_agnumber_t agno,
2530 int idx) 2533 int idx)
2531{ 2534{
2532 xfs_mount_t *mp; 2535 struct xfs_perag *pag;
2533 xfs_perag_busy_t *list; 2536 xfs_perag_busy_t *list;
2534 2537
2535 mp = tp->t_mountp;
2536
2537 spin_lock(&mp->m_perag[agno].pagb_lock);
2538 list = mp->m_perag[agno].pagb_list;
2539
2540 ASSERT(idx < XFS_PAGB_NUM_SLOTS); 2538 ASSERT(idx < XFS_PAGB_NUM_SLOTS);
2539 pag = xfs_perag_get(tp->t_mountp, agno);
2540 spin_lock(&pag->pagb_lock);
2541 list = pag->pagb_list;
2541 2542
2542 trace_xfs_alloc_unbusy(mp, agno, idx, list[idx].busy_tp == tp); 2543 trace_xfs_alloc_unbusy(tp->t_mountp, agno, idx, list[idx].busy_tp == tp);
2543 2544
2544 if (list[idx].busy_tp == tp) { 2545 if (list[idx].busy_tp == tp) {
2545 list[idx].busy_tp = NULL; 2546 list[idx].busy_tp = NULL;
2546 mp->m_perag[agno].pagb_count--; 2547 pag->pagb_count--;
2547 } 2548 }
2548 2549
2549 spin_unlock(&mp->m_perag[agno].pagb_lock); 2550 spin_unlock(&pag->pagb_lock);
2551 xfs_perag_put(pag);
2550} 2552}
2551 2553
2552 2554
@@ -2560,17 +2562,15 @@ xfs_alloc_search_busy(xfs_trans_t *tp,
2560 xfs_agblock_t bno, 2562 xfs_agblock_t bno,
2561 xfs_extlen_t len) 2563 xfs_extlen_t len)
2562{ 2564{
2563 xfs_mount_t *mp; 2565 struct xfs_perag *pag;
2564 xfs_perag_busy_t *bsy; 2566 xfs_perag_busy_t *bsy;
2565 xfs_agblock_t uend, bend; 2567 xfs_agblock_t uend, bend;
2566 xfs_lsn_t lsn = 0; 2568 xfs_lsn_t lsn = 0;
2567 int cnt; 2569 int cnt;
2568 2570
2569 mp = tp->t_mountp; 2571 pag = xfs_perag_get(tp->t_mountp, agno);
2570 2572 spin_lock(&pag->pagb_lock);
2571 spin_lock(&mp->m_perag[agno].pagb_lock); 2573 cnt = pag->pagb_count;
2572
2573 uend = bno + len - 1;
2574 2574
2575 /* 2575 /*
2576 * search pagb_list for this slot, skipping open slots. We have to 2576 * search pagb_list for this slot, skipping open slots. We have to
@@ -2578,8 +2578,9 @@ xfs_alloc_search_busy(xfs_trans_t *tp,
2578 * we have to get the most recent LSN for the log force to push out 2578 * we have to get the most recent LSN for the log force to push out
2579 * all the transactions that span the range. 2579 * all the transactions that span the range.
2580 */ 2580 */
2581 for (cnt = 0; cnt < mp->m_perag[agno].pagb_count; cnt++) { 2581 uend = bno + len - 1;
2582 bsy = &mp->m_perag[agno].pagb_list[cnt]; 2582 for (cnt = 0; cnt < pag->pagb_count; cnt++) {
2583 bsy = &pag->pagb_list[cnt];
2583 if (!bsy->busy_tp) 2584 if (!bsy->busy_tp)
2584 continue; 2585 continue;
2585 2586
@@ -2591,7 +2592,8 @@ xfs_alloc_search_busy(xfs_trans_t *tp,
2591 if (XFS_LSN_CMP(bsy->busy_tp->t_commit_lsn, lsn) > 0) 2592 if (XFS_LSN_CMP(bsy->busy_tp->t_commit_lsn, lsn) > 0)
2592 lsn = bsy->busy_tp->t_commit_lsn; 2593 lsn = bsy->busy_tp->t_commit_lsn;
2593 } 2594 }
2594 spin_unlock(&mp->m_perag[agno].pagb_lock); 2595 spin_unlock(&pag->pagb_lock);
2596 xfs_perag_put(pag);
2595 trace_xfs_alloc_busysearch(tp->t_mountp, agno, bno, len, lsn); 2597 trace_xfs_alloc_busysearch(tp->t_mountp, agno, bno, len, lsn);
2596 2598
2597 /* 2599 /*
@@ -2599,5 +2601,5 @@ xfs_alloc_search_busy(xfs_trans_t *tp,
2599 * transaction that freed the block 2601 * transaction that freed the block
2600 */ 2602 */
2601 if (lsn) 2603 if (lsn)
2602 xfs_log_force(mp, lsn, XFS_LOG_FORCE|XFS_LOG_SYNC); 2604 xfs_log_force_lsn(tp->t_mountp, lsn, XFS_LOG_SYNC);
2603} 2605}
diff --git a/fs/xfs/xfs_alloc_btree.c b/fs/xfs/xfs_alloc_btree.c
index adbd9141aea1..b726e10d2c1c 100644
--- a/fs/xfs/xfs_alloc_btree.c
+++ b/fs/xfs/xfs_alloc_btree.c
@@ -61,12 +61,14 @@ xfs_allocbt_set_root(
61 struct xfs_agf *agf = XFS_BUF_TO_AGF(agbp); 61 struct xfs_agf *agf = XFS_BUF_TO_AGF(agbp);
62 xfs_agnumber_t seqno = be32_to_cpu(agf->agf_seqno); 62 xfs_agnumber_t seqno = be32_to_cpu(agf->agf_seqno);
63 int btnum = cur->bc_btnum; 63 int btnum = cur->bc_btnum;
64 struct xfs_perag *pag = xfs_perag_get(cur->bc_mp, seqno);
64 65
65 ASSERT(ptr->s != 0); 66 ASSERT(ptr->s != 0);
66 67
67 agf->agf_roots[btnum] = ptr->s; 68 agf->agf_roots[btnum] = ptr->s;
68 be32_add_cpu(&agf->agf_levels[btnum], inc); 69 be32_add_cpu(&agf->agf_levels[btnum], inc);
69 cur->bc_mp->m_perag[seqno].pagf_levels[btnum] += inc; 70 pag->pagf_levels[btnum] += inc;
71 xfs_perag_put(pag);
70 72
71 xfs_alloc_log_agf(cur->bc_tp, agbp, XFS_AGF_ROOTS | XFS_AGF_LEVELS); 73 xfs_alloc_log_agf(cur->bc_tp, agbp, XFS_AGF_ROOTS | XFS_AGF_LEVELS);
72} 74}
@@ -150,6 +152,7 @@ xfs_allocbt_update_lastrec(
150{ 152{
151 struct xfs_agf *agf = XFS_BUF_TO_AGF(cur->bc_private.a.agbp); 153 struct xfs_agf *agf = XFS_BUF_TO_AGF(cur->bc_private.a.agbp);
152 xfs_agnumber_t seqno = be32_to_cpu(agf->agf_seqno); 154 xfs_agnumber_t seqno = be32_to_cpu(agf->agf_seqno);
155 struct xfs_perag *pag;
153 __be32 len; 156 __be32 len;
154 int numrecs; 157 int numrecs;
155 158
@@ -193,7 +196,9 @@ xfs_allocbt_update_lastrec(
193 } 196 }
194 197
195 agf->agf_longest = len; 198 agf->agf_longest = len;
196 cur->bc_mp->m_perag[seqno].pagf_longest = be32_to_cpu(len); 199 pag = xfs_perag_get(cur->bc_mp, seqno);
200 pag->pagf_longest = be32_to_cpu(len);
201 xfs_perag_put(pag);
197 xfs_alloc_log_agf(cur->bc_tp, cur->bc_private.a.agbp, XFS_AGF_LONGEST); 202 xfs_alloc_log_agf(cur->bc_tp, cur->bc_private.a.agbp, XFS_AGF_LONGEST);
198} 203}
199 204
diff --git a/fs/xfs/xfs_attr.c b/fs/xfs/xfs_attr.c
index e953b6cfb2a8..b9c196a53c42 100644
--- a/fs/xfs/xfs_attr.c
+++ b/fs/xfs/xfs_attr.c
@@ -93,12 +93,12 @@ STATIC int xfs_attr_rmtval_remove(xfs_da_args_t *args);
93STATIC int 93STATIC int
94xfs_attr_name_to_xname( 94xfs_attr_name_to_xname(
95 struct xfs_name *xname, 95 struct xfs_name *xname,
96 const char *aname) 96 const unsigned char *aname)
97{ 97{
98 if (!aname) 98 if (!aname)
99 return EINVAL; 99 return EINVAL;
100 xname->name = aname; 100 xname->name = aname;
101 xname->len = strlen(aname); 101 xname->len = strlen((char *)aname);
102 if (xname->len >= MAXNAMELEN) 102 if (xname->len >= MAXNAMELEN)
103 return EFAULT; /* match IRIX behaviour */ 103 return EFAULT; /* match IRIX behaviour */
104 104
@@ -124,7 +124,7 @@ STATIC int
124xfs_attr_get_int( 124xfs_attr_get_int(
125 struct xfs_inode *ip, 125 struct xfs_inode *ip,
126 struct xfs_name *name, 126 struct xfs_name *name,
127 char *value, 127 unsigned char *value,
128 int *valuelenp, 128 int *valuelenp,
129 int flags) 129 int flags)
130{ 130{
@@ -171,8 +171,8 @@ xfs_attr_get_int(
171int 171int
172xfs_attr_get( 172xfs_attr_get(
173 xfs_inode_t *ip, 173 xfs_inode_t *ip,
174 const char *name, 174 const unsigned char *name,
175 char *value, 175 unsigned char *value,
176 int *valuelenp, 176 int *valuelenp,
177 int flags) 177 int flags)
178{ 178{
@@ -197,7 +197,7 @@ xfs_attr_get(
197/* 197/*
198 * Calculate how many blocks we need for the new attribute, 198 * Calculate how many blocks we need for the new attribute,
199 */ 199 */
200int 200STATIC int
201xfs_attr_calc_size( 201xfs_attr_calc_size(
202 struct xfs_inode *ip, 202 struct xfs_inode *ip,
203 int namelen, 203 int namelen,
@@ -235,8 +235,12 @@ xfs_attr_calc_size(
235} 235}
236 236
237STATIC int 237STATIC int
238xfs_attr_set_int(xfs_inode_t *dp, struct xfs_name *name, 238xfs_attr_set_int(
239 char *value, int valuelen, int flags) 239 struct xfs_inode *dp,
240 struct xfs_name *name,
241 unsigned char *value,
242 int valuelen,
243 int flags)
240{ 244{
241 xfs_da_args_t args; 245 xfs_da_args_t args;
242 xfs_fsblock_t firstblock; 246 xfs_fsblock_t firstblock;
@@ -452,8 +456,8 @@ out:
452int 456int
453xfs_attr_set( 457xfs_attr_set(
454 xfs_inode_t *dp, 458 xfs_inode_t *dp,
455 const char *name, 459 const unsigned char *name,
456 char *value, 460 unsigned char *value,
457 int valuelen, 461 int valuelen,
458 int flags) 462 int flags)
459{ 463{
@@ -600,7 +604,7 @@ out:
600int 604int
601xfs_attr_remove( 605xfs_attr_remove(
602 xfs_inode_t *dp, 606 xfs_inode_t *dp,
603 const char *name, 607 const unsigned char *name,
604 int flags) 608 int flags)
605{ 609{
606 int error; 610 int error;
@@ -669,9 +673,13 @@ xfs_attr_list_int(xfs_attr_list_context_t *context)
669 */ 673 */
670/*ARGSUSED*/ 674/*ARGSUSED*/
671STATIC int 675STATIC int
672xfs_attr_put_listent(xfs_attr_list_context_t *context, int flags, 676xfs_attr_put_listent(
673 char *name, int namelen, 677 xfs_attr_list_context_t *context,
674 int valuelen, char *value) 678 int flags,
679 unsigned char *name,
680 int namelen,
681 int valuelen,
682 unsigned char *value)
675{ 683{
676 struct attrlist *alist = (struct attrlist *)context->alist; 684 struct attrlist *alist = (struct attrlist *)context->alist;
677 attrlist_ent_t *aep; 685 attrlist_ent_t *aep;
@@ -1980,7 +1988,7 @@ xfs_attr_rmtval_get(xfs_da_args_t *args)
1980 xfs_bmbt_irec_t map[ATTR_RMTVALUE_MAPSIZE]; 1988 xfs_bmbt_irec_t map[ATTR_RMTVALUE_MAPSIZE];
1981 xfs_mount_t *mp; 1989 xfs_mount_t *mp;
1982 xfs_daddr_t dblkno; 1990 xfs_daddr_t dblkno;
1983 xfs_caddr_t dst; 1991 void *dst;
1984 xfs_buf_t *bp; 1992 xfs_buf_t *bp;
1985 int nmap, error, tmp, valuelen, blkcnt, i; 1993 int nmap, error, tmp, valuelen, blkcnt, i;
1986 xfs_dablk_t lblkno; 1994 xfs_dablk_t lblkno;
@@ -2007,15 +2015,14 @@ xfs_attr_rmtval_get(xfs_da_args_t *args)
2007 dblkno = XFS_FSB_TO_DADDR(mp, map[i].br_startblock); 2015 dblkno = XFS_FSB_TO_DADDR(mp, map[i].br_startblock);
2008 blkcnt = XFS_FSB_TO_BB(mp, map[i].br_blockcount); 2016 blkcnt = XFS_FSB_TO_BB(mp, map[i].br_blockcount);
2009 error = xfs_read_buf(mp, mp->m_ddev_targp, dblkno, 2017 error = xfs_read_buf(mp, mp->m_ddev_targp, dblkno,
2010 blkcnt, 2018 blkcnt, XBF_LOCK | XBF_DONT_BLOCK,
2011 XFS_BUF_LOCK | XBF_DONT_BLOCK,
2012 &bp); 2019 &bp);
2013 if (error) 2020 if (error)
2014 return(error); 2021 return(error);
2015 2022
2016 tmp = (valuelen < XFS_BUF_SIZE(bp)) 2023 tmp = (valuelen < XFS_BUF_SIZE(bp))
2017 ? valuelen : XFS_BUF_SIZE(bp); 2024 ? valuelen : XFS_BUF_SIZE(bp);
2018 xfs_biomove(bp, 0, tmp, dst, XFS_B_READ); 2025 xfs_biomove(bp, 0, tmp, dst, XBF_READ);
2019 xfs_buf_relse(bp); 2026 xfs_buf_relse(bp);
2020 dst += tmp; 2027 dst += tmp;
2021 valuelen -= tmp; 2028 valuelen -= tmp;
@@ -2039,7 +2046,7 @@ xfs_attr_rmtval_set(xfs_da_args_t *args)
2039 xfs_inode_t *dp; 2046 xfs_inode_t *dp;
2040 xfs_bmbt_irec_t map; 2047 xfs_bmbt_irec_t map;
2041 xfs_daddr_t dblkno; 2048 xfs_daddr_t dblkno;
2042 xfs_caddr_t src; 2049 void *src;
2043 xfs_buf_t *bp; 2050 xfs_buf_t *bp;
2044 xfs_dablk_t lblkno; 2051 xfs_dablk_t lblkno;
2045 int blkcnt, valuelen, nmap, error, tmp, committed; 2052 int blkcnt, valuelen, nmap, error, tmp, committed;
@@ -2141,13 +2148,13 @@ xfs_attr_rmtval_set(xfs_da_args_t *args)
2141 blkcnt = XFS_FSB_TO_BB(mp, map.br_blockcount); 2148 blkcnt = XFS_FSB_TO_BB(mp, map.br_blockcount);
2142 2149
2143 bp = xfs_buf_get(mp->m_ddev_targp, dblkno, blkcnt, 2150 bp = xfs_buf_get(mp->m_ddev_targp, dblkno, blkcnt,
2144 XFS_BUF_LOCK | XBF_DONT_BLOCK); 2151 XBF_LOCK | XBF_DONT_BLOCK);
2145 ASSERT(bp); 2152 ASSERT(bp);
2146 ASSERT(!XFS_BUF_GETERROR(bp)); 2153 ASSERT(!XFS_BUF_GETERROR(bp));
2147 2154
2148 tmp = (valuelen < XFS_BUF_SIZE(bp)) ? valuelen : 2155 tmp = (valuelen < XFS_BUF_SIZE(bp)) ? valuelen :
2149 XFS_BUF_SIZE(bp); 2156 XFS_BUF_SIZE(bp);
2150 xfs_biomove(bp, 0, tmp, src, XFS_B_WRITE); 2157 xfs_biomove(bp, 0, tmp, src, XBF_WRITE);
2151 if (tmp < XFS_BUF_SIZE(bp)) 2158 if (tmp < XFS_BUF_SIZE(bp))
2152 xfs_biozero(bp, tmp, XFS_BUF_SIZE(bp) - tmp); 2159 xfs_biozero(bp, tmp, XFS_BUF_SIZE(bp) - tmp);
2153 if ((error = xfs_bwrite(mp, bp))) {/* GROT: NOTE: synchronous write */ 2160 if ((error = xfs_bwrite(mp, bp))) {/* GROT: NOTE: synchronous write */
@@ -2208,8 +2215,7 @@ xfs_attr_rmtval_remove(xfs_da_args_t *args)
2208 /* 2215 /*
2209 * If the "remote" value is in the cache, remove it. 2216 * If the "remote" value is in the cache, remove it.
2210 */ 2217 */
2211 bp = xfs_incore(mp->m_ddev_targp, dblkno, blkcnt, 2218 bp = xfs_incore(mp->m_ddev_targp, dblkno, blkcnt, XBF_TRYLOCK);
2212 XFS_INCORE_TRYLOCK);
2213 if (bp) { 2219 if (bp) {
2214 XFS_BUF_STALE(bp); 2220 XFS_BUF_STALE(bp);
2215 XFS_BUF_UNDELAYWRITE(bp); 2221 XFS_BUF_UNDELAYWRITE(bp);
diff --git a/fs/xfs/xfs_attr.h b/fs/xfs/xfs_attr.h
index 59b410ce69a1..e920d68ef509 100644
--- a/fs/xfs/xfs_attr.h
+++ b/fs/xfs/xfs_attr.h
@@ -113,7 +113,7 @@ typedef struct attrlist_cursor_kern {
113 113
114 114
115typedef int (*put_listent_func_t)(struct xfs_attr_list_context *, int, 115typedef int (*put_listent_func_t)(struct xfs_attr_list_context *, int,
116 char *, int, int, char *); 116 unsigned char *, int, int, unsigned char *);
117 117
118typedef struct xfs_attr_list_context { 118typedef struct xfs_attr_list_context {
119 struct xfs_inode *dp; /* inode */ 119 struct xfs_inode *dp; /* inode */
@@ -139,7 +139,6 @@ typedef struct xfs_attr_list_context {
139/* 139/*
140 * Overall external interface routines. 140 * Overall external interface routines.
141 */ 141 */
142int xfs_attr_calc_size(struct xfs_inode *, int, int, int *);
143int xfs_attr_inactive(struct xfs_inode *dp); 142int xfs_attr_inactive(struct xfs_inode *dp);
144int xfs_attr_rmtval_get(struct xfs_da_args *args); 143int xfs_attr_rmtval_get(struct xfs_da_args *args);
145int xfs_attr_list_int(struct xfs_attr_list_context *); 144int xfs_attr_list_int(struct xfs_attr_list_context *);
diff --git a/fs/xfs/xfs_attr_leaf.c b/fs/xfs/xfs_attr_leaf.c
index baf41b5af756..a90ce74fc256 100644
--- a/fs/xfs/xfs_attr_leaf.c
+++ b/fs/xfs/xfs_attr_leaf.c
@@ -521,11 +521,11 @@ xfs_attr_shortform_to_leaf(xfs_da_args_t *args)
521 521
522 sfe = &sf->list[0]; 522 sfe = &sf->list[0];
523 for (i = 0; i < sf->hdr.count; i++) { 523 for (i = 0; i < sf->hdr.count; i++) {
524 nargs.name = (char *)sfe->nameval; 524 nargs.name = sfe->nameval;
525 nargs.namelen = sfe->namelen; 525 nargs.namelen = sfe->namelen;
526 nargs.value = (char *)&sfe->nameval[nargs.namelen]; 526 nargs.value = &sfe->nameval[nargs.namelen];
527 nargs.valuelen = sfe->valuelen; 527 nargs.valuelen = sfe->valuelen;
528 nargs.hashval = xfs_da_hashname((char *)sfe->nameval, 528 nargs.hashval = xfs_da_hashname(sfe->nameval,
529 sfe->namelen); 529 sfe->namelen);
530 nargs.flags = XFS_ATTR_NSP_ONDISK_TO_ARGS(sfe->flags); 530 nargs.flags = XFS_ATTR_NSP_ONDISK_TO_ARGS(sfe->flags);
531 error = xfs_attr_leaf_lookup_int(bp, &nargs); /* set a->index */ 531 error = xfs_attr_leaf_lookup_int(bp, &nargs); /* set a->index */
@@ -612,10 +612,10 @@ xfs_attr_shortform_list(xfs_attr_list_context_t *context)
612 for (i = 0, sfe = &sf->list[0]; i < sf->hdr.count; i++) { 612 for (i = 0, sfe = &sf->list[0]; i < sf->hdr.count; i++) {
613 error = context->put_listent(context, 613 error = context->put_listent(context,
614 sfe->flags, 614 sfe->flags,
615 (char *)sfe->nameval, 615 sfe->nameval,
616 (int)sfe->namelen, 616 (int)sfe->namelen,
617 (int)sfe->valuelen, 617 (int)sfe->valuelen,
618 (char*)&sfe->nameval[sfe->namelen]); 618 &sfe->nameval[sfe->namelen]);
619 619
620 /* 620 /*
621 * Either search callback finished early or 621 * Either search callback finished early or
@@ -659,8 +659,8 @@ xfs_attr_shortform_list(xfs_attr_list_context_t *context)
659 } 659 }
660 660
661 sbp->entno = i; 661 sbp->entno = i;
662 sbp->hash = xfs_da_hashname((char *)sfe->nameval, sfe->namelen); 662 sbp->hash = xfs_da_hashname(sfe->nameval, sfe->namelen);
663 sbp->name = (char *)sfe->nameval; 663 sbp->name = sfe->nameval;
664 sbp->namelen = sfe->namelen; 664 sbp->namelen = sfe->namelen;
665 /* These are bytes, and both on-disk, don't endian-flip */ 665 /* These are bytes, and both on-disk, don't endian-flip */
666 sbp->valuelen = sfe->valuelen; 666 sbp->valuelen = sfe->valuelen;
@@ -818,9 +818,9 @@ xfs_attr_leaf_to_shortform(xfs_dabuf_t *bp, xfs_da_args_t *args, int forkoff)
818 continue; 818 continue;
819 ASSERT(entry->flags & XFS_ATTR_LOCAL); 819 ASSERT(entry->flags & XFS_ATTR_LOCAL);
820 name_loc = xfs_attr_leaf_name_local(leaf, i); 820 name_loc = xfs_attr_leaf_name_local(leaf, i);
821 nargs.name = (char *)name_loc->nameval; 821 nargs.name = name_loc->nameval;
822 nargs.namelen = name_loc->namelen; 822 nargs.namelen = name_loc->namelen;
823 nargs.value = (char *)&name_loc->nameval[nargs.namelen]; 823 nargs.value = &name_loc->nameval[nargs.namelen];
824 nargs.valuelen = be16_to_cpu(name_loc->valuelen); 824 nargs.valuelen = be16_to_cpu(name_loc->valuelen);
825 nargs.hashval = be32_to_cpu(entry->hashval); 825 nargs.hashval = be32_to_cpu(entry->hashval);
826 nargs.flags = XFS_ATTR_NSP_ONDISK_TO_ARGS(entry->flags); 826 nargs.flags = XFS_ATTR_NSP_ONDISK_TO_ARGS(entry->flags);
@@ -2370,10 +2370,10 @@ xfs_attr_leaf_list_int(xfs_dabuf_t *bp, xfs_attr_list_context_t *context)
2370 2370
2371 retval = context->put_listent(context, 2371 retval = context->put_listent(context,
2372 entry->flags, 2372 entry->flags,
2373 (char *)name_loc->nameval, 2373 name_loc->nameval,
2374 (int)name_loc->namelen, 2374 (int)name_loc->namelen,
2375 be16_to_cpu(name_loc->valuelen), 2375 be16_to_cpu(name_loc->valuelen),
2376 (char *)&name_loc->nameval[name_loc->namelen]); 2376 &name_loc->nameval[name_loc->namelen]);
2377 if (retval) 2377 if (retval)
2378 return retval; 2378 return retval;
2379 } else { 2379 } else {
@@ -2397,15 +2397,15 @@ xfs_attr_leaf_list_int(xfs_dabuf_t *bp, xfs_attr_list_context_t *context)
2397 return retval; 2397 return retval;
2398 retval = context->put_listent(context, 2398 retval = context->put_listent(context,
2399 entry->flags, 2399 entry->flags,
2400 (char *)name_rmt->name, 2400 name_rmt->name,
2401 (int)name_rmt->namelen, 2401 (int)name_rmt->namelen,
2402 valuelen, 2402 valuelen,
2403 (char*)args.value); 2403 args.value);
2404 kmem_free(args.value); 2404 kmem_free(args.value);
2405 } else { 2405 } else {
2406 retval = context->put_listent(context, 2406 retval = context->put_listent(context,
2407 entry->flags, 2407 entry->flags,
2408 (char *)name_rmt->name, 2408 name_rmt->name,
2409 (int)name_rmt->namelen, 2409 (int)name_rmt->namelen,
2410 valuelen, 2410 valuelen,
2411 NULL); 2411 NULL);
@@ -2950,7 +2950,7 @@ xfs_attr_leaf_freextent(xfs_trans_t **trans, xfs_inode_t *dp,
2950 map.br_blockcount); 2950 map.br_blockcount);
2951 bp = xfs_trans_get_buf(*trans, 2951 bp = xfs_trans_get_buf(*trans,
2952 dp->i_mount->m_ddev_targp, 2952 dp->i_mount->m_ddev_targp,
2953 dblkno, dblkcnt, XFS_BUF_LOCK); 2953 dblkno, dblkcnt, XBF_LOCK);
2954 xfs_trans_binval(*trans, bp); 2954 xfs_trans_binval(*trans, bp);
2955 /* 2955 /*
2956 * Roll to next transaction. 2956 * Roll to next transaction.
diff --git a/fs/xfs/xfs_attr_sf.h b/fs/xfs/xfs_attr_sf.h
index 76ab7b0cbb3a..919756e3ba53 100644
--- a/fs/xfs/xfs_attr_sf.h
+++ b/fs/xfs/xfs_attr_sf.h
@@ -52,7 +52,7 @@ typedef struct xfs_attr_sf_sort {
52 __uint8_t valuelen; /* length of value */ 52 __uint8_t valuelen; /* length of value */
53 __uint8_t flags; /* flags bits (see xfs_attr_leaf.h) */ 53 __uint8_t flags; /* flags bits (see xfs_attr_leaf.h) */
54 xfs_dahash_t hash; /* this entry's hash value */ 54 xfs_dahash_t hash; /* this entry's hash value */
55 char *name; /* name value, pointer into buffer */ 55 unsigned char *name; /* name value, pointer into buffer */
56} xfs_attr_sf_sort_t; 56} xfs_attr_sf_sort_t;
57 57
58#define XFS_ATTR_SF_ENTSIZE_BYNAME(nlen,vlen) /* space name/value uses */ \ 58#define XFS_ATTR_SF_ENTSIZE_BYNAME(nlen,vlen) /* space name/value uses */ \
diff --git a/fs/xfs/xfs_bmap.c b/fs/xfs/xfs_bmap.c
index 98251cdc52aa..1869fb973819 100644
--- a/fs/xfs/xfs_bmap.c
+++ b/fs/xfs/xfs_bmap.c
@@ -2629,13 +2629,12 @@ xfs_bmap_btalloc(
2629 if (startag == NULLAGNUMBER) 2629 if (startag == NULLAGNUMBER)
2630 startag = ag = 0; 2630 startag = ag = 0;
2631 notinit = 0; 2631 notinit = 0;
2632 down_read(&mp->m_peraglock); 2632 pag = xfs_perag_get(mp, ag);
2633 while (blen < ap->alen) { 2633 while (blen < ap->alen) {
2634 pag = &mp->m_perag[ag];
2635 if (!pag->pagf_init && 2634 if (!pag->pagf_init &&
2636 (error = xfs_alloc_pagf_init(mp, args.tp, 2635 (error = xfs_alloc_pagf_init(mp, args.tp,
2637 ag, XFS_ALLOC_FLAG_TRYLOCK))) { 2636 ag, XFS_ALLOC_FLAG_TRYLOCK))) {
2638 up_read(&mp->m_peraglock); 2637 xfs_perag_put(pag);
2639 return error; 2638 return error;
2640 } 2639 }
2641 /* 2640 /*
@@ -2667,13 +2666,13 @@ xfs_bmap_btalloc(
2667 break; 2666 break;
2668 2667
2669 error = xfs_filestream_new_ag(ap, &ag); 2668 error = xfs_filestream_new_ag(ap, &ag);
2670 if (error) { 2669 xfs_perag_put(pag);
2671 up_read(&mp->m_peraglock); 2670 if (error)
2672 return error; 2671 return error;
2673 }
2674 2672
2675 /* loop again to set 'blen'*/ 2673 /* loop again to set 'blen'*/
2676 startag = NULLAGNUMBER; 2674 startag = NULLAGNUMBER;
2675 pag = xfs_perag_get(mp, ag);
2677 continue; 2676 continue;
2678 } 2677 }
2679 } 2678 }
@@ -2681,8 +2680,10 @@ xfs_bmap_btalloc(
2681 ag = 0; 2680 ag = 0;
2682 if (ag == startag) 2681 if (ag == startag)
2683 break; 2682 break;
2683 xfs_perag_put(pag);
2684 pag = xfs_perag_get(mp, ag);
2684 } 2685 }
2685 up_read(&mp->m_peraglock); 2686 xfs_perag_put(pag);
2686 /* 2687 /*
2687 * Since the above loop did a BUF_TRYLOCK, it is 2688 * Since the above loop did a BUF_TRYLOCK, it is
2688 * possible that there is space for this request. 2689 * possible that there is space for this request.
@@ -4470,7 +4471,7 @@ xfs_bmapi(
4470 xfs_fsblock_t abno; /* allocated block number */ 4471 xfs_fsblock_t abno; /* allocated block number */
4471 xfs_extlen_t alen; /* allocated extent length */ 4472 xfs_extlen_t alen; /* allocated extent length */
4472 xfs_fileoff_t aoff; /* allocated file offset */ 4473 xfs_fileoff_t aoff; /* allocated file offset */
4473 xfs_bmalloca_t bma; /* args for xfs_bmap_alloc */ 4474 xfs_bmalloca_t bma = { 0 }; /* args for xfs_bmap_alloc */
4474 xfs_btree_cur_t *cur; /* bmap btree cursor */ 4475 xfs_btree_cur_t *cur; /* bmap btree cursor */
4475 xfs_fileoff_t end; /* end of mapped file region */ 4476 xfs_fileoff_t end; /* end of mapped file region */
4476 int eof; /* we've hit the end of extents */ 4477 int eof; /* we've hit the end of extents */
diff --git a/fs/xfs/xfs_bmap_btree.c b/fs/xfs/xfs_bmap_btree.c
index 38751d5fac6f..416e47e54b83 100644
--- a/fs/xfs/xfs_bmap_btree.c
+++ b/fs/xfs/xfs_bmap_btree.c
@@ -334,7 +334,7 @@ xfs_bmbt_disk_set_allf(
334/* 334/*
335 * Set all the fields in a bmap extent record from the uncompressed form. 335 * Set all the fields in a bmap extent record from the uncompressed form.
336 */ 336 */
337void 337STATIC void
338xfs_bmbt_disk_set_all( 338xfs_bmbt_disk_set_all(
339 xfs_bmbt_rec_t *r, 339 xfs_bmbt_rec_t *r,
340 xfs_bmbt_irec_t *s) 340 xfs_bmbt_irec_t *s)
diff --git a/fs/xfs/xfs_bmap_btree.h b/fs/xfs/xfs_bmap_btree.h
index cf07ca7c22e7..0e66c4ea0f85 100644
--- a/fs/xfs/xfs_bmap_btree.h
+++ b/fs/xfs/xfs_bmap_btree.h
@@ -223,7 +223,6 @@ extern void xfs_bmbt_set_startblock(xfs_bmbt_rec_host_t *r, xfs_fsblock_t v);
223extern void xfs_bmbt_set_startoff(xfs_bmbt_rec_host_t *r, xfs_fileoff_t v); 223extern void xfs_bmbt_set_startoff(xfs_bmbt_rec_host_t *r, xfs_fileoff_t v);
224extern void xfs_bmbt_set_state(xfs_bmbt_rec_host_t *r, xfs_exntst_t v); 224extern void xfs_bmbt_set_state(xfs_bmbt_rec_host_t *r, xfs_exntst_t v);
225 225
226extern void xfs_bmbt_disk_set_all(xfs_bmbt_rec_t *r, xfs_bmbt_irec_t *s);
227extern void xfs_bmbt_disk_set_allf(xfs_bmbt_rec_t *r, xfs_fileoff_t o, 226extern void xfs_bmbt_disk_set_allf(xfs_bmbt_rec_t *r, xfs_fileoff_t o,
228 xfs_fsblock_t b, xfs_filblks_t c, xfs_exntst_t v); 227 xfs_fsblock_t b, xfs_filblks_t c, xfs_exntst_t v);
229 228
diff --git a/fs/xfs/xfs_btree.c b/fs/xfs/xfs_btree.c
index 36a0992dd669..96be4b0f2496 100644
--- a/fs/xfs/xfs_btree.c
+++ b/fs/xfs/xfs_btree.c
@@ -977,7 +977,7 @@ xfs_btree_get_buf_block(
977 xfs_daddr_t d; 977 xfs_daddr_t d;
978 978
979 /* need to sort out how callers deal with failures first */ 979 /* need to sort out how callers deal with failures first */
980 ASSERT(!(flags & XFS_BUF_TRYLOCK)); 980 ASSERT(!(flags & XBF_TRYLOCK));
981 981
982 d = xfs_btree_ptr_to_daddr(cur, ptr); 982 d = xfs_btree_ptr_to_daddr(cur, ptr);
983 *bpp = xfs_trans_get_buf(cur->bc_tp, mp->m_ddev_targp, d, 983 *bpp = xfs_trans_get_buf(cur->bc_tp, mp->m_ddev_targp, d,
@@ -1008,7 +1008,7 @@ xfs_btree_read_buf_block(
1008 int error; 1008 int error;
1009 1009
1010 /* need to sort out how callers deal with failures first */ 1010 /* need to sort out how callers deal with failures first */
1011 ASSERT(!(flags & XFS_BUF_TRYLOCK)); 1011 ASSERT(!(flags & XBF_TRYLOCK));
1012 1012
1013 d = xfs_btree_ptr_to_daddr(cur, ptr); 1013 d = xfs_btree_ptr_to_daddr(cur, ptr);
1014 error = xfs_trans_read_buf(mp, cur->bc_tp, mp->m_ddev_targp, d, 1014 error = xfs_trans_read_buf(mp, cur->bc_tp, mp->m_ddev_targp, d,
diff --git a/fs/xfs/xfs_buf_item.c b/fs/xfs/xfs_buf_item.c
index a30f7e9eb2b9..f3c49e69eab9 100644
--- a/fs/xfs/xfs_buf_item.c
+++ b/fs/xfs/xfs_buf_item.c
@@ -250,7 +250,7 @@ xfs_buf_item_format(
250 ((bip->bli_format.blf_map_size - 1) * sizeof(uint))); 250 ((bip->bli_format.blf_map_size - 1) * sizeof(uint)));
251 vecp->i_addr = (xfs_caddr_t)&bip->bli_format; 251 vecp->i_addr = (xfs_caddr_t)&bip->bli_format;
252 vecp->i_len = base_size; 252 vecp->i_len = base_size;
253 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_BFORMAT); 253 vecp->i_type = XLOG_REG_TYPE_BFORMAT;
254 vecp++; 254 vecp++;
255 nvecs = 1; 255 nvecs = 1;
256 256
@@ -297,14 +297,14 @@ xfs_buf_item_format(
297 buffer_offset = first_bit * XFS_BLI_CHUNK; 297 buffer_offset = first_bit * XFS_BLI_CHUNK;
298 vecp->i_addr = xfs_buf_offset(bp, buffer_offset); 298 vecp->i_addr = xfs_buf_offset(bp, buffer_offset);
299 vecp->i_len = nbits * XFS_BLI_CHUNK; 299 vecp->i_len = nbits * XFS_BLI_CHUNK;
300 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_BCHUNK); 300 vecp->i_type = XLOG_REG_TYPE_BCHUNK;
301 nvecs++; 301 nvecs++;
302 break; 302 break;
303 } else if (next_bit != last_bit + 1) { 303 } else if (next_bit != last_bit + 1) {
304 buffer_offset = first_bit * XFS_BLI_CHUNK; 304 buffer_offset = first_bit * XFS_BLI_CHUNK;
305 vecp->i_addr = xfs_buf_offset(bp, buffer_offset); 305 vecp->i_addr = xfs_buf_offset(bp, buffer_offset);
306 vecp->i_len = nbits * XFS_BLI_CHUNK; 306 vecp->i_len = nbits * XFS_BLI_CHUNK;
307 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_BCHUNK); 307 vecp->i_type = XLOG_REG_TYPE_BCHUNK;
308 nvecs++; 308 nvecs++;
309 vecp++; 309 vecp++;
310 first_bit = next_bit; 310 first_bit = next_bit;
@@ -316,7 +316,7 @@ xfs_buf_item_format(
316 buffer_offset = first_bit * XFS_BLI_CHUNK; 316 buffer_offset = first_bit * XFS_BLI_CHUNK;
317 vecp->i_addr = xfs_buf_offset(bp, buffer_offset); 317 vecp->i_addr = xfs_buf_offset(bp, buffer_offset);
318 vecp->i_len = nbits * XFS_BLI_CHUNK; 318 vecp->i_len = nbits * XFS_BLI_CHUNK;
319 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_BCHUNK); 319 vecp->i_type = XLOG_REG_TYPE_BCHUNK;
320/* You would think we need to bump the nvecs here too, but we do not 320/* You would think we need to bump the nvecs here too, but we do not
321 * this number is used by recovery, and it gets confused by the boundary 321 * this number is used by recovery, and it gets confused by the boundary
322 * split here 322 * split here
@@ -467,8 +467,10 @@ xfs_buf_item_unpin_remove(
467/* 467/*
468 * This is called to attempt to lock the buffer associated with this 468 * This is called to attempt to lock the buffer associated with this
469 * buf log item. Don't sleep on the buffer lock. If we can't get 469 * buf log item. Don't sleep on the buffer lock. If we can't get
470 * the lock right away, return 0. If we can get the lock, pull the 470 * the lock right away, return 0. If we can get the lock, take a
471 * buffer from the free list, mark it busy, and return 1. 471 * reference to the buffer. If this is a delayed write buffer that
472 * needs AIL help to be written back, invoke the pushbuf routine
473 * rather than the normal success path.
472 */ 474 */
473STATIC uint 475STATIC uint
474xfs_buf_item_trylock( 476xfs_buf_item_trylock(
@@ -477,24 +479,18 @@ xfs_buf_item_trylock(
477 xfs_buf_t *bp; 479 xfs_buf_t *bp;
478 480
479 bp = bip->bli_buf; 481 bp = bip->bli_buf;
480 482 if (XFS_BUF_ISPINNED(bp))
481 if (XFS_BUF_ISPINNED(bp)) {
482 return XFS_ITEM_PINNED; 483 return XFS_ITEM_PINNED;
483 } 484 if (!XFS_BUF_CPSEMA(bp))
484
485 if (!XFS_BUF_CPSEMA(bp)) {
486 return XFS_ITEM_LOCKED; 485 return XFS_ITEM_LOCKED;
487 }
488 486
489 /* 487 /* take a reference to the buffer. */
490 * Remove the buffer from the free list. Only do this
491 * if it's on the free list. Private buffers like the
492 * superblock buffer are not.
493 */
494 XFS_BUF_HOLD(bp); 488 XFS_BUF_HOLD(bp);
495 489
496 ASSERT(!(bip->bli_flags & XFS_BLI_STALE)); 490 ASSERT(!(bip->bli_flags & XFS_BLI_STALE));
497 trace_xfs_buf_item_trylock(bip); 491 trace_xfs_buf_item_trylock(bip);
492 if (XFS_BUF_ISDELAYWRITE(bp))
493 return XFS_ITEM_PUSHBUF;
498 return XFS_ITEM_SUCCESS; 494 return XFS_ITEM_SUCCESS;
499} 495}
500 496
@@ -626,11 +622,9 @@ xfs_buf_item_committed(
626} 622}
627 623
628/* 624/*
629 * This is called to asynchronously write the buffer associated with this 625 * The buffer is locked, but is not a delayed write buffer. This happens
630 * buf log item out to disk. The buffer will already have been locked by 626 * if we race with IO completion and hence we don't want to try to write it
631 * a successful call to xfs_buf_item_trylock(). If the buffer still has 627 * again. Just release the buffer.
632 * B_DELWRI set, then get it going out to disk with a call to bawrite().
633 * If not, then just release the buffer.
634 */ 628 */
635STATIC void 629STATIC void
636xfs_buf_item_push( 630xfs_buf_item_push(
@@ -642,17 +636,29 @@ xfs_buf_item_push(
642 trace_xfs_buf_item_push(bip); 636 trace_xfs_buf_item_push(bip);
643 637
644 bp = bip->bli_buf; 638 bp = bip->bli_buf;
639 ASSERT(!XFS_BUF_ISDELAYWRITE(bp));
640 xfs_buf_relse(bp);
641}
645 642
646 if (XFS_BUF_ISDELAYWRITE(bp)) { 643/*
647 int error; 644 * The buffer is locked and is a delayed write buffer. Promote the buffer
648 error = xfs_bawrite(bip->bli_item.li_mountp, bp); 645 * in the delayed write queue as the caller knows that they must invoke
649 if (error) 646 * the xfsbufd to get this buffer written. We have to unlock the buffer
650 xfs_fs_cmn_err(CE_WARN, bip->bli_item.li_mountp, 647 * to allow the xfsbufd to write it, too.
651 "xfs_buf_item_push: pushbuf error %d on bip %p, bp %p", 648 */
652 error, bip, bp); 649STATIC void
653 } else { 650xfs_buf_item_pushbuf(
654 xfs_buf_relse(bp); 651 xfs_buf_log_item_t *bip)
655 } 652{
653 xfs_buf_t *bp;
654
655 ASSERT(!(bip->bli_flags & XFS_BLI_STALE));
656 trace_xfs_buf_item_pushbuf(bip);
657
658 bp = bip->bli_buf;
659 ASSERT(XFS_BUF_ISDELAYWRITE(bp));
660 xfs_buf_delwri_promote(bp);
661 xfs_buf_relse(bp);
656} 662}
657 663
658/* ARGSUSED */ 664/* ARGSUSED */
@@ -677,7 +683,7 @@ static struct xfs_item_ops xfs_buf_item_ops = {
677 .iop_committed = (xfs_lsn_t(*)(xfs_log_item_t*, xfs_lsn_t)) 683 .iop_committed = (xfs_lsn_t(*)(xfs_log_item_t*, xfs_lsn_t))
678 xfs_buf_item_committed, 684 xfs_buf_item_committed,
679 .iop_push = (void(*)(xfs_log_item_t*))xfs_buf_item_push, 685 .iop_push = (void(*)(xfs_log_item_t*))xfs_buf_item_push,
680 .iop_pushbuf = NULL, 686 .iop_pushbuf = (void(*)(xfs_log_item_t*))xfs_buf_item_pushbuf,
681 .iop_committing = (void(*)(xfs_log_item_t*, xfs_lsn_t)) 687 .iop_committing = (void(*)(xfs_log_item_t*, xfs_lsn_t))
682 xfs_buf_item_committing 688 xfs_buf_item_committing
683}; 689};
diff --git a/fs/xfs/xfs_da_btree.c b/fs/xfs/xfs_da_btree.c
index c0c8869115b1..0ca556b4bf31 100644
--- a/fs/xfs/xfs_da_btree.c
+++ b/fs/xfs/xfs_da_btree.c
@@ -1534,8 +1534,8 @@ xfs_da_hashname(const __uint8_t *name, int namelen)
1534enum xfs_dacmp 1534enum xfs_dacmp
1535xfs_da_compname( 1535xfs_da_compname(
1536 struct xfs_da_args *args, 1536 struct xfs_da_args *args,
1537 const char *name, 1537 const unsigned char *name,
1538 int len) 1538 int len)
1539{ 1539{
1540 return (args->namelen == len && memcmp(args->name, name, len) == 0) ? 1540 return (args->namelen == len && memcmp(args->name, name, len) == 0) ?
1541 XFS_CMP_EXACT : XFS_CMP_DIFFERENT; 1541 XFS_CMP_EXACT : XFS_CMP_DIFFERENT;
diff --git a/fs/xfs/xfs_da_btree.h b/fs/xfs/xfs_da_btree.h
index 30cd08f56a3a..fe9f5a8c1d2a 100644
--- a/fs/xfs/xfs_da_btree.h
+++ b/fs/xfs/xfs_da_btree.h
@@ -209,7 +209,8 @@ typedef struct xfs_da_state {
209 */ 209 */
210struct xfs_nameops { 210struct xfs_nameops {
211 xfs_dahash_t (*hashname)(struct xfs_name *); 211 xfs_dahash_t (*hashname)(struct xfs_name *);
212 enum xfs_dacmp (*compname)(struct xfs_da_args *, const char *, int); 212 enum xfs_dacmp (*compname)(struct xfs_da_args *,
213 const unsigned char *, int);
213}; 214};
214 215
215 216
@@ -260,7 +261,7 @@ int xfs_da_shrink_inode(xfs_da_args_t *args, xfs_dablk_t dead_blkno,
260 261
261uint xfs_da_hashname(const __uint8_t *name_string, int name_length); 262uint xfs_da_hashname(const __uint8_t *name_string, int name_length);
262enum xfs_dacmp xfs_da_compname(struct xfs_da_args *args, 263enum xfs_dacmp xfs_da_compname(struct xfs_da_args *args,
263 const char *name, int len); 264 const unsigned char *name, int len);
264 265
265 266
266xfs_da_state_t *xfs_da_state_alloc(void); 267xfs_da_state_t *xfs_da_state_alloc(void);
diff --git a/fs/xfs/xfs_dfrag.c b/fs/xfs/xfs_dfrag.c
index 84ca1cf16a1e..cd27c9d6c71f 100644
--- a/fs/xfs/xfs_dfrag.c
+++ b/fs/xfs/xfs_dfrag.c
@@ -45,15 +45,21 @@
45#include "xfs_vnodeops.h" 45#include "xfs_vnodeops.h"
46#include "xfs_trace.h" 46#include "xfs_trace.h"
47 47
48
49static int xfs_swap_extents(
50 xfs_inode_t *ip, /* target inode */
51 xfs_inode_t *tip, /* tmp inode */
52 xfs_swapext_t *sxp);
53
48/* 54/*
49 * Syssgi interface for swapext 55 * ioctl interface for swapext
50 */ 56 */
51int 57int
52xfs_swapext( 58xfs_swapext(
53 xfs_swapext_t *sxp) 59 xfs_swapext_t *sxp)
54{ 60{
55 xfs_inode_t *ip, *tip; 61 xfs_inode_t *ip, *tip;
56 struct file *file, *target_file; 62 struct file *file, *tmp_file;
57 int error = 0; 63 int error = 0;
58 64
59 /* Pull information for the target fd */ 65 /* Pull information for the target fd */
@@ -68,46 +74,46 @@ xfs_swapext(
68 goto out_put_file; 74 goto out_put_file;
69 } 75 }
70 76
71 target_file = fget((int)sxp->sx_fdtmp); 77 tmp_file = fget((int)sxp->sx_fdtmp);
72 if (!target_file) { 78 if (!tmp_file) {
73 error = XFS_ERROR(EINVAL); 79 error = XFS_ERROR(EINVAL);
74 goto out_put_file; 80 goto out_put_file;
75 } 81 }
76 82
77 if (!(target_file->f_mode & FMODE_WRITE) || 83 if (!(tmp_file->f_mode & FMODE_WRITE) ||
78 (target_file->f_flags & O_APPEND)) { 84 (tmp_file->f_flags & O_APPEND)) {
79 error = XFS_ERROR(EBADF); 85 error = XFS_ERROR(EBADF);
80 goto out_put_target_file; 86 goto out_put_tmp_file;
81 } 87 }
82 88
83 if (IS_SWAPFILE(file->f_path.dentry->d_inode) || 89 if (IS_SWAPFILE(file->f_path.dentry->d_inode) ||
84 IS_SWAPFILE(target_file->f_path.dentry->d_inode)) { 90 IS_SWAPFILE(tmp_file->f_path.dentry->d_inode)) {
85 error = XFS_ERROR(EINVAL); 91 error = XFS_ERROR(EINVAL);
86 goto out_put_target_file; 92 goto out_put_tmp_file;
87 } 93 }
88 94
89 ip = XFS_I(file->f_path.dentry->d_inode); 95 ip = XFS_I(file->f_path.dentry->d_inode);
90 tip = XFS_I(target_file->f_path.dentry->d_inode); 96 tip = XFS_I(tmp_file->f_path.dentry->d_inode);
91 97
92 if (ip->i_mount != tip->i_mount) { 98 if (ip->i_mount != tip->i_mount) {
93 error = XFS_ERROR(EINVAL); 99 error = XFS_ERROR(EINVAL);
94 goto out_put_target_file; 100 goto out_put_tmp_file;
95 } 101 }
96 102
97 if (ip->i_ino == tip->i_ino) { 103 if (ip->i_ino == tip->i_ino) {
98 error = XFS_ERROR(EINVAL); 104 error = XFS_ERROR(EINVAL);
99 goto out_put_target_file; 105 goto out_put_tmp_file;
100 } 106 }
101 107
102 if (XFS_FORCED_SHUTDOWN(ip->i_mount)) { 108 if (XFS_FORCED_SHUTDOWN(ip->i_mount)) {
103 error = XFS_ERROR(EIO); 109 error = XFS_ERROR(EIO);
104 goto out_put_target_file; 110 goto out_put_tmp_file;
105 } 111 }
106 112
107 error = xfs_swap_extents(ip, tip, sxp); 113 error = xfs_swap_extents(ip, tip, sxp);
108 114
109 out_put_target_file: 115 out_put_tmp_file:
110 fput(target_file); 116 fput(tmp_file);
111 out_put_file: 117 out_put_file:
112 fput(file); 118 fput(file);
113 out: 119 out:
@@ -186,7 +192,7 @@ xfs_swap_extents_check_format(
186 return 0; 192 return 0;
187} 193}
188 194
189int 195static int
190xfs_swap_extents( 196xfs_swap_extents(
191 xfs_inode_t *ip, /* target inode */ 197 xfs_inode_t *ip, /* target inode */
192 xfs_inode_t *tip, /* tmp inode */ 198 xfs_inode_t *tip, /* tmp inode */
@@ -254,6 +260,9 @@ xfs_swap_extents(
254 goto out_unlock; 260 goto out_unlock;
255 } 261 }
256 262
263 trace_xfs_swap_extent_before(ip, 0);
264 trace_xfs_swap_extent_before(tip, 1);
265
257 /* check inode formats now that data is flushed */ 266 /* check inode formats now that data is flushed */
258 error = xfs_swap_extents_check_format(ip, tip); 267 error = xfs_swap_extents_check_format(ip, tip);
259 if (error) { 268 if (error) {
@@ -421,6 +430,8 @@ xfs_swap_extents(
421 430
422 error = xfs_trans_commit(tp, XFS_TRANS_SWAPEXT); 431 error = xfs_trans_commit(tp, XFS_TRANS_SWAPEXT);
423 432
433 trace_xfs_swap_extent_after(ip, 0);
434 trace_xfs_swap_extent_after(tip, 1);
424out: 435out:
425 kmem_free(tempifp); 436 kmem_free(tempifp);
426 return error; 437 return error;
diff --git a/fs/xfs/xfs_dfrag.h b/fs/xfs/xfs_dfrag.h
index 4f55a6306558..20bdd935c121 100644
--- a/fs/xfs/xfs_dfrag.h
+++ b/fs/xfs/xfs_dfrag.h
@@ -48,9 +48,6 @@ typedef struct xfs_swapext
48 */ 48 */
49int xfs_swapext(struct xfs_swapext *sx); 49int xfs_swapext(struct xfs_swapext *sx);
50 50
51int xfs_swap_extents(struct xfs_inode *ip, struct xfs_inode *tip,
52 struct xfs_swapext *sxp);
53
54#endif /* __KERNEL__ */ 51#endif /* __KERNEL__ */
55 52
56#endif /* __XFS_DFRAG_H__ */ 53#endif /* __XFS_DFRAG_H__ */
diff --git a/fs/xfs/xfs_dir2.c b/fs/xfs/xfs_dir2.c
index 93634a7e90e9..42520f041265 100644
--- a/fs/xfs/xfs_dir2.c
+++ b/fs/xfs/xfs_dir2.c
@@ -44,7 +44,7 @@
44#include "xfs_vnodeops.h" 44#include "xfs_vnodeops.h"
45#include "xfs_trace.h" 45#include "xfs_trace.h"
46 46
47struct xfs_name xfs_name_dotdot = {"..", 2}; 47struct xfs_name xfs_name_dotdot = { (unsigned char *)"..", 2};
48 48
49/* 49/*
50 * ASCII case-insensitive (ie. A-Z) support for directories that was 50 * ASCII case-insensitive (ie. A-Z) support for directories that was
@@ -66,8 +66,8 @@ xfs_ascii_ci_hashname(
66STATIC enum xfs_dacmp 66STATIC enum xfs_dacmp
67xfs_ascii_ci_compname( 67xfs_ascii_ci_compname(
68 struct xfs_da_args *args, 68 struct xfs_da_args *args,
69 const char *name, 69 const unsigned char *name,
70 int len) 70 int len)
71{ 71{
72 enum xfs_dacmp result; 72 enum xfs_dacmp result;
73 int i; 73 int i;
@@ -247,7 +247,7 @@ xfs_dir_createname(
247int 247int
248xfs_dir_cilookup_result( 248xfs_dir_cilookup_result(
249 struct xfs_da_args *args, 249 struct xfs_da_args *args,
250 const char *name, 250 const unsigned char *name,
251 int len) 251 int len)
252{ 252{
253 if (args->cmpresult == XFS_CMP_DIFFERENT) 253 if (args->cmpresult == XFS_CMP_DIFFERENT)
diff --git a/fs/xfs/xfs_dir2.h b/fs/xfs/xfs_dir2.h
index 1d9ef96f33aa..74a3b1057685 100644
--- a/fs/xfs/xfs_dir2.h
+++ b/fs/xfs/xfs_dir2.h
@@ -100,7 +100,7 @@ extern int xfs_dir2_isleaf(struct xfs_trans *tp, struct xfs_inode *dp,
100extern int xfs_dir2_shrink_inode(struct xfs_da_args *args, xfs_dir2_db_t db, 100extern int xfs_dir2_shrink_inode(struct xfs_da_args *args, xfs_dir2_db_t db,
101 struct xfs_dabuf *bp); 101 struct xfs_dabuf *bp);
102 102
103extern int xfs_dir_cilookup_result(struct xfs_da_args *args, const char *name, 103extern int xfs_dir_cilookup_result(struct xfs_da_args *args,
104 int len); 104 const unsigned char *name, int len);
105 105
106#endif /* __XFS_DIR2_H__ */ 106#endif /* __XFS_DIR2_H__ */
diff --git a/fs/xfs/xfs_dir2_block.c b/fs/xfs/xfs_dir2_block.c
index ddc4ecc7807f..779a267b0a84 100644
--- a/fs/xfs/xfs_dir2_block.c
+++ b/fs/xfs/xfs_dir2_block.c
@@ -57,8 +57,8 @@ static xfs_dahash_t xfs_dir_hash_dot, xfs_dir_hash_dotdot;
57void 57void
58xfs_dir_startup(void) 58xfs_dir_startup(void)
59{ 59{
60 xfs_dir_hash_dot = xfs_da_hashname(".", 1); 60 xfs_dir_hash_dot = xfs_da_hashname((unsigned char *)".", 1);
61 xfs_dir_hash_dotdot = xfs_da_hashname("..", 2); 61 xfs_dir_hash_dotdot = xfs_da_hashname((unsigned char *)"..", 2);
62} 62}
63 63
64/* 64/*
@@ -513,8 +513,9 @@ xfs_dir2_block_getdents(
513 /* 513 /*
514 * If it didn't fit, set the final offset to here & return. 514 * If it didn't fit, set the final offset to here & return.
515 */ 515 */
516 if (filldir(dirent, dep->name, dep->namelen, cook & 0x7fffffff, 516 if (filldir(dirent, (char *)dep->name, dep->namelen,
517 be64_to_cpu(dep->inumber), DT_UNKNOWN)) { 517 cook & 0x7fffffff, be64_to_cpu(dep->inumber),
518 DT_UNKNOWN)) {
518 *offset = cook & 0x7fffffff; 519 *offset = cook & 0x7fffffff;
519 xfs_da_brelse(NULL, bp); 520 xfs_da_brelse(NULL, bp);
520 return 0; 521 return 0;
diff --git a/fs/xfs/xfs_dir2_leaf.c b/fs/xfs/xfs_dir2_leaf.c
index 29f484c11b3a..e2d89854ec9e 100644
--- a/fs/xfs/xfs_dir2_leaf.c
+++ b/fs/xfs/xfs_dir2_leaf.c
@@ -1081,7 +1081,7 @@ xfs_dir2_leaf_getdents(
1081 dep = (xfs_dir2_data_entry_t *)ptr; 1081 dep = (xfs_dir2_data_entry_t *)ptr;
1082 length = xfs_dir2_data_entsize(dep->namelen); 1082 length = xfs_dir2_data_entsize(dep->namelen);
1083 1083
1084 if (filldir(dirent, dep->name, dep->namelen, 1084 if (filldir(dirent, (char *)dep->name, dep->namelen,
1085 xfs_dir2_byte_to_dataptr(mp, curoff) & 0x7fffffff, 1085 xfs_dir2_byte_to_dataptr(mp, curoff) & 0x7fffffff,
1086 be64_to_cpu(dep->inumber), DT_UNKNOWN)) 1086 be64_to_cpu(dep->inumber), DT_UNKNOWN))
1087 break; 1087 break;
diff --git a/fs/xfs/xfs_dir2_node.c b/fs/xfs/xfs_dir2_node.c
index ce6e355199b5..78fc4d9ae756 100644
--- a/fs/xfs/xfs_dir2_node.c
+++ b/fs/xfs/xfs_dir2_node.c
@@ -65,7 +65,7 @@ static int xfs_dir2_node_addname_int(xfs_da_args_t *args,
65/* 65/*
66 * Log entries from a freespace block. 66 * Log entries from a freespace block.
67 */ 67 */
68void 68STATIC void
69xfs_dir2_free_log_bests( 69xfs_dir2_free_log_bests(
70 xfs_trans_t *tp, /* transaction pointer */ 70 xfs_trans_t *tp, /* transaction pointer */
71 xfs_dabuf_t *bp, /* freespace buffer */ 71 xfs_dabuf_t *bp, /* freespace buffer */
diff --git a/fs/xfs/xfs_dir2_node.h b/fs/xfs/xfs_dir2_node.h
index dde72db3d695..82dfe7147195 100644
--- a/fs/xfs/xfs_dir2_node.h
+++ b/fs/xfs/xfs_dir2_node.h
@@ -75,8 +75,6 @@ xfs_dir2_db_to_fdindex(struct xfs_mount *mp, xfs_dir2_db_t db)
75 return ((db) % XFS_DIR2_MAX_FREE_BESTS(mp)); 75 return ((db) % XFS_DIR2_MAX_FREE_BESTS(mp));
76} 76}
77 77
78extern void xfs_dir2_free_log_bests(struct xfs_trans *tp, struct xfs_dabuf *bp,
79 int first, int last);
80extern int xfs_dir2_leaf_to_node(struct xfs_da_args *args, 78extern int xfs_dir2_leaf_to_node(struct xfs_da_args *args,
81 struct xfs_dabuf *lbp); 79 struct xfs_dabuf *lbp);
82extern xfs_dahash_t xfs_dir2_leafn_lasthash(struct xfs_dabuf *bp, int *count); 80extern xfs_dahash_t xfs_dir2_leafn_lasthash(struct xfs_dabuf *bp, int *count);
diff --git a/fs/xfs/xfs_dir2_sf.c b/fs/xfs/xfs_dir2_sf.c
index 9d4f17a69676..c1a5945d463a 100644
--- a/fs/xfs/xfs_dir2_sf.c
+++ b/fs/xfs/xfs_dir2_sf.c
@@ -782,7 +782,7 @@ xfs_dir2_sf_getdents(
782 } 782 }
783 783
784 ino = xfs_dir2_sf_get_inumber(sfp, xfs_dir2_sf_inumberp(sfep)); 784 ino = xfs_dir2_sf_get_inumber(sfp, xfs_dir2_sf_inumberp(sfep));
785 if (filldir(dirent, sfep->name, sfep->namelen, 785 if (filldir(dirent, (char *)sfep->name, sfep->namelen,
786 off & 0x7fffffff, ino, DT_UNKNOWN)) { 786 off & 0x7fffffff, ino, DT_UNKNOWN)) {
787 *offset = off & 0x7fffffff; 787 *offset = off & 0x7fffffff;
788 return 0; 788 return 0;
diff --git a/fs/xfs/xfs_extfree_item.c b/fs/xfs/xfs_extfree_item.c
index 05a4bdd4be39..6f35ed1b39b9 100644
--- a/fs/xfs/xfs_extfree_item.c
+++ b/fs/xfs/xfs_extfree_item.c
@@ -82,7 +82,7 @@ xfs_efi_item_format(xfs_efi_log_item_t *efip,
82 82
83 log_vector->i_addr = (xfs_caddr_t)&(efip->efi_format); 83 log_vector->i_addr = (xfs_caddr_t)&(efip->efi_format);
84 log_vector->i_len = size; 84 log_vector->i_len = size;
85 XLOG_VEC_SET_TYPE(log_vector, XLOG_REG_TYPE_EFI_FORMAT); 85 log_vector->i_type = XLOG_REG_TYPE_EFI_FORMAT;
86 ASSERT(size >= sizeof(xfs_efi_log_format_t)); 86 ASSERT(size >= sizeof(xfs_efi_log_format_t));
87} 87}
88 88
@@ -406,7 +406,7 @@ xfs_efd_item_format(xfs_efd_log_item_t *efdp,
406 406
407 log_vector->i_addr = (xfs_caddr_t)&(efdp->efd_format); 407 log_vector->i_addr = (xfs_caddr_t)&(efdp->efd_format);
408 log_vector->i_len = size; 408 log_vector->i_len = size;
409 XLOG_VEC_SET_TYPE(log_vector, XLOG_REG_TYPE_EFD_FORMAT); 409 log_vector->i_type = XLOG_REG_TYPE_EFD_FORMAT;
410 ASSERT(size >= sizeof(xfs_efd_log_format_t)); 410 ASSERT(size >= sizeof(xfs_efd_log_format_t));
411} 411}
412 412
diff --git a/fs/xfs/xfs_filestream.c b/fs/xfs/xfs_filestream.c
index a631e1451abb..390850ee6603 100644
--- a/fs/xfs/xfs_filestream.c
+++ b/fs/xfs/xfs_filestream.c
@@ -140,6 +140,7 @@ _xfs_filestream_pick_ag(
140 int flags, 140 int flags,
141 xfs_extlen_t minlen) 141 xfs_extlen_t minlen)
142{ 142{
143 int streams, max_streams;
143 int err, trylock, nscan; 144 int err, trylock, nscan;
144 xfs_extlen_t longest, free, minfree, maxfree = 0; 145 xfs_extlen_t longest, free, minfree, maxfree = 0;
145 xfs_agnumber_t ag, max_ag = NULLAGNUMBER; 146 xfs_agnumber_t ag, max_ag = NULLAGNUMBER;
@@ -155,15 +156,15 @@ _xfs_filestream_pick_ag(
155 trylock = XFS_ALLOC_FLAG_TRYLOCK; 156 trylock = XFS_ALLOC_FLAG_TRYLOCK;
156 157
157 for (nscan = 0; 1; nscan++) { 158 for (nscan = 0; 1; nscan++) {
158 159 pag = xfs_perag_get(mp, ag);
159 TRACE_AG_SCAN(mp, ag, xfs_filestream_peek_ag(mp, ag)); 160 TRACE_AG_SCAN(mp, ag, atomic_read(&pag->pagf_fstrms));
160
161 pag = mp->m_perag + ag;
162 161
163 if (!pag->pagf_init) { 162 if (!pag->pagf_init) {
164 err = xfs_alloc_pagf_init(mp, NULL, ag, trylock); 163 err = xfs_alloc_pagf_init(mp, NULL, ag, trylock);
165 if (err && !trylock) 164 if (err && !trylock) {
165 xfs_perag_put(pag);
166 return err; 166 return err;
167 }
167 } 168 }
168 169
169 /* Might fail sometimes during the 1st pass with trylock set. */ 170 /* Might fail sometimes during the 1st pass with trylock set. */
@@ -173,6 +174,7 @@ _xfs_filestream_pick_ag(
173 /* Keep track of the AG with the most free blocks. */ 174 /* Keep track of the AG with the most free blocks. */
174 if (pag->pagf_freeblks > maxfree) { 175 if (pag->pagf_freeblks > maxfree) {
175 maxfree = pag->pagf_freeblks; 176 maxfree = pag->pagf_freeblks;
177 max_streams = atomic_read(&pag->pagf_fstrms);
176 max_ag = ag; 178 max_ag = ag;
177 } 179 }
178 180
@@ -195,6 +197,8 @@ _xfs_filestream_pick_ag(
195 197
196 /* Break out, retaining the reference on the AG. */ 198 /* Break out, retaining the reference on the AG. */
197 free = pag->pagf_freeblks; 199 free = pag->pagf_freeblks;
200 streams = atomic_read(&pag->pagf_fstrms);
201 xfs_perag_put(pag);
198 *agp = ag; 202 *agp = ag;
199 break; 203 break;
200 } 204 }
@@ -202,6 +206,7 @@ _xfs_filestream_pick_ag(
202 /* Drop the reference on this AG, it's not usable. */ 206 /* Drop the reference on this AG, it's not usable. */
203 xfs_filestream_put_ag(mp, ag); 207 xfs_filestream_put_ag(mp, ag);
204next_ag: 208next_ag:
209 xfs_perag_put(pag);
205 /* Move to the next AG, wrapping to AG 0 if necessary. */ 210 /* Move to the next AG, wrapping to AG 0 if necessary. */
206 if (++ag >= mp->m_sb.sb_agcount) 211 if (++ag >= mp->m_sb.sb_agcount)
207 ag = 0; 212 ag = 0;
@@ -229,6 +234,7 @@ next_ag:
229 if (max_ag != NULLAGNUMBER) { 234 if (max_ag != NULLAGNUMBER) {
230 xfs_filestream_get_ag(mp, max_ag); 235 xfs_filestream_get_ag(mp, max_ag);
231 TRACE_AG_PICK1(mp, max_ag, maxfree); 236 TRACE_AG_PICK1(mp, max_ag, maxfree);
237 streams = max_streams;
232 free = maxfree; 238 free = maxfree;
233 *agp = max_ag; 239 *agp = max_ag;
234 break; 240 break;
@@ -240,16 +246,14 @@ next_ag:
240 return 0; 246 return 0;
241 } 247 }
242 248
243 TRACE_AG_PICK2(mp, startag, *agp, xfs_filestream_peek_ag(mp, *agp), 249 TRACE_AG_PICK2(mp, startag, *agp, streams, free, nscan, flags);
244 free, nscan, flags);
245 250
246 return 0; 251 return 0;
247} 252}
248 253
249/* 254/*
250 * Set the allocation group number for a file or a directory, updating inode 255 * Set the allocation group number for a file or a directory, updating inode
251 * references and per-AG references as appropriate. Must be called with the 256 * references and per-AG references as appropriate.
252 * m_peraglock held in read mode.
253 */ 257 */
254static int 258static int
255_xfs_filestream_update_ag( 259_xfs_filestream_update_ag(
@@ -451,20 +455,6 @@ xfs_filestream_unmount(
451} 455}
452 456
453/* 457/*
454 * If the mount point's m_perag array is going to be reallocated, all
455 * outstanding cache entries must be flushed to avoid accessing reference count
456 * addresses that have been freed. The call to xfs_filestream_flush() must be
457 * made inside the block that holds the m_peraglock in write mode to do the
458 * reallocation.
459 */
460void
461xfs_filestream_flush(
462 xfs_mount_t *mp)
463{
464 xfs_mru_cache_flush(mp->m_filestream);
465}
466
467/*
468 * Return the AG of the filestream the file or directory belongs to, or 458 * Return the AG of the filestream the file or directory belongs to, or
469 * NULLAGNUMBER otherwise. 459 * NULLAGNUMBER otherwise.
470 */ 460 */
@@ -526,7 +516,6 @@ xfs_filestream_associate(
526 516
527 mp = pip->i_mount; 517 mp = pip->i_mount;
528 cache = mp->m_filestream; 518 cache = mp->m_filestream;
529 down_read(&mp->m_peraglock);
530 519
531 /* 520 /*
532 * We have a problem, Houston. 521 * We have a problem, Houston.
@@ -543,10 +532,8 @@ xfs_filestream_associate(
543 * 532 *
544 * So, if we can't get the iolock without sleeping then just give up 533 * So, if we can't get the iolock without sleeping then just give up
545 */ 534 */
546 if (!xfs_ilock_nowait(pip, XFS_IOLOCK_EXCL)) { 535 if (!xfs_ilock_nowait(pip, XFS_IOLOCK_EXCL))
547 up_read(&mp->m_peraglock);
548 return 1; 536 return 1;
549 }
550 537
551 /* If the parent directory is already in the cache, use its AG. */ 538 /* If the parent directory is already in the cache, use its AG. */
552 item = xfs_mru_cache_lookup(cache, pip->i_ino); 539 item = xfs_mru_cache_lookup(cache, pip->i_ino);
@@ -601,7 +588,6 @@ exit_did_pick:
601 588
602exit: 589exit:
603 xfs_iunlock(pip, XFS_IOLOCK_EXCL); 590 xfs_iunlock(pip, XFS_IOLOCK_EXCL);
604 up_read(&mp->m_peraglock);
605 return -err; 591 return -err;
606} 592}
607 593
diff --git a/fs/xfs/xfs_filestream.h b/fs/xfs/xfs_filestream.h
index 4aba67c5f64f..260f757bbc5d 100644
--- a/fs/xfs/xfs_filestream.h
+++ b/fs/xfs/xfs_filestream.h
@@ -79,12 +79,21 @@ extern ktrace_t *xfs_filestreams_trace_buf;
79 * the cache that reference per-ag array elements that have since been 79 * the cache that reference per-ag array elements that have since been
80 * reallocated. 80 * reallocated.
81 */ 81 */
82/*
83 * xfs_filestream_peek_ag is only used in tracing code
84 */
82static inline int 85static inline int
83xfs_filestream_peek_ag( 86xfs_filestream_peek_ag(
84 xfs_mount_t *mp, 87 xfs_mount_t *mp,
85 xfs_agnumber_t agno) 88 xfs_agnumber_t agno)
86{ 89{
87 return atomic_read(&mp->m_perag[agno].pagf_fstrms); 90 struct xfs_perag *pag;
91 int ret;
92
93 pag = xfs_perag_get(mp, agno);
94 ret = atomic_read(&pag->pagf_fstrms);
95 xfs_perag_put(pag);
96 return ret;
88} 97}
89 98
90static inline int 99static inline int
@@ -92,7 +101,13 @@ xfs_filestream_get_ag(
92 xfs_mount_t *mp, 101 xfs_mount_t *mp,
93 xfs_agnumber_t agno) 102 xfs_agnumber_t agno)
94{ 103{
95 return atomic_inc_return(&mp->m_perag[agno].pagf_fstrms); 104 struct xfs_perag *pag;
105 int ret;
106
107 pag = xfs_perag_get(mp, agno);
108 ret = atomic_inc_return(&pag->pagf_fstrms);
109 xfs_perag_put(pag);
110 return ret;
96} 111}
97 112
98static inline int 113static inline int
@@ -100,7 +115,13 @@ xfs_filestream_put_ag(
100 xfs_mount_t *mp, 115 xfs_mount_t *mp,
101 xfs_agnumber_t agno) 116 xfs_agnumber_t agno)
102{ 117{
103 return atomic_dec_return(&mp->m_perag[agno].pagf_fstrms); 118 struct xfs_perag *pag;
119 int ret;
120
121 pag = xfs_perag_get(mp, agno);
122 ret = atomic_dec_return(&pag->pagf_fstrms);
123 xfs_perag_put(pag);
124 return ret;
104} 125}
105 126
106/* allocation selection flags */ 127/* allocation selection flags */
@@ -114,7 +135,6 @@ int xfs_filestream_init(void);
114void xfs_filestream_uninit(void); 135void xfs_filestream_uninit(void);
115int xfs_filestream_mount(struct xfs_mount *mp); 136int xfs_filestream_mount(struct xfs_mount *mp);
116void xfs_filestream_unmount(struct xfs_mount *mp); 137void xfs_filestream_unmount(struct xfs_mount *mp);
117void xfs_filestream_flush(struct xfs_mount *mp);
118xfs_agnumber_t xfs_filestream_lookup_ag(struct xfs_inode *ip); 138xfs_agnumber_t xfs_filestream_lookup_ag(struct xfs_inode *ip);
119int xfs_filestream_associate(struct xfs_inode *dip, struct xfs_inode *ip); 139int xfs_filestream_associate(struct xfs_inode *dip, struct xfs_inode *ip);
120void xfs_filestream_deassociate(struct xfs_inode *ip); 140void xfs_filestream_deassociate(struct xfs_inode *ip);
diff --git a/fs/xfs/xfs_fsops.c b/fs/xfs/xfs_fsops.c
index a13919a6a364..37a6f62c57b6 100644
--- a/fs/xfs/xfs_fsops.c
+++ b/fs/xfs/xfs_fsops.c
@@ -167,27 +167,14 @@ xfs_growfs_data_private(
167 } 167 }
168 new = nb - mp->m_sb.sb_dblocks; 168 new = nb - mp->m_sb.sb_dblocks;
169 oagcount = mp->m_sb.sb_agcount; 169 oagcount = mp->m_sb.sb_agcount;
170 if (nagcount > oagcount) {
171 void *new_perag, *old_perag;
172
173 xfs_filestream_flush(mp);
174
175 new_perag = kmem_zalloc(sizeof(xfs_perag_t) * nagcount,
176 KM_MAYFAIL);
177 if (!new_perag)
178 return XFS_ERROR(ENOMEM);
179
180 down_write(&mp->m_peraglock);
181 memcpy(new_perag, mp->m_perag, sizeof(xfs_perag_t) * oagcount);
182 old_perag = mp->m_perag;
183 mp->m_perag = new_perag;
184
185 mp->m_flags |= XFS_MOUNT_32BITINODES;
186 nagimax = xfs_initialize_perag(mp, nagcount);
187 up_write(&mp->m_peraglock);
188 170
189 kmem_free(old_perag); 171 /* allocate the new per-ag structures */
172 if (nagcount > oagcount) {
173 error = xfs_initialize_perag(mp, nagcount, &nagimax);
174 if (error)
175 return error;
190 } 176 }
177
191 tp = xfs_trans_alloc(mp, XFS_TRANS_GROWFS); 178 tp = xfs_trans_alloc(mp, XFS_TRANS_GROWFS);
192 tp->t_flags |= XFS_TRANS_RESERVE; 179 tp->t_flags |= XFS_TRANS_RESERVE;
193 if ((error = xfs_trans_reserve(tp, XFS_GROWFS_SPACE_RES(mp), 180 if ((error = xfs_trans_reserve(tp, XFS_GROWFS_SPACE_RES(mp),
@@ -196,6 +183,11 @@ xfs_growfs_data_private(
196 return error; 183 return error;
197 } 184 }
198 185
186 /*
187 * Write new AG headers to disk. Non-transactional, but written
188 * synchronously so they are completed prior to the growfs transaction
189 * being logged.
190 */
199 nfree = 0; 191 nfree = 0;
200 for (agno = nagcount - 1; agno >= oagcount; agno--, new -= agsize) { 192 for (agno = nagcount - 1; agno >= oagcount; agno--, new -= agsize) {
201 /* 193 /*
@@ -359,6 +351,12 @@ xfs_growfs_data_private(
359 goto error0; 351 goto error0;
360 } 352 }
361 } 353 }
354
355 /*
356 * Update changed superblock fields transactionally. These are not
357 * seen by the rest of the world until the transaction commit applies
358 * them atomically to the superblock.
359 */
362 if (nagcount > oagcount) 360 if (nagcount > oagcount)
363 xfs_trans_mod_sb(tp, XFS_TRANS_SB_AGCOUNT, nagcount - oagcount); 361 xfs_trans_mod_sb(tp, XFS_TRANS_SB_AGCOUNT, nagcount - oagcount);
364 if (nb > mp->m_sb.sb_dblocks) 362 if (nb > mp->m_sb.sb_dblocks)
@@ -369,9 +367,9 @@ xfs_growfs_data_private(
369 if (dpct) 367 if (dpct)
370 xfs_trans_mod_sb(tp, XFS_TRANS_SB_IMAXPCT, dpct); 368 xfs_trans_mod_sb(tp, XFS_TRANS_SB_IMAXPCT, dpct);
371 error = xfs_trans_commit(tp, 0); 369 error = xfs_trans_commit(tp, 0);
372 if (error) { 370 if (error)
373 return error; 371 return error;
374 } 372
375 /* New allocation groups fully initialized, so update mount struct */ 373 /* New allocation groups fully initialized, so update mount struct */
376 if (nagimax) 374 if (nagimax)
377 mp->m_maxagi = nagimax; 375 mp->m_maxagi = nagimax;
@@ -381,6 +379,8 @@ xfs_growfs_data_private(
381 mp->m_maxicount = icount << mp->m_sb.sb_inopblog; 379 mp->m_maxicount = icount << mp->m_sb.sb_inopblog;
382 } else 380 } else
383 mp->m_maxicount = 0; 381 mp->m_maxicount = 0;
382
383 /* update secondary superblocks. */
384 for (agno = 1; agno < nagcount; agno++) { 384 for (agno = 1; agno < nagcount; agno++) {
385 error = xfs_read_buf(mp, mp->m_ddev_targp, 385 error = xfs_read_buf(mp, mp->m_ddev_targp,
386 XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)), 386 XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)),
diff --git a/fs/xfs/xfs_ialloc.c b/fs/xfs/xfs_ialloc.c
index cb907ba69c4c..9d884c127bb9 100644
--- a/fs/xfs/xfs_ialloc.c
+++ b/fs/xfs/xfs_ialloc.c
@@ -205,7 +205,7 @@ xfs_ialloc_inode_init(
205 d = XFS_AGB_TO_DADDR(mp, agno, agbno + (j * blks_per_cluster)); 205 d = XFS_AGB_TO_DADDR(mp, agno, agbno + (j * blks_per_cluster));
206 fbuf = xfs_trans_get_buf(tp, mp->m_ddev_targp, d, 206 fbuf = xfs_trans_get_buf(tp, mp->m_ddev_targp, d,
207 mp->m_bsize * blks_per_cluster, 207 mp->m_bsize * blks_per_cluster,
208 XFS_BUF_LOCK); 208 XBF_LOCK);
209 ASSERT(fbuf); 209 ASSERT(fbuf);
210 ASSERT(!XFS_BUF_GETERROR(fbuf)); 210 ASSERT(!XFS_BUF_GETERROR(fbuf));
211 211
@@ -253,6 +253,7 @@ xfs_ialloc_ag_alloc(
253 xfs_agino_t thisino; /* current inode number, for loop */ 253 xfs_agino_t thisino; /* current inode number, for loop */
254 int isaligned = 0; /* inode allocation at stripe unit */ 254 int isaligned = 0; /* inode allocation at stripe unit */
255 /* boundary */ 255 /* boundary */
256 struct xfs_perag *pag;
256 257
257 args.tp = tp; 258 args.tp = tp;
258 args.mp = tp->t_mountp; 259 args.mp = tp->t_mountp;
@@ -382,9 +383,9 @@ xfs_ialloc_ag_alloc(
382 newino = XFS_OFFBNO_TO_AGINO(args.mp, args.agbno, 0); 383 newino = XFS_OFFBNO_TO_AGINO(args.mp, args.agbno, 0);
383 be32_add_cpu(&agi->agi_count, newlen); 384 be32_add_cpu(&agi->agi_count, newlen);
384 be32_add_cpu(&agi->agi_freecount, newlen); 385 be32_add_cpu(&agi->agi_freecount, newlen);
385 down_read(&args.mp->m_peraglock); 386 pag = xfs_perag_get(args.mp, agno);
386 args.mp->m_perag[agno].pagi_freecount += newlen; 387 pag->pagi_freecount += newlen;
387 up_read(&args.mp->m_peraglock); 388 xfs_perag_put(pag);
388 agi->agi_newino = cpu_to_be32(newino); 389 agi->agi_newino = cpu_to_be32(newino);
389 390
390 /* 391 /*
@@ -486,9 +487,8 @@ xfs_ialloc_ag_select(
486 */ 487 */
487 agno = pagno; 488 agno = pagno;
488 flags = XFS_ALLOC_FLAG_TRYLOCK; 489 flags = XFS_ALLOC_FLAG_TRYLOCK;
489 down_read(&mp->m_peraglock);
490 for (;;) { 490 for (;;) {
491 pag = &mp->m_perag[agno]; 491 pag = xfs_perag_get(mp, agno);
492 if (!pag->pagi_init) { 492 if (!pag->pagi_init) {
493 if (xfs_ialloc_read_agi(mp, tp, agno, &agbp)) { 493 if (xfs_ialloc_read_agi(mp, tp, agno, &agbp)) {
494 agbp = NULL; 494 agbp = NULL;
@@ -527,7 +527,7 @@ xfs_ialloc_ag_select(
527 agbp = NULL; 527 agbp = NULL;
528 goto nextag; 528 goto nextag;
529 } 529 }
530 up_read(&mp->m_peraglock); 530 xfs_perag_put(pag);
531 return agbp; 531 return agbp;
532 } 532 }
533 } 533 }
@@ -535,22 +535,19 @@ unlock_nextag:
535 if (agbp) 535 if (agbp)
536 xfs_trans_brelse(tp, agbp); 536 xfs_trans_brelse(tp, agbp);
537nextag: 537nextag:
538 xfs_perag_put(pag);
538 /* 539 /*
539 * No point in iterating over the rest, if we're shutting 540 * No point in iterating over the rest, if we're shutting
540 * down. 541 * down.
541 */ 542 */
542 if (XFS_FORCED_SHUTDOWN(mp)) { 543 if (XFS_FORCED_SHUTDOWN(mp))
543 up_read(&mp->m_peraglock);
544 return NULL; 544 return NULL;
545 }
546 agno++; 545 agno++;
547 if (agno >= agcount) 546 if (agno >= agcount)
548 agno = 0; 547 agno = 0;
549 if (agno == pagno) { 548 if (agno == pagno) {
550 if (flags == 0) { 549 if (flags == 0)
551 up_read(&mp->m_peraglock);
552 return NULL; 550 return NULL;
553 }
554 flags = 0; 551 flags = 0;
555 } 552 }
556 } 553 }
@@ -672,6 +669,7 @@ xfs_dialloc(
672 xfs_agnumber_t tagno; /* testing allocation group number */ 669 xfs_agnumber_t tagno; /* testing allocation group number */
673 xfs_btree_cur_t *tcur; /* temp cursor */ 670 xfs_btree_cur_t *tcur; /* temp cursor */
674 xfs_inobt_rec_incore_t trec; /* temp inode allocation record */ 671 xfs_inobt_rec_incore_t trec; /* temp inode allocation record */
672 struct xfs_perag *pag;
675 673
676 674
677 if (*IO_agbp == NULL) { 675 if (*IO_agbp == NULL) {
@@ -771,13 +769,13 @@ nextag:
771 *inop = NULLFSINO; 769 *inop = NULLFSINO;
772 return noroom ? ENOSPC : 0; 770 return noroom ? ENOSPC : 0;
773 } 771 }
774 down_read(&mp->m_peraglock); 772 pag = xfs_perag_get(mp, tagno);
775 if (mp->m_perag[tagno].pagi_inodeok == 0) { 773 if (pag->pagi_inodeok == 0) {
776 up_read(&mp->m_peraglock); 774 xfs_perag_put(pag);
777 goto nextag; 775 goto nextag;
778 } 776 }
779 error = xfs_ialloc_read_agi(mp, tp, tagno, &agbp); 777 error = xfs_ialloc_read_agi(mp, tp, tagno, &agbp);
780 up_read(&mp->m_peraglock); 778 xfs_perag_put(pag);
781 if (error) 779 if (error)
782 goto nextag; 780 goto nextag;
783 agi = XFS_BUF_TO_AGI(agbp); 781 agi = XFS_BUF_TO_AGI(agbp);
@@ -790,6 +788,7 @@ nextag:
790 */ 788 */
791 agno = tagno; 789 agno = tagno;
792 *IO_agbp = NULL; 790 *IO_agbp = NULL;
791 pag = xfs_perag_get(mp, agno);
793 792
794 restart_pagno: 793 restart_pagno:
795 cur = xfs_inobt_init_cursor(mp, tp, agbp, be32_to_cpu(agi->agi_seqno)); 794 cur = xfs_inobt_init_cursor(mp, tp, agbp, be32_to_cpu(agi->agi_seqno));
@@ -808,7 +807,6 @@ nextag:
808 * If in the same AG as the parent, try to get near the parent. 807 * If in the same AG as the parent, try to get near the parent.
809 */ 808 */
810 if (pagno == agno) { 809 if (pagno == agno) {
811 xfs_perag_t *pag = &mp->m_perag[agno];
812 int doneleft; /* done, to the left */ 810 int doneleft; /* done, to the left */
813 int doneright; /* done, to the right */ 811 int doneright; /* done, to the right */
814 int searchdistance = 10; 812 int searchdistance = 10;
@@ -1006,9 +1004,7 @@ alloc_inode:
1006 goto error0; 1004 goto error0;
1007 be32_add_cpu(&agi->agi_freecount, -1); 1005 be32_add_cpu(&agi->agi_freecount, -1);
1008 xfs_ialloc_log_agi(tp, agbp, XFS_AGI_FREECOUNT); 1006 xfs_ialloc_log_agi(tp, agbp, XFS_AGI_FREECOUNT);
1009 down_read(&mp->m_peraglock); 1007 pag->pagi_freecount--;
1010 mp->m_perag[tagno].pagi_freecount--;
1011 up_read(&mp->m_peraglock);
1012 1008
1013 error = xfs_check_agi_freecount(cur, agi); 1009 error = xfs_check_agi_freecount(cur, agi);
1014 if (error) 1010 if (error)
@@ -1016,12 +1012,14 @@ alloc_inode:
1016 1012
1017 xfs_btree_del_cursor(cur, XFS_BTREE_NOERROR); 1013 xfs_btree_del_cursor(cur, XFS_BTREE_NOERROR);
1018 xfs_trans_mod_sb(tp, XFS_TRANS_SB_IFREE, -1); 1014 xfs_trans_mod_sb(tp, XFS_TRANS_SB_IFREE, -1);
1015 xfs_perag_put(pag);
1019 *inop = ino; 1016 *inop = ino;
1020 return 0; 1017 return 0;
1021error1: 1018error1:
1022 xfs_btree_del_cursor(tcur, XFS_BTREE_ERROR); 1019 xfs_btree_del_cursor(tcur, XFS_BTREE_ERROR);
1023error0: 1020error0:
1024 xfs_btree_del_cursor(cur, XFS_BTREE_ERROR); 1021 xfs_btree_del_cursor(cur, XFS_BTREE_ERROR);
1022 xfs_perag_put(pag);
1025 return error; 1023 return error;
1026} 1024}
1027 1025
@@ -1052,6 +1050,7 @@ xfs_difree(
1052 xfs_mount_t *mp; /* mount structure for filesystem */ 1050 xfs_mount_t *mp; /* mount structure for filesystem */
1053 int off; /* offset of inode in inode chunk */ 1051 int off; /* offset of inode in inode chunk */
1054 xfs_inobt_rec_incore_t rec; /* btree record */ 1052 xfs_inobt_rec_incore_t rec; /* btree record */
1053 struct xfs_perag *pag;
1055 1054
1056 mp = tp->t_mountp; 1055 mp = tp->t_mountp;
1057 1056
@@ -1088,9 +1087,7 @@ xfs_difree(
1088 /* 1087 /*
1089 * Get the allocation group header. 1088 * Get the allocation group header.
1090 */ 1089 */
1091 down_read(&mp->m_peraglock);
1092 error = xfs_ialloc_read_agi(mp, tp, agno, &agbp); 1090 error = xfs_ialloc_read_agi(mp, tp, agno, &agbp);
1093 up_read(&mp->m_peraglock);
1094 if (error) { 1091 if (error) {
1095 cmn_err(CE_WARN, 1092 cmn_err(CE_WARN,
1096 "xfs_difree: xfs_ialloc_read_agi() returned an error %d on %s. Returning error.", 1093 "xfs_difree: xfs_ialloc_read_agi() returned an error %d on %s. Returning error.",
@@ -1157,9 +1154,9 @@ xfs_difree(
1157 be32_add_cpu(&agi->agi_count, -ilen); 1154 be32_add_cpu(&agi->agi_count, -ilen);
1158 be32_add_cpu(&agi->agi_freecount, -(ilen - 1)); 1155 be32_add_cpu(&agi->agi_freecount, -(ilen - 1));
1159 xfs_ialloc_log_agi(tp, agbp, XFS_AGI_COUNT | XFS_AGI_FREECOUNT); 1156 xfs_ialloc_log_agi(tp, agbp, XFS_AGI_COUNT | XFS_AGI_FREECOUNT);
1160 down_read(&mp->m_peraglock); 1157 pag = xfs_perag_get(mp, agno);
1161 mp->m_perag[agno].pagi_freecount -= ilen - 1; 1158 pag->pagi_freecount -= ilen - 1;
1162 up_read(&mp->m_peraglock); 1159 xfs_perag_put(pag);
1163 xfs_trans_mod_sb(tp, XFS_TRANS_SB_ICOUNT, -ilen); 1160 xfs_trans_mod_sb(tp, XFS_TRANS_SB_ICOUNT, -ilen);
1164 xfs_trans_mod_sb(tp, XFS_TRANS_SB_IFREE, -(ilen - 1)); 1161 xfs_trans_mod_sb(tp, XFS_TRANS_SB_IFREE, -(ilen - 1));
1165 1162
@@ -1188,9 +1185,9 @@ xfs_difree(
1188 */ 1185 */
1189 be32_add_cpu(&agi->agi_freecount, 1); 1186 be32_add_cpu(&agi->agi_freecount, 1);
1190 xfs_ialloc_log_agi(tp, agbp, XFS_AGI_FREECOUNT); 1187 xfs_ialloc_log_agi(tp, agbp, XFS_AGI_FREECOUNT);
1191 down_read(&mp->m_peraglock); 1188 pag = xfs_perag_get(mp, agno);
1192 mp->m_perag[agno].pagi_freecount++; 1189 pag->pagi_freecount++;
1193 up_read(&mp->m_peraglock); 1190 xfs_perag_put(pag);
1194 xfs_trans_mod_sb(tp, XFS_TRANS_SB_IFREE, 1); 1191 xfs_trans_mod_sb(tp, XFS_TRANS_SB_IFREE, 1);
1195 } 1192 }
1196 1193
@@ -1312,9 +1309,7 @@ xfs_imap(
1312 xfs_buf_t *agbp; /* agi buffer */ 1309 xfs_buf_t *agbp; /* agi buffer */
1313 int i; /* temp state */ 1310 int i; /* temp state */
1314 1311
1315 down_read(&mp->m_peraglock);
1316 error = xfs_ialloc_read_agi(mp, tp, agno, &agbp); 1312 error = xfs_ialloc_read_agi(mp, tp, agno, &agbp);
1317 up_read(&mp->m_peraglock);
1318 if (error) { 1313 if (error) {
1319 xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: " 1314 xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: "
1320 "xfs_ialloc_read_agi() returned " 1315 "xfs_ialloc_read_agi() returned "
@@ -1379,7 +1374,6 @@ xfs_imap(
1379 XFS_FSB_TO_BB(mp, mp->m_sb.sb_dblocks)); 1374 XFS_FSB_TO_BB(mp, mp->m_sb.sb_dblocks));
1380 return XFS_ERROR(EINVAL); 1375 return XFS_ERROR(EINVAL);
1381 } 1376 }
1382
1383 return 0; 1377 return 0;
1384} 1378}
1385 1379
@@ -1523,8 +1517,7 @@ xfs_ialloc_read_agi(
1523 return error; 1517 return error;
1524 1518
1525 agi = XFS_BUF_TO_AGI(*bpp); 1519 agi = XFS_BUF_TO_AGI(*bpp);
1526 pag = &mp->m_perag[agno]; 1520 pag = xfs_perag_get(mp, agno);
1527
1528 if (!pag->pagi_init) { 1521 if (!pag->pagi_init) {
1529 pag->pagi_freecount = be32_to_cpu(agi->agi_freecount); 1522 pag->pagi_freecount = be32_to_cpu(agi->agi_freecount);
1530 pag->pagi_count = be32_to_cpu(agi->agi_count); 1523 pag->pagi_count = be32_to_cpu(agi->agi_count);
@@ -1537,6 +1530,7 @@ xfs_ialloc_read_agi(
1537 */ 1530 */
1538 ASSERT(pag->pagi_freecount == be32_to_cpu(agi->agi_freecount) || 1531 ASSERT(pag->pagi_freecount == be32_to_cpu(agi->agi_freecount) ||
1539 XFS_FORCED_SHUTDOWN(mp)); 1532 XFS_FORCED_SHUTDOWN(mp));
1533 xfs_perag_put(pag);
1540 return 0; 1534 return 0;
1541} 1535}
1542 1536
diff --git a/fs/xfs/xfs_iget.c b/fs/xfs/xfs_iget.c
index 155e798f30a1..e281eb4a1c49 100644
--- a/fs/xfs/xfs_iget.c
+++ b/fs/xfs/xfs_iget.c
@@ -374,7 +374,7 @@ xfs_iget(
374 return EINVAL; 374 return EINVAL;
375 375
376 /* get the perag structure and ensure that it's inode capable */ 376 /* get the perag structure and ensure that it's inode capable */
377 pag = xfs_get_perag(mp, ino); 377 pag = xfs_perag_get(mp, XFS_INO_TO_AGNO(mp, ino));
378 if (!pag->pagi_inodeok) 378 if (!pag->pagi_inodeok)
379 return EINVAL; 379 return EINVAL;
380 ASSERT(pag->pag_ici_init); 380 ASSERT(pag->pag_ici_init);
@@ -398,7 +398,7 @@ again:
398 if (error) 398 if (error)
399 goto out_error_or_again; 399 goto out_error_or_again;
400 } 400 }
401 xfs_put_perag(mp, pag); 401 xfs_perag_put(pag);
402 402
403 *ipp = ip; 403 *ipp = ip;
404 404
@@ -417,7 +417,7 @@ out_error_or_again:
417 delay(1); 417 delay(1);
418 goto again; 418 goto again;
419 } 419 }
420 xfs_put_perag(mp, pag); 420 xfs_perag_put(pag);
421 return error; 421 return error;
422} 422}
423 423
@@ -488,12 +488,12 @@ xfs_ireclaim(
488 * added to the tree assert that it's been there before to catch 488 * added to the tree assert that it's been there before to catch
489 * problems with the inode life time early on. 489 * problems with the inode life time early on.
490 */ 490 */
491 pag = xfs_get_perag(mp, ip->i_ino); 491 pag = xfs_perag_get(mp, XFS_INO_TO_AGNO(mp, ip->i_ino));
492 write_lock(&pag->pag_ici_lock); 492 write_lock(&pag->pag_ici_lock);
493 if (!radix_tree_delete(&pag->pag_ici_root, agino)) 493 if (!radix_tree_delete(&pag->pag_ici_root, agino))
494 ASSERT(0); 494 ASSERT(0);
495 write_unlock(&pag->pag_ici_lock); 495 write_unlock(&pag->pag_ici_lock);
496 xfs_put_perag(mp, pag); 496 xfs_perag_put(pag);
497 497
498 /* 498 /*
499 * Here we do an (almost) spurious inode lock in order to coordinate 499 * Here we do an (almost) spurious inode lock in order to coordinate
diff --git a/fs/xfs/xfs_inode.c b/fs/xfs/xfs_inode.c
index ef77fd88c8e3..fa31360046d4 100644
--- a/fs/xfs/xfs_inode.c
+++ b/fs/xfs/xfs_inode.c
@@ -151,7 +151,7 @@ xfs_imap_to_bp(
151 "an error %d on %s. Returning error.", 151 "an error %d on %s. Returning error.",
152 error, mp->m_fsname); 152 error, mp->m_fsname);
153 } else { 153 } else {
154 ASSERT(buf_flags & XFS_BUF_TRYLOCK); 154 ASSERT(buf_flags & XBF_TRYLOCK);
155 } 155 }
156 return error; 156 return error;
157 } 157 }
@@ -239,7 +239,7 @@ xfs_inotobp(
239 if (error) 239 if (error)
240 return error; 240 return error;
241 241
242 error = xfs_imap_to_bp(mp, tp, &imap, &bp, XFS_BUF_LOCK, imap_flags); 242 error = xfs_imap_to_bp(mp, tp, &imap, &bp, XBF_LOCK, imap_flags);
243 if (error) 243 if (error)
244 return error; 244 return error;
245 245
@@ -285,7 +285,7 @@ xfs_itobp(
285 return error; 285 return error;
286 286
287 if (!bp) { 287 if (!bp) {
288 ASSERT(buf_flags & XFS_BUF_TRYLOCK); 288 ASSERT(buf_flags & XBF_TRYLOCK);
289 ASSERT(tp == NULL); 289 ASSERT(tp == NULL);
290 *bpp = NULL; 290 *bpp = NULL;
291 return EAGAIN; 291 return EAGAIN;
@@ -807,7 +807,7 @@ xfs_iread(
807 * Get pointers to the on-disk inode and the buffer containing it. 807 * Get pointers to the on-disk inode and the buffer containing it.
808 */ 808 */
809 error = xfs_imap_to_bp(mp, tp, &ip->i_imap, &bp, 809 error = xfs_imap_to_bp(mp, tp, &ip->i_imap, &bp,
810 XFS_BUF_LOCK, iget_flags); 810 XBF_LOCK, iget_flags);
811 if (error) 811 if (error)
812 return error; 812 return error;
813 dip = (xfs_dinode_t *)xfs_buf_offset(bp, ip->i_imap.im_boffset); 813 dip = (xfs_dinode_t *)xfs_buf_offset(bp, ip->i_imap.im_boffset);
@@ -1751,7 +1751,7 @@ xfs_iunlink(
1751 * Here we put the head pointer into our next pointer, 1751 * Here we put the head pointer into our next pointer,
1752 * and then we fall through to point the head at us. 1752 * and then we fall through to point the head at us.
1753 */ 1753 */
1754 error = xfs_itobp(mp, tp, ip, &dip, &ibp, XFS_BUF_LOCK); 1754 error = xfs_itobp(mp, tp, ip, &dip, &ibp, XBF_LOCK);
1755 if (error) 1755 if (error)
1756 return error; 1756 return error;
1757 1757
@@ -1833,7 +1833,7 @@ xfs_iunlink_remove(
1833 * of dealing with the buffer when there is no need to 1833 * of dealing with the buffer when there is no need to
1834 * change it. 1834 * change it.
1835 */ 1835 */
1836 error = xfs_itobp(mp, tp, ip, &dip, &ibp, XFS_BUF_LOCK); 1836 error = xfs_itobp(mp, tp, ip, &dip, &ibp, XBF_LOCK);
1837 if (error) { 1837 if (error) {
1838 cmn_err(CE_WARN, 1838 cmn_err(CE_WARN,
1839 "xfs_iunlink_remove: xfs_itobp() returned an error %d on %s. Returning error.", 1839 "xfs_iunlink_remove: xfs_itobp() returned an error %d on %s. Returning error.",
@@ -1895,7 +1895,7 @@ xfs_iunlink_remove(
1895 * Now last_ibp points to the buffer previous to us on 1895 * Now last_ibp points to the buffer previous to us on
1896 * the unlinked list. Pull us from the list. 1896 * the unlinked list. Pull us from the list.
1897 */ 1897 */
1898 error = xfs_itobp(mp, tp, ip, &dip, &ibp, XFS_BUF_LOCK); 1898 error = xfs_itobp(mp, tp, ip, &dip, &ibp, XBF_LOCK);
1899 if (error) { 1899 if (error) {
1900 cmn_err(CE_WARN, 1900 cmn_err(CE_WARN,
1901 "xfs_iunlink_remove: xfs_itobp() returned an error %d on %s. Returning error.", 1901 "xfs_iunlink_remove: xfs_itobp() returned an error %d on %s. Returning error.",
@@ -1946,8 +1946,9 @@ xfs_ifree_cluster(
1946 xfs_inode_t *ip, **ip_found; 1946 xfs_inode_t *ip, **ip_found;
1947 xfs_inode_log_item_t *iip; 1947 xfs_inode_log_item_t *iip;
1948 xfs_log_item_t *lip; 1948 xfs_log_item_t *lip;
1949 xfs_perag_t *pag = xfs_get_perag(mp, inum); 1949 struct xfs_perag *pag;
1950 1950
1951 pag = xfs_perag_get(mp, XFS_INO_TO_AGNO(mp, inum));
1951 if (mp->m_sb.sb_blocksize >= XFS_INODE_CLUSTER_SIZE(mp)) { 1952 if (mp->m_sb.sb_blocksize >= XFS_INODE_CLUSTER_SIZE(mp)) {
1952 blks_per_cluster = 1; 1953 blks_per_cluster = 1;
1953 ninodes = mp->m_sb.sb_inopblock; 1954 ninodes = mp->m_sb.sb_inopblock;
@@ -2039,7 +2040,7 @@ xfs_ifree_cluster(
2039 2040
2040 bp = xfs_trans_get_buf(tp, mp->m_ddev_targp, blkno, 2041 bp = xfs_trans_get_buf(tp, mp->m_ddev_targp, blkno,
2041 mp->m_bsize * blks_per_cluster, 2042 mp->m_bsize * blks_per_cluster,
2042 XFS_BUF_LOCK); 2043 XBF_LOCK);
2043 2044
2044 pre_flushed = 0; 2045 pre_flushed = 0;
2045 lip = XFS_BUF_FSPRIVATE(bp, xfs_log_item_t *); 2046 lip = XFS_BUF_FSPRIVATE(bp, xfs_log_item_t *);
@@ -2088,7 +2089,7 @@ xfs_ifree_cluster(
2088 } 2089 }
2089 2090
2090 kmem_free(ip_found); 2091 kmem_free(ip_found);
2091 xfs_put_perag(mp, pag); 2092 xfs_perag_put(pag);
2092} 2093}
2093 2094
2094/* 2095/*
@@ -2150,7 +2151,7 @@ xfs_ifree(
2150 2151
2151 xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE); 2152 xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
2152 2153
2153 error = xfs_itobp(ip->i_mount, tp, ip, &dip, &ibp, XFS_BUF_LOCK); 2154 error = xfs_itobp(ip->i_mount, tp, ip, &dip, &ibp, XBF_LOCK);
2154 if (error) 2155 if (error)
2155 return error; 2156 return error;
2156 2157
@@ -2483,13 +2484,16 @@ __xfs_iunpin_wait(
2483 return; 2484 return;
2484 2485
2485 /* Give the log a push to start the unpinning I/O */ 2486 /* Give the log a push to start the unpinning I/O */
2486 xfs_log_force(ip->i_mount, (iip && iip->ili_last_lsn) ? 2487 if (iip && iip->ili_last_lsn)
2487 iip->ili_last_lsn : 0, XFS_LOG_FORCE); 2488 xfs_log_force_lsn(ip->i_mount, iip->ili_last_lsn, 0);
2489 else
2490 xfs_log_force(ip->i_mount, 0);
2491
2488 if (wait) 2492 if (wait)
2489 wait_event(ip->i_ipin_wait, (atomic_read(&ip->i_pincount) == 0)); 2493 wait_event(ip->i_ipin_wait, (atomic_read(&ip->i_pincount) == 0));
2490} 2494}
2491 2495
2492static inline void 2496void
2493xfs_iunpin_wait( 2497xfs_iunpin_wait(
2494 xfs_inode_t *ip) 2498 xfs_inode_t *ip)
2495{ 2499{
@@ -2675,7 +2679,7 @@ xfs_iflush_cluster(
2675 xfs_buf_t *bp) 2679 xfs_buf_t *bp)
2676{ 2680{
2677 xfs_mount_t *mp = ip->i_mount; 2681 xfs_mount_t *mp = ip->i_mount;
2678 xfs_perag_t *pag = xfs_get_perag(mp, ip->i_ino); 2682 struct xfs_perag *pag;
2679 unsigned long first_index, mask; 2683 unsigned long first_index, mask;
2680 unsigned long inodes_per_cluster; 2684 unsigned long inodes_per_cluster;
2681 int ilist_size; 2685 int ilist_size;
@@ -2686,6 +2690,7 @@ xfs_iflush_cluster(
2686 int bufwasdelwri; 2690 int bufwasdelwri;
2687 int i; 2691 int i;
2688 2692
2693 pag = xfs_perag_get(mp, XFS_INO_TO_AGNO(mp, ip->i_ino));
2689 ASSERT(pag->pagi_inodeok); 2694 ASSERT(pag->pagi_inodeok);
2690 ASSERT(pag->pag_ici_init); 2695 ASSERT(pag->pag_ici_init);
2691 2696
@@ -2693,7 +2698,7 @@ xfs_iflush_cluster(
2693 ilist_size = inodes_per_cluster * sizeof(xfs_inode_t *); 2698 ilist_size = inodes_per_cluster * sizeof(xfs_inode_t *);
2694 ilist = kmem_alloc(ilist_size, KM_MAYFAIL|KM_NOFS); 2699 ilist = kmem_alloc(ilist_size, KM_MAYFAIL|KM_NOFS);
2695 if (!ilist) 2700 if (!ilist)
2696 return 0; 2701 goto out_put;
2697 2702
2698 mask = ~(((XFS_INODE_CLUSTER_SIZE(mp) >> mp->m_sb.sb_inodelog)) - 1); 2703 mask = ~(((XFS_INODE_CLUSTER_SIZE(mp) >> mp->m_sb.sb_inodelog)) - 1);
2699 first_index = XFS_INO_TO_AGINO(mp, ip->i_ino) & mask; 2704 first_index = XFS_INO_TO_AGINO(mp, ip->i_ino) & mask;
@@ -2762,6 +2767,8 @@ xfs_iflush_cluster(
2762out_free: 2767out_free:
2763 read_unlock(&pag->pag_ici_lock); 2768 read_unlock(&pag->pag_ici_lock);
2764 kmem_free(ilist); 2769 kmem_free(ilist);
2770out_put:
2771 xfs_perag_put(pag);
2765 return 0; 2772 return 0;
2766 2773
2767 2774
@@ -2805,6 +2812,7 @@ cluster_corrupt_out:
2805 */ 2812 */
2806 xfs_iflush_abort(iq); 2813 xfs_iflush_abort(iq);
2807 kmem_free(ilist); 2814 kmem_free(ilist);
2815 xfs_perag_put(pag);
2808 return XFS_ERROR(EFSCORRUPTED); 2816 return XFS_ERROR(EFSCORRUPTED);
2809} 2817}
2810 2818
@@ -2827,8 +2835,6 @@ xfs_iflush(
2827 xfs_dinode_t *dip; 2835 xfs_dinode_t *dip;
2828 xfs_mount_t *mp; 2836 xfs_mount_t *mp;
2829 int error; 2837 int error;
2830 int noblock = (flags == XFS_IFLUSH_ASYNC_NOBLOCK);
2831 enum { INT_DELWRI = (1 << 0), INT_ASYNC = (1 << 1) };
2832 2838
2833 XFS_STATS_INC(xs_iflush_count); 2839 XFS_STATS_INC(xs_iflush_count);
2834 2840
@@ -2841,15 +2847,6 @@ xfs_iflush(
2841 mp = ip->i_mount; 2847 mp = ip->i_mount;
2842 2848
2843 /* 2849 /*
2844 * If the inode isn't dirty, then just release the inode flush lock and
2845 * do nothing.
2846 */
2847 if (xfs_inode_clean(ip)) {
2848 xfs_ifunlock(ip);
2849 return 0;
2850 }
2851
2852 /*
2853 * We can't flush the inode until it is unpinned, so wait for it if we 2850 * We can't flush the inode until it is unpinned, so wait for it if we
2854 * are allowed to block. We know noone new can pin it, because we are 2851 * are allowed to block. We know noone new can pin it, because we are
2855 * holding the inode lock shared and you need to hold it exclusively to 2852 * holding the inode lock shared and you need to hold it exclusively to
@@ -2860,7 +2857,7 @@ xfs_iflush(
2860 * in the same cluster are dirty, they will probably write the inode 2857 * in the same cluster are dirty, they will probably write the inode
2861 * out for us if they occur after the log force completes. 2858 * out for us if they occur after the log force completes.
2862 */ 2859 */
2863 if (noblock && xfs_ipincount(ip)) { 2860 if (!(flags & SYNC_WAIT) && xfs_ipincount(ip)) {
2864 xfs_iunpin_nowait(ip); 2861 xfs_iunpin_nowait(ip);
2865 xfs_ifunlock(ip); 2862 xfs_ifunlock(ip);
2866 return EAGAIN; 2863 return EAGAIN;
@@ -2894,60 +2891,10 @@ xfs_iflush(
2894 } 2891 }
2895 2892
2896 /* 2893 /*
2897 * Decide how buffer will be flushed out. This is done before
2898 * the call to xfs_iflush_int because this field is zeroed by it.
2899 */
2900 if (iip != NULL && iip->ili_format.ilf_fields != 0) {
2901 /*
2902 * Flush out the inode buffer according to the directions
2903 * of the caller. In the cases where the caller has given
2904 * us a choice choose the non-delwri case. This is because
2905 * the inode is in the AIL and we need to get it out soon.
2906 */
2907 switch (flags) {
2908 case XFS_IFLUSH_SYNC:
2909 case XFS_IFLUSH_DELWRI_ELSE_SYNC:
2910 flags = 0;
2911 break;
2912 case XFS_IFLUSH_ASYNC_NOBLOCK:
2913 case XFS_IFLUSH_ASYNC:
2914 case XFS_IFLUSH_DELWRI_ELSE_ASYNC:
2915 flags = INT_ASYNC;
2916 break;
2917 case XFS_IFLUSH_DELWRI:
2918 flags = INT_DELWRI;
2919 break;
2920 default:
2921 ASSERT(0);
2922 flags = 0;
2923 break;
2924 }
2925 } else {
2926 switch (flags) {
2927 case XFS_IFLUSH_DELWRI_ELSE_SYNC:
2928 case XFS_IFLUSH_DELWRI_ELSE_ASYNC:
2929 case XFS_IFLUSH_DELWRI:
2930 flags = INT_DELWRI;
2931 break;
2932 case XFS_IFLUSH_ASYNC_NOBLOCK:
2933 case XFS_IFLUSH_ASYNC:
2934 flags = INT_ASYNC;
2935 break;
2936 case XFS_IFLUSH_SYNC:
2937 flags = 0;
2938 break;
2939 default:
2940 ASSERT(0);
2941 flags = 0;
2942 break;
2943 }
2944 }
2945
2946 /*
2947 * Get the buffer containing the on-disk inode. 2894 * Get the buffer containing the on-disk inode.
2948 */ 2895 */
2949 error = xfs_itobp(mp, NULL, ip, &dip, &bp, 2896 error = xfs_itobp(mp, NULL, ip, &dip, &bp,
2950 noblock ? XFS_BUF_TRYLOCK : XFS_BUF_LOCK); 2897 (flags & SYNC_WAIT) ? XBF_LOCK : XBF_TRYLOCK);
2951 if (error || !bp) { 2898 if (error || !bp) {
2952 xfs_ifunlock(ip); 2899 xfs_ifunlock(ip);
2953 return error; 2900 return error;
@@ -2965,7 +2912,7 @@ xfs_iflush(
2965 * get stuck waiting in the write for too long. 2912 * get stuck waiting in the write for too long.
2966 */ 2913 */
2967 if (XFS_BUF_ISPINNED(bp)) 2914 if (XFS_BUF_ISPINNED(bp))
2968 xfs_log_force(mp, (xfs_lsn_t)0, XFS_LOG_FORCE); 2915 xfs_log_force(mp, 0);
2969 2916
2970 /* 2917 /*
2971 * inode clustering: 2918 * inode clustering:
@@ -2975,13 +2922,10 @@ xfs_iflush(
2975 if (error) 2922 if (error)
2976 goto cluster_corrupt_out; 2923 goto cluster_corrupt_out;
2977 2924
2978 if (flags & INT_DELWRI) { 2925 if (flags & SYNC_WAIT)
2979 xfs_bdwrite(mp, bp);
2980 } else if (flags & INT_ASYNC) {
2981 error = xfs_bawrite(mp, bp);
2982 } else {
2983 error = xfs_bwrite(mp, bp); 2926 error = xfs_bwrite(mp, bp);
2984 } 2927 else
2928 xfs_bdwrite(mp, bp);
2985 return error; 2929 return error;
2986 2930
2987corrupt_out: 2931corrupt_out:
@@ -3016,16 +2960,6 @@ xfs_iflush_int(
3016 iip = ip->i_itemp; 2960 iip = ip->i_itemp;
3017 mp = ip->i_mount; 2961 mp = ip->i_mount;
3018 2962
3019
3020 /*
3021 * If the inode isn't dirty, then just release the inode
3022 * flush lock and do nothing.
3023 */
3024 if (xfs_inode_clean(ip)) {
3025 xfs_ifunlock(ip);
3026 return 0;
3027 }
3028
3029 /* set *dip = inode's place in the buffer */ 2963 /* set *dip = inode's place in the buffer */
3030 dip = (xfs_dinode_t *)xfs_buf_offset(bp, ip->i_imap.im_boffset); 2964 dip = (xfs_dinode_t *)xfs_buf_offset(bp, ip->i_imap.im_boffset);
3031 2965
diff --git a/fs/xfs/xfs_inode.h b/fs/xfs/xfs_inode.h
index ec1f28c4fc4f..6c912b027596 100644
--- a/fs/xfs/xfs_inode.h
+++ b/fs/xfs/xfs_inode.h
@@ -420,16 +420,6 @@ static inline void xfs_ifunlock(xfs_inode_t *ip)
420#define XFS_ILOCK_DEP(flags) (((flags) & XFS_ILOCK_DEP_MASK) >> XFS_ILOCK_SHIFT) 420#define XFS_ILOCK_DEP(flags) (((flags) & XFS_ILOCK_DEP_MASK) >> XFS_ILOCK_SHIFT)
421 421
422/* 422/*
423 * Flags for xfs_iflush()
424 */
425#define XFS_IFLUSH_DELWRI_ELSE_SYNC 1
426#define XFS_IFLUSH_DELWRI_ELSE_ASYNC 2
427#define XFS_IFLUSH_SYNC 3
428#define XFS_IFLUSH_ASYNC 4
429#define XFS_IFLUSH_DELWRI 5
430#define XFS_IFLUSH_ASYNC_NOBLOCK 6
431
432/*
433 * Flags for xfs_itruncate_start(). 423 * Flags for xfs_itruncate_start().
434 */ 424 */
435#define XFS_ITRUNC_DEFINITE 0x1 425#define XFS_ITRUNC_DEFINITE 0x1
@@ -483,6 +473,7 @@ int xfs_iunlink(struct xfs_trans *, xfs_inode_t *);
483void xfs_iext_realloc(xfs_inode_t *, int, int); 473void xfs_iext_realloc(xfs_inode_t *, int, int);
484void xfs_ipin(xfs_inode_t *); 474void xfs_ipin(xfs_inode_t *);
485void xfs_iunpin(xfs_inode_t *); 475void xfs_iunpin(xfs_inode_t *);
476void xfs_iunpin_wait(xfs_inode_t *);
486int xfs_iflush(xfs_inode_t *, uint); 477int xfs_iflush(xfs_inode_t *, uint);
487void xfs_ichgtime(xfs_inode_t *, int); 478void xfs_ichgtime(xfs_inode_t *, int);
488void xfs_lock_inodes(xfs_inode_t **, int, uint); 479void xfs_lock_inodes(xfs_inode_t **, int, uint);
diff --git a/fs/xfs/xfs_inode_item.c b/fs/xfs/xfs_inode_item.c
index f38855d21ea5..d4dc063111f8 100644
--- a/fs/xfs/xfs_inode_item.c
+++ b/fs/xfs/xfs_inode_item.c
@@ -228,7 +228,7 @@ xfs_inode_item_format(
228 228
229 vecp->i_addr = (xfs_caddr_t)&iip->ili_format; 229 vecp->i_addr = (xfs_caddr_t)&iip->ili_format;
230 vecp->i_len = sizeof(xfs_inode_log_format_t); 230 vecp->i_len = sizeof(xfs_inode_log_format_t);
231 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_IFORMAT); 231 vecp->i_type = XLOG_REG_TYPE_IFORMAT;
232 vecp++; 232 vecp++;
233 nvecs = 1; 233 nvecs = 1;
234 234
@@ -279,7 +279,7 @@ xfs_inode_item_format(
279 279
280 vecp->i_addr = (xfs_caddr_t)&ip->i_d; 280 vecp->i_addr = (xfs_caddr_t)&ip->i_d;
281 vecp->i_len = sizeof(struct xfs_icdinode); 281 vecp->i_len = sizeof(struct xfs_icdinode);
282 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_ICORE); 282 vecp->i_type = XLOG_REG_TYPE_ICORE;
283 vecp++; 283 vecp++;
284 nvecs++; 284 nvecs++;
285 iip->ili_format.ilf_fields |= XFS_ILOG_CORE; 285 iip->ili_format.ilf_fields |= XFS_ILOG_CORE;
@@ -336,7 +336,7 @@ xfs_inode_item_format(
336 vecp->i_addr = 336 vecp->i_addr =
337 (char *)(ip->i_df.if_u1.if_extents); 337 (char *)(ip->i_df.if_u1.if_extents);
338 vecp->i_len = ip->i_df.if_bytes; 338 vecp->i_len = ip->i_df.if_bytes;
339 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_IEXT); 339 vecp->i_type = XLOG_REG_TYPE_IEXT;
340 } else 340 } else
341#endif 341#endif
342 { 342 {
@@ -355,7 +355,7 @@ xfs_inode_item_format(
355 vecp->i_addr = (xfs_caddr_t)ext_buffer; 355 vecp->i_addr = (xfs_caddr_t)ext_buffer;
356 vecp->i_len = xfs_iextents_copy(ip, ext_buffer, 356 vecp->i_len = xfs_iextents_copy(ip, ext_buffer,
357 XFS_DATA_FORK); 357 XFS_DATA_FORK);
358 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_IEXT); 358 vecp->i_type = XLOG_REG_TYPE_IEXT;
359 } 359 }
360 ASSERT(vecp->i_len <= ip->i_df.if_bytes); 360 ASSERT(vecp->i_len <= ip->i_df.if_bytes);
361 iip->ili_format.ilf_dsize = vecp->i_len; 361 iip->ili_format.ilf_dsize = vecp->i_len;
@@ -373,7 +373,7 @@ xfs_inode_item_format(
373 ASSERT(ip->i_df.if_broot != NULL); 373 ASSERT(ip->i_df.if_broot != NULL);
374 vecp->i_addr = (xfs_caddr_t)ip->i_df.if_broot; 374 vecp->i_addr = (xfs_caddr_t)ip->i_df.if_broot;
375 vecp->i_len = ip->i_df.if_broot_bytes; 375 vecp->i_len = ip->i_df.if_broot_bytes;
376 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_IBROOT); 376 vecp->i_type = XLOG_REG_TYPE_IBROOT;
377 vecp++; 377 vecp++;
378 nvecs++; 378 nvecs++;
379 iip->ili_format.ilf_dsize = ip->i_df.if_broot_bytes; 379 iip->ili_format.ilf_dsize = ip->i_df.if_broot_bytes;
@@ -399,7 +399,7 @@ xfs_inode_item_format(
399 ASSERT((ip->i_df.if_real_bytes == 0) || 399 ASSERT((ip->i_df.if_real_bytes == 0) ||
400 (ip->i_df.if_real_bytes == data_bytes)); 400 (ip->i_df.if_real_bytes == data_bytes));
401 vecp->i_len = (int)data_bytes; 401 vecp->i_len = (int)data_bytes;
402 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_ILOCAL); 402 vecp->i_type = XLOG_REG_TYPE_ILOCAL;
403 vecp++; 403 vecp++;
404 nvecs++; 404 nvecs++;
405 iip->ili_format.ilf_dsize = (unsigned)data_bytes; 405 iip->ili_format.ilf_dsize = (unsigned)data_bytes;
@@ -477,7 +477,7 @@ xfs_inode_item_format(
477 vecp->i_len = xfs_iextents_copy(ip, ext_buffer, 477 vecp->i_len = xfs_iextents_copy(ip, ext_buffer,
478 XFS_ATTR_FORK); 478 XFS_ATTR_FORK);
479#endif 479#endif
480 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_IATTR_EXT); 480 vecp->i_type = XLOG_REG_TYPE_IATTR_EXT;
481 iip->ili_format.ilf_asize = vecp->i_len; 481 iip->ili_format.ilf_asize = vecp->i_len;
482 vecp++; 482 vecp++;
483 nvecs++; 483 nvecs++;
@@ -492,7 +492,7 @@ xfs_inode_item_format(
492 ASSERT(ip->i_afp->if_broot != NULL); 492 ASSERT(ip->i_afp->if_broot != NULL);
493 vecp->i_addr = (xfs_caddr_t)ip->i_afp->if_broot; 493 vecp->i_addr = (xfs_caddr_t)ip->i_afp->if_broot;
494 vecp->i_len = ip->i_afp->if_broot_bytes; 494 vecp->i_len = ip->i_afp->if_broot_bytes;
495 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_IATTR_BROOT); 495 vecp->i_type = XLOG_REG_TYPE_IATTR_BROOT;
496 vecp++; 496 vecp++;
497 nvecs++; 497 nvecs++;
498 iip->ili_format.ilf_asize = ip->i_afp->if_broot_bytes; 498 iip->ili_format.ilf_asize = ip->i_afp->if_broot_bytes;
@@ -516,7 +516,7 @@ xfs_inode_item_format(
516 ASSERT((ip->i_afp->if_real_bytes == 0) || 516 ASSERT((ip->i_afp->if_real_bytes == 0) ||
517 (ip->i_afp->if_real_bytes == data_bytes)); 517 (ip->i_afp->if_real_bytes == data_bytes));
518 vecp->i_len = (int)data_bytes; 518 vecp->i_len = (int)data_bytes;
519 XLOG_VEC_SET_TYPE(vecp, XLOG_REG_TYPE_IATTR_LOCAL); 519 vecp->i_type = XLOG_REG_TYPE_IATTR_LOCAL;
520 vecp++; 520 vecp++;
521 nvecs++; 521 nvecs++;
522 iip->ili_format.ilf_asize = (unsigned)data_bytes; 522 iip->ili_format.ilf_asize = (unsigned)data_bytes;
@@ -602,33 +602,20 @@ xfs_inode_item_trylock(
602 602
603 if (!xfs_iflock_nowait(ip)) { 603 if (!xfs_iflock_nowait(ip)) {
604 /* 604 /*
605 * If someone else isn't already trying to push the inode 605 * inode has already been flushed to the backing buffer,
606 * buffer, we get to do it. 606 * leave it locked in shared mode, pushbuf routine will
607 * unlock it.
607 */ 608 */
608 if (iip->ili_pushbuf_flag == 0) { 609 return XFS_ITEM_PUSHBUF;
609 iip->ili_pushbuf_flag = 1;
610#ifdef DEBUG
611 iip->ili_push_owner = current_pid();
612#endif
613 /*
614 * Inode is left locked in shared mode.
615 * Pushbuf routine gets to unlock it.
616 */
617 return XFS_ITEM_PUSHBUF;
618 } else {
619 /*
620 * We hold the AIL lock, so we must specify the
621 * NONOTIFY flag so that we won't double trip.
622 */
623 xfs_iunlock(ip, XFS_ILOCK_SHARED|XFS_IUNLOCK_NONOTIFY);
624 return XFS_ITEM_FLUSHING;
625 }
626 /* NOTREACHED */
627 } 610 }
628 611
629 /* Stale items should force out the iclog */ 612 /* Stale items should force out the iclog */
630 if (ip->i_flags & XFS_ISTALE) { 613 if (ip->i_flags & XFS_ISTALE) {
631 xfs_ifunlock(ip); 614 xfs_ifunlock(ip);
615 /*
616 * we hold the AIL lock - notify the unlock routine of this
617 * so it doesn't try to get the lock again.
618 */
632 xfs_iunlock(ip, XFS_ILOCK_SHARED|XFS_IUNLOCK_NONOTIFY); 619 xfs_iunlock(ip, XFS_ILOCK_SHARED|XFS_IUNLOCK_NONOTIFY);
633 return XFS_ITEM_PINNED; 620 return XFS_ITEM_PINNED;
634 } 621 }
@@ -746,11 +733,8 @@ xfs_inode_item_committed(
746 * This gets called by xfs_trans_push_ail(), when IOP_TRYLOCK 733 * This gets called by xfs_trans_push_ail(), when IOP_TRYLOCK
747 * failed to get the inode flush lock but did get the inode locked SHARED. 734 * failed to get the inode flush lock but did get the inode locked SHARED.
748 * Here we're trying to see if the inode buffer is incore, and if so whether it's 735 * Here we're trying to see if the inode buffer is incore, and if so whether it's
749 * marked delayed write. If that's the case, we'll initiate a bawrite on that 736 * marked delayed write. If that's the case, we'll promote it and that will
750 * buffer to expedite the process. 737 * allow the caller to write the buffer by triggering the xfsbufd to run.
751 *
752 * We aren't holding the AIL lock (or the flush lock) when this gets called,
753 * so it is inherently race-y.
754 */ 738 */
755STATIC void 739STATIC void
756xfs_inode_item_pushbuf( 740xfs_inode_item_pushbuf(
@@ -759,82 +743,30 @@ xfs_inode_item_pushbuf(
759 xfs_inode_t *ip; 743 xfs_inode_t *ip;
760 xfs_mount_t *mp; 744 xfs_mount_t *mp;
761 xfs_buf_t *bp; 745 xfs_buf_t *bp;
762 uint dopush;
763 746
764 ip = iip->ili_inode; 747 ip = iip->ili_inode;
765
766 ASSERT(xfs_isilocked(ip, XFS_ILOCK_SHARED)); 748 ASSERT(xfs_isilocked(ip, XFS_ILOCK_SHARED));
767 749
768 /* 750 /*
769 * The ili_pushbuf_flag keeps others from
770 * trying to duplicate our effort.
771 */
772 ASSERT(iip->ili_pushbuf_flag != 0);
773 ASSERT(iip->ili_push_owner == current_pid());
774
775 /*
776 * If a flush is not in progress anymore, chances are that the 751 * If a flush is not in progress anymore, chances are that the
777 * inode was taken off the AIL. So, just get out. 752 * inode was taken off the AIL. So, just get out.
778 */ 753 */
779 if (completion_done(&ip->i_flush) || 754 if (completion_done(&ip->i_flush) ||
780 ((iip->ili_item.li_flags & XFS_LI_IN_AIL) == 0)) { 755 ((iip->ili_item.li_flags & XFS_LI_IN_AIL) == 0)) {
781 iip->ili_pushbuf_flag = 0;
782 xfs_iunlock(ip, XFS_ILOCK_SHARED); 756 xfs_iunlock(ip, XFS_ILOCK_SHARED);
783 return; 757 return;
784 } 758 }
785 759
786 mp = ip->i_mount; 760 mp = ip->i_mount;
787 bp = xfs_incore(mp->m_ddev_targp, iip->ili_format.ilf_blkno, 761 bp = xfs_incore(mp->m_ddev_targp, iip->ili_format.ilf_blkno,
788 iip->ili_format.ilf_len, XFS_INCORE_TRYLOCK); 762 iip->ili_format.ilf_len, XBF_TRYLOCK);
789 763
790 if (bp != NULL) {
791 if (XFS_BUF_ISDELAYWRITE(bp)) {
792 /*
793 * We were racing with iflush because we don't hold
794 * the AIL lock or the flush lock. However, at this point,
795 * we have the buffer, and we know that it's dirty.
796 * So, it's possible that iflush raced with us, and
797 * this item is already taken off the AIL.
798 * If not, we can flush it async.
799 */
800 dopush = ((iip->ili_item.li_flags & XFS_LI_IN_AIL) &&
801 !completion_done(&ip->i_flush));
802 iip->ili_pushbuf_flag = 0;
803 xfs_iunlock(ip, XFS_ILOCK_SHARED);
804
805 trace_xfs_inode_item_push(bp, _RET_IP_);
806
807 if (XFS_BUF_ISPINNED(bp)) {
808 xfs_log_force(mp, (xfs_lsn_t)0,
809 XFS_LOG_FORCE);
810 }
811 if (dopush) {
812 int error;
813 error = xfs_bawrite(mp, bp);
814 if (error)
815 xfs_fs_cmn_err(CE_WARN, mp,
816 "xfs_inode_item_pushbuf: pushbuf error %d on iip %p, bp %p",
817 error, iip, bp);
818 } else {
819 xfs_buf_relse(bp);
820 }
821 } else {
822 iip->ili_pushbuf_flag = 0;
823 xfs_iunlock(ip, XFS_ILOCK_SHARED);
824 xfs_buf_relse(bp);
825 }
826 return;
827 }
828 /*
829 * We have to be careful about resetting pushbuf flag too early (above).
830 * Even though in theory we can do it as soon as we have the buflock,
831 * we don't want others to be doing work needlessly. They'll come to
832 * this function thinking that pushing the buffer is their
833 * responsibility only to find that the buffer is still locked by
834 * another doing the same thing
835 */
836 iip->ili_pushbuf_flag = 0;
837 xfs_iunlock(ip, XFS_ILOCK_SHARED); 764 xfs_iunlock(ip, XFS_ILOCK_SHARED);
765 if (!bp)
766 return;
767 if (XFS_BUF_ISDELAYWRITE(bp))
768 xfs_buf_delwri_promote(bp);
769 xfs_buf_relse(bp);
838 return; 770 return;
839} 771}
840 772
@@ -867,10 +799,14 @@ xfs_inode_item_push(
867 iip->ili_format.ilf_fields != 0); 799 iip->ili_format.ilf_fields != 0);
868 800
869 /* 801 /*
870 * Write out the inode. The completion routine ('iflush_done') will 802 * Push the inode to it's backing buffer. This will not remove the
871 * pull it from the AIL, mark it clean, unlock the flush lock. 803 * inode from the AIL - a further push will be required to trigger a
804 * buffer push. However, this allows all the dirty inodes to be pushed
805 * to the buffer before it is pushed to disk. THe buffer IO completion
806 * will pull th einode from the AIL, mark it clean and unlock the flush
807 * lock.
872 */ 808 */
873 (void) xfs_iflush(ip, XFS_IFLUSH_ASYNC); 809 (void) xfs_iflush(ip, 0);
874 xfs_iunlock(ip, XFS_ILOCK_SHARED); 810 xfs_iunlock(ip, XFS_ILOCK_SHARED);
875 811
876 return; 812 return;
@@ -934,7 +870,6 @@ xfs_inode_item_init(
934 /* 870 /*
935 We have zeroed memory. No need ... 871 We have zeroed memory. No need ...
936 iip->ili_extents_buf = NULL; 872 iip->ili_extents_buf = NULL;
937 iip->ili_pushbuf_flag = 0;
938 */ 873 */
939 874
940 iip->ili_format.ilf_type = XFS_LI_INODE; 875 iip->ili_format.ilf_type = XFS_LI_INODE;
diff --git a/fs/xfs/xfs_inode_item.h b/fs/xfs/xfs_inode_item.h
index cc8df1ac7783..9a467958ecdd 100644
--- a/fs/xfs/xfs_inode_item.h
+++ b/fs/xfs/xfs_inode_item.h
@@ -144,12 +144,6 @@ typedef struct xfs_inode_log_item {
144 data exts */ 144 data exts */
145 struct xfs_bmbt_rec *ili_aextents_buf; /* array of logged 145 struct xfs_bmbt_rec *ili_aextents_buf; /* array of logged
146 attr exts */ 146 attr exts */
147 unsigned int ili_pushbuf_flag; /* one bit used in push_ail */
148
149#ifdef DEBUG
150 uint64_t ili_push_owner; /* one who sets pushbuf_flag
151 above gets to push the buf */
152#endif
153#ifdef XFS_TRANS_DEBUG 147#ifdef XFS_TRANS_DEBUG
154 int ili_root_size; 148 int ili_root_size;
155 char *ili_orig_root; 149 char *ili_orig_root;
diff --git a/fs/xfs/xfs_itable.c b/fs/xfs/xfs_itable.c
index 62efab2f3839..3af02314c605 100644
--- a/fs/xfs/xfs_itable.c
+++ b/fs/xfs/xfs_itable.c
@@ -408,8 +408,10 @@ xfs_bulkstat(
408 (XFS_INODE_CLUSTER_SIZE(mp) >> mp->m_sb.sb_inodelog); 408 (XFS_INODE_CLUSTER_SIZE(mp) >> mp->m_sb.sb_inodelog);
409 nimask = ~(nicluster - 1); 409 nimask = ~(nicluster - 1);
410 nbcluster = nicluster >> mp->m_sb.sb_inopblog; 410 nbcluster = nicluster >> mp->m_sb.sb_inopblog;
411 irbuf = kmem_zalloc_greedy(&irbsize, PAGE_SIZE, PAGE_SIZE * 4, 411 irbuf = kmem_zalloc_greedy(&irbsize, PAGE_SIZE, PAGE_SIZE * 4);
412 KM_SLEEP | KM_MAYFAIL | KM_LARGE); 412 if (!irbuf)
413 return ENOMEM;
414
413 nirbuf = irbsize / sizeof(*irbuf); 415 nirbuf = irbsize / sizeof(*irbuf);
414 416
415 /* 417 /*
@@ -420,9 +422,7 @@ xfs_bulkstat(
420 while (XFS_BULKSTAT_UBLEFT(ubleft) && agno < mp->m_sb.sb_agcount) { 422 while (XFS_BULKSTAT_UBLEFT(ubleft) && agno < mp->m_sb.sb_agcount) {
421 cond_resched(); 423 cond_resched();
422 bp = NULL; 424 bp = NULL;
423 down_read(&mp->m_peraglock);
424 error = xfs_ialloc_read_agi(mp, NULL, agno, &agbp); 425 error = xfs_ialloc_read_agi(mp, NULL, agno, &agbp);
425 up_read(&mp->m_peraglock);
426 if (error) { 426 if (error) {
427 /* 427 /*
428 * Skip this allocation group and go to the next one. 428 * Skip this allocation group and go to the next one.
@@ -729,7 +729,7 @@ xfs_bulkstat(
729 /* 729 /*
730 * Done, we're either out of filesystem or space to put the data. 730 * Done, we're either out of filesystem or space to put the data.
731 */ 731 */
732 kmem_free(irbuf); 732 kmem_free_large(irbuf);
733 *ubcountp = ubelem; 733 *ubcountp = ubelem;
734 /* 734 /*
735 * Found some inodes, return them now and return the error next time. 735 * Found some inodes, return them now and return the error next time.
@@ -849,9 +849,7 @@ xfs_inumbers(
849 agbp = NULL; 849 agbp = NULL;
850 while (left > 0 && agno < mp->m_sb.sb_agcount) { 850 while (left > 0 && agno < mp->m_sb.sb_agcount) {
851 if (agbp == NULL) { 851 if (agbp == NULL) {
852 down_read(&mp->m_peraglock);
853 error = xfs_ialloc_read_agi(mp, NULL, agno, &agbp); 852 error = xfs_ialloc_read_agi(mp, NULL, agno, &agbp);
854 up_read(&mp->m_peraglock);
855 if (error) { 853 if (error) {
856 /* 854 /*
857 * If we can't read the AGI of this ag, 855 * If we can't read the AGI of this ag,
diff --git a/fs/xfs/xfs_log.c b/fs/xfs/xfs_log.c
index 600b5b06aaeb..4f16be4b6ee5 100644
--- a/fs/xfs/xfs_log.c
+++ b/fs/xfs/xfs_log.c
@@ -50,7 +50,6 @@ kmem_zone_t *xfs_log_ticket_zone;
50 (off) += (bytes);} 50 (off) += (bytes);}
51 51
52/* Local miscellaneous function prototypes */ 52/* Local miscellaneous function prototypes */
53STATIC int xlog_bdstrat_cb(struct xfs_buf *);
54STATIC int xlog_commit_record(xfs_mount_t *mp, xlog_ticket_t *ticket, 53STATIC int xlog_commit_record(xfs_mount_t *mp, xlog_ticket_t *ticket,
55 xlog_in_core_t **, xfs_lsn_t *); 54 xlog_in_core_t **, xfs_lsn_t *);
56STATIC xlog_t * xlog_alloc_log(xfs_mount_t *mp, 55STATIC xlog_t * xlog_alloc_log(xfs_mount_t *mp,
@@ -80,11 +79,6 @@ STATIC int xlog_state_release_iclog(xlog_t *log,
80STATIC void xlog_state_switch_iclogs(xlog_t *log, 79STATIC void xlog_state_switch_iclogs(xlog_t *log,
81 xlog_in_core_t *iclog, 80 xlog_in_core_t *iclog,
82 int eventual_size); 81 int eventual_size);
83STATIC int xlog_state_sync(xlog_t *log,
84 xfs_lsn_t lsn,
85 uint flags,
86 int *log_flushed);
87STATIC int xlog_state_sync_all(xlog_t *log, uint flags, int *log_flushed);
88STATIC void xlog_state_want_sync(xlog_t *log, xlog_in_core_t *iclog); 82STATIC void xlog_state_want_sync(xlog_t *log, xlog_in_core_t *iclog);
89 83
90/* local functions to manipulate grant head */ 84/* local functions to manipulate grant head */
@@ -297,65 +291,6 @@ xfs_log_done(xfs_mount_t *mp,
297 return lsn; 291 return lsn;
298} /* xfs_log_done */ 292} /* xfs_log_done */
299 293
300
301/*
302 * Force the in-core log to disk. If flags == XFS_LOG_SYNC,
303 * the force is done synchronously.
304 *
305 * Asynchronous forces are implemented by setting the WANT_SYNC
306 * bit in the appropriate in-core log and then returning.
307 *
308 * Synchronous forces are implemented with a signal variable. All callers
309 * to force a given lsn to disk will wait on a the sv attached to the
310 * specific in-core log. When given in-core log finally completes its
311 * write to disk, that thread will wake up all threads waiting on the
312 * sv.
313 */
314int
315_xfs_log_force(
316 xfs_mount_t *mp,
317 xfs_lsn_t lsn,
318 uint flags,
319 int *log_flushed)
320{
321 xlog_t *log = mp->m_log;
322 int dummy;
323
324 if (!log_flushed)
325 log_flushed = &dummy;
326
327 ASSERT(flags & XFS_LOG_FORCE);
328
329 XFS_STATS_INC(xs_log_force);
330
331 if (log->l_flags & XLOG_IO_ERROR)
332 return XFS_ERROR(EIO);
333 if (lsn == 0)
334 return xlog_state_sync_all(log, flags, log_flushed);
335 else
336 return xlog_state_sync(log, lsn, flags, log_flushed);
337} /* _xfs_log_force */
338
339/*
340 * Wrapper for _xfs_log_force(), to be used when caller doesn't care
341 * about errors or whether the log was flushed or not. This is the normal
342 * interface to use when trying to unpin items or move the log forward.
343 */
344void
345xfs_log_force(
346 xfs_mount_t *mp,
347 xfs_lsn_t lsn,
348 uint flags)
349{
350 int error;
351 error = _xfs_log_force(mp, lsn, flags, NULL);
352 if (error) {
353 xfs_fs_cmn_err(CE_WARN, mp, "xfs_log_force: "
354 "error %d returned.", error);
355 }
356}
357
358
359/* 294/*
360 * Attaches a new iclog I/O completion callback routine during 295 * Attaches a new iclog I/O completion callback routine during
361 * transaction commit. If the log is in error state, a non-zero 296 * transaction commit. If the log is in error state, a non-zero
@@ -602,7 +537,7 @@ xfs_log_unmount_write(xfs_mount_t *mp)
602 if (mp->m_flags & XFS_MOUNT_RDONLY) 537 if (mp->m_flags & XFS_MOUNT_RDONLY)
603 return 0; 538 return 0;
604 539
605 error = _xfs_log_force(mp, 0, XFS_LOG_FORCE|XFS_LOG_SYNC, NULL); 540 error = _xfs_log_force(mp, XFS_LOG_SYNC, NULL);
606 ASSERT(error || !(XLOG_FORCED_SHUTDOWN(log))); 541 ASSERT(error || !(XLOG_FORCED_SHUTDOWN(log)));
607 542
608#ifdef DEBUG 543#ifdef DEBUG
@@ -618,7 +553,7 @@ xfs_log_unmount_write(xfs_mount_t *mp)
618 if (! (XLOG_FORCED_SHUTDOWN(log))) { 553 if (! (XLOG_FORCED_SHUTDOWN(log))) {
619 reg[0].i_addr = (void*)&magic; 554 reg[0].i_addr = (void*)&magic;
620 reg[0].i_len = sizeof(magic); 555 reg[0].i_len = sizeof(magic);
621 XLOG_VEC_SET_TYPE(&reg[0], XLOG_REG_TYPE_UNMOUNT); 556 reg[0].i_type = XLOG_REG_TYPE_UNMOUNT;
622 557
623 error = xfs_log_reserve(mp, 600, 1, &tic, 558 error = xfs_log_reserve(mp, 600, 1, &tic,
624 XFS_LOG, 0, XLOG_UNMOUNT_REC_TYPE); 559 XFS_LOG, 0, XLOG_UNMOUNT_REC_TYPE);
@@ -988,35 +923,6 @@ xlog_iodone(xfs_buf_t *bp)
988} /* xlog_iodone */ 923} /* xlog_iodone */
989 924
990/* 925/*
991 * The bdstrat callback function for log bufs. This gives us a central
992 * place to trap bufs in case we get hit by a log I/O error and need to
993 * shutdown. Actually, in practice, even when we didn't get a log error,
994 * we transition the iclogs to IOERROR state *after* flushing all existing
995 * iclogs to disk. This is because we don't want anymore new transactions to be
996 * started or completed afterwards.
997 */
998STATIC int
999xlog_bdstrat_cb(struct xfs_buf *bp)
1000{
1001 xlog_in_core_t *iclog;
1002
1003 iclog = XFS_BUF_FSPRIVATE(bp, xlog_in_core_t *);
1004
1005 if ((iclog->ic_state & XLOG_STATE_IOERROR) == 0) {
1006 /* note for irix bstrat will need struct bdevsw passed
1007 * Fix the following macro if the code ever is merged
1008 */
1009 XFS_bdstrat(bp);
1010 return 0;
1011 }
1012
1013 XFS_BUF_ERROR(bp, EIO);
1014 XFS_BUF_STALE(bp);
1015 xfs_biodone(bp);
1016 return XFS_ERROR(EIO);
1017}
1018
1019/*
1020 * Return size of each in-core log record buffer. 926 * Return size of each in-core log record buffer.
1021 * 927 *
1022 * All machines get 8 x 32kB buffers by default, unless tuned otherwise. 928 * All machines get 8 x 32kB buffers by default, unless tuned otherwise.
@@ -1158,7 +1064,6 @@ xlog_alloc_log(xfs_mount_t *mp,
1158 if (!bp) 1064 if (!bp)
1159 goto out_free_log; 1065 goto out_free_log;
1160 XFS_BUF_SET_IODONE_FUNC(bp, xlog_iodone); 1066 XFS_BUF_SET_IODONE_FUNC(bp, xlog_iodone);
1161 XFS_BUF_SET_BDSTRAT_FUNC(bp, xlog_bdstrat_cb);
1162 XFS_BUF_SET_FSPRIVATE2(bp, (unsigned long)1); 1067 XFS_BUF_SET_FSPRIVATE2(bp, (unsigned long)1);
1163 ASSERT(XFS_BUF_ISBUSY(bp)); 1068 ASSERT(XFS_BUF_ISBUSY(bp));
1164 ASSERT(XFS_BUF_VALUSEMA(bp) <= 0); 1069 ASSERT(XFS_BUF_VALUSEMA(bp) <= 0);
@@ -1196,7 +1101,6 @@ xlog_alloc_log(xfs_mount_t *mp,
1196 if (!XFS_BUF_CPSEMA(bp)) 1101 if (!XFS_BUF_CPSEMA(bp))
1197 ASSERT(0); 1102 ASSERT(0);
1198 XFS_BUF_SET_IODONE_FUNC(bp, xlog_iodone); 1103 XFS_BUF_SET_IODONE_FUNC(bp, xlog_iodone);
1199 XFS_BUF_SET_BDSTRAT_FUNC(bp, xlog_bdstrat_cb);
1200 XFS_BUF_SET_FSPRIVATE2(bp, (unsigned long)1); 1104 XFS_BUF_SET_FSPRIVATE2(bp, (unsigned long)1);
1201 iclog->ic_bp = bp; 1105 iclog->ic_bp = bp;
1202 iclog->ic_data = bp->b_addr; 1106 iclog->ic_data = bp->b_addr;
@@ -1268,7 +1172,7 @@ xlog_commit_record(xfs_mount_t *mp,
1268 1172
1269 reg[0].i_addr = NULL; 1173 reg[0].i_addr = NULL;
1270 reg[0].i_len = 0; 1174 reg[0].i_len = 0;
1271 XLOG_VEC_SET_TYPE(&reg[0], XLOG_REG_TYPE_COMMIT); 1175 reg[0].i_type = XLOG_REG_TYPE_COMMIT;
1272 1176
1273 ASSERT_ALWAYS(iclog); 1177 ASSERT_ALWAYS(iclog);
1274 if ((error = xlog_write(mp, reg, 1, ticket, commitlsnp, 1178 if ((error = xlog_write(mp, reg, 1, ticket, commitlsnp,
@@ -1343,6 +1247,37 @@ xlog_grant_push_ail(xfs_mount_t *mp,
1343 xfs_trans_ail_push(log->l_ailp, threshold_lsn); 1247 xfs_trans_ail_push(log->l_ailp, threshold_lsn);
1344} /* xlog_grant_push_ail */ 1248} /* xlog_grant_push_ail */
1345 1249
1250/*
1251 * The bdstrat callback function for log bufs. This gives us a central
1252 * place to trap bufs in case we get hit by a log I/O error and need to
1253 * shutdown. Actually, in practice, even when we didn't get a log error,
1254 * we transition the iclogs to IOERROR state *after* flushing all existing
1255 * iclogs to disk. This is because we don't want anymore new transactions to be
1256 * started or completed afterwards.
1257 */
1258STATIC int
1259xlog_bdstrat(
1260 struct xfs_buf *bp)
1261{
1262 struct xlog_in_core *iclog;
1263
1264 iclog = XFS_BUF_FSPRIVATE(bp, xlog_in_core_t *);
1265 if (iclog->ic_state & XLOG_STATE_IOERROR) {
1266 XFS_BUF_ERROR(bp, EIO);
1267 XFS_BUF_STALE(bp);
1268 xfs_biodone(bp);
1269 /*
1270 * It would seem logical to return EIO here, but we rely on
1271 * the log state machine to propagate I/O errors instead of
1272 * doing it here.
1273 */
1274 return 0;
1275 }
1276
1277 bp->b_flags |= _XBF_RUN_QUEUES;
1278 xfs_buf_iorequest(bp);
1279 return 0;
1280}
1346 1281
1347/* 1282/*
1348 * Flush out the in-core log (iclog) to the on-disk log in an asynchronous 1283 * Flush out the in-core log (iclog) to the on-disk log in an asynchronous
@@ -1462,7 +1397,7 @@ xlog_sync(xlog_t *log,
1462 */ 1397 */
1463 XFS_BUF_WRITE(bp); 1398 XFS_BUF_WRITE(bp);
1464 1399
1465 if ((error = XFS_bwrite(bp))) { 1400 if ((error = xlog_bdstrat(bp))) {
1466 xfs_ioerror_alert("xlog_sync", log->l_mp, bp, 1401 xfs_ioerror_alert("xlog_sync", log->l_mp, bp,
1467 XFS_BUF_ADDR(bp)); 1402 XFS_BUF_ADDR(bp));
1468 return error; 1403 return error;
@@ -1502,7 +1437,7 @@ xlog_sync(xlog_t *log,
1502 /* account for internal log which doesn't start at block #0 */ 1437 /* account for internal log which doesn't start at block #0 */
1503 XFS_BUF_SET_ADDR(bp, XFS_BUF_ADDR(bp) + log->l_logBBstart); 1438 XFS_BUF_SET_ADDR(bp, XFS_BUF_ADDR(bp) + log->l_logBBstart);
1504 XFS_BUF_WRITE(bp); 1439 XFS_BUF_WRITE(bp);
1505 if ((error = XFS_bwrite(bp))) { 1440 if ((error = xlog_bdstrat(bp))) {
1506 xfs_ioerror_alert("xlog_sync (split)", log->l_mp, 1441 xfs_ioerror_alert("xlog_sync (split)", log->l_mp,
1507 bp, XFS_BUF_ADDR(bp)); 1442 bp, XFS_BUF_ADDR(bp));
1508 return error; 1443 return error;
@@ -2854,7 +2789,6 @@ xlog_state_switch_iclogs(xlog_t *log,
2854 log->l_iclog = iclog->ic_next; 2789 log->l_iclog = iclog->ic_next;
2855} /* xlog_state_switch_iclogs */ 2790} /* xlog_state_switch_iclogs */
2856 2791
2857
2858/* 2792/*
2859 * Write out all data in the in-core log as of this exact moment in time. 2793 * Write out all data in the in-core log as of this exact moment in time.
2860 * 2794 *
@@ -2882,11 +2816,17 @@ xlog_state_switch_iclogs(xlog_t *log,
2882 * b) when we return from flushing out this iclog, it is still 2816 * b) when we return from flushing out this iclog, it is still
2883 * not in the active nor dirty state. 2817 * not in the active nor dirty state.
2884 */ 2818 */
2885STATIC int 2819int
2886xlog_state_sync_all(xlog_t *log, uint flags, int *log_flushed) 2820_xfs_log_force(
2821 struct xfs_mount *mp,
2822 uint flags,
2823 int *log_flushed)
2887{ 2824{
2888 xlog_in_core_t *iclog; 2825 struct log *log = mp->m_log;
2889 xfs_lsn_t lsn; 2826 struct xlog_in_core *iclog;
2827 xfs_lsn_t lsn;
2828
2829 XFS_STATS_INC(xs_log_force);
2890 2830
2891 spin_lock(&log->l_icloglock); 2831 spin_lock(&log->l_icloglock);
2892 2832
@@ -2932,7 +2872,9 @@ xlog_state_sync_all(xlog_t *log, uint flags, int *log_flushed)
2932 2872
2933 if (xlog_state_release_iclog(log, iclog)) 2873 if (xlog_state_release_iclog(log, iclog))
2934 return XFS_ERROR(EIO); 2874 return XFS_ERROR(EIO);
2935 *log_flushed = 1; 2875
2876 if (log_flushed)
2877 *log_flushed = 1;
2936 spin_lock(&log->l_icloglock); 2878 spin_lock(&log->l_icloglock);
2937 if (be64_to_cpu(iclog->ic_header.h_lsn) == lsn && 2879 if (be64_to_cpu(iclog->ic_header.h_lsn) == lsn &&
2938 iclog->ic_state != XLOG_STATE_DIRTY) 2880 iclog->ic_state != XLOG_STATE_DIRTY)
@@ -2976,19 +2918,37 @@ maybe_sleep:
2976 */ 2918 */
2977 if (iclog->ic_state & XLOG_STATE_IOERROR) 2919 if (iclog->ic_state & XLOG_STATE_IOERROR)
2978 return XFS_ERROR(EIO); 2920 return XFS_ERROR(EIO);
2979 *log_flushed = 1; 2921 if (log_flushed)
2980 2922 *log_flushed = 1;
2981 } else { 2923 } else {
2982 2924
2983no_sleep: 2925no_sleep:
2984 spin_unlock(&log->l_icloglock); 2926 spin_unlock(&log->l_icloglock);
2985 } 2927 }
2986 return 0; 2928 return 0;
2987} /* xlog_state_sync_all */ 2929}
2988 2930
2931/*
2932 * Wrapper for _xfs_log_force(), to be used when caller doesn't care
2933 * about errors or whether the log was flushed or not. This is the normal
2934 * interface to use when trying to unpin items or move the log forward.
2935 */
2936void
2937xfs_log_force(
2938 xfs_mount_t *mp,
2939 uint flags)
2940{
2941 int error;
2942
2943 error = _xfs_log_force(mp, flags, NULL);
2944 if (error) {
2945 xfs_fs_cmn_err(CE_WARN, mp, "xfs_log_force: "
2946 "error %d returned.", error);
2947 }
2948}
2989 2949
2990/* 2950/*
2991 * Used by code which implements synchronous log forces. 2951 * Force the in-core log to disk for a specific LSN.
2992 * 2952 *
2993 * Find in-core log with lsn. 2953 * Find in-core log with lsn.
2994 * If it is in the DIRTY state, just return. 2954 * If it is in the DIRTY state, just return.
@@ -2996,109 +2956,142 @@ no_sleep:
2996 * state and go to sleep or return. 2956 * state and go to sleep or return.
2997 * If it is in any other state, go to sleep or return. 2957 * If it is in any other state, go to sleep or return.
2998 * 2958 *
2999 * If filesystem activity goes to zero, the iclog will get flushed only by 2959 * Synchronous forces are implemented with a signal variable. All callers
3000 * bdflush(). 2960 * to force a given lsn to disk will wait on a the sv attached to the
2961 * specific in-core log. When given in-core log finally completes its
2962 * write to disk, that thread will wake up all threads waiting on the
2963 * sv.
3001 */ 2964 */
3002STATIC int 2965int
3003xlog_state_sync(xlog_t *log, 2966_xfs_log_force_lsn(
3004 xfs_lsn_t lsn, 2967 struct xfs_mount *mp,
3005 uint flags, 2968 xfs_lsn_t lsn,
3006 int *log_flushed) 2969 uint flags,
2970 int *log_flushed)
3007{ 2971{
3008 xlog_in_core_t *iclog; 2972 struct log *log = mp->m_log;
3009 int already_slept = 0; 2973 struct xlog_in_core *iclog;
2974 int already_slept = 0;
3010 2975
3011try_again: 2976 ASSERT(lsn != 0);
3012 spin_lock(&log->l_icloglock);
3013 iclog = log->l_iclog;
3014 2977
3015 if (iclog->ic_state & XLOG_STATE_IOERROR) { 2978 XFS_STATS_INC(xs_log_force);
3016 spin_unlock(&log->l_icloglock);
3017 return XFS_ERROR(EIO);
3018 }
3019
3020 do {
3021 if (be64_to_cpu(iclog->ic_header.h_lsn) != lsn) {
3022 iclog = iclog->ic_next;
3023 continue;
3024 }
3025 2979
3026 if (iclog->ic_state == XLOG_STATE_DIRTY) { 2980try_again:
2981 spin_lock(&log->l_icloglock);
2982 iclog = log->l_iclog;
2983 if (iclog->ic_state & XLOG_STATE_IOERROR) {
3027 spin_unlock(&log->l_icloglock); 2984 spin_unlock(&log->l_icloglock);
3028 return 0; 2985 return XFS_ERROR(EIO);
3029 } 2986 }
3030 2987
3031 if (iclog->ic_state == XLOG_STATE_ACTIVE) { 2988 do {
3032 /* 2989 if (be64_to_cpu(iclog->ic_header.h_lsn) != lsn) {
3033 * We sleep here if we haven't already slept (e.g. 2990 iclog = iclog->ic_next;
3034 * this is the first time we've looked at the correct 2991 continue;
3035 * iclog buf) and the buffer before us is going to 2992 }
3036 * be sync'ed. The reason for this is that if we 2993
3037 * are doing sync transactions here, by waiting for 2994 if (iclog->ic_state == XLOG_STATE_DIRTY) {
3038 * the previous I/O to complete, we can allow a few 2995 spin_unlock(&log->l_icloglock);
3039 * more transactions into this iclog before we close 2996 return 0;
3040 * it down. 2997 }
3041 * 2998
3042 * Otherwise, we mark the buffer WANT_SYNC, and bump 2999 if (iclog->ic_state == XLOG_STATE_ACTIVE) {
3043 * up the refcnt so we can release the log (which drops 3000 /*
3044 * the ref count). The state switch keeps new transaction 3001 * We sleep here if we haven't already slept (e.g.
3045 * commits from using this buffer. When the current commits 3002 * this is the first time we've looked at the correct
3046 * finish writing into the buffer, the refcount will drop to 3003 * iclog buf) and the buffer before us is going to
3047 * zero and the buffer will go out then. 3004 * be sync'ed. The reason for this is that if we
3048 */ 3005 * are doing sync transactions here, by waiting for
3049 if (!already_slept && 3006 * the previous I/O to complete, we can allow a few
3050 (iclog->ic_prev->ic_state & (XLOG_STATE_WANT_SYNC | 3007 * more transactions into this iclog before we close
3051 XLOG_STATE_SYNCING))) { 3008 * it down.
3052 ASSERT(!(iclog->ic_state & XLOG_STATE_IOERROR)); 3009 *
3053 XFS_STATS_INC(xs_log_force_sleep); 3010 * Otherwise, we mark the buffer WANT_SYNC, and bump
3054 sv_wait(&iclog->ic_prev->ic_write_wait, PSWP, 3011 * up the refcnt so we can release the log (which
3055 &log->l_icloglock, s); 3012 * drops the ref count). The state switch keeps new
3056 *log_flushed = 1; 3013 * transaction commits from using this buffer. When
3057 already_slept = 1; 3014 * the current commits finish writing into the buffer,
3058 goto try_again; 3015 * the refcount will drop to zero and the buffer will
3059 } else { 3016 * go out then.
3017 */
3018 if (!already_slept &&
3019 (iclog->ic_prev->ic_state &
3020 (XLOG_STATE_WANT_SYNC | XLOG_STATE_SYNCING))) {
3021 ASSERT(!(iclog->ic_state & XLOG_STATE_IOERROR));
3022
3023 XFS_STATS_INC(xs_log_force_sleep);
3024
3025 sv_wait(&iclog->ic_prev->ic_write_wait,
3026 PSWP, &log->l_icloglock, s);
3027 if (log_flushed)
3028 *log_flushed = 1;
3029 already_slept = 1;
3030 goto try_again;
3031 }
3060 atomic_inc(&iclog->ic_refcnt); 3032 atomic_inc(&iclog->ic_refcnt);
3061 xlog_state_switch_iclogs(log, iclog, 0); 3033 xlog_state_switch_iclogs(log, iclog, 0);
3062 spin_unlock(&log->l_icloglock); 3034 spin_unlock(&log->l_icloglock);
3063 if (xlog_state_release_iclog(log, iclog)) 3035 if (xlog_state_release_iclog(log, iclog))
3064 return XFS_ERROR(EIO); 3036 return XFS_ERROR(EIO);
3065 *log_flushed = 1; 3037 if (log_flushed)
3038 *log_flushed = 1;
3066 spin_lock(&log->l_icloglock); 3039 spin_lock(&log->l_icloglock);
3067 } 3040 }
3068 }
3069 3041
3070 if ((flags & XFS_LOG_SYNC) && /* sleep */ 3042 if ((flags & XFS_LOG_SYNC) && /* sleep */
3071 !(iclog->ic_state & (XLOG_STATE_ACTIVE | XLOG_STATE_DIRTY))) { 3043 !(iclog->ic_state &
3044 (XLOG_STATE_ACTIVE | XLOG_STATE_DIRTY))) {
3045 /*
3046 * Don't wait on completion if we know that we've
3047 * gotten a log write error.
3048 */
3049 if (iclog->ic_state & XLOG_STATE_IOERROR) {
3050 spin_unlock(&log->l_icloglock);
3051 return XFS_ERROR(EIO);
3052 }
3053 XFS_STATS_INC(xs_log_force_sleep);
3054 sv_wait(&iclog->ic_force_wait, PSWP, &log->l_icloglock, s);
3055 /*
3056 * No need to grab the log lock here since we're
3057 * only deciding whether or not to return EIO
3058 * and the memory read should be atomic.
3059 */
3060 if (iclog->ic_state & XLOG_STATE_IOERROR)
3061 return XFS_ERROR(EIO);
3072 3062
3073 /* 3063 if (log_flushed)
3074 * Don't wait on completion if we know that we've 3064 *log_flushed = 1;
3075 * gotten a log write error. 3065 } else { /* just return */
3076 */
3077 if (iclog->ic_state & XLOG_STATE_IOERROR) {
3078 spin_unlock(&log->l_icloglock); 3066 spin_unlock(&log->l_icloglock);
3079 return XFS_ERROR(EIO);
3080 } 3067 }
3081 XFS_STATS_INC(xs_log_force_sleep);
3082 sv_wait(&iclog->ic_force_wait, PSWP, &log->l_icloglock, s);
3083 /*
3084 * No need to grab the log lock here since we're
3085 * only deciding whether or not to return EIO
3086 * and the memory read should be atomic.
3087 */
3088 if (iclog->ic_state & XLOG_STATE_IOERROR)
3089 return XFS_ERROR(EIO);
3090 *log_flushed = 1;
3091 } else { /* just return */
3092 spin_unlock(&log->l_icloglock);
3093 }
3094 return 0;
3095 3068
3096 } while (iclog != log->l_iclog); 3069 return 0;
3070 } while (iclog != log->l_iclog);
3097 3071
3098 spin_unlock(&log->l_icloglock); 3072 spin_unlock(&log->l_icloglock);
3099 return 0; 3073 return 0;
3100} /* xlog_state_sync */ 3074}
3101 3075
3076/*
3077 * Wrapper for _xfs_log_force_lsn(), to be used when caller doesn't care
3078 * about errors or whether the log was flushed or not. This is the normal
3079 * interface to use when trying to unpin items or move the log forward.
3080 */
3081void
3082xfs_log_force_lsn(
3083 xfs_mount_t *mp,
3084 xfs_lsn_t lsn,
3085 uint flags)
3086{
3087 int error;
3088
3089 error = _xfs_log_force_lsn(mp, lsn, flags, NULL);
3090 if (error) {
3091 xfs_fs_cmn_err(CE_WARN, mp, "xfs_log_force: "
3092 "error %d returned.", error);
3093 }
3094}
3102 3095
3103/* 3096/*
3104 * Called when we want to mark the current iclog as being ready to sync to 3097 * Called when we want to mark the current iclog as being ready to sync to
@@ -3463,7 +3456,6 @@ xfs_log_force_umount(
3463 xlog_ticket_t *tic; 3456 xlog_ticket_t *tic;
3464 xlog_t *log; 3457 xlog_t *log;
3465 int retval; 3458 int retval;
3466 int dummy;
3467 3459
3468 log = mp->m_log; 3460 log = mp->m_log;
3469 3461
@@ -3537,13 +3529,14 @@ xfs_log_force_umount(
3537 } 3529 }
3538 spin_unlock(&log->l_grant_lock); 3530 spin_unlock(&log->l_grant_lock);
3539 3531
3540 if (! (log->l_iclog->ic_state & XLOG_STATE_IOERROR)) { 3532 if (!(log->l_iclog->ic_state & XLOG_STATE_IOERROR)) {
3541 ASSERT(!logerror); 3533 ASSERT(!logerror);
3542 /* 3534 /*
3543 * Force the incore logs to disk before shutting the 3535 * Force the incore logs to disk before shutting the
3544 * log down completely. 3536 * log down completely.
3545 */ 3537 */
3546 xlog_state_sync_all(log, XFS_LOG_FORCE|XFS_LOG_SYNC, &dummy); 3538 _xfs_log_force(mp, XFS_LOG_SYNC, NULL);
3539
3547 spin_lock(&log->l_icloglock); 3540 spin_lock(&log->l_icloglock);
3548 retval = xlog_state_ioerror(log); 3541 retval = xlog_state_ioerror(log);
3549 spin_unlock(&log->l_icloglock); 3542 spin_unlock(&log->l_icloglock);
diff --git a/fs/xfs/xfs_log.h b/fs/xfs/xfs_log.h
index d0c9baa50b1a..7074be9d13e9 100644
--- a/fs/xfs/xfs_log.h
+++ b/fs/xfs/xfs_log.h
@@ -70,14 +70,8 @@ static inline xfs_lsn_t _lsn_cmp(xfs_lsn_t lsn1, xfs_lsn_t lsn2)
70 * Flags to xfs_log_force() 70 * Flags to xfs_log_force()
71 * 71 *
72 * XFS_LOG_SYNC: Synchronous force in-core log to disk 72 * XFS_LOG_SYNC: Synchronous force in-core log to disk
73 * XFS_LOG_FORCE: Start in-core log write now.
74 * XFS_LOG_URGE: Start write within some window of time.
75 *
76 * Note: Either XFS_LOG_FORCE or XFS_LOG_URGE must be set.
77 */ 73 */
78#define XFS_LOG_SYNC 0x1 74#define XFS_LOG_SYNC 0x1
79#define XFS_LOG_FORCE 0x2
80#define XFS_LOG_URGE 0x4
81 75
82#endif /* __KERNEL__ */ 76#endif /* __KERNEL__ */
83 77
@@ -110,10 +104,8 @@ static inline xfs_lsn_t _lsn_cmp(xfs_lsn_t lsn1, xfs_lsn_t lsn2)
110#define XLOG_REG_TYPE_TRANSHDR 19 104#define XLOG_REG_TYPE_TRANSHDR 19
111#define XLOG_REG_TYPE_MAX 19 105#define XLOG_REG_TYPE_MAX 19
112 106
113#define XLOG_VEC_SET_TYPE(vecp, t) ((vecp)->i_type = (t))
114
115typedef struct xfs_log_iovec { 107typedef struct xfs_log_iovec {
116 xfs_caddr_t i_addr; /* beginning address of region */ 108 xfs_caddr_t i_addr; /* beginning address of region */
117 int i_len; /* length in bytes of region */ 109 int i_len; /* length in bytes of region */
118 uint i_type; /* type of region */ 110 uint i_type; /* type of region */
119} xfs_log_iovec_t; 111} xfs_log_iovec_t;
@@ -140,12 +132,17 @@ xfs_lsn_t xfs_log_done(struct xfs_mount *mp,
140 void **iclog, 132 void **iclog,
141 uint flags); 133 uint flags);
142int _xfs_log_force(struct xfs_mount *mp, 134int _xfs_log_force(struct xfs_mount *mp,
143 xfs_lsn_t lsn,
144 uint flags, 135 uint flags,
145 int *log_forced); 136 int *log_forced);
146void xfs_log_force(struct xfs_mount *mp, 137void xfs_log_force(struct xfs_mount *mp,
147 xfs_lsn_t lsn,
148 uint flags); 138 uint flags);
139int _xfs_log_force_lsn(struct xfs_mount *mp,
140 xfs_lsn_t lsn,
141 uint flags,
142 int *log_forced);
143void xfs_log_force_lsn(struct xfs_mount *mp,
144 xfs_lsn_t lsn,
145 uint flags);
149int xfs_log_mount(struct xfs_mount *mp, 146int xfs_log_mount(struct xfs_mount *mp,
150 struct xfs_buftarg *log_target, 147 struct xfs_buftarg *log_target,
151 xfs_daddr_t start_block, 148 xfs_daddr_t start_block,
diff --git a/fs/xfs/xfs_log_priv.h b/fs/xfs/xfs_log_priv.h
index d55662db7077..fd02a18facd5 100644
--- a/fs/xfs/xfs_log_priv.h
+++ b/fs/xfs/xfs_log_priv.h
@@ -443,14 +443,9 @@ typedef struct log {
443 443
444/* common routines */ 444/* common routines */
445extern xfs_lsn_t xlog_assign_tail_lsn(struct xfs_mount *mp); 445extern xfs_lsn_t xlog_assign_tail_lsn(struct xfs_mount *mp);
446extern int xlog_find_tail(xlog_t *log,
447 xfs_daddr_t *head_blk,
448 xfs_daddr_t *tail_blk);
449extern int xlog_recover(xlog_t *log); 446extern int xlog_recover(xlog_t *log);
450extern int xlog_recover_finish(xlog_t *log); 447extern int xlog_recover_finish(xlog_t *log);
451extern void xlog_pack_data(xlog_t *log, xlog_in_core_t *iclog, int); 448extern void xlog_pack_data(xlog_t *log, xlog_in_core_t *iclog, int);
452extern struct xfs_buf *xlog_get_bp(xlog_t *, int);
453extern void xlog_put_bp(struct xfs_buf *);
454 449
455extern kmem_zone_t *xfs_log_ticket_zone; 450extern kmem_zone_t *xfs_log_ticket_zone;
456 451
diff --git a/fs/xfs/xfs_log_recover.c b/fs/xfs/xfs_log_recover.c
index 69ac2e5ef20c..22e6efdc17ea 100644
--- a/fs/xfs/xfs_log_recover.c
+++ b/fs/xfs/xfs_log_recover.c
@@ -50,8 +50,6 @@
50 50
51STATIC int xlog_find_zeroed(xlog_t *, xfs_daddr_t *); 51STATIC int xlog_find_zeroed(xlog_t *, xfs_daddr_t *);
52STATIC int xlog_clear_stale_blocks(xlog_t *, xfs_lsn_t); 52STATIC int xlog_clear_stale_blocks(xlog_t *, xfs_lsn_t);
53STATIC void xlog_recover_insert_item_backq(xlog_recover_item_t **q,
54 xlog_recover_item_t *item);
55#if defined(DEBUG) 53#if defined(DEBUG)
56STATIC void xlog_recover_check_summary(xlog_t *); 54STATIC void xlog_recover_check_summary(xlog_t *);
57#else 55#else
@@ -68,7 +66,7 @@ STATIC void xlog_recover_check_summary(xlog_t *);
68 ((bbs + (log)->l_sectbb_mask + 1) & ~(log)->l_sectbb_mask) : (bbs) ) 66 ((bbs + (log)->l_sectbb_mask + 1) & ~(log)->l_sectbb_mask) : (bbs) )
69#define XLOG_SECTOR_ROUNDDOWN_BLKNO(log, bno) ((bno) & ~(log)->l_sectbb_mask) 67#define XLOG_SECTOR_ROUNDDOWN_BLKNO(log, bno) ((bno) & ~(log)->l_sectbb_mask)
70 68
71xfs_buf_t * 69STATIC xfs_buf_t *
72xlog_get_bp( 70xlog_get_bp(
73 xlog_t *log, 71 xlog_t *log,
74 int nbblks) 72 int nbblks)
@@ -88,7 +86,7 @@ xlog_get_bp(
88 return xfs_buf_get_noaddr(BBTOB(nbblks), log->l_mp->m_logdev_targp); 86 return xfs_buf_get_noaddr(BBTOB(nbblks), log->l_mp->m_logdev_targp);
89} 87}
90 88
91void 89STATIC void
92xlog_put_bp( 90xlog_put_bp(
93 xfs_buf_t *bp) 91 xfs_buf_t *bp)
94{ 92{
@@ -805,7 +803,7 @@ xlog_find_head(
805 * We could speed up search by using current head_blk buffer, but it is not 803 * We could speed up search by using current head_blk buffer, but it is not
806 * available. 804 * available.
807 */ 805 */
808int 806STATIC int
809xlog_find_tail( 807xlog_find_tail(
810 xlog_t *log, 808 xlog_t *log,
811 xfs_daddr_t *head_blk, 809 xfs_daddr_t *head_blk,
@@ -1367,36 +1365,45 @@ xlog_clear_stale_blocks(
1367 1365
1368STATIC xlog_recover_t * 1366STATIC xlog_recover_t *
1369xlog_recover_find_tid( 1367xlog_recover_find_tid(
1370 xlog_recover_t *q, 1368 struct hlist_head *head,
1371 xlog_tid_t tid) 1369 xlog_tid_t tid)
1372{ 1370{
1373 xlog_recover_t *p = q; 1371 xlog_recover_t *trans;
1372 struct hlist_node *n;
1374 1373
1375 while (p != NULL) { 1374 hlist_for_each_entry(trans, n, head, r_list) {
1376 if (p->r_log_tid == tid) 1375 if (trans->r_log_tid == tid)
1377 break; 1376 return trans;
1378 p = p->r_next;
1379 } 1377 }
1380 return p; 1378 return NULL;
1381} 1379}
1382 1380
1383STATIC void 1381STATIC void
1384xlog_recover_put_hashq( 1382xlog_recover_new_tid(
1385 xlog_recover_t **q, 1383 struct hlist_head *head,
1386 xlog_recover_t *trans) 1384 xlog_tid_t tid,
1385 xfs_lsn_t lsn)
1387{ 1386{
1388 trans->r_next = *q; 1387 xlog_recover_t *trans;
1389 *q = trans; 1388
1389 trans = kmem_zalloc(sizeof(xlog_recover_t), KM_SLEEP);
1390 trans->r_log_tid = tid;
1391 trans->r_lsn = lsn;
1392 INIT_LIST_HEAD(&trans->r_itemq);
1393
1394 INIT_HLIST_NODE(&trans->r_list);
1395 hlist_add_head(&trans->r_list, head);
1390} 1396}
1391 1397
1392STATIC void 1398STATIC void
1393xlog_recover_add_item( 1399xlog_recover_add_item(
1394 xlog_recover_item_t **itemq) 1400 struct list_head *head)
1395{ 1401{
1396 xlog_recover_item_t *item; 1402 xlog_recover_item_t *item;
1397 1403
1398 item = kmem_zalloc(sizeof(xlog_recover_item_t), KM_SLEEP); 1404 item = kmem_zalloc(sizeof(xlog_recover_item_t), KM_SLEEP);
1399 xlog_recover_insert_item_backq(itemq, item); 1405 INIT_LIST_HEAD(&item->ri_list);
1406 list_add_tail(&item->ri_list, head);
1400} 1407}
1401 1408
1402STATIC int 1409STATIC int
@@ -1409,8 +1416,7 @@ xlog_recover_add_to_cont_trans(
1409 xfs_caddr_t ptr, old_ptr; 1416 xfs_caddr_t ptr, old_ptr;
1410 int old_len; 1417 int old_len;
1411 1418
1412 item = trans->r_itemq; 1419 if (list_empty(&trans->r_itemq)) {
1413 if (item == NULL) {
1414 /* finish copying rest of trans header */ 1420 /* finish copying rest of trans header */
1415 xlog_recover_add_item(&trans->r_itemq); 1421 xlog_recover_add_item(&trans->r_itemq);
1416 ptr = (xfs_caddr_t) &trans->r_theader + 1422 ptr = (xfs_caddr_t) &trans->r_theader +
@@ -1418,7 +1424,8 @@ xlog_recover_add_to_cont_trans(
1418 memcpy(ptr, dp, len); /* d, s, l */ 1424 memcpy(ptr, dp, len); /* d, s, l */
1419 return 0; 1425 return 0;
1420 } 1426 }
1421 item = item->ri_prev; 1427 /* take the tail entry */
1428 item = list_entry(trans->r_itemq.prev, xlog_recover_item_t, ri_list);
1422 1429
1423 old_ptr = item->ri_buf[item->ri_cnt-1].i_addr; 1430 old_ptr = item->ri_buf[item->ri_cnt-1].i_addr;
1424 old_len = item->ri_buf[item->ri_cnt-1].i_len; 1431 old_len = item->ri_buf[item->ri_cnt-1].i_len;
@@ -1455,8 +1462,7 @@ xlog_recover_add_to_trans(
1455 1462
1456 if (!len) 1463 if (!len)
1457 return 0; 1464 return 0;
1458 item = trans->r_itemq; 1465 if (list_empty(&trans->r_itemq)) {
1459 if (item == NULL) {
1460 /* we need to catch log corruptions here */ 1466 /* we need to catch log corruptions here */
1461 if (*(uint *)dp != XFS_TRANS_HEADER_MAGIC) { 1467 if (*(uint *)dp != XFS_TRANS_HEADER_MAGIC) {
1462 xlog_warn("XFS: xlog_recover_add_to_trans: " 1468 xlog_warn("XFS: xlog_recover_add_to_trans: "
@@ -1474,12 +1480,15 @@ xlog_recover_add_to_trans(
1474 memcpy(ptr, dp, len); 1480 memcpy(ptr, dp, len);
1475 in_f = (xfs_inode_log_format_t *)ptr; 1481 in_f = (xfs_inode_log_format_t *)ptr;
1476 1482
1477 if (item->ri_prev->ri_total != 0 && 1483 /* take the tail entry */
1478 item->ri_prev->ri_total == item->ri_prev->ri_cnt) { 1484 item = list_entry(trans->r_itemq.prev, xlog_recover_item_t, ri_list);
1485 if (item->ri_total != 0 &&
1486 item->ri_total == item->ri_cnt) {
1487 /* tail item is in use, get a new one */
1479 xlog_recover_add_item(&trans->r_itemq); 1488 xlog_recover_add_item(&trans->r_itemq);
1489 item = list_entry(trans->r_itemq.prev,
1490 xlog_recover_item_t, ri_list);
1480 } 1491 }
1481 item = trans->r_itemq;
1482 item = item->ri_prev;
1483 1492
1484 if (item->ri_total == 0) { /* first region to be added */ 1493 if (item->ri_total == 0) { /* first region to be added */
1485 if (in_f->ilf_size == 0 || 1494 if (in_f->ilf_size == 0 ||
@@ -1504,96 +1513,29 @@ xlog_recover_add_to_trans(
1504 return 0; 1513 return 0;
1505} 1514}
1506 1515
1507STATIC void 1516/*
1508xlog_recover_new_tid( 1517 * Sort the log items in the transaction. Cancelled buffers need
1509 xlog_recover_t **q, 1518 * to be put first so they are processed before any items that might
1510 xlog_tid_t tid, 1519 * modify the buffers. If they are cancelled, then the modifications
1511 xfs_lsn_t lsn) 1520 * don't need to be replayed.
1512{ 1521 */
1513 xlog_recover_t *trans;
1514
1515 trans = kmem_zalloc(sizeof(xlog_recover_t), KM_SLEEP);
1516 trans->r_log_tid = tid;
1517 trans->r_lsn = lsn;
1518 xlog_recover_put_hashq(q, trans);
1519}
1520
1521STATIC int
1522xlog_recover_unlink_tid(
1523 xlog_recover_t **q,
1524 xlog_recover_t *trans)
1525{
1526 xlog_recover_t *tp;
1527 int found = 0;
1528
1529 ASSERT(trans != NULL);
1530 if (trans == *q) {
1531 *q = (*q)->r_next;
1532 } else {
1533 tp = *q;
1534 while (tp) {
1535 if (tp->r_next == trans) {
1536 found = 1;
1537 break;
1538 }
1539 tp = tp->r_next;
1540 }
1541 if (!found) {
1542 xlog_warn(
1543 "XFS: xlog_recover_unlink_tid: trans not found");
1544 ASSERT(0);
1545 return XFS_ERROR(EIO);
1546 }
1547 tp->r_next = tp->r_next->r_next;
1548 }
1549 return 0;
1550}
1551
1552STATIC void
1553xlog_recover_insert_item_backq(
1554 xlog_recover_item_t **q,
1555 xlog_recover_item_t *item)
1556{
1557 if (*q == NULL) {
1558 item->ri_prev = item->ri_next = item;
1559 *q = item;
1560 } else {
1561 item->ri_next = *q;
1562 item->ri_prev = (*q)->ri_prev;
1563 (*q)->ri_prev = item;
1564 item->ri_prev->ri_next = item;
1565 }
1566}
1567
1568STATIC void
1569xlog_recover_insert_item_frontq(
1570 xlog_recover_item_t **q,
1571 xlog_recover_item_t *item)
1572{
1573 xlog_recover_insert_item_backq(q, item);
1574 *q = item;
1575}
1576
1577STATIC int 1522STATIC int
1578xlog_recover_reorder_trans( 1523xlog_recover_reorder_trans(
1579 xlog_recover_t *trans) 1524 xlog_recover_t *trans)
1580{ 1525{
1581 xlog_recover_item_t *first_item, *itemq, *itemq_next; 1526 xlog_recover_item_t *item, *n;
1582 xfs_buf_log_format_t *buf_f; 1527 LIST_HEAD(sort_list);
1583 ushort flags = 0;
1584 1528
1585 first_item = itemq = trans->r_itemq; 1529 list_splice_init(&trans->r_itemq, &sort_list);
1586 trans->r_itemq = NULL; 1530 list_for_each_entry_safe(item, n, &sort_list, ri_list) {
1587 do { 1531 xfs_buf_log_format_t *buf_f;
1588 itemq_next = itemq->ri_next;
1589 buf_f = (xfs_buf_log_format_t *)itemq->ri_buf[0].i_addr;
1590 1532
1591 switch (ITEM_TYPE(itemq)) { 1533 buf_f = (xfs_buf_log_format_t *)item->ri_buf[0].i_addr;
1534
1535 switch (ITEM_TYPE(item)) {
1592 case XFS_LI_BUF: 1536 case XFS_LI_BUF:
1593 flags = buf_f->blf_flags; 1537 if (!(buf_f->blf_flags & XFS_BLI_CANCEL)) {
1594 if (!(flags & XFS_BLI_CANCEL)) { 1538 list_move(&item->ri_list, &trans->r_itemq);
1595 xlog_recover_insert_item_frontq(&trans->r_itemq,
1596 itemq);
1597 break; 1539 break;
1598 } 1540 }
1599 case XFS_LI_INODE: 1541 case XFS_LI_INODE:
@@ -1601,7 +1543,7 @@ xlog_recover_reorder_trans(
1601 case XFS_LI_QUOTAOFF: 1543 case XFS_LI_QUOTAOFF:
1602 case XFS_LI_EFD: 1544 case XFS_LI_EFD:
1603 case XFS_LI_EFI: 1545 case XFS_LI_EFI:
1604 xlog_recover_insert_item_backq(&trans->r_itemq, itemq); 1546 list_move_tail(&item->ri_list, &trans->r_itemq);
1605 break; 1547 break;
1606 default: 1548 default:
1607 xlog_warn( 1549 xlog_warn(
@@ -1609,8 +1551,8 @@ xlog_recover_reorder_trans(
1609 ASSERT(0); 1551 ASSERT(0);
1610 return XFS_ERROR(EIO); 1552 return XFS_ERROR(EIO);
1611 } 1553 }
1612 itemq = itemq_next; 1554 }
1613 } while (first_item != itemq); 1555 ASSERT(list_empty(&sort_list));
1614 return 0; 1556 return 0;
1615} 1557}
1616 1558
@@ -2242,9 +2184,9 @@ xlog_recover_do_buffer_trans(
2242 } 2184 }
2243 2185
2244 mp = log->l_mp; 2186 mp = log->l_mp;
2245 buf_flags = XFS_BUF_LOCK; 2187 buf_flags = XBF_LOCK;
2246 if (!(flags & XFS_BLI_INODE_BUF)) 2188 if (!(flags & XFS_BLI_INODE_BUF))
2247 buf_flags |= XFS_BUF_MAPPED; 2189 buf_flags |= XBF_MAPPED;
2248 2190
2249 bp = xfs_buf_read(mp->m_ddev_targp, blkno, len, buf_flags); 2191 bp = xfs_buf_read(mp->m_ddev_targp, blkno, len, buf_flags);
2250 if (XFS_BUF_ISERROR(bp)) { 2192 if (XFS_BUF_ISERROR(bp)) {
@@ -2346,7 +2288,7 @@ xlog_recover_do_inode_trans(
2346 } 2288 }
2347 2289
2348 bp = xfs_buf_read(mp->m_ddev_targp, in_f->ilf_blkno, in_f->ilf_len, 2290 bp = xfs_buf_read(mp->m_ddev_targp, in_f->ilf_blkno, in_f->ilf_len,
2349 XFS_BUF_LOCK); 2291 XBF_LOCK);
2350 if (XFS_BUF_ISERROR(bp)) { 2292 if (XFS_BUF_ISERROR(bp)) {
2351 xfs_ioerror_alert("xlog_recover_do..(read#2)", mp, 2293 xfs_ioerror_alert("xlog_recover_do..(read#2)", mp,
2352 bp, in_f->ilf_blkno); 2294 bp, in_f->ilf_blkno);
@@ -2814,14 +2756,13 @@ xlog_recover_do_trans(
2814 int pass) 2756 int pass)
2815{ 2757{
2816 int error = 0; 2758 int error = 0;
2817 xlog_recover_item_t *item, *first_item; 2759 xlog_recover_item_t *item;
2818 2760
2819 error = xlog_recover_reorder_trans(trans); 2761 error = xlog_recover_reorder_trans(trans);
2820 if (error) 2762 if (error)
2821 return error; 2763 return error;
2822 2764
2823 first_item = item = trans->r_itemq; 2765 list_for_each_entry(item, &trans->r_itemq, ri_list) {
2824 do {
2825 switch (ITEM_TYPE(item)) { 2766 switch (ITEM_TYPE(item)) {
2826 case XFS_LI_BUF: 2767 case XFS_LI_BUF:
2827 error = xlog_recover_do_buffer_trans(log, item, pass); 2768 error = xlog_recover_do_buffer_trans(log, item, pass);
@@ -2854,8 +2795,7 @@ xlog_recover_do_trans(
2854 2795
2855 if (error) 2796 if (error)
2856 return error; 2797 return error;
2857 item = item->ri_next; 2798 }
2858 } while (first_item != item);
2859 2799
2860 return 0; 2800 return 0;
2861} 2801}
@@ -2869,21 +2809,18 @@ STATIC void
2869xlog_recover_free_trans( 2809xlog_recover_free_trans(
2870 xlog_recover_t *trans) 2810 xlog_recover_t *trans)
2871{ 2811{
2872 xlog_recover_item_t *first_item, *item, *free_item; 2812 xlog_recover_item_t *item, *n;
2873 int i; 2813 int i;
2874 2814
2875 item = first_item = trans->r_itemq; 2815 list_for_each_entry_safe(item, n, &trans->r_itemq, ri_list) {
2876 do { 2816 /* Free the regions in the item. */
2877 free_item = item; 2817 list_del(&item->ri_list);
2878 item = item->ri_next; 2818 for (i = 0; i < item->ri_cnt; i++)
2879 /* Free the regions in the item. */ 2819 kmem_free(item->ri_buf[i].i_addr);
2880 for (i = 0; i < free_item->ri_cnt; i++) {
2881 kmem_free(free_item->ri_buf[i].i_addr);
2882 }
2883 /* Free the item itself */ 2820 /* Free the item itself */
2884 kmem_free(free_item->ri_buf); 2821 kmem_free(item->ri_buf);
2885 kmem_free(free_item); 2822 kmem_free(item);
2886 } while (first_item != item); 2823 }
2887 /* Free the transaction recover structure */ 2824 /* Free the transaction recover structure */
2888 kmem_free(trans); 2825 kmem_free(trans);
2889} 2826}
@@ -2891,14 +2828,12 @@ xlog_recover_free_trans(
2891STATIC int 2828STATIC int
2892xlog_recover_commit_trans( 2829xlog_recover_commit_trans(
2893 xlog_t *log, 2830 xlog_t *log,
2894 xlog_recover_t **q,
2895 xlog_recover_t *trans, 2831 xlog_recover_t *trans,
2896 int pass) 2832 int pass)
2897{ 2833{
2898 int error; 2834 int error;
2899 2835
2900 if ((error = xlog_recover_unlink_tid(q, trans))) 2836 hlist_del(&trans->r_list);
2901 return error;
2902 if ((error = xlog_recover_do_trans(log, trans, pass))) 2837 if ((error = xlog_recover_do_trans(log, trans, pass)))
2903 return error; 2838 return error;
2904 xlog_recover_free_trans(trans); /* no error */ 2839 xlog_recover_free_trans(trans); /* no error */
@@ -2926,7 +2861,7 @@ xlog_recover_unmount_trans(
2926STATIC int 2861STATIC int
2927xlog_recover_process_data( 2862xlog_recover_process_data(
2928 xlog_t *log, 2863 xlog_t *log,
2929 xlog_recover_t *rhash[], 2864 struct hlist_head rhash[],
2930 xlog_rec_header_t *rhead, 2865 xlog_rec_header_t *rhead,
2931 xfs_caddr_t dp, 2866 xfs_caddr_t dp,
2932 int pass) 2867 int pass)
@@ -2960,7 +2895,7 @@ xlog_recover_process_data(
2960 } 2895 }
2961 tid = be32_to_cpu(ohead->oh_tid); 2896 tid = be32_to_cpu(ohead->oh_tid);
2962 hash = XLOG_RHASH(tid); 2897 hash = XLOG_RHASH(tid);
2963 trans = xlog_recover_find_tid(rhash[hash], tid); 2898 trans = xlog_recover_find_tid(&rhash[hash], tid);
2964 if (trans == NULL) { /* not found; add new tid */ 2899 if (trans == NULL) { /* not found; add new tid */
2965 if (ohead->oh_flags & XLOG_START_TRANS) 2900 if (ohead->oh_flags & XLOG_START_TRANS)
2966 xlog_recover_new_tid(&rhash[hash], tid, 2901 xlog_recover_new_tid(&rhash[hash], tid,
@@ -2978,7 +2913,7 @@ xlog_recover_process_data(
2978 switch (flags) { 2913 switch (flags) {
2979 case XLOG_COMMIT_TRANS: 2914 case XLOG_COMMIT_TRANS:
2980 error = xlog_recover_commit_trans(log, 2915 error = xlog_recover_commit_trans(log,
2981 &rhash[hash], trans, pass); 2916 trans, pass);
2982 break; 2917 break;
2983 case XLOG_UNMOUNT_TRANS: 2918 case XLOG_UNMOUNT_TRANS:
2984 error = xlog_recover_unmount_trans(trans); 2919 error = xlog_recover_unmount_trans(trans);
@@ -3211,7 +3146,7 @@ xlog_recover_process_one_iunlink(
3211 /* 3146 /*
3212 * Get the on disk inode to find the next inode in the bucket. 3147 * Get the on disk inode to find the next inode in the bucket.
3213 */ 3148 */
3214 error = xfs_itobp(mp, NULL, ip, &dip, &ibp, XFS_BUF_LOCK); 3149 error = xfs_itobp(mp, NULL, ip, &dip, &ibp, XBF_LOCK);
3215 if (error) 3150 if (error)
3216 goto fail_iput; 3151 goto fail_iput;
3217 3152
@@ -3517,7 +3452,7 @@ xlog_do_recovery_pass(
3517 int error = 0, h_size; 3452 int error = 0, h_size;
3518 int bblks, split_bblks; 3453 int bblks, split_bblks;
3519 int hblks, split_hblks, wrapped_hblks; 3454 int hblks, split_hblks, wrapped_hblks;
3520 xlog_recover_t *rhash[XLOG_RHASH_SIZE]; 3455 struct hlist_head rhash[XLOG_RHASH_SIZE];
3521 3456
3522 ASSERT(head_blk != tail_blk); 3457 ASSERT(head_blk != tail_blk);
3523 3458
@@ -3978,8 +3913,7 @@ xlog_recover_finish(
3978 * case the unlink transactions would have problems 3913 * case the unlink transactions would have problems
3979 * pushing the EFIs out of the way. 3914 * pushing the EFIs out of the way.
3980 */ 3915 */
3981 xfs_log_force(log->l_mp, (xfs_lsn_t)0, 3916 xfs_log_force(log->l_mp, XFS_LOG_SYNC);
3982 (XFS_LOG_FORCE | XFS_LOG_SYNC));
3983 3917
3984 xlog_recover_process_iunlinks(log); 3918 xlog_recover_process_iunlinks(log);
3985 3919
diff --git a/fs/xfs/xfs_log_recover.h b/fs/xfs/xfs_log_recover.h
index b22545555301..75d749207258 100644
--- a/fs/xfs/xfs_log_recover.h
+++ b/fs/xfs/xfs_log_recover.h
@@ -35,22 +35,21 @@
35 * item headers are in ri_buf[0]. Additional buffers follow. 35 * item headers are in ri_buf[0]. Additional buffers follow.
36 */ 36 */
37typedef struct xlog_recover_item { 37typedef struct xlog_recover_item {
38 struct xlog_recover_item *ri_next; 38 struct list_head ri_list;
39 struct xlog_recover_item *ri_prev; 39 int ri_type;
40 int ri_type; 40 int ri_cnt; /* count of regions found */
41 int ri_cnt; /* count of regions found */ 41 int ri_total; /* total regions */
42 int ri_total; /* total regions */ 42 xfs_log_iovec_t *ri_buf; /* ptr to regions buffer */
43 xfs_log_iovec_t *ri_buf; /* ptr to regions buffer */
44} xlog_recover_item_t; 43} xlog_recover_item_t;
45 44
46struct xlog_tid; 45struct xlog_tid;
47typedef struct xlog_recover { 46typedef struct xlog_recover {
48 struct xlog_recover *r_next; 47 struct hlist_node r_list;
49 xlog_tid_t r_log_tid; /* log's transaction id */ 48 xlog_tid_t r_log_tid; /* log's transaction id */
50 xfs_trans_header_t r_theader; /* trans header for partial */ 49 xfs_trans_header_t r_theader; /* trans header for partial */
51 int r_state; /* not needed */ 50 int r_state; /* not needed */
52 xfs_lsn_t r_lsn; /* xact lsn */ 51 xfs_lsn_t r_lsn; /* xact lsn */
53 xlog_recover_item_t *r_itemq; /* q for items */ 52 struct list_head r_itemq; /* q for items */
54} xlog_recover_t; 53} xlog_recover_t;
55 54
56#define ITEM_TYPE(i) (*(ushort *)(i)->ri_buf[0].i_addr) 55#define ITEM_TYPE(i) (*(ushort *)(i)->ri_buf[0].i_addr)
diff --git a/fs/xfs/xfs_mount.c b/fs/xfs/xfs_mount.c
index eb403b40e120..6afaaeb2950a 100644
--- a/fs/xfs/xfs_mount.c
+++ b/fs/xfs/xfs_mount.c
@@ -201,6 +201,38 @@ xfs_uuid_unmount(
201 201
202 202
203/* 203/*
204 * Reference counting access wrappers to the perag structures.
205 */
206struct xfs_perag *
207xfs_perag_get(struct xfs_mount *mp, xfs_agnumber_t agno)
208{
209 struct xfs_perag *pag;
210 int ref = 0;
211
212 spin_lock(&mp->m_perag_lock);
213 pag = radix_tree_lookup(&mp->m_perag_tree, agno);
214 if (pag) {
215 ASSERT(atomic_read(&pag->pag_ref) >= 0);
216 /* catch leaks in the positive direction during testing */
217 ASSERT(atomic_read(&pag->pag_ref) < 1000);
218 ref = atomic_inc_return(&pag->pag_ref);
219 }
220 spin_unlock(&mp->m_perag_lock);
221 trace_xfs_perag_get(mp, agno, ref, _RET_IP_);
222 return pag;
223}
224
225void
226xfs_perag_put(struct xfs_perag *pag)
227{
228 int ref;
229
230 ASSERT(atomic_read(&pag->pag_ref) > 0);
231 ref = atomic_dec_return(&pag->pag_ref);
232 trace_xfs_perag_put(pag->pag_mount, pag->pag_agno, ref, _RET_IP_);
233}
234
235/*
204 * Free up the resources associated with a mount structure. Assume that 236 * Free up the resources associated with a mount structure. Assume that
205 * the structure was initially zeroed, so we can tell which fields got 237 * the structure was initially zeroed, so we can tell which fields got
206 * initialized. 238 * initialized.
@@ -209,13 +241,16 @@ STATIC void
209xfs_free_perag( 241xfs_free_perag(
210 xfs_mount_t *mp) 242 xfs_mount_t *mp)
211{ 243{
212 if (mp->m_perag) { 244 xfs_agnumber_t agno;
213 int agno; 245 struct xfs_perag *pag;
214 246
215 for (agno = 0; agno < mp->m_maxagi; agno++) 247 for (agno = 0; agno < mp->m_sb.sb_agcount; agno++) {
216 if (mp->m_perag[agno].pagb_list) 248 spin_lock(&mp->m_perag_lock);
217 kmem_free(mp->m_perag[agno].pagb_list); 249 pag = radix_tree_delete(&mp->m_perag_tree, agno);
218 kmem_free(mp->m_perag); 250 ASSERT(pag);
251 ASSERT(atomic_read(&pag->pag_ref) == 0);
252 spin_unlock(&mp->m_perag_lock);
253 kmem_free(pag);
219 } 254 }
220} 255}
221 256
@@ -389,22 +424,57 @@ xfs_initialize_perag_icache(
389 } 424 }
390} 425}
391 426
392xfs_agnumber_t 427int
393xfs_initialize_perag( 428xfs_initialize_perag(
394 xfs_mount_t *mp, 429 xfs_mount_t *mp,
395 xfs_agnumber_t agcount) 430 xfs_agnumber_t agcount,
431 xfs_agnumber_t *maxagi)
396{ 432{
397 xfs_agnumber_t index, max_metadata; 433 xfs_agnumber_t index, max_metadata;
434 xfs_agnumber_t first_initialised = 0;
398 xfs_perag_t *pag; 435 xfs_perag_t *pag;
399 xfs_agino_t agino; 436 xfs_agino_t agino;
400 xfs_ino_t ino; 437 xfs_ino_t ino;
401 xfs_sb_t *sbp = &mp->m_sb; 438 xfs_sb_t *sbp = &mp->m_sb;
402 xfs_ino_t max_inum = XFS_MAXINUMBER_32; 439 xfs_ino_t max_inum = XFS_MAXINUMBER_32;
440 int error = -ENOMEM;
403 441
404 /* Check to see if the filesystem can overflow 32 bit inodes */ 442 /* Check to see if the filesystem can overflow 32 bit inodes */
405 agino = XFS_OFFBNO_TO_AGINO(mp, sbp->sb_agblocks - 1, 0); 443 agino = XFS_OFFBNO_TO_AGINO(mp, sbp->sb_agblocks - 1, 0);
406 ino = XFS_AGINO_TO_INO(mp, agcount - 1, agino); 444 ino = XFS_AGINO_TO_INO(mp, agcount - 1, agino);
407 445
446 /*
447 * Walk the current per-ag tree so we don't try to initialise AGs
448 * that already exist (growfs case). Allocate and insert all the
449 * AGs we don't find ready for initialisation.
450 */
451 for (index = 0; index < agcount; index++) {
452 pag = xfs_perag_get(mp, index);
453 if (pag) {
454 xfs_perag_put(pag);
455 continue;
456 }
457 if (!first_initialised)
458 first_initialised = index;
459 pag = kmem_zalloc(sizeof(*pag), KM_MAYFAIL);
460 if (!pag)
461 goto out_unwind;
462 if (radix_tree_preload(GFP_NOFS))
463 goto out_unwind;
464 spin_lock(&mp->m_perag_lock);
465 if (radix_tree_insert(&mp->m_perag_tree, index, pag)) {
466 BUG();
467 spin_unlock(&mp->m_perag_lock);
468 radix_tree_preload_end();
469 error = -EEXIST;
470 goto out_unwind;
471 }
472 pag->pag_agno = index;
473 pag->pag_mount = mp;
474 spin_unlock(&mp->m_perag_lock);
475 radix_tree_preload_end();
476 }
477
408 /* Clear the mount flag if no inode can overflow 32 bits 478 /* Clear the mount flag if no inode can overflow 32 bits
409 * on this filesystem, or if specifically requested.. 479 * on this filesystem, or if specifically requested..
410 */ 480 */
@@ -438,21 +508,33 @@ xfs_initialize_perag(
438 } 508 }
439 509
440 /* This ag is preferred for inodes */ 510 /* This ag is preferred for inodes */
441 pag = &mp->m_perag[index]; 511 pag = xfs_perag_get(mp, index);
442 pag->pagi_inodeok = 1; 512 pag->pagi_inodeok = 1;
443 if (index < max_metadata) 513 if (index < max_metadata)
444 pag->pagf_metadata = 1; 514 pag->pagf_metadata = 1;
445 xfs_initialize_perag_icache(pag); 515 xfs_initialize_perag_icache(pag);
516 xfs_perag_put(pag);
446 } 517 }
447 } else { 518 } else {
448 /* Setup default behavior for smaller filesystems */ 519 /* Setup default behavior for smaller filesystems */
449 for (index = 0; index < agcount; index++) { 520 for (index = 0; index < agcount; index++) {
450 pag = &mp->m_perag[index]; 521 pag = xfs_perag_get(mp, index);
451 pag->pagi_inodeok = 1; 522 pag->pagi_inodeok = 1;
452 xfs_initialize_perag_icache(pag); 523 xfs_initialize_perag_icache(pag);
524 xfs_perag_put(pag);
453 } 525 }
454 } 526 }
455 return index; 527 if (maxagi)
528 *maxagi = index;
529 return 0;
530
531out_unwind:
532 kmem_free(pag);
533 for (; index > first_initialised; index--) {
534 pag = radix_tree_delete(&mp->m_perag_tree, index);
535 kmem_free(pag);
536 }
537 return error;
456} 538}
457 539
458void 540void
@@ -583,7 +665,7 @@ xfs_readsb(xfs_mount_t *mp, int flags)
583 * access to the superblock. 665 * access to the superblock.
584 */ 666 */
585 sector_size = xfs_getsize_buftarg(mp->m_ddev_targp); 667 sector_size = xfs_getsize_buftarg(mp->m_ddev_targp);
586 extra_flags = XFS_BUF_LOCK | XFS_BUF_MANAGE | XFS_BUF_MAPPED; 668 extra_flags = XBF_LOCK | XBF_FS_MANAGED | XBF_MAPPED;
587 669
588 bp = xfs_buf_read(mp->m_ddev_targp, XFS_SB_DADDR, BTOBB(sector_size), 670 bp = xfs_buf_read(mp->m_ddev_targp, XFS_SB_DADDR, BTOBB(sector_size),
589 extra_flags); 671 extra_flags);
@@ -731,12 +813,13 @@ xfs_initialize_perag_data(xfs_mount_t *mp, xfs_agnumber_t agcount)
731 error = xfs_ialloc_pagi_init(mp, NULL, index); 813 error = xfs_ialloc_pagi_init(mp, NULL, index);
732 if (error) 814 if (error)
733 return error; 815 return error;
734 pag = &mp->m_perag[index]; 816 pag = xfs_perag_get(mp, index);
735 ifree += pag->pagi_freecount; 817 ifree += pag->pagi_freecount;
736 ialloc += pag->pagi_count; 818 ialloc += pag->pagi_count;
737 bfree += pag->pagf_freeblks; 819 bfree += pag->pagf_freeblks;
738 bfreelst += pag->pagf_flcount; 820 bfreelst += pag->pagf_flcount;
739 btree += pag->pagf_btreeblks; 821 btree += pag->pagf_btreeblks;
822 xfs_perag_put(pag);
740 } 823 }
741 /* 824 /*
742 * Overwrite incore superblock counters with just-read data 825 * Overwrite incore superblock counters with just-read data
@@ -1008,6 +1091,22 @@ xfs_mount_reset_sbqflags(
1008 return xfs_trans_commit(tp, 0); 1091 return xfs_trans_commit(tp, 0);
1009} 1092}
1010 1093
1094__uint64_t
1095xfs_default_resblks(xfs_mount_t *mp)
1096{
1097 __uint64_t resblks;
1098
1099 /*
1100 * We default to 5% or 1024 fsbs of space reserved, whichever is smaller.
1101 * This may drive us straight to ENOSPC on mount, but that implies
1102 * we were already there on the last unmount. Warn if this occurs.
1103 */
1104 resblks = mp->m_sb.sb_dblocks;
1105 do_div(resblks, 20);
1106 resblks = min_t(__uint64_t, resblks, 1024);
1107 return resblks;
1108}
1109
1011/* 1110/*
1012 * This function does the following on an initial mount of a file system: 1111 * This function does the following on an initial mount of a file system:
1013 * - reads the superblock from disk and init the mount struct 1112 * - reads the superblock from disk and init the mount struct
@@ -1152,13 +1251,13 @@ xfs_mountfs(
1152 /* 1251 /*
1153 * Allocate and initialize the per-ag data. 1252 * Allocate and initialize the per-ag data.
1154 */ 1253 */
1155 init_rwsem(&mp->m_peraglock); 1254 spin_lock_init(&mp->m_perag_lock);
1156 mp->m_perag = kmem_zalloc(sbp->sb_agcount * sizeof(xfs_perag_t), 1255 INIT_RADIX_TREE(&mp->m_perag_tree, GFP_NOFS);
1157 KM_MAYFAIL); 1256 error = xfs_initialize_perag(mp, sbp->sb_agcount, &mp->m_maxagi);
1158 if (!mp->m_perag) 1257 if (error) {
1258 cmn_err(CE_WARN, "XFS: Failed per-ag init: %d", error);
1159 goto out_remove_uuid; 1259 goto out_remove_uuid;
1160 1260 }
1161 mp->m_maxagi = xfs_initialize_perag(mp, sbp->sb_agcount);
1162 1261
1163 if (!sbp->sb_logblocks) { 1262 if (!sbp->sb_logblocks) {
1164 cmn_err(CE_WARN, "XFS: no log defined"); 1263 cmn_err(CE_WARN, "XFS: no log defined");
@@ -1318,18 +1417,14 @@ xfs_mountfs(
1318 * when at ENOSPC. This is needed for operations like create with 1417 * when at ENOSPC. This is needed for operations like create with
1319 * attr, unwritten extent conversion at ENOSPC, etc. Data allocations 1418 * attr, unwritten extent conversion at ENOSPC, etc. Data allocations
1320 * are not allowed to use this reserved space. 1419 * are not allowed to use this reserved space.
1321 *
1322 * We default to 5% or 1024 fsbs of space reserved, whichever is smaller.
1323 * This may drive us straight to ENOSPC on mount, but that implies
1324 * we were already there on the last unmount. Warn if this occurs.
1325 */ 1420 */
1326 resblks = mp->m_sb.sb_dblocks; 1421 if (!(mp->m_flags & XFS_MOUNT_RDONLY)) {
1327 do_div(resblks, 20); 1422 resblks = xfs_default_resblks(mp);
1328 resblks = min_t(__uint64_t, resblks, 1024); 1423 error = xfs_reserve_blocks(mp, &resblks, NULL);
1329 error = xfs_reserve_blocks(mp, &resblks, NULL); 1424 if (error)
1330 if (error) 1425 cmn_err(CE_WARN, "XFS: Unable to allocate reserve "
1331 cmn_err(CE_WARN, "XFS: Unable to allocate reserve blocks. " 1426 "blocks. Continuing without a reserve pool.");
1332 "Continuing without a reserve pool."); 1427 }
1333 1428
1334 return 0; 1429 return 0;
1335 1430
@@ -1372,8 +1467,19 @@ xfs_unmountfs(
1372 * push out the iclog we will never get that unlocked. hence we 1467 * push out the iclog we will never get that unlocked. hence we
1373 * need to force the log first. 1468 * need to force the log first.
1374 */ 1469 */
1375 xfs_log_force(mp, (xfs_lsn_t)0, XFS_LOG_FORCE | XFS_LOG_SYNC); 1470 xfs_log_force(mp, XFS_LOG_SYNC);
1376 xfs_reclaim_inodes(mp, XFS_IFLUSH_ASYNC); 1471
1472 /*
1473 * Do a delwri reclaim pass first so that as many dirty inodes are
1474 * queued up for IO as possible. Then flush the buffers before making
1475 * a synchronous path to catch all the remaining inodes are reclaimed.
1476 * This makes the reclaim process as quick as possible by avoiding
1477 * synchronous writeout and blocking on inodes already in the delwri
1478 * state as much as possible.
1479 */
1480 xfs_reclaim_inodes(mp, 0);
1481 XFS_bflush(mp->m_ddev_targp);
1482 xfs_reclaim_inodes(mp, SYNC_WAIT);
1377 1483
1378 xfs_qm_unmount(mp); 1484 xfs_qm_unmount(mp);
1379 1485
@@ -1382,7 +1488,7 @@ xfs_unmountfs(
1382 * that nothing is pinned. This is important because bflush() 1488 * that nothing is pinned. This is important because bflush()
1383 * will skip pinned buffers. 1489 * will skip pinned buffers.
1384 */ 1490 */
1385 xfs_log_force(mp, (xfs_lsn_t)0, XFS_LOG_FORCE | XFS_LOG_SYNC); 1491 xfs_log_force(mp, XFS_LOG_SYNC);
1386 1492
1387 xfs_binval(mp->m_ddev_targp); 1493 xfs_binval(mp->m_ddev_targp);
1388 if (mp->m_rtdev_targp) { 1494 if (mp->m_rtdev_targp) {
@@ -1548,15 +1654,14 @@ xfs_mod_sb(xfs_trans_t *tp, __int64_t fields)
1548 xfs_sb_to_disk(XFS_BUF_TO_SBP(bp), &mp->m_sb, fields); 1654 xfs_sb_to_disk(XFS_BUF_TO_SBP(bp), &mp->m_sb, fields);
1549 1655
1550 /* find modified range */ 1656 /* find modified range */
1657 f = (xfs_sb_field_t)xfs_highbit64((__uint64_t)fields);
1658 ASSERT((1LL << f) & XFS_SB_MOD_BITS);
1659 last = xfs_sb_info[f + 1].offset - 1;
1551 1660
1552 f = (xfs_sb_field_t)xfs_lowbit64((__uint64_t)fields); 1661 f = (xfs_sb_field_t)xfs_lowbit64((__uint64_t)fields);
1553 ASSERT((1LL << f) & XFS_SB_MOD_BITS); 1662 ASSERT((1LL << f) & XFS_SB_MOD_BITS);
1554 first = xfs_sb_info[f].offset; 1663 first = xfs_sb_info[f].offset;
1555 1664
1556 f = (xfs_sb_field_t)xfs_highbit64((__uint64_t)fields);
1557 ASSERT((1LL << f) & XFS_SB_MOD_BITS);
1558 last = xfs_sb_info[f + 1].offset - 1;
1559
1560 xfs_trans_log_buf(tp, bp, first, last); 1665 xfs_trans_log_buf(tp, bp, first, last);
1561} 1666}
1562 1667
@@ -1887,7 +1992,7 @@ xfs_getsb(
1887 1992
1888 ASSERT(mp->m_sb_bp != NULL); 1993 ASSERT(mp->m_sb_bp != NULL);
1889 bp = mp->m_sb_bp; 1994 bp = mp->m_sb_bp;
1890 if (flags & XFS_BUF_TRYLOCK) { 1995 if (flags & XBF_TRYLOCK) {
1891 if (!XFS_BUF_CPSEMA(bp)) { 1996 if (!XFS_BUF_CPSEMA(bp)) {
1892 return NULL; 1997 return NULL;
1893 } 1998 }
diff --git a/fs/xfs/xfs_mount.h b/fs/xfs/xfs_mount.h
index 1df7e4502967..70504fcf14cd 100644
--- a/fs/xfs/xfs_mount.h
+++ b/fs/xfs/xfs_mount.h
@@ -78,7 +78,8 @@ typedef int (*xfs_send_destroy_t)(struct xfs_inode *, dm_right_t);
78typedef int (*xfs_send_namesp_t)(dm_eventtype_t, struct xfs_mount *, 78typedef int (*xfs_send_namesp_t)(dm_eventtype_t, struct xfs_mount *,
79 struct xfs_inode *, dm_right_t, 79 struct xfs_inode *, dm_right_t,
80 struct xfs_inode *, dm_right_t, 80 struct xfs_inode *, dm_right_t,
81 const char *, const char *, mode_t, int, int); 81 const unsigned char *, const unsigned char *,
82 mode_t, int, int);
82typedef int (*xfs_send_mount_t)(struct xfs_mount *, dm_right_t, 83typedef int (*xfs_send_mount_t)(struct xfs_mount *, dm_right_t,
83 char *, char *); 84 char *, char *);
84typedef void (*xfs_send_unmount_t)(struct xfs_mount *, struct xfs_inode *, 85typedef void (*xfs_send_unmount_t)(struct xfs_mount *, struct xfs_inode *,
@@ -207,8 +208,8 @@ typedef struct xfs_mount {
207 uint m_ag_maxlevels; /* XFS_AG_MAXLEVELS */ 208 uint m_ag_maxlevels; /* XFS_AG_MAXLEVELS */
208 uint m_bm_maxlevels[2]; /* XFS_BM_MAXLEVELS */ 209 uint m_bm_maxlevels[2]; /* XFS_BM_MAXLEVELS */
209 uint m_in_maxlevels; /* max inobt btree levels. */ 210 uint m_in_maxlevels; /* max inobt btree levels. */
210 struct xfs_perag *m_perag; /* per-ag accounting info */ 211 struct radix_tree_root m_perag_tree; /* per-ag accounting info */
211 struct rw_semaphore m_peraglock; /* lock for m_perag (pointer) */ 212 spinlock_t m_perag_lock; /* lock for m_perag_tree */
212 struct mutex m_growlock; /* growfs mutex */ 213 struct mutex m_growlock; /* growfs mutex */
213 int m_fixedfsid[2]; /* unchanged for life of FS */ 214 int m_fixedfsid[2]; /* unchanged for life of FS */
214 uint m_dmevmask; /* DMI events for this FS */ 215 uint m_dmevmask; /* DMI events for this FS */
@@ -224,6 +225,7 @@ typedef struct xfs_mount {
224 __uint64_t m_maxioffset; /* maximum inode offset */ 225 __uint64_t m_maxioffset; /* maximum inode offset */
225 __uint64_t m_resblks; /* total reserved blocks */ 226 __uint64_t m_resblks; /* total reserved blocks */
226 __uint64_t m_resblks_avail;/* available reserved blocks */ 227 __uint64_t m_resblks_avail;/* available reserved blocks */
228 __uint64_t m_resblks_save; /* reserved blks @ remount,ro */
227 int m_dalign; /* stripe unit */ 229 int m_dalign; /* stripe unit */
228 int m_swidth; /* stripe width */ 230 int m_swidth; /* stripe width */
229 int m_sinoalign; /* stripe unit inode alignment */ 231 int m_sinoalign; /* stripe unit inode alignment */
@@ -384,19 +386,10 @@ xfs_daddr_to_agbno(struct xfs_mount *mp, xfs_daddr_t d)
384} 386}
385 387
386/* 388/*
387 * perag get/put wrappers for eventual ref counting 389 * perag get/put wrappers for ref counting
388 */ 390 */
389static inline xfs_perag_t * 391struct xfs_perag *xfs_perag_get(struct xfs_mount *mp, xfs_agnumber_t agno);
390xfs_get_perag(struct xfs_mount *mp, xfs_ino_t ino) 392void xfs_perag_put(struct xfs_perag *pag);
391{
392 return &mp->m_perag[XFS_INO_TO_AGNO(mp, ino)];
393}
394
395static inline void
396xfs_put_perag(struct xfs_mount *mp, xfs_perag_t *pag)
397{
398 /* nothing to see here, move along */
399}
400 393
401/* 394/*
402 * Per-cpu superblock locking functions 395 * Per-cpu superblock locking functions
@@ -428,6 +421,7 @@ typedef struct xfs_mod_sb {
428} xfs_mod_sb_t; 421} xfs_mod_sb_t;
429 422
430extern int xfs_log_sbcount(xfs_mount_t *, uint); 423extern int xfs_log_sbcount(xfs_mount_t *, uint);
424extern __uint64_t xfs_default_resblks(xfs_mount_t *mp);
431extern int xfs_mountfs(xfs_mount_t *mp); 425extern int xfs_mountfs(xfs_mount_t *mp);
432 426
433extern void xfs_unmountfs(xfs_mount_t *); 427extern void xfs_unmountfs(xfs_mount_t *);
@@ -450,7 +444,8 @@ extern struct xfs_dmops xfs_dmcore_xfs;
450#endif /* __KERNEL__ */ 444#endif /* __KERNEL__ */
451 445
452extern void xfs_mod_sb(struct xfs_trans *, __int64_t); 446extern void xfs_mod_sb(struct xfs_trans *, __int64_t);
453extern xfs_agnumber_t xfs_initialize_perag(struct xfs_mount *, xfs_agnumber_t); 447extern int xfs_initialize_perag(struct xfs_mount *, xfs_agnumber_t,
448 xfs_agnumber_t *);
454extern void xfs_sb_from_disk(struct xfs_sb *, struct xfs_dsb *); 449extern void xfs_sb_from_disk(struct xfs_sb *, struct xfs_dsb *);
455extern void xfs_sb_to_disk(struct xfs_dsb *, struct xfs_sb *, __int64_t); 450extern void xfs_sb_to_disk(struct xfs_dsb *, struct xfs_sb *, __int64_t);
456 451
diff --git a/fs/xfs/xfs_mru_cache.c b/fs/xfs/xfs_mru_cache.c
index 4b0613d99faa..45ce15dc5b2b 100644
--- a/fs/xfs/xfs_mru_cache.c
+++ b/fs/xfs/xfs_mru_cache.c
@@ -398,7 +398,7 @@ exit:
398 * guaranteed that all the free functions for all the elements have finished 398 * guaranteed that all the free functions for all the elements have finished
399 * executing and the reaper is not running. 399 * executing and the reaper is not running.
400 */ 400 */
401void 401static void
402xfs_mru_cache_flush( 402xfs_mru_cache_flush(
403 xfs_mru_cache_t *mru) 403 xfs_mru_cache_t *mru)
404{ 404{
diff --git a/fs/xfs/xfs_mru_cache.h b/fs/xfs/xfs_mru_cache.h
index 5d439f34b0c9..36dd3ec8b4eb 100644
--- a/fs/xfs/xfs_mru_cache.h
+++ b/fs/xfs/xfs_mru_cache.h
@@ -42,7 +42,6 @@ void xfs_mru_cache_uninit(void);
42int xfs_mru_cache_create(struct xfs_mru_cache **mrup, unsigned int lifetime_ms, 42int xfs_mru_cache_create(struct xfs_mru_cache **mrup, unsigned int lifetime_ms,
43 unsigned int grp_count, 43 unsigned int grp_count,
44 xfs_mru_cache_free_func_t free_func); 44 xfs_mru_cache_free_func_t free_func);
45void xfs_mru_cache_flush(xfs_mru_cache_t *mru);
46void xfs_mru_cache_destroy(struct xfs_mru_cache *mru); 45void xfs_mru_cache_destroy(struct xfs_mru_cache *mru);
47int xfs_mru_cache_insert(struct xfs_mru_cache *mru, unsigned long key, 46int xfs_mru_cache_insert(struct xfs_mru_cache *mru, unsigned long key,
48 void *value); 47 void *value);
diff --git a/fs/xfs/xfs_quota.h b/fs/xfs/xfs_quota.h
index 91bfd60f4c74..fdcab3f81dde 100644
--- a/fs/xfs/xfs_quota.h
+++ b/fs/xfs/xfs_quota.h
@@ -223,16 +223,9 @@ typedef struct xfs_qoff_logformat {
223#define XFS_QMOPT_RES_INOS 0x0800000 223#define XFS_QMOPT_RES_INOS 0x0800000
224 224
225/* 225/*
226 * flags for dqflush and dqflush_all.
227 */
228#define XFS_QMOPT_SYNC 0x1000000
229#define XFS_QMOPT_ASYNC 0x2000000
230#define XFS_QMOPT_DELWRI 0x4000000
231
232/*
233 * flags for dqalloc. 226 * flags for dqalloc.
234 */ 227 */
235#define XFS_QMOPT_INHERIT 0x8000000 228#define XFS_QMOPT_INHERIT 0x1000000
236 229
237/* 230/*
238 * flags to xfs_trans_mod_dquot. 231 * flags to xfs_trans_mod_dquot.
diff --git a/fs/xfs/xfs_rw.c b/fs/xfs/xfs_rw.c
index 5aa07caea5f1..e336742a58a4 100644
--- a/fs/xfs/xfs_rw.c
+++ b/fs/xfs/xfs_rw.c
@@ -47,48 +47,6 @@
47#include "xfs_trace.h" 47#include "xfs_trace.h"
48 48
49/* 49/*
50 * This is a subroutine for xfs_write() and other writers (xfs_ioctl)
51 * which clears the setuid and setgid bits when a file is written.
52 */
53int
54xfs_write_clear_setuid(
55 xfs_inode_t *ip)
56{
57 xfs_mount_t *mp;
58 xfs_trans_t *tp;
59 int error;
60
61 mp = ip->i_mount;
62 tp = xfs_trans_alloc(mp, XFS_TRANS_WRITEID);
63 if ((error = xfs_trans_reserve(tp, 0,
64 XFS_WRITEID_LOG_RES(mp),
65 0, 0, 0))) {
66 xfs_trans_cancel(tp, 0);
67 return error;
68 }
69 xfs_ilock(ip, XFS_ILOCK_EXCL);
70 xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL);
71 xfs_trans_ihold(tp, ip);
72 ip->i_d.di_mode &= ~S_ISUID;
73
74 /*
75 * Note that we don't have to worry about mandatory
76 * file locking being disabled here because we only
77 * clear the S_ISGID bit if the Group execute bit is
78 * on, but if it was on then mandatory locking wouldn't
79 * have been enabled.
80 */
81 if (ip->i_d.di_mode & S_IXGRP) {
82 ip->i_d.di_mode &= ~S_ISGID;
83 }
84 xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
85 xfs_trans_set_sync(tp);
86 error = xfs_trans_commit(tp, 0);
87 xfs_iunlock(ip, XFS_ILOCK_EXCL);
88 return 0;
89}
90
91/*
92 * Force a shutdown of the filesystem instantly while keeping 50 * Force a shutdown of the filesystem instantly while keeping
93 * the filesystem consistent. We don't do an unmount here; just shutdown 51 * the filesystem consistent. We don't do an unmount here; just shutdown
94 * the shop, make sure that absolutely nothing persistent happens to 52 * the shop, make sure that absolutely nothing persistent happens to
@@ -153,88 +111,6 @@ xfs_do_force_shutdown(
153 } 111 }
154} 112}
155 113
156
157/*
158 * Called when we want to stop a buffer from getting written or read.
159 * We attach the EIO error, muck with its flags, and call biodone
160 * so that the proper iodone callbacks get called.
161 */
162int
163xfs_bioerror(
164 xfs_buf_t *bp)
165{
166
167#ifdef XFSERRORDEBUG
168 ASSERT(XFS_BUF_ISREAD(bp) || bp->b_iodone);
169#endif
170
171 /*
172 * No need to wait until the buffer is unpinned.
173 * We aren't flushing it.
174 */
175 XFS_BUF_ERROR(bp, EIO);
176 /*
177 * We're calling biodone, so delete B_DONE flag. Either way
178 * we have to call the iodone callback, and calling biodone
179 * probably is the best way since it takes care of
180 * GRIO as well.
181 */
182 XFS_BUF_UNREAD(bp);
183 XFS_BUF_UNDELAYWRITE(bp);
184 XFS_BUF_UNDONE(bp);
185 XFS_BUF_STALE(bp);
186
187 XFS_BUF_CLR_BDSTRAT_FUNC(bp);
188 xfs_biodone(bp);
189
190 return (EIO);
191}
192
193/*
194 * Same as xfs_bioerror, except that we are releasing the buffer
195 * here ourselves, and avoiding the biodone call.
196 * This is meant for userdata errors; metadata bufs come with
197 * iodone functions attached, so that we can track down errors.
198 */
199int
200xfs_bioerror_relse(
201 xfs_buf_t *bp)
202{
203 int64_t fl;
204
205 ASSERT(XFS_BUF_IODONE_FUNC(bp) != xfs_buf_iodone_callbacks);
206 ASSERT(XFS_BUF_IODONE_FUNC(bp) != xlog_iodone);
207
208 fl = XFS_BUF_BFLAGS(bp);
209 /*
210 * No need to wait until the buffer is unpinned.
211 * We aren't flushing it.
212 *
213 * chunkhold expects B_DONE to be set, whether
214 * we actually finish the I/O or not. We don't want to
215 * change that interface.
216 */
217 XFS_BUF_UNREAD(bp);
218 XFS_BUF_UNDELAYWRITE(bp);
219 XFS_BUF_DONE(bp);
220 XFS_BUF_STALE(bp);
221 XFS_BUF_CLR_IODONE_FUNC(bp);
222 XFS_BUF_CLR_BDSTRAT_FUNC(bp);
223 if (!(fl & XFS_B_ASYNC)) {
224 /*
225 * Mark b_error and B_ERROR _both_.
226 * Lot's of chunkcache code assumes that.
227 * There's no reason to mark error for
228 * ASYNC buffers.
229 */
230 XFS_BUF_ERROR(bp, EIO);
231 XFS_BUF_FINISH_IOWAIT(bp);
232 } else {
233 xfs_buf_relse(bp);
234 }
235 return (EIO);
236}
237
238/* 114/*
239 * Prints out an ALERT message about I/O error. 115 * Prints out an ALERT message about I/O error.
240 */ 116 */
@@ -306,37 +182,6 @@ xfs_read_buf(
306} 182}
307 183
308/* 184/*
309 * Wrapper around bwrite() so that we can trap
310 * write errors, and act accordingly.
311 */
312int
313xfs_bwrite(
314 struct xfs_mount *mp,
315 struct xfs_buf *bp)
316{
317 int error;
318
319 /*
320 * XXXsup how does this work for quotas.
321 */
322 XFS_BUF_SET_BDSTRAT_FUNC(bp, xfs_bdstrat_cb);
323 bp->b_mount = mp;
324 XFS_BUF_WRITE(bp);
325
326 if ((error = XFS_bwrite(bp))) {
327 ASSERT(mp);
328 /*
329 * Cannot put a buftrace here since if the buffer is not
330 * B_HOLD then we will brelse() the buffer before returning
331 * from bwrite and we could be tracing a buffer that has
332 * been reused.
333 */
334 xfs_force_shutdown(mp, SHUTDOWN_META_IO_ERROR);
335 }
336 return (error);
337}
338
339/*
340 * helper function to extract extent size hint from inode 185 * helper function to extract extent size hint from inode
341 */ 186 */
342xfs_extlen_t 187xfs_extlen_t
diff --git a/fs/xfs/xfs_rw.h b/fs/xfs/xfs_rw.h
index 571f2174435c..11c41ec6ed75 100644
--- a/fs/xfs/xfs_rw.h
+++ b/fs/xfs/xfs_rw.h
@@ -39,10 +39,6 @@ xfs_fsb_to_db(struct xfs_inode *ip, xfs_fsblock_t fsb)
39/* 39/*
40 * Prototypes for functions in xfs_rw.c. 40 * Prototypes for functions in xfs_rw.c.
41 */ 41 */
42extern int xfs_write_clear_setuid(struct xfs_inode *ip);
43extern int xfs_bwrite(struct xfs_mount *mp, struct xfs_buf *bp);
44extern int xfs_bioerror(struct xfs_buf *bp);
45extern int xfs_bioerror_relse(struct xfs_buf *bp);
46extern int xfs_read_buf(struct xfs_mount *mp, xfs_buftarg_t *btp, 42extern int xfs_read_buf(struct xfs_mount *mp, xfs_buftarg_t *btp,
47 xfs_daddr_t blkno, int len, uint flags, 43 xfs_daddr_t blkno, int len, uint flags,
48 struct xfs_buf **bpp); 44 struct xfs_buf **bpp);
diff --git a/fs/xfs/xfs_trans.c b/fs/xfs/xfs_trans.c
index 237badcbac3b..be942d4e3324 100644
--- a/fs/xfs/xfs_trans.c
+++ b/fs/xfs/xfs_trans.c
@@ -981,9 +981,8 @@ shut_us_down:
981 */ 981 */
982 if (sync) { 982 if (sync) {
983 if (!error) { 983 if (!error) {
984 error = _xfs_log_force(mp, commit_lsn, 984 error = _xfs_log_force_lsn(mp, commit_lsn,
985 XFS_LOG_FORCE | XFS_LOG_SYNC, 985 XFS_LOG_SYNC, log_flushed);
986 log_flushed);
987 } 986 }
988 XFS_STATS_INC(xs_trans_sync); 987 XFS_STATS_INC(xs_trans_sync);
989 } else { 988 } else {
@@ -1121,7 +1120,7 @@ xfs_trans_fill_vecs(
1121 tp->t_header.th_num_items = nitems; 1120 tp->t_header.th_num_items = nitems;
1122 log_vector->i_addr = (xfs_caddr_t)&tp->t_header; 1121 log_vector->i_addr = (xfs_caddr_t)&tp->t_header;
1123 log_vector->i_len = sizeof(xfs_trans_header_t); 1122 log_vector->i_len = sizeof(xfs_trans_header_t);
1124 XLOG_VEC_SET_TYPE(log_vector, XLOG_REG_TYPE_TRANSHDR); 1123 log_vector->i_type = XLOG_REG_TYPE_TRANSHDR;
1125} 1124}
1126 1125
1127 1126
diff --git a/fs/xfs/xfs_trans.h b/fs/xfs/xfs_trans.h
index ca64f33c63a3..c93e3a102857 100644
--- a/fs/xfs/xfs_trans.h
+++ b/fs/xfs/xfs_trans.h
@@ -861,8 +861,7 @@ typedef struct xfs_item_ops {
861#define XFS_ITEM_SUCCESS 0 861#define XFS_ITEM_SUCCESS 0
862#define XFS_ITEM_PINNED 1 862#define XFS_ITEM_PINNED 1
863#define XFS_ITEM_LOCKED 2 863#define XFS_ITEM_LOCKED 2
864#define XFS_ITEM_FLUSHING 3 864#define XFS_ITEM_PUSHBUF 3
865#define XFS_ITEM_PUSHBUF 4
866 865
867/* 866/*
868 * This structure is used to maintain a list of block ranges that have been 867 * This structure is used to maintain a list of block ranges that have been
diff --git a/fs/xfs/xfs_trans_ail.c b/fs/xfs/xfs_trans_ail.c
index 2ffc570679be..e799824f7245 100644
--- a/fs/xfs/xfs_trans_ail.c
+++ b/fs/xfs/xfs_trans_ail.c
@@ -237,14 +237,15 @@ out:
237} 237}
238 238
239/* 239/*
240 * Function that does the work of pushing on the AIL 240 * xfsaild_push does the work of pushing on the AIL. Returning a timeout of
241 * zero indicates that the caller should sleep until woken.
241 */ 242 */
242long 243long
243xfsaild_push( 244xfsaild_push(
244 struct xfs_ail *ailp, 245 struct xfs_ail *ailp,
245 xfs_lsn_t *last_lsn) 246 xfs_lsn_t *last_lsn)
246{ 247{
247 long tout = 1000; /* milliseconds */ 248 long tout = 0;
248 xfs_lsn_t last_pushed_lsn = *last_lsn; 249 xfs_lsn_t last_pushed_lsn = *last_lsn;
249 xfs_lsn_t target = ailp->xa_target; 250 xfs_lsn_t target = ailp->xa_target;
250 xfs_lsn_t lsn; 251 xfs_lsn_t lsn;
@@ -252,6 +253,7 @@ xfsaild_push(
252 int flush_log, count, stuck; 253 int flush_log, count, stuck;
253 xfs_mount_t *mp = ailp->xa_mount; 254 xfs_mount_t *mp = ailp->xa_mount;
254 struct xfs_ail_cursor *cur = &ailp->xa_cursors; 255 struct xfs_ail_cursor *cur = &ailp->xa_cursors;
256 int push_xfsbufd = 0;
255 257
256 spin_lock(&ailp->xa_lock); 258 spin_lock(&ailp->xa_lock);
257 xfs_trans_ail_cursor_init(ailp, cur); 259 xfs_trans_ail_cursor_init(ailp, cur);
@@ -262,7 +264,7 @@ xfsaild_push(
262 */ 264 */
263 xfs_trans_ail_cursor_done(ailp, cur); 265 xfs_trans_ail_cursor_done(ailp, cur);
264 spin_unlock(&ailp->xa_lock); 266 spin_unlock(&ailp->xa_lock);
265 last_pushed_lsn = 0; 267 *last_lsn = 0;
266 return tout; 268 return tout;
267 } 269 }
268 270
@@ -279,7 +281,6 @@ xfsaild_push(
279 * prevents use from spinning when we can't do anything or there is 281 * prevents use from spinning when we can't do anything or there is
280 * lots of contention on the AIL lists. 282 * lots of contention on the AIL lists.
281 */ 283 */
282 tout = 10;
283 lsn = lip->li_lsn; 284 lsn = lip->li_lsn;
284 flush_log = stuck = count = 0; 285 flush_log = stuck = count = 0;
285 while ((XFS_LSN_CMP(lip->li_lsn, target) < 0)) { 286 while ((XFS_LSN_CMP(lip->li_lsn, target) < 0)) {
@@ -308,6 +309,7 @@ xfsaild_push(
308 XFS_STATS_INC(xs_push_ail_pushbuf); 309 XFS_STATS_INC(xs_push_ail_pushbuf);
309 IOP_PUSHBUF(lip); 310 IOP_PUSHBUF(lip);
310 last_pushed_lsn = lsn; 311 last_pushed_lsn = lsn;
312 push_xfsbufd = 1;
311 break; 313 break;
312 314
313 case XFS_ITEM_PINNED: 315 case XFS_ITEM_PINNED:
@@ -322,12 +324,6 @@ xfsaild_push(
322 stuck++; 324 stuck++;
323 break; 325 break;
324 326
325 case XFS_ITEM_FLUSHING:
326 XFS_STATS_INC(xs_push_ail_flushing);
327 last_pushed_lsn = lsn;
328 stuck++;
329 break;
330
331 default: 327 default:
332 ASSERT(0); 328 ASSERT(0);
333 break; 329 break;
@@ -371,19 +367,24 @@ xfsaild_push(
371 * move forward in the AIL. 367 * move forward in the AIL.
372 */ 368 */
373 XFS_STATS_INC(xs_push_ail_flush); 369 XFS_STATS_INC(xs_push_ail_flush);
374 xfs_log_force(mp, (xfs_lsn_t)0, XFS_LOG_FORCE); 370 xfs_log_force(mp, 0);
371 }
372
373 if (push_xfsbufd) {
374 /* we've got delayed write buffers to flush */
375 wake_up_process(mp->m_ddev_targp->bt_task);
375 } 376 }
376 377
377 if (!count) { 378 if (!count) {
378 /* We're past our target or empty, so idle */ 379 /* We're past our target or empty, so idle */
379 tout = 1000; 380 last_pushed_lsn = 0;
380 } else if (XFS_LSN_CMP(lsn, target) >= 0) { 381 } else if (XFS_LSN_CMP(lsn, target) >= 0) {
381 /* 382 /*
382 * We reached the target so wait a bit longer for I/O to 383 * We reached the target so wait a bit longer for I/O to
383 * complete and remove pushed items from the AIL before we 384 * complete and remove pushed items from the AIL before we
384 * start the next scan from the start of the AIL. 385 * start the next scan from the start of the AIL.
385 */ 386 */
386 tout += 20; 387 tout = 50;
387 last_pushed_lsn = 0; 388 last_pushed_lsn = 0;
388 } else if ((stuck * 100) / count > 90) { 389 } else if ((stuck * 100) / count > 90) {
389 /* 390 /*
@@ -395,11 +396,14 @@ xfsaild_push(
395 * Backoff a bit more to allow some I/O to complete before 396 * Backoff a bit more to allow some I/O to complete before
396 * continuing from where we were. 397 * continuing from where we were.
397 */ 398 */
398 tout += 10; 399 tout = 20;
400 } else {
401 /* more to do, but wait a short while before continuing */
402 tout = 10;
399 } 403 }
400 *last_lsn = last_pushed_lsn; 404 *last_lsn = last_pushed_lsn;
401 return tout; 405 return tout;
402} /* xfsaild_push */ 406}
403 407
404 408
405/* 409/*
diff --git a/fs/xfs/xfs_trans_buf.c b/fs/xfs/xfs_trans_buf.c
index 49130628d5ef..5ffd544434eb 100644
--- a/fs/xfs/xfs_trans_buf.c
+++ b/fs/xfs/xfs_trans_buf.c
@@ -75,13 +75,14 @@ xfs_trans_get_buf(xfs_trans_t *tp,
75 xfs_buf_log_item_t *bip; 75 xfs_buf_log_item_t *bip;
76 76
77 if (flags == 0) 77 if (flags == 0)
78 flags = XFS_BUF_LOCK | XFS_BUF_MAPPED; 78 flags = XBF_LOCK | XBF_MAPPED;
79 79
80 /* 80 /*
81 * Default to a normal get_buf() call if the tp is NULL. 81 * Default to a normal get_buf() call if the tp is NULL.
82 */ 82 */
83 if (tp == NULL) 83 if (tp == NULL)
84 return xfs_buf_get(target_dev, blkno, len, flags | BUF_BUSY); 84 return xfs_buf_get(target_dev, blkno, len,
85 flags | XBF_DONT_BLOCK);
85 86
86 /* 87 /*
87 * If we find the buffer in the cache with this transaction 88 * If we find the buffer in the cache with this transaction
@@ -117,14 +118,14 @@ xfs_trans_get_buf(xfs_trans_t *tp,
117 } 118 }
118 119
119 /* 120 /*
120 * We always specify the BUF_BUSY flag within a transaction so 121 * We always specify the XBF_DONT_BLOCK flag within a transaction
121 * that get_buf does not try to push out a delayed write buffer 122 * so that get_buf does not try to push out a delayed write buffer
122 * which might cause another transaction to take place (if the 123 * which might cause another transaction to take place (if the
123 * buffer was delayed alloc). Such recursive transactions can 124 * buffer was delayed alloc). Such recursive transactions can
124 * easily deadlock with our current transaction as well as cause 125 * easily deadlock with our current transaction as well as cause
125 * us to run out of stack space. 126 * us to run out of stack space.
126 */ 127 */
127 bp = xfs_buf_get(target_dev, blkno, len, flags | BUF_BUSY); 128 bp = xfs_buf_get(target_dev, blkno, len, flags | XBF_DONT_BLOCK);
128 if (bp == NULL) { 129 if (bp == NULL) {
129 return NULL; 130 return NULL;
130 } 131 }
@@ -290,15 +291,15 @@ xfs_trans_read_buf(
290 int error; 291 int error;
291 292
292 if (flags == 0) 293 if (flags == 0)
293 flags = XFS_BUF_LOCK | XFS_BUF_MAPPED; 294 flags = XBF_LOCK | XBF_MAPPED;
294 295
295 /* 296 /*
296 * Default to a normal get_buf() call if the tp is NULL. 297 * Default to a normal get_buf() call if the tp is NULL.
297 */ 298 */
298 if (tp == NULL) { 299 if (tp == NULL) {
299 bp = xfs_buf_read(target, blkno, len, flags | BUF_BUSY); 300 bp = xfs_buf_read(target, blkno, len, flags | XBF_DONT_BLOCK);
300 if (!bp) 301 if (!bp)
301 return (flags & XFS_BUF_TRYLOCK) ? 302 return (flags & XBF_TRYLOCK) ?
302 EAGAIN : XFS_ERROR(ENOMEM); 303 EAGAIN : XFS_ERROR(ENOMEM);
303 304
304 if (XFS_BUF_GETERROR(bp) != 0) { 305 if (XFS_BUF_GETERROR(bp) != 0) {
@@ -385,14 +386,14 @@ xfs_trans_read_buf(
385 } 386 }
386 387
387 /* 388 /*
388 * We always specify the BUF_BUSY flag within a transaction so 389 * We always specify the XBF_DONT_BLOCK flag within a transaction
389 * that get_buf does not try to push out a delayed write buffer 390 * so that get_buf does not try to push out a delayed write buffer
390 * which might cause another transaction to take place (if the 391 * which might cause another transaction to take place (if the
391 * buffer was delayed alloc). Such recursive transactions can 392 * buffer was delayed alloc). Such recursive transactions can
392 * easily deadlock with our current transaction as well as cause 393 * easily deadlock with our current transaction as well as cause
393 * us to run out of stack space. 394 * us to run out of stack space.
394 */ 395 */
395 bp = xfs_buf_read(target, blkno, len, flags | BUF_BUSY); 396 bp = xfs_buf_read(target, blkno, len, flags | XBF_DONT_BLOCK);
396 if (bp == NULL) { 397 if (bp == NULL) {
397 *bpp = NULL; 398 *bpp = NULL;
398 return 0; 399 return 0;
@@ -472,8 +473,8 @@ shutdown_abort:
472 if (XFS_BUF_ISSTALE(bp) && XFS_BUF_ISDELAYWRITE(bp)) 473 if (XFS_BUF_ISSTALE(bp) && XFS_BUF_ISDELAYWRITE(bp))
473 cmn_err(CE_NOTE, "about to pop assert, bp == 0x%p", bp); 474 cmn_err(CE_NOTE, "about to pop assert, bp == 0x%p", bp);
474#endif 475#endif
475 ASSERT((XFS_BUF_BFLAGS(bp) & (XFS_B_STALE|XFS_B_DELWRI)) != 476 ASSERT((XFS_BUF_BFLAGS(bp) & (XBF_STALE|XBF_DELWRI)) !=
476 (XFS_B_STALE|XFS_B_DELWRI)); 477 (XBF_STALE|XBF_DELWRI));
477 478
478 trace_xfs_trans_read_buf_shut(bp, _RET_IP_); 479 trace_xfs_trans_read_buf_shut(bp, _RET_IP_);
479 xfs_buf_relse(bp); 480 xfs_buf_relse(bp);
diff --git a/fs/xfs/xfs_types.h b/fs/xfs/xfs_types.h
index d725428c9df6..b09904555d07 100644
--- a/fs/xfs/xfs_types.h
+++ b/fs/xfs/xfs_types.h
@@ -151,8 +151,8 @@ typedef enum {
151} xfs_btnum_t; 151} xfs_btnum_t;
152 152
153struct xfs_name { 153struct xfs_name {
154 const char *name; 154 const unsigned char *name;
155 int len; 155 int len;
156}; 156};
157 157
158#endif /* __XFS_TYPES_H__ */ 158#endif /* __XFS_TYPES_H__ */
diff --git a/fs/xfs/xfs_vnodeops.c b/fs/xfs/xfs_vnodeops.c
index 6f268756bf36..ddd2c5d1b854 100644
--- a/fs/xfs/xfs_vnodeops.c
+++ b/fs/xfs/xfs_vnodeops.c
@@ -256,7 +256,7 @@ xfs_setattr(
256 iattr->ia_size > ip->i_d.di_size) { 256 iattr->ia_size > ip->i_d.di_size) {
257 code = xfs_flush_pages(ip, 257 code = xfs_flush_pages(ip,
258 ip->i_d.di_size, iattr->ia_size, 258 ip->i_d.di_size, iattr->ia_size,
259 XFS_B_ASYNC, FI_NONE); 259 XBF_ASYNC, FI_NONE);
260 } 260 }
261 261
262 /* wait for all I/O to complete */ 262 /* wait for all I/O to complete */
@@ -597,7 +597,7 @@ xfs_fsync(
597{ 597{
598 xfs_trans_t *tp; 598 xfs_trans_t *tp;
599 int error = 0; 599 int error = 0;
600 int log_flushed = 0, changed = 1; 600 int log_flushed = 0;
601 601
602 xfs_itrace_entry(ip); 602 xfs_itrace_entry(ip);
603 603
@@ -627,19 +627,16 @@ xfs_fsync(
627 * disk yet, the inode will be still be pinned. If it is, 627 * disk yet, the inode will be still be pinned. If it is,
628 * force the log. 628 * force the log.
629 */ 629 */
630
631 xfs_iunlock(ip, XFS_ILOCK_SHARED); 630 xfs_iunlock(ip, XFS_ILOCK_SHARED);
632
633 if (xfs_ipincount(ip)) { 631 if (xfs_ipincount(ip)) {
634 error = _xfs_log_force(ip->i_mount, (xfs_lsn_t)0, 632 if (ip->i_itemp->ili_last_lsn) {
635 XFS_LOG_FORCE | XFS_LOG_SYNC, 633 error = _xfs_log_force_lsn(ip->i_mount,
636 &log_flushed); 634 ip->i_itemp->ili_last_lsn,
637 } else { 635 XFS_LOG_SYNC, &log_flushed);
638 /* 636 } else {
639 * If the inode is not pinned and nothing has changed 637 error = _xfs_log_force(ip->i_mount,
640 * we don't need to flush the cache. 638 XFS_LOG_SYNC, &log_flushed);
641 */ 639 }
642 changed = 0;
643 } 640 }
644 } else { 641 } else {
645 /* 642 /*
@@ -674,7 +671,7 @@ xfs_fsync(
674 xfs_iunlock(ip, XFS_ILOCK_EXCL); 671 xfs_iunlock(ip, XFS_ILOCK_EXCL);
675 } 672 }
676 673
677 if ((ip->i_mount->m_flags & XFS_MOUNT_BARRIER) && changed) { 674 if (ip->i_mount->m_flags & XFS_MOUNT_BARRIER) {
678 /* 675 /*
679 * If the log write didn't issue an ordered tag we need 676 * If the log write didn't issue an ordered tag we need
680 * to flush the disk cache for the data device now. 677 * to flush the disk cache for the data device now.
@@ -1096,7 +1093,7 @@ xfs_release(
1096 */ 1093 */
1097 truncated = xfs_iflags_test_and_clear(ip, XFS_ITRUNCATED); 1094 truncated = xfs_iflags_test_and_clear(ip, XFS_ITRUNCATED);
1098 if (truncated && VN_DIRTY(VFS_I(ip)) && ip->i_delayed_blks > 0) 1095 if (truncated && VN_DIRTY(VFS_I(ip)) && ip->i_delayed_blks > 0)
1099 xfs_flush_pages(ip, 0, -1, XFS_B_ASYNC, FI_NONE); 1096 xfs_flush_pages(ip, 0, -1, XBF_ASYNC, FI_NONE);
1100 } 1097 }
1101 1098
1102 if (ip->i_d.di_nlink != 0) { 1099 if (ip->i_d.di_nlink != 0) {
@@ -2199,7 +2196,8 @@ xfs_symlink(
2199 if (DM_EVENT_ENABLED(dp, DM_EVENT_SYMLINK)) { 2196 if (DM_EVENT_ENABLED(dp, DM_EVENT_SYMLINK)) {
2200 error = XFS_SEND_NAMESP(mp, DM_EVENT_SYMLINK, dp, 2197 error = XFS_SEND_NAMESP(mp, DM_EVENT_SYMLINK, dp,
2201 DM_RIGHT_NULL, NULL, DM_RIGHT_NULL, 2198 DM_RIGHT_NULL, NULL, DM_RIGHT_NULL,
2202 link_name->name, target_path, 0, 0, 0); 2199 link_name->name,
2200 (unsigned char *)target_path, 0, 0, 0);
2203 if (error) 2201 if (error)
2204 return error; 2202 return error;
2205 } 2203 }
@@ -2395,7 +2393,8 @@ std_return:
2395 dp, DM_RIGHT_NULL, 2393 dp, DM_RIGHT_NULL,
2396 error ? NULL : ip, 2394 error ? NULL : ip,
2397 DM_RIGHT_NULL, link_name->name, 2395 DM_RIGHT_NULL, link_name->name,
2398 target_path, 0, error, 0); 2396 (unsigned char *)target_path,
2397 0, error, 0);
2399 } 2398 }
2400 2399
2401 if (!error) 2400 if (!error)
diff --git a/fs/xfs/xfs_vnodeops.h b/fs/xfs/xfs_vnodeops.h
index 167a467403a5..774f40729ca1 100644
--- a/fs/xfs/xfs_vnodeops.h
+++ b/fs/xfs/xfs_vnodeops.h
@@ -43,11 +43,11 @@ int xfs_change_file_space(struct xfs_inode *ip, int cmd,
43int xfs_rename(struct xfs_inode *src_dp, struct xfs_name *src_name, 43int xfs_rename(struct xfs_inode *src_dp, struct xfs_name *src_name,
44 struct xfs_inode *src_ip, struct xfs_inode *target_dp, 44 struct xfs_inode *src_ip, struct xfs_inode *target_dp,
45 struct xfs_name *target_name, struct xfs_inode *target_ip); 45 struct xfs_name *target_name, struct xfs_inode *target_ip);
46int xfs_attr_get(struct xfs_inode *ip, const char *name, char *value, 46int xfs_attr_get(struct xfs_inode *ip, const unsigned char *name,
47 int *valuelenp, int flags); 47 unsigned char *value, int *valuelenp, int flags);
48int xfs_attr_set(struct xfs_inode *dp, const char *name, char *value, 48int xfs_attr_set(struct xfs_inode *dp, const unsigned char *name,
49 int valuelen, int flags); 49 unsigned char *value, int valuelen, int flags);
50int xfs_attr_remove(struct xfs_inode *dp, const char *name, int flags); 50int xfs_attr_remove(struct xfs_inode *dp, const unsigned char *name, int flags);
51int xfs_attr_list(struct xfs_inode *dp, char *buffer, int bufsize, 51int xfs_attr_list(struct xfs_inode *dp, char *buffer, int bufsize,
52 int flags, struct attrlist_cursor_kern *cursor); 52 int flags, struct attrlist_cursor_kern *cursor);
53ssize_t xfs_read(struct xfs_inode *ip, struct kiocb *iocb, 53ssize_t xfs_read(struct xfs_inode *ip, struct kiocb *iocb,
diff --git a/include/crypto/md5.h b/include/crypto/md5.h
new file mode 100644
index 000000000000..65f299b08b0d
--- /dev/null
+++ b/include/crypto/md5.h
@@ -0,0 +1,17 @@
1#ifndef _CRYPTO_MD5_H
2#define _CRYPTO_MD5_H
3
4#include <linux/types.h>
5
6#define MD5_DIGEST_SIZE 16
7#define MD5_HMAC_BLOCK_SIZE 64
8#define MD5_BLOCK_WORDS 16
9#define MD5_HASH_WORDS 4
10
11struct md5_state {
12 u32 hash[MD5_HASH_WORDS];
13 u32 block[MD5_BLOCK_WORDS];
14 u64 byte_count;
15};
16
17#endif
diff --git a/include/crypto/pcrypt.h b/include/crypto/pcrypt.h
new file mode 100644
index 000000000000..d7d8bd8c6edc
--- /dev/null
+++ b/include/crypto/pcrypt.h
@@ -0,0 +1,51 @@
1/*
2 * pcrypt - Parallel crypto engine.
3 *
4 * Copyright (C) 2009 secunet Security Networks AG
5 * Copyright (C) 2009 Steffen Klassert <steffen.klassert@secunet.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#ifndef _CRYPTO_PCRYPT_H
22#define _CRYPTO_PCRYPT_H
23
24#include <linux/crypto.h>
25#include <linux/kernel.h>
26#include <linux/padata.h>
27
28struct pcrypt_request {
29 struct padata_priv padata;
30 void *data;
31 void *__ctx[] CRYPTO_MINALIGN_ATTR;
32};
33
34static inline void *pcrypt_request_ctx(struct pcrypt_request *req)
35{
36 return req->__ctx;
37}
38
39static inline
40struct padata_priv *pcrypt_request_padata(struct pcrypt_request *req)
41{
42 return &req->padata;
43}
44
45static inline
46struct pcrypt_request *pcrypt_padata_request(struct padata_priv *padata)
47{
48 return container_of(padata, struct pcrypt_request, padata);
49}
50
51#endif
diff --git a/include/linux/highmem.h b/include/linux/highmem.h
index ab2cc20e21a5..74152c08ad07 100644
--- a/include/linux/highmem.h
+++ b/include/linux/highmem.h
@@ -17,6 +17,12 @@ static inline void flush_anon_page(struct vm_area_struct *vma, struct page *page
17static inline void flush_kernel_dcache_page(struct page *page) 17static inline void flush_kernel_dcache_page(struct page *page)
18{ 18{
19} 19}
20static inline void flush_kernel_vmap_range(void *vaddr, int size)
21{
22}
23static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
24{
25}
20#endif 26#endif
21 27
22#include <asm/kmap_types.h> 28#include <asm/kmap_types.h>
diff --git a/include/linux/mtd/sh_flctl.h b/include/linux/mtd/sh_flctl.h
index e77c1cea404d..ab77609ec337 100644
--- a/include/linux/mtd/sh_flctl.h
+++ b/include/linux/mtd/sh_flctl.h
@@ -51,6 +51,8 @@
51#define _4ECCCNTEN (0x1 << 24) 51#define _4ECCCNTEN (0x1 << 24)
52#define _4ECCEN (0x1 << 23) 52#define _4ECCEN (0x1 << 23)
53#define _4ECCCORRECT (0x1 << 22) 53#define _4ECCCORRECT (0x1 << 22)
54#define SHBUSSEL (0x1 << 20)
55#define SEL_16BIT (0x1 << 19)
54#define SNAND_E (0x1 << 18) /* SNAND (0=512 1=2048)*/ 56#define SNAND_E (0x1 << 18) /* SNAND (0=512 1=2048)*/
55#define QTSEL_E (0x1 << 17) 57#define QTSEL_E (0x1 << 17)
56#define ENDIAN (0x1 << 16) /* 1 = little endian */ 58#define ENDIAN (0x1 << 16) /* 1 = little endian */
@@ -96,6 +98,7 @@
96struct sh_flctl { 98struct sh_flctl {
97 struct mtd_info mtd; 99 struct mtd_info mtd;
98 struct nand_chip chip; 100 struct nand_chip chip;
101 struct platform_device *pdev;
99 void __iomem *reg; 102 void __iomem *reg;
100 103
101 uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */ 104 uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */
diff --git a/include/linux/padata.h b/include/linux/padata.h
new file mode 100644
index 000000000000..51611da9c498
--- /dev/null
+++ b/include/linux/padata.h
@@ -0,0 +1,88 @@
1/*
2 * padata.h - header for the padata parallelization interface
3 *
4 * Copyright (C) 2008, 2009 secunet Security Networks AG
5 * Copyright (C) 2008, 2009 Steffen Klassert <steffen.klassert@secunet.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#ifndef PADATA_H
22#define PADATA_H
23
24#include <linux/workqueue.h>
25#include <linux/spinlock.h>
26#include <linux/list.h>
27
28struct padata_priv {
29 struct list_head list;
30 struct parallel_data *pd;
31 int cb_cpu;
32 int seq_nr;
33 int info;
34 void (*parallel)(struct padata_priv *padata);
35 void (*serial)(struct padata_priv *padata);
36};
37
38struct padata_list {
39 struct list_head list;
40 spinlock_t lock;
41};
42
43struct padata_queue {
44 struct padata_list parallel;
45 struct padata_list reorder;
46 struct padata_list serial;
47 struct work_struct pwork;
48 struct work_struct swork;
49 struct parallel_data *pd;
50 atomic_t num_obj;
51 int cpu_index;
52};
53
54struct parallel_data {
55 struct padata_instance *pinst;
56 struct padata_queue *queue;
57 atomic_t seq_nr;
58 atomic_t reorder_objects;
59 atomic_t refcnt;
60 unsigned int max_seq_nr;
61 cpumask_var_t cpumask;
62 spinlock_t lock;
63};
64
65struct padata_instance {
66 struct notifier_block cpu_notifier;
67 struct workqueue_struct *wq;
68 struct parallel_data *pd;
69 cpumask_var_t cpumask;
70 struct mutex lock;
71 u8 flags;
72#define PADATA_INIT 1
73#define PADATA_RESET 2
74};
75
76extern struct padata_instance *padata_alloc(const struct cpumask *cpumask,
77 struct workqueue_struct *wq);
78extern void padata_free(struct padata_instance *pinst);
79extern int padata_do_parallel(struct padata_instance *pinst,
80 struct padata_priv *padata, int cb_cpu);
81extern void padata_do_serial(struct padata_priv *padata);
82extern int padata_set_cpumask(struct padata_instance *pinst,
83 cpumask_var_t cpumask);
84extern int padata_add_cpu(struct padata_instance *pinst, int cpu);
85extern int padata_remove_cpu(struct padata_instance *pinst, int cpu);
86extern void padata_start(struct padata_instance *pinst);
87extern void padata_stop(struct padata_instance *pinst);
88#endif
diff --git a/include/linux/pfkeyv2.h b/include/linux/pfkeyv2.h
index 228b0b6306b0..0b80c806631f 100644
--- a/include/linux/pfkeyv2.h
+++ b/include/linux/pfkeyv2.h
@@ -315,6 +315,7 @@ struct sadb_x_kmaddress {
315#define SADB_X_EALG_AES_GCM_ICV12 19 315#define SADB_X_EALG_AES_GCM_ICV12 19
316#define SADB_X_EALG_AES_GCM_ICV16 20 316#define SADB_X_EALG_AES_GCM_ICV16 20
317#define SADB_X_EALG_CAMELLIACBC 22 317#define SADB_X_EALG_CAMELLIACBC 22
318#define SADB_X_EALG_NULL_AES_GMAC 23
318#define SADB_EALG_MAX 253 /* last EALG */ 319#define SADB_EALG_MAX 253 /* last EALG */
319/* private allocations should use 249-255 (RFC2407) */ 320/* private allocations should use 249-255 (RFC2407) */
320#define SADB_X_EALG_SERPENTCBC 252 /* draft-ietf-ipsec-ciph-aes-cbc-00 */ 321#define SADB_X_EALG_SERPENTCBC 252 /* draft-ietf-ipsec-ciph-aes-cbc-00 */
diff --git a/include/linux/raid_class.h b/include/linux/raid_class.h
index 6b537f1ac96c..31e1ff69efc8 100644
--- a/include/linux/raid_class.h
+++ b/include/linux/raid_class.h
@@ -32,6 +32,7 @@ enum raid_level {
32 RAID_LEVEL_0, 32 RAID_LEVEL_0,
33 RAID_LEVEL_1, 33 RAID_LEVEL_1,
34 RAID_LEVEL_10, 34 RAID_LEVEL_10,
35 RAID_LEVEL_1E,
35 RAID_LEVEL_3, 36 RAID_LEVEL_3,
36 RAID_LEVEL_4, 37 RAID_LEVEL_4,
37 RAID_LEVEL_5, 38 RAID_LEVEL_5,
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index 4ef246f14654..51d288d8ac88 100644
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -45,7 +45,7 @@ struct intc_sense_reg {
45#define INTC_SMP(stride, nr) 45#define INTC_SMP(stride, nr)
46#endif 46#endif
47 47
48struct intc_desc { 48struct intc_hw_desc {
49 struct intc_vect *vectors; 49 struct intc_vect *vectors;
50 unsigned int nr_vectors; 50 unsigned int nr_vectors;
51 struct intc_group *groups; 51 struct intc_group *groups;
@@ -56,29 +56,40 @@ struct intc_desc {
56 unsigned int nr_prio_regs; 56 unsigned int nr_prio_regs;
57 struct intc_sense_reg *sense_regs; 57 struct intc_sense_reg *sense_regs;
58 unsigned int nr_sense_regs; 58 unsigned int nr_sense_regs;
59 char *name;
60 struct intc_mask_reg *ack_regs; 59 struct intc_mask_reg *ack_regs;
61 unsigned int nr_ack_regs; 60 unsigned int nr_ack_regs;
62}; 61};
63 62
64#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) 63#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
64#define INTC_HW_DESC(vectors, groups, mask_regs, \
65 prio_regs, sense_regs, ack_regs) \
66{ \
67 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
68 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
69 _INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \
70}
71
72struct intc_desc {
73 char *name;
74 intc_enum force_enable;
75 intc_enum force_disable;
76 struct intc_hw_desc hw;
77};
78
65#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ 79#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
66 mask_regs, prio_regs, sense_regs) \ 80 mask_regs, prio_regs, sense_regs) \
67struct intc_desc symbol __initdata = { \ 81struct intc_desc symbol __initdata = { \
68 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ 82 .name = chipname, \
69 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ 83 .hw = INTC_HW_DESC(vectors, groups, mask_regs, \
70 _INTC_ARRAY(sense_regs), \ 84 prio_regs, sense_regs, NULL), \
71 chipname, \
72} 85}
73 86
74#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ 87#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
75 mask_regs, prio_regs, sense_regs, ack_regs) \ 88 mask_regs, prio_regs, sense_regs, ack_regs) \
76struct intc_desc symbol __initdata = { \ 89struct intc_desc symbol __initdata = { \
77 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ 90 .name = chipname, \
78 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ 91 .hw = INTC_HW_DESC(vectors, groups, mask_regs, \
79 _INTC_ARRAY(sense_regs), \ 92 prio_regs, sense_regs, ack_regs), \
80 chipname, \
81 _INTC_ARRAY(ack_regs), \
82} 93}
83 94
84void __init register_intc_controller(struct intc_desc *desc); 95void __init register_intc_controller(struct intc_desc *desc);
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index d4962a782b8a..3793d168b44d 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -350,6 +350,7 @@ struct v4l2_pix_format {
350#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 */ 350#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 */
351 351
352/* Vendor-specific formats */ 352/* Vendor-specific formats */
353#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
353#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W', 'N', 'V', 'A') /* Winnov hw compress */ 354#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W', 'N', 'V', 'A') /* Winnov hw compress */
354#define V4L2_PIX_FMT_SN9C10X v4l2_fourcc('S', '9', '1', '0') /* SN9C10x compression */ 355#define V4L2_PIX_FMT_SN9C10X v4l2_fourcc('S', '9', '1', '0') /* SN9C10x compression */
355#define V4L2_PIX_FMT_SN9C20X_I420 v4l2_fourcc('S', '9', '2', '0') /* SN9C20x YUV 4:2:0 */ 356#define V4L2_PIX_FMT_SN9C20X_I420 v4l2_fourcc('S', '9', '2', '0') /* SN9C20x YUV 4:2:0 */
@@ -362,6 +363,7 @@ struct v4l2_pix_format {
362#define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */ 363#define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */
363#define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */ 364#define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */
364#define V4L2_PIX_FMT_MR97310A v4l2_fourcc('M', '3', '1', '0') /* compressed BGGR bayer */ 365#define V4L2_PIX_FMT_MR97310A v4l2_fourcc('M', '3', '1', '0') /* compressed BGGR bayer */
366#define V4L2_PIX_FMT_SN9C2028 v4l2_fourcc('S', 'O', 'N', 'X') /* compressed GBRG bayer */
365#define V4L2_PIX_FMT_SQ905C v4l2_fourcc('9', '0', '5', 'C') /* compressed RGGB bayer */ 367#define V4L2_PIX_FMT_SQ905C v4l2_fourcc('9', '0', '5', 'C') /* compressed RGGB bayer */
366#define V4L2_PIX_FMT_PJPG v4l2_fourcc('P', 'J', 'P', 'G') /* Pixart 73xx JPEG */ 368#define V4L2_PIX_FMT_PJPG v4l2_fourcc('P', 'J', 'P', 'G') /* Pixart 73xx JPEG */
367#define V4L2_PIX_FMT_OV511 v4l2_fourcc('O', '5', '1', '1') /* ov511 JPEG */ 369#define V4L2_PIX_FMT_OV511 v4l2_fourcc('O', '5', '1', '1') /* ov511 JPEG */
diff --git a/include/media/davinci/isif.h b/include/media/davinci/isif.h
new file mode 100644
index 000000000000..b0b74ad618cc
--- /dev/null
+++ b/include/media/davinci/isif.h
@@ -0,0 +1,531 @@
1/*
2 * Copyright (C) 2008-2009 Texas Instruments Inc
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 * isif header file
19 */
20#ifndef _ISIF_H
21#define _ISIF_H
22
23#include <media/davinci/ccdc_types.h>
24#include <media/davinci/vpfe_types.h>
25
26/* isif float type S8Q8/U8Q8 */
27struct isif_float_8 {
28 /* 8 bit integer part */
29 __u8 integer;
30 /* 8 bit decimal part */
31 __u8 decimal;
32};
33
34/* isif float type U16Q16/S16Q16 */
35struct isif_float_16 {
36 /* 16 bit integer part */
37 __u16 integer;
38 /* 16 bit decimal part */
39 __u16 decimal;
40};
41
42/************************************************************************
43 * Vertical Defect Correction parameters
44 ***********************************************************************/
45/* Defect Correction (DFC) table entry */
46struct isif_vdfc_entry {
47 /* vertical position of defect */
48 __u16 pos_vert;
49 /* horizontal position of defect */
50 __u16 pos_horz;
51 /*
52 * Defect level of Vertical line defect position. This is subtracted
53 * from the data at the defect position
54 */
55 __u8 level_at_pos;
56 /*
57 * Defect level of the pixels upper than the vertical line defect.
58 * This is subtracted from the data
59 */
60 __u8 level_up_pixels;
61 /*
62 * Defect level of the pixels lower than the vertical line defect.
63 * This is subtracted from the data
64 */
65 __u8 level_low_pixels;
66};
67
68#define ISIF_VDFC_TABLE_SIZE 8
69struct isif_dfc {
70 /* enable vertical defect correction */
71 __u8 en;
72 /* Defect level subtraction. Just fed through if saturating */
73#define ISIF_VDFC_NORMAL 0
74 /*
75 * Defect level subtraction. Horizontal interpolation ((i-2)+(i+2))/2
76 * if data saturating
77 */
78#define ISIF_VDFC_HORZ_INTERPOL_IF_SAT 1
79 /* Horizontal interpolation (((i-2)+(i+2))/2) */
80#define ISIF_VDFC_HORZ_INTERPOL 2
81 /* one of the vertical defect correction modes above */
82 __u8 corr_mode;
83 /* 0 - whole line corrected, 1 - not pixels upper than the defect */
84 __u8 corr_whole_line;
85#define ISIF_VDFC_NO_SHIFT 0
86#define ISIF_VDFC_SHIFT_1 1
87#define ISIF_VDFC_SHIFT_2 2
88#define ISIF_VDFC_SHIFT_3 3
89#define ISIF_VDFC_SHIFT_4 4
90 /*
91 * defect level shift value. level_at_pos, level_upper_pos,
92 * and level_lower_pos can be shifted up by this value. Choose
93 * one of the values above
94 */
95 __u8 def_level_shift;
96 /* defect saturation level */
97 __u16 def_sat_level;
98 /* number of vertical defects. Max is ISIF_VDFC_TABLE_SIZE */
99 __u16 num_vdefects;
100 /* VDFC table ptr */
101 struct isif_vdfc_entry table[ISIF_VDFC_TABLE_SIZE];
102};
103
104struct isif_horz_bclamp {
105
106 /* Horizontal clamp disabled. Only vertical clamp value is subtracted */
107#define ISIF_HORZ_BC_DISABLE 0
108 /*
109 * Horizontal clamp value is calculated and subtracted from image data
110 * along with vertical clamp value
111 */
112#define ISIF_HORZ_BC_CLAMP_CALC_ENABLED 1
113 /*
114 * Horizontal clamp value calculated from previous image is subtracted
115 * from image data along with vertical clamp value.
116 */
117#define ISIF_HORZ_BC_CLAMP_NOT_UPDATED 2
118 /* horizontal clamp mode. One of the values above */
119 __u8 mode;
120 /*
121 * pixel value limit enable.
122 * 0 - limit disabled
123 * 1 - pixel value limited to 1023
124 */
125 __u8 clamp_pix_limit;
126 /* Select Most left window for bc calculation */
127#define ISIF_SEL_MOST_LEFT_WIN 0
128 /* Select Most right window for bc calculation */
129#define ISIF_SEL_MOST_RIGHT_WIN 1
130 /* Select most left or right window for clamp val calculation */
131 __u8 base_win_sel_calc;
132 /* Window count per color for calculation. range 1-32 */
133 __u8 win_count_calc;
134 /* Window start position - horizontal for calculation. 0 - 8191 */
135 __u16 win_start_h_calc;
136 /* Window start position - vertical for calculation 0 - 8191 */
137 __u16 win_start_v_calc;
138#define ISIF_HORZ_BC_SZ_H_2PIXELS 0
139#define ISIF_HORZ_BC_SZ_H_4PIXELS 1
140#define ISIF_HORZ_BC_SZ_H_8PIXELS 2
141#define ISIF_HORZ_BC_SZ_H_16PIXELS 3
142 /* Width of the sample window in pixels for calculation */
143 __u8 win_h_sz_calc;
144#define ISIF_HORZ_BC_SZ_V_32PIXELS 0
145#define ISIF_HORZ_BC_SZ_V_64PIXELS 1
146#define ISIF_HORZ_BC_SZ_V_128PIXELS 2
147#define ISIF_HORZ_BC_SZ_V_256PIXELS 3
148 /* Height of the sample window in pixels for calculation */
149 __u8 win_v_sz_calc;
150};
151
152/************************************************************************
153 * Black Clamp parameters
154 ***********************************************************************/
155struct isif_vert_bclamp {
156 /* Reset value used is the clamp value calculated */
157#define ISIF_VERT_BC_USE_HORZ_CLAMP_VAL 0
158 /* Reset value used is reset_clamp_val configured */
159#define ISIF_VERT_BC_USE_CONFIG_CLAMP_VAL 1
160 /* No update, previous image value is used */
161#define ISIF_VERT_BC_NO_UPDATE 2
162 /*
163 * Reset value selector for vertical clamp calculation. Use one of
164 * the above values
165 */
166 __u8 reset_val_sel;
167 /* U8Q8. Line average coefficient used in vertical clamp calculation */
168 __u8 line_ave_coef;
169 /* Height of the optical black region for calculation */
170 __u16 ob_v_sz_calc;
171 /* Optical black region start position - horizontal. 0 - 8191 */
172 __u16 ob_start_h;
173 /* Optical black region start position - vertical 0 - 8191 */
174 __u16 ob_start_v;
175};
176
177struct isif_black_clamp {
178 /*
179 * This offset value is added irrespective of the clamp enable status.
180 * S13
181 */
182 __u16 dc_offset;
183 /*
184 * Enable black/digital clamp value to be subtracted from the image data
185 */
186 __u8 en;
187 /*
188 * black clamp mode. same/separate clamp for 4 colors
189 * 0 - disable - same clamp value for all colors
190 * 1 - clamp value calculated separately for all colors
191 */
192 __u8 bc_mode_color;
193 /* Vrtical start position for bc subtraction */
194 __u16 vert_start_sub;
195 /* Black clamp for horizontal direction */
196 struct isif_horz_bclamp horz;
197 /* Black clamp for vertical direction */
198 struct isif_vert_bclamp vert;
199};
200
201/*************************************************************************
202** Color Space Convertion (CSC)
203*************************************************************************/
204#define ISIF_CSC_NUM_COEFF 16
205struct isif_color_space_conv {
206 /* Enable color space conversion */
207 __u8 en;
208 /*
209 * csc coeffient table. S8Q5, M00 at index 0, M01 at index 1, and
210 * so forth
211 */
212 struct isif_float_8 coeff[ISIF_CSC_NUM_COEFF];
213};
214
215
216/*************************************************************************
217** Black Compensation parameters
218*************************************************************************/
219struct isif_black_comp {
220 /* Comp for Red */
221 __s8 r_comp;
222 /* Comp for Gr */
223 __s8 gr_comp;
224 /* Comp for Blue */
225 __s8 b_comp;
226 /* Comp for Gb */
227 __s8 gb_comp;
228};
229
230/*************************************************************************
231** Gain parameters
232*************************************************************************/
233struct isif_gain {
234 /* Gain for Red or ye */
235 struct isif_float_16 r_ye;
236 /* Gain for Gr or cy */
237 struct isif_float_16 gr_cy;
238 /* Gain for Gb or g */
239 struct isif_float_16 gb_g;
240 /* Gain for Blue or mg */
241 struct isif_float_16 b_mg;
242};
243
244#define ISIF_LINEAR_TAB_SIZE 192
245/*************************************************************************
246** Linearization parameters
247*************************************************************************/
248struct isif_linearize {
249 /* Enable or Disable linearization of data */
250 __u8 en;
251 /* Shift value applied */
252 __u8 corr_shft;
253 /* scale factor applied U11Q10 */
254 struct isif_float_16 scale_fact;
255 /* Size of the linear table */
256 __u16 table[ISIF_LINEAR_TAB_SIZE];
257};
258
259/* Color patterns */
260#define ISIF_RED 0
261#define ISIF_GREEN_RED 1
262#define ISIF_GREEN_BLUE 2
263#define ISIF_BLUE 3
264struct isif_col_pat {
265 __u8 olop;
266 __u8 olep;
267 __u8 elop;
268 __u8 elep;
269};
270
271/*************************************************************************
272** Data formatter parameters
273*************************************************************************/
274struct isif_fmtplen {
275 /*
276 * number of program entries for SET0, range 1 - 16
277 * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
278 * ISIF_COMBINE
279 */
280 __u16 plen0;
281 /*
282 * number of program entries for SET1, range 1 - 16
283 * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
284 * ISIF_COMBINE
285 */
286 __u16 plen1;
287 /**
288 * number of program entries for SET2, range 1 - 16
289 * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
290 * ISIF_COMBINE
291 */
292 __u16 plen2;
293 /**
294 * number of program entries for SET3, range 1 - 16
295 * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
296 * ISIF_COMBINE
297 */
298 __u16 plen3;
299};
300
301struct isif_fmt_cfg {
302#define ISIF_SPLIT 0
303#define ISIF_COMBINE 1
304 /* Split or combine or line alternate */
305 __u8 fmtmode;
306 /* enable or disable line alternating mode */
307 __u8 ln_alter_en;
308#define ISIF_1LINE 0
309#define ISIF_2LINES 1
310#define ISIF_3LINES 2
311#define ISIF_4LINES 3
312 /* Split/combine line number */
313 __u8 lnum;
314 /* Address increment Range 1 - 16 */
315 __u8 addrinc;
316};
317
318struct isif_fmt_addr_ptr {
319 /* Initial address */
320 __u32 init_addr;
321 /* output line number */
322#define ISIF_1STLINE 0
323#define ISIF_2NDLINE 1
324#define ISIF_3RDLINE 2
325#define ISIF_4THLINE 3
326 __u8 out_line;
327};
328
329struct isif_fmtpgm_ap {
330 /* program address pointer */
331 __u8 pgm_aptr;
332 /* program address increment or decrement */
333 __u8 pgmupdt;
334};
335
336struct isif_data_formatter {
337 /* Enable/Disable data formatter */
338 __u8 en;
339 /* data formatter configuration */
340 struct isif_fmt_cfg cfg;
341 /* Formatter program entries length */
342 struct isif_fmtplen plen;
343 /* first pixel in a line fed to formatter */
344 __u16 fmtrlen;
345 /* HD interval for output line. Only valid when split line */
346 __u16 fmthcnt;
347 /* formatter address pointers */
348 struct isif_fmt_addr_ptr fmtaddr_ptr[16];
349 /* program enable/disable */
350 __u8 pgm_en[32];
351 /* program address pointers */
352 struct isif_fmtpgm_ap fmtpgm_ap[32];
353};
354
355struct isif_df_csc {
356 /* Color Space Conversion confguration, 0 - csc, 1 - df */
357 __u8 df_or_csc;
358 /* csc configuration valid if df_or_csc is 0 */
359 struct isif_color_space_conv csc;
360 /* data formatter configuration valid if df_or_csc is 1 */
361 struct isif_data_formatter df;
362 /* start pixel in a line at the input */
363 __u32 start_pix;
364 /* number of pixels in input line */
365 __u32 num_pixels;
366 /* start line at the input */
367 __u32 start_line;
368 /* number of lines at the input */
369 __u32 num_lines;
370};
371
372struct isif_gain_offsets_adj {
373 /* Gain adjustment per color */
374 struct isif_gain gain;
375 /* Offset adjustment */
376 __u16 offset;
377 /* Enable or Disable Gain adjustment for SDRAM data */
378 __u8 gain_sdram_en;
379 /* Enable or Disable Gain adjustment for IPIPE data */
380 __u8 gain_ipipe_en;
381 /* Enable or Disable Gain adjustment for H3A data */
382 __u8 gain_h3a_en;
383 /* Enable or Disable Gain adjustment for SDRAM data */
384 __u8 offset_sdram_en;
385 /* Enable or Disable Gain adjustment for IPIPE data */
386 __u8 offset_ipipe_en;
387 /* Enable or Disable Gain adjustment for H3A data */
388 __u8 offset_h3a_en;
389};
390
391struct isif_cul {
392 /* Horizontal Cull pattern for odd lines */
393 __u8 hcpat_odd;
394 /* Horizontal Cull pattern for even lines */
395 __u8 hcpat_even;
396 /* Vertical Cull pattern */
397 __u8 vcpat;
398 /* Enable or disable lpf. Apply when cull is enabled */
399 __u8 en_lpf;
400};
401
402struct isif_compress {
403#define ISIF_ALAW 0
404#define ISIF_DPCM 1
405#define ISIF_NO_COMPRESSION 2
406 /* Compression Algorithm used */
407 __u8 alg;
408 /* Choose Predictor1 for DPCM compression */
409#define ISIF_DPCM_PRED1 0
410 /* Choose Predictor2 for DPCM compression */
411#define ISIF_DPCM_PRED2 1
412 /* Predictor for DPCM compression */
413 __u8 pred;
414};
415
416/* all the stuff in this struct will be provided by userland */
417struct isif_config_params_raw {
418 /* Linearization parameters for image sensor data input */
419 struct isif_linearize linearize;
420 /* Data formatter or CSC */
421 struct isif_df_csc df_csc;
422 /* Defect Pixel Correction (DFC) confguration */
423 struct isif_dfc dfc;
424 /* Black/Digital Clamp configuration */
425 struct isif_black_clamp bclamp;
426 /* Gain, offset adjustments */
427 struct isif_gain_offsets_adj gain_offset;
428 /* Culling */
429 struct isif_cul culling;
430 /* A-Law and DPCM compression options */
431 struct isif_compress compress;
432 /* horizontal offset for Gain/LSC/DFC */
433 __u16 horz_offset;
434 /* vertical offset for Gain/LSC/DFC */
435 __u16 vert_offset;
436 /* color pattern for field 0 */
437 struct isif_col_pat col_pat_field0;
438 /* color pattern for field 1 */
439 struct isif_col_pat col_pat_field1;
440#define ISIF_NO_SHIFT 0
441#define ISIF_1BIT_SHIFT 1
442#define ISIF_2BIT_SHIFT 2
443#define ISIF_3BIT_SHIFT 3
444#define ISIF_4BIT_SHIFT 4
445#define ISIF_5BIT_SHIFT 5
446#define ISIF_6BIT_SHIFT 6
447 /* Data shift applied before storing to SDRAM */
448 __u8 data_shift;
449 /* enable input test pattern generation */
450 __u8 test_pat_gen;
451};
452
453#ifdef __KERNEL__
454struct isif_ycbcr_config {
455 /* isif pixel format */
456 enum ccdc_pixfmt pix_fmt;
457 /* isif frame format */
458 enum ccdc_frmfmt frm_fmt;
459 /* ISIF crop window */
460 struct v4l2_rect win;
461 /* field polarity */
462 enum vpfe_pin_pol fid_pol;
463 /* interface VD polarity */
464 enum vpfe_pin_pol vd_pol;
465 /* interface HD polarity */
466 enum vpfe_pin_pol hd_pol;
467 /* isif pix order. Only used for ycbcr capture */
468 enum ccdc_pixorder pix_order;
469 /* isif buffer type. Only used for ycbcr capture */
470 enum ccdc_buftype buf_type;
471};
472
473/* MSB of image data connected to sensor port */
474enum isif_data_msb {
475 ISIF_BIT_MSB_15,
476 ISIF_BIT_MSB_14,
477 ISIF_BIT_MSB_13,
478 ISIF_BIT_MSB_12,
479 ISIF_BIT_MSB_11,
480 ISIF_BIT_MSB_10,
481 ISIF_BIT_MSB_9,
482 ISIF_BIT_MSB_8,
483 ISIF_BIT_MSB_7
484};
485
486enum isif_cfa_pattern {
487 ISIF_CFA_PAT_MOSAIC,
488 ISIF_CFA_PAT_STRIPE
489};
490
491struct isif_params_raw {
492 /* isif pixel format */
493 enum ccdc_pixfmt pix_fmt;
494 /* isif frame format */
495 enum ccdc_frmfmt frm_fmt;
496 /* video window */
497 struct v4l2_rect win;
498 /* field polarity */
499 enum vpfe_pin_pol fid_pol;
500 /* interface VD polarity */
501 enum vpfe_pin_pol vd_pol;
502 /* interface HD polarity */
503 enum vpfe_pin_pol hd_pol;
504 /* buffer type. Applicable for interlaced mode */
505 enum ccdc_buftype buf_type;
506 /* Gain values */
507 struct isif_gain gain;
508 /* cfa pattern */
509 enum isif_cfa_pattern cfa_pat;
510 /* Data MSB position */
511 enum isif_data_msb data_msb;
512 /* Enable horizontal flip */
513 unsigned char horz_flip_en;
514 /* Enable image invert vertically */
515 unsigned char image_invert_en;
516
517 /* all the userland defined stuff*/
518 struct isif_config_params_raw config_params;
519};
520
521enum isif_data_pack {
522 ISIF_PACK_16BIT,
523 ISIF_PACK_12BIT,
524 ISIF_PACK_8BIT
525};
526
527#define ISIF_WIN_NTSC {0, 0, 720, 480}
528#define ISIF_WIN_VGA {0, 0, 640, 480}
529
530#endif
531#endif
diff --git a/include/media/davinci/vpss.h b/include/media/davinci/vpss.h
index fcdff745fae2..c59cc029c74a 100644
--- a/include/media/davinci/vpss.h
+++ b/include/media/davinci/vpss.h
@@ -29,7 +29,19 @@
29/* selector for ccdc input selection on DM355 */ 29/* selector for ccdc input selection on DM355 */
30enum vpss_ccdc_source_sel { 30enum vpss_ccdc_source_sel {
31 VPSS_CCDCIN, 31 VPSS_CCDCIN,
32 VPSS_HSSIIN 32 VPSS_HSSIIN,
33 VPSS_PGLPBK, /* for DM365 only */
34 VPSS_CCDCPG /* for DM365 only */
35};
36
37struct vpss_sync_pol {
38 unsigned int ccdpg_hdpol:1;
39 unsigned int ccdpg_vdpol:1;
40};
41
42struct vpss_pg_frame_size {
43 short hlpfr;
44 short pplen;
33}; 45};
34 46
35/* Used for enable/diable VPSS Clock */ 47/* Used for enable/diable VPSS Clock */
@@ -47,12 +59,38 @@ enum vpss_clock_sel {
47 */ 59 */
48 VPSS_VENC_CLOCK_SEL, 60 VPSS_VENC_CLOCK_SEL,
49 VPSS_VPBE_CLOCK, 61 VPSS_VPBE_CLOCK,
62 /* DM365 only clocks */
63 VPSS_IPIPEIF_CLOCK,
64 VPSS_RSZ_CLOCK,
65 VPSS_BL_CLOCK,
66 /*
67 * When using VPSS_PCLK_INTERNAL in vpss_enable_clock() api
68 * following applies:-
69 * en = 0 disable internal PCLK
70 * en = 1 enables internal PCLK
71 */
72 VPSS_PCLK_INTERNAL,
73 /*
74 * When using VPSS_PSYNC_CLOCK_SEL in vpss_enable_clock() api
75 * following applies:-
76 * en = 0 enables MMR clock
77 * en = 1 enables VPSS clock
78 */
79 VPSS_PSYNC_CLOCK_SEL,
80 VPSS_LDC_CLOCK_SEL,
81 VPSS_OSD_CLOCK_SEL,
82 VPSS_FDIF_CLOCK,
83 VPSS_LDC_CLOCK
50}; 84};
51 85
52/* select input to ccdc on dm355 */ 86/* select input to ccdc on dm355 */
53int vpss_select_ccdc_source(enum vpss_ccdc_source_sel src_sel); 87int vpss_select_ccdc_source(enum vpss_ccdc_source_sel src_sel);
54/* enable/disable a vpss clock, 0 - success, -1 - failure */ 88/* enable/disable a vpss clock, 0 - success, -1 - failure */
55int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en); 89int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en);
90/* set sync polarity, only for DM365*/
91void dm365_vpss_set_sync_pol(struct vpss_sync_pol);
92/* set the PG_FRAME_SIZE register, only for DM365 */
93void dm365_vpss_set_pg_frame_size(struct vpss_pg_frame_size);
56 94
57/* wbl reset for dm644x */ 95/* wbl reset for dm644x */
58enum vpss_wbl_sel { 96enum vpss_wbl_sel {
@@ -65,5 +103,6 @@ enum vpss_wbl_sel {
65 VPSS_PCR_PREV_WBL_0, 103 VPSS_PCR_PREV_WBL_0,
66 VPSS_PCR_CCDC_WBL_O, 104 VPSS_PCR_CCDC_WBL_O,
67}; 105};
106/* clear wbl overflow flag for DM6446 */
68int vpss_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel); 107int vpss_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel);
69#endif 108#endif
diff --git a/include/media/ir-common.h b/include/media/ir-common.h
index 2c6af24b905e..c66298062d39 100644
--- a/include/media/ir-common.h
+++ b/include/media/ir-common.h
@@ -35,7 +35,7 @@
35 35
36struct ir_input_state { 36struct ir_input_state {
37 /* configuration */ 37 /* configuration */
38 int ir_type; 38 u64 ir_type;
39 39
40 /* key info */ 40 /* key info */
41 u32 ir_key; /* ir scancode */ 41 u32 ir_key; /* ir scancode */
@@ -84,7 +84,7 @@ struct card_ir {
84/* Routines from ir-functions.c */ 84/* Routines from ir-functions.c */
85 85
86int ir_input_init(struct input_dev *dev, struct ir_input_state *ir, 86int ir_input_init(struct input_dev *dev, struct ir_input_state *ir,
87 int ir_type); 87 const u64 ir_type);
88void ir_input_nokey(struct input_dev *dev, struct ir_input_state *ir); 88void ir_input_nokey(struct input_dev *dev, struct ir_input_state *ir);
89void ir_input_keydown(struct input_dev *dev, struct ir_input_state *ir, 89void ir_input_keydown(struct input_dev *dev, struct ir_input_state *ir,
90 u32 ir_key); 90 u32 ir_key);
@@ -162,4 +162,6 @@ extern struct ir_scancode_table ir_codes_terratec_cinergy_xs_table;
162extern struct ir_scancode_table ir_codes_videomate_s350_table; 162extern struct ir_scancode_table ir_codes_videomate_s350_table;
163extern struct ir_scancode_table ir_codes_gadmei_rm008z_table; 163extern struct ir_scancode_table ir_codes_gadmei_rm008z_table;
164extern struct ir_scancode_table ir_codes_nec_terratec_cinergy_xs_table; 164extern struct ir_scancode_table ir_codes_nec_terratec_cinergy_xs_table;
165extern struct ir_scancode_table ir_codes_winfast_usbii_deluxe_table;
166extern struct ir_scancode_table ir_codes_kworld_315u_table;
165#endif 167#endif
diff --git a/include/media/ir-core.h b/include/media/ir-core.h
index 299d201e1339..61c223bc3953 100644
--- a/include/media/ir-core.h
+++ b/include/media/ir-core.h
@@ -21,13 +21,11 @@ extern int ir_core_debug;
21#define IR_dprintk(level, fmt, arg...) if (ir_core_debug >= level) \ 21#define IR_dprintk(level, fmt, arg...) if (ir_core_debug >= level) \
22 printk(KERN_DEBUG "%s: " fmt , __func__, ## arg) 22 printk(KERN_DEBUG "%s: " fmt , __func__, ## arg)
23 23
24enum ir_type { 24#define IR_TYPE_UNKNOWN 0
25 IR_TYPE_UNKNOWN = 0, 25#define IR_TYPE_RC5 (1 << 0) /* Philips RC5 protocol */
26 IR_TYPE_RC5 = 1, 26#define IR_TYPE_PD (1 << 1) /* Pulse distance encoded IR */
27 IR_TYPE_PD = 2, /* Pulse distance encoded IR */ 27#define IR_TYPE_NEC (1 << 2)
28 IR_TYPE_NEC = 3, 28#define IR_TYPE_OTHER (((u64)1) << 63l)
29 IR_TYPE_OTHER = 99,
30};
31 29
32struct ir_scancode { 30struct ir_scancode {
33 u16 scancode; 31 u16 scancode;
@@ -37,26 +35,40 @@ struct ir_scancode {
37struct ir_scancode_table { 35struct ir_scancode_table {
38 struct ir_scancode *scan; 36 struct ir_scancode *scan;
39 int size; 37 int size;
40 enum ir_type ir_type; 38 u64 ir_type;
41 spinlock_t lock; 39 spinlock_t lock;
42}; 40};
43 41
42struct ir_dev_props {
43 unsigned long allowed_protos;
44 void *priv;
45 int (*change_protocol)(void *priv, u64 ir_type);
46};
47
48
44struct ir_input_dev { 49struct ir_input_dev {
45 struct input_dev *dev; 50 struct input_dev *dev; /* Input device*/
46 struct ir_scancode_table rc_tab; 51 struct ir_scancode_table rc_tab; /* scan/key table */
52 unsigned long devno; /* device number */
53 struct attribute_group attr; /* IR attributes */
54 struct device *class_dev; /* virtual class dev */
55 const struct ir_dev_props *props; /* Device properties */
47}; 56};
57#define to_ir_input_dev(_attr) container_of(_attr, struct ir_input_dev, attr)
48 58
49/* Routines from ir-keytable.c */ 59/* Routines from ir-keytable.c */
50 60
51u32 ir_g_keycode_from_table(struct input_dev *input_dev, 61u32 ir_g_keycode_from_table(struct input_dev *input_dev,
52 u32 scancode); 62 u32 scancode);
53 63
54int ir_set_keycode_table(struct input_dev *input_dev,
55 struct ir_scancode_table *rc_tab);
56
57int ir_roundup_tablesize(int n_elems);
58int ir_input_register(struct input_dev *dev, 64int ir_input_register(struct input_dev *dev,
59 struct ir_scancode_table *ir_codes); 65 const struct ir_scancode_table *ir_codes,
66 const struct ir_dev_props *props);
60void ir_input_unregister(struct input_dev *input_dev); 67void ir_input_unregister(struct input_dev *input_dev);
61 68
69/* Routines from ir-sysfs.c */
70
71int ir_register_class(struct input_dev *input_dev);
72void ir_unregister_class(struct input_dev *input_dev);
73
62#endif 74#endif
diff --git a/include/media/ir-kbd-i2c.h b/include/media/ir-kbd-i2c.h
index aaf65e8b1a40..9142936603cc 100644
--- a/include/media/ir-kbd-i2c.h
+++ b/include/media/ir-kbd-i2c.h
@@ -36,7 +36,7 @@ enum ir_kbd_get_key_fn {
36struct IR_i2c_init_data { 36struct IR_i2c_init_data {
37 struct ir_scancode_table *ir_codes; 37 struct ir_scancode_table *ir_codes;
38 const char *name; 38 const char *name;
39 int type; /* IR_TYPE_RC5, IR_TYPE_PD, etc */ 39 u64 type; /* IR_TYPE_RC5, IR_TYPE_PD, etc */
40 /* 40 /*
41 * Specify either a function pointer or a value indicating one of 41 * Specify either a function pointer or a value indicating one of
42 * ir_kbd_i2c's internal get_key functions 42 * ir_kbd_i2c's internal get_key functions
diff --git a/include/media/ov772x.h b/include/media/ov772x.h
index 14c77efd6a85..548bf1155c83 100644
--- a/include/media/ov772x.h
+++ b/include/media/ov772x.h
@@ -15,8 +15,9 @@
15#include <media/soc_camera.h> 15#include <media/soc_camera.h>
16 16
17/* for flags */ 17/* for flags */
18#define OV772X_FLAG_VFLIP 0x00000001 /* Vertical flip image */ 18#define OV772X_FLAG_VFLIP (1 << 0) /* Vertical flip image */
19#define OV772X_FLAG_HFLIP 0x00000002 /* Horizontal flip image */ 19#define OV772X_FLAG_HFLIP (1 << 1) /* Horizontal flip image */
20#define OV772X_FLAG_8BIT (1 << 2) /* default 10 bit */
20 21
21/* 22/*
22 * for Edge ctrl 23 * for Edge ctrl
@@ -53,9 +54,8 @@ struct ov772x_edge_ctrl {
53 * ov772x camera info 54 * ov772x camera info
54 */ 55 */
55struct ov772x_camera_info { 56struct ov772x_camera_info {
56 unsigned long buswidth; 57 unsigned long flags;
57 unsigned long flags; 58 struct ov772x_edge_ctrl edgectrl;
58 struct ov772x_edge_ctrl edgectrl;
59}; 59};
60 60
61#endif /* __OV772X_H__ */ 61#endif /* __OV772X_H__ */
diff --git a/include/media/saa7146_vv.h b/include/media/saa7146_vv.h
index 4aeff96ff7d8..b9da1f5591e7 100644
--- a/include/media/saa7146_vv.h
+++ b/include/media/saa7146_vv.h
@@ -188,6 +188,7 @@ void saa7146_buffer_timeout(unsigned long data);
188void saa7146_dma_free(struct saa7146_dev* dev,struct videobuf_queue *q, 188void saa7146_dma_free(struct saa7146_dev* dev,struct videobuf_queue *q,
189 struct saa7146_buf *buf); 189 struct saa7146_buf *buf);
190 190
191int saa7146_vv_devinit(struct saa7146_dev *dev);
191int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv); 192int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv);
192int saa7146_vv_release(struct saa7146_dev* dev); 193int saa7146_vv_release(struct saa7146_dev* dev);
193 194
diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
index dcc5b86bcb6c..9d69f01b6fa2 100644
--- a/include/media/soc_camera.h
+++ b/include/media/soc_camera.h
@@ -81,6 +81,8 @@ struct soc_camera_host_ops {
81 int (*set_bus_param)(struct soc_camera_device *, __u32); 81 int (*set_bus_param)(struct soc_camera_device *, __u32);
82 int (*get_ctrl)(struct soc_camera_device *, struct v4l2_control *); 82 int (*get_ctrl)(struct soc_camera_device *, struct v4l2_control *);
83 int (*set_ctrl)(struct soc_camera_device *, struct v4l2_control *); 83 int (*set_ctrl)(struct soc_camera_device *, struct v4l2_control *);
84 int (*get_parm)(struct soc_camera_device *, struct v4l2_streamparm *);
85 int (*set_parm)(struct soc_camera_device *, struct v4l2_streamparm *);
84 unsigned int (*poll)(struct file *, poll_table *); 86 unsigned int (*poll)(struct file *, poll_table *);
85 const struct v4l2_queryctrl *controls; 87 const struct v4l2_queryctrl *controls;
86 int num_controls; 88 int num_controls;
diff --git a/include/media/timb_radio.h b/include/media/timb_radio.h
new file mode 100644
index 000000000000..fcd32a3696ba
--- /dev/null
+++ b/include/media/timb_radio.h
@@ -0,0 +1,36 @@
1/*
2 * timb_radio.h Platform struct for the Timberdale radio driver
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef _TIMB_RADIO_
20#define _TIMB_RADIO_ 1
21
22#include <linux/i2c.h>
23
24struct timb_radio_platform_data {
25 int i2c_adapter; /* I2C adapter where the tuner and dsp are attached */
26 struct {
27 const char *module_name;
28 struct i2c_board_info *info;
29 } tuner;
30 struct {
31 const char *module_name;
32 struct i2c_board_info *info;
33 } dsp;
34};
35
36#endif
diff --git a/include/media/tuner.h b/include/media/tuner.h
index 4d5b53ff17db..5505c5360ca3 100644
--- a/include/media/tuner.h
+++ b/include/media/tuner.h
@@ -129,6 +129,7 @@
129#define TUNER_PARTSNIC_PTI_5NF05 81 129#define TUNER_PARTSNIC_PTI_5NF05 81
130#define TUNER_PHILIPS_CU1216L 82 130#define TUNER_PHILIPS_CU1216L 82
131#define TUNER_NXP_TDA18271 83 131#define TUNER_NXP_TDA18271 83
132#define TUNER_SONY_BTF_PXN01Z 84
132 133
133/* tv card specific */ 134/* tv card specific */
134#define TDA9887_PRESENT (1<<0) 135#define TDA9887_PRESENT (1<<0)
diff --git a/include/media/tvp7002.h b/include/media/tvp7002.h
new file mode 100644
index 000000000000..ee4353459ef5
--- /dev/null
+++ b/include/media/tvp7002.h
@@ -0,0 +1,56 @@
1/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
2 * Digitizer with Horizontal PLL registers
3 *
4 * Copyright (C) 2009 Texas Instruments Inc
5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
6 *
7 * This code is partially based upon the TVP5150 driver
8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
10 * and the TVP7002 driver in the TI LSP 2.10.00.14
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26#ifndef _TVP7002_H_
27#define _TVP7002_H_
28
29/* Platform-dependent data
30 *
31 * clk_polarity:
32 * 0 -> data clocked out on rising edge of DATACLK signal
33 * 1 -> data clocked out on falling edge of DATACLK signal
34 * hs_polarity:
35 * 0 -> active low HSYNC output
36 * 1 -> active high HSYNC output
37 * sog_polarity:
38 * 0 -> normal operation
39 * 1 -> operation with polarity inverted
40 * vs_polarity:
41 * 0 -> active low VSYNC output
42 * 1 -> active high VSYNC output
43 * fid_polarity:
44 * 0 -> the field ID output is set to logic 1 for an odd
45 * field (field 1) and set to logic 0 for an even
46 * field (field 0).
47 * 1 -> operation with polarity inverted.
48 */
49struct tvp7002_config {
50 u8 clk_polarity;
51 u8 hs_polarity;
52 u8 vs_polarity;
53 u8 fid_polarity;
54 u8 sog_polarity;
55};
56#endif
diff --git a/include/media/tw9910.h b/include/media/tw9910.h
index 5e2895a05e6b..90bcf1fa5421 100644
--- a/include/media/tw9910.h
+++ b/include/media/tw9910.h
@@ -30,8 +30,8 @@ enum tw9910_mpout_pin {
30}; 30};
31 31
32struct tw9910_video_info { 32struct tw9910_video_info {
33 unsigned long buswidth; 33 unsigned long buswidth;
34 enum tw9910_mpout_pin mpout; 34 enum tw9910_mpout_pin mpout;
35}; 35};
36 36
37 37
diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h
index 6cc107d198a0..56abf21dd786 100644
--- a/include/media/v4l2-chip-ident.h
+++ b/include/media/v4l2-chip-ident.h
@@ -39,6 +39,7 @@ enum {
39 39
40 /* module saa7115: reserved range 101-149 */ 40 /* module saa7115: reserved range 101-149 */
41 V4L2_IDENT_SAA7111 = 101, 41 V4L2_IDENT_SAA7111 = 101,
42 V4L2_IDENT_SAA7111A = 102,
42 V4L2_IDENT_SAA7113 = 103, 43 V4L2_IDENT_SAA7113 = 103,
43 V4L2_IDENT_SAA7114 = 104, 44 V4L2_IDENT_SAA7114 = 104,
44 V4L2_IDENT_SAA7115 = 105, 45 V4L2_IDENT_SAA7115 = 105,
@@ -134,6 +135,9 @@ enum {
134 /* modules tef6862: just ident 6862 */ 135 /* modules tef6862: just ident 6862 */
135 V4L2_IDENT_TEF6862 = 6862, 136 V4L2_IDENT_TEF6862 = 6862,
136 137
138 /* module tvp7002: just ident 7002 */
139 V4L2_IDENT_TVP7002 = 7002,
140
137 /* module adv7170: just ident 7170 */ 141 /* module adv7170: just ident 7170 */
138 V4L2_IDENT_ADV7170 = 7170, 142 V4L2_IDENT_ADV7170 = 7170,
139 143
@@ -155,6 +159,9 @@ enum {
155 /* module adv7343: just ident 7343 */ 159 /* module adv7343: just ident 7343 */
156 V4L2_IDENT_ADV7343 = 7343, 160 V4L2_IDENT_ADV7343 = 7343,
157 161
162 /* module saa7706h: just ident 7706 */
163 V4L2_IDENT_SAA7706H = 7706,
164
158 /* module wm8739: just ident 8739 */ 165 /* module wm8739: just ident 8739 */
159 V4L2_IDENT_WM8739 = 8739, 166 V4L2_IDENT_WM8739 = 8739,
160 167
diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h
index 9ba99cd39ee7..2bcdca0a57fc 100644
--- a/include/media/v4l2-subdev.h
+++ b/include/media/v4l2-subdev.h
@@ -180,6 +180,7 @@ struct v4l2_subdev_audio_ops {
180 int (*s_clock_freq)(struct v4l2_subdev *sd, u32 freq); 180 int (*s_clock_freq)(struct v4l2_subdev *sd, u32 freq);
181 int (*s_i2s_clock_freq)(struct v4l2_subdev *sd, u32 freq); 181 int (*s_i2s_clock_freq)(struct v4l2_subdev *sd, u32 freq);
182 int (*s_routing)(struct v4l2_subdev *sd, u32 input, u32 output, u32 config); 182 int (*s_routing)(struct v4l2_subdev *sd, u32 input, u32 output, u32 config);
183 int (*s_stream)(struct v4l2_subdev *sd, int enable);
183}; 184};
184 185
185/* 186/*
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index 7c4449900c24..d80b6dbed1ca 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -348,7 +348,8 @@ extern int scsi_mode_select(struct scsi_device *sdev, int pf, int sp,
348 struct scsi_sense_hdr *); 348 struct scsi_sense_hdr *);
349extern int scsi_test_unit_ready(struct scsi_device *sdev, int timeout, 349extern int scsi_test_unit_ready(struct scsi_device *sdev, int timeout,
350 int retries, struct scsi_sense_hdr *sshdr); 350 int retries, struct scsi_sense_hdr *sshdr);
351extern unsigned char *scsi_get_vpd_page(struct scsi_device *, u8 page); 351extern int scsi_get_vpd_page(struct scsi_device *, u8 page, unsigned char *buf,
352 int buf_len);
352extern int scsi_device_set_state(struct scsi_device *sdev, 353extern int scsi_device_set_state(struct scsi_device *sdev,
353 enum scsi_device_state state); 354 enum scsi_device_state state);
354extern struct scsi_event *sdev_evt_alloc(enum scsi_device_event evt_type, 355extern struct scsi_event *sdev_evt_alloc(enum scsi_device_event evt_type,
diff --git a/include/scsi/scsi_transport_sas.h b/include/scsi/scsi_transport_sas.h
index 61ad3594aad6..ffeebc34a4f7 100644
--- a/include/scsi/scsi_transport_sas.h
+++ b/include/scsi/scsi_transport_sas.h
@@ -107,6 +107,8 @@ struct sas_end_device {
107 struct sas_rphy rphy; 107 struct sas_rphy rphy;
108 /* flags */ 108 /* flags */
109 unsigned ready_led_meaning:1; 109 unsigned ready_led_meaning:1;
110 unsigned tlr_supported:1;
111 unsigned tlr_enabled:1;
110 /* parameters */ 112 /* parameters */
111 u16 I_T_nexus_loss_timeout; 113 u16 I_T_nexus_loss_timeout;
112 u16 initiator_response_timeout; 114 u16 initiator_response_timeout;
@@ -181,6 +183,11 @@ extern int sas_phy_add(struct sas_phy *);
181extern void sas_phy_delete(struct sas_phy *); 183extern void sas_phy_delete(struct sas_phy *);
182extern int scsi_is_sas_phy(const struct device *); 184extern int scsi_is_sas_phy(const struct device *);
183 185
186unsigned int sas_tlr_supported(struct scsi_device *);
187unsigned int sas_is_tlr_enabled(struct scsi_device *);
188void sas_disable_tlr(struct scsi_device *);
189void sas_enable_tlr(struct scsi_device *);
190
184extern struct sas_rphy *sas_end_device_alloc(struct sas_port *); 191extern struct sas_rphy *sas_end_device_alloc(struct sas_port *);
185extern struct sas_rphy *sas_expander_alloc(struct sas_port *, enum sas_device_type); 192extern struct sas_rphy *sas_expander_alloc(struct sas_port *, enum sas_device_type);
186void sas_rphy_free(struct sas_rphy *); 193void sas_rphy_free(struct sas_rphy *);
diff --git a/include/video/sh_mobile_lcdc.h b/include/video/sh_mobile_lcdc.h
index 288205457713..2cc893fc1f85 100644
--- a/include/video/sh_mobile_lcdc.h
+++ b/include/video/sh_mobile_lcdc.h
@@ -34,6 +34,8 @@ enum { LCDC_CLK_BUS, LCDC_CLK_PERIPHERAL, LCDC_CLK_EXTERNAL };
34#define LCDC_FLAGS_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */ 34#define LCDC_FLAGS_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */
35#define LCDC_FLAGS_DWCNT (1 << 4) /* Disable dotclock during blanking */ 35#define LCDC_FLAGS_DWCNT (1 << 4) /* Disable dotclock during blanking */
36 36
37#define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32)
38
37struct sh_mobile_lcdc_sys_bus_cfg { 39struct sh_mobile_lcdc_sys_bus_cfg {
38 unsigned long ldmt2r; 40 unsigned long ldmt2r;
39 unsigned long ldmt3r; 41 unsigned long ldmt3r;
diff --git a/init/Kconfig b/init/Kconfig
index d95ca7cd5d45..1510e17a2902 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1262,4 +1262,8 @@ source "block/Kconfig"
1262config PREEMPT_NOTIFIERS 1262config PREEMPT_NOTIFIERS
1263 bool 1263 bool
1264 1264
1265config PADATA
1266 depends on SMP
1267 bool
1268
1265source "kernel/Kconfig.locks" 1269source "kernel/Kconfig.locks"
diff --git a/kernel/Makefile b/kernel/Makefile
index 864ff75d65f2..6aebdeb2aa34 100644
--- a/kernel/Makefile
+++ b/kernel/Makefile
@@ -100,6 +100,7 @@ obj-$(CONFIG_SLOW_WORK_DEBUG) += slow-work-debugfs.o
100obj-$(CONFIG_PERF_EVENTS) += perf_event.o 100obj-$(CONFIG_PERF_EVENTS) += perf_event.o
101obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o 101obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
102obj-$(CONFIG_USER_RETURN_NOTIFIER) += user-return-notifier.o 102obj-$(CONFIG_USER_RETURN_NOTIFIER) += user-return-notifier.o
103obj-$(CONFIG_PADATA) += padata.o
103 104
104ifneq ($(CONFIG_SCHED_OMIT_FRAME_POINTER),y) 105ifneq ($(CONFIG_SCHED_OMIT_FRAME_POINTER),y)
105# According to Alan Modra <alan@linuxcare.com.au>, the -fno-omit-frame-pointer is 106# According to Alan Modra <alan@linuxcare.com.au>, the -fno-omit-frame-pointer is
diff --git a/kernel/padata.c b/kernel/padata.c
new file mode 100644
index 000000000000..6f9bcb8313d6
--- /dev/null
+++ b/kernel/padata.c
@@ -0,0 +1,690 @@
1/*
2 * padata.c - generic interface to process data streams in parallel
3 *
4 * Copyright (C) 2008, 2009 secunet Security Networks AG
5 * Copyright (C) 2008, 2009 Steffen Klassert <steffen.klassert@secunet.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/module.h>
22#include <linux/cpumask.h>
23#include <linux/err.h>
24#include <linux/cpu.h>
25#include <linux/padata.h>
26#include <linux/mutex.h>
27#include <linux/sched.h>
28#include <linux/rcupdate.h>
29
30#define MAX_SEQ_NR INT_MAX - NR_CPUS
31#define MAX_OBJ_NUM 10000 * NR_CPUS
32
33static int padata_index_to_cpu(struct parallel_data *pd, int cpu_index)
34{
35 int cpu, target_cpu;
36
37 target_cpu = cpumask_first(pd->cpumask);
38 for (cpu = 0; cpu < cpu_index; cpu++)
39 target_cpu = cpumask_next(target_cpu, pd->cpumask);
40
41 return target_cpu;
42}
43
44static int padata_cpu_hash(struct padata_priv *padata)
45{
46 int cpu_index;
47 struct parallel_data *pd;
48
49 pd = padata->pd;
50
51 /*
52 * Hash the sequence numbers to the cpus by taking
53 * seq_nr mod. number of cpus in use.
54 */
55 cpu_index = padata->seq_nr % cpumask_weight(pd->cpumask);
56
57 return padata_index_to_cpu(pd, cpu_index);
58}
59
60static void padata_parallel_worker(struct work_struct *work)
61{
62 struct padata_queue *queue;
63 struct parallel_data *pd;
64 struct padata_instance *pinst;
65 LIST_HEAD(local_list);
66
67 local_bh_disable();
68 queue = container_of(work, struct padata_queue, pwork);
69 pd = queue->pd;
70 pinst = pd->pinst;
71
72 spin_lock(&queue->parallel.lock);
73 list_replace_init(&queue->parallel.list, &local_list);
74 spin_unlock(&queue->parallel.lock);
75
76 while (!list_empty(&local_list)) {
77 struct padata_priv *padata;
78
79 padata = list_entry(local_list.next,
80 struct padata_priv, list);
81
82 list_del_init(&padata->list);
83
84 padata->parallel(padata);
85 }
86
87 local_bh_enable();
88}
89
90/*
91 * padata_do_parallel - padata parallelization function
92 *
93 * @pinst: padata instance
94 * @padata: object to be parallelized
95 * @cb_cpu: cpu the serialization callback function will run on,
96 * must be in the cpumask of padata.
97 *
98 * The parallelization callback function will run with BHs off.
99 * Note: Every object which is parallelized by padata_do_parallel
100 * must be seen by padata_do_serial.
101 */
102int padata_do_parallel(struct padata_instance *pinst,
103 struct padata_priv *padata, int cb_cpu)
104{
105 int target_cpu, err;
106 struct padata_queue *queue;
107 struct parallel_data *pd;
108
109 rcu_read_lock_bh();
110
111 pd = rcu_dereference(pinst->pd);
112
113 err = 0;
114 if (!(pinst->flags & PADATA_INIT))
115 goto out;
116
117 err = -EBUSY;
118 if ((pinst->flags & PADATA_RESET))
119 goto out;
120
121 if (atomic_read(&pd->refcnt) >= MAX_OBJ_NUM)
122 goto out;
123
124 err = -EINVAL;
125 if (!cpumask_test_cpu(cb_cpu, pd->cpumask))
126 goto out;
127
128 err = -EINPROGRESS;
129 atomic_inc(&pd->refcnt);
130 padata->pd = pd;
131 padata->cb_cpu = cb_cpu;
132
133 if (unlikely(atomic_read(&pd->seq_nr) == pd->max_seq_nr))
134 atomic_set(&pd->seq_nr, -1);
135
136 padata->seq_nr = atomic_inc_return(&pd->seq_nr);
137
138 target_cpu = padata_cpu_hash(padata);
139 queue = per_cpu_ptr(pd->queue, target_cpu);
140
141 spin_lock(&queue->parallel.lock);
142 list_add_tail(&padata->list, &queue->parallel.list);
143 spin_unlock(&queue->parallel.lock);
144
145 queue_work_on(target_cpu, pinst->wq, &queue->pwork);
146
147out:
148 rcu_read_unlock_bh();
149
150 return err;
151}
152EXPORT_SYMBOL(padata_do_parallel);
153
154static struct padata_priv *padata_get_next(struct parallel_data *pd)
155{
156 int cpu, num_cpus, empty, calc_seq_nr;
157 int seq_nr, next_nr, overrun, next_overrun;
158 struct padata_queue *queue, *next_queue;
159 struct padata_priv *padata;
160 struct padata_list *reorder;
161
162 empty = 0;
163 next_nr = -1;
164 next_overrun = 0;
165 next_queue = NULL;
166
167 num_cpus = cpumask_weight(pd->cpumask);
168
169 for_each_cpu(cpu, pd->cpumask) {
170 queue = per_cpu_ptr(pd->queue, cpu);
171 reorder = &queue->reorder;
172
173 /*
174 * Calculate the seq_nr of the object that should be
175 * next in this queue.
176 */
177 overrun = 0;
178 calc_seq_nr = (atomic_read(&queue->num_obj) * num_cpus)
179 + queue->cpu_index;
180
181 if (unlikely(calc_seq_nr > pd->max_seq_nr)) {
182 calc_seq_nr = calc_seq_nr - pd->max_seq_nr - 1;
183 overrun = 1;
184 }
185
186 if (!list_empty(&reorder->list)) {
187 padata = list_entry(reorder->list.next,
188 struct padata_priv, list);
189
190 seq_nr = padata->seq_nr;
191 BUG_ON(calc_seq_nr != seq_nr);
192 } else {
193 seq_nr = calc_seq_nr;
194 empty++;
195 }
196
197 if (next_nr < 0 || seq_nr < next_nr
198 || (next_overrun && !overrun)) {
199 next_nr = seq_nr;
200 next_overrun = overrun;
201 next_queue = queue;
202 }
203 }
204
205 padata = NULL;
206
207 if (empty == num_cpus)
208 goto out;
209
210 reorder = &next_queue->reorder;
211
212 if (!list_empty(&reorder->list)) {
213 padata = list_entry(reorder->list.next,
214 struct padata_priv, list);
215
216 if (unlikely(next_overrun)) {
217 for_each_cpu(cpu, pd->cpumask) {
218 queue = per_cpu_ptr(pd->queue, cpu);
219 atomic_set(&queue->num_obj, 0);
220 }
221 }
222
223 spin_lock(&reorder->lock);
224 list_del_init(&padata->list);
225 atomic_dec(&pd->reorder_objects);
226 spin_unlock(&reorder->lock);
227
228 atomic_inc(&next_queue->num_obj);
229
230 goto out;
231 }
232
233 if (next_nr % num_cpus == next_queue->cpu_index) {
234 padata = ERR_PTR(-ENODATA);
235 goto out;
236 }
237
238 padata = ERR_PTR(-EINPROGRESS);
239out:
240 return padata;
241}
242
243static void padata_reorder(struct parallel_data *pd)
244{
245 struct padata_priv *padata;
246 struct padata_queue *queue;
247 struct padata_instance *pinst = pd->pinst;
248
249try_again:
250 if (!spin_trylock_bh(&pd->lock))
251 goto out;
252
253 while (1) {
254 padata = padata_get_next(pd);
255
256 if (!padata || PTR_ERR(padata) == -EINPROGRESS)
257 break;
258
259 if (PTR_ERR(padata) == -ENODATA) {
260 spin_unlock_bh(&pd->lock);
261 goto out;
262 }
263
264 queue = per_cpu_ptr(pd->queue, padata->cb_cpu);
265
266 spin_lock(&queue->serial.lock);
267 list_add_tail(&padata->list, &queue->serial.list);
268 spin_unlock(&queue->serial.lock);
269
270 queue_work_on(padata->cb_cpu, pinst->wq, &queue->swork);
271 }
272
273 spin_unlock_bh(&pd->lock);
274
275 if (atomic_read(&pd->reorder_objects))
276 goto try_again;
277
278out:
279 return;
280}
281
282static void padata_serial_worker(struct work_struct *work)
283{
284 struct padata_queue *queue;
285 struct parallel_data *pd;
286 LIST_HEAD(local_list);
287
288 local_bh_disable();
289 queue = container_of(work, struct padata_queue, swork);
290 pd = queue->pd;
291
292 spin_lock(&queue->serial.lock);
293 list_replace_init(&queue->serial.list, &local_list);
294 spin_unlock(&queue->serial.lock);
295
296 while (!list_empty(&local_list)) {
297 struct padata_priv *padata;
298
299 padata = list_entry(local_list.next,
300 struct padata_priv, list);
301
302 list_del_init(&padata->list);
303
304 padata->serial(padata);
305 atomic_dec(&pd->refcnt);
306 }
307 local_bh_enable();
308}
309
310/*
311 * padata_do_serial - padata serialization function
312 *
313 * @padata: object to be serialized.
314 *
315 * padata_do_serial must be called for every parallelized object.
316 * The serialization callback function will run with BHs off.
317 */
318void padata_do_serial(struct padata_priv *padata)
319{
320 int cpu;
321 struct padata_queue *queue;
322 struct parallel_data *pd;
323
324 pd = padata->pd;
325
326 cpu = get_cpu();
327 queue = per_cpu_ptr(pd->queue, cpu);
328
329 spin_lock(&queue->reorder.lock);
330 atomic_inc(&pd->reorder_objects);
331 list_add_tail(&padata->list, &queue->reorder.list);
332 spin_unlock(&queue->reorder.lock);
333
334 put_cpu();
335
336 padata_reorder(pd);
337}
338EXPORT_SYMBOL(padata_do_serial);
339
340static struct parallel_data *padata_alloc_pd(struct padata_instance *pinst,
341 const struct cpumask *cpumask)
342{
343 int cpu, cpu_index, num_cpus;
344 struct padata_queue *queue;
345 struct parallel_data *pd;
346
347 cpu_index = 0;
348
349 pd = kzalloc(sizeof(struct parallel_data), GFP_KERNEL);
350 if (!pd)
351 goto err;
352
353 pd->queue = alloc_percpu(struct padata_queue);
354 if (!pd->queue)
355 goto err_free_pd;
356
357 if (!alloc_cpumask_var(&pd->cpumask, GFP_KERNEL))
358 goto err_free_queue;
359
360 for_each_possible_cpu(cpu) {
361 queue = per_cpu_ptr(pd->queue, cpu);
362
363 queue->pd = pd;
364
365 if (cpumask_test_cpu(cpu, cpumask)
366 && cpumask_test_cpu(cpu, cpu_active_mask)) {
367 queue->cpu_index = cpu_index;
368 cpu_index++;
369 } else
370 queue->cpu_index = -1;
371
372 INIT_LIST_HEAD(&queue->reorder.list);
373 INIT_LIST_HEAD(&queue->parallel.list);
374 INIT_LIST_HEAD(&queue->serial.list);
375 spin_lock_init(&queue->reorder.lock);
376 spin_lock_init(&queue->parallel.lock);
377 spin_lock_init(&queue->serial.lock);
378
379 INIT_WORK(&queue->pwork, padata_parallel_worker);
380 INIT_WORK(&queue->swork, padata_serial_worker);
381 atomic_set(&queue->num_obj, 0);
382 }
383
384 cpumask_and(pd->cpumask, cpumask, cpu_active_mask);
385
386 num_cpus = cpumask_weight(pd->cpumask);
387 pd->max_seq_nr = (MAX_SEQ_NR / num_cpus) * num_cpus - 1;
388
389 atomic_set(&pd->seq_nr, -1);
390 atomic_set(&pd->reorder_objects, 0);
391 atomic_set(&pd->refcnt, 0);
392 pd->pinst = pinst;
393 spin_lock_init(&pd->lock);
394
395 return pd;
396
397err_free_queue:
398 free_percpu(pd->queue);
399err_free_pd:
400 kfree(pd);
401err:
402 return NULL;
403}
404
405static void padata_free_pd(struct parallel_data *pd)
406{
407 free_cpumask_var(pd->cpumask);
408 free_percpu(pd->queue);
409 kfree(pd);
410}
411
412static void padata_replace(struct padata_instance *pinst,
413 struct parallel_data *pd_new)
414{
415 struct parallel_data *pd_old = pinst->pd;
416
417 pinst->flags |= PADATA_RESET;
418
419 rcu_assign_pointer(pinst->pd, pd_new);
420
421 synchronize_rcu();
422
423 while (atomic_read(&pd_old->refcnt) != 0)
424 yield();
425
426 flush_workqueue(pinst->wq);
427
428 padata_free_pd(pd_old);
429
430 pinst->flags &= ~PADATA_RESET;
431}
432
433/*
434 * padata_set_cpumask - set the cpumask that padata should use
435 *
436 * @pinst: padata instance
437 * @cpumask: the cpumask to use
438 */
439int padata_set_cpumask(struct padata_instance *pinst,
440 cpumask_var_t cpumask)
441{
442 struct parallel_data *pd;
443 int err = 0;
444
445 might_sleep();
446
447 mutex_lock(&pinst->lock);
448
449 pd = padata_alloc_pd(pinst, cpumask);
450 if (!pd) {
451 err = -ENOMEM;
452 goto out;
453 }
454
455 cpumask_copy(pinst->cpumask, cpumask);
456
457 padata_replace(pinst, pd);
458
459out:
460 mutex_unlock(&pinst->lock);
461
462 return err;
463}
464EXPORT_SYMBOL(padata_set_cpumask);
465
466static int __padata_add_cpu(struct padata_instance *pinst, int cpu)
467{
468 struct parallel_data *pd;
469
470 if (cpumask_test_cpu(cpu, cpu_active_mask)) {
471 pd = padata_alloc_pd(pinst, pinst->cpumask);
472 if (!pd)
473 return -ENOMEM;
474
475 padata_replace(pinst, pd);
476 }
477
478 return 0;
479}
480
481/*
482 * padata_add_cpu - add a cpu to the padata cpumask
483 *
484 * @pinst: padata instance
485 * @cpu: cpu to add
486 */
487int padata_add_cpu(struct padata_instance *pinst, int cpu)
488{
489 int err;
490
491 might_sleep();
492
493 mutex_lock(&pinst->lock);
494
495 cpumask_set_cpu(cpu, pinst->cpumask);
496 err = __padata_add_cpu(pinst, cpu);
497
498 mutex_unlock(&pinst->lock);
499
500 return err;
501}
502EXPORT_SYMBOL(padata_add_cpu);
503
504static int __padata_remove_cpu(struct padata_instance *pinst, int cpu)
505{
506 struct parallel_data *pd;
507
508 if (cpumask_test_cpu(cpu, cpu_online_mask)) {
509 pd = padata_alloc_pd(pinst, pinst->cpumask);
510 if (!pd)
511 return -ENOMEM;
512
513 padata_replace(pinst, pd);
514 }
515
516 return 0;
517}
518
519/*
520 * padata_remove_cpu - remove a cpu from the padata cpumask
521 *
522 * @pinst: padata instance
523 * @cpu: cpu to remove
524 */
525int padata_remove_cpu(struct padata_instance *pinst, int cpu)
526{
527 int err;
528
529 might_sleep();
530
531 mutex_lock(&pinst->lock);
532
533 cpumask_clear_cpu(cpu, pinst->cpumask);
534 err = __padata_remove_cpu(pinst, cpu);
535
536 mutex_unlock(&pinst->lock);
537
538 return err;
539}
540EXPORT_SYMBOL(padata_remove_cpu);
541
542/*
543 * padata_start - start the parallel processing
544 *
545 * @pinst: padata instance to start
546 */
547void padata_start(struct padata_instance *pinst)
548{
549 might_sleep();
550
551 mutex_lock(&pinst->lock);
552 pinst->flags |= PADATA_INIT;
553 mutex_unlock(&pinst->lock);
554}
555EXPORT_SYMBOL(padata_start);
556
557/*
558 * padata_stop - stop the parallel processing
559 *
560 * @pinst: padata instance to stop
561 */
562void padata_stop(struct padata_instance *pinst)
563{
564 might_sleep();
565
566 mutex_lock(&pinst->lock);
567 pinst->flags &= ~PADATA_INIT;
568 mutex_unlock(&pinst->lock);
569}
570EXPORT_SYMBOL(padata_stop);
571
572static int __cpuinit padata_cpu_callback(struct notifier_block *nfb,
573 unsigned long action, void *hcpu)
574{
575 int err;
576 struct padata_instance *pinst;
577 int cpu = (unsigned long)hcpu;
578
579 pinst = container_of(nfb, struct padata_instance, cpu_notifier);
580
581 switch (action) {
582 case CPU_ONLINE:
583 case CPU_ONLINE_FROZEN:
584 if (!cpumask_test_cpu(cpu, pinst->cpumask))
585 break;
586 mutex_lock(&pinst->lock);
587 err = __padata_add_cpu(pinst, cpu);
588 mutex_unlock(&pinst->lock);
589 if (err)
590 return NOTIFY_BAD;
591 break;
592
593 case CPU_DOWN_PREPARE:
594 case CPU_DOWN_PREPARE_FROZEN:
595 if (!cpumask_test_cpu(cpu, pinst->cpumask))
596 break;
597 mutex_lock(&pinst->lock);
598 err = __padata_remove_cpu(pinst, cpu);
599 mutex_unlock(&pinst->lock);
600 if (err)
601 return NOTIFY_BAD;
602 break;
603
604 case CPU_UP_CANCELED:
605 case CPU_UP_CANCELED_FROZEN:
606 if (!cpumask_test_cpu(cpu, pinst->cpumask))
607 break;
608 mutex_lock(&pinst->lock);
609 __padata_remove_cpu(pinst, cpu);
610 mutex_unlock(&pinst->lock);
611
612 case CPU_DOWN_FAILED:
613 case CPU_DOWN_FAILED_FROZEN:
614 if (!cpumask_test_cpu(cpu, pinst->cpumask))
615 break;
616 mutex_lock(&pinst->lock);
617 __padata_add_cpu(pinst, cpu);
618 mutex_unlock(&pinst->lock);
619 }
620
621 return NOTIFY_OK;
622}
623
624/*
625 * padata_alloc - allocate and initialize a padata instance
626 *
627 * @cpumask: cpumask that padata uses for parallelization
628 * @wq: workqueue to use for the allocated padata instance
629 */
630struct padata_instance *padata_alloc(const struct cpumask *cpumask,
631 struct workqueue_struct *wq)
632{
633 int err;
634 struct padata_instance *pinst;
635 struct parallel_data *pd;
636
637 pinst = kzalloc(sizeof(struct padata_instance), GFP_KERNEL);
638 if (!pinst)
639 goto err;
640
641 pd = padata_alloc_pd(pinst, cpumask);
642 if (!pd)
643 goto err_free_inst;
644
645 rcu_assign_pointer(pinst->pd, pd);
646
647 pinst->wq = wq;
648
649 cpumask_copy(pinst->cpumask, cpumask);
650
651 pinst->flags = 0;
652
653 pinst->cpu_notifier.notifier_call = padata_cpu_callback;
654 pinst->cpu_notifier.priority = 0;
655 err = register_hotcpu_notifier(&pinst->cpu_notifier);
656 if (err)
657 goto err_free_pd;
658
659 mutex_init(&pinst->lock);
660
661 return pinst;
662
663err_free_pd:
664 padata_free_pd(pd);
665err_free_inst:
666 kfree(pinst);
667err:
668 return NULL;
669}
670EXPORT_SYMBOL(padata_alloc);
671
672/*
673 * padata_free - free a padata instance
674 *
675 * @ padata_inst: padata instance to free
676 */
677void padata_free(struct padata_instance *pinst)
678{
679 padata_stop(pinst);
680
681 synchronize_rcu();
682
683 while (atomic_read(&pinst->pd->refcnt) != 0)
684 yield();
685
686 unregister_hotcpu_notifier(&pinst->cpu_notifier);
687 padata_free_pd(pinst->pd);
688 kfree(pinst);
689}
690EXPORT_SYMBOL(padata_free);
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 25c3ed594c54..d62e3cdab357 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -355,7 +355,7 @@ config SLUB_STATS
355config DEBUG_KMEMLEAK 355config DEBUG_KMEMLEAK
356 bool "Kernel memory leak detector" 356 bool "Kernel memory leak detector"
357 depends on DEBUG_KERNEL && EXPERIMENTAL && !MEMORY_HOTPLUG && \ 357 depends on DEBUG_KERNEL && EXPERIMENTAL && !MEMORY_HOTPLUG && \
358 (X86 || ARM || PPC || S390) 358 (X86 || ARM || PPC || S390 || SUPERH)
359 359
360 select DEBUG_FS if SYSFS 360 select DEBUG_FS if SYSFS
361 select STACKTRACE if STACKTRACE_SUPPORT 361 select STACKTRACE if STACKTRACE_SUPPORT
diff --git a/mm/Kconfig b/mm/Kconfig
index 17b8947aa7da..d34c2b971032 100644
--- a/mm/Kconfig
+++ b/mm/Kconfig
@@ -195,7 +195,7 @@ config BOUNCE
195config NR_QUICK 195config NR_QUICK
196 int 196 int
197 depends on QUICKLIST 197 depends on QUICKLIST
198 default "2" if SUPERH || AVR32 198 default "2" if AVR32
199 default "1" 199 default "1"
200 200
201config VIRT_TO_BUS 201config VIRT_TO_BUS
diff --git a/net/xfrm/xfrm_algo.c b/net/xfrm/xfrm_algo.c
index 743c0134a6a9..8b4d6e3246e5 100644
--- a/net/xfrm/xfrm_algo.c
+++ b/net/xfrm/xfrm_algo.c
@@ -125,6 +125,22 @@ static struct xfrm_algo_desc aead_list[] = {
125 .sadb_alg_maxbits = 256 125 .sadb_alg_maxbits = 256
126 } 126 }
127}, 127},
128{
129 .name = "rfc4543(gcm(aes))",
130
131 .uinfo = {
132 .aead = {
133 .icv_truncbits = 128,
134 }
135 },
136
137 .desc = {
138 .sadb_alg_id = SADB_X_EALG_NULL_AES_GMAC,
139 .sadb_alg_ivlen = 8,
140 .sadb_alg_minbits = 128,
141 .sadb_alg_maxbits = 256
142 }
143},
128}; 144};
129 145
130static struct xfrm_algo_desc aalg_list[] = { 146static struct xfrm_algo_desc aalg_list[] = {