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-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/bcm63xx/prom.c2
-rw-r--r--arch/mips/include/asm/bmips.h26
3 files changed, 28 insertions, 1 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7eaa4129dbcc..f2f6c1de2389 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1479,6 +1479,7 @@ config CPU_LOONGSON1
1479 select CPU_SUPPORTS_HIGHMEM 1479 select CPU_SUPPORTS_HIGHMEM
1480 1480
1481config CPU_BMIPS32_3300 1481config CPU_BMIPS32_3300
1482 select SMP_UP if SMP
1482 bool 1483 bool
1483 1484
1484config CPU_BMIPS4350 1485config CPU_BMIPS4350
diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c
index 9872ca34d0c4..f93f4fc00ca5 100644
--- a/arch/mips/bcm63xx/prom.c
+++ b/arch/mips/bcm63xx/prom.c
@@ -61,7 +61,7 @@ void __init prom_init(void)
61 61
62 if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) { 62 if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
63 /* set up SMP */ 63 /* set up SMP */
64 register_smp_ops(&bmips43xx_smp_ops); 64 register_bmips_smp_ops();
65 65
66 /* 66 /*
67 * BCM6328 might not have its second CPU enabled, while BCM3368 67 * BCM6328 might not have its second CPU enabled, while BCM3368
diff --git a/arch/mips/include/asm/bmips.h b/arch/mips/include/asm/bmips.h
index 880f6aadeaea..cbaccebf5065 100644
--- a/arch/mips/include/asm/bmips.h
+++ b/arch/mips/include/asm/bmips.h
@@ -46,9 +46,35 @@
46 46
47#include <linux/cpumask.h> 47#include <linux/cpumask.h>
48#include <asm/r4kcache.h> 48#include <asm/r4kcache.h>
49#include <asm/smp-ops.h>
49 50
50extern struct plat_smp_ops bmips43xx_smp_ops; 51extern struct plat_smp_ops bmips43xx_smp_ops;
51extern struct plat_smp_ops bmips5000_smp_ops; 52extern struct plat_smp_ops bmips5000_smp_ops;
53
54static inline int register_bmips_smp_ops(void)
55{
56#if IS_ENABLED(CONFIG_CPU_BMIPS) && IS_ENABLED(CONFIG_SMP)
57 switch (current_cpu_type()) {
58 case CPU_BMIPS32:
59 case CPU_BMIPS3300:
60 return register_up_smp_ops();
61 case CPU_BMIPS4350:
62 case CPU_BMIPS4380:
63 register_smp_ops(&bmips43xx_smp_ops);
64 break;
65 case CPU_BMIPS5000:
66 register_smp_ops(&bmips5000_smp_ops);
67 break;
68 default:
69 return -ENODEV;
70 }
71
72 return 0;
73#else
74 return -ENODEV;
75#endif
76}
77
52extern char bmips_reset_nmi_vec; 78extern char bmips_reset_nmi_vec;
53extern char bmips_reset_nmi_vec_end; 79extern char bmips_reset_nmi_vec_end;
54extern char bmips_smp_movevec; 80extern char bmips_smp_movevec;