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-rw-r--r--drivers/media/dvb/frontends/dib3000mc.c7
-rw-r--r--drivers/media/dvb/frontends/dib7000m.c19
2 files changed, 8 insertions, 18 deletions
diff --git a/drivers/media/dvb/frontends/dib3000mc.c b/drivers/media/dvb/frontends/dib3000mc.c
index 3561a777568c..5da66178006c 100644
--- a/drivers/media/dvb/frontends/dib3000mc.c
+++ b/drivers/media/dvb/frontends/dib3000mc.c
@@ -511,16 +511,11 @@ static int dib3000mc_autosearch_start(struct dvb_frontend *demod, struct dibx000
511 511
512 512
513 /* a channel for autosearch */ 513 /* a channel for autosearch */
514 reg = 0;
515 if (chan->nfft == -1 && chan->guard == -1) reg = 7;
516 if (chan->nfft == -1 && chan->guard != -1) reg = 2;
517 if (chan->nfft != -1 && chan->guard == -1) reg = 3;
518
519 fchan.nfft = 1; fchan.guard = 0; fchan.nqam = 2; 514 fchan.nfft = 1; fchan.guard = 0; fchan.nqam = 2;
520 fchan.vit_alpha = 1; fchan.vit_code_rate_hp = 2; fchan.vit_code_rate_lp = 2; 515 fchan.vit_alpha = 1; fchan.vit_code_rate_hp = 2; fchan.vit_code_rate_lp = 2;
521 fchan.vit_hrch = 0; fchan.vit_select_hp = 1; 516 fchan.vit_hrch = 0; fchan.vit_select_hp = 1;
522 517
523 dib3000mc_set_channel_cfg(state, &fchan, reg); 518 dib3000mc_set_channel_cfg(state, &fchan, 7);
524 519
525 reg = dib3000mc_read_word(state, 0); 520 reg = dib3000mc_read_word(state, 0);
526 dib3000mc_write_word(state, 0, reg | (1 << 8)); 521 dib3000mc_write_word(state, 0, reg | (1 << 8));
diff --git a/drivers/media/dvb/frontends/dib7000m.c b/drivers/media/dvb/frontends/dib7000m.c
index a85190319cf4..f5d40aa3d27f 100644
--- a/drivers/media/dvb/frontends/dib7000m.c
+++ b/drivers/media/dvb/frontends/dib7000m.c
@@ -637,15 +637,14 @@ static int dib7000m_autosearch_start(struct dvb_frontend *demod, struct dibx000_
637 struct dib7000m_state *state = demod->demodulator_priv; 637 struct dib7000m_state *state = demod->demodulator_priv;
638 struct dibx000_ofdm_channel auto_ch; 638 struct dibx000_ofdm_channel auto_ch;
639 int ret = 0; 639 int ret = 0;
640 u8 seq;
641 u32 value; 640 u32 value;
642 641
643 INIT_OFDM_CHANNEL(&auto_ch); 642 INIT_OFDM_CHANNEL(&auto_ch);
644 auto_ch.RF_kHz = ch->RF_kHz; 643 auto_ch.RF_kHz = ch->RF_kHz;
645 auto_ch.Bw = ch->Bw; 644 auto_ch.Bw = ch->Bw;
646 auto_ch.nqam = 2; 645 auto_ch.nqam = 2;
647 auto_ch.guard = ch->guard == GUARD_INTERVAL_AUTO ? 0 : ch->guard; 646 auto_ch.guard = 0;
648 auto_ch.nfft = ch->nfft == -1 ? 1 : ch->nfft; 647 auto_ch.nfft = 1;
649 auto_ch.vit_alpha = 1; 648 auto_ch.vit_alpha = 1;
650 auto_ch.vit_select_hp = 1; 649 auto_ch.vit_select_hp = 1;
651 auto_ch.vit_code_rate_hp = 2; 650 auto_ch.vit_code_rate_hp = 2;
@@ -653,20 +652,16 @@ static int dib7000m_autosearch_start(struct dvb_frontend *demod, struct dibx000_
653 auto_ch.vit_hrch = 0; 652 auto_ch.vit_hrch = 0;
654 auto_ch.intlv_native = 1; 653 auto_ch.intlv_native = 1;
655 654
656 seq = 0; 655 dib7000m_set_channel(state, &auto_ch, 7);
657 if (ch->nfft == -1 && ch->guard == GUARD_INTERVAL_AUTO) seq = 7;
658 if (ch->nfft == -1 && ch->guard != GUARD_INTERVAL_AUTO) seq = 2;
659 if (ch->nfft != -1 && ch->guard == GUARD_INTERVAL_AUTO) seq = 3;
660 dib7000m_set_channel(state, &auto_ch, seq);
661 656
662 // always use the setting for 8MHz here lock_time for 7,6 MHz are longer 657 // always use the setting for 8MHz here lock_time for 7,6 MHz are longer
663 value = 30 * state->cfg.bw[BANDWIDTH_8_MHZ].internal; 658 value = 30 * state->cfg.bw->internal;
664 ret |= dib7000m_write_word(state, 6, (u16) ((value >> 16) & 0xffff)); // lock0 wait time 659 ret |= dib7000m_write_word(state, 6, (u16) ((value >> 16) & 0xffff)); // lock0 wait time
665 ret |= dib7000m_write_word(state, 7, (u16) (value & 0xffff)); // lock0 wait time 660 ret |= dib7000m_write_word(state, 7, (u16) (value & 0xffff)); // lock0 wait time
666 value = 100 * state->cfg.bw[BANDWIDTH_8_MHZ].internal; 661 value = 100 * state->cfg.bw->internal;
667 ret |= dib7000m_write_word(state, 8, (u16) ((value >> 16) & 0xffff)); // lock1 wait time 662 ret |= dib7000m_write_word(state, 8, (u16) ((value >> 16) & 0xffff)); // lock1 wait time
668 ret |= dib7000m_write_word(state, 9, (u16) (value & 0xffff)); // lock1 wait time 663 ret |= dib7000m_write_word(state, 9, (u16) (value & 0xffff)); // lock1 wait time
669 value = 500 * state->cfg.bw[BANDWIDTH_8_MHZ].internal; 664 value = 500 * state->cfg.bw->internal;
670 ret |= dib7000m_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); // lock2 wait time 665 ret |= dib7000m_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); // lock2 wait time
671 ret |= dib7000m_write_word(state, 11, (u16) (value & 0xffff)); // lock2 wait time 666 ret |= dib7000m_write_word(state, 11, (u16) (value & 0xffff)); // lock2 wait time
672 667
@@ -919,7 +914,7 @@ static int dib7000m_get_frontend(struct dvb_frontend* fe,
919 914
920 fep->u.ofdm.bandwidth = state->current_bandwidth; 915 fep->u.ofdm.bandwidth = state->current_bandwidth;
921 916
922 switch ((tps >> 8) & 0x2) { 917 switch ((tps >> 8) & 0x3) {
923 case 0: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; break; 918 case 0: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; break;
924 case 1: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; break; 919 case 1: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; break;
925 /* case 2: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_4K; break; */ 920 /* case 2: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_4K; break; */