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-rw-r--r--arch/ppc/kernel/idle.c2
-rw-r--r--arch/ppc64/kernel/maple_time.c4
-rw-r--r--include/asm-powerpc/system.h2
-rw-r--r--include/asm-ppc/machdep.h2
-rw-r--r--include/asm-ppc/open_pic.h3
-rw-r--r--include/asm-ppc64/pci-bridge.h2
6 files changed, 8 insertions, 7 deletions
diff --git a/arch/ppc/kernel/idle.c b/arch/ppc/kernel/idle.c
index 0a12fbef7347..11e5b44713f7 100644
--- a/arch/ppc/kernel/idle.c
+++ b/arch/ppc/kernel/idle.c
@@ -75,7 +75,7 @@ void cpu_idle(void)
75/* 75/*
76 * Register the sysctl to set/clear powersave_nap. 76 * Register the sysctl to set/clear powersave_nap.
77 */ 77 */
78extern unsigned long powersave_nap; 78extern int powersave_nap;
79 79
80static ctl_table powersave_nap_ctl_table[]={ 80static ctl_table powersave_nap_ctl_table[]={
81 { 81 {
diff --git a/arch/ppc64/kernel/maple_time.c b/arch/ppc64/kernel/maple_time.c
index cf5186335900..445cb7470bf5 100644
--- a/arch/ppc64/kernel/maple_time.c
+++ b/arch/ppc64/kernel/maple_time.c
@@ -172,7 +172,7 @@ unsigned long __init maple_get_boot_time(void)
172 } 172 }
173 173
174 maple_get_rtc_time(&tm); 174 maple_get_rtc_time(&tm);
175 return mktime(time->tm_year+1900, time->tm_mon+1, time->tm_mday, 175 return mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday,
176 time->tm_hour, time->tm_min, time->tm_sec); 176 tm.tm_hour, tm.tm_min, tm.tm_sec);
177} 177}
178 178
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 6463453b61a3..d60c8c928922 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -180,6 +180,8 @@ extern struct task_struct *_switch(struct thread_struct *prev,
180extern unsigned int rtas_data; 180extern unsigned int rtas_data;
181extern int mem_init_done; /* set on boot once kmalloc can be called */ 181extern int mem_init_done; /* set on boot once kmalloc can be called */
182 182
183extern int powersave_nap; /* set if nap mode can be used in idle loop */
184
183/* 185/*
184 * Atomic exchange 186 * Atomic exchange
185 * 187 *
diff --git a/include/asm-ppc/machdep.h b/include/asm-ppc/machdep.h
index 1d4ab70a56f3..6c6d23abbe91 100644
--- a/include/asm-ppc/machdep.h
+++ b/include/asm-ppc/machdep.h
@@ -167,7 +167,7 @@ extern sys_ctrler_t sys_ctrler;
167 167
168#ifdef CONFIG_SMP 168#ifdef CONFIG_SMP
169struct smp_ops_t { 169struct smp_ops_t {
170 void (*message_pass)(int target, int msg, unsigned long data, int wait); 170 void (*message_pass)(int target, int msg);
171 int (*probe)(void); 171 int (*probe)(void);
172 void (*kick_cpu)(int nr); 172 void (*kick_cpu)(int nr);
173 void (*setup_cpu)(int nr); 173 void (*setup_cpu)(int nr);
diff --git a/include/asm-ppc/open_pic.h b/include/asm-ppc/open_pic.h
index 7848aa610c05..ec2f46629ca2 100644
--- a/include/asm-ppc/open_pic.h
+++ b/include/asm-ppc/open_pic.h
@@ -58,8 +58,7 @@ extern int openpic_get_irq(struct pt_regs *regs);
58extern void openpic_reset_processor_phys(u_int cpumask); 58extern void openpic_reset_processor_phys(u_int cpumask);
59extern void openpic_setup_ISU(int isu_num, unsigned long addr); 59extern void openpic_setup_ISU(int isu_num, unsigned long addr);
60extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask); 60extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask);
61extern void smp_openpic_message_pass(int target, int msg, unsigned long data, 61extern void smp_openpic_message_pass(int target, int msg);
62 int wait);
63extern void openpic_set_k2_cascade(int irq); 62extern void openpic_set_k2_cascade(int irq);
64extern void openpic_set_priority(u_int pri); 63extern void openpic_set_priority(u_int pri);
65extern u_int openpic_get_priority(void); 64extern u_int openpic_get_priority(void);
diff --git a/include/asm-ppc64/pci-bridge.h b/include/asm-ppc64/pci-bridge.h
index 1136cb6433bf..7d8ecb507a3d 100644
--- a/include/asm-ppc64/pci-bridge.h
+++ b/include/asm-ppc64/pci-bridge.h
@@ -36,7 +36,7 @@ struct pci_controller {
36 36
37 struct pci_ops *ops; 37 struct pci_ops *ops;
38 volatile unsigned int __iomem *cfg_addr; 38 volatile unsigned int __iomem *cfg_addr;
39 volatile unsigned char __iomem *cfg_data; 39 volatile void __iomem *cfg_data;
40 40
41 /* Currently, we limit ourselves to 1 IO range and 3 mem 41 /* Currently, we limit ourselves to 1 IO range and 3 mem
42 * ranges since the common pci_bus structure can't handle more 42 * ranges since the common pci_bus structure can't handle more