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-rw-r--r--include/asm-x86/desc.h169
-rw-r--r--include/asm-x86/desc_32.h130
-rw-r--r--include/asm-x86/desc_64.h104
-rw-r--r--include/asm-x86/desc_defs.h6
4 files changed, 183 insertions, 226 deletions
diff --git a/include/asm-x86/desc.h b/include/asm-x86/desc.h
index a6fdd7c7b6b2..e61a5a38caba 100644
--- a/include/asm-x86/desc.h
+++ b/include/asm-x86/desc.h
@@ -5,6 +5,7 @@
5#include <asm/desc_defs.h> 5#include <asm/desc_defs.h>
6#include <asm/ldt.h> 6#include <asm/ldt.h>
7#include <asm/mmu.h> 7#include <asm/mmu.h>
8#include <linux/smp.h>
8 9
9static inline void fill_ldt(struct desc_struct *desc, struct user_desc *info) 10static inline void fill_ldt(struct desc_struct *desc, struct user_desc *info)
10{ 11{
@@ -27,6 +28,174 @@ static inline void fill_ldt(struct desc_struct *desc, struct user_desc *info)
27extern struct desc_ptr idt_descr; 28extern struct desc_ptr idt_descr;
28extern gate_desc idt_table[]; 29extern gate_desc idt_table[];
29 30
31#ifdef CONFIG_X86_64
32extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
33extern struct desc_ptr cpu_gdt_descr[];
34/* the cpu gdt accessor */
35#define get_cpu_gdt_table(x) ((struct desc_struct *)cpu_gdt_descr[x].address)
36#else
37struct gdt_page {
38 struct desc_struct gdt[GDT_ENTRIES];
39} __attribute__((aligned(PAGE_SIZE)));
40DECLARE_PER_CPU(struct gdt_page, gdt_page);
41
42static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
43{
44 return per_cpu(gdt_page, cpu).gdt;
45}
46#endif
47
48#ifdef CONFIG_PARAVIRT
49#include <asm/paravirt.h>
50#else
51#define load_TR_desc() native_load_tr_desc()
52#define load_gdt(dtr) native_load_gdt(dtr)
53#define load_idt(dtr) native_load_idt(dtr)
54#define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr))
55#define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt))
56
57#define store_gdt(dtr) native_store_gdt(dtr)
58#define store_idt(dtr) native_store_idt(dtr)
59#define store_tr(tr) (tr = native_store_tr())
60#define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt))
61
62#define load_TLS(t, cpu) native_load_tls(t, cpu)
63#define set_ldt native_set_ldt
64
65#define write_ldt_entry(dt, entry, desc) \
66 native_write_ldt_entry(dt, entry, desc)
67#define write_gdt_entry(dt, entry, desc, type) \
68 native_write_gdt_entry(dt, entry, desc, type)
69#define write_idt_entry(dt, entry, g) native_write_idt_entry(dt, entry, g)
70#endif
71
72static inline void native_write_idt_entry(gate_desc *idt, int entry,
73 const gate_desc *gate)
74{
75 memcpy(&idt[entry], gate, sizeof(*gate));
76}
77
78static inline void native_write_ldt_entry(struct desc_struct *ldt, int entry,
79 const void *desc)
80{
81 memcpy(&ldt[entry], desc, 8);
82}
83
84static inline void native_write_gdt_entry(struct desc_struct *gdt, int entry,
85 const void *desc, int type)
86{
87 unsigned int size;
88 switch (type) {
89 case DESC_TSS:
90 size = sizeof(tss_desc);
91 break;
92 case DESC_LDT:
93 size = sizeof(ldt_desc);
94 break;
95 default:
96 size = sizeof(struct desc_struct);
97 break;
98 }
99 memcpy(&gdt[entry], desc, size);
100}
101
102static inline void set_tssldt_descriptor(struct ldttss_desc64 *d,
103 unsigned long tss, unsigned type,
104 unsigned size)
105{
106 memset(d, 0, sizeof(*d));
107 d->limit0 = size & 0xFFFF;
108 d->base0 = PTR_LOW(tss);
109 d->base1 = PTR_MIDDLE(tss) & 0xFF;
110 d->type = type;
111 d->p = 1;
112 d->limit1 = (size >> 16) & 0xF;
113 d->base2 = (PTR_MIDDLE(tss) >> 8) & 0xFF;
114 d->base3 = PTR_HIGH(tss);
115}
116
117static inline void pack_descriptor(struct desc_struct *desc, unsigned long base,
118 unsigned long limit, unsigned char type,
119 unsigned char flags)
120{
121 desc->a = ((base & 0xffff) << 16) | (limit & 0xffff);
122 desc->b = (base & 0xff000000) | ((base & 0xff0000) >> 16) |
123 (limit & 0x000f0000) | ((type & 0xff) << 8) |
124 ((flags & 0xf) << 20);
125 desc->p = 1;
126}
127
128static inline void pack_ldt(ldt_desc *ldt, unsigned long addr,
129 unsigned size)
130{
131
132#ifdef CONFIG_X86_64
133 set_tssldt_descriptor(ldt,
134 addr, DESC_LDT, size);
135#else
136 pack_descriptor(ldt, (unsigned long)addr,
137 size,
138 0x80 | DESC_LDT, 0);
139#endif
140}
141
142static inline void native_set_ldt(const void *addr, unsigned int entries)
143{
144 if (likely(entries == 0))
145 __asm__ __volatile__("lldt %w0"::"q" (0));
146 else {
147 unsigned cpu = smp_processor_id();
148 ldt_desc ldt;
149
150 pack_ldt(&ldt, (unsigned long)addr,
151 entries * sizeof(ldt) - 1);
152 write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT,
153 &ldt, DESC_LDT);
154 __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
155 }
156}
157
158static inline void native_load_tr_desc(void)
159{
160 asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
161}
162
163static inline void native_load_gdt(const struct desc_ptr *dtr)
164{
165 asm volatile("lgdt %0"::"m" (*dtr));
166}
167
168static inline void native_load_idt(const struct desc_ptr *dtr)
169{
170 asm volatile("lidt %0"::"m" (*dtr));
171}
172
173static inline void native_store_gdt(struct desc_ptr *dtr)
174{
175 asm volatile("sgdt %0":"=m" (*dtr));
176}
177
178static inline void native_store_idt(struct desc_ptr *dtr)
179{
180 asm volatile("sidt %0":"=m" (*dtr));
181}
182
183static inline unsigned long native_store_tr(void)
184{
185 unsigned long tr;
186 asm volatile("str %0":"=r" (tr));
187 return tr;
188}
189
190static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
191{
192 unsigned int i;
193 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
194
195 for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++)
196 gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];
197}
198
30#ifdef CONFIG_X86_32 199#ifdef CONFIG_X86_32
31# include "desc_32.h" 200# include "desc_32.h"
32#else 201#else
diff --git a/include/asm-x86/desc_32.h b/include/asm-x86/desc_32.h
index 8450c2a99c3a..4bf20b7dd741 100644
--- a/include/asm-x86/desc_32.h
+++ b/include/asm-x86/desc_32.h
@@ -8,31 +8,10 @@
8#ifndef __ASSEMBLY__ 8#ifndef __ASSEMBLY__
9 9
10#include <linux/preempt.h> 10#include <linux/preempt.h>
11#include <linux/smp.h>
12#include <linux/percpu.h> 11#include <linux/percpu.h>
13 12
14struct gdt_page
15{
16 struct desc_struct gdt[GDT_ENTRIES];
17} __attribute__((aligned(PAGE_SIZE)));
18DECLARE_PER_CPU(struct gdt_page, gdt_page);
19
20static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
21{
22 return per_cpu(gdt_page, cpu).gdt;
23}
24
25extern void set_intr_gate(unsigned int irq, void * addr); 13extern void set_intr_gate(unsigned int irq, void * addr);
26 14
27static inline void pack_descriptor(struct desc_struct *desc,
28 unsigned long base, unsigned long limit, unsigned char type, unsigned char flags)
29{
30 desc->a = ((base & 0xffff) << 16) | (limit & 0xffff);
31 desc->b = (base & 0xff000000) | ((base & 0xff0000) >> 16) |
32 (limit & 0x000f0000) | ((type & 0xff) << 8) | ((flags & 0xf) << 20);
33 desc->p = 1;
34}
35
36static inline void pack_gate(gate_desc *gate, 15static inline void pack_gate(gate_desc *gate,
37 unsigned long base, unsigned short seg, unsigned char type, unsigned char flags) 16 unsigned long base, unsigned short seg, unsigned char type, unsigned char flags)
38{ 17{
@@ -40,115 +19,6 @@ static inline void pack_gate(gate_desc *gate,
40 gate->b = (base & 0xffff0000) | ((type & 0xff) << 8) | (flags & 0xff); 19 gate->b = (base & 0xffff0000) | ((type & 0xff) << 8) | (flags & 0xff);
41} 20}
42 21
43#ifdef CONFIG_PARAVIRT
44#include <asm/paravirt.h>
45#else
46#define load_TR_desc() native_load_tr_desc()
47#define load_gdt(dtr) native_load_gdt(dtr)
48#define load_idt(dtr) native_load_idt(dtr)
49#define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr))
50#define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt))
51
52#define store_gdt(dtr) native_store_gdt(dtr)
53#define store_idt(dtr) native_store_idt(dtr)
54#define store_tr(tr) (tr = native_store_tr())
55#define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt))
56
57#define load_TLS(t, cpu) native_load_tls(t, cpu)
58#define set_ldt native_set_ldt
59
60#define write_ldt_entry(dt, entry, desc) \
61 native_write_ldt_entry(dt, entry, desc)
62#define write_gdt_entry(dt, entry, desc, type) \
63 native_write_gdt_entry(dt, entry, desc, type)
64#define write_idt_entry(dt, entry, g) native_write_idt_entry(dt, entry, g)
65#endif
66
67static inline void native_write_ldt_entry(struct desc_struct *ldt, int entry,
68 const void *desc)
69{
70 memcpy(&ldt[entry], desc, sizeof(struct desc_struct));
71}
72
73static inline void native_write_idt_entry(gate_desc *idt, int entry,
74 const gate_desc *gate)
75{
76 memcpy(&idt[entry], gate, sizeof(*gate));
77}
78
79static inline void native_write_gdt_entry(struct desc_struct *gdt, int entry,
80 const void *desc, int type)
81{
82 memcpy(&gdt[entry], desc, sizeof(struct desc_struct));
83}
84
85static inline void write_dt_entry(struct desc_struct *dt,
86 int entry, u32 entry_low, u32 entry_high)
87{
88 dt[entry].a = entry_low;
89 dt[entry].b = entry_high;
90}
91
92
93static inline void native_set_ldt(const void *addr, unsigned int entries)
94{
95 if (likely(entries == 0))
96 __asm__ __volatile__("lldt %w0"::"q" (0));
97 else {
98 unsigned cpu = smp_processor_id();
99 ldt_desc ldt;
100
101 pack_descriptor(&ldt, (unsigned long)addr,
102 entries * sizeof(struct desc_struct) - 1,
103 DESC_LDT, 0);
104 write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT,
105 &ldt, DESC_LDT);
106 __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
107 }
108}
109
110
111static inline void native_load_tr_desc(void)
112{
113 asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
114}
115
116static inline void native_load_gdt(const struct desc_ptr *dtr)
117{
118 asm volatile("lgdt %0"::"m" (*dtr));
119}
120
121static inline void native_load_idt(const struct desc_ptr *dtr)
122{
123 asm volatile("lidt %0"::"m" (*dtr));
124}
125
126static inline void native_store_gdt(struct desc_ptr *dtr)
127{
128 asm ("sgdt %0":"=m" (*dtr));
129}
130
131static inline void native_store_idt(struct desc_ptr *dtr)
132{
133 asm ("sidt %0":"=m" (*dtr));
134}
135
136static inline unsigned long native_store_tr(void)
137{
138 unsigned long tr;
139 asm ("str %0":"=r" (tr));
140 return tr;
141}
142
143static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
144{
145 unsigned int i;
146 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
147
148 for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++)
149 gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];
150}
151
152static inline void _set_gate(int gate, unsigned int type, void *addr, unsigned short seg) 22static inline void _set_gate(int gate, unsigned int type, void *addr, unsigned short seg)
153{ 23{
154 gate_desc g; 24 gate_desc g;
diff --git a/include/asm-x86/desc_64.h b/include/asm-x86/desc_64.h
index a7a6c301c6bc..b0290c45319c 100644
--- a/include/asm-x86/desc_64.h
+++ b/include/asm-x86/desc_64.h
@@ -8,47 +8,10 @@
8#ifndef __ASSEMBLY__ 8#ifndef __ASSEMBLY__
9 9
10#include <linux/string.h> 10#include <linux/string.h>
11#include <linux/smp.h>
12 11
13#include <asm/segment.h> 12#include <asm/segment.h>
14 13
15extern struct desc_struct cpu_gdt_table[GDT_ENTRIES]; 14static inline void _set_gate(int gate, unsigned type, unsigned long func,
16
17#define load_TR_desc() asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8))
18#define load_LDT_desc() asm volatile("lldt %w0"::"r" (GDT_ENTRY_LDT*8))
19
20static inline unsigned long __store_tr(void)
21{
22 unsigned long tr;
23
24 asm volatile ("str %w0":"=r" (tr));
25 return tr;
26}
27
28#define store_tr(tr) (tr) = __store_tr()
29
30extern struct desc_ptr cpu_gdt_descr[];
31
32static inline void write_ldt_entry(struct desc_struct *ldt,
33 int entry, void *ptr)
34{
35 memcpy(&ldt[entry], ptr, 8);
36}
37
38/* the cpu gdt accessor */
39#define get_cpu_gdt_table(x) ((struct desc_struct *)cpu_gdt_descr[x].address)
40
41static inline void load_gdt(const struct desc_ptr *ptr)
42{
43 asm volatile("lgdt %w0"::"m" (*ptr));
44}
45
46static inline void store_gdt(struct desc_ptr *ptr)
47{
48 asm("sgdt %w0":"=m" (*ptr));
49}
50
51static inline void _set_gate(void *adr, unsigned type, unsigned long func,
52 unsigned dpl, unsigned ist) 15 unsigned dpl, unsigned ist)
53{ 16{
54 gate_desc s; 17 gate_desc s;
@@ -67,61 +30,37 @@ static inline void _set_gate(void *adr, unsigned type, unsigned long func,
67 * does not need to be atomic because it is only done once at 30 * does not need to be atomic because it is only done once at
68 * setup time 31 * setup time
69 */ 32 */
70 memcpy(adr, &s, 16); 33 write_idt_entry(idt_table, gate, &s);
71} 34}
72 35
73static inline void set_intr_gate(int nr, void *func) 36static inline void set_intr_gate(int nr, void *func)
74{ 37{
75 BUG_ON((unsigned)nr > 0xFF); 38 BUG_ON((unsigned)nr > 0xFF);
76 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, 0); 39 _set_gate(nr, GATE_INTERRUPT, (unsigned long) func, 0, 0);
77} 40}
78 41
79static inline void set_intr_gate_ist(int nr, void *func, unsigned ist) 42static inline void set_intr_gate_ist(int nr, void *func, unsigned ist)
80{ 43{
81 BUG_ON((unsigned)nr > 0xFF); 44 BUG_ON((unsigned)nr > 0xFF);
82 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, ist); 45 _set_gate(nr, GATE_INTERRUPT, (unsigned long) func, 0, ist);
83} 46}
84 47
85static inline void set_system_gate(int nr, void *func) 48static inline void set_system_gate(int nr, void *func)
86{ 49{
87 BUG_ON((unsigned)nr > 0xFF); 50 BUG_ON((unsigned)nr > 0xFF);
88 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 3, 0); 51 _set_gate(nr, GATE_INTERRUPT, (unsigned long) func, 3, 0);
89} 52}
90 53
91static inline void set_system_gate_ist(int nr, void *func, unsigned ist) 54static inline void set_system_gate_ist(int nr, void *func, unsigned ist)
92{ 55{
93 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 3, ist); 56 _set_gate(nr, GATE_INTERRUPT, (unsigned long) func, 3, ist);
94}
95
96static inline void load_idt(const struct desc_ptr *ptr)
97{
98 asm volatile("lidt %w0"::"m" (*ptr));
99}
100
101static inline void store_idt(struct desc_ptr *dtr)
102{
103 asm("sidt %w0":"=m" (*dtr));
104}
105
106static inline void set_tssldt_descriptor(void *ptr, unsigned long tss,
107 unsigned type, unsigned size)
108{
109 struct ldttss_desc64 d;
110
111 memset(&d, 0, sizeof(d));
112 d.limit0 = size & 0xFFFF;
113 d.base0 = PTR_LOW(tss);
114 d.base1 = PTR_MIDDLE(tss) & 0xFF;
115 d.type = type;
116 d.p = 1;
117 d.limit1 = (size >> 16) & 0xF;
118 d.base2 = (PTR_MIDDLE(tss) >> 8) & 0xFF;
119 d.base3 = PTR_HIGH(tss);
120 memcpy(ptr, &d, 16);
121} 57}
122 58
123static inline void set_tss_desc(unsigned cpu, void *addr) 59static inline void set_tss_desc(unsigned cpu, void *addr)
124{ 60{
61 struct desc_struct *d = get_cpu_gdt_table(cpu);
62 tss_desc tss;
63
125 /* 64 /*
126 * sizeof(unsigned long) coming from an extra "long" at the end 65 * sizeof(unsigned long) coming from an extra "long" at the end
127 * of the iobitmap. See tss_struct definition in processor.h 66 * of the iobitmap. See tss_struct definition in processor.h
@@ -129,31 +68,10 @@ static inline void set_tss_desc(unsigned cpu, void *addr)
129 * -1? seg base+limit should be pointing to the address of the 68 * -1? seg base+limit should be pointing to the address of the
130 * last valid byte 69 * last valid byte
131 */ 70 */
132 set_tssldt_descriptor(&get_cpu_gdt_table(cpu)[GDT_ENTRY_TSS], 71 set_tssldt_descriptor(&tss,
133 (unsigned long)addr, DESC_TSS, 72 (unsigned long)addr, DESC_TSS,
134 IO_BITMAP_OFFSET + IO_BITMAP_BYTES + sizeof(unsigned long) - 1); 73 IO_BITMAP_OFFSET + IO_BITMAP_BYTES + sizeof(unsigned long) - 1);
135} 74 write_gdt_entry(d, GDT_ENTRY_TSS, &tss, DESC_TSS);
136
137static inline void set_ldt(void *addr, int entries)
138{
139 if (likely(entries == 0))
140 __asm__ __volatile__("lldt %w0"::"q" (0));
141 else {
142 unsigned cpu = smp_processor_id();
143
144 set_tssldt_descriptor(&get_cpu_gdt_table(cpu)[GDT_ENTRY_LDT],
145 (unsigned long)addr, DESC_LDT, entries * 8 - 1);
146 __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
147 }
148}
149
150static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
151{
152 unsigned int i;
153 struct desc_struct *gdt = (get_cpu_gdt_table(cpu) + GDT_ENTRY_TLS_MIN);
154
155 for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++)
156 gdt[i] = t->tls_array[i];
157} 75}
158 76
159#endif /* !__ASSEMBLY__ */ 77#endif /* !__ASSEMBLY__ */
diff --git a/include/asm-x86/desc_defs.h b/include/asm-x86/desc_defs.h
index 79fe59fc50ec..ebb64fe3a450 100644
--- a/include/asm-x86/desc_defs.h
+++ b/include/asm-x86/desc_defs.h
@@ -48,9 +48,9 @@ struct gate_struct64 {
48 u32 zero1; 48 u32 zero1;
49} __attribute__((packed)); 49} __attribute__((packed));
50 50
51#define PTR_LOW(x) ((unsigned long)(x) & 0xFFFF) 51#define PTR_LOW(x) ((unsigned long long)(x) & 0xFFFF)
52#define PTR_MIDDLE(x) (((unsigned long)(x) >> 16) & 0xFFFF) 52#define PTR_MIDDLE(x) (((unsigned long long)(x) >> 16) & 0xFFFF)
53#define PTR_HIGH(x) ((unsigned long)(x) >> 32) 53#define PTR_HIGH(x) ((unsigned long long)(x) >> 32)
54 54
55enum { 55enum {
56 DESC_TSS = 0x9, 56 DESC_TSS = 0x9,
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-14 16:40:55 -0500