diff options
-rw-r--r-- | arch/arm/boot/dts/dove.dtsi | 42 | ||||
-rw-r--r-- | arch/arm/mach-dove/common.c | 10 |
2 files changed, 42 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index b524ee377f83..b1cfa52ae223 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi | |||
@@ -174,5 +174,47 @@ | |||
174 | clocks = <&gate_clk 15>; | 174 | clocks = <&gate_clk 15>; |
175 | status = "okay"; | 175 | status = "okay"; |
176 | }; | 176 | }; |
177 | |||
178 | xor0: dma-engine@60800 { | ||
179 | compatible = "marvell,orion-xor"; | ||
180 | reg = <0x60800 0x100 | ||
181 | 0x60a00 0x100>; | ||
182 | clocks = <&gate_clk 23>; | ||
183 | status = "okay"; | ||
184 | |||
185 | channel0 { | ||
186 | interrupts = <39>; | ||
187 | dmacap,memcpy; | ||
188 | dmacap,xor; | ||
189 | }; | ||
190 | |||
191 | channel1 { | ||
192 | interrupts = <40>; | ||
193 | dmacap,memset; | ||
194 | dmacap,memcpy; | ||
195 | dmacap,xor; | ||
196 | }; | ||
197 | }; | ||
198 | |||
199 | xor1: dma-engine@60900 { | ||
200 | compatible = "marvell,orion-xor"; | ||
201 | reg = <0x60900 0x100 | ||
202 | 0x60b00 0x100>; | ||
203 | clocks = <&gate_clk 24>; | ||
204 | status = "okay"; | ||
205 | |||
206 | channel0 { | ||
207 | interrupts = <42>; | ||
208 | dmacap,memcpy; | ||
209 | dmacap,xor; | ||
210 | }; | ||
211 | |||
212 | channel1 { | ||
213 | interrupts = <43>; | ||
214 | dmacap,memset; | ||
215 | dmacap,memcpy; | ||
216 | dmacap,xor; | ||
217 | }; | ||
218 | }; | ||
177 | }; | 219 | }; |
178 | }; | 220 | }; |
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index f4ac5b06014b..89f4f993cd03 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c | |||
@@ -409,14 +409,6 @@ static void __init dove_legacy_clk_init(void) | |||
409 | clkspec.args[0] = CLOCK_GATING_BIT_PCIE1; | 409 | clkspec.args[0] = CLOCK_GATING_BIT_PCIE1; |
410 | orion_clkdev_add("1", "pcie", | 410 | orion_clkdev_add("1", "pcie", |
411 | of_clk_get_from_provider(&clkspec)); | 411 | of_clk_get_from_provider(&clkspec)); |
412 | |||
413 | clkspec.args[0] = CLOCK_GATING_BIT_XOR0; | ||
414 | orion_clkdev_add(NULL, MV_XOR_NAME ".0", | ||
415 | of_clk_get_from_provider(&clkspec)); | ||
416 | |||
417 | clkspec.args[0] = CLOCK_GATING_BIT_XOR1; | ||
418 | orion_clkdev_add(NULL, MV_XOR_NAME ".1", | ||
419 | of_clk_get_from_provider(&clkspec)); | ||
420 | } | 412 | } |
421 | 413 | ||
422 | static void __init dove_of_clk_init(void) | 414 | static void __init dove_of_clk_init(void) |
@@ -444,8 +436,6 @@ static void __init dove_dt_init(void) | |||
444 | 436 | ||
445 | /* Internal devices not ported to DT yet */ | 437 | /* Internal devices not ported to DT yet */ |
446 | dove_rtc_init(); | 438 | dove_rtc_init(); |
447 | dove_xor0_init(); | ||
448 | dove_xor1_init(); | ||
449 | 439 | ||
450 | dove_ge00_init(&dove_dt_ge00_data); | 440 | dove_ge00_init(&dove_dt_ge00_data); |
451 | dove_ehci0_init(); | 441 | dove_ehci0_init(); |