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-rw-r--r--arch/mips/include/asm/mipsregs.h32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index a706d429a741..a3f469ee7ec6 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -341,10 +341,10 @@
341 * 341 *
342 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation. 342 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
343 */ 343 */
344#define CAUSEB_EXCCODE 2 344#define CAUSEB_EXCCODE 2
345#define CAUSEF_EXCCODE (_ULCAST_(31) << 2) 345#define CAUSEF_EXCCODE (_ULCAST_(31) << 2)
346#define CAUSEB_IP 8 346#define CAUSEB_IP 8
347#define CAUSEF_IP (_ULCAST_(255) << 8) 347#define CAUSEF_IP (_ULCAST_(255) << 8)
348#define CAUSEB_IP0 8 348#define CAUSEB_IP0 8
349#define CAUSEF_IP0 (_ULCAST_(1) << 8) 349#define CAUSEF_IP0 (_ULCAST_(1) << 8)
350#define CAUSEB_IP1 9 350#define CAUSEB_IP1 9
@@ -361,18 +361,18 @@
361#define CAUSEF_IP6 (_ULCAST_(1) << 14) 361#define CAUSEF_IP6 (_ULCAST_(1) << 14)
362#define CAUSEB_IP7 15 362#define CAUSEB_IP7 15
363#define CAUSEF_IP7 (_ULCAST_(1) << 15) 363#define CAUSEF_IP7 (_ULCAST_(1) << 15)
364#define CAUSEB_FDCI 21 364#define CAUSEB_FDCI 21
365#define CAUSEF_FDCI (_ULCAST_(1) << 21) 365#define CAUSEF_FDCI (_ULCAST_(1) << 21)
366#define CAUSEB_IV 23 366#define CAUSEB_IV 23
367#define CAUSEF_IV (_ULCAST_(1) << 23) 367#define CAUSEF_IV (_ULCAST_(1) << 23)
368#define CAUSEB_PCI 26 368#define CAUSEB_PCI 26
369#define CAUSEF_PCI (_ULCAST_(1) << 26) 369#define CAUSEF_PCI (_ULCAST_(1) << 26)
370#define CAUSEB_CE 28 370#define CAUSEB_CE 28
371#define CAUSEF_CE (_ULCAST_(3) << 28) 371#define CAUSEF_CE (_ULCAST_(3) << 28)
372#define CAUSEB_TI 30 372#define CAUSEB_TI 30
373#define CAUSEF_TI (_ULCAST_(1) << 30) 373#define CAUSEF_TI (_ULCAST_(1) << 30)
374#define CAUSEB_BD 31 374#define CAUSEB_BD 31
375#define CAUSEF_BD (_ULCAST_(1) << 31) 375#define CAUSEF_BD (_ULCAST_(1) << 31)
376 376
377/* 377/*
378 * Bits in the coprocessor 0 config register. 378 * Bits in the coprocessor 0 config register.