diff options
-rw-r--r-- | drivers/infiniband/hw/qib/qib.h | 1 | ||||
-rw-r--r-- | drivers/infiniband/hw/qib/qib_diag.c | 19 | ||||
-rw-r--r-- | drivers/infiniband/hw/qib/qib_iba7322.c | 18 | ||||
-rw-r--r-- | drivers/infiniband/hw/qib/qib_init.c | 6 | ||||
-rw-r--r-- | drivers/infiniband/hw/qib/qib_pcie.c | 2 | ||||
-rw-r--r-- | drivers/infiniband/hw/qib/qib_tx.c | 6 |
6 files changed, 46 insertions, 6 deletions
diff --git a/drivers/infiniband/hw/qib/qib.h b/drivers/infiniband/hw/qib/qib.h index 32d9208efcff..3593983df7ba 100644 --- a/drivers/infiniband/hw/qib/qib.h +++ b/drivers/infiniband/hw/qib/qib.h | |||
@@ -686,6 +686,7 @@ struct qib_devdata { | |||
686 | void __iomem *piobase; | 686 | void __iomem *piobase; |
687 | /* mem-mapped pointer to base of user chip regs (if using WC PAT) */ | 687 | /* mem-mapped pointer to base of user chip regs (if using WC PAT) */ |
688 | u64 __iomem *userbase; | 688 | u64 __iomem *userbase; |
689 | void __iomem *piovl15base; /* base of VL15 buffers, if not WC */ | ||
689 | /* | 690 | /* |
690 | * points to area where PIOavail registers will be DMA'ed. | 691 | * points to area where PIOavail registers will be DMA'ed. |
691 | * Has to be on a page of it's own, because the page will be | 692 | * Has to be on a page of it's own, because the page will be |
diff --git a/drivers/infiniband/hw/qib/qib_diag.c b/drivers/infiniband/hw/qib/qib_diag.c index ca98dd523752..05dcf0d9a7d3 100644 --- a/drivers/infiniband/hw/qib/qib_diag.c +++ b/drivers/infiniband/hw/qib/qib_diag.c | |||
@@ -233,6 +233,7 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset, | |||
233 | u32 __iomem *krb32 = (u32 __iomem *)dd->kregbase; | 233 | u32 __iomem *krb32 = (u32 __iomem *)dd->kregbase; |
234 | u32 __iomem *map = NULL; | 234 | u32 __iomem *map = NULL; |
235 | u32 cnt = 0; | 235 | u32 cnt = 0; |
236 | u32 tot4k, offs4k; | ||
236 | 237 | ||
237 | /* First, simplest case, offset is within the first map. */ | 238 | /* First, simplest case, offset is within the first map. */ |
238 | kreglen = (dd->kregend - dd->kregbase) * sizeof(u64); | 239 | kreglen = (dd->kregend - dd->kregbase) * sizeof(u64); |
@@ -250,7 +251,8 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset, | |||
250 | if (dd->userbase) { | 251 | if (dd->userbase) { |
251 | /* If user regs mapped, they are after send, so set limit. */ | 252 | /* If user regs mapped, they are after send, so set limit. */ |
252 | u32 ulim = (dd->cfgctxts * dd->ureg_align) + dd->uregbase; | 253 | u32 ulim = (dd->cfgctxts * dd->ureg_align) + dd->uregbase; |
253 | snd_lim = dd->uregbase; | 254 | if (!dd->piovl15base) |
255 | snd_lim = dd->uregbase; | ||
254 | krb32 = (u32 __iomem *)dd->userbase; | 256 | krb32 = (u32 __iomem *)dd->userbase; |
255 | if (offset >= dd->uregbase && offset < ulim) { | 257 | if (offset >= dd->uregbase && offset < ulim) { |
256 | map = krb32 + (offset - dd->uregbase) / sizeof(u32); | 258 | map = krb32 + (offset - dd->uregbase) / sizeof(u32); |
@@ -277,14 +279,14 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset, | |||
277 | /* If 4k buffers exist, account for them by bumping | 279 | /* If 4k buffers exist, account for them by bumping |
278 | * appropriate limit. | 280 | * appropriate limit. |
279 | */ | 281 | */ |
282 | tot4k = dd->piobcnt4k * dd->align4k; | ||
283 | offs4k = dd->piobufbase >> 32; | ||
280 | if (dd->piobcnt4k) { | 284 | if (dd->piobcnt4k) { |
281 | u32 tot4k = dd->piobcnt4k * dd->align4k; | ||
282 | u32 offs4k = dd->piobufbase >> 32; | ||
283 | if (snd_bottom > offs4k) | 285 | if (snd_bottom > offs4k) |
284 | snd_bottom = offs4k; | 286 | snd_bottom = offs4k; |
285 | else { | 287 | else { |
286 | /* 4k above 2k. Bump snd_lim, if needed*/ | 288 | /* 4k above 2k. Bump snd_lim, if needed*/ |
287 | if (!dd->userbase) | 289 | if (!dd->userbase || dd->piovl15base) |
288 | snd_lim = offs4k + tot4k; | 290 | snd_lim = offs4k + tot4k; |
289 | } | 291 | } |
290 | } | 292 | } |
@@ -298,6 +300,15 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset, | |||
298 | cnt = snd_lim - offset; | 300 | cnt = snd_lim - offset; |
299 | } | 301 | } |
300 | 302 | ||
303 | if (!map && offs4k && dd->piovl15base) { | ||
304 | snd_lim = offs4k + tot4k + 2 * dd->align4k; | ||
305 | if (offset >= (offs4k + tot4k) && offset < snd_lim) { | ||
306 | map = (u32 __iomem *)dd->piovl15base + | ||
307 | ((offset - (offs4k + tot4k)) / sizeof(u32)); | ||
308 | cnt = snd_lim - offset; | ||
309 | } | ||
310 | } | ||
311 | |||
301 | mapped: | 312 | mapped: |
302 | if (cntp) | 313 | if (cntp) |
303 | *cntp = cnt; | 314 | *cntp = cnt; |
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c index 503992d9c5ce..3e9828be5010 100644 --- a/drivers/infiniband/hw/qib/qib_iba7322.c +++ b/drivers/infiniband/hw/qib/qib_iba7322.c | |||
@@ -6119,9 +6119,25 @@ static int qib_init_7322_variables(struct qib_devdata *dd) | |||
6119 | qib_set_ctxtcnt(dd); | 6119 | qib_set_ctxtcnt(dd); |
6120 | 6120 | ||
6121 | if (qib_wc_pat) { | 6121 | if (qib_wc_pat) { |
6122 | ret = init_chip_wc_pat(dd, NUM_VL15_BUFS * dd->align4k); | 6122 | resource_size_t vl15off; |
6123 | /* | ||
6124 | * We do not set WC on the VL15 buffers to avoid | ||
6125 | * a rare problem with unaligned writes from | ||
6126 | * interrupt-flushed store buffers, so we need | ||
6127 | * to map those separately here. We can't solve | ||
6128 | * this for the rarely used mtrr case. | ||
6129 | */ | ||
6130 | ret = init_chip_wc_pat(dd, 0); | ||
6123 | if (ret) | 6131 | if (ret) |
6124 | goto bail; | 6132 | goto bail; |
6133 | |||
6134 | /* vl15 buffers start just after the 4k buffers */ | ||
6135 | vl15off = dd->physaddr + (dd->piobufbase >> 32) + | ||
6136 | dd->piobcnt4k * dd->align4k; | ||
6137 | dd->piovl15base = ioremap_nocache(vl15off, | ||
6138 | NUM_VL15_BUFS * dd->align4k); | ||
6139 | if (!dd->piovl15base) | ||
6140 | goto bail; | ||
6125 | } | 6141 | } |
6126 | qib_7322_set_baseaddrs(dd); /* set chip access pointers now */ | 6142 | qib_7322_set_baseaddrs(dd); /* set chip access pointers now */ |
6127 | 6143 | ||
diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c index 9b40f345ac3f..25895991dc52 100644 --- a/drivers/infiniband/hw/qib/qib_init.c +++ b/drivers/infiniband/hw/qib/qib_init.c | |||
@@ -1499,6 +1499,12 @@ bail: | |||
1499 | return -ENOMEM; | 1499 | return -ENOMEM; |
1500 | } | 1500 | } |
1501 | 1501 | ||
1502 | /* | ||
1503 | * Note: Changes to this routine should be mirrored | ||
1504 | * for the diagnostics routine qib_remap_ioaddr32(). | ||
1505 | * There is also related code for VL15 buffers in qib_init_7322_variables(). | ||
1506 | * The teardown code that unmaps is in qib_pcie_ddcleanup() | ||
1507 | */ | ||
1502 | int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) | 1508 | int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) |
1503 | { | 1509 | { |
1504 | u64 __iomem *qib_kregbase = NULL; | 1510 | u64 __iomem *qib_kregbase = NULL; |
diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c index c926bf4541df..7fa6e5592630 100644 --- a/drivers/infiniband/hw/qib/qib_pcie.c +++ b/drivers/infiniband/hw/qib/qib_pcie.c | |||
@@ -179,6 +179,8 @@ void qib_pcie_ddcleanup(struct qib_devdata *dd) | |||
179 | iounmap(dd->piobase); | 179 | iounmap(dd->piobase); |
180 | if (dd->userbase) | 180 | if (dd->userbase) |
181 | iounmap(dd->userbase); | 181 | iounmap(dd->userbase); |
182 | if (dd->piovl15base) | ||
183 | iounmap(dd->piovl15base); | ||
182 | 184 | ||
183 | pci_disable_device(dd->pcidev); | 185 | pci_disable_device(dd->pcidev); |
184 | pci_release_regions(dd->pcidev); | 186 | pci_release_regions(dd->pcidev); |
diff --git a/drivers/infiniband/hw/qib/qib_tx.c b/drivers/infiniband/hw/qib/qib_tx.c index f7eb1ddff5f3..af30232b6831 100644 --- a/drivers/infiniband/hw/qib/qib_tx.c +++ b/drivers/infiniband/hw/qib/qib_tx.c | |||
@@ -340,9 +340,13 @@ rescan: | |||
340 | if (i < dd->piobcnt2k) | 340 | if (i < dd->piobcnt2k) |
341 | buf = (u32 __iomem *)(dd->pio2kbase + | 341 | buf = (u32 __iomem *)(dd->pio2kbase + |
342 | i * dd->palign); | 342 | i * dd->palign); |
343 | else | 343 | else if (i < dd->piobcnt2k + dd->piobcnt4k || !dd->piovl15base) |
344 | buf = (u32 __iomem *)(dd->pio4kbase + | 344 | buf = (u32 __iomem *)(dd->pio4kbase + |
345 | (i - dd->piobcnt2k) * dd->align4k); | 345 | (i - dd->piobcnt2k) * dd->align4k); |
346 | else | ||
347 | buf = (u32 __iomem *)(dd->piovl15base + | ||
348 | (i - (dd->piobcnt2k + dd->piobcnt4k)) * | ||
349 | dd->align4k); | ||
346 | if (pbufnum) | 350 | if (pbufnum) |
347 | *pbufnum = i; | 351 | *pbufnum = i; |
348 | dd->upd_pio_shadow = 0; | 352 | dd->upd_pio_shadow = 0; |