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-rw-r--r--arch/arm/mach-integrator/include/mach/irqs.h109
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c2
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c4
3 files changed, 55 insertions, 60 deletions
diff --git a/arch/arm/mach-integrator/include/mach/irqs.h b/arch/arm/mach-integrator/include/mach/irqs.h
index 7371018455d2..eff0adad9ae3 100644
--- a/arch/arm/mach-integrator/include/mach/irqs.h
+++ b/arch/arm/mach-integrator/include/mach/irqs.h
@@ -19,64 +19,63 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 21
22/* 22/*
23 * Interrupt numbers 23 * Interrupt numbers, all of the above are just static reservations
24 * used so they can be encoded into device resources. They will finally
25 * be done away with when switching to device tree.
24 */ 26 */
25#define IRQ_PIC_START 1 27#define IRQ_PIC_START 64
26#define IRQ_SOFTINT 1 28#define IRQ_SOFTINT (IRQ_PIC_START+0)
27#define IRQ_UARTINT0 2 29#define IRQ_UARTINT0 (IRQ_PIC_START+1)
28#define IRQ_UARTINT1 3 30#define IRQ_UARTINT1 (IRQ_PIC_START+2)
29#define IRQ_KMIINT0 4 31#define IRQ_KMIINT0 (IRQ_PIC_START+3)
30#define IRQ_KMIINT1 5 32#define IRQ_KMIINT1 (IRQ_PIC_START+4)
31#define IRQ_TIMERINT0 6 33#define IRQ_TIMERINT0 (IRQ_PIC_START+5)
32#define IRQ_TIMERINT1 7 34#define IRQ_TIMERINT1 (IRQ_PIC_START+6)
33#define IRQ_TIMERINT2 8 35#define IRQ_TIMERINT2 (IRQ_PIC_START+7)
34#define IRQ_RTCINT 9 36#define IRQ_RTCINT (IRQ_PIC_START+8)
35#define IRQ_AP_EXPINT0 10 37#define IRQ_AP_EXPINT0 (IRQ_PIC_START+9)
36#define IRQ_AP_EXPINT1 11 38#define IRQ_AP_EXPINT1 (IRQ_PIC_START+10)
37#define IRQ_AP_EXPINT2 12 39#define IRQ_AP_EXPINT2 (IRQ_PIC_START+11)
38#define IRQ_AP_EXPINT3 13 40#define IRQ_AP_EXPINT3 (IRQ_PIC_START+12)
39#define IRQ_AP_PCIINT0 14 41#define IRQ_AP_PCIINT0 (IRQ_PIC_START+13)
40#define IRQ_AP_PCIINT1 15 42#define IRQ_AP_PCIINT1 (IRQ_PIC_START+14)
41#define IRQ_AP_PCIINT2 16 43#define IRQ_AP_PCIINT2 (IRQ_PIC_START+15)
42#define IRQ_AP_PCIINT3 17 44#define IRQ_AP_PCIINT3 (IRQ_PIC_START+16)
43#define IRQ_AP_V3INT 18 45#define IRQ_AP_V3INT (IRQ_PIC_START+17)
44#define IRQ_AP_CPINT0 19 46#define IRQ_AP_CPINT0 (IRQ_PIC_START+18)
45#define IRQ_AP_CPINT1 20 47#define IRQ_AP_CPINT1 (IRQ_PIC_START+19)
46#define IRQ_AP_LBUSTIMEOUT 21 48#define IRQ_AP_LBUSTIMEOUT (IRQ_PIC_START+20)
47#define IRQ_AP_APCINT 22 49#define IRQ_AP_APCINT (IRQ_PIC_START+21)
48#define IRQ_CP_CLCDCINT 23 50#define IRQ_CP_CLCDCINT (IRQ_PIC_START+22)
49#define IRQ_CP_MMCIINT0 24 51#define IRQ_CP_MMCIINT0 (IRQ_PIC_START+23)
50#define IRQ_CP_MMCIINT1 25 52#define IRQ_CP_MMCIINT1 (IRQ_PIC_START+24)
51#define IRQ_CP_AACIINT 26 53#define IRQ_CP_AACIINT (IRQ_PIC_START+25)
52#define IRQ_CP_CPPLDINT 27 54#define IRQ_CP_CPPLDINT (IRQ_PIC_START+26)
53#define IRQ_CP_ETHINT 28 55#define IRQ_CP_ETHINT (IRQ_PIC_START+27)
54#define IRQ_CP_TSPENINT 29 56#define IRQ_CP_TSPENINT (IRQ_PIC_START+28)
55#define IRQ_PIC_END 29 57#define IRQ_PIC_END (IRQ_PIC_START+28)
56 58
57#define IRQ_CIC_START 32 59#define IRQ_CIC_START (IRQ_PIC_END+1)
58#define IRQ_CM_SOFTINT 32 60#define IRQ_CM_SOFTINT (IRQ_CIC_START+0)
59#define IRQ_CM_COMMRX 33 61#define IRQ_CM_COMMRX (IRQ_CIC_START+1)
60#define IRQ_CM_COMMTX 34 62#define IRQ_CM_COMMTX (IRQ_CIC_START+2)
61#define IRQ_CIC_END 34 63#define IRQ_CIC_END (IRQ_CIC_START+2)
62 64
63/* 65/*
64 * IntegratorCP only 66 * IntegratorCP only
65 */ 67 */
66#define IRQ_SIC_START 35 68#define IRQ_SIC_START (IRQ_CIC_END+1)
67#define IRQ_SIC_CP_SOFTINT 35 69#define IRQ_SIC_CP_SOFTINT (IRQ_SIC_START+0)
68#define IRQ_SIC_CP_RI0 36 70#define IRQ_SIC_CP_RI0 (IRQ_SIC_START+1)
69#define IRQ_SIC_CP_RI1 37 71#define IRQ_SIC_CP_RI1 (IRQ_SIC_START+2)
70#define IRQ_SIC_CP_CARDIN 38 72#define IRQ_SIC_CP_CARDIN (IRQ_SIC_START+3)
71#define IRQ_SIC_CP_LMINT0 39 73#define IRQ_SIC_CP_LMINT0 (IRQ_SIC_START+4)
72#define IRQ_SIC_CP_LMINT1 40 74#define IRQ_SIC_CP_LMINT1 (IRQ_SIC_START+5)
73#define IRQ_SIC_CP_LMINT2 41 75#define IRQ_SIC_CP_LMINT2 (IRQ_SIC_START+6)
74#define IRQ_SIC_CP_LMINT3 42 76#define IRQ_SIC_CP_LMINT3 (IRQ_SIC_START+7)
75#define IRQ_SIC_CP_LMINT4 43 77#define IRQ_SIC_CP_LMINT4 (IRQ_SIC_START+8)
76#define IRQ_SIC_CP_LMINT5 44 78#define IRQ_SIC_CP_LMINT5 (IRQ_SIC_START+9)
77#define IRQ_SIC_CP_LMINT6 45 79#define IRQ_SIC_CP_LMINT6 (IRQ_SIC_START+10)
78#define IRQ_SIC_CP_LMINT7 46 80#define IRQ_SIC_CP_LMINT7 (IRQ_SIC_START+11)
79#define IRQ_SIC_END 46 81#define IRQ_SIC_END (IRQ_SIC_START+11)
80
81#define NR_IRQS_INTEGRATOR_AP 34
82#define NR_IRQS_INTEGRATOR_CP 47
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index e6617c134faf..4f13bc57e5a4 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -499,7 +499,6 @@ static const char * ap_dt_board_compat[] = {
499DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)") 499DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
500 .reserve = integrator_reserve, 500 .reserve = integrator_reserve,
501 .map_io = ap_map_io, 501 .map_io = ap_map_io,
502 .nr_irqs = NR_IRQS_INTEGRATOR_AP,
503 .init_early = ap_init_early, 502 .init_early = ap_init_early,
504 .init_irq = ap_init_irq_of, 503 .init_irq = ap_init_irq_of,
505 .handle_irq = fpga_handle_irq, 504 .handle_irq = fpga_handle_irq,
@@ -609,7 +608,6 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
609 .atag_offset = 0x100, 608 .atag_offset = 0x100,
610 .reserve = integrator_reserve, 609 .reserve = integrator_reserve,
611 .map_io = ap_map_io, 610 .map_io = ap_map_io,
612 .nr_irqs = NR_IRQS_INTEGRATOR_AP,
613 .init_early = ap_init_early, 611 .init_early = ap_init_early,
614 .init_irq = ap_init_irq, 612 .init_irq = ap_init_irq,
615 .handle_irq = fpga_handle_irq, 613 .handle_irq = fpga_handle_irq,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5b08e8e4cc83..4423bc8e84c5 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -350,7 +350,6 @@ static const char * intcp_dt_board_compat[] = {
350DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)") 350DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
351 .reserve = integrator_reserve, 351 .reserve = integrator_reserve,
352 .map_io = intcp_map_io, 352 .map_io = intcp_map_io,
353 .nr_irqs = NR_IRQS_INTEGRATOR_CP,
354 .init_early = intcp_init_early, 353 .init_early = intcp_init_early,
355 .init_irq = intcp_init_irq_of, 354 .init_irq = intcp_init_irq_of,
356 .handle_irq = fpga_handle_irq, 355 .handle_irq = fpga_handle_irq,
@@ -423,7 +422,7 @@ static void __init intcp_init_irq(void)
423 u32 pic_mask, cic_mask, sic_mask; 422 u32 pic_mask, cic_mask, sic_mask;
424 423
425 /* These masks are for the HW IRQ registers */ 424 /* These masks are for the HW IRQ registers */
426 pic_mask = ~((~0u) << (11 - IRQ_PIC_START)); 425 pic_mask = ~((~0u) << (11 - 0));
427 pic_mask |= (~((~0u) << (29 - 22))) << 22; 426 pic_mask |= (~((~0u) << (29 - 22))) << 22;
428 cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START)); 427 cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
429 sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START)); 428 sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
@@ -504,7 +503,6 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
504 .atag_offset = 0x100, 503 .atag_offset = 0x100,
505 .reserve = integrator_reserve, 504 .reserve = integrator_reserve,
506 .map_io = intcp_map_io, 505 .map_io = intcp_map_io,
507 .nr_irqs = NR_IRQS_INTEGRATOR_CP,
508 .init_early = intcp_init_early, 506 .init_early = intcp_init_early,
509 .init_irq = intcp_init_irq, 507 .init_irq = intcp_init_irq,
510 .handle_irq = fpga_handle_irq, 508 .handle_irq = fpga_handle_irq,
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-19 12:20:07 -0400