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-rw-r--r--arch/arm/mach-integrator/integrator_ap.c190
-rw-r--r--drivers/clocksource/Makefile1
-rw-r--r--drivers/clocksource/timer-integrator-ap.c210
3 files changed, 211 insertions, 190 deletions
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 8ca290b479b1..8a879b654fde 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -27,13 +27,9 @@
27#include <linux/syscore_ops.h> 27#include <linux/syscore_ops.h>
28#include <linux/amba/bus.h> 28#include <linux/amba/bus.h>
29#include <linux/amba/kmi.h> 29#include <linux/amba/kmi.h>
30#include <linux/clocksource.h>
31#include <linux/clockchips.h>
32#include <linux/interrupt.h>
33#include <linux/io.h> 30#include <linux/io.h>
34#include <linux/irqchip.h> 31#include <linux/irqchip.h>
35#include <linux/mtd/physmap.h> 32#include <linux/mtd/physmap.h>
36#include <linux/clk.h>
37#include <linux/platform_data/clk-integrator.h> 33#include <linux/platform_data/clk-integrator.h>
38#include <linux/of_irq.h> 34#include <linux/of_irq.h>
39#include <linux/of_address.h> 35#include <linux/of_address.h>
@@ -41,8 +37,6 @@
41#include <linux/stat.h> 37#include <linux/stat.h>
42#include <linux/sys_soc.h> 38#include <linux/sys_soc.h>
43#include <linux/termios.h> 39#include <linux/termios.h>
44#include <linux/sched_clock.h>
45#include <linux/clk-provider.h>
46 40
47#include <asm/hardware/arm_timer.h> 41#include <asm/hardware/arm_timer.h>
48#include <asm/setup.h> 42#include <asm/setup.h>
@@ -89,11 +83,6 @@ static void __iomem *ebi_base;
89 83
90static struct map_desc ap_io_desc[] __initdata __maybe_unused = { 84static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
91 { 85 {
92 .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
93 .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
94 .length = SZ_4K,
95 .type = MT_DEVICE
96 }, {
97 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE), 86 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
98 .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE), 87 .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
99 .length = SZ_4K, 88 .length = SZ_4K,
@@ -257,188 +246,10 @@ struct amba_pl010_data ap_uart_data = {
257 .set_mctrl = integrator_uart_set_mctrl, 246 .set_mctrl = integrator_uart_set_mctrl,
258}; 247};
259 248
260/*
261 * Where is the timer (VA)?
262 */
263#define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
264#define TIMER1_VA_BASE __io_address(INTEGRATOR_TIMER1_BASE)
265#define TIMER2_VA_BASE __io_address(INTEGRATOR_TIMER2_BASE)
266
267static unsigned long timer_reload;
268
269static u64 notrace integrator_read_sched_clock(void)
270{
271 return -readl((void __iomem *) TIMER2_VA_BASE + TIMER_VALUE);
272}
273
274static void integrator_clocksource_init(unsigned long inrate,
275 void __iomem *base)
276{
277 u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
278 unsigned long rate = inrate;
279
280 if (rate >= 1500000) {
281 rate /= 16;
282 ctrl |= TIMER_CTRL_DIV16;
283 }
284
285 writel(0xffff, base + TIMER_LOAD);
286 writel(ctrl, base + TIMER_CTRL);
287
288 clocksource_mmio_init(base + TIMER_VALUE, "timer2",
289 rate, 200, 16, clocksource_mmio_readl_down);
290 sched_clock_register(integrator_read_sched_clock, 16, rate);
291}
292
293static void __iomem * clkevt_base;
294
295/*
296 * IRQ handler for the timer
297 */
298static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id)
299{
300 struct clock_event_device *evt = dev_id;
301
302 /* clear the interrupt */
303 writel(1, clkevt_base + TIMER_INTCLR);
304
305 evt->event_handler(evt);
306
307 return IRQ_HANDLED;
308}
309
310static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
311{
312 u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
313
314 /* Disable timer */
315 writel(ctrl, clkevt_base + TIMER_CTRL);
316
317 switch (mode) {
318 case CLOCK_EVT_MODE_PERIODIC:
319 /* Enable the timer and start the periodic tick */
320 writel(timer_reload, clkevt_base + TIMER_LOAD);
321 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
322 writel(ctrl, clkevt_base + TIMER_CTRL);
323 break;
324 case CLOCK_EVT_MODE_ONESHOT:
325 /* Leave the timer disabled, .set_next_event will enable it */
326 ctrl &= ~TIMER_CTRL_PERIODIC;
327 writel(ctrl, clkevt_base + TIMER_CTRL);
328 break;
329 case CLOCK_EVT_MODE_UNUSED:
330 case CLOCK_EVT_MODE_SHUTDOWN:
331 case CLOCK_EVT_MODE_RESUME:
332 default:
333 /* Just leave in disabled state */
334 break;
335 }
336
337}
338
339static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt)
340{
341 unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
342
343 writel(ctrl & ~TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
344 writel(next, clkevt_base + TIMER_LOAD);
345 writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
346
347 return 0;
348}
349
350static struct clock_event_device integrator_clockevent = {
351 .name = "timer1",
352 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
353 .set_mode = clkevt_set_mode,
354 .set_next_event = clkevt_set_next_event,
355 .rating = 300,
356};
357
358static struct irqaction integrator_timer_irq = {
359 .name = "timer",
360 .flags = IRQF_TIMER | IRQF_IRQPOLL,
361 .handler = integrator_timer_interrupt,
362 .dev_id = &integrator_clockevent,
363};
364
365static void integrator_clockevent_init(unsigned long inrate,
366 void __iomem *base, int irq)
367{
368 unsigned long rate = inrate;
369 unsigned int ctrl = 0;
370
371 clkevt_base = base;
372 /* Calculate and program a divisor */
373 if (rate > 0x100000 * HZ) {
374 rate /= 256;
375 ctrl |= TIMER_CTRL_DIV256;
376 } else if (rate > 0x10000 * HZ) {
377 rate /= 16;
378 ctrl |= TIMER_CTRL_DIV16;
379 }
380 timer_reload = rate / HZ;
381 writel(ctrl, clkevt_base + TIMER_CTRL);
382
383 setup_irq(irq, &integrator_timer_irq);
384 clockevents_config_and_register(&integrator_clockevent,
385 rate,
386 1,
387 0xffffU);
388}
389
390void __init ap_init_early(void) 249void __init ap_init_early(void)
391{ 250{
392} 251}
393 252
394static void __init ap_of_timer_init(void)
395{
396 struct device_node *node;
397 const char *path;
398 void __iomem *base;
399 int err;
400 int irq;
401 struct clk *clk;
402 unsigned long rate;
403
404 of_clk_init(NULL);
405
406 err = of_property_read_string(of_aliases,
407 "arm,timer-primary", &path);
408 if (WARN_ON(err))
409 return;
410 node = of_find_node_by_path(path);
411 base = of_iomap(node, 0);
412 if (WARN_ON(!base))
413 return;
414
415 clk = of_clk_get(node, 0);
416 BUG_ON(IS_ERR(clk));
417 clk_prepare_enable(clk);
418 rate = clk_get_rate(clk);
419
420 writel(0, base + TIMER_CTRL);
421 integrator_clocksource_init(rate, base);
422
423 err = of_property_read_string(of_aliases,
424 "arm,timer-secondary", &path);
425 if (WARN_ON(err))
426 return;
427 node = of_find_node_by_path(path);
428 base = of_iomap(node, 0);
429 if (WARN_ON(!base))
430 return;
431 irq = irq_of_parse_and_map(node, 0);
432
433 clk = of_clk_get(node, 0);
434 BUG_ON(IS_ERR(clk));
435 clk_prepare_enable(clk);
436 rate = clk_get_rate(clk);
437
438 writel(0, base + TIMER_CTRL);
439 integrator_clockevent_init(rate, base, irq);
440}
441
442static void __init ap_init_irq_of(void) 253static void __init ap_init_irq_of(void)
443{ 254{
444 cm_init(); 255 cm_init();
@@ -553,7 +364,6 @@ DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
553 .map_io = ap_map_io, 364 .map_io = ap_map_io,
554 .init_early = ap_init_early, 365 .init_early = ap_init_early,
555 .init_irq = ap_init_irq_of, 366 .init_irq = ap_init_irq_of,
556 .init_time = ap_of_timer_init,
557 .init_machine = ap_init_of, 367 .init_machine = ap_init_of,
558 .restart = integrator_restart, 368 .restart = integrator_restart,
559 .dt_compat = ap_dt_board_compat, 369 .dt_compat = ap_dt_board_compat,
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 756f6f10efa0..fae0435cc23d 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -45,4 +45,5 @@ obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
45obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o 45obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o
46obj-$(CONFIG_ARCH_HAS_TICK_BROADCAST) += dummy_timer.o 46obj-$(CONFIG_ARCH_HAS_TICK_BROADCAST) += dummy_timer.o
47obj-$(CONFIG_ARCH_KEYSTONE) += timer-keystone.o 47obj-$(CONFIG_ARCH_KEYSTONE) += timer-keystone.o
48obj-$(CONFIG_ARCH_INTEGRATOR_AP) += timer-integrator-ap.o
48obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o 49obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o
diff --git a/drivers/clocksource/timer-integrator-ap.c b/drivers/clocksource/timer-integrator-ap.c
new file mode 100644
index 000000000000..b9efd30513d5
--- /dev/null
+++ b/drivers/clocksource/timer-integrator-ap.c
@@ -0,0 +1,210 @@
1/*
2 * Integrator/AP timer driver
3 * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
4 * Copyright (c) 2014, Linaro Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/clk.h>
22#include <linux/clocksource.h>
23#include <linux/of_irq.h>
24#include <linux/of_address.h>
25#include <linux/of_platform.h>
26#include <linux/clockchips.h>
27#include <linux/interrupt.h>
28#include <linux/sched_clock.h>
29#include <asm/hardware/arm_timer.h>
30
31static void __iomem * sched_clk_base;
32
33static u64 notrace integrator_read_sched_clock(void)
34{
35 return -readl(sched_clk_base + TIMER_VALUE);
36}
37
38static void integrator_clocksource_init(unsigned long inrate,
39 void __iomem *base)
40{
41 u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
42 unsigned long rate = inrate;
43
44 if (rate >= 1500000) {
45 rate /= 16;
46 ctrl |= TIMER_CTRL_DIV16;
47 }
48
49 writel(0xffff, base + TIMER_LOAD);
50 writel(ctrl, base + TIMER_CTRL);
51
52 clocksource_mmio_init(base + TIMER_VALUE, "timer2",
53 rate, 200, 16, clocksource_mmio_readl_down);
54
55 sched_clk_base = base;
56 sched_clock_register(integrator_read_sched_clock, 16, rate);
57}
58
59static unsigned long timer_reload;
60static void __iomem * clkevt_base;
61
62/*
63 * IRQ handler for the timer
64 */
65static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id)
66{
67 struct clock_event_device *evt = dev_id;
68
69 /* clear the interrupt */
70 writel(1, clkevt_base + TIMER_INTCLR);
71
72 evt->event_handler(evt);
73
74 return IRQ_HANDLED;
75}
76
77static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
78{
79 u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
80
81 /* Disable timer */
82 writel(ctrl, clkevt_base + TIMER_CTRL);
83
84 switch (mode) {
85 case CLOCK_EVT_MODE_PERIODIC:
86 /* Enable the timer and start the periodic tick */
87 writel(timer_reload, clkevt_base + TIMER_LOAD);
88 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
89 writel(ctrl, clkevt_base + TIMER_CTRL);
90 break;
91 case CLOCK_EVT_MODE_ONESHOT:
92 /* Leave the timer disabled, .set_next_event will enable it */
93 ctrl &= ~TIMER_CTRL_PERIODIC;
94 writel(ctrl, clkevt_base + TIMER_CTRL);
95 break;
96 case CLOCK_EVT_MODE_UNUSED:
97 case CLOCK_EVT_MODE_SHUTDOWN:
98 case CLOCK_EVT_MODE_RESUME:
99 default:
100 /* Just leave in disabled state */
101 break;
102 }
103
104}
105
106static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt)
107{
108 unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
109
110 writel(ctrl & ~TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
111 writel(next, clkevt_base + TIMER_LOAD);
112 writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
113
114 return 0;
115}
116
117static struct clock_event_device integrator_clockevent = {
118 .name = "timer1",
119 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
120 .set_mode = clkevt_set_mode,
121 .set_next_event = clkevt_set_next_event,
122 .rating = 300,
123};
124
125static struct irqaction integrator_timer_irq = {
126 .name = "timer",
127 .flags = IRQF_TIMER | IRQF_IRQPOLL,
128 .handler = integrator_timer_interrupt,
129 .dev_id = &integrator_clockevent,
130};
131
132static void integrator_clockevent_init(unsigned long inrate,
133 void __iomem *base, int irq)
134{
135 unsigned long rate = inrate;
136 unsigned int ctrl = 0;
137
138 clkevt_base = base;
139 /* Calculate and program a divisor */
140 if (rate > 0x100000 * HZ) {
141 rate /= 256;
142 ctrl |= TIMER_CTRL_DIV256;
143 } else if (rate > 0x10000 * HZ) {
144 rate /= 16;
145 ctrl |= TIMER_CTRL_DIV16;
146 }
147 timer_reload = rate / HZ;
148 writel(ctrl, clkevt_base + TIMER_CTRL);
149
150 setup_irq(irq, &integrator_timer_irq);
151 clockevents_config_and_register(&integrator_clockevent,
152 rate,
153 1,
154 0xffffU);
155}
156
157static void __init integrator_ap_timer_init_of(struct device_node *node)
158{
159 const char *path;
160 void __iomem *base;
161 int err;
162 int irq;
163 struct clk *clk;
164 unsigned long rate;
165 struct device_node *pri_node;
166 struct device_node *sec_node;
167
168 base = of_io_request_and_map(node, 0, "integrator-timer");
169 if (!base)
170 return;
171
172 clk = of_clk_get(node, 0);
173 if (IS_ERR(clk)) {
174 pr_err("No clock for %s\n", node->name);
175 return;
176 }
177 clk_prepare_enable(clk);
178 rate = clk_get_rate(clk);
179 writel(0, base + TIMER_CTRL);
180
181 err = of_property_read_string(of_aliases,
182 "arm,timer-primary", &path);
183 if (WARN_ON(err))
184 return;
185 pri_node = of_find_node_by_path(path);
186 err = of_property_read_string(of_aliases,
187 "arm,timer-secondary", &path);
188 if (WARN_ON(err))
189 return;
190 sec_node = of_find_node_by_path(path);
191
192 if (node == pri_node) {
193 /* The primary timer lacks IRQ, use as clocksource */
194 integrator_clocksource_init(rate, base);
195 return;
196 }
197
198 if (node == sec_node) {
199 /* The secondary timer will drive the clock event */
200 irq = irq_of_parse_and_map(node, 0);
201 integrator_clockevent_init(rate, base, irq);
202 return;
203 }
204
205 pr_info("Timer @%p unused\n", base);
206 clk_disable_unprepare(clk);
207}
208
209CLOCKSOURCE_OF_DECLARE(integrator_ap_timer, "arm,integrator-timer",
210 integrator_ap_timer_init_of);
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-04 10:24:51 -0500