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-rw-r--r--Documentation/ABI/testing/sysfs-class-cxl129
-rw-r--r--Documentation/ioctl/ioctl-number.txt1
-rw-r--r--Documentation/powerpc/00-INDEX2
-rw-r--r--Documentation/powerpc/cxl.txt379
-rw-r--r--MAINTAINERS12
-rw-r--r--include/uapi/misc/cxl.h7
6 files changed, 527 insertions, 3 deletions
diff --git a/Documentation/ABI/testing/sysfs-class-cxl b/Documentation/ABI/testing/sysfs-class-cxl
new file mode 100644
index 000000000000..554405ec1955
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-cxl
@@ -0,0 +1,129 @@
1Slave contexts (eg. /sys/class/cxl/afu0.0s):
2
3What: /sys/class/cxl/<afu>/irqs_max
4Date: September 2014
5Contact: linuxppc-dev@lists.ozlabs.org
6Description: read/write
7 Decimal value of maximum number of interrupts that can be
8 requested by userspace. The default on probe is the maximum
9 that hardware can support (eg. 2037). Write values will limit
10 userspace applications to that many userspace interrupts. Must
11 be >= irqs_min.
12
13What: /sys/class/cxl/<afu>/irqs_min
14Date: September 2014
15Contact: linuxppc-dev@lists.ozlabs.org
16Description: read only
17 Decimal value of the minimum number of interrupts that
18 userspace must request on a CXL_START_WORK ioctl. Userspace may
19 omit the num_interrupts field in the START_WORK IOCTL to get
20 this minimum automatically.
21
22What: /sys/class/cxl/<afu>/mmio_size
23Date: September 2014
24Contact: linuxppc-dev@lists.ozlabs.org
25Description: read only
26 Decimal value of the size of the MMIO space that may be mmaped
27 by userspace.
28
29What: /sys/class/cxl/<afu>/modes_supported
30Date: September 2014
31Contact: linuxppc-dev@lists.ozlabs.org
32Description: read only
33 List of the modes this AFU supports. One per line.
34 Valid entries are: "dedicated_process" and "afu_directed"
35
36What: /sys/class/cxl/<afu>/mode
37Date: September 2014
38Contact: linuxppc-dev@lists.ozlabs.org
39Description: read/write
40 The current mode the AFU is using. Will be one of the modes
41 given in modes_supported. Writing will change the mode
42 provided that no user contexts are attached.
43
44
45What: /sys/class/cxl/<afu>/prefault_mode
46Date: September 2014
47Contact: linuxppc-dev@lists.ozlabs.org
48Description: read/write
49 Set the mode for prefaulting in segments into the segment table
50 when performing the START_WORK ioctl. Possible values:
51 none: No prefaulting (default)
52 work_element_descriptor: Treat the work element
53 descriptor as an effective address and
54 prefault what it points to.
55 all: all segments process calling START_WORK maps.
56
57What: /sys/class/cxl/<afu>/reset
58Date: September 2014
59Contact: linuxppc-dev@lists.ozlabs.org
60Description: write only
61 Writing 1 here will reset the AFU provided there are not
62 contexts active on the AFU.
63
64What: /sys/class/cxl/<afu>/api_version
65Date: September 2014
66Contact: linuxppc-dev@lists.ozlabs.org
67Description: read only
68 Decimal value of the current version of the kernel/user API.
69
70What: /sys/class/cxl/<afu>/api_version_com
71Date: September 2014
72Contact: linuxppc-dev@lists.ozlabs.org
73Description: read only
74 Decimal value of the the lowest version of the userspace API
75 this this kernel supports.
76
77
78
79Master contexts (eg. /sys/class/cxl/afu0.0m)
80
81What: /sys/class/cxl/<afu>m/mmio_size
82Date: September 2014
83Contact: linuxppc-dev@lists.ozlabs.org
84Description: read only
85 Decimal value of the size of the MMIO space that may be mmaped
86 by userspace. This includes all slave contexts space also.
87
88What: /sys/class/cxl/<afu>m/pp_mmio_len
89Date: September 2014
90Contact: linuxppc-dev@lists.ozlabs.org
91Description: read only
92 Decimal value of the Per Process MMIO space length.
93
94What: /sys/class/cxl/<afu>m/pp_mmio_off
95Date: September 2014
96Contact: linuxppc-dev@lists.ozlabs.org
97Description: read only
98 Decimal value of the Per Process MMIO space offset.
99
100
101Card info (eg. /sys/class/cxl/card0)
102
103What: /sys/class/cxl/<card>/caia_version
104Date: September 2014
105Contact: linuxppc-dev@lists.ozlabs.org
106Description: read only
107 Identifies the CAIA Version the card implements.
108
109What: /sys/class/cxl/<card>/psl_version
110Date: September 2014
111Contact: linuxppc-dev@lists.ozlabs.org
112Description: read only
113 Identifies the revision level of the PSL.
114
115What: /sys/class/cxl/<card>/base_image
116Date: September 2014
117Contact: linuxppc-dev@lists.ozlabs.org
118Description: read only
119 Identifies the revision level of the base image for devices
120 that support loadable PSLs. For FPGAs this field identifies
121 the image contained in the on-adapter flash which is loaded
122 during the initial program load.
123
124What: /sys/class/cxl/<card>/image_loaded
125Date: September 2014
126Contact: linuxppc-dev@lists.ozlabs.org
127Description: read only
128 Will return "user" or "factory" depending on the image loaded
129 onto the card.
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
index 7e240a7c9ab1..8136e1fd30fd 100644
--- a/Documentation/ioctl/ioctl-number.txt
+++ b/Documentation/ioctl/ioctl-number.txt
@@ -313,6 +313,7 @@ Code Seq#(hex) Include File Comments
3130xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca> 3130xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
3140xB3 00 linux/mmc/ioctl.h 3140xB3 00 linux/mmc/ioctl.h
3150xC0 00-0F linux/usb/iowarrior.h 3150xC0 00-0F linux/usb/iowarrior.h
3160xCA 00-0F uapi/misc/cxl.h
3160xCB 00-1F CBM serial IEC bus in development: 3170xCB 00-1F CBM serial IEC bus in development:
317 <mailto:michael.klein@puffin.lb.shuttle.de> 318 <mailto:michael.klein@puffin.lb.shuttle.de>
3180xCD 01 linux/reiserfs_fs.h 3190xCD 01 linux/reiserfs_fs.h
diff --git a/Documentation/powerpc/00-INDEX b/Documentation/powerpc/00-INDEX
index a68784d0a1ee..6fd0e8bb8140 100644
--- a/Documentation/powerpc/00-INDEX
+++ b/Documentation/powerpc/00-INDEX
@@ -11,6 +11,8 @@ bootwrapper.txt
11cpu_features.txt 11cpu_features.txt
12 - info on how we support a variety of CPUs with minimal compile-time 12 - info on how we support a variety of CPUs with minimal compile-time
13 options. 13 options.
14cxl.txt
15 - Overview of the CXL driver.
14eeh-pci-error-recovery.txt 16eeh-pci-error-recovery.txt
15 - info on PCI Bus EEH Error Recovery 17 - info on PCI Bus EEH Error Recovery
16firmware-assisted-dump.txt 18firmware-assisted-dump.txt
diff --git a/Documentation/powerpc/cxl.txt b/Documentation/powerpc/cxl.txt
new file mode 100644
index 000000000000..2c71ecc519d9
--- /dev/null
+++ b/Documentation/powerpc/cxl.txt
@@ -0,0 +1,379 @@
1Coherent Accelerator Interface (CXL)
2====================================
3
4Introduction
5============
6
7 The coherent accelerator interface is designed to allow the
8 coherent connection of accelerators (FPGAs and other devices) to a
9 POWER system. These devices need to adhere to the Coherent
10 Accelerator Interface Architecture (CAIA).
11
12 IBM refers to this as the Coherent Accelerator Processor Interface
13 or CAPI. In the kernel it's referred to by the name CXL to avoid
14 confusion with the ISDN CAPI subsystem.
15
16 Coherent in this context means that the accelerator and CPUs can
17 both access system memory directly and with the same effective
18 addresses.
19
20
21Hardware overview
22=================
23
24 POWER8 FPGA
25 +----------+ +---------+
26 | | | |
27 | CPU | | AFU |
28 | | | |
29 | | | |
30 | | | |
31 +----------+ +---------+
32 | PHB | | |
33 | +------+ | PSL |
34 | | CAPP |<------>| |
35 +---+------+ PCIE +---------+
36
37 The POWER8 chip has a Coherently Attached Processor Proxy (CAPP)
38 unit which is part of the PCIe Host Bridge (PHB). This is managed
39 by Linux by calls into OPAL. Linux doesn't directly program the
40 CAPP.
41
42 The FPGA (or coherently attached device) consists of two parts.
43 The POWER Service Layer (PSL) and the Accelerator Function Unit
44 (AFU). The AFU is used to implement specific functionality behind
45 the PSL. The PSL, among other things, provides memory address
46 translation services to allow each AFU direct access to userspace
47 memory.
48
49 The AFU is the core part of the accelerator (eg. the compression,
50 crypto etc function). The kernel has no knowledge of the function
51 of the AFU. Only userspace interacts directly with the AFU.
52
53 The PSL provides the translation and interrupt services that the
54 AFU needs. This is what the kernel interacts with. For example, if
55 the AFU needs to read a particular effective address, it sends
56 that address to the PSL, the PSL then translates it, fetches the
57 data from memory and returns it to the AFU. If the PSL has a
58 translation miss, it interrupts the kernel and the kernel services
59 the fault. The context to which this fault is serviced is based on
60 who owns that acceleration function.
61
62
63AFU Modes
64=========
65
66 There are two programming modes supported by the AFU. Dedicated
67 and AFU directed. AFU may support one or both modes.
68
69 When using dedicated mode only one MMU context is supported. In
70 this mode, only one userspace process can use the accelerator at
71 time.
72
73 When using AFU directed mode, up to 16K simultaneous contexts can
74 be supported. This means up to 16K simultaneous userspace
75 applications may use the accelerator (although specific AFUs may
76 support fewer). In this mode, the AFU sends a 16 bit context ID
77 with each of its requests. This tells the PSL which context is
78 associated with each operation. If the PSL can't translate an
79 operation, the ID can also be accessed by the kernel so it can
80 determine the userspace context associated with an operation.
81
82
83MMIO space
84==========
85
86 A portion of the accelerator MMIO space can be directly mapped
87 from the AFU to userspace. Either the whole space can be mapped or
88 just a per context portion. The hardware is self describing, hence
89 the kernel can determine the offset and size of the per context
90 portion.
91
92
93Interrupts
94==========
95
96 AFUs may generate interrupts that are destined for userspace. These
97 are received by the kernel as hardware interrupts and passed onto
98 userspace by a read syscall documented below.
99
100 Data storage faults and error interrupts are handled by the kernel
101 driver.
102
103
104Work Element Descriptor (WED)
105=============================
106
107 The WED is a 64-bit parameter passed to the AFU when a context is
108 started. Its format is up to the AFU hence the kernel has no
109 knowledge of what it represents. Typically it will be the
110 effective address of a work queue or status block where the AFU
111 and userspace can share control and status information.
112
113
114
115
116User API
117========
118
119 For AFUs operating in AFU directed mode, two character device
120 files will be created. /dev/cxl/afu0.0m will correspond to a
121 master context and /dev/cxl/afu0.0s will correspond to a slave
122 context. Master contexts have access to the full MMIO space an
123 AFU provides. Slave contexts have access to only the per process
124 MMIO space an AFU provides.
125
126 For AFUs operating in dedicated process mode, the driver will
127 only create a single character device per AFU called
128 /dev/cxl/afu0.0d. This will have access to the entire MMIO space
129 that the AFU provides (like master contexts in AFU directed).
130
131 The types described below are defined in include/uapi/misc/cxl.h
132
133 The following file operations are supported on both slave and
134 master devices.
135
136
137open
138----
139
140 Opens the device and allocates a file descriptor to be used with
141 the rest of the API.
142
143 A dedicated mode AFU only has one context and only allows the
144 device to be opened once.
145
146 An AFU directed mode AFU can have many contexts, the device can be
147 opened once for each context that is available.
148
149 When all available contexts are allocated the open call will fail
150 and return -ENOSPC.
151
152 Note: IRQs need to be allocated for each context, which may limit
153 the number of contexts that can be created, and therefore
154 how many times the device can be opened. The POWER8 CAPP
155 supports 2040 IRQs and 3 are used by the kernel, so 2037 are
156 left. If 1 IRQ is needed per context, then only 2037
157 contexts can be allocated. If 4 IRQs are needed per context,
158 then only 2037/4 = 509 contexts can be allocated.
159
160
161ioctl
162-----
163
164 CXL_IOCTL_START_WORK:
165 Starts the AFU context and associates it with the current
166 process. Once this ioctl is successfully executed, all memory
167 mapped into this process is accessible to this AFU context
168 using the same effective addresses. No additional calls are
169 required to map/unmap memory. The AFU memory context will be
170 updated as userspace allocates and frees memory. This ioctl
171 returns once the AFU context is started.
172
173 Takes a pointer to a struct cxl_ioctl_start_work:
174
175 struct cxl_ioctl_start_work {
176 __u64 flags;
177 __u64 work_element_descriptor;
178 __u64 amr;
179 __s16 num_interrupts;
180 __s16 reserved1;
181 __s32 reserved2;
182 __u64 reserved3;
183 __u64 reserved4;
184 __u64 reserved5;
185 __u64 reserved6;
186 };
187
188 flags:
189 Indicates which optional fields in the structure are
190 valid.
191
192 work_element_descriptor:
193 The Work Element Descriptor (WED) is a 64-bit argument
194 defined by the AFU. Typically this is an effective
195 address pointing to an AFU specific structure
196 describing what work to perform.
197
198 amr:
199 Authority Mask Register (AMR), same as the powerpc
200 AMR. This field is only used by the kernel when the
201 corresponding CXL_START_WORK_AMR value is specified in
202 flags. If not specified the kernel will use a default
203 value of 0.
204
205 num_interrupts:
206 Number of userspace interrupts to request. This field
207 is only used by the kernel when the corresponding
208 CXL_START_WORK_NUM_IRQS value is specified in flags.
209 If not specified the minimum number required by the
210 AFU will be allocated. The min and max number can be
211 obtained from sysfs.
212
213 reserved fields:
214 For ABI padding and future extensions
215
216 CXL_IOCTL_GET_PROCESS_ELEMENT:
217 Get the current context id, also known as the process element.
218 The value is returned from the kernel as a __u32.
219
220
221mmap
222----
223
224 An AFU may have an MMIO space to facilitate communication with the
225 AFU. If it does, the MMIO space can be accessed via mmap. The size
226 and contents of this area are specific to the particular AFU. The
227 size can be discovered via sysfs.
228
229 In AFU directed mode, master contexts are allowed to map all of
230 the MMIO space and slave contexts are allowed to only map the per
231 process MMIO space associated with the context. In dedicated
232 process mode the entire MMIO space can always be mapped.
233
234 This mmap call must be done after the START_WORK ioctl.
235
236 Care should be taken when accessing MMIO space. Only 32 and 64-bit
237 accesses are supported by POWER8. Also, the AFU will be designed
238 with a specific endianness, so all MMIO accesses should consider
239 endianness (recommend endian(3) variants like: le64toh(),
240 be64toh() etc). These endian issues equally apply to shared memory
241 queues the WED may describe.
242
243
244read
245----
246
247 Reads events from the AFU. Blocks if no events are pending
248 (unless O_NONBLOCK is supplied). Returns -EIO in the case of an
249 unrecoverable error or if the card is removed.
250
251 read() will always return an integral number of events.
252
253 The buffer passed to read() must be at least 4K bytes.
254
255 The result of the read will be a buffer of one or more events,
256 each event is of type struct cxl_event, of varying size.
257
258 struct cxl_event {
259 struct cxl_event_header header;
260 union {
261 struct cxl_event_afu_interrupt irq;
262 struct cxl_event_data_storage fault;
263 struct cxl_event_afu_error afu_error;
264 };
265 };
266
267 The struct cxl_event_header is defined as:
268
269 struct cxl_event_header {
270 __u16 type;
271 __u16 size;
272 __u16 process_element;
273 __u16 reserved1;
274 };
275
276 type:
277 This defines the type of event. The type determines how
278 the rest of the event is structured. These types are
279 described below and defined by enum cxl_event_type.
280
281 size:
282 This is the size of the event in bytes including the
283 struct cxl_event_header. The start of the next event can
284 be found at this offset from the start of the current
285 event.
286
287 process_element:
288 Context ID of the event.
289
290 reserved field:
291 For future extensions and padding.
292
293 If the event type is CXL_EVENT_AFU_INTERRUPT then the event
294 structure is defined as:
295
296 struct cxl_event_afu_interrupt {
297 __u16 flags;
298 __u16 irq; /* Raised AFU interrupt number */
299 __u32 reserved1;
300 };
301
302 flags:
303 These flags indicate which optional fields are present
304 in this struct. Currently all fields are mandatory.
305
306 irq:
307 The IRQ number sent by the AFU.
308
309 reserved field:
310 For future extensions and padding.
311
312 If the event type is CXL_EVENT_DATA_STORAGE then the event
313 structure is defined as:
314
315 struct cxl_event_data_storage {
316 __u16 flags;
317 __u16 reserved1;
318 __u32 reserved2;
319 __u64 addr;
320 __u64 dsisr;
321 __u64 reserved3;
322 };
323
324 flags:
325 These flags indicate which optional fields are present in
326 this struct. Currently all fields are mandatory.
327
328 address:
329 The address that the AFU unsuccessfully attempted to
330 access. Valid accesses will be handled transparently by the
331 kernel but invalid accesses will generate this event.
332
333 dsisr:
334 This field gives information on the type of fault. It is a
335 copy of the DSISR from the PSL hardware when the address
336 fault occurred. The form of the DSISR is as defined in the
337 CAIA.
338
339 reserved fields:
340 For future extensions
341
342 If the event type is CXL_EVENT_AFU_ERROR then the event structure
343 is defined as:
344
345 struct cxl_event_afu_error {
346 __u16 flags;
347 __u16 reserved1;
348 __u32 reserved2;
349 __u64 error;
350 };
351
352 flags:
353 These flags indicate which optional fields are present in
354 this struct. Currently all fields are Mandatory.
355
356 error:
357 Error status from the AFU. Defined by the AFU.
358
359 reserved fields:
360 For future extensions and padding
361
362Sysfs Class
363===========
364
365 A cxl sysfs class is added under /sys/class/cxl to facilitate
366 enumeration and tuning of the accelerators. Its layout is
367 described in Documentation/ABI/testing/sysfs-class-cxl
368
369Udev rules
370==========
371
372 The following udev rules could be used to create a symlink to the
373 most logical chardev to use in any programming mode (afuX.Yd for
374 dedicated, afuX.Ys for afu directed), since the API is virtually
375 identical for each:
376
377 SUBSYSTEM=="cxl", ATTRS{mode}=="dedicated_process", SYMLINK="cxl/%b"
378 SUBSYSTEM=="cxl", ATTRS{mode}=="afu_directed", \
379 KERNEL=="afu[0-9]*.[0-9]*s", SYMLINK="cxl/%b"
diff --git a/MAINTAINERS b/MAINTAINERS
index 809ecd680d88..facc2198eaba 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2711,6 +2711,18 @@ W: http://www.chelsio.com
2711S: Supported 2711S: Supported
2712F: drivers/net/ethernet/chelsio/cxgb4vf/ 2712F: drivers/net/ethernet/chelsio/cxgb4vf/
2713 2713
2714CXL (IBM Coherent Accelerator Processor Interface CAPI) DRIVER
2715M: Ian Munsie <imunsie@au1.ibm.com>
2716M: Michael Neuling <mikey@neuling.org>
2717L: linuxppc-dev@lists.ozlabs.org
2718S: Supported
2719F: drivers/misc/cxl/
2720F: include/misc/cxl.h
2721F: include/uapi/misc/cxl.h
2722F: Documentation/powerpc/cxl.txt
2723F: Documentation/powerpc/cxl.txt
2724F: Documentation/ABI/testing/sysfs-class-cxl
2725
2714STMMAC ETHERNET DRIVER 2726STMMAC ETHERNET DRIVER
2715M: Giuseppe Cavallaro <peppe.cavallaro@st.com> 2727M: Giuseppe Cavallaro <peppe.cavallaro@st.com>
2716L: netdev@vger.kernel.org 2728L: netdev@vger.kernel.org
diff --git a/include/uapi/misc/cxl.h b/include/uapi/misc/cxl.h
index c232be6ae21f..cd6d789b73ec 100644
--- a/include/uapi/misc/cxl.h
+++ b/include/uapi/misc/cxl.h
@@ -13,7 +13,7 @@
13#include <linux/types.h> 13#include <linux/types.h>
14#include <linux/ioctl.h> 14#include <linux/ioctl.h>
15 15
16/* Structs for IOCTLS for userspace to talk to the kernel */ 16
17struct cxl_ioctl_start_work { 17struct cxl_ioctl_start_work {
18 __u64 flags; 18 __u64 flags;
19 __u64 work_element_descriptor; 19 __u64 work_element_descriptor;
@@ -26,19 +26,20 @@ struct cxl_ioctl_start_work {
26 __u64 reserved5; 26 __u64 reserved5;
27 __u64 reserved6; 27 __u64 reserved6;
28}; 28};
29
29#define CXL_START_WORK_AMR 0x0000000000000001ULL 30#define CXL_START_WORK_AMR 0x0000000000000001ULL
30#define CXL_START_WORK_NUM_IRQS 0x0000000000000002ULL 31#define CXL_START_WORK_NUM_IRQS 0x0000000000000002ULL
31#define CXL_START_WORK_ALL (CXL_START_WORK_AMR |\ 32#define CXL_START_WORK_ALL (CXL_START_WORK_AMR |\
32 CXL_START_WORK_NUM_IRQS) 33 CXL_START_WORK_NUM_IRQS)
33 34
34/* IOCTL numbers */ 35/* ioctl numbers */
35#define CXL_MAGIC 0xCA 36#define CXL_MAGIC 0xCA
36#define CXL_IOCTL_START_WORK _IOW(CXL_MAGIC, 0x00, struct cxl_ioctl_start_work) 37#define CXL_IOCTL_START_WORK _IOW(CXL_MAGIC, 0x00, struct cxl_ioctl_start_work)
37#define CXL_IOCTL_GET_PROCESS_ELEMENT _IOR(CXL_MAGIC, 0x01, __u32) 38#define CXL_IOCTL_GET_PROCESS_ELEMENT _IOR(CXL_MAGIC, 0x01, __u32)
38 39
39/* Events from read() */
40#define CXL_READ_MIN_SIZE 0x1000 /* 4K */ 40#define CXL_READ_MIN_SIZE 0x1000 /* 4K */
41 41
42/* Events from read() */
42enum cxl_event_type { 43enum cxl_event_type {
43 CXL_EVENT_RESERVED = 0, 44 CXL_EVENT_RESERVED = 0,
44 CXL_EVENT_AFU_INTERRUPT = 1, 45 CXL_EVENT_AFU_INTERRUPT = 1,
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-24 01:24:46 -0500