diff options
-rw-r--r-- | drivers/net/igb/e1000_82575.c | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c index cc58227af424..187622f1c816 100644 --- a/drivers/net/igb/e1000_82575.c +++ b/drivers/net/igb/e1000_82575.c | |||
@@ -63,6 +63,7 @@ static bool igb_sgmii_active_82575(struct e1000_hw *); | |||
63 | static s32 igb_reset_init_script_82575(struct e1000_hw *); | 63 | static s32 igb_reset_init_script_82575(struct e1000_hw *); |
64 | static s32 igb_read_mac_addr_82575(struct e1000_hw *); | 64 | static s32 igb_read_mac_addr_82575(struct e1000_hw *); |
65 | static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw); | 65 | static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw); |
66 | static s32 igb_reset_mdicnfg_82580(struct e1000_hw *hw); | ||
66 | 67 | ||
67 | static const u16 e1000_82580_rxpbs_table[] = | 68 | static const u16 e1000_82580_rxpbs_table[] = |
68 | { 36, 72, 144, 1, 2, 4, 8, 16, | 69 | { 36, 72, 144, 1, 2, 4, 8, 16, |
@@ -159,20 +160,15 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw) | |||
159 | switch (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK) { | 160 | switch (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK) { |
160 | case E1000_CTRL_EXT_LINK_MODE_SGMII: | 161 | case E1000_CTRL_EXT_LINK_MODE_SGMII: |
161 | dev_spec->sgmii_active = true; | 162 | dev_spec->sgmii_active = true; |
162 | ctrl_ext |= E1000_CTRL_I2C_ENA; | ||
163 | break; | 163 | break; |
164 | case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX: | 164 | case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX: |
165 | case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES: | 165 | case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES: |
166 | hw->phy.media_type = e1000_media_type_internal_serdes; | 166 | hw->phy.media_type = e1000_media_type_internal_serdes; |
167 | ctrl_ext |= E1000_CTRL_I2C_ENA; | ||
168 | break; | 167 | break; |
169 | default: | 168 | default: |
170 | ctrl_ext &= ~E1000_CTRL_I2C_ENA; | ||
171 | break; | 169 | break; |
172 | } | 170 | } |
173 | 171 | ||
174 | wr32(E1000_CTRL_EXT, ctrl_ext); | ||
175 | |||
176 | /* Set mta register count */ | 172 | /* Set mta register count */ |
177 | mac->mta_reg_count = 128; | 173 | mac->mta_reg_count = 128; |
178 | /* Set rar entry count */ | 174 | /* Set rar entry count */ |
@@ -250,11 +246,19 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw) | |||
250 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; | 246 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; |
251 | phy->reset_delay_us = 100; | 247 | phy->reset_delay_us = 100; |
252 | 248 | ||
249 | ctrl_ext = rd32(E1000_CTRL_EXT); | ||
250 | |||
253 | /* PHY function pointers */ | 251 | /* PHY function pointers */ |
254 | if (igb_sgmii_active_82575(hw)) | 252 | if (igb_sgmii_active_82575(hw)) { |
255 | phy->ops.reset = igb_phy_hw_reset_sgmii_82575; | 253 | phy->ops.reset = igb_phy_hw_reset_sgmii_82575; |
256 | else | 254 | ctrl_ext |= E1000_CTRL_I2C_ENA; |
255 | } else { | ||
257 | phy->ops.reset = igb_phy_hw_reset; | 256 | phy->ops.reset = igb_phy_hw_reset; |
257 | ctrl_ext &= ~E1000_CTRL_I2C_ENA; | ||
258 | } | ||
259 | |||
260 | wr32(E1000_CTRL_EXT, ctrl_ext); | ||
261 | igb_reset_mdicnfg_82580(hw); | ||
258 | 262 | ||
259 | if (igb_sgmii_active_82575(hw) && !igb_sgmii_uses_mdio_82575(hw)) { | 263 | if (igb_sgmii_active_82575(hw) && !igb_sgmii_uses_mdio_82575(hw)) { |
260 | phy->ops.read_reg = igb_read_phy_reg_sgmii_82575; | 264 | phy->ops.read_reg = igb_read_phy_reg_sgmii_82575; |