diff options
-rw-r--r-- | arch/arm/boot/dts/imx51-babbage.dts | 6 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx51.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53-ard.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53-evk.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53-qsb.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53-smd.dts | 6 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53.dtsi | 20 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6q-sabreauto.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 20 |
9 files changed, 36 insertions, 36 deletions
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index ed09dc1a2bb4..564cb8c19f15 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts | |||
@@ -40,7 +40,7 @@ | |||
40 | status = "okay"; | 40 | status = "okay"; |
41 | }; | 41 | }; |
42 | 42 | ||
43 | uart2: uart@7000c000 { /* UART3 */ | 43 | uart3: uart@7000c000 { |
44 | fsl,uart-has-rtscts; | 44 | fsl,uart-has-rtscts; |
45 | status = "okay"; | 45 | status = "okay"; |
46 | }; | 46 | }; |
@@ -90,12 +90,12 @@ | |||
90 | reg = <0x73fa8000 0x4000>; | 90 | reg = <0x73fa8000 0x4000>; |
91 | }; | 91 | }; |
92 | 92 | ||
93 | uart0: uart@73fbc000 { | 93 | uart1: uart@73fbc000 { |
94 | fsl,uart-has-rtscts; | 94 | fsl,uart-has-rtscts; |
95 | status = "okay"; | 95 | status = "okay"; |
96 | }; | 96 | }; |
97 | 97 | ||
98 | uart1: uart@73fc0000 { | 98 | uart2: uart@73fc0000 { |
99 | status = "okay"; | 99 | status = "okay"; |
100 | }; | 100 | }; |
101 | }; | 101 | }; |
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 57a790df28fc..6663986fe1c8 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi | |||
@@ -14,9 +14,9 @@ | |||
14 | 14 | ||
15 | / { | 15 | / { |
16 | aliases { | 16 | aliases { |
17 | serial0 = &uart0; | 17 | serial0 = &uart1; |
18 | serial1 = &uart1; | 18 | serial1 = &uart2; |
19 | serial2 = &uart2; | 19 | serial2 = &uart3; |
20 | }; | 20 | }; |
21 | 21 | ||
22 | tzic: tz-interrupt-controller@e0000000 { | 22 | tzic: tz-interrupt-controller@e0000000 { |
@@ -86,7 +86,7 @@ | |||
86 | status = "disabled"; | 86 | status = "disabled"; |
87 | }; | 87 | }; |
88 | 88 | ||
89 | uart2: uart@7000c000 { /* UART3 */ | 89 | uart3: uart@7000c000 { |
90 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; | 90 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
91 | reg = <0x7000c000 0x4000>; | 91 | reg = <0x7000c000 0x4000>; |
92 | interrupts = <33>; | 92 | interrupts = <33>; |
@@ -171,14 +171,14 @@ | |||
171 | status = "disabled"; | 171 | status = "disabled"; |
172 | }; | 172 | }; |
173 | 173 | ||
174 | uart0: uart@73fbc000 { | 174 | uart1: uart@73fbc000 { |
175 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; | 175 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
176 | reg = <0x73fbc000 0x4000>; | 176 | reg = <0x73fbc000 0x4000>; |
177 | interrupts = <31>; | 177 | interrupts = <31>; |
178 | status = "disabled"; | 178 | status = "disabled"; |
179 | }; | 179 | }; |
180 | 180 | ||
181 | uart1: uart@73fc0000 { | 181 | uart2: uart@73fc0000 { |
182 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; | 182 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
183 | reg = <0x73fc0000 0x4000>; | 183 | reg = <0x73fc0000 0x4000>; |
184 | interrupts = <32>; | 184 | interrupts = <32>; |
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts index 78c949e18ce0..2dccce46ed81 100644 --- a/arch/arm/boot/dts/imx53-ard.dts +++ b/arch/arm/boot/dts/imx53-ard.dts | |||
@@ -44,7 +44,7 @@ | |||
44 | reg = <0x53fa8000 0x4000>; | 44 | reg = <0x53fa8000 0x4000>; |
45 | }; | 45 | }; |
46 | 46 | ||
47 | uart0: uart@53fbc000 { /* UART1 */ | 47 | uart1: uart@53fbc000 { |
48 | status = "okay"; | 48 | status = "okay"; |
49 | }; | 49 | }; |
50 | }; | 50 | }; |
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts index 964743e39eb7..5bac4aa4800b 100644 --- a/arch/arm/boot/dts/imx53-evk.dts +++ b/arch/arm/boot/dts/imx53-evk.dts | |||
@@ -75,7 +75,7 @@ | |||
75 | reg = <0x53fa8000 0x4000>; | 75 | reg = <0x53fa8000 0x4000>; |
76 | }; | 76 | }; |
77 | 77 | ||
78 | uart0: uart@53fbc000 { /* UART1 */ | 78 | uart1: uart@53fbc000 { |
79 | status = "okay"; | 79 | status = "okay"; |
80 | }; | 80 | }; |
81 | }; | 81 | }; |
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index cc43bde92ac9..5c57c8672c36 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts | |||
@@ -49,7 +49,7 @@ | |||
49 | reg = <0x53fa8000 0x4000>; | 49 | reg = <0x53fa8000 0x4000>; |
50 | }; | 50 | }; |
51 | 51 | ||
52 | uart0: uart@53fbc000 { /* UART1 */ | 52 | uart1: uart@53fbc000 { |
53 | status = "okay"; | 53 | status = "okay"; |
54 | }; | 54 | }; |
55 | }; | 55 | }; |
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts index 9e51bc371efb..c7ee86c2dfb5 100644 --- a/arch/arm/boot/dts/imx53-smd.dts +++ b/arch/arm/boot/dts/imx53-smd.dts | |||
@@ -39,7 +39,7 @@ | |||
39 | status = "okay"; | 39 | status = "okay"; |
40 | }; | 40 | }; |
41 | 41 | ||
42 | uart2: uart@5000c000 { /* UART3 */ | 42 | uart3: uart@5000c000 { |
43 | fsl,uart-has-rtscts; | 43 | fsl,uart-has-rtscts; |
44 | status = "okay"; | 44 | status = "okay"; |
45 | }; | 45 | }; |
@@ -90,11 +90,11 @@ | |||
90 | reg = <0x53fa8000 0x4000>; | 90 | reg = <0x53fa8000 0x4000>; |
91 | }; | 91 | }; |
92 | 92 | ||
93 | uart0: uart@53fbc000 { /* UART1 */ | 93 | uart1: uart@53fbc000 { |
94 | status = "okay"; | 94 | status = "okay"; |
95 | }; | 95 | }; |
96 | 96 | ||
97 | uart1: uart@53fc0000 { /* UART2 */ | 97 | uart2: uart@53fc0000 { |
98 | status = "okay"; | 98 | status = "okay"; |
99 | }; | 99 | }; |
100 | }; | 100 | }; |
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 3b15cdc608ea..5dd91b942c91 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi | |||
@@ -14,11 +14,11 @@ | |||
14 | 14 | ||
15 | / { | 15 | / { |
16 | aliases { | 16 | aliases { |
17 | serial0 = &uart0; | 17 | serial0 = &uart1; |
18 | serial1 = &uart1; | 18 | serial1 = &uart2; |
19 | serial2 = &uart2; | 19 | serial2 = &uart3; |
20 | serial3 = &uart3; | 20 | serial3 = &uart4; |
21 | serial4 = &uart4; | 21 | serial4 = &uart5; |
22 | }; | 22 | }; |
23 | 23 | ||
24 | tzic: tz-interrupt-controller@0fffc000 { | 24 | tzic: tz-interrupt-controller@0fffc000 { |
@@ -88,7 +88,7 @@ | |||
88 | status = "disabled"; | 88 | status = "disabled"; |
89 | }; | 89 | }; |
90 | 90 | ||
91 | uart2: uart@5000c000 { /* UART3 */ | 91 | uart3: uart@5000c000 { |
92 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | 92 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
93 | reg = <0x5000c000 0x4000>; | 93 | reg = <0x5000c000 0x4000>; |
94 | interrupts = <33>; | 94 | interrupts = <33>; |
@@ -173,14 +173,14 @@ | |||
173 | status = "disabled"; | 173 | status = "disabled"; |
174 | }; | 174 | }; |
175 | 175 | ||
176 | uart0: uart@53fbc000 { /* UART1 */ | 176 | uart1: uart@53fbc000 { |
177 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | 177 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
178 | reg = <0x53fbc000 0x4000>; | 178 | reg = <0x53fbc000 0x4000>; |
179 | interrupts = <31>; | 179 | interrupts = <31>; |
180 | status = "disabled"; | 180 | status = "disabled"; |
181 | }; | 181 | }; |
182 | 182 | ||
183 | uart1: uart@53fc0000 { /* UART2 */ | 183 | uart2: uart@53fc0000 { |
184 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | 184 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
185 | reg = <0x53fc0000 0x4000>; | 185 | reg = <0x53fc0000 0x4000>; |
186 | interrupts = <32>; | 186 | interrupts = <32>; |
@@ -226,7 +226,7 @@ | |||
226 | status = "disabled"; | 226 | status = "disabled"; |
227 | }; | 227 | }; |
228 | 228 | ||
229 | uart3: uart@53ff0000 { /* UART4 */ | 229 | uart4: uart@53ff0000 { |
230 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | 230 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
231 | reg = <0x53ff0000 0x4000>; | 231 | reg = <0x53ff0000 0x4000>; |
232 | interrupts = <13>; | 232 | interrupts = <13>; |
@@ -241,7 +241,7 @@ | |||
241 | reg = <0x60000000 0x10000000>; | 241 | reg = <0x60000000 0x10000000>; |
242 | ranges; | 242 | ranges; |
243 | 243 | ||
244 | uart4: uart@63f90000 { /* UART5 */ | 244 | uart5: uart@63f90000 { |
245 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | 245 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
246 | reg = <0x63f90000 0x4000>; | 246 | reg = <0x63f90000 0x4000>; |
247 | interrupts = <86>; | 247 | interrupts = <86>; |
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts index cd11ab0b85b9..eef6d640e655 100644 --- a/arch/arm/boot/dts/imx6q-sabreauto.dts +++ b/arch/arm/boot/dts/imx6q-sabreauto.dts | |||
@@ -44,7 +44,7 @@ | |||
44 | status = "okay"; | 44 | status = "okay"; |
45 | }; | 45 | }; |
46 | 46 | ||
47 | uart3: uart@021f0000 { /* UART4 */ | 47 | uart4: uart@021f0000 { |
48 | status = "okay"; | 48 | status = "okay"; |
49 | }; | 49 | }; |
50 | }; | 50 | }; |
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 9d0bf4b4fb37..263e8f3664b5 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi | |||
@@ -14,11 +14,11 @@ | |||
14 | 14 | ||
15 | / { | 15 | / { |
16 | aliases { | 16 | aliases { |
17 | serial0 = &uart0; | 17 | serial0 = &uart1; |
18 | serial1 = &uart1; | 18 | serial1 = &uart2; |
19 | serial2 = &uart2; | 19 | serial2 = &uart3; |
20 | serial3 = &uart3; | 20 | serial3 = &uart4; |
21 | serial4 = &uart4; | 21 | serial4 = &uart5; |
22 | }; | 22 | }; |
23 | 23 | ||
24 | cpus { | 24 | cpus { |
@@ -165,7 +165,7 @@ | |||
165 | status = "disabled"; | 165 | status = "disabled"; |
166 | }; | 166 | }; |
167 | 167 | ||
168 | uart0: uart@02020000 { /* UART1 */ | 168 | uart1: uart@02020000 { |
169 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 169 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
170 | reg = <0x02020000 0x4000>; | 170 | reg = <0x02020000 0x4000>; |
171 | interrupts = <0 26 0x04>; | 171 | interrupts = <0 26 0x04>; |
@@ -543,28 +543,28 @@ | |||
543 | interrupts = <0 18 0x04>; | 543 | interrupts = <0 18 0x04>; |
544 | }; | 544 | }; |
545 | 545 | ||
546 | uart1: uart@021e8000 { /* UART2 */ | 546 | uart2: uart@021e8000 { |
547 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 547 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
548 | reg = <0x021e8000 0x4000>; | 548 | reg = <0x021e8000 0x4000>; |
549 | interrupts = <0 27 0x04>; | 549 | interrupts = <0 27 0x04>; |
550 | status = "disabled"; | 550 | status = "disabled"; |
551 | }; | 551 | }; |
552 | 552 | ||
553 | uart2: uart@021ec000 { /* UART3 */ | 553 | uart3: uart@021ec000 { |
554 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 554 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
555 | reg = <0x021ec000 0x4000>; | 555 | reg = <0x021ec000 0x4000>; |
556 | interrupts = <0 28 0x04>; | 556 | interrupts = <0 28 0x04>; |
557 | status = "disabled"; | 557 | status = "disabled"; |
558 | }; | 558 | }; |
559 | 559 | ||
560 | uart3: uart@021f0000 { /* UART4 */ | 560 | uart4: uart@021f0000 { |
561 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 561 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
562 | reg = <0x021f0000 0x4000>; | 562 | reg = <0x021f0000 0x4000>; |
563 | interrupts = <0 29 0x04>; | 563 | interrupts = <0 29 0x04>; |
564 | status = "disabled"; | 564 | status = "disabled"; |
565 | }; | 565 | }; |
566 | 566 | ||
567 | uart4: uart@021f4000 { /* UART5 */ | 567 | uart5: uart@021f4000 { |
568 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 568 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
569 | reg = <0x021f4000 0x4000>; | 569 | reg = <0x021f4000 0x4000>; |
570 | interrupts = <0 30 0x04>; | 570 | interrupts = <0 30 0x04>; |