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-rw-r--r--arch/arm/mach-mx2/Makefile2
-rw-r--r--arch/arm/plat-mxc/Makefile2
-rw-r--r--arch/arm/plat-mxc/include/mach/system.h5
-rw-r--r--arch/arm/plat-mxc/system.c (renamed from arch/arm/mach-mx2/system.c)50
4 files changed, 30 insertions, 29 deletions
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-mx2/Makefile
index 6e1a2bffc812..950649a91540 100644
--- a/arch/arm/mach-mx2/Makefile
+++ b/arch/arm/mach-mx2/Makefile
@@ -4,7 +4,7 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := system.o generic.o devices.o serial.o 7obj-y := generic.o devices.o serial.o
8 8
9obj-$(CONFIG_MACH_MX21) += clock_imx21.o 9obj-$(CONFIG_MACH_MX21) += clock_imx21.o
10 10
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 564fd4ebf38a..055406312b69 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o 6obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o
7 7
8obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o 8obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o
9obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o 9obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index cd03ebaa49bc..e56241af870e 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -26,9 +26,6 @@ static inline void arch_idle(void)
26 cpu_do_idle(); 26 cpu_do_idle();
27} 27}
28 28
29static inline void arch_reset(char mode, const char *cmd) 29void arch_reset(char mode, const char *cmd);
30{
31 cpu_reset(0);
32}
33 30
34#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ 31#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */
diff --git a/arch/arm/mach-mx2/system.c b/arch/arm/plat-mxc/system.c
index 92c79d4bd162..79c37577c916 100644
--- a/arch/arm/mach-mx2/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -3,6 +3,7 @@
3 * Copyright (C) 2000 Deep Blue Solutions Ltd 3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. 4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de 5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
6 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -22,42 +23,45 @@
22#include <linux/kernel.h> 23#include <linux/kernel.h>
23#include <linux/clk.h> 24#include <linux/clk.h>
24#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/err.h>
27#include <linux/delay.h>
25 28
26#include <mach/hardware.h> 29#include <mach/hardware.h>
27#include <asm/proc-fns.h> 30#include <asm/proc-fns.h>
28#include <asm/system.h> 31#include <asm/system.h>
29 32
30/* 33#ifdef CONFIG_ARCH_MX1
31 * Put the CPU into idle mode. It is called by default_idle() 34#define WDOG_WCR_REG IO_ADDRESS(WDT_BASE_ADDR)
32 * in process.c file. 35#define WDOG_WCR_ENABLE (1 << 0)
33 */ 36#else
34void arch_idle(void) 37#define WDOG_WCR_REG IO_ADDRESS(WDOG_BASE_ADDR)
35{ 38#define WDOG_WCR_ENABLE (1 << 2)
36 /* 39#endif
37 * This should do all the clock switching
38 * and wait for interrupt tricks.
39 */
40 cpu_do_idle();
41}
42
43#define WDOG_WCR_REG IO_ADDRESS(WDOG_BASE_ADDR)
44#define WDOG_WCR_SRS (1 << 4)
45 40
46/* 41/*
47 * Reset the system. It is called by machine_restart(). 42 * Reset the system. It is called by machine_restart().
48 */ 43 */
49void arch_reset(char mode, const char *cmd) 44void arch_reset(char mode, const char *cmd)
50{ 45{
51 struct clk *clk; 46 if (!cpu_is_mx1()) {
47 struct clk *clk;
52 48
53 clk = clk_get(NULL, "wdog_clk"); 49 clk = clk_get_sys("imx-wdt.0", NULL);
54 if (!clk) { 50 if (!IS_ERR(clk))
55 printk(KERN_ERR"Cannot activate the watchdog. Giving up\n"); 51 clk_enable(clk);
56 return;
57 } 52 }
58 53
59 clk_enable(clk);
60
61 /* Assert SRS signal */ 54 /* Assert SRS signal */
62 __raw_writew(__raw_readw(WDOG_WCR_REG) & ~WDOG_WCR_SRS, WDOG_WCR_REG); 55 __raw_writew(WDOG_WCR_ENABLE, WDOG_WCR_REG);
56
57 /* wait for reset to assert... */
58 mdelay(500);
59
60 printk(KERN_ERR "Watchdog reset failed to assert reset\n");
61
62 /* delay to allow the serial port to show the message */
63 mdelay(50);
64
65 /* we'll take a jump through zero as a poor second */
66 cpu_reset(0);
63} 67}