105 files changed, 836 insertions, 1776 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 4ea80bc4ef9b..9ce3e54a77c4 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -36,7 +36,6 @@
 #include <mach/regs-irq.h>
 #include <mach/regs-pmu.h>
 #include <mach/regs-gpio.h>
-#include <mach/pmu.h>
 #include <plat/cpu.h>
 #include <plat/clock.h>
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 12f2f1117e99..feefc86293c2 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -64,4 +64,24 @@ extern struct smp_operations exynos_smp_ops;
 extern void exynos_cpu_die(unsigned int cpu);
+/* PMU(Power Management Unit) support */
+#define PMU_TABLE_END   NULL
+enum sys_powerdown {
+        SYS_AFTR,
+        SYS_LPA,
+        SYS_SLEEP,
+        NUM_SYS_POWERDOWN,
+};
+extern unsigned long l2x0_regs_phys;
+struct exynos_pmu_conf {
+        void __iomem *reg;
+        unsigned int val[NUM_SYS_POWERDOWN];
+};
+extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern void s3c_cpu_resume(void);
 #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 050924152776..fcfe0251aa3e 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -23,10 +23,11 @@
 #include <asm/cpuidle.h>
 #include <mach/regs-clock.h>
 #include <mach/regs-pmu.h>
-#include <mach/pmu.h>
 #include <plat/cpu.h>
+#include "common.h"
 #define REG_DIRECTGO_ADDR       (samsung_rev() == EXYNOS4210_REV_1_1 ? \
                        S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
                        (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c
index 9d1a60951d7b..c662c89794b2 100644
--- a/arch/arm/mach-exynos/dev-audio.c
+++ b/arch/arm/mach-exynos/dev-audio.c
@@ -21,7 +21,8 @@
 #include <mach/map.h>
 #include <mach/dma.h>
 #include <mach/irqs.h>
-#include <mach/regs-audss.h>
+#define EXYNOS4_AUDSS_INT_MEM   (0x03000000)
 static int exynos4_cfg_i2s(struct platform_device *pdev)
 {
diff --git a/arch/arm/mach-exynos/include/mach/pmu.h b/arch/arm/mach-exynos/include/mach/pmu.h
deleted file mode 100644
index 7c27c2d4bf44..000000000000
--- a/arch/arm/mach-exynos/include/mach/pmu.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/pmu.h
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * EXYNOS4210 - PMU(Power Management Unit) support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_PMU_H
-#define __ASM_ARCH_PMU_H __FILE__
-#define PMU_TABLE_END   NULL
-enum sys_powerdown {
-        SYS_AFTR,
-        SYS_LPA,
-        SYS_SLEEP,
-        NUM_SYS_POWERDOWN,
-};
-extern unsigned long l2x0_regs_phys;
-struct exynos_pmu_conf {
-        void __iomem *reg;
-        unsigned int val[NUM_SYS_POWERDOWN];
-};
-extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
-extern void s3c_cpu_resume(void);
-#endif /* __ASM_ARCH_PMU_H */
diff --git a/arch/arm/mach-exynos/include/mach/regs-audss.h b/arch/arm/mach-exynos/include/mach/regs-audss.h
deleted file mode 100644
index ca5a8b64218a..000000000000
--- a/arch/arm/mach-exynos/include/mach/regs-audss.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-exynos4/include/mach/regs-audss.h
- *
- * Copyright (c) 2011 Samsung Electronics
- *              http://www.samsung.com
- *
- * Exynos4 Audio SubSystem clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __PLAT_REGS_AUDSS_H
-#define __PLAT_REGS_AUDSS_H __FILE__
-#define EXYNOS4_AUDSS_INT_MEM   (0x03000000)
-#endif /* _PLAT_REGS_AUDSS_H */
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index b9b539cac81e..f459afda822a 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -34,7 +34,8 @@
 #include <mach/regs-clock.h>
 #include <mach/regs-pmu.h>
 #include <mach/pm-core.h>
-#include <mach/pmu.h>
+#include "common.h"
 static struct sleep_save exynos4_set_clksrc[] = {
        { .reg = EXYNOS4_CLKSRC_MASK_TOP                , .val = 0x00000001, },
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 3a48c852be6c..daebc1abc966 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -14,7 +14,8 @@
 #include <linux/bug.h>
 #include <mach/regs-clock.h>
-#include <mach/pmu.h>
+#include "common.h"
 static struct exynos_pmu_conf *exynos_pmu_config;
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
index c46092439814..0ddd17fa067e 100644
--- a/arch/arm/mach-s3c2440/Makefile
+++ b/arch/arm/mach-s3c2440/Makefile
@@ -9,8 +9,6 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
-obj-$(CONFIG_CPU_S3C2440)       += dsc.o
 obj-$(CONFIG_S3C2440_CPUFREQ)   += s3c2440-cpufreq.o
 obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c
deleted file mode 100644
index 9ea66e31f626..000000000000
--- a/arch/arm/mach-s3c2440/dsc.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/* linux/arch/arm/mach-s3c2440/dsc.c
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- *   Ben Dooks <ben@simtec.co.uk>
- *
- * Samsung S3C2440 Drive Strength Control support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/io.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <mach/hardware.h>
-#include <asm/irq.h>
-#include <mach/regs-gpio.h>
-#include <mach/regs-dsc.h>
-#include <plat/cpu.h>
-#include <plat/s3c244x.h>
-int s3c2440_set_dsc(unsigned int pin, unsigned int value)
-{
-        void __iomem *base;
-        unsigned long val;
-        unsigned long flags;
-        unsigned long mask;
-        base = (pin & S3C2440_SELECT_DSC1) ? S3C2440_DSC1 : S3C2440_DSC0;
-        mask = 3 << S3C2440_DSC_GETSHIFT(pin);
-        local_irq_save(flags);
-        val = __raw_readl(base);
-        val &= ~mask;
-        val |= value & mask;
-        __raw_writel(val, base);
-        local_irq_restore(flags);
-        return 0;
-}
-EXPORT_SYMBOL(s3c2440_set_dsc);
diff --git a/arch/arm/mach-s3c24xx/anubis.h b/arch/arm/mach-s3c24xx/anubis.h
new file mode 100644
index 000000000000..2691665f27d9
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/anubis.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005 Simtec Electronics
+ *      http://www.simtec.co.uk/products/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * ANUBIS - CPLD control constants
+ * ANUBIS - IRQ Number definitions
+ * ANUBIS - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#ifndef __MACH_S3C24XX_ANUBIS_H
+#define __MACH_S3C24XX_ANUBIS_H __FILE__
+/* CTRL2 - NAND WP control, IDE Reset assert/check */
+#define ANUBIS_CTRL1_NANDSEL            (0x3)
+/* IDREG - revision */
+#define ANUBIS_IDREG_REVMASK            (0x7)
+/* irq */
+#define ANUBIS_IRQ_IDE0                 IRQ_EINT2
+#define ANUBIS_IRQ_IDE1                 IRQ_EINT3
+#define ANUBIS_IRQ_ASIX                 IRQ_EINT1
+/* map */
+/* start peripherals off after the S3C2410 */
+#define ANUBIS_IOADDR(x)                (S3C2410_ADDR((x) + 0x01800000))
+#define ANUBIS_PA_CPLD                  (S3C2410_CS1 | (1<<26))
+/* we put the CPLD registers next, to get them out of the way */
+#define ANUBIS_VA_CTRL1                 ANUBIS_IOADDR(0x00000000)
+#define ANUBIS_PA_CTRL1                 ANUBIS_PA_CPLD
+#define ANUBIS_VA_IDREG                 ANUBIS_IOADDR(0x00300000)
+#define ANUBIS_PA_IDREG                 (ANUBIS_PA_CPLD + (3 << 23))
+#define ANUBIS_IDEPRI                   ANUBIS_IOADDR(0x01000000)
+#define ANUBIS_IDEPRIAUX                ANUBIS_IOADDR(0x01100000)
+#define ANUBIS_IDESEC                   ANUBIS_IOADDR(0x01200000)
+#define ANUBIS_IDESECAUX                ANUBIS_IOADDR(0x01300000)
+#endif /* __MACH_S3C24XX_ANUBIS_H */
diff --git a/arch/arm/mach-s3c24xx/bast-ide.c b/arch/arm/mach-s3c24xx/bast-ide.c
index ba02cf8d80a2..3f0288f2f542 100644
--- a/arch/arm/mach-s3c24xx/bast-ide.c
+++ b/arch/arm/mach-s3c24xx/bast-ide.c
@@ -25,8 +25,8 @@
 #include <asm/mach/irq.h>
 #include <mach/map.h>
-#include <mach/bast-map.h>
-#include <mach/bast-irq.h>
+#include "bast.h"
 /* IDE ports */
@@ -34,12 +34,10 @@ static struct pata_platform_info bast_ide_platdata = {
        .ioport_shift   = 5,
 };
-#define IDE_CS  S3C2410_CS5
 static struct resource bast_ide0_resource[] = {
-        [0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRI, 8 * 0x20),
+        [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRI, 8 * 0x20),
-        [1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20),
+        [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20),
-        [2] = DEFINE_RES_IRQ(IRQ_IDE0),
+        [2] = DEFINE_RES_IRQ(BAST_IRQ_IDE0),
 };
 static struct platform_device bast_device_ide0 = {
@@ -55,9 +53,9 @@ static struct platform_device bast_device_ide0 = {
 };
 static struct resource bast_ide1_resource[] = {
-        [0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESEC, 8 * 0x20),
+        [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESEC, 8 * 0x20),
-        [1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20),
+        [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20),
-        [2] = DEFINE_RES_IRQ(IRQ_IDE1),
+        [2] = DEFINE_RES_IRQ(BAST_IRQ_IDE1),
 };
 static struct platform_device bast_device_ide1 = {
diff --git a/arch/arm/mach-s3c24xx/bast-irq.c b/arch/arm/mach-s3c24xx/bast-irq.c
index ac7b2ad5c405..c0daa9590b4c 100644
--- a/arch/arm/mach-s3c24xx/bast-irq.c
+++ b/arch/arm/mach-s3c24xx/bast-irq.c
@@ -27,27 +27,20 @@
 #include <linux/device.h>
 #include <linux/io.h>
-#include <asm/mach-types.h>
-#include <mach/hardware.h>
 #include <asm/irq.h>
+#include <asm/mach-types.h>
 #include <asm/mach/irq.h>
+#include <mach/hardware.h>
 #include <mach/regs-irq.h>
-#include <mach/bast-map.h>
-#include <mach/bast-irq.h>
 #include <plat/irq.h>
-#if 0
+#include "bast.h"
-#include <asm/debug-ll.h>
-#endif
 #define irqdbf(x...)
 #define irqdbf2(x...)
 /* handle PC104 ISA interrupts from the system CPLD */
 /* table of ISA irq nos to the relevant mask... zero means
@@ -87,7 +80,7 @@ bast_pc104_mask(struct irq_data *data)
 static void
 bast_pc104_maskack(struct irq_data *data)
 {
-        struct irq_desc *desc = irq_desc + IRQ_ISA;
+        struct irq_desc *desc = irq_desc + BAST_IRQ_ISA;
        bast_pc104_mask(data);
        desc->irq_data.chip->irq_ack(&desc->irq_data);
@@ -122,7 +115,7 @@ bast_irq_pc104_demux(unsigned int irq,
        if (unlikely(stat == 0)) {
                /* ack if we get an irq with nothing (ie, startup) */
-                desc = irq_desc + IRQ_ISA;
+                desc = irq_desc + BAST_IRQ_ISA;
                desc->irq_data.chip->irq_ack(&desc->irq_data);
        } else {
                /* handle the IRQ */
@@ -147,7 +140,7 @@ static __init int bast_irq_init(void)
                __raw_writeb(0x0, BAST_VA_PC104_IRQMASK);
-                irq_set_chained_handler(IRQ_ISA, bast_irq_pc104_demux);
+                irq_set_chained_handler(BAST_IRQ_ISA, bast_irq_pc104_demux);
                /* register our IRQs */
diff --git a/arch/arm/mach-s3c24xx/bast.h b/arch/arm/mach-s3c24xx/bast.h
new file mode 100644
index 000000000000..5c7534bae92d
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/bast.h
@@ -0,0 +1,197 @@
+/*
+ * Copyright (c) 2003-2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * BAST - CPLD control constants
+ * BAST - IRQ Number definitions
+ * BAST - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#ifndef __MACH_S3C24XX_BAST_H
+#define __MACH_S3C24XX_BAST_H __FILE__
+/* CTRL1 - Audio LR routing */
+#define BAST_CPLD_CTRL1_LRCOFF          (0x00)
+#define BAST_CPLD_CTRL1_LRCADC          (0x01)
+#define BAST_CPLD_CTRL1_LRCDAC          (0x02)
+#define BAST_CPLD_CTRL1_LRCARM          (0x03)
+#define BAST_CPLD_CTRL1_LRMASK          (0x03)
+/* CTRL2 - NAND WP control, IDE Reset assert/check */
+#define BAST_CPLD_CTRL2_WNAND           (0x04)
+#define BAST_CPLD_CTLR2_IDERST          (0x08)
+/* CTRL3 - rom write control, CPLD identity */
+#define BAST_CPLD_CTRL3_IDMASK          (0x0e)
+#define BAST_CPLD_CTRL3_ROMWEN          (0x01)
+/* CTRL4 - 8bit LCD interface control/status */
+#define BAST_CPLD_CTRL4_LLAT            (0x01)
+#define BAST_CPLD_CTRL4_LCDRW           (0x02)
+#define BAST_CPLD_CTRL4_LCDCMD          (0x04)
+#define BAST_CPLD_CTRL4_LCDE2           (0x01)
+/* CTRL5 - DMA routing */
+#define BAST_CPLD_DMA0_PRIIDE           (0)
+#define BAST_CPLD_DMA0_SECIDE           (1)
+#define BAST_CPLD_DMA0_ISA15            (2)
+#define BAST_CPLD_DMA0_ISA36            (3)
+#define BAST_CPLD_DMA1_PRIIDE           (0 << 2)
+#define BAST_CPLD_DMA1_SECIDE           (1 << 2)
+#define BAST_CPLD_DMA1_ISA15            (2 << 2)
+#define BAST_CPLD_DMA1_ISA36            (3 << 2)
+/* irq numbers to onboard peripherals */
+#define BAST_IRQ_USBOC                  IRQ_EINT18
+#define BAST_IRQ_IDE0                   IRQ_EINT16
+#define BAST_IRQ_IDE1                   IRQ_EINT17
+#define BAST_IRQ_PCSERIAL1              IRQ_EINT15
+#define BAST_IRQ_PCSERIAL2              IRQ_EINT14
+#define BAST_IRQ_PCPARALLEL             IRQ_EINT13
+#define BAST_IRQ_ASIX                   IRQ_EINT11
+#define BAST_IRQ_DM9000                 IRQ_EINT10
+#define BAST_IRQ_ISA                    IRQ_EINT9
+#define BAST_IRQ_SMALERT                IRQ_EINT8
+/* map */
+/*
+ * ok, we've used up to 0x13000000, now we need to find space for the
+ * peripherals that live in the nGCS[x] areas, which are quite numerous
+ * in their space. We also have the board's CPLD to find register space
+ * for.
+ */
+#define BAST_IOADDR(x)                  (S3C2410_ADDR((x) + 0x01300000))
+/* we put the CPLD registers next, to get them out of the way */
+#define BAST_VA_CTRL1                   BAST_IOADDR(0x00000000)
+#define BAST_PA_CTRL1                   (S3C2410_CS5 | 0x7800000)
+#define BAST_VA_CTRL2                   BAST_IOADDR(0x00100000)
+#define BAST_PA_CTRL2                   (S3C2410_CS1 | 0x6000000)
+#define BAST_VA_CTRL3                   BAST_IOADDR(0x00200000)
+#define BAST_PA_CTRL3                   (S3C2410_CS1 | 0x6800000)
+#define BAST_VA_CTRL4                   BAST_IOADDR(0x00300000)
+#define BAST_PA_CTRL4                   (S3C2410_CS1 | 0x7000000)
+/* next, we have the PC104 ISA interrupt registers */
+#define BAST_PA_PC104_IRQREQ            (S3C2410_CS5 | 0x6000000)
+#define BAST_VA_PC104_IRQREQ            BAST_IOADDR(0x00400000)
+#define BAST_PA_PC104_IRQRAW            (S3C2410_CS5 | 0x6800000)
+#define BAST_VA_PC104_IRQRAW            BAST_IOADDR(0x00500000)
+#define BAST_PA_PC104_IRQMASK           (S3C2410_CS5 | 0x7000000)
+#define BAST_VA_PC104_IRQMASK           BAST_IOADDR(0x00600000)
+#define BAST_PA_LCD_RCMD1               (0x8800000)
+#define BAST_VA_LCD_RCMD1               BAST_IOADDR(0x00700000)
+#define BAST_PA_LCD_WCMD1               (0x8000000)
+#define BAST_VA_LCD_WCMD1               BAST_IOADDR(0x00800000)
+#define BAST_PA_LCD_RDATA1              (0x9800000)
+#define BAST_VA_LCD_RDATA1              BAST_IOADDR(0x00900000)
+#define BAST_PA_LCD_WDATA1              (0x9000000)
+#define BAST_VA_LCD_WDATA1              BAST_IOADDR(0x00A00000)
+#define BAST_PA_LCD_RCMD2               (0xA800000)
+#define BAST_VA_LCD_RCMD2               BAST_IOADDR(0x00B00000)
+#define BAST_PA_LCD_WCMD2               (0xA000000)
+#define BAST_VA_LCD_WCMD2               BAST_IOADDR(0x00C00000)
+#define BAST_PA_LCD_RDATA2              (0xB800000)
+#define BAST_VA_LCD_RDATA2              BAST_IOADDR(0x00D00000)
+#define BAST_PA_LCD_WDATA2              (0xB000000)
+#define BAST_VA_LCD_WDATA2              BAST_IOADDR(0x00E00000)
+/*
+ * 0xE0000000 contains the IO space that is split by speed and
+ * whether the access is for 8 or 16bit IO... this ensures that
+ * the correct access is made
+ *
+ * 0x10000000 of space, partitioned as so:
+ *
+ * 0x00000000 to 0x04000000  8bit,  slow
+ * 0x04000000 to 0x08000000  16bit, slow
+ * 0x08000000 to 0x0C000000  16bit, net
+ * 0x0C000000 to 0x10000000  16bit, fast
+ *
+ * each of these spaces has the following in:
+ *
+ * 0x00000000 to 0x01000000 16MB ISA IO space
+ * 0x01000000 to 0x02000000 16MB ISA memory space
+ * 0x02000000 to 0x02100000 1MB  IDE primary channel
+ * 0x02100000 to 0x02200000 1MB  IDE primary channel aux
+ * 0x02200000 to 0x02400000 1MB  IDE secondary channel
+ * 0x02300000 to 0x02400000 1MB  IDE secondary channel aux
+ * 0x02400000 to 0x02500000 1MB  ASIX ethernet controller
+ * 0x02500000 to 0x02600000 1MB  Davicom DM9000 ethernet controller
+ * 0x02600000 to 0x02700000 1MB  PC SuperIO controller
+ *
+ * the phyiscal layout of the zones are:
+ *  nGCS2 - 8bit, slow
+ *  nGCS3 - 16bit, slow
+ *  nGCS4 - 16bit, net
+ *  nGCS5 - 16bit, fast
+ */
+#define BAST_VA_MULTISPACE              (0xE0000000)
+#define BAST_VA_ISAIO                   (BAST_VA_MULTISPACE + 0x00000000)
+#define BAST_VA_ISAMEM                  (BAST_VA_MULTISPACE + 0x01000000)
+#define BAST_VA_IDEPRI                  (BAST_VA_MULTISPACE + 0x02000000)
+#define BAST_VA_IDEPRIAUX               (BAST_VA_MULTISPACE + 0x02100000)
+#define BAST_VA_IDESEC                  (BAST_VA_MULTISPACE + 0x02200000)
+#define BAST_VA_IDESECAUX               (BAST_VA_MULTISPACE + 0x02300000)
+#define BAST_VA_ASIXNET                 (BAST_VA_MULTISPACE + 0x02400000)
+#define BAST_VA_DM9000                  (BAST_VA_MULTISPACE + 0x02500000)
+#define BAST_VA_SUPERIO                 (BAST_VA_MULTISPACE + 0x02600000)
+#define BAST_VAM_CS2                    (0x00000000)
+#define BAST_VAM_CS3                    (0x04000000)
+#define BAST_VAM_CS4                    (0x08000000)
+#define BAST_VAM_CS5                    (0x0C000000)
+/* physical offset addresses for the peripherals */
+#define BAST_PA_ISAIO                   (0x00000000)
+#define BAST_PA_ASIXNET                 (0x01000000)
+#define BAST_PA_SUPERIO                 (0x01800000)
+#define BAST_PA_IDEPRI                  (0x02000000)
+#define BAST_PA_IDEPRIAUX               (0x02800000)
+#define BAST_PA_IDESEC                  (0x03000000)
+#define BAST_PA_IDESECAUX               (0x03800000)
+#define BAST_PA_ISAMEM                  (0x04000000)
+#define BAST_PA_DM9000                  (0x05000000)
+/* some configurations for the peripherals */
+#define BAST_PCSIO                      (BAST_VA_SUPERIO + BAST_VAM_CS2)
+#define BAST_ASIXNET_CS                 BAST_VAM_CS5
+#define BAST_DM9000_CS                  BAST_VAM_CS4
+#define BAST_IDE_CS     S3C2410_CS5
+#endif /* __MACH_S3C24XX_BAST_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/gta02.h b/arch/arm/mach-s3c24xx/gta02.h
index 217393482153..9430a71e9184 100644
--- a/arch/arm/mach-s3c24xx/include/mach/gta02.h
+++ b/arch/arm/mach-s3c24xx/gta02.h
@@ -1,5 +1,13 @@
-#ifndef _GTA02_H
+/*
-#define _GTA02_H
+ * GTA02 header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#ifndef __MACH_S3C24XX_GTA02_H
+#define __MACH_S3C24XX_GTA02_H __FILE__
 #include <mach/regs-gpio.h>
@@ -12,4 +20,4 @@
 #define GTA02_IRQ_PCF50633      IRQ_EINT9
-#endif /* _GTA02_H */
+#endif /* __MACH_S3C24XX_GTA02_H */
diff --git a/arch/arm/mach-s3c24xx/h1940-bluetooth.c b/arch/arm/mach-s3c24xx/h1940-bluetooth.c
index 3f40c61b6e02..5b98bfd1df43 100644
--- a/arch/arm/mach-s3c24xx/h1940-bluetooth.c
+++ b/arch/arm/mach-s3c24xx/h1940-bluetooth.c
@@ -19,10 +19,10 @@
 #include <linux/gpio.h>
 #include <linux/rfkill.h>
-#include <mach/regs-gpio.h>
 #include <mach/hardware.h>
-#include <mach/h1940-latch.h>
+#include <mach/regs-gpio.h>
-#include <mach/h1940.h>
+#include "h1940.h"
 #define DRV_NAME "h1940-bt"
diff --git a/arch/arm/mach-s3c24xx/include/mach/h1940-latch.h b/arch/arm/mach-s3c24xx/h1940.h
index fc897d3a056c..2950cc466840 100644
--- a/arch/arm/mach-s3c24xx/include/mach/h1940-latch.h
+++ b/arch/arm/mach-s3c24xx/h1940.h
@@ -1,20 +1,30 @@
-/* arch/arm/mach-s3c2410/include/mach/h1940-latch.h
+/*
+ * Copyright 2006 Ben Dooks <ben-linux@fluff.org>
 *
 * Copyright (c) 2005 Simtec Electronics
 *      http://armlinux.simtec.co.uk/
 *      Ben Dooks <ben@simtec.co.uk>
 *
- *  iPAQ H1940 series - latch definitions
+ * iPAQ H1940 series definitions
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
-#ifndef __ASM_ARCH_H1940_LATCH_H
+#ifndef __MACH_S3C24XX_H1940_H
-#define __ASM_ARCH_H1940_LATCH_H
+#define __MACH_S3C24XX_H1940_H __FILE__
-#include <asm/gpio.h>
+#define H1940_SUSPEND_CHECKSUM          (0x30003ff8)
+#define H1940_SUSPEND_RESUMEAT          (0x30081000)
+#define H1940_SUSPEND_CHECK             (0x30080000)
+extern void h1940_pm_return(void);
+extern int h1940_led_blink_set(unsigned gpio, int state,
+                               unsigned long *delay_on,
+                               unsigned long *delay_off);
+#include <linux/gpio.h>
 #define H1940_LATCH_GPIO(x)             (S3C_GPIO_END + (x))
@@ -40,4 +50,4 @@
 #define H1940_LATCH_LED_GREEN           H1940_LATCH_GPIO(14)
 #define H1940_LATCH_LED_FLASH           H1940_LATCH_GPIO(15)
-#endif /* __ASM_ARCH_H1940_LATCH_H */
+#endif /* __MACH_S3C24XX_H1940_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h b/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h
deleted file mode 100644
index 1b614d5a81f3..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/anubis-cpld.h
- *
- * Copyright (c) 2005 Simtec Electronics
- *      http://www.simtec.co.uk/products/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * ANUBIS - CPLD control constants
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_ANUBISCPLD_H
-#define __ASM_ARCH_ANUBISCPLD_H
-/* CTRL2 - NAND WP control, IDE Reset assert/check */
-#define ANUBIS_CTRL1_NANDSEL            (0x3)
-/* IDREG - revision */
-#define ANUBIS_IDREG_REVMASK            (0x7)
-#endif /* __ASM_ARCH_ANUBISCPLD_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h b/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h
deleted file mode 100644
index a2a328134e34..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/anubis-irq.h
- *
- * Copyright (c) 2005 Simtec Electronics
- *      http://www.simtec.co.uk/products/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- *  ANUBIS - IRQ Number definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_ANUBISIRQ_H
-#define __ASM_ARCH_ANUBISIRQ_H
-#define IRQ_IDE0       IRQ_EINT2
-#define IRQ_IDE1       IRQ_EINT3
-#define IRQ_ASIX       IRQ_EINT1
-#endif /* __ASM_ARCH_ANUBISIRQ_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/anubis-map.h b/arch/arm/mach-s3c24xx/include/mach/anubis-map.h
deleted file mode 100644
index c9deb3a5b2c3..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/anubis-map.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/anubis-map.h
- *
- * Copyright (c) 2005 Simtec Electronics
- *      http://www.simtec.co.uk/products/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * ANUBIS - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-/* needs arch/map.h including with this */
-#ifndef __ASM_ARCH_ANUBISMAP_H
-#define __ASM_ARCH_ANUBISMAP_H
-/* start peripherals off after the S3C2410 */
-#define ANUBIS_IOADDR(x)        (S3C2410_ADDR((x) + 0x01800000))
-#define ANUBIS_PA_CPLD          (S3C2410_CS1 | (1<<26))
-/* we put the CPLD registers next, to get them out of the way */
-#define ANUBIS_VA_CTRL1     ANUBIS_IOADDR(0x00000000)    /* 0x01800000 */
-#define ANUBIS_PA_CTRL1     (ANUBIS_PA_CPLD)
-#define ANUBIS_VA_IDREG     ANUBIS_IOADDR(0x00300000)    /* 0x01B00000 */
-#define ANUBIS_PA_IDREG     (ANUBIS_PA_CPLD + (3<<23))
-#define ANUBIS_IDEPRI       ANUBIS_IOADDR(0x01000000)
-#define ANUBIS_IDEPRIAUX    ANUBIS_IOADDR(0x01100000)
-#define ANUBIS_IDESEC       ANUBIS_IOADDR(0x01200000)
-#define ANUBIS_IDESECAUX    ANUBIS_IOADDR(0x01300000)
-#endif /* __ASM_ARCH_ANUBISMAP_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h b/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h
deleted file mode 100644
index bee2a7a932a0..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/bast-cpld.h
- *
- * Copyright (c) 2003-2004 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * BAST - CPLD control constants
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_BASTCPLD_H
-#define __ASM_ARCH_BASTCPLD_H
-/* CTRL1 - Audio LR routing */
-#define BAST_CPLD_CTRL1_LRCOFF      (0x00)
-#define BAST_CPLD_CTRL1_LRCADC      (0x01)
-#define BAST_CPLD_CTRL1_LRCDAC      (0x02)
-#define BAST_CPLD_CTRL1_LRCARM      (0x03)
-#define BAST_CPLD_CTRL1_LRMASK      (0x03)
-/* CTRL2 - NAND WP control, IDE Reset assert/check */
-#define BAST_CPLD_CTRL2_WNAND       (0x04)
-#define BAST_CPLD_CTLR2_IDERST      (0x08)
-/* CTRL3 - rom write control, CPLD identity */
-#define BAST_CPLD_CTRL3_IDMASK      (0x0e)
-#define BAST_CPLD_CTRL3_ROMWEN      (0x01)
-/* CTRL4 - 8bit LCD interface control/status */
-#define BAST_CPLD_CTRL4_LLAT        (0x01)
-#define BAST_CPLD_CTRL4_LCDRW       (0x02)
-#define BAST_CPLD_CTRL4_LCDCMD      (0x04)
-#define BAST_CPLD_CTRL4_LCDE2       (0x01)
-/* CTRL5 - DMA routing */
-#define BAST_CPLD_DMA0_PRIIDE      (0<<0)
-#define BAST_CPLD_DMA0_SECIDE      (1<<0)
-#define BAST_CPLD_DMA0_ISA15       (2<<0)
-#define BAST_CPLD_DMA0_ISA36       (3<<0)
-#define BAST_CPLD_DMA1_PRIIDE      (0<<2)
-#define BAST_CPLD_DMA1_SECIDE      (1<<2)
-#define BAST_CPLD_DMA1_ISA15       (2<<2)
-#define BAST_CPLD_DMA1_ISA36       (3<<2)
-#endif /* __ASM_ARCH_BASTCPLD_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-irq.h b/arch/arm/mach-s3c24xx/include/mach/bast-irq.h
deleted file mode 100644
index cac428c42e7f..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/bast-irq.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/bast-irq.h
- *
- * Copyright (c) 2003-2004 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * Machine BAST - IRQ Number definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_BASTIRQ_H
-#define __ASM_ARCH_BASTIRQ_H
-/* irq numbers to onboard peripherals */
-#define IRQ_USBOC      IRQ_EINT18
-#define IRQ_IDE0       IRQ_EINT16
-#define IRQ_IDE1       IRQ_EINT17
-#define IRQ_PCSERIAL1  IRQ_EINT15
-#define IRQ_PCSERIAL2  IRQ_EINT14
-#define IRQ_PCPARALLEL IRQ_EINT13
-#define IRQ_ASIX       IRQ_EINT11
-#define IRQ_DM9000     IRQ_EINT10
-#define IRQ_ISA        IRQ_EINT9
-#define IRQ_SMALERT    IRQ_EINT8
-#endif /* __ASM_ARCH_BASTIRQ_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-map.h b/arch/arm/mach-s3c24xx/include/mach/bast-map.h
deleted file mode 100644
index eecea2a50f8f..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/bast-map.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/bast-map.h
- *
- * Copyright (c) 2003-2004 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * Machine BAST - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-/* needs arch/map.h including with this */
-/* ok, we've used up to 0x13000000, now we need to find space for the
- * peripherals that live in the nGCS[x] areas, which are quite numerous
- * in their space. We also have the board's CPLD to find register space
- * for.
- */
-#ifndef __ASM_ARCH_BASTMAP_H
-#define __ASM_ARCH_BASTMAP_H
-#define BAST_IOADDR(x)     (S3C2410_ADDR((x) + 0x01300000))
-/* we put the CPLD registers next, to get them out of the way */
-#define BAST_VA_CTRL1       BAST_IOADDR(0x00000000)      /* 0x01300000 */
-#define BAST_PA_CTRL1       (S3C2410_CS5 | 0x7800000)
-#define BAST_VA_CTRL2       BAST_IOADDR(0x00100000)      /* 0x01400000 */
-#define BAST_PA_CTRL2       (S3C2410_CS1 | 0x6000000)
-#define BAST_VA_CTRL3       BAST_IOADDR(0x00200000)      /* 0x01500000 */
-#define BAST_PA_CTRL3       (S3C2410_CS1 | 0x6800000)
-#define BAST_VA_CTRL4       BAST_IOADDR(0x00300000)      /* 0x01600000 */
-#define BAST_PA_CTRL4       (S3C2410_CS1 | 0x7000000)
-/* next, we have the PC104 ISA interrupt registers */
-#define BAST_PA_PC104_IRQREQ  (S3C2410_CS5 | 0x6000000) /* 0x01700000 */
-#define BAST_VA_PC104_IRQREQ  BAST_IOADDR(0x00400000)
-#define BAST_PA_PC104_IRQRAW  (S3C2410_CS5 | 0x6800000) /* 0x01800000 */
-#define BAST_VA_PC104_IRQRAW  BAST_IOADDR(0x00500000)
-#define BAST_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */
-#define BAST_VA_PC104_IRQMASK BAST_IOADDR(0x00600000)
-#define BAST_PA_LCD_RCMD1     (0x8800000)
-#define BAST_VA_LCD_RCMD1     BAST_IOADDR(0x00700000)
-#define BAST_PA_LCD_WCMD1     (0x8000000)
-#define BAST_VA_LCD_WCMD1     BAST_IOADDR(0x00800000)
-#define BAST_PA_LCD_RDATA1    (0x9800000)
-#define BAST_VA_LCD_RDATA1    BAST_IOADDR(0x00900000)
-#define BAST_PA_LCD_WDATA1    (0x9000000)
-#define BAST_VA_LCD_WDATA1    BAST_IOADDR(0x00A00000)
-#define BAST_PA_LCD_RCMD2     (0xA800000)
-#define BAST_VA_LCD_RCMD2     BAST_IOADDR(0x00B00000)
-#define BAST_PA_LCD_WCMD2     (0xA000000)
-#define BAST_VA_LCD_WCMD2     BAST_IOADDR(0x00C00000)
-#define BAST_PA_LCD_RDATA2    (0xB800000)
-#define BAST_VA_LCD_RDATA2    BAST_IOADDR(0x00D00000)
-#define BAST_PA_LCD_WDATA2    (0xB000000)
-#define BAST_VA_LCD_WDATA2    BAST_IOADDR(0x00E00000)
-/* 0xE0000000 contains the IO space that is split by speed and
- * whether the access is for 8 or 16bit IO... this ensures that
- * the correct access is made
- *
- * 0x10000000 of space, partitioned as so:
- *
- * 0x00000000 to 0x04000000  8bit,  slow
- * 0x04000000 to 0x08000000  16bit, slow
- * 0x08000000 to 0x0C000000  16bit, net
- * 0x0C000000 to 0x10000000  16bit, fast
- *
- * each of these spaces has the following in:
- *
- * 0x00000000 to 0x01000000 16MB ISA IO space
- * 0x01000000 to 0x02000000 16MB ISA memory space
- * 0x02000000 to 0x02100000 1MB  IDE primary channel
- * 0x02100000 to 0x02200000 1MB  IDE primary channel aux
- * 0x02200000 to 0x02400000 1MB  IDE secondary channel
- * 0x02300000 to 0x02400000 1MB  IDE secondary channel aux
- * 0x02400000 to 0x02500000 1MB  ASIX ethernet controller
- * 0x02500000 to 0x02600000 1MB  Davicom DM9000 ethernet controller
- * 0x02600000 to 0x02700000 1MB  PC SuperIO controller
- *
- * the phyiscal layout of the zones are:
- *  nGCS2 - 8bit, slow
- *  nGCS3 - 16bit, slow
- *  nGCS4 - 16bit, net
- *  nGCS5 - 16bit, fast
- */
-#define BAST_VA_MULTISPACE (0xE0000000)
-#define BAST_VA_ISAIO      (BAST_VA_MULTISPACE + 0x00000000)
-#define BAST_VA_ISAMEM     (BAST_VA_MULTISPACE + 0x01000000)
-#define BAST_VA_IDEPRI     (BAST_VA_MULTISPACE + 0x02000000)
-#define BAST_VA_IDEPRIAUX  (BAST_VA_MULTISPACE + 0x02100000)
-#define BAST_VA_IDESEC     (BAST_VA_MULTISPACE + 0x02200000)
-#define BAST_VA_IDESECAUX  (BAST_VA_MULTISPACE + 0x02300000)
-#define BAST_VA_ASIXNET    (BAST_VA_MULTISPACE + 0x02400000)
-#define BAST_VA_DM9000     (BAST_VA_MULTISPACE + 0x02500000)
-#define BAST_VA_SUPERIO    (BAST_VA_MULTISPACE + 0x02600000)
-#define BAST_VA_MULTISPACE (0xE0000000)
-#define BAST_VAM_CS2 (0x00000000)
-#define BAST_VAM_CS3 (0x04000000)
-#define BAST_VAM_CS4 (0x08000000)
-#define BAST_VAM_CS5 (0x0C000000)
-/* physical offset addresses for the peripherals */
-#define BAST_PA_ISAIO     (0x00000000)
-#define BAST_PA_ASIXNET   (0x01000000)
-#define BAST_PA_SUPERIO   (0x01800000)
-#define BAST_PA_IDEPRI    (0x02000000)
-#define BAST_PA_IDEPRIAUX (0x02800000)
-#define BAST_PA_IDESEC    (0x03000000)
-#define BAST_PA_IDESECAUX (0x03800000)
-#define BAST_PA_ISAMEM    (0x04000000)
-#define BAST_PA_DM9000    (0x05000000)
-/* some configurations for the peripherals */
-#define BAST_PCSIO (BAST_VA_SUPERIO + BAST_VAM_CS2)
-/*  */
-#define BAST_ASIXNET_CS  BAST_VAM_CS5
-#define BAST_IDE_CS      BAST_VAM_CS5
-#define BAST_DM9000_CS   BAST_VAM_CS4
-#endif /* __ASM_ARCH_BASTMAP_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h b/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h
deleted file mode 100644
index c53ad34c6579..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <plat/gpio-fns.h>
diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h b/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h
deleted file mode 100644
index 3890a05948fb..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
- *
- * Copyright (c) 2008 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2410 - GPIO bank numbering
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __MACH_GPIONRS_H
-#define __MACH_GPIONRS_H
-#define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
-#define S3C2410_GPIO_BANKG   (32*6)
-#define S3C2410_GPIO_BANKH   (32*7)
-/* GPIO sizes for various SoCs:
- *
- *             2442
- *   2410 2412 2440 2443 2416
- *   ---- ---- ---- ---- ----
- * A 23   22   25   16   25
- * B 11   11   11   11   9
- * C 16   15   16   16   16
- * D 16   16   16   16   16
- * E 16   16   16   16   16
- * F 8    8    8    8    8
- * G 16   16   16   16   8
- * H 11   11   9    15   15
- * J --   --   13   16   --
- * K --   --   --   --   16
- * L --   --   --   15   7
- * M --   --   --   2    2
- */
-/* GPIO bank sizes */
-#define S3C2410_GPIO_A_NR       (32)
-#define S3C2410_GPIO_B_NR       (32)
-#define S3C2410_GPIO_C_NR       (32)
-#define S3C2410_GPIO_D_NR       (32)
-#define S3C2410_GPIO_E_NR       (32)
-#define S3C2410_GPIO_F_NR       (32)
-#define S3C2410_GPIO_G_NR       (32)
-#define S3C2410_GPIO_H_NR       (32)
-#define S3C2410_GPIO_J_NR       (32)    /* technically 16. */
-#define S3C2410_GPIO_K_NR       (32)    /* technically 16. */
-#define S3C2410_GPIO_L_NR       (32)    /* technically 15. */
-#define S3C2410_GPIO_M_NR       (32)    /* technically 2. */
-#if CONFIG_S3C_GPIO_SPACE != 0
-#error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment
-#endif
-#define S3C2410_GPIO_NEXT(__gpio) \
-        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
-#ifndef __ASSEMBLY__
-enum s3c_gpio_number {
-        S3C2410_GPIO_A_START = 0,
-        S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
-        S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
-        S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
-        S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
-        S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
-        S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
-        S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
-        S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
-        S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
-        S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
-        S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
-};
-#endif /* __ASSEMBLY__ */
-/* S3C2410 GPIO number definitions. */
-#define S3C2410_GPA(_nr)        (S3C2410_GPIO_A_START + (_nr))
-#define S3C2410_GPB(_nr)        (S3C2410_GPIO_B_START + (_nr))
-#define S3C2410_GPC(_nr)        (S3C2410_GPIO_C_START + (_nr))
-#define S3C2410_GPD(_nr)        (S3C2410_GPIO_D_START + (_nr))
-#define S3C2410_GPE(_nr)        (S3C2410_GPIO_E_START + (_nr))
-#define S3C2410_GPF(_nr)        (S3C2410_GPIO_F_START + (_nr))
-#define S3C2410_GPG(_nr)        (S3C2410_GPIO_G_START + (_nr))
-#define S3C2410_GPH(_nr)        (S3C2410_GPIO_H_START + (_nr))
-#define S3C2410_GPJ(_nr)        (S3C2410_GPIO_J_START + (_nr))
-#define S3C2410_GPK(_nr)        (S3C2410_GPIO_K_START + (_nr))
-#define S3C2410_GPL(_nr)        (S3C2410_GPIO_L_START + (_nr))
-#define S3C2410_GPM(_nr)        (S3C2410_GPIO_M_START + (_nr))
-#endif /* __MACH_GPIONRS_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-track.h b/arch/arm/mach-s3c24xx/include/mach/gpio-track.h
deleted file mode 100644
index c410a078622c..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/gpio-track.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* arch/arm/mach-s3c24100/include/mach/gpio-core.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C2410 - GPIO core support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_GPIO_CORE_H
-#define __ASM_ARCH_GPIO_CORE_H __FILE__
-#include <mach/regs-gpio.h>
-extern struct samsung_gpio_chip s3c24xx_gpios[];
-static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin)
-{
-        struct samsung_gpio_chip *chip;
-        if (pin > S3C_GPIO_END)
-                return NULL;
-        chip = &s3c24xx_gpios[pin/32];
-        return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
-}
-#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio.h b/arch/arm/mach-s3c24xx/include/mach/gpio.h
index 6fac70f3484e..14591563ca70 100644
--- a/arch/arm/mach-s3c24xx/include/mach/gpio.h
+++ b/arch/arm/mach-s3c24xx/include/mach/gpio.h
@@ -1,5 +1,4 @@
-/* arch/arm/mach-s3c2410/include/mach/gpio.h
+/*
- *
 * Copyright (c) 2008 Simtec Electronics
 *      http://armlinux.simtec.co.uk/
 *      Ben Dooks <ben@simtec.co.uk>
@@ -15,6 +14,9 @@
 * devices that need GPIO.
 */
+#ifndef __MACH_GPIO_H
+#define __MACH_GPIO_H __FILE__
 #ifdef CONFIG_CPU_S3C244X
 #define ARCH_NR_GPIOS   (32 * 9 + CONFIG_S3C24XX_GPIO_EXTRA)
 #elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)
@@ -23,8 +25,83 @@
 #define ARCH_NR_GPIOS   (256 + CONFIG_S3C24XX_GPIO_EXTRA)
 #endif
-#include <mach/gpio-nrs.h>
+/*
-#include <mach/gpio-fns.h>
+ * GPIO sizes for various SoCs:
+ *
+ *   2410 2412 2440 2443 2416
+ *             2442
+ *   ---- ---- ---- ---- ----
+ * A  23   22   25   16   25
+ * B  11   11   11   11   9
+ * C  16   15   16   16   16
+ * D  16   16   16   16   16
+ * E  16   16   16   16   16
+ * F  8    8    8    8    8
+ * G  16   16   16   16   8
+ * H  11   11   9    15   15
+ * J  --   --   13   16   --
+ * K  --   --   --   --   16
+ * L  --   --   --   15   7
+ * M  --   --   --   2    2
+ */
+/* GPIO bank sizes */
+#define S3C2410_GPIO_A_NR       (32)
+#define S3C2410_GPIO_B_NR       (32)
+#define S3C2410_GPIO_C_NR       (32)
+#define S3C2410_GPIO_D_NR       (32)
+#define S3C2410_GPIO_E_NR       (32)
+#define S3C2410_GPIO_F_NR       (32)
+#define S3C2410_GPIO_G_NR       (32)
+#define S3C2410_GPIO_H_NR       (32)
+#define S3C2410_GPIO_J_NR       (32)    /* technically 16. */
+#define S3C2410_GPIO_K_NR       (32)    /* technically 16. */
+#define S3C2410_GPIO_L_NR       (32)    /* technically 15. */
+#define S3C2410_GPIO_M_NR       (32)    /* technically 2. */
+#if CONFIG_S3C_GPIO_SPACE != 0
+#error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment
+#endif
+#define S3C2410_GPIO_NEXT(__gpio) \
+        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
+#ifndef __ASSEMBLY__
+enum s3c_gpio_number {
+        S3C2410_GPIO_A_START = 0,
+        S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
+        S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
+        S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
+        S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
+        S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
+        S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
+        S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
+        S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
+        S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
+        S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
+        S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
+};
+#endif /* __ASSEMBLY__ */
+/* S3C2410 GPIO number definitions. */
+#define S3C2410_GPA(_nr)        (S3C2410_GPIO_A_START + (_nr))
+#define S3C2410_GPB(_nr)        (S3C2410_GPIO_B_START + (_nr))
+#define S3C2410_GPC(_nr)        (S3C2410_GPIO_C_START + (_nr))
+#define S3C2410_GPD(_nr)        (S3C2410_GPIO_D_START + (_nr))
+#define S3C2410_GPE(_nr)        (S3C2410_GPIO_E_START + (_nr))
+#define S3C2410_GPF(_nr)        (S3C2410_GPIO_F_START + (_nr))
+#define S3C2410_GPG(_nr)        (S3C2410_GPIO_G_START + (_nr))
+#define S3C2410_GPH(_nr)        (S3C2410_GPIO_H_START + (_nr))
+#define S3C2410_GPJ(_nr)        (S3C2410_GPIO_J_START + (_nr))
+#define S3C2410_GPK(_nr)        (S3C2410_GPIO_K_START + (_nr))
+#define S3C2410_GPL(_nr)        (S3C2410_GPIO_L_START + (_nr))
+#define S3C2410_GPM(_nr)        (S3C2410_GPIO_M_START + (_nr))
+#include <plat/gpio-cfg.h>
 #ifdef CONFIG_CPU_S3C244X
 #define S3C_GPIO_END    (S3C2410_GPJ(0) + 32)
@@ -33,3 +110,5 @@
 #else
 #define S3C_GPIO_END    (S3C2410_GPH(0) + 32)
 #endif
+#endif /* __MACH_GPIO_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/h1940.h b/arch/arm/mach-s3c24xx/include/mach/h1940.h
deleted file mode 100644
index 2aa683c8d3d6..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/h1940.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/h1940.h
- *
- * Copyright 2006 Ben Dooks <ben-linux@fluff.org>
- *
- * H1940 definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_H1940_H
-#define __ASM_ARCH_H1940_H
-#define H1940_SUSPEND_CHECKSUM          (0x30003ff8)
-#define H1940_SUSPEND_RESUMEAT          (0x30081000)
-#define H1940_SUSPEND_CHECK             (0x30080000)
-extern void h1940_pm_return(void);
-extern int h1940_led_blink_set(unsigned gpio, int state,
-        unsigned long *delay_on, unsigned long *delay_off);
-#endif /* __ASM_ARCH_H1940_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/idle.h b/arch/arm/mach-s3c24xx/include/mach/idle.h
deleted file mode 100644
index e9ddd706b16e..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/idle.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/idle.h
- *
- * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
- *              http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 CPU Idle controls
-*/
-#ifndef __ASM_ARCH_IDLE_H
-#define __ASM_ARCH_IDLE_H __FILE__
-/* This allows the over-ride of the default idle code, in case there
- * is any other things to be done over idle (like DVS)
-*/
-extern void (*s3c24xx_idle)(void);
-extern void s3c24xx_default_idle(void);
-#endif /* __ASM_ARCH_IDLE_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h b/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h
deleted file mode 100644
index e9e36b0abbac..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/osiris-cpld.h
- *
- * Copyright 2005 Simtec Electronics
- *      http://www.simtec.co.uk/products/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * OSIRIS - CPLD control constants
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_OSIRISCPLD_H
-#define __ASM_ARCH_OSIRISCPLD_H
-/* CTRL0 - NAND WP control */
-#define OSIRIS_CTRL0_NANDSEL            (0x3)
-#define OSIRIS_CTRL0_BOOT_INT           (1<<3)
-#define OSIRIS_CTRL0_PCMCIA             (1<<4)
-#define OSIRIS_CTRL0_FIX8               (1<<5)
-#define OSIRIS_CTRL0_PCMCIA_nWAIT       (1<<6)
-#define OSIRIS_CTRL0_PCMCIA_nIOIS16     (1<<7)
-#define OSIRIS_CTRL1_FIX8               (1<<0)
-#define OSIRIS_ID_REVMASK               (0x7)
-#endif /* __ASM_ARCH_OSIRISCPLD_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
index a11a638bd599..c2ef016032ab 100644
--- a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
@@ -14,8 +14,6 @@
 #ifndef __ASM_ARCH_REGS_GPIO_H
 #define __ASM_ARCH_REGS_GPIO_H
-#include <mach/gpio-nrs.h>
 #define S3C24XX_MISCCR          S3C24XX_GPIOREG2(0x80)
 /* general configuration options */
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h
deleted file mode 100644
index aa69dc79bc38..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-s3c2412.h
- *
- * Copyright 2007 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2412 specific register definitions
-*/
-#ifndef __ASM_ARCH_REGS_S3C2412_H
-#define __ASM_ARCH_REGS_S3C2412_H "s3c2412"
-#define S3C2412_SWRST           (S3C24XX_VA_CLKPWR + 0x30)
-#define S3C2412_SWRST_RESET     (0x533C2412)
-/* see regs-power.h for the other registers in the power block. */
-#endif  /* __ASM_ARCH_REGS_S3C2412_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h
deleted file mode 100644
index 2f31b74974af..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-s3c2416-mem.h
- *
- * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
- *      as part of OpenInkpot project
- * Copyright (c) 2009 Promwad Innovation Company
- *      Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2416 memory register definitions
-*/
-#ifndef __ASM_ARM_REGS_S3C2416_MEM
-#define __ASM_ARM_REGS_S3C2416_MEM
-#ifndef S3C2416_MEMREG
-#define S3C2416_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))
-#endif
-#define S3C2416_BANKCFG                 S3C2416_MEMREG(0x00)
-#define S3C2416_BANKCON1                S3C2416_MEMREG(0x04)
-#define S3C2416_BANKCON2                S3C2416_MEMREG(0x08)
-#define S3C2416_BANKCON3                S3C2416_MEMREG(0x0C)
-#define S3C2416_REFRESH                 S3C2416_MEMREG(0x10)
-#define S3C2416_TIMEOUT                 S3C2416_MEMREG(0x14)
-#endif /*  __ASM_ARM_REGS_S3C2416_MEM */
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h
deleted file mode 100644
index e443167efb87..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-s3c2416.h
- *
- * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
- *      as part of OpenInkpot project
- * Copyright (c) 2009 Promwad Innovation Company
- *      Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2416 specific register definitions
-*/
-#ifndef __ASM_ARCH_REGS_S3C2416_H
-#define __ASM_ARCH_REGS_S3C2416_H "s3c2416"
-#define S3C2416_SWRST           (S3C24XX_VA_CLKPWR + 0x44)
-#define S3C2416_SWRST_RESET     (0x533C2416)
-/* see regs-power.h for the other registers in the power block. */
-#endif  /* __ASM_ARCH_REGS_S3C2416_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h
deleted file mode 100644
index e4119913d7c5..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h
- *
- * Copyright (c) 2003 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * VR1000 - CPLD control constants
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_VR1000CPLD_H
-#define __ASM_ARCH_VR1000CPLD_H
-#define VR1000_CPLD_CTRL2_RAMWEN     (0x04)   /* SRAM Write Enable */
-#endif /* __ASM_ARCH_VR1000CPLD_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h
deleted file mode 100644
index 47add133b8ee..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/vr1000-irq.h
- *
- * Copyright (c) 2003-2004 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * Machine VR1000 - IRQ Number definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_VR1000IRQ_H
-#define __ASM_ARCH_VR1000IRQ_H
-/* irq numbers to onboard peripherals */
-#define IRQ_USBOC            IRQ_EINT19
-#define IRQ_IDE0             IRQ_EINT16
-#define IRQ_IDE1             IRQ_EINT17
-#define IRQ_VR1000_SERIAL    IRQ_EINT12
-#define IRQ_VR1000_DM9000A   IRQ_EINT10
-#define IRQ_VR1000_DM9000N   IRQ_EINT9
-#define IRQ_SMALERT          IRQ_EINT8
-#endif /* __ASM_ARCH_VR1000IRQ_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h
deleted file mode 100644
index 28376e56dd3b..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/vr1000-map.h
- *
- * Copyright (c) 2003-2005 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * Machine VR1000 - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-/* needs arch/map.h including with this */
-/* ok, we've used up to 0x13000000, now we need to find space for the
- * peripherals that live in the nGCS[x] areas, which are quite numerous
- * in their space. We also have the board's CPLD to find register space
- * for.
- */
-#ifndef __ASM_ARCH_VR1000MAP_H
-#define __ASM_ARCH_VR1000MAP_H
-#include <mach/bast-map.h>
-#define VR1000_IOADDR(x) BAST_IOADDR(x)
-/* we put the CPLD registers next, to get them out of the way */
-#define VR1000_VA_CTRL1     VR1000_IOADDR(0x00000000)    /* 0x01300000 */
-#define VR1000_PA_CTRL1     (S3C2410_CS5 | 0x7800000)
-#define VR1000_VA_CTRL2     VR1000_IOADDR(0x00100000)    /* 0x01400000 */
-#define VR1000_PA_CTRL2     (S3C2410_CS1 | 0x6000000)
-#define VR1000_VA_CTRL3     VR1000_IOADDR(0x00200000)    /* 0x01500000 */
-#define VR1000_PA_CTRL3     (S3C2410_CS1 | 0x6800000)
-#define VR1000_VA_CTRL4     VR1000_IOADDR(0x00300000)    /* 0x01600000 */
-#define VR1000_PA_CTRL4     (S3C2410_CS1 | 0x7000000)
-/* next, we have the PC104 ISA interrupt registers */
-#define VR1000_PA_PC104_IRQREQ  (S3C2410_CS5 | 0x6000000) /* 0x01700000 */
-#define VR1000_VA_PC104_IRQREQ  VR1000_IOADDR(0x00400000)
-#define VR1000_PA_PC104_IRQRAW  (S3C2410_CS5 | 0x6800000) /* 0x01800000 */
-#define VR1000_VA_PC104_IRQRAW  VR1000_IOADDR(0x00500000)
-#define VR1000_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */
-#define VR1000_VA_PC104_IRQMASK VR1000_IOADDR(0x00600000)
-/* 0xE0000000 contains the IO space that is split by speed and
- * whether the access is for 8 or 16bit IO... this ensures that
- * the correct access is made
- *
- * 0x10000000 of space, partitioned as so:
- *
- * 0x00000000 to 0x04000000  8bit,  slow
- * 0x04000000 to 0x08000000  16bit, slow
- * 0x08000000 to 0x0C000000  16bit, net
- * 0x0C000000 to 0x10000000  16bit, fast
- *
- * each of these spaces has the following in:
- *
- * 0x02000000 to 0x02100000 1MB  IDE primary channel
- * 0x02100000 to 0x02200000 1MB  IDE primary channel aux
- * 0x02200000 to 0x02400000 1MB  IDE secondary channel
- * 0x02300000 to 0x02400000 1MB  IDE secondary channel aux
- * 0x02500000 to 0x02600000 1MB  Davicom DM9000 ethernet controllers
- * 0x02600000 to 0x02700000 1MB
- *
- * the phyiscal layout of the zones are:
- *  nGCS2 - 8bit, slow
- *  nGCS3 - 16bit, slow
- *  nGCS4 - 16bit, net
- *  nGCS5 - 16bit, fast
- */
-#define VR1000_VA_MULTISPACE (0xE0000000)
-#define VR1000_VA_ISAIO            (VR1000_VA_MULTISPACE + 0x00000000)
-#define VR1000_VA_ISAMEM           (VR1000_VA_MULTISPACE + 0x01000000)
-#define VR1000_VA_IDEPRI           (VR1000_VA_MULTISPACE + 0x02000000)
-#define VR1000_VA_IDEPRIAUX        (VR1000_VA_MULTISPACE + 0x02100000)
-#define VR1000_VA_IDESEC           (VR1000_VA_MULTISPACE + 0x02200000)
-#define VR1000_VA_IDESECAUX        (VR1000_VA_MULTISPACE + 0x02300000)
-#define VR1000_VA_ASIXNET          (VR1000_VA_MULTISPACE + 0x02400000)
-#define VR1000_VA_DM9000           (VR1000_VA_MULTISPACE + 0x02500000)
-#define VR1000_VA_SUPERIO          (VR1000_VA_MULTISPACE + 0x02600000)
-/* physical offset addresses for the peripherals */
-#define VR1000_PA_IDEPRI           (0x02000000)
-#define VR1000_PA_IDEPRIAUX        (0x02800000)
-#define VR1000_PA_IDESEC           (0x03000000)
-#define VR1000_PA_IDESECAUX        (0x03800000)
-#define VR1000_PA_DM9000           (0x05000000)
-#define VR1000_PA_SERIAL           (0x11800000)
-#define VR1000_VA_SERIAL           (VR1000_IOADDR(0x00700000))
-/* VR1000 ram is in CS1, with A26..A24 = 2_101 */
-#define VR1000_PA_SRAM             (S3C2410_CS1 | 0x05000000)
-/* some configurations for the peripherals */
-#define VR1000_DM9000_CS         VR1000_VAM_CS4
-#endif /* __ASM_ARCH_VR1000MAP_H */
diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c
index 85eefab881af..3c4b6e30c742 100644
--- a/arch/arm/mach-s3c24xx/mach-anubis.c
+++ b/arch/arm/mach-s3c24xx/mach-anubis.c
@@ -28,10 +28,6 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <mach/anubis-map.h>
-#include <mach/anubis-irq.h>
-#include <mach/anubis-cpld.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
@@ -55,8 +51,9 @@
 #include <plat/cpu.h>
 #include <linux/platform_data/asoc-s3c24xx_simtec.h>
-#include "simtec.h"
+#include "anubis.h"
 #include "common.h"
+#include "simtec.h"
 #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
@@ -237,7 +234,7 @@ static struct pata_platform_info anubis_ide_platdata = {
 static struct resource anubis_ide0_resource[] = {
        [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32),
        [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32),
-        [3] = DEFINE_RES_IRQ(IRQ_IDE0),
+        [3] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0),
 };
 static struct platform_device anubis_device_ide0 = {
@@ -254,7 +251,7 @@ static struct platform_device anubis_device_ide0 = {
 static struct resource anubis_ide1_resource[] = {
        [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32),
        [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32),
-        [2] = DEFINE_RES_IRQ(IRQ_IDE0),
+        [2] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0),
 };
 static struct platform_device anubis_device_ide1 = {
@@ -279,7 +276,7 @@ static struct ax_plat_data anubis_asix_platdata = {
 static struct resource anubis_asix_resource[] = {
        [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20),
-        [1] = DEFINE_RES_IRQ(IRQ_ASIX),
+        [1] = DEFINE_RES_IRQ(ANUBIS_IRQ_ASIX),
 };
 static struct platform_device anubis_device_asix = {
diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c
index b31c4aa724f2..cdcd784e30c5 100644
--- a/arch/arm/mach-s3c24xx/mach-at2440evb.c
+++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c
@@ -14,6 +14,7 @@
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/interrupt.h>
 #include <linux/list.h>
 #include <linux/timer.h>
diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c
index 526964c19dd8..5c1e3dfb9ab3 100644
--- a/arch/arm/mach-s3c24xx/mach-bast.c
+++ b/arch/arm/mach-s3c24xx/mach-bast.c
@@ -24,48 +24,42 @@
 #include <linux/ata_platform.h>
 #include <linux/i2c.h>
 #include <linux/io.h>
+#include <linux/serial_8250.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/partitions.h>
+#include <linux/platform_data/asoc-s3c24xx_simtec.h>
+#include <linux/platform_data/hwmon-s3c.h>
+#include <linux/platform_data/i2c-s3c2410.h>
+#include <linux/platform_data/mtd-nand-s3c2410.h>
 #include <net/ax88796.h>
+#include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <mach/bast-map.h>
-#include <mach/bast-irq.h>
-#include <mach/bast-cpld.h>
-#include <mach/hardware.h>
-#include <asm/irq.h>
 #include <asm/mach-types.h>
-//#include <asm/debug-ll.h>
+#include <mach/fb.h>
-#include <plat/regs-serial.h>
+#include <mach/hardware.h>
 #include <mach/regs-gpio.h>
-#include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
+#include <mach/regs-mem.h>
-#include <linux/platform_data/hwmon-s3c.h>
-#include <linux/platform_data/mtd-nand-s3c2410.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <mach/fb.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/nand_ecc.h>
-#include <linux/mtd/partitions.h>
-#include <linux/serial_8250.h>
 #include <plat/clock.h>
-#include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/cpu-freq.h>
+#include <plat/devs.h>
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/asoc-s3c24xx_simtec.h>
+#include <plat/regs-serial.h>
-#include "simtec.h"
+#include "bast.h"
 #include "common.h"
+#include "simtec.h"
 #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics"
@@ -312,7 +306,7 @@ static struct s3c2410_platform_nand __initdata bast_nand_info = {
 static struct resource bast_dm9k_resource[] = {
        [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4),
        [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40),
-        [2] = DEFINE_RES_NAMED(IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \
+        [2] = DEFINE_RES_NAMED(BAST_IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \
                                        | IORESOURCE_IRQ_HIGHLEVEL),
 };
@@ -343,7 +337,7 @@ static struct platform_device bast_device_dm9k = {
 static struct plat_serial8250_port bast_sio_data[] = {
        [0] = {
                .mapbase        = SERIAL_BASE + 0x2f8,
-                .irq            = IRQ_PCSERIAL1,
+                .irq            = BAST_IRQ_PCSERIAL1,
                .flags          = SERIAL_FLAGS,
                .iotype         = UPIO_MEM,
                .regshift       = 0,
@@ -351,7 +345,7 @@ static struct plat_serial8250_port bast_sio_data[] = {
        },
        [1] = {
                .mapbase        = SERIAL_BASE + 0x3f8,
-                .irq            = IRQ_PCSERIAL2,
+                .irq            = BAST_IRQ_PCSERIAL2,
                .flags          = SERIAL_FLAGS,
                .iotype         = UPIO_MEM,
                .regshift       = 0,
@@ -390,7 +384,7 @@ static struct ax_plat_data bast_asix_platdata = {
 static struct resource bast_asix_resource[] = {
        [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20),
        [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1),
-        [2] = DEFINE_RES_IRQ(IRQ_ASIX),
+        [2] = DEFINE_RES_IRQ(BAST_IRQ_ASIX),
 };
 static struct platform_device bast_device_asix = {
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index fb5d3b3b53db..b9782ac2237a 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -1,6 +1,4 @@
 /*
- * linux/arch/arm/mach-s3c2442/mach-gta02.c
- *
 * S3C2442 Machine Support for Openmoko GTA02 / FreeRunner.
 *
 * Copyright (C) 2006-2009 by Openmoko, Inc.
@@ -23,7 +21,6 @@
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
- *
 */
 #include <linux/kernel.h>
@@ -34,62 +31,60 @@
 #include <linux/timer.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
+#include <linux/gpio_keys.h>
 #include <linux/workqueue.h>
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
-#include <linux/spi/spi.h>
+#include <linux/input.h>
-#include <linux/spi/s3c24xx.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
 #include <linux/mmc/host.h>
+#include <linux/mfd/pcf50633/adc.h>
+#include <linux/mfd/pcf50633/backlight.h>
+#include <linux/mfd/pcf50633/core.h>
+#include <linux/mfd/pcf50633/gpio.h>
+#include <linux/mfd/pcf50633/mbc.h>
+#include <linux/mfd/pcf50633/pmic.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/nand_ecc.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
-#include <linux/io.h>
-#include <linux/i2c.h>
 #include <linux/regulator/machine.h>
-#include <linux/mfd/pcf50633/core.h>
+#include <linux/spi/spi.h>
-#include <linux/mfd/pcf50633/mbc.h>
+#include <linux/spi/s3c24xx.h>
-#include <linux/mfd/pcf50633/adc.h>
-#include <linux/mfd/pcf50633/gpio.h>
-#include <linux/mfd/pcf50633/pmic.h>
-#include <linux/mfd/pcf50633/backlight.h>
-#include <linux/input.h>
-#include <linux/gpio_keys.h>
+#include <asm/irq.h>
+#include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <asm/irq.h>
+#include <linux/platform_data/i2c-s3c2410.h>
-#include <asm/mach-types.h>
+#include <linux/platform_data/mtd-nand-s3c2410.h>
+#include <linux/platform_data/touchscreen-s3c2410.h>
+#include <linux/platform_data/usb-ohci-s3c2410.h>
+#include <linux/platform_data/usb-s3c2410_udc.h>
-#include <mach/regs-irq.h>
-#include <mach/regs-gpio.h>
 #include <mach/fb.h>
-#include <linux/platform_data/usb-ohci-s3c2410.h>
-#include <mach/regs-mem.h>
 #include <mach/hardware.h>
+#include <mach/regs-gpio.h>
+#include <mach/regs-irq.h>
+#include <mach/regs-mem.h>
-#include <mach/gta02.h>
-#include <plat/regs-serial.h>
-#include <linux/platform_data/mtd-nand-s3c2410.h>
-#include <plat/devs.h>
 #include <plat/cpu.h>
-#include <plat/pm.h>
+#include <plat/devs.h>
-#include <linux/platform_data/usb-s3c2410_udc.h>
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/i2c-s3c2410.h>
+#include <plat/pm.h>
-#include <linux/platform_data/touchscreen-s3c2410.h>
+#include <plat/regs-serial.h>
 #include "common.h"
+#include "gta02.h"
 static struct pcf50633 *gta02_pcf;
diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c
index 2eb09e27c13c..79bc0830d740 100644
--- a/arch/arm/mach-s3c24xx/mach-h1940.c
+++ b/arch/arm/mach-s3c24xx/mach-h1940.c
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-s3c2410/mach-h1940.c
+/*
- *
 * Copyright (c) 2003-2005 Simtec Electronics
 *   Ben Dooks <ben@simtec.co.uk>
 *
@@ -37,40 +36,36 @@
 #include <linux/mmc/host.h>
 #include <linux/export.h>
+#include <asm/irq.h>
+#include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <mach/hardware.h>
+#include <linux/platform_data/i2c-s3c2410.h>
-#include <asm/irq.h>
+#include <linux/platform_data/mmc-s3cmci.h>
-#include <asm/mach-types.h>
+#include <linux/platform_data/touchscreen-s3c2410.h>
+#include <linux/platform_data/usb-s3c2410_udc.h>
-#include <plat/regs-serial.h>
-#include <mach/regs-lcd.h>
-#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
+#include <sound/uda1380.h>
-#include <mach/gpio-fns.h>
-#include <mach/gpio-nrs.h>
-#include <mach/h1940.h>
-#include <mach/h1940-latch.h>
 #include <mach/fb.h>
-#include <linux/platform_data/usb-s3c2410_udc.h>
+#include <mach/hardware.h>
-#include <linux/platform_data/i2c-s3c2410.h>
+#include <mach/regs-clock.h>
+#include <mach/regs-gpio.h>
+#include <mach/regs-lcd.h>
-#include <plat/gpio-cfg.h>
 #include <plat/clock.h>
-#include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/gpio-cfg.h>
 #include <plat/pll.h>
 #include <plat/pm.h>
-#include <linux/platform_data/mmc-s3cmci.h>
+#include <plat/regs-serial.h>
-#include <linux/platform_data/touchscreen-s3c2410.h>
-#include <sound/uda1380.h>
 #include "common.h"
+#include "h1940.h"
 #define H1940_LATCH             ((void __force __iomem *)0xF8000000)
diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c
index ba0f5b5ec19e..4b57f9aa0a8f 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris.c
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-s3c2440/mach-osiris.c
+/*
- *
 * Copyright (c) 2005-2008 Simtec Electronics
 *      http://armlinux.simtec.co.uk/
 *      Ben Dooks <ben@simtec.co.uk>
@@ -25,22 +24,12 @@
 #include <linux/i2c/tps65010.h>
+#include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <mach/osiris-map.h>
-#include <mach/osiris-cpld.h>
-#include <mach/hardware.h>
 #include <asm/irq.h>
-#include <asm/mach-types.h>
-#include <plat/cpu-freq.h>
-#include <plat/regs-serial.h>
-#include <mach/regs-gpio.h>
-#include <mach/regs-mem.h>
-#include <mach/regs-lcd.h>
 #include <linux/platform_data/mtd-nand-s3c2410.h>
 #include <linux/platform_data/i2c-s3c2410.h>
@@ -49,12 +38,20 @@
 #include <linux/mtd/nand_ecc.h>
 #include <linux/mtd/partitions.h>
-#include <plat/gpio-cfg.h>
 #include <plat/clock.h>
-#include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/cpu-freq.h>
+#include <plat/devs.h>
+#include <plat/gpio-cfg.h>
+#include <plat/regs-serial.h>
+#include <mach/hardware.h>
+#include <mach/regs-gpio.h>
+#include <mach/regs-mem.h>
+#include <mach/regs-lcd.h>
 #include "common.h"
+#include "osiris.h"
 /* onboard perihperal map */
diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c
index e0fdae93aa7b..40a47d6c6a85 100644
--- a/arch/arm/mach-s3c24xx/mach-otom.c
+++ b/arch/arm/mach-s3c24xx/mach-otom.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c2410/mach-otom.c
+/*
 *
 * Copyright (c) 2004 Nex Vision
 *   Guillaume GOURAT <guillaume.gourat@nexvision.fr>
@@ -6,7 +6,6 @@
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
- *
 */
 #include <linux/kernel.h>
@@ -19,26 +18,25 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/platform_data/i2c-s3c2410.h>
+#include <asm/irq.h>
+#include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <mach/otom-map.h>
 #include <mach/hardware.h>
-#include <asm/irq.h>
-#include <asm/mach-types.h>
-#include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
-#include <plat/s3c2410.h>
 #include <plat/clock.h>
-#include <plat/devs.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/regs-serial.h>
+#include <plat/s3c2410.h>
 #include "common.h"
+#include "otom.h"
 static struct map_desc otom11_iodesc[] __initdata = {
  /* Device area */
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index e14ec7105a6d..1f9ba2ae5288 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-s3c2440/mach-rx1950.c
+/*
- *
 * Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev,
 * Copyright (c) 2007-2010 Vasily Khoruzhick
 *
@@ -37,31 +36,31 @@
 #include <linux/mmc/host.h>
+#include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach-types.h>
+#include <linux/platform_data/i2c-s3c2410.h>
+#include <linux/platform_data/mmc-s3cmci.h>
+#include <linux/platform_data/mtd-nand-s3c2410.h>
+#include <linux/platform_data/touchscreen-s3c2410.h>
+#include <linux/platform_data/usb-s3c2410_udc.h>
+#include <sound/uda1380.h>
+#include <mach/fb.h>
 #include <mach/regs-gpio.h>
 #include <mach/regs-lcd.h>
-#include <mach/h1940.h>
-#include <mach/fb.h>
 #include <plat/clock.h>
-#include <plat/regs-serial.h>
-#include <plat/regs-iic.h>
-#include <linux/platform_data/mmc-s3cmci.h>
-#include <linux/platform_data/usb-s3c2410_udc.h>
-#include <linux/platform_data/mtd-nand-s3c2410.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/devs.h>
 #include <plat/pm.h>
-#include <plat/irq.h>
+#include <plat/regs-iic.h>
-#include <linux/platform_data/touchscreen-s3c2410.h>
+#include <plat/regs-serial.h>
-#include <sound/uda1380.h>
 #include "common.h"
+#include "h1940.h"
 #define LCD_PWM_PERIOD 192960
 #define LCD_PWM_DUTY 127353
diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c
index d00caa8de922..f20418a2fb1b 100644
--- a/arch/arm/mach-s3c24xx/mach-rx3715.c
+++ b/arch/arm/mach-s3c24xx/mach-rx3715.c
@@ -31,27 +31,27 @@
 #include <linux/mtd/partitions.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/map.h>
 #include <asm/mach/irq.h>
+#include <asm/mach/map.h>
+#include <linux/platform_data/mtd-nand-s3c2410.h>
-#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
-#include <plat/regs-serial.h>
+#include <mach/fb.h>
+#include <mach/hardware.h>
 #include <mach/regs-gpio.h>
 #include <mach/regs-lcd.h>
-#include <mach/h1940.h>
-#include <linux/platform_data/mtd-nand-s3c2410.h>
-#include <mach/fb.h>
 #include <plat/clock.h>
-#include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/devs.h>
 #include <plat/pm.h>
+#include <plat/regs-serial.h>
 #include "common.h"
+#include "h1940.h"
 static struct map_desc rx3715_iodesc[] __initdata = {
        /* dump ISA space somewhere unused */
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c
index 69f356e83790..86d7847c9d45 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2413.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c
@@ -37,7 +37,6 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-lcd.h>
-#include <mach/idle.h>
 #include <linux/platform_data/usb-s3c2410_udc.h>
 #include <linux/platform_data/i2c-s3c2410.h>
 #include <mach/fb.h>
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c
index fe160c7f4b0a..72dfec689322 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2416.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c
@@ -39,7 +39,6 @@
 #include <mach/regs-lcd.h>
 #include <mach/regs-s3c2443-clock.h>
-#include <mach/idle.h>
 #include <linux/platform_data/leds-s3c24xx.h>
 #include <linux/platform_data/i2c-s3c2410.h>
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c b/arch/arm/mach-s3c24xx/mach-smdk2440.c
index a8fdafedc4c1..08cc38c8a4ae 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2440.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c
@@ -35,7 +35,6 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-lcd.h>
-#include <mach/idle.h>
 #include <mach/fb.h>
 #include <linux/platform_data/i2c-s3c2410.h>
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c
index 7830d7004306..406c8137620e 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2443.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c
@@ -35,7 +35,6 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-lcd.h>
-#include <mach/idle.h>
 #include <mach/fb.h>
 #include <linux/platform_data/i2c-s3c2410.h>
diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c
index dda21a01e3cc..ec42d1e4e465 100644
--- a/arch/arm/mach-s3c24xx/mach-vr1000.c
+++ b/arch/arm/mach-s3c24xx/mach-vr1000.c
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-s3c2410/mach-vr1000.c
+/*
- *
 * Copyright (c) 2003-2008 Simtec Electronics
 *   Ben Dooks <ben@simtec.co.uk>
 *
@@ -32,27 +31,25 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <mach/bast-map.h>
-#include <mach/vr1000-map.h>
-#include <mach/vr1000-irq.h>
-#include <mach/vr1000-cpld.h>
-#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
-#include <plat/regs-serial.h>
-#include <mach/regs-gpio.h>
 #include <linux/platform_data/leds-s3c24xx.h>
+#include <linux/platform_data/i2c-s3c2410.h>
+#include <linux/platform_data/asoc-s3c24xx_simtec.h>
+#include <mach/hardware.h>
+#include <mach/regs-gpio.h>
 #include <plat/clock.h>
-#include <plat/devs.h>
 #include <plat/cpu.h>
-#include <linux/platform_data/i2c-s3c2410.h>
+#include <plat/devs.h>
-#include <linux/platform_data/asoc-s3c24xx_simtec.h>
+#include <plat/regs-serial.h>
-#include "simtec.h"
+#include "bast.h"
 #include "common.h"
+#include "simtec.h"
+#include "vr1000.h"
 /* macros for virtual address mods for the io space entries */
 #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
@@ -143,7 +140,7 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
 static struct plat_serial8250_port serial_platform_data[] = {
        [0] = {
                .mapbase        = VR1000_SERIAL_MAPBASE(0),
-                .irq            = IRQ_VR1000_SERIAL + 0,
+                .irq            = VR1000_IRQ_SERIAL + 0,
                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
                .iotype         = UPIO_MEM,
                .regshift       = 0,
@@ -151,7 +148,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
        },
        [1] = {
                .mapbase        = VR1000_SERIAL_MAPBASE(1),
-                .irq            = IRQ_VR1000_SERIAL + 1,
+                .irq            = VR1000_IRQ_SERIAL + 1,
                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
                .iotype         = UPIO_MEM,
                .regshift       = 0,
@@ -159,7 +156,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
        },
        [2] = {
                .mapbase        = VR1000_SERIAL_MAPBASE(2),
-                .irq            = IRQ_VR1000_SERIAL + 2,
+                .irq            = VR1000_IRQ_SERIAL + 2,
                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
                .iotype         = UPIO_MEM,
                .regshift       = 0,
@@ -167,7 +164,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
        },
        [3] = {
                .mapbase        = VR1000_SERIAL_MAPBASE(3),
-                .irq            = IRQ_VR1000_SERIAL + 3,
+                .irq            = VR1000_IRQ_SERIAL + 3,
                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
                .iotype         = UPIO_MEM,
                .regshift       = 0,
@@ -189,14 +186,14 @@ static struct platform_device serial_device = {
 static struct resource vr1000_dm9k0_resource[] = {
        [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),
        [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),
-        [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000A, 1, NULL, IORESOURCE_IRQ \
+        [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000A, 1, NULL, IORESOURCE_IRQ \
                                                | IORESOURCE_IRQ_HIGHLEVEL),
 };
 static struct resource vr1000_dm9k1_resource[] = {
        [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),
        [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
-        [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000N, 1, NULL, IORESOURCE_IRQ \
+        [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000N, 1, NULL, IORESOURCE_IRQ \
                                                | IORESOURCE_IRQ_HIGHLEVEL),
 };
diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c
index 7fe7d4f60419..3e2bfddc9df1 100644
--- a/arch/arm/mach-s3c24xx/mach-vstms.c
+++ b/arch/arm/mach-s3c24xx/mach-vstms.c
@@ -36,7 +36,6 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-lcd.h>
-#include <mach/idle.h>
 #include <mach/fb.h>
 #include <linux/platform_data/i2c-s3c2410.h>
diff --git a/arch/arm/mach-s3c24xx/include/mach/osiris-map.h b/arch/arm/mach-s3c24xx/osiris.h
index 17380f848428..b8d56074abac 100644
--- a/arch/arm/mach-s3c24xx/include/mach/osiris-map.h
+++ b/arch/arm/mach-s3c24xx/osiris.h
@@ -1,9 +1,9 @@
-/* arch/arm/mach-s3c2410/include/mach/osiris-map.h
+/*
- *
 * Copyright 2005 Simtec Electronics
 *      http://www.simtec.co.uk/products/
 *      Ben Dooks <ben@simtec.co.uk>
 *
+ * OSIRIS - CPLD control constants
 * OSIRIS - Memory map definitions
 *
 * This program is free software; you can redistribute it and/or modify
@@ -11,10 +11,21 @@
 * published by the Free Software Foundation.
 */
-/* needs arch/map.h including with this */
+#ifndef __MACH_S3C24XX_OSIRIS_H
+#define __MACH_S3C24XX_OSIRIS_H __FILE__
+/* CTRL0 - NAND WP control */
+#define OSIRIS_CTRL0_NANDSEL            (0x3)
+#define OSIRIS_CTRL0_BOOT_INT           (1<<3)
+#define OSIRIS_CTRL0_PCMCIA             (1<<4)
+#define OSIRIS_CTRL0_FIX8               (1<<5)
+#define OSIRIS_CTRL0_PCMCIA_nWAIT       (1<<6)
+#define OSIRIS_CTRL0_PCMCIA_nIOIS16     (1<<7)
+#define OSIRIS_CTRL1_FIX8               (1<<0)
-#ifndef __ASM_ARCH_OSIRISMAP_H
+#define OSIRIS_ID_REVMASK               (0x7)
-#define __ASM_ARCH_OSIRISMAP_H
 /* start peripherals off after the S3C2410 */
@@ -39,4 +50,4 @@
 #define OSIRIS_VA_IDREG         OSIRIS_IOADDR(0x00700000)
 #define OSIRIS_PA_IDREG         (OSIRIS_PA_CPLD + (7<<23))
-#endif /* __ASM_ARCH_OSIRISMAP_H */
+#endif /* __MACH_S3C24XX_OSIRIS_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/otom-map.h b/arch/arm/mach-s3c24xx/otom.h
index f9277a52c145..321b7be1c0f7 100644
--- a/arch/arm/mach-s3c24xx/include/mach/otom-map.h
+++ b/arch/arm/mach-s3c24xx/otom.h
@@ -1,5 +1,4 @@
-/* arch/arm/mach-s3c2410/include/mach/otom-map.h
+/*
- *
 * (c) 2005 Guillaume GOURAT / NexVision
 *          guillaume.gourat@nexvision.fr
 *
@@ -10,21 +9,20 @@
 * published by the Free Software Foundation.
 */
-/* needs arch/map.h including with this */
+/*
+ * ok, we've used up to 0x01300000, now we need to find space for the
-/* ok, we've used up to 0x01300000, now we need to find space for the
 * peripherals that live in the nGCS[x] areas, which are quite numerous
 * in their space.
 */
-#ifndef __ASM_ARCH_OTOMMAP_H
+#ifndef __MACH_S3C24XX_OTOM_H
-#define __ASM_ARCH_OTOMMAP_H
+#define __MACH_S3C24XX_OTOM_H __FILE__
-#define OTOM_PA_CS8900A_BASE       (S3C2410_CS3 + 0x01000000)   /* nGCS3 +0x01000000 */
+#define OTOM_PA_CS8900A_BASE    (S3C2410_CS3 + 0x01000000)      /* nGCS3 +0x01000000 */
-#define OTOM_VA_CS8900A_BASE       S3C2410_ADDR(0x04000000)             /* 0xF4000000 */
+#define OTOM_VA_CS8900A_BASE    S3C2410_ADDR(0x04000000)        /* 0xF4000000 */
 /* physical offset addresses for the peripherals */
-#define OTOM_PA_FLASH0_BASE        (S3C2410_CS0)                                /* Bank 0 */
+#define OTOM_PA_FLASH0_BASE     (S3C2410_CS0)
-#endif /* __ASM_ARCH_OTOMMAP_H */
+#endif /* __MACH_S3C24XX_OTOM_H */
diff --git a/arch/arm/mach-s3c24xx/pm-s3c2410.c b/arch/arm/mach-s3c24xx/pm-s3c2410.c
index 949ae05e07c5..2d82c4f116cd 100644
--- a/arch/arm/mach-s3c24xx/pm-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/pm-s3c2410.c
@@ -29,16 +29,16 @@
 #include <linux/gpio.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
+#include <mach/hardware.h>
 #include <mach/regs-gpio.h>
-#include <mach/h1940.h>
 #include <plat/cpu.h>
 #include <plat/pm.h>
+#include "h1940.h"
 static void s3c2410_pm_prepare(void)
 {
        /* ensure at least GSTATUS3 has the resume address */
diff --git a/arch/arm/mach-s3c24xx/pm-s3c2412.c b/arch/arm/mach-s3c24xx/pm-s3c2412.c
index c60f67a75aff..206765cc4092 100644
--- a/arch/arm/mach-s3c24xx/pm-s3c2412.c
+++ b/arch/arm/mach-s3c24xx/pm-s3c2412.c
@@ -21,19 +21,19 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
 #include <asm/cacheflush.h>
 #include <asm/irq.h>
-#include <mach/regs-power.h>
+#include <mach/hardware.h>
 #include <mach/regs-gpio.h>
-#include <mach/regs-dsc.h>
+#include <mach/regs-power.h>
 #include <plat/cpu.h>
 #include <plat/pm.h>
 #include <plat/s3c2412.h>
+#include "regs-dsc.h"
 extern void s3c2412_sleep_enter(void);
 static int s3c2412_cpu_suspend(unsigned long arg)
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-dsc.h b/arch/arm/mach-s3c24xx/regs-dsc.h
index 98fd4a05587c..98fd4a05587c 100644
--- a/arch/arm/mach-s3c24xx/include/mach/regs-dsc.h
+++ b/arch/arm/mach-s3c24xx/regs-dsc.h
diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c
index 6c5f4031ff0c..c511a225f07a 100644
--- a/arch/arm/mach-s3c24xx/s3c2412.c
+++ b/arch/arm/mach-s3c24xx/s3c2412.c
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-s3c2412/s3c2412.c
+/*
- *
 * Copyright (c) 2006 Simtec Electronics
 *      Ben Dooks <ben@simtec.co.uk>
 *
@@ -28,28 +27,30 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <mach/hardware.h>
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/system_misc.h>
-#include <plat/cpu-freq.h>
+#include <mach/hardware.h>
 #include <mach/regs-clock.h>
-#include <plat/regs-serial.h>
-#include <mach/regs-power.h>
 #include <mach/regs-gpio.h>
-#include <mach/regs-dsc.h>
+#include <mach/regs-power.h>
-#include <plat/regs-spi.h>
-#include <mach/regs-s3c2412.h>
-#include <plat/s3c2412.h>
+#include <plat/clock.h>
 #include <plat/cpu.h>
+#include <plat/cpu-freq.h>
 #include <plat/devs.h>
-#include <plat/clock.h>
-#include <plat/pm.h>
-#include <plat/pll.h>
 #include <plat/nand-core.h>
+#include <plat/pll.h>
+#include <plat/pm.h>
+#include <plat/regs-serial.h>
+#include <plat/regs-spi.h>
+#include <plat/s3c2412.h>
+#include "regs-dsc.h"
+#define S3C2412_SWRST                   (S3C24XX_VA_CLKPWR + 0x30)
+#define S3C2412_SWRST_RESET             (0x533C2412)
 #ifndef CONFIG_CPU_S3C2412_ONLY
 void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c
index b0b60a1154d6..ad2671baa910 100644
--- a/arch/arm/mach-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c24xx/s3c244x.c
@@ -36,7 +36,6 @@
 #include <mach/regs-clock.h>
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
-#include <mach/regs-dsc.h>
 #include <plat/s3c2410.h>
 #include <plat/s3c244x.h>
@@ -48,6 +47,8 @@
 #include <plat/nand-core.h>
 #include <plat/watchdog-reset.h>
+#include "regs-dsc.h"
 static struct map_desc s3c244x_iodesc[] __initdata = {
        IODESC_ENT(CLKPWR),
        IODESC_ENT(TIMER),
diff --git a/arch/arm/mach-s3c24xx/simtec-audio.c b/arch/arm/mach-s3c24xx/simtec-audio.c
index fd0ef05763a9..67cb5120dfeb 100644
--- a/arch/arm/mach-s3c24xx/simtec-audio.c
+++ b/arch/arm/mach-s3c24xx/simtec-audio.c
@@ -17,16 +17,13 @@
 #include <linux/device.h>
 #include <linux/io.h>
-#include <mach/bast-map.h>
-#include <mach/bast-irq.h>
-#include <mach/bast-cpld.h>
 #include <mach/hardware.h>
 #include <mach/regs-gpio.h>
 #include <linux/platform_data/asoc-s3c24xx_simtec.h>
 #include <plat/devs.h>
+#include "bast.h"
 #include "simtec.h"
 /* platform ops for audio */
diff --git a/arch/arm/mach-s3c24xx/simtec-nor.c b/arch/arm/mach-s3c24xx/simtec-nor.c
index 029744fcaacb..8884bffa619a 100644
--- a/arch/arm/mach-s3c24xx/simtec-nor.c
+++ b/arch/arm/mach-s3c24xx/simtec-nor.c
@@ -27,9 +27,8 @@
 #include <asm/mach/irq.h>
 #include <mach/map.h>
-#include <mach/bast-map.h>
-#include <mach/bast-cpld.h>
+#include "bast.h"
 #include "simtec.h"
 static void simtec_nor_vpp(struct platform_device *pdev, int vpp)
diff --git a/arch/arm/mach-s3c24xx/simtec-usb.c b/arch/arm/mach-s3c24xx/simtec-usb.c
index ddf7a3c743ac..2ed2e32430dc 100644
--- a/arch/arm/mach-s3c24xx/simtec-usb.c
+++ b/arch/arm/mach-s3c24xx/simtec-usb.c
@@ -28,15 +28,13 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <mach/bast-map.h>
-#include <mach/bast-irq.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <linux/platform_data/usb-ohci-s3c2410.h>
 #include <plat/devs.h>
+#include "bast.h"
 #include "simtec.h"
 /* control power and monitor over-current events on various Simtec
@@ -79,7 +77,7 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on)
        int ret;
        if (on) {
-                ret = request_irq(IRQ_USBOC, usb_simtec_ocirq,
+                ret = request_irq(BAST_IRQ_USBOC, usb_simtec_ocirq,
                                  IRQF_DISABLED | IRQF_TRIGGER_RISING |
                                   IRQF_TRIGGER_FALLING,
                                  "USB Over-current", info);
@@ -87,7 +85,7 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on)
                        printk(KERN_ERR "failed to request usb oc irq\n");
                }
        } else {
-                free_irq(IRQ_USBOC, info);
+                free_irq(BAST_IRQ_USBOC, info);
        }
 }
diff --git a/arch/arm/mach-s3c24xx/vr1000.h b/arch/arm/mach-s3c24xx/vr1000.h
new file mode 100644
index 000000000000..7fcd2c2f183c
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/vr1000.h
@@ -0,0 +1,118 @@
+/* arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h
+ *
+ * Copyright (c) 2003 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * VR1000 - CPLD control constants
+ * Machine VR1000 - IRQ Number definitions
+ * Machine VR1000 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#ifndef __MACH_S3C24XX_VR1000_H
+#define __MACH_S3C24XX_VR1000_H __FILE__
+#define VR1000_CPLD_CTRL2_RAMWEN        (0x04)  /* SRAM Write Enable */
+/* irq numbers to onboard peripherals */
+#define VR1000_IRQ_USBOC                IRQ_EINT19
+#define VR1000_IRQ_IDE0                 IRQ_EINT16
+#define VR1000_IRQ_IDE1                 IRQ_EINT17
+#define VR1000_IRQ_SERIAL               IRQ_EINT12
+#define VR1000_IRQ_DM9000A              IRQ_EINT10
+#define VR1000_IRQ_DM9000N              IRQ_EINT9
+#define VR1000_IRQ_SMALERT              IRQ_EINT8
+/* map */
+#define VR1000_IOADDR(x)                (S3C2410_ADDR((x) + 0x01300000))
+/* we put the CPLD registers next, to get them out of the way */
+#define VR1000_VA_CTRL1                 VR1000_IOADDR(0x00000000) /* 0x01300000 */
+#define VR1000_PA_CTRL1                 (S3C2410_CS5 | 0x7800000)
+#define VR1000_VA_CTRL2                 VR1000_IOADDR(0x00100000) /* 0x01400000 */
+#define VR1000_PA_CTRL2                 (S3C2410_CS1 | 0x6000000)
+#define VR1000_VA_CTRL3                 VR1000_IOADDR(0x00200000) /* 0x01500000 */
+#define VR1000_PA_CTRL3                 (S3C2410_CS1 | 0x6800000)
+#define VR1000_VA_CTRL4                 VR1000_IOADDR(0x00300000) /* 0x01600000 */
+#define VR1000_PA_CTRL4                 (S3C2410_CS1 | 0x7000000)
+/* next, we have the PC104 ISA interrupt registers */
+#define VR1000_PA_PC104_IRQREQ          (S3C2410_CS5 | 0x6000000) /* 0x01700000 */
+#define VR1000_VA_PC104_IRQREQ          VR1000_IOADDR(0x00400000)
+#define VR1000_PA_PC104_IRQRAW          (S3C2410_CS5 | 0x6800000) /* 0x01800000 */
+#define VR1000_VA_PC104_IRQRAW          VR1000_IOADDR(0x00500000)
+#define VR1000_PA_PC104_IRQMASK         (S3C2410_CS5 | 0x7000000) /* 0x01900000 */
+#define VR1000_VA_PC104_IRQMASK         VR1000_IOADDR(0x00600000)
+/*
+ * 0xE0000000 contains the IO space that is split by speed and
+ * whether the access is for 8 or 16bit IO... this ensures that
+ * the correct access is made
+ *
+ * 0x10000000 of space, partitioned as so:
+ *
+ * 0x00000000 to 0x04000000  8bit,  slow
+ * 0x04000000 to 0x08000000  16bit, slow
+ * 0x08000000 to 0x0C000000  16bit, net
+ * 0x0C000000 to 0x10000000  16bit, fast
+ *
+ * each of these spaces has the following in:
+ *
+ * 0x02000000 to 0x02100000 1MB  IDE primary channel
+ * 0x02100000 to 0x02200000 1MB  IDE primary channel aux
+ * 0x02200000 to 0x02400000 1MB  IDE secondary channel
+ * 0x02300000 to 0x02400000 1MB  IDE secondary channel aux
+ * 0x02500000 to 0x02600000 1MB  Davicom DM9000 ethernet controllers
+ * 0x02600000 to 0x02700000 1MB
+ *
+ * the phyiscal layout of the zones are:
+ *  nGCS2 - 8bit, slow
+ *  nGCS3 - 16bit, slow
+ *  nGCS4 - 16bit, net
+ *  nGCS5 - 16bit, fast
+ */
+#define VR1000_VA_MULTISPACE    (0xE0000000)
+#define VR1000_VA_ISAIO         (VR1000_VA_MULTISPACE + 0x00000000)
+#define VR1000_VA_ISAMEM        (VR1000_VA_MULTISPACE + 0x01000000)
+#define VR1000_VA_IDEPRI        (VR1000_VA_MULTISPACE + 0x02000000)
+#define VR1000_VA_IDEPRIAUX     (VR1000_VA_MULTISPACE + 0x02100000)
+#define VR1000_VA_IDESEC        (VR1000_VA_MULTISPACE + 0x02200000)
+#define VR1000_VA_IDESECAUX     (VR1000_VA_MULTISPACE + 0x02300000)
+#define VR1000_VA_ASIXNET       (VR1000_VA_MULTISPACE + 0x02400000)
+#define VR1000_VA_DM9000        (VR1000_VA_MULTISPACE + 0x02500000)
+#define VR1000_VA_SUPERIO       (VR1000_VA_MULTISPACE + 0x02600000)
+/* physical offset addresses for the peripherals */
+#define VR1000_PA_IDEPRI        (0x02000000)
+#define VR1000_PA_IDEPRIAUX     (0x02800000)
+#define VR1000_PA_IDESEC        (0x03000000)
+#define VR1000_PA_IDESECAUX     (0x03800000)
+#define VR1000_PA_DM9000        (0x05000000)
+#define VR1000_PA_SERIAL        (0x11800000)
+#define VR1000_VA_SERIAL        (VR1000_IOADDR(0x00700000))
+/* VR1000 ram is in CS1, with A26..A24 = 2_101 */
+#define VR1000_PA_SRAM          (S3C2410_CS1 | 0x05000000)
+/* some configurations for the peripherals */
+#define VR1000_DM9000_CS        VR1000_VAM_CS4
+#endif /* __MACH_S3C24XX_VR1000_H */
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 803711e283b2..8499415be9cd 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -23,7 +23,6 @@
 #include <mach/hardware.h>
 #include <mach/map.h>
-#include <mach/regs-sys.h>
 #include <mach/regs-clock.h>
 #include <plat/cpu.h>
@@ -33,6 +32,8 @@
 #include <plat/clock-clksrc.h>
 #include <plat/pll.h>
+#include "regs-sys.h"
 /* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
 * ext_xtal_mux for want of an actual name from the manual.
 */
diff --git a/arch/arm/mach-s3c64xx/cpuidle.c b/arch/arm/mach-s3c64xx/cpuidle.c
index acb197ccf3f7..ead5fab0dbb5 100644
--- a/arch/arm/mach-s3c64xx/cpuidle.c
+++ b/arch/arm/mach-s3c64xx/cpuidle.c
@@ -20,8 +20,8 @@
 #include <mach/map.h>
-#include <mach/regs-sys.h>
+#include "regs-sys.h"
-#include <mach/regs-syscon-power.h>
+#include "regs-syscon-power.h"
 static int s3c64xx_enter_idle(struct cpuidle_device *dev,
                              struct cpuidle_driver *drv,
diff --git a/arch/arm/mach-s3c64xx/include/mach/crag6410.h b/arch/arm/mach-s3c64xx/crag6410.h
index 4c3c9994fc2c..4c3c9994fc2c 100644
--- a/arch/arm/mach-s3c64xx/include/mach/crag6410.h
+++ b/arch/arm/mach-s3c64xx/crag6410.h
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index f2a7a1725596..ec29b35f25c0 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -28,10 +28,10 @@
 #include <mach/map.h>
 #include <mach/irqs.h>
-#include <mach/regs-sys.h>
 #include <asm/hardware/pl080.h>
+#include "regs-sys.h"
 /* dma channel state information */
 struct s3c64xx_dmac {
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
deleted file mode 100644
index b91e02093289..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* arch/arm/plat-s3c64xx/include/plat/regs-sys.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX system register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __PLAT_REGS_SYS_H
-#define __PLAT_REGS_SYS_H __FILE__
-#define S3C_SYSREG(x)           (S3C_VA_SYS + (x))
-#define S3C64XX_AHB_CON0        S3C_SYSREG(0x100)
-#define S3C64XX_AHB_CON1        S3C_SYSREG(0x104)
-#define S3C64XX_AHB_CON2        S3C_SYSREG(0x108)
-#define S3C64XX_SDMA_SEL        S3C_SYSREG(0x110)
-#define S3C64XX_OTHERS          S3C_SYSREG(0x900)
-#define S3C64XX_OTHERS_USBMASK  (1 << 16)
-#define S3C64XX_OTHERS_SYNCMUXSEL       (1 << 6)
-#endif /* _PLAT_REGS_SYS_H */
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index afeae0b5bb28..728eef3296b2 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -49,9 +49,9 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <mach/regs-gpio.h>
-#include <mach/regs-modem.h>
 #include "common.h"
+#include "regs-modem.h"
 /* DM9000 */
 #define ANW6410_PA_DM9000       (0x18000000)
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index 755c0bb119f4..bf3d1c09b085 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -29,7 +29,7 @@
 #include <linux/platform_data/spi-s3c64xx.h>
-#include <mach/crag6410.h>
+#include "crag6410.h"
 static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
        .line = S3C64XX_GPC(3),
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 5b6adc7f1d39..1acf02bace57 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -49,12 +49,7 @@
 #include <mach/hardware.h>
 #include <mach/map.h>
-#include <mach/regs-sys.h>
 #include <mach/regs-gpio.h>
-#include <mach/regs-modem.h>
-#include <mach/crag6410.h>
-#include <mach/regs-gpio-memport.h>
 #include <plat/regs-serial.h>
 #include <plat/fb.h>
@@ -71,6 +66,10 @@
 #include <plat/pm.h>
 #include "common.h"
+#include "crag6410.h"
+#include "regs-gpio-memport.h"
+#include "regs-modem.h"
+#include "regs-sys.h"
 /* serial port setup */
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index e173e6e98228..4b41fcdaa7b6 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -30,8 +30,6 @@
 #include <mach/map.h>
 #include <mach/regs-gpio.h>
-#include <mach/regs-modem.h>
-#include <mach/regs-srom.h>
 #include <plat/adc.h>
 #include <plat/cpu.h>
@@ -45,6 +43,8 @@
 #include <video/samsung_fimd.h>
 #include "common.h"
+#include "regs-modem.h"
+#include "regs-srom.h"
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 4d0d47a66930..fa12bd21ad82 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -31,8 +31,6 @@
 #include <mach/map.h>
 #include <mach/regs-gpio.h>
-#include <mach/regs-modem.h>
-#include <mach/regs-srom.h>
 #include <plat/adc.h>
 #include <plat/cpu.h>
@@ -46,6 +44,8 @@
 #include <video/samsung_fimd.h>
 #include "common.h"
+#include "regs-modem.h"
+#include "regs-srom.h"
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index c6d7390939ae..fc3e9b32e26f 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -25,7 +25,6 @@
 #include <mach/map.h>
 #include <mach/regs-gpio.h>
-#include <mach/regs-modem.h>
 #include <plat/clock.h>
 #include <plat/cpu.h>
@@ -41,6 +40,7 @@
 #include <video/platform_lcd.h>
 #include "common.h"
+#include "regs-modem.h"
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 1663d10ba02a..ba7544e2d04d 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -56,10 +56,7 @@
 #include <asm/mach-types.h>
 #include <plat/regs-serial.h>
-#include <mach/regs-modem.h>
 #include <mach/regs-gpio.h>
-#include <mach/regs-sys.h>
-#include <mach/regs-srom.h>
 #include <linux/platform_data/ata-samsung_cf.h>
 #include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/fb.h>
@@ -74,6 +71,9 @@
 #include <plat/backlight.h>
 #include "common.h"
+#include "regs-modem.h"
+#include "regs-srom.h"
+#include "regs-sys.h"
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index d2e1a16690bd..a6d7c6cf45e7 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -26,12 +26,13 @@
 #include <plat/pm.h>
 #include <plat/wakeup-mask.h>
-#include <mach/regs-sys.h>
 #include <mach/regs-gpio.h>
 #include <mach/regs-clock.h>
-#include <mach/regs-syscon-power.h>
-#include <mach/regs-gpio-memport.h>
+#include "regs-gpio-memport.h"
-#include <mach/regs-modem.h>
+#include "regs-modem.h"
+#include "regs-sys.h"
+#include "regs-syscon-power.h"
 struct s3c64xx_pm_domain {
        char *const name;
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/regs-gpio-memport.h
index 82342f6fd27d..b927593019f5 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h
+++ b/arch/arm/mach-s3c64xx/regs-gpio-memport.h
@@ -1,5 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/mach/regs-gpio-memport.h
+/*
- *
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2008 Simtec Electronics
 *      Ben Dooks <ben@simtec.co.uk>
@@ -8,8 +7,8 @@
 * S3C64XX - GPIO memory port register definitions
 */
-#ifndef __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H
+#ifndef __MACH_S3C64XX_REGS_GPIO_MEMPORT_H
-#define __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__
+#define __MACH_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__
 #define S3C64XX_MEM0CONSTOP     S3C64XX_GPIOREG(0x1B0)
 #define S3C64XX_MEM1CONSTOP     S3C64XX_GPIOREG(0x1B4)
@@ -21,5 +20,5 @@
 #define S3C64XX_MEM0DRVCON      S3C64XX_GPIOREG(0x1D0)
 #define S3C64XX_MEM1DRVCON      S3C64XX_GPIOREG(0x1D4)
-#endif /* __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H */
+#endif /* __MACH_S3C64XX_REGS_GPIO_MEMPORT_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-modem.h b/arch/arm/mach-s3c64xx/regs-modem.h
index 49f7759dedfa..073cdd3a03be 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-modem.h
+++ b/arch/arm/mach-s3c64xx/regs-modem.h
@@ -1,5 +1,4 @@
-/* arch/arm/plat-s3c64xx/include/plat/regs-modem.h
+/*
- *
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2008 Simtec Electronics
 *      http://armlinux.simtec.co.uk/
@@ -12,10 +11,10 @@
 * published by the Free Software Foundation.
 */
-#ifndef __PLAT_S3C64XX_REGS_MODEM_H
+#ifndef __MACH_S3C64XX_REGS_MODEM_H
-#define __PLAT_S3C64XX_REGS_MODEM_H __FILE__
+#define __MACH_S3C64XX_REGS_MODEM_H __FILE__
-#define S3C64XX_MODEMREG(x)     (S3C64XX_VA_MODEM + (x))
+#define S3C64XX_MODEMREG(x)                     (S3C64XX_VA_MODEM + (x))
 #define S3C64XX_MODEM_INT2AP                    S3C64XX_MODEMREG(0x0)
 #define S3C64XX_MODEM_INT2MODEM                 S3C64XX_MODEMREG(0x4)
@@ -28,4 +27,4 @@
 #define MIFPCON_INT2M_LEVEL                     (1 << 4)
 #define MIFPCON_LCD_BYPASS                      (1 << 3)
-#endif /* __PLAT_S3C64XX_REGS_MODEM_H */
+#endif /* __MACH_S3C64XX_REGS_MODEM_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-srom.h b/arch/arm/mach-s3c64xx/regs-srom.h
index 756731b36297..d56f3386eb00 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-srom.h
+++ b/arch/arm/mach-s3c64xx/regs-srom.h
@@ -1,5 +1,4 @@
-/* arch/arm/plat-s3c64xx/include/plat/regs-srom.h
+/*
- *
 * Copyright 2009 Andy Green <andy@warmcat.com>
 *
 * S3C64XX SROM definitions
@@ -9,8 +8,8 @@
 * published by the Free Software Foundation.
 */
-#ifndef __PLAT_REGS_SROM_H
+#ifndef __MACH_S3C64XX_REGS_SROM_H
-#define __PLAT_REGS_SROM_H __FILE__
+#define __MACH_S3C64XX_REGS_SROM_H __FILE__
 #define S3C64XX_SROMREG(x)      (S3C_VA_MEM + (x))
@@ -29,7 +28,7 @@
 #define S3C64XX_SROM_BW__DATAWIDTH__SHIFT       0
 #define S3C64XX_SROM_BW__WAITENABLE__SHIFT      2
 #define S3C64XX_SROM_BW__BYTEENABLE__SHIFT      3
-#define S3C64XX_SROM_BW__CS_MASK 0xf
+#define S3C64XX_SROM_BW__CS_MASK                0xf
 #define S3C64XX_SROM_BW__NCS0__SHIFT    0
 #define S3C64XX_SROM_BW__NCS1__SHIFT    4
@@ -56,4 +55,4 @@
 #define S3C64XX_SROM_BCX__TACS__SHIFT   28
 #define S3C64XX_SROM_BCX__TACS__MASK    0xf
-#endif /* _PLAT_REGS_SROM_H */
+#endif /* __MACH_S3C64XX_REGS_SROM_H */
diff --git a/arch/arm/mach-s3c64xx/regs-sys.h b/arch/arm/mach-s3c64xx/regs-sys.h
new file mode 100644
index 000000000000..8c411fbb0cd9
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/regs-sys.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX system register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#ifndef __MACH_S3C64XX_REGS_SYS_H
+#define __MACH_S3C64XX_REGS_SYS_H __FILE__
+#define S3C_SYSREG(x)                   (S3C_VA_SYS + (x))
+#define S3C64XX_AHB_CON0                S3C_SYSREG(0x100)
+#define S3C64XX_AHB_CON1                S3C_SYSREG(0x104)
+#define S3C64XX_AHB_CON2                S3C_SYSREG(0x108)
+#define S3C64XX_SDMA_SEL                S3C_SYSREG(0x110)
+#define S3C64XX_OTHERS                  S3C_SYSREG(0x900)
+#define S3C64XX_OTHERS_USBMASK          (1 << 16)
+#define S3C64XX_OTHERS_SYNCMUXSEL       (1 << 6)
+#endif /* __MACH_S3C64XX_REGS_SYS_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h b/arch/arm/mach-s3c64xx/regs-syscon-power.h
index 270d96ac9705..6e16b3404da9 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h
+++ b/arch/arm/mach-s3c64xx/regs-syscon-power.h
@@ -1,5 +1,4 @@
-/* arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h
+/*
- *
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2008 Simtec Electronics
 *      http://armlinux.simtec.co.uk/
@@ -12,8 +11,8 @@
 * published by the Free Software Foundation.
 */
-#ifndef __PLAT_S3C64XX_REGS_SYSCON_POWER_H
+#ifndef __MACH_S3C64XX_REGS_SYSCON_POWER_H
-#define __PLAT_S3C64XX_REGS_SYSCON_POWER_H __FILE__
+#define __MACH_S3C64XX_REGS_SYSCON_POWER_H __FILE__
 #define S3C64XX_PWR_CFG                         S3C_SYSREG(0x804)
@@ -113,4 +112,4 @@
 #define S3C64XX_INFORM2                         S3C_SYSREG(0xA08)
 #define S3C64XX_INFORM3                         S3C_SYSREG(0xA0C)
-#endif /* __PLAT_S3C64XX_REGS_SYSCON_POWER_H */
+#endif /* __MACH_S3C64XX_REGS_SYSCON_POWER_H */
diff --git a/arch/arm/mach-s3c64xx/setup-usb-phy.c b/arch/arm/mach-s3c64xx/setup-usb-phy.c
index f6757e02d7db..c8174d95339b 100644
--- a/arch/arm/mach-s3c64xx/setup-usb-phy.c
+++ b/arch/arm/mach-s3c64xx/setup-usb-phy.c
@@ -15,11 +15,12 @@
 #include <linux/io.h>
 #include <linux/platform_device.h>
 #include <mach/map.h>
-#include <mach/regs-sys.h>
 #include <plat/cpu.h>
 #include <plat/regs-usb-hsotg-phy.h>
 #include <plat/usb-phy.h>
+#include "regs-sys.h"
 static int s3c_usb_otgphy_init(struct platform_device *pdev)
 {
        struct clk *xusbxti;
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index 5112371079d0..3537815247f1 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -23,7 +23,6 @@
 #include <mach/hardware.h>
 #include <mach/map.h>
 #include <mach/regs-clock.h>
-#include <mach/s5p64x0-clock.h>
 #include <plat/cpu-freq.h>
 #include <plat/clock.h>
@@ -32,6 +31,7 @@
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
+#include "clock.h"
 #include "common.h"
 static u32 epll_div[][5] = {
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index 154dea702d70..af384ddd2dcf 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -23,7 +23,6 @@
 #include <mach/hardware.h>
 #include <mach/map.h>
 #include <mach/regs-clock.h>
-#include <mach/s5p64x0-clock.h>
 #include <plat/cpu-freq.h>
 #include <plat/clock.h>
@@ -32,6 +31,7 @@
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
+#include "clock.h"
 #include "common.h"
 static struct clksrc_clk clk_mout_dpll = {
diff --git a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h b/arch/arm/mach-s5p64x0/clock.h
index 0ef47d1b7670..28b8e3c6bd24 100644
--- a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
+++ b/arch/arm/mach-s5p64x0/clock.h
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
+/*
- *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *              http://www.samsung.com
 *
@@ -10,8 +9,8 @@
 * published by the Free Software Foundation.
 */
-#ifndef __ASM_ARCH_CLOCK_H
+#ifndef __MACH_S5P64X0_CLOCK_H
-#define __ASM_ARCH_CLOCK_H __FILE__
+#define __MACH_S5P64X0_CLOCK_H __FILE__
 #include <linux/clk.h>
@@ -36,4 +35,4 @@ extern int s5p64x0_mem_ctrl(struct clk *clk, int enable);
 extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable);
-#endif /* __ASM_ARCH_CLOCK_H */
+#endif /* __MACH_S5P64X0_CLOCK_H */
diff --git a/arch/arm/mach-s5p64x0/gpiolib.c b/arch/arm/mach-s5p64x0/gpiolib.c
deleted file mode 100644
index 700dac6c43f3..000000000000
--- a/arch/arm/mach-s5p64x0/gpiolib.c
+++ /dev/null
@@ -1,508 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/gpiolib.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * S5P64X0 - GPIOlib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/kernel.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-#include <mach/map.h>
-#include <mach/regs-gpio.h>
-#include <mach/regs-clock.h>
-#include <plat/cpu.h>
-#include <plat/gpio-core.h>
-#include <plat/gpio-cfg.h>
-#include <plat/gpio-cfg-helpers.h>
-/*
- * S5P6440 GPIO bank summary:
- *
- * Bank GPIOs   Style   SlpCon  ExtInt Group
- * A    6       4Bit    Yes     1
- * B    7       4Bit    Yes     1
- * C    8       4Bit    Yes     2
- * F    2       2Bit    Yes     4 [1]
- * G    7       4Bit    Yes     5
- * H    10      4Bit[2] Yes     6
- * I    16      2Bit    Yes     None
- * J    12      2Bit    Yes     None
- * N    16      2Bit    No      IRQ_EINT
- * P    8       2Bit    Yes     8
- * R    15      4Bit[2] Yes     8
- *
- * S5P6450 GPIO bank summary:
- *
- * Bank GPIOs   Style   SlpCon  ExtInt Group
- * A    6       4Bit    Yes     1
- * B    7       4Bit    Yes     1
- * C    8       4Bit    Yes     2
- * D    8       4Bit    Yes     None
- * F    2       2Bit    Yes     None
- * G    14      4Bit[2] Yes     5
- * H    10      4Bit[2] Yes     6
- * I    16      2Bit    Yes     None
- * J    12      2Bit    Yes     None
- * K    5       4Bit    Yes     None
- * N    16      2Bit    No      IRQ_EINT
- * P    11      2Bit    Yes     8
- * Q    14      2Bit    Yes     None
- * R    15      4Bit[2] Yes     None
- * S    8       2Bit    Yes     None
- *
- * [1] BANKF pins 14,15 do not form part of the external interrupt sources
- * [2] BANK has two control registers, GPxCON0 and GPxCON1
- */
-static int s5p64x0_gpiolib_rbank_4bit2_input(struct gpio_chip *chip,
-                                             unsigned int offset)
-{
-        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-        void __iomem *base = ourchip->base;
-        void __iomem *regcon = base;
-        unsigned long con;
-        unsigned long flags;
-        switch (offset) {
-        case 6:
-                offset += 1;
-        case 0:
-        case 1:
-        case 2:
-        case 3:
-        case 4:
-        case 5:
-                regcon -= 4;
-                break;
-        default:
-                offset -= 7;
-                break;
-        }
-        s3c_gpio_lock(ourchip, flags);
-        con = __raw_readl(regcon);
-        con &= ~(0xf << con_4bit_shift(offset));
-        __raw_writel(con, regcon);
-        s3c_gpio_unlock(ourchip, flags);
-        return 0;
-}
-static int s5p64x0_gpiolib_rbank_4bit2_output(struct gpio_chip *chip,
-                                              unsigned int offset, int value)
-{
-        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-        void __iomem *base = ourchip->base;
-        void __iomem *regcon = base;
-        unsigned long con;
-        unsigned long dat;
-        unsigned long flags;
-        unsigned con_offset  = offset;
-        switch (con_offset) {
-        case 6:
-                con_offset += 1;
-        case 0:
-        case 1:
-        case 2:
-        case 3:
-        case 4:
-        case 5:
-                regcon -= 4;
-                break;
-        default:
-                con_offset -= 7;
-                break;
-        }
-        s3c_gpio_lock(ourchip, flags);
-        con = __raw_readl(regcon);
-        con &= ~(0xf << con_4bit_shift(con_offset));
-        con |= 0x1 << con_4bit_shift(con_offset);
-        dat = __raw_readl(base + GPIODAT_OFF);
-        if (value)
-                dat |= 1 << offset;
-        else
-                dat &= ~(1 << offset);
-        __raw_writel(con, regcon);
-        __raw_writel(dat, base + GPIODAT_OFF);
-        s3c_gpio_unlock(ourchip, flags);
-        return 0;
-}
-int s5p64x0_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip,
-                                   unsigned int off, unsigned int cfg)
-{
-        void __iomem *reg = chip->base;
-        unsigned int shift;
-        u32 con;
-        switch (off) {
-        case 0:
-        case 1:
-        case 2:
-        case 3:
-        case 4:
-        case 5:
-                shift = (off & 7) * 4;
-                reg -= 4;
-                break;
-        case 6:
-                shift = ((off + 1) & 7) * 4;
-                reg -= 4;
-        default:
-                shift = ((off + 1) & 7) * 4;
-                break;
-        }
-        if (s3c_gpio_is_cfg_special(cfg)) {
-                cfg &= 0xf;
-                cfg <<= shift;
-        }
-        con = __raw_readl(reg);
-        con &= ~(0xf << shift);
-        con |= cfg;
-        __raw_writel(con, reg);
-        return 0;
-}
-static struct s3c_gpio_cfg s5p64x0_gpio_cfgs[] = {
-        {
-                .cfg_eint       = 0,
-        }, {
-                .cfg_eint       = 7,
-        }, {
-                .cfg_eint       = 3,
-                .set_config     = s5p64x0_gpio_setcfg_4bit_rbank,
-        }, {
-                .cfg_eint       = 0,
-                .set_config     = s3c_gpio_setcfg_s3c24xx,
-                .get_config     = s3c_gpio_getcfg_s3c24xx,
-        }, {
-                .cfg_eint       = 2,
-                .set_config     = s3c_gpio_setcfg_s3c24xx,
-                .get_config     = s3c_gpio_getcfg_s3c24xx,
-        }, {
-                .cfg_eint       = 3,
-                .set_config     = s3c_gpio_setcfg_s3c24xx,
-                .get_config     = s3c_gpio_getcfg_s3c24xx,
-        },
-};
-static struct s3c_gpio_chip s5p6440_gpio_4bit[] = {
-        {
-                .base   = S5P64X0_GPA_BASE,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6440_GPA(0),
-                        .ngpio  = S5P6440_GPIO_A_NR,
-                        .label  = "GPA",
-                },
-        }, {
-                .base   = S5P64X0_GPB_BASE,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6440_GPB(0),
-                        .ngpio  = S5P6440_GPIO_B_NR,
-                        .label  = "GPB",
-                },
-        }, {
-                .base   = S5P64X0_GPC_BASE,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6440_GPC(0),
-                        .ngpio  = S5P6440_GPIO_C_NR,
-                        .label  = "GPC",
-                },
-        }, {
-                .base   = S5P64X0_GPG_BASE,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6440_GPG(0),
-                        .ngpio  = S5P6440_GPIO_G_NR,
-                        .label  = "GPG",
-                },
-        },
-};
-static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = {
-        {
-                .base   = S5P64X0_GPH_BASE + 0x4,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6440_GPH(0),
-                        .ngpio  = S5P6440_GPIO_H_NR,
-                        .label  = "GPH",
-                },
-        },
-};
-static struct s3c_gpio_chip s5p6440_gpio_rbank_4bit2[] = {
-        {
-                .base   = S5P64X0_GPR_BASE + 0x4,
-                .config = &s5p64x0_gpio_cfgs[2],
-                .chip   = {
-                        .base   = S5P6440_GPR(0),
-                        .ngpio  = S5P6440_GPIO_R_NR,
-                        .label  = "GPR",
-                },
-        },
-};
-static struct s3c_gpio_chip s5p6440_gpio_2bit[] = {
-        {
-                .base   = S5P64X0_GPF_BASE,
-                .config = &s5p64x0_gpio_cfgs[5],
-                .chip   = {
-                        .base   = S5P6440_GPF(0),
-                        .ngpio  = S5P6440_GPIO_F_NR,
-                        .label  = "GPF",
-                },
-        }, {
-                .base   = S5P64X0_GPI_BASE,
-                .config = &s5p64x0_gpio_cfgs[3],
-                .chip   = {
-                        .base   = S5P6440_GPI(0),
-                        .ngpio  = S5P6440_GPIO_I_NR,
-                        .label  = "GPI",
-                },
-        }, {
-                .base   = S5P64X0_GPJ_BASE,
-                .config = &s5p64x0_gpio_cfgs[3],
-                .chip   = {
-                        .base   = S5P6440_GPJ(0),
-                        .ngpio  = S5P6440_GPIO_J_NR,
-                        .label  = "GPJ",
-                },
-        }, {
-                .base   = S5P64X0_GPN_BASE,
-                .config = &s5p64x0_gpio_cfgs[4],
-                .chip   = {
-                        .base   = S5P6440_GPN(0),
-                        .ngpio  = S5P6440_GPIO_N_NR,
-                        .label  = "GPN",
-                },
-        }, {
-                .base   = S5P64X0_GPP_BASE,
-                .config = &s5p64x0_gpio_cfgs[5],
-                .chip   = {
-                        .base   = S5P6440_GPP(0),
-                        .ngpio  = S5P6440_GPIO_P_NR,
-                        .label  = "GPP",
-                },
-        },
-};
-static struct s3c_gpio_chip s5p6450_gpio_4bit[] = {
-        {
-                .base   = S5P64X0_GPA_BASE,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6450_GPA(0),
-                        .ngpio  = S5P6450_GPIO_A_NR,
-                        .label  = "GPA",
-                },
-        }, {
-                .base   = S5P64X0_GPB_BASE,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6450_GPB(0),
-                        .ngpio  = S5P6450_GPIO_B_NR,
-                        .label  = "GPB",
-                },
-        }, {
-                .base   = S5P64X0_GPC_BASE,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6450_GPC(0),
-                        .ngpio  = S5P6450_GPIO_C_NR,
-                        .label  = "GPC",
-                },
-        }, {
-                .base   = S5P6450_GPD_BASE,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6450_GPD(0),
-                        .ngpio  = S5P6450_GPIO_D_NR,
-                        .label  = "GPD",
-                },
-        }, {
-                .base   = S5P6450_GPK_BASE,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6450_GPK(0),
-                        .ngpio  = S5P6450_GPIO_K_NR,
-                        .label  = "GPK",
-                },
-        },
-};
-static struct s3c_gpio_chip s5p6450_gpio_4bit2[] = {
-        {
-                .base   = S5P64X0_GPG_BASE + 0x4,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6450_GPG(0),
-                        .ngpio  = S5P6450_GPIO_G_NR,
-                        .label  = "GPG",
-                },
-        }, {
-                .base   = S5P64X0_GPH_BASE + 0x4,
-                .config = &s5p64x0_gpio_cfgs[1],
-                .chip   = {
-                        .base   = S5P6450_GPH(0),
-                        .ngpio  = S5P6450_GPIO_H_NR,
-                        .label  = "GPH",
-                },
-        },
-};
-static struct s3c_gpio_chip s5p6450_gpio_rbank_4bit2[] = {
-        {
-                .base   = S5P64X0_GPR_BASE + 0x4,
-                .config = &s5p64x0_gpio_cfgs[2],
-                .chip   = {
-                        .base   = S5P6450_GPR(0),
-                        .ngpio  = S5P6450_GPIO_R_NR,
-                        .label  = "GPR",
-                },
-        },
-};
-static struct s3c_gpio_chip s5p6450_gpio_2bit[] = {
-        {
-                .base   = S5P64X0_GPF_BASE,
-                .config = &s5p64x0_gpio_cfgs[5],
-                .chip   = {
-                        .base   = S5P6450_GPF(0),
-                        .ngpio  = S5P6450_GPIO_F_NR,
-                        .label  = "GPF",
-                },
-        }, {
-                .base   = S5P64X0_GPI_BASE,
-                .config = &s5p64x0_gpio_cfgs[3],
-                .chip   = {
-                        .base   = S5P6450_GPI(0),
-                        .ngpio  = S5P6450_GPIO_I_NR,
-                        .label  = "GPI",
-                },
-        }, {
-                .base   = S5P64X0_GPJ_BASE,
-                .config = &s5p64x0_gpio_cfgs[3],
-                .chip   = {
-                        .base   = S5P6450_GPJ(0),
-                        .ngpio  = S5P6450_GPIO_J_NR,
-                        .label  = "GPJ",
-                },
-        }, {
-                .base   = S5P64X0_GPN_BASE,
-                .config = &s5p64x0_gpio_cfgs[4],
-                .chip   = {
-                        .base   = S5P6450_GPN(0),
-                        .ngpio  = S5P6450_GPIO_N_NR,
-                        .label  = "GPN",
-                },
-        }, {
-                .base   = S5P64X0_GPP_BASE,
-                .config = &s5p64x0_gpio_cfgs[5],
-                .chip   = {
-                        .base   = S5P6450_GPP(0),
-                        .ngpio  = S5P6450_GPIO_P_NR,
-                        .label  = "GPP",
-                },
-        }, {
-                .base   = S5P6450_GPQ_BASE,
-                .config = &s5p64x0_gpio_cfgs[4],
-                .chip   = {
-                        .base   = S5P6450_GPQ(0),
-                        .ngpio  = S5P6450_GPIO_Q_NR,
-                        .label  = "GPQ",
-                },
-        }, {
-                .base   = S5P6450_GPS_BASE,
-                .config = &s5p64x0_gpio_cfgs[5],
-                .chip   = {
-                        .base   = S5P6450_GPS(0),
-                        .ngpio  = S5P6450_GPIO_S_NR,
-                        .label  = "GPS",
-                },
-        },
-};
-void __init s5p64x0_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips)
-{
-        for (; nr_chips > 0; nr_chips--, chipcfg++) {
-                if (!chipcfg->set_config)
-                        chipcfg->set_config     = s3c_gpio_setcfg_s3c64xx_4bit;
-                if (!chipcfg->get_config)
-                        chipcfg->get_config     = s3c_gpio_getcfg_s3c64xx_4bit;
-                if (!chipcfg->set_pull)
-                        chipcfg->set_pull       = s3c_gpio_setpull_updown;
-                if (!chipcfg->get_pull)
-                        chipcfg->get_pull       = s3c_gpio_getpull_updown;
-        }
-}
-static void __init s5p64x0_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,
-                                                int nr_chips)
-{
-        for (; nr_chips > 0; nr_chips--, chip++) {
-                chip->chip.direction_input = s5p64x0_gpiolib_rbank_4bit2_input;
-                chip->chip.direction_output =
-                                        s5p64x0_gpiolib_rbank_4bit2_output;
-                s3c_gpiolib_add(chip);
-        }
-}
-static int __init s5p64x0_gpiolib_init(void)
-{
-        s5p64x0_gpiolib_set_cfg(s5p64x0_gpio_cfgs,
-                                ARRAY_SIZE(s5p64x0_gpio_cfgs));
-        if (soc_is_s5p6450()) {
-                samsung_gpiolib_add_2bit_chips(s5p6450_gpio_2bit,
-                                        ARRAY_SIZE(s5p6450_gpio_2bit));
-                samsung_gpiolib_add_4bit_chips(s5p6450_gpio_4bit,
-                                        ARRAY_SIZE(s5p6450_gpio_4bit));
-                samsung_gpiolib_add_4bit2_chips(s5p6450_gpio_4bit2,
-                                        ARRAY_SIZE(s5p6450_gpio_4bit2));
-                s5p64x0_gpio_add_rbank_4bit2(s5p6450_gpio_rbank_4bit2,
-                                        ARRAY_SIZE(s5p6450_gpio_rbank_4bit2));
-        } else {
-                samsung_gpiolib_add_2bit_chips(s5p6440_gpio_2bit,
-                                        ARRAY_SIZE(s5p6440_gpio_2bit));
-                samsung_gpiolib_add_4bit_chips(s5p6440_gpio_4bit,
-                                        ARRAY_SIZE(s5p6440_gpio_4bit));
-                samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2,
-                                        ARRAY_SIZE(s5p6440_gpio_4bit2));
-                s5p64x0_gpio_add_rbank_4bit2(s5p6440_gpio_rbank_4bit2,
-                                        ARRAY_SIZE(s5p6440_gpio_rbank_4bit2));
-        }
-        return 0;
-}
-core_initcall(s5p64x0_gpiolib_init);
diff --git a/arch/arm/mach-s5p64x0/include/mach/i2c.h b/arch/arm/mach-s5p64x0/i2c.h
index 887d25209e8e..1e5bb4ea200d 100644
--- a/arch/arm/mach-s5p64x0/include/mach/i2c.h
+++ b/arch/arm/mach-s5p64x0/i2c.h
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/i2c.h
+/*
- *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *              http://www.samsung.com
 *
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index a40d5eb38124..e23723a5a214 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -37,7 +37,6 @@
 #include <mach/hardware.h>
 #include <mach/map.h>
 #include <mach/regs-clock.h>
-#include <mach/i2c.h>
 #include <mach/regs-gpio.h>
 #include <plat/regs-serial.h>
@@ -55,6 +54,7 @@
 #include <plat/sdhci.h>
 #include "common.h"
+#include "i2c.h"
 #define SMDK6440_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                S3C2410_UCON_RXILEVEL |         \
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 703e576a26e0..ca10963a959e 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -37,7 +37,6 @@
 #include <mach/hardware.h>
 #include <mach/map.h>
 #include <mach/regs-clock.h>
-#include <mach/i2c.h>
 #include <mach/regs-gpio.h>
 #include <plat/regs-serial.h>
@@ -55,6 +54,7 @@
 #include <plat/sdhci.h>
 #include "common.h"
+#include "i2c.h"
 #define SMDK6450_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                S3C2410_UCON_RXILEVEL |         \
diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c
index a32edc545e6c..569b76ac98cb 100644
--- a/arch/arm/mach-s5p64x0/setup-i2c0.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c0.c
@@ -21,7 +21,7 @@ struct platform_device; /* don't need the contents */
 #include <plat/gpio-cfg.h>
 #include <linux/platform_data/i2c-s3c2410.h>
-#include <mach/i2c.h>
+#include "i2c.h"
 void s5p6440_i2c0_cfg_gpio(struct platform_device *dev)
 {
diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c
index ca2c5c7f8aa6..867374e6d0bc 100644
--- a/arch/arm/mach-s5p64x0/setup-i2c1.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c1.c
@@ -21,7 +21,7 @@ struct platform_device; /* don't need the contents */
 #include <plat/gpio-cfg.h>
 #include <linux/platform_data/i2c-s3c2410.h>
-#include <mach/i2c.h>
+#include "i2c.h"
 void s5p6440_i2c1_cfg_gpio(struct platform_device *dev)
 {
diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c
index addfb165c13d..2d67361ef431 100644
--- a/arch/arm/mach-s5pv210/dev-audio.c
+++ b/arch/arm/mach-s5pv210/dev-audio.c
@@ -18,7 +18,8 @@
 #include <mach/map.h>
 #include <mach/dma.h>
 #include <mach/irqs.h>
-#include <mach/regs-audss.h>
+#define S5PV210_AUDSS_INT_MEM   (0xC0000000)
 static int s5pv210_cfg_i2s(struct platform_device *pdev)
 {
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-audss.h b/arch/arm/mach-s5pv210/include/mach/regs-audss.h
deleted file mode 100644
index eacc1f790807..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/regs-audss.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-s5pv210/include/mach/regs-audss.h
- *
- * Copyright (c) 2011 Samsung Electronics
- *              http://www.samsung.com
- *
- * S5PV210 Audio SubSystem clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __PLAT_REGS_AUDSS_H
-#define __PLAT_REGS_AUDSS_H __FILE__
-#define S5PV210_AUDSS_INT_MEM   (0xC0000000)
-#endif /* _PLAT_REGS_AUDSS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-sys.h b/arch/arm/mach-s5pv210/include/mach/regs-sys.h
deleted file mode 100644
index cccb1eddaa38..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/regs-sys.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* arch/arm/mach-s5pv210/include/mach/regs-sys.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5PV210 - System registers definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S5PV210_USB_PHY_CON     (S3C_VA_SYS + 0xE80C)
-#define S5PV210_USB_PHY0_EN     (1 << 0)
-#define S5PV210_USB_PHY1_EN     (1 << 1)
diff --git a/arch/arm/mach-s5pv210/setup-usb-phy.c b/arch/arm/mach-s5pv210/setup-usb-phy.c
index be39cf4aa91b..356a0900af03 100644
--- a/arch/arm/mach-s5pv210/setup-usb-phy.c
+++ b/arch/arm/mach-s5pv210/setup-usb-phy.c
@@ -12,12 +12,17 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
 #include <mach/map.h>
-#include <mach/regs-sys.h>
 #include <plat/cpu.h>
 #include <plat/regs-usb-hsotg-phy.h>
 #include <plat/usb-phy.h>
+#define S5PV210_USB_PHY_CON     (S3C_VA_SYS + 0xE80C)
+#define S5PV210_USB_PHY0_EN     (1 << 0)
+#define S5PV210_USB_PHY1_EN     (1 << 1)
 static int s5pv210_usb_otgphy_init(struct platform_device *pdev)
 {
        struct clk *xusbxti;
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index f7a3ea2c498a..cf5aae5b0975 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -106,7 +106,18 @@ static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int chi
 #else
 /* machine specific code should provide samsung_gpiolib_getchip */
-#include <mach/gpio-track.h>
+extern struct samsung_gpio_chip s3c24xx_gpios[];
+static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin)
+{
+        struct samsung_gpio_chip *chip;
+        if (pin > S3C_GPIO_END)
+                return NULL;
+        chip = &s3c24xx_gpios[pin/32];
+        return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
+}
 static inline void s3c_gpiolib_track(struct samsung_gpio_chip *chip) { }
 #endif
diff --git a/arch/arm/plat-samsung/include/plat/gpio-fns.h b/arch/arm/plat-samsung/include/plat/gpio-fns.h
deleted file mode 100644
index d1ecef0e38e0..000000000000
--- a/arch/arm/plat-samsung/include/plat/gpio-fns.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <plat/gpio-cfg.h>
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index 7012ea8bf1e7..caf638b585b5 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -18,10 +18,10 @@
 #include <linux/cpufreq.h>
 #include <linux/suspend.h>
-#include <mach/cpufreq.h>
 #include <plat/cpu.h>
+#include "exynos-cpufreq.h"
 static struct exynos_dvfs_info *exynos_info;
 static struct regulator *arm_regulator;
diff --git a/arch/arm/mach-exynos/include/mach/cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
index 7517c3f417af..25c748b9b910 100644
--- a/arch/arm/mach-exynos/include/mach/cpufreq.h
+++ b/drivers/cpufreq/exynos-cpufreq.h
@@ -1,5 +1,4 @@
-/* linux/arch/arm/mach-exynos/include/mach/cpufreq.h
+/*
- *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *              http://www.samsung.com
 *
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c
index fb148fa27678..a5d0a8184220 100644
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ b/drivers/cpufreq/exynos4210-cpufreq.c
@@ -18,7 +18,8 @@
 #include <linux/cpufreq.h>
 #include <mach/regs-clock.h>
-#include <mach/cpufreq.h>
+#include "exynos-cpufreq.h"
 #define CPUFREQ_LEVEL_END       L5
diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
index 8c5a7afa5b0b..63ff74eec521 100644
--- a/drivers/cpufreq/exynos4x12-cpufreq.c
+++ b/drivers/cpufreq/exynos4x12-cpufreq.c
@@ -18,7 +18,8 @@
 #include <linux/cpufreq.h>
 #include <mach/regs-clock.h>
-#include <mach/cpufreq.h>
+#include "exynos-cpufreq.h"
 #define CPUFREQ_LEVEL_END       (L13 + 1)
diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c
index e64c253cb169..407126c2d7c6 100644
--- a/drivers/cpufreq/exynos5250-cpufreq.c
+++ b/drivers/cpufreq/exynos5250-cpufreq.c
@@ -19,7 +19,8 @@
 #include <mach/map.h>
 #include <mach/regs-clock.h>
-#include <mach/cpufreq.h>
+#include "exynos-cpufreq.h"
 #define CPUFREQ_LEVEL_END       (L15 + 1)
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index 76be7eed79de..edf1eb5cb125 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -38,7 +38,6 @@
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
-#include <plat/gpio-fns.h>
 #include <plat/pm.h>
 int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip,
diff --git a/sound/soc/samsung/h1940_uda1380.c b/sound/soc/samsung/h1940_uda1380.c
index 3870e9678b5d..15a3817aa5c8 100644
--- a/sound/soc/samsung/h1940_uda1380.c
+++ b/sound/soc/samsung/h1940_uda1380.c
@@ -21,7 +21,6 @@
 #include <sound/jack.h>
 #include <plat/regs-iis.h>
-#include <mach/h1940-latch.h>
 #include <asm/mach-types.h>
 #include "s3c24xx-i2s.h"
@@ -147,9 +146,9 @@ static int h1940_spk_power(struct snd_soc_dapm_widget *w,
                                struct snd_kcontrol *kcontrol, int event)
 {
        if (SND_SOC_DAPM_EVENT_ON(event))
-                gpio_set_value(H1940_LATCH_AUDIO_POWER, 1);
+                gpio_set_value(S3C_GPIO_END + 9, 1);
        else
-                gpio_set_value(H1940_LATCH_AUDIO_POWER, 0);
+                gpio_set_value(S3C_GPIO_END + 9, 0);
        return 0;
 }
@@ -233,11 +232,11 @@ static int __init h1940_init(void)
                return -ENODEV;
        /* configure some gpios */
-        ret = gpio_request(H1940_LATCH_AUDIO_POWER, "speaker-power");
+        ret = gpio_request(S3C_GPIO_END + 9, "speaker-power");
        if (ret)
                goto err_out;
-        ret = gpio_direction_output(H1940_LATCH_AUDIO_POWER, 0);
+        ret = gpio_direction_output(S3C_GPIO_END + 9, 0);
        if (ret)
                goto err_gpio;
@@ -258,7 +257,7 @@ static int __init h1940_init(void)
 err_plat:
        platform_device_put(s3c24xx_snd_device);
 err_gpio:
-        gpio_free(H1940_LATCH_AUDIO_POWER);
+        gpio_free(S3C_GPIO_END + 9);
 err_out:
        return ret;
@@ -269,7 +268,7 @@ static void __exit h1940_exit(void)
        platform_device_unregister(s3c24xx_snd_device);
        snd_soc_jack_free_gpios(&hp_jack, ARRAY_SIZE(hp_jack_gpios),
                hp_jack_gpios);
-        gpio_free(H1940_LATCH_AUDIO_POWER);
+        gpio_free(S3C_GPIO_END + 9);
 }
 module_init(h1940_init);
diff --git a/sound/soc/samsung/neo1973_wm8753.c b/sound/soc/samsung/neo1973_wm8753.c
index c7e965f80d2e..a301d8cfaa34 100644
--- a/sound/soc/samsung/neo1973_wm8753.c
+++ b/sound/soc/samsung/neo1973_wm8753.c
@@ -237,7 +237,7 @@ static int lm4853_set_spk(struct snd_kcontrol *kcontrol,
 {
        gta02_speaker_enabled = ucontrol->value.integer.value[0];
-        gpio_set_value(GTA02_GPIO_HP_IN, !gta02_speaker_enabled);
+        gpio_set_value(S3C2410_GPJ(2), !gta02_speaker_enabled);
        return 0;
 }
@@ -252,7 +252,7 @@ static int lm4853_get_spk(struct snd_kcontrol *kcontrol,
 static int lm4853_event(struct snd_soc_dapm_widget *w,
                        struct snd_kcontrol *k, int event)
 {
-        gpio_set_value(GTA02_GPIO_AMP_SHUT, SND_SOC_DAPM_EVENT_OFF(event));
+        gpio_set_value(S3C2410_GPJ(1), SND_SOC_DAPM_EVENT_OFF(event));
        return 0;
 }
@@ -396,8 +396,8 @@ static struct snd_soc_codec_conf neo1973_codec_conf[] = {
 };
 static const struct gpio neo1973_gta02_gpios[] = {
-        { GTA02_GPIO_HP_IN, GPIOF_OUT_INIT_HIGH, "GTA02_HP_IN" },
+        { S3C2410_GPJ(2), GPIOF_OUT_INIT_HIGH, "GTA02_HP_IN" },
-        { GTA02_GPIO_AMP_SHUT, GPIOF_OUT_INIT_HIGH, "GTA02_AMP_SHUT" },
+        { S3C2410_GPJ(1), GPIOF_OUT_INIT_HIGH, "GTA02_AMP_SHUT" },
 };
 static struct snd_soc_card neo1973 = {