diff options
-rw-r--r-- | arch/mips/include/asm/uasm.h | 4 | ||||
-rw-r--r-- | arch/mips/mm/uasm.c | 9 |
2 files changed, 11 insertions, 2 deletions
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h index 3d153edaa51e..b99bd07e199b 100644 --- a/arch/mips/include/asm/uasm.h +++ b/arch/mips/include/asm/uasm.h | |||
@@ -92,9 +92,11 @@ Ip_u2s3u1(_sd); | |||
92 | Ip_u2u1u3(_sll); | 92 | Ip_u2u1u3(_sll); |
93 | Ip_u2u1u3(_sra); | 93 | Ip_u2u1u3(_sra); |
94 | Ip_u2u1u3(_srl); | 94 | Ip_u2u1u3(_srl); |
95 | Ip_u2u1u3(_rotr); | ||
95 | Ip_u3u1u2(_subu); | 96 | Ip_u3u1u2(_subu); |
96 | Ip_u2s3u1(_sw); | 97 | Ip_u2s3u1(_sw); |
97 | Ip_0(_tlbp); | 98 | Ip_0(_tlbp); |
99 | Ip_0(_tlbr); | ||
98 | Ip_0(_tlbwi); | 100 | Ip_0(_tlbwi); |
99 | Ip_0(_tlbwr); | 101 | Ip_0(_tlbwr); |
100 | Ip_u3u1u2(_xor); | 102 | Ip_u3u1u2(_xor); |
@@ -129,6 +131,7 @@ static inline void __cpuinit uasm_l##lb(struct uasm_label **lab, u32 *addr) \ | |||
129 | # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh) | 131 | # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh) |
130 | # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh) | 132 | # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh) |
131 | # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh) | 133 | # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh) |
134 | # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh) | ||
132 | # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd) | 135 | # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd) |
133 | # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd) | 136 | # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd) |
134 | # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val) | 137 | # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val) |
@@ -142,6 +145,7 @@ static inline void __cpuinit uasm_l##lb(struct uasm_label **lab, u32 *addr) \ | |||
142 | # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh) | 145 | # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh) |
143 | # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh) | 146 | # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh) |
144 | # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh) | 147 | # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh) |
148 | # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh) | ||
145 | # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd) | 149 | # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd) |
146 | # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd) | 150 | # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd) |
147 | # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val) | 151 | # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val) |
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index e3ca0f7ed01a..1581e9852461 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c | |||
@@ -62,8 +62,9 @@ enum opcode { | |||
62 | insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal, | 62 | insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal, |
63 | insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, | 63 | insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, |
64 | insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, | 64 | insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, |
65 | insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw, | 65 | insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, |
66 | insn_tlbp, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, insn_dins | 66 | insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, |
67 | insn_dins | ||
67 | }; | 68 | }; |
68 | 69 | ||
69 | struct insn { | 70 | struct insn { |
@@ -125,9 +126,11 @@ static struct insn insn_table[] __cpuinitdata = { | |||
125 | { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, | 126 | { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, |
126 | { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, | 127 | { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, |
127 | { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE }, | 128 | { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE }, |
129 | { insn_rotr, M(spec_op, 1, 0, 0, 0, srl_op), RT | RD | RE }, | ||
128 | { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD }, | 130 | { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD }, |
129 | { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, | 131 | { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, |
130 | { insn_tlbp, M(cop0_op, cop_op, 0, 0, 0, tlbp_op), 0 }, | 132 | { insn_tlbp, M(cop0_op, cop_op, 0, 0, 0, tlbp_op), 0 }, |
133 | { insn_tlbr, M(cop0_op, cop_op, 0, 0, 0, tlbr_op), 0 }, | ||
131 | { insn_tlbwi, M(cop0_op, cop_op, 0, 0, 0, tlbwi_op), 0 }, | 134 | { insn_tlbwi, M(cop0_op, cop_op, 0, 0, 0, tlbwi_op), 0 }, |
132 | { insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 }, | 135 | { insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 }, |
133 | { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, | 136 | { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, |
@@ -378,9 +381,11 @@ I_u2s3u1(_sd) | |||
378 | I_u2u1u3(_sll) | 381 | I_u2u1u3(_sll) |
379 | I_u2u1u3(_sra) | 382 | I_u2u1u3(_sra) |
380 | I_u2u1u3(_srl) | 383 | I_u2u1u3(_srl) |
384 | I_u2u1u3(_rotr) | ||
381 | I_u3u1u2(_subu) | 385 | I_u3u1u2(_subu) |
382 | I_u2s3u1(_sw) | 386 | I_u2s3u1(_sw) |
383 | I_0(_tlbp) | 387 | I_0(_tlbp) |
388 | I_0(_tlbr) | ||
384 | I_0(_tlbwi) | 389 | I_0(_tlbwi) |
385 | I_0(_tlbwr) | 390 | I_0(_tlbwr) |
386 | I_u3u1u2(_xor) | 391 | I_u3u1u2(_xor) |