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-rw-r--r--drivers/gpu/drm/radeon/evergreen_hdmi.c12
-rw-r--r--drivers/gpu/drm/radeon/r600_hdmi.c9
2 files changed, 11 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index c18d4ecbd95d..237997949a7c 100644
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -219,13 +219,13 @@ void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,
219 WREG32(AFMT_AVI_INFO3 + offset, 219 WREG32(AFMT_AVI_INFO3 + offset,
220 frame[0xC] | (frame[0xD] << 8) | (buffer[1] << 24)); 220 frame[0xC] | (frame[0xD] << 8) | (buffer[1] << 24));
221 221
222 WREG32_OR(HDMI_INFOFRAME_CONTROL0 + offset,
223 HDMI_AVI_INFO_SEND | /* enable AVI info frames */
224 HDMI_AVI_INFO_CONT); /* required for audio info values to be updated */
225
226 WREG32_P(HDMI_INFOFRAME_CONTROL1 + offset, 222 WREG32_P(HDMI_INFOFRAME_CONTROL1 + offset,
227 HDMI_AVI_INFO_LINE(2), /* anything other than 0 */ 223 HDMI_AVI_INFO_LINE(2), /* anything other than 0 */
228 ~HDMI_AVI_INFO_LINE_MASK); 224 ~HDMI_AVI_INFO_LINE_MASK);
225
226 WREG32_OR(HDMI_INFOFRAME_CONTROL0 + offset,
227 HDMI_AVI_INFO_SEND | /* enable AVI info frames */
228 HDMI_AVI_INFO_CONT); /* required for audio info values to be updated */
229} 229}
230 230
231void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, 231void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index dd6606b8e23c..e85894ade95c 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -228,12 +228,13 @@ void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,
228 WREG32(HDMI0_AVI_INFO3 + offset, 228 WREG32(HDMI0_AVI_INFO3 + offset,
229 frame[0xC] | (frame[0xD] << 8) | (buffer[1] << 24)); 229 frame[0xC] | (frame[0xD] << 8) | (buffer[1] << 24));
230 230
231 WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset,
232 HDMI0_AVI_INFO_LINE(2)); /* anything other than 0 */
233
231 WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset, 234 WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,
232 HDMI0_AVI_INFO_SEND | /* enable AVI info frames */ 235 HDMI0_AVI_INFO_SEND | /* enable AVI info frames */
233 HDMI0_AVI_INFO_CONT); /* send AVI info frames every frame/field */ 236 HDMI0_AVI_INFO_CONT); /* send AVI info frames every frame/field */
234 237
235 WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset,
236 HDMI0_AVI_INFO_LINE(2)); /* anything other than 0 */
237} 238}
238 239
239/* 240/*